Check in LLVM r95781.
diff --git a/test/Analysis/Andersens/2007-11-19-InlineAsm.ll b/test/Analysis/Andersens/2007-11-19-InlineAsm.ll
new file mode 100644
index 0000000..5ba3499
--- /dev/null
+++ b/test/Analysis/Andersens/2007-11-19-InlineAsm.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -anders-aa -disable-output
+
+define void @x(i16 %Y) {
+entry:
+ %tmp = call i16 asm "bswap $0", "=r,r"(i16 %Y)
+ ret void
+}
+
diff --git a/test/Analysis/Andersens/2008-03-19-External.ll b/test/Analysis/Andersens/2008-03-19-External.ll
new file mode 100644
index 0000000..a973103
--- /dev/null
+++ b/test/Analysis/Andersens/2008-03-19-External.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -anders-aa -gvn -S | not grep undef
+; PR2160
+
+declare void @f(i32*)
+
+define i32 @g() {
+entry:
+ %tmp = alloca i32 ; <i32*> [#uses=2]
+ call void @f( i32* %tmp )
+ %tmp2 = load i32* %tmp ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
diff --git a/test/Analysis/Andersens/2008-04-07-Memcpy.ll b/test/Analysis/Andersens/2008-04-07-Memcpy.ll
new file mode 100644
index 0000000..5a50dd5
--- /dev/null
+++ b/test/Analysis/Andersens/2008-04-07-Memcpy.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -anders-aa -gvn -S | not grep undef
+; PR2169
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+declare void @use(i8)
+
+define void @f(i8* %x) {
+entry:
+ %copy = alloca i8 ; <i8*> [#uses=6]
+ call void @llvm.memcpy.i32( i8* %copy, i8* %x, i32 1, i32 4 )
+ %tmp = load i8* %copy ; <i8> [#uses=1]
+ call void @use(i8 %tmp)
+ ret void
+}
diff --git a/test/Analysis/Andersens/2008-12-27-BuiltinWrongType.ll b/test/Analysis/Andersens/2008-12-27-BuiltinWrongType.ll
new file mode 100644
index 0000000..da67511
--- /dev/null
+++ b/test/Analysis/Andersens/2008-12-27-BuiltinWrongType.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -anders-aa
+; PR3262
+
[email protected] = external global [3 x i8] ; <[3 x i8]*> [#uses=1]
+
+declare i8* @strtok(...)
+declare i8* @memmove(...)
+
+define void @test1(i8* %want1) nounwind {
+entry:
+ %0 = call i8* (...)* @strtok(i32 0, i8* getelementptr ([3 x i8]* @.str15, i32 0, i32 0)) nounwind ; <i8*> [#uses=0]
+ unreachable
+}
+
+define void @test2() nounwind {
+entry:
+ %0 = call i8* (...)* @memmove()
+ unreachable
+}
diff --git a/test/Analysis/Andersens/basictest.ll b/test/Analysis/Andersens/basictest.ll
new file mode 100644
index 0000000..47226dd
--- /dev/null
+++ b/test/Analysis/Andersens/basictest.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -anders-aa -aa-eval 2>/dev/null
+
+define void @test1() {
+ %X = malloc i32*
+ %Y = malloc i32
+ %Z = ptrtoint i32* %Y to i32
+ %W = inttoptr i32 %Z to i32*
+ store i32* %W, i32** %X
+ ret void
+}
+
+define void @test2(i32* %P) {
+ %X = malloc i32*
+ %Y = malloc i32
+ store i32* %P, i32** %X
+ ret void
+}
+
+define internal i32 *@test3(i32* %P) {
+ ret i32* %P
+}
+
+define void @test4() {
+ %X = malloc i32
+ %Y = call i32* @test3(i32* %X)
+ %ZZ = getelementptr i32* null, i32 17
+ ret void
+}
diff --git a/test/Analysis/Andersens/dg.exp b/test/Analysis/Andersens/dg.exp
new file mode 100644
index 0000000..1eb4755
--- /dev/null
+++ b/test/Analysis/Andersens/dg.exp
@@ -0,0 +1,4 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+
diff --git a/test/Analysis/Andersens/external.ll b/test/Analysis/Andersens/external.ll
new file mode 100644
index 0000000..13c12dc
--- /dev/null
+++ b/test/Analysis/Andersens/external.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -anders-aa -gvn -deadargelim -S | grep store | not grep null
+
+; Because the 'internal' function is passed to an external function, we don't
+; know what the incoming values will alias. As such, we cannot do the
+; optimization checked by the 'arg-must-alias.ll' test.
+
+declare void @external(i32(i32*)*)
+@G = internal constant i32* null
+
+define internal i32 @internal(i32* %ARG) {
+ ;;; We *DON'T* know that ARG always points to null!
+ store i32* %ARG, i32** @G
+ ret i32 0
+}
+
+define i32 @foo() {
+ call void @external(i32(i32*)* @internal)
+ %V = call i32 @internal(i32* null)
+ ret i32 %V
+}
diff --git a/test/Analysis/Andersens/modreftest.ll b/test/Analysis/Andersens/modreftest.ll
new file mode 100644
index 0000000..e0c2edc
--- /dev/null
+++ b/test/Analysis/Andersens/modreftest.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -anders-aa -gvn -instcombine -S \
+; RUN: | grep {ret i1 true}
+
+@G = internal global i32* null
+declare i32 *@ext()
+
+define i1 @bar() {
+ %V1 = load i32** @G
+ %X2 = call i32 *@ext()
+ %V2 = load i32** @G
+ store i32* %X2, i32** @G
+
+ %C = icmp eq i32* %V1, %V2
+ ret i1 %C
+}
diff --git a/test/Analysis/Andersens/modreftest2.ll b/test/Analysis/Andersens/modreftest2.ll
new file mode 100644
index 0000000..562c961
--- /dev/null
+++ b/test/Analysis/Andersens/modreftest2.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -anders-aa -gvn -S \
+; RUN: | not grep {ret i32 undef}
+
+;; From PR 2160
+declare void @f(i32*)
+
+define i32 @g() {
+entry:
+ %tmp = alloca i32 ; <i32*> [#uses=2]
+ call void @f( i32* %tmp )
+ %tmp2 = load i32* %tmp ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
diff --git a/test/Analysis/Andersens/trivialtest.ll b/test/Analysis/Andersens/trivialtest.ll
new file mode 100644
index 0000000..f9f938f
--- /dev/null
+++ b/test/Analysis/Andersens/trivialtest.ll
@@ -0,0 +1,3 @@
+; RUN: opt < %s -anders-aa -disable-output
+
+define void @foo() { ret void }
diff --git a/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll b/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll
new file mode 100644
index 0000000..6b50a16
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll
@@ -0,0 +1,18 @@
+; This testcase makes sure that size is taken to account when alias analysis
+; is performed. It is not legal to delete the second load instruction because
+; the value computed by the first load instruction is changed by the store.
+
+; RUN: opt < %s -gvn -instcombine -S | grep DONOTREMOVE
+
+define i32 @test() {
+ %A = alloca i32
+ store i32 0, i32* %A
+ %X = load i32* %A
+ %B = bitcast i32* %A to i8*
+ %C = getelementptr i8* %B, i64 1
+ store i8 1, i8* %C ; Aliases %A
+ %Y.DONOTREMOVE = load i32* %A
+ %Z = sub i32 %X, %Y.DONOTREMOVE
+ ret i32 %Z
+}
+
diff --git a/test/Analysis/BasicAA/2003-03-04-GEPCrash.ll b/test/Analysis/BasicAA/2003-03-04-GEPCrash.ll
new file mode 100644
index 0000000..4f8eabb
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-03-04-GEPCrash.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -basicaa -aa-eval -disable-output 2>/dev/null
+; Test for a bug in BasicAA which caused a crash when querying equality of P1&P2
+define void @test({[2 x i32],[2 x i32]}* %A, i64 %X, i64 %Y) {
+ %P1 = getelementptr {[2 x i32],[2 x i32]}* %A, i64 0, i32 0, i64 %X
+ %P2 = getelementptr {[2 x i32],[2 x i32]}* %A, i64 0, i32 1, i64 %Y
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll b/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll
new file mode 100644
index 0000000..f7e8295
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -gvn -instcombine -S | grep sub
+
+; BasicAA was incorrectly concluding that P1 and P2 didn't conflict!
+
+define i32 @test(i32 *%Ptr, i64 %V) {
+ %P2 = getelementptr i32* %Ptr, i64 1
+ %P1 = getelementptr i32* %Ptr, i64 %V
+ %X = load i32* %P1
+ store i32 5, i32* %P2
+
+ %Y = load i32* %P1
+
+ %Z = sub i32 %X, %Y
+ ret i32 %Z
+}
diff --git a/test/Analysis/BasicAA/2003-04-25-GEPCrash.ll b/test/Analysis/BasicAA/2003-04-25-GEPCrash.ll
new file mode 100644
index 0000000..97bc38e
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-04-25-GEPCrash.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -basicaa -aa-eval -disable-output 2>/dev/null
+; Test for a bug in BasicAA which caused a crash when querying equality of P1&P2
+define void @test([17 x i16]* %mask_bits) {
+ %P1 = getelementptr [17 x i16]* %mask_bits, i64 0, i64 0
+ %P2 = getelementptr [17 x i16]* %mask_bits, i64 252645134, i64 0
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll b/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll
new file mode 100644
index 0000000..d439dfc
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -licm -disable-output
+ %struct..apr_array_header_t = type { i32*, i32, i32, i32, i8* }
+ %struct..apr_table_t = type { %struct..apr_array_header_t, i32, [32 x i32], [32 x i32] }
+
+define void @table_reindex(%struct..apr_table_t* %t.1) { ; No predecessors!
+ br label %loopentry
+
+loopentry: ; preds = %0, %no_exit
+ %tmp.101 = getelementptr %struct..apr_table_t* %t.1, i64 0, i32 0, i32 2
+ %tmp.11 = load i32* %tmp.101 ; <i32> [#uses=0]
+ br i1 false, label %no_exit, label %UnifiedExitNode
+
+no_exit: ; preds = %loopentry
+ %tmp.25 = sext i32 0 to i64 ; <i64> [#uses=1]
+ %tmp.261 = getelementptr %struct..apr_table_t* %t.1, i64 0, i32 3, i64 %tmp.25 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp.261
+ br label %loopentry
+
+UnifiedExitNode: ; preds = %loopentry
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2003-06-01-AliasCrash.ll b/test/Analysis/BasicAA/2003-06-01-AliasCrash.ll
new file mode 100644
index 0000000..0abd384
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-06-01-AliasCrash.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -basicaa -aa-eval -disable-output 2>/dev/null
+
+define i32 @MTConcat([3 x i32]* %a.1) {
+ %tmp.961 = getelementptr [3 x i32]* %a.1, i64 0, i64 4
+ %tmp.97 = load i32* %tmp.961
+ %tmp.119 = getelementptr [3 x i32]* %a.1, i64 1, i64 0
+ %tmp.120 = load i32* %tmp.119
+ %tmp.1541 = getelementptr [3 x i32]* %a.1, i64 0, i64 4
+ %tmp.155 = load i32* %tmp.1541
+ ret i32 0
+}
diff --git a/test/Analysis/BasicAA/2003-07-03-BasicAACrash.ll b/test/Analysis/BasicAA/2003-07-03-BasicAACrash.ll
new file mode 100644
index 0000000..3e813fa
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-07-03-BasicAACrash.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -basicaa -aa-eval -disable-output 2>/dev/null
+
+%struct..RefPoint = type { i32, { i32, i8, i8 } }
+%struct..RefRect = type { %struct..RefPoint, %struct..RefPoint }
+
+define i32 @BMT_CommitPartDrawObj() {
+ %tmp.19111 = getelementptr %struct..RefRect* null, i64 0, i32 0, i32 1, i32 2
+ %tmp.20311 = getelementptr %struct..RefRect* null, i64 0, i32 1, i32 1, i32 2
+ ret i32 0
+}
diff --git a/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll b/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll
new file mode 100644
index 0000000..637d8f0
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll
@@ -0,0 +1,12 @@
+; In this test, a local alloca cannot alias an incoming argument.
+
+; RUN: opt < %s -gvn -instcombine -S | not grep sub
+
+define i32 @test(i32* %P) {
+ %X = alloca i32
+ %V1 = load i32* %P
+ store i32 0, i32* %X
+ %V2 = load i32* %P
+ %Diff = sub i32 %V1, %V2
+ ret i32 %Diff
+}
diff --git a/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll b/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll
new file mode 100644
index 0000000..911f78c
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll
@@ -0,0 +1,16 @@
+; This testcase consists of alias relations which should be completely
+; resolvable by basicaa.
+
+; RUN: opt < %s -aa-eval -print-may-aliases -disable-output \
+; RUN: |& not grep May:
+
+%T = type { i32, [10 x i8] }
+
+define void @test(%T* %P) {
+ %A = getelementptr %T* %P, i64 0
+ %B = getelementptr %T* %P, i64 0, i32 0
+ %C = getelementptr %T* %P, i64 0, i32 1
+ %D = getelementptr %T* %P, i64 0, i32 1, i64 0
+ %E = getelementptr %T* %P, i64 0, i32 1, i64 5
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll b/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll
new file mode 100644
index 0000000..8166b97
--- /dev/null
+++ b/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll
@@ -0,0 +1,18 @@
+; This testcase consists of alias relations which should be completely
+; resolvable by basicaa, but require analysis of getelementptr constant exprs.
+
+; RUN: opt < %s -aa-eval -print-may-aliases -disable-output \
+; RUN: |& not grep May:
+
+%T = type { i32, [10 x i8] }
+
+@G = external global %T
+
+define void @test() {
+ %D = getelementptr %T* @G, i64 0, i32 0
+ %E = getelementptr %T* @G, i64 0, i32 1, i64 5
+ %F = getelementptr i32* getelementptr (%T* @G, i64 0, i32 0), i64 0
+ %X = getelementptr [10 x i8]* getelementptr (%T* @G, i64 0, i32 1), i64 0, i64 5
+
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll b/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll
new file mode 100644
index 0000000..e1cfd03
--- /dev/null
+++ b/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -dse -S | grep {store i32 0}
+
+define void @test({i32,i32 }* %P) {
+ %Q = getelementptr {i32,i32}* %P, i32 1
+ %X = getelementptr {i32,i32}* %Q, i32 0, i32 1
+ %Y = getelementptr {i32,i32}* %Q, i32 1, i32 1
+ store i32 0, i32* %X
+ store i32 1, i32* %Y
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll b/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll
new file mode 100644
index 0000000..81248db
--- /dev/null
+++ b/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -licm
+
+%"java/lang/Object" = type { %struct.llvm_java_object_base }
+%"java/lang/StringBuffer" = type { "java/lang/Object", i32, { "java/lang/Object", i32, [0 x i8] }*, i1 }
+%struct.llvm_java_object_base = type opaque
+
+define void @"java/lang/StringBuffer/setLength(I)V"(%struct.llvm_java_object_base*) {
+bc0:
+ br i1 false, label %bc40, label %bc65
+
+bc65: ; preds = %bc0, %bc40
+ ret void
+
+bc40: ; preds = %bc0, %bc40
+ %tmp75 = bitcast %struct.llvm_java_object_base* %0 to %"java/lang/StringBuffer"* ; <"java/lang/StringBuffer"*> [#uses=1]
+ %tmp76 = getelementptr %"java/lang/StringBuffer"* %tmp75, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp76
+ %tmp381 = bitcast %struct.llvm_java_object_base* %0 to %"java/lang/StringBuffer"* ; <"java/lang/StringBuffer"*> [#uses=1]
+ %tmp392 = getelementptr %"java/lang/StringBuffer"* %tmp381, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp403 = load i32* %tmp392 ; <i32> [#uses=0]
+ br i1 false, label %bc40, label %bc65
+}
diff --git a/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll b/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll
new file mode 100644
index 0000000..0e03db3
--- /dev/null
+++ b/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -dse
+
+%"java/lang/Object" = type { %struct.llvm_java_object_base }
+%"java/lang/StringBuffer" = type { "java/lang/Object", i32, { "java/lang/Object", i32, [0 x i8] }*, i1 }
+%struct.llvm_java_object_base = type opaque
+
+define void @"java/lang/StringBuffer/ensureCapacity_unsynchronized(I)V"() {
+bc0:
+ %tmp = getelementptr %"java/lang/StringBuffer"* null, i32 0, i32 3 ; <i1*> [#uses=1]
+ br i1 false, label %bc16, label %bc7
+
+bc16: ; preds = %bc0
+ %tmp91 = getelementptr %"java/lang/StringBuffer"* null, i32 0, i32 2 ; <{ "java/lang/Object", i32, [0 x i8] }**> [#uses=1]
+ store { %"java/lang/Object", i32, [0 x i8] }* null, { %"java/lang/Object", i32, [0 x i8] }** %tmp91
+ store i1 false, i1* %tmp
+ ret void
+
+bc7: ; preds = %bc0
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2005-03-09-BrokenBasicAA.ll b/test/Analysis/BasicAA/2005-03-09-BrokenBasicAA.ll
new file mode 100644
index 0000000..4564263
--- /dev/null
+++ b/test/Analysis/BasicAA/2005-03-09-BrokenBasicAA.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -basicaa -gvn -instcombine |\
+; RUN: llvm-dis | grep {load i32\\* %A}
+
+declare double* @useit(i32*)
+
+define i32 @foo(i32 %Amt) {
+ %A = malloc i32, i32 %Amt
+ %P = call double* @useit(i32* %A)
+
+ %X = load i32* %A
+ store double 0.0, double* %P
+ %Y = load i32* %A
+ %Z = sub i32 %X, %Y
+ ret i32 %Z
+}
diff --git a/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll b/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll
new file mode 100644
index 0000000..49327ac
--- /dev/null
+++ b/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -aa-eval -disable-output |& grep {2 no alias respon}
+; TEST that A[1][0] may alias A[0][i].
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+define void @test(i32 %N) {
+entry:
+ %X = alloca [3 x [3 x i32]] ; <[3 x [3 x i32]]*> [#uses=4]
+ %tmp.24 = icmp sgt i32 %N, 0 ; <i1> [#uses=1]
+ br i1 %tmp.24, label %no_exit, label %loopexit
+
+no_exit: ; preds = %no_exit, %entry
+ %i.0.0 = phi i32 [ 0, %entry ], [ %inc, %no_exit ] ; <i32> [#uses=2]
+ %tmp.6 = getelementptr [3 x [3 x i32]]* %X, i32 0, i32 0, i32 %i.0.0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp.6
+ %tmp.8 = getelementptr [3 x [3 x i32]]* %X, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp.9 = load i32* %tmp.8 ; <i32> [#uses=1]
+ %tmp.11 = getelementptr [3 x [3 x i32]]* %X, i32 0, i32 1, i32 0 ; <i32*> [#uses=1]
+ %tmp.12 = load i32* %tmp.11 ; <i32> [#uses=1]
+ %tmp.13 = add i32 %tmp.12, %tmp.9 ; <i32> [#uses=1]
+ %inc = add i32 %i.0.0, 1 ; <i32> [#uses=2]
+ %tmp.2 = icmp slt i32 %inc, %N ; <i1> [#uses=1]
+ br i1 %tmp.2, label %no_exit, label %loopexit
+
+loopexit: ; preds = %no_exit, %entry
+ %Y.0.1 = phi i32 [ 0, %entry ], [ %tmp.13, %no_exit ] ; <i32> [#uses=1]
+ %tmp.4 = getelementptr [3 x [3 x i32]]* %X, i32 0, i32 0 ; <[3 x i32]*> [#uses=1]
+ %tmp.15 = call i32 (...)* @foo( [3 x i32]* %tmp.4, i32 %Y.0.1 ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @foo(...)
diff --git a/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll b/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll
new file mode 100644
index 0000000..85f53a6
--- /dev/null
+++ b/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll
@@ -0,0 +1,48 @@
+; RUN: opt < %s -licm -disable-output
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.7.0"
+
+define void @glgRunProcessor() {
+entry:
+ br i1 false, label %bb2037.i, label %cond_true.i18
+
+cond_true.i18: ; preds = %entry
+ ret void
+
+bb205.i: ; preds = %bb2037.i
+ switch i32 0, label %bb1013.i [
+ i32 14, label %bb239.i
+ i32 15, label %bb917.i
+ ]
+
+bb239.i: ; preds = %bb205.i
+ br i1 false, label %cond_false277.i, label %cond_true264.i
+
+cond_true264.i: ; preds = %bb239.i
+ ret void
+
+cond_false277.i: ; preds = %bb239.i
+ %tmp1062.i = getelementptr [2 x <4 x i32>]* null, i32 0, i32 1 ; <<4 x i32>*> [#uses=1]
+ store <4 x i32> zeroinitializer, <4 x i32>* %tmp1062.i
+ br i1 false, label %cond_true1032.i, label %cond_false1063.i85
+
+bb917.i: ; preds = %bb205.i
+ ret void
+
+bb1013.i: ; preds = %bb205.i
+ ret void
+
+cond_true1032.i: ; preds = %cond_false277.i
+ %tmp1187.i = getelementptr [2 x <4 x i32>]* null, i32 0, i32 0, i32 7 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp1187.i
+ br label %bb2037.i
+
+cond_false1063.i85: ; preds = %cond_false277.i
+ ret void
+
+bb2037.i: ; preds = %cond_true1032.i, %entry
+ br i1 false, label %bb205.i, label %cond_next2042.i
+
+cond_next2042.i: ; preds = %bb2037.i
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2007-01-13-BasePointerBadNoAlias.ll b/test/Analysis/BasicAA/2007-01-13-BasePointerBadNoAlias.ll
new file mode 100644
index 0000000..917bf25
--- /dev/null
+++ b/test/Analysis/BasicAA/2007-01-13-BasePointerBadNoAlias.ll
@@ -0,0 +1,35 @@
+; PR1109
+; RUN: opt < %s -basicaa -gvn -instcombine -S | \
+; RUN: grep {sub i32}
+; RUN: opt < %s -basicaa -gvn -instcombine -S | \
+; RUN: not grep {ret i32 0}
+; END.
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8"
+ %struct.CONSTRAINT = type { i32, i32, i32, i32 }
+ %struct.FILE_POS = type { i8, i8, i16, i32 }
+ %struct.FIRST_UNION = type { %struct.FILE_POS }
+ %struct.FOURTH_UNION = type { %struct.CONSTRAINT }
+ %struct.GAP = type { i8, i8, i16 }
+ %struct.LIST = type { %struct.rec*, %struct.rec* }
+ %struct.SECOND_UNION = type { { i16, i8, i8 } }
+ %struct.STYLE = type { { %struct.GAP }, { %struct.GAP }, i16, i16, i16, i8, i8 }
+ %struct.THIRD_UNION = type { { [2 x i32], [2 x i32] } }
+ %struct.closure_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, { %struct.rec* } }
+ %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, { %struct.rec* }, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+ %struct.rec = type { %struct.head_type }
+
+
+define i32 @test(%struct.closure_type* %tmp18169) {
+ %tmp18174 = getelementptr %struct.closure_type* %tmp18169, i32 0, i32 4, i32 0, i32 0 ; <i32*> [#uses=2]
+ %tmp18269 = bitcast i32* %tmp18174 to %struct.STYLE* ; <%struct.STYLE*> [#uses=1]
+ %A = load i32* %tmp18174 ; <i32> [#uses=1]
+
+ %tmp18272 = getelementptr %struct.STYLE* %tmp18269, i32 0, i32 0, i32 0, i32 2 ; <i16*> [#uses=1]
+ store i16 123, i16* %tmp18272
+
+ %Q = load i32* %tmp18174 ; <i32> [#uses=1]
+ %Z = sub i32 %A, %Q ; <i32> [#uses=1]
+ ret i32 %Z
+}
diff --git a/test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll b/test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll
new file mode 100644
index 0000000..e6a26e3
--- /dev/null
+++ b/test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %., i32\\* %.} | grep {%x} | grep {%y}
+
+declare i32* @unclear(i32* %a)
+
+define void @foo(i32* noalias %x) {
+ %y = call i32* @unclear(i32* %x)
+ store i32 0, i32* %x
+ store i32 0, i32* %y
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll b/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll
new file mode 100644
index 0000000..7f33fa4
--- /dev/null
+++ b/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {9 no alias}
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {6 may alias}
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %Ipointer, i32\\* %Jpointer}
+
+define void @foo(i32* noalias %p, i32* noalias %q, i32 %i, i32 %j) {
+ %Ipointer = getelementptr i32* %p, i32 %i
+ %qi = getelementptr i32* %q, i32 %i
+ %Jpointer = getelementptr i32* %p, i32 %j
+ %qj = getelementptr i32* %q, i32 %j
+ store i32 0, i32* %p
+ store i32 0, i32* %Ipointer
+ store i32 0, i32* %Jpointer
+ store i32 0, i32* %q
+ store i32 0, i32* %qi
+ store i32 0, i32* %qj
+ ret void
+}
diff --git a/test/Analysis/BasicAA/2007-08-05-GetOverloadedModRef.ll b/test/Analysis/BasicAA/2007-08-05-GetOverloadedModRef.ll
new file mode 100644
index 0000000..035299e
--- /dev/null
+++ b/test/Analysis/BasicAA/2007-08-05-GetOverloadedModRef.ll
@@ -0,0 +1,17 @@
+; PR1600
+; RUN: opt < %s -basicaa -gvn -instcombine -S | \
+; RUN: grep {ret i32 0}
+; END.
+
+declare i16 @llvm.cttz.i16(i16)
+
+define i32 @test(i32* %P, i16* %Q) {
+ %A = load i16* %Q ; <i16> [#uses=1]
+ %x = load i32* %P ; <i32> [#uses=1]
+ %B = call i16 @llvm.cttz.i16( i16 %A ) ; <i16> [#uses=1]
+ %y = load i32* %P ; <i32> [#uses=1]
+ store i16 %B, i16* %Q
+ %z = sub i32 %x, %y ; <i32> [#uses=1]
+ ret i32 %z
+}
+
diff --git a/test/Analysis/BasicAA/2007-10-24-ArgumentsGlobals.ll b/test/Analysis/BasicAA/2007-10-24-ArgumentsGlobals.ll
new file mode 100644
index 0000000..78f24b5
--- /dev/null
+++ b/test/Analysis/BasicAA/2007-10-24-ArgumentsGlobals.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -basicaa -gvn -dce -S | grep tmp7
+
+ %struct.A = type { i32 }
+ %struct.B = type { %struct.A }
+@a = global %struct.B zeroinitializer ; <%struct.B*> [#uses=2]
+
+define i32 @_Z3fooP1A(%struct.A* %b) {
+entry:
+ store i32 1, i32* getelementptr (%struct.B* @a, i32 0, i32 0, i32 0), align 8
+ %tmp4 = getelementptr %struct.A* %b, i32 0, i32 0 ;<i32*> [#uses=1]
+ store i32 0, i32* %tmp4, align 4
+ %tmp7 = load i32* getelementptr (%struct.B* @a, i32 0, i32 0, i32 0), align 8 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
diff --git a/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll b/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll
new file mode 100644
index 0000000..f699ba2
--- /dev/null
+++ b/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -gvn -disable-output
+; PR1774
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.device = type { [20 x i8] }
+ %struct.pci_device_id = type { i32, i32, i32, i32, i32, i32, i64 }
+ %struct.usb_bus = type { %struct.device* }
+ %struct.usb_hcd = type { %struct.usb_bus, i64, [0 x i64] }
+@uhci_pci_ids = external constant [1 x %struct.pci_device_id] ; <[1 x %struct.pci_device_id]*> [#uses=1]
+
+@__mod_pci_device_table = alias [1 x %struct.pci_device_id]* @uhci_pci_ids
+ ; <[1 x %struct.pci_device_id]*> [#uses=0]
+
+define i32 @uhci_suspend(%struct.usb_hcd* %hcd) {
+entry:
+ %tmp17 = getelementptr %struct.usb_hcd* %hcd, i32 0, i32 2, i64 1
+ ; <i64*> [#uses=1]
+ %tmp1718 = bitcast i64* %tmp17 to i32* ; <i32*> [#uses=1]
+ %tmp19 = load i32* %tmp1718, align 4 ; <i32> [#uses=0]
+ br i1 false, label %cond_true34, label %done_okay
+
+cond_true34: ; preds = %entry
+ %tmp631 = getelementptr %struct.usb_hcd* %hcd, i32 0, i32 2, i64
+2305843009213693950 ; <i64*> [#uses=1]
+ %tmp70 = bitcast i64* %tmp631 to %struct.device**
+
+ %tmp71 = load %struct.device** %tmp70, align 8
+
+ ret i32 undef
+
+done_okay: ; preds = %entry
+ ret i32 undef
+}
diff --git a/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll b/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll
new file mode 100644
index 0000000..8028afb
--- /dev/null
+++ b/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -gvn -disable-output
+; PR1782
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.device = type { [20 x i8] }
+ %struct.pci_device_id = type { i32, i32, i32, i32, i32, i32, i64 }
+ %struct.usb_bus = type { %struct.device* }
+ %struct.usb_hcd = type { %struct.usb_bus, [0 x i64] }
+@pci_ids = external constant [1 x %struct.pci_device_id] ; <[1 x %struct.pci_device_id]*> [#uses=1]
+
+@__mod_pci_device_table = alias [1 x %struct.pci_device_id]* @pci_ids ; <[1 x %struct.pci_device_id]*> [#uses=0]
+
+define i32 @ehci_pci_setup(%struct.usb_hcd* %hcd) {
+entry:
+ %tmp14 = getelementptr %struct.usb_hcd* %hcd, i32 0, i32 0, i32 0 ; <%struct.device**> [#uses=1]
+ %tmp15 = load %struct.device** %tmp14, align 8 ; <%struct.device*> [#uses=0]
+ br i1 false, label %bb25, label %return
+
+bb25: ; preds = %entry
+ br i1 false, label %cond_true, label %return
+
+cond_true: ; preds = %bb25
+ %tmp601 = getelementptr %struct.usb_hcd* %hcd, i32 0, i32 1, i64 2305843009213693951 ; <i64*> [#uses=1]
+ %tmp67 = bitcast i64* %tmp601 to %struct.device** ; <%struct.device**> [#uses=1]
+ %tmp68 = load %struct.device** %tmp67, align 8 ; <%struct.device*> [#uses=0]
+ ret i32 undef
+
+return: ; preds = %bb25, %entry
+ ret i32 undef
+}
diff --git a/test/Analysis/BasicAA/2008-04-15-Byval.ll b/test/Analysis/BasicAA/2008-04-15-Byval.ll
new file mode 100644
index 0000000..2069401
--- /dev/null
+++ b/test/Analysis/BasicAA/2008-04-15-Byval.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -std-compile-opts -S | grep store
+; ModuleID = 'small2.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+ %struct.x = type { [4 x i32] }
+
+define void @foo(%struct.x* byval align 4 %X) nounwind {
+entry:
+ %tmp = getelementptr %struct.x* %X, i32 0, i32 0 ; <[4 x i32]*> [#uses=1]
+ %tmp1 = getelementptr [4 x i32]* %tmp, i32 0, i32 3 ; <i32*> [#uses=1]
+ store i32 2, i32* %tmp1, align 4
+ %tmp2 = call i32 (...)* @bar( %struct.x* byval align 4 %X ) nounwind ; <i32> [#uses=0]
+ br label %return
+return: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll b/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll
new file mode 100644
index 0000000..ba29f3a
--- /dev/null
+++ b/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -gvn -disable-output
+; PR2395
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.S291 = type <{ %union.anon, i32 }>
+ %union.anon = type { }
+@a291 = external global [5 x %struct.S291] ; <[5 x %struct.S291]*> [#uses=2]
+
+define void @test291() nounwind {
+entry:
+ store i32 1138410269, i32* getelementptr ([5 x %struct.S291]* @a291, i32 0, i32 2, i32 1)
+ %tmp54 = load i32* bitcast (%struct.S291* getelementptr ([5 x %struct.S291]* @a291, i32 0, i32 2) to i32*), align 4 ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll b/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll
new file mode 100644
index 0000000..06018cc
--- /dev/null
+++ b/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -aa-eval |& grep {1 no alias response}
+
+declare noalias i32* @_Znwj(i32 %x) nounwind
+
+define i32 @foo() {
+ %A = call i32* @_Znwj(i32 4)
+ %B = call i32* @_Znwj(i32 4)
+ store i32 1, i32* %A
+ store i32 2, i32* %B
+ %C = load i32* %A
+ ret i32 %C
+}
diff --git a/test/Analysis/BasicAA/2009-03-04-GEPNoalias.ll b/test/Analysis/BasicAA/2009-03-04-GEPNoalias.ll
new file mode 100644
index 0000000..3ab5d03
--- /dev/null
+++ b/test/Analysis/BasicAA/2009-03-04-GEPNoalias.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -basicaa -gvn -S | grep load
+
+declare noalias i32* @noalias()
+
+define i32 @test(i32 %x) {
+ %a = call i32* @noalias()
+ store i32 1, i32* %a
+ %b = getelementptr i32* %a, i32 %x
+ store i32 2, i32* %b
+
+ %c = load i32* %a
+ ret i32 %c
+}
diff --git a/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll b/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll
new file mode 100644
index 0000000..6475471
--- /dev/null
+++ b/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll
@@ -0,0 +1,17 @@
+; RUN: opt -gvn -instcombine -S < %s | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8)
+
+define i8 @foo(i8* %ptr) {
+ %P = getelementptr i8* %ptr, i32 0
+ %Q = getelementptr i8* %ptr, i32 1
+; CHECK: getelementptr
+ %X = load i8* %P
+ %Y = call i8 @llvm.atomic.load.add.i8.p0i8(i8* %Q, i8 1)
+ %Z = load i8* %P
+; CHECK-NOT: = load
+ %A = sub i8 %X, %Z
+ ret i8 %A
+; CHECK: ret i8 0
+}
diff --git a/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll b/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll
new file mode 100644
index 0000000..771636f
--- /dev/null
+++ b/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output |& grep {NoAlias:.*%P,.*@Z}
+; If GEP base doesn't alias Z, then GEP doesn't alias Z.
+; rdar://7282591
+
+@Y = common global i32 0
+@Z = common global i32 0
+
+define void @foo(i32 %cond) nounwind ssp {
+entry:
+ %a = alloca i32
+ %tmp = icmp ne i32 %cond, 0
+ br i1 %tmp, label %bb, label %bb1
+
+bb:
+ %b = getelementptr i32* %a, i32 0
+ br label %bb2
+
+bb1:
+ br label %bb2
+
+bb2:
+ %P = phi i32* [ %b, %bb ], [ @Y, %bb1 ]
+ %tmp1 = load i32* @Z, align 4
+ store i32 123, i32* %P, align 4
+ %tmp2 = load i32* @Z, align 4
+ br label %return
+
+return:
+ ret void
+}
diff --git a/test/Analysis/BasicAA/byval.ll b/test/Analysis/BasicAA/byval.ll
new file mode 100644
index 0000000..cdcafdf
--- /dev/null
+++ b/test/Analysis/BasicAA/byval.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -gvn -S | grep {ret i32 1}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+ %struct.x = type { i32, i32, i32, i32 }
+@g = weak global i32 0 ; <i32*> [#uses=1]
+
+define i32 @foo(%struct.x* byval %a) nounwind {
+entry:
+ %tmp1 = tail call i32 (...)* @bar( %struct.x* %a ) nounwind ; <i32> [#uses=0]
+ %tmp2 = getelementptr %struct.x* %a, i32 0, i32 0 ; <i32*> [#uses=2]
+ store i32 1, i32* %tmp2, align 4
+ store i32 2, i32* @g, align 4
+ %tmp4 = load i32* %tmp2, align 4 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+declare i32 @bar(...)
+
diff --git a/test/Analysis/BasicAA/cas.ll b/test/Analysis/BasicAA/cas.ll
new file mode 100644
index 0000000..4ce7811
--- /dev/null
+++ b/test/Analysis/BasicAA/cas.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -basicaa -gvn -instcombine -S | grep {ret i32 0}
+
+@flag0 = internal global i32 zeroinitializer
+@turn = internal global i32 zeroinitializer
+
+
+define i32 @main() {
+ %a = load i32* @flag0
+ %b = tail call i32 @llvm.atomic.swap.i32.p0i32(i32* @turn, i32 1)
+ %c = load i32* @flag0
+ %d = sub i32 %a, %c
+ ret i32 %d
+}
+
+declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
\ No newline at end of file
diff --git a/test/Analysis/BasicAA/constant-over-index.ll b/test/Analysis/BasicAA/constant-over-index.ll
new file mode 100644
index 0000000..95f94d0
--- /dev/null
+++ b/test/Analysis/BasicAA/constant-over-index.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -aa-eval -print-all-alias-modref-info \
+; RUN: |& grep {MayAlias: double\\* \[%\]p.0.i.0, double\\* \[%\]p3\$}
+; PR4267
+
+; %p3 is equal to %p.0.i.0 on the second iteration of the loop,
+; so MayAlias is needed.
+
+define void @foo([3 x [3 x double]]* noalias %p) {
+entry:
+ %p3 = getelementptr [3 x [3 x double]]* %p, i64 0, i64 0, i64 3
+ br label %loop
+
+loop:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
+
+ %p.0.i.0 = getelementptr [3 x [3 x double]]* %p, i64 0, i64 %i, i64 0
+
+ volatile store double 0.0, double* %p3
+ volatile store double 0.1, double* %p.0.i.0
+
+ %i.next = add i64 %i, 1
+ %cmp = icmp slt i64 %i.next, 3
+ br i1 %cmp, label %loop, label %exit
+
+exit:
+ ret void
+}
diff --git a/test/Analysis/BasicAA/dg.exp b/test/Analysis/BasicAA/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Analysis/BasicAA/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Analysis/BasicAA/featuretest.ll b/test/Analysis/BasicAA/featuretest.ll
new file mode 100644
index 0000000..50dc886
--- /dev/null
+++ b/test/Analysis/BasicAA/featuretest.ll
@@ -0,0 +1,83 @@
+; This testcase tests for various features the basicaa test should be able to
+; determine, as noted in the comments.
+
+; RUN: opt < %s -basicaa -gvn -instcombine -dce -S | not grep REMOVE
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@Global = external global { i32 }
+
+; Array test: Test that operations on one local array do not invalidate
+; operations on another array. Important for scientific codes.
+;
+define i32 @different_array_test(i64 %A, i64 %B) {
+ %Array1 = alloca i32, i32 100
+ %Array2 = alloca i32, i32 200
+
+ %pointer = getelementptr i32* %Array1, i64 %A
+ %val = load i32* %pointer
+
+ %pointer2 = getelementptr i32* %Array2, i64 %B
+ store i32 7, i32* %pointer2
+
+ %REMOVE = load i32* %pointer ; redundant with above load
+ %retval = sub i32 %REMOVE, %val
+ ret i32 %retval
+}
+
+; Constant index test: Constant indexes into the same array should not
+; interfere with each other. Again, important for scientific codes.
+;
+define i32 @constant_array_index_test() {
+ %Array = alloca i32, i32 100
+ %P1 = getelementptr i32* %Array, i64 7
+ %P2 = getelementptr i32* %Array, i64 6
+
+ %A = load i32* %P1
+ store i32 1, i32* %P2 ; Should not invalidate load
+ %BREMOVE = load i32* %P1
+ %Val = sub i32 %A, %BREMOVE
+ ret i32 %Val
+}
+
+; Test that if two pointers are spaced out by a constant getelementptr, that
+; they cannot alias.
+define i32 @gep_distance_test(i32* %A) {
+ %REMOVEu = load i32* %A
+ %B = getelementptr i32* %A, i64 2 ; Cannot alias A
+ store i32 7, i32* %B
+ %REMOVEv = load i32* %A
+ %r = sub i32 %REMOVEu, %REMOVEv
+ ret i32 %r
+}
+
+; Test that if two pointers are spaced out by a constant offset, that they
+; cannot alias, even if there is a variable offset between them...
+define i32 @gep_distance_test2({i32,i32}* %A, i64 %distance) {
+ %A1 = getelementptr {i32,i32}* %A, i64 0, i32 0
+ %REMOVEu = load i32* %A1
+ %B = getelementptr {i32,i32}* %A, i64 %distance, i32 1
+ store i32 7, i32* %B ; B cannot alias A, it's at least 4 bytes away
+ %REMOVEv = load i32* %A1
+ %r = sub i32 %REMOVEu, %REMOVEv
+ ret i32 %r
+}
+
+; Test that we can do funny pointer things and that distance calc will still
+; work.
+define i32 @gep_distance_test3(i32 * %A) {
+ %X = load i32* %A
+ %B = bitcast i32* %A to i8*
+ %C = getelementptr i8* %B, i64 4
+ %Y = load i8* %C
+ ret i32 8
+}
+
+; Test that we can disambiguate globals reached through constantexpr geps
+define i32 @constexpr_test() {
+ %X = alloca i32
+ %Y = load i32* %X
+ store i32 5, i32* getelementptr ({ i32 }* @Global, i64 0, i32 0)
+ %REMOVE = load i32* %X
+ %retval = sub i32 %Y, %REMOVE
+ ret i32 %retval
+}
diff --git a/test/Analysis/BasicAA/gcsetest.ll b/test/Analysis/BasicAA/gcsetest.ll
new file mode 100644
index 0000000..a903362
--- /dev/null
+++ b/test/Analysis/BasicAA/gcsetest.ll
@@ -0,0 +1,46 @@
+; Test that GCSE uses basicaa to do alias analysis, which is capable of
+; disambiguating some obvious cases. All loads should be removable in
+; this testcase.
+
+; RUN: opt < %s -basicaa -gvn -instcombine -dce -S \
+; RUN: | not grep load
+
+@A = global i32 7
+@B = global i32 8
+
+define i32 @test() {
+ %A1 = load i32* @A
+
+ store i32 123, i32* @B ; Store cannot alias @A
+
+ %A2 = load i32* @A
+ %X = sub i32 %A1, %A2
+ ret i32 %X
+}
+
+define i32 @test2() {
+ %A1 = load i32* @A
+ br label %Loop
+Loop:
+ %AP = phi i32 [0, %0], [%X, %Loop]
+ store i32 %AP, i32* @B ; Store cannot alias @A
+
+ %A2 = load i32* @A
+ %X = sub i32 %A1, %A2
+ %c = icmp eq i32 %X, 0
+ br i1 %c, label %out, label %Loop
+
+out:
+ ret i32 %X
+}
+
+declare void @external()
+
+define i32 @test3() {
+ %X = alloca i32
+ store i32 7, i32* %X
+ call void @external()
+ %V = load i32* %X
+ ret i32 %V
+}
+
diff --git a/test/Analysis/BasicAA/gep-alias.ll b/test/Analysis/BasicAA/gep-alias.ll
new file mode 100644
index 0000000..1ed0312
--- /dev/null
+++ b/test/Analysis/BasicAA/gep-alias.ll
@@ -0,0 +1,171 @@
+; RUN: opt < %s -gvn -instcombine -S |& FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+; Make sure that basicaa thinks R and r are must aliases.
+define i32 @test1(i8 * %P) {
+entry:
+ %Q = bitcast i8* %P to {i32, i32}*
+ %R = getelementptr {i32, i32}* %Q, i32 0, i32 1
+ %S = load i32* %R
+
+ %q = bitcast i8* %P to {i32, i32}*
+ %r = getelementptr {i32, i32}* %q, i32 0, i32 1
+ %s = load i32* %r
+
+ %t = sub i32 %S, %s
+ ret i32 %t
+; CHECK: @test1
+; CHECK: ret i32 0
+}
+
+define i32 @test2(i8 * %P) {
+entry:
+ %Q = bitcast i8* %P to {i32, i32, i32}*
+ %R = getelementptr {i32, i32, i32}* %Q, i32 0, i32 1
+ %S = load i32* %R
+
+ %r = getelementptr {i32, i32, i32}* %Q, i32 0, i32 2
+ store i32 42, i32* %r
+
+ %s = load i32* %R
+
+ %t = sub i32 %S, %s
+ ret i32 %t
+; CHECK: @test2
+; CHECK: ret i32 0
+}
+
+
+; This was a miscompilation.
+define i32 @test3({float, {i32, i32, i32}}* %P) {
+entry:
+ %P2 = getelementptr {float, {i32, i32, i32}}* %P, i32 0, i32 1
+ %R = getelementptr {i32, i32, i32}* %P2, i32 0, i32 1
+ %S = load i32* %R
+
+ %r = getelementptr {i32, i32, i32}* %P2, i32 0, i32 2
+ store i32 42, i32* %r
+
+ %s = load i32* %R
+
+ %t = sub i32 %S, %s
+ ret i32 %t
+; CHECK: @test3
+; CHECK: ret i32 0
+}
+
+
+;; This is reduced from the SmallPtrSet constructor.
+%SmallPtrSetImpl = type { i8**, i32, i32, i32, [1 x i8*] }
+%SmallPtrSet64 = type { %SmallPtrSetImpl, [64 x i8*] }
+
+define i32 @test4(%SmallPtrSet64* %P) {
+entry:
+ %tmp2 = getelementptr inbounds %SmallPtrSet64* %P, i64 0, i32 0, i32 1
+ store i32 64, i32* %tmp2, align 8
+ %tmp3 = getelementptr inbounds %SmallPtrSet64* %P, i64 0, i32 0, i32 4, i64 64
+ store i8* null, i8** %tmp3, align 8
+ %tmp4 = load i32* %tmp2, align 8
+ ret i32 %tmp4
+; CHECK: @test4
+; CHECK: ret i32 64
+}
+
+; P[i] != p[i+1]
+define i32 @test5(i32* %p, i64 %i) {
+ %pi = getelementptr i32* %p, i64 %i
+ %i.next = add i64 %i, 1
+ %pi.next = getelementptr i32* %p, i64 %i.next
+ %x = load i32* %pi
+ store i32 42, i32* %pi.next
+ %y = load i32* %pi
+ %z = sub i32 %x, %y
+ ret i32 %z
+; CHECK: @test5
+; CHECK: ret i32 0
+}
+
+; P[i] != p[(i*4)|1]
+define i32 @test6(i32* %p, i64 %i1) {
+ %i = shl i64 %i1, 2
+ %pi = getelementptr i32* %p, i64 %i
+ %i.next = or i64 %i, 1
+ %pi.next = getelementptr i32* %p, i64 %i.next
+ %x = load i32* %pi
+ store i32 42, i32* %pi.next
+ %y = load i32* %pi
+ %z = sub i32 %x, %y
+ ret i32 %z
+; CHECK: @test6
+; CHECK: ret i32 0
+}
+
+; P[1] != P[i*4]
+define i32 @test7(i32* %p, i64 %i) {
+ %pi = getelementptr i32* %p, i64 1
+ %i.next = shl i64 %i, 2
+ %pi.next = getelementptr i32* %p, i64 %i.next
+ %x = load i32* %pi
+ store i32 42, i32* %pi.next
+ %y = load i32* %pi
+ %z = sub i32 %x, %y
+ ret i32 %z
+; CHECK: @test7
+; CHECK: ret i32 0
+}
+
+; P[zext(i)] != p[zext(i+1)]
+; PR1143
+define i32 @test8(i32* %p, i32 %i) {
+ %i1 = zext i32 %i to i64
+ %pi = getelementptr i32* %p, i64 %i1
+ %i.next = add i32 %i, 1
+ %i.next2 = zext i32 %i.next to i64
+ %pi.next = getelementptr i32* %p, i64 %i.next2
+ %x = load i32* %pi
+ store i32 42, i32* %pi.next
+ %y = load i32* %pi
+ %z = sub i32 %x, %y
+ ret i32 %z
+; CHECK: @test8
+; CHECK: ret i32 0
+}
+
+define i8 @test9([4 x i8] *%P, i32 %i, i32 %j) {
+ %i2 = shl i32 %i, 2
+ %i3 = add i32 %i2, 1
+ ; P2 = P + 1 + 4*i
+ %P2 = getelementptr [4 x i8] *%P, i32 0, i32 %i3
+
+ %j2 = shl i32 %j, 2
+
+ ; P4 = P + 4*j
+ %P4 = getelementptr [4 x i8]* %P, i32 0, i32 %j2
+
+ %x = load i8* %P2
+ store i8 42, i8* %P4
+ %y = load i8* %P2
+ %z = sub i8 %x, %y
+ ret i8 %z
+; CHECK: @test9
+; CHECK: ret i8 0
+}
+
+define i8 @test10([4 x i8] *%P, i32 %i) {
+ %i2 = shl i32 %i, 2
+ %i3 = add i32 %i2, 4
+ ; P2 = P + 4 + 4*i
+ %P2 = getelementptr [4 x i8] *%P, i32 0, i32 %i3
+
+ ; P4 = P + 4*i
+ %P4 = getelementptr [4 x i8]* %P, i32 0, i32 %i2
+
+ %x = load i8* %P2
+ store i8 42, i8* %P4
+ %y = load i8* %P2
+ %z = sub i8 %x, %y
+ ret i8 %z
+; CHECK: @test10
+; CHECK: ret i8 0
+}
diff --git a/test/Analysis/BasicAA/global-size.ll b/test/Analysis/BasicAA/global-size.ll
new file mode 100644
index 0000000..b9cbbcc
--- /dev/null
+++ b/test/Analysis/BasicAA/global-size.ll
@@ -0,0 +1,16 @@
+; A store or load cannot alias a global if the accessed amount is larger then
+; the global.
+
+; RUN: opt < %s -basicaa -gvn -instcombine -S | not grep load
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@B = global i16 8 ; <i16*> [#uses=2]
+
+define i16 @test(i32* %P) {
+ %X = load i16* @B ; <i16> [#uses=1]
+ store i32 7, i32* %P
+ %Y = load i16* @B ; <i16> [#uses=1]
+ %Z = sub i16 %Y, %X ; <i16> [#uses=1]
+ ret i16 %Z
+}
+
diff --git a/test/Analysis/BasicAA/modref.ll b/test/Analysis/BasicAA/modref.ll
new file mode 100644
index 0000000..4a61636
--- /dev/null
+++ b/test/Analysis/BasicAA/modref.ll
@@ -0,0 +1,125 @@
+; RUN: opt < %s -basicaa -gvn -dse -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+declare void @llvm.memset.i8(i8*, i8, i8, i32)
+declare void @llvm.memcpy.i8(i8*, i8*, i8, i32)
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+declare void @llvm.lifetime.end(i64, i8* nocapture)
+
+declare void @external(i32*)
+
+define i32 @test0(i8* %P) {
+ %A = alloca i32
+ call void @external(i32* %A)
+
+ store i32 0, i32* %A
+
+ call void @llvm.memset.i32(i8* %P, i8 0, i32 42, i32 1)
+
+ %B = load i32* %A
+ ret i32 %B
+
+; CHECK: @test0
+; CHECK: ret i32 0
+}
+
+declare void @llvm.memcpy.i8(i8*, i8*, i8, i32)
+
+define i8 @test1() {
+; CHECK: @test1
+ %A = alloca i8
+ %B = alloca i8
+
+ store i8 2, i8* %B ;; Not written to by memcpy
+
+ call void @llvm.memcpy.i8(i8* %A, i8* %B, i8 -1, i32 0)
+
+ %C = load i8* %B
+ ret i8 %C
+; CHECK: ret i8 2
+}
+
+define i8 @test2(i8* %P) {
+; CHECK: @test2
+ %P2 = getelementptr i8* %P, i32 127
+ store i8 1, i8* %P2 ;; Not dead across memset
+ call void @llvm.memset.i8(i8* %P, i8 2, i8 127, i32 0)
+ %A = load i8* %P2
+ ret i8 %A
+; CHECK: ret i8 1
+}
+
+define i8 @test2a(i8* %P) {
+; CHECK: @test2
+ %P2 = getelementptr i8* %P, i32 126
+
+ ;; FIXME: DSE isn't zapping this dead store.
+ store i8 1, i8* %P2 ;; Dead, clobbered by memset.
+
+ call void @llvm.memset.i8(i8* %P, i8 2, i8 127, i32 0)
+ %A = load i8* %P2
+ ret i8 %A
+; CHECK-NOT: load
+; CHECK: ret i8 2
+}
+
+define void @test3(i8* %P, i8 %X) {
+; CHECK: @test3
+; CHECK-NOT: store
+; CHECK-NOT: %Y
+ %Y = add i8 %X, 1 ;; Dead, because the only use (the store) is dead.
+
+ %P2 = getelementptr i8* %P, i32 2
+ store i8 %Y, i8* %P2 ;; Not read by lifetime.end, should be removed.
+; CHECK: store i8 2, i8* %P2
+ call void @llvm.lifetime.end(i64 1, i8* %P)
+ store i8 2, i8* %P2
+; CHECK-NOT: store
+ ret void
+; CHECK: ret void
+}
+
+define void @test3a(i8* %P, i8 %X) {
+; CHECK: @test3a
+ %Y = add i8 %X, 1 ;; Dead, because the only use (the store) is dead.
+
+ %P2 = getelementptr i8* %P, i32 2
+ store i8 %Y, i8* %P2 ;; FIXME: Killed by llvm.lifetime.end, should be zapped.
+; CHECK: store i8 %Y, i8* %P2
+ call void @llvm.lifetime.end(i64 10, i8* %P)
+ ret void
+; CHECK: ret void
+}
+
+@G1 = external global i32
+@G2 = external global [4000 x i32]
+
+define i32 @test4(i8* %P) {
+ %tmp = load i32* @G1
+ call void @llvm.memset.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8 0, i32 4000, i32 1)
+ %tmp2 = load i32* @G1
+ %sub = sub i32 %tmp2, %tmp
+ ret i32 %sub
+; CHECK: @test4
+; CHECK: load i32* @G
+; CHECK: memset.i32
+; CHECK-NOT: load
+; CHECK: sub i32 %tmp, %tmp
+}
+
+; Verify that basicaa is handling variable length memcpy, knowing it doesn't
+; write to G1.
+define i32 @test5(i8* %P, i32 %Len) {
+ %tmp = load i32* @G1
+ call void @llvm.memcpy.i32(i8* bitcast ([4000 x i32]* @G2 to i8*), i8* bitcast (i32* @G1 to i8*), i32 %Len, i32 1)
+ %tmp2 = load i32* @G1
+ %sub = sub i32 %tmp2, %tmp
+ ret i32 %sub
+; CHECK: @test5
+; CHECK: load i32* @G
+; CHECK: memcpy.i32
+; CHECK-NOT: load
+; CHECK: sub i32 %tmp, %tmp
+}
+
diff --git a/test/Analysis/BasicAA/no-escape-call.ll b/test/Analysis/BasicAA/no-escape-call.ll
new file mode 100644
index 0000000..ccabce9
--- /dev/null
+++ b/test/Analysis/BasicAA/no-escape-call.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -basicaa -gvn -instcombine -S | grep {ret i1 true}
+; PR2436
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define i1 @foo(i32 %i) nounwind {
+entry:
+ %arr = alloca [10 x i8*] ; <[10 x i8*]*> [#uses=1]
+ %tmp2 = call i8* @getPtr( ) nounwind ; <i8*> [#uses=2]
+ %tmp4 = getelementptr [10 x i8*]* %arr, i32 0, i32 %i ; <i8**> [#uses=2]
+ store i8* %tmp2, i8** %tmp4, align 4
+ %tmp10 = getelementptr i8* %tmp2, i32 10 ; <i8*> [#uses=1]
+ store i8 42, i8* %tmp10, align 1
+ %tmp14 = load i8** %tmp4, align 4 ; <i8*> [#uses=1]
+ %tmp16 = getelementptr i8* %tmp14, i32 10 ; <i8*> [#uses=1]
+ %tmp17 = load i8* %tmp16, align 1 ; <i8> [#uses=1]
+ %tmp19 = icmp eq i8 %tmp17, 42 ; <i1> [#uses=1]
+ ret i1 %tmp19
+}
+
+declare i8* @getPtr()
+
+declare void @abort() noreturn nounwind
diff --git a/test/Analysis/BasicAA/nocapture.ll b/test/Analysis/BasicAA/nocapture.ll
new file mode 100644
index 0000000..7970fbb
--- /dev/null
+++ b/test/Analysis/BasicAA/nocapture.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -basicaa -gvn -instcombine -S | grep {ret i32 0}
+
+declare i32* @test(i32* nocapture)
+
+define i32 @test2() {
+ %P = alloca i32
+ %Q = call i32* @test(i32* %P)
+ %a = load i32* %P
+ store i32 4, i32* %Q ;; cannot clobber P since it is nocapture.
+ %b = load i32* %P
+ %c = sub i32 %a, %b
+ ret i32 %c
+}
+
diff --git a/test/Analysis/BasicAA/phi-aa.ll b/test/Analysis/BasicAA/phi-aa.ll
new file mode 100644
index 0000000..0288960
--- /dev/null
+++ b/test/Analysis/BasicAA/phi-aa.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {NoAlias:.*%P,.*@Z}
+; rdar://7282591
+
+@X = common global i32 0
+@Y = common global i32 0
+@Z = common global i32 0
+
+define void @foo(i32 %cond) nounwind ssp {
+entry:
+ %"alloca point" = bitcast i32 0 to i32
+ %tmp = icmp ne i32 %cond, 0
+ br i1 %tmp, label %bb, label %bb1
+
+bb:
+ br label %bb2
+
+bb1:
+ br label %bb2
+
+bb2:
+ %P = phi i32* [ @X, %bb ], [ @Y, %bb1 ]
+ %tmp1 = load i32* @Z, align 4
+ store i32 123, i32* %P, align 4
+ %tmp2 = load i32* @Z, align 4
+ br label %return
+
+return:
+ ret void
+}
diff --git a/test/Analysis/BasicAA/phi-and-select.ll b/test/Analysis/BasicAA/phi-and-select.ll
new file mode 100644
index 0000000..c69e824
--- /dev/null
+++ b/test/Analysis/BasicAA/phi-and-select.ll
@@ -0,0 +1,73 @@
+; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output \
+; RUN: |& grep {NoAlias: double\\* \[%\]a, double\\* \[%\]b\$} | count 4
+
+; BasicAA should detect NoAliases in PHIs and Selects.
+
+; Two PHIs in the same block.
+define void @foo(i1 %m, double* noalias %x, double* noalias %y) {
+entry:
+ br i1 %m, label %true, label %false
+
+true:
+ br label %exit
+
+false:
+ br label %exit
+
+exit:
+ %a = phi double* [ %x, %true ], [ %y, %false ]
+ %b = phi double* [ %x, %false ], [ %y, %true ]
+ volatile store double 0.0, double* %a
+ volatile store double 1.0, double* %b
+ ret void
+}
+
+; Two selects with the same condition.
+define void @bar(i1 %m, double* noalias %x, double* noalias %y) {
+entry:
+ %a = select i1 %m, double* %x, double* %y
+ %b = select i1 %m, double* %y, double* %x
+ volatile store double 0.000000e+00, double* %a
+ volatile store double 1.000000e+00, double* %b
+ ret void
+}
+
+; Two PHIs with disjoint sets of inputs.
+define void @qux(i1 %m, double* noalias %x, double* noalias %y,
+ i1 %n, double* noalias %v, double* noalias %w) {
+entry:
+ br i1 %m, label %true, label %false
+
+true:
+ br label %exit
+
+false:
+ br label %exit
+
+exit:
+ %a = phi double* [ %x, %true ], [ %y, %false ]
+ br i1 %n, label %ntrue, label %nfalse
+
+ntrue:
+ br label %nexit
+
+nfalse:
+ br label %nexit
+
+nexit:
+ %b = phi double* [ %v, %ntrue ], [ %w, %nfalse ]
+ volatile store double 0.0, double* %a
+ volatile store double 1.0, double* %b
+ ret void
+}
+
+; Two selects with disjoint sets of arms.
+define void @fin(i1 %m, double* noalias %x, double* noalias %y,
+ i1 %n, double* noalias %v, double* noalias %w) {
+entry:
+ %a = select i1 %m, double* %x, double* %y
+ %b = select i1 %n, double* %v, double* %w
+ volatile store double 0.000000e+00, double* %a
+ volatile store double 1.000000e+00, double* %b
+ ret void
+}
diff --git a/test/Analysis/BasicAA/pure-const-dce.ll b/test/Analysis/BasicAA/pure-const-dce.ll
new file mode 100644
index 0000000..54e6e79
--- /dev/null
+++ b/test/Analysis/BasicAA/pure-const-dce.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -basicaa -gvn -S | grep TestConst | count 2
+; RUN: opt < %s -basicaa -gvn -S | grep TestPure | count 3
+; RUN: opt < %s -basicaa -gvn -S | grep TestNone | count 4
+@g = global i32 0 ; <i32*> [#uses=1]
+
+define i32 @test() {
+entry:
+ %tmp0 = call i32 @TestConst( i32 5 ) readnone ; <i32> [#uses=1]
+ %tmp1 = call i32 @TestPure( i32 6 ) readonly ; <i32> [#uses=1]
+ %tmp2 = call i32 @TestNone( i32 7 ) ; <i32> [#uses=1]
+ store i32 1, i32* @g
+ %tmp3 = call i32 @TestConst( i32 5 ) readnone ; <i32> [#uses=1]
+ %tmp4 = call i32 @TestConst( i32 5 ) readnone ; <i32> [#uses=1]
+ %tmp5 = call i32 @TestPure( i32 6 ) readonly ; <i32> [#uses=1]
+ %tmp6 = call i32 @TestPure( i32 6 ) readonly ; <i32> [#uses=1]
+ %tmp7 = call i32 @TestNone( i32 7 ) ; <i32> [#uses=1]
+ %tmp8 = call i32 @TestNone( i32 7 ) ; <i32> [#uses=1]
+ %sum0 = add i32 %tmp0, %tmp1 ; <i32> [#uses=1]
+ %sum1 = add i32 %sum0, %tmp2 ; <i32> [#uses=1]
+ %sum2 = add i32 %sum1, %tmp3 ; <i32> [#uses=1]
+ %sum3 = add i32 %sum2, %tmp4 ; <i32> [#uses=1]
+ %sum4 = add i32 %sum3, %tmp5 ; <i32> [#uses=1]
+ %sum5 = add i32 %sum4, %tmp6 ; <i32> [#uses=1]
+ %sum6 = add i32 %sum5, %tmp7 ; <i32> [#uses=1]
+ %sum7 = add i32 %sum6, %tmp8 ; <i32> [#uses=1]
+ ret i32 %sum7
+}
+
+declare i32 @TestConst(i32) readnone
+
+declare i32 @TestPure(i32) readonly
+
+declare i32 @TestNone(i32)
diff --git a/test/Analysis/BasicAA/store-promote.ll b/test/Analysis/BasicAA/store-promote.ll
new file mode 100644
index 0000000..33d0f3a
--- /dev/null
+++ b/test/Analysis/BasicAA/store-promote.ll
@@ -0,0 +1,54 @@
+; Test that LICM uses basicaa to do alias analysis, which is capable of
+; disambiguating some obvious cases. If LICM is able to disambiguate the
+; two pointers, then the load should be hoisted, and the store sunk.
+
+; RUN: opt < %s -basicaa -licm -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@A = global i32 7 ; <i32*> [#uses=3]
+@B = global i32 8 ; <i32*> [#uses=2]
+@C = global [2 x i32] [ i32 4, i32 8 ] ; <[2 x i32]*> [#uses=2]
+
+define i32 @test1(i1 %c) {
+ %Atmp = load i32* @A ; <i32> [#uses=2]
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %ToRemove = load i32* @A ; <i32> [#uses=1]
+ store i32 %Atmp, i32* @B
+ br i1 %c, label %Out, label %Loop
+
+Out: ; preds = %Loop
+ %X = sub i32 %ToRemove, %Atmp ; <i32> [#uses=1]
+ ret i32 %X
+
+; The Loop block should be empty after the load/store are promoted.
+; CHECK: @test1
+; CHECK: load i32* @B
+; CHECK: Loop:
+; CHECK-NEXT: br i1 %c, label %Out, label %Loop
+; CHECK: Out:
+; CHECK: store i32 %Atmp, i32* @B
+}
+
+define i32 @test2(i1 %c) {
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %AVal = load i32* @A ; <i32> [#uses=2]
+ %C0 = getelementptr [2 x i32]* @C, i64 0, i64 0 ; <i32*> [#uses=1]
+ store i32 %AVal, i32* %C0
+ %BVal = load i32* @B ; <i32> [#uses=2]
+ %C1 = getelementptr [2 x i32]* @C, i64 0, i64 1 ; <i32*> [#uses=1]
+ store i32 %BVal, i32* %C1
+ br i1 %c, label %Out, label %Loop
+
+Out: ; preds = %Loop
+ %X = sub i32 %AVal, %BVal ; <i32> [#uses=1]
+ ret i32 %X
+; The Loop block should be empty after the load/store are promoted.
+; CHECK: @test2
+; CHECK: Loop:
+; CHECK-NEXT: br i1 %c, label %Out, label %Loop
+}
+
diff --git a/test/Analysis/BasicAA/tailcall-modref.ll b/test/Analysis/BasicAA/tailcall-modref.ll
new file mode 100644
index 0000000..f7d6c57
--- /dev/null
+++ b/test/Analysis/BasicAA/tailcall-modref.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -basicaa -gvn -instcombine |\
+; RUN: llvm-dis | grep {ret i32 0}
+
+declare void @foo(i32*)
+
+declare void @bar()
+
+define i32 @test() {
+ %A = alloca i32 ; <i32*> [#uses=3]
+ call void @foo( i32* %A )
+ %X = load i32* %A ; <i32> [#uses=1]
+ tail call void @bar( )
+ %Y = load i32* %A ; <i32> [#uses=1]
+ %Z = sub i32 %X, %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
diff --git a/test/Analysis/CallGraph/2008-09-09-DirectCall.ll b/test/Analysis/CallGraph/2008-09-09-DirectCall.ll
new file mode 100644
index 0000000..6e34209
--- /dev/null
+++ b/test/Analysis/CallGraph/2008-09-09-DirectCall.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -print-callgraph -disable-output |& \
+; RUN: grep {Calls function 'callee'} | count 2
+
+define internal void @callee(...) {
+entry:
+ unreachable
+}
+
+define void @caller() {
+entry:
+ call void (...)* @callee( void (...)* @callee )
+ unreachable
+}
diff --git a/test/Analysis/CallGraph/2008-09-09-UsedByGlobal.ll b/test/Analysis/CallGraph/2008-09-09-UsedByGlobal.ll
new file mode 100644
index 0000000..12849b7
--- /dev/null
+++ b/test/Analysis/CallGraph/2008-09-09-UsedByGlobal.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -print-callgraph -disable-output |& \
+; RUN: grep {Calls function}
+
+@a = global void ()* @f ; <void ()**> [#uses=0]
+
+define internal void @f() {
+ unreachable
+}
diff --git a/test/Analysis/CallGraph/dg.exp b/test/Analysis/CallGraph/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Analysis/CallGraph/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Analysis/Dominators/2006-10-02-BreakCritEdges.ll b/test/Analysis/Dominators/2006-10-02-BreakCritEdges.ll
new file mode 100644
index 0000000..e31f416
--- /dev/null
+++ b/test/Analysis/Dominators/2006-10-02-BreakCritEdges.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -domtree -break-crit-edges -analyze \
+; RUN: -domtree | grep {3.*%brtrue }
+; PR932
+
+declare void @use1(i32)
+
+define void @f(i32 %i, i1 %c) {
+entry:
+ %A = icmp eq i32 %i, 0 ; <i1> [#uses=1]
+ br i1 %A, label %brtrue, label %brfalse
+
+brtrue: ; preds = %brtrue, %entry
+ %B = phi i1 [ true, %brtrue ], [ false, %entry ] ; <i1> [#uses=1]
+ call void @use1( i32 %i )
+ br i1 %B, label %brtrue, label %brfalse
+
+brfalse: ; preds = %brtrue, %entry
+ call void @use1( i32 %i )
+ ret void
+}
diff --git a/test/Analysis/Dominators/2007-01-14-BreakCritEdges.ll b/test/Analysis/Dominators/2007-01-14-BreakCritEdges.ll
new file mode 100644
index 0000000..96dc739
--- /dev/null
+++ b/test/Analysis/Dominators/2007-01-14-BreakCritEdges.ll
@@ -0,0 +1,187 @@
+; RUN: opt < %s -domtree -break-crit-edges -domtree -disable-output
+; PR1110
+
+ %struct.OggVorbis_File = type { i8*, i32, i64, i64, %struct.ogg_sync_state, i32, i64*, i64*, i32*, i64*, %struct.vorbis_info*, %struct.vorbis_comment*, i64, i32, i32, i32, double, double, %struct.ogg_stream_state, %struct.vorbis_dsp_state, %struct.vorbis_block, %struct.ov_callbacks }
+ %struct.alloc_chain = type { i8*, %struct.alloc_chain* }
+ %struct.ogg_stream_state = type { i8*, i32, i32, i32, i32*, i64*, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 }
+ %struct.ogg_sync_state = type { i8*, i32, i32, i32, i32, i32, i32 }
+ %struct.oggpack_buffer = type { i32, i32, i8*, i8*, i32 }
+ %struct.ov_callbacks = type { i32 (i8*, i32, i32, i8*)*, i32 (i8*, i64, i32)*, i32 (i8*)*, i32 (i8*)* }
+ %struct.vorbis_block = type { float**, %struct.oggpack_buffer, i32, i32, i32, i32, i32, i32, i64, i64, %struct.vorbis_dsp_state*, i8*, i32, i32, i32, %struct.alloc_chain*, i32, i32, i32, i32, i8* }
+ %struct.vorbis_comment = type { i8**, i32*, i32, i8* }
+ %struct.vorbis_dsp_state = type { i32, %struct.vorbis_info*, float**, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
+ %struct.vorbis_info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
+
+
+define void @ov_read() {
+entry:
+ br i1 false, label %bb, label %return
+
+bb: ; preds = %cond_next22, %entry
+ br i1 false, label %cond_true8, label %cond_next15
+
+cond_true8: ; preds = %bb
+ br i1 false, label %cond_next15, label %bb29
+
+cond_next15: ; preds = %cond_true8, %bb
+ br i1 false, label %return, label %cond_next22
+
+cond_next22: ; preds = %cond_next15
+ br i1 false, label %bb, label %return
+
+bb29: ; preds = %cond_true8
+ br i1 false, label %cond_true32, label %return
+
+cond_true32: ; preds = %bb29
+ br i1 false, label %cond_false37.i, label %cond_true.i11
+
+cond_true.i11: ; preds = %cond_true32
+ br i1 false, label %cond_true8.i, label %ov_info.exit
+
+cond_true8.i: ; preds = %cond_true.i11
+ br i1 false, label %cond_true44, label %cond_next48
+
+cond_false37.i: ; preds = %cond_true32
+ br label %ov_info.exit
+
+ov_info.exit: ; preds = %cond_false37.i, %cond_true.i11
+ br i1 false, label %cond_true44, label %cond_next48
+
+cond_true44: ; preds = %ov_info.exit, %cond_true8.i
+ br label %cond_next48
+
+cond_next48: ; preds = %cond_true44, %ov_info.exit, %cond_true8.i
+ br i1 false, label %cond_next53, label %return
+
+cond_next53: ; preds = %cond_next48
+ br i1 false, label %cond_true56, label %cond_false97
+
+cond_true56: ; preds = %cond_next53
+ br i1 false, label %bb85, label %cond_next304
+
+bb63: ; preds = %bb85
+ br i1 false, label %cond_next78, label %cond_false73
+
+cond_false73: ; preds = %bb63
+ br i1 false, label %cond_true76, label %cond_next78
+
+cond_true76: ; preds = %cond_false73
+ br label %cond_next78
+
+cond_next78: ; preds = %cond_true76, %cond_false73, %bb63
+ br label %bb85
+
+bb85: ; preds = %bb89, %cond_next78, %cond_true56
+ br i1 false, label %bb63, label %bb89
+
+bb89: ; preds = %bb85
+ br i1 false, label %bb85, label %cond_next304
+
+cond_false97: ; preds = %cond_next53
+ br i1 false, label %cond_true108, label %bb248
+
+cond_true108: ; preds = %cond_false97
+ br i1 false, label %bb196, label %bb149
+
+bb112: ; preds = %bb149, %bb146
+ br i1 false, label %bb119, label %bb146
+
+bb119: ; preds = %cond_next134, %bb112
+ br i1 false, label %cond_next134, label %cond_false129
+
+cond_false129: ; preds = %bb119
+ br i1 false, label %cond_true132, label %cond_next134
+
+cond_true132: ; preds = %cond_false129
+ br label %cond_next134
+
+cond_next134: ; preds = %cond_true132, %cond_false129, %bb119
+ br i1 false, label %bb119, label %bb146
+
+bb146: ; preds = %cond_next134, %bb112
+ br i1 false, label %bb112, label %cond_next304
+
+bb149: ; preds = %cond_true108
+ br i1 false, label %bb112, label %cond_next304
+
+bb155: ; preds = %bb196, %bb193
+ br i1 false, label %bb165, label %bb193
+
+bb165: ; preds = %cond_next180, %bb155
+ br i1 false, label %cond_next180, label %cond_false175
+
+cond_false175: ; preds = %bb165
+ br i1 false, label %cond_true178, label %cond_next180
+
+cond_true178: ; preds = %cond_false175
+ br label %cond_next180
+
+cond_next180: ; preds = %cond_true178, %cond_false175, %bb165
+ br i1 false, label %bb165, label %bb193
+
+bb193: ; preds = %cond_next180, %bb155
+ br i1 false, label %bb155, label %cond_next304
+
+bb196: ; preds = %cond_true108
+ br i1 false, label %bb155, label %cond_next304
+
+bb207: ; preds = %bb241
+ br i1 false, label %cond_next225, label %cond_false220
+
+cond_false220: ; preds = %bb207
+ br i1 false, label %cond_true223, label %cond_next225
+
+cond_true223: ; preds = %cond_false220
+ br label %cond_next225
+
+cond_next225: ; preds = %cond_true223, %cond_false220, %bb207
+ br label %bb241
+
+bb241: ; preds = %bb248, %bb245, %cond_next225
+ br i1 false, label %bb207, label %bb245
+
+bb245: ; preds = %bb241
+ br i1 false, label %bb241, label %cond_next304
+
+bb248: ; preds = %cond_false97
+ br i1 false, label %bb241, label %cond_next304
+
+bb256: ; preds = %bb290
+ br i1 false, label %cond_next274, label %cond_false269
+
+cond_false269: ; preds = %bb256
+ br i1 false, label %cond_true272, label %cond_next274
+
+cond_true272: ; preds = %cond_false269
+ br label %cond_next274
+
+cond_next274: ; preds = %cond_true272, %cond_false269, %bb256
+ br label %bb290
+
+bb290: ; preds = %bb294, %cond_next274
+ br i1 false, label %bb256, label %bb294
+
+bb294: ; preds = %bb290
+ br i1 false, label %bb290, label %cond_next304
+
+cond_next304: ; preds = %bb294, %bb248, %bb245, %bb196, %bb193, %bb149, %bb146, %bb89, %cond_true56
+ br i1 false, label %cond_next11.i, label %cond_true.i
+
+cond_true.i: ; preds = %cond_next304
+ br i1 false, label %vorbis_synthesis_read.exit, label %cond_next11.i
+
+cond_next11.i: ; preds = %cond_true.i, %cond_next304
+ br label %vorbis_synthesis_read.exit
+
+vorbis_synthesis_read.exit: ; preds = %cond_next11.i, %cond_true.i
+ br i1 false, label %cond_next321, label %cond_true316
+
+cond_true316: ; preds = %vorbis_synthesis_read.exit
+ ret void
+
+cond_next321: ; preds = %vorbis_synthesis_read.exit
+ ret void
+
+return: ; preds = %cond_next48, %bb29, %cond_next22, %cond_next15, %entry
+ ret void
+}
diff --git a/test/Analysis/Dominators/2007-07-11-SplitBlock.ll b/test/Analysis/Dominators/2007-07-11-SplitBlock.ll
new file mode 100644
index 0000000..52fdd2b
--- /dev/null
+++ b/test/Analysis/Dominators/2007-07-11-SplitBlock.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -loop-rotate -loop-unswitch -disable-output
+
+define i32 @stringSearch_Clib(i32 %count) {
+entry:
+ br i1 false, label %bb36, label %bb44
+
+cond_true20: ; preds = %bb36
+ %tmp33 = add i32 0, 0 ; <i32> [#uses=1]
+ br label %bb36
+
+bb36: ; preds = %cond_true20, %entry
+ %c.2 = phi i32 [ %tmp33, %cond_true20 ], [ 0, %entry ] ; <i32> [#uses=1]
+ br i1 false, label %cond_true20, label %bb41
+
+bb41: ; preds = %bb36
+ %c.2.lcssa = phi i32 [ %c.2, %bb36 ] ; <i32> [#uses=0]
+ ret i32 0
+
+bb44: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/Analysis/Dominators/2007-07-12-SplitBlock.ll b/test/Analysis/Dominators/2007-07-12-SplitBlock.ll
new file mode 100644
index 0000000..b46f0c7
--- /dev/null
+++ b/test/Analysis/Dominators/2007-07-12-SplitBlock.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -loop-rotate -licm -loop-unswitch -disable-output
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ br label %bb7
+
+bb7: ; preds = %bb7, %entry
+ %tmp54 = icmp slt i32 0, 2000000 ; <i1> [#uses=1]
+ br i1 %tmp54, label %bb7, label %bb56
+
+bb56: ; preds = %bb7
+ ret i32 0
+}
diff --git a/test/Analysis/Dominators/dg.exp b/test/Analysis/Dominators/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Analysis/Dominators/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Analysis/GlobalsModRef/2008-09-03-ReadGlobals.ll b/test/Analysis/GlobalsModRef/2008-09-03-ReadGlobals.ll
new file mode 100644
index 0000000..17ace8a
--- /dev/null
+++ b/test/Analysis/GlobalsModRef/2008-09-03-ReadGlobals.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -globalsmodref-aa -gvn -S | grep call | count 2
+
+@g = internal global i32 0 ; <i32*> [#uses=2]
+
+define i32 @r() {
+ %tmp = load i32* @g ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @f() {
+entry:
+ %tmp = call i32 @e( ) ; <i32> [#uses=1]
+ store i32 %tmp, i32* @g
+ %tmp2 = call i32 @e( ) ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+declare i32 @e() readonly ; might call @r
diff --git a/test/Analysis/GlobalsModRef/aliastest.ll b/test/Analysis/GlobalsModRef/aliastest.ll
new file mode 100644
index 0000000..3e5d119
--- /dev/null
+++ b/test/Analysis/GlobalsModRef/aliastest.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load
+@X = internal global i32 4 ; <i32*> [#uses=1]
+
+define i32 @test(i32* %P) {
+ store i32 7, i32* %P
+ store i32 12, i32* @X
+ %V = load i32* %P ; <i32> [#uses=1]
+ ret i32 %V
+}
diff --git a/test/Analysis/GlobalsModRef/chaining-analysis.ll b/test/Analysis/GlobalsModRef/chaining-analysis.ll
new file mode 100644
index 0000000..b1d4593
--- /dev/null
+++ b/test/Analysis/GlobalsModRef/chaining-analysis.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load
+
+; This test requires the use of previous analyses to determine that
+; doesnotmodX does not modify X (because 'sin' doesn't).
+
+@X = internal global i32 4 ; <i32*> [#uses=2]
+
+declare double @sin(double) readnone
+
+define i32 @test(i32* %P) {
+ store i32 12, i32* @X
+ call double @doesnotmodX( double 1.000000e+00 ) ; <double>:1 [#uses=0]
+ %V = load i32* @X ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define double @doesnotmodX(double %V) {
+ %V2 = call double @sin( double %V ) readnone ; <double> [#uses=1]
+ ret double %V2
+}
diff --git a/test/Analysis/GlobalsModRef/dg.exp b/test/Analysis/GlobalsModRef/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Analysis/GlobalsModRef/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Analysis/GlobalsModRef/indirect-global.ll b/test/Analysis/GlobalsModRef/indirect-global.ll
new file mode 100644
index 0000000..4074909
--- /dev/null
+++ b/test/Analysis/GlobalsModRef/indirect-global.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -globalsmodref-aa -gvn -instcombine -S | \
+; RUN: grep {ret i32 0}
+
+@G = internal global i32* null ; <i32**> [#uses=3]
+
+define void @test() {
+ %A = malloc i32 ; <i32*> [#uses=1]
+ store i32* %A, i32** @G
+ ret void
+}
+
+define i32 @test1(i32* %P) {
+ %g1 = load i32** @G ; <i32*> [#uses=2]
+ %h1 = load i32* %g1 ; <i32> [#uses=1]
+ store i32 123, i32* %P
+ %g2 = load i32** @G ; <i32*> [#uses=0]
+ %h2 = load i32* %g1 ; <i32> [#uses=1]
+ %X = sub i32 %h1, %h2 ; <i32> [#uses=1]
+ ret i32 %X
+}
diff --git a/test/Analysis/GlobalsModRef/modreftest.ll b/test/Analysis/GlobalsModRef/modreftest.ll
new file mode 100644
index 0000000..257c0ee
--- /dev/null
+++ b/test/Analysis/GlobalsModRef/modreftest.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load
+@X = internal global i32 4 ; <i32*> [#uses=2]
+
+define i32 @test(i32* %P) {
+ store i32 12, i32* @X
+ call void @doesnotmodX( )
+ %V = load i32* @X ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define void @doesnotmodX() {
+ ret void
+}
diff --git a/test/Analysis/GlobalsModRef/purecse.ll b/test/Analysis/GlobalsModRef/purecse.ll
new file mode 100644
index 0000000..994aff8
--- /dev/null
+++ b/test/Analysis/GlobalsModRef/purecse.ll
@@ -0,0 +1,23 @@
+; Test that pure functions are cse'd away
+; RUN: opt < %s -globalsmodref-aa -gvn -instcombine | \
+; RUN: llvm-dis | not grep sub
+
+define i32 @pure(i32 %X) {
+ %Y = add i32 %X, 1 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+define i32 @test1(i32 %X) {
+ %A = call i32 @pure( i32 %X ) ; <i32> [#uses=1]
+ %B = call i32 @pure( i32 %X ) ; <i32> [#uses=1]
+ %C = sub i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test2(i32 %X, i32* %P) {
+ %A = call i32 @pure( i32 %X ) ; <i32> [#uses=1]
+ store i32 %X, i32* %P ;; Does not invalidate 'pure' call.
+ %B = call i32 @pure( i32 %X ) ; <i32> [#uses=1]
+ %C = sub i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
diff --git a/test/Analysis/LoopDependenceAnalysis/alias.ll b/test/Analysis/LoopDependenceAnalysis/alias.ll
new file mode 100644
index 0000000..97be3fd
--- /dev/null
+++ b/test/Analysis/LoopDependenceAnalysis/alias.ll
@@ -0,0 +1,44 @@
+; RUN: opt < %s -analyze -lda | FileCheck %s
+
+;; x[5] = x[6] // with x being a pointer passed as argument
+
+define void @f1(i32* nocapture %xptr) nounwind {
+entry:
+ %x.ld.addr = getelementptr i32* %xptr, i64 6
+ %x.st.addr = getelementptr i32* %xptr, i64 5
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %x = load i32* %x.ld.addr
+ store i32 %x, i32* %x.st.addr
+; CHECK: 0,1: dep
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; x[5] = x[6] // with x being an array on the stack
+
+define void @foo(...) nounwind {
+entry:
+ %xptr = alloca [256 x i32], align 4
+ %x.ld.addr = getelementptr [256 x i32]* %xptr, i64 0, i64 6
+ %x.st.addr = getelementptr [256 x i32]* %xptr, i64 0, i64 5
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %x = load i32* %x.ld.addr
+ store i32 %x, i32* %x.st.addr
+; CHECK: 0,1: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
diff --git a/test/Analysis/LoopDependenceAnalysis/dg.exp b/test/Analysis/LoopDependenceAnalysis/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Analysis/LoopDependenceAnalysis/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Analysis/LoopDependenceAnalysis/siv-strong.ll b/test/Analysis/LoopDependenceAnalysis/siv-strong.ll
new file mode 100644
index 0000000..36ac153
--- /dev/null
+++ b/test/Analysis/LoopDependenceAnalysis/siv-strong.ll
@@ -0,0 +1,110 @@
+; RUN: opt < %s -analyze -lda | FileCheck %s
+
+@x = common global [256 x i32] zeroinitializer, align 4
+@y = common global [256 x i32] zeroinitializer, align 4
+
+;; for (i = 0; i < 256; i++)
+;; x[i] = x[i] + y[i]
+
+define void @f1(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %y.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
+ %x.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
+ %x = load i32* %x.addr ; 0
+ %y = load i32* %y.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; for (i = 0; i < 256; i++)
+;; x[i+1] = x[i] + y[i]
+
+define void @f2(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
+ %i.next = add i64 %i, 1
+ %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.next
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.ld.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.st.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; for (i = 0; i < 10; i++)
+;; x[i+20] = x[i] + y[i]
+
+define void @f3(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
+ %i.20 = add i64 %i, 20
+ %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.20
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.ld.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.st.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 10
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; for (i = 0; i < 10; i++)
+;; x[10*i+1] = x[10*i] + y[i]
+
+define void @f4(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %i.10 = mul i64 %i, 10
+ %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i.10
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.10
+ %i.10.1 = add i64 %i.10, 1
+ %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.10.1
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.ld.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.st.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 10
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
diff --git a/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll b/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll
new file mode 100644
index 0000000..a7f9bda
--- /dev/null
+++ b/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll
@@ -0,0 +1,118 @@
+; RUN: opt < %s -analyze -lda | FileCheck %s
+
+@x = common global [256 x i32] zeroinitializer, align 4
+@y = common global [256 x i32] zeroinitializer, align 4
+
+;; for (i = 0; i < 256; i++)
+;; x[i] = x[255 - i] + y[i]
+
+define void @f1(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %i.255 = sub i64 255, %i
+ %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.255
+ %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.ld.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.st.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; for (i = 0; i < 100; i++)
+;; x[i] = x[255 - i] + y[i]
+
+define void @f2(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %i.255 = sub i64 255, %i
+ %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.255
+ %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.ld.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.st.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 100
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; // the first iteration (i=0) leads to an out-of-bounds access of x. as the
+;; // result of this access is undefined, _any_ dependence result is safe.
+;; for (i = 0; i < 256; i++)
+;; x[i] = x[256 - i] + y[i]
+
+define void @f3(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %i.256 = sub i64 0, %i
+ %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 1, i64 %i.256
+ %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.ld.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.st.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2:
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; // slightly contrived but valid IR for the following loop, where all
+;; // accesses in all iterations are within bounds. while this example's first
+;; // (ZIV-)subscript is (0, 1), accesses are dependent.
+;; for (i = 1; i < 256; i++)
+;; x[i] = x[256 - i] + y[i]
+
+define void @f4(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %i.1 = add i64 1, %i
+ %i.256 = sub i64 -1, %i
+ %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i.1
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 1, i64 %i.256
+ %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.1
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.ld.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.st.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
diff --git a/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll b/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll
new file mode 100644
index 0000000..e75aefd
--- /dev/null
+++ b/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll
@@ -0,0 +1,56 @@
+; RUN: opt < %s -analyze -lda | FileCheck %s
+
+@x = common global [256 x i32] zeroinitializer, align 4
+@y = common global [256 x i32] zeroinitializer, align 4
+
+;; for (i = 0; i < 256; i++)
+;; x[i] = x[42] + y[i]
+
+define void @f1(...) nounwind {
+entry:
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 42
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %x.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
+ %y.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; for (i = 0; i < 250; i++)
+;; x[i] = x[255] + y[i]
+
+define void @f2(...) nounwind {
+entry:
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 255
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %x.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
+ %y.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
+ %x = load i32* %x.ld.addr ; 0
+ %y = load i32* %y.addr ; 1
+ %r = add i32 %y, %x
+ store i32 %r, i32* %x.addr ; 2
+; CHECK: 0,2: dep
+; CHECK: 1,2: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 250
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
diff --git a/test/Analysis/LoopDependenceAnalysis/ziv.ll b/test/Analysis/LoopDependenceAnalysis/ziv.ll
new file mode 100644
index 0000000..ba45948
--- /dev/null
+++ b/test/Analysis/LoopDependenceAnalysis/ziv.ll
@@ -0,0 +1,63 @@
+; RUN: opt < %s -analyze -lda | FileCheck %s
+
+@x = common global [256 x i32] zeroinitializer, align 4
+
+;; x[5] = x[6]
+
+define void @f1(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %x = load i32* getelementptr ([256 x i32]* @x, i32 0, i64 6)
+ store i32 %x, i32* getelementptr ([256 x i32]* @x, i32 0, i64 5)
+; CHECK: 0,1: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; x[c] = x[c+1] // with c being a loop-invariant constant
+
+define void @f2(i64 %c0) nounwind {
+entry:
+ %c1 = add i64 %c0, 1
+ %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %c0
+ %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %c1
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %x = load i32* %x.ld.addr
+ store i32 %x, i32* %x.st.addr
+; CHECK: 0,1: ind
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+;; x[6] = x[6]
+
+define void @f3(...) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
+ %x = load i32* getelementptr ([256 x i32]* @x, i32 0, i64 6)
+ store i32 %x, i32* getelementptr ([256 x i32]* @x, i32 0, i64 6)
+; CHECK: 0,1: dep
+ %i.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %i.next, 256
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
diff --git a/test/Analysis/LoopInfo/2003-05-15-NestingProblem.ll b/test/Analysis/LoopInfo/2003-05-15-NestingProblem.ll
new file mode 100644
index 0000000..9355aee
--- /dev/null
+++ b/test/Analysis/LoopInfo/2003-05-15-NestingProblem.ll
@@ -0,0 +1,30 @@
+; This testcase was incorrectly computing that the loopentry.7 loop was
+; not a child of the loopentry.6 loop.
+;
+; RUN: opt < %s -analyze -loops | \
+; RUN: grep {^ Loop at depth 4 containing: %loopentry.7<header><latch><exiting>}
+
+define void @getAndMoveToFrontDecode() {
+ br label %endif.2
+
+endif.2: ; preds = %loopexit.5, %0
+ br i1 false, label %loopentry.5, label %UnifiedExitNode
+
+loopentry.5: ; preds = %loopexit.6, %endif.2
+ br i1 false, label %loopentry.6, label %UnifiedExitNode
+
+loopentry.6: ; preds = %loopentry.7, %loopentry.5
+ br i1 false, label %loopentry.7, label %loopexit.6
+
+loopentry.7: ; preds = %loopentry.7, %loopentry.6
+ br i1 false, label %loopentry.7, label %loopentry.6
+
+loopexit.6: ; preds = %loopentry.6
+ br i1 false, label %loopentry.5, label %loopexit.5
+
+loopexit.5: ; preds = %loopexit.6
+ br i1 false, label %endif.2, label %UnifiedExitNode
+
+UnifiedExitNode: ; preds = %loopexit.5, %loopentry.5, %endif.2
+ ret void
+}
diff --git a/test/Analysis/LoopInfo/dg.exp b/test/Analysis/LoopInfo/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Analysis/LoopInfo/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Analysis/PointerTracking/dg.exp b/test/Analysis/PointerTracking/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Analysis/PointerTracking/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Analysis/PointerTracking/sizes.ll b/test/Analysis/PointerTracking/sizes.ll
new file mode 100644
index 0000000..c8ca648
--- /dev/null
+++ b/test/Analysis/PointerTracking/sizes.ll
@@ -0,0 +1,86 @@
+; RUN: opt < %s -pointertracking -analyze | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
[email protected] = internal constant [5 x i8] c"1234\00" ; <[5 x i8]*> [#uses=1]
+@test1p = global i8* getelementptr ([5 x i8]* @.str, i32 0, i32 0), align 8 ; <i8**> [#uses=1]
+@test1a = global [5 x i8] c"1234\00", align 1 ; <[5 x i8]*> [#uses=1]
+@test2a = global [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5], align 4 ; <[5 x i32]*> [#uses=2]
+@test2p = global i32* getelementptr ([5 x i32]* @test2a, i32 0, i32 0), align 8 ; <i32**> [#uses=1]
+@test0p = common global i32* null, align 8 ; <i32**> [#uses=1]
+@test0i = common global i32 0, align 4 ; <i32*> [#uses=1]
+
+define i32 @foo0() nounwind {
+entry:
+ %tmp = load i32** @test0p ; <i32*> [#uses=1]
+ %conv = bitcast i32* %tmp to i8* ; <i8*> [#uses=1]
+ %call = tail call i32 @bar(i8* %conv) nounwind ; <i32> [#uses=1]
+ %tmp1 = load i8** @test1p ; <i8*> [#uses=1]
+ %call2 = tail call i32 @bar(i8* %tmp1) nounwind ; <i32> [#uses=1]
+ %call3 = tail call i32 @bar(i8* getelementptr ([5 x i8]* @test1a, i32 0, i32 0)) nounwind ; <i32> [#uses=1]
+ %call5 = tail call i32 @bar(i8* bitcast ([5 x i32]* @test2a to i8*)) nounwind ; <i32> [#uses=1]
+ %tmp7 = load i32** @test2p ; <i32*> [#uses=1]
+ %conv8 = bitcast i32* %tmp7 to i8* ; <i8*> [#uses=1]
+ %call9 = tail call i32 @bar(i8* %conv8) nounwind ; <i32> [#uses=1]
+ %call11 = tail call i32 @bar(i8* bitcast (i32* @test0i to i8*)) nounwind ; <i32> [#uses=1]
+ %add = add i32 %call2, %call ; <i32> [#uses=1]
+ %add4 = add i32 %add, %call3 ; <i32> [#uses=1]
+ %add6 = add i32 %add4, %call5 ; <i32> [#uses=1]
+ %add10 = add i32 %add6, %call9 ; <i32> [#uses=1]
+ %add12 = add i32 %add10, %call11 ; <i32> [#uses=1]
+ ret i32 %add12
+}
+
+declare i32 @bar(i8*)
+
+define i32 @foo1(i32 %n) nounwind {
+entry:
+; CHECK: 'foo1':
+ %test4a = alloca [10 x i8], align 1 ; <[10 x i8]*> [#uses=1]
+; CHECK: %test4a =
+; CHECK: ==> 1 elements, 10 bytes allocated
+ %test6a = alloca [10 x i32], align 4 ; <[10 x i32]*> [#uses=1]
+; CHECK: %test6a =
+; CHECK: ==> 1 elements, 40 bytes allocated
+ %vla = alloca i8, i32 %n, align 1 ; <i8*> [#uses=1]
+; CHECK: %vla =
+; CHECK: ==> %n elements, %n bytes allocated
+ %0 = shl i32 %n, 2 ; <i32> [#uses=1]
+ %vla7 = alloca i8, i32 %0, align 1 ; <i8*> [#uses=1]
+; CHECK: %vla7 =
+; CHECK: ==> (4 * %n) elements, (4 * %n) bytes allocated
+ %call = call i32 @bar(i8* %vla) nounwind ; <i32> [#uses=1]
+ %arraydecay = getelementptr [10 x i8]* %test4a, i64 0, i64 0 ; <i8*> [#uses=1]
+ %call10 = call i32 @bar(i8* %arraydecay) nounwind ; <i32> [#uses=1]
+ %call11 = call i32 @bar(i8* %vla7) nounwind ; <i32> [#uses=1]
+ %ptrconv14 = bitcast [10 x i32]* %test6a to i8* ; <i8*> [#uses=1]
+ %call15 = call i32 @bar(i8* %ptrconv14) nounwind ; <i32> [#uses=1]
+ %add = add i32 %call10, %call ; <i32> [#uses=1]
+ %add12 = add i32 %add, %call11 ; <i32> [#uses=1]
+ %add16 = add i32 %add12, %call15 ; <i32> [#uses=1]
+ ret i32 %add16
+}
+
+define i32 @foo2(i64 %n) nounwind {
+entry:
+ %call = tail call i8* @malloc(i64 %n) ; <i8*> [#uses=1]
+; CHECK: %call =
+; CHECK: ==> %n elements, %n bytes allocated
+ %call2 = tail call i8* @calloc(i64 2, i64 4) nounwind ; <i8*> [#uses=1]
+; CHECK: %call2 =
+; CHECK: ==> 8 elements, 8 bytes allocated
+ %call4 = tail call i8* @realloc(i8* null, i64 16) nounwind ; <i8*> [#uses=1]
+; CHECK: %call4 =
+; CHECK: ==> 16 elements, 16 bytes allocated
+ %call6 = tail call i32 @bar(i8* %call) nounwind ; <i32> [#uses=1]
+ %call8 = tail call i32 @bar(i8* %call2) nounwind ; <i32> [#uses=1]
+ %call10 = tail call i32 @bar(i8* %call4) nounwind ; <i32> [#uses=1]
+ %add = add i32 %call8, %call6 ; <i32> [#uses=1]
+ %add11 = add i32 %add, %call10 ; <i32> [#uses=1]
+ ret i32 %add11
+}
+
+declare noalias i8* @malloc(i64) nounwind
+
+declare noalias i8* @calloc(i64, i64) nounwind
+
+declare noalias i8* @realloc(i8* nocapture, i64) nounwind
diff --git a/test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll b/test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll
new file mode 100644
index 0000000..b73b7f03
--- /dev/null
+++ b/test/Analysis/PostDominators/2006-09-26-PostDominanceFrontier.ll
@@ -0,0 +1,97 @@
+; RUN: opt < %s -analyze -postdomfrontier \
+; RUN: -disable-verify
+; ModuleID = '2006-09-26-PostDominanceFrontier.bc'
+target datalayout = "e-p:64:64"
+target triple = "alphaev67-unknown-linux-gnu"
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [44 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+@TOP = external global i64* ; <i64**> [#uses=1]
+@BOT = external global i64* ; <i64**> [#uses=1]
+@str = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+
+declare void @fopen()
+
+define void @main(i8** %argv) {
+entry:
+ %netSelect.i507 = alloca i64, align 8 ; <i64*> [#uses=0]
+ %topStart.i = alloca i64, align 8 ; <i64*> [#uses=0]
+ %topEnd.i = alloca i64, align 8 ; <i64*> [#uses=0]
+ %botStart.i = alloca i64, align 8 ; <i64*> [#uses=0]
+ %botEnd.i = alloca i64, align 8 ; <i64*> [#uses=0]
+ %c1.i154 = alloca i32, align 4 ; <i32*> [#uses=0]
+ %b1.i155 = alloca i32, align 4 ; <i32*> [#uses=0]
+ %t1.i156 = alloca i32, align 4 ; <i32*> [#uses=0]
+ %c1.i = alloca i32, align 4 ; <i32*> [#uses=0]
+ %b1.i = alloca i32, align 4 ; <i32*> [#uses=0]
+ %t1.i = alloca i32, align 4 ; <i32*> [#uses=0]
+ %netSelect.i5 = alloca i64, align 8 ; <i64*> [#uses=0]
+ %netSelect.i = alloca i64, align 8 ; <i64*> [#uses=0]
+ %tmp2.i = getelementptr i8** %argv, i32 1 ; <i8**> [#uses=1]
+ %tmp3.i4 = load i8** %tmp2.i ; <i8*> [#uses=0]
+ call void @fopen( )
+ br i1 false, label %DimensionChannel.exit, label %bb.backedge.i
+
+bb.backedge.i: ; preds = %entry
+ ret void
+
+DimensionChannel.exit: ; preds = %entry
+ %tmp13.i137 = malloc i64, i32 0 ; <i64*> [#uses=1]
+ %tmp610.i = malloc i64, i32 0 ; <i64*> [#uses=1]
+ br label %cond_true.i143
+
+cond_true.i143: ; preds = %cond_true.i143, %DimensionChannel.exit
+ %tmp9.i140 = getelementptr i64* %tmp13.i137, i64 0 ; <i64*> [#uses=0]
+ %tmp12.i = getelementptr i64* %tmp610.i, i64 0 ; <i64*> [#uses=0]
+ br i1 false, label %bb18.i144, label %cond_true.i143
+
+bb18.i144: ; preds = %cond_true.i143
+ call void @fopen( )
+ %tmp76.i105 = malloc i64, i32 0 ; <i64*> [#uses=3]
+ %tmp674.i = malloc i64, i32 0 ; <i64*> [#uses=2]
+ %tmp1072.i = malloc i64, i32 0 ; <i64*> [#uses=2]
+ %tmp1470.i = malloc i64, i32 0 ; <i64*> [#uses=1]
+ br label %cond_true.i114
+
+cond_true.i114: ; preds = %cond_true.i114, %bb18.i144
+ %tmp17.i108 = getelementptr i64* %tmp76.i105, i64 0 ; <i64*> [#uses=0]
+ %tmp20.i = getelementptr i64* %tmp674.i, i64 0 ; <i64*> [#uses=0]
+ %tmp23.i111 = getelementptr i64* %tmp1470.i, i64 0 ; <i64*> [#uses=0]
+ br i1 false, label %cond_true40.i, label %cond_true.i114
+
+cond_true40.i: ; preds = %cond_true40.i, %cond_true.i114
+ %tmp33.i115 = getelementptr i64* %tmp1072.i, i64 0 ; <i64*> [#uses=0]
+ br i1 false, label %bb142.i, label %cond_true40.i
+
+cond_next54.i: ; preds = %cond_true76.i
+ %tmp57.i = getelementptr i64* %tmp55.i, i64 0 ; <i64*> [#uses=0]
+ br i1 false, label %bb64.i, label %bb69.i
+
+bb64.i: ; preds = %cond_true76.i, %cond_next54.i
+ %tmp67.i117 = getelementptr i64* %tmp76.i105, i64 0 ; <i64*> [#uses=0]
+ br i1 false, label %bb114.i, label %cond_true111.i
+
+bb69.i: ; preds = %cond_next54.i
+ br i1 false, label %bb79.i, label %cond_true76.i
+
+cond_true76.i: ; preds = %bb142.i, %bb69.i
+ %tmp48.i = getelementptr i64* %tmp46.i, i64 0 ; <i64*> [#uses=0]
+ br i1 false, label %bb64.i, label %cond_next54.i
+
+bb79.i: ; preds = %bb69.i
+ br i1 false, label %bb114.i, label %cond_true111.i
+
+cond_true111.i: ; preds = %bb79.i, %bb64.i
+ %tmp84.i127 = getelementptr i64* %tmp46.i, i64 0 ; <i64*> [#uses=0]
+ ret void
+
+bb114.i: ; preds = %bb142.i, %bb79.i, %bb64.i
+ %tmp117.i = getelementptr i64* %tmp76.i105, i64 0 ; <i64*> [#uses=0]
+ %tmp132.i131 = getelementptr i64* %tmp674.i, i64 0 ; <i64*> [#uses=0]
+ %tmp122.i = getelementptr i64* %tmp1072.i, i64 0 ; <i64*> [#uses=0]
+ ret void
+
+bb142.i: ; preds = %cond_true40.i
+ %tmp46.i = load i64** @BOT ; <i64*> [#uses=2]
+ %tmp55.i = load i64** @TOP ; <i64*> [#uses=1]
+ br i1 false, label %bb114.i, label %cond_true76.i
+}
diff --git a/test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll b/test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll
new file mode 100644
index 0000000..1ec056b
--- /dev/null
+++ b/test/Analysis/PostDominators/2007-04-17-PostDominanceFrontier.ll
@@ -0,0 +1,692 @@
+; RUN: opt < %s -postdomfrontier -disable-output
+
+define void @SManager() {
+entry:
+ br label %bb.outer
+
+bb.outer: ; preds = %bb193, %entry
+ br label %bb.outer156
+
+bb.loopexit: ; preds = %bb442
+ br label %bb.outer156
+
+bb.outer156: ; preds = %bb.loopexit, %bb.outer
+ br label %bb
+
+bb: ; preds = %bb.backedge, %bb.outer156
+ br i1 false, label %cond_true, label %bb.cond_next_crit_edge
+
+bb.cond_next_crit_edge: ; preds = %bb
+ br label %cond_next
+
+cond_true: ; preds = %bb
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %bb.cond_next_crit_edge
+ br i1 false, label %cond_next.bb.backedge_crit_edge, label %cond_next107
+
+cond_next.bb.backedge_crit_edge: ; preds = %cond_next
+ br label %bb.backedge
+
+bb.backedge: ; preds = %cond_true112.bb.backedge_crit_edge, %cond_next.bb.backedge_crit_edge
+ br label %bb
+
+cond_next107: ; preds = %cond_next
+ br i1 false, label %cond_true112, label %cond_next197
+
+cond_true112: ; preds = %cond_next107
+ br i1 false, label %cond_true118, label %cond_true112.bb.backedge_crit_edge
+
+cond_true112.bb.backedge_crit_edge: ; preds = %cond_true112
+ br label %bb.backedge
+
+cond_true118: ; preds = %cond_true112
+ br i1 false, label %bb123.preheader, label %cond_true118.bb148_crit_edge
+
+cond_true118.bb148_crit_edge: ; preds = %cond_true118
+ br label %bb148
+
+bb123.preheader: ; preds = %cond_true118
+ br label %bb123
+
+bb123: ; preds = %bb142.bb123_crit_edge, %bb123.preheader
+ br i1 false, label %bb123.bb142_crit_edge, label %cond_next.i57
+
+bb123.bb142_crit_edge: ; preds = %bb123
+ br label %bb142
+
+cond_next.i57: ; preds = %bb123
+ br i1 false, label %cond_true135, label %cond_next.i57.bb142_crit_edge
+
+cond_next.i57.bb142_crit_edge: ; preds = %cond_next.i57
+ br label %bb142
+
+cond_true135: ; preds = %cond_next.i57
+ br label %bb142
+
+bb142: ; preds = %cond_true135, %cond_next.i57.bb142_crit_edge, %bb123.bb142_crit_edge
+ br i1 false, label %bb148.loopexit, label %bb142.bb123_crit_edge
+
+bb142.bb123_crit_edge: ; preds = %bb142
+ br label %bb123
+
+bb148.loopexit: ; preds = %bb142
+ br label %bb148
+
+bb148: ; preds = %bb148.loopexit, %cond_true118.bb148_crit_edge
+ br i1 false, label %bb151.preheader, label %bb148.bb177_crit_edge
+
+bb148.bb177_crit_edge: ; preds = %bb148
+ br label %bb177
+
+bb151.preheader: ; preds = %bb148
+ br label %bb151
+
+bb151: ; preds = %bb171.bb151_crit_edge, %bb151.preheader
+ br i1 false, label %bb151.bb171_crit_edge, label %cond_next.i49
+
+bb151.bb171_crit_edge: ; preds = %bb151
+ br label %bb171
+
+cond_next.i49: ; preds = %bb151
+ br i1 false, label %cond_true164, label %cond_next.i49.bb171_crit_edge
+
+cond_next.i49.bb171_crit_edge: ; preds = %cond_next.i49
+ br label %bb171
+
+cond_true164: ; preds = %cond_next.i49
+ br label %bb171
+
+bb171: ; preds = %cond_true164, %cond_next.i49.bb171_crit_edge, %bb151.bb171_crit_edge
+ br i1 false, label %bb177.loopexit, label %bb171.bb151_crit_edge
+
+bb171.bb151_crit_edge: ; preds = %bb171
+ br label %bb151
+
+bb177.loopexit: ; preds = %bb171
+ br label %bb177
+
+bb177: ; preds = %bb177.loopexit, %bb148.bb177_crit_edge
+ br i1 false, label %bb180.preheader, label %bb177.bb193_crit_edge
+
+bb177.bb193_crit_edge: ; preds = %bb177
+ br label %bb193
+
+bb180.preheader: ; preds = %bb177
+ br label %bb180
+
+bb180: ; preds = %bb180.bb180_crit_edge, %bb180.preheader
+ br i1 false, label %bb193.loopexit, label %bb180.bb180_crit_edge
+
+bb180.bb180_crit_edge: ; preds = %bb180
+ br label %bb180
+
+bb193.loopexit: ; preds = %bb180
+ br label %bb193
+
+bb193: ; preds = %bb193.loopexit, %bb177.bb193_crit_edge
+ br label %bb.outer
+
+cond_next197: ; preds = %cond_next107
+ br i1 false, label %cond_next210, label %cond_true205
+
+cond_true205: ; preds = %cond_next197
+ br i1 false, label %cond_true205.bb213_crit_edge, label %cond_true205.bb299_crit_edge
+
+cond_true205.bb299_crit_edge: ; preds = %cond_true205
+ br label %bb299
+
+cond_true205.bb213_crit_edge: ; preds = %cond_true205
+ br label %bb213
+
+cond_next210: ; preds = %cond_next197
+ br label %bb293
+
+bb213: ; preds = %bb293.bb213_crit_edge, %cond_true205.bb213_crit_edge
+ br i1 false, label %bb213.cond_next290_crit_edge, label %cond_true248
+
+bb213.cond_next290_crit_edge: ; preds = %bb213
+ br label %cond_next290
+
+cond_true248: ; preds = %bb213
+ br i1 false, label %cond_true248.cond_next290_crit_edge, label %cond_true255
+
+cond_true248.cond_next290_crit_edge: ; preds = %cond_true248
+ br label %cond_next290
+
+cond_true255: ; preds = %cond_true248
+ br i1 false, label %cond_true266, label %cond_true255.cond_next271_crit_edge
+
+cond_true255.cond_next271_crit_edge: ; preds = %cond_true255
+ br label %cond_next271
+
+cond_true266: ; preds = %cond_true255
+ br label %cond_next271
+
+cond_next271: ; preds = %cond_true266, %cond_true255.cond_next271_crit_edge
+ br label %cond_next290
+
+cond_next290: ; preds = %cond_next271, %cond_true248.cond_next290_crit_edge, %bb213.cond_next290_crit_edge
+ br label %bb293
+
+bb293: ; preds = %cond_next290, %cond_next210
+ br i1 false, label %bb293.bb213_crit_edge, label %bb293.bb299_crit_edge
+
+bb293.bb299_crit_edge: ; preds = %bb293
+ br label %bb299
+
+bb293.bb213_crit_edge: ; preds = %bb293
+ br label %bb213
+
+bb299: ; preds = %bb293.bb299_crit_edge, %cond_true205.bb299_crit_edge
+ br i1 false, label %bb302.preheader, label %bb299.bb390_crit_edge
+
+bb299.bb390_crit_edge: ; preds = %bb299
+ br label %bb390
+
+bb302.preheader: ; preds = %bb299
+ br label %bb302
+
+bb302: ; preds = %bb384.bb302_crit_edge, %bb302.preheader
+ br i1 false, label %bb302.bb384_crit_edge, label %cond_true339
+
+bb302.bb384_crit_edge: ; preds = %bb302
+ br label %bb384
+
+cond_true339: ; preds = %bb302
+ br i1 false, label %cond_true339.bb384_crit_edge, label %cond_true346
+
+cond_true339.bb384_crit_edge: ; preds = %cond_true339
+ br label %bb384
+
+cond_true346: ; preds = %cond_true339
+ br i1 false, label %cond_true357, label %cond_true346.cond_next361_crit_edge
+
+cond_true346.cond_next361_crit_edge: ; preds = %cond_true346
+ br label %cond_next361
+
+cond_true357: ; preds = %cond_true346
+ br label %cond_next361
+
+cond_next361: ; preds = %cond_true357, %cond_true346.cond_next361_crit_edge
+ br label %bb384
+
+bb384: ; preds = %cond_next361, %cond_true339.bb384_crit_edge, %bb302.bb384_crit_edge
+ br i1 false, label %bb390.loopexit, label %bb384.bb302_crit_edge
+
+bb384.bb302_crit_edge: ; preds = %bb384
+ br label %bb302
+
+bb390.loopexit: ; preds = %bb384
+ br label %bb390
+
+bb390: ; preds = %bb390.loopexit, %bb299.bb390_crit_edge
+ br i1 false, label %bb391.preheader, label %bb390.bb442.preheader_crit_edge
+
+bb390.bb442.preheader_crit_edge: ; preds = %bb390
+ br label %bb442.preheader
+
+bb391.preheader: ; preds = %bb390
+ br label %bb391
+
+bb391: ; preds = %bb413.bb391_crit_edge, %bb391.preheader
+ br i1 false, label %bb391.bb413_crit_edge, label %cond_next404
+
+bb391.bb413_crit_edge: ; preds = %bb391
+ br label %bb413
+
+cond_next404: ; preds = %bb391
+ br i1 false, label %cond_next404.HWrite.exit_crit_edge, label %cond_next.i13
+
+cond_next404.HWrite.exit_crit_edge: ; preds = %cond_next404
+ br label %HWrite.exit
+
+cond_next.i13: ; preds = %cond_next404
+ br i1 false, label %cond_next.i13.cond_next13.i_crit_edge, label %cond_true12.i
+
+cond_next.i13.cond_next13.i_crit_edge: ; preds = %cond_next.i13
+ br label %cond_next13.i
+
+cond_true12.i: ; preds = %cond_next.i13
+ br label %cond_next13.i
+
+cond_next13.i: ; preds = %cond_true12.i, %cond_next.i13.cond_next13.i_crit_edge
+ br i1 false, label %cond_next13.i.bb.i22_crit_edge, label %cond_next43.i
+
+cond_next13.i.bb.i22_crit_edge: ; preds = %cond_next13.i
+ br label %bb.i22
+
+cond_next43.i: ; preds = %cond_next13.i
+ br i1 false, label %cond_next43.i.bb.i22_crit_edge, label %bb60.i
+
+cond_next43.i.bb.i22_crit_edge: ; preds = %cond_next43.i
+ br label %bb.i22
+
+bb.i22: ; preds = %cond_next43.i.bb.i22_crit_edge, %cond_next13.i.bb.i22_crit_edge
+ br label %bb413
+
+bb60.i: ; preds = %cond_next43.i
+ br i1 false, label %bb60.i.HWrite.exit_crit_edge, label %cond_true81.i
+
+bb60.i.HWrite.exit_crit_edge: ; preds = %bb60.i
+ br label %HWrite.exit
+
+cond_true81.i: ; preds = %bb60.i
+ br label %bb413
+
+HWrite.exit: ; preds = %bb60.i.HWrite.exit_crit_edge, %cond_next404.HWrite.exit_crit_edge
+ br label %bb413
+
+bb413: ; preds = %HWrite.exit, %cond_true81.i, %bb.i22, %bb391.bb413_crit_edge
+ br i1 false, label %bb442.preheader.loopexit, label %bb413.bb391_crit_edge
+
+bb413.bb391_crit_edge: ; preds = %bb413
+ br label %bb391
+
+bb442.preheader.loopexit: ; preds = %bb413
+ br label %bb442.preheader
+
+bb442.preheader: ; preds = %bb442.preheader.loopexit, %bb390.bb442.preheader_crit_edge
+ br label %bb442.outer
+
+bb420: ; preds = %bb442
+ br i1 false, label %bb439.loopexit, label %cond_next433
+
+cond_next433: ; preds = %bb420
+ br i1 false, label %cond_next433.HRead.exit.loopexit_crit_edge, label %cond_next.i
+
+cond_next433.HRead.exit.loopexit_crit_edge: ; preds = %cond_next433
+ br label %HRead.exit.loopexit
+
+cond_next.i: ; preds = %cond_next433
+ br i1 false, label %cond_true9.i, label %cond_false223.i
+
+cond_true9.i: ; preds = %cond_next.i
+ switch i32 0, label %cond_false.i [
+ i32 1, label %cond_true9.i.cond_true15.i_crit_edge
+ i32 5, label %cond_true9.i.cond_true15.i_crit_edge9
+ ]
+
+cond_true9.i.cond_true15.i_crit_edge9: ; preds = %cond_true9.i
+ br label %cond_true15.i
+
+cond_true9.i.cond_true15.i_crit_edge: ; preds = %cond_true9.i
+ br label %cond_true15.i
+
+cond_true15.i: ; preds = %cond_true9.i.cond_true15.i_crit_edge, %cond_true9.i.cond_true15.i_crit_edge9
+ br i1 false, label %cond_true15.i.cond_true44.i_crit_edge, label %cond_true15.i.cond_false49.i_crit_edge
+
+cond_true15.i.cond_false49.i_crit_edge: ; preds = %cond_true15.i
+ br label %cond_false49.i
+
+cond_true15.i.cond_true44.i_crit_edge: ; preds = %cond_true15.i
+ br label %cond_true44.i
+
+cond_false.i: ; preds = %cond_true9.i
+ br i1 false, label %cond_false.i.cond_next39.i_crit_edge, label %cond_true30.i
+
+cond_false.i.cond_next39.i_crit_edge: ; preds = %cond_false.i
+ br label %cond_next39.i
+
+cond_true30.i: ; preds = %cond_false.i
+ br label %cond_next39.i
+
+cond_next39.i: ; preds = %cond_true30.i, %cond_false.i.cond_next39.i_crit_edge
+ br i1 false, label %cond_next39.i.cond_true44.i_crit_edge, label %cond_next39.i.cond_false49.i_crit_edge
+
+cond_next39.i.cond_false49.i_crit_edge: ; preds = %cond_next39.i
+ br label %cond_false49.i
+
+cond_next39.i.cond_true44.i_crit_edge: ; preds = %cond_next39.i
+ br label %cond_true44.i
+
+cond_true44.i: ; preds = %cond_next39.i.cond_true44.i_crit_edge, %cond_true15.i.cond_true44.i_crit_edge
+ br i1 false, label %cond_true44.i.cond_next70.i_crit_edge, label %cond_true44.i.cond_true61.i_crit_edge
+
+cond_true44.i.cond_true61.i_crit_edge: ; preds = %cond_true44.i
+ br label %cond_true61.i
+
+cond_true44.i.cond_next70.i_crit_edge: ; preds = %cond_true44.i
+ br label %cond_next70.i
+
+cond_false49.i: ; preds = %cond_next39.i.cond_false49.i_crit_edge, %cond_true15.i.cond_false49.i_crit_edge
+ br i1 false, label %cond_false49.i.cond_next70.i_crit_edge, label %cond_false49.i.cond_true61.i_crit_edge
+
+cond_false49.i.cond_true61.i_crit_edge: ; preds = %cond_false49.i
+ br label %cond_true61.i
+
+cond_false49.i.cond_next70.i_crit_edge: ; preds = %cond_false49.i
+ br label %cond_next70.i
+
+cond_true61.i: ; preds = %cond_false49.i.cond_true61.i_crit_edge, %cond_true44.i.cond_true61.i_crit_edge
+ br i1 false, label %cond_true61.i.cond_next70.i_crit_edge, label %cond_true67.i
+
+cond_true61.i.cond_next70.i_crit_edge: ; preds = %cond_true61.i
+ br label %cond_next70.i
+
+cond_true67.i: ; preds = %cond_true61.i
+ br label %cond_next70.i
+
+cond_next70.i: ; preds = %cond_true67.i, %cond_true61.i.cond_next70.i_crit_edge, %cond_false49.i.cond_next70.i_crit_edge, %cond_true44.i.cond_next70.i_crit_edge
+ br i1 false, label %cond_true77.i, label %cond_next81.i
+
+cond_true77.i: ; preds = %cond_next70.i
+ br label %bb442.outer.backedge
+
+cond_next81.i: ; preds = %cond_next70.i
+ br i1 false, label %cond_true87.i, label %cond_false94.i
+
+cond_true87.i: ; preds = %cond_next81.i
+ br i1 false, label %cond_true87.i.cond_true130.i_crit_edge, label %cond_true87.i.cond_next135.i_crit_edge
+
+cond_true87.i.cond_next135.i_crit_edge: ; preds = %cond_true87.i
+ br label %cond_next135.i
+
+cond_true87.i.cond_true130.i_crit_edge: ; preds = %cond_true87.i
+ br label %cond_true130.i
+
+cond_false94.i: ; preds = %cond_next81.i
+ switch i32 0, label %cond_false94.i.cond_next125.i_crit_edge [
+ i32 1, label %cond_false94.i.cond_true100.i_crit_edge
+ i32 5, label %cond_false94.i.cond_true100.i_crit_edge10
+ ]
+
+cond_false94.i.cond_true100.i_crit_edge10: ; preds = %cond_false94.i
+ br label %cond_true100.i
+
+cond_false94.i.cond_true100.i_crit_edge: ; preds = %cond_false94.i
+ br label %cond_true100.i
+
+cond_false94.i.cond_next125.i_crit_edge: ; preds = %cond_false94.i
+ br label %cond_next125.i
+
+cond_true100.i: ; preds = %cond_false94.i.cond_true100.i_crit_edge, %cond_false94.i.cond_true100.i_crit_edge10
+ br i1 false, label %cond_true107.i, label %cond_true100.i.cond_next109.i_crit_edge
+
+cond_true100.i.cond_next109.i_crit_edge: ; preds = %cond_true100.i
+ br label %cond_next109.i
+
+cond_true107.i: ; preds = %cond_true100.i
+ br label %cond_next109.i
+
+cond_next109.i: ; preds = %cond_true107.i, %cond_true100.i.cond_next109.i_crit_edge
+ br i1 false, label %cond_next109.i.cond_next125.i_crit_edge, label %cond_true116.i
+
+cond_next109.i.cond_next125.i_crit_edge: ; preds = %cond_next109.i
+ br label %cond_next125.i
+
+cond_true116.i: ; preds = %cond_next109.i
+ br label %cond_next125.i
+
+cond_next125.i: ; preds = %cond_true116.i, %cond_next109.i.cond_next125.i_crit_edge, %cond_false94.i.cond_next125.i_crit_edge
+ br i1 false, label %cond_next125.i.cond_true130.i_crit_edge, label %cond_next125.i.cond_next135.i_crit_edge
+
+cond_next125.i.cond_next135.i_crit_edge: ; preds = %cond_next125.i
+ br label %cond_next135.i
+
+cond_next125.i.cond_true130.i_crit_edge: ; preds = %cond_next125.i
+ br label %cond_true130.i
+
+cond_true130.i: ; preds = %cond_next125.i.cond_true130.i_crit_edge, %cond_true87.i.cond_true130.i_crit_edge
+ br label %cond_next135.i
+
+cond_next135.i: ; preds = %cond_true130.i, %cond_next125.i.cond_next135.i_crit_edge, %cond_true87.i.cond_next135.i_crit_edge
+ br i1 false, label %cond_true142.i, label %cond_next135.i.cond_next149.i_crit_edge
+
+cond_next135.i.cond_next149.i_crit_edge: ; preds = %cond_next135.i
+ br label %cond_next149.i
+
+cond_true142.i: ; preds = %cond_next135.i
+ br label %cond_next149.i
+
+cond_next149.i: ; preds = %cond_true142.i, %cond_next135.i.cond_next149.i_crit_edge
+ br i1 false, label %cond_true156.i, label %cond_next149.i.cond_next163.i_crit_edge
+
+cond_next149.i.cond_next163.i_crit_edge: ; preds = %cond_next149.i
+ br label %cond_next163.i
+
+cond_true156.i: ; preds = %cond_next149.i
+ br label %cond_next163.i
+
+cond_next163.i: ; preds = %cond_true156.i, %cond_next149.i.cond_next163.i_crit_edge
+ br i1 false, label %cond_true182.i, label %cond_next163.i.cond_next380.i_crit_edge
+
+cond_next163.i.cond_next380.i_crit_edge: ; preds = %cond_next163.i
+ br label %cond_next380.i
+
+cond_true182.i: ; preds = %cond_next163.i
+ br i1 false, label %cond_true182.i.cond_next380.i_crit_edge, label %cond_true196.i
+
+cond_true182.i.cond_next380.i_crit_edge: ; preds = %cond_true182.i
+ br label %cond_next380.i
+
+cond_true196.i: ; preds = %cond_true182.i
+ br i1 false, label %cond_true210.i, label %cond_true196.i.cond_next380.i_crit_edge
+
+cond_true196.i.cond_next380.i_crit_edge: ; preds = %cond_true196.i
+ br label %cond_next380.i
+
+cond_true210.i: ; preds = %cond_true196.i
+ br i1 false, label %cond_true216.i, label %cond_true210.i.cond_next380.i_crit_edge
+
+cond_true210.i.cond_next380.i_crit_edge: ; preds = %cond_true210.i
+ br label %cond_next380.i
+
+cond_true216.i: ; preds = %cond_true210.i
+ br label %cond_next380.i
+
+cond_false223.i: ; preds = %cond_next.i
+ br i1 false, label %cond_true229.i, label %cond_false355.i
+
+cond_true229.i: ; preds = %cond_false223.i
+ br i1 false, label %cond_true229.i.HRead.exit.loopexit_crit_edge, label %cond_next243.i
+
+cond_true229.i.HRead.exit.loopexit_crit_edge: ; preds = %cond_true229.i
+ br label %HRead.exit.loopexit
+
+cond_next243.i: ; preds = %cond_true229.i
+ br i1 false, label %cond_true248.i, label %cond_false255.i
+
+cond_true248.i: ; preds = %cond_next243.i
+ br label %cond_next260.i
+
+cond_false255.i: ; preds = %cond_next243.i
+ br label %cond_next260.i
+
+cond_next260.i: ; preds = %cond_false255.i, %cond_true248.i
+ br i1 false, label %cond_true267.i, label %cond_next273.i
+
+cond_true267.i: ; preds = %cond_next260.i
+ br label %bb442.backedge
+
+bb442.backedge: ; preds = %bb.i, %cond_true267.i
+ br label %bb442
+
+cond_next273.i: ; preds = %cond_next260.i
+ br i1 false, label %cond_true281.i, label %cond_next273.i.cond_next288.i_crit_edge
+
+cond_next273.i.cond_next288.i_crit_edge: ; preds = %cond_next273.i
+ br label %cond_next288.i
+
+cond_true281.i: ; preds = %cond_next273.i
+ br label %cond_next288.i
+
+cond_next288.i: ; preds = %cond_true281.i, %cond_next273.i.cond_next288.i_crit_edge
+ br i1 false, label %cond_true295.i, label %cond_next288.i.cond_next302.i_crit_edge
+
+cond_next288.i.cond_next302.i_crit_edge: ; preds = %cond_next288.i
+ br label %cond_next302.i
+
+cond_true295.i: ; preds = %cond_next288.i
+ br label %cond_next302.i
+
+cond_next302.i: ; preds = %cond_true295.i, %cond_next288.i.cond_next302.i_crit_edge
+ br i1 false, label %cond_next302.i.cond_next380.i_crit_edge, label %cond_true328.i
+
+cond_next302.i.cond_next380.i_crit_edge: ; preds = %cond_next302.i
+ br label %cond_next380.i
+
+cond_true328.i: ; preds = %cond_next302.i
+ br i1 false, label %cond_true343.i, label %cond_true328.i.cond_next380.i_crit_edge
+
+cond_true328.i.cond_next380.i_crit_edge: ; preds = %cond_true328.i
+ br label %cond_next380.i
+
+cond_true343.i: ; preds = %cond_true328.i
+ br i1 false, label %cond_true349.i, label %cond_true343.i.cond_next380.i_crit_edge
+
+cond_true343.i.cond_next380.i_crit_edge: ; preds = %cond_true343.i
+ br label %cond_next380.i
+
+cond_true349.i: ; preds = %cond_true343.i
+ br label %cond_next380.i
+
+cond_false355.i: ; preds = %cond_false223.i
+ br i1 false, label %cond_false355.i.bb.i_crit_edge, label %cond_next363.i
+
+cond_false355.i.bb.i_crit_edge: ; preds = %cond_false355.i
+ br label %bb.i
+
+cond_next363.i: ; preds = %cond_false355.i
+ br i1 false, label %bb377.i, label %cond_next363.i.bb.i_crit_edge
+
+cond_next363.i.bb.i_crit_edge: ; preds = %cond_next363.i
+ br label %bb.i
+
+bb.i: ; preds = %cond_next363.i.bb.i_crit_edge, %cond_false355.i.bb.i_crit_edge
+ br label %bb442.backedge
+
+bb377.i: ; preds = %cond_next363.i
+ br label %cond_next380.i
+
+cond_next380.i: ; preds = %bb377.i, %cond_true349.i, %cond_true343.i.cond_next380.i_crit_edge, %cond_true328.i.cond_next380.i_crit_edge, %cond_next302.i.cond_next380.i_crit_edge, %cond_true216.i, %cond_true210.i.cond_next380.i_crit_edge, %cond_true196.i.cond_next380.i_crit_edge, %cond_true182.i.cond_next380.i_crit_edge, %cond_next163.i.cond_next380.i_crit_edge
+ br i1 false, label %cond_next380.i.HRead.exit_crit_edge, label %cond_true391.i
+
+cond_next380.i.HRead.exit_crit_edge: ; preds = %cond_next380.i
+ br label %HRead.exit
+
+cond_true391.i: ; preds = %cond_next380.i
+ br label %bb442.outer.backedge
+
+bb442.outer.backedge: ; preds = %bb439, %cond_true391.i, %cond_true77.i
+ br label %bb442.outer
+
+HRead.exit.loopexit: ; preds = %cond_true229.i.HRead.exit.loopexit_crit_edge, %cond_next433.HRead.exit.loopexit_crit_edge
+ br label %HRead.exit
+
+HRead.exit: ; preds = %HRead.exit.loopexit, %cond_next380.i.HRead.exit_crit_edge
+ br label %bb439
+
+bb439.loopexit: ; preds = %bb420
+ br label %bb439
+
+bb439: ; preds = %bb439.loopexit, %HRead.exit
+ br label %bb442.outer.backedge
+
+bb442.outer: ; preds = %bb442.outer.backedge, %bb442.preheader
+ br label %bb442
+
+bb442: ; preds = %bb442.outer, %bb442.backedge
+ br i1 false, label %bb420, label %bb.loopexit
+}
+
+define void @Invalidate() {
+entry:
+ br i1 false, label %cond_false, label %cond_true
+
+cond_true: ; preds = %entry
+ br i1 false, label %cond_true40, label %cond_true.cond_next_crit_edge
+
+cond_true.cond_next_crit_edge: ; preds = %cond_true
+ br label %cond_next
+
+cond_true40: ; preds = %cond_true
+ br label %cond_next
+
+cond_next: ; preds = %cond_true40, %cond_true.cond_next_crit_edge
+ br i1 false, label %cond_true68, label %cond_next.cond_next73_crit_edge
+
+cond_next.cond_next73_crit_edge: ; preds = %cond_next
+ br label %cond_next73
+
+cond_true68: ; preds = %cond_next
+ br label %cond_next73
+
+cond_next73: ; preds = %cond_true68, %cond_next.cond_next73_crit_edge
+ br i1 false, label %cond_true91, label %cond_next73.cond_next96_crit_edge
+
+cond_next73.cond_next96_crit_edge: ; preds = %cond_next73
+ br label %cond_next96
+
+cond_true91: ; preds = %cond_next73
+ br label %cond_next96
+
+cond_next96: ; preds = %cond_true91, %cond_next73.cond_next96_crit_edge
+ br i1 false, label %cond_next96.cond_next112_crit_edge, label %cond_true105
+
+cond_next96.cond_next112_crit_edge: ; preds = %cond_next96
+ br label %cond_next112
+
+cond_true105: ; preds = %cond_next96
+ br label %cond_next112
+
+cond_next112: ; preds = %cond_true105, %cond_next96.cond_next112_crit_edge
+ br i1 false, label %cond_next112.cond_next127_crit_edge, label %cond_true119
+
+cond_next112.cond_next127_crit_edge: ; preds = %cond_next112
+ br label %cond_next127
+
+cond_true119: ; preds = %cond_next112
+ br label %cond_next127
+
+cond_next127: ; preds = %cond_true119, %cond_next112.cond_next127_crit_edge
+ br i1 false, label %cond_next141, label %cond_true134
+
+cond_true134: ; preds = %cond_next127
+ br i1 false, label %cond_true134.bb161_crit_edge, label %cond_true134.bb_crit_edge
+
+cond_true134.bb_crit_edge: ; preds = %cond_true134
+ br label %bb
+
+cond_true134.bb161_crit_edge: ; preds = %cond_true134
+ br label %bb161
+
+cond_next141: ; preds = %cond_next127
+ br label %bb154
+
+bb: ; preds = %bb154.bb_crit_edge, %cond_true134.bb_crit_edge
+ br label %bb154
+
+bb154: ; preds = %bb, %cond_next141
+ br i1 false, label %bb154.bb161_crit_edge, label %bb154.bb_crit_edge
+
+bb154.bb_crit_edge: ; preds = %bb154
+ br label %bb
+
+bb154.bb161_crit_edge: ; preds = %bb154
+ br label %bb161
+
+bb161: ; preds = %bb154.bb161_crit_edge, %cond_true134.bb161_crit_edge
+ br i1 false, label %bb161.cond_next201_crit_edge, label %cond_true198
+
+bb161.cond_next201_crit_edge: ; preds = %bb161
+ br label %cond_next201
+
+cond_true198: ; preds = %bb161
+ br label %cond_next201
+
+cond_next201: ; preds = %cond_true198, %bb161.cond_next201_crit_edge
+ br i1 false, label %cond_next212, label %cond_true206
+
+cond_true206: ; preds = %cond_next201
+ br label %UnifiedReturnBlock
+
+cond_false: ; preds = %entry
+ br label %UnifiedReturnBlock
+
+cond_next212: ; preds = %cond_next201
+ br label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %cond_next212, %cond_false, %cond_true206
+ ret void
+}
diff --git a/test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll b/test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll
new file mode 100644
index 0000000..767e5db
--- /dev/null
+++ b/test/Analysis/PostDominators/2007-04-20-PostDom-Reset.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -postdomfrontier -disable-output
+
+define void @args_out_of_range() {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ br label %bb
+}
+
+define void @args_out_of_range_3() {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ br label %bb
+}
+
+define void @Feq() {
+entry:
+ br i1 false, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ unreachable
+
+cond_next: ; preds = %entry
+ unreachable
+}
diff --git a/test/Analysis/PostDominators/dg.exp b/test/Analysis/PostDominators/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Analysis/PostDominators/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Analysis/PostDominators/pr1098.ll b/test/Analysis/PostDominators/pr1098.ll
new file mode 100644
index 0000000..afb4776
--- /dev/null
+++ b/test/Analysis/PostDominators/pr1098.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -postdomtree -analyze | grep entry
+; PR932
+
+define void @foo(i1 %x) {
+entry:
+ br i1 %x, label %bb1, label %bb0
+bb0: ; preds = %entry, bb0
+ br label %bb0
+bb1: ; preds = %entry
+ br label %bb2
+bb2: ; preds = %bb1
+ ret void
+}
+
diff --git a/test/Analysis/PostDominators/pr6047_a.ll b/test/Analysis/PostDominators/pr6047_a.ll
new file mode 100644
index 0000000..ec1455b
--- /dev/null
+++ b/test/Analysis/PostDominators/pr6047_a.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -postdomtree -analyze | FileCheck %s
+define internal void @f() {
+entry:
+ br i1 undef, label %bb35, label %bb3.i
+
+bb3.i:
+ br label %bb3.i
+
+bb35.loopexit3:
+ br label %bb35
+
+bb35:
+ ret void
+}
+; CHECK: [3] %entry
diff --git a/test/Analysis/PostDominators/pr6047_b.ll b/test/Analysis/PostDominators/pr6047_b.ll
new file mode 100644
index 0000000..7bd2c86
--- /dev/null
+++ b/test/Analysis/PostDominators/pr6047_b.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -postdomtree -analyze | FileCheck %s
+define internal void @f() {
+entry:
+ br i1 undef, label %a, label %bb3.i
+
+a:
+ br i1 undef, label %bb35, label %bb3.i
+
+bb3.i:
+ br label %bb3.i
+
+
+bb35.loopexit3:
+ br label %bb35
+
+bb35:
+ ret void
+}
+; CHECK: [4] %entry
diff --git a/test/Analysis/PostDominators/pr6047_c.ll b/test/Analysis/PostDominators/pr6047_c.ll
new file mode 100644
index 0000000..08c9551
--- /dev/null
+++ b/test/Analysis/PostDominators/pr6047_c.ll
@@ -0,0 +1,147 @@
+; RUN: opt < %s -postdomtree -analyze | FileCheck %s
+define internal void @f() {
+entry:
+ br i1 undef, label %bb35, label %bb3.i
+
+bb3.i:
+ br label %bb3.i
+
+bb:
+ br label %bb35
+
+bb.i:
+ br label %bb35
+
+_float32_unpack.exit:
+ br label %bb35
+
+bb.i5:
+ br label %bb35
+
+_float32_unpack.exit8:
+ br label %bb35
+
+bb32.preheader:
+ br label %bb35
+
+bb3:
+ br label %bb35
+
+bb3.split.us:
+ br label %bb35
+
+bb.i4.us:
+ br label %bb35
+
+bb7.i.us:
+ br label %bb35
+
+bb.i4.us.backedge:
+ br label %bb35
+
+bb1.i.us:
+ br label %bb35
+
+bb6.i.us:
+ br label %bb35
+
+bb4.i.us:
+ br label %bb35
+
+bb8.i.us:
+ br label %bb35
+
+bb3.i.loopexit.us:
+ br label %bb35
+
+bb.nph21:
+ br label %bb35
+
+bb4:
+ br label %bb35
+
+bb5:
+ br label %bb35
+
+bb14.preheader:
+ br label %bb35
+
+bb.nph18:
+ br label %bb35
+
+bb8.us.preheader:
+ br label %bb35
+
+bb8.preheader:
+ br label %bb35
+
+bb8.us:
+ br label %bb35
+
+bb8:
+ br label %bb35
+
+bb15.loopexit:
+ br label %bb35
+
+bb15.loopexit2:
+ br label %bb35
+
+bb15:
+ br label %bb35
+
+bb16:
+ br label %bb35
+
+bb17.loopexit.split:
+ br label %bb35
+
+bb.nph14:
+ br label %bb35
+
+bb19:
+ br label %bb35
+
+bb20:
+ br label %bb35
+
+bb29.preheader:
+ br label %bb35
+
+bb.nph:
+ br label %bb35
+
+bb23.us.preheader:
+ br label %bb35
+
+bb23.preheader:
+ br label %bb35
+
+bb23.us:
+ br label %bb35
+
+bb23:
+ br label %bb35
+
+bb30.loopexit:
+ br label %bb35
+
+bb30.loopexit1:
+ br label %bb35
+
+bb30:
+ br label %bb35
+
+bb31:
+ br label %bb35
+
+bb35.loopexit:
+ br label %bb35
+
+bb35.loopexit3:
+ br label %bb35
+
+bb35:
+ ret void
+}
+; CHECK: [3] %entry
diff --git a/test/Analysis/PostDominators/pr6047_d.ll b/test/Analysis/PostDominators/pr6047_d.ll
new file mode 100644
index 0000000..4cfa880
--- /dev/null
+++ b/test/Analysis/PostDominators/pr6047_d.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -postdomtree -analyze | FileCheck %s
+define internal void @f() {
+entry:
+ br i1 1, label %a, label %b
+
+a:
+br label %c
+
+b:
+br label %c
+
+c:
+ br i1 undef, label %bb35, label %bb3.i
+
+bb3.i:
+ br label %bb3.i
+
+bb35.loopexit3:
+ br label %bb35
+
+bb35:
+ ret void
+}
+; CHECK: [4] %entry
diff --git a/test/Analysis/Profiling/dg.exp b/test/Analysis/Profiling/dg.exp
new file mode 100644
index 0000000..1eb4755
--- /dev/null
+++ b/test/Analysis/Profiling/dg.exp
@@ -0,0 +1,4 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+
diff --git a/test/Analysis/Profiling/edge-profiling.ll b/test/Analysis/Profiling/edge-profiling.ll
new file mode 100644
index 0000000..cbaf476
--- /dev/null
+++ b/test/Analysis/Profiling/edge-profiling.ll
@@ -0,0 +1,139 @@
+; Test the edge profiling instrumentation.
+; RUN: opt < %s -insert-edge-profiling -S | FileCheck %s
+
+; ModuleID = '<stdin>'
+
[email protected] = private constant [12 x i8] c"hello world\00", align 1 ; <[12 x i8]*> [#uses=1]
[email protected] = private constant [6 x i8] c"franz\00", align 1 ; <[6 x i8]*> [#uses=1]
[email protected] = private constant [9 x i8] c"argc > 2\00", align 1 ; <[9 x i8]*> [#uses=1]
[email protected] = private constant [9 x i8] c"argc = 1\00", align 1 ; <[9 x i8]*> [#uses=1]
[email protected] = private constant [6 x i8] c"fritz\00", align 1 ; <[6 x i8]*> [#uses=1]
[email protected] = private constant [10 x i8] c"argc <= 1\00", align 1 ; <[10 x i8]*> [#uses=1]
+; CHECK:@EdgeProfCounters
+; CHECK:[19 x i32]
+; CHECK:zeroinitializer
+
+define void @oneblock() nounwind {
+entry:
+; CHECK:entry:
+; CHECK:%OldFuncCounter
+; CHECK:load
+; CHECK:getelementptr
+; CHECK:@EdgeProfCounters
+; CHECK:i32 0
+; CHECK:i32 0
+; CHECK:%NewFuncCounter
+; CHECK:add
+; CHECK:%OldFuncCounter
+; CHECK:store
+; CHECK:%NewFuncCounter
+; CHECK:getelementptr
+; CHECK:@EdgeProfCounters
+ %0 = call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @.str, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @puts(i8*)
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+; CHECK:entry:
+ %argc_addr = alloca i32 ; <i32*> [#uses=4]
+ %argv_addr = alloca i8** ; <i8***> [#uses=1]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %j = alloca i32 ; <i32*> [#uses=4]
+ %i = alloca i32 ; <i32*> [#uses=4]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+; CHECK:call
+; CHECK:@llvm_start_edge_profiling
+; CHECK:@EdgeProfCounters
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %argc, i32* %argc_addr
+ store i8** %argv, i8*** %argv_addr
+ store i32 0, i32* %i, align 4
+ br label %bb10
+
+bb: ; preds = %bb10
+; CHECK:bb:
+ %1 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
+ %2 = icmp sgt i32 %1, 1 ; <i1> [#uses=1]
+ br i1 %2, label %bb1, label %bb8
+
+bb1: ; preds = %bb
+; CHECK:bb1:
+ store i32 0, i32* %j, align 4
+ br label %bb6
+
+bb2: ; preds = %bb6
+; CHECK:bb2:
+ %3 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %4 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
+ %5 = icmp sgt i32 %4, 2 ; <i1> [#uses=1]
+ br i1 %5, label %bb3, label %bb4
+
+bb3: ; preds = %bb2
+; CHECK:bb3:
+ %6 = call i32 @puts(i8* getelementptr inbounds ([9 x i8]* @.str2, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %bb5
+
+bb4: ; preds = %bb2
+; CHECK:bb4:
+ %7 = call i32 @puts(i8* getelementptr inbounds ([9 x i8]* @.str3, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %bb11
+
+bb5: ; preds = %bb3
+; CHECK:bb5:
+ %8 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str4, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %9 = load i32* %j, align 4 ; <i32> [#uses=1]
+ %10 = add nsw i32 %9, 1 ; <i32> [#uses=1]
+ store i32 %10, i32* %j, align 4
+ br label %bb6
+
+bb6: ; preds = %bb5, %bb1
+; CHECK:bb6:
+ %11 = load i32* %j, align 4 ; <i32> [#uses=1]
+ %12 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
+ %13 = icmp slt i32 %11, %12 ; <i1> [#uses=1]
+ br i1 %13, label %bb2, label %bb7
+
+bb7: ; preds = %bb6
+; CHECK:bb7:
+ br label %bb9
+
+bb8: ; preds = %bb
+; CHECK:bb8:
+ %14 = call i32 @puts(i8* getelementptr inbounds ([10 x i8]* @.str5, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %bb9
+
+bb9: ; preds = %bb8, %bb7
+; CHECK:bb9:
+ %15 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %16 = add nsw i32 %15, 1 ; <i32> [#uses=1]
+ store i32 %16, i32* %i, align 4
+ br label %bb10
+
+bb10: ; preds = %bb9, %entry
+; CHECK:bb10:
+ %17 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %18 = icmp ne i32 %17, 3 ; <i1> [#uses=1]
+ br i1 %18, label %bb, label %bb11
+; CHECK:br
+; CHECK:label %bb10.bb11_crit_edge
+
+; CHECK:bb10.bb11_crit_edge:
+; CHECK:br
+; CHECK:label %bb11
+
+bb11: ; preds = %bb10, %bb4
+; CHECK:bb11:
+ call void @oneblock() nounwind
+ store i32 0, i32* %0, align 4
+ %19 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %19, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %bb11
+; CHECK:return:
+ %retval12 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval12
+}
diff --git a/test/Analysis/Profiling/profiling-tool-chain.ll b/test/Analysis/Profiling/profiling-tool-chain.ll
new file mode 100644
index 0000000..5ac31b5
--- /dev/null
+++ b/test/Analysis/Profiling/profiling-tool-chain.ll
@@ -0,0 +1,212 @@
+; RUN: llvm-as %s -o %t1
+
+; FIXME: The RUX parts of the test are disabled for now, they aren't working on
+; llvm-gcc-x86_64-darwin10-selfhost.
+
+; Test the edge optimal profiling instrumentation.
+; RUN: opt %t1 -insert-optimal-edge-profiling -o %t2
+; RUX: llvm-dis < %t2 | FileCheck --check-prefix=INST %s
+
+; Test the creation, reading and displaying of profile
+; RUX: rm -f llvmprof.out
+; RUX: lli -load %llvmlibsdir/profile_rt%shlibext %t2
+; RUX: lli -load %llvmlibsdir/profile_rt%shlibext %t2 1 2
+; RUX: llvm-prof -print-all-code %t1 | FileCheck --check-prefix=PROF %s
+
+; Test the loaded profile also with verifier.
+; RUX opt %t1 -profile-loader -profile-verifier -o %t3
+
+; Test profile estimator.
+; RUN: opt %t1 -profile-estimator -profile-verifier -o %t3
+
+; PROF: 1. 2/4 oneblock
+; PROF: 2. 2/4 main
+; PROF: 1. 15.7895% 12/76 main() - bb6
+; PROF: 2. 11.8421% 9/76 main() - bb2
+; PROF: 3. 11.8421% 9/76 main() - bb3
+; PROF: 4. 11.8421% 9/76 main() - bb5
+; PROF: 5. 10.5263% 8/76 main() - bb10
+; PROF: 6. 7.89474% 6/76 main() - bb
+; PROF: 7. 7.89474% 6/76 main() - bb9
+; PROF: 8. 3.94737% 3/76 main() - bb1
+; PROF: 9. 3.94737% 3/76 main() - bb7
+; PROF: 10. 3.94737% 3/76 main() - bb8
+; PROF: 11. 2.63158% 2/76 oneblock() - entry
+; PROF: 12. 2.63158% 2/76 main() - entry
+; PROF: 13. 2.63158% 2/76 main() - bb11
+; PROF: 14. 2.63158% 2/76 main() - return
+
+; ModuleID = '<stdin>'
+
[email protected] = private constant [12 x i8] c"hello world\00", align 1 ; <[12 x i8]*> [#uses=1]
[email protected] = private constant [6 x i8] c"franz\00", align 1 ; <[6 x i8]*> [#uses=1]
[email protected] = private constant [9 x i8] c"argc > 2\00", align 1 ; <[9 x i8]*> [#uses=1]
[email protected] = private constant [9 x i8] c"argc = 1\00", align 1 ; <[9 x i8]*> [#uses=1]
[email protected] = private constant [6 x i8] c"fritz\00", align 1 ; <[6 x i8]*> [#uses=1]
[email protected] = private constant [10 x i8] c"argc <= 1\00", align 1 ; <[10 x i8]*> [#uses=1]
+; INST:@OptEdgeProfCounters
+; INST:[21 x i32]
+; INST:[i32 0,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 0,
+; INST:i32 0,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 0,
+; INST:i32 0,
+; INST:i32 -1,
+; INST:i32 -1,
+; INST:i32 0,
+; INST:i32 -1,
+; INST:i32 -1]
+
+; PROF:;;; %oneblock called 2 times.
+; PROF:;;;
+define void @oneblock() nounwind {
+entry:
+; PROF:entry:
+; PROF: ;;; Basic block executed 2 times.
+ %0 = call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @.str, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @puts(i8*)
+
+; PROF:;;; %main called 2 times.
+; PROF:;;;
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+; PROF:entry:
+; PROF: ;;; Basic block executed 2 times.
+ %argc_addr = alloca i32 ; <i32*> [#uses=4]
+ %argv_addr = alloca i8** ; <i8***> [#uses=1]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %j = alloca i32 ; <i32*> [#uses=4]
+ %i = alloca i32 ; <i32*> [#uses=4]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+; INST:call
+; INST:@llvm_start_opt_edge_profiling
+; INST:@OptEdgeProfCounters
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %argc, i32* %argc_addr
+ store i8** %argv, i8*** %argv_addr
+ store i32 0, i32* %i, align 4
+ br label %bb10
+; PROF: ;;; Out-edge counts: [2.000000e+00 -> bb10]
+
+bb: ; preds = %bb10
+; PROF:bb:
+; PROF: ;;; Basic block executed 6 times.
+ %1 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
+ %2 = icmp sgt i32 %1, 1 ; <i1> [#uses=1]
+ br i1 %2, label %bb1, label %bb8
+; PROF: ;;; Out-edge counts: [3.000000e+00 -> bb1] [3.000000e+00 -> bb8]
+
+bb1: ; preds = %bb
+; PROF:bb1:
+; PROF: ;;; Basic block executed 3 times.
+ store i32 0, i32* %j, align 4
+ br label %bb6
+; PROF: ;;; Out-edge counts: [3.000000e+00 -> bb6]
+
+bb2: ; preds = %bb6
+; PROF:bb2:
+; PROF: ;;; Basic block executed 9 times.
+ %3 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %4 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
+ %5 = icmp sgt i32 %4, 2 ; <i1> [#uses=1]
+ br i1 %5, label %bb3, label %bb4
+; PROF: ;;; Out-edge counts: [9.000000e+00 -> bb3]
+
+bb3: ; preds = %bb2
+; PROF:bb3:
+; PROF: ;;; Basic block executed 9 times.
+ %6 = call i32 @puts(i8* getelementptr inbounds ([9 x i8]* @.str2, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %bb5
+; PROF: ;;; Out-edge counts: [9.000000e+00 -> bb5]
+
+bb4: ; preds = %bb2
+; PROF:bb4:
+; PROF: ;;; Never executed!
+ %7 = call i32 @puts(i8* getelementptr inbounds ([9 x i8]* @.str3, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %bb11
+
+bb5: ; preds = %bb3
+; PROF:bb5:
+; PROF: ;;; Basic block executed 9 times.
+ %8 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str4, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ %9 = load i32* %j, align 4 ; <i32> [#uses=1]
+ %10 = add nsw i32 %9, 1 ; <i32> [#uses=1]
+ store i32 %10, i32* %j, align 4
+ br label %bb6
+; PROF: ;;; Out-edge counts: [9.000000e+00 -> bb6]
+
+bb6: ; preds = %bb5, %bb1
+; PROF:bb6:
+; PROF: ;;; Basic block executed 12 times.
+ %11 = load i32* %j, align 4 ; <i32> [#uses=1]
+ %12 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
+ %13 = icmp slt i32 %11, %12 ; <i1> [#uses=1]
+ br i1 %13, label %bb2, label %bb7
+; PROF: ;;; Out-edge counts: [9.000000e+00 -> bb2] [3.000000e+00 -> bb7]
+
+bb7: ; preds = %bb6
+; PROF:bb7:
+; PROF: ;;; Basic block executed 3 times.
+ br label %bb9
+; PROF: ;;; Out-edge counts: [3.000000e+00 -> bb9]
+
+bb8: ; preds = %bb
+; PROF:bb8:
+; PROF: ;;; Basic block executed 3 times.
+ %14 = call i32 @puts(i8* getelementptr inbounds ([10 x i8]* @.str5, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %bb9
+; PROF: ;;; Out-edge counts: [3.000000e+00 -> bb9]
+
+bb9: ; preds = %bb8, %bb7
+; PROF:bb9:
+; PROF: ;;; Basic block executed 6 times.
+ %15 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %16 = add nsw i32 %15, 1 ; <i32> [#uses=1]
+ store i32 %16, i32* %i, align 4
+ br label %bb10
+; PROF: ;;; Out-edge counts: [6.000000e+00 -> bb10]
+
+bb10: ; preds = %bb9, %entry
+; PROF:bb10:
+; PROF: ;;; Basic block executed 8 times.
+ %17 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %18 = icmp ne i32 %17, 3 ; <i1> [#uses=1]
+ br i1 %18, label %bb, label %bb11
+; INST:br
+; INST:label %bb10.bb11_crit_edge
+; PROF: ;;; Out-edge counts: [6.000000e+00 -> bb] [2.000000e+00 -> bb11]
+
+; INST:bb10.bb11_crit_edge:
+; INST:br
+; INST:label %bb11
+
+bb11: ; preds = %bb10, %bb4
+; PROF:bb11:
+; PROF: ;;; Basic block executed 2 times.
+ call void @oneblock() nounwind
+ store i32 0, i32* %0, align 4
+ %19 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %19, i32* %retval, align 4
+ br label %return
+; PROF: ;;; Out-edge counts: [2.000000e+00 -> return]
+
+return: ; preds = %bb11
+; PROF:return:
+; PROF: ;;; Basic block executed 2 times.
+ %retval12 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval12
+}
diff --git a/test/Analysis/ScalarEvolution/2007-07-15-NegativeStride.ll b/test/Analysis/ScalarEvolution/2007-07-15-NegativeStride.ll
new file mode 100644
index 0000000..7ff130f
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2007-07-15-NegativeStride.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | grep {Loop %bb: backedge-taken count is 100}
+; PR1533
+
+@array = weak global [101 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=1]
+
+define void @loop(i32 %x) {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %i.01.0 = phi i32 [ 100, %entry ], [ %tmp4, %bb ] ; <i32> [#uses=2]
+ %tmp1 = getelementptr [101 x i32]* @array, i32 0, i32 %i.01.0 ; <i32*> [#uses=1]
+ store i32 %x, i32* %tmp1
+ %tmp4 = add i32 %i.01.0, -1 ; <i32> [#uses=2]
+ %tmp7 = icmp sgt i32 %tmp4, -1 ; <i1> [#uses=1]
+ br i1 %tmp7, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/2007-08-06-MisinterpretBranch.ll b/test/Analysis/ScalarEvolution/2007-08-06-MisinterpretBranch.ll
new file mode 100644
index 0000000..e67e4d0
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2007-08-06-MisinterpretBranch.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -indvars -adce -simplifycfg -S | grep "icmp s"
+; PR1598
+
+define i32 @f(i32 %a, i32 %b, i32 %x, i32 %y) {
+entry:
+ %tmp3 = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp3, label %return, label %bb
+
+bb: ; preds = %bb, %entry
+ %x_addr.0 = phi i32 [ %tmp6, %bb ], [ %x, %entry ] ; <i32> [#uses=1]
+ %tmp6 = add i32 %x_addr.0, 1 ; <i32> [#uses=3]
+ %tmp9 = icmp slt i32 %tmp6, %y ; <i1> [#uses=1]
+ br i1 %tmp9, label %bb, label %return
+
+return: ; preds = %bb, %entry
+ %x_addr.1 = phi i32 [ %x, %entry ], [ %tmp6, %bb ] ; <i32> [#uses=1]
+ ret i32 %x_addr.1
+}
diff --git a/test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll b/test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll
new file mode 100644
index 0000000..ab96243
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -scalar-evolution -analyze | grep {Loop %bb: backedge-taken count is (-1 + (-1 \\* %x) + %y)}
+; PR1597
+
+define i32 @f(i32 %x, i32 %y) {
+entry:
+ %tmp63 = icmp ult i32 %x, %y ; <i1> [#uses=1]
+ br i1 %tmp63, label %bb.preheader, label %bb8
+
+bb.preheader: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb3, %bb.preheader
+ %x_addr.0 = phi i32 [ %tmp2, %bb3 ], [ %x, %bb.preheader ] ; <i32> [#uses=1]
+ %tmp2 = add i32 %x_addr.0, 1 ; <i32> [#uses=3]
+ br label %bb3
+
+bb3: ; preds = %bb
+ %tmp6 = icmp ult i32 %tmp2, %y ; <i1> [#uses=1]
+ br i1 %tmp6, label %bb, label %bb8.loopexit
+
+bb8.loopexit: ; preds = %bb3
+ br label %bb8
+
+bb8: ; preds = %bb8.loopexit, %entry
+ %x_addr.1 = phi i32 [ %x, %entry ], [ %tmp2, %bb8.loopexit ] ; <i32> [#uses=1]
+ br label %return
+
+return: ; preds = %bb8
+ ret i32 %x_addr.1
+}
diff --git a/test/Analysis/ScalarEvolution/2007-09-27-LargeStepping.ll b/test/Analysis/ScalarEvolution/2007-09-27-LargeStepping.ll
new file mode 100644
index 0000000..b678fee
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2007-09-27-LargeStepping.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | grep {backedge-taken count is 13}
+; PR1706
+
+define i32 @f() {
+entry:
+ br label %bb5
+
+bb: ; preds = %bb5
+ %tmp2 = shl i32 %j.0, 1 ; <i32> [#uses=1]
+ %tmp4 = add i32 %i.0, 268435456 ; <i32> [#uses=1]
+ br label %bb5
+
+bb5: ; preds = %bb, %entry
+ %j.0 = phi i32 [ 1, %entry ], [ %tmp2, %bb ] ; <i32> [#uses=2]
+ %i.0 = phi i32 [ -1879048192, %entry ], [ %tmp4, %bb ] ; <i32> [#uses=2]
+ %tmp7 = icmp slt i32 %i.0, 1610612736 ; <i1> [#uses=1]
+ br i1 %tmp7, label %bb, label %return
+
+return: ; preds = %bb5
+ ret i32 %j.0
+}
diff --git a/test/Analysis/ScalarEvolution/2007-11-14-SignedAddRec.ll b/test/Analysis/ScalarEvolution/2007-11-14-SignedAddRec.ll
new file mode 100644
index 0000000..514920f
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2007-11-14-SignedAddRec.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -indvars -S | grep printd | grep 1206807378
+; PR1798
+
+declare void @printd(i32)
+
+define i32 @test() {
+entry:
+ br label %bb6
+
+bb: ; preds = %bb6
+ %tmp3 = add i32 %x.0, %i.0 ; <i32> [#uses=1]
+ %tmp5 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %bb6
+
+bb6: ; preds = %bb, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %tmp5, %bb ] ; <i32> [#uses=3]
+ %x.0 = phi i32 [ 0, %entry ], [ %tmp3, %bb ] ; <i32> [#uses=3]
+ %tmp8 = icmp slt i32 %i.0, 123456789 ; <i1> [#uses=1]
+ br i1 %tmp8, label %bb, label %bb10
+
+bb10: ; preds = %bb6
+ call void @printd(i32 %x.0)
+ ret i32 0
+}
diff --git a/test/Analysis/ScalarEvolution/2007-11-18-OrInstruction.ll b/test/Analysis/ScalarEvolution/2007-11-18-OrInstruction.ll
new file mode 100644
index 0000000..c12721d
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2007-11-18-OrInstruction.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -analyze -scalar-evolution | FileCheck %s
+; PR1810
+
+define void @fun() {
+entry:
+ br label %header
+header:
+ %i = phi i32 [ 1, %entry ], [ %i.next, %body ]
+ %cond = icmp eq i32 %i, 10
+ br i1 %cond, label %exit, label %body
+body:
+ %a = mul i32 %i, 5
+ %b = or i32 %a, 1
+ %i.next = add i32 %i, 1
+ br label %header
+exit:
+ ret void
+}
+
+; CHECK: --> %b
+
diff --git a/test/Analysis/ScalarEvolution/2008-02-11-ReversedCondition.ll b/test/Analysis/ScalarEvolution/2008-02-11-ReversedCondition.ll
new file mode 100644
index 0000000..fe3a7f4
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-02-11-ReversedCondition.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -scalar-evolution -analyze | grep {Loop %header: backedge-taken count is (0 smax %n)}
+
+define void @foo(i32 %n) {
+entry:
+ br label %header
+header:
+ %i = phi i32 [ 0, %entry ], [ %i.inc, %next ]
+ %cond = icmp sgt i32 %n, %i
+ br i1 %cond, label %next, label %return
+next:
+ %i.inc = add i32 %i, 1
+ br label %header
+return:
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/2008-02-12-SMAXTripCount.ll b/test/Analysis/ScalarEvolution/2008-02-12-SMAXTripCount.ll
new file mode 100644
index 0000000..4f14a0d
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-02-12-SMAXTripCount.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -scalar-evolution -analyze | grep {Loop %loop: backedge-taken count is (100 + (-100 smax %n))}
+; PR2002
+
+define void @foo(i8 %n) {
+entry:
+ br label %loop
+loop:
+ %i = phi i8 [ -100, %entry ], [ %i.inc, %next ]
+ %cond = icmp slt i8 %i, %n
+ br i1 %cond, label %next, label %return
+next:
+ %i.inc = add i8 %i, 1
+ br label %loop
+return:
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/2008-02-15-UMax.ll b/test/Analysis/ScalarEvolution/2008-02-15-UMax.ll
new file mode 100644
index 0000000..52c7985
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-02-15-UMax.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -analyze -scalar-evolution | grep umax
+; PR2003
+
+define i32 @foo(i32 %n) {
+entry:
+ br label %header
+header:
+ %i = phi i32 [ 100, %entry ], [ %i.inc, %next ]
+ %cond = icmp ult i32 %i, %n
+ br i1 %cond, label %next, label %return
+next:
+ %i.inc = add i32 %i, 1
+ br label %header
+return:
+ ret i32 %i
+}
+
diff --git a/test/Analysis/ScalarEvolution/2008-05-25-NegativeStepToZero.ll b/test/Analysis/ScalarEvolution/2008-05-25-NegativeStepToZero.ll
new file mode 100644
index 0000000..bcc124d1
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-05-25-NegativeStepToZero.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | grep {backedge-taken count is 61}
+; PR2364
+
+define i32 @func_6() nounwind {
+entry:
+ br label %bb5
+
+bb: ; preds = %bb5
+ %tmp2 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ %tmp4 = add i8 %x.0, -4 ; <i8> [#uses=1]
+ br label %bb5
+
+bb5: ; preds = %bb, %entry
+ %x.0 = phi i8 [ 0, %entry ], [ %tmp4, %bb ] ; <i8> [#uses=2]
+ %i.0 = phi i32 [ 0, %entry ], [ %tmp2, %bb ] ; <i32> [#uses=2]
+ %tmp7 = icmp eq i8 %x.0, 12 ; <i1> [#uses=1]
+ br i1 %tmp7, label %return, label %bb
+
+return: ; preds = %bb5
+ ret i32 %i.0
+}
diff --git a/test/Analysis/ScalarEvolution/2008-06-12-BinomialInt64.ll b/test/Analysis/ScalarEvolution/2008-06-12-BinomialInt64.ll
new file mode 100644
index 0000000..d503329
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-06-12-BinomialInt64.ll
@@ -0,0 +1,43 @@
+; RUN: opt < %s -analyze -scalar-evolution 2>/dev/null
+; PR2433
+
+define i32 @main1(i32 %argc, i8** %argv) nounwind {
+entry:
+ br i1 false, label %bb10, label %bb23
+
+bb10: ; preds = %bb10, %entry
+ %accum.03 = phi i64 [ %tmp14, %bb10 ], [ 0, %entry ] ; <i64> [#uses=1]
+ %i.02 = phi i32 [ %tmp16, %bb10 ], [ 0, %entry ] ; <i32> [#uses=1]
+ %d.1.01 = phi i64 [ %tmp5.i, %bb10 ], [ 0, %entry ] ; <i64> [#uses=1]
+ %tmp5.i = add i64 %d.1.01, 1 ; <i64> [#uses=2]
+ %tmp14 = add i64 %accum.03, %tmp5.i ; <i64> [#uses=2]
+ %tmp16 = add i32 %i.02, 1 ; <i32> [#uses=2]
+ %tmp20 = icmp slt i32 %tmp16, 0 ; <i1> [#uses=1]
+ br i1 %tmp20, label %bb10, label %bb23
+
+bb23: ; preds = %bb10, %entry
+ %accum.0.lcssa = phi i64 [ 0, %entry ], [ %tmp14, %bb10 ] ; <i64> [#uses=0]
+ ret i32 0
+}
+
+define i32 @main2(i32 %argc, i8** %argv) {
+entry:
+ %tmp8 = tail call i32 @atoi( i8* null ) nounwind readonly ; <i32> [#uses=1]
+ br i1 false, label %bb9, label %bb21
+
+bb9: ; preds = %bb9, %entry
+ %accum.03 = phi i64 [ %tmp12, %bb9 ], [ 0, %entry ] ; <i64> [#uses=1]
+ %i.02 = phi i32 [ %tmp14, %bb9 ], [ 0, %entry ] ; <i32> [#uses=1]
+ %d.1.01 = phi i64 [ %tmp4.i, %bb9 ], [ 0, %entry ] ; <i64> [#uses=1]
+ %tmp4.i = add i64 %d.1.01, 1 ; <i64> [#uses=2]
+ %tmp12 = add i64 %accum.03, %tmp4.i ; <i64> [#uses=2]
+ %tmp14 = add i32 %i.02, 1 ; <i32> [#uses=2]
+ %tmp18 = icmp slt i32 %tmp14, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp18, label %bb9, label %bb21
+
+bb21: ; preds = %bb9, %entry
+ %accum.0.lcssa = phi i64 [ 0, %entry ], [ %tmp12, %bb9 ] ; <i64> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @atoi(i8*) nounwind readonly
diff --git a/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll b/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll
new file mode 100644
index 0000000..9db9b71
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -analyze -scalar-evolution |& not grep smax
+; PR2261
+
+@lut = common global [256 x i8] zeroinitializer, align 32 ; <[256 x i8]*> [#uses=1]
+
+define void @foo(i32 %count, i32* %srcptr, i32* %dstptr) nounwind {
+entry:
+ icmp sgt i32 %count, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %j.01 = phi i32 [ %8, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=1]
+ load i32* %srcptr, align 4 ; <i32>:1 [#uses=2]
+ and i32 %1, 255 ; <i32>:2 [#uses=1]
+ and i32 %1, -256 ; <i32>:3 [#uses=1]
+ getelementptr [256 x i8]* @lut, i32 0, i32 %2 ; <i8*>:4 [#uses=1]
+ load i8* %4, align 1 ; <i8>:5 [#uses=1]
+ zext i8 %5 to i32 ; <i32>:6 [#uses=1]
+ or i32 %6, %3 ; <i32>:7 [#uses=1]
+ store i32 %7, i32* %dstptr, align 4
+ add i32 %j.01, 1 ; <i32>:8 [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ icmp slt i32 %8, %count ; <i1>:9 [#uses=1]
+ br i1 %9, label %bb, label %bb1.return_crit_edge
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll b/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll
new file mode 100644
index 0000000..184766555
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -analyze -scalar-evolution |& not grep smax
+; PR2070
+
+define i32 @a(i32 %x) nounwind {
+entry:
+ icmp sgt i32 %x, 1 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb.nph, label %bb2
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %z.02 = phi i32 [ %1, %bb1 ], [ 1, %bb.nph ] ; <i32> [#uses=1]
+ %i.01 = phi i32 [ %2, %bb1 ], [ 1, %bb.nph ] ; <i32> [#uses=2]
+ mul i32 %z.02, %i.01 ; <i32>:1 [#uses=2]
+ add i32 %i.01, 1 ; <i32>:2 [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ icmp slt i32 %2, %x ; <i1>:3 [#uses=1]
+ br i1 %3, label %bb, label %bb1.bb2_crit_edge
+
+bb1.bb2_crit_edge: ; preds = %bb1
+ %.lcssa = phi i32 [ %1, %bb1 ] ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1.bb2_crit_edge, %entry
+ %z.0.lcssa = phi i32 [ %.lcssa, %bb1.bb2_crit_edge ], [ 1, %entry ] ; <i32> [#uses=1]
+ ret i32 %z.0.lcssa
+}
diff --git a/test/Analysis/ScalarEvolution/2008-07-19-InfiniteLoop.ll b/test/Analysis/ScalarEvolution/2008-07-19-InfiniteLoop.ll
new file mode 100644
index 0000000..1865c05
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-07-19-InfiniteLoop.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | grep Unpredictable
+; PR2088
+
+define void @fun() {
+entry:
+ br label %loop
+loop:
+ %i = phi i8 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add i8 %i, 4
+ %cond = icmp ne i8 %i.next, 6
+ br i1 %cond, label %loop, label %exit
+exit:
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/2008-07-19-WrappingIV.ll b/test/Analysis/ScalarEvolution/2008-07-19-WrappingIV.ll
new file mode 100644
index 0000000..86e07ec4
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-07-19-WrappingIV.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | grep {backedge-taken count is 113}
+; PR2088
+
+define void @fun() {
+entry:
+ br label %loop
+loop:
+ %i = phi i8 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add i8 %i, 18
+ %cond = icmp ne i8 %i.next, 4
+ br i1 %cond, label %loop, label %exit
+exit:
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/2008-07-29-SGTTripCount.ll b/test/Analysis/ScalarEvolution/2008-07-29-SGTTripCount.ll
new file mode 100644
index 0000000..75bd634
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-07-29-SGTTripCount.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | FileCheck %s
+; PR2607
+
+define i32 @_Z1aj(i32 %j) nounwind {
+entry:
+ icmp sgt i32 0, %j ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb, %bb.preheader
+ %i.01 = phi i32 [ %1, %bb ], [ 0, %bb.preheader ] ; <i32> [#uses=1]
+ add i32 %i.01, -1 ; <i32>:1 [#uses=3]
+ icmp sgt i32 %1, %j ; <i1>:2 [#uses=1]
+ br i1 %2, label %bb, label %return.loopexit
+
+return.loopexit: ; preds = %bb
+ br label %return
+
+return: ; preds = %return.loopexit, %entry
+ %i.0.lcssa = phi i32 [ 0, %entry ], [ %1, %return.loopexit ] ; <i32> [#uses=1]
+ ret i32 %i.0.lcssa
+}
+
+; CHECK: backedge-taken count is (-1 + (-1 * %j))
+
diff --git a/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll b/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll
new file mode 100644
index 0000000..1626c1f
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | FileCheck %s
+; PR2607
+
+define i32 @b(i32 %x, i32 %y) nounwind {
+entry:
+ %cmp2 = icmp slt i32 %y, %x
+ %cond3 = select i1 %cmp2, i32 %y, i32 %x
+ %cmp54 = icmp slt i32 %cond3, -2147483632
+ br i1 %cmp54, label %forinc, label %afterfor
+
+forinc: ; preds = %forinc, %entry
+ %j.01 = phi i32 [ %dec, %forinc ], [ -2147483632, %entry ]
+ %dec = add i32 %j.01, -1
+ %cmp = icmp slt i32 %y, %x
+ %cond = select i1 %cmp, i32 %y, i32 %x
+ %cmp5 = icmp sgt i32 %dec, %cond
+ br i1 %cmp5, label %forinc, label %afterfor
+
+afterfor: ; preds = %forinc, %entry
+ %j.0.lcssa = phi i32 [ -2147483632, %entry ], [ %dec, %forinc ]
+ ret i32 %j.0.lcssa
+}
+
+; CHECK: backedge-taken count is (-2147483632 + ((-1 + (-1 * %x)) smax (-1 + (-1 * %y))))
+
diff --git a/test/Analysis/ScalarEvolution/2008-08-04-IVOverflow.ll b/test/Analysis/ScalarEvolution/2008-08-04-IVOverflow.ll
new file mode 100644
index 0000000..3b31d79
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-08-04-IVOverflow.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | FileCheck %s
+; PR2621
+
+define i32 @a() nounwind {
+entry:
+ br label %bb1
+
+bb:
+ trunc i32 %i.0 to i16
+ add i16 %0, %x16.0
+ add i32 %i.0, 1
+ br label %bb1
+
+bb1:
+ %i.0 = phi i32 [ 0, %entry ], [ %2, %bb ]
+ %x16.0 = phi i16 [ 0, %entry ], [ %1, %bb ]
+ icmp ult i32 %i.0, 888888
+ br i1 %3, label %bb, label %bb2
+
+bb2:
+ zext i16 %x16.0 to i32
+ ret i32 %4
+}
+
+; CHECK: Exits: 20028
+
diff --git a/test/Analysis/ScalarEvolution/2008-08-04-LongAddRec.ll b/test/Analysis/ScalarEvolution/2008-08-04-LongAddRec.ll
new file mode 100644
index 0000000..b296a19
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-08-04-LongAddRec.ll
@@ -0,0 +1,58 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | FileCheck %s
+; PR2621
+
+define i32 @a() nounwind {
+entry:
+ br label %bb1
+
+bb: ; preds = %bb1
+ add i16 %x17.0, 1 ; <i16>:0 [#uses=2]
+ add i16 %0, %x16.0 ; <i16>:1 [#uses=2]
+ add i16 %1, %x15.0 ; <i16>:2 [#uses=2]
+ add i16 %2, %x14.0 ; <i16>:3 [#uses=2]
+ add i16 %3, %x13.0 ; <i16>:4 [#uses=2]
+ add i16 %4, %x12.0 ; <i16>:5 [#uses=2]
+ add i16 %5, %x11.0 ; <i16>:6 [#uses=2]
+ add i16 %6, %x10.0 ; <i16>:7 [#uses=2]
+ add i16 %7, %x9.0 ; <i16>:8 [#uses=2]
+ add i16 %8, %x8.0 ; <i16>:9 [#uses=2]
+ add i16 %9, %x7.0 ; <i16>:10 [#uses=2]
+ add i16 %10, %x6.0 ; <i16>:11 [#uses=2]
+ add i16 %11, %x5.0 ; <i16>:12 [#uses=2]
+ add i16 %12, %x4.0 ; <i16>:13 [#uses=2]
+ add i16 %13, %x3.0 ; <i16>:14 [#uses=2]
+ add i16 %14, %x2.0 ; <i16>:15 [#uses=2]
+ add i16 %15, %x1.0 ; <i16>:16 [#uses=1]
+ add i32 %i.0, 1 ; <i32>:17 [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %x2.0 = phi i16 [ 0, %entry ], [ %15, %bb ] ; <i16> [#uses=1]
+ %x3.0 = phi i16 [ 0, %entry ], [ %14, %bb ] ; <i16> [#uses=1]
+ %x4.0 = phi i16 [ 0, %entry ], [ %13, %bb ] ; <i16> [#uses=1]
+ %x5.0 = phi i16 [ 0, %entry ], [ %12, %bb ] ; <i16> [#uses=1]
+ %x6.0 = phi i16 [ 0, %entry ], [ %11, %bb ] ; <i16> [#uses=1]
+ %x7.0 = phi i16 [ 0, %entry ], [ %10, %bb ] ; <i16> [#uses=1]
+ %x8.0 = phi i16 [ 0, %entry ], [ %9, %bb ] ; <i16> [#uses=1]
+ %x9.0 = phi i16 [ 0, %entry ], [ %8, %bb ] ; <i16> [#uses=1]
+ %x10.0 = phi i16 [ 0, %entry ], [ %7, %bb ] ; <i16> [#uses=1]
+ %x11.0 = phi i16 [ 0, %entry ], [ %6, %bb ] ; <i16> [#uses=1]
+ %x12.0 = phi i16 [ 0, %entry ], [ %5, %bb ] ; <i16> [#uses=1]
+ %x13.0 = phi i16 [ 0, %entry ], [ %4, %bb ] ; <i16> [#uses=1]
+ %x14.0 = phi i16 [ 0, %entry ], [ %3, %bb ] ; <i16> [#uses=1]
+ %x15.0 = phi i16 [ 0, %entry ], [ %2, %bb ] ; <i16> [#uses=1]
+ %x16.0 = phi i16 [ 0, %entry ], [ %1, %bb ] ; <i16> [#uses=1]
+ %x17.0 = phi i16 [ 0, %entry ], [ %0, %bb ] ; <i16> [#uses=1]
+ %i.0 = phi i32 [ 0, %entry ], [ %17, %bb ] ; <i32> [#uses=2]
+ %x1.0 = phi i16 [ 0, %entry ], [ %16, %bb ] ; <i16> [#uses=2]
+ icmp ult i32 %i.0, 8888 ; <i1>:18 [#uses=1]
+ br i1 %18, label %bb, label %bb2
+
+bb2: ; preds = %bb1
+ zext i16 %x1.0 to i32 ; <i32>:19 [#uses=1]
+ ret i32 %19
+}
+
+; CHECK: Exits: -19168
+
diff --git a/test/Analysis/ScalarEvolution/2008-11-02-QuadraticCrash.ll b/test/Analysis/ScalarEvolution/2008-11-02-QuadraticCrash.ll
new file mode 100644
index 0000000..7722122
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-11-02-QuadraticCrash.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -analyze -scalar-evolution
+; PR1827
+
+declare void @use(i32)
+
+define void @foo() {
+entry:
+ br label %loop_1
+
+loop_1: ; preds = %loop_1, %entry
+ %a = phi i32 [ 2, %entry ], [ %b, %loop_1 ] ; <i32> [#uses=2]
+ %c = phi i32 [ 5, %entry ], [ %d, %loop_1 ] ; <i32> [#uses=1]
+ %b = add i32 %a, 1 ; <i32> [#uses=1]
+ %d = add i32 %c, %a ; <i32> [#uses=3]
+ %A = icmp ult i32 %d, 50 ; <i1> [#uses=1]
+ br i1 %A, label %loop_1, label %endloop
+
+endloop: ; preds = %loop_1
+ call void @use(i32 %d)
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/2008-11-15-CubicOOM.ll b/test/Analysis/ScalarEvolution/2008-11-15-CubicOOM.ll
new file mode 100644
index 0000000..2e2aabc
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-11-15-CubicOOM.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -analyze -scalar-evolution
+; PR2602
+
+define i32 @a() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %w.0 = phi i32 [ 0, %entry ], [ %tmp, %bb ] ; <i32> [#uses=2]
+ %e.0 = phi i32 [ 0, %entry ], [ %e.1, %bb ] ; <i32> [#uses=2]
+ %w.1 = add i32 0, %w.0 ; <i32>:0 [#uses=1]
+ %tmp = add i32 %e.0, %w.0 ; <i32>:1 [#uses=1]
+ %e.1 = add i32 %e.0, 1 ; <i32>:2 [#uses=1]
+ %cond = icmp eq i32 %w.1, -1 ; <i1>:3 [#uses=1]
+ br i1 %cond, label %return, label %bb
+
+return: ; preds = %bb
+ ret i32 undef
+}
diff --git a/test/Analysis/ScalarEvolution/2008-11-18-LessThanOrEqual.ll b/test/Analysis/ScalarEvolution/2008-11-18-LessThanOrEqual.ll
new file mode 100644
index 0000000..06637b5
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-11-18-LessThanOrEqual.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -analyze -scalar-evolution |& \
+; RUN: grep {Loop %bb: backedge-taken count is (7 + (-1 \\* %argc))}
+; XFAIL: *
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ %0 = icmp ugt i32 %argc, 7 ; <i1> [#uses=1]
+ br i1 %0, label %bb2, label %bb.nph
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb.nph, %bb1
+ %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb1 ] ; <i32> [#uses=2]
+ %argc_addr.04 = add i32 %indvar, %argc ; <i32> [#uses=1]
+ tail call void (...)* @Test() nounwind
+ %1 = add i32 %argc_addr.04, 1 ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %phitmp = icmp ugt i32 %1, 7 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %phitmp, label %bb1.bb2_crit_edge, label %bb
+
+bb1.bb2_crit_edge: ; preds = %bb1
+ br label %bb2
+
+bb2: ; preds = %bb1.bb2_crit_edge, %entry
+ ret i32 0
+}
+
+declare void @Test(...)
diff --git a/test/Analysis/ScalarEvolution/2008-11-18-Stride1.ll b/test/Analysis/ScalarEvolution/2008-11-18-Stride1.ll
new file mode 100644
index 0000000..db527fe
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-11-18-Stride1.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: | grep {Loop %bb: Unpredictable backedge-taken count\\.}
+
+; ScalarEvolution can't compute a trip count because it doesn't know if
+; dividing by the stride will have a remainder. This could theoretically
+; be teaching it how to use a more elaborate trip count computation.
+
+define i32 @f(i32 %x) nounwind readnone {
+entry:
+ %0 = icmp ugt i32 %x, 4 ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %bb2
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb.nph, %bb1
+ %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb1 ] ; <i32> [#uses=2]
+ %tmp = mul i32 %indvar, -3 ; <i32> [#uses=1]
+ %x_addr.04 = add i32 %tmp, %x ; <i32> [#uses=1]
+ %1 = add i32 %x_addr.04, -3 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %2 = icmp ugt i32 %1, 4 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %2, label %bb, label %bb1.bb2_crit_edge
+
+bb1.bb2_crit_edge: ; preds = %bb1
+ %.lcssa = phi i32 [ %1, %bb1 ] ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1.bb2_crit_edge, %entry
+ %x_addr.0.lcssa = phi i32 [ %.lcssa, %bb1.bb2_crit_edge ], [ %x, %entry ] ; <i32> [#uses=1]
+ ret i32 %x_addr.0.lcssa
+}
diff --git a/test/Analysis/ScalarEvolution/2008-11-18-Stride2.ll b/test/Analysis/ScalarEvolution/2008-11-18-Stride2.ll
new file mode 100644
index 0000000..102acc6
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-11-18-Stride2.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -analyze -scalar-evolution |& grep {/u 3}
+; XFAIL: *
+
+define i32 @f(i32 %x) nounwind readnone {
+entry:
+ %0 = icmp ugt i32 %x, 999 ; <i1> [#uses=1]
+ br i1 %0, label %bb2, label %bb.nph
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb.nph, %bb1
+ %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb1 ] ; <i32> [#uses=2]
+ %tmp = mul i32 %indvar, 3 ; <i32> [#uses=1]
+ %x_addr.04 = add i32 %tmp, %x ; <i32> [#uses=1]
+ %1 = add i32 %x_addr.04, 3 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %2 = icmp ugt i32 %1, 999 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %2, label %bb1.bb2_crit_edge, label %bb
+
+bb1.bb2_crit_edge: ; preds = %bb1
+ %.lcssa = phi i32 [ %1, %bb1 ] ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1.bb2_crit_edge, %entry
+ %x_addr.0.lcssa = phi i32 [ %.lcssa, %bb1.bb2_crit_edge ], [ %x, %entry ] ; <i32> [#uses=1]
+ ret i32 %x_addr.0.lcssa
+}
diff --git a/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll b/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
new file mode 100644
index 0000000..226221b
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -analyze -scalar-evolution | grep {backedge-taken count is 255}
+; XFAIL: *
+
+define i32 @foo(i32 %x, i32 %y, i32* %lam, i32* %alp) nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %indvar = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ] ; <i32> [#uses=4]
+ %i.0.reg2mem.0 = sub i32 255, %indvar ; <i32> [#uses=2]
+ %0 = getelementptr i32* %alp, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %2 = getelementptr i32* %lam, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1]
+ store i32 %1, i32* %2, align 4
+ %3 = sub i32 254, %indvar ; <i32> [#uses=1]
+ %4 = icmp slt i32 %3, 0 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %4, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ %tmp10 = mul i32 %indvar, %x ; <i32> [#uses=1]
+ %z.0.reg2mem.0 = add i32 %tmp10, %y ; <i32> [#uses=1]
+ %5 = add i32 %z.0.reg2mem.0, %x ; <i32> [#uses=1]
+ ret i32 %5
+}
diff --git a/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll b/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
new file mode 100644
index 0000000..33a7479
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -analyze -scalar-evolution | grep {0 smax}
+; XFAIL: *
+
+define i32 @f(i32 %c.idx.val) {
+
+bb2:
+ %k.018 = add i32 %c.idx.val, -1 ; <i32> [#uses=2]
+ %a14 = icmp slt i32 %k.018, 0 ; <i1> [#uses=1]
+ br i1 %a14, label %bb19, label %bb16.preheader
+
+bb16.preheader:
+ %k.019 = phi i32 [ %k.0, %bb18 ], [ %k.018, %bb2 ] ; <i32> [#uses=5]
+ %x = phi i32 [ 0, %bb2 ], [ %x.1, %bb18]
+ br label %bb18
+
+bb18: ; preds = %bb18.loopexit
+ %x.1 = add i32 %x, 1
+ %k.0 = add i32 %k.019, -1 ; <i32> [#uses=2]
+ %a107 = icmp slt i32 %k.0, 0 ; <i1> [#uses=1]
+ br i1 %a107, label %bb18.bb19_crit_edge, label %bb16.preheader
+
+bb18.bb19_crit_edge:
+ ret i32 %x
+
+bb19:
+ ret i32 0
+
+}
diff --git a/test/Analysis/ScalarEvolution/2008-12-14-StrideAndSigned.ll b/test/Analysis/ScalarEvolution/2008-12-14-StrideAndSigned.ll
new file mode 100644
index 0000000..8152e98
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-12-14-StrideAndSigned.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -analyze -scalar-evolution |& \
+; RUN: grep {(((-1 \\* %i0) + (100005 smax %i0)) /u 5)}
+; XFAIL: *
+
+define i32 @foo0(i32 %i0) nounwind {
+entry:
+ br label %bb1
+
+bb: ; preds = %bb1
+ %0 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ %1 = add i32 %i.0, 5 ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %j.0 = phi i32 [ 0, %entry ], [ %0, %bb ] ; <i32> [#uses=2]
+ %i.0 = phi i32 [ %i0, %entry ], [ %1, %bb ] ; <i32> [#uses=2]
+ %2 = icmp sgt i32 %i.0, 100000 ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb
+
+return: ; preds = %bb1
+ ret i32 %j.0
+}
diff --git a/test/Analysis/ScalarEvolution/2008-12-15-DontUseSDiv.ll b/test/Analysis/ScalarEvolution/2008-12-15-DontUseSDiv.ll
new file mode 100644
index 0000000..3eaa492
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2008-12-15-DontUseSDiv.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -analyze -scalar-evolution |& grep {/u 5}
+; XFAIL: *
+
+define i8 @foo0(i8 %i0) nounwind {
+entry:
+ br label %bb1
+
+bb: ; preds = %bb1
+ %0 = add i8 %j.0, 1 ; <i8> [#uses=1]
+ %1 = add i8 %i.0, 5 ; <i8> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %j.0 = phi i8 [ 0, %entry ], [ %0, %bb ] ; <i8> [#uses=2]
+ %i.0 = phi i8 [ %i0, %entry ], [ %1, %bb ] ; <i8> [#uses=2]
+ %2 = icmp sgt i8 %i.0, 100 ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb
+
+return: ; preds = %bb1
+ ret i8 %j.0
+}
diff --git a/test/Analysis/ScalarEvolution/2009-01-02-SignedNegativeStride.ll b/test/Analysis/ScalarEvolution/2009-01-02-SignedNegativeStride.ll
new file mode 100644
index 0000000..cc2a2e4
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2009-01-02-SignedNegativeStride.ll
@@ -0,0 +1,40 @@
+; RUN: opt < %s -analyze -scalar-evolution | not grep {/u -1}
+; PR3275
+
+@g_16 = external global i16 ; <i16*> [#uses=3]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
+
+define void @func_15() nounwind {
+entry:
+ %0 = load i16* @g_16, align 2 ; <i16> [#uses=1]
+ %1 = icmp sgt i16 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb2, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %g_16.promoted = load i16* @g_16 ; <i16> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %g_16.tmp.0 = phi i16 [ %g_16.promoted, %bb.nph ], [ %2, %bb1 ] ; <i16> [#uses=1]
+ %2 = add i16 %g_16.tmp.0, -1 ; <i16> [#uses=3]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %3 = icmp sgt i16 %2, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb1.bb2_crit_edge, label %bb
+
+bb1.bb2_crit_edge: ; preds = %bb1
+ store i16 %2, i16* @g_16
+ br label %bb2
+
+bb2: ; preds = %bb1.bb2_crit_edge, %entry
+ br label %return
+
+return: ; preds = %bb2
+ ret void
+}
+
+declare i32 @main() nounwind
+
+declare i32 @printf(i8*, ...) nounwind
+
diff --git a/test/Analysis/ScalarEvolution/2009-04-22-TruncCast.ll b/test/Analysis/ScalarEvolution/2009-04-22-TruncCast.ll
new file mode 100644
index 0000000..c2e108a
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2009-04-22-TruncCast.ll
@@ -0,0 +1,37 @@
+; RUN: opt < %s -analyze -scalar-evolution | grep {(trunc i} | not grep ext
+
+define i16 @test1(i8 %x) {
+ %A = sext i8 %x to i32
+ %B = trunc i32 %A to i16
+ ret i16 %B
+}
+
+define i8 @test2(i16 %x) {
+ %A = sext i16 %x to i32
+ %B = trunc i32 %A to i8
+ ret i8 %B
+}
+
+define i16 @test3(i16 %x) {
+ %A = sext i16 %x to i32
+ %B = trunc i32 %A to i16
+ ret i16 %B
+}
+
+define i16 @test4(i8 %x) {
+ %A = zext i8 %x to i32
+ %B = trunc i32 %A to i16
+ ret i16 %B
+}
+
+define i8 @test5(i16 %x) {
+ %A = zext i16 %x to i32
+ %B = trunc i32 %A to i8
+ ret i8 %B
+}
+
+define i16 @test6(i16 %x) {
+ %A = zext i16 %x to i32
+ %B = trunc i32 %A to i16
+ ret i16 %B
+}
diff --git a/test/Analysis/ScalarEvolution/2009-05-09-PointerEdgeCount.ll b/test/Analysis/ScalarEvolution/2009-05-09-PointerEdgeCount.ll
new file mode 100644
index 0000000..dc7bd29
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2009-05-09-PointerEdgeCount.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -analyze -scalar-evolution | grep {count is 2}
+; PR3171
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+ %struct.Foo = type { i32 }
+ %struct.NonPod = type { [2 x %struct.Foo] }
+
+define void @_Z3foov() nounwind {
+entry:
+ %x = alloca %struct.NonPod, align 8 ; <%struct.NonPod*> [#uses=2]
+ %0 = getelementptr %struct.NonPod* %x, i32 0, i32 0 ; <[2 x %struct.Foo]*> [#uses=1]
+ %1 = getelementptr [2 x %struct.Foo]* %0, i32 1, i32 0 ; <%struct.Foo*> [#uses=1]
+ br label %bb1.i
+
+bb1.i: ; preds = %bb2.i, %entry
+ %.0.i = phi %struct.Foo* [ %1, %entry ], [ %4, %bb2.i ] ; <%struct.Foo*> [#uses=2]
+ %2 = getelementptr %struct.NonPod* %x, i32 0, i32 0, i32 0 ; <%struct.Foo*> [#uses=1]
+ %3 = icmp eq %struct.Foo* %.0.i, %2 ; <i1> [#uses=1]
+ br i1 %3, label %_ZN6NonPodD1Ev.exit, label %bb2.i
+
+bb2.i: ; preds = %bb1.i
+ %4 = getelementptr %struct.Foo* %.0.i, i32 -1 ; <%struct.Foo*> [#uses=1]
+ br label %bb1.i
+
+_ZN6NonPodD1Ev.exit: ; preds = %bb1.i
+ ret void
+}
+
diff --git a/test/Analysis/ScalarEvolution/2009-07-04-GroupConstantsWidthMismatch.ll b/test/Analysis/ScalarEvolution/2009-07-04-GroupConstantsWidthMismatch.ll
new file mode 100644
index 0000000..a4358aa
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/2009-07-04-GroupConstantsWidthMismatch.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -analyze -scalar-evolution
+; PR4501
+
+define void @test() {
+entry:
+ %0 = load i16* undef, align 1
+ %1 = lshr i16 %0, 8
+ %2 = and i16 %1, 3
+ %3 = zext i16 %2 to i32
+ %4 = load i8* undef, align 1
+ %5 = lshr i8 %4, 4
+ %6 = and i8 %5, 1
+ %7 = zext i8 %6 to i32
+ %t1 = add i32 %3, %7
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll b/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll
new file mode 100644
index 0000000..9573aed
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | grep {backedge-taken count is 100}
+; PR1101
+
+@A = weak global [1000 x i32] zeroinitializer, align 32
+
+
+define void @test(i32 %N) {
+entry:
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ br label %bb3
+
+bb: ; preds = %bb3
+ %tmp = getelementptr [1000 x i32]* @A, i32 0, i32 %i.0 ; <i32*> [#uses=1]
+ store i32 123, i32* %tmp
+ %tmp2 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %bb3
+
+bb3: ; preds = %bb, %entry
+ %i.0 = phi i32 [ 2, %entry ], [ %tmp2, %bb ] ; <i32> [#uses=3]
+ %SQ = mul i32 %i.0, %i.0
+ %tmp4 = mul i32 %i.0, 2
+ %tmp5 = sub i32 %SQ, %tmp4
+ %tmp3 = icmp sle i32 %tmp5, 9999 ; <i1> [#uses=1]
+ br i1 %tmp3, label %bb, label %bb5
+
+bb5: ; preds = %bb3
+ br label %return
+
+return: ; preds = %bb5
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/and-xor.ll b/test/Analysis/ScalarEvolution/and-xor.ll
new file mode 100644
index 0000000..1772573
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/and-xor.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -scalar-evolution -analyze \
+; RUN: | grep {\\--> (zext} | count 2
+
+define i32 @foo(i32 %x) {
+ %n = and i32 %x, 255
+ %y = xor i32 %n, 255
+ ret i32 %y
+}
diff --git a/test/Analysis/ScalarEvolution/avoid-infinite-recursion-0.ll b/test/Analysis/ScalarEvolution/avoid-infinite-recursion-0.ll
new file mode 100644
index 0000000..7eeb308
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/avoid-infinite-recursion-0.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -analyze -scalar-evolution
+; PR4537
+
+; ModuleID = 'b.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define i32 @test() {
+entry:
+ %0 = load i32** undef, align 8 ; <i32*> [#uses=1]
+ %1 = ptrtoint i32* %0 to i64 ; <i64> [#uses=1]
+ %2 = sub i64 undef, %1 ; <i64> [#uses=1]
+ %3 = lshr i64 %2, 3 ; <i64> [#uses=1]
+ %4 = trunc i64 %3 to i32 ; <i32> [#uses=2]
+ br i1 undef, label %bb10, label %bb4.i
+
+bb4.i: ; preds = %bb4.i, %entry
+ %i.0.i6 = phi i32 [ %8, %bb4.i ], [ 0, %entry ] ; <i32> [#uses=2]
+ %5 = sub i32 %4, %i.0.i6 ; <i32> [#uses=1]
+ %6 = sext i32 %5 to i64 ; <i64> [#uses=1]
+ %7 = udiv i64 undef, %6 ; <i64> [#uses=1]
+ %8 = add i32 %i.0.i6, 1 ; <i32> [#uses=2]
+ %phitmp = icmp eq i64 %7, 0 ; <i1> [#uses=1]
+ %.not.i = icmp sge i32 %8, %4 ; <i1> [#uses=1]
+ %or.cond.i = or i1 %phitmp, %.not.i ; <i1> [#uses=1]
+ br i1 %or.cond.i, label %bb10, label %bb4.i
+
+bb10: ; preds = %bb4.i, %entry
+ unreachable
+}
diff --git a/test/Analysis/ScalarEvolution/avoid-infinite-recursion-1.ll b/test/Analysis/ScalarEvolution/avoid-infinite-recursion-1.ll
new file mode 100644
index 0000000..31b95e1
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/avoid-infinite-recursion-1.ll
@@ -0,0 +1,354 @@
+; RUN: opt < %s -iv-users
+; PR4538
+
+; ModuleID = 'bugpoint-reduced-simplified.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-freebsd8.0"
+module asm ".ident\09\22$FreeBSD: head/sys/kern/vfs_subr.c 195285 2009-07-02 14:19:33Z jamie $\22"
+module asm ".section set_pcpu, \22aw\22, @progbits"
+module asm ".previous"
+ type <{ [40 x i8] }> ; type %0
+ type <{ %struct.vm_object*, %struct.vm_object** }> ; type %1
+ type <{ %struct.vm_object* }> ; type %2
+ type <{ %struct.vm_page*, %struct.vm_page** }> ; type %3
+ type <{ %struct.pv_entry*, %struct.pv_entry** }> ; type %4
+ type <{ %struct.vm_reserv* }> ; type %5
+ type <{ %struct.bufobj*, %struct.bufobj** }> ; type %6
+ type <{ %struct.proc*, %struct.proc** }> ; type %7
+ type <{ %struct.thread*, %struct.thread** }> ; type %8
+ type <{ %struct.prison*, %struct.prison** }> ; type %9
+ type <{ %struct.prison* }> ; type %10
+ type <{ %struct.task* }> ; type %11
+ type <{ %struct.osd*, %struct.osd** }> ; type %12
+ type <{ %struct.proc* }> ; type %13
+ type <{ %struct.ksiginfo*, %struct.ksiginfo** }> ; type %14
+ type <{ %struct.pv_chunk*, %struct.pv_chunk** }> ; type %15
+ type <{ %struct.pgrp*, %struct.pgrp** }> ; type %16
+ type <{ %struct.knote*, %struct.knote** }> ; type %17
+ type <{ %struct.ktr_request*, %struct.ktr_request** }> ; type %18
+ type <{ %struct.mqueue_notifier* }> ; type %19
+ type <{ %struct.turnstile* }> ; type %20
+ type <{ %struct.namecache* }> ; type %21
+ type <{ %struct.namecache*, %struct.namecache** }> ; type %22
+ type <{ %struct.lockf*, %struct.lockf** }> ; type %23
+ type <{ %struct.lockf_entry*, %struct.lockf_entry** }> ; type %24
+ type <{ %struct.lockf_edge*, %struct.lockf_edge** }> ; type %25
+ %struct.__siginfo = type <{ i32, i32, i32, i32, i32, i32, i8*, %union.sigval, %0 }>
+ %struct.__sigset = type <{ [4 x i32] }>
+ %struct.acl = type <{ i32, i32, [4 x i32], [254 x %struct.acl_entry] }>
+ %struct.acl_entry = type <{ i32, i32, i32, i16, i16 }>
+ %struct.au_mask = type <{ i32, i32 }>
+ %struct.au_tid_addr = type <{ i32, i32, [4 x i32] }>
+ %struct.auditinfo_addr = type <{ i32, %struct.au_mask, %struct.au_tid_addr, i32, i64 }>
+ %struct.bintime = type <{ i64, i64 }>
+ %struct.buf = type <{ %struct.bufobj*, i64, i8*, i8*, i32, i8, i8, i8, i8, i64, i64, void (%struct.buf*)*, i64, i64, %struct.buflists, %struct.buf*, %struct.buf*, i32, i8, i8, i8, i8, %struct.buflists, i16, i8, i8, i32, i8, i8, i8, i8, i8, i8, i8, i8, %struct.lock, i64, i64, i8*, i32, i8, i8, i8, i8, i64, %struct.vnode*, i32, i32, %struct.ucred*, %struct.ucred*, i8*, %union.pager_info, i8, i8, i8, i8, %union.anon, [32 x %struct.vm_page*], i32, i8, i8, i8, i8, %struct.workhead, i8*, i8*, i8*, i32, i8, i8, i8, i8 }>
+ %struct.buf_ops = type <{ i8*, i32 (%struct.buf*)*, void (%struct.bufobj*, %struct.buf*)*, i32 (%struct.bufobj*, i32)*, void (%struct.bufobj*, %struct.buf*)* }>
+ %struct.buflists = type <{ %struct.buf*, %struct.buf** }>
+ %struct.bufobj = type <{ %struct.mtx, %struct.bufv, %struct.bufv, i64, i32, i8, i8, i8, i8, %struct.buf_ops*, i32, i8, i8, i8, i8, %struct.vm_object*, %6, i8*, %struct.vnode* }>
+ %struct.bufv = type <{ %struct.buflists, %struct.buf*, i32, i8, i8, i8, i8 }>
+ %struct.callout = type <{ %union.anon, i32, i8, i8, i8, i8, i8*, void (i8*)*, %struct.lock_object*, i32, i32 }>
+ %struct.cdev_privdata = type opaque
+ %struct.cluster_save = type <{ i64, i64, i8*, i32, i8, i8, i8, i8, %struct.buf** }>
+ %struct.componentname = type <{ i64, i64, %struct.thread*, %struct.ucred*, i32, i8, i8, i8, i8, i8*, i8*, i64, i64 }>
+ %struct.cpuset = type opaque
+ %struct.cv = type <{ i8*, i32, i8, i8, i8, i8 }>
+ %struct.fid = type <{ i16, i16, [16 x i8] }>
+ %struct.file = type <{ i8*, %struct.fileops*, %struct.ucred*, %struct.vnode*, i16, i16, i32, i32, i32, i64, %struct.cdev_privdata*, i64, i8* }>
+ %struct.filedesc = type opaque
+ %struct.filedesc_to_leader = type opaque
+ %struct.fileops = type <{ i32 (%struct.file*, %struct.uio*, %struct.ucred*, i32, %struct.thread*)*, i32 (%struct.file*, %struct.uio*, %struct.ucred*, i32, %struct.thread*)*, i32 (%struct.file*, i64, %struct.ucred*, %struct.thread*)*, i32 (%struct.file*, i64, i8*, %struct.ucred*, %struct.thread*)*, i32 (%struct.file*, i32, %struct.ucred*, %struct.thread*)*, i32 (%struct.file*, %struct.knote*)*, i32 (%struct.file*, %struct.stat*, %struct.ucred*, %struct.thread*)*, i32 (%struct.file*, %struct.thread*)*, i32, i8, i8, i8, i8 }>
+ %struct.filterops = type <{ i32, i8, i8, i8, i8, i32 (%struct.knote*)*, void (%struct.knote*)*, i32 (%struct.knote*, i64)* }>
+ %struct.flock = type <{ i64, i64, i32, i16, i16, i32, i8, i8, i8, i8 }>
+ %struct.freelst = type <{ %struct.vnode*, %struct.vnode** }>
+ %struct.fsid = type <{ [2 x i32] }>
+ %struct.in6_addr = type opaque
+ %struct.in_addr = type opaque
+ %struct.inode = type opaque
+ %struct.iovec = type <{ i8*, i64 }>
+ %struct.itimers = type opaque
+ %struct.itimerval = type <{ %struct.bintime, %struct.bintime }>
+ %struct.kaioinfo = type opaque
+ %struct.kaudit_record = type opaque
+ %struct.kdtrace_proc = type opaque
+ %struct.kdtrace_thread = type opaque
+ %struct.kevent = type <{ i64, i16, i16, i32, i64, i8* }>
+ %struct.klist = type <{ %struct.knote* }>
+ %struct.knlist = type <{ %struct.klist, void (i8*)*, void (i8*)*, void (i8*)*, void (i8*)*, i8* }>
+ %struct.knote = type <{ %struct.klist, %struct.klist, %struct.knlist*, %17, %struct.kqueue*, %struct.kevent, i32, i32, i64, %union.sigval, %struct.filterops*, i8* }>
+ %struct.kqueue = type opaque
+ %struct.ksiginfo = type <{ %14, %struct.__siginfo, i32, i8, i8, i8, i8, %struct.sigqueue* }>
+ %struct.ktr_request = type opaque
+ %struct.label = type opaque
+ %struct.lock = type <{ %struct.lock_object, i64, i32, i32 }>
+ %struct.lock_list_entry = type opaque
+ %struct.lock_object = type <{ i8*, i32, i32, %struct.witness* }>
+ %struct.lock_owner = type opaque
+ %struct.lock_profile_object = type opaque
+ %struct.lockf = type <{ %23, %struct.mtx, %struct.lockf_entry_list, %struct.lockf_entry_list, i32, i8, i8, i8, i8 }>
+ %struct.lockf_edge = type <{ %25, %25, %struct.lockf_entry*, %struct.lockf_entry* }>
+ %struct.lockf_edge_list = type <{ %struct.lockf_edge* }>
+ %struct.lockf_entry = type <{ i16, i16, i8, i8, i8, i8, i64, i64, %struct.lock_owner*, %struct.vnode*, %struct.inode*, %struct.task*, %24, %struct.lockf_edge_list, %struct.lockf_edge_list, i32, i8, i8, i8, i8 }>
+ %struct.lockf_entry_list = type <{ %struct.lockf_entry* }>
+ %struct.lpohead = type <{ %struct.lock_profile_object* }>
+ %struct.md_page = type <{ %4 }>
+ %struct.mdproc = type <{ %struct.cv*, %struct.system_segment_descriptor }>
+ %struct.mdthread = type <{ i32, i8, i8, i8, i8, i64 }>
+ %struct.mntarg = type opaque
+ %struct.mntlist = type <{ %struct.mount*, %struct.mount** }>
+ %struct.mount = type <{ %struct.mtx, i32, i8, i8, i8, i8, %struct.mntlist, %struct.vfsops*, %struct.vfsconf*, %struct.vnode*, %struct.vnode*, i32, i8, i8, i8, i8, %struct.freelst, i32, i32, i32, i32, i32, i32, %struct.vfsoptlist*, %struct.vfsoptlist*, i32, i8, i8, i8, i8, %struct.statfs, %struct.ucred*, i8*, i64, i32, i8, i8, i8, i8, %struct.netexport*, %struct.label*, i32, i32, i32, i32, %struct.thread*, i8*, %struct.lock }>
+ %struct.mqueue_notifier = type opaque
+ %struct.mtx = type <{ %struct.lock_object, i64 }>
+ %struct.namecache = type opaque
+ %struct.netexport = type opaque
+ %struct.nlminfo = type opaque
+ %struct.osd = type <{ i32, i8, i8, i8, i8, i8**, %12 }>
+ %struct.p_sched = type opaque
+ %struct.pargs = type <{ i32, i32, [1 x i8], i8, i8, i8 }>
+ %struct.pcb = type opaque
+ %struct.pgrp = type <{ %16, %13, %struct.session*, %struct.sigiolst, i32, i32, %struct.mtx }>
+ %struct.plimit = type opaque
+ %struct.pmap = type <{ %struct.mtx, i64*, %15, i32, i8, i8, i8, i8, %struct.bintime, %struct.vm_page* }>
+ %struct.prison = type <{ %9, i32, i32, i32, i32, %10, %9, %struct.prison*, %struct.mtx, %struct.task, %struct.osd, %struct.cpuset*, %struct.vnet*, %struct.vnode*, i32, i32, %struct.in_addr*, %struct.in6_addr*, [4 x i8*], i32, i32, i32, i32, i32, [5 x i32], i64, [256 x i8], [1024 x i8], [256 x i8], [256 x i8], [64 x i8] }>
+ %struct.proc = type <{ %7, %8, %struct.mtx, %struct.ucred*, %struct.filedesc*, %struct.filedesc_to_leader*, %struct.pstats*, %struct.plimit*, %struct.callout, %struct.sigacts*, i32, i32, i32, i8, i8, i8, i8, %7, %7, %struct.proc*, %7, %13, %struct.mtx, %struct.ksiginfo*, %struct.sigqueue, i32, i8, i8, i8, i8, %struct.vmspace*, i32, i8, i8, i8, i8, %struct.itimerval, %struct.rusage, %struct.rusage_ext, %struct.rusage_ext, i32, i32, i32, i8, i8, i8, i8, %struct.vnode*, %struct.ucred*, %struct.vnode*, i32, i8, i8, i8, i8, %struct.sigiolst, i32, i32, i64, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, %struct.nlminfo*, %struct.kaioinfo*, %struct.thread*, i32, i8, i8, i8, i8, %struct.thread*, i32, i32, %struct.itimers*, i32, i32, [20 x i8], i8, i8, i8, i8, %struct.pgrp*, %struct.sysentvec*, %struct.pargs*, i64, i8, i8, i8, i8, i32, i16, i8, i8, i8, i8, i8, i8, %struct.knlist, i32, i8, i8, i8, i8, %struct.mdproc, %struct.callout, i16, i8, i8, i8, i8, i8, i8, %struct.proc*, %struct.proc*, i8*, %struct.label*, %struct.p_sched*, %18, %19, %struct.kdtrace_proc*, %struct.cv }>
+ %struct.pstats = type opaque
+ %struct.pv_chunk = type <{ %struct.pmap*, %15, [3 x i64], [2 x i64], [168 x %struct.pv_entry] }>
+ %struct.pv_entry = type <{ i64, %4 }>
+ %struct.rusage = type <{ %struct.bintime, %struct.bintime, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }>
+ %struct.rusage_ext = type <{ i64, i64, i64, i64, i64, i64, i64 }>
+ %struct.selfd = type opaque
+ %struct.selfdlist = type <{ %struct.selfd*, %struct.selfd** }>
+ %struct.selinfo = type <{ %struct.selfdlist, %struct.knlist, %struct.mtx* }>
+ %struct.seltd = type opaque
+ %struct.session = type <{ i32, i8, i8, i8, i8, %struct.proc*, %struct.vnode*, %struct.tty*, i32, [24 x i8], i8, i8, i8, i8, %struct.mtx }>
+ %struct.shmmap_state = type opaque
+ %struct.sigacts = type <{ [128 x void (i32)*], [128 x %struct.__sigset], %struct.__sigset, %struct.__sigset, %struct.__sigset, %struct.__sigset, %struct.__sigset, %struct.__sigset, %struct.__sigset, %struct.__sigset, %struct.__sigset, %struct.__sigset, i32, i32, %struct.mtx }>
+ %struct.sigaltstack = type <{ i8*, i64, i32, i8, i8, i8, i8 }>
+ %struct.sigio = type <{ %union.sigval, %struct.sigiolst, %struct.sigio**, %struct.ucred*, i32, i8, i8, i8, i8 }>
+ %struct.sigiolst = type <{ %struct.sigio* }>
+ %struct.sigqueue = type <{ %struct.__sigset, %struct.__sigset, %14, %struct.proc*, i32, i8, i8, i8, i8 }>
+ %struct.sleepqueue = type opaque
+ %struct.sockaddr = type opaque
+ %struct.stat = type <{ i32, i32, i16, i16, i32, i32, i32, %struct.bintime, %struct.bintime, %struct.bintime, i64, i64, i32, i32, i32, i32, %struct.bintime }>
+ %struct.statfs = type <{ i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, [10 x i64], i32, i32, %struct.fsid, [80 x i8], [16 x i8], [88 x i8], [88 x i8] }>
+ %struct.sysctl_req = type <{ %struct.thread*, i32, i8, i8, i8, i8, i8*, i64, i64, i32 (%struct.sysctl_req*, i8*, i64)*, i8*, i64, i64, i32 (%struct.sysctl_req*, i8*, i64)*, i64, i32, i8, i8, i8, i8 }>
+ %struct.sysentvec = type opaque
+ %struct.system_segment_descriptor = type <{ i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }>
+ %struct.task = type <{ %11, i16, i16, i8, i8, i8, i8, void (i8*, i32)*, i8* }>
+ %struct.td_sched = type opaque
+ %struct.thread = type <{ %struct.mtx*, %struct.proc*, %8, %8, %8, %8, %struct.cpuset*, %struct.seltd*, %struct.sleepqueue*, %struct.turnstile*, %struct.umtx_q*, i32, i8, i8, i8, i8, %struct.sigqueue, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8*, i8*, i8, i8, i8, i8, i16, i16, i16, i8, i8, i8, i8, i8, i8, %struct.turnstile*, i8*, %20, %struct.lock_list_entry*, i32, i32, %struct.ucred*, i32, i32, %struct.rusage, i64, i64, i32, i32, i32, i32, i32, %struct.__sigset, %struct.__sigset, i32, %struct.sigaltstack, i32, i8, i8, i8, i8, i64, i32, [20 x i8], %struct.file*, i32, i32, %struct.osd, i8, i8, i8, i8, i8, i8, i8, i8, %struct.pcb*, i32, i8, i8, i8, i8, [2 x i64], %struct.callout, %struct.trapframe*, %struct.vm_object*, i64, i32, i8, i8, i8, i8, %struct.vm_object*, i64, i32, i32, %struct.mdthread, %struct.td_sched*, %struct.kaudit_record*, i32, i8, i8, i8, i8, [2 x %struct.lpohead], %struct.kdtrace_thread*, i32, i8, i8, i8, i8, %struct.vnet*, i8* }>
+ %struct.trapframe = type <{ i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i16, i16, i64, i32, i16, i16, i64, i64, i64, i64, i64, i64 }>
+ %struct.tty = type opaque
+ %struct.turnstile = type opaque
+ %struct.ucred = type <{ i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, %struct.uidinfo*, %struct.uidinfo*, %struct.prison*, %struct.vimage*, i32, i8, i8, i8, i8, [2 x i8*], %struct.label*, %struct.auditinfo_addr, i32*, i32, i8, i8, i8, i8 }>
+ %struct.uidinfo = type opaque
+ %struct.uio = type <{ %struct.iovec*, i32, i8, i8, i8, i8, i64, i64, i32, i32, %struct.thread* }>
+ %struct.umtx_q = type opaque
+ %struct.vattr = type <{ i32, i16, i16, i32, i32, i32, i8, i8, i8, i8, i64, i64, i64, %struct.bintime, %struct.bintime, %struct.bintime, %struct.bintime, i64, i64, i32, i8, i8, i8, i8, i64, i64, i32, i8, i8, i8, i8, i64 }>
+ %struct.vfsconf = type <{ i32, [16 x i8], i8, i8, i8, i8, %struct.vfsops*, i32, i32, i32, i8, i8, i8, i8, %struct.vfsoptdecl*, %struct.vfsconfhead }>
+ %struct.vfsconfhead = type <{ %struct.vfsconf*, %struct.vfsconf** }>
+ %struct.vfsops = type <{ i32 (%struct.mount*)*, i32 (%struct.mntarg*, i8*, i32)*, i32 (%struct.mount*, i32)*, i32 (%struct.mount*, i32, %struct.vnode**)*, i32 (%struct.mount*, i32, i32, i8*)*, i32 (%struct.mount*, %struct.statfs*)*, i32 (%struct.mount*, i32)*, i32 (%struct.mount*, i32, i32, %struct.vnode**)*, i32 (%struct.mount*, %struct.fid*, %struct.vnode**)*, i32 (%struct.mount*, %struct.sockaddr*, i32*, %struct.ucred**, i32*, i32**)*, i32 (%struct.vfsconf*)*, i32 (%struct.vfsconf*)*, i32 (%struct.mount*, i32, %struct.vnode*, i32, i8*)*, i32 (%struct.mount*, i32, %struct.sysctl_req*)*, void (%struct.mount*)* }>
+ %struct.vfsopt = type <{ %struct.vfsoptlist, i8*, i8*, i32, i32, i32, i8, i8, i8, i8 }>
+ %struct.vfsoptdecl = type opaque
+ %struct.vfsoptlist = type <{ %struct.vfsopt*, %struct.vfsopt** }>
+ %struct.vimage = type opaque
+ %struct.vm_map = type <{ %struct.vm_map_entry, %struct.mtx, %struct.mtx, i32, i8, i8, i8, i8, i64, i32, i8, i8, i8, i8, %struct.vm_map_entry*, %struct.pmap*, %struct.vm_map_entry* }>
+ %struct.vm_map_entry = type <{ %struct.vm_map_entry*, %struct.vm_map_entry*, %struct.vm_map_entry*, %struct.vm_map_entry*, i64, i64, i64, i64, i64, %union.sigval, i64, i32, i8, i8, i8, i8, i32, i8, i8, i8, i8, i64, %struct.uidinfo* }>
+ %struct.vm_object = type <{ %struct.mtx, %1, %2, %1, %3, %struct.vm_page*, i64, i32, i32, i32, i8, i8, i16, i16, i16, i32, %struct.vm_object*, i64, %1, %5, %struct.vm_page*, i8*, %union.anon, %struct.uidinfo*, i64 }>
+ %struct.vm_page = type <{ %3, %3, %struct.vm_page*, %struct.vm_page*, %struct.vm_object*, i64, i64, %struct.md_page, i8, i8, i16, i8, i8, i16, i32, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8 }>
+ %struct.vm_reserv = type opaque
+ %struct.vmspace = type <{ %struct.vm_map, %struct.shmmap_state*, i64, i64, i64, i64, i8*, i8*, i8*, i32, i8, i8, i8, i8, %struct.pmap }>
+ %struct.vnet = type opaque
+ %struct.vnode = type <{ i32, i8, i8, i8, i8, i8*, %struct.vop_vector*, i8*, %struct.mount*, %struct.freelst, %union.sigval, %struct.freelst, i32, i8, i8, i8, i8, %21, %22, %struct.namecache*, i64, i64, i64, i32, i8, i8, i8, i8, %struct.lock, %struct.mtx, %struct.lock*, i32, i32, i64, i64, i32, i8, i8, i8, i8, %struct.freelst, %struct.bufobj, %struct.vpollinfo*, %struct.label*, %struct.lockf* }>
+ %struct.vnodeop_desc = type <{ i8*, i32, i8, i8, i8, i8, i32 (%struct.vop_generic_args*)*, i32*, i32, i32, i32, i32 }>
+ %struct.vop_access_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, %struct.ucred*, %struct.thread* }>
+ %struct.vop_aclcheck_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, %struct.acl*, %struct.ucred*, %struct.thread* }>
+ %struct.vop_advlock_args = type <{ %struct.vop_generic_args, %struct.vnode*, i8*, i32, i8, i8, i8, i8, %struct.flock*, i32, i8, i8, i8, i8 }>
+ %struct.vop_advlockasync_args = type <{ %struct.vop_generic_args, %struct.vnode*, i8*, i32, i8, i8, i8, i8, %struct.flock*, i32, i8, i8, i8, i8, %struct.task*, i8** }>
+ %struct.vop_bmap_args = type <{ %struct.vop_generic_args, %struct.vnode*, i64, %struct.bufobj**, i64*, i32*, i32* }>
+ %struct.vop_cachedlookup_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vnode**, %struct.componentname* }>
+ %struct.vop_create_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vnode**, %struct.componentname*, %struct.vattr* }>
+ %struct.vop_deleteextattr_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, i8*, %struct.ucred*, %struct.thread* }>
+ %struct.vop_fsync_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, %struct.thread* }>
+ %struct.vop_generic_args = type <{ %struct.vnodeop_desc* }>
+ %struct.vop_getattr_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vattr*, %struct.ucred* }>
+ %struct.vop_getextattr_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, i8*, %struct.uio*, i64*, %struct.ucred*, %struct.thread* }>
+ %struct.vop_getpages_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vm_page**, i32, i32, i64 }>
+ %struct.vop_getwritemount_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.mount** }>
+ %struct.vop_inactive_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.thread* }>
+ %struct.vop_ioctl_args = type <{ %struct.vop_generic_args, %struct.vnode*, i64, i8*, i32, i8, i8, i8, i8, %struct.ucred*, %struct.thread* }>
+ %struct.vop_islocked_args = type <{ %struct.vop_generic_args, %struct.vnode* }>
+ %struct.vop_kqfilter_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.knote* }>
+ %struct.vop_link_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vnode*, %struct.componentname* }>
+ %struct.vop_listextattr_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, %struct.uio*, i64*, %struct.ucred*, %struct.thread* }>
+ %struct.vop_lock1_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, i8*, i32, i8, i8, i8, i8 }>
+ %struct.vop_open_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, %struct.ucred*, %struct.thread*, %struct.file* }>
+ %struct.vop_openextattr_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.ucred*, %struct.thread* }>
+ %struct.vop_pathconf_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, i64* }>
+ %struct.vop_putpages_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vm_page**, i32, i32, i32*, i64 }>
+ %struct.vop_read_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.uio*, i32, i8, i8, i8, i8, %struct.ucred* }>
+ %struct.vop_readdir_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.uio*, %struct.ucred*, i32*, i32*, i64** }>
+ %struct.vop_readlink_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.uio*, %struct.ucred* }>
+ %struct.vop_reallocblks_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.cluster_save* }>
+ %struct.vop_rename_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vnode*, %struct.componentname*, %struct.vnode*, %struct.vnode*, %struct.componentname* }>
+ %struct.vop_revoke_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8 }>
+ %struct.vop_setextattr_args = type <{ %struct.vop_generic_args, %struct.vnode*, i32, i8, i8, i8, i8, i8*, %struct.uio*, %struct.ucred*, %struct.thread* }>
+ %struct.vop_setlabel_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.label*, %struct.ucred*, %struct.thread* }>
+ %struct.vop_strategy_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.buf* }>
+ %struct.vop_symlink_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vnode**, %struct.componentname*, %struct.vattr*, i8* }>
+ %struct.vop_vector = type <{ %struct.vop_vector*, i32 (%struct.vop_generic_args*)*, i32 (%struct.vop_islocked_args*)*, i32 (%struct.vop_cachedlookup_args*)*, i32 (%struct.vop_cachedlookup_args*)*, i32 (%struct.vop_create_args*)*, i32 (%struct.vop_whiteout_args*)*, i32 (%struct.vop_create_args*)*, i32 (%struct.vop_open_args*)*, i32 (%struct.vop_access_args*)*, i32 (%struct.vop_access_args*)*, i32 (%struct.vop_access_args*)*, i32 (%struct.vop_getattr_args*)*, i32 (%struct.vop_getattr_args*)*, i32 (%struct.vop_islocked_args*)*, i32 (%struct.vop_read_args*)*, i32 (%struct.vop_read_args*)*, i32 (%struct.vop_ioctl_args*)*, i32 (%struct.vop_access_args*)*, i32 (%struct.vop_kqfilter_args*)*, i32 (%struct.vop_revoke_args*)*, i32 (%struct.vop_fsync_args*)*, i32 (%struct.vop_link_args*)*, i32 (%struct.vop_link_args*)*, i32 (%struct.vop_rename_args*)*, i32 (%struct.vop_create_args*)*, i32 (%struct.vop_link_args*)*, i32 (%struct.vop_symlink_args*)*, i32 (%struct.vop_readdir_args*)*, i32 (%struct.vop_readlink_args*)*, i32 (%struct.vop_inactive_args*)*, i32 (%struct.vop_inactive_args*)*, i32 (%struct.vop_lock1_args*)*, i32 (%struct.vop_revoke_args*)*, i32 (%struct.vop_bmap_args*)*, i32 (%struct.vop_strategy_args*)*, i32 (%struct.vop_getwritemount_args*)*, i32 (%struct.vop_islocked_args*)*, i32 (%struct.vop_pathconf_args*)*, i32 (%struct.vop_advlock_args*)*, i32 (%struct.vop_advlockasync_args*)*, i32 (%struct.vop_reallocblks_args*)*, i32 (%struct.vop_getpages_args*)*, i32 (%struct.vop_putpages_args*)*, i32 (%struct.vop_aclcheck_args*)*, i32 (%struct.vop_aclcheck_args*)*, i32 (%struct.vop_aclcheck_args*)*, i32 (%struct.vop_access_args*)*, i32 (%struct.vop_getextattr_args*)*, i32 (%struct.vop_listextattr_args*)*, i32 (%struct.vop_openextattr_args*)*, i32 (%struct.vop_deleteextattr_args*)*, i32 (%struct.vop_setextattr_args*)*, i32 (%struct.vop_setlabel_args*)*, i32 (%struct.vop_vptofh_args*)*, i32 (%struct.vop_vptocnp_args*)* }>
+ %struct.vop_vptocnp_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.vnode**, %struct.ucred*, i8*, i32* }>
+ %struct.vop_vptofh_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.fid* }>
+ %struct.vop_whiteout_args = type <{ %struct.vop_generic_args, %struct.vnode*, %struct.componentname*, i32, i8, i8, i8, i8 }>
+ %struct.vpollinfo = type <{ %struct.mtx, %struct.selinfo, i16, i16, i8, i8, i8, i8 }>
+ %struct.witness = type opaque
+ %struct.workhead = type <{ %struct.worklist* }>
+ %struct.worklist = type opaque
+ %union.anon = type <{ [16 x i8] }>
+ %union.pager_info = type <{ [4 x i8] }>
+ %union.sigval = type <{ [8 x i8] }>
+
+define i32 @vlrureclaim(%struct.mount* %mp) nounwind {
+entry:
+ br i1 undef, label %if.then11, label %do.end
+
+if.then11: ; preds = %entry
+ br label %do.end
+
+do.end: ; preds = %if.then11, %entry
+ br label %while.cond.outer
+
+while.cond.outer: ; preds = %while.cond.outer.backedge, %do.end
+ %count.0.ph = phi i32 [ undef, %do.end ], [ undef, %while.cond.outer.backedge ] ; <i32> [#uses=1]
+ br label %while.cond
+
+while.cond: ; preds = %next_iter, %while.cond.outer
+ %count.0 = phi i32 [ %dec, %next_iter ], [ %count.0.ph, %while.cond.outer ] ; <i32> [#uses=2]
+ %cmp21 = icmp eq i32 %count.0, 0 ; <i1> [#uses=1]
+ br i1 %cmp21, label %do.body288.loopexit4, label %while.body
+
+while.body: ; preds = %while.cond
+ br label %while.cond27
+
+while.cond27: ; preds = %while.body36, %while.body
+ br i1 undef, label %do.body288.loopexit, label %land.rhs
+
+land.rhs: ; preds = %while.cond27
+ br i1 undef, label %while.body36, label %while.end
+
+while.body36: ; preds = %land.rhs
+ br label %while.cond27
+
+while.end: ; preds = %land.rhs
+ br i1 undef, label %do.body288.loopexit4, label %do.body46
+
+do.body46: ; preds = %while.end
+ br i1 undef, label %if.else64, label %if.then53
+
+if.then53: ; preds = %do.body46
+ br label %if.end72
+
+if.else64: ; preds = %do.body46
+ br label %if.end72
+
+if.end72: ; preds = %if.else64, %if.then53
+ %dec = add i32 %count.0, -1 ; <i32> [#uses=2]
+ br i1 undef, label %next_iter, label %if.end111
+
+if.end111: ; preds = %if.end72
+ br i1 undef, label %lor.lhs.false, label %do.body145
+
+lor.lhs.false: ; preds = %if.end111
+ br i1 undef, label %lor.lhs.false122, label %do.body145
+
+lor.lhs.false122: ; preds = %lor.lhs.false
+ br i1 undef, label %lor.lhs.false128, label %do.body145
+
+lor.lhs.false128: ; preds = %lor.lhs.false122
+ br i1 undef, label %do.body162, label %land.lhs.true
+
+land.lhs.true: ; preds = %lor.lhs.false128
+ br i1 undef, label %do.body145, label %do.body162
+
+do.body145: ; preds = %land.lhs.true, %lor.lhs.false122, %lor.lhs.false, %if.end111
+ br i1 undef, label %if.then156, label %next_iter
+
+if.then156: ; preds = %do.body145
+ br label %next_iter
+
+do.body162: ; preds = %land.lhs.true, %lor.lhs.false128
+ br i1 undef, label %if.then173, label %do.end177
+
+if.then173: ; preds = %do.body162
+ br label %do.end177
+
+do.end177: ; preds = %if.then173, %do.body162
+ br i1 undef, label %do.body185, label %if.then182
+
+if.then182: ; preds = %do.end177
+ br label %next_iter_mntunlocked
+
+do.body185: ; preds = %do.end177
+ br i1 undef, label %if.then196, label %do.end202
+
+if.then196: ; preds = %do.body185
+ br label %do.end202
+
+do.end202: ; preds = %if.then196, %do.body185
+ br i1 undef, label %lor.lhs.false207, label %if.then231
+
+lor.lhs.false207: ; preds = %do.end202
+ br i1 undef, label %lor.lhs.false214, label %if.then231
+
+lor.lhs.false214: ; preds = %lor.lhs.false207
+ br i1 undef, label %do.end236, label %land.lhs.true221
+
+land.lhs.true221: ; preds = %lor.lhs.false214
+ br i1 undef, label %if.then231, label %do.end236
+
+if.then231: ; preds = %land.lhs.true221, %lor.lhs.false207, %do.end202
+ br label %next_iter_mntunlocked
+
+do.end236: ; preds = %land.lhs.true221, %lor.lhs.false214
+ br label %next_iter_mntunlocked
+
+next_iter_mntunlocked: ; preds = %do.end236, %if.then231, %if.then182
+ br i1 undef, label %yield, label %do.body269
+
+next_iter: ; preds = %if.then156, %do.body145, %if.end72
+ %rem2482 = and i32 %dec, 255 ; <i32> [#uses=1]
+ %cmp249 = icmp eq i32 %rem2482, 0 ; <i1> [#uses=1]
+ br i1 %cmp249, label %do.body253, label %while.cond
+
+do.body253: ; preds = %next_iter
+ br i1 undef, label %if.then264, label %yield
+
+if.then264: ; preds = %do.body253
+ br label %yield
+
+yield: ; preds = %if.then264, %do.body253, %next_iter_mntunlocked
+ br label %do.body269
+
+do.body269: ; preds = %yield, %next_iter_mntunlocked
+ br i1 undef, label %if.then280, label %while.cond.outer.backedge
+
+if.then280: ; preds = %do.body269
+ br label %while.cond.outer.backedge
+
+while.cond.outer.backedge: ; preds = %if.then280, %do.body269
+ br label %while.cond.outer
+
+do.body288.loopexit: ; preds = %while.cond27
+ br label %do.body288
+
+do.body288.loopexit4: ; preds = %while.end, %while.cond
+ br label %do.body288
+
+do.body288: ; preds = %do.body288.loopexit4, %do.body288.loopexit
+ br i1 undef, label %if.then299, label %do.end303
+
+if.then299: ; preds = %do.body288
+ br label %do.end303
+
+do.end303: ; preds = %if.then299, %do.body288
+ ret i32 undef
+}
diff --git a/test/Analysis/ScalarEvolution/avoid-smax-0.ll b/test/Analysis/ScalarEvolution/avoid-smax-0.ll
new file mode 100644
index 0000000..24275f9
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/avoid-smax-0.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -scalar-evolution -analyze | grep {Loop %bb3: backedge-taken count is (-1 + %n)}
+
+; We don't want to use a max in the trip count expression in
+; this testcase.
+
+define void @foo(i32 %n, i32* %p, i32* %q) nounwind {
+entry:
+ icmp sgt i32 %n, 0
+ br i1 %0, label %bb, label %return
+
+bb:
+ load i32* %q, align 4
+ icmp eq i32 %1, 0
+ br i1 %2, label %return, label %bb3.preheader
+
+bb3.preheader:
+ br label %bb3
+
+bb3:
+ %i.0 = phi i32 [ %7, %bb3 ], [ 0, %bb3.preheader ]
+ getelementptr i32* %p, i32 %i.0
+ load i32* %3, align 4
+ add i32 %4, 1
+ getelementptr i32* %p, i32 %i.0
+ store i32 %5, i32* %6, align 4
+ add i32 %i.0, 1
+ icmp slt i32 %7, %n
+ br i1 %8, label %bb3, label %return.loopexit
+
+return.loopexit:
+ br label %return
+
+return:
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/avoid-smax-1.ll b/test/Analysis/ScalarEvolution/avoid-smax-1.ll
new file mode 100644
index 0000000..0bc9ce8
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/avoid-smax-1.ll
@@ -0,0 +1,236 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep select %t | count 2
+; RUN: grep {icmp ne i32.\* %w } %t
+
+; Indvars should be able to insert a canonical induction variable
+; for the bb6 loop without using a maximum calculation (icmp, select)
+; because it should be able to prove that the comparison is guarded
+; by an appropriate conditional branch. Unfortunately, indvars is
+; not yet able to find the comparison for the other two loops in
+; this testcase.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+
+define void @foo(i8* %r, i32 %s, i32 %w, i32 %x, i8* %j, i32 %d) nounwind {
+entry:
+ %0 = mul i32 %x, %w ; <i32> [#uses=2]
+ %1 = mul i32 %x, %w ; <i32> [#uses=1]
+ %2 = sdiv i32 %1, 4 ; <i32> [#uses=1]
+ %.sum2 = add i32 %2, %0 ; <i32> [#uses=2]
+ %cond = icmp eq i32 %d, 1 ; <i1> [#uses=1]
+ br i1 %cond, label %bb29, label %bb10.preheader
+
+bb10.preheader: ; preds = %entry
+ %3 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb.nph9, label %bb18.loopexit
+
+bb.nph7: ; preds = %bb7.preheader
+ %4 = mul i32 %y.08, %w ; <i32> [#uses=1]
+ %5 = mul i32 %y.08, %s ; <i32> [#uses=1]
+ %6 = add i32 %5, 1 ; <i32> [#uses=1]
+ br label %bb6
+
+bb6: ; preds = %bb7, %bb.nph7
+ %x.06 = phi i32 [ %13, %bb7 ], [ 0, %bb.nph7 ] ; <i32> [#uses=3]
+ %7 = add i32 %x.06, %4 ; <i32> [#uses=1]
+ %8 = shl i32 %x.06, 1 ; <i32> [#uses=1]
+ %9 = add i32 %6, %8 ; <i32> [#uses=1]
+ %10 = getelementptr i8* %r, i32 %9 ; <i8*> [#uses=1]
+ %11 = load i8* %10, align 1 ; <i8> [#uses=1]
+ %12 = getelementptr i8* %j, i32 %7 ; <i8*> [#uses=1]
+ store i8 %11, i8* %12, align 1
+ %13 = add i32 %x.06, 1 ; <i32> [#uses=2]
+ br label %bb7
+
+bb7: ; preds = %bb6
+ %14 = icmp slt i32 %13, %w ; <i1> [#uses=1]
+ br i1 %14, label %bb6, label %bb7.bb9_crit_edge
+
+bb7.bb9_crit_edge: ; preds = %bb7
+ br label %bb9
+
+bb9: ; preds = %bb7.preheader, %bb7.bb9_crit_edge
+ %15 = add i32 %y.08, 1 ; <i32> [#uses=2]
+ br label %bb10
+
+bb10: ; preds = %bb9
+ %16 = icmp slt i32 %15, %x ; <i1> [#uses=1]
+ br i1 %16, label %bb7.preheader, label %bb10.bb18.loopexit_crit_edge
+
+bb10.bb18.loopexit_crit_edge: ; preds = %bb10
+ br label %bb10.bb18.loopexit_crit_edge.split
+
+bb10.bb18.loopexit_crit_edge.split: ; preds = %bb.nph9, %bb10.bb18.loopexit_crit_edge
+ br label %bb18.loopexit
+
+bb.nph9: ; preds = %bb10.preheader
+ %17 = icmp sgt i32 %w, 0 ; <i1> [#uses=1]
+ br i1 %17, label %bb.nph9.split, label %bb10.bb18.loopexit_crit_edge.split
+
+bb.nph9.split: ; preds = %bb.nph9
+ br label %bb7.preheader
+
+bb7.preheader: ; preds = %bb.nph9.split, %bb10
+ %y.08 = phi i32 [ %15, %bb10 ], [ 0, %bb.nph9.split ] ; <i32> [#uses=3]
+ br i1 true, label %bb.nph7, label %bb9
+
+bb.nph5: ; preds = %bb18.loopexit
+ %18 = sdiv i32 %w, 2 ; <i32> [#uses=1]
+ %19 = icmp slt i32 %w, 2 ; <i1> [#uses=1]
+ %20 = sdiv i32 %x, 2 ; <i32> [#uses=1]
+ br i1 %19, label %bb18.bb20_crit_edge.split, label %bb.nph5.split
+
+bb.nph5.split: ; preds = %bb.nph5
+ br label %bb13
+
+bb13: ; preds = %bb18, %bb.nph5.split
+ %y.14 = phi i32 [ %42, %bb18 ], [ 0, %bb.nph5.split ] ; <i32> [#uses=4]
+ %21 = mul i32 %18, %y.14 ; <i32> [#uses=2]
+ %22 = shl i32 %y.14, 1 ; <i32> [#uses=1]
+ %23 = srem i32 %y.14, 2 ; <i32> [#uses=1]
+ %24 = add i32 %23, %22 ; <i32> [#uses=1]
+ %25 = mul i32 %24, %s ; <i32> [#uses=2]
+ br i1 true, label %bb.nph3, label %bb17
+
+bb.nph3: ; preds = %bb13
+ %26 = add i32 %21, %0 ; <i32> [#uses=1]
+ %27 = add i32 %21, %.sum2 ; <i32> [#uses=1]
+ %28 = sdiv i32 %w, 2 ; <i32> [#uses=1]
+ br label %bb14
+
+bb14: ; preds = %bb15, %bb.nph3
+ %x.12 = phi i32 [ %40, %bb15 ], [ 0, %bb.nph3 ] ; <i32> [#uses=5]
+ %29 = shl i32 %x.12, 2 ; <i32> [#uses=1]
+ %30 = add i32 %29, %25 ; <i32> [#uses=1]
+ %31 = getelementptr i8* %r, i32 %30 ; <i8*> [#uses=1]
+ %32 = load i8* %31, align 1 ; <i8> [#uses=1]
+ %.sum = add i32 %26, %x.12 ; <i32> [#uses=1]
+ %33 = getelementptr i8* %j, i32 %.sum ; <i8*> [#uses=1]
+ store i8 %32, i8* %33, align 1
+ %34 = shl i32 %x.12, 2 ; <i32> [#uses=1]
+ %35 = or i32 %34, 2 ; <i32> [#uses=1]
+ %36 = add i32 %35, %25 ; <i32> [#uses=1]
+ %37 = getelementptr i8* %r, i32 %36 ; <i8*> [#uses=1]
+ %38 = load i8* %37, align 1 ; <i8> [#uses=1]
+ %.sum6 = add i32 %27, %x.12 ; <i32> [#uses=1]
+ %39 = getelementptr i8* %j, i32 %.sum6 ; <i8*> [#uses=1]
+ store i8 %38, i8* %39, align 1
+ %40 = add i32 %x.12, 1 ; <i32> [#uses=2]
+ br label %bb15
+
+bb15: ; preds = %bb14
+ %41 = icmp sgt i32 %28, %40 ; <i1> [#uses=1]
+ br i1 %41, label %bb14, label %bb15.bb17_crit_edge
+
+bb15.bb17_crit_edge: ; preds = %bb15
+ br label %bb17
+
+bb17: ; preds = %bb15.bb17_crit_edge, %bb13
+ %42 = add i32 %y.14, 1 ; <i32> [#uses=2]
+ br label %bb18
+
+bb18.loopexit: ; preds = %bb10.bb18.loopexit_crit_edge.split, %bb10.preheader
+ %43 = icmp slt i32 %x, 2 ; <i1> [#uses=1]
+ br i1 %43, label %bb20, label %bb.nph5
+
+bb18: ; preds = %bb17
+ %44 = icmp sgt i32 %20, %42 ; <i1> [#uses=1]
+ br i1 %44, label %bb13, label %bb18.bb20_crit_edge
+
+bb18.bb20_crit_edge: ; preds = %bb18
+ br label %bb18.bb20_crit_edge.split
+
+bb18.bb20_crit_edge.split: ; preds = %bb18.bb20_crit_edge, %bb.nph5
+ br label %bb20
+
+bb20: ; preds = %bb18.bb20_crit_edge.split, %bb18.loopexit
+ switch i32 %d, label %return [
+ i32 3, label %bb22
+ i32 1, label %bb29
+ ]
+
+bb22: ; preds = %bb20
+ %45 = mul i32 %x, %w ; <i32> [#uses=1]
+ %46 = sdiv i32 %45, 4 ; <i32> [#uses=1]
+ %.sum3 = add i32 %46, %.sum2 ; <i32> [#uses=2]
+ %47 = add i32 %x, 15 ; <i32> [#uses=1]
+ %48 = and i32 %47, -16 ; <i32> [#uses=1]
+ %49 = add i32 %w, 15 ; <i32> [#uses=1]
+ %50 = and i32 %49, -16 ; <i32> [#uses=1]
+ %51 = mul i32 %48, %s ; <i32> [#uses=1]
+ %52 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %52, label %bb.nph, label %bb26
+
+bb.nph: ; preds = %bb22
+ br label %bb23
+
+bb23: ; preds = %bb24, %bb.nph
+ %y.21 = phi i32 [ %57, %bb24 ], [ 0, %bb.nph ] ; <i32> [#uses=3]
+ %53 = mul i32 %y.21, %50 ; <i32> [#uses=1]
+ %.sum1 = add i32 %53, %51 ; <i32> [#uses=1]
+ %54 = getelementptr i8* %r, i32 %.sum1 ; <i8*> [#uses=1]
+ %55 = mul i32 %y.21, %w ; <i32> [#uses=1]
+ %.sum5 = add i32 %55, %.sum3 ; <i32> [#uses=1]
+ %56 = getelementptr i8* %j, i32 %.sum5 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32(i8* %56, i8* %54, i32 %w, i32 1)
+ %57 = add i32 %y.21, 1 ; <i32> [#uses=2]
+ br label %bb24
+
+bb24: ; preds = %bb23
+ %58 = icmp slt i32 %57, %x ; <i1> [#uses=1]
+ br i1 %58, label %bb23, label %bb24.bb26_crit_edge
+
+bb24.bb26_crit_edge: ; preds = %bb24
+ br label %bb26
+
+bb26: ; preds = %bb24.bb26_crit_edge, %bb22
+ %59 = mul i32 %x, %w ; <i32> [#uses=1]
+ %.sum4 = add i32 %.sum3, %59 ; <i32> [#uses=1]
+ %60 = getelementptr i8* %j, i32 %.sum4 ; <i8*> [#uses=1]
+ %61 = mul i32 %x, %w ; <i32> [#uses=1]
+ %62 = sdiv i32 %61, 2 ; <i32> [#uses=1]
+ tail call void @llvm.memset.i32(i8* %60, i8 -128, i32 %62, i32 1)
+ ret void
+
+bb29: ; preds = %bb20, %entry
+ %63 = add i32 %w, 15 ; <i32> [#uses=1]
+ %64 = and i32 %63, -16 ; <i32> [#uses=1]
+ %65 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %65, label %bb.nph11, label %bb33
+
+bb.nph11: ; preds = %bb29
+ br label %bb30
+
+bb30: ; preds = %bb31, %bb.nph11
+ %y.310 = phi i32 [ %70, %bb31 ], [ 0, %bb.nph11 ] ; <i32> [#uses=3]
+ %66 = mul i32 %y.310, %64 ; <i32> [#uses=1]
+ %67 = getelementptr i8* %r, i32 %66 ; <i8*> [#uses=1]
+ %68 = mul i32 %y.310, %w ; <i32> [#uses=1]
+ %69 = getelementptr i8* %j, i32 %68 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32(i8* %69, i8* %67, i32 %w, i32 1)
+ %70 = add i32 %y.310, 1 ; <i32> [#uses=2]
+ br label %bb31
+
+bb31: ; preds = %bb30
+ %71 = icmp slt i32 %70, %x ; <i1> [#uses=1]
+ br i1 %71, label %bb30, label %bb31.bb33_crit_edge
+
+bb31.bb33_crit_edge: ; preds = %bb31
+ br label %bb33
+
+bb33: ; preds = %bb31.bb33_crit_edge, %bb29
+ %72 = mul i32 %x, %w ; <i32> [#uses=1]
+ %73 = getelementptr i8* %j, i32 %72 ; <i8*> [#uses=1]
+ %74 = mul i32 %x, %w ; <i32> [#uses=1]
+ %75 = sdiv i32 %74, 2 ; <i32> [#uses=1]
+ tail call void @llvm.memset.i32(i8* %73, i8 -128, i32 %75, i32 1)
+ ret void
+
+return: ; preds = %bb20
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
diff --git a/test/Analysis/ScalarEvolution/dg.exp b/test/Analysis/ScalarEvolution/dg.exp
new file mode 100644
index 0000000..b65a250
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.ll]]
diff --git a/test/Analysis/ScalarEvolution/div-overflow.ll b/test/Analysis/ScalarEvolution/div-overflow.ll
new file mode 100644
index 0000000..4f6f1e2
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/div-overflow.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -scalar-evolution -analyze \
+; RUN: | grep {\\--> ((-128 \\* %a) /u -128)}
+
+; Don't let ScalarEvolution fold this div away.
+
+define i8 @foo(i8 %a) {
+ %t0 = shl i8 %a, 7
+ %t1 = lshr i8 %t0, 7
+ ret i8 %t1
+}
diff --git a/test/Analysis/ScalarEvolution/do-loop.ll b/test/Analysis/ScalarEvolution/do-loop.ll
new file mode 100644
index 0000000..6e3295a
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/do-loop.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -analyze -scalar-evolution | grep smax
+; PR1614
+
+define i32 @f(i32 %x, i32 %y) {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %x_addr.0 = add i32 %indvar, %x ; <i32> [#uses=1]
+ %tmp2 = add i32 %x_addr.0, 1 ; <i32> [#uses=2]
+ %tmp5 = icmp slt i32 %tmp2, %y ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp5, label %bb, label %bb7
+
+bb7: ; preds = %bb
+ ret i32 %tmp2
+}
diff --git a/test/Analysis/ScalarEvolution/max-trip-count.ll b/test/Analysis/ScalarEvolution/max-trip-count.ll
new file mode 100644
index 0000000..a8966be
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/max-trip-count.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: | grep {\{%d,+,\[^\{\}\]\*\}<%bb>}
+
+; ScalarEvolution should be able to understand the loop and eliminate the casts.
+
+define void @foo(i32* nocapture %d, i32 %n) nounwind {
+entry:
+ %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %i.02 = phi i32 [ %5, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=2]
+ %p.01 = phi i8 [ %4, %bb1 ], [ -1, %bb.nph ] ; <i8> [#uses=2]
+ %1 = sext i8 %p.01 to i32 ; <i32> [#uses=1]
+ %2 = sext i32 %i.02 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr i32* %d, i64 %2 ; <i32*> [#uses=1]
+ store i32 %1, i32* %3, align 4
+ %4 = add i8 %p.01, 1 ; <i8> [#uses=1]
+ %5 = add i32 %i.02, 1 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %6 = icmp slt i32 %5, %n ; <i1> [#uses=1]
+ br i1 %6, label %bb, label %bb1.return_crit_edge
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/nsw-offset.ll b/test/Analysis/ScalarEvolution/nsw-offset.ll
new file mode 100644
index 0000000..4cd9a6d
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/nsw-offset.ll
@@ -0,0 +1,77 @@
+; RUN: opt < %s -S -analyze -scalar-evolution | FileCheck %s
+
+; ScalarEvolution should be able to fold away the sign-extensions
+; on this loop with a primary induction variable incremented with
+; a nsw add of 2.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define void @foo(i32 %no, double* nocapture %d, double* nocapture %q) nounwind {
+entry:
+ %n = and i32 %no, 4294967294
+ %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb.nph, %bb1
+ %i.01 = phi i32 [ %16, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=5]
+
+; CHECK: %1 = sext i32 %i.01 to i64
+; CHECK: --> {0,+,2}<%bb>
+ %1 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
+
+; CHECK: %2 = getelementptr inbounds double* %d, i64 %1
+; CHECK: --> {%d,+,16}<%bb>
+ %2 = getelementptr inbounds double* %d, i64 %1 ; <double*> [#uses=1]
+
+ %3 = load double* %2, align 8 ; <double> [#uses=1]
+ %4 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
+ %5 = getelementptr inbounds double* %q, i64 %4 ; <double*> [#uses=1]
+ %6 = load double* %5, align 8 ; <double> [#uses=1]
+ %7 = or i32 %i.01, 1 ; <i32> [#uses=1]
+
+; CHECK: %8 = sext i32 %7 to i64
+; CHECK: --> {1,+,2}<%bb>
+ %8 = sext i32 %7 to i64 ; <i64> [#uses=1]
+
+; CHECK: %9 = getelementptr inbounds double* %q, i64 %8
+; CHECK: {(8 + %q),+,16}<%bb>
+ %9 = getelementptr inbounds double* %q, i64 %8 ; <double*> [#uses=1]
+
+; Artificially repeat the above three instructions, this time using
+; add nsw instead of or.
+ %t7 = add nsw i32 %i.01, 1 ; <i32> [#uses=1]
+
+; CHECK: %t8 = sext i32 %t7 to i64
+; CHECK: --> {1,+,2}<%bb>
+ %t8 = sext i32 %t7 to i64 ; <i64> [#uses=1]
+
+; CHECK: %t9 = getelementptr inbounds double* %q, i64 %t8
+; CHECK: {(8 + %q),+,16}<%bb>
+ %t9 = getelementptr inbounds double* %q, i64 %t8 ; <double*> [#uses=1]
+
+ %10 = load double* %9, align 8 ; <double> [#uses=1]
+ %11 = fadd double %6, %10 ; <double> [#uses=1]
+ %12 = fadd double %11, 3.200000e+00 ; <double> [#uses=1]
+ %13 = fmul double %3, %12 ; <double> [#uses=1]
+ %14 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
+ %15 = getelementptr inbounds double* %d, i64 %14 ; <double*> [#uses=1]
+ store double %13, double* %15, align 8
+ %16 = add nsw i32 %i.01, 2 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %17 = icmp slt i32 %16, %n ; <i1> [#uses=1]
+ br i1 %17, label %bb, label %bb1.return_crit_edge
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ ret void
+}
+
+; CHECK: Loop %bb: backedge-taken count is ((-1 + %n) /u 2)
+; CHECK: Loop %bb: max backedge-taken count is 1073741822
diff --git a/test/Analysis/ScalarEvolution/nsw.ll b/test/Analysis/ScalarEvolution/nsw.ll
new file mode 100644
index 0000000..456f3f0
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/nsw.ll
@@ -0,0 +1,40 @@
+; RUN: opt < %s -analyze -scalar-evolution | grep { --> {.*,+,.*}<%bb>} | count 8
+
+; The addrecs in this loop are analyzable only by using nsw information.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
+
+define void @foo(double* %p) nounwind {
+entry:
+ %tmp = load double* %p, align 8 ; <double> [#uses=1]
+ %tmp1 = fcmp ogt double %tmp, 2.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp1, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %i.01 = phi i32 [ %tmp8, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=3]
+ %tmp2 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
+ %tmp3 = getelementptr double* %p, i64 %tmp2 ; <double*> [#uses=1]
+ %tmp4 = load double* %tmp3, align 8 ; <double> [#uses=1]
+ %tmp5 = fmul double %tmp4, 9.200000e+00 ; <double> [#uses=1]
+ %tmp6 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
+ %tmp7 = getelementptr double* %p, i64 %tmp6 ; <double*> [#uses=1]
+ store double %tmp5, double* %tmp7, align 8
+ %tmp8 = add nsw i32 %i.01, 1 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %phitmp = sext i32 %tmp8 to i64 ; <i64> [#uses=1]
+ %tmp9 = getelementptr double* %p, i64 %phitmp ; <double*> [#uses=1]
+ %tmp10 = load double* %tmp9, align 8 ; <double> [#uses=1]
+ %tmp11 = fcmp ogt double %tmp10, 2.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp11, label %bb, label %bb1.return_crit_edge
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/pointer-sign-bits.ll b/test/Analysis/ScalarEvolution/pointer-sign-bits.ll
new file mode 100644
index 0000000..b2cec2d
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/pointer-sign-bits.ll
@@ -0,0 +1,220 @@
+; RUN: opt < %s -analyze -scalar-evolution
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+ %JavaObject = type { [0 x i32 (...)*]*, i8* }
+
+define void @JnJVM_antlr_CSharpCodeGenerator_genBitSet__Lantlr_collections_impl_BitSet_2I(%JavaObject*, %JavaObject*, i32) {
+start:
+ br i1 undef, label %"stack overflow", label %"no stack overflow"
+
+"GOTO or IF*2": ; preds = %"true verifyAndComputePtr89", %verifyNullCont84
+ unreachable
+
+"GOTO or IF*5": ; preds = %"true verifyAndComputePtr127", %"GOTO or IF*6"
+ unreachable
+
+"GOTO or IF*6": ; preds = %"true verifyAndComputePtr131.GOTO or IF*6_crit_edge", %"true verifyAndComputePtr89"
+ %indvar = phi i32 [ %indvar.next, %"true verifyAndComputePtr131.GOTO or IF*6_crit_edge" ], [ 0, %"true verifyAndComputePtr89" ] ; <i32> [#uses=2]
+ %.0.in = add i32 %indvar, 0 ; <i32> [#uses=1]
+ %.0 = add i32 %.0.in, 1 ; <i32> [#uses=1]
+ %3 = icmp slt i32 %.0, %4 ; <i1> [#uses=1]
+ br i1 %3, label %verifyNullCont126, label %"GOTO or IF*5"
+
+end: ; preds = %"no exception block35"
+ ret void
+
+"stack overflow": ; preds = %start
+ ret void
+
+"no stack overflow": ; preds = %start
+ br i1 undef, label %verifyNullCont, label %"no stack overflow.end_crit_edge"
+
+"no stack overflow.end_crit_edge": ; preds = %"no stack overflow"
+ ret void
+
+verifyNullCont: ; preds = %"no stack overflow"
+ br i1 undef, label %verifyNullCont9, label %verifyNullCont.end_crit_edge
+
+verifyNullCont.end_crit_edge: ; preds = %verifyNullCont
+ ret void
+
+verifyNullCont9: ; preds = %verifyNullCont
+ br i1 undef, label %verifyNullCont12, label %verifyNullCont9.end_crit_edge
+
+verifyNullCont9.end_crit_edge: ; preds = %verifyNullCont9
+ ret void
+
+verifyNullCont12: ; preds = %verifyNullCont9
+ br i1 undef, label %"no exception block13", label %verifyNullCont12.end_crit_edge
+
+verifyNullCont12.end_crit_edge: ; preds = %verifyNullCont12
+ ret void
+
+"no exception block13": ; preds = %verifyNullCont12
+ br i1 undef, label %verifyNullExit14, label %verifyNullCont15
+
+verifyNullExit14: ; preds = %"no exception block13"
+ ret void
+
+verifyNullCont15: ; preds = %"no exception block13"
+ br i1 undef, label %"no exception block16", label %verifyNullCont15.end_crit_edge
+
+verifyNullCont15.end_crit_edge: ; preds = %verifyNullCont15
+ ret void
+
+"no exception block16": ; preds = %verifyNullCont15
+ br i1 undef, label %verifyNullExit17, label %verifyNullCont18
+
+verifyNullExit17: ; preds = %"no exception block16"
+ ret void
+
+verifyNullCont18: ; preds = %"no exception block16"
+ br i1 undef, label %"no exception block19", label %verifyNullCont18.end_crit_edge
+
+verifyNullCont18.end_crit_edge: ; preds = %verifyNullCont18
+ ret void
+
+"no exception block19": ; preds = %verifyNullCont18
+ br i1 undef, label %verifyNullExit20, label %verifyNullCont21
+
+verifyNullExit20: ; preds = %"no exception block19"
+ ret void
+
+verifyNullCont21: ; preds = %"no exception block19"
+ br i1 undef, label %verifyNullCont24, label %verifyNullCont21.end_crit_edge
+
+verifyNullCont21.end_crit_edge: ; preds = %verifyNullCont21
+ ret void
+
+verifyNullCont24: ; preds = %verifyNullCont21
+ br i1 undef, label %verifyNullCont27, label %verifyNullCont24.end_crit_edge
+
+verifyNullCont24.end_crit_edge: ; preds = %verifyNullCont24
+ ret void
+
+verifyNullCont27: ; preds = %verifyNullCont24
+ br i1 undef, label %verifyNullCont32, label %verifyNullCont27.end_crit_edge
+
+verifyNullCont27.end_crit_edge: ; preds = %verifyNullCont27
+ ret void
+
+verifyNullCont32: ; preds = %verifyNullCont27
+ br i1 undef, label %verifyNullExit33, label %verifyNullCont34
+
+verifyNullExit33: ; preds = %verifyNullCont32
+ ret void
+
+verifyNullCont34: ; preds = %verifyNullCont32
+ br i1 undef, label %"no exception block35", label %verifyNullCont34.end_crit_edge
+
+verifyNullCont34.end_crit_edge: ; preds = %verifyNullCont34
+ ret void
+
+"no exception block35": ; preds = %verifyNullCont34
+ br i1 undef, label %end, label %verifyNullCont60
+
+verifyNullCont60: ; preds = %"no exception block35"
+ br i1 undef, label %verifyNullCont63, label %verifyNullCont60.end_crit_edge
+
+verifyNullCont60.end_crit_edge: ; preds = %verifyNullCont60
+ ret void
+
+verifyNullCont63: ; preds = %verifyNullCont60
+ br i1 undef, label %"no exception block64", label %verifyNullCont63.end_crit_edge
+
+verifyNullCont63.end_crit_edge: ; preds = %verifyNullCont63
+ ret void
+
+"no exception block64": ; preds = %verifyNullCont63
+ br i1 undef, label %verifyNullExit65, label %verifyNullCont66
+
+verifyNullExit65: ; preds = %"no exception block64"
+ ret void
+
+verifyNullCont66: ; preds = %"no exception block64"
+ br i1 undef, label %"no exception block67", label %verifyNullCont66.end_crit_edge
+
+verifyNullCont66.end_crit_edge: ; preds = %verifyNullCont66
+ ret void
+
+"no exception block67": ; preds = %verifyNullCont66
+ br i1 undef, label %verifyNullExit68, label %verifyNullCont69
+
+verifyNullExit68: ; preds = %"no exception block67"
+ ret void
+
+verifyNullCont69: ; preds = %"no exception block67"
+ br i1 undef, label %"no exception block70", label %verifyNullCont69.end_crit_edge
+
+verifyNullCont69.end_crit_edge: ; preds = %verifyNullCont69
+ ret void
+
+"no exception block70": ; preds = %verifyNullCont69
+ br i1 undef, label %verifyNullExit71, label %verifyNullCont72
+
+verifyNullExit71: ; preds = %"no exception block70"
+ ret void
+
+verifyNullCont72: ; preds = %"no exception block70"
+ br i1 undef, label %verifyNullCont75, label %verifyNullCont72.end_crit_edge
+
+verifyNullCont72.end_crit_edge: ; preds = %verifyNullCont72
+ ret void
+
+verifyNullCont75: ; preds = %verifyNullCont72
+ br i1 undef, label %verifyNullCont78, label %verifyNullCont75.end_crit_edge
+
+verifyNullCont75.end_crit_edge: ; preds = %verifyNullCont75
+ ret void
+
+verifyNullCont78: ; preds = %verifyNullCont75
+ br i1 undef, label %"verifyNullCont78.GOTO or IF*4_crit_edge", label %verifyNullCont78.end_crit_edge
+
+"verifyNullCont78.GOTO or IF*4_crit_edge": ; preds = %verifyNullCont78
+ br i1 undef, label %verifyNullExit80, label %verifyNullCont81
+
+verifyNullCont78.end_crit_edge: ; preds = %verifyNullCont78
+ ret void
+
+verifyNullExit80: ; preds = %"verifyNullCont78.GOTO or IF*4_crit_edge"
+ ret void
+
+verifyNullCont81: ; preds = %"verifyNullCont78.GOTO or IF*4_crit_edge"
+ %4 = ptrtoint i8* undef to i32 ; <i32> [#uses=2]
+ %5 = icmp slt i32 0, %4 ; <i1> [#uses=1]
+ br i1 %5, label %verifyNullCont84, label %verifyNullCont172
+
+verifyNullCont84: ; preds = %verifyNullCont81
+ br i1 undef, label %"GOTO or IF*2", label %verifyNullCont86
+
+verifyNullCont86: ; preds = %verifyNullCont84
+ br i1 undef, label %"true verifyAndComputePtr", label %"false verifyAndComputePtr"
+
+"true verifyAndComputePtr": ; preds = %verifyNullCont86
+ br i1 undef, label %"true verifyAndComputePtr89", label %"false verifyAndComputePtr90"
+
+"false verifyAndComputePtr": ; preds = %verifyNullCont86
+ ret void
+
+"true verifyAndComputePtr89": ; preds = %"true verifyAndComputePtr"
+ br i1 undef, label %"GOTO or IF*6", label %"GOTO or IF*2"
+
+"false verifyAndComputePtr90": ; preds = %"true verifyAndComputePtr"
+ ret void
+
+verifyNullCont126: ; preds = %"GOTO or IF*6"
+ br i1 undef, label %"true verifyAndComputePtr127", label %"false verifyAndComputePtr128"
+
+"true verifyAndComputePtr127": ; preds = %verifyNullCont126
+ br i1 undef, label %"true verifyAndComputePtr131.GOTO or IF*6_crit_edge", label %"GOTO or IF*5"
+
+"false verifyAndComputePtr128": ; preds = %verifyNullCont126
+ ret void
+
+"true verifyAndComputePtr131.GOTO or IF*6_crit_edge": ; preds = %"true verifyAndComputePtr127"
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %"GOTO or IF*6"
+
+verifyNullCont172: ; preds = %verifyNullCont81
+ unreachable
+}
diff --git a/test/Analysis/ScalarEvolution/pr3909.ll b/test/Analysis/ScalarEvolution/pr3909.ll
new file mode 100644
index 0000000..10e328d
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/pr3909.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -indvars -disable-output
+; PR 3909
+
+
+ type { i32, %1* } ; type %0
+ type { i32, i8* } ; type %1
+
+define x86_stdcallcc i32 @_Dmain(%0 %unnamed) {
+entry:
+ br label %whilebody
+
+whilebody: ; preds = %endwhile5, %entry
+ %i.0 = phi i64 [ 0, %entry ], [ %tmp11, %endwhile5 ] ; <i64> [#uses=1]
+ %m.0 = phi i64 [ 0, %entry ], [ %tmp11, %endwhile5 ] ; <i64> [#uses=2]
+ %tmp2 = mul i64 %m.0, %m.0 ; <i64> [#uses=1]
+ br label %whilecond3
+
+whilecond3: ; preds = %whilebody4, %whilebody
+ %j.0 = phi i64 [ %tmp2, %whilebody ], [ %tmp9, %whilebody4 ] ; <i64> [#uses=2]
+ %tmp7 = icmp ne i64 %j.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp7, label %whilebody4, label %endwhile5
+
+whilebody4: ; preds = %whilecond3
+ %tmp9 = add i64 %j.0, 1 ; <i64> [#uses=1]
+ br label %whilecond3
+
+endwhile5: ; preds = %whilecond3
+ %tmp11 = add i64 %i.0, 1 ; <i64> [#uses=2]
+ br label %whilebody
+}
diff --git a/test/Analysis/ScalarEvolution/scev-aa.ll b/test/Analysis/ScalarEvolution/scev-aa.ll
new file mode 100644
index 0000000..e07aca2
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/scev-aa.ll
@@ -0,0 +1,194 @@
+; RUN: opt < %s -scev-aa -aa-eval -print-all-alias-modref-info \
+; RUN: |& FileCheck %s
+
+; At the time of this writing, -basicaa only misses the example of the form
+; A[i+(j+1)] != A[i+j], which can arise from multi-dimensional array references.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
+
+; p[i] and p[i+1] don't alias.
+
+; CHECK: Function: loop: 3 pointers, 0 call sites
+; CHECK: NoAlias: double* %pi, double* %pi.next
+
+define void @loop(double* nocapture %p, i64 %n) nounwind {
+entry:
+ %j = icmp sgt i64 %n, 0
+ br i1 %j, label %bb, label %return
+
+bb:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %bb ]
+ %pi = getelementptr double* %p, i64 %i
+ %i.next = add i64 %i, 1
+ %pi.next = getelementptr double* %p, i64 %i.next
+ %x = load double* %pi
+ %y = load double* %pi.next
+ %z = fmul double %x, %y
+ store double %z, double* %pi
+ %exitcond = icmp eq i64 %i.next, %n
+ br i1 %exitcond, label %return, label %bb
+
+return:
+ ret void
+}
+
+; Slightly more involved: p[j][i], p[j][i+1], and p[j+1][i] don't alias.
+
+; CHECK: Function: nestedloop: 4 pointers, 0 call sites
+; CHECK: NoAlias: double* %pi.j, double* %pi.next.j
+; CHECK: NoAlias: double* %pi.j, double* %pi.j.next
+; CHECK: NoAlias: double* %pi.j.next, double* %pi.next.j
+
+define void @nestedloop(double* nocapture %p, i64 %m) nounwind {
+entry:
+ %k = icmp sgt i64 %m, 0
+ br i1 %k, label %guard, label %return
+
+guard:
+ %l = icmp sgt i64 91, 0
+ br i1 %l, label %outer.loop, label %return
+
+outer.loop:
+ %j = phi i64 [ 0, %guard ], [ %j.next, %outer.latch ]
+ br label %bb
+
+bb:
+ %i = phi i64 [ 0, %outer.loop ], [ %i.next, %bb ]
+ %i.next = add i64 %i, 1
+
+ %e = add i64 %i, %j
+ %pi.j = getelementptr double* %p, i64 %e
+ %f = add i64 %i.next, %j
+ %pi.next.j = getelementptr double* %p, i64 %f
+ %x = load double* %pi.j
+ %y = load double* %pi.next.j
+ %z = fmul double %x, %y
+ store double %z, double* %pi.j
+
+ %o = add i64 %j, 91
+ %g = add i64 %i, %o
+ %pi.j.next = getelementptr double* %p, i64 %g
+ %a = load double* %pi.j.next
+ %b = fmul double %x, %a
+ store double %b, double* %pi.j.next
+
+ %exitcond = icmp eq i64 %i.next, 91
+ br i1 %exitcond, label %outer.latch, label %bb
+
+outer.latch:
+ %j.next = add i64 %j, 91
+ %h = icmp eq i64 %j.next, %m
+ br i1 %h, label %return, label %outer.loop
+
+return:
+ ret void
+}
+
+; Even more involved: same as nestedloop, but with a variable extent.
+; When n is 1, p[j+1][i] does alias p[j][i+1], and there's no way to
+; prove whether n will be greater than 1, so that relation will always
+; by MayAlias. The loop is guarded by a n > 0 test though, so
+; p[j+1][i] and p[j][i] can theoretically be determined to be NoAlias,
+; however the analysis currently doesn't do that.
+; TODO: Make the analysis smarter and turn that MayAlias into a NoAlias.
+
+; CHECK: Function: nestedloop_more: 4 pointers, 0 call sites
+; CHECK: NoAlias: double* %pi.j, double* %pi.next.j
+; CHECK: MayAlias: double* %pi.j, double* %pi.j.next
+
+define void @nestedloop_more(double* nocapture %p, i64 %n, i64 %m) nounwind {
+entry:
+ %k = icmp sgt i64 %m, 0
+ br i1 %k, label %guard, label %return
+
+guard:
+ %l = icmp sgt i64 %n, 0
+ br i1 %l, label %outer.loop, label %return
+
+outer.loop:
+ %j = phi i64 [ 0, %guard ], [ %j.next, %outer.latch ]
+ br label %bb
+
+bb:
+ %i = phi i64 [ 0, %outer.loop ], [ %i.next, %bb ]
+ %i.next = add i64 %i, 1
+
+ %e = add i64 %i, %j
+ %pi.j = getelementptr double* %p, i64 %e
+ %f = add i64 %i.next, %j
+ %pi.next.j = getelementptr double* %p, i64 %f
+ %x = load double* %pi.j
+ %y = load double* %pi.next.j
+ %z = fmul double %x, %y
+ store double %z, double* %pi.j
+
+ %o = add i64 %j, %n
+ %g = add i64 %i, %o
+ %pi.j.next = getelementptr double* %p, i64 %g
+ %a = load double* %pi.j.next
+ %b = fmul double %x, %a
+ store double %b, double* %pi.j.next
+
+ %exitcond = icmp eq i64 %i.next, %n
+ br i1 %exitcond, label %outer.latch, label %bb
+
+outer.latch:
+ %j.next = add i64 %j, %n
+ %h = icmp eq i64 %j.next, %m
+ br i1 %h, label %return, label %outer.loop
+
+return:
+ ret void
+}
+
+; ScalarEvolution expands field offsets into constants, which allows it to
+; do aggressive analysis. Contrast this with BasicAA, which works by
+; recognizing GEP idioms.
+
+%struct.A = type { %struct.B, i32, i32 }
+%struct.B = type { double }
+
+; CHECK: Function: foo: 7 pointers, 0 call sites
+; CHECK: NoAlias: %struct.B* %B, i32* %Z
+; CHECK: NoAlias: %struct.B* %B, %struct.B* %C
+; CHECK: MustAlias: %struct.B* %C, i32* %Z
+; CHECK: NoAlias: %struct.B* %B, i32* %X
+; CHECK: MustAlias: i32* %X, i32* %Z
+; CHECK: MustAlias: %struct.B* %C, i32* %Y
+; CHECK: MustAlias: i32* %X, i32* %Y
+
+define void @foo() {
+entry:
+ %A = alloca %struct.A
+ %B = getelementptr %struct.A* %A, i32 0, i32 0
+ %Q = bitcast %struct.B* %B to %struct.A*
+ %Z = getelementptr %struct.A* %Q, i32 0, i32 1
+ %C = getelementptr %struct.B* %B, i32 1
+ %X = bitcast %struct.B* %C to i32*
+ %Y = getelementptr %struct.A* %A, i32 0, i32 1
+ ret void
+}
+
+; CHECK: Function: bar: 7 pointers, 0 call sites
+; CHECK: NoAlias: %struct.B* %N, i32* %P
+; CHECK: NoAlias: %struct.B* %N, %struct.B* %R
+; CHECK: MustAlias: %struct.B* %R, i32* %P
+; CHECK: NoAlias: %struct.B* %N, i32* %W
+; CHECK: MustAlias: i32* %P, i32* %W
+; CHECK: MustAlias: %struct.B* %R, i32* %V
+; CHECK: MustAlias: i32* %V, i32* %W
+
+define void @bar() {
+ %M = alloca %struct.A
+ %N = getelementptr %struct.A* %M, i32 0, i32 0
+ %O = bitcast %struct.B* %N to %struct.A*
+ %P = getelementptr %struct.A* %O, i32 0, i32 1
+ %R = getelementptr %struct.B* %N, i32 1
+ %W = bitcast %struct.B* %R to i32*
+ %V = getelementptr %struct.A* %M, i32 0, i32 1
+ ret void
+}
+
+; CHECK: 13 no alias responses
+; CHECK: 26 may alias responses
+; CHECK: 18 must alias responses
diff --git a/test/Analysis/ScalarEvolution/sext-inreg.ll b/test/Analysis/ScalarEvolution/sext-inreg.ll
new file mode 100644
index 0000000..23e1210
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/sext-inreg.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -analyze -scalar-evolution > %t
+; RUN: grep {sext i57 \{0,+,199\}<%bb> to i64} %t | count 1
+; RUN: grep {sext i59 \{0,+,199\}<%bb> to i64} %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+define i64 @foo(i64* nocapture %x, i64 %n) nounwind {
+entry:
+ %t0 = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
+ br i1 %t0, label %bb, label %return
+
+bb: ; preds = %bb, %entry
+ %i.01 = phi i64 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %t1 = shl i64 %i.01, 7 ; <i32> [#uses=1]
+ %t2 = ashr i64 %t1, 7 ; <i32> [#uses=1]
+ %s1 = shl i64 %i.01, 5 ; <i32> [#uses=1]
+ %s2 = ashr i64 %s1, 5 ; <i32> [#uses=1]
+ %t3 = getelementptr i64* %x, i64 %i.01 ; <i64*> [#uses=1]
+ store i64 0, i64* %t3, align 1
+ %indvar.next = add i64 %i.01, 199 ; <i32> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ %p = phi i64 [ 0, %entry ], [ %t2, %bb ]
+ %q = phi i64 [ 0, %entry ], [ %s2, %bb ]
+ %v = xor i64 %p, %q
+ ret i64 %v
+}
diff --git a/test/Analysis/ScalarEvolution/sext-iv-0.ll b/test/Analysis/ScalarEvolution/sext-iv-0.ll
new file mode 100644
index 0000000..2af794f
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/sext-iv-0.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -scalar-evolution -analyze \
+; RUN: | grep { --> \{-128,+,1\}<%bb1> Exits: 127} | count 5
+
+; Convert (sext {-128,+,1}) to {sext(-128),+,sext(1)}, since the
+; trip count is within range where this is safe.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @foo(double* nocapture %x) nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
+ %0 = trunc i64 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
+ %1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
+ %2 = sext i9 %1 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
+ %4 = load double* %3, align 8 ; <double> [#uses=1]
+ %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
+ %6 = sext i8 %0 to i64 ; <i64> [#uses=1]
+ %7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
+ store double %5, double* %7, align 8
+ %8 = add i64 %i.0.reg2mem.0, 1 ; <i64> [#uses=2]
+ %9 = icmp sgt i64 %8, 127 ; <i1> [#uses=1]
+ br i1 %9, label %return, label %bb1
+
+return: ; preds = %bb1
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/sext-iv-1.ll b/test/Analysis/ScalarEvolution/sext-iv-1.ll
new file mode 100644
index 0000000..9063cbb
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/sext-iv-1.ll
@@ -0,0 +1,100 @@
+; RUN: opt < %s -scalar-evolution -analyze \
+; RUN: | grep { --> (sext i. \{.\*,+,.\*\}<%bb1> to i64)} | count 5
+
+; Don't convert (sext {...,+,...}) to {sext(...),+,sext(...)} in cases
+; where the trip count is not within range.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @foo0(double* nocapture %x) nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
+ %0 = trunc i64 %i.0.reg2mem.0 to i7 ; <i8> [#uses=1]
+ %1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
+ %2 = sext i9 %1 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
+ %4 = load double* %3, align 8 ; <double> [#uses=1]
+ %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
+ %6 = sext i7 %0 to i64 ; <i64> [#uses=1]
+ %7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
+ store double %5, double* %7, align 8
+ %8 = add i64 %i.0.reg2mem.0, 1 ; <i64> [#uses=2]
+ %9 = icmp sgt i64 %8, 127 ; <i1> [#uses=1]
+ br i1 %9, label %return, label %bb1
+
+return: ; preds = %bb1
+ ret void
+}
+
+define void @foo1(double* nocapture %x) nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
+ %0 = trunc i64 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
+ %1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
+ %2 = sext i9 %1 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
+ %4 = load double* %3, align 8 ; <double> [#uses=1]
+ %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
+ %6 = sext i8 %0 to i64 ; <i64> [#uses=1]
+ %7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
+ store double %5, double* %7, align 8
+ %8 = add i64 %i.0.reg2mem.0, 1 ; <i64> [#uses=2]
+ %9 = icmp sgt i64 %8, 128 ; <i1> [#uses=1]
+ br i1 %9, label %return, label %bb1
+
+return: ; preds = %bb1
+ ret void
+}
+
+define void @foo2(double* nocapture %x) nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i64 [ -129, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
+ %0 = trunc i64 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
+ %1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
+ %2 = sext i9 %1 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
+ %4 = load double* %3, align 8 ; <double> [#uses=1]
+ %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
+ %6 = sext i8 %0 to i64 ; <i64> [#uses=1]
+ %7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
+ store double %5, double* %7, align 8
+ %8 = add i64 %i.0.reg2mem.0, 1 ; <i64> [#uses=2]
+ %9 = icmp sgt i64 %8, 127 ; <i1> [#uses=1]
+ br i1 %9, label %return, label %bb1
+
+return: ; preds = %bb1
+ ret void
+}
+
+define void @foo3(double* nocapture %x) nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
+ %0 = trunc i64 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
+ %1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
+ %2 = sext i9 %1 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
+ %4 = load double* %3, align 8 ; <double> [#uses=1]
+ %5 = fmul double %4, 3.900000e+00 ; <double> [#uses=1]
+ %6 = sext i8 %0 to i64 ; <i64> [#uses=1]
+ %7 = getelementptr double* %x, i64 %6 ; <double*> [#uses=1]
+ store double %5, double* %7, align 8
+ %8 = add i64 %i.0.reg2mem.0, -1 ; <i64> [#uses=2]
+ %9 = icmp sgt i64 %8, 127 ; <i1> [#uses=1]
+ br i1 %9, label %return, label %bb1
+
+return: ; preds = %bb1
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/sext-iv-2.ll b/test/Analysis/ScalarEvolution/sext-iv-2.ll
new file mode 100644
index 0000000..97e252c
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/sext-iv-2.ll
@@ -0,0 +1,74 @@
+; RUN: opt < %s -analyze -scalar-evolution | FileCheck %s
+
+; CHECK: %tmp3 = sext i8 %tmp2 to i32
+; CHECK: --> (sext i8 {0,+,1}<%bb1> to i32) Exits: -1
+; CHECK: %tmp4 = mul i32 %tmp3, %i.02
+; CHECK: --> ((sext i8 {0,+,1}<%bb1> to i32) * {0,+,1}<%bb>) Exits: {0,+,-1}<%bb>
+
+; These sexts are not foldable.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
+
+@table = common global [32 x [256 x i32]] zeroinitializer, align 32 ; <[32 x [256 x i32]]*> [#uses=2]
+
+define i32 @main() nounwind {
+entry:
+ br i1 false, label %bb5, label %bb.nph3
+
+bb.nph3: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb4, %bb.nph3
+ %i.02 = phi i32 [ %tmp10, %bb4 ], [ 0, %bb.nph3 ] ; <i32> [#uses=3]
+ br i1 false, label %bb3, label %bb.nph
+
+bb.nph: ; preds = %bb
+ br label %bb1
+
+bb1: ; preds = %bb2, %bb.nph
+ %j.01 = phi i32 [ %tmp8, %bb2 ], [ 0, %bb.nph ] ; <i32> [#uses=3]
+ %tmp2 = trunc i32 %j.01 to i8 ; <i8> [#uses=1]
+ %tmp3 = sext i8 %tmp2 to i32 ; <i32> [#uses=1]
+ %tmp4 = mul i32 %tmp3, %i.02 ; <i32> [#uses=1]
+ %tmp5 = sext i32 %i.02 to i64 ; <i64> [#uses=1]
+ %tmp6 = sext i32 %j.01 to i64 ; <i64> [#uses=1]
+ %tmp7 = getelementptr [32 x [256 x i32]]* @table, i64 0, i64 %tmp5, i64 %tmp6 ; <i32*> [#uses=1]
+ store i32 %tmp4, i32* %tmp7, align 4
+ %tmp8 = add i32 %j.01, 1 ; <i32> [#uses=2]
+ br label %bb2
+
+bb2: ; preds = %bb1
+ %phitmp1 = icmp sgt i32 %tmp8, 255 ; <i1> [#uses=1]
+ br i1 %phitmp1, label %bb2.bb3_crit_edge, label %bb1
+
+bb2.bb3_crit_edge: ; preds = %bb2
+ br label %bb3
+
+bb3: ; preds = %bb2.bb3_crit_edge, %bb
+ %tmp10 = add i32 %i.02, 1 ; <i32> [#uses=2]
+ br label %bb4
+
+bb4: ; preds = %bb3
+ %phitmp = icmp sgt i32 %tmp10, 31 ; <i1> [#uses=1]
+ br i1 %phitmp, label %bb4.bb5_crit_edge, label %bb
+
+bb4.bb5_crit_edge: ; preds = %bb4
+ br label %bb5
+
+bb5: ; preds = %bb4.bb5_crit_edge, %entry
+ %tmp12 = load i32* getelementptr ([32 x [256 x i32]]* @table, i64 0, i64 9, i64 132), align 16 ; <i32> [#uses=1]
+ %tmp13 = icmp eq i32 %tmp12, -1116 ; <i1> [#uses=1]
+ br i1 %tmp13, label %bb7, label %bb6
+
+bb6: ; preds = %bb5
+ call void @abort() noreturn nounwind
+ unreachable
+
+bb7: ; preds = %bb5
+ br label %return
+
+return: ; preds = %bb7
+ ret i32 0
+}
+
+declare void @abort() noreturn nounwind
diff --git a/test/Analysis/ScalarEvolution/smax.ll b/test/Analysis/ScalarEvolution/smax.ll
new file mode 100644
index 0000000..15dd744
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/smax.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -analyze -scalar-evolution | grep smax | count 2
+; RUN: opt < %s -analyze -scalar-evolution | grep \
+; RUN: {%. smax %. smax %.}
+; PR1614
+
+define i32 @x(i32 %a, i32 %b, i32 %c) {
+ %A = icmp sgt i32 %a, %b
+ %B = select i1 %A, i32 %a, i32 %b
+ %C = icmp sle i32 %c, %B
+ %D = select i1 %C, i32 %B, i32 %c
+ ret i32 %D
+}
diff --git a/test/Analysis/ScalarEvolution/trip-count.ll b/test/Analysis/ScalarEvolution/trip-count.ll
new file mode 100644
index 0000000..d750d4a
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: -scalar-evolution-max-iterations=0 | grep {backedge-taken count is 10000}
+; PR1101
+
+@A = weak global [1000 x i32] zeroinitializer, align 32
+
+
+define void @test(i32 %N) {
+entry:
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ br label %bb3
+
+bb: ; preds = %bb3
+ %tmp = getelementptr [1000 x i32]* @A, i32 0, i32 %i.0 ; <i32*> [#uses=1]
+ store i32 123, i32* %tmp
+ %tmp2 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %bb3
+
+bb3: ; preds = %bb, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %tmp2, %bb ] ; <i32> [#uses=3]
+ %tmp3 = icmp sle i32 %i.0, 9999 ; <i1> [#uses=1]
+ br i1 %tmp3, label %bb, label %bb5
+
+bb5: ; preds = %bb3
+ br label %return
+
+return: ; preds = %bb5
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/trip-count2.ll b/test/Analysis/ScalarEvolution/trip-count2.ll
new file mode 100644
index 0000000..79f3161
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count2.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -analyze -scalar-evolution | \
+; RUN: grep {backedge-taken count is 4}
+; PR1101
+
+@A = weak global [1000 x i32] zeroinitializer, align 32
+
+
+define void @test(i32 %N) {
+entry:
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ br label %bb3
+
+bb: ; preds = %bb3
+ %tmp = getelementptr [1000 x i32]* @A, i32 0, i32 %i.0 ; <i32*> [#uses=1]
+ store i32 123, i32* %tmp
+ %tmp4 = mul i32 %i.0, 4 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp4, 1
+ %tmp61 = xor i32 %tmp5, -2147483648
+ %tmp6 = trunc i32 %tmp61 to i16
+ %tmp71 = shl i16 %tmp6, 2
+ %tmp7 = zext i16 %tmp71 to i32
+ %tmp2 = add i32 %tmp7, %i.0
+ br label %bb3
+
+bb3: ; preds = %bb, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %tmp2, %bb ] ; <i32> [#uses=3]
+ %tmp3 = icmp sle i32 %i.0, 9999 ; <i1> [#uses=1]
+ br i1 %tmp3, label %bb, label %bb5
+
+bb5: ; preds = %bb3
+ br label %return
+
+return: ; preds = %bb5
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/trip-count3.ll b/test/Analysis/ScalarEvolution/trip-count3.ll
new file mode 100644
index 0000000..10b798b
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count3.ll
@@ -0,0 +1,78 @@
+; RUN: opt < %s -scalar-evolution -analyze \
+; RUN: | grep {Loop %bb3\\.i: Unpredictable backedge-taken count\\.}
+
+; ScalarEvolution can't compute a trip count because it doesn't know if
+; dividing by the stride will have a remainder. This could theoretically
+; be teaching it how to use a more elaborate trip count computation.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
+ %struct.SHA_INFO = type { [5 x i32], i32, i32, [16 x i32] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+@_2E_str = external constant [26 x i8] ; <[26 x i8]*> [#uses=0]
+@stdin = external global %struct.FILE* ; <%struct.FILE**> [#uses=0]
+@_2E_str1 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
+@_2E_str12 = external constant [30 x i8] ; <[30 x i8]*> [#uses=0]
+
+declare void @sha_init(%struct.SHA_INFO* nocapture) nounwind
+
+declare fastcc void @sha_transform(%struct.SHA_INFO* nocapture) nounwind
+
+declare void @sha_print(%struct.SHA_INFO* nocapture) nounwind
+
+declare i32 @printf(i8* nocapture, ...) nounwind
+
+declare void @sha_final(%struct.SHA_INFO* nocapture) nounwind
+
+declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
+
+declare void @sha_update(%struct.SHA_INFO* nocapture, i8* nocapture, i32) nounwind
+
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
+
+declare i64 @fread(i8* noalias nocapture, i64, i64, %struct.FILE* noalias nocapture) nounwind
+
+declare i32 @main(i32, i8** nocapture) nounwind
+
+declare noalias %struct.FILE* @fopen(i8* noalias nocapture, i8* noalias nocapture) nounwind
+
+declare i32 @fclose(%struct.FILE* nocapture) nounwind
+
+declare void @sha_stream(%struct.SHA_INFO* nocapture, %struct.FILE* nocapture) nounwind
+
+define void @sha_stream_bb3_2E_i(%struct.SHA_INFO* %sha_info, i8* %data1, i32, i8** %buffer_addr.0.i.out, i32* %count_addr.0.i.out) nounwind {
+newFuncRoot:
+ br label %bb3.i
+
+sha_update.exit.exitStub: ; preds = %bb3.i
+ store i8* %buffer_addr.0.i, i8** %buffer_addr.0.i.out
+ store i32 %count_addr.0.i, i32* %count_addr.0.i.out
+ ret void
+
+bb2.i: ; preds = %bb3.i
+ %1 = getelementptr %struct.SHA_INFO* %sha_info, i64 0, i32 3 ; <[16 x i32]*> [#uses=1]
+ %2 = bitcast [16 x i32]* %1 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i64(i8* %2, i8* %buffer_addr.0.i, i64 64, i32 1) nounwind
+ %3 = getelementptr %struct.SHA_INFO* %sha_info, i64 0, i32 3, i64 0 ; <i32*> [#uses=1]
+ %4 = bitcast i32* %3 to i8* ; <i8*> [#uses=1]
+ br label %codeRepl
+
+codeRepl: ; preds = %bb2.i
+ call void @sha_stream_bb3_2E_i_bb1_2E_i_2E_i(i8* %4)
+ br label %byte_reverse.exit.i
+
+byte_reverse.exit.i: ; preds = %codeRepl
+ call fastcc void @sha_transform(%struct.SHA_INFO* %sha_info) nounwind
+ %5 = getelementptr i8* %buffer_addr.0.i, i64 64 ; <i8*> [#uses=1]
+ %6 = add i32 %count_addr.0.i, -64 ; <i32> [#uses=1]
+ br label %bb3.i
+
+bb3.i: ; preds = %byte_reverse.exit.i, %newFuncRoot
+ %buffer_addr.0.i = phi i8* [ %data1, %newFuncRoot ], [ %5, %byte_reverse.exit.i ] ; <i8*> [#uses=3]
+ %count_addr.0.i = phi i32 [ %0, %newFuncRoot ], [ %6, %byte_reverse.exit.i ] ; <i32> [#uses=3]
+ %7 = icmp sgt i32 %count_addr.0.i, 63 ; <i1> [#uses=1]
+ br i1 %7, label %bb2.i, label %sha_update.exit.exitStub
+}
+
+declare void @sha_stream_bb3_2E_i_bb1_2E_i_2E_i(i8*) nounwind
diff --git a/test/Analysis/ScalarEvolution/trip-count4.ll b/test/Analysis/ScalarEvolution/trip-count4.ll
new file mode 100644
index 0000000..116f62d
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count4.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: | grep {sext.*trunc.*Exits: 11}
+
+; ScalarEvolution should be able to compute a loop exit value for %indvar.i8.
+
+define void @another_count_down_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %indvar = phi i64 [ %n, %entry ], [ %indvar.next, %loop ] ; <i64> [#uses=4]
+ %s0 = shl i64 %indvar, 8 ; <i64> [#uses=1]
+ %indvar.i8 = ashr i64 %s0, 8 ; <i64> [#uses=1]
+ %t0 = getelementptr double* %d, i64 %indvar.i8 ; <double*> [#uses=2]
+ %t1 = load double* %t0 ; <double> [#uses=1]
+ %t2 = fmul double %t1, 1.000000e-01 ; <double> [#uses=1]
+ store double %t2, double* %t0
+ %indvar.next = sub i64 %indvar, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, 10 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %loop
+
+return: ; preds = %loop
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/trip-count5.ll b/test/Analysis/ScalarEvolution/trip-count5.ll
new file mode 100644
index 0000000..1194a1d
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count5.ll
@@ -0,0 +1,48 @@
+; RUN: opt < %s -analyze -scalar-evolution > %t
+; RUN: grep sext %t | count 2
+; RUN: not grep {(sext} %t
+
+; ScalarEvolution should be able to compute a maximum trip count
+; value sufficient to fold away both sext casts.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define float @t(float* %pTmp1, float* %peakWeight, float* %nrgReducePeakrate, i32 %bim) nounwind {
+entry:
+ %tmp3 = load float* %peakWeight, align 4 ; <float> [#uses=2]
+ %tmp2538 = icmp sgt i32 %bim, 0 ; <i1> [#uses=1]
+ br i1 %tmp2538, label %bb.nph, label %bb4
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %distERBhi.036 = phi float [ %tmp10, %bb1 ], [ 0.000000e+00, %bb.nph ] ; <float> [#uses=1]
+ %hiPart.035 = phi i32 [ %tmp12, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=2]
+ %peakCount.034 = phi float [ %tmp19, %bb1 ], [ %tmp3, %bb.nph ] ; <float> [#uses=1]
+ %tmp6 = sext i32 %hiPart.035 to i64 ; <i64> [#uses=1]
+ %tmp7 = getelementptr float* %pTmp1, i64 %tmp6 ; <float*> [#uses=1]
+ %tmp8 = load float* %tmp7, align 4 ; <float> [#uses=1]
+ %tmp10 = fadd float %tmp8, %distERBhi.036 ; <float> [#uses=3]
+ %tmp12 = add i32 %hiPart.035, 1 ; <i32> [#uses=3]
+ %tmp15 = sext i32 %tmp12 to i64 ; <i64> [#uses=1]
+ %tmp16 = getelementptr float* %peakWeight, i64 %tmp15 ; <float*> [#uses=1]
+ %tmp17 = load float* %tmp16, align 4 ; <float> [#uses=1]
+ %tmp19 = fadd float %tmp17, %peakCount.034 ; <float> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %tmp21 = fcmp olt float %tmp10, 2.500000e+00 ; <i1> [#uses=1]
+ %tmp25 = icmp slt i32 %tmp12, %bim ; <i1> [#uses=1]
+ %tmp27 = and i1 %tmp21, %tmp25 ; <i1> [#uses=1]
+ br i1 %tmp27, label %bb, label %bb1.bb4_crit_edge
+
+bb1.bb4_crit_edge: ; preds = %bb1
+ br label %bb4
+
+bb4: ; preds = %bb1.bb4_crit_edge, %entry
+ %distERBhi.0.lcssa = phi float [ %tmp10, %bb1.bb4_crit_edge ], [ 0.000000e+00, %entry ] ; <float> [#uses=1]
+ %peakCount.0.lcssa = phi float [ %tmp19, %bb1.bb4_crit_edge ], [ %tmp3, %entry ] ; <float> [#uses=1]
+ %tmp31 = fdiv float %peakCount.0.lcssa, %distERBhi.0.lcssa ; <float> [#uses=1]
+ ret float %tmp31
+}
diff --git a/test/Analysis/ScalarEvolution/trip-count6.ll b/test/Analysis/ScalarEvolution/trip-count6.ll
new file mode 100644
index 0000000..956fb81
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count6.ll
@@ -0,0 +1,37 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: | grep {max backedge-taken count is 1\$}
+
+@mode_table = global [4 x i32] zeroinitializer ; <[4 x i32]*> [#uses=1]
+
+define i8 @f() {
+entry:
+ tail call i32 @fegetround( ) ; <i32>:0 [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb4, %entry
+ %mode.0 = phi i8 [ 0, %entry ], [ %indvar.next, %bb4 ] ; <i8> [#uses=4]
+ zext i8 %mode.0 to i32 ; <i32>:1 [#uses=1]
+ getelementptr [4 x i32]* @mode_table, i32 0, i32 %1 ; <i32*>:2 [#uses=1]
+ load i32* %2, align 4 ; <i32>:3 [#uses=1]
+ icmp eq i32 %3, %0 ; <i1>:4 [#uses=1]
+ br i1 %4, label %bb1, label %bb2
+
+bb1: ; preds = %bb
+ ret i8 %mode.0
+
+bb2: ; preds = %bb
+ icmp eq i8 %mode.0, 1 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb5, label %bb4
+
+bb4: ; preds = %bb2
+ %indvar.next = add i8 %mode.0, 1 ; <i8> [#uses=1]
+ br label %bb
+
+bb5: ; preds = %bb2
+ tail call void @raise_exception( ) noreturn
+ unreachable
+}
+
+declare i32 @fegetround()
+
+declare void @raise_exception() noreturn
diff --git a/test/Analysis/ScalarEvolution/trip-count7.ll b/test/Analysis/ScalarEvolution/trip-count7.ll
new file mode 100644
index 0000000..a8b797e
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count7.ll
@@ -0,0 +1,150 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: | grep {Loop %bb7.i: Unpredictable backedge-taken count\\.}
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+ %struct.complex = type { float, float }
+ %struct.element = type { i32, i32 }
+ %struct.node = type { %struct.node*, %struct.node*, i32 }
+@seed = external global i64 ; <i64*> [#uses=0]
+@_2E_str = external constant [18 x i8], align 1 ; <[18 x i8]*> [#uses=0]
+@_2E_str1 = external constant [4 x i8], align 1 ; <[4 x i8]*> [#uses=0]
+@value = external global float ; <float*> [#uses=0]
+@fixed = external global float ; <float*> [#uses=0]
+@floated = external global float ; <float*> [#uses=0]
+@permarray = external global [11 x i32], align 32 ; <[11 x i32]*> [#uses=0]
+@pctr = external global i32 ; <i32*> [#uses=0]
+@tree = external global %struct.node* ; <%struct.node**> [#uses=0]
+@stack = external global [4 x i32], align 16 ; <[4 x i32]*> [#uses=0]
+@cellspace = external global [19 x %struct.element], align 32 ; <[19 x %struct.element]*> [#uses=0]
+@freelist = external global i32 ; <i32*> [#uses=0]
+@movesdone = external global i32 ; <i32*> [#uses=0]
+@ima = external global [41 x [41 x i32]], align 32 ; <[41 x [41 x i32]]*> [#uses=0]
+@imb = external global [41 x [41 x i32]], align 32 ; <[41 x [41 x i32]]*> [#uses=0]
+@imr = external global [41 x [41 x i32]], align 32 ; <[41 x [41 x i32]]*> [#uses=0]
+@rma = external global [41 x [41 x float]], align 32 ; <[41 x [41 x float]]*> [#uses=0]
+@rmb = external global [41 x [41 x float]], align 32 ; <[41 x [41 x float]]*> [#uses=0]
+@rmr = external global [41 x [41 x float]], align 32 ; <[41 x [41 x float]]*> [#uses=0]
+@piececount = external global [4 x i32], align 16 ; <[4 x i32]*> [#uses=0]
+@class = external global [13 x i32], align 32 ; <[13 x i32]*> [#uses=0]
+@piecemax = external global [13 x i32], align 32 ; <[13 x i32]*> [#uses=0]
+@puzzl = external global [512 x i32], align 32 ; <[512 x i32]*> [#uses=0]
+@p = external global [13 x [512 x i32]], align 32 ; <[13 x [512 x i32]]*> [#uses=0]
+@n = external global i32 ; <i32*> [#uses=0]
+@kount = external global i32 ; <i32*> [#uses=0]
+@sortlist = external global [5001 x i32], align 32 ; <[5001 x i32]*> [#uses=0]
+@biggest = external global i32 ; <i32*> [#uses=0]
+@littlest = external global i32 ; <i32*> [#uses=0]
+@top = external global i32 ; <i32*> [#uses=0]
+@z = external global [257 x %struct.complex], align 32 ; <[257 x %struct.complex]*> [#uses=0]
+@w = external global [257 x %struct.complex], align 32 ; <[257 x %struct.complex]*> [#uses=0]
+@e = external global [130 x %struct.complex], align 32 ; <[130 x %struct.complex]*> [#uses=0]
+@zr = external global float ; <float*> [#uses=0]
+@zi = external global float ; <float*> [#uses=0]
+
+declare void @Initrand() nounwind
+
+declare i32 @Rand() nounwind
+
+declare void @Try(i32, i32*, i32*, i32*, i32*, i32*) nounwind
+
+declare i32 @puts(i8* nocapture) nounwind
+
+declare void @Queens(i32) nounwind
+
+declare i32 @printf(i8* nocapture, ...) nounwind
+
+declare i32 @main() nounwind
+
+declare void @Doit() nounwind
+
+declare void @Doit_bb7([15 x i32]*, [17 x i32]*, [9 x i32]*) nounwind
+
+define void @Doit_bb7_2E_i([9 x i32]* %x1, [15 x i32]* %c, [17 x i32]* %b, [9 x i32]* %a, i32* %q, i32* %x1.sub, i32* %b9, i32* %a10, i32* %c11) nounwind {
+newFuncRoot:
+ br label %bb7.i
+
+Try.exit.exitStub: ; preds = %bb7.i
+ ret void
+
+bb.i: ; preds = %bb7.i
+ %tmp = add i32 %j.0.i, 1 ; <i32> [#uses=5]
+ store i32 0, i32* %q, align 4
+ %tmp1 = sext i32 %tmp to i64 ; <i64> [#uses=1]
+ %tmp2 = getelementptr [9 x i32]* %a, i64 0, i64 %tmp1 ; <i32*> [#uses=1]
+ %tmp3 = load i32* %tmp2, align 4 ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb.i.bb7.i.backedge_crit_edge, label %bb1.i
+
+bb1.i: ; preds = %bb.i
+ %tmp5 = add i32 %j.0.i, 2 ; <i32> [#uses=1]
+ %tmp6 = sext i32 %tmp5 to i64 ; <i64> [#uses=1]
+ %tmp7 = getelementptr [17 x i32]* %b, i64 0, i64 %tmp6 ; <i32*> [#uses=1]
+ %tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1]
+ %tmp9 = icmp eq i32 %tmp8, 0 ; <i1> [#uses=1]
+ br i1 %tmp9, label %bb1.i.bb7.i.backedge_crit_edge, label %bb2.i
+
+bb2.i: ; preds = %bb1.i
+ %tmp10 = sub i32 7, %j.0.i ; <i32> [#uses=1]
+ %tmp11 = sext i32 %tmp10 to i64 ; <i64> [#uses=1]
+ %tmp12 = getelementptr [15 x i32]* %c, i64 0, i64 %tmp11 ; <i32*> [#uses=1]
+ %tmp13 = load i32* %tmp12, align 4 ; <i32> [#uses=1]
+ %tmp14 = icmp eq i32 %tmp13, 0 ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb2.i.bb7.i.backedge_crit_edge, label %bb3.i
+
+bb3.i: ; preds = %bb2.i
+ %tmp15 = getelementptr [9 x i32]* %x1, i64 0, i64 1 ; <i32*> [#uses=1]
+ store i32 %tmp, i32* %tmp15, align 4
+ %tmp16 = sext i32 %tmp to i64 ; <i64> [#uses=1]
+ %tmp17 = getelementptr [9 x i32]* %a, i64 0, i64 %tmp16 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp17, align 4
+ %tmp18 = add i32 %j.0.i, 2 ; <i32> [#uses=1]
+ %tmp19 = sext i32 %tmp18 to i64 ; <i64> [#uses=1]
+ %tmp20 = getelementptr [17 x i32]* %b, i64 0, i64 %tmp19 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp20, align 4
+ %tmp21 = sub i32 7, %j.0.i ; <i32> [#uses=1]
+ %tmp22 = sext i32 %tmp21 to i64 ; <i64> [#uses=1]
+ %tmp23 = getelementptr [15 x i32]* %c, i64 0, i64 %tmp22 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp23, align 4
+ call void @Try(i32 2, i32* %q, i32* %b9, i32* %a10, i32* %c11, i32* %x1.sub) nounwind
+ %tmp24 = load i32* %q, align 4 ; <i32> [#uses=1]
+ %tmp25 = icmp eq i32 %tmp24, 0 ; <i1> [#uses=1]
+ br i1 %tmp25, label %bb5.i, label %bb3.i.bb7.i.backedge_crit_edge
+
+bb5.i: ; preds = %bb3.i
+ %tmp26 = sext i32 %tmp to i64 ; <i64> [#uses=1]
+ %tmp27 = getelementptr [9 x i32]* %a, i64 0, i64 %tmp26 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp27, align 4
+ %tmp28 = add i32 %j.0.i, 2 ; <i32> [#uses=1]
+ %tmp29 = sext i32 %tmp28 to i64 ; <i64> [#uses=1]
+ %tmp30 = getelementptr [17 x i32]* %b, i64 0, i64 %tmp29 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp30, align 4
+ %tmp31 = sub i32 7, %j.0.i ; <i32> [#uses=1]
+ %tmp32 = sext i32 %tmp31 to i64 ; <i64> [#uses=1]
+ %tmp33 = getelementptr [15 x i32]* %c, i64 0, i64 %tmp32 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp33, align 4
+ br label %bb7.i.backedge
+
+bb7.i.backedge: ; preds = %bb3.i.bb7.i.backedge_crit_edge, %bb2.i.bb7.i.backedge_crit_edge, %bb1.i.bb7.i.backedge_crit_edge, %bb.i.bb7.i.backedge_crit_edge, %bb5.i
+ br label %bb7.i
+
+bb7.i: ; preds = %bb7.i.backedge, %newFuncRoot
+ %j.0.i = phi i32 [ 0, %newFuncRoot ], [ %tmp, %bb7.i.backedge ] ; <i32> [#uses=8]
+ %tmp34 = load i32* %q, align 4 ; <i32> [#uses=1]
+ %tmp35 = icmp eq i32 %tmp34, 0 ; <i1> [#uses=1]
+ %tmp36 = icmp ne i32 %j.0.i, 8 ; <i1> [#uses=1]
+ %tmp37 = and i1 %tmp35, %tmp36 ; <i1> [#uses=1]
+ br i1 %tmp37, label %bb.i, label %Try.exit.exitStub
+
+bb.i.bb7.i.backedge_crit_edge: ; preds = %bb.i
+ br label %bb7.i.backedge
+
+bb1.i.bb7.i.backedge_crit_edge: ; preds = %bb1.i
+ br label %bb7.i.backedge
+
+bb2.i.bb7.i.backedge_crit_edge: ; preds = %bb2.i
+ br label %bb7.i.backedge
+
+bb3.i.bb7.i.backedge_crit_edge: ; preds = %bb3.i
+ br label %bb7.i.backedge
+}
diff --git a/test/Analysis/ScalarEvolution/trip-count8.ll b/test/Analysis/ScalarEvolution/trip-count8.ll
new file mode 100644
index 0000000..ac5ee60
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count8.ll
@@ -0,0 +1,37 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: | grep {Loop %for\\.body: backedge-taken count is (-1 + \[%\]ecx)}
+; PR4599
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define i32 @foo(i32 %ecx) nounwind {
+entry:
+ %cmp2 = icmp eq i32 %ecx, 0 ; <i1> [#uses=1]
+ br i1 %cmp2, label %for.end, label %bb.nph
+
+for.cond: ; preds = %for.inc
+ %cmp = icmp ult i32 %inc, %ecx ; <i1> [#uses=1]
+ br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
+
+for.cond.for.end_crit_edge: ; preds = %for.cond
+ %phitmp = add i32 %i.01, 2 ; <i32> [#uses=1]
+ br label %for.end
+
+bb.nph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %bb.nph, %for.cond
+ %i.01 = phi i32 [ %inc, %for.cond ], [ 0, %bb.nph ] ; <i32> [#uses=3]
+ %call = call i32 @bar(i32 %i.01) nounwind ; <i32> [#uses=0]
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %inc = add i32 %i.01, 1 ; <i32> [#uses=2]
+ br label %for.cond
+
+for.end: ; preds = %for.cond.for.end_crit_edge, %entry
+ %i.0.lcssa = phi i32 [ %phitmp, %for.cond.for.end_crit_edge ], [ 1, %entry ] ; <i32> [#uses=1]
+ ret i32 %i.0.lcssa
+}
+
+declare i32 @bar(i32)
diff --git a/test/Analysis/ScalarEvolution/trip-count9.ll b/test/Analysis/ScalarEvolution/trip-count9.ll
new file mode 100644
index 0000000..9180f2b
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/trip-count9.ll
@@ -0,0 +1,408 @@
+; RUN: opt -analyze -scalar-evolution -S < %s | FileCheck %s
+
+; Every combination of
+; - starting at 0, 1, or %x
+; - steping by 1 or 2
+; - stopping at %n or %n*2
+; - using nsw, or not
+
+; Some of these represent missed opportunities.
+
+; CHECK: Determining loop execution counts for: @foo
+; CHECK: Loop %loop: backedge-taken count is (-1 + %n)
+; CHECK: Loop %loop: max backedge-taken count is 6
+define void @foo(i4 %n) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 1
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: Unpredictable max backedge-taken count.
+define void @step2(i4 %n) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 2
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @start1
+; CHECK: Loop %loop: backedge-taken count is (-2 + (2 smax %n))
+; CHECK: Loop %loop: max backedge-taken count is 5
+define void @start1(i4 %n) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 1, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 1
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @start1_step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: Unpredictable max backedge-taken count.
+define void @start1_step2(i4 %n) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 1, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 2
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @startx
+; CHECK: Loop %loop: backedge-taken count is (-1 + (-1 * %x) + ((1 + %x) smax %n))
+; CHECK: Loop %loop: max backedge-taken count is -1
+define void @startx(i4 %n, i4 %x) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ %x, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 1
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @startx_step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: Unpredictable max backedge-taken count.
+define void @startx_step2(i4 %n, i4 %x) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ %x, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 2
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @nsw
+; CHECK: Loop %loop: backedge-taken count is (-1 + %n)
+; CHECK: Loop %loop: max backedge-taken count is 6
+define void @nsw(i4 %n) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 1
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; Be careful with this one. If %n is INT4_MAX, %i.next will wrap. The nsw bit
+; says that the result is undefined, but ScalarEvolution must respect that
+; subsequent passes may result the undefined behavior in predictable ways.
+; CHECK: Determining loop execution counts for: @nsw_step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: Unpredictable max backedge-taken count.
+define void @nsw_step2(i4 %n) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 2
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @nsw_start1
+; CHECK: Loop %loop: backedge-taken count is (-2 + (2 smax %n))
+; CHECK: Loop %loop: max backedge-taken count is 5
+define void @nsw_start1(i4 %n) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 1, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 1
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @nsw_start1_step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: Unpredictable max backedge-taken count.
+define void @nsw_start1_step2(i4 %n) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 1, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 2
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @nsw_startx
+; CHECK: Loop %loop: backedge-taken count is (-1 + (-1 * %x) + ((1 + %x) smax %n))
+; CHECK: Loop %loop: max backedge-taken count is -1
+define void @nsw_startx(i4 %n, i4 %x) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ %x, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 1
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @nsw_startx_step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: Unpredictable max backedge-taken count.
+define void @nsw_startx_step2(i4 %n, i4 %x) {
+entry:
+ %s = icmp sgt i4 %n, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ %x, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 2
+ %t = icmp slt i4 %i.next, %n
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even
+; CHECK: Loop %loop: backedge-taken count is (-1 + (2 * %n))
+; CHECK: Loop %loop: max backedge-taken count is 5
+define void @even(i4 %n) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 1
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: max backedge-taken count is 2
+define void @even_step2(i4 %n) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 2
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_start1
+; CHECK: Loop %loop: backedge-taken count is (-2 + (2 smax (2 * %n)))
+; CHECK: Loop %loop: max backedge-taken count is 4
+define void @even_start1(i4 %n) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 1, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 1
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_start1_step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: max backedge-taken count is 2
+define void @even_start1_step2(i4 %n) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 1, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 2
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_startx
+; CHECK: Loop %loop: backedge-taken count is (-1 + (-1 * %x) + ((1 + %x) smax (2 * %n)))
+; CHECK: Loop %loop: max backedge-taken count is -1
+define void @even_startx(i4 %n, i4 %x) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ %x, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 1
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_startx_step2
+; CHECK: Loop %loop: Unpredictable backedge-taken count.
+; CHECK: Loop %loop: max backedge-taken count is 7
+define void @even_startx_step2(i4 %n, i4 %x) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ %x, %entry ], [ %i.next, %loop ]
+ %i.next = add i4 %i, 2
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_nsw
+; CHECK: Loop %loop: backedge-taken count is (-1 + (2 * %n))
+; CHECK: Loop %loop: max backedge-taken count is 5
+define void @even_nsw(i4 %n) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 1
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_nsw_step2
+; CHECK: Loop %loop: backedge-taken count is ((-1 + (2 * %n)) /u 2)
+; CHECK: Loop %loop: max backedge-taken count is 2
+define void @even_nsw_step2(i4 %n) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 2
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_nsw_start1
+; CHECK: Loop %loop: backedge-taken count is (-2 + (2 smax (2 * %n)))
+; CHECK: Loop %loop: max backedge-taken count is 4
+define void @even_nsw_start1(i4 %n) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 1, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 1
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_nsw_start1_step2
+; CHECK: Loop %loop: backedge-taken count is ((-2 + (3 smax (2 * %n))) /u 2)
+; CHECK: Loop %loop: max backedge-taken count is 2
+define void @even_nsw_start1_step2(i4 %n) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ 1, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 2
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_nsw_startx
+; CHECK: Loop %loop: backedge-taken count is (-1 + (-1 * %x) + ((1 + %x) smax (2 * %n)))
+; CHECK: Loop %loop: max backedge-taken count is -1
+define void @even_nsw_startx(i4 %n, i4 %x) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ %x, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 1
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
+
+; CHECK: Determining loop execution counts for: @even_nsw_startx_step2
+; CHECK: Loop %loop: backedge-taken count is ((-1 + (-1 * %x) + ((2 + %x) smax (2 * %n))) /u 2)
+; CHECK: Loop %loop: max backedge-taken count is 7
+define void @even_nsw_startx_step2(i4 %n, i4 %x) {
+entry:
+ %m = shl i4 %n, 1
+ %s = icmp sgt i4 %m, 0
+ br i1 %s, label %loop, label %exit
+loop:
+ %i = phi i4 [ %x, %entry ], [ %i.next, %loop ]
+ %i.next = add nsw i4 %i, 2
+ %t = icmp slt i4 %i.next, %m
+ br i1 %t, label %loop, label %exit
+exit:
+ ret void
+}
diff --git a/test/Analysis/ScalarEvolution/xor-and.ll b/test/Analysis/ScalarEvolution/xor-and.ll
new file mode 100644
index 0000000..c0530bb
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/xor-and.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -scalar-evolution -analyze \
+; RUN: | grep {\\--> (zext i4 (-8 + (trunc i64 (8 \\* %x) to i4)) to i64)}
+
+; ScalarEvolution shouldn't try to analyze %z into something like
+; --> (zext i4 (-1 + (-1 * (trunc i64 (8 * %x) to i4))) to i64)
+
+define i64 @foo(i64 %x) {
+ %a = shl i64 %x, 3
+ %t = and i64 %a, 8
+ %z = xor i64 %t, 8
+ ret i64 %z
+}
diff --git a/test/Analysis/ScalarEvolution/zext-wrap.ll b/test/Analysis/ScalarEvolution/zext-wrap.ll
new file mode 100644
index 0000000..38d15ff
--- /dev/null
+++ b/test/Analysis/ScalarEvolution/zext-wrap.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -analyze -scalar-evolution \
+; RUN: | FileCheck %s
+; PR4569
+
+define i16 @main() nounwind {
+entry:
+ br label %bb.i
+
+bb.i: ; preds = %bb1.i, %bb.nph
+ %l_95.0.i1 = phi i8 [ %tmp1, %bb.i ], [ 0, %entry ]
+
+; This cast shouldn't be folded into the addrec.
+; CHECK: %tmp = zext i8 %l_95.0.i1 to i16
+; CHECK: --> (zext i8 {0,+,-1}<%bb.i> to i16) Exits: 2
+
+ %tmp = zext i8 %l_95.0.i1 to i16
+
+ %tmp1 = add i8 %l_95.0.i1, -1
+ %phitmp = icmp eq i8 %tmp1, 1
+ br i1 %phitmp, label %bb1.i.func_36.exit_crit_edge, label %bb.i
+
+bb1.i.func_36.exit_crit_edge:
+ ret i16 %tmp
+}
diff --git a/test/Archive/GNU.a b/test/Archive/GNU.a
new file mode 100644
index 0000000..4c09881
--- /dev/null
+++ b/test/Archive/GNU.a
Binary files differ
diff --git a/test/Archive/GNU.toc b/test/Archive/GNU.toc
new file mode 100644
index 0000000..d993413
--- /dev/null
+++ b/test/Archive/GNU.toc
@@ -0,0 +1,4 @@
+evenlen
+oddlen
+very_long_bytecode_file_name.bc
+IsNAN.o
diff --git a/test/Archive/IsNAN.o b/test/Archive/IsNAN.o
new file mode 100644
index 0000000..7b3a12a
--- /dev/null
+++ b/test/Archive/IsNAN.o
Binary files differ
diff --git a/test/Archive/MacOSX.a b/test/Archive/MacOSX.a
new file mode 100644
index 0000000..8ba1e6d
--- /dev/null
+++ b/test/Archive/MacOSX.a
Binary files differ
diff --git a/test/Archive/MacOSX.toc b/test/Archive/MacOSX.toc
new file mode 100644
index 0000000..f971df7
--- /dev/null
+++ b/test/Archive/MacOSX.toc
@@ -0,0 +1,5 @@
+__.SYMDEF SORTED
+evenlen
+oddlen
+very_long_bytecode_file_name.bc
+IsNAN.o
diff --git a/test/Archive/README.txt b/test/Archive/README.txt
new file mode 100644
index 0000000..da6cfa4
--- /dev/null
+++ b/test/Archive/README.txt
@@ -0,0 +1,24 @@
+test/Regression/Archive
+=======================
+
+This directory contains various tests of llvm-ar and llvm-ranlib to ensure
+compatibility reading other ar(1) formats. It also provides a basic
+functionality test for these tools.
+
+There are four archives stored in CVS with these tests:
+
+GNU.a - constructed on Linux with GNU ar
+MacOSX.a - constructed on Mac OS X with its native BSD4.4 ar
+SVR4.a - constructed on Solaris with /usr/ccs/bin/ar
+xpg4.a - constructed on Solaris with /usr/xpg4/bin/ar
+
+Each type of test is run on each of these archive files. These archives each
+contain four members:
+
+oddlen - a member with an odd lengthed name and content
+evenlen - a member with an even lengthed name and content
+IsNAN.o - a Linux native binary
+very_long_bytecode_file_name.bc - LLVM bytecode file with really long name
+
+These files test different aspects of the archiver that should cause failures
+in llvm-ar if regressions are introduced.
diff --git a/test/Archive/SVR4.a b/test/Archive/SVR4.a
new file mode 100644
index 0000000..3947813
--- /dev/null
+++ b/test/Archive/SVR4.a
Binary files differ
diff --git a/test/Archive/SVR4.toc b/test/Archive/SVR4.toc
new file mode 100644
index 0000000..d993413
--- /dev/null
+++ b/test/Archive/SVR4.toc
@@ -0,0 +1,4 @@
+evenlen
+oddlen
+very_long_bytecode_file_name.bc
+IsNAN.o
diff --git a/test/Archive/dg.exp b/test/Archive/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Archive/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Archive/evenlen b/test/Archive/evenlen
new file mode 100644
index 0000000..59ee8d55
--- /dev/null
+++ b/test/Archive/evenlen
@@ -0,0 +1 @@
+evenlen
diff --git a/test/Archive/extract.ll b/test/Archive/extract.ll
new file mode 100644
index 0000000..3649714
--- /dev/null
+++ b/test/Archive/extract.ll
@@ -0,0 +1,16 @@
+; This isn't really an assembly file, its just here to run the test.
+
+; This test just makes sure that llvm-ar can extract bytecode members
+; from various style archives.
+
+; RUN: llvm-ar x %p/GNU.a very_long_bytecode_file_name.bc
+; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null
+
+; RUN: llvm-ar x %p/MacOSX.a very_long_bytecode_file_name.bc
+; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc > /dev/null 2>/dev/null
+
+; RUN: llvm-ar x %p/SVR4.a very_long_bytecode_file_name.bc
+; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null
+
+; RUN: llvm-ar x %p/xpg4.a very_long_bytecode_file_name.bc
+; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null
diff --git a/test/Archive/oddlen b/test/Archive/oddlen
new file mode 100644
index 0000000..8cf5bd1
--- /dev/null
+++ b/test/Archive/oddlen
@@ -0,0 +1 @@
+oddlen
diff --git a/test/Archive/toc_GNU.ll b/test/Archive/toc_GNU.ll
new file mode 100644
index 0000000..136f603
--- /dev/null
+++ b/test/Archive/toc_GNU.ll
@@ -0,0 +1,5 @@
+;This isn't really an assembly file, its just here to run the test.
+;This test just makes sure that llvm-ar can generate a table of contents for
+;GNU style archives
+;RUN: llvm-ar t %p/GNU.a > %t1
+;RUN: diff %t1 %p/GNU.toc
diff --git a/test/Archive/toc_MacOSX.ll b/test/Archive/toc_MacOSX.ll
new file mode 100644
index 0000000..fb03223
--- /dev/null
+++ b/test/Archive/toc_MacOSX.ll
@@ -0,0 +1,5 @@
+;This isn't really an assembly file, its just here to run the test.
+;This test just makes sure that llvm-ar can generate a table of contents for
+;MacOSX style archives
+;RUN: llvm-ar t %p/MacOSX.a > %t1
+;RUN: diff %t1 %p/MacOSX.toc
diff --git a/test/Archive/toc_SVR4.ll b/test/Archive/toc_SVR4.ll
new file mode 100644
index 0000000..930a26f
--- /dev/null
+++ b/test/Archive/toc_SVR4.ll
@@ -0,0 +1,5 @@
+;This isn't really an assembly file, its just here to run the test.
+;This test just makes sure that llvm-ar can generate a table of contents for
+;SVR4 style archives
+;RUN: llvm-ar t %p/SVR4.a > %t1
+;RUN: diff %t1 %p/SVR4.toc
diff --git a/test/Archive/toc_xpg4.ll b/test/Archive/toc_xpg4.ll
new file mode 100644
index 0000000..441af03
--- /dev/null
+++ b/test/Archive/toc_xpg4.ll
@@ -0,0 +1,5 @@
+;This isn't really an assembly file, its just here to run the test.
+;This test just makes sure that llvm-ar can generate a table of contents for
+;xpg4 style archives
+;RUN: llvm-ar t %p/xpg4.a > %t1
+;RUN: diff %t1 %p/xpg4.toc
diff --git a/test/Archive/very_long_bytecode_file_name.bc b/test/Archive/very_long_bytecode_file_name.bc
new file mode 100644
index 0000000..f7fce24
--- /dev/null
+++ b/test/Archive/very_long_bytecode_file_name.bc
Binary files differ
diff --git a/test/Archive/xpg4.a b/test/Archive/xpg4.a
new file mode 100644
index 0000000..b2bdb51
--- /dev/null
+++ b/test/Archive/xpg4.a
Binary files differ
diff --git a/test/Archive/xpg4.toc b/test/Archive/xpg4.toc
new file mode 100644
index 0000000..d993413
--- /dev/null
+++ b/test/Archive/xpg4.toc
@@ -0,0 +1,4 @@
+evenlen
+oddlen
+very_long_bytecode_file_name.bc
+IsNAN.o
diff --git a/test/Assembler/2002-01-24-BadSymbolTableAssert.ll b/test/Assembler/2002-01-24-BadSymbolTableAssert.ll
new file mode 100644
index 0000000..7c49e2b
--- /dev/null
+++ b/test/Assembler/2002-01-24-BadSymbolTableAssert.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as %s -o /dev/null
+
+; This testcase failed due to a bad assertion in SymbolTable.cpp, removed in
+; the 1.20 revision. Basically the symbol table assumed that if there was an
+; abstract type in the symbol table, [in this case for the entry %foo of type
+; void(opaque)* ], that there should have also been named types by now. This
+; was obviously not the case here, and this is valid. Assertion disabled.
+
+%bb = type i32
+
+declare void @foo(i32)
diff --git a/test/Assembler/2002-01-24-ValueRefineAbsType.ll b/test/Assembler/2002-01-24-ValueRefineAbsType.ll
new file mode 100644
index 0000000..6e49674a
--- /dev/null
+++ b/test/Assembler/2002-01-24-ValueRefineAbsType.ll
@@ -0,0 +1,23 @@
+; RUN: llvm-as %s -o /dev/null
+
+; This testcase used to fail due to a lack of this diff in Value.cpp:
+; diff -r1.16 Value.cpp
+; 11c11
+; < #include "llvm/Type.h"
+; ---
+; > #include "llvm/DerivedTypes.h"
+; 74c74,76
+; < assert(Ty.get() == (const Type*)OldTy &&"Can't refine anything but my type!");
+; ---
+; > assert(Ty.get() == OldTy &&"Can't refine anything but my type!");
+; > if (OldTy == NewTy && !OldTy->isAbstract())
+; > Ty.removeUserFromConcrete();
+;
+; This was causing an assertion failure, due to the "foo" Method object never
+; releasing it's reference to the opaque %bb value.
+;
+
+%bb = type i32
+%exception_descriptor = type i32
+
+declare void @foo(i32)
diff --git a/test/Assembler/2002-02-19-TypeParsing.ll b/test/Assembler/2002-02-19-TypeParsing.ll
new file mode 100644
index 0000000..0df6784
--- /dev/null
+++ b/test/Assembler/2002-02-19-TypeParsing.ll
@@ -0,0 +1,3 @@
+; RUN: llvm-as %s -o /dev/null
+
+%Hosp = type { i32, i32, i32, { \2*, { i32, i32, i32, { [4 x \3], \2, \5, %Hosp, i32, i32 }* }*, \2* }, { \2*, { i32, i32, i32, { [4 x \3], \2, \5, %Hosp, i32, i32 }* }*, \2* }, { \2*, { i32, i32, i32, { [4 x \3], \2, \5, %Hosp, i32, i32 }* }*, \2* }, { \2*, { i32, i32, i32, { [4 x \3], \2, \5, %Hosp, i32, i32 }* }*, \2* } }
diff --git a/test/Assembler/2002-03-08-NameCollision.ll b/test/Assembler/2002-03-08-NameCollision.ll
new file mode 100644
index 0000000..b49789b
--- /dev/null
+++ b/test/Assembler/2002-03-08-NameCollision.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as %s -o /dev/null
+
+; Method arguments were being checked for collisions at the global scope before
+; the method object was created by the parser. Because of this, false
+; collisions could occur that would cause the following error message to be
+; produced:
+;
+; Redefinition of value named 'X' in the 'int *' type plane!
+;
+; Fixed by delaying binding of variable names until _after_ the method symtab is
+; created.
+;
+@X = global i32 4 ; <i32*> [#uses=0]
+
+declare i32 @xxx(i32*)
diff --git a/test/Assembler/2002-03-08-NameCollision2.ll b/test/Assembler/2002-03-08-NameCollision2.ll
new file mode 100644
index 0000000..1f7a4e1
--- /dev/null
+++ b/test/Assembler/2002-03-08-NameCollision2.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as %s -o /dev/null
+
+; Another name collision problem. Here the problem was that if a forward
+; declaration for a method was found, that this would cause spurious conflicts
+; to be detected between locals and globals.
+;
+@Var = external global i32 ; <i32*> [#uses=0]
+
+define void @foo() {
+ %Var = alloca i32 ; <i32*> [#uses=0]
+ ret void
+}
diff --git a/test/Assembler/2002-04-04-PureVirtMethCall.ll b/test/Assembler/2002-04-04-PureVirtMethCall.ll
new file mode 100644
index 0000000..29aed55
--- /dev/null
+++ b/test/Assembler/2002-04-04-PureVirtMethCall.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as %s -o /dev/null
+
+ type { { \2 *, \4 ** },
+ { \2 *, \4 ** }
+ }
+
diff --git a/test/Assembler/2002-04-04-PureVirtMethCall2.ll b/test/Assembler/2002-04-04-PureVirtMethCall2.ll
new file mode 100644
index 0000000..a096899
--- /dev/null
+++ b/test/Assembler/2002-04-04-PureVirtMethCall2.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as %s -o /dev/null
+
+%t = type { { \2*, \2 },
+ { \2*, \2 }
+ }
diff --git a/test/Assembler/2002-04-05-TypeParsing.ll b/test/Assembler/2002-04-05-TypeParsing.ll
new file mode 100644
index 0000000..f725944
--- /dev/null
+++ b/test/Assembler/2002-04-05-TypeParsing.ll
@@ -0,0 +1,3 @@
+; RUN: llvm-as %s -o /dev/null
+
+ %Hosp = type { { \2*, { \2, %Hosp }* }, { \2*, { \2, %Hosp }* } }
diff --git a/test/Assembler/2002-04-07-HexFloatConstants.ll b/test/Assembler/2002-04-07-HexFloatConstants.ll
new file mode 100644
index 0000000..b0d7cc0
--- /dev/null
+++ b/test/Assembler/2002-04-07-HexFloatConstants.ll
@@ -0,0 +1,16 @@
+; This testcase checks to make sure that the assembler can handle floating
+; point constants in IEEE hex format. This also checks that the disassembler,
+; when presented with a FP constant that cannot be represented exactly in
+; exponential form, outputs it correctly in hex format. This is a distillation
+; of the bug that was causing the Olden Health benchmark to output incorrect
+; results!
+;
+; RUN: opt -constprop -S > %t.1 < %s
+; RUN: llvm-as < %s | llvm-dis | llvm-as | opt -constprop | \
+; RUN: llvm-dis > %t.2
+; RUN: diff %t.1 %t.2
+
+define double @test() {
+ %tmp = fmul double 7.200000e+101, 0x427F4000 ; <double> [#uses=1]
+ ret double %tmp
+}
diff --git a/test/Assembler/2002-04-07-InfConstant.ll b/test/Assembler/2002-04-07-InfConstant.ll
new file mode 100644
index 0000000..71837c9
--- /dev/null
+++ b/test/Assembler/2002-04-07-InfConstant.ll
@@ -0,0 +1,9 @@
+; The output formater prints out 1.0e100 as Inf!
+;
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep 0x7FF0000000000000
+
+define float @test() {
+ %tmp = fmul float 0x7FF0000000000000, 1.000000e+01 ; <float> [#uses=1]
+ ret float %tmp
+}
+
diff --git a/test/Assembler/2002-04-29-NameBinding.ll b/test/Assembler/2002-04-29-NameBinding.ll
new file mode 100644
index 0000000..7960c20
--- /dev/null
+++ b/test/Assembler/2002-04-29-NameBinding.ll
@@ -0,0 +1,18 @@
+; There should be NO references to the global v1. The local v1 should
+; have all of the references!
+;
+; Check by running globaldce, which will remove the constant if there are
+; no references to it!
+;
+; RUN: opt < %s -globaldce -S | \
+; RUN: not grep constant
+;
+
+@v1 = internal constant i32 5
+
+define i32 @createtask() {
+ %v1 = alloca i32 ;; Alloca should have one use!
+ %reg112 = load i32* %v1 ;; This load should not use the global!
+ ret i32 %reg112
+}
+
diff --git a/test/Assembler/2002-05-02-InvalidForwardRef.ll b/test/Assembler/2002-05-02-InvalidForwardRef.ll
new file mode 100644
index 0000000..234545c
--- /dev/null
+++ b/test/Assembler/2002-05-02-InvalidForwardRef.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as %s -o /dev/null
+; It looks like the assembler is not forward resolving the function declaraion
+; correctly.
+
+define void @test() {
+ call void @foo( )
+ ret void
+}
+
+declare void @foo()
diff --git a/test/Assembler/2002-05-02-ParseError.ll b/test/Assembler/2002-05-02-ParseError.ll
new file mode 100644
index 0000000..5a9817c
--- /dev/null
+++ b/test/Assembler/2002-05-02-ParseError.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as %s -o /dev/null
+
+%T = type i32 *
+
+define %T @test() {
+ ret %T null
+}
diff --git a/test/Assembler/2002-07-08-HugePerformanceProblem.ll b/test/Assembler/2002-07-08-HugePerformanceProblem.ll
new file mode 100644
index 0000000..52c90af
--- /dev/null
+++ b/test/Assembler/2002-07-08-HugePerformanceProblem.ll
@@ -0,0 +1,67 @@
+; This file takes about 48 __MINUTES__ to assemble using as. This is WAY too
+; long. The type resolution code needs to be sped up a lot.
+; RUN: llvm-as %s -o /dev/null
+ %ALL_INTERSECTIONS_METHOD = type i32 (%OBJECT*, %RAY*, %ISTACK*)*
+ %BBOX = type { %BBOX_VECT, %BBOX_VECT }
+ %BBOX_TREE = type { i16, i16, %BBOX, %BBOX_TREE** }
+ %BBOX_VECT = type [3 x float]
+ %BLEND_MAP = type { i16, i16, i16, i32, %BLEND_MAP_ENTRY* }
+ %BLEND_MAP_ENTRY = type { float, i8, { %COLOUR, %PIGMENT*, %TNORMAL*, %TEXTURE*, %UV_VECT } }
+ %CAMERA = type { %VECTOR, %VECTOR, %VECTOR, %VECTOR, %VECTOR, %VECTOR, double, double, i32, double, double, i32, double, %TNORMAL* }
+ %COLOUR = type [5 x float]
+ %COPY_METHOD = type i8* (%OBJECT*)*
+ %COUNTER = type { i32, i32 }
+ %DENSITY_FILE = type { i32, %DENSITY_FILE_DATA* }
+ %DENSITY_FILE_DATA = type { i32, i8*, i32, i32, i32, i8*** }
+ %DESTROY_METHOD = type void (%OBJECT*)*
+ %FILE = type { i32, i8*, i8*, i8, i8, i32, i32, i32 }
+ %FILE_HANDLE = type { i8*, i32, i32, i32, i32, i8*, %FILE*, i32, i32 (%FILE_HANDLE*, i8*, i32*, i32*, i32, i32)*, void (%FILE_HANDLE*, %COLOUR*, i32)*, i32 (%FILE_HANDLE*, %COLOUR*, i32*)*, void (%IMAGE*, i8*)*, void (%FILE_HANDLE*)* }
+ %FINISH = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, %BBOX_VECT, %BBOX_VECT }
+ %FOG = type { i32, double, double, double, %COLOUR, %VECTOR, %TURB*, float, %FOG* }
+ %FRAME = type { %CAMERA*, i32, i32, i32, %LIGHT_SOURCE*, %OBJECT*, double, double, %COLOUR, %COLOUR, %COLOUR, %IMEDIA*, %FOG*, %RAINBOW*, %SKYSPHERE* }
+ %FRAMESEQ = type { i32, double, i32, i32, double, i32, i32, double, i32, double, i32, double, i32, i32 }
+ %IMAGE = type { i32, i32, i32, i32, i32, i16, i16, %VECTOR, float, float, i32, i32, i16, %IMAGE_COLOUR*, { %IMAGE_LINE*, i8** } }
+ %IMAGE_COLOUR = type { i16, i16, i16, i16, i16 }
+ %IMAGE_LINE = type { i8*, i8*, i8*, i8* }
+ %IMEDIA = type { i32, i32, i32, i32, i32, double, double, i32, i32, i32, i32, %COLOUR, %COLOUR, %COLOUR, %COLOUR, double, double, double, double*, %PIGMENT*, %IMEDIA* }
+ %INSIDE_METHOD = type i32 (double*, %OBJECT*)*
+ %INTERIOR = type { i32, i32, float, float, float, float, float, %IMEDIA* }
+ %INTERSECTION = type { double, %VECTOR, %VECTOR, %OBJECT*, i32, i32, double, double, i8* }
+ %INVERT_METHOD = type void (%OBJECT*)*
+ %ISTACK = type { %ISTACK*, %INTERSECTION*, i32 }
+ %LIGHT_SOURCE = type { %METHODS*, i32, %OBJECT*, %TEXTURE*, %INTERIOR*, %OBJECT*, %OBJECT*, %BBOX, i32, %OBJECT*, %COLOUR, %VECTOR, %VECTOR, %VECTOR, %VECTOR, %VECTOR, double, double, double, double, double, %LIGHT_SOURCE*, i8, i8, i8, i8, i32, i32, i32, i32, i32, %COLOUR**, %OBJECT*, [6 x %PROJECT_TREE_NODE*] }
+ %MATRIX = type [4 x %VECTOR_4D]
+ %METHODS = type { %ALL_INTERSECTIONS_METHOD, %INSIDE_METHOD, %NORMAL_METHOD, %COPY_METHOD, %ROTATE_METHOD, %ROTATE_METHOD, %ROTATE_METHOD, %TRANSFORM_METHOD, %DESTROY_METHOD, %DESTROY_METHOD }
+ %NORMAL_METHOD = type void (double*, %OBJECT*, %INTERSECTION*)*
+ %OBJECT = type { %METHODS*, i32, %OBJECT*, %TEXTURE*, %INTERIOR*, %OBJECT*, %OBJECT*, %BBOX, i32 }
+ %Opts = type { i32, i32, i8, i8, i8, i32, [150 x i8], [150 x i8], [150 x i8], [150 x i8], [150 x i8], double, double, i32, i32, double, double, i32, [25 x i8*], i32, i32, i32, double, double, i32, i32, double, double, double, i32, i32, i32, i32, i32, %FRAMESEQ, double, i32, double, double, double, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [150 x i8], %SHELLDATA*, [150 x i8], i32, i32 }
+ %PIGMENT = type { i16, i16, i16, i32, float, float, float, %WARP*, %TPATTERN*, %BLEND_MAP*, { %DENSITY_FILE*, %IMAGE*, %VECTOR, float, i16, i16, i16, { float, %VECTOR }, %complex.float }, %COLOUR }
+ %PRIORITY_QUEUE = type { i32, i32, %QELEM* }
+ %PROJECT = type { i32, i32, i32, i32 }
+ %PROJECT_QUEUE = type { i32, i32, %PROJECT_TREE_NODE** }
+ %PROJECT_TREE_NODE = type { i16, %BBOX_TREE*, %PROJECT, i16, %PROJECT_TREE_NODE** }
+ %QELEM = type { double, %BBOX_TREE* }
+ %RAINBOW = type { double, double, double, double, double, double, double, %VECTOR, %VECTOR, %VECTOR, %PIGMENT*, %RAINBOW* }
+ %RAY = type { %VECTOR, %VECTOR, i32, [100 x %INTERIOR*] }
+ %RAYINFO = type { %VECTOR, %VECTOR, %VECTORI, %VECTORI }
+ %RGB = type [3 x float]
+ %ROTATE_METHOD = type void (%OBJECT*, double*, %TRANSFORM*)*
+ %SCALE_METHOD = type void (%OBJECT*, double*, %TRANSFORM*)*
+ %SHELLDATA = type { i32, i32, [250 x i8] }
+ %SKYSPHERE = type { i32, %PIGMENT**, %TRANSFORM* }
+ %SNGL_VECT = type [3 x float]
+ %TEXTURE = type { i16, i16, i16, i32, float, float, float, %WARP*, %TPATTERN*, %BLEND_MAP*, { %DENSITY_FILE*, %IMAGE*, %VECTOR, float, i16, i16, i16, { float, %VECTOR }, %complex.float }, %TEXTURE*, %PIGMENT*, %TNORMAL*, %FINISH*, %TEXTURE*, i32 }
+ %TNORMAL = type { i16, i16, i16, i32, float, float, float, %WARP*, %TPATTERN*, %BLEND_MAP*, { %DENSITY_FILE*, %IMAGE*, %VECTOR, float, i16, i16, i16, { float, %VECTOR }, %complex.float }, float }
+ %TPATTERN = type { i16, i16, i16, i32, float, float, float, %WARP*, %TPATTERN*, %BLEND_MAP*, { %DENSITY_FILE*, %IMAGE*, %VECTOR, float, i16, i16, i16, { float, %VECTOR }, %complex.float } }
+ %TRANSFORM = type { %MATRIX, %MATRIX }
+ %TRANSFORM_METHOD = type void (%OBJECT*, %TRANSFORM*)*
+ %TRANSLATE_METHOD = type void (%OBJECT*, double*, %TRANSFORM*)*
+ %TURB = type { i16, %WARP*, %VECTOR, i32, float, float }
+ %UV_VECT = type [2 x double]
+ %VECTOR = type [3 x double]
+ %VECTORI = type [3 x i32]
+ %VECTOR_4D = type [4 x double]
+ %WARP = type { i16, %WARP* }
+ %__FILE = type { i32, i8*, i8*, i8, i8, i32, i32, i32 }
+ %_h_val = type { [2 x i32], double }
+ %complex.float = type { float, float }
diff --git a/test/Assembler/2002-07-14-InternalLossage.ll b/test/Assembler/2002-07-14-InternalLossage.ll
new file mode 100644
index 0000000..f93f1c4
--- /dev/null
+++ b/test/Assembler/2002-07-14-InternalLossage.ll
@@ -0,0 +1,9 @@
+; Test to make sure that the 'internal' tag is not lost!
+;
+; RUN: llvm-as < %s | llvm-dis | grep internal
+
+declare void @foo()
+
+define internal void @foo() {
+ ret void
+}
diff --git a/test/Assembler/2002-07-14-OpaqueType.ll b/test/Assembler/2002-07-14-OpaqueType.ll
new file mode 100644
index 0000000..662fb0f
--- /dev/null
+++ b/test/Assembler/2002-07-14-OpaqueType.ll
@@ -0,0 +1,10 @@
+; Test that opaque types are preserved correctly
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
+;
+
+%Ty = type opaque
+
+define %Ty* @func() {
+ ret %Ty* null
+}
+
diff --git a/test/Assembler/2002-07-25-ParserAssertionFailure.ll b/test/Assembler/2002-07-25-ParserAssertionFailure.ll
new file mode 100644
index 0000000..3c5c554
--- /dev/null
+++ b/test/Assembler/2002-07-25-ParserAssertionFailure.ll
@@ -0,0 +1,13 @@
+; Make sure we don't get an assertion failure, even though this is a parse
+; error
+; RUN: not llvm-as %s -o /dev/null |& grep {'@foo' defined with}
+
+%ty = type void (i32)
+
+declare %ty* @foo()
+
+define void @test() {
+ call %ty* @foo( ) ; <%ty*>:0 [#uses=0]
+ ret void
+}
+
diff --git a/test/Assembler/2002-07-25-QuoteInString.ll b/test/Assembler/2002-07-25-QuoteInString.ll
new file mode 100644
index 0000000..facc5bd
--- /dev/null
+++ b/test/Assembler/2002-07-25-QuoteInString.ll
@@ -0,0 +1,5 @@
+; Test double quotes in strings work correctly!
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
+;
+@str = internal global [6 x i8] c"\22foo\22\00" ; <[6 x i8]*> [#uses=0]
+
diff --git a/test/Assembler/2002-07-25-ReturnPtrFunction.ll b/test/Assembler/2002-07-25-ReturnPtrFunction.ll
new file mode 100644
index 0000000..515d105
--- /dev/null
+++ b/test/Assembler/2002-07-25-ReturnPtrFunction.ll
@@ -0,0 +1,15 @@
+; Test that returning a pointer to a function causes the disassembler to print
+; the right thing.
+;
+; RUN: llvm-as < %s | llvm-dis | llvm-as
+
+%ty = type void (i32)
+
+declare %ty* @foo()
+
+define void @test() {
+ call %ty* ()* @foo( ) ; <%ty*>:1 [#uses=0]
+ ret void
+}
+
+
diff --git a/test/Assembler/2002-07-31-SlashInString.ll b/test/Assembler/2002-07-31-SlashInString.ll
new file mode 100644
index 0000000..ff48258
--- /dev/null
+++ b/test/Assembler/2002-07-31-SlashInString.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as
+
+; Make sure that \\ works in a string initializer
+@Slashtest = internal global [8 x i8] c"\5Cbegin{\00"
+
diff --git a/test/Assembler/2002-08-15-CastAmbiguity.ll b/test/Assembler/2002-08-15-CastAmbiguity.ll
new file mode 100644
index 0000000..c716524
--- /dev/null
+++ b/test/Assembler/2002-08-15-CastAmbiguity.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as %s -o /dev/null
+
+define void @test(i32 %X) {
+ call void @test( i32 6 )
+ ret void
+}
diff --git a/test/Assembler/2002-08-15-ConstantExprProblem.ll b/test/Assembler/2002-08-15-ConstantExprProblem.ll
new file mode 100644
index 0000000..02b9ea9
--- /dev/null
+++ b/test/Assembler/2002-08-15-ConstantExprProblem.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as %s -o /dev/null
+
[email protected] = internal global [12 x i8] c"hello world\00" ; <[12 x i8]*> [#uses=1]
+
+define i8* @test() {
+; <label>:0
+ br label %BB1
+
+BB1: ; preds = %BB2, %0
+ %ret = phi i8* [ getelementptr ([12 x i8]* @.LC0, i64 0, i64 0), %0 ], [ null, %BB2 ] ; <i8*> [#uses=1]
+ ret i8* %ret
+
+BB2: ; No predecessors!
+ br label %BB1
+}
+
diff --git a/test/Assembler/2002-08-15-UnresolvedGlobalReference.ll b/test/Assembler/2002-08-15-UnresolvedGlobalReference.ll
new file mode 100644
index 0000000..2ba3f14a
--- /dev/null
+++ b/test/Assembler/2002-08-15-UnresolvedGlobalReference.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as %s -o /dev/null
+
[email protected] = internal global [12 x i8] c"hello world\00" ; <[12 x i8]*> [#uses=1]
+
+define i8* @test() {
+ ret i8* getelementptr ([12 x i8]* @.LC0, i64 0, i64 0)
+}
+
diff --git a/test/Assembler/2002-08-16-ConstExprInlined.ll b/test/Assembler/2002-08-16-ConstExprInlined.ll
new file mode 100644
index 0000000..f233bac
--- /dev/null
+++ b/test/Assembler/2002-08-16-ConstExprInlined.ll
@@ -0,0 +1,22 @@
+; In this testcase, the bytecode reader or writer is not correctly handling the
+; ConstExpr reference. Disassembling this program assembled yields invalid
+; assembly (because there are placeholders still around), which the assembler
+; dies on.
+
+; There are two things that need to be fixed here. Obviously assembling and
+; disassembling this would be good, but in addition to that, the bytecode
+; reader should NEVER produce a program "successfully" with placeholders still
+; around!
+;
+; RUN: llvm-as < %s | llvm-dis | llvm-as
+
[email protected] = internal global [4 x i8] c"foo\00" ; <[4 x i8]*> [#uses=1]
+@X = global i8* null ; <i8**> [#uses=0]
+
+declare i32 @puts(i8*)
+
+define void @main() {
+bb1:
+ %reg211 = call i32 @puts( i8* getelementptr ([4 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/Assembler/2002-08-19-BytecodeReader.ll b/test/Assembler/2002-08-19-BytecodeReader.ll
new file mode 100644
index 0000000..e211014
--- /dev/null
+++ b/test/Assembler/2002-08-19-BytecodeReader.ll
@@ -0,0 +1,17 @@
+; Testcase that seems to break the bytecode reader. This comes from the
+; "crafty" spec benchmark.
+;
+; RUN: opt < %s -instcombine | llvm-dis
+
+%CHESS_POSITION = type { i32, i32 }
+@pawn_probes = external global i32 ; <i32*> [#uses=0]
+@pawn_hash_mask = external global i32 ; <i32*> [#uses=0]
+@search = external global %CHESS_POSITION ; <%CHESS_POSITION*> [#uses=2]
+
+define void @Evaluate() {
+ %reg1321 = getelementptr %CHESS_POSITION* @search, i64 0, i32 1 ; <i32*> [#uses=1]
+ %reg114 = load i32* %reg1321 ; <i32> [#uses=0]
+ %reg1801 = getelementptr %CHESS_POSITION* @search, i64 0, i32 0 ; <i32*> [#uses=1]
+ %reg182 = load i32* %reg1801 ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/Assembler/2002-08-22-DominanceProblem.ll b/test/Assembler/2002-08-22-DominanceProblem.ll
new file mode 100644
index 0000000..0dc192d
--- /dev/null
+++ b/test/Assembler/2002-08-22-DominanceProblem.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-as %s -o /dev/null
+
+; Dominance relationships is not calculated correctly for unreachable blocks,
+; which causes the verifier to barf on this input.
+
+define i32 @test(i1 %b) {
+BB0:
+ ret i32 7 ; Loop is unreachable
+
+Loop: ; preds = %L2, %Loop
+ %B = phi i32 [ %B, %L2 ], [ %B, %Loop ] ;PHI has same value always.
+ br i1 %b, label %L2, label %Loop
+
+L2: ; preds = %Loop
+ br label %Loop
+}
+
diff --git a/test/Assembler/2002-10-08-LargeArrayPerformance.ll b/test/Assembler/2002-10-08-LargeArrayPerformance.ll
new file mode 100644
index 0000000..34a9932
--- /dev/null
+++ b/test/Assembler/2002-10-08-LargeArrayPerformance.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as %s -o /dev/null
+; This testcase comes from the following really simple c file:
+;; int foo[30000]
+;;; We should not be soo slow for such a simple case!
+
+@foo = global [30000 x i32] zeroinitializer ; <[30000 x i32]*> [#uses=0]
+
+declare void @__main()
diff --git a/test/Assembler/2002-10-13-ConstantEncodingProblem.ll b/test/Assembler/2002-10-13-ConstantEncodingProblem.ll
new file mode 100644
index 0000000..bf3a521
--- /dev/null
+++ b/test/Assembler/2002-10-13-ConstantEncodingProblem.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llvm-dis
+
+%Domain = type { %Domain**, %Domain* }
+@D = global %Domain zeroinitializer ; <%Domain*> [#uses=0]
+
diff --git a/test/Assembler/2002-10-15-NameClash.ll b/test/Assembler/2002-10-15-NameClash.ll
new file mode 100644
index 0000000..89346cb
--- /dev/null
+++ b/test/Assembler/2002-10-15-NameClash.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as %s -o /dev/null
+
+declare i32 @"ArrayRef"([100 x i32] * %Array)
+
+define i32 @"ArrayRef"([100 x i32] * %Array) {
+ ret i32 0
+}
diff --git a/test/Assembler/2002-12-15-GlobalResolve.ll b/test/Assembler/2002-12-15-GlobalResolve.ll
new file mode 100644
index 0000000..f9ad12e
--- /dev/null
+++ b/test/Assembler/2002-12-15-GlobalResolve.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as %s -o /dev/null
+
+@X = external global i32*
+@X1 = external global %T*
+@X2 = external global i32*
+
+%T = type i32
diff --git a/test/Assembler/2003-01-30-UnsignedString.ll b/test/Assembler/2003-01-30-UnsignedString.ll
new file mode 100644
index 0000000..3c14d71
--- /dev/null
+++ b/test/Assembler/2003-01-30-UnsignedString.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-as %s -o /dev/null
+
+@spell_order = global [4 x i8] c"\FF\00\F7\00"
+
diff --git a/test/Assembler/2003-04-15-ConstantInitAssertion.ll b/test/Assembler/2003-04-15-ConstantInitAssertion.ll
new file mode 100644
index 0000000..e012168
--- /dev/null
+++ b/test/Assembler/2003-04-15-ConstantInitAssertion.ll
@@ -0,0 +1,4 @@
+; RUN: not llvm-as < %s >/dev/null |& grep {constant expression type mismatch}
+; Test the case of a misformed constant initializer
+; This should cause an assembler error, not an assertion failure!
+constant { i32 } { float 1.0 }
diff --git a/test/Assembler/2003-04-25-UnresolvedGlobalReference.ll b/test/Assembler/2003-04-25-UnresolvedGlobalReference.ll
new file mode 100644
index 0000000..f1a5ed7
--- /dev/null
+++ b/test/Assembler/2003-04-25-UnresolvedGlobalReference.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as %s -o /dev/null
+; There should be absolutely no problem with this testcase.
+
+define i32 @test(i32 %arg1, i32 %arg2) {
+ ret i32 ptrtoint (i32 (i32, i32)* @test to i32)
+}
+
diff --git a/test/Assembler/2003-05-03-BytecodeReaderProblem.ll b/test/Assembler/2003-05-03-BytecodeReaderProblem.ll
new file mode 100644
index 0000000..f4a6911
--- /dev/null
+++ b/test/Assembler/2003-05-03-BytecodeReaderProblem.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llvm-dis
+
+define void @test() {
+ %tmp.123 = trunc i64 0 to i32 ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/Assembler/2003-05-12-MinIntProblem.ll b/test/Assembler/2003-05-12-MinIntProblem.ll
new file mode 100644
index 0000000..ebe1690
--- /dev/null
+++ b/test/Assembler/2003-05-12-MinIntProblem.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llvm-dis | grep -- -2147483648
+
+define i32 @foo() {
+ ret i32 -2147483648
+}
diff --git a/test/Assembler/2003-05-15-AssemblerProblem.ll b/test/Assembler/2003-05-15-AssemblerProblem.ll
new file mode 100644
index 0000000..146ce65
--- /dev/null
+++ b/test/Assembler/2003-05-15-AssemblerProblem.ll
@@ -0,0 +1,14 @@
+; This bug was caused by two CPR's existing for the same global variable,
+; colliding in the Module level CPR map.
+; RUN: llvm-as %s -o /dev/null
+
+define void @test() {
+ call void (...)* bitcast (void (i16*, i32)* @AddString to void (...)*)( i16* null, i32 0 )
+ ret void
+}
+
+define void @AddString(i16* %tmp.124, i32 %tmp.127) {
+ call void (...)* bitcast (void (i16*, i32)* @AddString to void (...)*)( i16* %tmp.124, i32 %tmp.127 )
+ ret void
+}
+
diff --git a/test/Assembler/2003-05-15-SwitchBug.ll b/test/Assembler/2003-05-15-SwitchBug.ll
new file mode 100644
index 0000000..3768d9c
--- /dev/null
+++ b/test/Assembler/2003-05-15-SwitchBug.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as %s -o /dev/null
+
+; Check minimal switch statement
+
+define void @test(i32 %X) {
+ switch i32 %X, label %dest [
+ ]
+
+dest: ; preds = %0
+ ret void
+}
diff --git a/test/Assembler/2003-05-21-ConstantShiftExpr.ll b/test/Assembler/2003-05-21-ConstantShiftExpr.ll
new file mode 100644
index 0000000..40b9651
--- /dev/null
+++ b/test/Assembler/2003-05-21-ConstantShiftExpr.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-as %s -o /dev/null
+; Test that shift instructions can be used in constant expressions.
+
+global i32 3670016
diff --git a/test/Assembler/2003-05-21-EmptyStructTest.ll b/test/Assembler/2003-05-21-EmptyStructTest.ll
new file mode 100644
index 0000000..26e83d93
--- /dev/null
+++ b/test/Assembler/2003-05-21-EmptyStructTest.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as %s -o /dev/null
+
+; The old C front-end never generated empty structures, now the new one
+; can. For some reason we never handled them in the parser. Weird.
+
+@X = global { } zeroinitializer
diff --git a/test/Assembler/2003-05-21-MalformedShiftCrash.ll b/test/Assembler/2003-05-21-MalformedShiftCrash.ll
new file mode 100644
index 0000000..c661f7c
--- /dev/null
+++ b/test/Assembler/2003-05-21-MalformedShiftCrash.ll
@@ -0,0 +1,4 @@
+; Found by inspection of the code
+; RUN: not llvm-as < %s > /dev/null |& grep {constexpr requires integer or integer vector operands}
+
+global i32 ashr (float 1.0, float 2.0)
diff --git a/test/Assembler/2003-05-21-MalformedStructCrash.ll b/test/Assembler/2003-05-21-MalformedStructCrash.ll
new file mode 100644
index 0000000..1efb577
--- /dev/null
+++ b/test/Assembler/2003-05-21-MalformedStructCrash.ll
@@ -0,0 +1,4 @@
+; Found by inspection of the code
+; RUN: not llvm-as < %s > /dev/null |& grep {constant expression type mismatch}
+
+global {} { i32 7, float 1.0, i32 7, i32 8 }
diff --git a/test/Assembler/2003-06-17-InvokeDisassemble.ll b/test/Assembler/2003-06-17-InvokeDisassemble.ll
new file mode 100644
index 0000000..922a996
--- /dev/null
+++ b/test/Assembler/2003-06-17-InvokeDisassemble.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llvm-dis
+
+define void @test() {
+ invoke void @test( )
+ to label %Next unwind label %Next
+
+Next: ; preds = %0, %0
+ ret void
+}
diff --git a/test/Assembler/2003-06-30-RecursiveTypeProblem.ll b/test/Assembler/2003-06-30-RecursiveTypeProblem.ll
new file mode 100644
index 0000000..5db3114
--- /dev/null
+++ b/test/Assembler/2003-06-30-RecursiveTypeProblem.ll
@@ -0,0 +1,3 @@
+; RUN: llvm-as %s -o /dev/null
+
+%MidFnTy = type void (%MidFnTy*)
diff --git a/test/Assembler/2003-08-20-ConstantExprGEP-Fold.ll b/test/Assembler/2003-08-20-ConstantExprGEP-Fold.ll
new file mode 100644
index 0000000..50cdeed
--- /dev/null
+++ b/test/Assembler/2003-08-20-ConstantExprGEP-Fold.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -simplifycfg -S | not grep br
+
[email protected]_1 = internal constant [6 x i8] c"_Bool\00" ; <[6 x i8]*> [#uses=2]
+
+define i32 @test() {
+ %tmp.54 = load i8* getelementptr ([6 x i8]* @.str_1, i64 0, i64 1) ; <i8> [#uses=1]
+ %tmp.55 = icmp ne i8 %tmp.54, 66 ; <i1> [#uses=1]
+ br i1 %tmp.55, label %then.7, label %endif.7
+
+then.7: ; preds = %then.7, %0
+ br label %then.7
+
+endif.7: ; preds = %0
+ ret i32 0
+}
+
diff --git a/test/Assembler/2003-08-21-ConstantExprCast-Fold.ll b/test/Assembler/2003-08-21-ConstantExprCast-Fold.ll
new file mode 100644
index 0000000..b76f774
--- /dev/null
+++ b/test/Assembler/2003-08-21-ConstantExprCast-Fold.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-as < %s | llvm-dis | not grep getelementptr
+
+@A = external global { float } ; <{ float }*> [#uses=2]
+global i32* bitcast ({ float }* @A to i32*) ; <i32**>:0 [#uses=0]
diff --git a/test/Assembler/2003-10-04-NotMergingGlobalConstants.ll b/test/Assembler/2003-10-04-NotMergingGlobalConstants.ll
new file mode 100644
index 0000000..5fec05d
--- /dev/null
+++ b/test/Assembler/2003-10-04-NotMergingGlobalConstants.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as %s -o /dev/null
+
+%T = type i32
+@X = global i32* null ; <i32**> [#uses=0]
+@Y = global i32* null ; <i32**> [#uses=0]
+
diff --git a/test/Assembler/2003-11-05-ConstantExprShift.ll b/test/Assembler/2003-11-05-ConstantExprShift.ll
new file mode 100644
index 0000000..86b093e
--- /dev/null
+++ b/test/Assembler/2003-11-05-ConstantExprShift.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llvm-dis
+
+define i32 @test() {
+ ret i32 ashr (i32 ptrtoint (i32 ()* @test to i32), i32 2)
+}
diff --git a/test/Assembler/2003-11-11-ImplicitRename.ll b/test/Assembler/2003-11-11-ImplicitRename.ll
new file mode 100644
index 0000000..7bfd3c1
--- /dev/null
+++ b/test/Assembler/2003-11-11-ImplicitRename.ll
@@ -0,0 +1,8 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+void %test() {
+ %X = add int 0, 1
+ %X = add int 1, 2
+ ret void
+}
+
diff --git a/test/Assembler/2003-11-12-ConstantExprCast.ll b/test/Assembler/2003-11-12-ConstantExprCast.ll
new file mode 100644
index 0000000..149fef2
--- /dev/null
+++ b/test/Assembler/2003-11-12-ConstantExprCast.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llvm-dis | not grep { bitcast (}
+
[email protected]_1 = external constant [4 x i8] ; <[4 x i8]*> [#uses=1]
+
+define i8 @test(i8 %Y) {
+ %X = bitcast i8 %Y to i8 ; <i8> [#uses=1]
+ %tmp.13 = add i8 %X, sub (i8 0, i8 ptrtoint ([4 x i8]* @.Base64_1 to i8)) ; <i8> [#uses=1]
+ ret i8 %tmp.13
+}
+
diff --git a/test/Assembler/2003-11-24-SymbolTableCrash.ll b/test/Assembler/2003-11-24-SymbolTableCrash.ll
new file mode 100644
index 0000000..041b0d9
--- /dev/null
+++ b/test/Assembler/2003-11-24-SymbolTableCrash.ll
@@ -0,0 +1,10 @@
+; RUN: not llvm-as < %s |& grep {multiple definition}
+
+define void @test() {
+ %tmp.1 = add i32 0, 1
+ br label %return
+return:
+ %tmp.1 = add i32 0, 1
+ ret void
+}
+
diff --git a/test/Assembler/2003-12-30-TypeMapInvalidMemory.ll b/test/Assembler/2003-12-30-TypeMapInvalidMemory.ll
new file mode 100644
index 0000000..93f9a70
--- /dev/null
+++ b/test/Assembler/2003-12-30-TypeMapInvalidMemory.ll
@@ -0,0 +1,55 @@
+; RUN: not llvm-as %s -o /dev/null |& grep {use of undefined type named 'struct.D_Scope'}
+; END.
+
+@d_reduction_0_dparser_gram = global {
+ i32 (i8*, i8**, i32, i32, {
+ %struct.Grammar*, void (\4, %struct.d_loc_t*, i8**)*, %struct.D_Scope*,
+ void (\4)*, { i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\8, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User }* (\4, i32, { i32, %struct.d_loc_t, i8*, i8*,
+ %struct.D_Scope*, void (\9, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User }**)*,
+ void ({ i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\8, %struct.d_loc_t*, i8**)*,
+ %struct.Grammar*, %struct.ParseNode_User }*)*,
+ %struct.d_loc_t, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32,
+ i32 }*)*,
+ i32 (i8*, i8**, i32, i32, { %struct.Grammar*,
+ void (\4, %struct.d_loc_t*, i8**)*, %struct.D_Scope*, void (\4)*, {
+ i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\8, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User }* (\4, i32, { i32, %struct.d_loc_t, i8*, i8*,
+ %struct.D_Scope*, void (\9, %struct.d_loc_t*, i8**)*,
+ %struct.Grammar*, %struct.ParseNode_User }**)*,
+ void ({ i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\8, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User }*)*, %struct.d_loc_t, i32, i32, i32, i32,
+ i32, i32, i32, i32, i32, i32, i32, i32 }*)** }
+
+ { i32 (i8*, i8**, i32, i32, {
+ %struct.Grammar*, void (\4, %struct.d_loc_t*, i8**)*,
+ %struct.D_Scope*, void (\4)*, {
+ i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\8, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User
+ }* (\4, i32, { i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\9, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User }**)*,
+ void ({ i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\8, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User }*)*,
+ %struct.d_loc_t, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32,
+ i32, i32 }*)* null,
+ i32 (i8*, i8**, i32, i32, {
+ %struct.Grammar*, void (\4, %struct.d_loc_t*, i8**)*,
+ %struct.D_Scope*, void (\4)*, { i32, %struct.d_loc_t, i8*, i8*,
+ %struct.D_Scope*, void (\8, %struct.d_loc_t*, i8**)*,
+ %struct.Grammar*, %struct.ParseNode_User }* (\4, i32, { i32,
+ %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\9, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User }**)*,
+ void ({ i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*,
+ void (\8, %struct.d_loc_t*, i8**)*, %struct.Grammar*,
+ %struct.ParseNode_User }*)*, %struct.d_loc_t, i32, i32, i32,
+ i32, i32, i32, i32, i32, i32, i32, i32, i32 }*)** null
+ }
diff --git a/test/Assembler/2004-01-11-getelementptrfolding.ll b/test/Assembler/2004-01-11-getelementptrfolding.ll
new file mode 100644
index 0000000..c22aede
--- /dev/null
+++ b/test/Assembler/2004-01-11-getelementptrfolding.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llvm-dis | \
+; RUN: not grep {getelementptr.*getelementptr}
+
+%struct.TTriangleItem = type { i8*, i8*, [3 x %struct.TUVVertex] }
+%struct.TUVVertex = type { i16, i16, i16, i16 }
+@data_triangleItems = internal constant [2908 x %struct.TTriangleItem] zeroinitializer; <[2908 x %struct.TTriangleItem]*> [#uses=2]
+
+define void @foo() {
+ store i16 0, i16* getelementptr ([2908 x %struct.TTriangleItem]* @data_triangleItems, i64 0, i64 0, i32 2, i64 0, i32 0)
+ ret void
+}
+
diff --git a/test/Assembler/2004-01-20-MaxLongLong.ll b/test/Assembler/2004-01-20-MaxLongLong.ll
new file mode 100644
index 0000000..8af5332
--- /dev/null
+++ b/test/Assembler/2004-01-20-MaxLongLong.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-as < %s | llvm-dis | grep 9223372036854775808
+
+global i64 -9223372036854775808
+
diff --git a/test/Assembler/2004-02-01-NegativeZero.ll b/test/Assembler/2004-02-01-NegativeZero.ll
new file mode 100644
index 0000000..b28930f
--- /dev/null
+++ b/test/Assembler/2004-02-01-NegativeZero.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llvm-dis | grep -- -0.0
+
+global double 0x8000000000000000
+global float -0.0
+
diff --git a/test/Assembler/2004-02-27-SelfUseAssertError.ll b/test/Assembler/2004-02-27-SelfUseAssertError.ll
new file mode 100644
index 0000000..7052eac
--- /dev/null
+++ b/test/Assembler/2004-02-27-SelfUseAssertError.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as %s -o /dev/null
+
+; %inc2 uses it's own value, but that's ok, as it's unreachable!
+
+define void @test() {
+entry:
+ ret void
+
+no_exit.2: ; preds = %endif.6
+ %tmp.103 = fcmp olt double 0.000000e+00, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp.103, label %endif.6, label %else.0
+
+else.0: ; preds = %no_exit.2
+ store i16 0, i16* null
+ br label %endif.6
+
+endif.6: ; preds = %else.0, %no_exit.2
+ %inc.2 = add i32 %inc.2, 1 ; <i32> [#uses=2]
+ %tmp.96 = icmp slt i32 %inc.2, 0 ; <i1> [#uses=1]
+ br i1 %tmp.96, label %no_exit.2, label %UnifiedReturnBlock1
+
+UnifiedReturnBlock1: ; preds = %endif.6
+ ret void
+}
+
diff --git a/test/Assembler/2004-03-07-FunctionAddressAlignment.ll b/test/Assembler/2004-03-07-FunctionAddressAlignment.ll
new file mode 100644
index 0000000..e3bf0bb
--- /dev/null
+++ b/test/Assembler/2004-03-07-FunctionAddressAlignment.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llvm-dis | not grep ptrtoint
+; All of these should be eliminable
+
+
+define i32 @foo() {
+ ret i32 and (i32 ptrtoint (i32()* @foo to i32), i32 1)
+}
+
+define i32 @foo2() {
+ ret i32 and (i32 1, i32 ptrtoint (i32()* @foo2 to i32))
+}
+
+define i1 @foo3() {
+ ret i1 icmp ne (i1()* @foo3, i1()* null)
+}
diff --git a/test/Assembler/2004-03-30-UnclosedFunctionCrash.ll b/test/Assembler/2004-03-30-UnclosedFunctionCrash.ll
new file mode 100644
index 0000000..775b755
--- /dev/null
+++ b/test/Assembler/2004-03-30-UnclosedFunctionCrash.ll
@@ -0,0 +1,3 @@
+; RUN: not llvm-as %s |& grep {found end of file when expecting more instructions}
+
+define void @foo() {
diff --git a/test/Assembler/2004-04-04-GetElementPtrIndexTypes.ll b/test/Assembler/2004-04-04-GetElementPtrIndexTypes.ll
new file mode 100644
index 0000000..ab46f88
--- /dev/null
+++ b/test/Assembler/2004-04-04-GetElementPtrIndexTypes.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as %s -o /dev/null
+
+define i32* @t1({ float, i32 }* %X) {
+ %W = getelementptr { float, i32 }* %X, i32 20, i32 1 ; <i32*> [#uses=0]
+ %X.upgrd.1 = getelementptr { float, i32 }* %X, i64 20, i32 1 ; <i32*> [#uses=0]
+ %Y = getelementptr { float, i32 }* %X, i64 20, i32 1 ; <i32*> [#uses=1]
+ %Z = getelementptr { float, i32 }* %X, i64 20, i32 1 ; <i32*> [#uses=0]
+ ret i32* %Y
+}
+
diff --git a/test/Assembler/2004-06-07-VerifierBug.ll b/test/Assembler/2004-06-07-VerifierBug.ll
new file mode 100644
index 0000000..07d2383
--- /dev/null
+++ b/test/Assembler/2004-06-07-VerifierBug.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s > /dev/null
+
+define void @t() {
+entry:
+ ret void
+
+loop: ; preds = %loop
+ %tmp.4.i9 = getelementptr i32* null, i32 %tmp.5.i10 ; <i32*> [#uses=1]
+ %tmp.5.i10 = load i32* %tmp.4.i9 ; <i32> [#uses=1]
+ br label %loop
+}
diff --git a/test/Assembler/2004-10-22-BCWriterUndefBug.ll b/test/Assembler/2004-10-22-BCWriterUndefBug.ll
new file mode 100644
index 0000000..694b80b
--- /dev/null
+++ b/test/Assembler/2004-10-22-BCWriterUndefBug.ll
@@ -0,0 +1,5 @@
+;; The bytecode writer was trying to treat undef values as ConstantArray's when
+;; they looked like strings.
+;; RUN: llvm-as %s -o /dev/null
+@G = internal global [8 x i8] undef
+
diff --git a/test/Assembler/2004-11-28-InvalidTypeCrash.ll b/test/Assembler/2004-11-28-InvalidTypeCrash.ll
new file mode 100644
index 0000000..f9b453b
--- /dev/null
+++ b/test/Assembler/2004-11-28-InvalidTypeCrash.ll
@@ -0,0 +1,4 @@
+; Test for PR463. This program is erroneous, but should not crash llvm-as.
+; RUN: not llvm-as %s -o /dev/null |& grep {invalid type for null constant}
+
[email protected] = internal global %struct.none zeroinitializer
diff --git a/test/Assembler/2005-01-03-FPConstantDisassembly.ll b/test/Assembler/2005-01-03-FPConstantDisassembly.ll
new file mode 100644
index 0000000..aaa776f
--- /dev/null
+++ b/test/Assembler/2005-01-03-FPConstantDisassembly.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llvm-dis | grep 1.0
+
+define double @test() {
+ ret double 1.0 ;; This should not require hex notation
+}
+
diff --git a/test/Assembler/2005-01-31-CallingAggregateFunction.ll b/test/Assembler/2005-01-31-CallingAggregateFunction.ll
new file mode 100644
index 0000000..ce769a2
--- /dev/null
+++ b/test/Assembler/2005-01-31-CallingAggregateFunction.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as %s -o /dev/null
+
+define void @test() {
+ call {i32} @foo()
+ ret void
+}
+
+declare {i32 } @foo()
diff --git a/test/Assembler/2005-02-09-AsmWriterStoreBug.ll b/test/Assembler/2005-02-09-AsmWriterStoreBug.ll
new file mode 100644
index 0000000..4ec1796
--- /dev/null
+++ b/test/Assembler/2005-02-09-AsmWriterStoreBug.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as
+
+; Ensure that the asm writer emits types before both operands of the
+; store, even though they can be the same.
+
+%RecTy = type %RecTy*
+
+define void @foo() {
+ %A = malloc %RecTy ; <%RecTy> [#uses=1]
+ %B = malloc %RecTy ; <%RecTy> [#uses=1]
+ store %RecTy %B, %RecTy %A
+ ret void
+}
+
diff --git a/test/Assembler/2005-05-05-OpaqueUndefValues.ll b/test/Assembler/2005-05-05-OpaqueUndefValues.ll
new file mode 100644
index 0000000..8cd1419
--- /dev/null
+++ b/test/Assembler/2005-05-05-OpaqueUndefValues.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as > /dev/null
+
+%t = type opaque
+@x = global %t undef
diff --git a/test/Assembler/2005-12-21-ZeroInitVector.ll b/test/Assembler/2005-12-21-ZeroInitVector.ll
new file mode 100644
index 0000000..d3a692c
--- /dev/null
+++ b/test/Assembler/2005-12-21-ZeroInitVector.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s > /dev/null
+
+define <4 x i32> @foo() {
+ ret <4 x i32> zeroinitializer
+}
+
diff --git a/test/Assembler/2006-05-26-VarargsCallEncode.ll b/test/Assembler/2006-05-26-VarargsCallEncode.ll
new file mode 100644
index 0000000..6dc60c3
--- /dev/null
+++ b/test/Assembler/2006-05-26-VarargsCallEncode.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llvm-dis | grep {tail call void.*sret null}
+
+declare void @foo({ }* sret , ...)
+
+define void @bar() {
+ tail call void ({ }* sret , ...)* @foo( { }* null sret , i32 0 )
+ ret void
+}
diff --git a/test/Assembler/2006-09-28-CrashOnInvalid.ll b/test/Assembler/2006-09-28-CrashOnInvalid.ll
new file mode 100644
index 0000000..a203c6a
--- /dev/null
+++ b/test/Assembler/2006-09-28-CrashOnInvalid.ll
@@ -0,0 +1,8 @@
+; Test for PR902. This program is erroneous, but should not crash llvm-as.
+; This tests that a simple error is caught and processed correctly.
+; RUN: not llvm-as < %s >/dev/null |& grep {floating point constant invalid for type}
+
+define void @test() {
+ add i32 1, 2.0
+ ret void
+}
diff --git a/test/Assembler/2006-12-09-Cast-To-Bool.ll b/test/Assembler/2006-12-09-Cast-To-Bool.ll
new file mode 100644
index 0000000..a70262c
--- /dev/null
+++ b/test/Assembler/2006-12-09-Cast-To-Bool.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llvm-dis | grep bitcast
+
+define i1 @main(i32 %X) {
+ %res = bitcast i1 true to i1
+ ret i1 %res
+}
diff --git a/test/Assembler/2007-01-02-Undefined-Arg-Type.ll b/test/Assembler/2007-01-02-Undefined-Arg-Type.ll
new file mode 100644
index 0000000..a39de1c
--- /dev/null
+++ b/test/Assembler/2007-01-02-Undefined-Arg-Type.ll
@@ -0,0 +1,9 @@
+; The assembler should catch an undefined argument type .
+; RUN: not llvm-as %s -o /dev/null |& grep {use of undefined type named 'typedef.bc_struct'}
+
+; %typedef.bc_struct = type opaque
+
+
+define i1 @someFunc(i32* %tmp.71.reload, %typedef.bc_struct* %n1) {
+ ret i1 true
+}
diff --git a/test/Assembler/2007-01-05-Cmp-ConstExpr.ll b/test/Assembler/2007-01-05-Cmp-ConstExpr.ll
new file mode 100644
index 0000000..e3f67ba
--- /dev/null
+++ b/test/Assembler/2007-01-05-Cmp-ConstExpr.ll
@@ -0,0 +1,18 @@
+; Test Case for PR1080
+; RUN: llvm-as %s -o /dev/null
+
+@str = internal constant [4 x i8] c"-ga\00" ; <[4 x i8]*> [#uses=2]
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ %tmp65 = getelementptr i8** %argv, i32 1 ; <i8**> [#uses=1]
+ %tmp66 = load i8** %tmp65 ; <i8*> [#uses=0]
+ br i1 icmp ne (i32 sub (i32 ptrtoint (i8* getelementptr ([4 x i8]* @str, i32 0, i64 1) to i32), i32 ptrtoint ([4 x i8]* @str to i32)), i32 1), label %exit_1, label %exit_2
+
+exit_1: ; preds = %entry
+ ret i32 0
+
+exit_2: ; preds = %entry
+ ret i32 1
+}
+
diff --git a/test/Assembler/2007-01-16-CrashOnBadCast.ll b/test/Assembler/2007-01-16-CrashOnBadCast.ll
new file mode 100644
index 0000000..81f5458
--- /dev/null
+++ b/test/Assembler/2007-01-16-CrashOnBadCast.ll
@@ -0,0 +1,7 @@
+; PR1117
+; RUN: not llvm-as %s -o /dev/null |& grep {invalid cast opcode for cast from}
+
+define i8* @nada(i64 %X) {
+ %result = trunc i64 %X to i8*
+ ret i8* %result
+}
diff --git a/test/Assembler/2007-01-16-CrashOnBadCast2.ll b/test/Assembler/2007-01-16-CrashOnBadCast2.ll
new file mode 100644
index 0000000..c05c609
--- /dev/null
+++ b/test/Assembler/2007-01-16-CrashOnBadCast2.ll
@@ -0,0 +1,4 @@
+; PR1117
+; RUN: not llvm-as %s -o /dev/null |& grep {invalid cast opcode for cast from}
+
+@X = constant i8* trunc (i64 0 to i8*)
diff --git a/test/Assembler/2007-03-18-InvalidNumberedVar.ll b/test/Assembler/2007-03-18-InvalidNumberedVar.ll
new file mode 100644
index 0000000..b2193b1
--- /dev/null
+++ b/test/Assembler/2007-03-18-InvalidNumberedVar.ll
@@ -0,0 +1,9 @@
+; PR 1258
+; RUN: not llvm-as < %s >/dev/null |& grep {'%0' defined with type 'i1'}
+
+define i32 @test1(i32 %a, i32 %b) {
+entry:
+ icmp eq i32 %b, %a ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:0 [#uses=1]
+ ret i32 %0 ; Invalid Type for %0
+}
diff --git a/test/Assembler/2007-03-19-NegValue.ll b/test/Assembler/2007-03-19-NegValue.ll
new file mode 100644
index 0000000..e90cf35
--- /dev/null
+++ b/test/Assembler/2007-03-19-NegValue.ll
@@ -0,0 +1,7 @@
+; Test whether negative values > 64 bits retain their negativeness.
+; RUN: llvm-as < %s | llvm-dis | grep {add i65.*, -1}
+
+define i65 @testConsts(i65 %N) {
+ %a = add i65 %N, -1
+ ret i65 %a
+}
diff --git a/test/Assembler/2007-04-20-AlignedLoad.ll b/test/Assembler/2007-04-20-AlignedLoad.ll
new file mode 100644
index 0000000..f0217ae
--- /dev/null
+++ b/test/Assembler/2007-04-20-AlignedLoad.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llvm-dis | grep {align 1024}
+
+define i32 @test(i32* %arg) {
+entry:
+ %tmp2 = load i32* %arg, align 1024 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
diff --git a/test/Assembler/2007-04-20-AlignedStore.ll b/test/Assembler/2007-04-20-AlignedStore.ll
new file mode 100644
index 0000000..1b08c48
--- /dev/null
+++ b/test/Assembler/2007-04-20-AlignedStore.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llvm-dis | grep {align 1024}
+
+define void @test(i32* %arg) {
+entry:
+ store i32 0, i32* %arg, align 1024
+ ret void
+}
diff --git a/test/Assembler/2007-04-25-AssemblerFoldExternWeak.ll b/test/Assembler/2007-04-25-AssemblerFoldExternWeak.ll
new file mode 100644
index 0000000..c26d9eb
--- /dev/null
+++ b/test/Assembler/2007-04-25-AssemblerFoldExternWeak.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llvm-dis | grep {icmp.*test_weak.*null}
+; PR1358
+@G = global i1 icmp ne (i32 (...)* @test_weak, i32 (...)* null)
+
+declare extern_weak i32 @test_weak(...)
+
diff --git a/test/Assembler/2007-05-21-Escape.ll b/test/Assembler/2007-05-21-Escape.ll
new file mode 100644
index 0000000..0868133
--- /dev/null
+++ b/test/Assembler/2007-05-21-Escape.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "x86_64-apple-darwin8"
+ %struct.bar = type { i32 }
+ %struct.foo = type { i32 }
+
+define i32 @"Func64"(%struct.bar* %F) {
+entry:
+ ret i32 1
+}
+
+define i32 @Func64(%struct.bar* %B) {
+entry:
+ ret i32 0
+}
+
+define i32 @test() {
+entry:
+ %tmp = tail call i32 @"Func64"( %struct.bar* null ) ; <i32> [#uses=0]
+ %tmp1 = tail call i32 @Func64( %struct.bar* null ) ; <i32> [#uses=0]
+ ret i32 undef
+}
diff --git a/test/Assembler/2007-07-19-ParamAttrAmbiguity.ll b/test/Assembler/2007-07-19-ParamAttrAmbiguity.ll
new file mode 100644
index 0000000..9c7daa8
--- /dev/null
+++ b/test/Assembler/2007-07-19-ParamAttrAmbiguity.ll
@@ -0,0 +1,9 @@
+; PR1553
+; RUN: llvm-as < %s > /dev/null
+define void @bar() {
+ %t = call i8 @foo( i8 10 )
+ zext i8 %t to i32
+ ret void
+}
+
+declare i8 @foo(i8)
diff --git a/test/Assembler/2007-07-30-AutoUpgradeZextSext.ll b/test/Assembler/2007-07-30-AutoUpgradeZextSext.ll
new file mode 100644
index 0000000..ea2db44
--- /dev/null
+++ b/test/Assembler/2007-07-30-AutoUpgradeZextSext.ll
@@ -0,0 +1,12 @@
+; Test that upgrading zext/sext attributes to zeroext and signext
+; works correctly.
+; PR1553
+; RUN: llvm-as < %s > /dev/null
+
+define i32 @bar() {
+ %t = call i8 @foo( i8 10 sext ) zext
+ %x = zext i8 %t to i32
+ ret i32 %x
+}
+
+declare i8 @foo(i8 signext ) zeroext
diff --git a/test/Assembler/2007-08-06-AliasInvalid.ll b/test/Assembler/2007-08-06-AliasInvalid.ll
new file mode 100644
index 0000000..940959824
--- /dev/null
+++ b/test/Assembler/2007-08-06-AliasInvalid.ll
@@ -0,0 +1,9 @@
+; RUN: not llvm-as < %s > /dev/null |& grep {expected top-level entity}
+; PR1577
+
+@anInt = global i32 1
+alias i32 @anAlias
+
+define i32 @main() {
+ ret i32 0
+}
diff --git a/test/Assembler/2007-09-10-AliasFwdRef.ll b/test/Assembler/2007-09-10-AliasFwdRef.ll
new file mode 100644
index 0000000..b21491b
--- /dev/null
+++ b/test/Assembler/2007-09-10-AliasFwdRef.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llvm-dis
+; PR1645
+
+@__gthread_active_ptr.5335 = internal constant i8* bitcast (i32 (i32)* @__gthrw_pthread_cancel to i8*)
+@__gthrw_pthread_cancel = alias weak i32 (i32)* @pthread_cancel
+
+
+
+declare extern_weak i32 @pthread_cancel(i32)
diff --git a/test/Assembler/2007-09-29-GC.ll b/test/Assembler/2007-09-29-GC.ll
new file mode 100644
index 0000000..789a0fe
--- /dev/null
+++ b/test/Assembler/2007-09-29-GC.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llvm-dis | grep {@f.*gc.*shadowstack}
+; RUN: llvm-as < %s | llvm-dis | grep {@g.*gc.*java}
+
+define void @f() gc "shadowstack" {
+entry:
+ ret void
+}
+
+define void @g() gc "java" {
+entry:
+ ret void
+}
diff --git a/test/Assembler/2007-11-26-AttributeOverload.ll b/test/Assembler/2007-11-26-AttributeOverload.ll
new file mode 100644
index 0000000..aebc2e8
--- /dev/null
+++ b/test/Assembler/2007-11-26-AttributeOverload.ll
@@ -0,0 +1,4 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+declare i32 @atoi(i8*) nounwind readonly
+declare i32 @atoi(i8*)
diff --git a/test/Assembler/2007-11-27-AutoUpgradeAttributes.ll b/test/Assembler/2007-11-27-AutoUpgradeAttributes.ll
new file mode 100644
index 0000000..ee260ea
--- /dev/null
+++ b/test/Assembler/2007-11-27-AutoUpgradeAttributes.ll
@@ -0,0 +1,3 @@
+; RUN: llvm-as < %s
+
+@FP = weak global i8 (...) signext * null
diff --git a/test/Assembler/2007-12-11-AddressSpaces.ll b/test/Assembler/2007-12-11-AddressSpaces.ll
new file mode 100644
index 0000000..0eb4a79
--- /dev/null
+++ b/test/Assembler/2007-12-11-AddressSpaces.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as < %s | llvm-dis | grep {addrspace(33)} | count 7
+; RUN: llvm-as < %s | llvm-dis | grep {addrspace(42)} | count 2
+; RUN: llvm-as < %s | llvm-dis | grep {addrspace(66)} | count 2
+; RUN: llvm-as < %s | llvm-dis | grep {addrspace(11)} | count 6
+; RUN: llvm-as < %s | llvm-dis | grep {addrspace(22)} | count 5
+
+ %struct.mystruct = type { i32, i32 addrspace(33)*, i32, i32 addrspace(33)* }
+@input = weak addrspace(42) global %struct.mystruct zeroinitializer ; <%struct.mystruct addrspace(42)*> [#uses=1]
+@output = addrspace(66) global %struct.mystruct zeroinitializer ; <%struct.mystruct addrspace(66)*> [#uses=1]
+@y = external addrspace(33) global i32 addrspace(11)* addrspace(22)* ; <i32 addrspace(11)* addrspace(22)* addrspace(33)*> [#uses=1]
+
+define void @foo() {
+entry:
+ %tmp1 = load i32 addrspace(33)* addrspace(42)* getelementptr (%struct.mystruct addrspace(42)* @input, i32 0, i32 3), align 4 ; <i32 addrspace(33)*> [#uses=1]
+ store i32 addrspace(33)* %tmp1, i32 addrspace(33)* addrspace(66)* getelementptr (%struct.mystruct addrspace(66)* @output, i32 0, i32 1), align 4
+ ret void
+}
+
+define i32 addrspace(11)* @bar(i32 addrspace(11)* addrspace(22)* addrspace(33)* %x) {
+entry:
+ %tmp1 = load i32 addrspace(11)* addrspace(22)* addrspace(33)* @y, align 4 ; <i32 addrspace(11)* addrspace(22)*> [#uses=2]
+ store i32 addrspace(11)* addrspace(22)* %tmp1, i32 addrspace(11)* addrspace(22)* addrspace(33)* %x, align 4
+ %tmp5 = load i32 addrspace(11)* addrspace(22)* %tmp1, align 4 ; <i32 addrspace(11)*> [#uses=1]
+ ret i32 addrspace(11)* %tmp5
+}
diff --git a/test/Assembler/2008-01-11-VarargAttrs.ll b/test/Assembler/2008-01-11-VarargAttrs.ll
new file mode 100644
index 0000000..c0aedc80
--- /dev/null
+++ b/test/Assembler/2008-01-11-VarargAttrs.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llvm-dis | grep byval
+
+ %struct = type { }
+
+declare void @foo(...)
+
+define void @bar() {
+ call void (...)* @foo(%struct* byval null )
+ ret void
+}
diff --git a/test/Assembler/2008-02-18-IntPointerCrash.ll b/test/Assembler/2008-02-18-IntPointerCrash.ll
new file mode 100644
index 0000000..5a661ad
--- /dev/null
+++ b/test/Assembler/2008-02-18-IntPointerCrash.ll
@@ -0,0 +1,6 @@
+; RUN: not llvm-as %s |& grep {integer constant must have integer type}
+; PR2060
+
+define i8* @foo() {
+ ret i8* 0
+}
diff --git a/test/Assembler/2008-02-20-MultipleReturnValue.ll b/test/Assembler/2008-02-20-MultipleReturnValue.ll
new file mode 100644
index 0000000..32c893a
--- /dev/null
+++ b/test/Assembler/2008-02-20-MultipleReturnValue.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -verify -S | llvm-as -disable-output
+
+define {i32, i8} @foo(i32 %p) {
+ ret i32 1, i8 2
+}
+
+define i8 @f2(i32 %p) {
+ %c = call {i32, i8} @foo(i32 %p)
+ %d = getresult {i32, i8} %c, 1
+ %e = add i8 %d, 1
+ ret i8 %e
+}
+
+define i32 @f3(i32 %p) {
+ %c = invoke {i32, i8} @foo(i32 %p)
+ to label %L unwind label %L2
+ L:
+ %d = getresult {i32, i8} %c, 0
+ ret i32 %d
+ L2:
+ ret i32 0
+}
diff --git a/test/Assembler/2008-07-10-APInt.ll b/test/Assembler/2008-07-10-APInt.ll
new file mode 100644
index 0000000..99347e9
--- /dev/null
+++ b/test/Assembler/2008-07-10-APInt.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llvm-dis
+; PR2538
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i128 @a() {
+ ret i128 18446744073709551616
+}
+
diff --git a/test/Assembler/2008-09-02-FunctionNotes.ll b/test/Assembler/2008-09-02-FunctionNotes.ll
new file mode 100644
index 0000000..761c91e
--- /dev/null
+++ b/test/Assembler/2008-09-02-FunctionNotes.ll
@@ -0,0 +1,14 @@
+; Test function attributes
+; RUN: llvm-as < %s | llvm-dis | grep inline | count 2
+
+define void @fn1() alwaysinline {
+ ret void
+}
+
+define void @fn2() noinline {
+ ret void
+}
+
+define void @fn3() {
+ ret void
+}
diff --git a/test/Assembler/2008-09-02-FunctionNotes2.ll b/test/Assembler/2008-09-02-FunctionNotes2.ll
new file mode 100644
index 0000000..8a49e89
--- /dev/null
+++ b/test/Assembler/2008-09-02-FunctionNotes2.ll
@@ -0,0 +1,6 @@
+; Test function notes
+; RUN: not llvm-as %s -o /dev/null |& grep "Attributes noinline alwaysinline are incompatible"
+define void @fn1() alwaysinline noinline {
+ ret void
+}
+
diff --git a/test/Assembler/2008-09-29-RetAttr.ll b/test/Assembler/2008-09-29-RetAttr.ll
new file mode 100644
index 0000000..f7db96d
--- /dev/null
+++ b/test/Assembler/2008-09-29-RetAttr.ll
@@ -0,0 +1,13 @@
+; Test return attributes
+; RUN: llvm-as < %s | llvm-dis | grep "define inreg i32"
+; RUN: llvm-as < %s | llvm-dis | grep "call inreg i32"
+
+define inreg i32 @fn1() {
+ ret i32 0
+}
+
+define void @fn2() {
+ %t = call inreg i32 @fn1()
+ ret void
+}
+
diff --git a/test/Assembler/2008-10-14-NamedTypeOnInteger.ll b/test/Assembler/2008-10-14-NamedTypeOnInteger.ll
new file mode 100644
index 0000000..009489d
--- /dev/null
+++ b/test/Assembler/2008-10-14-NamedTypeOnInteger.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
+; PR2733
+
+%t1 = type i32
+%t2 = type { %t1 }
+@i1 = constant %t2 { %t1 15 }
diff --git a/test/Assembler/2008-10-14-QuoteInName.ll b/test/Assembler/2008-10-14-QuoteInName.ll
new file mode 100644
index 0000000..ccd7779
--- /dev/null
+++ b/test/Assembler/2008-10-14-QuoteInName.ll
@@ -0,0 +1,3 @@
+; RUN: llvm-as < %s | llvm-dis | grep "quote"
+
+@"a\22quote" = global i32 0
diff --git a/test/Assembler/2009-02-01-UnnamedForwardRef.ll b/test/Assembler/2009-02-01-UnnamedForwardRef.ll
new file mode 100644
index 0000000..9c6e20d
--- /dev/null
+++ b/test/Assembler/2009-02-01-UnnamedForwardRef.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llvm-dis
+; PR3372
+
+@X = global i32* @0
+global i32 4
+
diff --git a/test/Assembler/2009-02-28-CastOpc.ll b/test/Assembler/2009-02-28-CastOpc.ll
new file mode 100644
index 0000000..ee98d41
--- /dev/null
+++ b/test/Assembler/2009-02-28-CastOpc.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llvm-dis
+
+type i32
+
+define void @foo() {
+ bitcast %0* null to i32*
+ ret void
+}
diff --git a/test/Assembler/2009-02-28-StripOpaqueName.ll b/test/Assembler/2009-02-28-StripOpaqueName.ll
new file mode 100644
index 0000000..f61a44c
--- /dev/null
+++ b/test/Assembler/2009-02-28-StripOpaqueName.ll
@@ -0,0 +1,6 @@
+; RUN: opt < %s -strip -S | llvm-as | llvm-dis
+
+; Stripping the name from A should not break references to it.
+%A = type opaque
+@g1 = external global %A
+@g2 = global %A* @g1
diff --git a/test/Assembler/2009-03-24-ZextConstantExpr.ll b/test/Assembler/2009-03-24-ZextConstantExpr.ll
new file mode 100644
index 0000000..daedb95
--- /dev/null
+++ b/test/Assembler/2009-03-24-ZextConstantExpr.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis
+; PR3876
+@gdtr = external global [0 x i8]
+
+define void @test() {
+ call zeroext i1 @paging_map(i64 zext (i32 and (i32 ptrtoint ([0 x i8]* @gdtr to i32), i32 -4096) to i64))
+ ret void
+}
+
+declare zeroext i1 @paging_map(i64)
+
diff --git a/test/Assembler/2009-04-25-AliasGEP.ll b/test/Assembler/2009-04-25-AliasGEP.ll
new file mode 100644
index 0000000..6d07208
--- /dev/null
+++ b/test/Assembler/2009-04-25-AliasGEP.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
+; PR4066
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+ %struct.i2c_device_id = type { }
+@w83l785ts_id = internal constant [0 x %struct.i2c_device_id] zeroinitializer, align 1 ; <[0 x %struct.i2c_device_id]*> [#uses=1]
+
+@__mod_i2c_device_table = alias getelementptr ([0 x %struct.i2c_device_id]* @w83l785ts_id, i32 0, i32 0) ; <%struct.i2c_device_id*> [#uses=0]
diff --git a/test/Assembler/2009-07-24-ZeroArgGEP.ll b/test/Assembler/2009-07-24-ZeroArgGEP.ll
new file mode 100644
index 0000000..2a3d114
--- /dev/null
+++ b/test/Assembler/2009-07-24-ZeroArgGEP.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as %s -o /dev/null
+
+@foo = global i32 0
+@bar = constant i32* getelementptr(i32* @foo)
+
diff --git a/test/Assembler/2010-02-05-FunctionLocalMetadataBecomesNull.ll b/test/Assembler/2010-02-05-FunctionLocalMetadataBecomesNull.ll
new file mode 100644
index 0000000..b2256b1
--- /dev/null
+++ b/test/Assembler/2010-02-05-FunctionLocalMetadataBecomesNull.ll
@@ -0,0 +1,25 @@
+; RUN: opt -std-compile-opts < %s | llvm-dis | not grep badref
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.2"
+
+%struct.anon = type { i32, i32 }
+%struct.test = type { i64, %struct.anon, %struct.test* }
+
+@TestArrayPtr = global %struct.test* getelementptr inbounds ([10 x %struct.test]* @TestArray, i64 0, i64 3) ; <%struct.test**> [#uses=1]
+@TestArray = common global [10 x %struct.test] zeroinitializer, align 32 ; <[10 x %struct.test]*> [#uses=2]
+
+define i32 @main() nounwind readonly {
+ %diff1 = alloca i64 ; <i64*> [#uses=2]
+ call void @llvm.dbg.declare(metadata !{i64* %diff1}, metadata !0)
+ store i64 72, i64* %diff1, align 8
+ %v1 = load %struct.test** @TestArrayPtr, align 8 ; <%struct.test*> [#uses=1]
+ %v2 = ptrtoint %struct.test* %v1 to i64 ; <i64> [#uses=1]
+ %v3 = sub i64 %v2, ptrtoint ([10 x %struct.test]* @TestArray to i64) ; <i64> [#uses=1]
+ store i64 %v3, i64* %diff1, align 8
+ ret i32 4
+}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+!0 = metadata !{i32 459008, metadata !0, metadata !0, metadata !0, i32 38, metadata !0} ; [ DW_TAG_auto_variable ]
diff --git a/test/Assembler/AutoUpgradeIntrinsics.ll b/test/Assembler/AutoUpgradeIntrinsics.ll
new file mode 100644
index 0000000..af4ec92
--- /dev/null
+++ b/test/Assembler/AutoUpgradeIntrinsics.ll
@@ -0,0 +1,81 @@
+; Tests to make sure intrinsics are automatically upgraded.
+; RUN: llvm-as < %s | llvm-dis | not grep {i32 @llvm\\.ct}
+; RUN: llvm-as < %s | llvm-dis | \
+; RUN: not grep {llvm\\.part\\.set\\.i\[0-9\]*\\.i\[0-9\]*\\.i\[0-9\]*}
+; RUN: llvm-as < %s | llvm-dis | \
+; RUN: not grep {llvm\\.part\\.select\\.i\[0-9\]*\\.i\[0-9\]*}
+; RUN: llvm-as < %s | llvm-dis | \
+; RUN: not grep {llvm\\.bswap\\.i\[0-9\]*\\.i\[0-9\]*}
+; RUN: llvm-as < %s | llvm-dis | \
+; RUN: grep {llvm\\.x86\\.mmx\\.ps} | grep {\\\<2 x i32\\\>} | count 6
+
+declare i32 @llvm.ctpop.i28(i28 %val)
+declare i32 @llvm.cttz.i29(i29 %val)
+declare i32 @llvm.ctlz.i30(i30 %val)
+
+define i32 @test_ct(i32 %A) {
+ %c1 = call i32 @llvm.ctpop.i28(i28 1234)
+ %c2 = call i32 @llvm.cttz.i29(i29 2345)
+ %c3 = call i32 @llvm.ctlz.i30(i30 3456)
+ %r1 = add i32 %c1, %c2
+ %r2 = add i32 %r1, %c3
+ ret i32 %r2
+}
+
+declare i32 @llvm.part.set.i32.i32.i32(i32 %x, i32 %rep, i32 %hi, i32 %lo)
+declare i16 @llvm.part.set.i16.i16.i16(i16 %x, i16 %rep, i32 %hi, i32 %lo)
+define i32 @test_part_set(i32 %A, i16 %B) {
+ %a = call i32 @llvm.part.set.i32.i32.i32(i32 %A, i32 27, i32 8, i32 0)
+ %b = call i16 @llvm.part.set.i16.i16.i16(i16 %B, i16 27, i32 8, i32 0)
+ %c = zext i16 %b to i32
+ %d = add i32 %a, %c
+ ret i32 %d
+}
+
+declare i32 @llvm.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo)
+declare i16 @llvm.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo)
+define i32 @test_part_select(i32 %A, i16 %B) {
+ %a = call i32 @llvm.part.select.i32.i32(i32 %A, i32 8, i32 0)
+ %b = call i16 @llvm.part.select.i16.i16(i16 %B, i32 8, i32 0)
+ %c = zext i16 %b to i32
+ %d = add i32 %a, %c
+ ret i32 %d
+}
+
+declare i32 @llvm.bswap.i32.i32(i32 %x)
+declare i16 @llvm.bswap.i16.i16(i16 %x)
+define i32 @test_bswap(i32 %A, i16 %B) {
+ %a = call i32 @llvm.bswap.i32.i32(i32 %A)
+ %b = call i16 @llvm.bswap.i16.i16(i16 %B)
+ %c = zext i16 %b to i32
+ %d = add i32 %a, %c
+ ret i32 %d
+}
+
+declare <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16>, <2 x i32>) nounwind readnone
+declare <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16>, <2 x i32>) nounwind readnone
+declare <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16>, <2 x i32>) nounwind readnone
+define void @sh16(<4 x i16> %A, <2 x i32> %B) {
+ %r1 = call <4 x i16> @llvm.x86.mmx.psra.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
+ %r2 = call <4 x i16> @llvm.x86.mmx.psll.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
+ %r3 = call <4 x i16> @llvm.x86.mmx.psrl.w( <4 x i16> %A, <2 x i32> %B ) ; <<4 x i16>> [#uses=0]
+ ret void
+}
+
+declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <2 x i32>) nounwind readnone
+declare <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32>, <2 x i32>) nounwind readnone
+declare <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32>, <2 x i32>) nounwind readnone
+define void @sh32(<2 x i32> %A, <2 x i32> %B) {
+ %r1 = call <2 x i32> @llvm.x86.mmx.psra.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
+ %r2 = call <2 x i32> @llvm.x86.mmx.psll.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
+ %r3 = call <2 x i32> @llvm.x86.mmx.psrl.d( <2 x i32> %A, <2 x i32> %B ) ; <<2 x i32>> [#uses=0]
+ ret void
+}
+
+declare <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64>, <2 x i32>) nounwind readnone
+define void @sh64(<1 x i64> %A, <2 x i32> %B) {
+ %r1 = call <1 x i64> @llvm.x86.mmx.psll.q( <1 x i64> %A, <2 x i32> %B ) ; <<1 x i64>> [#uses=0]
+ %r2 = call <1 x i64> @llvm.x86.mmx.psrl.q( <1 x i64> %A, <2 x i32> %B ) ; <<1 x i64>> [#uses=0]
+ ret void
+}
diff --git a/test/Assembler/ConstantExprFold.ll b/test/Assembler/ConstantExprFold.ll
new file mode 100644
index 0000000..d3d374a
--- /dev/null
+++ b/test/Assembler/ConstantExprFold.ll
@@ -0,0 +1,31 @@
+; This test checks to make sure that constant exprs fold in some simple
+; situations
+
+; RUN: llvm-as < %s | llvm-dis | not grep {(}
+
+@A = global i64 0
+
+global i64* inttoptr (i64 add (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X + 0 == X
+global i64* inttoptr (i64 sub (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X - 0 == X
+global i64* inttoptr (i64 mul (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X * 0 == 0
+global i64* inttoptr (i64 sdiv (i64 ptrtoint (i64* @A to i64), i64 1) to i64*) ; X / 1 == X
+global i64* inttoptr (i64 srem (i64 ptrtoint (i64* @A to i64), i64 1) to i64*) ; X % 1 == 0
+global i64* inttoptr (i64 and (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X & 0 == 0
+global i64* inttoptr (i64 and (i64 ptrtoint (i64* @A to i64), i64 -1) to i64*) ; X & -1 == X
+global i64 or (i64 ptrtoint (i64* @A to i64), i64 -1) ; X | -1 == -1
+global i64* inttoptr (i64 xor (i64 ptrtoint (i64* @A to i64), i64 0) to i64*) ; X ^ 0 == X
+
+%Ty = type { i32, i32 }
+@B = external global %Ty
+
+global i1 icmp slt (i64* @A, i64* getelementptr (i64* @A, i64 1)) ; true
+global i1 icmp ult (i64* @A, i64* getelementptr (i64* @A, i64 1)) ; true
+global i1 icmp slt (i64* @A, i64* getelementptr (i64* @A, i64 0)) ; false
+global i1 icmp slt (i32* getelementptr (%Ty* @B, i64 0, i32 0),
+ i32* getelementptr (%Ty* @B, i64 0, i32 1)) ; true
+;global i1 icmp ne (i64* @A, i64* bitcast (%Ty* @B to i64*)) ; true
+
+; PR2206
+@cons = weak global i32 0, align 8 ; <i32*> [#uses=1]
+global i64 and (i64 ptrtoint (i32* @cons to i64), i64 7)
+
diff --git a/test/Assembler/ConstantExprFoldCast.ll b/test/Assembler/ConstantExprFoldCast.ll
new file mode 100644
index 0000000..0ce6e84
--- /dev/null
+++ b/test/Assembler/ConstantExprFoldCast.ll
@@ -0,0 +1,14 @@
+; This test checks to make sure that constant exprs fold in some simple situations
+
+; RUN: llvm-as < %s | llvm-dis | not grep cast
+
+@A = global i32* bitcast (i8* null to i32*) ; Cast null -> fold
+@B = global i32** bitcast (i32** @A to i32**) ; Cast to same type -> fold
+@C = global i32 trunc (i64 42 to i32) ; Integral casts
+@D = global i32* bitcast(float* bitcast (i32* @C to float*) to i32*) ; cast of cast ptr->ptr
+@E = global i32 ptrtoint(float* inttoptr (i8 5 to float*) to i32) ; i32 -> ptr -> i32
+
+; Test folding of binary instrs
+@F = global i32* inttoptr (i32 add (i32 5, i32 -5) to i32*)
+@G = global i32* inttoptr (i32 sub (i32 5, i32 5) to i32*)
+
diff --git a/test/Assembler/MultipleReturnValueType.ll b/test/Assembler/MultipleReturnValueType.ll
new file mode 100644
index 0000000..61771439
--- /dev/null
+++ b/test/Assembler/MultipleReturnValueType.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s
+
+ %struct.S_102 = type { float, float }
+
+declare %struct.S_102 @f_102() nounwind
+
+@callthis = external global void ()* ; <void ()**> [#uses=50]
+
+
+define void @foo() {
+ store void ()* bitcast (%struct.S_102 ()* @f_102 to void ()*), void ()** @callthis, align 8
+ ret void
+}
diff --git a/test/Assembler/aggregate-constant-values.ll b/test/Assembler/aggregate-constant-values.ll
new file mode 100644
index 0000000..a37d03e
--- /dev/null
+++ b/test/Assembler/aggregate-constant-values.ll
@@ -0,0 +1,27 @@
+; RUN: llvm-as < %s | llvm-dis | grep 7 | count 3
+
+define void @foo({i32, i32}* %x) nounwind {
+ store {i32, i32}{i32 7, i32 9}, {i32, i32}* %x
+ ret void
+}
+define void @foo_empty({}* %x) nounwind {
+ store {}{}, {}* %x
+ ret void
+}
+define void @bar([2 x i32]* %x) nounwind {
+ store [2 x i32][i32 7, i32 9], [2 x i32]* %x
+ ret void
+}
+define void @bar_empty([0 x i32]* %x) nounwind {
+ store [0 x i32][], [0 x i32]* %x
+ ret void
+}
+define void @qux(<{i32, i32}>* %x) nounwind {
+ store <{i32, i32}><{i32 7, i32 9}>, <{i32, i32}>* %x
+ ret void
+}
+define void @qux_empty(<{}>* %x) nounwind {
+ store <{}><{}>, <{}>* %x
+ ret void
+}
+
diff --git a/test/Assembler/aggregate-return-single-value.ll b/test/Assembler/aggregate-return-single-value.ll
new file mode 100644
index 0000000..02fb59f
--- /dev/null
+++ b/test/Assembler/aggregate-return-single-value.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llvm-dis
+
+define { i32 } @fooa() nounwind {
+ ret i32 0
+}
+define { i32 } @foob() nounwind {
+ ret {i32}{ i32 0 }
+}
+define [1 x i32] @fooc() nounwind {
+ ret i32 0
+}
+define [1 x i32] @food() nounwind {
+ ret [1 x i32][ i32 0 ]
+}
diff --git a/test/Assembler/alignstack.ll b/test/Assembler/alignstack.ll
new file mode 100644
index 0000000..9f2059f
--- /dev/null
+++ b/test/Assembler/alignstack.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+
+define void @test1() nounwind {
+; CHECK: test1
+; CHECK: sideeffect
+; CHECK-NOT: alignstack
+ tail call void asm sideeffect "mov", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ ret void
+; CHECK: ret
+}
+define void @test2() nounwind {
+; CHECK: test2
+; CHECK: sideeffect
+; CHECK: alignstack
+ tail call void asm sideeffect alignstack "mov", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ ret void
+; CHECK: ret
+}
+define void @test3() nounwind {
+; CHECK: test3
+; CHECK-NOT: sideeffect
+; CHECK: alignstack
+ tail call void asm alignstack "mov", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ ret void
+; CHECK: ret
+}
+define void @test4() nounwind {
+; CHECK: test4
+; CHECK-NOT: sideeffect
+; CHECK-NOT: alignstack
+ tail call void asm "mov", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ ret void
+; CHECK: ret
+}
diff --git a/test/Assembler/anon-functions.ll b/test/Assembler/anon-functions.ll
new file mode 100644
index 0000000..ac06e8c
--- /dev/null
+++ b/test/Assembler/anon-functions.ll
@@ -0,0 +1,26 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
+; PR3611
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+@f = alias void ()* @0 ; <void ()*> [#uses=0]
+@g = alias void ()* @1 ; <void ()*> [#uses=0]
+@h = external global void ()* ; <void ()*> [#uses=0]
+
+define internal void @0() nounwind {
+entry:
+ store void()* @0, void()** @h
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define internal void @1() nounwind {
+entry:
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Assembler/bcwrap.ll b/test/Assembler/bcwrap.ll
new file mode 100644
index 0000000..859dc4b
--- /dev/null
+++ b/test/Assembler/bcwrap.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s > %t
+; RUN: llvm-nm %t | grep foo
+; test for isBitcodeFile, llvm-nm must read from a file for this test
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9.2.2"
+
+define i32 @foo() {
+ ret i32 0
+}
diff --git a/test/Assembler/dg.exp b/test/Assembler/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Assembler/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Assembler/flags.ll b/test/Assembler/flags.ll
new file mode 100644
index 0000000..3241909
--- /dev/null
+++ b/test/Assembler/flags.ll
@@ -0,0 +1,212 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+
+@addr = external global i64
+
+define i64 @add_unsigned(i64 %x, i64 %y) {
+; CHECK: %z = add nuw i64 %x, %y
+ %z = add nuw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @sub_unsigned(i64 %x, i64 %y) {
+; CHECK: %z = sub nuw i64 %x, %y
+ %z = sub nuw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @mul_unsigned(i64 %x, i64 %y) {
+; CHECK: %z = mul nuw i64 %x, %y
+ %z = mul nuw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @add_signed(i64 %x, i64 %y) {
+; CHECK: %z = add nsw i64 %x, %y
+ %z = add nsw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @sub_signed(i64 %x, i64 %y) {
+; CHECK: %z = sub nsw i64 %x, %y
+ %z = sub nsw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @mul_signed(i64 %x, i64 %y) {
+; CHECK: %z = mul nsw i64 %x, %y
+ %z = mul nsw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @add_plain(i64 %x, i64 %y) {
+; CHECK: %z = add i64 %x, %y
+ %z = add i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @sub_plain(i64 %x, i64 %y) {
+; CHECK: %z = sub i64 %x, %y
+ %z = sub i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @mul_plain(i64 %x, i64 %y) {
+; CHECK: %z = mul i64 %x, %y
+ %z = mul i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @add_both(i64 %x, i64 %y) {
+; CHECK: %z = add nuw nsw i64 %x, %y
+ %z = add nuw nsw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @sub_both(i64 %x, i64 %y) {
+; CHECK: %z = sub nuw nsw i64 %x, %y
+ %z = sub nuw nsw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @mul_both(i64 %x, i64 %y) {
+; CHECK: %z = mul nuw nsw i64 %x, %y
+ %z = mul nuw nsw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @add_both_reversed(i64 %x, i64 %y) {
+; CHECK: %z = add nuw nsw i64 %x, %y
+ %z = add nsw nuw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @sub_both_reversed(i64 %x, i64 %y) {
+; CHECK: %z = sub nuw nsw i64 %x, %y
+ %z = sub nsw nuw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @mul_both_reversed(i64 %x, i64 %y) {
+; CHECK: %z = mul nuw nsw i64 %x, %y
+ %z = mul nsw nuw i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @sdiv_exact(i64 %x, i64 %y) {
+; CHECK: %z = sdiv exact i64 %x, %y
+ %z = sdiv exact i64 %x, %y
+ ret i64 %z
+}
+
+define i64 @sdiv_plain(i64 %x, i64 %y) {
+; CHECK: %z = sdiv i64 %x, %y
+ %z = sdiv i64 %x, %y
+ ret i64 %z
+}
+
+define i64* @gep_nw(i64* %p, i64 %x) {
+; CHECK: %z = getelementptr inbounds i64* %p, i64 %x
+ %z = getelementptr inbounds i64* %p, i64 %x
+ ret i64* %z
+}
+
+define i64* @gep_plain(i64* %p, i64 %x) {
+; CHECK: %z = getelementptr i64* %p, i64 %x
+ %z = getelementptr i64* %p, i64 %x
+ ret i64* %z
+}
+
+define i64 @add_both_ce() {
+; CHECK: ret i64 add nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 add nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @sub_both_ce() {
+; CHECK: ret i64 sub nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 sub nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @mul_both_ce() {
+; CHECK: ret i64 mul nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 mul nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @sdiv_exact_ce() {
+; CHECK: ret i64 sdiv exact (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 sdiv exact (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64* @gep_nw_ce() {
+; CHECK: ret i64* getelementptr inbounds (i64* @addr, i64 171)
+ ret i64* getelementptr inbounds (i64* @addr, i64 171)
+}
+
+define i64 @add_plain_ce() {
+; CHECK: ret i64 add (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 add (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @sub_plain_ce() {
+; CHECK: ret i64 sub (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 sub (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @mul_plain_ce() {
+; CHECK: ret i64 mul (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 mul (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @sdiv_plain_ce() {
+; CHECK: ret i64 sdiv (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 sdiv (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64* @gep_plain_ce() {
+; CHECK: ret i64* getelementptr (i64* @addr, i64 171)
+ ret i64* getelementptr (i64* @addr, i64 171)
+}
+
+define i64 @add_both_reversed_ce() {
+; CHECK: ret i64 add nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 add nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @sub_both_reversed_ce() {
+; CHECK: ret i64 sub nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 sub nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @mul_both_reversed_ce() {
+; CHECK: ret i64 mul nuw nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 mul nsw nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @add_signed_ce() {
+; CHECK: ret i64 add nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 add nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @sub_signed_ce() {
+; CHECK: ret i64 sub nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 sub nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @mul_signed_ce() {
+; CHECK: ret i64 mul nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 mul nsw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @add_unsigned_ce() {
+; CHECK: ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @sub_unsigned_ce() {
+; CHECK: ret i64 sub nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 sub nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
+
+define i64 @mul_unsigned_ce() {
+; CHECK: ret i64 mul nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+ ret i64 mul nuw (i64 ptrtoint (i64* @addr to i64), i64 91)
+}
diff --git a/test/Assembler/functionlocal-metadata.ll b/test/Assembler/functionlocal-metadata.ll
new file mode 100644
index 0000000..216587d
--- /dev/null
+++ b/test/Assembler/functionlocal-metadata.ll
@@ -0,0 +1,44 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+
+define void @Foo(i32 %a, i32 %b) {
+entry:
+ call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !"bar")
+; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata !"bar")
+ %0 = add i32 %a, 1 ; <i32> [#uses=1]
+ %two = add i32 %b, %0 ; <i32> [#uses=0]
+ %1 = alloca i32 ; <i32*> [#uses=1]
+
+ call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32* %1})
+; CHECK: metadata !{i32* %1}, metadata !{i32* %1}
+ call void @llvm.dbg.declare(metadata !{i32 %two}, metadata !{i32 %0})
+; CHECK: metadata !{i32 %two}, metadata !{i32 %0}
+ call void @llvm.dbg.declare(metadata !{i32 %0}, metadata !{i32* %1, i32 %0})
+; CHECK: metadata !{i32 %0}, metadata !{i32* %1, i32 %0}
+ call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32 %b, i32 %0})
+; CHECK: metadata !{i32* %1}, metadata !{i32 %b, i32 %0}
+ call void @llvm.dbg.declare(metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"})
+; CHECK: metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"}
+ call void @llvm.dbg.declare(metadata !{i32 %b}, metadata !{metadata !0, i32 %two})
+; CHECK: metadata !{i32 %b}, metadata !{metadata !0, i32 %two}
+
+ call void @llvm.dbg.value(metadata !{ i32 %a }, i64 0, metadata !1)
+; CHECK: metadata !{i32 %a}, i64 0, metadata !1
+ call void @llvm.dbg.value(metadata !{ i32 %0 }, i64 25, metadata !0)
+; CHECK: metadata !{i32 %0}, i64 25, metadata !0
+ call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !"foo")
+; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata !"foo")
+ call void @llvm.dbg.value(metadata !"foo", i64 12, metadata !"bar")
+; CHECK: metadata !"foo", i64 12, metadata !"bar"
+
+ ret void, !foo !0, !bar !1
+; CHECK: ret void, !foo !0, !bar !1
+}
+
+!0 = metadata !{i32 662302, i32 26, metadata !1, null}
+!1 = metadata !{i32 4, metadata !"foo"}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+
+!foo = !{ !0 }
+!bar = !{ !1 }
diff --git a/test/Assembler/getelementptr.ll b/test/Assembler/getelementptr.ll
new file mode 100644
index 0000000..803d6d3
--- /dev/null
+++ b/test/Assembler/getelementptr.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
+
+; Verify that over-indexed getelementptrs are folded.
+@A = external global [2 x [3 x [5 x [7 x i32]]]]
+@B = global i32* getelementptr ([2 x [3 x [5 x [7 x i32]]]]* @A, i64 0, i64 0, i64 2, i64 1, i64 7523)
+; CHECK: @B = global i32* getelementptr ([2 x [3 x [5 x [7 x i32]]]]* @A, i64 36, i64 0, i64 1, i64 0, i64 5) ; <i32**> [#uses=0]
+@C = global i32* getelementptr ([2 x [3 x [5 x [7 x i32]]]]* @A, i64 3, i64 2, i64 0, i64 0, i64 7523)
+; CHECK: @C = global i32* getelementptr ([2 x [3 x [5 x [7 x i32]]]]* @A, i64 39, i64 1, i64 1, i64 4, i64 5) ; <i32**> [#uses=0]
+
+;; Verify that i16 indices work.
+@x = external global {i32, i32}
+@y = global i32* getelementptr ({i32, i32}* @x, i16 42, i32 0)
+; CHECK: @y = global i32* getelementptr (%0* @x, i16 42, i32 0)
+
+; see if i92 indices work too.
+define i32 *@test({i32, i32}* %t, i92 %n) {
+; CHECK: @test
+; CHECK: %B = getelementptr %0* %t, i92 %n, i32 0
+ %B = getelementptr {i32, i32}* %t, i92 %n, i32 0
+ ret i32* %B
+}
+
diff --git a/test/Assembler/getelementptr_struct.ll b/test/Assembler/getelementptr_struct.ll
new file mode 100644
index 0000000..c8779a6
--- /dev/null
+++ b/test/Assembler/getelementptr_struct.ll
@@ -0,0 +1,12 @@
+; RUN: not llvm-as < %s >/dev/null |& grep {invalid getelementptr indices}
+; Test the case of a incorrect indices type into struct
+
+%RT = type { i8 , [10 x [20 x i32]], i8 }
+%ST = type { i32, double, %RT }
+
+define i32* @foo(%ST* %s) {
+entry:
+ %reg = getelementptr %ST* %s, i32 1, i64 2, i32 1, i32 5, i32 13
+ ret i32* %reg
+}
+
diff --git a/test/Assembler/huge-array.ll b/test/Assembler/huge-array.ll
new file mode 100644
index 0000000..e080947
--- /dev/null
+++ b/test/Assembler/huge-array.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llvm-dis | grep 18446744073709551615 | count 2
+
+define [18446744073709551615 x i8]* @foo() {
+ ret [18446744073709551615 x i8]* null
+}
diff --git a/test/Assembler/insertextractvalue.ll b/test/Assembler/insertextractvalue.ll
new file mode 100644
index 0000000..2f5521f
--- /dev/null
+++ b/test/Assembler/insertextractvalue.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s | llvm-dis > %t
+; RUN: grep insertvalue %t | count 1
+; RUN: grep extractvalue %t | count 1
+
+define float @foo({{i32},{float, double}}* %p) nounwind {
+ %t = load {{i32},{float, double}}* %p
+ %s = extractvalue {{i32},{float, double}} %t, 1, 0
+ %r = insertvalue {{i32},{float, double}} %t, double 2.0, 1, 1
+ store {{i32},{float, double}} %r, {{i32},{float, double}}* %p
+ ret float %s
+}
+define float @bar({{i32},{float, double}}* %p) nounwind {
+ store {{i32},{float, double}} insertvalue ({{i32},{float, double}}{{i32}{i32 4},{float, double}{float 4.0, double 5.0}}, double 20.0, 1, 1), {{i32},{float, double}}* %p
+ ret float extractvalue ({{i32},{float, double}}{{i32}{i32 3},{float, double}{float 7.0, double 9.0}}, 1, 0)
+}
+define float @car({{i32},{float, double}}* %p) nounwind {
+ store {{i32},{float, double}} insertvalue ({{i32},{float, double}} undef, double 20.0, 1, 1), {{i32},{float, double}}* %p
+ ret float extractvalue ({{i32},{float, double}} undef, 1, 0)
+}
+define float @dar({{i32},{float, double}}* %p) nounwind {
+ store {{i32},{float, double}} insertvalue ({{i32},{float, double}} zeroinitializer, double 20.0, 1, 1), {{i32},{float, double}}* %p
+ ret float extractvalue ({{i32},{float, double}} zeroinitializer, 1, 0)
+}
+
+
+; PR4963
+define <{ i32, i32 }> @test57() {
+ ret <{ i32, i32 }> insertvalue (<{ i32, i32 }> zeroinitializer, i32 4, 1)
+}
diff --git a/test/Assembler/metadata.ll b/test/Assembler/metadata.ll
new file mode 100644
index 0000000..a52de87
--- /dev/null
+++ b/test/Assembler/metadata.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {ret void, !bar !1, !foo !0}
+define void @test() {
+ add i32 2, 1, !bar !0
+ add i32 1, 2, !foo !1
+
+ call void @llvm.dbg.func.start(metadata !"foo")
+
+ extractvalue {{i32, i32}, i32} undef, 0, 1, !foo !0
+
+ ret void, !foo !0, !bar !1
+}
+
+!0 = metadata !{i32 662302, i32 26, metadata !1, null}
+!1 = metadata !{i32 4, metadata !"foo"}
+
+declare void @llvm.dbg.func.start(metadata) nounwind readnone
+
+
+!foo = !{ !0 }
+!bar = !{ !1 }
+
+; !foo = !{ !0, !"foo" }
\ No newline at end of file
diff --git a/test/Assembler/numbered-values.ll b/test/Assembler/numbered-values.ll
new file mode 100644
index 0000000..2439c83
--- /dev/null
+++ b/test/Assembler/numbered-values.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
+; PR2480
+
+define i32 @test(i32 %X) nounwind {
+entry:
+ %X_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*>:0 [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %X, i32* %X_addr
+ %1 = load i32* %X_addr, align 4 ; <i32>:1 [#uses=1]
+ mul i32 %1, 4 ; <i32>:2 [#uses=1]
+ %3 = add i32 %2, 123 ; <i32>:3 [#uses=1]
+ store i32 %3, i32* %0, align 4
+ ret i32 %3
+}
diff --git a/test/Assembler/private.ll b/test/Assembler/private.ll
new file mode 100644
index 0000000..3714572
--- /dev/null
+++ b/test/Assembler/private.ll
@@ -0,0 +1,9 @@
+; Test to make sure that the 'private' tag is not lost!
+;
+; RUN: llvm-as < %s | llvm-dis | grep private
+
+declare void @foo()
+
+define private void @foo() {
+ ret void
+}
diff --git a/test/Assembler/select.ll b/test/Assembler/select.ll
new file mode 100644
index 0000000..2d3f412
--- /dev/null
+++ b/test/Assembler/select.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as %s -o /dev/null
+
+
+define i32 @test(i1 %C, i32 %V1, i32 %V2) {
+ %X = select i1 true, i1 false, i1 true ; <i1> [#uses=1]
+ %V = select i1 %X, i32 %V1, i32 %V2 ; <i32> [#uses=1]
+ ret i32 %V
+}
+
diff --git a/test/Assembler/unnamed.ll b/test/Assembler/unnamed.ll
new file mode 100644
index 0000000..fb4fa62
--- /dev/null
+++ b/test/Assembler/unnamed.ll
@@ -0,0 +1,51 @@
+; RUN: llvm-as < %s | llvm-dis
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+module asm "this is an inline asm block"
+module asm "this is another inline asm block"
+
+%0 = type { %1, %2 }
+%1 = type { i32 }
+%2 = type { float, double }
+
+@0 = global i32 0
+@1 = global float 3.0
+@2 = global i8* null
+@3 = global x86_fp80 0xK4001E000000000000000
+
+define float @foo(%0* %p) nounwind {
+ %t = load %0* %p ; <%0> [#uses=2]
+ %s = extractvalue %0 %t, 1, 0 ; <float> [#uses=1]
+ %r = insertvalue %0 %t, double 2.000000e+00, 1, 1; <%0> [#uses=1]
+ store %0 %r, %0* %p
+ ret float %s
+}
+
+define float @bar(%0* %p) nounwind {
+ store %0 { %1 { i32 4 }, %2 { float 4.000000e+00, double 2.000000e+01 } }, %0* %p
+ ret float 7.000000e+00
+}
+
+define float @car(%0* %p) nounwind {
+ store %0 { %1 undef, %2 { float undef, double 2.000000e+01 } }, %0* %p
+ ret float undef
+}
+
+define float @dar(%0* %p) nounwind {
+ store %0 { %1 zeroinitializer, %2 { float 0.000000e+00, double 2.000000e+01 } }, %0* %p
+ ret float 0.000000e+00
+}
+
+define i32* @qqq() {
+ ret i32* @0
+}
+define float* @rrr() {
+ ret float* @1
+}
+define i8** @sss() {
+ ret i8** @2
+}
+define x86_fp80* @nnn() {
+ ret x86_fp80* @3
+}
diff --git a/test/Assembler/vbool-cmp.ll b/test/Assembler/vbool-cmp.ll
new file mode 100644
index 0000000..ac8fb29
--- /dev/null
+++ b/test/Assembler/vbool-cmp.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {icmp slt}
+; rudimentary test of fcmp/icmp on vectors returning vector of bool
+
+define <4 x i1> @ffoo(<4 x float> %a, <4 x float> %b) nounwind {
+entry:
+ %cmp = fcmp olt <4 x float> %a, %b ; <4 x i1> [#uses=1]
+ ret <4 x i1> %cmp
+}
+
+define <4 x i1> @ifoo(<4 x i32> %a, <4 x i32> %b) nounwind {
+entry:
+ %cmp = icmp slt <4 x i32> %a, %b ; <4 x i1> [#uses=1]
+ ret <4 x i1> %cmp
+}
+
diff --git a/test/Assembler/vector-cmp.ll b/test/Assembler/vector-cmp.ll
new file mode 100644
index 0000000..688369b
--- /dev/null
+++ b/test/Assembler/vector-cmp.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {global.*icmp slt}
+; PR2317
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9.2.2"
+
+define <4 x i1> @foo(<4 x float> %a, <4 x float> %b) nounwind {
+entry:
+ %cmp = fcmp olt <4 x float> %a, %b ; <4 x i32> [#uses=1]
+ ret <4 x i1> %cmp
+}
+
+global <4 x i1> icmp slt ( <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> )
+
+@B = external global i32
+
+global <4 x i1> icmp slt ( <4 x i32> <i32 ptrtoint (i32 * @B to i32), i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> )
diff --git a/test/Assembler/vector-select.ll b/test/Assembler/vector-select.ll
new file mode 100644
index 0000000..87af602
--- /dev/null
+++ b/test/Assembler/vector-select.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep select
+; rudimentary test of select on vectors returning vector of bool
+
+define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b,
+ <4 x i1> %cond) nounwind {
+entry:
+ %cmp = select <4 x i1> %cond, <4 x i32> %a, <4 x i32> %b
+ ; <4 x i32> [#uses=1]
+ ret <4 x i32> %cmp
+}
+
diff --git a/test/Assembler/vector-shift.ll b/test/Assembler/vector-shift.ll
new file mode 100644
index 0000000..1850e66
--- /dev/null
+++ b/test/Assembler/vector-shift.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep shl | count 1
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep ashr | count 1
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep lshr | count 1
+
+define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b) nounwind {
+entry:
+ %cmp = shl <4 x i32> %a, %b ; <4 x i32> [#uses=1]
+ ret <4 x i32> %cmp
+}
+
+define <4 x i32> @bar(<4 x i32> %a, <4 x i32> %b) nounwind {
+entry:
+ %cmp = lshr <4 x i32> %a, %b ; <4 x i32> [#uses=1]
+ ret <4 x i32> %cmp
+}
+
+define <4 x i32> @baz(<4 x i32> %a, <4 x i32> %b) nounwind {
+entry:
+ %cmp = ashr <4 x i32> %a, %b ; <4 x i32> [#uses=1]
+ ret <4 x i32> %cmp
+}
+
+; Constant expressions: these should be folded.
+define <2 x i64> @foo_ce() nounwind {
+ ret <2 x i64> shl (<2 x i64> <i64 5, i64 6>, <2 x i64> <i64 3, i64 5>)
+}
+define <2 x i64> @bar_ce() nounwind {
+ ret <2 x i64> lshr (<2 x i64> <i64 340, i64 380>, <2 x i64> <i64 3, i64 5>)
+}
+define <2 x i64> @baz_ce() nounwind {
+ ret <2 x i64> ashr (<2 x i64> <i64 573, i64 411>, <2 x i64> <i64 3, i64 5>)
+}
diff --git a/test/Bindings/Ocaml/analysis.ml b/test/Bindings/Ocaml/analysis.ml
new file mode 100644
index 0000000..e830106
--- /dev/null
+++ b/test/Bindings/Ocaml/analysis.ml
@@ -0,0 +1,50 @@
+(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_analysis.cmxa %s -o %t
+ * RUN: ./%t %t.bc
+ *)
+
+open Llvm
+open Llvm_analysis
+
+(* Note that this takes a moment to link, so it's best to keep the number of
+ individual tests low. *)
+
+let context = global_context ()
+
+let test x = if not x then exit 1 else ()
+
+let bomb msg =
+ prerr_endline msg;
+ exit 2
+
+let _ =
+ let fty = function_type (void_type context) [| |] in
+ let m = create_module context "valid_m" in
+ let fn = define_function "valid_fn" fty m in
+ let at_entry = builder_at_end context (entry_block fn) in
+ ignore (build_ret_void at_entry);
+
+
+ (* Test that valid constructs verify. *)
+ begin match verify_module m with
+ Some msg -> bomb "valid module failed verification!"
+ | None -> ()
+ end;
+
+ if not (verify_function fn) then bomb "valid function failed verification!";
+
+
+ (* Test that invalid constructs do not verify.
+ A basic block can contain only one terminator instruction. *)
+ ignore (build_ret_void at_entry);
+
+ begin match verify_module m with
+ Some msg -> ()
+ | None -> bomb "invalid module passed verification!"
+ end;
+
+ if verify_function fn then bomb "invalid function passed verification!";
+
+
+ dispose_module m
+
+ (* Don't bother to test assert_valid_{module,function}. *)
diff --git a/test/Bindings/Ocaml/bitreader.ml b/test/Bindings/Ocaml/bitreader.ml
new file mode 100644
index 0000000..5c23041
--- /dev/null
+++ b/test/Bindings/Ocaml/bitreader.ml
@@ -0,0 +1,77 @@
+(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_bitreader.cmxa llvm_bitwriter.cmxa %s -o %t
+ * RUN: ./%t %t.bc
+ * RUN: llvm-dis < %t.bc | grep caml_int_ty
+ *)
+
+(* Note that this takes a moment to link, so it's best to keep the number of
+ individual tests low. *)
+
+let context = Llvm.global_context ()
+
+let test x = if not x then exit 1 else ()
+
+let _ =
+ let fn = Sys.argv.(1) in
+ let m = Llvm.create_module context "ocaml_test_module" in
+
+ ignore (Llvm.define_type_name "caml_int_ty" (Llvm.i32_type context) m);
+
+ test (Llvm_bitwriter.write_bitcode_file m fn);
+
+ Llvm.dispose_module m;
+
+ (* parse_bitcode *)
+ begin
+ let mb = Llvm.MemoryBuffer.of_file fn in
+ begin try
+ let m = Llvm_bitreader.parse_bitcode context mb in
+ Llvm.dispose_module m
+ with x ->
+ Llvm.MemoryBuffer.dispose mb;
+ raise x
+ end
+ end;
+
+ (* MemoryBuffer.of_file *)
+ test begin try
+ let mb = Llvm.MemoryBuffer.of_file (fn ^ ".bogus") in
+ Llvm.MemoryBuffer.dispose mb;
+ false
+ with Llvm.IoError _ ->
+ true
+ end;
+
+ (* get_module_provider *)
+ begin
+ let mb = Llvm.MemoryBuffer.of_file fn in
+ let mp = begin try
+ Llvm_bitreader.get_module_provider context mb
+ with x ->
+ Llvm.MemoryBuffer.dispose mb;
+ raise x
+ end in
+ Llvm.ModuleProvider.dispose mp
+ end;
+
+ (* corrupt the bitcode *)
+ let fn = fn ^ ".txt" in
+ begin let oc = open_out fn in
+ output_string oc "not a bitcode file\n";
+ close_out oc
+ end;
+
+ (* test get_module_provider exceptions *)
+ test begin
+ try
+ let mb = Llvm.MemoryBuffer.of_file fn in
+ let mp = begin try
+ Llvm_bitreader.get_module_provider context mb
+ with x ->
+ Llvm.MemoryBuffer.dispose mb;
+ raise x
+ end in
+ Llvm.ModuleProvider.dispose mp;
+ false
+ with Llvm_bitreader.Error _ ->
+ true
+ end
diff --git a/test/Bindings/Ocaml/bitwriter.ml b/test/Bindings/Ocaml/bitwriter.ml
new file mode 100644
index 0000000..57caac7
--- /dev/null
+++ b/test/Bindings/Ocaml/bitwriter.ml
@@ -0,0 +1,18 @@
+(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_bitwriter.cmxa %s -o %t
+ * RUN: ./%t %t.bc
+ * RUN: llvm-dis < %t.bc | grep caml_int_ty
+ *)
+
+(* Note that this takes a moment to link, so it's best to keep the number of
+ individual tests low. *)
+
+let context = Llvm.global_context ()
+
+let test x = if not x then exit 1 else ()
+
+let _ =
+ let m = Llvm.create_module context "ocaml_test_module" in
+
+ ignore (Llvm.define_type_name "caml_int_ty" (Llvm.i32_type context) m);
+
+ test (Llvm_bitwriter.write_bitcode_file m Sys.argv.(1))
diff --git a/test/Bindings/Ocaml/dg.exp b/test/Bindings/Ocaml/dg.exp
new file mode 100644
index 0000000..fb4bd07
--- /dev/null
+++ b/test/Bindings/Ocaml/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_supports_binding ocaml ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,ml}]]
+}
diff --git a/test/Bindings/Ocaml/executionengine.ml b/test/Bindings/Ocaml/executionengine.ml
new file mode 100644
index 0000000..ce56c50
--- /dev/null
+++ b/test/Bindings/Ocaml/executionengine.ml
@@ -0,0 +1,115 @@
+(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_target.cmxa llvm_executionengine.cmxa %s -o %t
+ * RUN: ./%t %t.bc
+ *)
+
+open Llvm
+open Llvm_executionengine
+open Llvm_target
+
+(* Note that this takes a moment to link, so it's best to keep the number of
+ individual tests low. *)
+
+let context = global_context ()
+let i8_type = Llvm.i8_type context
+let i32_type = Llvm.i32_type context
+let i64_type = Llvm.i64_type context
+let double_type = Llvm.double_type context
+
+let bomb msg =
+ prerr_endline msg;
+ exit 2
+
+let define_main_fn m retval =
+ let fn =
+ let str_arr_type = pointer_type (pointer_type i8_type) in
+ define_function "main" (function_type i32_type [| i32_type;
+ str_arr_type;
+ str_arr_type |]) m in
+ let b = builder_at_end (global_context ()) (entry_block fn) in
+ ignore (build_ret (const_int i32_type retval) b);
+ fn
+
+let define_plus m =
+ let fn = define_function "plus" (function_type i32_type [| i32_type;
+ i32_type |]) m in
+ let b = builder_at_end (global_context ()) (entry_block fn) in
+ let add = build_add (param fn 0) (param fn 1) "sum" b in
+ ignore (build_ret add b)
+
+let test_genericvalue () =
+ let tu = (1, 2) in
+ let ptrgv = GenericValue.of_pointer tu in
+ assert (tu = GenericValue.as_pointer ptrgv);
+
+ let fpgv = GenericValue.of_float double_type 2. in
+ assert (2. = GenericValue.as_float double_type fpgv);
+
+ let intgv = GenericValue.of_int i32_type 3 in
+ assert (3 = GenericValue.as_int intgv);
+
+ let i32gv = GenericValue.of_int32 i32_type (Int32.of_int 4) in
+ assert ((Int32.of_int 4) = GenericValue.as_int32 i32gv);
+
+ let nigv = GenericValue.of_nativeint i32_type (Nativeint.of_int 5) in
+ assert ((Nativeint.of_int 5) = GenericValue.as_nativeint nigv);
+
+ let i64gv = GenericValue.of_int64 i64_type (Int64.of_int 6) in
+ assert ((Int64.of_int 6) = GenericValue.as_int64 i64gv)
+
+let test_executionengine () =
+ (* create *)
+ let m = create_module (global_context ()) "test_module" in
+ let main = define_main_fn m 42 in
+
+ let m2 = create_module (global_context ()) "test_module2" in
+ define_plus m2;
+
+ let ee = ExecutionEngine.create (ModuleProvider.create m) in
+ let mp2 = ModuleProvider.create m2 in
+ ExecutionEngine.add_module_provider mp2 ee;
+
+ (* run_static_ctors *)
+ ExecutionEngine.run_static_ctors ee;
+
+ (* run_function_as_main *)
+ let res = ExecutionEngine.run_function_as_main main [|"test"|] [||] ee in
+ if 42 != res then bomb "main did not return 42";
+
+ (* free_machine_code *)
+ ExecutionEngine.free_machine_code main ee;
+
+ (* find_function *)
+ match ExecutionEngine.find_function "dne" ee with
+ | Some _ -> raise (Failure "find_function 'dne' failed")
+ | None ->
+
+ match ExecutionEngine.find_function "plus" ee with
+ | None -> raise (Failure "find_function 'plus' failed")
+ | Some plus ->
+
+ (* run_function *)
+ let res = ExecutionEngine.run_function plus
+ [| GenericValue.of_int i32_type 2;
+ GenericValue.of_int i32_type 2 |]
+ ee in
+ if 4 != GenericValue.as_int res then bomb "plus did not work";
+
+ (* remove_module_provider *)
+ Llvm.dispose_module (ExecutionEngine.remove_module_provider mp2 ee);
+
+ (* run_static_dtors *)
+ ExecutionEngine.run_static_dtors ee;
+
+ (* Show that the target data binding links and runs.*)
+ let td = ExecutionEngine.target_data ee in
+
+ (* Demonstrate that a garbage pointer wasn't returned. *)
+ let ty = intptr_type td in
+ if ty != i32_type && ty != i64_type then bomb "target_data did not work";
+
+ (* dispose *)
+ ExecutionEngine.dispose ee
+
+let _ =
+ test_genericvalue ();
+ test_executionengine ()
diff --git a/test/Bindings/Ocaml/scalar_opts.ml b/test/Bindings/Ocaml/scalar_opts.ml
new file mode 100644
index 0000000..0a65810
--- /dev/null
+++ b/test/Bindings/Ocaml/scalar_opts.ml
@@ -0,0 +1,58 @@
+(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_scalar_opts.cmxa llvm_target.cmxa %s -o %t
+ *)
+
+(* Note: It takes several seconds for ocamlopt to link an executable with
+ libLLVMCore.a, so it's better to write a big test than a bunch of
+ little ones. *)
+
+open Llvm
+open Llvm_scalar_opts
+open Llvm_target
+
+let context = global_context ()
+let void_type = Llvm.void_type context
+
+(* Tiny unit test framework - really just to help find which line is busted *)
+let suite name f =
+ prerr_endline (name ^ ":");
+ f ()
+
+
+(*===-- Fixture -----------------------------------------------------------===*)
+
+let filename = Sys.argv.(1)
+let m = create_module context filename
+let mp = ModuleProvider.create m
+
+
+(*===-- Transforms --------------------------------------------------------===*)
+
+let test_transforms () =
+ let (++) x f = ignore (f x); x in
+
+ let fty = function_type void_type [| |] in
+ let fn = define_function "fn" fty m in
+ ignore (build_ret_void (builder_at_end context (entry_block fn)));
+
+ let td = TargetData.create (target_triple m) in
+
+ ignore (PassManager.create_function mp
+ ++ TargetData.add td
+ ++ add_instruction_combining
+ ++ add_reassociation
+ ++ add_gvn
+ ++ add_cfg_simplification
+ ++ add_constant_propagation
+ ++ PassManager.initialize
+ ++ PassManager.run_function fn
+ ++ PassManager.finalize
+ ++ PassManager.dispose);
+
+ TargetData.dispose td
+
+
+(*===-- Driver ------------------------------------------------------------===*)
+
+let _ =
+ suite "transforms" test_transforms;
+ ModuleProvider.dispose mp
diff --git a/test/Bindings/Ocaml/target.ml b/test/Bindings/Ocaml/target.ml
new file mode 100644
index 0000000..3c3b733
--- /dev/null
+++ b/test/Bindings/Ocaml/target.ml
@@ -0,0 +1,54 @@
+(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_target.cmxa %s -o %t
+ *)
+
+(* Note: It takes several seconds for ocamlopt to link an executable with
+ libLLVMCore.a, so it's better to write a big test than a bunch of
+ little ones. *)
+
+open Llvm
+open Llvm_target
+
+let context = global_context ()
+let i32_type = Llvm.i32_type context
+let i64_type = Llvm.i64_type context
+
+(* Tiny unit test framework - really just to help find which line is busted *)
+let suite name f =
+ prerr_endline (name ^ ":");
+ f ()
+
+
+(*===-- Fixture -----------------------------------------------------------===*)
+
+let filename = Sys.argv.(1)
+let m = create_module context filename
+
+
+(*===-- Target Data -------------------------------------------------------===*)
+
+let test_target_data () =
+ let td = TargetData.create (target_triple m) in
+ let sty = struct_type context [| i32_type; i64_type |] in
+
+ ignore (TargetData.as_string td);
+ ignore (TargetData.invalidate_struct_layout td sty);
+ ignore (byte_order td);
+ ignore (pointer_size td);
+ ignore (intptr_type td);
+ ignore (size_in_bits td sty);
+ ignore (store_size td sty);
+ ignore (abi_size td sty);
+ ignore (stack_align td sty);
+ ignore (preferred_align td sty);
+ ignore (preferred_align_of_global td (declare_global sty "g" m));
+ ignore (element_at_offset td sty (Int64.of_int 1));
+ ignore (offset_of_element td sty 1);
+
+ TargetData.dispose td
+
+
+(*===-- Driver ------------------------------------------------------------===*)
+
+let _ =
+ suite "target data" test_target_data;
+ dispose_module m
diff --git a/test/Bindings/Ocaml/vmcore.ml b/test/Bindings/Ocaml/vmcore.ml
new file mode 100644
index 0000000..dd0404a
--- /dev/null
+++ b/test/Bindings/Ocaml/vmcore.ml
@@ -0,0 +1,1126 @@
+(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_analysis.cmxa llvm_bitwriter.cmxa %s -o %t
+ * RUN: ./%t %t.bc
+ * RUN: llvm-dis < %t.bc > %t.ll
+ *)
+
+(* Note: It takes several seconds for ocamlopt to link an executable with
+ libLLVMCore.a, so it's better to write a big test than a bunch of
+ little ones. *)
+
+open Llvm
+open Llvm_bitwriter
+
+
+(* Tiny unit test framework - really just to help find which line is busted *)
+let exit_status = ref 0
+let suite_name = ref ""
+let group_name = ref ""
+let case_num = ref 0
+let print_checkpoints = false
+let context = global_context ()
+let i1_type = Llvm.i1_type context
+let i8_type = Llvm.i8_type context
+let i16_type = Llvm.i16_type context
+let i32_type = Llvm.i32_type context
+let i64_type = Llvm.i64_type context
+let void_type = Llvm.void_type context
+let float_type = Llvm.float_type context
+let double_type = Llvm.double_type context
+let fp128_type = Llvm.fp128_type context
+
+let group name =
+ group_name := !suite_name ^ "/" ^ name;
+ case_num := 0;
+ if print_checkpoints then
+ prerr_endline (" " ^ name ^ "...")
+
+let insist cond =
+ incr case_num;
+ if not cond then
+ exit_status := 10;
+ match print_checkpoints, cond with
+ | false, true -> ()
+ | false, false ->
+ prerr_endline ("FAILED: " ^ !suite_name ^ "/" ^ !group_name ^ " #" ^ (string_of_int !case_num))
+ | true, true ->
+ prerr_endline (" " ^ (string_of_int !case_num))
+ | true, false ->
+ prerr_endline (" " ^ (string_of_int !case_num) ^ " FAIL")
+
+let suite name f =
+ suite_name := name;
+ if print_checkpoints then
+ prerr_endline (name ^ ":");
+ f ()
+
+
+(*===-- Fixture -----------------------------------------------------------===*)
+
+let filename = Sys.argv.(1)
+let m = create_module context filename
+let mp = ModuleProvider.create m
+
+
+(*===-- Target ------------------------------------------------------------===*)
+
+let test_target () =
+ begin group "triple";
+ (* RUN: grep "i686-apple-darwin8" < %t.ll
+ *)
+ let trip = "i686-apple-darwin8" in
+ set_target_triple trip m;
+ insist (trip = target_triple m)
+ end;
+
+ begin group "layout";
+ (* RUN: grep "bogus" < %t.ll
+ *)
+ let layout = "bogus" in
+ set_data_layout layout m;
+ insist (layout = data_layout m)
+ end
+
+(*===-- Types -------------------------------------------------------------===*)
+
+let test_types () =
+ (* RUN: grep {Ty01.*void} < %t.ll
+ *)
+ group "void";
+ insist (define_type_name "Ty01" void_type m);
+ insist (TypeKind.Void == classify_type void_type);
+
+ (* RUN: grep {Ty02.*i1} < %t.ll
+ *)
+ group "i1";
+ insist (define_type_name "Ty02" i1_type m);
+ insist (TypeKind.Integer == classify_type i1_type);
+
+ (* RUN: grep {Ty03.*i32} < %t.ll
+ *)
+ group "i32";
+ insist (define_type_name "Ty03" i32_type m);
+
+ (* RUN: grep {Ty04.*i42} < %t.ll
+ *)
+ group "i42";
+ let ty = integer_type context 42 in
+ insist (define_type_name "Ty04" ty m);
+
+ (* RUN: grep {Ty05.*float} < %t.ll
+ *)
+ group "float";
+ insist (define_type_name "Ty05" float_type m);
+ insist (TypeKind.Float == classify_type float_type);
+
+ (* RUN: grep {Ty06.*double} < %t.ll
+ *)
+ group "double";
+ insist (define_type_name "Ty06" double_type m);
+ insist (TypeKind.Double == classify_type double_type);
+
+ (* RUN: grep {Ty07.*i32.*i1, double} < %t.ll
+ *)
+ group "function";
+ let ty = function_type i32_type [| i1_type; double_type |] in
+ insist (define_type_name "Ty07" ty m);
+ insist (TypeKind.Function = classify_type ty);
+ insist (not (is_var_arg ty));
+ insist (i32_type == return_type ty);
+ insist (double_type == (param_types ty).(1));
+
+ (* RUN: grep {Ty08.*\.\.\.} < %t.ll
+ *)
+ group "var arg function";
+ let ty = var_arg_function_type void_type [| i32_type |] in
+ insist (define_type_name "Ty08" ty m);
+ insist (is_var_arg ty);
+
+ (* RUN: grep {Ty09.*\\\[7 x i8\\\]} < %t.ll
+ *)
+ group "array";
+ let ty = array_type i8_type 7 in
+ insist (define_type_name "Ty09" ty m);
+ insist (7 = array_length ty);
+ insist (i8_type == element_type ty);
+ insist (TypeKind.Array == classify_type ty);
+
+ begin group "pointer";
+ (* RUN: grep {UnqualPtrTy.*float\*} < %t.ll
+ *)
+ let ty = pointer_type float_type in
+ insist (define_type_name "UnqualPtrTy" ty m);
+ insist (float_type == element_type ty);
+ insist (0 == address_space ty);
+ insist (TypeKind.Pointer == classify_type ty)
+ end;
+
+ begin group "qualified_pointer";
+ (* RUN: grep {QualPtrTy.*i8.*3.*\*} < %t.ll
+ *)
+ let ty = qualified_pointer_type i8_type 3 in
+ insist (define_type_name "QualPtrTy" ty m);
+ insist (i8_type == element_type ty);
+ insist (3 == address_space ty)
+ end;
+
+ (* RUN: grep {Ty11.*\<4 x i16\>} < %t.ll
+ *)
+ group "vector";
+ let ty = vector_type i16_type 4 in
+ insist (define_type_name "Ty11" ty m);
+ insist (i16_type == element_type ty);
+ insist (4 = vector_size ty);
+
+ (* RUN: grep {Ty12.*opaque} < %t.ll
+ *)
+ group "opaque";
+ let ty = opaque_type context in
+ insist (define_type_name "Ty12" ty m);
+ insist (ty == ty);
+ insist (ty <> opaque_type context);
+
+ (* RUN: grep -v {Ty13} < %t.ll
+ *)
+ group "delete";
+ let ty = opaque_type context in
+ insist (define_type_name "Ty13" ty m);
+ delete_type_name "Ty13" m;
+
+ (* RUN: grep -v {RecursiveTy.*RecursiveTy} < %t.ll
+ *)
+ group "recursive";
+ let ty = opaque_type context in
+ let th = handle_to_type ty in
+ refine_type ty (pointer_type ty);
+ let ty = type_of_handle th in
+ insist (define_type_name "RecursiveTy" ty m);
+ insist (ty == element_type ty)
+
+
+(*===-- Constants ---------------------------------------------------------===*)
+
+let test_constants () =
+ (* RUN: grep {Const01.*i32.*-1} < %t.ll
+ *)
+ group "int";
+ let c = const_int i32_type (-1) in
+ ignore (define_global "Const01" c m);
+ insist (i32_type = type_of c);
+ insist (is_constant c);
+
+ (* RUN: grep {Const02.*i64.*-1} < %t.ll
+ *)
+ group "sext int";
+ let c = const_int i64_type (-1) in
+ ignore (define_global "Const02" c m);
+ insist (i64_type = type_of c);
+
+ (* RUN: grep {Const03.*i64.*4294967295} < %t.ll
+ *)
+ group "zext int64";
+ let c = const_of_int64 i64_type (Int64.of_string "4294967295") false in
+ ignore (define_global "Const03" c m);
+ insist (i64_type = type_of c);
+
+ (* RUN: grep {ConstIntString.*i32.*-1} < %t.ll
+ *)
+ group "int string";
+ let c = const_int_of_string i32_type "-1" 10 in
+ ignore (define_global "ConstIntString" c m);
+ insist (i32_type = type_of c);
+
+ (* RUN: grep {Const04.*"cruel\\\\00world"} < %t.ll
+ *)
+ group "string";
+ let c = const_string context "cruel\000world" in
+ ignore (define_global "Const04" c m);
+ insist ((array_type i8_type 11) = type_of c);
+
+ (* RUN: grep {Const05.*"hi\\\\00again\\\\00"} < %t.ll
+ *)
+ group "stringz";
+ let c = const_stringz context "hi\000again" in
+ ignore (define_global "Const05" c m);
+ insist ((array_type i8_type 9) = type_of c);
+
+ (* RUN: grep {ConstSingle.*2.75} < %t.ll
+ * RUN: grep {ConstDouble.*3.1459} < %t.ll
+ * RUN: grep {ConstDoubleString.*1.25} < %t.ll
+ *)
+ begin group "real";
+ let cs = const_float float_type 2.75 in
+ ignore (define_global "ConstSingle" cs m);
+ insist (float_type = type_of cs);
+
+ let cd = const_float double_type 3.1459 in
+ ignore (define_global "ConstDouble" cd m);
+ insist (double_type = type_of cd);
+
+ let cd = const_float_of_string double_type "1.25" in
+ ignore (define_global "ConstDoubleString" cd m);
+ insist (double_type = type_of cd)
+ end;
+
+ let one = const_int i16_type 1 in
+ let two = const_int i16_type 2 in
+ let three = const_int i32_type 3 in
+ let four = const_int i32_type 4 in
+
+ (* RUN: grep {Const07.*\\\[i32 3, i32 4\\\]} < %t.ll
+ *)
+ group "array";
+ let c = const_array i32_type [| three; four |] in
+ ignore (define_global "Const07" c m);
+ insist ((array_type i32_type 2) = (type_of c));
+
+ (* RUN: grep {Const08.*<i16 1, i16 2.*>} < %t.ll
+ *)
+ group "vector";
+ let c = const_vector [| one; two; one; two;
+ one; two; one; two |] in
+ ignore (define_global "Const08" c m);
+ insist ((vector_type i16_type 8) = (type_of c));
+
+ (* RUN: grep {Const09.*.i16 1, i16 2, i32 3, i32 4} < %t.ll
+ *)
+ group "structure";
+ let c = const_struct context [| one; two; three; four |] in
+ ignore (define_global "Const09" c m);
+ insist ((struct_type context [| i16_type; i16_type; i32_type; i32_type |])
+ = (type_of c));
+
+ (* RUN: grep {Const10.*zeroinit} < %t.ll
+ *)
+ group "null";
+ let c = const_null (packed_struct_type context [| i1_type; i8_type; i64_type;
+ double_type |]) in
+ ignore (define_global "Const10" c m);
+
+ (* RUN: grep {Const11.*-1} < %t.ll
+ *)
+ group "all ones";
+ let c = const_all_ones i64_type in
+ ignore (define_global "Const11" c m);
+
+ (* RUN: grep {Const12.*undef} < %t.ll
+ *)
+ group "undef";
+ let c = undef i1_type in
+ ignore (define_global "Const12" c m);
+ insist (i1_type = type_of c);
+ insist (is_undef c);
+
+ group "constant arithmetic";
+ (* RUN: grep {ConstNeg.*sub} < %t.ll
+ * RUN: grep {ConstNot.*xor} < %t.ll
+ * RUN: grep {ConstAdd.*add} < %t.ll
+ * RUN: grep {ConstSub.*sub} < %t.ll
+ * RUN: grep {ConstMul.*mul} < %t.ll
+ * RUN: grep {ConstUDiv.*udiv} < %t.ll
+ * RUN: grep {ConstSDiv.*sdiv} < %t.ll
+ * RUN: grep {ConstFDiv.*fdiv} < %t.ll
+ * RUN: grep {ConstURem.*urem} < %t.ll
+ * RUN: grep {ConstSRem.*srem} < %t.ll
+ * RUN: grep {ConstFRem.*frem} < %t.ll
+ * RUN: grep {ConstAnd.*and} < %t.ll
+ * RUN: grep {ConstOr.*or} < %t.ll
+ * RUN: grep {ConstXor.*xor} < %t.ll
+ * RUN: grep {ConstICmp.*icmp} < %t.ll
+ * RUN: grep {ConstFCmp.*fcmp} < %t.ll
+ *)
+ let void_ptr = pointer_type i8_type in
+ let five = const_int i64_type 5 in
+ let ffive = const_uitofp five double_type in
+ let foldbomb_gv = define_global "FoldBomb" (const_null i8_type) m in
+ let foldbomb = const_ptrtoint foldbomb_gv i64_type in
+ let ffoldbomb = const_uitofp foldbomb double_type in
+ ignore (define_global "ConstNeg" (const_neg foldbomb) m);
+ ignore (define_global "ConstNot" (const_not foldbomb) m);
+ ignore (define_global "ConstAdd" (const_add foldbomb five) m);
+ ignore (define_global "ConstSub" (const_sub foldbomb five) m);
+ ignore (define_global "ConstMul" (const_mul foldbomb five) m);
+ ignore (define_global "ConstUDiv" (const_udiv foldbomb five) m);
+ ignore (define_global "ConstSDiv" (const_sdiv foldbomb five) m);
+ ignore (define_global "ConstFDiv" (const_fdiv ffoldbomb ffive) m);
+ ignore (define_global "ConstURem" (const_urem foldbomb five) m);
+ ignore (define_global "ConstSRem" (const_srem foldbomb five) m);
+ ignore (define_global "ConstFRem" (const_frem ffoldbomb ffive) m);
+ ignore (define_global "ConstAnd" (const_and foldbomb five) m);
+ ignore (define_global "ConstOr" (const_or foldbomb five) m);
+ ignore (define_global "ConstXor" (const_xor foldbomb five) m);
+ ignore (define_global "ConstICmp" (const_icmp Icmp.Sle foldbomb five) m);
+ ignore (define_global "ConstFCmp" (const_fcmp Fcmp.Ole ffoldbomb ffive) m);
+
+ group "constant casts";
+ (* RUN: grep {ConstTrunc.*trunc} < %t.ll
+ * RUN: grep {ConstSExt.*sext} < %t.ll
+ * RUN: grep {ConstZExt.*zext} < %t.ll
+ * RUN: grep {ConstFPTrunc.*fptrunc} < %t.ll
+ * RUN: grep {ConstFPExt.*fpext} < %t.ll
+ * RUN: grep {ConstUIToFP.*uitofp} < %t.ll
+ * RUN: grep {ConstSIToFP.*sitofp} < %t.ll
+ * RUN: grep {ConstFPToUI.*fptoui} < %t.ll
+ * RUN: grep {ConstFPToSI.*fptosi} < %t.ll
+ * RUN: grep {ConstPtrToInt.*ptrtoint} < %t.ll
+ * RUN: grep {ConstIntToPtr.*inttoptr} < %t.ll
+ * RUN: grep {ConstBitCast.*bitcast} < %t.ll
+ *)
+ let i128_type = integer_type context 128 in
+ ignore (define_global "ConstTrunc" (const_trunc (const_add foldbomb five)
+ i8_type) m);
+ ignore (define_global "ConstSExt" (const_sext foldbomb i128_type) m);
+ ignore (define_global "ConstZExt" (const_zext foldbomb i128_type) m);
+ ignore (define_global "ConstFPTrunc" (const_fptrunc ffoldbomb float_type) m);
+ ignore (define_global "ConstFPExt" (const_fpext ffoldbomb fp128_type) m);
+ ignore (define_global "ConstUIToFP" (const_uitofp foldbomb double_type) m);
+ ignore (define_global "ConstSIToFP" (const_sitofp foldbomb double_type) m);
+ ignore (define_global "ConstFPToUI" (const_fptoui ffoldbomb i32_type) m);
+ ignore (define_global "ConstFPToSI" (const_fptosi ffoldbomb i32_type) m);
+ ignore (define_global "ConstPtrToInt" (const_ptrtoint
+ (const_gep (const_null (pointer_type i8_type))
+ [| const_int i32_type 1 |])
+ i32_type) m);
+ ignore (define_global "ConstIntToPtr" (const_inttoptr (const_add foldbomb five)
+ void_ptr) m);
+ ignore (define_global "ConstBitCast" (const_bitcast ffoldbomb i64_type) m);
+
+ group "misc constants";
+ (* RUN: grep {ConstSizeOf.*getelementptr.*null} < %t.ll
+ * RUN: grep {ConstGEP.*getelementptr} < %t.ll
+ * RUN: grep {ConstSelect.*select} < %t.ll
+ * RUN: grep {ConstExtractElement.*extractelement} < %t.ll
+ * RUN: grep {ConstInsertElement.*insertelement} < %t.ll
+ * RUN: grep {ConstShuffleVector.*shufflevector} < %t.ll
+ *)
+ ignore (define_global "ConstSizeOf" (size_of (pointer_type i8_type)) m);
+ ignore (define_global "ConstGEP" (const_gep foldbomb_gv [| five |]) m);
+ ignore (define_global "ConstSelect" (const_select
+ (const_icmp Icmp.Sle foldbomb five)
+ (const_int i8_type (-1))
+ (const_int i8_type 0)) m);
+ let zero = const_int i32_type 0 in
+ let one = const_int i32_type 1 in
+ ignore (define_global "ConstExtractElement" (const_extractelement
+ (const_vector [| zero; one; zero; one |])
+ (const_trunc foldbomb i32_type)) m);
+ ignore (define_global "ConstInsertElement" (const_insertelement
+ (const_vector [| zero; one; zero; one |])
+ zero (const_trunc foldbomb i32_type)) m);
+ ignore (define_global "ConstShuffleVector" (const_shufflevector
+ (const_vector [| zero; one |])
+ (const_vector [| one; zero |])
+ (const_bitcast foldbomb (vector_type i32_type 2))) m)
+
+
+(*===-- Global Values -----------------------------------------------------===*)
+
+let test_global_values () =
+ let (++) x f = f x; x in
+ let zero32 = const_null i32_type in
+
+ (* RUN: grep {GVal01} < %t.ll
+ *)
+ group "naming";
+ let g = define_global "TEMPORARY" zero32 m in
+ insist ("TEMPORARY" = value_name g);
+ set_value_name "GVal01" g;
+ insist ("GVal01" = value_name g);
+
+ (* RUN: grep {GVal02.*linkonce} < %t.ll
+ *)
+ group "linkage";
+ let g = define_global "GVal02" zero32 m ++
+ set_linkage Linkage.Link_once in
+ insist (Linkage.Link_once = linkage g);
+
+ (* RUN: grep {GVal03.*Hanalei} < %t.ll
+ *)
+ group "section";
+ let g = define_global "GVal03" zero32 m ++
+ set_section "Hanalei" in
+ insist ("Hanalei" = section g);
+
+ (* RUN: grep {GVal04.*hidden} < %t.ll
+ *)
+ group "visibility";
+ let g = define_global "GVal04" zero32 m ++
+ set_visibility Visibility.Hidden in
+ insist (Visibility.Hidden = visibility g);
+
+ (* RUN: grep {GVal05.*align 128} < %t.ll
+ *)
+ group "alignment";
+ let g = define_global "GVal05" zero32 m ++
+ set_alignment 128 in
+ insist (128 = alignment g)
+
+
+(*===-- Global Variables --------------------------------------------------===*)
+
+let test_global_variables () =
+ let (++) x f = f x; x in
+ let fourty_two32 = const_int i32_type 42 in
+
+ (* RUN: grep {GVar01.*external} < %t.ll
+ *)
+ group "declarations";
+ insist (None == lookup_global "GVar01" m);
+ let g = declare_global i32_type "GVar01" m in
+ insist (is_declaration g);
+ insist (pointer_type float_type ==
+ type_of (declare_global float_type "GVar01" m));
+ insist (g == declare_global i32_type "GVar01" m);
+ insist (match lookup_global "GVar01" m with Some x -> x = g
+ | None -> false);
+
+ (* RUN: grep {GVar02.*42} < %t.ll
+ * RUN: grep {GVar03.*42} < %t.ll
+ *)
+ group "definitions";
+ let g = define_global "GVar02" fourty_two32 m in
+ let g2 = declare_global i32_type "GVar03" m ++
+ set_initializer fourty_two32 in
+ insist (not (is_declaration g));
+ insist (not (is_declaration g2));
+ insist ((global_initializer g) == (global_initializer g2));
+
+ (* RUN: grep {GVar04.*thread_local} < %t.ll
+ *)
+ group "threadlocal";
+ let g = define_global "GVar04" fourty_two32 m ++
+ set_thread_local true in
+ insist (is_thread_local g);
+
+ (* RUN: grep -v {GVar05} < %t.ll
+ *)
+ group "delete";
+ let g = define_global "GVar05" fourty_two32 m in
+ delete_global g;
+
+ (* RUN: grep -v {ConstGlobalVar.*constant} < %t.ll
+ *)
+ group "constant";
+ let g = define_global "ConstGlobalVar" fourty_two32 m in
+ insist (not (is_global_constant g));
+ set_global_constant true g;
+ insist (is_global_constant g);
+
+ begin group "iteration";
+ let m = create_module context "temp" in
+
+ insist (At_end m = global_begin m);
+ insist (At_start m = global_end m);
+
+ let g1 = declare_global i32_type "One" m in
+ let g2 = declare_global i32_type "Two" m in
+
+ insist (Before g1 = global_begin m);
+ insist (Before g2 = global_succ g1);
+ insist (At_end m = global_succ g2);
+
+ insist (After g2 = global_end m);
+ insist (After g1 = global_pred g2);
+ insist (At_start m = global_pred g1);
+
+ let lf s x = s ^ "->" ^ value_name x in
+ insist ("->One->Two" = fold_left_globals lf "" m);
+
+ let rf x s = value_name x ^ "<-" ^ s in
+ insist ("One<-Two<-" = fold_right_globals rf m "");
+
+ dispose_module m
+ end
+
+
+(*===-- Functions ---------------------------------------------------------===*)
+
+let test_functions () =
+ let ty = function_type i32_type [| i32_type; i64_type |] in
+ let ty2 = function_type i8_type [| i8_type; i64_type |] in
+
+ (* RUN: grep {declare i32 @Fn1\(i32, i64\)} < %t.ll
+ *)
+ begin group "declare";
+ insist (None = lookup_function "Fn1" m);
+ let fn = declare_function "Fn1" ty m in
+ insist (pointer_type ty = type_of fn);
+ insist (is_declaration fn);
+ insist (0 = Array.length (basic_blocks fn));
+ insist (pointer_type ty2 == type_of (declare_function "Fn1" ty2 m));
+ insist (fn == declare_function "Fn1" ty m);
+ insist (None <> lookup_function "Fn1" m);
+ insist (match lookup_function "Fn1" m with Some x -> x = fn
+ | None -> false);
+ insist (m == global_parent fn)
+ end;
+
+ (* RUN: grep -v {Fn2} < %t.ll
+ *)
+ group "delete";
+ let fn = declare_function "Fn2" ty m in
+ delete_function fn;
+
+ (* RUN: grep {define.*Fn3} < %t.ll
+ *)
+ group "define";
+ let fn = define_function "Fn3" ty m in
+ insist (not (is_declaration fn));
+ insist (1 = Array.length (basic_blocks fn));
+ ignore (build_unreachable (builder_at_end context (entry_block fn)));
+
+ (* RUN: grep {define.*Fn4.*Param1.*Param2} < %t.ll
+ *)
+ group "params";
+ let fn = define_function "Fn4" ty m in
+ let params = params fn in
+ insist (2 = Array.length params);
+ insist (params.(0) = param fn 0);
+ insist (params.(1) = param fn 1);
+ insist (i32_type = type_of params.(0));
+ insist (i64_type = type_of params.(1));
+ set_value_name "Param1" params.(0);
+ set_value_name "Param2" params.(1);
+ ignore (build_unreachable (builder_at_end context (entry_block fn)));
+
+ (* RUN: grep {fastcc.*Fn5} < %t.ll
+ *)
+ group "callconv";
+ let fn = define_function "Fn5" ty m in
+ insist (CallConv.c = function_call_conv fn);
+ set_function_call_conv CallConv.fast fn;
+ insist (CallConv.fast = function_call_conv fn);
+ ignore (build_unreachable (builder_at_end context (entry_block fn)));
+
+ begin group "gc";
+ (* RUN: grep {Fn6.*gc.*shadowstack} < %t.ll
+ *)
+ let fn = define_function "Fn6" ty m in
+ insist (None = gc fn);
+ set_gc (Some "ocaml") fn;
+ insist (Some "ocaml" = gc fn);
+ set_gc None fn;
+ insist (None = gc fn);
+ set_gc (Some "shadowstack") fn;
+ ignore (build_unreachable (builder_at_end context (entry_block fn)));
+ end;
+
+ begin group "iteration";
+ let m = create_module context "temp" in
+
+ insist (At_end m = function_begin m);
+ insist (At_start m = function_end m);
+
+ let f1 = define_function "One" ty m in
+ let f2 = define_function "Two" ty m in
+
+ insist (Before f1 = function_begin m);
+ insist (Before f2 = function_succ f1);
+ insist (At_end m = function_succ f2);
+
+ insist (After f2 = function_end m);
+ insist (After f1 = function_pred f2);
+ insist (At_start m = function_pred f1);
+
+ let lf s x = s ^ "->" ^ value_name x in
+ insist ("->One->Two" = fold_left_functions lf "" m);
+
+ let rf x s = value_name x ^ "<-" ^ s in
+ insist ("One<-Two<-" = fold_right_functions rf m "");
+
+ dispose_module m
+ end
+
+
+(*===-- Params ------------------------------------------------------------===*)
+
+let test_params () =
+ begin group "iteration";
+ let m = create_module context "temp" in
+
+ let vf = define_function "void" (function_type void_type [| |]) m in
+
+ insist (At_end vf = param_begin vf);
+ insist (At_start vf = param_end vf);
+
+ let ty = function_type void_type [| i32_type; i32_type |] in
+ let f = define_function "f" ty m in
+ let p1 = param f 0 in
+ let p2 = param f 1 in
+ set_value_name "One" p1;
+ set_value_name "Two" p2;
+ add_param_attr p1 Attribute.Sext;
+ add_param_attr p2 Attribute.Noalias;
+ remove_param_attr p2 Attribute.Noalias;
+ add_function_attr f Attribute.Nounwind;
+ add_function_attr f Attribute.Noreturn;
+ remove_function_attr f Attribute.Noreturn;
+
+ insist (Before p1 = param_begin f);
+ insist (Before p2 = param_succ p1);
+ insist (At_end f = param_succ p2);
+
+ insist (After p2 = param_end f);
+ insist (After p1 = param_pred p2);
+ insist (At_start f = param_pred p1);
+
+ let lf s x = s ^ "->" ^ value_name x in
+ insist ("->One->Two" = fold_left_params lf "" f);
+
+ let rf x s = value_name x ^ "<-" ^ s in
+ insist ("One<-Two<-" = fold_right_params rf f "");
+
+ dispose_module m
+ end
+
+
+(*===-- Basic Blocks ------------------------------------------------------===*)
+
+let test_basic_blocks () =
+ let ty = function_type void_type [| |] in
+
+ (* RUN: grep {Bb1} < %t.ll
+ *)
+ group "entry";
+ let fn = declare_function "X" ty m in
+ let bb = append_block context "Bb1" fn in
+ insist (bb = entry_block fn);
+ ignore (build_unreachable (builder_at_end context bb));
+
+ (* RUN: grep -v Bb2 < %t.ll
+ *)
+ group "delete";
+ let fn = declare_function "X2" ty m in
+ let bb = append_block context "Bb2" fn in
+ delete_block bb;
+
+ group "insert";
+ let fn = declare_function "X3" ty m in
+ let bbb = append_block context "b" fn in
+ let bba = insert_block context "a" bbb in
+ insist ([| bba; bbb |] = basic_blocks fn);
+ ignore (build_unreachable (builder_at_end context bba));
+ ignore (build_unreachable (builder_at_end context bbb));
+
+ (* RUN: grep Bb3 < %t.ll
+ *)
+ group "name/value";
+ let fn = define_function "X4" ty m in
+ let bb = entry_block fn in
+ ignore (build_unreachable (builder_at_end context bb));
+ let bbv = value_of_block bb in
+ set_value_name "Bb3" bbv;
+ insist ("Bb3" = value_name bbv);
+
+ group "casts";
+ let fn = define_function "X5" ty m in
+ let bb = entry_block fn in
+ ignore (build_unreachable (builder_at_end context bb));
+ insist (bb = block_of_value (value_of_block bb));
+ insist (value_is_block (value_of_block bb));
+ insist (not (value_is_block (const_null i32_type)));
+
+ begin group "iteration";
+ let m = create_module context "temp" in
+ let f = declare_function "Temp" (function_type i32_type [| |]) m in
+
+ insist (At_end f = block_begin f);
+ insist (At_start f = block_end f);
+
+ let b1 = append_block context "One" f in
+ let b2 = append_block context "Two" f in
+
+ insist (Before b1 = block_begin f);
+ insist (Before b2 = block_succ b1);
+ insist (At_end f = block_succ b2);
+
+ insist (After b2 = block_end f);
+ insist (After b1 = block_pred b2);
+ insist (At_start f = block_pred b1);
+
+ let lf s x = s ^ "->" ^ value_name (value_of_block x) in
+ insist ("->One->Two" = fold_left_blocks lf "" f);
+
+ let rf x s = value_name (value_of_block x) ^ "<-" ^ s in
+ insist ("One<-Two<-" = fold_right_blocks rf f "");
+
+ dispose_module m
+ end
+
+
+(*===-- Instructions ------------------------------------------------------===*)
+
+let test_instructions () =
+ begin group "iteration";
+ let m = create_module context "temp" in
+ let fty = function_type void_type [| i32_type; i32_type |] in
+ let f = define_function "f" fty m in
+ let bb = entry_block f in
+ let b = builder_at context (At_end bb) in
+
+ insist (At_end bb = instr_begin bb);
+ insist (At_start bb = instr_end bb);
+
+ let i1 = build_add (param f 0) (param f 1) "One" b in
+ let i2 = build_sub (param f 0) (param f 1) "Two" b in
+
+ insist (Before i1 = instr_begin bb);
+ insist (Before i2 = instr_succ i1);
+ insist (At_end bb = instr_succ i2);
+
+ insist (After i2 = instr_end bb);
+ insist (After i1 = instr_pred i2);
+ insist (At_start bb = instr_pred i1);
+
+ let lf s x = s ^ "->" ^ value_name x in
+ insist ("->One->Two" = fold_left_instrs lf "" bb);
+
+ let rf x s = value_name x ^ "<-" ^ s in
+ insist ("One<-Two<-" = fold_right_instrs rf bb "");
+
+ dispose_module m
+ end
+
+
+(*===-- Builder -----------------------------------------------------------===*)
+
+let test_builder () =
+ let (++) x f = f x; x in
+
+ begin group "parent";
+ insist (try
+ ignore (insertion_block (builder context));
+ false
+ with Not_found ->
+ true);
+
+ let fty = function_type void_type [| i32_type |] in
+ let fn = define_function "BuilderParent" fty m in
+ let bb = entry_block fn in
+ let b = builder_at_end context bb in
+ let p = param fn 0 in
+ let sum = build_add p p "sum" b in
+ ignore (build_ret_void b);
+
+ insist (fn = block_parent bb);
+ insist (fn = param_parent p);
+ insist (bb = instr_parent sum);
+ insist (bb = insertion_block b)
+ end;
+
+ group "ret void";
+ begin
+ (* RUN: grep {ret void} < %t.ll
+ *)
+ let fty = function_type void_type [| |] in
+ let fn = declare_function "X6" fty m in
+ let b = builder_at_end context (append_block context "Bb01" fn) in
+ ignore (build_ret_void b)
+ end;
+
+ (* The rest of the tests will use one big function. *)
+ let fty = function_type i32_type [| i32_type; i32_type |] in
+ let fn = define_function "X7" fty m in
+ let atentry = builder_at_end context (entry_block fn) in
+ let p1 = param fn 0 ++ set_value_name "P1" in
+ let p2 = param fn 1 ++ set_value_name "P2" in
+ let f1 = build_uitofp p1 float_type "F1" atentry in
+ let f2 = build_uitofp p2 float_type "F2" atentry in
+
+ let bb00 = append_block context "Bb00" fn in
+ ignore (build_unreachable (builder_at_end context bb00));
+
+ group "ret"; begin
+ (* RUN: grep {ret.*P1} < %t.ll
+ *)
+ let ret = build_ret p1 atentry in
+ position_before ret atentry
+ end;
+
+ group "br"; begin
+ (* RUN: grep {br.*Bb02} < %t.ll
+ *)
+ let bb02 = append_block context "Bb02" fn in
+ let b = builder_at_end context bb02 in
+ ignore (build_br bb02 b)
+ end;
+
+ group "cond_br"; begin
+ (* RUN: grep {br.*Inst01.*Bb03.*Bb00} < %t.ll
+ *)
+ let bb03 = append_block context "Bb03" fn in
+ let b = builder_at_end context bb03 in
+ let cond = build_trunc p1 i1_type "Inst01" b in
+ ignore (build_cond_br cond bb03 bb00 b)
+ end;
+
+ group "switch"; begin
+ (* RUN: grep {switch.*P1.*SwiBlock3} < %t.ll
+ * RUN: grep {2,.*SwiBlock2} < %t.ll
+ *)
+ let bb1 = append_block context "SwiBlock1" fn in
+ let bb2 = append_block context "SwiBlock2" fn in
+ ignore (build_unreachable (builder_at_end context bb2));
+ let bb3 = append_block context "SwiBlock3" fn in
+ ignore (build_unreachable (builder_at_end context bb3));
+ let si = build_switch p1 bb3 1 (builder_at_end context bb1) in
+ ignore (add_case si (const_int i32_type 2) bb2)
+ end;
+
+ group "invoke"; begin
+ (* RUN: grep {Inst02.*invoke.*P1.*P2} < %t.ll
+ * RUN: grep {to.*Bb04.*unwind.*Bb00} < %t.ll
+ *)
+ let bb04 = append_block context "Bb04" fn in
+ let b = builder_at_end context bb04 in
+ ignore (build_invoke fn [| p1; p2 |] bb04 bb00 "Inst02" b)
+ end;
+
+ group "unwind"; begin
+ (* RUN: grep {unwind} < %t.ll
+ *)
+ let bb05 = append_block context "Bb05" fn in
+ let b = builder_at_end context bb05 in
+ ignore (build_unwind b)
+ end;
+
+ group "unreachable"; begin
+ (* RUN: grep {unreachable} < %t.ll
+ *)
+ let bb06 = append_block context "Bb06" fn in
+ let b = builder_at_end context bb06 in
+ ignore (build_unreachable b)
+ end;
+
+ group "arithmetic"; begin
+ let bb07 = append_block context "Bb07" fn in
+ let b = builder_at_end context bb07 in
+
+ (* RUN: grep {Inst03.*add.*P1.*P2} < %t.ll
+ * RUN: grep {Inst04.*sub.*P1.*Inst03} < %t.ll
+ * RUN: grep {Inst05.*mul.*P1.*Inst04} < %t.ll
+ * RUN: grep {Inst06.*udiv.*P1.*Inst05} < %t.ll
+ * RUN: grep {Inst07.*sdiv.*P1.*Inst06} < %t.ll
+ * RUN: grep {Inst08.*fdiv.*F1.*F2} < %t.ll
+ * RUN: grep {Inst09.*urem.*P1.*Inst07} < %t.ll
+ * RUN: grep {Inst10.*srem.*P1.*Inst09} < %t.ll
+ * RUN: grep {Inst11.*frem.*F1.*Inst08} < %t.ll
+ * RUN: grep {Inst12.*shl.*P1.*Inst10} < %t.ll
+ * RUN: grep {Inst13.*lshr.*P1.*Inst12} < %t.ll
+ * RUN: grep {Inst14.*ashr.*P1.*Inst13} < %t.ll
+ * RUN: grep {Inst15.*and.*P1.*Inst14} < %t.ll
+ * RUN: grep {Inst16.*or.*P1.*Inst15} < %t.ll
+ * RUN: grep {Inst17.*xor.*P1.*Inst16} < %t.ll
+ * RUN: grep {Inst18.*sub.*0.*Inst17} < %t.ll
+ * RUN: grep {Inst19.*xor.*Inst18.*-1} < %t.ll
+ *)
+ let inst03 = build_add p1 p2 "Inst03" b in
+ let inst04 = build_sub p1 inst03 "Inst04" b in
+ let inst05 = build_mul p1 inst04 "Inst05" b in
+ let inst06 = build_udiv p1 inst05 "Inst06" b in
+ let inst07 = build_sdiv p1 inst06 "Inst07" b in
+ let inst08 = build_fdiv f1 f2 "Inst08" b in
+ let inst09 = build_urem p1 inst07 "Inst09" b in
+ let inst10 = build_srem p1 inst09 "Inst10" b in
+ ignore(build_frem f1 inst08 "Inst11" b);
+ let inst12 = build_shl p1 inst10 "Inst12" b in
+ let inst13 = build_lshr p1 inst12 "Inst13" b in
+ let inst14 = build_ashr p1 inst13 "Inst14" b in
+ let inst15 = build_and p1 inst14 "Inst15" b in
+ let inst16 = build_or p1 inst15 "Inst16" b in
+ let inst17 = build_xor p1 inst16 "Inst17" b in
+ let inst18 = build_neg inst17 "Inst18" b in
+ ignore (build_not inst18 "Inst19" b);
+ ignore (build_unreachable b)
+ end;
+
+ group "memory"; begin
+ let bb08 = append_block context "Bb08" fn in
+ let b = builder_at_end context bb08 in
+
+ (* RUN: grep {Inst20.*malloc} < %t.ll
+ * RUN: grep {Inst21.*malloc} < %t.ll
+ * RUN: grep {Inst22.*alloca.*i32 } < %t.ll
+ * RUN: grep {Inst23.*alloca.*i32.*P2} < %t.ll
+ * RUN: grep {free.*Inst20} < %t.ll
+ * RUN: grep {Inst25.*load.*Inst21} < %t.ll
+ * RUN: grep {store.*P2.*Inst22} < %t.ll
+ * RUN: grep {Inst27.*getelementptr.*Inst23.*P2} < %t.ll
+ *)
+ let inst20 = build_malloc i8_type "Inst20" b in
+ let inst21 = build_array_malloc i8_type p1 "Inst21" b in
+ let inst22 = build_alloca i32_type "Inst22" b in
+ let inst23 = build_array_alloca i32_type p2 "Inst23" b in
+ ignore(build_free inst20 b);
+ ignore(build_load inst21 "Inst25" b);
+ ignore(build_store p2 inst22 b);
+ ignore(build_gep inst23 [| p2 |] "Inst27" b);
+ ignore(build_unreachable b)
+ end;
+
+ group "casts"; begin
+ let void_ptr = pointer_type i8_type in
+
+ (* RUN: grep {Inst28.*trunc.*P1.*i8} < %t.ll
+ * RUN: grep {Inst29.*zext.*Inst28.*i32} < %t.ll
+ * RUN: grep {Inst30.*sext.*Inst29.*i64} < %t.ll
+ * RUN: grep {Inst31.*uitofp.*Inst30.*float} < %t.ll
+ * RUN: grep {Inst32.*sitofp.*Inst29.*double} < %t.ll
+ * RUN: grep {Inst33.*fptoui.*Inst31.*i32} < %t.ll
+ * RUN: grep {Inst34.*fptosi.*Inst32.*i64} < %t.ll
+ * RUN: grep {Inst35.*fptrunc.*Inst32.*float} < %t.ll
+ * RUN: grep {Inst36.*fpext.*Inst35.*double} < %t.ll
+ * RUN: grep {Inst37.*inttoptr.*P1.*i8\*} < %t.ll
+ * RUN: grep {Inst38.*ptrtoint.*Inst37.*i64} < %t.ll
+ * RUN: grep {Inst39.*bitcast.*Inst38.*double} < %t.ll
+ *)
+ let inst28 = build_trunc p1 i8_type "Inst28" atentry in
+ let inst29 = build_zext inst28 i32_type "Inst29" atentry in
+ let inst30 = build_sext inst29 i64_type "Inst30" atentry in
+ let inst31 = build_uitofp inst30 float_type "Inst31" atentry in
+ let inst32 = build_sitofp inst29 double_type "Inst32" atentry in
+ ignore(build_fptoui inst31 i32_type "Inst33" atentry);
+ ignore(build_fptosi inst32 i64_type "Inst34" atentry);
+ let inst35 = build_fptrunc inst32 float_type "Inst35" atentry in
+ ignore(build_fpext inst35 double_type "Inst36" atentry);
+ let inst37 = build_inttoptr p1 void_ptr "Inst37" atentry in
+ let inst38 = build_ptrtoint inst37 i64_type "Inst38" atentry in
+ ignore(build_bitcast inst38 double_type "Inst39" atentry)
+ end;
+
+ group "comparisons"; begin
+ (* RUN: grep {Inst40.*icmp.*ne.*P1.*P2} < %t.ll
+ * RUN: grep {Inst41.*icmp.*sle.*P2.*P1} < %t.ll
+ * RUN: grep {Inst42.*fcmp.*false.*F1.*F2} < %t.ll
+ * RUN: grep {Inst43.*fcmp.*true.*F2.*F1} < %t.ll
+ *)
+ ignore (build_icmp Icmp.Ne p1 p2 "Inst40" atentry);
+ ignore (build_icmp Icmp.Sle p2 p1 "Inst41" atentry);
+ ignore (build_fcmp Fcmp.False f1 f2 "Inst42" atentry);
+ ignore (build_fcmp Fcmp.True f2 f1 "Inst43" atentry)
+ end;
+
+ group "miscellaneous"; begin
+ (* RUN: grep {CallInst.*call.*P2.*P1} < %t.ll
+ * RUN: grep {CallInst.*cc63} < %t.ll
+ * RUN: grep {Inst47.*select.*Inst46.*P1.*P2} < %t.ll
+ * RUN: grep {Inst48.*va_arg.*null.*i32} < %t.ll
+ * RUN: grep {Inst49.*extractelement.*Vec1.*P2} < %t.ll
+ * RUN: grep {Inst50.*insertelement.*Vec1.*P1.*P2} < %t.ll
+ * RUN: grep {Inst51.*shufflevector.*Vec1.*Vec2.*1.*1.*0.*0} < %t.ll
+ * RUN: grep {CallInst.*tail call} < %t.ll
+ *)
+ let ci = build_call fn [| p2; p1 |] "CallInst" atentry in
+ insist (CallConv.c = instruction_call_conv ci);
+ set_instruction_call_conv 63 ci;
+ insist (63 = instruction_call_conv ci);
+ insist (not (is_tail_call ci));
+ set_tail_call true ci;
+ insist (is_tail_call ci);
+ add_instruction_param_attr ci 1 Attribute.Sext;
+ add_instruction_param_attr ci 2 Attribute.Noalias;
+ remove_instruction_param_attr ci 2 Attribute.Noalias;
+
+ let inst46 = build_icmp Icmp.Eq p1 p2 "Inst46" atentry in
+ ignore (build_select inst46 p1 p2 "Inst47" atentry);
+ ignore (build_va_arg
+ (const_null (pointer_type (pointer_type i8_type)))
+ i32_type "Inst48" atentry);
+
+ (* Set up some vector vregs. *)
+ let one = const_int i32_type 1 in
+ let zero = const_int i32_type 0 in
+ let t1 = const_vector [| one; zero; one; zero |] in
+ let t2 = const_vector [| zero; one; zero; one |] in
+ let t3 = const_vector [| one; one; zero; zero |] in
+ let vec1 = build_insertelement t1 p1 p2 "Vec1" atentry in
+ let vec2 = build_insertelement t2 p1 p2 "Vec2" atentry in
+
+ ignore (build_extractelement vec1 p2 "Inst49" atentry);
+ ignore (build_insertelement vec1 p1 p2 "Inst50" atentry);
+ ignore (build_shufflevector vec1 vec2 t3 "Inst51" atentry);
+ end;
+
+ group "phi"; begin
+ (* RUN: grep {PhiNode.*P1.*PhiBlock1.*P2.*PhiBlock2} < %t.ll
+ *)
+ let b1 = append_block context "PhiBlock1" fn in
+ let b2 = append_block context "PhiBlock2" fn in
+
+ let jb = append_block context "PhiJoinBlock" fn in
+ ignore (build_br jb (builder_at_end context b1));
+ ignore (build_br jb (builder_at_end context b2));
+ let at_jb = builder_at_end context jb in
+
+ let phi = build_phi [(p1, b1)] "PhiNode" at_jb in
+ insist ([(p1, b1)] = incoming phi);
+
+ add_incoming (p2, b2) phi;
+ insist ([(p1, b1); (p2, b2)] = incoming phi);
+
+ ignore (build_unreachable at_jb);
+ end
+
+
+(*===-- Module Provider ---------------------------------------------------===*)
+
+let test_module_provider () =
+ let m = create_module context "test" in
+ let mp = ModuleProvider.create m in
+ ModuleProvider.dispose mp
+
+
+(*===-- Pass Managers -----------------------------------------------------===*)
+
+let test_pass_manager () =
+ let (++) x f = ignore (f x); x in
+
+ begin group "module pass manager";
+ ignore (PassManager.create ()
+ ++ PassManager.run_module m
+ ++ PassManager.dispose)
+ end;
+
+ begin group "function pass manager";
+ let fty = function_type void_type [| |] in
+ let fn = define_function "FunctionPassManager" fty m in
+ ignore (build_ret_void (builder_at_end context (entry_block fn)));
+
+ ignore (PassManager.create_function mp
+ ++ PassManager.initialize
+ ++ PassManager.run_function fn
+ ++ PassManager.finalize
+ ++ PassManager.dispose)
+ end
+
+
+(*===-- Writer ------------------------------------------------------------===*)
+
+let test_writer () =
+ group "valid";
+ insist (match Llvm_analysis.verify_module m with
+ | None -> true
+ | Some msg -> prerr_string msg; false);
+
+ group "writer";
+ insist (write_bitcode_file m filename);
+
+ ModuleProvider.dispose mp
+
+
+(*===-- Driver ------------------------------------------------------------===*)
+
+let _ =
+ suite "target" test_target;
+ suite "types" test_types;
+ suite "constants" test_constants;
+ suite "global values" test_global_values;
+ suite "global variables" test_global_variables;
+ suite "functions" test_functions;
+ suite "params" test_params;
+ suite "basic blocks" test_basic_blocks;
+ suite "instructions" test_instructions;
+ suite "builder" test_builder;
+ suite "module provider" test_module_provider;
+ suite "pass manager" test_pass_manager;
+ suite "writer" test_writer; (* Keep this last; it disposes m. *)
+ exit !exit_status
diff --git a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
new file mode 100644
index 0000000..6df8711
--- /dev/null
+++ b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
@@ -0,0 +1,10 @@
+; This test ensures that we get a bitcast constant expression in and out,
+; not a sitofp constant expression.
+; RUN: llvm-as < %s | llvm-dis | \
+; RUN: grep {bitcast (}
+
+@G = external global i32
+
+define float @tryit(i32 %A) {
+ ret float bitcast( i32 ptrtoint (i32* @G to i32) to float)
+}
diff --git a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
new file mode 100644
index 0000000..415f88e
--- /dev/null
+++ b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llvm-dis -disable-output
+; PR4373
+
+@foo = weak global { i32 } zeroinitializer
+@bar = weak global i32 0
+
+define void @test() {
+entry:
+ store { i32 } zeroinitializer, { i32 }* @foo
+ store i32 1, i32* @bar
+ ret void
+}
diff --git a/test/Bitcode/AutoUpgradeIntrinsics.ll b/test/Bitcode/AutoUpgradeIntrinsics.ll
new file mode 100644
index 0000000..5f9bcd5
--- /dev/null
+++ b/test/Bitcode/AutoUpgradeIntrinsics.ll
@@ -0,0 +1,10 @@
+; This isn't really an assembly file. It just runs test on bitcode to ensure
+; it is auto-upgraded.
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.ct}
+; RUN: llvm-dis < %s.bc | \
+; RUN: not grep {llvm\\.part\\.set\\.i\[0-9\]*\\.i\[0-9\]*\\.i\[0-9\]*}
+; RUN: llvm-dis < %s.bc | \
+; RUN: not grep {llvm\\.part\\.select\\.i\[0-9\]*\\.i\[0-9\]*}
+; RUN: llvm-dis < %s.bc | \
+; RUN: not grep {llvm\\.bswap\\.i\[0-9\]*\\.i\[0-9\]*}
+
diff --git a/test/Bitcode/AutoUpgradeIntrinsics.ll.bc b/test/Bitcode/AutoUpgradeIntrinsics.ll.bc
new file mode 100644
index 0000000..9de756b
--- /dev/null
+++ b/test/Bitcode/AutoUpgradeIntrinsics.ll.bc
Binary files differ
diff --git a/test/Bitcode/dg.exp b/test/Bitcode/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Bitcode/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Bitcode/extractelement.ll b/test/Bitcode/extractelement.ll
new file mode 100644
index 0000000..d88f811
--- /dev/null
+++ b/test/Bitcode/extractelement.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -constprop | llvm-dis
+; PR3465
+
+define double @test() {
+ %tmp24 = extractelement <2 x double> bitcast (<1 x i128> < i128 85070591730234615870450834276742070272 > to <2 x double>), i32 0
+ ret double %tmp24
+}
+
diff --git a/test/Bitcode/flags.ll b/test/Bitcode/flags.ll
new file mode 100644
index 0000000..7b0c5b5
--- /dev/null
+++ b/test/Bitcode/flags.ll
@@ -0,0 +1,27 @@
+; RUN: llvm-as < %s | llvm-dis > %t0
+; RUN: opt -S < %s > %t1
+; RUN: diff %t0 %t1
+; PR6140
+
+; Make sure the flags are serialized/deserialized properly for both
+; forward and backward references.
+
+define void @foo() nounwind {
+entry:
+ br label %first
+
+second: ; preds = %first
+ %u = add nuw i32 %a, 0 ; <i32> [#uses=0]
+ %s = add nsw i32 %a, 0 ; <i32> [#uses=0]
+ %us = add nuw nsw i32 %a, 0 ; <i32> [#uses=0]
+ %z = add i32 %a, 0 ; <i32> [#uses=0]
+ unreachable
+
+first: ; preds = %entry
+ %a = bitcast i32 0 to i32 ; <i32> [#uses=8]
+ %uu = add nuw i32 %a, 0 ; <i32> [#uses=0]
+ %ss = add nsw i32 %a, 0 ; <i32> [#uses=0]
+ %uuss = add nuw nsw i32 %a, 0 ; <i32> [#uses=0]
+ %zz = add i32 %a, 0 ; <i32> [#uses=0]
+ br label %second
+}
diff --git a/test/Bitcode/memcpy.ll b/test/Bitcode/memcpy.ll
new file mode 100644
index 0000000..85b95fe
--- /dev/null
+++ b/test/Bitcode/memcpy.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as %s -o /dev/null
+
+define void @test(i32* %P, i32* %Q) {
+entry:
+ %tmp.1 = bitcast i32* %P to i8* ; <i8*> [#uses=3]
+ %tmp.3 = bitcast i32* %Q to i8* ; <i8*> [#uses=4]
+ tail call void @llvm.memcpy.i32( i8* %tmp.1, i8* %tmp.3, i32 100000, i32 1 )
+ tail call void @llvm.memcpy.i64( i8* %tmp.1, i8* %tmp.3, i64 100000, i32 1 )
+ tail call void @llvm.memset.i32( i8* %tmp.3, i8 14, i32 10000, i32 0 )
+ tail call void @llvm.memmove.i32( i8* %tmp.1, i8* %tmp.3, i32 123124, i32 1 )
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32)
+
diff --git a/test/Bitcode/metadata-2.ll b/test/Bitcode/metadata-2.ll
new file mode 100644
index 0000000..1a59ce6
--- /dev/null
+++ b/test/Bitcode/metadata-2.ll
@@ -0,0 +1,87 @@
+; RUN: llvm-as < %s | llvm-dis -o /dev/null
+ type { %object.ModuleInfo.__vtbl*, i8*, %"byte[]", %1, %"ClassInfo[]", i32, void ()*, void ()*, void ()*, i8*, void ()* } ; type %0
+ type { i64, %object.ModuleInfo* } ; type %1
+ type { i32, void ()* } ; type %2
+ %"ClassInfo[]" = type { i64, %object.ClassInfo** }
+ %"Interface[]" = type { i64, %object.Interface* }
+ %"ModuleInfo[]" = type { i64, %object.ModuleInfo** }
+ %ModuleReference = type { %ModuleReference*, %object.ModuleInfo* }
+ %"OffsetTypeInfo[]" = type { i64, %object.OffsetTypeInfo* }
+ %"byte[]" = type { i64, i8* }
+ %object.ClassInfo = type { %object.ClassInfo.__vtbl*, i8*, %"byte[]", %"byte[]", %"void*[]", %"Interface[]", %object.ClassInfo*, i8*, i8*, i32, i8*, %"OffsetTypeInfo[]", i8*, %object.TypeInfo* }
+ %object.ClassInfo.__vtbl = type { %object.ClassInfo*, %"byte[]" (%object.Object*)*, i64 (%object.Object*)*, i32 (%object.Object*, %object.Object*)*, i32 (%object.Object*, %object.Object*)*, %object.Object* (%object.ClassInfo*)* }
+ %object.Interface = type { %object.ClassInfo*, %"void*[]", i64 }
+ %object.ModuleInfo = type { %object.ModuleInfo.__vtbl*, i8*, %"byte[]", %"ModuleInfo[]", %"ClassInfo[]", i32, void ()*, void ()*, void ()*, i8*, void ()* }
+ %object.ModuleInfo.__vtbl = type { %object.ClassInfo*, %"byte[]" (%object.Object*)*, i64 (%object.Object*)*, i32 (%object.Object*, %object.Object*)*, i32 (%object.Object*, %object.Object*)* }
+ %object.Object = type { %object.ModuleInfo.__vtbl*, i8* }
+ %object.OffsetTypeInfo = type { i64, %object.TypeInfo* }
+ %object.TypeInfo = type { %object.TypeInfo.__vtbl*, i8* }
+ %object.TypeInfo.__vtbl = type { %object.ClassInfo*, %"byte[]" (%object.Object*)*, i64 (%object.Object*)*, i32 (%object.Object*, %object.Object*)*, i32 (%object.Object*, %object.Object*)*, i64 (%object.TypeInfo*, i8*)*, i32 (%object.TypeInfo*, i8*, i8*)*, i32 (%object.TypeInfo*, i8*, i8*)*, i64 (%object.TypeInfo*)*, void (%object.TypeInfo*, i8*, i8*)*, %object.TypeInfo* (%object.TypeInfo*)*, %"byte[]" (%object.TypeInfo*)*, i32 (%object.TypeInfo*)*, %"OffsetTypeInfo[]" (%object.TypeInfo*)* }
+ %"void*[]" = type { i64, i8** }
+@_D10ModuleInfo6__vtblZ = external constant %object.ModuleInfo.__vtbl ; <%object.ModuleInfo.__vtbl*> [#uses=1]
[email protected] = internal constant [20 x i8] c"tango.core.BitManip\00" ; <[20 x i8]*> [#uses=1]
+@_D5tango4core8BitManip8__ModuleZ = global %0 { %object.ModuleInfo.__vtbl* @_D10ModuleInfo6__vtblZ, i8* null, %"byte[]" { i64 19, i8* getelementptr ([20 x i8]* @.str, i32 0, i32 0) }, %1 zeroinitializer, %"ClassInfo[]" zeroinitializer, i32 4, void ()* null, void ()* null, void ()* null, i8* null, void ()* null } ; <%0*> [#uses=1]
+@_D5tango4core8BitManip11__moduleRefZ = internal global %ModuleReference { %ModuleReference* null, %object.ModuleInfo* bitcast (%0* @_D5tango4core8BitManip8__ModuleZ to %object.ModuleInfo*) } ; <%ModuleReference*> [#uses=2]
+@_Dmodule_ref = external global %ModuleReference* ; <%ModuleReference**> [#uses=2]
[email protected]_ctors = appending constant [1 x %2] [%2 { i32 65535, void ()* @_D5tango4core8BitManip16__moduleinfoCtorZ }] ; <[1 x %2]*> [#uses=0]
+
+define fastcc i32 @_D5tango4core8BitManip6popcntFkZi(i32 %x_arg) nounwind readnone {
+entry:
+ %tmp1 = lshr i32 %x_arg, 1 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 1431655765 ; <i32> [#uses=1]
+ %tmp4 = sub i32 %x_arg, %tmp2 ; <i32> [#uses=2]
+ %tmp6 = lshr i32 %tmp4, 2 ; <i32> [#uses=1]
+ %tmp7 = and i32 %tmp6, 858993459 ; <i32> [#uses=1]
+ %tmp9 = and i32 %tmp4, 858993459 ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp7, %tmp9 ; <i32> [#uses=2]
+ %tmp12 = lshr i32 %tmp10, 4 ; <i32> [#uses=1]
+ %tmp14 = add i32 %tmp12, %tmp10 ; <i32> [#uses=1]
+ %tmp16 = and i32 %tmp14, 252645135 ; <i32> [#uses=2]
+ %tmp18 = lshr i32 %tmp16, 8 ; <i32> [#uses=1]
+ %tmp20 = add i32 %tmp18, %tmp16 ; <i32> [#uses=1]
+ %tmp22 = and i32 %tmp20, 16711935 ; <i32> [#uses=2]
+ %tmp24 = lshr i32 %tmp22, 16 ; <i32> [#uses=1]
+ %tmp26 = add i32 %tmp24, %tmp22 ; <i32> [#uses=1]
+ %tmp28 = and i32 %tmp26, 65535 ; <i32> [#uses=1]
+ ret i32 %tmp28
+}
+
+define fastcc i32 @_D5tango4core8BitManip7bitswapFkZk(i32 %x_arg) nounwind readnone {
+entry:
+ %tmp1 = lshr i32 %x_arg, 1 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 1431655765 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x_arg, 1 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, -1431655766 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=2]
+ %tmp8 = lshr i32 %tmp6, 2 ; <i32> [#uses=1]
+ %tmp9 = and i32 %tmp8, 858993459 ; <i32> [#uses=1]
+ %tmp11 = shl i32 %tmp6, 2 ; <i32> [#uses=1]
+ %tmp12 = and i32 %tmp11, -858993460 ; <i32> [#uses=1]
+ %tmp13 = or i32 %tmp9, %tmp12 ; <i32> [#uses=2]
+ %tmp15 = lshr i32 %tmp13, 4 ; <i32> [#uses=1]
+ %tmp16 = and i32 %tmp15, 252645135 ; <i32> [#uses=1]
+ %tmp18 = shl i32 %tmp13, 4 ; <i32> [#uses=1]
+ %tmp19 = and i32 %tmp18, -252645136 ; <i32> [#uses=1]
+ %tmp20 = or i32 %tmp16, %tmp19 ; <i32> [#uses=2]
+ %tmp22 = lshr i32 %tmp20, 8 ; <i32> [#uses=1]
+ %tmp23 = and i32 %tmp22, 16711935 ; <i32> [#uses=1]
+ %tmp25 = shl i32 %tmp20, 8 ; <i32> [#uses=1]
+ %tmp26 = and i32 %tmp25, -16711936 ; <i32> [#uses=1]
+ %tmp27 = or i32 %tmp23, %tmp26 ; <i32> [#uses=2]
+ %tmp29 = lshr i32 %tmp27, 16 ; <i32> [#uses=1]
+ %tmp31 = shl i32 %tmp27, 16 ; <i32> [#uses=1]
+ %tmp32 = or i32 %tmp29, %tmp31 ; <i32> [#uses=1]
+ ret i32 %tmp32
+}
+
+define internal void @_D5tango4core8BitManip16__moduleinfoCtorZ() nounwind {
+moduleinfoCtorEntry:
+ %current = load %ModuleReference** @_Dmodule_ref ; <%ModuleReference*> [#uses=1]
+ store %ModuleReference* %current, %ModuleReference** getelementptr (%ModuleReference* @_D5tango4core8BitManip11__moduleRefZ, i32 0, i32 0)
+ store %ModuleReference* @_D5tango4core8BitManip11__moduleRefZ, %ModuleReference** @_Dmodule_ref
+ ret void
+}
+!llvm.ldc.classinfo._D6Object7__ClassZ = !{!0}
+!llvm.ldc.classinfo._D10ModuleInfo7__ClassZ = !{!1}
+!0 = metadata !{%object.Object undef, i1 false, i1 false}
+!1 = metadata !{%object.ModuleInfo undef, i1 false, i1 false}
diff --git a/test/Bitcode/metadata.ll b/test/Bitcode/metadata.ll
new file mode 100644
index 0000000..19db3ea
--- /dev/null
+++ b/test/Bitcode/metadata.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llvm-dis -o /dev/null
+
+!llvm.foo = !{!0}
+!0 = metadata !{i32 42}
[email protected] = internal constant [4 x i8] c"foo\00"
+
diff --git a/test/Bitcode/sse2_loadl_pd.ll b/test/Bitcode/sse2_loadl_pd.ll
new file mode 100644
index 0000000..b0bea16
--- /dev/null
+++ b/test/Bitcode/sse2_loadl_pd.ll
@@ -0,0 +1,2 @@
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.loadl.pd}
+; RUN: llvm-dis < %s.bc | grep shufflevector
diff --git a/test/Bitcode/sse2_loadl_pd.ll.bc b/test/Bitcode/sse2_loadl_pd.ll.bc
new file mode 100644
index 0000000..402cbe1
--- /dev/null
+++ b/test/Bitcode/sse2_loadl_pd.ll.bc
Binary files differ
diff --git a/test/Bitcode/sse2_movl_dq.ll b/test/Bitcode/sse2_movl_dq.ll
new file mode 100644
index 0000000..093d8213
--- /dev/null
+++ b/test/Bitcode/sse2_movl_dq.ll
@@ -0,0 +1,2 @@
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.movl.dq}
+; RUN: llvm-dis < %s.bc | grep shufflevector
diff --git a/test/Bitcode/sse2_movl_dq.ll.bc b/test/Bitcode/sse2_movl_dq.ll.bc
new file mode 100644
index 0000000..74d1826
--- /dev/null
+++ b/test/Bitcode/sse2_movl_dq.ll.bc
Binary files differ
diff --git a/test/Bitcode/sse2_movs_d.ll b/test/Bitcode/sse2_movs_d.ll
new file mode 100644
index 0000000..25a35b6
--- /dev/null
+++ b/test/Bitcode/sse2_movs_d.ll
@@ -0,0 +1,2 @@
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.movs.d}
+; RUN: llvm-dis < %s.bc | grep shufflevector
diff --git a/test/Bitcode/sse2_movs_d.ll.bc b/test/Bitcode/sse2_movs_d.ll.bc
new file mode 100644
index 0000000..719d529
--- /dev/null
+++ b/test/Bitcode/sse2_movs_d.ll.bc
Binary files differ
diff --git a/test/Bitcode/sse2_punpck_qdq.ll b/test/Bitcode/sse2_punpck_qdq.ll
new file mode 100644
index 0000000..b9d711c
--- /dev/null
+++ b/test/Bitcode/sse2_punpck_qdq.ll
@@ -0,0 +1,3 @@
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.punpckh.qdq}
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.punpckl.qdq}
+; RUN: llvm-dis < %s.bc | grep shufflevector
diff --git a/test/Bitcode/sse2_punpck_qdq.ll.bc b/test/Bitcode/sse2_punpck_qdq.ll.bc
new file mode 100644
index 0000000..7c1b7ed
--- /dev/null
+++ b/test/Bitcode/sse2_punpck_qdq.ll.bc
Binary files differ
diff --git a/test/Bitcode/sse2_shuf_pd.ll b/test/Bitcode/sse2_shuf_pd.ll
new file mode 100644
index 0000000..5829edb
--- /dev/null
+++ b/test/Bitcode/sse2_shuf_pd.ll
@@ -0,0 +1,2 @@
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.shuf.pd}
+; RUN: llvm-dis < %s.bc | grep shufflevector
diff --git a/test/Bitcode/sse2_shuf_pd.ll.bc b/test/Bitcode/sse2_shuf_pd.ll.bc
new file mode 100644
index 0000000..832c39e
--- /dev/null
+++ b/test/Bitcode/sse2_shuf_pd.ll.bc
Binary files differ
diff --git a/test/Bitcode/sse2_unpck_pd.ll b/test/Bitcode/sse2_unpck_pd.ll
new file mode 100644
index 0000000..f4e5d54
--- /dev/null
+++ b/test/Bitcode/sse2_unpck_pd.ll
@@ -0,0 +1,3 @@
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.unpckh.pd}
+; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.unpckl.pd}
+; RUN: llvm-dis < %s.bc | grep shufflevector
diff --git a/test/Bitcode/sse2_unpck_pd.ll.bc b/test/Bitcode/sse2_unpck_pd.ll.bc
new file mode 100644
index 0000000..4fb829c
--- /dev/null
+++ b/test/Bitcode/sse2_unpck_pd.ll.bc
Binary files differ
diff --git a/test/BugPoint/crash-narrowfunctiontest.ll b/test/BugPoint/crash-narrowfunctiontest.ll
new file mode 100644
index 0000000..6ad09d2
--- /dev/null
+++ b/test/BugPoint/crash-narrowfunctiontest.ll
@@ -0,0 +1,12 @@
+; Test that bugpoint can narrow down the testcase to the important function
+;
+; RUN: bugpoint %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null
+
+define i32 @foo() { ret i32 1 }
+
+define i32 @test() {
+ call i32 @test()
+ ret i32 %1
+}
+
+define i32 @bar() { ret i32 2 }
diff --git a/test/BugPoint/dg.exp b/test/BugPoint/dg.exp
new file mode 100644
index 0000000..de42dad
--- /dev/null
+++ b/test/BugPoint/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.ll]]
diff --git a/test/BugPoint/remove_arguments_test.ll b/test/BugPoint/remove_arguments_test.ll
new file mode 100644
index 0000000..fb17c78
--- /dev/null
+++ b/test/BugPoint/remove_arguments_test.ll
@@ -0,0 +1,11 @@
+; RUN: bugpoint %s -output-prefix %t -bugpoint-crashcalls -silence-passes
+
+; Test to make sure that arguments are removed from the function if they are
+; unnecessary.
+
+declare i32 @test2()
+
+define i32 @test(i32 %A, i32 %B, float %C) {
+ call i32 @test2()
+ ret i32 %1
+}
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
new file mode 100644
index 0000000..5ad48ef
--- /dev/null
+++ b/test/CMakeLists.txt
@@ -0,0 +1,41 @@
+foreach(c ${LLVM_TARGETS_TO_BUILD})
+ set(TARGETS_BUILT "${TARGETS_BUILT} ${c}")
+endforeach(c)
+set(TARGETS_TO_BUILD ${TARGETS_BUILT})
+
+# FIXME: This won't work for project files, we need to use a --param.
+set(LLVM_LIBS_DIR "${LLVM_BINARY_DIR}/lib/${CMAKE_CFG_INTDIR}")
+set(SHLIBEXT "${LTDL_SHLIB_EXT}")
+
+include(FindPythonInterp)
+if(PYTHONINTERP_FOUND)
+ configure_file(
+ ${CMAKE_CURRENT_SOURCE_DIR}/site.exp.in
+ ${CMAKE_CURRENT_BINARY_DIR}/site.exp)
+
+ MAKE_DIRECTORY(${CMAKE_CURRENT_BINARY_DIR}/Unit)
+
+ add_custom_target(check
+ COMMAND sed -e "s#\@LLVM_SOURCE_DIR\@#${LLVM_MAIN_SRC_DIR}#"
+ -e "s#\@LLVM_BINARY_DIR\@#${LLVM_BINARY_DIR}#"
+ -e "s#\@LLVM_TOOLS_DIR\@#${LLVM_TOOLS_BINARY_DIR}/${CMAKE_CFG_INTDIR}#"
+ -e "s#\@LLVMGCCDIR\@##"
+ ${CMAKE_CURRENT_SOURCE_DIR}/lit.site.cfg.in >
+ ${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg
+ COMMAND sed -e "s#\@LLVM_SOURCE_DIR\@#${LLVM_MAIN_SRC_DIR}#"
+ -e "s#\@LLVM_BINARY_DIR\@#${LLVM_BINARY_DIR}#"
+ -e "s#\@LLVM_TOOLS_DIR\@#${LLVM_TOOLS_BINARY_DIR}/${CMAKE_CFG_INTDIR}#"
+ -e "s#\@LLVMGCCDIR\@##"
+ -e "s#\@LLVM_BUILD_MODE\@#${CMAKE_CFG_INTDIR}#"
+ ${CMAKE_CURRENT_SOURCE_DIR}/Unit/lit.site.cfg.in >
+ ${CMAKE_CURRENT_BINARY_DIR}/Unit/lit.site.cfg
+ COMMAND ${PYTHON_EXECUTABLE}
+ ${LLVM_SOURCE_DIR}/utils/lit/lit.py
+ --param llvm_site_config=${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg
+ --param llvm_unit_site_config=${CMAKE_CURRENT_BINARY_DIR}/Unit/lit.site.cfg
+ -sv
+ ${CMAKE_CURRENT_BINARY_DIR}
+ DEPENDS
+ COMMENT "Running LLVM regression tests")
+
+endif()
diff --git a/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll b/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll
new file mode 100644
index 0000000..a0235f7
--- /dev/null
+++ b/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=arm -mattr=+v6
+
+%struct.layer_data = type { i32, [2048 x i8], i8*, [16 x i8], i32, i8*, i32, i32, [64 x i32], [64 x i32], [64 x i32], [64 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x [64 x i16]] }
+@ld = external global %struct.layer_data* ; <%struct.layer_data**> [#uses=1]
+
+define void @main() {
+entry:
+ br i1 false, label %bb169.i, label %cond_true11
+
+bb169.i: ; preds = %entry
+ ret void
+
+cond_true11: ; preds = %entry
+ %tmp.i32 = load %struct.layer_data** @ld ; <%struct.layer_data*> [#uses=2]
+ %tmp3.i35 = getelementptr %struct.layer_data* %tmp.i32, i32 0, i32 1, i32 2048; <i8*> [#uses=2]
+ %tmp.i36 = getelementptr %struct.layer_data* %tmp.i32, i32 0, i32 2 ; <i8**> [#uses=1]
+ store i8* %tmp3.i35, i8** %tmp.i36
+ store i8* %tmp3.i35, i8** null
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
new file mode 100644
index 0000000..81483cb4
--- /dev/null
+++ b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
@@ -0,0 +1,103 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
+
+@quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
+@dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
+@A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1]
+
+define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) {
+entry:
+ %predicted_block = alloca [4 x [4 x i32]], align 4 ; <[4 x [4 x i32]]*> [#uses=1]
+ br label %cond_next489
+
+cond_next489: ; preds = %cond_false, %bb471
+ %j.7.in = load i8* null ; <i8> [#uses=1]
+ %i.8.in = load i8* null ; <i8> [#uses=1]
+ %i.8 = zext i8 %i.8.in to i32 ; <i32> [#uses=4]
+ %j.7 = zext i8 %j.7.in to i32 ; <i32> [#uses=4]
+ %tmp495 = getelementptr [4 x [4 x i32]]* %predicted_block, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=2]
+ %tmp496 = load i32* %tmp495 ; <i32> [#uses=2]
+ %tmp502 = load i32* null ; <i32> [#uses=1]
+ %tmp542 = getelementptr [6 x [4 x [4 x i32]]]* @quant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp543 = load i32* %tmp542 ; <i32> [#uses=1]
+ %tmp548 = ashr i32 0, 0 ; <i32> [#uses=3]
+ %tmp561 = sub i32 0, %tmp496 ; <i32> [#uses=3]
+ %abscond563 = icmp sgt i32 %tmp561, -1 ; <i1> [#uses=1]
+ %abs564 = select i1 %abscond563, i32 %tmp561, i32 0 ; <i32> [#uses=1]
+ %tmp572 = mul i32 %abs564, %tmp543 ; <i32> [#uses=1]
+ %tmp574 = add i32 %tmp572, 0 ; <i32> [#uses=1]
+ %tmp576 = ashr i32 %tmp574, 0 ; <i32> [#uses=7]
+ %tmp579 = icmp eq i32 %tmp548, %tmp576 ; <i1> [#uses=1]
+ br i1 %tmp579, label %bb712, label %cond_next589
+
+cond_next589: ; preds = %cond_next489
+ %tmp605 = getelementptr [6 x [4 x [4 x i32]]]* @dequant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp606 = load i32* %tmp605 ; <i32> [#uses=1]
+ %tmp612 = load i32* null ; <i32> [#uses=1]
+ %tmp629 = load i32* null ; <i32> [#uses=1]
+ %tmp629a = sitofp i32 %tmp629 to double ; <double> [#uses=1]
+ %tmp631 = fmul double %tmp629a, 0.000000e+00 ; <double> [#uses=1]
+ %tmp632 = fadd double 0.000000e+00, %tmp631 ; <double> [#uses=1]
+ %tmp642 = call fastcc i32 @sign( i32 %tmp576, i32 %tmp561 ) ; <i32> [#uses=1]
+ %tmp650 = mul i32 %tmp606, %tmp642 ; <i32> [#uses=1]
+ %tmp656 = mul i32 %tmp650, %tmp612 ; <i32> [#uses=1]
+ %tmp658 = shl i32 %tmp656, 0 ; <i32> [#uses=1]
+ %tmp659 = ashr i32 %tmp658, 6 ; <i32> [#uses=1]
+ %tmp660 = sub i32 0, %tmp659 ; <i32> [#uses=1]
+ %tmp666 = sub i32 %tmp660, %tmp496 ; <i32> [#uses=1]
+ %tmp667 = sitofp i32 %tmp666 to double ; <double> [#uses=2]
+ call void @levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null )
+ %tmp671 = fmul double %tmp667, %tmp667 ; <double> [#uses=1]
+ %tmp675 = fadd double %tmp671, 0.000000e+00 ; <double> [#uses=1]
+ %tmp678 = fcmp oeq double %tmp632, %tmp675 ; <i1> [#uses=1]
+ br i1 %tmp678, label %cond_true679, label %cond_false693
+
+cond_true679: ; preds = %cond_next589
+ %abscond681 = icmp sgt i32 %tmp548, -1 ; <i1> [#uses=1]
+ %abs682 = select i1 %abscond681, i32 %tmp548, i32 0 ; <i32> [#uses=1]
+ %abscond684 = icmp sgt i32 %tmp576, -1 ; <i1> [#uses=1]
+ %abs685 = select i1 %abscond684, i32 %tmp576, i32 0 ; <i32> [#uses=1]
+ %tmp686 = icmp slt i32 %abs682, %abs685 ; <i1> [#uses=1]
+ br i1 %tmp686, label %cond_next702, label %cond_false689
+
+cond_false689: ; preds = %cond_true679
+ %tmp739 = icmp eq i32 %tmp576, 0 ; <i1> [#uses=1]
+ br i1 %tmp579, label %bb737, label %cond_false708
+
+cond_false693: ; preds = %cond_next589
+ ret i32 0
+
+cond_next702: ; preds = %cond_true679
+ ret i32 0
+
+cond_false708: ; preds = %cond_false689
+ ret i32 0
+
+bb712: ; preds = %cond_next489
+ ret i32 0
+
+bb737: ; preds = %cond_false689
+ br i1 %tmp739, label %cond_next791, label %cond_true740
+
+cond_true740: ; preds = %bb737
+ %tmp761 = call fastcc i32 @sign( i32 %tmp576, i32 0 ) ; <i32> [#uses=1]
+ %tmp780 = load i32* null ; <i32> [#uses=1]
+ %tmp785 = getelementptr [4 x [4 x i32]]* @A, i32 0, i32 %i.8, i32 %j.7 ; <i32*> [#uses=1]
+ %tmp786 = load i32* %tmp785 ; <i32> [#uses=1]
+ %tmp781 = mul i32 %tmp780, %tmp761 ; <i32> [#uses=1]
+ %tmp787 = mul i32 %tmp781, %tmp786 ; <i32> [#uses=1]
+ %tmp789 = shl i32 %tmp787, 0 ; <i32> [#uses=1]
+ %tmp790 = ashr i32 %tmp789, 6 ; <i32> [#uses=1]
+ br label %cond_next791
+
+cond_next791: ; preds = %cond_true740, %bb737
+ %ilev.1 = phi i32 [ %tmp790, %cond_true740 ], [ 0, %bb737 ] ; <i32> [#uses=1]
+ %tmp796 = load i32* %tmp495 ; <i32> [#uses=1]
+ %tmp798 = add i32 %tmp796, %ilev.1 ; <i32> [#uses=1]
+ %tmp812 = mul i32 0, %tmp502 ; <i32> [#uses=0]
+ %tmp818 = call fastcc i32 @sign( i32 0, i32 %tmp798 ) ; <i32> [#uses=0]
+ unreachable
+}
+
+declare i32 @sign(i32, i32)
+
+declare void @levrun_linfo_inter(i32, i32, i32*, i32*)
diff --git a/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll b/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll
new file mode 100644
index 0000000..83b26d3
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+define fastcc i8* @read_sleb128(i8* %p, i32* %val) {
+ br label %bb
+
+bb: ; preds = %bb, %0
+ %p_addr.0 = getelementptr i8* %p, i32 0 ; <i8*> [#uses=1]
+ %tmp2 = load i8* %p_addr.0 ; <i8> [#uses=2]
+ %tmp4.rec = add i32 0, 1 ; <i32> [#uses=1]
+ %tmp4 = getelementptr i8* %p, i32 %tmp4.rec ; <i8*> [#uses=1]
+ %tmp56 = zext i8 %tmp2 to i32 ; <i32> [#uses=1]
+ %tmp7 = and i32 %tmp56, 127 ; <i32> [#uses=1]
+ %tmp9 = shl i32 %tmp7, 0 ; <i32> [#uses=1]
+ %tmp11 = or i32 %tmp9, 0 ; <i32> [#uses=1]
+ icmp slt i8 %tmp2, 0 ; <i1>:1 [#uses=1]
+ br i1 %1, label %bb, label %cond_next28
+
+cond_next28: ; preds = %bb
+ store i32 %tmp11, i32* %val
+ ret i8* %tmp4
+}
diff --git a/test/CodeGen/ARM/2007-03-13-InstrSched.ll b/test/CodeGen/ARM/2007-03-13-InstrSched.ll
new file mode 100644
index 0000000..33f935e
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-13-InstrSched.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6 | grep r9
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats |& grep asm-printer
+; | grep 35
+
+define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
+newFuncRoot:
+ br label %bb74
+
+bb78.exitStub: ; preds = %bb74
+ store i32 %d2.1, i32* %d2.1.out
+ store i32 %d3.1, i32* %d3.1.out
+ store i32 %d0.1, i32* %d0.1.out
+ store i32 %d1.1, i32* %d1.1.out
+ ret void
+
+bb74: ; preds = %bb26, %newFuncRoot
+ %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ] ; <i32> [#uses=3]
+ %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ] ; <i32*> [#uses=1]
+ %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %fm.1 = load i32* %fm.1.in ; <i32> [#uses=4]
+ icmp eq i32 %fp.1.rec, %tmp8 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb78.exitStub, label %bb26
+
+bb26: ; preds = %bb74
+ %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec ; <i32**> [#uses=1]
+ %tmp30 = load i32** %tmp28 ; <i32*> [#uses=4]
+ %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph ; <i32*> [#uses=1]
+ %tmp34 = load i32* %tmp33 ; <i32> [#uses=1]
+ %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224 ; <i32*> [#uses=1]
+ %tmp39 = load i32* %tmp38 ; <i32> [#uses=1]
+ %tmp42 = mul i32 %tmp34, %fm.1 ; <i32> [#uses=1]
+ %tmp44 = add i32 %tmp42, %d0.1 ; <i32> [#uses=1]
+ %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223 ; <i32*> [#uses=1]
+ %tmp49 = load i32* %tmp48 ; <i32> [#uses=1]
+ %tmp52 = mul i32 %tmp39, %fm.1 ; <i32> [#uses=1]
+ %tmp54 = add i32 %tmp52, %d1.1 ; <i32> [#uses=1]
+ %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222 ; <i32*> [#uses=1]
+ %tmp59 = load i32* %tmp58 ; <i32> [#uses=1]
+ %tmp62 = mul i32 %tmp49, %fm.1 ; <i32> [#uses=1]
+ %tmp64 = add i32 %tmp62, %d2.1 ; <i32> [#uses=1]
+ %tmp67 = mul i32 %tmp59, %fm.1 ; <i32> [#uses=1]
+ %tmp69 = add i32 %tmp67, %d3.1 ; <i32> [#uses=1]
+ %tmp71.rec = add i32 %fp.1.rec, 1 ; <i32> [#uses=2]
+ %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec ; <i32*> [#uses=1]
+ br label %bb74
+}
diff --git a/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll b/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll
new file mode 100644
index 0000000..b0953dc
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll
@@ -0,0 +1,96 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
+; PR1257
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+ %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+ %struct.c_arg_info = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i8 }
+ %struct.c_language_function = type { %struct.stmt_tree_s }
+ %struct.c_switch = type opaque
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.ht_identifier = type { i8*, i32, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type { i8 }
+ %struct.language_function = type { %struct.c_language_function, %struct.tree_node*, %struct.tree_node*, %struct.c_switch*, %struct.c_arg_info*, i32, i32, i32, i32 }
+ %struct.location_t = type { i8*, i32 }
+ %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.stmt_tree_s = type { %struct.tree_node*, i32 }
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.u = type { [1 x i64] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_head_tag = type opaque
+ %union.tree_ann_d = type opaque
+
+
+define void @declspecs_add_type(i32 %spec.1) {
+entry:
+ %spec.1961 = zext i32 %spec.1 to i64 ; <i64> [#uses=1]
+ %spec.1961.adj = shl i64 %spec.1961, 32 ; <i64> [#uses=1]
+ %spec.1961.adj.ins = or i64 %spec.1961.adj, 0 ; <i64> [#uses=2]
+ %tmp10959 = lshr i64 %spec.1961.adj.ins, 32 ; <i64> [#uses=2]
+ %tmp1920 = inttoptr i64 %tmp10959 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1]
+ %tmp21 = getelementptr %struct.tree_common* %tmp1920, i32 0, i32 3 ; <i8*> [#uses=1]
+ %tmp2122 = bitcast i8* %tmp21 to i32* ; <i32*> [#uses=1]
+ br i1 false, label %cond_next53, label %cond_true
+
+cond_true: ; preds = %entry
+ ret void
+
+cond_next53: ; preds = %entry
+ br i1 false, label %cond_true63, label %cond_next689
+
+cond_true63: ; preds = %cond_next53
+ ret void
+
+cond_next689: ; preds = %cond_next53
+ br i1 false, label %cond_false841, label %bb743
+
+bb743: ; preds = %cond_next689
+ ret void
+
+cond_false841: ; preds = %cond_next689
+ br i1 false, label %cond_true851, label %cond_true918
+
+cond_true851: ; preds = %cond_false841
+ tail call void @lookup_name( )
+ br i1 false, label %bb866, label %cond_next856
+
+cond_next856: ; preds = %cond_true851
+ ret void
+
+bb866: ; preds = %cond_true851
+ %tmp874 = load i32* %tmp2122 ; <i32> [#uses=1]
+ %tmp876877 = trunc i32 %tmp874 to i8 ; <i8> [#uses=1]
+ icmp eq i8 %tmp876877, 1 ; <i1>:0 [#uses=1]
+ br i1 %0, label %cond_next881, label %cond_true878
+
+cond_true878: ; preds = %bb866
+ unreachable
+
+cond_next881: ; preds = %bb866
+ %tmp884885 = inttoptr i64 %tmp10959 to %struct.tree_identifier* ; <%struct.tree_identifier*> [#uses=1]
+ %tmp887 = getelementptr %struct.tree_identifier* %tmp884885, i32 0, i32 1, i32 0 ; <i8**> [#uses=1]
+ %tmp888 = load i8** %tmp887 ; <i8*> [#uses=1]
+ tail call void (i32, ...)* @error( i32 undef, i8* %tmp888 )
+ ret void
+
+cond_true918: ; preds = %cond_false841
+ %tmp920957 = trunc i64 %spec.1961.adj.ins to i32 ; <i32> [#uses=0]
+ ret void
+}
+
+declare void @error(i32, ...)
+
+declare void @lookup_name()
diff --git a/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll
new file mode 100644
index 0000000..d741112
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll
@@ -0,0 +1,947 @@
+; RUN: llc < %s -march=arm
+; PR1266
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-linux-gnueabi"
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] }
+ %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.addr_diff_vec_flags = type { i8, i8, i8, i8 }
+ %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+ %struct.attribute_spec = type { i8*, i32, i32, i8, i8, i8, %struct.tree_node* (%struct.tree_node**, %struct.tree_node*, %struct.tree_node*, i32, i8*)* }
+ %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 }
+ %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* }
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.cgraph_edge = type { %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.tree_node*, i8*, i8* }
+ %struct.cgraph_global_info = type { %struct.cgraph_node*, i32, i8 }
+ %struct.cgraph_local_info = type { i32, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.cgraph_node = type { %struct.tree_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, i8*, %struct.cgraph_local_info, %struct.cgraph_global_info, %struct.cgraph_rtl_info, i32, i8, i8, i8, i8, i8 }
+ %struct.cgraph_rtl_info = type { i32, i8, i8 }
+ %struct.cl_perfunc_opts = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.cselib_val_struct = type opaque
+ %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] }
+ %struct.def_operand_ptr = type { %struct.tree_node** }
+ %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+ %struct.diagnostic_context = type { %struct.pretty_printer*, [8 x i32], i8, i8, i8, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (i8*, i8**)*, %struct.tree_node*, i32, i32 }
+ %struct.diagnostic_info = type { %struct.text_info, %struct.location_t, i32 }
+ %struct.die_struct = type opaque
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.elt_list = type opaque
+ %struct.elt_t = type { %struct.tree_node*, %struct.tree_node* }
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.ggc_root_tab = type { i8*, i32, i32, void (i8*)*, void (i8*)* }
+ %struct.gimplify_ctx = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.varray_head_tag*, %struct.htab*, i32, i8, i8 }
+ %struct.gimplify_init_ctor_preeval_data = type { %struct.tree_node*, i32 }
+ %struct.ht_identifier = type { i8*, i32, i32 }
+ %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.lang_hooks = type { i8*, i32, i32 (i32)*, i32 (i32, i8**)*, void (%struct.diagnostic_context*)*, i32 (i32, i8*, i32)*, i8 (i8*, i32) zeroext *, i8 (i8**) zeroext *, i8 () zeroext *, void ()*, void ()*, void (i32)*, void ()*, i64 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.rtx_def* (%struct.tree_node*, %struct.rtx_def*, i32, i32, %struct.rtx_def**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i32 (%struct.rtx_def*, %struct.tree_node*)*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zeroext *, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*)*, void (%struct.tree_node*)*, i8 () zeroext *, i8, i8, void ()*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, i8* (%struct.tree_node*, i32)*, i32 (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.diagnostic_context*, i8*)*, %struct.tree_node* (%struct.tree_node*)*, i64 (i64)*, %struct.attribute_spec*, %struct.attribute_spec*, %struct.attribute_spec*, i32 (%struct.tree_node*)*, %struct.lang_hooks_for_functions, %struct.lang_hooks_for_tree_inlining, %struct.lang_hooks_for_callgraph, %struct.lang_hooks_for_tree_dump, %struct.lang_hooks_for_decls, %struct.lang_hooks_for_types, i32 (%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*, i32, i32, i8*, %struct.tree_node*)* }
+ %struct.lang_hooks_for_callgraph = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node*)*, void (%struct.tree_node*)* }
+ %struct.lang_hooks_for_decls = type { i32 ()*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* ()*, i8 (%struct.tree_node*) zeroext *, void ()*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zeroext *, i8* (%struct.tree_node*)* }
+ %struct.lang_hooks_for_functions = type { void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, i8 (%struct.tree_node*) zeroext * }
+ %struct.lang_hooks_for_tree_dump = type { i8 (i8*, %struct.tree_node*) zeroext *, i32 (%struct.tree_node*)* }
+ %struct.lang_hooks_for_tree_inlining = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*)*, i32 (%struct.tree_node**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*)*, i32 (%struct.tree_node*, %struct.tree_node*)*, i32 (%struct.tree_node*)*, i8 (%struct.tree_node*, %struct.tree_node*) zeroext *, i32 (%struct.tree_node*)*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32)* }
+ %struct.lang_hooks_for_types = type { %struct.tree_node* (i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (i32, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*, i8*)*, void (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i8 }
+ %struct.lang_type = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.loop = type opaque
+ %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+ %struct.mem_attrs = type { i64, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32 }
+ %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.output_buffer = type { %struct.obstack, %struct.FILE*, i32, [128 x i8] }
+ %struct.phi_arg_d = type { %struct.tree_node*, i8 }
+ %struct.pointer_set_t = type opaque
+ %struct.pretty_printer = type { %struct.output_buffer*, i8*, i32, i32, i32, i32, i32, i8 (%struct.pretty_printer*, %struct.text_info*) zeroext *, i8, i8 }
+ %struct.ptr_info_def = type { i8, %struct.bitmap_head_def*, %struct.tree_node* }
+ %struct.real_value = type { i8, [3 x i8], [5 x i32] }
+ %struct.reg_attrs = type { %struct.tree_node*, i64 }
+ %struct.reg_info_def = type opaque
+ %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 }
+ %struct.rtunion = type { i32 }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 }
+ %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* }
+ %struct.temp_slot = type opaque
+ %struct.text_info = type { i8*, i8**, i32 }
+ %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* }
+ %struct.tree_ann_d = type { %struct.stmt_ann_d }
+ %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree }
+ %struct.tree_block = type { %struct.tree_common, i8, [3 x i8], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u1_a = type { i32 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_exp = type { %struct.tree_common, %struct.location_t*, i32, %struct.tree_node*, [1 x %struct.tree_node*] }
+ %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
+ %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi }
+ %struct.tree_int_cst_lowhi = type { i64, i64 }
+ %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] }
+ %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* }
+ %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* }
+ %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* }
+ %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* }
+ %struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* }
+ %struct.tree_string = type { %struct.tree_common, i32, [1 x i8] }
+ %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* }
+ %struct.tree_type_symtab = type { i32 }
+ %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 }
+ %struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] }
+ %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* }
+ %struct.u = type { [1 x i64] }
+ %struct.use_operand_ptr = type { %struct.tree_node** }
+ %struct.use_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+ %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* }
+ %struct.v_may_def_optype_d = type { i32, [1 x %struct.elt_t] }
+ %struct.v_must_def_optype_d = type { i32, [1 x %struct.elt_t] }
+ %struct.value_set = type opaque
+ %struct.var_ann_d = type { %struct.tree_ann_common_d, i8, i8, %struct.tree_node*, %struct.varray_head_tag*, i32, i32, i32, %struct.tree_node*, %struct.tree_node* }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_data = type { [1 x i64] }
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+ %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] }
+@gt_pch_rs_gt_gimplify_h = external global [2 x %struct.ggc_root_tab] ; <[2 x %struct.ggc_root_tab]*> [#uses=0]
+@tmp_var_id_num = external global i32 ; <i32*> [#uses=0]
+@gt_ggc_r_gt_gimplify_h = external global [1 x %struct.ggc_root_tab] ; <[1 x %struct.ggc_root_tab]*> [#uses=0]
+@__FUNCTION__.19956 = external global [15 x i8] ; <[15 x i8]*> [#uses=0]
+@str = external global [42 x i8] ; <[42 x i8]*> [#uses=1]
+@__FUNCTION__.19974 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@gimplify_ctxp = external global %struct.gimplify_ctx* ; <%struct.gimplify_ctx**> [#uses=0]
+@cl_pf_opts = external global %struct.cl_perfunc_opts ; <%struct.cl_perfunc_opts*> [#uses=0]
+@__FUNCTION__.20030 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20099 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+@global_trees = external global [47 x %struct.tree_node*] ; <[47 x %struct.tree_node*]*> [#uses=0]
+@tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=2]
+@current_function_decl = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=0]
+@str1 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+@str2 = external global [7 x i8] ; <[7 x i8]*> [#uses=0]
+@__FUNCTION__.20151 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20221 = external global [9 x i8] ; <[9 x i8]*> [#uses=0]
+@tree_code_length = external global [0 x i8] ; <[0 x i8]*> [#uses=0]
+@__FUNCTION__.20435 = external global [17 x i8] ; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.20496 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@cfun = external global %struct.function* ; <%struct.function**> [#uses=0]
+@__FUNCTION__.20194 = external global [15 x i8] ; <[15 x i8]*> [#uses=0]
+@__FUNCTION__.19987 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20532 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20583 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20606 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20644 = external global [17 x i8] ; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.20681 = external global [13 x i8] ; <[13 x i8]*> [#uses=0]
+@__FUNCTION__.20700 = external global [13 x i8] ; <[13 x i8]*> [#uses=0]
+@__FUNCTION__.21426 = external global [20 x i8] ; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.21471 = external global [17 x i8] ; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.21962 = external global [27 x i8] ; <[27 x i8]*> [#uses=0]
+@__FUNCTION__.22992 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.23735 = external global [15 x i8] ; <[15 x i8]*> [#uses=0]
+@lang_hooks = external global %struct.lang_hooks ; <%struct.lang_hooks*> [#uses=0]
+@__FUNCTION__.27383 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20776 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.10672 = external global [9 x i8] ; <[9 x i8]*> [#uses=0]
+@str3 = external global [47 x i8] ; <[47 x i8]*> [#uses=0]
+@str4 = external global [7 x i8] ; <[7 x i8]*> [#uses=0]
+@__FUNCTION__.20065 = external global [25 x i8] ; <[25 x i8]*> [#uses=0]
+@__FUNCTION__.23256 = external global [16 x i8] ; <[16 x i8]*> [#uses=0]
+@__FUNCTION__.23393 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20043 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20729 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.20563 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+@__FUNCTION__.10663 = external global [10 x i8] ; <[10 x i8]*> [#uses=0]
+@__FUNCTION__.20367 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20342 = external global [15 x i8] ; <[15 x i8]*> [#uses=0]
+@input_location = external global %struct.location_t ; <%struct.location_t*> [#uses=0]
+@__FUNCTION__.24510 = external global [27 x i8] ; <[27 x i8]*> [#uses=0]
+@__FUNCTION__.25097 = external global [25 x i8] ; <[25 x i8]*> [#uses=0]
+@__FUNCTION__.24705 = external global [26 x i8] ; <[26 x i8]*> [#uses=0]
+@str5 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+@__FUNCTION__.25136 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.24450 = external global [31 x i8] ; <[31 x i8]*> [#uses=0]
+@implicit_built_in_decls = external global [471 x %struct.tree_node*] ; <[471 x %struct.tree_node*]*> [#uses=0]
+@__FUNCTION__.24398 = external global [31 x i8] ; <[31 x i8]*> [#uses=0]
+@__FUNCTION__.26156 = external global [14 x i8] ; <[14 x i8]*> [#uses=1]
+@unknown_location = external global %struct.location_t ; <%struct.location_t*> [#uses=0]
+@__FUNCTION__.23038 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@str6 = external global [43 x i8] ; <[43 x i8]*> [#uses=0]
+@__FUNCTION__.25476 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.22136 = external global [20 x i8] ; <[20 x i8]*> [#uses=1]
+@__FUNCTION__.21997 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.21247 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@built_in_decls = external global [471 x %struct.tree_node*] ; <[471 x %struct.tree_node*]*> [#uses=0]
+@__FUNCTION__.21924 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.21861 = external global [25 x i8] ; <[25 x i8]*> [#uses=0]
+@global_dc = external global %struct.diagnostic_context* ; <%struct.diagnostic_context**> [#uses=0]
+@__FUNCTION__.25246 = external global [32 x i8] ; <[32 x i8]*> [#uses=0]
+@str7 = external global [4 x i8] ; <[4 x i8]*> [#uses=0]
+@stderr = external global %struct.FILE* ; <%struct.FILE**> [#uses=0]
+@str8 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+@str9 = external global [22 x i8] ; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.27653 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.27322 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.27139 = external global [20 x i8] ; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.22462 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@str10 = external global [6 x i8] ; <[6 x i8]*> [#uses=0]
+@__FUNCTION__.25389 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.25650 = external global [18 x i8] ; <[18 x i8]*> [#uses=0]
+@str11 = external global [32 x i8] ; <[32 x i8]*> [#uses=0]
+@str12 = external global [3 x i8] ; <[3 x i8]*> [#uses=0]
+@str13 = external global [44 x i8] ; <[44 x i8]*> [#uses=0]
+@__FUNCTION__.27444 = external global [14 x i8] ; <[14 x i8]*> [#uses=0]
+@timevar_enable = external global i8 ; <i8*> [#uses=0]
+@__FUNCTION__.27533 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@flag_instrument_function_entry_exit = external global i32 ; <i32*> [#uses=0]
+@__FUNCTION__.25331 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.20965 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@str14 = external global [12 x i8] ; <[12 x i8]*> [#uses=0]
+@__FUNCTION__.26053 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.26004 = external global [20 x i8] ; <[20 x i8]*> [#uses=0]
+@str15 = external global [8 x i8] ; <[8 x i8]*> [#uses=0]
+@__FUNCTION__.21584 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+@str16 = external global [12 x i8] ; <[12 x i8]*> [#uses=0]
+@__FUNCTION__.25903 = external global [28 x i8] ; <[28 x i8]*> [#uses=0]
+@__FUNCTION__.22930 = external global [23 x i8] ; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.23832 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@str17 = external global [6 x i8] ; <[6 x i8]*> [#uses=0]
+@__FUNCTION__.24620 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+@__FUNCTION__.24582 = external global [30 x i8] ; <[30 x i8]*> [#uses=0]
+@__FUNCTION__.21382 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.21117 = external global [21 x i8] ; <[21 x i8]*> [#uses=0]
+
+
+declare void @push_gimplify_context()
+
+declare i32 @gimple_tree_hash(i8*)
+
+declare i32 @iterative_hash_expr(%struct.tree_node*, i32)
+
+declare i32 @gimple_tree_eq(i8*, i8*)
+
+declare i32 @operand_equal_p(%struct.tree_node*, %struct.tree_node*, i32)
+
+declare void @fancy_abort(i8*, i32, i8*)
+
+declare i8* @xcalloc(i32, i32)
+
+declare %struct.htab* @htab_create(i32, i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*)
+
+declare void @free(i8*)
+
+declare void @gimple_push_bind_expr(%struct.tree_node*)
+
+declare void @gimple_pop_bind_expr()
+
+declare %struct.tree_node* @gimple_current_bind_expr()
+
+declare fastcc void @gimple_push_condition()
+
+declare %struct.tree_node* @create_artificial_label()
+
+declare %struct.tree_node* @build_decl_stat(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare void @tree_class_check_failed(%struct.tree_node*, i32, i8*, i32, i8*)
+
+declare %struct.tree_node* @create_tmp_var_name(i8*)
+
+declare i32 @strlen(i8*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i32 @sprintf(i8*, i8*, ...)
+
+declare %struct.tree_node* @get_identifier(i8*)
+
+declare %struct.tree_node* @create_tmp_var_raw(%struct.tree_node*, i8*)
+
+declare %struct.tree_node* @build_qualified_type(%struct.tree_node*, i32)
+
+declare i8* @get_name(%struct.tree_node*)
+
+declare void @tree_operand_check_failed(i32, i32, i8*, i32, i8*)
+
+declare void @tree_check_failed(%struct.tree_node*, i8*, i32, i8*, ...)
+
+declare void @declare_tmp_vars(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @nreverse(%struct.tree_node*)
+
+declare void @gimple_add_tmp_var(%struct.tree_node*)
+
+declare void @record_vars(%struct.tree_node*)
+
+declare %struct.tree_node* @create_tmp_var(%struct.tree_node*, i8*)
+
+declare void @pop_gimplify_context(%struct.tree_node*)
+
+declare void @htab_delete(%struct.htab*)
+
+declare fastcc void @annotate_one_with_locus(%struct.tree_node*, i32, i32)
+
+declare void @annotate_with_locus(%struct.tree_node*, i32, i32)
+
+declare %struct.tree_node* @mostly_copy_tree_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @copy_tree_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @mark_decls_volatile_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @copy_if_shared_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @walk_tree(%struct.tree_node**, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*)
+
+declare %struct.tree_node* @unmark_visited_r(%struct.tree_node**, i32*, i8*)
+
+declare fastcc void @unshare_body(%struct.tree_node**, %struct.tree_node*)
+
+declare %struct.cgraph_node* @cgraph_node(%struct.tree_node*)
+
+declare fastcc void @unvisit_body(%struct.tree_node**, %struct.tree_node*)
+
+declare void @unshare_all_trees(%struct.tree_node*)
+
+declare %struct.tree_node* @unshare_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @build_and_jump(%struct.tree_node**)
+
+declare %struct.tree_node* @build1_stat(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare i32 @compare_case_labels(i8*, i8*)
+
+declare i32 @tree_int_cst_compare(%struct.tree_node*, %struct.tree_node*)
+
+declare void @sort_case_labels(%struct.tree_node*)
+
+declare void @tree_vec_elt_check_failed(i32, i32, i8*, i32, i8*)
+
+declare void @qsort(i8*, i32, i32, i32 (i8*, i8*)*)
+
+declare %struct.tree_node* @force_labels_r(%struct.tree_node**, i32*, i8*)
+
+declare fastcc void @canonicalize_component_ref(%struct.tree_node**)
+
+declare %struct.tree_node* @get_unwidened(%struct.tree_node*, %struct.tree_node*)
+
+declare fastcc void @maybe_with_size_expr(%struct.tree_node**)
+
+declare %struct.tree_node* @substitute_placeholder_in_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build2_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare fastcc %struct.tree_node* @gimple_boolify(%struct.tree_node*)
+
+declare %struct.tree_node* @convert(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @gimplify_init_ctor_preeval_1(%struct.tree_node**, i32*, i8*)
+
+declare i64 @get_alias_set(%struct.tree_node*)
+
+declare i32 @alias_sets_conflict_p(i64, i64)
+
+declare fastcc i8 @cpt_same_type(%struct.tree_node*, %struct.tree_node*) zeroext
+
+declare %struct.tree_node* @check_pointer_types_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @voidify_wrapper_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @integer_zerop(%struct.tree_node*)
+
+declare fastcc void @append_to_statement_list_1(%struct.tree_node*, %struct.tree_node**)
+
+declare %struct.tree_node* @alloc_stmt_list()
+
+declare void @tsi_link_after(%struct.tree_stmt_iterator*, %struct.tree_node*, i32)
+
+declare void @append_to_statement_list_force(%struct.tree_node*, %struct.tree_node**)
+
+declare void @append_to_statement_list(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc %struct.tree_node* @shortcut_cond_r(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @build3_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare fastcc %struct.tree_node* @shortcut_cond_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @expr_last(%struct.tree_node*)
+
+declare i8 @block_may_fallthru(%struct.tree_node*) zeroext
+
+declare fastcc void @gimple_pop_condition(%struct.tree_node**)
+
+declare %struct.tree_node* @gimple_build_eh_filter(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare void @annotate_all_with_locus(%struct.tree_node**, i32, i32)
+
+declare fastcc %struct.tree_node* @internal_get_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+define i32 @gimplify_expr(%struct.tree_node** %expr_p, %struct.tree_node** %pre_p, %struct.tree_node** %post_p, i8 (%struct.tree_node*) zeroext * %gimple_test_f, i32 %fallback) {
+entry:
+ %internal_post = alloca %struct.tree_node*, align 4 ; <%struct.tree_node**> [#uses=2]
+ %pre_p_addr.0 = select i1 false, %struct.tree_node** null, %struct.tree_node** %pre_p ; <%struct.tree_node**> [#uses=7]
+ %post_p_addr.0 = select i1 false, %struct.tree_node** %internal_post, %struct.tree_node** %post_p ; <%struct.tree_node**> [#uses=7]
+ br i1 false, label %bb277, label %bb191
+
+bb191: ; preds = %entry
+ ret i32 0
+
+bb277: ; preds = %entry
+ %tmp283 = call i32 null( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 ) ; <i32> [#uses=1]
+ switch i32 %tmp283, label %bb7478 [
+ i32 0, label %cond_next289
+ i32 -1, label %cond_next298
+ ]
+
+cond_next289: ; preds = %bb277
+ ret i32 0
+
+cond_next298: ; preds = %bb277
+ switch i32 0, label %bb7444 [
+ i32 24, label %bb7463
+ i32 25, label %bb7463
+ i32 26, label %bb7463
+ i32 27, label %bb7463
+ i32 28, label %bb7463
+ i32 33, label %bb4503
+ i32 39, label %bb397
+ i32 40, label %bb5650
+ i32 41, label %bb4339
+ i32 42, label %bb4350
+ i32 43, label %bb4350
+ i32 44, label %bb319
+ i32 45, label %bb397
+ i32 46, label %bb6124
+ i32 47, label %bb7463
+ i32 49, label %bb5524
+ i32 50, label %bb1283
+ i32 51, label %bb1289
+ i32 52, label %bb1289
+ i32 53, label %bb5969
+ i32 54, label %bb408
+ i32 56, label %bb5079
+ i32 57, label %bb428
+ i32 59, label %bb5965
+ i32 74, label %bb4275
+ i32 75, label %bb4275
+ i32 76, label %bb4275
+ i32 77, label %bb4275
+ i32 91, label %bb1296
+ i32 92, label %bb1296
+ i32 96, label %bb1322
+ i32 112, label %bb2548
+ i32 113, label %bb2548
+ i32 115, label %bb397
+ i32 116, label %bb5645
+ i32 117, label %bb1504
+ i32 121, label %bb397
+ i32 122, label %bb397
+ i32 123, label %bb313
+ i32 124, label %bb313
+ i32 125, label %bb313
+ i32 126, label %bb313
+ i32 127, label %bb2141
+ i32 128, label %cond_next5873
+ i32 129, label %cond_next5873
+ i32 130, label %bb4536
+ i32 131, label %bb5300
+ i32 132, label %bb5170
+ i32 133, label %bb5519
+ i32 134, label %bb5091
+ i32 135, label %bb5083
+ i32 136, label %bb5087
+ i32 137, label %bb5382
+ i32 139, label %bb7463
+ i32 140, label %bb7463
+ i32 142, label %bb5974
+ i32 143, label %bb6049
+ i32 147, label %bb6296
+ i32 151, label %cond_next6474
+ ]
+
+bb313: ; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298
+ ret i32 0
+
+bb319: ; preds = %cond_next298
+ ret i32 0
+
+bb397: ; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+ ret i32 0
+
+bb408: ; preds = %cond_next298
+ %tmp413 = call fastcc i32 @gimplify_cond_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, %struct.tree_node* null, i32 %fallback ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb428: ; preds = %cond_next298
+ ret i32 0
+
+bb1283: ; preds = %cond_next298
+ ret i32 0
+
+bb1289: ; preds = %cond_next298, %cond_next298
+ ret i32 0
+
+bb1296: ; preds = %cond_next298, %cond_next298
+ ret i32 0
+
+bb1322: ; preds = %cond_next298
+ ret i32 0
+
+bb1504: ; preds = %cond_next298
+ ret i32 0
+
+bb2141: ; preds = %cond_next298
+ ret i32 0
+
+bb2548: ; preds = %cond_next298, %cond_next298
+ %tmp2554 = load %struct.tree_node** %expr_p ; <%struct.tree_node*> [#uses=2]
+ %tmp2562 = and i32 0, 255 ; <i32> [#uses=1]
+ %tmp2569 = add i8 0, -4 ; <i8> [#uses=1]
+ icmp ugt i8 %tmp2569, 5 ; <i1>:0 [#uses=2]
+ %tmp2587 = load i8* null ; <i8> [#uses=1]
+ icmp eq i8 %tmp2587, 0 ; <i1>:1 [#uses=2]
+ %tmp2607 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=2]
+ br i1 false, label %bb2754, label %cond_next2617
+
+cond_next2617: ; preds = %bb2548
+ ret i32 0
+
+bb2754: ; preds = %bb2548
+ br i1 %0, label %cond_true2780, label %cond_next2783
+
+cond_true2780: ; preds = %bb2754
+ call void @tree_class_check_failed( %struct.tree_node* %tmp2554, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next2783: ; preds = %bb2754
+ %tmp2825 = and i32 0, 255 ; <i32> [#uses=1]
+ %tmp2829 = load i32* null ; <i32> [#uses=1]
+ %tmp28292830 = trunc i32 %tmp2829 to i8 ; <i8> [#uses=1]
+ %tmp2832 = add i8 %tmp28292830, -4 ; <i8> [#uses=1]
+ icmp ugt i8 %tmp2832, 5 ; <i1>:2 [#uses=1]
+ icmp eq i8 0, 0 ; <i1>:3 [#uses=1]
+ %tmp28652866 = bitcast %struct.tree_node* %tmp2607 to %struct.tree_exp* ; <%struct.tree_exp*> [#uses=1]
+ %tmp2868 = getelementptr %struct.tree_exp* %tmp28652866, i32 0, i32 4, i32 0 ; <%struct.tree_node**> [#uses=1]
+ %tmp2870 = load %struct.tree_node** %tmp2868 ; <%struct.tree_node*> [#uses=1]
+ br i1 %1, label %cond_true2915, label %cond_next2927
+
+cond_true2915: ; preds = %cond_next2783
+ unreachable
+
+cond_next2927: ; preds = %cond_next2783
+ %tmp2938 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
+ %tmp2944 = load i32* null ; <i32> [#uses=1]
+ %tmp2946 = and i32 %tmp2944, 255 ; <i32> [#uses=1]
+ %tmp2949 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp2946 ; <i32*> [#uses=1]
+ %tmp2950 = load i32* %tmp2949 ; <i32> [#uses=1]
+ icmp eq i32 %tmp2950, 2 ; <i1>:4 [#uses=1]
+ br i1 %4, label %cond_next2954, label %cond_true2951
+
+cond_true2951: ; preds = %cond_next2927
+ call void @tree_class_check_failed( %struct.tree_node* %tmp2938, i32 2, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next2954: ; preds = %cond_next2927
+ br i1 %0, label %cond_true2991, label %cond_next2994
+
+cond_true2991: ; preds = %cond_next2954
+ unreachable
+
+cond_next2994: ; preds = %cond_next2954
+ br i1 %1, label %cond_true3009, label %cond_next3021
+
+cond_true3009: ; preds = %cond_next2994
+ call void @tree_operand_check_failed( i32 0, i32 %tmp2562, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next3021: ; preds = %cond_next2994
+ br i1 %2, label %cond_true3044, label %cond_next3047
+
+cond_true3044: ; preds = %cond_next3021
+ call void @tree_class_check_failed( %struct.tree_node* %tmp2607, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next3047: ; preds = %cond_next3021
+ br i1 %3, label %cond_true3062, label %cond_next3074
+
+cond_true3062: ; preds = %cond_next3047
+ call void @tree_operand_check_failed( i32 0, i32 %tmp2825, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+ unreachable
+
+cond_next3074: ; preds = %cond_next3047
+ %tmp3084 = getelementptr %struct.tree_node* %tmp2870, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
+ %tmp3085 = load %struct.tree_node** %tmp3084 ; <%struct.tree_node*> [#uses=1]
+ %tmp31043105 = bitcast %struct.tree_node* %tmp3085 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
+ %tmp3106 = getelementptr %struct.tree_type* %tmp31043105, i32 0, i32 6 ; <i16*> [#uses=1]
+ %tmp31063107 = bitcast i16* %tmp3106 to i32* ; <i32*> [#uses=1]
+ %tmp3108 = load i32* %tmp31063107 ; <i32> [#uses=1]
+ xor i32 %tmp3108, 0 ; <i32>:5 [#uses=1]
+ %tmp81008368 = and i32 %5, 65024 ; <i32> [#uses=1]
+ icmp eq i32 %tmp81008368, 0 ; <i1>:6 [#uses=1]
+ br i1 %6, label %cond_next3113, label %bb3351
+
+cond_next3113: ; preds = %cond_next3074
+ ret i32 0
+
+bb3351: ; preds = %cond_next3074
+ %tmp3354 = call i8 @tree_ssa_useless_type_conversion( %struct.tree_node* %tmp2554 ) zeroext ; <i8> [#uses=1]
+ icmp eq i8 %tmp3354, 0 ; <i1>:7 [#uses=1]
+ %tmp3424 = load i32* null ; <i32> [#uses=1]
+ br i1 %7, label %cond_next3417, label %cond_true3356
+
+cond_true3356: ; preds = %bb3351
+ ret i32 0
+
+cond_next3417: ; preds = %bb3351
+ br i1 false, label %cond_true3429, label %cond_next4266
+
+cond_true3429: ; preds = %cond_next3417
+ %tmp3443 = and i32 %tmp3424, 255 ; <i32> [#uses=0]
+ ret i32 0
+
+cond_next4266: ; preds = %cond_next3417
+ %tmp4268 = load %struct.tree_node** %expr_p ; <%struct.tree_node*> [#uses=1]
+ icmp eq %struct.tree_node* %tmp4268, null ; <i1>:8 [#uses=1]
+ br i1 %8, label %bb4275, label %bb7463
+
+bb4275: ; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+ %tmp4289 = and i32 0, 255 ; <i32> [#uses=2]
+ %tmp4292 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp4289 ; <i32*> [#uses=1]
+ %tmp4293 = load i32* %tmp4292 ; <i32> [#uses=1]
+ %tmp42934294 = trunc i32 %tmp4293 to i8 ; <i8> [#uses=1]
+ %tmp4296 = add i8 %tmp42934294, -4 ; <i8> [#uses=1]
+ icmp ugt i8 %tmp4296, 5 ; <i1>:9 [#uses=1]
+ br i1 %9, label %cond_true4297, label %cond_next4300
+
+cond_true4297: ; preds = %bb4275
+ unreachable
+
+cond_next4300: ; preds = %bb4275
+ %tmp4314 = load i8* null ; <i8> [#uses=1]
+ icmp eq i8 %tmp4314, 0 ; <i1>:10 [#uses=1]
+ br i1 %10, label %cond_true4315, label %cond_next4327
+
+cond_true4315: ; preds = %cond_next4300
+ call void @tree_operand_check_failed( i32 0, i32 %tmp4289, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 3997, i8* getelementptr ([14 x i8]* @__FUNCTION__.26156, i32 0, i32 0) )
+ unreachable
+
+cond_next4327: ; preds = %cond_next4300
+ %tmp4336 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zeroext * @is_gimple_val, i32 1 ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb4339: ; preds = %cond_next298
+ ret i32 0
+
+bb4350: ; preds = %cond_next298, %cond_next298
+ ret i32 0
+
+bb4503: ; preds = %cond_next298
+ ret i32 0
+
+bb4536: ; preds = %cond_next298
+ ret i32 0
+
+bb5079: ; preds = %cond_next298
+ ret i32 0
+
+bb5083: ; preds = %cond_next298
+ ret i32 0
+
+bb5087: ; preds = %cond_next298
+ ret i32 0
+
+bb5091: ; preds = %cond_next298
+ ret i32 0
+
+bb5170: ; preds = %cond_next298
+ ret i32 0
+
+bb5300: ; preds = %cond_next298
+ ret i32 0
+
+bb5382: ; preds = %cond_next298
+ ret i32 0
+
+bb5519: ; preds = %cond_next298
+ ret i32 0
+
+bb5524: ; preds = %cond_next298
+ ret i32 0
+
+bb5645: ; preds = %cond_next298
+ ret i32 0
+
+bb5650: ; preds = %cond_next298
+ ret i32 0
+
+cond_next5873: ; preds = %cond_next298, %cond_next298
+ ret i32 0
+
+bb5965: ; preds = %cond_next298
+ %tmp5968 = call fastcc i32 @gimplify_cleanup_point_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0 ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb5969: ; preds = %cond_next298
+ %tmp5973 = call fastcc i32 @gimplify_target_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb5974: ; preds = %cond_next298
+ ret i32 0
+
+bb6049: ; preds = %cond_next298
+ ret i32 0
+
+bb6124: ; preds = %cond_next298
+ ret i32 0
+
+bb6296: ; preds = %cond_next298
+ ret i32 0
+
+cond_next6474: ; preds = %cond_next298
+ icmp eq %struct.tree_node** %internal_post, %post_p_addr.0 ; <i1>:11 [#uses=1]
+ %iftmp.381.0 = select i1 %11, %struct.tree_node** null, %struct.tree_node** %post_p_addr.0 ; <%struct.tree_node**> [#uses=1]
+ %tmp6490 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %iftmp.381.0, i8 (%struct.tree_node*) zeroext * %gimple_test_f, i32 %fallback ) ; <i32> [#uses=0]
+ %tmp6551 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zeroext * @is_gimple_val, i32 1 ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb7444: ; preds = %cond_next298
+ ret i32 0
+
+bb7463: ; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+ ret i32 0
+
+bb7478: ; preds = %bb277
+ ret i32 0
+}
+
+declare i8 @is_gimple_formal_tmp_rhs(%struct.tree_node*) zeroext
+
+declare void @gimplify_and_add(%struct.tree_node*, %struct.tree_node**)
+
+declare %struct.tree_node* @get_initialized_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @get_formal_tmp_var(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc void @gimplify_init_ctor_preeval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.gimplify_init_ctor_preeval_data*)
+
+declare i8 @type_contains_placeholder_p(%struct.tree_node*) zeroext
+
+declare i8 @is_gimple_mem_rhs(%struct.tree_node*) zeroext
+
+declare fastcc i32 @gimplify_modify_expr_rhs(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+declare %struct.tree_node* @fold_indirect_ref(%struct.tree_node*)
+
+declare fastcc i32 @gimplify_compound_expr(%struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+declare i8 @is_gimple_lvalue(%struct.tree_node*) zeroext
+
+declare void @categorize_ctor_elements(%struct.tree_node*, i64*, i64*, i64*, i8*)
+
+declare void @lhd_set_decl_assembler_name(%struct.tree_node*)
+
+declare i64 @int_size_in_bytes(%struct.tree_node*)
+
+declare i32 @can_move_by_pieces(i64, i32)
+
+declare i64 @count_type_elements(%struct.tree_node*)
+
+declare void @gimplify_stmt(%struct.tree_node**)
+
+declare %struct.tree_node* @get_base_address(%struct.tree_node*)
+
+declare fastcc void @gimplify_init_ctor_eval(%struct.tree_node*, %struct.tree_node*, %struct.tree_node**, i8 zeroext )
+
+declare %struct.tree_node* @build_complex(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare i8 (%struct.tree_node*) zeroext * @rhs_predicate_for(%struct.tree_node*)
+
+declare %struct.tree_node* @build_vector(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @is_gimple_val(%struct.tree_node*) zeroext
+
+declare i8 @is_gimple_reg_type(%struct.tree_node*) zeroext
+
+declare fastcc i32 @gimplify_cond_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node*, i32)
+
+declare fastcc i32 @gimplify_modify_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+declare %struct.tree_node* @tree_cons_stat(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build_fold_addr_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @build_function_call_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @is_gimple_addressable(%struct.tree_node*) zeroext
+
+declare i8 @is_gimple_reg(%struct.tree_node*) zeroext
+
+declare %struct.tree_node* @make_ssa_name(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @tree_ssa_useless_type_conversion(%struct.tree_node*) zeroext
+
+declare fastcc i32 @gimplify_self_mod_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+declare fastcc i32 @gimplify_compound_lval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i32)
+
+declare %struct.tree_node* @get_callee_fndecl(%struct.tree_node*)
+
+declare %struct.tree_node* @fold_builtin(%struct.tree_node*, i8 zeroext )
+
+declare void @error(i8*, ...)
+
+declare %struct.tree_node* @build_empty_stmt()
+
+declare i8 @fold_builtin_next_arg(%struct.tree_node*) zeroext
+
+declare fastcc i32 @gimplify_arg(%struct.tree_node**, %struct.tree_node**)
+
+declare i8 @is_gimple_call_addr(%struct.tree_node*) zeroext
+
+declare i32 @call_expr_flags(%struct.tree_node*)
+
+declare void @recalculate_side_effects(%struct.tree_node*)
+
+declare %struct.tree_node* @fold_convert(%struct.tree_node*, %struct.tree_node*)
+
+declare void @recompute_tree_invarant_for_addr_expr(%struct.tree_node*)
+
+declare i32 @gimplify_va_arg_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @size_int_kind(i64, i32)
+
+declare %struct.tree_node* @size_binop(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build4_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare void @gimplify_type_sizes(%struct.tree_node*, %struct.tree_node**)
+
+declare void @gimplify_one_sizepos(%struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @build_pointer_type(%struct.tree_node*)
+
+declare %struct.tree_node* @build_fold_indirect_ref(%struct.tree_node*)
+
+declare fastcc i32 @gimplify_bind_expr(%struct.tree_node**, %struct.tree_node*, %struct.tree_node**)
+
+declare fastcc void @gimplify_loop_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_switch_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @decl_function_context(%struct.tree_node*)
+
+declare %struct.varray_head_tag* @varray_grow(%struct.varray_head_tag*, i32)
+
+declare fastcc void @gimplify_return_expr(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_save_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_asm_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare void @gimplify_to_stmt_list(%struct.tree_node**)
+
+declare fastcc i32 @gimplify_cleanup_point_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_target_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare void @tsi_delink(%struct.tree_stmt_iterator*)
+
+declare void @tsi_link_before(%struct.tree_stmt_iterator*, %struct.tree_node*, i32)
+
+declare i8 @is_gimple_stmt(%struct.tree_node*) zeroext
+
+declare void @print_generic_expr(%struct.FILE*, %struct.tree_node*, i32)
+
+declare void @debug_tree(%struct.tree_node*)
+
+declare void @internal_error(i8*, ...)
+
+declare %struct.tree_node* @force_gimple_operand(%struct.tree_node*, %struct.tree_node**, i8 zeroext , %struct.tree_node*)
+
+declare i8 @is_gimple_reg_rhs(%struct.tree_node*) zeroext
+
+declare void @add_referenced_tmp_var(%struct.tree_node*)
+
+declare i8 @contains_placeholder_p(%struct.tree_node*) zeroext
+
+declare %struct.varray_head_tag* @varray_init(i32, i32, i8*)
+
+declare i32 @handled_component_p(%struct.tree_node*)
+
+declare void @varray_check_failed(%struct.varray_head_tag*, i32, i8*, i32, i8*)
+
+declare %struct.tree_node* @array_ref_low_bound(%struct.tree_node*)
+
+declare i8 @is_gimple_min_invariant(%struct.tree_node*) zeroext
+
+declare i8 @is_gimple_formal_tmp_reg(%struct.tree_node*) zeroext
+
+declare %struct.tree_node* @array_ref_element_size(%struct.tree_node*)
+
+declare %struct.tree_node* @component_ref_field_offset(%struct.tree_node*)
+
+declare i8 @is_gimple_min_lval(%struct.tree_node*) zeroext
+
+declare void @varray_underflow(%struct.varray_head_tag*, i8*, i32, i8*)
+
+declare i32 @list_length(%struct.tree_node*)
+
+declare i8 @parse_output_constraint(i8**, i32, i32, i32, i8*, i8*, i8*) zeroext
+
+declare i8* @xstrdup(i8*)
+
+declare %struct.tree_node* @build_string(i32, i8*)
+
+declare i8* @strchr(i8*, i32)
+
+declare %struct.tree_node* @build_tree_list_stat(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @chainon(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @parse_input_constraint(i8**, i32, i32, i32, i32, i8**, i8*, i8*) zeroext
+
+declare i8 @is_gimple_asm_val(%struct.tree_node*) zeroext
+
+declare void @gimplify_body(%struct.tree_node**, %struct.tree_node*, i8 zeroext )
+
+declare void @timevar_push_1(i32)
+
+declare %struct.tree_node* @gimplify_parameters()
+
+declare %struct.tree_node* @expr_only(%struct.tree_node*)
+
+declare void @timevar_pop_1(i32)
+
+declare void @gimplify_function_tree(%struct.tree_node*)
+
+declare void @allocate_struct_function(%struct.tree_node*)
+
+declare %struct.tree_node* @make_tree_vec_stat(i32)
+
+declare %struct.tree_node* @tsi_split_statement_list_after(%struct.tree_stmt_iterator*)
+
+declare i8 @is_gimple_condexpr(%struct.tree_node*) zeroext
+
+declare %struct.tree_node* @invert_truthvalue(%struct.tree_node*)
+
+declare i8 @initializer_zerop(%struct.tree_node*) zeroext
+
+declare i32 @simple_cst_equal(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @aggregate_value_p(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @fwrite(i8*, i32, i32, %struct.FILE*)
diff --git a/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
new file mode 100644
index 0000000..e4635f5
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
+; PR1279
+
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.u = type { [1 x i64] }
+
+define fastcc void @find_reloads_address(%struct.rtx_def** %loc) {
+entry:
+ %ad_addr = alloca %struct.rtx_def* ; <%struct.rtx_def**> [#uses=2]
+ br i1 false, label %cond_next416, label %cond_true340
+
+cond_true340: ; preds = %entry
+ ret void
+
+cond_next416: ; preds = %entry
+ %tmp1085 = load %struct.rtx_def** %ad_addr ; <%struct.rtx_def*> [#uses=1]
+ br i1 false, label %bb1084, label %cond_true418
+
+cond_true418: ; preds = %cond_next416
+ ret void
+
+bb1084: ; preds = %cond_next416
+ br i1 false, label %cond_true1092, label %cond_next1102
+
+cond_true1092: ; preds = %bb1084
+ %tmp1094 = getelementptr %struct.rtx_def* %tmp1085, i32 0, i32 3 ; <%struct.u*> [#uses=1]
+ %tmp10981099 = bitcast %struct.u* %tmp1094 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=2]
+ %tmp1101 = load %struct.rtx_def** %tmp10981099 ; <%struct.rtx_def*> [#uses=1]
+ store %struct.rtx_def* %tmp1101, %struct.rtx_def** %ad_addr
+ br label %cond_next1102
+
+cond_next1102: ; preds = %cond_true1092, %bb1084
+ %loc_addr.0 = phi %struct.rtx_def** [ %tmp10981099, %cond_true1092 ], [ %loc, %bb1084 ] ; <%struct.rtx_def**> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
new file mode 100644
index 0000000..ea27676
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
@@ -0,0 +1,101 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
+; PR1279
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+ %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.u = type { [1 x i64] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+ %union.tree_ann_d = type opaque
+@str469 = external global [42 x i8] ; <[42 x i8]*> [#uses=0]
+@__FUNCTION__.24265 = external global [19 x i8] ; <[19 x i8]*> [#uses=0]
+
+declare void @fancy_abort()
+
+define fastcc void @fold_builtin_bitop() {
+entry:
+ br i1 false, label %cond_true105, label %UnifiedReturnBlock
+
+cond_true105: ; preds = %entry
+ br i1 false, label %cond_true134, label %UnifiedReturnBlock
+
+cond_true134: ; preds = %cond_true105
+ switch i32 0, label %bb479 [
+ i32 378, label %bb313
+ i32 380, label %bb313
+ i32 381, label %bb313
+ i32 383, label %bb366
+ i32 385, label %bb366
+ i32 386, label %bb366
+ i32 403, label %bb250
+ i32 405, label %bb250
+ i32 406, label %bb250
+ i32 434, label %bb464
+ i32 436, label %bb464
+ i32 437, label %bb464
+ i32 438, label %bb441
+ i32 440, label %bb441
+ i32 441, label %bb441
+ ]
+
+bb250: ; preds = %cond_true134, %cond_true134, %cond_true134
+ ret void
+
+bb313: ; preds = %cond_true134, %cond_true134, %cond_true134
+ ret void
+
+bb366: ; preds = %cond_true134, %cond_true134, %cond_true134
+ ret void
+
+bb441: ; preds = %cond_true134, %cond_true134, %cond_true134
+ ret void
+
+bb457: ; preds = %bb464, %bb457
+ %tmp459 = add i64 0, 1 ; <i64> [#uses=1]
+ br i1 false, label %bb474.preheader, label %bb457
+
+bb464: ; preds = %cond_true134, %cond_true134, %cond_true134
+ br i1 false, label %bb474.preheader, label %bb457
+
+bb474.preheader: ; preds = %bb464, %bb457
+ %result.5.ph = phi i64 [ 0, %bb464 ], [ %tmp459, %bb457 ] ; <i64> [#uses=1]
+ br label %bb474
+
+bb467: ; preds = %bb474
+ %indvar.next586 = add i64 %indvar585, 1 ; <i64> [#uses=1]
+ br label %bb474
+
+bb474: ; preds = %bb467, %bb474.preheader
+ %indvar585 = phi i64 [ 0, %bb474.preheader ], [ %indvar.next586, %bb467 ] ; <i64> [#uses=2]
+ br i1 false, label %bb476, label %bb467
+
+bb476: ; preds = %bb474
+ %result.5 = add i64 %indvar585, %result.5.ph ; <i64> [#uses=0]
+ ret void
+
+bb479: ; preds = %cond_true134
+ tail call void @fancy_abort( )
+ unreachable
+
+UnifiedReturnBlock: ; preds = %cond_true105, %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
new file mode 100644
index 0000000..f24def3
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin
+
+ %struct.H_TBL = type { [17 x i8], [256 x i8], i32 }
+ %struct.Q_TBL = type { [64 x i16], i32 }
+ %struct.anon = type { [80 x i8] }
+ %struct.X_c_coef_ccler = type { void (%struct.X_Y*, i32)*, i32 (%struct.X_Y*, i8***)* }
+ %struct.X_c_main_ccler = type { void (%struct.X_Y*, i32)*, void (%struct.X_Y*, i8**, i32*, i32)* }
+ %struct.X_c_prep_ccler = type { void (%struct.X_Y*, i32)*, void (%struct.X_Y*, i8**, i32*, i32, i8***, i32*, i32)* }
+ %struct.X_color_converter = type { void (%struct.X_Y*)*, void (%struct.X_Y*, i8**, i8***, i32, i32)* }
+ %struct.X_common_struct = type { %struct.X_error_mgr*, %struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32 }
+ %struct.X_comp_master = type { void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, i32, i32 }
+ %struct.X_component_info = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Q_TBL*, i8* }
+ %struct.X_Y = type { %struct.X_error_mgr*, %struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32, %struct.X_destination_mgr*, i32, i32, i32, i32, double, i32, i32, i32, %struct.X_component_info*, [4 x %struct.Q_TBL*], [4 x %struct.H_TBL*], [4 x %struct.H_TBL*], [16 x i8], [16 x i8], [16 x i8], i32, %struct.X_scan_info*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.X_component_info*], i32, i32, i32, [10 x i32], i32, i32, i32, i32, %struct.X_comp_master*, %struct.X_c_main_ccler*, %struct.X_c_prep_ccler*, %struct.X_c_coef_ccler*, %struct.X_marker_writer*, %struct.X_color_converter*, %struct.X_downssr*, %struct.X_forward_D*, %struct.X_entropy_en*, %struct.X_scan_info*, i32 }
+ %struct.X_destination_mgr = type { i8*, i32, void (%struct.X_Y*)*, i32 (%struct.X_Y*)*, void (%struct.X_Y*)* }
+ %struct.X_downssr = type { void (%struct.X_Y*)*, void (%struct.X_Y*, i8***, i32, i8***, i32)*, i32 }
+ %struct.X_entropy_en = type { void (%struct.X_Y*, i32)*, i32 (%struct.X_Y*, [64 x i16]**)*, void (%struct.X_Y*)* }
+ %struct.X_error_mgr = type { void (%struct.X_common_struct*)*, void (%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, void (%struct.X_common_struct*, i8*)*, void (%struct.X_common_struct*)*, i32, %struct.anon, i32, i32, i8**, i32, i8**, i32, i32 }
+ %struct.X_forward_D = type { void (%struct.X_Y*)*, void (%struct.X_Y*, %struct.X_component_info*, i8**, [64 x i16]*, i32, i32, i32)* }
+ %struct.X_marker_writer = type { void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*, i32, i32)*, void (%struct.X_Y*, i32)* }
+ %struct.X_memory_mgr = type { i8* (%struct.X_common_struct*, i32, i32)*, i8* (%struct.X_common_struct*, i32, i32)*, i8** (%struct.X_common_struct*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*, i32, i32, i32)*, %struct.jvirt_sAY_cc* (%struct.X_common_struct*, i32, i32, i32, i32, i32)*, %struct.jvirt_bAY_cc* (%struct.X_common_struct*, i32, i32, i32, i32, i32)*, void (%struct.X_common_struct*)*, i8** (%struct.X_common_struct*, %struct.jvirt_sAY_cc*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*, %struct.jvirt_bAY_cc*, i32, i32, i32)*, void (%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, i32, i32 }
+ %struct.X_progress_mgr = type { void (%struct.X_common_struct*)*, i32, i32, i32, i32 }
+ %struct.X_scan_info = type { i32, [4 x i32], i32, i32, i32, i32 }
+ %struct.jvirt_bAY_cc = type opaque
+ %struct.jvirt_sAY_cc = type opaque
+
+define void @test(%struct.X_Y* %cinfo) {
+entry:
+ br i1 false, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ %tbl.014.us = load i32* null ; <i32> [#uses=1]
+ br i1 false, label %cond_next.us, label %bb
+
+cond_next51.us: ; preds = %cond_next.us, %cond_true33.us.cond_true46.us_crit_edge
+ %htblptr.019.1.us = phi %struct.H_TBL** [ %tmp37.us, %cond_true33.us.cond_true46.us_crit_edge ], [ %tmp37.us, %cond_next.us ] ; <%struct.H_TBL**> [#uses=0]
+ ret void
+
+cond_true33.us.cond_true46.us_crit_edge: ; preds = %cond_next.us
+ call void @_C_X_a_HT( )
+ br label %cond_next51.us
+
+cond_next.us: ; preds = %bb.preheader
+ %tmp37.us = getelementptr %struct.X_Y* %cinfo, i32 0, i32 17, i32 %tbl.014.us ; <%struct.H_TBL**> [#uses=3]
+ %tmp4524.us = load %struct.H_TBL** %tmp37.us ; <%struct.H_TBL*> [#uses=1]
+ icmp eq %struct.H_TBL* %tmp4524.us, null ; <i1>:0 [#uses=1]
+ br i1 %0, label %cond_true33.us.cond_true46.us_crit_edge, label %cond_next51.us
+
+bb: ; preds = %bb.preheader
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+declare void @_C_X_a_HT()
diff --git a/test/CodeGen/ARM/2007-04-03-PEIBug.ll b/test/CodeGen/ARM/2007-04-03-PEIBug.ll
new file mode 100644
index 0000000..b543c57
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-03-PEIBug.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=arm | not grep {add.*#0}
+
+define i32 @foo() {
+entry:
+ %A = alloca [1123 x i32], align 16 ; <[1123 x i32]*> [#uses=1]
+ %B = alloca [3123 x i32], align 16 ; <[3123 x i32]*> [#uses=1]
+ %C = alloca [12312 x i32], align 16 ; <[12312 x i32]*> [#uses=1]
+ %tmp = call i32 (...)* @bar( [3123 x i32]* %B, [1123 x i32]* %A, [12312 x i32]* %C ) ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll b/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
new file mode 100644
index 0000000..e001cde
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
@@ -0,0 +1,99 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | \
+; RUN: not grep LPC9
+
+ %struct.B = type { i32 }
+ %struct.anon = type { void (%struct.B*)*, i32 }
+@str = internal constant [7 x i8] c"i, %d\0A\00" ; <[7 x i8]*> [#uses=1]
+@str1 = internal constant [7 x i8] c"j, %d\0A\00" ; <[7 x i8]*> [#uses=1]
+
+define internal void @_ZN1B1iEv(%struct.B* %this) {
+entry:
+ %tmp1 = getelementptr %struct.B* %this, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp2 = load i32* %tmp1 ; <i32> [#uses=1]
+ %tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @str, i32 0, i32 0), i32 %tmp2 ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
+
+define internal void @_ZN1B1jEv(%struct.B* %this) {
+entry:
+ %tmp1 = getelementptr %struct.B* %this, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp2 = load i32* %tmp1 ; <i32> [#uses=1]
+ %tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @str1, i32 0, i32 0), i32 %tmp2 ) ; <i32> [#uses=0]
+ ret void
+}
+
+define i32 @main() {
+entry:
+ %b.i29 = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3]
+ %b.i1 = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3]
+ %b.i = alloca %struct.B, align 4 ; <%struct.B*> [#uses=3]
+ %tmp2.i = getelementptr %struct.B* %b.i, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 4, i32* %tmp2.i
+ br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit, label %cond_true.i
+
+cond_true.i: ; preds = %entry
+ %b2.i = bitcast %struct.B* %b.i to i8* ; <i8*> [#uses=1]
+ %ctg23.i = getelementptr i8* %b2.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp121314.i = bitcast i8* %ctg23.i to i32 (...)*** ; <i32 (...)***> [#uses=1]
+ %tmp15.i = load i32 (...)*** %tmp121314.i ; <i32 (...)**> [#uses=1]
+ %tmp151.i = bitcast i32 (...)** %tmp15.i to i8* ; <i8*> [#uses=1]
+ %ctg2.i = getelementptr i8* %tmp151.i, i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) ; <i8*> [#uses=1]
+ %tmp2021.i = bitcast i8* %ctg2.i to i32 (...)** ; <i32 (...)**> [#uses=1]
+ %tmp22.i = load i32 (...)** %tmp2021.i ; <i32 (...)*> [#uses=1]
+ %tmp2223.i = bitcast i32 (...)* %tmp22.i to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1]
+ br label %_Z3fooiM1BFvvE.exit
+
+_Z3fooiM1BFvvE.exit: ; preds = %cond_true.i, %entry
+ %iftmp.2.0.i = phi void (%struct.B*)* [ %tmp2223.i, %cond_true.i ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to void (%struct.B*)*), %entry ] ; <void (%struct.B*)*> [#uses=1]
+ %b4.i = bitcast %struct.B* %b.i to i8* ; <i8*> [#uses=1]
+ %ctg25.i = getelementptr i8* %b4.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp3031.i = bitcast i8* %ctg25.i to %struct.B* ; <%struct.B*> [#uses=1]
+ call void %iftmp.2.0.i( %struct.B* %tmp3031.i )
+ %tmp2.i30 = getelementptr %struct.B* %b.i29, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 6, i32* %tmp2.i30
+ br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit56, label %cond_true.i46
+
+cond_true.i46: ; preds = %_Z3fooiM1BFvvE.exit
+ %b2.i35 = bitcast %struct.B* %b.i29 to i8* ; <i8*> [#uses=1]
+ %ctg23.i36 = getelementptr i8* %b2.i35, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp121314.i37 = bitcast i8* %ctg23.i36 to i32 (...)*** ; <i32 (...)***> [#uses=1]
+ %tmp15.i38 = load i32 (...)*** %tmp121314.i37 ; <i32 (...)**> [#uses=1]
+ %tmp151.i41 = bitcast i32 (...)** %tmp15.i38 to i8* ; <i8*> [#uses=1]
+ %ctg2.i42 = getelementptr i8* %tmp151.i41, i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) ; <i8*> [#uses=1]
+ %tmp2021.i43 = bitcast i8* %ctg2.i42 to i32 (...)** ; <i32 (...)**> [#uses=1]
+ %tmp22.i44 = load i32 (...)** %tmp2021.i43 ; <i32 (...)*> [#uses=1]
+ %tmp2223.i45 = bitcast i32 (...)* %tmp22.i44 to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1]
+ br label %_Z3fooiM1BFvvE.exit56
+
+_Z3fooiM1BFvvE.exit56: ; preds = %cond_true.i46, %_Z3fooiM1BFvvE.exit
+ %iftmp.2.0.i49 = phi void (%struct.B*)* [ %tmp2223.i45, %cond_true.i46 ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to void (%struct.B*)*), %_Z3fooiM1BFvvE.exit ] ; <void (%struct.B*)*> [#uses=1]
+ %b4.i53 = bitcast %struct.B* %b.i29 to i8* ; <i8*> [#uses=1]
+ %ctg25.i54 = getelementptr i8* %b4.i53, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp3031.i55 = bitcast i8* %ctg25.i54 to %struct.B* ; <%struct.B*> [#uses=1]
+ call void %iftmp.2.0.i49( %struct.B* %tmp3031.i55 )
+ %tmp2.i2 = getelementptr %struct.B* %b.i1, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 -1, i32* %tmp2.i2
+ br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit28, label %cond_true.i18
+
+cond_true.i18: ; preds = %_Z3fooiM1BFvvE.exit56
+ %b2.i7 = bitcast %struct.B* %b.i1 to i8* ; <i8*> [#uses=1]
+ %ctg23.i8 = getelementptr i8* %b2.i7, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp121314.i9 = bitcast i8* %ctg23.i8 to i32 (...)*** ; <i32 (...)***> [#uses=1]
+ %tmp15.i10 = load i32 (...)*** %tmp121314.i9 ; <i32 (...)**> [#uses=1]
+ %tmp151.i13 = bitcast i32 (...)** %tmp15.i10 to i8* ; <i8*> [#uses=1]
+ %ctg2.i14 = getelementptr i8* %tmp151.i13, i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) ; <i8*> [#uses=1]
+ %tmp2021.i15 = bitcast i8* %ctg2.i14 to i32 (...)** ; <i32 (...)**> [#uses=1]
+ %tmp22.i16 = load i32 (...)** %tmp2021.i15 ; <i32 (...)*> [#uses=1]
+ %tmp2223.i17 = bitcast i32 (...)* %tmp22.i16 to void (%struct.B*)* ; <void (%struct.B*)*> [#uses=1]
+ br label %_Z3fooiM1BFvvE.exit28
+
+_Z3fooiM1BFvvE.exit28: ; preds = %cond_true.i18, %_Z3fooiM1BFvvE.exit56
+ %iftmp.2.0.i21 = phi void (%struct.B*)* [ %tmp2223.i17, %cond_true.i18 ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to void (%struct.B*)*), %_Z3fooiM1BFvvE.exit56 ] ; <void (%struct.B*)*> [#uses=1]
+ %b4.i25 = bitcast %struct.B* %b.i1 to i8* ; <i8*> [#uses=1]
+ %ctg25.i26 = getelementptr i8* %b4.i25, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) ; <i8*> [#uses=1]
+ %tmp3031.i27 = bitcast i8* %ctg25.i26 to %struct.B* ; <%struct.B*> [#uses=1]
+ call void %iftmp.2.0.i21( %struct.B* %tmp3031.i27 )
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll b/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
new file mode 100644
index 0000000..a89e937
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-apple-darwin8"
+ %struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 }
+@search = external global %struct.CHESS_POSITION ; <%struct.CHESS_POSITION*> [#uses=3]
+@file_mask = external global [8 x i64] ; <[8 x i64]*> [#uses=1]
+@rank_mask.1.b = external global i1 ; <i1*> [#uses=1]
+
+define fastcc void @EvaluateDevelopment() {
+entry:
+ %tmp7 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 7) ; <i64> [#uses=1]
+ %tmp50 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 0) ; <i64> [#uses=1]
+ %tmp52 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 1) ; <i64> [#uses=1]
+ %tmp53 = or i64 %tmp52, %tmp50 ; <i64> [#uses=1]
+ %tmp57.b = load i1* @rank_mask.1.b ; <i1> [#uses=1]
+ %tmp57 = select i1 %tmp57.b, i64 71776119061217280, i64 0 ; <i64> [#uses=1]
+ %tmp58 = and i64 %tmp57, %tmp7 ; <i64> [#uses=1]
+ %tmp59 = lshr i64 %tmp58, 8 ; <i64> [#uses=1]
+ %tmp63 = load i64* getelementptr ([8 x i64]* @file_mask, i32 0, i32 4) ; <i64> [#uses=1]
+ %tmp64 = or i64 %tmp63, 0 ; <i64> [#uses=1]
+ %tmp65 = and i64 %tmp59, %tmp53 ; <i64> [#uses=1]
+ %tmp66 = and i64 %tmp65, %tmp64 ; <i64> [#uses=1]
+ %tmp67 = icmp eq i64 %tmp66, 0 ; <i1> [#uses=1]
+ br i1 %tmp67, label %cond_next145, label %cond_true70
+
+cond_true70: ; preds = %entry
+ ret void
+
+cond_next145: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll
new file mode 100644
index 0000000..c73b6793
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll
@@ -0,0 +1,113 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+ %struct.Connection = type { i32, [10 x i8], i32 }
+ %struct.IntChunk = type { %struct.cppobjtype, i32, i32*, i32 }
+ %struct.Point = type { i8*, %struct.cppobjtype, i16 (%struct.Point*) signext *, i16 (%struct.Point*) signext *, double (%struct.Point*)*, double (%struct.Point*)* }
+ %struct.RefPoint = type { %struct.Point*, %struct.cppobjtype }
+ %struct.ShortArray = type { %struct.cppobjtype, i32, i16* }
+ %struct.TestObj = type { i8*, %struct.cppobjtype, i8, [32 x i8], i8*, i8**, i16, i16, i32, i32, i32, i32, float, double, %struct.cppobjtype, i32, i16*, i16**, i8**, i32, %struct.XyPoint, [3 x %struct.Connection], %struct.Point*, %struct.XyPoint*, i32, i8*, i8*, i16*, %struct.ShortArray, %struct.IntChunk, %struct.cppobjtype, %struct.cppobjtype, %struct.RefPoint, i32, %struct.cppobjtype, %struct.cppobjtype }
+ %struct.XyPoint = type { i16, i16 }
+ %struct.cppobjtype = type { i32, i16, i16 }
+@Msg = external global [256 x i8] ; <[256 x i8]*> [#uses=1]
[email protected] = external constant [48 x i8] ; <[48 x i8]*> [#uses=1]
[email protected] = external global i1 ; <i1*> [#uses=1]
+
+define fastcc void @Draw7(i32 %Option, i32* %Status) {
+entry:
+ %tmp115.b = load i1* @FirstTime.4637.b ; <i1> [#uses=1]
+ br i1 %tmp115.b, label %cond_next239, label %cond_next.i
+
+cond_next.i: ; preds = %entry
+ ret void
+
+cond_next239: ; preds = %entry
+ %tmp242 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp242, label %cond_next253, label %cond_next296
+
+cond_next253: ; preds = %cond_next239
+ switch i32 %Option, label %bb1326 [
+ i32 3, label %cond_true258
+ i32 4, label %cond_true268
+ i32 2, label %cond_true279
+ i32 1, label %cond_next315
+ ]
+
+cond_true258: ; preds = %cond_next253
+ ret void
+
+cond_true268: ; preds = %cond_next253
+ ret void
+
+cond_true279: ; preds = %cond_next253
+ ret void
+
+cond_next296: ; preds = %cond_next239
+ ret void
+
+cond_next315: ; preds = %cond_next253
+ %tmp1140 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp1140, label %cond_true1143, label %bb1326
+
+cond_true1143: ; preds = %cond_next315
+ %tmp1148 = icmp eq i32 0, 0 ; <i1> [#uses=4]
+ br i1 %tmp1148, label %cond_next1153, label %cond_true1151
+
+cond_true1151: ; preds = %cond_true1143
+ ret void
+
+cond_next1153: ; preds = %cond_true1143
+ %tmp8.i.i185 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp8.i.i185, label %TestObj_new1.exit, label %cond_true.i.i187
+
+cond_true.i.i187: ; preds = %cond_next1153
+ ret void
+
+TestObj_new1.exit: ; preds = %cond_next1153
+ %tmp1167 = icmp eq i16 0, 0 ; <i1> [#uses=1]
+ %tmp1178 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp1167, %tmp1178 ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb1199, label %bb1181
+
+bb1181: ; preds = %TestObj_new1.exit
+ ret void
+
+bb1199: ; preds = %TestObj_new1.exit
+ br i1 %tmp1148, label %cond_next1235, label %Object_Dump.exit302
+
+Object_Dump.exit302: ; preds = %bb1199
+ ret void
+
+cond_next1235: ; preds = %bb1199
+ %bothcond10485 = or i1 false, %tmp1148 ; <i1> [#uses=1]
+ br i1 %bothcond10485, label %cond_next1267, label %cond_true1248
+
+cond_true1248: ; preds = %cond_next1235
+ ret void
+
+cond_next1267: ; preds = %cond_next1235
+ br i1 %tmp1148, label %cond_next1275, label %cond_true1272
+
+cond_true1272: ; preds = %cond_next1267
+ %tmp1273 = load %struct.TestObj** null ; <%struct.TestObj*> [#uses=2]
+ %tmp2930.i = ptrtoint %struct.TestObj* %tmp1273 to i32 ; <i32> [#uses=1]
+ %tmp42.i348 = sub i32 0, %tmp2930.i ; <i32> [#uses=1]
+ %tmp45.i = getelementptr %struct.TestObj* %tmp1273, i32 0, i32 0 ; <i8**> [#uses=2]
+ %tmp48.i = load i8** %tmp45.i ; <i8*> [#uses=1]
+ %tmp50.i350 = call i32 (i8*, i8*, ...)* @sprintf( i8* getelementptr ([256 x i8]* @Msg, i32 0, i32 0), i8* getelementptr ([48 x i8]* @.str53615, i32 0, i32 0), i8* null, i8** %tmp45.i, i8* %tmp48.i ) ; <i32> [#uses=0]
+ br i1 false, label %cond_true.i632.i, label %Ut_TraceMsg.exit648.i
+
+cond_true.i632.i: ; preds = %cond_true1272
+ ret void
+
+Ut_TraceMsg.exit648.i: ; preds = %cond_true1272
+ %tmp57.i = getelementptr i8* null, i32 %tmp42.i348 ; <i8*> [#uses=0]
+ ret void
+
+cond_next1275: ; preds = %cond_next1267
+ ret void
+
+bb1326: ; preds = %cond_next315, %cond_next253
+ ret void
+}
+
+declare i32 @sprintf(i8*, i8*, ...)
diff --git a/test/CodeGen/ARM/2007-05-07-jumptoentry.ll b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll
new file mode 100644
index 0000000..26864f1
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll
@@ -0,0 +1,58 @@
+; RUN: llc < %s | not grep 1_0
+; This used to create an extra branch to 'entry', LBB1_0.
+
+; ModuleID = 'bug.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-apple-darwin8"
+ %struct.HexxagonMove = type { i8, i8, i32 }
+ %struct.HexxagonMoveList = type { i32, %struct.HexxagonMove* }
+
+define void @_ZN16HexxagonMoveList8sortListEv(%struct.HexxagonMoveList* %this) {
+entry:
+ %tmp51 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp2 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 1 ; <%struct.HexxagonMove**> [#uses=2]
+ br label %bb49
+
+bb1: ; preds = %bb49
+ %tmp3 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=5]
+ %tmp6 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 2 ; <i32*> [#uses=1]
+ %tmp7 = load i32* %tmp6 ; <i32> [#uses=2]
+ %tmp12 = add i32 %i.1, 1 ; <i32> [#uses=7]
+ %tmp14 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 2 ; <i32*> [#uses=1]
+ %tmp15 = load i32* %tmp14 ; <i32> [#uses=1]
+ %tmp16 = icmp slt i32 %tmp7, %tmp15 ; <i1> [#uses=1]
+ br i1 %tmp16, label %cond_true, label %bb49
+
+cond_true: ; preds = %bb1
+ %tmp23.0 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 0 ; <i8*> [#uses=2]
+ %tmp67 = load i8* %tmp23.0 ; <i8> [#uses=1]
+ %tmp23.1 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 1 ; <i8*> [#uses=1]
+ %tmp68 = load i8* %tmp23.1 ; <i8> [#uses=1]
+ %tmp3638 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 0 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32( i8* %tmp23.0, i8* %tmp3638, i32 8, i32 4 )
+ %tmp41 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=3]
+ %tmp44.0 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 0 ; <i8*> [#uses=1]
+ store i8 %tmp67, i8* %tmp44.0
+ %tmp44.1 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 1 ; <i8*> [#uses=1]
+ store i8 %tmp68, i8* %tmp44.1
+ %tmp44.2 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 2 ; <i32*> [#uses=1]
+ store i32 %tmp7, i32* %tmp44.2
+ br label %bb49
+
+bb49: ; preds = %bb59, %cond_true, %bb1, %entry
+ %i.1 = phi i32 [ 0, %entry ], [ %tmp12, %bb1 ], [ %tmp12, %cond_true ], [ 0, %bb59 ] ; <i32> [#uses=5]
+ %move.2 = phi i32 [ 0, %entry ], [ 1, %cond_true ], [ %move.2, %bb1 ], [ 0, %bb59 ] ; <i32> [#uses=2]
+ %tmp52 = load i32* %tmp51 ; <i32> [#uses=1]
+ %tmp53 = add i32 %tmp52, -1 ; <i32> [#uses=1]
+ %tmp55 = icmp sgt i32 %tmp53, %i.1 ; <i1> [#uses=1]
+ br i1 %tmp55, label %bb1, label %bb59
+
+bb59: ; preds = %bb49
+ %tmp61 = icmp eq i32 %move.2, 0 ; <i1> [#uses=1]
+ br i1 %tmp61, label %return, label %bb49
+
+return: ; preds = %bb59
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
new file mode 100644
index 0000000..f2a8ee1
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
@@ -0,0 +1,68 @@
+; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
+; Check that calls to baz and quux are tail-merged.
+; PR1628
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %q_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ store i32 %q, i32* %q_addr
+ %tmp = load i32* %i_addr ; <i32> [#uses=1]
+ %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ br label %cond_next
+
+cond_false: ; preds = %entry
+ %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ br label %cond_next
+
+cond_next: ; preds = %cond_false, %cond_true
+ %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
+ %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
+ br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_true11: ; preds = %cond_next
+ %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_false15: ; preds = %cond_next
+ %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_next18: ; preds = %cond_false15, %cond_true11
+ %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next18
+ %retval20 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
new file mode 100644
index 0000000..2758505
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
@@ -0,0 +1,69 @@
+; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
+; Check that calls to baz and quux are tail-merged.
+; PR1628
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %q_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ store i32 %q, i32* %q_addr
+ %tmp = load i32* %i_addr ; <i32> [#uses=1]
+ %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
+ %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
+ br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_false: ; preds = %entry
+ %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp27 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1]
+ %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1]
+ %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1]
+ br i1 %toBool210, label %cond_true11, label %cond_false15
+
+cond_true11: ; preds = %cond_next
+ %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_false15: ; preds = %cond_next
+ %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_next18: ; preds = %cond_false15, %cond_true11
+ %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next18
+ %retval20 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll b/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
new file mode 100644
index 0000000..b3b07693
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+v6
+
+define i32 @test3() {
+ tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
+ ret i32 11
+}
diff --git a/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
new file mode 100644
index 0000000..7b15ded
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
+; PR1406
+
+ %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+ %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
+ %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
+ %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+ %struct.AVOption = type opaque
+ %struct.AVPaletteControl = type { i32, [256 x i32] }
+ %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+ %struct.AVRational = type { i32, i32 }
+ %struct.RcOverride = type { i32, i32, i32, float }
+
+define i32 @decode_init(%struct.AVCodecContext* %avctx) {
+entry:
+ br i1 false, label %bb, label %cond_next789
+
+bb: ; preds = %bb, %entry
+ br i1 false, label %bb59, label %bb
+
+bb59: ; preds = %bb
+ %tmp68 = sdiv i64 0, 0 ; <i64> [#uses=1]
+ %tmp6869 = trunc i64 %tmp68 to i32 ; <i32> [#uses=2]
+ %tmp81 = call i32 asm "smull $0, $1, $2, $3 \0A\09mov $0, $0, lsr $4\0A\09add $1, $0, $1, lsl $5\0A\09", "=&r,=*&r,r,r,i,i"( i32* null, i32 %tmp6869, i32 13316085, i32 23, i32 9 ) ; <i32> [#uses=0]
+ %tmp90 = call i32 asm "smull $0, $1, $2, $3 \0A\09mov $0, $0, lsr $4\0A\09add $1, $0, $1, lsl $5\0A\09", "=&r,=*&r,r,r,i,i"( i32* null, i32 %tmp6869, i32 10568984, i32 23, i32 9 ) ; <i32> [#uses=0]
+ unreachable
+
+cond_next789: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
new file mode 100644
index 0000000..061bf5e
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
@@ -0,0 +1,73 @@
+; RUN: llc < %s -march=arm | grep bl.*baz | count 1
+; RUN: llc < %s -march=arm | grep bl.*quux | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge=0 | grep bl.*baz | count 2
+; RUN: llc < %s -march=arm -enable-tail-merge=0 | grep bl.*quux | count 2
+; RUN: llc < %s -march=arm -enable-eh | grep bl.*baz | count 1
+; RUN: llc < %s -march=arm -enable-eh | grep bl.*quux | count 1
+; RUN: llc < %s -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*baz | count 2
+; RUN: llc < %s -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*quux | count 2
+; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 works.
+; PR1628
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %q_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ store i32 %q, i32* %q_addr
+ %tmp = load i32* %i_addr ; <i32> [#uses=1]
+ %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
+ %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
+ br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_false: ; preds = %entry
+ %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp27 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1]
+ %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1]
+ %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1]
+ br i1 %toBool210, label %cond_true11, label %cond_false15
+
+cond_true11: ; preds = %cond_next
+ %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_false15: ; preds = %cond_next
+ %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_next18: ; preds = %cond_false15, %cond_true11
+ %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next18
+ %retval20 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll
new file mode 100644
index 0000000..d2eb85d
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=arm | not grep {str.*\\!}
+
+ %struct.shape_edge_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32 }
+ %struct.shape_path_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32, i32, i32 }
+ %struct.shape_pool_t = type { i8* (%struct.shape_pool_t*, i8*, i32)*, i8* (%struct.shape_pool_t*, i32)*, void (%struct.shape_pool_t*, i8*)* }
+
+define %struct.shape_path_t* @shape_path_alloc(%struct.shape_pool_t* %pool, i32* %shape) {
+entry:
+ br i1 false, label %cond_false, label %bb45
+
+bb45: ; preds = %entry
+ ret %struct.shape_path_t* null
+
+cond_false: ; preds = %entry
+ br i1 false, label %bb140, label %bb174
+
+bb140: ; preds = %bb140, %cond_false
+ %indvar = phi i32 [ 0, %cond_false ], [ %indvar.next, %bb140 ] ; <i32> [#uses=2]
+ %edge.230.0.rec = shl i32 %indvar, 1 ; <i32> [#uses=3]
+ %edge.230.0 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.rec ; <%struct.shape_edge_t*> [#uses=1]
+ %edge.230.0.sum6970 = or i32 %edge.230.0.rec, 1 ; <i32> [#uses=2]
+ %tmp154 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.sum6970 ; <%struct.shape_edge_t*> [#uses=1]
+ %tmp11.i5 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.sum6970, i32 0 ; <%struct.shape_edge_t**> [#uses=1]
+ store %struct.shape_edge_t* %edge.230.0, %struct.shape_edge_t** %tmp11.i5
+ store %struct.shape_edge_t* %tmp154, %struct.shape_edge_t** null
+ %tmp16254.0.rec = add i32 %edge.230.0.rec, 2 ; <i32> [#uses=1]
+ %xp.350.sum = add i32 0, %tmp16254.0.rec ; <i32> [#uses=1]
+ %tmp168 = icmp slt i32 %xp.350.sum, 0 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp168, label %bb140, label %bb174
+
+bb174: ; preds = %bb140, %cond_false
+ ret %struct.shape_path_t* null
+}
diff --git a/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll
new file mode 100644
index 0000000..030486a
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll
@@ -0,0 +1,237 @@
+; RUN: llc < %s
+; PR1424
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-linux-gnueabi"
+ %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+ %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
+ %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
+ %struct.AVEvalExpr = type opaque
+ %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+ %struct.AVOption = type opaque
+ %struct.AVPaletteControl = type { i32, [256 x i32] }
+ %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+ %struct.AVRational = type { i32, i32 }
+ %struct.BlockNode = type { i16, i16, i8, [3 x i8], i8, i8 }
+ %struct.DSPContext = type { void (i16*, i8*, i32)*, void (i16*, i8*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, i32 (i16*)*, void (i8*, i8*, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, void (i16*)*, i32 (i8*, i32)*, i32 (i8*, i32)*, [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], i32 (i8*, i16*, i32)*, [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [2 x void (i8*, i8*, i8*, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [8 x void (i8*, i8*, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [10 x void (i8*, i32, i32, i32, i32)*], [10 x void (i8*, i8*, i32, i32, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i16*, i32)*, [2 x [4 x i32 (i8*, i8*, i8*, i32, i32)*]], void (i8*, i8*, i32)*, void (i8*, i8*, i8*, i32)*, void (i8*, i8*, i8*, i32, i32*, i32*)*, void (i32*, i32*, i32)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32)*, void (i8*, i32, i32, i32)*, void ([4 x [4 x i16]]*, i8*, [40 x i8]*, [40 x [2 x i16]]*, i32, i32, i32, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32)*, void (float*, float*, i32)*, void (float*, float*, i32)*, void (float*, float*, float*, i32)*, void (float*, float*, float*, float*, i32, i32, i32)*, void (i16*, float*, i32)*, void (i16*)*, void (i16*)*, void (i16*)*, void (i8*, i32, i16*)*, void (i8*, i32, i16*)*, [64 x i8], i32, i32 (i16*, i16*, i16*, i32)*, void (i16*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void ([4 x i16]*)*, void (i32*, i32*, i32*, i32*, i32*, i32*, i32)*, void (i32*, i32)*, void (i8*, i32, i8**, i32, i32, i32, i32, i32, %struct.slice_buffer*, i32, i8*)*, void (i8*, i32, i32)*, [4 x void (i8*, i32, i8*, i32, i32, i32)*], void (i16*)*, void (i16*, i32)*, void (i16*, i32)*, void (i16*, i32)*, void (i8*, i32)*, void (i8*, i32)*, [16 x void (i8*, i8*, i32, i32)*] }
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct.GetBitContext = type { i8*, i8*, i32*, i32, i32, i32, i32 }
+ %struct.MJpegContext = type opaque
+ %struct.MotionEstContext = type { %struct.AVCodecContext*, i32, [4 x [2 x i32]], [4 x [2 x i32]], i8*, i8*, [2 x i8*], i8*, i32, i32*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x [4 x i8*]], [4 x [4 x i8*]], i32, i32, i32, i32, i32, [4 x void (i8*, i8*, i32, i32)*]*, [4 x void (i8*, i8*, i32, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [4097 x i8]*, i8*, i32 (%struct.MpegEncContext*, i32*, i32*, i32, i32, i32, i32, i32)* }
+ %struct.MpegEncContext = type { %struct.AVCodecContext*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Picture*, %struct.Picture**, %struct.Picture**, i32, i32, [8 x %struct.MpegEncContext*], %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture*, %struct.Picture*, %struct.Picture*, [3 x i8*], [3 x i32], i16*, [3 x i16*], [20 x i16], i32, i32, i8*, i8*, i8*, i8*, i8*, [16 x i16]*, [3 x [16 x i16]*], i32, i8*, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, i32, i32, %struct.DSPContext, i32, i32, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i8*], [2 x [2 x i8*]], i32, i32, i32, [2 x [4 x [2 x i32]]], [2 x [2 x i32]], [2 x [2 x [2 x i32]]], i8*, [2 x [64 x i16]], %struct.MotionEstContext, i32, i32, i32, i32, i32, i32, i16*, [6 x i32], [6 x i32], [3 x i8*], i32*, [64 x i16], [64 x i16], [64 x i16], [64 x i16], i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [8 x i32], [64 x i32]*, [64 x i32]*, [2 x [64 x i16]]*, [2 x [64 x i16]]*, [12 x i32], %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, [64 x i32]*, [2 x i32], [64 x i16]*, i8*, i64, i64, i32, i32, %struct.RateControlContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, %struct.GetBitContext, i32, i32, i32, %struct.ParseContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [2 x i32]], [2 x [2 x i32]], [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, [3 x i32], %struct.MJpegContext*, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [65 x [65 x [2 x i32]]]]*, i32, i32, %struct.GetBitContext, i32, i32, i32, i8*, i32, [2 x [2 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i8*, i32, [12 x i16*], [64 x i16]*, [8 x [64 x i16]]*, i32 (%struct.MpegEncContext*, [64 x i16]*)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, void (%struct.MpegEncContext*, i16*)* }
+ %struct.ParseContext = type { i8*, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.Picture = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*], [3 x i8*], [2 x [2 x i16]*], i32*, [2 x i32], i32, i32, i32, i32, [2 x [16 x i32]], [2 x i32], i32, i32, i16*, i16*, i8*, i32*, i32 }
+ %struct.Plane = type { i32, i32, [8 x [4 x %struct.SubBand]] }
+ %struct.Predictor = type { double, double, double }
+ %struct.PutBitContext = type { i32, i32, i8*, i8*, i8* }
+ %struct.RangeCoder = type { i32, i32, i32, i32, [256 x i8], [256 x i8], i8*, i8*, i8* }
+ %struct.RateControlContext = type { %struct.FILE*, i32, %struct.RateControlEntry*, double, [5 x %struct.Predictor], double, double, double, double, double, [5 x double], i32, i32, [5 x i64], [5 x i64], [5 x i64], [5 x i64], [5 x i32], i32, i8*, float, i32, %struct.AVEvalExpr* }
+ %struct.RateControlEntry = type { i32, float, i32, i32, i32, i32, i32, i64, i32, float, i32, i32, i32, i32, i32, i32 }
+ %struct.RcOverride = type { i32, i32, i32, float }
+ %struct.ScanTable = type { i8*, [64 x i8], [64 x i8] }
+ %struct.SnowContext = type { %struct.AVCodecContext*, %struct.RangeCoder, %struct.DSPContext, %struct.AVFrame, %struct.AVFrame, %struct.AVFrame, [8 x %struct.AVFrame], %struct.AVFrame, [32 x i8], [4224 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [8 x [2 x i16]*], [8 x i32*], i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.Plane], %struct.BlockNode*, [1024 x i32], i32, %struct.slice_buffer, %struct.MpegEncContext }
+ %struct.SubBand = type { i32, i32, i32, i32, i32, i32*, i32, i32, i32, %struct.x_and_coeff*, %struct.SubBand*, [519 x [32 x i8]] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+ %struct.slice_buffer = type { i32**, i32**, i32, i32, i32, i32, i32* }
+ %struct.x_and_coeff = type { i16, i16 }
+
+define fastcc void @iterative_me(%struct.SnowContext* %s) {
+entry:
+ %state = alloca [4224 x i8], align 8 ; <[4224 x i8]*> [#uses=0]
+ %best_rd4233 = alloca i32, align 4 ; <i32*> [#uses=0]
+ %tmp21 = getelementptr %struct.SnowContext* %s, i32 0, i32 36 ; <i32*> [#uses=2]
+ br label %bb4198
+
+bb79: ; preds = %bb4189.preheader
+ br i1 false, label %cond_next239, label %cond_true
+
+cond_true: ; preds = %bb79
+ ret void
+
+cond_next239: ; preds = %bb79
+ %tmp286 = alloca i8, i32 0 ; <i8*> [#uses=0]
+ ret void
+
+bb4198: ; preds = %bb4189.preheader, %entry
+ br i1 false, label %bb4189.preheader, label %bb4204
+
+bb4189.preheader: ; preds = %bb4198
+ br i1 false, label %bb79, label %bb4198
+
+bb4204: ; preds = %bb4198
+ br i1 false, label %bb4221, label %cond_next4213
+
+cond_next4213: ; preds = %bb4204
+ ret void
+
+bb4221: ; preds = %bb4204
+ br i1 false, label %bb5242.preheader, label %UnifiedReturnBlock
+
+bb5242.preheader: ; preds = %bb4221
+ br label %bb5242
+
+bb4231: ; preds = %bb5233
+ %tmp4254.sum = add i32 0, 1 ; <i32> [#uses=2]
+ br i1 false, label %bb4559, label %cond_next4622
+
+bb4559: ; preds = %bb4231
+ ret void
+
+cond_next4622: ; preds = %bb4231
+ %tmp4637 = load i16* null ; <i16> [#uses=1]
+ %tmp46374638 = sext i16 %tmp4637 to i32 ; <i32> [#uses=1]
+ %tmp4642 = load i16* null ; <i16> [#uses=1]
+ %tmp46424643 = sext i16 %tmp4642 to i32 ; <i32> [#uses=1]
+ %tmp4648 = load i16* null ; <i16> [#uses=1]
+ %tmp46484649 = sext i16 %tmp4648 to i32 ; <i32> [#uses=1]
+ %tmp4653 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 0 ; <i16*> [#uses=1]
+ %tmp4654 = load i16* %tmp4653 ; <i16> [#uses=1]
+ %tmp46544655 = sext i16 %tmp4654 to i32 ; <i32> [#uses=1]
+ %tmp4644 = add i32 %tmp46374638, 2 ; <i32> [#uses=1]
+ %tmp4650 = add i32 %tmp4644, %tmp46424643 ; <i32> [#uses=1]
+ %tmp4656 = add i32 %tmp4650, %tmp46484649 ; <i32> [#uses=1]
+ %tmp4657 = add i32 %tmp4656, %tmp46544655 ; <i32> [#uses=2]
+ %tmp4658 = ashr i32 %tmp4657, 2 ; <i32> [#uses=1]
+ %tmp4662 = load i16* null ; <i16> [#uses=1]
+ %tmp46624663 = sext i16 %tmp4662 to i32 ; <i32> [#uses=1]
+ %tmp4672 = getelementptr %struct.BlockNode* null, i32 0, i32 1 ; <i16*> [#uses=1]
+ %tmp4673 = load i16* %tmp4672 ; <i16> [#uses=1]
+ %tmp46734674 = sext i16 %tmp4673 to i32 ; <i32> [#uses=1]
+ %tmp4678 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 1 ; <i16*> [#uses=1]
+ %tmp4679 = load i16* %tmp4678 ; <i16> [#uses=1]
+ %tmp46794680 = sext i16 %tmp4679 to i32 ; <i32> [#uses=1]
+ %tmp4669 = add i32 %tmp46624663, 2 ; <i32> [#uses=1]
+ %tmp4675 = add i32 %tmp4669, 0 ; <i32> [#uses=1]
+ %tmp4681 = add i32 %tmp4675, %tmp46734674 ; <i32> [#uses=1]
+ %tmp4682 = add i32 %tmp4681, %tmp46794680 ; <i32> [#uses=2]
+ %tmp4683 = ashr i32 %tmp4682, 2 ; <i32> [#uses=1]
+ %tmp4703 = load i32* %tmp21 ; <i32> [#uses=1]
+ %tmp4707 = shl i32 %tmp4703, 0 ; <i32> [#uses=4]
+ %tmp4710 = load %struct.BlockNode** null ; <%struct.BlockNode*> [#uses=6]
+ %tmp4713 = mul i32 %tmp4707, %mb_y.4 ; <i32> [#uses=1]
+ %tmp4715 = add i32 %tmp4713, %mb_x.7 ; <i32> [#uses=7]
+ store i8 0, i8* null
+ store i8 0, i8* null
+ %tmp47594761 = bitcast %struct.BlockNode* null to i8* ; <i8*> [#uses=2]
+ call void @llvm.memcpy.i32( i8* null, i8* %tmp47594761, i32 10, i32 0 )
+ %tmp4716.sum5775 = add i32 %tmp4715, 1 ; <i32> [#uses=1]
+ %tmp4764 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5775 ; <%struct.BlockNode*> [#uses=1]
+ %tmp47644766 = bitcast %struct.BlockNode* %tmp4764 to i8* ; <i8*> [#uses=1]
+ %tmp4716.sum5774 = add i32 %tmp4715, %tmp4707 ; <i32> [#uses=0]
+ %tmp47704772 = bitcast %struct.BlockNode* null to i8* ; <i8*> [#uses=1]
+ %tmp4774 = add i32 %tmp4707, 1 ; <i32> [#uses=1]
+ %tmp4716.sum5773 = add i32 %tmp4774, %tmp4715 ; <i32> [#uses=1]
+ %tmp4777 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5773 ; <%struct.BlockNode*> [#uses=1]
+ %tmp47774779 = bitcast %struct.BlockNode* %tmp4777 to i8* ; <i8*> [#uses=1]
+ %tmp4781 = icmp slt i32 %mb_x.7, 0 ; <i1> [#uses=1]
+ %tmp4788 = or i1 %tmp4781, %tmp4784 ; <i1> [#uses=2]
+ br i1 %tmp4788, label %cond_true4791, label %cond_next4794
+
+cond_true4791: ; preds = %cond_next4622
+ unreachable
+
+cond_next4794: ; preds = %cond_next4622
+ %tmp4797 = icmp slt i32 %mb_x.7, %tmp4707 ; <i1> [#uses=1]
+ br i1 %tmp4797, label %cond_next4803, label %cond_true4800
+
+cond_true4800: ; preds = %cond_next4794
+ unreachable
+
+cond_next4803: ; preds = %cond_next4794
+ %tmp4825 = ashr i32 %tmp4657, 12 ; <i32> [#uses=1]
+ shl i32 %tmp4682, 4 ; <i32>:0 [#uses=1]
+ %tmp4828 = and i32 %0, -64 ; <i32> [#uses=1]
+ %tmp4831 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 2 ; <i8*> [#uses=0]
+ %tmp4826 = add i32 %tmp4828, %tmp4825 ; <i32> [#uses=1]
+ %tmp4829 = add i32 %tmp4826, 0 ; <i32> [#uses=1]
+ %tmp4835 = add i32 %tmp4829, 0 ; <i32> [#uses=1]
+ store i32 %tmp4835, i32* null
+ %tmp48534854 = trunc i32 %tmp4658 to i16 ; <i16> [#uses=1]
+ %tmp4856 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 0 ; <i16*> [#uses=1]
+ store i16 %tmp48534854, i16* %tmp4856
+ %tmp48574858 = trunc i32 %tmp4683 to i16 ; <i16> [#uses=1]
+ %tmp4860 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 1 ; <i16*> [#uses=1]
+ store i16 %tmp48574858, i16* %tmp4860
+ %tmp4866 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 4 ; <i8*> [#uses=0]
+ br i1 false, label %bb4933, label %cond_false4906
+
+cond_false4906: ; preds = %cond_next4803
+ call void @llvm.memcpy.i32( i8* %tmp47594761, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp47644766, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp47704772, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp47774779, i8* null, i32 10, i32 0 )
+ br label %bb5215
+
+bb4933: ; preds = %bb5215, %cond_next4803
+ br i1 false, label %cond_true4944, label %bb5215
+
+cond_true4944: ; preds = %bb4933
+ %tmp4982 = load i32* %tmp21 ; <i32> [#uses=1]
+ %tmp4986 = shl i32 %tmp4982, 0 ; <i32> [#uses=2]
+ %tmp4992 = mul i32 %tmp4986, %mb_y.4 ; <i32> [#uses=1]
+ %tmp4994 = add i32 %tmp4992, %mb_x.7 ; <i32> [#uses=5]
+ %tmp4995.sum5765 = add i32 %tmp4994, 1 ; <i32> [#uses=1]
+ %tmp5043 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5765 ; <%struct.BlockNode*> [#uses=1]
+ %tmp50435045 = bitcast %struct.BlockNode* %tmp5043 to i8* ; <i8*> [#uses=2]
+ call void @llvm.memcpy.i32( i8* null, i8* %tmp50435045, i32 10, i32 0 )
+ %tmp4995.sum5764 = add i32 %tmp4994, %tmp4986 ; <i32> [#uses=1]
+ %tmp5049 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5764 ; <%struct.BlockNode*> [#uses=1]
+ %tmp50495051 = bitcast %struct.BlockNode* %tmp5049 to i8* ; <i8*> [#uses=2]
+ call void @llvm.memcpy.i32( i8* null, i8* %tmp50495051, i32 10, i32 0 )
+ %tmp4995.sum5763 = add i32 0, %tmp4994 ; <i32> [#uses=1]
+ %tmp5056 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5763 ; <%struct.BlockNode*> [#uses=1]
+ %tmp50565058 = bitcast %struct.BlockNode* %tmp5056 to i8* ; <i8*> [#uses=1]
+ br i1 %tmp4788, label %cond_true5070, label %cond_next5073
+
+cond_true5070: ; preds = %cond_true4944
+ unreachable
+
+cond_next5073: ; preds = %cond_true4944
+ %tmp5139 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 1 ; <i16*> [#uses=0]
+ %tmp5145 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 4 ; <i8*> [#uses=0]
+ call void @llvm.memcpy.i32( i8* %tmp50435045, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp50495051, i8* null, i32 10, i32 0 )
+ call void @llvm.memcpy.i32( i8* %tmp50565058, i8* null, i32 10, i32 0 )
+ br label %bb5215
+
+bb5215: ; preds = %cond_next5073, %bb4933, %cond_false4906
+ %i4232.3 = phi i32 [ 0, %cond_false4906 ], [ 0, %cond_next5073 ], [ 0, %bb4933 ] ; <i32> [#uses=1]
+ %tmp5217 = icmp slt i32 %i4232.3, 4 ; <i1> [#uses=1]
+ br i1 %tmp5217, label %bb4933, label %bb5220
+
+bb5220: ; preds = %bb5215
+ br i1 false, label %bb5230, label %cond_true5226
+
+cond_true5226: ; preds = %bb5220
+ ret void
+
+bb5230: ; preds = %bb5220
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb5233
+
+bb5233: ; preds = %bb5233.preheader, %bb5230
+ %indvar = phi i32 [ 0, %bb5233.preheader ], [ %indvar.next, %bb5230 ] ; <i32> [#uses=2]
+ %mb_x.7 = shl i32 %indvar, 1 ; <i32> [#uses=4]
+ br i1 false, label %bb4231, label %bb5239
+
+bb5239: ; preds = %bb5233
+ %indvar.next37882 = add i32 %indvar37881, 1 ; <i32> [#uses=1]
+ br label %bb5242
+
+bb5242: ; preds = %bb5239, %bb5242.preheader
+ %indvar37881 = phi i32 [ 0, %bb5242.preheader ], [ %indvar.next37882, %bb5239 ] ; <i32> [#uses=2]
+ %mb_y.4 = shl i32 %indvar37881, 1 ; <i32> [#uses=3]
+ br i1 false, label %bb5233.preheader, label %bb5248
+
+bb5233.preheader: ; preds = %bb5242
+ %tmp4784 = icmp slt i32 %mb_y.4, 0 ; <i1> [#uses=1]
+ br label %bb5233
+
+bb5248: ; preds = %bb5242
+ ret void
+
+UnifiedReturnBlock: ; preds = %bb4221
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/ARM/2007-08-15-ReuseBug.ll b/test/CodeGen/ARM/2007-08-15-ReuseBug.ll
new file mode 100644
index 0000000..30b72e0
--- /dev/null
+++ b/test/CodeGen/ARM/2007-08-15-ReuseBug.ll
@@ -0,0 +1,106 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6
+; PR1609
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+@_C_nextcmd = external global i32 ; <i32*> [#uses=2]
+@_C_cmds = external global [100 x i8*] ; <[100 x i8*]*> [#uses=2]
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=1]
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ br label %cond_next212.i
+
+bb21.i: ; preds = %cond_next212.i
+ br label %cond_next212.i
+
+bb24.i: ; preds = %cond_next212.i
+ ret i32 0
+
+bb27.i: ; preds = %cond_next212.i
+ ret i32 0
+
+bb30.i: ; preds = %cond_next212.i
+ %tmp205399.i = add i32 %argc_addr.2358.0.i, -1 ; <i32> [#uses=1]
+ br label %cond_next212.i
+
+bb33.i: ; preds = %cond_next212.i
+ ret i32 0
+
+cond_next73.i: ; preds = %cond_next212.i
+ ret i32 0
+
+bb75.i: ; preds = %cond_next212.i
+ ret i32 0
+
+bb77.i: ; preds = %cond_next212.i
+ ret i32 0
+
+bb79.i: ; preds = %cond_next212.i
+ ret i32 0
+
+bb102.i: ; preds = %cond_next212.i
+ br i1 false, label %cond_true110.i, label %cond_next123.i
+
+cond_true110.i: ; preds = %bb102.i
+ %tmp116.i = getelementptr i8** %argv_addr.2321.0.i, i32 2 ; <i8**> [#uses=1]
+ %tmp117.i = load i8** %tmp116.i ; <i8*> [#uses=1]
+ %tmp126425.i = call %struct.FILE* @fopen( i8* %tmp117.i, i8* getelementptr ([2 x i8]* @.str44, i32 0, i32 0) ) ; <%struct.FILE*> [#uses=0]
+ ret i32 0
+
+cond_next123.i: ; preds = %bb102.i
+ %tmp122.i = getelementptr i8* %tmp215.i, i32 2 ; <i8*> [#uses=0]
+ ret i32 0
+
+bb162.i: ; preds = %cond_next212.i
+ ret i32 0
+
+C_addcmd.exit120.i: ; preds = %cond_next212.i
+ %tmp3.i.i.i.i105.i = call i8* @calloc( i32 15, i32 1 ) ; <i8*> [#uses=1]
+ %tmp1.i108.i = getelementptr [100 x i8*]* @_C_cmds, i32 0, i32 0 ; <i8**> [#uses=1]
+ store i8* %tmp3.i.i.i.i105.i, i8** %tmp1.i108.i, align 4
+ %tmp.i91.i = load i32* @_C_nextcmd, align 4 ; <i32> [#uses=1]
+ store i32 0, i32* @_C_nextcmd, align 4
+ %tmp3.i.i.i.i95.i = call i8* @calloc( i32 15, i32 1 ) ; <i8*> [#uses=1]
+ %tmp1.i98.i = getelementptr [100 x i8*]* @_C_cmds, i32 0, i32 %tmp.i91.i ; <i8**> [#uses=1]
+ store i8* %tmp3.i.i.i.i95.i, i8** %tmp1.i98.i, align 4
+ br label %cond_next212.i
+
+bb174.i: ; preds = %cond_next212.i
+ ret i32 0
+
+bb192.i: ; preds = %cond_next212.i
+ br label %cond_next212.i
+
+cond_next212.i: ; preds = %cond_next212.i, %cond_next212.i, %cond_next212.i, %cond_next212.i, %bb192.i, %C_addcmd.exit120.i, %bb30.i, %bb21.i, %entry
+ %max_d.3 = phi i32 [ -1, %entry ], [ %max_d.3, %bb30.i ], [ %max_d.3, %bb21.i ], [ %max_d.3, %C_addcmd.exit120.i ], [ 0, %bb192.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ] ; <i32> [#uses=7]
+ %argv_addr.2321.0.i = phi i8** [ %argv, %entry ], [ %tmp214.i, %bb192.i ], [ %tmp214.i, %C_addcmd.exit120.i ], [ %tmp214.i, %bb30.i ], [ %tmp214.i, %bb21.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ] ; <i8**> [#uses=2]
+ %argc_addr.2358.0.i = phi i32 [ %argc, %entry ], [ %tmp205399.i, %bb30.i ], [ 0, %bb21.i ], [ 0, %C_addcmd.exit120.i ], [ 0, %bb192.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ] ; <i32> [#uses=1]
+ %tmp214.i = getelementptr i8** %argv_addr.2321.0.i, i32 1 ; <i8**> [#uses=9]
+ %tmp215.i = load i8** %tmp214.i ; <i8*> [#uses=1]
+ %tmp1314.i = sext i8 0 to i32 ; <i32> [#uses=1]
+ switch i32 %tmp1314.i, label %bb192.i [
+ i32 76, label %C_addcmd.exit120.i
+ i32 77, label %bb174.i
+ i32 83, label %bb162.i
+ i32 97, label %bb33.i
+ i32 98, label %bb21.i
+ i32 99, label %bb24.i
+ i32 100, label %bb27.i
+ i32 101, label %cond_next212.i
+ i32 102, label %bb102.i
+ i32 105, label %bb75.i
+ i32 109, label %bb30.i
+ i32 113, label %cond_next212.i
+ i32 114, label %cond_next73.i
+ i32 115, label %bb79.i
+ i32 116, label %cond_next212.i
+ i32 118, label %bb77.i
+ i32 119, label %cond_next212.i
+ ]
+}
+
+declare %struct.FILE* @fopen(i8*, i8*)
+
+declare i8* @calloc(i32, i32)
diff --git a/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll b/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
new file mode 100644
index 0000000..ff01506
--- /dev/null
+++ b/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=local
+; PR1925
+
+ %struct.encode_aux_nearestmatch = type { i32*, i32*, i32*, i32*, i32, i32 }
+ %struct.encode_aux_pigeonhole = type { float, float, i32, i32, i32*, i32, i32*, i32*, i32* }
+ %struct.encode_aux_threshmatch = type { float*, i32*, i32, i32 }
+ %struct.oggpack_buffer = type { i32, i32, i8*, i8*, i32 }
+ %struct.static_codebook = type { i32, i32, i32*, i32, i32, i32, i32, i32, i32*, %struct.encode_aux_nearestmatch*, %struct.encode_aux_threshmatch*, %struct.encode_aux_pigeonhole*, i32 }
+
+define i32 @vorbis_staticbook_pack(%struct.static_codebook* %c, %struct.oggpack_buffer* %opb) {
+entry:
+ %opb_addr = alloca %struct.oggpack_buffer* ; <%struct.oggpack_buffer**> [#uses=1]
+ %tmp1 = load %struct.oggpack_buffer** %opb_addr, align 4 ; <%struct.oggpack_buffer*> [#uses=1]
+ call void @oggpack_write( %struct.oggpack_buffer* %tmp1, i32 5653314, i32 24 ) nounwind
+ call void @oggpack_write( %struct.oggpack_buffer* null, i32 0, i32 24 ) nounwind
+ unreachable
+}
+
+declare void @oggpack_write(%struct.oggpack_buffer*, i32, i32)
diff --git a/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll b/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
new file mode 100644
index 0000000..06bc987
--- /dev/null
+++ b/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=local
+; PR1925
+
+ %"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" }
+ %"struct.kc::impl_ID" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_casestring__Str"*, i32, %"struct.kc::impl_casestring__Str"* }
+ %"struct.kc::impl_abstract_phylum" = type { i32 (...)** }
+ %"struct.kc::impl_casestring__Str" = type { %"struct.kc::impl_abstract_phylum", i8* }
+
+define %"struct.kc::impl_ID"* @_ZN2kc18f_typeofunpsubtermEPNS_15impl_unpsubtermEPNS_7impl_IDE(%"struct.kc::impl_Ccode_option"* %a_unpsubterm, %"struct.kc::impl_ID"* %a_operator) {
+entry:
+ %tmp8 = getelementptr %"struct.kc::impl_Ccode_option"* %a_unpsubterm, i32 0, i32 0, i32 0 ; <i32 (...)***> [#uses=0]
+ br i1 false, label %bb41, label %bb55
+
+bb41: ; preds = %entry
+ ret %"struct.kc::impl_ID"* null
+
+bb55: ; preds = %entry
+ %tmp67 = tail call i32 null( %"struct.kc::impl_abstract_phylum"* null ) ; <i32> [#uses=0]
+ %tmp97 = tail call i32 null( %"struct.kc::impl_abstract_phylum"* null ) ; <i32> [#uses=0]
+ ret %"struct.kc::impl_ID"* null
+}
diff --git a/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll b/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll
new file mode 100644
index 0000000..a604c5c
--- /dev/null
+++ b/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=arm -mattr=+v6 | not grep 255
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ br label %bb1
+bb1: ; preds = %entry
+ %tmp3.i.i = load i8* null, align 1 ; <i8> [#uses=1]
+ %tmp4.i.i = icmp slt i8 %tmp3.i.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp4.i.i, label %bb2, label %bb3
+bb2: ; preds = %bb1
+ ret i32 1
+bb3: ; preds = %bb1
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll b/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll
new file mode 100644
index 0000000..78c6222
--- /dev/null
+++ b/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+@accum = external global { double, double } ; <{ double, double }*> [#uses=1]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=1]
+
+define i32 @main() {
+entry:
+ br label %bb74.i
+bb74.i: ; preds = %bb88.i, %bb74.i, %entry
+ br i1 false, label %bb88.i, label %bb74.i
+bb88.i: ; preds = %bb74.i
+ br i1 false, label %mandel.exit, label %bb74.i
+mandel.exit: ; preds = %bb88.i
+ %tmp2 = volatile load double* getelementptr ({ double, double }* @accum, i32 0, i32 0), align 8 ; <double> [#uses=1]
+ %tmp23 = fptosi double %tmp2 to i32 ; <i32> [#uses=1]
+ %tmp5 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %tmp23 ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll b/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll
new file mode 100644
index 0000000..234c7b6
--- /dev/null
+++ b/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll
@@ -0,0 +1,60 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+@numBinsY = external global i32 ; <i32*> [#uses=1]
+
+declare double @pow(double, double)
+
+define void @main(i32 %argc, i8** %argv) noreturn nounwind {
+entry:
+ br i1 false, label %bb34.outer.i.i.i, label %cond_false674
+bb34.outer.i.i.i: ; preds = %entry
+ br i1 false, label %bb2.i.i.i, label %bb47.i.i.i
+bb2.i.i.i: ; preds = %bb34.outer.i.i.i
+ %tmp24.i.i.i = call double @pow( double 0.000000e+00, double 2.000000e+00 ) ; <double> [#uses=0]
+ ret void
+bb47.i.i.i: ; preds = %bb34.outer.i.i.i
+ br i1 false, label %bb220.i.i.i, label %bb62.preheader.i.i.i
+bb62.preheader.i.i.i: ; preds = %bb47.i.i.i
+ ret void
+bb220.i.i.i: ; preds = %bb47.i.i.i
+ br i1 false, label %bb248.i.i.i, label %cond_next232.i.i.i
+cond_next232.i.i.i: ; preds = %bb220.i.i.i
+ ret void
+bb248.i.i.i: ; preds = %bb220.i.i.i
+ br i1 false, label %bb300.i.i.i, label %cond_false256.i.i.i
+cond_false256.i.i.i: ; preds = %bb248.i.i.i
+ ret void
+bb300.i.i.i: ; preds = %bb248.i.i.i
+ store i32 undef, i32* @numBinsY, align 4
+ ret void
+cond_false674: ; preds = %entry
+ ret void
+}
+
+ %struct.anon = type { %struct.rnode*, %struct.rnode* }
+ %struct.ch_set = type { { i8, i8 }*, %struct.ch_set* }
+ %struct.pat_list = type { i32, %struct.pat_list* }
+ %struct.rnode = type { i16, { %struct.anon }, i16, %struct.pat_list*, %struct.pat_list* }
+
+define fastcc { i16, %struct.rnode* }* @get_token(i8** %s) nounwind {
+entry:
+ br i1 false, label %bb42, label %bb78
+bb42: ; preds = %entry
+ br label %cond_next119.i
+bb17.i: ; preds = %cond_next119.i
+ br i1 false, label %cond_true53.i, label %cond_false99.i
+cond_true53.i: ; preds = %bb17.i
+ ret { i16, %struct.rnode* }* null
+cond_false99.i: ; preds = %bb17.i
+ %tmp106.i = malloc %struct.ch_set ; <%struct.ch_set*> [#uses=1]
+ br i1 false, label %bb126.i, label %cond_next119.i
+cond_next119.i: ; preds = %cond_false99.i, %bb42
+ %curr_ptr.0.reg2mem.0.i = phi %struct.ch_set* [ %tmp106.i, %cond_false99.i ], [ null, %bb42 ] ; <%struct.ch_set*> [#uses=2]
+ %prev_ptr.0.reg2mem.0.i = phi %struct.ch_set* [ %curr_ptr.0.reg2mem.0.i, %cond_false99.i ], [ undef, %bb42 ] ; <%struct.ch_set*> [#uses=1]
+ br i1 false, label %bb126.i, label %bb17.i
+bb126.i: ; preds = %cond_next119.i, %cond_false99.i
+ %prev_ptr.0.reg2mem.1.i = phi %struct.ch_set* [ %prev_ptr.0.reg2mem.0.i, %cond_next119.i ], [ %curr_ptr.0.reg2mem.0.i, %cond_false99.i ] ; <%struct.ch_set*> [#uses=0]
+ ret { i16, %struct.rnode* }* null
+bb78: ; preds = %entry
+ ret { i16, %struct.rnode* }* null
+}
diff --git a/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll b/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll
new file mode 100644
index 0000000..77418be
--- /dev/null
+++ b/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll
@@ -0,0 +1,258 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+ %struct.CONTENTBOX = type { i32, i32, i32, i32, i32 }
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.LOCBOX = type { i32, i32, i32, i32 }
+ %struct.SIDEBOX = type { i32, i32 }
+ %struct.UNCOMBOX = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.cellbox = type { i8*, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, double, double, double, double, double, i32, i32, %struct.CONTENTBOX*, %struct.UNCOMBOX*, [8 x %struct.tilebox*], %struct.SIDEBOX* }
+ %struct.termbox = type { %struct.termbox*, i32, i32, i32, i32, i32 }
+ %struct.tilebox = type { %struct.tilebox*, double, double, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.termbox*, %struct.LOCBOX* }
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=1]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=1]
[email protected] = external constant [9 x i8] ; <[9 x i8]*> [#uses=1]
+
+declare %struct.FILE* @fopen(i8*, i8*)
+
+declare i32 @strcmp(i8*, i8*)
+
+declare i32 @fscanf(%struct.FILE*, i8*, ...)
+
+define void @main(i32 %argc, i8** %argv) noreturn {
+entry:
+ br i1 false, label %cond_next48, label %cond_false674
+cond_next48: ; preds = %entry
+ %tmp61 = call %struct.FILE* @fopen( i8* null, i8* getelementptr ([2 x i8]* @.str127, i32 0, i32 0) ) ; <%struct.FILE*> [#uses=2]
+ br i1 false, label %bb220.i.i.i, label %bb62.preheader.i.i.i
+bb62.preheader.i.i.i: ; preds = %cond_next48
+ ret void
+bb220.i.i.i: ; preds = %cond_next48
+ br i1 false, label %bb248.i.i.i, label %cond_next232.i.i.i
+cond_next232.i.i.i: ; preds = %bb220.i.i.i
+ ret void
+bb248.i.i.i: ; preds = %bb220.i.i.i
+ br i1 false, label %bb300.i.i.i, label %cond_false256.i.i.i
+cond_false256.i.i.i: ; preds = %bb248.i.i.i
+ ret void
+bb300.i.i.i: ; preds = %bb248.i.i.i
+ br label %bb.i.i347.i
+bb.i.i347.i: ; preds = %bb.i.i347.i, %bb300.i.i.i
+ br i1 false, label %bb894.loopexit.i.i, label %bb.i.i347.i
+bb.i350.i: ; preds = %bb894.i.i
+ br i1 false, label %bb24.i.i, label %cond_false373.i.i
+bb24.i.i: ; preds = %bb24.i.i, %bb.i350.i
+ br i1 false, label %bb40.i.i, label %bb24.i.i
+bb40.i.i: ; preds = %bb24.i.i
+ br i1 false, label %bb177.i393.i, label %bb82.i.i
+bb82.i.i: ; preds = %bb40.i.i
+ ret void
+bb177.i393.i: ; preds = %bb40.i.i
+ br i1 false, label %bb894.i.i, label %bb192.i.i
+bb192.i.i: ; preds = %bb177.i393.i
+ ret void
+cond_false373.i.i: ; preds = %bb.i350.i
+ %tmp376.i.i = call i32 @strcmp( i8* null, i8* getelementptr ([9 x i8]* @.str8115, i32 0, i32 0) ) ; <i32> [#uses=0]
+ br i1 false, label %cond_true380.i.i, label %cond_next602.i.i
+cond_true380.i.i: ; preds = %cond_false373.i.i
+ %tmp394.i418.i = add i32 %cell.0.i.i, 1 ; <i32> [#uses=1]
+ %tmp397.i420.i = load %struct.cellbox** null, align 4 ; <%struct.cellbox*> [#uses=1]
+ br label %bb398.i.i
+bb398.i.i: ; preds = %bb398.i.i, %cond_true380.i.i
+ br i1 false, label %bb414.i.i, label %bb398.i.i
+bb414.i.i: ; preds = %bb398.i.i
+ br i1 false, label %bb581.i.i, label %bb455.i442.i
+bb455.i442.i: ; preds = %bb414.i.i
+ ret void
+bb581.i.i: ; preds = %bb581.i.i, %bb414.i.i
+ br i1 false, label %bb894.i.i, label %bb581.i.i
+cond_next602.i.i: ; preds = %cond_false373.i.i
+ br i1 false, label %bb609.i.i, label %bb661.i.i
+bb609.i.i: ; preds = %cond_next602.i.i
+ br label %bb620.i.i
+bb620.i.i: ; preds = %bb620.i.i, %bb609.i.i
+ %indvar166.i465.i = phi i32 [ %indvar.next167.i.i, %bb620.i.i ], [ 0, %bb609.i.i ] ; <i32> [#uses=1]
+ %tmp640.i.i = call i32 (%struct.FILE*, i8*, ...)* @fscanf( %struct.FILE* %tmp61, i8* getelementptr ([5 x i8]* @.str584, i32 0, i32 0), [1024 x i8]* null ) ; <i32> [#uses=0]
+ %tmp648.i.i = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp650.i468.i = icmp sgt i32 0, %tmp648.i.i ; <i1> [#uses=1]
+ %tmp624.i469.i = call i32 (%struct.FILE*, i8*, ...)* @fscanf( %struct.FILE* %tmp61, i8* getelementptr ([5 x i8]* @.str584, i32 0, i32 0), [1024 x i8]* null ) ; <i32> [#uses=0]
+ %indvar.next167.i.i = add i32 %indvar166.i465.i, 1 ; <i32> [#uses=1]
+ br i1 %tmp650.i468.i, label %bb653.i.i.loopexit, label %bb620.i.i
+bb653.i.i.loopexit: ; preds = %bb620.i.i
+ %tmp642.i466.i = add i32 0, 1 ; <i32> [#uses=1]
+ br label %bb894.i.i
+bb661.i.i: ; preds = %cond_next602.i.i
+ ret void
+bb894.loopexit.i.i: ; preds = %bb.i.i347.i
+ br label %bb894.i.i
+bb894.i.i: ; preds = %bb894.loopexit.i.i, %bb653.i.i.loopexit, %bb581.i.i, %bb177.i393.i
+ %pinctr.0.i.i = phi i32 [ 0, %bb894.loopexit.i.i ], [ %tmp642.i466.i, %bb653.i.i.loopexit ], [ %pinctr.0.i.i, %bb177.i393.i ], [ %pinctr.0.i.i, %bb581.i.i ] ; <i32> [#uses=2]
+ %soft.0.i.i = phi i32 [ undef, %bb894.loopexit.i.i ], [ %soft.0.i.i, %bb653.i.i.loopexit ], [ 0, %bb177.i393.i ], [ 1, %bb581.i.i ] ; <i32> [#uses=1]
+ %cell.0.i.i = phi i32 [ 0, %bb894.loopexit.i.i ], [ %cell.0.i.i, %bb653.i.i.loopexit ], [ 0, %bb177.i393.i ], [ %tmp394.i418.i, %bb581.i.i ] ; <i32> [#uses=2]
+ %ptr.0.i.i = phi %struct.cellbox* [ undef, %bb894.loopexit.i.i ], [ %ptr.0.i.i, %bb653.i.i.loopexit ], [ null, %bb177.i393.i ], [ %tmp397.i420.i, %bb581.i.i ] ; <%struct.cellbox*> [#uses=1]
+ br i1 false, label %bb.i350.i, label %bb902.i502.i
+bb902.i502.i: ; preds = %bb894.i.i
+ ret void
+cond_false674: ; preds = %entry
+ ret void
+}
+
+ %struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
+ %struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] }
+ %struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] }
+ %struct.lame_global_flags = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
+@scalefac_band.1 = external global [14 x i32] ; <[14 x i32]*> [#uses=2]
+
+declare fastcc i32 @init_outer_loop(%struct.lame_global_flags*, double*, %struct.gr_info*)
+
+define fastcc void @outer_loop(%struct.lame_global_flags* %gfp, double* %xr, i32 %targ_bits, double* %best_noise, %struct.III_psy_xmin* %l3_xmin, i32* %l3_enc, %struct.III_scalefac_t* %scalefac, %struct.gr_info* %cod_info, i32 %ch) {
+entry:
+ %cod_info.182 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 1 ; <i32*> [#uses=1]
+ br label %bb
+bb: ; preds = %bb226, %entry
+ %save_cod_info.1.1 = phi i32 [ undef, %entry ], [ %save_cod_info.1.1, %bb226 ] ; <i32> [#uses=2]
+ br i1 false, label %cond_next, label %cond_true
+cond_true: ; preds = %bb
+ ret void
+cond_next: ; preds = %bb
+ br i1 false, label %cond_next144, label %cond_false
+cond_false: ; preds = %cond_next
+ ret void
+cond_next144: ; preds = %cond_next
+ br i1 false, label %cond_next205, label %cond_true163
+cond_true163: ; preds = %cond_next144
+ br i1 false, label %bb34.i, label %bb.i53
+bb.i53: ; preds = %cond_true163
+ ret void
+bb34.i: ; preds = %cond_true163
+ %tmp37.i55 = load i32* null, align 4 ; <i32> [#uses=1]
+ br i1 false, label %bb65.preheader.i, label %bb78.i
+bb65.preheader.i: ; preds = %bb34.i
+ br label %bb65.outer.us.i
+bb65.outer.us.i: ; preds = %bb65.outer.us.i, %bb65.preheader.i
+ br i1 false, label %bb78.i, label %bb65.outer.us.i
+bb78.i: ; preds = %bb65.outer.us.i, %bb34.i
+ br i1 false, label %bb151.i.preheader, label %bb90.i
+bb90.i: ; preds = %bb78.i
+ ret void
+bb151.i.preheader: ; preds = %bb78.i
+ br label %bb151.i
+bb151.i: ; preds = %bb226.backedge.i, %bb151.i.preheader
+ %i.154.i = phi i32 [ %tmp15747.i, %bb226.backedge.i ], [ 0, %bb151.i.preheader ] ; <i32> [#uses=2]
+ %tmp15747.i = add i32 %i.154.i, 1 ; <i32> [#uses=3]
+ br i1 false, label %bb155.i, label %bb226.backedge.i
+bb226.backedge.i: ; preds = %cond_next215.i, %bb151.i
+ %tmp228.i71 = icmp slt i32 %tmp15747.i, 3 ; <i1> [#uses=1]
+ br i1 %tmp228.i71, label %bb151.i, label %amp_scalefac_bands.exit
+bb155.i: ; preds = %cond_next215.i, %bb151.i
+ %indvar90.i = phi i32 [ %indvar.next91.i, %cond_next215.i ], [ 0, %bb151.i ] ; <i32> [#uses=2]
+ %sfb.3.reg2mem.0.i = add i32 %indvar90.i, %tmp37.i55 ; <i32> [#uses=4]
+ %tmp161.i = getelementptr [4 x [21 x double]]* null, i32 0, i32 %tmp15747.i, i32 %sfb.3.reg2mem.0.i ; <double*> [#uses=1]
+ %tmp162.i74 = load double* %tmp161.i, align 4 ; <double> [#uses=0]
+ br i1 false, label %cond_true167.i, label %cond_next215.i
+cond_true167.i: ; preds = %bb155.i
+ %tmp173.i = getelementptr %struct.III_scalefac_t* null, i32 0, i32 1, i32 %sfb.3.reg2mem.0.i, i32 %i.154.i ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp173.i, align 4
+ %tmp182.1.i = getelementptr [14 x i32]* @scalefac_band.1, i32 0, i32 %sfb.3.reg2mem.0.i ; <i32*> [#uses=0]
+ %tmp185.i78 = add i32 %sfb.3.reg2mem.0.i, 1 ; <i32> [#uses=1]
+ %tmp187.1.i = getelementptr [14 x i32]* @scalefac_band.1, i32 0, i32 %tmp185.i78 ; <i32*> [#uses=1]
+ %tmp188.i = load i32* %tmp187.1.i, align 4 ; <i32> [#uses=1]
+ %tmp21153.i = icmp slt i32 0, %tmp188.i ; <i1> [#uses=1]
+ br i1 %tmp21153.i, label %bb190.preheader.i, label %cond_next215.i
+bb190.preheader.i: ; preds = %cond_true167.i
+ ret void
+cond_next215.i: ; preds = %cond_true167.i, %bb155.i
+ %indvar.next91.i = add i32 %indvar90.i, 1 ; <i32> [#uses=2]
+ %exitcond99.i87 = icmp eq i32 %indvar.next91.i, 0 ; <i1> [#uses=1]
+ br i1 %exitcond99.i87, label %bb226.backedge.i, label %bb155.i
+amp_scalefac_bands.exit: ; preds = %bb226.backedge.i
+ br i1 false, label %bb19.i, label %bb.i16
+bb.i16: ; preds = %amp_scalefac_bands.exit
+ ret void
+bb19.i: ; preds = %amp_scalefac_bands.exit
+ br i1 false, label %bb40.outer.i, label %cond_next205
+bb40.outer.i: ; preds = %bb19.i
+ ret void
+cond_next205: ; preds = %bb19.i, %cond_next144
+ br i1 false, label %bb226, label %cond_true210
+cond_true210: ; preds = %cond_next205
+ br i1 false, label %bb226, label %cond_true217
+cond_true217: ; preds = %cond_true210
+ %tmp221 = call fastcc i32 @init_outer_loop( %struct.lame_global_flags* %gfp, double* %xr, %struct.gr_info* %cod_info ) ; <i32> [#uses=0]
+ ret void
+bb226: ; preds = %cond_true210, %cond_next205
+ br i1 false, label %bb231, label %bb
+bb231: ; preds = %bb226
+ store i32 %save_cod_info.1.1, i32* %cod_info.182
+ ret void
+}
+
+ %struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
+ %struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] }
+ %struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] }
+ %struct.lame_global_flags = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
+
+define fastcc void @outer_loop2(%struct.lame_global_flags* %gfp, double* %xr, i32 %targ_bits, double* %best_noise, %struct.III_psy_xmin* %l3_xmin, i32* %l3_enc, %struct.III_scalefac_t* %scalefac, %struct.gr_info* %cod_info, i32 %ch) {
+entry:
+ %cod_info.20128.1 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 20, i32 1 ; <i32*> [#uses=1]
+ %cod_info.20128.2 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 20, i32 2 ; <i32*> [#uses=1]
+ %cod_info.20128.3 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 20, i32 3 ; <i32*> [#uses=1]
+ br label %bb
+bb: ; preds = %bb226, %entry
+ %save_cod_info.19.1 = phi i32* [ undef, %entry ], [ %save_cod_info.19.0, %bb226 ] ; <i32*> [#uses=1]
+ %save_cod_info.0.1 = phi i32 [ undef, %entry ], [ %save_cod_info.0.0, %bb226 ] ; <i32> [#uses=1]
+ br i1 false, label %cond_next144, label %cond_false
+cond_false: ; preds = %bb
+ br i1 false, label %cond_true56, label %cond_false78
+cond_true56: ; preds = %cond_false
+ br i1 false, label %inner_loop.exit, label %cond_next85
+inner_loop.exit: ; preds = %cond_true56
+ br i1 false, label %cond_next104, label %cond_false96
+cond_false78: ; preds = %cond_false
+ ret void
+cond_next85: ; preds = %cond_true56
+ ret void
+cond_false96: ; preds = %inner_loop.exit
+ ret void
+cond_next104: ; preds = %inner_loop.exit
+ br i1 false, label %cond_next144, label %cond_false110
+cond_false110: ; preds = %cond_next104
+ ret void
+cond_next144: ; preds = %cond_next104, %bb
+ %save_cod_info.19.0 = phi i32* [ %save_cod_info.19.1, %bb ], [ null, %cond_next104 ] ; <i32*> [#uses=1]
+ %save_cod_info.4.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ] ; <i32> [#uses=1]
+ %save_cod_info.3.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ] ; <i32> [#uses=1]
+ %save_cod_info.2.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ] ; <i32> [#uses=1]
+ %save_cod_info.1.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ] ; <i32> [#uses=1]
+ %save_cod_info.0.0 = phi i32 [ %save_cod_info.0.1, %bb ], [ 0, %cond_next104 ] ; <i32> [#uses=1]
+ %over.1 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ] ; <i32> [#uses=1]
+ %best_over.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ] ; <i32> [#uses=1]
+ %notdone.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ] ; <i32> [#uses=1]
+ %tmp147 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp148 = icmp eq i32 %tmp147, 0 ; <i1> [#uses=1]
+ %tmp153 = icmp eq i32 %over.1, 0 ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp148, %tmp153 ; <i1> [#uses=1]
+ %notdone.2 = select i1 %bothcond, i32 0, i32 %notdone.0 ; <i32> [#uses=1]
+ br i1 false, label %cond_next205, label %cond_true163
+cond_true163: ; preds = %cond_next144
+ ret void
+cond_next205: ; preds = %cond_next144
+ br i1 false, label %bb226, label %cond_true210
+cond_true210: ; preds = %cond_next205
+ ret void
+bb226: ; preds = %cond_next205
+ %tmp228 = icmp eq i32 %notdone.2, 0 ; <i1> [#uses=1]
+ br i1 %tmp228, label %bb231, label %bb
+bb231: ; preds = %bb226
+ store i32 %save_cod_info.1.0, i32* null
+ store i32 %save_cod_info.2.0, i32* null
+ store i32 %save_cod_info.3.0, i32* null
+ store i32 %save_cod_info.4.0, i32* null
+ store i32 0, i32* %cod_info.20128.1
+ store i32 0, i32* %cod_info.20128.2
+ store i32 0, i32* %cod_info.20128.3
+ %tmp244245 = sitofp i32 %best_over.0 to double ; <double> [#uses=1]
+ store double %tmp244245, double* %best_noise, align 4
+ ret void
+}
diff --git a/test/CodeGen/ARM/2008-04-11-PHIofImpDef.ll b/test/CodeGen/ARM/2008-04-11-PHIofImpDef.ll
new file mode 100644
index 0000000..33bd4de
--- /dev/null
+++ b/test/CodeGen/ARM/2008-04-11-PHIofImpDef.ll
@@ -0,0 +1,3544 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+declare void @foo(i8*, i8*, i32, i32, i32, i32, i32, i32, i32)
+
+define void @t() nounwind {
+ br label %1
+; <label>:1 ; preds = %0
+ br label %bb4351.i
+bb4351.i: ; preds = %1
+ switch i32 0, label %bb4411.i [
+ i32 1, label %bb4354.i
+ i32 2, label %bb4369.i
+ ]
+bb4354.i: ; preds = %bb4351.i
+ br label %t.exit
+bb4369.i: ; preds = %bb4351.i
+ br label %bb4374.i
+bb4374.i: ; preds = %bb4369.i
+ br label %bb4411.i
+bb4411.i: ; preds = %bb4374.i, %bb4351.i
+ %sf4083.0.i = phi i32 [ 0, %bb4374.i ], [ 6, %bb4351.i ] ; <i32> [#uses=8]
+ br label %bb4498.i
+bb4498.i: ; preds = %bb4411.i
+ %sfComp4077.1.i = phi i32 [ undef, %bb4411.i ] ; <i32> [#uses=2]
+ %stComp4075.1.i = phi i32 [ undef, %bb4411.i ] ; <i32> [#uses=1]
+ switch i32 0, label %bb4553.i [
+ i32 1, label %bb4501.i
+ i32 2, label %bb4521.i
+ ]
+bb4501.i: ; preds = %bb4498.i
+ %sfComp4077.1.reg2mem.0.i = phi i32 [ %sfComp4077.1.i, %bb4498.i ] ; <i32> [#uses=1]
+ call void @foo( i8* null, i8* null, i32 %sfComp4077.1.reg2mem.0.i, i32 0, i32 8, i32 0, i32 0, i32 0, i32 0 ) nounwind
+ br i1 false, label %UnifiedReturnBlock.i, label %bb4517.i
+bb4517.i: ; preds = %bb4501.i
+ br label %t.exit
+bb4521.i: ; preds = %bb4498.i
+ br label %bb4526.i
+bb4526.i: ; preds = %bb4521.i
+ switch i32 0, label %bb4529.i [
+ i32 6, label %bb4530.i
+ i32 7, label %bb4530.i
+ ]
+bb4529.i: ; preds = %bb4526.i
+ br label %bb4530.i
+bb4530.i: ; preds = %bb4529.i, %bb4526.i, %bb4526.i
+ br label %bb4553.i
+bb4553.i: ; preds = %bb4530.i, %bb4498.i
+ %dt4080.0.i = phi i32 [ %stComp4075.1.i, %bb4530.i ], [ 7, %bb4498.i ] ; <i32> [#uses=32]
+ %df4081.0.i = phi i32 [ %sfComp4077.1.i, %bb4530.i ], [ 8, %bb4498.i ] ; <i32> [#uses=17]
+ switch i32 %sf4083.0.i, label %bb4559.i [
+ i32 0, label %bb4558.i
+ i32 1, label %bb4558.i
+ i32 2, label %bb4558.i
+ i32 5, label %bb4561.i
+ i32 6, label %bb4561.i
+ i32 7, label %bb4561.i
+ i32 9, label %bb4557.i
+ ]
+bb4557.i: ; preds = %bb4553.i
+ switch i32 %df4081.0.i, label %bb4569.i [
+ i32 0, label %bb4568.i
+ i32 1, label %bb4568.i
+ i32 2, label %bb4568.i
+ i32 5, label %bb4571.i
+ i32 6, label %bb4571.i
+ i32 7, label %bb4571.i
+ i32 9, label %bb4567.i
+ ]
+bb4558.i: ; preds = %bb4553.i, %bb4553.i, %bb4553.i
+ switch i32 %df4081.0.i, label %bb4569.i [
+ i32 0, label %bb4568.i
+ i32 1, label %bb4568.i
+ i32 2, label %bb4568.i
+ i32 5, label %bb4571.i
+ i32 6, label %bb4571.i
+ i32 7, label %bb4571.i
+ i32 9, label %bb4567.i
+ ]
+bb4559.i: ; preds = %bb4553.i
+ br label %bb4561.i
+bb4561.i: ; preds = %bb4559.i, %bb4553.i, %bb4553.i, %bb4553.i
+ switch i32 %df4081.0.i, label %bb4569.i [
+ i32 0, label %bb4568.i
+ i32 1, label %bb4568.i
+ i32 2, label %bb4568.i
+ i32 5, label %bb4571.i
+ i32 6, label %bb4571.i
+ i32 7, label %bb4571.i
+ i32 9, label %bb4567.i
+ ]
+bb4567.i: ; preds = %bb4561.i, %bb4558.i, %bb4557.i
+ br label %bb4580.i
+bb4568.i: ; preds = %bb4561.i, %bb4561.i, %bb4561.i, %bb4558.i, %bb4558.i, %bb4558.i, %bb4557.i, %bb4557.i, %bb4557.i
+ br label %bb4580.i
+bb4569.i: ; preds = %bb4561.i, %bb4558.i, %bb4557.i
+ br label %bb4571.i
+bb4571.i: ; preds = %bb4569.i, %bb4561.i, %bb4561.i, %bb4561.i, %bb4558.i, %bb4558.i, %bb4558.i, %bb4557.i, %bb4557.i, %bb4557.i
+ br label %bb4580.i
+bb4580.i: ; preds = %bb4571.i, %bb4568.i, %bb4567.i
+ br i1 false, label %bb4611.i, label %bb4593.i
+bb4593.i: ; preds = %bb4580.i
+ br i1 false, label %bb4610.i, label %bb4611.i
+bb4610.i: ; preds = %bb4593.i
+ br label %bb4611.i
+bb4611.i: ; preds = %bb4610.i, %bb4593.i, %bb4580.i
+ br i1 false, label %bb4776.i, label %bb4620.i
+bb4620.i: ; preds = %bb4611.i
+ switch i32 0, label %bb4776.i [
+ i32 0, label %bb4691.i
+ i32 2, label %bb4740.i
+ i32 4, label %bb4755.i
+ i32 8, label %bb4622.i
+ i32 9, label %bb4622.i
+ i32 10, label %bb4629.i
+ i32 11, label %bb4629.i
+ i32 12, label %bb4651.i
+ i32 13, label %bb4651.i
+ i32 14, label %bb4665.i
+ i32 15, label %bb4665.i
+ i32 16, label %bb4691.i
+ i32 17, label %bb4691.i
+ i32 18, label %bb4712.i
+ i32 19, label %bb4712.i
+ i32 22, label %bb4733.i
+ i32 23, label %bb4733.i
+ ]
+bb4622.i: ; preds = %bb4620.i, %bb4620.i
+ br i1 false, label %bb4628.i, label %bb4776.i
+bb4628.i: ; preds = %bb4622.i
+ br label %bb4776.i
+bb4629.i: ; preds = %bb4620.i, %bb4620.i
+ br i1 false, label %bb4776.i, label %bb4644.i
+bb4644.i: ; preds = %bb4629.i
+ br i1 false, label %bb4650.i, label %bb4776.i
+bb4650.i: ; preds = %bb4644.i
+ br label %bb4776.i
+bb4651.i: ; preds = %bb4620.i, %bb4620.i
+ br i1 false, label %bb4776.i, label %bb4658.i
+bb4658.i: ; preds = %bb4651.i
+ br i1 false, label %bb4664.i, label %bb4776.i
+bb4664.i: ; preds = %bb4658.i
+ br label %bb4776.i
+bb4665.i: ; preds = %bb4620.i, %bb4620.i
+ br i1 false, label %bb4776.i, label %bb4684.i
+bb4684.i: ; preds = %bb4665.i
+ br i1 false, label %bb4690.i, label %bb4776.i
+bb4690.i: ; preds = %bb4684.i
+ br label %bb4776.i
+bb4691.i: ; preds = %bb4620.i, %bb4620.i, %bb4620.i
+ br i1 false, label %bb4776.i, label %bb4698.i
+bb4698.i: ; preds = %bb4691.i
+ br i1 false, label %bb4711.i, label %bb4776.i
+bb4711.i: ; preds = %bb4698.i
+ br label %bb4776.i
+bb4712.i: ; preds = %bb4620.i, %bb4620.i
+ br i1 false, label %bb4776.i, label %bb4726.i
+bb4726.i: ; preds = %bb4712.i
+ br i1 false, label %bb4732.i, label %bb4776.i
+bb4732.i: ; preds = %bb4726.i
+ br label %bb4776.i
+bb4733.i: ; preds = %bb4620.i, %bb4620.i
+ br i1 false, label %bb4739.i, label %bb4776.i
+bb4739.i: ; preds = %bb4733.i
+ br label %bb4776.i
+bb4740.i: ; preds = %bb4620.i
+ br i1 false, label %bb4776.i, label %bb4754.i
+bb4754.i: ; preds = %bb4740.i
+ br label %bb4776.i
+bb4755.i: ; preds = %bb4620.i
+ br i1 false, label %bb4776.i, label %bb4774.i
+bb4774.i: ; preds = %bb4755.i
+ br label %bb4776.i
+bb4776.i: ; preds = %bb4774.i, %bb4755.i, %bb4754.i, %bb4740.i, %bb4739.i, %bb4733.i, %bb4732.i, %bb4726.i, %bb4712.i, %bb4711.i, %bb4698.i, %bb4691.i, %bb4690.i, %bb4684.i, %bb4665.i, %bb4664.i, %bb4658.i, %bb4651.i, %bb4650.i, %bb4644.i, %bb4629.i, %bb4628.i, %bb4622.i, %bb4620.i, %bb4611.i
+ switch i32 0, label %bb4790.i [
+ i32 0, label %bb4786.i
+ i32 1, label %bb4784.i
+ i32 3, label %bb4784.i
+ i32 5, label %bb4784.i
+ i32 6, label %bb4785.i
+ i32 7, label %bb4785.i
+ i32 8, label %bb4791.i
+ i32 9, label %bb4791.i
+ i32 10, label %bb4791.i
+ i32 11, label %bb4791.i
+ i32 12, label %bb4791.i
+ i32 13, label %bb4791.i
+ i32 14, label %bb4791.i
+ i32 15, label %bb4791.i
+ i32 16, label %bb4791.i
+ i32 17, label %bb4791.i
+ i32 18, label %bb4791.i
+ i32 19, label %bb4791.i
+ ]
+bb4784.i: ; preds = %bb4776.i, %bb4776.i, %bb4776.i
+ br label %bb4791.i
+bb4785.i: ; preds = %bb4776.i, %bb4776.i
+ br label %bb4791.i
+bb4786.i: ; preds = %bb4776.i
+ br label %bb4791.i
+bb4790.i: ; preds = %bb4776.i
+ br label %bb4791.i
+bb4791.i: ; preds = %bb4790.i, %bb4786.i, %bb4785.i, %bb4784.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i
+ switch i32 %dt4080.0.i, label %bb4803.i [
+ i32 0, label %bb4799.i
+ i32 6, label %bb4794.i
+ i32 7, label %bb4794.i
+ i32 8, label %bb4804.i
+ i32 9, label %bb4804.i
+ i32 10, label %bb4804.i
+ i32 11, label %bb4804.i
+ i32 12, label %bb4804.i
+ i32 13, label %bb4804.i
+ i32 14, label %bb4804.i
+ i32 15, label %bb4804.i
+ i32 16, label %bb4804.i
+ i32 17, label %bb4804.i
+ i32 18, label %bb4804.i
+ i32 19, label %bb4804.i
+ ]
+bb4794.i: ; preds = %bb4791.i, %bb4791.i
+ br i1 false, label %bb4809.i, label %bb4819.i
+bb4799.i: ; preds = %bb4791.i
+ br i1 false, label %bb4809.i, label %bb4819.i
+bb4803.i: ; preds = %bb4791.i
+ br label %bb4804.i
+bb4804.i: ; preds = %bb4803.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i
+ br i1 false, label %bb4809.i, label %bb4819.i
+bb4809.i: ; preds = %bb4804.i, %bb4799.i, %bb4794.i
+ switch i32 %df4081.0.i, label %bb71.i.i [
+ i32 3, label %bb61.i.i
+ i32 4, label %bb.i.i
+ i32 5, label %bb.i.i
+ i32 6, label %bb.i.i
+ i32 7, label %bb.i.i
+ i32 8, label %bb38.i.i
+ i32 9, label %bb38.i.i
+ i32 10, label %bb50.i.i
+ i32 11, label %bb40.i.i
+ i32 16, label %bb38.i.i
+ ]
+bb.i.i: ; preds = %bb4809.i, %bb4809.i, %bb4809.i, %bb4809.i
+ br label %bb403.i.i
+bb38.i.i: ; preds = %bb4809.i, %bb4809.i, %bb4809.i
+ br label %bb403.i.i
+bb40.i.i: ; preds = %bb4809.i
+ br label %bb403.i.i
+bb50.i.i: ; preds = %bb4809.i
+ br label %bb403.i.i
+bb61.i.i: ; preds = %bb4809.i
+ br label %bb403.i.i
+bb71.i.i: ; preds = %bb4809.i
+ br label %bb403.i.i
+bb403.i.i: ; preds = %bb71.i.i, %bb61.i.i, %bb50.i.i, %bb40.i.i, %bb38.i.i, %bb.i.i
+ br i1 false, label %bb408.i.i, label %bb502.i.i
+bb408.i.i: ; preds = %bb403.i.i
+ br label %bb708.i.i
+bb502.i.i: ; preds = %bb403.i.i
+ br label %bb708.i.i
+bb708.i.i: ; preds = %bb502.i.i, %bb408.i.i
+ switch i32 0, label %bb758.i.i [
+ i32 0, label %bb710.i.i
+ i32 1, label %bb713.i.i
+ i32 2, label %bb718.i.i
+ i32 3, label %bb721.i.i
+ i32 4, label %bb726.i.i
+ i32 5, label %bb729.i.i
+ i32 8, label %bb732.i.i
+ i32 9, label %bb732.i.i
+ i32 10, label %bb737.i.i
+ i32 11, label %bb737.i.i
+ i32 12, label %bb742.i.i
+ i32 13, label %bb742.i.i
+ i32 14, label %bb745.i.i
+ i32 15, label %bb745.i.i
+ i32 16, label %bb750.i.i
+ i32 17, label %bb750.i.i
+ i32 18, label %bb753.i.i
+ i32 19, label %bb753.i.i
+ i32 22, label %bb750.i.i
+ i32 23, label %bb750.i.i
+ ]
+bb710.i.i: ; preds = %bb708.i.i
+ br label %bb758.i.i
+bb713.i.i: ; preds = %bb708.i.i
+ br label %bb758.i.i
+bb718.i.i: ; preds = %bb708.i.i
+ br label %bb758.i.i
+bb721.i.i: ; preds = %bb708.i.i
+ br label %bb758.i.i
+bb726.i.i: ; preds = %bb708.i.i
+ br label %bb758.i.i
+bb729.i.i: ; preds = %bb708.i.i
+ br label %bb758.i.i
+bb732.i.i: ; preds = %bb708.i.i, %bb708.i.i
+ br label %bb758.i.i
+bb737.i.i: ; preds = %bb708.i.i, %bb708.i.i
+ br label %bb758.i.i
+bb742.i.i: ; preds = %bb708.i.i, %bb708.i.i
+ br label %bb758.i.i
+bb745.i.i: ; preds = %bb708.i.i, %bb708.i.i
+ br label %bb758.i.i
+bb750.i.i: ; preds = %bb708.i.i, %bb708.i.i, %bb708.i.i, %bb708.i.i
+ br label %bb758.i.i
+bb753.i.i: ; preds = %bb708.i.i, %bb708.i.i
+ br label %bb758.i.i
+bb758.i.i: ; preds = %bb753.i.i, %bb750.i.i, %bb745.i.i, %bb742.i.i, %bb737.i.i, %bb732.i.i, %bb729.i.i, %bb726.i.i, %bb721.i.i, %bb718.i.i, %bb713.i.i, %bb710.i.i, %bb708.i.i
+ switch i32 %dt4080.0.i, label %bb808.i.i [
+ i32 0, label %bb760.i.i
+ i32 1, label %bb763.i.i
+ i32 2, label %bb768.i.i
+ i32 3, label %bb771.i.i
+ i32 4, label %bb776.i.i
+ i32 5, label %bb779.i.i
+ i32 8, label %bb782.i.i
+ i32 9, label %bb782.i.i
+ i32 10, label %bb787.i.i
+ i32 11, label %bb787.i.i
+ i32 12, label %bb792.i.i
+ i32 13, label %bb792.i.i
+ i32 14, label %bb795.i.i
+ i32 15, label %bb795.i.i
+ i32 16, label %bb800.i.i
+ i32 17, label %bb800.i.i
+ i32 18, label %bb803.i.i
+ i32 19, label %bb803.i.i
+ i32 22, label %bb800.i.i
+ i32 23, label %bb800.i.i
+ ]
+bb760.i.i: ; preds = %bb758.i.i
+ br label %bb811.i.i
+bb763.i.i: ; preds = %bb758.i.i
+ br label %bb811.i.i
+bb768.i.i: ; preds = %bb758.i.i
+ br label %bb811.i.i
+bb771.i.i: ; preds = %bb758.i.i
+ br label %bb811.i.i
+bb776.i.i: ; preds = %bb758.i.i
+ br label %bb811.i.i
+bb779.i.i: ; preds = %bb758.i.i
+ br label %bb811.i.i
+bb782.i.i: ; preds = %bb758.i.i, %bb758.i.i
+ br label %bb811.i.i
+bb787.i.i: ; preds = %bb758.i.i, %bb758.i.i
+ br label %bb811.i.i
+bb792.i.i: ; preds = %bb758.i.i, %bb758.i.i
+ br label %bb811.i.i
+bb795.i.i: ; preds = %bb758.i.i, %bb758.i.i
+ br label %bb811.i.i
+bb800.i.i: ; preds = %bb758.i.i, %bb758.i.i, %bb758.i.i, %bb758.i.i
+ br label %bb811.i.i
+bb803.i.i: ; preds = %bb758.i.i, %bb758.i.i
+ br label %bb808.i.i
+bb808.i.i: ; preds = %bb803.i.i, %bb758.i.i
+ br label %bb811.i.i
+bb811.i.i: ; preds = %bb808.i.i, %bb800.i.i, %bb795.i.i, %bb792.i.i, %bb787.i.i, %bb782.i.i, %bb779.i.i, %bb776.i.i, %bb771.i.i, %bb768.i.i, %bb763.i.i, %bb760.i.i
+ switch i32 0, label %bb928.i.i [
+ i32 0, label %bb813.i.i
+ i32 1, label %bb833.i.i
+ i32 2, label %bb813.i.i
+ i32 3, label %bb833.i.i
+ i32 4, label %bb813.i.i
+ i32 5, label %bb813.i.i
+ i32 8, label %bb872.i.i
+ i32 9, label %bb872.i.i
+ i32 10, label %bb890.i.i
+ i32 11, label %bb890.i.i
+ i32 12, label %bb813.i.i
+ i32 13, label %bb813.i.i
+ i32 14, label %bb908.i.i
+ i32 15, label %bb908.i.i
+ i32 16, label %bb813.i.i
+ i32 17, label %bb813.i.i
+ i32 18, label %bb908.i.i
+ i32 19, label %bb908.i.i
+ i32 22, label %bb813.i.i
+ i32 23, label %bb813.i.i
+ ]
+bb813.i.i: ; preds = %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i
+ switch i32 %dt4080.0.i, label %bb1065.i.i [
+ i32 0, label %bb930.i.i
+ i32 1, label %bb950.i.i
+ i32 2, label %bb930.i.i
+ i32 3, label %bb950.i.i
+ i32 4, label %bb989.i.i
+ i32 5, label %bb989.i.i
+ i32 8, label %bb1009.i.i
+ i32 9, label %bb1009.i.i
+ i32 10, label %bb1027.i.i
+ i32 11, label %bb1027.i.i
+ i32 12, label %bb930.i.i
+ i32 13, label %bb930.i.i
+ i32 14, label %bb1045.i.i
+ i32 15, label %bb1045.i.i
+ i32 16, label %bb930.i.i
+ i32 17, label %bb930.i.i
+ i32 18, label %bb1045.i.i
+ i32 19, label %bb1045.i.i
+ i32 22, label %bb930.i.i
+ i32 23, label %bb930.i.i
+ ]
+bb833.i.i: ; preds = %bb811.i.i, %bb811.i.i
+ switch i32 %dt4080.0.i, label %bb1065.i.i [
+ i32 0, label %bb930.i.i
+ i32 1, label %bb950.i.i
+ i32 2, label %bb930.i.i
+ i32 3, label %bb950.i.i
+ i32 4, label %bb989.i.i
+ i32 5, label %bb989.i.i
+ i32 8, label %bb1009.i.i
+ i32 9, label %bb1009.i.i
+ i32 10, label %bb1027.i.i
+ i32 11, label %bb1027.i.i
+ i32 12, label %bb930.i.i
+ i32 13, label %bb930.i.i
+ i32 14, label %bb1045.i.i
+ i32 15, label %bb1045.i.i
+ i32 16, label %bb930.i.i
+ i32 17, label %bb930.i.i
+ i32 18, label %bb1045.i.i
+ i32 19, label %bb1045.i.i
+ i32 22, label %bb930.i.i
+ i32 23, label %bb930.i.i
+ ]
+bb872.i.i: ; preds = %bb811.i.i, %bb811.i.i
+ switch i32 %dt4080.0.i, label %bb1065.i.i [
+ i32 0, label %bb930.i.i
+ i32 1, label %bb950.i.i
+ i32 2, label %bb930.i.i
+ i32 3, label %bb950.i.i
+ i32 4, label %bb989.i.i
+ i32 5, label %bb989.i.i
+ i32 8, label %bb1009.i.i
+ i32 9, label %bb1009.i.i
+ i32 10, label %bb1027.i.i
+ i32 11, label %bb1027.i.i
+ i32 12, label %bb930.i.i
+ i32 13, label %bb930.i.i
+ i32 14, label %bb1045.i.i
+ i32 15, label %bb1045.i.i
+ i32 16, label %bb930.i.i
+ i32 17, label %bb930.i.i
+ i32 18, label %bb1045.i.i
+ i32 19, label %bb1045.i.i
+ i32 22, label %bb930.i.i
+ i32 23, label %bb930.i.i
+ ]
+bb890.i.i: ; preds = %bb811.i.i, %bb811.i.i
+ switch i32 %dt4080.0.i, label %bb1065.i.i [
+ i32 0, label %bb930.i.i
+ i32 1, label %bb950.i.i
+ i32 2, label %bb930.i.i
+ i32 3, label %bb950.i.i
+ i32 4, label %bb989.i.i
+ i32 5, label %bb989.i.i
+ i32 8, label %bb1009.i.i
+ i32 9, label %bb1009.i.i
+ i32 10, label %bb1027.i.i
+ i32 11, label %bb1027.i.i
+ i32 12, label %bb930.i.i
+ i32 13, label %bb930.i.i
+ i32 14, label %bb1045.i.i
+ i32 15, label %bb1045.i.i
+ i32 16, label %bb930.i.i
+ i32 17, label %bb930.i.i
+ i32 18, label %bb1045.i.i
+ i32 19, label %bb1045.i.i
+ i32 22, label %bb930.i.i
+ i32 23, label %bb930.i.i
+ ]
+bb908.i.i: ; preds = %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i
+ br label %bb928.i.i
+bb928.i.i: ; preds = %bb908.i.i, %bb811.i.i
+ switch i32 %dt4080.0.i, label %bb1065.i.i [
+ i32 0, label %bb930.i.i
+ i32 1, label %bb950.i.i
+ i32 2, label %bb930.i.i
+ i32 3, label %bb950.i.i
+ i32 4, label %bb989.i.i
+ i32 5, label %bb989.i.i
+ i32 8, label %bb1009.i.i
+ i32 9, label %bb1009.i.i
+ i32 10, label %bb1027.i.i
+ i32 11, label %bb1027.i.i
+ i32 12, label %bb930.i.i
+ i32 13, label %bb930.i.i
+ i32 14, label %bb1045.i.i
+ i32 15, label %bb1045.i.i
+ i32 16, label %bb930.i.i
+ i32 17, label %bb930.i.i
+ i32 18, label %bb1045.i.i
+ i32 19, label %bb1045.i.i
+ i32 22, label %bb930.i.i
+ i32 23, label %bb930.i.i
+ ]
+bb930.i.i: ; preds = %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i
+ br label %bb5235.i
+bb950.i.i: ; preds = %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i
+ br label %bb5235.i
+bb989.i.i: ; preds = %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i
+ br label %bb5235.i
+bb1009.i.i: ; preds = %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i
+ br label %bb5235.i
+bb1027.i.i: ; preds = %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i
+ br label %bb5235.i
+bb1045.i.i: ; preds = %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i
+ br label %bb1065.i.i
+bb1065.i.i: ; preds = %bb1045.i.i, %bb928.i.i, %bb890.i.i, %bb872.i.i, %bb833.i.i, %bb813.i.i
+ br label %bb5235.i
+bb4819.i: ; preds = %bb4804.i, %bb4799.i, %bb4794.i
+ br i1 false, label %bb5208.i, label %bb5011.i
+bb5011.i: ; preds = %bb4819.i
+ switch i32 0, label %bb5039.i [
+ i32 10, label %bb5016.i
+ i32 3, label %bb5103.i
+ ]
+bb5016.i: ; preds = %bb5011.i
+ br i1 false, label %bb5103.i, label %bb5039.i
+bb5039.i: ; preds = %bb5016.i, %bb5011.i
+ switch i32 0, label %bb5052.i [
+ i32 3, label %bb5103.i
+ i32 10, label %bb5103.i
+ ]
+bb5052.i: ; preds = %bb5039.i
+ br i1 false, label %bb5103.i, label %bb5065.i
+bb5065.i: ; preds = %bb5052.i
+ br i1 false, label %bb5078.i, label %bb5103.i
+bb5078.i: ; preds = %bb5065.i
+ br i1 false, label %bb5103.i, label %bb5084.i
+bb5084.i: ; preds = %bb5078.i
+ br i1 false, label %bb5103.i, label %bb5090.i
+bb5090.i: ; preds = %bb5084.i
+ br i1 false, label %bb5103.i, label %bb5096.i
+bb5096.i: ; preds = %bb5090.i
+ br i1 false, label %bb5103.i, label %bb5102.i
+bb5102.i: ; preds = %bb5096.i
+ br label %bb5103.i
+bb5103.i: ; preds = %bb5102.i, %bb5096.i, %bb5090.i, %bb5084.i, %bb5078.i, %bb5065.i, %bb5052.i, %bb5039.i, %bb5039.i, %bb5016.i, %bb5011.i
+ switch i32 0, label %bb5208.i [
+ i32 0, label %bb5133.i
+ i32 2, label %bb5162.i
+ i32 4, label %bb5182.i
+ i32 10, label %bb5113.i
+ i32 11, label %bb5113.i
+ i32 12, label %bb5121.i
+ i32 13, label %bb5121.i
+ i32 14, label %bb5125.i
+ i32 15, label %bb5125.i
+ i32 16, label %bb5133.i
+ i32 17, label %bb5133.i
+ i32 18, label %bb5146.i
+ i32 19, label %bb5146.i
+ ]
+bb5113.i: ; preds = %bb5103.i, %bb5103.i
+ switch i32 %dt4080.0.i, label %bb5208.i [
+ i32 8, label %bb5115.i
+ i32 9, label %bb5115.i
+ i32 12, label %bb5117.i
+ i32 13, label %bb5117.i
+ i32 14, label %bb5119.i
+ i32 15, label %bb5119.i
+ ]
+bb5115.i: ; preds = %bb5113.i, %bb5113.i
+ br label %bb5208.i
+bb5117.i: ; preds = %bb5113.i, %bb5113.i
+ br label %bb5208.i
+bb5119.i: ; preds = %bb5113.i, %bb5113.i
+ br label %bb5208.i
+bb5121.i: ; preds = %bb5103.i, %bb5103.i
+ switch i32 %dt4080.0.i, label %bb5208.i [
+ i32 8, label %bb5123.i
+ i32 9, label %bb5123.i
+ ]
+bb5123.i: ; preds = %bb5121.i, %bb5121.i
+ br label %bb5208.i
+bb5125.i: ; preds = %bb5103.i, %bb5103.i
+ switch i32 %dt4080.0.i, label %bb5208.i [
+ i32 8, label %bb5127.i
+ i32 9, label %bb5127.i
+ i32 12, label %bb5129.i
+ i32 13, label %bb5129.i
+ ]
+bb5127.i: ; preds = %bb5125.i, %bb5125.i
+ br label %bb5208.i
+bb5129.i: ; preds = %bb5125.i, %bb5125.i
+ br label %bb5208.i
+bb5133.i: ; preds = %bb5103.i, %bb5103.i, %bb5103.i
+ switch i32 %dt4080.0.i, label %bb5208.i [
+ i32 8, label %bb5135.i
+ i32 9, label %bb5135.i
+ i32 10, label %bb5137.i
+ i32 11, label %bb5137.i
+ i32 12, label %bb5139.i
+ i32 13, label %bb5139.i
+ i32 14, label %bb5143.i
+ i32 15, label %bb5143.i
+ ]
+bb5135.i: ; preds = %bb5133.i, %bb5133.i
+ br label %bb5208.i
+bb5137.i: ; preds = %bb5133.i, %bb5133.i
+ br label %bb5208.i
+bb5139.i: ; preds = %bb5133.i, %bb5133.i
+ br label %bb5208.i
+bb5143.i: ; preds = %bb5133.i, %bb5133.i
+ br label %bb5208.i
+bb5146.i: ; preds = %bb5103.i, %bb5103.i
+ switch i32 %dt4080.0.i, label %bb5208.i [
+ i32 0, label %bb5158.i
+ i32 8, label %bb5148.i
+ i32 9, label %bb5148.i
+ i32 10, label %bb5150.i
+ i32 11, label %bb5150.i
+ i32 12, label %bb5152.i
+ i32 13, label %bb5152.i
+ i32 14, label %bb5155.i
+ i32 15, label %bb5155.i
+ i32 16, label %bb5158.i
+ i32 17, label %bb5158.i
+ ]
+bb5148.i: ; preds = %bb5146.i, %bb5146.i
+ br label %bb5208.i
+bb5150.i: ; preds = %bb5146.i, %bb5146.i
+ br label %bb5208.i
+bb5152.i: ; preds = %bb5146.i, %bb5146.i
+ br label %bb5208.i
+bb5155.i: ; preds = %bb5146.i, %bb5146.i
+ br label %bb5208.i
+bb5158.i: ; preds = %bb5146.i, %bb5146.i, %bb5146.i
+ br label %bb5208.i
+bb5162.i: ; preds = %bb5103.i
+ switch i32 %dt4080.0.i, label %bb5208.i [
+ i32 0, label %bb5175.i
+ i32 8, label %bb5164.i
+ i32 9, label %bb5164.i
+ i32 10, label %bb5166.i
+ i32 11, label %bb5166.i
+ i32 12, label %bb5168.i
+ i32 13, label %bb5168.i
+ i32 14, label %bb5172.i
+ i32 15, label %bb5172.i
+ i32 16, label %bb5175.i
+ i32 17, label %bb5175.i
+ i32 18, label %bb5179.i
+ i32 19, label %bb5179.i
+ ]
+bb5164.i: ; preds = %bb5162.i, %bb5162.i
+ br label %bb5208.i
+bb5166.i: ; preds = %bb5162.i, %bb5162.i
+ br label %bb5208.i
+bb5168.i: ; preds = %bb5162.i, %bb5162.i
+ br label %bb5208.i
+bb5172.i: ; preds = %bb5162.i, %bb5162.i
+ br label %bb5208.i
+bb5175.i: ; preds = %bb5162.i, %bb5162.i, %bb5162.i
+ br label %bb5208.i
+bb5179.i: ; preds = %bb5162.i, %bb5162.i
+ br label %bb5208.i
+bb5182.i: ; preds = %bb5103.i
+ switch i32 %dt4080.0.i, label %bb5208.i [
+ i32 0, label %bb5195.i
+ i32 2, label %bb5202.i
+ i32 8, label %bb5184.i
+ i32 9, label %bb5184.i
+ i32 10, label %bb5186.i
+ i32 11, label %bb5186.i
+ i32 12, label %bb5188.i
+ i32 13, label %bb5188.i
+ i32 14, label %bb5192.i
+ i32 15, label %bb5192.i
+ i32 16, label %bb5195.i
+ i32 17, label %bb5195.i
+ i32 18, label %bb5199.i
+ i32 19, label %bb5199.i
+ ]
+bb5184.i: ; preds = %bb5182.i, %bb5182.i
+ br label %bb5208.i
+bb5186.i: ; preds = %bb5182.i, %bb5182.i
+ br label %bb5208.i
+bb5188.i: ; preds = %bb5182.i, %bb5182.i
+ br label %bb5208.i
+bb5192.i: ; preds = %bb5182.i, %bb5182.i
+ br label %bb5208.i
+bb5195.i: ; preds = %bb5182.i, %bb5182.i, %bb5182.i
+ br label %bb5208.i
+bb5199.i: ; preds = %bb5182.i, %bb5182.i
+ br label %bb5208.i
+bb5202.i: ; preds = %bb5182.i
+ br label %bb5208.i
+bb5208.i: ; preds = %bb5202.i, %bb5199.i, %bb5195.i, %bb5192.i, %bb5188.i, %bb5186.i, %bb5184.i, %bb5182.i, %bb5179.i, %bb5175.i, %bb5172.i, %bb5168.i, %bb5166.i, %bb5164.i, %bb5162.i, %bb5158.i, %bb5155.i, %bb5152.i, %bb5150.i, %bb5148.i, %bb5146.i, %bb5143.i, %bb5139.i, %bb5137.i, %bb5135.i, %bb5133.i, %bb5129.i, %bb5127.i, %bb5125.i, %bb5123.i, %bb5121.i, %bb5119.i, %bb5117.i, %bb5115.i, %bb5113.i, %bb5103.i, %bb4819.i
+ switch i32 0, label %bb5221.i [
+ i32 0, label %bb5210.i
+ i32 1, label %bb5211.i
+ i32 2, label %bb5212.i
+ i32 3, label %bb5213.i
+ i32 4, label %bb5214.i
+ i32 5, label %bb5215.i
+ i32 6, label %bb5217.i
+ i32 7, label %bb5216.i
+ i32 12, label %bb5218.i
+ i32 13, label %bb5218.i
+ i32 14, label %bb5219.i
+ i32 15, label %bb5219.i
+ i32 16, label %bb5210.i
+ i32 17, label %bb5210.i
+ i32 22, label %bb5210.i
+ i32 23, label %bb5210.i
+ ]
+bb5210.i: ; preds = %bb5208.i, %bb5208.i, %bb5208.i, %bb5208.i, %bb5208.i
+ br label %bb5224.i
+bb5211.i: ; preds = %bb5208.i
+ br label %bb5224.i
+bb5212.i: ; preds = %bb5208.i
+ br label %bb5224.i
+bb5213.i: ; preds = %bb5208.i
+ br label %bb5224.i
+bb5214.i: ; preds = %bb5208.i
+ br label %bb5224.i
+bb5215.i: ; preds = %bb5208.i
+ br label %bb5224.i
+bb5216.i: ; preds = %bb5208.i
+ br label %bb5224.i
+bb5217.i: ; preds = %bb5208.i
+ br label %bb5224.i
+bb5218.i: ; preds = %bb5208.i, %bb5208.i
+ br label %bb5224.i
+bb5219.i: ; preds = %bb5208.i, %bb5208.i
+ br label %bb5224.i
+bb5221.i: ; preds = %bb5208.i
+ br label %bb5224.i
+bb5224.i: ; preds = %bb5221.i, %bb5219.i, %bb5218.i, %bb5217.i, %bb5216.i, %bb5215.i, %bb5214.i, %bb5213.i, %bb5212.i, %bb5211.i, %bb5210.i
+ br label %bb5235.i
+bb5235.i: ; preds = %bb5224.i, %bb1065.i.i, %bb1027.i.i, %bb1009.i.i, %bb989.i.i, %bb950.i.i, %bb930.i.i
+ br label %bb5272.i
+bb5272.i: ; preds = %bb5235.i
+ br label %bb5276.i
+bb5276.i: ; preds = %bb19808.i, %bb5272.i
+ br label %bb16607.i
+bb5295.i: ; preds = %bb5295.preheader.i, %storeVecColor_RGB_UI.exit
+ br label %loadVecColor_BGRA_UI8888R.exit
+loadVecColor_BGRA_UI8888R.exit: ; preds = %bb5295.i
+ br i1 false, label %bb5325.i, label %bb5351.i
+bb5325.i: ; preds = %loadVecColor_BGRA_UI8888R.exit
+ br i1 false, label %bb4527.i, label %bb.i
+bb.i: ; preds = %bb5325.i
+ switch i32 0, label %bb4527.i [
+ i32 4, label %bb4362.i
+ i32 8, label %bb4448.i
+ ]
+bb4362.i: ; preds = %bb.i
+ br i1 false, label %bb4532.i, label %bb5556.i
+bb4448.i: ; preds = %bb.i
+ br label %bb4527.i
+bb4527.i: ; preds = %bb4448.i, %bb.i, %bb5325.i
+ br i1 false, label %bb4532.i, label %bb5556.i
+bb4532.i: ; preds = %bb4527.i, %bb4362.i
+ switch i32 0, label %bb4997.i [
+ i32 6, label %bb4534.i
+ i32 7, label %bb4982.i
+ ]
+bb4534.i: ; preds = %bb4532.i
+ br i1 false, label %bb4875.i, label %bb4619.i
+bb4619.i: ; preds = %bb4534.i
+ br i1 false, label %bb4875.i, label %bb4663.i
+bb4663.i: ; preds = %bb4619.i
+ br label %bb4855.i
+bb4759.i: ; preds = %bb4855.i
+ br label %bb4855.i
+bb4855.i: ; preds = %bb4759.i, %bb4663.i
+ br i1 false, label %bb4866.i, label %bb4759.i
+bb4866.i: ; preds = %bb4855.i
+ br label %bb4875.i
+bb4875.i: ; preds = %bb4866.i, %bb4619.i, %bb4534.i
+ br i1 false, label %bb4973.i, label %bb4922.i
+bb4922.i: ; preds = %bb4875.i
+ br label %bb4973.i
+bb4973.i: ; preds = %bb4922.i, %bb4875.i
+ br label %bb4982.i
+bb4982.i: ; preds = %bb4973.i, %bb4532.i
+ br label %bb5041.i
+bb4997.i: ; preds = %bb4532.i
+ br label %bb5041.i
+bb5041.i: ; preds = %bb4997.i, %bb4982.i
+ switch i32 0, label %bb5464.i [
+ i32 0, label %bb5344.i
+ i32 1, label %bb5374.i
+ i32 2, label %bb5404.i
+ i32 3, label %bb5434.i
+ i32 11, label %bb5263.i
+ ]
+bb5263.i: ; preds = %bb5041.i
+ br i1 false, label %bb12038.i, label %bb5467.i
+bb5344.i: ; preds = %bb5041.i
+ br i1 false, label %bb12038.i, label %bb5467.i
+bb5374.i: ; preds = %bb5041.i
+ br i1 false, label %bb12038.i, label %bb5467.i
+bb5404.i: ; preds = %bb5041.i
+ br i1 false, label %bb12038.i, label %bb5467.i
+bb5434.i: ; preds = %bb5041.i
+ br label %bb5464.i
+bb5464.i: ; preds = %bb5434.i, %bb5041.i
+ br i1 false, label %bb12038.i, label %bb5467.i
+bb5467.i: ; preds = %bb5464.i, %bb5404.i, %bb5374.i, %bb5344.i, %bb5263.i
+ switch i32 0, label %bb15866.i [
+ i32 3, label %bb13016.i
+ i32 4, label %bb12040.i
+ i32 8, label %bb12514.i
+ i32 10, label %bb12903.i
+ i32 11, label %bb12553.i
+ i32 16, label %bb12514.i
+ ]
+bb5556.i: ; preds = %bb4527.i, %bb4362.i
+ switch i32 0, label %bb8990.i [
+ i32 3, label %bb6403.i
+ i32 4, label %bb6924.i
+ i32 8, label %bb6924.i
+ i32 10, label %bb6403.i
+ i32 11, label %bb5882.i
+ i32 16, label %bb5558.i
+ ]
+bb5558.i: ; preds = %bb5556.i
+ br label %bb8990.i
+bb5882.i: ; preds = %bb5556.i
+ switch i32 0, label %bb6387.i [
+ i32 1, label %bb6332.i
+ i32 3, label %bb6332.i
+ i32 4, label %bb6352.i
+ i32 6, label %bb5884.i
+ i32 7, label %bb8990.i
+ ]
+bb5884.i: ; preds = %bb5882.i
+ br i1 false, label %bb6225.i, label %bb5969.i
+bb5969.i: ; preds = %bb5884.i
+ br i1 false, label %bb6225.i, label %bb6013.i
+bb6013.i: ; preds = %bb5969.i
+ br label %bb6205.i
+bb6109.i: ; preds = %bb6205.i
+ br label %bb6205.i
+bb6205.i: ; preds = %bb6109.i, %bb6013.i
+ br i1 false, label %bb6216.i, label %bb6109.i
+bb6216.i: ; preds = %bb6205.i
+ br label %bb6225.i
+bb6225.i: ; preds = %bb6216.i, %bb5969.i, %bb5884.i
+ br i1 false, label %bb6323.i, label %bb6272.i
+bb6272.i: ; preds = %bb6225.i
+ switch i32 0, label %bb6908.i [
+ i32 1, label %bb6853.i48
+ i32 3, label %bb6853.i48
+ i32 4, label %bb6873.i
+ i32 6, label %bb6405.i
+ i32 7, label %bb8990.i
+ ]
+bb6323.i: ; preds = %bb6225.i
+ switch i32 0, label %bb6908.i [
+ i32 1, label %bb6853.i48
+ i32 3, label %bb6853.i48
+ i32 4, label %bb6873.i
+ i32 6, label %bb6405.i
+ i32 7, label %bb8990.i
+ ]
+bb6332.i: ; preds = %bb5882.i, %bb5882.i
+ switch i32 0, label %bb6908.i [
+ i32 1, label %bb6853.i48
+ i32 3, label %bb6853.i48
+ i32 4, label %bb6873.i
+ i32 6, label %bb6405.i
+ i32 7, label %bb8990.i
+ ]
+bb6352.i: ; preds = %bb5882.i
+ br label %bb6873.i
+bb6387.i: ; preds = %bb5882.i
+ br label %bb6403.i
+bb6403.i: ; preds = %bb6387.i, %bb5556.i, %bb5556.i
+ switch i32 0, label %bb6908.i [
+ i32 1, label %bb6853.i48
+ i32 3, label %bb6853.i48
+ i32 4, label %bb6873.i
+ i32 6, label %bb6405.i
+ i32 7, label %bb8990.i
+ ]
+bb6405.i: ; preds = %bb6403.i, %bb6332.i, %bb6323.i, %bb6272.i
+ br i1 false, label %bb6746.i, label %bb6490.i
+bb6490.i: ; preds = %bb6405.i
+ br i1 false, label %bb6746.i, label %bb6534.i
+bb6534.i: ; preds = %bb6490.i
+ br label %bb6726.i
+bb6630.i: ; preds = %bb6726.i
+ br label %bb6726.i
+bb6726.i: ; preds = %bb6630.i, %bb6534.i
+ br i1 false, label %bb6737.i, label %bb6630.i
+bb6737.i: ; preds = %bb6726.i
+ br label %bb6746.i
+bb6746.i: ; preds = %bb6737.i, %bb6490.i, %bb6405.i
+ br i1 false, label %bb6844.i, label %bb6793.i
+bb6793.i: ; preds = %bb6746.i
+ br label %bb8990.i
+bb6844.i: ; preds = %bb6746.i
+ br label %bb8990.i
+bb6853.i48: ; preds = %bb6403.i, %bb6403.i, %bb6332.i, %bb6332.i, %bb6323.i, %bb6323.i, %bb6272.i, %bb6272.i
+ br label %bb8990.i
+bb6873.i: ; preds = %bb6403.i, %bb6352.i, %bb6332.i, %bb6323.i, %bb6272.i
+ br label %bb8990.i
+bb6908.i: ; preds = %bb6403.i, %bb6332.i, %bb6323.i, %bb6272.i
+ br label %bb8990.i
+bb6924.i: ; preds = %bb5556.i, %bb5556.i
+ switch i32 0, label %bb8929.i [
+ i32 1, label %bb8715.i
+ i32 3, label %bb8715.i
+ i32 4, label %bb8792.i
+ i32 6, label %bb6926.i
+ i32 7, label %bb8990.i
+ ]
+bb6926.i: ; preds = %bb6924.i
+ br i1 false, label %bb7267.i, label %bb7011.i
+bb7011.i: ; preds = %bb6926.i
+ br i1 false, label %bb7267.i, label %bb7055.i
+bb7055.i: ; preds = %bb7011.i
+ br label %bb7247.i
+bb7151.i: ; preds = %bb7247.i
+ br label %bb7247.i
+bb7247.i: ; preds = %bb7151.i, %bb7055.i
+ br i1 false, label %bb7258.i, label %bb7151.i
+bb7258.i: ; preds = %bb7247.i
+ br label %bb7267.i
+bb7267.i: ; preds = %bb7258.i, %bb7011.i, %bb6926.i
+ br i1 false, label %bb7365.i, label %bb7314.i
+bb7314.i: ; preds = %bb7267.i
+ br label %bb7365.i
+bb7365.i: ; preds = %bb7314.i, %bb7267.i
+ br i1 false, label %bb7714.i, label %bb7458.i
+bb7458.i: ; preds = %bb7365.i
+ br i1 false, label %bb7714.i, label %bb7502.i
+bb7502.i: ; preds = %bb7458.i
+ br label %bb7694.i
+bb7598.i: ; preds = %bb7694.i
+ br label %bb7694.i
+bb7694.i: ; preds = %bb7598.i, %bb7502.i
+ br i1 false, label %bb7705.i, label %bb7598.i
+bb7705.i: ; preds = %bb7694.i
+ br label %bb7714.i
+bb7714.i: ; preds = %bb7705.i, %bb7458.i, %bb7365.i
+ br i1 false, label %bb7812.i, label %bb7761.i
+bb7761.i: ; preds = %bb7714.i
+ br label %bb7812.i
+bb7812.i: ; preds = %bb7761.i, %bb7714.i
+ br i1 false, label %bb8161.i, label %bb7905.i
+bb7905.i: ; preds = %bb7812.i
+ br i1 false, label %bb8161.i, label %bb7949.i
+bb7949.i: ; preds = %bb7905.i
+ br label %bb8141.i
+bb8045.i: ; preds = %bb8141.i
+ br label %bb8141.i
+bb8141.i: ; preds = %bb8045.i, %bb7949.i
+ br i1 false, label %bb8152.i, label %bb8045.i
+bb8152.i: ; preds = %bb8141.i
+ br label %bb8161.i
+bb8161.i: ; preds = %bb8152.i, %bb7905.i, %bb7812.i
+ br i1 false, label %bb8259.i, label %bb8208.i
+bb8208.i: ; preds = %bb8161.i
+ br label %bb8259.i
+bb8259.i: ; preds = %bb8208.i, %bb8161.i
+ br i1 false, label %bb8608.i, label %bb8352.i
+bb8352.i: ; preds = %bb8259.i
+ br i1 false, label %bb8608.i, label %bb8396.i
+bb8396.i: ; preds = %bb8352.i
+ br label %bb8588.i63
+bb8492.i: ; preds = %bb8588.i63
+ br label %bb8588.i63
+bb8588.i63: ; preds = %bb8492.i, %bb8396.i
+ br i1 false, label %bb8599.i, label %bb8492.i
+bb8599.i: ; preds = %bb8588.i63
+ br label %bb8608.i
+bb8608.i: ; preds = %bb8599.i, %bb8352.i, %bb8259.i
+ br i1 false, label %bb8706.i, label %bb8655.i
+bb8655.i: ; preds = %bb8608.i
+ br label %bb8990.i
+bb8706.i: ; preds = %bb8608.i
+ br label %bb8990.i
+bb8715.i: ; preds = %bb6924.i, %bb6924.i
+ br label %bb8990.i
+bb8792.i: ; preds = %bb6924.i
+ br label %bb8990.i
+bb8929.i: ; preds = %bb6924.i
+ br label %bb8990.i
+bb8990.i: ; preds = %bb8929.i, %bb8792.i, %bb8715.i, %bb8706.i, %bb8655.i, %bb6924.i, %bb6908.i, %bb6873.i, %bb6853.i48, %bb6844.i, %bb6793.i, %bb6403.i, %bb6332.i, %bb6323.i, %bb6272.i, %bb5882.i, %bb5558.i, %bb5556.i
+ switch i32 %sf4083.0.i, label %bb11184.i [
+ i32 0, label %bb10372.i
+ i32 1, label %bb10609.i
+ i32 2, label %bb10811.i
+ i32 3, label %bb11013.i
+ i32 4, label %bb8992.i
+ i32 5, label %bb8992.i
+ i32 6, label %bb8992.i
+ i32 7, label %bb8992.i
+ i32 8, label %bb9195.i
+ i32 9, label %bb9195.i
+ i32 10, label %bb9965.i
+ i32 11, label %bb9585.i
+ i32 16, label %bb9195.i
+ ]
+bb8992.i: ; preds = %bb8990.i, %bb8990.i, %bb8990.i, %bb8990.i
+ switch i32 0, label %bb11184.i [
+ i32 0, label %bb9075.i
+ i32 1, label %bb9105.i
+ i32 2, label %bb9135.i
+ i32 3, label %bb9165.i
+ i32 11, label %bb8994.i
+ ]
+bb8994.i: ; preds = %bb8992.i
+ br label %bb11247.i
+bb9075.i: ; preds = %bb8992.i
+ br label %bb11247.i
+bb9105.i: ; preds = %bb8992.i
+ br label %bb11247.i
+bb9135.i: ; preds = %bb8992.i
+ br label %bb11247.i
+bb9165.i: ; preds = %bb8992.i
+ br label %bb11247.i
+bb9195.i: ; preds = %bb8990.i, %bb8990.i, %bb8990.i
+ switch i32 0, label %bb11184.i [
+ i32 0, label %bb9491.i
+ i32 1, label %bb9521.i
+ i32 2, label %bb9551.i
+ i32 3, label %bb9581.i
+ i32 4, label %bb9197.i
+ i32 11, label %bb9342.i
+ ]
+bb9197.i: ; preds = %bb9195.i
+ br label %bb11247.i
+bb9342.i: ; preds = %bb9195.i
+ br label %bb11247.i
+bb9491.i: ; preds = %bb9195.i
+ br label %bb11247.i
+bb9521.i: ; preds = %bb9195.i
+ br label %bb11247.i
+bb9551.i: ; preds = %bb9195.i
+ br label %bb11247.i
+bb9581.i: ; preds = %bb9195.i
+ br label %bb11247.i
+bb9585.i: ; preds = %bb8990.i
+ switch i32 0, label %bb11184.i [
+ i32 0, label %bb9879.i
+ i32 1, label %bb9920.i
+ i32 2, label %bb9920.i
+ i32 3, label %bb9924.i
+ i32 4, label %bb9587.i
+ i32 8, label %bb9587.i
+ ]
+bb9587.i: ; preds = %bb9585.i, %bb9585.i
+ br label %bb11247.i
+bb9879.i: ; preds = %bb9585.i
+ br label %bb11247.i
+bb9920.i: ; preds = %bb9585.i, %bb9585.i
+ br label %bb11247.i
+bb9924.i: ; preds = %bb9585.i
+ br label %bb11247.i
+bb9965.i: ; preds = %bb8990.i
+ switch i32 0, label %bb11184.i [
+ i32 1, label %bb10368.i
+ i32 2, label %bb10368.i
+ i32 3, label %bb10364.i
+ i32 4, label %bb9967.i
+ i32 8, label %bb10127.i
+ i32 11, label %bb10287.i
+ ]
+bb9967.i: ; preds = %bb9965.i
+ br label %bb11247.i
+bb10127.i: ; preds = %bb9965.i
+ br label %bb11247.i
+bb10287.i: ; preds = %bb9965.i
+ br label %bb11247.i
+bb10364.i: ; preds = %bb9965.i
+ br label %bb11247.i
+bb10368.i: ; preds = %bb9965.i, %bb9965.i
+ br label %bb11247.i
+bb10372.i: ; preds = %bb8990.i
+ switch i32 0, label %bb11184.i [
+ i32 1, label %bb10605.i
+ i32 2, label %bb10605.i
+ i32 3, label %bb10601.i
+ i32 4, label %bb10374.i
+ i32 8, label %bb10449.i
+ i32 11, label %bb10524.i
+ ]
+bb10374.i: ; preds = %bb10372.i
+ br label %bb11247.i
+bb10449.i: ; preds = %bb10372.i
+ br label %bb11247.i
+bb10524.i: ; preds = %bb10372.i
+ br label %bb11247.i
+bb10601.i: ; preds = %bb10372.i
+ br label %bb11247.i
+bb10605.i: ; preds = %bb10372.i, %bb10372.i
+ br label %bb11247.i
+bb10609.i: ; preds = %bb8990.i
+ switch i32 0, label %bb11184.i [
+ i32 0, label %bb10807.i
+ i32 2, label %bb10807.i
+ i32 3, label %bb10803.i
+ i32 4, label %bb10611.i
+ i32 8, label %bb10686.i
+ i32 11, label %bb10761.i
+ ]
+bb10611.i: ; preds = %bb10609.i
+ br label %bb11247.i
+bb10686.i: ; preds = %bb10609.i
+ br label %bb11247.i
+bb10761.i: ; preds = %bb10609.i
+ br label %bb11247.i
+bb10803.i: ; preds = %bb10609.i
+ br label %bb11247.i
+bb10807.i: ; preds = %bb10609.i, %bb10609.i
+ br label %bb11247.i
+bb10811.i: ; preds = %bb8990.i
+ switch i32 0, label %bb11184.i [
+ i32 0, label %bb11009.i
+ i32 1, label %bb11009.i
+ i32 3, label %bb11005.i
+ i32 4, label %bb10813.i
+ i32 8, label %bb10888.i
+ i32 11, label %bb10963.i
+ ]
+bb10813.i: ; preds = %bb10811.i
+ br label %bb11247.i
+bb10888.i: ; preds = %bb10811.i
+ br label %bb11247.i
+bb10963.i: ; preds = %bb10811.i
+ br label %bb11247.i
+bb11005.i: ; preds = %bb10811.i
+ br label %bb11247.i
+bb11009.i: ; preds = %bb10811.i, %bb10811.i
+ br label %bb11247.i
+bb11013.i: ; preds = %bb8990.i
+ switch i32 0, label %bb11184.i [
+ i32 0, label %bb11180.i
+ i32 1, label %bb11180.i
+ i32 2, label %bb11180.i
+ i32 4, label %bb11015.i
+ i32 8, label %bb11090.i
+ i32 11, label %bb11103.i
+ ]
+bb11015.i: ; preds = %bb11013.i
+ br label %bb11247.i
+bb11090.i: ; preds = %bb11013.i
+ br label %bb11247.i
+bb11103.i: ; preds = %bb11013.i
+ br label %bb11247.i
+bb11180.i: ; preds = %bb11013.i, %bb11013.i, %bb11013.i
+ br label %bb11184.i
+bb11184.i: ; preds = %bb11180.i, %bb11013.i, %bb10811.i, %bb10609.i, %bb10372.i, %bb9965.i, %bb9585.i, %bb9195.i, %bb8992.i, %bb8990.i
+ br label %bb11247.i
+bb11247.i: ; preds = %bb11184.i, %bb11103.i, %bb11090.i, %bb11015.i, %bb11009.i, %bb11005.i, %bb10963.i, %bb10888.i, %bb10813.i, %bb10807.i, %bb10803.i, %bb10761.i, %bb10686.i, %bb10611.i, %bb10605.i, %bb10601.i, %bb10524.i, %bb10449.i, %bb10374.i, %bb10368.i, %bb10364.i, %bb10287.i, %bb10127.i, %bb9967.i, %bb9924.i, %bb9920.i, %bb9879.i, %bb9587.i, %bb9581.i, %bb9551.i, %bb9521.i, %bb9491.i, %bb9342.i, %bb9197.i, %bb9165.i, %bb9135.i, %bb9105.i, %bb9075.i, %bb8994.i
+ br i1 false, label %bb11250.i, label %bb11256.i
+bb11250.i: ; preds = %bb11247.i
+ br label %bb11378.i
+bb11256.i: ; preds = %bb11247.i
+ switch i32 0, label %bb11348.i [
+ i32 4, label %bb11258.i
+ i32 8, label %bb11258.i
+ i32 11, label %bb11318.i
+ ]
+bb11258.i: ; preds = %bb11256.i, %bb11256.i
+ br i1 false, label %bb11273.i, label %bb11261.i
+bb11261.i: ; preds = %bb11258.i
+ br label %bb11273.i
+bb11273.i: ; preds = %bb11261.i, %bb11258.i
+ br i1 false, label %bb11288.i, label %bb11276.i
+bb11276.i: ; preds = %bb11273.i
+ br label %bb11288.i
+bb11288.i: ; preds = %bb11276.i, %bb11273.i
+ br i1 false, label %bb11303.i, label %bb11291.i
+bb11291.i: ; preds = %bb11288.i
+ br label %bb11303.i
+bb11303.i: ; preds = %bb11291.i, %bb11288.i
+ br i1 false, label %bb11318.i, label %bb11306.i
+bb11306.i: ; preds = %bb11303.i
+ br label %bb11318.i
+bb11318.i: ; preds = %bb11306.i, %bb11303.i, %bb11256.i
+ br i1 false, label %bb11333.i, label %bb11321.i
+bb11321.i: ; preds = %bb11318.i
+ br label %bb11333.i
+bb11333.i: ; preds = %bb11321.i, %bb11318.i
+ br i1 false, label %bb11348.i, label %bb11336.i
+bb11336.i: ; preds = %bb11333.i
+ br label %bb11348.i
+bb11348.i: ; preds = %bb11336.i, %bb11333.i, %bb11256.i
+ br i1 false, label %bb11363.i, label %bb11351.i
+bb11351.i: ; preds = %bb11348.i
+ br label %bb11363.i
+bb11363.i: ; preds = %bb11351.i, %bb11348.i
+ br i1 false, label %bb11378.i, label %bb11366.i
+bb11366.i: ; preds = %bb11363.i
+ br label %bb11378.i
+bb11378.i: ; preds = %bb11366.i, %bb11363.i, %bb11250.i
+ br label %bb12038.i
+bb12038.i: ; preds = %bb11378.i, %bb5464.i, %bb5404.i, %bb5374.i, %bb5344.i, %bb5263.i
+ switch i32 0, label %bb15866.i [
+ i32 3, label %bb13016.i
+ i32 4, label %bb12040.i
+ i32 8, label %bb12514.i
+ i32 10, label %bb12903.i
+ i32 11, label %bb12553.i
+ i32 16, label %bb12514.i
+ ]
+bb12040.i: ; preds = %bb12038.i, %bb5467.i
+ br label %bb13026.i
+bb12514.i: ; preds = %bb12038.i, %bb12038.i, %bb5467.i, %bb5467.i
+ br label %bb13026.i
+bb12553.i: ; preds = %bb12038.i, %bb5467.i
+ br i1 false, label %bb12558.i, label %bb12747.i
+bb12558.i: ; preds = %bb12553.i
+ br i1 false, label %bb12666.i, label %bb12654.i
+bb12654.i: ; preds = %bb12558.i
+ br label %bb12666.i
+bb12666.i: ; preds = %bb12654.i, %bb12558.i
+ br label %bb12747.i
+bb12747.i: ; preds = %bb12666.i, %bb12553.i
+ br label %bb13026.i
+bb12903.i: ; preds = %bb12038.i, %bb5467.i
+ br i1 false, label %bb12908.i, label %bb13026.i
+bb12908.i: ; preds = %bb12903.i
+ br i1 false, label %bb13026.i, label %bb13004.i
+bb13004.i: ; preds = %bb12908.i
+ switch i32 0, label %bb15866.i [
+ i32 3, label %bb13752.i
+ i32 4, label %bb14197.i
+ i32 8, label %bb14197.i
+ i32 10, label %bb13752.i
+ i32 11, label %bb13307.i
+ i32 16, label %bb13028.i
+ ]
+bb13016.i: ; preds = %bb12038.i, %bb5467.i
+ br label %bb13026.i
+bb13026.i: ; preds = %bb13016.i, %bb12908.i, %bb12903.i, %bb12747.i, %bb12514.i, %bb12040.i
+ switch i32 0, label %bb15866.i [
+ i32 3, label %bb13752.i
+ i32 4, label %bb14197.i
+ i32 8, label %bb14197.i
+ i32 10, label %bb13752.i
+ i32 11, label %bb13307.i
+ i32 16, label %bb13028.i
+ ]
+bb13028.i: ; preds = %bb13026.i, %bb13004.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb13307.i: ; preds = %bb13026.i, %bb13004.i
+ switch i32 %dt4080.0.i, label %bb13736.i [
+ i32 6, label %bb13312.i
+ i32 1, label %bb13624.i
+ i32 3, label %bb13624.i
+ i32 5, label %bb13649.i
+ i32 4, label %bb13688.i
+ i32 7, label %bb15866.i
+ ]
+bb13312.i: ; preds = %bb13307.i
+ br i1 false, label %bb13483.i, label %bb13400.i
+bb13400.i: ; preds = %bb13312.i
+ br label %bb13483.i
+bb13483.i: ; preds = %bb13400.i, %bb13312.i
+ br i1 false, label %bb13593.i, label %bb13505.i
+bb13505.i: ; preds = %bb13483.i
+ switch i32 %dt4080.0.i, label %bb14181.i [
+ i32 6, label %bb13757.i
+ i32 1, label %bb14069.i
+ i32 3, label %bb14069.i
+ i32 5, label %bb14094.i
+ i32 4, label %bb14133.i
+ i32 7, label %bb15866.i
+ ]
+bb13593.i: ; preds = %bb13483.i
+ switch i32 %dt4080.0.i, label %bb14181.i [
+ i32 6, label %bb13757.i
+ i32 1, label %bb14069.i
+ i32 3, label %bb14069.i
+ i32 5, label %bb14094.i
+ i32 4, label %bb14133.i
+ i32 7, label %bb15866.i
+ ]
+bb13624.i: ; preds = %bb13307.i, %bb13307.i
+ switch i32 %dt4080.0.i, label %bb14181.i [
+ i32 6, label %bb13757.i
+ i32 1, label %bb14069.i
+ i32 3, label %bb14069.i
+ i32 5, label %bb14094.i
+ i32 4, label %bb14133.i
+ i32 7, label %bb15866.i
+ ]
+bb13649.i: ; preds = %bb13307.i
+ br label %bb14094.i
+bb13688.i: ; preds = %bb13307.i
+ br label %bb14133.i
+bb13736.i: ; preds = %bb13307.i
+ br label %bb13752.i
+bb13752.i: ; preds = %bb13736.i, %bb13026.i, %bb13026.i, %bb13004.i, %bb13004.i
+ switch i32 %dt4080.0.i, label %bb14181.i [
+ i32 6, label %bb13757.i
+ i32 1, label %bb14069.i
+ i32 3, label %bb14069.i
+ i32 5, label %bb14094.i
+ i32 4, label %bb14133.i
+ i32 7, label %bb15866.i
+ ]
+bb13757.i: ; preds = %bb13752.i, %bb13624.i, %bb13593.i, %bb13505.i
+ br i1 false, label %bb13928.i, label %bb13845.i
+bb13845.i: ; preds = %bb13757.i
+ br label %bb13928.i
+bb13928.i: ; preds = %bb13845.i, %bb13757.i
+ br i1 false, label %bb14038.i, label %bb13950.i
+bb13950.i: ; preds = %bb13928.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14038.i: ; preds = %bb13928.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14069.i: ; preds = %bb13752.i, %bb13752.i, %bb13624.i, %bb13624.i, %bb13593.i, %bb13593.i, %bb13505.i, %bb13505.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14094.i: ; preds = %bb13752.i, %bb13649.i, %bb13624.i, %bb13593.i, %bb13505.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14133.i: ; preds = %bb13752.i, %bb13688.i, %bb13624.i, %bb13593.i, %bb13505.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14181.i: ; preds = %bb13752.i, %bb13624.i, %bb13593.i, %bb13505.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14197.i: ; preds = %bb13026.i, %bb13026.i, %bb13004.i, %bb13004.i
+ switch i32 %dt4080.0.i, label %bb15805.i [
+ i32 6, label %bb14202.i
+ i32 1, label %bb15411.i
+ i32 3, label %bb15411.i
+ i32 5, label %bb15493.i
+ i32 4, label %bb15631.i
+ i32 7, label %bb15866.i
+ ]
+bb14202.i: ; preds = %bb14197.i
+ br i1 false, label %bb14373.i, label %bb14290.i
+bb14290.i: ; preds = %bb14202.i
+ br label %bb14373.i
+bb14373.i: ; preds = %bb14290.i, %bb14202.i
+ br i1 false, label %bb14483.i, label %bb14395.i
+bb14395.i: ; preds = %bb14373.i
+ br label %bb14483.i
+bb14483.i: ; preds = %bb14395.i, %bb14373.i
+ br i1 false, label %bb14672.i, label %bb14589.i
+bb14589.i: ; preds = %bb14483.i
+ br label %bb14672.i
+bb14672.i: ; preds = %bb14589.i, %bb14483.i
+ br i1 false, label %bb14782.i, label %bb14694.i
+bb14694.i: ; preds = %bb14672.i
+ br label %bb14782.i
+bb14782.i: ; preds = %bb14694.i, %bb14672.i
+ br i1 false, label %bb14971.i, label %bb14888.i
+bb14888.i: ; preds = %bb14782.i
+ br label %bb14971.i
+bb14971.i: ; preds = %bb14888.i, %bb14782.i
+ br i1 false, label %bb15081.i, label %bb14993.i
+bb14993.i: ; preds = %bb14971.i
+ br label %bb15081.i
+bb15081.i: ; preds = %bb14993.i, %bb14971.i
+ br i1 false, label %bb15270.i, label %bb15187.i
+bb15187.i: ; preds = %bb15081.i
+ br label %bb15270.i
+bb15270.i: ; preds = %bb15187.i, %bb15081.i
+ br i1 false, label %bb15380.i, label %bb15292.i
+bb15292.i: ; preds = %bb15270.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15380.i: ; preds = %bb15270.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15411.i: ; preds = %bb14197.i, %bb14197.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15493.i: ; preds = %bb14197.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15631.i: ; preds = %bb14197.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15805.i: ; preds = %bb14197.i
+ br label %bb15866.i
+bb15866.i: ; preds = %bb15805.i, %bb14197.i, %bb13752.i, %bb13624.i, %bb13593.i, %bb13505.i, %bb13307.i, %bb13026.i, %bb13004.i, %bb12038.i, %bb5467.i
+ br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15869.i: ; preds = %bb15866.i, %bb15631.i, %bb15493.i, %bb15411.i, %bb15380.i, %bb15292.i, %bb14181.i, %bb14133.i, %bb14094.i, %bb14069.i, %bb14038.i, %bb13950.i, %bb13028.i
+ switch i32 0, label %UnifiedReturnBlock.i177 [
+ i32 4, label %bb15874.i
+ i32 8, label %bb15960.i
+ ]
+bb15874.i: ; preds = %bb15869.i
+ br label %glgVectorFloatConversion.exit
+bb15960.i: ; preds = %bb15869.i
+ br label %glgVectorFloatConversion.exit
+UnifiedReturnBlock.i177: ; preds = %bb15869.i, %bb15866.i, %bb15631.i, %bb15493.i, %bb15411.i, %bb15380.i, %bb15292.i, %bb14181.i, %bb14133.i, %bb14094.i, %bb14069.i, %bb14038.i, %bb13950.i, %bb13028.i
+ br label %glgVectorFloatConversion.exit
+glgVectorFloatConversion.exit: ; preds = %UnifiedReturnBlock.i177, %bb15960.i, %bb15874.i
+ br label %bb16581.i
+bb5351.i: ; preds = %loadVecColor_BGRA_UI8888R.exit
+ br i1 false, label %bb5359.i, label %bb5586.i
+bb5359.i: ; preds = %bb5351.i
+ switch i32 0, label %bb5586.i [
+ i32 0, label %bb5361.i
+ i32 1, label %bb5511.i
+ i32 2, label %bb5511.i
+ ]
+bb5361.i: ; preds = %bb5359.i
+ br i1 false, label %bb5366.i, label %bb5379.i
+bb5366.i: ; preds = %bb5361.i
+ br label %bb7230.i
+bb5379.i: ; preds = %bb5361.i
+ switch i32 %sf4083.0.i, label %bb5415.i [
+ i32 1, label %bb5384.i
+ i32 2, label %bb5402.i
+ ]
+bb5384.i: ; preds = %bb5379.i
+ switch i32 0, label %bb7230.i [
+ i32 4, label %bb5445.i
+ i32 8, label %bb5445.i
+ i32 11, label %bb5445.i
+ ]
+bb5402.i: ; preds = %bb5379.i
+ switch i32 0, label %bb7230.i [
+ i32 4, label %bb5445.i
+ i32 8, label %bb5445.i
+ i32 11, label %bb5445.i
+ ]
+bb5415.i: ; preds = %bb5379.i
+ switch i32 0, label %bb7230.i [
+ i32 4, label %bb5445.i
+ i32 8, label %bb5445.i
+ i32 11, label %bb5445.i
+ ]
+bb5445.i: ; preds = %bb5415.i, %bb5415.i, %bb5415.i, %bb5402.i, %bb5402.i, %bb5402.i, %bb5384.i, %bb5384.i, %bb5384.i
+ switch i32 0, label %bb7230.i [
+ i32 4, label %bb5470.i
+ i32 8, label %bb5470.i
+ i32 11, label %bb6853.i
+ ]
+bb5470.i: ; preds = %bb5445.i, %bb5445.i
+ switch i32 0, label %bb7230.i [
+ i32 4, label %bb5498.i
+ i32 8, label %bb5493.i
+ i32 11, label %bb6853.i
+ ]
+bb5493.i: ; preds = %bb5470.i
+ br i1 false, label %bb5498.i, label %bb5586.i
+bb5498.i: ; preds = %bb5493.i, %bb5470.i
+ switch i32 0, label %bb7230.i [
+ i32 4, label %bb5591.i
+ i32 8, label %bb6153.i
+ i32 11, label %bb6853.i
+ ]
+bb5511.i: ; preds = %bb5359.i, %bb5359.i
+ br i1 false, label %bb5568.i, label %bb5586.i
+bb5568.i: ; preds = %bb5511.i
+ br label %bb5586.i
+bb5586.i: ; preds = %bb5568.i, %bb5511.i, %bb5493.i, %bb5359.i, %bb5351.i
+ switch i32 0, label %bb7230.i [
+ i32 4, label %bb5591.i
+ i32 8, label %bb6153.i
+ i32 11, label %bb6853.i
+ ]
+bb5591.i: ; preds = %bb5586.i, %bb5498.i
+ switch i32 0, label %bb5995.i [
+ i32 4, label %bb5596.i
+ i32 8, label %bb5680.i
+ i32 11, label %bb5842.i
+ ]
+bb5596.i: ; preds = %bb5591.i
+ br i1 false, label %bb8428.i, label %bb5602.i
+bb5602.i: ; preds = %bb5596.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb5680.i: ; preds = %bb5591.i
+ br i1 false, label %bb5692.i, label %bb5764.i
+bb5692.i: ; preds = %bb5680.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb5764.i: ; preds = %bb5680.i
+ br i1 false, label %bb8428.i, label %bb5772.i
+bb5772.i: ; preds = %bb5764.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb5842.i: ; preds = %bb5591.i
+ br i1 false, label %bb5920.i, label %bb5845.i
+bb5845.i: ; preds = %bb5842.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb5920.i: ; preds = %bb5842.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb5995.i: ; preds = %bb5591.i
+ switch i32 %df4081.0.i, label %bb8428.i [
+ i32 0, label %bb6007.i
+ i32 10, label %bb6007.i
+ i32 1, label %bb6042.i
+ i32 2, label %bb6079.i
+ i32 3, label %bb6116.i
+ ]
+bb6007.i: ; preds = %bb5995.i, %bb5995.i
+ br i1 false, label %bb6012.i, label %bb8428.i
+bb6012.i: ; preds = %bb6007.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6042.i: ; preds = %bb5995.i
+ br i1 false, label %bb6049.i, label %bb6045.i
+bb6045.i: ; preds = %bb6042.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6049.i: ; preds = %bb6042.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6079.i: ; preds = %bb5995.i
+ br i1 false, label %bb6086.i, label %bb6082.i
+bb6082.i: ; preds = %bb6079.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6086.i: ; preds = %bb6079.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6116.i: ; preds = %bb5995.i
+ br i1 false, label %bb6123.i, label %bb6119.i
+bb6119.i: ; preds = %bb6116.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6123.i: ; preds = %bb6116.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6153.i: ; preds = %bb5586.i, %bb5498.i
+ switch i32 0, label %bb6724.i [
+ i32 4, label %bb6158.i
+ i32 8, label %bb6459.i
+ i32 11, label %bb6621.i
+ ]
+bb6158.i: ; preds = %bb6153.i
+ br i1 false, label %bb6242.i, label %bb6161.i
+bb6161.i: ; preds = %bb6158.i
+ br i1 false, label %bb6239.i, label %bb6166.i
+bb6166.i: ; preds = %bb6161.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6239.i: ; preds = %bb6161.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6242.i: ; preds = %bb6158.i
+ br i1 false, label %bb6245.i, label %bb6317.i
+bb6245.i: ; preds = %bb6242.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6317.i: ; preds = %bb6242.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6459.i: ; preds = %bb6153.i
+ br i1 false, label %bb6471.i, label %bb6543.i
+bb6471.i: ; preds = %bb6459.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6543.i: ; preds = %bb6459.i
+ br i1 false, label %bb8428.i, label %bb6551.i
+bb6551.i: ; preds = %bb6543.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6621.i: ; preds = %bb6153.i
+ br i1 false, label %bb6626.i, label %bb6651.i
+bb6626.i: ; preds = %bb6621.i
+ br label %bb6651.i
+bb6651.i: ; preds = %bb6626.i, %bb6621.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6724.i: ; preds = %bb6153.i
+ switch i32 %df4081.0.i, label %bb8428.i [
+ i32 0, label %bb6736.i
+ i32 10, label %bb6736.i
+ i32 1, label %bb6771.i
+ i32 2, label %bb6808.i
+ i32 3, label %bb6845.i
+ ]
+bb6736.i: ; preds = %bb6724.i, %bb6724.i
+ br i1 false, label %bb6741.i, label %bb8428.i
+bb6741.i: ; preds = %bb6736.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6771.i: ; preds = %bb6724.i
+ br i1 false, label %bb6778.i, label %bb6774.i
+bb6774.i: ; preds = %bb6771.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6778.i: ; preds = %bb6771.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6808.i: ; preds = %bb6724.i
+ br i1 false, label %bb6815.i, label %bb6811.i
+bb6811.i: ; preds = %bb6808.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6815.i: ; preds = %bb6808.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6845.i: ; preds = %bb6724.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6853.i: ; preds = %bb5586.i, %bb5498.i, %bb5470.i, %bb5445.i
+ switch i32 0, label %bb8428.i [
+ i32 4, label %bb6858.i
+ i32 8, label %bb7072.i
+ i32 10, label %bb7149.i
+ i32 3, label %bb7192.i
+ ]
+bb6858.i: ; preds = %bb6853.i
+ br i1 false, label %bb6942.i, label %bb6861.i
+bb6861.i: ; preds = %bb6858.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb6942.i: ; preds = %bb6858.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7072.i: ; preds = %bb6853.i
+ br i1 false, label %bb7119.i, label %bb7075.i
+bb7075.i: ; preds = %bb7072.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7119.i: ; preds = %bb7072.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7149.i: ; preds = %bb6853.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7192.i: ; preds = %bb6853.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7230.i: ; preds = %bb5586.i, %bb5498.i, %bb5470.i, %bb5445.i, %bb5415.i, %bb5402.i, %bb5384.i, %bb5366.i
+ switch i32 %sf4083.0.i, label %bb8428.i [
+ i32 10, label %bb7235.i
+ i32 0, label %bb7455.i
+ i32 1, label %bb7725.i
+ i32 2, label %bb7978.i
+ i32 3, label %bb8231.i
+ ]
+bb7235.i: ; preds = %bb7230.i
+ switch i32 0, label %bb7442.i [
+ i32 4, label %bb7240.i
+ i32 8, label %bb7329.i
+ i32 11, label %bb7369.i
+ ]
+bb7240.i: ; preds = %bb7235.i
+ br i1 false, label %bb7252.i, label %bb7243.i
+bb7243.i: ; preds = %bb7240.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7252.i: ; preds = %bb7240.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7329.i: ; preds = %bb7235.i
+ br i1 false, label %bb7339.i, label %bb7332.i
+bb7332.i: ; preds = %bb7329.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7339.i: ; preds = %bb7329.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7369.i: ; preds = %bb7235.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7442.i: ; preds = %bb7235.i
+ br i1 false, label %bb7447.i, label %bb8428.i
+bb7447.i: ; preds = %bb7442.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7455.i: ; preds = %bb7230.i
+ switch i32 0, label %bb7703.i [
+ i32 4, label %bb7460.i
+ i32 8, label %bb7546.i
+ i32 11, label %bb7630.i
+ ]
+bb7460.i: ; preds = %bb7455.i
+ br i1 false, label %bb7471.i, label %bb7463.i
+bb7463.i: ; preds = %bb7460.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7471.i: ; preds = %bb7460.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7546.i: ; preds = %bb7455.i
+ br i1 false, label %bb7555.i, label %bb7549.i
+bb7549.i: ; preds = %bb7546.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7555.i: ; preds = %bb7546.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7630.i: ; preds = %bb7455.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7703.i: ; preds = %bb7455.i
+ br i1 false, label %bb7709.i, label %bb7712.i
+bb7709.i: ; preds = %bb7703.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7712.i: ; preds = %bb7703.i
+ br i1 false, label %bb7717.i, label %bb8428.i
+bb7717.i: ; preds = %bb7712.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7725.i: ; preds = %bb7230.i
+ switch i32 0, label %bb7945.i [
+ i32 4, label %bb7730.i
+ i32 8, label %bb7819.i
+ i32 11, label %bb7906.i
+ ]
+bb7730.i: ; preds = %bb7725.i
+ br i1 false, label %bb7744.i, label %bb7733.i
+bb7733.i: ; preds = %bb7730.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7744.i: ; preds = %bb7730.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7819.i: ; preds = %bb7725.i
+ br i1 false, label %bb7831.i, label %bb7822.i
+bb7822.i: ; preds = %bb7819.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7831.i: ; preds = %bb7819.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7906.i: ; preds = %bb7725.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7945.i: ; preds = %bb7725.i
+ switch i32 %df4081.0.i, label %bb8428.i [
+ i32 0, label %bb7962.i
+ i32 2, label %bb7962.i
+ i32 10, label %bb7962.i
+ i32 3, label %bb7970.i
+ ]
+bb7962.i: ; preds = %bb7945.i, %bb7945.i, %bb7945.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7970.i: ; preds = %bb7945.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7978.i: ; preds = %bb7230.i
+ switch i32 0, label %bb8198.i [
+ i32 4, label %bb7983.i
+ i32 8, label %bb8072.i
+ i32 11, label %bb8159.i
+ ]
+bb7983.i: ; preds = %bb7978.i
+ br i1 false, label %bb7997.i, label %bb7986.i
+bb7986.i: ; preds = %bb7983.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb7997.i: ; preds = %bb7983.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8072.i: ; preds = %bb7978.i
+ br i1 false, label %bb8084.i, label %bb8075.i
+bb8075.i: ; preds = %bb8072.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8084.i: ; preds = %bb8072.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8159.i: ; preds = %bb7978.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8198.i: ; preds = %bb7978.i
+ switch i32 %df4081.0.i, label %bb8428.i [
+ i32 0, label %bb8215.i
+ i32 1, label %bb8215.i
+ i32 10, label %bb8215.i
+ i32 3, label %bb8223.i
+ ]
+bb8215.i: ; preds = %bb8198.i, %bb8198.i, %bb8198.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8223.i: ; preds = %bb8198.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8231.i: ; preds = %bb7230.i
+ switch i32 0, label %bb8428.i [
+ i32 4, label %bb8236.i
+ i32 8, label %bb8326.i
+ i32 11, label %bb8347.i
+ i32 10, label %bb8425.i
+ ]
+bb8236.i: ; preds = %bb8231.i
+ br i1 false, label %bb8251.i, label %bb8239.i
+bb8239.i: ; preds = %bb8236.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8251.i: ; preds = %bb8236.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8326.i: ; preds = %bb8231.i
+ br i1 false, label %bb8339.i, label %bb8428.i
+bb8339.i: ; preds = %bb8326.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8347.i: ; preds = %bb8231.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8425.i: ; preds = %bb8231.i
+ br label %bb8428.i
+bb8428.i: ; preds = %bb8425.i, %bb8326.i, %bb8231.i, %bb8198.i, %bb7945.i, %bb7712.i, %bb7442.i, %bb7230.i, %bb6853.i, %bb6736.i, %bb6724.i, %bb6543.i, %bb6007.i, %bb5995.i, %bb5764.i, %bb5596.i
+ br i1 false, label %bb8668.i, label %bb8434.i
+bb8434.i: ; preds = %bb8428.i, %bb8347.i, %bb8339.i, %bb8251.i, %bb8239.i, %bb8223.i, %bb8215.i, %bb8159.i, %bb8084.i, %bb8075.i, %bb7997.i, %bb7986.i, %bb7970.i, %bb7962.i, %bb7906.i, %bb7831.i, %bb7822.i, %bb7744.i, %bb7733.i, %bb7717.i, %bb7709.i, %bb7630.i, %bb7555.i, %bb7549.i, %bb7471.i, %bb7463.i, %bb7447.i, %bb7369.i, %bb7339.i, %bb7332.i, %bb7252.i, %bb7243.i, %bb7192.i, %bb7149.i, %bb7119.i, %bb7075.i, %bb6942.i, %bb6861.i, %bb6845.i, %bb6815.i, %bb6811.i, %bb6778.i, %bb6774.i, %bb6741.i, %bb6651.i, %bb6551.i, %bb6471.i, %bb6317.i, %bb6245.i, %bb6239.i, %bb6166.i, %bb6123.i, %bb6119.i, %bb6086.i, %bb6082.i, %bb6049.i, %bb6045.i, %bb6012.i, %bb5920.i, %bb5845.i, %bb5772.i, %bb5692.i, %bb5602.i
+ switch i32 0, label %bb8668.i [
+ i32 0, label %bb8436.i
+ i32 1, label %bb8531.i
+ i32 2, label %bb8531.i
+ ]
+bb8436.i: ; preds = %bb8434.i
+ switch i32 0, label %bb9310.i [
+ i32 4, label %bb8465.i
+ i32 8, label %bb8465.i
+ i32 11, label %bb8465.i
+ i32 3, label %bb9301.i
+ ]
+bb8465.i: ; preds = %bb8436.i, %bb8436.i, %bb8436.i
+ switch i32 0, label %bb9310.i [
+ i32 4, label %bb8490.i
+ i32 8, label %bb8490.i
+ i32 3, label %bb9301.i
+ i32 11, label %bb9153.i
+ ]
+bb8490.i: ; preds = %bb8465.i, %bb8465.i
+ switch i32 0, label %bb9310.i [
+ i32 4, label %bb8518.i
+ i32 8, label %bb8513.i
+ i32 3, label %bb9301.i
+ i32 11, label %bb9153.i
+ ]
+bb8513.i: ; preds = %bb8490.i
+ br i1 false, label %bb8518.i, label %bb8668.i
+bb8518.i: ; preds = %bb8513.i, %bb8490.i
+ switch i32 0, label %bb9310.i [
+ i32 3, label %bb9301.i
+ i32 4, label %bb8670.i
+ i32 8, label %bb9112.i
+ i32 11, label %bb9153.i
+ ]
+bb8531.i: ; preds = %bb8434.i, %bb8434.i
+ br i1 false, label %bb8536.i, label %bb8575.i
+bb8536.i: ; preds = %bb8531.i
+ br i1 false, label %bb8557.i, label %bb8588.i
+bb8557.i: ; preds = %bb8536.i
+ switch i32 0, label %bb9310.i [
+ i32 4, label %bb8600.i
+ i32 8, label %bb8600.i
+ i32 3, label %bb9301.i
+ i32 11, label %bb9153.i
+ ]
+bb8575.i: ; preds = %bb8531.i
+ br label %bb8588.i
+bb8588.i: ; preds = %bb8575.i, %bb8536.i
+ switch i32 0, label %bb9310.i [
+ i32 4, label %bb8600.i
+ i32 8, label %bb8600.i
+ i32 3, label %bb9301.i
+ i32 11, label %bb9153.i
+ ]
+bb8600.i: ; preds = %bb8588.i, %bb8588.i, %bb8557.i, %bb8557.i
+ switch i32 0, label %bb9310.i [
+ i32 4, label %bb8629.i
+ i32 3, label %bb9301.i
+ i32 8, label %bb9112.i
+ i32 11, label %bb9153.i
+ ]
+bb8629.i: ; preds = %bb8600.i
+ br i1 false, label %bb8650.i, label %bb8668.i
+bb8650.i: ; preds = %bb8629.i
+ br label %bb8668.i
+bb8668.i: ; preds = %bb8650.i, %bb8629.i, %bb8513.i, %bb8434.i, %bb8428.i, %bb8347.i, %bb8339.i, %bb8251.i, %bb8239.i, %bb8223.i, %bb8215.i, %bb8159.i, %bb8084.i, %bb8075.i, %bb7997.i, %bb7986.i, %bb7970.i, %bb7962.i, %bb7906.i, %bb7831.i, %bb7822.i, %bb7744.i, %bb7733.i, %bb7717.i, %bb7709.i, %bb7630.i, %bb7555.i, %bb7549.i, %bb7471.i, %bb7463.i, %bb7447.i, %bb7369.i, %bb7339.i, %bb7332.i, %bb7252.i, %bb7243.i, %bb7192.i, %bb7149.i, %bb7119.i, %bb7075.i, %bb6942.i, %bb6861.i, %bb6845.i, %bb6815.i, %bb6811.i, %bb6778.i, %bb6774.i, %bb6741.i, %bb6651.i, %bb6551.i, %bb6471.i, %bb6317.i, %bb6245.i, %bb6239.i, %bb6166.i, %bb6123.i, %bb6119.i, %bb6086.i, %bb6082.i, %bb6049.i, %bb6045.i, %bb6012.i, %bb5920.i, %bb5845.i, %bb5772.i, %bb5692.i, %bb5602.i
+ switch i32 0, label %bb9310.i [
+ i32 3, label %bb9301.i
+ i32 4, label %bb8670.i
+ i32 8, label %bb9112.i
+ i32 11, label %bb9153.i
+ ]
+bb8670.i: ; preds = %bb8668.i, %bb8518.i
+ br label %bb9310.i
+bb9112.i: ; preds = %bb8668.i, %bb8600.i, %bb8518.i
+ br label %bb9310.i
+bb9153.i: ; preds = %bb8668.i, %bb8600.i, %bb8588.i, %bb8557.i, %bb8518.i, %bb8490.i, %bb8465.i
+ br label %bb9310.i
+bb9301.i: ; preds = %bb8668.i, %bb8600.i, %bb8588.i, %bb8557.i, %bb8518.i, %bb8490.i, %bb8465.i, %bb8436.i
+ br label %bb9310.i
+bb9310.i: ; preds = %bb9301.i, %bb9153.i, %bb9112.i, %bb8670.i, %bb8668.i, %bb8600.i, %bb8588.i, %bb8557.i, %bb8518.i, %bb8490.i, %bb8465.i, %bb8436.i
+ br i1 false, label %bb16581.i, label %bb9313.i
+bb9313.i: ; preds = %bb9310.i
+ switch i32 %dt4080.0.i, label %bb16578.i [
+ i32 0, label %bb9315.i
+ i32 1, label %bb9890.i
+ i32 2, label %bb10465.i
+ i32 3, label %bb11040.i
+ i32 4, label %bb11615.i
+ i32 5, label %bb11823.i
+ i32 8, label %bb12398.i
+ i32 9, label %bb12833.i
+ i32 10, label %bb13268.i
+ i32 11, label %bb13268.i
+ i32 12, label %bb13703.i
+ i32 13, label %bb13703.i
+ i32 14, label %bb14278.i
+ i32 15, label %bb14853.i
+ i32 16, label %bb9315.i
+ i32 17, label %bb9315.i
+ i32 18, label %bb15428.i
+ i32 19, label %bb16003.i
+ ]
+bb9315.i: ; preds = %bb9313.i, %bb9313.i, %bb9313.i
+ br i1 false, label %bb9535.i, label %bb9323.i
+bb9323.i: ; preds = %bb9315.i
+ br label %bb9535.i
+bb9535.i: ; preds = %bb9323.i, %bb9315.i
+ br label %bb16581.i
+bb9890.i: ; preds = %bb9313.i
+ br i1 false, label %bb10255.i, label %bb9898.i
+bb9898.i: ; preds = %bb9890.i
+ br label %bb10255.i
+bb10255.i: ; preds = %bb9898.i, %bb9890.i
+ br label %bb16581.i
+bb10465.i: ; preds = %bb9313.i
+ br i1 false, label %bb10685.i, label %bb10473.i
+bb10473.i: ; preds = %bb10465.i
+ br label %bb10685.i
+bb10685.i: ; preds = %bb10473.i, %bb10465.i
+ br label %bb16581.i
+bb11040.i: ; preds = %bb9313.i
+ br i1 false, label %bb11405.i, label %bb11048.i
+bb11048.i: ; preds = %bb11040.i
+ br label %bb11405.i
+bb11405.i: ; preds = %bb11048.i, %bb11040.i
+ br label %bb16581.i
+bb11615.i: ; preds = %bb9313.i
+ br i1 false, label %bb16581.i, label %bb11618.i
+bb11618.i: ; preds = %bb11615.i
+ br label %bb16581.i
+bb11823.i: ; preds = %bb9313.i
+ br i1 false, label %bb12188.i, label %bb11831.i
+bb11831.i: ; preds = %bb11823.i
+ br label %bb12188.i
+bb12188.i: ; preds = %bb11831.i, %bb11823.i
+ br label %bb16581.i
+bb12398.i: ; preds = %bb9313.i
+ br i1 false, label %bb12566.i, label %bb12406.i
+bb12406.i: ; preds = %bb12398.i
+ br label %bb12566.i
+bb12566.i: ; preds = %bb12406.i, %bb12398.i
+ br label %bb16581.i
+bb12833.i: ; preds = %bb9313.i
+ br i1 false, label %bb13001.i, label %bb12841.i
+bb12841.i: ; preds = %bb12833.i
+ br label %bb13001.i
+bb13001.i: ; preds = %bb12841.i, %bb12833.i
+ br label %bb16581.i
+bb13268.i: ; preds = %bb9313.i, %bb9313.i
+ br i1 false, label %bb13436.i, label %bb13276.i
+bb13276.i: ; preds = %bb13268.i
+ br label %bb13436.i
+bb13436.i: ; preds = %bb13276.i, %bb13268.i
+ br label %bb16581.i
+bb13703.i: ; preds = %bb9313.i, %bb9313.i
+ br i1 false, label %bb13923.i, label %bb13711.i
+bb13711.i: ; preds = %bb13703.i
+ br label %bb13923.i
+bb13923.i: ; preds = %bb13711.i, %bb13703.i
+ br label %bb16581.i
+bb14278.i: ; preds = %bb9313.i
+ br i1 false, label %bb14498.i, label %bb14286.i
+bb14286.i: ; preds = %bb14278.i
+ br label %bb14498.i
+bb14498.i: ; preds = %bb14286.i, %bb14278.i
+ br label %bb16581.i
+bb14853.i: ; preds = %bb9313.i
+ br i1 false, label %bb15073.i, label %bb14861.i
+bb14861.i: ; preds = %bb14853.i
+ br label %bb15073.i
+bb15073.i: ; preds = %bb14861.i, %bb14853.i
+ br label %bb16581.i
+bb15428.i: ; preds = %bb9313.i
+ br i1 false, label %bb15648.i, label %bb15436.i
+bb15436.i: ; preds = %bb15428.i
+ br label %bb15648.i
+bb15648.i: ; preds = %bb15436.i, %bb15428.i
+ br label %bb16581.i
+bb16003.i: ; preds = %bb9313.i
+ br i1 false, label %bb16223.i, label %bb16011.i
+bb16011.i: ; preds = %bb16003.i
+ br label %bb16223.i
+bb16223.i: ; preds = %bb16011.i, %bb16003.i
+ br label %bb16581.i
+bb16578.i: ; preds = %bb9313.i
+ unreachable
+bb16581.i: ; preds = %bb16223.i, %bb15648.i, %bb15073.i, %bb14498.i, %bb13923.i, %bb13436.i, %bb13001.i, %bb12566.i, %bb12188.i, %bb11618.i, %bb11615.i, %bb11405.i, %bb10685.i, %bb10255.i, %bb9535.i, %bb9310.i, %glgVectorFloatConversion.exit
+ br label %storeVecColor_RGB_UI.exit
+storeVecColor_RGB_UI.exit: ; preds = %bb16581.i
+ br i1 false, label %bb5295.i, label %bb16621.i
+bb16607.i: ; preds = %bb5276.i
+ br i1 false, label %bb5295.preheader.i, label %bb16621.i
+bb5295.preheader.i: ; preds = %bb16607.i
+ br label %bb5295.i
+bb16621.i: ; preds = %bb16607.i, %storeVecColor_RGB_UI.exit
+ br label %bb16650.outer.i
+bb16650.outer.i: ; preds = %bb16621.i
+ br label %bb16650.i
+bb16650.i: ; preds = %storeColor_RGB_UI.exit, %bb16650.outer.i
+ br label %loadColor_BGRA_UI8888R.exit
+loadColor_BGRA_UI8888R.exit: ; preds = %bb16650.i
+ br i1 false, label %bb16671.i, label %bb16697.i
+bb16671.i: ; preds = %loadColor_BGRA_UI8888R.exit
+ br i1 false, label %bb.i179, label %bb662.i
+bb.i179: ; preds = %bb16671.i
+ switch i32 0, label %bb513.i [
+ i32 7, label %bb418.i
+ i32 6, label %bb433.i
+ ]
+bb418.i: ; preds = %bb.i179
+ br label %bb559.i
+bb433.i: ; preds = %bb.i179
+ switch i32 0, label %bb493.i [
+ i32 31744, label %bb455.i
+ i32 0, label %bb471.i
+ ]
+bb455.i: ; preds = %bb433.i
+ br i1 false, label %bb463.i, label %bb504.i
+bb463.i: ; preds = %bb455.i
+ br label %bb559.i
+bb471.i: ; preds = %bb433.i
+ br i1 false, label %bb497.i, label %bb484.preheader.i
+bb484.preheader.i: ; preds = %bb471.i
+ br i1 false, label %bb479.i, label %bb490.i
+bb479.i: ; preds = %bb479.i, %bb484.preheader.i
+ br i1 false, label %bb479.i, label %bb490.i
+bb490.i: ; preds = %bb479.i, %bb484.preheader.i
+ br label %bb559.i
+bb493.i: ; preds = %bb433.i
+ br label %bb497.i
+bb497.i: ; preds = %bb493.i, %bb471.i
+ br label %bb504.i
+bb504.i: ; preds = %bb497.i, %bb455.i
+ br label %bb513.i
+bb513.i: ; preds = %bb504.i, %bb.i179
+ br label %bb559.i
+bb559.i: ; preds = %bb513.i, %bb490.i, %bb463.i, %bb418.i
+ br i1 false, label %bb2793.i, label %bb614.i
+bb614.i: ; preds = %bb559.i
+ br i1 false, label %bb626.i, label %bb620.i
+bb620.i: ; preds = %bb614.i
+ br i1 false, label %bb625.i, label %bb626.i
+bb625.i: ; preds = %bb620.i
+ br label %bb626.i
+bb626.i: ; preds = %bb625.i, %bb620.i, %bb614.i
+ br i1 false, label %bb638.i, label %bb632.i
+bb632.i: ; preds = %bb626.i
+ br i1 false, label %bb637.i, label %bb638.i
+bb637.i: ; preds = %bb632.i
+ br label %bb638.i
+bb638.i: ; preds = %bb637.i, %bb632.i, %bb626.i
+ br i1 false, label %bb650.i, label %bb644.i
+bb644.i: ; preds = %bb638.i
+ br i1 false, label %bb649.i, label %bb650.i
+bb649.i: ; preds = %bb644.i
+ br label %bb650.i
+bb650.i: ; preds = %bb649.i, %bb644.i, %bb638.i
+ br i1 false, label %bb2793.i, label %bb656.i
+bb656.i: ; preds = %bb650.i
+ br i1 false, label %bb661.i, label %bb2793.i
+bb661.i: ; preds = %bb656.i
+ switch i32 0, label %bb2883.i [
+ i32 3, label %bb2874.i
+ i32 4, label %bb2795.i
+ i32 8, label %bb2810.i
+ i32 10, label %bb2834.i
+ i32 11, label %bb2819.i
+ i32 16, label %bb2810.i
+ ]
+bb662.i: ; preds = %bb16671.i
+ switch i32 0, label %bb1937.i [
+ i32 3, label %bb902.i
+ i32 4, label %bb1416.i
+ i32 8, label %bb1020.i
+ i32 10, label %bb902.i
+ i32 11, label %bb784.i
+ i32 16, label %bb664.i
+ ]
+bb664.i: ; preds = %bb662.i
+ br i1 false, label %bb682.i, label %bb669.i
+bb669.i: ; preds = %bb664.i
+ br label %bb710.i
+bb682.i: ; preds = %bb664.i
+ br label %bb710.i
+bb710.i: ; preds = %bb682.i, %bb669.i
+ br i1 false, label %bb760.i, label %bb754.i
+bb754.i: ; preds = %bb710.i
+ br i1 false, label %bb759.i, label %bb760.i
+bb759.i: ; preds = %bb754.i
+ br label %bb760.i
+bb760.i: ; preds = %bb759.i, %bb754.i, %bb710.i
+ br i1 false, label %bb772.i, label %bb766.i
+bb766.i: ; preds = %bb760.i
+ br i1 false, label %bb771.i, label %bb772.i
+bb771.i: ; preds = %bb766.i
+ br label %bb772.i
+bb772.i: ; preds = %bb771.i, %bb766.i, %bb760.i
+ br i1 false, label %bb1937.i, label %bb778.i
+bb778.i: ; preds = %bb772.i
+ br i1 false, label %bb783.i, label %bb1937.i
+bb783.i: ; preds = %bb778.i
+ br label %bb1937.i
+bb784.i: ; preds = %bb662.i
+ switch i32 0, label %bb892.i [
+ i32 1, label %bb868.i
+ i32 3, label %bb868.i
+ i32 4, label %bb882.i
+ i32 6, label %bb792.i
+ i32 7, label %bb786.i
+ ]
+bb786.i: ; preds = %bb784.i
+ br label %bb904.i
+bb792.i: ; preds = %bb784.i
+ switch i32 0, label %bb852.i [
+ i32 31744, label %bb814.i
+ i32 0, label %bb830.i
+ ]
+bb814.i: ; preds = %bb792.i
+ br i1 false, label %bb822.i, label %bb863.i
+bb822.i: ; preds = %bb814.i
+ switch i32 0, label %bb1010.i [
+ i32 1, label %bb986.i
+ i32 3, label %bb986.i
+ i32 4, label %bb1000.i
+ i32 6, label %bb910.i
+ i32 7, label %bb904.i
+ ]
+bb830.i: ; preds = %bb792.i
+ br i1 false, label %bb856.i, label %bb843.preheader.i
+bb843.preheader.i: ; preds = %bb830.i
+ br i1 false, label %bb838.i, label %bb849.i
+bb838.i: ; preds = %bb838.i, %bb843.preheader.i
+ br i1 false, label %bb838.i, label %bb849.i
+bb849.i: ; preds = %bb838.i, %bb843.preheader.i
+ switch i32 0, label %bb1010.i [
+ i32 1, label %bb986.i
+ i32 3, label %bb986.i
+ i32 4, label %bb1000.i
+ i32 6, label %bb910.i
+ i32 7, label %bb904.i
+ ]
+bb852.i: ; preds = %bb792.i
+ br label %bb856.i
+bb856.i: ; preds = %bb852.i, %bb830.i
+ switch i32 0, label %bb1010.i [
+ i32 1, label %bb986.i
+ i32 3, label %bb986.i
+ i32 4, label %bb1000.i
+ i32 6, label %bb910.i
+ i32 7, label %bb904.i
+ ]
+bb863.i: ; preds = %bb814.i
+ switch i32 0, label %bb1010.i [
+ i32 1, label %bb986.i
+ i32 3, label %bb986.i
+ i32 4, label %bb1000.i
+ i32 6, label %bb910.i
+ i32 7, label %bb904.i
+ ]
+bb868.i: ; preds = %bb784.i, %bb784.i
+ switch i32 0, label %bb1010.i [
+ i32 1, label %bb986.i
+ i32 3, label %bb986.i
+ i32 4, label %bb1000.i
+ i32 6, label %bb910.i
+ i32 7, label %bb904.i
+ ]
+bb882.i: ; preds = %bb784.i
+ br label %bb1000.i
+bb892.i: ; preds = %bb784.i
+ br label %bb902.i
+bb902.i: ; preds = %bb892.i, %bb662.i, %bb662.i
+ switch i32 0, label %bb1010.i [
+ i32 1, label %bb986.i
+ i32 3, label %bb986.i
+ i32 4, label %bb1000.i
+ i32 6, label %bb910.i
+ i32 7, label %bb904.i
+ ]
+bb904.i: ; preds = %bb902.i, %bb868.i, %bb863.i, %bb856.i, %bb849.i, %bb822.i, %bb786.i
+ br label %bb1937.i
+bb910.i: ; preds = %bb902.i, %bb868.i, %bb863.i, %bb856.i, %bb849.i, %bb822.i
+ switch i32 0, label %bb970.i [
+ i32 31744, label %bb932.i
+ i32 0, label %bb948.i
+ ]
+bb932.i: ; preds = %bb910.i
+ br i1 false, label %bb940.i, label %bb981.i
+bb940.i: ; preds = %bb932.i
+ br label %bb1937.i
+bb948.i: ; preds = %bb910.i
+ br i1 false, label %bb974.i, label %bb961.preheader.i
+bb961.preheader.i: ; preds = %bb948.i
+ br i1 false, label %bb956.i, label %bb967.i
+bb956.i: ; preds = %bb956.i, %bb961.preheader.i
+ br i1 false, label %bb956.i, label %bb967.i
+bb967.i: ; preds = %bb956.i, %bb961.preheader.i
+ br label %bb1937.i
+bb970.i: ; preds = %bb910.i
+ br label %bb974.i
+bb974.i: ; preds = %bb970.i, %bb948.i
+ br label %bb1937.i
+bb981.i: ; preds = %bb932.i
+ br label %bb1937.i
+bb986.i: ; preds = %bb902.i, %bb902.i, %bb868.i, %bb868.i, %bb863.i, %bb863.i, %bb856.i, %bb856.i, %bb849.i, %bb849.i, %bb822.i, %bb822.i
+ br label %bb1937.i
+bb1000.i: ; preds = %bb902.i, %bb882.i, %bb868.i, %bb863.i, %bb856.i, %bb849.i, %bb822.i
+ br label %bb1937.i
+bb1010.i: ; preds = %bb902.i, %bb868.i, %bb863.i, %bb856.i, %bb849.i, %bb822.i
+ br label %bb1937.i
+bb1020.i: ; preds = %bb662.i
+ switch i32 0, label %bb1388.i [
+ i32 1, label %bb1264.i
+ i32 3, label %bb1264.i
+ i32 4, label %bb1304.i
+ i32 6, label %bb1038.i
+ i32 7, label %bb1022.i
+ i32 8, label %bb1332.i
+ i32 9, label %bb1332.i
+ i32 10, label %bb1360.i
+ i32 11, label %bb1360.i
+ ]
+bb1022.i: ; preds = %bb1020.i
+ br label %bb1937.i
+bb1038.i: ; preds = %bb1020.i
+ switch i32 0, label %bb1098.i [
+ i32 31744, label %bb1060.i
+ i32 0, label %bb1076.i
+ ]
+bb1060.i: ; preds = %bb1038.i
+ br i1 false, label %bb1068.i, label %bb1109.i
+bb1068.i: ; preds = %bb1060.i
+ br label %bb1109.i
+bb1076.i: ; preds = %bb1038.i
+ br i1 false, label %bb1102.i, label %bb1089.preheader.i
+bb1089.preheader.i: ; preds = %bb1076.i
+ br i1 false, label %bb1084.i, label %bb1095.i
+bb1084.i: ; preds = %bb1084.i, %bb1089.preheader.i
+ br i1 false, label %bb1084.i, label %bb1095.i
+bb1095.i: ; preds = %bb1084.i, %bb1089.preheader.i
+ br label %bb1109.i
+bb1098.i: ; preds = %bb1038.i
+ br label %bb1102.i
+bb1102.i: ; preds = %bb1098.i, %bb1076.i
+ br label %bb1109.i
+bb1109.i: ; preds = %bb1102.i, %bb1095.i, %bb1068.i, %bb1060.i
+ switch i32 0, label %bb1173.i [
+ i32 31744, label %bb1135.i
+ i32 0, label %bb1151.i
+ ]
+bb1135.i: ; preds = %bb1109.i
+ br i1 false, label %bb1143.i, label %bb1184.i
+bb1143.i: ; preds = %bb1135.i
+ br label %bb1184.i
+bb1151.i: ; preds = %bb1109.i
+ br i1 false, label %bb1177.i, label %bb1164.preheader.i
+bb1164.preheader.i: ; preds = %bb1151.i
+ br i1 false, label %bb1159.i, label %bb1170.i
+bb1159.i: ; preds = %bb1159.i, %bb1164.preheader.i
+ br i1 false, label %bb1159.i, label %bb1170.i
+bb1170.i: ; preds = %bb1159.i, %bb1164.preheader.i
+ br label %bb1184.i
+bb1173.i: ; preds = %bb1109.i
+ br label %bb1177.i
+bb1177.i: ; preds = %bb1173.i, %bb1151.i
+ br label %bb1184.i
+bb1184.i: ; preds = %bb1177.i, %bb1170.i, %bb1143.i, %bb1135.i
+ switch i32 0, label %bb1248.i [
+ i32 31744, label %bb1210.i
+ i32 0, label %bb1226.i
+ ]
+bb1210.i: ; preds = %bb1184.i
+ br i1 false, label %bb1218.i, label %bb1259.i
+bb1218.i: ; preds = %bb1210.i
+ br label %bb1937.i
+bb1226.i: ; preds = %bb1184.i
+ br i1 false, label %bb1252.i, label %bb1239.preheader.i
+bb1239.preheader.i: ; preds = %bb1226.i
+ br i1 false, label %bb1234.i, label %bb1245.i
+bb1234.i: ; preds = %bb1234.i, %bb1239.preheader.i
+ br i1 false, label %bb1234.i, label %bb1245.i
+bb1245.i: ; preds = %bb1234.i, %bb1239.preheader.i
+ br label %bb1937.i
+bb1248.i: ; preds = %bb1184.i
+ br label %bb1252.i
+bb1252.i: ; preds = %bb1248.i, %bb1226.i
+ br label %bb1937.i
+bb1259.i: ; preds = %bb1210.i
+ br label %bb1937.i
+bb1264.i: ; preds = %bb1020.i, %bb1020.i
+ br label %bb1937.i
+bb1304.i: ; preds = %bb1020.i
+ br label %bb1937.i
+bb1332.i: ; preds = %bb1020.i, %bb1020.i
+ br label %bb1937.i
+bb1360.i: ; preds = %bb1020.i, %bb1020.i
+ br label %bb1937.i
+bb1388.i: ; preds = %bb1020.i
+ br label %bb1937.i
+bb1416.i: ; preds = %bb662.i
+ switch i32 0, label %bb1900.i [
+ i32 1, label %bb1740.i
+ i32 3, label %bb1740.i
+ i32 4, label %bb1793.i
+ i32 6, label %bb1439.i
+ i32 7, label %bb1418.i
+ i32 14, label %bb1830.i
+ i32 15, label %bb1830.i
+ i32 18, label %bb1863.i
+ i32 19, label %bb1863.i
+ ]
+bb1418.i: ; preds = %bb1416.i
+ br label %bb1937.i
+bb1439.i: ; preds = %bb1416.i
+ switch i32 0, label %bb1499.i [
+ i32 31744, label %bb1461.i
+ i32 0, label %bb1477.i
+ ]
+bb1461.i: ; preds = %bb1439.i
+ br i1 false, label %bb1469.i, label %bb1510.i
+bb1469.i: ; preds = %bb1461.i
+ br label %bb1510.i
+bb1477.i: ; preds = %bb1439.i
+ br i1 false, label %bb1503.i, label %bb1490.preheader.i
+bb1490.preheader.i: ; preds = %bb1477.i
+ br i1 false, label %bb1485.i, label %bb1496.i
+bb1485.i: ; preds = %bb1485.i, %bb1490.preheader.i
+ br i1 false, label %bb1485.i, label %bb1496.i
+bb1496.i: ; preds = %bb1485.i, %bb1490.preheader.i
+ br label %bb1510.i
+bb1499.i: ; preds = %bb1439.i
+ br label %bb1503.i
+bb1503.i: ; preds = %bb1499.i, %bb1477.i
+ br label %bb1510.i
+bb1510.i: ; preds = %bb1503.i, %bb1496.i, %bb1469.i, %bb1461.i
+ switch i32 0, label %bb1574.i [
+ i32 31744, label %bb1536.i
+ i32 0, label %bb1552.i
+ ]
+bb1536.i: ; preds = %bb1510.i
+ br i1 false, label %bb1544.i, label %bb1585.i
+bb1544.i: ; preds = %bb1536.i
+ br label %bb1585.i
+bb1552.i: ; preds = %bb1510.i
+ br i1 false, label %bb1578.i, label %bb1565.preheader.i
+bb1565.preheader.i: ; preds = %bb1552.i
+ br i1 false, label %bb1560.i, label %bb1571.i
+bb1560.i: ; preds = %bb1560.i, %bb1565.preheader.i
+ br i1 false, label %bb1560.i, label %bb1571.i
+bb1571.i: ; preds = %bb1560.i, %bb1565.preheader.i
+ br label %bb1585.i
+bb1574.i: ; preds = %bb1510.i
+ br label %bb1578.i
+bb1578.i: ; preds = %bb1574.i, %bb1552.i
+ br label %bb1585.i
+bb1585.i: ; preds = %bb1578.i, %bb1571.i, %bb1544.i, %bb1536.i
+ switch i32 0, label %bb1649.i [
+ i32 31744, label %bb1611.i
+ i32 0, label %bb1627.i
+ ]
+bb1611.i: ; preds = %bb1585.i
+ br i1 false, label %bb1619.i, label %bb1660.i
+bb1619.i: ; preds = %bb1611.i
+ br label %bb1660.i
+bb1627.i: ; preds = %bb1585.i
+ br i1 false, label %bb1653.i, label %bb1640.preheader.i
+bb1640.preheader.i: ; preds = %bb1627.i
+ br i1 false, label %bb1635.i, label %bb1646.i
+bb1635.i: ; preds = %bb1635.i, %bb1640.preheader.i
+ br i1 false, label %bb1635.i, label %bb1646.i
+bb1646.i: ; preds = %bb1635.i, %bb1640.preheader.i
+ br label %bb1660.i
+bb1649.i: ; preds = %bb1585.i
+ br label %bb1653.i
+bb1653.i: ; preds = %bb1649.i, %bb1627.i
+ br label %bb1660.i
+bb1660.i: ; preds = %bb1653.i, %bb1646.i, %bb1619.i, %bb1611.i
+ switch i32 0, label %bb1724.i [
+ i32 31744, label %bb1686.i
+ i32 0, label %bb1702.i
+ ]
+bb1686.i: ; preds = %bb1660.i
+ br i1 false, label %bb1694.i, label %bb1735.i
+bb1694.i: ; preds = %bb1686.i
+ br label %bb1937.i
+bb1702.i: ; preds = %bb1660.i
+ br i1 false, label %bb1728.i, label %bb1715.preheader.i
+bb1715.preheader.i: ; preds = %bb1702.i
+ br i1 false, label %bb1710.i, label %bb1721.i
+bb1710.i: ; preds = %bb1710.i, %bb1715.preheader.i
+ br i1 false, label %bb1710.i, label %bb1721.i
+bb1721.i: ; preds = %bb1710.i, %bb1715.preheader.i
+ br label %bb1937.i
+bb1724.i: ; preds = %bb1660.i
+ br label %bb1728.i
+bb1728.i: ; preds = %bb1724.i, %bb1702.i
+ br label %bb1937.i
+bb1735.i: ; preds = %bb1686.i
+ br label %bb1937.i
+bb1740.i: ; preds = %bb1416.i, %bb1416.i
+ br label %bb1937.i
+bb1793.i: ; preds = %bb1416.i
+ br label %bb1937.i
+bb1830.i: ; preds = %bb1416.i, %bb1416.i
+ br label %bb1937.i
+bb1863.i: ; preds = %bb1416.i, %bb1416.i
+ br label %bb1937.i
+bb1900.i: ; preds = %bb1416.i
+ br label %bb1937.i
+bb1937.i: ; preds = %bb1900.i, %bb1863.i, %bb1830.i, %bb1793.i, %bb1740.i, %bb1735.i, %bb1728.i, %bb1721.i, %bb1694.i, %bb1418.i, %bb1388.i, %bb1360.i, %bb1332.i, %bb1304.i, %bb1264.i, %bb1259.i, %bb1252.i, %bb1245.i, %bb1218.i, %bb1022.i, %bb1010.i, %bb1000.i, %bb986.i, %bb981.i, %bb974.i, %bb967.i, %bb940.i, %bb904.i, %bb783.i, %bb778.i, %bb772.i, %bb662.i
+ switch i32 %sf4083.0.i, label %bb2321.i [
+ i32 0, label %bb2027.i
+ i32 1, label %bb2081.i
+ i32 2, label %bb2161.i
+ i32 3, label %bb2241.i
+ i32 8, label %bb1939.i
+ i32 9, label %bb1939.i
+ i32 10, label %bb1957.i
+ i32 11, label %bb1975.i
+ i32 16, label %bb1939.i
+ ]
+bb1939.i: ; preds = %bb1937.i, %bb1937.i, %bb1937.i
+ switch i32 0, label %bb2321.i [
+ i32 3, label %bb1956.i
+ i32 4, label %bb1956.i
+ i32 11, label %bb1956.i
+ ]
+bb1956.i: ; preds = %bb1939.i, %bb1939.i, %bb1939.i
+ br label %bb2337.i
+bb1957.i: ; preds = %bb1937.i
+ switch i32 0, label %bb1975.i [
+ i32 3, label %bb1974.i
+ i32 4, label %bb1974.i
+ i32 11, label %bb1974.i
+ ]
+bb1974.i: ; preds = %bb1957.i, %bb1957.i, %bb1957.i
+ br label %bb1975.i
+bb1975.i: ; preds = %bb1974.i, %bb1957.i, %bb1937.i
+ switch i32 0, label %bb2001.i [
+ i32 1, label %bb1992.i
+ i32 4, label %bb1992.i
+ i32 8, label %bb1992.i
+ ]
+bb1992.i: ; preds = %bb1975.i, %bb1975.i, %bb1975.i
+ br label %bb2001.i
+bb2001.i: ; preds = %bb1992.i, %bb1975.i
+ switch i32 0, label %bb2321.i [
+ i32 2, label %bb2018.i
+ i32 4, label %bb2018.i
+ i32 8, label %bb2018.i
+ ]
+bb2018.i: ; preds = %bb2001.i, %bb2001.i, %bb2001.i
+ br label %bb2321.i
+bb2027.i: ; preds = %bb1937.i
+ switch i32 0, label %bb2045.i [
+ i32 1, label %bb2044.i
+ i32 4, label %bb2044.i
+ i32 8, label %bb2044.i
+ ]
+bb2044.i: ; preds = %bb2027.i, %bb2027.i, %bb2027.i
+ br label %bb2045.i
+bb2045.i: ; preds = %bb2044.i, %bb2027.i
+ switch i32 0, label %bb2063.i [
+ i32 2, label %bb2062.i
+ i32 4, label %bb2062.i
+ i32 8, label %bb2062.i
+ ]
+bb2062.i: ; preds = %bb2045.i, %bb2045.i, %bb2045.i
+ br label %bb2063.i
+bb2063.i: ; preds = %bb2062.i, %bb2045.i
+ switch i32 0, label %bb2321.i [
+ i32 3, label %bb2080.i
+ i32 4, label %bb2080.i
+ i32 11, label %bb2080.i
+ ]
+bb2080.i: ; preds = %bb2063.i, %bb2063.i, %bb2063.i
+ br label %bb2321.i
+bb2081.i: ; preds = %bb1937.i
+ switch i32 0, label %bb2100.i [
+ i32 1, label %bb2098.i
+ i32 4, label %bb2098.i
+ i32 8, label %bb2098.i
+ ]
+bb2098.i: ; preds = %bb2081.i, %bb2081.i, %bb2081.i
+ br label %bb2100.i
+bb2100.i: ; preds = %bb2098.i, %bb2081.i
+ switch i32 0, label %bb2125.i [
+ i32 4, label %bb2124.i
+ i32 8, label %bb2124.i
+ i32 0, label %bb2124.i
+ i32 11, label %bb2124.i
+ ]
+bb2124.i: ; preds = %bb2100.i, %bb2100.i, %bb2100.i, %bb2100.i
+ br label %bb2125.i
+bb2125.i: ; preds = %bb2124.i, %bb2100.i
+ switch i32 0, label %bb2143.i [
+ i32 2, label %bb2142.i
+ i32 4, label %bb2142.i
+ i32 8, label %bb2142.i
+ ]
+bb2142.i: ; preds = %bb2125.i, %bb2125.i, %bb2125.i
+ br label %bb2143.i
+bb2143.i: ; preds = %bb2142.i, %bb2125.i
+ switch i32 0, label %bb2321.i [
+ i32 3, label %bb2160.i
+ i32 4, label %bb2160.i
+ i32 11, label %bb2160.i
+ ]
+bb2160.i: ; preds = %bb2143.i, %bb2143.i, %bb2143.i
+ br label %bb2321.i
+bb2161.i: ; preds = %bb1937.i
+ switch i32 0, label %bb2180.i [
+ i32 2, label %bb2178.i
+ i32 4, label %bb2178.i
+ i32 8, label %bb2178.i
+ ]
+bb2178.i: ; preds = %bb2161.i, %bb2161.i, %bb2161.i
+ br label %bb2180.i
+bb2180.i: ; preds = %bb2178.i, %bb2161.i
+ switch i32 0, label %bb2205.i [
+ i32 4, label %bb2204.i
+ i32 8, label %bb2204.i
+ i32 0, label %bb2204.i
+ i32 11, label %bb2204.i
+ ]
+bb2204.i: ; preds = %bb2180.i, %bb2180.i, %bb2180.i, %bb2180.i
+ br label %bb2205.i
+bb2205.i: ; preds = %bb2204.i, %bb2180.i
+ switch i32 0, label %bb2223.i [
+ i32 1, label %bb2222.i
+ i32 4, label %bb2222.i
+ i32 8, label %bb2222.i
+ ]
+bb2222.i: ; preds = %bb2205.i, %bb2205.i, %bb2205.i
+ br label %bb2223.i
+bb2223.i: ; preds = %bb2222.i, %bb2205.i
+ switch i32 0, label %bb2321.i [
+ i32 3, label %bb2240.i
+ i32 4, label %bb2240.i
+ i32 11, label %bb2240.i
+ ]
+bb2240.i: ; preds = %bb2223.i, %bb2223.i, %bb2223.i
+ br label %bb2321.i
+bb2241.i: ; preds = %bb1937.i
+ switch i32 0, label %bb2260.i [
+ i32 3, label %bb2258.i
+ i32 4, label %bb2258.i
+ i32 11, label %bb2258.i
+ ]
+bb2258.i: ; preds = %bb2241.i, %bb2241.i, %bb2241.i
+ br label %bb2260.i
+bb2260.i: ; preds = %bb2258.i, %bb2241.i
+ switch i32 0, label %bb2285.i [
+ i32 4, label %bb2284.i
+ i32 11, label %bb2284.i
+ i32 0, label %bb2284.i
+ i32 8, label %bb2284.i
+ ]
+bb2284.i: ; preds = %bb2260.i, %bb2260.i, %bb2260.i, %bb2260.i
+ br label %bb2285.i
+bb2285.i: ; preds = %bb2284.i, %bb2260.i
+ switch i32 0, label %bb2303.i [
+ i32 1, label %bb2302.i
+ i32 4, label %bb2302.i
+ i32 8, label %bb2302.i
+ ]
+bb2302.i: ; preds = %bb2285.i, %bb2285.i, %bb2285.i
+ br label %bb2303.i
+bb2303.i: ; preds = %bb2302.i, %bb2285.i
+ switch i32 0, label %bb2321.i [
+ i32 2, label %bb2320.i
+ i32 4, label %bb2320.i
+ i32 8, label %bb2320.i
+ ]
+bb2320.i: ; preds = %bb2303.i, %bb2303.i, %bb2303.i
+ br label %bb2321.i
+bb2321.i: ; preds = %bb2320.i, %bb2303.i, %bb2240.i, %bb2223.i, %bb2160.i, %bb2143.i, %bb2080.i, %bb2063.i, %bb2018.i, %bb2001.i, %bb1939.i, %bb1937.i
+ br label %bb2337.i
+bb2337.i: ; preds = %bb2321.i, %bb1956.i
+ br label %bb2353.i
+bb2353.i: ; preds = %bb2337.i
+ br label %bb2369.i
+bb2369.i: ; preds = %bb2353.i
+ br label %bb2385.i
+bb2385.i: ; preds = %bb2369.i
+ br i1 false, label %bb2388.i, label %bb2394.i
+bb2388.i: ; preds = %bb2385.i
+ br label %bb2600.i
+bb2394.i: ; preds = %bb2385.i
+ switch i32 0, label %bb2600.i [
+ i32 0, label %bb2504.i
+ i32 1, label %bb2528.i
+ i32 2, label %bb2552.i
+ i32 3, label %bb2576.i
+ i32 4, label %bb2396.i
+ i32 8, label %bb2420.i
+ i32 11, label %bb2480.i
+ ]
+bb2396.i: ; preds = %bb2394.i
+ br i1 false, label %bb2411.i, label %bb2399.i
+bb2399.i: ; preds = %bb2396.i
+ br i1 false, label %bb2420.i, label %bb2405.i
+bb2405.i: ; preds = %bb2399.i
+ br i1 false, label %bb2410.i, label %bb2420.i
+bb2410.i: ; preds = %bb2405.i
+ br i1 false, label %bb2459.i, label %bb2423.i
+bb2411.i: ; preds = %bb2396.i
+ br i1 false, label %bb2420.i, label %bb2414.i
+bb2414.i: ; preds = %bb2411.i
+ br i1 false, label %bb2419.i, label %bb2420.i
+bb2419.i: ; preds = %bb2414.i
+ br label %bb2420.i
+bb2420.i: ; preds = %bb2419.i, %bb2414.i, %bb2411.i, %bb2405.i, %bb2399.i, %bb2394.i
+ br i1 false, label %bb2459.i, label %bb2423.i
+bb2423.i: ; preds = %bb2420.i, %bb2410.i
+ br i1 false, label %bb2435.i, label %bb2429.i
+bb2429.i: ; preds = %bb2423.i
+ br i1 false, label %bb2434.i, label %bb2435.i
+bb2434.i: ; preds = %bb2429.i
+ br label %bb2435.i
+bb2435.i: ; preds = %bb2434.i, %bb2429.i, %bb2423.i
+ br i1 false, label %bb2447.i, label %bb2441.i
+bb2441.i: ; preds = %bb2435.i
+ br i1 false, label %bb2446.i, label %bb2447.i
+bb2446.i: ; preds = %bb2441.i
+ br label %bb2447.i
+bb2447.i: ; preds = %bb2446.i, %bb2441.i, %bb2435.i
+ br i1 false, label %bb2600.i, label %bb2453.i
+bb2453.i: ; preds = %bb2447.i
+ br i1 false, label %bb2458.i, label %bb2600.i
+bb2458.i: ; preds = %bb2453.i
+ br label %bb2793.i
+bb2459.i: ; preds = %bb2420.i, %bb2410.i
+ br i1 false, label %bb2600.i, label %bb2462.i
+bb2462.i: ; preds = %bb2459.i
+ br i1 false, label %bb2479.i, label %bb2600.i
+bb2479.i: ; preds = %bb2462.i
+ br label %bb2600.i
+bb2480.i: ; preds = %bb2394.i
+ br i1 false, label %bb2495.i, label %bb2483.i
+bb2483.i: ; preds = %bb2480.i
+ br i1 false, label %bb2504.i, label %bb2489.i
+bb2489.i: ; preds = %bb2483.i
+ br i1 false, label %bb2494.i, label %bb2504.i
+bb2494.i: ; preds = %bb2489.i
+ br i1 false, label %bb2519.i, label %bb2507.i
+bb2495.i: ; preds = %bb2480.i
+ br i1 false, label %bb2504.i, label %bb2498.i
+bb2498.i: ; preds = %bb2495.i
+ br i1 false, label %bb2503.i, label %bb2504.i
+bb2503.i: ; preds = %bb2498.i
+ br label %bb2504.i
+bb2504.i: ; preds = %bb2503.i, %bb2498.i, %bb2495.i, %bb2489.i, %bb2483.i, %bb2394.i
+ br i1 false, label %bb2519.i, label %bb2507.i
+bb2507.i: ; preds = %bb2504.i, %bb2494.i
+ br i1 false, label %bb2600.i, label %bb2513.i
+bb2513.i: ; preds = %bb2507.i
+ br i1 false, label %bb2518.i, label %bb2600.i
+bb2518.i: ; preds = %bb2513.i
+ br label %bb2600.i
+bb2519.i: ; preds = %bb2504.i, %bb2494.i
+ br i1 false, label %bb2600.i, label %bb2522.i
+bb2522.i: ; preds = %bb2519.i
+ br i1 false, label %bb2527.i, label %bb2600.i
+bb2527.i: ; preds = %bb2522.i
+ br label %bb2600.i
+bb2528.i: ; preds = %bb2394.i
+ br i1 false, label %bb2543.i, label %bb2531.i
+bb2531.i: ; preds = %bb2528.i
+ br i1 false, label %bb2600.i, label %bb2537.i
+bb2537.i: ; preds = %bb2531.i
+ br i1 false, label %bb2542.i, label %bb2600.i
+bb2542.i: ; preds = %bb2537.i
+ br label %bb2600.i
+bb2543.i: ; preds = %bb2528.i
+ br i1 false, label %bb2600.i, label %bb2546.i
+bb2546.i: ; preds = %bb2543.i
+ br i1 false, label %bb2551.i, label %bb2600.i
+bb2551.i: ; preds = %bb2546.i
+ br label %bb2600.i
+bb2552.i: ; preds = %bb2394.i
+ br i1 false, label %bb2567.i, label %bb2555.i
+bb2555.i: ; preds = %bb2552.i
+ br i1 false, label %bb2600.i, label %bb2561.i
+bb2561.i: ; preds = %bb2555.i
+ br i1 false, label %bb2566.i, label %bb2600.i
+bb2566.i: ; preds = %bb2561.i
+ br label %bb2600.i
+bb2567.i: ; preds = %bb2552.i
+ br i1 false, label %bb2600.i, label %bb2570.i
+bb2570.i: ; preds = %bb2567.i
+ br i1 false, label %bb2575.i, label %bb2600.i
+bb2575.i: ; preds = %bb2570.i
+ br label %bb2600.i
+bb2576.i: ; preds = %bb2394.i
+ br i1 false, label %bb2591.i, label %bb2579.i
+bb2579.i: ; preds = %bb2576.i
+ br i1 false, label %bb2600.i, label %bb2585.i
+bb2585.i: ; preds = %bb2579.i
+ br i1 false, label %bb2590.i, label %bb2600.i
+bb2590.i: ; preds = %bb2585.i
+ br label %bb2600.i
+bb2591.i: ; preds = %bb2576.i
+ br i1 false, label %bb2600.i, label %bb2594.i
+bb2594.i: ; preds = %bb2591.i
+ br i1 false, label %bb2599.i, label %bb2600.i
+bb2599.i: ; preds = %bb2594.i
+ br label %bb2600.i
+bb2600.i: ; preds = %bb2599.i, %bb2594.i, %bb2591.i, %bb2590.i, %bb2585.i, %bb2579.i, %bb2575.i, %bb2570.i, %bb2567.i, %bb2566.i, %bb2561.i, %bb2555.i, %bb2551.i, %bb2546.i, %bb2543.i, %bb2542.i, %bb2537.i, %bb2531.i, %bb2527.i, %bb2522.i, %bb2519.i, %bb2518.i, %bb2513.i, %bb2507.i, %bb2479.i, %bb2462.i, %bb2459.i, %bb2453.i, %bb2447.i, %bb2394.i, %bb2388.i
+ br label %bb2793.i
+bb2793.i: ; preds = %bb2600.i, %bb2458.i, %bb656.i, %bb650.i, %bb559.i
+ switch i32 0, label %bb2883.i [
+ i32 3, label %bb2874.i
+ i32 4, label %bb2795.i
+ i32 8, label %bb2810.i
+ i32 10, label %bb2834.i
+ i32 11, label %bb2819.i
+ i32 16, label %bb2810.i
+ ]
+bb2795.i: ; preds = %bb2793.i, %bb661.i
+ br label %bb2810.i
+bb2810.i: ; preds = %bb2795.i, %bb2793.i, %bb2793.i, %bb661.i, %bb661.i
+ br label %bb2883.i
+bb2819.i: ; preds = %bb2793.i, %bb661.i
+ br label %bb2834.i
+bb2834.i: ; preds = %bb2819.i, %bb2793.i, %bb661.i
+ switch i32 0, label %bb2860.i [
+ i32 4, label %bb2846.i
+ i32 8, label %bb2846.i
+ ]
+bb2846.i: ; preds = %bb2834.i, %bb2834.i
+ br i1 false, label %bb2859.i, label %bb2860.i
+bb2859.i: ; preds = %bb2846.i
+ br label %bb2860.i
+bb2860.i: ; preds = %bb2859.i, %bb2846.i, %bb2834.i
+ switch i32 %df4081.0.i, label %bb2867.bb2883_crit_edge.i [
+ i32 1, label %bb2883.i
+ i32 2, label %bb2872.i
+ ]
+bb2867.bb2883_crit_edge.i: ; preds = %bb2860.i
+ br label %bb2883.i
+bb2872.i: ; preds = %bb2860.i
+ switch i32 0, label %UnifiedReturnBlock.i235 [
+ i32 3, label %bb3253.i
+ i32 4, label %bb4173.i
+ i32 8, label %bb3485.i
+ i32 10, label %bb3253.i
+ i32 11, label %bb3021.i
+ i32 16, label %bb2885.i
+ ]
+bb2874.i: ; preds = %bb2793.i, %bb661.i
+ br label %bb2883.i
+bb2883.i: ; preds = %bb2874.i, %bb2867.bb2883_crit_edge.i, %bb2860.i, %bb2810.i, %bb2793.i, %bb661.i
+ %f_alpha.1.i = phi i32 [ 0, %bb2867.bb2883_crit_edge.i ], [ 0, %bb2874.i ], [ 1065353216, %bb661.i ], [ 0, %bb2793.i ], [ 0, %bb2810.i ], [ 0, %bb2860.i ] ; <i32> [#uses=1]
+ switch i32 0, label %UnifiedReturnBlock.i235 [
+ i32 3, label %bb3253.i
+ i32 4, label %bb4173.i
+ i32 8, label %bb3485.i
+ i32 10, label %bb3253.i
+ i32 11, label %bb3021.i
+ i32 16, label %bb2885.i
+ ]
+bb2885.i: ; preds = %bb2883.i, %bb2872.i
+ br i1 false, label %bb3011.i, label %bb2890.i
+bb2890.i: ; preds = %bb2885.i
+ br i1 false, label %bb2960.i, label %bb2954.i
+bb2954.i: ; preds = %bb2890.i
+ br i1 false, label %bb2959.i, label %bb2960.i
+bb2959.i: ; preds = %bb2954.i
+ br label %bb2960.i
+bb2960.i: ; preds = %bb2959.i, %bb2954.i, %bb2890.i
+ br i1 false, label %bb2972.i, label %bb2966.i
+bb2966.i: ; preds = %bb2960.i
+ br i1 false, label %bb2971.i, label %bb2972.i
+bb2971.i: ; preds = %bb2966.i
+ br label %bb2972.i
+bb2972.i: ; preds = %bb2971.i, %bb2966.i, %bb2960.i
+ br label %glgScalarFloatConversion.exit
+bb3011.i: ; preds = %bb2885.i
+ br label %glgScalarFloatConversion.exit
+bb3021.i: ; preds = %bb2883.i, %bb2872.i
+ switch i32 %dt4080.0.i, label %bb3192.i [
+ i32 7, label %bb3026.i
+ i32 6, label %bb3037.i
+ i32 1, label %bb3125.i
+ i32 3, label %bb3125.i
+ i32 5, label %bb3144.i
+ ]
+bb3026.i: ; preds = %bb3021.i
+ br label %bb3258.i
+bb3037.i: ; preds = %bb3021.i
+ br i1 false, label %bb3052.i, label %bb3074.i
+bb3052.i: ; preds = %bb3037.i
+ br i1 false, label %bb3105.i, label %bb3069.i
+bb3069.i: ; preds = %bb3052.i
+ switch i32 %dt4080.0.i, label %bb3424.i [
+ i32 7, label %bb3258.i
+ i32 6, label %bb3269.i
+ i32 1, label %bb3357.i
+ i32 3, label %bb3357.i
+ i32 5, label %bb3376.i
+ ]
+bb3074.i: ; preds = %bb3037.i
+ br i1 false, label %bb3079.i, label %bb3092.i
+bb3079.i: ; preds = %bb3074.i
+ switch i32 %dt4080.0.i, label %bb3424.i [
+ i32 7, label %bb3258.i
+ i32 6, label %bb3269.i
+ i32 1, label %bb3357.i
+ i32 3, label %bb3357.i
+ i32 5, label %bb3376.i
+ ]
+bb3092.i: ; preds = %bb3074.i
+ switch i32 %dt4080.0.i, label %bb3424.i [
+ i32 7, label %bb3258.i
+ i32 6, label %bb3269.i
+ i32 1, label %bb3357.i
+ i32 3, label %bb3357.i
+ i32 5, label %bb3376.i
+ ]
+bb3105.i: ; preds = %bb3052.i
+ switch i32 %dt4080.0.i, label %bb3424.i [
+ i32 7, label %bb3258.i
+ i32 6, label %bb3269.i
+ i32 1, label %bb3357.i
+ i32 3, label %bb3357.i
+ i32 5, label %bb3376.i
+ ]
+bb3125.i: ; preds = %bb3021.i, %bb3021.i
+ switch i32 %dt4080.0.i, label %bb3424.i [
+ i32 7, label %bb3258.i
+ i32 6, label %bb3269.i
+ i32 1, label %bb3357.i
+ i32 3, label %bb3357.i
+ i32 5, label %bb3376.i
+ ]
+bb3144.i: ; preds = %bb3021.i
+ br label %bb3376.i
+bb3192.i: ; preds = %bb3021.i
+ br i1 false, label %bb3197.i, label %bb3243.i
+bb3197.i: ; preds = %bb3192.i
+ br label %bb3424.i
+bb3243.i: ; preds = %bb3192.i
+ br label %bb3253.i
+bb3253.i: ; preds = %bb3243.i, %bb2883.i, %bb2883.i, %bb2872.i, %bb2872.i
+ switch i32 %dt4080.0.i, label %bb3424.i [
+ i32 7, label %bb3258.i
+ i32 6, label %bb3269.i
+ i32 1, label %bb3357.i
+ i32 3, label %bb3357.i
+ i32 5, label %bb3376.i
+ ]
+bb3258.i: ; preds = %bb3253.i, %bb3125.i, %bb3105.i, %bb3092.i, %bb3079.i, %bb3069.i, %bb3026.i
+ br label %glgScalarFloatConversion.exit
+bb3269.i: ; preds = %bb3253.i, %bb3125.i, %bb3105.i, %bb3092.i, %bb3079.i, %bb3069.i
+ br i1 false, label %bb3284.i, label %bb3306.i
+bb3284.i: ; preds = %bb3269.i
+ br i1 false, label %bb3337.i, label %bb3301.i
+bb3301.i: ; preds = %bb3284.i
+ br label %glgScalarFloatConversion.exit
+bb3306.i: ; preds = %bb3269.i
+ br i1 false, label %bb3311.i, label %bb3324.i
+bb3311.i: ; preds = %bb3306.i
+ br label %glgScalarFloatConversion.exit
+bb3324.i: ; preds = %bb3306.i
+ br label %glgScalarFloatConversion.exit
+bb3337.i: ; preds = %bb3284.i
+ br label %glgScalarFloatConversion.exit
+bb3357.i: ; preds = %bb3253.i, %bb3253.i, %bb3125.i, %bb3125.i, %bb3105.i, %bb3105.i, %bb3092.i, %bb3092.i, %bb3079.i, %bb3079.i, %bb3069.i, %bb3069.i
+ br label %glgScalarFloatConversion.exit
+bb3376.i: ; preds = %bb3253.i, %bb3144.i, %bb3125.i, %bb3105.i, %bb3092.i, %bb3079.i, %bb3069.i
+ br label %glgScalarFloatConversion.exit
+bb3424.i: ; preds = %bb3253.i, %bb3197.i, %bb3125.i, %bb3105.i, %bb3092.i, %bb3079.i, %bb3069.i
+ br i1 false, label %bb3429.i, label %bb3475.i
+bb3429.i: ; preds = %bb3424.i
+ br label %glgScalarFloatConversion.exit
+bb3475.i: ; preds = %bb3424.i
+ br label %glgScalarFloatConversion.exit
+bb3485.i: ; preds = %bb2883.i, %bb2872.i
+ switch i32 %dt4080.0.i, label %bb4077.i [
+ i32 7, label %bb3490.i
+ i32 6, label %bb3511.i
+ i32 1, label %bb3749.i
+ i32 3, label %bb3749.i
+ i32 5, label %bb3794.i
+ i32 4, label %bb3941.i
+ ]
+bb3490.i: ; preds = %bb3485.i
+ br label %glgScalarFloatConversion.exit
+bb3511.i: ; preds = %bb3485.i
+ br i1 false, label %bb3526.i, label %bb3548.i
+bb3526.i: ; preds = %bb3511.i
+ br i1 false, label %bb3579.i, label %bb3543.i
+bb3543.i: ; preds = %bb3526.i
+ br label %bb3579.i
+bb3548.i: ; preds = %bb3511.i
+ br i1 false, label %bb3553.i, label %bb3566.i
+bb3553.i: ; preds = %bb3548.i
+ br label %bb3579.i
+bb3566.i: ; preds = %bb3548.i
+ br label %bb3579.i
+bb3579.i: ; preds = %bb3566.i, %bb3553.i, %bb3543.i, %bb3526.i
+ br i1 false, label %bb3601.i, label %bb3623.i
+bb3601.i: ; preds = %bb3579.i
+ br i1 false, label %bb3654.i, label %bb3618.i
+bb3618.i: ; preds = %bb3601.i
+ br label %bb3654.i
+bb3623.i: ; preds = %bb3579.i
+ br i1 false, label %bb3628.i, label %bb3641.i
+bb3628.i: ; preds = %bb3623.i
+ br label %bb3654.i
+bb3641.i: ; preds = %bb3623.i
+ br label %bb3654.i
+bb3654.i: ; preds = %bb3641.i, %bb3628.i, %bb3618.i, %bb3601.i
+ br i1 false, label %bb3676.i, label %bb3698.i
+bb3676.i: ; preds = %bb3654.i
+ br i1 false, label %bb3729.i, label %bb3693.i
+bb3693.i: ; preds = %bb3676.i
+ br label %glgScalarFloatConversion.exit
+bb3698.i: ; preds = %bb3654.i
+ br i1 false, label %bb3703.i, label %bb3716.i
+bb3703.i: ; preds = %bb3698.i
+ br label %glgScalarFloatConversion.exit
+bb3716.i: ; preds = %bb3698.i
+ br label %glgScalarFloatConversion.exit
+bb3729.i: ; preds = %bb3676.i
+ br label %glgScalarFloatConversion.exit
+bb3749.i: ; preds = %bb3485.i, %bb3485.i
+ br label %glgScalarFloatConversion.exit
+bb3794.i: ; preds = %bb3485.i
+ br label %glgScalarFloatConversion.exit
+bb3941.i: ; preds = %bb3485.i
+ br label %glgScalarFloatConversion.exit
+bb4077.i: ; preds = %bb3485.i
+ br i1 false, label %bb4083.i, label %bb4111.i
+bb4083.i: ; preds = %bb4077.i
+ br label %glgScalarFloatConversion.exit
+bb4111.i: ; preds = %bb4077.i
+ br i1 false, label %bb4117.i, label %bb4145.i
+bb4117.i: ; preds = %bb4111.i
+ br label %glgScalarFloatConversion.exit
+bb4145.i: ; preds = %bb4111.i
+ br label %glgScalarFloatConversion.exit
+bb4173.i: ; preds = %bb2883.i, %bb2872.i
+ %f_red.0.reg2mem.4.i = phi i32 [ 0, %bb2872.i ], [ 0, %bb2883.i ] ; <i32> [#uses=2]
+ %f_green.0.reg2mem.2.i = phi i32 [ 0, %bb2872.i ], [ 0, %bb2883.i ] ; <i32> [#uses=1]
+ %f_blue.0.reg2mem.2.i = phi i32 [ 0, %bb2872.i ], [ 0, %bb2883.i ] ; <i32> [#uses=1]
+ %f_alpha.1.reg2mem.1.i = phi i32 [ 0, %bb2872.i ], [ %f_alpha.1.i, %bb2883.i ] ; <i32> [#uses=1]
+ switch i32 %dt4080.0.i, label %bb4950.i [
+ i32 7, label %bb4178.i
+ i32 6, label %bb4204.i
+ i32 1, label %bb4517.i202
+ i32 3, label %bb4517.i202
+ i32 5, label %bb4575.i
+ i32 4, label %bb4769.i
+ ]
+bb4178.i: ; preds = %bb4173.i
+ br label %glgScalarFloatConversion.exit
+bb4204.i: ; preds = %bb4173.i
+ %tmp4210.i = and i32 0, 32768 ; <i32> [#uses=4]
+ %tmp4212.i = and i32 %f_red.0.reg2mem.4.i, 2139095040 ; <i32> [#uses=1]
+ %tmp4214.i = and i32 %f_red.0.reg2mem.4.i, 8388607 ; <i32> [#uses=1]
+ br i1 false, label %bb4219.i, label %bb4241.i
+bb4219.i: ; preds = %bb4204.i
+ br i1 false, label %bb4272.i, label %bb4236.i
+bb4236.i: ; preds = %bb4219.i
+ br label %bb4272.i
+bb4241.i: ; preds = %bb4204.i
+ br i1 false, label %bb4246.i, label %bb4259.i
+bb4246.i: ; preds = %bb4241.i
+ %tmp4253.i = lshr i32 %tmp4214.i, 0 ; <i32> [#uses=1]
+ %tmp4253.masked.i = and i32 %tmp4253.i, 65535 ; <i32> [#uses=1]
+ br label %bb4272.i
+bb4259.i: ; preds = %bb4241.i
+ %tmp4261.i187 = add i32 %tmp4212.i, 134217728 ; <i32> [#uses=1]
+ %tmp4262.i188 = lshr i32 %tmp4261.i187, 13 ; <i32> [#uses=1]
+ %tmp4262.masked.i = and i32 %tmp4262.i188, 64512 ; <i32> [#uses=1]
+ %tmp42665693.masked.i = or i32 %tmp4262.masked.i, %tmp4210.i ; <i32> [#uses=1]
+ br label %bb4272.i
+bb4272.i: ; preds = %bb4259.i, %bb4246.i, %bb4236.i, %bb4219.i
+ %tmp42665693.masked.pn.i = phi i32 [ %tmp42665693.masked.i, %bb4259.i ], [ %tmp4253.masked.i, %bb4246.i ], [ %tmp4210.i, %bb4236.i ], [ %tmp4210.i, %bb4219.i ] ; <i32> [#uses=1]
+ %tmp4268.pn.i = phi i32 [ 0, %bb4259.i ], [ %tmp4210.i, %bb4246.i ], [ 31744, %bb4236.i ], [ 32767, %bb4219.i ] ; <i32> [#uses=1]
+ %tmp100.0.i = or i32 %tmp4268.pn.i, %tmp42665693.masked.pn.i ; <i32> [#uses=0]
+ %tmp4289.i = and i32 %f_green.0.reg2mem.2.i, 8388607 ; <i32> [#uses=1]
+ br i1 false, label %bb4294.i, label %bb4316.i
+bb4294.i: ; preds = %bb4272.i
+ br i1 false, label %bb4347.i, label %bb4311.i
+bb4311.i: ; preds = %bb4294.i
+ br label %bb4347.i
+bb4316.i: ; preds = %bb4272.i
+ br i1 false, label %bb4321.i, label %bb4334.i
+bb4321.i: ; preds = %bb4316.i
+ br label %bb4347.i
+bb4334.i: ; preds = %bb4316.i
+ %tmp4343.i = lshr i32 %tmp4289.i, 13 ; <i32> [#uses=0]
+ br label %bb4347.i
+bb4347.i: ; preds = %bb4334.i, %bb4321.i, %bb4311.i, %bb4294.i
+ %tmp4364.i190 = and i32 %f_blue.0.reg2mem.2.i, 8388607 ; <i32> [#uses=1]
+ br i1 false, label %bb4369.i192, label %bb4391.i
+bb4369.i192: ; preds = %bb4347.i
+ br i1 false, label %bb4422.i, label %bb4386.i
+bb4386.i: ; preds = %bb4369.i192
+ br label %bb4422.i
+bb4391.i: ; preds = %bb4347.i
+ br i1 false, label %bb4396.i, label %bb4409.i
+bb4396.i: ; preds = %bb4391.i
+ br label %bb4422.i
+bb4409.i: ; preds = %bb4391.i
+ %tmp4418.i = lshr i32 %tmp4364.i190, 13 ; <i32> [#uses=0]
+ br label %bb4422.i
+bb4422.i: ; preds = %bb4409.i, %bb4396.i, %bb4386.i, %bb4369.i192
+ %tmp4439.i194 = and i32 %f_alpha.1.reg2mem.1.i, 8388607 ; <i32> [#uses=1]
+ br i1 false, label %bb4444.i, label %bb4466.i
+bb4444.i: ; preds = %bb4422.i
+ br i1 false, label %bb4497.i, label %bb4461.i
+bb4461.i: ; preds = %bb4444.i
+ br label %glgScalarFloatConversion.exit
+bb4466.i: ; preds = %bb4422.i
+ br i1 false, label %bb4471.i, label %bb4484.i
+bb4471.i: ; preds = %bb4466.i
+ br label %glgScalarFloatConversion.exit
+bb4484.i: ; preds = %bb4466.i
+ %tmp4493.i = lshr i32 %tmp4439.i194, 13 ; <i32> [#uses=0]
+ br label %glgScalarFloatConversion.exit
+bb4497.i: ; preds = %bb4444.i
+ br label %glgScalarFloatConversion.exit
+bb4517.i202: ; preds = %bb4173.i, %bb4173.i
+ br label %glgScalarFloatConversion.exit
+bb4575.i: ; preds = %bb4173.i
+ br label %glgScalarFloatConversion.exit
+bb4769.i: ; preds = %bb4173.i
+ br label %glgScalarFloatConversion.exit
+bb4950.i: ; preds = %bb4173.i
+ br i1 false, label %bb4956.i, label %bb4993.i
+bb4956.i: ; preds = %bb4950.i
+ br label %glgScalarFloatConversion.exit
+bb4993.i: ; preds = %bb4950.i
+ br i1 false, label %bb4999.i, label %bb5036.i
+bb4999.i: ; preds = %bb4993.i
+ br label %glgScalarFloatConversion.exit
+bb5036.i: ; preds = %bb4993.i
+ br label %glgScalarFloatConversion.exit
+UnifiedReturnBlock.i235: ; preds = %bb2883.i, %bb2872.i
+ br label %glgScalarFloatConversion.exit
+glgScalarFloatConversion.exit: ; preds = %UnifiedReturnBlock.i235, %bb5036.i, %bb4999.i, %bb4956.i, %bb4769.i, %bb4575.i, %bb4517.i202, %bb4497.i, %bb4484.i, %bb4471.i, %bb4461.i, %bb4178.i, %bb4145.i, %bb4117.i, %bb4083.i, %bb3941.i, %bb3794.i, %bb3749.i, %bb3729.i, %bb3716.i, %bb3703.i, %bb3693.i, %bb3490.i, %bb3475.i, %bb3429.i, %bb3376.i, %bb3357.i, %bb3337.i, %bb3324.i, %bb3311.i, %bb3301.i, %bb3258.i, %bb3011.i, %bb2972.i
+ br label %bb18851.i
+bb16697.i: ; preds = %loadColor_BGRA_UI8888R.exit
+ br i1 false, label %bb17749.i, label %bb16700.i
+bb16700.i: ; preds = %bb16697.i
+ switch i32 0, label %bb16829.i [
+ i32 4, label %bb16705.i
+ i32 8, label %bb16743.i
+ i32 11, label %bb16795.i
+ ]
+bb16705.i: ; preds = %bb16700.i
+ switch i32 %df4081.0.i, label %bb17183.i [
+ i32 1, label %bb16710.i
+ i32 2, label %bb16721.i
+ i32 3, label %bb16732.i
+ ]
+bb16710.i: ; preds = %bb16705.i
+ br label %bb17195.i
+bb16721.i: ; preds = %bb16705.i
+ br label %bb17195.i
+bb16732.i: ; preds = %bb16705.i
+ br label %bb17195.i
+bb16743.i: ; preds = %bb16700.i
+ switch i32 0, label %bb16759.i [
+ i32 4, label %bb16755.i
+ i32 11, label %bb16755.i
+ ]
+bb16755.i: ; preds = %bb16743.i, %bb16743.i
+ br label %bb17195.i
+bb16759.i: ; preds = %bb16743.i
+ switch i32 %df4081.0.i, label %bb17183.i [
+ i32 1, label %bb16764.i
+ i32 2, label %bb16775.i
+ i32 3, label %bb16786.i
+ ]
+bb16764.i: ; preds = %bb16759.i
+ br label %bb17195.i
+bb16775.i: ; preds = %bb16759.i
+ br label %bb17195.i
+bb16786.i: ; preds = %bb16759.i
+ br label %bb17195.i
+bb16795.i: ; preds = %bb16700.i
+ switch i32 0, label %bb17183.i [
+ i32 4, label %bb16807.i
+ i32 8, label %bb16807.i
+ i32 3, label %bb16823.i
+ ]
+bb16807.i: ; preds = %bb16795.i, %bb16795.i
+ br label %bb17195.i
+bb16823.i: ; preds = %bb16795.i
+ br label %bb17195.i
+bb16829.i: ; preds = %bb16700.i
+ switch i32 %sf4083.0.i, label %bb17183.i [
+ i32 10, label %bb16834.i
+ i32 0, label %bb16892.i
+ i32 1, label %bb16953.i
+ i32 2, label %bb17037.i
+ i32 3, label %bb17121.i
+ ]
+bb16834.i: ; preds = %bb16829.i
+ switch i32 0, label %bb16878.i [
+ i32 4, label %bb16839.i
+ i32 8, label %bb16858.i
+ i32 11, label %bb16874.i
+ ]
+bb16839.i: ; preds = %bb16834.i
+ br label %bb17195.i
+bb16858.i: ; preds = %bb16834.i
+ br label %bb17195.i
+bb16874.i: ; preds = %bb16834.i
+ br label %bb17195.i
+bb16878.i: ; preds = %bb16834.i
+ br i1 false, label %bb16883.i, label %bb17183.i
+bb16883.i: ; preds = %bb16878.i
+ br label %bb17195.i
+bb16892.i: ; preds = %bb16829.i
+ switch i32 0, label %bb16930.i [
+ i32 4, label %bb16897.i
+ i32 8, label %bb16913.i
+ i32 11, label %bb16926.i
+ ]
+bb16897.i: ; preds = %bb16892.i
+ br label %bb17195.i
+bb16913.i: ; preds = %bb16892.i
+ br label %bb17195.i
+bb16926.i: ; preds = %bb16892.i
+ br label %bb17195.i
+bb16930.i: ; preds = %bb16892.i
+ br i1 false, label %bb16936.i, label %bb16939.i
+bb16936.i: ; preds = %bb16930.i
+ br label %bb17195.i
+bb16939.i: ; preds = %bb16930.i
+ br i1 false, label %bb16944.i, label %bb17183.i
+bb16944.i: ; preds = %bb16939.i
+ br label %bb17195.i
+bb16953.i: ; preds = %bb16829.i
+ switch i32 0, label %bb17003.i [
+ i32 4, label %bb16958.i
+ i32 8, label %bb16979.i
+ i32 11, label %bb16997.i
+ ]
+bb16958.i: ; preds = %bb16953.i
+ br label %bb17195.i
+bb16979.i: ; preds = %bb16953.i
+ br label %bb17195.i
+bb16997.i: ; preds = %bb16953.i
+ br label %bb17195.i
+bb17003.i: ; preds = %bb16953.i
+ switch i32 %df4081.0.i, label %bb17183.i [
+ i32 0, label %bb17020.i
+ i32 2, label %bb17020.i
+ i32 10, label %bb17020.i
+ i32 3, label %bb17028.i
+ ]
+bb17020.i: ; preds = %bb17003.i, %bb17003.i, %bb17003.i
+ br label %bb17195.i
+bb17028.i: ; preds = %bb17003.i
+ br label %bb17195.i
+bb17037.i: ; preds = %bb16829.i
+ switch i32 0, label %bb17087.i [
+ i32 4, label %bb17042.i
+ i32 8, label %bb17063.i
+ i32 11, label %bb17081.i
+ ]
+bb17042.i: ; preds = %bb17037.i
+ br label %bb17195.i
+bb17063.i: ; preds = %bb17037.i
+ br label %bb17195.i
+bb17081.i: ; preds = %bb17037.i
+ br label %bb17195.i
+bb17087.i: ; preds = %bb17037.i
+ switch i32 %df4081.0.i, label %bb17183.i [
+ i32 0, label %bb17104.i
+ i32 1, label %bb17104.i
+ i32 10, label %bb17104.i
+ i32 3, label %bb17112.i
+ ]
+bb17104.i: ; preds = %bb17087.i, %bb17087.i, %bb17087.i
+ br label %bb17195.i
+bb17112.i: ; preds = %bb17087.i
+ br label %bb17195.i
+bb17121.i: ; preds = %bb16829.i
+ switch i32 0, label %bb17183.i [
+ i32 4, label %bb17126.i
+ i32 8, label %bb17149.i
+ i32 11, label %bb17167.i
+ i32 10, label %bb17180.i
+ ]
+bb17126.i: ; preds = %bb17121.i
+ br label %bb17195.i
+bb17149.i: ; preds = %bb17121.i
+ br label %bb17195.i
+bb17167.i: ; preds = %bb17121.i
+ br label %bb17195.i
+bb17180.i: ; preds = %bb17121.i
+ br label %bb17183.i
+bb17183.i: ; preds = %bb17180.i, %bb17121.i, %bb17087.i, %bb17003.i, %bb16939.i, %bb16878.i, %bb16829.i, %bb16795.i, %bb16759.i, %bb16705.i
+ br label %bb17195.i
+bb17195.i: ; preds = %bb17183.i, %bb17167.i, %bb17149.i, %bb17126.i, %bb17112.i, %bb17104.i, %bb17081.i, %bb17063.i, %bb17042.i, %bb17028.i, %bb17020.i, %bb16997.i, %bb16979.i, %bb16958.i, %bb16944.i, %bb16936.i, %bb16926.i, %bb16913.i, %bb16897.i, %bb16883.i, %bb16874.i, %bb16858.i, %bb16839.i, %bb16823.i, %bb16807.i, %bb16786.i, %bb16775.i, %bb16764.i, %bb16755.i, %bb16732.i, %bb16721.i, %bb16710.i
+ br i1 false, label %bb18845.i, label %bb17225.i
+bb17225.i: ; preds = %bb17195.i
+ switch i32 %dt4080.0.i, label %bb17677.i [
+ i32 4, label %bb17227.i
+ i32 8, label %bb17259.i
+ i32 9, label %bb17309.i
+ i32 10, label %bb17359.i
+ i32 11, label %bb17359.i
+ i32 14, label %bb17409.i
+ i32 15, label %bb17474.i
+ i32 18, label %bb17539.i
+ i32 19, label %bb17604.i
+ i32 0, label %bb17680.i
+ i32 1, label %bb17672.i
+ i32 2, label %bb17673.i
+ i32 3, label %bb17674.i
+ i32 5, label %bb17675.i
+ i32 12, label %bb17676.i
+ i32 13, label %bb17676.i
+ i32 16, label %bb17680.i
+ i32 17, label %bb17680.i
+ ]
+bb17227.i: ; preds = %bb17225.i
+ br i1 false, label %bb18845.i, label %bb17230.i
+bb17230.i: ; preds = %bb17227.i
+ br label %bb18851.i
+bb17259.i: ; preds = %bb17225.i
+ br i1 false, label %bb17284.i, label %bb17262.i
+bb17262.i: ; preds = %bb17259.i
+ br label %bb17284.i
+bb17284.i: ; preds = %bb17262.i, %bb17259.i
+ br label %bb18851.i
+bb17309.i: ; preds = %bb17225.i
+ br i1 false, label %bb17334.i, label %bb17312.i
+bb17312.i: ; preds = %bb17309.i
+ br label %bb17334.i
+bb17334.i: ; preds = %bb17312.i, %bb17309.i
+ br label %bb18851.i
+bb17359.i: ; preds = %bb17225.i, %bb17225.i
+ br i1 false, label %bb17384.i, label %bb17362.i
+bb17362.i: ; preds = %bb17359.i
+ br label %bb17384.i
+bb17384.i: ; preds = %bb17362.i, %bb17359.i
+ br label %bb18851.i
+bb17409.i: ; preds = %bb17225.i
+ br i1 false, label %bb17441.i, label %bb17412.i
+bb17412.i: ; preds = %bb17409.i
+ br label %bb17441.i
+bb17441.i: ; preds = %bb17412.i, %bb17409.i
+ br label %bb18851.i
+bb17474.i: ; preds = %bb17225.i
+ br i1 false, label %bb17506.i, label %bb17477.i
+bb17477.i: ; preds = %bb17474.i
+ br label %bb17506.i
+bb17506.i: ; preds = %bb17477.i, %bb17474.i
+ br label %bb18851.i
+bb17539.i: ; preds = %bb17225.i
+ br i1 false, label %bb17571.i, label %bb17542.i
+bb17542.i: ; preds = %bb17539.i
+ br label %bb17571.i
+bb17571.i: ; preds = %bb17542.i, %bb17539.i
+ br label %bb18851.i
+bb17604.i: ; preds = %bb17225.i
+ br i1 false, label %bb17636.i, label %bb17607.i
+bb17607.i: ; preds = %bb17604.i
+ br label %bb17636.i
+bb17636.i: ; preds = %bb17607.i, %bb17604.i
+ br label %bb18851.i
+bb17672.i: ; preds = %bb17225.i
+ br i1 false, label %bb17716.i, label %bb17683.i
+bb17673.i: ; preds = %bb17225.i
+ br i1 false, label %bb17716.i, label %bb17683.i
+bb17674.i: ; preds = %bb17225.i
+ br i1 false, label %bb17716.i, label %bb17683.i
+bb17675.i: ; preds = %bb17225.i
+ br i1 false, label %bb17716.i, label %bb17683.i
+bb17676.i: ; preds = %bb17225.i, %bb17225.i
+ br i1 false, label %bb17716.i, label %bb17683.i
+bb17677.i: ; preds = %bb17225.i
+ unreachable
+bb17680.i: ; preds = %bb17225.i, %bb17225.i, %bb17225.i
+ br i1 false, label %bb17716.i, label %bb17683.i
+bb17683.i: ; preds = %bb17680.i, %bb17676.i, %bb17675.i, %bb17674.i, %bb17673.i, %bb17672.i
+ br label %bb17716.i
+bb17716.i: ; preds = %bb17683.i, %bb17680.i, %bb17676.i, %bb17675.i, %bb17674.i, %bb17673.i, %bb17672.i
+ br label %bb18851.i
+bb17749.i: ; preds = %bb16697.i
+ br i1 false, label %bb17757.i, label %bb17903.i
+bb17757.i: ; preds = %bb17749.i
+ switch i32 0, label %bb17903.i [
+ i32 0, label %bb17759.i
+ i32 1, label %bb17853.i
+ i32 2, label %bb17853.i
+ ]
+bb17759.i: ; preds = %bb17757.i
+ br i1 false, label %bb17764.i, label %bb17772.i
+bb17764.i: ; preds = %bb17759.i
+ br label %bb18032.i
+bb17772.i: ; preds = %bb17759.i
+ switch i32 %sf4083.0.i, label %bb17798.i [
+ i32 1, label %bb17777.i
+ i32 2, label %bb17790.i
+ ]
+bb17777.i: ; preds = %bb17772.i
+ switch i32 0, label %bb18032.i [
+ i32 4, label %bb17818.i
+ i32 8, label %bb17818.i
+ i32 11, label %bb17845.i
+ ]
+bb17790.i: ; preds = %bb17772.i
+ switch i32 0, label %bb18032.i [
+ i32 4, label %bb17818.i
+ i32 8, label %bb17818.i
+ i32 11, label %bb17845.i
+ ]
+bb17798.i: ; preds = %bb17772.i
+ switch i32 0, label %bb18032.i [
+ i32 4, label %bb17818.i
+ i32 8, label %bb17818.i
+ i32 11, label %bb17845.i
+ ]
+bb17818.i: ; preds = %bb17798.i, %bb17798.i, %bb17790.i, %bb17790.i, %bb17777.i, %bb17777.i
+ switch i32 0, label %bb18032.i [
+ i32 4, label %bb17845.i
+ i32 11, label %bb17845.i
+ i32 8, label %bb17946.i
+ ]
+bb17845.i: ; preds = %bb17818.i, %bb17818.i, %bb17798.i, %bb17790.i, %bb17777.i
+ switch i32 0, label %bb18032.i [
+ i32 4, label %bb17908.i
+ i32 8, label %bb17946.i
+ i32 11, label %bb17998.i
+ ]
+bb17853.i: ; preds = %bb17757.i, %bb17757.i
+ br i1 false, label %bb17890.i, label %bb17903.i
+bb17890.i: ; preds = %bb17853.i
+ br label %bb17903.i
+bb17903.i: ; preds = %bb17890.i, %bb17853.i, %bb17757.i, %bb17749.i
+ switch i32 0, label %bb18032.i [
+ i32 4, label %bb17908.i
+ i32 8, label %bb17946.i
+ i32 11, label %bb17998.i
+ ]
+bb17908.i: ; preds = %bb17903.i, %bb17845.i
+ switch i32 %df4081.0.i, label %bb18386.i [
+ i32 1, label %bb17913.i
+ i32 2, label %bb17924.i
+ i32 3, label %bb17935.i
+ ]
+bb17913.i: ; preds = %bb17908.i
+ br label %bb18398.i
+bb17924.i: ; preds = %bb17908.i
+ br label %bb18398.i
+bb17935.i: ; preds = %bb17908.i
+ br label %bb18398.i
+bb17946.i: ; preds = %bb17903.i, %bb17845.i, %bb17818.i
+ switch i32 0, label %bb17962.i [
+ i32 4, label %bb17958.i
+ i32 11, label %bb17958.i
+ ]
+bb17958.i: ; preds = %bb17946.i, %bb17946.i
+ br label %bb18398.i
+bb17962.i: ; preds = %bb17946.i
+ switch i32 %df4081.0.i, label %bb18386.i [
+ i32 1, label %bb17967.i
+ i32 2, label %bb17978.i
+ i32 3, label %bb17989.i
+ ]
+bb17967.i: ; preds = %bb17962.i
+ br label %bb18398.i
+bb17978.i: ; preds = %bb17962.i
+ br label %bb18398.i
+bb17989.i: ; preds = %bb17962.i
+ br label %bb18398.i
+bb17998.i: ; preds = %bb17903.i, %bb17845.i
+ switch i32 0, label %bb18386.i [
+ i32 4, label %bb18010.i
+ i32 8, label %bb18010.i
+ i32 3, label %bb18026.i
+ ]
+bb18010.i: ; preds = %bb17998.i, %bb17998.i
+ br label %bb18398.i
+bb18026.i: ; preds = %bb17998.i
+ br label %bb18398.i
+bb18032.i: ; preds = %bb17903.i, %bb17845.i, %bb17818.i, %bb17798.i, %bb17790.i, %bb17777.i, %bb17764.i
+ switch i32 %sf4083.0.i, label %bb18386.i [
+ i32 10, label %bb18037.i
+ i32 0, label %bb18095.i
+ i32 1, label %bb18156.i
+ i32 2, label %bb18240.i
+ i32 3, label %bb18324.i
+ ]
+bb18037.i: ; preds = %bb18032.i
+ switch i32 0, label %bb18081.i [
+ i32 4, label %bb18042.i
+ i32 8, label %bb18061.i
+ i32 11, label %bb18077.i
+ ]
+bb18042.i: ; preds = %bb18037.i
+ br label %bb18398.i
+bb18061.i: ; preds = %bb18037.i
+ br label %bb18398.i
+bb18077.i: ; preds = %bb18037.i
+ br label %bb18398.i
+bb18081.i: ; preds = %bb18037.i
+ br i1 false, label %bb18086.i, label %bb18386.i
+bb18086.i: ; preds = %bb18081.i
+ br label %bb18398.i
+bb18095.i: ; preds = %bb18032.i
+ switch i32 0, label %bb18133.i [
+ i32 4, label %bb18100.i
+ i32 8, label %bb18116.i
+ i32 11, label %bb18129.i
+ ]
+bb18100.i: ; preds = %bb18095.i
+ br label %bb18398.i
+bb18116.i: ; preds = %bb18095.i
+ br label %bb18398.i
+bb18129.i: ; preds = %bb18095.i
+ br label %bb18398.i
+bb18133.i: ; preds = %bb18095.i
+ br i1 false, label %bb18139.i, label %bb18142.i
+bb18139.i: ; preds = %bb18133.i
+ br label %bb18398.i
+bb18142.i: ; preds = %bb18133.i
+ br i1 false, label %bb18147.i, label %bb18386.i
+bb18147.i: ; preds = %bb18142.i
+ br label %bb18398.i
+bb18156.i: ; preds = %bb18032.i
+ switch i32 0, label %bb18206.i [
+ i32 4, label %bb18161.i
+ i32 8, label %bb18182.i
+ i32 11, label %bb18200.i
+ ]
+bb18161.i: ; preds = %bb18156.i
+ br label %bb18398.i
+bb18182.i: ; preds = %bb18156.i
+ br label %bb18398.i
+bb18200.i: ; preds = %bb18156.i
+ br label %bb18398.i
+bb18206.i: ; preds = %bb18156.i
+ switch i32 %df4081.0.i, label %bb18386.i [
+ i32 0, label %bb18223.i
+ i32 2, label %bb18223.i
+ i32 10, label %bb18223.i
+ i32 3, label %bb18231.i
+ ]
+bb18223.i: ; preds = %bb18206.i, %bb18206.i, %bb18206.i
+ br label %bb18398.i
+bb18231.i: ; preds = %bb18206.i
+ br label %bb18398.i
+bb18240.i: ; preds = %bb18032.i
+ switch i32 0, label %bb18290.i [
+ i32 4, label %bb18245.i
+ i32 8, label %bb18266.i
+ i32 11, label %bb18284.i
+ ]
+bb18245.i: ; preds = %bb18240.i
+ br label %bb18398.i
+bb18266.i: ; preds = %bb18240.i
+ br label %bb18398.i
+bb18284.i: ; preds = %bb18240.i
+ br label %bb18398.i
+bb18290.i: ; preds = %bb18240.i
+ switch i32 %df4081.0.i, label %bb18386.i [
+ i32 0, label %bb18307.i
+ i32 1, label %bb18307.i
+ i32 10, label %bb18307.i
+ i32 3, label %bb18315.i
+ ]
+bb18307.i: ; preds = %bb18290.i, %bb18290.i, %bb18290.i
+ br label %bb18398.i
+bb18315.i: ; preds = %bb18290.i
+ br label %bb18398.i
+bb18324.i: ; preds = %bb18032.i
+ switch i32 0, label %bb18386.i [
+ i32 4, label %bb18329.i
+ i32 8, label %bb18352.i
+ i32 11, label %bb18370.i
+ i32 10, label %bb18383.i
+ ]
+bb18329.i: ; preds = %bb18324.i
+ br label %bb18398.i
+bb18352.i: ; preds = %bb18324.i
+ br label %bb18398.i
+bb18370.i: ; preds = %bb18324.i
+ br label %bb18398.i
+bb18383.i: ; preds = %bb18324.i
+ br label %bb18386.i
+bb18386.i: ; preds = %bb18383.i, %bb18324.i, %bb18290.i, %bb18206.i, %bb18142.i, %bb18081.i, %bb18032.i, %bb17998.i, %bb17962.i, %bb17908.i
+ br label %bb18398.i
+bb18398.i: ; preds = %bb18386.i, %bb18370.i, %bb18352.i, %bb18329.i, %bb18315.i, %bb18307.i, %bb18284.i, %bb18266.i, %bb18245.i, %bb18231.i, %bb18223.i, %bb18200.i, %bb18182.i, %bb18161.i, %bb18147.i, %bb18139.i, %bb18129.i, %bb18116.i, %bb18100.i, %bb18086.i, %bb18077.i, %bb18061.i, %bb18042.i, %bb18026.i, %bb18010.i, %bb17989.i, %bb17978.i, %bb17967.i, %bb17958.i, %bb17935.i, %bb17924.i, %bb17913.i
+ br i1 false, label %bb18589.i, label %bb18431.i
+bb18431.i: ; preds = %bb18398.i
+ switch i32 0, label %bb18589.i [
+ i32 0, label %bb18433.i
+ i32 1, label %bb18487.i
+ i32 2, label %bb18487.i
+ ]
+bb18433.i: ; preds = %bb18431.i
+ switch i32 0, label %bb18589.i [
+ i32 4, label %bb18452.i
+ i32 8, label %bb18452.i
+ i32 11, label %bb18479.i
+ ]
+bb18452.i: ; preds = %bb18433.i, %bb18433.i
+ switch i32 0, label %bb18589.i [
+ i32 4, label %bb18479.i
+ i32 11, label %bb18479.i
+ ]
+bb18479.i: ; preds = %bb18452.i, %bb18452.i, %bb18433.i
+ br i1 false, label %bb18845.i, label %bb18592.i
+bb18487.i: ; preds = %bb18431.i, %bb18431.i
+ br i1 false, label %bb18492.i, label %bb18521.i
+bb18492.i: ; preds = %bb18487.i
+ br i1 false, label %bb18508.i, label %bb18529.i
+bb18508.i: ; preds = %bb18492.i
+ switch i32 0, label %bb18589.i [
+ i32 4, label %bb18541.i
+ i32 8, label %bb18541.i
+ ]
+bb18521.i: ; preds = %bb18487.i
+ br label %bb18529.i
+bb18529.i: ; preds = %bb18521.i, %bb18492.i
+ switch i32 0, label %bb18589.i [
+ i32 4, label %bb18541.i
+ i32 8, label %bb18541.i
+ ]
+bb18541.i: ; preds = %bb18529.i, %bb18529.i, %bb18508.i, %bb18508.i
+ br i1 false, label %bb18560.i, label %bb18589.i
+bb18560.i: ; preds = %bb18541.i
+ br i1 false, label %bb18576.i, label %bb18589.i
+bb18576.i: ; preds = %bb18560.i
+ br label %bb18589.i
+bb18589.i: ; preds = %bb18576.i, %bb18560.i, %bb18541.i, %bb18529.i, %bb18508.i, %bb18452.i, %bb18433.i, %bb18431.i, %bb18398.i
+ br i1 false, label %bb18845.i, label %bb18592.i
+bb18592.i: ; preds = %bb18589.i, %bb18479.i
+ switch i32 %dt4080.0.i, label %bb18809.i [
+ i32 4, label %bb18845.i
+ i32 8, label %bb18594.i
+ i32 9, label %bb18619.i
+ i32 10, label %bb18644.i
+ i32 11, label %bb18644.i
+ i32 14, label %bb18669.i
+ i32 15, label %bb18702.i
+ i32 18, label %bb18735.i
+ i32 19, label %bb18768.i
+ i32 0, label %bb18812.i
+ i32 1, label %bb18804.i
+ i32 2, label %bb18805.i
+ i32 3, label %bb18806.i
+ i32 5, label %bb18807.i
+ i32 12, label %bb18808.i
+ i32 13, label %bb18808.i
+ i32 16, label %bb18812.i
+ i32 17, label %bb18812.i
+ ]
+bb18594.i: ; preds = %bb18592.i
+ br label %bb18851.i
+bb18619.i: ; preds = %bb18592.i
+ br label %bb18851.i
+bb18644.i: ; preds = %bb18592.i, %bb18592.i
+ br label %bb18851.i
+bb18669.i: ; preds = %bb18592.i
+ br label %bb18851.i
+bb18702.i: ; preds = %bb18592.i
+ br label %bb18851.i
+bb18735.i: ; preds = %bb18592.i
+ br label %bb18851.i
+bb18768.i: ; preds = %bb18592.i
+ br label %bb18851.i
+bb18804.i: ; preds = %bb18592.i
+ br label %bb18812.i
+bb18805.i: ; preds = %bb18592.i
+ br label %bb18812.i
+bb18806.i: ; preds = %bb18592.i
+ br label %bb18812.i
+bb18807.i: ; preds = %bb18592.i
+ br label %bb18812.i
+bb18808.i: ; preds = %bb18592.i, %bb18592.i
+ br label %bb18812.i
+bb18809.i: ; preds = %bb18592.i
+ unreachable
+bb18812.i: ; preds = %bb18808.i, %bb18807.i, %bb18806.i, %bb18805.i, %bb18804.i, %bb18592.i, %bb18592.i, %bb18592.i
+ br label %bb18845.i
+bb18845.i: ; preds = %bb18812.i, %bb18592.i, %bb18589.i, %bb18479.i, %bb17227.i, %bb17195.i
+ br label %bb18851.i
+bb18851.i: ; preds = %bb18845.i, %bb18768.i, %bb18735.i, %bb18702.i, %bb18669.i, %bb18644.i, %bb18619.i, %bb18594.i, %bb17716.i, %bb17636.i, %bb17571.i, %bb17506.i, %bb17441.i, %bb17384.i, %bb17334.i, %bb17284.i, %bb17230.i, %glgScalarFloatConversion.exit
+ br label %storeColor_RGB_UI.exit
+storeColor_RGB_UI.exit: ; preds = %bb18851.i
+ br i1 false, label %bb19786.i, label %bb16650.i
+bb19786.i: ; preds = %storeColor_RGB_UI.exit
+ br label %bb19808.i
+bb19808.i: ; preds = %bb19786.i
+ br i1 false, label %bb19818.i, label %bb5276.i
+bb19818.i: ; preds = %bb19808.i
+ br i1 false, label %bb19840.i, label %bb19821.i
+bb19821.i: ; preds = %bb19818.i
+ br label %bb19840.i
+bb19840.i: ; preds = %bb19821.i, %bb19818.i
+ br i1 false, label %UnifiedReturnBlock.i, label %bb19843.i
+bb19843.i: ; preds = %bb19840.i
+ br label %t.exit
+UnifiedReturnBlock.i: ; preds = %bb19840.i, %bb4501.i
+ br label %t.exit
+t.exit: ; preds = %UnifiedReturnBlock.i, %bb19843.i, %bb4517.i, %bb4354.i
+ ret void
+}
diff --git a/test/CodeGen/ARM/2008-05-19-LiveIntervalsBug.ll b/test/CodeGen/ARM/2008-05-19-LiveIntervalsBug.ll
new file mode 100644
index 0000000..71aa603
--- /dev/null
+++ b/test/CodeGen/ARM/2008-05-19-LiveIntervalsBug.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+ %struct.BiContextType = type { i16, i8, i32 }
+ %struct.Bitstream = type { i32, i32, i8, i32, i32, i8, i8, i32, i32, i8*, i32 }
+ %struct.DataPartition = type { %struct.Bitstream*, %struct.EncodingEnvironment, %struct.EncodingEnvironment }
+ %struct.DecRefPicMarking_t = type { i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t* }
+ %struct.EncodingEnvironment = type { i32, i32, i32, i32, i32, i8*, i32*, i32, i32 }
+ %struct.ImageParameters = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8**, i8**, i32, i32***, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x [16 x [16 x i16]]], [5 x [16 x [16 x i16]]], [9 x [8 x [8 x i16]]], [2 x [4 x [16 x [16 x i16]]]], [16 x [16 x i16]], [16 x [16 x i32]], i32****, i32***, i32***, i32***, i32****, i32****, %struct.Picture*, %struct.Slice*, %struct.Macroblock*, i32*, i32*, i32, i32, i32, i32, [4 x [4 x i32]], i32, i32, i32, i32, i32, double, i32, i32, i32, i32, i16******, i16******, i16******, i16******, [15 x i16], i32, i32, i32, i32, i32, i32, i32, i32, [6 x [32 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [1 x i32], i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double**, double***, i32***, double**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x [2 x i32]], [2 x i32], i32, i32, i16, i32, i32, i32, i32, i32 }
+ %struct.Macroblock = type { i32, i32, i32, [2 x i32], i32, [8 x i32], %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.MotionInfoContexts = type { [3 x [11 x %struct.BiContextType]], [2 x [9 x %struct.BiContextType]], [2 x [10 x %struct.BiContextType]], [2 x [6 x %struct.BiContextType]], [4 x %struct.BiContextType], [4 x %struct.BiContextType], [3 x %struct.BiContextType] }
+ %struct.Picture = type { i32, i32, [100 x %struct.Slice*], i32, float, float, float }
+ %struct.Slice = type { i32, i32, i32, i32, i32, i32, %struct.DataPartition*, %struct.MotionInfoContexts*, %struct.TextureInfoContexts*, i32, i32*, i32*, i32*, i32, i32*, i32*, i32*, i32 (i32)*, [3 x [2 x i32]] }
+ %struct.TextureInfoContexts = type { [2 x %struct.BiContextType], [4 x %struct.BiContextType], [3 x [4 x %struct.BiContextType]], [10 x [4 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [5 x %struct.BiContextType]], [10 x [5 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]] }
+@images = external global %struct.ImageParameters ; <%struct.ImageParameters*> [#uses=2]
+
+declare i8* @calloc(i32, i32)
+
+define fastcc void @init_global_buffers() nounwind {
+entry:
+ %tmp50.i.i = mul i32 0, 0 ; <i32> [#uses=2]
+ br i1 false, label %init_orig_buffers.exit, label %cond_true.i29
+
+cond_true.i29: ; preds = %entry
+ %tmp17.i = load i32* getelementptr (%struct.ImageParameters* @images, i32 0, i32 20), align 8 ; <i32> [#uses=1]
+ %tmp20.i27 = load i32* getelementptr (%struct.ImageParameters* @images, i32 0, i32 16), align 8 ; <i32> [#uses=1]
+ %tmp8.i.i = select i1 false, i32 1, i32 0 ; <i32> [#uses=1]
+ br label %bb.i8.us.i
+
+bb.i8.us.i: ; preds = %get_mem2Dpel.exit.i.us.i, %cond_true.i29
+ %j.04.i.us.i = phi i32 [ %indvar.next39.i, %get_mem2Dpel.exit.i.us.i ], [ 0, %cond_true.i29 ] ; <i32> [#uses=2]
+ %tmp13.i.us.i = getelementptr i16*** null, i32 %j.04.i.us.i ; <i16***> [#uses=0]
+ %tmp15.i.i.us.i = tail call i8* @calloc( i32 0, i32 2 ) ; <i8*> [#uses=0]
+ store i16* null, i16** null, align 4
+ br label %bb.i.i.us.i
+
+get_mem2Dpel.exit.i.us.i: ; preds = %bb.i.i.us.i
+ %indvar.next39.i = add i32 %j.04.i.us.i, 1 ; <i32> [#uses=2]
+ %exitcond40.i = icmp eq i32 %indvar.next39.i, 2 ; <i1> [#uses=1]
+ br i1 %exitcond40.i, label %get_mem3Dpel.exit.split.i, label %bb.i8.us.i
+
+bb.i.i.us.i: ; preds = %bb.i.i.us.i, %bb.i8.us.i
+ %exitcond.i = icmp eq i32 0, %tmp8.i.i ; <i1> [#uses=1]
+ br i1 %exitcond.i, label %get_mem2Dpel.exit.i.us.i, label %bb.i.i.us.i
+
+get_mem3Dpel.exit.split.i: ; preds = %get_mem2Dpel.exit.i.us.i
+ %tmp30.i.i = shl i32 %tmp17.i, 2 ; <i32> [#uses=1]
+ %tmp31.i.i = mul i32 %tmp30.i.i, %tmp20.i27 ; <i32> [#uses=1]
+ %tmp23.i31 = add i32 %tmp31.i.i, %tmp50.i.i ; <i32> [#uses=1]
+ br label %init_orig_buffers.exit
+
+init_orig_buffers.exit: ; preds = %get_mem3Dpel.exit.split.i, %entry
+ %memory_size.0.i = phi i32 [ %tmp23.i31, %get_mem3Dpel.exit.split.i ], [ %tmp50.i.i, %entry ] ; <i32> [#uses=1]
+ %tmp41 = add i32 0, %memory_size.0.i ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2008-05-19-ScavengerAssert.ll b/test/CodeGen/ARM/2008-05-19-ScavengerAssert.ll
new file mode 100644
index 0000000..aa61d86
--- /dev/null
+++ b/test/CodeGen/ARM/2008-05-19-ScavengerAssert.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+ %struct.Decoders = type { i32**, i16***, i16****, i16***, i16**, i8**, i8** }
+@decoders = external global %struct.Decoders ; <%struct.Decoders*> [#uses=1]
+
+declare i8* @calloc(i32, i32)
+
+declare fastcc i32 @get_mem2Dint(i32***, i32, i32)
+
+define fastcc void @init_global_buffers() nounwind {
+entry:
+ %tmp151 = tail call fastcc i32 @get_mem2Dint( i32*** getelementptr (%struct.Decoders* @decoders, i32 0, i32 0), i32 16, i32 16 ) ; <i32> [#uses=1]
+ %tmp158 = tail call i8* @calloc( i32 0, i32 4 ) ; <i8*> [#uses=0]
+ br i1 false, label %cond_true166, label %bb190.preheader
+
+bb190.preheader: ; preds = %entry
+ %memory_size.3555 = add i32 0, %tmp151 ; <i32> [#uses=0]
+ unreachable
+
+cond_true166: ; preds = %entry
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2008-07-17-Fdiv.ll b/test/CodeGen/ARM/2008-07-17-Fdiv.ll
new file mode 100644
index 0000000..4cb768e
--- /dev/null
+++ b/test/CodeGen/ARM/2008-07-17-Fdiv.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm
+
+define float @f(float %a, float %b) nounwind {
+ %tmp = fdiv float %a, %b
+ ret float %tmp
+}
diff --git a/test/CodeGen/ARM/2008-07-24-CodeGenPrepCrash.ll b/test/CodeGen/ARM/2008-07-24-CodeGenPrepCrash.ll
new file mode 100644
index 0000000..83fde07
--- /dev/null
+++ b/test/CodeGen/ARM/2008-07-24-CodeGenPrepCrash.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=arm
+; PR2589
+
+define void @main({ i32 }*) {
+entry:
+ %sret1 = alloca { i32 } ; <{ i32 }*> [#uses=1]
+ load { i32 }* %sret1 ; <{ i32 }>:1 [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2008-08-07-AsmPrintBug.ll b/test/CodeGen/ARM/2008-08-07-AsmPrintBug.ll
new file mode 100644
index 0000000..adb0112
--- /dev/null
+++ b/test/CodeGen/ARM/2008-08-07-AsmPrintBug.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 -relocation-model=pic | grep comm
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__gcov_var = type { %struct.FILE*, i32, i32, i32, i32, i32, i32, [1025 x i32] }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+@__gcov_var = common global %struct.__gcov_var zeroinitializer ; <%struct.__gcov_var*> [#uses=1]
+
+define i32 @__gcov_close() nounwind {
+entry:
+ load i32* getelementptr (%struct.__gcov_var* @__gcov_var, i32 0, i32 5), align 4 ; <i32>:0 [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/ARM/2008-09-14-CoalescerBug.ll b/test/CodeGen/ARM/2008-09-14-CoalescerBug.ll
new file mode 100644
index 0000000..5f9d9ae
--- /dev/null
+++ b/test/CodeGen/ARM/2008-09-14-CoalescerBug.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+@"\01LC1" = external constant [288 x i8] ; <[288 x i8]*> [#uses=1]
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ br label %bb.i
+
+bb.i: ; preds = %bb.i, %entry
+ %i.01.i = phi i32 [ 0, %entry ], [ %indvar.next52, %bb.i ] ; <i32> [#uses=1]
+ %indvar.next52 = add i32 %i.01.i, 1 ; <i32> [#uses=2]
+ %exitcond53 = icmp eq i32 %indvar.next52, 15 ; <i1> [#uses=1]
+ br i1 %exitcond53, label %bb.i33.loopexit, label %bb.i
+
+bb.i33.loopexit: ; preds = %bb.i
+ %0 = malloc [347 x i8] ; <[347 x i8]*> [#uses=2]
+ %.sub = getelementptr [347 x i8]* %0, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %.sub, i8* getelementptr ([288 x i8]* @"\01LC1", i32 0, i32 0), i32 287, i32 1 ) nounwind
+ br label %bb.i28
+
+bb.i28: ; preds = %bb.i28, %bb.i33.loopexit
+ br i1 false, label %repeat_fasta.exit, label %bb.i28
+
+repeat_fasta.exit: ; preds = %bb.i28
+ free [347 x i8]* %0
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll b/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll
new file mode 100644
index 0000000..d3bc3e1
--- /dev/null
+++ b/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+define void @gcov_exit() nounwind {
+entry:
+ br i1 false, label %bb24, label %bb33.thread
+
+bb24: ; preds = %entry
+ br label %bb39
+
+bb33.thread: ; preds = %entry
+ %0 = alloca i8, i32 0 ; <i8*> [#uses=1]
+ br label %bb39
+
+bb39: ; preds = %bb33.thread, %bb24
+ %.reg2mem.0 = phi i8* [ %0, %bb33.thread ], [ null, %bb24 ] ; <i8*> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2008-11-18-ScavengerAssert.ll b/test/CodeGen/ARM/2008-11-18-ScavengerAssert.ll
new file mode 100644
index 0000000..601a516
--- /dev/null
+++ b/test/CodeGen/ARM/2008-11-18-ScavengerAssert.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
+
+define hidden i64 @__muldi3(i64 %u, i64 %v) nounwind {
+entry:
+ %0 = trunc i64 %u to i32 ; <i32> [#uses=1]
+ %asmtmp = tail call { i32, i32, i32, i32, i32 } asm "@ Inlined umul_ppmm\0A\09mov\09$2, $5, lsr #16\0A\09mov\09$0, $6, lsr #16\0A\09bic\09$3, $5, $2, lsl #16\0A\09bic\09$4, $6, $0, lsl #16\0A\09mul\09$1, $3, $4\0A\09mul\09$4, $2, $4\0A\09mul\09$3, $0, $3\0A\09mul\09$0, $2, $0\0A\09adds\09$3, $4, $3\0A\09addcs\09$0, $0, #65536\0A\09adds\09$1, $1, $3, lsl #16\0A\09adc\09$0, $0, $3, lsr #16", "=&r,=r,=&r,=&r,=r,r,r,~{cc}"(i32 %0, i32 0) nounwind ; <{ i32, i32, i32, i32, i32 }> [#uses=1]
+ %asmresult1 = extractvalue { i32, i32, i32, i32, i32 } %asmtmp, 1 ; <i32> [#uses=1]
+ %asmresult116 = zext i32 %asmresult1 to i64 ; <i64> [#uses=1]
+ %asmresult116.ins = or i64 0, %asmresult116 ; <i64> [#uses=1]
+ %1 = lshr i64 %v, 32 ; <i64> [#uses=1]
+ %2 = mul i64 %1, %u ; <i64> [#uses=1]
+ %3 = add i64 %2, 0 ; <i64> [#uses=1]
+ %4 = shl i64 %3, 32 ; <i64> [#uses=1]
+ %5 = add i64 %asmresult116.ins, %4 ; <i64> [#uses=1]
+ ret i64 %5
+}
diff --git a/test/CodeGen/ARM/2009-02-16-SpillerBug.ll b/test/CodeGen/ARM/2009-02-16-SpillerBug.ll
new file mode 100644
index 0000000..4c0c59c
--- /dev/null
+++ b/test/CodeGen/ARM/2009-02-16-SpillerBug.ll
@@ -0,0 +1,117 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
+
+target triple = "arm-apple-darwin9"
+ %struct.FILE_POS = type { i8, i8, i16, i32 }
+ %struct.FIRST_UNION = type { %struct.FILE_POS }
+ %struct.FOURTH_UNION = type { %struct.STYLE }
+ %struct.GAP = type { i8, i8, i16 }
+ %struct.LIST = type { %struct.rec*, %struct.rec* }
+ %struct.SECOND_UNION = type { { i16, i8, i8 } }
+ %struct.STYLE = type { { %struct.GAP }, { %struct.GAP }, i16, i16, i32 }
+ %struct.THIRD_UNION = type { { [2 x i32], [2 x i32] } }
+ %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, { %struct.rec* }, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+ %struct.rec = type { %struct.head_type }
+@no_file_pos = external global %struct.FILE_POS ; <%struct.FILE_POS*> [#uses=1]
+@"\01LC13423" = external constant [23 x i8] ; <[23 x i8]*> [#uses=1]
+@"\01LC18972" = external constant [13 x i8] ; <[13 x i8]*> [#uses=1]
+
+define fastcc void @FlushGalley(%struct.rec* %hd) nounwind {
+entry:
+ br label %RESUME
+
+RESUME: ; preds = %bb520.preheader, %entry
+ br label %bb396
+
+bb122: ; preds = %bb396
+ switch i32 0, label %bb394 [
+ i32 1, label %bb131
+ i32 2, label %bb244
+ i32 4, label %bb244
+ i32 5, label %bb244
+ i32 6, label %bb244
+ i32 7, label %bb244
+ i32 11, label %bb244
+ i32 12, label %bb244
+ i32 15, label %bb244
+ i32 17, label %bb244
+ i32 18, label %bb244
+ i32 19, label %bb244
+ i32 20, label %bb396
+ i32 21, label %bb396
+ i32 22, label %bb396
+ i32 23, label %bb396
+ i32 24, label %bb244
+ i32 25, label %bb244
+ i32 26, label %bb244
+ i32 27, label %bb244
+ i32 28, label %bb244
+ i32 29, label %bb244
+ i32 30, label %bb244
+ i32 31, label %bb244
+ i32 32, label %bb244
+ i32 33, label %bb244
+ i32 34, label %bb244
+ i32 35, label %bb244
+ i32 36, label %bb244
+ i32 37, label %bb244
+ i32 38, label %bb244
+ i32 39, label %bb244
+ i32 40, label %bb244
+ i32 41, label %bb244
+ i32 42, label %bb244
+ i32 43, label %bb244
+ i32 44, label %bb244
+ i32 45, label %bb244
+ i32 46, label %bb244
+ i32 50, label %bb244
+ i32 51, label %bb244
+ i32 94, label %bb244
+ i32 95, label %bb244
+ i32 96, label %bb244
+ i32 97, label %bb244
+ i32 98, label %bb244
+ i32 99, label %bb244
+ ]
+
+bb131: ; preds = %bb122
+ br label %bb396
+
+bb244: ; preds = %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122
+ %0 = icmp eq %struct.rec* %stop_link.3, null ; <i1> [#uses=1]
+ br i1 %0, label %bb435, label %bb433
+
+bb394: ; preds = %bb122
+ call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 3, i8* getelementptr ([23 x i8]* @"\01LC13423", i32 0, i32 0), i32 0, %struct.FILE_POS* @no_file_pos, i8* getelementptr ([13 x i8]* @"\01LC18972", i32 0, i32 0), i8* null) nounwind
+ br label %bb396
+
+bb396: ; preds = %bb394, %bb131, %bb122, %bb122, %bb122, %bb122, %RESUME
+ %stop_link.3 = phi %struct.rec* [ null, %RESUME ], [ %stop_link.3, %bb394 ], [ %stop_link.3, %bb122 ], [ %stop_link.3, %bb122 ], [ %stop_link.3, %bb122 ], [ %stop_link.3, %bb122 ], [ %link.1, %bb131 ] ; <%struct.rec*> [#uses=7]
+ %headers_seen.1 = phi i32 [ 0, %RESUME ], [ %headers_seen.1, %bb394 ], [ 1, %bb122 ], [ 1, %bb122 ], [ 1, %bb122 ], [ 1, %bb122 ], [ %headers_seen.1, %bb131 ] ; <i32> [#uses=2]
+ %link.1 = load %struct.rec** null ; <%struct.rec*> [#uses=2]
+ %1 = icmp eq %struct.rec* %link.1, %hd ; <i1> [#uses=1]
+ br i1 %1, label %bb398, label %bb122
+
+bb398: ; preds = %bb396
+ unreachable
+
+bb433: ; preds = %bb244
+ call fastcc void @Promote(%struct.rec* %hd, %struct.rec* %stop_link.3, %struct.rec* null, i32 1) nounwind
+ br label %bb435
+
+bb435: ; preds = %bb433, %bb244
+ br i1 false, label %bb491, label %bb499
+
+bb491: ; preds = %bb435
+ br label %bb499
+
+bb499: ; preds = %bb499, %bb491, %bb435
+ %2 = icmp eq %struct.rec* null, null ; <i1> [#uses=1]
+ br i1 %2, label %bb520.preheader, label %bb499
+
+bb520.preheader: ; preds = %bb499
+ br label %RESUME
+}
+
+declare fastcc void @Promote(%struct.rec*, %struct.rec*, %struct.rec* nocapture, i32) nounwind
+
+declare void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
diff --git a/test/CodeGen/ARM/2009-02-22-SoftenFloatVaArg.ll b/test/CodeGen/ARM/2009-02-22-SoftenFloatVaArg.ll
new file mode 100644
index 0000000..a48f003
--- /dev/null
+++ b/test/CodeGen/ARM/2009-02-22-SoftenFloatVaArg.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s
+; PR3610
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32"
+target triple = "arm-elf"
+
+define i32 @main(i8*) nounwind {
+entry:
+ %ap = alloca i8* ; <i8**> [#uses=2]
+ store i8* %0, i8** %ap
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ store i32 0, i32* %retval
+ %tmp = alloca float ; <float*> [#uses=1]
+ %1 = va_arg i8** %ap, float ; <float> [#uses=1]
+ store float %1, float* %tmp
+ br label %return
+
+return: ; preds = %entry
+ %2 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %2
+}
diff --git a/test/CodeGen/ARM/2009-02-27-SpillerBug.ll b/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
new file mode 100644
index 0000000..bc5e602
--- /dev/null
+++ b/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
@@ -0,0 +1,229 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
+
+target triple = "arm-apple-darwin9"
+@a = external global double ; <double*> [#uses=1]
+@N = external global double ; <double*> [#uses=1]
+
+declare double @llvm.exp.f64(double) nounwind readonly
+
+define fastcc void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind {
+bb.thread:
+ br label %bb52
+
+bb32: ; preds = %bb52
+ %0 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %1 = add i32 %j.1, 1 ; <i32> [#uses=1]
+ br label %bb52
+
+bb52: ; preds = %bb53, %bb32, %bb.thread
+ %i.3494 = phi i32 [ 0, %bb.thread ], [ %3, %bb53 ], [ %i.3494, %bb32 ] ; <i32> [#uses=2]
+ %k.4 = phi double [ %0, %bb32 ], [ 0.000000e+00, %bb53 ], [ 0.000000e+00, %bb.thread ] ; <double> [#uses=2]
+ %j.1 = phi i32 [ %1, %bb32 ], [ 0, %bb53 ], [ 0, %bb.thread ] ; <i32> [#uses=2]
+ %2 = icmp sgt i32 %j.1, 99 ; <i1> [#uses=1]
+ br i1 %2, label %bb53, label %bb32
+
+bb53: ; preds = %bb52
+ %3 = add i32 %i.3494, 1 ; <i32> [#uses=2]
+ %phitmp = icmp sgt i32 %3, 999999 ; <i1> [#uses=1]
+ br i1 %phitmp, label %bb55, label %bb52
+
+bb55: ; preds = %bb53
+ %4 = load double* @a, align 4 ; <double> [#uses=10]
+ %5 = fadd double %4, 0.000000e+00 ; <double> [#uses=16]
+ %6 = fcmp ogt double %k.4, 0.000000e+00 ; <i1> [#uses=1]
+ %.pn404 = fmul double %4, %4 ; <double> [#uses=4]
+ %.pn402 = fmul double %5, %5 ; <double> [#uses=5]
+ %.pn165.in = load double* @N ; <double> [#uses=5]
+ %.pn198 = fmul double 0.000000e+00, %5 ; <double> [#uses=1]
+ %.pn185 = fsub double -0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %.pn147 = fsub double -0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %.pn141 = fdiv double 0.000000e+00, %4 ; <double> [#uses=1]
+ %.pn142 = fdiv double 0.000000e+00, %5 ; <double> [#uses=1]
+ %.pn136 = fdiv double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %.pn132 = fdiv double 0.000000e+00, %5 ; <double> [#uses=1]
+ %.pn123 = fdiv double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %.pn124 = fdiv double 0.000000e+00, %.pn198 ; <double> [#uses=1]
+ %.pn120 = fdiv double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %.pn117 = fdiv double 0.000000e+00, %4 ; <double> [#uses=1]
+ %.pn118 = fdiv double %.pn185, %5 ; <double> [#uses=1]
+ %.pn88 = fdiv double %.pn147, %5 ; <double> [#uses=1]
+ %.pn81 = fsub double %.pn141, %.pn142 ; <double> [#uses=1]
+ %.pn77 = fsub double 0.000000e+00, %.pn136 ; <double> [#uses=1]
+ %.pn75 = fsub double 0.000000e+00, %.pn132 ; <double> [#uses=1]
+ %.pn69 = fsub double %.pn123, %.pn124 ; <double> [#uses=1]
+ %.pn67 = fsub double 0.000000e+00, %.pn120 ; <double> [#uses=1]
+ %.pn56 = fsub double %.pn117, %.pn118 ; <double> [#uses=1]
+ %.pn42 = fsub double 0.000000e+00, %.pn88 ; <double> [#uses=1]
+ %.pn60 = fmul double %.pn81, 0.000000e+00 ; <double> [#uses=1]
+ %.pn57 = fadd double %.pn77, 0.000000e+00 ; <double> [#uses=1]
+ %.pn58 = fmul double %.pn75, %.pn165.in ; <double> [#uses=1]
+ %.pn32 = fadd double %.pn69, 0.000000e+00 ; <double> [#uses=1]
+ %.pn33 = fmul double %.pn67, %.pn165.in ; <double> [#uses=1]
+ %.pn17 = fsub double 0.000000e+00, %.pn60 ; <double> [#uses=1]
+ %.pn9 = fadd double %.pn57, %.pn58 ; <double> [#uses=1]
+ %.pn30 = fmul double 0.000000e+00, %.pn56 ; <double> [#uses=1]
+ %.pn24 = fmul double 0.000000e+00, %.pn42 ; <double> [#uses=1]
+ %.pn1 = fadd double %.pn32, %.pn33 ; <double> [#uses=1]
+ %.pn28 = fsub double %.pn30, 0.000000e+00 ; <double> [#uses=1]
+ %.pn26 = fadd double %.pn28, 0.000000e+00 ; <double> [#uses=1]
+ %.pn22 = fsub double %.pn26, 0.000000e+00 ; <double> [#uses=1]
+ %.pn20 = fsub double %.pn24, 0.000000e+00 ; <double> [#uses=1]
+ %.pn18 = fadd double %.pn22, 0.000000e+00 ; <double> [#uses=1]
+ %.pn16 = fadd double %.pn20, 0.000000e+00 ; <double> [#uses=1]
+ %.pn14 = fsub double %.pn18, 0.000000e+00 ; <double> [#uses=1]
+ %.pn12 = fsub double %.pn16, %.pn17 ; <double> [#uses=1]
+ %.pn10 = fadd double %.pn14, 0.000000e+00 ; <double> [#uses=1]
+ %.pn8 = fadd double %.pn12, 0.000000e+00 ; <double> [#uses=1]
+ %.pn6 = fsub double %.pn10, 0.000000e+00 ; <double> [#uses=1]
+ %.pn4 = fsub double %.pn8, %.pn9 ; <double> [#uses=1]
+ %.pn2 = fadd double %.pn6, 0.000000e+00 ; <double> [#uses=1]
+ %.pn = fadd double %.pn4, 0.000000e+00 ; <double> [#uses=1]
+ %N1.0 = fsub double %.pn2, 0.000000e+00 ; <double> [#uses=2]
+ %D1.0 = fsub double %.pn, %.pn1 ; <double> [#uses=2]
+ br i1 %6, label %bb62, label %bb64
+
+bb62: ; preds = %bb55
+ %7 = fmul double 0.000000e+00, %4 ; <double> [#uses=1]
+ %8 = fsub double -0.000000e+00, %7 ; <double> [#uses=3]
+ %9 = fmul double 0.000000e+00, %5 ; <double> [#uses=1]
+ %10 = fsub double -0.000000e+00, %9 ; <double> [#uses=3]
+ %11 = fmul double %.pn404, %4 ; <double> [#uses=5]
+ %12 = fmul double %.pn402, %5 ; <double> [#uses=5]
+ %13 = fmul double 0.000000e+00, -2.000000e+00 ; <double> [#uses=1]
+ %14 = fdiv double 0.000000e+00, %.pn402 ; <double> [#uses=1]
+ %15 = fsub double 0.000000e+00, %14 ; <double> [#uses=1]
+ %16 = fmul double 0.000000e+00, %15 ; <double> [#uses=1]
+ %17 = fadd double %13, %16 ; <double> [#uses=1]
+ %18 = fmul double %.pn165.in, -2.000000e+00 ; <double> [#uses=5]
+ %19 = fmul double %18, 0.000000e+00 ; <double> [#uses=1]
+ %20 = fadd double %17, %19 ; <double> [#uses=1]
+ %21 = fmul double 0.000000e+00, %20 ; <double> [#uses=1]
+ %22 = fadd double 0.000000e+00, %21 ; <double> [#uses=1]
+ %23 = fdiv double 0.000000e+00, %12 ; <double> [#uses=1]
+ %24 = fsub double 0.000000e+00, %23 ; <double> [#uses=0]
+ %25 = fmul double %18, 0.000000e+00 ; <double> [#uses=1]
+ %26 = fadd double 0.000000e+00, %25 ; <double> [#uses=1]
+ %27 = fmul double 0.000000e+00, %26 ; <double> [#uses=1]
+ %28 = fsub double %22, %27 ; <double> [#uses=1]
+ %29 = fmul double %11, %4 ; <double> [#uses=1]
+ %30 = fmul double %12, %5 ; <double> [#uses=3]
+ %31 = fmul double %.pn165.in, -4.000000e+00 ; <double> [#uses=1]
+ %32 = fmul double %.pn165.in, 0x3FF5555555555555 ; <double> [#uses=1]
+ %33 = fmul double %32, 0.000000e+00 ; <double> [#uses=2]
+ %34 = fadd double %28, 0.000000e+00 ; <double> [#uses=1]
+ %35 = fsub double -0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %36 = fdiv double %35, %11 ; <double> [#uses=1]
+ %37 = fdiv double 0.000000e+00, %12 ; <double> [#uses=1]
+ %38 = fsub double %36, %37 ; <double> [#uses=1]
+ %39 = fmul double 0.000000e+00, %38 ; <double> [#uses=1]
+ %40 = fadd double 0.000000e+00, %39 ; <double> [#uses=1]
+ %41 = fadd double %40, 0.000000e+00 ; <double> [#uses=1]
+ %42 = fadd double %41, 0.000000e+00 ; <double> [#uses=1]
+ %43 = fmul double %42, 0.000000e+00 ; <double> [#uses=1]
+ %44 = fsub double %34, %43 ; <double> [#uses=1]
+ %45 = tail call double @llvm.exp.f64(double %8) nounwind ; <double> [#uses=1]
+ %46 = fsub double -0.000000e+00, %45 ; <double> [#uses=2]
+ %47 = fdiv double %46, 0.000000e+00 ; <double> [#uses=1]
+ %48 = fmul double %30, %5 ; <double> [#uses=1]
+ %49 = fdiv double 0.000000e+00, %48 ; <double> [#uses=1]
+ %50 = fsub double %47, %49 ; <double> [#uses=1]
+ %51 = fmul double %50, -4.000000e+00 ; <double> [#uses=1]
+ %52 = fadd double %51, 0.000000e+00 ; <double> [#uses=1]
+ %53 = fdiv double %46, %11 ; <double> [#uses=1]
+ %54 = fsub double %53, 0.000000e+00 ; <double> [#uses=1]
+ %55 = fmul double %31, %54 ; <double> [#uses=1]
+ %56 = fadd double %52, %55 ; <double> [#uses=1]
+ %57 = fadd double %56, 0.000000e+00 ; <double> [#uses=1]
+ %58 = fadd double %44, %57 ; <double> [#uses=1]
+ %59 = fsub double %58, 0.000000e+00 ; <double> [#uses=1]
+ %60 = tail call double @llvm.exp.f64(double 0.000000e+00) nounwind ; <double> [#uses=1]
+ %61 = fsub double -0.000000e+00, %60 ; <double> [#uses=1]
+ %62 = fdiv double 0.000000e+00, -6.000000e+00 ; <double> [#uses=1]
+ %63 = fdiv double %61, %5 ; <double> [#uses=1]
+ %64 = fsub double 0.000000e+00, %63 ; <double> [#uses=1]
+ %65 = fmul double %62, %64 ; <double> [#uses=1]
+ %66 = fsub double 0.000000e+00, %65 ; <double> [#uses=1]
+ %67 = fsub double -0.000000e+00, 0.000000e+00 ; <double> [#uses=2]
+ %68 = tail call double @llvm.exp.f64(double %10) nounwind ; <double> [#uses=1]
+ %69 = fsub double -0.000000e+00, %68 ; <double> [#uses=2]
+ %70 = fdiv double %67, %.pn404 ; <double> [#uses=1]
+ %71 = fdiv double %69, %.pn402 ; <double> [#uses=1]
+ %72 = fsub double %70, %71 ; <double> [#uses=1]
+ %73 = fmul double %72, -5.000000e-01 ; <double> [#uses=1]
+ %74 = fdiv double %67, %4 ; <double> [#uses=1]
+ %75 = fdiv double %69, %5 ; <double> [#uses=1]
+ %76 = fsub double %74, %75 ; <double> [#uses=1]
+ %77 = fmul double %76, 0.000000e+00 ; <double> [#uses=1]
+ %78 = fadd double %73, %77 ; <double> [#uses=1]
+ %79 = fmul double 0.000000e+00, %78 ; <double> [#uses=1]
+ %80 = fadd double %66, %79 ; <double> [#uses=1]
+ %81 = fdiv double 0.000000e+00, %.pn404 ; <double> [#uses=1]
+ %82 = fdiv double 0.000000e+00, %.pn402 ; <double> [#uses=1]
+ %83 = fsub double %81, %82 ; <double> [#uses=1]
+ %84 = fmul double %83, -5.000000e-01 ; <double> [#uses=1]
+ %85 = fdiv double 0.000000e+00, %4 ; <double> [#uses=1]
+ %86 = fdiv double 0.000000e+00, %5 ; <double> [#uses=1]
+ %87 = fsub double %85, %86 ; <double> [#uses=1]
+ %88 = fmul double %87, 0.000000e+00 ; <double> [#uses=1]
+ %89 = fadd double %84, %88 ; <double> [#uses=1]
+ %90 = fmul double 0.000000e+00, %89 ; <double> [#uses=1]
+ %91 = fsub double %80, %90 ; <double> [#uses=1]
+ %92 = tail call double @llvm.exp.f64(double %8) nounwind ; <double> [#uses=1]
+ %93 = fsub double -0.000000e+00, %92 ; <double> [#uses=1]
+ %94 = tail call double @llvm.exp.f64(double %10) nounwind ; <double> [#uses=1]
+ %95 = fsub double -0.000000e+00, %94 ; <double> [#uses=3]
+ %96 = fdiv double %95, %.pn402 ; <double> [#uses=1]
+ %97 = fsub double 0.000000e+00, %96 ; <double> [#uses=1]
+ %98 = fmul double 0.000000e+00, %97 ; <double> [#uses=1]
+ %99 = fdiv double %93, %11 ; <double> [#uses=1]
+ %100 = fdiv double %95, %12 ; <double> [#uses=1]
+ %101 = fsub double %99, %100 ; <double> [#uses=1]
+ %102 = fsub double %98, %101 ; <double> [#uses=1]
+ %103 = fdiv double %95, %5 ; <double> [#uses=1]
+ %104 = fsub double 0.000000e+00, %103 ; <double> [#uses=1]
+ %105 = fmul double %18, %104 ; <double> [#uses=1]
+ %106 = fadd double %102, %105 ; <double> [#uses=1]
+ %107 = fmul double %106, %k.4 ; <double> [#uses=1]
+ %108 = fadd double %91, %107 ; <double> [#uses=1]
+ %109 = fsub double %108, 0.000000e+00 ; <double> [#uses=1]
+ %110 = tail call double @llvm.exp.f64(double %8) nounwind ; <double> [#uses=1]
+ %111 = fsub double -0.000000e+00, %110 ; <double> [#uses=2]
+ %112 = tail call double @llvm.exp.f64(double %10) nounwind ; <double> [#uses=1]
+ %113 = fsub double -0.000000e+00, %112 ; <double> [#uses=2]
+ %114 = fdiv double %111, %11 ; <double> [#uses=1]
+ %115 = fdiv double %113, %12 ; <double> [#uses=1]
+ %116 = fsub double %114, %115 ; <double> [#uses=1]
+ %117 = fmul double 0.000000e+00, %116 ; <double> [#uses=1]
+ %118 = fdiv double %111, %29 ; <double> [#uses=1]
+ %119 = fdiv double %113, %30 ; <double> [#uses=1]
+ %120 = fsub double %118, %119 ; <double> [#uses=1]
+ %121 = fsub double %117, %120 ; <double> [#uses=1]
+ %122 = fmul double %18, 0.000000e+00 ; <double> [#uses=1]
+ %123 = fadd double %121, %122 ; <double> [#uses=1]
+ %124 = fmul double %33, 0.000000e+00 ; <double> [#uses=1]
+ %125 = fadd double %123, %124 ; <double> [#uses=1]
+ %126 = fadd double %109, %125 ; <double> [#uses=1]
+ %127 = tail call double @llvm.exp.f64(double 0.000000e+00) nounwind ; <double> [#uses=1]
+ %128 = fsub double -0.000000e+00, %127 ; <double> [#uses=2]
+ %129 = fdiv double %128, %30 ; <double> [#uses=1]
+ %130 = fsub double 0.000000e+00, %129 ; <double> [#uses=1]
+ %131 = fsub double 0.000000e+00, %130 ; <double> [#uses=1]
+ %132 = fdiv double 0.000000e+00, %.pn404 ; <double> [#uses=1]
+ %133 = fsub double %132, 0.000000e+00 ; <double> [#uses=1]
+ %134 = fmul double %18, %133 ; <double> [#uses=1]
+ %135 = fadd double %131, %134 ; <double> [#uses=1]
+ %136 = fdiv double %128, %5 ; <double> [#uses=1]
+ %137 = fsub double 0.000000e+00, %136 ; <double> [#uses=1]
+ %138 = fmul double %33, %137 ; <double> [#uses=1]
+ %139 = fadd double %135, %138 ; <double> [#uses=1]
+ %140 = fsub double %126, %139 ; <double> [#uses=1]
+ %141 = fadd double %N1.0, %59 ; <double> [#uses=1]
+ %142 = fadd double %D1.0, %140 ; <double> [#uses=1]
+ br label %bb64
+
+bb64: ; preds = %bb62, %bb55
+ %N1.0.pn = phi double [ %141, %bb62 ], [ %N1.0, %bb55 ] ; <double> [#uses=1]
+ %D1.0.pn = phi double [ %142, %bb62 ], [ %D1.0, %bb55 ] ; <double> [#uses=1]
+ %x.1 = fdiv double %N1.0.pn, %D1.0.pn ; <double> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-03-07-SpillerBug.ll b/test/CodeGen/ARM/2009-03-07-SpillerBug.ll
new file mode 100644
index 0000000..0ec17ae
--- /dev/null
+++ b/test/CodeGen/ARM/2009-03-07-SpillerBug.ll
@@ -0,0 +1,78 @@
+; RUN: llc < %s -mtriple=armv6-apple-darwin9 -mattr=+vfp2
+; rdar://6653182
+
+ %struct.ggBRDF = type { i32 (...)** }
+ %struct.ggPoint2 = type { [2 x double] }
+ %struct.ggPoint3 = type { [3 x double] }
+ %struct.ggSpectrum = type { [8 x float] }
+ %struct.ggSphere = type { %struct.ggPoint3, double }
+ %struct.mrDiffuseAreaSphereLuminaire = type { %struct.mrSphere, %struct.ggSpectrum }
+ %struct.mrDiffuseCosineSphereLuminaire = type { %struct.mrDiffuseAreaSphereLuminaire }
+ %struct.mrSphere = type { %struct.ggBRDF, %struct.ggSphere }
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
+
+declare double @llvm.sqrt.f64(double) nounwind readonly
+
+declare double @sin(double) nounwind readonly
+
+declare double @acos(double) nounwind readonly
+
+define i32 @_ZNK34mrDiffuseSolidAngleSphereLuminaire18selectVisiblePointERK8ggPoint3RK9ggVector3RK8ggPoint2dRS0_Rd(%struct.mrDiffuseCosineSphereLuminaire* nocapture %this, %struct.ggPoint3* nocapture %x, %struct.ggPoint3* nocapture %unnamed_arg, %struct.ggPoint2* nocapture %uv, double %unnamed_arg2, %struct.ggPoint3* nocapture %on_light, double* nocapture %invProb) nounwind {
+entry:
+ %0 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind ; <double> [#uses=4]
+ %1 = fcmp ult double 0.000000e+00, %0 ; <i1> [#uses=1]
+ br i1 %1, label %bb3, label %bb7
+
+bb3: ; preds = %entry
+ %2 = fdiv double 1.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %3 = fmul double 0.000000e+00, %2 ; <double> [#uses=2]
+ %4 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind ; <double> [#uses=1]
+ %5 = fdiv double 1.000000e+00, %4 ; <double> [#uses=2]
+ %6 = fmul double %3, %5 ; <double> [#uses=2]
+ %7 = fmul double 0.000000e+00, %5 ; <double> [#uses=2]
+ %8 = fmul double %3, %7 ; <double> [#uses=1]
+ %9 = fsub double %8, 0.000000e+00 ; <double> [#uses=1]
+ %10 = fmul double 0.000000e+00, %6 ; <double> [#uses=1]
+ %11 = fsub double 0.000000e+00, %10 ; <double> [#uses=1]
+ %12 = fsub double -0.000000e+00, %11 ; <double> [#uses=1]
+ %13 = fmul double %0, %0 ; <double> [#uses=2]
+ %14 = fsub double %13, 0.000000e+00 ; <double> [#uses=1]
+ %15 = call double @llvm.sqrt.f64(double %14) ; <double> [#uses=1]
+ %16 = fmul double 0.000000e+00, %15 ; <double> [#uses=1]
+ %17 = fdiv double %16, %0 ; <double> [#uses=1]
+ %18 = fadd double 0.000000e+00, %17 ; <double> [#uses=1]
+ %19 = call double @acos(double %18) nounwind readonly ; <double> [#uses=1]
+ %20 = load double* null, align 4 ; <double> [#uses=1]
+ %21 = fmul double %20, 0x401921FB54442D18 ; <double> [#uses=1]
+ %22 = call double @sin(double %19) nounwind readonly ; <double> [#uses=2]
+ %23 = fmul double %22, 0.000000e+00 ; <double> [#uses=2]
+ %24 = fmul double %6, %23 ; <double> [#uses=1]
+ %25 = fmul double %7, %23 ; <double> [#uses=1]
+ %26 = call double @sin(double %21) nounwind readonly ; <double> [#uses=1]
+ %27 = fmul double %22, %26 ; <double> [#uses=2]
+ %28 = fmul double %9, %27 ; <double> [#uses=1]
+ %29 = fmul double %27, %12 ; <double> [#uses=1]
+ %30 = fadd double %24, %28 ; <double> [#uses=1]
+ %31 = fadd double 0.000000e+00, %29 ; <double> [#uses=1]
+ %32 = fadd double %25, 0.000000e+00 ; <double> [#uses=1]
+ %33 = fadd double %30, 0.000000e+00 ; <double> [#uses=1]
+ %34 = fadd double %31, 0.000000e+00 ; <double> [#uses=1]
+ %35 = fadd double %32, 0.000000e+00 ; <double> [#uses=1]
+ %36 = bitcast %struct.ggPoint3* %x to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32(i8* null, i8* %36, i32 24, i32 4) nounwind
+ store double %33, double* null, align 8
+ br i1 false, label %_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit, label %bb5.i.i.i
+
+bb5.i.i.i: ; preds = %bb3
+ unreachable
+
+_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit: ; preds = %bb3
+ %37 = fsub double %13, 0.000000e+00 ; <double> [#uses=0]
+ %38 = fsub double -0.000000e+00, %34 ; <double> [#uses=0]
+ %39 = fsub double -0.000000e+00, %35 ; <double> [#uses=0]
+ ret i32 1
+
+bb7: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2009-03-09-AddrModeBug.ll b/test/CodeGen/ARM/2009-03-09-AddrModeBug.ll
new file mode 100644
index 0000000..a1ce384
--- /dev/null
+++ b/test/CodeGen/ARM/2009-03-09-AddrModeBug.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=arm
+
+ %struct.hit_t = type { %struct.v_t, double }
+ %struct.node_t = type { %struct.hit_t, %struct.hit_t, i32 }
+ %struct.v_t = type { double, double, double }
+
+define fastcc %struct.node_t* @_ZL6createP6node_tii3v_tS1_d(%struct.node_t* %n, i32 %lvl, i32 %dist, i64 %c.0.0, i64 %c.0.1, i64 %c.0.2, i64 %d.0.0, i64 %d.0.1, i64 %d.0.2, double %r) nounwind {
+entry:
+ %0 = getelementptr %struct.node_t* %n, i32 0, i32 1 ; <%struct.hit_t*> [#uses=1]
+ %1 = bitcast %struct.hit_t* %0 to i256* ; <i256*> [#uses=1]
+ store i256 0, i256* %1, align 4
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2009-04-06-AsmModifier.ll b/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
new file mode 100644
index 0000000..3526722
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=arm | grep {swi 107}
+
+define i32 @_swilseek(i32) nounwind {
+entry:
+ %ptr = alloca i32 ; <i32*> [#uses=2]
+ store i32 %0, i32* %ptr
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ store i32 0, i32* %retval
+ %res = alloca i32 ; <i32*> [#uses=0]
+ %fh = alloca i32 ; <i32*> [#uses=1]
+ %1 = load i32* %fh ; <i32> [#uses=1]
+ %2 = load i32* %ptr ; <i32> [#uses=1]
+ %3 = call i32 asm "mov r0, $2; mov r1, $3; swi ${1:a}; mov $0, r0", "=r,i,r,r,~{r0},~{r1}"(i32 107, i32 %1, i32 %2) nounwind ; <i32> [#uses=1]
+ store i32 %3, i32* %retval
+ br label %return
+
+return: ; preds = %entry
+ %4 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %4
+}
diff --git a/test/CodeGen/ARM/2009-04-08-AggregateAddr.ll b/test/CodeGen/ARM/2009-04-08-AggregateAddr.ll
new file mode 100644
index 0000000..f6b3d2c
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-08-AggregateAddr.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=arm
+; PR3795
+
+define fastcc void @_D3foo3fooFAriZv({ i32, { double, double }* } %d_arg, i32 %x_arg) {
+entry:
+ %d = alloca { i32, { double, double }* } ; <{ i32, { double, double }* }*> [#uses=2]
+ %x = alloca i32 ; <i32*> [#uses=2]
+ %b = alloca { double, double } ; <{ double, double }*> [#uses=1]
+ store { i32, { double, double }* } %d_arg, { i32, { double, double }* }* %d
+ store i32 %x_arg, i32* %x
+ %tmp = load i32* %x ; <i32> [#uses=1]
+ %tmp1 = getelementptr { i32, { double, double }* }* %d, i32 0, i32 1 ; <{ double, double }**> [#uses=1]
+ %.ptr = load { double, double }** %tmp1 ; <{ double, double }*> [#uses=1]
+ %tmp2 = getelementptr { double, double }* %.ptr, i32 %tmp ; <{ double, double }*> [#uses=1]
+ %tmp3 = load { double, double }* %tmp2 ; <{ double, double }> [#uses=1]
+ store { double, double } %tmp3, { double, double }* %b
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-04-08-FREM.ll b/test/CodeGen/ARM/2009-04-08-FREM.ll
new file mode 100644
index 0000000..99907fc
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-08-FREM.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=arm
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %rem_r = frem double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %1 = call i32 (i8*, ...)* @printf(i8* null, double %rem_r) ; <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2009-04-08-FloatUndef.ll b/test/CodeGen/ARM/2009-04-08-FloatUndef.ll
new file mode 100644
index 0000000..05d2f26
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-08-FloatUndef.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm
+
+define void @execute_shader(<4 x float>* %OUT, <4 x float>* %IN, <4 x float>* %CONST) {
+entry:
+ %input2 = load <4 x float>* null, align 16 ; <<4 x float>> [#uses=2]
+ %shuffle7 = shufflevector <4 x float> %input2, <4 x float> <float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00>, <4 x i32> <i32 2, i32 2, i32 2, i32 2> ; <<4 x float>> [#uses=1]
+ %mul1 = fmul <4 x float> %shuffle7, zeroinitializer ; <<4 x float>> [#uses=1]
+ %add2 = fadd <4 x float> %mul1, %input2 ; <<4 x float>> [#uses=1]
+ store <4 x float> %add2, <4 x float>* null, align 16
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll b/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll
new file mode 100644
index 0000000..deb092b
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=arm
+; PR3954
+
+define void @foo(...) nounwind {
+entry:
+ %rr = alloca i32 ; <i32*> [#uses=2]
+ %0 = load i32* %rr ; <i32> [#uses=1]
+ %1 = call i32 asm "nop", "=r,0"(i32 %0) nounwind ; <i32> [#uses=1]
+ store i32 %1, i32* %rr
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll b/test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll
new file mode 100644
index 0000000..670d204
--- /dev/null
+++ b/test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=arm-linuxeabi-unknown-gnu -mattr=+v6
+; PR4166
+
+ %"byte[]" = type { i32, i8* }
+ %tango.time.Time.Time = type { i64 }
+
+define fastcc void @t() {
+entry:
+ %tmp28 = call fastcc i1 null(i32* null, %"byte[]" undef, %"byte[]" undef, %tango.time.Time.Time* byval null) ; <i1> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll b/test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll
new file mode 100644
index 0000000..75610ff
--- /dev/null
+++ b/test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=armv5-unknown-linux-gnueabi -O0 -regalloc=local
+; PR4100
[email protected] = external constant [30 x i8] ; <[30 x i8]*> [#uses=1]
+
+define i16 @fn16(i16 %arg0.0, <2 x i16> %arg1, i16 %arg2.0) nounwind {
+entry:
+ store <2 x i16> %arg1, <2 x i16>* null
+ %0 = call i32 (i8*, ...)* @printf(i8* getelementptr ([30 x i8]* @.str, i32 0, i32 0), i32 0) nounwind ; <i32> [#uses=0]
+ ret i16 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/ARM/2009-05-11-CodePlacementCrash.ll b/test/CodeGen/ARM/2009-05-11-CodePlacementCrash.ll
new file mode 100644
index 0000000..7046fcc
--- /dev/null
+++ b/test/CodeGen/ARM/2009-05-11-CodePlacementCrash.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=arm
+ %struct.List = type { %struct.List*, i32 }
+@Node5 = external constant %struct.List ; <%struct.List*> [#uses=1]
+@"\01LC" = external constant [7 x i8] ; <[7 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb3, %entry
+ %CurL.02 = phi %struct.List* [ @Node5, %entry ], [ %2, %bb3 ] ; <%struct.List*> [#uses=1]
+ %PrevL.01 = phi %struct.List* [ null, %entry ], [ %CurL.02, %bb3 ] ; <%struct.List*> [#uses=1]
+ %0 = icmp eq %struct.List* %PrevL.01, null ; <i1> [#uses=1]
+ br i1 %0, label %bb3, label %bb1
+
+bb1: ; preds = %bb
+ br label %bb3
+
+bb3: ; preds = %bb1, %bb
+ %iftmp.0.0 = phi i32 [ 0, %bb1 ], [ -1, %bb ] ; <i32> [#uses=1]
+ %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([7 x i8]* @"\01LC", i32 0, i32 0), i32 0, i32 %iftmp.0.0) nounwind ; <i32> [#uses=0]
+ %2 = load %struct.List** null, align 4 ; <%struct.List*> [#uses=2]
+ %phitmp = icmp eq %struct.List* %2, null ; <i1> [#uses=1]
+ br i1 %phitmp, label %bb5, label %bb
+
+bb5: ; preds = %bb3
+ ret i32 0
+}
+
+declare i32 @printf(i8* nocapture, ...) nounwind
diff --git a/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll b/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
new file mode 100644
index 0000000..1e2707f
--- /dev/null
+++ b/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+; RUN: llc < %s -march=thumb | FileCheck %s
+; PR4091
+
+define void @foo(i32 %i, i32* %p) nounwind {
+;CHECK: swp r2, r0, [r1]
+ %asmtmp = call i32 asm sideeffect "swp $0, $2, $3", "=&r,=*m,r,*m,~{memory}"(i32* %p, i32 %i, i32* %p) nounwind
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-06-02-ISelCrash.ll b/test/CodeGen/ARM/2009-06-02-ISelCrash.ll
new file mode 100644
index 0000000..403e3f65
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-02-ISelCrash.ll
@@ -0,0 +1,62 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6,+vfp2
+
+@"\01LC" = external constant [15 x i8] ; <[15 x i8]*> [#uses=1]
+
+declare i32 @printf(i8* nocapture, ...) nounwind
+
+define i32 @main() nounwind {
+entry:
+ br label %bb.i1.i
+
+bb.i1.i: ; preds = %Cos.exit.i.i, %entry
+ br label %bb.i.i.i
+
+bb.i.i.i: ; preds = %bb.i.i.i, %bb.i1.i
+ br i1 undef, label %Cos.exit.i.i, label %bb.i.i.i
+
+Cos.exit.i.i: ; preds = %bb.i.i.i
+ br i1 undef, label %bb2.i.i, label %bb.i1.i
+
+bb2.i.i: ; preds = %Cos.exit.i.i
+ br label %bb3.i.i
+
+bb3.i.i: ; preds = %bb5.i.i, %bb2.i.i
+ br label %bb4.i.i
+
+bb4.i.i: ; preds = %bb4.i.i, %bb3.i.i
+ br i1 undef, label %bb5.i.i, label %bb4.i.i
+
+bb5.i.i: ; preds = %bb4.i.i
+ br i1 undef, label %bb.i, label %bb3.i.i
+
+bb.i: ; preds = %bb.i, %bb5.i.i
+ br i1 undef, label %bb1.outer2.i.i.outer, label %bb.i
+
+bb1.outer2.i.i.outer: ; preds = %Fft.exit.i, %bb5.i12.i, %bb.i
+ br label %bb1.outer2.i.i
+
+bb1.outer2.i.i: ; preds = %bb2.i9.i, %bb1.outer2.i.i.outer
+ br label %bb1.i.i
+
+bb1.i.i: ; preds = %bb1.i.i, %bb1.outer2.i.i
+ br i1 undef, label %bb2.i9.i, label %bb1.i.i
+
+bb2.i9.i: ; preds = %bb1.i.i
+ br i1 undef, label %bb4.i11.i, label %bb1.outer2.i.i
+
+bb4.i11.i: ; preds = %bb4.i11.i, %bb2.i9.i
+ br i1 undef, label %bb5.i12.i, label %bb4.i11.i
+
+bb5.i12.i: ; preds = %bb4.i11.i
+ br i1 undef, label %bb7.i.i, label %bb1.outer2.i.i.outer
+
+bb7.i.i: ; preds = %bb7.i.i, %bb5.i12.i
+ br i1 undef, label %Fft.exit.i, label %bb7.i.i
+
+Fft.exit.i: ; preds = %bb7.i.i
+ br i1 undef, label %bb5.i, label %bb1.outer2.i.i.outer
+
+bb5.i: ; preds = %Fft.exit.i
+ %0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([15 x i8]* @"\01LC", i32 0, i32 0), double undef, double undef) nounwind ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2009-06-04-MissingLiveIn.ll b/test/CodeGen/ARM/2009-06-04-MissingLiveIn.ll
new file mode 100644
index 0000000..98e0023
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-04-MissingLiveIn.ll
@@ -0,0 +1,263 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6
+
+ %struct.anon = type { i16, i16 }
+ %struct.cab_archive = type { i32, i16, i16, i16, i16, i8, %struct.cab_folder*, %struct.cab_file* }
+ %struct.cab_file = type { i32, i16, i64, i8*, i32, i32, i32, %struct.cab_folder*, %struct.cab_file*, %struct.cab_archive*, %struct.cab_state* }
+ %struct.cab_folder = type { i16, i16, %struct.cab_archive*, i64, %struct.cab_folder* }
+ %struct.cab_state = type { i8*, i8*, [38912 x i8], i16, i16, i8*, i16 }
+ %struct.qtm_model = type { i32, i32, %struct.anon* }
+ %struct.qtm_stream = type { i32, i32, i8, i8*, i32, i32, i32, i16, i16, i16, i8, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i8, [42 x i32], [42 x i8], [27 x i8], [27 x i8], %struct.qtm_model, %struct.qtm_model, %struct.qtm_model, %struct.qtm_model, %struct.qtm_model, %struct.qtm_model, %struct.qtm_model, %struct.qtm_model, %struct.qtm_model, [65 x %struct.anon], [65 x %struct.anon], [65 x %struct.anon], [65 x %struct.anon], [25 x %struct.anon], [37 x %struct.anon], [43 x %struct.anon], [28 x %struct.anon], [8 x %struct.anon], %struct.cab_file*, i32 (%struct.cab_file*, i8*, i32)* }
+
+declare fastcc i32 @qtm_read_input(%struct.qtm_stream* nocapture) nounwind
+
+define fastcc i32 @qtm_decompress(%struct.qtm_stream* %qtm, i64 %out_bytes) nounwind {
+entry:
+ br i1 undef, label %bb245, label %bb3
+
+bb3: ; preds = %entry
+ br i1 undef, label %bb5, label %bb4
+
+bb4: ; preds = %bb3
+ ret i32 undef
+
+bb5: ; preds = %bb3
+ br i1 undef, label %bb245, label %bb14
+
+bb14: ; preds = %bb5
+ br label %bb238
+
+bb28: ; preds = %bb215
+ br label %bb31
+
+bb29: ; preds = %bb31
+ br i1 undef, label %bb31, label %bb32
+
+bb31: ; preds = %bb29, %bb28
+ br i1 undef, label %bb29, label %bb32
+
+bb32: ; preds = %bb31, %bb29
+ br label %bb33
+
+bb33: ; preds = %bb33, %bb32
+ br i1 undef, label %bb34, label %bb33
+
+bb34: ; preds = %bb33
+ br i1 undef, label %bb35, label %bb36
+
+bb35: ; preds = %bb34
+ br label %bb36
+
+bb36: ; preds = %bb46, %bb35, %bb34
+ br i1 undef, label %bb40, label %bb37
+
+bb37: ; preds = %bb36
+ br i1 undef, label %bb77, label %bb60
+
+bb40: ; preds = %bb36
+ br i1 undef, label %bb46, label %bb41
+
+bb41: ; preds = %bb40
+ br i1 undef, label %bb45, label %bb42
+
+bb42: ; preds = %bb41
+ ret i32 undef
+
+bb45: ; preds = %bb41
+ br label %bb46
+
+bb46: ; preds = %bb45, %bb40
+ br label %bb36
+
+bb60: ; preds = %bb60, %bb37
+ br label %bb60
+
+bb77: ; preds = %bb37
+ switch i32 undef, label %bb197 [
+ i32 5, label %bb108
+ i32 6, label %bb138
+ ]
+
+bb108: ; preds = %bb77
+ br label %bb111
+
+bb109: ; preds = %bb111
+ br i1 undef, label %bb111, label %bb112
+
+bb111: ; preds = %bb109, %bb108
+ br i1 undef, label %bb109, label %bb112
+
+bb112: ; preds = %bb111, %bb109
+ br label %bb113
+
+bb113: ; preds = %bb113, %bb112
+ br i1 undef, label %bb114, label %bb113
+
+bb114: ; preds = %bb113
+ br i1 undef, label %bb115, label %bb116
+
+bb115: ; preds = %bb114
+ br label %bb116
+
+bb116: ; preds = %bb115, %bb114
+ br i1 undef, label %bb120, label %bb117
+
+bb117: ; preds = %bb116
+ br label %bb136
+
+bb120: ; preds = %bb116
+ ret i32 undef
+
+bb128: ; preds = %bb136
+ br i1 undef, label %bb134, label %bb129
+
+bb129: ; preds = %bb128
+ br i1 undef, label %bb133, label %bb130
+
+bb130: ; preds = %bb129
+ br i1 undef, label %bb132, label %bb131
+
+bb131: ; preds = %bb130
+ ret i32 undef
+
+bb132: ; preds = %bb130
+ br label %bb133
+
+bb133: ; preds = %bb132, %bb129
+ br label %bb134
+
+bb134: ; preds = %bb133, %bb128
+ br label %bb136
+
+bb136: ; preds = %bb134, %bb117
+ br i1 undef, label %bb198, label %bb128
+
+bb138: ; preds = %bb77
+ %0 = trunc i32 undef to i16 ; <i16> [#uses=1]
+ br label %bb141
+
+bb139: ; preds = %bb141
+ %scevgep441442881 = load i16* undef ; <i16> [#uses=1]
+ %1 = icmp ugt i16 %scevgep441442881, %0 ; <i1> [#uses=1]
+ br i1 %1, label %bb141, label %bb142
+
+bb141: ; preds = %bb139, %bb138
+ br i1 undef, label %bb139, label %bb142
+
+bb142: ; preds = %bb141, %bb139
+ br label %bb143
+
+bb143: ; preds = %bb143, %bb142
+ br i1 undef, label %bb144, label %bb143
+
+bb144: ; preds = %bb143
+ br i1 undef, label %bb145, label %bb146
+
+bb145: ; preds = %bb144
+ unreachable
+
+bb146: ; preds = %bb156, %bb144
+ br i1 undef, label %bb150, label %bb147
+
+bb147: ; preds = %bb146
+ br i1 undef, label %bb157, label %bb148
+
+bb148: ; preds = %bb147
+ br i1 undef, label %bb149, label %bb157
+
+bb149: ; preds = %bb148
+ br label %bb150
+
+bb150: ; preds = %bb149, %bb146
+ br i1 undef, label %bb156, label %bb152
+
+bb152: ; preds = %bb150
+ unreachable
+
+bb156: ; preds = %bb150
+ br label %bb146
+
+bb157: ; preds = %bb148, %bb147
+ br i1 undef, label %bb167, label %bb160
+
+bb160: ; preds = %bb157
+ ret i32 undef
+
+bb167: ; preds = %bb157
+ br label %bb170
+
+bb168: ; preds = %bb170
+ br i1 undef, label %bb170, label %bb171
+
+bb170: ; preds = %bb168, %bb167
+ br i1 undef, label %bb168, label %bb171
+
+bb171: ; preds = %bb170, %bb168
+ br label %bb172
+
+bb172: ; preds = %bb172, %bb171
+ br i1 undef, label %bb173, label %bb172
+
+bb173: ; preds = %bb172
+ br i1 undef, label %bb174, label %bb175
+
+bb174: ; preds = %bb173
+ unreachable
+
+bb175: ; preds = %bb179, %bb173
+ br i1 undef, label %bb179, label %bb176
+
+bb176: ; preds = %bb175
+ br i1 undef, label %bb186, label %bb177
+
+bb177: ; preds = %bb176
+ br i1 undef, label %bb178, label %bb186
+
+bb178: ; preds = %bb177
+ br label %bb179
+
+bb179: ; preds = %bb178, %bb175
+ br label %bb175
+
+bb186: ; preds = %bb177, %bb176
+ br label %bb195
+
+bb187: ; preds = %bb195
+ br i1 undef, label %bb193, label %bb189
+
+bb189: ; preds = %bb187
+ %2 = tail call fastcc i32 @qtm_read_input(%struct.qtm_stream* %qtm) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+
+bb193: ; preds = %bb187
+ br label %bb195
+
+bb195: ; preds = %bb193, %bb186
+ br i1 undef, label %bb198, label %bb187
+
+bb197: ; preds = %bb77
+ ret i32 -124
+
+bb198: ; preds = %bb195, %bb136
+ br i1 undef, label %bb211.preheader, label %bb214
+
+bb211.preheader: ; preds = %bb198
+ br label %bb211
+
+bb211: ; preds = %bb211, %bb211.preheader
+ br i1 undef, label %bb214, label %bb211
+
+bb214: ; preds = %bb211, %bb198
+ br label %bb215
+
+bb215: ; preds = %bb238, %bb214
+ br i1 undef, label %bb28, label %bb216
+
+bb216: ; preds = %bb215
+ br label %bb238
+
+bb238: ; preds = %bb216, %bb14
+ br label %bb215
+
+bb245: ; preds = %bb5, %entry
+ ret i32 undef
+}
diff --git a/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll
new file mode 100644
index 0000000..27888d7
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll
@@ -0,0 +1,77 @@
+; RUN: llc < %s -mtriple=armv6-apple-darwin
+
+ type { i32, i32, %struct.D_Sym**, [3 x %struct.D_Sym*] } ; type %0
+ type { i32, %struct.D_Reduction** } ; type %1
+ type { i32, %struct.D_RightEpsilonHint* } ; type %2
+ type { i32, %struct.D_ErrorRecoveryHint* } ; type %3
+ type { i32, i32, %struct.D_Reduction**, [3 x %struct.D_Reduction*] } ; type %4
+ %struct.D_ErrorRecoveryHint = type { i16, i16, i8* }
+ %struct.D_ParseNode = type { i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, i8*, i8* }
+ %struct.D_Parser = type { i8*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, %struct.D_Scope*, void (%struct.D_Parser*)*, %struct.D_ParseNode* (%struct.D_Parser*, i32, %struct.D_ParseNode**)*, void (%struct.D_ParseNode*)*, %struct.d_loc_t, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.D_ParserTables = type { i32, %struct.D_State*, i16*, i32, i32, %struct.D_Symbol*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, i32, %struct.D_Pass*, i32 }
+ %struct.D_Pass = type { i8*, i32, i32, i32 }
+ %struct.D_Reduction = type { i16, i16, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)*, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)*, i16, i16, i32, i32, i32, i32, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)** }
+ %struct.D_RightEpsilonHint = type { i16, i16, %struct.D_Reduction* }
+ %struct.D_Scope = type { i8, %struct.D_Sym*, %struct.D_SymHash*, %struct.D_Sym*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope* }
+ %struct.D_Shift = type { i16, i8, i8, i32, i32, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)* }
+ %struct.D_State = type { i8*, i32, %1, %2, %3, %struct.D_Shift**, i32 (i8**, i32*, i32*, i16*, i32*, i8*, i32*)*, i8*, i8, i8, i8, i8*, %struct.D_Shift***, i32 }
+ %struct.D_Sym = type { i8*, i32, i32, %struct.D_Sym*, %struct.D_Sym*, i32 }
+ %struct.D_SymHash = type { i32, i32, %0 }
+ %struct.D_Symbol = type { i32, i8*, i32 }
+ %struct.PNode = type { i32, i32, i32, i32, %struct.D_Reduction*, %struct.D_Shift*, i32, %struct.VecPNode, i32, i8, i8, %struct.PNode*, %struct.PNode*, %struct.PNode*, %struct.PNode*, i8*, i8*, %struct.D_Scope*, i8*, %struct.D_ParseNode }
+ %struct.PNodeHash = type { %struct.PNode**, i32, i32, i32, %struct.PNode* }
+ %struct.Parser = type { %struct.D_Parser, i8*, i8*, %struct.D_ParserTables*, i32, i32, i32, i32, i32, i32, i32, %struct.PNodeHash, %struct.SNodeHash, %struct.Reduction*, %struct.Shift*, %struct.D_Scope*, %struct.SNode*, i32, %struct.Reduction*, %struct.Shift*, i32, %struct.PNode*, %struct.SNode*, %struct.ZNode*, %4, %struct.ShiftResult*, %struct.D_Shift, %struct.Parser*, i8* }
+ %struct.Reduction = type { %struct.ZNode*, %struct.SNode*, %struct.D_Reduction*, %struct.SNode*, i32, %struct.Reduction* }
+ %struct.SNode = type { %struct.D_State*, %struct.D_Scope*, i8*, %struct.d_loc_t, i32, %struct.PNode*, %struct.VecZNode, i32, %struct.SNode*, %struct.SNode* }
+ %struct.SNodeHash = type { %struct.SNode**, i32, i32, i32, %struct.SNode*, %struct.SNode* }
+ %struct.Shift = type { %struct.SNode*, %struct.Shift* }
+ %struct.ShiftResult = type { %struct.D_Shift*, %struct.d_loc_t }
+ %struct.VecPNode = type { i32, i32, %struct.PNode**, [3 x %struct.PNode*] }
+ %struct.VecSNode = type { i32, i32, %struct.SNode**, [3 x %struct.SNode*] }
+ %struct.VecZNode = type { i32, i32, %struct.ZNode**, [3 x %struct.ZNode*] }
+ %struct.ZNode = type { %struct.PNode*, %struct.VecSNode }
+ %struct.d_loc_t = type { i8*, i8*, i32, i32, i32 }
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
+
+define fastcc i32 @exhaustive_parse(%struct.Parser* %p, i32 %state) nounwind {
+entry:
+ store i8* undef, i8** undef, align 4
+ %0 = getelementptr %struct.Parser* %p, i32 0, i32 0, i32 6 ; <%struct.d_loc_t*> [#uses=1]
+ %1 = bitcast %struct.d_loc_t* %0 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32(i8* undef, i8* %1, i32 20, i32 4)
+ br label %bb10
+
+bb10: ; preds = %bb30, %bb29, %bb26, %entry
+ br i1 undef, label %bb18, label %bb20
+
+bb18: ; preds = %bb10
+ br i1 undef, label %bb20, label %bb19
+
+bb19: ; preds = %bb18
+ br label %bb20
+
+bb20: ; preds = %bb19, %bb18, %bb10
+ br i1 undef, label %bb21, label %bb22
+
+bb21: ; preds = %bb20
+ unreachable
+
+bb22: ; preds = %bb20
+ br i1 undef, label %bb24, label %bb26
+
+bb24: ; preds = %bb22
+ unreachable
+
+bb26: ; preds = %bb22
+ br i1 undef, label %bb10, label %bb29
+
+bb29: ; preds = %bb26
+ br i1 undef, label %bb10, label %bb30
+
+bb30: ; preds = %bb29
+ br i1 undef, label %bb31, label %bb10
+
+bb31: ; preds = %bb30
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2009-06-15-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-15-RegScavengerAssert.ll
new file mode 100644
index 0000000..a0f903b
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-15-RegScavengerAssert.ll
@@ -0,0 +1,344 @@
+; RUN: llc < %s -mtriple=armv6-apple-darwin
+
+ %struct.term = type { i32, i32, i32 }
+
+declare fastcc i8* @memory_Malloc(i32) nounwind
+
+define fastcc %struct.term* @t1() nounwind {
+entry:
+ br i1 undef, label %bb, label %bb1
+
+bb: ; preds = %entry
+ ret %struct.term* undef
+
+bb1: ; preds = %entry
+ %0 = tail call fastcc i8* @memory_Malloc(i32 12) nounwind ; <i8*> [#uses=0]
+ %1 = tail call fastcc i8* @memory_Malloc(i32 12) nounwind ; <i8*> [#uses=0]
+ ret %struct.term* undef
+}
+
+
+define i32 @t2(i32 %argc, i8** nocapture %argv) nounwind {
+entry:
+ br label %bb6.i8
+
+bb6.i8: ; preds = %memory_CalculateRealBlockSize1374.exit.i, %entry
+ br i1 undef, label %memory_CalculateRealBlockSize1374.exit.i, label %bb.i.i9
+
+bb.i.i9: ; preds = %bb6.i8
+ br label %memory_CalculateRealBlockSize1374.exit.i
+
+memory_CalculateRealBlockSize1374.exit.i: ; preds = %bb.i.i9, %bb6.i8
+ %0 = phi i32 [ undef, %bb.i.i9 ], [ undef, %bb6.i8 ] ; <i32> [#uses=2]
+ store i32 %0, i32* undef, align 4
+ %1 = urem i32 8184, %0 ; <i32> [#uses=1]
+ %2 = sub i32 8188, %1 ; <i32> [#uses=1]
+ store i32 %2, i32* undef, align 4
+ br i1 undef, label %memory_Init.exit, label %bb6.i8
+
+memory_Init.exit: ; preds = %memory_CalculateRealBlockSize1374.exit.i
+ br label %bb.i.i
+
+bb.i.i: ; preds = %bb.i.i, %memory_Init.exit
+ br i1 undef, label %symbol_Init.exit, label %bb.i.i
+
+symbol_Init.exit: ; preds = %bb.i.i
+ br label %bb.i.i67
+
+bb.i.i67: ; preds = %bb.i.i67, %symbol_Init.exit
+ br i1 undef, label %symbol_CreatePrecedence3522.exit, label %bb.i.i67
+
+symbol_CreatePrecedence3522.exit: ; preds = %bb.i.i67
+ br label %bb.i.i8.i
+
+bb.i.i8.i: ; preds = %bb.i.i8.i, %symbol_CreatePrecedence3522.exit
+ br i1 undef, label %cont_Create.exit9.i, label %bb.i.i8.i
+
+cont_Create.exit9.i: ; preds = %bb.i.i8.i
+ br label %bb.i.i.i72
+
+bb.i.i.i72: ; preds = %bb.i.i.i72, %cont_Create.exit9.i
+ br i1 undef, label %cont_Init.exit, label %bb.i.i.i72
+
+cont_Init.exit: ; preds = %bb.i.i.i72
+ br label %bb.i103
+
+bb.i103: ; preds = %bb.i103, %cont_Init.exit
+ br i1 undef, label %subs_Init.exit, label %bb.i103
+
+subs_Init.exit: ; preds = %bb.i103
+ br i1 undef, label %bb1.i.i.i80, label %cc_Init.exit
+
+bb1.i.i.i80: ; preds = %subs_Init.exit
+ unreachable
+
+cc_Init.exit: ; preds = %subs_Init.exit
+ br label %bb.i.i375
+
+bb.i.i375: ; preds = %bb.i.i375, %cc_Init.exit
+ br i1 undef, label %bb.i439, label %bb.i.i375
+
+bb.i439: ; preds = %bb.i439, %bb.i.i375
+ br i1 undef, label %opts_DeclareSPASSFlagsAsOptions.exit, label %bb.i439
+
+opts_DeclareSPASSFlagsAsOptions.exit: ; preds = %bb.i439
+ br i1 undef, label %opts_TranslateShortOptDeclarations.exit.i, label %bb.i.i82
+
+bb.i.i82: ; preds = %opts_DeclareSPASSFlagsAsOptions.exit
+ unreachable
+
+opts_TranslateShortOptDeclarations.exit.i: ; preds = %opts_DeclareSPASSFlagsAsOptions.exit
+ br i1 undef, label %list_Length.exit.i.thread.i, label %bb.i.i4.i
+
+list_Length.exit.i.thread.i: ; preds = %opts_TranslateShortOptDeclarations.exit.i
+ br i1 undef, label %bb18.i.i.i, label %bb26.i.i.i
+
+bb.i.i4.i: ; preds = %opts_TranslateShortOptDeclarations.exit.i
+ unreachable
+
+bb18.i.i.i: ; preds = %list_Length.exit.i.thread.i
+ unreachable
+
+bb26.i.i.i: ; preds = %list_Length.exit.i.thread.i
+ br i1 undef, label %bb27.i142, label %opts_GetOptLongOnly.exit.thread97.i
+
+opts_GetOptLongOnly.exit.thread97.i: ; preds = %bb26.i.i.i
+ br label %bb27.i142
+
+bb27.i142: ; preds = %opts_GetOptLongOnly.exit.thread97.i, %bb26.i.i.i
+ br label %bb1.i3.i
+
+bb1.i3.i: ; preds = %bb1.i3.i, %bb27.i142
+ br i1 undef, label %opts_FreeLongOptsArray.exit.i, label %bb1.i3.i
+
+opts_FreeLongOptsArray.exit.i: ; preds = %bb1.i3.i
+ br label %bb.i443
+
+bb.i443: ; preds = %bb.i443, %opts_FreeLongOptsArray.exit.i
+ br i1 undef, label %flag_InitStoreByDefaults3542.exit, label %bb.i443
+
+flag_InitStoreByDefaults3542.exit: ; preds = %bb.i443
+ br i1 undef, label %bb6.i449, label %bb.i503
+
+bb6.i449: ; preds = %flag_InitStoreByDefaults3542.exit
+ unreachable
+
+bb.i503: ; preds = %bb.i503, %flag_InitStoreByDefaults3542.exit
+ br i1 undef, label %flag_CleanStore3464.exit, label %bb.i503
+
+flag_CleanStore3464.exit: ; preds = %bb.i503
+ br i1 undef, label %bb1.i81.i.preheader, label %bb.i173
+
+bb.i173: ; preds = %flag_CleanStore3464.exit
+ unreachable
+
+bb1.i81.i.preheader: ; preds = %flag_CleanStore3464.exit
+ br i1 undef, label %bb1.i64.i.preheader, label %bb5.i179
+
+bb5.i179: ; preds = %bb1.i81.i.preheader
+ unreachable
+
+bb1.i64.i.preheader: ; preds = %bb1.i81.i.preheader
+ br i1 undef, label %dfg_DeleteProofList.exit.i, label %bb.i9.i
+
+bb.i9.i: ; preds = %bb1.i64.i.preheader
+ unreachable
+
+dfg_DeleteProofList.exit.i: ; preds = %bb1.i64.i.preheader
+ br i1 undef, label %term_DeleteTermList621.exit.i, label %bb.i.i62.i
+
+bb.i.i62.i: ; preds = %bb.i.i62.i, %dfg_DeleteProofList.exit.i
+ br i1 undef, label %term_DeleteTermList621.exit.i, label %bb.i.i62.i
+
+term_DeleteTermList621.exit.i: ; preds = %bb.i.i62.i, %dfg_DeleteProofList.exit.i
+ br i1 undef, label %dfg_DFGParser.exit, label %bb.i.i211
+
+bb.i.i211: ; preds = %term_DeleteTermList621.exit.i
+ unreachable
+
+dfg_DFGParser.exit: ; preds = %term_DeleteTermList621.exit.i
+ br label %bb.i513
+
+bb.i513: ; preds = %bb2.i516, %dfg_DFGParser.exit
+ br i1 undef, label %bb2.i516, label %bb1.i514
+
+bb1.i514: ; preds = %bb.i513
+ unreachable
+
+bb2.i516: ; preds = %bb.i513
+ br i1 undef, label %bb.i509, label %bb.i513
+
+bb.i509: ; preds = %bb.i509, %bb2.i516
+ br i1 undef, label %symbol_TransferPrecedence3468.exit511, label %bb.i509
+
+symbol_TransferPrecedence3468.exit511: ; preds = %bb.i509
+ br i1 undef, label %bb20, label %bb21
+
+bb20: ; preds = %symbol_TransferPrecedence3468.exit511
+ unreachable
+
+bb21: ; preds = %symbol_TransferPrecedence3468.exit511
+ br i1 undef, label %cnf_Init.exit, label %bb.i498
+
+bb.i498: ; preds = %bb21
+ unreachable
+
+cnf_Init.exit: ; preds = %bb21
+ br i1 undef, label %bb23, label %bb22
+
+bb22: ; preds = %cnf_Init.exit
+ br i1 undef, label %bb2.i.i496, label %bb.i.i494
+
+bb.i.i494: ; preds = %bb22
+ unreachable
+
+bb2.i.i496: ; preds = %bb22
+ unreachable
+
+bb23: ; preds = %cnf_Init.exit
+ br i1 undef, label %bb28, label %bb24
+
+bb24: ; preds = %bb23
+ unreachable
+
+bb28: ; preds = %bb23
+ br i1 undef, label %bb31, label %bb29
+
+bb29: ; preds = %bb28
+ unreachable
+
+bb31: ; preds = %bb28
+ br i1 undef, label %bb34, label %bb32
+
+bb32: ; preds = %bb31
+ unreachable
+
+bb34: ; preds = %bb31
+ br i1 undef, label %bb83, label %bb66
+
+bb66: ; preds = %bb34
+ unreachable
+
+bb83: ; preds = %bb34
+ br i1 undef, label %bb2.i1668, label %bb.i1667
+
+bb.i1667: ; preds = %bb83
+ unreachable
+
+bb2.i1668: ; preds = %bb83
+ br i1 undef, label %bb5.i205, label %bb3.i204
+
+bb3.i204: ; preds = %bb2.i1668
+ unreachable
+
+bb5.i205: ; preds = %bb2.i1668
+ br i1 undef, label %bb.i206.i, label %ana_AnalyzeSortStructure.exit.i
+
+bb.i206.i: ; preds = %bb5.i205
+ br i1 undef, label %bb1.i207.i, label %ana_AnalyzeSortStructure.exit.i
+
+bb1.i207.i: ; preds = %bb.i206.i
+ br i1 undef, label %bb25.i1801.thread, label %bb.i1688
+
+bb.i1688: ; preds = %bb1.i207.i
+ unreachable
+
+bb25.i1801.thread: ; preds = %bb1.i207.i
+ unreachable
+
+ana_AnalyzeSortStructure.exit.i: ; preds = %bb.i206.i, %bb5.i205
+ br i1 undef, label %bb7.i207, label %bb.i1806
+
+bb.i1806: ; preds = %ana_AnalyzeSortStructure.exit.i
+ br i1 undef, label %bb2.i.i.i1811, label %bb.i.i.i1809
+
+bb.i.i.i1809: ; preds = %bb.i1806
+ unreachable
+
+bb2.i.i.i1811: ; preds = %bb.i1806
+ unreachable
+
+bb7.i207: ; preds = %ana_AnalyzeSortStructure.exit.i
+ br i1 undef, label %bb9.i, label %bb8.i
+
+bb8.i: ; preds = %bb7.i207
+ unreachable
+
+bb9.i: ; preds = %bb7.i207
+ br i1 undef, label %bb23.i, label %bb26.i
+
+bb23.i: ; preds = %bb9.i
+ br i1 undef, label %bb25.i, label %bb24.i
+
+bb24.i: ; preds = %bb23.i
+ br i1 undef, label %sort_SortTheoryIsTrivial.exit.i, label %bb.i2093
+
+bb.i2093: ; preds = %bb.i2093, %bb24.i
+ br label %bb.i2093
+
+sort_SortTheoryIsTrivial.exit.i: ; preds = %bb24.i
+ br i1 undef, label %bb3.i2141, label %bb4.i2143
+
+bb3.i2141: ; preds = %sort_SortTheoryIsTrivial.exit.i
+ unreachable
+
+bb4.i2143: ; preds = %sort_SortTheoryIsTrivial.exit.i
+ br i1 undef, label %bb8.i2178, label %bb5.i2144
+
+bb5.i2144: ; preds = %bb4.i2143
+ br i1 undef, label %bb7.i2177, label %bb1.i28.i
+
+bb1.i28.i: ; preds = %bb5.i2144
+ br i1 undef, label %bb4.i43.i, label %bb2.i.i2153
+
+bb2.i.i2153: ; preds = %bb1.i28.i
+ br i1 undef, label %bb4.i.i33.i, label %bb.i.i30.i
+
+bb.i.i30.i: ; preds = %bb2.i.i2153
+ unreachable
+
+bb4.i.i33.i: ; preds = %bb2.i.i2153
+ br i1 undef, label %bb9.i.i36.i, label %bb5.i.i34.i
+
+bb5.i.i34.i: ; preds = %bb4.i.i33.i
+ unreachable
+
+bb9.i.i36.i: ; preds = %bb4.i.i33.i
+ br i1 undef, label %bb14.i.i.i2163, label %bb10.i.i37.i
+
+bb10.i.i37.i: ; preds = %bb9.i.i36.i
+ unreachable
+
+bb14.i.i.i2163: ; preds = %bb9.i.i36.i
+ br i1 undef, label %sort_LinkPrint.exit.i.i, label %bb15.i.i.i2164
+
+bb15.i.i.i2164: ; preds = %bb14.i.i.i2163
+ unreachable
+
+sort_LinkPrint.exit.i.i: ; preds = %bb14.i.i.i2163
+ unreachable
+
+bb4.i43.i: ; preds = %bb1.i28.i
+ unreachable
+
+bb7.i2177: ; preds = %bb5.i2144
+ unreachable
+
+bb8.i2178: ; preds = %bb4.i2143
+ br i1 undef, label %sort_ApproxStaticSortTheory.exit, label %bb.i5.i2185.preheader
+
+bb.i5.i2185.preheader: ; preds = %bb8.i2178
+ br label %bb.i5.i2185
+
+bb.i5.i2185: ; preds = %bb.i5.i2185, %bb.i5.i2185.preheader
+ br i1 undef, label %sort_ApproxStaticSortTheory.exit, label %bb.i5.i2185
+
+sort_ApproxStaticSortTheory.exit: ; preds = %bb.i5.i2185, %bb8.i2178
+ br label %bb25.i
+
+bb25.i: ; preds = %sort_ApproxStaticSortTheory.exit, %bb23.i
+ unreachable
+
+bb26.i: ; preds = %bb9.i
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll
new file mode 100644
index 0000000..b56b684
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard
+; PR4419
+
+define float @__ieee754_acosf(float %x) nounwind {
+entry:
+ br i1 undef, label %bb, label %bb4
+
+bb: ; preds = %entry
+ ret float undef
+
+bb4: ; preds = %entry
+ br i1 undef, label %bb5, label %bb6
+
+bb5: ; preds = %bb4
+ ret float undef
+
+bb6: ; preds = %bb4
+ br i1 undef, label %bb11, label %bb12
+
+bb11: ; preds = %bb6
+ %0 = tail call float @__ieee754_sqrtf(float undef) nounwind ; <float> [#uses=1]
+ %1 = fmul float %0, -2.000000e+00 ; <float> [#uses=1]
+ %2 = fadd float %1, 0x400921FB40000000 ; <float> [#uses=1]
+ ret float %2
+
+bb12: ; preds = %bb6
+ ret float undef
+}
+
+declare float @__ieee754_sqrtf(float)
diff --git a/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll b/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
new file mode 100644
index 0000000..e068be7
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s -mtriple=armv6-apple-darwin
+
+ %struct.rtunion = type { i64 }
+ %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
+
+define arm_apcscc void @simplify_unary_real(i8* nocapture %p) nounwind {
+entry:
+ %tmp121 = load i64* null, align 4 ; <i64> [#uses=1]
+ %0 = getelementptr %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0 ; <i64*> [#uses=1]
+ %tmp122 = load i64* %0, align 4 ; <i64> [#uses=1]
+ %1 = zext i64 undef to i192 ; <i192> [#uses=2]
+ %2 = zext i64 %tmp121 to i192 ; <i192> [#uses=1]
+ %3 = shl i192 %2, 64 ; <i192> [#uses=2]
+ %4 = zext i64 %tmp122 to i192 ; <i192> [#uses=1]
+ %5 = shl i192 %4, 128 ; <i192> [#uses=1]
+ %6 = or i192 %3, %1 ; <i192> [#uses=1]
+ %7 = or i192 %6, %5 ; <i192> [#uses=2]
+ switch i32 undef, label %bb82 [
+ i32 77, label %bb38
+ i32 129, label %bb21
+ i32 130, label %bb20
+ ]
+
+bb20: ; preds = %entry
+ ret void
+
+bb21: ; preds = %entry
+ br i1 undef, label %bb82, label %bb29
+
+bb29: ; preds = %bb21
+ %tmp18.i = and i192 %3, 1208907372870555465154560 ; <i192> [#uses=1]
+ %mask.i = or i192 %tmp18.i, %1 ; <i192> [#uses=1]
+ %mask41.i = or i192 %mask.i, 0 ; <i192> [#uses=1]
+ br label %bb82
+
+bb38: ; preds = %entry
+ br label %bb82
+
+bb82: ; preds = %bb38, %bb29, %bb21, %entry
+ %d.0 = phi i192 [ %mask41.i, %bb29 ], [ undef, %bb38 ], [ %7, %entry ], [ %7, %bb21 ] ; <i192> [#uses=1]
+ %tmp51 = trunc i192 %d.0 to i64 ; <i64> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll
new file mode 100644
index 0000000..17efe00
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll
@@ -0,0 +1,122 @@
+; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+
+@nn = external global i32 ; <i32*> [#uses=1]
+@al_len = external global i32 ; <i32*> [#uses=2]
+@no_mat = external global i32 ; <i32*> [#uses=2]
+@no_mis = external global i32 ; <i32*> [#uses=2]
+@"\01LC12" = external constant [29 x i8], align 1 ; <[29 x i8]*> [#uses=1]
+@"\01LC16" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1]
+@"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1]
+
+declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
+
+declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
+
+define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
+entry:
+ br i1 undef, label %bb5, label %bb
+
+bb: ; preds = %bb, %entry
+ br label %bb
+
+bb5: ; preds = %entry
+ br i1 undef, label %bb6, label %bb8
+
+bb6: ; preds = %bb6, %bb5
+ br i1 undef, label %bb8, label %bb6
+
+bb8: ; preds = %bb6, %bb5
+ br label %bb15
+
+bb9: ; preds = %bb15
+ br i1 undef, label %bb10, label %bb11
+
+bb10: ; preds = %bb9
+ unreachable
+
+bb11: ; preds = %bb9
+ %0 = load i32* undef, align 4 ; <i32> [#uses=2]
+ %1 = add i32 %0, 1 ; <i32> [#uses=2]
+ store i32 %1, i32* undef, align 4
+ %2 = load i32* undef, align 4 ; <i32> [#uses=1]
+ store i32 %2, i32* @nn, align 4
+ store i32 0, i32* @al_len, align 4
+ store i32 0, i32* @no_mat, align 4
+ store i32 0, i32* @no_mis, align 4
+ %3 = getelementptr i8* %B, i32 %0 ; <i8*> [#uses=1]
+ tail call arm_apcscc void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
+ %4 = sitofp i32 undef to double ; <double> [#uses=1]
+ %5 = fdiv double %4, 1.000000e+01 ; <double> [#uses=1]
+ %6 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; <i32> [#uses=0]
+ %7 = load i32* @al_len, align 4 ; <i32> [#uses=1]
+ %8 = load i32* @no_mat, align 4 ; <i32> [#uses=1]
+ %9 = load i32* @no_mis, align 4 ; <i32> [#uses=1]
+ %10 = sub i32 %7, %8 ; <i32> [#uses=1]
+ %11 = sub i32 %10, %9 ; <i32> [#uses=1]
+ %12 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; <i32> [#uses=0]
+ %13 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; <i32> [#uses=0]
+ br i1 undef, label %bb15, label %bb12
+
+bb12: ; preds = %bb11
+ br label %bb228.i
+
+bb74.i: ; preds = %bb228.i
+ br i1 undef, label %bb138.i, label %bb145.i
+
+bb138.i: ; preds = %bb74.i
+ br label %bb145.i
+
+bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i
+ br i1 undef, label %bb146.i, label %bb151.i
+
+bb146.i: ; preds = %bb145.i
+ br i1 undef, label %bb228.i, label %bb151.i
+
+bb151.i: ; preds = %bb146.i, %bb145.i
+ br i1 undef, label %bb153.i, label %bb228.i
+
+bb153.i: ; preds = %bb151.i
+ br i1 undef, label %bb220.i, label %bb.nph.i98
+
+bb.nph.i98: ; preds = %bb153.i
+ br label %bb158.i
+
+bb158.i: ; preds = %bb218.i, %bb.nph.i98
+ br i1 undef, label %bb168.i, label %bb160.i
+
+bb160.i: ; preds = %bb158.i
+ br i1 undef, label %bb161.i, label %bb168.i
+
+bb161.i: ; preds = %bb160.i
+ br i1 undef, label %bb168.i, label %bb163.i
+
+bb163.i: ; preds = %bb161.i
+ br i1 undef, label %bb167.i, label %bb168.i
+
+bb167.i: ; preds = %bb163.i
+ br label %bb168.i
+
+bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i
+ br i1 undef, label %bb211.i, label %bb218.i
+
+bb211.i: ; preds = %bb168.i
+ br label %bb218.i
+
+bb218.i: ; preds = %bb211.i, %bb168.i
+ br i1 undef, label %bb220.i, label %bb158.i
+
+bb220.i: ; preds = %bb218.i, %bb153.i
+ br i1 undef, label %bb221.i, label %bb228.i
+
+bb221.i: ; preds = %bb220.i
+ br label %bb228.i
+
+bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12
+ br i1 undef, label %bb74.i, label %bb145.i
+
+bb15: ; preds = %bb11, %bb8
+ br i1 undef, label %return, label %bb9
+
+return: ; preds = %bb15
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll
new file mode 100644
index 0000000..f520be3
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll
@@ -0,0 +1,116 @@
+; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+
+@no_mat = external global i32 ; <i32*> [#uses=1]
+@no_mis = external global i32 ; <i32*> [#uses=2]
+@"\01LC11" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1]
+@"\01LC15" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1]
+@"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1]
+
+declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
+
+declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
+
+define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
+entry:
+ br i1 undef, label %bb5, label %bb
+
+bb: ; preds = %bb, %entry
+ br label %bb
+
+bb5: ; preds = %entry
+ br i1 undef, label %bb6, label %bb8
+
+bb6: ; preds = %bb6, %bb5
+ br i1 undef, label %bb8, label %bb6
+
+bb8: ; preds = %bb6, %bb5
+ br label %bb15
+
+bb9: ; preds = %bb15
+ br i1 undef, label %bb10, label %bb11
+
+bb10: ; preds = %bb9
+ unreachable
+
+bb11: ; preds = %bb9
+ %0 = load i32* undef, align 4 ; <i32> [#uses=3]
+ %1 = add i32 %0, 1 ; <i32> [#uses=2]
+ store i32 %1, i32* undef, align 4
+ %2 = load i32* undef, align 4 ; <i32> [#uses=2]
+ %3 = sub i32 %2, %0 ; <i32> [#uses=1]
+ store i32 0, i32* @no_mat, align 4
+ store i32 0, i32* @no_mis, align 4
+ %4 = getelementptr i8* %B, i32 %0 ; <i8*> [#uses=1]
+ tail call arm_apcscc void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind
+ %5 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; <i32> [#uses=0]
+ %6 = load i32* @no_mis, align 4 ; <i32> [#uses=1]
+ %7 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; <i32> [#uses=0]
+ %8 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; <i32> [#uses=0]
+ br i1 undef, label %bb15, label %bb12
+
+bb12: ; preds = %bb11
+ br label %bb228.i
+
+bb74.i: ; preds = %bb228.i
+ br i1 undef, label %bb138.i, label %bb145.i
+
+bb138.i: ; preds = %bb74.i
+ br label %bb145.i
+
+bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i
+ br i1 undef, label %bb146.i, label %bb151.i
+
+bb146.i: ; preds = %bb145.i
+ br i1 undef, label %bb228.i, label %bb151.i
+
+bb151.i: ; preds = %bb146.i, %bb145.i
+ br i1 undef, label %bb153.i, label %bb228.i
+
+bb153.i: ; preds = %bb151.i
+ br i1 undef, label %bb220.i, label %bb.nph.i98
+
+bb.nph.i98: ; preds = %bb153.i
+ br label %bb158.i
+
+bb158.i: ; preds = %bb218.i, %bb.nph.i98
+ br i1 undef, label %bb168.i, label %bb160.i
+
+bb160.i: ; preds = %bb158.i
+ br i1 undef, label %bb161.i, label %bb168.i
+
+bb161.i: ; preds = %bb160.i
+ br i1 undef, label %bb168.i, label %bb163.i
+
+bb163.i: ; preds = %bb161.i
+ br i1 undef, label %bb167.i, label %bb168.i
+
+bb167.i: ; preds = %bb163.i
+ br label %bb168.i
+
+bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i
+ br i1 undef, label %bb211.i, label %bb218.i
+
+bb211.i: ; preds = %bb168.i
+ br label %bb218.i
+
+bb218.i: ; preds = %bb211.i, %bb168.i
+ br i1 undef, label %bb220.i, label %bb158.i
+
+bb220.i: ; preds = %bb218.i, %bb153.i
+ br i1 undef, label %bb221.i, label %bb228.i
+
+bb221.i: ; preds = %bb220.i
+ br label %bb228.i
+
+bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12
+ br i1 undef, label %bb74.i, label %bb145.i
+
+bb15: ; preds = %bb11, %bb8
+ %indvar11 = phi i32 [ 0, %bb8 ], [ %tmp13, %bb11 ] ; <i32> [#uses=2]
+ %tmp13 = add i32 %indvar11, 1 ; <i32> [#uses=2]
+ %count.0 = sub i32 undef, %indvar11 ; <i32> [#uses=0]
+ br i1 undef, label %return, label %bb9
+
+return: ; preds = %bb15
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
new file mode 100644
index 0000000..eee6ff9
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
@@ -0,0 +1,128 @@
+; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+
+@JJ = external global i32* ; <i32**> [#uses=1]
+
+define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
+entry:
+ br i1 undef, label %bb5, label %bb
+
+bb: ; preds = %bb, %entry
+ br label %bb
+
+bb5: ; preds = %entry
+ br i1 undef, label %bb6, label %bb8
+
+bb6: ; preds = %bb6, %bb5
+ br i1 undef, label %bb8, label %bb6
+
+bb8: ; preds = %bb6, %bb5
+ br label %bb15
+
+bb9: ; preds = %bb15
+ br i1 undef, label %bb10, label %bb11
+
+bb10: ; preds = %bb9
+ unreachable
+
+bb11: ; preds = %bb9
+ br i1 undef, label %bb15, label %bb12
+
+bb12: ; preds = %bb11
+ %0 = load i32** @JJ, align 4 ; <i32*> [#uses=1]
+ br label %bb228.i
+
+bb74.i: ; preds = %bb228.i
+ br i1 undef, label %bb138.i, label %bb145.i
+
+bb138.i: ; preds = %bb74.i
+ br label %bb145.i
+
+bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i
+ %cflag.0.i = phi i16 [ 0, %bb228.i ], [ 0, %bb74.i ], [ 1, %bb138.i ] ; <i16> [#uses=1]
+ br i1 undef, label %bb146.i, label %bb151.i
+
+bb146.i: ; preds = %bb145.i
+ br i1 undef, label %bb228.i, label %bb151.i
+
+bb151.i: ; preds = %bb146.i, %bb145.i
+ %.not297 = icmp ne i16 %cflag.0.i, 0 ; <i1> [#uses=1]
+ %or.cond298 = and i1 undef, %.not297 ; <i1> [#uses=1]
+ br i1 %or.cond298, label %bb153.i, label %bb228.i
+
+bb153.i: ; preds = %bb151.i
+ br i1 undef, label %bb220.i, label %bb.nph.i98
+
+bb.nph.i98: ; preds = %bb153.i
+ br label %bb158.i
+
+bb158.i: ; preds = %bb218.i, %bb.nph.i98
+ %c.1020.i = phi i32 [ 0, %bb.nph.i98 ], [ %c.14.i, %bb218.i ] ; <i32> [#uses=1]
+ %cflag.418.i = phi i16 [ 0, %bb.nph.i98 ], [ %cflag.3.i, %bb218.i ] ; <i16> [#uses=1]
+ %pj.317.i = phi i32 [ undef, %bb.nph.i98 ], [ %8, %bb218.i ] ; <i32> [#uses=1]
+ %pi.316.i = phi i32 [ undef, %bb.nph.i98 ], [ %7, %bb218.i ] ; <i32> [#uses=1]
+ %fj.515.i = phi i32 [ undef, %bb.nph.i98 ], [ %fj.4.i, %bb218.i ] ; <i32> [#uses=3]
+ %ci.910.i = phi i32 [ undef, %bb.nph.i98 ], [ %ci.12.i, %bb218.i ] ; <i32> [#uses=2]
+ %i.121.i = sub i32 undef, undef ; <i32> [#uses=3]
+ %tmp105.i = sub i32 undef, undef ; <i32> [#uses=1]
+ %1 = sub i32 %c.1020.i, undef ; <i32> [#uses=0]
+ br i1 undef, label %bb168.i, label %bb160.i
+
+bb160.i: ; preds = %bb158.i
+ br i1 undef, label %bb161.i, label %bb168.i
+
+bb161.i: ; preds = %bb160.i
+ br i1 undef, label %bb168.i, label %bb163.i
+
+bb163.i: ; preds = %bb161.i
+ %2 = icmp slt i32 %fj.515.i, undef ; <i1> [#uses=1]
+ %3 = and i1 %2, undef ; <i1> [#uses=1]
+ br i1 %3, label %bb167.i, label %bb168.i
+
+bb167.i: ; preds = %bb163.i
+ br label %bb168.i
+
+bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i
+ %fi.5.i = phi i32 [ undef, %bb167.i ], [ %ci.910.i, %bb158.i ], [ undef, %bb160.i ], [ %ci.910.i, %bb161.i ], [ undef, %bb163.i ] ; <i32> [#uses=1]
+ %fj.4.i = phi i32 [ undef, %bb167.i ], [ undef, %bb158.i ], [ %fj.515.i, %bb160.i ], [ undef, %bb161.i ], [ %fj.515.i, %bb163.i ] ; <i32> [#uses=2]
+ %scevgep88.i = getelementptr i32* null, i32 %i.121.i ; <i32*> [#uses=3]
+ %4 = load i32* %scevgep88.i, align 4 ; <i32> [#uses=2]
+ %scevgep89.i = getelementptr i32* %0, i32 %i.121.i ; <i32*> [#uses=3]
+ %5 = load i32* %scevgep89.i, align 4 ; <i32> [#uses=1]
+ %ci.10.i = select i1 undef, i32 %pi.316.i, i32 %i.121.i ; <i32> [#uses=0]
+ %cj.9.i = select i1 undef, i32 %pj.317.i, i32 undef ; <i32> [#uses=0]
+ %6 = icmp slt i32 undef, 0 ; <i1> [#uses=3]
+ %ci.12.i = select i1 %6, i32 %fi.5.i, i32 %4 ; <i32> [#uses=2]
+ %cj.11.i100 = select i1 %6, i32 %fj.4.i, i32 %5 ; <i32> [#uses=1]
+ %c.14.i = select i1 %6, i32 0, i32 undef ; <i32> [#uses=2]
+ store i32 %c.14.i, i32* undef, align 4
+ %7 = load i32* %scevgep88.i, align 4 ; <i32> [#uses=1]
+ %8 = load i32* %scevgep89.i, align 4 ; <i32> [#uses=1]
+ store i32 %ci.12.i, i32* %scevgep88.i, align 4
+ store i32 %cj.11.i100, i32* %scevgep89.i, align 4
+ store i32 %4, i32* undef, align 4
+ br i1 undef, label %bb211.i, label %bb218.i
+
+bb211.i: ; preds = %bb168.i
+ br label %bb218.i
+
+bb218.i: ; preds = %bb211.i, %bb168.i
+ %cflag.3.i = phi i16 [ %cflag.418.i, %bb168.i ], [ 1, %bb211.i ] ; <i16> [#uses=2]
+ %9 = icmp slt i32 %tmp105.i, undef ; <i1> [#uses=1]
+ br i1 %9, label %bb220.i, label %bb158.i
+
+bb220.i: ; preds = %bb218.i, %bb153.i
+ %cflag.4.lcssa.i = phi i16 [ 0, %bb153.i ], [ %cflag.3.i, %bb218.i ] ; <i16> [#uses=0]
+ br i1 undef, label %bb221.i, label %bb228.i
+
+bb221.i: ; preds = %bb220.i
+ br label %bb228.i
+
+bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12
+ br i1 undef, label %bb74.i, label %bb145.i
+
+bb15: ; preds = %bb11, %bb8
+ br i1 undef, label %return, label %bb9
+
+return: ; preds = %bb15
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll
new file mode 100644
index 0000000..93c92b1
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll
@@ -0,0 +1,128 @@
+; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+
+@r = external global i32 ; <i32*> [#uses=1]
+@qr = external global i32 ; <i32*> [#uses=1]
+@II = external global i32* ; <i32**> [#uses=1]
+@no_mis = external global i32 ; <i32*> [#uses=1]
+@name1 = external global i8* ; <i8**> [#uses=1]
+
+declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
+
+define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
+entry:
+ br i1 undef, label %bb5, label %bb
+
+bb: ; preds = %bb, %entry
+ br label %bb
+
+bb5: ; preds = %entry
+ br i1 undef, label %bb6, label %bb8
+
+bb6: ; preds = %bb6, %bb5
+ br i1 undef, label %bb8, label %bb6
+
+bb8: ; preds = %bb6, %bb5
+ %0 = load i8** @name1, align 4 ; <i8*> [#uses=0]
+ br label %bb15
+
+bb9: ; preds = %bb15
+ br i1 undef, label %bb10, label %bb11
+
+bb10: ; preds = %bb9
+ unreachable
+
+bb11: ; preds = %bb9
+ store i32 0, i32* @no_mis, align 4
+ %1 = getelementptr i8* %A, i32 0 ; <i8*> [#uses=1]
+ %2 = getelementptr i8* %B, i32 0 ; <i8*> [#uses=1]
+ tail call arm_apcscc void @diff(i8* %1, i8* %2, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
+ br i1 undef, label %bb15, label %bb12
+
+bb12: ; preds = %bb11
+ %3 = load i32** @II, align 4 ; <i32*> [#uses=1]
+ %4 = load i32* @r, align 4 ; <i32> [#uses=1]
+ %5 = load i32* @qr, align 4 ; <i32> [#uses=1]
+ br label %bb228.i
+
+bb74.i: ; preds = %bb228.i
+ br i1 undef, label %bb138.i, label %bb145.i
+
+bb138.i: ; preds = %bb74.i
+ br label %bb145.i
+
+bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i
+ br i1 undef, label %bb146.i, label %bb151.i
+
+bb146.i: ; preds = %bb145.i
+ br i1 undef, label %bb228.i, label %bb151.i
+
+bb151.i: ; preds = %bb146.i, %bb145.i
+ br i1 undef, label %bb153.i, label %bb228.i
+
+bb153.i: ; preds = %bb151.i
+ %6 = add i32 undef, -1 ; <i32> [#uses=3]
+ br i1 undef, label %bb220.i, label %bb.nph.i98
+
+bb.nph.i98: ; preds = %bb153.i
+ br label %bb158.i
+
+bb158.i: ; preds = %bb218.i, %bb.nph.i98
+ %c.1020.i = phi i32 [ 0, %bb.nph.i98 ], [ %c.14.i, %bb218.i ] ; <i32> [#uses=1]
+ %f.419.i = phi i32 [ undef, %bb.nph.i98 ], [ %f.5.i, %bb218.i ] ; <i32> [#uses=1]
+ %pi.316.i = phi i32 [ undef, %bb.nph.i98 ], [ %10, %bb218.i ] ; <i32> [#uses=1]
+ %fj.515.i = phi i32 [ %6, %bb.nph.i98 ], [ %fj.4.i, %bb218.i ] ; <i32> [#uses=2]
+ %fi.614.i = phi i32 [ undef, %bb.nph.i98 ], [ %fi.5.i, %bb218.i ] ; <i32> [#uses=3]
+ %cj.811.i = phi i32 [ %6, %bb.nph.i98 ], [ %cj.11.i100, %bb218.i ] ; <i32> [#uses=3]
+ %ci.910.i = phi i32 [ undef, %bb.nph.i98 ], [ %ci.12.i, %bb218.i ] ; <i32> [#uses=2]
+ %7 = sub i32 %f.419.i, %4 ; <i32> [#uses=5]
+ %8 = sub i32 %c.1020.i, %5 ; <i32> [#uses=2]
+ %9 = icmp slt i32 %7, %8 ; <i1> [#uses=1]
+ br i1 %9, label %bb168.i, label %bb160.i
+
+bb160.i: ; preds = %bb158.i
+ br i1 undef, label %bb161.i, label %bb168.i
+
+bb161.i: ; preds = %bb160.i
+ br i1 undef, label %bb168.i, label %bb163.i
+
+bb163.i: ; preds = %bb161.i
+ br i1 undef, label %bb167.i, label %bb168.i
+
+bb167.i: ; preds = %bb163.i
+ br label %bb168.i
+
+bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i
+ %fi.5.i = phi i32 [ %fi.614.i, %bb167.i ], [ %ci.910.i, %bb158.i ], [ %fi.614.i, %bb160.i ], [ %ci.910.i, %bb161.i ], [ %fi.614.i, %bb163.i ] ; <i32> [#uses=2]
+ %fj.4.i = phi i32 [ %cj.811.i, %bb167.i ], [ %cj.811.i, %bb158.i ], [ %fj.515.i, %bb160.i ], [ %cj.811.i, %bb161.i ], [ %fj.515.i, %bb163.i ] ; <i32> [#uses=2]
+ %f.5.i = phi i32 [ %7, %bb167.i ], [ %8, %bb158.i ], [ %7, %bb160.i ], [ %7, %bb161.i ], [ %7, %bb163.i ] ; <i32> [#uses=2]
+ %scevgep88.i = getelementptr i32* %3, i32 undef ; <i32*> [#uses=1]
+ %ci.10.i = select i1 undef, i32 %pi.316.i, i32 undef ; <i32> [#uses=0]
+ %ci.12.i = select i1 undef, i32 %fi.5.i, i32 undef ; <i32> [#uses=1]
+ %cj.11.i100 = select i1 undef, i32 %fj.4.i, i32 undef ; <i32> [#uses=1]
+ %c.14.i = select i1 undef, i32 %f.5.i, i32 undef ; <i32> [#uses=1]
+ %10 = load i32* %scevgep88.i, align 4 ; <i32> [#uses=1]
+ br i1 undef, label %bb211.i, label %bb218.i
+
+bb211.i: ; preds = %bb168.i
+ br label %bb218.i
+
+bb218.i: ; preds = %bb211.i, %bb168.i
+ br i1 undef, label %bb220.i, label %bb158.i
+
+bb220.i: ; preds = %bb218.i, %bb153.i
+ %11 = getelementptr i32* null, i32 %6 ; <i32*> [#uses=1]
+ store i32 undef, i32* %11, align 4
+ br i1 undef, label %bb221.i, label %bb228.i
+
+bb221.i: ; preds = %bb220.i
+ br label %bb228.i
+
+bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12
+ br i1 undef, label %bb74.i, label %bb145.i
+
+bb15: ; preds = %bb11, %bb8
+ br i1 undef, label %return, label %bb9
+
+return: ; preds = %bb15
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll
new file mode 100644
index 0000000..277283d
--- /dev/null
+++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll
@@ -0,0 +1,99 @@
+; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+
+@XX = external global i32* ; <i32**> [#uses=1]
+
+define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
+entry:
+ br i1 undef, label %bb5, label %bb
+
+bb: ; preds = %bb, %entry
+ br label %bb
+
+bb5: ; preds = %entry
+ br i1 undef, label %bb6, label %bb8
+
+bb6: ; preds = %bb6, %bb5
+ br i1 undef, label %bb8, label %bb6
+
+bb8: ; preds = %bb6, %bb5
+ br label %bb15
+
+bb9: ; preds = %bb15
+ br i1 undef, label %bb10, label %bb11
+
+bb10: ; preds = %bb9
+ unreachable
+
+bb11: ; preds = %bb9
+ br i1 undef, label %bb15, label %bb12
+
+bb12: ; preds = %bb11
+ %0 = load i32** @XX, align 4 ; <i32*> [#uses=0]
+ br label %bb228.i
+
+bb74.i: ; preds = %bb228.i
+ br i1 undef, label %bb138.i, label %bb145.i
+
+bb138.i: ; preds = %bb74.i
+ br label %bb145.i
+
+bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i
+ br i1 undef, label %bb146.i, label %bb151.i
+
+bb146.i: ; preds = %bb145.i
+ br i1 undef, label %bb228.i, label %bb151.i
+
+bb151.i: ; preds = %bb146.i, %bb145.i
+ br i1 undef, label %bb153.i, label %bb228.i
+
+bb153.i: ; preds = %bb151.i
+ br i1 undef, label %bb220.i, label %bb.nph.i98
+
+bb.nph.i98: ; preds = %bb153.i
+ br label %bb158.i
+
+bb158.i: ; preds = %bb218.i, %bb.nph.i98
+ %1 = sub i32 undef, undef ; <i32> [#uses=4]
+ %2 = sub i32 undef, undef ; <i32> [#uses=1]
+ br i1 undef, label %bb168.i, label %bb160.i
+
+bb160.i: ; preds = %bb158.i
+ br i1 undef, label %bb161.i, label %bb168.i
+
+bb161.i: ; preds = %bb160.i
+ br i1 undef, label %bb168.i, label %bb163.i
+
+bb163.i: ; preds = %bb161.i
+ br i1 undef, label %bb167.i, label %bb168.i
+
+bb167.i: ; preds = %bb163.i
+ br label %bb168.i
+
+bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i
+ %f.5.i = phi i32 [ %1, %bb167.i ], [ %2, %bb158.i ], [ %1, %bb160.i ], [ %1, %bb161.i ], [ %1, %bb163.i ] ; <i32> [#uses=1]
+ %c.14.i = select i1 undef, i32 %f.5.i, i32 undef ; <i32> [#uses=1]
+ store i32 %c.14.i, i32* undef, align 4
+ store i32 undef, i32* null, align 4
+ br i1 undef, label %bb211.i, label %bb218.i
+
+bb211.i: ; preds = %bb168.i
+ br label %bb218.i
+
+bb218.i: ; preds = %bb211.i, %bb168.i
+ br i1 undef, label %bb220.i, label %bb158.i
+
+bb220.i: ; preds = %bb218.i, %bb153.i
+ br i1 undef, label %bb221.i, label %bb228.i
+
+bb221.i: ; preds = %bb220.i
+ br label %bb228.i
+
+bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12
+ br i1 undef, label %bb74.i, label %bb145.i
+
+bb15: ; preds = %bb11, %bb8
+ br i1 undef, label %return, label %bb9
+
+return: ; preds = %bb15
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-07-01-CommuteBug.ll b/test/CodeGen/ARM/2009-07-01-CommuteBug.ll
new file mode 100644
index 0000000..5c0e5fa
--- /dev/null
+++ b/test/CodeGen/ARM/2009-07-01-CommuteBug.ll
@@ -0,0 +1,130 @@
+; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
+
+@qr = external global i32 ; <i32*> [#uses=1]
+@II = external global i32* ; <i32**> [#uses=1]
+@JJ = external global i32* ; <i32**> [#uses=1]
+
+define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
+entry:
+ br i1 undef, label %bb5, label %bb
+
+bb: ; preds = %bb, %entry
+ br label %bb
+
+bb5: ; preds = %entry
+ br i1 undef, label %bb6, label %bb8
+
+bb6: ; preds = %bb6, %bb5
+ br i1 undef, label %bb8, label %bb6
+
+bb8: ; preds = %bb6, %bb5
+ br label %bb15
+
+bb9: ; preds = %bb15
+ br i1 undef, label %bb10, label %bb11
+
+bb10: ; preds = %bb9
+ unreachable
+
+bb11: ; preds = %bb9
+ br i1 undef, label %bb15, label %bb12
+
+bb12: ; preds = %bb11
+ %0 = load i32** @II, align 4 ; <i32*> [#uses=1]
+ %1 = load i32** @JJ, align 4 ; <i32*> [#uses=1]
+ %2 = load i32* @qr, align 4 ; <i32> [#uses=1]
+ br label %bb228.i
+
+bb74.i: ; preds = %bb228.i
+ br i1 undef, label %bb138.i, label %bb145.i
+
+bb138.i: ; preds = %bb74.i
+ br label %bb145.i
+
+bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i
+ %cflag.0.i = phi i16 [ %cflag.1.i, %bb228.i ], [ %cflag.1.i, %bb74.i ], [ 1, %bb138.i ] ; <i16> [#uses=2]
+ br i1 undef, label %bb146.i, label %bb151.i
+
+bb146.i: ; preds = %bb145.i
+ br i1 undef, label %bb228.i, label %bb151.i
+
+bb151.i: ; preds = %bb146.i, %bb145.i
+ %.not297 = icmp ne i16 %cflag.0.i, 0 ; <i1> [#uses=1]
+ %or.cond298 = and i1 undef, %.not297 ; <i1> [#uses=1]
+ br i1 %or.cond298, label %bb153.i, label %bb228.i
+
+bb153.i: ; preds = %bb151.i
+ br i1 undef, label %bb220.i, label %bb.nph.i98
+
+bb.nph.i98: ; preds = %bb153.i
+ br label %bb158.i
+
+bb158.i: ; preds = %bb218.i, %bb.nph.i98
+ %c.1020.i = phi i32 [ 0, %bb.nph.i98 ], [ %c.14.i, %bb218.i ] ; <i32> [#uses=1]
+ %f.419.i = phi i32 [ undef, %bb.nph.i98 ], [ %f.5.i, %bb218.i ] ; <i32> [#uses=1]
+ %cflag.418.i = phi i16 [ 0, %bb.nph.i98 ], [ %cflag.3.i, %bb218.i ] ; <i16> [#uses=1]
+ %pj.317.i = phi i32 [ undef, %bb.nph.i98 ], [ %7, %bb218.i ] ; <i32> [#uses=1]
+ %pi.316.i = phi i32 [ undef, %bb.nph.i98 ], [ %6, %bb218.i ] ; <i32> [#uses=1]
+ %fj.515.i = phi i32 [ undef, %bb.nph.i98 ], [ %fj.4.i, %bb218.i ] ; <i32> [#uses=2]
+ %fi.614.i = phi i32 [ undef, %bb.nph.i98 ], [ %fi.5.i, %bb218.i ] ; <i32> [#uses=3]
+ %cj.811.i = phi i32 [ undef, %bb.nph.i98 ], [ %cj.11.i100, %bb218.i ] ; <i32> [#uses=3]
+ %ci.910.i = phi i32 [ undef, %bb.nph.i98 ], [ %ci.12.i, %bb218.i ] ; <i32> [#uses=2]
+ %3 = sub i32 %f.419.i, 0 ; <i32> [#uses=5]
+ %4 = sub i32 %c.1020.i, %2 ; <i32> [#uses=2]
+ %5 = icmp slt i32 %3, %4 ; <i1> [#uses=1]
+ br i1 %5, label %bb168.i, label %bb160.i
+
+bb160.i: ; preds = %bb158.i
+ br i1 undef, label %bb161.i, label %bb168.i
+
+bb161.i: ; preds = %bb160.i
+ br i1 undef, label %bb168.i, label %bb163.i
+
+bb163.i: ; preds = %bb161.i
+ br i1 undef, label %bb167.i, label %bb168.i
+
+bb167.i: ; preds = %bb163.i
+ br label %bb168.i
+
+bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i
+ %fi.5.i = phi i32 [ %fi.614.i, %bb167.i ], [ %ci.910.i, %bb158.i ], [ %fi.614.i, %bb160.i ], [ %ci.910.i, %bb161.i ], [ %fi.614.i, %bb163.i ] ; <i32> [#uses=2]
+ %fj.4.i = phi i32 [ %cj.811.i, %bb167.i ], [ %cj.811.i, %bb158.i ], [ %fj.515.i, %bb160.i ], [ %cj.811.i, %bb161.i ], [ %fj.515.i, %bb163.i ] ; <i32> [#uses=2]
+ %f.5.i = phi i32 [ %3, %bb167.i ], [ %4, %bb158.i ], [ %3, %bb160.i ], [ %3, %bb161.i ], [ %3, %bb163.i ] ; <i32> [#uses=2]
+ %scevgep88.i = getelementptr i32* %0, i32 undef ; <i32*> [#uses=2]
+ %scevgep89.i = getelementptr i32* %1, i32 undef ; <i32*> [#uses=2]
+ %ci.10.i = select i1 undef, i32 %pi.316.i, i32 undef ; <i32> [#uses=0]
+ %cj.9.i = select i1 undef, i32 %pj.317.i, i32 undef ; <i32> [#uses=0]
+ %ci.12.i = select i1 undef, i32 %fi.5.i, i32 undef ; <i32> [#uses=2]
+ %cj.11.i100 = select i1 undef, i32 %fj.4.i, i32 undef ; <i32> [#uses=2]
+ %c.14.i = select i1 undef, i32 %f.5.i, i32 undef ; <i32> [#uses=1]
+ %6 = load i32* %scevgep88.i, align 4 ; <i32> [#uses=1]
+ %7 = load i32* %scevgep89.i, align 4 ; <i32> [#uses=1]
+ store i32 %ci.12.i, i32* %scevgep88.i, align 4
+ store i32 %cj.11.i100, i32* %scevgep89.i, align 4
+ br i1 undef, label %bb211.i, label %bb218.i
+
+bb211.i: ; preds = %bb168.i
+ br label %bb218.i
+
+bb218.i: ; preds = %bb211.i, %bb168.i
+ %cflag.3.i = phi i16 [ %cflag.418.i, %bb168.i ], [ 1, %bb211.i ] ; <i16> [#uses=2]
+ %8 = icmp slt i32 undef, undef ; <i1> [#uses=1]
+ br i1 %8, label %bb220.i, label %bb158.i
+
+bb220.i: ; preds = %bb218.i, %bb153.i
+ %cflag.4.lcssa.i = phi i16 [ 0, %bb153.i ], [ %cflag.3.i, %bb218.i ] ; <i16> [#uses=2]
+ br i1 undef, label %bb221.i, label %bb228.i
+
+bb221.i: ; preds = %bb220.i
+ br label %bb228.i
+
+bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12
+ %cflag.1.i = phi i16 [ 0, %bb146.i ], [ %cflag.0.i, %bb151.i ], [ %cflag.4.lcssa.i, %bb220.i ], [ 1, %bb12 ], [ %cflag.4.lcssa.i, %bb221.i ] ; <i16> [#uses=2]
+ br i1 false, label %bb74.i, label %bb145.i
+
+bb15: ; preds = %bb11, %bb8
+ br i1 false, label %return, label %bb9
+
+return: ; preds = %bb15
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-07-09-asm-p-constraint.ll b/test/CodeGen/ARM/2009-07-09-asm-p-constraint.ll
new file mode 100644
index 0000000..e1e94b6
--- /dev/null
+++ b/test/CodeGen/ARM/2009-07-09-asm-p-constraint.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=arm -mattr=+v6
+
+define void @test(i8* %x) nounwind {
+entry:
+ call void asm sideeffect "pld\09${0:a}", "r,~{cc}"(i8* %x) nounwind
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-07-18-RewriterBug.ll b/test/CodeGen/ARM/2009-07-18-RewriterBug.ll
new file mode 100644
index 0000000..2b7ccd8
--- /dev/null
+++ b/test/CodeGen/ARM/2009-07-18-RewriterBug.ll
@@ -0,0 +1,1323 @@
+; RUN: llc < %s -mtriple=armv6-apple-darwin10 -mattr=+vfp2 | grep vcmpe | count 13
+
+ %struct.EDGE_PAIR = type { %struct.edge_rec*, %struct.edge_rec* }
+ %struct.VEC2 = type { double, double, double }
+ %struct.VERTEX = type { %struct.VEC2, %struct.VERTEX*, %struct.VERTEX* }
+ %struct.edge_rec = type { %struct.VERTEX*, %struct.edge_rec*, i32, i8* }
+@avail_edge = internal global %struct.edge_rec* null ; <%struct.edge_rec**> [#uses=6]
+@_2E_str7 = internal constant [21 x i8] c"ERROR: Only 1 point!\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[21 x i8]*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (void (%struct.EDGE_PAIR*, %struct.VERTEX*, %struct.VERTEX*)* @build_delaunay to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
+entry:
+ %delright = alloca %struct.EDGE_PAIR, align 8 ; <%struct.EDGE_PAIR*> [#uses=3]
+ %delleft = alloca %struct.EDGE_PAIR, align 8 ; <%struct.EDGE_PAIR*> [#uses=3]
+ %0 = icmp eq %struct.VERTEX* %tree, null ; <i1> [#uses=1]
+ br i1 %0, label %bb8, label %bb
+
+bb: ; preds = %entry
+ %1 = getelementptr %struct.VERTEX* %tree, i32 0, i32 2 ; <%struct.VERTEX**> [#uses=1]
+ %2 = load %struct.VERTEX** %1, align 4 ; <%struct.VERTEX*> [#uses=2]
+ %3 = icmp eq %struct.VERTEX* %2, null ; <i1> [#uses=1]
+ br i1 %3, label %bb7, label %bb1.i
+
+bb1.i: ; preds = %bb1.i, %bb
+ %tree_addr.0.i = phi %struct.VERTEX* [ %5, %bb1.i ], [ %tree, %bb ] ; <%struct.VERTEX*> [#uses=3]
+ %4 = getelementptr %struct.VERTEX* %tree_addr.0.i, i32 0, i32 1 ; <%struct.VERTEX**> [#uses=1]
+ %5 = load %struct.VERTEX** %4, align 4 ; <%struct.VERTEX*> [#uses=2]
+ %6 = icmp eq %struct.VERTEX* %5, null ; <i1> [#uses=1]
+ br i1 %6, label %get_low.exit, label %bb1.i
+
+get_low.exit: ; preds = %bb1.i
+ call arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
+ %7 = getelementptr %struct.VERTEX* %tree, i32 0, i32 1 ; <%struct.VERTEX**> [#uses=1]
+ %8 = load %struct.VERTEX** %7, align 4 ; <%struct.VERTEX*> [#uses=1]
+ call arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
+ %9 = getelementptr %struct.EDGE_PAIR* %delleft, i32 0, i32 0 ; <%struct.edge_rec**> [#uses=1]
+ %10 = load %struct.edge_rec** %9, align 8 ; <%struct.edge_rec*> [#uses=2]
+ %11 = getelementptr %struct.EDGE_PAIR* %delleft, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %12 = load %struct.edge_rec** %11, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %13 = getelementptr %struct.EDGE_PAIR* %delright, i32 0, i32 0 ; <%struct.edge_rec**> [#uses=1]
+ %14 = load %struct.edge_rec** %13, align 8 ; <%struct.edge_rec*> [#uses=1]
+ %15 = getelementptr %struct.EDGE_PAIR* %delright, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %16 = load %struct.edge_rec** %15, align 4 ; <%struct.edge_rec*> [#uses=2]
+ br label %bb.i
+
+bb.i: ; preds = %bb4.i, %get_low.exit
+ %rdi_addr.0.i = phi %struct.edge_rec* [ %14, %get_low.exit ], [ %72, %bb4.i ] ; <%struct.edge_rec*> [#uses=2]
+ %ldi_addr.1.i = phi %struct.edge_rec* [ %12, %get_low.exit ], [ %ldi_addr.0.i, %bb4.i ] ; <%struct.edge_rec*> [#uses=3]
+ %17 = getelementptr %struct.edge_rec* %rdi_addr.0.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %18 = load %struct.VERTEX** %17, align 4 ; <%struct.VERTEX*> [#uses=3]
+ %19 = ptrtoint %struct.edge_rec* %ldi_addr.1.i to i32 ; <i32> [#uses=1]
+ %20 = getelementptr %struct.VERTEX* %18, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %21 = load double* %20, align 4 ; <double> [#uses=3]
+ %22 = getelementptr %struct.VERTEX* %18, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %23 = load double* %22, align 4 ; <double> [#uses=3]
+ br label %bb2.i
+
+bb1.i1: ; preds = %bb2.i
+ %24 = ptrtoint %struct.edge_rec* %ldi_addr.0.i to i32 ; <i32> [#uses=2]
+ %25 = add i32 %24, 48 ; <i32> [#uses=1]
+ %26 = and i32 %25, 63 ; <i32> [#uses=1]
+ %27 = and i32 %24, -64 ; <i32> [#uses=1]
+ %28 = or i32 %26, %27 ; <i32> [#uses=1]
+ %29 = inttoptr i32 %28 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %30 = getelementptr %struct.edge_rec* %29, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %31 = load %struct.edge_rec** %30, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %32 = ptrtoint %struct.edge_rec* %31 to i32 ; <i32> [#uses=2]
+ %33 = add i32 %32, 16 ; <i32> [#uses=1]
+ %34 = and i32 %33, 63 ; <i32> [#uses=1]
+ %35 = and i32 %32, -64 ; <i32> [#uses=1]
+ %36 = or i32 %34, %35 ; <i32> [#uses=2]
+ %37 = inttoptr i32 %36 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ br label %bb2.i
+
+bb2.i: ; preds = %bb1.i1, %bb.i
+ %ldi_addr.1.pn.i = phi %struct.edge_rec* [ %ldi_addr.1.i, %bb.i ], [ %37, %bb1.i1 ] ; <%struct.edge_rec*> [#uses=1]
+ %.pn6.in.in.i = phi i32 [ %19, %bb.i ], [ %36, %bb1.i1 ] ; <i32> [#uses=1]
+ %ldi_addr.0.i = phi %struct.edge_rec* [ %ldi_addr.1.i, %bb.i ], [ %37, %bb1.i1 ] ; <%struct.edge_rec*> [#uses=4]
+ %.pn6.in.i = xor i32 %.pn6.in.in.i, 32 ; <i32> [#uses=1]
+ %.pn6.i = inttoptr i32 %.pn6.in.i to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %t1.0.in.i = getelementptr %struct.edge_rec* %ldi_addr.1.pn.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %t2.0.in.i = getelementptr %struct.edge_rec* %.pn6.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %t1.0.i = load %struct.VERTEX** %t1.0.in.i ; <%struct.VERTEX*> [#uses=2]
+ %t2.0.i = load %struct.VERTEX** %t2.0.in.i ; <%struct.VERTEX*> [#uses=2]
+ %38 = getelementptr %struct.VERTEX* %t1.0.i, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %39 = load double* %38, align 4 ; <double> [#uses=3]
+ %40 = getelementptr %struct.VERTEX* %t1.0.i, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %41 = load double* %40, align 4 ; <double> [#uses=3]
+ %42 = getelementptr %struct.VERTEX* %t2.0.i, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %43 = load double* %42, align 4 ; <double> [#uses=1]
+ %44 = getelementptr %struct.VERTEX* %t2.0.i, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %45 = load double* %44, align 4 ; <double> [#uses=1]
+ %46 = fsub double %39, %21 ; <double> [#uses=1]
+ %47 = fsub double %45, %23 ; <double> [#uses=1]
+ %48 = fmul double %46, %47 ; <double> [#uses=1]
+ %49 = fsub double %43, %21 ; <double> [#uses=1]
+ %50 = fsub double %41, %23 ; <double> [#uses=1]
+ %51 = fmul double %49, %50 ; <double> [#uses=1]
+ %52 = fsub double %48, %51 ; <double> [#uses=1]
+ %53 = fcmp ogt double %52, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %53, label %bb1.i1, label %bb3.i
+
+bb3.i: ; preds = %bb2.i
+ %54 = ptrtoint %struct.edge_rec* %rdi_addr.0.i to i32 ; <i32> [#uses=1]
+ %55 = xor i32 %54, 32 ; <i32> [#uses=3]
+ %56 = inttoptr i32 %55 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %57 = getelementptr %struct.edge_rec* %56, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %58 = load %struct.VERTEX** %57, align 4 ; <%struct.VERTEX*> [#uses=2]
+ %59 = getelementptr %struct.VERTEX* %58, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %60 = load double* %59, align 4 ; <double> [#uses=1]
+ %61 = getelementptr %struct.VERTEX* %58, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %62 = load double* %61, align 4 ; <double> [#uses=1]
+ %63 = fsub double %60, %39 ; <double> [#uses=1]
+ %64 = fsub double %23, %41 ; <double> [#uses=1]
+ %65 = fmul double %63, %64 ; <double> [#uses=1]
+ %66 = fsub double %21, %39 ; <double> [#uses=1]
+ %67 = fsub double %62, %41 ; <double> [#uses=1]
+ %68 = fmul double %66, %67 ; <double> [#uses=1]
+ %69 = fsub double %65, %68 ; <double> [#uses=1]
+ %70 = fcmp ogt double %69, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %70, label %bb4.i, label %bb5.i
+
+bb4.i: ; preds = %bb3.i
+ %71 = getelementptr %struct.edge_rec* %56, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %72 = load %struct.edge_rec** %71, align 4 ; <%struct.edge_rec*> [#uses=1]
+ br label %bb.i
+
+bb5.i: ; preds = %bb3.i
+ %73 = add i32 %55, 48 ; <i32> [#uses=1]
+ %74 = and i32 %73, 63 ; <i32> [#uses=1]
+ %75 = and i32 %55, -64 ; <i32> [#uses=1]
+ %76 = or i32 %74, %75 ; <i32> [#uses=1]
+ %77 = inttoptr i32 %76 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %78 = getelementptr %struct.edge_rec* %77, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %79 = load %struct.edge_rec** %78, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %80 = ptrtoint %struct.edge_rec* %79 to i32 ; <i32> [#uses=2]
+ %81 = add i32 %80, 16 ; <i32> [#uses=1]
+ %82 = and i32 %81, 63 ; <i32> [#uses=1]
+ %83 = and i32 %80, -64 ; <i32> [#uses=1]
+ %84 = or i32 %82, %83 ; <i32> [#uses=1]
+ %85 = inttoptr i32 %84 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %86 = getelementptr %struct.edge_rec* %ldi_addr.0.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %87 = load %struct.VERTEX** %86, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %88 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=6]
+ %89 = getelementptr %struct.edge_rec* %88, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
+ store %struct.edge_rec* %88, %struct.edge_rec** %89, align 4
+ %90 = getelementptr %struct.edge_rec* %88, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=2]
+ store %struct.VERTEX* %18, %struct.VERTEX** %90, align 4
+ %91 = ptrtoint %struct.edge_rec* %88 to i32 ; <i32> [#uses=5]
+ %92 = add i32 %91, 16 ; <i32> [#uses=2]
+ %93 = inttoptr i32 %92 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %94 = add i32 %91, 48 ; <i32> [#uses=1]
+ %95 = inttoptr i32 %94 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %96 = getelementptr %struct.edge_rec* %93, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %95, %struct.edge_rec** %96, align 4
+ %97 = add i32 %91, 32 ; <i32> [#uses=1]
+ %98 = inttoptr i32 %97 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %99 = getelementptr %struct.edge_rec* %98, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %98, %struct.edge_rec** %99, align 4
+ %100 = getelementptr %struct.edge_rec* %98, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %87, %struct.VERTEX** %100, align 4
+ %101 = getelementptr %struct.edge_rec* %95, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %93, %struct.edge_rec** %101, align 4
+ %102 = load %struct.edge_rec** %89, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %103 = ptrtoint %struct.edge_rec* %102 to i32 ; <i32> [#uses=2]
+ %104 = add i32 %103, 16 ; <i32> [#uses=1]
+ %105 = and i32 %104, 63 ; <i32> [#uses=1]
+ %106 = and i32 %103, -64 ; <i32> [#uses=1]
+ %107 = or i32 %105, %106 ; <i32> [#uses=1]
+ %108 = inttoptr i32 %107 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %109 = getelementptr %struct.edge_rec* %85, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %110 = load %struct.edge_rec** %109, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %111 = ptrtoint %struct.edge_rec* %110 to i32 ; <i32> [#uses=2]
+ %112 = add i32 %111, 16 ; <i32> [#uses=1]
+ %113 = and i32 %112, 63 ; <i32> [#uses=1]
+ %114 = and i32 %111, -64 ; <i32> [#uses=1]
+ %115 = or i32 %113, %114 ; <i32> [#uses=1]
+ %116 = inttoptr i32 %115 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %117 = getelementptr %struct.edge_rec* %116, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %118 = load %struct.edge_rec** %117, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %119 = getelementptr %struct.edge_rec* %108, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %120 = load %struct.edge_rec** %119, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %118, %struct.edge_rec** %119, align 4
+ store %struct.edge_rec* %120, %struct.edge_rec** %117, align 4
+ %121 = load %struct.edge_rec** %89, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %122 = load %struct.edge_rec** %109, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %121, %struct.edge_rec** %109, align 4
+ store %struct.edge_rec* %122, %struct.edge_rec** %89, align 4
+ %123 = xor i32 %91, 32 ; <i32> [#uses=1]
+ %124 = inttoptr i32 %123 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %125 = getelementptr %struct.edge_rec* %124, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %126 = load %struct.edge_rec** %125, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %127 = ptrtoint %struct.edge_rec* %126 to i32 ; <i32> [#uses=2]
+ %128 = add i32 %127, 16 ; <i32> [#uses=1]
+ %129 = and i32 %128, 63 ; <i32> [#uses=1]
+ %130 = and i32 %127, -64 ; <i32> [#uses=1]
+ %131 = or i32 %129, %130 ; <i32> [#uses=1]
+ %132 = inttoptr i32 %131 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %133 = getelementptr %struct.edge_rec* %ldi_addr.0.i, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %134 = load %struct.edge_rec** %133, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %135 = ptrtoint %struct.edge_rec* %134 to i32 ; <i32> [#uses=2]
+ %136 = add i32 %135, 16 ; <i32> [#uses=1]
+ %137 = and i32 %136, 63 ; <i32> [#uses=1]
+ %138 = and i32 %135, -64 ; <i32> [#uses=1]
+ %139 = or i32 %137, %138 ; <i32> [#uses=1]
+ %140 = inttoptr i32 %139 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %141 = getelementptr %struct.edge_rec* %140, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %142 = load %struct.edge_rec** %141, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %143 = getelementptr %struct.edge_rec* %132, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %144 = load %struct.edge_rec** %143, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %142, %struct.edge_rec** %143, align 4
+ store %struct.edge_rec* %144, %struct.edge_rec** %141, align 4
+ %145 = load %struct.edge_rec** %125, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %146 = load %struct.edge_rec** %133, align 4 ; <%struct.edge_rec*> [#uses=2]
+ store %struct.edge_rec* %145, %struct.edge_rec** %133, align 4
+ store %struct.edge_rec* %146, %struct.edge_rec** %125, align 4
+ %147 = and i32 %92, 63 ; <i32> [#uses=1]
+ %148 = and i32 %91, -64 ; <i32> [#uses=1]
+ %149 = or i32 %147, %148 ; <i32> [#uses=1]
+ %150 = inttoptr i32 %149 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %151 = getelementptr %struct.edge_rec* %150, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %152 = load %struct.edge_rec** %151, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %153 = ptrtoint %struct.edge_rec* %152 to i32 ; <i32> [#uses=2]
+ %154 = add i32 %153, 16 ; <i32> [#uses=1]
+ %155 = and i32 %154, 63 ; <i32> [#uses=1]
+ %156 = and i32 %153, -64 ; <i32> [#uses=1]
+ %157 = or i32 %155, %156 ; <i32> [#uses=1]
+ %158 = inttoptr i32 %157 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %159 = load %struct.VERTEX** %90, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %160 = getelementptr %struct.edge_rec* %124, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %161 = load %struct.VERTEX** %160, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %162 = getelementptr %struct.edge_rec* %16, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %163 = load %struct.VERTEX** %162, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %164 = icmp eq %struct.VERTEX* %163, %159 ; <i1> [#uses=1]
+ %rdo_addr.0.i = select i1 %164, %struct.edge_rec* %88, %struct.edge_rec* %16 ; <%struct.edge_rec*> [#uses=3]
+ %165 = getelementptr %struct.edge_rec* %10, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %166 = load %struct.VERTEX** %165, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %167 = icmp eq %struct.VERTEX* %166, %161 ; <i1> [#uses=1]
+ %ldo_addr.0.ph.i = select i1 %167, %struct.edge_rec* %124, %struct.edge_rec* %10 ; <%struct.edge_rec*> [#uses=3]
+ br label %bb9.i
+
+bb9.i: ; preds = %bb25.i, %bb24.i, %bb5.i
+ %lcand.2.i = phi %struct.edge_rec* [ %146, %bb5.i ], [ %lcand.1.i, %bb24.i ], [ %739, %bb25.i ] ; <%struct.edge_rec*> [#uses=5]
+ %rcand.2.i = phi %struct.edge_rec* [ %158, %bb5.i ], [ %666, %bb24.i ], [ %rcand.1.i, %bb25.i ] ; <%struct.edge_rec*> [#uses=5]
+ %basel.0.i = phi %struct.edge_rec* [ %88, %bb5.i ], [ %595, %bb24.i ], [ %716, %bb25.i ] ; <%struct.edge_rec*> [#uses=2]
+ %168 = getelementptr %struct.edge_rec* %lcand.2.i, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %169 = load %struct.edge_rec** %168, align 4 ; <%struct.edge_rec*> [#uses=3]
+ %170 = getelementptr %struct.edge_rec* %basel.0.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=3]
+ %171 = load %struct.VERTEX** %170, align 4 ; <%struct.VERTEX*> [#uses=4]
+ %172 = ptrtoint %struct.edge_rec* %basel.0.i to i32 ; <i32> [#uses=3]
+ %173 = xor i32 %172, 32 ; <i32> [#uses=1]
+ %174 = inttoptr i32 %173 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %175 = getelementptr %struct.edge_rec* %174, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=3]
+ %176 = load %struct.VERTEX** %175, align 4 ; <%struct.VERTEX*> [#uses=3]
+ %177 = ptrtoint %struct.edge_rec* %169 to i32 ; <i32> [#uses=1]
+ %178 = xor i32 %177, 32 ; <i32> [#uses=1]
+ %179 = inttoptr i32 %178 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %180 = getelementptr %struct.edge_rec* %179, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %181 = load %struct.VERTEX** %180, align 4 ; <%struct.VERTEX*> [#uses=2]
+ %182 = getelementptr %struct.VERTEX* %171, i32 0, i32 0, i32 0 ; <double*> [#uses=2]
+ %183 = load double* %182, align 4 ; <double> [#uses=2]
+ %184 = getelementptr %struct.VERTEX* %171, i32 0, i32 0, i32 1 ; <double*> [#uses=2]
+ %185 = load double* %184, align 4 ; <double> [#uses=2]
+ %186 = getelementptr %struct.VERTEX* %181, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %187 = load double* %186, align 4 ; <double> [#uses=1]
+ %188 = getelementptr %struct.VERTEX* %181, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %189 = load double* %188, align 4 ; <double> [#uses=1]
+ %190 = getelementptr %struct.VERTEX* %176, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %191 = load double* %190, align 4 ; <double> [#uses=2]
+ %192 = getelementptr %struct.VERTEX* %176, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %193 = load double* %192, align 4 ; <double> [#uses=2]
+ %194 = fsub double %183, %191 ; <double> [#uses=1]
+ %195 = fsub double %189, %193 ; <double> [#uses=1]
+ %196 = fmul double %194, %195 ; <double> [#uses=1]
+ %197 = fsub double %187, %191 ; <double> [#uses=1]
+ %198 = fsub double %185, %193 ; <double> [#uses=1]
+ %199 = fmul double %197, %198 ; <double> [#uses=1]
+ %200 = fsub double %196, %199 ; <double> [#uses=1]
+ %201 = fcmp ogt double %200, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %201, label %bb10.i, label %bb13.i
+
+bb10.i: ; preds = %bb9.i
+ %202 = getelementptr %struct.VERTEX* %171, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %avail_edge.promoted25 = load %struct.edge_rec** @avail_edge ; <%struct.edge_rec*> [#uses=1]
+ br label %bb12.i
+
+bb11.i: ; preds = %bb12.i
+ %203 = ptrtoint %struct.edge_rec* %lcand.0.i to i32 ; <i32> [#uses=3]
+ %204 = add i32 %203, 16 ; <i32> [#uses=1]
+ %205 = and i32 %204, 63 ; <i32> [#uses=1]
+ %206 = and i32 %203, -64 ; <i32> [#uses=3]
+ %207 = or i32 %205, %206 ; <i32> [#uses=1]
+ %208 = inttoptr i32 %207 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %209 = getelementptr %struct.edge_rec* %208, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %210 = load %struct.edge_rec** %209, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %211 = ptrtoint %struct.edge_rec* %210 to i32 ; <i32> [#uses=2]
+ %212 = add i32 %211, 16 ; <i32> [#uses=1]
+ %213 = and i32 %212, 63 ; <i32> [#uses=1]
+ %214 = and i32 %211, -64 ; <i32> [#uses=1]
+ %215 = or i32 %213, %214 ; <i32> [#uses=1]
+ %216 = inttoptr i32 %215 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %217 = getelementptr %struct.edge_rec* %lcand.0.i, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %218 = load %struct.edge_rec** %217, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %219 = ptrtoint %struct.edge_rec* %218 to i32 ; <i32> [#uses=2]
+ %220 = add i32 %219, 16 ; <i32> [#uses=1]
+ %221 = and i32 %220, 63 ; <i32> [#uses=1]
+ %222 = and i32 %219, -64 ; <i32> [#uses=1]
+ %223 = or i32 %221, %222 ; <i32> [#uses=1]
+ %224 = inttoptr i32 %223 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %225 = getelementptr %struct.edge_rec* %216, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %226 = load %struct.edge_rec** %225, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %227 = ptrtoint %struct.edge_rec* %226 to i32 ; <i32> [#uses=2]
+ %228 = add i32 %227, 16 ; <i32> [#uses=1]
+ %229 = and i32 %228, 63 ; <i32> [#uses=1]
+ %230 = and i32 %227, -64 ; <i32> [#uses=1]
+ %231 = or i32 %229, %230 ; <i32> [#uses=1]
+ %232 = inttoptr i32 %231 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %233 = getelementptr %struct.edge_rec* %232, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %234 = load %struct.edge_rec** %233, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %235 = getelementptr %struct.edge_rec* %224, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %236 = load %struct.edge_rec** %235, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %234, %struct.edge_rec** %235, align 4
+ store %struct.edge_rec* %236, %struct.edge_rec** %233, align 4
+ %237 = load %struct.edge_rec** %217, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %238 = load %struct.edge_rec** %225, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %237, %struct.edge_rec** %225, align 4
+ store %struct.edge_rec* %238, %struct.edge_rec** %217, align 4
+ %239 = xor i32 %203, 32 ; <i32> [#uses=2]
+ %240 = add i32 %239, 16 ; <i32> [#uses=1]
+ %241 = and i32 %240, 63 ; <i32> [#uses=1]
+ %242 = or i32 %241, %206 ; <i32> [#uses=1]
+ %243 = inttoptr i32 %242 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %244 = getelementptr %struct.edge_rec* %243, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %245 = load %struct.edge_rec** %244, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %246 = ptrtoint %struct.edge_rec* %245 to i32 ; <i32> [#uses=2]
+ %247 = add i32 %246, 16 ; <i32> [#uses=1]
+ %248 = and i32 %247, 63 ; <i32> [#uses=1]
+ %249 = and i32 %246, -64 ; <i32> [#uses=1]
+ %250 = or i32 %248, %249 ; <i32> [#uses=1]
+ %251 = inttoptr i32 %250 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %252 = inttoptr i32 %239 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %253 = getelementptr %struct.edge_rec* %252, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %254 = load %struct.edge_rec** %253, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %255 = ptrtoint %struct.edge_rec* %254 to i32 ; <i32> [#uses=2]
+ %256 = add i32 %255, 16 ; <i32> [#uses=1]
+ %257 = and i32 %256, 63 ; <i32> [#uses=1]
+ %258 = and i32 %255, -64 ; <i32> [#uses=1]
+ %259 = or i32 %257, %258 ; <i32> [#uses=1]
+ %260 = inttoptr i32 %259 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %261 = getelementptr %struct.edge_rec* %251, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %262 = load %struct.edge_rec** %261, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %263 = ptrtoint %struct.edge_rec* %262 to i32 ; <i32> [#uses=2]
+ %264 = add i32 %263, 16 ; <i32> [#uses=1]
+ %265 = and i32 %264, 63 ; <i32> [#uses=1]
+ %266 = and i32 %263, -64 ; <i32> [#uses=1]
+ %267 = or i32 %265, %266 ; <i32> [#uses=1]
+ %268 = inttoptr i32 %267 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %269 = getelementptr %struct.edge_rec* %268, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %270 = load %struct.edge_rec** %269, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %271 = getelementptr %struct.edge_rec* %260, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %272 = load %struct.edge_rec** %271, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %270, %struct.edge_rec** %271, align 4
+ store %struct.edge_rec* %272, %struct.edge_rec** %269, align 4
+ %273 = load %struct.edge_rec** %253, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %274 = load %struct.edge_rec** %261, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %273, %struct.edge_rec** %261, align 4
+ store %struct.edge_rec* %274, %struct.edge_rec** %253, align 4
+ %275 = inttoptr i32 %206 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %276 = getelementptr %struct.edge_rec* %275, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %avail_edge.tmp.026, %struct.edge_rec** %276, align 4
+ %277 = getelementptr %struct.edge_rec* %t.0.i, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %278 = load %struct.edge_rec** %277, align 4 ; <%struct.edge_rec*> [#uses=2]
+ %.pre.i = load double* %182, align 4 ; <double> [#uses=1]
+ %.pre22.i = load double* %184, align 4 ; <double> [#uses=1]
+ br label %bb12.i
+
+bb12.i: ; preds = %bb11.i, %bb10.i
+ %avail_edge.tmp.026 = phi %struct.edge_rec* [ %avail_edge.promoted25, %bb10.i ], [ %275, %bb11.i ] ; <%struct.edge_rec*> [#uses=2]
+ %279 = phi double [ %.pre22.i, %bb11.i ], [ %185, %bb10.i ] ; <double> [#uses=3]
+ %280 = phi double [ %.pre.i, %bb11.i ], [ %183, %bb10.i ] ; <double> [#uses=3]
+ %lcand.0.i = phi %struct.edge_rec* [ %lcand.2.i, %bb10.i ], [ %t.0.i, %bb11.i ] ; <%struct.edge_rec*> [#uses=3]
+ %t.0.i = phi %struct.edge_rec* [ %169, %bb10.i ], [ %278, %bb11.i ] ; <%struct.edge_rec*> [#uses=4]
+ %.pn5.in.in.in.i = phi %struct.edge_rec* [ %lcand.2.i, %bb10.i ], [ %t.0.i, %bb11.i ] ; <%struct.edge_rec*> [#uses=1]
+ %.pn4.in.in.in.i = phi %struct.edge_rec* [ %169, %bb10.i ], [ %278, %bb11.i ] ; <%struct.edge_rec*> [#uses=1]
+ %lcand.2.pn.i = phi %struct.edge_rec* [ %lcand.2.i, %bb10.i ], [ %t.0.i, %bb11.i ] ; <%struct.edge_rec*> [#uses=1]
+ %.pn5.in.in.i = ptrtoint %struct.edge_rec* %.pn5.in.in.in.i to i32 ; <i32> [#uses=1]
+ %.pn4.in.in.i = ptrtoint %struct.edge_rec* %.pn4.in.in.in.i to i32 ; <i32> [#uses=1]
+ %.pn5.in.i = xor i32 %.pn5.in.in.i, 32 ; <i32> [#uses=1]
+ %.pn4.in.i = xor i32 %.pn4.in.in.i, 32 ; <i32> [#uses=1]
+ %.pn5.i = inttoptr i32 %.pn5.in.i to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %.pn4.i = inttoptr i32 %.pn4.in.i to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %v1.0.in.i = getelementptr %struct.edge_rec* %.pn5.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %v2.0.in.i = getelementptr %struct.edge_rec* %.pn4.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %v3.0.in.i = getelementptr %struct.edge_rec* %lcand.2.pn.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %v1.0.i = load %struct.VERTEX** %v1.0.in.i ; <%struct.VERTEX*> [#uses=3]
+ %v2.0.i = load %struct.VERTEX** %v2.0.in.i ; <%struct.VERTEX*> [#uses=3]
+ %v3.0.i = load %struct.VERTEX** %v3.0.in.i ; <%struct.VERTEX*> [#uses=3]
+ %281 = load double* %202, align 4 ; <double> [#uses=3]
+ %282 = getelementptr %struct.VERTEX* %v1.0.i, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %283 = load double* %282, align 4 ; <double> [#uses=1]
+ %284 = fsub double %283, %280 ; <double> [#uses=2]
+ %285 = getelementptr %struct.VERTEX* %v1.0.i, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %286 = load double* %285, align 4 ; <double> [#uses=1]
+ %287 = fsub double %286, %279 ; <double> [#uses=2]
+ %288 = getelementptr %struct.VERTEX* %v1.0.i, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %289 = load double* %288, align 4 ; <double> [#uses=1]
+ %290 = getelementptr %struct.VERTEX* %v2.0.i, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %291 = load double* %290, align 4 ; <double> [#uses=1]
+ %292 = fsub double %291, %280 ; <double> [#uses=2]
+ %293 = getelementptr %struct.VERTEX* %v2.0.i, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %294 = load double* %293, align 4 ; <double> [#uses=1]
+ %295 = fsub double %294, %279 ; <double> [#uses=2]
+ %296 = getelementptr %struct.VERTEX* %v2.0.i, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %297 = load double* %296, align 4 ; <double> [#uses=1]
+ %298 = getelementptr %struct.VERTEX* %v3.0.i, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %299 = load double* %298, align 4 ; <double> [#uses=1]
+ %300 = fsub double %299, %280 ; <double> [#uses=2]
+ %301 = getelementptr %struct.VERTEX* %v3.0.i, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %302 = load double* %301, align 4 ; <double> [#uses=1]
+ %303 = fsub double %302, %279 ; <double> [#uses=2]
+ %304 = getelementptr %struct.VERTEX* %v3.0.i, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %305 = load double* %304, align 4 ; <double> [#uses=1]
+ %306 = fsub double %289, %281 ; <double> [#uses=1]
+ %307 = fmul double %292, %303 ; <double> [#uses=1]
+ %308 = fmul double %295, %300 ; <double> [#uses=1]
+ %309 = fsub double %307, %308 ; <double> [#uses=1]
+ %310 = fmul double %306, %309 ; <double> [#uses=1]
+ %311 = fsub double %297, %281 ; <double> [#uses=1]
+ %312 = fmul double %300, %287 ; <double> [#uses=1]
+ %313 = fmul double %303, %284 ; <double> [#uses=1]
+ %314 = fsub double %312, %313 ; <double> [#uses=1]
+ %315 = fmul double %311, %314 ; <double> [#uses=1]
+ %316 = fadd double %315, %310 ; <double> [#uses=1]
+ %317 = fsub double %305, %281 ; <double> [#uses=1]
+ %318 = fmul double %284, %295 ; <double> [#uses=1]
+ %319 = fmul double %287, %292 ; <double> [#uses=1]
+ %320 = fsub double %318, %319 ; <double> [#uses=1]
+ %321 = fmul double %317, %320 ; <double> [#uses=1]
+ %322 = fadd double %321, %316 ; <double> [#uses=1]
+ %323 = fcmp ogt double %322, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %323, label %bb11.i, label %bb13.loopexit.i
+
+bb13.loopexit.i: ; preds = %bb12.i
+ store %struct.edge_rec* %avail_edge.tmp.026, %struct.edge_rec** @avail_edge
+ %.pre23.i = load %struct.VERTEX** %170, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %.pre24.i = load %struct.VERTEX** %175, align 4 ; <%struct.VERTEX*> [#uses=1]
+ br label %bb13.i
+
+bb13.i: ; preds = %bb13.loopexit.i, %bb9.i
+ %324 = phi %struct.VERTEX* [ %.pre24.i, %bb13.loopexit.i ], [ %176, %bb9.i ] ; <%struct.VERTEX*> [#uses=4]
+ %325 = phi %struct.VERTEX* [ %.pre23.i, %bb13.loopexit.i ], [ %171, %bb9.i ] ; <%struct.VERTEX*> [#uses=3]
+ %lcand.1.i = phi %struct.edge_rec* [ %lcand.0.i, %bb13.loopexit.i ], [ %lcand.2.i, %bb9.i ] ; <%struct.edge_rec*> [#uses=3]
+ %326 = ptrtoint %struct.edge_rec* %rcand.2.i to i32 ; <i32> [#uses=2]
+ %327 = add i32 %326, 16 ; <i32> [#uses=1]
+ %328 = and i32 %327, 63 ; <i32> [#uses=1]
+ %329 = and i32 %326, -64 ; <i32> [#uses=1]
+ %330 = or i32 %328, %329 ; <i32> [#uses=1]
+ %331 = inttoptr i32 %330 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %332 = getelementptr %struct.edge_rec* %331, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %333 = load %struct.edge_rec** %332, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %334 = ptrtoint %struct.edge_rec* %333 to i32 ; <i32> [#uses=2]
+ %335 = add i32 %334, 16 ; <i32> [#uses=1]
+ %336 = and i32 %335, 63 ; <i32> [#uses=1]
+ %337 = and i32 %334, -64 ; <i32> [#uses=1]
+ %338 = or i32 %336, %337 ; <i32> [#uses=3]
+ %339 = xor i32 %338, 32 ; <i32> [#uses=1]
+ %340 = inttoptr i32 %339 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %341 = getelementptr %struct.edge_rec* %340, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %342 = load %struct.VERTEX** %341, align 4 ; <%struct.VERTEX*> [#uses=2]
+ %343 = getelementptr %struct.VERTEX* %325, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %344 = load double* %343, align 4 ; <double> [#uses=1]
+ %345 = getelementptr %struct.VERTEX* %325, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %346 = load double* %345, align 4 ; <double> [#uses=1]
+ %347 = getelementptr %struct.VERTEX* %342, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %348 = load double* %347, align 4 ; <double> [#uses=1]
+ %349 = getelementptr %struct.VERTEX* %342, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %350 = load double* %349, align 4 ; <double> [#uses=1]
+ %351 = getelementptr %struct.VERTEX* %324, i32 0, i32 0, i32 0 ; <double*> [#uses=2]
+ %352 = load double* %351, align 4 ; <double> [#uses=3]
+ %353 = getelementptr %struct.VERTEX* %324, i32 0, i32 0, i32 1 ; <double*> [#uses=2]
+ %354 = load double* %353, align 4 ; <double> [#uses=3]
+ %355 = fsub double %344, %352 ; <double> [#uses=1]
+ %356 = fsub double %350, %354 ; <double> [#uses=1]
+ %357 = fmul double %355, %356 ; <double> [#uses=1]
+ %358 = fsub double %348, %352 ; <double> [#uses=1]
+ %359 = fsub double %346, %354 ; <double> [#uses=1]
+ %360 = fmul double %358, %359 ; <double> [#uses=1]
+ %361 = fsub double %357, %360 ; <double> [#uses=1]
+ %362 = fcmp ogt double %361, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %362, label %bb14.i, label %bb17.i
+
+bb14.i: ; preds = %bb13.i
+ %363 = getelementptr %struct.VERTEX* %324, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %avail_edge.promoted = load %struct.edge_rec** @avail_edge ; <%struct.edge_rec*> [#uses=1]
+ br label %bb16.i
+
+bb15.i: ; preds = %bb16.i
+ %364 = ptrtoint %struct.edge_rec* %rcand.0.i to i32 ; <i32> [#uses=3]
+ %365 = add i32 %364, 16 ; <i32> [#uses=1]
+ %366 = and i32 %365, 63 ; <i32> [#uses=1]
+ %367 = and i32 %364, -64 ; <i32> [#uses=3]
+ %368 = or i32 %366, %367 ; <i32> [#uses=1]
+ %369 = inttoptr i32 %368 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %370 = getelementptr %struct.edge_rec* %369, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %371 = load %struct.edge_rec** %370, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %372 = ptrtoint %struct.edge_rec* %371 to i32 ; <i32> [#uses=2]
+ %373 = add i32 %372, 16 ; <i32> [#uses=1]
+ %374 = and i32 %373, 63 ; <i32> [#uses=1]
+ %375 = and i32 %372, -64 ; <i32> [#uses=1]
+ %376 = or i32 %374, %375 ; <i32> [#uses=1]
+ %377 = inttoptr i32 %376 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %378 = getelementptr %struct.edge_rec* %rcand.0.i, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %379 = load %struct.edge_rec** %378, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %380 = ptrtoint %struct.edge_rec* %379 to i32 ; <i32> [#uses=2]
+ %381 = add i32 %380, 16 ; <i32> [#uses=1]
+ %382 = and i32 %381, 63 ; <i32> [#uses=1]
+ %383 = and i32 %380, -64 ; <i32> [#uses=1]
+ %384 = or i32 %382, %383 ; <i32> [#uses=1]
+ %385 = inttoptr i32 %384 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %386 = getelementptr %struct.edge_rec* %377, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %387 = load %struct.edge_rec** %386, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %388 = ptrtoint %struct.edge_rec* %387 to i32 ; <i32> [#uses=2]
+ %389 = add i32 %388, 16 ; <i32> [#uses=1]
+ %390 = and i32 %389, 63 ; <i32> [#uses=1]
+ %391 = and i32 %388, -64 ; <i32> [#uses=1]
+ %392 = or i32 %390, %391 ; <i32> [#uses=1]
+ %393 = inttoptr i32 %392 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %394 = getelementptr %struct.edge_rec* %393, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %395 = load %struct.edge_rec** %394, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %396 = getelementptr %struct.edge_rec* %385, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %397 = load %struct.edge_rec** %396, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %395, %struct.edge_rec** %396, align 4
+ store %struct.edge_rec* %397, %struct.edge_rec** %394, align 4
+ %398 = load %struct.edge_rec** %378, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %399 = load %struct.edge_rec** %386, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %398, %struct.edge_rec** %386, align 4
+ store %struct.edge_rec* %399, %struct.edge_rec** %378, align 4
+ %400 = xor i32 %364, 32 ; <i32> [#uses=2]
+ %401 = add i32 %400, 16 ; <i32> [#uses=1]
+ %402 = and i32 %401, 63 ; <i32> [#uses=1]
+ %403 = or i32 %402, %367 ; <i32> [#uses=1]
+ %404 = inttoptr i32 %403 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %405 = getelementptr %struct.edge_rec* %404, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %406 = load %struct.edge_rec** %405, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %407 = ptrtoint %struct.edge_rec* %406 to i32 ; <i32> [#uses=2]
+ %408 = add i32 %407, 16 ; <i32> [#uses=1]
+ %409 = and i32 %408, 63 ; <i32> [#uses=1]
+ %410 = and i32 %407, -64 ; <i32> [#uses=1]
+ %411 = or i32 %409, %410 ; <i32> [#uses=1]
+ %412 = inttoptr i32 %411 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %413 = inttoptr i32 %400 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %414 = getelementptr %struct.edge_rec* %413, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %415 = load %struct.edge_rec** %414, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %416 = ptrtoint %struct.edge_rec* %415 to i32 ; <i32> [#uses=2]
+ %417 = add i32 %416, 16 ; <i32> [#uses=1]
+ %418 = and i32 %417, 63 ; <i32> [#uses=1]
+ %419 = and i32 %416, -64 ; <i32> [#uses=1]
+ %420 = or i32 %418, %419 ; <i32> [#uses=1]
+ %421 = inttoptr i32 %420 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %422 = getelementptr %struct.edge_rec* %412, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %423 = load %struct.edge_rec** %422, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %424 = ptrtoint %struct.edge_rec* %423 to i32 ; <i32> [#uses=2]
+ %425 = add i32 %424, 16 ; <i32> [#uses=1]
+ %426 = and i32 %425, 63 ; <i32> [#uses=1]
+ %427 = and i32 %424, -64 ; <i32> [#uses=1]
+ %428 = or i32 %426, %427 ; <i32> [#uses=1]
+ %429 = inttoptr i32 %428 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %430 = getelementptr %struct.edge_rec* %429, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %431 = load %struct.edge_rec** %430, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %432 = getelementptr %struct.edge_rec* %421, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %433 = load %struct.edge_rec** %432, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %431, %struct.edge_rec** %432, align 4
+ store %struct.edge_rec* %433, %struct.edge_rec** %430, align 4
+ %434 = load %struct.edge_rec** %414, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %435 = load %struct.edge_rec** %422, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %434, %struct.edge_rec** %422, align 4
+ store %struct.edge_rec* %435, %struct.edge_rec** %414, align 4
+ %436 = inttoptr i32 %367 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %437 = getelementptr %struct.edge_rec* %436, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %avail_edge.tmp.0, %struct.edge_rec** %437, align 4
+ %438 = add i32 %t.1.in.i, 16 ; <i32> [#uses=1]
+ %439 = and i32 %438, 63 ; <i32> [#uses=1]
+ %440 = and i32 %t.1.in.i, -64 ; <i32> [#uses=1]
+ %441 = or i32 %439, %440 ; <i32> [#uses=1]
+ %442 = inttoptr i32 %441 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %443 = getelementptr %struct.edge_rec* %442, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %444 = load %struct.edge_rec** %443, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %445 = ptrtoint %struct.edge_rec* %444 to i32 ; <i32> [#uses=2]
+ %446 = add i32 %445, 16 ; <i32> [#uses=1]
+ %447 = and i32 %446, 63 ; <i32> [#uses=1]
+ %448 = and i32 %445, -64 ; <i32> [#uses=1]
+ %449 = or i32 %447, %448 ; <i32> [#uses=2]
+ %.pre25.i = load double* %351, align 4 ; <double> [#uses=1]
+ %.pre26.i = load double* %353, align 4 ; <double> [#uses=1]
+ br label %bb16.i
+
+bb16.i: ; preds = %bb15.i, %bb14.i
+ %avail_edge.tmp.0 = phi %struct.edge_rec* [ %avail_edge.promoted, %bb14.i ], [ %436, %bb15.i ] ; <%struct.edge_rec*> [#uses=2]
+ %450 = phi double [ %.pre26.i, %bb15.i ], [ %354, %bb14.i ] ; <double> [#uses=3]
+ %451 = phi double [ %.pre25.i, %bb15.i ], [ %352, %bb14.i ] ; <double> [#uses=3]
+ %rcand.0.i = phi %struct.edge_rec* [ %rcand.2.i, %bb14.i ], [ %t.1.i, %bb15.i ] ; <%struct.edge_rec*> [#uses=3]
+ %t.1.in.i = phi i32 [ %338, %bb14.i ], [ %449, %bb15.i ] ; <i32> [#uses=3]
+ %.pn3.in.in.i = phi i32 [ %338, %bb14.i ], [ %449, %bb15.i ] ; <i32> [#uses=1]
+ %.pn.in.in.in.i = phi %struct.edge_rec* [ %rcand.2.i, %bb14.i ], [ %t.1.i, %bb15.i ] ; <%struct.edge_rec*> [#uses=1]
+ %rcand.2.pn.i = phi %struct.edge_rec* [ %rcand.2.i, %bb14.i ], [ %t.1.i, %bb15.i ] ; <%struct.edge_rec*> [#uses=1]
+ %t.1.i = inttoptr i32 %t.1.in.i to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %.pn.in.in.i = ptrtoint %struct.edge_rec* %.pn.in.in.in.i to i32 ; <i32> [#uses=1]
+ %.pn3.in.i = xor i32 %.pn3.in.in.i, 32 ; <i32> [#uses=1]
+ %.pn.in.i = xor i32 %.pn.in.in.i, 32 ; <i32> [#uses=1]
+ %.pn3.i = inttoptr i32 %.pn3.in.i to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %.pn.i = inttoptr i32 %.pn.in.i to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %v1.1.in.i = getelementptr %struct.edge_rec* %.pn3.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %v2.1.in.i = getelementptr %struct.edge_rec* %.pn.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %v3.1.in.i = getelementptr %struct.edge_rec* %rcand.2.pn.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %v1.1.i = load %struct.VERTEX** %v1.1.in.i ; <%struct.VERTEX*> [#uses=3]
+ %v2.1.i = load %struct.VERTEX** %v2.1.in.i ; <%struct.VERTEX*> [#uses=3]
+ %v3.1.i = load %struct.VERTEX** %v3.1.in.i ; <%struct.VERTEX*> [#uses=3]
+ %452 = load double* %363, align 4 ; <double> [#uses=3]
+ %453 = getelementptr %struct.VERTEX* %v1.1.i, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %454 = load double* %453, align 4 ; <double> [#uses=1]
+ %455 = fsub double %454, %451 ; <double> [#uses=2]
+ %456 = getelementptr %struct.VERTEX* %v1.1.i, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %457 = load double* %456, align 4 ; <double> [#uses=1]
+ %458 = fsub double %457, %450 ; <double> [#uses=2]
+ %459 = getelementptr %struct.VERTEX* %v1.1.i, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %460 = load double* %459, align 4 ; <double> [#uses=1]
+ %461 = getelementptr %struct.VERTEX* %v2.1.i, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %462 = load double* %461, align 4 ; <double> [#uses=1]
+ %463 = fsub double %462, %451 ; <double> [#uses=2]
+ %464 = getelementptr %struct.VERTEX* %v2.1.i, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %465 = load double* %464, align 4 ; <double> [#uses=1]
+ %466 = fsub double %465, %450 ; <double> [#uses=2]
+ %467 = getelementptr %struct.VERTEX* %v2.1.i, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %468 = load double* %467, align 4 ; <double> [#uses=1]
+ %469 = getelementptr %struct.VERTEX* %v3.1.i, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %470 = load double* %469, align 4 ; <double> [#uses=1]
+ %471 = fsub double %470, %451 ; <double> [#uses=2]
+ %472 = getelementptr %struct.VERTEX* %v3.1.i, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %473 = load double* %472, align 4 ; <double> [#uses=1]
+ %474 = fsub double %473, %450 ; <double> [#uses=2]
+ %475 = getelementptr %struct.VERTEX* %v3.1.i, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %476 = load double* %475, align 4 ; <double> [#uses=1]
+ %477 = fsub double %460, %452 ; <double> [#uses=1]
+ %478 = fmul double %463, %474 ; <double> [#uses=1]
+ %479 = fmul double %466, %471 ; <double> [#uses=1]
+ %480 = fsub double %478, %479 ; <double> [#uses=1]
+ %481 = fmul double %477, %480 ; <double> [#uses=1]
+ %482 = fsub double %468, %452 ; <double> [#uses=1]
+ %483 = fmul double %471, %458 ; <double> [#uses=1]
+ %484 = fmul double %474, %455 ; <double> [#uses=1]
+ %485 = fsub double %483, %484 ; <double> [#uses=1]
+ %486 = fmul double %482, %485 ; <double> [#uses=1]
+ %487 = fadd double %486, %481 ; <double> [#uses=1]
+ %488 = fsub double %476, %452 ; <double> [#uses=1]
+ %489 = fmul double %455, %466 ; <double> [#uses=1]
+ %490 = fmul double %458, %463 ; <double> [#uses=1]
+ %491 = fsub double %489, %490 ; <double> [#uses=1]
+ %492 = fmul double %488, %491 ; <double> [#uses=1]
+ %493 = fadd double %492, %487 ; <double> [#uses=1]
+ %494 = fcmp ogt double %493, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %494, label %bb15.i, label %bb17.loopexit.i
+
+bb17.loopexit.i: ; preds = %bb16.i
+ store %struct.edge_rec* %avail_edge.tmp.0, %struct.edge_rec** @avail_edge
+ %.pre27.i = load %struct.VERTEX** %170, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %.pre28.i = load %struct.VERTEX** %175, align 4 ; <%struct.VERTEX*> [#uses=1]
+ br label %bb17.i
+
+bb17.i: ; preds = %bb17.loopexit.i, %bb13.i
+ %495 = phi %struct.VERTEX* [ %.pre28.i, %bb17.loopexit.i ], [ %324, %bb13.i ] ; <%struct.VERTEX*> [#uses=3]
+ %496 = phi %struct.VERTEX* [ %.pre27.i, %bb17.loopexit.i ], [ %325, %bb13.i ] ; <%struct.VERTEX*> [#uses=3]
+ %rcand.1.i = phi %struct.edge_rec* [ %rcand.0.i, %bb17.loopexit.i ], [ %rcand.2.i, %bb13.i ] ; <%struct.edge_rec*> [#uses=3]
+ %497 = ptrtoint %struct.edge_rec* %lcand.1.i to i32 ; <i32> [#uses=1]
+ %498 = xor i32 %497, 32 ; <i32> [#uses=1]
+ %499 = inttoptr i32 %498 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %500 = getelementptr %struct.edge_rec* %499, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %501 = load %struct.VERTEX** %500, align 4 ; <%struct.VERTEX*> [#uses=4]
+ %502 = getelementptr %struct.VERTEX* %496, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %503 = load double* %502, align 4 ; <double> [#uses=1]
+ %504 = getelementptr %struct.VERTEX* %496, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %505 = load double* %504, align 4 ; <double> [#uses=1]
+ %506 = getelementptr %struct.VERTEX* %501, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %507 = load double* %506, align 4 ; <double> [#uses=2]
+ %508 = getelementptr %struct.VERTEX* %501, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %509 = load double* %508, align 4 ; <double> [#uses=2]
+ %510 = getelementptr %struct.VERTEX* %495, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %511 = load double* %510, align 4 ; <double> [#uses=3]
+ %512 = getelementptr %struct.VERTEX* %495, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %513 = load double* %512, align 4 ; <double> [#uses=3]
+ %514 = fsub double %503, %511 ; <double> [#uses=2]
+ %515 = fsub double %509, %513 ; <double> [#uses=1]
+ %516 = fmul double %514, %515 ; <double> [#uses=1]
+ %517 = fsub double %507, %511 ; <double> [#uses=1]
+ %518 = fsub double %505, %513 ; <double> [#uses=2]
+ %519 = fmul double %517, %518 ; <double> [#uses=1]
+ %520 = fsub double %516, %519 ; <double> [#uses=1]
+ %521 = fcmp ogt double %520, 0.000000e+00 ; <i1> [#uses=2]
+ %522 = ptrtoint %struct.edge_rec* %rcand.1.i to i32 ; <i32> [#uses=3]
+ %523 = xor i32 %522, 32 ; <i32> [#uses=1]
+ %524 = inttoptr i32 %523 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %525 = getelementptr %struct.edge_rec* %524, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %526 = load %struct.VERTEX** %525, align 4 ; <%struct.VERTEX*> [#uses=4]
+ %527 = getelementptr %struct.VERTEX* %526, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %528 = load double* %527, align 4 ; <double> [#uses=4]
+ %529 = getelementptr %struct.VERTEX* %526, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %530 = load double* %529, align 4 ; <double> [#uses=4]
+ %531 = fsub double %530, %513 ; <double> [#uses=1]
+ %532 = fmul double %514, %531 ; <double> [#uses=1]
+ %533 = fsub double %528, %511 ; <double> [#uses=1]
+ %534 = fmul double %533, %518 ; <double> [#uses=1]
+ %535 = fsub double %532, %534 ; <double> [#uses=1]
+ %536 = fcmp ogt double %535, 0.000000e+00 ; <i1> [#uses=2]
+ %537 = or i1 %536, %521 ; <i1> [#uses=1]
+ br i1 %537, label %bb21.i, label %do_merge.exit
+
+bb21.i: ; preds = %bb17.i
+ %538 = getelementptr %struct.edge_rec* %lcand.1.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %539 = load %struct.VERTEX** %538, align 4 ; <%struct.VERTEX*> [#uses=3]
+ %540 = getelementptr %struct.edge_rec* %rcand.1.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %541 = load %struct.VERTEX** %540, align 4 ; <%struct.VERTEX*> [#uses=3]
+ br i1 %521, label %bb22.i, label %bb24.i
+
+bb22.i: ; preds = %bb21.i
+ br i1 %536, label %bb23.i, label %bb25.i
+
+bb23.i: ; preds = %bb22.i
+ %542 = getelementptr %struct.VERTEX* %526, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %543 = load double* %542, align 4 ; <double> [#uses=3]
+ %544 = fsub double %507, %528 ; <double> [#uses=2]
+ %545 = fsub double %509, %530 ; <double> [#uses=2]
+ %546 = getelementptr %struct.VERTEX* %501, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %547 = load double* %546, align 4 ; <double> [#uses=1]
+ %548 = getelementptr %struct.VERTEX* %539, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %549 = load double* %548, align 4 ; <double> [#uses=1]
+ %550 = fsub double %549, %528 ; <double> [#uses=2]
+ %551 = getelementptr %struct.VERTEX* %539, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %552 = load double* %551, align 4 ; <double> [#uses=1]
+ %553 = fsub double %552, %530 ; <double> [#uses=2]
+ %554 = getelementptr %struct.VERTEX* %539, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %555 = load double* %554, align 4 ; <double> [#uses=1]
+ %556 = getelementptr %struct.VERTEX* %541, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %557 = load double* %556, align 4 ; <double> [#uses=1]
+ %558 = fsub double %557, %528 ; <double> [#uses=2]
+ %559 = getelementptr %struct.VERTEX* %541, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %560 = load double* %559, align 4 ; <double> [#uses=1]
+ %561 = fsub double %560, %530 ; <double> [#uses=2]
+ %562 = getelementptr %struct.VERTEX* %541, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %563 = load double* %562, align 4 ; <double> [#uses=1]
+ %564 = fsub double %547, %543 ; <double> [#uses=1]
+ %565 = fmul double %550, %561 ; <double> [#uses=1]
+ %566 = fmul double %553, %558 ; <double> [#uses=1]
+ %567 = fsub double %565, %566 ; <double> [#uses=1]
+ %568 = fmul double %564, %567 ; <double> [#uses=1]
+ %569 = fsub double %555, %543 ; <double> [#uses=1]
+ %570 = fmul double %558, %545 ; <double> [#uses=1]
+ %571 = fmul double %561, %544 ; <double> [#uses=1]
+ %572 = fsub double %570, %571 ; <double> [#uses=1]
+ %573 = fmul double %569, %572 ; <double> [#uses=1]
+ %574 = fadd double %573, %568 ; <double> [#uses=1]
+ %575 = fsub double %563, %543 ; <double> [#uses=1]
+ %576 = fmul double %544, %553 ; <double> [#uses=1]
+ %577 = fmul double %545, %550 ; <double> [#uses=1]
+ %578 = fsub double %576, %577 ; <double> [#uses=1]
+ %579 = fmul double %575, %578 ; <double> [#uses=1]
+ %580 = fadd double %579, %574 ; <double> [#uses=1]
+ %581 = fcmp ogt double %580, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %581, label %bb24.i, label %bb25.i
+
+bb24.i: ; preds = %bb23.i, %bb21.i
+ %582 = add i32 %522, 48 ; <i32> [#uses=1]
+ %583 = and i32 %582, 63 ; <i32> [#uses=1]
+ %584 = and i32 %522, -64 ; <i32> [#uses=1]
+ %585 = or i32 %583, %584 ; <i32> [#uses=1]
+ %586 = inttoptr i32 %585 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %587 = getelementptr %struct.edge_rec* %586, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %588 = load %struct.edge_rec** %587, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %589 = ptrtoint %struct.edge_rec* %588 to i32 ; <i32> [#uses=2]
+ %590 = add i32 %589, 16 ; <i32> [#uses=1]
+ %591 = and i32 %590, 63 ; <i32> [#uses=1]
+ %592 = and i32 %589, -64 ; <i32> [#uses=1]
+ %593 = or i32 %591, %592 ; <i32> [#uses=1]
+ %594 = inttoptr i32 %593 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %595 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
+ %596 = getelementptr %struct.edge_rec* %595, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
+ store %struct.edge_rec* %595, %struct.edge_rec** %596, align 4
+ %597 = getelementptr %struct.edge_rec* %595, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %526, %struct.VERTEX** %597, align 4
+ %598 = ptrtoint %struct.edge_rec* %595 to i32 ; <i32> [#uses=5]
+ %599 = add i32 %598, 16 ; <i32> [#uses=1]
+ %600 = inttoptr i32 %599 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %601 = add i32 %598, 48 ; <i32> [#uses=1]
+ %602 = inttoptr i32 %601 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %603 = getelementptr %struct.edge_rec* %600, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %602, %struct.edge_rec** %603, align 4
+ %604 = add i32 %598, 32 ; <i32> [#uses=1]
+ %605 = inttoptr i32 %604 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %606 = getelementptr %struct.edge_rec* %605, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %605, %struct.edge_rec** %606, align 4
+ %607 = getelementptr %struct.edge_rec* %605, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %495, %struct.VERTEX** %607, align 4
+ %608 = getelementptr %struct.edge_rec* %602, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %600, %struct.edge_rec** %608, align 4
+ %609 = load %struct.edge_rec** %596, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %610 = ptrtoint %struct.edge_rec* %609 to i32 ; <i32> [#uses=2]
+ %611 = add i32 %610, 16 ; <i32> [#uses=1]
+ %612 = and i32 %611, 63 ; <i32> [#uses=1]
+ %613 = and i32 %610, -64 ; <i32> [#uses=1]
+ %614 = or i32 %612, %613 ; <i32> [#uses=1]
+ %615 = inttoptr i32 %614 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %616 = getelementptr %struct.edge_rec* %594, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %617 = load %struct.edge_rec** %616, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %618 = ptrtoint %struct.edge_rec* %617 to i32 ; <i32> [#uses=2]
+ %619 = add i32 %618, 16 ; <i32> [#uses=1]
+ %620 = and i32 %619, 63 ; <i32> [#uses=1]
+ %621 = and i32 %618, -64 ; <i32> [#uses=1]
+ %622 = or i32 %620, %621 ; <i32> [#uses=1]
+ %623 = inttoptr i32 %622 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %624 = getelementptr %struct.edge_rec* %623, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %625 = load %struct.edge_rec** %624, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %626 = getelementptr %struct.edge_rec* %615, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %627 = load %struct.edge_rec** %626, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %625, %struct.edge_rec** %626, align 4
+ store %struct.edge_rec* %627, %struct.edge_rec** %624, align 4
+ %628 = load %struct.edge_rec** %596, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %629 = load %struct.edge_rec** %616, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %628, %struct.edge_rec** %616, align 4
+ store %struct.edge_rec* %629, %struct.edge_rec** %596, align 4
+ %630 = xor i32 %598, 32 ; <i32> [#uses=2]
+ %631 = inttoptr i32 %630 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %632 = getelementptr %struct.edge_rec* %631, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %633 = load %struct.edge_rec** %632, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %634 = ptrtoint %struct.edge_rec* %633 to i32 ; <i32> [#uses=2]
+ %635 = add i32 %634, 16 ; <i32> [#uses=1]
+ %636 = and i32 %635, 63 ; <i32> [#uses=1]
+ %637 = and i32 %634, -64 ; <i32> [#uses=1]
+ %638 = or i32 %636, %637 ; <i32> [#uses=1]
+ %639 = inttoptr i32 %638 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %640 = getelementptr %struct.edge_rec* %174, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %641 = load %struct.edge_rec** %640, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %642 = ptrtoint %struct.edge_rec* %641 to i32 ; <i32> [#uses=2]
+ %643 = add i32 %642, 16 ; <i32> [#uses=1]
+ %644 = and i32 %643, 63 ; <i32> [#uses=1]
+ %645 = and i32 %642, -64 ; <i32> [#uses=1]
+ %646 = or i32 %644, %645 ; <i32> [#uses=1]
+ %647 = inttoptr i32 %646 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %648 = getelementptr %struct.edge_rec* %647, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %649 = load %struct.edge_rec** %648, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %650 = getelementptr %struct.edge_rec* %639, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %651 = load %struct.edge_rec** %650, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %649, %struct.edge_rec** %650, align 4
+ store %struct.edge_rec* %651, %struct.edge_rec** %648, align 4
+ %652 = load %struct.edge_rec** %632, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %653 = load %struct.edge_rec** %640, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %652, %struct.edge_rec** %640, align 4
+ store %struct.edge_rec* %653, %struct.edge_rec** %632, align 4
+ %654 = add i32 %630, 48 ; <i32> [#uses=1]
+ %655 = and i32 %654, 63 ; <i32> [#uses=1]
+ %656 = and i32 %598, -64 ; <i32> [#uses=1]
+ %657 = or i32 %655, %656 ; <i32> [#uses=1]
+ %658 = inttoptr i32 %657 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %659 = getelementptr %struct.edge_rec* %658, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %660 = load %struct.edge_rec** %659, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %661 = ptrtoint %struct.edge_rec* %660 to i32 ; <i32> [#uses=2]
+ %662 = add i32 %661, 16 ; <i32> [#uses=1]
+ %663 = and i32 %662, 63 ; <i32> [#uses=1]
+ %664 = and i32 %661, -64 ; <i32> [#uses=1]
+ %665 = or i32 %663, %664 ; <i32> [#uses=1]
+ %666 = inttoptr i32 %665 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ br label %bb9.i
+
+bb25.i: ; preds = %bb23.i, %bb22.i
+ %667 = add i32 %172, 16 ; <i32> [#uses=1]
+ %668 = and i32 %667, 63 ; <i32> [#uses=1]
+ %669 = and i32 %172, -64 ; <i32> [#uses=1]
+ %670 = or i32 %668, %669 ; <i32> [#uses=1]
+ %671 = inttoptr i32 %670 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %672 = getelementptr %struct.edge_rec* %671, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %673 = load %struct.edge_rec** %672, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %674 = ptrtoint %struct.edge_rec* %673 to i32 ; <i32> [#uses=2]
+ %675 = add i32 %674, 16 ; <i32> [#uses=1]
+ %676 = and i32 %675, 63 ; <i32> [#uses=1]
+ %677 = and i32 %674, -64 ; <i32> [#uses=1]
+ %678 = or i32 %676, %677 ; <i32> [#uses=1]
+ %679 = inttoptr i32 %678 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %680 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
+ %681 = getelementptr %struct.edge_rec* %680, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=5]
+ store %struct.edge_rec* %680, %struct.edge_rec** %681, align 4
+ %682 = getelementptr %struct.edge_rec* %680, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %501, %struct.VERTEX** %682, align 4
+ %683 = ptrtoint %struct.edge_rec* %680 to i32 ; <i32> [#uses=4]
+ %684 = add i32 %683, 16 ; <i32> [#uses=1]
+ %685 = inttoptr i32 %684 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %686 = add i32 %683, 48 ; <i32> [#uses=1]
+ %687 = inttoptr i32 %686 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %688 = getelementptr %struct.edge_rec* %685, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %687, %struct.edge_rec** %688, align 4
+ %689 = add i32 %683, 32 ; <i32> [#uses=1]
+ %690 = inttoptr i32 %689 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %691 = getelementptr %struct.edge_rec* %690, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %690, %struct.edge_rec** %691, align 4
+ %692 = getelementptr %struct.edge_rec* %690, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %496, %struct.VERTEX** %692, align 4
+ %693 = getelementptr %struct.edge_rec* %687, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %685, %struct.edge_rec** %693, align 4
+ %694 = load %struct.edge_rec** %681, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %695 = ptrtoint %struct.edge_rec* %694 to i32 ; <i32> [#uses=2]
+ %696 = add i32 %695, 16 ; <i32> [#uses=1]
+ %697 = and i32 %696, 63 ; <i32> [#uses=1]
+ %698 = and i32 %695, -64 ; <i32> [#uses=1]
+ %699 = or i32 %697, %698 ; <i32> [#uses=1]
+ %700 = inttoptr i32 %699 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %701 = getelementptr %struct.edge_rec* %499, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %702 = load %struct.edge_rec** %701, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %703 = ptrtoint %struct.edge_rec* %702 to i32 ; <i32> [#uses=2]
+ %704 = add i32 %703, 16 ; <i32> [#uses=1]
+ %705 = and i32 %704, 63 ; <i32> [#uses=1]
+ %706 = and i32 %703, -64 ; <i32> [#uses=1]
+ %707 = or i32 %705, %706 ; <i32> [#uses=1]
+ %708 = inttoptr i32 %707 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %709 = getelementptr %struct.edge_rec* %708, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %710 = load %struct.edge_rec** %709, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %711 = getelementptr %struct.edge_rec* %700, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %712 = load %struct.edge_rec** %711, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %710, %struct.edge_rec** %711, align 4
+ store %struct.edge_rec* %712, %struct.edge_rec** %709, align 4
+ %713 = load %struct.edge_rec** %681, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %714 = load %struct.edge_rec** %701, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %713, %struct.edge_rec** %701, align 4
+ store %struct.edge_rec* %714, %struct.edge_rec** %681, align 4
+ %715 = xor i32 %683, 32 ; <i32> [#uses=1]
+ %716 = inttoptr i32 %715 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %717 = getelementptr %struct.edge_rec* %716, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %718 = load %struct.edge_rec** %717, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %719 = ptrtoint %struct.edge_rec* %718 to i32 ; <i32> [#uses=2]
+ %720 = add i32 %719, 16 ; <i32> [#uses=1]
+ %721 = and i32 %720, 63 ; <i32> [#uses=1]
+ %722 = and i32 %719, -64 ; <i32> [#uses=1]
+ %723 = or i32 %721, %722 ; <i32> [#uses=1]
+ %724 = inttoptr i32 %723 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %725 = getelementptr %struct.edge_rec* %679, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %726 = load %struct.edge_rec** %725, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %727 = ptrtoint %struct.edge_rec* %726 to i32 ; <i32> [#uses=2]
+ %728 = add i32 %727, 16 ; <i32> [#uses=1]
+ %729 = and i32 %728, 63 ; <i32> [#uses=1]
+ %730 = and i32 %727, -64 ; <i32> [#uses=1]
+ %731 = or i32 %729, %730 ; <i32> [#uses=1]
+ %732 = inttoptr i32 %731 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %733 = getelementptr %struct.edge_rec* %732, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %734 = load %struct.edge_rec** %733, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %735 = getelementptr %struct.edge_rec* %724, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %736 = load %struct.edge_rec** %735, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %734, %struct.edge_rec** %735, align 4
+ store %struct.edge_rec* %736, %struct.edge_rec** %733, align 4
+ %737 = load %struct.edge_rec** %717, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %738 = load %struct.edge_rec** %725, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %737, %struct.edge_rec** %725, align 4
+ store %struct.edge_rec* %738, %struct.edge_rec** %717, align 4
+ %739 = load %struct.edge_rec** %681, align 4 ; <%struct.edge_rec*> [#uses=1]
+ br label %bb9.i
+
+do_merge.exit: ; preds = %bb17.i
+ %740 = getelementptr %struct.edge_rec* %ldo_addr.0.ph.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %741 = load %struct.VERTEX** %740, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %742 = icmp eq %struct.VERTEX* %741, %tree_addr.0.i ; <i1> [#uses=1]
+ br i1 %742, label %bb5.loopexit, label %bb2
+
+bb2: ; preds = %bb2, %do_merge.exit
+ %ldo.07 = phi %struct.edge_rec* [ %747, %bb2 ], [ %ldo_addr.0.ph.i, %do_merge.exit ] ; <%struct.edge_rec*> [#uses=1]
+ %743 = ptrtoint %struct.edge_rec* %ldo.07 to i32 ; <i32> [#uses=1]
+ %744 = xor i32 %743, 32 ; <i32> [#uses=1]
+ %745 = inttoptr i32 %744 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %746 = getelementptr %struct.edge_rec* %745, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %747 = load %struct.edge_rec** %746, align 4 ; <%struct.edge_rec*> [#uses=3]
+ %748 = getelementptr %struct.edge_rec* %747, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %749 = load %struct.VERTEX** %748, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %750 = icmp eq %struct.VERTEX* %749, %tree_addr.0.i ; <i1> [#uses=1]
+ br i1 %750, label %bb5.loopexit, label %bb2
+
+bb4: ; preds = %bb5.loopexit, %bb4
+ %rdo.05 = phi %struct.edge_rec* [ %755, %bb4 ], [ %rdo_addr.0.i, %bb5.loopexit ] ; <%struct.edge_rec*> [#uses=1]
+ %751 = getelementptr %struct.edge_rec* %rdo.05, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %752 = load %struct.edge_rec** %751, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %753 = ptrtoint %struct.edge_rec* %752 to i32 ; <i32> [#uses=1]
+ %754 = xor i32 %753, 32 ; <i32> [#uses=1]
+ %755 = inttoptr i32 %754 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %756 = getelementptr %struct.edge_rec* %755, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %757 = load %struct.VERTEX** %756, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %758 = icmp eq %struct.VERTEX* %757, %extra ; <i1> [#uses=1]
+ br i1 %758, label %bb6, label %bb4
+
+bb5.loopexit: ; preds = %bb2, %do_merge.exit
+ %ldo.0.lcssa = phi %struct.edge_rec* [ %ldo_addr.0.ph.i, %do_merge.exit ], [ %747, %bb2 ] ; <%struct.edge_rec*> [#uses=1]
+ %759 = getelementptr %struct.edge_rec* %rdo_addr.0.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %760 = load %struct.VERTEX** %759, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %761 = icmp eq %struct.VERTEX* %760, %extra ; <i1> [#uses=1]
+ br i1 %761, label %bb6, label %bb4
+
+bb6: ; preds = %bb5.loopexit, %bb4
+ %rdo.0.lcssa = phi %struct.edge_rec* [ %rdo_addr.0.i, %bb5.loopexit ], [ %755, %bb4 ] ; <%struct.edge_rec*> [#uses=1]
+ %tmp16 = ptrtoint %struct.edge_rec* %ldo.0.lcssa to i32 ; <i32> [#uses=1]
+ %tmp4 = ptrtoint %struct.edge_rec* %rdo.0.lcssa to i32 ; <i32> [#uses=1]
+ br label %bb15
+
+bb7: ; preds = %bb
+ %762 = getelementptr %struct.VERTEX* %tree, i32 0, i32 1 ; <%struct.VERTEX**> [#uses=1]
+ %763 = load %struct.VERTEX** %762, align 4 ; <%struct.VERTEX*> [#uses=4]
+ %764 = icmp eq %struct.VERTEX* %763, null ; <i1> [#uses=1]
+ %765 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
+ %766 = getelementptr %struct.edge_rec* %765, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
+ store %struct.edge_rec* %765, %struct.edge_rec** %766, align 4
+ %767 = getelementptr %struct.edge_rec* %765, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=3]
+ br i1 %764, label %bb10, label %bb11
+
+bb8: ; preds = %entry
+ %768 = call arm_apcscc i32 @puts(i8* getelementptr ([21 x i8]* @_2E_str7, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ call arm_apcscc void @exit(i32 -1) noreturn nounwind
+ unreachable
+
+bb10: ; preds = %bb7
+ store %struct.VERTEX* %tree, %struct.VERTEX** %767, align 4
+ %769 = ptrtoint %struct.edge_rec* %765 to i32 ; <i32> [#uses=5]
+ %770 = add i32 %769, 16 ; <i32> [#uses=1]
+ %771 = inttoptr i32 %770 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %772 = add i32 %769, 48 ; <i32> [#uses=1]
+ %773 = inttoptr i32 %772 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %774 = getelementptr %struct.edge_rec* %771, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %773, %struct.edge_rec** %774, align 4
+ %775 = add i32 %769, 32 ; <i32> [#uses=1]
+ %776 = inttoptr i32 %775 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %777 = getelementptr %struct.edge_rec* %776, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %776, %struct.edge_rec** %777, align 4
+ %778 = getelementptr %struct.edge_rec* %776, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %extra, %struct.VERTEX** %778, align 4
+ %779 = getelementptr %struct.edge_rec* %773, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %771, %struct.edge_rec** %779, align 4
+ %780 = xor i32 %769, 32 ; <i32> [#uses=1]
+ br label %bb15
+
+bb11: ; preds = %bb7
+ store %struct.VERTEX* %763, %struct.VERTEX** %767, align 4
+ %781 = ptrtoint %struct.edge_rec* %765 to i32 ; <i32> [#uses=6]
+ %782 = add i32 %781, 16 ; <i32> [#uses=1]
+ %783 = inttoptr i32 %782 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %784 = add i32 %781, 48 ; <i32> [#uses=1]
+ %785 = inttoptr i32 %784 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %786 = getelementptr %struct.edge_rec* %783, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %785, %struct.edge_rec** %786, align 4
+ %787 = add i32 %781, 32 ; <i32> [#uses=1]
+ %788 = inttoptr i32 %787 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %789 = getelementptr %struct.edge_rec* %788, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %788, %struct.edge_rec** %789, align 4
+ %790 = getelementptr %struct.edge_rec* %788, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %tree, %struct.VERTEX** %790, align 4
+ %791 = getelementptr %struct.edge_rec* %785, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %783, %struct.edge_rec** %791, align 4
+ %792 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
+ %793 = getelementptr %struct.edge_rec* %792, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
+ store %struct.edge_rec* %792, %struct.edge_rec** %793, align 4
+ %794 = getelementptr %struct.edge_rec* %792, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %tree, %struct.VERTEX** %794, align 4
+ %795 = ptrtoint %struct.edge_rec* %792 to i32 ; <i32> [#uses=5]
+ %796 = add i32 %795, 16 ; <i32> [#uses=1]
+ %797 = inttoptr i32 %796 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %798 = add i32 %795, 48 ; <i32> [#uses=2]
+ %799 = inttoptr i32 %798 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %800 = getelementptr %struct.edge_rec* %797, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %799, %struct.edge_rec** %800, align 4
+ %801 = add i32 %795, 32 ; <i32> [#uses=1]
+ %802 = inttoptr i32 %801 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %803 = getelementptr %struct.edge_rec* %802, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %802, %struct.edge_rec** %803, align 4
+ %804 = getelementptr %struct.edge_rec* %802, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %extra, %struct.VERTEX** %804, align 4
+ %805 = getelementptr %struct.edge_rec* %799, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %797, %struct.edge_rec** %805, align 4
+ %806 = xor i32 %781, 32 ; <i32> [#uses=1]
+ %807 = inttoptr i32 %806 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %808 = getelementptr %struct.edge_rec* %807, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %809 = load %struct.edge_rec** %808, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %810 = ptrtoint %struct.edge_rec* %809 to i32 ; <i32> [#uses=2]
+ %811 = add i32 %810, 16 ; <i32> [#uses=1]
+ %812 = and i32 %811, 63 ; <i32> [#uses=1]
+ %813 = and i32 %810, -64 ; <i32> [#uses=1]
+ %814 = or i32 %812, %813 ; <i32> [#uses=1]
+ %815 = inttoptr i32 %814 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %816 = load %struct.edge_rec** %793, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %817 = ptrtoint %struct.edge_rec* %816 to i32 ; <i32> [#uses=2]
+ %818 = add i32 %817, 16 ; <i32> [#uses=1]
+ %819 = and i32 %818, 63 ; <i32> [#uses=1]
+ %820 = and i32 %817, -64 ; <i32> [#uses=1]
+ %821 = or i32 %819, %820 ; <i32> [#uses=1]
+ %822 = inttoptr i32 %821 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %823 = getelementptr %struct.edge_rec* %822, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %824 = load %struct.edge_rec** %823, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %825 = getelementptr %struct.edge_rec* %815, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %826 = load %struct.edge_rec** %825, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %824, %struct.edge_rec** %825, align 4
+ store %struct.edge_rec* %826, %struct.edge_rec** %823, align 4
+ %827 = load %struct.edge_rec** %808, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %828 = load %struct.edge_rec** %793, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %827, %struct.edge_rec** %793, align 4
+ store %struct.edge_rec* %828, %struct.edge_rec** %808, align 4
+ %829 = xor i32 %795, 32 ; <i32> [#uses=3]
+ %830 = inttoptr i32 %829 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %831 = getelementptr %struct.edge_rec* %830, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ %832 = load %struct.VERTEX** %831, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %833 = and i32 %798, 63 ; <i32> [#uses=1]
+ %834 = and i32 %795, -64 ; <i32> [#uses=1]
+ %835 = or i32 %833, %834 ; <i32> [#uses=1]
+ %836 = inttoptr i32 %835 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %837 = getelementptr %struct.edge_rec* %836, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %838 = load %struct.edge_rec** %837, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %839 = ptrtoint %struct.edge_rec* %838 to i32 ; <i32> [#uses=2]
+ %840 = add i32 %839, 16 ; <i32> [#uses=1]
+ %841 = and i32 %840, 63 ; <i32> [#uses=1]
+ %842 = and i32 %839, -64 ; <i32> [#uses=1]
+ %843 = or i32 %841, %842 ; <i32> [#uses=1]
+ %844 = inttoptr i32 %843 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %845 = load %struct.VERTEX** %767, align 4 ; <%struct.VERTEX*> [#uses=1]
+ %846 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
+ %847 = getelementptr %struct.edge_rec* %846, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=7]
+ store %struct.edge_rec* %846, %struct.edge_rec** %847, align 4
+ %848 = getelementptr %struct.edge_rec* %846, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %832, %struct.VERTEX** %848, align 4
+ %849 = ptrtoint %struct.edge_rec* %846 to i32 ; <i32> [#uses=6]
+ %850 = add i32 %849, 16 ; <i32> [#uses=2]
+ %851 = inttoptr i32 %850 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %852 = add i32 %849, 48 ; <i32> [#uses=1]
+ %853 = inttoptr i32 %852 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %854 = getelementptr %struct.edge_rec* %851, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %853, %struct.edge_rec** %854, align 4
+ %855 = add i32 %849, 32 ; <i32> [#uses=1]
+ %856 = inttoptr i32 %855 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=3]
+ %857 = getelementptr %struct.edge_rec* %856, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %856, %struct.edge_rec** %857, align 4
+ %858 = getelementptr %struct.edge_rec* %856, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
+ store %struct.VERTEX* %845, %struct.VERTEX** %858, align 4
+ %859 = getelementptr %struct.edge_rec* %853, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %851, %struct.edge_rec** %859, align 4
+ %860 = load %struct.edge_rec** %847, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %861 = ptrtoint %struct.edge_rec* %860 to i32 ; <i32> [#uses=2]
+ %862 = add i32 %861, 16 ; <i32> [#uses=1]
+ %863 = and i32 %862, 63 ; <i32> [#uses=1]
+ %864 = and i32 %861, -64 ; <i32> [#uses=1]
+ %865 = or i32 %863, %864 ; <i32> [#uses=1]
+ %866 = inttoptr i32 %865 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %867 = getelementptr %struct.edge_rec* %844, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %868 = load %struct.edge_rec** %867, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %869 = ptrtoint %struct.edge_rec* %868 to i32 ; <i32> [#uses=2]
+ %870 = add i32 %869, 16 ; <i32> [#uses=1]
+ %871 = and i32 %870, 63 ; <i32> [#uses=1]
+ %872 = and i32 %869, -64 ; <i32> [#uses=1]
+ %873 = or i32 %871, %872 ; <i32> [#uses=1]
+ %874 = inttoptr i32 %873 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %875 = getelementptr %struct.edge_rec* %874, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %876 = load %struct.edge_rec** %875, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %877 = getelementptr %struct.edge_rec* %866, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %878 = load %struct.edge_rec** %877, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %876, %struct.edge_rec** %877, align 4
+ store %struct.edge_rec* %878, %struct.edge_rec** %875, align 4
+ %879 = load %struct.edge_rec** %847, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %880 = load %struct.edge_rec** %867, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %879, %struct.edge_rec** %867, align 4
+ store %struct.edge_rec* %880, %struct.edge_rec** %847, align 4
+ %881 = xor i32 %849, 32 ; <i32> [#uses=3]
+ %882 = inttoptr i32 %881 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %883 = getelementptr %struct.edge_rec* %882, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=6]
+ %884 = load %struct.edge_rec** %883, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %885 = ptrtoint %struct.edge_rec* %884 to i32 ; <i32> [#uses=2]
+ %886 = add i32 %885, 16 ; <i32> [#uses=1]
+ %887 = and i32 %886, 63 ; <i32> [#uses=1]
+ %888 = and i32 %885, -64 ; <i32> [#uses=1]
+ %889 = or i32 %887, %888 ; <i32> [#uses=1]
+ %890 = inttoptr i32 %889 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %891 = load %struct.edge_rec** %766, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %892 = ptrtoint %struct.edge_rec* %891 to i32 ; <i32> [#uses=2]
+ %893 = add i32 %892, 16 ; <i32> [#uses=1]
+ %894 = and i32 %893, 63 ; <i32> [#uses=1]
+ %895 = and i32 %892, -64 ; <i32> [#uses=1]
+ %896 = or i32 %894, %895 ; <i32> [#uses=1]
+ %897 = inttoptr i32 %896 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %898 = getelementptr %struct.edge_rec* %897, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %899 = load %struct.edge_rec** %898, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %900 = getelementptr %struct.edge_rec* %890, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %901 = load %struct.edge_rec** %900, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %899, %struct.edge_rec** %900, align 4
+ store %struct.edge_rec* %901, %struct.edge_rec** %898, align 4
+ %902 = load %struct.edge_rec** %883, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %903 = load %struct.edge_rec** %766, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %902, %struct.edge_rec** %766, align 4
+ store %struct.edge_rec* %903, %struct.edge_rec** %883, align 4
+ %904 = getelementptr %struct.VERTEX* %763, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %905 = load double* %904, align 4 ; <double> [#uses=2]
+ %906 = getelementptr %struct.VERTEX* %763, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %907 = load double* %906, align 4 ; <double> [#uses=2]
+ %908 = getelementptr %struct.VERTEX* %extra, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %909 = load double* %908, align 4 ; <double> [#uses=3]
+ %910 = getelementptr %struct.VERTEX* %extra, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %911 = load double* %910, align 4 ; <double> [#uses=3]
+ %912 = getelementptr %struct.VERTEX* %tree, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %913 = load double* %912, align 4 ; <double> [#uses=3]
+ %914 = getelementptr %struct.VERTEX* %tree, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %915 = load double* %914, align 4 ; <double> [#uses=3]
+ %916 = fsub double %905, %913 ; <double> [#uses=1]
+ %917 = fsub double %911, %915 ; <double> [#uses=1]
+ %918 = fmul double %916, %917 ; <double> [#uses=1]
+ %919 = fsub double %909, %913 ; <double> [#uses=1]
+ %920 = fsub double %907, %915 ; <double> [#uses=1]
+ %921 = fmul double %919, %920 ; <double> [#uses=1]
+ %922 = fsub double %918, %921 ; <double> [#uses=1]
+ %923 = fcmp ogt double %922, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %923, label %bb15, label %bb13
+
+bb13: ; preds = %bb11
+ %924 = fsub double %905, %909 ; <double> [#uses=1]
+ %925 = fsub double %915, %911 ; <double> [#uses=1]
+ %926 = fmul double %924, %925 ; <double> [#uses=1]
+ %927 = fsub double %913, %909 ; <double> [#uses=1]
+ %928 = fsub double %907, %911 ; <double> [#uses=1]
+ %929 = fmul double %927, %928 ; <double> [#uses=1]
+ %930 = fsub double %926, %929 ; <double> [#uses=1]
+ %931 = fcmp ogt double %930, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %931, label %bb15, label %bb14
+
+bb14: ; preds = %bb13
+ %932 = and i32 %850, 63 ; <i32> [#uses=1]
+ %933 = and i32 %849, -64 ; <i32> [#uses=3]
+ %934 = or i32 %932, %933 ; <i32> [#uses=1]
+ %935 = inttoptr i32 %934 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %936 = getelementptr %struct.edge_rec* %935, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %937 = load %struct.edge_rec** %936, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %938 = ptrtoint %struct.edge_rec* %937 to i32 ; <i32> [#uses=2]
+ %939 = add i32 %938, 16 ; <i32> [#uses=1]
+ %940 = and i32 %939, 63 ; <i32> [#uses=1]
+ %941 = and i32 %938, -64 ; <i32> [#uses=1]
+ %942 = or i32 %940, %941 ; <i32> [#uses=1]
+ %943 = inttoptr i32 %942 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %944 = load %struct.edge_rec** %847, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %945 = ptrtoint %struct.edge_rec* %944 to i32 ; <i32> [#uses=2]
+ %946 = add i32 %945, 16 ; <i32> [#uses=1]
+ %947 = and i32 %946, 63 ; <i32> [#uses=1]
+ %948 = and i32 %945, -64 ; <i32> [#uses=1]
+ %949 = or i32 %947, %948 ; <i32> [#uses=1]
+ %950 = inttoptr i32 %949 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %951 = getelementptr %struct.edge_rec* %943, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %952 = load %struct.edge_rec** %951, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %953 = ptrtoint %struct.edge_rec* %952 to i32 ; <i32> [#uses=2]
+ %954 = add i32 %953, 16 ; <i32> [#uses=1]
+ %955 = and i32 %954, 63 ; <i32> [#uses=1]
+ %956 = and i32 %953, -64 ; <i32> [#uses=1]
+ %957 = or i32 %955, %956 ; <i32> [#uses=1]
+ %958 = inttoptr i32 %957 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %959 = getelementptr %struct.edge_rec* %958, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %960 = load %struct.edge_rec** %959, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %961 = getelementptr %struct.edge_rec* %950, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %962 = load %struct.edge_rec** %961, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %960, %struct.edge_rec** %961, align 4
+ store %struct.edge_rec* %962, %struct.edge_rec** %959, align 4
+ %963 = load %struct.edge_rec** %847, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %964 = load %struct.edge_rec** %951, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %963, %struct.edge_rec** %951, align 4
+ store %struct.edge_rec* %964, %struct.edge_rec** %847, align 4
+ %965 = add i32 %881, 16 ; <i32> [#uses=1]
+ %966 = and i32 %965, 63 ; <i32> [#uses=1]
+ %967 = or i32 %966, %933 ; <i32> [#uses=1]
+ %968 = inttoptr i32 %967 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %969 = getelementptr %struct.edge_rec* %968, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ %970 = load %struct.edge_rec** %969, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %971 = ptrtoint %struct.edge_rec* %970 to i32 ; <i32> [#uses=2]
+ %972 = add i32 %971, 16 ; <i32> [#uses=1]
+ %973 = and i32 %972, 63 ; <i32> [#uses=1]
+ %974 = and i32 %971, -64 ; <i32> [#uses=1]
+ %975 = or i32 %973, %974 ; <i32> [#uses=1]
+ %976 = inttoptr i32 %975 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %977 = load %struct.edge_rec** %883, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %978 = ptrtoint %struct.edge_rec* %977 to i32 ; <i32> [#uses=2]
+ %979 = add i32 %978, 16 ; <i32> [#uses=1]
+ %980 = and i32 %979, 63 ; <i32> [#uses=1]
+ %981 = and i32 %978, -64 ; <i32> [#uses=1]
+ %982 = or i32 %980, %981 ; <i32> [#uses=1]
+ %983 = inttoptr i32 %982 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %984 = getelementptr %struct.edge_rec* %976, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=3]
+ %985 = load %struct.edge_rec** %984, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %986 = ptrtoint %struct.edge_rec* %985 to i32 ; <i32> [#uses=2]
+ %987 = add i32 %986, 16 ; <i32> [#uses=1]
+ %988 = and i32 %987, 63 ; <i32> [#uses=1]
+ %989 = and i32 %986, -64 ; <i32> [#uses=1]
+ %990 = or i32 %988, %989 ; <i32> [#uses=1]
+ %991 = inttoptr i32 %990 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
+ %992 = getelementptr %struct.edge_rec* %991, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %993 = load %struct.edge_rec** %992, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %994 = getelementptr %struct.edge_rec* %983, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=2]
+ %995 = load %struct.edge_rec** %994, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %993, %struct.edge_rec** %994, align 4
+ store %struct.edge_rec* %995, %struct.edge_rec** %992, align 4
+ %996 = load %struct.edge_rec** %883, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %997 = load %struct.edge_rec** %984, align 4 ; <%struct.edge_rec*> [#uses=1]
+ store %struct.edge_rec* %996, %struct.edge_rec** %984, align 4
+ store %struct.edge_rec* %997, %struct.edge_rec** %883, align 4
+ %998 = inttoptr i32 %933 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=2]
+ %999 = load %struct.edge_rec** @avail_edge, align 4 ; <%struct.edge_rec*> [#uses=1]
+ %1000 = getelementptr %struct.edge_rec* %998, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
+ store %struct.edge_rec* %999, %struct.edge_rec** %1000, align 4
+ store %struct.edge_rec* %998, %struct.edge_rec** @avail_edge, align 4
+ br label %bb15
+
+bb15: ; preds = %bb14, %bb13, %bb11, %bb10, %bb6
+ %retval.1.0 = phi i32 [ %780, %bb10 ], [ %829, %bb13 ], [ %829, %bb14 ], [ %tmp4, %bb6 ], [ %849, %bb11 ] ; <i32> [#uses=1]
+ %retval.0.0 = phi i32 [ %769, %bb10 ], [ %781, %bb13 ], [ %781, %bb14 ], [ %tmp16, %bb6 ], [ %881, %bb11 ] ; <i32> [#uses=1]
+ %agg.result162 = bitcast %struct.EDGE_PAIR* %agg.result to i64* ; <i64*> [#uses=1]
+ %1001 = zext i32 %retval.0.0 to i64 ; <i64> [#uses=1]
+ %1002 = zext i32 %retval.1.0 to i64 ; <i64> [#uses=1]
+ %1003 = shl i64 %1002, 32 ; <i64> [#uses=1]
+ %1004 = or i64 %1003, %1001 ; <i64> [#uses=1]
+ store i64 %1004, i64* %agg.result162, align 4
+ ret void
+}
+
+declare arm_apcscc i32 @puts(i8* nocapture) nounwind
+
+declare arm_apcscc void @exit(i32) noreturn nounwind
+
+declare arm_apcscc %struct.edge_rec* @alloc_edge() nounwind
diff --git a/test/CodeGen/ARM/2009-07-22-ScavengerAssert.ll b/test/CodeGen/ARM/2009-07-22-ScavengerAssert.ll
new file mode 100644
index 0000000..b4b989b
--- /dev/null
+++ b/test/CodeGen/ARM/2009-07-22-ScavengerAssert.ll
@@ -0,0 +1,94 @@
+; RUN: llc < %s -mtriple=armv6-apple-darwin10
+
+ %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
+ %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }
+ %struct.cli_ac_patt = type { i16*, i16*, i16, i16, i8, i32, i32, i8*, i8*, i32, i16, i16, i16, i16, %struct.cli_ac_alt**, i8, i16, %struct.cli_ac_patt*, %struct.cli_ac_patt* }
+ %struct.cli_bm_patt = type { i8*, i8*, i16, i16, i8*, i8*, i8, %struct.cli_bm_patt*, i16 }
+ %struct.cli_matcher = type { i16, i8, i8*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
+
+declare arm_apcscc i32 @strlen(i8* nocapture) nounwind readonly
+
+define arm_apcscc i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
+entry:
+ br i1 undef, label %bb126, label %bb1
+
+bb1: ; preds = %entry
+ br i1 undef, label %cli_calloc.exit.thread, label %cli_calloc.exit
+
+cli_calloc.exit.thread: ; preds = %bb1
+ ret i32 -114
+
+cli_calloc.exit: ; preds = %bb1
+ store i16 %parts, i16* undef, align 4
+ br i1 undef, label %bb52, label %bb4
+
+bb4: ; preds = %cli_calloc.exit
+ br i1 undef, label %bb.i, label %bb1.i3
+
+bb.i: ; preds = %bb4
+ unreachable
+
+bb1.i3: ; preds = %bb4
+ br i1 undef, label %bb2.i4, label %cli_strdup.exit
+
+bb2.i4: ; preds = %bb1.i3
+ ret i32 -114
+
+cli_strdup.exit: ; preds = %bb1.i3
+ br i1 undef, label %cli_calloc.exit54.thread, label %cli_calloc.exit54
+
+cli_calloc.exit54.thread: ; preds = %cli_strdup.exit
+ ret i32 -114
+
+cli_calloc.exit54: ; preds = %cli_strdup.exit
+ br label %bb45
+
+cli_calloc.exit70.thread: ; preds = %bb45
+ unreachable
+
+cli_calloc.exit70: ; preds = %bb45
+ br i1 undef, label %bb.i83, label %bb1.i84
+
+bb.i83: ; preds = %cli_calloc.exit70
+ unreachable
+
+bb1.i84: ; preds = %cli_calloc.exit70
+ br i1 undef, label %bb2.i85, label %bb17
+
+bb2.i85: ; preds = %bb1.i84
+ unreachable
+
+bb17: ; preds = %bb1.i84
+ br i1 undef, label %bb22, label %bb.nph
+
+bb.nph: ; preds = %bb17
+ br label %bb18
+
+bb18: ; preds = %bb18, %bb.nph
+ br i1 undef, label %bb18, label %bb22
+
+bb22: ; preds = %bb18, %bb17
+ br i1 undef, label %bb25, label %bb43.preheader
+
+bb43.preheader: ; preds = %bb22
+ br i1 undef, label %bb28, label %bb45
+
+bb25: ; preds = %bb22
+ unreachable
+
+bb28: ; preds = %bb43.preheader
+ unreachable
+
+bb45: ; preds = %bb43.preheader, %cli_calloc.exit54
+ br i1 undef, label %cli_calloc.exit70.thread, label %cli_calloc.exit70
+
+bb52: ; preds = %cli_calloc.exit
+ %0 = load i16* undef, align 4 ; <i16> [#uses=1]
+ %1 = icmp eq i16 %0, 0 ; <i1> [#uses=1]
+ %iftmp.20.0 = select i1 %1, i8* %hexsig, i8* null ; <i8*> [#uses=1]
+ %2 = tail call arm_apcscc i32 @strlen(i8* %iftmp.20.0) nounwind readonly ; <i32> [#uses=0]
+ unreachable
+
+bb126: ; preds = %entry
+ ret i32 -117
+}
diff --git a/test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll b/test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll
new file mode 100644
index 0000000..24f4990
--- /dev/null
+++ b/test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll
@@ -0,0 +1,95 @@
+; RUN: llc < %s -march=arm
+
+ %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
+ %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }
+ %struct.cli_ac_patt = type { i16*, i16*, i16, i16, i8, i32, i32, i8*, i8*, i32, i16, i16, i16, i16, %struct.cli_ac_alt**, i8, i16, %struct.cli_ac_patt*, %struct.cli_ac_patt* }
+ %struct.cli_bm_patt = type { i8*, i8*, i16, i16, i8*, i8*, i8, %struct.cli_bm_patt*, i16 }
+ %struct.cli_matcher = type { i16, i8, i8*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
+
+define arm_apcscc i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
+entry:
+ br i1 undef, label %bb126, label %bb1
+
+bb1: ; preds = %entry
+ br i1 undef, label %cli_calloc.exit.thread, label %cli_calloc.exit
+
+cli_calloc.exit.thread: ; preds = %bb1
+ ret i32 -114
+
+cli_calloc.exit: ; preds = %bb1
+ br i1 undef, label %bb52, label %bb4
+
+bb4: ; preds = %cli_calloc.exit
+ br i1 undef, label %bb.i, label %bb1.i3
+
+bb.i: ; preds = %bb4
+ unreachable
+
+bb1.i3: ; preds = %bb4
+ br i1 undef, label %bb2.i4, label %cli_strdup.exit
+
+bb2.i4: ; preds = %bb1.i3
+ ret i32 -114
+
+cli_strdup.exit: ; preds = %bb1.i3
+ br i1 undef, label %cli_calloc.exit54.thread, label %cli_calloc.exit54
+
+cli_calloc.exit54.thread: ; preds = %cli_strdup.exit
+ ret i32 -114
+
+cli_calloc.exit54: ; preds = %cli_strdup.exit
+ br label %bb45
+
+cli_calloc.exit70.thread: ; preds = %bb45
+ unreachable
+
+cli_calloc.exit70: ; preds = %bb45
+ br i1 undef, label %bb.i83, label %bb1.i84
+
+bb.i83: ; preds = %cli_calloc.exit70
+ unreachable
+
+bb1.i84: ; preds = %cli_calloc.exit70
+ br i1 undef, label %bb2.i85, label %bb17
+
+bb2.i85: ; preds = %bb1.i84
+ unreachable
+
+bb17: ; preds = %bb1.i84
+ br i1 undef, label %bb22, label %bb.nph
+
+bb.nph: ; preds = %bb17
+ br label %bb18
+
+bb18: ; preds = %bb18, %bb.nph
+ br i1 undef, label %bb18, label %bb22
+
+bb22: ; preds = %bb18, %bb17
+ %0 = getelementptr i8* null, i32 10 ; <i8*> [#uses=1]
+ %1 = bitcast i8* %0 to i16* ; <i16*> [#uses=1]
+ %2 = load i16* %1, align 2 ; <i16> [#uses=1]
+ %3 = add i16 %2, 1 ; <i16> [#uses=1]
+ %4 = zext i16 %3 to i32 ; <i32> [#uses=1]
+ %5 = mul i32 %4, 3 ; <i32> [#uses=1]
+ %6 = add i32 %5, -1 ; <i32> [#uses=1]
+ %7 = icmp eq i32 %6, undef ; <i1> [#uses=1]
+ br i1 %7, label %bb25, label %bb43.preheader
+
+bb43.preheader: ; preds = %bb22
+ br i1 undef, label %bb28, label %bb45
+
+bb25: ; preds = %bb22
+ unreachable
+
+bb28: ; preds = %bb43.preheader
+ unreachable
+
+bb45: ; preds = %bb43.preheader, %cli_calloc.exit54
+ br i1 undef, label %cli_calloc.exit70.thread, label %cli_calloc.exit70
+
+bb52: ; preds = %cli_calloc.exit
+ unreachable
+
+bb126: ; preds = %entry
+ ret i32 -117
+}
diff --git a/test/CodeGen/ARM/2009-07-29-VFP3Registers.ll b/test/CodeGen/ARM/2009-07-29-VFP3Registers.ll
new file mode 100644
index 0000000..e1d19d1
--- /dev/null
+++ b/test/CodeGen/ARM/2009-07-29-VFP3Registers.ll
@@ -0,0 +1,108 @@
+; RUN: llc < %s -mtriple=armv7-apple-darwin10 -mattr=+vfp3
+
+@a = external global double ; <double*> [#uses=1]
+
+declare double @llvm.exp.f64(double) nounwind readonly
+
+define arm_apcscc void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ br i1 undef, label %bb28, label %bb
+
+bb28: ; preds = %bb
+ %0 = load double* @a, align 4 ; <double> [#uses=2]
+ %1 = fadd double %0, undef ; <double> [#uses=2]
+ br i1 undef, label %bb59, label %bb60
+
+bb59: ; preds = %bb28
+ %2 = fsub double -0.000000e+00, undef ; <double> [#uses=2]
+ br label %bb61
+
+bb60: ; preds = %bb28
+ %3 = tail call double @llvm.exp.f64(double undef) nounwind ; <double> [#uses=1]
+ %4 = fsub double -0.000000e+00, %3 ; <double> [#uses=2]
+ %5 = fsub double -0.000000e+00, undef ; <double> [#uses=1]
+ %6 = fsub double -0.000000e+00, undef ; <double> [#uses=1]
+ br label %bb61
+
+bb61: ; preds = %bb60, %bb59
+ %.pn201 = phi double [ undef, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn111 = phi double [ undef, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn452 = phi double [ undef, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn85 = phi double [ undef, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn238 = phi double [ 0.000000e+00, %bb59 ], [ 0.000000e+00, %bb60 ] ; <double> [#uses=1]
+ %.pn39 = phi double [ undef, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn230 = phi double [ undef, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn228 = phi double [ 0.000000e+00, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn224 = phi double [ undef, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn222 = phi double [ 0.000000e+00, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn218 = phi double [ %2, %bb59 ], [ %4, %bb60 ] ; <double> [#uses=1]
+ %.pn214 = phi double [ 0.000000e+00, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn212 = phi double [ %2, %bb59 ], [ %4, %bb60 ] ; <double> [#uses=1]
+ %.pn213 = phi double [ undef, %bb59 ], [ undef, %bb60 ] ; <double> [#uses=1]
+ %.pn210 = phi double [ undef, %bb59 ], [ %5, %bb60 ] ; <double> [#uses=1]
+ %.pn202 = phi double [ undef, %bb59 ], [ %6, %bb60 ] ; <double> [#uses=0]
+ %.pn390 = fdiv double %.pn452, undef ; <double> [#uses=0]
+ %.pn145 = fdiv double %.pn238, %1 ; <double> [#uses=0]
+ %.pn138 = fdiv double %.pn230, undef ; <double> [#uses=1]
+ %.pn139 = fdiv double %.pn228, undef ; <double> [#uses=1]
+ %.pn134 = fdiv double %.pn224, %0 ; <double> [#uses=1]
+ %.pn135 = fdiv double %.pn222, %1 ; <double> [#uses=1]
+ %.pn133 = fdiv double %.pn218, undef ; <double> [#uses=0]
+ %.pn128 = fdiv double %.pn214, undef ; <double> [#uses=1]
+ %.pn129 = fdiv double %.pn212, %.pn213 ; <double> [#uses=1]
+ %.pn126 = fdiv double %.pn210, undef ; <double> [#uses=0]
+ %.pn54.in = fmul double undef, %.pn201 ; <double> [#uses=1]
+ %.pn42.in = fmul double undef, undef ; <double> [#uses=1]
+ %.pn76 = fsub double %.pn138, %.pn139 ; <double> [#uses=1]
+ %.pn74 = fsub double %.pn134, %.pn135 ; <double> [#uses=1]
+ %.pn70 = fsub double %.pn128, %.pn129 ; <double> [#uses=1]
+ %.pn54 = fdiv double %.pn54.in, 6.000000e+00 ; <double> [#uses=1]
+ %.pn64 = fmul double undef, 0x3FE5555555555555 ; <double> [#uses=1]
+ %.pn65 = fmul double undef, undef ; <double> [#uses=1]
+ %.pn50 = fmul double undef, %.pn111 ; <double> [#uses=0]
+ %.pn42 = fdiv double %.pn42.in, 6.000000e+00 ; <double> [#uses=1]
+ %.pn40 = fmul double undef, %.pn85 ; <double> [#uses=0]
+ %.pn56 = fadd double %.pn76, undef ; <double> [#uses=1]
+ %.pn57 = fmul double %.pn74, undef ; <double> [#uses=1]
+ %.pn36 = fadd double undef, undef ; <double> [#uses=1]
+ %.pn37 = fmul double %.pn70, undef ; <double> [#uses=1]
+ %.pn33 = fmul double undef, 0x3FC5555555555555 ; <double> [#uses=1]
+ %.pn29 = fsub double %.pn64, %.pn65 ; <double> [#uses=1]
+ %.pn21 = fadd double undef, undef ; <double> [#uses=1]
+ %.pn27 = fmul double undef, 0x3FC5555555555555 ; <double> [#uses=1]
+ %.pn11 = fadd double %.pn56, %.pn57 ; <double> [#uses=1]
+ %.pn32 = fmul double %.pn54, undef ; <double> [#uses=1]
+ %.pn26 = fmul double %.pn42, undef ; <double> [#uses=1]
+ %.pn15 = fmul double 0.000000e+00, %.pn39 ; <double> [#uses=1]
+ %.pn7 = fadd double %.pn36, %.pn37 ; <double> [#uses=1]
+ %.pn30 = fsub double %.pn32, %.pn33 ; <double> [#uses=1]
+ %.pn28 = fadd double %.pn30, 0.000000e+00 ; <double> [#uses=1]
+ %.pn24 = fsub double %.pn28, %.pn29 ; <double> [#uses=1]
+ %.pn22 = fsub double %.pn26, %.pn27 ; <double> [#uses=1]
+ %.pn20 = fadd double %.pn24, undef ; <double> [#uses=1]
+ %.pn18 = fadd double %.pn22, 0.000000e+00 ; <double> [#uses=1]
+ %.pn16 = fsub double %.pn20, %.pn21 ; <double> [#uses=1]
+ %.pn14 = fsub double %.pn18, undef ; <double> [#uses=1]
+ %.pn12 = fadd double %.pn16, undef ; <double> [#uses=1]
+ %.pn10 = fadd double %.pn14, %.pn15 ; <double> [#uses=1]
+ %.pn8 = fsub double %.pn12, undef ; <double> [#uses=1]
+ %.pn6 = fsub double %.pn10, %.pn11 ; <double> [#uses=1]
+ %.pn4 = fadd double %.pn8, undef ; <double> [#uses=1]
+ %.pn2 = fadd double %.pn6, %.pn7 ; <double> [#uses=1]
+ %N1.0 = fsub double %.pn4, undef ; <double> [#uses=1]
+ %D1.0 = fsub double %.pn2, undef ; <double> [#uses=2]
+ br i1 undef, label %bb62, label %bb64
+
+bb62: ; preds = %bb61
+ %7 = fadd double %D1.0, undef ; <double> [#uses=1]
+ br label %bb64
+
+bb64: ; preds = %bb62, %bb61
+ %.pn = phi double [ undef, %bb62 ], [ %N1.0, %bb61 ] ; <double> [#uses=1]
+ %.pn1 = phi double [ %7, %bb62 ], [ %D1.0, %bb61 ] ; <double> [#uses=1]
+ %x.1 = fdiv double %.pn, %.pn1 ; <double> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll b/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
new file mode 100644
index 0000000..2d4e58d
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=arm -mattr=+neon
+; PR4657
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-apple-darwin9"
+
+define arm_apcscc <4 x i32> @scale(<4 x i32> %v, i32 %f) nounwind {
+entry:
+ %v_addr = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
+ %f_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
+ %0 = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store <4 x i32> %v, <4 x i32>* %v_addr
+ store i32 %f, i32* %f_addr
+ %1 = load <4 x i32>* %v_addr, align 16 ; <<4 x i32>> [#uses=1]
+ %2 = load i32* %f_addr, align 4 ; <i32> [#uses=1]
+ %3 = insertelement <4 x i32> undef, i32 %2, i32 0 ; <<4 x i32>> [#uses=1]
+ %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>> [#uses=1]
+ %5 = mul <4 x i32> %1, %4 ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %5, <4 x i32>* %0, align 16
+ %6 = load <4 x i32>* %0, align 16 ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %6, <4 x i32>* %retval, align 16
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load <4 x i32>* %retval ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %retval1
+}
diff --git a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll
new file mode 100644
index 0000000..65ffed2
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -mtriple=armv6-elf
+; PR4528
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv6-elf"
+
+define arm_aapcscc i32 @file_read_actor(i32* nocapture %desc, i32* %page, i32 %offset, i32 %size) nounwind optsize {
+entry:
+ br i1 undef, label %fault_in_pages_writeable.exit, label %bb5.i
+
+bb5.i: ; preds = %entry
+ %asmtmp.i = tail call i32 asm sideeffect "1:\09strbt\09$1,[$2]\0A2:\0A\09.section .fixup,\22ax\22\0A\09.align\092\0A3:\09mov\09$0, $3\0A\09b\092b\0A\09.previous\0A\09.section __ex_table,\22a\22\0A\09.align\093\0A\09.long\091b, 3b\0A\09.previous", "=r,r,r,i,0,~{cc}"(i8 0, i32 undef, i32 -14, i32 0) nounwind ; <i32> [#uses=1]
+ %0 = icmp eq i32 %asmtmp.i, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb6.i, label %fault_in_pages_writeable.exit
+
+bb6.i: ; preds = %bb5.i
+ br i1 undef, label %fault_in_pages_writeable.exit, label %bb7.i
+
+bb7.i: ; preds = %bb6.i
+ unreachable
+
+fault_in_pages_writeable.exit: ; preds = %bb6.i, %bb5.i, %entry
+ br i1 undef, label %bb2, label %bb3
+
+bb2: ; preds = %fault_in_pages_writeable.exit
+ unreachable
+
+bb3: ; preds = %fault_in_pages_writeable.exit
+ %1 = tail call arm_aapcscc i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind ; <i32> [#uses=0]
+ unreachable
+}
+
+declare arm_aapcscc i32 @__copy_to_user(i8*, i8*, i32)
diff --git a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll
new file mode 100644
index 0000000..9e5372a
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mtriple=armv6-elf
+; PR4528
+
+define arm_aapcscc i32 @file_read_actor(i32 %desc, i32 %page, i32 %offset, i32 %size) nounwind optsize {
+entry:
+ br i1 undef, label %fault_in_pages_writeable.exit, label %bb5.i
+
+bb5.i: ; preds = %entry
+ %asmtmp.i = tail call i32 asm sideeffect "1:\09strbt\09$1,[$2]\0A2:\0A\09.section .fixup,\22ax\22\0A\09.align\092\0A3:\09mov\09$0, $3\0A\09b\092b\0A\09.previous\0A\09.section __ex_table,\22a\22\0A\09.align\093\0A\09.long\091b, 3b\0A\09.previous", "=r,r,r,i,0,~{cc}"(i8 0, i32 undef, i32 -14, i32 0) nounwind ; <i32> [#uses=1]
+ br label %fault_in_pages_writeable.exit
+
+fault_in_pages_writeable.exit: ; preds = %bb5.i, %entry
+ %0 = phi i32 [ 0, %entry ], [ %asmtmp.i, %bb5.i ] ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb2, label %bb3
+
+bb2: ; preds = %fault_in_pages_writeable.exit
+ unreachable
+
+bb3: ; preds = %fault_in_pages_writeable.exit
+ %2 = tail call arm_aapcscc i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind ; <i32> [#uses=0]
+ unreachable
+}
+
+declare arm_aapcscc i32 @__copy_to_user(i8*, i8*, i32)
diff --git a/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll b/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll
new file mode 100644
index 0000000..18d68f7
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=arm
+; PR4528
+
+; Inline asm is allowed to contain operands "=&r", "0".
+
+%struct.device_dma_parameters = type { i32, i32 }
+%struct.iovec = type { i8*, i32 }
+
+define arm_aapcscc i32 @generic_segment_checks(%struct.iovec* nocapture %iov, i32* nocapture %nr_segs, i32* nocapture %count, i32 %access_flags) nounwind optsize {
+entry:
+ br label %bb8
+
+bb: ; preds = %bb8
+ br i1 undef, label %bb10, label %bb2
+
+bb2: ; preds = %bb
+ %asmtmp = tail call %struct.device_dma_parameters asm "adds $1, $2, $3; sbcccs $1, $1, $0; movcc $0, #0", "=&r,=&r,r,Ir,0,~{cc}"(i8* undef, i32 undef, i32 0) nounwind; <%struct.device_dma_parameters> [#uses=1]
+ %asmresult = extractvalue %struct.device_dma_parameters %asmtmp, 0; <i32> [#uses=1]
+ %0 = icmp eq i32 %asmresult, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb7, label %bb4
+
+bb4: ; preds = %bb2
+ br i1 undef, label %bb10, label %bb9
+
+bb7: ; preds = %bb2
+ %1 = add i32 %2, 1 ; <i32> [#uses=1]
+ br label %bb8
+
+bb8: ; preds = %bb7, %entry
+ %2 = phi i32 [ 0, %entry ], [ %1, %bb7 ] ; <i32> [#uses=3]
+ %scevgep22 = getelementptr %struct.iovec* %iov, i32 %2, i32 0; <i8**> [#uses=0]
+ %3 = load i32* %nr_segs, align 4 ; <i32> [#uses=1]
+ %4 = icmp ult i32 %2, %3 ; <i1> [#uses=1]
+ br i1 %4, label %bb, label %bb9
+
+bb9: ; preds = %bb8, %bb4
+ store i32 undef, i32* %count, align 4
+ ret i32 0
+
+bb10: ; preds = %bb4, %bb
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll
new file mode 100644
index 0000000..a46482c
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=arm
+; PR4716
+
+define arm_aapcscc void @_start() nounwind naked {
+entry:
+ tail call arm_aapcscc void @exit(i32 undef) noreturn nounwind
+ unreachable
+}
+
+declare arm_aapcscc void @exit(i32) noreturn nounwind
diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill.ll
new file mode 100644
index 0000000..84915c4
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-21-PostRAKill.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 -post-RA-scheduler -mcpu=cortex-a8
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-apple-darwin9"
+
+%struct.tree = type { i32, double, double, %struct.tree*, %struct.tree*, %struct.tree*, %struct.tree* }
+@g = common global %struct.tree* null
+
+define arm_apcscc %struct.tree* @tsp(%struct.tree* %t, i32 %nproc) nounwind {
+entry:
+ %t.idx51.val.i = load double* null ; <double> [#uses=1]
+ br i1 undef, label %bb4.i, label %bb.i
+
+bb.i: ; preds = %entry
+ unreachable
+
+bb4.i: ; preds = %entry
+ %0 = load %struct.tree** @g, align 4 ; <%struct.tree*> [#uses=2]
+ %.idx45.i = getelementptr %struct.tree* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ %.idx45.val.i = load double* %.idx45.i ; <double> [#uses=1]
+ %.idx46.i = getelementptr %struct.tree* %0, i32 0, i32 2 ; <double*> [#uses=1]
+ %.idx46.val.i = load double* %.idx46.i ; <double> [#uses=1]
+ %1 = fsub double 0.000000e+00, %.idx45.val.i ; <double> [#uses=2]
+ %2 = fmul double %1, %1 ; <double> [#uses=1]
+ %3 = fsub double %t.idx51.val.i, %.idx46.val.i ; <double> [#uses=2]
+ %4 = fmul double %3, %3 ; <double> [#uses=1]
+ %5 = fadd double %2, %4 ; <double> [#uses=1]
+ %6 = tail call double @llvm.sqrt.f64(double %5) nounwind ; <double> [#uses=1]
+ br i1 undef, label %bb7.i4, label %bb6.i
+
+bb6.i: ; preds = %bb4.i
+ br label %bb7.i4
+
+bb7.i4: ; preds = %bb6.i, %bb4.i
+ %tton1.0.i = phi double [ %6, %bb6.i ], [ undef, %bb4.i ] ; <double> [#uses=0]
+ unreachable
+}
+
+declare double @llvm.sqrt.f64(double) nounwind readonly
diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll
new file mode 100644
index 0000000..a21ffc3
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -post-RA-scheduler
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-apple-darwin9"
+
+%struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] }
+%struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* }
+%struct.icstruct = type { [3 x i32], i16 }
+%struct.node = type { i16, double, [3 x double], i32, i32 }
+
+declare arm_apcscc double @floor(double) nounwind readnone
+
+define void @intcoord(%struct.icstruct* noalias nocapture sret %agg.result, i1 %a, double %b) {
+entry:
+ br i1 %a, label %bb3, label %bb1
+
+bb1: ; preds = %entry
+ unreachable
+
+bb3: ; preds = %entry
+ br i1 %a, label %bb7, label %bb5
+
+bb5: ; preds = %bb3
+ unreachable
+
+bb7: ; preds = %bb3
+ br i1 %a, label %bb11, label %bb9
+
+bb9: ; preds = %bb7
+ %0 = tail call arm_apcscc double @floor(double %b) nounwind readnone ; <double> [#uses=0]
+ br label %bb11
+
+bb11: ; preds = %bb9, %bb7
+ %1 = getelementptr %struct.icstruct* %agg.result, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %1
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll
new file mode 100644
index 0000000..e3d8ea60
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -post-RA-scheduler
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-apple-darwin9"
+
+%struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
+%struct.List = type { %struct.List*, %struct.Patient*, %struct.List* }
+%struct.Patient = type { i32, i32, i32, %struct.Village* }
+%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
+
+define arm_apcscc %struct.Village* @alloc_tree(i32 %level, i32 %label, %struct.Village* %back, i1 %p) nounwind {
+entry:
+ br i1 %p, label %bb8, label %bb1
+
+bb1: ; preds = %entry
+ %0 = malloc %struct.Village ; <%struct.Village*> [#uses=3]
+ %exp2 = call double @ldexp(double 1.000000e+00, i32 %level) nounwind ; <double> [#uses=1]
+ %.c = fptosi double %exp2 to i32 ; <i32> [#uses=1]
+ store i32 %.c, i32* null
+ %1 = getelementptr %struct.Village* %0, i32 0, i32 3, i32 6, i32 0 ; <%struct.List**> [#uses=1]
+ store %struct.List* null, %struct.List** %1
+ %2 = getelementptr %struct.Village* %0, i32 0, i32 3, i32 6, i32 2 ; <%struct.List**> [#uses=1]
+ store %struct.List* null, %struct.List** %2
+ ret %struct.Village* %0
+
+bb8: ; preds = %entry
+ ret %struct.Village* null
+}
+
+declare double @ldexp(double, i32)
diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll
new file mode 100644
index 0000000..9123377
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -post-RA-scheduler
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-apple-darwin9"
+
[email protected] = external constant [36 x i8], align 1 ; <[36 x i8]*> [#uses=0]
[email protected] = external constant [31 x i8], align 1 ; <[31 x i8]*> [#uses=1]
[email protected] = external constant [4 x i8], align 1 ; <[4 x i8]*> [#uses=1]
+
+declare arm_apcscc i32 @getUnknown(i32, ...) nounwind
+
+declare void @llvm.va_start(i8*) nounwind
+
+declare void @llvm.va_end(i8*) nounwind
+
+declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
+
+define arm_apcscc i32 @main() nounwind {
+entry:
+ %0 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 1, i32 1, i32 1, i32 1, i32 1, i32 1) nounwind ; <i32> [#uses=0]
+ %1 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 -128, i32 116, i32 116, i32 -3852, i32 -31232, i32 -1708916736) nounwind ; <i32> [#uses=0]
+ %2 = tail call arm_apcscc i32 (i32, ...)* @getUnknown(i32 undef, i32 116, i32 116, i32 -3852, i32 -31232, i32 30556, i32 -1708916736) nounwind ; <i32> [#uses=1]
+ %3 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @.str2, i32 0, i32 0), i32 %2) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/2009-08-23-linkerprivate.ll b/test/CodeGen/ARM/2009-08-23-linkerprivate.ll
new file mode 100644
index 0000000..0fad533
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-23-linkerprivate.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | FileCheck %s
+
+; ModuleID = '/Volumes/MacOS9/tests/WebKit/JavaScriptCore/profiler/ProfilerServer.mm'
+
+@"\01l_objc_msgSend_fixup_alloc" = linker_private hidden global i32 0, section "__DATA, __objc_msgrefs, coalesced", align 16 ; <i32*> [#uses=0]
+
+; CHECK: .globl l_objc_msgSend_fixup_alloc
+; CHECK: .weak_definition l_objc_msgSend_fixup_alloc
diff --git a/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll b/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll
new file mode 100644
index 0000000..c6ef256
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mattr=+neon | not grep fldmfdd
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv7-elf"
+
+%bar = type { float, float, float }
+%baz = type { i32, [16 x %bar], [16 x float], [16 x i32], i8 }
+%foo = type { <4 x float> }
+%quux = type { i32 (...)**, %baz*, i32 }
+%quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo }
+
+declare <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+define arm_apcscc void @_ZN6squish10ClusterFit9Compress3EPv(%quuz* %this, i8* %block) {
+entry:
+ %0 = lshr <4 x i32> zeroinitializer, <i32 31, i32 31, i32 31, i32 31> ; <<4 x i32>> [#uses=1]
+ %1 = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> <i32 2, i32 3> ; <<2 x i32>> [#uses=1]
+ %2 = call <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32> undef, <2 x i32> %1) nounwind ; <<2 x i32>> [#uses=1]
+ %3 = extractelement <2 x i32> %2, i32 0 ; <i32> [#uses=1]
+ %not..i = icmp eq i32 %3, undef ; <i1> [#uses=1]
+ br i1 %not..i, label %return, label %bb221
+
+bb221: ; preds = %bb221, %entry
+ br label %bb221
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-08-27-ScalarToVector.ll b/test/CodeGen/ARM/2009-08-27-ScalarToVector.ll
new file mode 100644
index 0000000..bc5bfe9
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-27-ScalarToVector.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -mattr=+neon | not grep fldmfdd
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv7-elf"
+
+%bar = type { float, float, float }
+%baz = type { i32, [16 x %bar], [16 x float], [16 x i32], i8 }
+%foo = type { <4 x float> }
+%quux = type { i32 (...)**, %baz*, i32 }
+%quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo }
+
+define arm_apcscc void @aaaa(%quuz* %this, i8* %block) {
+entry:
+ br i1 undef, label %bb.nph269, label %bb201
+
+bb.nph269: ; preds = %entry
+ br label %bb12
+
+bb12: ; preds = %bb194, %bb.nph269
+ %0 = fmul <4 x float> undef, undef ; <<4 x float>> [#uses=1]
+ %1 = shufflevector <4 x float> %0, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
+ %2 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %3 = fadd <4 x float> undef, %2 ; <<4 x float>> [#uses=1]
+ br i1 undef, label %bb194, label %bb186
+
+bb186: ; preds = %bb12
+ br label %bb194
+
+bb194: ; preds = %bb186, %bb12
+ %besterror.0.0 = phi <4 x float> [ %3, %bb186 ], [ undef, %bb12 ] ; <<4 x float>> [#uses=0]
+ %indvar.next294 = add i32 undef, 1 ; <i32> [#uses=0]
+ br label %bb12
+
+bb201: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-08-29-ExtractEltf32.ll b/test/CodeGen/ARM/2009-08-29-ExtractEltf32.ll
new file mode 100644
index 0000000..d5178b4
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-29-ExtractEltf32.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mattr=+neon
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv7-elf"
+
+define arm_apcscc void @foo() nounwind {
+entry:
+ %0 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> undef, <2 x float> undef) nounwind ; <<2 x float>> [#uses=1]
+ %tmp28 = extractelement <2 x float> %0, i32 0 ; <float> [#uses=1]
+ %1 = fcmp une float %tmp28, 4.900000e+01 ; <i1> [#uses=1]
+ br i1 %1, label %bb, label %bb7
+
+bb: ; preds = %entry
+ unreachable
+
+bb7: ; preds = %entry
+ br i1 undef, label %bb8, label %bb9
+
+bb8: ; preds = %bb7
+ unreachable
+
+bb9: ; preds = %bb7
+ ret void
+}
+
+declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
diff --git a/test/CodeGen/ARM/2009-08-29-TooLongSplat.ll b/test/CodeGen/ARM/2009-08-29-TooLongSplat.ll
new file mode 100644
index 0000000..266fce6
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-29-TooLongSplat.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mattr=+neon
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv7-elf"
+
+define arm_apcscc void @aaa() nounwind {
+entry:
+ %0 = fmul <4 x float> undef, <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02, float 0x3EB0C6F7A0000000> ; <<4 x float>> [#uses=1]
+ %tmp31 = extractelement <4 x float> %0, i32 0 ; <float> [#uses=1]
+ %1 = fpext float %tmp31 to double ; <double> [#uses=1]
+ %2 = fsub double 1.000000e+00, %1 ; <double> [#uses=1]
+ %3 = fdiv double %2, 1.000000e+00 ; <double> [#uses=1]
+ %4 = tail call double @fabs(double %3) nounwind readnone ; <double> [#uses=1]
+ %5 = fcmp ogt double %4, 1.000000e-05 ; <i1> [#uses=1]
+ br i1 %5, label %bb, label %bb7
+
+bb: ; preds = %entry
+ unreachable
+
+bb7: ; preds = %entry
+ unreachable
+}
+
+declare double @fabs(double)
diff --git a/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll b/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll
new file mode 100644
index 0000000..b6cf880
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll
@@ -0,0 +1,103 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin9 -march=arm | FileCheck %s
+
+%struct.A = type { i32* }
+
+define arm_apcscc void @"\01-[MyFunction Name:]"() {
+entry:
+ %save_filt.1 = alloca i32 ; <i32*> [#uses=2]
+ %save_eptr.0 = alloca i8* ; <i8**> [#uses=2]
+ %a = alloca %struct.A ; <%struct.A*> [#uses=3]
+ %eh_exception = alloca i8* ; <i8**> [#uses=5]
+ %eh_selector = alloca i32 ; <i32*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call arm_apcscc void @_ZN1AC1Ev(%struct.A* %a)
+ invoke arm_apcscc void @_Z3barv()
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %entry
+ call arm_apcscc void @_ZN1AD1Ev(%struct.A* %a) nounwind
+ br label %return
+
+bb: ; preds = %ppad
+ %eh_select = load i32* %eh_selector ; <i32> [#uses=1]
+ store i32 %eh_select, i32* %save_filt.1, align 4
+ %eh_value = load i8** %eh_exception ; <i8*> [#uses=1]
+ store i8* %eh_value, i8** %save_eptr.0, align 4
+ call arm_apcscc void @_ZN1AD1Ev(%struct.A* %a) nounwind
+ %0 = load i8** %save_eptr.0, align 4 ; <i8*> [#uses=1]
+ store i8* %0, i8** %eh_exception, align 4
+ %1 = load i32* %save_filt.1, align 4 ; <i32> [#uses=1]
+ store i32 %1, i32* %eh_selector, align 4
+ br label %Unwind
+
+return: ; preds = %invcont
+ ret void
+
+lpad: ; preds = %entry
+ %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ store i8* %eh_ptr, i8** %eh_exception
+ %eh_ptr1 = load i8** %eh_exception ; <i8*> [#uses=1]
+ %eh_select2 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr1, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i32 0) ; <i32> [#uses=1]
+ store i32 %eh_select2, i32* %eh_selector
+ br label %ppad
+
+ppad: ; preds = %lpad
+ br label %bb
+
+Unwind: ; preds = %bb
+ %eh_ptr3 = load i8** %eh_exception ; <i8*> [#uses=1]
+ call arm_apcscc void @_Unwind_SjLj_Resume(i8* %eh_ptr3)
+ unreachable
+}
+
+define linkonce_odr arm_apcscc void @_ZN1AC1Ev(%struct.A* %this) {
+entry:
+ %this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store %struct.A* %this, %struct.A** %this_addr
+ %0 = call arm_apcscc i8* @_Znwm(i32 4) ; <i8*> [#uses=1]
+ %1 = bitcast i8* %0 to i32* ; <i32*> [#uses=1]
+ %2 = load %struct.A** %this_addr, align 4 ; <%struct.A*> [#uses=1]
+ %3 = getelementptr inbounds %struct.A* %2, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %1, i32** %3, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare arm_apcscc i8* @_Znwm(i32)
+
+define linkonce_odr arm_apcscc void @_ZN1AD1Ev(%struct.A* %this) nounwind {
+entry:
+ %this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store %struct.A* %this, %struct.A** %this_addr
+ %0 = load %struct.A** %this_addr, align 4 ; <%struct.A*> [#uses=1]
+ %1 = getelementptr inbounds %struct.A* %0, i32 0, i32 0 ; <i32**> [#uses=1]
+ %2 = load i32** %1, align 4 ; <i32*> [#uses=1]
+ %3 = bitcast i32* %2 to i8* ; <i8*> [#uses=1]
+ call arm_apcscc void @_ZdlPv(i8* %3) nounwind
+ br label %bb
+
+bb: ; preds = %entry
+ br label %return
+
+return: ; preds = %bb
+ ret void
+}
+;CHECK: L_LSDA_1:
+
+declare arm_apcscc void @_ZdlPv(i8*) nounwind
+
+declare arm_apcscc void @_Z3barv()
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
+
+declare i32 @llvm.eh.typeid.for.i32(i8*) nounwind
+
+declare arm_apcscc i32 @__gxx_personality_sj0(...)
+
+declare arm_apcscc void @_Unwind_SjLj_Resume(i8*)
diff --git a/test/CodeGen/ARM/2009-08-31-TwoRegShuffle.ll b/test/CodeGen/ARM/2009-08-31-TwoRegShuffle.ll
new file mode 100644
index 0000000..e1e60e6
--- /dev/null
+++ b/test/CodeGen/ARM/2009-08-31-TwoRegShuffle.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; pr4843
+define <4 x i16> @v2regbug(<4 x i16>* %B) nounwind {
+;CHECK: v2regbug:
+;CHECK: vzip.16
+ %tmp1 = load <4 x i16>* %B
+ %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32><i32 0, i32 0, i32 1, i32 1>
+ ret <4 x i16> %tmp2
+}
diff --git a/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll b/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll
new file mode 100644
index 0000000..bf91fe0
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll
@@ -0,0 +1,106 @@
+; RUN: llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 < %s | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv7-apple-darwin9"
+
+@history = internal global [2 x [56 x i32]] [[56 x i32] [i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 0, i32 1, i32 2, i32 4, i32 2, i32 1, i32 0, i32 -1, i32 1, i32 3, i32 5, i32 7, i32 5, i32 3, i32 1, i32 -1, i32 2, i32 5, i32 8, i32 10, i32 8, i32 5, i32 2, i32 -1, i32 2, i32 5, i32 8, i32 10, i32 8, i32 5, i32 2, i32 -1, i32 1, i32 3, i32 5, i32 7, i32 5, i32 3, i32 1, i32 -1, i32 0, i32 1, i32 2, i32 4, i32 2, i32 1, i32 0], [56 x i32] [i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 0, i32 1, i32 2, i32 4, i32 2, i32 1, i32 0, i32 -1, i32 1, i32 3, i32 5, i32 7, i32 5, i32 3, i32 1, i32 -1, i32 2, i32 5, i32 8, i32 10, i32 8, i32 5, i32 2, i32 -1, i32 2, i32 5, i32 8, i32 10, i32 8, i32 5, i32 2, i32 -1, i32 1, i32 3, i32 5, i32 7, i32 5, i32 3, i32 1, i32 -1, i32 0, i32 1, i32 2, i32 4, i32 2, i32 1, i32 0]] ; <[2 x [56 x i32]]*> [#uses=3]
+@nodes = internal global i64 0 ; <i64*> [#uses=4]
[email protected] = private constant [9 x i8] c"##-<=>+#\00", align 1 ; <[9 x i8]*> [#uses=2]
[email protected] = private constant [6 x i8] c"%c%d\0A\00", align 1 ; <[6 x i8]*> [#uses=1]
[email protected] = private constant [16 x i8] c"Fhourstones 2.0\00", align 1 ; <[16 x i8]*> [#uses=1]
[email protected] = private constant [54 x i8] c"Using %d transposition table entries with %d probes.\0A\00", align 1 ; <[54 x i8]*> [#uses=1]
[email protected] = private constant [31 x i8] c"Solving %d-ply position after \00", align 1 ; <[31 x i8]*> [#uses=1]
[email protected] = private constant [7 x i8] c" . . .\00", align 1 ; <[7 x i8]*> [#uses=1]
[email protected] = private constant [28 x i8] c"score = %d (%c) work = %d\0A\00", align 1 ; <[28 x i8]*> [#uses=1]
[email protected] = private constant [36 x i8] c"%lu pos / %lu msec = %.1f Kpos/sec\0A\00", align 1 ; <[36 x i8]*> [#uses=1]
+@plycnt = internal global i32 0 ; <i32*> [#uses=21]
+@dias = internal global [19 x i32] zeroinitializer ; <[19 x i32]*> [#uses=43]
+@columns = internal global [128 x i32] zeroinitializer ; <[128 x i32]*> [#uses=18]
+@height = internal global [128 x i32] zeroinitializer ; <[128 x i32]*> [#uses=21]
+@rows = internal global [8 x i32] zeroinitializer ; <[8 x i32]*> [#uses=20]
+@colthr = internal global [128 x i32] zeroinitializer ; <[128 x i32]*> [#uses=5]
+@moves = internal global [44 x i32] zeroinitializer ; <[44 x i32]*> [#uses=9]
[email protected] = private constant [3 x i8] c"%d\00", align 1 ; <[3 x i8]*> [#uses=1]
+@he = internal global i8* null ; <i8**> [#uses=9]
+@hits = internal global i64 0 ; <i64*> [#uses=8]
+@posed = internal global i64 0 ; <i64*> [#uses=7]
+@ht = internal global i32* null ; <i32**> [#uses=5]
[email protected] = private constant [19 x i8] c"store rate = %.3f\0A\00", align 1 ; <[19 x i8]*> [#uses=1]
[email protected] = private constant [45 x i8] c"- %5.3f < %5.3f = %5.3f > %5.3f + %5.3f\0A\00", align 1 ; <[45 x i8]*> [#uses=1]
[email protected] = private constant [6 x i8] c"%7d%c\00", align 1 ; <[6 x i8]*> [#uses=1]
[email protected] = private constant [30 x i8] c"Failed to allocate %u bytes.\0A\00", align 1 ; <[30 x i8]*> [#uses=1]
+
+declare arm_apcscc i32 @puts(i8* nocapture) nounwind
+
+declare arm_apcscc i32 @getchar() nounwind
+
+define internal arm_apcscc i32 @transpose() nounwind readonly {
+; CHECK: push
+entry:
+ %0 = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 1), align 4 ; <i32> [#uses=1]
+ %1 = shl i32 %0, 7 ; <i32> [#uses=1]
+ %2 = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 2), align 4 ; <i32> [#uses=1]
+ %3 = or i32 %1, %2 ; <i32> [#uses=1]
+ %4 = shl i32 %3, 7 ; <i32> [#uses=1]
+ %5 = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 3), align 4 ; <i32> [#uses=1]
+ %6 = or i32 %4, %5 ; <i32> [#uses=3]
+ %7 = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 7), align 4 ; <i32> [#uses=1]
+ %8 = shl i32 %7, 7 ; <i32> [#uses=1]
+ %9 = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 6), align 4 ; <i32> [#uses=1]
+ %10 = or i32 %8, %9 ; <i32> [#uses=1]
+ %11 = shl i32 %10, 7 ; <i32> [#uses=1]
+ %12 = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 5), align 4 ; <i32> [#uses=1]
+ %13 = or i32 %11, %12 ; <i32> [#uses=3]
+ %14 = icmp ugt i32 %6, %13 ; <i1> [#uses=2]
+ %.pn2.in.i = select i1 %14, i32 %6, i32 %13 ; <i32> [#uses=1]
+ %.pn1.in.i = select i1 %14, i32 %13, i32 %6 ; <i32> [#uses=1]
+ %.pn2.i = shl i32 %.pn2.in.i, 7 ; <i32> [#uses=1]
+ %.pn3.i = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 4) ; <i32> [#uses=1]
+ %.pn.in.in.i = or i32 %.pn2.i, %.pn3.i ; <i32> [#uses=1]
+ %.pn.in.i = zext i32 %.pn.in.in.i to i64 ; <i64> [#uses=1]
+ %.pn.i = shl i64 %.pn.in.i, 21 ; <i64> [#uses=1]
+ %.pn1.i = zext i32 %.pn1.in.i to i64 ; <i64> [#uses=1]
+ %iftmp.22.0.i = or i64 %.pn.i, %.pn1.i ; <i64> [#uses=2]
+ %15 = lshr i64 %iftmp.22.0.i, 17 ; <i64> [#uses=1]
+ %16 = trunc i64 %15 to i32 ; <i32> [#uses=2]
+ %17 = urem i64 %iftmp.22.0.i, 1050011 ; <i64> [#uses=1]
+ %18 = trunc i64 %17 to i32 ; <i32> [#uses=1]
+ %19 = urem i32 %16, 179 ; <i32> [#uses=1]
+ %20 = or i32 %19, 131072 ; <i32> [#uses=1]
+ %21 = load i32** @ht, align 4 ; <i32*> [#uses=1]
+ br label %bb5
+
+bb: ; preds = %bb5
+ %22 = getelementptr inbounds i32* %21, i32 %x.0 ; <i32*> [#uses=1]
+ %23 = load i32* %22, align 4 ; <i32> [#uses=1]
+ %24 = icmp eq i32 %23, %16 ; <i1> [#uses=1]
+ br i1 %24, label %bb1, label %bb2
+
+bb1: ; preds = %bb
+ %25 = load i8** @he, align 4 ; <i8*> [#uses=1]
+ %26 = getelementptr inbounds i8* %25, i32 %x.0 ; <i8*> [#uses=1]
+ %27 = load i8* %26, align 1 ; <i8> [#uses=1]
+ %28 = sext i8 %27 to i32 ; <i32> [#uses=1]
+ ret i32 %28
+
+bb2: ; preds = %bb
+ %29 = add nsw i32 %20, %x.0 ; <i32> [#uses=3]
+ %30 = add i32 %29, -1050011 ; <i32> [#uses=1]
+ %31 = icmp sgt i32 %29, 1050010 ; <i1> [#uses=1]
+ %. = select i1 %31, i32 %30, i32 %29 ; <i32> [#uses=1]
+ %32 = add i32 %33, 1 ; <i32> [#uses=1]
+ br label %bb5
+
+bb5: ; preds = %bb2, %entry
+ %33 = phi i32 [ 0, %entry ], [ %32, %bb2 ] ; <i32> [#uses=2]
+ %x.0 = phi i32 [ %18, %entry ], [ %., %bb2 ] ; <i32> [#uses=3]
+ %34 = icmp sgt i32 %33, 7 ; <i1> [#uses=1]
+ br i1 %34, label %bb7, label %bb
+
+bb7: ; preds = %bb5
+ ret i32 -128
+}
+
+declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
+
+declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
diff --git a/test/CodeGen/ARM/2009-09-09-AllOnes.ll b/test/CodeGen/ARM/2009-09-09-AllOnes.ll
new file mode 100644
index 0000000..f654a16
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-09-AllOnes.ll
@@ -0,0 +1,10 @@
+; RUN: llc -mattr=+neon < %s
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv7-elf"
+
+define arm_apcscc void @foo() {
+entry:
+ %0 = insertelement <4 x i32> undef, i32 -1, i32 3
+ store <4 x i32> %0, <4 x i32>* undef, align 16
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll b/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll
new file mode 100644
index 0000000..3909c6a5
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll
@@ -0,0 +1,18 @@
+; RUN: llc -O1 -march=arm -mattr=+vfp2 < %s | FileCheck %s
+; pr4939
+
+define void @test(double* %x, double* %y) nounwind {
+ %1 = load double* %x, align 4
+ %2 = load double* %y, align 4
+ %3 = fsub double -0.000000e+00, %1
+ %4 = fcmp ugt double %2, %3
+ br i1 %4, label %bb1, label %bb2
+
+bb1:
+;CHECK: vstrhi.64
+ store double %1, double* %y, align 4
+ br label %bb2
+
+bb2:
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-09-10-postdec.ll b/test/CodeGen/ARM/2009-09-10-postdec.ll
new file mode 100644
index 0000000..10653b5
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-10-postdec.ll
@@ -0,0 +1,11 @@
+; RUN: llc -march=arm < %s | FileCheck %s
+; Radar 7213850
+
+define i32 @test(i8* %d, i32 %x, i32 %y) nounwind {
+ %1 = ptrtoint i8* %d to i32
+;CHECK: sub
+ %2 = sub i32 %x, %1
+ %3 = add nsw i32 %2, %y
+ store i8 0, i8* %d, align 1
+ ret i32 %3
+}
diff --git a/test/CodeGen/ARM/2009-09-13-InvalidSubreg.ll b/test/CodeGen/ARM/2009-09-13-InvalidSubreg.ll
new file mode 100644
index 0000000..13adb24
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-13-InvalidSubreg.ll
@@ -0,0 +1,61 @@
+; RUN: llc -mattr=+neon < %s
+; PR4965
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-eabi"
+
+%struct.fr = type { [6 x %struct.pl] }
+%struct.obb = type { %"struct.m4", %"struct.p3" }
+%struct.pl = type { %"struct.p3" }
+%"struct.m4" = type { %"struct.p3", %"struct.p3", %"struct.p3", %"struct.p3" }
+%"struct.p3" = type { <4 x float> }
+
+declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
+
+define arm_aapcs_vfpcc i8 @foo(%struct.fr* nocapture %this, %struct.obb* %box) nounwind {
+entry:
+ %val.i.i = load <4 x float>* undef ; <<4 x float>> [#uses=1]
+ %val2.i.i = load <4 x float>* null ; <<4 x float>> [#uses=1]
+ %elt3.i.i = getelementptr inbounds %struct.obb* %box, i32 0, i32 0, i32 2, i32 0 ; <<4 x float>*> [#uses=1]
+ %val4.i.i = load <4 x float>* %elt3.i.i ; <<4 x float>> [#uses=1]
+ %0 = shufflevector <2 x float> undef, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]
+ %1 = fadd <4 x float> undef, zeroinitializer ; <<4 x float>> [#uses=1]
+ br label %bb33
+
+bb: ; preds = %bb33
+ %2 = fmul <4 x float> %val.i.i, undef ; <<4 x float>> [#uses=1]
+ %3 = fmul <4 x float> %val2.i.i, undef ; <<4 x float>> [#uses=1]
+ %4 = fadd <4 x float> %3, %2 ; <<4 x float>> [#uses=1]
+ %5 = fmul <4 x float> %val4.i.i, undef ; <<4 x float>> [#uses=1]
+ %6 = fadd <4 x float> %5, %4 ; <<4 x float>> [#uses=1]
+ %7 = bitcast <4 x float> %6 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %8 = and <4 x i32> %7, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648> ; <<4 x i32>> [#uses=1]
+ %9 = or <4 x i32> %8, undef ; <<4 x i32>> [#uses=1]
+ %10 = bitcast <4 x i32> %9 to <4 x float> ; <<4 x float>> [#uses=1]
+ %11 = shufflevector <4 x float> %10, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1]
+ %12 = shufflevector <2 x float> %11, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %13 = fmul <4 x float> undef, %12 ; <<4 x float>> [#uses=1]
+ %14 = fmul <4 x float> %0, undef ; <<4 x float>> [#uses=1]
+ %15 = fadd <4 x float> %14, %13 ; <<4 x float>> [#uses=1]
+ %16 = fadd <4 x float> undef, %15 ; <<4 x float>> [#uses=1]
+ %17 = fadd <4 x float> %1, %16 ; <<4 x float>> [#uses=1]
+ %18 = fmul <4 x float> zeroinitializer, %17 ; <<4 x float>> [#uses=1]
+ %19 = insertelement <4 x float> %18, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=2]
+ %20 = shufflevector <4 x float> %19, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1]
+ %21 = shufflevector <4 x float> %19, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
+ %22 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %20, <2 x float> %21) nounwind ; <<2 x float>> [#uses=2]
+ %23 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %22, <2 x float> %22) nounwind ; <<2 x float>> [#uses=2]
+ %24 = shufflevector <2 x float> %23, <2 x float> %23, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %25 = fadd <4 x float> %24, zeroinitializer ; <<4 x float>> [#uses=1]
+ %tmp46 = extractelement <4 x float> %25, i32 0 ; <float> [#uses=1]
+ %26 = fcmp olt float %tmp46, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %26, label %bb41, label %bb33
+
+bb33: ; preds = %bb, %entry
+ br i1 undef, label %bb34, label %bb
+
+bb34: ; preds = %bb33
+ ret i8 undef
+
+bb41: ; preds = %bb
+ ret i8 1
+}
diff --git a/test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll b/test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll
new file mode 100644
index 0000000..758b59a
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=arm -mattr=+neon -mcpu=cortex-a9
+
+define arm_aapcs_vfpcc <4 x float> @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind {
+ %1 = ptrtoint i8* %pBuffer to i32
+
+ %lsr.iv2641 = inttoptr i32 %1 to float*
+ %tmp29 = add i32 %1, 4
+ %tmp2930 = inttoptr i32 %tmp29 to float*
+ %tmp31 = add i32 %1, 8
+ %tmp3132 = inttoptr i32 %tmp31 to float*
+ %tmp33 = add i32 %1, 12
+ %tmp3334 = inttoptr i32 %tmp33 to float*
+ %tmp35 = add i32 %1, 16
+ %tmp3536 = inttoptr i32 %tmp35 to float*
+ %tmp37 = add i32 %1, 20
+ %tmp3738 = inttoptr i32 %tmp37 to float*
+ %tmp39 = add i32 %1, 24
+ %tmp3940 = inttoptr i32 %tmp39 to float*
+ %2 = load float* %lsr.iv2641, align 4
+ %3 = load float* %tmp2930, align 4
+ %4 = load float* %tmp3132, align 4
+ %5 = load float* %tmp3334, align 4
+ %6 = load float* %tmp3536, align 4
+ %7 = load float* %tmp3738, align 4
+ %8 = load float* %tmp3940, align 4
+ %9 = insertelement <4 x float> undef, float %6, i32 0
+ %10 = shufflevector <4 x float> %9, <4 x float> undef, <4 x i32> zeroinitializer
+ %11 = insertelement <4 x float> %10, float %7, i32 1
+ %12 = insertelement <4 x float> %11, float %8, i32 2
+ %13 = insertelement <4 x float> undef, float %2, i32 0
+ %14 = shufflevector <4 x float> %13, <4 x float> undef, <4 x i32> zeroinitializer
+ %15 = insertelement <4 x float> %14, float %3, i32 1
+ %16 = insertelement <4 x float> %15, float %4, i32 2
+ %17 = insertelement <4 x float> %16, float %5, i32 3
+ %18 = fsub <4 x float> zeroinitializer, %12
+ %19 = shufflevector <4 x float> %18, <4 x float> undef, <4 x i32> zeroinitializer
+ %20 = shufflevector <4 x float> %17, <4 x float> undef, <2 x i32> <i32 0, i32 1>
+ %21 = shufflevector <2 x float> %20, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
+
+ ret <4 x float> %21
+}
diff --git a/test/CodeGen/ARM/2009-09-20-LiveIntervalsBug.ll b/test/CodeGen/ARM/2009-09-20-LiveIntervalsBug.ll
new file mode 100644
index 0000000..980f8ce
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-20-LiveIntervalsBug.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -mtriple=arm-eabi -mattr=+neon -mcpu=cortex-a9
+
+; PR4986
+
+define arm_aapcs_vfpcc void @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind {
+entry:
+ br i1 undef, label %return, label %bb.preheader
+
+bb.preheader: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb, %bb.preheader
+ %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %1 = insertelement <4 x float> %0, float undef, i32 1 ; <<4 x float>> [#uses=1]
+ %2 = insertelement <4 x float> %1, float undef, i32 2 ; <<4 x float>> [#uses=1]
+ %3 = insertelement <4 x float> %2, float undef, i32 3 ; <<4 x float>> [#uses=1]
+ %4 = fmul <4 x float> undef, %3 ; <<4 x float>> [#uses=1]
+ %5 = extractelement <4 x float> %4, i32 3 ; <float> [#uses=1]
+ store float %5, float* undef, align 4
+ br i1 undef, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+define arm_aapcs_vfpcc <4 x float> @bar(i8* nocapture %pBuffer, i32 %numItems) nounwind {
+ %1 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %2 = insertelement <4 x float> %1, float undef, i32 1 ; <<4 x float>> [#uses=1]
+ %3 = insertelement <4 x float> %2, float undef, i32 2 ; <<4 x float>> [#uses=1]
+ %4 = insertelement <4 x float> %3, float undef, i32 3 ; <<4 x float>> [#uses=1]
+ %5 = shufflevector <4 x float> %4, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1]
+ %6 = shufflevector <2 x float> %5, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1]
+ ret <4 x float> %6
+}
diff --git a/test/CodeGen/ARM/2009-09-21-LiveVariablesBug.ll b/test/CodeGen/ARM/2009-09-21-LiveVariablesBug.ll
new file mode 100644
index 0000000..aace475
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-21-LiveVariablesBug.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+neon
+
+; PR5024
+
+%bar = type { <4 x float> }
+%foo = type { %bar, %bar, %bar, %bar }
+
+declare arm_aapcs_vfpcc <4 x float> @bbb(%bar*) nounwind
+
+define arm_aapcs_vfpcc void @aaa(%foo* noalias sret %agg.result, %foo* %tfrm) nounwind {
+entry:
+ %0 = call arm_aapcs_vfpcc <4 x float> @bbb(%bar* undef) nounwind ; <<4 x float>> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-09-22-LiveVariablesBug.ll b/test/CodeGen/ARM/2009-09-22-LiveVariablesBug.ll
new file mode 100644
index 0000000..30931a2
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-22-LiveVariablesBug.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+neon
+
+; PR5024
+
+%bar = type { %foo, %foo }
+%foo = type { <4 x float> }
+
+declare arm_aapcs_vfpcc float @aaa(%foo* nocapture) nounwind readonly
+
+declare arm_aapcs_vfpcc %bar* @bbb(%bar*, <4 x float>, <4 x float>) nounwind
+
+define arm_aapcs_vfpcc void @ccc(i8* nocapture %pBuffer, i32 %numItems) nounwind {
+entry:
+ br i1 undef, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %0 = call arm_aapcs_vfpcc %bar* @bbb(%bar* undef, <4 x float> undef, <4 x float> undef) nounwind ; <%bar*> [#uses=0]
+ %1 = call arm_aapcs_vfpcc float @aaa(%foo* undef) nounwind ; <float> [#uses=0]
+ unreachable
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-09-23-LiveVariablesBug.ll b/test/CodeGen/ARM/2009-09-23-LiveVariablesBug.ll
new file mode 100644
index 0000000..2ff479b
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-23-LiveVariablesBug.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+neon
+
+; PR5024
+
+%struct.1 = type { %struct.4, %struct.4 }
+%struct.4 = type { <4 x float> }
+
+define arm_aapcs_vfpcc %struct.1* @hhh3(%struct.1* %this, <4 x float> %lenation.0, <4 x float> %legalation.0) nounwind {
+entry:
+ %0 = call arm_aapcs_vfpcc %struct.4* @sss1(%struct.4* undef, float 0.000000e+00) nounwind ; <%struct.4*> [#uses=0]
+ %1 = call arm_aapcs_vfpcc %struct.4* @qqq1(%struct.4* null, float 5.000000e-01) nounwind ; <%struct.4*> [#uses=0]
+ %val92 = load <4 x float>* null ; <<4 x float>> [#uses=1]
+ %2 = call arm_aapcs_vfpcc %struct.4* @zzz2(%struct.4* undef, <4 x float> %val92) nounwind ; <%struct.4*> [#uses=0]
+ ret %struct.1* %this
+}
+
+declare arm_aapcs_vfpcc %struct.4* @qqq1(%struct.4*, float) nounwind
+
+declare arm_aapcs_vfpcc %struct.4* @sss1(%struct.4*, float) nounwind
+
+declare arm_aapcs_vfpcc %struct.4* @zzz2(%struct.4*, <4 x float>) nounwind
diff --git a/test/CodeGen/ARM/2009-09-24-spill-align.ll b/test/CodeGen/ARM/2009-09-24-spill-align.ll
new file mode 100644
index 0000000..5476d5f
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-24-spill-align.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; pr4926
+
+define arm_apcscc void @test_vget_lanep16() nounwind {
+entry:
+ %arg0_poly16x4_t = alloca <4 x i16> ; <<4 x i16>*> [#uses=1]
+ %out_poly16_t = alloca i16 ; <i16*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+; CHECK: vldr.64
+ %0 = load <4 x i16>* %arg0_poly16x4_t, align 8 ; <<4 x i16>> [#uses=1]
+ %1 = extractelement <4 x i16> %0, i32 1 ; <i16> [#uses=1]
+ store i16 %1, i16* %out_poly16_t, align 2
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-09-27-CoalescerBug.ll b/test/CodeGen/ARM/2009-09-27-CoalescerBug.ll
new file mode 100644
index 0000000..ea2693a
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-27-CoalescerBug.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8
+; PR5055
+
+module asm ".globl\09__aeabi_f2lz"
+module asm ".set\09__aeabi_f2lz, __fixsfdi"
+module asm ""
+
+define arm_aapcs_vfpcc i64 @__fixsfdi(float %a) nounwind {
+entry:
+ %0 = fcmp olt float %a, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %bb1
+
+bb: ; preds = %entry
+ %1 = fsub float -0.000000e+00, %a ; <float> [#uses=1]
+ %2 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %1) nounwind ; <i64> [#uses=1]
+ %3 = sub i64 0, %2 ; <i64> [#uses=1]
+ ret i64 %3
+
+bb1: ; preds = %entry
+ %4 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %a) nounwind ; <i64> [#uses=1]
+ ret i64 %4
+}
+
+declare arm_aapcs_vfpcc i64 @__fixunssfdi(float)
diff --git a/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll b/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll
new file mode 100644
index 0000000..53bd668
--- /dev/null
+++ b/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=armv5-unknown-linux-gnueabi -mcpu=arm10tdmi | FileCheck %s
+; PR4687
+
+%0 = type { double, double }
+
+define arm_aapcscc void @foo(%0* noalias nocapture sret %agg.result, double %x.0, double %y.0) nounwind {
+; CHECK: foo:
+; CHECK: bl __adddf3
+; CHECK-NOT: strd
+; CHECK: mov
+ %x76 = fmul double %y.0, 0.000000e+00 ; <double> [#uses=1]
+ %x77 = fadd double %y.0, 0.000000e+00 ; <double> [#uses=1]
+ %tmpr = fadd double %x.0, %x76 ; <double> [#uses=1]
+ %agg.result.0 = getelementptr %0* %agg.result, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %tmpr, double* %agg.result.0, align 8
+ %agg.result.1 = getelementptr %0* %agg.result, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %x77, double* %agg.result.1, align 8
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll b/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll
new file mode 100644
index 0000000..465368b
--- /dev/null
+++ b/test/CodeGen/ARM/2009-10-02-NEONSubregsBug.ll
@@ -0,0 +1,63 @@
+; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 -enable-unsafe-fp-math < %s
+; PR5367
+
+define arm_aapcs_vfpcc void @_Z27Benchmark_SceDualQuaternionPvm(i8* nocapture %pBuffer, i32 %numItems) nounwind {
+entry:
+ br i1 undef, label %return, label %bb
+
+bb: ; preds = %bb, %entry
+ %0 = load float* undef, align 4 ; <float> [#uses=1]
+ %1 = load float* null, align 4 ; <float> [#uses=1]
+ %2 = insertelement <4 x float> undef, float undef, i32 1 ; <<4 x float>> [#uses=1]
+ %3 = insertelement <4 x float> %2, float %1, i32 2 ; <<4 x float>> [#uses=2]
+ %4 = insertelement <4 x float> undef, float %0, i32 2 ; <<4 x float>> [#uses=1]
+ %5 = insertelement <4 x float> %4, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=4]
+ %6 = fsub <4 x float> zeroinitializer, %3 ; <<4 x float>> [#uses=1]
+ %7 = shufflevector <4 x float> %6, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=2]
+ %8 = shufflevector <4 x float> %5, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1]
+ %9 = shufflevector <2 x float> %8, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=2]
+ %10 = fmul <4 x float> %7, %9 ; <<4 x float>> [#uses=1]
+ %11 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %12 = shufflevector <4 x float> %5, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=2]
+ %13 = shufflevector <2 x float> %12, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %14 = fmul <4 x float> %11, %13 ; <<4 x float>> [#uses=1]
+ %15 = fadd <4 x float> %10, %14 ; <<4 x float>> [#uses=1]
+ %16 = shufflevector <2 x float> %12, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1]
+ %17 = fadd <4 x float> %15, zeroinitializer ; <<4 x float>> [#uses=1]
+ %18 = shufflevector <4 x float> %17, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 undef, i32 undef> ; <<4 x float>> [#uses=1]
+ %19 = fmul <4 x float> %7, %16 ; <<4 x float>> [#uses=1]
+ %20 = fadd <4 x float> %19, zeroinitializer ; <<4 x float>> [#uses=1]
+ %21 = shufflevector <4 x float> %3, <4 x float> undef, <4 x i32> <i32 2, i32 undef, i32 undef, i32 undef> ; <<4 x float>> [#uses=1]
+ %22 = shufflevector <4 x float> %21, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %23 = fmul <4 x float> %22, %9 ; <<4 x float>> [#uses=1]
+ %24 = fadd <4 x float> %20, %23 ; <<4 x float>> [#uses=1]
+ %25 = shufflevector <4 x float> %18, <4 x float> %24, <4 x i32> <i32 0, i32 1, i32 6, i32 undef> ; <<4 x float>> [#uses=1]
+ %26 = shufflevector <4 x float> %25, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 7> ; <<4 x float>> [#uses=1]
+ %27 = fmul <4 x float> %26, <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01> ; <<4 x float>> [#uses=1]
+ %28 = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %5 ; <<4 x float>> [#uses=1]
+ %29 = tail call <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
+ %30 = fmul <4 x float> zeroinitializer, %29 ; <<4 x float>> [#uses=1]
+ %31 = fmul <4 x float> %30, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00> ; <<4 x float>> [#uses=1]
+ %32 = shufflevector <4 x float> %27, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %33 = shufflevector <4 x float> %28, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
+ %34 = shufflevector <2 x float> %33, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1]
+ %35 = fmul <4 x float> %32, %34 ; <<4 x float>> [#uses=1]
+ %36 = fadd <4 x float> %35, zeroinitializer ; <<4 x float>> [#uses=1]
+ %37 = shufflevector <4 x float> %5, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> ; <<4 x float>> [#uses=1]
+ %38 = shufflevector <4 x float> %37, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %39 = fmul <4 x float> zeroinitializer, %38 ; <<4 x float>> [#uses=1]
+ %40 = fadd <4 x float> %36, %39 ; <<4 x float>> [#uses=1]
+ %41 = fadd <4 x float> %40, zeroinitializer ; <<4 x float>> [#uses=1]
+ %42 = shufflevector <4 x float> undef, <4 x float> %41, <4 x i32> <i32 0, i32 1, i32 6, i32 3> ; <<4 x float>> [#uses=1]
+ %43 = fmul <4 x float> %42, %31 ; <<4 x float>> [#uses=1]
+ store float undef, float* undef, align 4
+ store float 0.000000e+00, float* null, align 4
+ %44 = extractelement <4 x float> %43, i32 1 ; <float> [#uses=1]
+ store float %44, float* undef, align 4
+ br i1 undef, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone
diff --git a/test/CodeGen/ARM/2009-10-21-InvalidFNeg.ll b/test/CodeGen/ARM/2009-10-21-InvalidFNeg.ll
new file mode 100644
index 0000000..0f021d2
--- /dev/null
+++ b/test/CodeGen/ARM/2009-10-21-InvalidFNeg.ll
@@ -0,0 +1,48 @@
+; RUN: llc -mcpu=cortex-a8 -mattr=+neon < %s | grep vneg
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-eabi"
+
+%aaa = type { %fff, %fff }
+%bbb = type { [6 x %ddd] }
+%ccc = type { %eee, %fff }
+%ddd = type { %fff }
+%eee = type { %fff, %fff, %fff, %fff }
+%fff = type { %struct.vec_float4 }
+%struct.vec_float4 = type { <4 x float> }
+
+define linkonce_odr arm_aapcs_vfpcc void @foo(%eee* noalias sret %agg.result, i64 %tfrm.0.0, i64 %tfrm.0.1, i64 %tfrm.0.2, i64 %tfrm.0.3, i64 %tfrm.0.4, i64 %tfrm.0.5, i64 %tfrm.0.6, i64 %tfrm.0.7) nounwind noinline {
+entry:
+ %tmp104 = zext i64 %tfrm.0.2 to i512 ; <i512> [#uses=1]
+ %tmp105 = shl i512 %tmp104, 128 ; <i512> [#uses=1]
+ %tmp118 = zext i64 %tfrm.0.3 to i512 ; <i512> [#uses=1]
+ %tmp119 = shl i512 %tmp118, 192 ; <i512> [#uses=1]
+ %ins121 = or i512 %tmp119, %tmp105 ; <i512> [#uses=1]
+ %tmp99 = zext i64 %tfrm.0.4 to i512 ; <i512> [#uses=1]
+ %tmp100 = shl i512 %tmp99, 256 ; <i512> [#uses=1]
+ %tmp123 = zext i64 %tfrm.0.5 to i512 ; <i512> [#uses=1]
+ %tmp124 = shl i512 %tmp123, 320 ; <i512> [#uses=1]
+ %tmp96 = zext i64 %tfrm.0.6 to i512 ; <i512> [#uses=1]
+ %tmp97 = shl i512 %tmp96, 384 ; <i512> [#uses=1]
+ %tmp128 = zext i64 %tfrm.0.7 to i512 ; <i512> [#uses=1]
+ %tmp129 = shl i512 %tmp128, 448 ; <i512> [#uses=1]
+ %mask.masked = or i512 %tmp124, %tmp100 ; <i512> [#uses=1]
+ %ins131 = or i512 %tmp129, %tmp97 ; <i512> [#uses=1]
+ %tmp109132 = zext i64 %tfrm.0.0 to i128 ; <i128> [#uses=1]
+ %tmp113134 = zext i64 %tfrm.0.1 to i128 ; <i128> [#uses=1]
+ %tmp114133 = shl i128 %tmp113134, 64 ; <i128> [#uses=1]
+ %tmp94 = or i128 %tmp114133, %tmp109132 ; <i128> [#uses=1]
+ %tmp95 = bitcast i128 %tmp94 to <4 x float> ; <<4 x float>> [#uses=0]
+ %tmp82 = lshr i512 %ins121, 128 ; <i512> [#uses=1]
+ %tmp83 = trunc i512 %tmp82 to i128 ; <i128> [#uses=1]
+ %tmp84 = bitcast i128 %tmp83 to <4 x float> ; <<4 x float>> [#uses=0]
+ %tmp86 = lshr i512 %mask.masked, 256 ; <i512> [#uses=1]
+ %tmp87 = trunc i512 %tmp86 to i128 ; <i128> [#uses=1]
+ %tmp88 = bitcast i128 %tmp87 to <4 x float> ; <<4 x float>> [#uses=0]
+ %tmp90 = lshr i512 %ins131, 384 ; <i512> [#uses=1]
+ %tmp91 = trunc i512 %tmp90 to i128 ; <i128> [#uses=1]
+ %tmp92 = bitcast i128 %tmp91 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %tmp92 ; <<4 x float>> [#uses=1]
+ %tmp28 = getelementptr inbounds %eee* %agg.result, i32 0, i32 3, i32 0, i32 0 ; <<4 x float>*> [#uses=1]
+ store <4 x float> %tmp, <4 x float>* %tmp28, align 16
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-10-27-double-align.ll b/test/CodeGen/ARM/2009-10-27-double-align.ll
new file mode 100644
index 0000000..a4e7685
--- /dev/null
+++ b/test/CodeGen/ARM/2009-10-27-double-align.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s
+
[email protected] = private constant [1 x i8] zeroinitializer, align 1
+
+define arm_aapcscc void @g() {
+entry:
+;CHECK: [sp, #+8]
+;CHECK: [sp, #+12]
+;CHECK: [sp]
+ tail call arm_aapcscc void (i8*, ...)* @f(i8* getelementptr ([1 x i8]* @.str, i32 0, i32 0), i32 1, double 2.000000e+00, i32 3, double 4.000000e+00)
+ ret void
+}
+
+declare arm_aapcscc void @f(i8*, ...)
diff --git a/test/CodeGen/ARM/2009-10-30.ll b/test/CodeGen/ARM/2009-10-30.ll
new file mode 100644
index 0000000..90a5bd2
--- /dev/null
+++ b/test/CodeGen/ARM/2009-10-30.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s
+; This test checks that the address of the varg arguments is correctly
+; computed when there are 5 or more regular arguments.
+
+define void @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, ...) {
+entry:
+;CHECK: sub sp, sp, #4
+;CHECK: add r{{[0-9]+}}, sp, #8
+;CHECK: str r{{[0-9]+}}, [sp], #+4
+;CHECK: bx lr
+ %ap = alloca i8*, align 4
+ %ap1 = bitcast i8** %ap to i8*
+ call void @llvm.va_start(i8* %ap1)
+ ret void
+}
+
+declare void @llvm.va_start(i8*) nounwind
diff --git a/test/CodeGen/ARM/2009-11-01-NeonMoves.ll b/test/CodeGen/ARM/2009-11-01-NeonMoves.ll
new file mode 100644
index 0000000..62f3786
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-01-NeonMoves.ll
@@ -0,0 +1,40 @@
+; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-eabi"
+
+%foo = type { <4 x float> }
+
+define arm_aapcs_vfpcc void @bar(%foo* noalias sret %agg.result, <4 x float> %quat.0) nounwind {
+entry:
+ %quat_addr = alloca %foo, align 16 ; <%foo*> [#uses=2]
+ %0 = getelementptr inbounds %foo* %quat_addr, i32 0, i32 0 ; <<4 x float>*> [#uses=1]
+ store <4 x float> %quat.0, <4 x float>* %0
+ %1 = call arm_aapcs_vfpcc <4 x float> @quux(%foo* %quat_addr) nounwind ; <<4 x float>> [#uses=3]
+;CHECK: vmov.f32
+;CHECK: vmov.f32
+ %2 = fmul <4 x float> %1, %1 ; <<4 x float>> [#uses=2]
+ %3 = shufflevector <4 x float> %2, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1]
+ %4 = shufflevector <4 x float> %2, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
+ %5 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %3, <2 x float> %4) nounwind ; <<2 x float>> [#uses=2]
+ %6 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %5, <2 x float> %5) nounwind ; <<2 x float>> [#uses=2]
+ %7 = shufflevector <2 x float> %6, <2 x float> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=2]
+;CHECK: vmov
+ %8 = call <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float> %7) nounwind ; <<4 x float>> [#uses=3]
+ %9 = fmul <4 x float> %8, %8 ; <<4 x float>> [#uses=1]
+ %10 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %9, <4 x float> %7) nounwind ; <<4 x float>> [#uses=1]
+ %11 = fmul <4 x float> %10, %8 ; <<4 x float>> [#uses=1]
+ %12 = fmul <4 x float> %11, %1 ; <<4 x float>> [#uses=1]
+ %13 = call arm_aapcs_vfpcc %foo* @baz(%foo* %agg.result, <4 x float> %12) nounwind ; <%foo*> [#uses=0]
+ ret void
+}
+
+declare arm_aapcs_vfpcc %foo* @baz(%foo*, <4 x float>) nounwind
+
+declare arm_aapcs_vfpcc <4 x float> @quux(%foo* nocapture) nounwind readonly
+
+declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
+
+declare <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float>) nounwind readnone
+
+declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/ARM/2009-11-02-NegativeLane.ll b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll
new file mode 100644
index 0000000..f2288c3
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mcpu=cortex-a8 < %s | grep vdup.32
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-eabi"
+
+define arm_aapcs_vfpcc void @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind {
+entry:
+ br i1 undef, label %return, label %bb
+
+bb: ; preds = %bb, %entry
+ %0 = load float* undef, align 4 ; <float> [#uses=1]
+ %1 = insertelement <4 x float> undef, float %0, i32 2 ; <<4 x float>> [#uses=1]
+ %2 = insertelement <4 x float> %1, float undef, i32 3 ; <<4 x float>> [#uses=1]
+ %3 = fmul <4 x float> undef, %2 ; <<4 x float>> [#uses=1]
+ %4 = extractelement <4 x float> %3, i32 1 ; <float> [#uses=1]
+ store float %4, float* undef, align 4
+ br i1 undef, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll b/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll
new file mode 100644
index 0000000..7aae3ac
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll
@@ -0,0 +1,66 @@
+; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s
+; PR5423
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-eabi"
+
+define arm_aapcs_vfpcc void @foo() {
+entry:
+ %0 = load float* null, align 4 ; <float> [#uses=2]
+ %1 = fmul float %0, undef ; <float> [#uses=2]
+ %2 = fmul float 0.000000e+00, %1 ; <float> [#uses=2]
+ %3 = fmul float %0, %1 ; <float> [#uses=1]
+ %4 = fadd float 0.000000e+00, %3 ; <float> [#uses=1]
+ %5 = fsub float 1.000000e+00, %4 ; <float> [#uses=1]
+; CHECK: foo:
+; CHECK: vmov.f32 s{{[0-9]+}}, #1.000000e+00
+ %6 = fsub float 1.000000e+00, undef ; <float> [#uses=2]
+ %7 = fsub float %2, undef ; <float> [#uses=1]
+ %8 = fsub float 0.000000e+00, undef ; <float> [#uses=3]
+ %9 = fadd float %2, undef ; <float> [#uses=3]
+ %10 = load float* undef, align 8 ; <float> [#uses=3]
+ %11 = fmul float %8, %10 ; <float> [#uses=1]
+ %12 = fadd float undef, %11 ; <float> [#uses=2]
+ %13 = fmul float undef, undef ; <float> [#uses=1]
+ %14 = fmul float %6, 0.000000e+00 ; <float> [#uses=1]
+ %15 = fadd float %13, %14 ; <float> [#uses=1]
+ %16 = fmul float %9, %10 ; <float> [#uses=1]
+ %17 = fadd float %15, %16 ; <float> [#uses=2]
+ %18 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
+ %19 = fadd float %18, 0.000000e+00 ; <float> [#uses=1]
+ %20 = fmul float undef, %10 ; <float> [#uses=1]
+ %21 = fadd float %19, %20 ; <float> [#uses=1]
+ %22 = load float* undef, align 8 ; <float> [#uses=1]
+ %23 = fmul float %5, %22 ; <float> [#uses=1]
+ %24 = fadd float %23, undef ; <float> [#uses=1]
+ %25 = load float* undef, align 8 ; <float> [#uses=2]
+ %26 = fmul float %8, %25 ; <float> [#uses=1]
+ %27 = fadd float %24, %26 ; <float> [#uses=1]
+ %28 = fmul float %9, %25 ; <float> [#uses=1]
+ %29 = fadd float undef, %28 ; <float> [#uses=1]
+ %30 = fmul float %8, undef ; <float> [#uses=1]
+ %31 = fadd float undef, %30 ; <float> [#uses=1]
+ %32 = fmul float %6, undef ; <float> [#uses=1]
+ %33 = fadd float undef, %32 ; <float> [#uses=1]
+ %34 = fmul float %9, undef ; <float> [#uses=1]
+ %35 = fadd float %33, %34 ; <float> [#uses=1]
+ %36 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
+ %37 = fmul float %7, undef ; <float> [#uses=1]
+ %38 = fadd float %36, %37 ; <float> [#uses=1]
+ %39 = fmul float undef, undef ; <float> [#uses=1]
+ %40 = fadd float %38, %39 ; <float> [#uses=1]
+ store float %12, float* undef, align 8
+ store float %17, float* undef, align 4
+ store float %21, float* undef, align 8
+ store float %27, float* undef, align 8
+ store float %29, float* undef, align 4
+ store float %31, float* undef, align 8
+ store float %40, float* undef, align 8
+ store float %12, float* null, align 8
+ %41 = fmul float %17, undef ; <float> [#uses=1]
+ %42 = fadd float %41, undef ; <float> [#uses=1]
+ %43 = fmul float %35, undef ; <float> [#uses=1]
+ %44 = fadd float %42, %43 ; <float> [#uses=1]
+ store float %44, float* null, align 4
+ unreachable
+}
diff --git a/test/CodeGen/ARM/2009-11-13-CoalescerCrash.ll b/test/CodeGen/ARM/2009-11-13-CoalescerCrash.ll
new file mode 100644
index 0000000..efc4be1
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-13-CoalescerCrash.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 < %s
+; PR5410
+
+%0 = type { float, float, float, float }
+%pln = type { %vec, float }
+%vec = type { [4 x float] }
+
+define arm_aapcs_vfpcc float @aaa(%vec* nocapture %ustart, %vec* nocapture %udir, %vec* nocapture %vstart, %vec* nocapture %vdir, %vec* %upoint, %vec* %vpoint) {
+entry:
+ br i1 undef, label %bb81, label %bb48
+
+bb48: ; preds = %entry
+ %0 = call arm_aapcs_vfpcc %0 @bbb(%pln* undef, %vec* %vstart, %vec* undef) nounwind ; <%0> [#uses=0]
+ ret float 0.000000e+00
+
+bb81: ; preds = %entry
+ ret float 0.000000e+00
+}
+
+declare arm_aapcs_vfpcc %0 @bbb(%pln* nocapture, %vec* nocapture, %vec* nocapture) nounwind
diff --git a/test/CodeGen/ARM/2009-11-13-ScavengerAssert.ll b/test/CodeGen/ARM/2009-11-13-ScavengerAssert.ll
new file mode 100644
index 0000000..6cce02d
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-13-ScavengerAssert.ll
@@ -0,0 +1,42 @@
+; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 < %s
+; PR5411
+
+%bar = type { %quad, float, float, [3 x %quux*], [3 x %bar*], [2 x %bar*], [3 x i8], i8 }
+%baz = type { %bar*, i32 }
+%foo = type { i8, %quuz, %quad, float, [64 x %quux], [128 x %bar], i32, %baz, %baz }
+%quad = type { [4 x float] }
+%quux = type { %quad, %quad }
+%quuz = type { [4 x %quux*], [4 x float], i32 }
+
+define arm_aapcs_vfpcc %bar* @aaa(%foo* nocapture %this, %quux* %a, %quux* %b, %quux* %c, i8 zeroext %forced) {
+entry:
+ br i1 undef, label %bb85, label %bb
+
+bb: ; preds = %entry
+ %0 = getelementptr inbounds %bar* null, i32 0, i32 0, i32 0, i32 2 ; <float*> [#uses=2]
+ %1 = load float* undef, align 4 ; <float> [#uses=1]
+ %2 = fsub float 0.000000e+00, undef ; <float> [#uses=2]
+ %3 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
+ %4 = load float* %0, align 4 ; <float> [#uses=3]
+ %5 = fmul float %4, %2 ; <float> [#uses=1]
+ %6 = fsub float %3, %5 ; <float> [#uses=1]
+ %7 = fmul float %4, undef ; <float> [#uses=1]
+ %8 = fsub float %7, undef ; <float> [#uses=1]
+ %9 = fmul float undef, %2 ; <float> [#uses=1]
+ %10 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
+ %11 = fsub float %9, %10 ; <float> [#uses=1]
+ %12 = fmul float undef, %6 ; <float> [#uses=1]
+ %13 = fmul float 0.000000e+00, %8 ; <float> [#uses=1]
+ %14 = fadd float %12, %13 ; <float> [#uses=1]
+ %15 = fmul float %1, %11 ; <float> [#uses=1]
+ %16 = fadd float %14, %15 ; <float> [#uses=1]
+ %17 = select i1 undef, float undef, float %16 ; <float> [#uses=1]
+ %18 = fdiv float %17, 0.000000e+00 ; <float> [#uses=1]
+ store float %18, float* undef, align 4
+ %19 = fmul float %4, undef ; <float> [#uses=1]
+ store float %19, float* %0, align 4
+ ret %bar* null
+
+bb85: ; preds = %entry
+ ret %bar* null
+}
diff --git a/test/CodeGen/ARM/2009-11-13-ScavengerAssert2.ll b/test/CodeGen/ARM/2009-11-13-ScavengerAssert2.ll
new file mode 100644
index 0000000..3ff6631
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-13-ScavengerAssert2.ll
@@ -0,0 +1,123 @@
+; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 < %s
+; PR5412
+
+%bar = type { %quad, float, float, [3 x %quuz*], [3 x %bar*], [2 x %bar*], [3 x i8], i8 }
+%baz = type { %bar*, i32 }
+%foo = type { i8, %quux, %quad, float, [64 x %quuz], [128 x %bar], i32, %baz, %baz }
+%quad = type { [4 x float] }
+%quux = type { [4 x %quuz*], [4 x float], i32 }
+%quuz = type { %quad, %quad }
+
+define arm_aapcs_vfpcc %bar* @aaa(%foo* nocapture %this, %quuz* %a, %quuz* %b, %quuz* %c, i8 zeroext %forced) {
+entry:
+ br i1 undef, label %bb85, label %bb
+
+bb: ; preds = %entry
+ br i1 undef, label %bb3.i, label %bb2.i
+
+bb2.i: ; preds = %bb
+ br label %bb3.i
+
+bb3.i: ; preds = %bb2.i, %bb
+ %0 = getelementptr inbounds %quuz* %a, i32 0, i32 1, i32 0, i32 0 ; <float*> [#uses=0]
+ %1 = fsub float 0.000000e+00, undef ; <float> [#uses=1]
+ %2 = getelementptr inbounds %quuz* %b, i32 0, i32 1, i32 0, i32 1 ; <float*> [#uses=2]
+ %3 = load float* %2, align 4 ; <float> [#uses=1]
+ %4 = getelementptr inbounds %quuz* %a, i32 0, i32 1, i32 0, i32 1 ; <float*> [#uses=1]
+ %5 = fsub float %3, undef ; <float> [#uses=2]
+ %6 = getelementptr inbounds %quuz* %b, i32 0, i32 1, i32 0, i32 2 ; <float*> [#uses=2]
+ %7 = load float* %6, align 4 ; <float> [#uses=1]
+ %8 = fsub float %7, undef ; <float> [#uses=1]
+ %9 = getelementptr inbounds %quuz* %c, i32 0, i32 1, i32 0, i32 0 ; <float*> [#uses=2]
+ %10 = load float* %9, align 4 ; <float> [#uses=1]
+ %11 = fsub float %10, undef ; <float> [#uses=2]
+ %12 = getelementptr inbounds %quuz* %c, i32 0, i32 1, i32 0, i32 1 ; <float*> [#uses=2]
+ %13 = load float* %12, align 4 ; <float> [#uses=1]
+ %14 = fsub float %13, undef ; <float> [#uses=1]
+ %15 = load float* undef, align 4 ; <float> [#uses=1]
+ %16 = fsub float %15, undef ; <float> [#uses=1]
+ %17 = fmul float %5, %16 ; <float> [#uses=1]
+ %18 = fsub float %17, 0.000000e+00 ; <float> [#uses=5]
+ %19 = fmul float %8, %11 ; <float> [#uses=1]
+ %20 = fsub float %19, undef ; <float> [#uses=3]
+ %21 = fmul float %1, %14 ; <float> [#uses=1]
+ %22 = fmul float %5, %11 ; <float> [#uses=1]
+ %23 = fsub float %21, %22 ; <float> [#uses=2]
+ store float %18, float* undef
+ %24 = getelementptr inbounds %bar* null, i32 0, i32 0, i32 0, i32 1 ; <float*> [#uses=2]
+ store float %20, float* %24
+ store float %23, float* undef
+ %25 = getelementptr inbounds %bar* null, i32 0, i32 0, i32 0, i32 3 ; <float*> [#uses=0]
+ %26 = fmul float %18, %18 ; <float> [#uses=1]
+ %27 = fadd float %26, undef ; <float> [#uses=1]
+ %28 = fadd float %27, undef ; <float> [#uses=1]
+ %29 = call arm_aapcs_vfpcc float @sqrtf(float %28) readnone ; <float> [#uses=1]
+ %30 = load float* null, align 4 ; <float> [#uses=2]
+ %31 = load float* %4, align 4 ; <float> [#uses=2]
+ %32 = load float* %2, align 4 ; <float> [#uses=2]
+ %33 = load float* null, align 4 ; <float> [#uses=3]
+ %34 = load float* %6, align 4 ; <float> [#uses=2]
+ %35 = fsub float %33, %34 ; <float> [#uses=2]
+ %36 = fmul float %20, %35 ; <float> [#uses=1]
+ %37 = fsub float %36, undef ; <float> [#uses=1]
+ %38 = fmul float %23, 0.000000e+00 ; <float> [#uses=1]
+ %39 = fmul float %18, %35 ; <float> [#uses=1]
+ %40 = fsub float %38, %39 ; <float> [#uses=1]
+ %41 = fmul float %18, 0.000000e+00 ; <float> [#uses=1]
+ %42 = fmul float %20, 0.000000e+00 ; <float> [#uses=1]
+ %43 = fsub float %41, %42 ; <float> [#uses=1]
+ %44 = fmul float 0.000000e+00, %37 ; <float> [#uses=1]
+ %45 = fmul float %31, %40 ; <float> [#uses=1]
+ %46 = fadd float %44, %45 ; <float> [#uses=1]
+ %47 = fmul float %33, %43 ; <float> [#uses=1]
+ %48 = fadd float %46, %47 ; <float> [#uses=2]
+ %49 = load float* %9, align 4 ; <float> [#uses=2]
+ %50 = fsub float %30, %49 ; <float> [#uses=1]
+ %51 = load float* %12, align 4 ; <float> [#uses=3]
+ %52 = fsub float %32, %51 ; <float> [#uses=2]
+ %53 = load float* undef, align 4 ; <float> [#uses=2]
+ %54 = load float* %24, align 4 ; <float> [#uses=2]
+ %55 = fmul float %54, undef ; <float> [#uses=1]
+ %56 = fmul float undef, %52 ; <float> [#uses=1]
+ %57 = fsub float %55, %56 ; <float> [#uses=1]
+ %58 = fmul float undef, %52 ; <float> [#uses=1]
+ %59 = fmul float %54, %50 ; <float> [#uses=1]
+ %60 = fsub float %58, %59 ; <float> [#uses=1]
+ %61 = fmul float %30, %57 ; <float> [#uses=1]
+ %62 = fmul float %32, 0.000000e+00 ; <float> [#uses=1]
+ %63 = fadd float %61, %62 ; <float> [#uses=1]
+ %64 = fmul float %34, %60 ; <float> [#uses=1]
+ %65 = fadd float %63, %64 ; <float> [#uses=2]
+ %66 = fcmp olt float %48, %65 ; <i1> [#uses=1]
+ %67 = fsub float %49, 0.000000e+00 ; <float> [#uses=1]
+ %68 = fsub float %51, %31 ; <float> [#uses=1]
+ %69 = fsub float %53, %33 ; <float> [#uses=1]
+ %70 = fmul float undef, %67 ; <float> [#uses=1]
+ %71 = load float* undef, align 4 ; <float> [#uses=2]
+ %72 = fmul float %71, %69 ; <float> [#uses=1]
+ %73 = fsub float %70, %72 ; <float> [#uses=1]
+ %74 = fmul float %71, %68 ; <float> [#uses=1]
+ %75 = fsub float %74, 0.000000e+00 ; <float> [#uses=1]
+ %76 = fmul float %51, %73 ; <float> [#uses=1]
+ %77 = fadd float undef, %76 ; <float> [#uses=1]
+ %78 = fmul float %53, %75 ; <float> [#uses=1]
+ %79 = fadd float %77, %78 ; <float> [#uses=1]
+ %80 = select i1 %66, float %48, float %65 ; <float> [#uses=1]
+ %81 = select i1 undef, float %80, float %79 ; <float> [#uses=1]
+ %iftmp.164.0 = select i1 undef, float %29, float 1.000000e+00 ; <float> [#uses=1]
+ %82 = fdiv float %81, %iftmp.164.0 ; <float> [#uses=1]
+ %iftmp.165.0 = select i1 undef, float %82, float 0.000000e+00 ; <float> [#uses=1]
+ store float %iftmp.165.0, float* undef, align 4
+ br i1 false, label %bb4.i97, label %ccc.exit98
+
+bb4.i97: ; preds = %bb3.i
+ br label %ccc.exit98
+
+ccc.exit98: ; preds = %bb4.i97, %bb3.i
+ ret %bar* null
+
+bb85: ; preds = %entry
+ ret %bar* null
+}
+
+declare arm_aapcs_vfpcc float @sqrtf(float) readnone
diff --git a/test/CodeGen/ARM/2009-11-13-VRRewriterCrash.ll b/test/CodeGen/ARM/2009-11-13-VRRewriterCrash.ll
new file mode 100644
index 0000000..832ff4f
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-13-VRRewriterCrash.ll
@@ -0,0 +1,113 @@
+; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 < %s
+; PR5412
+; rdar://7384107
+
+%bar = type { %quad, float, float, [3 x %quuz*], [3 x %bar*], [2 x %bar*], [3 x i8], i8 }
+%baz = type { %bar*, i32 }
+%foo = type { i8, %quux, %quad, float, [64 x %quuz], [128 x %bar], i32, %baz, %baz }
+%quad = type { [4 x float] }
+%quux = type { [4 x %quuz*], [4 x float], i32 }
+%quuz = type { %quad, %quad }
+
+define arm_aapcs_vfpcc %bar* @aaa(%foo* nocapture %this, %quuz* %a, %quuz* %b, %quuz* %c, i8 zeroext %forced) {
+entry:
+ %0 = load %bar** undef, align 4 ; <%bar*> [#uses=2]
+ br i1 false, label %bb85, label %bb
+
+bb: ; preds = %entry
+ br i1 undef, label %bb3.i, label %bb2.i
+
+bb2.i: ; preds = %bb
+ br label %bb3.i
+
+bb3.i: ; preds = %bb2.i, %bb
+ %1 = getelementptr inbounds %quuz* %a, i32 0, i32 1, i32 0, i32 0 ; <float*> [#uses=1]
+ %2 = fsub float 0.000000e+00, undef ; <float> [#uses=1]
+ %3 = getelementptr inbounds %quuz* %b, i32 0, i32 1, i32 0, i32 1 ; <float*> [#uses=1]
+ %4 = getelementptr inbounds %quuz* %b, i32 0, i32 1, i32 0, i32 2 ; <float*> [#uses=1]
+ %5 = fsub float 0.000000e+00, undef ; <float> [#uses=1]
+ %6 = getelementptr inbounds %quuz* %c, i32 0, i32 1, i32 0, i32 0 ; <float*> [#uses=1]
+ %7 = getelementptr inbounds %quuz* %c, i32 0, i32 1, i32 0, i32 1 ; <float*> [#uses=1]
+ %8 = fsub float undef, undef ; <float> [#uses=1]
+ %9 = fmul float 0.000000e+00, %8 ; <float> [#uses=1]
+ %10 = fmul float %5, 0.000000e+00 ; <float> [#uses=1]
+ %11 = fsub float %9, %10 ; <float> [#uses=3]
+ %12 = fmul float %2, 0.000000e+00 ; <float> [#uses=1]
+ %13 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
+ %14 = fsub float %12, %13 ; <float> [#uses=2]
+ store float %14, float* undef
+ %15 = getelementptr inbounds %bar* %0, i32 0, i32 0, i32 0, i32 3 ; <float*> [#uses=1]
+ store float 0.000000e+00, float* %15
+ %16 = fmul float %11, %11 ; <float> [#uses=1]
+ %17 = fadd float %16, 0.000000e+00 ; <float> [#uses=1]
+ %18 = fadd float %17, undef ; <float> [#uses=1]
+ %19 = call arm_aapcs_vfpcc float @sqrtf(float %18) readnone ; <float> [#uses=2]
+ %20 = fcmp ogt float %19, 0x3F1A36E2E0000000 ; <i1> [#uses=1]
+ %21 = load float* %1, align 4 ; <float> [#uses=2]
+ %22 = load float* %3, align 4 ; <float> [#uses=2]
+ %23 = load float* undef, align 4 ; <float> [#uses=2]
+ %24 = load float* %4, align 4 ; <float> [#uses=2]
+ %25 = fsub float %23, %24 ; <float> [#uses=2]
+ %26 = fmul float 0.000000e+00, %25 ; <float> [#uses=1]
+ %27 = fsub float %26, undef ; <float> [#uses=1]
+ %28 = fmul float %14, 0.000000e+00 ; <float> [#uses=1]
+ %29 = fmul float %11, %25 ; <float> [#uses=1]
+ %30 = fsub float %28, %29 ; <float> [#uses=1]
+ %31 = fsub float undef, 0.000000e+00 ; <float> [#uses=1]
+ %32 = fmul float %21, %27 ; <float> [#uses=1]
+ %33 = fmul float undef, %30 ; <float> [#uses=1]
+ %34 = fadd float %32, %33 ; <float> [#uses=1]
+ %35 = fmul float %23, %31 ; <float> [#uses=1]
+ %36 = fadd float %34, %35 ; <float> [#uses=1]
+ %37 = load float* %6, align 4 ; <float> [#uses=2]
+ %38 = load float* %7, align 4 ; <float> [#uses=2]
+ %39 = fsub float %22, %38 ; <float> [#uses=2]
+ %40 = load float* undef, align 4 ; <float> [#uses=1]
+ %41 = load float* null, align 4 ; <float> [#uses=2]
+ %42 = fmul float %41, undef ; <float> [#uses=1]
+ %43 = fmul float undef, %39 ; <float> [#uses=1]
+ %44 = fsub float %42, %43 ; <float> [#uses=1]
+ %45 = fmul float undef, %39 ; <float> [#uses=1]
+ %46 = fmul float %41, 0.000000e+00 ; <float> [#uses=1]
+ %47 = fsub float %45, %46 ; <float> [#uses=1]
+ %48 = fmul float 0.000000e+00, %44 ; <float> [#uses=1]
+ %49 = fmul float %22, undef ; <float> [#uses=1]
+ %50 = fadd float %48, %49 ; <float> [#uses=1]
+ %51 = fmul float %24, %47 ; <float> [#uses=1]
+ %52 = fadd float %50, %51 ; <float> [#uses=1]
+ %53 = fsub float %37, %21 ; <float> [#uses=2]
+ %54 = fmul float undef, undef ; <float> [#uses=1]
+ %55 = fmul float undef, undef ; <float> [#uses=1]
+ %56 = fsub float %54, %55 ; <float> [#uses=1]
+ %57 = fmul float undef, %53 ; <float> [#uses=1]
+ %58 = load float* undef, align 4 ; <float> [#uses=2]
+ %59 = fmul float %58, undef ; <float> [#uses=1]
+ %60 = fsub float %57, %59 ; <float> [#uses=1]
+ %61 = fmul float %58, undef ; <float> [#uses=1]
+ %62 = fmul float undef, %53 ; <float> [#uses=1]
+ %63 = fsub float %61, %62 ; <float> [#uses=1]
+ %64 = fmul float %37, %56 ; <float> [#uses=1]
+ %65 = fmul float %38, %60 ; <float> [#uses=1]
+ %66 = fadd float %64, %65 ; <float> [#uses=1]
+ %67 = fmul float %40, %63 ; <float> [#uses=1]
+ %68 = fadd float %66, %67 ; <float> [#uses=1]
+ %69 = select i1 undef, float %36, float %52 ; <float> [#uses=1]
+ %70 = select i1 undef, float %69, float %68 ; <float> [#uses=1]
+ %iftmp.164.0 = select i1 %20, float %19, float 1.000000e+00 ; <float> [#uses=1]
+ %71 = fdiv float %70, %iftmp.164.0 ; <float> [#uses=1]
+ store float %71, float* null, align 4
+ %72 = icmp eq %bar* null, %0 ; <i1> [#uses=1]
+ br i1 %72, label %bb4.i97, label %ccc.exit98
+
+bb4.i97: ; preds = %bb3.i
+ %73 = load %bar** undef, align 4 ; <%bar*> [#uses=0]
+ br label %ccc.exit98
+
+ccc.exit98: ; preds = %bb4.i97, %bb3.i
+ ret %bar* null
+
+bb85: ; preds = %entry
+ ret %bar* null
+}
+
+declare arm_aapcs_vfpcc float @sqrtf(float) readnone
diff --git a/test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll b/test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll
new file mode 100644
index 0000000..efe74cf
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll
@@ -0,0 +1,41 @@
+; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 < %s
+; PR5614
+
+%"als" = type { i32 (...)** }
+%"av" = type { %"als" }
+%"c" = type { %"lsm", %"Vec3", %"av"*, float, i8, float, %"lsm", i8, %"Vec3", %"Vec3", %"Vec3", float, float, float, %"Vec3", %"Vec3" }
+%"lsm" = type { %"als", %"Vec3", %"Vec3", %"Vec3", %"Vec3" }
+%"Vec3" = type { float, float, float }
+
+define arm_aapcs_vfpcc void @foo(%"c"* %this, %"Vec3"* nocapture %adjustment) {
+entry:
+ switch i32 undef, label %return [
+ i32 1, label %bb
+ i32 2, label %bb72
+ i32 3, label %bb31
+ i32 4, label %bb79
+ i32 5, label %bb104
+ ]
+
+bb: ; preds = %entry
+ ret void
+
+bb31: ; preds = %entry
+ %0 = call arm_aapcs_vfpcc %"Vec3" undef(%"lsm"* undef) ; <%"Vec3"> [#uses=1]
+ %mrv_gr69 = extractvalue %"Vec3" %0, 1 ; <float> [#uses=1]
+ %1 = fsub float %mrv_gr69, undef ; <float> [#uses=1]
+ store float %1, float* undef, align 4
+ ret void
+
+bb72: ; preds = %entry
+ ret void
+
+bb79: ; preds = %entry
+ ret void
+
+bb104: ; preds = %entry
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/2009-12-02-vtrn-undef.ll b/test/CodeGen/ARM/2009-12-02-vtrn-undef.ll
new file mode 100644
index 0000000..a737591
--- /dev/null
+++ b/test/CodeGen/ARM/2009-12-02-vtrn-undef.ll
@@ -0,0 +1,19 @@
+; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+target triple = "armv7-apple-darwin10"
+
+%struct.int16x8_t = type { <8 x i16> }
+%struct.int16x8x2_t = type { [2 x %struct.int16x8_t] }
+
+define arm_apcscc void @t(%struct.int16x8x2_t* noalias nocapture sret %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
+entry:
+;CHECK: vtrn.16
+ %0 = shufflevector <8 x i16> %tmp.0, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>
+ %1 = shufflevector <8 x i16> %tmp.0, <8 x i16> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7>
+ %agg.result1218.0 = getelementptr %struct.int16x8x2_t* %agg.result, i32 0, i32 0, i32 0, i32 0 ; <<8 x i16>*>
+ store <8 x i16> %0, <8 x i16>* %agg.result1218.0, align 16
+ %agg.result12.1.0 = getelementptr %struct.int16x8x2_t* %agg.result, i32 0, i32 0, i32 1, i32 0 ; <<8 x i16>*>
+ store <8 x i16> %1, <8 x i16>* %agg.result12.1.0, align 16
+ ret void
+}
diff --git a/test/CodeGen/ARM/addrmode.ll b/test/CodeGen/ARM/addrmode.ll
new file mode 100644
index 0000000..9ccff07
--- /dev/null
+++ b/test/CodeGen/ARM/addrmode.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=arm -stats |& grep asm-printer | grep 4
+
+define i32 @t1(i32 %a) {
+ %b = mul i32 %a, 9
+ %c = inttoptr i32 %b to i32*
+ %d = load i32* %c
+ ret i32 %d
+}
+
+define i32 @t2(i32 %a) {
+ %b = mul i32 %a, -7
+ %c = inttoptr i32 %b to i32*
+ %d = load i32* %c
+ ret i32 %d
+}
diff --git a/test/CodeGen/ARM/aliases.ll b/test/CodeGen/ARM/aliases.ll
new file mode 100644
index 0000000..31c5007
--- /dev/null
+++ b/test/CodeGen/ARM/aliases.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -o %t
+; RUN: grep { = } %t | count 5
+; RUN: grep globl %t | count 4
+; RUN: grep weak %t | count 1
+
+@bar = external global i32
+@foo1 = alias i32* @bar
+@foo2 = alias i32* @bar
+
+%FunTy = type i32()
+
+declare i32 @foo_f()
+@bar_f = alias weak %FunTy* @foo_f
+
+@bar_i = alias internal i32* @bar
+
+@A = alias bitcast (i32* @bar to i64*)
+
+define i32 @test() {
+entry:
+ %tmp = load i32* @foo1
+ %tmp1 = load i32* @foo2
+ %tmp0 = load i32* @bar_i
+ %tmp2 = call i32 @foo_f()
+ %tmp3 = add i32 %tmp, %tmp2
+ %tmp4 = call %FunTy* @bar_f()
+ %tmp5 = add i32 %tmp3, %tmp4
+ %tmp6 = add i32 %tmp1, %tmp5
+ %tmp7 = add i32 %tmp6, %tmp0
+ ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/align.ll b/test/CodeGen/ARM/align.ll
new file mode 100644
index 0000000..d4d01288
--- /dev/null
+++ b/test/CodeGen/ARM/align.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=ELF
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
+
+@a = global i1 true
+; no alignment
+
+@b = global i8 1
+; no alignment
+
+@c = global i16 2
+;ELF: .align 1
+;ELF: c:
+;DARWIN: .align 1
+;DARWIN: _c:
+
+@d = global i32 3
+;ELF: .align 2
+;ELF: d:
+;DARWIN: .align 2
+;DARWIN: _d:
+
+@e = global i64 4
+;ELF: .align 3
+;ELF: e
+;DARWIN: .align 2
+;DARWIN: _e:
+
+@f = global float 5.0
+;ELF: .align 2
+;ELF: f:
+;DARWIN: .align 2
+;DARWIN: _f:
+
+@g = global double 6.0
+;ELF: .align 3
+;ELF: g:
+;DARWIN: .align 2
+;DARWIN: _g:
+
+@bar = common global [75 x i8] zeroinitializer, align 128
+;ELF: .comm bar,75,128
+;DARWIN: .comm _bar,75,7
diff --git a/test/CodeGen/ARM/alloca.ll b/test/CodeGen/ARM/alloca.ll
new file mode 100644
index 0000000..82a8c98
--- /dev/null
+++ b/test/CodeGen/ARM/alloca.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | FileCheck %s
+
+define void @f(i32 %a) {
+entry:
+; CHECK: mov r11, sp
+ %tmp = alloca i8, i32 %a ; <i8*> [#uses=1]
+ call void @g( i8* %tmp, i32 %a, i32 1, i32 2, i32 3 )
+ ret void
+; CHECK: mov sp, r11
+}
+
+declare void @g(i8*, i32, i32, i32, i32)
diff --git a/test/CodeGen/ARM/argaddr.ll b/test/CodeGen/ARM/argaddr.ll
new file mode 100644
index 0000000..116a32f
--- /dev/null
+++ b/test/CodeGen/ARM/argaddr.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=arm
+
+define void @f(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
+entry:
+ %a_addr = alloca i32 ; <i32*> [#uses=2]
+ %b_addr = alloca i32 ; <i32*> [#uses=2]
+ %c_addr = alloca i32 ; <i32*> [#uses=2]
+ %d_addr = alloca i32 ; <i32*> [#uses=2]
+ %e_addr = alloca i32 ; <i32*> [#uses=2]
+ store i32 %a, i32* %a_addr
+ store i32 %b, i32* %b_addr
+ store i32 %c, i32* %c_addr
+ store i32 %d, i32* %d_addr
+ store i32 %e, i32* %e_addr
+ call void @g( i32* %a_addr, i32* %b_addr, i32* %c_addr, i32* %d_addr, i32* %e_addr )
+ ret void
+}
+
+declare void @g(i32*, i32*, i32*, i32*, i32*)
diff --git a/test/CodeGen/ARM/arguments-nosplit-double.ll b/test/CodeGen/ARM/arguments-nosplit-double.ll
new file mode 100644
index 0000000..770e41d
--- /dev/null
+++ b/test/CodeGen/ARM/arguments-nosplit-double.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | not grep r3
+; PR4059
+
+define i32 @f(i64 %z, i32 %a, double %b) {
+ %tmp = call i32 @g(double %b)
+ ret i32 %tmp
+}
+
+declare i32 @g(double)
diff --git a/test/CodeGen/ARM/arguments-nosplit-i64.ll b/test/CodeGen/ARM/arguments-nosplit-i64.ll
new file mode 100644
index 0000000..815edfd
--- /dev/null
+++ b/test/CodeGen/ARM/arguments-nosplit-i64.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | not grep r3
+; PR4058
+
+define i32 @f(i64 %z, i32 %a, i64 %b) {
+ %tmp = call i32 @g(i64 %b)
+ ret i32 %tmp
+}
+
+declare i32 @g(i64)
diff --git a/test/CodeGen/ARM/arguments.ll b/test/CodeGen/ARM/arguments.ll
new file mode 100644
index 0000000..cc71839
--- /dev/null
+++ b/test/CodeGen/ARM/arguments.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=ELF
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
+
+define i32 @f(i32 %a, i64 %b) {
+; ELF: mov r0, r2
+; DARWIN: mov r0, r1
+ %tmp = call i32 @g(i64 %b)
+ ret i32 %tmp
+}
+
+declare i32 @g(i64)
diff --git a/test/CodeGen/ARM/arguments2.ll b/test/CodeGen/ARM/arguments2.ll
new file mode 100644
index 0000000..a515ad7
--- /dev/null
+++ b/test/CodeGen/ARM/arguments2.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+define i32 @f(i32 %a, i128 %b) {
+ %tmp = call i32 @g(i128 %b)
+ ret i32 %tmp
+}
+
+declare i32 @g(i128)
diff --git a/test/CodeGen/ARM/arguments3.ll b/test/CodeGen/ARM/arguments3.ll
new file mode 100644
index 0000000..58f64c6
--- /dev/null
+++ b/test/CodeGen/ARM/arguments3.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+define i64 @f(i32 %a, i128 %b) {
+ %tmp = call i64 @g(i128 %b)
+ ret i64 %tmp
+}
+
+declare i64 @g(i128)
diff --git a/test/CodeGen/ARM/arguments4.ll b/test/CodeGen/ARM/arguments4.ll
new file mode 100644
index 0000000..f5f4207
--- /dev/null
+++ b/test/CodeGen/ARM/arguments4.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+define float @f(i32 %a, i128 %b) {
+ %tmp = call float @g(i128 %b)
+ ret float %tmp
+}
+
+declare float @g(i128)
diff --git a/test/CodeGen/ARM/arguments5.ll b/test/CodeGen/ARM/arguments5.ll
new file mode 100644
index 0000000..388a8eb
--- /dev/null
+++ b/test/CodeGen/ARM/arguments5.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+define double @f(i32 %a, i128 %b) {
+ %tmp = call double @g(i128 %b)
+ ret double %tmp
+}
+
+declare double @g(i128)
diff --git a/test/CodeGen/ARM/arguments6.ll b/test/CodeGen/ARM/arguments6.ll
new file mode 100644
index 0000000..3f757fe
--- /dev/null
+++ b/test/CodeGen/ARM/arguments6.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+define i128 @f(i32 %a, i128 %b) {
+ %tmp = call i128 @g(i128 %b)
+ ret i128 %tmp
+}
+
+declare i128 @g(i128)
diff --git a/test/CodeGen/ARM/arguments7.ll b/test/CodeGen/ARM/arguments7.ll
new file mode 100644
index 0000000..038e417
--- /dev/null
+++ b/test/CodeGen/ARM/arguments7.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+define double @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, double %b) {
+ %tmp = call double @g(i32 %a2, i32 %a3, i32 %a4, i32 %a5, double %b)
+ ret double %tmp
+}
+
+declare double @g(double)
diff --git a/test/CodeGen/ARM/arguments8.ll b/test/CodeGen/ARM/arguments8.ll
new file mode 100644
index 0000000..6999a4d
--- /dev/null
+++ b/test/CodeGen/ARM/arguments8.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi
+; RUN: llc < %s -mtriple=arm-apple-darwin
+
+define i64 @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i64 %b) {
+ %tmp = call i64 @g(i32 %a2, i32 %a3, i32 %a4, i32 %a5, i64 %b)
+ ret i64 %tmp
+}
+
+declare i64 @g(i64)
diff --git a/test/CodeGen/ARM/arguments_f64_backfill.ll b/test/CodeGen/ARM/arguments_f64_backfill.ll
new file mode 100644
index 0000000..062133e
--- /dev/null
+++ b/test/CodeGen/ARM/arguments_f64_backfill.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | FileCheck %s
+
+define float @f(float %z, double %a, float %b) {
+; CHECK: vmov.f32 s0, s1
+ %tmp = call float @g(float %b)
+ ret float %tmp
+}
+
+declare float @g(float)
diff --git a/test/CodeGen/ARM/arm-asm.ll b/test/CodeGen/ARM/arm-asm.ll
new file mode 100644
index 0000000..2e35e39
--- /dev/null
+++ b/test/CodeGen/ARM/arm-asm.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=arm
+
+define void @frame_dummy() {
+entry:
+ %tmp1 = tail call void (i8*)* (void (i8*)*)* asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"( void (i8*)* null ) ; <void (i8*)*> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/arm-frameaddr.ll b/test/CodeGen/ARM/arm-frameaddr.ll
new file mode 100644
index 0000000..2739860
--- /dev/null
+++ b/test/CodeGen/ARM/arm-frameaddr.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin | grep mov | grep r7
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | grep r11
+; PR4344
+; PR4416
+
+define arm_aapcscc i8* @t() nounwind {
+entry:
+ %0 = call i8* @llvm.frameaddress(i32 0)
+ ret i8* %0
+}
+
+declare i8* @llvm.frameaddress(i32) nounwind readnone
diff --git a/test/CodeGen/ARM/arm-negative-stride.ll b/test/CodeGen/ARM/arm-negative-stride.ll
new file mode 100644
index 0000000..72ec8ef
--- /dev/null
+++ b/test/CodeGen/ARM/arm-negative-stride.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define void @test(i32* %P, i32 %A, i32 %i) nounwind {
+entry:
+; CHECK: str r1, [{{r.*}}, -{{r.*}}, lsl #2]
+ icmp eq i32 %i, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %return, label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %i_addr.09.0 = sub i32 %i, %indvar ; <i32> [#uses=1]
+ %tmp2 = getelementptr i32* %P, i32 %i_addr.09.0 ; <i32*> [#uses=1]
+ store i32 %A, i32* %tmp2
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ icmp eq i32 %indvar.next, %i ; <i1>:1 [#uses=1]
+ br i1 %1, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
diff --git a/test/CodeGen/ARM/bfc.ll b/test/CodeGen/ARM/bfc.ll
new file mode 100644
index 0000000..c4a44b4
--- /dev/null
+++ b/test/CodeGen/ARM/bfc.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
+
+; 4278190095 = 0xff00000f
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: bfc
+ %tmp = and i32 %a, 4278190095
+ ret i32 %tmp
+}
+
+; 4286578688 = 0xff800000
+define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: bfc
+ %tmp = and i32 %a, 4286578688
+ ret i32 %tmp
+}
+
+; 4095 = 0x00000fff
+define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: bfc
+ %tmp = and i32 %a, 4095
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/ARM/bic.ll b/test/CodeGen/ARM/bic.ll
new file mode 100644
index 0000000..1dfd627
--- /dev/null
+++ b/test/CodeGen/ARM/bic.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+ %tmp = xor i32 %b, 4294967295
+ %tmp1 = and i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+; CHECK: bic r0, r0, r1
+
+define i32 @f2(i32 %a, i32 %b) {
+ %tmp = xor i32 %b, 4294967295
+ %tmp1 = and i32 %tmp, %a
+ ret i32 %tmp1
+}
+
+; CHECK: bic r0, r0, r1
diff --git a/test/CodeGen/ARM/bits.ll b/test/CodeGen/ARM/bits.ll
new file mode 100644
index 0000000..9e94efe
--- /dev/null
+++ b/test/CodeGen/ARM/bits.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=arm > %t
+; RUN: grep and %t | count 1
+; RUN: grep orr %t | count 1
+; RUN: grep eor %t | count 1
+; RUN: grep mov.*lsl %t | count 1
+; RUN: grep mov.*asr %t | count 1
+
+define i32 @f1(i32 %a, i32 %b) {
+entry:
+ %tmp2 = and i32 %b, %a ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+entry:
+ %tmp2 = or i32 %b, %a ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+entry:
+ %tmp2 = xor i32 %b, %a ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+entry:
+ %tmp3 = shl i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+entry:
+ %tmp3 = ashr i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
diff --git a/test/CodeGen/ARM/bx_fold.ll b/test/CodeGen/ARM/bx_fold.ll
new file mode 100644
index 0000000..0e3e070
--- /dev/null
+++ b/test/CodeGen/ARM/bx_fold.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm | not grep bx
+
+define void @test(i32 %Ptr, i8* %L) {
+entry:
+ br label %bb1
+
+bb: ; preds = %bb1
+ %gep.upgrd.1 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %tmp7 = getelementptr i8* %L, i64 %gep.upgrd.1 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp7
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %i.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
+ %tmp = tail call i32 (...)* @bar( ) ; <i32> [#uses=1]
+ %tmp2 = add i32 %i.0, %tmp ; <i32> [#uses=1]
+ %Ptr_addr.0 = sub i32 %Ptr, %tmp2 ; <i32> [#uses=0]
+ %tmp12 = icmp eq i32 %i.0, %Ptr ; <i1> [#uses=1]
+ %tmp12.not = xor i1 %tmp12, true ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp12.not, false ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb, label %bb18
+
+bb18: ; preds = %bb1
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/call.ll b/test/CodeGen/ARM/call.ll
new file mode 100644
index 0000000..3dd66ae
--- /dev/null
+++ b/test/CodeGen/ARM/call.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECKV4
+; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\
+; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF
+
+@t = weak global i32 ()* null ; <i32 ()**> [#uses=1]
+
+declare void @g(i32, i32, i32, i32)
+
+define void @f() {
+; CHECKV4: mov lr, pc
+; CHECKV5: blx
+; CHECKELF: PLT
+ call void @g( i32 1, i32 2, i32 3, i32 4 )
+ ret void
+}
+
+define void @g.upgrd.1() {
+ %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1]
+ %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/call_nolink.ll b/test/CodeGen/ARM/call_nolink.ll
new file mode 100644
index 0000000..efe29d8
--- /dev/null
+++ b/test/CodeGen/ARM/call_nolink.ll
@@ -0,0 +1,52 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: not grep {bx lr}
+
+ %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
+@r = external global [14 x i32] ; <[14 x i32]*> [#uses=4]
+@isa = external global [13 x %struct.anon] ; <[13 x %struct.anon]*> [#uses=1]
+@pgm = external global [2 x { i32, [3 x i32] }] ; <[2 x { i32, [3 x i32] }]*> [#uses=4]
+@numi = external global i32 ; <i32*> [#uses=1]
+@counter = external global [2 x i32] ; <[2 x i32]*> [#uses=1]
+
+
+define void @main_bb_2E_i_bb205_2E_i_2E_i_bb115_2E_i_2E_i() {
+newFuncRoot:
+ br label %bb115.i.i
+
+bb115.i.i.bb170.i.i_crit_edge.exitStub: ; preds = %bb115.i.i
+ ret void
+
+bb115.i.i.bb115.i.i_crit_edge: ; preds = %bb115.i.i
+ br label %bb115.i.i
+
+bb115.i.i: ; preds = %bb115.i.i.bb115.i.i_crit_edge, %newFuncRoot
+ %i_addr.3210.0.i.i = phi i32 [ %tmp166.i.i, %bb115.i.i.bb115.i.i_crit_edge ], [ 0, %newFuncRoot ] ; <i32> [#uses=7]
+ %tmp124.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 0 ; <i32*> [#uses=1]
+ %tmp125.i.i = load i32* %tmp124.i.i ; <i32> [#uses=1]
+ %tmp126.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp125.i.i ; <i32*> [#uses=1]
+ %tmp127.i.i = load i32* %tmp126.i.i ; <i32> [#uses=1]
+ %tmp131.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 1 ; <i32*> [#uses=1]
+ %tmp132.i.i = load i32* %tmp131.i.i ; <i32> [#uses=1]
+ %tmp133.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp132.i.i ; <i32*> [#uses=1]
+ %tmp134.i.i = load i32* %tmp133.i.i ; <i32> [#uses=1]
+ %tmp138.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 2 ; <i32*> [#uses=1]
+ %tmp139.i.i = load i32* %tmp138.i.i ; <i32> [#uses=1]
+ %tmp140.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp139.i.i ; <i32*> [#uses=1]
+ %tmp141.i.i = load i32* %tmp140.i.i ; <i32> [#uses=1]
+ %tmp143.i.i = add i32 %i_addr.3210.0.i.i, 12 ; <i32> [#uses=1]
+ %tmp146.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 0 ; <i32*> [#uses=1]
+ %tmp147.i.i = load i32* %tmp146.i.i ; <i32> [#uses=1]
+ %tmp149.i.i = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 %tmp147.i.i, i32 0 ; <i32 (i32, i32, i32)**> [#uses=1]
+ %tmp150.i.i = load i32 (i32, i32, i32)** %tmp149.i.i ; <i32 (i32, i32, i32)*> [#uses=1]
+ %tmp154.i.i = tail call i32 %tmp150.i.i( i32 %tmp127.i.i, i32 %tmp134.i.i, i32 %tmp141.i.i ) ; <i32> [#uses=1]
+ %tmp155.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp143.i.i ; <i32*> [#uses=1]
+ store i32 %tmp154.i.i, i32* %tmp155.i.i
+ %tmp159.i.i = getelementptr [2 x i32]* @counter, i32 0, i32 %i_addr.3210.0.i.i ; <i32*> [#uses=2]
+ %tmp160.i.i = load i32* %tmp159.i.i ; <i32> [#uses=1]
+ %tmp161.i.i = add i32 %tmp160.i.i, 1 ; <i32> [#uses=1]
+ store i32 %tmp161.i.i, i32* %tmp159.i.i
+ %tmp166.i.i = add i32 %i_addr.3210.0.i.i, 1 ; <i32> [#uses=2]
+ %tmp168.i.i = load i32* @numi ; <i32> [#uses=1]
+ icmp slt i32 %tmp166.i.i, %tmp168.i.i ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb115.i.i.bb115.i.i_crit_edge, label %bb115.i.i.bb170.i.i_crit_edge.exitStub
+}
diff --git a/test/CodeGen/ARM/carry.ll b/test/CodeGen/ARM/carry.ll
new file mode 100644
index 0000000..a6a7ed6
--- /dev/null
+++ b/test/CodeGen/ARM/carry.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i64 @f1(i64 %a, i64 %b) {
+; CHECK: f1:
+; CHECK: subs r
+; CHECK: sbc r
+entry:
+ %tmp = sub i64 %a, %b
+ ret i64 %tmp
+}
+
+define i64 @f2(i64 %a, i64 %b) {
+; CHECK: f2:
+; CHECK: adc r
+; CHECK: subs r
+; CHECK: sbc r
+entry:
+ %tmp1 = shl i64 %a, 1
+ %tmp2 = sub i64 %tmp1, %b
+ ret i64 %tmp2
+}
diff --git a/test/CodeGen/ARM/clz.ll b/test/CodeGen/ARM/clz.ll
new file mode 100644
index 0000000..d2235c9
--- /dev/null
+++ b/test/CodeGen/ARM/clz.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=arm -mattr=+v5t | grep clz
+
+declare i32 @llvm.ctlz.i32(i32)
+
+define i32 @test(i32 %x) {
+ %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x ) ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
diff --git a/test/CodeGen/ARM/compare-call.ll b/test/CodeGen/ARM/compare-call.ll
new file mode 100644
index 0000000..fac2bc5
--- /dev/null
+++ b/test/CodeGen/ARM/compare-call.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \
+; RUN: grep vcmpe.f32
+
+define void @test3(float* %glob, i32 %X) {
+entry:
+ %tmp = load float* %glob ; <float> [#uses=1]
+ %tmp2 = getelementptr float* %glob, i32 2 ; <float*> [#uses=1]
+ %tmp3 = load float* %tmp2 ; <float> [#uses=1]
+ %tmp.upgrd.1 = fcmp ogt float %tmp, %tmp3 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.1, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ %tmp.upgrd.2 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll
new file mode 100644
index 0000000..ce91936
--- /dev/null
+++ b/test/CodeGen/ARM/constants.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i32 @f1() {
+; CHECK: f1
+; CHECK: mov r0, #0
+ ret i32 0
+}
+
+define i32 @f2() {
+; CHECK: f2
+; CHECK: mov r0, #255
+ ret i32 255
+}
+
+define i32 @f3() {
+; CHECK: f3
+; CHECK: mov r0{{.*}}256
+ ret i32 256
+}
+
+define i32 @f4() {
+; CHECK: f4
+; CHECK: orr{{.*}}256
+ ret i32 257
+}
+
+define i32 @f5() {
+; CHECK: f5
+; CHECK: mov r0, {{.*}}-1073741761
+ ret i32 -1073741761
+}
+
+define i32 @f6() {
+; CHECK: f6
+; CHECK: mov r0, {{.*}}1008
+ ret i32 1008
+}
+
+define void @f7(i32 %a) {
+; CHECK: f7
+; CHECK: cmp r0, #1, 16
+ %b = icmp ugt i32 %a, 65536 ; <i1> [#uses=1]
+ br i1 %b, label %r, label %r
+
+r: ; preds = %0, %0
+ ret void
+}
diff --git a/test/CodeGen/ARM/cse-libcalls.ll b/test/CodeGen/ARM/cse-libcalls.ll
new file mode 100644
index 0000000..0dcf9dd
--- /dev/null
+++ b/test/CodeGen/ARM/cse-libcalls.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=arm | grep {bl.\*__ltdf} | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+; Without CSE of libcalls, there are two calls in the output instead of one.
+
+define i32 @u_f_nonbon(double %lambda) nounwind {
+entry:
+ %tmp19.i.i = load double* null, align 4 ; <double> [#uses=2]
+ %tmp6.i = fcmp olt double %tmp19.i.i, 1.000000e+00 ; <i1> [#uses=1]
+ %dielectric.0.i = select i1 %tmp6.i, double 1.000000e+00, double %tmp19.i.i ; <double> [#uses=1]
+ %tmp10.i4 = fdiv double 0x4074C2D71F36262D, %dielectric.0.i ; <double> [#uses=1]
+ br i1 false, label %bb28.i, label %bb508.i
+
+bb28.i: ; preds = %bb28.i, %entry
+ br i1 false, label %bb502.loopexit.i, label %bb28.i
+
+bb.nph53.i: ; preds = %bb502.loopexit.i
+ %tmp354.i = fsub double -0.000000e+00, %tmp10.i4 ; <double> [#uses=0]
+ br label %bb244.i
+
+bb244.i: ; preds = %bb244.i, %bb.nph53.i
+ br label %bb244.i
+
+bb502.loopexit.i: ; preds = %bb28.i
+ br i1 false, label %bb.nph53.i, label %bb508.i
+
+bb508.i: ; preds = %bb502.loopexit.i, %entry
+ ret i32 1
+}
diff --git a/test/CodeGen/ARM/ctors_dtors.ll b/test/CodeGen/ARM/ctors_dtors.ll
new file mode 100644
index 0000000..fb94626
--- /dev/null
+++ b/test/CodeGen/ARM/ctors_dtors.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
+; RUN: llc < %s -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=ELF
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=GNUEABI
+
+; DARWIN: .section __DATA,__mod_init_func,mod_init_funcs
+; DARWIN: .section __DATA,__mod_term_func,mod_term_funcs
+
+; ELF: .section .ctors,"aw",%progbits
+; ELF: .section .dtors,"aw",%progbits
+
+; GNUEABI: .section .init_array,"aw",%init_array
+; GNUEABI: .section .fini_array,"aw",%fini_array
+
[email protected]_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @__mf_init } ] ; <[1 x { i32, void ()* }]*> [#uses=0]
[email protected]_dtors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @__mf_fini } ] ; <[1 x { i32, void ()* }]*> [#uses=0]
+
+define void @__mf_init() {
+entry:
+ ret void
+}
+
+define void @__mf_fini() {
+entry:
+ ret void
+}
diff --git a/test/CodeGen/ARM/ctz.ll b/test/CodeGen/ARM/ctz.ll
new file mode 100644
index 0000000..1d2ced3
--- /dev/null
+++ b/test/CodeGen/ARM/ctz.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
+
+declare i32 @llvm.cttz.i32(i32)
+
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: rbit
+; CHECK: clz
+ %tmp = call i32 @llvm.cttz.i32( i32 %a )
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/ARM/dg.exp b/test/CodeGen/ARM/dg.exp
new file mode 100644
index 0000000..3ff359a
--- /dev/null
+++ b/test/CodeGen/ARM/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target ARM] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/ARM/div.ll b/test/CodeGen/ARM/div.ll
new file mode 100644
index 0000000..2f724e7
--- /dev/null
+++ b/test/CodeGen/ARM/div.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=arm > %t
+; RUN: grep __divsi3 %t
+; RUN: grep __udivsi3 %t
+; RUN: grep __modsi3 %t
+; RUN: grep __umodsi3 %t
+
+define i32 @f1(i32 %a, i32 %b) {
+entry:
+ %tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+entry:
+ %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+entry:
+ %tmp1 = srem i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+entry:
+ %tmp1 = urem i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
diff --git a/test/CodeGen/ARM/dyn-stackalloc.ll b/test/CodeGen/ARM/dyn-stackalloc.ll
new file mode 100644
index 0000000..92e2d13
--- /dev/null
+++ b/test/CodeGen/ARM/dyn-stackalloc.ll
@@ -0,0 +1,56 @@
+; RUN: llc < %s -march=arm
+
+ %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
+ %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
+
+define void @t1(%struct.state* %v) {
+ %tmp6 = load i32* null
+ %tmp8 = alloca float, i32 %tmp6
+ store i32 1, i32* null
+ br i1 false, label %bb123.preheader, label %return
+
+bb123.preheader:
+ br i1 false, label %bb43, label %return
+
+bb43:
+ call fastcc void @f1( float* %tmp8, float* null, i32 0 )
+ %tmp70 = load i32* null
+ %tmp85 = getelementptr float* %tmp8, i32 0
+ call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 )
+ ret void
+
+return:
+ ret void
+}
+
+declare fastcc void @f1(float*, float*, i32)
+
+declare fastcc void @f2(float*, float*, float*, i32)
+
+ %struct.comment = type { i8**, i32*, i32, i8* }
+@str215 = external global [2 x i8]
+
+define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
+ %tmp1 = call i32 @strlen( i8* %tag )
+ %tmp3 = call i32 @strlen( i8* %contents )
+ %tmp4 = add i32 %tmp1, 2
+ %tmp5 = add i32 %tmp4, %tmp3
+ %tmp6 = alloca i8, i32 %tmp5
+ %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag )
+ %tmp6.len = call i32 @strlen( i8* %tmp6 )
+ %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
+ call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 )
+ %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents )
+ call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 )
+ ret void
+}
+
+declare i32 @strlen(i8*)
+
+declare i8* @strcat(i8*, i8*)
+
+declare fastcc void @comment_add(%struct.comment*, i8*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i8* @strcpy(i8*, i8*)
diff --git a/test/CodeGen/ARM/extloadi1.ll b/test/CodeGen/ARM/extloadi1.ll
new file mode 100644
index 0000000..dc45ce7
--- /dev/null
+++ b/test/CodeGen/ARM/extloadi1.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=arm
+@handler_installed.6144.b = external global i1 ; <i1*> [#uses=1]
+
+define void @__mf_sigusr1_respond() {
+entry:
+ %tmp8.b = load i1* @handler_installed.6144.b ; <i1> [#uses=1]
+ br i1 false, label %cond_true7, label %cond_next
+
+cond_next: ; preds = %entry
+ br i1 %tmp8.b, label %bb, label %cond_next3
+
+cond_next3: ; preds = %cond_next
+ ret void
+
+bb: ; preds = %cond_next
+ ret void
+
+cond_true7: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/fabss.ll b/test/CodeGen/ARM/fabss.ll
new file mode 100644
index 0000000..e5b5791
--- /dev/null
+++ b/test/CodeGen/ARM/fabss.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
+
+define float @test(float %a, float %b) {
+entry:
+ %dum = fadd float %a, %b
+ %0 = tail call float @fabsf(float %dum)
+ %dum1 = fadd float %0, %b
+ ret float %dum1
+}
+
+declare float @fabsf(float)
+
+; VFP2: test:
+; VFP2: vabs.f32 s1, s1
+
+; NFP1: test:
+; NFP1: vabs.f32 d1, d1
+; NFP0: test:
+; NFP0: vabs.f32 s1, s1
+
+; CORTEXA8: test:
+; CORTEXA8: vabs.f32 d1, d1
+; CORTEXA9: test:
+; CORTEXA9: vabs.f32 s1, s1
diff --git a/test/CodeGen/ARM/fadds.ll b/test/CodeGen/ARM/fadds.ll
new file mode 100644
index 0000000..db18a86
--- /dev/null
+++ b/test/CodeGen/ARM/fadds.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
+
+define float @test(float %a, float %b) {
+entry:
+ %0 = fadd float %a, %b
+ ret float %0
+}
+
+; VFP2: test:
+; VFP2: vadd.f32 s0, s1, s0
+
+; NFP1: test:
+; NFP1: vadd.f32 d0, d1, d0
+; NFP0: test:
+; NFP0: vadd.f32 s0, s1, s0
+
+; CORTEXA8: test:
+; CORTEXA8: vadd.f32 d0, d1, d0
+; CORTEXA9: test:
+; CORTEXA9: vadd.f32 s0, s1, s0
diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll
new file mode 100644
index 0000000..a6d7410
--- /dev/null
+++ b/test/CodeGen/ARM/fcopysign.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=arm | grep bic | count 2
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \
+; RUN: grep vneg | count 2
+
+define float @test1(float %x, double %y) {
+ %tmp = fpext float %x to double
+ %tmp2 = tail call double @copysign( double %tmp, double %y )
+ %tmp3 = fptrunc double %tmp2 to float
+ ret float %tmp3
+}
+
+define double @test2(double %x, float %y) {
+ %tmp = fpext float %y to double
+ %tmp2 = tail call double @copysign( double %x, double %tmp )
+ ret double %tmp2
+}
+
+declare double @copysign(double, double)
diff --git a/test/CodeGen/ARM/fdivs.ll b/test/CodeGen/ARM/fdivs.ll
new file mode 100644
index 0000000..a5c86bf
--- /dev/null
+++ b/test/CodeGen/ARM/fdivs.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
+
+define float @test(float %a, float %b) {
+entry:
+ %0 = fdiv float %a, %b
+ ret float %0
+}
+
+; VFP2: test:
+; VFP2: vdiv.f32 s0, s1, s0
+
+; NFP1: test:
+; NFP1: vdiv.f32 s0, s1, s0
+; NFP0: test:
+; NFP0: vdiv.f32 s0, s1, s0
+
+; CORTEXA8: test:
+; CORTEXA8: vdiv.f32 s0, s1, s0
+; CORTEXA9: test:
+; CORTEXA9: vdiv.f32 s0, s1, s0
diff --git a/test/CodeGen/ARM/fixunsdfdi.ll b/test/CodeGen/ARM/fixunsdfdi.ll
new file mode 100644
index 0000000..6db2385
--- /dev/null
+++ b/test/CodeGen/ARM/fixunsdfdi.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+; RUN: llc < %s -march=arm -mattr=vfp2 | not grep vstr.64
+
+define hidden i64 @__fixunsdfdi(double %x) nounwind readnone {
+entry:
+ %x14 = bitcast double %x to i64 ; <i64> [#uses=1]
+ br i1 true, label %bb3, label %bb10
+
+bb3: ; preds = %entry
+ br i1 true, label %bb5, label %bb7
+
+bb5: ; preds = %bb3
+ %u.in.mask = and i64 %x14, -4294967296 ; <i64> [#uses=1]
+ %.ins = or i64 0, %u.in.mask ; <i64> [#uses=1]
+ %0 = bitcast i64 %.ins to double ; <double> [#uses=1]
+ %1 = fsub double %x, %0 ; <double> [#uses=1]
+ %2 = fptosi double %1 to i32 ; <i32> [#uses=1]
+ %3 = add i32 %2, 0 ; <i32> [#uses=1]
+ %4 = zext i32 %3 to i64 ; <i64> [#uses=1]
+ %5 = shl i64 %4, 32 ; <i64> [#uses=1]
+ %6 = or i64 %5, 0 ; <i64> [#uses=1]
+ ret i64 %6
+
+bb7: ; preds = %bb3
+ ret i64 0
+
+bb10: ; preds = %entry
+ ret i64 0
+}
diff --git a/test/CodeGen/ARM/fmacs.ll b/test/CodeGen/ARM/fmacs.ll
new file mode 100644
index 0000000..904a587
--- /dev/null
+++ b/test/CodeGen/ARM/fmacs.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
+
+define float @test(float %acc, float %a, float %b) {
+entry:
+ %0 = fmul float %a, %b
+ %1 = fadd float %acc, %0
+ ret float %1
+}
+
+; VFP2: test:
+; VFP2: vmla.f32 s2, s1, s0
+
+; NFP1: test:
+; NFP1: vmul.f32 d0, d1, d0
+; NFP0: test:
+; NFP0: vmla.f32 s2, s1, s0
+
+; CORTEXA8: test:
+; CORTEXA8: vmul.f32 d0, d1, d0
+; CORTEXA9: test:
+; CORTEXA9: vmla.f32 s2, s1, s0
diff --git a/test/CodeGen/ARM/fmdrr-fmrrd.ll b/test/CodeGen/ARM/fmdrr-fmrrd.ll
new file mode 100644
index 0000000..eb72faf
--- /dev/null
+++ b/test/CodeGen/ARM/fmdrr-fmrrd.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=arm -mattr=vfp2 | not grep fmdrr
+; RUN: llc < %s -march=arm -mattr=vfp2 | not grep fmrrd
+
+; naive codegen for this is:
+; _i:
+; fmdrr d0, r0, r1
+; fmrrd r0, r1, d0
+; bx lr
+
+define i64 @test(double %X) {
+ %Y = bitcast double %X to i64
+ ret i64 %Y
+}
diff --git a/test/CodeGen/ARM/fmscs.ll b/test/CodeGen/ARM/fmscs.ll
new file mode 100644
index 0000000..7b9e029
--- /dev/null
+++ b/test/CodeGen/ARM/fmscs.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
+
+define float @test(float %acc, float %a, float %b) {
+entry:
+ %0 = fmul float %a, %b
+ %1 = fsub float %0, %acc
+ ret float %1
+}
+
+; VFP2: test:
+; VFP2: vnmls.f32 s2, s1, s0
+
+; NFP1: test:
+; NFP1: vnmls.f32 s2, s1, s0
+; NFP0: test:
+; NFP0: vnmls.f32 s2, s1, s0
+
+; CORTEXA8: test:
+; CORTEXA8: vnmls.f32 s2, s1, s0
+; CORTEXA9: test:
+; CORTEXA9: vnmls.f32 s2, s1, s0
diff --git a/test/CodeGen/ARM/fmuls.ll b/test/CodeGen/ARM/fmuls.ll
new file mode 100644
index 0000000..d3c9c82
--- /dev/null
+++ b/test/CodeGen/ARM/fmuls.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
+
+define float @test(float %a, float %b) {
+entry:
+ %0 = fmul float %a, %b
+ ret float %0
+}
+
+; VFP2: test:
+; VFP2: vmul.f32 s0, s1, s0
+
+; NFP1: test:
+; NFP1: vmul.f32 d0, d1, d0
+; NFP0: test:
+; NFP0: vmul.f32 s0, s1, s0
+
+; CORTEXA8: test:
+; CORTEXA8: vmul.f32 d0, d1, d0
+; CORTEXA9: test:
+; CORTEXA9: vmul.f32 s0, s1, s0
diff --git a/test/CodeGen/ARM/fnegs.ll b/test/CodeGen/ARM/fnegs.ll
new file mode 100644
index 0000000..d6c22f1
--- /dev/null
+++ b/test/CodeGen/ARM/fnegs.ll
@@ -0,0 +1,54 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
+
+define float @test1(float* %a) {
+entry:
+ %0 = load float* %a, align 4 ; <float> [#uses=2]
+ %1 = fsub float -0.000000e+00, %0 ; <float> [#uses=2]
+ %2 = fpext float %1 to double ; <double> [#uses=1]
+ %3 = fcmp olt double %2, 1.234000e+00 ; <i1> [#uses=1]
+ %retval = select i1 %3, float %1, float %0 ; <float> [#uses=1]
+ ret float %retval
+}
+; VFP2: test1:
+; VFP2: vneg.f32 s1, s0
+
+; NFP1: test1:
+; NFP1: vneg.f32 d1, d0
+
+; NFP0: test1:
+; NFP0: vneg.f32 s1, s0
+
+; CORTEXA8: test1:
+; CORTEXA8: vneg.f32 d1, d0
+
+; CORTEXA9: test1:
+; CORTEXA9: vneg.f32 s1, s0
+
+define float @test2(float* %a) {
+entry:
+ %0 = load float* %a, align 4 ; <float> [#uses=2]
+ %1 = fmul float -1.000000e+00, %0 ; <float> [#uses=2]
+ %2 = fpext float %1 to double ; <double> [#uses=1]
+ %3 = fcmp olt double %2, 1.234000e+00 ; <i1> [#uses=1]
+ %retval = select i1 %3, float %1, float %0 ; <float> [#uses=1]
+ ret float %retval
+}
+; VFP2: test2:
+; VFP2: vneg.f32 s1, s0
+
+; NFP1: test2:
+; NFP1: vneg.f32 d1, d0
+
+; NFP0: test2:
+; NFP0: vneg.f32 s1, s0
+
+; CORTEXA8: test2:
+; CORTEXA8: vneg.f32 d1, d0
+
+; CORTEXA9: test2:
+; CORTEXA9: vneg.f32 s1, s0
+
diff --git a/test/CodeGen/ARM/fnmacs.ll b/test/CodeGen/ARM/fnmacs.ll
new file mode 100644
index 0000000..724947e
--- /dev/null
+++ b/test/CodeGen/ARM/fnmacs.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NEON
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NEONFP
+
+define float @test(float %acc, float %a, float %b) {
+entry:
+; VFP2: vmls.f32
+; NEON: vmls.f32
+
+; NEONFP-NOT: vmls
+; NEONFP-NOT: vmov.f32
+; NEONFP: vmul.f32
+; NEONFP: vsub.f32
+; NEONFP: vmov
+
+ %0 = fmul float %a, %b
+ %1 = fsub float %acc, %0
+ ret float %1
+}
+
diff --git a/test/CodeGen/ARM/fnmscs.ll b/test/CodeGen/ARM/fnmscs.ll
new file mode 100644
index 0000000..ad21882
--- /dev/null
+++ b/test/CodeGen/ARM/fnmscs.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
+
+define float @test1(float %acc, float %a, float %b) nounwind {
+; CHECK: vnmla.f32 s2, s1, s0
+entry:
+ %0 = fmul float %a, %b
+ %1 = fsub float -0.0, %0
+ %2 = fsub float %1, %acc
+ ret float %2
+}
+
+define float @test2(float %acc, float %a, float %b) nounwind {
+; CHECK: vnmla.f32 s2, s1, s0
+entry:
+ %0 = fmul float %a, %b
+ %1 = fmul float -1.0, %0
+ %2 = fsub float %1, %acc
+ ret float %2
+}
+
diff --git a/test/CodeGen/ARM/fnmul.ll b/test/CodeGen/ARM/fnmul.ll
new file mode 100644
index 0000000..6d7bc05
--- /dev/null
+++ b/test/CodeGen/ARM/fnmul.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | grep vnmul.f64
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep vmul.f64
+
+
+define double @t1(double %a, double %b) {
+entry:
+ %tmp2 = fsub double -0.000000e+00, %a ; <double> [#uses=1]
+ %tmp4 = fmul double %tmp2, %b ; <double> [#uses=1]
+ ret double %tmp4
+}
+
diff --git a/test/CodeGen/ARM/fnmuls.ll b/test/CodeGen/ARM/fnmuls.ll
new file mode 100644
index 0000000..efd87d2
--- /dev/null
+++ b/test/CodeGen/ARM/fnmuls.ll
@@ -0,0 +1,23 @@
+; XFAIL: *
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
+
+define float @test1(float %a, float %b) nounwind {
+; CHECK: fnmscs s2, s1, s0
+entry:
+ %0 = fmul float %a, %b
+ %1 = fsub float -0.0, %0
+ ret float %1
+}
+
+define float @test2(float %a, float %b) nounwind {
+; CHECK: fnmscs s2, s1, s0
+entry:
+ %0 = fmul float %a, %b
+ %1 = fmul float -1.0, %0
+ ret float %1
+}
+
diff --git a/test/CodeGen/ARM/formal.ll b/test/CodeGen/ARM/formal.ll
new file mode 100644
index 0000000..4ac10ba
--- /dev/null
+++ b/test/CodeGen/ARM/formal.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+declare void @bar(i64 %x, i64 %y)
+
+define void @foo() {
+ call void @bar(i64 2, i64 3)
+ ret void
+}
diff --git a/test/CodeGen/ARM/fp.ll b/test/CodeGen/ARM/fp.ll
new file mode 100644
index 0000000..8fbd45b
--- /dev/null
+++ b/test/CodeGen/ARM/fp.ll
@@ -0,0 +1,78 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+
+define float @f(i32 %a) {
+;CHECK: f:
+;CHECK: vmov
+;CHECK-NEXT: vcvt.f32.s32
+;CHECK-NEXT: vmov
+entry:
+ %tmp = sitofp i32 %a to float ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @g(i32 %a) {
+;CHECK: g:
+;CHECK: vmov
+;CHECK-NEXT: vcvt.f64.s32
+;CHECK-NEXT: vmov
+entry:
+ %tmp = sitofp i32 %a to double ; <double> [#uses=1]
+ ret double %tmp
+}
+
+define double @uint_to_double(i32 %a) {
+;CHECK: uint_to_double:
+;CHECK: vmov
+;CHECK-NEXT: vcvt.f64.u32
+;CHECK-NEXT: vmov
+entry:
+ %tmp = uitofp i32 %a to double ; <double> [#uses=1]
+ ret double %tmp
+}
+
+define float @uint_to_float(i32 %a) {
+;CHECK: uint_to_float:
+;CHECK: vmov
+;CHECK-NEXT: vcvt.f32.u32
+;CHECK-NEXT: vmov
+entry:
+ %tmp = uitofp i32 %a to float ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @h(double* %v) {
+;CHECK: h:
+;CHECK: vldr.64
+;CHECK-NEXT: vmov
+entry:
+ %tmp = load double* %v ; <double> [#uses=1]
+ ret double %tmp
+}
+
+define float @h2() {
+;CHECK: h2:
+;CHECK: 1065353216
+entry:
+ ret float 1.000000e+00
+}
+
+define double @f2(double %a) {
+;CHECK: f2:
+;CHECK-NOT: vmov
+ ret double %a
+}
+
+define void @f3() {
+;CHECK: f3:
+;CHECK-NOT: vmov
+;CHECK: f4
+entry:
+ %tmp = call double @f5( ) ; <double> [#uses=1]
+ call void @f4( double %tmp )
+ ret void
+}
+
+declare void @f4(double)
+
+declare double @f5()
+
diff --git a/test/CodeGen/ARM/fp_convert.ll b/test/CodeGen/ARM/fp_convert.ll
new file mode 100644
index 0000000..2adac78
--- /dev/null
+++ b/test/CodeGen/ARM/fp_convert.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NEON
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEON
+; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=VFP2
+
+define i32 @test1(float %a, float %b) {
+; VFP2: test1:
+; VFP2: vcvt.s32.f32 s0, s0
+; NEON: test1:
+; NEON: vcvt.s32.f32 d0, d0
+entry:
+ %0 = fadd float %a, %b
+ %1 = fptosi float %0 to i32
+ ret i32 %1
+}
+
+define i32 @test2(float %a, float %b) {
+; VFP2: test2:
+; VFP2: vcvt.u32.f32 s0, s0
+; NEON: test2:
+; NEON: vcvt.u32.f32 d0, d0
+entry:
+ %0 = fadd float %a, %b
+ %1 = fptoui float %0 to i32
+ ret i32 %1
+}
+
+define float @test3(i32 %a, i32 %b) {
+; VFP2: test3:
+; VFP2: vcvt.f32.u32 s0, s0
+; NEON: test3:
+; NEON: vcvt.f32.u32 d0, d0
+entry:
+ %0 = add i32 %a, %b
+ %1 = uitofp i32 %0 to float
+ ret float %1
+}
+
+define float @test4(i32 %a, i32 %b) {
+; VFP2: test4:
+; VFP2: vcvt.f32.s32 s0, s0
+; NEON: test4:
+; NEON: vcvt.f32.s32 d0, d0
+entry:
+ %0 = add i32 %a, %b
+ %1 = sitofp i32 %0 to float
+ ret float %1
+}
diff --git a/test/CodeGen/ARM/fparith.ll b/test/CodeGen/ARM/fparith.ll
new file mode 100644
index 0000000..ce6d6b2
--- /dev/null
+++ b/test/CodeGen/ARM/fparith.ll
@@ -0,0 +1,101 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+
+define float @f1(float %a, float %b) {
+;CHECK: f1:
+;CHECK: vadd.f32
+entry:
+ %tmp = fadd float %a, %b ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @f2(double %a, double %b) {
+;CHECK: f2:
+;CHECK: vadd.f64
+entry:
+ %tmp = fadd double %a, %b ; <double> [#uses=1]
+ ret double %tmp
+}
+
+define float @f3(float %a, float %b) {
+;CHECK: f3:
+;CHECK: vmul.f32
+entry:
+ %tmp = fmul float %a, %b ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @f4(double %a, double %b) {
+;CHECK: f4:
+;CHECK: vmul.f64
+entry:
+ %tmp = fmul double %a, %b ; <double> [#uses=1]
+ ret double %tmp
+}
+
+define float @f5(float %a, float %b) {
+;CHECK: f5:
+;CHECK: vsub.f32
+entry:
+ %tmp = fsub float %a, %b ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @f6(double %a, double %b) {
+;CHECK: f6:
+;CHECK: vsub.f64
+entry:
+ %tmp = fsub double %a, %b ; <double> [#uses=1]
+ ret double %tmp
+}
+
+define float @f7(float %a) {
+;CHECK: f7:
+;CHECK: eor
+entry:
+ %tmp1 = fsub float -0.000000e+00, %a ; <float> [#uses=1]
+ ret float %tmp1
+}
+
+define double @f8(double %a) {
+;CHECK: f8:
+;CHECK: vneg.f64
+entry:
+ %tmp1 = fsub double -0.000000e+00, %a ; <double> [#uses=1]
+ ret double %tmp1
+}
+
+define float @f9(float %a, float %b) {
+;CHECK: f9:
+;CHECK: vdiv.f32
+entry:
+ %tmp1 = fdiv float %a, %b ; <float> [#uses=1]
+ ret float %tmp1
+}
+
+define double @f10(double %a, double %b) {
+;CHECK: f10:
+;CHECK: vdiv.f64
+entry:
+ %tmp1 = fdiv double %a, %b ; <double> [#uses=1]
+ ret double %tmp1
+}
+
+define float @f11(float %a) {
+;CHECK: f11:
+;CHECK: bic
+entry:
+ %tmp1 = call float @fabsf( float %a ) ; <float> [#uses=1]
+ ret float %tmp1
+}
+
+declare float @fabsf(float)
+
+define double @f12(double %a) {
+;CHECK: f12:
+;CHECK: vabs.f64
+entry:
+ %tmp1 = call double @fabs( double %a ) ; <double> [#uses=1]
+ ret double %tmp1
+}
+
+declare double @fabs(double)
diff --git a/test/CodeGen/ARM/fpcmp.ll b/test/CodeGen/ARM/fpcmp.ll
new file mode 100644
index 0000000..260ec49
--- /dev/null
+++ b/test/CodeGen/ARM/fpcmp.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+
+define i32 @f1(float %a) {
+;CHECK: f1:
+;CHECK: vcmpe.f32
+;CHECK: movmi
+entry:
+ %tmp = fcmp olt float %a, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp1 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @f2(float %a) {
+;CHECK: f2:
+;CHECK: vcmpe.f32
+;CHECK: moveq
+entry:
+ %tmp = fcmp oeq float %a, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp2 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f3(float %a) {
+;CHECK: f3:
+;CHECK: vcmpe.f32
+;CHECK: movgt
+entry:
+ %tmp = fcmp ogt float %a, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp3 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
+
+define i32 @f4(float %a) {
+;CHECK: f4:
+;CHECK: vcmpe.f32
+;CHECK: movge
+entry:
+ %tmp = fcmp oge float %a, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp4 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define i32 @f5(float %a) {
+;CHECK: f5:
+;CHECK: vcmpe.f32
+;CHECK: movls
+entry:
+ %tmp = fcmp ole float %a, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp5 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @f6(float %a) {
+;CHECK: f6:
+;CHECK: vcmpe.f32
+;CHECK: movne
+entry:
+ %tmp = fcmp une float %a, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp6 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @g1(double %a) {
+;CHECK: g1:
+;CHECK: vcmpe.f64
+;CHECK: movmi
+entry:
+ %tmp = fcmp olt double %a, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp7 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/fpcmp_ueq.ll b/test/CodeGen/ARM/fpcmp_ueq.ll
new file mode 100644
index 0000000..67f70e9e
--- /dev/null
+++ b/test/CodeGen/ARM/fpcmp_ueq.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=arm | grep moveq
+; RUN: llc < %s -march=arm -mattr=+vfp2 | grep movvs
+
+define i32 @f7(float %a, float %b) {
+entry:
+ %tmp = fcmp ueq float %a,%b
+ %retval = select i1 %tmp, i32 666, i32 42
+ ret i32 %retval
+}
+
diff --git a/test/CodeGen/ARM/fpconsts.ll b/test/CodeGen/ARM/fpconsts.ll
new file mode 100644
index 0000000..710994d
--- /dev/null
+++ b/test/CodeGen/ARM/fpconsts.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=arm -mattr=+vfp3 | FileCheck %s
+
+define arm_apcscc float @t1(float %x) nounwind readnone optsize {
+entry:
+; CHECK: t1:
+; CHECK: vmov.f32 s1, #4.000000e+00
+ %0 = fadd float %x, 4.000000e+00
+ ret float %0
+}
+
+define arm_apcscc double @t2(double %x) nounwind readnone optsize {
+entry:
+; CHECK: t2:
+; CHECK: vmov.f64 d1, #3.000000e+00
+ %0 = fadd double %x, 3.000000e+00
+ ret double %0
+}
+
+define arm_apcscc double @t3(double %x) nounwind readnone optsize {
+entry:
+; CHECK: t3:
+; CHECK: vmov.f64 d1, #-1.300000e+01
+ %0 = fmul double %x, -1.300000e+01
+ ret double %0
+}
+
+define arm_apcscc float @t4(float %x) nounwind readnone optsize {
+entry:
+; CHECK: t4:
+; CHECK: vmov.f32 s1, #-2.400000e+01
+ %0 = fmul float %x, -2.400000e+01
+ ret float %0
+}
diff --git a/test/CodeGen/ARM/fpconv.ll b/test/CodeGen/ARM/fpconv.ll
new file mode 100644
index 0000000..bf197a4
--- /dev/null
+++ b/test/CodeGen/ARM/fpconv.ll
@@ -0,0 +1,102 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define float @f1(double %x) {
+;CHECK-VFP: f1:
+;CHECK-VFP: vcvt.f32.f64
+;CHECK: f1:
+;CHECK: truncdfsf2
+entry:
+ %tmp1 = fptrunc double %x to float ; <float> [#uses=1]
+ ret float %tmp1
+}
+
+define double @f2(float %x) {
+;CHECK-VFP: f2:
+;CHECK-VFP: vcvt.f64.f32
+;CHECK: f2:
+;CHECK: extendsfdf2
+entry:
+ %tmp1 = fpext float %x to double ; <double> [#uses=1]
+ ret double %tmp1
+}
+
+define i32 @f3(float %x) {
+;CHECK-VFP: f3:
+;CHECK-VFP: vcvt.s32.f32
+;CHECK: f3:
+;CHECK: fixsfsi
+entry:
+ %tmp = fptosi float %x to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @f4(float %x) {
+;CHECK-VFP: f4:
+;CHECK-VFP: vcvt.u32.f32
+;CHECK: f4:
+;CHECK: fixunssfsi
+entry:
+ %tmp = fptoui float %x to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @f5(double %x) {
+;CHECK-VFP: f5:
+;CHECK-VFP: vcvt.s32.f64
+;CHECK: f5:
+;CHECK: fixdfsi
+entry:
+ %tmp = fptosi double %x to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @f6(double %x) {
+;CHECK-VFP: f6:
+;CHECK-VFP: vcvt.u32.f64
+;CHECK: f6:
+;CHECK: fixunsdfsi
+entry:
+ %tmp = fptoui double %x to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define float @f7(i32 %a) {
+;CHECK-VFP: f7:
+;CHECK-VFP: vcvt.f32.s32
+;CHECK: f7:
+;CHECK: floatsisf
+entry:
+ %tmp = sitofp i32 %a to float ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @f8(i32 %a) {
+;CHECK-VFP: f8:
+;CHECK-VFP: vcvt.f64.s32
+;CHECK: f8:
+;CHECK: floatsidf
+entry:
+ %tmp = sitofp i32 %a to double ; <double> [#uses=1]
+ ret double %tmp
+}
+
+define float @f9(i32 %a) {
+;CHECK-VFP: f9:
+;CHECK-VFP: vcvt.f32.u32
+;CHECK: f9:
+;CHECK: floatunsisf
+entry:
+ %tmp = uitofp i32 %a to float ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @f10(i32 %a) {
+;CHECK-VFP: f10:
+;CHECK-VFP: vcvt.f64.u32
+;CHECK: f10:
+;CHECK: floatunsidf
+entry:
+ %tmp = uitofp i32 %a to double ; <double> [#uses=1]
+ ret double %tmp
+}
diff --git a/test/CodeGen/ARM/fpmem.ll b/test/CodeGen/ARM/fpmem.ll
new file mode 100644
index 0000000..c3cff18
--- /dev/null
+++ b/test/CodeGen/ARM/fpmem.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+
+define float @f1(float %a) {
+; CHECK: f1:
+; CHECK: mov r0, #0
+ ret float 0.000000e+00
+}
+
+define float @f2(float* %v, float %u) {
+; CHECK: f2:
+; CHECK: vldr.32{{.*}}[
+ %tmp = load float* %v ; <float> [#uses=1]
+ %tmp1 = fadd float %tmp, %u ; <float> [#uses=1]
+ ret float %tmp1
+}
+
+define void @f3(float %a, float %b, float* %v) {
+; CHECK: f3:
+; CHECK: vstr.32{{.*}}[
+ %tmp = fadd float %a, %b ; <float> [#uses=1]
+ store float %tmp, float* %v
+ ret void
+}
diff --git a/test/CodeGen/ARM/fpow.ll b/test/CodeGen/ARM/fpow.ll
new file mode 100644
index 0000000..6d48792
--- /dev/null
+++ b/test/CodeGen/ARM/fpow.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=arm
+
+define double @t(double %x, double %y) nounwind optsize {
+entry:
+ %0 = tail call double @llvm.pow.f64( double %x, double %y ) ; <double> [#uses=1]
+ ret double %0
+}
+
+declare double @llvm.pow.f64(double, double) nounwind readonly
diff --git a/test/CodeGen/ARM/fpowi.ll b/test/CodeGen/ARM/fpowi.ll
new file mode 100644
index 0000000..7f9d62a
--- /dev/null
+++ b/test/CodeGen/ARM/fpowi.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep powidf2
+; PR1287
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-linux-gnueabi"
+
+define double @_ZSt3powdi(double %__x, i32 %__i) {
+entry:
+ %tmp3 = call double @llvm.powi.f64( double %__x, i32 %__i )
+ ret double %tmp3
+}
+
+declare double @llvm.powi.f64(double, i32)
+
diff --git a/test/CodeGen/ARM/fptoint.ll b/test/CodeGen/ARM/fptoint.ll
new file mode 100644
index 0000000..299cb8f81
--- /dev/null
+++ b/test/CodeGen/ARM/fptoint.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | FileCheck %s
+
+@i = weak global i32 0 ; <i32*> [#uses=2]
+@u = weak global i32 0 ; <i32*> [#uses=2]
+
+define i32 @foo1(float *%x) {
+ %tmp1 = load float* %x
+ %tmp2 = bitcast float %tmp1 to i32
+ ret i32 %tmp2
+}
+
+define i64 @foo2(double *%x) {
+ %tmp1 = load double* %x
+ %tmp2 = bitcast double %tmp1 to i64
+ ret i64 %tmp2
+}
+
+define void @foo5(float %x) {
+ %tmp1 = fptosi float %x to i32
+ store i32 %tmp1, i32* @i
+ ret void
+}
+
+define void @foo6(float %x) {
+ %tmp1 = fptoui float %x to i32
+ store i32 %tmp1, i32* @u
+ ret void
+}
+
+define void @foo7(double %x) {
+ %tmp1 = fptosi double %x to i32
+ store i32 %tmp1, i32* @i
+ ret void
+}
+
+define void @foo8(double %x) {
+ %tmp1 = fptoui double %x to i32
+ store i32 %tmp1, i32* @u
+ ret void
+}
+
+define void @foo9(double %x) {
+ %tmp = fptoui double %x to i16
+ store i16 %tmp, i16* null
+ ret void
+}
+; CHECK: foo9:
+; CHECK: vmov r0, s0
+
diff --git a/test/CodeGen/ARM/fsubs.ll b/test/CodeGen/ARM/fsubs.ll
new file mode 100644
index 0000000..ae98be3
--- /dev/null
+++ b/test/CodeGen/ARM/fsubs.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
+
+define float @test(float %a, float %b) {
+entry:
+ %0 = fsub float %a, %b
+ ret float %0
+}
+
+; VFP2: vsub.f32 s0, s1, s0
+; NFP1: vsub.f32 d0, d1, d0
+; NFP0: vsub.f32 s0, s1, s0
diff --git a/test/CodeGen/ARM/globals.ll b/test/CodeGen/ARM/globals.ll
new file mode 100644
index 0000000..886c0d5
--- /dev/null
+++ b/test/CodeGen/ARM/globals.ll
@@ -0,0 +1,75 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=DarwinStatic
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DarwinDynamic
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=DarwinPIC
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LinuxPIC
+
+@G = external global i32
+
+define i32 @test1() {
+ %tmp = load i32* @G
+ ret i32 %tmp
+}
+
+; DarwinStatic: _test1:
+; DarwinStatic: ldr r0, LCPI1_0
+; DarwinStatic: ldr r0, [r0]
+; DarwinStatic: bx lr
+
+; DarwinStatic: .align 2
+; DarwinStatic: LCPI1_0:
+; DarwinStatic: .long {{_G$}}
+
+
+; DarwinDynamic: _test1:
+; DarwinDynamic: ldr r0, LCPI1_0
+; DarwinDynamic: ldr r0, [r0]
+; DarwinDynamic: ldr r0, [r0]
+; DarwinDynamic: bx lr
+
+; DarwinDynamic: .align 2
+; DarwinDynamic: LCPI1_0:
+; DarwinDynamic: .long L_G$non_lazy_ptr
+
+; DarwinDynamic: .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers
+; DarwinDynamic: .align 2
+; DarwinDynamic: L_G$non_lazy_ptr:
+; DarwinDynamic: .indirect_symbol _G
+; DarwinDynamic: .long 0
+
+
+
+; DarwinPIC: _test1:
+; DarwinPIC: ldr r0, LCPI1_0
+; DarwinPIC: LPC1_0:
+; DarwinPIC: ldr r0, [pc, +r0]
+; DarwinPIC: ldr r0, [r0]
+; DarwinPIC: bx lr
+
+; DarwinPIC: .align 2
+; DarwinPIC: LCPI1_0:
+; DarwinPIC: .long L_G$non_lazy_ptr-(LPC1_0+8)
+
+; DarwinPIC: .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers
+; DarwinPIC: .align 2
+; DarwinPIC: L_G$non_lazy_ptr:
+; DarwinPIC: .indirect_symbol _G
+; DarwinPIC: .long 0
+
+
+
+; LinuxPIC: test1:
+; LinuxPIC: ldr r0, .LCPI1_0
+; LinuxPIC: ldr r1, .LCPI1_1
+
+; LinuxPIC: .LPC1_0:
+; LinuxPIC: add r0, pc, r0
+; LinuxPIC: ldr r0, [r1, +r0]
+; LinuxPIC: ldr r0, [r0]
+; LinuxPIC: bx lr
+
+; LinuxPIC: .align 2
+; LinuxPIC: .LCPI1_0:
+; LinuxPIC: .long _GLOBAL_OFFSET_TABLE_-(.LPC1_0+8)
+; LinuxPIC: .align 2
+; LinuxPIC: .LCPI1_1:
+; LinuxPIC: .long G(GOT)
diff --git a/test/CodeGen/ARM/hardfloat_neon.ll b/test/CodeGen/ARM/hardfloat_neon.ll
new file mode 100644
index 0000000..4abf04b
--- /dev/null
+++ b/test/CodeGen/ARM/hardfloat_neon.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+neon -float-abi=hard
+
+define <16 x i8> @vmulQi8_reg(<16 x i8> %A, <16 x i8> %B) nounwind {
+ %tmp1 = mul <16 x i8> %A, %B
+ ret <16 x i8> %tmp1
+}
+
+define <16 x i8> @f(<16 x i8> %a, <16 x i8> %b) {
+ %tmp = call <16 x i8> @g(<16 x i8> %b)
+ ret <16 x i8> %tmp
+}
+
+declare <16 x i8> @g(<16 x i8>)
diff --git a/test/CodeGen/ARM/hello.ll b/test/CodeGen/ARM/hello.ll
new file mode 100644
index 0000000..ccdc7bf
--- /dev/null
+++ b/test/CodeGen/ARM/hello.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | count 1
+; RUN: llc < %s -mtriple=arm-linux-gnu --disable-fp-elim | \
+; RUN: grep mov | count 3
+; RUN: llc < %s -mtriple=arm-apple-darwin | grep mov | count 2
+
+@str = internal constant [12 x i8] c"Hello World\00"
+
+define i32 @main() {
+ %tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @puts(i8*)
diff --git a/test/CodeGen/ARM/hidden-vis-2.ll b/test/CodeGen/ARM/hidden-vis-2.ll
new file mode 100644
index 0000000..90f5308
--- /dev/null
+++ b/test/CodeGen/ARM/hidden-vis-2.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
+
+@x = weak hidden global i32 0 ; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+; CHECK: t:
+; CHECK: ldr
+; CHECK-NEXT: ldr
+ %0 = load i32* @x, align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/ARM/hidden-vis-3.ll b/test/CodeGen/ARM/hidden-vis-3.ll
new file mode 100644
index 0000000..3bd710a
--- /dev/null
+++ b/test/CodeGen/ARM/hidden-vis-3.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin9 | FileCheck %s
+
+@x = external hidden global i32 ; <i32*> [#uses=1]
+@y = extern_weak hidden global i32 ; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+; CHECK: LCPI1_0:
+; CHECK-NEXT: .long _x
+; CHECK: LCPI1_1:
+; CHECK-NEXT: .long _y
+
+ %0 = load i32* @x, align 4 ; <i32> [#uses=1]
+ %1 = load i32* @y, align 4 ; <i32> [#uses=1]
+ %2 = add i32 %1, %0 ; <i32> [#uses=1]
+ ret i32 %2
+}
diff --git a/test/CodeGen/ARM/hidden-vis.ll b/test/CodeGen/ARM/hidden-vis.ll
new file mode 100644
index 0000000..3544ae8
--- /dev/null
+++ b/test/CodeGen/ARM/hidden-vis.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=arm-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
+
+@a = hidden global i32 0
+@b = external global i32
+
+define weak hidden void @t1() nounwind {
+; LINUX: .hidden t1
+; LINUX: t1:
+
+; DARWIN: .private_extern _t1
+; DARWIN: t1:
+ ret void
+}
+
+define weak void @t2() nounwind {
+; LINUX: t2:
+; LINUX: .hidden a
+
+; DARWIN: t2:
+; DARWIN: .private_extern _a
+ ret void
+}
diff --git a/test/CodeGen/ARM/iabs.ll b/test/CodeGen/ARM/iabs.ll
new file mode 100644
index 0000000..63808b2
--- /dev/null
+++ b/test/CodeGen/ARM/iabs.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+;; Integer absolute value, should produce something as good as: ARM:
+;; add r3, r0, r0, asr #31
+;; eor r0, r3, r0, asr #31
+;; bx lr
+
+define i32 @test(i32 %a) {
+ %tmp1neg = sub i32 0, %a
+ %b = icmp sgt i32 %a, -1
+ %abs = select i1 %b, i32 %a, i32 %tmp1neg
+ ret i32 %abs
+; CHECK: add r1, r0, r0, asr #31
+; CHECK: eor r0, r1, r0, asr #31
+; CHECK: bx lr
+}
diff --git a/test/CodeGen/ARM/ifcvt1.ll b/test/CodeGen/ARM/ifcvt1.ll
new file mode 100644
index 0000000..e6aa044
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt1.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm | grep bx | count 1
+
+define i32 @t1(i32 %a, i32 %b) {
+ %tmp2 = icmp eq i32 %a, 0
+ br i1 %tmp2, label %cond_false, label %cond_true
+
+cond_true:
+ %tmp5 = add i32 %b, 1
+ ret i32 %tmp5
+
+cond_false:
+ %tmp7 = add i32 %b, -1
+ ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/ifcvt2.ll b/test/CodeGen/ARM/ifcvt2.ll
new file mode 100644
index 0000000..ce57d73
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt2.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm | grep bxlt | count 1
+; RUN: llc < %s -march=arm | grep bxgt | count 1
+; RUN: llc < %s -march=arm | grep bxge | count 1
+
+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
+ %tmp2 = icmp sgt i32 %c, 10
+ %tmp5 = icmp slt i32 %d, 4
+ %tmp8 = or i1 %tmp5, %tmp2
+ %tmp13 = add i32 %b, %a
+ br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:
+ %tmp15 = add i32 %tmp13, %c
+ %tmp1821 = sub i32 %tmp15, %d
+ ret i32 %tmp1821
+
+UnifiedReturnBlock:
+ ret i32 %tmp13
+}
+
+define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) {
+ %tmp2 = icmp sgt i32 %c, 10
+ %tmp5 = icmp slt i32 %d, 4
+ %tmp8 = and i1 %tmp5, %tmp2
+ %tmp13 = add i32 %b, %a
+ br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:
+ %tmp15 = add i32 %tmp13, %c
+ %tmp1821 = sub i32 %tmp15, %d
+ ret i32 %tmp1821
+
+UnifiedReturnBlock:
+ ret i32 %tmp13
+}
diff --git a/test/CodeGen/ARM/ifcvt3.ll b/test/CodeGen/ARM/ifcvt3.ll
new file mode 100644
index 0000000..f7ebac6
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt3.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm | grep cmpne | count 1
+; RUN: llc < %s -march=arm | grep bx | count 2
+
+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
+ switch i32 %c, label %cond_next [
+ i32 1, label %cond_true
+ i32 7, label %cond_true
+ ]
+
+cond_true:
+ %tmp12 = add i32 %a, 1
+ %tmp1518 = add i32 %tmp12, %b
+ ret i32 %tmp1518
+
+cond_next:
+ %tmp15 = add i32 %b, %a
+ ret i32 %tmp15
+}
diff --git a/test/CodeGen/ARM/ifcvt4.ll b/test/CodeGen/ARM/ifcvt4.ll
new file mode 100644
index 0000000..f28c61b
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt4.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm | grep subgt | count 1
+; RUN: llc < %s -march=arm | grep suble | count 1
+; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.
+
+define i32 @t(i32 %a, i32 %b) {
+entry:
+ %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp1434, label %bb17, label %bb.outer
+
+bb.outer: ; preds = %cond_false, %entry
+ %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
+ %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %cond_true, %bb.outer
+ %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
+ %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]
+ %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]
+ %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
+ br i1 %tmp3, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
+ %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp1437, label %bb17, label %bb
+
+cond_false: ; preds = %bb
+ %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
+ %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb17, label %bb.outer
+
+bb17: ; preds = %cond_false, %cond_true, %entry
+ %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
+ ret i32 %a_addr.026.1
+}
diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll
new file mode 100644
index 0000000..623f2cb
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt5.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
+
+@x = external global i32* ; <i32**> [#uses=1]
+
+define void @foo(i32 %a) {
+entry:
+ %tmp = load i32** @x ; <i32*> [#uses=1]
+ store i32 %a, i32* %tmp
+ ret void
+}
+
+define void @t1(i32 %a, i32 %b) {
+; CHECK: t1:
+; CHECK: ldmfdlt sp!, {r7, pc}
+entry:
+ %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ tail call void @foo( i32 %b )
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/ifcvt6.ll b/test/CodeGen/ARM/ifcvt6.ll
new file mode 100644
index 0000000..d7fcf7d
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt6.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
+; RUN: grep cmpne | count 1
+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
+; RUN: grep ldmfdhi | count 1
+
+define void @foo(i32 %X, i32 %Y) {
+entry:
+ %tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1]
+ %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
+ %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1]
+ br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ %tmp10 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/ifcvt7.ll b/test/CodeGen/ARM/ifcvt7.ll
new file mode 100644
index 0000000..c60ad93
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt7.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
+; RUN: grep cmpeq | count 1
+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
+; RUN: grep moveq | count 1
+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
+; RUN: grep ldmfdeq | count 1
+; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1.
+
+ %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
+
+define fastcc i32 @CountTree(%struct.quad_struct* %tree) {
+entry:
+ br label %tailrecurse
+
+tailrecurse: ; preds = %bb, %entry
+ %tmp6 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
+ %tmp9 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=2]
+ %tmp12 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
+ %tmp14 = icmp eq %struct.quad_struct* null, null ; <i1> [#uses=1]
+ %tmp17 = icmp eq %struct.quad_struct* %tmp6, null ; <i1> [#uses=1]
+ %tmp23 = icmp eq %struct.quad_struct* %tmp9, null ; <i1> [#uses=1]
+ %tmp29 = icmp eq %struct.quad_struct* %tmp12, null ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp17, %tmp14 ; <i1> [#uses=1]
+ %bothcond1 = and i1 %bothcond, %tmp23 ; <i1> [#uses=1]
+ %bothcond2 = and i1 %bothcond1, %tmp29 ; <i1> [#uses=1]
+ br i1 %bothcond2, label %return, label %bb
+
+bb: ; preds = %tailrecurse
+ %tmp41 = tail call fastcc i32 @CountTree( %struct.quad_struct* %tmp9 ) ; <i32> [#uses=0]
+ br label %tailrecurse
+
+return: ; preds = %tailrecurse
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/ifcvt8.ll b/test/CodeGen/ARM/ifcvt8.ll
new file mode 100644
index 0000000..a7da834
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt8.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
+; RUN: grep ldmfdne | count 1
+
+ %struct.SString = type { i8*, i32, i32 }
+
+declare void @abort()
+
+define fastcc void @t(%struct.SString* %word, i8 signext %c) {
+entry:
+ %tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ tail call void @abort( )
+ unreachable
+
+cond_false: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/ifcvt9.ll b/test/CodeGen/ARM/ifcvt9.ll
new file mode 100644
index 0000000..05bdc459
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt9.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=arm
+
+define fastcc void @t() nounwind {
+entry:
+ br i1 undef, label %bb.i.i3, label %growMapping.exit
+
+bb.i.i3: ; preds = %entry
+ unreachable
+
+growMapping.exit: ; preds = %entry
+ unreachable
+}
diff --git a/test/CodeGen/ARM/illegal-vector-bitcast.ll b/test/CodeGen/ARM/illegal-vector-bitcast.ll
new file mode 100644
index 0000000..febe6f5
--- /dev/null
+++ b/test/CodeGen/ARM/illegal-vector-bitcast.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -mtriple=arm-linux
+
+define void @foo(<8 x float>* %f, <8 x float>* %g, <4 x i64>* %y)
+{
+ %h = load <8 x float>* %f
+ %i = fmul <8 x float> %h, <float 0x3FF19999A0000000, float 0x400A666660000000, float 0x40119999A0000000, float 0x40159999A0000000, float 0.5, float 0x3FE3333340000000, float 0x3FE6666660000000, float 0x3FE99999A0000000>
+ %m = bitcast <8 x float> %i to <4 x i64>
+ %z = load <4 x i64>* %y
+ %n = mul <4 x i64> %z, %m
+ %p = bitcast <4 x i64> %n to <8 x float>
+ store <8 x float> %p, <8 x float>* %g
+ ret void
+}
diff --git a/test/CodeGen/ARM/imm.ll b/test/CodeGen/ARM/imm.ll
new file mode 100644
index 0000000..6f25f9d
--- /dev/null
+++ b/test/CodeGen/ARM/imm.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=arm | not grep CPI
+
+define i32 @test1(i32 %A) {
+ %B = add i32 %A, -268435441 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test2() {
+ ret i32 65533
+}
+
+define i32 @test3(i32 %A) {
+ %B = or i32 %A, 65533 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
diff --git a/test/CodeGen/ARM/indirectbr.ll b/test/CodeGen/ARM/indirectbr.ll
new file mode 100644
index 0000000..5135d03
--- /dev/null
+++ b/test/CodeGen/ARM/indirectbr.ll
@@ -0,0 +1,64 @@
+; RUN: llc < %s -relocation-model=pic -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=ARM
+; RUN: llc < %s -relocation-model=pic -mtriple=thumb-apple-darwin | FileCheck %s -check-prefix=THUMB
+; RUN: llc < %s -relocation-model=static -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=THUMB2
+
+@nextaddr = global i8* null ; <i8**> [#uses=2]
[email protected] = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
+
+define internal arm_apcscc i32 @foo(i32 %i) nounwind {
+; ARM: foo:
+; THUMB: foo:
+; THUMB2: foo:
+entry:
+ %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
+ %1 = icmp eq i8* %0, null ; <i1> [#uses=1]
+; indirect branch gets duplicated here
+; ARM: bx
+; THUMB: mov pc, r1
+; THUMB2: mov pc, r1
+ br i1 %1, label %bb3, label %bb2
+
+bb2: ; preds = %entry, %bb3
+ %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
+; ARM: bx
+; THUMB: mov pc, r1
+; THUMB2: mov pc, r1
+ indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
+
+bb3: ; preds = %entry
+ %2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
+ %gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
+ br label %bb2
+
+L5: ; preds = %bb2
+ br label %L4
+
+L4: ; preds = %L5, %bb2
+ %res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1]
+ br label %L3
+
+L3: ; preds = %L4, %bb2
+ %res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1]
+ br label %L2
+
+L2: ; preds = %L3, %bb2
+ %res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
+ %phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
+ br label %L1
+
+L1: ; preds = %L2, %bb2
+ %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
+; ARM: ldr r1, LCPI
+; ARM: add r1, pc, r1
+; ARM: str r1
+; THUMB: ldr.n r2, LCPI
+; THUMB: add r2, pc
+; THUMB: str r2
+; THUMB2: ldr.n r2, LCPI
+; THUMB2-NEXT: str r2
+ store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
+ ret i32 %res.3
+}
+; ARM: .long L_BA4__foo_L5-(LPC{{.*}}+8)
+; THUMB: .long L_BA4__foo_L5-(LPC{{.*}}+4)
+; THUMB2: .long L_BA4__foo_L5
diff --git a/test/CodeGen/ARM/inlineasm-imm-arm.ll b/test/CodeGen/ARM/inlineasm-imm-arm.ll
new file mode 100644
index 0000000..45dfcf0
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm-imm-arm.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=arm
+
+; Test ARM-mode "I" constraint, for any Data Processing immediate.
+define i32 @testI(i32 %x) {
+ %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 65280 ) nounwind
+ ret i32 %y
+}
+
+; Test ARM-mode "J" constraint, for compatibility with unknown use in GCC.
+define void @testJ() {
+ tail call void asm sideeffect ".word $0", "J"( i32 4080 ) nounwind
+ ret void
+}
+
+; Test ARM-mode "K" constraint, for bitwise inverted Data Processing immediates.
+define void @testK() {
+ tail call void asm sideeffect ".word $0", "K"( i32 16777215 ) nounwind
+ ret void
+}
+
+; Test ARM-mode "L" constraint, for negated Data Processing immediates.
+define void @testL() {
+ tail call void asm sideeffect ".word $0", "L"( i32 -65280 ) nounwind
+ ret void
+}
+
+; Test ARM-mode "M" constraint, for value between 0 and 32.
+define i32 @testM(i32 %x) {
+ %y = call i32 asm "lsl $0, $1, $2", "=r,r,M"( i32 %x, i32 31 ) nounwind
+ ret i32 %y
+}
diff --git a/test/CodeGen/ARM/inlineasm.ll b/test/CodeGen/ARM/inlineasm.ll
new file mode 100644
index 0000000..d522348
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=arm -mattr=+v6
+
+define i32 @test1(i32 %tmp54) {
+ %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; <i32> [#uses=1]
+ ret i32 %tmp56
+}
+
+define void @test2() {
+ %tmp1 = call i64 asm "ldmia $1!, {$0, ${0:H}}", "=r,=*r,1"( i32** null, i32* null ) ; <i64> [#uses=2]
+ %tmp2 = lshr i64 %tmp1, 32 ; <i64> [#uses=1]
+ %tmp3 = trunc i64 %tmp2 to i32 ; <i32> [#uses=1]
+ %tmp4 = call i32 asm "pkhbt $0, $1, $2, lsl #16", "=r,r,r"( i32 0, i32 %tmp3 ) ; <i32> [#uses=0]
+ ret void
+}
+
+define void @test3() {
+ tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
+ ret void
+}
diff --git a/test/CodeGen/ARM/inlineasm2.ll b/test/CodeGen/ARM/inlineasm2.ll
new file mode 100644
index 0000000..a99bccf
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm2.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define double @__ieee754_sqrt(double %x) {
+ %tmp2 = tail call double asm "fsqrtd ${0:P}, ${1:P}", "=w,w"( double %x )
+ ret double %tmp2
+}
+
+define float @__ieee754_sqrtf(float %x) {
+ %tmp2 = tail call float asm "fsqrts $0, $1", "=w,w"( float %x )
+ ret float %tmp2
+}
diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll
new file mode 100644
index 0000000..f062772
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm3.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+; Radar 7449043
+%struct.int32x4_t = type { <4 x i32> }
+
+define arm_apcscc void @t() nounwind {
+entry:
+; CHECK: vmov.I64 q15, #0
+; CHECK: vmov.32 d30[0], r0
+; CHECK: vmov q0, q15
+ %tmp = alloca %struct.int32x4_t, align 16
+ call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind
+ ret void
+}
+
+; Radar 7457110
+%struct.int32x2_t = type { <4 x i32> }
+
+define arm_apcscc void @t2() nounwind {
+entry:
+; CHECK: vmov d30, d0
+; CHECK: vmov.32 r0, d30[0]
+ %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind
+ ret void
+}
diff --git a/test/CodeGen/ARM/insn-sched1.ll b/test/CodeGen/ARM/insn-sched1.ll
new file mode 100644
index 0000000..59f0d53
--- /dev/null
+++ b/test/CodeGen/ARM/insn-sched1.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm -mattr=+v6
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 |\
+; RUN: grep mov | count 3
+
+define i32 @test(i32 %x) {
+ %tmp = trunc i32 %x to i16 ; <i16> [#uses=1]
+ %tmp2 = tail call i32 @f( i32 1, i16 %tmp ) ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+declare i32 @f(i32, i16)
diff --git a/test/CodeGen/ARM/ispositive.ll b/test/CodeGen/ARM/ispositive.ll
new file mode 100644
index 0000000..245ed51
--- /dev/null
+++ b/test/CodeGen/ARM/ispositive.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i32 @test1(i32 %X) {
+; CHECK: mov r0, r0, lsr #31
+entry:
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
+
diff --git a/test/CodeGen/ARM/large-stack.ll b/test/CodeGen/ARM/large-stack.ll
new file mode 100644
index 0000000..ddf0f0e
--- /dev/null
+++ b/test/CodeGen/ARM/large-stack.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=arm
+
+define void @test1() {
+ %tmp = alloca [ 64 x i32 ] , align 4
+ ret void
+}
+
+define void @test2() {
+ %tmp = alloca [ 4168 x i8 ] , align 4
+ ret void
+}
+
+define i32 @test3() {
+ %retval = alloca i32, align 4
+ %tmp = alloca i32, align 4
+ %a = alloca [805306369 x i8], align 16
+ store i32 0, i32* %tmp
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/ARM/ldm.ll b/test/CodeGen/ARM/ldm.ll
new file mode 100644
index 0000000..1a016a0
--- /dev/null
+++ b/test/CodeGen/ARM/ldm.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
+
+@X = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
+
+define i32 @t1() {
+; CHECK: t1:
+; CHECK: ldmia
+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define i32 @t2() {
+; CHECK: t2:
+; CHECK: ldmia
+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
+ %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1]
+ %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @t3() {
+; CHECK: t3:
+; CHECK: ldmib
+; CHECK: ldmfd sp!
+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
+ %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
+ %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+declare i32 @f1(i32, i32)
+
+declare i32 @f2(i32, i32, i32)
diff --git a/test/CodeGen/ARM/ldr.ll b/test/CodeGen/ARM/ldr.ll
new file mode 100644
index 0000000..011e61c
--- /dev/null
+++ b/test/CodeGen/ARM/ldr.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i32 @f1(i32* %v) {
+; CHECK: f1:
+; CHECK: ldr r0
+entry:
+ %tmp = load i32* %v
+ ret i32 %tmp
+}
+
+define i32 @f2(i32* %v) {
+; CHECK: f2:
+; CHECK: ldr r0
+entry:
+ %tmp2 = getelementptr i32* %v, i32 1023
+ %tmp = load i32* %tmp2
+ ret i32 %tmp
+}
+
+define i32 @f3(i32* %v) {
+; CHECK: f3:
+; CHECK: mov
+; CHECK: ldr r0
+entry:
+ %tmp2 = getelementptr i32* %v, i32 1024
+ %tmp = load i32* %tmp2
+ ret i32 %tmp
+}
+
+define i32 @f4(i32 %base) {
+; CHECK: f4:
+; CHECK-NOT: mvn
+; CHECK: ldr r0
+entry:
+ %tmp1 = sub i32 %base, 128
+ %tmp2 = inttoptr i32 %tmp1 to i32*
+ %tmp3 = load i32* %tmp2
+ ret i32 %tmp3
+}
+
+define i32 @f5(i32 %base, i32 %offset) {
+; CHECK: f5:
+; CHECK: ldr r0
+entry:
+ %tmp1 = add i32 %base, %offset
+ %tmp2 = inttoptr i32 %tmp1 to i32*
+ %tmp3 = load i32* %tmp2
+ ret i32 %tmp3
+}
+
+define i32 @f6(i32 %base, i32 %offset) {
+; CHECK: f6:
+; CHECK: ldr r0{{.*}}lsl{{.*}}
+entry:
+ %tmp1 = shl i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i32*
+ %tmp4 = load i32* %tmp3
+ ret i32 %tmp4
+}
+
+define i32 @f7(i32 %base, i32 %offset) {
+; CHECK: f7:
+; CHECK: ldr r0{{.*}}lsr{{.*}}
+entry:
+ %tmp1 = lshr i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i32*
+ %tmp4 = load i32* %tmp3
+ ret i32 %tmp4
+}
diff --git a/test/CodeGen/ARM/ldr_ext.ll b/test/CodeGen/ARM/ldr_ext.ll
new file mode 100644
index 0000000..d29eb02
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_ext.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i32 @test1(i8* %t1) nounwind {
+; CHECK: ldrb
+ %tmp.u = load i8* %t1
+ %tmp1.s = zext i8 %tmp.u to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test2(i16* %t1) nounwind {
+; CHECK: ldrh
+ %tmp.u = load i16* %t1
+ %tmp1.s = zext i16 %tmp.u to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test3(i8* %t0) nounwind {
+; CHECK: ldrsb
+ %tmp.s = load i8* %t0
+ %tmp1.s = sext i8 %tmp.s to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test4(i16* %t0) nounwind {
+; CHECK: ldrsh
+ %tmp.s = load i16* %t0
+ %tmp1.s = sext i16 %tmp.s to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test5() nounwind {
+; CHECK: mov r0, #0
+; CHECK: ldrsh
+ %tmp.s = load i16* null
+ %tmp1.s = sext i16 %tmp.s to i32
+ ret i32 %tmp1.s
+}
diff --git a/test/CodeGen/ARM/ldr_frame.ll b/test/CodeGen/ARM/ldr_frame.ll
new file mode 100644
index 0000000..a3abdb6
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_frame.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=arm | not grep mov
+
+define i32 @f1() {
+ %buf = alloca [32 x i32], align 4
+ %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f2() {
+ %buf = alloca [32 x i8], align 4
+ %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0
+ %tmp1 = load i8* %tmp
+ %tmp2 = zext i8 %tmp1 to i32
+ ret i32 %tmp2
+}
+
+define i32 @f3() {
+ %buf = alloca [32 x i32], align 4
+ %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f4() {
+ %buf = alloca [32 x i8], align 4
+ %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2
+ %tmp1 = load i8* %tmp
+ %tmp2 = zext i8 %tmp1 to i32
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/ARM/ldr_post.ll b/test/CodeGen/ARM/ldr_post.ll
new file mode 100644
index 0000000..97a48e1
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_post.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=arm | \
+; RUN: grep {ldr.*\\\[.*\],} | count 1
+
+define i32 @test(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = mul i32 %a, %b ; <i32> [#uses=2]
+ %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1]
+ %tmp3 = load i32* %tmp2 ; <i32> [#uses=1]
+ %tmp4 = sub i32 %tmp1, %c ; <i32> [#uses=1]
+ %tmp5 = mul i32 %tmp4, %tmp3 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
diff --git a/test/CodeGen/ARM/ldr_pre.ll b/test/CodeGen/ARM/ldr_pre.ll
new file mode 100644
index 0000000..7c44284
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_pre.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=arm | \
+; RUN: grep {ldr.*\\!} | count 2
+
+define i32* @test1(i32* %X, i32* %dest) {
+ %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2]
+ %A = load i32* %Y ; <i32> [#uses=1]
+ store i32 %A, i32* %dest
+ ret i32* %Y
+}
+
+define i32 @test2(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = sub i32 %a, %b ; <i32> [#uses=2]
+ %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1]
+ %tmp3 = load i32* %tmp2 ; <i32> [#uses=1]
+ %tmp4 = sub i32 %tmp1, %c ; <i32> [#uses=1]
+ %tmp5 = add i32 %tmp4, %tmp3 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
diff --git a/test/CodeGen/ARM/ldrd.ll b/test/CodeGen/ARM/ldrd.ll
new file mode 100644
index 0000000..c366e2d
--- /dev/null
+++ b/test/CodeGen/ARM/ldrd.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=V6
+; RUN: llc < %s -mtriple=armv5-apple-darwin | FileCheck %s -check-prefix=V5
+; RUN: llc < %s -mtriple=armv6-eabi | FileCheck %s -check-prefix=EABI
+; rdar://r6949835
+
+@b = external global i64*
+
+define i64 @t(i64 %a) nounwind readonly {
+entry:
+;V6: ldrd r2, [r2]
+
+;V5: ldr r3, [r2]
+;V5: ldr r2, [r2, #+4]
+
+;EABI: ldr r3, [r2]
+;EABI: ldr r2, [r2, #+4]
+
+ %0 = load i64** @b, align 4
+ %1 = load i64* %0, align 4
+ %2 = mul i64 %1, %a
+ ret i64 %2
+}
diff --git a/test/CodeGen/ARM/load.ll b/test/CodeGen/ARM/load.ll
new file mode 100644
index 0000000..253b0e1
--- /dev/null
+++ b/test/CodeGen/ARM/load.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=arm > %t
+; RUN: grep ldrsb %t
+; RUN: grep ldrb %t
+; RUN: grep ldrsh %t
+; RUN: grep ldrh %t
+
+
+define i32 @f1(i8* %p) {
+entry:
+ %tmp = load i8* %p ; <i8> [#uses=1]
+ %tmp1 = sext i8 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @f2(i8* %p) {
+entry:
+ %tmp = load i8* %p ; <i8> [#uses=1]
+ %tmp2 = zext i8 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f3(i16* %p) {
+entry:
+ %tmp = load i16* %p ; <i16> [#uses=1]
+ %tmp3 = sext i16 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
+
+define i32 @f4(i16* %p) {
+entry:
+ %tmp = load i16* %p ; <i16> [#uses=1]
+ %tmp4 = zext i16 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
diff --git a/test/CodeGen/ARM/long-setcc.ll b/test/CodeGen/ARM/long-setcc.ll
new file mode 100644
index 0000000..c76a5e4
--- /dev/null
+++ b/test/CodeGen/ARM/long-setcc.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=arm | grep cmp | count 1
+
+
+define i1 @t1(i64 %x) {
+ %B = icmp slt i64 %x, 0
+ ret i1 %B
+}
+
+define i1 @t2(i64 %x) {
+ %tmp = icmp ult i64 %x, 4294967296
+ ret i1 %tmp
+}
+
+define i1 @t3(i32 %x) {
+ %tmp = icmp ugt i32 %x, -1
+ ret i1 %tmp
+}
diff --git a/test/CodeGen/ARM/long.ll b/test/CodeGen/ARM/long.ll
new file mode 100644
index 0000000..16ef7cc
--- /dev/null
+++ b/test/CodeGen/ARM/long.ll
@@ -0,0 +1,90 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i64 @f1() {
+; CHECK: f1:
+entry:
+ ret i64 0
+}
+
+define i64 @f2() {
+; CHECK: f2:
+entry:
+ ret i64 1
+}
+
+define i64 @f3() {
+; CHECK: f3:
+; CHECK: mvn{{.*}}-2147483648
+entry:
+ ret i64 2147483647
+}
+
+define i64 @f4() {
+; CHECK: f4:
+; CHECK: -2147483648
+entry:
+ ret i64 2147483648
+}
+
+define i64 @f5() {
+; CHECK: f5:
+; CHECK: mvn
+; CHECK: mvn{{.*}}-2147483648
+entry:
+ ret i64 9223372036854775807
+}
+
+define i64 @f6(i64 %x, i64 %y) {
+; CHECK: f6:
+; CHECK: adds
+; CHECK: adc
+entry:
+ %tmp1 = add i64 %y, 1 ; <i64> [#uses=1]
+ ret i64 %tmp1
+}
+
+define void @f7() {
+; CHECK: f7:
+entry:
+ %tmp = call i64 @f8( ) ; <i64> [#uses=0]
+ ret void
+}
+
+declare i64 @f8()
+
+define i64 @f9(i64 %a, i64 %b) {
+; CHECK: f9:
+; CHECK: subs r
+; CHECK: sbc
+entry:
+ %tmp = sub i64 %a, %b ; <i64> [#uses=1]
+ ret i64 %tmp
+}
+
+define i64 @f(i32 %a, i32 %b) {
+; CHECK: f:
+; CHECK: smull
+entry:
+ %tmp = sext i32 %a to i64 ; <i64> [#uses=1]
+ %tmp1 = sext i32 %b to i64 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
+ ret i64 %tmp2
+}
+
+define i64 @g(i32 %a, i32 %b) {
+; CHECK: g:
+; CHECK: umull
+entry:
+ %tmp = zext i32 %a to i64 ; <i64> [#uses=1]
+ %tmp1 = zext i32 %b to i64 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
+ ret i64 %tmp2
+}
+
+define i64 @f10() {
+; CHECK: f10:
+entry:
+ %a = alloca i64, align 8 ; <i64*> [#uses=1]
+ %retval = load i64* %a ; <i64> [#uses=1]
+ ret i64 %retval
+}
diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll
new file mode 100644
index 0000000..76332cc
--- /dev/null
+++ b/test/CodeGen/ARM/long_shift.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i64 @f0(i64 %A, i64 %B) {
+; CHECK: f0
+; CHECK: movs r3, r3, lsr #1
+; CHECK-NEXT: mov r2, r2, rrx
+; CHECK-NEXT: subs r0, r0, r2
+; CHECK-NEXT: sbc r1, r1, r3
+ %tmp = bitcast i64 %A to i64
+ %tmp2 = lshr i64 %B, 1
+ %tmp3 = sub i64 %tmp, %tmp2
+ ret i64 %tmp3
+}
+
+define i32 @f1(i64 %x, i64 %y) {
+; CHECK: f1
+; CHECK: mov r0, r0, lsl r2
+ %a = shl i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
+
+define i32 @f2(i64 %x, i64 %y) {
+; CHECK: f2
+; CHECK: mov r0, r0, lsr r2
+; CHECK-NEXT: rsb r12, r2, #32
+; CHECK-NEXT: sub r2, r2, #32
+; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: orr r0, r0, r1, lsl r12
+; CHECK-NEXT: movge r0, r1, asr r2
+ %a = ashr i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
+
+define i32 @f3(i64 %x, i64 %y) {
+; CHECK: f3
+; CHECK: mov r0, r0, lsr r2
+; CHECK-NEXT: rsb r12, r2, #32
+; CHECK-NEXT: sub r2, r2, #32
+; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: orr r0, r0, r1, lsl r12
+; CHECK-NEXT: movge r0, r1, lsr r2
+ %a = lshr i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll
new file mode 100644
index 0000000..507ec2c
--- /dev/null
+++ b/test/CodeGen/ARM/lsr-code-insertion.ll
@@ -0,0 +1,60 @@
+; RUN: llc < %s -stats |& grep {40.*Number of machine instrs printed}
+; RUN: llc < %s -stats |& grep {.*Number of re-materialization}
+; This test really wants to check that the resultant "cond_true" block only
+; has a single store in it, and that cond_true55 only has code to materialize
+; the constant and do a store. We do *not* want something like this:
+;
+;LBB1_3: @cond_true
+; add r8, r0, r6
+; str r10, [r8, #+4]
+;
+target triple = "arm-apple-darwin8"
+
+define void @foo(i32* %mc, i32* %mpp, i32* %ip, i32* %dpp, i32* %tpmm, i32 %M, i32* %tpim, i32* %tpdm, i32* %bp, i32* %ms, i32 %xmb) {
+entry:
+ %tmp6584 = icmp slt i32 %M, 1 ; <i1> [#uses=1]
+ br i1 %tmp6584, label %return, label %bb
+
+bb: ; preds = %cond_next59, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %k.069.0, %cond_next59 ] ; <i32> [#uses=6]
+ %k.069.0 = add i32 %indvar, 1 ; <i32> [#uses=3]
+ %tmp3 = getelementptr i32* %mpp, i32 %indvar ; <i32*> [#uses=1]
+ %tmp4 = load i32* %tmp3 ; <i32> [#uses=1]
+ %tmp8 = getelementptr i32* %tpmm, i32 %indvar ; <i32*> [#uses=1]
+ %tmp9 = load i32* %tmp8 ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp4 ; <i32> [#uses=2]
+ %tmp13 = getelementptr i32* %mc, i32 %k.069.0 ; <i32*> [#uses=5]
+ store i32 %tmp10, i32* %tmp13
+ %tmp17 = getelementptr i32* %ip, i32 %indvar ; <i32*> [#uses=1]
+ %tmp18 = load i32* %tmp17 ; <i32> [#uses=1]
+ %tmp22 = getelementptr i32* %tpim, i32 %indvar ; <i32*> [#uses=1]
+ %tmp23 = load i32* %tmp22 ; <i32> [#uses=1]
+ %tmp24 = add i32 %tmp23, %tmp18 ; <i32> [#uses=2]
+ %tmp30 = icmp sgt i32 %tmp24, %tmp10 ; <i1> [#uses=1]
+ br i1 %tmp30, label %cond_true, label %cond_next
+
+cond_true: ; preds = %bb
+ store i32 %tmp24, i32* %tmp13
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %bb
+ %tmp39 = load i32* %tmp13 ; <i32> [#uses=1]
+ %tmp42 = getelementptr i32* %ms, i32 %k.069.0 ; <i32*> [#uses=1]
+ %tmp43 = load i32* %tmp42 ; <i32> [#uses=1]
+ %tmp44 = add i32 %tmp43, %tmp39 ; <i32> [#uses=2]
+ store i32 %tmp44, i32* %tmp13
+ %tmp52 = icmp slt i32 %tmp44, -987654321 ; <i1> [#uses=1]
+ br i1 %tmp52, label %cond_true55, label %cond_next59
+
+cond_true55: ; preds = %cond_next
+ store i32 -987654321, i32* %tmp13
+ br label %cond_next59
+
+cond_next59: ; preds = %cond_true55, %cond_next
+ %tmp61 = add i32 %indvar, 2 ; <i32> [#uses=1]
+ %tmp65 = icmp sgt i32 %tmp61, %M ; <i1> [#uses=1]
+ br i1 %tmp65, label %return, label %bb
+
+return: ; preds = %cond_next59, %entry
+ ret void
+}
diff --git a/test/CodeGen/ARM/lsr-scale-addr-mode.ll b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
new file mode 100644
index 0000000..8130019
--- /dev/null
+++ b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=arm | grep lsl | grep -F {lsl #2\]}
+; Should use scaled addressing mode.
+
+define void @sintzero(i32* %a) nounwind {
+entry:
+ store i32 0, i32* %a
+ br label %cond_next
+
+cond_next: ; preds = %cond_next, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %tmp25, %cond_next ] ; <i32> [#uses=1]
+ %tmp25 = add i32 %indvar, 1 ; <i32> [#uses=3]
+ %tmp36 = getelementptr i32* %a, i32 %tmp25 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp36
+ icmp eq i32 %tmp25, -1 ; <i1>:0 [#uses=1]
+ br i1 %0, label %return, label %cond_next
+
+return: ; preds = %cond_next
+ ret void
+}
diff --git a/test/CodeGen/ARM/mem.ll b/test/CodeGen/ARM/mem.ll
new file mode 100644
index 0000000..f46c7a5
--- /dev/null
+++ b/test/CodeGen/ARM/mem.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=arm | grep strb
+; RUN: llc < %s -march=arm | grep strh
+
+define void @f1() {
+entry:
+ store i8 0, i8* null
+ ret void
+}
+
+define void @f2() {
+entry:
+ store i16 0, i16* null
+ ret void
+}
diff --git a/test/CodeGen/ARM/memcpy-inline.ll b/test/CodeGen/ARM/memcpy-inline.ll
new file mode 100644
index 0000000..ed20c32
--- /dev/null
+++ b/test/CodeGen/ARM/memcpy-inline.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin | grep ldmia
+; RUN: llc < %s -mtriple=arm-apple-darwin | grep stmia
+; RUN: llc < %s -mtriple=arm-apple-darwin | grep ldrb
+; RUN: llc < %s -mtriple=arm-apple-darwin | grep ldrh
+
+ %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
+@src = external global %struct.x
+@dst = external global %struct.x
+
+define i32 @t() {
+entry:
+ call void @llvm.memcpy.i32( i8* getelementptr (%struct.x* @dst, i32 0, i32 0), i8* getelementptr (%struct.x* @src, i32 0, i32 0), i32 11, i32 8 )
+ ret i32 0
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/ARM/memfunc.ll b/test/CodeGen/ARM/memfunc.ll
new file mode 100644
index 0000000..41d5944
--- /dev/null
+++ b/test/CodeGen/ARM/memfunc.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=arm
+
+define void @f() {
+entry:
+ call void @llvm.memmove.i32( i8* null, i8* null, i32 64, i32 0 )
+ call void @llvm.memcpy.i32( i8* null, i8* null, i32 64, i32 0 )
+ call void @llvm.memset.i32( i8* null, i8 64, i32 0, i32 0 )
+ unreachable
+}
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
diff --git a/test/CodeGen/ARM/mls.ll b/test/CodeGen/ARM/mls.ll
new file mode 100644
index 0000000..a6cdba4
--- /dev/null
+++ b/test/CodeGen/ARM/mls.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = mul i32 %a, %b
+ %tmp2 = sub i32 %c, %tmp1
+ ret i32 %tmp2
+}
+
+; sub doesn't commute, so no mls for this one
+define i32 @f2(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = mul i32 %a, %b
+ %tmp2 = sub i32 %tmp1, %c
+ ret i32 %tmp2
+}
+
+; CHECK: mls r0, r0, r1, r2
diff --git a/test/CodeGen/ARM/movt-movw-global.ll b/test/CodeGen/ARM/movt-movw-global.ll
new file mode 100644
index 0000000..886ff3f
--- /dev/null
+++ b/test/CodeGen/ARM/movt-movw-global.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-eabi"
+
+@foo = common global i32 0 ; <i32*> [#uses=1]
+
+define arm_aapcs_vfpcc i32* @bar1() nounwind readnone {
+entry:
+; CHECK: movw r0, :lower16:foo
+; CHECK-NEXT: movt r0, :upper16:foo
+ ret i32* @foo
+}
+
+define arm_aapcs_vfpcc void @bar2(i32 %baz) nounwind {
+entry:
+; CHECK: movw r1, :lower16:foo
+; CHECK-NEXT: movt r1, :upper16:foo
+ store i32 %baz, i32* @foo, align 4
+ ret void
+}
diff --git a/test/CodeGen/ARM/movt.ll b/test/CodeGen/ARM/movt.ll
new file mode 100644
index 0000000..e82aca0
--- /dev/null
+++ b/test/CodeGen/ARM/movt.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s
+; rdar://7317664
+
+define i32 @t(i32 %X) nounwind {
+; CHECK: t:
+; CHECK: movt r0, #65535
+entry:
+ %0 = or i32 %X, -65536
+ ret i32 %0
+}
+
+define i32 @t2(i32 %X) nounwind {
+; CHECK: t2:
+; CHECK: movt r0, #65534
+entry:
+ %0 = or i32 %X, -131072
+ %1 = and i32 %0, -65537
+ ret i32 %1
+}
diff --git a/test/CodeGen/ARM/mul.ll b/test/CodeGen/ARM/mul.ll
new file mode 100644
index 0000000..466a802
--- /dev/null
+++ b/test/CodeGen/ARM/mul.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=arm | grep mul | count 2
+; RUN: llc < %s -march=arm | grep lsl | count 2
+
+define i32 @f1(i32 %u) {
+ %tmp = mul i32 %u, %u
+ ret i32 %tmp
+}
+
+define i32 @f2(i32 %u, i32 %v) {
+ %tmp = mul i32 %u, %v
+ ret i32 %tmp
+}
+
+define i32 @f3(i32 %u) {
+ %tmp = mul i32 %u, 5
+ ret i32 %tmp
+}
+
+define i32 @f4(i32 %u) {
+ %tmp = mul i32 %u, 4
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/ARM/mul_const.ll b/test/CodeGen/ARM/mul_const.ll
new file mode 100644
index 0000000..93188cd
--- /dev/null
+++ b/test/CodeGen/ARM/mul_const.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i32 @t1(i32 %v) nounwind readnone {
+entry:
+; CHECK: t1:
+; CHECK: add r0, r0, r0, lsl #3
+ %0 = mul i32 %v, 9
+ ret i32 %0
+}
+
+define i32 @t2(i32 %v) nounwind readnone {
+entry:
+; CHECK: t2:
+; CHECK: rsb r0, r0, r0, lsl #3
+ %0 = mul i32 %v, 7
+ ret i32 %0
+}
diff --git a/test/CodeGen/ARM/mulhi.ll b/test/CodeGen/ARM/mulhi.ll
new file mode 100644
index 0000000..148f291
--- /dev/null
+++ b/test/CodeGen/ARM/mulhi.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=arm -mattr=+v6
+; RUN: llc < %s -march=arm -mattr=+v6 | \
+; RUN: grep smmul | count 1
+; RUN: llc < %s -march=arm | grep umull | count 1
+
+define i32 @smulhi(i32 %x, i32 %y) {
+ %tmp = sext i32 %x to i64 ; <i64> [#uses=1]
+ %tmp1 = sext i32 %y to i64 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
+ %tmp3 = lshr i64 %tmp2, 32 ; <i64> [#uses=1]
+ %tmp3.upgrd.1 = trunc i64 %tmp3 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp3.upgrd.1
+}
+
+define i32 @umulhi(i32 %x, i32 %y) {
+ %tmp = zext i32 %x to i64 ; <i64> [#uses=1]
+ %tmp1 = zext i32 %y to i64 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
+ %tmp3 = lshr i64 %tmp2, 32 ; <i64> [#uses=1]
+ %tmp3.upgrd.2 = trunc i64 %tmp3 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp3.upgrd.2
+}
diff --git a/test/CodeGen/ARM/mvn.ll b/test/CodeGen/ARM/mvn.ll
new file mode 100644
index 0000000..571c21a
--- /dev/null
+++ b/test/CodeGen/ARM/mvn.ll
@@ -0,0 +1,74 @@
+; RUN: llc < %s -march=arm | grep mvn | count 8
+
+define i32 @f1() {
+entry:
+ ret i32 -1
+}
+
+define i32 @f2(i32 %a) {
+entry:
+ %tmpnot = xor i32 %a, -1 ; <i32> [#uses=1]
+ ret i32 %tmpnot
+}
+
+define i32 @f3(i32 %a) {
+entry:
+ %tmp1 = shl i32 %a, 2 ; <i32> [#uses=1]
+ %tmp1not = xor i32 %tmp1, -1 ; <i32> [#uses=1]
+ ret i32 %tmp1not
+}
+
+define i32 @f4(i32 %a, i8 %b) {
+entry:
+ %shift.upgrd.1 = zext i8 %b to i32 ; <i32> [#uses=1]
+ %tmp3 = shl i32 %a, %shift.upgrd.1 ; <i32> [#uses=1]
+ %tmp3not = xor i32 %tmp3, -1 ; <i32> [#uses=1]
+ ret i32 %tmp3not
+}
+
+define i32 @f5(i32 %a) {
+entry:
+ %tmp1 = lshr i32 %a, 2 ; <i32> [#uses=1]
+ %tmp1not = xor i32 %tmp1, -1 ; <i32> [#uses=1]
+ ret i32 %tmp1not
+}
+
+define i32 @f6(i32 %a, i8 %b) {
+entry:
+ %shift.upgrd.2 = zext i8 %b to i32 ; <i32> [#uses=1]
+ %tmp2 = lshr i32 %a, %shift.upgrd.2 ; <i32> [#uses=1]
+ %tmp2not = xor i32 %tmp2, -1 ; <i32> [#uses=1]
+ ret i32 %tmp2not
+}
+
+define i32 @f7(i32 %a) {
+entry:
+ %tmp1 = ashr i32 %a, 2 ; <i32> [#uses=1]
+ %tmp1not = xor i32 %tmp1, -1 ; <i32> [#uses=1]
+ ret i32 %tmp1not
+}
+
+define i32 @f8(i32 %a, i8 %b) {
+entry:
+ %shift.upgrd.3 = zext i8 %b to i32 ; <i32> [#uses=1]
+ %tmp3 = ashr i32 %a, %shift.upgrd.3 ; <i32> [#uses=1]
+ %tmp3not = xor i32 %tmp3, -1 ; <i32> [#uses=1]
+ ret i32 %tmp3not
+}
+
+define i32 @f9() {
+entry:
+ %tmp4845 = add i32 0, 0 ; <i32> [#uses=1]
+ br label %cond_true4848
+
+cond_true4848: ; preds = %entry
+ %tmp4851 = sub i32 -3, 0 ; <i32> [#uses=1]
+ %abc = add i32 %tmp4851, %tmp4845 ; <i32> [#uses=1]
+ ret i32 %abc
+}
+
+define i1 @f10(i32 %a) {
+entry:
+ %tmp102 = icmp eq i32 -2, %a ; <i1> [#uses=1]
+ ret i1 %tmp102
+}
diff --git a/test/CodeGen/ARM/neon_arith1.ll b/test/CodeGen/ARM/neon_arith1.ll
new file mode 100644
index 0000000..5892737
--- /dev/null
+++ b/test/CodeGen/ARM/neon_arith1.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=arm -mattr=+neon | grep vadd
+
+define <8 x i8> @t_i8x8(<8 x i8> %a, <8 x i8> %b) nounwind {
+entry:
+ %0 = add <8 x i8> %a, %b
+ ret <8 x i8> %0
+}
diff --git a/test/CodeGen/ARM/neon_ld1.ll b/test/CodeGen/ARM/neon_ld1.ll
new file mode 100644
index 0000000..c78872a
--- /dev/null
+++ b/test/CodeGen/ARM/neon_ld1.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=arm -mattr=+neon | grep vldr.64 | count 4
+; RUN: llc < %s -march=arm -mattr=+neon | grep vstr.64
+; RUN: llc < %s -march=arm -mattr=+neon | grep vmov
+
+define void @t1(<2 x i32>* %r, <4 x i16>* %a, <4 x i16>* %b) nounwind {
+entry:
+ %0 = load <4 x i16>* %a, align 8 ; <<4 x i16>> [#uses=1]
+ %1 = load <4 x i16>* %b, align 8 ; <<4 x i16>> [#uses=1]
+ %2 = add <4 x i16> %0, %1 ; <<4 x i16>> [#uses=1]
+ %3 = bitcast <4 x i16> %2 to <2 x i32> ; <<2 x i32>> [#uses=1]
+ store <2 x i32> %3, <2 x i32>* %r, align 8
+ ret void
+}
+
+define <2 x i32> @t2(<4 x i16>* %a, <4 x i16>* %b) nounwind readonly {
+entry:
+ %0 = load <4 x i16>* %a, align 8 ; <<4 x i16>> [#uses=1]
+ %1 = load <4 x i16>* %b, align 8 ; <<4 x i16>> [#uses=1]
+ %2 = sub <4 x i16> %0, %1 ; <<4 x i16>> [#uses=1]
+ %3 = bitcast <4 x i16> %2 to <2 x i32> ; <<2 x i32>> [#uses=1]
+ ret <2 x i32> %3
+}
diff --git a/test/CodeGen/ARM/neon_ld2.ll b/test/CodeGen/ARM/neon_ld2.ll
new file mode 100644
index 0000000..130277b
--- /dev/null
+++ b/test/CodeGen/ARM/neon_ld2.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=arm -mattr=+neon | grep vldmia | count 4
+; RUN: llc < %s -march=arm -mattr=+neon | grep vstmia | count 1
+; RUN: llc < %s -march=arm -mattr=+neon | grep vmov | count 2
+
+define void @t1(<4 x i32>* %r, <2 x i64>* %a, <2 x i64>* %b) nounwind {
+entry:
+ %0 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1]
+ %1 = load <2 x i64>* %b, align 16 ; <<2 x i64>> [#uses=1]
+ %2 = add <2 x i64> %0, %1 ; <<2 x i64>> [#uses=1]
+ %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %3, <4 x i32>* %r, align 16
+ ret void
+}
+
+define <4 x i32> @t2(<2 x i64>* %a, <2 x i64>* %b) nounwind readonly {
+entry:
+ %0 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1]
+ %1 = load <2 x i64>* %b, align 16 ; <<2 x i64>> [#uses=1]
+ %2 = sub <2 x i64> %0, %1 ; <<2 x i64>> [#uses=1]
+ %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %3
+}
+
diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll
new file mode 100644
index 0000000..1e2e7aa
--- /dev/null
+++ b/test/CodeGen/ARM/pack.ll
@@ -0,0 +1,73 @@
+; RUN: llc < %s -march=arm -mattr=+v6 | \
+; RUN: grep pkhbt | count 5
+; RUN: llc < %s -march=arm -mattr=+v6 | \
+; RUN: grep pkhtb | count 4
+
+define i32 @test1(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %Y, 16 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test1a(i32 %X, i32 %Y) {
+ %tmp19 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp37 = shl i32 %Y, 16 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp37, %tmp19 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test2(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp3 = shl i32 %Y, 12 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp3, -65536 ; <i32> [#uses=1]
+ %tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp57
+}
+
+define i32 @test3(i32 %X, i32 %Y) {
+ %tmp19 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp37 = shl i32 %Y, 18 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp37, %tmp19 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test4(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp3 = and i32 %Y, -65536 ; <i32> [#uses=1]
+ %tmp46 = or i32 %tmp3, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp46
+}
+
+define i32 @test5(i32 %X, i32 %Y) {
+ %tmp17 = and i32 %X, -65536 ; <i32> [#uses=1]
+ %tmp2 = bitcast i32 %Y to i32 ; <i32> [#uses=1]
+ %tmp4 = lshr i32 %tmp2, 16 ; <i32> [#uses=2]
+ %tmp5 = or i32 %tmp4, %tmp17 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test5a(i32 %X, i32 %Y) {
+ %tmp110 = and i32 %X, -65536 ; <i32> [#uses=1]
+ %tmp37 = lshr i32 %Y, 16 ; <i32> [#uses=1]
+ %tmp39 = bitcast i32 %tmp37 to i32 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp39, %tmp110 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test6(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, -65536 ; <i32> [#uses=1]
+ %tmp37 = lshr i32 %Y, 12 ; <i32> [#uses=1]
+ %tmp38 = bitcast i32 %tmp37 to i32 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp38, 65535 ; <i32> [#uses=1]
+ %tmp59 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp59
+}
+
+define i32 @test7(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, -65536 ; <i32> [#uses=1]
+ %tmp3 = ashr i32 %Y, 18 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp3, 65535 ; <i32> [#uses=1]
+ %tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp57
+}
diff --git a/test/CodeGen/ARM/pr3502.ll b/test/CodeGen/ARM/pr3502.ll
new file mode 100644
index 0000000..606d969
--- /dev/null
+++ b/test/CodeGen/ARM/pr3502.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=arm-none-linux-gnueabi
+;pr3502
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+ %struct.ArmPTD = type { i32 }
+ %struct.RegisterSave = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.SHARED_AREA = type { i32, %struct.SHARED_AREA*, %struct.SHARED_AREA*, %struct.SHARED_AREA*, %struct.ArmPTD, void (%struct.RegisterSave*)*, void (%struct.RegisterSave*)*, i32, [1024 x i8], i32, i32, i32, i32, i32, i8, i8, i16, i32, i32, i32, i32, [16 x i8], i32, i32, i32, i8, i8, i8, i32, i16, i32, i64, i32, i32, i32, i32, i32, i32, i8*, i32, [256 x i8], i32, i32, i32, [20 x i8], %struct.RegisterSave, { %struct.WorldSwitchV5 }, [4 x i32] }
+ %struct.WorldSwitchV5 = type { i32, i32, i32, i32, i32, i32, i32 }
+
+define void @SomeCall(i32 %num) nounwind {
+entry:
+ tail call void asm sideeffect "mcr p15, 0, $0, c7, c10, 4 \0A\09", "r,~{memory}"(i32 0) nounwind
+ tail call void asm sideeffect "mcr p15,0,$0,c7,c14,0", "r,~{memory}"(i32 0) nounwind
+ %0 = load %struct.SHARED_AREA** null, align 4 ; <%struct.SHARED_AREA*> [#uses=1]
+ %1 = ptrtoint %struct.SHARED_AREA* %0 to i32 ; <i32> [#uses=1]
+ %2 = lshr i32 %1, 20 ; <i32> [#uses=1]
+ %3 = tail call i32 @SetCurrEntry(i32 %2, i32 0) nounwind ; <i32> [#uses=0]
+ tail call void @ClearStuff(i32 0) nounwind
+ ret void
+}
+
+declare i32 @SetCurrEntry(i32, i32)
+
+declare void @ClearStuff(i32)
diff --git a/test/CodeGen/ARM/private.ll b/test/CodeGen/ARM/private.ll
new file mode 100644
index 0000000..fba56b4
--- /dev/null
+++ b/test/CodeGen/ARM/private.ll
@@ -0,0 +1,22 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llc < %s -mtriple=arm-linux-gnueabi > %t
+; RUN: grep .Lfoo: %t
+; RUN: egrep bl.*\.Lfoo %t
+; RUN: grep .Lbaz: %t
+; RUN: grep long.*\.Lbaz %t
+
+declare void @foo()
+
+define private void @foo() {
+ ret void
+}
+
+@baz = private global i32 4
+
+define i32 @bar() {
+ call void @foo()
+ %1 = load i32* @baz, align 4
+ ret i32 %1
+}
+
diff --git a/test/CodeGen/ARM/remat.ll b/test/CodeGen/ARM/remat.ll
new file mode 100644
index 0000000..367f782
--- /dev/null
+++ b/test/CodeGen/ARM/remat.ll
@@ -0,0 +1,65 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -stats -info-output-file - | grep "Number of re-materialization"
+
+define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
+entry:
+ br i1 undef, label %smvp.exit, label %bb.i3
+
+bb.i3: ; preds = %bb.i3, %bb134
+ br i1 undef, label %smvp.exit, label %bb.i3
+
+smvp.exit: ; preds = %bb.i3
+ %0 = fmul double %d1, 2.400000e-03 ; <double> [#uses=2]
+ br i1 undef, label %bb138.preheader, label %bb159
+
+bb138.preheader: ; preds = %smvp.exit
+ br label %bb138
+
+bb138: ; preds = %bb138, %bb138.preheader
+ br i1 undef, label %bb138, label %bb145.loopexit
+
+bb142: ; preds = %bb.nph218.bb.nph218.split_crit_edge, %phi0.exit
+ %1 = fmul double %d1, -1.200000e-03 ; <double> [#uses=1]
+ %2 = fadd double %d2, %1 ; <double> [#uses=1]
+ %3 = fmul double %2, %d2 ; <double> [#uses=1]
+ %4 = fsub double 0.000000e+00, %3 ; <double> [#uses=1]
+ br i1 %14, label %phi1.exit, label %bb.i35
+
+bb.i35: ; preds = %bb142
+ %5 = call arm_apcscc double @sin(double %15) nounwind readonly ; <double> [#uses=1]
+ %6 = fmul double %5, 0x4031740AFA84AD8A ; <double> [#uses=1]
+ %7 = fsub double 1.000000e+00, undef ; <double> [#uses=1]
+ %8 = fdiv double %7, 6.000000e-01 ; <double> [#uses=1]
+ br label %phi1.exit
+
+phi1.exit: ; preds = %bb.i35, %bb142
+ %.pn = phi double [ %6, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=0]
+ %9 = phi double [ %8, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
+ %10 = fmul double undef, %9 ; <double> [#uses=0]
+ br i1 %14, label %phi0.exit, label %bb.i
+
+bb.i: ; preds = %phi1.exit
+ unreachable
+
+phi0.exit: ; preds = %phi1.exit
+ %11 = fsub double %4, undef ; <double> [#uses=1]
+ %12 = fadd double 0.000000e+00, %11 ; <double> [#uses=1]
+ store double %12, double* undef, align 4
+ br label %bb142
+
+bb145.loopexit: ; preds = %bb138
+ br i1 undef, label %bb.nph218.bb.nph218.split_crit_edge, label %bb159
+
+bb.nph218.bb.nph218.split_crit_edge: ; preds = %bb145.loopexit
+ %13 = fmul double %0, 0x401921FB54442D18 ; <double> [#uses=1]
+ %14 = fcmp ugt double %0, 6.000000e-01 ; <i1> [#uses=2]
+ %15 = fdiv double %13, 6.000000e-01 ; <double> [#uses=1]
+ br label %bb142
+
+bb159: ; preds = %bb145.loopexit, %smvp.exit, %bb134
+ unreachable
+
+bb166: ; preds = %bb127
+ unreachable
+}
+
+declare arm_apcscc double @sin(double) nounwind readonly
diff --git a/test/CodeGen/ARM/ret0.ll b/test/CodeGen/ARM/ret0.ll
new file mode 100644
index 0000000..5c312eb
--- /dev/null
+++ b/test/CodeGen/ARM/ret0.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=arm
+
+define i32 @test() {
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/ret_arg1.ll b/test/CodeGen/ARM/ret_arg1.ll
new file mode 100644
index 0000000..1ab947b
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg1.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=arm
+
+define i32 @test(i32 %a1) {
+ ret i32 %a1
+}
diff --git a/test/CodeGen/ARM/ret_arg2.ll b/test/CodeGen/ARM/ret_arg2.ll
new file mode 100644
index 0000000..84477d0
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm
+
+define i32 @test(i32 %a1, i32 %a2) {
+ ret i32 %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_arg3.ll b/test/CodeGen/ARM/ret_arg3.ll
new file mode 100644
index 0000000..f7f9057
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg3.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=arm
+define i32 @test(i32 %a1, i32 %a2, i32 %a3) {
+ ret i32 %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_arg4.ll b/test/CodeGen/ARM/ret_arg4.ll
new file mode 100644
index 0000000..f7b3e4a
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg4.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=arm
+
+define i32 @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+ ret i32 %a4
+}
diff --git a/test/CodeGen/ARM/ret_arg5.ll b/test/CodeGen/ARM/ret_arg5.ll
new file mode 100644
index 0000000..c4f9fb5e
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg5.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=arm
+
+define i32 @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5) {
+ ret i32 %a5
+}
diff --git a/test/CodeGen/ARM/ret_f32_arg2.ll b/test/CodeGen/ARM/ret_f32_arg2.ll
new file mode 100644
index 0000000..2bafea6
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f32_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define float @test_f32(float %a1, float %a2) {
+ ret float %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_f32_arg5.ll b/test/CodeGen/ARM/ret_f32_arg5.ll
new file mode 100644
index 0000000..c6ce60e
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f32_arg5.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define float @test_f32_arg5(float %a1, float %a2, float %a3, float %a4, float %a5) {
+ ret float %a5
+}
+
diff --git a/test/CodeGen/ARM/ret_f64_arg2.ll b/test/CodeGen/ARM/ret_f64_arg2.ll
new file mode 100644
index 0000000..386e85f
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f64_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define double @test_f64(double %a1, double %a2) {
+ ret double %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_f64_arg_reg_split.ll b/test/CodeGen/ARM/ret_f64_arg_reg_split.ll
new file mode 100644
index 0000000..bdb0a60
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f64_arg_reg_split.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mcpu=arm8 -mattr=+vfp2
+
+define double @test_double_arg_reg_split(i32 %a1, double %a2) {
+ ret double %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_f64_arg_split.ll b/test/CodeGen/ARM/ret_f64_arg_split.ll
new file mode 100644
index 0000000..4f841a3
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f64_arg_split.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define double @test_double_arg_split(i64 %a1, i32 %a2, double %a3) {
+ ret double %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_f64_arg_stack.ll b/test/CodeGen/ARM/ret_f64_arg_stack.ll
new file mode 100644
index 0000000..2144317
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f64_arg_stack.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define double @test_double_arg_stack(i64 %a1, i32 %a2, i32 %a3, double %a4) {
+ ret double %a4
+}
+
diff --git a/test/CodeGen/ARM/ret_i128_arg2.ll b/test/CodeGen/ARM/ret_i128_arg2.ll
new file mode 100644
index 0000000..908c34f
--- /dev/null
+++ b/test/CodeGen/ARM/ret_i128_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define i128 @test_i128(i128 %a1, i128 %a2, i128 %a3) {
+ ret i128 %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_i64_arg2.ll b/test/CodeGen/ARM/ret_i64_arg2.ll
new file mode 100644
index 0000000..b1a1024
--- /dev/null
+++ b/test/CodeGen/ARM/ret_i64_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define i64 @test_i64(i64 %a1, i64 %a2) {
+ ret i64 %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_i64_arg3.ll b/test/CodeGen/ARM/ret_i64_arg3.ll
new file mode 100644
index 0000000..ffc1d2f
--- /dev/null
+++ b/test/CodeGen/ARM/ret_i64_arg3.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define i64 @test_i64_arg3(i64 %a1, i64 %a2, i64 %a3) {
+ ret i64 %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_i64_arg_split.ll b/test/CodeGen/ARM/ret_i64_arg_split.ll
new file mode 100644
index 0000000..956bce5
--- /dev/null
+++ b/test/CodeGen/ARM/ret_i64_arg_split.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2
+
+define i64 @test_i64_arg_split(i64 %a1, i32 %a2, i64 %a3) {
+ ret i64 %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_void.ll b/test/CodeGen/ARM/ret_void.ll
new file mode 100644
index 0000000..2b7ae05
--- /dev/null
+++ b/test/CodeGen/ARM/ret_void.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=arm
+
+define void @test() {
+ ret void
+}
+
diff --git a/test/CodeGen/ARM/rev.ll b/test/CodeGen/ARM/rev.ll
new file mode 100644
index 0000000..1c12268
--- /dev/null
+++ b/test/CodeGen/ARM/rev.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=arm -mattr=+v6 | grep rev16
+; RUN: llc < %s -march=arm -mattr=+v6 | grep revsh
+
+define i32 @test1(i32 %X) {
+ %tmp1 = lshr i32 %X, 8 ; <i32> [#uses=3]
+ %X15 = bitcast i32 %X to i32 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %X15, 8 ; <i32> [#uses=2]
+ %tmp2 = and i32 %tmp1, 16711680 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, -16777216 ; <i32> [#uses=1]
+ %tmp9 = and i32 %tmp1, 255 ; <i32> [#uses=1]
+ %tmp13 = and i32 %tmp4, 65280 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1]
+ %tmp10 = or i32 %tmp6, %tmp13 ; <i32> [#uses=1]
+ %tmp14 = or i32 %tmp10, %tmp9 ; <i32> [#uses=1]
+ ret i32 %tmp14
+}
+
+define i32 @test2(i32 %X) {
+ %tmp1 = lshr i32 %X, 8 ; <i32> [#uses=1]
+ %tmp1.upgrd.1 = trunc i32 %tmp1 to i16 ; <i16> [#uses=1]
+ %tmp3 = trunc i32 %X to i16 ; <i16> [#uses=1]
+ %tmp2 = and i16 %tmp1.upgrd.1, 255 ; <i16> [#uses=1]
+ %tmp4 = shl i16 %tmp3, 8 ; <i16> [#uses=1]
+ %tmp5 = or i16 %tmp2, %tmp4 ; <i16> [#uses=1]
+ %tmp5.upgrd.2 = sext i16 %tmp5 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp5.upgrd.2
+}
diff --git a/test/CodeGen/ARM/sbfx.ll b/test/CodeGen/ARM/sbfx.ll
new file mode 100644
index 0000000..6f1d87d
--- /dev/null
+++ b/test/CodeGen/ARM/sbfx.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
+
+define i32 @f1(i32 %a) {
+entry:
+; CHECK: f1:
+; CHECK: sbfx r0, r0, #0, #20
+ %tmp = shl i32 %a, 12
+ %tmp2 = ashr i32 %tmp, 12
+ ret i32 %tmp2
+}
+
+define i32 @f2(i32 %a) {
+entry:
+; CHECK: f2:
+; CHECK: ubfx r0, r0, #0, #20
+ %tmp = shl i32 %a, 12
+ %tmp2 = lshr i32 %tmp, 12
+ ret i32 %tmp2
+}
+
+define i32 @f3(i32 %a) {
+entry:
+; CHECK: f3:
+; CHECK: sbfx r0, r0, #5, #3
+ %tmp = shl i32 %a, 24
+ %tmp2 = ashr i32 %tmp, 29
+ ret i32 %tmp2
+}
+
+define i32 @f4(i32 %a) {
+entry:
+; CHECK: f4:
+; CHECK: ubfx r0, r0, #5, #3
+ %tmp = shl i32 %a, 24
+ %tmp2 = lshr i32 %tmp, 29
+ ret i32 %tmp2
+}
+
+define i32 @f5(i32 %a) {
+entry:
+; CHECK: f5:
+; CHECK-NOT: sbfx
+; CHECK: bx
+ %tmp = shl i32 %a, 3
+ %tmp2 = ashr i32 %tmp, 1
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/ARM/section.ll b/test/CodeGen/ARM/section.ll
new file mode 100644
index 0000000..7a566d4
--- /dev/null
+++ b/test/CodeGen/ARM/section.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -mtriple=arm-linux | \
+; RUN: grep {__DTOR_END__:}
+; RUN: llc < %s -mtriple=arm-linux | \
+; RUN: grep {\\.section.\\.dtors,"aw",.progbits}
+
+@__DTOR_END__ = internal global [1 x i32] zeroinitializer, section ".dtors" ; <[1 x i32]*> [#uses=0]
+
diff --git a/test/CodeGen/ARM/select-imm.ll b/test/CodeGen/ARM/select-imm.ll
new file mode 100644
index 0000000..07edc91
--- /dev/null
+++ b/test/CodeGen/ARM/select-imm.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM
+; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=T2
+
+define arm_apcscc i32 @t1(i32 %c) nounwind readnone {
+entry:
+; ARM: t1:
+; ARM: mov r1, #101
+; ARM: orr r1, r1, #1, 24
+; ARM: movgt r0, #123
+
+; T2: t1:
+; T2: movw r0, #357
+; T2: movgt r0, #123
+
+ %0 = icmp sgt i32 %c, 1
+ %1 = select i1 %0, i32 123, i32 357
+ ret i32 %1
+}
+
+define arm_apcscc i32 @t2(i32 %c) nounwind readnone {
+entry:
+; ARM: t2:
+; ARM: mov r1, #101
+; ARM: orr r1, r1, #1, 24
+; ARM: movle r0, #123
+
+; T2: t2:
+; T2: movw r0, #357
+; T2: movle r0, #123
+
+ %0 = icmp sgt i32 %c, 1
+ %1 = select i1 %0, i32 357, i32 123
+ ret i32 %1
+}
+
+define arm_apcscc i32 @t3(i32 %a) nounwind readnone {
+entry:
+; ARM: t3:
+; ARM: mov r0, #0
+; ARM: moveq r0, #1
+
+; T2: t3:
+; T2: mov r0, #0
+; T2: moveq r0, #1
+ %0 = icmp eq i32 %a, 160
+ %1 = zext i1 %0 to i32
+ ret i32 %1
+}
diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll
new file mode 100644
index 0000000..29c55c6
--- /dev/null
+++ b/test/CodeGen/ARM/select.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP
+
+define i32 @f1(i32 %a.s) {
+;CHECK: f1:
+;CHECK: moveq
+entry:
+ %tmp = icmp eq i32 %a.s, 4
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f2(i32 %a.s) {
+;CHECK: f2:
+;CHECK: movgt
+entry:
+ %tmp = icmp sgt i32 %a.s, 4
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f3(i32 %a.s, i32 %b.s) {
+;CHECK: f3:
+;CHECK: movlt
+entry:
+ %tmp = icmp slt i32 %a.s, %b.s
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f4(i32 %a.s, i32 %b.s) {
+;CHECK: f4:
+;CHECK: movle
+entry:
+ %tmp = icmp sle i32 %a.s, %b.s
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f5(i32 %a.u, i32 %b.u) {
+;CHECK: f5:
+;CHECK: movls
+entry:
+ %tmp = icmp ule i32 %a.u, %b.u
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f6(i32 %a.u, i32 %b.u) {
+;CHECK: f6:
+;CHECK: movhi
+entry:
+ %tmp = icmp ugt i32 %a.u, %b.u
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define double @f7(double %a, double %b) {
+;CHECK: f7:
+;CHECK: movlt
+;CHECK: movlt
+;CHECK-VFP: f7:
+;CHECK-VFP: vmovmi
+ %tmp = fcmp olt double %a, 1.234e+00
+ %tmp1 = select i1 %tmp, double -1.000e+00, double %b
+ ret double %tmp1
+}
diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll
new file mode 100644
index 0000000..7fd91ce
--- /dev/null
+++ b/test/CodeGen/ARM/select_xform.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=arm | grep mov | count 2
+
+define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
+ %tmp1 = icmp sgt i32 %c, 10
+ %tmp2 = select i1 %tmp1, i32 0, i32 2147483647
+ %tmp3 = add i32 %tmp2, %b
+ ret i32 %tmp3
+}
+
+define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+ %tmp1 = icmp sgt i32 %c, 10
+ %tmp2 = select i1 %tmp1, i32 0, i32 10
+ %tmp3 = sub i32 %b, %tmp2
+ ret i32 %tmp3
+}
diff --git a/test/CodeGen/ARM/shifter_operand.ll b/test/CodeGen/ARM/shifter_operand.ll
new file mode 100644
index 0000000..2bbe9fd
--- /dev/null
+++ b/test/CodeGen/ARM/shifter_operand.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=arm | grep add | grep lsl
+; RUN: llc < %s -march=arm | grep bic | grep asr
+
+
+define i32 @test1(i32 %X, i32 %Y, i8 %sh) {
+ %shift.upgrd.1 = zext i8 %sh to i32 ; <i32> [#uses=1]
+ %A = shl i32 %Y, %shift.upgrd.1 ; <i32> [#uses=1]
+ %B = add i32 %X, %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test2(i32 %X, i32 %Y, i8 %sh) {
+ %shift.upgrd.2 = zext i8 %sh to i32 ; <i32> [#uses=1]
+ %A = ashr i32 %Y, %shift.upgrd.2 ; <i32> [#uses=1]
+ %B = xor i32 %A, -1 ; <i32> [#uses=1]
+ %C = and i32 %X, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
diff --git a/test/CodeGen/ARM/smul.ll b/test/CodeGen/ARM/smul.ll
new file mode 100644
index 0000000..b7ab2e7
--- /dev/null
+++ b/test/CodeGen/ARM/smul.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm -mattr=+v5TE
+; RUN: llc < %s -march=arm -mattr=+v5TE | \
+; RUN: grep smulbt | count 1
+; RUN: llc < %s -march=arm -mattr=+v5TE | \
+; RUN: grep smultt | count 1
+; RUN: llc < %s -march=arm -mattr=+v5TE | \
+; RUN: grep smlabt | count 1
+
+@x = weak global i16 0 ; <i16*> [#uses=1]
+@y = weak global i16 0 ; <i16*> [#uses=0]
+
+define i32 @f1(i32 %y) {
+ %tmp = load i16* @x ; <i16> [#uses=1]
+ %tmp1 = add i16 %tmp, 2 ; <i16> [#uses=1]
+ %tmp2 = sext i16 %tmp1 to i32 ; <i32> [#uses=1]
+ %tmp3 = ashr i32 %y, 16 ; <i32> [#uses=1]
+ %tmp4 = mul i32 %tmp2, %tmp3 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define i32 @f2(i32 %x, i32 %y) {
+ %tmp1 = ashr i32 %x, 16 ; <i32> [#uses=1]
+ %tmp3 = ashr i32 %y, 16 ; <i32> [#uses=1]
+ %tmp4 = mul i32 %tmp3, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define i32 @f3(i32 %a, i16 %x, i32 %y) {
+ %tmp = sext i16 %x to i32 ; <i32> [#uses=1]
+ %tmp2 = ashr i32 %y, 16 ; <i32> [#uses=1]
+ %tmp3 = mul i32 %tmp2, %tmp ; <i32> [#uses=1]
+ %tmp5 = add i32 %tmp3, %a ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
diff --git a/test/CodeGen/ARM/spill-q.ll b/test/CodeGen/ARM/spill-q.ll
new file mode 100644
index 0000000..5ad7ecc
--- /dev/null
+++ b/test/CodeGen/ARM/spill-q.ll
@@ -0,0 +1,58 @@
+; RUN: llc < %s -mtriple=armv7-elf -mattr=+neon | FileCheck %s
+; PR4789
+
+%bar = type { float, float, float }
+%baz = type { i32, [16 x %bar], [16 x float], [16 x i32], i8 }
+%foo = type { <4 x float> }
+%quux = type { i32 (...)**, %baz*, i32 }
+%quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo }
+
+declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
+
+define arm_apcscc void @aaa(%quuz* %this, i8* %block) {
+; CHECK: aaa:
+; CHECK: bic sp, sp, #15
+; CHECK: vst1.64 {{.*}}sp, :128
+; CHECK: vld1.64 {{.*}}sp, :128
+entry:
+ %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
+ store float 6.300000e+01, float* undef, align 4
+ %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
+ store float 0.000000e+00, float* undef, align 4
+ %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
+ %val173 = load <4 x float>* undef ; <<4 x float>> [#uses=1]
+ br label %bb4
+
+bb4: ; preds = %bb193, %entry
+ %besterror.0.2264 = phi <4 x float> [ undef, %entry ], [ %besterror.0.0, %bb193 ] ; <<4 x float>> [#uses=2]
+ %part0.0.0261 = phi <4 x float> [ zeroinitializer, %entry ], [ %23, %bb193 ] ; <<4 x float>> [#uses=2]
+ %3 = fmul <4 x float> zeroinitializer, %0 ; <<4 x float>> [#uses=2]
+ %4 = fadd <4 x float> %3, %part0.0.0261 ; <<4 x float>> [#uses=1]
+ %5 = shufflevector <4 x float> %3, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
+ %6 = shufflevector <2 x float> %5, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1]
+ %7 = fmul <4 x float> %1, undef ; <<4 x float>> [#uses=1]
+ %8 = fadd <4 x float> %7, <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01> ; <<4 x float>> [#uses=1]
+ %9 = fptosi <4 x float> %8 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %10 = sitofp <4 x i32> %9 to <4 x float> ; <<4 x float>> [#uses=1]
+ %11 = fmul <4 x float> %10, %2 ; <<4 x float>> [#uses=1]
+ %12 = fmul <4 x float> undef, %6 ; <<4 x float>> [#uses=1]
+ %13 = fmul <4 x float> %11, %4 ; <<4 x float>> [#uses=1]
+ %14 = fsub <4 x float> %12, %13 ; <<4 x float>> [#uses=1]
+ %15 = fsub <4 x float> %14, undef ; <<4 x float>> [#uses=1]
+ %16 = fmul <4 x float> %15, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00> ; <<4 x float>> [#uses=1]
+ %17 = fadd <4 x float> %16, undef ; <<4 x float>> [#uses=1]
+ %18 = fmul <4 x float> %17, %val173 ; <<4 x float>> [#uses=1]
+ %19 = shufflevector <4 x float> %18, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
+ %20 = shufflevector <2 x float> %19, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %21 = fadd <4 x float> zeroinitializer, %20 ; <<4 x float>> [#uses=2]
+ %22 = fcmp ogt <4 x float> %besterror.0.2264, %21 ; <<4 x i1>> [#uses=0]
+ br i1 undef, label %bb193, label %bb186
+
+bb186: ; preds = %bb4
+ br label %bb193
+
+bb193: ; preds = %bb186, %bb4
+ %besterror.0.0 = phi <4 x float> [ %21, %bb186 ], [ %besterror.0.2264, %bb4 ] ; <<4 x float>> [#uses=1]
+ %23 = fadd <4 x float> %part0.0.0261, zeroinitializer ; <<4 x float>> [#uses=1]
+ br label %bb4
+}
diff --git a/test/CodeGen/ARM/stack-frame.ll b/test/CodeGen/ARM/stack-frame.ll
new file mode 100644
index 0000000..1dd57dd
--- /dev/null
+++ b/test/CodeGen/ARM/stack-frame.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm | grep add | count 1
+
+define void @f1() {
+ %c = alloca i8, align 1
+ ret void
+}
+
+define i32 @f2() {
+ ret i32 1
+}
+
+
diff --git a/test/CodeGen/ARM/stm.ll b/test/CodeGen/ARM/stm.ll
new file mode 100644
index 0000000..22a7ecb
--- /dev/null
+++ b/test/CodeGen/ARM/stm.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 | grep stm | count 2
+
+@"\01LC" = internal constant [32 x i8] c"Boolean Not: %d %d %d %d %d %d\0A\00", section "__TEXT,__cstring,cstring_literals" ; <[32 x i8]*> [#uses=1]
+@"\01LC1" = internal constant [26 x i8] c"Bitwise Not: %d %d %d %d\0A\00", section "__TEXT,__cstring,cstring_literals" ; <[26 x i8]*> [#uses=1]
+
+declare i32 @printf(i8* nocapture, ...) nounwind
+
+define i32 @main() nounwind {
+entry:
+ %0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([26 x i8]* @"\01LC1", i32 0, i32 0), i32 -2, i32 -3, i32 2, i32 -6) nounwind ; <i32> [#uses=0]
+ %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([32 x i8]* @"\01LC", i32 0, i32 0), i32 0, i32 1, i32 0, i32 1, i32 0, i32 1) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/ARM/str_post.ll b/test/CodeGen/ARM/str_post.ll
new file mode 100644
index 0000000..97916f1
--- /dev/null
+++ b/test/CodeGen/ARM/str_post.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+
+define i16 @test1(i32* %X, i16* %A) {
+; CHECK: test1:
+; CHECK: strh {{.*}}[{{.*}}], #-4
+ %Y = load i32* %X ; <i32> [#uses=1]
+ %tmp1 = trunc i32 %Y to i16 ; <i16> [#uses=1]
+ store i16 %tmp1, i16* %A
+ %tmp2 = ptrtoint i16* %A to i16 ; <i16> [#uses=1]
+ %tmp3 = sub i16 %tmp2, 4 ; <i16> [#uses=1]
+ ret i16 %tmp3
+}
+
+define i32 @test2(i32* %X, i32* %A) {
+; CHECK: test2:
+; CHECK: str {{.*}}[{{.*}}],
+ %Y = load i32* %X ; <i32> [#uses=1]
+ store i32 %Y, i32* %A
+ %tmp1 = ptrtoint i32* %A to i32 ; <i32> [#uses=1]
+ %tmp2 = sub i32 %tmp1, 4 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/ARM/str_pre-2.ll b/test/CodeGen/ARM/str_pre-2.ll
new file mode 100644
index 0000000..f8d3df2
--- /dev/null
+++ b/test/CodeGen/ARM/str_pre-2.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=arm-linux-gnu | grep {str.*\\!}
+; RUN: llc < %s -mtriple=arm-linux-gnu | grep {ldr.*\\\[.*\], #+4}
+
+@b = external global i64*
+
+define i64 @t(i64 %a) nounwind readonly {
+entry:
+ %0 = load i64** @b, align 4
+ %1 = load i64* %0, align 4
+ %2 = mul i64 %1, %a
+ ret i64 %2
+}
diff --git a/test/CodeGen/ARM/str_pre.ll b/test/CodeGen/ARM/str_pre.ll
new file mode 100644
index 0000000..e56e3f2
--- /dev/null
+++ b/test/CodeGen/ARM/str_pre.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=arm | \
+; RUN: grep {str.*\\!} | count 2
+
+define void @test1(i32* %X, i32* %A, i32** %dest) {
+ %B = load i32* %A ; <i32> [#uses=1]
+ %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2]
+ store i32 %B, i32* %Y
+ store i32* %Y, i32** %dest
+ ret void
+}
+
+define i16* @test2(i16* %X, i32* %A) {
+ %B = load i32* %A ; <i32> [#uses=1]
+ %Y = getelementptr i16* %X, i32 4 ; <i16*> [#uses=2]
+ %tmp = trunc i32 %B to i16 ; <i16> [#uses=1]
+ store i16 %tmp, i16* %Y
+ ret i16* %Y
+}
diff --git a/test/CodeGen/ARM/str_trunc.ll b/test/CodeGen/ARM/str_trunc.ll
new file mode 100644
index 0000000..2f1166b
--- /dev/null
+++ b/test/CodeGen/ARM/str_trunc.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=arm | \
+; RUN: grep strb | count 1
+; RUN: llc < %s -march=arm | \
+; RUN: grep strh | count 1
+
+define void @test1(i32 %v, i16* %ptr) {
+ %tmp = trunc i32 %v to i16 ; <i16> [#uses=1]
+ store i16 %tmp, i16* %ptr
+ ret void
+}
+
+define void @test2(i32 %v, i8* %ptr) {
+ %tmp = trunc i32 %v to i8 ; <i8> [#uses=1]
+ store i8 %tmp, i8* %ptr
+ ret void
+}
diff --git a/test/CodeGen/ARM/sxt_rot.ll b/test/CodeGen/ARM/sxt_rot.ll
new file mode 100644
index 0000000..4752f17
--- /dev/null
+++ b/test/CodeGen/ARM/sxt_rot.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=arm -mattr=+v6 | \
+; RUN: grep sxtb | count 2
+; RUN: llc < %s -march=arm -mattr=+v6 | \
+; RUN: grep sxtb | grep ror | count 1
+; RUN: llc < %s -march=arm -mattr=+v6 | \
+; RUN: grep sxtab | count 1
+
+define i32 @test0(i8 %A) {
+ %B = sext i8 %A to i32
+ ret i32 %B
+}
+
+define i8 @test1(i32 %A) signext {
+ %B = lshr i32 %A, 8
+ %C = shl i32 %A, 24
+ %D = or i32 %B, %C
+ %E = trunc i32 %D to i8
+ ret i8 %E
+}
+
+define i32 @test2(i32 %A, i32 %X) signext {
+ %B = lshr i32 %A, 8
+ %C = shl i32 %A, 24
+ %D = or i32 %B, %C
+ %E = trunc i32 %D to i8
+ %F = sext i8 %E to i32
+ %G = add i32 %F, %X
+ ret i32 %G
+}
diff --git a/test/CodeGen/ARM/t2-imm.ll b/test/CodeGen/ARM/t2-imm.ll
new file mode 100644
index 0000000..848a4df
--- /dev/null
+++ b/test/CodeGen/ARM/t2-imm.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s
+
+define i32 @f6(i32 %a) {
+; CHECK:f6
+; CHECK: movw r0, #:lower16:65537123
+; CHECK: movt r0, #:upper16:65537123
+ %tmp = add i32 0, 65537123
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/ARM/tail-opts.ll b/test/CodeGen/ARM/tail-opts.ll
new file mode 100644
index 0000000..17c8bae
--- /dev/null
+++ b/test/CodeGen/ARM/tail-opts.ll
@@ -0,0 +1,64 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 -asm-verbose=false | FileCheck %s
+
+declare void @bar(i32)
+declare void @car(i32)
+declare void @dar(i32)
+declare void @ear(i32)
+declare void @far(i32)
+declare i1 @qux()
+
+@GHJK = global i32 0
+
+declare i8* @choose(i8*, i8*)
+
+; BranchFolding should tail-duplicate the indirect jump to avoid
+; redundant branching.
+
+; CHECK: tail_duplicate_me:
+; CHECK: qux
+; CHECK: qux
+; CHECK: ldr r{{.}}, LCPI
+; CHECK: str r
+; CHECK-NEXT: bx r
+; CHECK: ldr r{{.}}, LCPI
+; CHECK: str r
+; CHECK-NEXT: bx r
+; CHECK: ldr r{{.}}, LCPI
+; CHECK: str r
+; CHECK-NEXT: bx r
+
+define void @tail_duplicate_me() nounwind {
+entry:
+ %a = call i1 @qux()
+ %c = call i8* @choose(i8* blockaddress(@tail_duplicate_me, %return),
+ i8* blockaddress(@tail_duplicate_me, %altret))
+ br i1 %a, label %A, label %next
+next:
+ %b = call i1 @qux()
+ br i1 %b, label %B, label %C
+
+A:
+ call void @bar(i32 0)
+ store i32 0, i32* @GHJK
+ br label %M
+
+B:
+ call void @car(i32 1)
+ store i32 0, i32* @GHJK
+ br label %M
+
+C:
+ call void @dar(i32 2)
+ store i32 0, i32* @GHJK
+ br label %M
+
+M:
+ indirectbr i8* %c, [label %return, label %altret]
+
+return:
+ call void @ear(i32 1000)
+ ret void
+altret:
+ call void @far(i32 1001)
+ ret void
+}
diff --git a/test/CodeGen/ARM/thread_pointer.ll b/test/CodeGen/ARM/thread_pointer.ll
new file mode 100644
index 0000000..3143387
--- /dev/null
+++ b/test/CodeGen/ARM/thread_pointer.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {__aeabi_read_tp}
+
+define i8* @test() {
+entry:
+ %tmp1 = call i8* @llvm.arm.thread.pointer( ) ; <i8*> [#uses=0]
+ ret i8* %tmp1
+}
+
+declare i8* @llvm.arm.thread.pointer()
diff --git a/test/CodeGen/ARM/tls1.ll b/test/CodeGen/ARM/tls1.ll
new file mode 100644
index 0000000..1087094
--- /dev/null
+++ b/test/CodeGen/ARM/tls1.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {i(tpoff)}
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {__aeabi_read_tp}
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \
+; RUN: -relocation-model=pic | grep {__tls_get_addr}
+
+
+@i = thread_local global i32 15 ; <i32*> [#uses=2]
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32* @g() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/ARM/tls2.ll b/test/CodeGen/ARM/tls2.ll
new file mode 100644
index 0000000..d932f90
--- /dev/null
+++ b/test/CodeGen/ARM/tls2.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \
+; RUN: | FileCheck %s -check-prefix=CHECK-NONPIC
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \
+; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC
+
+@i = external thread_local global i32 ; <i32*> [#uses=2]
+
+define i32 @f() {
+; CHECK-NONPIC: f:
+; CHECK-NONPIC: ldr {{r.}}, [pc, +{{r.}}]
+; CHECK-NONPIC: i(gottpoff)
+; CHECK-PIC: f:
+; CHECK-PIC: __tls_get_addr
+entry:
+ %tmp1 = load i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32* @g() {
+; CHECK-NONPIC: g:
+; CHECK-NONPIC: ldr {{r.}}, [pc, +{{r.}}]
+; CHECK-NONPIC: i(gottpoff)
+; CHECK-PIC: g:
+; CHECK-PIC: __tls_get_addr
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/ARM/tls3.ll b/test/CodeGen/ARM/tls3.ll
new file mode 100644
index 0000000..df7a4ca
--- /dev/null
+++ b/test/CodeGen/ARM/tls3.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN: grep {tbss}
+
+%struct.anon = type { i32, i32 }
+@teste = internal thread_local global %struct.anon zeroinitializer ; <%struct.anon*> [#uses=1]
+
+define i32 @main() {
+entry:
+ %tmp2 = load i32* getelementptr (%struct.anon* @teste, i32 0, i32 0), align 8 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/ARM/trunc_ldr.ll b/test/CodeGen/ARM/trunc_ldr.ll
new file mode 100644
index 0000000..3033c2b
--- /dev/null
+++ b/test/CodeGen/ARM/trunc_ldr.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=arm | grep ldrb.*7 | count 1
+; RUN: llc < %s -march=arm | grep ldrsb.*7 | count 1
+
+ %struct.A = type { i8, i8, i8, i8, i16, i8, i8, %struct.B** }
+ %struct.B = type { float, float, i32, i32, i32, [0 x i8] }
+
+define i8 @f1(%struct.A* %d) {
+ %tmp2 = getelementptr %struct.A* %d, i32 0, i32 4
+ %tmp23 = bitcast i16* %tmp2 to i32*
+ %tmp4 = load i32* %tmp23
+ %tmp512 = lshr i32 %tmp4, 24
+ %tmp56 = trunc i32 %tmp512 to i8
+ ret i8 %tmp56
+}
+
+define i32 @f2(%struct.A* %d) {
+ %tmp2 = getelementptr %struct.A* %d, i32 0, i32 4
+ %tmp23 = bitcast i16* %tmp2 to i32*
+ %tmp4 = load i32* %tmp23
+ %tmp512 = lshr i32 %tmp4, 24
+ %tmp56 = trunc i32 %tmp512 to i8
+ %tmp57 = sext i8 %tmp56 to i32
+ ret i32 %tmp57
+}
diff --git a/test/CodeGen/ARM/truncstore-dag-combine.ll b/test/CodeGen/ARM/truncstore-dag-combine.ll
new file mode 100644
index 0000000..2da08b6
--- /dev/null
+++ b/test/CodeGen/ARM/truncstore-dag-combine.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=arm | not grep orr
+; RUN: llc < %s -march=arm | not grep mov
+
+define void @bar(i8* %P, i16* %Q) {
+entry:
+ %P1 = bitcast i8* %P to i16* ; <i16*> [#uses=1]
+ %tmp = load i16* %Q, align 1 ; <i16> [#uses=1]
+ store i16 %tmp, i16* %P1, align 1
+ ret void
+}
+
+define void @foo(i8* %P, i32* %Q) {
+entry:
+ %P1 = bitcast i8* %P to i32* ; <i32*> [#uses=1]
+ %tmp = load i32* %Q, align 1 ; <i32> [#uses=1]
+ store i32 %tmp, i32* %P1, align 1
+ ret void
+}
diff --git a/test/CodeGen/ARM/tst_teq.ll b/test/CodeGen/ARM/tst_teq.ll
new file mode 100644
index 0000000..c83111e
--- /dev/null
+++ b/test/CodeGen/ARM/tst_teq.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=arm | grep tst
+; RUN: llc < %s -march=arm | grep teq
+
+define i32 @f(i32 %a) {
+entry:
+ %tmp2 = and i32 %a, 255 ; <i32> [#uses=1]
+ icmp eq i32 %tmp2, 0 ; <i1>:0 [#uses=1]
+ %retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
+define i32 @g(i32 %a) {
+entry:
+ %tmp2 = xor i32 %a, 255
+ icmp eq i32 %tmp2, 0 ; <i1>:0 [#uses=1]
+ %retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1]
+ ret i32 %retval
+}
diff --git a/test/CodeGen/ARM/uint64tof64.ll b/test/CodeGen/ARM/uint64tof64.ll
new file mode 100644
index 0000000..32eb225
--- /dev/null
+++ b/test/CodeGen/ARM/uint64tof64.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+vfp2
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+@"\01LC10" = external constant [54 x i8] ; <[54 x i8]*> [#uses=1]
+
+define fastcc void @t() {
+entry:
+ %0 = load i64* null, align 4 ; <i64> [#uses=1]
+ %1 = uitofp i64 %0 to double ; <double> [#uses=1]
+ %2 = fdiv double 0.000000e+00, %1 ; <double> [#uses=1]
+ %3 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* null, i8* getelementptr ([54 x i8]* @"\01LC10", i32 0, i32 0), i64 0, double %2) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @fprintf(%struct.FILE*, i8*, ...)
diff --git a/test/CodeGen/ARM/unaligned_load_store.ll b/test/CodeGen/ARM/unaligned_load_store.ll
new file mode 100644
index 0000000..a4494f3
--- /dev/null
+++ b/test/CodeGen/ARM/unaligned_load_store.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=GENERIC
+; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6
+; RUN: llc < %s -mtriple=armv6-linux | FileCheck %s -check-prefix=GENERIC
+
+; rdar://7113725
+
+define arm_apcscc void @t(i8* nocapture %a, i8* nocapture %b) nounwind {
+entry:
+; GENERIC: t:
+; GENERIC: ldrb r2
+; GENERIC: ldrb r3
+; GENERIC: ldrb r12
+; GENERIC: ldrb r1
+; GENERIC: strb r1
+; GENERIC: strb r12
+; GENERIC: strb r3
+; GENERIC: strb r2
+
+; DARWIN_V6: t:
+; DARWIN_V6: ldr r1
+; DARWIN_V6: str r1
+
+ %__src1.i = bitcast i8* %b to i32* ; <i32*> [#uses=1]
+ %__dest2.i = bitcast i8* %a to i32* ; <i32*> [#uses=1]
+ %tmp.i = load i32* %__src1.i, align 1 ; <i32> [#uses=1]
+ store i32 %tmp.i, i32* %__dest2.i, align 1
+ ret void
+}
diff --git a/test/CodeGen/ARM/unord.ll b/test/CodeGen/ARM/unord.ll
new file mode 100644
index 0000000..bd28034
--- /dev/null
+++ b/test/CodeGen/ARM/unord.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=arm | grep movne | count 1
+; RUN: llc < %s -march=arm | grep moveq | count 1
+
+define i32 @f1(float %X, float %Y) {
+ %tmp = fcmp uno float %X, %Y
+ %retval = select i1 %tmp, i32 1, i32 -1
+ ret i32 %retval
+}
+
+define i32 @f2(float %X, float %Y) {
+ %tmp = fcmp ord float %X, %Y
+ %retval = select i1 %tmp, i32 1, i32 -1
+ ret i32 %retval
+}
diff --git a/test/CodeGen/ARM/uxt_rot.ll b/test/CodeGen/ARM/uxt_rot.ll
new file mode 100644
index 0000000..6307795
--- /dev/null
+++ b/test/CodeGen/ARM/uxt_rot.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=arm -mattr=+v6 | grep uxtb | count 1
+; RUN: llc < %s -march=arm -mattr=+v6 | grep uxtab | count 1
+; RUN: llc < %s -march=arm -mattr=+v6 | grep uxth | count 1
+
+define i8 @test1(i32 %A.u) zeroext {
+ %B.u = trunc i32 %A.u to i8
+ ret i8 %B.u
+}
+
+define i32 @test2(i32 %A.u, i32 %B.u) zeroext {
+ %C.u = trunc i32 %B.u to i8
+ %D.u = zext i8 %C.u to i32
+ %E.u = add i32 %A.u, %D.u
+ ret i32 %E.u
+}
+
+define i32 @test3(i32 %A.u) zeroext {
+ %B.u = lshr i32 %A.u, 8
+ %C.u = shl i32 %A.u, 24
+ %D.u = or i32 %B.u, %C.u
+ %E.u = trunc i32 %D.u to i16
+ %F.u = zext i16 %E.u to i32
+ ret i32 %F.u
+}
diff --git a/test/CodeGen/ARM/uxtb.ll b/test/CodeGen/ARM/uxtb.ll
new file mode 100644
index 0000000..9d6e4bd
--- /dev/null
+++ b/test/CodeGen/ARM/uxtb.ll
@@ -0,0 +1,74 @@
+; RUN: llc < %s -mtriple=armv6-apple-darwin | \
+; RUN: grep uxt | count 10
+
+define i32 @test1(i32 %x) {
+ %tmp1 = and i32 %x, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @test2(i32 %x) {
+ %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test3(i32 %x) {
+ %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test4(i32 %x) {
+ %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
+ %tmp6 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test5(i32 %x) {
+ %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test6(i32 %x) {
+ %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test7(i32 %x) {
+ %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test8(i32 %x) {
+ %tmp1 = shl i32 %x, 8 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16711680 ; <i32> [#uses=1]
+ %tmp5 = lshr i32 %x, 24 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test9(i32 %x) {
+ %tmp1 = lshr i32 %x, 24 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x, 8 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test10(i32 %p0) {
+ %tmp1 = lshr i32 %p0, 7 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16253176 ; <i32> [#uses=2]
+ %tmp4 = lshr i32 %tmp2, 5 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 458759 ; <i32> [#uses=1]
+ %tmp7 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/vaba.ll b/test/CodeGen/ARM/vaba.ll
new file mode 100644
index 0000000..e2dca46
--- /dev/null
+++ b/test/CodeGen/ARM/vaba.ll
@@ -0,0 +1,205 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vabas8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vabas8:
+;CHECK: vaba.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i8> @llvm.arm.neon.vabas.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vabas16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vabas16:
+;CHECK: vaba.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i16> @llvm.arm.neon.vabas.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vabas32(<2 x i32>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vabas32:
+;CHECK: vaba.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i32> @llvm.arm.neon.vabas.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i32> %tmp4
+}
+
+define <8 x i8> @vabau8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vabau8:
+;CHECK: vaba.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i8> @llvm.arm.neon.vabau.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vabau16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vabau16:
+;CHECK: vaba.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i16> @llvm.arm.neon.vabau.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vabau32(<2 x i32>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vabau32:
+;CHECK: vaba.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i32> @llvm.arm.neon.vabau.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i32> %tmp4
+}
+
+define <16 x i8> @vabaQs8(<16 x i8>* %A, <16 x i8>* %B, <16 x i8>* %C) nounwind {
+;CHECK: vabaQs8:
+;CHECK: vaba.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = load <16 x i8>* %C
+ %tmp4 = call <16 x i8> @llvm.arm.neon.vabas.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i8> %tmp3)
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vabaQs16(<8 x i16>* %A, <8 x i16>* %B, <8 x i16>* %C) nounwind {
+;CHECK: vabaQs16:
+;CHECK: vaba.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = load <8 x i16>* %C
+ %tmp4 = call <8 x i16> @llvm.arm.neon.vabas.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i16> %tmp3)
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vabaQs32(<4 x i32>* %A, <4 x i32>* %B, <4 x i32>* %C) nounwind {
+;CHECK: vabaQs32:
+;CHECK: vaba.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = load <4 x i32>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vabas.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <16 x i8> @vabaQu8(<16 x i8>* %A, <16 x i8>* %B, <16 x i8>* %C) nounwind {
+;CHECK: vabaQu8:
+;CHECK: vaba.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = load <16 x i8>* %C
+ %tmp4 = call <16 x i8> @llvm.arm.neon.vabau.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i8> %tmp3)
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vabaQu16(<8 x i16>* %A, <8 x i16>* %B, <8 x i16>* %C) nounwind {
+;CHECK: vabaQu16:
+;CHECK: vaba.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = load <8 x i16>* %C
+ %tmp4 = call <8 x i16> @llvm.arm.neon.vabau.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i16> %tmp3)
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vabaQu32(<4 x i32>* %A, <4 x i32>* %B, <4 x i32>* %C) nounwind {
+;CHECK: vabaQu32:
+;CHECK: vaba.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = load <4 x i32>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vabau.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+declare <8 x i8> @llvm.arm.neon.vabas.v8i8(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vabas.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vabas.v2i32(<2 x i32>, <2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vabau.v8i8(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vabau.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vabau.v2i32(<2 x i32>, <2 x i32>, <2 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vabas.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vabas.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabas.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vabau.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vabau.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabau.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) nounwind readnone
+
+define <8 x i16> @vabals8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vabals8:
+;CHECK: vabal.s8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i16> @llvm.arm.neon.vabals.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vabals16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vabals16:
+;CHECK: vabal.s16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vabals.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vabals32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vabals32:
+;CHECK: vabal.s32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i64> @llvm.arm.neon.vabals.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i64> %tmp4
+}
+
+define <8 x i16> @vabalu8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vabalu8:
+;CHECK: vabal.u8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i16> @llvm.arm.neon.vabalu.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vabalu16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vabalu16:
+;CHECK: vabal.u16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vabalu.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vabalu32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vabalu32:
+;CHECK: vabal.u32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i64> @llvm.arm.neon.vabalu.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i64> %tmp4
+}
+
+declare <8 x i16> @llvm.arm.neon.vabals.v8i16(<8 x i16>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabals.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vabals.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vabalu.v8i16(<8 x i16>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabalu.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vabalu.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vabd.ll b/test/CodeGen/ARM/vabd.ll
new file mode 100644
index 0000000..2b45393
--- /dev/null
+++ b/test/CodeGen/ARM/vabd.ll
@@ -0,0 +1,209 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vabds8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vabds8:
+;CHECK: vabd.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vabds16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vabds16:
+;CHECK: vabd.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vabds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vabds32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vabds32:
+;CHECK: vabd.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vabds.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i8> @vabdu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vabdu8:
+;CHECK: vabd.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vabdu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vabdu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vabdu16:
+;CHECK: vabd.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vabdu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vabdu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vabdu32:
+;CHECK: vabd.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vabdu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <2 x float> @vabdf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vabdf32:
+;CHECK: vabd.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x float> @llvm.arm.neon.vabds.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x float> %tmp3
+}
+
+define <16 x i8> @vabdQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vabdQs8:
+;CHECK: vabd.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vabds.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vabdQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vabdQs16:
+;CHECK: vabd.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vabds.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vabdQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vabdQs32:
+;CHECK: vabd.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vabds.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <16 x i8> @vabdQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vabdQu8:
+;CHECK: vabd.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vabdu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vabdQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vabdQu16:
+;CHECK: vabd.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vabdu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vabdQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vabdQu32:
+;CHECK: vabd.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vabdu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <4 x float> @vabdQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vabdQf32:
+;CHECK: vabd.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = call <4 x float> @llvm.arm.neon.vabds.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+ ret <4 x float> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vabds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vabds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vabdu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vabdu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vabdu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <2 x float> @llvm.arm.neon.vabds.v2f32(<2 x float>, <2 x float>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vabds.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vabds.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabds.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vabdu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vabdu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabdu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <4 x float> @llvm.arm.neon.vabds.v4f32(<4 x float>, <4 x float>) nounwind readnone
+
+define <8 x i16> @vabdls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vabdls8:
+;CHECK: vabdl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vabdls.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vabdls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vabdls16:
+;CHECK: vabdl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vabdls.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vabdls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vabdls32:
+;CHECK: vabdl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vabdls.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i16> @vabdlu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vabdlu8:
+;CHECK: vabdl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vabdlu.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vabdlu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vabdlu16:
+;CHECK: vabdl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vabdlu.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vabdlu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vabdlu32:
+;CHECK: vabdl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vabdlu.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i16> @llvm.arm.neon.vabdls.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabdls.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vabdls.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vabdlu.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabdlu.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vabdlu.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vabs.ll b/test/CodeGen/ARM/vabs.ll
new file mode 100644
index 0000000..18ba61f
--- /dev/null
+++ b/test/CodeGen/ARM/vabs.ll
@@ -0,0 +1,131 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vabss8(<8 x i8>* %A) nounwind {
+;CHECK: vabss8:
+;CHECK: vabs.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vabs.v8i8(<8 x i8> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vabss16(<4 x i16>* %A) nounwind {
+;CHECK: vabss16:
+;CHECK: vabs.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vabs.v4i16(<4 x i16> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vabss32(<2 x i32>* %A) nounwind {
+;CHECK: vabss32:
+;CHECK: vabs.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vabs.v2i32(<2 x i32> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <2 x float> @vabsf32(<2 x float>* %A) nounwind {
+;CHECK: vabsf32:
+;CHECK: vabs.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = call <2 x float> @llvm.arm.neon.vabs.v2f32(<2 x float> %tmp1)
+ ret <2 x float> %tmp2
+}
+
+define <16 x i8> @vabsQs8(<16 x i8>* %A) nounwind {
+;CHECK: vabsQs8:
+;CHECK: vabs.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vabs.v16i8(<16 x i8> %tmp1)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vabsQs16(<8 x i16>* %A) nounwind {
+;CHECK: vabsQs16:
+;CHECK: vabs.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vabsQs32(<4 x i32>* %A) nounwind {
+;CHECK: vabsQs32:
+;CHECK: vabs.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vabs.v4i32(<4 x i32> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+define <4 x float> @vabsQf32(<4 x float>* %A) nounwind {
+;CHECK: vabsQf32:
+;CHECK: vabs.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = call <4 x float> @llvm.arm.neon.vabs.v4f32(<4 x float> %tmp1)
+ ret <4 x float> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vabs.v8i8(<8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vabs.v4i16(<4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vabs.v2i32(<2 x i32>) nounwind readnone
+declare <2 x float> @llvm.arm.neon.vabs.v2f32(<2 x float>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vabs.v16i8(<16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vabs.v4i32(<4 x i32>) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vabs.v4f32(<4 x float>) nounwind readnone
+
+define <8 x i8> @vqabss8(<8 x i8>* %A) nounwind {
+;CHECK: vqabss8:
+;CHECK: vqabs.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqabs.v8i8(<8 x i8> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqabss16(<4 x i16>* %A) nounwind {
+;CHECK: vqabss16:
+;CHECK: vqabs.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqabs.v4i16(<4 x i16> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqabss32(<2 x i32>* %A) nounwind {
+;CHECK: vqabss32:
+;CHECK: vqabs.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqabs.v2i32(<2 x i32> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <16 x i8> @vqabsQs8(<16 x i8>* %A) nounwind {
+;CHECK: vqabsQs8:
+;CHECK: vqabs.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vqabs.v16i8(<16 x i8> %tmp1)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vqabsQs16(<8 x i16>* %A) nounwind {
+;CHECK: vqabsQs16:
+;CHECK: vqabs.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vqabs.v8i16(<8 x i16> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vqabsQs32(<4 x i32>* %A) nounwind {
+;CHECK: vqabsQs32:
+;CHECK: vqabs.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vqabs.v4i32(<4 x i32> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vqabs.v8i8(<8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqabs.v4i16(<4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqabs.v2i32(<2 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqabs.v16i8(<16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqabs.v8i16(<8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqabs.v4i32(<4 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vadd.ll b/test/CodeGen/ARM/vadd.ll
new file mode 100644
index 0000000..9fa5307
--- /dev/null
+++ b/test/CodeGen/ARM/vadd.ll
@@ -0,0 +1,277 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vaddi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vaddi8:
+;CHECK: vadd.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = add <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vaddi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vaddi16:
+;CHECK: vadd.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = add <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vaddi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vaddi32:
+;CHECK: vadd.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = add <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vaddi64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vaddi64:
+;CHECK: vadd.i64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = add <1 x i64> %tmp1, %tmp2
+ ret <1 x i64> %tmp3
+}
+
+define <2 x float> @vaddf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vaddf32:
+;CHECK: vadd.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = add <2 x float> %tmp1, %tmp2
+ ret <2 x float> %tmp3
+}
+
+define <16 x i8> @vaddQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vaddQi8:
+;CHECK: vadd.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = add <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vaddQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vaddQi16:
+;CHECK: vadd.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = add <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vaddQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vaddQi32:
+;CHECK: vadd.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = add <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vaddQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vaddQi64:
+;CHECK: vadd.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = add <2 x i64> %tmp1, %tmp2
+ ret <2 x i64> %tmp3
+}
+
+define <4 x float> @vaddQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vaddQf32:
+;CHECK: vadd.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = add <4 x float> %tmp1, %tmp2
+ ret <4 x float> %tmp3
+}
+
+define <8 x i8> @vaddhni16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vaddhni16:
+;CHECK: vaddhn.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vaddhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vaddhni32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vaddhni32:
+;CHECK: vaddhn.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vaddhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vaddhni64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vaddhni64:
+;CHECK: vaddhn.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vaddhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vaddhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vaddhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vaddhn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <8 x i8> @vraddhni16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vraddhni16:
+;CHECK: vraddhn.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vraddhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vraddhni32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vraddhni32:
+;CHECK: vraddhn.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vraddhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vraddhni64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vraddhni64:
+;CHECK: vraddhn.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vraddhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vraddhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vraddhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vraddhn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <8 x i16> @vaddls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vaddls8:
+;CHECK: vaddl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vaddls.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vaddls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vaddls16:
+;CHECK: vaddl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vaddls.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vaddls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vaddls32:
+;CHECK: vaddl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vaddls.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i16> @vaddlu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vaddlu8:
+;CHECK: vaddl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vaddlu.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vaddlu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vaddlu16:
+;CHECK: vaddl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vaddlu.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vaddlu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vaddlu32:
+;CHECK: vaddl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vaddlu.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i16> @llvm.arm.neon.vaddls.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vaddls.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vaddls.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vaddlu.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vaddlu.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vaddlu.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+define <8 x i16> @vaddws8(<8 x i16>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vaddws8:
+;CHECK: vaddw.s8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vaddws.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vaddws16(<4 x i32>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vaddws16:
+;CHECK: vaddw.s16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vaddws.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vaddws32(<2 x i64>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vaddws32:
+;CHECK: vaddw.s32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vaddws.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i16> @vaddwu8(<8 x i16>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vaddwu8:
+;CHECK: vaddw.u8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vaddwu.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vaddwu16(<4 x i32>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vaddwu16:
+;CHECK: vaddw.u16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vaddwu.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vaddwu32(<2 x i64>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vaddwu32:
+;CHECK: vaddw.u32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vaddwu.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i16> @llvm.arm.neon.vaddws.v8i16(<8 x i16>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vaddws.v4i32(<4 x i32>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vaddws.v2i64(<2 x i64>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vaddwu.v8i16(<8 x i16>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vaddwu.v4i32(<4 x i32>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vaddwu.v2i64(<2 x i64>, <2 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vargs.ll b/test/CodeGen/ARM/vargs.ll
new file mode 100644
index 0000000..5f3536c
--- /dev/null
+++ b/test/CodeGen/ARM/vargs.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=arm
+@str = internal constant [43 x i8] c"Hello World %d %d %d %d %d %d %d %d %d %d\0A\00" ; <[43 x i8]*> [#uses=1]
+
+define i32 @main() {
+entry:
+ %tmp = call i32 (i8*, ...)* @printf( i8* getelementptr ([43 x i8]* @str, i32 0, i64 0), i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ) ; <i32> [#uses=0]
+ %tmp2 = call i32 (i8*, ...)* @printf( i8* getelementptr ([43 x i8]* @str, i32 0, i64 0), i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1 ) ; <i32> [#uses=0]
+ ret i32 11
+}
+
+declare i32 @printf(i8*, ...)
+
diff --git a/test/CodeGen/ARM/vargs_align.ll b/test/CodeGen/ARM/vargs_align.ll
new file mode 100644
index 0000000..e4ef9e3
--- /dev/null
+++ b/test/CodeGen/ARM/vargs_align.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=EABI
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=OABI
+
+define i32 @f(i32 %a, ...) {
+entry:
+ %a_addr = alloca i32 ; <i32*> [#uses=1]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %a, i32* %a_addr
+ store i32 0, i32* %tmp
+ %tmp1 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp1, i32* %retval
+ br label %return
+
+return: ; preds = %entry
+ %retval2 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval2
+; EABI: add sp, sp, #12
+; EABI: add sp, sp, #16
+; OABI: add sp, sp, #12
+; OABI: add sp, sp, #12
+}
diff --git a/test/CodeGen/ARM/vbits.ll b/test/CodeGen/ARM/vbits.ll
new file mode 100644
index 0000000..293d229
--- /dev/null
+++ b/test/CodeGen/ARM/vbits.ll
@@ -0,0 +1,507 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @v_andi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: v_andi8:
+;CHECK: vand
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = and <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @v_andi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: v_andi16:
+;CHECK: vand
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = and <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @v_andi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: v_andi32:
+;CHECK: vand
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = and <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @v_andi64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: v_andi64:
+;CHECK: vand
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = and <1 x i64> %tmp1, %tmp2
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @v_andQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: v_andQi8:
+;CHECK: vand
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = and <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @v_andQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: v_andQi16:
+;CHECK: vand
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = and <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @v_andQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: v_andQi32:
+;CHECK: vand
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = and <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @v_andQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: v_andQi64:
+;CHECK: vand
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = and <2 x i64> %tmp1, %tmp2
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i8> @v_bici8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: v_bici8:
+;CHECK: vbic
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = xor <8 x i8> %tmp2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 >
+ %tmp4 = and <8 x i8> %tmp1, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @v_bici16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: v_bici16:
+;CHECK: vbic
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = xor <4 x i16> %tmp2, < i16 -1, i16 -1, i16 -1, i16 -1 >
+ %tmp4 = and <4 x i16> %tmp1, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @v_bici32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: v_bici32:
+;CHECK: vbic
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = xor <2 x i32> %tmp2, < i32 -1, i32 -1 >
+ %tmp4 = and <2 x i32> %tmp1, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <1 x i64> @v_bici64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: v_bici64:
+;CHECK: vbic
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = xor <1 x i64> %tmp2, < i64 -1 >
+ %tmp4 = and <1 x i64> %tmp1, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <16 x i8> @v_bicQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: v_bicQi8:
+;CHECK: vbic
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = xor <16 x i8> %tmp2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 >
+ %tmp4 = and <16 x i8> %tmp1, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @v_bicQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: v_bicQi16:
+;CHECK: vbic
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = xor <8 x i16> %tmp2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1 >
+ %tmp4 = and <8 x i16> %tmp1, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @v_bicQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: v_bicQi32:
+;CHECK: vbic
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = xor <4 x i32> %tmp2, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %tmp4 = and <4 x i32> %tmp1, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @v_bicQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: v_bicQi64:
+;CHECK: vbic
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = xor <2 x i64> %tmp2, < i64 -1, i64 -1 >
+ %tmp4 = and <2 x i64> %tmp1, %tmp3
+ ret <2 x i64> %tmp4
+}
+
+define <8 x i8> @v_eori8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: v_eori8:
+;CHECK: veor
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = xor <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @v_eori16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: v_eori16:
+;CHECK: veor
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = xor <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @v_eori32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: v_eori32:
+;CHECK: veor
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = xor <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @v_eori64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: v_eori64:
+;CHECK: veor
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = xor <1 x i64> %tmp1, %tmp2
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @v_eorQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: v_eorQi8:
+;CHECK: veor
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = xor <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @v_eorQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: v_eorQi16:
+;CHECK: veor
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = xor <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @v_eorQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: v_eorQi32:
+;CHECK: veor
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = xor <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @v_eorQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: v_eorQi64:
+;CHECK: veor
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = xor <2 x i64> %tmp1, %tmp2
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i8> @v_mvni8(<8 x i8>* %A) nounwind {
+;CHECK: v_mvni8:
+;CHECK: vmvn
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = xor <8 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 >
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @v_mvni16(<4 x i16>* %A) nounwind {
+;CHECK: v_mvni16:
+;CHECK: vmvn
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = xor <4 x i16> %tmp1, < i16 -1, i16 -1, i16 -1, i16 -1 >
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @v_mvni32(<2 x i32>* %A) nounwind {
+;CHECK: v_mvni32:
+;CHECK: vmvn
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = xor <2 x i32> %tmp1, < i32 -1, i32 -1 >
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @v_mvni64(<1 x i64>* %A) nounwind {
+;CHECK: v_mvni64:
+;CHECK: vmvn
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = xor <1 x i64> %tmp1, < i64 -1 >
+ ret <1 x i64> %tmp2
+}
+
+define <16 x i8> @v_mvnQi8(<16 x i8>* %A) nounwind {
+;CHECK: v_mvnQi8:
+;CHECK: vmvn
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = xor <16 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 >
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @v_mvnQi16(<8 x i16>* %A) nounwind {
+;CHECK: v_mvnQi16:
+;CHECK: vmvn
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = xor <8 x i16> %tmp1, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1 >
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @v_mvnQi32(<4 x i32>* %A) nounwind {
+;CHECK: v_mvnQi32:
+;CHECK: vmvn
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = xor <4 x i32> %tmp1, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @v_mvnQi64(<2 x i64>* %A) nounwind {
+;CHECK: v_mvnQi64:
+;CHECK: vmvn
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = xor <2 x i64> %tmp1, < i64 -1, i64 -1 >
+ ret <2 x i64> %tmp2
+}
+
+define <8 x i8> @v_orri8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: v_orri8:
+;CHECK: vorr
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = or <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @v_orri16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: v_orri16:
+;CHECK: vorr
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = or <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @v_orri32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: v_orri32:
+;CHECK: vorr
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = or <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @v_orri64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: v_orri64:
+;CHECK: vorr
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = or <1 x i64> %tmp1, %tmp2
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @v_orrQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: v_orrQi8:
+;CHECK: vorr
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = or <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @v_orrQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: v_orrQi16:
+;CHECK: vorr
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = or <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @v_orrQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: v_orrQi32:
+;CHECK: vorr
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = or <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @v_orrQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: v_orrQi64:
+;CHECK: vorr
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = or <2 x i64> %tmp1, %tmp2
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i8> @v_orni8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: v_orni8:
+;CHECK: vorn
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = xor <8 x i8> %tmp2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 >
+ %tmp4 = or <8 x i8> %tmp1, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @v_orni16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: v_orni16:
+;CHECK: vorn
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = xor <4 x i16> %tmp2, < i16 -1, i16 -1, i16 -1, i16 -1 >
+ %tmp4 = or <4 x i16> %tmp1, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @v_orni32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: v_orni32:
+;CHECK: vorn
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = xor <2 x i32> %tmp2, < i32 -1, i32 -1 >
+ %tmp4 = or <2 x i32> %tmp1, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <1 x i64> @v_orni64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: v_orni64:
+;CHECK: vorn
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = xor <1 x i64> %tmp2, < i64 -1 >
+ %tmp4 = or <1 x i64> %tmp1, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <16 x i8> @v_ornQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: v_ornQi8:
+;CHECK: vorn
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = xor <16 x i8> %tmp2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 >
+ %tmp4 = or <16 x i8> %tmp1, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @v_ornQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: v_ornQi16:
+;CHECK: vorn
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = xor <8 x i16> %tmp2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1 >
+ %tmp4 = or <8 x i16> %tmp1, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @v_ornQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: v_ornQi32:
+;CHECK: vorn
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = xor <4 x i32> %tmp2, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %tmp4 = or <4 x i32> %tmp1, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @v_ornQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: v_ornQi64:
+;CHECK: vorn
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = xor <2 x i64> %tmp2, < i64 -1, i64 -1 >
+ %tmp4 = or <2 x i64> %tmp1, %tmp3
+ ret <2 x i64> %tmp4
+}
+
+define <8 x i8> @vtsti8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vtsti8:
+;CHECK: vtst.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = and <8 x i8> %tmp1, %tmp2
+ %tmp4 = icmp ne <8 x i8> %tmp3, zeroinitializer
+ %tmp5 = sext <8 x i1> %tmp4 to <8 x i8>
+ ret <8 x i8> %tmp5
+}
+
+define <4 x i16> @vtsti16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vtsti16:
+;CHECK: vtst.16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = and <4 x i16> %tmp1, %tmp2
+ %tmp4 = icmp ne <4 x i16> %tmp3, zeroinitializer
+ %tmp5 = sext <4 x i1> %tmp4 to <4 x i16>
+ ret <4 x i16> %tmp5
+}
+
+define <2 x i32> @vtsti32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vtsti32:
+;CHECK: vtst.32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = and <2 x i32> %tmp1, %tmp2
+ %tmp4 = icmp ne <2 x i32> %tmp3, zeroinitializer
+ %tmp5 = sext <2 x i1> %tmp4 to <2 x i32>
+ ret <2 x i32> %tmp5
+}
+
+define <16 x i8> @vtstQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vtstQi8:
+;CHECK: vtst.8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = and <16 x i8> %tmp1, %tmp2
+ %tmp4 = icmp ne <16 x i8> %tmp3, zeroinitializer
+ %tmp5 = sext <16 x i1> %tmp4 to <16 x i8>
+ ret <16 x i8> %tmp5
+}
+
+define <8 x i16> @vtstQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vtstQi16:
+;CHECK: vtst.16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = and <8 x i16> %tmp1, %tmp2
+ %tmp4 = icmp ne <8 x i16> %tmp3, zeroinitializer
+ %tmp5 = sext <8 x i1> %tmp4 to <8 x i16>
+ ret <8 x i16> %tmp5
+}
+
+define <4 x i32> @vtstQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vtstQi32:
+;CHECK: vtst.32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = and <4 x i32> %tmp1, %tmp2
+ %tmp4 = icmp ne <4 x i32> %tmp3, zeroinitializer
+ %tmp5 = sext <4 x i1> %tmp4 to <4 x i32>
+ ret <4 x i32> %tmp5
+}
diff --git a/test/CodeGen/ARM/vbsl.ll b/test/CodeGen/ARM/vbsl.ll
new file mode 100644
index 0000000..9f3bb4e
--- /dev/null
+++ b/test/CodeGen/ARM/vbsl.ll
@@ -0,0 +1,105 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @v_bsli8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: v_bsli8:
+;CHECK: vbsl
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = and <8 x i8> %tmp1, %tmp2
+ %tmp5 = xor <8 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 >
+ %tmp6 = and <8 x i8> %tmp5, %tmp3
+ %tmp7 = or <8 x i8> %tmp4, %tmp6
+ ret <8 x i8> %tmp7
+}
+
+define <4 x i16> @v_bsli16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: v_bsli16:
+;CHECK: vbsl
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = and <4 x i16> %tmp1, %tmp2
+ %tmp5 = xor <4 x i16> %tmp1, < i16 -1, i16 -1, i16 -1, i16 -1 >
+ %tmp6 = and <4 x i16> %tmp5, %tmp3
+ %tmp7 = or <4 x i16> %tmp4, %tmp6
+ ret <4 x i16> %tmp7
+}
+
+define <2 x i32> @v_bsli32(<2 x i32>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: v_bsli32:
+;CHECK: vbsl
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = and <2 x i32> %tmp1, %tmp2
+ %tmp5 = xor <2 x i32> %tmp1, < i32 -1, i32 -1 >
+ %tmp6 = and <2 x i32> %tmp5, %tmp3
+ %tmp7 = or <2 x i32> %tmp4, %tmp6
+ ret <2 x i32> %tmp7
+}
+
+define <1 x i64> @v_bsli64(<1 x i64>* %A, <1 x i64>* %B, <1 x i64>* %C) nounwind {
+;CHECK: v_bsli64:
+;CHECK: vbsl
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = load <1 x i64>* %C
+ %tmp4 = and <1 x i64> %tmp1, %tmp2
+ %tmp5 = xor <1 x i64> %tmp1, < i64 -1 >
+ %tmp6 = and <1 x i64> %tmp5, %tmp3
+ %tmp7 = or <1 x i64> %tmp4, %tmp6
+ ret <1 x i64> %tmp7
+}
+
+define <16 x i8> @v_bslQi8(<16 x i8>* %A, <16 x i8>* %B, <16 x i8>* %C) nounwind {
+;CHECK: v_bslQi8:
+;CHECK: vbsl
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = load <16 x i8>* %C
+ %tmp4 = and <16 x i8> %tmp1, %tmp2
+ %tmp5 = xor <16 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 >
+ %tmp6 = and <16 x i8> %tmp5, %tmp3
+ %tmp7 = or <16 x i8> %tmp4, %tmp6
+ ret <16 x i8> %tmp7
+}
+
+define <8 x i16> @v_bslQi16(<8 x i16>* %A, <8 x i16>* %B, <8 x i16>* %C) nounwind {
+;CHECK: v_bslQi16:
+;CHECK: vbsl
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = load <8 x i16>* %C
+ %tmp4 = and <8 x i16> %tmp1, %tmp2
+ %tmp5 = xor <8 x i16> %tmp1, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1 >
+ %tmp6 = and <8 x i16> %tmp5, %tmp3
+ %tmp7 = or <8 x i16> %tmp4, %tmp6
+ ret <8 x i16> %tmp7
+}
+
+define <4 x i32> @v_bslQi32(<4 x i32>* %A, <4 x i32>* %B, <4 x i32>* %C) nounwind {
+;CHECK: v_bslQi32:
+;CHECK: vbsl
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = load <4 x i32>* %C
+ %tmp4 = and <4 x i32> %tmp1, %tmp2
+ %tmp5 = xor <4 x i32> %tmp1, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %tmp6 = and <4 x i32> %tmp5, %tmp3
+ %tmp7 = or <4 x i32> %tmp4, %tmp6
+ ret <4 x i32> %tmp7
+}
+
+define <2 x i64> @v_bslQi64(<2 x i64>* %A, <2 x i64>* %B, <2 x i64>* %C) nounwind {
+;CHECK: v_bslQi64:
+;CHECK: vbsl
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = load <2 x i64>* %C
+ %tmp4 = and <2 x i64> %tmp1, %tmp2
+ %tmp5 = xor <2 x i64> %tmp1, < i64 -1, i64 -1 >
+ %tmp6 = and <2 x i64> %tmp5, %tmp3
+ %tmp7 = or <2 x i64> %tmp4, %tmp6
+ ret <2 x i64> %tmp7
+}
diff --git a/test/CodeGen/ARM/vceq.ll b/test/CodeGen/ARM/vceq.ll
new file mode 100644
index 0000000..e478751
--- /dev/null
+++ b/test/CodeGen/ARM/vceq.ll
@@ -0,0 +1,81 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vceqi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vceqi8:
+;CHECK: vceq.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = icmp eq <8 x i8> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vceqi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vceqi16:
+;CHECK: vceq.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = icmp eq <4 x i16> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vceqi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vceqi32:
+;CHECK: vceq.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = icmp eq <2 x i32> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <2 x i32> @vceqf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vceqf32:
+;CHECK: vceq.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp oeq <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <16 x i8> @vceqQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vceqQi8:
+;CHECK: vceq.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = icmp eq <16 x i8> %tmp1, %tmp2
+ %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vceqQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vceqQi16:
+;CHECK: vceq.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = icmp eq <8 x i16> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vceqQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vceqQi32:
+;CHECK: vceq.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = icmp eq <4 x i32> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
+
+define <4 x i32> @vceqQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vceqQf32:
+;CHECK: vceq.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = fcmp oeq <4 x float> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
diff --git a/test/CodeGen/ARM/vcge.ll b/test/CodeGen/ARM/vcge.ll
new file mode 100644
index 0000000..2c16111
--- /dev/null
+++ b/test/CodeGen/ARM/vcge.ll
@@ -0,0 +1,162 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vcges8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vcges8:
+;CHECK: vcge.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = icmp sge <8 x i8> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vcges16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vcges16:
+;CHECK: vcge.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = icmp sge <4 x i16> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vcges32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vcges32:
+;CHECK: vcge.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = icmp sge <2 x i32> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <8 x i8> @vcgeu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vcgeu8:
+;CHECK: vcge.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = icmp uge <8 x i8> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vcgeu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vcgeu16:
+;CHECK: vcge.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = icmp uge <4 x i16> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vcgeu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vcgeu32:
+;CHECK: vcge.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = icmp uge <2 x i32> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <2 x i32> @vcgef32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcgef32:
+;CHECK: vcge.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp oge <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <16 x i8> @vcgeQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vcgeQs8:
+;CHECK: vcge.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = icmp sge <16 x i8> %tmp1, %tmp2
+ %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vcgeQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vcgeQs16:
+;CHECK: vcge.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = icmp sge <8 x i16> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vcgeQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vcgeQs32:
+;CHECK: vcge.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = icmp sge <4 x i32> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
+
+define <16 x i8> @vcgeQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vcgeQu8:
+;CHECK: vcge.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = icmp uge <16 x i8> %tmp1, %tmp2
+ %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vcgeQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vcgeQu16:
+;CHECK: vcge.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = icmp uge <8 x i16> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vcgeQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vcgeQu32:
+;CHECK: vcge.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = icmp uge <4 x i32> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
+
+define <4 x i32> @vcgeQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vcgeQf32:
+;CHECK: vcge.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = fcmp oge <4 x float> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i32> @vacgef32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vacgef32:
+;CHECK: vacge.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vacged(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <4 x i32> @vacgeQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vacgeQf32:
+;CHECK: vacge.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vacgeq(<4 x float> %tmp1, <4 x float> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+declare <2 x i32> @llvm.arm.neon.vacged(<2 x float>, <2 x float>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vacgeq(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/ARM/vcgt.ll b/test/CodeGen/ARM/vcgt.ll
new file mode 100644
index 0000000..6b11ba5
--- /dev/null
+++ b/test/CodeGen/ARM/vcgt.ll
@@ -0,0 +1,162 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vcgts8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vcgts8:
+;CHECK: vcgt.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = icmp sgt <8 x i8> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vcgts16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vcgts16:
+;CHECK: vcgt.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = icmp sgt <4 x i16> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vcgts32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vcgts32:
+;CHECK: vcgt.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = icmp sgt <2 x i32> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <8 x i8> @vcgtu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vcgtu8:
+;CHECK: vcgt.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = icmp ugt <8 x i8> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vcgtu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vcgtu16:
+;CHECK: vcgt.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = icmp ugt <4 x i16> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vcgtu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vcgtu32:
+;CHECK: vcgt.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = icmp ugt <2 x i32> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <2 x i32> @vcgtf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcgtf32:
+;CHECK: vcgt.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp ogt <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <16 x i8> @vcgtQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vcgtQs8:
+;CHECK: vcgt.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = icmp sgt <16 x i8> %tmp1, %tmp2
+ %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vcgtQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vcgtQs16:
+;CHECK: vcgt.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = icmp sgt <8 x i16> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vcgtQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vcgtQs32:
+;CHECK: vcgt.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = icmp sgt <4 x i32> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
+
+define <16 x i8> @vcgtQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vcgtQu8:
+;CHECK: vcgt.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = icmp ugt <16 x i8> %tmp1, %tmp2
+ %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vcgtQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vcgtQu16:
+;CHECK: vcgt.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = icmp ugt <8 x i16> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vcgtQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vcgtQu32:
+;CHECK: vcgt.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = icmp ugt <4 x i32> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
+
+define <4 x i32> @vcgtQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vcgtQf32:
+;CHECK: vcgt.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = fcmp ogt <4 x float> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i32> @vacgtf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vacgtf32:
+;CHECK: vacgt.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vacgtd(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <4 x i32> @vacgtQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vacgtQf32:
+;CHECK: vacgt.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vacgtq(<4 x float> %tmp1, <4 x float> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+declare <2 x i32> @llvm.arm.neon.vacgtd(<2 x float>, <2 x float>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vacgtq(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/ARM/vcnt.ll b/test/CodeGen/ARM/vcnt.ll
new file mode 100644
index 0000000..450f90d
--- /dev/null
+++ b/test/CodeGen/ARM/vcnt.ll
@@ -0,0 +1,132 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vcnt8(<8 x i8>* %A) nounwind {
+;CHECK: vcnt8:
+;CHECK: vcnt.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <16 x i8> @vcntQ8(<16 x i8>* %A) nounwind {
+;CHECK: vcntQ8:
+;CHECK: vcnt.8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vcnt.v16i8(<16 x i8> %tmp1)
+ ret <16 x i8> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8>) nounwind readnone
+declare <16 x i8> @llvm.arm.neon.vcnt.v16i8(<16 x i8>) nounwind readnone
+
+define <8 x i8> @vclz8(<8 x i8>* %A) nounwind {
+;CHECK: vclz8:
+;CHECK: vclz.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vclz.v8i8(<8 x i8> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
+;CHECK: vclz16:
+;CHECK: vclz.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vclz.v4i16(<4 x i16> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vclz32(<2 x i32>* %A) nounwind {
+;CHECK: vclz32:
+;CHECK: vclz.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vclz.v2i32(<2 x i32> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <16 x i8> @vclzQ8(<16 x i8>* %A) nounwind {
+;CHECK: vclzQ8:
+;CHECK: vclz.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vclz.v16i8(<16 x i8> %tmp1)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vclzQ16(<8 x i16>* %A) nounwind {
+;CHECK: vclzQ16:
+;CHECK: vclz.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vclz.v8i16(<8 x i16> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vclzQ32(<4 x i32>* %A) nounwind {
+;CHECK: vclzQ32:
+;CHECK: vclz.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vclz.v4i32(<4 x i32> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vclz.v8i8(<8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vclz.v4i16(<4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vclz.v2i32(<2 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vclz.v16i8(<16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vclz.v8i16(<8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vclz.v4i32(<4 x i32>) nounwind readnone
+
+define <8 x i8> @vclss8(<8 x i8>* %A) nounwind {
+;CHECK: vclss8:
+;CHECK: vcls.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vcls.v8i8(<8 x i8> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vclss16(<4 x i16>* %A) nounwind {
+;CHECK: vclss16:
+;CHECK: vcls.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vcls.v4i16(<4 x i16> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vclss32(<2 x i32>* %A) nounwind {
+;CHECK: vclss32:
+;CHECK: vcls.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vcls.v2i32(<2 x i32> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <16 x i8> @vclsQs8(<16 x i8>* %A) nounwind {
+;CHECK: vclsQs8:
+;CHECK: vcls.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vcls.v16i8(<16 x i8> %tmp1)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vclsQs16(<8 x i16>* %A) nounwind {
+;CHECK: vclsQs16:
+;CHECK: vcls.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vcls.v8i16(<8 x i16> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vclsQs32(<4 x i32>* %A) nounwind {
+;CHECK: vclsQs32:
+;CHECK: vcls.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vcls.v4i32(<4 x i32> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vcls.v8i8(<8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vcls.v4i16(<4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vcls.v2i32(<2 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vcls.v16i8(<16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vcls.v8i16(<8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vcls.v4i32(<4 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vcombine.ll b/test/CodeGen/ARM/vcombine.ll
new file mode 100644
index 0000000..e673305
--- /dev/null
+++ b/test/CodeGen/ARM/vcombine.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=arm -mattr=+neon
+
+define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vcombine16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vcombine32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ ret <4 x i32> %tmp3
+}
+
+define <4 x float> @vcombinefloat(<2 x float>* %A, <2 x float>* %B) nounwind {
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ ret <4 x float> %tmp3
+}
+
+define <2 x i64> @vcombine64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = shufflevector <1 x i64> %tmp1, <1 x i64> %tmp2, <2 x i32> <i32 0, i32 1>
+ ret <2 x i64> %tmp3
+}
diff --git a/test/CodeGen/ARM/vcvt.ll b/test/CodeGen/ARM/vcvt.ll
new file mode 100644
index 0000000..f4cc536
--- /dev/null
+++ b/test/CodeGen/ARM/vcvt.ll
@@ -0,0 +1,140 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <2 x i32> @vcvt_f32tos32(<2 x float>* %A) nounwind {
+;CHECK: vcvt_f32tos32:
+;CHECK: vcvt.s32.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = fptosi <2 x float> %tmp1 to <2 x i32>
+ ret <2 x i32> %tmp2
+}
+
+define <2 x i32> @vcvt_f32tou32(<2 x float>* %A) nounwind {
+;CHECK: vcvt_f32tou32:
+;CHECK: vcvt.u32.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = fptoui <2 x float> %tmp1 to <2 x i32>
+ ret <2 x i32> %tmp2
+}
+
+define <2 x float> @vcvt_s32tof32(<2 x i32>* %A) nounwind {
+;CHECK: vcvt_s32tof32:
+;CHECK: vcvt.f32.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = sitofp <2 x i32> %tmp1 to <2 x float>
+ ret <2 x float> %tmp2
+}
+
+define <2 x float> @vcvt_u32tof32(<2 x i32>* %A) nounwind {
+;CHECK: vcvt_u32tof32:
+;CHECK: vcvt.f32.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = uitofp <2 x i32> %tmp1 to <2 x float>
+ ret <2 x float> %tmp2
+}
+
+define <4 x i32> @vcvtQ_f32tos32(<4 x float>* %A) nounwind {
+;CHECK: vcvtQ_f32tos32:
+;CHECK: vcvt.s32.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = fptosi <4 x float> %tmp1 to <4 x i32>
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @vcvtQ_f32tou32(<4 x float>* %A) nounwind {
+;CHECK: vcvtQ_f32tou32:
+;CHECK: vcvt.u32.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = fptoui <4 x float> %tmp1 to <4 x i32>
+ ret <4 x i32> %tmp2
+}
+
+define <4 x float> @vcvtQ_s32tof32(<4 x i32>* %A) nounwind {
+;CHECK: vcvtQ_s32tof32:
+;CHECK: vcvt.f32.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = sitofp <4 x i32> %tmp1 to <4 x float>
+ ret <4 x float> %tmp2
+}
+
+define <4 x float> @vcvtQ_u32tof32(<4 x i32>* %A) nounwind {
+;CHECK: vcvtQ_u32tof32:
+;CHECK: vcvt.f32.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = uitofp <4 x i32> %tmp1 to <4 x float>
+ ret <4 x float> %tmp2
+}
+
+define <2 x i32> @vcvt_n_f32tos32(<2 x float>* %A) nounwind {
+;CHECK: vcvt_n_f32tos32:
+;CHECK: vcvt.s32.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> %tmp1, i32 1)
+ ret <2 x i32> %tmp2
+}
+
+define <2 x i32> @vcvt_n_f32tou32(<2 x float>* %A) nounwind {
+;CHECK: vcvt_n_f32tou32:
+;CHECK: vcvt.u32.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> %tmp1, i32 1)
+ ret <2 x i32> %tmp2
+}
+
+define <2 x float> @vcvt_n_s32tof32(<2 x i32>* %A) nounwind {
+;CHECK: vcvt_n_s32tof32:
+;CHECK: vcvt.f32.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
+ ret <2 x float> %tmp2
+}
+
+define <2 x float> @vcvt_n_u32tof32(<2 x i32>* %A) nounwind {
+;CHECK: vcvt_n_u32tof32:
+;CHECK: vcvt.f32.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
+ ret <2 x float> %tmp2
+}
+
+declare <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float>, i32) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float>, i32) nounwind readnone
+declare <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
+declare <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
+
+define <4 x i32> @vcvtQ_n_f32tos32(<4 x float>* %A) nounwind {
+;CHECK: vcvtQ_n_f32tos32:
+;CHECK: vcvt.s32.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float> %tmp1, i32 1)
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @vcvtQ_n_f32tou32(<4 x float>* %A) nounwind {
+;CHECK: vcvtQ_n_f32tou32:
+;CHECK: vcvt.u32.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float> %tmp1, i32 1)
+ ret <4 x i32> %tmp2
+}
+
+define <4 x float> @vcvtQ_n_s32tof32(<4 x i32>* %A) nounwind {
+;CHECK: vcvtQ_n_s32tof32:
+;CHECK: vcvt.f32.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32> %tmp1, i32 1)
+ ret <4 x float> %tmp2
+}
+
+define <4 x float> @vcvtQ_n_u32tof32(<4 x i32>* %A) nounwind {
+;CHECK: vcvtQ_n_u32tof32:
+;CHECK: vcvt.f32.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32> %tmp1, i32 1)
+ ret <4 x float> %tmp2
+}
+
+declare <4 x i32> @llvm.arm.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float>, i32) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float>, i32) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone
+
diff --git a/test/CodeGen/ARM/vdup.ll b/test/CodeGen/ARM/vdup.ll
new file mode 100644
index 0000000..c9a68ca
--- /dev/null
+++ b/test/CodeGen/ARM/vdup.ll
@@ -0,0 +1,269 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @v_dup8(i8 %A) nounwind {
+;CHECK: v_dup8:
+;CHECK: vdup.8
+ %tmp1 = insertelement <8 x i8> zeroinitializer, i8 %A, i32 0
+ %tmp2 = insertelement <8 x i8> %tmp1, i8 %A, i32 1
+ %tmp3 = insertelement <8 x i8> %tmp2, i8 %A, i32 2
+ %tmp4 = insertelement <8 x i8> %tmp3, i8 %A, i32 3
+ %tmp5 = insertelement <8 x i8> %tmp4, i8 %A, i32 4
+ %tmp6 = insertelement <8 x i8> %tmp5, i8 %A, i32 5
+ %tmp7 = insertelement <8 x i8> %tmp6, i8 %A, i32 6
+ %tmp8 = insertelement <8 x i8> %tmp7, i8 %A, i32 7
+ ret <8 x i8> %tmp8
+}
+
+define <4 x i16> @v_dup16(i16 %A) nounwind {
+;CHECK: v_dup16:
+;CHECK: vdup.16
+ %tmp1 = insertelement <4 x i16> zeroinitializer, i16 %A, i32 0
+ %tmp2 = insertelement <4 x i16> %tmp1, i16 %A, i32 1
+ %tmp3 = insertelement <4 x i16> %tmp2, i16 %A, i32 2
+ %tmp4 = insertelement <4 x i16> %tmp3, i16 %A, i32 3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @v_dup32(i32 %A) nounwind {
+;CHECK: v_dup32:
+;CHECK: vdup.32
+ %tmp1 = insertelement <2 x i32> zeroinitializer, i32 %A, i32 0
+ %tmp2 = insertelement <2 x i32> %tmp1, i32 %A, i32 1
+ ret <2 x i32> %tmp2
+}
+
+define <2 x float> @v_dupfloat(float %A) nounwind {
+;CHECK: v_dupfloat:
+;CHECK: vdup.32
+ %tmp1 = insertelement <2 x float> zeroinitializer, float %A, i32 0
+ %tmp2 = insertelement <2 x float> %tmp1, float %A, i32 1
+ ret <2 x float> %tmp2
+}
+
+define <16 x i8> @v_dupQ8(i8 %A) nounwind {
+;CHECK: v_dupQ8:
+;CHECK: vdup.8
+ %tmp1 = insertelement <16 x i8> zeroinitializer, i8 %A, i32 0
+ %tmp2 = insertelement <16 x i8> %tmp1, i8 %A, i32 1
+ %tmp3 = insertelement <16 x i8> %tmp2, i8 %A, i32 2
+ %tmp4 = insertelement <16 x i8> %tmp3, i8 %A, i32 3
+ %tmp5 = insertelement <16 x i8> %tmp4, i8 %A, i32 4
+ %tmp6 = insertelement <16 x i8> %tmp5, i8 %A, i32 5
+ %tmp7 = insertelement <16 x i8> %tmp6, i8 %A, i32 6
+ %tmp8 = insertelement <16 x i8> %tmp7, i8 %A, i32 7
+ %tmp9 = insertelement <16 x i8> %tmp8, i8 %A, i32 8
+ %tmp10 = insertelement <16 x i8> %tmp9, i8 %A, i32 9
+ %tmp11 = insertelement <16 x i8> %tmp10, i8 %A, i32 10
+ %tmp12 = insertelement <16 x i8> %tmp11, i8 %A, i32 11
+ %tmp13 = insertelement <16 x i8> %tmp12, i8 %A, i32 12
+ %tmp14 = insertelement <16 x i8> %tmp13, i8 %A, i32 13
+ %tmp15 = insertelement <16 x i8> %tmp14, i8 %A, i32 14
+ %tmp16 = insertelement <16 x i8> %tmp15, i8 %A, i32 15
+ ret <16 x i8> %tmp16
+}
+
+define <8 x i16> @v_dupQ16(i16 %A) nounwind {
+;CHECK: v_dupQ16:
+;CHECK: vdup.16
+ %tmp1 = insertelement <8 x i16> zeroinitializer, i16 %A, i32 0
+ %tmp2 = insertelement <8 x i16> %tmp1, i16 %A, i32 1
+ %tmp3 = insertelement <8 x i16> %tmp2, i16 %A, i32 2
+ %tmp4 = insertelement <8 x i16> %tmp3, i16 %A, i32 3
+ %tmp5 = insertelement <8 x i16> %tmp4, i16 %A, i32 4
+ %tmp6 = insertelement <8 x i16> %tmp5, i16 %A, i32 5
+ %tmp7 = insertelement <8 x i16> %tmp6, i16 %A, i32 6
+ %tmp8 = insertelement <8 x i16> %tmp7, i16 %A, i32 7
+ ret <8 x i16> %tmp8
+}
+
+define <4 x i32> @v_dupQ32(i32 %A) nounwind {
+;CHECK: v_dupQ32:
+;CHECK: vdup.32
+ %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %A, i32 0
+ %tmp2 = insertelement <4 x i32> %tmp1, i32 %A, i32 1
+ %tmp3 = insertelement <4 x i32> %tmp2, i32 %A, i32 2
+ %tmp4 = insertelement <4 x i32> %tmp3, i32 %A, i32 3
+ ret <4 x i32> %tmp4
+}
+
+define <4 x float> @v_dupQfloat(float %A) nounwind {
+;CHECK: v_dupQfloat:
+;CHECK: vdup.32
+ %tmp1 = insertelement <4 x float> zeroinitializer, float %A, i32 0
+ %tmp2 = insertelement <4 x float> %tmp1, float %A, i32 1
+ %tmp3 = insertelement <4 x float> %tmp2, float %A, i32 2
+ %tmp4 = insertelement <4 x float> %tmp3, float %A, i32 3
+ ret <4 x float> %tmp4
+}
+
+; Check to make sure it works with shuffles, too.
+
+define <8 x i8> @v_shuffledup8(i8 %A) nounwind {
+;CHECK: v_shuffledup8:
+;CHECK: vdup.8
+ %tmp1 = insertelement <8 x i8> undef, i8 %A, i32 0
+ %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @v_shuffledup16(i16 %A) nounwind {
+;CHECK: v_shuffledup16:
+;CHECK: vdup.16
+ %tmp1 = insertelement <4 x i16> undef, i16 %A, i32 0
+ %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @v_shuffledup32(i32 %A) nounwind {
+;CHECK: v_shuffledup32:
+;CHECK: vdup.32
+ %tmp1 = insertelement <2 x i32> undef, i32 %A, i32 0
+ %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
+ ret <2 x i32> %tmp2
+}
+
+define <2 x float> @v_shuffledupfloat(float %A) nounwind {
+;CHECK: v_shuffledupfloat:
+;CHECK: vdup.32
+ %tmp1 = insertelement <2 x float> undef, float %A, i32 0
+ %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer
+ ret <2 x float> %tmp2
+}
+
+define <16 x i8> @v_shuffledupQ8(i8 %A) nounwind {
+;CHECK: v_shuffledupQ8:
+;CHECK: vdup.8
+ %tmp1 = insertelement <16 x i8> undef, i8 %A, i32 0
+ %tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <16 x i32> zeroinitializer
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @v_shuffledupQ16(i16 %A) nounwind {
+;CHECK: v_shuffledupQ16:
+;CHECK: vdup.16
+ %tmp1 = insertelement <8 x i16> undef, i16 %A, i32 0
+ %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <8 x i32> zeroinitializer
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @v_shuffledupQ32(i32 %A) nounwind {
+;CHECK: v_shuffledupQ32:
+;CHECK: vdup.32
+ %tmp1 = insertelement <4 x i32> undef, i32 %A, i32 0
+ %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> zeroinitializer
+ ret <4 x i32> %tmp2
+}
+
+define <4 x float> @v_shuffledupQfloat(float %A) nounwind {
+;CHECK: v_shuffledupQfloat:
+;CHECK: vdup.32
+ %tmp1 = insertelement <4 x float> undef, float %A, i32 0
+ %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer
+ ret <4 x float> %tmp2
+}
+
+define <2 x float> @v_shuffledupfloat2(float* %A) nounwind {
+;CHECK: v_shuffledupfloat2:
+;CHECK: vdup.32
+ %tmp0 = load float* %A
+ %tmp1 = insertelement <2 x float> undef, float %tmp0, i32 0
+ %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer
+ ret <2 x float> %tmp2
+}
+
+define <4 x float> @v_shuffledupQfloat2(float* %A) nounwind {
+;CHECK: v_shuffledupQfloat2:
+;CHECK: vdup.32
+ %tmp0 = load float* %A
+ %tmp1 = insertelement <4 x float> undef, float %tmp0, i32 0
+ %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer
+ ret <4 x float> %tmp2
+}
+
+define <8 x i8> @vduplane8(<8 x i8>* %A) nounwind {
+;CHECK: vduplane8:
+;CHECK: vdup.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vduplane16(<4 x i16>* %A) nounwind {
+;CHECK: vduplane16:
+;CHECK: vdup.16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vduplane32(<2 x i32>* %A) nounwind {
+;CHECK: vduplane32:
+;CHECK: vdup.32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> < i32 1, i32 1 >
+ ret <2 x i32> %tmp2
+}
+
+define <2 x float> @vduplanefloat(<2 x float>* %A) nounwind {
+;CHECK: vduplanefloat:
+;CHECK: vdup.32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> < i32 1, i32 1 >
+ ret <2 x float> %tmp2
+}
+
+define <16 x i8> @vduplaneQ8(<8 x i8>* %A) nounwind {
+;CHECK: vduplaneQ8:
+;CHECK: vdup.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <16 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vduplaneQ16(<4 x i16>* %A) nounwind {
+;CHECK: vduplaneQ16:
+;CHECK: vdup.16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vduplaneQ32(<2 x i32>* %A) nounwind {
+;CHECK: vduplaneQ32:
+;CHECK: vdup.32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >
+ ret <4 x i32> %tmp2
+}
+
+define <4 x float> @vduplaneQfloat(<2 x float>* %A) nounwind {
+;CHECK: vduplaneQfloat:
+;CHECK: vdup.32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >
+ ret <4 x float> %tmp2
+}
+
+define arm_apcscc <2 x i64> @foo(<2 x i64> %arg0_int64x1_t) nounwind readnone {
+entry:
+ %0 = shufflevector <2 x i64> %arg0_int64x1_t, <2 x i64> undef, <2 x i32> <i32 1, i32 1>
+ ret <2 x i64> %0
+}
+
+define arm_apcscc <2 x i64> @bar(<2 x i64> %arg0_int64x1_t) nounwind readnone {
+entry:
+ %0 = shufflevector <2 x i64> %arg0_int64x1_t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
+ ret <2 x i64> %0
+}
+
+define arm_apcscc <2 x double> @baz(<2 x double> %arg0_int64x1_t) nounwind readnone {
+entry:
+ %0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32> <i32 1, i32 1>
+ ret <2 x double> %0
+}
+
+define arm_apcscc <2 x double> @qux(<2 x double> %arg0_int64x1_t) nounwind readnone {
+entry:
+ %0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32> <i32 0, i32 0>
+ ret <2 x double> %0
+}
diff --git a/test/CodeGen/ARM/vext.ll b/test/CodeGen/ARM/vext.ll
new file mode 100644
index 0000000..20d953b
--- /dev/null
+++ b/test/CodeGen/ARM/vext.ll
@@ -0,0 +1,56 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define arm_apcscc <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: test_vextd:
+;CHECK: vext
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>
+ ret <8 x i8> %tmp3
+}
+
+define arm_apcscc <8 x i8> @test_vextRd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: test_vextRd:
+;CHECK: vext
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4>
+ ret <8 x i8> %tmp3
+}
+
+define arm_apcscc <16 x i8> @test_vextq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: test_vextq:
+;CHECK: vext
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>
+ ret <16 x i8> %tmp3
+}
+
+define arm_apcscc <16 x i8> @test_vextRq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: test_vextRq:
+;CHECK: vext
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>
+ ret <16 x i8> %tmp3
+}
+
+define arm_apcscc <4 x i16> @test_vextd16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: test_vextd16:
+;CHECK: vext
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
+ ret <4 x i16> %tmp3
+}
+
+define arm_apcscc <4 x i32> @test_vextq32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: test_vextq32:
+;CHECK: vext
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
+ ret <4 x i32> %tmp3
+}
+
diff --git a/test/CodeGen/ARM/vfcmp.ll b/test/CodeGen/ARM/vfcmp.ll
new file mode 100644
index 0000000..6946d02
--- /dev/null
+++ b/test/CodeGen/ARM/vfcmp.ll
@@ -0,0 +1,139 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+; This tests fcmp operations that do not map directly to NEON instructions.
+
+; une is implemented with VCEQ/VMVN
+define <2 x i32> @vcunef32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcunef32:
+;CHECK: vceq.f32
+;CHECK-NEXT: vmvn
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp une <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; olt is implemented with VCGT
+define <2 x i32> @vcoltf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcoltf32:
+;CHECK: vcgt.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp olt <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; ole is implemented with VCGE
+define <2 x i32> @vcolef32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcolef32:
+;CHECK: vcge.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp ole <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; uge is implemented with VCGT/VMVN
+define <2 x i32> @vcugef32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcugef32:
+;CHECK: vcgt.f32
+;CHECK-NEXT: vmvn
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp uge <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; ule is implemented with VCGT/VMVN
+define <2 x i32> @vculef32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vculef32:
+;CHECK: vcgt.f32
+;CHECK-NEXT: vmvn
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp ule <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; ugt is implemented with VCGE/VMVN
+define <2 x i32> @vcugtf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcugtf32:
+;CHECK: vcge.f32
+;CHECK-NEXT: vmvn
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp ugt <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; ult is implemented with VCGE/VMVN
+define <2 x i32> @vcultf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcultf32:
+;CHECK: vcge.f32
+;CHECK-NEXT: vmvn
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp ult <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; ueq is implemented with VCGT/VCGT/VORR/VMVN
+define <2 x i32> @vcueqf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcueqf32:
+;CHECK: vcgt.f32
+;CHECK-NEXT: vcgt.f32
+;CHECK-NEXT: vorr
+;CHECK-NEXT: vmvn
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp ueq <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; one is implemented with VCGT/VCGT/VORR
+define <2 x i32> @vconef32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vconef32:
+;CHECK: vcgt.f32
+;CHECK-NEXT: vcgt.f32
+;CHECK-NEXT: vorr
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp one <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; uno is implemented with VCGT/VCGE/VORR/VMVN
+define <2 x i32> @vcunof32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcunof32:
+;CHECK: vcge.f32
+;CHECK-NEXT: vcgt.f32
+;CHECK-NEXT: vorr
+;CHECK-NEXT: vmvn
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp uno <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+; ord is implemented with VCGT/VCGE/VORR
+define <2 x i32> @vcordf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vcordf32:
+;CHECK: vcge.f32
+;CHECK-NEXT: vcgt.f32
+;CHECK-NEXT: vorr
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = fcmp ord <2 x float> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
diff --git a/test/CodeGen/ARM/vfp.ll b/test/CodeGen/ARM/vfp.ll
new file mode 100644
index 0000000..44a44af
--- /dev/null
+++ b/test/CodeGen/ARM/vfp.ll
@@ -0,0 +1,155 @@
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+
+define void @test(float* %P, double* %D) {
+ %A = load float* %P ; <float> [#uses=1]
+ %B = load double* %D ; <double> [#uses=1]
+ store float %A, float* %P
+ store double %B, double* %D
+ ret void
+}
+
+declare float @fabsf(float)
+
+declare double @fabs(double)
+
+define void @test_abs(float* %P, double* %D) {
+;CHECK: test_abs:
+ %a = load float* %P ; <float> [#uses=1]
+;CHECK: vabs.f32
+ %b = call float @fabsf( float %a ) ; <float> [#uses=1]
+ store float %b, float* %P
+ %A = load double* %D ; <double> [#uses=1]
+;CHECK: vabs.f64
+ %B = call double @fabs( double %A ) ; <double> [#uses=1]
+ store double %B, double* %D
+ ret void
+}
+
+define void @test_add(float* %P, double* %D) {
+;CHECK: test_add:
+ %a = load float* %P ; <float> [#uses=2]
+ %b = fadd float %a, %a ; <float> [#uses=1]
+ store float %b, float* %P
+ %A = load double* %D ; <double> [#uses=2]
+ %B = fadd double %A, %A ; <double> [#uses=1]
+ store double %B, double* %D
+ ret void
+}
+
+define void @test_ext_round(float* %P, double* %D) {
+;CHECK: test_ext_round:
+ %a = load float* %P ; <float> [#uses=1]
+;CHECK: vcvt.f64.f32
+ %b = fpext float %a to double ; <double> [#uses=1]
+ %A = load double* %D ; <double> [#uses=1]
+;CHECK: vcvt.f32.f64
+ %B = fptrunc double %A to float ; <float> [#uses=1]
+ store double %b, double* %D
+ store float %B, float* %P
+ ret void
+}
+
+define void @test_fma(float* %P1, float* %P2, float* %P3) {
+;CHECK: test_fma:
+ %a1 = load float* %P1 ; <float> [#uses=1]
+ %a2 = load float* %P2 ; <float> [#uses=1]
+ %a3 = load float* %P3 ; <float> [#uses=1]
+;CHECK: vnmls.f32
+ %X = fmul float %a1, %a2 ; <float> [#uses=1]
+ %Y = fsub float %X, %a3 ; <float> [#uses=1]
+ store float %Y, float* %P1
+ ret void
+}
+
+define i32 @test_ftoi(float* %P1) {
+;CHECK: test_ftoi:
+ %a1 = load float* %P1 ; <float> [#uses=1]
+;CHECK: vcvt.s32.f32
+ %b1 = fptosi float %a1 to i32 ; <i32> [#uses=1]
+ ret i32 %b1
+}
+
+define i32 @test_ftou(float* %P1) {
+;CHECK: test_ftou:
+ %a1 = load float* %P1 ; <float> [#uses=1]
+;CHECK: vcvt.u32.f32
+ %b1 = fptoui float %a1 to i32 ; <i32> [#uses=1]
+ ret i32 %b1
+}
+
+define i32 @test_dtoi(double* %P1) {
+;CHECK: test_dtoi:
+ %a1 = load double* %P1 ; <double> [#uses=1]
+;CHECK: vcvt.s32.f64
+ %b1 = fptosi double %a1 to i32 ; <i32> [#uses=1]
+ ret i32 %b1
+}
+
+define i32 @test_dtou(double* %P1) {
+;CHECK: test_dtou:
+ %a1 = load double* %P1 ; <double> [#uses=1]
+;CHECK: vcvt.u32.f64
+ %b1 = fptoui double %a1 to i32 ; <i32> [#uses=1]
+ ret i32 %b1
+}
+
+define void @test_utod(double* %P1, i32 %X) {
+;CHECK: test_utod:
+;CHECK: vcvt.f64.u32
+ %b1 = uitofp i32 %X to double ; <double> [#uses=1]
+ store double %b1, double* %P1
+ ret void
+}
+
+define void @test_utod2(double* %P1, i8 %X) {
+;CHECK: test_utod2:
+;CHECK: vcvt.f64.u32
+ %b1 = uitofp i8 %X to double ; <double> [#uses=1]
+ store double %b1, double* %P1
+ ret void
+}
+
+define void @test_cmp(float* %glob, i32 %X) {
+;CHECK: test_cmp:
+entry:
+ %tmp = load float* %glob ; <float> [#uses=2]
+ %tmp3 = getelementptr float* %glob, i32 2 ; <float*> [#uses=1]
+ %tmp4 = load float* %tmp3 ; <float> [#uses=2]
+ %tmp.upgrd.1 = fcmp oeq float %tmp, %tmp4 ; <i1> [#uses=1]
+ %tmp5 = fcmp uno float %tmp, %tmp4 ; <i1> [#uses=1]
+ %tmp6 = or i1 %tmp.upgrd.1, %tmp5 ; <i1> [#uses=1]
+;CHECK: bmi
+;CHECK-NEXT: bgt
+ br i1 %tmp6, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp.upgrd.2 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+
+cond_false: ; preds = %entry
+ %tmp7 = tail call i32 (...)* @baz( ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i1 @llvm.isunordered.f32(float, float)
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+define void @test_cmpfp0(float* %glob, i32 %X) {
+;CHECK: test_cmpfp0:
+entry:
+ %tmp = load float* %glob ; <float> [#uses=1]
+;CHECK: vcmpe.f32
+ %tmp.upgrd.3 = fcmp ogt float %tmp, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.3, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp.upgrd.4 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+
+cond_false: ; preds = %entry
+ %tmp1 = tail call i32 (...)* @baz( ) ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/ARM/vget_lane.ll b/test/CodeGen/ARM/vget_lane.ll
new file mode 100644
index 0000000..5dd87d6
--- /dev/null
+++ b/test/CodeGen/ARM/vget_lane.ll
@@ -0,0 +1,212 @@
+; RUN: llc < %s -mattr=+neon | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv7-elf"
+
+define i32 @vget_lanes8(<8 x i8>* %A) nounwind {
+;CHECK: vget_lanes8:
+;CHECK: vmov.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = extractelement <8 x i8> %tmp1, i32 1
+ %tmp3 = sext i8 %tmp2 to i32
+ ret i32 %tmp3
+}
+
+define i32 @vget_lanes16(<4 x i16>* %A) nounwind {
+;CHECK: vget_lanes16:
+;CHECK: vmov.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = extractelement <4 x i16> %tmp1, i32 1
+ %tmp3 = sext i16 %tmp2 to i32
+ ret i32 %tmp3
+}
+
+define i32 @vget_laneu8(<8 x i8>* %A) nounwind {
+;CHECK: vget_laneu8:
+;CHECK: vmov.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = extractelement <8 x i8> %tmp1, i32 1
+ %tmp3 = zext i8 %tmp2 to i32
+ ret i32 %tmp3
+}
+
+define i32 @vget_laneu16(<4 x i16>* %A) nounwind {
+;CHECK: vget_laneu16:
+;CHECK: vmov.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = extractelement <4 x i16> %tmp1, i32 1
+ %tmp3 = zext i16 %tmp2 to i32
+ ret i32 %tmp3
+}
+
+; Do a vector add to keep the extraction from being done directly from memory.
+define i32 @vget_lanei32(<2 x i32>* %A) nounwind {
+;CHECK: vget_lanei32:
+;CHECK: vmov.32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = add <2 x i32> %tmp1, %tmp1
+ %tmp3 = extractelement <2 x i32> %tmp2, i32 1
+ ret i32 %tmp3
+}
+
+define i32 @vgetQ_lanes8(<16 x i8>* %A) nounwind {
+;CHECK: vgetQ_lanes8:
+;CHECK: vmov.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = extractelement <16 x i8> %tmp1, i32 1
+ %tmp3 = sext i8 %tmp2 to i32
+ ret i32 %tmp3
+}
+
+define i32 @vgetQ_lanes16(<8 x i16>* %A) nounwind {
+;CHECK: vgetQ_lanes16:
+;CHECK: vmov.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = extractelement <8 x i16> %tmp1, i32 1
+ %tmp3 = sext i16 %tmp2 to i32
+ ret i32 %tmp3
+}
+
+define i32 @vgetQ_laneu8(<16 x i8>* %A) nounwind {
+;CHECK: vgetQ_laneu8:
+;CHECK: vmov.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = extractelement <16 x i8> %tmp1, i32 1
+ %tmp3 = zext i8 %tmp2 to i32
+ ret i32 %tmp3
+}
+
+define i32 @vgetQ_laneu16(<8 x i16>* %A) nounwind {
+;CHECK: vgetQ_laneu16:
+;CHECK: vmov.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = extractelement <8 x i16> %tmp1, i32 1
+ %tmp3 = zext i16 %tmp2 to i32
+ ret i32 %tmp3
+}
+
+; Do a vector add to keep the extraction from being done directly from memory.
+define i32 @vgetQ_lanei32(<4 x i32>* %A) nounwind {
+;CHECK: vgetQ_lanei32:
+;CHECK: vmov.32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = add <4 x i32> %tmp1, %tmp1
+ %tmp3 = extractelement <4 x i32> %tmp2, i32 1
+ ret i32 %tmp3
+}
+
+define arm_aapcs_vfpcc void @test_vget_laneu16() nounwind {
+entry:
+; CHECK: vmov.u16 r0, d0[1]
+ %arg0_uint16x4_t = alloca <4 x i16> ; <<4 x i16>*> [#uses=1]
+ %out_uint16_t = alloca i16 ; <i16*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load <4 x i16>* %arg0_uint16x4_t, align 8 ; <<4 x i16>> [#uses=1]
+ %1 = extractelement <4 x i16> %0, i32 1 ; <i16> [#uses=1]
+ store i16 %1, i16* %out_uint16_t, align 2
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define arm_aapcs_vfpcc void @test_vget_laneu8() nounwind {
+entry:
+; CHECK: vmov.u8 r0, d0[1]
+ %arg0_uint8x8_t = alloca <8 x i8> ; <<8 x i8>*> [#uses=1]
+ %out_uint8_t = alloca i8 ; <i8*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load <8 x i8>* %arg0_uint8x8_t, align 8 ; <<8 x i8>> [#uses=1]
+ %1 = extractelement <8 x i8> %0, i32 1 ; <i8> [#uses=1]
+ store i8 %1, i8* %out_uint8_t, align 1
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define arm_aapcs_vfpcc void @test_vgetQ_laneu16() nounwind {
+entry:
+; CHECK: vmov.u16 r0, d0[1]
+ %arg0_uint16x8_t = alloca <8 x i16> ; <<8 x i16>*> [#uses=1]
+ %out_uint16_t = alloca i16 ; <i16*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load <8 x i16>* %arg0_uint16x8_t, align 16 ; <<8 x i16>> [#uses=1]
+ %1 = extractelement <8 x i16> %0, i32 1 ; <i16> [#uses=1]
+ store i16 %1, i16* %out_uint16_t, align 2
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define arm_aapcs_vfpcc void @test_vgetQ_laneu8() nounwind {
+entry:
+; CHECK: vmov.u8 r0, d0[1]
+ %arg0_uint8x16_t = alloca <16 x i8> ; <<16 x i8>*> [#uses=1]
+ %out_uint8_t = alloca i8 ; <i8*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load <16 x i8>* %arg0_uint8x16_t, align 16 ; <<16 x i8>> [#uses=1]
+ %1 = extractelement <16 x i8> %0, i32 1 ; <i8> [#uses=1]
+ store i8 %1, i8* %out_uint8_t, align 1
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define <8 x i8> @vset_lane8(<8 x i8>* %A, i8 %B) nounwind {
+;CHECK: vset_lane8:
+;CHECK: vmov.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = insertelement <8 x i8> %tmp1, i8 %B, i32 1
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vset_lane16(<4 x i16>* %A, i16 %B) nounwind {
+;CHECK: vset_lane16:
+;CHECK: vmov.16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = insertelement <4 x i16> %tmp1, i16 %B, i32 1
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vset_lane32(<2 x i32>* %A, i32 %B) nounwind {
+;CHECK: vset_lane32:
+;CHECK: vmov.32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = insertelement <2 x i32> %tmp1, i32 %B, i32 1
+ ret <2 x i32> %tmp2
+}
+
+define <16 x i8> @vsetQ_lane8(<16 x i8>* %A, i8 %B) nounwind {
+;CHECK: vsetQ_lane8:
+;CHECK: vmov.8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = insertelement <16 x i8> %tmp1, i8 %B, i32 1
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vsetQ_lane16(<8 x i16>* %A, i16 %B) nounwind {
+;CHECK: vsetQ_lane16:
+;CHECK: vmov.16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = insertelement <8 x i16> %tmp1, i16 %B, i32 1
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vsetQ_lane32(<4 x i32>* %A, i32 %B) nounwind {
+;CHECK: vsetQ_lane32:
+;CHECK: vmov.32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = insertelement <4 x i32> %tmp1, i32 %B, i32 1
+ ret <4 x i32> %tmp2
+}
+
+define arm_aapcs_vfpcc <2 x float> @test_vset_lanef32(float %arg0_float32_t, <2 x float> %arg1_float32x2_t) nounwind {
+;CHECK: test_vset_lanef32:
+;CHECK: vmov.f32
+;CHECK: vmov.f32
+entry:
+ %0 = insertelement <2 x float> %arg1_float32x2_t, float %arg0_float32_t, i32 1 ; <<2 x float>> [#uses=1]
+ ret <2 x float> %0
+}
diff --git a/test/CodeGen/ARM/vhadd.ll b/test/CodeGen/ARM/vhadd.ll
new file mode 100644
index 0000000..379e062
--- /dev/null
+++ b/test/CodeGen/ARM/vhadd.ll
@@ -0,0 +1,249 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vhadds8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vhadds8:
+;CHECK: vhadd.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vhadds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vhadds16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vhadds16:
+;CHECK: vhadd.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vhadds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vhadds32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vhadds32:
+;CHECK: vhadd.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vhadds.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i8> @vhaddu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vhaddu8:
+;CHECK: vhadd.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vhaddu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vhaddu16:
+;CHECK: vhadd.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vhaddu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vhaddu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vhaddu32:
+;CHECK: vhadd.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vhaddu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <16 x i8> @vhaddQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vhaddQs8:
+;CHECK: vhadd.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vhadds.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vhaddQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vhaddQs16:
+;CHECK: vhadd.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vhadds.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vhaddQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vhaddQs32:
+;CHECK: vhadd.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vhadds.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <16 x i8> @vhaddQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vhaddQu8:
+;CHECK: vhadd.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vhaddu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vhaddQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vhaddQu16:
+;CHECK: vhadd.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vhaddu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vhaddQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vhaddQu32:
+;CHECK: vhadd.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vhaddu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vhadds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vhadds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vhadds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vhaddu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vhaddu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vhadds.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vhadds.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vhadds.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vhaddu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vhaddu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vhaddu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+define <8 x i8> @vrhadds8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vrhadds8:
+;CHECK: vrhadd.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vrhadds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vrhadds16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vrhadds16:
+;CHECK: vrhadd.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vrhadds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vrhadds32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vrhadds32:
+;CHECK: vrhadd.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vrhadds.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i8> @vrhaddu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vrhaddu8:
+;CHECK: vrhadd.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vrhaddu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vrhaddu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vrhaddu16:
+;CHECK: vrhadd.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vrhaddu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vrhaddu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vrhaddu32:
+;CHECK: vrhadd.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vrhaddu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <16 x i8> @vrhaddQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vrhaddQs8:
+;CHECK: vrhadd.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vrhadds.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vrhaddQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vrhaddQs16:
+;CHECK: vrhadd.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vrhadds.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vrhaddQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vrhaddQs32:
+;CHECK: vrhadd.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vrhadds.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <16 x i8> @vrhaddQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vrhaddQu8:
+;CHECK: vrhadd.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vrhaddu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vrhaddQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vrhaddQu16:
+;CHECK: vrhadd.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vrhaddu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vrhaddQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vrhaddQu32:
+;CHECK: vrhadd.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vrhaddu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vrhadds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrhadds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrhadds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vrhaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrhaddu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrhaddu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vrhadds.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vrhadds.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrhadds.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vrhaddu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vrhaddu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrhaddu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vhsub.ll b/test/CodeGen/ARM/vhsub.ll
new file mode 100644
index 0000000..0f0d027
--- /dev/null
+++ b/test/CodeGen/ARM/vhsub.ll
@@ -0,0 +1,125 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vhsubs8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vhsubs8:
+;CHECK: vhsub.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vhsubs.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vhsubs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vhsubs16:
+;CHECK: vhsub.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vhsubs.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vhsubs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vhsubs32:
+;CHECK: vhsub.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vhsubs.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i8> @vhsubu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vhsubu8:
+;CHECK: vhsub.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vhsubu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vhsubu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vhsubu16:
+;CHECK: vhsub.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vhsubu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vhsubu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vhsubu32:
+;CHECK: vhsub.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vhsubu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <16 x i8> @vhsubQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vhsubQs8:
+;CHECK: vhsub.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vhsubs.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vhsubQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vhsubQs16:
+;CHECK: vhsub.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vhsubs.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vhsubQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vhsubQs32:
+;CHECK: vhsub.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vhsubs.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <16 x i8> @vhsubQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vhsubQu8:
+;CHECK: vhsub.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vhsubu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vhsubQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vhsubQu16:
+;CHECK: vhsub.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vhsubu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vhsubQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vhsubQu32:
+;CHECK: vhsub.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vhsubu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vhsubs.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vhsubs.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vhsubs.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vhsubu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vhsubu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vhsubu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vhsubs.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vhsubs.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vhsubs.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vhsubu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vhsubu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vhsubu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vicmp.ll b/test/CodeGen/ARM/vicmp.ll
new file mode 100644
index 0000000..2d8cb89
--- /dev/null
+++ b/test/CodeGen/ARM/vicmp.ll
@@ -0,0 +1,113 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+; This tests icmp operations that do not map directly to NEON instructions.
+; Not-equal (ne) operations are implemented by VCEQ/VMVN. Less-than (lt/ult)
+; and less-than-or-equal (le/ule) are implemented by swapping the arguments
+; to VCGT and VCGE. Test all the operand types for not-equal but only sample
+; the other operations.
+
+define <8 x i8> @vcnei8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vcnei8:
+;CHECK: vceq.i8
+;CHECK-NEXT: vmvn
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = icmp ne <8 x i8> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vcnei16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vcnei16:
+;CHECK: vceq.i16
+;CHECK-NEXT: vmvn
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = icmp ne <4 x i16> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vcnei32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vcnei32:
+;CHECK: vceq.i32
+;CHECK-NEXT: vmvn
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = icmp ne <2 x i32> %tmp1, %tmp2
+ %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
+ ret <2 x i32> %tmp4
+}
+
+define <16 x i8> @vcneQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vcneQi8:
+;CHECK: vceq.i8
+;CHECK-NEXT: vmvn
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = icmp ne <16 x i8> %tmp1, %tmp2
+ %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vcneQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vcneQi16:
+;CHECK: vceq.i16
+;CHECK-NEXT: vmvn
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = icmp ne <8 x i16> %tmp1, %tmp2
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vcneQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vcneQi32:
+;CHECK: vceq.i32
+;CHECK-NEXT: vmvn
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = icmp ne <4 x i32> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
+
+define <16 x i8> @vcltQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vcltQs8:
+;CHECK: vcgt.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = icmp slt <16 x i8> %tmp1, %tmp2
+ %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
+ ret <16 x i8> %tmp4
+}
+
+define <4 x i16> @vcles16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vcles16:
+;CHECK: vcge.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = icmp sle <4 x i16> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
+ ret <4 x i16> %tmp4
+}
+
+define <4 x i16> @vcltu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vcltu16:
+;CHECK: vcgt.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = icmp ult <4 x i16> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
+ ret <4 x i16> %tmp4
+}
+
+define <4 x i32> @vcleQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vcleQu32:
+;CHECK: vcge.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = icmp ule <4 x i32> %tmp1, %tmp2
+ %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
+ ret <4 x i32> %tmp4
+}
diff --git a/test/CodeGen/ARM/vld1.ll b/test/CodeGen/ARM/vld1.ll
new file mode 100644
index 0000000..f5383aa
--- /dev/null
+++ b/test/CodeGen/ARM/vld1.ll
@@ -0,0 +1,83 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vld1i8(i8* %A) nounwind {
+;CHECK: vld1i8:
+;CHECK: vld1.8
+ %tmp1 = call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %A)
+ ret <8 x i8> %tmp1
+}
+
+define <4 x i16> @vld1i16(i16* %A) nounwind {
+;CHECK: vld1i16:
+;CHECK: vld1.16
+ %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i16* %A)
+ ret <4 x i16> %tmp1
+}
+
+define <2 x i32> @vld1i32(i32* %A) nounwind {
+;CHECK: vld1i32:
+;CHECK: vld1.32
+ %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i32* %A)
+ ret <2 x i32> %tmp1
+}
+
+define <2 x float> @vld1f(float* %A) nounwind {
+;CHECK: vld1f:
+;CHECK: vld1.32
+ %tmp1 = call <2 x float> @llvm.arm.neon.vld1.v2f32(float* %A)
+ ret <2 x float> %tmp1
+}
+
+define <1 x i64> @vld1i64(i64* %A) nounwind {
+;CHECK: vld1i64:
+;CHECK: vld1.64
+ %tmp1 = call <1 x i64> @llvm.arm.neon.vld1.v1i64(i64* %A)
+ ret <1 x i64> %tmp1
+}
+
+define <16 x i8> @vld1Qi8(i8* %A) nounwind {
+;CHECK: vld1Qi8:
+;CHECK: vld1.8
+ %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A)
+ ret <16 x i8> %tmp1
+}
+
+define <8 x i16> @vld1Qi16(i16* %A) nounwind {
+;CHECK: vld1Qi16:
+;CHECK: vld1.16
+ %tmp1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i16* %A)
+ ret <8 x i16> %tmp1
+}
+
+define <4 x i32> @vld1Qi32(i32* %A) nounwind {
+;CHECK: vld1Qi32:
+;CHECK: vld1.32
+ %tmp1 = call <4 x i32> @llvm.arm.neon.vld1.v4i32(i32* %A)
+ ret <4 x i32> %tmp1
+}
+
+define <4 x float> @vld1Qf(float* %A) nounwind {
+;CHECK: vld1Qf:
+;CHECK: vld1.32
+ %tmp1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(float* %A)
+ ret <4 x float> %tmp1
+}
+
+define <2 x i64> @vld1Qi64(i64* %A) nounwind {
+;CHECK: vld1Qi64:
+;CHECK: vld1.64
+ %tmp1 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i64* %A)
+ ret <2 x i64> %tmp1
+}
+
+declare <8 x i8> @llvm.arm.neon.vld1.v8i8(i8*) nounwind readonly
+declare <4 x i16> @llvm.arm.neon.vld1.v4i16(i8*) nounwind readonly
+declare <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*) nounwind readonly
+declare <2 x float> @llvm.arm.neon.vld1.v2f32(i8*) nounwind readonly
+declare <1 x i64> @llvm.arm.neon.vld1.v1i64(i8*) nounwind readonly
+
+declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8*) nounwind readonly
+declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*) nounwind readonly
+declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*) nounwind readonly
+declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
+declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*) nounwind readonly
diff --git a/test/CodeGen/ARM/vld2.ll b/test/CodeGen/ARM/vld2.ll
new file mode 100644
index 0000000..23f7d2c
--- /dev/null
+++ b/test/CodeGen/ARM/vld2.ll
@@ -0,0 +1,113 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+%struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
+%struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> }
+%struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> }
+%struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> }
+%struct.__neon_int64x1x2_t = type { <1 x i64>, <1 x i64> }
+
+%struct.__neon_int8x16x2_t = type { <16 x i8>, <16 x i8> }
+%struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
+%struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> }
+%struct.__neon_float32x4x2_t = type { <4 x float>, <4 x float> }
+
+define <8 x i8> @vld2i8(i8* %A) nounwind {
+;CHECK: vld2i8:
+;CHECK: vld2.8
+ %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A)
+ %tmp2 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 1
+ %tmp4 = add <8 x i8> %tmp2, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vld2i16(i16* %A) nounwind {
+;CHECK: vld2i16:
+;CHECK: vld2.16
+ %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i16* %A)
+ %tmp2 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 1
+ %tmp4 = add <4 x i16> %tmp2, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vld2i32(i32* %A) nounwind {
+;CHECK: vld2i32:
+;CHECK: vld2.32
+ %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i32* %A)
+ %tmp2 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 1
+ %tmp4 = add <2 x i32> %tmp2, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <2 x float> @vld2f(float* %A) nounwind {
+;CHECK: vld2f:
+;CHECK: vld2.32
+ %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(float* %A)
+ %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1
+ %tmp4 = add <2 x float> %tmp2, %tmp3
+ ret <2 x float> %tmp4
+}
+
+define <1 x i64> @vld2i64(i64* %A) nounwind {
+;CHECK: vld2i64:
+;CHECK: vld1.64
+ %tmp1 = call %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i64* %A)
+ %tmp2 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 1
+ %tmp4 = add <1 x i64> %tmp2, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <16 x i8> @vld2Qi8(i8* %A) nounwind {
+;CHECK: vld2Qi8:
+;CHECK: vld2.8
+ %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A)
+ %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1
+ %tmp4 = add <16 x i8> %tmp2, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vld2Qi16(i16* %A) nounwind {
+;CHECK: vld2Qi16:
+;CHECK: vld2.16
+ %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i16* %A)
+ %tmp2 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 1
+ %tmp4 = add <8 x i16> %tmp2, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vld2Qi32(i32* %A) nounwind {
+;CHECK: vld2Qi32:
+;CHECK: vld2.32
+ %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i32* %A)
+ %tmp2 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 1
+ %tmp4 = add <4 x i32> %tmp2, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <4 x float> @vld2Qf(float* %A) nounwind {
+;CHECK: vld2Qf:
+;CHECK: vld2.32
+ %tmp1 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(float* %A)
+ %tmp2 = extractvalue %struct.__neon_float32x4x2_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp1, 1
+ %tmp4 = add <4 x float> %tmp2, %tmp3
+ ret <4 x float> %tmp4
+}
+
+declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8*) nounwind readonly
+declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8*) nounwind readonly
+declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8*) nounwind readonly
+declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8*) nounwind readonly
+declare %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i8*) nounwind readonly
+
+declare %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8*) nounwind readonly
+declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8*) nounwind readonly
+declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8*) nounwind readonly
+declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(i8*) nounwind readonly
diff --git a/test/CodeGen/ARM/vld3.ll b/test/CodeGen/ARM/vld3.ll
new file mode 100644
index 0000000..207dc6a2
--- /dev/null
+++ b/test/CodeGen/ARM/vld3.ll
@@ -0,0 +1,117 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
+%struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
+%struct.__neon_int32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> }
+%struct.__neon_float32x2x3_t = type { <2 x float>, <2 x float>, <2 x float> }
+%struct.__neon_int64x1x3_t = type { <1 x i64>, <1 x i64>, <1 x i64> }
+
+%struct.__neon_int8x16x3_t = type { <16 x i8>, <16 x i8>, <16 x i8> }
+%struct.__neon_int16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> }
+%struct.__neon_int32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> }
+%struct.__neon_float32x4x3_t = type { <4 x float>, <4 x float>, <4 x float> }
+
+define <8 x i8> @vld3i8(i8* %A) nounwind {
+;CHECK: vld3i8:
+;CHECK: vld3.8
+ %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A)
+ %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 2
+ %tmp4 = add <8 x i8> %tmp2, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vld3i16(i16* %A) nounwind {
+;CHECK: vld3i16:
+;CHECK: vld3.16
+ %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i16* %A)
+ %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2
+ %tmp4 = add <4 x i16> %tmp2, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vld3i32(i32* %A) nounwind {
+;CHECK: vld3i32:
+;CHECK: vld3.32
+ %tmp1 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i32* %A)
+ %tmp2 = extractvalue %struct.__neon_int32x2x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp1, 2
+ %tmp4 = add <2 x i32> %tmp2, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <2 x float> @vld3f(float* %A) nounwind {
+;CHECK: vld3f:
+;CHECK: vld3.32
+ %tmp1 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32(float* %A)
+ %tmp2 = extractvalue %struct.__neon_float32x2x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_float32x2x3_t %tmp1, 2
+ %tmp4 = add <2 x float> %tmp2, %tmp3
+ ret <2 x float> %tmp4
+}
+
+define <1 x i64> @vld3i64(i64* %A) nounwind {
+;CHECK: vld3i64:
+;CHECK: vld1.64
+ %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i64* %A)
+ %tmp2 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 2
+ %tmp4 = add <1 x i64> %tmp2, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <16 x i8> @vld3Qi8(i8* %A) nounwind {
+;CHECK: vld3Qi8:
+;CHECK: vld3.8
+;CHECK: vld3.8
+ %tmp1 = call %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8* %A)
+ %tmp2 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 2
+ %tmp4 = add <16 x i8> %tmp2, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vld3Qi16(i16* %A) nounwind {
+;CHECK: vld3Qi16:
+;CHECK: vld3.16
+;CHECK: vld3.16
+ %tmp1 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16(i16* %A)
+ %tmp2 = extractvalue %struct.__neon_int16x8x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp1, 2
+ %tmp4 = add <8 x i16> %tmp2, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vld3Qi32(i32* %A) nounwind {
+;CHECK: vld3Qi32:
+;CHECK: vld3.32
+;CHECK: vld3.32
+ %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i32* %A)
+ %tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 2
+ %tmp4 = add <4 x i32> %tmp2, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <4 x float> @vld3Qf(float* %A) nounwind {
+;CHECK: vld3Qf:
+;CHECK: vld3.32
+;CHECK: vld3.32
+ %tmp1 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32(float* %A)
+ %tmp2 = extractvalue %struct.__neon_float32x4x3_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_float32x4x3_t %tmp1, 2
+ %tmp4 = add <4 x float> %tmp2, %tmp3
+ ret <4 x float> %tmp4
+}
+
+declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8*) nounwind readonly
+declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8*) nounwind readonly
+declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i8*) nounwind readonly
+declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32(i8*) nounwind readonly
+declare %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8*) nounwind readonly
+
+declare %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8*) nounwind readonly
+declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16(i8*) nounwind readonly
+declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8*) nounwind readonly
+declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32(i8*) nounwind readonly
diff --git a/test/CodeGen/ARM/vld4.ll b/test/CodeGen/ARM/vld4.ll
new file mode 100644
index 0000000..0624f29
--- /dev/null
+++ b/test/CodeGen/ARM/vld4.ll
@@ -0,0 +1,117 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+%struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
+%struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
+%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
+%struct.__neon_float32x2x4_t = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> }
+%struct.__neon_int64x1x4_t = type { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }
+
+%struct.__neon_int8x16x4_t = type { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }
+%struct.__neon_int16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
+%struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
+%struct.__neon_float32x4x4_t = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
+
+define <8 x i8> @vld4i8(i8* %A) nounwind {
+;CHECK: vld4i8:
+;CHECK: vld4.8
+ %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A)
+ %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2
+ %tmp4 = add <8 x i8> %tmp2, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vld4i16(i16* %A) nounwind {
+;CHECK: vld4i16:
+;CHECK: vld4.16
+ %tmp1 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i16* %A)
+ %tmp2 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 2
+ %tmp4 = add <4 x i16> %tmp2, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vld4i32(i32* %A) nounwind {
+;CHECK: vld4i32:
+;CHECK: vld4.32
+ %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i32* %A)
+ %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2
+ %tmp4 = add <2 x i32> %tmp2, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <2 x float> @vld4f(float* %A) nounwind {
+;CHECK: vld4f:
+;CHECK: vld4.32
+ %tmp1 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(float* %A)
+ %tmp2 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 2
+ %tmp4 = add <2 x float> %tmp2, %tmp3
+ ret <2 x float> %tmp4
+}
+
+define <1 x i64> @vld4i64(i64* %A) nounwind {
+;CHECK: vld4i64:
+;CHECK: vld1.64
+ %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i64* %A)
+ %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2
+ %tmp4 = add <1 x i64> %tmp2, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <16 x i8> @vld4Qi8(i8* %A) nounwind {
+;CHECK: vld4Qi8:
+;CHECK: vld4.8
+;CHECK: vld4.8
+ %tmp1 = call %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8* %A)
+ %tmp2 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 2
+ %tmp4 = add <16 x i8> %tmp2, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vld4Qi16(i16* %A) nounwind {
+;CHECK: vld4Qi16:
+;CHECK: vld4.16
+;CHECK: vld4.16
+ %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i16* %A)
+ %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2
+ %tmp4 = add <8 x i16> %tmp2, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vld4Qi32(i32* %A) nounwind {
+;CHECK: vld4Qi32:
+;CHECK: vld4.32
+;CHECK: vld4.32
+ %tmp1 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i32* %A)
+ %tmp2 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 2
+ %tmp4 = add <4 x i32> %tmp2, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <4 x float> @vld4Qf(float* %A) nounwind {
+;CHECK: vld4Qf:
+;CHECK: vld4.32
+;CHECK: vld4.32
+ %tmp1 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(float* %A)
+ %tmp2 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 0
+ %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 2
+ %tmp4 = add <4 x float> %tmp2, %tmp3
+ ret <4 x float> %tmp4
+}
+
+declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8*) nounwind readonly
+declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8*) nounwind readonly
+declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8*) nounwind readonly
+declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8*) nounwind readonly
+declare %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8*) nounwind readonly
+
+declare %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8*) nounwind readonly
+declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8*) nounwind readonly
+declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8*) nounwind readonly
+declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8*) nounwind readonly
diff --git a/test/CodeGen/ARM/vldlane.ll b/test/CodeGen/ARM/vldlane.ll
new file mode 100644
index 0000000..53881a3
--- /dev/null
+++ b/test/CodeGen/ARM/vldlane.ll
@@ -0,0 +1,328 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+%struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
+%struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> }
+%struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> }
+%struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> }
+
+%struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
+%struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> }
+%struct.__neon_float32x4x2_t = type { <4 x float>, <4 x float> }
+
+define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vld2lanei8:
+;CHECK: vld2.8
+ %tmp1 = load <8 x i8>* %B
+ %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
+ %tmp5 = add <8 x i8> %tmp3, %tmp4
+ ret <8 x i8> %tmp5
+}
+
+define <4 x i16> @vld2lanei16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vld2lanei16:
+;CHECK: vld2.16
+ %tmp1 = load <4 x i16>* %B
+ %tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 1
+ %tmp5 = add <4 x i16> %tmp3, %tmp4
+ ret <4 x i16> %tmp5
+}
+
+define <2 x i32> @vld2lanei32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vld2lanei32:
+;CHECK: vld2.32
+ %tmp1 = load <2 x i32>* %B
+ %tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 1
+ %tmp5 = add <2 x i32> %tmp3, %tmp4
+ ret <2 x i32> %tmp5
+}
+
+define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vld2lanef:
+;CHECK: vld2.32
+ %tmp1 = load <2 x float>* %B
+ %tmp2 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 1
+ %tmp5 = add <2 x float> %tmp3, %tmp4
+ ret <2 x float> %tmp5
+}
+
+define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vld2laneQi16:
+;CHECK: vld2.16
+ %tmp1 = load <8 x i16>* %B
+ %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1
+ %tmp5 = add <8 x i16> %tmp3, %tmp4
+ ret <8 x i16> %tmp5
+}
+
+define <4 x i32> @vld2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vld2laneQi32:
+;CHECK: vld2.32
+ %tmp1 = load <4 x i32>* %B
+ %tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2)
+ %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 1
+ %tmp5 = add <4 x i32> %tmp3, %tmp4
+ ret <4 x i32> %tmp5
+}
+
+define <4 x float> @vld2laneQf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vld2laneQf:
+;CHECK: vld2.32
+ %tmp1 = load <4 x float>* %B
+ %tmp2 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 1
+ %tmp5 = add <4 x float> %tmp3, %tmp4
+ ret <4 x float> %tmp5
+}
+
+declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind readonly
+declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32) nounwind readonly
+declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind readonly
+declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8*, <2 x float>, <2 x float>, i32) nounwind readonly
+
+declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32) nounwind readonly
+declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind readonly
+declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind readonly
+
+%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
+%struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
+%struct.__neon_int32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> }
+%struct.__neon_float32x2x3_t = type { <2 x float>, <2 x float>, <2 x float> }
+
+%struct.__neon_int16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> }
+%struct.__neon_int32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> }
+%struct.__neon_float32x4x3_t = type { <4 x float>, <4 x float>, <4 x float> }
+
+define <8 x i8> @vld3lanei8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vld3lanei8:
+;CHECK: vld3.8
+ %tmp1 = load <8 x i8>* %B
+ %tmp2 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
+ %tmp6 = add <8 x i8> %tmp3, %tmp4
+ %tmp7 = add <8 x i8> %tmp5, %tmp6
+ ret <8 x i8> %tmp7
+}
+
+define <4 x i16> @vld3lanei16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vld3lanei16:
+;CHECK: vld3.16
+ %tmp1 = load <4 x i16>* %B
+ %tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 2
+ %tmp6 = add <4 x i16> %tmp3, %tmp4
+ %tmp7 = add <4 x i16> %tmp5, %tmp6
+ ret <4 x i16> %tmp7
+}
+
+define <2 x i32> @vld3lanei32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vld3lanei32:
+;CHECK: vld3.32
+ %tmp1 = load <2 x i32>* %B
+ %tmp2 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 2
+ %tmp6 = add <2 x i32> %tmp3, %tmp4
+ %tmp7 = add <2 x i32> %tmp5, %tmp6
+ ret <2 x i32> %tmp7
+}
+
+define <2 x float> @vld3lanef(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vld3lanef:
+;CHECK: vld3.32
+ %tmp1 = load <2 x float>* %B
+ %tmp2 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 2
+ %tmp6 = add <2 x float> %tmp3, %tmp4
+ %tmp7 = add <2 x float> %tmp5, %tmp6
+ ret <2 x float> %tmp7
+}
+
+define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vld3laneQi16:
+;CHECK: vld3.16
+ %tmp1 = load <8 x i16>* %B
+ %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2
+ %tmp6 = add <8 x i16> %tmp3, %tmp4
+ %tmp7 = add <8 x i16> %tmp5, %tmp6
+ ret <8 x i16> %tmp7
+}
+
+define <4 x i32> @vld3laneQi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vld3laneQi32:
+;CHECK: vld3.32
+ %tmp1 = load <4 x i32>* %B
+ %tmp2 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 3)
+ %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 2
+ %tmp6 = add <4 x i32> %tmp3, %tmp4
+ %tmp7 = add <4 x i32> %tmp5, %tmp6
+ ret <4 x i32> %tmp7
+}
+
+define <4 x float> @vld3laneQf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vld3laneQf:
+;CHECK: vld3.32
+ %tmp1 = load <4 x float>* %B
+ %tmp2 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 2
+ %tmp6 = add <4 x float> %tmp3, %tmp4
+ %tmp7 = add <4 x float> %tmp5, %tmp6
+ ret <4 x float> %tmp7
+}
+
+declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind readonly
+declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind readonly
+declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind readonly
+declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32) nounwind readonly
+
+declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind readonly
+declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind readonly
+declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32) nounwind readonly
+
+%struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
+%struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
+%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
+%struct.__neon_float32x2x4_t = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> }
+
+%struct.__neon_int16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
+%struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
+%struct.__neon_float32x4x4_t = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
+
+define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vld4lanei8:
+;CHECK: vld4.8
+ %tmp1 = load <8 x i8>* %B
+ %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
+ %tmp7 = add <8 x i8> %tmp3, %tmp4
+ %tmp8 = add <8 x i8> %tmp5, %tmp6
+ %tmp9 = add <8 x i8> %tmp7, %tmp8
+ ret <8 x i8> %tmp9
+}
+
+define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vld4lanei16:
+;CHECK: vld4.16
+ %tmp1 = load <4 x i16>* %B
+ %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 3
+ %tmp7 = add <4 x i16> %tmp3, %tmp4
+ %tmp8 = add <4 x i16> %tmp5, %tmp6
+ %tmp9 = add <4 x i16> %tmp7, %tmp8
+ ret <4 x i16> %tmp9
+}
+
+define <2 x i32> @vld4lanei32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vld4lanei32:
+;CHECK: vld4.32
+ %tmp1 = load <2 x i32>* %B
+ %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 3
+ %tmp7 = add <2 x i32> %tmp3, %tmp4
+ %tmp8 = add <2 x i32> %tmp5, %tmp6
+ %tmp9 = add <2 x i32> %tmp7, %tmp8
+ ret <2 x i32> %tmp9
+}
+
+define <2 x float> @vld4lanef(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vld4lanef:
+;CHECK: vld4.32
+ %tmp1 = load <2 x float>* %B
+ %tmp2 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 3
+ %tmp7 = add <2 x float> %tmp3, %tmp4
+ %tmp8 = add <2 x float> %tmp5, %tmp6
+ %tmp9 = add <2 x float> %tmp7, %tmp8
+ ret <2 x float> %tmp9
+}
+
+define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vld4laneQi16:
+;CHECK: vld4.16
+ %tmp1 = load <8 x i16>* %B
+ %tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 3
+ %tmp7 = add <8 x i16> %tmp3, %tmp4
+ %tmp8 = add <8 x i16> %tmp5, %tmp6
+ %tmp9 = add <8 x i16> %tmp7, %tmp8
+ ret <8 x i16> %tmp9
+}
+
+define <4 x i32> @vld4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vld4laneQi32:
+;CHECK: vld4.32
+ %tmp1 = load <4 x i32>* %B
+ %tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 3
+ %tmp7 = add <4 x i32> %tmp3, %tmp4
+ %tmp8 = add <4 x i32> %tmp5, %tmp6
+ %tmp9 = add <4 x i32> %tmp7, %tmp8
+ ret <4 x i32> %tmp9
+}
+
+define <4 x float> @vld4laneQf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vld4laneQf:
+;CHECK: vld4.32
+ %tmp1 = load <4 x float>* %B
+ %tmp2 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
+ %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 3
+ %tmp7 = add <4 x float> %tmp3, %tmp4
+ %tmp8 = add <4 x float> %tmp5, %tmp6
+ %tmp9 = add <4 x float> %tmp7, %tmp8
+ ret <4 x float> %tmp9
+}
+
+declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind readonly
+declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind readonly
+declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind readonly
+declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32) nounwind readonly
+
+declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind readonly
+declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind readonly
+declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32) nounwind readonly
diff --git a/test/CodeGen/ARM/vminmax.ll b/test/CodeGen/ARM/vminmax.ll
new file mode 100644
index 0000000..e3527c1
--- /dev/null
+++ b/test/CodeGen/ARM/vminmax.ll
@@ -0,0 +1,293 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vmins8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vmins8:
+;CHECK: vmin.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vmins.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vmins16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vmins16:
+;CHECK: vmin.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vmins.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vmins32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vmins32:
+;CHECK: vmin.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vmins.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i8> @vminu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vminu8:
+;CHECK: vmin.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vminu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vminu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vminu16:
+;CHECK: vmin.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vminu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vminu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vminu32:
+;CHECK: vmin.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vminu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <2 x float> @vminf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vminf32:
+;CHECK: vmin.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x float> @llvm.arm.neon.vmins.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x float> %tmp3
+}
+
+define <16 x i8> @vminQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vminQs8:
+;CHECK: vmin.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vmins.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vminQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vminQs16:
+;CHECK: vmin.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vmins.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vminQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vminQs32:
+;CHECK: vmin.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vmins.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <16 x i8> @vminQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vminQu8:
+;CHECK: vmin.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vminu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vminQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vminQu16:
+;CHECK: vmin.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vminu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vminQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vminQu32:
+;CHECK: vmin.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vminu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <4 x float> @vminQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vminQf32:
+;CHECK: vmin.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = call <4 x float> @llvm.arm.neon.vmins.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+ ret <4 x float> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vmins.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vmins.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vmins.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vminu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vminu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vminu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <2 x float> @llvm.arm.neon.vmins.v2f32(<2 x float>, <2 x float>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vmins.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vmins.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmins.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vminu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vminu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vminu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <4 x float> @llvm.arm.neon.vmins.v4f32(<4 x float>, <4 x float>) nounwind readnone
+
+define <8 x i8> @vmaxs8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vmaxs8:
+;CHECK: vmax.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vmaxs.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vmaxs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vmaxs16:
+;CHECK: vmax.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vmaxs.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vmaxs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vmaxs32:
+;CHECK: vmax.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vmaxs.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i8> @vmaxu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vmaxu8:
+;CHECK: vmax.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vmaxu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vmaxu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vmaxu16:
+;CHECK: vmax.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vmaxu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vmaxu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vmaxu32:
+;CHECK: vmax.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vmaxu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <2 x float> @vmaxf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vmaxf32:
+;CHECK: vmax.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x float> @llvm.arm.neon.vmaxs.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x float> %tmp3
+}
+
+define <16 x i8> @vmaxQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vmaxQs8:
+;CHECK: vmax.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vmaxs.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vmaxQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vmaxQs16:
+;CHECK: vmax.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vmaxs.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vmaxQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vmaxQs32:
+;CHECK: vmax.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vmaxs.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <16 x i8> @vmaxQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vmaxQu8:
+;CHECK: vmax.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vmaxu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vmaxQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vmaxQu16:
+;CHECK: vmax.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vmaxu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vmaxQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vmaxQu32:
+;CHECK: vmax.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vmaxu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <4 x float> @vmaxQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vmaxQf32:
+;CHECK: vmax.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = call <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+ ret <4 x float> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vmaxs.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vmaxs.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vmaxs.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vmaxu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vmaxu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vmaxu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <2 x float> @llvm.arm.neon.vmaxs.v2f32(<2 x float>, <2 x float>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vmaxs.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vmaxs.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmaxs.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vmaxu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vmaxu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmaxu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/ARM/vmla.ll b/test/CodeGen/ARM/vmla.ll
new file mode 100644
index 0000000..8405218
--- /dev/null
+++ b/test/CodeGen/ARM/vmla.ll
@@ -0,0 +1,193 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vmlai8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8> * %C) nounwind {
+;CHECK: vmlai8:
+;CHECK: vmla.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = mul <8 x i8> %tmp2, %tmp3
+ %tmp5 = add <8 x i8> %tmp1, %tmp4
+ ret <8 x i8> %tmp5
+}
+
+define <4 x i16> @vmlai16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vmlai16:
+;CHECK: vmla.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = mul <4 x i16> %tmp2, %tmp3
+ %tmp5 = add <4 x i16> %tmp1, %tmp4
+ ret <4 x i16> %tmp5
+}
+
+define <2 x i32> @vmlai32(<2 x i32>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vmlai32:
+;CHECK: vmla.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = mul <2 x i32> %tmp2, %tmp3
+ %tmp5 = add <2 x i32> %tmp1, %tmp4
+ ret <2 x i32> %tmp5
+}
+
+define <2 x float> @vmlaf32(<2 x float>* %A, <2 x float>* %B, <2 x float>* %C) nounwind {
+;CHECK: vmlaf32:
+;CHECK: vmla.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = load <2 x float>* %C
+ %tmp4 = mul <2 x float> %tmp2, %tmp3
+ %tmp5 = add <2 x float> %tmp1, %tmp4
+ ret <2 x float> %tmp5
+}
+
+define <16 x i8> @vmlaQi8(<16 x i8>* %A, <16 x i8>* %B, <16 x i8> * %C) nounwind {
+;CHECK: vmlaQi8:
+;CHECK: vmla.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = load <16 x i8>* %C
+ %tmp4 = mul <16 x i8> %tmp2, %tmp3
+ %tmp5 = add <16 x i8> %tmp1, %tmp4
+ ret <16 x i8> %tmp5
+}
+
+define <8 x i16> @vmlaQi16(<8 x i16>* %A, <8 x i16>* %B, <8 x i16>* %C) nounwind {
+;CHECK: vmlaQi16:
+;CHECK: vmla.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = load <8 x i16>* %C
+ %tmp4 = mul <8 x i16> %tmp2, %tmp3
+ %tmp5 = add <8 x i16> %tmp1, %tmp4
+ ret <8 x i16> %tmp5
+}
+
+define <4 x i32> @vmlaQi32(<4 x i32>* %A, <4 x i32>* %B, <4 x i32>* %C) nounwind {
+;CHECK: vmlaQi32:
+;CHECK: vmla.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = load <4 x i32>* %C
+ %tmp4 = mul <4 x i32> %tmp2, %tmp3
+ %tmp5 = add <4 x i32> %tmp1, %tmp4
+ ret <4 x i32> %tmp5
+}
+
+define <4 x float> @vmlaQf32(<4 x float>* %A, <4 x float>* %B, <4 x float>* %C) nounwind {
+;CHECK: vmlaQf32:
+;CHECK: vmla.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = load <4 x float>* %C
+ %tmp4 = mul <4 x float> %tmp2, %tmp3
+ %tmp5 = add <4 x float> %tmp1, %tmp4
+ ret <4 x float> %tmp5
+}
+
+define <8 x i16> @vmlals8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vmlals8:
+;CHECK: vmlal.s8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i16> @llvm.arm.neon.vmlals.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vmlals16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vmlals16:
+;CHECK: vmlal.s16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vmlals.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vmlals32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vmlals32:
+;CHECK: vmlal.s32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i64> @llvm.arm.neon.vmlals.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i64> %tmp4
+}
+
+define <8 x i16> @vmlalu8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vmlalu8:
+;CHECK: vmlal.u8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i16> @llvm.arm.neon.vmlalu.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vmlalu16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vmlalu16:
+;CHECK: vmlal.u16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vmlalu.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vmlalu32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vmlalu32:
+;CHECK: vmlal.u32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i64> @llvm.arm.neon.vmlalu.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i64> %tmp4
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmlal_lanes16(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_int16x4_t, <4 x i16> %arg2_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vmlal_lanes16
+; CHECK: vmlal.s16 q0, d2, d3[1]
+ %0 = shufflevector <4 x i16> %arg2_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vmlals.v4i32(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_int16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vmlal_lanes32(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_int32x2_t, <2 x i32> %arg2_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmlal_lanes32
+; CHECK: vmlal.s32 q0, d2, d3[1]
+ %0 = shufflevector <2 x i32> %arg2_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vmlals.v2i64(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_int32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmlal_laneu16(<4 x i32> %arg0_uint32x4_t, <4 x i16> %arg1_uint16x4_t, <4 x i16> %arg2_uint16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vmlal_laneu16
+; CHECK: vmlal.u16 q0, d2, d3[1]
+ %0 = shufflevector <4 x i16> %arg2_uint16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vmlalu.v4i32(<4 x i32> %arg0_uint32x4_t, <4 x i16> %arg1_uint16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vmlal_laneu32(<2 x i64> %arg0_uint64x2_t, <2 x i32> %arg1_uint32x2_t, <2 x i32> %arg2_uint32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmlal_laneu32
+; CHECK: vmlal.u32 q0, d2, d3[1]
+ %0 = shufflevector <2 x i32> %arg2_uint32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vmlalu.v2i64(<2 x i64> %arg0_uint64x2_t, <2 x i32> %arg1_uint32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+declare <8 x i16> @llvm.arm.neon.vmlals.v8i16(<8 x i16>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmlals.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vmlals.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vmlalu.v8i16(<8 x i16>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmlalu.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vmlalu.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vmls.ll b/test/CodeGen/ARM/vmls.ll
new file mode 100644
index 0000000..c89552e
--- /dev/null
+++ b/test/CodeGen/ARM/vmls.ll
@@ -0,0 +1,193 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vmlsi8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8> * %C) nounwind {
+;CHECK: vmlsi8:
+;CHECK: vmls.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = mul <8 x i8> %tmp2, %tmp3
+ %tmp5 = sub <8 x i8> %tmp1, %tmp4
+ ret <8 x i8> %tmp5
+}
+
+define <4 x i16> @vmlsi16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vmlsi16:
+;CHECK: vmls.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = mul <4 x i16> %tmp2, %tmp3
+ %tmp5 = sub <4 x i16> %tmp1, %tmp4
+ ret <4 x i16> %tmp5
+}
+
+define <2 x i32> @vmlsi32(<2 x i32>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vmlsi32:
+;CHECK: vmls.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = mul <2 x i32> %tmp2, %tmp3
+ %tmp5 = sub <2 x i32> %tmp1, %tmp4
+ ret <2 x i32> %tmp5
+}
+
+define <2 x float> @vmlsf32(<2 x float>* %A, <2 x float>* %B, <2 x float>* %C) nounwind {
+;CHECK: vmlsf32:
+;CHECK: vmls.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = load <2 x float>* %C
+ %tmp4 = mul <2 x float> %tmp2, %tmp3
+ %tmp5 = sub <2 x float> %tmp1, %tmp4
+ ret <2 x float> %tmp5
+}
+
+define <16 x i8> @vmlsQi8(<16 x i8>* %A, <16 x i8>* %B, <16 x i8> * %C) nounwind {
+;CHECK: vmlsQi8:
+;CHECK: vmls.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = load <16 x i8>* %C
+ %tmp4 = mul <16 x i8> %tmp2, %tmp3
+ %tmp5 = sub <16 x i8> %tmp1, %tmp4
+ ret <16 x i8> %tmp5
+}
+
+define <8 x i16> @vmlsQi16(<8 x i16>* %A, <8 x i16>* %B, <8 x i16>* %C) nounwind {
+;CHECK: vmlsQi16:
+;CHECK: vmls.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = load <8 x i16>* %C
+ %tmp4 = mul <8 x i16> %tmp2, %tmp3
+ %tmp5 = sub <8 x i16> %tmp1, %tmp4
+ ret <8 x i16> %tmp5
+}
+
+define <4 x i32> @vmlsQi32(<4 x i32>* %A, <4 x i32>* %B, <4 x i32>* %C) nounwind {
+;CHECK: vmlsQi32:
+;CHECK: vmls.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = load <4 x i32>* %C
+ %tmp4 = mul <4 x i32> %tmp2, %tmp3
+ %tmp5 = sub <4 x i32> %tmp1, %tmp4
+ ret <4 x i32> %tmp5
+}
+
+define <4 x float> @vmlsQf32(<4 x float>* %A, <4 x float>* %B, <4 x float>* %C) nounwind {
+;CHECK: vmlsQf32:
+;CHECK: vmls.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = load <4 x float>* %C
+ %tmp4 = mul <4 x float> %tmp2, %tmp3
+ %tmp5 = sub <4 x float> %tmp1, %tmp4
+ ret <4 x float> %tmp5
+}
+
+define <8 x i16> @vmlsls8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vmlsls8:
+;CHECK: vmlsl.s8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i16> @llvm.arm.neon.vmlsls.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vmlsls16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vmlsls16:
+;CHECK: vmlsl.s16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vmlsls.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vmlsls32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vmlsls32:
+;CHECK: vmlsl.s32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i64> @llvm.arm.neon.vmlsls.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i64> %tmp4
+}
+
+define <8 x i16> @vmlslu8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vmlslu8:
+;CHECK: vmlsl.u8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i16> @llvm.arm.neon.vmlslu.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vmlslu16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vmlslu16:
+;CHECK: vmlsl.u16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vmlslu.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vmlslu32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vmlslu32:
+;CHECK: vmlsl.u32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i64> @llvm.arm.neon.vmlslu.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i64> %tmp4
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmlsl_lanes16(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_int16x4_t, <4 x i16> %arg2_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vmlsl_lanes16
+; CHECK: vmlsl.s16 q0, d2, d3[1]
+ %0 = shufflevector <4 x i16> %arg2_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vmlsls.v4i32(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_int16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vmlsl_lanes32(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_int32x2_t, <2 x i32> %arg2_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmlsl_lanes32
+; CHECK: vmlsl.s32 q0, d2, d3[1]
+ %0 = shufflevector <2 x i32> %arg2_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vmlsls.v2i64(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_int32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmlsl_laneu16(<4 x i32> %arg0_uint32x4_t, <4 x i16> %arg1_uint16x4_t, <4 x i16> %arg2_uint16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vmlsl_laneu16
+; CHECK: vmlsl.u16 q0, d2, d3[1]
+ %0 = shufflevector <4 x i16> %arg2_uint16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vmlslu.v4i32(<4 x i32> %arg0_uint32x4_t, <4 x i16> %arg1_uint16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vmlsl_laneu32(<2 x i64> %arg0_uint64x2_t, <2 x i32> %arg1_uint32x2_t, <2 x i32> %arg2_uint32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmlsl_laneu32
+; CHECK: vmlsl.u32 q0, d2, d3[1]
+ %0 = shufflevector <2 x i32> %arg2_uint32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vmlslu.v2i64(<2 x i64> %arg0_uint64x2_t, <2 x i32> %arg1_uint32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+declare <8 x i16> @llvm.arm.neon.vmlsls.v8i16(<8 x i16>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmlsls.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vmlsls.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vmlslu.v8i16(<8 x i16>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmlslu.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vmlslu.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vmov.ll b/test/CodeGen/ARM/vmov.ll
new file mode 100644
index 0000000..e4368d6
--- /dev/null
+++ b/test/CodeGen/ARM/vmov.ll
@@ -0,0 +1,323 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @v_movi8() nounwind {
+;CHECK: v_movi8:
+;CHECK: vmov.i8
+ ret <8 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+}
+
+define <4 x i16> @v_movi16a() nounwind {
+;CHECK: v_movi16a:
+;CHECK: vmov.i16
+ ret <4 x i16> < i16 16, i16 16, i16 16, i16 16 >
+}
+
+; 0x1000 = 4096
+define <4 x i16> @v_movi16b() nounwind {
+;CHECK: v_movi16b:
+;CHECK: vmov.i16
+ ret <4 x i16> < i16 4096, i16 4096, i16 4096, i16 4096 >
+}
+
+define <2 x i32> @v_movi32a() nounwind {
+;CHECK: v_movi32a:
+;CHECK: vmov.i32
+ ret <2 x i32> < i32 32, i32 32 >
+}
+
+; 0x2000 = 8192
+define <2 x i32> @v_movi32b() nounwind {
+;CHECK: v_movi32b:
+;CHECK: vmov.i32
+ ret <2 x i32> < i32 8192, i32 8192 >
+}
+
+; 0x200000 = 2097152
+define <2 x i32> @v_movi32c() nounwind {
+;CHECK: v_movi32c:
+;CHECK: vmov.i32
+ ret <2 x i32> < i32 2097152, i32 2097152 >
+}
+
+; 0x20000000 = 536870912
+define <2 x i32> @v_movi32d() nounwind {
+;CHECK: v_movi32d:
+;CHECK: vmov.i32
+ ret <2 x i32> < i32 536870912, i32 536870912 >
+}
+
+; 0x20ff = 8447
+define <2 x i32> @v_movi32e() nounwind {
+;CHECK: v_movi32e:
+;CHECK: vmov.i32
+ ret <2 x i32> < i32 8447, i32 8447 >
+}
+
+; 0x20ffff = 2162687
+define <2 x i32> @v_movi32f() nounwind {
+;CHECK: v_movi32f:
+;CHECK: vmov.i32
+ ret <2 x i32> < i32 2162687, i32 2162687 >
+}
+
+; 0xff0000ff0000ffff = 18374687574888349695
+define <1 x i64> @v_movi64() nounwind {
+;CHECK: v_movi64:
+;CHECK: vmov.i64
+ ret <1 x i64> < i64 18374687574888349695 >
+}
+
+define <16 x i8> @v_movQi8() nounwind {
+;CHECK: v_movQi8:
+;CHECK: vmov.i8
+ ret <16 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+}
+
+define <8 x i16> @v_movQi16a() nounwind {
+;CHECK: v_movQi16a:
+;CHECK: vmov.i16
+ ret <8 x i16> < i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16 >
+}
+
+; 0x1000 = 4096
+define <8 x i16> @v_movQi16b() nounwind {
+;CHECK: v_movQi16b:
+;CHECK: vmov.i16
+ ret <8 x i16> < i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096 >
+}
+
+define <4 x i32> @v_movQi32a() nounwind {
+;CHECK: v_movQi32a:
+;CHECK: vmov.i32
+ ret <4 x i32> < i32 32, i32 32, i32 32, i32 32 >
+}
+
+; 0x2000 = 8192
+define <4 x i32> @v_movQi32b() nounwind {
+;CHECK: v_movQi32b:
+;CHECK: vmov.i32
+ ret <4 x i32> < i32 8192, i32 8192, i32 8192, i32 8192 >
+}
+
+; 0x200000 = 2097152
+define <4 x i32> @v_movQi32c() nounwind {
+;CHECK: v_movQi32c:
+;CHECK: vmov.i32
+ ret <4 x i32> < i32 2097152, i32 2097152, i32 2097152, i32 2097152 >
+}
+
+; 0x20000000 = 536870912
+define <4 x i32> @v_movQi32d() nounwind {
+;CHECK: v_movQi32d:
+;CHECK: vmov.i32
+ ret <4 x i32> < i32 536870912, i32 536870912, i32 536870912, i32 536870912 >
+}
+
+; 0x20ff = 8447
+define <4 x i32> @v_movQi32e() nounwind {
+;CHECK: v_movQi32e:
+;CHECK: vmov.i32
+ ret <4 x i32> < i32 8447, i32 8447, i32 8447, i32 8447 >
+}
+
+; 0x20ffff = 2162687
+define <4 x i32> @v_movQi32f() nounwind {
+;CHECK: v_movQi32f:
+;CHECK: vmov.i32
+ ret <4 x i32> < i32 2162687, i32 2162687, i32 2162687, i32 2162687 >
+}
+
+; 0xff0000ff0000ffff = 18374687574888349695
+define <2 x i64> @v_movQi64() nounwind {
+;CHECK: v_movQi64:
+;CHECK: vmov.i64
+ ret <2 x i64> < i64 18374687574888349695, i64 18374687574888349695 >
+}
+
+; Check for correct assembler printing for immediate values.
+%struct.int8x8_t = type { <8 x i8> }
+define arm_apcscc void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
+entry:
+;CHECK: vdupn128:
+;CHECK: vmov.i8 d0, #0x80
+ %0 = getelementptr inbounds %struct.int8x8_t* %agg.result, i32 0, i32 0 ; <<8 x i8>*> [#uses=1]
+ store <8 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>, <8 x i8>* %0, align 8
+ ret void
+}
+
+define arm_apcscc void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
+entry:
+;CHECK: vdupnneg75:
+;CHECK: vmov.i8 d0, #0xB5
+ %0 = getelementptr inbounds %struct.int8x8_t* %agg.result, i32 0, i32 0 ; <<8 x i8>*> [#uses=1]
+ store <8 x i8> <i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75>, <8 x i8>* %0, align 8
+ ret void
+}
+
+define <8 x i16> @vmovls8(<8 x i8>* %A) nounwind {
+;CHECK: vmovls8:
+;CHECK: vmovl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vmovls.v8i16(<8 x i8> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vmovls16(<4 x i16>* %A) nounwind {
+;CHECK: vmovls16:
+;CHECK: vmovl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vmovls.v4i32(<4 x i16> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vmovls32(<2 x i32>* %A) nounwind {
+;CHECK: vmovls32:
+;CHECK: vmovl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vmovls.v2i64(<2 x i32> %tmp1)
+ ret <2 x i64> %tmp2
+}
+
+define <8 x i16> @vmovlu8(<8 x i8>* %A) nounwind {
+;CHECK: vmovlu8:
+;CHECK: vmovl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vmovlu.v8i16(<8 x i8> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vmovlu16(<4 x i16>* %A) nounwind {
+;CHECK: vmovlu16:
+;CHECK: vmovl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vmovlu.v4i32(<4 x i16> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vmovlu32(<2 x i32>* %A) nounwind {
+;CHECK: vmovlu32:
+;CHECK: vmovl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vmovlu.v2i64(<2 x i32> %tmp1)
+ ret <2 x i64> %tmp2
+}
+
+declare <8 x i16> @llvm.arm.neon.vmovls.v8i16(<8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmovls.v4i32(<4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vmovls.v2i64(<2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vmovlu.v8i16(<8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmovlu.v4i32(<4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vmovlu.v2i64(<2 x i32>) nounwind readnone
+
+define <8 x i8> @vmovni16(<8 x i16>* %A) nounwind {
+;CHECK: vmovni16:
+;CHECK: vmovn.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vmovn.v8i8(<8 x i16> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vmovni32(<4 x i32>* %A) nounwind {
+;CHECK: vmovni32:
+;CHECK: vmovn.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vmovn.v4i16(<4 x i32> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vmovni64(<2 x i64>* %A) nounwind {
+;CHECK: vmovni64:
+;CHECK: vmovn.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vmovn.v2i32(<2 x i64> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vmovn.v8i8(<8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vmovn.v4i16(<4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vmovn.v2i32(<2 x i64>) nounwind readnone
+
+define <8 x i8> @vqmovns16(<8 x i16>* %A) nounwind {
+;CHECK: vqmovns16:
+;CHECK: vqmovn.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqmovns.v8i8(<8 x i16> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqmovns32(<4 x i32>* %A) nounwind {
+;CHECK: vqmovns32:
+;CHECK: vqmovn.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqmovns.v4i16(<4 x i32> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqmovns64(<2 x i64>* %A) nounwind {
+;CHECK: vqmovns64:
+;CHECK: vqmovn.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqmovns.v2i32(<2 x i64> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <8 x i8> @vqmovnu16(<8 x i16>* %A) nounwind {
+;CHECK: vqmovnu16:
+;CHECK: vqmovn.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqmovnu.v8i8(<8 x i16> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqmovnu32(<4 x i32>* %A) nounwind {
+;CHECK: vqmovnu32:
+;CHECK: vqmovn.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqmovnu.v4i16(<4 x i32> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqmovnu64(<2 x i64>* %A) nounwind {
+;CHECK: vqmovnu64:
+;CHECK: vqmovn.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqmovnu.v2i32(<2 x i64> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <8 x i8> @vqmovuns16(<8 x i16>* %A) nounwind {
+;CHECK: vqmovuns16:
+;CHECK: vqmovun.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqmovnsu.v8i8(<8 x i16> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqmovuns32(<4 x i32>* %A) nounwind {
+;CHECK: vqmovuns32:
+;CHECK: vqmovun.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqmovnsu.v4i16(<4 x i32> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqmovuns64(<2 x i64>* %A) nounwind {
+;CHECK: vqmovuns64:
+;CHECK: vqmovun.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqmovnsu.v2i32(<2 x i64> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vqmovns.v8i8(<8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqmovns.v4i16(<4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqmovns.v2i32(<2 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqmovnu.v8i8(<8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqmovnu.v4i16(<4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqmovnu.v2i32(<2 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqmovnsu.v8i8(<8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqmovnsu.v4i16(<4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqmovnsu.v2i32(<2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vmul.ll b/test/CodeGen/ARM/vmul.ll
new file mode 100644
index 0000000..325da5d
--- /dev/null
+++ b/test/CodeGen/ARM/vmul.ll
@@ -0,0 +1,257 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vmuli8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vmuli8:
+;CHECK: vmul.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = mul <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vmuli16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vmuli16:
+;CHECK: vmul.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = mul <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vmuli32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vmuli32:
+;CHECK: vmul.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = mul <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <2 x float> @vmulf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vmulf32:
+;CHECK: vmul.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = mul <2 x float> %tmp1, %tmp2
+ ret <2 x float> %tmp3
+}
+
+define <8 x i8> @vmulp8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vmulp8:
+;CHECK: vmul.p8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vmulp.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <16 x i8> @vmulQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vmulQi8:
+;CHECK: vmul.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = mul <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vmulQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vmulQi16:
+;CHECK: vmul.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = mul <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vmulQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vmulQi32:
+;CHECK: vmul.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = mul <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <4 x float> @vmulQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vmulQf32:
+;CHECK: vmul.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = mul <4 x float> %tmp1, %tmp2
+ ret <4 x float> %tmp3
+}
+
+define <16 x i8> @vmulQp8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vmulQp8:
+;CHECK: vmul.p8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vmulp.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vmulp.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <16 x i8> @llvm.arm.neon.vmulp.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+
+define arm_aapcs_vfpcc <2 x float> @test_vmul_lanef32(<2 x float> %arg0_float32x2_t, <2 x float> %arg1_float32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmul_lanef32:
+; CHECK: vmul.f32 d0, d0, d1[0]
+ %0 = shufflevector <2 x float> %arg1_float32x2_t, <2 x float> undef, <2 x i32> zeroinitializer ; <<2 x float>> [#uses=1]
+ %1 = fmul <2 x float> %0, %arg0_float32x2_t ; <<2 x float>> [#uses=1]
+ ret <2 x float> %1
+}
+
+define arm_aapcs_vfpcc <4 x i16> @test_vmul_lanes16(<4 x i16> %arg0_int16x4_t, <4 x i16> %arg1_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vmul_lanes16:
+; CHECK: vmul.i16 d0, d0, d1[1]
+ %0 = shufflevector <4 x i16> %arg1_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses$
+ %1 = mul <4 x i16> %0, %arg0_int16x4_t ; <<4 x i16>> [#uses=1]
+ ret <4 x i16> %1
+}
+
+define arm_aapcs_vfpcc <2 x i32> @test_vmul_lanes32(<2 x i32> %arg0_int32x2_t, <2 x i32> %arg1_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmul_lanes32:
+; CHECK: vmul.i32 d0, d0, d1[1]
+ %0 = shufflevector <2 x i32> %arg1_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = mul <2 x i32> %0, %arg0_int32x2_t ; <<2 x i32>> [#uses=1]
+ ret <2 x i32> %1
+}
+
+define arm_aapcs_vfpcc <4 x float> @test_vmulQ_lanef32(<4 x float> %arg0_float32x4_t, <2 x float> %arg1_float32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmulQ_lanef32:
+; CHECK: vmul.f32 q0, q0, d2[1]
+ %0 = shufflevector <2 x float> %arg1_float32x2_t, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>$
+ %1 = fmul <4 x float> %0, %arg0_float32x4_t ; <<4 x float>> [#uses=1]
+ ret <4 x float> %1
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vmulQ_lanes16(<8 x i16> %arg0_int16x8_t, <4 x i16> %arg1_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vmulQ_lanes16:
+; CHECK: vmul.i16 q0, q0, d2[1]
+ %0 = shufflevector <4 x i16> %arg1_int16x4_t, <4 x i16> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
+ %1 = mul <8 x i16> %0, %arg0_int16x8_t ; <<8 x i16>> [#uses=1]
+ ret <8 x i16> %1
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmulQ_lanes32(<4 x i32> %arg0_int32x4_t, <2 x i32> %arg1_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmulQ_lanes32:
+; CHECK: vmul.i32 q0, q0, d2[1]
+ %0 = shufflevector <2 x i32> %arg1_int32x2_t, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i32>> [#uses$
+ %1 = mul <4 x i32> %0, %arg0_int32x4_t ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define <8 x i16> @vmulls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vmulls8:
+;CHECK: vmull.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vmulls.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vmulls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vmulls16:
+;CHECK: vmull.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vmulls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vmulls32:
+;CHECK: vmull.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vmulls.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i16> @vmullu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vmullu8:
+;CHECK: vmull.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vmullu.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vmullu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vmullu16:
+;CHECK: vmull.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vmullu.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vmullu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vmullu32:
+;CHECK: vmull.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vmullu.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i16> @vmullp8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vmullp8:
+;CHECK: vmull.p8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vmullp.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmull_lanes16(<4 x i16> %arg0_int16x4_t, <4 x i16> %arg1_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vmull_lanes16
+; CHECK: vmull.s16 q0, d0, d1[1]
+ %0 = shufflevector <4 x i16> %arg1_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %arg0_int16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vmull_lanes32(<2 x i32> %arg0_int32x2_t, <2 x i32> %arg1_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmull_lanes32
+; CHECK: vmull.s32 q0, d0, d1[1]
+ %0 = shufflevector <2 x i32> %arg1_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vmulls.v2i64(<2 x i32> %arg0_int32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vmull_laneu16(<4 x i16> %arg0_uint16x4_t, <4 x i16> %arg1_uint16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vmull_laneu16
+; CHECK: vmull.u16 q0, d0, d1[1]
+ %0 = shufflevector <4 x i16> %arg1_uint16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vmullu.v4i32(<4 x i16> %arg0_uint16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vmull_laneu32(<2 x i32> %arg0_uint32x2_t, <2 x i32> %arg1_uint32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vmull_laneu32
+; CHECK: vmull.u32 q0, d0, d1[1]
+ %0 = shufflevector <2 x i32> %arg1_uint32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vmullu.v2i64(<2 x i32> %arg0_uint32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+declare <8 x i16> @llvm.arm.neon.vmulls.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vmulls.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vmullu.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vmullu.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vmullu.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vmullp.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
diff --git a/test/CodeGen/ARM/vneg.ll b/test/CodeGen/ARM/vneg.ll
new file mode 100644
index 0000000..7764e87
--- /dev/null
+++ b/test/CodeGen/ARM/vneg.ll
@@ -0,0 +1,121 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vnegs8(<8 x i8>* %A) nounwind {
+;CHECK: vnegs8:
+;CHECK: vneg.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = sub <8 x i8> zeroinitializer, %tmp1
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vnegs16(<4 x i16>* %A) nounwind {
+;CHECK: vnegs16:
+;CHECK: vneg.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = sub <4 x i16> zeroinitializer, %tmp1
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vnegs32(<2 x i32>* %A) nounwind {
+;CHECK: vnegs32:
+;CHECK: vneg.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = sub <2 x i32> zeroinitializer, %tmp1
+ ret <2 x i32> %tmp2
+}
+
+define <2 x float> @vnegf32(<2 x float>* %A) nounwind {
+;CHECK: vnegf32:
+;CHECK: vneg.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = sub <2 x float> < float -0.000000e+00, float -0.000000e+00 >, %tmp1
+ ret <2 x float> %tmp2
+}
+
+define <16 x i8> @vnegQs8(<16 x i8>* %A) nounwind {
+;CHECK: vnegQs8:
+;CHECK: vneg.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = sub <16 x i8> zeroinitializer, %tmp1
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vnegQs16(<8 x i16>* %A) nounwind {
+;CHECK: vnegQs16:
+;CHECK: vneg.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = sub <8 x i16> zeroinitializer, %tmp1
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vnegQs32(<4 x i32>* %A) nounwind {
+;CHECK: vnegQs32:
+;CHECK: vneg.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = sub <4 x i32> zeroinitializer, %tmp1
+ ret <4 x i32> %tmp2
+}
+
+define <4 x float> @vnegQf32(<4 x float>* %A) nounwind {
+;CHECK: vnegQf32:
+;CHECK: vneg.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp1
+ ret <4 x float> %tmp2
+}
+
+define <8 x i8> @vqnegs8(<8 x i8>* %A) nounwind {
+;CHECK: vqnegs8:
+;CHECK: vqneg.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqneg.v8i8(<8 x i8> %tmp1)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqnegs16(<4 x i16>* %A) nounwind {
+;CHECK: vqnegs16:
+;CHECK: vqneg.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqneg.v4i16(<4 x i16> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqnegs32(<2 x i32>* %A) nounwind {
+;CHECK: vqnegs32:
+;CHECK: vqneg.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqneg.v2i32(<2 x i32> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <16 x i8> @vqnegQs8(<16 x i8>* %A) nounwind {
+;CHECK: vqnegQs8:
+;CHECK: vqneg.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vqneg.v16i8(<16 x i8> %tmp1)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vqnegQs16(<8 x i16>* %A) nounwind {
+;CHECK: vqnegQs16:
+;CHECK: vqneg.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vqneg.v8i16(<8 x i16> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vqnegQs32(<4 x i32>* %A) nounwind {
+;CHECK: vqnegQs32:
+;CHECK: vqneg.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vqneg.v4i32(<4 x i32> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vqneg.v8i8(<8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqneg.v4i16(<4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqneg.v2i32(<2 x i32>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqneg.v16i8(<16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqneg.v8i16(<8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqneg.v4i32(<4 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vpadal.ll b/test/CodeGen/ARM/vpadal.ll
new file mode 100644
index 0000000..7296e936
--- /dev/null
+++ b/test/CodeGen/ARM/vpadal.ll
@@ -0,0 +1,125 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <4 x i16> @vpadals8(<4 x i16>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vpadals8:
+;CHECK: vpadal.s8
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vpadals.v4i16.v8i8(<4 x i16> %tmp1, <8 x i8> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vpadals16(<2 x i32>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vpadals16:
+;CHECK: vpadal.s16
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vpadals.v2i32.v4i16(<2 x i32> %tmp1, <4 x i16> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vpadals32(<1 x i64>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vpadals32:
+;CHECK: vpadal.s32
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vpadals.v1i64.v2i32(<1 x i64> %tmp1, <2 x i32> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <4 x i16> @vpadalu8(<4 x i16>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vpadalu8:
+;CHECK: vpadal.u8
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vpadalu.v4i16.v8i8(<4 x i16> %tmp1, <8 x i8> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vpadalu16(<2 x i32>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vpadalu16:
+;CHECK: vpadal.u16
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vpadalu.v2i32.v4i16(<2 x i32> %tmp1, <4 x i16> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vpadalu32(<1 x i64>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vpadalu32:
+;CHECK: vpadal.u32
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vpadalu.v1i64.v2i32(<1 x i64> %tmp1, <2 x i32> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i16> @vpadalQs8(<8 x i16>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vpadalQs8:
+;CHECK: vpadal.s8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vpadals.v8i16.v16i8(<8 x i16> %tmp1, <16 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vpadalQs16(<4 x i32>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vpadalQs16:
+;CHECK: vpadal.s16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vpadals.v4i32.v8i16(<4 x i32> %tmp1, <8 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vpadalQs32(<2 x i64>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vpadalQs32:
+;CHECK: vpadal.s32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vpadals.v2i64.v4i32(<2 x i64> %tmp1, <4 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i16> @vpadalQu8(<8 x i16>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vpadalQu8:
+;CHECK: vpadal.u8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vpadalu.v8i16.v16i8(<8 x i16> %tmp1, <16 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vpadalQu16(<4 x i32>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vpadalQu16:
+;CHECK: vpadal.u16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vpadalu.v4i32.v8i16(<4 x i32> %tmp1, <8 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vpadalQu32(<2 x i64>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vpadalQu32:
+;CHECK: vpadal.u32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vpadalu.v2i64.v4i32(<2 x i64> %tmp1, <4 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <4 x i16> @llvm.arm.neon.vpadals.v4i16.v8i8(<4 x i16>, <8 x i8>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpadals.v2i32.v4i16(<2 x i32>, <4 x i16>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vpadals.v1i64.v2i32(<1 x i64>, <2 x i32>) nounwind readnone
+
+declare <4 x i16> @llvm.arm.neon.vpadalu.v4i16.v8i8(<4 x i16>, <8 x i8>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpadalu.v2i32.v4i16(<2 x i32>, <4 x i16>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vpadalu.v1i64.v2i32(<1 x i64>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vpadals.v8i16.v16i8(<8 x i16>, <16 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vpadals.v4i32.v8i16(<4 x i32>, <8 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vpadals.v2i64.v4i32(<2 x i64>, <4 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vpadalu.v8i16.v16i8(<8 x i16>, <16 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vpadalu.v4i32.v8i16(<4 x i32>, <8 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vpadalu.v2i64.v4i32(<2 x i64>, <4 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vpadd.ll b/test/CodeGen/ARM/vpadd.ll
new file mode 100644
index 0000000..2125573
--- /dev/null
+++ b/test/CodeGen/ARM/vpadd.ll
@@ -0,0 +1,155 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vpaddi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vpaddi8:
+;CHECK: vpadd.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vpadd.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vpaddi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vpaddi16:
+;CHECK: vpadd.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vpadd.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vpaddi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vpaddi32:
+;CHECK: vpadd.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <2 x float> @vpaddf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vpaddf32:
+;CHECK: vpadd.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x float> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vpadd.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vpadd.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
+
+define <4 x i16> @vpaddls8(<8 x i8>* %A) nounwind {
+;CHECK: vpaddls8:
+;CHECK: vpaddl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vpaddls.v4i16.v8i8(<8 x i8> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vpaddls16(<4 x i16>* %A) nounwind {
+;CHECK: vpaddls16:
+;CHECK: vpaddl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vpaddls.v2i32.v4i16(<4 x i16> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vpaddls32(<2 x i32>* %A) nounwind {
+;CHECK: vpaddls32:
+;CHECK: vpaddl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vpaddls.v1i64.v2i32(<2 x i32> %tmp1)
+ ret <1 x i64> %tmp2
+}
+
+define <4 x i16> @vpaddlu8(<8 x i8>* %A) nounwind {
+;CHECK: vpaddlu8:
+;CHECK: vpaddl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vpaddlu.v4i16.v8i8(<8 x i8> %tmp1)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vpaddlu16(<4 x i16>* %A) nounwind {
+;CHECK: vpaddlu16:
+;CHECK: vpaddl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vpaddlu.v2i32.v4i16(<4 x i16> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vpaddlu32(<2 x i32>* %A) nounwind {
+;CHECK: vpaddlu32:
+;CHECK: vpaddl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vpaddlu.v1i64.v2i32(<2 x i32> %tmp1)
+ ret <1 x i64> %tmp2
+}
+
+define <8 x i16> @vpaddlQs8(<16 x i8>* %A) nounwind {
+;CHECK: vpaddlQs8:
+;CHECK: vpaddl.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vpaddls.v8i16.v16i8(<16 x i8> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vpaddlQs16(<8 x i16>* %A) nounwind {
+;CHECK: vpaddlQs16:
+;CHECK: vpaddl.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vpaddls.v4i32.v8i16(<8 x i16> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vpaddlQs32(<4 x i32>* %A) nounwind {
+;CHECK: vpaddlQs32:
+;CHECK: vpaddl.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vpaddls.v2i64.v4i32(<4 x i32> %tmp1)
+ ret <2 x i64> %tmp2
+}
+
+define <8 x i16> @vpaddlQu8(<16 x i8>* %A) nounwind {
+;CHECK: vpaddlQu8:
+;CHECK: vpaddl.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vpaddlu.v8i16.v16i8(<16 x i8> %tmp1)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vpaddlQu16(<8 x i16>* %A) nounwind {
+;CHECK: vpaddlQu16:
+;CHECK: vpaddl.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vpaddlu.v4i32.v8i16(<8 x i16> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vpaddlQu32(<4 x i32>* %A) nounwind {
+;CHECK: vpaddlQu32:
+;CHECK: vpaddl.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vpaddlu.v2i64.v4i32(<4 x i32> %tmp1)
+ ret <2 x i64> %tmp2
+}
+
+declare <4 x i16> @llvm.arm.neon.vpaddls.v4i16.v8i8(<8 x i8>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpaddls.v2i32.v4i16(<4 x i16>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vpaddls.v1i64.v2i32(<2 x i32>) nounwind readnone
+
+declare <4 x i16> @llvm.arm.neon.vpaddlu.v4i16.v8i8(<8 x i8>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpaddlu.v2i32.v4i16(<4 x i16>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vpaddlu.v1i64.v2i32(<2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vpaddls.v8i16.v16i8(<16 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vpaddls.v4i32.v8i16(<8 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vpaddls.v2i64.v4i32(<4 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vpaddlu.v8i16.v16i8(<16 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vpaddlu.v4i32.v8i16(<8 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vpaddlu.v2i64.v4i32(<4 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vpminmax.ll b/test/CodeGen/ARM/vpminmax.ll
new file mode 100644
index 0000000..b75bcc9
--- /dev/null
+++ b/test/CodeGen/ARM/vpminmax.ll
@@ -0,0 +1,147 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vpmins8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vpmins8:
+;CHECK: vpmin.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vpmins.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vpmins16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vpmins16:
+;CHECK: vpmin.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vpmins.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vpmins32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vpmins32:
+;CHECK: vpmin.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vpmins.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i8> @vpminu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vpminu8:
+;CHECK: vpmin.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vpminu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vpminu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vpminu16:
+;CHECK: vpmin.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vpminu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vpminu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vpminu32:
+;CHECK: vpmin.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vpminu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <2 x float> @vpminf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vpminf32:
+;CHECK: vpmin.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x float> @llvm.arm.neon.vpmins.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x float> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vpmins.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vpmins.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpmins.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vpminu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vpminu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpminu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <2 x float> @llvm.arm.neon.vpmins.v2f32(<2 x float>, <2 x float>) nounwind readnone
+
+define <8 x i8> @vpmaxs8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vpmaxs8:
+;CHECK: vpmax.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vpmaxs.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vpmaxs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vpmaxs16:
+;CHECK: vpmax.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vpmaxs.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vpmaxs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vpmaxs32:
+;CHECK: vpmax.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vpmaxs.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i8> @vpmaxu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vpmaxu8:
+;CHECK: vpmax.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vpmaxu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vpmaxu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vpmaxu16:
+;CHECK: vpmax.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vpmaxu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vpmaxu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vpmaxu32:
+;CHECK: vpmax.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vpmaxu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <2 x float> @vpmaxf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vpmaxf32:
+;CHECK: vpmax.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x float> @llvm.arm.neon.vpmaxs.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x float> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vpmaxs.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vpmaxs.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpmaxs.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vpmaxu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vpmaxu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vpmaxu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <2 x float> @llvm.arm.neon.vpmaxs.v2f32(<2 x float>, <2 x float>) nounwind readnone
diff --git a/test/CodeGen/ARM/vqadd.ll b/test/CodeGen/ARM/vqadd.ll
new file mode 100644
index 0000000..a1669b6
--- /dev/null
+++ b/test/CodeGen/ARM/vqadd.ll
@@ -0,0 +1,165 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vqadds8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vqadds8:
+;CHECK: vqadd.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vqadds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vqadds16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqadds16:
+;CHECK: vqadd.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqadds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqadds32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqadds32:
+;CHECK: vqadd.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqadds.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vqadds64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vqadds64:
+;CHECK: vqadd.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vqadds.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vqaddu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vqaddu8:
+;CHECK: vqadd.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vqaddu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vqaddu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqaddu16:
+;CHECK: vqadd.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqaddu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqaddu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqaddu32:
+;CHECK: vqadd.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqaddu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vqaddu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vqaddu64:
+;CHECK: vqadd.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vqaddu.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @vqaddQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vqaddQs8:
+;CHECK: vqadd.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vqadds.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vqaddQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqaddQs16:
+;CHECK: vqadd.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqadds.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqaddQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqaddQs32:
+;CHECK: vqadd.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqadds.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqaddQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vqaddQs64:
+;CHECK: vqadd.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqadds.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vqaddQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vqaddQu8:
+;CHECK: vqadd.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vqaddu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vqaddQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqaddQu16:
+;CHECK: vqadd.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqaddu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqaddQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqaddQu32:
+;CHECK: vqadd.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqaddu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqaddQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vqaddQu64:
+;CHECK: vqadd.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqaddu.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vqadds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqadds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqadds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqadds.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqaddu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqaddu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqaddu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqadds.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqadds.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqadds.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqadds.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqaddu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqaddu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqaddu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqaddu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vqdmul.ll b/test/CodeGen/ARM/vqdmul.ll
new file mode 100644
index 0000000..8dcc7f7
--- /dev/null
+++ b/test/CodeGen/ARM/vqdmul.ll
@@ -0,0 +1,281 @@
+; RUN: llc -mattr=+neon < %s | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv7-elf"
+
+define <4 x i16> @vqdmulhs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqdmulhs16:
+;CHECK: vqdmulh.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqdmulh.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqdmulhs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqdmulhs32:
+;CHECK: vqdmulh.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqdmulh.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i16> @vqdmulhQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqdmulhQs16:
+;CHECK: vqdmulh.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqdmulh.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqdmulhQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqdmulhQs32:
+;CHECK: vqdmulh.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqdmulh.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vqdmulhQ_lanes16(<8 x i16> %arg0_int16x8_t, <4 x i16> %arg1_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmulhQ_lanes16
+; CHECK: vqdmulh.s16 q0, q0, d2[1]
+ %0 = shufflevector <4 x i16> %arg1_int16x4_t, <4 x i16> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> ; <<8 x i16>> [#uses=1]
+ %1 = tail call <8 x i16> @llvm.arm.neon.vqdmulh.v8i16(<8 x i16> %arg0_int16x8_t, <8 x i16> %0) ; <<8 x i16>> [#uses=1]
+ ret <8 x i16> %1
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vqdmulhQ_lanes32(<4 x i32> %arg0_int32x4_t, <2 x i32> %arg1_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmulhQ_lanes32
+; CHECK: vqdmulh.s32 q0, q0, d2[1]
+ %0 = shufflevector <2 x i32> %arg1_int32x2_t, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i32>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vqdmulh.v4i32(<4 x i32> %arg0_int32x4_t, <4 x i32> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <4 x i16> @test_vqdmulh_lanes16(<4 x i16> %arg0_int16x4_t, <4 x i16> %arg1_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmulh_lanes16
+; CHECK: vqdmulh.s16 d0, d0, d1[1]
+ %0 = shufflevector <4 x i16> %arg1_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i16> @llvm.arm.neon.vqdmulh.v4i16(<4 x i16> %arg0_int16x4_t, <4 x i16> %0) ; <<4 x i16>> [#uses=1]
+ ret <4 x i16> %1
+}
+
+define arm_aapcs_vfpcc <2 x i32> @test_vqdmulh_lanes32(<2 x i32> %arg0_int32x2_t, <2 x i32> %arg1_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmulh_lanes32
+; CHECK: vqdmulh.s32 d0, d0, d1[1]
+ %0 = shufflevector <2 x i32> %arg1_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i32> @llvm.arm.neon.vqdmulh.v2i32(<2 x i32> %arg0_int32x2_t, <2 x i32> %0) ; <<2 x i32>> [#uses=1]
+ ret <2 x i32> %1
+}
+
+declare <4 x i16> @llvm.arm.neon.vqdmulh.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqdmulh.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vqdmulh.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqdmulh.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+define <4 x i16> @vqrdmulhs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqrdmulhs16:
+;CHECK: vqrdmulh.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqrdmulh.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqrdmulhs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqrdmulhs32:
+;CHECK: vqrdmulh.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqrdmulh.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <8 x i16> @vqrdmulhQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqrdmulhQs16:
+;CHECK: vqrdmulh.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqrdmulh.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqrdmulhQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqrdmulhQs32:
+;CHECK: vqrdmulh.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqrdmulh.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define arm_aapcs_vfpcc <8 x i16> @test_vqRdmulhQ_lanes16(<8 x i16> %arg0_int16x8_t, <4 x i16> %arg1_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vqRdmulhQ_lanes16
+; CHECK: vqrdmulh.s16 q0, q0, d2[1]
+ %0 = shufflevector <4 x i16> %arg1_int16x4_t, <4 x i16> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> ; <<8 x i16>> [#uses=1]
+ %1 = tail call <8 x i16> @llvm.arm.neon.vqrdmulh.v8i16(<8 x i16> %arg0_int16x8_t, <8 x i16> %0) ; <<8 x i16>> [#uses=1]
+ ret <8 x i16> %1
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vqRdmulhQ_lanes32(<4 x i32> %arg0_int32x4_t, <2 x i32> %arg1_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vqRdmulhQ_lanes32
+; CHECK: vqrdmulh.s32 q0, q0, d2[1]
+ %0 = shufflevector <2 x i32> %arg1_int32x2_t, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i32>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vqrdmulh.v4i32(<4 x i32> %arg0_int32x4_t, <4 x i32> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <4 x i16> @test_vqRdmulh_lanes16(<4 x i16> %arg0_int16x4_t, <4 x i16> %arg1_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vqRdmulh_lanes16
+; CHECK: vqrdmulh.s16 d0, d0, d1[1]
+ %0 = shufflevector <4 x i16> %arg1_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i16> @llvm.arm.neon.vqrdmulh.v4i16(<4 x i16> %arg0_int16x4_t, <4 x i16> %0) ; <<4 x i16>> [#uses=1]
+ ret <4 x i16> %1
+}
+
+define arm_aapcs_vfpcc <2 x i32> @test_vqRdmulh_lanes32(<2 x i32> %arg0_int32x2_t, <2 x i32> %arg1_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vqRdmulh_lanes32
+; CHECK: vqrdmulh.s32 d0, d0, d1[1]
+ %0 = shufflevector <2 x i32> %arg1_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i32> @llvm.arm.neon.vqrdmulh.v2i32(<2 x i32> %arg0_int32x2_t, <2 x i32> %0) ; <<2 x i32>> [#uses=1]
+ ret <2 x i32> %1
+}
+
+declare <2 x i32> @llvm.arm.neon.vqrdmulh.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqrdmulh.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqrdmulh.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vqrdmulh.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqrdmulh.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+define <4 x i32> @vqdmulls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqdmulls16:
+;CHECK: vqdmull.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqdmull.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqdmulls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqdmulls32:
+;CHECK: vqdmull.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqdmull.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vqdmull_lanes16(<4 x i16> %arg0_int16x4_t, <4 x i16> %arg1_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmull_lanes16
+; CHECK: vqdmull.s16 q0, d0, d1[1]
+ %0 = shufflevector <4 x i16> %arg1_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vqdmull.v4i32(<4 x i16> %arg0_int16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vqdmull_lanes32(<2 x i32> %arg0_int32x2_t, <2 x i32> %arg1_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmull_lanes32
+; CHECK: vqdmull.s32 q0, d0, d1[1]
+ %0 = shufflevector <2 x i32> %arg1_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vqdmull.v2i64(<2 x i32> %arg0_int32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+declare <4 x i32> @llvm.arm.neon.vqdmull.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqdmull.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+define <4 x i32> @vqdmlals16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vqdmlals16:
+;CHECK: vqdmlal.s16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vqdmlal.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vqdmlals32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vqdmlals32:
+;CHECK: vqdmlal.s32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i64> @llvm.arm.neon.vqdmlal.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i64> %tmp4
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vqdmlal_lanes16(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_int16x4_t, <4 x i16> %arg2_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmlal_lanes16
+; CHECK: vqdmlal.s16 q0, d2, d3[1]
+ %0 = shufflevector <4 x i16> %arg2_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vqdmlal.v4i32(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_int16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vqdmlal_lanes32(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_int32x2_t, <2 x i32> %arg2_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmlal_lanes32
+; CHECK: vqdmlal.s32 q0, d2, d3[1]
+ %0 = shufflevector <2 x i32> %arg2_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vqdmlal.v2i64(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_int32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+declare <4 x i32> @llvm.arm.neon.vqdmlal.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqdmlal.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
+
+define <4 x i32> @vqdmlsls16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+;CHECK: vqdmlsls16:
+;CHECK: vqdmlsl.s16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = load <4 x i16>* %C
+ %tmp4 = call <4 x i32> @llvm.arm.neon.vqdmlsl.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vqdmlsls32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+;CHECK: vqdmlsls32:
+;CHECK: vqdmlsl.s32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = load <2 x i32>* %C
+ %tmp4 = call <2 x i64> @llvm.arm.neon.vqdmlsl.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+ ret <2 x i64> %tmp4
+}
+
+define arm_aapcs_vfpcc <4 x i32> @test_vqdmlsl_lanes16(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_int16x4_t, <4 x i16> %arg2_int16x4_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmlsl_lanes16
+; CHECK: vqdmlsl.s16 q0, d2, d3[1]
+ %0 = shufflevector <4 x i16> %arg2_int16x4_t, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x i16>> [#uses=1]
+ %1 = tail call <4 x i32> @llvm.arm.neon.vqdmlsl.v4i32(<4 x i32> %arg0_int32x4_t, <4 x i16> %arg1_int16x4_t, <4 x i16> %0) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %1
+}
+
+define arm_aapcs_vfpcc <2 x i64> @test_vqdmlsl_lanes32(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_int32x2_t, <2 x i32> %arg2_int32x2_t) nounwind readnone {
+entry:
+; CHECK: test_vqdmlsl_lanes32
+; CHECK: vqdmlsl.s32 q0, d2, d3[1]
+ %0 = shufflevector <2 x i32> %arg2_int32x2_t, <2 x i32> undef, <2 x i32> <i32 1, i32 1> ; <<2 x i32>> [#uses=1]
+ %1 = tail call <2 x i64> @llvm.arm.neon.vqdmlsl.v2i64(<2 x i64> %arg0_int64x2_t, <2 x i32> %arg1_int32x2_t, <2 x i32> %0) ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %1
+}
+
+declare <4 x i32> @llvm.arm.neon.vqdmlsl.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqdmlsl.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vqshl.ll b/test/CodeGen/ARM/vqshl.ll
new file mode 100644
index 0000000..e4d29a3
--- /dev/null
+++ b/test/CodeGen/ARM/vqshl.ll
@@ -0,0 +1,531 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vqshls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vqshls8:
+;CHECK: vqshl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vqshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vqshls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqshls16:
+;CHECK: vqshl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqshls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqshls32:
+;CHECK: vqshl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vqshls64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vqshls64:
+;CHECK: vqshl.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vqshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vqshlu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vqshlu8:
+;CHECK: vqshl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vqshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vqshlu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqshlu16:
+;CHECK: vqshl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqshlu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqshlu32:
+;CHECK: vqshl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqshiftu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vqshlu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vqshlu64:
+;CHECK: vqshl.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vqshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @vqshlQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vqshlQs8:
+;CHECK: vqshl.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vqshifts.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vqshlQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqshlQs16:
+;CHECK: vqshl.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqshifts.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqshlQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqshlQs32:
+;CHECK: vqshl.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqshifts.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqshlQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vqshlQs64:
+;CHECK: vqshl.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqshifts.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vqshlQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vqshlQu8:
+;CHECK: vqshl.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vqshiftu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vqshlQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqshlQu16:
+;CHECK: vqshl.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqshiftu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqshlQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqshlQu32:
+;CHECK: vqshl.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqshiftu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqshlQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vqshlQu64:
+;CHECK: vqshl.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqshiftu.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i8> @vqshls_n8(<8 x i8>* %A) nounwind {
+;CHECK: vqshls_n8:
+;CHECK: vqshl.s8{{.*#7}}
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqshifts.v8i8(<8 x i8> %tmp1, <8 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqshls_n16(<4 x i16>* %A) nounwind {
+;CHECK: vqshls_n16:
+;CHECK: vqshl.s16{{.*#15}}
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqshifts.v4i16(<4 x i16> %tmp1, <4 x i16> < i16 15, i16 15, i16 15, i16 15 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqshls_n32(<2 x i32>* %A) nounwind {
+;CHECK: vqshls_n32:
+;CHECK: vqshl.s32{{.*#31}}
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqshifts.v2i32(<2 x i32> %tmp1, <2 x i32> < i32 31, i32 31 >)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vqshls_n64(<1 x i64>* %A) nounwind {
+;CHECK: vqshls_n64:
+;CHECK: vqshl.s64{{.*#63}}
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vqshifts.v1i64(<1 x i64> %tmp1, <1 x i64> < i64 63 >)
+ ret <1 x i64> %tmp2
+}
+
+define <8 x i8> @vqshlu_n8(<8 x i8>* %A) nounwind {
+;CHECK: vqshlu_n8:
+;CHECK: vqshl.u8{{.*#7}}
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqshlu_n16(<4 x i16>* %A) nounwind {
+;CHECK: vqshlu_n16:
+;CHECK: vqshl.u16{{.*#15}}
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> < i16 15, i16 15, i16 15, i16 15 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqshlu_n32(<2 x i32>* %A) nounwind {
+;CHECK: vqshlu_n32:
+;CHECK: vqshl.u32{{.*#31}}
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqshiftu.v2i32(<2 x i32> %tmp1, <2 x i32> < i32 31, i32 31 >)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vqshlu_n64(<1 x i64>* %A) nounwind {
+;CHECK: vqshlu_n64:
+;CHECK: vqshl.u64{{.*#63}}
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vqshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> < i64 63 >)
+ ret <1 x i64> %tmp2
+}
+
+define <8 x i8> @vqshlsu_n8(<8 x i8>* %A) nounwind {
+;CHECK: vqshlsu_n8:
+;CHECK: vqshlu.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqshiftsu.v8i8(<8 x i8> %tmp1, <8 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqshlsu_n16(<4 x i16>* %A) nounwind {
+;CHECK: vqshlsu_n16:
+;CHECK: vqshlu.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqshiftsu.v4i16(<4 x i16> %tmp1, <4 x i16> < i16 15, i16 15, i16 15, i16 15 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqshlsu_n32(<2 x i32>* %A) nounwind {
+;CHECK: vqshlsu_n32:
+;CHECK: vqshlu.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqshiftsu.v2i32(<2 x i32> %tmp1, <2 x i32> < i32 31, i32 31 >)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vqshlsu_n64(<1 x i64>* %A) nounwind {
+;CHECK: vqshlsu_n64:
+;CHECK: vqshlu.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vqshiftsu.v1i64(<1 x i64> %tmp1, <1 x i64> < i64 63 >)
+ ret <1 x i64> %tmp2
+}
+
+define <16 x i8> @vqshlQs_n8(<16 x i8>* %A) nounwind {
+;CHECK: vqshlQs_n8:
+;CHECK: vqshl.s8{{.*#7}}
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vqshifts.v16i8(<16 x i8> %tmp1, <16 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vqshlQs_n16(<8 x i16>* %A) nounwind {
+;CHECK: vqshlQs_n16:
+;CHECK: vqshl.s16{{.*#15}}
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vqshifts.v8i16(<8 x i16> %tmp1, <8 x i16> < i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vqshlQs_n32(<4 x i32>* %A) nounwind {
+;CHECK: vqshlQs_n32:
+;CHECK: vqshl.s32{{.*#31}}
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vqshifts.v4i32(<4 x i32> %tmp1, <4 x i32> < i32 31, i32 31, i32 31, i32 31 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vqshlQs_n64(<2 x i64>* %A) nounwind {
+;CHECK: vqshlQs_n64:
+;CHECK: vqshl.s64{{.*#63}}
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vqshifts.v2i64(<2 x i64> %tmp1, <2 x i64> < i64 63, i64 63 >)
+ ret <2 x i64> %tmp2
+}
+
+define <16 x i8> @vqshlQu_n8(<16 x i8>* %A) nounwind {
+;CHECK: vqshlQu_n8:
+;CHECK: vqshl.u8{{.*#7}}
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vqshiftu.v16i8(<16 x i8> %tmp1, <16 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vqshlQu_n16(<8 x i16>* %A) nounwind {
+;CHECK: vqshlQu_n16:
+;CHECK: vqshl.u16{{.*#15}}
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vqshiftu.v8i16(<8 x i16> %tmp1, <8 x i16> < i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vqshlQu_n32(<4 x i32>* %A) nounwind {
+;CHECK: vqshlQu_n32:
+;CHECK: vqshl.u32{{.*#31}}
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vqshiftu.v4i32(<4 x i32> %tmp1, <4 x i32> < i32 31, i32 31, i32 31, i32 31 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vqshlQu_n64(<2 x i64>* %A) nounwind {
+;CHECK: vqshlQu_n64:
+;CHECK: vqshl.u64{{.*#63}}
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vqshiftu.v2i64(<2 x i64> %tmp1, <2 x i64> < i64 63, i64 63 >)
+ ret <2 x i64> %tmp2
+}
+
+define <16 x i8> @vqshlQsu_n8(<16 x i8>* %A) nounwind {
+;CHECK: vqshlQsu_n8:
+;CHECK: vqshlu.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vqshiftsu.v16i8(<16 x i8> %tmp1, <16 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vqshlQsu_n16(<8 x i16>* %A) nounwind {
+;CHECK: vqshlQsu_n16:
+;CHECK: vqshlu.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vqshiftsu.v8i16(<8 x i16> %tmp1, <8 x i16> < i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vqshlQsu_n32(<4 x i32>* %A) nounwind {
+;CHECK: vqshlQsu_n32:
+;CHECK: vqshlu.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vqshiftsu.v4i32(<4 x i32> %tmp1, <4 x i32> < i32 31, i32 31, i32 31, i32 31 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vqshlQsu_n64(<2 x i64>* %A) nounwind {
+;CHECK: vqshlQsu_n64:
+;CHECK: vqshlu.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vqshiftsu.v2i64(<2 x i64> %tmp1, <2 x i64> < i64 63, i64 63 >)
+ ret <2 x i64> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vqshifts.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqshifts.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqshifts.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqshifts.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqshiftsu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqshiftsu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqshiftsu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqshiftsu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqshifts.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqshifts.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqshifts.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqshifts.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqshiftu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqshiftu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqshiftu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqshiftu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqshiftsu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqshiftsu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqshiftsu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqshiftsu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <8 x i8> @vqrshls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vqrshls8:
+;CHECK: vqrshl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vqrshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vqrshls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqrshls16:
+;CHECK: vqrshl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqrshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqrshls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqrshls32:
+;CHECK: vqrshl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqrshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vqrshls64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vqrshls64:
+;CHECK: vqrshl.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vqrshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vqrshlu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vqrshlu8:
+;CHECK: vqrshl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vqrshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vqrshlu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqrshlu16:
+;CHECK: vqrshl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqrshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqrshlu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqrshlu32:
+;CHECK: vqrshl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqrshiftu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vqrshlu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vqrshlu64:
+;CHECK: vqrshl.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vqrshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @vqrshlQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vqrshlQs8:
+;CHECK: vqrshl.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vqrshifts.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vqrshlQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqrshlQs16:
+;CHECK: vqrshl.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqrshifts.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqrshlQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqrshlQs32:
+;CHECK: vqrshl.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqrshifts.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqrshlQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vqrshlQs64:
+;CHECK: vqrshl.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqrshifts.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vqrshlQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vqrshlQu8:
+;CHECK: vqrshl.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vqrshiftu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vqrshlQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqrshlQu16:
+;CHECK: vqrshl.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqrshiftu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqrshlQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqrshlQu32:
+;CHECK: vqrshl.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqrshiftu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqrshlQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vqrshlQu64:
+;CHECK: vqrshl.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqrshiftu.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vqrshifts.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqrshifts.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqrshifts.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqrshifts.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqrshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqrshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqrshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqrshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqrshifts.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqrshifts.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqrshifts.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqrshifts.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqrshiftu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqrshiftu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqrshiftu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqrshiftu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vqshrn.ll b/test/CodeGen/ARM/vqshrn.ll
new file mode 100644
index 0000000..5da7943
--- /dev/null
+++ b/test/CodeGen/ARM/vqshrn.ll
@@ -0,0 +1,169 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vqshrns8(<8 x i16>* %A) nounwind {
+;CHECK: vqshrns8:
+;CHECK: vqshrn.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqshiftns.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqshrns16(<4 x i32>* %A) nounwind {
+;CHECK: vqshrns16:
+;CHECK: vqshrn.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqshiftns.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqshrns32(<2 x i64>* %A) nounwind {
+;CHECK: vqshrns32:
+;CHECK: vqshrn.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqshiftns.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+define <8 x i8> @vqshrnu8(<8 x i16>* %A) nounwind {
+;CHECK: vqshrnu8:
+;CHECK: vqshrn.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqshiftnu.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqshrnu16(<4 x i32>* %A) nounwind {
+;CHECK: vqshrnu16:
+;CHECK: vqshrn.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqshiftnu.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqshrnu32(<2 x i64>* %A) nounwind {
+;CHECK: vqshrnu32:
+;CHECK: vqshrn.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqshiftnu.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+define <8 x i8> @vqshruns8(<8 x i16>* %A) nounwind {
+;CHECK: vqshruns8:
+;CHECK: vqshrun.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqshiftnsu.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqshruns16(<4 x i32>* %A) nounwind {
+;CHECK: vqshruns16:
+;CHECK: vqshrun.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqshiftnsu.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqshruns32(<2 x i64>* %A) nounwind {
+;CHECK: vqshruns32:
+;CHECK: vqshrun.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqshiftnsu.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vqshiftns.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqshiftns.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqshiftns.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqshiftnu.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqshiftnu.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqshiftnu.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqshiftnsu.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqshiftnsu.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqshiftnsu.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <8 x i8> @vqrshrns8(<8 x i16>* %A) nounwind {
+;CHECK: vqrshrns8:
+;CHECK: vqrshrn.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqrshiftns.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqrshrns16(<4 x i32>* %A) nounwind {
+;CHECK: vqrshrns16:
+;CHECK: vqrshrn.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqrshiftns.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqrshrns32(<2 x i64>* %A) nounwind {
+;CHECK: vqrshrns32:
+;CHECK: vqrshrn.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqrshiftns.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+define <8 x i8> @vqrshrnu8(<8 x i16>* %A) nounwind {
+;CHECK: vqrshrnu8:
+;CHECK: vqrshrn.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqrshiftnu.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqrshrnu16(<4 x i32>* %A) nounwind {
+;CHECK: vqrshrnu16:
+;CHECK: vqrshrn.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqrshiftnu.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqrshrnu32(<2 x i64>* %A) nounwind {
+;CHECK: vqrshrnu32:
+;CHECK: vqrshrn.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqrshiftnu.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+define <8 x i8> @vqrshruns8(<8 x i16>* %A) nounwind {
+;CHECK: vqrshruns8:
+;CHECK: vqrshrun.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vqrshiftnsu.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vqrshruns16(<4 x i32>* %A) nounwind {
+;CHECK: vqrshruns16:
+;CHECK: vqrshrun.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vqrshiftnsu.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vqrshruns32(<2 x i64>* %A) nounwind {
+;CHECK: vqrshruns32:
+;CHECK: vqrshrun.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vqrshiftnsu.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vqrshiftns.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqrshiftns.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqrshiftns.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqrshiftnu.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqrshiftnu.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqrshiftnu.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqrshiftnsu.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqrshiftnsu.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqrshiftnsu.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vqsub.ll b/test/CodeGen/ARM/vqsub.ll
new file mode 100644
index 0000000..4231fca
--- /dev/null
+++ b/test/CodeGen/ARM/vqsub.ll
@@ -0,0 +1,165 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vqsubs8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vqsubs8:
+;CHECK: vqsub.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vqsubs.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vqsubs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqsubs16:
+;CHECK: vqsub.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqsubs.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqsubs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqsubs32:
+;CHECK: vqsub.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqsubs.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vqsubs64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vqsubs64:
+;CHECK: vqsub.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vqsubs.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vqsubu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vqsubu8:
+;CHECK: vqsub.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vqsubu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vqsubu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vqsubu16:
+;CHECK: vqsub.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vqsubu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vqsubu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vqsubu32:
+;CHECK: vqsub.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vqsubu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vqsubu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vqsubu64:
+;CHECK: vqsub.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vqsubu.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @vqsubQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vqsubQs8:
+;CHECK: vqsub.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vqsubs.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vqsubQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqsubQs16:
+;CHECK: vqsub.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqsubs.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqsubQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqsubQs32:
+;CHECK: vqsub.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqsubs.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqsubQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vqsubQs64:
+;CHECK: vqsub.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqsubs.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vqsubQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vqsubQu8:
+;CHECK: vqsub.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vqsubu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vqsubQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vqsubQu16:
+;CHECK: vqsub.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vqsubu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vqsubQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vqsubQu32:
+;CHECK: vqsub.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vqsubu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vqsubQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vqsubQu64:
+;CHECK: vqsub.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vqsubu.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vqsubs.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqsubs.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqsubs.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqsubs.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vqsubu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vqsubu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vqsubu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vqsubu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqsubs.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqsubs.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqsubs.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqsubs.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vqsubu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vqsubu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vqsubu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vqsubu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vrec.ll b/test/CodeGen/ARM/vrec.ll
new file mode 100644
index 0000000..99989e9
--- /dev/null
+++ b/test/CodeGen/ARM/vrec.ll
@@ -0,0 +1,119 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <2 x i32> @vrecpei32(<2 x i32>* %A) nounwind {
+;CHECK: vrecpei32:
+;CHECK: vrecpe.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <4 x i32> @vrecpeQi32(<4 x i32>* %A) nounwind {
+;CHECK: vrecpeQi32:
+;CHECK: vrecpe.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x float> @vrecpef32(<2 x float>* %A) nounwind {
+;CHECK: vrecpef32:
+;CHECK: vrecpe.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)
+ ret <2 x float> %tmp2
+}
+
+define <4 x float> @vrecpeQf32(<4 x float>* %A) nounwind {
+;CHECK: vrecpeQf32:
+;CHECK: vrecpe.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = call <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float> %tmp1)
+ ret <4 x float> %tmp2
+}
+
+declare <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32>) nounwind readnone
+
+declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone
+
+define <2 x float> @vrecpsf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vrecpsf32:
+;CHECK: vrecps.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x float> %tmp3
+}
+
+define <4 x float> @vrecpsQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vrecpsQf32:
+;CHECK: vrecps.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+ ret <4 x float> %tmp3
+}
+
+declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
+
+define <2 x i32> @vrsqrtei32(<2 x i32>* %A) nounwind {
+;CHECK: vrsqrtei32:
+;CHECK: vrsqrte.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vrsqrte.v2i32(<2 x i32> %tmp1)
+ ret <2 x i32> %tmp2
+}
+
+define <4 x i32> @vrsqrteQi32(<4 x i32>* %A) nounwind {
+;CHECK: vrsqrteQi32:
+;CHECK: vrsqrte.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vrsqrte.v4i32(<4 x i32> %tmp1)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x float> @vrsqrtef32(<2 x float>* %A) nounwind {
+;CHECK: vrsqrtef32:
+;CHECK: vrsqrte.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = call <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float> %tmp1)
+ ret <2 x float> %tmp2
+}
+
+define <4 x float> @vrsqrteQf32(<4 x float>* %A) nounwind {
+;CHECK: vrsqrteQf32:
+;CHECK: vrsqrte.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = call <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float> %tmp1)
+ ret <4 x float> %tmp2
+}
+
+declare <2 x i32> @llvm.arm.neon.vrsqrte.v2i32(<2 x i32>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrsqrte.v4i32(<4 x i32>) nounwind readnone
+
+declare <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float>) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float>) nounwind readnone
+
+define <2 x float> @vrsqrtsf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vrsqrtsf32:
+;CHECK: vrsqrts.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+ ret <2 x float> %tmp3
+}
+
+define <4 x float> @vrsqrtsQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vrsqrtsQf32:
+;CHECK: vrsqrts.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+ ret <4 x float> %tmp3
+}
+
+declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/ARM/vrev.ll b/test/CodeGen/ARM/vrev.ll
new file mode 100644
index 0000000..f0a04a4
--- /dev/null
+++ b/test/CodeGen/ARM/vrev.ll
@@ -0,0 +1,113 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define arm_apcscc <8 x i8> @test_vrev64D8(<8 x i8>* %A) nounwind {
+;CHECK: test_vrev64D8:
+;CHECK: vrev64.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
+ ret <8 x i8> %tmp2
+}
+
+define arm_apcscc <4 x i16> @test_vrev64D16(<4 x i16>* %A) nounwind {
+;CHECK: test_vrev64D16:
+;CHECK: vrev64.16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+ ret <4 x i16> %tmp2
+}
+
+define arm_apcscc <2 x i32> @test_vrev64D32(<2 x i32>* %A) nounwind {
+;CHECK: test_vrev64D32:
+;CHECK: vrev64.32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> <i32 1, i32 0>
+ ret <2 x i32> %tmp2
+}
+
+define arm_apcscc <2 x float> @test_vrev64Df(<2 x float>* %A) nounwind {
+;CHECK: test_vrev64Df:
+;CHECK: vrev64.32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> <i32 1, i32 0>
+ ret <2 x float> %tmp2
+}
+
+define arm_apcscc <16 x i8> @test_vrev64Q8(<16 x i8>* %A) nounwind {
+;CHECK: test_vrev64Q8:
+;CHECK: vrev64.8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>
+ ret <16 x i8> %tmp2
+}
+
+define arm_apcscc <8 x i16> @test_vrev64Q16(<8 x i16>* %A) nounwind {
+;CHECK: test_vrev64Q16:
+;CHECK: vrev64.16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
+ ret <8 x i16> %tmp2
+}
+
+define arm_apcscc <4 x i32> @test_vrev64Q32(<4 x i32>* %A) nounwind {
+;CHECK: test_vrev64Q32:
+;CHECK: vrev64.32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
+ ret <4 x i32> %tmp2
+}
+
+define arm_apcscc <4 x float> @test_vrev64Qf(<4 x float>* %A) nounwind {
+;CHECK: test_vrev64Qf:
+;CHECK: vrev64.32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
+ ret <4 x float> %tmp2
+}
+
+define arm_apcscc <8 x i8> @test_vrev32D8(<8 x i8>* %A) nounwind {
+;CHECK: test_vrev32D8:
+;CHECK: vrev32.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
+ ret <8 x i8> %tmp2
+}
+
+define arm_apcscc <4 x i16> @test_vrev32D16(<4 x i16>* %A) nounwind {
+;CHECK: test_vrev32D16:
+;CHECK: vrev32.16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
+ ret <4 x i16> %tmp2
+}
+
+define arm_apcscc <16 x i8> @test_vrev32Q8(<16 x i8>* %A) nounwind {
+;CHECK: test_vrev32Q8:
+;CHECK: vrev32.8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
+ ret <16 x i8> %tmp2
+}
+
+define arm_apcscc <8 x i16> @test_vrev32Q16(<8 x i16>* %A) nounwind {
+;CHECK: test_vrev32Q16:
+;CHECK: vrev32.16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
+ ret <8 x i16> %tmp2
+}
+
+define arm_apcscc <8 x i8> @test_vrev16D8(<8 x i8>* %A) nounwind {
+;CHECK: test_vrev16D8:
+;CHECK: vrev16.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
+ ret <8 x i8> %tmp2
+}
+
+define arm_apcscc <16 x i8> @test_vrev16Q8(<16 x i8>* %A) nounwind {
+;CHECK: test_vrev16Q8:
+;CHECK: vrev16.8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
+ ret <16 x i8> %tmp2
+}
diff --git a/test/CodeGen/ARM/vshift.ll b/test/CodeGen/ARM/vshift.ll
new file mode 100644
index 0000000..f3cbec7
--- /dev/null
+++ b/test/CodeGen/ARM/vshift.ll
@@ -0,0 +1,432 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vshls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vshls8:
+;CHECK: vshl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = shl <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vshls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vshls16:
+;CHECK: vshl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = shl <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vshls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vshls32:
+;CHECK: vshl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = shl <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vshls64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vshls64:
+;CHECK: vshl.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = shl <1 x i64> %tmp1, %tmp2
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vshli8(<8 x i8>* %A) nounwind {
+;CHECK: vshli8:
+;CHECK: vshl.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = shl <8 x i8> %tmp1, < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vshli16(<4 x i16>* %A) nounwind {
+;CHECK: vshli16:
+;CHECK: vshl.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = shl <4 x i16> %tmp1, < i16 15, i16 15, i16 15, i16 15 >
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vshli32(<2 x i32>* %A) nounwind {
+;CHECK: vshli32:
+;CHECK: vshl.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = shl <2 x i32> %tmp1, < i32 31, i32 31 >
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vshli64(<1 x i64>* %A) nounwind {
+;CHECK: vshli64:
+;CHECK: vshl.i64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = shl <1 x i64> %tmp1, < i64 63 >
+ ret <1 x i64> %tmp2
+}
+
+define <16 x i8> @vshlQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vshlQs8:
+;CHECK: vshl.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = shl <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vshlQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vshlQs16:
+;CHECK: vshl.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shl <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vshlQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vshlQs32:
+;CHECK: vshl.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = shl <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vshlQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vshlQs64:
+;CHECK: vshl.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = shl <2 x i64> %tmp1, %tmp2
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vshlQi8(<16 x i8>* %A) nounwind {
+;CHECK: vshlQi8:
+;CHECK: vshl.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = shl <16 x i8> %tmp1, < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vshlQi16(<8 x i16>* %A) nounwind {
+;CHECK: vshlQi16:
+;CHECK: vshl.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = shl <8 x i16> %tmp1, < i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15 >
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vshlQi32(<4 x i32>* %A) nounwind {
+;CHECK: vshlQi32:
+;CHECK: vshl.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = shl <4 x i32> %tmp1, < i32 31, i32 31, i32 31, i32 31 >
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vshlQi64(<2 x i64>* %A) nounwind {
+;CHECK: vshlQi64:
+;CHECK: vshl.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = shl <2 x i64> %tmp1, < i64 63, i64 63 >
+ ret <2 x i64> %tmp2
+}
+
+define <8 x i8> @vlshru8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vlshru8:
+;CHECK: vneg.s8
+;CHECK: vshl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = lshr <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vlshru16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vlshru16:
+;CHECK: vneg.s16
+;CHECK: vshl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = lshr <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vlshru32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vlshru32:
+;CHECK: vneg.s32
+;CHECK: vshl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = lshr <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vlshru64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vlshru64:
+;CHECK: vsub.i64
+;CHECK: vshl.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = lshr <1 x i64> %tmp1, %tmp2
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vlshri8(<8 x i8>* %A) nounwind {
+;CHECK: vlshri8:
+;CHECK: vshr.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = lshr <8 x i8> %tmp1, < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vlshri16(<4 x i16>* %A) nounwind {
+;CHECK: vlshri16:
+;CHECK: vshr.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = lshr <4 x i16> %tmp1, < i16 16, i16 16, i16 16, i16 16 >
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vlshri32(<2 x i32>* %A) nounwind {
+;CHECK: vlshri32:
+;CHECK: vshr.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = lshr <2 x i32> %tmp1, < i32 32, i32 32 >
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vlshri64(<1 x i64>* %A) nounwind {
+;CHECK: vlshri64:
+;CHECK: vshr.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = lshr <1 x i64> %tmp1, < i64 64 >
+ ret <1 x i64> %tmp2
+}
+
+define <16 x i8> @vlshrQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vlshrQu8:
+;CHECK: vneg.s8
+;CHECK: vshl.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = lshr <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vlshrQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vlshrQu16:
+;CHECK: vneg.s16
+;CHECK: vshl.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = lshr <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vlshrQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vlshrQu32:
+;CHECK: vneg.s32
+;CHECK: vshl.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = lshr <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vlshrQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vlshrQu64:
+;CHECK: vsub.i64
+;CHECK: vshl.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = lshr <2 x i64> %tmp1, %tmp2
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vlshrQi8(<16 x i8>* %A) nounwind {
+;CHECK: vlshrQi8:
+;CHECK: vshr.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = lshr <16 x i8> %tmp1, < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vlshrQi16(<8 x i16>* %A) nounwind {
+;CHECK: vlshrQi16:
+;CHECK: vshr.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = lshr <8 x i16> %tmp1, < i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16 >
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vlshrQi32(<4 x i32>* %A) nounwind {
+;CHECK: vlshrQi32:
+;CHECK: vshr.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = lshr <4 x i32> %tmp1, < i32 32, i32 32, i32 32, i32 32 >
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vlshrQi64(<2 x i64>* %A) nounwind {
+;CHECK: vlshrQi64:
+;CHECK: vshr.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = lshr <2 x i64> %tmp1, < i64 64, i64 64 >
+ ret <2 x i64> %tmp2
+}
+
+; Example that requires splitting and expanding a vector shift.
+define <2 x i64> @update(<2 x i64> %val) nounwind readnone {
+entry:
+ %shr = lshr <2 x i64> %val, < i64 2, i64 2 > ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %shr
+}
+
+define <8 x i8> @vashrs8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vashrs8:
+;CHECK: vneg.s8
+;CHECK: vshl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = ashr <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vashrs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vashrs16:
+;CHECK: vneg.s16
+;CHECK: vshl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = ashr <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vashrs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vashrs32:
+;CHECK: vneg.s32
+;CHECK: vshl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = ashr <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vashrs64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vashrs64:
+;CHECK: vsub.i64
+;CHECK: vshl.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = ashr <1 x i64> %tmp1, %tmp2
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vashri8(<8 x i8>* %A) nounwind {
+;CHECK: vashri8:
+;CHECK: vshr.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = ashr <8 x i8> %tmp1, < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vashri16(<4 x i16>* %A) nounwind {
+;CHECK: vashri16:
+;CHECK: vshr.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = ashr <4 x i16> %tmp1, < i16 16, i16 16, i16 16, i16 16 >
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vashri32(<2 x i32>* %A) nounwind {
+;CHECK: vashri32:
+;CHECK: vshr.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = ashr <2 x i32> %tmp1, < i32 32, i32 32 >
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vashri64(<1 x i64>* %A) nounwind {
+;CHECK: vashri64:
+;CHECK: vshr.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = ashr <1 x i64> %tmp1, < i64 64 >
+ ret <1 x i64> %tmp2
+}
+
+define <16 x i8> @vashrQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vashrQs8:
+;CHECK: vneg.s8
+;CHECK: vshl.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = ashr <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vashrQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vashrQs16:
+;CHECK: vneg.s16
+;CHECK: vshl.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = ashr <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vashrQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vashrQs32:
+;CHECK: vneg.s32
+;CHECK: vshl.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = ashr <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vashrQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vashrQs64:
+;CHECK: vsub.i64
+;CHECK: vshl.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = ashr <2 x i64> %tmp1, %tmp2
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vashrQi8(<16 x i8>* %A) nounwind {
+;CHECK: vashrQi8:
+;CHECK: vshr.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = ashr <16 x i8> %tmp1, < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vashrQi16(<8 x i16>* %A) nounwind {
+;CHECK: vashrQi16:
+;CHECK: vshr.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = ashr <8 x i16> %tmp1, < i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16 >
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vashrQi32(<4 x i32>* %A) nounwind {
+;CHECK: vashrQi32:
+;CHECK: vshr.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = ashr <4 x i32> %tmp1, < i32 32, i32 32, i32 32, i32 32 >
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vashrQi64(<2 x i64>* %A) nounwind {
+;CHECK: vashrQi64:
+;CHECK: vshr.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = ashr <2 x i64> %tmp1, < i64 64, i64 64 >
+ ret <2 x i64> %tmp2
+}
diff --git a/test/CodeGen/ARM/vshiftins.ll b/test/CodeGen/ARM/vshiftins.ll
new file mode 100644
index 0000000..3a4f857
--- /dev/null
+++ b/test/CodeGen/ARM/vshiftins.ll
@@ -0,0 +1,155 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vsli8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsli8:
+;CHECK: vsli.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vshiftins.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vsli16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsli16:
+;CHECK: vsli.16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vshiftins.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i16> < i16 15, i16 15, i16 15, i16 15 >)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vsli32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsli32:
+;CHECK: vsli.32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vshiftins.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> < i32 31, i32 31 >)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vsli64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vsli64:
+;CHECK: vsli.64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vshiftins.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2, <1 x i64> < i64 63 >)
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @vsliQ8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vsliQ8:
+;CHECK: vsli.8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vshiftins.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vsliQ16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vsliQ16:
+;CHECK: vsli.16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vshiftins.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i16> < i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15 >)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vsliQ32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vsliQ32:
+;CHECK: vsli.32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vshiftins.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> < i32 31, i32 31, i32 31, i32 31 >)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vsliQ64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vsliQ64:
+;CHECK: vsli.64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vshiftins.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2, <2 x i64> < i64 63, i64 63 >)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i8> @vsri8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsri8:
+;CHECK: vsri.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vshiftins.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vsri16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsri16:
+;CHECK: vsri.16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vshiftins.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i16> < i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vsri32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsri32:
+;CHECK: vsri.32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vshiftins.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> < i32 -32, i32 -32 >)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vsri64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vsri64:
+;CHECK: vsri.64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vshiftins.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2, <1 x i64> < i64 -64 >)
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @vsriQ8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vsriQ8:
+;CHECK: vsri.8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vshiftins.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vsriQ16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vsriQ16:
+;CHECK: vsri.16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vshiftins.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i16> < i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vsriQ32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vsriQ32:
+;CHECK: vsri.32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vshiftins.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> < i32 -32, i32 -32, i32 -32, i32 -32 >)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vsriQ64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vsriQ64:
+;CHECK: vsri.64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vshiftins.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2, <2 x i64> < i64 -64, i64 -64 >)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vshiftins.v8i8(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vshiftins.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vshiftins.v2i32(<2 x i32>, <2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vshiftins.v1i64(<1 x i64>, <1 x i64>, <1 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vshiftins.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vshiftins.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vshiftins.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vshiftins.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vshl.ll b/test/CodeGen/ARM/vshl.ll
new file mode 100644
index 0000000..818e71b
--- /dev/null
+++ b/test/CodeGen/ARM/vshl.ll
@@ -0,0 +1,654 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vshls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vshls8:
+;CHECK: vshl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vshls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vshls16:
+;CHECK: vshl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vshls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vshls32:
+;CHECK: vshl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vshls64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vshls64:
+;CHECK: vshl.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vshlu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vshlu8:
+;CHECK: vshl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vshlu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vshlu16:
+;CHECK: vshl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vshlu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vshlu32:
+;CHECK: vshl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vshiftu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vshlu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vshlu64:
+;CHECK: vshl.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @vshlQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vshlQs8:
+;CHECK: vshl.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vshifts.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vshlQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vshlQs16:
+;CHECK: vshl.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vshifts.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vshlQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vshlQs32:
+;CHECK: vshl.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vshifts.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vshlQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vshlQs64:
+;CHECK: vshl.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vshifts.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vshlQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vshlQu8:
+;CHECK: vshl.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vshiftu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vshlQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vshlQu16:
+;CHECK: vshl.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vshiftu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vshlQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vshlQu32:
+;CHECK: vshl.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vshiftu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vshlQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vshlQu64:
+;CHECK: vshl.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vshiftu.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+; For left shifts by immediates, the signedness is irrelevant.
+; Test a mix of both signed and unsigned intrinsics.
+
+define <8 x i8> @vshli8(<8 x i8>* %A) nounwind {
+;CHECK: vshli8:
+;CHECK: vshl.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vshifts.v8i8(<8 x i8> %tmp1, <8 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vshli16(<4 x i16>* %A) nounwind {
+;CHECK: vshli16:
+;CHECK: vshl.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> < i16 15, i16 15, i16 15, i16 15 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vshli32(<2 x i32>* %A) nounwind {
+;CHECK: vshli32:
+;CHECK: vshl.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vshifts.v2i32(<2 x i32> %tmp1, <2 x i32> < i32 31, i32 31 >)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vshli64(<1 x i64>* %A) nounwind {
+;CHECK: vshli64:
+;CHECK: vshl.i64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> < i64 63 >)
+ ret <1 x i64> %tmp2
+}
+
+define <16 x i8> @vshlQi8(<16 x i8>* %A) nounwind {
+;CHECK: vshlQi8:
+;CHECK: vshl.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vshifts.v16i8(<16 x i8> %tmp1, <16 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vshlQi16(<8 x i16>* %A) nounwind {
+;CHECK: vshlQi16:
+;CHECK: vshl.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vshiftu.v8i16(<8 x i16> %tmp1, <8 x i16> < i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vshlQi32(<4 x i32>* %A) nounwind {
+;CHECK: vshlQi32:
+;CHECK: vshl.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vshifts.v4i32(<4 x i32> %tmp1, <4 x i32> < i32 31, i32 31, i32 31, i32 31 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vshlQi64(<2 x i64>* %A) nounwind {
+;CHECK: vshlQi64:
+;CHECK: vshl.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vshiftu.v2i64(<2 x i64> %tmp1, <2 x i64> < i64 63, i64 63 >)
+ ret <2 x i64> %tmp2
+}
+
+; Right shift by immediate:
+
+define <8 x i8> @vshrs8(<8 x i8>* %A) nounwind {
+;CHECK: vshrs8:
+;CHECK: vshr.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vshifts.v8i8(<8 x i8> %tmp1, <8 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vshrs16(<4 x i16>* %A) nounwind {
+;CHECK: vshrs16:
+;CHECK: vshr.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vshifts.v4i16(<4 x i16> %tmp1, <4 x i16> < i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vshrs32(<2 x i32>* %A) nounwind {
+;CHECK: vshrs32:
+;CHECK: vshr.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vshifts.v2i32(<2 x i32> %tmp1, <2 x i32> < i32 -32, i32 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vshrs64(<1 x i64>* %A) nounwind {
+;CHECK: vshrs64:
+;CHECK: vshr.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vshifts.v1i64(<1 x i64> %tmp1, <1 x i64> < i64 -64 >)
+ ret <1 x i64> %tmp2
+}
+
+define <8 x i8> @vshru8(<8 x i8>* %A) nounwind {
+;CHECK: vshru8:
+;CHECK: vshr.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vshru16(<4 x i16>* %A) nounwind {
+;CHECK: vshru16:
+;CHECK: vshr.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> < i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vshru32(<2 x i32>* %A) nounwind {
+;CHECK: vshru32:
+;CHECK: vshr.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vshiftu.v2i32(<2 x i32> %tmp1, <2 x i32> < i32 -32, i32 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vshru64(<1 x i64>* %A) nounwind {
+;CHECK: vshru64:
+;CHECK: vshr.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> < i64 -64 >)
+ ret <1 x i64> %tmp2
+}
+
+define <16 x i8> @vshrQs8(<16 x i8>* %A) nounwind {
+;CHECK: vshrQs8:
+;CHECK: vshr.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vshifts.v16i8(<16 x i8> %tmp1, <16 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vshrQs16(<8 x i16>* %A) nounwind {
+;CHECK: vshrQs16:
+;CHECK: vshr.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vshifts.v8i16(<8 x i16> %tmp1, <8 x i16> < i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vshrQs32(<4 x i32>* %A) nounwind {
+;CHECK: vshrQs32:
+;CHECK: vshr.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vshifts.v4i32(<4 x i32> %tmp1, <4 x i32> < i32 -32, i32 -32, i32 -32, i32 -32 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vshrQs64(<2 x i64>* %A) nounwind {
+;CHECK: vshrQs64:
+;CHECK: vshr.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vshifts.v2i64(<2 x i64> %tmp1, <2 x i64> < i64 -64, i64 -64 >)
+ ret <2 x i64> %tmp2
+}
+
+define <16 x i8> @vshrQu8(<16 x i8>* %A) nounwind {
+;CHECK: vshrQu8:
+;CHECK: vshr.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vshiftu.v16i8(<16 x i8> %tmp1, <16 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vshrQu16(<8 x i16>* %A) nounwind {
+;CHECK: vshrQu16:
+;CHECK: vshr.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vshiftu.v8i16(<8 x i16> %tmp1, <8 x i16> < i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vshrQu32(<4 x i32>* %A) nounwind {
+;CHECK: vshrQu32:
+;CHECK: vshr.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vshiftu.v4i32(<4 x i32> %tmp1, <4 x i32> < i32 -32, i32 -32, i32 -32, i32 -32 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vshrQu64(<2 x i64>* %A) nounwind {
+;CHECK: vshrQu64:
+;CHECK: vshr.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vshiftu.v2i64(<2 x i64> %tmp1, <2 x i64> < i64 -64, i64 -64 >)
+ ret <2 x i64> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vshifts.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vshifts.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vshifts.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vshifts.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vshifts.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vshifts.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vshifts.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vshifts.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vshiftu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vshiftu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vshiftu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vshiftu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <8 x i8> @vrshls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vrshls8:
+;CHECK: vrshl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vrshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vrshls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vrshls16:
+;CHECK: vrshl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vrshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vrshls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vrshls32:
+;CHECK: vrshl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vrshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vrshls64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vrshls64:
+;CHECK: vrshl.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vrshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <8 x i8> @vrshlu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vrshlu8:
+;CHECK: vrshl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vrshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vrshlu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vrshlu16:
+;CHECK: vrshl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vrshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vrshlu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vrshlu32:
+;CHECK: vrshl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vrshiftu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vrshlu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vrshlu64:
+;CHECK: vrshl.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vrshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
+ ret <1 x i64> %tmp3
+}
+
+define <16 x i8> @vrshlQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vrshlQs8:
+;CHECK: vrshl.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vrshifts.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vrshlQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vrshlQs16:
+;CHECK: vrshl.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vrshifts.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vrshlQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vrshlQs32:
+;CHECK: vrshl.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vrshifts.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vrshlQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vrshlQs64:
+;CHECK: vrshl.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vrshifts.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <16 x i8> @vrshlQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vrshlQu8:
+;CHECK: vrshl.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vrshiftu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vrshlQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vrshlQu16:
+;CHECK: vrshl.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vrshiftu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vrshlQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vrshlQu32:
+;CHECK: vrshl.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vrshiftu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vrshlQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vrshlQu64:
+;CHECK: vrshl.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vrshiftu.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i8> @vrshrs8(<8 x i8>* %A) nounwind {
+;CHECK: vrshrs8:
+;CHECK: vrshr.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vrshifts.v8i8(<8 x i8> %tmp1, <8 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vrshrs16(<4 x i16>* %A) nounwind {
+;CHECK: vrshrs16:
+;CHECK: vrshr.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vrshifts.v4i16(<4 x i16> %tmp1, <4 x i16> < i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vrshrs32(<2 x i32>* %A) nounwind {
+;CHECK: vrshrs32:
+;CHECK: vrshr.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vrshifts.v2i32(<2 x i32> %tmp1, <2 x i32> < i32 -32, i32 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vrshrs64(<1 x i64>* %A) nounwind {
+;CHECK: vrshrs64:
+;CHECK: vrshr.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vrshifts.v1i64(<1 x i64> %tmp1, <1 x i64> < i64 -64 >)
+ ret <1 x i64> %tmp2
+}
+
+define <8 x i8> @vrshru8(<8 x i8>* %A) nounwind {
+;CHECK: vrshru8:
+;CHECK: vrshr.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vrshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vrshru16(<4 x i16>* %A) nounwind {
+;CHECK: vrshru16:
+;CHECK: vrshr.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vrshiftu.v4i16(<4 x i16> %tmp1, <4 x i16> < i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vrshru32(<2 x i32>* %A) nounwind {
+;CHECK: vrshru32:
+;CHECK: vrshr.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vrshiftu.v2i32(<2 x i32> %tmp1, <2 x i32> < i32 -32, i32 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+define <1 x i64> @vrshru64(<1 x i64>* %A) nounwind {
+;CHECK: vrshru64:
+;CHECK: vrshr.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = call <1 x i64> @llvm.arm.neon.vrshiftu.v1i64(<1 x i64> %tmp1, <1 x i64> < i64 -64 >)
+ ret <1 x i64> %tmp2
+}
+
+define <16 x i8> @vrshrQs8(<16 x i8>* %A) nounwind {
+;CHECK: vrshrQs8:
+;CHECK: vrshr.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vrshifts.v16i8(<16 x i8> %tmp1, <16 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vrshrQs16(<8 x i16>* %A) nounwind {
+;CHECK: vrshrQs16:
+;CHECK: vrshr.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vrshifts.v8i16(<8 x i16> %tmp1, <8 x i16> < i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vrshrQs32(<4 x i32>* %A) nounwind {
+;CHECK: vrshrQs32:
+;CHECK: vrshr.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vrshifts.v4i32(<4 x i32> %tmp1, <4 x i32> < i32 -32, i32 -32, i32 -32, i32 -32 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vrshrQs64(<2 x i64>* %A) nounwind {
+;CHECK: vrshrQs64:
+;CHECK: vrshr.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vrshifts.v2i64(<2 x i64> %tmp1, <2 x i64> < i64 -64, i64 -64 >)
+ ret <2 x i64> %tmp2
+}
+
+define <16 x i8> @vrshrQu8(<16 x i8>* %A) nounwind {
+;CHECK: vrshrQu8:
+;CHECK: vrshr.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = call <16 x i8> @llvm.arm.neon.vrshiftu.v16i8(<16 x i8> %tmp1, <16 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ ret <16 x i8> %tmp2
+}
+
+define <8 x i16> @vrshrQu16(<8 x i16>* %A) nounwind {
+;CHECK: vrshrQu16:
+;CHECK: vrshr.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vrshiftu.v8i16(<8 x i16> %tmp1, <8 x i16> < i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vrshrQu32(<4 x i32>* %A) nounwind {
+;CHECK: vrshrQu32:
+;CHECK: vrshr.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vrshiftu.v4i32(<4 x i32> %tmp1, <4 x i32> < i32 -32, i32 -32, i32 -32, i32 -32 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vrshrQu64(<2 x i64>* %A) nounwind {
+;CHECK: vrshrQu64:
+;CHECK: vrshr.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vrshiftu.v2i64(<2 x i64> %tmp1, <2 x i64> < i64 -64, i64 -64 >)
+ ret <2 x i64> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vrshifts.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrshifts.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrshifts.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vrshifts.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vrshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vrshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vrshifts.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vrshifts.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrshifts.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vrshifts.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vrshiftu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vrshiftu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrshiftu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vrshiftu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vshll.ll b/test/CodeGen/ARM/vshll.ll
new file mode 100644
index 0000000..8e85b98
--- /dev/null
+++ b/test/CodeGen/ARM/vshll.ll
@@ -0,0 +1,83 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i16> @vshlls8(<8 x i8>* %A) nounwind {
+;CHECK: vshlls8:
+;CHECK: vshll.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vshiftls.v8i16(<8 x i8> %tmp1, <8 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vshlls16(<4 x i16>* %A) nounwind {
+;CHECK: vshlls16:
+;CHECK: vshll.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vshiftls.v4i32(<4 x i16> %tmp1, <4 x i16> < i16 15, i16 15, i16 15, i16 15 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vshlls32(<2 x i32>* %A) nounwind {
+;CHECK: vshlls32:
+;CHECK: vshll.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vshiftls.v2i64(<2 x i32> %tmp1, <2 x i32> < i32 31, i32 31 >)
+ ret <2 x i64> %tmp2
+}
+
+define <8 x i16> @vshllu8(<8 x i8>* %A) nounwind {
+;CHECK: vshllu8:
+;CHECK: vshll.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vshiftlu.v8i16(<8 x i8> %tmp1, <8 x i8> < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vshllu16(<4 x i16>* %A) nounwind {
+;CHECK: vshllu16:
+;CHECK: vshll.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vshiftlu.v4i32(<4 x i16> %tmp1, <4 x i16> < i16 15, i16 15, i16 15, i16 15 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vshllu32(<2 x i32>* %A) nounwind {
+;CHECK: vshllu32:
+;CHECK: vshll.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vshiftlu.v2i64(<2 x i32> %tmp1, <2 x i32> < i32 31, i32 31 >)
+ ret <2 x i64> %tmp2
+}
+
+; The following tests use the maximum shift count, so the signedness is
+; irrelevant. Test both signed and unsigned versions.
+define <8 x i16> @vshlli8(<8 x i8>* %A) nounwind {
+;CHECK: vshlli8:
+;CHECK: vshll.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = call <8 x i16> @llvm.arm.neon.vshiftls.v8i16(<8 x i8> %tmp1, <8 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >)
+ ret <8 x i16> %tmp2
+}
+
+define <4 x i32> @vshlli16(<4 x i16>* %A) nounwind {
+;CHECK: vshlli16:
+;CHECK: vshll.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = call <4 x i32> @llvm.arm.neon.vshiftlu.v4i32(<4 x i16> %tmp1, <4 x i16> < i16 16, i16 16, i16 16, i16 16 >)
+ ret <4 x i32> %tmp2
+}
+
+define <2 x i64> @vshlli32(<2 x i32>* %A) nounwind {
+;CHECK: vshlli32:
+;CHECK: vshll.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = call <2 x i64> @llvm.arm.neon.vshiftls.v2i64(<2 x i32> %tmp1, <2 x i32> < i32 32, i32 32 >)
+ ret <2 x i64> %tmp2
+}
+
+declare <8 x i16> @llvm.arm.neon.vshiftls.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vshiftls.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vshiftls.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vshiftlu.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vshiftlu.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vshiftlu.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vshrn.ll b/test/CodeGen/ARM/vshrn.ll
new file mode 100644
index 0000000..e2544f4
--- /dev/null
+++ b/test/CodeGen/ARM/vshrn.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vshrns8(<8 x i16>* %A) nounwind {
+;CHECK: vshrns8:
+;CHECK: vshrn.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vshiftn.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vshrns16(<4 x i32>* %A) nounwind {
+;CHECK: vshrns16:
+;CHECK: vshrn.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vshiftn.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vshrns32(<2 x i64>* %A) nounwind {
+;CHECK: vshrns32:
+;CHECK: vshrn.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vshiftn.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vshiftn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vshiftn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vshiftn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <8 x i8> @vrshrns8(<8 x i16>* %A) nounwind {
+;CHECK: vrshrns8:
+;CHECK: vrshrn.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = call <8 x i8> @llvm.arm.neon.vrshiftn.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
+ ret <8 x i8> %tmp2
+}
+
+define <4 x i16> @vrshrns16(<4 x i32>* %A) nounwind {
+;CHECK: vrshrns16:
+;CHECK: vrshrn.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = call <4 x i16> @llvm.arm.neon.vrshiftn.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
+ ret <4 x i16> %tmp2
+}
+
+define <2 x i32> @vrshrns32(<2 x i64>* %A) nounwind {
+;CHECK: vrshrns32:
+;CHECK: vrshrn.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = call <2 x i32> @llvm.arm.neon.vrshiftn.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
+ ret <2 x i32> %tmp2
+}
+
+declare <8 x i8> @llvm.arm.neon.vrshiftn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrshiftn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrshiftn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vsra.ll b/test/CodeGen/ARM/vsra.ll
new file mode 100644
index 0000000..acb672d
--- /dev/null
+++ b/test/CodeGen/ARM/vsra.ll
@@ -0,0 +1,341 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vsras8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsras8:
+;CHECK: vsra.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = ashr <8 x i8> %tmp2, < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+ %tmp4 = add <8 x i8> %tmp1, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vsras16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsras16:
+;CHECK: vsra.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = ashr <4 x i16> %tmp2, < i16 16, i16 16, i16 16, i16 16 >
+ %tmp4 = add <4 x i16> %tmp1, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vsras32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsras32:
+;CHECK: vsra.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = ashr <2 x i32> %tmp2, < i32 32, i32 32 >
+ %tmp4 = add <2 x i32> %tmp1, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <1 x i64> @vsras64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vsras64:
+;CHECK: vsra.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = ashr <1 x i64> %tmp2, < i64 64 >
+ %tmp4 = add <1 x i64> %tmp1, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <16 x i8> @vsraQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vsraQs8:
+;CHECK: vsra.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = ashr <16 x i8> %tmp2, < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+ %tmp4 = add <16 x i8> %tmp1, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vsraQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vsraQs16:
+;CHECK: vsra.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = ashr <8 x i16> %tmp2, < i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16 >
+ %tmp4 = add <8 x i16> %tmp1, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vsraQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vsraQs32:
+;CHECK: vsra.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = ashr <4 x i32> %tmp2, < i32 32, i32 32, i32 32, i32 32 >
+ %tmp4 = add <4 x i32> %tmp1, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vsraQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vsraQs64:
+;CHECK: vsra.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = ashr <2 x i64> %tmp2, < i64 64, i64 64 >
+ %tmp4 = add <2 x i64> %tmp1, %tmp3
+ ret <2 x i64> %tmp4
+}
+
+define <8 x i8> @vsrau8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsrau8:
+;CHECK: vsra.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = lshr <8 x i8> %tmp2, < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+ %tmp4 = add <8 x i8> %tmp1, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vsrau16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsrau16:
+;CHECK: vsra.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = lshr <4 x i16> %tmp2, < i16 16, i16 16, i16 16, i16 16 >
+ %tmp4 = add <4 x i16> %tmp1, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vsrau32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsrau32:
+;CHECK: vsra.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = lshr <2 x i32> %tmp2, < i32 32, i32 32 >
+ %tmp4 = add <2 x i32> %tmp1, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <1 x i64> @vsrau64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vsrau64:
+;CHECK: vsra.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = lshr <1 x i64> %tmp2, < i64 64 >
+ %tmp4 = add <1 x i64> %tmp1, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <16 x i8> @vsraQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vsraQu8:
+;CHECK: vsra.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = lshr <16 x i8> %tmp2, < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
+ %tmp4 = add <16 x i8> %tmp1, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vsraQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vsraQu16:
+;CHECK: vsra.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = lshr <8 x i16> %tmp2, < i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16 >
+ %tmp4 = add <8 x i16> %tmp1, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vsraQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vsraQu32:
+;CHECK: vsra.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = lshr <4 x i32> %tmp2, < i32 32, i32 32, i32 32, i32 32 >
+ %tmp4 = add <4 x i32> %tmp1, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vsraQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vsraQu64:
+;CHECK: vsra.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = lshr <2 x i64> %tmp2, < i64 64, i64 64 >
+ %tmp4 = add <2 x i64> %tmp1, %tmp3
+ ret <2 x i64> %tmp4
+}
+
+define <8 x i8> @vrsras8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vrsras8:
+;CHECK: vrsra.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vrshifts.v8i8(<8 x i8> %tmp2, <8 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ %tmp4 = add <8 x i8> %tmp1, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vrsras16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vrsras16:
+;CHECK: vrsra.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vrshifts.v4i16(<4 x i16> %tmp2, <4 x i16> < i16 -16, i16 -16, i16 -16, i16 -16 >)
+ %tmp4 = add <4 x i16> %tmp1, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vrsras32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vrsras32:
+;CHECK: vrsra.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vrshifts.v2i32(<2 x i32> %tmp2, <2 x i32> < i32 -32, i32 -32 >)
+ %tmp4 = add <2 x i32> %tmp1, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <1 x i64> @vrsras64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vrsras64:
+;CHECK: vrsra.s64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vrshifts.v1i64(<1 x i64> %tmp2, <1 x i64> < i64 -64 >)
+ %tmp4 = add <1 x i64> %tmp1, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <8 x i8> @vrsrau8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vrsrau8:
+;CHECK: vrsra.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vrshiftu.v8i8(<8 x i8> %tmp2, <8 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ %tmp4 = add <8 x i8> %tmp1, %tmp3
+ ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vrsrau16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vrsrau16:
+;CHECK: vrsra.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vrshiftu.v4i16(<4 x i16> %tmp2, <4 x i16> < i16 -16, i16 -16, i16 -16, i16 -16 >)
+ %tmp4 = add <4 x i16> %tmp1, %tmp3
+ ret <4 x i16> %tmp4
+}
+
+define <2 x i32> @vrsrau32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vrsrau32:
+;CHECK: vrsra.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vrshiftu.v2i32(<2 x i32> %tmp2, <2 x i32> < i32 -32, i32 -32 >)
+ %tmp4 = add <2 x i32> %tmp1, %tmp3
+ ret <2 x i32> %tmp4
+}
+
+define <1 x i64> @vrsrau64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vrsrau64:
+;CHECK: vrsra.u64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = call <1 x i64> @llvm.arm.neon.vrshiftu.v1i64(<1 x i64> %tmp2, <1 x i64> < i64 -64 >)
+ %tmp4 = add <1 x i64> %tmp1, %tmp3
+ ret <1 x i64> %tmp4
+}
+
+define <16 x i8> @vrsraQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vrsraQs8:
+;CHECK: vrsra.s8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vrshifts.v16i8(<16 x i8> %tmp2, <16 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ %tmp4 = add <16 x i8> %tmp1, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vrsraQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vrsraQs16:
+;CHECK: vrsra.s16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vrshifts.v8i16(<8 x i16> %tmp2, <8 x i16> < i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16 >)
+ %tmp4 = add <8 x i16> %tmp1, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vrsraQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vrsraQs32:
+;CHECK: vrsra.s32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vrshifts.v4i32(<4 x i32> %tmp2, <4 x i32> < i32 -32, i32 -32, i32 -32, i32 -32 >)
+ %tmp4 = add <4 x i32> %tmp1, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vrsraQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vrsraQs64:
+;CHECK: vrsra.s64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vrshifts.v2i64(<2 x i64> %tmp2, <2 x i64> < i64 -64, i64 -64 >)
+ %tmp4 = add <2 x i64> %tmp1, %tmp3
+ ret <2 x i64> %tmp4
+}
+
+define <16 x i8> @vrsraQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vrsraQu8:
+;CHECK: vrsra.u8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = call <16 x i8> @llvm.arm.neon.vrshiftu.v16i8(<16 x i8> %tmp2, <16 x i8> < i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8, i8 -8 >)
+ %tmp4 = add <16 x i8> %tmp1, %tmp3
+ ret <16 x i8> %tmp4
+}
+
+define <8 x i16> @vrsraQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vrsraQu16:
+;CHECK: vrsra.u16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vrshiftu.v8i16(<8 x i16> %tmp2, <8 x i16> < i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16, i16 -16 >)
+ %tmp4 = add <8 x i16> %tmp1, %tmp3
+ ret <8 x i16> %tmp4
+}
+
+define <4 x i32> @vrsraQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vrsraQu32:
+;CHECK: vrsra.u32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vrshiftu.v4i32(<4 x i32> %tmp2, <4 x i32> < i32 -32, i32 -32, i32 -32, i32 -32 >)
+ %tmp4 = add <4 x i32> %tmp1, %tmp3
+ ret <4 x i32> %tmp4
+}
+
+define <2 x i64> @vrsraQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vrsraQu64:
+;CHECK: vrsra.u64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vrshiftu.v2i64(<2 x i64> %tmp2, <2 x i64> < i64 -64, i64 -64 >)
+ %tmp4 = add <2 x i64> %tmp1, %tmp3
+ ret <2 x i64> %tmp4
+}
+
+declare <8 x i8> @llvm.arm.neon.vrshifts.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrshifts.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrshifts.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vrshifts.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vrshiftu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrshiftu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrshiftu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vrshiftu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vrshifts.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vrshifts.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrshifts.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vrshifts.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vrshiftu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vrshiftu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrshiftu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vrshiftu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/CodeGen/ARM/vst1.ll b/test/CodeGen/ARM/vst1.ll
new file mode 100644
index 0000000..602b124
--- /dev/null
+++ b/test/CodeGen/ARM/vst1.ll
@@ -0,0 +1,93 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vst1i8:
+;CHECK: vst1.8
+ %tmp1 = load <8 x i8>* %B
+ call void @llvm.arm.neon.vst1.v8i8(i8* %A, <8 x i8> %tmp1)
+ ret void
+}
+
+define void @vst1i16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vst1i16:
+;CHECK: vst1.16
+ %tmp1 = load <4 x i16>* %B
+ call void @llvm.arm.neon.vst1.v4i16(i16* %A, <4 x i16> %tmp1)
+ ret void
+}
+
+define void @vst1i32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vst1i32:
+;CHECK: vst1.32
+ %tmp1 = load <2 x i32>* %B
+ call void @llvm.arm.neon.vst1.v2i32(i32* %A, <2 x i32> %tmp1)
+ ret void
+}
+
+define void @vst1f(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst1f:
+;CHECK: vst1.32
+ %tmp1 = load <2 x float>* %B
+ call void @llvm.arm.neon.vst1.v2f32(float* %A, <2 x float> %tmp1)
+ ret void
+}
+
+define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind {
+;CHECK: vst1i64:
+;CHECK: vst1.64
+ %tmp1 = load <1 x i64>* %B
+ call void @llvm.arm.neon.vst1.v1i64(i64* %A, <1 x i64> %tmp1)
+ ret void
+}
+
+define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind {
+;CHECK: vst1Qi8:
+;CHECK: vst1.8
+ %tmp1 = load <16 x i8>* %B
+ call void @llvm.arm.neon.vst1.v16i8(i8* %A, <16 x i8> %tmp1)
+ ret void
+}
+
+define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vst1Qi16:
+;CHECK: vst1.16
+ %tmp1 = load <8 x i16>* %B
+ call void @llvm.arm.neon.vst1.v8i16(i16* %A, <8 x i16> %tmp1)
+ ret void
+}
+
+define void @vst1Qi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vst1Qi32:
+;CHECK: vst1.32
+ %tmp1 = load <4 x i32>* %B
+ call void @llvm.arm.neon.vst1.v4i32(i32* %A, <4 x i32> %tmp1)
+ ret void
+}
+
+define void @vst1Qf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst1Qf:
+;CHECK: vst1.32
+ %tmp1 = load <4 x float>* %B
+ call void @llvm.arm.neon.vst1.v4f32(float* %A, <4 x float> %tmp1)
+ ret void
+}
+
+define void @vst1Qi64(i64* %A, <2 x i64>* %B) nounwind {
+;CHECK: vst1Qi64:
+;CHECK: vst1.64
+ %tmp1 = load <2 x i64>* %B
+ call void @llvm.arm.neon.vst1.v2i64(i64* %A, <2 x i64> %tmp1)
+ ret void
+}
+
+declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>) nounwind
+declare void @llvm.arm.neon.vst1.v4i16(i8*, <4 x i16>) nounwind
+declare void @llvm.arm.neon.vst1.v2i32(i8*, <2 x i32>) nounwind
+declare void @llvm.arm.neon.vst1.v2f32(i8*, <2 x float>) nounwind
+declare void @llvm.arm.neon.vst1.v1i64(i8*, <1 x i64>) nounwind
+
+declare void @llvm.arm.neon.vst1.v16i8(i8*, <16 x i8>) nounwind
+declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>) nounwind
+declare void @llvm.arm.neon.vst1.v4i32(i8*, <4 x i32>) nounwind
+declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>) nounwind
+declare void @llvm.arm.neon.vst1.v2i64(i8*, <2 x i64>) nounwind
diff --git a/test/CodeGen/ARM/vst2.ll b/test/CodeGen/ARM/vst2.ll
new file mode 100644
index 0000000..17d6bee
--- /dev/null
+++ b/test/CodeGen/ARM/vst2.ll
@@ -0,0 +1,84 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vst2i8:
+;CHECK: vst2.8
+ %tmp1 = load <8 x i8>* %B
+ call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1)
+ ret void
+}
+
+define void @vst2i16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vst2i16:
+;CHECK: vst2.16
+ %tmp1 = load <4 x i16>* %B
+ call void @llvm.arm.neon.vst2.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1)
+ ret void
+}
+
+define void @vst2i32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vst2i32:
+;CHECK: vst2.32
+ %tmp1 = load <2 x i32>* %B
+ call void @llvm.arm.neon.vst2.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1)
+ ret void
+}
+
+define void @vst2f(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst2f:
+;CHECK: vst2.32
+ %tmp1 = load <2 x float>* %B
+ call void @llvm.arm.neon.vst2.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1)
+ ret void
+}
+
+define void @vst2i64(i64* %A, <1 x i64>* %B) nounwind {
+;CHECK: vst2i64:
+;CHECK: vst1.64
+ %tmp1 = load <1 x i64>* %B
+ call void @llvm.arm.neon.vst2.v1i64(i64* %A, <1 x i64> %tmp1, <1 x i64> %tmp1)
+ ret void
+}
+
+define void @vst2Qi8(i8* %A, <16 x i8>* %B) nounwind {
+;CHECK: vst2Qi8:
+;CHECK: vst2.8
+ %tmp1 = load <16 x i8>* %B
+ call void @llvm.arm.neon.vst2.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1)
+ ret void
+}
+
+define void @vst2Qi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vst2Qi16:
+;CHECK: vst2.16
+ %tmp1 = load <8 x i16>* %B
+ call void @llvm.arm.neon.vst2.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1)
+ ret void
+}
+
+define void @vst2Qi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vst2Qi32:
+;CHECK: vst2.32
+ %tmp1 = load <4 x i32>* %B
+ call void @llvm.arm.neon.vst2.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1)
+ ret void
+}
+
+define void @vst2Qf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst2Qf:
+;CHECK: vst2.32
+ %tmp1 = load <4 x float>* %B
+ call void @llvm.arm.neon.vst2.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1)
+ ret void
+}
+
+declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>) nounwind
+declare void @llvm.arm.neon.vst2.v4i16(i8*, <4 x i16>, <4 x i16>) nounwind
+declare void @llvm.arm.neon.vst2.v2i32(i8*, <2 x i32>, <2 x i32>) nounwind
+declare void @llvm.arm.neon.vst2.v2f32(i8*, <2 x float>, <2 x float>) nounwind
+declare void @llvm.arm.neon.vst2.v1i64(i8*, <1 x i64>, <1 x i64>) nounwind
+
+declare void @llvm.arm.neon.vst2.v16i8(i8*, <16 x i8>, <16 x i8>) nounwind
+declare void @llvm.arm.neon.vst2.v8i16(i8*, <8 x i16>, <8 x i16>) nounwind
+declare void @llvm.arm.neon.vst2.v4i32(i8*, <4 x i32>, <4 x i32>) nounwind
+declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>) nounwind
diff --git a/test/CodeGen/ARM/vst3.ll b/test/CodeGen/ARM/vst3.ll
new file mode 100644
index 0000000..a831a0c
--- /dev/null
+++ b/test/CodeGen/ARM/vst3.ll
@@ -0,0 +1,88 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define void @vst3i8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vst3i8:
+;CHECK: vst3.8
+ %tmp1 = load <8 x i8>* %B
+ call void @llvm.arm.neon.vst3.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1)
+ ret void
+}
+
+define void @vst3i16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vst3i16:
+;CHECK: vst3.16
+ %tmp1 = load <4 x i16>* %B
+ call void @llvm.arm.neon.vst3.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1)
+ ret void
+}
+
+define void @vst3i32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vst3i32:
+;CHECK: vst3.32
+ %tmp1 = load <2 x i32>* %B
+ call void @llvm.arm.neon.vst3.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1)
+ ret void
+}
+
+define void @vst3f(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst3f:
+;CHECK: vst3.32
+ %tmp1 = load <2 x float>* %B
+ call void @llvm.arm.neon.vst3.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1)
+ ret void
+}
+
+define void @vst3i64(i64* %A, <1 x i64>* %B) nounwind {
+;CHECK: vst3i64:
+;CHECK: vst1.64
+ %tmp1 = load <1 x i64>* %B
+ call void @llvm.arm.neon.vst3.v1i64(i64* %A, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1)
+ ret void
+}
+
+define void @vst3Qi8(i8* %A, <16 x i8>* %B) nounwind {
+;CHECK: vst3Qi8:
+;CHECK: vst3.8
+;CHECK: vst3.8
+ %tmp1 = load <16 x i8>* %B
+ call void @llvm.arm.neon.vst3.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1)
+ ret void
+}
+
+define void @vst3Qi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vst3Qi16:
+;CHECK: vst3.16
+;CHECK: vst3.16
+ %tmp1 = load <8 x i16>* %B
+ call void @llvm.arm.neon.vst3.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1)
+ ret void
+}
+
+define void @vst3Qi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vst3Qi32:
+;CHECK: vst3.32
+;CHECK: vst3.32
+ %tmp1 = load <4 x i32>* %B
+ call void @llvm.arm.neon.vst3.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1)
+ ret void
+}
+
+define void @vst3Qf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst3Qf:
+;CHECK: vst3.32
+;CHECK: vst3.32
+ %tmp1 = load <4 x float>* %B
+ call void @llvm.arm.neon.vst3.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1)
+ ret void
+}
+
+declare void @llvm.arm.neon.vst3.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>) nounwind
+declare void @llvm.arm.neon.vst3.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>) nounwind
+declare void @llvm.arm.neon.vst3.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>) nounwind
+declare void @llvm.arm.neon.vst3.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>) nounwind
+declare void @llvm.arm.neon.vst3.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>) nounwind
+
+declare void @llvm.arm.neon.vst3.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>) nounwind
+declare void @llvm.arm.neon.vst3.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>) nounwind
+declare void @llvm.arm.neon.vst3.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>) nounwind
+declare void @llvm.arm.neon.vst3.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>) nounwind
diff --git a/test/CodeGen/ARM/vst4.ll b/test/CodeGen/ARM/vst4.ll
new file mode 100644
index 0000000..d92c017
--- /dev/null
+++ b/test/CodeGen/ARM/vst4.ll
@@ -0,0 +1,88 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vst4i8:
+;CHECK: vst4.8
+ %tmp1 = load <8 x i8>* %B
+ call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1)
+ ret void
+}
+
+define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vst4i16:
+;CHECK: vst4.16
+ %tmp1 = load <4 x i16>* %B
+ call void @llvm.arm.neon.vst4.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1)
+ ret void
+}
+
+define void @vst4i32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vst4i32:
+;CHECK: vst4.32
+ %tmp1 = load <2 x i32>* %B
+ call void @llvm.arm.neon.vst4.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1)
+ ret void
+}
+
+define void @vst4f(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst4f:
+;CHECK: vst4.32
+ %tmp1 = load <2 x float>* %B
+ call void @llvm.arm.neon.vst4.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1)
+ ret void
+}
+
+define void @vst4i64(i64* %A, <1 x i64>* %B) nounwind {
+;CHECK: vst4i64:
+;CHECK: vst1.64
+ %tmp1 = load <1 x i64>* %B
+ call void @llvm.arm.neon.vst4.v1i64(i64* %A, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1)
+ ret void
+}
+
+define void @vst4Qi8(i8* %A, <16 x i8>* %B) nounwind {
+;CHECK: vst4Qi8:
+;CHECK: vst4.8
+;CHECK: vst4.8
+ %tmp1 = load <16 x i8>* %B
+ call void @llvm.arm.neon.vst4.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1)
+ ret void
+}
+
+define void @vst4Qi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vst4Qi16:
+;CHECK: vst4.16
+;CHECK: vst4.16
+ %tmp1 = load <8 x i16>* %B
+ call void @llvm.arm.neon.vst4.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1)
+ ret void
+}
+
+define void @vst4Qi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vst4Qi32:
+;CHECK: vst4.32
+;CHECK: vst4.32
+ %tmp1 = load <4 x i32>* %B
+ call void @llvm.arm.neon.vst4.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1)
+ ret void
+}
+
+define void @vst4Qf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst4Qf:
+;CHECK: vst4.32
+;CHECK: vst4.32
+ %tmp1 = load <4 x float>* %B
+ call void @llvm.arm.neon.vst4.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1)
+ ret void
+}
+
+declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind
+declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) nounwind
+declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) nounwind
+declare void @llvm.arm.neon.vst4.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>) nounwind
+declare void @llvm.arm.neon.vst4.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>) nounwind
+
+declare void @llvm.arm.neon.vst4.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) nounwind
+declare void @llvm.arm.neon.vst4.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) nounwind
+declare void @llvm.arm.neon.vst4.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) nounwind
+declare void @llvm.arm.neon.vst4.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>) nounwind
diff --git a/test/CodeGen/ARM/vstlane.ll b/test/CodeGen/ARM/vstlane.ll
new file mode 100644
index 0000000..3bfb14f
--- /dev/null
+++ b/test/CodeGen/ARM/vstlane.ll
@@ -0,0 +1,197 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vst2lanei8:
+;CHECK: vst2.8
+ %tmp1 = load <8 x i8>* %B
+ call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst2lanei16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vst2lanei16:
+;CHECK: vst2.16
+ %tmp1 = load <4 x i16>* %B
+ call void @llvm.arm.neon.vst2lane.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst2lanei32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vst2lanei32:
+;CHECK: vst2.32
+ %tmp1 = load <2 x i32>* %B
+ call void @llvm.arm.neon.vst2lane.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst2lanef(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst2lanef:
+;CHECK: vst2.32
+ %tmp1 = load <2 x float>* %B
+ call void @llvm.arm.neon.vst2lane.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vst2laneQi16:
+;CHECK: vst2.16
+ %tmp1 = load <8 x i16>* %B
+ call void @llvm.arm.neon.vst2lane.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vst2laneQi32:
+;CHECK: vst2.32
+ %tmp1 = load <4 x i32>* %B
+ call void @llvm.arm.neon.vst2lane.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2)
+ ret void
+}
+
+define void @vst2laneQf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst2laneQf:
+;CHECK: vst2.32
+ %tmp1 = load <4 x float>* %B
+ call void @llvm.arm.neon.vst2lane.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, i32 3)
+ ret void
+}
+
+declare void @llvm.arm.neon.vst2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind
+declare void @llvm.arm.neon.vst2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32) nounwind
+declare void @llvm.arm.neon.vst2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind
+declare void @llvm.arm.neon.vst2lane.v2f32(i8*, <2 x float>, <2 x float>, i32) nounwind
+
+declare void @llvm.arm.neon.vst2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32) nounwind
+declare void @llvm.arm.neon.vst2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind
+declare void @llvm.arm.neon.vst2lane.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind
+
+define void @vst3lanei8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vst3lanei8:
+;CHECK: vst3.8
+ %tmp1 = load <8 x i8>* %B
+ call void @llvm.arm.neon.vst3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst3lanei16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vst3lanei16:
+;CHECK: vst3.16
+ %tmp1 = load <4 x i16>* %B
+ call void @llvm.arm.neon.vst3lane.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst3lanei32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vst3lanei32:
+;CHECK: vst3.32
+ %tmp1 = load <2 x i32>* %B
+ call void @llvm.arm.neon.vst3lane.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst3lanef(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst3lanef:
+;CHECK: vst3.32
+ %tmp1 = load <2 x float>* %B
+ call void @llvm.arm.neon.vst3lane.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vst3laneQi16:
+;CHECK: vst3.16
+ %tmp1 = load <8 x i16>* %B
+ call void @llvm.arm.neon.vst3lane.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6)
+ ret void
+}
+
+define void @vst3laneQi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vst3laneQi32:
+;CHECK: vst3.32
+ %tmp1 = load <4 x i32>* %B
+ call void @llvm.arm.neon.vst3lane.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0)
+ ret void
+}
+
+define void @vst3laneQf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst3laneQf:
+;CHECK: vst3.32
+ %tmp1 = load <4 x float>* %B
+ call void @llvm.arm.neon.vst3lane.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
+ ret void
+}
+
+declare void @llvm.arm.neon.vst3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind
+declare void @llvm.arm.neon.vst3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind
+declare void @llvm.arm.neon.vst3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind
+declare void @llvm.arm.neon.vst3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32) nounwind
+
+declare void @llvm.arm.neon.vst3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind
+declare void @llvm.arm.neon.vst3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind
+declare void @llvm.arm.neon.vst3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32) nounwind
+
+
+define void @vst4lanei8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vst4lanei8:
+;CHECK: vst4.8
+ %tmp1 = load <8 x i8>* %B
+ call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst4lanei16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vst4lanei16:
+;CHECK: vst4.16
+ %tmp1 = load <4 x i16>* %B
+ call void @llvm.arm.neon.vst4lane.v4i16(i16* %A, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst4lanei32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vst4lanei32:
+;CHECK: vst4.32
+ %tmp1 = load <2 x i32>* %B
+ call void @llvm.arm.neon.vst4lane.v2i32(i32* %A, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst4lanef(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst4lanef:
+;CHECK: vst4.32
+ %tmp1 = load <2 x float>* %B
+ call void @llvm.arm.neon.vst4lane.v2f32(float* %A, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
+ ret void
+}
+
+define void @vst4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vst4laneQi16:
+;CHECK: vst4.16
+ %tmp1 = load <8 x i16>* %B
+ call void @llvm.arm.neon.vst4lane.v8i16(i16* %A, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7)
+ ret void
+}
+
+define void @vst4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vst4laneQi32:
+;CHECK: vst4.32
+ %tmp1 = load <4 x i32>* %B
+ call void @llvm.arm.neon.vst4lane.v4i32(i32* %A, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2)
+ ret void
+}
+
+define void @vst4laneQf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst4laneQf:
+;CHECK: vst4.32
+ %tmp1 = load <4 x float>* %B
+ call void @llvm.arm.neon.vst4lane.v4f32(float* %A, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
+ ret void
+}
+
+declare void @llvm.arm.neon.vst4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind
+declare void @llvm.arm.neon.vst4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind
+declare void @llvm.arm.neon.vst4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind
+declare void @llvm.arm.neon.vst4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32) nounwind
+
+declare void @llvm.arm.neon.vst4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind
+declare void @llvm.arm.neon.vst4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind
+declare void @llvm.arm.neon.vst4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32) nounwind
diff --git a/test/CodeGen/ARM/vsub.ll b/test/CodeGen/ARM/vsub.ll
new file mode 100644
index 0000000..8f0055f
--- /dev/null
+++ b/test/CodeGen/ARM/vsub.ll
@@ -0,0 +1,277 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vsubi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsubi8:
+;CHECK: vsub.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = sub <8 x i8> %tmp1, %tmp2
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vsubi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsubi16:
+;CHECK: vsub.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = sub <4 x i16> %tmp1, %tmp2
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vsubi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsubi32:
+;CHECK: vsub.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = sub <2 x i32> %tmp1, %tmp2
+ ret <2 x i32> %tmp3
+}
+
+define <1 x i64> @vsubi64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
+;CHECK: vsubi64:
+;CHECK: vsub.i64
+ %tmp1 = load <1 x i64>* %A
+ %tmp2 = load <1 x i64>* %B
+ %tmp3 = sub <1 x i64> %tmp1, %tmp2
+ ret <1 x i64> %tmp3
+}
+
+define <2 x float> @vsubf32(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vsubf32:
+;CHECK: vsub.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = sub <2 x float> %tmp1, %tmp2
+ ret <2 x float> %tmp3
+}
+
+define <16 x i8> @vsubQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vsubQi8:
+;CHECK: vsub.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = sub <16 x i8> %tmp1, %tmp2
+ ret <16 x i8> %tmp3
+}
+
+define <8 x i16> @vsubQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vsubQi16:
+;CHECK: vsub.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = sub <8 x i16> %tmp1, %tmp2
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vsubQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vsubQi32:
+;CHECK: vsub.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = sub <4 x i32> %tmp1, %tmp2
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vsubQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vsubQi64:
+;CHECK: vsub.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = sub <2 x i64> %tmp1, %tmp2
+ ret <2 x i64> %tmp3
+}
+
+define <4 x float> @vsubQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vsubQf32:
+;CHECK: vsub.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = sub <4 x float> %tmp1, %tmp2
+ ret <4 x float> %tmp3
+}
+
+define <8 x i8> @vsubhni16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vsubhni16:
+;CHECK: vsubhn.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vsubhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vsubhni32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vsubhni32:
+;CHECK: vsubhn.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vsubhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vsubhni64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vsubhni64:
+;CHECK: vsubhn.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vsubhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vsubhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vsubhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vsubhn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <8 x i8> @vrsubhni16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vrsubhni16:
+;CHECK: vrsubhn.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vrsubhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <4 x i16> @vrsubhni32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vrsubhni32:
+;CHECK: vrsubhn.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = call <4 x i16> @llvm.arm.neon.vrsubhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
+ ret <4 x i16> %tmp3
+}
+
+define <2 x i32> @vrsubhni64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
+;CHECK: vrsubhni64:
+;CHECK: vrsubhn.i64
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i64>* %B
+ %tmp3 = call <2 x i32> @llvm.arm.neon.vrsubhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
+ ret <2 x i32> %tmp3
+}
+
+declare <8 x i8> @llvm.arm.neon.vrsubhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrsubhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrsubhn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <8 x i16> @vsubls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsubls8:
+;CHECK: vsubl.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vsubls.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vsubls16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsubls16:
+;CHECK: vsubl.s16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vsubls.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vsubls32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsubls32:
+;CHECK: vsubl.s32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vsubls.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i16> @vsublu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsublu8:
+;CHECK: vsubl.u8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vsublu.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vsublu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsublu16:
+;CHECK: vsubl.u16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vsublu.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vsublu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsublu32:
+;CHECK: vsubl.u32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vsublu.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i16> @llvm.arm.neon.vsubls.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vsubls.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vsubls.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vsublu.v8i16(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vsublu.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vsublu.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
+
+define <8 x i16> @vsubws8(<8 x i16>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsubws8:
+;CHECK: vsubw.s8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vsubws.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vsubws16(<4 x i32>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsubws16:
+;CHECK: vsubw.s16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vsubws.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vsubws32(<2 x i64>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsubws32:
+;CHECK: vsubw.s32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vsubws.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+define <8 x i16> @vsubwu8(<8 x i16>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vsubwu8:
+;CHECK: vsubw.u8
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i16> @llvm.arm.neon.vsubwu.v8i16(<8 x i16> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i16> %tmp3
+}
+
+define <4 x i32> @vsubwu16(<4 x i32>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vsubwu16:
+;CHECK: vsubw.u16
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = call <4 x i32> @llvm.arm.neon.vsubwu.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2)
+ ret <4 x i32> %tmp3
+}
+
+define <2 x i64> @vsubwu32(<2 x i64>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vsubwu32:
+;CHECK: vsubw.u32
+ %tmp1 = load <2 x i64>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = call <2 x i64> @llvm.arm.neon.vsubwu.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2)
+ ret <2 x i64> %tmp3
+}
+
+declare <8 x i16> @llvm.arm.neon.vsubws.v8i16(<8 x i16>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vsubws.v4i32(<4 x i32>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vsubws.v2i64(<2 x i64>, <2 x i32>) nounwind readnone
+
+declare <8 x i16> @llvm.arm.neon.vsubwu.v8i16(<8 x i16>, <8 x i8>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vsubwu.v4i32(<4 x i32>, <4 x i16>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vsubwu.v2i64(<2 x i64>, <2 x i32>) nounwind readnone
diff --git a/test/CodeGen/ARM/vtbl.ll b/test/CodeGen/ARM/vtbl.ll
new file mode 100644
index 0000000..9264987
--- /dev/null
+++ b/test/CodeGen/ARM/vtbl.ll
@@ -0,0 +1,109 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+%struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
+%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
+%struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
+
+define <8 x i8> @vtbl1(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vtbl1:
+;CHECK: vtbl.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = call <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8> %tmp1, <8 x i8> %tmp2)
+ ret <8 x i8> %tmp3
+}
+
+define <8 x i8> @vtbl2(<8 x i8>* %A, %struct.__neon_int8x8x2_t* %B) nounwind {
+;CHECK: vtbl2:
+;CHECK: vtbl.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load %struct.__neon_int8x8x2_t* %B
+ %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
+ %tmp5 = call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4)
+ ret <8 x i8> %tmp5
+}
+
+define <8 x i8> @vtbl3(<8 x i8>* %A, %struct.__neon_int8x8x3_t* %B) nounwind {
+;CHECK: vtbl3:
+;CHECK: vtbl.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load %struct.__neon_int8x8x3_t* %B
+ %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
+ %tmp6 = call <8 x i8> @llvm.arm.neon.vtbl3(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5)
+ ret <8 x i8> %tmp6
+}
+
+define <8 x i8> @vtbl4(<8 x i8>* %A, %struct.__neon_int8x8x4_t* %B) nounwind {
+;CHECK: vtbl4:
+;CHECK: vtbl.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load %struct.__neon_int8x8x4_t* %B
+ %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
+ %tmp7 = call <8 x i8> @llvm.arm.neon.vtbl4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6)
+ ret <8 x i8> %tmp7
+}
+
+define <8 x i8> @vtbx1(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
+;CHECK: vtbx1:
+;CHECK: vtbx.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = load <8 x i8>* %C
+ %tmp4 = call <8 x i8> @llvm.arm.neon.vtbx1(<8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
+ ret <8 x i8> %tmp4
+}
+
+define <8 x i8> @vtbx2(<8 x i8>* %A, %struct.__neon_int8x8x2_t* %B, <8 x i8>* %C) nounwind {
+;CHECK: vtbx2:
+;CHECK: vtbx.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load %struct.__neon_int8x8x2_t* %B
+ %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
+ %tmp5 = load <8 x i8>* %C
+ %tmp6 = call <8 x i8> @llvm.arm.neon.vtbx2(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5)
+ ret <8 x i8> %tmp6
+}
+
+define <8 x i8> @vtbx3(<8 x i8>* %A, %struct.__neon_int8x8x3_t* %B, <8 x i8>* %C) nounwind {
+;CHECK: vtbx3:
+;CHECK: vtbx.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load %struct.__neon_int8x8x3_t* %B
+ %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
+ %tmp6 = load <8 x i8>* %C
+ %tmp7 = call <8 x i8> @llvm.arm.neon.vtbx3(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6)
+ ret <8 x i8> %tmp7
+}
+
+define <8 x i8> @vtbx4(<8 x i8>* %A, %struct.__neon_int8x8x4_t* %B, <8 x i8>* %C) nounwind {
+;CHECK: vtbx4:
+;CHECK: vtbx.8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load %struct.__neon_int8x8x4_t* %B
+ %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
+ %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
+ %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
+ %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
+ %tmp7 = load <8 x i8>* %C
+ %tmp8 = call <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6, <8 x i8> %tmp7)
+ ret <8 x i8> %tmp8
+}
+
+declare <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8>, <8 x i8>) nounwind readnone
+declare <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <8 x i8> @llvm.arm.neon.vtbl3(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <8 x i8> @llvm.arm.neon.vtbl4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+
+declare <8 x i8> @llvm.arm.neon.vtbx1(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <8 x i8> @llvm.arm.neon.vtbx2(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <8 x i8> @llvm.arm.neon.vtbx3(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
diff --git a/test/CodeGen/ARM/vtrn.ll b/test/CodeGen/ARM/vtrn.ll
new file mode 100644
index 0000000..5122b09
--- /dev/null
+++ b/test/CodeGen/ARM/vtrn.ll
@@ -0,0 +1,97 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vtrni8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vtrni8:
+;CHECK: vtrn.8
+;CHECK-NEXT: vadd.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+ %tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+ %tmp5 = add <8 x i8> %tmp3, %tmp4
+ ret <8 x i8> %tmp5
+}
+
+define <4 x i16> @vtrni16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vtrni16:
+;CHECK: vtrn.16
+;CHECK-NEXT: vadd.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+ %tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+ %tmp5 = add <4 x i16> %tmp3, %tmp4
+ ret <4 x i16> %tmp5
+}
+
+define <2 x i32> @vtrni32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+;CHECK: vtrni32:
+;CHECK: vtrn.32
+;CHECK-NEXT: vadd.i32
+ %tmp1 = load <2 x i32>* %A
+ %tmp2 = load <2 x i32>* %B
+ %tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> <i32 0, i32 2>
+ %tmp4 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <2 x i32> <i32 1, i32 3>
+ %tmp5 = add <2 x i32> %tmp3, %tmp4
+ ret <2 x i32> %tmp5
+}
+
+define <2 x float> @vtrnf(<2 x float>* %A, <2 x float>* %B) nounwind {
+;CHECK: vtrnf:
+;CHECK: vtrn.32
+;CHECK-NEXT: vadd.f32
+ %tmp1 = load <2 x float>* %A
+ %tmp2 = load <2 x float>* %B
+ %tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <2 x i32> <i32 0, i32 2>
+ %tmp4 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <2 x i32> <i32 1, i32 3>
+ %tmp5 = add <2 x float> %tmp3, %tmp4
+ ret <2 x float> %tmp5
+}
+
+define <16 x i8> @vtrnQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vtrnQi8:
+;CHECK: vtrn.8
+;CHECK-NEXT: vadd.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
+ %tmp4 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
+ %tmp5 = add <16 x i8> %tmp3, %tmp4
+ ret <16 x i8> %tmp5
+}
+
+define <8 x i16> @vtrnQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vtrnQi16:
+;CHECK: vtrn.16
+;CHECK-NEXT: vadd.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+ %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+ %tmp5 = add <8 x i16> %tmp3, %tmp4
+ ret <8 x i16> %tmp5
+}
+
+define <4 x i32> @vtrnQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vtrnQi32:
+;CHECK: vtrn.32
+;CHECK-NEXT: vadd.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+ %tmp4 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+ %tmp5 = add <4 x i32> %tmp3, %tmp4
+ ret <4 x i32> %tmp5
+}
+
+define <4 x float> @vtrnQf(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vtrnQf:
+;CHECK: vtrn.32
+;CHECK-NEXT: vadd.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+ %tmp4 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+ %tmp5 = add <4 x float> %tmp3, %tmp4
+ ret <4 x float> %tmp5
+}
diff --git a/test/CodeGen/ARM/vuzp.ll b/test/CodeGen/ARM/vuzp.ll
new file mode 100644
index 0000000..e531718
--- /dev/null
+++ b/test/CodeGen/ARM/vuzp.ll
@@ -0,0 +1,75 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vuzpi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vuzpi8:
+;CHECK: vuzp.8
+;CHECK-NEXT: vadd.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+ %tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+ %tmp5 = add <8 x i8> %tmp3, %tmp4
+ ret <8 x i8> %tmp5
+}
+
+define <4 x i16> @vuzpi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vuzpi16:
+;CHECK: vuzp.16
+;CHECK-NEXT: vadd.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+ %tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+ %tmp5 = add <4 x i16> %tmp3, %tmp4
+ ret <4 x i16> %tmp5
+}
+
+; VUZP.32 is equivalent to VTRN.32 for 64-bit vectors.
+
+define <16 x i8> @vuzpQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vuzpQi8:
+;CHECK: vuzp.8
+;CHECK-NEXT: vadd.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
+ %tmp4 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
+ %tmp5 = add <16 x i8> %tmp3, %tmp4
+ ret <16 x i8> %tmp5
+}
+
+define <8 x i16> @vuzpQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vuzpQi16:
+;CHECK: vuzp.16
+;CHECK-NEXT: vadd.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+ %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+ %tmp5 = add <8 x i16> %tmp3, %tmp4
+ ret <8 x i16> %tmp5
+}
+
+define <4 x i32> @vuzpQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vuzpQi32:
+;CHECK: vuzp.32
+;CHECK-NEXT: vadd.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+ %tmp4 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+ %tmp5 = add <4 x i32> %tmp3, %tmp4
+ ret <4 x i32> %tmp5
+}
+
+define <4 x float> @vuzpQf(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vuzpQf:
+;CHECK: vuzp.32
+;CHECK-NEXT: vadd.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+ %tmp4 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+ %tmp5 = add <4 x float> %tmp3, %tmp4
+ ret <4 x float> %tmp5
+}
diff --git a/test/CodeGen/ARM/vzip.ll b/test/CodeGen/ARM/vzip.ll
new file mode 100644
index 0000000..32f7e0d
--- /dev/null
+++ b/test/CodeGen/ARM/vzip.ll
@@ -0,0 +1,75 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+
+define <8 x i8> @vzipi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vzipi8:
+;CHECK: vzip.8
+;CHECK-NEXT: vadd.i8
+ %tmp1 = load <8 x i8>* %A
+ %tmp2 = load <8 x i8>* %B
+ %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
+ %tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
+ %tmp5 = add <8 x i8> %tmp3, %tmp4
+ ret <8 x i8> %tmp5
+}
+
+define <4 x i16> @vzipi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vzipi16:
+;CHECK: vzip.16
+;CHECK-NEXT: vadd.i16
+ %tmp1 = load <4 x i16>* %A
+ %tmp2 = load <4 x i16>* %B
+ %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
+ %tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
+ %tmp5 = add <4 x i16> %tmp3, %tmp4
+ ret <4 x i16> %tmp5
+}
+
+; VZIP.32 is equivalent to VTRN.32 for 64-bit vectors.
+
+define <16 x i8> @vzipQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+;CHECK: vzipQi8:
+;CHECK: vzip.8
+;CHECK-NEXT: vadd.i8
+ %tmp1 = load <16 x i8>* %A
+ %tmp2 = load <16 x i8>* %B
+ %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
+ %tmp4 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
+ %tmp5 = add <16 x i8> %tmp3, %tmp4
+ ret <16 x i8> %tmp5
+}
+
+define <8 x i16> @vzipQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+;CHECK: vzipQi16:
+;CHECK: vzip.16
+;CHECK-NEXT: vadd.i16
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
+ %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
+ %tmp5 = add <8 x i16> %tmp3, %tmp4
+ ret <8 x i16> %tmp5
+}
+
+define <4 x i32> @vzipQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+;CHECK: vzipQi32:
+;CHECK: vzip.32
+;CHECK-NEXT: vadd.i32
+ %tmp1 = load <4 x i32>* %A
+ %tmp2 = load <4 x i32>* %B
+ %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
+ %tmp4 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
+ %tmp5 = add <4 x i32> %tmp3, %tmp4
+ ret <4 x i32> %tmp5
+}
+
+define <4 x float> @vzipQf(<4 x float>* %A, <4 x float>* %B) nounwind {
+;CHECK: vzipQf:
+;CHECK: vzip.32
+;CHECK-NEXT: vadd.f32
+ %tmp1 = load <4 x float>* %A
+ %tmp2 = load <4 x float>* %B
+ %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
+ %tmp4 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
+ %tmp5 = add <4 x float> %tmp3, %tmp4
+ ret <4 x float> %tmp5
+}
diff --git a/test/CodeGen/ARM/weak.ll b/test/CodeGen/ARM/weak.ll
new file mode 100644
index 0000000..5ac4b8c
--- /dev/null
+++ b/test/CodeGen/ARM/weak.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=arm | grep .weak.*f
+; RUN: llc < %s -march=arm | grep .weak.*h
+
+define weak i32 @f() {
+entry:
+ unreachable
+}
+
+define void @g() {
+entry:
+ tail call void @h( )
+ ret void
+}
+
+declare extern_weak void @h()
+
diff --git a/test/CodeGen/ARM/weak2.ll b/test/CodeGen/ARM/weak2.ll
new file mode 100644
index 0000000..cf327bb
--- /dev/null
+++ b/test/CodeGen/ARM/weak2.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=arm | grep .weak
+
+define i32 @f(i32 %a) {
+entry:
+ %tmp2 = icmp eq i32 %a, 0 ; <i1> [#uses=1]
+ %t.0 = select i1 %tmp2, i32 (...)* null, i32 (...)* @test_weak ; <i32 (...)*> [#uses=2]
+ %tmp5 = icmp eq i32 (...)* %t.0, null ; <i1> [#uses=1]
+ br i1 %tmp5, label %UnifiedReturnBlock, label %cond_true8
+
+cond_true8: ; preds = %entry
+ %tmp10 = tail call i32 (...)* %t.0( ) ; <i32> [#uses=1]
+ ret i32 %tmp10
+
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 250
+}
+
+declare extern_weak i32 @test_weak(...)
diff --git a/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll b/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll
new file mode 100644
index 0000000..87d9928
--- /dev/null
+++ b/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll
@@ -0,0 +1,17 @@
+; There should be exactly two calls here (memset and malloc), no more.
+; RUN: llc < %s -march=alpha | grep jsr | count 2
+
+%typedef.bc_struct = type opaque
+declare void @llvm.memset.i64(i8*, i8, i64, i32)
+
+define i1 @l12_l94_bc_divide_endif_2E_3_2E_ce(i32* %tmp.71.reload, i32 %scale2.1.3, i32 %extra.0, %typedef.bc_struct* %n1, %typedef.bc_struct* %n2, i32* %tmp.92.reload, i32 %tmp.94.reload, i32* %tmp.98.reload, i32 %tmp.100.reload, i8** %tmp.112.out, i32* %tmp.157.out, i8** %tmp.158.out) {
+newFuncRoot:
+ %tmp.120 = add i32 %extra.0, 2 ; <i32> [#uses=1]
+ %tmp.122 = add i32 %tmp.120, %tmp.94.reload ; <i32> [#uses=1]
+ %tmp.123 = add i32 %tmp.122, %tmp.100.reload ; <i32> [#uses=2]
+ %tmp.112 = malloc i8, i32 %tmp.123 ; <i8*> [#uses=1]
+ %tmp.137 = zext i32 %tmp.123 to i64 ; <i64> [#uses=1]
+ tail call void @llvm.memset.i64( i8* %tmp.112, i8 0, i64 %tmp.137, i32 0 )
+ ret i1 true
+}
+
diff --git a/test/CodeGen/Alpha/2005-12-12-MissingFCMov.ll b/test/CodeGen/Alpha/2005-12-12-MissingFCMov.ll
new file mode 100644
index 0000000..4b3d022
--- /dev/null
+++ b/test/CodeGen/Alpha/2005-12-12-MissingFCMov.ll
@@ -0,0 +1,40 @@
+; This shouldn't crash
+; RUN: llc < %s -march=alpha
+
[email protected]_4 = external global [44 x i8] ; <[44 x i8]*> [#uses=0]
+
+declare void @printf(i32, ...)
+
+define void @main() {
+entry:
+ %tmp.11861 = icmp slt i64 0, 1 ; <i1> [#uses=1]
+ %tmp.19466 = icmp slt i64 0, 1 ; <i1> [#uses=1]
+ %tmp.21571 = icmp slt i64 0, 1 ; <i1> [#uses=1]
+ %tmp.36796 = icmp slt i64 0, 1 ; <i1> [#uses=1]
+ br i1 %tmp.11861, label %loopexit.2, label %no_exit.2
+
+no_exit.2: ; preds = %entry
+ ret void
+
+loopexit.2: ; preds = %entry
+ br i1 %tmp.19466, label %loopexit.3, label %no_exit.3.preheader
+
+no_exit.3.preheader: ; preds = %loopexit.2
+ ret void
+
+loopexit.3: ; preds = %loopexit.2
+ br i1 %tmp.21571, label %no_exit.6, label %no_exit.4
+
+no_exit.4: ; preds = %loopexit.3
+ ret void
+
+no_exit.6: ; preds = %no_exit.6, %loopexit.3
+ %tmp.30793 = icmp sgt i64 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.30793, label %loopexit.6, label %no_exit.6
+
+loopexit.6: ; preds = %no_exit.6
+ %Z.1 = select i1 %tmp.36796, double 1.000000e+00, double 0x3FEFFF7CEDE74EAE; <double> [#uses=2]
+ tail call void (i32, ...)* @printf( i32 0, i64 0, i64 0, i64 0, double 1.000000e+00, double 1.000000e+00, double %Z.1, double %Z.1 )
+ ret void
+}
+
diff --git a/test/CodeGen/Alpha/2006-01-18-MissedGlobal.ll b/test/CodeGen/Alpha/2006-01-18-MissedGlobal.ll
new file mode 100644
index 0000000..65d2a8d
--- /dev/null
+++ b/test/CodeGen/Alpha/2006-01-18-MissedGlobal.ll
@@ -0,0 +1,27 @@
+; The global symbol should be legalized
+; RUN: llc < %s -march=alpha
+
+target datalayout = "e-p:64:64"
+ %struct.LIST_HELP = type { %struct.LIST_HELP*, i8* }
+ %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [44 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
+@clause_SORT = external global [21 x %struct.LIST_HELP*] ; <[21 x %struct.LIST_HELP*]*> [#uses=0]
+@ia_in = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=1]
+@multvec_j = external global [100 x i32] ; <[100 x i32]*> [#uses=0]
+
+define void @main(i32 %argc) {
+clock_Init.exit:
+ %tmp.5.i575 = load i32* null ; <i32> [#uses=1]
+ %tmp.309 = icmp eq i32 %tmp.5.i575, 0 ; <i1> [#uses=1]
+ br i1 %tmp.309, label %UnifiedReturnBlock, label %then.17
+
+then.17: ; preds = %clock_Init.exit
+ store %struct._IO_FILE* null, %struct._IO_FILE** @ia_in
+ %savedstack = call i8* @llvm.stacksave( ) ; <i8*> [#uses=0]
+ ret void
+
+UnifiedReturnBlock: ; preds = %clock_Init.exit
+ ret void
+}
+
+declare i8* @llvm.stacksave()
diff --git a/test/CodeGen/Alpha/2006-01-26-VaargBreak.ll b/test/CodeGen/Alpha/2006-01-26-VaargBreak.ll
new file mode 100644
index 0000000..45587f0
--- /dev/null
+++ b/test/CodeGen/Alpha/2006-01-26-VaargBreak.ll
@@ -0,0 +1,14 @@
+; This shouldn't crash
+; RUN: llc < %s -march=alpha
+
+target datalayout = "e-p:64:64"
+target triple = "alphaev6-unknown-linux-gnu"
+deplibs = [ "c", "crtend", "stdc++" ]
+ %struct.__va_list_tag = type { i8*, i32 }
+
+define i32 @emit_library_call_value(i32 %nargs, ...) {
+entry:
+ %tmp.223 = va_arg %struct.__va_list_tag* null, i32 ; <i32> [#uses=1]
+ ret i32 %tmp.223
+}
+
diff --git a/test/CodeGen/Alpha/2006-04-04-zextload.ll b/test/CodeGen/Alpha/2006-04-04-zextload.ll
new file mode 100644
index 0000000..2b28903
--- /dev/null
+++ b/test/CodeGen/Alpha/2006-04-04-zextload.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=alpha
+
+target datalayout = "e-p:64:64"
+target triple = "alphaev67-unknown-linux-gnu"
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i32, i8*, i8*, i8* }
+ %struct._Callback_list = type { %struct._Callback_list*, void (i32, %struct.ios_base*, i32)*, i32, i32 }
+ %struct._Impl = type { i32, %struct.facet**, i64, %struct.facet**, i8** }
+ %struct._Words = type { i8*, i64 }
+ %"struct.__codecvt_abstract_base<char,char,__mbstate_t>" = type { %struct.facet }
+ %"struct.basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %struct.locale }
+ %struct.facet = type { i32 (...)**, i32 }
+ %struct.ios_base = type { i32 (...)**, i64, i64, i32, i32, i32, %struct._Callback_list*, %struct._Words, [8 x %struct._Words], i32, %struct._Words*, %struct.locale }
+ %struct.locale = type { %struct._Impl* }
+ %"struct.ostreambuf_iterator<char,std::char_traits<char> >" = type { %"struct.basic_streambuf<char,std::char_traits<char> >"*, i1 }
[email protected]_unit1047 = external global %llvm.dbg.compile_unit.type ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+define void @_ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIdEES3_S3_RSt8ios_baseccT_() {
+entry:
+ %tmp234 = icmp eq i8 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp234, label %cond_next243, label %cond_true235
+
+cond_true235: ; preds = %entry
+ ret void
+
+cond_next243: ; preds = %entry
+ %tmp428 = load i64* null ; <i64> [#uses=1]
+ %tmp428.upgrd.1 = trunc i64 %tmp428 to i32 ; <i32> [#uses=1]
+ %tmp429 = alloca i8, i32 %tmp428.upgrd.1 ; <i8*> [#uses=0]
+ call void @llvm.dbg.stoppoint( i32 1146, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1047 to { }*) )
+ unreachable
+}
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*)
+
diff --git a/test/CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll b/test/CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll
new file mode 100644
index 0000000..5d31bc3
--- /dev/null
+++ b/test/CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=alpha
+
+target datalayout = "e-p:64:64"
+target triple = "alphaev67-unknown-linux-gnu"
+
+define i32 @_ZN9__gnu_cxx18__exchange_and_addEPVii(i32* %__mem, i32 %__val) {
+entry:
+ %__tmp = alloca i32, align 4 ; <i32*> [#uses=1]
+ %tmp3 = call i32 asm sideeffect "\0A$$Lxadd_0:\0A\09ldl_l $0,$3\0A\09addl $0,$4,$1\0A\09stl_c $1,$2\0A\09beq $1,$$Lxadd_0\0A\09mb", "=&r,=*&r,=*m,m,r"( i32* %__tmp, i32* %__mem, i32* %__mem, i32 %__val ) ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
+
+define void @_ZN9__gnu_cxx12__atomic_addEPVii(i32* %__mem, i32 %__val) {
+entry:
+ %tmp2 = call i32 asm sideeffect "\0A$$Ladd_1:\0A\09ldl_l $0,$2\0A\09addl $0,$3,$0\0A\09stl_c $0,$1\0A\09beq $0,$$Ladd_1\0A\09mb", "=&r,=*m,m,r"( i32* %__mem, i32* %__mem, i32 %__val ) ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/Alpha/2006-11-01-vastart.ll b/test/CodeGen/Alpha/2006-11-01-vastart.ll
new file mode 100644
index 0000000..14e0bcc
--- /dev/null
+++ b/test/CodeGen/Alpha/2006-11-01-vastart.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=alpha
+
+target datalayout = "e-p:64:64"
+target triple = "alphaev67-unknown-linux-gnu"
+ %struct.va_list = type { i8*, i32, i32 }
+
+define void @yyerror(i32, ...) {
+entry:
+ %va.upgrd.1 = bitcast %struct.va_list* null to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %va.upgrd.1 )
+ ret void
+}
+
+declare void @llvm.va_start(i8*)
+
diff --git a/test/CodeGen/Alpha/2007-11-27-mulneg3.ll b/test/CodeGen/Alpha/2007-11-27-mulneg3.ll
new file mode 100644
index 0000000..b537e25
--- /dev/null
+++ b/test/CodeGen/Alpha/2007-11-27-mulneg3.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=alpha
+
+;FIXME: this should produce no mul inst. But not crashing will have to do for now
+
+; ModuleID = 'Output/bugpoint-train/bugpoint-reduced-simplified.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
+target triple = "alphaev6-unknown-linux-gnu"
+
+define fastcc i32 @getcount(i32 %s) {
+cond_next43: ; preds = %bb27
+ %tmp431 = mul i32 %s, -3
+ ret i32 %tmp431
+}
diff --git a/test/CodeGen/Alpha/2008-11-10-smul_lohi.ll b/test/CodeGen/Alpha/2008-11-10-smul_lohi.ll
new file mode 100644
index 0000000..1a4b40e
--- /dev/null
+++ b/test/CodeGen/Alpha/2008-11-10-smul_lohi.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=alpha
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
+target triple = "alphaev6-unknown-linux-gnu"
+
+define i64 @__mulvdi3(i64 %a, i64 %b) nounwind {
+entry:
+ %0 = sext i64 %a to i128 ; <i128> [#uses=1]
+ %1 = sext i64 %b to i128 ; <i128> [#uses=1]
+ %2 = mul i128 %1, %0 ; <i128> [#uses=2]
+ %3 = lshr i128 %2, 64 ; <i128> [#uses=1]
+ %4 = trunc i128 %3 to i64 ; <i64> [#uses=1]
+ %5 = trunc i128 %2 to i64 ; <i64> [#uses=1]
+ %6 = icmp eq i64 %4, 0 ; <i1> [#uses=1]
+ br i1 %6, label %bb1, label %bb
+
+bb: ; preds = %entry
+ unreachable
+
+bb1: ; preds = %entry
+ ret i64 %5
+}
diff --git a/test/CodeGen/Alpha/2008-11-12-Add128.ll b/test/CodeGen/Alpha/2008-11-12-Add128.ll
new file mode 100644
index 0000000..8b9b603
--- /dev/null
+++ b/test/CodeGen/Alpha/2008-11-12-Add128.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s
+; PR3044
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
+target triple = "alphaev6-unknown-linux-gnu"
+
+define i128 @__mulvti3(i128 %u, i128 %v) nounwind {
+entry:
+ %0 = load i128* null, align 16 ; <i128> [#uses=1]
+ %1 = load i64* null, align 8 ; <i64> [#uses=1]
+ %2 = zext i64 %1 to i128 ; <i128> [#uses=1]
+ %3 = add i128 %2, %0 ; <i128> [#uses=1]
+ store i128 %3, i128* null, align 16
+ unreachable
+}
diff --git a/test/CodeGen/Alpha/2009-07-16-PromoteFloatCompare.ll b/test/CodeGen/Alpha/2009-07-16-PromoteFloatCompare.ll
new file mode 100644
index 0000000..cfbf7fc
--- /dev/null
+++ b/test/CodeGen/Alpha/2009-07-16-PromoteFloatCompare.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=alpha
+
+define i1 @a(float %x) {
+ %r = fcmp ult float %x, 1.0
+ ret i1 %r
+}
diff --git a/test/CodeGen/Alpha/add.ll b/test/CodeGen/Alpha/add.ll
new file mode 100644
index 0000000..24a7418
--- /dev/null
+++ b/test/CodeGen/Alpha/add.ll
@@ -0,0 +1,179 @@
+;test all the shifted and signextending adds and subs with and without consts
+;
+; RUN: llc < %s -march=alpha -o %t.s
+; RUN: grep { addl} %t.s | count 2
+; RUN: grep { addq} %t.s | count 2
+; RUN: grep { subl} %t.s | count 2
+; RUN: grep { subq} %t.s | count 1
+;
+; RUN: grep {lda \$0,-100(\$16)} %t.s | count 1
+; RUN: grep {s4addl} %t.s | count 2
+; RUN: grep {s8addl} %t.s | count 2
+; RUN: grep {s4addq} %t.s | count 2
+; RUN: grep {s8addq} %t.s | count 2
+;
+; RUN: grep {s4subl} %t.s | count 2
+; RUN: grep {s8subl} %t.s | count 2
+; RUN: grep {s4subq} %t.s | count 2
+; RUN: grep {s8subq} %t.s | count 2
+
+
+define i32 @al(i32 signext %x.s, i32 signext %y.s) signext {
+entry:
+ %tmp.3.s = add i32 %y.s, %x.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i32 @ali(i32 signext %x.s) signext {
+entry:
+ %tmp.3.s = add i32 100, %x.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i64 @aq(i64 signext %x.s, i64 signext %y.s) signext {
+entry:
+ %tmp.3.s = add i64 %y.s, %x.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i64 @aqi(i64 %x.s) {
+entry:
+ %tmp.3.s = add i64 100, %x.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i32 @sl(i32 signext %x.s, i32 signext %y.s) signext {
+entry:
+ %tmp.3.s = sub i32 %y.s, %x.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i32 @sli(i32 signext %x.s) signext {
+entry:
+ %tmp.3.s = sub i32 %x.s, 100 ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i64 @sq(i64 %x.s, i64 %y.s) {
+entry:
+ %tmp.3.s = sub i64 %y.s, %x.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i64 @sqi(i64 %x.s) {
+entry:
+ %tmp.3.s = sub i64 %x.s, 100 ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i32 @a4l(i32 signext %x.s, i32 signext %y.s) signext {
+entry:
+ %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1]
+ %tmp.3.s = add i32 %tmp.1.s, %x.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i32 @a8l(i32 signext %x.s, i32 signext %y.s) signext {
+entry:
+ %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1]
+ %tmp.3.s = add i32 %tmp.1.s, %x.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i64 @a4q(i64 %x.s, i64 %y.s) {
+entry:
+ %tmp.1.s = shl i64 %y.s, 2 ; <i64> [#uses=1]
+ %tmp.3.s = add i64 %tmp.1.s, %x.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i64 @a8q(i64 %x.s, i64 %y.s) {
+entry:
+ %tmp.1.s = shl i64 %y.s, 3 ; <i64> [#uses=1]
+ %tmp.3.s = add i64 %tmp.1.s, %x.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i32 @a4li(i32 signext %y.s) signext {
+entry:
+ %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1]
+ %tmp.3.s = add i32 100, %tmp.1.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i32 @a8li(i32 signext %y.s) signext {
+entry:
+ %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1]
+ %tmp.3.s = add i32 100, %tmp.1.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i64 @a4qi(i64 %y.s) {
+entry:
+ %tmp.1.s = shl i64 %y.s, 2 ; <i64> [#uses=1]
+ %tmp.3.s = add i64 100, %tmp.1.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i64 @a8qi(i64 %y.s) {
+entry:
+ %tmp.1.s = shl i64 %y.s, 3 ; <i64> [#uses=1]
+ %tmp.3.s = add i64 100, %tmp.1.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i32 @s4l(i32 signext %x.s, i32 signext %y.s) signext {
+entry:
+ %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1]
+ %tmp.3.s = sub i32 %tmp.1.s, %x.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i32 @s8l(i32 signext %x.s, i32 signext %y.s) signext {
+entry:
+ %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1]
+ %tmp.3.s = sub i32 %tmp.1.s, %x.s ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i64 @s4q(i64 %x.s, i64 %y.s) {
+entry:
+ %tmp.1.s = shl i64 %y.s, 2 ; <i64> [#uses=1]
+ %tmp.3.s = sub i64 %tmp.1.s, %x.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i64 @s8q(i64 %x.s, i64 %y.s) {
+entry:
+ %tmp.1.s = shl i64 %y.s, 3 ; <i64> [#uses=1]
+ %tmp.3.s = sub i64 %tmp.1.s, %x.s ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i32 @s4li(i32 signext %y.s) signext {
+entry:
+ %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1]
+ %tmp.3.s = sub i32 %tmp.1.s, 100 ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i32 @s8li(i32 signext %y.s) signext {
+entry:
+ %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1]
+ %tmp.3.s = sub i32 %tmp.1.s, 100 ; <i32> [#uses=1]
+ ret i32 %tmp.3.s
+}
+
+define i64 @s4qi(i64 %y.s) {
+entry:
+ %tmp.1.s = shl i64 %y.s, 2 ; <i64> [#uses=1]
+ %tmp.3.s = sub i64 %tmp.1.s, 100 ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
+
+define i64 @s8qi(i64 %y.s) {
+entry:
+ %tmp.1.s = shl i64 %y.s, 3 ; <i64> [#uses=1]
+ %tmp.3.s = sub i64 %tmp.1.s, 100 ; <i64> [#uses=1]
+ ret i64 %tmp.3.s
+}
diff --git a/test/CodeGen/Alpha/add128.ll b/test/CodeGen/Alpha/add128.ll
new file mode 100644
index 0000000..fa3b949
--- /dev/null
+++ b/test/CodeGen/Alpha/add128.ll
@@ -0,0 +1,9 @@
+;test for ADDC and ADDE expansion
+;
+; RUN: llc < %s -march=alpha
+
+define i128 @add128(i128 %x, i128 %y) {
+entry:
+ %tmp = add i128 %y, %x
+ ret i128 %tmp
+}
diff --git a/test/CodeGen/Alpha/bic.ll b/test/CodeGen/Alpha/bic.ll
new file mode 100644
index 0000000..9f00350
--- /dev/null
+++ b/test/CodeGen/Alpha/bic.ll
@@ -0,0 +1,9 @@
+; Make sure this testcase codegens to the bic instruction
+; RUN: llc < %s -march=alpha | grep {bic}
+
+define i64 @bar(i64 %x, i64 %y) {
+entry:
+ %tmp.1 = xor i64 %x, -1 ; <i64> [#uses=1]
+ %tmp.2 = and i64 %y, %tmp.1 ; <i64> [#uses=1]
+ ret i64 %tmp.2
+}
diff --git a/test/CodeGen/Alpha/bsr.ll b/test/CodeGen/Alpha/bsr.ll
new file mode 100644
index 0000000..14f6b46
--- /dev/null
+++ b/test/CodeGen/Alpha/bsr.ll
@@ -0,0 +1,12 @@
+; Make sure this testcase codegens the bsr instruction
+; RUN: llc < %s -march=alpha | grep bsr
+
+define internal i64 @abc(i32 %x) {
+ %tmp.2 = add i32 %x, -1 ; <i32> [#uses=1]
+ %tmp.0 = call i64 @abc( i32 %tmp.2 ) ; <i64> [#uses=1]
+ %tmp.5 = add i32 %x, -2 ; <i32> [#uses=1]
+ %tmp.3 = call i64 @abc( i32 %tmp.5 ) ; <i64> [#uses=1]
+ %tmp.6 = add i64 %tmp.0, %tmp.3 ; <i64> [#uses=1]
+ ret i64 %tmp.6
+}
+
diff --git a/test/CodeGen/Alpha/call_adj.ll b/test/CodeGen/Alpha/call_adj.ll
new file mode 100644
index 0000000..24e97a9
--- /dev/null
+++ b/test/CodeGen/Alpha/call_adj.ll
@@ -0,0 +1,13 @@
+;All this should do is not crash
+;RUN: llc < %s -march=alpha
+
+target datalayout = "e-p:64:64"
+target triple = "alphaev67-unknown-linux-gnu"
+
+define void @_ZNSt13basic_filebufIcSt11char_traitsIcEE22_M_convert_to_externalEPcl(i32 %f) {
+entry:
+ %tmp49 = alloca i8, i32 %f ; <i8*> [#uses=0]
+ %tmp = call i32 null( i8* null, i8* null, i8* null, i8* null, i8* null, i8* null, i8* null ) ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/Alpha/cmov.ll b/test/CodeGen/Alpha/cmov.ll
new file mode 100644
index 0000000..9b655f0
--- /dev/null
+++ b/test/CodeGen/Alpha/cmov.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=alpha | not grep cmovlt
+; RUN: llc < %s -march=alpha | grep cmoveq
+
+define i64 @cmov_lt(i64 %a, i64 %c) {
+entry:
+ %tmp.1 = icmp slt i64 %c, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i64 %a, i64 10 ; <i64> [#uses=1]
+ ret i64 %retval
+}
+
+define i64 @cmov_const(i64 %a, i64 %b, i64 %c) {
+entry:
+ %tmp.1 = icmp slt i64 %a, %b ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i64 %c, i64 10 ; <i64> [#uses=1]
+ ret i64 %retval
+}
+
+define i64 @cmov_lt2(i64 %a, i64 %c) {
+entry:
+ %tmp.1 = icmp sgt i64 %c, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i64 10, i64 %a ; <i64> [#uses=1]
+ ret i64 %retval
+}
diff --git a/test/CodeGen/Alpha/cmpbge.ll b/test/CodeGen/Alpha/cmpbge.ll
new file mode 100644
index 0000000..e88d2ee
--- /dev/null
+++ b/test/CodeGen/Alpha/cmpbge.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=alpha | grep cmpbge | count 2
+
+define i1 @test1(i64 %A, i64 %B) {
+ %C = and i64 %A, 255 ; <i64> [#uses=1]
+ %D = and i64 %B, 255 ; <i64> [#uses=1]
+ %E = icmp uge i64 %C, %D ; <i1> [#uses=1]
+ ret i1 %E
+}
+
+define i1 @test2(i64 %a, i64 %B) {
+ %A = shl i64 %a, 1 ; <i64> [#uses=1]
+ %C = and i64 %A, 254 ; <i64> [#uses=1]
+ %D = and i64 %B, 255 ; <i64> [#uses=1]
+ %E = icmp uge i64 %C, %D ; <i1> [#uses=1]
+ ret i1 %E
+}
diff --git a/test/CodeGen/Alpha/ctlz.ll b/test/CodeGen/Alpha/ctlz.ll
new file mode 100644
index 0000000..aa1588a
--- /dev/null
+++ b/test/CodeGen/Alpha/ctlz.ll
@@ -0,0 +1,14 @@
+; Make sure this testcase codegens to the ctlz instruction
+; RUN: llc < %s -march=alpha -mcpu=ev67 | grep -i ctlz
+; RUN: llc < %s -march=alpha -mattr=+CIX | grep -i ctlz
+; RUN: llc < %s -march=alpha -mcpu=ev6 | not grep -i ctlz
+; RUN: llc < %s -march=alpha -mattr=-CIX | not grep -i ctlz
+
+declare i8 @llvm.ctlz.i8(i8)
+
+define i32 @bar(i8 %x) {
+entry:
+ %tmp.1 = call i8 @llvm.ctlz.i8( i8 %x )
+ %tmp.2 = sext i8 %tmp.1 to i32
+ ret i32 %tmp.2
+}
diff --git a/test/CodeGen/Alpha/ctlz_e.ll b/test/CodeGen/Alpha/ctlz_e.ll
new file mode 100644
index 0000000..230e096
--- /dev/null
+++ b/test/CodeGen/Alpha/ctlz_e.ll
@@ -0,0 +1,11 @@
+; Make sure this testcase does not use ctpop
+; RUN: llc < %s -march=alpha | not grep -i ctpop
+
+declare i64 @llvm.ctlz.i64(i64)
+
+define i64 @bar(i64 %x) {
+entry:
+ %tmp.1 = call i64 @llvm.ctlz.i64( i64 %x ) ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
diff --git a/test/CodeGen/Alpha/ctpop.ll b/test/CodeGen/Alpha/ctpop.ll
new file mode 100644
index 0000000..f887882
--- /dev/null
+++ b/test/CodeGen/Alpha/ctpop.ll
@@ -0,0 +1,17 @@
+; Make sure this testcase codegens to the ctpop instruction
+; RUN: llc < %s -march=alpha -mcpu=ev67 | grep -i ctpop
+; RUN: llc < %s -march=alpha -mattr=+CIX | \
+; RUN: grep -i ctpop
+; RUN: llc < %s -march=alpha -mcpu=ev6 | \
+; RUN: not grep -i ctpop
+; RUN: llc < %s -march=alpha -mattr=-CIX | \
+; RUN: not grep -i ctpop
+
+declare i64 @llvm.ctpop.i64(i64)
+
+define i64 @bar(i64 %x) {
+entry:
+ %tmp.1 = call i64 @llvm.ctpop.i64( i64 %x ) ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
diff --git a/test/CodeGen/Alpha/dg.exp b/test/CodeGen/Alpha/dg.exp
new file mode 100644
index 0000000..fb9f710
--- /dev/null
+++ b/test/CodeGen/Alpha/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target Alpha] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll}]]
+}
diff --git a/test/CodeGen/Alpha/eqv.ll b/test/CodeGen/Alpha/eqv.ll
new file mode 100644
index 0000000..b3413d6
--- /dev/null
+++ b/test/CodeGen/Alpha/eqv.ll
@@ -0,0 +1,10 @@
+; Make sure this testcase codegens to the eqv instruction
+; RUN: llc < %s -march=alpha | grep eqv
+
+define i64 @bar(i64 %x, i64 %y) {
+entry:
+ %tmp.1 = xor i64 %x, -1 ; <i64> [#uses=1]
+ %tmp.2 = xor i64 %y, %tmp.1 ; <i64> [#uses=1]
+ ret i64 %tmp.2
+}
+
diff --git a/test/CodeGen/Alpha/i32_sub_1.ll b/test/CodeGen/Alpha/i32_sub_1.ll
new file mode 100644
index 0000000..ffeafbd
--- /dev/null
+++ b/test/CodeGen/Alpha/i32_sub_1.ll
@@ -0,0 +1,9 @@
+; Make sure this testcase codegens to the ctpop instruction
+; RUN: llc < %s -march=alpha | grep -i {subl \$16,1,\$0}
+
+
+define i32 @foo(i32 signext %x) signext {
+entry:
+ %tmp.1 = add i32 %x, -1 ; <int> [#uses=1]
+ ret i32 %tmp.1
+}
diff --git a/test/CodeGen/Alpha/illegal-element-type.ll b/test/CodeGen/Alpha/illegal-element-type.ll
new file mode 100644
index 0000000..4cf80de
--- /dev/null
+++ b/test/CodeGen/Alpha/illegal-element-type.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=alphaev6-unknown-linux-gnu
+
+define void @foo() {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ br i1 false, label %bb26, label %bb
+
+bb19: ; preds = %bb26
+ ret void
+
+bb26: ; preds = %bb
+ br i1 false, label %bb30, label %bb19
+
+bb30: ; preds = %bb26
+ br label %bb45
+
+bb45: ; preds = %bb45, %bb30
+ %V.0 = phi <8 x i16> [ %tmp42, %bb45 ], [ zeroinitializer, %bb30 ] ; <<8 x i16>> [#uses=1]
+ %tmp42 = mul <8 x i16> zeroinitializer, %V.0 ; <<8 x i16>> [#uses=1]
+ br label %bb45
+}
diff --git a/test/CodeGen/Alpha/jmp_table.ll b/test/CodeGen/Alpha/jmp_table.ll
new file mode 100644
index 0000000..917c932
--- /dev/null
+++ b/test/CodeGen/Alpha/jmp_table.ll
@@ -0,0 +1,99 @@
+; try to check that we have the most important instructions, which shouldn't
+; appear otherwise
+; RUN: llc < %s -march=alpha | grep jmp
+; RUN: llc < %s -march=alpha | grep gprel32
+; RUN: llc < %s -march=alpha | grep ldl
+; RUN: llc < %s -march=alpha | grep rodata
+; END.
+
+target datalayout = "e-p:64:64"
+target triple = "alphaev67-unknown-linux-gnu"
+@str = internal constant [2 x i8] c"1\00" ; <[2 x i8]*> [#uses=1]
+@str1 = internal constant [2 x i8] c"2\00" ; <[2 x i8]*> [#uses=1]
+@str2 = internal constant [2 x i8] c"3\00" ; <[2 x i8]*> [#uses=1]
+@str3 = internal constant [2 x i8] c"4\00" ; <[2 x i8]*> [#uses=1]
+@str4 = internal constant [2 x i8] c"5\00" ; <[2 x i8]*> [#uses=1]
+@str5 = internal constant [2 x i8] c"6\00" ; <[2 x i8]*> [#uses=1]
+@str6 = internal constant [2 x i8] c"7\00" ; <[2 x i8]*> [#uses=1]
+@str7 = internal constant [2 x i8] c"8\00" ; <[2 x i8]*> [#uses=1]
+
+define i32 @main(i32 %x, i8** %y) {
+entry:
+ %x_addr = alloca i32 ; <i32*> [#uses=2]
+ %y_addr = alloca i8** ; <i8***> [#uses=1]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %foo = alloca i8*, align 8 ; <i8**> [#uses=9]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %x, i32* %x_addr
+ store i8** %y, i8*** %y_addr
+ %tmp.upgrd.1 = load i32* %x_addr ; <i32> [#uses=1]
+ switch i32 %tmp.upgrd.1, label %bb15 [
+ i32 1, label %bb
+ i32 2, label %bb1
+ i32 3, label %bb3
+ i32 4, label %bb5
+ i32 5, label %bb7
+ i32 6, label %bb9
+ i32 7, label %bb11
+ i32 8, label %bb13
+ ]
+
+bb: ; preds = %entry
+ %tmp.upgrd.2 = getelementptr [2 x i8]* @str, i32 0, i64 0 ; <i8*> [#uses=1]
+ store i8* %tmp.upgrd.2, i8** %foo
+ br label %bb16
+
+bb1: ; preds = %entry
+ %tmp2 = getelementptr [2 x i8]* @str1, i32 0, i64 0 ; <i8*> [#uses=1]
+ store i8* %tmp2, i8** %foo
+ br label %bb16
+
+bb3: ; preds = %entry
+ %tmp4 = getelementptr [2 x i8]* @str2, i32 0, i64 0 ; <i8*> [#uses=1]
+ store i8* %tmp4, i8** %foo
+ br label %bb16
+
+bb5: ; preds = %entry
+ %tmp6 = getelementptr [2 x i8]* @str3, i32 0, i64 0 ; <i8*> [#uses=1]
+ store i8* %tmp6, i8** %foo
+ br label %bb16
+
+bb7: ; preds = %entry
+ %tmp8 = getelementptr [2 x i8]* @str4, i32 0, i64 0 ; <i8*> [#uses=1]
+ store i8* %tmp8, i8** %foo
+ br label %bb16
+
+bb9: ; preds = %entry
+ %tmp10 = getelementptr [2 x i8]* @str5, i32 0, i64 0 ; <i8*> [#uses=1]
+ store i8* %tmp10, i8** %foo
+ br label %bb16
+
+bb11: ; preds = %entry
+ %tmp12 = getelementptr [2 x i8]* @str6, i32 0, i64 0 ; <i8*> [#uses=1]
+ store i8* %tmp12, i8** %foo
+ br label %bb16
+
+bb13: ; preds = %entry
+ %tmp14 = getelementptr [2 x i8]* @str7, i32 0, i64 0 ; <i8*> [#uses=1]
+ store i8* %tmp14, i8** %foo
+ br label %bb16
+
+bb15: ; preds = %entry
+ br label %bb16
+
+bb16: ; preds = %bb15, %bb13, %bb11, %bb9, %bb7, %bb5, %bb3, %bb1, %bb
+ %tmp17 = load i8** %foo ; <i8*> [#uses=1]
+ %tmp18 = call i32 (...)* @print( i8* %tmp17 ) ; <i32> [#uses=0]
+ store i32 0, i32* %tmp
+ %tmp19 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp19, i32* %retval
+ br label %return
+
+return: ; preds = %bb16
+ %retval.upgrd.3 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval.upgrd.3
+}
+
+declare i32 @print(...)
+
diff --git a/test/CodeGen/Alpha/mb.ll b/test/CodeGen/Alpha/mb.ll
new file mode 100644
index 0000000..93e8b1b
--- /dev/null
+++ b/test/CodeGen/Alpha/mb.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=alpha | grep mb
+
+declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
+
+define void @test() {
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true , i1 true)
+ ret void
+}
diff --git a/test/CodeGen/Alpha/mul128.ll b/test/CodeGen/Alpha/mul128.ll
new file mode 100644
index 0000000..daf8409
--- /dev/null
+++ b/test/CodeGen/Alpha/mul128.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=alpha
+
+define i128 @__mulvdi3(i128 %a, i128 %b) nounwind {
+entry:
+ %r = mul i128 %a, %b
+ ret i128 %r
+}
diff --git a/test/CodeGen/Alpha/mul5.ll b/test/CodeGen/Alpha/mul5.ll
new file mode 100644
index 0000000..4075dd6
--- /dev/null
+++ b/test/CodeGen/Alpha/mul5.ll
@@ -0,0 +1,33 @@
+; Make sure this testcase does not use mulq
+; RUN: llc < %s -march=alpha | not grep -i mul
+
+define i64 @foo1(i64 %x) {
+entry:
+ %tmp.1 = mul i64 %x, 9 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i64 @foo3(i64 %x) {
+entry:
+ %tmp.1 = mul i64 %x, 259 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i64 @foo4l(i64 %x) {
+entry:
+ %tmp.1 = mul i64 %x, 260 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i64 @foo8l(i64 %x) {
+entry:
+ %tmp.1 = mul i64 %x, 768 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i64 @bar(i64 %x) {
+entry:
+ %tmp.1 = mul i64 %x, 5 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
diff --git a/test/CodeGen/Alpha/neg1.ll b/test/CodeGen/Alpha/neg1.ll
new file mode 100644
index 0000000..0db767f
--- /dev/null
+++ b/test/CodeGen/Alpha/neg1.ll
@@ -0,0 +1,7 @@
+; Make sure this testcase codegens to the lda -1 instruction
+; RUN: llc < %s -march=alpha | grep {\\-1}
+
+define i64 @bar() {
+entry:
+ ret i64 -1
+}
diff --git a/test/CodeGen/Alpha/not.ll b/test/CodeGen/Alpha/not.ll
new file mode 100644
index 0000000..4f0a5c2
--- /dev/null
+++ b/test/CodeGen/Alpha/not.ll
@@ -0,0 +1,8 @@
+; Make sure this testcase codegens to the ornot instruction
+; RUN: llc < %s -march=alpha | grep eqv
+
+define i64 @bar(i64 %x) {
+entry:
+ %tmp.1 = xor i64 %x, -1 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
diff --git a/test/CodeGen/Alpha/ornot.ll b/test/CodeGen/Alpha/ornot.ll
new file mode 100644
index 0000000..f930e34
--- /dev/null
+++ b/test/CodeGen/Alpha/ornot.ll
@@ -0,0 +1,10 @@
+; Make sure this testcase codegens to the ornot instruction
+; RUN: llc < %s -march=alpha | grep ornot
+
+define i64 @bar(i64 %x, i64 %y) {
+entry:
+ %tmp.1 = xor i64 %x, -1 ; <i64> [#uses=1]
+ %tmp.2 = or i64 %y, %tmp.1 ; <i64> [#uses=1]
+ ret i64 %tmp.2
+}
+
diff --git a/test/CodeGen/Alpha/private.ll b/test/CodeGen/Alpha/private.ll
new file mode 100644
index 0000000..26076e0
--- /dev/null
+++ b/test/CodeGen/Alpha/private.ll
@@ -0,0 +1,21 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llc < %s -march=alpha > %t
+; RUN: grep \\\$foo: %t
+; RUN: grep bsr.*\\\$\\\$foo %t
+; RUN: grep \\\$baz: %t
+; RUN: grep ldah.*\\\$baz %t
+
+declare void @foo()
+
+define private void @foo() {
+ ret void
+}
+
+@baz = private global i32 4
+
+define i32 @bar() {
+ call void @foo()
+ %1 = load i32* @baz, align 4
+ ret i32 %1
+}
diff --git a/test/CodeGen/Alpha/rpcc.ll b/test/CodeGen/Alpha/rpcc.ll
new file mode 100644
index 0000000..d6665b5
--- /dev/null
+++ b/test/CodeGen/Alpha/rpcc.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=alpha | grep rpcc
+
+declare i64 @llvm.readcyclecounter()
+
+define i64 @foo() {
+entry:
+ %tmp.1 = call i64 @llvm.readcyclecounter( ) ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
diff --git a/test/CodeGen/Alpha/srl_and.ll b/test/CodeGen/Alpha/srl_and.ll
new file mode 100644
index 0000000..3042ef3
--- /dev/null
+++ b/test/CodeGen/Alpha/srl_and.ll
@@ -0,0 +1,10 @@
+; Make sure this testcase codegens to the zapnot instruction
+; RUN: llc < %s -march=alpha | grep zapnot
+
+define i64 @foo(i64 %y) {
+entry:
+ %tmp = lshr i64 %y, 3 ; <i64> [#uses=1]
+ %tmp2 = and i64 %tmp, 8191 ; <i64> [#uses=1]
+ ret i64 %tmp2
+}
+
diff --git a/test/CodeGen/Alpha/sub128.ll b/test/CodeGen/Alpha/sub128.ll
new file mode 100644
index 0000000..d26404b
--- /dev/null
+++ b/test/CodeGen/Alpha/sub128.ll
@@ -0,0 +1,9 @@
+;test for SUBC and SUBE expansion
+;
+; RUN: llc < %s -march=alpha
+
+define i128 @sub128(i128 %x, i128 %y) {
+entry:
+ %tmp = sub i128 %y, %x
+ ret i128 %tmp
+}
diff --git a/test/CodeGen/Alpha/weak.ll b/test/CodeGen/Alpha/weak.ll
new file mode 100644
index 0000000..ff04de9
--- /dev/null
+++ b/test/CodeGen/Alpha/weak.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=alpha | grep .weak.*f
+; RUN: llc < %s -march=alpha | grep .weak.*h
+
+define weak i32 @f() {
+entry:
+ unreachable
+}
+
+define void @g() {
+entry:
+ tail call void @h( )
+ ret void
+}
+
+declare extern_weak void @h()
+
diff --git a/test/CodeGen/Alpha/wmb.ll b/test/CodeGen/Alpha/wmb.ll
new file mode 100644
index 0000000..a3e2ccf
--- /dev/null
+++ b/test/CodeGen/Alpha/wmb.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=alpha | grep wmb
+
+declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
+
+define void @test() {
+ call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true , i1 true)
+ ret void
+}
diff --git a/test/CodeGen/Alpha/zapnot.ll b/test/CodeGen/Alpha/zapnot.ll
new file mode 100644
index 0000000..d00984a
--- /dev/null
+++ b/test/CodeGen/Alpha/zapnot.ll
@@ -0,0 +1,9 @@
+; Make sure this testcase codegens to the bic instruction
+; RUN: llc < %s -march=alpha | grep zapnot
+
+
+define i16 @foo(i64 %y) zeroext {
+entry:
+ %tmp.1 = trunc i64 %y to i16 ; <ushort> [#uses=1]
+ ret i16 %tmp.1
+}
diff --git a/test/CodeGen/Alpha/zapnot2.ll b/test/CodeGen/Alpha/zapnot2.ll
new file mode 100644
index 0000000..cd3caae
--- /dev/null
+++ b/test/CodeGen/Alpha/zapnot2.ll
@@ -0,0 +1,9 @@
+; Make sure this testcase codegens to the zapnot instruction
+; RUN: llc < %s -march=alpha | grep zapnot
+
+define i64 @bar(i64 %x) {
+entry:
+ %tmp.1 = and i64 %x, 16711935 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
diff --git a/test/CodeGen/Alpha/zapnot3.ll b/test/CodeGen/Alpha/zapnot3.ll
new file mode 100644
index 0000000..f02961f
--- /dev/null
+++ b/test/CodeGen/Alpha/zapnot3.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=alpha | grep zapnot
+
+;demanded bits mess up this mask in a hard to fix way
+;define i64 @foo(i64 %y) {
+; %tmp = and i64 %y, 65535
+; %tmp2 = shr i64 %tmp, i8 3
+; ret i64 %tmp2
+;}
+
+define i64 @foo2(i64 %y) {
+ %tmp = lshr i64 %y, 3 ; <i64> [#uses=1]
+ %tmp2 = and i64 %tmp, 8191 ; <i64> [#uses=1]
+ ret i64 %tmp2
+}
+
diff --git a/test/CodeGen/Alpha/zapnot4.ll b/test/CodeGen/Alpha/zapnot4.ll
new file mode 100644
index 0000000..89beeef
--- /dev/null
+++ b/test/CodeGen/Alpha/zapnot4.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=alpha | grep zapnot
+
+define i64 @foo(i64 %y) {
+ %tmp = shl i64 %y, 3 ; <i64> [#uses=1]
+ %tmp2 = and i64 %tmp, 65535 ; <i64> [#uses=1]
+ ret i64 %tmp2
+}
diff --git a/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll b/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll
new file mode 100644
index 0000000..3ee5e8d
--- /dev/null
+++ b/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=bfin -join-liveintervals=0 -verify-machineinstrs
+
+; Provoke an error in LowerSubregsPass::LowerExtract where the live range of a
+; super-register is illegally extended.
+
+define i16 @f(i16 %x1, i16 %x2, i16 %x3, i16 %x4) {
+ %y1 = add i16 %x1, 1
+ %y2 = add i16 %x2, 2
+ %y3 = add i16 %x3, 3
+ %y4 = add i16 %x4, 4
+ %z12 = add i16 %y1, %y2
+ %z34 = add i16 %y3, %y4
+ %p = add i16 %z12, %z34
+ ret i16 %p
+}
diff --git a/test/CodeGen/Blackfin/2009-08-11-RegScavenger-CSR.ll b/test/CodeGen/Blackfin/2009-08-11-RegScavenger-CSR.ll
new file mode 100644
index 0000000..e5d1637
--- /dev/null
+++ b/test/CodeGen/Blackfin/2009-08-11-RegScavenger-CSR.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+declare i64 @llvm.cttz.i64(i64) nounwind readnone
+
+declare i16 @llvm.cttz.i16(i16) nounwind readnone
+
+declare i8 @llvm.cttz.i8(i8) nounwind readnone
+
+define void @cttztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
+ %a = call i8 @llvm.cttz.i8(i8 %A) ; <i8> [#uses=1]
+ %b = call i16 @llvm.cttz.i16(i16 %B) ; <i16> [#uses=1]
+ %d = call i64 @llvm.cttz.i64(i64 %D) ; <i64> [#uses=1]
+ store i8 %a, i8* %AP
+ store i16 %b, i16* %BP
+ store i64 %d, i64* %DP
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/2009-08-15-LiveIn-SubReg.ll b/test/CodeGen/Blackfin/2009-08-15-LiveIn-SubReg.ll
new file mode 100644
index 0000000..0b731dc
--- /dev/null
+++ b/test/CodeGen/Blackfin/2009-08-15-LiveIn-SubReg.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+; When joining live intervals of sub-registers, an MBB live-in list is not
+; updated properly. The register scavenger asserts on an undefined register.
+
+define i32 @foo(i8 %bar) {
+entry:
+ switch i8 %bar, label %bb1203 [
+ i8 117, label %bb1204
+ i8 85, label %bb1204
+ i8 106, label %bb1204
+ ]
+
+bb1203: ; preds = %entry
+ ret i32 1
+
+bb1204: ; preds = %entry, %entry, %entry
+ ret i32 2
+}
diff --git a/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll b/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll
new file mode 100644
index 0000000..dcc3ea0
--- /dev/null
+++ b/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+; LocalRewriter can forget to transfer a <def,dead> flag when setting up call
+; argument registers. This then causes register scavenger asserts.
+
+declare i32 @printf(i8*, i32, float)
+
+define i32 @testissue(i32 %i, float %x, float %y) {
+ br label %bb1
+
+bb1: ; preds = %bb1, %0
+ %x2 = fmul float %x, 5.000000e-01 ; <float> [#uses=1]
+ %y2 = fmul float %y, 0x3FECCCCCC0000000 ; <float> [#uses=1]
+ %z2 = fadd float %x2, %y2 ; <float> [#uses=1]
+ %z3 = fadd float undef, %z2 ; <float> [#uses=1]
+ %i1 = shl i32 %i, 3 ; <i32> [#uses=1]
+ %j1 = add i32 %i, 7 ; <i32> [#uses=1]
+ %m1 = add i32 %i1, %j1 ; <i32> [#uses=2]
+ %b = icmp sle i32 %m1, 6 ; <i1> [#uses=1]
+ br i1 %b, label %bb1, label %bb2
+
+bb2: ; preds = %bb1
+ %1 = call i32 @printf(i8* undef, i32 %m1, float %z3); <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Blackfin/2009-08-15-SetCC-Undef.ll b/test/CodeGen/Blackfin/2009-08-15-SetCC-Undef.ll
new file mode 100644
index 0000000..b6cd2d4
--- /dev/null
+++ b/test/CodeGen/Blackfin/2009-08-15-SetCC-Undef.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+; An undef argument causes a setugt node to escape instruction selection.
+
+define void @bugt() {
+cond_next305:
+ %tmp306307 = trunc i32 undef to i8 ; <i8> [#uses=1]
+ %tmp308 = icmp ugt i8 %tmp306307, 6 ; <i1> [#uses=1]
+ br i1 %tmp308, label %bb311, label %bb314
+
+bb311: ; preds = %cond_next305
+ unreachable
+
+bb314: ; preds = %cond_next305
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/add-overflow.ll b/test/CodeGen/Blackfin/add-overflow.ll
new file mode 100644
index 0000000..e982e43
--- /dev/null
+++ b/test/CodeGen/Blackfin/add-overflow.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
+
+ type { i24, i1 } ; type %0
+
+define i1 @func2(i24 zeroext %v1, i24 zeroext %v2) nounwind {
+entry:
+ %t = call %0 @llvm.uadd.with.overflow.i24(i24 %v1, i24 %v2) ; <%0> [#uses=1]
+ %obit = extractvalue %0 %t, 1 ; <i1> [#uses=1]
+ br i1 %obit, label %carry, label %normal
+
+normal: ; preds = %entry
+ ret i1 true
+
+carry: ; preds = %entry
+ ret i1 false
+}
+
+declare %0 @llvm.uadd.with.overflow.i24(i24, i24) nounwind
diff --git a/test/CodeGen/Blackfin/add.ll b/test/CodeGen/Blackfin/add.ll
new file mode 100644
index 0000000..3311c03
--- /dev/null
+++ b/test/CodeGen/Blackfin/add.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+define i32 @add(i32 %A, i32 %B) {
+ %R = add i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
diff --git a/test/CodeGen/Blackfin/addsub-i128.ll b/test/CodeGen/Blackfin/addsub-i128.ll
new file mode 100644
index 0000000..dd56101
--- /dev/null
+++ b/test/CodeGen/Blackfin/addsub-i128.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+; These functions have just the right size to annoy the register scavenger: They
+; use all the scratch registers, but not all the callee-saved registers.
+
+define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
+entry:
+ %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1]
+ %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
+ %tmp4 = shl i128 %tmp23, 64 ; <i128> [#uses=1]
+ %tmp5 = or i128 %tmp4, %tmp1 ; <i128> [#uses=1]
+ %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1]
+ %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1]
+ %tmp11 = shl i128 %tmp89, 64 ; <i128> [#uses=1]
+ %tmp12 = or i128 %tmp11, %tmp67 ; <i128> [#uses=1]
+ %tmp15 = add i128 %tmp12, %tmp5 ; <i128> [#uses=2]
+ %tmp1617 = trunc i128 %tmp15 to i64 ; <i64> [#uses=1]
+ store i64 %tmp1617, i64* %RL
+ %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
+ %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
+ store i64 %tmp2122, i64* %RH
+ ret void
+}
+
+define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
+entry:
+ %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1]
+ %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
+ %tmp4 = shl i128 %tmp23, 64 ; <i128> [#uses=1]
+ %tmp5 = or i128 %tmp4, %tmp1 ; <i128> [#uses=1]
+ %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1]
+ %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1]
+ %tmp11 = shl i128 %tmp89, 64 ; <i128> [#uses=1]
+ %tmp12 = or i128 %tmp11, %tmp67 ; <i128> [#uses=1]
+ %tmp15 = sub i128 %tmp5, %tmp12 ; <i128> [#uses=2]
+ %tmp1617 = trunc i128 %tmp15 to i64 ; <i64> [#uses=1]
+ store i64 %tmp1617, i64* %RL
+ %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
+ %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
+ store i64 %tmp2122, i64* %RH
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/basic-i1.ll b/test/CodeGen/Blackfin/basic-i1.ll
new file mode 100644
index 0000000..c63adab
--- /dev/null
+++ b/test/CodeGen/Blackfin/basic-i1.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=bfin > %t
+
+define i1 @add(i1 %A, i1 %B) {
+ %R = add i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @sub(i1 %A, i1 %B) {
+ %R = sub i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @mul(i1 %A, i1 %B) {
+ %R = mul i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @sdiv(i1 %A, i1 %B) {
+ %R = sdiv i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @udiv(i1 %A, i1 %B) {
+ %R = udiv i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @srem(i1 %A, i1 %B) {
+ %R = srem i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @urem(i1 %A, i1 %B) {
+ %R = urem i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @and(i1 %A, i1 %B) {
+ %R = and i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @or(i1 %A, i1 %B) {
+ %R = or i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i1 @xor(i1 %A, i1 %B) {
+ %R = xor i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %R
+}
diff --git a/test/CodeGen/Blackfin/basic-i16.ll b/test/CodeGen/Blackfin/basic-i16.ll
new file mode 100644
index 0000000..541e9a8
--- /dev/null
+++ b/test/CodeGen/Blackfin/basic-i16.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=bfin
+
+define i16 @add(i16 %A, i16 %B) {
+ %R = add i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
+
+define i16 @sub(i16 %A, i16 %B) {
+ %R = sub i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
+
+define i16 @mul(i16 %A, i16 %B) {
+ %R = mul i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
+
+define i16 @sdiv(i16 %A, i16 %B) {
+ %R = sdiv i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
+
+define i16 @udiv(i16 %A, i16 %B) {
+ %R = udiv i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
+
+define i16 @srem(i16 %A, i16 %B) {
+ %R = srem i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
+
+define i16 @urem(i16 %A, i16 %B) {
+ %R = urem i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
diff --git a/test/CodeGen/Blackfin/basic-i32.ll b/test/CodeGen/Blackfin/basic-i32.ll
new file mode 100644
index 0000000..4b5dbfcb
--- /dev/null
+++ b/test/CodeGen/Blackfin/basic-i32.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+define i32 @add(i32 %A, i32 %B) {
+ %R = add i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @sub(i32 %A, i32 %B) {
+ %R = sub i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @mul(i32 %A, i32 %B) {
+ %R = mul i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @sdiv(i32 %A, i32 %B) {
+ %R = sdiv i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @udiv(i32 %A, i32 %B) {
+ %R = udiv i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @srem(i32 %A, i32 %B) {
+ %R = srem i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @urem(i32 %A, i32 %B) {
+ %R = urem i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @and(i32 %A, i32 %B) {
+ %R = and i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @or(i32 %A, i32 %B) {
+ %R = or i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @xor(i32 %A, i32 %B) {
+ %R = xor i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
diff --git a/test/CodeGen/Blackfin/basic-i64.ll b/test/CodeGen/Blackfin/basic-i64.ll
new file mode 100644
index 0000000..d4dd8e2
--- /dev/null
+++ b/test/CodeGen/Blackfin/basic-i64.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+define i64 @add(i64 %A, i64 %B) {
+ %R = add i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @sub(i64 %A, i64 %B) {
+ %R = sub i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @mul(i64 %A, i64 %B) {
+ %R = mul i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @sdiv(i64 %A, i64 %B) {
+ %R = sdiv i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @udiv(i64 %A, i64 %B) {
+ %R = udiv i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @srem(i64 %A, i64 %B) {
+ %R = srem i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @urem(i64 %A, i64 %B) {
+ %R = urem i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @and(i64 %A, i64 %B) {
+ %R = and i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @or(i64 %A, i64 %B) {
+ %R = or i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
+
+define i64 @xor(i64 %A, i64 %B) {
+ %R = xor i64 %A, %B ; <i64> [#uses=1]
+ ret i64 %R
+}
diff --git a/test/CodeGen/Blackfin/basic-i8.ll b/test/CodeGen/Blackfin/basic-i8.ll
new file mode 100644
index 0000000..2c7ce9d
--- /dev/null
+++ b/test/CodeGen/Blackfin/basic-i8.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=bfin
+
+define i8 @add(i8 %A, i8 %B) {
+ %R = add i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @sub(i8 %A, i8 %B) {
+ %R = sub i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @mul(i8 %A, i8 %B) {
+ %R = mul i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @sdiv(i8 %A, i8 %B) {
+ %R = sdiv i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @udiv(i8 %A, i8 %B) {
+ %R = udiv i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @srem(i8 %A, i8 %B) {
+ %R = srem i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @urem(i8 %A, i8 %B) {
+ %R = urem i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @and(i8 %A, i8 %B) {
+ %R = and i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @or(i8 %A, i8 %B) {
+ %R = or i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
+
+define i8 @xor(i8 %A, i8 %B) {
+ %R = xor i8 %A, %B ; <i8> [#uses=1]
+ ret i8 %R
+}
diff --git a/test/CodeGen/Blackfin/basictest.ll b/test/CodeGen/Blackfin/basictest.ll
new file mode 100644
index 0000000..85040df
--- /dev/null
+++ b/test/CodeGen/Blackfin/basictest.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+define void @void(i32, i32) {
+ add i32 0, 0 ; <i32>:3 [#uses=2]
+ sub i32 0, 4 ; <i32>:4 [#uses=2]
+ br label %5
+
+; <label>:5 ; preds = %5, %2
+ add i32 %0, %1 ; <i32>:6 [#uses=2]
+ sub i32 %6, %4 ; <i32>:7 [#uses=1]
+ icmp sle i32 %7, %3 ; <i1>:8 [#uses=1]
+ br i1 %8, label %9, label %5
+
+; <label>:9 ; preds = %5
+ add i32 %0, %1 ; <i32>:10 [#uses=0]
+ sub i32 %6, %4 ; <i32>:11 [#uses=1]
+ icmp sle i32 %11, %3 ; <i1>:12 [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/burg.ll b/test/CodeGen/Blackfin/burg.ll
new file mode 100644
index 0000000..8cc3713
--- /dev/null
+++ b/test/CodeGen/Blackfin/burg.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
+
+ %IntList = type %struct.intlist*
+ %ReadFn = type i32 ()*
+ %YYSTYPE = type { %IntList }
+ %struct.intlist = type { i32, %IntList }
+@yyval = external global %YYSTYPE ; <%YYSTYPE*> [#uses=1]
+
+define i32 @yyparse() {
+bb0:
+ %reg254 = load i16* null ; <i16> [#uses=1]
+ %reg254-idxcast = sext i16 %reg254 to i64 ; <i64> [#uses=1]
+ %reg254-idxcast-scale = mul i64 %reg254-idxcast, -1 ; <i64> [#uses=1]
+ %reg254-idxcast-scale-offset = add i64 %reg254-idxcast-scale, 1 ; <i64> [#uses=1]
+ %reg261.idx1 = getelementptr %YYSTYPE* null, i64 %reg254-idxcast-scale-offset, i32 0 ; <%IntList*> [#uses=1]
+ %reg261 = load %IntList* %reg261.idx1 ; <%IntList> [#uses=1]
+ store %IntList %reg261, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ unreachable
+}
diff --git a/test/CodeGen/Blackfin/cmp-small-imm.ll b/test/CodeGen/Blackfin/cmp-small-imm.ll
new file mode 100644
index 0000000..e1732a8
--- /dev/null
+++ b/test/CodeGen/Blackfin/cmp-small-imm.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=bfin > %t
+
+define i1 @cmp3(i32 %A) {
+ %R = icmp uge i32 %A, 2
+ ret i1 %R
+}
diff --git a/test/CodeGen/Blackfin/cmp64.ll b/test/CodeGen/Blackfin/cmp64.ll
new file mode 100644
index 0000000..ef5bf45
--- /dev/null
+++ b/test/CodeGen/Blackfin/cmp64.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=bfin
+
+; This test tries to use a JustCC register as a data operand for MOVEcc. It
+; calls copyRegToReg(JustCC -> DP), failing because JustCC can only be copied to
+; D. The proper solution would be to restrict the virtual register to D only.
+
+define i32 @main() {
+entry:
+ br label %loopentry
+
+loopentry:
+ %done = icmp sle i64 undef, 5
+ br i1 %done, label %loopentry, label %exit.1
+
+exit.1:
+ ret i32 0
+}
diff --git a/test/CodeGen/Blackfin/ct32.ll b/test/CodeGen/Blackfin/ct32.ll
new file mode 100644
index 0000000..363286d
--- /dev/null
+++ b/test/CodeGen/Blackfin/ct32.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=bfin
+
+declare i32 @llvm.ctlz.i32(i32)
+declare i32 @llvm.cttz.i32(i32)
+declare i32 @llvm.ctpop.i32(i32)
+
+define i32 @ctlztest(i32 %B) {
+ %b = call i32 @llvm.ctlz.i32( i32 %B )
+ ret i32 %b
+}
+
+define i32 @cttztest(i32 %B) {
+ %b = call i32 @llvm.cttz.i32( i32 %B )
+ ret i32 %b
+}
+
+define i32 @ctpoptest(i32 %B) {
+ %b = call i32 @llvm.ctpop.i32( i32 %B )
+ ret i32 %b
+}
diff --git a/test/CodeGen/Blackfin/ct64.ll b/test/CodeGen/Blackfin/ct64.ll
new file mode 100644
index 0000000..7502434
--- /dev/null
+++ b/test/CodeGen/Blackfin/ct64.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=bfin
+
+declare i64 @llvm.ctlz.i64(i64)
+declare i64 @llvm.cttz.i64(i64)
+declare i64 @llvm.ctpop.i64(i64)
+
+define i64 @ctlztest(i64 %B) {
+ %b = call i64 @llvm.ctlz.i64( i64 %B )
+ ret i64 %b
+}
+
+define i64 @cttztest(i64 %B) {
+ %b = call i64 @llvm.cttz.i64( i64 %B )
+ ret i64 %b
+}
+
+define i64 @ctpoptest(i64 %B) {
+ %b = call i64 @llvm.ctpop.i64( i64 %B )
+ ret i64 %b
+}
diff --git a/test/CodeGen/Blackfin/ctlz16.ll b/test/CodeGen/Blackfin/ctlz16.ll
new file mode 100644
index 0000000..eb4af23
--- /dev/null
+++ b/test/CodeGen/Blackfin/ctlz16.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=bfin
+
+declare i16 @llvm.ctlz.i16(i16)
+
+define i16 @ctlztest(i16 %B) {
+ %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+define i16 @ctlztest_z(i16 zeroext %B) {
+ %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+
+define i16 @ctlztest_s(i16 signext %B) {
+ %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+
diff --git a/test/CodeGen/Blackfin/ctlz64.ll b/test/CodeGen/Blackfin/ctlz64.ll
new file mode 100644
index 0000000..3e22f88
--- /dev/null
+++ b/test/CodeGen/Blackfin/ctlz64.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
+
[email protected] = external constant [14 x i8] ; <[14 x i8]*> [#uses=1]
+
+define i32 @main(i64 %arg) nounwind {
+entry:
+ %tmp47 = tail call i64 @llvm.cttz.i64(i64 %arg) ; <i64> [#uses=1]
+ %tmp48 = trunc i64 %tmp47 to i32 ; <i32> [#uses=1]
+ %tmp40 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([14 x i8]* @.str, i32 0, i32 0), i64 %arg, i32 0, i32 %tmp48, i32 0) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8* noalias, ...) nounwind
+
+declare i64 @llvm.cttz.i64(i64) nounwind readnone
diff --git a/test/CodeGen/Blackfin/ctpop16.ll b/test/CodeGen/Blackfin/ctpop16.ll
new file mode 100644
index 0000000..8b6c07e
--- /dev/null
+++ b/test/CodeGen/Blackfin/ctpop16.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=bfin
+
+declare i16 @llvm.ctpop.i16(i16)
+
+define i16 @ctpoptest(i16 %B) {
+ %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+define i16 @ctpoptest_z(i16 zeroext %B) {
+ %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+
+define i16 @ctpoptest_s(i16 signext %B) {
+ %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+
diff --git a/test/CodeGen/Blackfin/cttz16.ll b/test/CodeGen/Blackfin/cttz16.ll
new file mode 100644
index 0000000..510882a
--- /dev/null
+++ b/test/CodeGen/Blackfin/cttz16.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=bfin
+
+declare i16 @llvm.cttz.i16(i16)
+
+define i16 @cttztest(i16 %B) {
+ %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+define i16 @cttztest_z(i16 zeroext %B) {
+ %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+
+define i16 @cttztest_s(i16 signext %B) {
+ %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
+ ret i16 %b
+}
+
diff --git a/test/CodeGen/Blackfin/cycles.ll b/test/CodeGen/Blackfin/cycles.ll
new file mode 100644
index 0000000..6451c74
--- /dev/null
+++ b/test/CodeGen/Blackfin/cycles.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=bfin | FileCheck %s
+
+declare i64 @llvm.readcyclecounter()
+
+; CHECK: cycles
+; CHECK: cycles2
+define i64 @cyc64() {
+ %tmp.1 = call i64 @llvm.readcyclecounter()
+ ret i64 %tmp.1
+}
+
+; CHECK: cycles
+define i32@cyc32() {
+ %tmp.1 = call i64 @llvm.readcyclecounter()
+ %s = trunc i64 %tmp.1 to i32
+ ret i32 %s
+}
diff --git a/test/CodeGen/Blackfin/dg.exp b/test/CodeGen/Blackfin/dg.exp
new file mode 100644
index 0000000..5fdbe5f
--- /dev/null
+++ b/test/CodeGen/Blackfin/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target Blackfin] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/Blackfin/double-cast.ll b/test/CodeGen/Blackfin/double-cast.ll
new file mode 100644
index 0000000..815ca79
--- /dev/null
+++ b/test/CodeGen/Blackfin/double-cast.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=bfin
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %1 = call i32 (i8*, ...)* @printf(i8* undef, double undef)
+ ret i32 0
+}
diff --git a/test/CodeGen/Blackfin/frameindex.ll b/test/CodeGen/Blackfin/frameindex.ll
new file mode 100644
index 0000000..7e677fb
--- /dev/null
+++ b/test/CodeGen/Blackfin/frameindex.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+declare i32 @SIM(i8*, i8*, i32, i32, i32, [256 x i32]*, i32, i32, i32)
+
+define void @foo() {
+bb0:
+ %V = alloca [256 x i32], i32 256 ; <[256 x i32]*> [#uses=1]
+ %0 = call i32 @SIM(i8* null, i8* null, i32 0, i32 0, i32 0, [256 x i32]* %V, i32 0, i32 0, i32 2) ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/i17mem.ll b/test/CodeGen/Blackfin/i17mem.ll
new file mode 100644
index 0000000..bc5ade7
--- /dev/null
+++ b/test/CodeGen/Blackfin/i17mem.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+@i17_l = external global i17 ; <i17*> [#uses=1]
+@i17_s = external global i17 ; <i17*> [#uses=1]
+
+define void @i17_ls() nounwind {
+ %tmp = load i17* @i17_l ; <i17> [#uses=1]
+ store i17 %tmp, i17* @i17_s
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/i1mem.ll b/test/CodeGen/Blackfin/i1mem.ll
new file mode 100644
index 0000000..cb03e3d
--- /dev/null
+++ b/test/CodeGen/Blackfin/i1mem.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+@i1_l = external global i1 ; <i1*> [#uses=1]
+@i1_s = external global i1 ; <i1*> [#uses=1]
+
+define void @i1_ls() nounwind {
+ %tmp = load i1* @i1_l ; <i1> [#uses=1]
+ store i1 %tmp, i1* @i1_s
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/i1ops.ll b/test/CodeGen/Blackfin/i1ops.ll
new file mode 100644
index 0000000..6b5612c
--- /dev/null
+++ b/test/CodeGen/Blackfin/i1ops.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+define i32 @adj(i32 %d.1, i32 %ct.1) {
+entry:
+ %tmp.22.not = trunc i32 %ct.1 to i1 ; <i1> [#uses=1]
+ %tmp.221 = xor i1 %tmp.22.not, true ; <i1> [#uses=1]
+ %tmp.26 = or i1 false, %tmp.221 ; <i1> [#uses=1]
+ %tmp.27 = zext i1 %tmp.26 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.27
+}
diff --git a/test/CodeGen/Blackfin/i216mem.ll b/test/CodeGen/Blackfin/i216mem.ll
new file mode 100644
index 0000000..9f8cf48
--- /dev/null
+++ b/test/CodeGen/Blackfin/i216mem.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+@i216_l = external global i216 ; <i216*> [#uses=1]
+@i216_s = external global i216 ; <i216*> [#uses=1]
+
+define void @i216_ls() nounwind {
+ %tmp = load i216* @i216_l ; <i216> [#uses=1]
+ store i216 %tmp, i216* @i216_s
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/i248mem.ll b/test/CodeGen/Blackfin/i248mem.ll
new file mode 100644
index 0000000..db23f54
--- /dev/null
+++ b/test/CodeGen/Blackfin/i248mem.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=bfin
+@i248_l = external global i248 ; <i248*> [#uses=1]
+@i248_s = external global i248 ; <i248*> [#uses=1]
+
+define void @i248_ls() nounwind {
+ %tmp = load i248* @i248_l ; <i248> [#uses=1]
+ store i248 %tmp, i248* @i248_s
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/i256mem.ll b/test/CodeGen/Blackfin/i256mem.ll
new file mode 100644
index 0000000..bc5ade7
--- /dev/null
+++ b/test/CodeGen/Blackfin/i256mem.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+@i17_l = external global i17 ; <i17*> [#uses=1]
+@i17_s = external global i17 ; <i17*> [#uses=1]
+
+define void @i17_ls() nounwind {
+ %tmp = load i17* @i17_l ; <i17> [#uses=1]
+ store i17 %tmp, i17* @i17_s
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/i256param.ll b/test/CodeGen/Blackfin/i256param.ll
new file mode 100644
index 0000000..df74c9a
--- /dev/null
+++ b/test/CodeGen/Blackfin/i256param.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+@i256_s = external global i256 ; <i256*> [#uses=1]
+
+define void @i256_ls(i256 %x) nounwind {
+ store i256 %x, i256* @i256_s
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/i56param.ll b/test/CodeGen/Blackfin/i56param.ll
new file mode 100644
index 0000000..ca02563
--- /dev/null
+++ b/test/CodeGen/Blackfin/i56param.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+@i56_l = external global i56 ; <i56*> [#uses=1]
+@i56_s = external global i56 ; <i56*> [#uses=1]
+
+define void @i56_ls(i56 %x) nounwind {
+ store i56 %x, i56* @i56_s
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/i8mem.ll b/test/CodeGen/Blackfin/i8mem.ll
new file mode 100644
index 0000000..ea3a67e
--- /dev/null
+++ b/test/CodeGen/Blackfin/i8mem.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=bfin
+
+@i8_l = external global i8 ; <i8*> [#uses=1]
+@i8_s = external global i8 ; <i8*> [#uses=1]
+
+define void @i8_ls() nounwind {
+ %tmp = load i8* @i8_l ; <i8> [#uses=1]
+ store i8 %tmp, i8* @i8_s
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/inline-asm.ll b/test/CodeGen/Blackfin/inline-asm.ll
new file mode 100644
index 0000000..d623f6b
--- /dev/null
+++ b/test/CodeGen/Blackfin/inline-asm.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=bfin | FileCheck %s
+
+; Standard "r"
+; CHECK: r0 = r0 + r1;
+define i32 @add_r(i32 %A, i32 %B) {
+ %R = call i32 asm "$0 = $1 + $2;", "=r,r,r"( i32 %A, i32 %B ) nounwind
+ ret i32 %R
+}
+
+; Target "d"
+; CHECK: r0 = r0 - r1;
+define i32 @add_d(i32 %A, i32 %B) {
+ %R = call i32 asm "$0 = $1 - $2;", "=d,d,d"( i32 %A, i32 %B ) nounwind
+ ret i32 %R
+}
+
+; Target "a" for P-regs
+; CHECK: p0 = (p0 + p1) << 1;
+define i32 @add_a(i32 %A, i32 %B) {
+ %R = call i32 asm "$0 = ($1 + $2) << 1;", "=a,a,a"( i32 %A, i32 %B ) nounwind
+ ret i32 %R
+}
+
+; Target "z" for P0, P1, P2. This is not a real regclass
+; CHECK: p0 = (p0 + p1) << 2;
+define i32 @add_Z(i32 %A, i32 %B) {
+ %R = call i32 asm "$0 = ($1 + $2) << 2;", "=z,z,z"( i32 %A, i32 %B ) nounwind
+ ret i32 %R
+}
+
+; Target "C" for CC. This is a single register
+; CHECK: cc = p0 < p1;
+; CHECK: r0 = cc;
+define i32 @add_C(i32 %A, i32 %B) {
+ %R = call i32 asm "$0 = $1 < $2;", "=C,z,z"( i32 %A, i32 %B ) nounwind
+ ret i32 %R
+}
+
diff --git a/test/CodeGen/Blackfin/int-setcc.ll b/test/CodeGen/Blackfin/int-setcc.ll
new file mode 100644
index 0000000..6bd9f86
--- /dev/null
+++ b/test/CodeGen/Blackfin/int-setcc.ll
@@ -0,0 +1,80 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
+
+define fastcc void @Evaluate() {
+entry:
+ br i1 false, label %cond_false186, label %cond_true
+
+cond_true: ; preds = %entry
+ ret void
+
+cond_false186: ; preds = %entry
+ br i1 false, label %cond_true293, label %bb203
+
+bb203: ; preds = %cond_false186
+ ret void
+
+cond_true293: ; preds = %cond_false186
+ br i1 false, label %cond_true298, label %cond_next317
+
+cond_true298: ; preds = %cond_true293
+ br i1 false, label %cond_next518, label %cond_true397.preheader
+
+cond_next317: ; preds = %cond_true293
+ ret void
+
+cond_true397.preheader: ; preds = %cond_true298
+ ret void
+
+cond_next518: ; preds = %cond_true298
+ br i1 false, label %bb1069, label %cond_true522
+
+cond_true522: ; preds = %cond_next518
+ ret void
+
+bb1069: ; preds = %cond_next518
+ br i1 false, label %cond_next1131, label %bb1096
+
+bb1096: ; preds = %bb1069
+ ret void
+
+cond_next1131: ; preds = %bb1069
+ br i1 false, label %cond_next1207, label %cond_true1150
+
+cond_true1150: ; preds = %cond_next1131
+ ret void
+
+cond_next1207: ; preds = %cond_next1131
+ br i1 false, label %cond_next1219, label %cond_true1211
+
+cond_true1211: ; preds = %cond_next1207
+ ret void
+
+cond_next1219: ; preds = %cond_next1207
+ br i1 false, label %cond_true1223, label %cond_next1283
+
+cond_true1223: ; preds = %cond_next1219
+ br i1 false, label %cond_true1254, label %cond_true1264
+
+cond_true1254: ; preds = %cond_true1223
+ br i1 false, label %bb1567, label %cond_true1369.preheader
+
+cond_true1264: ; preds = %cond_true1223
+ ret void
+
+cond_next1283: ; preds = %cond_next1219
+ ret void
+
+cond_true1369.preheader: ; preds = %cond_true1254
+ ret void
+
+bb1567: ; preds = %cond_true1254
+ %tmp1605 = load i8* null ; <i8> [#uses=1]
+ %tmp1606 = icmp eq i8 %tmp1605, 0 ; <i1> [#uses=1]
+ br i1 %tmp1606, label %cond_next1637, label %cond_true1607
+
+cond_true1607: ; preds = %bb1567
+ ret void
+
+cond_next1637: ; preds = %bb1567
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/invalid-apint.ll b/test/CodeGen/Blackfin/invalid-apint.ll
new file mode 100644
index 0000000..a8c01ba
--- /dev/null
+++ b/test/CodeGen/Blackfin/invalid-apint.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=bfin
+
+; Assertion failed: (width < BitWidth && "Invalid APInt Truncate request"),
+; function trunc, file APInt.cpp, line 956.
+
+@str2 = external global [29 x i8]
+
+define void @printArgsNoRet(i32 %a1, float %a2, i8 %a3, double %a4, i8* %a5, i32 %a6, float %a7, i8 %a8, double %a9, i8* %a10, i32 %a11, float %a12, i8 %a13, double %a14, i8* %a15) {
+entry:
+ %tmp17 = sext i8 %a13 to i32
+ %tmp23 = call i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @str2, i32 0, i64 0), i32 %a11, double 0.000000e+00, i32 %tmp17, double %a14, i32 0)
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/Blackfin/jumptable.ll b/test/CodeGen/Blackfin/jumptable.ll
new file mode 100644
index 0000000..5f49e9d
--- /dev/null
+++ b/test/CodeGen/Blackfin/jumptable.ll
@@ -0,0 +1,53 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs | FileCheck %s
+
+; CHECK: .section .rodata
+; CHECK: JTI1_0:
+; CHECK: .long .BB1_1
+
+define i32 @oper(i32 %op, i32 %A, i32 %B) {
+entry:
+ switch i32 %op, label %bbx [
+ i32 1 , label %bb1
+ i32 2 , label %bb2
+ i32 3 , label %bb3
+ i32 4 , label %bb4
+ i32 5 , label %bb5
+ i32 6 , label %bb6
+ i32 7 , label %bb7
+ i32 8 , label %bb8
+ i32 9 , label %bb9
+ i32 10, label %bb10
+ ]
+bb1:
+ %R1 = add i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R1
+bb2:
+ %R2 = sub i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R2
+bb3:
+ %R3 = mul i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R3
+bb4:
+ %R4 = sdiv i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R4
+bb5:
+ %R5 = udiv i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R5
+bb6:
+ %R6 = srem i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R6
+bb7:
+ %R7 = urem i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R7
+bb8:
+ %R8 = and i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R8
+bb9:
+ %R9 = or i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R9
+bb10:
+ %R10 = xor i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R10
+bbx:
+ ret i32 0
+}
diff --git a/test/CodeGen/Blackfin/large-switch.ll b/test/CodeGen/Blackfin/large-switch.ll
new file mode 100644
index 0000000..02d32ef
--- /dev/null
+++ b/test/CodeGen/Blackfin/large-switch.ll
@@ -0,0 +1,187 @@
+; RUN: llc < %s -march=bfin
+
+; The switch expansion uses a dynamic shl, and it produces a jumptable
+
+define void @athlon_fp_unit_ready_cost() {
+entry:
+ switch i32 0, label %UnifiedReturnBlock [
+ i32 -1, label %bb2063
+ i32 19, label %bb2035
+ i32 20, label %bb2035
+ i32 21, label %bb2035
+ i32 23, label %bb2035
+ i32 24, label %bb2035
+ i32 27, label %bb2035
+ i32 32, label %bb2035
+ i32 33, label %bb1994
+ i32 35, label %bb2035
+ i32 36, label %bb1994
+ i32 90, label %bb1948
+ i32 94, label %bb1948
+ i32 95, label %bb1948
+ i32 133, label %bb1419
+ i32 135, label %bb1238
+ i32 136, label %bb1238
+ i32 137, label %bb1238
+ i32 138, label %bb1238
+ i32 139, label %bb1201
+ i32 140, label %bb1201
+ i32 141, label %bb1154
+ i32 142, label %bb1126
+ i32 144, label %bb1201
+ i32 145, label %bb1126
+ i32 146, label %bb1201
+ i32 147, label %bb1126
+ i32 148, label %bb1201
+ i32 149, label %bb1126
+ i32 150, label %bb1201
+ i32 151, label %bb1126
+ i32 152, label %bb1096
+ i32 153, label %bb1096
+ i32 154, label %bb1096
+ i32 157, label %bb1096
+ i32 158, label %bb1096
+ i32 159, label %bb1096
+ i32 162, label %bb1096
+ i32 163, label %bb1096
+ i32 164, label %bb1096
+ i32 167, label %bb1201
+ i32 168, label %bb1201
+ i32 170, label %bb1201
+ i32 171, label %bb1201
+ i32 173, label %bb1201
+ i32 174, label %bb1201
+ i32 176, label %bb1201
+ i32 177, label %bb1201
+ i32 179, label %bb993
+ i32 180, label %bb993
+ i32 181, label %bb993
+ i32 182, label %bb993
+ i32 183, label %bb993
+ i32 184, label %bb993
+ i32 365, label %bb1126
+ i32 366, label %bb1126
+ i32 367, label %bb1126
+ i32 368, label %bb1126
+ i32 369, label %bb1126
+ i32 370, label %bb1126
+ i32 371, label %bb1126
+ i32 372, label %bb1126
+ i32 373, label %bb1126
+ i32 384, label %bb1126
+ i32 385, label %bb1126
+ i32 386, label %bb1126
+ i32 387, label %bb1126
+ i32 388, label %bb1126
+ i32 389, label %bb1126
+ i32 390, label %bb1126
+ i32 391, label %bb1126
+ i32 392, label %bb1126
+ i32 525, label %bb919
+ i32 526, label %bb839
+ i32 528, label %bb919
+ i32 529, label %bb839
+ i32 532, label %cond_next6.i97
+ i32 533, label %cond_next6.i81
+ i32 534, label %bb495
+ i32 536, label %cond_next6.i81
+ i32 537, label %cond_next6.i81
+ i32 538, label %bb396
+ i32 539, label %bb288
+ i32 541, label %bb396
+ i32 542, label %bb396
+ i32 543, label %bb396
+ i32 544, label %bb396
+ i32 545, label %bb189
+ i32 546, label %cond_next6.i
+ i32 547, label %bb189
+ i32 548, label %cond_next6.i
+ i32 549, label %bb189
+ i32 550, label %cond_next6.i
+ i32 551, label %bb189
+ i32 552, label %cond_next6.i
+ i32 553, label %bb189
+ i32 554, label %cond_next6.i
+ i32 555, label %bb189
+ i32 556, label %cond_next6.i
+ i32 557, label %bb189
+ i32 558, label %cond_next6.i
+ i32 618, label %bb40
+ i32 619, label %bb18
+ i32 620, label %bb40
+ i32 621, label %bb10
+ i32 622, label %bb10
+ ]
+
+bb10:
+ ret void
+
+bb18:
+ ret void
+
+bb40:
+ ret void
+
+cond_next6.i:
+ ret void
+
+bb189:
+ ret void
+
+bb288:
+ ret void
+
+bb396:
+ ret void
+
+bb495:
+ ret void
+
+cond_next6.i81:
+ ret void
+
+cond_next6.i97:
+ ret void
+
+bb839:
+ ret void
+
+bb919:
+ ret void
+
+bb993:
+ ret void
+
+bb1096:
+ ret void
+
+bb1126:
+ ret void
+
+bb1154:
+ ret void
+
+bb1201:
+ ret void
+
+bb1238:
+ ret void
+
+bb1419:
+ ret void
+
+bb1948:
+ ret void
+
+bb1994:
+ ret void
+
+bb2035:
+ ret void
+
+bb2063:
+ ret void
+
+UnifiedReturnBlock:
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/load-i16.ll b/test/CodeGen/Blackfin/load-i16.ll
new file mode 100644
index 0000000..eb18d41
--- /dev/null
+++ b/test/CodeGen/Blackfin/load-i16.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+; This somewhat contrived function heavily exercises register classes
+; It can trick -join-cross-class-copies into making illegal joins
+
+define void @f(i16** nocapture %p) nounwind readonly {
+entry:
+ %tmp1 = load i16** %p ; <i16*> [#uses=1]
+ %tmp2 = load i16* %tmp1 ; <i16> [#uses=1]
+ %ptr = getelementptr i16* %tmp1, i16 %tmp2
+ store i16 %tmp2, i16* %ptr
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/logic-i16.ll b/test/CodeGen/Blackfin/logic-i16.ll
new file mode 100644
index 0000000..e44672f
--- /dev/null
+++ b/test/CodeGen/Blackfin/logic-i16.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=bfin
+
+define i16 @and(i16 %A, i16 %B) {
+ %R = and i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
+
+define i16 @or(i16 %A, i16 %B) {
+ %R = or i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
+
+define i16 @xor(i16 %A, i16 %B) {
+ %R = xor i16 %A, %B ; <i16> [#uses=1]
+ ret i16 %R
+}
diff --git a/test/CodeGen/Blackfin/many-args.ll b/test/CodeGen/Blackfin/many-args.ll
new file mode 100644
index 0000000..8c52874
--- /dev/null
+++ b/test/CodeGen/Blackfin/many-args.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+
+ type { i32, float, float, float, float, float, float, float, float, float, float } ; type %0
+ %struct..s_segment_inf = type { float, i32, i16, i16, float, float, i32, float, float }
+
+define i32 @main(i32 %argc.1, i8** %argv.1) {
+entry:
+ %tmp.218 = load float* null ; <float> [#uses=1]
+ %tmp.219 = getelementptr %0* null, i64 0, i32 6 ; <float*> [#uses=1]
+ %tmp.220 = load float* %tmp.219 ; <float> [#uses=1]
+ %tmp.221 = getelementptr %0* null, i64 0, i32 7 ; <float*> [#uses=1]
+ %tmp.222 = load float* %tmp.221 ; <float> [#uses=1]
+ %tmp.223 = getelementptr %0* null, i64 0, i32 8 ; <float*> [#uses=1]
+ %tmp.224 = load float* %tmp.223 ; <float> [#uses=1]
+ %tmp.225 = getelementptr %0* null, i64 0, i32 9 ; <float*> [#uses=1]
+ %tmp.226 = load float* %tmp.225 ; <float> [#uses=1]
+ %tmp.227 = getelementptr %0* null, i64 0, i32 10 ; <float*> [#uses=1]
+ %tmp.228 = load float* %tmp.227 ; <float> [#uses=1]
+ call void @place_and_route(i32 0, i32 0, float 0.000000e+00, i32 0, i32 0, i8* null, i32 0, i32 0, i8* null, i8* null, i8* null, i8* null, i32 0, i32 0, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i32 0, i32 0, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i16 0, i16 0, i16 0, float 0.000000e+00, float 0.000000e+00, %struct..s_segment_inf* null, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float %tmp.218, float %tmp.220, float %tmp.222, float %tmp.224, float %tmp.226, float %tmp.228)
+ ret i32 0
+}
+
+declare void @place_and_route(i32, i32, float, i32, i32, i8*, i32, i32, i8*, i8*, i8*, i8*, i32, i32, i32, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, float, float, float, i32, i32, i16, i16, i16, float, float, %struct..s_segment_inf*, i32, float, float, float, float, float, float, float, float, float, float)
diff --git a/test/CodeGen/Blackfin/mulhu.ll b/test/CodeGen/Blackfin/mulhu.ll
new file mode 100644
index 0000000..72bacee
--- /dev/null
+++ b/test/CodeGen/Blackfin/mulhu.ll
@@ -0,0 +1,106 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 }
+ %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* }
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.cost_pair = type { %struct.iv_cand*, i32, %struct.bitmap_head_def* }
+ %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] }
+ %struct.def_operand_ptr = type { %struct.tree_node** }
+ %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i1, i1, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.iv = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i1, i1, i32 }
+ %struct.iv_cand = type { i32, i1, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.iv*, i32 }
+ %struct.iv_use = type { i32, i32, %struct.iv*, %struct.tree_node*, %struct.tree_node**, %struct.bitmap_head_def*, i32, %struct.cost_pair*, %struct.iv_cand* }
+ %struct.ivopts_data = type { %struct.loop*, %struct.htab*, i32, %struct.version_info*, %struct.bitmap_head_def*, i32, %struct.varray_head_tag*, %struct.varray_head_tag*, %struct.bitmap_head_def*, i1 }
+ %struct.lang_decl = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.loop = type { i32, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.lpt_decision, i32, i32, %struct.edge_def**, i32, %struct.basic_block_def*, %struct.basic_block_def*, i32, %struct.edge_def**, i32, %struct.edge_def**, i32, %struct.simple_bitmap_def*, i32, %struct.loop**, i32, %struct.loop*, %struct.loop*, %struct.loop*, %struct.loop*, i32, i8*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i32, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound*, %struct.edge_def*, i1 }
+ %struct.lpt_decision = type { i32, i32 }
+ %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
+ %struct.nb_iter_bound = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound* }
+ %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.simple_bitmap_def = type { i32, i32, i32, [1 x i64] }
+ %struct.stack_local_entry = type opaque
+ %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 }
+ %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* }
+ %struct.temp_slot = type opaque
+ %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* }
+ %struct.tree_ann_d = type { %struct.stmt_ann_d }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.u = type { [1 x i64] }
+ %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* }
+ %struct.v_may_def_optype_d = type { i32, [1 x %struct.v_def_use_operand_type_t] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+ %struct.version_info = type { %struct.tree_node*, %struct.iv*, i1, i32, i1 }
+ %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] }
+
+define i1 @determine_use_iv_cost(%struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand) {
+entry:
+ switch i32 0, label %bb91 [
+ i32 0, label %bb
+ i32 1, label %bb6
+ i32 3, label %cond_next135
+ ]
+
+bb: ; preds = %entry
+ ret i1 false
+
+bb6: ; preds = %entry
+ br i1 false, label %bb87, label %cond_next27
+
+cond_next27: ; preds = %bb6
+ br i1 false, label %cond_true30, label %cond_next55
+
+cond_true30: ; preds = %cond_next27
+ br i1 false, label %cond_next41, label %cond_true35
+
+cond_true35: ; preds = %cond_true30
+ ret i1 false
+
+cond_next41: ; preds = %cond_true30
+ %tmp44 = call i32 @force_var_cost(%struct.ivopts_data* %data, %struct.tree_node* null, %struct.bitmap_head_def** null) ; <i32> [#uses=1]
+ %tmp46 = udiv i32 %tmp44, 5 ; <i32> [#uses=1]
+ call void @set_use_iv_cost(%struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand, i32 %tmp46, %struct.bitmap_head_def* null)
+ br label %bb87
+
+cond_next55: ; preds = %cond_next27
+ ret i1 false
+
+bb87: ; preds = %cond_next41, %bb6
+ ret i1 false
+
+bb91: ; preds = %entry
+ ret i1 false
+
+cond_next135: ; preds = %entry
+ ret i1 false
+}
+
+declare void @set_use_iv_cost(%struct.ivopts_data*, %struct.iv_use*, %struct.iv_cand*, i32, %struct.bitmap_head_def*)
+
+declare i32 @force_var_cost(%struct.ivopts_data*, %struct.tree_node*, %struct.bitmap_head_def**)
diff --git a/test/CodeGen/Blackfin/printf.ll b/test/CodeGen/Blackfin/printf.ll
new file mode 100644
index 0000000..9e54b73
--- /dev/null
+++ b/test/CodeGen/Blackfin/printf.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
[email protected]_1 = external constant [42 x i8] ; <[42 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main(i32 %argc.1, i8** %argv.1) {
+entry:
+ %tmp.16 = call i32 (i8*, ...)* @printf(i8* getelementptr ([42 x i8]* @.str_1, i64 0, i64 0), i32 0, i32 0, i64 0, i64 0)
+ ret i32 0
+}
diff --git a/test/CodeGen/Blackfin/printf2.ll b/test/CodeGen/Blackfin/printf2.ll
new file mode 100644
index 0000000..7ac7e80
--- /dev/null
+++ b/test/CodeGen/Blackfin/printf2.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=bfin
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %1 = call i32 (i8*, ...)* @printf(i8* undef, i1 undef)
+ ret i32 0
+}
diff --git a/test/CodeGen/Blackfin/promote-logic.ll b/test/CodeGen/Blackfin/promote-logic.ll
new file mode 100644
index 0000000..46da566
--- /dev/null
+++ b/test/CodeGen/Blackfin/promote-logic.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s -march=bfin > %t
+; XFAIL: *
+
+; DAGCombiner::SimplifyBinOpWithSameOpcodeHands can produce an illegal i16 OR
+; operation after LegalizeOps.
+
+define void @mng_display_bgr565() {
+entry:
+ br i1 false, label %bb.preheader, label %return
+
+bb.preheader:
+ br i1 false, label %cond_true48, label %cond_next80
+
+cond_true48:
+ %tmp = load i8* null
+ %tmp51 = zext i8 %tmp to i16
+ %tmp99 = load i8* null
+ %tmp54 = bitcast i8 %tmp99 to i8
+ %tmp54.upgrd.1 = zext i8 %tmp54 to i32
+ %tmp55 = lshr i32 %tmp54.upgrd.1, 3
+ %tmp55.upgrd.2 = trunc i32 %tmp55 to i16
+ %tmp52 = shl i16 %tmp51, 5
+ %tmp56 = and i16 %tmp55.upgrd.2, 28
+ %tmp57 = or i16 %tmp56, %tmp52
+ %tmp60 = zext i16 %tmp57 to i32
+ %tmp62 = xor i32 0, 65535
+ %tmp63 = mul i32 %tmp60, %tmp62
+ %tmp65 = add i32 0, %tmp63
+ %tmp69 = add i32 0, %tmp65
+ %tmp70 = lshr i32 %tmp69, 16
+ %tmp70.upgrd.3 = trunc i32 %tmp70 to i16
+ %tmp75 = lshr i16 %tmp70.upgrd.3, 8
+ %tmp75.upgrd.4 = trunc i16 %tmp75 to i8
+ %tmp76 = lshr i8 %tmp75.upgrd.4, 5
+ store i8 %tmp76, i8* null
+ ret void
+
+cond_next80:
+ ret void
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/Blackfin/promote-setcc.ll b/test/CodeGen/Blackfin/promote-setcc.ll
new file mode 100644
index 0000000..d344fad
--- /dev/null
+++ b/test/CodeGen/Blackfin/promote-setcc.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=bfin > %t
+
+; The DAG combiner may sometimes create illegal i16 SETCC operations when run
+; after LegalizeOps. Try to tease out all the optimizations in
+; TargetLowering::SimplifySetCC.
+
+@x = external global i16
+@y = external global i16
+
+declare i16 @llvm.ctlz.i16(i16)
+
+; Case (srl (ctlz x), 5) == const
+; Note: ctlz is promoted, so this test does not catch the DAG combiner
+define i1 @srl_ctlz_const() {
+ %x = load i16* @x
+ %c = call i16 @llvm.ctlz.i16(i16 %x)
+ %s = lshr i16 %c, 4
+ %r = icmp eq i16 %s, 1
+ ret i1 %r
+}
+
+; Case (zext x) == const
+define i1 @zext_const() {
+ %x = load i16* @x
+ %r = icmp ugt i16 %x, 1
+ ret i1 %r
+}
+
+; Case (sext x) == const
+define i1 @sext_const() {
+ %x = load i16* @x
+ %y = add i16 %x, 1
+ %x2 = sext i16 %y to i32
+ %r = icmp ne i32 %x2, -1
+ ret i1 %r
+}
+
diff --git a/test/CodeGen/Blackfin/sdiv.ll b/test/CodeGen/Blackfin/sdiv.ll
new file mode 100644
index 0000000..1426655
--- /dev/null
+++ b/test/CodeGen/Blackfin/sdiv.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs
+define i32 @sdiv(i32 %A, i32 %B) {
+ %R = sdiv i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
diff --git a/test/CodeGen/Blackfin/simple-select.ll b/test/CodeGen/Blackfin/simple-select.ll
new file mode 100644
index 0000000..0f7f270
--- /dev/null
+++ b/test/CodeGen/Blackfin/simple-select.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
+
+declare i1 @foo()
+
+define i32 @test(i32* %A, i32* %B) {
+ %a = load i32* %A
+ %b = load i32* %B
+ %cond = call i1 @foo()
+ %c = select i1 %cond, i32 %a, i32 %b
+ ret i32 %c
+}
diff --git a/test/CodeGen/Blackfin/switch.ll b/test/CodeGen/Blackfin/switch.ll
new file mode 100644
index 0000000..3680ec6
--- /dev/null
+++ b/test/CodeGen/Blackfin/switch.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
+
+define i32 @foo(i32 %A, i32 %B, i32 %C) {
+entry:
+ switch i32 %A, label %out [
+ i32 1, label %bb
+ i32 0, label %bb13
+ ]
+
+bb: ; preds = %entry
+ ret i32 1
+
+bb13: ; preds = %entry
+ ret i32 1
+
+out: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/Blackfin/switch2.ll b/test/CodeGen/Blackfin/switch2.ll
new file mode 100644
index 0000000..7877bce
--- /dev/null
+++ b/test/CodeGen/Blackfin/switch2.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
+
+define i8* @FindChar(i8* %CurPtr) {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %tmp = load i8* null ; <i8> [#uses=1]
+ switch i8 %tmp, label %bb [
+ i8 0, label %bb7
+ i8 120, label %bb7
+ ]
+
+bb7: ; preds = %bb, %bb
+ ret i8* null
+}
diff --git a/test/CodeGen/Blackfin/sync-intr.ll b/test/CodeGen/Blackfin/sync-intr.ll
new file mode 100644
index 0000000..0b103a3
--- /dev/null
+++ b/test/CodeGen/Blackfin/sync-intr.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=bfin -verify-machineinstrs | FileCheck %s
+
+define void @f() nounwind {
+entry:
+ ; CHECK-NOT: llvm.bfin
+ ; CHECK: csync;
+ call void @llvm.bfin.csync()
+
+ ; CHECK-NOT: llvm.bfin
+ ; CHECK: ssync;
+ call void @llvm.bfin.ssync()
+ ret void
+}
+
+declare void @llvm.bfin.csync() nounwind
+declare void @llvm.bfin.ssync() nounwind
diff --git a/test/CodeGen/CBackend/2002-05-16-NameCollide.ll b/test/CodeGen/CBackend/2002-05-16-NameCollide.ll
new file mode 100644
index 0000000..0b06041
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-05-16-NameCollide.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=c
+
+; Make sure that global variables do not collide if they have the same name,
+; but different types.
+
+@X = global i32 5 ; <i32*> [#uses=0]
[email protected] = global i64 7 ; <i64*> [#uses=0]
+
diff --git a/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll b/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll
new file mode 100644
index 0000000..a9f54e4
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=c
+
+; This case was emitting code that looked like this:
+; ...
+; llvm_BB1: /* no statement here */
+; }
+;
+; Which the Sun C compiler rejected, so now we are sure to put a return
+; instruction in there if the basic block is otherwise empty.
+;
+define void @test() {
+ br label %BB1
+
+BB2: ; preds = %BB2
+ br label %BB2
+
+BB1: ; preds = %0
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll b/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll
new file mode 100644
index 0000000..2afb1a0
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=c
+
+; Test const pointer refs & forward references
+
+@t3 = global i32* @t1 ; <i32**> [#uses=0]
+@t1 = global i32 4 ; <i32*> [#uses=1]
+
diff --git a/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll b/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll
new file mode 100644
index 0000000..b71cf07
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=c
+
+global i32* bitcast (float* @2 to i32*) ;; Forward numeric reference
+global float* @2 ;; Duplicate forward numeric reference
+global float 0.0
+
+@array = constant [2 x i32] [ i32 12, i32 52 ]
+@arrayPtr = global i32* getelementptr ([2 x i32]* @array, i64 0, i64 0)
diff --git a/test/CodeGen/CBackend/2002-08-19-DataPointer.ll b/test/CodeGen/CBackend/2002-08-19-DataPointer.ll
new file mode 100644
index 0000000..b5a1f0b
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-19-DataPointer.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -march=c
+
+@sptr1 = global [11 x i8]* @somestr ;; Forward ref to a constant
+@somestr = constant [11 x i8] c"hello world"
diff --git a/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll b/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll
new file mode 100644
index 0000000..10b9fe2
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=c
+
+@fptr = global void ()* @f ;; Forward ref method defn
+declare void @f() ;; External method
+
diff --git a/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll b/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll
new file mode 100644
index 0000000..0827423
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=c
+
+@array = constant [2 x i32] [ i32 12, i32 52 ] ; <[2 x i32]*> [#uses=1]
+@arrayPtr = global i32* getelementptr ([2 x i32]* @array, i64 0, i64 0) ; <i32**> [#uses=0]
+
diff --git a/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll b/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll
new file mode 100644
index 0000000..3b2085c
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll
@@ -0,0 +1,3 @@
+; RUN: llc < %s -march=c
+
+@MyIntList = external global { \2*, i32 }
diff --git a/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll b/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll
new file mode 100644
index 0000000..59aafd5
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=c
+
+; The C Writer bombs on this testcase because it tries the print the prototype
+; for the test function, which tries to print the argument name. The function
+; has not been incorporated into the slot calculator, so after it does the name
+; lookup, it tries a slot calculator lookup, which fails.
+
+define i32 @test(i32) {
+ ret i32 0
+}
diff --git a/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll b/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll
new file mode 100644
index 0000000..6c4d629
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=c
+
+; Indirect function call test... found by Joel & Brian
+;
+
+@taskArray = external global i32* ; <i32**> [#uses=1]
+
+define void @test(i32 %X) {
+ %Y = add i32 %X, -1 ; <i32> [#uses=1]
+ %cast100 = sext i32 %Y to i64 ; <i64> [#uses=1]
+ %gep100 = getelementptr i32** @taskArray, i64 %cast100 ; <i32**> [#uses=1]
+ %fooPtr = load i32** %gep100 ; <i32*> [#uses=1]
+ %cast101 = bitcast i32* %fooPtr to void (i32)* ; <void (i32)*> [#uses=1]
+ call void %cast101( i32 1000 )
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll b/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll
new file mode 100644
index 0000000..1187a37
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=c
+
+; This testcase fails because the C backend does not arrange to output the
+; contents of a structure type before it outputs the structure type itself.
+
+@Y = external global { { i32 } } ; <{ { i32 } }*> [#uses=0]
+@X = external global { float } ; <{ float }*> [#uses=0]
+
diff --git a/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll b/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll
new file mode 100644
index 0000000..021adb9
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=c
+
+define void @test() {
+ %X = alloca [4 x i32] ; <[4 x i32]*> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll b/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll
new file mode 100644
index 0000000..e915cd2
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=c
+
+
+declare void @foo(...)
+
+
diff --git a/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll b/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll
new file mode 100644
index 0000000..2563d8c
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=c
+
+%MPI_Comm = type %struct.Comm*
+%struct.Comm = type opaque
+@thing = global %MPI_Comm* null ; <%MPI_Comm**> [#uses=0]
+
diff --git a/test/CodeGen/CBackend/2002-10-16-External.ll b/test/CodeGen/CBackend/2002-10-16-External.ll
new file mode 100644
index 0000000..2cdd15c
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-10-16-External.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -march=c
+
+@bob = external global i32 ; <i32*> [#uses=0]
+
diff --git a/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll b/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll
new file mode 100644
index 0000000..54e0aa6
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=c
+
+ %BitField = type i32
+ %tokenptr = type i32*
+
+define void @test() {
+ %pmf1 = alloca %tokenptr (%tokenptr, i8*)* ; <%tokenptr (%tokenptr, i8*)**> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll b/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll
new file mode 100644
index 0000000..82d594f
--- /dev/null
+++ b/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=c
+
+@testString = internal constant [18 x i8] c"Escaped newline\5Cn\00" ; <[18 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ call i32 (i8*, ...)* @printf( i8* getelementptr ([18 x i8]* @testString, i64 0, i64 0) ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll b/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll
new file mode 100644
index 0000000..92d582d
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=c
+
+; Apparently this constant was unsigned in ISO C 90, but not in C 99.
+
+define i32 @foo() {
+ ret i32 -2147483648
+}
+
diff --git a/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll b/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll
new file mode 100644
index 0000000..a42dc27
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=c
+
+; This testcase breaks the C backend, because gcc doesn't like (...) functions
+; with no arguments at all.
+
+define void @test(i64 %Ptr) {
+ %P = inttoptr i64 %Ptr to void (...)* ; <void (...)*> [#uses=1]
+ call void (...)* %P( i64 %Ptr )
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll b/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll
new file mode 100644
index 0000000..19c7840
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=c
+
+; The C backend was dying when there was no typename for a struct type!
+
+declare i32 @test(i32, { [32 x i32] }*)
diff --git a/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll b/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll
new file mode 100644
index 0000000..048e045
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=c
+
+%X = type { i32, float }
+
+define void @test() {
+ getelementptr %X* null, i64 0, i32 1 ; <float*>:1 [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2003-06-11-HexConstant.ll b/test/CodeGen/CBackend/2003-06-11-HexConstant.ll
new file mode 100644
index 0000000..6197b30
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-06-11-HexConstant.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -march=c
+
+; Make sure hex constant does not continue into a valid hexadecimal letter/number
+@version = global [3 x i8] c"\001\00"
diff --git a/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll b/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll
new file mode 100644
index 0000000..f6177ea
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll
@@ -0,0 +1,3 @@
+; RUN: llc < %s -march=c
+
+@version = global [3 x i8] c"1\00\00"
diff --git a/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll b/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll
new file mode 100644
index 0000000..f0b1bbc
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=c
+
+declare i32 @callee(i32, i32)
+
+define i32 @test(i32 %X) {
+; <label>:0
+ %A = invoke i32 @callee( i32 %X, i32 5 )
+ to label %Ok unwind label %Threw ; <i32> [#uses=1]
+
+Ok: ; preds = %Threw, %0
+ %B = phi i32 [ %A, %0 ], [ -1, %Threw ] ; <i32> [#uses=1]
+ ret i32 %B
+
+Threw: ; preds = %0
+ br label %Ok
+}
+
diff --git a/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.ll b/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.ll
new file mode 100644
index 0000000..4bd1da2
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.ll
@@ -0,0 +1,3 @@
+; RUN: llc < %s -march=c | grep common | grep X
+
+@X = linkonce global i32 5
diff --git a/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll b/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll
new file mode 100644
index 0000000..0fbb3fe
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=c
+
+; This is a non-normal FP value: it's a nan.
+@NAN = global { float } { float 0x7FF8000000000000 } ; <{ float }*> [#uses=0]
+@NANs = global { float } { float 0x7FFC000000000000 } ; <{ float }*> [#uses=0]
diff --git a/test/CodeGen/CBackend/2003-10-23-UnusedType.ll b/test/CodeGen/CBackend/2003-10-23-UnusedType.ll
new file mode 100644
index 0000000..9195634
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-10-23-UnusedType.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=c
+
+%A = type { i32, i8*, { i32, i32, i32, i32, i32, i32, i32, i32 }*, i16 }
+
+define void @test(%A*) {
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll b/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll
new file mode 100644
index 0000000..b4389ff
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=c
+
+; reduced from DOOM.
+ %union._XEvent = type { i32 }
[email protected]_event_9 = global %union._XEvent zeroinitializer ; <%union._XEvent*> [#uses=1]
+
+define void @I_InitGraphics() {
+shortcirc_next.3:
+ %tmp.319 = load i32* getelementptr ({ i32, i32 }* bitcast (%union._XEvent* @.X_event_9 to { i32, i32 }*), i64 0, i32 1) ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll b/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll
new file mode 100644
index 0000000..6a26291
--- /dev/null
+++ b/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=c
+@y = weak global i8 0 ; <i8*> [#uses=1]
+
+define i32 @testcaseshr() {
+entry:
+ ret i32 lshr (i32 ptrtoint (i8* @y to i32), i32 4)
+}
+
+define i32 @testcaseshl() {
+entry:
+ ret i32 shl (i32 ptrtoint (i8* @y to i32), i32 4)
+}
+
diff --git a/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.ll b/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.ll
new file mode 100644
index 0000000..142fbd8
--- /dev/null
+++ b/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=c | grep builtin_return_address
+
+declare i8* @llvm.returnaddress(i32)
+
+declare i8* @llvm.frameaddress(i32)
+
+define i8* @test1() {
+ %X = call i8* @llvm.returnaddress( i32 0 ) ; <i8*> [#uses=1]
+ ret i8* %X
+}
+
+define i8* @test2() {
+ %X = call i8* @llvm.frameaddress( i32 0 ) ; <i8*> [#uses=1]
+ ret i8* %X
+}
+
diff --git a/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.ll b/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.ll
new file mode 100644
index 0000000..d1c6861
--- /dev/null
+++ b/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.ll
@@ -0,0 +1,18 @@
+; The intrinsic lowering pass was lowering intrinsics like llvm.memcpy to
+; explicitly specified prototypes, inserting a new function if the old one
+; didn't exist. This caused there to be two external memcpy functions in
+; this testcase for example, which caused the CBE to mangle one, screwing
+; everything up. :( Test that this does not happen anymore.
+;
+; RUN: llc < %s -march=c | not grep _memcpy
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare float* @memcpy(i32*, i32, i32)
+
+define i32 @test(i8* %A, i8* %B, i32* %C) {
+ call float* @memcpy( i32* %C, i32 4, i32 17 ) ; <float*>:1 [#uses=0]
+ call void @llvm.memcpy.i32( i8* %A, i8* %B, i32 123, i32 14 )
+ ret i32 7
+}
+
diff --git a/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.ll b/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.ll
new file mode 100644
index 0000000..6fceb08
--- /dev/null
+++ b/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.ll
@@ -0,0 +1,11 @@
+; This is a non-normal FP value
+; RUN: llc < %s -march=c | grep FPConstant | grep static
+
+define float @func() {
+ ret float 0xFFF0000000000000
+}
+
+define double @func2() {
+ ret double 0xFF20000000000000
+}
+
diff --git a/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.ll b/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.ll
new file mode 100644
index 0000000..cf59634
--- /dev/null
+++ b/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=c | grep func1 | grep WEAK
+
+define linkonce i32 @func1() {
+ ret i32 5
+}
+
diff --git a/test/CodeGen/CBackend/2004-08-09-va-end-null.ll b/test/CodeGen/CBackend/2004-08-09-va-end-null.ll
new file mode 100644
index 0000000..3ee23d1
--- /dev/null
+++ b/test/CodeGen/CBackend/2004-08-09-va-end-null.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=c
+
+declare void @llvm.va_end(i8*)
+
+define void @test() {
+ %va.upgrd.1 = bitcast i8* null to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.1 )
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.ll b/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.ll
new file mode 100644
index 0000000..af8f441
--- /dev/null
+++ b/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.ll
@@ -0,0 +1,12 @@
+; The CBE should not emit code that casts the function pointer. This causes
+; GCC to get testy and insert trap instructions instead of doing the right
+; thing. :(
+; RUN: llc < %s -march=c
+
+declare void @external(i8*)
+
+define i32 @test(i32* %X) {
+ %RV = call i32 bitcast (void (i8*)* @external to i32 (i32*)*)( i32* %X ) ; <i32> [#uses=1]
+ ret i32 %RV
+}
+
diff --git a/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll b/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll
new file mode 100644
index 0000000..78e9bac
--- /dev/null
+++ b/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=c | not grep extern.*msg
+; PR472
+
+@msg = internal global [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
+
+define i8* @foo() {
+entry:
+ ret i8* getelementptr ([6 x i8]* @msg, i32 0, i32 0)
+}
+
diff --git a/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll b/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll
new file mode 100644
index 0000000..57a9adc
--- /dev/null
+++ b/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=c
+
+define i32 @foo() {
+ ret i32 and (i32 123456, i32 ptrtoint (i32 ()* @foo to i32))
+}
diff --git a/test/CodeGen/CBackend/2005-02-14-VolatileOperations.ll b/test/CodeGen/CBackend/2005-02-14-VolatileOperations.ll
new file mode 100644
index 0000000..dd505af
--- /dev/null
+++ b/test/CodeGen/CBackend/2005-02-14-VolatileOperations.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=c | grep volatile
+
+define void @test(i32* %P) {
+ %X = volatile load i32* %P ; <i32> [#uses=1]
+ volatile store i32 %X, i32* %P
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll b/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll
new file mode 100644
index 0000000..1c5f506
--- /dev/null
+++ b/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=c
+
+ %JNIEnv = type %struct.JNINa*
+ %struct.JNINa = type { i8*, i8*, i8*, void (%JNIEnv*)* }
+
diff --git a/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll b/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll
new file mode 100644
index 0000000..808b8f9
--- /dev/null
+++ b/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=c | not grep -- --65535
+; PR596
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+
+declare void @func(i32)
+
+define void @funcb() {
+entry:
+ %tmp.1 = sub i32 0, -65535 ; <i32> [#uses=1]
+ call void @func( i32 %tmp.1 )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2005-08-23-Fmod.ll b/test/CodeGen/CBackend/2005-08-23-Fmod.ll
new file mode 100644
index 0000000..6e650eb
--- /dev/null
+++ b/test/CodeGen/CBackend/2005-08-23-Fmod.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=c | grep fmod
+
+define double @test(double %A, double %B) {
+ %C = frem double %A, %B ; <double> [#uses=1]
+ ret double %C
+}
+
diff --git a/test/CodeGen/CBackend/2005-09-27-VolatileFuncPtr.ll b/test/CodeGen/CBackend/2005-09-27-VolatileFuncPtr.ll
new file mode 100644
index 0000000..99de837
--- /dev/null
+++ b/test/CodeGen/CBackend/2005-09-27-VolatileFuncPtr.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=c | grep {\\* *volatile *\\*}
+
+@G = external global void ()* ; <void ()**> [#uses=2]
+
+define void @test() {
+ volatile store void ()* @test, void ()** @G
+ volatile load void ()** @G ; <void ()*>:1 [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll b/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll
new file mode 100644
index 0000000..c9df800
--- /dev/null
+++ b/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=c | \
+; RUN: grep __BITCAST | count 14
+
+define i32 @test1(float %F) {
+ %X = bitcast float %F to i32 ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define float @test2(i32 %I) {
+ %X = bitcast i32 %I to float ; <float> [#uses=1]
+ ret float %X
+}
+
+define i64 @test3(double %D) {
+ %X = bitcast double %D to i64 ; <i64> [#uses=1]
+ ret i64 %X
+}
+
+define double @test4(i64 %L) {
+ %X = bitcast i64 %L to double ; <double> [#uses=1]
+ ret double %X
+}
+
+define double @test5(double %D) {
+ %X = bitcast double %D to double ; <double> [#uses=1]
+ %Y = fadd double %X, 2.000000e+00 ; <double> [#uses=1]
+ %Z = bitcast double %Y to i64 ; <i64> [#uses=1]
+ %res = bitcast i64 %Z to double ; <double> [#uses=1]
+ ret double %res
+}
+
+define float @test6(float %F) {
+ %X = bitcast float %F to float ; <float> [#uses=1]
+ %Y = fadd float %X, 2.000000e+00 ; <float> [#uses=1]
+ %Z = bitcast float %Y to i32 ; <i32> [#uses=1]
+ %res = bitcast i32 %Z to float ; <float> [#uses=1]
+ ret float %res
+}
+
+define i32 @main(i32 %argc, i8** %argv) {
+ %a = call i32 @test1( float 0x400921FB40000000 ) ; <i32> [#uses=2]
+ %b = call float @test2( i32 %a ) ; <float> [#uses=0]
+ %c = call i64 @test3( double 0x400921FB4D12D84A ) ; <i64> [#uses=1]
+ %d = call double @test4( i64 %c ) ; <double> [#uses=0]
+ %e = call double @test5( double 7.000000e+00 ) ; <double> [#uses=0]
+ %f = call float @test6( float 7.000000e+00 ) ; <float> [#uses=0]
+ ret i32 %a
+}
+
diff --git a/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll b/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll
new file mode 100644
index 0000000..da36e78
--- /dev/null
+++ b/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll
@@ -0,0 +1,26 @@
+; For PR1099
+; RUN: llc < %s -march=c | grep {(llvm_cbe_tmp2 == llvm_cbe_b_2e_0_2e_0_2e_val)}
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8"
+ %struct.Connector = type { i16, i16, i8, i8, %struct.Connector*, i8* }
+
+
+define i1 @prune_match_entry_2E_ce(%struct.Connector* %a, i16 %b.0.0.val) {
+newFuncRoot:
+ br label %entry.ce
+
+cond_next.exitStub: ; preds = %entry.ce
+ ret i1 true
+
+entry.return_crit_edge.exitStub: ; preds = %entry.ce
+ ret i1 false
+
+entry.ce: ; preds = %newFuncRoot
+ %tmp1 = getelementptr %struct.Connector* %a, i32 0, i32 0 ; <i16*> [#uses=1]
+ %tmp2 = load i16* %tmp1 ; <i16> [#uses=1]
+ %tmp3 = icmp eq i16 %tmp2, %b.0.0.val ; <i1> [#uses=1]
+ br i1 %tmp3, label %cond_next.exitStub, label %entry.return_crit_edge.exitStub
+}
+
+
diff --git a/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll b/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll
new file mode 100644
index 0000000..8a5f253
--- /dev/null
+++ b/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll
@@ -0,0 +1,11 @@
+; PR918
+; RUN: llc < %s -march=c | not grep {l_structtype_s l_fixarray_array3}
+
+%structtype_s = type { i32 }
+%fixarray_array3 = type [3 x %structtype_s]
+
+define i32 @witness(%fixarray_array3* %p) {
+ %q = getelementptr %fixarray_array3* %p, i32 0, i32 0, i32 0
+ %v = load i32* %q
+ ret i32 %v
+}
diff --git a/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll b/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll
new file mode 100644
index 0000000..4f699b7
--- /dev/null
+++ b/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=c | grep __builtin_stack_save
+; RUN: llc < %s -march=c | grep __builtin_stack_restore
+; PR1028
+
+declare i8* @llvm.stacksave()
+declare void @llvm.stackrestore(i8*)
+
+define i8* @test() {
+ %s = call i8* @llvm.stacksave()
+ call void @llvm.stackrestore(i8* %s)
+ ret i8* %s
+}
diff --git a/test/CodeGen/CBackend/2007-02-05-memset.ll b/test/CodeGen/CBackend/2007-02-05-memset.ll
new file mode 100644
index 0000000..7d508e4
--- /dev/null
+++ b/test/CodeGen/CBackend/2007-02-05-memset.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=c
+; PR1181
+target datalayout = "e-p:64:64"
+target triple = "x86_64-apple-darwin8"
+
+
+declare void @llvm.memset.i64(i8*, i8, i64, i32)
+
+define fastcc void @InitUser_data_unregistered() {
+entry:
+ tail call void @llvm.memset.i64( i8* null, i8 0, i64 65496, i32 1 )
+ ret void
+}
diff --git a/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll b/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll
new file mode 100644
index 0000000..7e1ff2a
--- /dev/null
+++ b/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll
@@ -0,0 +1,14 @@
+; PR1164
+; RUN: llc < %s -march=c | grep {llvm_cbe_A = \\*llvm_cbe_G;}
+; RUN: llc < %s -march=c | grep {llvm_cbe_B = \\*(<mp_0_1);}
+; RUN: llc < %s -march=c | grep {return (((unsigned int )(((unsigned int )llvm_cbe_A) + ((unsigned int )llvm_cbe_B))));}
+
+@G = global i32 123
+@ltmp_0_1 = global i32 123
+
+define i32 @test(i32 *%G) {
+ %A = load i32* %G
+ %B = load i32* @ltmp_0_1
+ %C = add i32 %A, %B
+ ret i32 %C
+}
diff --git a/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll b/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll
new file mode 100644
index 0000000..c8bfdd6
--- /dev/null
+++ b/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=c | grep {packed}
+
+ %struct.p = type <{ i16 }>
+
+define i32 @main() {
+entry:
+ %t = alloca %struct.p, align 2
+ ret i32 5
+}
diff --git a/test/CodeGen/CBackend/2008-02-01-UnalignedLoadStore.ll b/test/CodeGen/CBackend/2008-02-01-UnalignedLoadStore.ll
new file mode 100644
index 0000000..6e0cf68
--- /dev/null
+++ b/test/CodeGen/CBackend/2008-02-01-UnalignedLoadStore.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=c | \
+; RUN: grep {struct __attribute__ ((packed, aligned(} | count 4
+
+define void @test(i32* %P) {
+ %X = load i32* %P, align 1
+ store i32 %X, i32* %P, align 1
+ ret void
+}
+
+define void @test2(i32* %P) {
+ %X = volatile load i32* %P, align 2
+ volatile store i32 %X, i32* %P, align 2
+ ret void
+}
+
diff --git a/test/CodeGen/CBackend/2008-05-21-MRV-InlineAsm.ll b/test/CodeGen/CBackend/2008-05-21-MRV-InlineAsm.ll
new file mode 100644
index 0000000..8db3167
--- /dev/null
+++ b/test/CodeGen/CBackend/2008-05-21-MRV-InlineAsm.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=c
+
+declare {i32, i32} @foo()
+
+define i32 @test() {
+ %A = call {i32, i32} @foo()
+ %B = getresult {i32, i32} %A, 0
+ %C = getresult {i32, i32} %A, 1
+ %D = add i32 %B, %C
+ ret i32 %D
+}
+
+define i32 @test2() {
+ %A = call {i32, i32} asm sideeffect "...", "={cx},={di},~{dirflag},~{fpsr},~{flags},~{memory}"()
+ %B = getresult {i32, i32} %A, 0
+ %C = getresult {i32, i32} %A, 1
+ %D = add i32 %B, %C
+ ret i32 %D
+}
diff --git a/test/CodeGen/CBackend/2008-05-31-BoolOverflow.ll b/test/CodeGen/CBackend/2008-05-31-BoolOverflow.ll
new file mode 100644
index 0000000..e9fa552
--- /dev/null
+++ b/test/CodeGen/CBackend/2008-05-31-BoolOverflow.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=c | grep {llvm_cbe_t.*&1}
+define i32 @test(i32 %r) {
+ %s = icmp eq i32 %r, 0
+ %t = add i1 %s, %s
+ %u = zext i1 %t to i32
+ br i1 %t, label %A, label %B
+A:
+
+ ret i32 %u
+B:
+
+ %v = select i1 %t, i32 %r, i32 %u
+ ret i32 %v
+}
diff --git a/test/CodeGen/CBackend/2008-06-04-IndirectMem.ll b/test/CodeGen/CBackend/2008-06-04-IndirectMem.ll
new file mode 100644
index 0000000..054a3ca
--- /dev/null
+++ b/test/CodeGen/CBackend/2008-06-04-IndirectMem.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=c | grep {"m"(llvm_cbe_newcw))}
+; PR2407
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define void @foo() {
+ %newcw = alloca i16 ; <i16*> [#uses=2]
+ call void asm sideeffect "fldcw $0", "*m,~{dirflag},~{fpsr},~{flags}"( i16*
+%newcw ) nounwind
+ ret void
+}
diff --git a/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll b/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll
new file mode 100644
index 0000000..b72b573
--- /dev/null
+++ b/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=c
+; PR2907
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9.5"
+ %"struct.Point<0>" = type { %"struct.Tensor<1,0>" }
+ %"struct.QGauss2<1>" = type { %"struct.Quadrature<0>" }
+ %"struct.Quadrature<0>" = type { %struct.Subscriptor, i32, %"struct.std::vector<Point<0>,std::allocator<Point<0> > >", %"struct.std::vector<double,std::allocator<double> >" }
+ %struct.Subscriptor = type { i32 (...)**, i32, %"struct.std::type_info"* }
+ %"struct.Tensor<1,0>" = type { [1 x double] }
+ %"struct.std::_Vector_base<Point<0>,std::allocator<Point<0> > >" = type { %"struct.std::_Vector_base<Point<0>,std::allocator<Point<0> > >::_Vector_impl" }
+ %"struct.std::_Vector_base<Point<0>,std::allocator<Point<0> > >::_Vector_impl" = type { %"struct.Point<0>"*, %"struct.Point<0>"*, %"struct.Point<0>"* }
+ %"struct.std::_Vector_base<double,std::allocator<double> >" = type { %"struct.std::_Vector_base<double,std::allocator<double> >::_Vector_impl" }
+ %"struct.std::_Vector_base<double,std::allocator<double> >::_Vector_impl" = type { double*, double*, double* }
+ %"struct.std::type_info" = type { i32 (...)**, i8* }
+ %"struct.std::vector<Point<0>,std::allocator<Point<0> > >" = type { %"struct.std::_Vector_base<Point<0>,std::allocator<Point<0> > >" }
+ %"struct.std::vector<double,std::allocator<double> >" = type { %"struct.std::_Vector_base<double,std::allocator<double> >" }
+
+define fastcc void @_ZN6QGaussILi1EEC1Ej(%"struct.QGauss2<1>"* %this, i32 %n) {
+entry:
+ br label %bb4
+
+bb4: ; preds = %bb5.split, %bb4, %entry
+ %0 = fcmp ogt ppc_fp128 0xM00000000000000000000000000000000, select (i1 fcmp olt (ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128), ppc_fp128 fmul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000)), ppc_fp128 fmul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000), ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128)) ; <i1> [#uses=1]
+ br i1 %0, label %bb4, label %bb5.split
+
+bb5.split: ; preds = %bb4
+ %1 = getelementptr double* null, i32 0 ; <double*> [#uses=0]
+ br label %bb4
+}
diff --git a/test/CodeGen/CBackend/dg.exp b/test/CodeGen/CBackend/dg.exp
new file mode 100644
index 0000000..9d78940
--- /dev/null
+++ b/test/CodeGen/CBackend/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target CBackend] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/CBackend/fneg.ll b/test/CodeGen/CBackend/fneg.ll
new file mode 100644
index 0000000..7dec3d9
--- /dev/null
+++ b/test/CodeGen/CBackend/fneg.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=c
+
+define void @func() nounwind {
+ entry:
+ %0 = fsub double -0.0, undef
+ ret void
+}
diff --git a/test/CodeGen/CBackend/pr2408.ll b/test/CodeGen/CBackend/pr2408.ll
new file mode 100644
index 0000000..bf8477b
--- /dev/null
+++ b/test/CodeGen/CBackend/pr2408.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=c | grep {\\* ((unsigned int )}
+; PR2408
+
+define i32 @a(i32 %a) {
+entry:
+ %shr = ashr i32 %a, 0 ; <i32> [#uses=1]
+ %shr2 = ashr i32 2, 0 ; <i32> [#uses=1]
+ %mul = mul i32 %shr, %shr2 ; <i32> [#uses=1]
+ %shr4 = ashr i32 2, 0 ; <i32> [#uses=1]
+ %div = sdiv i32 %mul, %shr4 ; <i32> [#uses=1]
+ ret i32 %div
+}
diff --git a/test/CodeGen/CBackend/vectors.ll b/test/CodeGen/CBackend/vectors.ll
new file mode 100644
index 0000000..b7b7677
--- /dev/null
+++ b/test/CodeGen/CBackend/vectors.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=c
[email protected] = external global [2 x i8]
+
+define <4 x i32> @foo(<4 x i32> %a, i32 %b) {
+ %c = insertelement <4 x i32> %a, i32 1, i32 %b
+
+ ret <4 x i32> %c
+}
+
+define i32 @test2(<4 x i32> %a, i32 %b) {
+ %c = extractelement <4 x i32> %a, i32 1
+
+ ret i32 %c
+}
+
+define <4 x float> @test3(<4 x float> %Y) {
+ %Z = fadd <4 x float> %Y, %Y
+ %X = shufflevector <4 x float> zeroinitializer, <4 x float> %Z, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >
+ ret <4 x float> %X
+}
+
+define void @test4() {
+ %x = alloca <4 x float>
+ %tmp3.i16 = getelementptr <4 x float>* %x, i32 0, i32 0
+ store float 1.0, float* %tmp3.i16
+ ret void
+}
+
+define i32* @test5({i32, i32} * %P) {
+ %x = getelementptr {i32, i32} * %P, i32 0, i32 1
+ ret i32* %x
+}
+
+define i8* @test6() {
+ ret i8* getelementptr ([2 x i8]* @.str15, i32 0, i32 0)
+}
+
diff --git a/test/CodeGen/CPP/2007-06-16-Funcname.ll b/test/CodeGen/CPP/2007-06-16-Funcname.ll
new file mode 100644
index 0000000..71fea12
--- /dev/null
+++ b/test/CodeGen/CPP/2007-06-16-Funcname.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=cpp -cppfname=WAKKA | not grep makeLLVMModule
+; PR1515
+
+define void @foo() {
+ ret void
+}
+
diff --git a/test/CodeGen/CPP/2009-05-01-Long-Double.ll b/test/CodeGen/CPP/2009-05-01-Long-Double.ll
new file mode 100644
index 0000000..0b2d882
--- /dev/null
+++ b/test/CodeGen/CPP/2009-05-01-Long-Double.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=cpp -cppgen=program -o %t
+
+define x86_fp80 @some_func() nounwind {
+entry:
+ %retval = alloca x86_fp80 ; <x86_fp80*> [#uses=2]
+ %call = call i32 (...)* @other_func() ; <i32> [#uses=1]
+ %conv = sitofp i32 %call to x86_fp80 ; <x86_fp80> [#uses=1]
+ store x86_fp80 %conv, x86_fp80* %retval
+ %0 = load x86_fp80* %retval ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %0
+}
+
+declare i32 @other_func(...)
diff --git a/test/CodeGen/CPP/2009-05-04-CondBr.ll b/test/CodeGen/CPP/2009-05-04-CondBr.ll
new file mode 100644
index 0000000..feb2cf7
--- /dev/null
+++ b/test/CodeGen/CPP/2009-05-04-CondBr.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=cpp -cppgen=program -o %t
+; RUN: grep "BranchInst::Create(label_if_then, label_if_end, int1_cmp, label_entry);" %t
+
+define i32 @some_func(i32 %a) nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %a.addr = alloca i32 ; <i32*> [#uses=8]
+ store i32 %a, i32* %a.addr
+ %tmp = load i32* %a.addr ; <i32> [#uses=1]
+ %inc = add i32 %tmp, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %a.addr
+ %tmp1 = load i32* %a.addr ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp1, 3 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ store i32 7, i32* %a.addr
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ %tmp2 = load i32* %a.addr ; <i32> [#uses=1]
+ %inc3 = add i32 %tmp2, 1 ; <i32> [#uses=1]
+ store i32 %inc3, i32* %a.addr
+ %tmp4 = load i32* %a.addr ; <i32> [#uses=1]
+ store i32 %tmp4, i32* %retval
+ %0 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/CPP/dg.exp b/test/CodeGen/CPP/dg.exp
new file mode 100644
index 0000000..3276dcc
--- /dev/null
+++ b/test/CodeGen/CPP/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target CppBackend] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/CPP/llvm2cpp.ll b/test/CodeGen/CPP/llvm2cpp.ll
new file mode 100644
index 0000000..d0ba0cf
--- /dev/null
+++ b/test/CodeGen/CPP/llvm2cpp.ll
@@ -0,0 +1,756 @@
+; RUN: llvm-as < %s | llvm-dis > /dev/null
+; RUN: llc < %s -march=cpp -cppgen=program -o -
+
+@X = global i32 4, align 16 ; <i32*> [#uses=0]
+
+define i32* @test1012() align 32 {
+ %X = alloca i32, align 4 ; <i32*> [#uses=1]
+ %Y = alloca i32, i32 42, align 16 ; <i32*> [#uses=0]
+ %Z = alloca i32 ; <i32*> [#uses=0]
+ ret i32* %X
+}
+
+define i32* @test1013() {
+ %X = malloc i32, align 4 ; <i32*> [#uses=1]
+ %Y = malloc i32, i32 42, align 16 ; <i32*> [#uses=0]
+ %Z = malloc i32 ; <i32*> [#uses=0]
+ ret i32* %X
+}
+
+define void @void(i32, i32) {
+ add i32 0, 0 ; <i32>:3 [#uses=2]
+ sub i32 0, 4 ; <i32>:4 [#uses=2]
+ br label %5
+
+; <label>:5 ; preds = %5, %2
+ add i32 %0, %1 ; <i32>:6 [#uses=2]
+ sub i32 %6, %4 ; <i32>:7 [#uses=1]
+ icmp sle i32 %7, %3 ; <i1>:8 [#uses=1]
+ br i1 %8, label %9, label %5
+
+; <label>:9 ; preds = %5
+ add i32 %0, %1 ; <i32>:10 [#uses=0]
+ sub i32 %6, %4 ; <i32>:11 [#uses=1]
+ icmp sle i32 %11, %3 ; <i1>:12 [#uses=0]
+ ret void
+}
+
+define i32 @zarro() {
+Startup:
+ ret i32 0
+}
+
+define fastcc void @foo() {
+ ret void
+}
+
+define coldcc void @bar() {
+ call fastcc void @foo( )
+ ret void
+}
+
+define void @structret({ i8 }* sret %P) {
+ call void @structret( { i8 }* %P sret )
+ ret void
+}
+
+define void @foo4() {
+ ret void
+}
+
+define coldcc void @bar2() {
+ call fastcc void @foo( )
+ ret void
+}
+
+define cc42 void @bar3() {
+ invoke fastcc void @foo( )
+ to label %Ok unwind label %U
+
+Ok: ; preds = %0
+ ret void
+
+U: ; preds = %0
+ unwind
+}
+
+define void @bar4() {
+ call cc42 void @bar( )
+ invoke cc42 void @bar3( )
+ to label %Ok unwind label %U
+
+Ok: ; preds = %0
+ ret void
+
+U: ; preds = %0
+ unwind
+}
+; ModuleID = 'calltest.ll'
+ %FunTy = type i32 (i32)
+
+define i32 @test1000(i32 %i0) {
+ ret i32 %i0
+}
+
+define void @invoke(%FunTy* %x) {
+ %foo = call i32 %x( i32 123 ) ; <i32> [#uses=0]
+ %foo2 = tail call i32 %x( i32 123 ) ; <i32> [#uses=0]
+ ret void
+}
+
+define i32 @main(i32 %argc) {
+ %retval = call i32 @test1000( i32 %argc ) ; <i32> [#uses=2]
+ %two = add i32 %retval, %retval ; <i32> [#uses=1]
+ %retval2 = invoke i32 @test1000( i32 %argc )
+ to label %Next unwind label %Error ; <i32> [#uses=1]
+
+Next: ; preds = %0
+ %two2 = add i32 %two, %retval2 ; <i32> [#uses=1]
+ call void @invoke( %FunTy* @test1000 )
+ ret i32 %two2
+
+Error: ; preds = %0
+ ret i32 -1
+}
+; ModuleID = 'casttest.ll'
+
+define i16 @FunFunc(i64 %x, i8 %z) {
+bb0:
+ %cast110 = sext i8 %z to i16 ; <i16> [#uses=1]
+ %cast10 = trunc i64 %x to i16 ; <i16> [#uses=1]
+ %reg109 = add i16 %cast110, %cast10 ; <i16> [#uses=1]
+ ret i16 %reg109
+}
+; ModuleID = 'cfgstructures.ll'
+
+define void @irreducible(i1 %cond) {
+ br i1 %cond, label %X, label %Y
+
+X: ; preds = %Y, %0
+ br label %Y
+
+Y: ; preds = %X, %0
+ br label %X
+}
+
+define void @sharedheader(i1 %cond) {
+ br label %A
+
+A: ; preds = %Y, %X, %0
+ br i1 %cond, label %X, label %Y
+
+X: ; preds = %A
+ br label %A
+
+Y: ; preds = %A
+ br label %A
+}
+
+define void @nested(i1 %cond1, i1 %cond2, i1 %cond3) {
+ br label %Loop1
+
+Loop1: ; preds = %L2Exit, %0
+ br label %Loop2
+
+Loop2: ; preds = %L3Exit, %Loop1
+ br label %Loop3
+
+Loop3: ; preds = %Loop3, %Loop2
+ br i1 %cond3, label %Loop3, label %L3Exit
+
+L3Exit: ; preds = %Loop3
+ br i1 %cond2, label %Loop2, label %L2Exit
+
+L2Exit: ; preds = %L3Exit
+ br i1 %cond1, label %Loop1, label %L1Exit
+
+L1Exit: ; preds = %L2Exit
+ ret void
+}
+; ModuleID = 'constexpr.ll'
+ %SAType = type { i32, { [2 x float], i64 } }
+ %SType = type { i32, { float, { i8 } }, i64 }
+global i64 1 ; <i64*>:0 [#uses=0]
+global i64 74514 ; <i64*>:1 [#uses=0]
+@t2 = global i32* @t1 ; <i32**> [#uses=0]
+@t3 = global i32* @t1 ; <i32**> [#uses=2]
+@t1 = global i32 4 ; <i32*> [#uses=2]
+@t4 = global i32** @t3 ; <i32***> [#uses=1]
+@t5 = global i32** @t3 ; <i32***> [#uses=0]
+@t6 = global i32*** @t4 ; <i32****> [#uses=0]
+@t7 = global float* inttoptr (i32 12345678 to float*) ; <float**> [#uses=0]
+@t9 = global i32 8 ; <i32*> [#uses=0]
+global i32* bitcast (float* @4 to i32*) ; <i32**>:2 [#uses=0]
+global float* @4 ; <float**>:3 [#uses=0]
+global float 0.000000e+00 ; <float*>:4 [#uses=2]
+@array = constant [2 x i32] [ i32 12, i32 52 ] ; <[2 x i32]*> [#uses=1]
+@arrayPtr = global i32* getelementptr ([2 x i32]* @array, i64 0, i64 0) ; <i32**> [#uses=1]
+@arrayPtr5 = global i32** getelementptr (i32** @arrayPtr, i64 5) ; <i32***> [#uses=0]
+@somestr = constant [11 x i8] c"hello world" ; <[11 x i8]*> [#uses=2]
+@char5 = global i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 5) ; <i8**> [#uses=0]
+@char8a = global i32* bitcast (i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 8) to i32*) ; <i32**> [#uses=0]
+@char8b = global i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 8) ; <i8**> [#uses=0]
+@S1 = global %SType* null ; <%SType**> [#uses=1]
+@S2c = constant %SType {
+ i32 1,
+ { float, { i8 } } { float 2.000000e+00, { i8 } { i8 3 } },
+ i64 4 } ; <%SType*> [#uses=3]
+@S3c = constant %SAType { i32 1, { [2 x float], i64 } { [2 x float] [ float 2.000000e+00, float 3.000000e+00 ], i64 4 } } ; <%SAType*> [#uses=1]
+@S1ptr = global %SType** @S1 ; <%SType***> [#uses=0]
+@S2 = global %SType* @S2c ; <%SType**> [#uses=0]
+@S3 = global %SAType* @S3c ; <%SAType**> [#uses=0]
+@S1fld1a = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0) ; <float**> [#uses=0]
+@S1fld1b = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0) ; <float**> [#uses=1]
+@S1fld1bptr = global float** @S1fld1b ; <float***> [#uses=0]
+@S2fld3 = global i8* getelementptr (%SType* @S2c, i64 0, i32 1, i32 1, i32 0) ; <i8**> [#uses=0]
+
+; ModuleID = 'constpointer.ll'
+@cpt3 = global i32* @cpt1 ; <i32**> [#uses=1]
+@cpt1 = global i32 4 ; <i32*> [#uses=2]
+@cpt4 = global i32** @cpt3 ; <i32***> [#uses=0]
+@cpt2 = global i32* @cpt1 ; <i32**> [#uses=0]
+global float* @7 ; <float**>:0 [#uses=0]
+global float* @7 ; <float**>:1 [#uses=0]
+global float 0.000000e+00 ; <float*>:2 [#uses=3]
+global float* @7 ; <float**>:3 [#uses=0]
+@fptr = global void ()* @f ; <void ()**> [#uses=0]
+@sptr1 = global [11 x i8]* @somestr ; <[11 x i8]**> [#uses=0]
+@somestr2 = constant [11 x i8] c"hello world" ; <[11 x i8]*> [#uses=2]
+@sptr2 = global [11 x i8]* @somestr2 ; <[11 x i8]**> [#uses=0]
+
+declare void @f()
+; ModuleID = 'escaped_label.ll'
+
+define i32 @foo3() {
+ br label "foo`~!@#$%^&*()-_=+{}[]\\|;:',<.>/?"
+
+"foo`~!@#$%^&*()-_=+{}[]\\|;:',<.>/?": ; preds = %0
+ ret i32 17
+}
+; ModuleID = 'float.ll'
+@F1 = global float 4.000000e+00 ; <float*> [#uses=0]
+@D1 = global double 4.000000e+00 ; <double*> [#uses=0]
+; ModuleID = 'fold-fpcast.ll'
+
+define i32 @test1() {
+ ret i32 1080872141
+}
+
+define float @test1002() {
+ ret float 0x36E1000000000000
+}
+
+define i64 @test3() {
+ ret i64 4614256656431372362
+}
+
+define double @test4() {
+ ret double 2.075076e-322
+}
+; ModuleID = 'forwardreftest.ll'
+ %myfn = type float (i32, double, i32, i16)
+ %myty = type i32
+ %thisfuncty = type i32 (i32)*
+
+declare void @F(%thisfuncty, %thisfuncty, %thisfuncty)
+
+define i32 @zarro2(i32 %Func) {
+Startup:
+ add i32 0, 10 ; <i32>:0 [#uses=0]
+ ret i32 0
+}
+
+define i32 @test1004(i32) {
+ call void @F( %thisfuncty @zarro2, %thisfuncty @test1004, %thisfuncty @foozball )
+ ret i32 0
+}
+
+define i32 @foozball(i32) {
+ ret i32 0
+}
+
+; ModuleID = 'globalredefinition.ll'
+@A = global i32* @B ; <i32**> [#uses=0]
+@B = global i32 7 ; <i32*> [#uses=1]
+
+define void @test12312() {
+ ret void
+}
+; ModuleID = 'global_section.ll'
+@GlobSec = global i32 4, section "foo", align 16
+
+define void @test1005() section "bar" {
+ ret void
+}
+
+; ModuleID = 'globalvars.ll'
+@MyVar = external global i32 ; <i32*> [#uses=1]
+@MyIntList = external global { \2*, i32 } ; <{ \2*, i32 }*> [#uses=1]
+external global i32 ; <i32*>:0 [#uses=0]
+@AConst = constant i32 123 ; <i32*> [#uses=0]
+@AString = constant [4 x i8] c"test" ; <[4 x i8]*> [#uses=0]
+@ZeroInit = global { [100 x i32], [40 x float] } zeroinitializer ; <{ [100 x i32], [40 x float] }*> [#uses=0]
+
+define i32 @foo10015(i32 %blah) {
+ store i32 5, i32* @MyVar
+ %idx = getelementptr { \2*, i32 }* @MyIntList, i64 0, i32 1 ; <i32*> [#uses=1]
+ store i32 12, i32* %idx
+ ret i32 %blah
+}
+; ModuleID = 'indirectcall2.ll'
+
+define i64 @test1006(i64 %X) {
+ ret i64 %X
+}
+
+define i64 @fib(i64 %n) {
+; <label>:0
+ %T = icmp ult i64 %n, 2 ; <i1> [#uses=1]
+ br i1 %T, label %BaseCase, label %RecurseCase
+
+RecurseCase: ; preds = %0
+ %result = call i64 @test1006( i64 %n ) ; <i64> [#uses=0]
+ br label %BaseCase
+
+BaseCase: ; preds = %RecurseCase, %0
+ %X = phi i64 [ 1, %0 ], [ 2, %RecurseCase ] ; <i64> [#uses=1]
+ ret i64 %X
+}
+; ModuleID = 'indirectcall.ll'
+
+declare i32 @atoi(i8*)
+
+define i64 @fibonacc(i64 %n) {
+ icmp ult i64 %n, 2 ; <i1>:1 [#uses=1]
+ br i1 %1, label %BaseCase, label %RecurseCase
+
+BaseCase: ; preds = %0
+ ret i64 1
+
+RecurseCase: ; preds = %0
+ %n2 = sub i64 %n, 2 ; <i64> [#uses=1]
+ %n1 = sub i64 %n, 1 ; <i64> [#uses=1]
+ %f2 = call i64 @fibonacc( i64 %n2 ) ; <i64> [#uses=1]
+ %f1 = call i64 @fibonacc( i64 %n1 ) ; <i64> [#uses=1]
+ %result = add i64 %f2, %f1 ; <i64> [#uses=1]
+ ret i64 %result
+}
+
+define i64 @realmain(i32 %argc, i8** %argv) {
+; <label>:0
+ icmp eq i32 %argc, 2 ; <i1>:1 [#uses=1]
+ br i1 %1, label %HasArg, label %Continue
+
+HasArg: ; preds = %0
+ %n1 = add i32 1, 1 ; <i32> [#uses=1]
+ br label %Continue
+
+Continue: ; preds = %HasArg, %0
+ %n = phi i32 [ %n1, %HasArg ], [ 1, %0 ] ; <i32> [#uses=1]
+ %N = sext i32 %n to i64 ; <i64> [#uses=1]
+ %F = call i64 @fib( i64 %N ) ; <i64> [#uses=1]
+ ret i64 %F
+}
+
+define i64 @trampoline(i64 %n, i64 (i64)* %fibfunc) {
+ %F = call i64 %fibfunc( i64 %n ) ; <i64> [#uses=1]
+ ret i64 %F
+}
+
+define i32 @main2() {
+ %Result = call i64 @trampoline( i64 10, i64 (i64)* @fib ) ; <i64> [#uses=1]
+ %Result.upgrd.1 = trunc i64 %Result to i32 ; <i32> [#uses=1]
+ ret i32 %Result.upgrd.1
+}
+; ModuleID = 'inlineasm.ll'
+module asm "this is an inline asm block"
+module asm "this is another inline asm block"
+
+define i32 @test1007() {
+ %X = call i32 asm "tricky here $0, $1", "=r,r"( i32 4 ) ; <i32> [#uses=1]
+ call void asm sideeffect "eieio", ""( )
+ ret i32 %X
+}
+; ModuleID = 'instructions.ll'
+
+define i32 @test_extractelement(<4 x i32> %V) {
+ %R = extractelement <4 x i32> %V, i32 1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define <4 x i32> @test_insertelement(<4 x i32> %V) {
+ %R = insertelement <4 x i32> %V, i32 0, i32 0 ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %R
+}
+
+define <4 x i32> @test_shufflevector_u(<4 x i32> %V) {
+ %R = shufflevector <4 x i32> %V, <4 x i32> %V, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %R
+}
+
+define <4 x float> @test_shufflevector_f(<4 x float> %V) {
+ %R = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %R
+}
+; ModuleID = 'intrinsics.ll'
+
+declare i1 @llvm.isunordered.f32(float, float)
+
+declare i1 @llvm.isunordered.f64(double, double)
+
+declare void @llvm.prefetch(i8*, i32, i32)
+
+declare float @llvm.sqrt.f32(float)
+
+declare double @llvm.sqrt.f64(double)
+
+define void @libm() {
+ fcmp uno float 1.000000e+00, 2.000000e+00 ; <i1>:1 [#uses=0]
+ fcmp uno double 3.000000e+00, 4.000000e+00 ; <i1>:2 [#uses=0]
+ call void @llvm.prefetch( i8* null, i32 1, i32 3 )
+ call float @llvm.sqrt.f32( float 5.000000e+00 ) ; <float>:3 [#uses=0]
+ call double @llvm.sqrt.f64( double 6.000000e+00 ) ; <double>:4 [#uses=0]
+ call i8 @llvm.ctpop.i8( i8 10 ) ; <i32>:5 [#uses=1]
+ call i16 @llvm.ctpop.i16( i16 11 ) ; <i32>:7 [#uses=1]
+ call i32 @llvm.ctpop.i32( i32 12 ) ; <i32>:9 [#uses=1]
+ call i64 @llvm.ctpop.i64( i64 13 ) ; <i32>:11 [#uses=1]
+ call i8 @llvm.ctlz.i8( i8 14 ) ; <i32>:13 [#uses=1]
+ call i16 @llvm.ctlz.i16( i16 15 ) ; <i32>:15 [#uses=1]
+ call i32 @llvm.ctlz.i32( i32 16 ) ; <i32>:17 [#uses=1]
+ call i64 @llvm.ctlz.i64( i64 17 ) ; <i32>:19 [#uses=1]
+ call i8 @llvm.cttz.i8( i8 18 ) ; <i32>:21 [#uses=1]
+ call i16 @llvm.cttz.i16( i16 19 ) ; <i32>:23 [#uses=1]
+ call i32 @llvm.cttz.i32( i32 20 ) ; <i32>:25 [#uses=1]
+ call i64 @llvm.cttz.i64( i64 21 ) ; <i32>:27 [#uses=1]
+ ret void
+}
+
+declare i8 @llvm.ctpop.i8(i8)
+
+declare i16 @llvm.ctpop.i16(i16)
+
+declare i32 @llvm.ctpop.i32(i32)
+
+declare i64 @llvm.ctpop.i64(i64)
+
+declare i8 @llvm.ctlz.i8(i8)
+
+declare i16 @llvm.ctlz.i16(i16)
+
+declare i32 @llvm.ctlz.i32(i32)
+
+declare i64 @llvm.ctlz.i64(i64)
+
+declare i8 @llvm.cttz.i8(i8)
+
+declare i16 @llvm.cttz.i16(i16)
+
+declare i32 @llvm.cttz.i32(i32)
+
+declare i64 @llvm.cttz.i64(i64)
+
+; ModuleID = 'packed.ll'
+@foo1 = external global <4 x float> ; <<4 x float>*> [#uses=2]
+@foo102 = external global <2 x i32> ; <<2 x i32>*> [#uses=2]
+
+define void @main3() {
+ store <4 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >, <4 x float>* @foo1
+ store <2 x i32> < i32 4, i32 4 >, <2 x i32>* @foo102
+ %l1 = load <4 x float>* @foo1 ; <<4 x float>> [#uses=0]
+ %l2 = load <2 x i32>* @foo102 ; <<2 x i32>> [#uses=0]
+ ret void
+}
+
+; ModuleID = 'properties.ll'
+target datalayout = "e-p:32:32"
+target triple = "proc-vend-sys"
+deplibs = [ "m", "c" ]
+; ModuleID = 'prototype.ll'
+
+declare i32 @bar1017(i32 %in)
+
+define i32 @foo1016(i32 %blah) {
+ %xx = call i32 @bar1017( i32 %blah ) ; <i32> [#uses=1]
+ ret i32 %xx
+}
+
+; ModuleID = 'recursivetype.ll'
+ %list = type { %list*, i32 }
+
+declare i8* @malloc(i32)
+
+define void @InsertIntoListTail(%list** %L, i32 %Data) {
+bb1:
+ %reg116 = load %list** %L ; <%list*> [#uses=1]
+ %cast1004 = inttoptr i64 0 to %list* ; <%list*> [#uses=1]
+ %cond1000 = icmp eq %list* %reg116, %cast1004 ; <i1> [#uses=1]
+ br i1 %cond1000, label %bb3, label %bb2
+
+bb2: ; preds = %bb2, %bb1
+ %reg117 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ] ; <%list**> [#uses=1]
+ %cast1010 = bitcast %list** %reg117 to %list*** ; <%list***> [#uses=1]
+ %reg118 = load %list*** %cast1010 ; <%list**> [#uses=3]
+ %reg109 = load %list** %reg118 ; <%list*> [#uses=1]
+ %cast1005 = inttoptr i64 0 to %list* ; <%list*> [#uses=1]
+ %cond1001 = icmp ne %list* %reg109, %cast1005 ; <i1> [#uses=1]
+ br i1 %cond1001, label %bb2, label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %reg119 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ] ; <%list**> [#uses=1]
+ %cast1006 = bitcast %list** %reg119 to i8** ; <i8**> [#uses=1]
+ %reg111 = call i8* @malloc( i32 16 ) ; <i8*> [#uses=3]
+ store i8* %reg111, i8** %cast1006
+ %reg111.upgrd.1 = ptrtoint i8* %reg111 to i64 ; <i64> [#uses=1]
+ %reg1002 = add i64 %reg111.upgrd.1, 8 ; <i64> [#uses=1]
+ %reg1002.upgrd.2 = inttoptr i64 %reg1002 to i8* ; <i8*> [#uses=1]
+ %cast1008 = bitcast i8* %reg1002.upgrd.2 to i32* ; <i32*> [#uses=1]
+ store i32 %Data, i32* %cast1008
+ %cast1003 = inttoptr i64 0 to i64* ; <i64*> [#uses=1]
+ %cast1009 = bitcast i8* %reg111 to i64** ; <i64**> [#uses=1]
+ store i64* %cast1003, i64** %cast1009
+ ret void
+}
+
+define %list* @FindData(%list* %L, i32 %Data) {
+bb1:
+ br label %bb2
+
+bb2: ; preds = %bb6, %bb1
+ %reg115 = phi %list* [ %reg116, %bb6 ], [ %L, %bb1 ] ; <%list*> [#uses=4]
+ %cast1014 = inttoptr i64 0 to %list* ; <%list*> [#uses=1]
+ %cond1011 = icmp ne %list* %reg115, %cast1014 ; <i1> [#uses=1]
+ br i1 %cond1011, label %bb4, label %bb3
+
+bb3: ; preds = %bb2
+ ret %list* null
+
+bb4: ; preds = %bb2
+ %idx = getelementptr %list* %reg115, i64 0, i32 1 ; <i32*> [#uses=1]
+ %reg111 = load i32* %idx ; <i32> [#uses=1]
+ %cond1013 = icmp ne i32 %reg111, %Data ; <i1> [#uses=1]
+ br i1 %cond1013, label %bb6, label %bb5
+
+bb5: ; preds = %bb4
+ ret %list* %reg115
+
+bb6: ; preds = %bb4
+ %idx2 = getelementptr %list* %reg115, i64 0, i32 0 ; <%list**> [#uses=1]
+ %reg116 = load %list** %idx2 ; <%list*> [#uses=1]
+ br label %bb2
+}
+; ModuleID = 'simplecalltest.ll'
+ %FunTy = type i32 (i32)
+
+define void @invoke1019(%FunTy* %x) {
+ %foo = call i32 %x( i32 123 ) ; <i32> [#uses=0]
+ ret void
+}
+
+define i32 @main4(i32 %argc, i8** %argv, i8** %envp) {
+ %retval = call i32 @test1008( i32 %argc ) ; <i32> [#uses=2]
+ %two = add i32 %retval, %retval ; <i32> [#uses=1]
+ %retval2 = call i32 @test1008( i32 %argc ) ; <i32> [#uses=1]
+ %two2 = add i32 %two, %retval2 ; <i32> [#uses=1]
+ call void @invoke1019( %FunTy* @test1008 )
+ ret i32 %two2
+}
+
+define i32 @test1008(i32 %i0) {
+ ret i32 %i0
+}
+; ModuleID = 'smallest.ll'
+; ModuleID = 'small.ll'
+ %x = type i32
+
+define i32 @foo1020(i32 %in) {
+label:
+ ret i32 2
+}
+; ModuleID = 'testalloca.ll'
+ %inners = type { float, { i8 } }
+ %struct = type { i32, %inners, i64 }
+
+define i32 @testfunction(i32 %i0, i32 %j0) {
+ alloca i8, i32 5 ; <i8*>:1 [#uses=0]
+ %ptr = alloca i32 ; <i32*> [#uses=2]
+ store i32 3, i32* %ptr
+ %val = load i32* %ptr ; <i32> [#uses=0]
+ %sptr = alloca %struct ; <%struct*> [#uses=2]
+ %nsptr = getelementptr %struct* %sptr, i64 0, i32 1 ; <%inners*> [#uses=1]
+ %ubsptr = getelementptr %inners* %nsptr, i64 0, i32 1 ; <{ i8 }*> [#uses=1]
+ %idx = getelementptr { i8 }* %ubsptr, i64 0, i32 0 ; <i8*> [#uses=1]
+ store i8 4, i8* %idx
+ %fptr = getelementptr %struct* %sptr, i64 0, i32 1, i32 0 ; <float*> [#uses=1]
+ store float 4.000000e+00, float* %fptr
+ ret i32 3
+}
+; ModuleID = 'testconstants.ll'
+@somestr3 = constant [11 x i8] c"hello world"
+@array99 = constant [2 x i32] [ i32 12, i32 52 ]
+constant { i32, i32 } { i32 4, i32 3 } ; <{ i32, i32 }*>:0 [#uses=0]
+
+define [2 x i32]* @testfunction99(i32 %i0, i32 %j0) {
+ ret [2 x i32]* @array
+}
+
+define i8* @otherfunc(i32, double) {
+ %somestr = getelementptr [11 x i8]* @somestr3, i64 0, i64 0 ; <i8*> [#uses=1]
+ ret i8* %somestr
+}
+
+define i8* @yetanotherfunc(i32, double) {
+ ret i8* null
+}
+
+define i32 @negativeUnsigned() {
+ ret i32 -1
+}
+
+define i32 @largeSigned() {
+ ret i32 -394967296
+}
+; ModuleID = 'testlogical.ll'
+
+define i32 @simpleAdd(i32 %i0, i32 %j0) {
+ %t1 = xor i32 %i0, %j0 ; <i32> [#uses=1]
+ %t2 = or i32 %i0, %j0 ; <i32> [#uses=1]
+ %t3 = and i32 %t1, %t2 ; <i32> [#uses=1]
+ ret i32 %t3
+}
+; ModuleID = 'testmemory.ll'
+ %complexty = type { i32, { [4 x i8*], float }, double }
+ %struct = type { i32, { float, { i8 } }, i64 }
+
+define i32 @main6() {
+ call i32 @testfunction98( i64 0, i64 1 )
+ ret i32 0
+}
+
+define i32 @testfunction98(i64 %i0, i64 %j0) {
+ %array0 = malloc [4 x i8] ; <[4 x i8]*> [#uses=2]
+ %size = add i32 2, 2 ; <i32> [#uses=1]
+ %array1 = malloc i8, i32 4 ; <i8*> [#uses=1]
+ %array2 = malloc i8, i32 %size ; <i8*> [#uses=1]
+ %idx = getelementptr [4 x i8]* %array0, i64 0, i64 2 ; <i8*> [#uses=1]
+ store i8 123, i8* %idx
+ free [4 x i8]* %array0
+ free i8* %array1
+ free i8* %array2
+ %aa = alloca %complexty, i32 5 ; <%complexty*> [#uses=1]
+ %idx2 = getelementptr %complexty* %aa, i64 %i0, i32 1, i32 0, i64 %j0 ; <i8**> [#uses=1]
+ store i8* null, i8** %idx2
+ %ptr = alloca i32 ; <i32*> [#uses=2]
+ store i32 3, i32* %ptr
+ %val = load i32* %ptr ; <i32> [#uses=0]
+ %sptr = alloca %struct ; <%struct*> [#uses=1]
+ %ubsptr = getelementptr %struct* %sptr, i64 0, i32 1, i32 1 ; <{ i8 }*> [#uses=1]
+ %idx3 = getelementptr { i8 }* %ubsptr, i64 0, i32 0 ; <i8*> [#uses=1]
+ store i8 4, i8* %idx3
+ ret i32 3
+}
+; ModuleID = 'testswitch.ll'
+ %int = type i32
+
+define i32 @squared(i32 %i0) {
+ switch i32 %i0, label %Default [
+ i32 1, label %Case1
+ i32 2, label %Case2
+ i32 4, label %Case4
+ ]
+
+Default: ; preds = %0
+ ret i32 -1
+
+Case1: ; preds = %0
+ ret i32 1
+
+Case2: ; preds = %0
+ ret i32 4
+
+Case4: ; preds = %0
+ ret i32 16
+}
+; ModuleID = 'testvarargs.ll'
+
+declare i32 @printf(i8*, ...)
+
+define i32 @testvarar() {
+ call i32 (i8*, ...)* @printf( i8* null, i32 12, i8 42 ) ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
+; ModuleID = 'undefined.ll'
+@X2 = global i32 undef ; <i32*> [#uses=0]
+
+declare i32 @atoi(i8*)
+
+define i32 @test1009() {
+ ret i32 undef
+}
+
+define i32 @test1003() {
+ %X = add i32 undef, 1 ; <i32> [#uses=1]
+ ret i32 %X
+}
+; ModuleID = 'unreachable.ll'
+
+declare void @bar()
+
+define i32 @foo1021() {
+ unreachable
+}
+
+define double @xyz() {
+ call void @bar( )
+ unreachable
+}
+; ModuleID = 'varargs.ll'
+
+declare void @llvm.va_start(i8* %ap)
+
+declare void @llvm.va_copy(i8* %aq, i8* %ap)
+
+declare void @llvm.va_end(i8* %ap)
+
+define i32 @test1010(i32 %X, ...) {
+ %ap = alloca i8* ; <i8**> [#uses=4]
+ %va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %va.upgrd.1 )
+ %tmp = va_arg i8** %ap, i32 ; <i32> [#uses=1]
+ %aq = alloca i8* ; <i8**> [#uses=2]
+ %va0.upgrd.2 = bitcast i8** %aq to i8* ; <i8*> [#uses=1]
+ %va1.upgrd.3 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_copy( i8* %va0.upgrd.2, i8* %va1.upgrd.3 )
+ %va.upgrd.4 = bitcast i8** %aq to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.4 )
+ %va.upgrd.5 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.5 )
+ ret i32 %tmp
+}
+; ModuleID = 'varargs_new.ll'
+
+declare void @llvm.va_start(i8*)
+
+declare void @llvm.va_copy(i8*, i8*)
+
+declare void @llvm.va_end(i8*)
+
+define i32 @test1011(i32 %X, ...) {
+ %ap = alloca i8* ; <i8**> [#uses=4]
+ %aq = alloca i8* ; <i8**> [#uses=2]
+ %va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %va.upgrd.1 )
+ %tmp = va_arg i8** %ap, i32 ; <i32> [#uses=1]
+ %apv = load i8** %ap ; <i8*> [#uses=1]
+ %va0.upgrd.2 = bitcast i8** %aq to i8* ; <i8*> [#uses=1]
+ %va1.upgrd.3 = bitcast i8* %apv to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_copy( i8* %va0.upgrd.2, i8* %va1.upgrd.3 )
+ %va.upgrd.4 = bitcast i8** %aq to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.4 )
+ %va.upgrd.5 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.5 )
+ ret i32 %tmp
+}
+; ModuleID = 'weirdnames.ll'
+ "&^ " = type { i32 }
+@"%.*+ foo" = global "&^ " { i32 5 } ; <"&^ "*> [#uses=0]
+@"0" = global float 0.000000e+00 ; <float*> [#uses=0]
diff --git a/test/CodeGen/CellSPU/2009-01-01-BrCond.ll b/test/CodeGen/CellSPU/2009-01-01-BrCond.ll
new file mode 100644
index 0000000..58e3190
--- /dev/null
+++ b/test/CodeGen/CellSPU/2009-01-01-BrCond.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=cellspu -o - | grep brnz
+; PR3274
+
+target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128"
+target triple = "spu"
+ %struct.anon = type { i64 }
+ %struct.fp_number_type = type { i32, i32, i32, [4 x i8], %struct.anon }
+
+define double @__floatunsidf(i32 %arg_a) nounwind {
+entry:
+ %in = alloca %struct.fp_number_type, align 16
+ %0 = getelementptr %struct.fp_number_type* %in, i32 0, i32 1
+ store i32 0, i32* %0, align 4
+ %1 = icmp eq i32 %arg_a, 0
+ %2 = getelementptr %struct.fp_number_type* %in, i32 0, i32 0
+ br i1 %1, label %bb, label %bb1
+
+bb: ; preds = %entry
+ store i32 2, i32* %2, align 8
+ br label %bb7
+
+bb1: ; preds = %entry
+ ret double 0.0
+
+bb7: ; preds = %bb5, %bb1, %bb
+ ret double 1.0
+}
+
+; declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+
+declare double @__pack_d(%struct.fp_number_type*)
diff --git a/test/CodeGen/CellSPU/and_ops.ll b/test/CodeGen/CellSPU/and_ops.ll
new file mode 100644
index 0000000..139e97b
--- /dev/null
+++ b/test/CodeGen/CellSPU/and_ops.ll
@@ -0,0 +1,279 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep and %t1.s | count 234
+; RUN: grep andc %t1.s | count 85
+; RUN: grep andi %t1.s | count 37
+; RUN: grep andhi %t1.s | count 30
+; RUN: grep andbi %t1.s | count 4
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; AND instruction generation:
+define <4 x i32> @and_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = and <4 x i32> %arg1, %arg2
+ ret <4 x i32> %A
+}
+
+define <4 x i32> @and_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = and <4 x i32> %arg2, %arg1
+ ret <4 x i32> %A
+}
+
+define <8 x i16> @and_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = and <8 x i16> %arg1, %arg2
+ ret <8 x i16> %A
+}
+
+define <8 x i16> @and_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = and <8 x i16> %arg2, %arg1
+ ret <8 x i16> %A
+}
+
+define <16 x i8> @and_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = and <16 x i8> %arg2, %arg1
+ ret <16 x i8> %A
+}
+
+define <16 x i8> @and_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = and <16 x i8> %arg1, %arg2
+ ret <16 x i8> %A
+}
+
+define i32 @and_i32_1(i32 %arg1, i32 %arg2) {
+ %A = and i32 %arg2, %arg1
+ ret i32 %A
+}
+
+define i32 @and_i32_2(i32 %arg1, i32 %arg2) {
+ %A = and i32 %arg1, %arg2
+ ret i32 %A
+}
+
+define i16 @and_i16_1(i16 %arg1, i16 %arg2) {
+ %A = and i16 %arg2, %arg1
+ ret i16 %A
+}
+
+define i16 @and_i16_2(i16 %arg1, i16 %arg2) {
+ %A = and i16 %arg1, %arg2
+ ret i16 %A
+}
+
+define i8 @and_i8_1(i8 %arg1, i8 %arg2) {
+ %A = and i8 %arg2, %arg1
+ ret i8 %A
+}
+
+define i8 @and_i8_2(i8 %arg1, i8 %arg2) {
+ %A = and i8 %arg1, %arg2
+ ret i8 %A
+}
+
+; ANDC instruction generation:
+define <4 x i32> @andc_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = xor <4 x i32> %arg2, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = and <4 x i32> %arg1, %A
+ ret <4 x i32> %B
+}
+
+define <4 x i32> @andc_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = xor <4 x i32> %arg1, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = and <4 x i32> %arg2, %A
+ ret <4 x i32> %B
+}
+
+define <4 x i32> @andc_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = xor <4 x i32> %arg1, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = and <4 x i32> %A, %arg2
+ ret <4 x i32> %B
+}
+
+define <8 x i16> @andc_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %arg1, %A
+ ret <8 x i16> %B
+}
+
+define <8 x i16> @andc_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %arg2, %A
+ ret <8 x i16> %B
+}
+
+define <16 x i8> @andc_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %arg2, %A
+ ret <16 x i8> %B
+}
+
+define <16 x i8> @andc_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %arg1, %A
+ ret <16 x i8> %B
+}
+
+define <16 x i8> @andc_v16i8_3(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %A, %arg1
+ ret <16 x i8> %B
+}
+
+define i32 @andc_i32_1(i32 %arg1, i32 %arg2) {
+ %A = xor i32 %arg2, -1
+ %B = and i32 %A, %arg1
+ ret i32 %B
+}
+
+define i32 @andc_i32_2(i32 %arg1, i32 %arg2) {
+ %A = xor i32 %arg1, -1
+ %B = and i32 %A, %arg2
+ ret i32 %B
+}
+
+define i32 @andc_i32_3(i32 %arg1, i32 %arg2) {
+ %A = xor i32 %arg2, -1
+ %B = and i32 %arg1, %A
+ ret i32 %B
+}
+
+define i16 @andc_i16_1(i16 %arg1, i16 %arg2) {
+ %A = xor i16 %arg2, -1
+ %B = and i16 %A, %arg1
+ ret i16 %B
+}
+
+define i16 @andc_i16_2(i16 %arg1, i16 %arg2) {
+ %A = xor i16 %arg1, -1
+ %B = and i16 %A, %arg2
+ ret i16 %B
+}
+
+define i16 @andc_i16_3(i16 %arg1, i16 %arg2) {
+ %A = xor i16 %arg2, -1
+ %B = and i16 %arg1, %A
+ ret i16 %B
+}
+
+define i8 @andc_i8_1(i8 %arg1, i8 %arg2) {
+ %A = xor i8 %arg2, -1
+ %B = and i8 %A, %arg1
+ ret i8 %B
+}
+
+define i8 @andc_i8_2(i8 %arg1, i8 %arg2) {
+ %A = xor i8 %arg1, -1
+ %B = and i8 %A, %arg2
+ ret i8 %B
+}
+
+define i8 @andc_i8_3(i8 %arg1, i8 %arg2) {
+ %A = xor i8 %arg2, -1
+ %B = and i8 %arg1, %A
+ ret i8 %B
+}
+
+; ANDI instruction generation (i32 data type):
+define <4 x i32> @andi_v4i32_1(<4 x i32> %in) {
+ %tmp2 = and <4 x i32> %in, < i32 511, i32 511, i32 511, i32 511 >
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @andi_v4i32_2(<4 x i32> %in) {
+ %tmp2 = and <4 x i32> %in, < i32 510, i32 510, i32 510, i32 510 >
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @andi_v4i32_3(<4 x i32> %in) {
+ %tmp2 = and <4 x i32> %in, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @andi_v4i32_4(<4 x i32> %in) {
+ %tmp2 = and <4 x i32> %in, < i32 -512, i32 -512, i32 -512, i32 -512 >
+ ret <4 x i32> %tmp2
+}
+
+define i32 @andi_u32(i32 zeroext %in) zeroext {
+ %tmp37 = and i32 %in, 37
+ ret i32 %tmp37
+}
+
+define i32 @andi_i32(i32 signext %in) signext {
+ %tmp38 = and i32 %in, 37
+ ret i32 %tmp38
+}
+
+define i32 @andi_i32_1(i32 %in) {
+ %tmp37 = and i32 %in, 37
+ ret i32 %tmp37
+}
+
+; ANDHI instruction generation (i16 data type):
+define <8 x i16> @andhi_v8i16_1(<8 x i16> %in) {
+ %tmp2 = and <8 x i16> %in, < i16 511, i16 511, i16 511, i16 511,
+ i16 511, i16 511, i16 511, i16 511 >
+ ret <8 x i16> %tmp2
+}
+
+define <8 x i16> @andhi_v8i16_2(<8 x i16> %in) {
+ %tmp2 = and <8 x i16> %in, < i16 510, i16 510, i16 510, i16 510,
+ i16 510, i16 510, i16 510, i16 510 >
+ ret <8 x i16> %tmp2
+}
+
+define <8 x i16> @andhi_v8i16_3(<8 x i16> %in) {
+ %tmp2 = and <8 x i16> %in, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1 >
+ ret <8 x i16> %tmp2
+}
+
+define <8 x i16> @andhi_v8i16_4(<8 x i16> %in) {
+ %tmp2 = and <8 x i16> %in, < i16 -512, i16 -512, i16 -512, i16 -512,
+ i16 -512, i16 -512, i16 -512, i16 -512 >
+ ret <8 x i16> %tmp2
+}
+
+define i16 @andhi_u16(i16 zeroext %in) zeroext {
+ %tmp37 = and i16 %in, 37 ; <i16> [#uses=1]
+ ret i16 %tmp37
+}
+
+define i16 @andhi_i16(i16 signext %in) signext {
+ %tmp38 = and i16 %in, 37 ; <i16> [#uses=1]
+ ret i16 %tmp38
+}
+
+; i8 data type (s/b ANDBI if 8-bit registers were supported):
+define <16 x i8> @and_v16i8(<16 x i8> %in) {
+ ; ANDBI generated for vector types
+ %tmp2 = and <16 x i8> %in, < i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
+ i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
+ i8 42, i8 42, i8 42, i8 42 >
+ ret <16 x i8> %tmp2
+}
+
+define i8 @and_u8(i8 zeroext %in) zeroext {
+ ; ANDBI generated:
+ %tmp37 = and i8 %in, 37
+ ret i8 %tmp37
+}
+
+define i8 @and_sext8(i8 signext %in) signext {
+ ; ANDBI generated
+ %tmp38 = and i8 %in, 37
+ ret i8 %tmp38
+}
+
+define i8 @and_i8(i8 %in) {
+ ; ANDBI generated
+ %tmp38 = and i8 %in, 205
+ ret i8 %tmp38
+}
diff --git a/test/CodeGen/CellSPU/call.ll b/test/CodeGen/CellSPU/call.ll
new file mode 100644
index 0000000..960d2fe
--- /dev/null
+++ b/test/CodeGen/CellSPU/call.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep brsl %t1.s | count 1
+; RUN: grep brasl %t1.s | count 1
+; RUN: grep stqd %t1.s | count 80
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define i32 @main() {
+entry:
+ %a = call i32 @stub_1(i32 1, float 0x400921FA00000000)
+ call void @extern_stub_1(i32 %a, i32 4)
+ ret i32 %a
+}
+
+declare void @extern_stub_1(i32, i32)
+
+define i32 @stub_1(i32 %x, float %y) {
+entry:
+ ret i32 0
+}
+
+; vararg call: ensure that all caller-saved registers are spilled to the
+; stack:
+define i32 @stub_2(...) {
+entry:
+ ret i32 0
+}
diff --git a/test/CodeGen/CellSPU/call_indirect.ll b/test/CodeGen/CellSPU/call_indirect.ll
new file mode 100644
index 0000000..08dad74
--- /dev/null
+++ b/test/CodeGen/CellSPU/call_indirect.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=cellspu -asm-verbose=0 > %t1.s
+; RUN: llc < %s -march=cellspu -mattr=large_mem -asm-verbose=0 > %t2.s
+; RUN: grep bisl %t1.s | count 7
+; RUN: grep ila %t1.s | count 1
+; RUN: grep rotqby %t1.s | count 5
+; RUN: grep lqa %t1.s | count 1
+; RUN: grep lqd %t1.s | count 12
+; RUN: grep dispatch_tab %t1.s | count 5
+; RUN: grep bisl %t2.s | count 7
+; RUN: grep ilhu %t2.s | count 2
+; RUN: grep iohl %t2.s | count 2
+; RUN: grep rotqby %t2.s | count 5
+; RUN: grep lqd %t2.s | count 13
+; RUN: grep ilhu %t2.s | count 2
+; RUN: grep ai %t2.s | count 8
+; RUN: grep dispatch_tab %t2.s | count 6
+
+; ModuleID = 'call_indirect.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128"
+target triple = "spu-unknown-elf"
+
+@dispatch_tab = global [6 x void (i32, float)*] zeroinitializer, align 16
+
+define void @dispatcher(i32 %i_arg, float %f_arg) {
+entry:
+ %tmp2 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 0), align 16
+ tail call void %tmp2( i32 %i_arg, float %f_arg )
+ %tmp2.1 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 1), align 4
+ tail call void %tmp2.1( i32 %i_arg, float %f_arg )
+ %tmp2.2 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 2), align 4
+ tail call void %tmp2.2( i32 %i_arg, float %f_arg )
+ %tmp2.3 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 3), align 4
+ tail call void %tmp2.3( i32 %i_arg, float %f_arg )
+ %tmp2.4 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 4), align 4
+ tail call void %tmp2.4( i32 %i_arg, float %f_arg )
+ %tmp2.5 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 5), align 4
+ tail call void %tmp2.5( i32 %i_arg, float %f_arg )
+ ret void
+}
+
+@ptr_list = internal global [1 x void ()*] [ void ()* inttoptr (i64 4294967295 to void ()*) ], align 4
[email protected] = internal global void ()** getelementptr ([1 x void ()*]* @ptr_list, i32 0, i32 1), align 16
+
+define void @double_indirect_call() {
+ %a = load void ()*** @ptr.a, align 16
+ %b = load void ()** %a, align 4
+ tail call void %b()
+ ret void
+}
diff --git a/test/CodeGen/CellSPU/ctpop.ll b/test/CodeGen/CellSPU/ctpop.ll
new file mode 100644
index 0000000..e1a6cd8
--- /dev/null
+++ b/test/CodeGen/CellSPU/ctpop.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep cntb %t1.s | count 3
+; RUN: grep andi %t1.s | count 3
+; RUN: grep rotmi %t1.s | count 2
+; RUN: grep rothmi %t1.s | count 1
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+declare i8 @llvm.ctpop.i8(i8)
+declare i16 @llvm.ctpop.i16(i16)
+declare i32 @llvm.ctpop.i32(i32)
+
+define i32 @test_i8(i8 %X) {
+ call i8 @llvm.ctpop.i8(i8 %X)
+ %Y = zext i8 %1 to i32
+ ret i32 %Y
+}
+
+define i32 @test_i16(i16 %X) {
+ call i16 @llvm.ctpop.i16(i16 %X)
+ %Y = zext i16 %1 to i32
+ ret i32 %Y
+}
+
+define i32 @test_i32(i32 %X) {
+ call i32 @llvm.ctpop.i32(i32 %X)
+ %Y = bitcast i32 %1 to i32
+ ret i32 %Y
+}
+
diff --git a/test/CodeGen/CellSPU/dg.exp b/test/CodeGen/CellSPU/dg.exp
new file mode 100644
index 0000000..d416479
--- /dev/null
+++ b/test/CodeGen/CellSPU/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target CellSPU] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/CellSPU/dp_farith.ll b/test/CodeGen/CellSPU/dp_farith.ll
new file mode 100644
index 0000000..66bff3eb
--- /dev/null
+++ b/test/CodeGen/CellSPU/dp_farith.ll
@@ -0,0 +1,102 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep dfa %t1.s | count 2
+; RUN: grep dfs %t1.s | count 2
+; RUN: grep dfm %t1.s | count 6
+; RUN: grep dfma %t1.s | count 2
+; RUN: grep dfms %t1.s | count 2
+; RUN: grep dfnms %t1.s | count 4
+;
+; This file includes double precision floating point arithmetic instructions
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define double @fadd(double %arg1, double %arg2) {
+ %A = fadd double %arg1, %arg2
+ ret double %A
+}
+
+define <2 x double> @fadd_vec(<2 x double> %arg1, <2 x double> %arg2) {
+ %A = fadd <2 x double> %arg1, %arg2
+ ret <2 x double> %A
+}
+
+define double @fsub(double %arg1, double %arg2) {
+ %A = fsub double %arg1, %arg2
+ ret double %A
+}
+
+define <2 x double> @fsub_vec(<2 x double> %arg1, <2 x double> %arg2) {
+ %A = fsub <2 x double> %arg1, %arg2
+ ret <2 x double> %A
+}
+
+define double @fmul(double %arg1, double %arg2) {
+ %A = fmul double %arg1, %arg2
+ ret double %A
+}
+
+define <2 x double> @fmul_vec(<2 x double> %arg1, <2 x double> %arg2) {
+ %A = fmul <2 x double> %arg1, %arg2
+ ret <2 x double> %A
+}
+
+define double @fma(double %arg1, double %arg2, double %arg3) {
+ %A = fmul double %arg1, %arg2
+ %B = fadd double %A, %arg3
+ ret double %B
+}
+
+define <2 x double> @fma_vec(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
+ %A = fmul <2 x double> %arg1, %arg2
+ %B = fadd <2 x double> %A, %arg3
+ ret <2 x double> %B
+}
+
+define double @fms(double %arg1, double %arg2, double %arg3) {
+ %A = fmul double %arg1, %arg2
+ %B = fsub double %A, %arg3
+ ret double %B
+}
+
+define <2 x double> @fms_vec(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
+ %A = fmul <2 x double> %arg1, %arg2
+ %B = fsub <2 x double> %A, %arg3
+ ret <2 x double> %B
+}
+
+; - (a * b - c)
+define double @d_fnms_1(double %arg1, double %arg2, double %arg3) {
+ %A = fmul double %arg1, %arg2
+ %B = fsub double %A, %arg3
+ %C = fsub double -0.000000e+00, %B ; <double> [#uses=1]
+ ret double %C
+}
+
+; Annother way of getting fnms
+; - ( a * b ) + c => c - (a * b)
+define double @d_fnms_2(double %arg1, double %arg2, double %arg3) {
+ %A = fmul double %arg1, %arg2
+ %B = fsub double %arg3, %A
+ ret double %B
+}
+
+; FNMS: - (a * b - c) => c - (a * b)
+define <2 x double> @d_fnms_vec_1(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
+ %A = fmul <2 x double> %arg1, %arg2
+ %B = fsub <2 x double> %arg3, %A
+ ret <2 x double> %B
+}
+
+; Another way to get fnms using a constant vector
+; - ( a * b - c)
+define <2 x double> @d_fnms_vec_2(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
+ %A = fmul <2 x double> %arg1, %arg2 ; <<2 x double>> [#uses=1]
+ %B = fsub <2 x double> %A, %arg3 ; <<2 x double>> [#uses=1]
+ %C = fsub <2 x double> < double -0.00000e+00, double -0.00000e+00 >, %B
+ ret <2 x double> %C
+}
+
+;define double @fdiv_1(double %arg1, double %arg2) {
+; %A = fdiv double %arg1, %arg2 ; <double> [#uses=1]
+; ret double %A
+;}
diff --git a/test/CodeGen/CellSPU/eqv.ll b/test/CodeGen/CellSPU/eqv.ll
new file mode 100644
index 0000000..22c8c3b
--- /dev/null
+++ b/test/CodeGen/CellSPU/eqv.ll
@@ -0,0 +1,152 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep eqv %t1.s | count 18
+; RUN: grep xshw %t1.s | count 6
+; RUN: grep xsbh %t1.s | count 3
+; RUN: grep andi %t1.s | count 3
+
+; Test the 'eqv' instruction, whose boolean expression is:
+; (a & b) | (~a & ~b), which simplifies to
+; (a & b) | ~(a | b)
+; Alternatively, a ^ ~b, which the compiler will also match.
+
+; ModuleID = 'eqv.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define <4 x i32> @equiv_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = and <4 x i32> %arg1, %arg2
+ %B = or <4 x i32> %arg1, %arg2
+ %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %C = or <4 x i32> %A, %Bnot
+ ret <4 x i32> %C
+}
+
+define <4 x i32> @equiv_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
+ %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
+ %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %C
+}
+
+define <4 x i32> @equiv_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
+ %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
+ %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %C
+}
+
+define <4 x i32> @equiv_v4i32_4(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %arg2not = xor <4 x i32> %arg2, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %C = xor <4 x i32> %arg1, %arg2not
+ ret <4 x i32> %C
+}
+
+define i32 @equiv_i32_1(i32 %arg1, i32 %arg2) {
+ %A = and i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %B = or i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %Bnot = xor i32 %B, -1 ; <i32> [#uses=1]
+ %C = or i32 %A, %Bnot ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @equiv_i32_2(i32 %arg1, i32 %arg2) {
+ %B = or i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %Bnot = xor i32 %B, -1 ; <i32> [#uses=1]
+ %A = and i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %C = or i32 %A, %Bnot ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @equiv_i32_3(i32 %arg1, i32 %arg2) {
+ %B = or i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %A = and i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %Bnot = xor i32 %B, -1 ; <i32> [#uses=1]
+ %C = or i32 %A, %Bnot ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @equiv_i32_4(i32 %arg1, i32 %arg2) {
+ %arg2not = xor i32 %arg2, -1
+ %C = xor i32 %arg1, %arg2not
+ ret i32 %C
+}
+
+define i32 @equiv_i32_5(i32 %arg1, i32 %arg2) {
+ %arg1not = xor i32 %arg1, -1
+ %C = xor i32 %arg2, %arg1not
+ ret i32 %C
+}
+
+define i16 @equiv_i16_1(i16 signext %arg1, i16 signext %arg2) signext {
+ %A = and i16 %arg1, %arg2 ; <i16> [#uses=1]
+ %B = or i16 %arg1, %arg2 ; <i16> [#uses=1]
+ %Bnot = xor i16 %B, -1 ; <i16> [#uses=1]
+ %C = or i16 %A, %Bnot ; <i16> [#uses=1]
+ ret i16 %C
+}
+
+define i16 @equiv_i16_2(i16 signext %arg1, i16 signext %arg2) signext {
+ %B = or i16 %arg1, %arg2 ; <i16> [#uses=1]
+ %Bnot = xor i16 %B, -1 ; <i16> [#uses=1]
+ %A = and i16 %arg1, %arg2 ; <i16> [#uses=1]
+ %C = or i16 %A, %Bnot ; <i16> [#uses=1]
+ ret i16 %C
+}
+
+define i16 @equiv_i16_3(i16 signext %arg1, i16 signext %arg2) signext {
+ %B = or i16 %arg1, %arg2 ; <i16> [#uses=1]
+ %A = and i16 %arg1, %arg2 ; <i16> [#uses=1]
+ %Bnot = xor i16 %B, -1 ; <i16> [#uses=1]
+ %C = or i16 %A, %Bnot ; <i16> [#uses=1]
+ ret i16 %C
+}
+
+define i8 @equiv_i8_1(i8 signext %arg1, i8 signext %arg2) signext {
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
+ %C = or i8 %A, %Bnot ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @equiv_i8_2(i8 signext %arg1, i8 signext %arg2) signext {
+ %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %C = or i8 %A, %Bnot ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @equiv_i8_3(i8 signext %arg1, i8 signext %arg2) signext {
+ %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
+ %C = or i8 %A, %Bnot ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @equiv_u8_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext {
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
+ %C = or i8 %A, %Bnot ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @equiv_u8_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext {
+ %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %C = or i8 %A, %Bnot ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @equiv_u8_3(i8 zeroext %arg1, i8 zeroext %arg2) zeroext {
+ %B = or i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %Bnot = xor i8 %B, -1 ; <i8> [#uses=1]
+ %C = or i8 %A, %Bnot ; <i8> [#uses=1]
+ ret i8 %C
+}
diff --git a/test/CodeGen/CellSPU/extract_elt.ll b/test/CodeGen/CellSPU/extract_elt.ll
new file mode 100644
index 0000000..0ac971c
--- /dev/null
+++ b/test/CodeGen/CellSPU/extract_elt.ll
@@ -0,0 +1,277 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep shufb %t1.s | count 39
+; RUN: grep ilhu %t1.s | count 27
+; RUN: grep iohl %t1.s | count 27
+; RUN: grep lqa %t1.s | count 10
+; RUN: grep shlqby %t1.s | count 12
+; RUN: grep 515 %t1.s | count 1
+; RUN: grep 1029 %t1.s | count 2
+; RUN: grep 1543 %t1.s | count 2
+; RUN: grep 2057 %t1.s | count 2
+; RUN: grep 2571 %t1.s | count 2
+; RUN: grep 3085 %t1.s | count 2
+; RUN: grep 3599 %t1.s | count 2
+; RUN: grep 32768 %t1.s | count 1
+; RUN: grep 32769 %t1.s | count 1
+; RUN: grep 32770 %t1.s | count 1
+; RUN: grep 32771 %t1.s | count 1
+; RUN: grep 32772 %t1.s | count 1
+; RUN: grep 32773 %t1.s | count 1
+; RUN: grep 32774 %t1.s | count 1
+; RUN: grep 32775 %t1.s | count 1
+; RUN: grep 32776 %t1.s | count 1
+; RUN: grep 32777 %t1.s | count 1
+; RUN: grep 32778 %t1.s | count 1
+; RUN: grep 32779 %t1.s | count 1
+; RUN: grep 32780 %t1.s | count 1
+; RUN: grep 32781 %t1.s | count 1
+; RUN: grep 32782 %t1.s | count 1
+; RUN: grep 32783 %t1.s | count 1
+; RUN: grep 32896 %t1.s | count 24
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define i32 @i32_extract_0(<4 x i32> %v) {
+entry:
+ %a = extractelement <4 x i32> %v, i32 0
+ ret i32 %a
+}
+
+define i32 @i32_extract_1(<4 x i32> %v) {
+entry:
+ %a = extractelement <4 x i32> %v, i32 1
+ ret i32 %a
+}
+
+define i32 @i32_extract_2(<4 x i32> %v) {
+entry:
+ %a = extractelement <4 x i32> %v, i32 2
+ ret i32 %a
+}
+
+define i32 @i32_extract_3(<4 x i32> %v) {
+entry:
+ %a = extractelement <4 x i32> %v, i32 3
+ ret i32 %a
+}
+
+define i16 @i16_extract_0(<8 x i16> %v) {
+entry:
+ %a = extractelement <8 x i16> %v, i32 0
+ ret i16 %a
+}
+
+define i16 @i16_extract_1(<8 x i16> %v) {
+entry:
+ %a = extractelement <8 x i16> %v, i32 1
+ ret i16 %a
+}
+
+define i16 @i16_extract_2(<8 x i16> %v) {
+entry:
+ %a = extractelement <8 x i16> %v, i32 2
+ ret i16 %a
+}
+
+define i16 @i16_extract_3(<8 x i16> %v) {
+entry:
+ %a = extractelement <8 x i16> %v, i32 3
+ ret i16 %a
+}
+
+define i16 @i16_extract_4(<8 x i16> %v) {
+entry:
+ %a = extractelement <8 x i16> %v, i32 4
+ ret i16 %a
+}
+
+define i16 @i16_extract_5(<8 x i16> %v) {
+entry:
+ %a = extractelement <8 x i16> %v, i32 5
+ ret i16 %a
+}
+
+define i16 @i16_extract_6(<8 x i16> %v) {
+entry:
+ %a = extractelement <8 x i16> %v, i32 6
+ ret i16 %a
+}
+
+define i16 @i16_extract_7(<8 x i16> %v) {
+entry:
+ %a = extractelement <8 x i16> %v, i32 7
+ ret i16 %a
+}
+
+define i8 @i8_extract_0(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 0
+ ret i8 %a
+}
+
+define i8 @i8_extract_1(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 1
+ ret i8 %a
+}
+
+define i8 @i8_extract_2(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 2
+ ret i8 %a
+}
+
+define i8 @i8_extract_3(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 3
+ ret i8 %a
+}
+
+define i8 @i8_extract_4(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 4
+ ret i8 %a
+}
+
+define i8 @i8_extract_5(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 5
+ ret i8 %a
+}
+
+define i8 @i8_extract_6(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 6
+ ret i8 %a
+}
+
+define i8 @i8_extract_7(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 7
+ ret i8 %a
+}
+
+define i8 @i8_extract_8(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 8
+ ret i8 %a
+}
+
+define i8 @i8_extract_9(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 9
+ ret i8 %a
+}
+
+define i8 @i8_extract_10(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 10
+ ret i8 %a
+}
+
+define i8 @i8_extract_11(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 11
+ ret i8 %a
+}
+
+define i8 @i8_extract_12(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 12
+ ret i8 %a
+}
+
+define i8 @i8_extract_13(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 13
+ ret i8 %a
+}
+
+define i8 @i8_extract_14(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 14
+ ret i8 %a
+}
+
+define i8 @i8_extract_15(<16 x i8> %v) {
+entry:
+ %a = extractelement <16 x i8> %v, i32 15
+ ret i8 %a
+}
+
+;;--------------------------------------------------------------------------
+;; extract element, variable index:
+;;--------------------------------------------------------------------------
+
+define i8 @extract_varadic_i8(i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <16 x i8> < i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, i32 %i
+ ret i8 %0
+}
+
+define i8 @extract_varadic_i8_1(<16 x i8> %v, i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <16 x i8> %v, i32 %i
+ ret i8 %0
+}
+
+define i16 @extract_varadic_i16(i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <8 x i16> < i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, i32 %i
+ ret i16 %0
+}
+
+define i16 @extract_varadic_i16_1(<8 x i16> %v, i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <8 x i16> %v, i32 %i
+ ret i16 %0
+}
+
+define i32 @extract_varadic_i32(i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <4 x i32> < i32 0, i32 1, i32 2, i32 3>, i32 %i
+ ret i32 %0
+}
+
+define i32 @extract_varadic_i32_1(<4 x i32> %v, i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <4 x i32> %v, i32 %i
+ ret i32 %0
+}
+
+define float @extract_varadic_f32(i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <4 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >, i32 %i
+ ret float %0
+}
+
+define float @extract_varadic_f32_1(<4 x float> %v, i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <4 x float> %v, i32 %i
+ ret float %0
+}
+
+define i64 @extract_varadic_i64(i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <2 x i64> < i64 0, i64 1>, i32 %i
+ ret i64 %0
+}
+
+define i64 @extract_varadic_i64_1(<2 x i64> %v, i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <2 x i64> %v, i32 %i
+ ret i64 %0
+}
+
+define double @extract_varadic_f64(i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <2 x double> < double 1.000000e+00, double 2.000000e+00>, i32 %i
+ ret double %0
+}
+
+define double @extract_varadic_f64_1(<2 x double> %v, i32 %i) nounwind readnone {
+entry:
+ %0 = extractelement <2 x double> %v, i32 %i
+ ret double %0
+}
diff --git a/test/CodeGen/CellSPU/fcmp32.ll b/test/CodeGen/CellSPU/fcmp32.ll
new file mode 100644
index 0000000..f07fe6f
--- /dev/null
+++ b/test/CodeGen/CellSPU/fcmp32.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep fceq %t1.s | count 1
+; RUN: grep fcmeq %t1.s | count 1
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; Exercise the floating point comparison operators for f32:
+
+declare double @fabs(double)
+declare float @fabsf(float)
+
+define i1 @fcmp_eq(float %arg1, float %arg2) {
+ %A = fcmp oeq float %arg1, %arg2
+ ret i1 %A
+}
+
+define i1 @fcmp_mag_eq(float %arg1, float %arg2) {
+ %1 = call float @fabsf(float %arg1)
+ %2 = call float @fabsf(float %arg2)
+ %3 = fcmp oeq float %1, %2
+ ret i1 %3
+}
diff --git a/test/CodeGen/CellSPU/fcmp64.ll b/test/CodeGen/CellSPU/fcmp64.ll
new file mode 100644
index 0000000..2b61fa6
--- /dev/null
+++ b/test/CodeGen/CellSPU/fcmp64.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+
+define i1 @fcmp_eq_setcc_f64(double %arg1, double %arg2) nounwind {
+entry:
+ %A = fcmp oeq double %arg1, %arg2
+ ret i1 %A
+}
diff --git a/test/CodeGen/CellSPU/fdiv.ll b/test/CodeGen/CellSPU/fdiv.ll
new file mode 100644
index 0000000..9921626
--- /dev/null
+++ b/test/CodeGen/CellSPU/fdiv.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep frest %t1.s | count 2
+; RUN: grep -w fi %t1.s | count 2
+; RUN: grep -w fm %t1.s | count 2
+; RUN: grep fma %t1.s | count 2
+; RUN: grep fnms %t1.s | count 4
+; RUN: grep cgti %t1.s | count 2
+; RUN: grep selb %t1.s | count 2
+;
+; This file includes standard floating point arithmetic instructions
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define float @fdiv32(float %arg1, float %arg2) {
+ %A = fdiv float %arg1, %arg2
+ ret float %A
+}
+
+define <4 x float> @fdiv_v4f32(<4 x float> %arg1, <4 x float> %arg2) {
+ %A = fdiv <4 x float> %arg1, %arg2
+ ret <4 x float> %A
+}
diff --git a/test/CodeGen/CellSPU/fneg-fabs.ll b/test/CodeGen/CellSPU/fneg-fabs.ll
new file mode 100644
index 0000000..1e5e3b3
--- /dev/null
+++ b/test/CodeGen/CellSPU/fneg-fabs.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep 32768 %t1.s | count 2
+; RUN: grep xor %t1.s | count 4
+; RUN: grep and %t1.s | count 2
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define double @fneg_dp(double %X) {
+ %Y = fsub double -0.000000e+00, %X
+ ret double %Y
+}
+
+define <2 x double> @fneg_dp_vec(<2 x double> %X) {
+ %Y = fsub <2 x double> < double -0.0000e+00, double -0.0000e+00 >, %X
+ ret <2 x double> %Y
+}
+
+define float @fneg_sp(float %X) {
+ %Y = fsub float -0.000000e+00, %X
+ ret float %Y
+}
+
+define <4 x float> @fneg_sp_vec(<4 x float> %X) {
+ %Y = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00,
+ float -0.000000e+00, float -0.000000e+00>, %X
+ ret <4 x float> %Y
+}
+
+declare double @fabs(double)
+
+declare float @fabsf(float)
+
+define double @fabs_dp(double %X) {
+ %Y = call double @fabs( double %X )
+ ret double %Y
+}
+
+define float @fabs_sp(float %X) {
+ %Y = call float @fabsf( float %X )
+ ret float %Y
+}
diff --git a/test/CodeGen/CellSPU/i64ops.ll b/test/CodeGen/CellSPU/i64ops.ll
new file mode 100644
index 0000000..3553cbb
--- /dev/null
+++ b/test/CodeGen/CellSPU/i64ops.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep xswd %t1.s | count 3
+; RUN: grep xsbh %t1.s | count 1
+; RUN: grep xshw %t1.s | count 2
+; RUN: grep shufb %t1.s | count 7
+; RUN: grep cg %t1.s | count 4
+; RUN: grep addx %t1.s | count 4
+; RUN: grep fsmbi %t1.s | count 3
+; RUN: grep il %t1.s | count 2
+; RUN: grep mpy %t1.s | count 10
+; RUN: grep mpyh %t1.s | count 6
+; RUN: grep mpyhhu %t1.s | count 2
+; RUN: grep mpyu %t1.s | count 4
+
+; ModuleID = 'stores.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define i64 @sext_i64_i8(i8 %a) nounwind {
+ %1 = sext i8 %a to i64
+ ret i64 %1
+}
+
+define i64 @sext_i64_i16(i16 %a) nounwind {
+ %1 = sext i16 %a to i64
+ ret i64 %1
+}
+
+define i64 @sext_i64_i32(i32 %a) nounwind {
+ %1 = sext i32 %a to i64
+ ret i64 %1
+}
+
+define i64 @zext_i64_i8(i8 %a) nounwind {
+ %1 = zext i8 %a to i64
+ ret i64 %1
+}
+
+define i64 @zext_i64_i16(i16 %a) nounwind {
+ %1 = zext i16 %a to i64
+ ret i64 %1
+}
+
+define i64 @zext_i64_i32(i32 %a) nounwind {
+ %1 = zext i32 %a to i64
+ ret i64 %1
+}
+
+define i64 @add_i64(i64 %a, i64 %b) nounwind {
+ %1 = add i64 %a, %b
+ ret i64 %1
+}
+
+define i64 @mul_i64(i64 %a, i64 %b) nounwind {
+ %1 = mul i64 %a, %b
+ ret i64 %1
+}
diff --git a/test/CodeGen/CellSPU/i8ops.ll b/test/CodeGen/CellSPU/i8ops.ll
new file mode 100644
index 0000000..57a2aa8
--- /dev/null
+++ b/test/CodeGen/CellSPU/i8ops.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+
+; ModuleID = 'i8ops.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define i8 @add_i8(i8 %a, i8 %b) nounwind {
+ %1 = add i8 %a, %b
+ ret i8 %1
+}
+
+define i8 @add_i8_imm(i8 %a, i8 %b) nounwind {
+ %1 = add i8 %a, 15
+ ret i8 %1
+}
+
+define i8 @sub_i8(i8 %a, i8 %b) nounwind {
+ %1 = sub i8 %a, %b
+ ret i8 %1
+}
+
+define i8 @sub_i8_imm(i8 %a, i8 %b) nounwind {
+ %1 = sub i8 %a, 15
+ ret i8 %1
+}
diff --git a/test/CodeGen/CellSPU/icmp16.ll b/test/CodeGen/CellSPU/icmp16.ll
new file mode 100644
index 0000000..32b1261
--- /dev/null
+++ b/test/CodeGen/CellSPU/icmp16.ll
@@ -0,0 +1,350 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep ilh %t1.s | count 15
+; RUN: grep ceqh %t1.s | count 29
+; RUN: grep ceqhi %t1.s | count 13
+; RUN: grep clgth %t1.s | count 15
+; RUN: grep cgth %t1.s | count 14
+; RUN: grep cgthi %t1.s | count 6
+; RUN: grep {selb\t\\\$3, \\\$6, \\\$5, \\\$3} %t1.s | count 7
+; RUN: grep {selb\t\\\$3, \\\$5, \\\$6, \\\$3} %t1.s | count 3
+; RUN: grep {selb\t\\\$3, \\\$5, \\\$4, \\\$3} %t1.s | count 17
+; RUN: grep {selb\t\\\$3, \\\$4, \\\$5, \\\$3} %t1.s | count 6
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; $3 = %arg1, $4 = %arg2, $5 = %val1, $6 = %val2
+; $3 = %arg1, $4 = %val1, $5 = %val2
+;
+; For "positive" comparisons:
+; selb $3, $6, $5, <i1>
+; selb $3, $5, $4, <i1>
+;
+; For "negative" comparisons, i.e., those where the result of the comparison
+; must be inverted (setne, for example):
+; selb $3, $5, $6, <i1>
+; selb $3, $4, $5, <i1>
+
+; i16 integer comparisons:
+define i16 @icmp_eq_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp eq i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_eq_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp eq i16 %arg1, %arg2
+ ret i1 %A
+}
+
+define i16 @icmp_eq_immed01_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp eq i16 %arg1, 511
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_eq_immed02_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp eq i16 %arg1, -512
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_eq_immed03_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp eq i16 %arg1, -1
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_eq_immed04_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp eq i16 %arg1, 32768
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ne_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ne i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_ne_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ne i16 %arg1, %arg2
+ ret i1 %A
+}
+
+define i16 @icmp_ne_immed01_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ne i16 %arg1, 511
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ne_immed02_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ne i16 %arg1, -512
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ne_immed03_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ne i16 %arg1, -1
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ne_immed04_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ne i16 %arg1, 32768
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ugt_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ugt i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_ugt_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ugt i16 %arg1, %arg2
+ ret i1 %A
+}
+
+define i16 @icmp_ugt_immed01_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ugt i16 %arg1, 500
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ugt_immed02_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ugt i16 %arg1, 0
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ugt_immed03_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ugt i16 %arg1, 65024
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ugt_immed04_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ugt i16 %arg1, 32768
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_uge_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp uge i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_uge_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp uge i16 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp uge i16 %arg1, <immed> can always be transformed into
+;; icmp ugt i16 %arg1, <immed>-1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i16 @icmp_ult_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ult i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_ult_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ult i16 %arg1, %arg2
+ ret i1 %A
+}
+
+define i16 @icmp_ult_immed01_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ult i16 %arg1, 511
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ult_immed02_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ult i16 %arg1, 65534
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ult_immed03_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ult i16 %arg1, 65024
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ult_immed04_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ult i16 %arg1, 32769
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_ule_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ule i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_ule_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp ule i16 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp ule i16 %arg1, <immed> can always be transformed into
+;; icmp ult i16 %arg1, <immed>+1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i16 @icmp_sgt_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sgt i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_sgt_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sgt i16 %arg1, %arg2
+ ret i1 %A
+}
+
+define i16 @icmp_sgt_immed01_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sgt i16 %arg1, 511
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_sgt_immed02_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sgt i16 %arg1, -1
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_sgt_immed03_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sgt i16 %arg1, -512
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_sgt_immed04_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sgt i16 %arg1, 32768
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_sge_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sge i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_sge_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sge i16 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp sge i16 %arg1, <immed> can always be transformed into
+;; icmp sgt i16 %arg1, <immed>-1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i16 @icmp_slt_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp slt i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_slt_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp slt i16 %arg1, %arg2
+ ret i1 %A
+}
+
+define i16 @icmp_slt_immed01_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp slt i16 %arg1, 511
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_slt_immed02_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp slt i16 %arg1, -512
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_slt_immed03_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp slt i16 %arg1, -1
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_slt_immed04_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp slt i16 %arg1, 32768
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i16 @icmp_sle_select_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sle i16 %arg1, %arg2
+ %B = select i1 %A, i16 %val1, i16 %val2
+ ret i16 %B
+}
+
+define i1 @icmp_sle_setcc_i16(i16 %arg1, i16 %arg2, i16 %val1, i16 %val2) nounwind {
+entry:
+ %A = icmp sle i16 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp sle i16 %arg1, <immed> can always be transformed into
+;; icmp slt i16 %arg1, <immed>+1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
diff --git a/test/CodeGen/CellSPU/icmp32.ll b/test/CodeGen/CellSPU/icmp32.ll
new file mode 100644
index 0000000..ccbb5f7
--- /dev/null
+++ b/test/CodeGen/CellSPU/icmp32.ll
@@ -0,0 +1,350 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep ila %t1.s | count 6
+; RUN: grep ceq %t1.s | count 28
+; RUN: grep ceqi %t1.s | count 12
+; RUN: grep clgt %t1.s | count 16
+; RUN: grep clgti %t1.s | count 6
+; RUN: grep cgt %t1.s | count 16
+; RUN: grep cgti %t1.s | count 6
+; RUN: grep {selb\t\\\$3, \\\$6, \\\$5, \\\$3} %t1.s | count 7
+; RUN: grep {selb\t\\\$3, \\\$5, \\\$6, \\\$3} %t1.s | count 3
+; RUN: grep {selb\t\\\$3, \\\$5, \\\$4, \\\$3} %t1.s | count 20
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; $3 = %arg1, $4 = %arg2, $5 = %val1, $6 = %val2
+; $3 = %arg1, $4 = %val1, $5 = %val2
+;
+; For "positive" comparisons:
+; selb $3, $6, $5, <i1>
+; selb $3, $5, $4, <i1>
+;
+; For "negative" comparisons, i.e., those where the result of the comparison
+; must be inverted (setne, for example):
+; selb $3, $5, $6, <i1>
+; selb $3, $4, $5, <i1>
+
+; i32 integer comparisons:
+define i32 @icmp_eq_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp eq i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_eq_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp eq i32 %arg1, %arg2
+ ret i1 %A
+}
+
+define i32 @icmp_eq_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp eq i32 %arg1, 511
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_eq_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp eq i32 %arg1, -512
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_eq_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp eq i32 %arg1, -1
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_eq_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp eq i32 %arg1, 32768
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ne_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ne i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_ne_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ne i32 %arg1, %arg2
+ ret i1 %A
+}
+
+define i32 @icmp_ne_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ne i32 %arg1, 511
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ne_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ne i32 %arg1, -512
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ne_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ne i32 %arg1, -1
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ne_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ne i32 %arg1, 32768
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ugt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ugt i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_ugt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ugt i32 %arg1, %arg2
+ ret i1 %A
+}
+
+define i32 @icmp_ugt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ugt i32 %arg1, 511
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ugt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ugt i32 %arg1, 4294966784
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ugt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ugt i32 %arg1, 4294967293
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ugt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ugt i32 %arg1, 32768
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_uge_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp uge i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_uge_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp uge i32 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp uge i32 %arg1, <immed> can always be transformed into
+;; icmp ugt i32 %arg1, <immed>-1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i32 @icmp_ult_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ult i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_ult_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ult i32 %arg1, %arg2
+ ret i1 %A
+}
+
+define i32 @icmp_ult_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ult i32 %arg1, 511
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ult_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ult i32 %arg1, 4294966784
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ult_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ult i32 %arg1, 4294967293
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ult_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ult i32 %arg1, 32768
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_ule_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ule i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_ule_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp ule i32 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp ule i32 %arg1, <immed> can always be transformed into
+;; icmp ult i32 %arg1, <immed>+1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i32 @icmp_sgt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sgt i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_sgt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sgt i32 %arg1, %arg2
+ ret i1 %A
+}
+
+define i32 @icmp_sgt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sgt i32 %arg1, 511
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_sgt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sgt i32 %arg1, 4294966784
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_sgt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sgt i32 %arg1, 4294967293
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_sgt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sgt i32 %arg1, 32768
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_sge_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sge i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_sge_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sge i32 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp sge i32 %arg1, <immed> can always be transformed into
+;; icmp sgt i32 %arg1, <immed>-1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i32 @icmp_slt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp slt i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_slt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp slt i32 %arg1, %arg2
+ ret i1 %A
+}
+
+define i32 @icmp_slt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp slt i32 %arg1, 511
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_slt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp slt i32 %arg1, -512
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_slt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp slt i32 %arg1, -1
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_slt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp slt i32 %arg1, 32768
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i32 @icmp_sle_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sle i32 %arg1, %arg2
+ %B = select i1 %A, i32 %val1, i32 %val2
+ ret i32 %B
+}
+
+define i1 @icmp_sle_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind {
+entry:
+ %A = icmp sle i32 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp sle i32 %arg1, <immed> can always be transformed into
+;; icmp slt i32 %arg1, <immed>+1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
diff --git a/test/CodeGen/CellSPU/icmp64.ll b/test/CodeGen/CellSPU/icmp64.ll
new file mode 100644
index 0000000..9dd2cdc
--- /dev/null
+++ b/test/CodeGen/CellSPU/icmp64.ll
@@ -0,0 +1,146 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep ceq %t1.s | count 20
+; RUN: grep cgti %t1.s | count 12
+; RUN: grep cgt %t1.s | count 16
+; RUN: grep clgt %t1.s | count 12
+; RUN: grep gb %t1.s | count 12
+; RUN: grep fsm %t1.s | count 10
+; RUN: grep xori %t1.s | count 5
+; RUN: grep selb %t1.s | count 18
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; $3 = %arg1, $4 = %arg2, $5 = %val1, $6 = %val2
+; $3 = %arg1, $4 = %val1, $5 = %val2
+;
+; i64 integer comparisons:
+define i64 @icmp_eq_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp eq i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_eq_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp eq i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_ne_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp ne i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_ne_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp ne i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_ugt_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp ugt i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_ugt_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp ugt i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_uge_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp uge i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_uge_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp uge i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_ult_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp ult i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_ult_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp ult i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_ule_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp ule i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_ule_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp ule i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_sgt_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp sgt i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_sgt_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp sgt i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_sge_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp sge i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_sge_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp sge i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_slt_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp slt i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_slt_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp slt i64 %arg1, %arg2
+ ret i1 %A
+}
+
+define i64 @icmp_sle_select_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp sle i64 %arg1, %arg2
+ %B = select i1 %A, i64 %val1, i64 %val2
+ ret i64 %B
+}
+
+define i1 @icmp_sle_setcc_i64(i64 %arg1, i64 %arg2, i64 %val1, i64 %val2) nounwind {
+entry:
+ %A = icmp sle i64 %arg1, %arg2
+ ret i1 %A
+}
diff --git a/test/CodeGen/CellSPU/icmp8.ll b/test/CodeGen/CellSPU/icmp8.ll
new file mode 100644
index 0000000..5517d10
--- /dev/null
+++ b/test/CodeGen/CellSPU/icmp8.ll
@@ -0,0 +1,286 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep ceqb %t1.s | count 24
+; RUN: grep ceqbi %t1.s | count 12
+; RUN: grep clgtb %t1.s | count 11
+; RUN: grep cgtb %t1.s | count 13
+; RUN: grep cgtbi %t1.s | count 5
+; RUN: grep {selb\t\\\$3, \\\$6, \\\$5, \\\$3} %t1.s | count 7
+; RUN: grep {selb\t\\\$3, \\\$5, \\\$6, \\\$3} %t1.s | count 3
+; RUN: grep {selb\t\\\$3, \\\$5, \\\$4, \\\$3} %t1.s | count 11
+; RUN: grep {selb\t\\\$3, \\\$4, \\\$5, \\\$3} %t1.s | count 4
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; $3 = %arg1, $4 = %arg2, $5 = %val1, $6 = %val2
+; $3 = %arg1, $4 = %val1, $5 = %val2
+;
+; For "positive" comparisons:
+; selb $3, $6, $5, <i1>
+; selb $3, $5, $4, <i1>
+;
+; For "negative" comparisons, i.e., those where the result of the comparison
+; must be inverted (setne, for example):
+; selb $3, $5, $6, <i1>
+; selb $3, $4, $5, <i1>
+
+; i8 integer comparisons:
+define i8 @icmp_eq_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp eq i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_eq_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp eq i8 %arg1, %arg2
+ ret i1 %A
+}
+
+define i8 @icmp_eq_immed01_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp eq i8 %arg1, 127
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_eq_immed02_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp eq i8 %arg1, -128
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_eq_immed03_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp eq i8 %arg1, -1
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_ne_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ne i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_ne_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ne i8 %arg1, %arg2
+ ret i1 %A
+}
+
+define i8 @icmp_ne_immed01_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ne i8 %arg1, 127
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_ne_immed02_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ne i8 %arg1, -128
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_ne_immed03_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ne i8 %arg1, -1
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_ugt_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ugt i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_ugt_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ugt i8 %arg1, %arg2
+ ret i1 %A
+}
+
+define i8 @icmp_ugt_immed01_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ugt i8 %arg1, 126
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_uge_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp uge i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_uge_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp uge i8 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp uge i8 %arg1, <immed> can always be transformed into
+;; icmp ugt i8 %arg1, <immed>-1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i8 @icmp_ult_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ult i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_ult_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ult i8 %arg1, %arg2
+ ret i1 %A
+}
+
+define i8 @icmp_ult_immed01_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ult i8 %arg1, 253
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_ult_immed02_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ult i8 %arg1, 129
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_ule_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ule i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_ule_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp ule i8 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp ule i8 %arg1, <immed> can always be transformed into
+;; icmp ult i8 %arg1, <immed>+1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i8 @icmp_sgt_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sgt i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_sgt_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sgt i8 %arg1, %arg2
+ ret i1 %A
+}
+
+define i8 @icmp_sgt_immed01_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sgt i8 %arg1, 96
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_sgt_immed02_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sgt i8 %arg1, -1
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_sgt_immed03_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sgt i8 %arg1, -128
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_sge_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sge i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_sge_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sge i8 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp sge i8 %arg1, <immed> can always be transformed into
+;; icmp sgt i8 %arg1, <immed>-1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
+define i8 @icmp_slt_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp slt i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_slt_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp slt i8 %arg1, %arg2
+ ret i1 %A
+}
+
+define i8 @icmp_slt_immed01_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp slt i8 %arg1, 96
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_slt_immed02_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp slt i8 %arg1, -120
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_slt_immed03_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp slt i8 %arg1, -1
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i8 @icmp_sle_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sle i8 %arg1, %arg2
+ %B = select i1 %A, i8 %val1, i8 %val2
+ ret i8 %B
+}
+
+define i1 @icmp_sle_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
+entry:
+ %A = icmp sle i8 %arg1, %arg2
+ ret i1 %A
+}
+
+;; Note: icmp sle i8 %arg1, <immed> can always be transformed into
+;; icmp slt i8 %arg1, <immed>+1
+;;
+;; Consequently, even though the patterns exist to match, it's unlikely
+;; they'll ever be generated.
+
diff --git a/test/CodeGen/CellSPU/immed16.ll b/test/CodeGen/CellSPU/immed16.ll
new file mode 100644
index 0000000..077d071
--- /dev/null
+++ b/test/CodeGen/CellSPU/immed16.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep "ilh" %t1.s | count 11
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define i16 @test_1() {
+ %x = alloca i16, align 16
+ store i16 419, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_2() {
+ %x = alloca i16, align 16
+ store i16 1023, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_3() {
+ %x = alloca i16, align 16
+ store i16 -1023, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_4() {
+ %x = alloca i16, align 16
+ store i16 32767, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_5() {
+ %x = alloca i16, align 16
+ store i16 -32768, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_6() {
+ ret i16 0
+}
+
+
diff --git a/test/CodeGen/CellSPU/immed32.ll b/test/CodeGen/CellSPU/immed32.ll
new file mode 100644
index 0000000..119f526
--- /dev/null
+++ b/test/CodeGen/CellSPU/immed32.ll
@@ -0,0 +1,72 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep ilhu %t1.s | count 8
+; RUN: grep iohl %t1.s | count 6
+; RUN: grep -w il %t1.s | count 3
+; RUN: grep 16429 %t1.s | count 1
+; RUN: grep 63572 %t1.s | count 1
+; RUN: grep 128 %t1.s | count 1
+; RUN: grep 32639 %t1.s | count 1
+; RUN: grep 65535 %t1.s | count 1
+; RUN: grep 16457 %t1.s | count 1
+; RUN: grep 4059 %t1.s | count 1
+; RUN: grep 49077 %t1.s | count 1
+; RUN: grep 1267 %t1.s | count 2
+; RUN: grep 16309 %t1.s | count 1
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define i32 @test_1() {
+ ret i32 4784128 ;; ILHU via pattern (0x49000)
+}
+
+define i32 @test_2() {
+ ret i32 5308431 ;; ILHU/IOHL via pattern (0x5100f)
+}
+
+define i32 @test_3() {
+ ret i32 511 ;; IL via pattern
+}
+
+define i32 @test_4() {
+ ret i32 -512 ;; IL via pattern
+}
+
+;; double float floatval
+;; 0x4005bf0a80000000 0x402d|f854 2.718282
+define float @float_const_1() {
+ ret float 0x4005BF0A80000000 ;; ILHU/IOHL
+}
+
+;; double float floatval
+;; 0x3810000000000000 0x0080|0000 0.000000
+define float @float_const_2() {
+ ret float 0x3810000000000000 ;; IL 128
+}
+
+;; double float floatval
+;; 0x47efffffe0000000 0x7f7f|ffff NaN
+define float @float_const_3() {
+ ret float 0x47EFFFFFE0000000 ;; ILHU/IOHL via pattern
+}
+
+;; double float floatval
+;; 0x400921fb60000000 0x4049|0fdb 3.141593
+define float @float_const_4() {
+ ret float 0x400921FB60000000 ;; ILHU/IOHL via pattern
+}
+
+;; double float floatval
+;; 0xbff6a09e60000000 0xbfb5|04f3 -1.414214
+define float @float_const_5() {
+ ret float 0xBFF6A09E60000000 ;; ILHU/IOHL via pattern
+}
+
+;; double float floatval
+;; 0x3ff6a09e60000000 0x3fb5|04f3 1.414214
+define float @float_const_6() {
+ ret float 0x3FF6A09E60000000 ;; ILHU/IOHL via pattern
+}
+
+define float @float_const_7() {
+ ret float 0.000000e+00 ;; IL 0 via pattern
+}
diff --git a/test/CodeGen/CellSPU/immed64.ll b/test/CodeGen/CellSPU/immed64.ll
new file mode 100644
index 0000000..fd48365
--- /dev/null
+++ b/test/CodeGen/CellSPU/immed64.ll
@@ -0,0 +1,95 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep lqa %t1.s | count 13
+; RUN: grep ilhu %t1.s | count 15
+; RUN: grep ila %t1.s | count 1
+; RUN: grep -w il %t1.s | count 6
+; RUN: grep shufb %t1.s | count 13
+; RUN: grep 65520 %t1.s | count 1
+; RUN: grep 43981 %t1.s | count 1
+; RUN: grep 13702 %t1.s | count 1
+; RUN: grep 28225 %t1.s | count 1
+; RUN: grep 30720 %t1.s | count 1
+; RUN: grep 3233857728 %t1.s | count 8
+; RUN: grep 2155905152 %t1.s | count 6
+; RUN: grep 66051 %t1.s | count 7
+; RUN: grep 471670303 %t1.s | count 11
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; 1311768467750121234 => 0x 12345678 abcdef12 (4660,22136/43981,61202)
+; 18446744073709551591 => 0x ffffffff ffffffe7 (-25)
+; 18446744073708516742 => 0x ffffffff fff03586 (-1034874)
+; 5308431 => 0x 00000000 0051000F
+; 9223372038704560128 => 0x 80000000 6e417800
+
+define i64 @i64_const_1() {
+ ret i64 1311768467750121234 ;; Constant pool spill
+}
+
+define i64 @i64_const_2() {
+ ret i64 18446744073709551591 ;; IL/SHUFB
+}
+
+define i64 @i64_const_3() {
+ ret i64 18446744073708516742 ;; IHLU/IOHL/SHUFB
+}
+
+define i64 @i64_const_4() {
+ ret i64 5308431 ;; ILHU/IOHL/SHUFB
+}
+
+define i64 @i64_const_5() {
+ ret i64 511 ;; IL/SHUFB
+}
+
+define i64 @i64_const_6() {
+ ret i64 -512 ;; IL/SHUFB
+}
+
+define i64 @i64_const_7() {
+ ret i64 9223372038704560128 ;; IHLU/IOHL/SHUFB
+}
+
+define i64 @i64_const_8() {
+ ret i64 0 ;; IL
+}
+
+define i64 @i64_const_9() {
+ ret i64 -1 ;; IL
+}
+
+define i64 @i64_const_10() {
+ ret i64 281470681808895 ;; IL 65535
+}
+
+; 0x4005bf0a8b145769 ->
+; (ILHU 0x4005 [16389]/IOHL 0xbf0a [48906])
+; (ILHU 0x8b14 [35604]/IOHL 0x5769 [22377])
+define double @f64_const_1() {
+ ret double 0x4005bf0a8b145769 ;; ILHU/IOHL via pattern
+}
+
+define double @f64_const_2() {
+ ret double 0x0010000000000000
+}
+
+define double @f64_const_3() {
+ ret double 0x7fefffffffffffff
+}
+
+define double @f64_const_4() {
+ ret double 0x400921fb54442d18
+}
+
+define double @f64_const_5() {
+ ret double 0xbff6a09e667f3bcd ;; ILHU/IOHL via pattern
+}
+
+define double @f64_const_6() {
+ ret double 0x3ff6a09e667f3bcd
+}
+
+define double @f64_const_7() {
+ ret double 0.000000e+00
+}
diff --git a/test/CodeGen/CellSPU/int2fp.ll b/test/CodeGen/CellSPU/int2fp.ll
new file mode 100644
index 0000000..984c017
--- /dev/null
+++ b/test/CodeGen/CellSPU/int2fp.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep csflt %t1.s | count 5
+; RUN: grep cuflt %t1.s | count 1
+; RUN: grep xshw %t1.s | count 2
+; RUN: grep xsbh %t1.s | count 1
+; RUN: grep and %t1.s | count 2
+; RUN: grep andi %t1.s | count 1
+; RUN: grep ila %t1.s | count 1
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define float @sitofp_i32(i32 %arg1) {
+ %A = sitofp i32 %arg1 to float ; <float> [#uses=1]
+ ret float %A
+}
+
+define float @uitofp_u32(i32 %arg1) {
+ %A = uitofp i32 %arg1 to float ; <float> [#uses=1]
+ ret float %A
+}
+
+define float @sitofp_i16(i16 %arg1) {
+ %A = sitofp i16 %arg1 to float ; <float> [#uses=1]
+ ret float %A
+}
+
+define float @uitofp_i16(i16 %arg1) {
+ %A = uitofp i16 %arg1 to float ; <float> [#uses=1]
+ ret float %A
+}
+
+define float @sitofp_i8(i8 %arg1) {
+ %A = sitofp i8 %arg1 to float ; <float> [#uses=1]
+ ret float %A
+}
+
+define float @uitofp_i8(i8 %arg1) {
+ %A = uitofp i8 %arg1 to float ; <float> [#uses=1]
+ ret float %A
+}
diff --git a/test/CodeGen/CellSPU/intrinsics_branch.ll b/test/CodeGen/CellSPU/intrinsics_branch.ll
new file mode 100644
index 0000000..b0f6a62
--- /dev/null
+++ b/test/CodeGen/CellSPU/intrinsics_branch.ll
@@ -0,0 +1,150 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep ceq %t1.s | count 30
+; RUN: grep ceqb %t1.s | count 10
+; RUN: grep ceqhi %t1.s | count 5
+; RUN: grep ceqi %t1.s | count 5
+; RUN: grep cgt %t1.s | count 30
+; RUN: grep cgtb %t1.s | count 10
+; RUN: grep cgthi %t1.s | count 5
+; RUN: grep cgti %t1.s | count 5
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+declare <4 x i32> @llvm.spu.si.shli(<4 x i32>, i8)
+
+declare <4 x i32> @llvm.spu.si.ceq(<4 x i32>, <4 x i32>)
+declare <16 x i8> @llvm.spu.si.ceqb(<16 x i8>, <16 x i8>)
+declare <8 x i16> @llvm.spu.si.ceqh(<8 x i16>, <8 x i16>)
+declare <4 x i32> @llvm.spu.si.ceqi(<4 x i32>, i16)
+declare <8 x i16> @llvm.spu.si.ceqhi(<8 x i16>, i16)
+declare <16 x i8> @llvm.spu.si.ceqbi(<16 x i8>, i8)
+
+declare <4 x i32> @llvm.spu.si.cgt(<4 x i32>, <4 x i32>)
+declare <16 x i8> @llvm.spu.si.cgtb(<16 x i8>, <16 x i8>)
+declare <8 x i16> @llvm.spu.si.cgth(<8 x i16>, <8 x i16>)
+declare <4 x i32> @llvm.spu.si.cgti(<4 x i32>, i16)
+declare <8 x i16> @llvm.spu.si.cgthi(<8 x i16>, i16)
+declare <16 x i8> @llvm.spu.si.cgtbi(<16 x i8>, i8)
+
+declare <4 x i32> @llvm.spu.si.clgt(<4 x i32>, <4 x i32>)
+declare <16 x i8> @llvm.spu.si.clgtb(<16 x i8>, <16 x i8>)
+declare <8 x i16> @llvm.spu.si.clgth(<8 x i16>, <8 x i16>)
+declare <4 x i32> @llvm.spu.si.clgti(<4 x i32>, i16)
+declare <8 x i16> @llvm.spu.si.clgthi(<8 x i16>, i16)
+declare <16 x i8> @llvm.spu.si.clgtbi(<16 x i8>, i8)
+
+
+
+define <4 x i32> @test(<4 x i32> %A) {
+ call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <4 x i32> @ceqtest(<4 x i32> %A, <4 x i32> %B) {
+ call <4 x i32> @llvm.spu.si.ceq(<4 x i32> %A, <4 x i32> %B)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <8 x i16> @ceqhtest(<8 x i16> %A, <8 x i16> %B) {
+ call <8 x i16> @llvm.spu.si.ceqh(<8 x i16> %A, <8 x i16> %B)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
+}
+
+define <16 x i8> @ceqbtest(<16 x i8> %A, <16 x i8> %B) {
+ call <16 x i8> @llvm.spu.si.ceqb(<16 x i8> %A, <16 x i8> %B)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
+}
+
+define <4 x i32> @ceqitest(<4 x i32> %A) {
+ call <4 x i32> @llvm.spu.si.ceqi(<4 x i32> %A, i16 65)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <8 x i16> @ceqhitest(<8 x i16> %A) {
+ call <8 x i16> @llvm.spu.si.ceqhi(<8 x i16> %A, i16 65)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
+}
+
+define <16 x i8> @ceqbitest(<16 x i8> %A) {
+ call <16 x i8> @llvm.spu.si.ceqbi(<16 x i8> %A, i8 65)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
+}
+
+define <4 x i32> @cgttest(<4 x i32> %A, <4 x i32> %B) {
+ call <4 x i32> @llvm.spu.si.cgt(<4 x i32> %A, <4 x i32> %B)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <8 x i16> @cgthtest(<8 x i16> %A, <8 x i16> %B) {
+ call <8 x i16> @llvm.spu.si.cgth(<8 x i16> %A, <8 x i16> %B)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
+}
+
+define <16 x i8> @cgtbtest(<16 x i8> %A, <16 x i8> %B) {
+ call <16 x i8> @llvm.spu.si.cgtb(<16 x i8> %A, <16 x i8> %B)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
+}
+
+define <4 x i32> @cgtitest(<4 x i32> %A) {
+ call <4 x i32> @llvm.spu.si.cgti(<4 x i32> %A, i16 65)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <8 x i16> @cgthitest(<8 x i16> %A) {
+ call <8 x i16> @llvm.spu.si.cgthi(<8 x i16> %A, i16 65)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
+}
+
+define <16 x i8> @cgtbitest(<16 x i8> %A) {
+ call <16 x i8> @llvm.spu.si.cgtbi(<16 x i8> %A, i8 65)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
+}
+
+define <4 x i32> @clgttest(<4 x i32> %A, <4 x i32> %B) {
+ call <4 x i32> @llvm.spu.si.clgt(<4 x i32> %A, <4 x i32> %B)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <8 x i16> @clgthtest(<8 x i16> %A, <8 x i16> %B) {
+ call <8 x i16> @llvm.spu.si.clgth(<8 x i16> %A, <8 x i16> %B)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
+}
+
+define <16 x i8> @clgtbtest(<16 x i8> %A, <16 x i8> %B) {
+ call <16 x i8> @llvm.spu.si.clgtb(<16 x i8> %A, <16 x i8> %B)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
+}
+
+define <4 x i32> @clgtitest(<4 x i32> %A) {
+ call <4 x i32> @llvm.spu.si.clgti(<4 x i32> %A, i16 65)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <8 x i16> @clgthitest(<8 x i16> %A) {
+ call <8 x i16> @llvm.spu.si.clgthi(<8 x i16> %A, i16 65)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
+}
+
+define <16 x i8> @clgtbitest(<16 x i8> %A) {
+ call <16 x i8> @llvm.spu.si.clgtbi(<16 x i8> %A, i8 65)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
+}
diff --git a/test/CodeGen/CellSPU/intrinsics_float.ll b/test/CodeGen/CellSPU/intrinsics_float.ll
new file mode 100644
index 0000000..8137347
--- /dev/null
+++ b/test/CodeGen/CellSPU/intrinsics_float.ll
@@ -0,0 +1,94 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep fa %t1.s | count 5
+; RUN: grep fs %t1.s | count 5
+; RUN: grep fm %t1.s | count 15
+; RUN: grep fceq %t1.s | count 5
+; RUN: grep fcmeq %t1.s | count 5
+; RUN: grep fcgt %t1.s | count 5
+; RUN: grep fcmgt %t1.s | count 5
+; RUN: grep fma %t1.s | count 5
+; RUN: grep fnms %t1.s | count 5
+; RUN: grep fms %t1.s | count 5
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+declare <4 x i32> @llvm.spu.si.shli(<4 x i32>, i8)
+
+declare <4 x float> @llvm.spu.si.fa(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.spu.si.fs(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.spu.si.fm(<4 x float>, <4 x float>)
+
+declare <4 x float> @llvm.spu.si.fceq(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.spu.si.fcmeq(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.spu.si.fcgt(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.spu.si.fcmgt(<4 x float>, <4 x float>)
+
+declare <4 x float> @llvm.spu.si.fma(<4 x float>, <4 x float>, <4 x float>)
+declare <4 x float> @llvm.spu.si.fnms(<4 x float>, <4 x float>, <4 x float>)
+declare <4 x float> @llvm.spu.si.fms(<4 x float>, <4 x float>, <4 x float>)
+
+define <4 x i32> @test(<4 x i32> %A) {
+ call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <4 x float> @fatest(<4 x float> %A, <4 x float> %B) {
+ call <4 x float> @llvm.spu.si.fa(<4 x float> %A, <4 x float> %B)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fstest(<4 x float> %A, <4 x float> %B) {
+ call <4 x float> @llvm.spu.si.fs(<4 x float> %A, <4 x float> %B)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fmtest(<4 x float> %A, <4 x float> %B) {
+ call <4 x float> @llvm.spu.si.fm(<4 x float> %A, <4 x float> %B)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fceqtest(<4 x float> %A, <4 x float> %B) {
+ call <4 x float> @llvm.spu.si.fceq(<4 x float> %A, <4 x float> %B)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fcmeqtest(<4 x float> %A, <4 x float> %B) {
+ call <4 x float> @llvm.spu.si.fcmeq(<4 x float> %A, <4 x float> %B)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fcgttest(<4 x float> %A, <4 x float> %B) {
+ call <4 x float> @llvm.spu.si.fcgt(<4 x float> %A, <4 x float> %B)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fcmgttest(<4 x float> %A, <4 x float> %B) {
+ call <4 x float> @llvm.spu.si.fcmgt(<4 x float> %A, <4 x float> %B)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fmatest(<4 x float> %A, <4 x float> %B, <4 x float> %C) {
+ call <4 x float> @llvm.spu.si.fma(<4 x float> %A, <4 x float> %B, <4 x float> %C)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fnmstest(<4 x float> %A, <4 x float> %B, <4 x float> %C) {
+ call <4 x float> @llvm.spu.si.fnms(<4 x float> %A, <4 x float> %B, <4 x float> %C)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
+
+define <4 x float> @fmstest(<4 x float> %A, <4 x float> %B, <4 x float> %C) {
+ call <4 x float> @llvm.spu.si.fms(<4 x float> %A, <4 x float> %B, <4 x float> %C)
+ %Y = bitcast <4 x float> %1 to <4 x float>
+ ret <4 x float> %Y
+}
diff --git a/test/CodeGen/CellSPU/intrinsics_logical.ll b/test/CodeGen/CellSPU/intrinsics_logical.ll
new file mode 100644
index 0000000..a29ee4c
--- /dev/null
+++ b/test/CodeGen/CellSPU/intrinsics_logical.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep and %t1.s | count 20
+; RUN: grep andc %t1.s | count 5
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+declare <4 x i32> @llvm.spu.si.and(<4 x i32>, <4 x i32>)
+declare <4 x i32> @llvm.spu.si.andc(<4 x i32>, <4 x i32>)
+declare <4 x i32> @llvm.spu.si.andi(<4 x i32>, i16)
+declare <8 x i16> @llvm.spu.si.andhi(<8 x i16>, i16)
+declare <16 x i8> @llvm.spu.si.andbi(<16 x i8>, i8)
+
+declare <4 x i32> @llvm.spu.si.or(<4 x i32>, <4 x i32>)
+declare <4 x i32> @llvm.spu.si.orc(<4 x i32>, <4 x i32>)
+declare <4 x i32> @llvm.spu.si.ori(<4 x i32>, i16)
+declare <8 x i16> @llvm.spu.si.orhi(<8 x i16>, i16)
+declare <16 x i8> @llvm.spu.si.orbi(<16 x i8>, i8)
+
+declare <4 x i32> @llvm.spu.si.xor(<4 x i32>, <4 x i32>)
+declare <4 x i32> @llvm.spu.si.xori(<4 x i32>, i16)
+declare <8 x i16> @llvm.spu.si.xorhi(<8 x i16>, i16)
+declare <16 x i8> @llvm.spu.si.xorbi(<16 x i8>, i8)
+
+declare <4 x i32> @llvm.spu.si.nand(<4 x i32>, <4 x i32>)
+declare <4 x i32> @llvm.spu.si.nor(<4 x i32>, <4 x i32>)
+
+define <4 x i32> @andtest(<4 x i32> %A, <4 x i32> %B) {
+ call <4 x i32> @llvm.spu.si.and(<4 x i32> %A, <4 x i32> %B)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <4 x i32> @andctest(<4 x i32> %A, <4 x i32> %B) {
+ call <4 x i32> @llvm.spu.si.andc(<4 x i32> %A, <4 x i32> %B)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <4 x i32> @anditest(<4 x i32> %A) {
+ call <4 x i32> @llvm.spu.si.andi(<4 x i32> %A, i16 65)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
+}
+
+define <8 x i16> @andhitest(<8 x i16> %A) {
+ call <8 x i16> @llvm.spu.si.andhi(<8 x i16> %A, i16 65)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
+}
diff --git a/test/CodeGen/CellSPU/loads.ll b/test/CodeGen/CellSPU/loads.ll
new file mode 100644
index 0000000..8e5422c
--- /dev/null
+++ b/test/CodeGen/CellSPU/loads.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=cellspu | FileCheck %s
+
+; ModuleID = 'loads.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define <4 x float> @load_v4f32_1(<4 x float>* %a) nounwind readonly {
+entry:
+ %tmp1 = load <4 x float>* %a
+ ret <4 x float> %tmp1
+; CHECK: lqd $3, 0($3)
+}
+
+define <4 x float> @load_v4f32_2(<4 x float>* %a) nounwind readonly {
+entry:
+ %arrayidx = getelementptr <4 x float>* %a, i32 1
+ %tmp1 = load <4 x float>* %arrayidx
+ ret <4 x float> %tmp1
+; CHECK: lqd $3, 16($3)
+}
diff --git a/test/CodeGen/CellSPU/mul-with-overflow.ll b/test/CodeGen/CellSPU/mul-with-overflow.ll
new file mode 100644
index 0000000..d15da12
--- /dev/null
+++ b/test/CodeGen/CellSPU/mul-with-overflow.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=cellspu
+
+declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
+define i1 @a(i16 %x) zeroext nounwind {
+ %res = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %x, i16 3)
+ %obil = extractvalue {i16, i1} %res, 1
+ ret i1 %obil
+}
+
+declare {i16, i1} @llvm.umul.with.overflow.i16(i16 %a, i16 %b)
+define i1 @b(i16 %x) zeroext nounwind {
+ %res = call {i16, i1} @llvm.umul.with.overflow.i16(i16 %x, i16 3)
+ %obil = extractvalue {i16, i1} %res, 1
+ ret i1 %obil
+}
diff --git a/test/CodeGen/CellSPU/mul_ops.ll b/test/CodeGen/CellSPU/mul_ops.ll
new file mode 100644
index 0000000..1e28fc7
--- /dev/null
+++ b/test/CodeGen/CellSPU/mul_ops.ll
@@ -0,0 +1,88 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep mpy %t1.s | count 44
+; RUN: grep mpyu %t1.s | count 4
+; RUN: grep mpyh %t1.s | count 10
+; RUN: grep mpyhh %t1.s | count 2
+; RUN: grep rotma %t1.s | count 12
+; RUN: grep rotmahi %t1.s | count 4
+; RUN: grep and %t1.s | count 2
+; RUN: grep selb %t1.s | count 6
+; RUN: grep fsmbi %t1.s | count 4
+; RUN: grep shli %t1.s | count 4
+; RUN: grep shlhi %t1.s | count 4
+; RUN: grep ila %t1.s | count 2
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; 32-bit multiply instruction generation:
+define <4 x i32> @mpy_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) {
+entry:
+ %A = mul <4 x i32> %arg1, %arg2
+ ret <4 x i32> %A
+}
+
+define <4 x i32> @mpy_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) {
+entry:
+ %A = mul <4 x i32> %arg2, %arg1
+ ret <4 x i32> %A
+}
+
+define <8 x i16> @mpy_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
+entry:
+ %A = mul <8 x i16> %arg1, %arg2
+ ret <8 x i16> %A
+}
+
+define <8 x i16> @mpy_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) {
+entry:
+ %A = mul <8 x i16> %arg2, %arg1
+ ret <8 x i16> %A
+}
+
+define <16 x i8> @mul_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) {
+entry:
+ %A = mul <16 x i8> %arg2, %arg1
+ ret <16 x i8> %A
+}
+
+define <16 x i8> @mul_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) {
+entry:
+ %A = mul <16 x i8> %arg1, %arg2
+ ret <16 x i8> %A
+}
+
+define i32 @mul_i32_1(i32 %arg1, i32 %arg2) {
+entry:
+ %A = mul i32 %arg2, %arg1
+ ret i32 %A
+}
+
+define i32 @mul_i32_2(i32 %arg1, i32 %arg2) {
+entry:
+ %A = mul i32 %arg1, %arg2
+ ret i32 %A
+}
+
+define i16 @mul_i16_1(i16 %arg1, i16 %arg2) {
+entry:
+ %A = mul i16 %arg2, %arg1
+ ret i16 %A
+}
+
+define i16 @mul_i16_2(i16 %arg1, i16 %arg2) {
+entry:
+ %A = mul i16 %arg1, %arg2
+ ret i16 %A
+}
+
+define i8 @mul_i8_1(i8 %arg1, i8 %arg2) {
+entry:
+ %A = mul i8 %arg2, %arg1
+ ret i8 %A
+}
+
+define i8 @mul_i8_2(i8 %arg1, i8 %arg2) {
+entry:
+ %A = mul i8 %arg1, %arg2
+ ret i8 %A
+}
diff --git a/test/CodeGen/CellSPU/nand.ll b/test/CodeGen/CellSPU/nand.ll
new file mode 100644
index 0000000..e141923
--- /dev/null
+++ b/test/CodeGen/CellSPU/nand.ll
@@ -0,0 +1,121 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep nand %t1.s | count 90
+; RUN: grep and %t1.s | count 94
+; RUN: grep xsbh %t1.s | count 2
+; RUN: grep xshw %t1.s | count 4
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define <4 x i32> @nand_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = and <4 x i32> %arg2, %arg1 ; <<4 x i32>> [#uses=1]
+ %B = xor <4 x i32> %A, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ ret <4 x i32> %B
+}
+
+define <4 x i32> @nand_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1]
+ %B = xor <4 x i32> %A, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ ret <4 x i32> %B
+}
+
+define <8 x i16> @nand_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = and <8 x i16> %arg2, %arg1 ; <<8 x i16>> [#uses=1]
+ %B = xor <8 x i16> %A, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ ret <8 x i16> %B
+}
+
+define <8 x i16> @nand_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = and <8 x i16> %arg1, %arg2 ; <<8 x i16>> [#uses=1]
+ %B = xor <8 x i16> %A, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ ret <8 x i16> %B
+}
+
+define <16 x i8> @nand_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = and <16 x i8> %arg2, %arg1 ; <<16 x i8>> [#uses=1]
+ %B = xor <16 x i8> %A, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ ret <16 x i8> %B
+}
+
+define <16 x i8> @nand_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = and <16 x i8> %arg1, %arg2 ; <<16 x i8>> [#uses=1]
+ %B = xor <16 x i8> %A, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ ret <16 x i8> %B
+}
+
+define i32 @nand_i32_1(i32 %arg1, i32 %arg2) {
+ %A = and i32 %arg2, %arg1 ; <i32> [#uses=1]
+ %B = xor i32 %A, -1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @nand_i32_2(i32 %arg1, i32 %arg2) {
+ %A = and i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %B = xor i32 %A, -1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i16 @nand_i16_1(i16 signext %arg1, i16 signext %arg2) signext {
+ %A = and i16 %arg2, %arg1 ; <i16> [#uses=1]
+ %B = xor i16 %A, -1 ; <i16> [#uses=1]
+ ret i16 %B
+}
+
+define i16 @nand_i16_2(i16 signext %arg1, i16 signext %arg2) signext {
+ %A = and i16 %arg1, %arg2 ; <i16> [#uses=1]
+ %B = xor i16 %A, -1 ; <i16> [#uses=1]
+ ret i16 %B
+}
+
+define i16 @nand_i16u_1(i16 zeroext %arg1, i16 zeroext %arg2) zeroext {
+ %A = and i16 %arg2, %arg1 ; <i16> [#uses=1]
+ %B = xor i16 %A, -1 ; <i16> [#uses=1]
+ ret i16 %B
+}
+
+define i16 @nand_i16u_2(i16 zeroext %arg1, i16 zeroext %arg2) zeroext {
+ %A = and i16 %arg1, %arg2 ; <i16> [#uses=1]
+ %B = xor i16 %A, -1 ; <i16> [#uses=1]
+ ret i16 %B
+}
+
+define i8 @nand_i8u_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext {
+ %A = and i8 %arg2, %arg1 ; <i8> [#uses=1]
+ %B = xor i8 %A, -1 ; <i8> [#uses=1]
+ ret i8 %B
+}
+
+define i8 @nand_i8u_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext {
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %B = xor i8 %A, -1 ; <i8> [#uses=1]
+ ret i8 %B
+}
+
+define i8 @nand_i8_1(i8 signext %arg1, i8 signext %arg2) signext {
+ %A = and i8 %arg2, %arg1 ; <i8> [#uses=1]
+ %B = xor i8 %A, -1 ; <i8> [#uses=1]
+ ret i8 %B
+}
+
+define i8 @nand_i8_2(i8 signext %arg1, i8 signext %arg2) signext {
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %B = xor i8 %A, -1 ; <i8> [#uses=1]
+ ret i8 %B
+}
+
+define i8 @nand_i8_3(i8 %arg1, i8 %arg2) {
+ %A = and i8 %arg2, %arg1 ; <i8> [#uses=1]
+ %B = xor i8 %A, -1 ; <i8> [#uses=1]
+ ret i8 %B
+}
+
+define i8 @nand_i8_4(i8 %arg1, i8 %arg2) {
+ %A = and i8 %arg1, %arg2 ; <i8> [#uses=1]
+ %B = xor i8 %A, -1 ; <i8> [#uses=1]
+ ret i8 %B
+}
diff --git a/test/CodeGen/CellSPU/or_ops.ll b/test/CodeGen/CellSPU/or_ops.ll
new file mode 100644
index 0000000..8aa1e99
--- /dev/null
+++ b/test/CodeGen/CellSPU/or_ops.ll
@@ -0,0 +1,264 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep and %t1.s | count 2
+; RUN: grep orc %t1.s | count 85
+; RUN: grep ori %t1.s | count 30
+; RUN: grep orhi %t1.s | count 30
+; RUN: grep orbi %t1.s | count 15
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; OR instruction generation:
+define <4 x i32> @or_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = or <4 x i32> %arg1, %arg2
+ ret <4 x i32> %A
+}
+
+define <4 x i32> @or_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = or <4 x i32> %arg2, %arg1
+ ret <4 x i32> %A
+}
+
+define <8 x i16> @or_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = or <8 x i16> %arg1, %arg2
+ ret <8 x i16> %A
+}
+
+define <8 x i16> @or_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = or <8 x i16> %arg2, %arg1
+ ret <8 x i16> %A
+}
+
+define <16 x i8> @or_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = or <16 x i8> %arg2, %arg1
+ ret <16 x i8> %A
+}
+
+define <16 x i8> @or_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = or <16 x i8> %arg1, %arg2
+ ret <16 x i8> %A
+}
+
+define i32 @or_i32_1(i32 %arg1, i32 %arg2) {
+ %A = or i32 %arg2, %arg1
+ ret i32 %A
+}
+
+define i32 @or_i32_2(i32 %arg1, i32 %arg2) {
+ %A = or i32 %arg1, %arg2
+ ret i32 %A
+}
+
+define i16 @or_i16_1(i16 %arg1, i16 %arg2) {
+ %A = or i16 %arg2, %arg1
+ ret i16 %A
+}
+
+define i16 @or_i16_2(i16 %arg1, i16 %arg2) {
+ %A = or i16 %arg1, %arg2
+ ret i16 %A
+}
+
+define i8 @or_i8_1(i8 %arg1, i8 %arg2) {
+ %A = or i8 %arg2, %arg1
+ ret i8 %A
+}
+
+define i8 @or_i8_2(i8 %arg1, i8 %arg2) {
+ %A = or i8 %arg1, %arg2
+ ret i8 %A
+}
+
+; ORC instruction generation:
+define <4 x i32> @orc_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = xor <4 x i32> %arg2, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = or <4 x i32> %arg1, %A
+ ret <4 x i32> %B
+}
+
+define <4 x i32> @orc_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = xor <4 x i32> %arg1, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = or <4 x i32> %arg2, %A
+ ret <4 x i32> %B
+}
+
+define <4 x i32> @orc_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %A = xor <4 x i32> %arg1, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = or <4 x i32> %A, %arg2
+ ret <4 x i32> %B
+}
+
+define <8 x i16> @orc_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = or <8 x i16> %arg1, %A
+ ret <8 x i16> %B
+}
+
+define <8 x i16> @orc_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) {
+ %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = or <8 x i16> %arg2, %A
+ ret <8 x i16> %B
+}
+
+define <16 x i8> @orc_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = or <16 x i8> %arg2, %A
+ ret <16 x i8> %B
+}
+
+define <16 x i8> @orc_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = or <16 x i8> %arg1, %A
+ ret <16 x i8> %B
+}
+
+define <16 x i8> @orc_v16i8_3(<16 x i8> %arg1, <16 x i8> %arg2) {
+ %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = or <16 x i8> %A, %arg1
+ ret <16 x i8> %B
+}
+
+define i32 @orc_i32_1(i32 %arg1, i32 %arg2) {
+ %A = xor i32 %arg2, -1
+ %B = or i32 %A, %arg1
+ ret i32 %B
+}
+
+define i32 @orc_i32_2(i32 %arg1, i32 %arg2) {
+ %A = xor i32 %arg1, -1
+ %B = or i32 %A, %arg2
+ ret i32 %B
+}
+
+define i32 @orc_i32_3(i32 %arg1, i32 %arg2) {
+ %A = xor i32 %arg2, -1
+ %B = or i32 %arg1, %A
+ ret i32 %B
+}
+
+define i16 @orc_i16_1(i16 %arg1, i16 %arg2) {
+ %A = xor i16 %arg2, -1
+ %B = or i16 %A, %arg1
+ ret i16 %B
+}
+
+define i16 @orc_i16_2(i16 %arg1, i16 %arg2) {
+ %A = xor i16 %arg1, -1
+ %B = or i16 %A, %arg2
+ ret i16 %B
+}
+
+define i16 @orc_i16_3(i16 %arg1, i16 %arg2) {
+ %A = xor i16 %arg2, -1
+ %B = or i16 %arg1, %A
+ ret i16 %B
+}
+
+define i8 @orc_i8_1(i8 %arg1, i8 %arg2) {
+ %A = xor i8 %arg2, -1
+ %B = or i8 %A, %arg1
+ ret i8 %B
+}
+
+define i8 @orc_i8_2(i8 %arg1, i8 %arg2) {
+ %A = xor i8 %arg1, -1
+ %B = or i8 %A, %arg2
+ ret i8 %B
+}
+
+define i8 @orc_i8_3(i8 %arg1, i8 %arg2) {
+ %A = xor i8 %arg2, -1
+ %B = or i8 %arg1, %A
+ ret i8 %B
+}
+
+; ORI instruction generation (i32 data type):
+define <4 x i32> @ori_v4i32_1(<4 x i32> %in) {
+ %tmp2 = or <4 x i32> %in, < i32 511, i32 511, i32 511, i32 511 >
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @ori_v4i32_2(<4 x i32> %in) {
+ %tmp2 = or <4 x i32> %in, < i32 510, i32 510, i32 510, i32 510 >
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @ori_v4i32_3(<4 x i32> %in) {
+ %tmp2 = or <4 x i32> %in, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ ret <4 x i32> %tmp2
+}
+
+define <4 x i32> @ori_v4i32_4(<4 x i32> %in) {
+ %tmp2 = or <4 x i32> %in, < i32 -512, i32 -512, i32 -512, i32 -512 >
+ ret <4 x i32> %tmp2
+}
+
+define i32 @ori_u32(i32 zeroext %in) zeroext {
+ %tmp37 = or i32 %in, 37 ; <i32> [#uses=1]
+ ret i32 %tmp37
+}
+
+define i32 @ori_i32(i32 signext %in) signext {
+ %tmp38 = or i32 %in, 37 ; <i32> [#uses=1]
+ ret i32 %tmp38
+}
+
+; ORHI instruction generation (i16 data type):
+define <8 x i16> @orhi_v8i16_1(<8 x i16> %in) {
+ %tmp2 = or <8 x i16> %in, < i16 511, i16 511, i16 511, i16 511,
+ i16 511, i16 511, i16 511, i16 511 >
+ ret <8 x i16> %tmp2
+}
+
+define <8 x i16> @orhi_v8i16_2(<8 x i16> %in) {
+ %tmp2 = or <8 x i16> %in, < i16 510, i16 510, i16 510, i16 510,
+ i16 510, i16 510, i16 510, i16 510 >
+ ret <8 x i16> %tmp2
+}
+
+define <8 x i16> @orhi_v8i16_3(<8 x i16> %in) {
+ %tmp2 = or <8 x i16> %in, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1 >
+ ret <8 x i16> %tmp2
+}
+
+define <8 x i16> @orhi_v8i16_4(<8 x i16> %in) {
+ %tmp2 = or <8 x i16> %in, < i16 -512, i16 -512, i16 -512, i16 -512,
+ i16 -512, i16 -512, i16 -512, i16 -512 >
+ ret <8 x i16> %tmp2
+}
+
+define i16 @orhi_u16(i16 zeroext %in) zeroext {
+ %tmp37 = or i16 %in, 37 ; <i16> [#uses=1]
+ ret i16 %tmp37
+}
+
+define i16 @orhi_i16(i16 signext %in) signext {
+ %tmp38 = or i16 %in, 37 ; <i16> [#uses=1]
+ ret i16 %tmp38
+}
+
+; ORBI instruction generation (i8 data type):
+define <16 x i8> @orbi_v16i8(<16 x i8> %in) {
+ %tmp2 = or <16 x i8> %in, < i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
+ i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
+ i8 42, i8 42, i8 42, i8 42 >
+ ret <16 x i8> %tmp2
+}
+
+define i8 @orbi_u8(i8 zeroext %in) zeroext {
+ %tmp37 = or i8 %in, 37 ; <i8> [#uses=1]
+ ret i8 %tmp37
+}
+
+define i8 @orbi_i8(i8 signext %in) signext {
+ %tmp38 = or i8 %in, 37 ; <i8> [#uses=1]
+ ret i8 %tmp38
+}
diff --git a/test/CodeGen/CellSPU/private.ll b/test/CodeGen/CellSPU/private.ll
new file mode 100644
index 0000000..56f72e7
--- /dev/null
+++ b/test/CodeGen/CellSPU/private.ll
@@ -0,0 +1,22 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llc < %s -march=cellspu > %t
+; RUN: grep .Lfoo: %t
+; RUN: grep brsl.*\.Lfoo %t
+; RUN: grep .Lbaz: %t
+; RUN: grep ila.*\.Lbaz %t
+
+
+declare void @foo()
+
+define private void @foo() {
+ ret void
+}
+
+@baz = private global i32 4
+
+define i32 @bar() {
+ call void @foo()
+ %1 = load i32* @baz, align 4
+ ret i32 %1
+}
diff --git a/test/CodeGen/CellSPU/rotate_ops.ll b/test/CodeGen/CellSPU/rotate_ops.ll
new file mode 100644
index 0000000..a504c00
--- /dev/null
+++ b/test/CodeGen/CellSPU/rotate_ops.ll
@@ -0,0 +1,160 @@
+; RUN: llc < %s -march=cellspu -o %t1.s
+; RUN: grep rot %t1.s | count 85
+; RUN: grep roth %t1.s | count 8
+; RUN: grep roti.*5 %t1.s | count 1
+; RUN: grep roti.*27 %t1.s | count 1
+; RUN grep rothi.*5 %t1.s | count 2
+; RUN grep rothi.*11 %t1.s | count 1
+; RUN grep rothi.*,.3 %t1.s | count 1
+; RUN: grep andhi %t1.s | count 4
+; RUN: grep shlhi %t1.s | count 4
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; Vector rotates are not currently supported in gcc or llvm assembly. These are
+; not tested.
+
+; 32-bit rotates:
+define i32 @rotl32_1a(i32 %arg1, i8 %arg2) {
+ %tmp1 = zext i8 %arg2 to i32 ; <i32> [#uses=1]
+ %B = shl i32 %arg1, %tmp1 ; <i32> [#uses=1]
+ %arg22 = sub i8 32, %arg2 ; <i8> [#uses=1]
+ %tmp2 = zext i8 %arg22 to i32 ; <i32> [#uses=1]
+ %C = lshr i32 %arg1, %tmp2 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotl32_1b(i32 %arg1, i16 %arg2) {
+ %tmp1 = zext i16 %arg2 to i32 ; <i32> [#uses=1]
+ %B = shl i32 %arg1, %tmp1 ; <i32> [#uses=1]
+ %arg22 = sub i16 32, %arg2 ; <i8> [#uses=1]
+ %tmp2 = zext i16 %arg22 to i32 ; <i32> [#uses=1]
+ %C = lshr i32 %arg1, %tmp2 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotl32_2(i32 %arg1, i32 %arg2) {
+ %B = shl i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %tmp1 = sub i32 32, %arg2 ; <i32> [#uses=1]
+ %C = lshr i32 %arg1, %tmp1 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotl32_3(i32 %arg1, i32 %arg2) {
+ %tmp1 = sub i32 32, %arg2 ; <i32> [#uses=1]
+ %B = shl i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %C = lshr i32 %arg1, %tmp1 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotl32_4(i32 %arg1, i32 %arg2) {
+ %tmp1 = sub i32 32, %arg2 ; <i32> [#uses=1]
+ %C = lshr i32 %arg1, %tmp1 ; <i32> [#uses=1]
+ %B = shl i32 %arg1, %arg2 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotr32_1(i32 %A, i8 %Amt) {
+ %tmp1 = zext i8 %Amt to i32 ; <i32> [#uses=1]
+ %B = lshr i32 %A, %tmp1 ; <i32> [#uses=1]
+ %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
+ %tmp2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
+ %C = shl i32 %A, %tmp2 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotr32_2(i32 %A, i8 %Amt) {
+ %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
+ %tmp1 = zext i8 %Amt to i32 ; <i32> [#uses=1]
+ %B = lshr i32 %A, %tmp1 ; <i32> [#uses=1]
+ %tmp2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
+ %C = shl i32 %A, %tmp2 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+; Rotate left with immediate
+define i32 @rotli32(i32 %A) {
+ %B = shl i32 %A, 5 ; <i32> [#uses=1]
+ %C = lshr i32 %A, 27 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+; Rotate right with immediate
+define i32 @rotri32(i32 %A) {
+ %B = lshr i32 %A, 5 ; <i32> [#uses=1]
+ %C = shl i32 %A, 27 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+; 16-bit rotates:
+define i16 @rotr16_1(i16 %arg1, i8 %arg) {
+ %tmp1 = zext i8 %arg to i16 ; <i16> [#uses=1]
+ %B = lshr i16 %arg1, %tmp1 ; <i16> [#uses=1]
+ %arg2 = sub i8 16, %arg ; <i8> [#uses=1]
+ %tmp2 = zext i8 %arg2 to i16 ; <i16> [#uses=1]
+ %C = shl i16 %arg1, %tmp2 ; <i16> [#uses=1]
+ %D = or i16 %B, %C ; <i16> [#uses=1]
+ ret i16 %D
+}
+
+define i16 @rotr16_2(i16 %arg1, i16 %arg) {
+ %B = lshr i16 %arg1, %arg ; <i16> [#uses=1]
+ %tmp1 = sub i16 16, %arg ; <i16> [#uses=1]
+ %C = shl i16 %arg1, %tmp1 ; <i16> [#uses=1]
+ %D = or i16 %B, %C ; <i16> [#uses=1]
+ ret i16 %D
+}
+
+define i16 @rotli16(i16 %A) {
+ %B = shl i16 %A, 5 ; <i16> [#uses=1]
+ %C = lshr i16 %A, 11 ; <i16> [#uses=1]
+ %D = or i16 %B, %C ; <i16> [#uses=1]
+ ret i16 %D
+}
+
+define i16 @rotri16(i16 %A) {
+ %B = lshr i16 %A, 5 ; <i16> [#uses=1]
+ %C = shl i16 %A, 11 ; <i16> [#uses=1]
+ %D = or i16 %B, %C ; <i16> [#uses=1]
+ ret i16 %D
+}
+
+define i8 @rotl8(i8 %A, i8 %Amt) {
+ %B = shl i8 %A, %Amt ; <i8> [#uses=1]
+ %Amt2 = sub i8 8, %Amt ; <i8> [#uses=1]
+ %C = lshr i8 %A, %Amt2 ; <i8> [#uses=1]
+ %D = or i8 %B, %C ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i8 @rotr8(i8 %A, i8 %Amt) {
+ %B = lshr i8 %A, %Amt ; <i8> [#uses=1]
+ %Amt2 = sub i8 8, %Amt ; <i8> [#uses=1]
+ %C = shl i8 %A, %Amt2 ; <i8> [#uses=1]
+ %D = or i8 %B, %C ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i8 @rotli8(i8 %A) {
+ %B = shl i8 %A, 5 ; <i8> [#uses=1]
+ %C = lshr i8 %A, 3 ; <i8> [#uses=1]
+ %D = or i8 %B, %C ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i8 @rotri8(i8 %A) {
+ %B = lshr i8 %A, 5 ; <i8> [#uses=1]
+ %C = shl i8 %A, 3 ; <i8> [#uses=1]
+ %D = or i8 %B, %C ; <i8> [#uses=1]
+ ret i8 %D
+}
diff --git a/test/CodeGen/CellSPU/select_bits.ll b/test/CodeGen/CellSPU/select_bits.ll
new file mode 100644
index 0000000..c804256
--- /dev/null
+++ b/test/CodeGen/CellSPU/select_bits.ll
@@ -0,0 +1,569 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep selb %t1.s | count 56
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+; v2i64
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+
+; (or (and rC, rB), (and (not rC), rA))
+define <2 x i64> @selectbits_v2i64_01(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
+ %C = and <2 x i64> %rC, %rB
+ %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
+ %B = and <2 x i64> %A, %rA
+ %D = or <2 x i64> %C, %B
+ ret <2 x i64> %D
+}
+
+; (or (and rB, rC), (and (not rC), rA))
+define <2 x i64> @selectbits_v2i64_02(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
+ %C = and <2 x i64> %rB, %rC
+ %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
+ %B = and <2 x i64> %A, %rA
+ %D = or <2 x i64> %C, %B
+ ret <2 x i64> %D
+}
+
+; (or (and (not rC), rA), (and rB, rC))
+define <2 x i64> @selectbits_v2i64_03(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
+ %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
+ %B = and <2 x i64> %A, %rA
+ %C = and <2 x i64> %rB, %rC
+ %D = or <2 x i64> %C, %B
+ ret <2 x i64> %D
+}
+
+; (or (and (not rC), rA), (and rC, rB))
+define <2 x i64> @selectbits_v2i64_04(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
+ %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
+ %B = and <2 x i64> %A, %rA
+ %C = and <2 x i64> %rC, %rB
+ %D = or <2 x i64> %C, %B
+ ret <2 x i64> %D
+}
+
+; (or (and rC, rB), (and rA, (not rC)))
+define <2 x i64> @selectbits_v2i64_05(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
+ %C = and <2 x i64> %rC, %rB
+ %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
+ %B = and <2 x i64> %rA, %A
+ %D = or <2 x i64> %C, %B
+ ret <2 x i64> %D
+}
+
+; (or (and rB, rC), (and rA, (not rC)))
+define <2 x i64> @selectbits_v2i64_06(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
+ %C = and <2 x i64> %rB, %rC
+ %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
+ %B = and <2 x i64> %rA, %A
+ %D = or <2 x i64> %C, %B
+ ret <2 x i64> %D
+}
+
+; (or (and rA, (not rC)), (and rB, rC))
+define <2 x i64> @selectbits_v2i64_07(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
+ %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
+ %B = and <2 x i64> %rA, %A
+ %C = and <2 x i64> %rB, %rC
+ %D = or <2 x i64> %C, %B
+ ret <2 x i64> %D
+}
+
+; (or (and rA, (not rC)), (and rC, rB))
+define <2 x i64> @selectbits_v2i64_08(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
+ %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
+ %B = and <2 x i64> %rA, %A
+ %C = and <2 x i64> %rC, %rB
+ %D = or <2 x i64> %C, %B
+ ret <2 x i64> %D
+}
+
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+; v4i32
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+
+; (or (and rC, rB), (and (not rC), rA))
+define <4 x i32> @selectbits_v4i32_01(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) {
+ %C = and <4 x i32> %rC, %rB
+ %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = and <4 x i32> %A, %rA
+ %D = or <4 x i32> %C, %B
+ ret <4 x i32> %D
+}
+
+; (or (and rB, rC), (and (not rC), rA))
+define <4 x i32> @selectbits_v4i32_02(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) {
+ %C = and <4 x i32> %rB, %rC
+ %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = and <4 x i32> %A, %rA
+ %D = or <4 x i32> %C, %B
+ ret <4 x i32> %D
+}
+
+; (or (and (not rC), rA), (and rB, rC))
+define <4 x i32> @selectbits_v4i32_03(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) {
+ %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %B = and <4 x i32> %A, %rA
+ %C = and <4 x i32> %rB, %rC
+ %D = or <4 x i32> %C, %B
+ ret <4 x i32> %D
+}
+
+; (or (and (not rC), rA), (and rC, rB))
+define <4 x i32> @selectbits_v4i32_04(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) {
+ %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1>
+ %B = and <4 x i32> %A, %rA
+ %C = and <4 x i32> %rC, %rB
+ %D = or <4 x i32> %C, %B
+ ret <4 x i32> %D
+}
+
+; (or (and rC, rB), (and rA, (not rC)))
+define <4 x i32> @selectbits_v4i32_05(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) {
+ %C = and <4 x i32> %rC, %rB
+ %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1>
+ %B = and <4 x i32> %rA, %A
+ %D = or <4 x i32> %C, %B
+ ret <4 x i32> %D
+}
+
+; (or (and rB, rC), (and rA, (not rC)))
+define <4 x i32> @selectbits_v4i32_06(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) {
+ %C = and <4 x i32> %rB, %rC
+ %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1>
+ %B = and <4 x i32> %rA, %A
+ %D = or <4 x i32> %C, %B
+ ret <4 x i32> %D
+}
+
+; (or (and rA, (not rC)), (and rB, rC))
+define <4 x i32> @selectbits_v4i32_07(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) {
+ %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1>
+ %B = and <4 x i32> %rA, %A
+ %C = and <4 x i32> %rB, %rC
+ %D = or <4 x i32> %C, %B
+ ret <4 x i32> %D
+}
+
+; (or (and rA, (not rC)), (and rC, rB))
+define <4 x i32> @selectbits_v4i32_08(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) {
+ %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1>
+ %B = and <4 x i32> %rA, %A
+ %C = and <4 x i32> %rC, %rB
+ %D = or <4 x i32> %C, %B
+ ret <4 x i32> %D
+}
+
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+; v8i16
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+
+; (or (and rC, rB), (and (not rC), rA))
+define <8 x i16> @selectbits_v8i16_01(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) {
+ %C = and <8 x i16> %rC, %rB
+ %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %A, %rA
+ %D = or <8 x i16> %C, %B
+ ret <8 x i16> %D
+}
+
+; (or (and rB, rC), (and (not rC), rA))
+define <8 x i16> @selectbits_v8i16_02(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) {
+ %C = and <8 x i16> %rB, %rC
+ %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %A, %rA
+ %D = or <8 x i16> %C, %B
+ ret <8 x i16> %D
+}
+
+; (or (and (not rC), rA), (and rB, rC))
+define <8 x i16> @selectbits_v8i16_03(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) {
+ %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %A, %rA
+ %C = and <8 x i16> %rB, %rC
+ %D = or <8 x i16> %C, %B
+ ret <8 x i16> %D
+}
+
+; (or (and (not rC), rA), (and rC, rB))
+define <8 x i16> @selectbits_v8i16_04(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) {
+ %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %A, %rA
+ %C = and <8 x i16> %rC, %rB
+ %D = or <8 x i16> %C, %B
+ ret <8 x i16> %D
+}
+
+; (or (and rC, rB), (and rA, (not rC)))
+define <8 x i16> @selectbits_v8i16_05(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) {
+ %C = and <8 x i16> %rC, %rB
+ %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %rA, %A
+ %D = or <8 x i16> %C, %B
+ ret <8 x i16> %D
+}
+
+; (or (and rB, rC), (and rA, (not rC)))
+define <8 x i16> @selectbits_v8i16_06(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) {
+ %C = and <8 x i16> %rB, %rC
+ %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %rA, %A
+ %D = or <8 x i16> %C, %B
+ ret <8 x i16> %D
+}
+
+; (or (and rA, (not rC)), (and rB, rC))
+define <8 x i16> @selectbits_v8i16_07(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) {
+ %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %rA, %A
+ %C = and <8 x i16> %rB, %rC
+ %D = or <8 x i16> %C, %B
+ ret <8 x i16> %D
+}
+
+; (or (and rA, (not rC)), (and rC, rB))
+define <8 x i16> @selectbits_v8i16_08(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) {
+ %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1,
+ i16 -1, i16 -1, i16 -1, i16 -1 >
+ %B = and <8 x i16> %rA, %A
+ %C = and <8 x i16> %rC, %rB
+ %D = or <8 x i16> %C, %B
+ ret <8 x i16> %D
+}
+
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+; v16i8
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+
+; (or (and rC, rB), (and (not rC), rA))
+define <16 x i8> @selectbits_v16i8_01(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) {
+ %C = and <16 x i8> %rC, %rB
+ %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %A, %rA
+ %D = or <16 x i8> %C, %B
+ ret <16 x i8> %D
+}
+
+; (or (and rB, rC), (and (not rC), rA))
+define <16 x i8> @selectbits_v16i8_02(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) {
+ %C = and <16 x i8> %rB, %rC
+ %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %A, %rA
+ %D = or <16 x i8> %C, %B
+ ret <16 x i8> %D
+}
+
+; (or (and (not rC), rA), (and rB, rC))
+define <16 x i8> @selectbits_v16i8_03(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) {
+ %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %A, %rA
+ %C = and <16 x i8> %rB, %rC
+ %D = or <16 x i8> %C, %B
+ ret <16 x i8> %D
+}
+
+; (or (and (not rC), rA), (and rC, rB))
+define <16 x i8> @selectbits_v16i8_04(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) {
+ %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %A, %rA
+ %C = and <16 x i8> %rC, %rB
+ %D = or <16 x i8> %C, %B
+ ret <16 x i8> %D
+}
+
+; (or (and rC, rB), (and rA, (not rC)))
+define <16 x i8> @selectbits_v16i8_05(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) {
+ %C = and <16 x i8> %rC, %rB
+ %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %rA, %A
+ %D = or <16 x i8> %C, %B
+ ret <16 x i8> %D
+}
+
+; (or (and rB, rC), (and rA, (not rC)))
+define <16 x i8> @selectbits_v16i8_06(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) {
+ %C = and <16 x i8> %rB, %rC
+ %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %rA, %A
+ %D = or <16 x i8> %C, %B
+ ret <16 x i8> %D
+}
+
+; (or (and rA, (not rC)), (and rB, rC))
+define <16 x i8> @selectbits_v16i8_07(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) {
+ %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %rA, %A
+ %C = and <16 x i8> %rB, %rC
+ %D = or <16 x i8> %C, %B
+ ret <16 x i8> %D
+}
+
+; (or (and rA, (not rC)), (and rC, rB))
+define <16 x i8> @selectbits_v16i8_08(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) {
+ %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1,
+ i8 -1, i8 -1, i8 -1, i8 -1 >
+ %B = and <16 x i8> %rA, %A
+ %C = and <16 x i8> %rC, %rB
+ %D = or <16 x i8> %C, %B
+ ret <16 x i8> %D
+}
+
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+; i32
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+
+; (or (and rC, rB), (and (not rC), rA))
+define i32 @selectbits_i32_01(i32 %rA, i32 %rB, i32 %rC) {
+ %C = and i32 %rC, %rB
+ %A = xor i32 %rC, -1
+ %B = and i32 %A, %rA
+ %D = or i32 %C, %B
+ ret i32 %D
+}
+
+; (or (and rB, rC), (and (not rC), rA))
+define i32 @selectbits_i32_02(i32 %rA, i32 %rB, i32 %rC) {
+ %C = and i32 %rB, %rC
+ %A = xor i32 %rC, -1
+ %B = and i32 %A, %rA
+ %D = or i32 %C, %B
+ ret i32 %D
+}
+
+; (or (and (not rC), rA), (and rB, rC))
+define i32 @selectbits_i32_03(i32 %rA, i32 %rB, i32 %rC) {
+ %A = xor i32 %rC, -1
+ %B = and i32 %A, %rA
+ %C = and i32 %rB, %rC
+ %D = or i32 %C, %B
+ ret i32 %D
+}
+
+; (or (and (not rC), rA), (and rC, rB))
+define i32 @selectbits_i32_04(i32 %rA, i32 %rB, i32 %rC) {
+ %A = xor i32 %rC, -1
+ %B = and i32 %A, %rA
+ %C = and i32 %rC, %rB
+ %D = or i32 %C, %B
+ ret i32 %D
+}
+
+; (or (and rC, rB), (and rA, (not rC)))
+define i32 @selectbits_i32_05(i32 %rA, i32 %rB, i32 %rC) {
+ %C = and i32 %rC, %rB
+ %A = xor i32 %rC, -1
+ %B = and i32 %rA, %A
+ %D = or i32 %C, %B
+ ret i32 %D
+}
+
+; (or (and rB, rC), (and rA, (not rC)))
+define i32 @selectbits_i32_06(i32 %rA, i32 %rB, i32 %rC) {
+ %C = and i32 %rB, %rC
+ %A = xor i32 %rC, -1
+ %B = and i32 %rA, %A
+ %D = or i32 %C, %B
+ ret i32 %D
+}
+
+; (or (and rA, (not rC)), (and rB, rC))
+define i32 @selectbits_i32_07(i32 %rA, i32 %rB, i32 %rC) {
+ %A = xor i32 %rC, -1
+ %B = and i32 %rA, %A
+ %C = and i32 %rB, %rC
+ %D = or i32 %C, %B
+ ret i32 %D
+}
+
+; (or (and rA, (not rC)), (and rC, rB))
+define i32 @selectbits_i32_08(i32 %rA, i32 %rB, i32 %rC) {
+ %A = xor i32 %rC, -1
+ %B = and i32 %rA, %A
+ %C = and i32 %rC, %rB
+ %D = or i32 %C, %B
+ ret i32 %D
+}
+
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+; i16
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+
+; (or (and rC, rB), (and (not rC), rA))
+define i16 @selectbits_i16_01(i16 %rA, i16 %rB, i16 %rC) {
+ %C = and i16 %rC, %rB
+ %A = xor i16 %rC, -1
+ %B = and i16 %A, %rA
+ %D = or i16 %C, %B
+ ret i16 %D
+}
+
+; (or (and rB, rC), (and (not rC), rA))
+define i16 @selectbits_i16_02(i16 %rA, i16 %rB, i16 %rC) {
+ %C = and i16 %rB, %rC
+ %A = xor i16 %rC, -1
+ %B = and i16 %A, %rA
+ %D = or i16 %C, %B
+ ret i16 %D
+}
+
+; (or (and (not rC), rA), (and rB, rC))
+define i16 @selectbits_i16_03(i16 %rA, i16 %rB, i16 %rC) {
+ %A = xor i16 %rC, -1
+ %B = and i16 %A, %rA
+ %C = and i16 %rB, %rC
+ %D = or i16 %C, %B
+ ret i16 %D
+}
+
+; (or (and (not rC), rA), (and rC, rB))
+define i16 @selectbits_i16_04(i16 %rA, i16 %rB, i16 %rC) {
+ %A = xor i16 %rC, -1
+ %B = and i16 %A, %rA
+ %C = and i16 %rC, %rB
+ %D = or i16 %C, %B
+ ret i16 %D
+}
+
+; (or (and rC, rB), (and rA, (not rC)))
+define i16 @selectbits_i16_05(i16 %rA, i16 %rB, i16 %rC) {
+ %C = and i16 %rC, %rB
+ %A = xor i16 %rC, -1
+ %B = and i16 %rA, %A
+ %D = or i16 %C, %B
+ ret i16 %D
+}
+
+; (or (and rB, rC), (and rA, (not rC)))
+define i16 @selectbits_i16_06(i16 %rA, i16 %rB, i16 %rC) {
+ %C = and i16 %rB, %rC
+ %A = xor i16 %rC, -1
+ %B = and i16 %rA, %A
+ %D = or i16 %C, %B
+ ret i16 %D
+}
+
+; (or (and rA, (not rC)), (and rB, rC))
+define i16 @selectbits_i16_07(i16 %rA, i16 %rB, i16 %rC) {
+ %A = xor i16 %rC, -1
+ %B = and i16 %rA, %A
+ %C = and i16 %rB, %rC
+ %D = or i16 %C, %B
+ ret i16 %D
+}
+
+; (or (and rA, (not rC)), (and rC, rB))
+define i16 @selectbits_i16_08(i16 %rA, i16 %rB, i16 %rC) {
+ %A = xor i16 %rC, -1
+ %B = and i16 %rA, %A
+ %C = and i16 %rC, %rB
+ %D = or i16 %C, %B
+ ret i16 %D
+}
+
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+; i8
+;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
+
+; (or (and rC, rB), (and (not rC), rA))
+define i8 @selectbits_i8_01(i8 %rA, i8 %rB, i8 %rC) {
+ %C = and i8 %rC, %rB
+ %A = xor i8 %rC, -1
+ %B = and i8 %A, %rA
+ %D = or i8 %C, %B
+ ret i8 %D
+}
+
+; (or (and rB, rC), (and (not rC), rA))
+define i8 @selectbits_i8_02(i8 %rA, i8 %rB, i8 %rC) {
+ %C = and i8 %rB, %rC
+ %A = xor i8 %rC, -1
+ %B = and i8 %A, %rA
+ %D = or i8 %C, %B
+ ret i8 %D
+}
+
+; (or (and (not rC), rA), (and rB, rC))
+define i8 @selectbits_i8_03(i8 %rA, i8 %rB, i8 %rC) {
+ %A = xor i8 %rC, -1
+ %B = and i8 %A, %rA
+ %C = and i8 %rB, %rC
+ %D = or i8 %C, %B
+ ret i8 %D
+}
+
+; (or (and (not rC), rA), (and rC, rB))
+define i8 @selectbits_i8_04(i8 %rA, i8 %rB, i8 %rC) {
+ %A = xor i8 %rC, -1
+ %B = and i8 %A, %rA
+ %C = and i8 %rC, %rB
+ %D = or i8 %C, %B
+ ret i8 %D
+}
+
+; (or (and rC, rB), (and rA, (not rC)))
+define i8 @selectbits_i8_05(i8 %rA, i8 %rB, i8 %rC) {
+ %C = and i8 %rC, %rB
+ %A = xor i8 %rC, -1
+ %B = and i8 %rA, %A
+ %D = or i8 %C, %B
+ ret i8 %D
+}
+
+; (or (and rB, rC), (and rA, (not rC)))
+define i8 @selectbits_i8_06(i8 %rA, i8 %rB, i8 %rC) {
+ %C = and i8 %rB, %rC
+ %A = xor i8 %rC, -1
+ %B = and i8 %rA, %A
+ %D = or i8 %C, %B
+ ret i8 %D
+}
+
+; (or (and rA, (not rC)), (and rB, rC))
+define i8 @selectbits_i8_07(i8 %rA, i8 %rB, i8 %rC) {
+ %A = xor i8 %rC, -1
+ %B = and i8 %rA, %A
+ %C = and i8 %rB, %rC
+ %D = or i8 %C, %B
+ ret i8 %D
+}
+
+; (or (and rA, (not rC)), (and rC, rB))
+define i8 @selectbits_i8_08(i8 %rA, i8 %rB, i8 %rC) {
+ %A = xor i8 %rC, -1
+ %B = and i8 %rA, %A
+ %C = and i8 %rC, %rB
+ %D = or i8 %C, %B
+ ret i8 %D
+}
diff --git a/test/CodeGen/CellSPU/sext128.ll b/test/CodeGen/CellSPU/sext128.ll
new file mode 100644
index 0000000..0c0b359
--- /dev/null
+++ b/test/CodeGen/CellSPU/sext128.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -march=cellspu | FileCheck %s
+
+; ModuleID = 'sext128.bc'
+target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:128:128-v128:128:128-a0:0:128-s0:128:128"
+target triple = "spu"
+
+define i128 @sext_i64_i128(i64 %a) {
+entry:
+ %0 = sext i64 %a to i128
+ ret i128 %0
+; CHECK: long 269488144
+; CHECK: long 269488144
+; CHECK: long 66051
+; CHECK: long 67438087
+; CHECK: rotmai
+; CHECK: lqa
+; CHECK: shufb
+}
+
+define i128 @sext_i32_i128(i32 %a) {
+entry:
+ %0 = sext i32 %a to i128
+ ret i128 %0
+; CHECK: long 269488144
+; CHECK: long 269488144
+; CHECK: long 269488144
+; CHECK: long 66051
+; CHECK: rotmai
+; CHECK: lqa
+; CHECK: shufb
+}
+
+define i128 @sext_i32_i128a(float %a) {
+entry:
+ %0 = call i32 @myfunc(float %a)
+ %1 = sext i32 %0 to i128
+ ret i128 %1
+; CHECK: long 269488144
+; CHECK: long 269488144
+; CHECK: long 269488144
+; CHECK: long 66051
+; CHECK: rotmai
+; CHECK: lqa
+; CHECK: shufb
+}
+
+declare i32 @myfunc(float)
diff --git a/test/CodeGen/CellSPU/shift_ops.ll b/test/CodeGen/CellSPU/shift_ops.ll
new file mode 100644
index 0000000..0264fc8
--- /dev/null
+++ b/test/CodeGen/CellSPU/shift_ops.ll
@@ -0,0 +1,283 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep {shlh } %t1.s | count 9
+; RUN: grep {shlhi } %t1.s | count 3
+; RUN: grep {shl } %t1.s | count 9
+; RUN: grep {shli } %t1.s | count 3
+; RUN: grep {xshw } %t1.s | count 5
+; RUN: grep {and } %t1.s | count 5
+; RUN: grep {andi } %t1.s | count 2
+; RUN: grep {rotmi } %t1.s | count 2
+; RUN: grep {rotqmbyi } %t1.s | count 1
+; RUN: grep {rotqmbii } %t1.s | count 2
+; RUN: grep {rotqmby } %t1.s | count 1
+; RUN: grep {rotqmbi } %t1.s | count 1
+; RUN: grep {rotqbyi } %t1.s | count 1
+; RUN: grep {rotqbii } %t1.s | count 2
+; RUN: grep {rotqbybi } %t1.s | count 1
+; RUN: grep {sfi } %t1.s | count 3
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; Vector shifts are not currently supported in gcc or llvm assembly. These are
+; not tested.
+
+; Shift left i16 via register, note that the second operand to shl is promoted
+; to a 32-bit type:
+
+define i16 @shlh_i16_1(i16 %arg1, i16 %arg2) {
+ %A = shl i16 %arg1, %arg2
+ ret i16 %A
+}
+
+define i16 @shlh_i16_2(i16 %arg1, i16 %arg2) {
+ %A = shl i16 %arg2, %arg1
+ ret i16 %A
+}
+
+define i16 @shlh_i16_3(i16 signext %arg1, i16 signext %arg2) signext {
+ %A = shl i16 %arg1, %arg2
+ ret i16 %A
+}
+
+define i16 @shlh_i16_4(i16 signext %arg1, i16 signext %arg2) signext {
+ %A = shl i16 %arg2, %arg1
+ ret i16 %A
+}
+
+define i16 @shlh_i16_5(i16 zeroext %arg1, i16 zeroext %arg2) zeroext {
+ %A = shl i16 %arg1, %arg2
+ ret i16 %A
+}
+
+define i16 @shlh_i16_6(i16 zeroext %arg1, i16 zeroext %arg2) zeroext {
+ %A = shl i16 %arg2, %arg1
+ ret i16 %A
+}
+
+; Shift left i16 with immediate:
+define i16 @shlhi_i16_1(i16 %arg1) {
+ %A = shl i16 %arg1, 12
+ ret i16 %A
+}
+
+; Should not generate anything other than the return, arg1 << 0 = arg1
+define i16 @shlhi_i16_2(i16 %arg1) {
+ %A = shl i16 %arg1, 0
+ ret i16 %A
+}
+
+define i16 @shlhi_i16_3(i16 %arg1) {
+ %A = shl i16 16383, %arg1
+ ret i16 %A
+}
+
+; Should generate 0, 0 << arg1 = 0
+define i16 @shlhi_i16_4(i16 %arg1) {
+ %A = shl i16 0, %arg1
+ ret i16 %A
+}
+
+define i16 @shlhi_i16_5(i16 signext %arg1) signext {
+ %A = shl i16 %arg1, 12
+ ret i16 %A
+}
+
+; Should not generate anything other than the return, arg1 << 0 = arg1
+define i16 @shlhi_i16_6(i16 signext %arg1) signext {
+ %A = shl i16 %arg1, 0
+ ret i16 %A
+}
+
+define i16 @shlhi_i16_7(i16 signext %arg1) signext {
+ %A = shl i16 16383, %arg1
+ ret i16 %A
+}
+
+; Should generate 0, 0 << arg1 = 0
+define i16 @shlhi_i16_8(i16 signext %arg1) signext {
+ %A = shl i16 0, %arg1
+ ret i16 %A
+}
+
+define i16 @shlhi_i16_9(i16 zeroext %arg1) zeroext {
+ %A = shl i16 %arg1, 12
+ ret i16 %A
+}
+
+; Should not generate anything other than the return, arg1 << 0 = arg1
+define i16 @shlhi_i16_10(i16 zeroext %arg1) zeroext {
+ %A = shl i16 %arg1, 0
+ ret i16 %A
+}
+
+define i16 @shlhi_i16_11(i16 zeroext %arg1) zeroext {
+ %A = shl i16 16383, %arg1
+ ret i16 %A
+}
+
+; Should generate 0, 0 << arg1 = 0
+define i16 @shlhi_i16_12(i16 zeroext %arg1) zeroext {
+ %A = shl i16 0, %arg1
+ ret i16 %A
+}
+
+; Shift left i32 via register, note that the second operand to shl is promoted
+; to a 32-bit type:
+
+define i32 @shl_i32_1(i32 %arg1, i32 %arg2) {
+ %A = shl i32 %arg1, %arg2
+ ret i32 %A
+}
+
+define i32 @shl_i32_2(i32 %arg1, i32 %arg2) {
+ %A = shl i32 %arg2, %arg1
+ ret i32 %A
+}
+
+define i32 @shl_i32_3(i32 signext %arg1, i32 signext %arg2) signext {
+ %A = shl i32 %arg1, %arg2
+ ret i32 %A
+}
+
+define i32 @shl_i32_4(i32 signext %arg1, i32 signext %arg2) signext {
+ %A = shl i32 %arg2, %arg1
+ ret i32 %A
+}
+
+define i32 @shl_i32_5(i32 zeroext %arg1, i32 zeroext %arg2) zeroext {
+ %A = shl i32 %arg1, %arg2
+ ret i32 %A
+}
+
+define i32 @shl_i32_6(i32 zeroext %arg1, i32 zeroext %arg2) zeroext {
+ %A = shl i32 %arg2, %arg1
+ ret i32 %A
+}
+
+; Shift left i32 with immediate:
+define i32 @shli_i32_1(i32 %arg1) {
+ %A = shl i32 %arg1, 12
+ ret i32 %A
+}
+
+; Should not generate anything other than the return, arg1 << 0 = arg1
+define i32 @shli_i32_2(i32 %arg1) {
+ %A = shl i32 %arg1, 0
+ ret i32 %A
+}
+
+define i32 @shli_i32_3(i32 %arg1) {
+ %A = shl i32 16383, %arg1
+ ret i32 %A
+}
+
+; Should generate 0, 0 << arg1 = 0
+define i32 @shli_i32_4(i32 %arg1) {
+ %A = shl i32 0, %arg1
+ ret i32 %A
+}
+
+define i32 @shli_i32_5(i32 signext %arg1) signext {
+ %A = shl i32 %arg1, 12
+ ret i32 %A
+}
+
+; Should not generate anything other than the return, arg1 << 0 = arg1
+define i32 @shli_i32_6(i32 signext %arg1) signext {
+ %A = shl i32 %arg1, 0
+ ret i32 %A
+}
+
+define i32 @shli_i32_7(i32 signext %arg1) signext {
+ %A = shl i32 16383, %arg1
+ ret i32 %A
+}
+
+; Should generate 0, 0 << arg1 = 0
+define i32 @shli_i32_8(i32 signext %arg1) signext {
+ %A = shl i32 0, %arg1
+ ret i32 %A
+}
+
+define i32 @shli_i32_9(i32 zeroext %arg1) zeroext {
+ %A = shl i32 %arg1, 12
+ ret i32 %A
+}
+
+; Should not generate anything other than the return, arg1 << 0 = arg1
+define i32 @shli_i32_10(i32 zeroext %arg1) zeroext {
+ %A = shl i32 %arg1, 0
+ ret i32 %A
+}
+
+define i32 @shli_i32_11(i32 zeroext %arg1) zeroext {
+ %A = shl i32 16383, %arg1
+ ret i32 %A
+}
+
+; Should generate 0, 0 << arg1 = 0
+define i32 @shli_i32_12(i32 zeroext %arg1) zeroext {
+ %A = shl i32 0, %arg1
+ ret i32 %A
+}
+
+;; i64 shift left
+
+define i64 @shl_i64_1(i64 %arg1) {
+ %A = shl i64 %arg1, 9
+ ret i64 %A
+}
+
+define i64 @shl_i64_2(i64 %arg1) {
+ %A = shl i64 %arg1, 3
+ ret i64 %A
+}
+
+define i64 @shl_i64_3(i64 %arg1, i32 %shift) {
+ %1 = zext i32 %shift to i64
+ %2 = shl i64 %arg1, %1
+ ret i64 %2
+}
+
+;; i64 shift right logical (shift 0s from the right)
+
+define i64 @lshr_i64_1(i64 %arg1) {
+ %1 = lshr i64 %arg1, 9
+ ret i64 %1
+}
+
+define i64 @lshr_i64_2(i64 %arg1) {
+ %1 = lshr i64 %arg1, 3
+ ret i64 %1
+}
+
+define i64 @lshr_i64_3(i64 %arg1, i32 %shift) {
+ %1 = zext i32 %shift to i64
+ %2 = lshr i64 %arg1, %1
+ ret i64 %2
+}
+
+;; i64 shift right arithmetic (shift 1s from the right)
+
+define i64 @ashr_i64_1(i64 %arg) {
+ %1 = ashr i64 %arg, 9
+ ret i64 %1
+}
+
+define i64 @ashr_i64_2(i64 %arg) {
+ %1 = ashr i64 %arg, 3
+ ret i64 %1
+}
+
+define i64 @ashr_i64_3(i64 %arg1, i32 %shift) {
+ %1 = zext i32 %shift to i64
+ %2 = ashr i64 %arg1, %1
+ ret i64 %2
+}
+
+define i32 @hi32_i64(i64 %arg) {
+ %1 = lshr i64 %arg, 32
+ %2 = trunc i64 %1 to i32
+ ret i32 %2
+}
diff --git a/test/CodeGen/CellSPU/sp_farith.ll b/test/CodeGen/CellSPU/sp_farith.ll
new file mode 100644
index 0000000..80bf47c
--- /dev/null
+++ b/test/CodeGen/CellSPU/sp_farith.ll
@@ -0,0 +1,90 @@
+; RUN: llc < %s -march=cellspu -enable-unsafe-fp-math > %t1.s
+; RUN: grep fa %t1.s | count 2
+; RUN: grep fs %t1.s | count 2
+; RUN: grep fm %t1.s | count 6
+; RUN: grep fma %t1.s | count 2
+; RUN: grep fms %t1.s | count 2
+; RUN: grep fnms %t1.s | count 3
+;
+; This file includes standard floating point arithmetic instructions
+; NOTE fdiv is tested separately since it is a compound operation
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define float @fp_add(float %arg1, float %arg2) {
+ %A = fadd float %arg1, %arg2 ; <float> [#uses=1]
+ ret float %A
+}
+
+define <4 x float> @fp_add_vec(<4 x float> %arg1, <4 x float> %arg2) {
+ %A = fadd <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %A
+}
+
+define float @fp_sub(float %arg1, float %arg2) {
+ %A = fsub float %arg1, %arg2 ; <float> [#uses=1]
+ ret float %A
+}
+
+define <4 x float> @fp_sub_vec(<4 x float> %arg1, <4 x float> %arg2) {
+ %A = fsub <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %A
+}
+
+define float @fp_mul(float %arg1, float %arg2) {
+ %A = fmul float %arg1, %arg2 ; <float> [#uses=1]
+ ret float %A
+}
+
+define <4 x float> @fp_mul_vec(<4 x float> %arg1, <4 x float> %arg2) {
+ %A = fmul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %A
+}
+
+define float @fp_mul_add(float %arg1, float %arg2, float %arg3) {
+ %A = fmul float %arg1, %arg2 ; <float> [#uses=1]
+ %B = fadd float %A, %arg3 ; <float> [#uses=1]
+ ret float %B
+}
+
+define <4 x float> @fp_mul_add_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
+ %A = fmul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
+ %B = fadd <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %B
+}
+
+define float @fp_mul_sub(float %arg1, float %arg2, float %arg3) {
+ %A = fmul float %arg1, %arg2 ; <float> [#uses=1]
+ %B = fsub float %A, %arg3 ; <float> [#uses=1]
+ ret float %B
+}
+
+define <4 x float> @fp_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
+ %A = fmul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
+ %B = fsub <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %B
+}
+
+; Test the straightforward way of getting fnms
+; c - a * b
+define float @fp_neg_mul_sub_1(float %arg1, float %arg2, float %arg3) {
+ %A = fmul float %arg1, %arg2
+ %B = fsub float %arg3, %A
+ ret float %B
+}
+
+; Test another way of getting fnms
+; - ( a *b -c ) = c - a * b
+define float @fp_neg_mul_sub_2(float %arg1, float %arg2, float %arg3) {
+ %A = fmul float %arg1, %arg2
+ %B = fsub float %A, %arg3
+ %C = fsub float -0.0, %B
+ ret float %C
+}
+
+define <4 x float> @fp_neg_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
+ %A = fmul <4 x float> %arg1, %arg2
+ %B = fsub <4 x float> %A, %arg3
+ %D = fsub <4 x float> < float -0.0, float -0.0, float -0.0, float -0.0 >, %B
+ ret <4 x float> %D
+}
diff --git a/test/CodeGen/CellSPU/stores.ll b/test/CodeGen/CellSPU/stores.ll
new file mode 100644
index 0000000..05f44f4
--- /dev/null
+++ b/test/CodeGen/CellSPU/stores.ll
@@ -0,0 +1,151 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep {stqd.*0(\$3)} %t1.s | count 4
+; RUN: grep {stqd.*16(\$3)} %t1.s | count 4
+; RUN: grep 16256 %t1.s | count 2
+; RUN: grep 16384 %t1.s | count 1
+; RUN: grep 771 %t1.s | count 4
+; RUN: grep 515 %t1.s | count 2
+; RUN: grep 1799 %t1.s | count 2
+; RUN: grep 1543 %t1.s | count 5
+; RUN: grep 1029 %t1.s | count 3
+; RUN: grep {shli.*, 4} %t1.s | count 4
+; RUN: grep stqx %t1.s | count 4
+; RUN: grep ilhu %t1.s | count 11
+; RUN: grep iohl %t1.s | count 8
+; RUN: grep shufb %t1.s | count 15
+; RUN: grep frds %t1.s | count 1
+
+; ModuleID = 'stores.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define void @store_v16i8_1(<16 x i8>* %a) nounwind {
+entry:
+ store <16 x i8> < i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1 >, <16 x i8>* %a
+ ret void
+}
+
+define void @store_v16i8_2(<16 x i8>* %a) nounwind {
+entry:
+ %arrayidx = getelementptr <16 x i8>* %a, i32 1
+ store <16 x i8> < i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2 >, <16 x i8>* %arrayidx
+ ret void
+}
+
+define void @store_v16i8_3(<16 x i8>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <16 x i8>* %a, i32 %i
+ store <16 x i8> < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 >, <16 x i8>* %arrayidx
+ ret void
+}
+
+define void @store_v8i16_1(<8 x i16>* %a) nounwind {
+entry:
+ store <8 x i16> < i16 1, i16 2, i16 1, i16 1, i16 1, i16 2, i16 1, i16 1 >, <8 x i16>* %a
+ ret void
+}
+
+define void @store_v8i16_2(<8 x i16>* %a) nounwind {
+entry:
+ %arrayidx = getelementptr <8 x i16>* %a, i16 1
+ store <8 x i16> < i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2 >, <8 x i16>* %arrayidx
+ ret void
+}
+
+define void @store_v8i16_3(<8 x i16>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <8 x i16>* %a, i32 %i
+ store <8 x i16> < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 >, <8 x i16>* %arrayidx
+ ret void
+}
+
+define void @store_v4i32_1(<4 x i32>* %a) nounwind {
+entry:
+ store <4 x i32> < i32 1, i32 2, i32 1, i32 1 >, <4 x i32>* %a
+ ret void
+}
+
+define void @store_v4i32_2(<4 x i32>* %a) nounwind {
+entry:
+ %arrayidx = getelementptr <4 x i32>* %a, i32 1
+ store <4 x i32> < i32 2, i32 2, i32 2, i32 2 >, <4 x i32>* %arrayidx
+ ret void
+}
+
+define void @store_v4i32_3(<4 x i32>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <4 x i32>* %a, i32 %i
+ store <4 x i32> < i32 1, i32 1, i32 1, i32 1 >, <4 x i32>* %arrayidx
+ ret void
+}
+
+define void @store_v4f32_1(<4 x float>* %a) nounwind {
+entry:
+ store <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x float>* %a
+ ret void
+}
+
+define void @store_v4f32_2(<4 x float>* %a) nounwind {
+entry:
+ %arrayidx = getelementptr <4 x float>* %a, i32 1
+ store <4 x float> < float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00 >, <4 x float>* %arrayidx
+ ret void
+}
+
+define void @store_v4f32_3(<4 x float>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <4 x float>* %a, i32 %i
+ store <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x float>* %arrayidx
+ ret void
+}
+
+; Test truncating stores:
+
+define zeroext i8 @tstore_i16_i8(i16 signext %val, i8* %dest) nounwind {
+entry:
+ %conv = trunc i16 %val to i8
+ store i8 %conv, i8* %dest
+ ret i8 %conv
+}
+
+define zeroext i8 @tstore_i32_i8(i32 %val, i8* %dest) nounwind {
+entry:
+ %conv = trunc i32 %val to i8
+ store i8 %conv, i8* %dest
+ ret i8 %conv
+}
+
+define signext i16 @tstore_i32_i16(i32 %val, i16* %dest) nounwind {
+entry:
+ %conv = trunc i32 %val to i16
+ store i16 %conv, i16* %dest
+ ret i16 %conv
+}
+
+define zeroext i8 @tstore_i64_i8(i64 %val, i8* %dest) nounwind {
+entry:
+ %conv = trunc i64 %val to i8
+ store i8 %conv, i8* %dest
+ ret i8 %conv
+}
+
+define signext i16 @tstore_i64_i16(i64 %val, i16* %dest) nounwind {
+entry:
+ %conv = trunc i64 %val to i16
+ store i16 %conv, i16* %dest
+ ret i16 %conv
+}
+
+define i32 @tstore_i64_i32(i64 %val, i32* %dest) nounwind {
+entry:
+ %conv = trunc i64 %val to i32
+ store i32 %conv, i32* %dest
+ ret i32 %conv
+}
+
+define float @tstore_f64_f32(double %val, float* %dest) nounwind {
+entry:
+ %conv = fptrunc double %val to float
+ store float %conv, float* %dest
+ ret float %conv
+}
diff --git a/test/CodeGen/CellSPU/struct_1.ll b/test/CodeGen/CellSPU/struct_1.ll
new file mode 100644
index 0000000..8ee7d93
--- /dev/null
+++ b/test/CodeGen/CellSPU/struct_1.ll
@@ -0,0 +1,144 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s
+; RUN: grep lqa %t1.s | count 5
+; RUN: grep lqd %t1.s | count 11
+; RUN: grep rotqbyi %t1.s | count 7
+; RUN: grep xshw %t1.s | count 1
+; RUN: grep andi %t1.s | count 5
+; RUN: grep cbd %t1.s | count 3
+; RUN: grep chd %t1.s | count 1
+; RUN: grep cwd %t1.s | count 3
+; RUN: grep shufb %t1.s | count 7
+; RUN: grep stqd %t1.s | count 7
+; RUN: grep iohl %t2.s | count 16
+; RUN: grep ilhu %t2.s | count 16
+; RUN: grep lqd %t2.s | count 16
+; RUN: grep rotqbyi %t2.s | count 7
+; RUN: grep xshw %t2.s | count 1
+; RUN: grep andi %t2.s | count 5
+; RUN: grep cbd %t2.s | count 3
+; RUN: grep chd %t2.s | count 1
+; RUN: grep cwd %t2.s | count 3
+; RUN: grep shufb %t2.s | count 7
+; RUN: grep stqd %t2.s | count 7
+
+; ModuleID = 'struct_1.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+; struct hackstate {
+; unsigned char c1; // offset 0 (rotate left by 13 bytes to byte 3)
+; unsigned char c2; // offset 1 (rotate left by 14 bytes to byte 3)
+; unsigned char c3; // offset 2 (rotate left by 15 bytes to byte 3)
+; int i1; // offset 4 (rotate left by 4 bytes to byte 0)
+; short s1; // offset 8 (rotate left by 6 bytes to byte 2)
+; int i2; // offset 12 [ignored]
+; unsigned char c4; // offset 16 [ignored]
+; unsigned char c5; // offset 17 [ignored]
+; unsigned char c6; // offset 18 (rotate left by 14 bytes to byte 3)
+; unsigned char c7; // offset 19 (no rotate, in preferred slot)
+; int i3; // offset 20 [ignored]
+; int i4; // offset 24 [ignored]
+; int i5; // offset 28 [ignored]
+; int i6; // offset 32 (no rotate, in preferred slot)
+; }
+%struct.hackstate = type { i8, i8, i8, i32, i16, i32, i8, i8, i8, i8, i32, i32, i32, i32 }
+
+; struct hackstate state = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
+@state = global %struct.hackstate zeroinitializer, align 16
+
+define i8 @get_hackstate_c1() zeroext nounwind {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16
+ ret i8 %tmp2
+}
+
+define i8 @get_hackstate_c2() zeroext nounwind {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16
+ ret i8 %tmp2
+}
+
+define i8 @get_hackstate_c3() zeroext nounwind {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16
+ ret i8 %tmp2
+}
+
+define i32 @get_hackstate_i1() nounwind {
+entry:
+ %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 16
+ ret i32 %tmp2
+}
+
+define i16 @get_hackstate_s1() signext nounwind {
+entry:
+ %tmp2 = load i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16
+ ret i16 %tmp2
+}
+
+define i8 @get_hackstate_c6() zeroext nounwind {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 8), align 16
+ ret i8 %tmp2
+}
+
+define i8 @get_hackstate_c7() zeroext nounwind {
+entry:
+ %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 9), align 16
+ ret i8 %tmp2
+}
+
+define i32 @get_hackstate_i3() nounwind {
+entry:
+ %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 10), align 16
+ ret i32 %tmp2
+}
+
+define i32 @get_hackstate_i6() nounwind {
+entry:
+ %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16
+ ret i32 %tmp2
+}
+
+define void @set_hackstate_c1(i8 zeroext %c) nounwind {
+entry:
+ store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16
+ ret void
+}
+
+define void @set_hackstate_c2(i8 zeroext %c) nounwind {
+entry:
+ store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16
+ ret void
+}
+
+define void @set_hackstate_c3(i8 zeroext %c) nounwind {
+entry:
+ store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16
+ ret void
+}
+
+define void @set_hackstate_i1(i32 %i) nounwind {
+entry:
+ store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 16
+ ret void
+}
+
+define void @set_hackstate_s1(i16 signext %s) nounwind {
+entry:
+ store i16 %s, i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16
+ ret void
+}
+
+define void @set_hackstate_i3(i32 %i) nounwind {
+entry:
+ store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 10), align 16
+ ret void
+}
+
+define void @set_hackstate_i6(i32 %i) nounwind {
+entry:
+ store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16
+ ret void
+}
diff --git a/test/CodeGen/CellSPU/trunc.ll b/test/CodeGen/CellSPU/trunc.ll
new file mode 100644
index 0000000..d161852
--- /dev/null
+++ b/test/CodeGen/CellSPU/trunc.ll
@@ -0,0 +1,94 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep shufb %t1.s | count 19
+; RUN: grep {ilhu.*1799} %t1.s | count 1
+; RUN: grep {ilhu.*771} %t1.s | count 2
+; RUN: grep {ilhu.*1543} %t1.s | count 1
+; RUN: grep {ilhu.*1029} %t1.s | count 1
+; RUN: grep {ilhu.*515} %t1.s | count 1
+; RUN: grep {ilhu.*3855} %t1.s | count 1
+; RUN: grep {ilhu.*3599} %t1.s | count 1
+; RUN: grep {ilhu.*3085} %t1.s | count 1
+; RUN: grep {iohl.*3855} %t1.s | count 1
+; RUN: grep {iohl.*3599} %t1.s | count 2
+; RUN: grep {iohl.*1543} %t1.s | count 2
+; RUN: grep {iohl.*771} %t1.s | count 2
+; RUN: grep {iohl.*515} %t1.s | count 1
+; RUN: grep {iohl.*1799} %t1.s | count 1
+; RUN: grep lqa %t1.s | count 1
+; RUN: grep cbd %t1.s | count 4
+; RUN: grep chd %t1.s | count 3
+; RUN: grep cwd %t1.s | count 1
+; RUN: grep cdd %t1.s | count 1
+
+; ModuleID = 'trunc.bc'
+target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128"
+target triple = "spu"
+
+define <16 x i8> @trunc_i128_i8(i128 %u, <16 x i8> %v) {
+entry:
+ %0 = trunc i128 %u to i8
+ %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 15
+ ret <16 x i8> %tmp1
+}
+
+define <8 x i16> @trunc_i128_i16(i128 %u, <8 x i16> %v) {
+entry:
+ %0 = trunc i128 %u to i16
+ %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 8
+ ret <8 x i16> %tmp1
+}
+
+define <4 x i32> @trunc_i128_i32(i128 %u, <4 x i32> %v) {
+entry:
+ %0 = trunc i128 %u to i32
+ %tmp1 = insertelement <4 x i32> %v, i32 %0, i32 2
+ ret <4 x i32> %tmp1
+}
+
+define <2 x i64> @trunc_i128_i64(i128 %u, <2 x i64> %v) {
+entry:
+ %0 = trunc i128 %u to i64
+ %tmp1 = insertelement <2 x i64> %v, i64 %0, i32 1
+ ret <2 x i64> %tmp1
+}
+
+define <16 x i8> @trunc_i64_i8(i64 %u, <16 x i8> %v) {
+entry:
+ %0 = trunc i64 %u to i8
+ %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 10
+ ret <16 x i8> %tmp1
+}
+
+define <8 x i16> @trunc_i64_i16(i64 %u, <8 x i16> %v) {
+entry:
+ %0 = trunc i64 %u to i16
+ %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 6
+ ret <8 x i16> %tmp1
+}
+
+define i32 @trunc_i64_i32(i64 %u) {
+entry:
+ %0 = trunc i64 %u to i32
+ ret i32 %0
+}
+
+define <16 x i8> @trunc_i32_i8(i32 %u, <16 x i8> %v) {
+entry:
+ %0 = trunc i32 %u to i8
+ %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 7
+ ret <16 x i8> %tmp1
+}
+
+define <8 x i16> @trunc_i32_i16(i32 %u, <8 x i16> %v) {
+entry:
+ %0 = trunc i32 %u to i16
+ %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 3
+ ret <8 x i16> %tmp1
+}
+
+define <16 x i8> @trunc_i16_i8(i16 %u, <16 x i8> %v) {
+entry:
+ %0 = trunc i16 %u to i8
+ %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 5
+ ret <16 x i8> %tmp1
+}
diff --git a/test/CodeGen/CellSPU/useful-harnesses/README.txt b/test/CodeGen/CellSPU/useful-harnesses/README.txt
new file mode 100644
index 0000000..d87b398
--- /dev/null
+++ b/test/CodeGen/CellSPU/useful-harnesses/README.txt
@@ -0,0 +1,5 @@
+This directory contains code that's not part of the DejaGNU test suite,
+but is generally useful as various test harnesses.
+
+vecoperations.c: Various vector operation sanity checks, e.g., shuffles,
+ 8-bit vector add and multiply.
diff --git a/test/CodeGen/CellSPU/useful-harnesses/i32operations.c b/test/CodeGen/CellSPU/useful-harnesses/i32operations.c
new file mode 100644
index 0000000..12fc30b
--- /dev/null
+++ b/test/CodeGen/CellSPU/useful-harnesses/i32operations.c
@@ -0,0 +1,69 @@
+#include <stdio.h>
+
+typedef unsigned int uint32_t;
+typedef int int32_t;
+
+const char *boolstring(int val) {
+ return val ? "true" : "false";
+}
+
+int i32_eq(int32_t a, int32_t b) {
+ return (a == b);
+}
+
+int i32_neq(int32_t a, int32_t b) {
+ return (a != b);
+}
+
+int32_t i32_eq_select(int32_t a, int32_t b, int32_t c, int32_t d) {
+ return ((a == b) ? c : d);
+}
+
+int32_t i32_neq_select(int32_t a, int32_t b, int32_t c, int32_t d) {
+ return ((a != b) ? c : d);
+}
+
+struct pred_s {
+ const char *name;
+ int (*predfunc)(int32_t, int32_t);
+ int (*selfunc)(int32_t, int32_t, int32_t, int32_t);
+};
+
+struct pred_s preds[] = {
+ { "eq", i32_eq, i32_eq_select },
+ { "neq", i32_neq, i32_neq_select }
+};
+
+int main(void) {
+ int i;
+ int32_t a = 1234567890;
+ int32_t b = 345678901;
+ int32_t c = 1234500000;
+ int32_t d = 10001;
+ int32_t e = 10000;
+
+ printf("a = %12d (0x%08x)\n", a, a);
+ printf("b = %12d (0x%08x)\n", b, b);
+ printf("c = %12d (0x%08x)\n", c, c);
+ printf("d = %12d (0x%08x)\n", d, d);
+ printf("e = %12d (0x%08x)\n", e, e);
+ printf("----------------------------------------\n");
+
+ for (i = 0; i < sizeof(preds)/sizeof(preds[0]); ++i) {
+ printf("a %s a = %s\n", preds[i].name, boolstring((*preds[i].predfunc)(a, a)));
+ printf("a %s a = %s\n", preds[i].name, boolstring((*preds[i].predfunc)(a, a)));
+ printf("a %s b = %s\n", preds[i].name, boolstring((*preds[i].predfunc)(a, b)));
+ printf("a %s c = %s\n", preds[i].name, boolstring((*preds[i].predfunc)(a, c)));
+ printf("d %s e = %s\n", preds[i].name, boolstring((*preds[i].predfunc)(d, e)));
+ printf("e %s e = %s\n", preds[i].name, boolstring((*preds[i].predfunc)(e, e)));
+
+ printf("a %s a ? c : d = %d\n", preds[i].name, (*preds[i].selfunc)(a, a, c, d));
+ printf("a %s a ? c : d == c (%s)\n", preds[i].name, boolstring((*preds[i].selfunc)(a, a, c, d) == c));
+ printf("a %s b ? c : d = %d\n", preds[i].name, (*preds[i].selfunc)(a, b, c, d));
+ printf("a %s b ? c : d == d (%s)\n", preds[i].name, boolstring((*preds[i].selfunc)(a, b, c, d) == d));
+
+ printf("----------------------------------------\n");
+ }
+
+ return 0;
+}
diff --git a/test/CodeGen/CellSPU/useful-harnesses/i64operations.c b/test/CodeGen/CellSPU/useful-harnesses/i64operations.c
new file mode 100644
index 0000000..b613bd8
--- /dev/null
+++ b/test/CodeGen/CellSPU/useful-harnesses/i64operations.c
@@ -0,0 +1,673 @@
+#include <stdio.h>
+#include "i64operations.h"
+
+int64_t tval_a = 1234567890003LL;
+int64_t tval_b = 2345678901235LL;
+int64_t tval_c = 1234567890001LL;
+int64_t tval_d = 10001LL;
+int64_t tval_e = 10000LL;
+uint64_t tval_f = 0xffffff0750135eb9;
+int64_t tval_g = -1;
+
+/* ~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~- */
+
+int
+i64_eq(int64_t a, int64_t b)
+{
+ return (a == b);
+}
+
+int
+i64_neq(int64_t a, int64_t b)
+{
+ return (a != b);
+}
+
+int
+i64_gt(int64_t a, int64_t b)
+{
+ return (a > b);
+}
+
+int
+i64_le(int64_t a, int64_t b)
+{
+ return (a <= b);
+}
+
+int
+i64_ge(int64_t a, int64_t b) {
+ return (a >= b);
+}
+
+int
+i64_lt(int64_t a, int64_t b) {
+ return (a < b);
+}
+
+int
+i64_uge(uint64_t a, uint64_t b)
+{
+ return (a >= b);
+}
+
+int
+i64_ult(uint64_t a, uint64_t b)
+{
+ return (a < b);
+}
+
+int
+i64_ugt(uint64_t a, uint64_t b)
+{
+ return (a > b);
+}
+
+int
+i64_ule(uint64_t a, uint64_t b)
+{
+ return (a <= b);
+}
+
+int64_t
+i64_eq_select(int64_t a, int64_t b, int64_t c, int64_t d)
+{
+ return ((a == b) ? c : d);
+}
+
+int64_t
+i64_neq_select(int64_t a, int64_t b, int64_t c, int64_t d)
+{
+ return ((a != b) ? c : d);
+}
+
+int64_t
+i64_gt_select(int64_t a, int64_t b, int64_t c, int64_t d) {
+ return ((a > b) ? c : d);
+}
+
+int64_t
+i64_le_select(int64_t a, int64_t b, int64_t c, int64_t d) {
+ return ((a <= b) ? c : d);
+}
+
+int64_t
+i64_ge_select(int64_t a, int64_t b, int64_t c, int64_t d) {
+ return ((a >= b) ? c : d);
+}
+
+int64_t
+i64_lt_select(int64_t a, int64_t b, int64_t c, int64_t d) {
+ return ((a < b) ? c : d);
+}
+
+uint64_t
+i64_ugt_select(uint64_t a, uint64_t b, uint64_t c, uint64_t d)
+{
+ return ((a > b) ? c : d);
+}
+
+uint64_t
+i64_ule_select(uint64_t a, uint64_t b, uint64_t c, uint64_t d)
+{
+ return ((a <= b) ? c : d);
+}
+
+uint64_t
+i64_uge_select(uint64_t a, uint64_t b, uint64_t c, uint64_t d) {
+ return ((a >= b) ? c : d);
+}
+
+uint64_t
+i64_ult_select(uint64_t a, uint64_t b, uint64_t c, uint64_t d) {
+ return ((a < b) ? c : d);
+}
+
+/* ~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~- */
+
+struct harness_int64_pred int64_tests_eq[] = {
+ {"a %s a", &tval_a, &tval_a, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"a %s b", &tval_a, &tval_b, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"a %s c", &tval_a, &tval_c, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"d %s e", &tval_d, &tval_e, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"e %s e", &tval_e, &tval_e, &tval_c, &tval_d, TRUE_VAL, &tval_c}
+};
+
+struct harness_int64_pred int64_tests_neq[] = {
+ {"a %s a", &tval_a, &tval_a, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"a %s b", &tval_a, &tval_b, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"a %s c", &tval_a, &tval_c, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"d %s e", &tval_d, &tval_e, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"e %s e", &tval_e, &tval_e, &tval_c, &tval_d, FALSE_VAL, &tval_d}
+};
+
+struct harness_int64_pred int64_tests_sgt[] = {
+ {"a %s a", &tval_a, &tval_a, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"a %s b", &tval_a, &tval_b, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"a %s c", &tval_a, &tval_c, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"d %s e", &tval_d, &tval_e, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"e %s e", &tval_e, &tval_e, &tval_c, &tval_d, FALSE_VAL, &tval_d}
+};
+
+struct harness_int64_pred int64_tests_sle[] = {
+ {"a %s a", &tval_a, &tval_a, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"a %s b", &tval_a, &tval_b, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"a %s c", &tval_a, &tval_c, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"d %s e", &tval_d, &tval_e, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"e %s e", &tval_e, &tval_e, &tval_c, &tval_d, TRUE_VAL, &tval_c}
+};
+
+struct harness_int64_pred int64_tests_sge[] = {
+ {"a %s a", &tval_a, &tval_a, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"a %s b", &tval_a, &tval_b, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"a %s c", &tval_a, &tval_c, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"d %s e", &tval_d, &tval_e, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"e %s e", &tval_e, &tval_e, &tval_c, &tval_d, TRUE_VAL, &tval_c}
+};
+
+struct harness_int64_pred int64_tests_slt[] = {
+ {"a %s a", &tval_a, &tval_a, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"a %s b", &tval_a, &tval_b, &tval_c, &tval_d, TRUE_VAL, &tval_c},
+ {"a %s c", &tval_a, &tval_c, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"d %s e", &tval_d, &tval_e, &tval_c, &tval_d, FALSE_VAL, &tval_d},
+ {"e %s e", &tval_e, &tval_e, &tval_c, &tval_d, FALSE_VAL, &tval_d}
+};
+
+struct int64_pred_s int64_preds[] = {
+ {"eq", i64_eq, i64_eq_select,
+ int64_tests_eq, ARR_SIZE(int64_tests_eq)},
+ {"neq", i64_neq, i64_neq_select,
+ int64_tests_neq, ARR_SIZE(int64_tests_neq)},
+ {"gt", i64_gt, i64_gt_select,
+ int64_tests_sgt, ARR_SIZE(int64_tests_sgt)},
+ {"le", i64_le, i64_le_select,
+ int64_tests_sle, ARR_SIZE(int64_tests_sle)},
+ {"ge", i64_ge, i64_ge_select,
+ int64_tests_sge, ARR_SIZE(int64_tests_sge)},
+ {"lt", i64_lt, i64_lt_select,
+ int64_tests_slt, ARR_SIZE(int64_tests_slt)}
+};
+
+/* ~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~- */
+
+struct harness_uint64_pred uint64_tests_ugt[] = {
+ {"a %s a", (uint64_t *) &tval_a, (uint64_t *) &tval_a, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d},
+ {"a %s b", (uint64_t *) &tval_a, (uint64_t *) &tval_b, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d },
+ {"a %s c", (uint64_t *) &tval_a, (uint64_t *) &tval_c, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c },
+ {"d %s e", (uint64_t *) &tval_d, (uint64_t *) &tval_e, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c },
+ {"e %s e", (uint64_t *) &tval_e, (uint64_t *) &tval_e, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d }
+};
+
+struct harness_uint64_pred uint64_tests_ule[] = {
+ {"a %s a", (uint64_t *) &tval_a, (uint64_t *) &tval_a, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c},
+ {"a %s b", (uint64_t *) &tval_a, (uint64_t *) &tval_b, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c},
+ {"a %s c", (uint64_t *) &tval_a, (uint64_t *) &tval_c, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d},
+ {"d %s e", (uint64_t *) &tval_d, (uint64_t *) &tval_e, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d},
+ {"e %s e", (uint64_t *) &tval_e, (uint64_t *) &tval_e, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c}
+};
+
+struct harness_uint64_pred uint64_tests_uge[] = {
+ {"a %s a", (uint64_t *) &tval_a, (uint64_t *) &tval_a, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c},
+ {"a %s b", (uint64_t *) &tval_a, (uint64_t *) &tval_b, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d},
+ {"a %s c", (uint64_t *) &tval_a, (uint64_t *) &tval_c, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c},
+ {"d %s e", (uint64_t *) &tval_d, (uint64_t *) &tval_e, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c},
+ {"e %s e", (uint64_t *) &tval_e, (uint64_t *) &tval_e, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c}
+};
+
+struct harness_uint64_pred uint64_tests_ult[] = {
+ {"a %s a", (uint64_t *) &tval_a, (uint64_t *) &tval_a, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d},
+ {"a %s b", (uint64_t *) &tval_a, (uint64_t *) &tval_b, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, TRUE_VAL, (uint64_t *) &tval_c},
+ {"a %s c", (uint64_t *) &tval_a, (uint64_t *) &tval_c, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d},
+ {"d %s e", (uint64_t *) &tval_d, (uint64_t *) &tval_e, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d},
+ {"e %s e", (uint64_t *) &tval_e, (uint64_t *) &tval_e, (uint64_t *) &tval_c,
+ (uint64_t *) &tval_d, FALSE_VAL, (uint64_t *) &tval_d}
+};
+
+struct uint64_pred_s uint64_preds[] = {
+ {"ugt", i64_ugt, i64_ugt_select,
+ uint64_tests_ugt, ARR_SIZE(uint64_tests_ugt)},
+ {"ule", i64_ule, i64_ule_select,
+ uint64_tests_ule, ARR_SIZE(uint64_tests_ule)},
+ {"uge", i64_uge, i64_uge_select,
+ uint64_tests_uge, ARR_SIZE(uint64_tests_uge)},
+ {"ult", i64_ult, i64_ult_select,
+ uint64_tests_ult, ARR_SIZE(uint64_tests_ult)}
+};
+
+int
+compare_expect_int64(const struct int64_pred_s * pred)
+{
+ int j, failed = 0;
+
+ for (j = 0; j < pred->n_tests; ++j) {
+ int pred_result;
+
+ pred_result = (*pred->predfunc) (*pred->tests[j].lhs, *pred->tests[j].rhs);
+
+ if (pred_result != pred->tests[j].expected) {
+ char str[64];
+
+ sprintf(str, pred->tests[j].fmt_string, pred->name);
+ printf("%s: returned value is %d, expecting %d\n", str,
+ pred_result, pred->tests[j].expected);
+ printf(" lhs = %19lld (0x%016llx)\n", *pred->tests[j].lhs,
+ *pred->tests[j].lhs);
+ printf(" rhs = %19lld (0x%016llx)\n", *pred->tests[j].rhs,
+ *pred->tests[j].rhs);
+ ++failed;
+ } else {
+ int64_t selresult;
+
+ selresult = (pred->selfunc) (*pred->tests[j].lhs, *pred->tests[j].rhs,
+ *pred->tests[j].select_a,
+ *pred->tests[j].select_b);
+
+ if (selresult != *pred->tests[j].select_expected) {
+ char str[64];
+
+ sprintf(str, pred->tests[j].fmt_string, pred->name);
+ printf("%s select: returned value is %d, expecting %d\n", str,
+ pred_result, pred->tests[j].expected);
+ printf(" lhs = %19lld (0x%016llx)\n", *pred->tests[j].lhs,
+ *pred->tests[j].lhs);
+ printf(" rhs = %19lld (0x%016llx)\n", *pred->tests[j].rhs,
+ *pred->tests[j].rhs);
+ printf(" true = %19lld (0x%016llx)\n", *pred->tests[j].select_a,
+ *pred->tests[j].select_a);
+ printf(" false = %19lld (0x%016llx)\n", *pred->tests[j].select_b,
+ *pred->tests[j].select_b);
+ ++failed;
+ }
+ }
+ }
+
+ printf(" %d tests performed, should be %d.\n", j, pred->n_tests);
+
+ return failed;
+}
+
+int
+compare_expect_uint64(const struct uint64_pred_s * pred)
+{
+ int j, failed = 0;
+
+ for (j = 0; j < pred->n_tests; ++j) {
+ int pred_result;
+
+ pred_result = (*pred->predfunc) (*pred->tests[j].lhs, *pred->tests[j].rhs);
+ if (pred_result != pred->tests[j].expected) {
+ char str[64];
+
+ sprintf(str, pred->tests[j].fmt_string, pred->name);
+ printf("%s: returned value is %d, expecting %d\n", str,
+ pred_result, pred->tests[j].expected);
+ printf(" lhs = %19llu (0x%016llx)\n", *pred->tests[j].lhs,
+ *pred->tests[j].lhs);
+ printf(" rhs = %19llu (0x%016llx)\n", *pred->tests[j].rhs,
+ *pred->tests[j].rhs);
+ ++failed;
+ } else {
+ uint64_t selresult;
+
+ selresult = (pred->selfunc) (*pred->tests[j].lhs, *pred->tests[j].rhs,
+ *pred->tests[j].select_a,
+ *pred->tests[j].select_b);
+ if (selresult != *pred->tests[j].select_expected) {
+ char str[64];
+
+ sprintf(str, pred->tests[j].fmt_string, pred->name);
+ printf("%s select: returned value is %d, expecting %d\n", str,
+ pred_result, pred->tests[j].expected);
+ printf(" lhs = %19llu (0x%016llx)\n", *pred->tests[j].lhs,
+ *pred->tests[j].lhs);
+ printf(" rhs = %19llu (0x%016llx)\n", *pred->tests[j].rhs,
+ *pred->tests[j].rhs);
+ printf(" true = %19llu (0x%016llx)\n", *pred->tests[j].select_a,
+ *pred->tests[j].select_a);
+ printf(" false = %19llu (0x%016llx)\n", *pred->tests[j].select_b,
+ *pred->tests[j].select_b);
+ ++failed;
+ }
+ }
+ }
+
+ printf(" %d tests performed, should be %d.\n", j, pred->n_tests);
+
+ return failed;
+}
+
+/* ~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~- */
+
+int
+test_i64_sext_i32(int in, int64_t expected) {
+ int64_t result = (int64_t) in;
+
+ if (result != expected) {
+ char str[64];
+ sprintf(str, "i64_sext_i32(%d) returns %lld\n", in, result);
+ return 1;
+ }
+
+ return 0;
+}
+
+int
+test_i64_sext_i16(short in, int64_t expected) {
+ int64_t result = (int64_t) in;
+
+ if (result != expected) {
+ char str[64];
+ sprintf(str, "i64_sext_i16(%hd) returns %lld\n", in, result);
+ return 1;
+ }
+
+ return 0;
+}
+
+int
+test_i64_sext_i8(signed char in, int64_t expected) {
+ int64_t result = (int64_t) in;
+
+ if (result != expected) {
+ char str[64];
+ sprintf(str, "i64_sext_i8(%d) returns %lld\n", in, result);
+ return 1;
+ }
+
+ return 0;
+}
+
+int
+test_i64_zext_i32(unsigned int in, uint64_t expected) {
+ uint64_t result = (uint64_t) in;
+
+ if (result != expected) {
+ char str[64];
+ sprintf(str, "i64_zext_i32(%u) returns %llu\n", in, result);
+ return 1;
+ }
+
+ return 0;
+}
+
+int
+test_i64_zext_i16(unsigned short in, uint64_t expected) {
+ uint64_t result = (uint64_t) in;
+
+ if (result != expected) {
+ char str[64];
+ sprintf(str, "i64_zext_i16(%hu) returns %llu\n", in, result);
+ return 1;
+ }
+
+ return 0;
+}
+
+int
+test_i64_zext_i8(unsigned char in, uint64_t expected) {
+ uint64_t result = (uint64_t) in;
+
+ if (result != expected) {
+ char str[64];
+ sprintf(str, "i64_zext_i8(%u) returns %llu\n", in, result);
+ return 1;
+ }
+
+ return 0;
+}
+
+/* ~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~- */
+
+int64_t
+i64_shl_const(int64_t a) {
+ return a << 10;
+}
+
+int64_t
+i64_shl(int64_t a, int amt) {
+ return a << amt;
+}
+
+uint64_t
+u64_shl_const(uint64_t a) {
+ return a << 10;
+}
+
+uint64_t
+u64_shl(uint64_t a, int amt) {
+ return a << amt;
+}
+
+int64_t
+i64_srl_const(int64_t a) {
+ return a >> 10;
+}
+
+int64_t
+i64_srl(int64_t a, int amt) {
+ return a >> amt;
+}
+
+uint64_t
+u64_srl_const(uint64_t a) {
+ return a >> 10;
+}
+
+uint64_t
+u64_srl(uint64_t a, int amt) {
+ return a >> amt;
+}
+
+int64_t
+i64_sra_const(int64_t a) {
+ return a >> 10;
+}
+
+int64_t
+i64_sra(int64_t a, int amt) {
+ return a >> amt;
+}
+
+uint64_t
+u64_sra_const(uint64_t a) {
+ return a >> 10;
+}
+
+uint64_t
+u64_sra(uint64_t a, int amt) {
+ return a >> amt;
+}
+
+int
+test_u64_constant_shift(const char *func_name, uint64_t (*func)(uint64_t), uint64_t a, uint64_t expected) {
+ uint64_t result = (*func)(a);
+
+ if (result != expected) {
+ printf("%s(0x%016llx) returns 0x%016llx, expected 0x%016llx\n", func_name, a, result, expected);
+ return 1;
+ }
+
+ return 0;
+}
+
+int
+test_i64_constant_shift(const char *func_name, int64_t (*func)(int64_t), int64_t a, int64_t expected) {
+ int64_t result = (*func)(a);
+
+ if (result != expected) {
+ printf("%s(0x%016llx) returns 0x%016llx, expected 0x%016llx\n", func_name, a, result, expected);
+ return 1;
+ }
+
+ return 0;
+}
+
+int
+test_u64_variable_shift(const char *func_name, uint64_t (*func)(uint64_t, int), uint64_t a, unsigned int b, uint64_t expected) {
+ uint64_t result = (*func)(a, b);
+
+ if (result != expected) {
+ printf("%s(0x%016llx, %d) returns 0x%016llx, expected 0x%016llx\n", func_name, a, b, result, expected);
+ return 1;
+ }
+
+ return 0;
+}
+
+int
+test_i64_variable_shift(const char *func_name, int64_t (*func)(int64_t, int), int64_t a, unsigned int b, int64_t expected) {
+ int64_t result = (*func)(a, b);
+
+ if (result != expected) {
+ printf("%s(0x%016llx, %d) returns 0x%016llx, expected 0x%016llx\n", func_name, a, b, result, expected);
+ return 1;
+ }
+
+ return 0;
+}
+
+/* ~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~- */
+
+int64_t i64_mul(int64_t a, int64_t b) {
+ return a * b;
+}
+
+/* ~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~- */
+
+int
+main(void)
+{
+ int i, j, failed = 0;
+ const char *something_failed = " %d tests failed.\n";
+ const char *all_tests_passed = " All tests passed.\n";
+
+ printf("tval_a = %20lld (0x%016llx)\n", tval_a, tval_a);
+ printf("tval_b = %20lld (0x%016llx)\n", tval_b, tval_b);
+ printf("tval_c = %20lld (0x%016llx)\n", tval_c, tval_c);
+ printf("tval_d = %20lld (0x%016llx)\n", tval_d, tval_d);
+ printf("tval_e = %20lld (0x%016llx)\n", tval_e, tval_e);
+ printf("tval_f = %20llu (0x%016llx)\n", tval_f, tval_f);
+ printf("tval_g = %20llu (0x%016llx)\n", tval_g, tval_g);
+ printf("----------------------------------------\n");
+
+ for (i = 0; i < ARR_SIZE(int64_preds); ++i) {
+ printf("%s series:\n", int64_preds[i].name);
+ if ((failed = compare_expect_int64(int64_preds + i)) > 0) {
+ printf(something_failed, failed);
+ } else {
+ printf(all_tests_passed);
+ }
+
+ printf("----------------------------------------\n");
+ }
+
+ for (i = 0; i < ARR_SIZE(uint64_preds); ++i) {
+ printf("%s series:\n", uint64_preds[i].name);
+ if ((failed = compare_expect_uint64(uint64_preds + i)) > 0) {
+ printf(something_failed, failed);
+ } else {
+ printf(all_tests_passed);
+ }
+
+ printf("----------------------------------------\n");
+ }
+
+ /*----------------------------------------------------------------------*/
+
+ puts("signed/zero-extend tests:");
+
+ failed = 0;
+ failed += test_i64_sext_i32(-1, -1LL);
+ failed += test_i64_sext_i32(10, 10LL);
+ failed += test_i64_sext_i32(0x7fffffff, 0x7fffffffLL);
+ failed += test_i64_sext_i16(-1, -1LL);
+ failed += test_i64_sext_i16(10, 10LL);
+ failed += test_i64_sext_i16(0x7fff, 0x7fffLL);
+ failed += test_i64_sext_i8(-1, -1LL);
+ failed += test_i64_sext_i8(10, 10LL);
+ failed += test_i64_sext_i8(0x7f, 0x7fLL);
+
+ failed += test_i64_zext_i32(0xffffffff, 0x00000000ffffffffLLU);
+ failed += test_i64_zext_i32(0x01234567, 0x0000000001234567LLU);
+ failed += test_i64_zext_i16(0xffff, 0x000000000000ffffLLU);
+ failed += test_i64_zext_i16(0x569a, 0x000000000000569aLLU);
+ failed += test_i64_zext_i8(0xff, 0x00000000000000ffLLU);
+ failed += test_i64_zext_i8(0xa0, 0x00000000000000a0LLU);
+
+ if (failed > 0) {
+ printf(" %d tests failed.\n", failed);
+ } else {
+ printf(" All tests passed.\n");
+ }
+
+ printf("----------------------------------------\n");
+
+ failed = 0;
+ puts("signed left/right shift tests:");
+ failed += test_i64_constant_shift("i64_shl_const", i64_shl_const, tval_a, 0x00047dc7ec114c00LL);
+ failed += test_i64_variable_shift("i64_shl", i64_shl, tval_a, 10, 0x00047dc7ec114c00LL);
+ failed += test_i64_constant_shift("i64_srl_const", i64_srl_const, tval_a, 0x0000000047dc7ec1LL);
+ failed += test_i64_variable_shift("i64_srl", i64_srl, tval_a, 10, 0x0000000047dc7ec1LL);
+ failed += test_i64_constant_shift("i64_sra_const", i64_sra_const, tval_a, 0x0000000047dc7ec1LL);
+ failed += test_i64_variable_shift("i64_sra", i64_sra, tval_a, 10, 0x0000000047dc7ec1LL);
+
+ if (failed > 0) {
+ printf(" %d tests ailed.\n", failed);
+ } else {
+ printf(" All tests passed.\n");
+ }
+
+ printf("----------------------------------------\n");
+
+ failed = 0;
+ puts("unsigned left/right shift tests:");
+ failed += test_u64_constant_shift("u64_shl_const", u64_shl_const, tval_f, 0xfffc1d404d7ae400LL);
+ failed += test_u64_variable_shift("u64_shl", u64_shl, tval_f, 10, 0xfffc1d404d7ae400LL);
+ failed += test_u64_constant_shift("u64_srl_const", u64_srl_const, tval_f, 0x003fffffc1d404d7LL);
+ failed += test_u64_variable_shift("u64_srl", u64_srl, tval_f, 10, 0x003fffffc1d404d7LL);
+ failed += test_i64_constant_shift("i64_sra_const", i64_sra_const, tval_f, 0xffffffffc1d404d7LL);
+ failed += test_i64_variable_shift("i64_sra", i64_sra, tval_f, 10, 0xffffffffc1d404d7LL);
+ failed += test_u64_constant_shift("u64_sra_const", u64_sra_const, tval_f, 0x003fffffc1d404d7LL);
+ failed += test_u64_variable_shift("u64_sra", u64_sra, tval_f, 10, 0x003fffffc1d404d7LL);
+
+ if (failed > 0) {
+ printf(" %d tests ailed.\n", failed);
+ } else {
+ printf(" All tests passed.\n");
+ }
+
+ printf("----------------------------------------\n");
+
+ int64_t result;
+
+ result = i64_mul(tval_g, tval_g);
+ printf("%20lld * %20lld = %20lld (0x%016llx)\n", tval_g, tval_g, result, result);
+ result = i64_mul(tval_d, tval_e);
+ printf("%20lld * %20lld = %20lld (0x%016llx)\n", tval_d, tval_e, result, result);
+ /* 0xba7a664f13077c9 */
+ result = i64_mul(tval_a, tval_b);
+ printf("%20lld * %20lld = %20lld (0x%016llx)\n", tval_a, tval_b, result, result);
+
+ printf("----------------------------------------\n");
+
+ return 0;
+}
diff --git a/test/CodeGen/CellSPU/useful-harnesses/i64operations.h b/test/CodeGen/CellSPU/useful-harnesses/i64operations.h
new file mode 100644
index 0000000..7a02794
--- /dev/null
+++ b/test/CodeGen/CellSPU/useful-harnesses/i64operations.h
@@ -0,0 +1,43 @@
+#define TRUE_VAL (!0)
+#define FALSE_VAL 0
+#define ARR_SIZE(arr) (sizeof(arr)/sizeof(arr[0]))
+
+typedef unsigned long long int uint64_t;
+typedef long long int int64_t;
+
+/* ~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~- */
+struct harness_int64_pred {
+ const char *fmt_string;
+ int64_t *lhs;
+ int64_t *rhs;
+ int64_t *select_a;
+ int64_t *select_b;
+ int expected;
+ int64_t *select_expected;
+};
+
+struct harness_uint64_pred {
+ const char *fmt_string;
+ uint64_t *lhs;
+ uint64_t *rhs;
+ uint64_t *select_a;
+ uint64_t *select_b;
+ int expected;
+ uint64_t *select_expected;
+};
+
+struct int64_pred_s {
+ const char *name;
+ int (*predfunc) (int64_t, int64_t);
+ int64_t (*selfunc) (int64_t, int64_t, int64_t, int64_t);
+ struct harness_int64_pred *tests;
+ int n_tests;
+};
+
+struct uint64_pred_s {
+ const char *name;
+ int (*predfunc) (uint64_t, uint64_t);
+ uint64_t (*selfunc) (uint64_t, uint64_t, uint64_t, uint64_t);
+ struct harness_uint64_pred *tests;
+ int n_tests;
+};
diff --git a/test/CodeGen/CellSPU/useful-harnesses/lit.local.cfg b/test/CodeGen/CellSPU/useful-harnesses/lit.local.cfg
new file mode 100644
index 0000000..e6f55ee
--- /dev/null
+++ b/test/CodeGen/CellSPU/useful-harnesses/lit.local.cfg
@@ -0,0 +1 @@
+config.suffixes = []
diff --git a/test/CodeGen/CellSPU/useful-harnesses/vecoperations.c b/test/CodeGen/CellSPU/useful-harnesses/vecoperations.c
new file mode 100644
index 0000000..c4c86e3
--- /dev/null
+++ b/test/CodeGen/CellSPU/useful-harnesses/vecoperations.c
@@ -0,0 +1,179 @@
+#include <stdio.h>
+
+typedef unsigned char v16i8 __attribute__((ext_vector_type(16)));
+typedef short v8i16 __attribute__((ext_vector_type(16)));
+typedef int v4i32 __attribute__((ext_vector_type(4)));
+typedef float v4f32 __attribute__((ext_vector_type(4)));
+typedef long long v2i64 __attribute__((ext_vector_type(2)));
+typedef double v2f64 __attribute__((ext_vector_type(2)));
+
+void print_v16i8(const char *str, const v16i8 v) {
+ union {
+ unsigned char elts[16];
+ v16i8 vec;
+ } tv;
+ tv.vec = v;
+ printf("%s = { %hhu, %hhu, %hhu, %hhu, %hhu, %hhu, %hhu, "
+ "%hhu, %hhu, %hhu, %hhu, %hhu, %hhu, %hhu, "
+ "%hhu, %hhu }\n",
+ str, tv.elts[0], tv.elts[1], tv.elts[2], tv.elts[3], tv.elts[4], tv.elts[5],
+ tv.elts[6], tv.elts[7], tv.elts[8], tv.elts[9], tv.elts[10], tv.elts[11],
+ tv.elts[12], tv.elts[13], tv.elts[14], tv.elts[15]);
+}
+
+void print_v16i8_hex(const char *str, const v16i8 v) {
+ union {
+ unsigned char elts[16];
+ v16i8 vec;
+ } tv;
+ tv.vec = v;
+ printf("%s = { 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, "
+ "0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, "
+ "0x%02hhx, 0x%02hhx }\n",
+ str, tv.elts[0], tv.elts[1], tv.elts[2], tv.elts[3], tv.elts[4], tv.elts[5],
+ tv.elts[6], tv.elts[7], tv.elts[8], tv.elts[9], tv.elts[10], tv.elts[11],
+ tv.elts[12], tv.elts[13], tv.elts[14], tv.elts[15]);
+}
+
+void print_v8i16_hex(const char *str, v8i16 v) {
+ union {
+ short elts[8];
+ v8i16 vec;
+ } tv;
+ tv.vec = v;
+ printf("%s = { 0x%04hx, 0x%04hx, 0x%04hx, 0x%04hx, 0x%04hx, "
+ "0x%04hx, 0x%04hx, 0x%04hx }\n",
+ str, tv.elts[0], tv.elts[1], tv.elts[2], tv.elts[3], tv.elts[4],
+ tv.elts[5], tv.elts[6], tv.elts[7]);
+}
+
+void print_v4i32(const char *str, v4i32 v) {
+ printf("%s = { %d, %d, %d, %d }\n", str, v.x, v.y, v.z, v.w);
+}
+
+void print_v4f32(const char *str, v4f32 v) {
+ printf("%s = { %f, %f, %f, %f }\n", str, v.x, v.y, v.z, v.w);
+}
+
+void print_v2i64(const char *str, v2i64 v) {
+ printf("%s = { %lld, %lld }\n", str, v.x, v.y);
+}
+
+void print_v2f64(const char *str, v2f64 v) {
+ printf("%s = { %g, %g }\n", str, v.x, v.y);
+}
+
+/*----------------------------------------------------------------------*/
+
+v16i8 v16i8_mpy(v16i8 v1, v16i8 v2) {
+ return v1 * v2;
+}
+
+v16i8 v16i8_add(v16i8 v1, v16i8 v2) {
+ return v1 + v2;
+}
+
+v4i32 v4i32_shuffle_1(v4i32 a) {
+ v4i32 c2 = a.yzwx;
+ return c2;
+}
+
+v4i32 v4i32_shuffle_2(v4i32 a) {
+ v4i32 c2 = a.zwxy;
+ return c2;
+}
+
+v4i32 v4i32_shuffle_3(v4i32 a) {
+ v4i32 c2 = a.wxyz;
+ return c2;
+}
+
+v4i32 v4i32_shuffle_4(v4i32 a) {
+ v4i32 c2 = a.xyzw;
+ return c2;
+}
+
+v4i32 v4i32_shuffle_5(v4i32 a) {
+ v4i32 c2 = a.xwzy;
+ return c2;
+}
+
+v4f32 v4f32_shuffle_1(v4f32 a) {
+ v4f32 c2 = a.yzwx;
+ return c2;
+}
+
+v4f32 v4f32_shuffle_2(v4f32 a) {
+ v4f32 c2 = a.zwxy;
+ return c2;
+}
+
+v4f32 v4f32_shuffle_3(v4f32 a) {
+ v4f32 c2 = a.wxyz;
+ return c2;
+}
+
+v4f32 v4f32_shuffle_4(v4f32 a) {
+ v4f32 c2 = a.xyzw;
+ return c2;
+}
+
+v4f32 v4f32_shuffle_5(v4f32 a) {
+ v4f32 c2 = a.xwzy;
+ return c2;
+}
+
+v2i64 v2i64_shuffle(v2i64 a) {
+ v2i64 c2 = a.yx;
+ return c2;
+}
+
+v2f64 v2f64_shuffle(v2f64 a) {
+ v2f64 c2 = a.yx;
+ return c2;
+}
+
+int main(void) {
+ v16i8 v00 = { 0xf4, 0xad, 0x01, 0xe9, 0x51, 0x78, 0xc1, 0x8a,
+ 0x94, 0x7c, 0x49, 0x6c, 0x21, 0x32, 0xb2, 0x04 };
+ v16i8 va0 = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10 };
+ v16i8 va1 = { 0x11, 0x83, 0x4b, 0x63, 0xff, 0x90, 0x32, 0xe5,
+ 0x5a, 0xaa, 0x20, 0x01, 0x0d, 0x15, 0x77, 0x05 };
+ v8i16 v01 = { 0x1a87, 0x0a14, 0x5014, 0xfff0,
+ 0xe194, 0x0184, 0x801e, 0x5940 };
+ v4i32 v1 = { 1, 2, 3, 4 };
+ v4f32 v2 = { 1.0, 2.0, 3.0, 4.0 };
+ v2i64 v3 = { 691043ll, 910301513ll };
+ v2f64 v4 = { 5.8e56, 9.103e-62 };
+
+ puts("---- vector tests start ----");
+
+ print_v16i8_hex("v00 ", v00);
+ print_v16i8_hex("va0 ", va0);
+ print_v16i8_hex("va1 ", va1);
+ print_v16i8_hex("va0 x va1 ", v16i8_mpy(va0, va1));
+ print_v16i8_hex("va0 + va1 ", v16i8_add(va0, va1));
+ print_v8i16_hex("v01 ", v01);
+
+ print_v4i32("v4i32_shuffle_1(1, 2, 3, 4)", v4i32_shuffle_1(v1));
+ print_v4i32("v4i32_shuffle_2(1, 2, 3, 4)", v4i32_shuffle_2(v1));
+ print_v4i32("v4i32_shuffle_3(1, 2, 3, 4)", v4i32_shuffle_3(v1));
+ print_v4i32("v4i32_shuffle_4(1, 2, 3, 4)", v4i32_shuffle_4(v1));
+ print_v4i32("v4i32_shuffle_5(1, 2, 3, 4)", v4i32_shuffle_5(v1));
+
+ print_v4f32("v4f32_shuffle_1(1, 2, 3, 4)", v4f32_shuffle_1(v2));
+ print_v4f32("v4f32_shuffle_2(1, 2, 3, 4)", v4f32_shuffle_2(v2));
+ print_v4f32("v4f32_shuffle_3(1, 2, 3, 4)", v4f32_shuffle_3(v2));
+ print_v4f32("v4f32_shuffle_4(1, 2, 3, 4)", v4f32_shuffle_4(v2));
+ print_v4f32("v4f32_shuffle_5(1, 2, 3, 4)", v4f32_shuffle_5(v2));
+
+ print_v2i64("v3 ", v3);
+ print_v2i64("v2i64_shuffle ", v2i64_shuffle(v3));
+ print_v2f64("v4 ", v4);
+ print_v2f64("v2f64_shuffle ", v2f64_shuffle(v4));
+
+ puts("---- vector tests end ----");
+
+ return 0;
+}
diff --git a/test/CodeGen/CellSPU/vec_const.ll b/test/CodeGen/CellSPU/vec_const.ll
new file mode 100644
index 0000000..24c05c6
--- /dev/null
+++ b/test/CodeGen/CellSPU/vec_const.ll
@@ -0,0 +1,154 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s
+; RUN: grep -w il %t1.s | count 3
+; RUN: grep ilhu %t1.s | count 8
+; RUN: grep -w ilh %t1.s | count 5
+; RUN: grep iohl %t1.s | count 7
+; RUN: grep lqa %t1.s | count 6
+; RUN: grep 24672 %t1.s | count 2
+; RUN: grep 16429 %t1.s | count 1
+; RUN: grep 63572 %t1.s | count 1
+; RUN: grep 4660 %t1.s | count 1
+; RUN: grep 22136 %t1.s | count 1
+; RUN: grep 43981 %t1.s | count 1
+; RUN: grep 61202 %t1.s | count 1
+; RUN: grep 16393 %t1.s | count 1
+; RUN: grep 8699 %t1.s | count 1
+; RUN: grep 21572 %t1.s | count 1
+; RUN: grep 11544 %t1.s | count 1
+; RUN: grep 1311768467750121234 %t1.s | count 1
+; RUN: grep lqd %t2.s | count 6
+
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128"
+target triple = "spu-unknown-elf"
+
+; Vector constant load tests:
+
+; IL <reg>, 2
+define <4 x i32> @v4i32_constvec() {
+ ret <4 x i32> < i32 2, i32 2, i32 2, i32 2 >
+}
+
+; Spill to constant pool
+define <4 x i32> @v4i32_constpool() {
+ ret <4 x i32> < i32 2, i32 1, i32 1, i32 2 >
+}
+
+; Max negative range for IL
+define <4 x i32> @v4i32_constvec_2() {
+ ret <4 x i32> < i32 -32768, i32 -32768, i32 -32768, i32 -32768 >
+}
+
+; ILHU <reg>, 73 (0x49)
+; 4784128 = 0x490000
+define <4 x i32> @v4i32_constvec_3() {
+ ret <4 x i32> < i32 4784128, i32 4784128,
+ i32 4784128, i32 4784128 >
+}
+
+; ILHU <reg>, 61 (0x3d)
+; IOHL <reg>, 15395 (0x3c23)
+define <4 x i32> @v4i32_constvec_4() {
+ ret <4 x i32> < i32 4013091, i32 4013091,
+ i32 4013091, i32 4013091 >
+}
+
+; ILHU <reg>, 0x5050 (20560)
+; IOHL <reg>, 0x5050 (20560)
+; Tests for whether we expand the size of the bit pattern properly, because
+; this could be interpreted as an i8 pattern (0x50)
+define <4 x i32> @v4i32_constvec_5() {
+ ret <4 x i32> < i32 1347440720, i32 1347440720,
+ i32 1347440720, i32 1347440720 >
+}
+
+; ILH
+define <8 x i16> @v8i16_constvec_1() {
+ ret <8 x i16> < i16 32767, i16 32767, i16 32767, i16 32767,
+ i16 32767, i16 32767, i16 32767, i16 32767 >
+}
+
+; ILH
+define <8 x i16> @v8i16_constvec_2() {
+ ret <8 x i16> < i16 511, i16 511, i16 511, i16 511, i16 511,
+ i16 511, i16 511, i16 511 >
+}
+
+; ILH
+define <8 x i16> @v8i16_constvec_3() {
+ ret <8 x i16> < i16 -512, i16 -512, i16 -512, i16 -512, i16 -512,
+ i16 -512, i16 -512, i16 -512 >
+}
+
+; ILH <reg>, 24672 (0x6060)
+; Tests whether we expand the size of the bit pattern properly, because
+; this could be interpreted as an i8 pattern (0x60)
+define <8 x i16> @v8i16_constvec_4() {
+ ret <8 x i16> < i16 24672, i16 24672, i16 24672, i16 24672, i16 24672,
+ i16 24672, i16 24672, i16 24672 >
+}
+
+; ILH <reg>, 24672 (0x6060)
+; Tests whether we expand the size of the bit pattern properly, because
+; this is an i8 pattern but has to be expanded out to i16 to load it
+; properly into the vector register.
+define <16 x i8> @v16i8_constvec_1() {
+ ret <16 x i8> < i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96,
+ i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96 >
+}
+
+define <4 x float> @v4f32_constvec_1() {
+entry:
+ ret <4 x float> < float 0x4005BF0A80000000,
+ float 0x4005BF0A80000000,
+ float 0x4005BF0A80000000,
+ float 0x4005BF0A80000000 >
+}
+
+define <4 x float> @v4f32_constvec_2() {
+entry:
+ ret <4 x float> < float 0.000000e+00,
+ float 0.000000e+00,
+ float 0.000000e+00,
+ float 0.000000e+00 >
+}
+
+
+define <4 x float> @v4f32_constvec_3() {
+entry:
+ ret <4 x float> < float 0x4005BF0A80000000,
+ float 0x3810000000000000,
+ float 0x47EFFFFFE0000000,
+ float 0x400921FB60000000 >
+}
+
+; 1311768467750121234 => 0x 12345678 abcdef12
+; HI32_hi: 4660
+; HI32_lo: 22136
+; LO32_hi: 43981
+; LO32_lo: 61202
+define <2 x i64> @i64_constvec_1() {
+entry:
+ ret <2 x i64> < i64 1311768467750121234,
+ i64 1311768467750121234 >
+}
+
+define <2 x i64> @i64_constvec_2() {
+entry:
+ ret <2 x i64> < i64 1, i64 1311768467750121234 >
+}
+
+define <2 x double> @f64_constvec_1() {
+entry:
+ ret <2 x double> < double 0x400921fb54442d18,
+ double 0xbff6a09e667f3bcd >
+}
+
+; 0x400921fb 54442d18 ->
+; (ILHU 0x4009 [16393]/IOHL 0x21fb [ 8699])
+; (ILHU 0x5444 [21572]/IOHL 0x2d18 [11544])
+define <2 x double> @f64_constvec_2() {
+entry:
+ ret <2 x double> < double 0x400921fb54442d18,
+ double 0x400921fb54442d18 >
+}
diff --git a/test/CodeGen/CellSPU/vecinsert.ll b/test/CodeGen/CellSPU/vecinsert.ll
new file mode 100644
index 0000000..9a00c1f
--- /dev/null
+++ b/test/CodeGen/CellSPU/vecinsert.ll
@@ -0,0 +1,120 @@
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep cbd %t1.s | count 5
+; RUN: grep chd %t1.s | count 5
+; RUN: grep cwd %t1.s | count 10
+; RUN: grep -w il %t1.s | count 5
+; RUN: grep -w ilh %t1.s | count 6
+; RUN: grep iohl %t1.s | count 1
+; RUN: grep ilhu %t1.s | count 4
+; RUN: grep shufb %t1.s | count 26
+; RUN: grep 17219 %t1.s | count 1
+; RUN: grep 22598 %t1.s | count 1
+; RUN: grep -- -39 %t1.s | count 1
+; RUN: grep 24 %t1.s | count 1
+; RUN: grep 1159 %t1.s | count 1
+; ModuleID = 'vecinsert.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128"
+target triple = "spu-unknown-elf"
+
+; 67 -> 0x43, as 8-bit vector constant load = 0x4343 (17219)0x4343
+define <16 x i8> @test_v16i8(<16 x i8> %P, i8 %x) {
+entry:
+ %tmp1 = insertelement <16 x i8> %P, i8 %x, i32 10
+ %tmp1.1 = insertelement <16 x i8> %tmp1, i8 67, i32 7
+ %tmp1.2 = insertelement <16 x i8> %tmp1.1, i8 %x, i32 15
+ ret <16 x i8> %tmp1.2
+}
+
+; 22598 -> 0x5846
+define <8 x i16> @test_v8i16(<8 x i16> %P, i16 %x) {
+entry:
+ %tmp1 = insertelement <8 x i16> %P, i16 %x, i32 5
+ %tmp1.1 = insertelement <8 x i16> %tmp1, i16 22598, i32 7
+ %tmp1.2 = insertelement <8 x i16> %tmp1.1, i16 %x, i32 2
+ ret <8 x i16> %tmp1.2
+}
+
+; 1574023 -> 0x180487 (ILHU 24/IOHL 1159)
+define <4 x i32> @test_v4i32_1(<4 x i32> %P, i32 %x) {
+entry:
+ %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2
+ %tmp1.1 = insertelement <4 x i32> %tmp1, i32 1574023, i32 1
+ %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3
+ ret <4 x i32> %tmp1.2
+}
+
+; Should generate IL for the load
+define <4 x i32> @test_v4i32_2(<4 x i32> %P, i32 %x) {
+entry:
+ %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2
+ %tmp1.1 = insertelement <4 x i32> %tmp1, i32 -39, i32 1
+ %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3
+ ret <4 x i32> %tmp1.2
+}
+
+define void @variable_v16i8_1(<16 x i8>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <16 x i8>* %a, i32 %i
+ %tmp2 = load <16 x i8>* %arrayidx
+ %tmp3 = insertelement <16 x i8> %tmp2, i8 1, i32 1
+ %tmp8 = insertelement <16 x i8> %tmp3, i8 2, i32 11
+ store <16 x i8> %tmp8, <16 x i8>* %arrayidx
+ ret void
+}
+
+define void @variable_v8i16_1(<8 x i16>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <8 x i16>* %a, i32 %i
+ %tmp2 = load <8 x i16>* %arrayidx
+ %tmp3 = insertelement <8 x i16> %tmp2, i16 1, i32 1
+ %tmp8 = insertelement <8 x i16> %tmp3, i16 2, i32 6
+ store <8 x i16> %tmp8, <8 x i16>* %arrayidx
+ ret void
+}
+
+define void @variable_v4i32_1(<4 x i32>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <4 x i32>* %a, i32 %i
+ %tmp2 = load <4 x i32>* %arrayidx
+ %tmp3 = insertelement <4 x i32> %tmp2, i32 1, i32 1
+ %tmp8 = insertelement <4 x i32> %tmp3, i32 2, i32 2
+ store <4 x i32> %tmp8, <4 x i32>* %arrayidx
+ ret void
+}
+
+define void @variable_v4f32_1(<4 x float>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <4 x float>* %a, i32 %i
+ %tmp2 = load <4 x float>* %arrayidx
+ %tmp3 = insertelement <4 x float> %tmp2, float 1.000000e+00, i32 1
+ %tmp8 = insertelement <4 x float> %tmp3, float 2.000000e+00, i32 2
+ store <4 x float> %tmp8, <4 x float>* %arrayidx
+ ret void
+}
+
+define void @variable_v2i64_1(<2 x i64>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <2 x i64>* %a, i32 %i
+ %tmp2 = load <2 x i64>* %arrayidx
+ %tmp3 = insertelement <2 x i64> %tmp2, i64 615, i32 0
+ store <2 x i64> %tmp3, <2 x i64>* %arrayidx
+ ret void
+}
+
+define void @variable_v2i64_2(<2 x i64>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <2 x i64>* %a, i32 %i
+ %tmp2 = load <2 x i64>* %arrayidx
+ %tmp3 = insertelement <2 x i64> %tmp2, i64 615, i32 1
+ store <2 x i64> %tmp3, <2 x i64>* %arrayidx
+ ret void
+}
+
+define void @variable_v2f64_1(<2 x double>* %a, i32 %i) nounwind {
+entry:
+ %arrayidx = getelementptr <2 x double>* %a, i32 %i
+ %tmp2 = load <2 x double>* %arrayidx
+ %tmp3 = insertelement <2 x double> %tmp2, double 1.000000e+00, i32 1
+ store <2 x double> %tmp3, <2 x double>* %arrayidx
+ ret void
+}
diff --git a/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll b/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll
new file mode 100644
index 0000000..dd382cf
--- /dev/null
+++ b/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s
+
+; This caused the backend to assert out with:
+; SparcInstrInfo.cpp:103: failed assertion `0 && "Unexpected unsigned type"'
+;
+
+declare void @bar(i8*)
+
+define void @foo() {
+ %cast225 = inttoptr i64 123456 to i8* ; <i8*> [#uses=1]
+ call void @bar( i8* %cast225 )
+ ret void
+}
diff --git a/test/CodeGen/Generic/2002-04-16-StackFrameSizeAlignment.ll b/test/CodeGen/Generic/2002-04-16-StackFrameSizeAlignment.ll
new file mode 100644
index 0000000..751ed40
--- /dev/null
+++ b/test/CodeGen/Generic/2002-04-16-StackFrameSizeAlignment.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s
+
+; Compiling this file produces:
+; Sparc.cpp:91: failed assertion `(offset - OFFSET) % getStackFrameSizeAlignment() == 0'
+;
+declare i32 @SIM(i8*, i8*, i32, i32, i32, [256 x i32]*, i32, i32, i32)
+
+define void @foo() {
+bb0:
+ %V = alloca [256 x i32], i32 256 ; <[256 x i32]*> [#uses=1]
+ call i32 @SIM( i8* null, i8* null, i32 0, i32 0, i32 0, [256 x i32]* %V, i32 0, i32 0, i32 2 ) ; <i32>:0 [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2003-05-27-phifcmpd.ll b/test/CodeGen/Generic/2003-05-27-phifcmpd.ll
new file mode 100644
index 0000000..6fb1799
--- /dev/null
+++ b/test/CodeGen/Generic/2003-05-27-phifcmpd.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s
+
+define void @QRiterate(i32 %p.1, double %tmp.212) {
+entry:
+ %tmp.184 = icmp sgt i32 %p.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.184, label %shortcirc_next.1, label %shortcirc_done.1
+
+shortcirc_next.1: ; preds = %shortcirc_done.1, %entry
+ %tmp.213 = fcmp une double %tmp.212, 0.000000e+00 ; <i1> [#uses=1]
+ br label %shortcirc_done.1
+
+shortcirc_done.1: ; preds = %shortcirc_next.1, %entry
+ %val.1 = phi i1 [ false, %entry ], [ %tmp.213, %shortcirc_next.1 ] ; <i1> [#uses=1]
+ br i1 %val.1, label %shortcirc_next.1, label %exit.1
+
+exit.1: ; preds = %shortcirc_done.1
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2003-05-27-useboolinotherbb.ll b/test/CodeGen/Generic/2003-05-27-useboolinotherbb.ll
new file mode 100644
index 0000000..14bb000
--- /dev/null
+++ b/test/CodeGen/Generic/2003-05-27-useboolinotherbb.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s
+
+define void @QRiterate(double %tmp.212) {
+ %tmp.213 = fcmp une double %tmp.212, 0.000000e+00 ; <i1> [#uses=1]
+ br label %shortcirc_next.1
+
+shortcirc_next.1: ; preds = %shortcirc_next.1, %0
+ br i1 %tmp.213, label %shortcirc_next.1, label %exit.1
+
+exit.1: ; preds = %shortcirc_next.1
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2003-05-27-usefsubasbool.ll b/test/CodeGen/Generic/2003-05-27-usefsubasbool.ll
new file mode 100644
index 0000000..cc0eb5c
--- /dev/null
+++ b/test/CodeGen/Generic/2003-05-27-usefsubasbool.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s
+
+define void @QRiterate(double %tmp.212) {
+entry:
+ br label %shortcirc_next.1
+
+shortcirc_next.1: ; preds = %shortcirc_next.1, %entry
+ %tmp.213 = fcmp une double %tmp.212, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp.213, label %shortcirc_next.1, label %exit.1
+
+exit.1: ; preds = %shortcirc_next.1
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2003-05-28-ManyArgs.ll b/test/CodeGen/Generic/2003-05-28-ManyArgs.ll
new file mode 100644
index 0000000..c6fbdae
--- /dev/null
+++ b/test/CodeGen/Generic/2003-05-28-ManyArgs.ll
@@ -0,0 +1,153 @@
+; RUN: llc < %s
+
+;; Date: May 28, 2003.
+;; From: test/Programs/External/SPEC/CINT2000/175.vpr.llvm.bc
+;; Function: int %main(int %argc.1, sbyte** %argv.1)
+;;
+;; Error: A function call with about 56 arguments causes an assertion failure
+;; in llc because the register allocator cannot find a register
+;; not used explicitly by the call instruction.
+;;
+;; Cause: Regalloc was not keeping track of free registers correctly.
+;; It was counting the registers allocated to all outgoing arguments,
+;; even though most of those are copied to the stack (so those
+;; registers are not actually used by the call instruction).
+;;
+;; Fixed: By rewriting selection and allocation so that selection explicitly
+;; inserts all copy operations required for passing arguments and
+;; for the return value of a call, copying to/from registers
+;; and/or to stack locations as needed.
+;;
+ %struct..s_annealing_sched = type { i32, float, float, float, float }
+ %struct..s_chan = type { i32, float, float, float, float }
+ %struct..s_det_routing_arch = type { i32, float, float, float, i32, i32, i16, i16, i16, float, float }
+ %struct..s_placer_opts = type { i32, float, i32, i32, i8*, i32, i32 }
+ %struct..s_router_opts = type { float, float, float, float, float, i32, i32, i32, i32 }
+ %struct..s_segment_inf = type { float, i32, i16, i16, float, float, i32, float, float }
+ %struct..s_switch_inf = type { i32, float, float, float, float }
+
+define i32 @main(i32 %argc.1, i8** %argv.1) {
+entry:
+ %net_file = alloca [300 x i8] ; <[300 x i8]*> [#uses=1]
+ %place_file = alloca [300 x i8] ; <[300 x i8]*> [#uses=1]
+ %arch_file = alloca [300 x i8] ; <[300 x i8]*> [#uses=1]
+ %route_file = alloca [300 x i8] ; <[300 x i8]*> [#uses=1]
+ %full_stats = alloca i32 ; <i32*> [#uses=1]
+ %operation = alloca i32 ; <i32*> [#uses=1]
+ %verify_binary_search = alloca i32 ; <i32*> [#uses=1]
+ %show_graphics = alloca i32 ; <i32*> [#uses=1]
+ %annealing_sched = alloca %struct..s_annealing_sched ; <%struct..s_annealing_sched*> [#uses=5]
+ %placer_opts = alloca %struct..s_placer_opts ; <%struct..s_placer_opts*> [#uses=7]
+ %router_opts = alloca %struct..s_router_opts ; <%struct..s_router_opts*> [#uses=9]
+ %det_routing_arch = alloca %struct..s_det_routing_arch ; <%struct..s_det_routing_arch*> [#uses=11]
+ %segment_inf = alloca %struct..s_segment_inf* ; <%struct..s_segment_inf**> [#uses=1]
+ %timing_inf = alloca { i32, float, float, float, float, float, float, float, float, float, float } ; <{ i32, float, float, float, float, float, float, float, float, float, float }*> [#uses=11]
+ %tmp.101 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 4 ; <i8**> [#uses=1]
+ %tmp.105 = getelementptr [300 x i8]* %net_file, i64 0, i64 0 ; <i8*> [#uses=1]
+ %tmp.106 = getelementptr [300 x i8]* %arch_file, i64 0, i64 0 ; <i8*> [#uses=1]
+ %tmp.107 = getelementptr [300 x i8]* %place_file, i64 0, i64 0 ; <i8*> [#uses=1]
+ %tmp.108 = getelementptr [300 x i8]* %route_file, i64 0, i64 0 ; <i8*> [#uses=1]
+ %tmp.109 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 0 ; <i32*> [#uses=1]
+ %tmp.112 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 0 ; <i32*> [#uses=1]
+ %tmp.114 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 6 ; <i32*> [#uses=1]
+ %tmp.118 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 7 ; <i32*> [#uses=1]
+ %tmp.135 = load i32* %operation ; <i32> [#uses=1]
+ %tmp.137 = load i32* %tmp.112 ; <i32> [#uses=1]
+ %tmp.138 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 1 ; <float*> [#uses=1]
+ %tmp.139 = load float* %tmp.138 ; <float> [#uses=1]
+ %tmp.140 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 2 ; <i32*> [#uses=1]
+ %tmp.141 = load i32* %tmp.140 ; <i32> [#uses=1]
+ %tmp.142 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 3 ; <i32*> [#uses=1]
+ %tmp.143 = load i32* %tmp.142 ; <i32> [#uses=1]
+ %tmp.145 = load i8** %tmp.101 ; <i8*> [#uses=1]
+ %tmp.146 = getelementptr %struct..s_placer_opts* %placer_opts, i64 0, i32 5 ; <i32*> [#uses=1]
+ %tmp.147 = load i32* %tmp.146 ; <i32> [#uses=1]
+ %tmp.149 = load i32* %tmp.114 ; <i32> [#uses=1]
+ %tmp.154 = load i32* %full_stats ; <i32> [#uses=1]
+ %tmp.155 = load i32* %verify_binary_search ; <i32> [#uses=1]
+ %tmp.156 = getelementptr %struct..s_annealing_sched* %annealing_sched, i64 0, i32 0 ; <i32*> [#uses=1]
+ %tmp.157 = load i32* %tmp.156 ; <i32> [#uses=1]
+ %tmp.158 = getelementptr %struct..s_annealing_sched* %annealing_sched, i64 0, i32 1 ; <float*> [#uses=1]
+ %tmp.159 = load float* %tmp.158 ; <float> [#uses=1]
+ %tmp.160 = getelementptr %struct..s_annealing_sched* %annealing_sched, i64 0, i32 2 ; <float*> [#uses=1]
+ %tmp.161 = load float* %tmp.160 ; <float> [#uses=1]
+ %tmp.162 = getelementptr %struct..s_annealing_sched* %annealing_sched, i64 0, i32 3 ; <float*> [#uses=1]
+ %tmp.163 = load float* %tmp.162 ; <float> [#uses=1]
+ %tmp.164 = getelementptr %struct..s_annealing_sched* %annealing_sched, i64 0, i32 4 ; <float*> [#uses=1]
+ %tmp.165 = load float* %tmp.164 ; <float> [#uses=1]
+ %tmp.166 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 0 ; <float*> [#uses=1]
+ %tmp.167 = load float* %tmp.166 ; <float> [#uses=1]
+ %tmp.168 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 1 ; <float*> [#uses=1]
+ %tmp.169 = load float* %tmp.168 ; <float> [#uses=1]
+ %tmp.170 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 2 ; <float*> [#uses=1]
+ %tmp.171 = load float* %tmp.170 ; <float> [#uses=1]
+ %tmp.172 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 3 ; <float*> [#uses=1]
+ %tmp.173 = load float* %tmp.172 ; <float> [#uses=1]
+ %tmp.174 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 4 ; <float*> [#uses=1]
+ %tmp.175 = load float* %tmp.174 ; <float> [#uses=1]
+ %tmp.176 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 5 ; <i32*> [#uses=1]
+ %tmp.177 = load i32* %tmp.176 ; <i32> [#uses=1]
+ %tmp.178 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 6 ; <i32*> [#uses=1]
+ %tmp.179 = load i32* %tmp.178 ; <i32> [#uses=1]
+ %tmp.181 = load i32* %tmp.118 ; <i32> [#uses=1]
+ %tmp.182 = getelementptr %struct..s_router_opts* %router_opts, i64 0, i32 8 ; <i32*> [#uses=1]
+ %tmp.183 = load i32* %tmp.182 ; <i32> [#uses=1]
+ %tmp.184 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 0 ; <i32*> [#uses=1]
+ %tmp.185 = load i32* %tmp.184 ; <i32> [#uses=1]
+ %tmp.186 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 1 ; <float*> [#uses=1]
+ %tmp.187 = load float* %tmp.186 ; <float> [#uses=1]
+ %tmp.188 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 2 ; <float*> [#uses=1]
+ %tmp.189 = load float* %tmp.188 ; <float> [#uses=1]
+ %tmp.190 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 3 ; <float*> [#uses=1]
+ %tmp.191 = load float* %tmp.190 ; <float> [#uses=1]
+ %tmp.192 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 4 ; <i32*> [#uses=1]
+ %tmp.193 = load i32* %tmp.192 ; <i32> [#uses=1]
+ %tmp.194 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 5 ; <i32*> [#uses=1]
+ %tmp.195 = load i32* %tmp.194 ; <i32> [#uses=1]
+ %tmp.196 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 6 ; <i16*> [#uses=1]
+ %tmp.197 = load i16* %tmp.196 ; <i16> [#uses=1]
+ %tmp.198 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 7 ; <i16*> [#uses=1]
+ %tmp.199 = load i16* %tmp.198 ; <i16> [#uses=1]
+ %tmp.200 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 8 ; <i16*> [#uses=1]
+ %tmp.201 = load i16* %tmp.200 ; <i16> [#uses=1]
+ %tmp.202 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 9 ; <float*> [#uses=1]
+ %tmp.203 = load float* %tmp.202 ; <float> [#uses=1]
+ %tmp.204 = getelementptr %struct..s_det_routing_arch* %det_routing_arch, i64 0, i32 10 ; <float*> [#uses=1]
+ %tmp.205 = load float* %tmp.204 ; <float> [#uses=1]
+ %tmp.206 = load %struct..s_segment_inf** %segment_inf ; <%struct..s_segment_inf*> [#uses=1]
+ %tmp.208 = load i32* %tmp.109 ; <i32> [#uses=1]
+ %tmp.209 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 1 ; <float*> [#uses=1]
+ %tmp.210 = load float* %tmp.209 ; <float> [#uses=1]
+ %tmp.211 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 2 ; <float*> [#uses=1]
+ %tmp.212 = load float* %tmp.211 ; <float> [#uses=1]
+ %tmp.213 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 3 ; <float*> [#uses=1]
+ %tmp.214 = load float* %tmp.213 ; <float> [#uses=1]
+ %tmp.215 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 4 ; <float*> [#uses=1]
+ %tmp.216 = load float* %tmp.215 ; <float> [#uses=1]
+ %tmp.217 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 5 ; <float*> [#uses=1]
+ %tmp.218 = load float* %tmp.217 ; <float> [#uses=1]
+ %tmp.219 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 6 ; <float*> [#uses=1]
+ %tmp.220 = load float* %tmp.219 ; <float> [#uses=1]
+ %tmp.221 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 7 ; <float*> [#uses=1]
+ %tmp.222 = load float* %tmp.221 ; <float> [#uses=1]
+ %tmp.223 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 8 ; <float*> [#uses=1]
+ %tmp.224 = load float* %tmp.223 ; <float> [#uses=1]
+ %tmp.225 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 9 ; <float*> [#uses=1]
+ %tmp.226 = load float* %tmp.225 ; <float> [#uses=1]
+ %tmp.227 = getelementptr { i32, float, float, float, float, float, float, float, float, float, float }* %timing_inf, i64 0, i32 10 ; <float*> [#uses=1]
+ %tmp.228 = load float* %tmp.227 ; <float> [#uses=1]
+ call void @place_and_route( i32 %tmp.135, i32 %tmp.137, float %tmp.139, i32 %tmp.141, i32 %tmp.143, i8* %tmp.145, i32 %tmp.147, i32 %tmp.149, i8* %tmp.107, i8* %tmp.105, i8* %tmp.106, i8* %tmp.108, i32 %tmp.154, i32 %tmp.155, i32 %tmp.157, float %tmp.159, float %tmp.161, float %tmp.163, float %tmp.165, float %tmp.167, float %tmp.169, float %tmp.171, float %tmp.173, float %tmp.175, i32 %tmp.177, i32 %tmp.179, i32 %tmp.181, i32 %tmp.183, i32 %tmp.185, float %tmp.187, float %tmp.189, float %tmp.191, i32 %tmp.193, i32 %tmp.195, i16 %tmp.197, i16 %tmp.199, i16 %tmp.201, float %tmp.203, float %tmp.205, %struct..s_segment_inf* %tmp.206, i32 %tmp.208, float %tmp.210, float %tmp.212, float %tmp.214, float %tmp.216, float %tmp.218, float %tmp.220, float %tmp.222, float %tmp.224, float %tmp.226, float %tmp.228 )
+ %tmp.231 = load i32* %show_graphics ; <i32> [#uses=1]
+ %tmp.232 = icmp ne i32 %tmp.231, 0 ; <i1> [#uses=1]
+ br i1 %tmp.232, label %then.2, label %endif.2
+
+then.2: ; preds = %entry
+ br label %endif.2
+
+endif.2: ; preds = %then.2, %entry
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
+
+declare void @place_and_route(i32, i32, float, i32, i32, i8*, i32, i32, i8*, i8*, i8*, i8*, i32, i32, i32, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, float, float, float, i32, i32, i16, i16, i16, float, float, %struct..s_segment_inf*, i32, float, float, float, float, float, float, float, float, float, float)
diff --git a/test/CodeGen/Generic/2003-05-30-BadFoldGEP.ll b/test/CodeGen/Generic/2003-05-30-BadFoldGEP.ll
new file mode 100644
index 0000000..10d3a11
--- /dev/null
+++ b/test/CodeGen/Generic/2003-05-30-BadFoldGEP.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s
+
+;; Date: May 28, 2003.
+;; From: test/Programs/External/SPEC/CINT2000/254.gap.llvm.bc
+;; Function: int %OpenOutput(sbyte* %filename.1)
+;;
+;; Error: A sequence of GEPs is folded incorrectly by llc during selection
+;; causing an assertion about a dynamic casting error.
+;; This code sequence was produced (correctly) by preselection
+;; from a nested pair of ConstantExpr getelementptrs.
+;; The code below is the output of preselection.
+;; The original ConstantExprs are included in a comment.
+;;
+;; Cause: FoldGetElemChain() was inserting an extra leading 0 even though
+;; the first instruction in the sequence contributes no indices.
+;; The next instruction contributes a leading non-zero so another
+;; zero should not be added before it!
+;;
+ %FileType = type { i32, [256 x i8], i32, i32, i32, i32 }
+@OutputFiles = external global [16 x %FileType] ; <[16 x %FileType]*> [#uses=1]
+@Output = internal global %FileType* null ; <%FileType**> [#uses=1]
+
+define internal i32 @OpenOutput(i8* %filename.1) {
+entry:
+ %tmp.0 = load %FileType** @Output ; <%FileType*> [#uses=1]
+ %tmp.4 = getelementptr %FileType* %tmp.0, i64 1 ; <%FileType*> [#uses=1]
+ %addrOfGlobal = getelementptr [16 x %FileType]* @OutputFiles, i64 0 ; <[16 x %FileType]*> [#uses=1]
+ %constantGEP = getelementptr [16 x %FileType]* %addrOfGlobal, i64 1 ; <[16 x %FileType]*> [#uses=1]
+ %constantGEP.upgrd.1 = getelementptr [16 x %FileType]* %constantGEP, i64 0, i64 0 ; <%FileType*> [#uses=1]
+ %tmp.10 = icmp eq %FileType* %tmp.4, %constantGEP.upgrd.1 ; <i1> [#uses=1]
+ br i1 %tmp.10, label %return, label %endif.0
+
+endif.0: ; preds = %entry
+ ret i32 0
+
+return: ; preds = %entry
+ ret i32 1
+}
+
diff --git a/test/CodeGen/Generic/2003-05-30-BadPreselectPhi.ll b/test/CodeGen/Generic/2003-05-30-BadPreselectPhi.ll
new file mode 100644
index 0000000..f7c3e42
--- /dev/null
+++ b/test/CodeGen/Generic/2003-05-30-BadPreselectPhi.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s
+
+;; Date: May 28, 2003.
+;; From: test/Programs/SingleSource/richards_benchmark.c
+;; Function: struct task *handlerfn(struct packet *pkt)
+;;
+;; Error: PreSelection puts the arguments of the Phi just before
+;; the Phi instead of in predecessor blocks. This later
+;; causes llc to produces an invalid register <NULL VALUE>
+;; for the phi arguments.
+
+ %struct..packet = type { %struct..packet*, i32, i32, i32, [4 x i8] }
+ %struct..task = type { %struct..task*, i32, i32, %struct..packet*, i32, %struct..task* (%struct..packet*)*, i32, i32 }
+@v1 = external global i32 ; <i32*> [#uses=1]
+@v2 = external global i32 ; <i32*> [#uses=1]
+
+define %struct..task* @handlerfn(%struct..packet* %pkt.2) {
+entry:
+ %tmp.1 = icmp ne %struct..packet* %pkt.2, null ; <i1> [#uses=1]
+ br i1 %tmp.1, label %cond_false, label %cond_continue
+
+cond_false: ; preds = %entry
+ br label %cond_continue
+
+cond_continue: ; preds = %cond_false, %entry
+ %mem_tmp.0 = phi i32* [ @v2, %cond_false ], [ @v1, %entry ] ; <i32*> [#uses=1]
+ %tmp.12 = bitcast i32* %mem_tmp.0 to %struct..packet* ; <%struct..packet*> [#uses=1]
+ call void @append( %struct..packet* %pkt.2, %struct..packet* %tmp.12 )
+ ret %struct..task* null
+}
+
+declare void @append(%struct..packet*, %struct..packet*)
+
diff --git a/test/CodeGen/Generic/2003-07-06-BadIntCmp.ll b/test/CodeGen/Generic/2003-07-06-BadIntCmp.ll
new file mode 100644
index 0000000..1d1aad5
--- /dev/null
+++ b/test/CodeGen/Generic/2003-07-06-BadIntCmp.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s
+
+;; Date: May 28, 2003.
+;; From: test/Programs/MultiSource/Olden-perimeter/maketree.c
+;; Function: int CheckOutside(int x, int y)
+;;
+;; Note: The .ll code below for this regression test has identical
+;; behavior to the above function up to the error, but then prints
+;; true/false on the two branches.
+;;
+;; Error: llc generates a branch-on-xcc instead of branch-on-icc, which
+;; is wrong because the value being compared (int euclid = x*x + y*y)
+;; overflows, so that the 64-bit and 32-bit compares are not equal.
+
[email protected]_1 = internal constant [6 x i8] c"true\0A\00" ; <[6 x i8]*> [#uses=1]
[email protected]_2 = internal constant [7 x i8] c"false\0A\00" ; <[7 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define internal void @__main() {
+entry:
+ ret void
+}
+
+define internal void @CheckOutside(i32 %x.1, i32 %y.1) {
+entry:
+ %tmp.2 = mul i32 %x.1, %x.1 ; <i32> [#uses=1]
+ %tmp.5 = mul i32 %y.1, %y.1 ; <i32> [#uses=1]
+ %tmp.6 = add i32 %tmp.2, %tmp.5 ; <i32> [#uses=1]
+ %tmp.8 = icmp sle i32 %tmp.6, 4194304 ; <i1> [#uses=1]
+ br i1 %tmp.8, label %then, label %else
+
+then: ; preds = %entry
+ %tmp.11 = call i32 (i8*, ...)* @printf( i8* getelementptr ([6 x i8]* @.str_1, i64 0, i64 0) ) ; <i32> [#uses=0]
+ br label %UnifiedExitNode
+
+else: ; preds = %entry
+ %tmp.13 = call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @.str_2, i64 0, i64 0) ) ; <i32> [#uses=0]
+ br label %UnifiedExitNode
+
+UnifiedExitNode: ; preds = %else, %then
+ ret void
+}
+
+define i32 @main() {
+entry:
+ call void @__main( )
+ call void @CheckOutside( i32 2097152, i32 2097152 )
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/2003-07-07-BadLongConst.ll b/test/CodeGen/Generic/2003-07-07-BadLongConst.ll
new file mode 100644
index 0000000..64312ba
--- /dev/null
+++ b/test/CodeGen/Generic/2003-07-07-BadLongConst.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s
+
[email protected]_1 = internal constant [42 x i8] c" ui = %u (0x%x)\09\09UL-ui = %lld (0x%llx)\0A\00" ; <[42 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define internal i64 @getL() {
+entry:
+ ret i64 -5787213826675591005
+}
+
+define i32 @main(i32 %argc.1, i8** %argv.1) {
+entry:
+ %tmp.11 = call i64 @getL( ) ; <i64> [#uses=2]
+ %tmp.5 = trunc i64 %tmp.11 to i32 ; <i32> [#uses=2]
+ %tmp.23 = and i64 %tmp.11, -4294967296 ; <i64> [#uses=2]
+ %tmp.16 = call i32 (i8*, ...)* @printf( i8* getelementptr ([42 x i8]* @.str_1, i64 0, i64 0), i32 %tmp.5, i32 %tmp.5, i64 %tmp.23, i64 %tmp.23 ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/2003-07-08-BadCastToBool.ll b/test/CodeGen/Generic/2003-07-08-BadCastToBool.ll
new file mode 100644
index 0000000..8019caa
--- /dev/null
+++ b/test/CodeGen/Generic/2003-07-08-BadCastToBool.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s
+
+;; Date: Jul 8, 2003.
+;; From: test/Programs/MultiSource/Olden-perimeter
+;; Function: int %adj(uint %d.1, uint %ct.1)
+;;
+;; Errors: (1) cast-int-to-bool was being treated as a NOP (i.e., the int
+;; register was treated as effectively true if non-zero).
+;; This cannot be used for later boolean operations.
+;; (2) (A or NOT(B)) was being folded into A orn B, which is ok
+;; for bitwise operations but not booleans! For booleans,
+;; the result has to be compared with 0.
+
[email protected]_1 = internal constant [30 x i8] c"d = %d, ct = %d, d ^ ct = %d\0A\00"
+
+declare i32 @printf(i8*, ...)
+
+define i32 @adj(i32 %d.1, i32 %ct.1) {
+entry:
+ %tmp.19 = icmp eq i32 %ct.1, 2 ; <i1> [#uses=1]
+ %tmp.22.not = trunc i32 %ct.1 to i1 ; <i1> [#uses=1]
+ %tmp.221 = xor i1 %tmp.22.not, true ; <i1> [#uses=1]
+ %tmp.26 = or i1 %tmp.19, %tmp.221 ; <i1> [#uses=1]
+ %tmp.27 = zext i1 %tmp.26 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.27
+}
+
+define i32 @main() {
+entry:
+ %result = call i32 @adj( i32 3, i32 2 ) ; <i32> [#uses=1]
+ %tmp.0 = call i32 (i8*, ...)* @printf( i8* getelementptr ([30 x i8]* @.str_1, i64 0, i64 0), i32 3, i32 2, i32 %result ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/2003-07-29-BadConstSbyte.ll b/test/CodeGen/Generic/2003-07-29-BadConstSbyte.ll
new file mode 100644
index 0000000..4e6fe1cf
--- /dev/null
+++ b/test/CodeGen/Generic/2003-07-29-BadConstSbyte.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s
+
+;; Date: Jul 29, 2003.
+;; From: test/Programs/MultiSource/Ptrdist-bc
+;; Function: ---
+;; Global: %yy_ec = internal constant [256 x sbyte] ...
+;; A subset of this array is used in the test below.
+;;
+;; Error: Character '\07' was being emitted as '\a', at yy_ec[38].
+;; When loaded, this returned the value 97 ('a'), instead of 7.
+;;
+;; Incorrect LLC Output for the array yy_ec was:
+;; yy_ec_1094:
+;; .ascii "\000\001\001\001\001\001\001\001\001\002\003\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\002\004\005\001\001\006\a\001\b\t\n\v\f\r\016\017\020\020\020\020\020\020\020\020\020\020\001\021\022\023\024\001\001\025\025\025\025\025\025\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\026\027\030\031\032\001\033\034\035\036\037 !\"#$%&'()*+,-./$0$1$234\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001\001"
+;;
+
+@yy_ec = internal constant [6 x i8] c"\06\07\01\08\01\09" ; <[6 x i8]*> [#uses=1]
[email protected]_3 = internal constant [8 x i8] c"[%d] = \00" ; <[8 x i8]*> [#uses=1]
[email protected]_4 = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+entry:
+ br label %loopentry
+
+loopentry: ; preds = %loopentry, %entry
+ %i = phi i64 [ 0, %entry ], [ %inc.i, %loopentry ] ; <i64> [#uses=3]
+ %cptr = getelementptr [6 x i8]* @yy_ec, i64 0, i64 %i ; <i8*> [#uses=1]
+ %c = load i8* %cptr ; <i8> [#uses=1]
+ %ignore = call i32 (i8*, ...)* @printf( i8* getelementptr ([8 x i8]* @.str_3, i64 0, i64 0), i64 %i ) ; <i32> [#uses=0]
+ %ignore2 = call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @.str_4, i64 0, i64 0), i8 %c ) ; <i32> [#uses=0]
+ %inc.i = add i64 %i, 1 ; <i64> [#uses=2]
+ %done = icmp sle i64 %inc.i, 5 ; <i1> [#uses=1]
+ br i1 %done, label %loopentry, label %exit.1
+
+exit.1: ; preds = %loopentry
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll b/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll
new file mode 100644
index 0000000..393062a
--- /dev/null
+++ b/test/CodeGen/Generic/2004-02-08-UnwindSupport.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -enable-correct-eh-support
+
+define i32 @test() {
+ unwind
+}
+
+define i32 @main() {
+ %X = invoke i32 @test( )
+ to label %cont unwind label %EH ; <i32> [#uses=0]
+
+cont: ; preds = %0
+ ret i32 1
+
+EH: ; preds = %0
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/2004-05-09-LiveVarPartialRegister.ll b/test/CodeGen/Generic/2004-05-09-LiveVarPartialRegister.ll
new file mode 100644
index 0000000..d4a4cf8
--- /dev/null
+++ b/test/CodeGen/Generic/2004-05-09-LiveVarPartialRegister.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s
+@global_long_1 = linkonce global i64 7 ; <i64*> [#uses=1]
+@global_long_2 = linkonce global i64 49 ; <i64*> [#uses=1]
+
+define i32 @main() {
+ %l1 = load i64* @global_long_1 ; <i64> [#uses=1]
+ %l2 = load i64* @global_long_2 ; <i64> [#uses=1]
+ %cond = icmp sle i64 %l1, %l2 ; <i1> [#uses=1]
+ %cast2 = zext i1 %cond to i32 ; <i32> [#uses=1]
+ %RV = sub i32 1, %cast2 ; <i32> [#uses=1]
+ ret i32 %RV
+}
+
diff --git a/test/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll b/test/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll
new file mode 100644
index 0000000..7fd2361
--- /dev/null
+++ b/test/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s
+
+define void @intersect_pixel() {
+entry:
+ %tmp125 = fcmp uno double 0.000000e+00, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp126 = or i1 %tmp125, false ; <i1> [#uses=1]
+ %tmp126.not = xor i1 %tmp126, true ; <i1> [#uses=1]
+ %brmerge1 = or i1 %tmp126.not, false ; <i1> [#uses=1]
+ br i1 %brmerge1, label %bb154, label %cond_false133
+
+cond_false133: ; preds = %entry
+ ret void
+
+bb154: ; preds = %entry
+ %tmp164 = icmp eq i32 0, 0 ; <i1> [#uses=0]
+ ret void
+}
+
+declare i1 @llvm.isunordered.f64(double, double)
+
diff --git a/test/CodeGen/Generic/2005-04-09-GlobalInPHI.ll b/test/CodeGen/Generic/2005-04-09-GlobalInPHI.ll
new file mode 100644
index 0000000..353e411
--- /dev/null
+++ b/test/CodeGen/Generic/2005-04-09-GlobalInPHI.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s
+ %struct.TypHeader = type { i32, %struct.TypHeader**, [3 x i8], i8 }
[email protected]_67 = external global [4 x i8] ; <[4 x i8]*> [#uses=1]
[email protected]_87 = external global [17 x i8] ; <[17 x i8]*> [#uses=1]
+
+define void @PrBinop() {
+entry:
+ br i1 false, label %cond_true, label %else.0
+
+cond_true: ; preds = %entry
+ br label %else.0
+
+else.0: ; preds = %cond_true, %entry
+ %tmp.167.1 = phi i32 [ ptrtoint ([17 x i8]* @.str_87 to i32), %entry ], [ 0, %cond_true ] ; <i32> [#uses=0]
+ call void @Pr( i8* getelementptr ([4 x i8]* @.str_67, i32 0, i32 0), i32 0, i32 0 )
+ ret void
+}
+
+declare void @Pr(i8*, i32, i32)
+
diff --git a/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll b/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll
new file mode 100644
index 0000000..733202c
--- /dev/null
+++ b/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+; Test that llvm.memcpy works with a i64 length operand on all targets.
+
+declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
+
+define void @l12_l94_bc_divide_endif_2E_3_2E_ce() {
+newFuncRoot:
+ tail call void @llvm.memcpy.i64( i8* null, i8* null, i64 0, i32 1 )
+ unreachable
+}
+
diff --git a/test/CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll b/test/CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll
new file mode 100644
index 0000000..08060bf
--- /dev/null
+++ b/test/CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s
+
+define void @test() {
+ %X = alloca { } ; <{ }*> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/Generic/2005-10-21-longlonggtu.ll b/test/CodeGen/Generic/2005-10-21-longlonggtu.ll
new file mode 100644
index 0000000..53a9cd0f
--- /dev/null
+++ b/test/CodeGen/Generic/2005-10-21-longlonggtu.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s
+
+define float @t(i64 %u_arg) {
+ %u = bitcast i64 %u_arg to i64 ; <i64> [#uses=1]
+ %tmp5 = add i64 %u, 9007199254740991 ; <i64> [#uses=1]
+ %tmp = icmp ugt i64 %tmp5, 18014398509481982 ; <i1> [#uses=1]
+ br i1 %tmp, label %T, label %F
+
+T: ; preds = %0
+ ret float 1.000000e+00
+
+F: ; preds = %0
+ call float @t( i64 0 ) ; <float>:1 [#uses=0]
+ ret float 0.000000e+00
+}
+
diff --git a/test/CodeGen/Generic/2005-12-01-Crash.ll b/test/CodeGen/Generic/2005-12-01-Crash.ll
new file mode 100644
index 0000000..a9eedde
--- /dev/null
+++ b/test/CodeGen/Generic/2005-12-01-Crash.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s
+@str = external global [36 x i8] ; <[36 x i8]*> [#uses=0]
[email protected] = external global [29 x i8] ; <[29 x i8]*> [#uses=0]
+@str1 = external global [29 x i8] ; <[29 x i8]*> [#uses=0]
+@str2 = external global [29 x i8] ; <[29 x i8]*> [#uses=1]
[email protected] = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+@str3 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+@str4 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+@str5 = external global [2 x i8] ; <[2 x i8]*> [#uses=0]
+
+define void @printArgsNoRet(i32 %a1, float %a2, i8 %a3, double %a4, i8* %a5, i32 %a6, float %a7, i8 %a8, double %a9, i8* %a10, i32 %a11, float %a12, i8 %a13, double %a14, i8* %a15) {
+entry:
+ %tmp17 = sext i8 %a13 to i32 ; <i32> [#uses=1]
+ %tmp23 = call i32 (i8*, ...)* @printf( i8* getelementptr ([29 x i8]* @str2, i32 0, i64 0), i32 %a11, double 0.000000e+00, i32 %tmp17, double %a14, i32 0 ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
+
+declare i32 @main(i32, i8**)
diff --git a/test/CodeGen/Generic/2005-12-12-ExpandSextInreg.ll b/test/CodeGen/Generic/2005-12-12-ExpandSextInreg.ll
new file mode 100644
index 0000000..349540f
--- /dev/null
+++ b/test/CodeGen/Generic/2005-12-12-ExpandSextInreg.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s
+
+define i64 @test(i64 %A) {
+ %B = trunc i64 %A to i8 ; <i8> [#uses=1]
+ %C = sext i8 %B to i64 ; <i64> [#uses=1]
+ ret i64 %C
+}
diff --git a/test/CodeGen/Generic/2006-01-12-BadSetCCFold.ll b/test/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
new file mode 100644
index 0000000..42e8ed0
--- /dev/null
+++ b/test/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s
+; ModuleID = '2006-01-12-BadSetCCFold.ll'
+ %struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, i32, i32 }
+
+define void @main() {
+entry:
+ br i1 false, label %then.2.i, label %endif.2.i
+
+then.2.i: ; preds = %entry
+ br label %dealwithargs.exit
+
+endif.2.i: ; preds = %entry
+ br i1 false, label %then.3.i, label %dealwithargs.exit
+
+then.3.i: ; preds = %endif.2.i
+ br label %dealwithargs.exit
+
+dealwithargs.exit: ; preds = %then.3.i, %endif.2.i, %then.2.i
+ %n_nodes.4 = phi i32 [ 64, %then.3.i ], [ 64, %then.2.i ], [ 64, %endif.2.i ] ; <i32> [#uses=1]
+ %tmp.14.i1134.i.i = icmp sgt i32 %n_nodes.4, 1 ; <i1> [#uses=2]
+ br i1 %tmp.14.i1134.i.i, label %no_exit.i12.i.i, label %fill_table.exit22.i.i
+
+no_exit.i12.i.i: ; preds = %no_exit.i12.i.i, %dealwithargs.exit
+ br i1 false, label %fill_table.exit22.i.i, label %no_exit.i12.i.i
+
+fill_table.exit22.i.i: ; preds = %no_exit.i12.i.i, %dealwithargs.exit
+ %cur_node.0.i8.1.i.i = phi %struct.node_t* [ undef, %dealwithargs.exit ], [ null, %no_exit.i12.i.i ] ; <%struct.node_t*> [#uses=0]
+ br i1 %tmp.14.i1134.i.i, label %no_exit.i.preheader.i.i, label %make_tables.exit.i
+
+no_exit.i.preheader.i.i: ; preds = %fill_table.exit22.i.i
+ ret void
+
+make_tables.exit.i: ; preds = %fill_table.exit22.i.i
+ ret void
+}
diff --git a/test/CodeGen/Generic/2006-01-18-InvalidBranchOpcodeAssert.ll b/test/CodeGen/Generic/2006-01-18-InvalidBranchOpcodeAssert.ll
new file mode 100644
index 0000000..f06d341
--- /dev/null
+++ b/test/CodeGen/Generic/2006-01-18-InvalidBranchOpcodeAssert.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s
+; This crashed the PPC backend.
+
+define void @test() {
+ %tmp125 = fcmp uno double 0.000000e+00, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp125, label %bb154, label %cond_false133
+
+cond_false133: ; preds = %0
+ ret void
+
+bb154: ; preds = %0
+ %tmp164 = icmp eq i32 0, 0 ; <i1> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2006-02-12-InsertLibcall.ll b/test/CodeGen/Generic/2006-02-12-InsertLibcall.ll
new file mode 100644
index 0000000..5508272
--- /dev/null
+++ b/test/CodeGen/Generic/2006-02-12-InsertLibcall.ll
@@ -0,0 +1,60 @@
+; RUN: llc < %s
+@G = external global i32 ; <i32*> [#uses=1]
+
+define void @encode_one_frame(i64 %tmp.2i) {
+entry:
+ %tmp.9 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.9, label %endif.0, label %shortcirc_next.0
+
+then.5.i: ; preds = %shortcirc_next.i
+ %tmp.114.i = sdiv i64 %tmp.2i, 3 ; <i64> [#uses=1]
+ %tmp.111.i = call i64 @lseek( i32 0, i64 %tmp.114.i, i32 1 ) ; <i64> [#uses=0]
+ ret void
+
+shortcirc_next.0: ; preds = %entry
+ ret void
+
+endif.0: ; preds = %entry
+ %tmp.324.i = icmp eq i32 0, 0 ; <i1> [#uses=2]
+ %tmp.362.i = icmp slt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.324.i, label %else.4.i, label %then.11.i37
+
+then.11.i37: ; preds = %endif.0
+ ret void
+
+else.4.i: ; preds = %endif.0
+ br i1 %tmp.362.i, label %else.5.i, label %then.12.i
+
+then.12.i: ; preds = %else.4.i
+ ret void
+
+else.5.i: ; preds = %else.4.i
+ br i1 %tmp.324.i, label %then.0.i40, label %then.17.i
+
+then.17.i: ; preds = %else.5.i
+ ret void
+
+then.0.i40: ; preds = %else.5.i
+ %tmp.8.i42 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.8.i42, label %else.1.i56, label %then.1.i52
+
+then.1.i52: ; preds = %then.0.i40
+ ret void
+
+else.1.i56: ; preds = %then.0.i40
+ %tmp.28.i = load i32* @G ; <i32> [#uses=1]
+ %tmp.29.i = icmp eq i32 %tmp.28.i, 1 ; <i1> [#uses=1]
+ br i1 %tmp.29.i, label %shortcirc_next.i, label %shortcirc_done.i
+
+shortcirc_next.i: ; preds = %else.1.i56
+ %tmp.34.i = icmp eq i32 0, 3 ; <i1> [#uses=1]
+ br i1 %tmp.34.i, label %then.5.i, label %endif.5.i
+
+shortcirc_done.i: ; preds = %else.1.i56
+ ret void
+
+endif.5.i: ; preds = %shortcirc_next.i
+ ret void
+}
+
+declare i64 @lseek(i32, i64, i32)
diff --git a/test/CodeGen/Generic/2006-03-01-dagcombineinfloop.ll b/test/CodeGen/Generic/2006-03-01-dagcombineinfloop.ll
new file mode 100644
index 0000000..2a6cc0c
--- /dev/null
+++ b/test/CodeGen/Generic/2006-03-01-dagcombineinfloop.ll
@@ -0,0 +1,95 @@
+; RUN: llc < %s
+; Infinite loop in the dag combiner, reduced from 176.gcc.
+%struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.anon = type { i32 }
+ %struct.lang_decl = type opaque
+ %struct.lang_type = type { i32, [1 x %struct.tree_node*] }
+ %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 }
+ %struct.rtx_def = type { i16, i8, i8, [1 x %struct.anon] }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, i8, i8, i8, i8 }
+ %struct.tree_decl = type { [12 x i8], i8*, i32, %struct.tree_node*, i32, i8, i8, i8, i8, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.anon, { %struct.rtx_def* }, %struct.tree_node*, %struct.lang_decl* }
+ %struct.tree_list = type { [12 x i8], %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.tree_type = type { [12 x i8], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i8, i8, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.anon, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.obstack*, %struct.lang_type* }
+@void_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1]
+@char_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1]
+@short_integer_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1]
+@short_unsigned_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1]
+@float_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1]
+@signed_char_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1]
+@unsigned_char_type_node = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=1]
+
+define fastcc i32 @self_promoting_args_p(%struct.tree_node* %parms) {
+entry:
+ %tmp915 = icmp eq %struct.tree_node* %parms, null ; <i1> [#uses=1]
+ br i1 %tmp915, label %return, label %cond_true92.preheader
+
+cond_true: ; preds = %cond_true92
+ %tmp9.not = icmp ne %struct.tree_node* %tmp2, %tmp7 ; <i1> [#uses=1]
+ %tmp14 = icmp eq %struct.tree_node* %tmp2, null ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp9.not, %tmp14 ; <i1> [#uses=1]
+ br i1 %bothcond, label %return, label %cond_next18
+
+cond_next12: ; preds = %cond_true92
+ %tmp14.old = icmp eq %struct.tree_node* %tmp2, null ; <i1> [#uses=1]
+ br i1 %tmp14.old, label %return, label %cond_next18
+
+cond_next18: ; preds = %cond_next12, %cond_true
+ %tmp20 = bitcast %struct.tree_node* %tmp2 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
+ %tmp21 = getelementptr %struct.tree_type* %tmp20, i32 0, i32 17 ; <%struct.tree_node**> [#uses=1]
+ %tmp22 = load %struct.tree_node** %tmp21 ; <%struct.tree_node*> [#uses=6]
+ %tmp24 = icmp eq %struct.tree_node* %tmp22, %tmp23 ; <i1> [#uses=1]
+ br i1 %tmp24, label %return, label %cond_next28
+
+cond_next28: ; preds = %cond_next18
+ %tmp30 = bitcast %struct.tree_node* %tmp2 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1]
+ %tmp = getelementptr %struct.tree_common* %tmp30, i32 0, i32 2 ; <i8*> [#uses=1]
+ %tmp.upgrd.1 = bitcast i8* %tmp to i32* ; <i32*> [#uses=1]
+ %tmp.upgrd.2 = load i32* %tmp.upgrd.1 ; <i32> [#uses=1]
+ %tmp32 = trunc i32 %tmp.upgrd.2 to i8 ; <i8> [#uses=1]
+ %tmp33 = icmp eq i8 %tmp32, 7 ; <i1> [#uses=1]
+ br i1 %tmp33, label %cond_true34, label %cond_next84
+
+cond_true34: ; preds = %cond_next28
+ %tmp40 = icmp eq %struct.tree_node* %tmp22, %tmp39 ; <i1> [#uses=1]
+ %tmp49 = icmp eq %struct.tree_node* %tmp22, %tmp48 ; <i1> [#uses=1]
+ %bothcond6 = or i1 %tmp40, %tmp49 ; <i1> [#uses=1]
+ %tmp58 = icmp eq %struct.tree_node* %tmp22, %tmp57 ; <i1> [#uses=1]
+ %bothcond7 = or i1 %bothcond6, %tmp58 ; <i1> [#uses=1]
+ %tmp67 = icmp eq %struct.tree_node* %tmp22, %tmp66 ; <i1> [#uses=1]
+ %bothcond8 = or i1 %bothcond7, %tmp67 ; <i1> [#uses=1]
+ %tmp76 = icmp eq %struct.tree_node* %tmp22, %tmp75 ; <i1> [#uses=1]
+ %bothcond9 = or i1 %bothcond8, %tmp76 ; <i1> [#uses=2]
+ %brmerge = or i1 %bothcond9, %tmp.upgrd.6 ; <i1> [#uses=1]
+ %bothcond9.upgrd.3 = zext i1 %bothcond9 to i32 ; <i32> [#uses=1]
+ %.mux = xor i32 %bothcond9.upgrd.3, 1 ; <i32> [#uses=1]
+ br i1 %brmerge, label %return, label %cond_true92
+
+cond_next84: ; preds = %cond_next28
+ br i1 %tmp.upgrd.6, label %return, label %cond_true92
+
+cond_true92.preheader: ; preds = %entry
+ %tmp7 = load %struct.tree_node** @void_type_node ; <%struct.tree_node*> [#uses=1]
+ %tmp23 = load %struct.tree_node** @float_type_node ; <%struct.tree_node*> [#uses=1]
+ %tmp39 = load %struct.tree_node** @char_type_node ; <%struct.tree_node*> [#uses=1]
+ %tmp48 = load %struct.tree_node** @signed_char_type_node ; <%struct.tree_node*> [#uses=1]
+ %tmp57 = load %struct.tree_node** @unsigned_char_type_node ; <%struct.tree_node*> [#uses=1]
+ %tmp66 = load %struct.tree_node** @short_integer_type_node ; <%struct.tree_node*> [#uses=1]
+ %tmp75 = load %struct.tree_node** @short_unsigned_type_node ; <%struct.tree_node*> [#uses=1]
+ br label %cond_true92
+
+cond_true92: ; preds = %cond_true92.preheader, %cond_next84, %cond_true34
+ %t.0.0 = phi %struct.tree_node* [ %parms, %cond_true92.preheader ], [ %tmp6, %cond_true34 ], [ %tmp6, %cond_next84 ] ; <%struct.tree_node*> [#uses=2]
+ %tmp.upgrd.4 = bitcast %struct.tree_node* %t.0.0 to %struct.tree_list* ; <%struct.tree_list*> [#uses=1]
+ %tmp.upgrd.5 = getelementptr %struct.tree_list* %tmp.upgrd.4, i32 0, i32 2 ; <%struct.tree_node**> [#uses=1]
+ %tmp2 = load %struct.tree_node** %tmp.upgrd.5 ; <%struct.tree_node*> [#uses=5]
+ %tmp4 = bitcast %struct.tree_node* %t.0.0 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1]
+ %tmp5 = getelementptr %struct.tree_common* %tmp4, i32 0, i32 0 ; <%struct.tree_node**> [#uses=1]
+ %tmp6 = load %struct.tree_node** %tmp5 ; <%struct.tree_node*> [#uses=3]
+ %tmp.upgrd.6 = icmp eq %struct.tree_node* %tmp6, null ; <i1> [#uses=3]
+ br i1 %tmp.upgrd.6, label %cond_true, label %cond_next12
+
+return: ; preds = %cond_next84, %cond_true34, %cond_next18, %cond_next12, %cond_true, %entry
+ %retval.0 = phi i32 [ 1, %entry ], [ 1, %cond_next84 ], [ %.mux, %cond_true34 ], [ 0, %cond_next18 ], [ 0, %cond_next12 ], [ 0, %cond_true ] ; <i32> [#uses=1]
+ ret i32 %retval.0
+}
diff --git a/test/CodeGen/Generic/2006-04-26-SetCCAnd.ll b/test/CodeGen/Generic/2006-04-26-SetCCAnd.ll
new file mode 100644
index 0000000..8465b82
--- /dev/null
+++ b/test/CodeGen/Generic/2006-04-26-SetCCAnd.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s
+; PR748
+@G = external global i16 ; <i16*> [#uses=1]
+
+define void @OmNewObjHdr() {
+entry:
+ br i1 false, label %endif.4, label %then.0
+
+then.0: ; preds = %entry
+ ret void
+
+endif.4: ; preds = %entry
+ br i1 false, label %else.3, label %shortcirc_next.3
+
+shortcirc_next.3: ; preds = %endif.4
+ ret void
+
+else.3: ; preds = %endif.4
+ switch i32 0, label %endif.10 [
+ i32 5001, label %then.10
+ i32 -5008, label %then.10
+ ]
+
+then.10: ; preds = %else.3, %else.3
+ %tmp.112 = load i16* null ; <i16> [#uses=2]
+ %tmp.113 = load i16* @G ; <i16> [#uses=2]
+ %tmp.114 = icmp ugt i16 %tmp.112, %tmp.113 ; <i1> [#uses=1]
+ %tmp.120 = icmp ult i16 %tmp.112, %tmp.113 ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp.114, %tmp.120 ; <i1> [#uses=1]
+ br i1 %bothcond, label %else.4, label %then.11
+
+then.11: ; preds = %then.10
+ ret void
+
+else.4: ; preds = %then.10
+ ret void
+
+endif.10: ; preds = %else.3
+ ret void
+}
diff --git a/test/CodeGen/Generic/2006-04-28-Sign-extend-bool.ll b/test/CodeGen/Generic/2006-04-28-Sign-extend-bool.ll
new file mode 100644
index 0000000..22d8f99
--- /dev/null
+++ b/test/CodeGen/Generic/2006-04-28-Sign-extend-bool.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s
+
+define i32 @test(i32 %tmp93) {
+ %tmp98 = shl i32 %tmp93, 31 ; <i32> [#uses=1]
+ %tmp99 = ashr i32 %tmp98, 31 ; <i32> [#uses=1]
+ %tmp99.upgrd.1 = trunc i32 %tmp99 to i8 ; <i8> [#uses=1]
+ %tmp99100 = sext i8 %tmp99.upgrd.1 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp99100
+}
diff --git a/test/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll b/test/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll
new file mode 100644
index 0000000..1a9fa9f
--- /dev/null
+++ b/test/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s
+%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.SYMBOL_TABLE_ENTRY = type { [9 x i8], [9 x i8], i32, i32, i32, %struct.SYMBOL_TABLE_ENTRY* }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+@str14 = external global [6 x i8] ; <[6 x i8]*> [#uses=0]
+
+declare void @fprintf(i32, ...)
+
+define void @OUTPUT_TABLE(%struct.SYMBOL_TABLE_ENTRY* %SYM_TAB) {
+entry:
+ %tmp11 = getelementptr %struct.SYMBOL_TABLE_ENTRY* %SYM_TAB, i32 0, i32 1, i32 0 ; <i8*> [#uses=2]
+ %tmp.i = bitcast i8* %tmp11 to i8* ; <i8*> [#uses=1]
+ br label %bb.i
+
+bb.i: ; preds = %cond_next.i, %entry
+ %s1.0.i = phi i8* [ %tmp.i, %entry ], [ null, %cond_next.i ] ; <i8*> [#uses=0]
+ br i1 false, label %cond_true.i31, label %cond_next.i
+
+cond_true.i31: ; preds = %bb.i
+ call void (i32, ...)* @fprintf( i32 0, i8* %tmp11, i8* null )
+ ret void
+
+cond_next.i: ; preds = %bb.i
+ br i1 false, label %bb.i, label %bb19.i
+
+bb19.i: ; preds = %cond_next.i
+ ret void
+}
diff --git a/test/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll b/test/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll
new file mode 100644
index 0000000..a3720a9
--- /dev/null
+++ b/test/CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -O0
+
+define float @test(i32 %tmp12771278) {
+ switch i32 %tmp12771278, label %bb1279 [
+ ]
+
+bb1279: ; preds = %0
+ ret float 1.000000e+00
+}
+
diff --git a/test/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll b/test/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll
new file mode 100644
index 0000000..bd922b3
--- /dev/null
+++ b/test/CodeGen/Generic/2006-06-13-ComputeMaskedBitsCrash.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -O0
+
+%struct.cl_perfunc_opts = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32 }
+@cl_pf_opts = external global %struct.cl_perfunc_opts ; <%struct.cl_perfunc_opts*> [#uses=2]
+
+define void @set_flags_from_O() {
+entry:
+ %tmp22 = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp22, label %cond_true23, label %cond_next159
+
+cond_true23: ; preds = %entry
+ %tmp138 = getelementptr %struct.cl_perfunc_opts* @cl_pf_opts, i32 0, i32 8 ; <i8*> [#uses=1]
+ %tmp138.upgrd.1 = bitcast i8* %tmp138 to i32* ; <i32*> [#uses=2]
+ %tmp139 = load i32* %tmp138.upgrd.1 ; <i32> [#uses=1]
+ %tmp140 = shl i32 1, 27 ; <i32> [#uses=1]
+ %tmp141 = and i32 %tmp140, 134217728 ; <i32> [#uses=1]
+ %tmp142 = and i32 %tmp139, -134217729 ; <i32> [#uses=1]
+ %tmp143 = or i32 %tmp142, %tmp141 ; <i32> [#uses=1]
+ store i32 %tmp143, i32* %tmp138.upgrd.1
+ %tmp144 = getelementptr %struct.cl_perfunc_opts* @cl_pf_opts, i32 0, i32 8 ; <i8*> [#uses=1]
+ %tmp144.upgrd.2 = bitcast i8* %tmp144 to i32* ; <i32*> [#uses=1]
+ %tmp145 = load i32* %tmp144.upgrd.2 ; <i32> [#uses=1]
+ %tmp146 = shl i32 %tmp145, 22 ; <i32> [#uses=1]
+ %tmp147 = lshr i32 %tmp146, 31 ; <i32> [#uses=1]
+ %tmp147.upgrd.3 = trunc i32 %tmp147 to i8 ; <i8> [#uses=1]
+ %tmp148 = icmp eq i8 %tmp147.upgrd.3, 0 ; <i1> [#uses=1]
+ br i1 %tmp148, label %cond_true149, label %cond_next159
+
+cond_true149: ; preds = %cond_true23
+ %tmp150 = bitcast i8* null to i32* ; <i32*> [#uses=0]
+ ret void
+
+cond_next159: ; preds = %cond_true23, %entry
+ ret void
+}
diff --git a/test/CodeGen/Generic/2006-06-28-SimplifySetCCCrash.ll b/test/CodeGen/Generic/2006-06-28-SimplifySetCCCrash.ll
new file mode 100644
index 0000000..c4f2fb0
--- /dev/null
+++ b/test/CodeGen/Generic/2006-06-28-SimplifySetCCCrash.ll
@@ -0,0 +1,279 @@
+; RUN: llc < %s
+%struct.rtunion = type { i64 }
+ %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
+@ix86_cpu = external global i32 ; <i32*> [#uses=1]
+@which_alternative = external global i32 ; <i32*> [#uses=3]
+
+declare fastcc i32 @recog()
+
+define void @athlon_fp_unit_ready_cost() {
+entry:
+ %tmp = icmp slt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true.i, label %cond_true
+
+cond_true: ; preds = %entry
+ ret void
+
+cond_true.i: ; preds = %entry
+ %tmp8.i = tail call fastcc i32 @recog( ) ; <i32> [#uses=1]
+ switch i32 %tmp8.i, label %UnifiedReturnBlock [
+ i32 -1, label %bb2063
+ i32 19, label %bb2035
+ i32 20, label %bb2035
+ i32 21, label %bb2035
+ i32 23, label %bb2035
+ i32 24, label %bb2035
+ i32 27, label %bb2035
+ i32 32, label %bb2035
+ i32 33, label %bb1994
+ i32 35, label %bb2035
+ i32 36, label %bb1994
+ i32 90, label %bb1948
+ i32 94, label %bb1948
+ i32 95, label %bb1948
+ i32 101, label %bb1648
+ i32 102, label %bb1648
+ i32 103, label %bb1648
+ i32 104, label %bb1648
+ i32 133, label %bb1419
+ i32 135, label %bb1238
+ i32 136, label %bb1238
+ i32 137, label %bb1238
+ i32 138, label %bb1238
+ i32 139, label %bb1201
+ i32 140, label %bb1201
+ i32 141, label %bb1154
+ i32 142, label %bb1126
+ i32 144, label %bb1201
+ i32 145, label %bb1126
+ i32 146, label %bb1201
+ i32 147, label %bb1126
+ i32 148, label %bb1201
+ i32 149, label %bb1126
+ i32 150, label %bb1201
+ i32 151, label %bb1126
+ i32 152, label %bb1096
+ i32 153, label %bb1096
+ i32 154, label %bb1096
+ i32 157, label %bb1096
+ i32 158, label %bb1096
+ i32 159, label %bb1096
+ i32 162, label %bb1096
+ i32 163, label %bb1096
+ i32 164, label %bb1096
+ i32 167, label %bb1201
+ i32 168, label %bb1201
+ i32 170, label %bb1201
+ i32 171, label %bb1201
+ i32 173, label %bb1201
+ i32 174, label %bb1201
+ i32 176, label %bb1201
+ i32 177, label %bb1201
+ i32 179, label %bb993
+ i32 180, label %bb993
+ i32 181, label %bb993
+ i32 182, label %bb993
+ i32 183, label %bb993
+ i32 184, label %bb993
+ i32 365, label %bb1126
+ i32 366, label %bb1126
+ i32 367, label %bb1126
+ i32 368, label %bb1126
+ i32 369, label %bb1126
+ i32 370, label %bb1126
+ i32 371, label %bb1126
+ i32 372, label %bb1126
+ i32 373, label %bb1126
+ i32 384, label %bb1126
+ i32 385, label %bb1126
+ i32 386, label %bb1126
+ i32 387, label %bb1126
+ i32 388, label %bb1126
+ i32 389, label %bb1126
+ i32 390, label %bb1126
+ i32 391, label %bb1126
+ i32 392, label %bb1126
+ i32 525, label %bb919
+ i32 526, label %bb839
+ i32 528, label %bb919
+ i32 529, label %bb839
+ i32 531, label %cond_next6.i119
+ i32 532, label %cond_next6.i97
+ i32 533, label %cond_next6.i81
+ i32 534, label %bb495
+ i32 536, label %cond_next6.i81
+ i32 537, label %cond_next6.i81
+ i32 538, label %bb396
+ i32 539, label %bb288
+ i32 541, label %bb396
+ i32 542, label %bb396
+ i32 543, label %bb396
+ i32 544, label %bb396
+ i32 545, label %bb189
+ i32 546, label %cond_next6.i
+ i32 547, label %bb189
+ i32 548, label %cond_next6.i
+ i32 549, label %bb189
+ i32 550, label %cond_next6.i
+ i32 551, label %bb189
+ i32 552, label %cond_next6.i
+ i32 553, label %bb189
+ i32 554, label %cond_next6.i
+ i32 555, label %bb189
+ i32 556, label %cond_next6.i
+ i32 557, label %bb189
+ i32 558, label %cond_next6.i
+ i32 618, label %bb40
+ i32 619, label %bb18
+ i32 620, label %bb40
+ i32 621, label %bb10
+ i32 622, label %bb10
+ ]
+
+bb10: ; preds = %cond_true.i, %cond_true.i
+ ret void
+
+bb18: ; preds = %cond_true.i
+ ret void
+
+bb40: ; preds = %cond_true.i, %cond_true.i
+ ret void
+
+cond_next6.i: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb189: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb288: ; preds = %cond_true.i
+ ret void
+
+bb396: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb495: ; preds = %cond_true.i
+ ret void
+
+cond_next6.i81: ; preds = %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+cond_next6.i97: ; preds = %cond_true.i
+ ret void
+
+cond_next6.i119: ; preds = %cond_true.i
+ %tmp.i126 = icmp eq i16 0, 78 ; <i1> [#uses=1]
+ br i1 %tmp.i126, label %cond_next778, label %bb802
+
+cond_next778: ; preds = %cond_next6.i119
+ %tmp781 = icmp eq i32 0, 1 ; <i1> [#uses=1]
+ br i1 %tmp781, label %cond_next784, label %bb790
+
+cond_next784: ; preds = %cond_next778
+ %tmp785 = load i32* @ix86_cpu ; <i32> [#uses=1]
+ %tmp786 = icmp eq i32 %tmp785, 5 ; <i1> [#uses=1]
+ br i1 %tmp786, label %UnifiedReturnBlock, label %bb790
+
+bb790: ; preds = %cond_next784, %cond_next778
+ %tmp793 = icmp eq i32 0, 1 ; <i1> [#uses=0]
+ ret void
+
+bb802: ; preds = %cond_next6.i119
+ ret void
+
+bb839: ; preds = %cond_true.i, %cond_true.i
+ ret void
+
+bb919: ; preds = %cond_true.i, %cond_true.i
+ ret void
+
+bb993: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb1096: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb1126: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb1154: ; preds = %cond_true.i
+ ret void
+
+bb1201: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb1238: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb1419: ; preds = %cond_true.i
+ ret void
+
+bb1648: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ %tmp1650 = load i32* @which_alternative ; <i32> [#uses=1]
+ switch i32 %tmp1650, label %bb1701 [
+ i32 0, label %cond_next1675
+ i32 1, label %cond_next1675
+ i32 2, label %cond_next1675
+ ]
+
+cond_next1675: ; preds = %bb1648, %bb1648, %bb1648
+ ret void
+
+bb1701: ; preds = %bb1648
+ %tmp1702 = load i32* @which_alternative ; <i32> [#uses=1]
+ switch i32 %tmp1702, label %bb1808 [
+ i32 0, label %cond_next1727
+ i32 1, label %cond_next1727
+ i32 2, label %cond_next1727
+ ]
+
+cond_next1727: ; preds = %bb1701, %bb1701, %bb1701
+ ret void
+
+bb1808: ; preds = %bb1701
+ %bothcond696 = or i1 false, false ; <i1> [#uses=1]
+ br i1 %bothcond696, label %bb1876, label %cond_next1834
+
+cond_next1834: ; preds = %bb1808
+ ret void
+
+bb1876: ; preds = %bb1808
+ %tmp1877signed = load i32* @which_alternative ; <i32> [#uses=4]
+ %tmp1877 = bitcast i32 %tmp1877signed to i32 ; <i32> [#uses=1]
+ %bothcond699 = icmp ult i32 %tmp1877, 2 ; <i1> [#uses=1]
+ %tmp1888 = icmp eq i32 %tmp1877signed, 2 ; <i1> [#uses=1]
+ %bothcond700 = or i1 %bothcond699, %tmp1888 ; <i1> [#uses=1]
+ %bothcond700.not = xor i1 %bothcond700, true ; <i1> [#uses=1]
+ %tmp1894 = icmp eq i32 %tmp1877signed, 3 ; <i1> [#uses=1]
+ %bothcond701 = or i1 %tmp1894, %bothcond700.not ; <i1> [#uses=1]
+ %bothcond702 = or i1 %bothcond701, false ; <i1> [#uses=1]
+ br i1 %bothcond702, label %UnifiedReturnBlock, label %cond_next1902
+
+cond_next1902: ; preds = %bb1876
+ switch i32 %tmp1877signed, label %cond_next1937 [
+ i32 0, label %bb1918
+ i32 1, label %bb1918
+ i32 2, label %bb1918
+ ]
+
+bb1918: ; preds = %cond_next1902, %cond_next1902, %cond_next1902
+ ret void
+
+cond_next1937: ; preds = %cond_next1902
+ ret void
+
+bb1948: ; preds = %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb1994: ; preds = %cond_true.i, %cond_true.i
+ ret void
+
+bb2035: ; preds = %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i, %cond_true.i
+ ret void
+
+bb2063: ; preds = %cond_true.i
+ ret void
+
+UnifiedReturnBlock: ; preds = %bb1876, %cond_next784, %cond_true.i
+ %UnifiedRetVal = phi i32 [ 100, %bb1876 ], [ 100, %cond_true.i ], [ 4, %cond_next784 ] ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/Generic/2006-07-03-schedulers.ll b/test/CodeGen/Generic/2006-07-03-schedulers.ll
new file mode 100644
index 0000000..756bd5d
--- /dev/null
+++ b/test/CodeGen/Generic/2006-07-03-schedulers.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -pre-RA-sched=default
+; RUN: llc < %s -pre-RA-sched=list-burr
+; RUN: llc < %s -pre-RA-sched=fast
+; PR859
+
+; The top-down schedulers are excluded here because they don't yet support
+; targets that use physreg defs.
+
+declare i32 @printf(i8*, i32, float)
+
+define i32 @testissue(i32 %i, float %x, float %y) {
+ br label %bb1
+
+bb1: ; preds = %bb1, %0
+ %x1 = fmul float %x, %y ; <float> [#uses=1]
+ %y1 = fmul float %y, 7.500000e-01 ; <float> [#uses=1]
+ %z1 = fadd float %x1, %y1 ; <float> [#uses=1]
+ %x2 = fmul float %x, 5.000000e-01 ; <float> [#uses=1]
+ %y2 = fmul float %y, 0x3FECCCCCC0000000 ; <float> [#uses=1]
+ %z2 = fadd float %x2, %y2 ; <float> [#uses=1]
+ %z3 = fadd float %z1, %z2 ; <float> [#uses=1]
+ %i1 = shl i32 %i, 3 ; <i32> [#uses=1]
+ %j1 = add i32 %i, 7 ; <i32> [#uses=1]
+ %m1 = add i32 %i1, %j1 ; <i32> [#uses=2]
+ %b = icmp sle i32 %m1, 6 ; <i1> [#uses=1]
+ br i1 %b, label %bb1, label %bb2
+
+bb2: ; preds = %bb1
+ %Msg = inttoptr i64 0 to i8* ; <i8*> [#uses=1]
+ call i32 @printf( i8* %Msg, i32 %m1, float %z3 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/2006-08-30-CoalescerCrash.ll b/test/CodeGen/Generic/2006-08-30-CoalescerCrash.ll
new file mode 100644
index 0000000..cbe8b15
--- /dev/null
+++ b/test/CodeGen/Generic/2006-08-30-CoalescerCrash.ll
@@ -0,0 +1,112 @@
+; RUN: llc < %s
+%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 }
+ %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* }
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.cost_pair = type { %struct.iv_cand*, i32, %struct.bitmap_head_def* }
+ %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] }
+ %struct.def_operand_ptr = type { %struct.tree_node** }
+ %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i1, i1, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.iv = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i1, i1, i32 }
+ %struct.iv_cand = type { i32, i1, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.iv*, i32 }
+ %struct.iv_use = type { i32, i32, %struct.iv*, %struct.tree_node*, %struct.tree_node**, %struct.bitmap_head_def*, i32, %struct.cost_pair*, %struct.iv_cand* }
+ %struct.ivopts_data = type { %struct.loop*, %struct.htab*, i32, %struct.version_info*, %struct.bitmap_head_def*, i32, %struct.varray_head_tag*, %struct.varray_head_tag*, %struct.bitmap_head_def*, i1 }
+ %struct.lang_decl = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.loop = type { i32, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.lpt_decision, i32, i32, %struct.edge_def**, i32, %struct.basic_block_def*, %struct.basic_block_def*, i32, %struct.edge_def**, i32, %struct.edge_def**, i32, %struct.simple_bitmap_def*, i32, %struct.loop**, i32, %struct.loop*, %struct.loop*, %struct.loop*, %struct.loop*, i32, i8*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i32, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound*, %struct.edge_def*, i1 }
+ %struct.lpt_decision = type { i32, i32 }
+ %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
+ %struct.nb_iter_bound = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound* }
+ %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.simple_bitmap_def = type { i32, i32, i32, [1 x i64] }
+ %struct.stack_local_entry = type opaque
+ %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 }
+ %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* }
+ %struct.temp_slot = type opaque
+ %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* }
+ %struct.tree_ann_d = type { %struct.stmt_ann_d }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.u = type { [1 x i64] }
+ %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* }
+ %struct.v_may_def_optype_d = type { i32, [1 x %struct.v_def_use_operand_type_t] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+ %struct.version_info = type { %struct.tree_node*, %struct.iv*, i1, i32, i1 }
+ %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] }
+
+define i1 @determine_use_iv_cost(%struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand) {
+entry:
+ switch i32 0, label %bb91 [
+ i32 0, label %bb
+ i32 1, label %bb6
+ i32 3, label %cond_next135
+ ]
+
+bb: ; preds = %entry
+ ret i1 false
+
+bb6: ; preds = %entry
+ br i1 false, label %bb87, label %cond_next27
+
+cond_next27: ; preds = %bb6
+ br i1 false, label %cond_true30, label %cond_next55
+
+cond_true30: ; preds = %cond_next27
+ br i1 false, label %cond_next41, label %cond_true35
+
+cond_true35: ; preds = %cond_true30
+ ret i1 false
+
+cond_next41: ; preds = %cond_true30
+ %tmp44 = call i32 @force_var_cost( %struct.ivopts_data* %data, %struct.tree_node* null, %struct.bitmap_head_def** null ) ; <i32> [#uses=2]
+ %tmp46 = udiv i32 %tmp44, 5 ; <i32> [#uses=1]
+ call void @set_use_iv_cost( %struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand, i32 %tmp46, %struct.bitmap_head_def* null )
+ %tmp44.off = add i32 %tmp44, -50000000 ; <i32> [#uses=1]
+ %tmp52 = icmp ugt i32 %tmp44.off, 4 ; <i1> [#uses=1]
+ %tmp52.upgrd.1 = zext i1 %tmp52 to i32 ; <i32> [#uses=1]
+ br label %bb87
+
+cond_next55: ; preds = %cond_next27
+ ret i1 false
+
+bb87: ; preds = %cond_next41, %bb6
+ %tmp2.0 = phi i32 [ %tmp52.upgrd.1, %cond_next41 ], [ 1, %bb6 ] ; <i32> [#uses=0]
+ ret i1 false
+
+bb91: ; preds = %entry
+ ret i1 false
+
+cond_next135: ; preds = %entry
+ %tmp193 = call i1 @determine_use_iv_cost_generic( %struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand ) ; <i1> [#uses=0]
+ ret i1 false
+}
+
+declare void @set_use_iv_cost(%struct.ivopts_data*, %struct.iv_use*, %struct.iv_cand*, i32, %struct.bitmap_head_def*)
+
+declare i32 @force_var_cost(%struct.ivopts_data*, %struct.tree_node*, %struct.bitmap_head_def**)
+
+declare i1 @determine_use_iv_cost_generic(%struct.ivopts_data*, %struct.iv_use*, %struct.iv_cand*)
diff --git a/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll b/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll
new file mode 100644
index 0000000..4b332b3
--- /dev/null
+++ b/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll
@@ -0,0 +1,117 @@
+; RUN: llc < %s -regalloc=local
+
+%struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 }
+@search = external global %struct.CHESS_POSITION ; <%struct.CHESS_POSITION*> [#uses=2]
+@bishop_shift_rl45 = external global [64 x i32] ; <[64 x i32]*> [#uses=1]
+@bishop_shift_rr45 = external global [64 x i32] ; <[64 x i32]*> [#uses=1]
+@black_outpost = external global [64 x i8] ; <[64 x i8]*> [#uses=1]
+@bishop_mobility_rl45 = external global [64 x [256 x i32]] ; <[64 x [256 x i32]]*> [#uses=1]
+@bishop_mobility_rr45 = external global [64 x [256 x i32]] ; <[64 x [256 x i32]]*> [#uses=1]
+
+declare fastcc i32 @FirstOne()
+
+define fastcc void @Evaluate() {
+entry:
+ br i1 false, label %cond_false186, label %cond_true
+
+cond_true: ; preds = %entry
+ ret void
+
+cond_false186: ; preds = %entry
+ br i1 false, label %cond_true293, label %bb203
+
+bb203: ; preds = %cond_false186
+ ret void
+
+cond_true293: ; preds = %cond_false186
+ br i1 false, label %cond_true298, label %cond_next317
+
+cond_true298: ; preds = %cond_true293
+ br i1 false, label %cond_next518, label %cond_true397.preheader
+
+cond_next317: ; preds = %cond_true293
+ ret void
+
+cond_true397.preheader: ; preds = %cond_true298
+ ret void
+
+cond_next518: ; preds = %cond_true298
+ br i1 false, label %bb1069, label %cond_true522
+
+cond_true522: ; preds = %cond_next518
+ ret void
+
+bb1069: ; preds = %cond_next518
+ br i1 false, label %cond_next1131, label %bb1096
+
+bb1096: ; preds = %bb1069
+ ret void
+
+cond_next1131: ; preds = %bb1069
+ br i1 false, label %cond_next1207, label %cond_true1150
+
+cond_true1150: ; preds = %cond_next1131
+ ret void
+
+cond_next1207: ; preds = %cond_next1131
+ br i1 false, label %cond_next1219, label %cond_true1211
+
+cond_true1211: ; preds = %cond_next1207
+ ret void
+
+cond_next1219: ; preds = %cond_next1207
+ br i1 false, label %cond_true1223, label %cond_next1283
+
+cond_true1223: ; preds = %cond_next1219
+ br i1 false, label %cond_true1254, label %cond_true1264
+
+cond_true1254: ; preds = %cond_true1223
+ br i1 false, label %bb1567, label %cond_true1369.preheader
+
+cond_true1264: ; preds = %cond_true1223
+ ret void
+
+cond_next1283: ; preds = %cond_next1219
+ ret void
+
+cond_true1369.preheader: ; preds = %cond_true1254
+ ret void
+
+bb1567: ; preds = %cond_true1254
+ %tmp1580 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 3) ; <i64> [#uses=1]
+ %tmp1591 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 4) ; <i64> [#uses=1]
+ %tmp1572 = tail call fastcc i32 @FirstOne( ) ; <i32> [#uses=5]
+ %tmp1582 = getelementptr [64 x i32]* @bishop_shift_rl45, i32 0, i32 %tmp1572 ; <i32*> [#uses=1]
+ %tmp1583 = load i32* %tmp1582 ; <i32> [#uses=1]
+ %tmp1583.upgrd.1 = trunc i32 %tmp1583 to i8 ; <i8> [#uses=1]
+ %shift.upgrd.2 = zext i8 %tmp1583.upgrd.1 to i64 ; <i64> [#uses=1]
+ %tmp1584 = lshr i64 %tmp1580, %shift.upgrd.2 ; <i64> [#uses=1]
+ %tmp1584.upgrd.3 = trunc i64 %tmp1584 to i32 ; <i32> [#uses=1]
+ %tmp1585 = and i32 %tmp1584.upgrd.3, 255 ; <i32> [#uses=1]
+ %gep.upgrd.4 = zext i32 %tmp1585 to i64 ; <i64> [#uses=1]
+ %tmp1587 = getelementptr [64 x [256 x i32]]* @bishop_mobility_rl45, i32 0, i32 %tmp1572, i64 %gep.upgrd.4 ; <i32*> [#uses=1]
+ %tmp1588 = load i32* %tmp1587 ; <i32> [#uses=1]
+ %tmp1593 = getelementptr [64 x i32]* @bishop_shift_rr45, i32 0, i32 %tmp1572 ; <i32*> [#uses=1]
+ %tmp1594 = load i32* %tmp1593 ; <i32> [#uses=1]
+ %tmp1594.upgrd.5 = trunc i32 %tmp1594 to i8 ; <i8> [#uses=1]
+ %shift.upgrd.6 = zext i8 %tmp1594.upgrd.5 to i64 ; <i64> [#uses=1]
+ %tmp1595 = lshr i64 %tmp1591, %shift.upgrd.6 ; <i64> [#uses=1]
+ %tmp1595.upgrd.7 = trunc i64 %tmp1595 to i32 ; <i32> [#uses=1]
+ %tmp1596 = and i32 %tmp1595.upgrd.7, 255 ; <i32> [#uses=1]
+ %gep.upgrd.8 = zext i32 %tmp1596 to i64 ; <i64> [#uses=1]
+ %tmp1598 = getelementptr [64 x [256 x i32]]* @bishop_mobility_rr45, i32 0, i32 %tmp1572, i64 %gep.upgrd.8 ; <i32*> [#uses=1]
+ %tmp1599 = load i32* %tmp1598 ; <i32> [#uses=1]
+ %tmp1600.neg = sub i32 0, %tmp1588 ; <i32> [#uses=1]
+ %tmp1602 = sub i32 %tmp1600.neg, %tmp1599 ; <i32> [#uses=1]
+ %tmp1604 = getelementptr [64 x i8]* @black_outpost, i32 0, i32 %tmp1572 ; <i8*> [#uses=1]
+ %tmp1605 = load i8* %tmp1604 ; <i8> [#uses=1]
+ %tmp1606 = icmp eq i8 %tmp1605, 0 ; <i1> [#uses=1]
+ br i1 %tmp1606, label %cond_next1637, label %cond_true1607
+
+cond_true1607: ; preds = %bb1567
+ ret void
+
+cond_next1637: ; preds = %bb1567
+ %tmp1662 = sub i32 %tmp1602, 0 ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/Generic/2006-09-06-SwitchLowering.ll b/test/CodeGen/Generic/2006-09-06-SwitchLowering.ll
new file mode 100644
index 0000000..3d592b3
--- /dev/null
+++ b/test/CodeGen/Generic/2006-09-06-SwitchLowering.ll
@@ -0,0 +1,96 @@
+; RUN: llc < %s
+
+define void @foo() {
+ br label %cond_true813.i
+
+cond_true813.i: ; preds = %0
+ br i1 false, label %cond_true818.i, label %cond_next1146.i
+
+cond_true818.i: ; preds = %cond_true813.i
+ br i1 false, label %recog_memoized.exit52, label %cond_next1146.i
+
+recog_memoized.exit52: ; preds = %cond_true818.i
+ switch i32 0, label %bb886.i.preheader [
+ i32 0, label %bb907.i
+ i32 44, label %bb866.i
+ i32 103, label %bb874.i
+ i32 114, label %bb874.i
+ ]
+
+bb857.i: ; preds = %bb886.i, %bb866.i
+ %tmp862.i494.24 = phi i8* [ null, %bb866.i ], [ %tmp862.i494.26, %bb886.i ] ; <i8*> [#uses=4]
+ switch i32 0, label %bb886.i.preheader [
+ i32 0, label %bb907.i
+ i32 44, label %bb866.i
+ i32 103, label %bb874.i
+ i32 114, label %bb874.i
+ ]
+
+bb866.i.loopexit: ; preds = %bb874.i
+ br label %bb866.i
+
+bb866.i.loopexit31: ; preds = %cond_true903.i
+ br label %bb866.i
+
+bb866.i: ; preds = %bb866.i.loopexit31, %bb866.i.loopexit, %bb857.i, %recog_memoized.exit52
+ br i1 false, label %bb907.i, label %bb857.i
+
+bb874.i.preheader.loopexit: ; preds = %cond_true903.i, %cond_true903.i
+ ret void
+
+bb874.i: ; preds = %bb857.i, %bb857.i, %recog_memoized.exit52, %recog_memoized.exit52
+ %tmp862.i494.25 = phi i8* [ %tmp862.i494.24, %bb857.i ], [ %tmp862.i494.24, %bb857.i ], [ undef, %recog_memoized.exit52 ], [ undef, %recog_memoized.exit52 ] ; <i8*> [#uses=1]
+ switch i32 0, label %bb886.i.preheader.loopexit [
+ i32 0, label %bb907.i
+ i32 44, label %bb866.i.loopexit
+ i32 103, label %bb874.i.backedge
+ i32 114, label %bb874.i.backedge
+ ]
+
+bb874.i.backedge: ; preds = %bb874.i, %bb874.i
+ ret void
+
+bb886.i.preheader.loopexit: ; preds = %bb874.i
+ ret void
+
+bb886.i.preheader: ; preds = %bb857.i, %recog_memoized.exit52
+ %tmp862.i494.26 = phi i8* [ undef, %recog_memoized.exit52 ], [ %tmp862.i494.24, %bb857.i ] ; <i8*> [#uses=1]
+ br label %bb886.i
+
+bb886.i: ; preds = %cond_true903.i, %bb886.i.preheader
+ br i1 false, label %bb857.i, label %cond_true903.i
+
+cond_true903.i: ; preds = %bb886.i
+ switch i32 0, label %bb886.i [
+ i32 0, label %bb907.i
+ i32 44, label %bb866.i.loopexit31
+ i32 103, label %bb874.i.preheader.loopexit
+ i32 114, label %bb874.i.preheader.loopexit
+ ]
+
+bb907.i: ; preds = %cond_true903.i, %bb874.i, %bb866.i, %bb857.i, %recog_memoized.exit52
+ %tmp862.i494.0 = phi i8* [ %tmp862.i494.24, %bb857.i ], [ null, %bb866.i ], [ undef, %recog_memoized.exit52 ], [ %tmp862.i494.25, %bb874.i ], [ null, %cond_true903.i ] ; <i8*> [#uses=1]
+ br i1 false, label %cond_next1146.i, label %cond_true910.i
+
+cond_true910.i: ; preds = %bb907.i
+ ret void
+
+cond_next1146.i: ; preds = %bb907.i, %cond_true818.i, %cond_true813.i
+ %tmp862.i494.1 = phi i8* [ %tmp862.i494.0, %bb907.i ], [ undef, %cond_true818.i ], [ undef, %cond_true813.i ] ; <i8*> [#uses=0]
+ ret void
+
+bb2060.i: ; No predecessors!
+ br i1 false, label %cond_true2064.i, label %bb2067.i
+
+cond_true2064.i: ; preds = %bb2060.i
+ unreachable
+
+bb2067.i: ; preds = %bb2060.i
+ ret void
+
+cond_next3473: ; No predecessors!
+ ret void
+
+cond_next3521: ; No predecessors!
+ ret void
+}
diff --git a/test/CodeGen/Generic/2006-10-27-CondFolding.ll b/test/CodeGen/Generic/2006-10-27-CondFolding.ll
new file mode 100644
index 0000000..51902c8
--- /dev/null
+++ b/test/CodeGen/Generic/2006-10-27-CondFolding.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s
+
+define void @start_pass_huff(i32 %gather_statistics) {
+entry:
+ %tmp = icmp eq i32 %gather_statistics, 0 ; <i1> [#uses=1]
+ br i1 false, label %cond_next22, label %bb166
+
+cond_next22: ; preds = %entry
+ %bothcond = and i1 false, %tmp ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb34, label %bb46
+
+bb34: ; preds = %cond_next22
+ ret void
+
+bb46: ; preds = %cond_next22
+ ret void
+
+bb166: ; preds = %entry
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2006-10-29-Crash.ll b/test/CodeGen/Generic/2006-10-29-Crash.ll
new file mode 100644
index 0000000..7dcb52c
--- /dev/null
+++ b/test/CodeGen/Generic/2006-10-29-Crash.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s
+
+define void @form_component_prediction(i32 %dy) {
+entry:
+ %tmp7 = and i32 %dy, 1 ; <i32> [#uses=1]
+ %tmp27 = icmp eq i32 %tmp7, 0 ; <i1> [#uses=1]
+ br i1 false, label %cond_next30, label %bb115
+
+cond_next30: ; preds = %entry
+ ret void
+
+bb115: ; preds = %entry
+ %bothcond1 = or i1 %tmp27, false ; <i1> [#uses=1]
+ br i1 %bothcond1, label %bb228, label %cond_next125
+
+cond_next125: ; preds = %bb115
+ ret void
+
+bb228: ; preds = %bb115
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2006-11-20-DAGCombineCrash.ll b/test/CodeGen/Generic/2006-11-20-DAGCombineCrash.ll
new file mode 100644
index 0000000..26d0f4f
--- /dev/null
+++ b/test/CodeGen/Generic/2006-11-20-DAGCombineCrash.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s
+; PR1011
+%struct.mng_data = type { i8* (%struct.mng_data*, i32)*, i32, i32, i32, i8, i8, i32, i32, i32, i32, i32 }
+
+define void @mng_display_bgr565() {
+entry:
+ br i1 false, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ br i1 false, label %cond_true48, label %cond_next80
+
+cond_true48: ; preds = %bb.preheader
+ %tmp = load i8* null ; <i8> [#uses=1]
+ %tmp51 = zext i8 %tmp to i16 ; <i16> [#uses=1]
+ %tmp99 = load i8* null ; <i8> [#uses=1]
+ %tmp54 = bitcast i8 %tmp99 to i8 ; <i8> [#uses=1]
+ %tmp54.upgrd.1 = zext i8 %tmp54 to i32 ; <i32> [#uses=1]
+ %tmp55 = lshr i32 %tmp54.upgrd.1, 3 ; <i32> [#uses=1]
+ %tmp55.upgrd.2 = trunc i32 %tmp55 to i16 ; <i16> [#uses=1]
+ %tmp52 = shl i16 %tmp51, 5 ; <i16> [#uses=1]
+ %tmp56 = and i16 %tmp55.upgrd.2, 28 ; <i16> [#uses=1]
+ %tmp57 = or i16 %tmp56, %tmp52 ; <i16> [#uses=1]
+ %tmp60 = zext i16 %tmp57 to i32 ; <i32> [#uses=1]
+ %tmp62 = xor i32 0, 65535 ; <i32> [#uses=1]
+ %tmp63 = mul i32 %tmp60, %tmp62 ; <i32> [#uses=1]
+ %tmp65 = add i32 0, %tmp63 ; <i32> [#uses=1]
+ %tmp69 = add i32 0, %tmp65 ; <i32> [#uses=1]
+ %tmp70 = lshr i32 %tmp69, 16 ; <i32> [#uses=1]
+ %tmp70.upgrd.3 = trunc i32 %tmp70 to i16 ; <i16> [#uses=1]
+ %tmp75 = lshr i16 %tmp70.upgrd.3, 8 ; <i16> [#uses=1]
+ %tmp75.upgrd.4 = trunc i16 %tmp75 to i8 ; <i8> [#uses=1]
+ %tmp76 = lshr i8 %tmp75.upgrd.4, 5 ; <i8> [#uses=1]
+ store i8 %tmp76, i8* null
+ ret void
+
+cond_next80: ; preds = %bb.preheader
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/Generic/2007-01-15-LoadSelectCycle.ll b/test/CodeGen/Generic/2007-01-15-LoadSelectCycle.ll
new file mode 100644
index 0000000..255b120
--- /dev/null
+++ b/test/CodeGen/Generic/2007-01-15-LoadSelectCycle.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s
+; PR1114
+
+declare i1 @foo()
+
+define i32 @test(i32* %A, i32* %B) {
+ %a = load i32* %A
+ %b = load i32* %B
+ %cond = call i1 @foo()
+ %c = select i1 %cond, i32 %a, i32 %b
+ ret i32 %c
+}
diff --git a/test/CodeGen/Generic/2007-02-16-BranchFold.ll b/test/CodeGen/Generic/2007-02-16-BranchFold.ll
new file mode 100644
index 0000000..6bf5631
--- /dev/null
+++ b/test/CodeGen/Generic/2007-02-16-BranchFold.ll
@@ -0,0 +1,95 @@
+; PR 1200
+; RUN: llc < %s -enable-tail-merge=0 | not grep jmp
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8"
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.Index_Map = type { i32, %struct.item_set** }
+ %struct.Item = type { [4 x i16], %struct.rule* }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* }
+ %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* }
+ %struct.list = type { i8*, %struct.list* }
+ %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** }
+ %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* }
+ %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* }
+ %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] }
+ %struct.plank = type { i8*, %struct.list*, i32 }
+ %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* }
+ %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 }
+ %struct.stateMap = type { i8*, %struct.plank*, i32, i16* }
+ %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** }
+@outfile = external global %struct.FILE* ; <%struct.FILE**> [#uses=1]
+@str1 = external global [11 x i8] ; <[11 x i8]*> [#uses=1]
+
+declare i32 @fprintf(%struct.FILE*, i8*, ...)
+
+define i16 @main_bb_2E_i9_2E_i_2E_i932_2E_ce(%struct.list* %l_addr.01.0.i2.i.i929, %struct.operator** %tmp66.i62.i.out) {
+newFuncRoot:
+ br label %bb.i9.i.i932.ce
+
+NewDefault: ; preds = %LeafBlock, %LeafBlock1, %LeafBlock2, %LeafBlock3
+ br label %bb36.i.i.exitStub
+
+bb36.i.i.exitStub: ; preds = %NewDefault
+ store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
+ ret i16 0
+
+bb.i14.i.exitStub: ; preds = %LeafBlock
+ store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
+ ret i16 1
+
+bb12.i.i935.exitStub: ; preds = %LeafBlock1
+ store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
+ ret i16 2
+
+bb20.i.i937.exitStub: ; preds = %LeafBlock2
+ store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
+ ret i16 3
+
+bb28.i.i938.exitStub: ; preds = %LeafBlock3
+ store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out
+ ret i16 4
+
+bb.i9.i.i932.ce: ; preds = %newFuncRoot
+ %tmp1.i3.i.i930 = getelementptr %struct.list* %l_addr.01.0.i2.i.i929, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp2.i4.i.i931 = load i8** %tmp1.i3.i.i930 ; <i8*> [#uses=1]
+ %tmp66.i62.i = bitcast i8* %tmp2.i4.i.i931 to %struct.operator* ; <%struct.operator*> [#uses=7]
+ %tmp1.i6.i = getelementptr %struct.operator* %tmp66.i62.i, i32 0, i32 2 ; <i32*> [#uses=1]
+ %tmp2.i7.i = load i32* %tmp1.i6.i ; <i32> [#uses=1]
+ %tmp3.i8.i = load %struct.FILE** @outfile ; <%struct.FILE*> [#uses=1]
+ %tmp5.i9.i = call i32 (%struct.FILE*, i8*, ...)* @fprintf( %struct.FILE* %tmp3.i8.i, i8* getelementptr ([11 x i8]* @str1, i32 0, i32 0), i32 %tmp2.i7.i ) ; <i32> [#uses=0]
+ %tmp7.i10.i = getelementptr %struct.operator* %tmp66.i62.i, i32 0, i32 5 ; <i32*> [#uses=1]
+ %tmp8.i11.i = load i32* %tmp7.i10.i ; <i32> [#uses=7]
+ br label %NodeBlock5
+
+NodeBlock5: ; preds = %bb.i9.i.i932.ce
+ icmp slt i32 %tmp8.i11.i, 1 ; <i1>:0 [#uses=1]
+ br i1 %0, label %NodeBlock, label %NodeBlock4
+
+NodeBlock4: ; preds = %NodeBlock5
+ icmp slt i32 %tmp8.i11.i, 2 ; <i1>:1 [#uses=1]
+ br i1 %1, label %LeafBlock2, label %LeafBlock3
+
+LeafBlock3: ; preds = %NodeBlock4
+ icmp eq i32 %tmp8.i11.i, 2 ; <i1>:2 [#uses=1]
+ br i1 %2, label %bb28.i.i938.exitStub, label %NewDefault
+
+LeafBlock2: ; preds = %NodeBlock4
+ icmp eq i32 %tmp8.i11.i, 1 ; <i1>:3 [#uses=1]
+ br i1 %3, label %bb20.i.i937.exitStub, label %NewDefault
+
+NodeBlock: ; preds = %NodeBlock5
+ icmp slt i32 %tmp8.i11.i, 0 ; <i1>:4 [#uses=1]
+ br i1 %4, label %LeafBlock, label %LeafBlock1
+
+LeafBlock1: ; preds = %NodeBlock
+ icmp eq i32 %tmp8.i11.i, 0 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb12.i.i935.exitStub, label %NewDefault
+
+LeafBlock: ; preds = %NodeBlock
+ icmp eq i32 %tmp8.i11.i, -1 ; <i1>:6 [#uses=1]
+ br i1 %6, label %bb.i14.i.exitStub, label %NewDefault
+}
diff --git a/test/CodeGen/Generic/2007-02-25-invoke.ll b/test/CodeGen/Generic/2007-02-25-invoke.ll
new file mode 100644
index 0000000..6e20eaa
--- /dev/null
+++ b/test/CodeGen/Generic/2007-02-25-invoke.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s
+
+; PR1224
+
+declare i32 @test()
+define i32 @test2() {
+ %A = invoke i32 @test() to label %invcont unwind label %blat
+invcont:
+ ret i32 %A
+blat:
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll b/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll
new file mode 100644
index 0000000..339f0f7
--- /dev/null
+++ b/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+; XFAIL: sparc-sun-solaris2
+; PR1308
+; PR1557
+
+define i32 @stuff(i32, ...) {
+ %foo = alloca i8*
+ %bar = alloca i32*
+ %A = call i32 asm sideeffect "inline asm $0 $2 $3 $4", "=r,0,i,m,m"( i32 0, i32 1, i8** %foo, i32** %bar )
+ ret i32 %A
+}
diff --git a/test/CodeGen/Generic/2007-04-13-SwitchLowerBadPhi.ll b/test/CodeGen/Generic/2007-04-13-SwitchLowerBadPhi.ll
new file mode 100644
index 0000000..a0b1403
--- /dev/null
+++ b/test/CodeGen/Generic/2007-04-13-SwitchLowerBadPhi.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -O0
+; PR 1323
+
+; ModuleID = 'test.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+ %struct.comp = type { i8*, i32, i8*, [3 x i8], i32 }
+
+define void @regbranch() {
+cond_next240.i:
+ br i1 false, label %cond_true251.i, label %cond_next272.i
+
+cond_true251.i: ; preds = %cond_next240.i
+ switch i8 0, label %cond_next272.i [
+ i8 42, label %bb268.i
+ i8 43, label %bb268.i
+ i8 63, label %bb268.i
+ ]
+
+bb268.i: ; preds = %cond_true251.i, %cond_true251.i, %cond_true251.i
+ br label %cond_next272.i
+
+cond_next272.i: ; preds = %bb268.i, %cond_true251.i, %cond_next240.i
+ %len.2.i = phi i32 [ 0, %bb268.i ], [ 0, %cond_next240.i ], [ 0, %cond_true251.i ] ; <i32> [#uses=1]
+ %tmp278.i = icmp eq i32 %len.2.i, 1 ; <i1> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/Generic/2007-04-17-lsr-crash.ll b/test/CodeGen/Generic/2007-04-17-lsr-crash.ll
new file mode 100644
index 0000000..98f87e5
--- /dev/null
+++ b/test/CodeGen/Generic/2007-04-17-lsr-crash.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s
+
+define void @foo(i32 %inTextSize) {
+entry:
+ br label %bb236.outer
+
+cond_next193: ; preds = %bb236
+ %tmp211 = add i32 %inTextSize_addr.1.ph17, -2 ; <i32> [#uses=1]
+ br i1 false, label %cond_next232, label %cond_true227
+
+cond_true227: ; preds = %cond_next193
+ ret void
+
+cond_next232: ; preds = %cond_next193
+ %indvar.next49 = add i32 %indvar48, 1 ; <i32> [#uses=1]
+ br label %bb236.outer
+
+bb236.outer: ; preds = %cond_next232, %entry
+ %indvar48 = phi i32 [ %indvar.next49, %cond_next232 ], [ 0, %entry ] ; <i32> [#uses=2]
+ %inTextSize_addr.1.ph17 = phi i32 [ %tmp211, %cond_next232 ], [ %inTextSize, %entry ] ; <i32> [#uses=3]
+ %tmp.50 = sub i32 0, %indvar48 ; <i32> [#uses=1]
+ %tmp219 = icmp eq i32 %tmp.50, 0 ; <i1> [#uses=1]
+ br i1 %tmp219, label %bb236.us, label %bb236
+
+bb236.us: ; preds = %bb236.outer
+ %inTextSize_addr.1.us = add i32 0, %inTextSize_addr.1.ph17 ; <i32> [#uses=0]
+ ret void
+
+bb236: ; preds = %bb236.outer
+ %tmp238 = icmp eq i32 %inTextSize_addr.1.ph17, 0 ; <i1> [#uses=1]
+ br i1 %tmp238, label %exit, label %cond_next193
+
+exit: ; preds = %bb236
+ ret void
+}
diff --git a/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll b/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
new file mode 100644
index 0000000..af522dc
--- /dev/null
+++ b/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s
+
+; Test that we can have an "X" output constraint.
+
+define void @test(i16 * %t) {
+ call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"( i16* %t )
+ ret void
+}
diff --git a/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll b/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll
new file mode 100644
index 0000000..f2c9b7f
--- /dev/null
+++ b/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s
+
+ %struct..0anon = type { [100 x i32] }
+
+define void @test() {
+entry:
+ %currfpu = alloca %struct..0anon, align 16 ; <%struct..0anon*> [#uses=2]
+ %mxcsr = alloca %struct..0anon, align 16 ; <%struct..0anon*> [#uses=1]
+ call void asm sideeffect "fnstenv $0", "=*m,~{dirflag},~{fpsr},~{flags}"( %struct..0anon* %currfpu )
+ call void asm sideeffect "$0 $1", "=*m,*m,~{dirflag},~{fpsr},~{flags}"( %struct..0anon* %mxcsr, %struct..0anon* %currfpu )
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll b/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll
new file mode 100644
index 0000000..568b88f
--- /dev/null
+++ b/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s
+; PR1228
+
+ "struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* }
+ "struct.std::locale" = type { "struct.std::locale::_Impl"* }
+ "struct.std::locale::_Impl" = type { i32, "struct.std::locale::facet"**, i32, "struct.std::locale::facet"**, i8** }
+ "struct.std::locale::facet" = type { i32 (...)**, i32 }
+ "struct.std::string" = type { "struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" }
+
+define void @_ZNKSt6locale4nameEv("struct.std::string"* %agg.result) {
+entry:
+ %tmp105 = icmp eq i8* null, null ; <i1> [#uses=1]
+ br i1 %tmp105, label %cond_true, label %cond_true222
+
+cond_true: ; preds = %entry
+ invoke void @_ZNSs14_M_replace_auxEjjjc( )
+ to label %cond_next1328 unwind label %cond_true1402
+
+cond_true222: ; preds = %cond_true222, %entry
+ %tmp207 = call i32 @strcmp( ) ; <i32> [#uses=1]
+ %tmp208 = icmp eq i32 %tmp207, 0 ; <i1> [#uses=2]
+ %bothcond1480 = and i1 %tmp208, false ; <i1> [#uses=1]
+ br i1 %bothcond1480, label %cond_true222, label %cond_next226.loopexit
+
+cond_next226.loopexit: ; preds = %cond_true222
+ %phitmp = xor i1 %tmp208, true ; <i1> [#uses=1]
+ br i1 %phitmp, label %cond_false280, label %cond_true235
+
+cond_true235: ; preds = %cond_next226.loopexit
+ invoke void @_ZNSs6assignEPKcj( )
+ to label %cond_next1328 unwind label %cond_true1402
+
+cond_false280: ; preds = %cond_next226.loopexit
+ invoke void @_ZNSs7reserveEj( )
+ to label %invcont282 unwind label %cond_true1402
+
+invcont282: ; preds = %cond_false280
+ invoke void @_ZNSs6appendEPKcj( )
+ to label %invcont317 unwind label %cond_true1402
+
+invcont317: ; preds = %invcont282
+ ret void
+
+cond_next1328: ; preds = %cond_true235, %cond_true
+ ret void
+
+cond_true1402: ; preds = %invcont282, %cond_false280, %cond_true235, %cond_true
+ ret void
+}
+
+declare void @_ZNSs14_M_replace_auxEjjjc()
+
+declare i32 @strcmp()
+
+declare void @_ZNSs6assignEPKcj()
+
+declare void @_ZNSs7reserveEj()
+
+declare void @_ZNSs6appendEPKcj()
diff --git a/test/CodeGen/Generic/2007-05-03-EHTypeInfo.ll b/test/CodeGen/Generic/2007-05-03-EHTypeInfo.ll
new file mode 100644
index 0000000..bb774b4
--- /dev/null
+++ b/test/CodeGen/Generic/2007-05-03-EHTypeInfo.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -enable-eh
+
+ %struct.exception = type { i8, i8, i32, i8*, i8*, i32, i8* }
+@program_error = external global %struct.exception ; <%struct.exception*> [#uses=1]
+
+define void @typeinfo() {
+entry:
+ %eh_typeid = tail call i32 @llvm.eh.typeid.for.i32( i8* getelementptr (%struct.exception* @program_error, i32 0, i32 0) ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @llvm.eh.typeid.for.i32(i8*)
diff --git a/test/CodeGen/Generic/2007-05-05-Personality.ll b/test/CodeGen/Generic/2007-05-05-Personality.ll
new file mode 100644
index 0000000..2749326
--- /dev/null
+++ b/test/CodeGen/Generic/2007-05-05-Personality.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -enable-eh -o - | grep zPLR
+
+@error = external global i8 ; <i8*> [#uses=2]
+
+define void @_ada_x() {
+entry:
+ invoke void @raise( )
+ to label %eh_then unwind label %unwind
+
+unwind: ; preds = %entry
+ %eh_ptr = tail call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i8* @error ) ; <i32> [#uses=1]
+ %eh_typeid = tail call i32 @llvm.eh.typeid.for.i32( i8* @error ) ; <i32> [#uses=1]
+ %tmp2 = icmp eq i32 %eh_select, %eh_typeid ; <i1> [#uses=1]
+ br i1 %tmp2, label %eh_then, label %Unwind
+
+eh_then: ; preds = %unwind, %entry
+ ret void
+
+Unwind: ; preds = %unwind
+ tail call i32 (...)* @_Unwind_Resume( i8* %eh_ptr ) ; <i32>:0 [#uses=0]
+ unreachable
+}
+
+declare void @raise()
+
+declare i8* @llvm.eh.exception()
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...)
+
+declare i32 @llvm.eh.typeid.for.i32(i8*)
+
+declare i32 @__gnat_eh_personality(...)
+
+declare i32 @_Unwind_Resume(...)
diff --git a/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll b/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll
new file mode 100644
index 0000000..b989819
--- /dev/null
+++ b/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll
@@ -0,0 +1,90 @@
+; RUN: llc < %s
+
+ %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+ %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
+ %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
+ %struct.AVEvalExpr = type opaque
+ %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+ %struct.AVOption = type opaque
+ %struct.AVPaletteControl = type { i32, [256 x i32] }
+ %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+ %struct.AVRational = type { i32, i32 }
+ %struct.DSPContext = type { void (i16*, i8*, i32)*, void (i16*, i8*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, void (i16*)*, i32 (i8*, i32)*, i32 (i8*, i32)*, [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], i32 (i8*, i16*, i32)*, [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [2 x void (i8*, i8*, i8*, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [8 x void (i8*, i8*, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [10 x void (i8*, i32, i32, i32, i32)*], [10 x void (i8*, i8*, i32, i32, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i16*, i32)*, [2 x [4 x i32 (i8*, i8*, i8*, i32, i32)*]], void (i8*, i8*, i32)*, void (i8*, i8*, i8*, i32)*, void (i8*, i8*, i8*, i32, i32*, i32*)*, void (i32*, i32*, i32)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32)*, void (i8*, i32, i32, i32)*, void ([4 x [4 x i16]]*, i8*, [40 x i8]*, [40 x [2 x i16]]*, i32, i32, i32, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32)*, void (float*, float*, i32)*, void (float*, float*, i32)*, void (float*, float*, float*, i32)*, void (float*, float*, float*, float*, i32, i32, i32)*, void (i16*, float*, i32)*, void (i16*)*, void (i16*)*, void (i16*)*, void (i8*, i32, i16*)*, void (i8*, i32, i16*)*, [64 x i8], i32, i32 (i16*, i16*, i16*, i32)*, void (i16*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void ([4 x i16]*)*, void (i32*, i32*, i32*, i32*, i32*, i32*, i32)*, void (i32*, i32)*, void (i8*, i32, i8**, i32, i32, i32, i32, i32, %struct.slice_buffer*, i32, i8*)*, void (i8*, i32, i32)*, [4 x void (i8*, i32, i8*, i32, i32, i32)*], void (i16*)*, void (i16*, i32)*, void (i16*, i32)*, void (i16*, i32)*, void (i8*, i32)*, void (i8*, i32)*, [16 x void (i8*, i8*, i32, i32)*] }
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct.GetBitContext = type { i8*, i8*, i32*, i32, i32, i32, i32 }
+ %struct.MJpegContext = type opaque
+ %struct.MotionEstContext = type { %struct.AVCodecContext*, i32, [4 x [2 x i32]], [4 x [2 x i32]], i8*, i8*, [2 x i8*], i8*, i32, i32*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x [4 x i8*]], [4 x [4 x i8*]], i32, i32, i32, i32, i32, [4 x void (i8*, i8*, i32, i32)*]*, [4 x void (i8*, i8*, i32, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [4097 x i8]*, i8*, i32 (%struct.MpegEncContext*, i32*, i32*, i32, i32, i32, i32, i32)* }
+ %struct.MpegEncContext = type { %struct.AVCodecContext*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Picture*, %struct.Picture**, %struct.Picture**, i32, i32, [8 x %struct.MpegEncContext*], %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture*, %struct.Picture*, %struct.Picture*, [3 x i8*], [3 x i32], i16*, [3 x i16*], [20 x i16], i32, i32, i8*, i8*, i8*, i8*, i8*, [16 x i16]*, [3 x [16 x i16]*], i32, i8*, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, i32, i32, %struct.DSPContext, i32, i32, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i8*], [2 x [2 x i8*]], i32, i32, i32, [2 x [4 x [2 x i32]]], [2 x [2 x i32]], [2 x [2 x [2 x i32]]], i8*, [2 x [64 x i16]], %struct.MotionEstContext, i32, i32, i32, i32, i32, i32, i16*, [6 x i32], [6 x i32], [3 x i8*], i32*, [64 x i16], [64 x i16], [64 x i16], [64 x i16], i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [8 x i32], [64 x i32]*, [64 x i32]*, [2 x [64 x i16]]*, [2 x [64 x i16]]*, [12 x i32], %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, [64 x i32]*, [2 x i32], [64 x i16]*, i8*, i64, i64, i32, i32, %struct.RateControlContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, %struct.GetBitContext, i32, i32, i32, %struct.ParseContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [2 x i32]], [2 x [2 x i32]], [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, [3 x i32], %struct.MJpegContext*, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [65 x [65 x [2 x i32]]]]*, i32, i32, %struct.GetBitContext, i32, i32, i32, i8*, i32, [2 x [2 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i8*, i32, [12 x i16*], [64 x i16]*, [8 x [64 x i16]]*, i32 (%struct.MpegEncContext*, [64 x i16]*)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, void (%struct.MpegEncContext*, i16*)* }
+ %struct.ParseContext = type { i8*, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.Picture = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*], [3 x i8*], [2 x [2 x i16]*], i32*, [2 x i32], i32, i32, i32, i32, [2 x [16 x i32]], [2 x i32], i32, i32, i16*, i16*, i8*, i32*, i32 }
+ %struct.Predictor = type { double, double, double }
+ %struct.PutBitContext = type { i32, i32, i8*, i8*, i8* }
+ %struct.RateControlContext = type { %struct.FILE*, i32, %struct.RateControlEntry*, double, [5 x %struct.Predictor], double, double, double, double, double, [5 x double], i32, i32, [5 x i64], [5 x i64], [5 x i64], [5 x i64], [5 x i32], i32, i8*, float, i32, %struct.AVEvalExpr* }
+ %struct.RateControlEntry = type { i32, float, i32, i32, i32, i32, i32, i64, i32, float, i32, i32, i32, i32, i32, i32 }
+ %struct.RcOverride = type { i32, i32, i32, float }
+ %struct.ScanTable = type { i8*, [64 x i8], [64 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+ %struct.slice_buffer = type opaque
+
+define float @ff_rate_estimate_qscale(%struct.MpegEncContext* %s, i32 %dry_run) {
+entry:
+ br i1 false, label %cond_false163, label %cond_true135
+
+cond_true135: ; preds = %entry
+ ret float 0.000000e+00
+
+cond_false163: ; preds = %entry
+ br i1 false, label %cond_true203, label %cond_next211
+
+cond_true203: ; preds = %cond_false163
+ ret float 0.000000e+00
+
+cond_next211: ; preds = %cond_false163
+ br i1 false, label %cond_false243, label %cond_true220
+
+cond_true220: ; preds = %cond_next211
+ br i1 false, label %cond_next237, label %cond_true225
+
+cond_true225: ; preds = %cond_true220
+ ret float 0.000000e+00
+
+cond_next237: ; preds = %cond_true220
+ br i1 false, label %cond_false785, label %cond_true735
+
+cond_false243: ; preds = %cond_next211
+ ret float 0.000000e+00
+
+cond_true735: ; preds = %cond_next237
+ ret float 0.000000e+00
+
+cond_false785: ; preds = %cond_next237
+ br i1 false, label %cond_true356.i.preheader, label %bb359.i
+
+cond_true356.i.preheader: ; preds = %cond_false785
+ %tmp116117.i = zext i8 0 to i32 ; <i32> [#uses=1]
+ br i1 false, label %cond_false.i, label %cond_next159.i
+
+cond_false.i: ; preds = %cond_true356.i.preheader
+ ret float 0.000000e+00
+
+cond_next159.i: ; preds = %cond_true356.i.preheader
+ %tmp178.i = add i32 %tmp116117.i, -128 ; <i32> [#uses=2]
+ %tmp181.i = mul i32 %tmp178.i, %tmp178.i ; <i32> [#uses=1]
+ %tmp181182.i = sitofp i32 %tmp181.i to float ; <float> [#uses=1]
+ %tmp199200.pn.in.i = fmul float %tmp181182.i, 0.000000e+00 ; <float> [#uses=1]
+ %tmp199200.pn.i = fpext float %tmp199200.pn.in.i to double ; <double> [#uses=1]
+ %tmp201.pn.i = fsub double 1.000000e+00, %tmp199200.pn.i ; <double> [#uses=1]
+ %factor.2.in.i = fmul double 0.000000e+00, %tmp201.pn.i ; <double> [#uses=1]
+ %factor.2.i = fptrunc double %factor.2.in.i to float ; <float> [#uses=1]
+ br i1 false, label %cond_next312.i, label %cond_false222.i
+
+cond_false222.i: ; preds = %cond_next159.i
+ ret float 0.000000e+00
+
+cond_next312.i: ; preds = %cond_next159.i
+ %tmp313314.i = fpext float %factor.2.i to double ; <double> [#uses=0]
+ ret float 0.000000e+00
+
+bb359.i: ; preds = %cond_false785
+ ret float 0.000000e+00
+}
diff --git a/test/CodeGen/Generic/2007-11-21-UndeadIllegalNode.ll b/test/CodeGen/Generic/2007-11-21-UndeadIllegalNode.ll
new file mode 100644
index 0000000..e220be6
--- /dev/null
+++ b/test/CodeGen/Generic/2007-11-21-UndeadIllegalNode.ll
@@ -0,0 +1,159 @@
+; RUN: llc < %s -o -
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.RETURN = type { i32, i32 }
+ %struct.ada__finalization__controlled = type { %struct.system__finalization_root__root_controlled }
+ %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* }
+ %struct.ada__strings__unbounded__string_access = type { i8*, %struct.RETURN* }
+ %struct.ada__strings__unbounded__unbounded_string = type { %struct.ada__finalization__controlled, %struct.ada__strings__unbounded__string_access, i32 }
+ %struct.ada__tags__dispatch_table = type { [1 x i32] }
+ %struct.exception = type { i8, i8, i32, i8*, i8*, i32, i8* }
+ %struct.system__finalization_root__root_controlled = type { %struct.ada__streams__root_stream_type, %struct.system__finalization_root__root_controlled*, %struct.system__finalization_root__root_controlled* }
+ %struct.system__standard_library__exception_data = type { i8, i8, i32, i32, %struct.system__standard_library__exception_data*, i32, void ()* }
[email protected] = internal constant %struct.RETURN { i32 1, i32 16 } ; <%struct.RETURN*> [#uses=1]
+@ada__strings__index_error = external global %struct.exception ; <%struct.exception*> [#uses=1]
[email protected] = internal constant [16 x i8] c"a-strunb.adb:690" ; <[16 x i8]*> [#uses=1]
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare void @ada__strings__unbounded__realloc_for_chunk(%struct.ada__strings__unbounded__unbounded_string*, i32)
+
+declare void @__gnat_raise_exception(%struct.system__standard_library__exception_data*, i64)
+
+define void @ada__strings__unbounded__insert__2(%struct.ada__strings__unbounded__unbounded_string* %source, i32 %before, i64 %new_item.0.0) {
+entry:
+ %tmp24636 = lshr i64 %new_item.0.0, 32 ; <i64> [#uses=1]
+ %tmp24637 = trunc i64 %tmp24636 to i32 ; <i32> [#uses=1]
+ %tmp24638 = inttoptr i32 %tmp24637 to %struct.RETURN* ; <%struct.RETURN*> [#uses=2]
+ %tmp25 = getelementptr %struct.RETURN* %tmp24638, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp26 = load i32* %tmp25, align 4 ; <i32> [#uses=1]
+ %tmp29 = getelementptr %struct.RETURN* %tmp24638, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp30 = load i32* %tmp29, align 4 ; <i32> [#uses=1]
+ %tmp63 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 1, i32 1 ; <%struct.RETURN**> [#uses=5]
+ %tmp64 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
+ %tmp65 = getelementptr %struct.RETURN* %tmp64, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp66 = load i32* %tmp65, align 4 ; <i32> [#uses=1]
+ %tmp67 = icmp sgt i32 %tmp66, %before ; <i1> [#uses=1]
+ br i1 %tmp67, label %bb77, label %bb
+
+bb: ; preds = %entry
+ %tmp71 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 2 ; <i32*> [#uses=4]
+ %tmp72 = load i32* %tmp71, align 4 ; <i32> [#uses=1]
+ %tmp73 = add i32 %tmp72, 1 ; <i32> [#uses=1]
+ %tmp74 = icmp slt i32 %tmp73, %before ; <i1> [#uses=1]
+ br i1 %tmp74, label %bb77, label %bb84
+
+bb77: ; preds = %bb, %entry
+ tail call void @__gnat_raise_exception( %struct.system__standard_library__exception_data* bitcast (%struct.exception* @ada__strings__index_error to %struct.system__standard_library__exception_data*), i64 or (i64 zext (i32 ptrtoint ([16 x i8]* @.str5 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.RETURN* @C.495.7639 to i32) to i64), i64 32)) )
+ unreachable
+
+bb84: ; preds = %bb
+ %tmp93 = sub i32 %tmp30, %tmp26 ; <i32> [#uses=2]
+ %tmp9394 = sext i32 %tmp93 to i36 ; <i36> [#uses=1]
+ %tmp95 = shl i36 %tmp9394, 3 ; <i36> [#uses=1]
+ %tmp96 = add i36 %tmp95, 8 ; <i36> [#uses=2]
+ %tmp97 = icmp sgt i36 %tmp96, -1 ; <i1> [#uses=1]
+ %tmp100 = select i1 %tmp97, i36 %tmp96, i36 0 ; <i36> [#uses=2]
+ %tmp101 = icmp slt i36 %tmp100, 17179869177 ; <i1> [#uses=1]
+ %tmp100.cast = trunc i36 %tmp100 to i32 ; <i32> [#uses=1]
+ %min102 = select i1 %tmp101, i32 %tmp100.cast, i32 -8 ; <i32> [#uses=1]
+ tail call void @ada__strings__unbounded__realloc_for_chunk( %struct.ada__strings__unbounded__unbounded_string* %source, i32 %min102 )
+ %tmp148 = load i32* %tmp71, align 4 ; <i32> [#uses=4]
+ %tmp152 = add i32 %tmp93, 1 ; <i32> [#uses=2]
+ %tmp153 = icmp sgt i32 %tmp152, -1 ; <i1> [#uses=1]
+ %max154 = select i1 %tmp153, i32 %tmp152, i32 0 ; <i32> [#uses=5]
+ %tmp155 = add i32 %tmp148, %max154 ; <i32> [#uses=5]
+ %tmp315 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 1, i32 0 ; <i8**> [#uses=4]
+ %tmp328 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
+ %tmp329 = getelementptr %struct.RETURN* %tmp328, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp330 = load i32* %tmp329, align 4 ; <i32> [#uses=4]
+ %tmp324 = add i32 %max154, %before ; <i32> [#uses=3]
+ %tmp331 = sub i32 %tmp324, %tmp330 ; <i32> [#uses=1]
+ %tmp349 = sub i32 %before, %tmp330 ; <i32> [#uses=1]
+ %tmp356 = icmp sgt i32 %tmp331, %tmp349 ; <i1> [#uses=1]
+ %tmp431 = icmp sgt i32 %tmp324, %tmp155 ; <i1> [#uses=2]
+ br i1 %tmp356, label %bb420, label %bb359
+
+bb359: ; preds = %bb84
+ br i1 %tmp431, label %bb481, label %bb382
+
+bb382: ; preds = %bb382, %bb359
+ %indvar = phi i32 [ 0, %bb359 ], [ %indvar.next, %bb382 ] ; <i32> [#uses=2]
+ %max379.pn = phi i32 [ %max154, %bb359 ], [ %L492b.0, %bb382 ] ; <i32> [#uses=1]
+ %before.pn = phi i32 [ %before, %bb359 ], [ 1, %bb382 ] ; <i32> [#uses=1]
+ %L492b.0 = add i32 %before.pn, %max379.pn ; <i32> [#uses=3]
+ %tmp386 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
+ %tmp387 = getelementptr %struct.RETURN* %tmp386, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp388 = load i32* %tmp387, align 4 ; <i32> [#uses=2]
+ %tmp392 = load i8** %tmp315, align 4 ; <i8*> [#uses=2]
+ %R493b.0 = add i32 %indvar, %before ; <i32> [#uses=1]
+ %tmp405 = sub i32 %R493b.0, %tmp388 ; <i32> [#uses=1]
+ %tmp406 = getelementptr i8* %tmp392, i32 %tmp405 ; <i8*> [#uses=1]
+ %tmp407 = load i8* %tmp406, align 1 ; <i8> [#uses=1]
+ %tmp408 = sub i32 %L492b.0, %tmp388 ; <i32> [#uses=1]
+ %tmp409 = getelementptr i8* %tmp392, i32 %tmp408 ; <i8*> [#uses=1]
+ store i8 %tmp407, i8* %tmp409, align 1
+ %tmp414 = icmp eq i32 %L492b.0, %tmp155 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp414, label %bb481, label %bb382
+
+bb420: ; preds = %bb84
+ br i1 %tmp431, label %bb481, label %bb436.preheader
+
+bb436.preheader: ; preds = %bb420
+ %tmp4468 = load i8** %tmp315, align 4 ; <i8*> [#uses=2]
+ %tmp4599 = sub i32 %tmp148, %tmp330 ; <i32> [#uses=1]
+ %tmp46010 = getelementptr i8* %tmp4468, i32 %tmp4599 ; <i8*> [#uses=1]
+ %tmp46111 = load i8* %tmp46010, align 1 ; <i8> [#uses=1]
+ %tmp46212 = sub i32 %tmp155, %tmp330 ; <i32> [#uses=1]
+ %tmp46313 = getelementptr i8* %tmp4468, i32 %tmp46212 ; <i8*> [#uses=1]
+ store i8 %tmp46111, i8* %tmp46313, align 1
+ %exitcond14 = icmp eq i32 %tmp155, %tmp324 ; <i1> [#uses=1]
+ br i1 %exitcond14, label %bb481, label %bb.nph
+
+bb.nph: ; preds = %bb436.preheader
+ %tmp5 = sub i32 %tmp148, %before ; <i32> [#uses=1]
+ br label %bb478
+
+bb478: ; preds = %bb478, %bb.nph
+ %indvar6422 = phi i32 [ 0, %bb.nph ], [ %indvar.next643, %bb478 ] ; <i32> [#uses=1]
+ %indvar.next643 = add i32 %indvar6422, 1 ; <i32> [#uses=4]
+ %L490b.0 = sub i32 %tmp155, %indvar.next643 ; <i32> [#uses=1]
+ %R491b.0 = sub i32 %tmp148, %indvar.next643 ; <i32> [#uses=1]
+ %tmp440 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
+ %tmp441 = getelementptr %struct.RETURN* %tmp440, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp442 = load i32* %tmp441, align 4 ; <i32> [#uses=2]
+ %tmp446 = load i8** %tmp315, align 4 ; <i8*> [#uses=2]
+ %tmp459 = sub i32 %R491b.0, %tmp442 ; <i32> [#uses=1]
+ %tmp460 = getelementptr i8* %tmp446, i32 %tmp459 ; <i8*> [#uses=1]
+ %tmp461 = load i8* %tmp460, align 1 ; <i8> [#uses=1]
+ %tmp462 = sub i32 %L490b.0, %tmp442 ; <i32> [#uses=1]
+ %tmp463 = getelementptr i8* %tmp446, i32 %tmp462 ; <i8*> [#uses=1]
+ store i8 %tmp461, i8* %tmp463, align 1
+ %exitcond = icmp eq i32 %indvar.next643, %tmp5 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb481, label %bb478
+
+bb481: ; preds = %bb478, %bb436.preheader, %bb420, %bb382, %bb359
+ %tmp577 = add i32 %before, -1 ; <i32> [#uses=3]
+ %tmp578 = add i32 %max154, %tmp577 ; <i32> [#uses=2]
+ %tmp581 = icmp sge i32 %tmp578, %tmp577 ; <i1> [#uses=1]
+ %max582 = select i1 %tmp581, i32 %tmp578, i32 %tmp577 ; <i32> [#uses=1]
+ %tmp584 = sub i32 %max582, %before ; <i32> [#uses=1]
+ %tmp585 = add i32 %tmp584, 1 ; <i32> [#uses=2]
+ %tmp586 = icmp sgt i32 %tmp585, -1 ; <i1> [#uses=1]
+ %max587 = select i1 %tmp586, i32 %tmp585, i32 0 ; <i32> [#uses=1]
+ %tmp591 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1]
+ %tmp592 = getelementptr %struct.RETURN* %tmp591, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp593 = load i32* %tmp592, align 4 ; <i32> [#uses=1]
+ %tmp597 = load i8** %tmp315, align 4 ; <i8*> [#uses=1]
+ %tmp600621 = trunc i64 %new_item.0.0 to i32 ; <i32> [#uses=1]
+ %tmp600622 = inttoptr i32 %tmp600621 to i8* ; <i8*> [#uses=1]
+ %tmp601 = sub i32 %before, %tmp593 ; <i32> [#uses=1]
+ %tmp602 = getelementptr i8* %tmp597, i32 %tmp601 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32( i8* %tmp602, i8* %tmp600622, i32 %max587, i32 1 )
+ %tmp606 = load i32* %tmp71, align 4 ; <i32> [#uses=1]
+ %tmp613 = add i32 %tmp606, %max154 ; <i32> [#uses=1]
+ store i32 %tmp613, i32* %tmp71, align 4
+ ret void
+}
diff --git a/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll b/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll
new file mode 100644
index 0000000..bd26481
--- /dev/null
+++ b/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -enable-eh
+
+target triple = "i686-pc-linux-gnu"
+
+define fastcc void @bc__support__high_resolution_time__initialize_clock_rate() {
+entry:
+ invoke void asm "rdtsc\0A\09movl %eax, $0\0A\09movl %edx, $1", "=*imr,=*imr,~{dirflag},~{fpsr},~{flags},~{dx},~{ax}"( i32* null, i32* null )
+ to label %.noexc unwind label %cleanup144
+
+.noexc: ; preds = %entry
+ ret void
+
+cleanup144: ; preds = %entry
+ unwind
+}
diff --git a/test/CodeGen/Generic/2007-12-31-UnusedSelector.ll b/test/CodeGen/Generic/2007-12-31-UnusedSelector.ll
new file mode 100644
index 0000000..fc9164f
--- /dev/null
+++ b/test/CodeGen/Generic/2007-12-31-UnusedSelector.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -enable-eh
+; PR1833
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo }
+ %struct.__type_info_pseudo = type { i8*, i8* }
+@_ZTI2e1 = external constant %struct.__class_type_info_pseudo ; <%struct.__class_type_info_pseudo*> [#uses=1]
+
+define void @_Z7ex_testv() {
+entry:
+ invoke void @__cxa_throw( i8* null, i8* bitcast (%struct.__class_type_info_pseudo* @_ZTI2e1 to i8*), void (i8*)* null ) noreturn
+ to label %UnifiedUnreachableBlock unwind label %lpad
+
+bb14: ; preds = %lpad
+ unreachable
+
+lpad: ; preds = %entry
+ invoke void @__cxa_end_catch( )
+ to label %bb14 unwind label %lpad17
+
+lpad17: ; preds = %lpad
+ %eh_select20 = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* null, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null ) ; <i32> [#uses=0]
+ unreachable
+
+UnifiedUnreachableBlock: ; preds = %entry
+ unreachable
+}
+
+declare void @__cxa_throw(i8*, i8*, void (i8*)*) noreturn
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...)
+
+declare void @__cxa_end_catch()
+
+declare i32 @__gxx_personality_v0(...)
diff --git a/test/CodeGen/Generic/2008-01-25-dag-combine-mul.ll b/test/CodeGen/Generic/2008-01-25-dag-combine-mul.ll
new file mode 100644
index 0000000..314bb05
--- /dev/null
+++ b/test/CodeGen/Generic/2008-01-25-dag-combine-mul.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s
+; rdar://5707064
+
+define i32 @f(i16* %pc) {
+entry:
+ %acc = alloca i64, align 8 ; <i64*> [#uses=4]
+ %tmp97 = load i64* %acc, align 8 ; <i64> [#uses=1]
+ %tmp98 = and i64 %tmp97, 4294967295 ; <i64> [#uses=1]
+ %tmp99 = load i64* null, align 8 ; <i64> [#uses=1]
+ %tmp100 = and i64 %tmp99, 4294967295 ; <i64> [#uses=1]
+ %tmp101 = mul i64 %tmp98, %tmp100 ; <i64> [#uses=1]
+ %tmp103 = lshr i64 %tmp101, 0 ; <i64> [#uses=1]
+ %tmp104 = load i64* %acc, align 8 ; <i64> [#uses=1]
+ %.cast105 = zext i32 32 to i64 ; <i64> [#uses=1]
+ %tmp106 = lshr i64 %tmp104, %.cast105 ; <i64> [#uses=1]
+ %tmp107 = load i64* null, align 8 ; <i64> [#uses=1]
+ %tmp108 = and i64 %tmp107, 4294967295 ; <i64> [#uses=1]
+ %tmp109 = mul i64 %tmp106, %tmp108 ; <i64> [#uses=1]
+ %tmp112 = add i64 %tmp109, 0 ; <i64> [#uses=1]
+ %tmp116 = add i64 %tmp112, 0 ; <i64> [#uses=1]
+ %tmp117 = add i64 %tmp103, %tmp116 ; <i64> [#uses=1]
+ %tmp118 = load i64* %acc, align 8 ; <i64> [#uses=1]
+ %tmp120 = lshr i64 %tmp118, 0 ; <i64> [#uses=1]
+ %tmp121 = load i64* null, align 8 ; <i64> [#uses=1]
+ %tmp123 = lshr i64 %tmp121, 0 ; <i64> [#uses=1]
+ %tmp124 = mul i64 %tmp120, %tmp123 ; <i64> [#uses=1]
+ %tmp126 = shl i64 %tmp124, 0 ; <i64> [#uses=1]
+ %tmp127 = add i64 %tmp117, %tmp126 ; <i64> [#uses=1]
+ store i64 %tmp127, i64* %acc, align 8
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/2008-01-30-LoadCrash.ll b/test/CodeGen/Generic/2008-01-30-LoadCrash.ll
new file mode 100644
index 0000000..70c3aaa
--- /dev/null
+++ b/test/CodeGen/Generic/2008-01-30-LoadCrash.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s
+
[email protected] = external constant [63 x i8] ; <[63 x i8]*> [#uses=2]
+
+define i32 @mkstemps(i8* %pattern, i32 %suffix_len, i64 %tmp42.rle) nounwind {
+bb20:
+ br label %bb41
+
+bb41: ; preds = %bb20
+ %tmp8182 = trunc i64 %tmp42.rle to i32 ; <i32> [#uses=1]
+ %tmp83 = getelementptr [63 x i8]* @letters.3100, i32 0, i32 %tmp8182 ; <i8*> [#uses=1]
+ %tmp84 = load i8* %tmp83, align 1 ; <i8> [#uses=1]
+ store i8 %tmp84, i8* null, align 1
+ %tmp90 = urem i64 %tmp42.rle, 62 ; <i64> [#uses=1]
+ %tmp9091 = trunc i64 %tmp90 to i32 ; <i32> [#uses=1]
+ %tmp92 = getelementptr [63 x i8]* @letters.3100, i32 0, i32 %tmp9091 ; <i8*> [#uses=1]
+ store i8* %tmp92, i8** null, align 1
+ ret i32 -1
+}
diff --git a/test/CodeGen/Generic/2008-02-04-Ctlz.ll b/test/CodeGen/Generic/2008-02-04-Ctlz.ll
new file mode 100644
index 0000000..288bfd2
--- /dev/null
+++ b/test/CodeGen/Generic/2008-02-04-Ctlz.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s
+
[email protected] = internal constant [14 x i8] c"%lld %d %d %d\00"
+
+define i32 @main(i64 %arg) nounwind {
+entry:
+ %tmp37 = tail call i64 @llvm.ctlz.i64( i64 %arg ) ; <i64> [#uses=1]
+ %tmp47 = tail call i64 @llvm.cttz.i64( i64 %arg ) ; <i64> [#uses=1]
+ %tmp57 = tail call i64 @llvm.ctpop.i64( i64 %arg ) ; <i64> [#uses=1]
+ %tmp38 = trunc i64 %tmp37 to i32 ; <i32>:0 [#uses=1]
+ %tmp48 = trunc i64 %tmp47 to i32 ; <i32>:0 [#uses=1]
+ %tmp58 = trunc i64 %tmp57 to i32 ; <i32>:0 [#uses=1]
+ %tmp40 = tail call i32 (i8*, ...)* @printf( i8* noalias getelementptr ([14 x i8]* @.str, i32 0, i32 0), i64 %arg, i32 %tmp38, i32 %tmp48, i32 %tmp58 ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8* noalias , ...) nounwind
+
+declare i64 @llvm.ctlz.i64(i64) nounwind readnone
+declare i64 @llvm.cttz.i64(i64) nounwind readnone
+declare i64 @llvm.ctpop.i64(i64) nounwind readnone
diff --git a/test/CodeGen/Generic/2008-02-04-ExtractSubvector.ll b/test/CodeGen/Generic/2008-02-04-ExtractSubvector.ll
new file mode 100644
index 0000000..8bf82df
--- /dev/null
+++ b/test/CodeGen/Generic/2008-02-04-ExtractSubvector.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s
+
+define i32 @main() nounwind {
+entry:
+ br label %bb15
+
+bb15: ; preds = %bb15, %entry
+ %tmp21 = fadd <8 x double> zeroinitializer, zeroinitializer ; <<8 x double>> [#uses=1]
+ br i1 false, label %bb30, label %bb15
+
+bb30: ; preds = %bb15
+ store <8 x double> %tmp21, <8 x double>* null, align 64
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/2008-02-20-MatchingMem.ll b/test/CodeGen/Generic/2008-02-20-MatchingMem.ll
new file mode 100644
index 0000000..da1aeb5
--- /dev/null
+++ b/test/CodeGen/Generic/2008-02-20-MatchingMem.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s
+; PR1133
+define void @test(i32* %X) nounwind {
+entry:
+ %tmp1 = getelementptr i32* %X, i32 10 ; <i32*> [#uses=2]
+ tail call void asm sideeffect " $0 $1 ", "=*im,*im,~{memory}"( i32* %tmp1, i32* %tmp1 ) nounwind
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/2008-02-25-NegateZero.ll b/test/CodeGen/Generic/2008-02-25-NegateZero.ll
new file mode 100644
index 0000000..97db667
--- /dev/null
+++ b/test/CodeGen/Generic/2008-02-25-NegateZero.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s
+; rdar://5763967
+
+define void @test() {
+entry:
+ %tmp98 = load float* null, align 4 ; <float> [#uses=1]
+ %tmp106 = load float* null, align 4 ; <float> [#uses=1]
+ %tmp113 = fadd float %tmp98, %tmp106 ; <float> [#uses=1]
+ %tmp119 = fsub float %tmp113, 0.000000e+00 ; <float> [#uses=1]
+ call void (i32, ...)* @foo( i32 0, float 0.000000e+00, float %tmp119 ) nounwind
+ ret void
+}
+
+declare void @foo(i32, ...)
diff --git a/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll b/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll
new file mode 100644
index 0000000..10b3d44
--- /dev/null
+++ b/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s
+; PR2096
+ %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+ %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
+ %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, float }
+ %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+ %struct.AVOption = type opaque
+ %struct.AVPaletteControl = type { i32, [256 x i32] }
+ %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+ %struct.AVRational = type { i32, i32 }
+ %struct.RcOverride = type { i32, i32, i32, float }
+
+define i32 @sonic_encode_frame(%struct.AVCodecContext* %avctx, i8* %buf, i32 %buf_size, i8* %data) {
+entry:
+ switch i32 0, label %bb429 [
+ i32 0, label %bb244.preheader
+ i32 1, label %bb279.preheader
+ ]
+
+bb279.preheader: ; preds = %entry
+ ret i32 0
+
+bb244.preheader: ; preds = %entry
+ ret i32 0
+
+bb429: ; preds = %entry
+ br i1 false, label %bb.nph1770, label %bb627
+
+bb.nph1770: ; preds = %bb429
+ br i1 false, label %bb471, label %bb505
+
+bb471: ; preds = %bb471, %bb.nph1770
+ %tmp487 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ br i1 false, label %bb505, label %bb471
+
+bb505: ; preds = %bb471, %bb.nph1770
+ %xy.0.lcssa = phi double [ 0.000000e+00, %bb.nph1770 ], [ %tmp487, %bb471 ] ; <double> [#uses=1]
+ %tmp507 = fsub double -0.000000e+00, %xy.0.lcssa ; <double> [#uses=1]
+ %tmp509 = fdiv double %tmp507, 0.000000e+00 ; <double> [#uses=1]
+ %tmp510 = fmul double %tmp509, 1.024000e+03 ; <double> [#uses=1]
+ %tmp516 = fdiv double %tmp510, 0.000000e+00 ; <double> [#uses=1]
+ %tmp517 = fadd double %tmp516, 5.000000e-01 ; <double> [#uses=1]
+ %tmp518 = tail call double @floor( double %tmp517 ) nounwind readnone ; <double> [#uses=0]
+ ret i32 0
+
+bb627: ; preds = %bb429
+ ret i32 0
+}
+
+declare double @floor(double) nounwind readnone
diff --git a/test/CodeGen/Generic/2008-08-07-PtrToInt-SmallerInt.ll b/test/CodeGen/Generic/2008-08-07-PtrToInt-SmallerInt.ll
new file mode 100644
index 0000000..4f95dfe
--- /dev/null
+++ b/test/CodeGen/Generic/2008-08-07-PtrToInt-SmallerInt.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s
+; PR2603
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %struct.A = type { i8 }
+ %struct.B = type { i8, [1 x i8] }
+@Foo = constant %struct.A { i8 ptrtoint (i8* getelementptr ([1 x i8]* inttoptr (i32 17 to [1 x i8]*), i32 0, i32 -16) to i8) } ; <%struct.A*> [#uses=0]
diff --git a/test/CodeGen/Generic/2009-03-17-LSR-APInt.ll b/test/CodeGen/Generic/2009-03-17-LSR-APInt.ll
new file mode 100644
index 0000000..6281ada
--- /dev/null
+++ b/test/CodeGen/Generic/2009-03-17-LSR-APInt.ll
@@ -0,0 +1,92 @@
+; RUN: llc < %s
+; PR3806
+
+ %struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t }
+ %struct.Alignment = type { i32 }
+ %struct.QDesignerFormWindowInterface = type { %struct.QWidget }
+ %struct.QFont = type { %struct.QFontPrivate*, i32 }
+ %struct.QFontPrivate = type opaque
+ %"struct.QHash<QString,QList<QAbstractExtensionFactory*> >" = type { %"struct.QHash<QString,QList<QAbstractExtensionFactory*> >::._120" }
+ %"struct.QHash<QString,QList<QAbstractExtensionFactory*> >::._120" = type { %struct.QHashData* }
+ %struct.QHashData = type { %"struct.QHashData::Node"*, %"struct.QHashData::Node"**, %struct.Alignment, i32, i32, i16, i16, i32, i8 }
+ %"struct.QHashData::Node" = type { %"struct.QHashData::Node"*, i32 }
+ %"struct.QList<QAbstractExtensionFactory*>" = type { %"struct.QList<QAbstractExtensionFactory*>::._101" }
+ %"struct.QList<QAbstractExtensionFactory*>::._101" = type { %struct.QListData }
+ %struct.QListData = type { %"struct.QListData::Data"* }
+ %"struct.QListData::Data" = type { %struct.Alignment, i32, i32, i32, i8, [1 x i8*] }
+ %struct.QObject = type { i32 (...)**, %struct.QObjectData* }
+ %struct.QObjectData = type { i32 (...)**, %struct.QObject*, %struct.QObject*, %"struct.QList<QAbstractExtensionFactory*>", i32, i32 }
+ %struct.QPaintDevice.base = type { i32 (...)**, i16 }
+ %"struct.QPair<int,int>" = type { i32, i32 }
+ %struct.QPalette = type { %struct.QPalettePrivate*, i32 }
+ %struct.QPalettePrivate = type opaque
+ %struct.QRect = type { i32, i32, i32, i32 }
+ %struct.QWidget = type { %struct.QObject, %struct.QPaintDevice.base, %struct.QWidgetData* }
+ %struct.QWidgetData = type { i64, i32, %struct.Alignment, i8, i8, i16, %struct.QRect, %struct.QPalette, %struct.QFont, %struct.QRect }
+ %struct.__pthread_list_t = type { %struct.__pthread_list_t*, %struct.__pthread_list_t* }
+ %struct.pthread_attr_t = type { i64, [48 x i8] }
+ %struct.pthread_mutex_t = type { %struct..0__pthread_mutex_s }
+ %"struct.qdesigner_internal::Grid" = type { i32, i32, %struct.QWidget**, i8*, i8* }
+ %"struct.qdesigner_internal::GridLayout" = type { %"struct.qdesigner_internal::Layout", %"struct.QPair<int,int>", %"struct.qdesigner_internal::Grid"* }
+ %"struct.qdesigner_internal::Layout" = type { %struct.QObject, %"struct.QList<QAbstractExtensionFactory*>", %struct.QWidget*, %"struct.QHash<QString,QList<QAbstractExtensionFactory*> >", %struct.QWidget*, %struct.QDesignerFormWindowInterface*, i8, %"struct.QPair<int,int>", %struct.QRect, i8 }
+
+@_ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+@_ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
+@_ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; <i32 (i64)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%struct.pthread_mutex_t*, %struct.Alignment*)* @pthread_mutex_init ; <i32 (%struct.pthread_mutex_t*, %struct.Alignment*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
+@_ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%struct.Alignment*)* @pthread_mutexattr_init ; <i32 (%struct.Alignment*)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%struct.Alignment*, i32)* @pthread_mutexattr_settype ; <i32 (%struct.Alignment*, i32)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%struct.Alignment*)* @pthread_mutexattr_destroy ; <i32 (%struct.Alignment*)*> [#uses=0]
+
+define void @_ZN18qdesigner_internal10GridLayout9buildGridEv(%"struct.qdesigner_internal::GridLayout"* %this) nounwind {
+entry:
+ br label %bb44
+
+bb44: ; preds = %bb47, %entry
+ %indvar = phi i128 [ %indvar.next144, %bb47 ], [ 0, %entry ] ; <i128> [#uses=2]
+ br i1 false, label %bb46, label %bb47
+
+bb46: ; preds = %bb44
+ %tmp = shl i128 %indvar, 64 ; <i128> [#uses=1]
+ %tmp96 = and i128 %tmp, 79228162495817593519834398720 ; <i128> [#uses=0]
+ br label %bb47
+
+bb47: ; preds = %bb46, %bb44
+ %indvar.next144 = add i128 %indvar, 1 ; <i128> [#uses=1]
+ br label %bb44
+}
+
+declare i32 @pthread_once(i32*, void ()*)
+
+declare i8* @pthread_getspecific(i32)
+
+declare i32 @pthread_setspecific(i32, i8*)
+
+declare i32 @pthread_create(i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare i32 @pthread_cancel(i64)
+
+declare i32 @pthread_mutex_lock(%struct.pthread_mutex_t*)
+
+declare i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*)
+
+declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*)
+
+declare i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %struct.Alignment*)
+
+declare i32 @pthread_key_create(i32*, void (i8*)*)
+
+declare i32 @pthread_key_delete(i32)
+
+declare i32 @pthread_mutexattr_init(%struct.Alignment*)
+
+declare i32 @pthread_mutexattr_settype(%struct.Alignment*, i32)
+
+declare i32 @pthread_mutexattr_destroy(%struct.Alignment*)
diff --git a/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll b/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
new file mode 100644
index 0000000..45b561a
--- /dev/null
+++ b/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -soft-float
+; PR3899
+
+@m = external global <2 x double>
+
+define double @vector_ex() nounwind {
+ %v = load <2 x double>* @m
+ %x = extractelement <2 x double> %v, i32 1
+ ret double %x
+}
diff --git a/test/CodeGen/Generic/2009-04-10-SinkCrash.ll b/test/CodeGen/Generic/2009-04-10-SinkCrash.ll
new file mode 100644
index 0000000..125f875
--- /dev/null
+++ b/test/CodeGen/Generic/2009-04-10-SinkCrash.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s
+
+define void @QRiterate(i32 %p.1, double %tmp.212) nounwind {
+entry:
+ br i1 false, label %shortcirc_next.1, label %exit.1.critedge
+
+shortcirc_next.1: ; preds = %shortcirc_next.1, %entry
+ %tmp.213 = fcmp une double %tmp.212, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp.213, label %shortcirc_next.1, label %exit.1
+
+exit.1.critedge: ; preds = %entry
+ ret void
+
+exit.1: ; preds = %shortcirc_next.1
+ ret void
+}
diff --git a/test/CodeGen/Generic/2009-04-28-i128-cmp-crash.ll b/test/CodeGen/Generic/2009-04-28-i128-cmp-crash.ll
new file mode 100644
index 0000000..b62f811
--- /dev/null
+++ b/test/CodeGen/Generic/2009-04-28-i128-cmp-crash.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s
+; rdar://6836460
+; rdar://7516906
+; PR5963
+
+define i32 @test(i128* %P) nounwind {
+entry:
+ %tmp48 = load i128* %P
+ %and49 = and i128 %tmp48, 18446744073709551616 ; <i128> [#uses=1]
+ %tobool = icmp ne i128 %and49, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %if.then50, label %if.end61
+
+if.then50: ; preds = %if.then20
+ ret i32 1241
+
+if.end61: ; preds = %if.then50, %if.then20, %entry
+ ret i32 123
+}
+
+define i32 @test2(i320* %P) nounwind {
+entry:
+ %tmp48 = load i320* %P
+ %and49 = and i320 %tmp48, 25108406941546723055343157692830665664409421777856138051584
+ %tobool = icmp ne i320 %and49, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %if.then50, label %if.end61
+
+if.then50: ; preds = %if.then20
+ ret i32 1241
+
+if.end61: ; preds = %if.then50, %if.then20, %entry
+ ret i32 123
+}
diff --git a/test/CodeGen/Generic/2009-06-03-UnreachableSplitPad.ll b/test/CodeGen/Generic/2009-06-03-UnreachableSplitPad.ll
new file mode 100644
index 0000000..112cac4
--- /dev/null
+++ b/test/CodeGen/Generic/2009-06-03-UnreachableSplitPad.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s
+; PR4317
+
+declare i32 @b()
+
+define void @a() {
+entry:
+ ret void
+
+dummy:
+ invoke i32 @b() to label %reg unwind label %reg
+
+reg:
+ ret void
+}
diff --git a/test/CodeGen/Generic/2009-11-16-BadKillsCrash.ll b/test/CodeGen/Generic/2009-11-16-BadKillsCrash.ll
new file mode 100644
index 0000000..a51c75d
--- /dev/null
+++ b/test/CodeGen/Generic/2009-11-16-BadKillsCrash.ll
@@ -0,0 +1,75 @@
+; RUN: llc < %s
+; PR5495
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+
+%"struct.std::__ctype_abstract_base<wchar_t>" = type { %"struct.std::locale::facet" }
+%"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::__ctype_abstract_base<wchar_t>"*, %"struct.std::__ctype_abstract_base<wchar_t>"* }
+%"struct.std::basic_istream<char,std::char_traits<char> >" = type { i32 (...)**, i32, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+%"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+%"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+%"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 }
+%"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+%"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+%"struct.std::ios_base::_Words" = type { i8*, i32 }
+%"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+%"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+%"struct.std::locale::facet" = type { i32 (...)**, i32 }
+%union..0._15 = type { i32 }
+
+declare i8* @llvm.eh.exception() nounwind readonly
+
+declare i8* @__cxa_begin_catch(i8*) nounwind
+
+declare %"struct.std::ctype<char>"* @_ZSt9use_facetISt5ctypeIcEERKT_RKSt6locale(%"struct.std::locale"*)
+
+define %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_(%"struct.std::basic_istream<char,std::char_traits<char> >"* %__in, i8* nocapture %__s) {
+entry:
+ %0 = invoke %"struct.std::ctype<char>"* @_ZSt9use_facetISt5ctypeIcEERKT_RKSt6locale(%"struct.std::locale"* undef)
+ to label %invcont8 unwind label %lpad74 ; <%"struct.std::ctype<char>"*> [#uses=0]
+
+invcont8: ; preds = %entry
+ %1 = invoke i32 undef(%"struct.std::basic_streambuf<char,std::char_traits<char> >"* undef)
+ to label %bb26.preheader unwind label %lpad ; <i32> [#uses=0]
+
+bb26.preheader: ; preds = %invcont8
+ br label %invcont38
+
+bb1.i100: ; preds = %invcont38
+ %2 = add nsw i32 1, %__extracted.0 ; <i32> [#uses=3]
+ br i1 undef, label %bb.i97, label %bb1.i
+
+bb.i97: ; preds = %bb1.i100
+ br label %invcont38
+
+bb1.i: ; preds = %bb1.i100
+ %3 = invoke i32 undef(%"struct.std::basic_streambuf<char,std::char_traits<char> >"* undef)
+ to label %invcont38 unwind label %lpad ; <i32> [#uses=0]
+
+invcont24: ; preds = %invcont38
+ %4 = invoke i32 undef(%"struct.std::basic_streambuf<char,std::char_traits<char> >"* undef)
+ to label %_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.exit.i unwind label %lpad ; <i32> [#uses=0]
+
+_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.exit.i: ; preds = %invcont24
+ br i1 undef, label %invcont25, label %bb.i93
+
+bb.i93: ; preds = %_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.exit.i
+ %5 = invoke i32 undef(%"struct.std::basic_streambuf<char,std::char_traits<char> >"* undef)
+ to label %invcont25 unwind label %lpad ; <i32> [#uses=0]
+
+invcont25: ; preds = %bb.i93, %_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.exit.i
+ br label %invcont38
+
+invcont38: ; preds = %invcont25, %bb1.i, %bb.i97, %bb26.preheader
+ %__extracted.0 = phi i32 [ 0, %bb26.preheader ], [ undef, %invcont25 ], [ %2, %bb.i97 ], [ %2, %bb1.i ] ; <i32> [#uses=1]
+ br i1 false, label %bb1.i100, label %invcont24
+
+lpad: ; preds = %bb.i93, %invcont24, %bb1.i, %invcont8
+ %__extracted.1 = phi i32 [ 0, %invcont8 ], [ %2, %bb1.i ], [ undef, %bb.i93 ], [ undef, %invcont24 ] ; <i32> [#uses=0]
+ %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %6 = call i8* @__cxa_begin_catch(i8* %eh_ptr) nounwind ; <i8*> [#uses=0]
+ unreachable
+
+lpad74: ; preds = %entry
+ unreachable
+}
diff --git a/test/CodeGen/Generic/APIntLoadStore.ll b/test/CodeGen/Generic/APIntLoadStore.ll
new file mode 100644
index 0000000..7c71a33
--- /dev/null
+++ b/test/CodeGen/Generic/APIntLoadStore.ll
@@ -0,0 +1,2049 @@
+; RUN: llc < %s > %t
+@i1_l = external global i1 ; <i1*> [#uses=1]
+@i1_s = external global i1 ; <i1*> [#uses=1]
+@i2_l = external global i2 ; <i2*> [#uses=1]
+@i2_s = external global i2 ; <i2*> [#uses=1]
+@i3_l = external global i3 ; <i3*> [#uses=1]
+@i3_s = external global i3 ; <i3*> [#uses=1]
+@i4_l = external global i4 ; <i4*> [#uses=1]
+@i4_s = external global i4 ; <i4*> [#uses=1]
+@i5_l = external global i5 ; <i5*> [#uses=1]
+@i5_s = external global i5 ; <i5*> [#uses=1]
+@i6_l = external global i6 ; <i6*> [#uses=1]
+@i6_s = external global i6 ; <i6*> [#uses=1]
+@i7_l = external global i7 ; <i7*> [#uses=1]
+@i7_s = external global i7 ; <i7*> [#uses=1]
+@i8_l = external global i8 ; <i8*> [#uses=1]
+@i8_s = external global i8 ; <i8*> [#uses=1]
+@i9_l = external global i9 ; <i9*> [#uses=1]
+@i9_s = external global i9 ; <i9*> [#uses=1]
+@i10_l = external global i10 ; <i10*> [#uses=1]
+@i10_s = external global i10 ; <i10*> [#uses=1]
+@i11_l = external global i11 ; <i11*> [#uses=1]
+@i11_s = external global i11 ; <i11*> [#uses=1]
+@i12_l = external global i12 ; <i12*> [#uses=1]
+@i12_s = external global i12 ; <i12*> [#uses=1]
+@i13_l = external global i13 ; <i13*> [#uses=1]
+@i13_s = external global i13 ; <i13*> [#uses=1]
+@i14_l = external global i14 ; <i14*> [#uses=1]
+@i14_s = external global i14 ; <i14*> [#uses=1]
+@i15_l = external global i15 ; <i15*> [#uses=1]
+@i15_s = external global i15 ; <i15*> [#uses=1]
+@i16_l = external global i16 ; <i16*> [#uses=1]
+@i16_s = external global i16 ; <i16*> [#uses=1]
+@i17_l = external global i17 ; <i17*> [#uses=1]
+@i17_s = external global i17 ; <i17*> [#uses=1]
+@i18_l = external global i18 ; <i18*> [#uses=1]
+@i18_s = external global i18 ; <i18*> [#uses=1]
+@i19_l = external global i19 ; <i19*> [#uses=1]
+@i19_s = external global i19 ; <i19*> [#uses=1]
+@i20_l = external global i20 ; <i20*> [#uses=1]
+@i20_s = external global i20 ; <i20*> [#uses=1]
+@i21_l = external global i21 ; <i21*> [#uses=1]
+@i21_s = external global i21 ; <i21*> [#uses=1]
+@i22_l = external global i22 ; <i22*> [#uses=1]
+@i22_s = external global i22 ; <i22*> [#uses=1]
+@i23_l = external global i23 ; <i23*> [#uses=1]
+@i23_s = external global i23 ; <i23*> [#uses=1]
+@i24_l = external global i24 ; <i24*> [#uses=1]
+@i24_s = external global i24 ; <i24*> [#uses=1]
+@i25_l = external global i25 ; <i25*> [#uses=1]
+@i25_s = external global i25 ; <i25*> [#uses=1]
+@i26_l = external global i26 ; <i26*> [#uses=1]
+@i26_s = external global i26 ; <i26*> [#uses=1]
+@i27_l = external global i27 ; <i27*> [#uses=1]
+@i27_s = external global i27 ; <i27*> [#uses=1]
+@i28_l = external global i28 ; <i28*> [#uses=1]
+@i28_s = external global i28 ; <i28*> [#uses=1]
+@i29_l = external global i29 ; <i29*> [#uses=1]
+@i29_s = external global i29 ; <i29*> [#uses=1]
+@i30_l = external global i30 ; <i30*> [#uses=1]
+@i30_s = external global i30 ; <i30*> [#uses=1]
+@i31_l = external global i31 ; <i31*> [#uses=1]
+@i31_s = external global i31 ; <i31*> [#uses=1]
+@i32_l = external global i32 ; <i32*> [#uses=1]
+@i32_s = external global i32 ; <i32*> [#uses=1]
+@i33_l = external global i33 ; <i33*> [#uses=1]
+@i33_s = external global i33 ; <i33*> [#uses=1]
+@i34_l = external global i34 ; <i34*> [#uses=1]
+@i34_s = external global i34 ; <i34*> [#uses=1]
+@i35_l = external global i35 ; <i35*> [#uses=1]
+@i35_s = external global i35 ; <i35*> [#uses=1]
+@i36_l = external global i36 ; <i36*> [#uses=1]
+@i36_s = external global i36 ; <i36*> [#uses=1]
+@i37_l = external global i37 ; <i37*> [#uses=1]
+@i37_s = external global i37 ; <i37*> [#uses=1]
+@i38_l = external global i38 ; <i38*> [#uses=1]
+@i38_s = external global i38 ; <i38*> [#uses=1]
+@i39_l = external global i39 ; <i39*> [#uses=1]
+@i39_s = external global i39 ; <i39*> [#uses=1]
+@i40_l = external global i40 ; <i40*> [#uses=1]
+@i40_s = external global i40 ; <i40*> [#uses=1]
+@i41_l = external global i41 ; <i41*> [#uses=1]
+@i41_s = external global i41 ; <i41*> [#uses=1]
+@i42_l = external global i42 ; <i42*> [#uses=1]
+@i42_s = external global i42 ; <i42*> [#uses=1]
+@i43_l = external global i43 ; <i43*> [#uses=1]
+@i43_s = external global i43 ; <i43*> [#uses=1]
+@i44_l = external global i44 ; <i44*> [#uses=1]
+@i44_s = external global i44 ; <i44*> [#uses=1]
+@i45_l = external global i45 ; <i45*> [#uses=1]
+@i45_s = external global i45 ; <i45*> [#uses=1]
+@i46_l = external global i46 ; <i46*> [#uses=1]
+@i46_s = external global i46 ; <i46*> [#uses=1]
+@i47_l = external global i47 ; <i47*> [#uses=1]
+@i47_s = external global i47 ; <i47*> [#uses=1]
+@i48_l = external global i48 ; <i48*> [#uses=1]
+@i48_s = external global i48 ; <i48*> [#uses=1]
+@i49_l = external global i49 ; <i49*> [#uses=1]
+@i49_s = external global i49 ; <i49*> [#uses=1]
+@i50_l = external global i50 ; <i50*> [#uses=1]
+@i50_s = external global i50 ; <i50*> [#uses=1]
+@i51_l = external global i51 ; <i51*> [#uses=1]
+@i51_s = external global i51 ; <i51*> [#uses=1]
+@i52_l = external global i52 ; <i52*> [#uses=1]
+@i52_s = external global i52 ; <i52*> [#uses=1]
+@i53_l = external global i53 ; <i53*> [#uses=1]
+@i53_s = external global i53 ; <i53*> [#uses=1]
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+@i230_l = external global i230 ; <i230*> [#uses=1]
+@i230_s = external global i230 ; <i230*> [#uses=1]
+@i231_l = external global i231 ; <i231*> [#uses=1]
+@i231_s = external global i231 ; <i231*> [#uses=1]
+@i232_l = external global i232 ; <i232*> [#uses=1]
+@i232_s = external global i232 ; <i232*> [#uses=1]
+@i233_l = external global i233 ; <i233*> [#uses=1]
+@i233_s = external global i233 ; <i233*> [#uses=1]
+@i234_l = external global i234 ; <i234*> [#uses=1]
+@i234_s = external global i234 ; <i234*> [#uses=1]
+@i235_l = external global i235 ; <i235*> [#uses=1]
+@i235_s = external global i235 ; <i235*> [#uses=1]
+@i236_l = external global i236 ; <i236*> [#uses=1]
+@i236_s = external global i236 ; <i236*> [#uses=1]
+@i237_l = external global i237 ; <i237*> [#uses=1]
+@i237_s = external global i237 ; <i237*> [#uses=1]
+@i238_l = external global i238 ; <i238*> [#uses=1]
+@i238_s = external global i238 ; <i238*> [#uses=1]
+@i239_l = external global i239 ; <i239*> [#uses=1]
+@i239_s = external global i239 ; <i239*> [#uses=1]
+@i240_l = external global i240 ; <i240*> [#uses=1]
+@i240_s = external global i240 ; <i240*> [#uses=1]
+@i241_l = external global i241 ; <i241*> [#uses=1]
+@i241_s = external global i241 ; <i241*> [#uses=1]
+@i242_l = external global i242 ; <i242*> [#uses=1]
+@i242_s = external global i242 ; <i242*> [#uses=1]
+@i243_l = external global i243 ; <i243*> [#uses=1]
+@i243_s = external global i243 ; <i243*> [#uses=1]
+@i244_l = external global i244 ; <i244*> [#uses=1]
+@i244_s = external global i244 ; <i244*> [#uses=1]
+@i245_l = external global i245 ; <i245*> [#uses=1]
+@i245_s = external global i245 ; <i245*> [#uses=1]
+@i246_l = external global i246 ; <i246*> [#uses=1]
+@i246_s = external global i246 ; <i246*> [#uses=1]
+@i247_l = external global i247 ; <i247*> [#uses=1]
+@i247_s = external global i247 ; <i247*> [#uses=1]
+@i248_l = external global i248 ; <i248*> [#uses=1]
+@i248_s = external global i248 ; <i248*> [#uses=1]
+@i249_l = external global i249 ; <i249*> [#uses=1]
+@i249_s = external global i249 ; <i249*> [#uses=1]
+@i250_l = external global i250 ; <i250*> [#uses=1]
+@i250_s = external global i250 ; <i250*> [#uses=1]
+@i251_l = external global i251 ; <i251*> [#uses=1]
+@i251_s = external global i251 ; <i251*> [#uses=1]
+@i252_l = external global i252 ; <i252*> [#uses=1]
+@i252_s = external global i252 ; <i252*> [#uses=1]
+@i253_l = external global i253 ; <i253*> [#uses=1]
+@i253_s = external global i253 ; <i253*> [#uses=1]
+@i254_l = external global i254 ; <i254*> [#uses=1]
+@i254_s = external global i254 ; <i254*> [#uses=1]
+@i255_l = external global i255 ; <i255*> [#uses=1]
+@i255_s = external global i255 ; <i255*> [#uses=1]
+@i256_l = external global i256 ; <i256*> [#uses=1]
+@i256_s = external global i256 ; <i256*> [#uses=1]
+
+define void @i1_ls() nounwind {
+ %tmp = load i1* @i1_l ; <i1> [#uses=1]
+ store i1 %tmp, i1* @i1_s
+ ret void
+}
+
+define void @i2_ls() nounwind {
+ %tmp = load i2* @i2_l ; <i2> [#uses=1]
+ store i2 %tmp, i2* @i2_s
+ ret void
+}
+
+define void @i3_ls() nounwind {
+ %tmp = load i3* @i3_l ; <i3> [#uses=1]
+ store i3 %tmp, i3* @i3_s
+ ret void
+}
+
+define void @i4_ls() nounwind {
+ %tmp = load i4* @i4_l ; <i4> [#uses=1]
+ store i4 %tmp, i4* @i4_s
+ ret void
+}
+
+define void @i5_ls() nounwind {
+ %tmp = load i5* @i5_l ; <i5> [#uses=1]
+ store i5 %tmp, i5* @i5_s
+ ret void
+}
+
+define void @i6_ls() nounwind {
+ %tmp = load i6* @i6_l ; <i6> [#uses=1]
+ store i6 %tmp, i6* @i6_s
+ ret void
+}
+
+define void @i7_ls() nounwind {
+ %tmp = load i7* @i7_l ; <i7> [#uses=1]
+ store i7 %tmp, i7* @i7_s
+ ret void
+}
+
+define void @i8_ls() nounwind {
+ %tmp = load i8* @i8_l ; <i8> [#uses=1]
+ store i8 %tmp, i8* @i8_s
+ ret void
+}
+
+define void @i9_ls() nounwind {
+ %tmp = load i9* @i9_l ; <i9> [#uses=1]
+ store i9 %tmp, i9* @i9_s
+ ret void
+}
+
+define void @i10_ls() nounwind {
+ %tmp = load i10* @i10_l ; <i10> [#uses=1]
+ store i10 %tmp, i10* @i10_s
+ ret void
+}
+
+define void @i11_ls() nounwind {
+ %tmp = load i11* @i11_l ; <i11> [#uses=1]
+ store i11 %tmp, i11* @i11_s
+ ret void
+}
+
+define void @i12_ls() nounwind {
+ %tmp = load i12* @i12_l ; <i12> [#uses=1]
+ store i12 %tmp, i12* @i12_s
+ ret void
+}
+
+define void @i13_ls() nounwind {
+ %tmp = load i13* @i13_l ; <i13> [#uses=1]
+ store i13 %tmp, i13* @i13_s
+ ret void
+}
+
+define void @i14_ls() nounwind {
+ %tmp = load i14* @i14_l ; <i14> [#uses=1]
+ store i14 %tmp, i14* @i14_s
+ ret void
+}
+
+define void @i15_ls() nounwind {
+ %tmp = load i15* @i15_l ; <i15> [#uses=1]
+ store i15 %tmp, i15* @i15_s
+ ret void
+}
+
+define void @i16_ls() nounwind {
+ %tmp = load i16* @i16_l ; <i16> [#uses=1]
+ store i16 %tmp, i16* @i16_s
+ ret void
+}
+
+define void @i17_ls() nounwind {
+ %tmp = load i17* @i17_l ; <i17> [#uses=1]
+ store i17 %tmp, i17* @i17_s
+ ret void
+}
+
+define void @i18_ls() nounwind {
+ %tmp = load i18* @i18_l ; <i18> [#uses=1]
+ store i18 %tmp, i18* @i18_s
+ ret void
+}
+
+define void @i19_ls() nounwind {
+ %tmp = load i19* @i19_l ; <i19> [#uses=1]
+ store i19 %tmp, i19* @i19_s
+ ret void
+}
+
+define void @i20_ls() nounwind {
+ %tmp = load i20* @i20_l ; <i20> [#uses=1]
+ store i20 %tmp, i20* @i20_s
+ ret void
+}
+
+define void @i21_ls() nounwind {
+ %tmp = load i21* @i21_l ; <i21> [#uses=1]
+ store i21 %tmp, i21* @i21_s
+ ret void
+}
+
+define void @i22_ls() nounwind {
+ %tmp = load i22* @i22_l ; <i22> [#uses=1]
+ store i22 %tmp, i22* @i22_s
+ ret void
+}
+
+define void @i23_ls() nounwind {
+ %tmp = load i23* @i23_l ; <i23> [#uses=1]
+ store i23 %tmp, i23* @i23_s
+ ret void
+}
+
+define void @i24_ls() nounwind {
+ %tmp = load i24* @i24_l ; <i24> [#uses=1]
+ store i24 %tmp, i24* @i24_s
+ ret void
+}
+
+define void @i25_ls() nounwind {
+ %tmp = load i25* @i25_l ; <i25> [#uses=1]
+ store i25 %tmp, i25* @i25_s
+ ret void
+}
+
+define void @i26_ls() nounwind {
+ %tmp = load i26* @i26_l ; <i26> [#uses=1]
+ store i26 %tmp, i26* @i26_s
+ ret void
+}
+
+define void @i27_ls() nounwind {
+ %tmp = load i27* @i27_l ; <i27> [#uses=1]
+ store i27 %tmp, i27* @i27_s
+ ret void
+}
+
+define void @i28_ls() nounwind {
+ %tmp = load i28* @i28_l ; <i28> [#uses=1]
+ store i28 %tmp, i28* @i28_s
+ ret void
+}
+
+define void @i29_ls() nounwind {
+ %tmp = load i29* @i29_l ; <i29> [#uses=1]
+ store i29 %tmp, i29* @i29_s
+ ret void
+}
+
+define void @i30_ls() nounwind {
+ %tmp = load i30* @i30_l ; <i30> [#uses=1]
+ store i30 %tmp, i30* @i30_s
+ ret void
+}
+
+define void @i31_ls() nounwind {
+ %tmp = load i31* @i31_l ; <i31> [#uses=1]
+ store i31 %tmp, i31* @i31_s
+ ret void
+}
+
+define void @i32_ls() nounwind {
+ %tmp = load i32* @i32_l ; <i32> [#uses=1]
+ store i32 %tmp, i32* @i32_s
+ ret void
+}
+
+define void @i33_ls() nounwind {
+ %tmp = load i33* @i33_l ; <i33> [#uses=1]
+ store i33 %tmp, i33* @i33_s
+ ret void
+}
+
+define void @i34_ls() nounwind {
+ %tmp = load i34* @i34_l ; <i34> [#uses=1]
+ store i34 %tmp, i34* @i34_s
+ ret void
+}
+
+define void @i35_ls() nounwind {
+ %tmp = load i35* @i35_l ; <i35> [#uses=1]
+ store i35 %tmp, i35* @i35_s
+ ret void
+}
+
+define void @i36_ls() nounwind {
+ %tmp = load i36* @i36_l ; <i36> [#uses=1]
+ store i36 %tmp, i36* @i36_s
+ ret void
+}
+
+define void @i37_ls() nounwind {
+ %tmp = load i37* @i37_l ; <i37> [#uses=1]
+ store i37 %tmp, i37* @i37_s
+ ret void
+}
+
+define void @i38_ls() nounwind {
+ %tmp = load i38* @i38_l ; <i38> [#uses=1]
+ store i38 %tmp, i38* @i38_s
+ ret void
+}
+
+define void @i39_ls() nounwind {
+ %tmp = load i39* @i39_l ; <i39> [#uses=1]
+ store i39 %tmp, i39* @i39_s
+ ret void
+}
+
+define void @i40_ls() nounwind {
+ %tmp = load i40* @i40_l ; <i40> [#uses=1]
+ store i40 %tmp, i40* @i40_s
+ ret void
+}
+
+define void @i41_ls() nounwind {
+ %tmp = load i41* @i41_l ; <i41> [#uses=1]
+ store i41 %tmp, i41* @i41_s
+ ret void
+}
+
+define void @i42_ls() nounwind {
+ %tmp = load i42* @i42_l ; <i42> [#uses=1]
+ store i42 %tmp, i42* @i42_s
+ ret void
+}
+
+define void @i43_ls() nounwind {
+ %tmp = load i43* @i43_l ; <i43> [#uses=1]
+ store i43 %tmp, i43* @i43_s
+ ret void
+}
+
+define void @i44_ls() nounwind {
+ %tmp = load i44* @i44_l ; <i44> [#uses=1]
+ store i44 %tmp, i44* @i44_s
+ ret void
+}
+
+define void @i45_ls() nounwind {
+ %tmp = load i45* @i45_l ; <i45> [#uses=1]
+ store i45 %tmp, i45* @i45_s
+ ret void
+}
+
+define void @i46_ls() nounwind {
+ %tmp = load i46* @i46_l ; <i46> [#uses=1]
+ store i46 %tmp, i46* @i46_s
+ ret void
+}
+
+define void @i47_ls() nounwind {
+ %tmp = load i47* @i47_l ; <i47> [#uses=1]
+ store i47 %tmp, i47* @i47_s
+ ret void
+}
+
+define void @i48_ls() nounwind {
+ %tmp = load i48* @i48_l ; <i48> [#uses=1]
+ store i48 %tmp, i48* @i48_s
+ ret void
+}
+
+define void @i49_ls() nounwind {
+ %tmp = load i49* @i49_l ; <i49> [#uses=1]
+ store i49 %tmp, i49* @i49_s
+ ret void
+}
+
+define void @i50_ls() nounwind {
+ %tmp = load i50* @i50_l ; <i50> [#uses=1]
+ store i50 %tmp, i50* @i50_s
+ ret void
+}
+
+define void @i51_ls() nounwind {
+ %tmp = load i51* @i51_l ; <i51> [#uses=1]
+ store i51 %tmp, i51* @i51_s
+ ret void
+}
+
+define void @i52_ls() nounwind {
+ %tmp = load i52* @i52_l ; <i52> [#uses=1]
+ store i52 %tmp, i52* @i52_s
+ ret void
+}
+
+define void @i53_ls() nounwind {
+ %tmp = load i53* @i53_l ; <i53> [#uses=1]
+ store i53 %tmp, i53* @i53_s
+ ret void
+}
+
+define void @i54_ls() nounwind {
+ %tmp = load i54* @i54_l ; <i54> [#uses=1]
+ store i54 %tmp, i54* @i54_s
+ ret void
+}
+
+define void @i55_ls() nounwind {
+ %tmp = load i55* @i55_l ; <i55> [#uses=1]
+ store i55 %tmp, i55* @i55_s
+ ret void
+}
+
+define void @i56_ls() nounwind {
+ %tmp = load i56* @i56_l ; <i56> [#uses=1]
+ store i56 %tmp, i56* @i56_s
+ ret void
+}
+
+define void @i57_ls() nounwind {
+ %tmp = load i57* @i57_l ; <i57> [#uses=1]
+ store i57 %tmp, i57* @i57_s
+ ret void
+}
+
+define void @i58_ls() nounwind {
+ %tmp = load i58* @i58_l ; <i58> [#uses=1]
+ store i58 %tmp, i58* @i58_s
+ ret void
+}
+
+define void @i59_ls() nounwind {
+ %tmp = load i59* @i59_l ; <i59> [#uses=1]
+ store i59 %tmp, i59* @i59_s
+ ret void
+}
+
+define void @i60_ls() nounwind {
+ %tmp = load i60* @i60_l ; <i60> [#uses=1]
+ store i60 %tmp, i60* @i60_s
+ ret void
+}
+
+define void @i61_ls() nounwind {
+ %tmp = load i61* @i61_l ; <i61> [#uses=1]
+ store i61 %tmp, i61* @i61_s
+ ret void
+}
+
+define void @i62_ls() nounwind {
+ %tmp = load i62* @i62_l ; <i62> [#uses=1]
+ store i62 %tmp, i62* @i62_s
+ ret void
+}
+
+define void @i63_ls() nounwind {
+ %tmp = load i63* @i63_l ; <i63> [#uses=1]
+ store i63 %tmp, i63* @i63_s
+ ret void
+}
+
+define void @i64_ls() nounwind {
+ %tmp = load i64* @i64_l ; <i64> [#uses=1]
+ store i64 %tmp, i64* @i64_s
+ ret void
+}
+
+define void @i65_ls() nounwind {
+ %tmp = load i65* @i65_l ; <i65> [#uses=1]
+ store i65 %tmp, i65* @i65_s
+ ret void
+}
+
+define void @i66_ls() nounwind {
+ %tmp = load i66* @i66_l ; <i66> [#uses=1]
+ store i66 %tmp, i66* @i66_s
+ ret void
+}
+
+define void @i67_ls() nounwind {
+ %tmp = load i67* @i67_l ; <i67> [#uses=1]
+ store i67 %tmp, i67* @i67_s
+ ret void
+}
+
+define void @i68_ls() nounwind {
+ %tmp = load i68* @i68_l ; <i68> [#uses=1]
+ store i68 %tmp, i68* @i68_s
+ ret void
+}
+
+define void @i69_ls() nounwind {
+ %tmp = load i69* @i69_l ; <i69> [#uses=1]
+ store i69 %tmp, i69* @i69_s
+ ret void
+}
+
+define void @i70_ls() nounwind {
+ %tmp = load i70* @i70_l ; <i70> [#uses=1]
+ store i70 %tmp, i70* @i70_s
+ ret void
+}
+
+define void @i71_ls() nounwind {
+ %tmp = load i71* @i71_l ; <i71> [#uses=1]
+ store i71 %tmp, i71* @i71_s
+ ret void
+}
+
+define void @i72_ls() nounwind {
+ %tmp = load i72* @i72_l ; <i72> [#uses=1]
+ store i72 %tmp, i72* @i72_s
+ ret void
+}
+
+define void @i73_ls() nounwind {
+ %tmp = load i73* @i73_l ; <i73> [#uses=1]
+ store i73 %tmp, i73* @i73_s
+ ret void
+}
+
+define void @i74_ls() nounwind {
+ %tmp = load i74* @i74_l ; <i74> [#uses=1]
+ store i74 %tmp, i74* @i74_s
+ ret void
+}
+
+define void @i75_ls() nounwind {
+ %tmp = load i75* @i75_l ; <i75> [#uses=1]
+ store i75 %tmp, i75* @i75_s
+ ret void
+}
+
+define void @i76_ls() nounwind {
+ %tmp = load i76* @i76_l ; <i76> [#uses=1]
+ store i76 %tmp, i76* @i76_s
+ ret void
+}
+
+define void @i77_ls() nounwind {
+ %tmp = load i77* @i77_l ; <i77> [#uses=1]
+ store i77 %tmp, i77* @i77_s
+ ret void
+}
+
+define void @i78_ls() nounwind {
+ %tmp = load i78* @i78_l ; <i78> [#uses=1]
+ store i78 %tmp, i78* @i78_s
+ ret void
+}
+
+define void @i79_ls() nounwind {
+ %tmp = load i79* @i79_l ; <i79> [#uses=1]
+ store i79 %tmp, i79* @i79_s
+ ret void
+}
+
+define void @i80_ls() nounwind {
+ %tmp = load i80* @i80_l ; <i80> [#uses=1]
+ store i80 %tmp, i80* @i80_s
+ ret void
+}
+
+define void @i81_ls() nounwind {
+ %tmp = load i81* @i81_l ; <i81> [#uses=1]
+ store i81 %tmp, i81* @i81_s
+ ret void
+}
+
+define void @i82_ls() nounwind {
+ %tmp = load i82* @i82_l ; <i82> [#uses=1]
+ store i82 %tmp, i82* @i82_s
+ ret void
+}
+
+define void @i83_ls() nounwind {
+ %tmp = load i83* @i83_l ; <i83> [#uses=1]
+ store i83 %tmp, i83* @i83_s
+ ret void
+}
+
+define void @i84_ls() nounwind {
+ %tmp = load i84* @i84_l ; <i84> [#uses=1]
+ store i84 %tmp, i84* @i84_s
+ ret void
+}
+
+define void @i85_ls() nounwind {
+ %tmp = load i85* @i85_l ; <i85> [#uses=1]
+ store i85 %tmp, i85* @i85_s
+ ret void
+}
+
+define void @i86_ls() nounwind {
+ %tmp = load i86* @i86_l ; <i86> [#uses=1]
+ store i86 %tmp, i86* @i86_s
+ ret void
+}
+
+define void @i87_ls() nounwind {
+ %tmp = load i87* @i87_l ; <i87> [#uses=1]
+ store i87 %tmp, i87* @i87_s
+ ret void
+}
+
+define void @i88_ls() nounwind {
+ %tmp = load i88* @i88_l ; <i88> [#uses=1]
+ store i88 %tmp, i88* @i88_s
+ ret void
+}
+
+define void @i89_ls() nounwind {
+ %tmp = load i89* @i89_l ; <i89> [#uses=1]
+ store i89 %tmp, i89* @i89_s
+ ret void
+}
+
+define void @i90_ls() nounwind {
+ %tmp = load i90* @i90_l ; <i90> [#uses=1]
+ store i90 %tmp, i90* @i90_s
+ ret void
+}
+
+define void @i91_ls() nounwind {
+ %tmp = load i91* @i91_l ; <i91> [#uses=1]
+ store i91 %tmp, i91* @i91_s
+ ret void
+}
+
+define void @i92_ls() nounwind {
+ %tmp = load i92* @i92_l ; <i92> [#uses=1]
+ store i92 %tmp, i92* @i92_s
+ ret void
+}
+
+define void @i93_ls() nounwind {
+ %tmp = load i93* @i93_l ; <i93> [#uses=1]
+ store i93 %tmp, i93* @i93_s
+ ret void
+}
+
+define void @i94_ls() nounwind {
+ %tmp = load i94* @i94_l ; <i94> [#uses=1]
+ store i94 %tmp, i94* @i94_s
+ ret void
+}
+
+define void @i95_ls() nounwind {
+ %tmp = load i95* @i95_l ; <i95> [#uses=1]
+ store i95 %tmp, i95* @i95_s
+ ret void
+}
+
+define void @i96_ls() nounwind {
+ %tmp = load i96* @i96_l ; <i96> [#uses=1]
+ store i96 %tmp, i96* @i96_s
+ ret void
+}
+
+define void @i97_ls() nounwind {
+ %tmp = load i97* @i97_l ; <i97> [#uses=1]
+ store i97 %tmp, i97* @i97_s
+ ret void
+}
+
+define void @i98_ls() nounwind {
+ %tmp = load i98* @i98_l ; <i98> [#uses=1]
+ store i98 %tmp, i98* @i98_s
+ ret void
+}
+
+define void @i99_ls() nounwind {
+ %tmp = load i99* @i99_l ; <i99> [#uses=1]
+ store i99 %tmp, i99* @i99_s
+ ret void
+}
+
+define void @i100_ls() nounwind {
+ %tmp = load i100* @i100_l ; <i100> [#uses=1]
+ store i100 %tmp, i100* @i100_s
+ ret void
+}
+
+define void @i101_ls() nounwind {
+ %tmp = load i101* @i101_l ; <i101> [#uses=1]
+ store i101 %tmp, i101* @i101_s
+ ret void
+}
+
+define void @i102_ls() nounwind {
+ %tmp = load i102* @i102_l ; <i102> [#uses=1]
+ store i102 %tmp, i102* @i102_s
+ ret void
+}
+
+define void @i103_ls() nounwind {
+ %tmp = load i103* @i103_l ; <i103> [#uses=1]
+ store i103 %tmp, i103* @i103_s
+ ret void
+}
+
+define void @i104_ls() nounwind {
+ %tmp = load i104* @i104_l ; <i104> [#uses=1]
+ store i104 %tmp, i104* @i104_s
+ ret void
+}
+
+define void @i105_ls() nounwind {
+ %tmp = load i105* @i105_l ; <i105> [#uses=1]
+ store i105 %tmp, i105* @i105_s
+ ret void
+}
+
+define void @i106_ls() nounwind {
+ %tmp = load i106* @i106_l ; <i106> [#uses=1]
+ store i106 %tmp, i106* @i106_s
+ ret void
+}
+
+define void @i107_ls() nounwind {
+ %tmp = load i107* @i107_l ; <i107> [#uses=1]
+ store i107 %tmp, i107* @i107_s
+ ret void
+}
+
+define void @i108_ls() nounwind {
+ %tmp = load i108* @i108_l ; <i108> [#uses=1]
+ store i108 %tmp, i108* @i108_s
+ ret void
+}
+
+define void @i109_ls() nounwind {
+ %tmp = load i109* @i109_l ; <i109> [#uses=1]
+ store i109 %tmp, i109* @i109_s
+ ret void
+}
+
+define void @i110_ls() nounwind {
+ %tmp = load i110* @i110_l ; <i110> [#uses=1]
+ store i110 %tmp, i110* @i110_s
+ ret void
+}
+
+define void @i111_ls() nounwind {
+ %tmp = load i111* @i111_l ; <i111> [#uses=1]
+ store i111 %tmp, i111* @i111_s
+ ret void
+}
+
+define void @i112_ls() nounwind {
+ %tmp = load i112* @i112_l ; <i112> [#uses=1]
+ store i112 %tmp, i112* @i112_s
+ ret void
+}
+
+define void @i113_ls() nounwind {
+ %tmp = load i113* @i113_l ; <i113> [#uses=1]
+ store i113 %tmp, i113* @i113_s
+ ret void
+}
+
+define void @i114_ls() nounwind {
+ %tmp = load i114* @i114_l ; <i114> [#uses=1]
+ store i114 %tmp, i114* @i114_s
+ ret void
+}
+
+define void @i115_ls() nounwind {
+ %tmp = load i115* @i115_l ; <i115> [#uses=1]
+ store i115 %tmp, i115* @i115_s
+ ret void
+}
+
+define void @i116_ls() nounwind {
+ %tmp = load i116* @i116_l ; <i116> [#uses=1]
+ store i116 %tmp, i116* @i116_s
+ ret void
+}
+
+define void @i117_ls() nounwind {
+ %tmp = load i117* @i117_l ; <i117> [#uses=1]
+ store i117 %tmp, i117* @i117_s
+ ret void
+}
+
+define void @i118_ls() nounwind {
+ %tmp = load i118* @i118_l ; <i118> [#uses=1]
+ store i118 %tmp, i118* @i118_s
+ ret void
+}
+
+define void @i119_ls() nounwind {
+ %tmp = load i119* @i119_l ; <i119> [#uses=1]
+ store i119 %tmp, i119* @i119_s
+ ret void
+}
+
+define void @i120_ls() nounwind {
+ %tmp = load i120* @i120_l ; <i120> [#uses=1]
+ store i120 %tmp, i120* @i120_s
+ ret void
+}
+
+define void @i121_ls() nounwind {
+ %tmp = load i121* @i121_l ; <i121> [#uses=1]
+ store i121 %tmp, i121* @i121_s
+ ret void
+}
+
+define void @i122_ls() nounwind {
+ %tmp = load i122* @i122_l ; <i122> [#uses=1]
+ store i122 %tmp, i122* @i122_s
+ ret void
+}
+
+define void @i123_ls() nounwind {
+ %tmp = load i123* @i123_l ; <i123> [#uses=1]
+ store i123 %tmp, i123* @i123_s
+ ret void
+}
+
+define void @i124_ls() nounwind {
+ %tmp = load i124* @i124_l ; <i124> [#uses=1]
+ store i124 %tmp, i124* @i124_s
+ ret void
+}
+
+define void @i125_ls() nounwind {
+ %tmp = load i125* @i125_l ; <i125> [#uses=1]
+ store i125 %tmp, i125* @i125_s
+ ret void
+}
+
+define void @i126_ls() nounwind {
+ %tmp = load i126* @i126_l ; <i126> [#uses=1]
+ store i126 %tmp, i126* @i126_s
+ ret void
+}
+
+define void @i127_ls() nounwind {
+ %tmp = load i127* @i127_l ; <i127> [#uses=1]
+ store i127 %tmp, i127* @i127_s
+ ret void
+}
+
+define void @i128_ls() nounwind {
+ %tmp = load i128* @i128_l ; <i128> [#uses=1]
+ store i128 %tmp, i128* @i128_s
+ ret void
+}
+
+define void @i129_ls() nounwind {
+ %tmp = load i129* @i129_l ; <i129> [#uses=1]
+ store i129 %tmp, i129* @i129_s
+ ret void
+}
+
+define void @i130_ls() nounwind {
+ %tmp = load i130* @i130_l ; <i130> [#uses=1]
+ store i130 %tmp, i130* @i130_s
+ ret void
+}
+
+define void @i131_ls() nounwind {
+ %tmp = load i131* @i131_l ; <i131> [#uses=1]
+ store i131 %tmp, i131* @i131_s
+ ret void
+}
+
+define void @i132_ls() nounwind {
+ %tmp = load i132* @i132_l ; <i132> [#uses=1]
+ store i132 %tmp, i132* @i132_s
+ ret void
+}
+
+define void @i133_ls() nounwind {
+ %tmp = load i133* @i133_l ; <i133> [#uses=1]
+ store i133 %tmp, i133* @i133_s
+ ret void
+}
+
+define void @i134_ls() nounwind {
+ %tmp = load i134* @i134_l ; <i134> [#uses=1]
+ store i134 %tmp, i134* @i134_s
+ ret void
+}
+
+define void @i135_ls() nounwind {
+ %tmp = load i135* @i135_l ; <i135> [#uses=1]
+ store i135 %tmp, i135* @i135_s
+ ret void
+}
+
+define void @i136_ls() nounwind {
+ %tmp = load i136* @i136_l ; <i136> [#uses=1]
+ store i136 %tmp, i136* @i136_s
+ ret void
+}
+
+define void @i137_ls() nounwind {
+ %tmp = load i137* @i137_l ; <i137> [#uses=1]
+ store i137 %tmp, i137* @i137_s
+ ret void
+}
+
+define void @i138_ls() nounwind {
+ %tmp = load i138* @i138_l ; <i138> [#uses=1]
+ store i138 %tmp, i138* @i138_s
+ ret void
+}
+
+define void @i139_ls() nounwind {
+ %tmp = load i139* @i139_l ; <i139> [#uses=1]
+ store i139 %tmp, i139* @i139_s
+ ret void
+}
+
+define void @i140_ls() nounwind {
+ %tmp = load i140* @i140_l ; <i140> [#uses=1]
+ store i140 %tmp, i140* @i140_s
+ ret void
+}
+
+define void @i141_ls() nounwind {
+ %tmp = load i141* @i141_l ; <i141> [#uses=1]
+ store i141 %tmp, i141* @i141_s
+ ret void
+}
+
+define void @i142_ls() nounwind {
+ %tmp = load i142* @i142_l ; <i142> [#uses=1]
+ store i142 %tmp, i142* @i142_s
+ ret void
+}
+
+define void @i143_ls() nounwind {
+ %tmp = load i143* @i143_l ; <i143> [#uses=1]
+ store i143 %tmp, i143* @i143_s
+ ret void
+}
+
+define void @i144_ls() nounwind {
+ %tmp = load i144* @i144_l ; <i144> [#uses=1]
+ store i144 %tmp, i144* @i144_s
+ ret void
+}
+
+define void @i145_ls() nounwind {
+ %tmp = load i145* @i145_l ; <i145> [#uses=1]
+ store i145 %tmp, i145* @i145_s
+ ret void
+}
+
+define void @i146_ls() nounwind {
+ %tmp = load i146* @i146_l ; <i146> [#uses=1]
+ store i146 %tmp, i146* @i146_s
+ ret void
+}
+
+define void @i147_ls() nounwind {
+ %tmp = load i147* @i147_l ; <i147> [#uses=1]
+ store i147 %tmp, i147* @i147_s
+ ret void
+}
+
+define void @i148_ls() nounwind {
+ %tmp = load i148* @i148_l ; <i148> [#uses=1]
+ store i148 %tmp, i148* @i148_s
+ ret void
+}
+
+define void @i149_ls() nounwind {
+ %tmp = load i149* @i149_l ; <i149> [#uses=1]
+ store i149 %tmp, i149* @i149_s
+ ret void
+}
+
+define void @i150_ls() nounwind {
+ %tmp = load i150* @i150_l ; <i150> [#uses=1]
+ store i150 %tmp, i150* @i150_s
+ ret void
+}
+
+define void @i151_ls() nounwind {
+ %tmp = load i151* @i151_l ; <i151> [#uses=1]
+ store i151 %tmp, i151* @i151_s
+ ret void
+}
+
+define void @i152_ls() nounwind {
+ %tmp = load i152* @i152_l ; <i152> [#uses=1]
+ store i152 %tmp, i152* @i152_s
+ ret void
+}
+
+define void @i153_ls() nounwind {
+ %tmp = load i153* @i153_l ; <i153> [#uses=1]
+ store i153 %tmp, i153* @i153_s
+ ret void
+}
+
+define void @i154_ls() nounwind {
+ %tmp = load i154* @i154_l ; <i154> [#uses=1]
+ store i154 %tmp, i154* @i154_s
+ ret void
+}
+
+define void @i155_ls() nounwind {
+ %tmp = load i155* @i155_l ; <i155> [#uses=1]
+ store i155 %tmp, i155* @i155_s
+ ret void
+}
+
+define void @i156_ls() nounwind {
+ %tmp = load i156* @i156_l ; <i156> [#uses=1]
+ store i156 %tmp, i156* @i156_s
+ ret void
+}
+
+define void @i157_ls() nounwind {
+ %tmp = load i157* @i157_l ; <i157> [#uses=1]
+ store i157 %tmp, i157* @i157_s
+ ret void
+}
+
+define void @i158_ls() nounwind {
+ %tmp = load i158* @i158_l ; <i158> [#uses=1]
+ store i158 %tmp, i158* @i158_s
+ ret void
+}
+
+define void @i159_ls() nounwind {
+ %tmp = load i159* @i159_l ; <i159> [#uses=1]
+ store i159 %tmp, i159* @i159_s
+ ret void
+}
+
+define void @i160_ls() nounwind {
+ %tmp = load i160* @i160_l ; <i160> [#uses=1]
+ store i160 %tmp, i160* @i160_s
+ ret void
+}
+
+define void @i161_ls() nounwind {
+ %tmp = load i161* @i161_l ; <i161> [#uses=1]
+ store i161 %tmp, i161* @i161_s
+ ret void
+}
+
+define void @i162_ls() nounwind {
+ %tmp = load i162* @i162_l ; <i162> [#uses=1]
+ store i162 %tmp, i162* @i162_s
+ ret void
+}
+
+define void @i163_ls() nounwind {
+ %tmp = load i163* @i163_l ; <i163> [#uses=1]
+ store i163 %tmp, i163* @i163_s
+ ret void
+}
+
+define void @i164_ls() nounwind {
+ %tmp = load i164* @i164_l ; <i164> [#uses=1]
+ store i164 %tmp, i164* @i164_s
+ ret void
+}
+
+define void @i165_ls() nounwind {
+ %tmp = load i165* @i165_l ; <i165> [#uses=1]
+ store i165 %tmp, i165* @i165_s
+ ret void
+}
+
+define void @i166_ls() nounwind {
+ %tmp = load i166* @i166_l ; <i166> [#uses=1]
+ store i166 %tmp, i166* @i166_s
+ ret void
+}
+
+define void @i167_ls() nounwind {
+ %tmp = load i167* @i167_l ; <i167> [#uses=1]
+ store i167 %tmp, i167* @i167_s
+ ret void
+}
+
+define void @i168_ls() nounwind {
+ %tmp = load i168* @i168_l ; <i168> [#uses=1]
+ store i168 %tmp, i168* @i168_s
+ ret void
+}
+
+define void @i169_ls() nounwind {
+ %tmp = load i169* @i169_l ; <i169> [#uses=1]
+ store i169 %tmp, i169* @i169_s
+ ret void
+}
+
+define void @i170_ls() nounwind {
+ %tmp = load i170* @i170_l ; <i170> [#uses=1]
+ store i170 %tmp, i170* @i170_s
+ ret void
+}
+
+define void @i171_ls() nounwind {
+ %tmp = load i171* @i171_l ; <i171> [#uses=1]
+ store i171 %tmp, i171* @i171_s
+ ret void
+}
+
+define void @i172_ls() nounwind {
+ %tmp = load i172* @i172_l ; <i172> [#uses=1]
+ store i172 %tmp, i172* @i172_s
+ ret void
+}
+
+define void @i173_ls() nounwind {
+ %tmp = load i173* @i173_l ; <i173> [#uses=1]
+ store i173 %tmp, i173* @i173_s
+ ret void
+}
+
+define void @i174_ls() nounwind {
+ %tmp = load i174* @i174_l ; <i174> [#uses=1]
+ store i174 %tmp, i174* @i174_s
+ ret void
+}
+
+define void @i175_ls() nounwind {
+ %tmp = load i175* @i175_l ; <i175> [#uses=1]
+ store i175 %tmp, i175* @i175_s
+ ret void
+}
+
+define void @i176_ls() nounwind {
+ %tmp = load i176* @i176_l ; <i176> [#uses=1]
+ store i176 %tmp, i176* @i176_s
+ ret void
+}
+
+define void @i177_ls() nounwind {
+ %tmp = load i177* @i177_l ; <i177> [#uses=1]
+ store i177 %tmp, i177* @i177_s
+ ret void
+}
+
+define void @i178_ls() nounwind {
+ %tmp = load i178* @i178_l ; <i178> [#uses=1]
+ store i178 %tmp, i178* @i178_s
+ ret void
+}
+
+define void @i179_ls() nounwind {
+ %tmp = load i179* @i179_l ; <i179> [#uses=1]
+ store i179 %tmp, i179* @i179_s
+ ret void
+}
+
+define void @i180_ls() nounwind {
+ %tmp = load i180* @i180_l ; <i180> [#uses=1]
+ store i180 %tmp, i180* @i180_s
+ ret void
+}
+
+define void @i181_ls() nounwind {
+ %tmp = load i181* @i181_l ; <i181> [#uses=1]
+ store i181 %tmp, i181* @i181_s
+ ret void
+}
+
+define void @i182_ls() nounwind {
+ %tmp = load i182* @i182_l ; <i182> [#uses=1]
+ store i182 %tmp, i182* @i182_s
+ ret void
+}
+
+define void @i183_ls() nounwind {
+ %tmp = load i183* @i183_l ; <i183> [#uses=1]
+ store i183 %tmp, i183* @i183_s
+ ret void
+}
+
+define void @i184_ls() nounwind {
+ %tmp = load i184* @i184_l ; <i184> [#uses=1]
+ store i184 %tmp, i184* @i184_s
+ ret void
+}
+
+define void @i185_ls() nounwind {
+ %tmp = load i185* @i185_l ; <i185> [#uses=1]
+ store i185 %tmp, i185* @i185_s
+ ret void
+}
+
+define void @i186_ls() nounwind {
+ %tmp = load i186* @i186_l ; <i186> [#uses=1]
+ store i186 %tmp, i186* @i186_s
+ ret void
+}
+
+define void @i187_ls() nounwind {
+ %tmp = load i187* @i187_l ; <i187> [#uses=1]
+ store i187 %tmp, i187* @i187_s
+ ret void
+}
+
+define void @i188_ls() nounwind {
+ %tmp = load i188* @i188_l ; <i188> [#uses=1]
+ store i188 %tmp, i188* @i188_s
+ ret void
+}
+
+define void @i189_ls() nounwind {
+ %tmp = load i189* @i189_l ; <i189> [#uses=1]
+ store i189 %tmp, i189* @i189_s
+ ret void
+}
+
+define void @i190_ls() nounwind {
+ %tmp = load i190* @i190_l ; <i190> [#uses=1]
+ store i190 %tmp, i190* @i190_s
+ ret void
+}
+
+define void @i191_ls() nounwind {
+ %tmp = load i191* @i191_l ; <i191> [#uses=1]
+ store i191 %tmp, i191* @i191_s
+ ret void
+}
+
+define void @i192_ls() nounwind {
+ %tmp = load i192* @i192_l ; <i192> [#uses=1]
+ store i192 %tmp, i192* @i192_s
+ ret void
+}
+
+define void @i193_ls() nounwind {
+ %tmp = load i193* @i193_l ; <i193> [#uses=1]
+ store i193 %tmp, i193* @i193_s
+ ret void
+}
+
+define void @i194_ls() nounwind {
+ %tmp = load i194* @i194_l ; <i194> [#uses=1]
+ store i194 %tmp, i194* @i194_s
+ ret void
+}
+
+define void @i195_ls() nounwind {
+ %tmp = load i195* @i195_l ; <i195> [#uses=1]
+ store i195 %tmp, i195* @i195_s
+ ret void
+}
+
+define void @i196_ls() nounwind {
+ %tmp = load i196* @i196_l ; <i196> [#uses=1]
+ store i196 %tmp, i196* @i196_s
+ ret void
+}
+
+define void @i197_ls() nounwind {
+ %tmp = load i197* @i197_l ; <i197> [#uses=1]
+ store i197 %tmp, i197* @i197_s
+ ret void
+}
+
+define void @i198_ls() nounwind {
+ %tmp = load i198* @i198_l ; <i198> [#uses=1]
+ store i198 %tmp, i198* @i198_s
+ ret void
+}
+
+define void @i199_ls() nounwind {
+ %tmp = load i199* @i199_l ; <i199> [#uses=1]
+ store i199 %tmp, i199* @i199_s
+ ret void
+}
+
+define void @i200_ls() nounwind {
+ %tmp = load i200* @i200_l ; <i200> [#uses=1]
+ store i200 %tmp, i200* @i200_s
+ ret void
+}
+
+define void @i201_ls() nounwind {
+ %tmp = load i201* @i201_l ; <i201> [#uses=1]
+ store i201 %tmp, i201* @i201_s
+ ret void
+}
+
+define void @i202_ls() nounwind {
+ %tmp = load i202* @i202_l ; <i202> [#uses=1]
+ store i202 %tmp, i202* @i202_s
+ ret void
+}
+
+define void @i203_ls() nounwind {
+ %tmp = load i203* @i203_l ; <i203> [#uses=1]
+ store i203 %tmp, i203* @i203_s
+ ret void
+}
+
+define void @i204_ls() nounwind {
+ %tmp = load i204* @i204_l ; <i204> [#uses=1]
+ store i204 %tmp, i204* @i204_s
+ ret void
+}
+
+define void @i205_ls() nounwind {
+ %tmp = load i205* @i205_l ; <i205> [#uses=1]
+ store i205 %tmp, i205* @i205_s
+ ret void
+}
+
+define void @i206_ls() nounwind {
+ %tmp = load i206* @i206_l ; <i206> [#uses=1]
+ store i206 %tmp, i206* @i206_s
+ ret void
+}
+
+define void @i207_ls() nounwind {
+ %tmp = load i207* @i207_l ; <i207> [#uses=1]
+ store i207 %tmp, i207* @i207_s
+ ret void
+}
+
+define void @i208_ls() nounwind {
+ %tmp = load i208* @i208_l ; <i208> [#uses=1]
+ store i208 %tmp, i208* @i208_s
+ ret void
+}
+
+define void @i209_ls() nounwind {
+ %tmp = load i209* @i209_l ; <i209> [#uses=1]
+ store i209 %tmp, i209* @i209_s
+ ret void
+}
+
+define void @i210_ls() nounwind {
+ %tmp = load i210* @i210_l ; <i210> [#uses=1]
+ store i210 %tmp, i210* @i210_s
+ ret void
+}
+
+define void @i211_ls() nounwind {
+ %tmp = load i211* @i211_l ; <i211> [#uses=1]
+ store i211 %tmp, i211* @i211_s
+ ret void
+}
+
+define void @i212_ls() nounwind {
+ %tmp = load i212* @i212_l ; <i212> [#uses=1]
+ store i212 %tmp, i212* @i212_s
+ ret void
+}
+
+define void @i213_ls() nounwind {
+ %tmp = load i213* @i213_l ; <i213> [#uses=1]
+ store i213 %tmp, i213* @i213_s
+ ret void
+}
+
+define void @i214_ls() nounwind {
+ %tmp = load i214* @i214_l ; <i214> [#uses=1]
+ store i214 %tmp, i214* @i214_s
+ ret void
+}
+
+define void @i215_ls() nounwind {
+ %tmp = load i215* @i215_l ; <i215> [#uses=1]
+ store i215 %tmp, i215* @i215_s
+ ret void
+}
+
+define void @i216_ls() nounwind {
+ %tmp = load i216* @i216_l ; <i216> [#uses=1]
+ store i216 %tmp, i216* @i216_s
+ ret void
+}
+
+define void @i217_ls() nounwind {
+ %tmp = load i217* @i217_l ; <i217> [#uses=1]
+ store i217 %tmp, i217* @i217_s
+ ret void
+}
+
+define void @i218_ls() nounwind {
+ %tmp = load i218* @i218_l ; <i218> [#uses=1]
+ store i218 %tmp, i218* @i218_s
+ ret void
+}
+
+define void @i219_ls() nounwind {
+ %tmp = load i219* @i219_l ; <i219> [#uses=1]
+ store i219 %tmp, i219* @i219_s
+ ret void
+}
+
+define void @i220_ls() nounwind {
+ %tmp = load i220* @i220_l ; <i220> [#uses=1]
+ store i220 %tmp, i220* @i220_s
+ ret void
+}
+
+define void @i221_ls() nounwind {
+ %tmp = load i221* @i221_l ; <i221> [#uses=1]
+ store i221 %tmp, i221* @i221_s
+ ret void
+}
+
+define void @i222_ls() nounwind {
+ %tmp = load i222* @i222_l ; <i222> [#uses=1]
+ store i222 %tmp, i222* @i222_s
+ ret void
+}
+
+define void @i223_ls() nounwind {
+ %tmp = load i223* @i223_l ; <i223> [#uses=1]
+ store i223 %tmp, i223* @i223_s
+ ret void
+}
+
+define void @i224_ls() nounwind {
+ %tmp = load i224* @i224_l ; <i224> [#uses=1]
+ store i224 %tmp, i224* @i224_s
+ ret void
+}
+
+define void @i225_ls() nounwind {
+ %tmp = load i225* @i225_l ; <i225> [#uses=1]
+ store i225 %tmp, i225* @i225_s
+ ret void
+}
+
+define void @i226_ls() nounwind {
+ %tmp = load i226* @i226_l ; <i226> [#uses=1]
+ store i226 %tmp, i226* @i226_s
+ ret void
+}
+
+define void @i227_ls() nounwind {
+ %tmp = load i227* @i227_l ; <i227> [#uses=1]
+ store i227 %tmp, i227* @i227_s
+ ret void
+}
+
+define void @i228_ls() nounwind {
+ %tmp = load i228* @i228_l ; <i228> [#uses=1]
+ store i228 %tmp, i228* @i228_s
+ ret void
+}
+
+define void @i229_ls() nounwind {
+ %tmp = load i229* @i229_l ; <i229> [#uses=1]
+ store i229 %tmp, i229* @i229_s
+ ret void
+}
+
+define void @i230_ls() nounwind {
+ %tmp = load i230* @i230_l ; <i230> [#uses=1]
+ store i230 %tmp, i230* @i230_s
+ ret void
+}
+
+define void @i231_ls() nounwind {
+ %tmp = load i231* @i231_l ; <i231> [#uses=1]
+ store i231 %tmp, i231* @i231_s
+ ret void
+}
+
+define void @i232_ls() nounwind {
+ %tmp = load i232* @i232_l ; <i232> [#uses=1]
+ store i232 %tmp, i232* @i232_s
+ ret void
+}
+
+define void @i233_ls() nounwind {
+ %tmp = load i233* @i233_l ; <i233> [#uses=1]
+ store i233 %tmp, i233* @i233_s
+ ret void
+}
+
+define void @i234_ls() nounwind {
+ %tmp = load i234* @i234_l ; <i234> [#uses=1]
+ store i234 %tmp, i234* @i234_s
+ ret void
+}
+
+define void @i235_ls() nounwind {
+ %tmp = load i235* @i235_l ; <i235> [#uses=1]
+ store i235 %tmp, i235* @i235_s
+ ret void
+}
+
+define void @i236_ls() nounwind {
+ %tmp = load i236* @i236_l ; <i236> [#uses=1]
+ store i236 %tmp, i236* @i236_s
+ ret void
+}
+
+define void @i237_ls() nounwind {
+ %tmp = load i237* @i237_l ; <i237> [#uses=1]
+ store i237 %tmp, i237* @i237_s
+ ret void
+}
+
+define void @i238_ls() nounwind {
+ %tmp = load i238* @i238_l ; <i238> [#uses=1]
+ store i238 %tmp, i238* @i238_s
+ ret void
+}
+
+define void @i239_ls() nounwind {
+ %tmp = load i239* @i239_l ; <i239> [#uses=1]
+ store i239 %tmp, i239* @i239_s
+ ret void
+}
+
+define void @i240_ls() nounwind {
+ %tmp = load i240* @i240_l ; <i240> [#uses=1]
+ store i240 %tmp, i240* @i240_s
+ ret void
+}
+
+define void @i241_ls() nounwind {
+ %tmp = load i241* @i241_l ; <i241> [#uses=1]
+ store i241 %tmp, i241* @i241_s
+ ret void
+}
+
+define void @i242_ls() nounwind {
+ %tmp = load i242* @i242_l ; <i242> [#uses=1]
+ store i242 %tmp, i242* @i242_s
+ ret void
+}
+
+define void @i243_ls() nounwind {
+ %tmp = load i243* @i243_l ; <i243> [#uses=1]
+ store i243 %tmp, i243* @i243_s
+ ret void
+}
+
+define void @i244_ls() nounwind {
+ %tmp = load i244* @i244_l ; <i244> [#uses=1]
+ store i244 %tmp, i244* @i244_s
+ ret void
+}
+
+define void @i245_ls() nounwind {
+ %tmp = load i245* @i245_l ; <i245> [#uses=1]
+ store i245 %tmp, i245* @i245_s
+ ret void
+}
+
+define void @i246_ls() nounwind {
+ %tmp = load i246* @i246_l ; <i246> [#uses=1]
+ store i246 %tmp, i246* @i246_s
+ ret void
+}
+
+define void @i247_ls() nounwind {
+ %tmp = load i247* @i247_l ; <i247> [#uses=1]
+ store i247 %tmp, i247* @i247_s
+ ret void
+}
+
+define void @i248_ls() nounwind {
+ %tmp = load i248* @i248_l ; <i248> [#uses=1]
+ store i248 %tmp, i248* @i248_s
+ ret void
+}
+
+define void @i249_ls() nounwind {
+ %tmp = load i249* @i249_l ; <i249> [#uses=1]
+ store i249 %tmp, i249* @i249_s
+ ret void
+}
+
+define void @i250_ls() nounwind {
+ %tmp = load i250* @i250_l ; <i250> [#uses=1]
+ store i250 %tmp, i250* @i250_s
+ ret void
+}
+
+define void @i251_ls() nounwind {
+ %tmp = load i251* @i251_l ; <i251> [#uses=1]
+ store i251 %tmp, i251* @i251_s
+ ret void
+}
+
+define void @i252_ls() nounwind {
+ %tmp = load i252* @i252_l ; <i252> [#uses=1]
+ store i252 %tmp, i252* @i252_s
+ ret void
+}
+
+define void @i253_ls() nounwind {
+ %tmp = load i253* @i253_l ; <i253> [#uses=1]
+ store i253 %tmp, i253* @i253_s
+ ret void
+}
+
+define void @i254_ls() nounwind {
+ %tmp = load i254* @i254_l ; <i254> [#uses=1]
+ store i254 %tmp, i254* @i254_s
+ ret void
+}
+
+define void @i255_ls() nounwind {
+ %tmp = load i255* @i255_l ; <i255> [#uses=1]
+ store i255 %tmp, i255* @i255_s
+ ret void
+}
+
+define void @i256_ls() nounwind {
+ %tmp = load i256* @i256_l ; <i256> [#uses=1]
+ store i256 %tmp, i256* @i256_s
+ ret void
+}
diff --git a/test/CodeGen/Generic/APIntParam.ll b/test/CodeGen/Generic/APIntParam.ll
new file mode 100644
index 0000000..8aa0b49
--- /dev/null
+++ b/test/CodeGen/Generic/APIntParam.ll
@@ -0,0 +1,1537 @@
+; RUN: llc < %s > %t
+@i1_s = external global i1 ; <i1*> [#uses=1]
+@i2_s = external global i2 ; <i2*> [#uses=1]
+@i3_s = external global i3 ; <i3*> [#uses=1]
+@i4_s = external global i4 ; <i4*> [#uses=1]
+@i5_s = external global i5 ; <i5*> [#uses=1]
+@i6_s = external global i6 ; <i6*> [#uses=1]
+@i7_s = external global i7 ; <i7*> [#uses=1]
+@i8_s = external global i8 ; <i8*> [#uses=1]
+@i9_s = external global i9 ; <i9*> [#uses=1]
+@i10_s = external global i10 ; <i10*> [#uses=1]
+@i11_s = external global i11 ; <i11*> [#uses=1]
+@i12_s = external global i12 ; <i12*> [#uses=1]
+@i13_s = external global i13 ; <i13*> [#uses=1]
+@i14_s = external global i14 ; <i14*> [#uses=1]
+@i15_s = external global i15 ; <i15*> [#uses=1]
+@i16_s = external global i16 ; <i16*> [#uses=1]
+@i17_s = external global i17 ; <i17*> [#uses=1]
+@i18_s = external global i18 ; <i18*> [#uses=1]
+@i19_s = external global i19 ; <i19*> [#uses=1]
+@i20_s = external global i20 ; <i20*> [#uses=1]
+@i21_s = external global i21 ; <i21*> [#uses=1]
+@i22_s = external global i22 ; <i22*> [#uses=1]
+@i23_s = external global i23 ; <i23*> [#uses=1]
+@i24_s = external global i24 ; <i24*> [#uses=1]
+@i25_s = external global i25 ; <i25*> [#uses=1]
+@i26_s = external global i26 ; <i26*> [#uses=1]
+@i27_s = external global i27 ; <i27*> [#uses=1]
+@i28_s = external global i28 ; <i28*> [#uses=1]
+@i29_s = external global i29 ; <i29*> [#uses=1]
+@i30_s = external global i30 ; <i30*> [#uses=1]
+@i31_s = external global i31 ; <i31*> [#uses=1]
+@i32_s = external global i32 ; <i32*> [#uses=1]
+@i33_s = external global i33 ; <i33*> [#uses=1]
+@i34_s = external global i34 ; <i34*> [#uses=1]
+@i35_s = external global i35 ; <i35*> [#uses=1]
+@i36_s = external global i36 ; <i36*> [#uses=1]
+@i37_s = external global i37 ; <i37*> [#uses=1]
+@i38_s = external global i38 ; <i38*> [#uses=1]
+@i39_s = external global i39 ; <i39*> [#uses=1]
+@i40_s = external global i40 ; <i40*> [#uses=1]
+@i41_s = external global i41 ; <i41*> [#uses=1]
+@i42_s = external global i42 ; <i42*> [#uses=1]
+@i43_s = external global i43 ; <i43*> [#uses=1]
+@i44_s = external global i44 ; <i44*> [#uses=1]
+@i45_s = external global i45 ; <i45*> [#uses=1]
+@i46_s = external global i46 ; <i46*> [#uses=1]
+@i47_s = external global i47 ; <i47*> [#uses=1]
+@i48_s = external global i48 ; <i48*> [#uses=1]
+@i49_s = external global i49 ; <i49*> [#uses=1]
+@i50_s = external global i50 ; <i50*> [#uses=1]
+@i51_s = external global i51 ; <i51*> [#uses=1]
+@i52_s = external global i52 ; <i52*> [#uses=1]
+@i53_s = external global i53 ; <i53*> [#uses=1]
+@i54_s = external global i54 ; <i54*> [#uses=1]
+@i55_s = external global i55 ; <i55*> [#uses=1]
+@i56_s = external global i56 ; <i56*> [#uses=1]
+@i57_s = external global i57 ; <i57*> [#uses=1]
+@i58_s = external global i58 ; <i58*> [#uses=1]
+@i59_s = external global i59 ; <i59*> [#uses=1]
+@i60_s = external global i60 ; <i60*> [#uses=1]
+@i61_s = external global i61 ; <i61*> [#uses=1]
+@i62_s = external global i62 ; <i62*> [#uses=1]
+@i63_s = external global i63 ; <i63*> [#uses=1]
+@i64_s = external global i64 ; <i64*> [#uses=1]
+@i65_s = external global i65 ; <i65*> [#uses=1]
+@i66_s = external global i66 ; <i66*> [#uses=1]
+@i67_s = external global i67 ; <i67*> [#uses=1]
+@i68_s = external global i68 ; <i68*> [#uses=1]
+@i69_s = external global i69 ; <i69*> [#uses=1]
+@i70_s = external global i70 ; <i70*> [#uses=1]
+@i71_s = external global i71 ; <i71*> [#uses=1]
+@i72_s = external global i72 ; <i72*> [#uses=1]
+@i73_s = external global i73 ; <i73*> [#uses=1]
+@i74_s = external global i74 ; <i74*> [#uses=1]
+@i75_s = external global i75 ; <i75*> [#uses=1]
+@i76_s = external global i76 ; <i76*> [#uses=1]
+@i77_s = external global i77 ; <i77*> [#uses=1]
+@i78_s = external global i78 ; <i78*> [#uses=1]
+@i79_s = external global i79 ; <i79*> [#uses=1]
+@i80_s = external global i80 ; <i80*> [#uses=1]
+@i81_s = external global i81 ; <i81*> [#uses=1]
+@i82_s = external global i82 ; <i82*> [#uses=1]
+@i83_s = external global i83 ; <i83*> [#uses=1]
+@i84_s = external global i84 ; <i84*> [#uses=1]
+@i85_s = external global i85 ; <i85*> [#uses=1]
+@i86_s = external global i86 ; <i86*> [#uses=1]
+@i87_s = external global i87 ; <i87*> [#uses=1]
+@i88_s = external global i88 ; <i88*> [#uses=1]
+@i89_s = external global i89 ; <i89*> [#uses=1]
+@i90_s = external global i90 ; <i90*> [#uses=1]
+@i91_s = external global i91 ; <i91*> [#uses=1]
+@i92_s = external global i92 ; <i92*> [#uses=1]
+@i93_s = external global i93 ; <i93*> [#uses=1]
+@i94_s = external global i94 ; <i94*> [#uses=1]
+@i95_s = external global i95 ; <i95*> [#uses=1]
+@i96_s = external global i96 ; <i96*> [#uses=1]
+@i97_s = external global i97 ; <i97*> [#uses=1]
+@i98_s = external global i98 ; <i98*> [#uses=1]
+@i99_s = external global i99 ; <i99*> [#uses=1]
+@i100_s = external global i100 ; <i100*> [#uses=1]
+@i101_s = external global i101 ; <i101*> [#uses=1]
+@i102_s = external global i102 ; <i102*> [#uses=1]
+@i103_s = external global i103 ; <i103*> [#uses=1]
+@i104_s = external global i104 ; <i104*> [#uses=1]
+@i105_s = external global i105 ; <i105*> [#uses=1]
+@i106_s = external global i106 ; <i106*> [#uses=1]
+@i107_s = external global i107 ; <i107*> [#uses=1]
+@i108_s = external global i108 ; <i108*> [#uses=1]
+@i109_s = external global i109 ; <i109*> [#uses=1]
+@i110_s = external global i110 ; <i110*> [#uses=1]
+@i111_s = external global i111 ; <i111*> [#uses=1]
+@i112_s = external global i112 ; <i112*> [#uses=1]
+@i113_s = external global i113 ; <i113*> [#uses=1]
+@i114_s = external global i114 ; <i114*> [#uses=1]
+@i115_s = external global i115 ; <i115*> [#uses=1]
+@i116_s = external global i116 ; <i116*> [#uses=1]
+@i117_s = external global i117 ; <i117*> [#uses=1]
+@i118_s = external global i118 ; <i118*> [#uses=1]
+@i119_s = external global i119 ; <i119*> [#uses=1]
+@i120_s = external global i120 ; <i120*> [#uses=1]
+@i121_s = external global i121 ; <i121*> [#uses=1]
+@i122_s = external global i122 ; <i122*> [#uses=1]
+@i123_s = external global i123 ; <i123*> [#uses=1]
+@i124_s = external global i124 ; <i124*> [#uses=1]
+@i125_s = external global i125 ; <i125*> [#uses=1]
+@i126_s = external global i126 ; <i126*> [#uses=1]
+@i127_s = external global i127 ; <i127*> [#uses=1]
+@i128_s = external global i128 ; <i128*> [#uses=1]
+@i129_s = external global i129 ; <i129*> [#uses=1]
+@i130_s = external global i130 ; <i130*> [#uses=1]
+@i131_s = external global i131 ; <i131*> [#uses=1]
+@i132_s = external global i132 ; <i132*> [#uses=1]
+@i133_s = external global i133 ; <i133*> [#uses=1]
+@i134_s = external global i134 ; <i134*> [#uses=1]
+@i135_s = external global i135 ; <i135*> [#uses=1]
+@i136_s = external global i136 ; <i136*> [#uses=1]
+@i137_s = external global i137 ; <i137*> [#uses=1]
+@i138_s = external global i138 ; <i138*> [#uses=1]
+@i139_s = external global i139 ; <i139*> [#uses=1]
+@i140_s = external global i140 ; <i140*> [#uses=1]
+@i141_s = external global i141 ; <i141*> [#uses=1]
+@i142_s = external global i142 ; <i142*> [#uses=1]
+@i143_s = external global i143 ; <i143*> [#uses=1]
+@i144_s = external global i144 ; <i144*> [#uses=1]
+@i145_s = external global i145 ; <i145*> [#uses=1]
+@i146_s = external global i146 ; <i146*> [#uses=1]
+@i147_s = external global i147 ; <i147*> [#uses=1]
+@i148_s = external global i148 ; <i148*> [#uses=1]
+@i149_s = external global i149 ; <i149*> [#uses=1]
+@i150_s = external global i150 ; <i150*> [#uses=1]
+@i151_s = external global i151 ; <i151*> [#uses=1]
+@i152_s = external global i152 ; <i152*> [#uses=1]
+@i153_s = external global i153 ; <i153*> [#uses=1]
+@i154_s = external global i154 ; <i154*> [#uses=1]
+@i155_s = external global i155 ; <i155*> [#uses=1]
+@i156_s = external global i156 ; <i156*> [#uses=1]
+@i157_s = external global i157 ; <i157*> [#uses=1]
+@i158_s = external global i158 ; <i158*> [#uses=1]
+@i159_s = external global i159 ; <i159*> [#uses=1]
+@i160_s = external global i160 ; <i160*> [#uses=1]
+@i161_s = external global i161 ; <i161*> [#uses=1]
+@i162_s = external global i162 ; <i162*> [#uses=1]
+@i163_s = external global i163 ; <i163*> [#uses=1]
+@i164_s = external global i164 ; <i164*> [#uses=1]
+@i165_s = external global i165 ; <i165*> [#uses=1]
+@i166_s = external global i166 ; <i166*> [#uses=1]
+@i167_s = external global i167 ; <i167*> [#uses=1]
+@i168_s = external global i168 ; <i168*> [#uses=1]
+@i169_s = external global i169 ; <i169*> [#uses=1]
+@i170_s = external global i170 ; <i170*> [#uses=1]
+@i171_s = external global i171 ; <i171*> [#uses=1]
+@i172_s = external global i172 ; <i172*> [#uses=1]
+@i173_s = external global i173 ; <i173*> [#uses=1]
+@i174_s = external global i174 ; <i174*> [#uses=1]
+@i175_s = external global i175 ; <i175*> [#uses=1]
+@i176_s = external global i176 ; <i176*> [#uses=1]
+@i177_s = external global i177 ; <i177*> [#uses=1]
+@i178_s = external global i178 ; <i178*> [#uses=1]
+@i179_s = external global i179 ; <i179*> [#uses=1]
+@i180_s = external global i180 ; <i180*> [#uses=1]
+@i181_s = external global i181 ; <i181*> [#uses=1]
+@i182_s = external global i182 ; <i182*> [#uses=1]
+@i183_s = external global i183 ; <i183*> [#uses=1]
+@i184_s = external global i184 ; <i184*> [#uses=1]
+@i185_s = external global i185 ; <i185*> [#uses=1]
+@i186_s = external global i186 ; <i186*> [#uses=1]
+@i187_s = external global i187 ; <i187*> [#uses=1]
+@i188_s = external global i188 ; <i188*> [#uses=1]
+@i189_s = external global i189 ; <i189*> [#uses=1]
+@i190_s = external global i190 ; <i190*> [#uses=1]
+@i191_s = external global i191 ; <i191*> [#uses=1]
+@i192_s = external global i192 ; <i192*> [#uses=1]
+@i193_s = external global i193 ; <i193*> [#uses=1]
+@i194_s = external global i194 ; <i194*> [#uses=1]
+@i195_s = external global i195 ; <i195*> [#uses=1]
+@i196_s = external global i196 ; <i196*> [#uses=1]
+@i197_s = external global i197 ; <i197*> [#uses=1]
+@i198_s = external global i198 ; <i198*> [#uses=1]
+@i199_s = external global i199 ; <i199*> [#uses=1]
+@i200_s = external global i200 ; <i200*> [#uses=1]
+@i201_s = external global i201 ; <i201*> [#uses=1]
+@i202_s = external global i202 ; <i202*> [#uses=1]
+@i203_s = external global i203 ; <i203*> [#uses=1]
+@i204_s = external global i204 ; <i204*> [#uses=1]
+@i205_s = external global i205 ; <i205*> [#uses=1]
+@i206_s = external global i206 ; <i206*> [#uses=1]
+@i207_s = external global i207 ; <i207*> [#uses=1]
+@i208_s = external global i208 ; <i208*> [#uses=1]
+@i209_s = external global i209 ; <i209*> [#uses=1]
+@i210_s = external global i210 ; <i210*> [#uses=1]
+@i211_s = external global i211 ; <i211*> [#uses=1]
+@i212_s = external global i212 ; <i212*> [#uses=1]
+@i213_s = external global i213 ; <i213*> [#uses=1]
+@i214_s = external global i214 ; <i214*> [#uses=1]
+@i215_s = external global i215 ; <i215*> [#uses=1]
+@i216_s = external global i216 ; <i216*> [#uses=1]
+@i217_s = external global i217 ; <i217*> [#uses=1]
+@i218_s = external global i218 ; <i218*> [#uses=1]
+@i219_s = external global i219 ; <i219*> [#uses=1]
+@i220_s = external global i220 ; <i220*> [#uses=1]
+@i221_s = external global i221 ; <i221*> [#uses=1]
+@i222_s = external global i222 ; <i222*> [#uses=1]
+@i223_s = external global i223 ; <i223*> [#uses=1]
+@i224_s = external global i224 ; <i224*> [#uses=1]
+@i225_s = external global i225 ; <i225*> [#uses=1]
+@i226_s = external global i226 ; <i226*> [#uses=1]
+@i227_s = external global i227 ; <i227*> [#uses=1]
+@i228_s = external global i228 ; <i228*> [#uses=1]
+@i229_s = external global i229 ; <i229*> [#uses=1]
+@i230_s = external global i230 ; <i230*> [#uses=1]
+@i231_s = external global i231 ; <i231*> [#uses=1]
+@i232_s = external global i232 ; <i232*> [#uses=1]
+@i233_s = external global i233 ; <i233*> [#uses=1]
+@i234_s = external global i234 ; <i234*> [#uses=1]
+@i235_s = external global i235 ; <i235*> [#uses=1]
+@i236_s = external global i236 ; <i236*> [#uses=1]
+@i237_s = external global i237 ; <i237*> [#uses=1]
+@i238_s = external global i238 ; <i238*> [#uses=1]
+@i239_s = external global i239 ; <i239*> [#uses=1]
+@i240_s = external global i240 ; <i240*> [#uses=1]
+@i241_s = external global i241 ; <i241*> [#uses=1]
+@i242_s = external global i242 ; <i242*> [#uses=1]
+@i243_s = external global i243 ; <i243*> [#uses=1]
+@i244_s = external global i244 ; <i244*> [#uses=1]
+@i245_s = external global i245 ; <i245*> [#uses=1]
+@i246_s = external global i246 ; <i246*> [#uses=1]
+@i247_s = external global i247 ; <i247*> [#uses=1]
+@i248_s = external global i248 ; <i248*> [#uses=1]
+@i249_s = external global i249 ; <i249*> [#uses=1]
+@i250_s = external global i250 ; <i250*> [#uses=1]
+@i251_s = external global i251 ; <i251*> [#uses=1]
+@i252_s = external global i252 ; <i252*> [#uses=1]
+@i253_s = external global i253 ; <i253*> [#uses=1]
+@i254_s = external global i254 ; <i254*> [#uses=1]
+@i255_s = external global i255 ; <i255*> [#uses=1]
+@i256_s = external global i256 ; <i256*> [#uses=1]
+
+define void @i1_ls(i1 %x) nounwind {
+ store i1 %x, i1* @i1_s
+ ret void
+}
+
+define void @i2_ls(i2 %x) nounwind {
+ store i2 %x, i2* @i2_s
+ ret void
+}
+
+define void @i3_ls(i3 %x) nounwind {
+ store i3 %x, i3* @i3_s
+ ret void
+}
+
+define void @i4_ls(i4 %x) nounwind {
+ store i4 %x, i4* @i4_s
+ ret void
+}
+
+define void @i5_ls(i5 %x) nounwind {
+ store i5 %x, i5* @i5_s
+ ret void
+}
+
+define void @i6_ls(i6 %x) nounwind {
+ store i6 %x, i6* @i6_s
+ ret void
+}
+
+define void @i7_ls(i7 %x) nounwind {
+ store i7 %x, i7* @i7_s
+ ret void
+}
+
+define void @i8_ls(i8 %x) nounwind {
+ store i8 %x, i8* @i8_s
+ ret void
+}
+
+define void @i9_ls(i9 %x) nounwind {
+ store i9 %x, i9* @i9_s
+ ret void
+}
+
+define void @i10_ls(i10 %x) nounwind {
+ store i10 %x, i10* @i10_s
+ ret void
+}
+
+define void @i11_ls(i11 %x) nounwind {
+ store i11 %x, i11* @i11_s
+ ret void
+}
+
+define void @i12_ls(i12 %x) nounwind {
+ store i12 %x, i12* @i12_s
+ ret void
+}
+
+define void @i13_ls(i13 %x) nounwind {
+ store i13 %x, i13* @i13_s
+ ret void
+}
+
+define void @i14_ls(i14 %x) nounwind {
+ store i14 %x, i14* @i14_s
+ ret void
+}
+
+define void @i15_ls(i15 %x) nounwind {
+ store i15 %x, i15* @i15_s
+ ret void
+}
+
+define void @i16_ls(i16 %x) nounwind {
+ store i16 %x, i16* @i16_s
+ ret void
+}
+
+define void @i17_ls(i17 %x) nounwind {
+ store i17 %x, i17* @i17_s
+ ret void
+}
+
+define void @i18_ls(i18 %x) nounwind {
+ store i18 %x, i18* @i18_s
+ ret void
+}
+
+define void @i19_ls(i19 %x) nounwind {
+ store i19 %x, i19* @i19_s
+ ret void
+}
+
+define void @i20_ls(i20 %x) nounwind {
+ store i20 %x, i20* @i20_s
+ ret void
+}
+
+define void @i21_ls(i21 %x) nounwind {
+ store i21 %x, i21* @i21_s
+ ret void
+}
+
+define void @i22_ls(i22 %x) nounwind {
+ store i22 %x, i22* @i22_s
+ ret void
+}
+
+define void @i23_ls(i23 %x) nounwind {
+ store i23 %x, i23* @i23_s
+ ret void
+}
+
+define void @i24_ls(i24 %x) nounwind {
+ store i24 %x, i24* @i24_s
+ ret void
+}
+
+define void @i25_ls(i25 %x) nounwind {
+ store i25 %x, i25* @i25_s
+ ret void
+}
+
+define void @i26_ls(i26 %x) nounwind {
+ store i26 %x, i26* @i26_s
+ ret void
+}
+
+define void @i27_ls(i27 %x) nounwind {
+ store i27 %x, i27* @i27_s
+ ret void
+}
+
+define void @i28_ls(i28 %x) nounwind {
+ store i28 %x, i28* @i28_s
+ ret void
+}
+
+define void @i29_ls(i29 %x) nounwind {
+ store i29 %x, i29* @i29_s
+ ret void
+}
+
+define void @i30_ls(i30 %x) nounwind {
+ store i30 %x, i30* @i30_s
+ ret void
+}
+
+define void @i31_ls(i31 %x) nounwind {
+ store i31 %x, i31* @i31_s
+ ret void
+}
+
+define void @i32_ls(i32 %x) nounwind {
+ store i32 %x, i32* @i32_s
+ ret void
+}
+
+define void @i33_ls(i33 %x) nounwind {
+ store i33 %x, i33* @i33_s
+ ret void
+}
+
+define void @i34_ls(i34 %x) nounwind {
+ store i34 %x, i34* @i34_s
+ ret void
+}
+
+define void @i35_ls(i35 %x) nounwind {
+ store i35 %x, i35* @i35_s
+ ret void
+}
+
+define void @i36_ls(i36 %x) nounwind {
+ store i36 %x, i36* @i36_s
+ ret void
+}
+
+define void @i37_ls(i37 %x) nounwind {
+ store i37 %x, i37* @i37_s
+ ret void
+}
+
+define void @i38_ls(i38 %x) nounwind {
+ store i38 %x, i38* @i38_s
+ ret void
+}
+
+define void @i39_ls(i39 %x) nounwind {
+ store i39 %x, i39* @i39_s
+ ret void
+}
+
+define void @i40_ls(i40 %x) nounwind {
+ store i40 %x, i40* @i40_s
+ ret void
+}
+
+define void @i41_ls(i41 %x) nounwind {
+ store i41 %x, i41* @i41_s
+ ret void
+}
+
+define void @i42_ls(i42 %x) nounwind {
+ store i42 %x, i42* @i42_s
+ ret void
+}
+
+define void @i43_ls(i43 %x) nounwind {
+ store i43 %x, i43* @i43_s
+ ret void
+}
+
+define void @i44_ls(i44 %x) nounwind {
+ store i44 %x, i44* @i44_s
+ ret void
+}
+
+define void @i45_ls(i45 %x) nounwind {
+ store i45 %x, i45* @i45_s
+ ret void
+}
+
+define void @i46_ls(i46 %x) nounwind {
+ store i46 %x, i46* @i46_s
+ ret void
+}
+
+define void @i47_ls(i47 %x) nounwind {
+ store i47 %x, i47* @i47_s
+ ret void
+}
+
+define void @i48_ls(i48 %x) nounwind {
+ store i48 %x, i48* @i48_s
+ ret void
+}
+
+define void @i49_ls(i49 %x) nounwind {
+ store i49 %x, i49* @i49_s
+ ret void
+}
+
+define void @i50_ls(i50 %x) nounwind {
+ store i50 %x, i50* @i50_s
+ ret void
+}
+
+define void @i51_ls(i51 %x) nounwind {
+ store i51 %x, i51* @i51_s
+ ret void
+}
+
+define void @i52_ls(i52 %x) nounwind {
+ store i52 %x, i52* @i52_s
+ ret void
+}
+
+define void @i53_ls(i53 %x) nounwind {
+ store i53 %x, i53* @i53_s
+ ret void
+}
+
+define void @i54_ls(i54 %x) nounwind {
+ store i54 %x, i54* @i54_s
+ ret void
+}
+
+define void @i55_ls(i55 %x) nounwind {
+ store i55 %x, i55* @i55_s
+ ret void
+}
+
+define void @i56_ls(i56 %x) nounwind {
+ store i56 %x, i56* @i56_s
+ ret void
+}
+
+define void @i57_ls(i57 %x) nounwind {
+ store i57 %x, i57* @i57_s
+ ret void
+}
+
+define void @i58_ls(i58 %x) nounwind {
+ store i58 %x, i58* @i58_s
+ ret void
+}
+
+define void @i59_ls(i59 %x) nounwind {
+ store i59 %x, i59* @i59_s
+ ret void
+}
+
+define void @i60_ls(i60 %x) nounwind {
+ store i60 %x, i60* @i60_s
+ ret void
+}
+
+define void @i61_ls(i61 %x) nounwind {
+ store i61 %x, i61* @i61_s
+ ret void
+}
+
+define void @i62_ls(i62 %x) nounwind {
+ store i62 %x, i62* @i62_s
+ ret void
+}
+
+define void @i63_ls(i63 %x) nounwind {
+ store i63 %x, i63* @i63_s
+ ret void
+}
+
+define void @i64_ls(i64 %x) nounwind {
+ store i64 %x, i64* @i64_s
+ ret void
+}
+
+define void @i65_ls(i65 %x) nounwind {
+ store i65 %x, i65* @i65_s
+ ret void
+}
+
+define void @i66_ls(i66 %x) nounwind {
+ store i66 %x, i66* @i66_s
+ ret void
+}
+
+define void @i67_ls(i67 %x) nounwind {
+ store i67 %x, i67* @i67_s
+ ret void
+}
+
+define void @i68_ls(i68 %x) nounwind {
+ store i68 %x, i68* @i68_s
+ ret void
+}
+
+define void @i69_ls(i69 %x) nounwind {
+ store i69 %x, i69* @i69_s
+ ret void
+}
+
+define void @i70_ls(i70 %x) nounwind {
+ store i70 %x, i70* @i70_s
+ ret void
+}
+
+define void @i71_ls(i71 %x) nounwind {
+ store i71 %x, i71* @i71_s
+ ret void
+}
+
+define void @i72_ls(i72 %x) nounwind {
+ store i72 %x, i72* @i72_s
+ ret void
+}
+
+define void @i73_ls(i73 %x) nounwind {
+ store i73 %x, i73* @i73_s
+ ret void
+}
+
+define void @i74_ls(i74 %x) nounwind {
+ store i74 %x, i74* @i74_s
+ ret void
+}
+
+define void @i75_ls(i75 %x) nounwind {
+ store i75 %x, i75* @i75_s
+ ret void
+}
+
+define void @i76_ls(i76 %x) nounwind {
+ store i76 %x, i76* @i76_s
+ ret void
+}
+
+define void @i77_ls(i77 %x) nounwind {
+ store i77 %x, i77* @i77_s
+ ret void
+}
+
+define void @i78_ls(i78 %x) nounwind {
+ store i78 %x, i78* @i78_s
+ ret void
+}
+
+define void @i79_ls(i79 %x) nounwind {
+ store i79 %x, i79* @i79_s
+ ret void
+}
+
+define void @i80_ls(i80 %x) nounwind {
+ store i80 %x, i80* @i80_s
+ ret void
+}
+
+define void @i81_ls(i81 %x) nounwind {
+ store i81 %x, i81* @i81_s
+ ret void
+}
+
+define void @i82_ls(i82 %x) nounwind {
+ store i82 %x, i82* @i82_s
+ ret void
+}
+
+define void @i83_ls(i83 %x) nounwind {
+ store i83 %x, i83* @i83_s
+ ret void
+}
+
+define void @i84_ls(i84 %x) nounwind {
+ store i84 %x, i84* @i84_s
+ ret void
+}
+
+define void @i85_ls(i85 %x) nounwind {
+ store i85 %x, i85* @i85_s
+ ret void
+}
+
+define void @i86_ls(i86 %x) nounwind {
+ store i86 %x, i86* @i86_s
+ ret void
+}
+
+define void @i87_ls(i87 %x) nounwind {
+ store i87 %x, i87* @i87_s
+ ret void
+}
+
+define void @i88_ls(i88 %x) nounwind {
+ store i88 %x, i88* @i88_s
+ ret void
+}
+
+define void @i89_ls(i89 %x) nounwind {
+ store i89 %x, i89* @i89_s
+ ret void
+}
+
+define void @i90_ls(i90 %x) nounwind {
+ store i90 %x, i90* @i90_s
+ ret void
+}
+
+define void @i91_ls(i91 %x) nounwind {
+ store i91 %x, i91* @i91_s
+ ret void
+}
+
+define void @i92_ls(i92 %x) nounwind {
+ store i92 %x, i92* @i92_s
+ ret void
+}
+
+define void @i93_ls(i93 %x) nounwind {
+ store i93 %x, i93* @i93_s
+ ret void
+}
+
+define void @i94_ls(i94 %x) nounwind {
+ store i94 %x, i94* @i94_s
+ ret void
+}
+
+define void @i95_ls(i95 %x) nounwind {
+ store i95 %x, i95* @i95_s
+ ret void
+}
+
+define void @i96_ls(i96 %x) nounwind {
+ store i96 %x, i96* @i96_s
+ ret void
+}
+
+define void @i97_ls(i97 %x) nounwind {
+ store i97 %x, i97* @i97_s
+ ret void
+}
+
+define void @i98_ls(i98 %x) nounwind {
+ store i98 %x, i98* @i98_s
+ ret void
+}
+
+define void @i99_ls(i99 %x) nounwind {
+ store i99 %x, i99* @i99_s
+ ret void
+}
+
+define void @i100_ls(i100 %x) nounwind {
+ store i100 %x, i100* @i100_s
+ ret void
+}
+
+define void @i101_ls(i101 %x) nounwind {
+ store i101 %x, i101* @i101_s
+ ret void
+}
+
+define void @i102_ls(i102 %x) nounwind {
+ store i102 %x, i102* @i102_s
+ ret void
+}
+
+define void @i103_ls(i103 %x) nounwind {
+ store i103 %x, i103* @i103_s
+ ret void
+}
+
+define void @i104_ls(i104 %x) nounwind {
+ store i104 %x, i104* @i104_s
+ ret void
+}
+
+define void @i105_ls(i105 %x) nounwind {
+ store i105 %x, i105* @i105_s
+ ret void
+}
+
+define void @i106_ls(i106 %x) nounwind {
+ store i106 %x, i106* @i106_s
+ ret void
+}
+
+define void @i107_ls(i107 %x) nounwind {
+ store i107 %x, i107* @i107_s
+ ret void
+}
+
+define void @i108_ls(i108 %x) nounwind {
+ store i108 %x, i108* @i108_s
+ ret void
+}
+
+define void @i109_ls(i109 %x) nounwind {
+ store i109 %x, i109* @i109_s
+ ret void
+}
+
+define void @i110_ls(i110 %x) nounwind {
+ store i110 %x, i110* @i110_s
+ ret void
+}
+
+define void @i111_ls(i111 %x) nounwind {
+ store i111 %x, i111* @i111_s
+ ret void
+}
+
+define void @i112_ls(i112 %x) nounwind {
+ store i112 %x, i112* @i112_s
+ ret void
+}
+
+define void @i113_ls(i113 %x) nounwind {
+ store i113 %x, i113* @i113_s
+ ret void
+}
+
+define void @i114_ls(i114 %x) nounwind {
+ store i114 %x, i114* @i114_s
+ ret void
+}
+
+define void @i115_ls(i115 %x) nounwind {
+ store i115 %x, i115* @i115_s
+ ret void
+}
+
+define void @i116_ls(i116 %x) nounwind {
+ store i116 %x, i116* @i116_s
+ ret void
+}
+
+define void @i117_ls(i117 %x) nounwind {
+ store i117 %x, i117* @i117_s
+ ret void
+}
+
+define void @i118_ls(i118 %x) nounwind {
+ store i118 %x, i118* @i118_s
+ ret void
+}
+
+define void @i119_ls(i119 %x) nounwind {
+ store i119 %x, i119* @i119_s
+ ret void
+}
+
+define void @i120_ls(i120 %x) nounwind {
+ store i120 %x, i120* @i120_s
+ ret void
+}
+
+define void @i121_ls(i121 %x) nounwind {
+ store i121 %x, i121* @i121_s
+ ret void
+}
+
+define void @i122_ls(i122 %x) nounwind {
+ store i122 %x, i122* @i122_s
+ ret void
+}
+
+define void @i123_ls(i123 %x) nounwind {
+ store i123 %x, i123* @i123_s
+ ret void
+}
+
+define void @i124_ls(i124 %x) nounwind {
+ store i124 %x, i124* @i124_s
+ ret void
+}
+
+define void @i125_ls(i125 %x) nounwind {
+ store i125 %x, i125* @i125_s
+ ret void
+}
+
+define void @i126_ls(i126 %x) nounwind {
+ store i126 %x, i126* @i126_s
+ ret void
+}
+
+define void @i127_ls(i127 %x) nounwind {
+ store i127 %x, i127* @i127_s
+ ret void
+}
+
+define void @i128_ls(i128 %x) nounwind {
+ store i128 %x, i128* @i128_s
+ ret void
+}
+
+define void @i129_ls(i129 %x) nounwind {
+ store i129 %x, i129* @i129_s
+ ret void
+}
+
+define void @i130_ls(i130 %x) nounwind {
+ store i130 %x, i130* @i130_s
+ ret void
+}
+
+define void @i131_ls(i131 %x) nounwind {
+ store i131 %x, i131* @i131_s
+ ret void
+}
+
+define void @i132_ls(i132 %x) nounwind {
+ store i132 %x, i132* @i132_s
+ ret void
+}
+
+define void @i133_ls(i133 %x) nounwind {
+ store i133 %x, i133* @i133_s
+ ret void
+}
+
+define void @i134_ls(i134 %x) nounwind {
+ store i134 %x, i134* @i134_s
+ ret void
+}
+
+define void @i135_ls(i135 %x) nounwind {
+ store i135 %x, i135* @i135_s
+ ret void
+}
+
+define void @i136_ls(i136 %x) nounwind {
+ store i136 %x, i136* @i136_s
+ ret void
+}
+
+define void @i137_ls(i137 %x) nounwind {
+ store i137 %x, i137* @i137_s
+ ret void
+}
+
+define void @i138_ls(i138 %x) nounwind {
+ store i138 %x, i138* @i138_s
+ ret void
+}
+
+define void @i139_ls(i139 %x) nounwind {
+ store i139 %x, i139* @i139_s
+ ret void
+}
+
+define void @i140_ls(i140 %x) nounwind {
+ store i140 %x, i140* @i140_s
+ ret void
+}
+
+define void @i141_ls(i141 %x) nounwind {
+ store i141 %x, i141* @i141_s
+ ret void
+}
+
+define void @i142_ls(i142 %x) nounwind {
+ store i142 %x, i142* @i142_s
+ ret void
+}
+
+define void @i143_ls(i143 %x) nounwind {
+ store i143 %x, i143* @i143_s
+ ret void
+}
+
+define void @i144_ls(i144 %x) nounwind {
+ store i144 %x, i144* @i144_s
+ ret void
+}
+
+define void @i145_ls(i145 %x) nounwind {
+ store i145 %x, i145* @i145_s
+ ret void
+}
+
+define void @i146_ls(i146 %x) nounwind {
+ store i146 %x, i146* @i146_s
+ ret void
+}
+
+define void @i147_ls(i147 %x) nounwind {
+ store i147 %x, i147* @i147_s
+ ret void
+}
+
+define void @i148_ls(i148 %x) nounwind {
+ store i148 %x, i148* @i148_s
+ ret void
+}
+
+define void @i149_ls(i149 %x) nounwind {
+ store i149 %x, i149* @i149_s
+ ret void
+}
+
+define void @i150_ls(i150 %x) nounwind {
+ store i150 %x, i150* @i150_s
+ ret void
+}
+
+define void @i151_ls(i151 %x) nounwind {
+ store i151 %x, i151* @i151_s
+ ret void
+}
+
+define void @i152_ls(i152 %x) nounwind {
+ store i152 %x, i152* @i152_s
+ ret void
+}
+
+define void @i153_ls(i153 %x) nounwind {
+ store i153 %x, i153* @i153_s
+ ret void
+}
+
+define void @i154_ls(i154 %x) nounwind {
+ store i154 %x, i154* @i154_s
+ ret void
+}
+
+define void @i155_ls(i155 %x) nounwind {
+ store i155 %x, i155* @i155_s
+ ret void
+}
+
+define void @i156_ls(i156 %x) nounwind {
+ store i156 %x, i156* @i156_s
+ ret void
+}
+
+define void @i157_ls(i157 %x) nounwind {
+ store i157 %x, i157* @i157_s
+ ret void
+}
+
+define void @i158_ls(i158 %x) nounwind {
+ store i158 %x, i158* @i158_s
+ ret void
+}
+
+define void @i159_ls(i159 %x) nounwind {
+ store i159 %x, i159* @i159_s
+ ret void
+}
+
+define void @i160_ls(i160 %x) nounwind {
+ store i160 %x, i160* @i160_s
+ ret void
+}
+
+define void @i161_ls(i161 %x) nounwind {
+ store i161 %x, i161* @i161_s
+ ret void
+}
+
+define void @i162_ls(i162 %x) nounwind {
+ store i162 %x, i162* @i162_s
+ ret void
+}
+
+define void @i163_ls(i163 %x) nounwind {
+ store i163 %x, i163* @i163_s
+ ret void
+}
+
+define void @i164_ls(i164 %x) nounwind {
+ store i164 %x, i164* @i164_s
+ ret void
+}
+
+define void @i165_ls(i165 %x) nounwind {
+ store i165 %x, i165* @i165_s
+ ret void
+}
+
+define void @i166_ls(i166 %x) nounwind {
+ store i166 %x, i166* @i166_s
+ ret void
+}
+
+define void @i167_ls(i167 %x) nounwind {
+ store i167 %x, i167* @i167_s
+ ret void
+}
+
+define void @i168_ls(i168 %x) nounwind {
+ store i168 %x, i168* @i168_s
+ ret void
+}
+
+define void @i169_ls(i169 %x) nounwind {
+ store i169 %x, i169* @i169_s
+ ret void
+}
+
+define void @i170_ls(i170 %x) nounwind {
+ store i170 %x, i170* @i170_s
+ ret void
+}
+
+define void @i171_ls(i171 %x) nounwind {
+ store i171 %x, i171* @i171_s
+ ret void
+}
+
+define void @i172_ls(i172 %x) nounwind {
+ store i172 %x, i172* @i172_s
+ ret void
+}
+
+define void @i173_ls(i173 %x) nounwind {
+ store i173 %x, i173* @i173_s
+ ret void
+}
+
+define void @i174_ls(i174 %x) nounwind {
+ store i174 %x, i174* @i174_s
+ ret void
+}
+
+define void @i175_ls(i175 %x) nounwind {
+ store i175 %x, i175* @i175_s
+ ret void
+}
+
+define void @i176_ls(i176 %x) nounwind {
+ store i176 %x, i176* @i176_s
+ ret void
+}
+
+define void @i177_ls(i177 %x) nounwind {
+ store i177 %x, i177* @i177_s
+ ret void
+}
+
+define void @i178_ls(i178 %x) nounwind {
+ store i178 %x, i178* @i178_s
+ ret void
+}
+
+define void @i179_ls(i179 %x) nounwind {
+ store i179 %x, i179* @i179_s
+ ret void
+}
+
+define void @i180_ls(i180 %x) nounwind {
+ store i180 %x, i180* @i180_s
+ ret void
+}
+
+define void @i181_ls(i181 %x) nounwind {
+ store i181 %x, i181* @i181_s
+ ret void
+}
+
+define void @i182_ls(i182 %x) nounwind {
+ store i182 %x, i182* @i182_s
+ ret void
+}
+
+define void @i183_ls(i183 %x) nounwind {
+ store i183 %x, i183* @i183_s
+ ret void
+}
+
+define void @i184_ls(i184 %x) nounwind {
+ store i184 %x, i184* @i184_s
+ ret void
+}
+
+define void @i185_ls(i185 %x) nounwind {
+ store i185 %x, i185* @i185_s
+ ret void
+}
+
+define void @i186_ls(i186 %x) nounwind {
+ store i186 %x, i186* @i186_s
+ ret void
+}
+
+define void @i187_ls(i187 %x) nounwind {
+ store i187 %x, i187* @i187_s
+ ret void
+}
+
+define void @i188_ls(i188 %x) nounwind {
+ store i188 %x, i188* @i188_s
+ ret void
+}
+
+define void @i189_ls(i189 %x) nounwind {
+ store i189 %x, i189* @i189_s
+ ret void
+}
+
+define void @i190_ls(i190 %x) nounwind {
+ store i190 %x, i190* @i190_s
+ ret void
+}
+
+define void @i191_ls(i191 %x) nounwind {
+ store i191 %x, i191* @i191_s
+ ret void
+}
+
+define void @i192_ls(i192 %x) nounwind {
+ store i192 %x, i192* @i192_s
+ ret void
+}
+
+define void @i193_ls(i193 %x) nounwind {
+ store i193 %x, i193* @i193_s
+ ret void
+}
+
+define void @i194_ls(i194 %x) nounwind {
+ store i194 %x, i194* @i194_s
+ ret void
+}
+
+define void @i195_ls(i195 %x) nounwind {
+ store i195 %x, i195* @i195_s
+ ret void
+}
+
+define void @i196_ls(i196 %x) nounwind {
+ store i196 %x, i196* @i196_s
+ ret void
+}
+
+define void @i197_ls(i197 %x) nounwind {
+ store i197 %x, i197* @i197_s
+ ret void
+}
+
+define void @i198_ls(i198 %x) nounwind {
+ store i198 %x, i198* @i198_s
+ ret void
+}
+
+define void @i199_ls(i199 %x) nounwind {
+ store i199 %x, i199* @i199_s
+ ret void
+}
+
+define void @i200_ls(i200 %x) nounwind {
+ store i200 %x, i200* @i200_s
+ ret void
+}
+
+define void @i201_ls(i201 %x) nounwind {
+ store i201 %x, i201* @i201_s
+ ret void
+}
+
+define void @i202_ls(i202 %x) nounwind {
+ store i202 %x, i202* @i202_s
+ ret void
+}
+
+define void @i203_ls(i203 %x) nounwind {
+ store i203 %x, i203* @i203_s
+ ret void
+}
+
+define void @i204_ls(i204 %x) nounwind {
+ store i204 %x, i204* @i204_s
+ ret void
+}
+
+define void @i205_ls(i205 %x) nounwind {
+ store i205 %x, i205* @i205_s
+ ret void
+}
+
+define void @i206_ls(i206 %x) nounwind {
+ store i206 %x, i206* @i206_s
+ ret void
+}
+
+define void @i207_ls(i207 %x) nounwind {
+ store i207 %x, i207* @i207_s
+ ret void
+}
+
+define void @i208_ls(i208 %x) nounwind {
+ store i208 %x, i208* @i208_s
+ ret void
+}
+
+define void @i209_ls(i209 %x) nounwind {
+ store i209 %x, i209* @i209_s
+ ret void
+}
+
+define void @i210_ls(i210 %x) nounwind {
+ store i210 %x, i210* @i210_s
+ ret void
+}
+
+define void @i211_ls(i211 %x) nounwind {
+ store i211 %x, i211* @i211_s
+ ret void
+}
+
+define void @i212_ls(i212 %x) nounwind {
+ store i212 %x, i212* @i212_s
+ ret void
+}
+
+define void @i213_ls(i213 %x) nounwind {
+ store i213 %x, i213* @i213_s
+ ret void
+}
+
+define void @i214_ls(i214 %x) nounwind {
+ store i214 %x, i214* @i214_s
+ ret void
+}
+
+define void @i215_ls(i215 %x) nounwind {
+ store i215 %x, i215* @i215_s
+ ret void
+}
+
+define void @i216_ls(i216 %x) nounwind {
+ store i216 %x, i216* @i216_s
+ ret void
+}
+
+define void @i217_ls(i217 %x) nounwind {
+ store i217 %x, i217* @i217_s
+ ret void
+}
+
+define void @i218_ls(i218 %x) nounwind {
+ store i218 %x, i218* @i218_s
+ ret void
+}
+
+define void @i219_ls(i219 %x) nounwind {
+ store i219 %x, i219* @i219_s
+ ret void
+}
+
+define void @i220_ls(i220 %x) nounwind {
+ store i220 %x, i220* @i220_s
+ ret void
+}
+
+define void @i221_ls(i221 %x) nounwind {
+ store i221 %x, i221* @i221_s
+ ret void
+}
+
+define void @i222_ls(i222 %x) nounwind {
+ store i222 %x, i222* @i222_s
+ ret void
+}
+
+define void @i223_ls(i223 %x) nounwind {
+ store i223 %x, i223* @i223_s
+ ret void
+}
+
+define void @i224_ls(i224 %x) nounwind {
+ store i224 %x, i224* @i224_s
+ ret void
+}
+
+define void @i225_ls(i225 %x) nounwind {
+ store i225 %x, i225* @i225_s
+ ret void
+}
+
+define void @i226_ls(i226 %x) nounwind {
+ store i226 %x, i226* @i226_s
+ ret void
+}
+
+define void @i227_ls(i227 %x) nounwind {
+ store i227 %x, i227* @i227_s
+ ret void
+}
+
+define void @i228_ls(i228 %x) nounwind {
+ store i228 %x, i228* @i228_s
+ ret void
+}
+
+define void @i229_ls(i229 %x) nounwind {
+ store i229 %x, i229* @i229_s
+ ret void
+}
+
+define void @i230_ls(i230 %x) nounwind {
+ store i230 %x, i230* @i230_s
+ ret void
+}
+
+define void @i231_ls(i231 %x) nounwind {
+ store i231 %x, i231* @i231_s
+ ret void
+}
+
+define void @i232_ls(i232 %x) nounwind {
+ store i232 %x, i232* @i232_s
+ ret void
+}
+
+define void @i233_ls(i233 %x) nounwind {
+ store i233 %x, i233* @i233_s
+ ret void
+}
+
+define void @i234_ls(i234 %x) nounwind {
+ store i234 %x, i234* @i234_s
+ ret void
+}
+
+define void @i235_ls(i235 %x) nounwind {
+ store i235 %x, i235* @i235_s
+ ret void
+}
+
+define void @i236_ls(i236 %x) nounwind {
+ store i236 %x, i236* @i236_s
+ ret void
+}
+
+define void @i237_ls(i237 %x) nounwind {
+ store i237 %x, i237* @i237_s
+ ret void
+}
+
+define void @i238_ls(i238 %x) nounwind {
+ store i238 %x, i238* @i238_s
+ ret void
+}
+
+define void @i239_ls(i239 %x) nounwind {
+ store i239 %x, i239* @i239_s
+ ret void
+}
+
+define void @i240_ls(i240 %x) nounwind {
+ store i240 %x, i240* @i240_s
+ ret void
+}
+
+define void @i241_ls(i241 %x) nounwind {
+ store i241 %x, i241* @i241_s
+ ret void
+}
+
+define void @i242_ls(i242 %x) nounwind {
+ store i242 %x, i242* @i242_s
+ ret void
+}
+
+define void @i243_ls(i243 %x) nounwind {
+ store i243 %x, i243* @i243_s
+ ret void
+}
+
+define void @i244_ls(i244 %x) nounwind {
+ store i244 %x, i244* @i244_s
+ ret void
+}
+
+define void @i245_ls(i245 %x) nounwind {
+ store i245 %x, i245* @i245_s
+ ret void
+}
+
+define void @i246_ls(i246 %x) nounwind {
+ store i246 %x, i246* @i246_s
+ ret void
+}
+
+define void @i247_ls(i247 %x) nounwind {
+ store i247 %x, i247* @i247_s
+ ret void
+}
+
+define void @i248_ls(i248 %x) nounwind {
+ store i248 %x, i248* @i248_s
+ ret void
+}
+
+define void @i249_ls(i249 %x) nounwind {
+ store i249 %x, i249* @i249_s
+ ret void
+}
+
+define void @i250_ls(i250 %x) nounwind {
+ store i250 %x, i250* @i250_s
+ ret void
+}
+
+define void @i251_ls(i251 %x) nounwind {
+ store i251 %x, i251* @i251_s
+ ret void
+}
+
+define void @i252_ls(i252 %x) nounwind {
+ store i252 %x, i252* @i252_s
+ ret void
+}
+
+define void @i253_ls(i253 %x) nounwind {
+ store i253 %x, i253* @i253_s
+ ret void
+}
+
+define void @i254_ls(i254 %x) nounwind {
+ store i254 %x, i254* @i254_s
+ ret void
+}
+
+define void @i255_ls(i255 %x) nounwind {
+ store i255 %x, i255* @i255_s
+ ret void
+}
+
+define void @i256_ls(i256 %x) nounwind {
+ store i256 %x, i256* @i256_s
+ ret void
+}
diff --git a/test/CodeGen/Generic/APIntSextParam.ll b/test/CodeGen/Generic/APIntSextParam.ll
new file mode 100644
index 0000000..acc0eeb
--- /dev/null
+++ b/test/CodeGen/Generic/APIntSextParam.ll
@@ -0,0 +1,1537 @@
+; RUN: llc < %s > %t
+@i1_s = external global i1 ; <i1*> [#uses=1]
+@i2_s = external global i2 ; <i2*> [#uses=1]
+@i3_s = external global i3 ; <i3*> [#uses=1]
+@i4_s = external global i4 ; <i4*> [#uses=1]
+@i5_s = external global i5 ; <i5*> [#uses=1]
+@i6_s = external global i6 ; <i6*> [#uses=1]
+@i7_s = external global i7 ; <i7*> [#uses=1]
+@i8_s = external global i8 ; <i8*> [#uses=1]
+@i9_s = external global i9 ; <i9*> [#uses=1]
+@i10_s = external global i10 ; <i10*> [#uses=1]
+@i11_s = external global i11 ; <i11*> [#uses=1]
+@i12_s = external global i12 ; <i12*> [#uses=1]
+@i13_s = external global i13 ; <i13*> [#uses=1]
+@i14_s = external global i14 ; <i14*> [#uses=1]
+@i15_s = external global i15 ; <i15*> [#uses=1]
+@i16_s = external global i16 ; <i16*> [#uses=1]
+@i17_s = external global i17 ; <i17*> [#uses=1]
+@i18_s = external global i18 ; <i18*> [#uses=1]
+@i19_s = external global i19 ; <i19*> [#uses=1]
+@i20_s = external global i20 ; <i20*> [#uses=1]
+@i21_s = external global i21 ; <i21*> [#uses=1]
+@i22_s = external global i22 ; <i22*> [#uses=1]
+@i23_s = external global i23 ; <i23*> [#uses=1]
+@i24_s = external global i24 ; <i24*> [#uses=1]
+@i25_s = external global i25 ; <i25*> [#uses=1]
+@i26_s = external global i26 ; <i26*> [#uses=1]
+@i27_s = external global i27 ; <i27*> [#uses=1]
+@i28_s = external global i28 ; <i28*> [#uses=1]
+@i29_s = external global i29 ; <i29*> [#uses=1]
+@i30_s = external global i30 ; <i30*> [#uses=1]
+@i31_s = external global i31 ; <i31*> [#uses=1]
+@i32_s = external global i32 ; <i32*> [#uses=1]
+@i33_s = external global i33 ; <i33*> [#uses=1]
+@i34_s = external global i34 ; <i34*> [#uses=1]
+@i35_s = external global i35 ; <i35*> [#uses=1]
+@i36_s = external global i36 ; <i36*> [#uses=1]
+@i37_s = external global i37 ; <i37*> [#uses=1]
+@i38_s = external global i38 ; <i38*> [#uses=1]
+@i39_s = external global i39 ; <i39*> [#uses=1]
+@i40_s = external global i40 ; <i40*> [#uses=1]
+@i41_s = external global i41 ; <i41*> [#uses=1]
+@i42_s = external global i42 ; <i42*> [#uses=1]
+@i43_s = external global i43 ; <i43*> [#uses=1]
+@i44_s = external global i44 ; <i44*> [#uses=1]
+@i45_s = external global i45 ; <i45*> [#uses=1]
+@i46_s = external global i46 ; <i46*> [#uses=1]
+@i47_s = external global i47 ; <i47*> [#uses=1]
+@i48_s = external global i48 ; <i48*> [#uses=1]
+@i49_s = external global i49 ; <i49*> [#uses=1]
+@i50_s = external global i50 ; <i50*> [#uses=1]
+@i51_s = external global i51 ; <i51*> [#uses=1]
+@i52_s = external global i52 ; <i52*> [#uses=1]
+@i53_s = external global i53 ; <i53*> [#uses=1]
+@i54_s = external global i54 ; <i54*> [#uses=1]
+@i55_s = external global i55 ; <i55*> [#uses=1]
+@i56_s = external global i56 ; <i56*> [#uses=1]
+@i57_s = external global i57 ; <i57*> [#uses=1]
+@i58_s = external global i58 ; <i58*> [#uses=1]
+@i59_s = external global i59 ; <i59*> [#uses=1]
+@i60_s = external global i60 ; <i60*> [#uses=1]
+@i61_s = external global i61 ; <i61*> [#uses=1]
+@i62_s = external global i62 ; <i62*> [#uses=1]
+@i63_s = external global i63 ; <i63*> [#uses=1]
+@i64_s = external global i64 ; <i64*> [#uses=1]
+@i65_s = external global i65 ; <i65*> [#uses=1]
+@i66_s = external global i66 ; <i66*> [#uses=1]
+@i67_s = external global i67 ; <i67*> [#uses=1]
+@i68_s = external global i68 ; <i68*> [#uses=1]
+@i69_s = external global i69 ; <i69*> [#uses=1]
+@i70_s = external global i70 ; <i70*> [#uses=1]
+@i71_s = external global i71 ; <i71*> [#uses=1]
+@i72_s = external global i72 ; <i72*> [#uses=1]
+@i73_s = external global i73 ; <i73*> [#uses=1]
+@i74_s = external global i74 ; <i74*> [#uses=1]
+@i75_s = external global i75 ; <i75*> [#uses=1]
+@i76_s = external global i76 ; <i76*> [#uses=1]
+@i77_s = external global i77 ; <i77*> [#uses=1]
+@i78_s = external global i78 ; <i78*> [#uses=1]
+@i79_s = external global i79 ; <i79*> [#uses=1]
+@i80_s = external global i80 ; <i80*> [#uses=1]
+@i81_s = external global i81 ; <i81*> [#uses=1]
+@i82_s = external global i82 ; <i82*> [#uses=1]
+@i83_s = external global i83 ; <i83*> [#uses=1]
+@i84_s = external global i84 ; <i84*> [#uses=1]
+@i85_s = external global i85 ; <i85*> [#uses=1]
+@i86_s = external global i86 ; <i86*> [#uses=1]
+@i87_s = external global i87 ; <i87*> [#uses=1]
+@i88_s = external global i88 ; <i88*> [#uses=1]
+@i89_s = external global i89 ; <i89*> [#uses=1]
+@i90_s = external global i90 ; <i90*> [#uses=1]
+@i91_s = external global i91 ; <i91*> [#uses=1]
+@i92_s = external global i92 ; <i92*> [#uses=1]
+@i93_s = external global i93 ; <i93*> [#uses=1]
+@i94_s = external global i94 ; <i94*> [#uses=1]
+@i95_s = external global i95 ; <i95*> [#uses=1]
+@i96_s = external global i96 ; <i96*> [#uses=1]
+@i97_s = external global i97 ; <i97*> [#uses=1]
+@i98_s = external global i98 ; <i98*> [#uses=1]
+@i99_s = external global i99 ; <i99*> [#uses=1]
+@i100_s = external global i100 ; <i100*> [#uses=1]
+@i101_s = external global i101 ; <i101*> [#uses=1]
+@i102_s = external global i102 ; <i102*> [#uses=1]
+@i103_s = external global i103 ; <i103*> [#uses=1]
+@i104_s = external global i104 ; <i104*> [#uses=1]
+@i105_s = external global i105 ; <i105*> [#uses=1]
+@i106_s = external global i106 ; <i106*> [#uses=1]
+@i107_s = external global i107 ; <i107*> [#uses=1]
+@i108_s = external global i108 ; <i108*> [#uses=1]
+@i109_s = external global i109 ; <i109*> [#uses=1]
+@i110_s = external global i110 ; <i110*> [#uses=1]
+@i111_s = external global i111 ; <i111*> [#uses=1]
+@i112_s = external global i112 ; <i112*> [#uses=1]
+@i113_s = external global i113 ; <i113*> [#uses=1]
+@i114_s = external global i114 ; <i114*> [#uses=1]
+@i115_s = external global i115 ; <i115*> [#uses=1]
+@i116_s = external global i116 ; <i116*> [#uses=1]
+@i117_s = external global i117 ; <i117*> [#uses=1]
+@i118_s = external global i118 ; <i118*> [#uses=1]
+@i119_s = external global i119 ; <i119*> [#uses=1]
+@i120_s = external global i120 ; <i120*> [#uses=1]
+@i121_s = external global i121 ; <i121*> [#uses=1]
+@i122_s = external global i122 ; <i122*> [#uses=1]
+@i123_s = external global i123 ; <i123*> [#uses=1]
+@i124_s = external global i124 ; <i124*> [#uses=1]
+@i125_s = external global i125 ; <i125*> [#uses=1]
+@i126_s = external global i126 ; <i126*> [#uses=1]
+@i127_s = external global i127 ; <i127*> [#uses=1]
+@i128_s = external global i128 ; <i128*> [#uses=1]
+@i129_s = external global i129 ; <i129*> [#uses=1]
+@i130_s = external global i130 ; <i130*> [#uses=1]
+@i131_s = external global i131 ; <i131*> [#uses=1]
+@i132_s = external global i132 ; <i132*> [#uses=1]
+@i133_s = external global i133 ; <i133*> [#uses=1]
+@i134_s = external global i134 ; <i134*> [#uses=1]
+@i135_s = external global i135 ; <i135*> [#uses=1]
+@i136_s = external global i136 ; <i136*> [#uses=1]
+@i137_s = external global i137 ; <i137*> [#uses=1]
+@i138_s = external global i138 ; <i138*> [#uses=1]
+@i139_s = external global i139 ; <i139*> [#uses=1]
+@i140_s = external global i140 ; <i140*> [#uses=1]
+@i141_s = external global i141 ; <i141*> [#uses=1]
+@i142_s = external global i142 ; <i142*> [#uses=1]
+@i143_s = external global i143 ; <i143*> [#uses=1]
+@i144_s = external global i144 ; <i144*> [#uses=1]
+@i145_s = external global i145 ; <i145*> [#uses=1]
+@i146_s = external global i146 ; <i146*> [#uses=1]
+@i147_s = external global i147 ; <i147*> [#uses=1]
+@i148_s = external global i148 ; <i148*> [#uses=1]
+@i149_s = external global i149 ; <i149*> [#uses=1]
+@i150_s = external global i150 ; <i150*> [#uses=1]
+@i151_s = external global i151 ; <i151*> [#uses=1]
+@i152_s = external global i152 ; <i152*> [#uses=1]
+@i153_s = external global i153 ; <i153*> [#uses=1]
+@i154_s = external global i154 ; <i154*> [#uses=1]
+@i155_s = external global i155 ; <i155*> [#uses=1]
+@i156_s = external global i156 ; <i156*> [#uses=1]
+@i157_s = external global i157 ; <i157*> [#uses=1]
+@i158_s = external global i158 ; <i158*> [#uses=1]
+@i159_s = external global i159 ; <i159*> [#uses=1]
+@i160_s = external global i160 ; <i160*> [#uses=1]
+@i161_s = external global i161 ; <i161*> [#uses=1]
+@i162_s = external global i162 ; <i162*> [#uses=1]
+@i163_s = external global i163 ; <i163*> [#uses=1]
+@i164_s = external global i164 ; <i164*> [#uses=1]
+@i165_s = external global i165 ; <i165*> [#uses=1]
+@i166_s = external global i166 ; <i166*> [#uses=1]
+@i167_s = external global i167 ; <i167*> [#uses=1]
+@i168_s = external global i168 ; <i168*> [#uses=1]
+@i169_s = external global i169 ; <i169*> [#uses=1]
+@i170_s = external global i170 ; <i170*> [#uses=1]
+@i171_s = external global i171 ; <i171*> [#uses=1]
+@i172_s = external global i172 ; <i172*> [#uses=1]
+@i173_s = external global i173 ; <i173*> [#uses=1]
+@i174_s = external global i174 ; <i174*> [#uses=1]
+@i175_s = external global i175 ; <i175*> [#uses=1]
+@i176_s = external global i176 ; <i176*> [#uses=1]
+@i177_s = external global i177 ; <i177*> [#uses=1]
+@i178_s = external global i178 ; <i178*> [#uses=1]
+@i179_s = external global i179 ; <i179*> [#uses=1]
+@i180_s = external global i180 ; <i180*> [#uses=1]
+@i181_s = external global i181 ; <i181*> [#uses=1]
+@i182_s = external global i182 ; <i182*> [#uses=1]
+@i183_s = external global i183 ; <i183*> [#uses=1]
+@i184_s = external global i184 ; <i184*> [#uses=1]
+@i185_s = external global i185 ; <i185*> [#uses=1]
+@i186_s = external global i186 ; <i186*> [#uses=1]
+@i187_s = external global i187 ; <i187*> [#uses=1]
+@i188_s = external global i188 ; <i188*> [#uses=1]
+@i189_s = external global i189 ; <i189*> [#uses=1]
+@i190_s = external global i190 ; <i190*> [#uses=1]
+@i191_s = external global i191 ; <i191*> [#uses=1]
+@i192_s = external global i192 ; <i192*> [#uses=1]
+@i193_s = external global i193 ; <i193*> [#uses=1]
+@i194_s = external global i194 ; <i194*> [#uses=1]
+@i195_s = external global i195 ; <i195*> [#uses=1]
+@i196_s = external global i196 ; <i196*> [#uses=1]
+@i197_s = external global i197 ; <i197*> [#uses=1]
+@i198_s = external global i198 ; <i198*> [#uses=1]
+@i199_s = external global i199 ; <i199*> [#uses=1]
+@i200_s = external global i200 ; <i200*> [#uses=1]
+@i201_s = external global i201 ; <i201*> [#uses=1]
+@i202_s = external global i202 ; <i202*> [#uses=1]
+@i203_s = external global i203 ; <i203*> [#uses=1]
+@i204_s = external global i204 ; <i204*> [#uses=1]
+@i205_s = external global i205 ; <i205*> [#uses=1]
+@i206_s = external global i206 ; <i206*> [#uses=1]
+@i207_s = external global i207 ; <i207*> [#uses=1]
+@i208_s = external global i208 ; <i208*> [#uses=1]
+@i209_s = external global i209 ; <i209*> [#uses=1]
+@i210_s = external global i210 ; <i210*> [#uses=1]
+@i211_s = external global i211 ; <i211*> [#uses=1]
+@i212_s = external global i212 ; <i212*> [#uses=1]
+@i213_s = external global i213 ; <i213*> [#uses=1]
+@i214_s = external global i214 ; <i214*> [#uses=1]
+@i215_s = external global i215 ; <i215*> [#uses=1]
+@i216_s = external global i216 ; <i216*> [#uses=1]
+@i217_s = external global i217 ; <i217*> [#uses=1]
+@i218_s = external global i218 ; <i218*> [#uses=1]
+@i219_s = external global i219 ; <i219*> [#uses=1]
+@i220_s = external global i220 ; <i220*> [#uses=1]
+@i221_s = external global i221 ; <i221*> [#uses=1]
+@i222_s = external global i222 ; <i222*> [#uses=1]
+@i223_s = external global i223 ; <i223*> [#uses=1]
+@i224_s = external global i224 ; <i224*> [#uses=1]
+@i225_s = external global i225 ; <i225*> [#uses=1]
+@i226_s = external global i226 ; <i226*> [#uses=1]
+@i227_s = external global i227 ; <i227*> [#uses=1]
+@i228_s = external global i228 ; <i228*> [#uses=1]
+@i229_s = external global i229 ; <i229*> [#uses=1]
+@i230_s = external global i230 ; <i230*> [#uses=1]
+@i231_s = external global i231 ; <i231*> [#uses=1]
+@i232_s = external global i232 ; <i232*> [#uses=1]
+@i233_s = external global i233 ; <i233*> [#uses=1]
+@i234_s = external global i234 ; <i234*> [#uses=1]
+@i235_s = external global i235 ; <i235*> [#uses=1]
+@i236_s = external global i236 ; <i236*> [#uses=1]
+@i237_s = external global i237 ; <i237*> [#uses=1]
+@i238_s = external global i238 ; <i238*> [#uses=1]
+@i239_s = external global i239 ; <i239*> [#uses=1]
+@i240_s = external global i240 ; <i240*> [#uses=1]
+@i241_s = external global i241 ; <i241*> [#uses=1]
+@i242_s = external global i242 ; <i242*> [#uses=1]
+@i243_s = external global i243 ; <i243*> [#uses=1]
+@i244_s = external global i244 ; <i244*> [#uses=1]
+@i245_s = external global i245 ; <i245*> [#uses=1]
+@i246_s = external global i246 ; <i246*> [#uses=1]
+@i247_s = external global i247 ; <i247*> [#uses=1]
+@i248_s = external global i248 ; <i248*> [#uses=1]
+@i249_s = external global i249 ; <i249*> [#uses=1]
+@i250_s = external global i250 ; <i250*> [#uses=1]
+@i251_s = external global i251 ; <i251*> [#uses=1]
+@i252_s = external global i252 ; <i252*> [#uses=1]
+@i253_s = external global i253 ; <i253*> [#uses=1]
+@i254_s = external global i254 ; <i254*> [#uses=1]
+@i255_s = external global i255 ; <i255*> [#uses=1]
+@i256_s = external global i256 ; <i256*> [#uses=1]
+
+define void @i1_ls(i1 signext %x) nounwind {
+ store i1 %x, i1* @i1_s
+ ret void
+}
+
+define void @i2_ls(i2 signext %x) nounwind {
+ store i2 %x, i2* @i2_s
+ ret void
+}
+
+define void @i3_ls(i3 signext %x) nounwind {
+ store i3 %x, i3* @i3_s
+ ret void
+}
+
+define void @i4_ls(i4 signext %x) nounwind {
+ store i4 %x, i4* @i4_s
+ ret void
+}
+
+define void @i5_ls(i5 signext %x) nounwind {
+ store i5 %x, i5* @i5_s
+ ret void
+}
+
+define void @i6_ls(i6 signext %x) nounwind {
+ store i6 %x, i6* @i6_s
+ ret void
+}
+
+define void @i7_ls(i7 signext %x) nounwind {
+ store i7 %x, i7* @i7_s
+ ret void
+}
+
+define void @i8_ls(i8 signext %x) nounwind {
+ store i8 %x, i8* @i8_s
+ ret void
+}
+
+define void @i9_ls(i9 signext %x) nounwind {
+ store i9 %x, i9* @i9_s
+ ret void
+}
+
+define void @i10_ls(i10 signext %x) nounwind {
+ store i10 %x, i10* @i10_s
+ ret void
+}
+
+define void @i11_ls(i11 signext %x) nounwind {
+ store i11 %x, i11* @i11_s
+ ret void
+}
+
+define void @i12_ls(i12 signext %x) nounwind {
+ store i12 %x, i12* @i12_s
+ ret void
+}
+
+define void @i13_ls(i13 signext %x) nounwind {
+ store i13 %x, i13* @i13_s
+ ret void
+}
+
+define void @i14_ls(i14 signext %x) nounwind {
+ store i14 %x, i14* @i14_s
+ ret void
+}
+
+define void @i15_ls(i15 signext %x) nounwind {
+ store i15 %x, i15* @i15_s
+ ret void
+}
+
+define void @i16_ls(i16 signext %x) nounwind {
+ store i16 %x, i16* @i16_s
+ ret void
+}
+
+define void @i17_ls(i17 signext %x) nounwind {
+ store i17 %x, i17* @i17_s
+ ret void
+}
+
+define void @i18_ls(i18 signext %x) nounwind {
+ store i18 %x, i18* @i18_s
+ ret void
+}
+
+define void @i19_ls(i19 signext %x) nounwind {
+ store i19 %x, i19* @i19_s
+ ret void
+}
+
+define void @i20_ls(i20 signext %x) nounwind {
+ store i20 %x, i20* @i20_s
+ ret void
+}
+
+define void @i21_ls(i21 signext %x) nounwind {
+ store i21 %x, i21* @i21_s
+ ret void
+}
+
+define void @i22_ls(i22 signext %x) nounwind {
+ store i22 %x, i22* @i22_s
+ ret void
+}
+
+define void @i23_ls(i23 signext %x) nounwind {
+ store i23 %x, i23* @i23_s
+ ret void
+}
+
+define void @i24_ls(i24 signext %x) nounwind {
+ store i24 %x, i24* @i24_s
+ ret void
+}
+
+define void @i25_ls(i25 signext %x) nounwind {
+ store i25 %x, i25* @i25_s
+ ret void
+}
+
+define void @i26_ls(i26 signext %x) nounwind {
+ store i26 %x, i26* @i26_s
+ ret void
+}
+
+define void @i27_ls(i27 signext %x) nounwind {
+ store i27 %x, i27* @i27_s
+ ret void
+}
+
+define void @i28_ls(i28 signext %x) nounwind {
+ store i28 %x, i28* @i28_s
+ ret void
+}
+
+define void @i29_ls(i29 signext %x) nounwind {
+ store i29 %x, i29* @i29_s
+ ret void
+}
+
+define void @i30_ls(i30 signext %x) nounwind {
+ store i30 %x, i30* @i30_s
+ ret void
+}
+
+define void @i31_ls(i31 signext %x) nounwind {
+ store i31 %x, i31* @i31_s
+ ret void
+}
+
+define void @i32_ls(i32 signext %x) nounwind {
+ store i32 %x, i32* @i32_s
+ ret void
+}
+
+define void @i33_ls(i33 signext %x) nounwind {
+ store i33 %x, i33* @i33_s
+ ret void
+}
+
+define void @i34_ls(i34 signext %x) nounwind {
+ store i34 %x, i34* @i34_s
+ ret void
+}
+
+define void @i35_ls(i35 signext %x) nounwind {
+ store i35 %x, i35* @i35_s
+ ret void
+}
+
+define void @i36_ls(i36 signext %x) nounwind {
+ store i36 %x, i36* @i36_s
+ ret void
+}
+
+define void @i37_ls(i37 signext %x) nounwind {
+ store i37 %x, i37* @i37_s
+ ret void
+}
+
+define void @i38_ls(i38 signext %x) nounwind {
+ store i38 %x, i38* @i38_s
+ ret void
+}
+
+define void @i39_ls(i39 signext %x) nounwind {
+ store i39 %x, i39* @i39_s
+ ret void
+}
+
+define void @i40_ls(i40 signext %x) nounwind {
+ store i40 %x, i40* @i40_s
+ ret void
+}
+
+define void @i41_ls(i41 signext %x) nounwind {
+ store i41 %x, i41* @i41_s
+ ret void
+}
+
+define void @i42_ls(i42 signext %x) nounwind {
+ store i42 %x, i42* @i42_s
+ ret void
+}
+
+define void @i43_ls(i43 signext %x) nounwind {
+ store i43 %x, i43* @i43_s
+ ret void
+}
+
+define void @i44_ls(i44 signext %x) nounwind {
+ store i44 %x, i44* @i44_s
+ ret void
+}
+
+define void @i45_ls(i45 signext %x) nounwind {
+ store i45 %x, i45* @i45_s
+ ret void
+}
+
+define void @i46_ls(i46 signext %x) nounwind {
+ store i46 %x, i46* @i46_s
+ ret void
+}
+
+define void @i47_ls(i47 signext %x) nounwind {
+ store i47 %x, i47* @i47_s
+ ret void
+}
+
+define void @i48_ls(i48 signext %x) nounwind {
+ store i48 %x, i48* @i48_s
+ ret void
+}
+
+define void @i49_ls(i49 signext %x) nounwind {
+ store i49 %x, i49* @i49_s
+ ret void
+}
+
+define void @i50_ls(i50 signext %x) nounwind {
+ store i50 %x, i50* @i50_s
+ ret void
+}
+
+define void @i51_ls(i51 signext %x) nounwind {
+ store i51 %x, i51* @i51_s
+ ret void
+}
+
+define void @i52_ls(i52 signext %x) nounwind {
+ store i52 %x, i52* @i52_s
+ ret void
+}
+
+define void @i53_ls(i53 signext %x) nounwind {
+ store i53 %x, i53* @i53_s
+ ret void
+}
+
+define void @i54_ls(i54 signext %x) nounwind {
+ store i54 %x, i54* @i54_s
+ ret void
+}
+
+define void @i55_ls(i55 signext %x) nounwind {
+ store i55 %x, i55* @i55_s
+ ret void
+}
+
+define void @i56_ls(i56 signext %x) nounwind {
+ store i56 %x, i56* @i56_s
+ ret void
+}
+
+define void @i57_ls(i57 signext %x) nounwind {
+ store i57 %x, i57* @i57_s
+ ret void
+}
+
+define void @i58_ls(i58 signext %x) nounwind {
+ store i58 %x, i58* @i58_s
+ ret void
+}
+
+define void @i59_ls(i59 signext %x) nounwind {
+ store i59 %x, i59* @i59_s
+ ret void
+}
+
+define void @i60_ls(i60 signext %x) nounwind {
+ store i60 %x, i60* @i60_s
+ ret void
+}
+
+define void @i61_ls(i61 signext %x) nounwind {
+ store i61 %x, i61* @i61_s
+ ret void
+}
+
+define void @i62_ls(i62 signext %x) nounwind {
+ store i62 %x, i62* @i62_s
+ ret void
+}
+
+define void @i63_ls(i63 signext %x) nounwind {
+ store i63 %x, i63* @i63_s
+ ret void
+}
+
+define void @i64_ls(i64 signext %x) nounwind {
+ store i64 %x, i64* @i64_s
+ ret void
+}
+
+define void @i65_ls(i65 signext %x) nounwind {
+ store i65 %x, i65* @i65_s
+ ret void
+}
+
+define void @i66_ls(i66 signext %x) nounwind {
+ store i66 %x, i66* @i66_s
+ ret void
+}
+
+define void @i67_ls(i67 signext %x) nounwind {
+ store i67 %x, i67* @i67_s
+ ret void
+}
+
+define void @i68_ls(i68 signext %x) nounwind {
+ store i68 %x, i68* @i68_s
+ ret void
+}
+
+define void @i69_ls(i69 signext %x) nounwind {
+ store i69 %x, i69* @i69_s
+ ret void
+}
+
+define void @i70_ls(i70 signext %x) nounwind {
+ store i70 %x, i70* @i70_s
+ ret void
+}
+
+define void @i71_ls(i71 signext %x) nounwind {
+ store i71 %x, i71* @i71_s
+ ret void
+}
+
+define void @i72_ls(i72 signext %x) nounwind {
+ store i72 %x, i72* @i72_s
+ ret void
+}
+
+define void @i73_ls(i73 signext %x) nounwind {
+ store i73 %x, i73* @i73_s
+ ret void
+}
+
+define void @i74_ls(i74 signext %x) nounwind {
+ store i74 %x, i74* @i74_s
+ ret void
+}
+
+define void @i75_ls(i75 signext %x) nounwind {
+ store i75 %x, i75* @i75_s
+ ret void
+}
+
+define void @i76_ls(i76 signext %x) nounwind {
+ store i76 %x, i76* @i76_s
+ ret void
+}
+
+define void @i77_ls(i77 signext %x) nounwind {
+ store i77 %x, i77* @i77_s
+ ret void
+}
+
+define void @i78_ls(i78 signext %x) nounwind {
+ store i78 %x, i78* @i78_s
+ ret void
+}
+
+define void @i79_ls(i79 signext %x) nounwind {
+ store i79 %x, i79* @i79_s
+ ret void
+}
+
+define void @i80_ls(i80 signext %x) nounwind {
+ store i80 %x, i80* @i80_s
+ ret void
+}
+
+define void @i81_ls(i81 signext %x) nounwind {
+ store i81 %x, i81* @i81_s
+ ret void
+}
+
+define void @i82_ls(i82 signext %x) nounwind {
+ store i82 %x, i82* @i82_s
+ ret void
+}
+
+define void @i83_ls(i83 signext %x) nounwind {
+ store i83 %x, i83* @i83_s
+ ret void
+}
+
+define void @i84_ls(i84 signext %x) nounwind {
+ store i84 %x, i84* @i84_s
+ ret void
+}
+
+define void @i85_ls(i85 signext %x) nounwind {
+ store i85 %x, i85* @i85_s
+ ret void
+}
+
+define void @i86_ls(i86 signext %x) nounwind {
+ store i86 %x, i86* @i86_s
+ ret void
+}
+
+define void @i87_ls(i87 signext %x) nounwind {
+ store i87 %x, i87* @i87_s
+ ret void
+}
+
+define void @i88_ls(i88 signext %x) nounwind {
+ store i88 %x, i88* @i88_s
+ ret void
+}
+
+define void @i89_ls(i89 signext %x) nounwind {
+ store i89 %x, i89* @i89_s
+ ret void
+}
+
+define void @i90_ls(i90 signext %x) nounwind {
+ store i90 %x, i90* @i90_s
+ ret void
+}
+
+define void @i91_ls(i91 signext %x) nounwind {
+ store i91 %x, i91* @i91_s
+ ret void
+}
+
+define void @i92_ls(i92 signext %x) nounwind {
+ store i92 %x, i92* @i92_s
+ ret void
+}
+
+define void @i93_ls(i93 signext %x) nounwind {
+ store i93 %x, i93* @i93_s
+ ret void
+}
+
+define void @i94_ls(i94 signext %x) nounwind {
+ store i94 %x, i94* @i94_s
+ ret void
+}
+
+define void @i95_ls(i95 signext %x) nounwind {
+ store i95 %x, i95* @i95_s
+ ret void
+}
+
+define void @i96_ls(i96 signext %x) nounwind {
+ store i96 %x, i96* @i96_s
+ ret void
+}
+
+define void @i97_ls(i97 signext %x) nounwind {
+ store i97 %x, i97* @i97_s
+ ret void
+}
+
+define void @i98_ls(i98 signext %x) nounwind {
+ store i98 %x, i98* @i98_s
+ ret void
+}
+
+define void @i99_ls(i99 signext %x) nounwind {
+ store i99 %x, i99* @i99_s
+ ret void
+}
+
+define void @i100_ls(i100 signext %x) nounwind {
+ store i100 %x, i100* @i100_s
+ ret void
+}
+
+define void @i101_ls(i101 signext %x) nounwind {
+ store i101 %x, i101* @i101_s
+ ret void
+}
+
+define void @i102_ls(i102 signext %x) nounwind {
+ store i102 %x, i102* @i102_s
+ ret void
+}
+
+define void @i103_ls(i103 signext %x) nounwind {
+ store i103 %x, i103* @i103_s
+ ret void
+}
+
+define void @i104_ls(i104 signext %x) nounwind {
+ store i104 %x, i104* @i104_s
+ ret void
+}
+
+define void @i105_ls(i105 signext %x) nounwind {
+ store i105 %x, i105* @i105_s
+ ret void
+}
+
+define void @i106_ls(i106 signext %x) nounwind {
+ store i106 %x, i106* @i106_s
+ ret void
+}
+
+define void @i107_ls(i107 signext %x) nounwind {
+ store i107 %x, i107* @i107_s
+ ret void
+}
+
+define void @i108_ls(i108 signext %x) nounwind {
+ store i108 %x, i108* @i108_s
+ ret void
+}
+
+define void @i109_ls(i109 signext %x) nounwind {
+ store i109 %x, i109* @i109_s
+ ret void
+}
+
+define void @i110_ls(i110 signext %x) nounwind {
+ store i110 %x, i110* @i110_s
+ ret void
+}
+
+define void @i111_ls(i111 signext %x) nounwind {
+ store i111 %x, i111* @i111_s
+ ret void
+}
+
+define void @i112_ls(i112 signext %x) nounwind {
+ store i112 %x, i112* @i112_s
+ ret void
+}
+
+define void @i113_ls(i113 signext %x) nounwind {
+ store i113 %x, i113* @i113_s
+ ret void
+}
+
+define void @i114_ls(i114 signext %x) nounwind {
+ store i114 %x, i114* @i114_s
+ ret void
+}
+
+define void @i115_ls(i115 signext %x) nounwind {
+ store i115 %x, i115* @i115_s
+ ret void
+}
+
+define void @i116_ls(i116 signext %x) nounwind {
+ store i116 %x, i116* @i116_s
+ ret void
+}
+
+define void @i117_ls(i117 signext %x) nounwind {
+ store i117 %x, i117* @i117_s
+ ret void
+}
+
+define void @i118_ls(i118 signext %x) nounwind {
+ store i118 %x, i118* @i118_s
+ ret void
+}
+
+define void @i119_ls(i119 signext %x) nounwind {
+ store i119 %x, i119* @i119_s
+ ret void
+}
+
+define void @i120_ls(i120 signext %x) nounwind {
+ store i120 %x, i120* @i120_s
+ ret void
+}
+
+define void @i121_ls(i121 signext %x) nounwind {
+ store i121 %x, i121* @i121_s
+ ret void
+}
+
+define void @i122_ls(i122 signext %x) nounwind {
+ store i122 %x, i122* @i122_s
+ ret void
+}
+
+define void @i123_ls(i123 signext %x) nounwind {
+ store i123 %x, i123* @i123_s
+ ret void
+}
+
+define void @i124_ls(i124 signext %x) nounwind {
+ store i124 %x, i124* @i124_s
+ ret void
+}
+
+define void @i125_ls(i125 signext %x) nounwind {
+ store i125 %x, i125* @i125_s
+ ret void
+}
+
+define void @i126_ls(i126 signext %x) nounwind {
+ store i126 %x, i126* @i126_s
+ ret void
+}
+
+define void @i127_ls(i127 signext %x) nounwind {
+ store i127 %x, i127* @i127_s
+ ret void
+}
+
+define void @i128_ls(i128 signext %x) nounwind {
+ store i128 %x, i128* @i128_s
+ ret void
+}
+
+define void @i129_ls(i129 signext %x) nounwind {
+ store i129 %x, i129* @i129_s
+ ret void
+}
+
+define void @i130_ls(i130 signext %x) nounwind {
+ store i130 %x, i130* @i130_s
+ ret void
+}
+
+define void @i131_ls(i131 signext %x) nounwind {
+ store i131 %x, i131* @i131_s
+ ret void
+}
+
+define void @i132_ls(i132 signext %x) nounwind {
+ store i132 %x, i132* @i132_s
+ ret void
+}
+
+define void @i133_ls(i133 signext %x) nounwind {
+ store i133 %x, i133* @i133_s
+ ret void
+}
+
+define void @i134_ls(i134 signext %x) nounwind {
+ store i134 %x, i134* @i134_s
+ ret void
+}
+
+define void @i135_ls(i135 signext %x) nounwind {
+ store i135 %x, i135* @i135_s
+ ret void
+}
+
+define void @i136_ls(i136 signext %x) nounwind {
+ store i136 %x, i136* @i136_s
+ ret void
+}
+
+define void @i137_ls(i137 signext %x) nounwind {
+ store i137 %x, i137* @i137_s
+ ret void
+}
+
+define void @i138_ls(i138 signext %x) nounwind {
+ store i138 %x, i138* @i138_s
+ ret void
+}
+
+define void @i139_ls(i139 signext %x) nounwind {
+ store i139 %x, i139* @i139_s
+ ret void
+}
+
+define void @i140_ls(i140 signext %x) nounwind {
+ store i140 %x, i140* @i140_s
+ ret void
+}
+
+define void @i141_ls(i141 signext %x) nounwind {
+ store i141 %x, i141* @i141_s
+ ret void
+}
+
+define void @i142_ls(i142 signext %x) nounwind {
+ store i142 %x, i142* @i142_s
+ ret void
+}
+
+define void @i143_ls(i143 signext %x) nounwind {
+ store i143 %x, i143* @i143_s
+ ret void
+}
+
+define void @i144_ls(i144 signext %x) nounwind {
+ store i144 %x, i144* @i144_s
+ ret void
+}
+
+define void @i145_ls(i145 signext %x) nounwind {
+ store i145 %x, i145* @i145_s
+ ret void
+}
+
+define void @i146_ls(i146 signext %x) nounwind {
+ store i146 %x, i146* @i146_s
+ ret void
+}
+
+define void @i147_ls(i147 signext %x) nounwind {
+ store i147 %x, i147* @i147_s
+ ret void
+}
+
+define void @i148_ls(i148 signext %x) nounwind {
+ store i148 %x, i148* @i148_s
+ ret void
+}
+
+define void @i149_ls(i149 signext %x) nounwind {
+ store i149 %x, i149* @i149_s
+ ret void
+}
+
+define void @i150_ls(i150 signext %x) nounwind {
+ store i150 %x, i150* @i150_s
+ ret void
+}
+
+define void @i151_ls(i151 signext %x) nounwind {
+ store i151 %x, i151* @i151_s
+ ret void
+}
+
+define void @i152_ls(i152 signext %x) nounwind {
+ store i152 %x, i152* @i152_s
+ ret void
+}
+
+define void @i153_ls(i153 signext %x) nounwind {
+ store i153 %x, i153* @i153_s
+ ret void
+}
+
+define void @i154_ls(i154 signext %x) nounwind {
+ store i154 %x, i154* @i154_s
+ ret void
+}
+
+define void @i155_ls(i155 signext %x) nounwind {
+ store i155 %x, i155* @i155_s
+ ret void
+}
+
+define void @i156_ls(i156 signext %x) nounwind {
+ store i156 %x, i156* @i156_s
+ ret void
+}
+
+define void @i157_ls(i157 signext %x) nounwind {
+ store i157 %x, i157* @i157_s
+ ret void
+}
+
+define void @i158_ls(i158 signext %x) nounwind {
+ store i158 %x, i158* @i158_s
+ ret void
+}
+
+define void @i159_ls(i159 signext %x) nounwind {
+ store i159 %x, i159* @i159_s
+ ret void
+}
+
+define void @i160_ls(i160 signext %x) nounwind {
+ store i160 %x, i160* @i160_s
+ ret void
+}
+
+define void @i161_ls(i161 signext %x) nounwind {
+ store i161 %x, i161* @i161_s
+ ret void
+}
+
+define void @i162_ls(i162 signext %x) nounwind {
+ store i162 %x, i162* @i162_s
+ ret void
+}
+
+define void @i163_ls(i163 signext %x) nounwind {
+ store i163 %x, i163* @i163_s
+ ret void
+}
+
+define void @i164_ls(i164 signext %x) nounwind {
+ store i164 %x, i164* @i164_s
+ ret void
+}
+
+define void @i165_ls(i165 signext %x) nounwind {
+ store i165 %x, i165* @i165_s
+ ret void
+}
+
+define void @i166_ls(i166 signext %x) nounwind {
+ store i166 %x, i166* @i166_s
+ ret void
+}
+
+define void @i167_ls(i167 signext %x) nounwind {
+ store i167 %x, i167* @i167_s
+ ret void
+}
+
+define void @i168_ls(i168 signext %x) nounwind {
+ store i168 %x, i168* @i168_s
+ ret void
+}
+
+define void @i169_ls(i169 signext %x) nounwind {
+ store i169 %x, i169* @i169_s
+ ret void
+}
+
+define void @i170_ls(i170 signext %x) nounwind {
+ store i170 %x, i170* @i170_s
+ ret void
+}
+
+define void @i171_ls(i171 signext %x) nounwind {
+ store i171 %x, i171* @i171_s
+ ret void
+}
+
+define void @i172_ls(i172 signext %x) nounwind {
+ store i172 %x, i172* @i172_s
+ ret void
+}
+
+define void @i173_ls(i173 signext %x) nounwind {
+ store i173 %x, i173* @i173_s
+ ret void
+}
+
+define void @i174_ls(i174 signext %x) nounwind {
+ store i174 %x, i174* @i174_s
+ ret void
+}
+
+define void @i175_ls(i175 signext %x) nounwind {
+ store i175 %x, i175* @i175_s
+ ret void
+}
+
+define void @i176_ls(i176 signext %x) nounwind {
+ store i176 %x, i176* @i176_s
+ ret void
+}
+
+define void @i177_ls(i177 signext %x) nounwind {
+ store i177 %x, i177* @i177_s
+ ret void
+}
+
+define void @i178_ls(i178 signext %x) nounwind {
+ store i178 %x, i178* @i178_s
+ ret void
+}
+
+define void @i179_ls(i179 signext %x) nounwind {
+ store i179 %x, i179* @i179_s
+ ret void
+}
+
+define void @i180_ls(i180 signext %x) nounwind {
+ store i180 %x, i180* @i180_s
+ ret void
+}
+
+define void @i181_ls(i181 signext %x) nounwind {
+ store i181 %x, i181* @i181_s
+ ret void
+}
+
+define void @i182_ls(i182 signext %x) nounwind {
+ store i182 %x, i182* @i182_s
+ ret void
+}
+
+define void @i183_ls(i183 signext %x) nounwind {
+ store i183 %x, i183* @i183_s
+ ret void
+}
+
+define void @i184_ls(i184 signext %x) nounwind {
+ store i184 %x, i184* @i184_s
+ ret void
+}
+
+define void @i185_ls(i185 signext %x) nounwind {
+ store i185 %x, i185* @i185_s
+ ret void
+}
+
+define void @i186_ls(i186 signext %x) nounwind {
+ store i186 %x, i186* @i186_s
+ ret void
+}
+
+define void @i187_ls(i187 signext %x) nounwind {
+ store i187 %x, i187* @i187_s
+ ret void
+}
+
+define void @i188_ls(i188 signext %x) nounwind {
+ store i188 %x, i188* @i188_s
+ ret void
+}
+
+define void @i189_ls(i189 signext %x) nounwind {
+ store i189 %x, i189* @i189_s
+ ret void
+}
+
+define void @i190_ls(i190 signext %x) nounwind {
+ store i190 %x, i190* @i190_s
+ ret void
+}
+
+define void @i191_ls(i191 signext %x) nounwind {
+ store i191 %x, i191* @i191_s
+ ret void
+}
+
+define void @i192_ls(i192 signext %x) nounwind {
+ store i192 %x, i192* @i192_s
+ ret void
+}
+
+define void @i193_ls(i193 signext %x) nounwind {
+ store i193 %x, i193* @i193_s
+ ret void
+}
+
+define void @i194_ls(i194 signext %x) nounwind {
+ store i194 %x, i194* @i194_s
+ ret void
+}
+
+define void @i195_ls(i195 signext %x) nounwind {
+ store i195 %x, i195* @i195_s
+ ret void
+}
+
+define void @i196_ls(i196 signext %x) nounwind {
+ store i196 %x, i196* @i196_s
+ ret void
+}
+
+define void @i197_ls(i197 signext %x) nounwind {
+ store i197 %x, i197* @i197_s
+ ret void
+}
+
+define void @i198_ls(i198 signext %x) nounwind {
+ store i198 %x, i198* @i198_s
+ ret void
+}
+
+define void @i199_ls(i199 signext %x) nounwind {
+ store i199 %x, i199* @i199_s
+ ret void
+}
+
+define void @i200_ls(i200 signext %x) nounwind {
+ store i200 %x, i200* @i200_s
+ ret void
+}
+
+define void @i201_ls(i201 signext %x) nounwind {
+ store i201 %x, i201* @i201_s
+ ret void
+}
+
+define void @i202_ls(i202 signext %x) nounwind {
+ store i202 %x, i202* @i202_s
+ ret void
+}
+
+define void @i203_ls(i203 signext %x) nounwind {
+ store i203 %x, i203* @i203_s
+ ret void
+}
+
+define void @i204_ls(i204 signext %x) nounwind {
+ store i204 %x, i204* @i204_s
+ ret void
+}
+
+define void @i205_ls(i205 signext %x) nounwind {
+ store i205 %x, i205* @i205_s
+ ret void
+}
+
+define void @i206_ls(i206 signext %x) nounwind {
+ store i206 %x, i206* @i206_s
+ ret void
+}
+
+define void @i207_ls(i207 signext %x) nounwind {
+ store i207 %x, i207* @i207_s
+ ret void
+}
+
+define void @i208_ls(i208 signext %x) nounwind {
+ store i208 %x, i208* @i208_s
+ ret void
+}
+
+define void @i209_ls(i209 signext %x) nounwind {
+ store i209 %x, i209* @i209_s
+ ret void
+}
+
+define void @i210_ls(i210 signext %x) nounwind {
+ store i210 %x, i210* @i210_s
+ ret void
+}
+
+define void @i211_ls(i211 signext %x) nounwind {
+ store i211 %x, i211* @i211_s
+ ret void
+}
+
+define void @i212_ls(i212 signext %x) nounwind {
+ store i212 %x, i212* @i212_s
+ ret void
+}
+
+define void @i213_ls(i213 signext %x) nounwind {
+ store i213 %x, i213* @i213_s
+ ret void
+}
+
+define void @i214_ls(i214 signext %x) nounwind {
+ store i214 %x, i214* @i214_s
+ ret void
+}
+
+define void @i215_ls(i215 signext %x) nounwind {
+ store i215 %x, i215* @i215_s
+ ret void
+}
+
+define void @i216_ls(i216 signext %x) nounwind {
+ store i216 %x, i216* @i216_s
+ ret void
+}
+
+define void @i217_ls(i217 signext %x) nounwind {
+ store i217 %x, i217* @i217_s
+ ret void
+}
+
+define void @i218_ls(i218 signext %x) nounwind {
+ store i218 %x, i218* @i218_s
+ ret void
+}
+
+define void @i219_ls(i219 signext %x) nounwind {
+ store i219 %x, i219* @i219_s
+ ret void
+}
+
+define void @i220_ls(i220 signext %x) nounwind {
+ store i220 %x, i220* @i220_s
+ ret void
+}
+
+define void @i221_ls(i221 signext %x) nounwind {
+ store i221 %x, i221* @i221_s
+ ret void
+}
+
+define void @i222_ls(i222 signext %x) nounwind {
+ store i222 %x, i222* @i222_s
+ ret void
+}
+
+define void @i223_ls(i223 signext %x) nounwind {
+ store i223 %x, i223* @i223_s
+ ret void
+}
+
+define void @i224_ls(i224 signext %x) nounwind {
+ store i224 %x, i224* @i224_s
+ ret void
+}
+
+define void @i225_ls(i225 signext %x) nounwind {
+ store i225 %x, i225* @i225_s
+ ret void
+}
+
+define void @i226_ls(i226 signext %x) nounwind {
+ store i226 %x, i226* @i226_s
+ ret void
+}
+
+define void @i227_ls(i227 signext %x) nounwind {
+ store i227 %x, i227* @i227_s
+ ret void
+}
+
+define void @i228_ls(i228 signext %x) nounwind {
+ store i228 %x, i228* @i228_s
+ ret void
+}
+
+define void @i229_ls(i229 signext %x) nounwind {
+ store i229 %x, i229* @i229_s
+ ret void
+}
+
+define void @i230_ls(i230 signext %x) nounwind {
+ store i230 %x, i230* @i230_s
+ ret void
+}
+
+define void @i231_ls(i231 signext %x) nounwind {
+ store i231 %x, i231* @i231_s
+ ret void
+}
+
+define void @i232_ls(i232 signext %x) nounwind {
+ store i232 %x, i232* @i232_s
+ ret void
+}
+
+define void @i233_ls(i233 signext %x) nounwind {
+ store i233 %x, i233* @i233_s
+ ret void
+}
+
+define void @i234_ls(i234 signext %x) nounwind {
+ store i234 %x, i234* @i234_s
+ ret void
+}
+
+define void @i235_ls(i235 signext %x) nounwind {
+ store i235 %x, i235* @i235_s
+ ret void
+}
+
+define void @i236_ls(i236 signext %x) nounwind {
+ store i236 %x, i236* @i236_s
+ ret void
+}
+
+define void @i237_ls(i237 signext %x) nounwind {
+ store i237 %x, i237* @i237_s
+ ret void
+}
+
+define void @i238_ls(i238 signext %x) nounwind {
+ store i238 %x, i238* @i238_s
+ ret void
+}
+
+define void @i239_ls(i239 signext %x) nounwind {
+ store i239 %x, i239* @i239_s
+ ret void
+}
+
+define void @i240_ls(i240 signext %x) nounwind {
+ store i240 %x, i240* @i240_s
+ ret void
+}
+
+define void @i241_ls(i241 signext %x) nounwind {
+ store i241 %x, i241* @i241_s
+ ret void
+}
+
+define void @i242_ls(i242 signext %x) nounwind {
+ store i242 %x, i242* @i242_s
+ ret void
+}
+
+define void @i243_ls(i243 signext %x) nounwind {
+ store i243 %x, i243* @i243_s
+ ret void
+}
+
+define void @i244_ls(i244 signext %x) nounwind {
+ store i244 %x, i244* @i244_s
+ ret void
+}
+
+define void @i245_ls(i245 signext %x) nounwind {
+ store i245 %x, i245* @i245_s
+ ret void
+}
+
+define void @i246_ls(i246 signext %x) nounwind {
+ store i246 %x, i246* @i246_s
+ ret void
+}
+
+define void @i247_ls(i247 signext %x) nounwind {
+ store i247 %x, i247* @i247_s
+ ret void
+}
+
+define void @i248_ls(i248 signext %x) nounwind {
+ store i248 %x, i248* @i248_s
+ ret void
+}
+
+define void @i249_ls(i249 signext %x) nounwind {
+ store i249 %x, i249* @i249_s
+ ret void
+}
+
+define void @i250_ls(i250 signext %x) nounwind {
+ store i250 %x, i250* @i250_s
+ ret void
+}
+
+define void @i251_ls(i251 signext %x) nounwind {
+ store i251 %x, i251* @i251_s
+ ret void
+}
+
+define void @i252_ls(i252 signext %x) nounwind {
+ store i252 %x, i252* @i252_s
+ ret void
+}
+
+define void @i253_ls(i253 signext %x) nounwind {
+ store i253 %x, i253* @i253_s
+ ret void
+}
+
+define void @i254_ls(i254 signext %x) nounwind {
+ store i254 %x, i254* @i254_s
+ ret void
+}
+
+define void @i255_ls(i255 signext %x) nounwind {
+ store i255 %x, i255* @i255_s
+ ret void
+}
+
+define void @i256_ls(i256 signext %x) nounwind {
+ store i256 %x, i256* @i256_s
+ ret void
+}
diff --git a/test/CodeGen/Generic/APIntZextParam.ll b/test/CodeGen/Generic/APIntZextParam.ll
new file mode 100644
index 0000000..173b9fd
--- /dev/null
+++ b/test/CodeGen/Generic/APIntZextParam.ll
@@ -0,0 +1,1537 @@
+; RUN: llc < %s > %t
+@i1_s = external global i1 ; <i1*> [#uses=1]
+@i2_s = external global i2 ; <i2*> [#uses=1]
+@i3_s = external global i3 ; <i3*> [#uses=1]
+@i4_s = external global i4 ; <i4*> [#uses=1]
+@i5_s = external global i5 ; <i5*> [#uses=1]
+@i6_s = external global i6 ; <i6*> [#uses=1]
+@i7_s = external global i7 ; <i7*> [#uses=1]
+@i8_s = external global i8 ; <i8*> [#uses=1]
+@i9_s = external global i9 ; <i9*> [#uses=1]
+@i10_s = external global i10 ; <i10*> [#uses=1]
+@i11_s = external global i11 ; <i11*> [#uses=1]
+@i12_s = external global i12 ; <i12*> [#uses=1]
+@i13_s = external global i13 ; <i13*> [#uses=1]
+@i14_s = external global i14 ; <i14*> [#uses=1]
+@i15_s = external global i15 ; <i15*> [#uses=1]
+@i16_s = external global i16 ; <i16*> [#uses=1]
+@i17_s = external global i17 ; <i17*> [#uses=1]
+@i18_s = external global i18 ; <i18*> [#uses=1]
+@i19_s = external global i19 ; <i19*> [#uses=1]
+@i20_s = external global i20 ; <i20*> [#uses=1]
+@i21_s = external global i21 ; <i21*> [#uses=1]
+@i22_s = external global i22 ; <i22*> [#uses=1]
+@i23_s = external global i23 ; <i23*> [#uses=1]
+@i24_s = external global i24 ; <i24*> [#uses=1]
+@i25_s = external global i25 ; <i25*> [#uses=1]
+@i26_s = external global i26 ; <i26*> [#uses=1]
+@i27_s = external global i27 ; <i27*> [#uses=1]
+@i28_s = external global i28 ; <i28*> [#uses=1]
+@i29_s = external global i29 ; <i29*> [#uses=1]
+@i30_s = external global i30 ; <i30*> [#uses=1]
+@i31_s = external global i31 ; <i31*> [#uses=1]
+@i32_s = external global i32 ; <i32*> [#uses=1]
+@i33_s = external global i33 ; <i33*> [#uses=1]
+@i34_s = external global i34 ; <i34*> [#uses=1]
+@i35_s = external global i35 ; <i35*> [#uses=1]
+@i36_s = external global i36 ; <i36*> [#uses=1]
+@i37_s = external global i37 ; <i37*> [#uses=1]
+@i38_s = external global i38 ; <i38*> [#uses=1]
+@i39_s = external global i39 ; <i39*> [#uses=1]
+@i40_s = external global i40 ; <i40*> [#uses=1]
+@i41_s = external global i41 ; <i41*> [#uses=1]
+@i42_s = external global i42 ; <i42*> [#uses=1]
+@i43_s = external global i43 ; <i43*> [#uses=1]
+@i44_s = external global i44 ; <i44*> [#uses=1]
+@i45_s = external global i45 ; <i45*> [#uses=1]
+@i46_s = external global i46 ; <i46*> [#uses=1]
+@i47_s = external global i47 ; <i47*> [#uses=1]
+@i48_s = external global i48 ; <i48*> [#uses=1]
+@i49_s = external global i49 ; <i49*> [#uses=1]
+@i50_s = external global i50 ; <i50*> [#uses=1]
+@i51_s = external global i51 ; <i51*> [#uses=1]
+@i52_s = external global i52 ; <i52*> [#uses=1]
+@i53_s = external global i53 ; <i53*> [#uses=1]
+@i54_s = external global i54 ; <i54*> [#uses=1]
+@i55_s = external global i55 ; <i55*> [#uses=1]
+@i56_s = external global i56 ; <i56*> [#uses=1]
+@i57_s = external global i57 ; <i57*> [#uses=1]
+@i58_s = external global i58 ; <i58*> [#uses=1]
+@i59_s = external global i59 ; <i59*> [#uses=1]
+@i60_s = external global i60 ; <i60*> [#uses=1]
+@i61_s = external global i61 ; <i61*> [#uses=1]
+@i62_s = external global i62 ; <i62*> [#uses=1]
+@i63_s = external global i63 ; <i63*> [#uses=1]
+@i64_s = external global i64 ; <i64*> [#uses=1]
+@i65_s = external global i65 ; <i65*> [#uses=1]
+@i66_s = external global i66 ; <i66*> [#uses=1]
+@i67_s = external global i67 ; <i67*> [#uses=1]
+@i68_s = external global i68 ; <i68*> [#uses=1]
+@i69_s = external global i69 ; <i69*> [#uses=1]
+@i70_s = external global i70 ; <i70*> [#uses=1]
+@i71_s = external global i71 ; <i71*> [#uses=1]
+@i72_s = external global i72 ; <i72*> [#uses=1]
+@i73_s = external global i73 ; <i73*> [#uses=1]
+@i74_s = external global i74 ; <i74*> [#uses=1]
+@i75_s = external global i75 ; <i75*> [#uses=1]
+@i76_s = external global i76 ; <i76*> [#uses=1]
+@i77_s = external global i77 ; <i77*> [#uses=1]
+@i78_s = external global i78 ; <i78*> [#uses=1]
+@i79_s = external global i79 ; <i79*> [#uses=1]
+@i80_s = external global i80 ; <i80*> [#uses=1]
+@i81_s = external global i81 ; <i81*> [#uses=1]
+@i82_s = external global i82 ; <i82*> [#uses=1]
+@i83_s = external global i83 ; <i83*> [#uses=1]
+@i84_s = external global i84 ; <i84*> [#uses=1]
+@i85_s = external global i85 ; <i85*> [#uses=1]
+@i86_s = external global i86 ; <i86*> [#uses=1]
+@i87_s = external global i87 ; <i87*> [#uses=1]
+@i88_s = external global i88 ; <i88*> [#uses=1]
+@i89_s = external global i89 ; <i89*> [#uses=1]
+@i90_s = external global i90 ; <i90*> [#uses=1]
+@i91_s = external global i91 ; <i91*> [#uses=1]
+@i92_s = external global i92 ; <i92*> [#uses=1]
+@i93_s = external global i93 ; <i93*> [#uses=1]
+@i94_s = external global i94 ; <i94*> [#uses=1]
+@i95_s = external global i95 ; <i95*> [#uses=1]
+@i96_s = external global i96 ; <i96*> [#uses=1]
+@i97_s = external global i97 ; <i97*> [#uses=1]
+@i98_s = external global i98 ; <i98*> [#uses=1]
+@i99_s = external global i99 ; <i99*> [#uses=1]
+@i100_s = external global i100 ; <i100*> [#uses=1]
+@i101_s = external global i101 ; <i101*> [#uses=1]
+@i102_s = external global i102 ; <i102*> [#uses=1]
+@i103_s = external global i103 ; <i103*> [#uses=1]
+@i104_s = external global i104 ; <i104*> [#uses=1]
+@i105_s = external global i105 ; <i105*> [#uses=1]
+@i106_s = external global i106 ; <i106*> [#uses=1]
+@i107_s = external global i107 ; <i107*> [#uses=1]
+@i108_s = external global i108 ; <i108*> [#uses=1]
+@i109_s = external global i109 ; <i109*> [#uses=1]
+@i110_s = external global i110 ; <i110*> [#uses=1]
+@i111_s = external global i111 ; <i111*> [#uses=1]
+@i112_s = external global i112 ; <i112*> [#uses=1]
+@i113_s = external global i113 ; <i113*> [#uses=1]
+@i114_s = external global i114 ; <i114*> [#uses=1]
+@i115_s = external global i115 ; <i115*> [#uses=1]
+@i116_s = external global i116 ; <i116*> [#uses=1]
+@i117_s = external global i117 ; <i117*> [#uses=1]
+@i118_s = external global i118 ; <i118*> [#uses=1]
+@i119_s = external global i119 ; <i119*> [#uses=1]
+@i120_s = external global i120 ; <i120*> [#uses=1]
+@i121_s = external global i121 ; <i121*> [#uses=1]
+@i122_s = external global i122 ; <i122*> [#uses=1]
+@i123_s = external global i123 ; <i123*> [#uses=1]
+@i124_s = external global i124 ; <i124*> [#uses=1]
+@i125_s = external global i125 ; <i125*> [#uses=1]
+@i126_s = external global i126 ; <i126*> [#uses=1]
+@i127_s = external global i127 ; <i127*> [#uses=1]
+@i128_s = external global i128 ; <i128*> [#uses=1]
+@i129_s = external global i129 ; <i129*> [#uses=1]
+@i130_s = external global i130 ; <i130*> [#uses=1]
+@i131_s = external global i131 ; <i131*> [#uses=1]
+@i132_s = external global i132 ; <i132*> [#uses=1]
+@i133_s = external global i133 ; <i133*> [#uses=1]
+@i134_s = external global i134 ; <i134*> [#uses=1]
+@i135_s = external global i135 ; <i135*> [#uses=1]
+@i136_s = external global i136 ; <i136*> [#uses=1]
+@i137_s = external global i137 ; <i137*> [#uses=1]
+@i138_s = external global i138 ; <i138*> [#uses=1]
+@i139_s = external global i139 ; <i139*> [#uses=1]
+@i140_s = external global i140 ; <i140*> [#uses=1]
+@i141_s = external global i141 ; <i141*> [#uses=1]
+@i142_s = external global i142 ; <i142*> [#uses=1]
+@i143_s = external global i143 ; <i143*> [#uses=1]
+@i144_s = external global i144 ; <i144*> [#uses=1]
+@i145_s = external global i145 ; <i145*> [#uses=1]
+@i146_s = external global i146 ; <i146*> [#uses=1]
+@i147_s = external global i147 ; <i147*> [#uses=1]
+@i148_s = external global i148 ; <i148*> [#uses=1]
+@i149_s = external global i149 ; <i149*> [#uses=1]
+@i150_s = external global i150 ; <i150*> [#uses=1]
+@i151_s = external global i151 ; <i151*> [#uses=1]
+@i152_s = external global i152 ; <i152*> [#uses=1]
+@i153_s = external global i153 ; <i153*> [#uses=1]
+@i154_s = external global i154 ; <i154*> [#uses=1]
+@i155_s = external global i155 ; <i155*> [#uses=1]
+@i156_s = external global i156 ; <i156*> [#uses=1]
+@i157_s = external global i157 ; <i157*> [#uses=1]
+@i158_s = external global i158 ; <i158*> [#uses=1]
+@i159_s = external global i159 ; <i159*> [#uses=1]
+@i160_s = external global i160 ; <i160*> [#uses=1]
+@i161_s = external global i161 ; <i161*> [#uses=1]
+@i162_s = external global i162 ; <i162*> [#uses=1]
+@i163_s = external global i163 ; <i163*> [#uses=1]
+@i164_s = external global i164 ; <i164*> [#uses=1]
+@i165_s = external global i165 ; <i165*> [#uses=1]
+@i166_s = external global i166 ; <i166*> [#uses=1]
+@i167_s = external global i167 ; <i167*> [#uses=1]
+@i168_s = external global i168 ; <i168*> [#uses=1]
+@i169_s = external global i169 ; <i169*> [#uses=1]
+@i170_s = external global i170 ; <i170*> [#uses=1]
+@i171_s = external global i171 ; <i171*> [#uses=1]
+@i172_s = external global i172 ; <i172*> [#uses=1]
+@i173_s = external global i173 ; <i173*> [#uses=1]
+@i174_s = external global i174 ; <i174*> [#uses=1]
+@i175_s = external global i175 ; <i175*> [#uses=1]
+@i176_s = external global i176 ; <i176*> [#uses=1]
+@i177_s = external global i177 ; <i177*> [#uses=1]
+@i178_s = external global i178 ; <i178*> [#uses=1]
+@i179_s = external global i179 ; <i179*> [#uses=1]
+@i180_s = external global i180 ; <i180*> [#uses=1]
+@i181_s = external global i181 ; <i181*> [#uses=1]
+@i182_s = external global i182 ; <i182*> [#uses=1]
+@i183_s = external global i183 ; <i183*> [#uses=1]
+@i184_s = external global i184 ; <i184*> [#uses=1]
+@i185_s = external global i185 ; <i185*> [#uses=1]
+@i186_s = external global i186 ; <i186*> [#uses=1]
+@i187_s = external global i187 ; <i187*> [#uses=1]
+@i188_s = external global i188 ; <i188*> [#uses=1]
+@i189_s = external global i189 ; <i189*> [#uses=1]
+@i190_s = external global i190 ; <i190*> [#uses=1]
+@i191_s = external global i191 ; <i191*> [#uses=1]
+@i192_s = external global i192 ; <i192*> [#uses=1]
+@i193_s = external global i193 ; <i193*> [#uses=1]
+@i194_s = external global i194 ; <i194*> [#uses=1]
+@i195_s = external global i195 ; <i195*> [#uses=1]
+@i196_s = external global i196 ; <i196*> [#uses=1]
+@i197_s = external global i197 ; <i197*> [#uses=1]
+@i198_s = external global i198 ; <i198*> [#uses=1]
+@i199_s = external global i199 ; <i199*> [#uses=1]
+@i200_s = external global i200 ; <i200*> [#uses=1]
+@i201_s = external global i201 ; <i201*> [#uses=1]
+@i202_s = external global i202 ; <i202*> [#uses=1]
+@i203_s = external global i203 ; <i203*> [#uses=1]
+@i204_s = external global i204 ; <i204*> [#uses=1]
+@i205_s = external global i205 ; <i205*> [#uses=1]
+@i206_s = external global i206 ; <i206*> [#uses=1]
+@i207_s = external global i207 ; <i207*> [#uses=1]
+@i208_s = external global i208 ; <i208*> [#uses=1]
+@i209_s = external global i209 ; <i209*> [#uses=1]
+@i210_s = external global i210 ; <i210*> [#uses=1]
+@i211_s = external global i211 ; <i211*> [#uses=1]
+@i212_s = external global i212 ; <i212*> [#uses=1]
+@i213_s = external global i213 ; <i213*> [#uses=1]
+@i214_s = external global i214 ; <i214*> [#uses=1]
+@i215_s = external global i215 ; <i215*> [#uses=1]
+@i216_s = external global i216 ; <i216*> [#uses=1]
+@i217_s = external global i217 ; <i217*> [#uses=1]
+@i218_s = external global i218 ; <i218*> [#uses=1]
+@i219_s = external global i219 ; <i219*> [#uses=1]
+@i220_s = external global i220 ; <i220*> [#uses=1]
+@i221_s = external global i221 ; <i221*> [#uses=1]
+@i222_s = external global i222 ; <i222*> [#uses=1]
+@i223_s = external global i223 ; <i223*> [#uses=1]
+@i224_s = external global i224 ; <i224*> [#uses=1]
+@i225_s = external global i225 ; <i225*> [#uses=1]
+@i226_s = external global i226 ; <i226*> [#uses=1]
+@i227_s = external global i227 ; <i227*> [#uses=1]
+@i228_s = external global i228 ; <i228*> [#uses=1]
+@i229_s = external global i229 ; <i229*> [#uses=1]
+@i230_s = external global i230 ; <i230*> [#uses=1]
+@i231_s = external global i231 ; <i231*> [#uses=1]
+@i232_s = external global i232 ; <i232*> [#uses=1]
+@i233_s = external global i233 ; <i233*> [#uses=1]
+@i234_s = external global i234 ; <i234*> [#uses=1]
+@i235_s = external global i235 ; <i235*> [#uses=1]
+@i236_s = external global i236 ; <i236*> [#uses=1]
+@i237_s = external global i237 ; <i237*> [#uses=1]
+@i238_s = external global i238 ; <i238*> [#uses=1]
+@i239_s = external global i239 ; <i239*> [#uses=1]
+@i240_s = external global i240 ; <i240*> [#uses=1]
+@i241_s = external global i241 ; <i241*> [#uses=1]
+@i242_s = external global i242 ; <i242*> [#uses=1]
+@i243_s = external global i243 ; <i243*> [#uses=1]
+@i244_s = external global i244 ; <i244*> [#uses=1]
+@i245_s = external global i245 ; <i245*> [#uses=1]
+@i246_s = external global i246 ; <i246*> [#uses=1]
+@i247_s = external global i247 ; <i247*> [#uses=1]
+@i248_s = external global i248 ; <i248*> [#uses=1]
+@i249_s = external global i249 ; <i249*> [#uses=1]
+@i250_s = external global i250 ; <i250*> [#uses=1]
+@i251_s = external global i251 ; <i251*> [#uses=1]
+@i252_s = external global i252 ; <i252*> [#uses=1]
+@i253_s = external global i253 ; <i253*> [#uses=1]
+@i254_s = external global i254 ; <i254*> [#uses=1]
+@i255_s = external global i255 ; <i255*> [#uses=1]
+@i256_s = external global i256 ; <i256*> [#uses=1]
+
+define void @i1_ls(i1 zeroext %x) nounwind {
+ store i1 %x, i1* @i1_s
+ ret void
+}
+
+define void @i2_ls(i2 zeroext %x) nounwind {
+ store i2 %x, i2* @i2_s
+ ret void
+}
+
+define void @i3_ls(i3 zeroext %x) nounwind {
+ store i3 %x, i3* @i3_s
+ ret void
+}
+
+define void @i4_ls(i4 zeroext %x) nounwind {
+ store i4 %x, i4* @i4_s
+ ret void
+}
+
+define void @i5_ls(i5 zeroext %x) nounwind {
+ store i5 %x, i5* @i5_s
+ ret void
+}
+
+define void @i6_ls(i6 zeroext %x) nounwind {
+ store i6 %x, i6* @i6_s
+ ret void
+}
+
+define void @i7_ls(i7 zeroext %x) nounwind {
+ store i7 %x, i7* @i7_s
+ ret void
+}
+
+define void @i8_ls(i8 zeroext %x) nounwind {
+ store i8 %x, i8* @i8_s
+ ret void
+}
+
+define void @i9_ls(i9 zeroext %x) nounwind {
+ store i9 %x, i9* @i9_s
+ ret void
+}
+
+define void @i10_ls(i10 zeroext %x) nounwind {
+ store i10 %x, i10* @i10_s
+ ret void
+}
+
+define void @i11_ls(i11 zeroext %x) nounwind {
+ store i11 %x, i11* @i11_s
+ ret void
+}
+
+define void @i12_ls(i12 zeroext %x) nounwind {
+ store i12 %x, i12* @i12_s
+ ret void
+}
+
+define void @i13_ls(i13 zeroext %x) nounwind {
+ store i13 %x, i13* @i13_s
+ ret void
+}
+
+define void @i14_ls(i14 zeroext %x) nounwind {
+ store i14 %x, i14* @i14_s
+ ret void
+}
+
+define void @i15_ls(i15 zeroext %x) nounwind {
+ store i15 %x, i15* @i15_s
+ ret void
+}
+
+define void @i16_ls(i16 zeroext %x) nounwind {
+ store i16 %x, i16* @i16_s
+ ret void
+}
+
+define void @i17_ls(i17 zeroext %x) nounwind {
+ store i17 %x, i17* @i17_s
+ ret void
+}
+
+define void @i18_ls(i18 zeroext %x) nounwind {
+ store i18 %x, i18* @i18_s
+ ret void
+}
+
+define void @i19_ls(i19 zeroext %x) nounwind {
+ store i19 %x, i19* @i19_s
+ ret void
+}
+
+define void @i20_ls(i20 zeroext %x) nounwind {
+ store i20 %x, i20* @i20_s
+ ret void
+}
+
+define void @i21_ls(i21 zeroext %x) nounwind {
+ store i21 %x, i21* @i21_s
+ ret void
+}
+
+define void @i22_ls(i22 zeroext %x) nounwind {
+ store i22 %x, i22* @i22_s
+ ret void
+}
+
+define void @i23_ls(i23 zeroext %x) nounwind {
+ store i23 %x, i23* @i23_s
+ ret void
+}
+
+define void @i24_ls(i24 zeroext %x) nounwind {
+ store i24 %x, i24* @i24_s
+ ret void
+}
+
+define void @i25_ls(i25 zeroext %x) nounwind {
+ store i25 %x, i25* @i25_s
+ ret void
+}
+
+define void @i26_ls(i26 zeroext %x) nounwind {
+ store i26 %x, i26* @i26_s
+ ret void
+}
+
+define void @i27_ls(i27 zeroext %x) nounwind {
+ store i27 %x, i27* @i27_s
+ ret void
+}
+
+define void @i28_ls(i28 zeroext %x) nounwind {
+ store i28 %x, i28* @i28_s
+ ret void
+}
+
+define void @i29_ls(i29 zeroext %x) nounwind {
+ store i29 %x, i29* @i29_s
+ ret void
+}
+
+define void @i30_ls(i30 zeroext %x) nounwind {
+ store i30 %x, i30* @i30_s
+ ret void
+}
+
+define void @i31_ls(i31 zeroext %x) nounwind {
+ store i31 %x, i31* @i31_s
+ ret void
+}
+
+define void @i32_ls(i32 zeroext %x) nounwind {
+ store i32 %x, i32* @i32_s
+ ret void
+}
+
+define void @i33_ls(i33 zeroext %x) nounwind {
+ store i33 %x, i33* @i33_s
+ ret void
+}
+
+define void @i34_ls(i34 zeroext %x) nounwind {
+ store i34 %x, i34* @i34_s
+ ret void
+}
+
+define void @i35_ls(i35 zeroext %x) nounwind {
+ store i35 %x, i35* @i35_s
+ ret void
+}
+
+define void @i36_ls(i36 zeroext %x) nounwind {
+ store i36 %x, i36* @i36_s
+ ret void
+}
+
+define void @i37_ls(i37 zeroext %x) nounwind {
+ store i37 %x, i37* @i37_s
+ ret void
+}
+
+define void @i38_ls(i38 zeroext %x) nounwind {
+ store i38 %x, i38* @i38_s
+ ret void
+}
+
+define void @i39_ls(i39 zeroext %x) nounwind {
+ store i39 %x, i39* @i39_s
+ ret void
+}
+
+define void @i40_ls(i40 zeroext %x) nounwind {
+ store i40 %x, i40* @i40_s
+ ret void
+}
+
+define void @i41_ls(i41 zeroext %x) nounwind {
+ store i41 %x, i41* @i41_s
+ ret void
+}
+
+define void @i42_ls(i42 zeroext %x) nounwind {
+ store i42 %x, i42* @i42_s
+ ret void
+}
+
+define void @i43_ls(i43 zeroext %x) nounwind {
+ store i43 %x, i43* @i43_s
+ ret void
+}
+
+define void @i44_ls(i44 zeroext %x) nounwind {
+ store i44 %x, i44* @i44_s
+ ret void
+}
+
+define void @i45_ls(i45 zeroext %x) nounwind {
+ store i45 %x, i45* @i45_s
+ ret void
+}
+
+define void @i46_ls(i46 zeroext %x) nounwind {
+ store i46 %x, i46* @i46_s
+ ret void
+}
+
+define void @i47_ls(i47 zeroext %x) nounwind {
+ store i47 %x, i47* @i47_s
+ ret void
+}
+
+define void @i48_ls(i48 zeroext %x) nounwind {
+ store i48 %x, i48* @i48_s
+ ret void
+}
+
+define void @i49_ls(i49 zeroext %x) nounwind {
+ store i49 %x, i49* @i49_s
+ ret void
+}
+
+define void @i50_ls(i50 zeroext %x) nounwind {
+ store i50 %x, i50* @i50_s
+ ret void
+}
+
+define void @i51_ls(i51 zeroext %x) nounwind {
+ store i51 %x, i51* @i51_s
+ ret void
+}
+
+define void @i52_ls(i52 zeroext %x) nounwind {
+ store i52 %x, i52* @i52_s
+ ret void
+}
+
+define void @i53_ls(i53 zeroext %x) nounwind {
+ store i53 %x, i53* @i53_s
+ ret void
+}
+
+define void @i54_ls(i54 zeroext %x) nounwind {
+ store i54 %x, i54* @i54_s
+ ret void
+}
+
+define void @i55_ls(i55 zeroext %x) nounwind {
+ store i55 %x, i55* @i55_s
+ ret void
+}
+
+define void @i56_ls(i56 zeroext %x) nounwind {
+ store i56 %x, i56* @i56_s
+ ret void
+}
+
+define void @i57_ls(i57 zeroext %x) nounwind {
+ store i57 %x, i57* @i57_s
+ ret void
+}
+
+define void @i58_ls(i58 zeroext %x) nounwind {
+ store i58 %x, i58* @i58_s
+ ret void
+}
+
+define void @i59_ls(i59 zeroext %x) nounwind {
+ store i59 %x, i59* @i59_s
+ ret void
+}
+
+define void @i60_ls(i60 zeroext %x) nounwind {
+ store i60 %x, i60* @i60_s
+ ret void
+}
+
+define void @i61_ls(i61 zeroext %x) nounwind {
+ store i61 %x, i61* @i61_s
+ ret void
+}
+
+define void @i62_ls(i62 zeroext %x) nounwind {
+ store i62 %x, i62* @i62_s
+ ret void
+}
+
+define void @i63_ls(i63 zeroext %x) nounwind {
+ store i63 %x, i63* @i63_s
+ ret void
+}
+
+define void @i64_ls(i64 zeroext %x) nounwind {
+ store i64 %x, i64* @i64_s
+ ret void
+}
+
+define void @i65_ls(i65 zeroext %x) nounwind {
+ store i65 %x, i65* @i65_s
+ ret void
+}
+
+define void @i66_ls(i66 zeroext %x) nounwind {
+ store i66 %x, i66* @i66_s
+ ret void
+}
+
+define void @i67_ls(i67 zeroext %x) nounwind {
+ store i67 %x, i67* @i67_s
+ ret void
+}
+
+define void @i68_ls(i68 zeroext %x) nounwind {
+ store i68 %x, i68* @i68_s
+ ret void
+}
+
+define void @i69_ls(i69 zeroext %x) nounwind {
+ store i69 %x, i69* @i69_s
+ ret void
+}
+
+define void @i70_ls(i70 zeroext %x) nounwind {
+ store i70 %x, i70* @i70_s
+ ret void
+}
+
+define void @i71_ls(i71 zeroext %x) nounwind {
+ store i71 %x, i71* @i71_s
+ ret void
+}
+
+define void @i72_ls(i72 zeroext %x) nounwind {
+ store i72 %x, i72* @i72_s
+ ret void
+}
+
+define void @i73_ls(i73 zeroext %x) nounwind {
+ store i73 %x, i73* @i73_s
+ ret void
+}
+
+define void @i74_ls(i74 zeroext %x) nounwind {
+ store i74 %x, i74* @i74_s
+ ret void
+}
+
+define void @i75_ls(i75 zeroext %x) nounwind {
+ store i75 %x, i75* @i75_s
+ ret void
+}
+
+define void @i76_ls(i76 zeroext %x) nounwind {
+ store i76 %x, i76* @i76_s
+ ret void
+}
+
+define void @i77_ls(i77 zeroext %x) nounwind {
+ store i77 %x, i77* @i77_s
+ ret void
+}
+
+define void @i78_ls(i78 zeroext %x) nounwind {
+ store i78 %x, i78* @i78_s
+ ret void
+}
+
+define void @i79_ls(i79 zeroext %x) nounwind {
+ store i79 %x, i79* @i79_s
+ ret void
+}
+
+define void @i80_ls(i80 zeroext %x) nounwind {
+ store i80 %x, i80* @i80_s
+ ret void
+}
+
+define void @i81_ls(i81 zeroext %x) nounwind {
+ store i81 %x, i81* @i81_s
+ ret void
+}
+
+define void @i82_ls(i82 zeroext %x) nounwind {
+ store i82 %x, i82* @i82_s
+ ret void
+}
+
+define void @i83_ls(i83 zeroext %x) nounwind {
+ store i83 %x, i83* @i83_s
+ ret void
+}
+
+define void @i84_ls(i84 zeroext %x) nounwind {
+ store i84 %x, i84* @i84_s
+ ret void
+}
+
+define void @i85_ls(i85 zeroext %x) nounwind {
+ store i85 %x, i85* @i85_s
+ ret void
+}
+
+define void @i86_ls(i86 zeroext %x) nounwind {
+ store i86 %x, i86* @i86_s
+ ret void
+}
+
+define void @i87_ls(i87 zeroext %x) nounwind {
+ store i87 %x, i87* @i87_s
+ ret void
+}
+
+define void @i88_ls(i88 zeroext %x) nounwind {
+ store i88 %x, i88* @i88_s
+ ret void
+}
+
+define void @i89_ls(i89 zeroext %x) nounwind {
+ store i89 %x, i89* @i89_s
+ ret void
+}
+
+define void @i90_ls(i90 zeroext %x) nounwind {
+ store i90 %x, i90* @i90_s
+ ret void
+}
+
+define void @i91_ls(i91 zeroext %x) nounwind {
+ store i91 %x, i91* @i91_s
+ ret void
+}
+
+define void @i92_ls(i92 zeroext %x) nounwind {
+ store i92 %x, i92* @i92_s
+ ret void
+}
+
+define void @i93_ls(i93 zeroext %x) nounwind {
+ store i93 %x, i93* @i93_s
+ ret void
+}
+
+define void @i94_ls(i94 zeroext %x) nounwind {
+ store i94 %x, i94* @i94_s
+ ret void
+}
+
+define void @i95_ls(i95 zeroext %x) nounwind {
+ store i95 %x, i95* @i95_s
+ ret void
+}
+
+define void @i96_ls(i96 zeroext %x) nounwind {
+ store i96 %x, i96* @i96_s
+ ret void
+}
+
+define void @i97_ls(i97 zeroext %x) nounwind {
+ store i97 %x, i97* @i97_s
+ ret void
+}
+
+define void @i98_ls(i98 zeroext %x) nounwind {
+ store i98 %x, i98* @i98_s
+ ret void
+}
+
+define void @i99_ls(i99 zeroext %x) nounwind {
+ store i99 %x, i99* @i99_s
+ ret void
+}
+
+define void @i100_ls(i100 zeroext %x) nounwind {
+ store i100 %x, i100* @i100_s
+ ret void
+}
+
+define void @i101_ls(i101 zeroext %x) nounwind {
+ store i101 %x, i101* @i101_s
+ ret void
+}
+
+define void @i102_ls(i102 zeroext %x) nounwind {
+ store i102 %x, i102* @i102_s
+ ret void
+}
+
+define void @i103_ls(i103 zeroext %x) nounwind {
+ store i103 %x, i103* @i103_s
+ ret void
+}
+
+define void @i104_ls(i104 zeroext %x) nounwind {
+ store i104 %x, i104* @i104_s
+ ret void
+}
+
+define void @i105_ls(i105 zeroext %x) nounwind {
+ store i105 %x, i105* @i105_s
+ ret void
+}
+
+define void @i106_ls(i106 zeroext %x) nounwind {
+ store i106 %x, i106* @i106_s
+ ret void
+}
+
+define void @i107_ls(i107 zeroext %x) nounwind {
+ store i107 %x, i107* @i107_s
+ ret void
+}
+
+define void @i108_ls(i108 zeroext %x) nounwind {
+ store i108 %x, i108* @i108_s
+ ret void
+}
+
+define void @i109_ls(i109 zeroext %x) nounwind {
+ store i109 %x, i109* @i109_s
+ ret void
+}
+
+define void @i110_ls(i110 zeroext %x) nounwind {
+ store i110 %x, i110* @i110_s
+ ret void
+}
+
+define void @i111_ls(i111 zeroext %x) nounwind {
+ store i111 %x, i111* @i111_s
+ ret void
+}
+
+define void @i112_ls(i112 zeroext %x) nounwind {
+ store i112 %x, i112* @i112_s
+ ret void
+}
+
+define void @i113_ls(i113 zeroext %x) nounwind {
+ store i113 %x, i113* @i113_s
+ ret void
+}
+
+define void @i114_ls(i114 zeroext %x) nounwind {
+ store i114 %x, i114* @i114_s
+ ret void
+}
+
+define void @i115_ls(i115 zeroext %x) nounwind {
+ store i115 %x, i115* @i115_s
+ ret void
+}
+
+define void @i116_ls(i116 zeroext %x) nounwind {
+ store i116 %x, i116* @i116_s
+ ret void
+}
+
+define void @i117_ls(i117 zeroext %x) nounwind {
+ store i117 %x, i117* @i117_s
+ ret void
+}
+
+define void @i118_ls(i118 zeroext %x) nounwind {
+ store i118 %x, i118* @i118_s
+ ret void
+}
+
+define void @i119_ls(i119 zeroext %x) nounwind {
+ store i119 %x, i119* @i119_s
+ ret void
+}
+
+define void @i120_ls(i120 zeroext %x) nounwind {
+ store i120 %x, i120* @i120_s
+ ret void
+}
+
+define void @i121_ls(i121 zeroext %x) nounwind {
+ store i121 %x, i121* @i121_s
+ ret void
+}
+
+define void @i122_ls(i122 zeroext %x) nounwind {
+ store i122 %x, i122* @i122_s
+ ret void
+}
+
+define void @i123_ls(i123 zeroext %x) nounwind {
+ store i123 %x, i123* @i123_s
+ ret void
+}
+
+define void @i124_ls(i124 zeroext %x) nounwind {
+ store i124 %x, i124* @i124_s
+ ret void
+}
+
+define void @i125_ls(i125 zeroext %x) nounwind {
+ store i125 %x, i125* @i125_s
+ ret void
+}
+
+define void @i126_ls(i126 zeroext %x) nounwind {
+ store i126 %x, i126* @i126_s
+ ret void
+}
+
+define void @i127_ls(i127 zeroext %x) nounwind {
+ store i127 %x, i127* @i127_s
+ ret void
+}
+
+define void @i128_ls(i128 zeroext %x) nounwind {
+ store i128 %x, i128* @i128_s
+ ret void
+}
+
+define void @i129_ls(i129 zeroext %x) nounwind {
+ store i129 %x, i129* @i129_s
+ ret void
+}
+
+define void @i130_ls(i130 zeroext %x) nounwind {
+ store i130 %x, i130* @i130_s
+ ret void
+}
+
+define void @i131_ls(i131 zeroext %x) nounwind {
+ store i131 %x, i131* @i131_s
+ ret void
+}
+
+define void @i132_ls(i132 zeroext %x) nounwind {
+ store i132 %x, i132* @i132_s
+ ret void
+}
+
+define void @i133_ls(i133 zeroext %x) nounwind {
+ store i133 %x, i133* @i133_s
+ ret void
+}
+
+define void @i134_ls(i134 zeroext %x) nounwind {
+ store i134 %x, i134* @i134_s
+ ret void
+}
+
+define void @i135_ls(i135 zeroext %x) nounwind {
+ store i135 %x, i135* @i135_s
+ ret void
+}
+
+define void @i136_ls(i136 zeroext %x) nounwind {
+ store i136 %x, i136* @i136_s
+ ret void
+}
+
+define void @i137_ls(i137 zeroext %x) nounwind {
+ store i137 %x, i137* @i137_s
+ ret void
+}
+
+define void @i138_ls(i138 zeroext %x) nounwind {
+ store i138 %x, i138* @i138_s
+ ret void
+}
+
+define void @i139_ls(i139 zeroext %x) nounwind {
+ store i139 %x, i139* @i139_s
+ ret void
+}
+
+define void @i140_ls(i140 zeroext %x) nounwind {
+ store i140 %x, i140* @i140_s
+ ret void
+}
+
+define void @i141_ls(i141 zeroext %x) nounwind {
+ store i141 %x, i141* @i141_s
+ ret void
+}
+
+define void @i142_ls(i142 zeroext %x) nounwind {
+ store i142 %x, i142* @i142_s
+ ret void
+}
+
+define void @i143_ls(i143 zeroext %x) nounwind {
+ store i143 %x, i143* @i143_s
+ ret void
+}
+
+define void @i144_ls(i144 zeroext %x) nounwind {
+ store i144 %x, i144* @i144_s
+ ret void
+}
+
+define void @i145_ls(i145 zeroext %x) nounwind {
+ store i145 %x, i145* @i145_s
+ ret void
+}
+
+define void @i146_ls(i146 zeroext %x) nounwind {
+ store i146 %x, i146* @i146_s
+ ret void
+}
+
+define void @i147_ls(i147 zeroext %x) nounwind {
+ store i147 %x, i147* @i147_s
+ ret void
+}
+
+define void @i148_ls(i148 zeroext %x) nounwind {
+ store i148 %x, i148* @i148_s
+ ret void
+}
+
+define void @i149_ls(i149 zeroext %x) nounwind {
+ store i149 %x, i149* @i149_s
+ ret void
+}
+
+define void @i150_ls(i150 zeroext %x) nounwind {
+ store i150 %x, i150* @i150_s
+ ret void
+}
+
+define void @i151_ls(i151 zeroext %x) nounwind {
+ store i151 %x, i151* @i151_s
+ ret void
+}
+
+define void @i152_ls(i152 zeroext %x) nounwind {
+ store i152 %x, i152* @i152_s
+ ret void
+}
+
+define void @i153_ls(i153 zeroext %x) nounwind {
+ store i153 %x, i153* @i153_s
+ ret void
+}
+
+define void @i154_ls(i154 zeroext %x) nounwind {
+ store i154 %x, i154* @i154_s
+ ret void
+}
+
+define void @i155_ls(i155 zeroext %x) nounwind {
+ store i155 %x, i155* @i155_s
+ ret void
+}
+
+define void @i156_ls(i156 zeroext %x) nounwind {
+ store i156 %x, i156* @i156_s
+ ret void
+}
+
+define void @i157_ls(i157 zeroext %x) nounwind {
+ store i157 %x, i157* @i157_s
+ ret void
+}
+
+define void @i158_ls(i158 zeroext %x) nounwind {
+ store i158 %x, i158* @i158_s
+ ret void
+}
+
+define void @i159_ls(i159 zeroext %x) nounwind {
+ store i159 %x, i159* @i159_s
+ ret void
+}
+
+define void @i160_ls(i160 zeroext %x) nounwind {
+ store i160 %x, i160* @i160_s
+ ret void
+}
+
+define void @i161_ls(i161 zeroext %x) nounwind {
+ store i161 %x, i161* @i161_s
+ ret void
+}
+
+define void @i162_ls(i162 zeroext %x) nounwind {
+ store i162 %x, i162* @i162_s
+ ret void
+}
+
+define void @i163_ls(i163 zeroext %x) nounwind {
+ store i163 %x, i163* @i163_s
+ ret void
+}
+
+define void @i164_ls(i164 zeroext %x) nounwind {
+ store i164 %x, i164* @i164_s
+ ret void
+}
+
+define void @i165_ls(i165 zeroext %x) nounwind {
+ store i165 %x, i165* @i165_s
+ ret void
+}
+
+define void @i166_ls(i166 zeroext %x) nounwind {
+ store i166 %x, i166* @i166_s
+ ret void
+}
+
+define void @i167_ls(i167 zeroext %x) nounwind {
+ store i167 %x, i167* @i167_s
+ ret void
+}
+
+define void @i168_ls(i168 zeroext %x) nounwind {
+ store i168 %x, i168* @i168_s
+ ret void
+}
+
+define void @i169_ls(i169 zeroext %x) nounwind {
+ store i169 %x, i169* @i169_s
+ ret void
+}
+
+define void @i170_ls(i170 zeroext %x) nounwind {
+ store i170 %x, i170* @i170_s
+ ret void
+}
+
+define void @i171_ls(i171 zeroext %x) nounwind {
+ store i171 %x, i171* @i171_s
+ ret void
+}
+
+define void @i172_ls(i172 zeroext %x) nounwind {
+ store i172 %x, i172* @i172_s
+ ret void
+}
+
+define void @i173_ls(i173 zeroext %x) nounwind {
+ store i173 %x, i173* @i173_s
+ ret void
+}
+
+define void @i174_ls(i174 zeroext %x) nounwind {
+ store i174 %x, i174* @i174_s
+ ret void
+}
+
+define void @i175_ls(i175 zeroext %x) nounwind {
+ store i175 %x, i175* @i175_s
+ ret void
+}
+
+define void @i176_ls(i176 zeroext %x) nounwind {
+ store i176 %x, i176* @i176_s
+ ret void
+}
+
+define void @i177_ls(i177 zeroext %x) nounwind {
+ store i177 %x, i177* @i177_s
+ ret void
+}
+
+define void @i178_ls(i178 zeroext %x) nounwind {
+ store i178 %x, i178* @i178_s
+ ret void
+}
+
+define void @i179_ls(i179 zeroext %x) nounwind {
+ store i179 %x, i179* @i179_s
+ ret void
+}
+
+define void @i180_ls(i180 zeroext %x) nounwind {
+ store i180 %x, i180* @i180_s
+ ret void
+}
+
+define void @i181_ls(i181 zeroext %x) nounwind {
+ store i181 %x, i181* @i181_s
+ ret void
+}
+
+define void @i182_ls(i182 zeroext %x) nounwind {
+ store i182 %x, i182* @i182_s
+ ret void
+}
+
+define void @i183_ls(i183 zeroext %x) nounwind {
+ store i183 %x, i183* @i183_s
+ ret void
+}
+
+define void @i184_ls(i184 zeroext %x) nounwind {
+ store i184 %x, i184* @i184_s
+ ret void
+}
+
+define void @i185_ls(i185 zeroext %x) nounwind {
+ store i185 %x, i185* @i185_s
+ ret void
+}
+
+define void @i186_ls(i186 zeroext %x) nounwind {
+ store i186 %x, i186* @i186_s
+ ret void
+}
+
+define void @i187_ls(i187 zeroext %x) nounwind {
+ store i187 %x, i187* @i187_s
+ ret void
+}
+
+define void @i188_ls(i188 zeroext %x) nounwind {
+ store i188 %x, i188* @i188_s
+ ret void
+}
+
+define void @i189_ls(i189 zeroext %x) nounwind {
+ store i189 %x, i189* @i189_s
+ ret void
+}
+
+define void @i190_ls(i190 zeroext %x) nounwind {
+ store i190 %x, i190* @i190_s
+ ret void
+}
+
+define void @i191_ls(i191 zeroext %x) nounwind {
+ store i191 %x, i191* @i191_s
+ ret void
+}
+
+define void @i192_ls(i192 zeroext %x) nounwind {
+ store i192 %x, i192* @i192_s
+ ret void
+}
+
+define void @i193_ls(i193 zeroext %x) nounwind {
+ store i193 %x, i193* @i193_s
+ ret void
+}
+
+define void @i194_ls(i194 zeroext %x) nounwind {
+ store i194 %x, i194* @i194_s
+ ret void
+}
+
+define void @i195_ls(i195 zeroext %x) nounwind {
+ store i195 %x, i195* @i195_s
+ ret void
+}
+
+define void @i196_ls(i196 zeroext %x) nounwind {
+ store i196 %x, i196* @i196_s
+ ret void
+}
+
+define void @i197_ls(i197 zeroext %x) nounwind {
+ store i197 %x, i197* @i197_s
+ ret void
+}
+
+define void @i198_ls(i198 zeroext %x) nounwind {
+ store i198 %x, i198* @i198_s
+ ret void
+}
+
+define void @i199_ls(i199 zeroext %x) nounwind {
+ store i199 %x, i199* @i199_s
+ ret void
+}
+
+define void @i200_ls(i200 zeroext %x) nounwind {
+ store i200 %x, i200* @i200_s
+ ret void
+}
+
+define void @i201_ls(i201 zeroext %x) nounwind {
+ store i201 %x, i201* @i201_s
+ ret void
+}
+
+define void @i202_ls(i202 zeroext %x) nounwind {
+ store i202 %x, i202* @i202_s
+ ret void
+}
+
+define void @i203_ls(i203 zeroext %x) nounwind {
+ store i203 %x, i203* @i203_s
+ ret void
+}
+
+define void @i204_ls(i204 zeroext %x) nounwind {
+ store i204 %x, i204* @i204_s
+ ret void
+}
+
+define void @i205_ls(i205 zeroext %x) nounwind {
+ store i205 %x, i205* @i205_s
+ ret void
+}
+
+define void @i206_ls(i206 zeroext %x) nounwind {
+ store i206 %x, i206* @i206_s
+ ret void
+}
+
+define void @i207_ls(i207 zeroext %x) nounwind {
+ store i207 %x, i207* @i207_s
+ ret void
+}
+
+define void @i208_ls(i208 zeroext %x) nounwind {
+ store i208 %x, i208* @i208_s
+ ret void
+}
+
+define void @i209_ls(i209 zeroext %x) nounwind {
+ store i209 %x, i209* @i209_s
+ ret void
+}
+
+define void @i210_ls(i210 zeroext %x) nounwind {
+ store i210 %x, i210* @i210_s
+ ret void
+}
+
+define void @i211_ls(i211 zeroext %x) nounwind {
+ store i211 %x, i211* @i211_s
+ ret void
+}
+
+define void @i212_ls(i212 zeroext %x) nounwind {
+ store i212 %x, i212* @i212_s
+ ret void
+}
+
+define void @i213_ls(i213 zeroext %x) nounwind {
+ store i213 %x, i213* @i213_s
+ ret void
+}
+
+define void @i214_ls(i214 zeroext %x) nounwind {
+ store i214 %x, i214* @i214_s
+ ret void
+}
+
+define void @i215_ls(i215 zeroext %x) nounwind {
+ store i215 %x, i215* @i215_s
+ ret void
+}
+
+define void @i216_ls(i216 zeroext %x) nounwind {
+ store i216 %x, i216* @i216_s
+ ret void
+}
+
+define void @i217_ls(i217 zeroext %x) nounwind {
+ store i217 %x, i217* @i217_s
+ ret void
+}
+
+define void @i218_ls(i218 zeroext %x) nounwind {
+ store i218 %x, i218* @i218_s
+ ret void
+}
+
+define void @i219_ls(i219 zeroext %x) nounwind {
+ store i219 %x, i219* @i219_s
+ ret void
+}
+
+define void @i220_ls(i220 zeroext %x) nounwind {
+ store i220 %x, i220* @i220_s
+ ret void
+}
+
+define void @i221_ls(i221 zeroext %x) nounwind {
+ store i221 %x, i221* @i221_s
+ ret void
+}
+
+define void @i222_ls(i222 zeroext %x) nounwind {
+ store i222 %x, i222* @i222_s
+ ret void
+}
+
+define void @i223_ls(i223 zeroext %x) nounwind {
+ store i223 %x, i223* @i223_s
+ ret void
+}
+
+define void @i224_ls(i224 zeroext %x) nounwind {
+ store i224 %x, i224* @i224_s
+ ret void
+}
+
+define void @i225_ls(i225 zeroext %x) nounwind {
+ store i225 %x, i225* @i225_s
+ ret void
+}
+
+define void @i226_ls(i226 zeroext %x) nounwind {
+ store i226 %x, i226* @i226_s
+ ret void
+}
+
+define void @i227_ls(i227 zeroext %x) nounwind {
+ store i227 %x, i227* @i227_s
+ ret void
+}
+
+define void @i228_ls(i228 zeroext %x) nounwind {
+ store i228 %x, i228* @i228_s
+ ret void
+}
+
+define void @i229_ls(i229 zeroext %x) nounwind {
+ store i229 %x, i229* @i229_s
+ ret void
+}
+
+define void @i230_ls(i230 zeroext %x) nounwind {
+ store i230 %x, i230* @i230_s
+ ret void
+}
+
+define void @i231_ls(i231 zeroext %x) nounwind {
+ store i231 %x, i231* @i231_s
+ ret void
+}
+
+define void @i232_ls(i232 zeroext %x) nounwind {
+ store i232 %x, i232* @i232_s
+ ret void
+}
+
+define void @i233_ls(i233 zeroext %x) nounwind {
+ store i233 %x, i233* @i233_s
+ ret void
+}
+
+define void @i234_ls(i234 zeroext %x) nounwind {
+ store i234 %x, i234* @i234_s
+ ret void
+}
+
+define void @i235_ls(i235 zeroext %x) nounwind {
+ store i235 %x, i235* @i235_s
+ ret void
+}
+
+define void @i236_ls(i236 zeroext %x) nounwind {
+ store i236 %x, i236* @i236_s
+ ret void
+}
+
+define void @i237_ls(i237 zeroext %x) nounwind {
+ store i237 %x, i237* @i237_s
+ ret void
+}
+
+define void @i238_ls(i238 zeroext %x) nounwind {
+ store i238 %x, i238* @i238_s
+ ret void
+}
+
+define void @i239_ls(i239 zeroext %x) nounwind {
+ store i239 %x, i239* @i239_s
+ ret void
+}
+
+define void @i240_ls(i240 zeroext %x) nounwind {
+ store i240 %x, i240* @i240_s
+ ret void
+}
+
+define void @i241_ls(i241 zeroext %x) nounwind {
+ store i241 %x, i241* @i241_s
+ ret void
+}
+
+define void @i242_ls(i242 zeroext %x) nounwind {
+ store i242 %x, i242* @i242_s
+ ret void
+}
+
+define void @i243_ls(i243 zeroext %x) nounwind {
+ store i243 %x, i243* @i243_s
+ ret void
+}
+
+define void @i244_ls(i244 zeroext %x) nounwind {
+ store i244 %x, i244* @i244_s
+ ret void
+}
+
+define void @i245_ls(i245 zeroext %x) nounwind {
+ store i245 %x, i245* @i245_s
+ ret void
+}
+
+define void @i246_ls(i246 zeroext %x) nounwind {
+ store i246 %x, i246* @i246_s
+ ret void
+}
+
+define void @i247_ls(i247 zeroext %x) nounwind {
+ store i247 %x, i247* @i247_s
+ ret void
+}
+
+define void @i248_ls(i248 zeroext %x) nounwind {
+ store i248 %x, i248* @i248_s
+ ret void
+}
+
+define void @i249_ls(i249 zeroext %x) nounwind {
+ store i249 %x, i249* @i249_s
+ ret void
+}
+
+define void @i250_ls(i250 zeroext %x) nounwind {
+ store i250 %x, i250* @i250_s
+ ret void
+}
+
+define void @i251_ls(i251 zeroext %x) nounwind {
+ store i251 %x, i251* @i251_s
+ ret void
+}
+
+define void @i252_ls(i252 zeroext %x) nounwind {
+ store i252 %x, i252* @i252_s
+ ret void
+}
+
+define void @i253_ls(i253 zeroext %x) nounwind {
+ store i253 %x, i253* @i253_s
+ ret void
+}
+
+define void @i254_ls(i254 zeroext %x) nounwind {
+ store i254 %x, i254* @i254_s
+ ret void
+}
+
+define void @i255_ls(i255 zeroext %x) nounwind {
+ store i255 %x, i255* @i255_s
+ ret void
+}
+
+define void @i256_ls(i256 zeroext %x) nounwind {
+ store i256 %x, i256* @i256_s
+ ret void
+}
diff --git a/test/CodeGen/Generic/BasicInstrs.ll b/test/CodeGen/Generic/BasicInstrs.ll
new file mode 100644
index 0000000..578431e
--- /dev/null
+++ b/test/CodeGen/Generic/BasicInstrs.ll
@@ -0,0 +1,54 @@
+; New testcase, this contains a bunch of simple instructions that should be
+; handled by a code generator.
+
+; RUN: llc < %s
+
+define i32 @add(i32 %A, i32 %B) {
+ %R = add i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @sub(i32 %A, i32 %B) {
+ %R = sub i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @mul(i32 %A, i32 %B) {
+ %R = mul i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @sdiv(i32 %A, i32 %B) {
+ %R = sdiv i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @udiv(i32 %A, i32 %B) {
+ %R = udiv i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @srem(i32 %A, i32 %B) {
+ %R = srem i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @urem(i32 %A, i32 %B) {
+ %R = urem i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @and(i32 %A, i32 %B) {
+ %R = and i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @or(i32 %A, i32 %B) {
+ %R = or i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @xor(i32 %A, i32 %B) {
+ %R = xor i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %R
+}
diff --git a/test/CodeGen/Generic/BurgBadRegAlloc.ll b/test/CodeGen/Generic/BurgBadRegAlloc.ll
new file mode 100644
index 0000000..99d856a
--- /dev/null
+++ b/test/CodeGen/Generic/BurgBadRegAlloc.ll
@@ -0,0 +1,829 @@
+; RUN: llc < %s
+
+;; Register allocation is doing a very poor job on this routine from yyparse
+;; in Burg:
+;; -- at least two long-lived values are being allocated to %o? registers
+;; -- even worse, those registers are being saved and restored repeatedly
+;; at function calls, even though there are no intervening uses.
+;; -- outgoing args of some function calls have to be swapped, causing
+;; another write/read from stack to do the exchange (use -dregalloc=y).
+;;
+%Arity = type %struct.arity*
+ %Binding = type %struct.binding*
+ %DeltaCost = type [4 x i16]
+ %Dimension = type %struct.dimension*
+ %Index_Map = type { i32, %Item_Set* }
+ %IntList = type %struct.intlist*
+ %Item = type { %DeltaCost, %Rule }
+ %ItemArray = type %Item*
+ %Item_Set = type %struct.item_set*
+ %List = type %struct.list*
+ %Mapping = type %struct.mapping*
+ %NonTerminal = type %struct.nonterminal*
+ %Operator = type %struct.operator*
+ %Pattern = type %struct.pattern*
+ %PatternAST = type %struct.patternAST*
+ %Plank = type %struct.plank*
+ %PlankMap = type %struct.plankMap*
+ %ReadFn = type i32 ()*
+ %Rule = type %struct.rule*
+ %RuleAST = type %struct.ruleAST*
+ %StateMap = type %struct.stateMap*
+ %StrTableElement = type %struct.strTableElement*
+ %Symbol = type %struct.symbol*
+ %Table = type %struct.table*
+ %YYSTYPE = type { %IntList }
+ %struct.arity = type { i32, %List }
+ %struct.binding = type { i8*, i32 }
+ %struct.dimension = type { i16*, %Index_Map, %Mapping, i32, %PlankMap }
+ %struct.index_map = type { i32, %Item_Set* }
+ %struct.intlist = type { i32, %IntList }
+ %struct.item = type { %DeltaCost, %Rule }
+ %struct.item_set = type { i32, i32, %Operator, [2 x %Item_Set], %Item_Set, i16*, %ItemArray, %ItemArray }
+ %struct.list = type { i8*, %List }
+ %struct.mapping = type { %List*, i32, i32, i32, %Item_Set* }
+ %struct.nonterminal = type { i8*, i32, i32, i32, %PlankMap, %Rule }
+ %struct.operator = type { i8*, i32, i32, i32, i32, i32, %Table }
+ %struct.pattern = type { %NonTerminal, %Operator, [2 x %NonTerminal] }
+ %struct.patternAST = type { %Symbol, i8*, %List }
+ %struct.plank = type { i8*, %List, i32 }
+ %struct.plankMap = type { %List, i32, %StateMap }
+ %struct.rule = type { %DeltaCost, i32, i32, i32, %NonTerminal, %Pattern, i32 }
+ %struct.ruleAST = type { i8*, %PatternAST, i32, %IntList, %Rule, %StrTableElement, %StrTableElement }
+ %struct.stateMap = type { i8*, %Plank, i32, i16* }
+ %struct.strTableElement = type { i8*, %IntList, i8* }
+ %struct.symbol = type { i8*, i32, { %Operator } }
+ %struct.table = type { %Operator, %List, i16*, [2 x %Dimension], %Item_Set* }
+@yylval = external global %YYSTYPE ; <%YYSTYPE*> [#uses=1]
+@yylhs = external global [25 x i16] ; <[25 x i16]*> [#uses=1]
+@yylen = external global [25 x i16] ; <[25 x i16]*> [#uses=1]
+@yydefred = external global [43 x i16] ; <[43 x i16]*> [#uses=1]
+@yydgoto = external global [12 x i16] ; <[12 x i16]*> [#uses=1]
+@yysindex = external global [43 x i16] ; <[43 x i16]*> [#uses=2]
+@yyrindex = external global [43 x i16] ; <[43 x i16]*> [#uses=1]
+@yygindex = external global [12 x i16] ; <[12 x i16]*> [#uses=1]
+@yytable = external global [263 x i16] ; <[263 x i16]*> [#uses=4]
+@yycheck = external global [263 x i16] ; <[263 x i16]*> [#uses=4]
+@yynerrs = external global i32 ; <i32*> [#uses=3]
+@yyerrflag = external global i32 ; <i32*> [#uses=6]
+@yychar = external global i32 ; <i32*> [#uses=15]
+@yyssp = external global i16* ; <i16**> [#uses=15]
+@yyvsp = external global %YYSTYPE* ; <%YYSTYPE**> [#uses=30]
+@yyval = external global %YYSTYPE ; <%YYSTYPE*> [#uses=1]
+@yyss = external global i16* ; <i16**> [#uses=3]
+@yysslim = external global i16* ; <i16**> [#uses=3]
+@yyvs = external global %YYSTYPE* ; <%YYSTYPE**> [#uses=1]
[email protected] = external global [13 x i8] ; <[13 x i8]*> [#uses=1]
[email protected] = external global [20 x i8] ; <[20 x i8]*> [#uses=1]
+
+define i32 @yyparse() {
+bb0:
+ store i32 0, i32* @yynerrs
+ store i32 0, i32* @yyerrflag
+ store i32 -1, i32* @yychar
+ %reg113 = load i16** @yyss ; <i16*> [#uses=1]
+ %cond581 = icmp ne i16* %reg113, null ; <i1> [#uses=1]
+ br i1 %cond581, label %bb3, label %bb2
+
+bb2: ; preds = %bb0
+ %reg584 = call i32 @yygrowstack( ) ; <i32> [#uses=1]
+ %cond584 = icmp ne i32 %reg584, 0 ; <i1> [#uses=1]
+ br i1 %cond584, label %bb113, label %bb3
+
+bb3: ; preds = %bb2, %bb0
+ %reg115 = load i16** @yyss ; <i16*> [#uses=1]
+ store i16* %reg115, i16** @yyssp
+ %reg116 = load %YYSTYPE** @yyvs ; <%YYSTYPE*> [#uses=1]
+ store %YYSTYPE* %reg116, %YYSTYPE** @yyvsp
+ %reg117 = load i16** @yyssp ; <i16*> [#uses=1]
+ store i16 0, i16* %reg117
+ br label %bb4
+
+bb4: ; preds = %bb112, %bb102, %bb35, %bb31, %bb15, %bb14, %bb3
+ %reg458 = phi i32 [ %reg476, %bb112 ], [ 1, %bb102 ], [ %reg458, %bb35 ], [ %cast768, %bb31 ], [ %cast658, %bb15 ], [ %cast658, %bb14 ], [ 0, %bb3 ] ; <i32> [#uses=2]
+ %reg458-idxcast = zext i32 %reg458 to i64 ; <i64> [#uses=3]
+ %reg594 = getelementptr [43 x i16]* @yydefred, i64 0, i64 %reg458-idxcast ; <i16*> [#uses=1]
+ %reg125 = load i16* %reg594 ; <i16> [#uses=1]
+ %cast599 = sext i16 %reg125 to i32 ; <i32> [#uses=2]
+ %cond600 = icmp ne i32 %cast599, 0 ; <i1> [#uses=1]
+ br i1 %cond600, label %bb36, label %bb5
+
+bb5: ; preds = %bb4
+ %reg127 = load i32* @yychar ; <i32> [#uses=1]
+ %cond603 = icmp sge i32 %reg127, 0 ; <i1> [#uses=1]
+ br i1 %cond603, label %bb8, label %bb6
+
+bb6: ; preds = %bb5
+ %reg607 = call i32 @yylex( ) ; <i32> [#uses=1]
+ store i32 %reg607, i32* @yychar
+ %reg129 = load i32* @yychar ; <i32> [#uses=1]
+ %cond609 = icmp sge i32 %reg129, 0 ; <i1> [#uses=1]
+ br i1 %cond609, label %bb8, label %bb7
+
+bb7: ; preds = %bb6
+ store i32 0, i32* @yychar
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb6, %bb5
+ %reg615 = getelementptr [43 x i16]* @yysindex, i64 0, i64 %reg458-idxcast ; <i16*> [#uses=1]
+ %reg137 = load i16* %reg615 ; <i16> [#uses=1]
+ %cast620 = sext i16 %reg137 to i32 ; <i32> [#uses=2]
+ %cond621 = icmp eq i32 %cast620, 0 ; <i1> [#uses=1]
+ br i1 %cond621, label %bb16, label %bb9
+
+bb9: ; preds = %bb8
+ %reg139 = load i32* @yychar ; <i32> [#uses=2]
+ %reg460 = add i32 %cast620, %reg139 ; <i32> [#uses=3]
+ %cond624 = icmp slt i32 %reg460, 0 ; <i1> [#uses=1]
+ br i1 %cond624, label %bb16, label %bb10
+
+bb10: ; preds = %bb9
+ %cond627 = icmp sgt i32 %reg460, 262 ; <i1> [#uses=1]
+ br i1 %cond627, label %bb16, label %bb11
+
+bb11: ; preds = %bb10
+ %reg460-idxcast = sext i32 %reg460 to i64 ; <i64> [#uses=2]
+ %reg632 = getelementptr [263 x i16]* @yycheck, i64 0, i64 %reg460-idxcast ; <i16*> [#uses=1]
+ %reg148 = load i16* %reg632 ; <i16> [#uses=1]
+ %cast637 = sext i16 %reg148 to i32 ; <i32> [#uses=1]
+ %cond639 = icmp ne i32 %cast637, %reg139 ; <i1> [#uses=1]
+ br i1 %cond639, label %bb16, label %bb12
+
+bb12: ; preds = %bb11
+ %reg150 = load i16** @yyssp ; <i16*> [#uses=1]
+ %cast640 = bitcast i16* %reg150 to i8* ; <i8*> [#uses=1]
+ %reg151 = load i16** @yysslim ; <i16*> [#uses=1]
+ %cast641 = bitcast i16* %reg151 to i8* ; <i8*> [#uses=1]
+ %cond642 = icmp ult i8* %cast640, %cast641 ; <i1> [#uses=1]
+ br i1 %cond642, label %bb14, label %bb13
+
+bb13: ; preds = %bb12
+ %reg644 = call i32 @yygrowstack( ) ; <i32> [#uses=1]
+ %cond644 = icmp ne i32 %reg644, 0 ; <i1> [#uses=1]
+ br i1 %cond644, label %bb113, label %bb14
+
+bb14: ; preds = %bb13, %bb12
+ %reg153 = load i16** @yyssp ; <i16*> [#uses=1]
+ %reg647 = getelementptr i16* %reg153, i64 1 ; <i16*> [#uses=2]
+ store i16* %reg647, i16** @yyssp
+ %reg653 = getelementptr [263 x i16]* @yytable, i64 0, i64 %reg460-idxcast ; <i16*> [#uses=1]
+ %reg162 = load i16* %reg653 ; <i16> [#uses=2]
+ %cast658 = sext i16 %reg162 to i32 ; <i32> [#uses=2]
+ store i16 %reg162, i16* %reg647
+ %reg164 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %reg661 = getelementptr %YYSTYPE* %reg164, i64 1 ; <%YYSTYPE*> [#uses=1]
+ store %YYSTYPE* %reg661, %YYSTYPE** @yyvsp
+ %reg167 = load %IntList* getelementptr (%YYSTYPE* @yylval, i64 0, i32 0) ; <%IntList> [#uses=1]
+ %reg661.idx1 = getelementptr %YYSTYPE* %reg164, i64 1, i32 0 ; <%IntList*> [#uses=1]
+ store %IntList %reg167, %IntList* %reg661.idx1
+ store i32 -1, i32* @yychar
+ %reg169 = load i32* @yyerrflag ; <i32> [#uses=2]
+ %cond669 = icmp sle i32 %reg169, 0 ; <i1> [#uses=1]
+ br i1 %cond669, label %bb4, label %bb15
+
+bb15: ; preds = %bb14
+ %reg171 = add i32 %reg169, -1 ; <i32> [#uses=1]
+ store i32 %reg171, i32* @yyerrflag
+ br label %bb4
+
+bb16: ; preds = %bb11, %bb10, %bb9, %bb8
+ %reg677 = getelementptr [43 x i16]* @yyrindex, i64 0, i64 %reg458-idxcast ; <i16*> [#uses=1]
+ %reg178 = load i16* %reg677 ; <i16> [#uses=1]
+ %cast682 = sext i16 %reg178 to i32 ; <i32> [#uses=2]
+ %cond683 = icmp eq i32 %cast682, 0 ; <i1> [#uses=1]
+ br i1 %cond683, label %bb21, label %bb17
+
+bb17: ; preds = %bb16
+ %reg180 = load i32* @yychar ; <i32> [#uses=2]
+ %reg463 = add i32 %cast682, %reg180 ; <i32> [#uses=3]
+ %cond686 = icmp slt i32 %reg463, 0 ; <i1> [#uses=1]
+ br i1 %cond686, label %bb21, label %bb18
+
+bb18: ; preds = %bb17
+ %cond689 = icmp sgt i32 %reg463, 262 ; <i1> [#uses=1]
+ br i1 %cond689, label %bb21, label %bb19
+
+bb19: ; preds = %bb18
+ %reg463-idxcast = sext i32 %reg463 to i64 ; <i64> [#uses=2]
+ %reg694 = getelementptr [263 x i16]* @yycheck, i64 0, i64 %reg463-idxcast ; <i16*> [#uses=1]
+ %reg189 = load i16* %reg694 ; <i16> [#uses=1]
+ %cast699 = sext i16 %reg189 to i32 ; <i32> [#uses=1]
+ %cond701 = icmp ne i32 %cast699, %reg180 ; <i1> [#uses=1]
+ br i1 %cond701, label %bb21, label %bb20
+
+bb20: ; preds = %bb19
+ %reg704 = getelementptr [263 x i16]* @yytable, i64 0, i64 %reg463-idxcast ; <i16*> [#uses=1]
+ %reg197 = load i16* %reg704 ; <i16> [#uses=1]
+ %cast709 = sext i16 %reg197 to i32 ; <i32> [#uses=1]
+ br label %bb36
+
+bb21: ; preds = %bb19, %bb18, %bb17, %bb16
+ %reg198 = load i32* @yyerrflag ; <i32> [#uses=1]
+ %cond711 = icmp ne i32 %reg198, 0 ; <i1> [#uses=1]
+ br i1 %cond711, label %bb23, label %bb22
+
+bb22: ; preds = %bb21
+ call void @yyerror( i8* getelementptr ([13 x i8]* @.LC01, i64 0, i64 0) )
+ %reg200 = load i32* @yynerrs ; <i32> [#uses=1]
+ %reg201 = add i32 %reg200, 1 ; <i32> [#uses=1]
+ store i32 %reg201, i32* @yynerrs
+ br label %bb23
+
+bb23: ; preds = %bb22, %bb21
+ %reg202 = load i32* @yyerrflag ; <i32> [#uses=1]
+ %cond719 = icmp sgt i32 %reg202, 2 ; <i1> [#uses=1]
+ br i1 %cond719, label %bb34, label %bb24
+
+bb24: ; preds = %bb23
+ store i32 3, i32* @yyerrflag
+ %reg241 = load i16** @yyss ; <i16*> [#uses=1]
+ %cast778 = bitcast i16* %reg241 to i8* ; <i8*> [#uses=1]
+ br label %bb25
+
+bb25: ; preds = %bb33, %bb24
+ %reg204 = load i16** @yyssp ; <i16*> [#uses=4]
+ %reg206 = load i16* %reg204 ; <i16> [#uses=1]
+ %reg206-idxcast = sext i16 %reg206 to i64 ; <i64> [#uses=1]
+ %reg727 = getelementptr [43 x i16]* @yysindex, i64 0, i64 %reg206-idxcast ; <i16*> [#uses=1]
+ %reg212 = load i16* %reg727 ; <i16> [#uses=2]
+ %cast732 = sext i16 %reg212 to i32 ; <i32> [#uses=2]
+ %cond733 = icmp eq i32 %cast732, 0 ; <i1> [#uses=1]
+ br i1 %cond733, label %bb32, label %bb26
+
+bb26: ; preds = %bb25
+ %reg466 = add i32 %cast732, 256 ; <i32> [#uses=2]
+ %cond736 = icmp slt i32 %reg466, 0 ; <i1> [#uses=1]
+ br i1 %cond736, label %bb32, label %bb27
+
+bb27: ; preds = %bb26
+ %cond739 = icmp sgt i32 %reg466, 262 ; <i1> [#uses=1]
+ br i1 %cond739, label %bb32, label %bb28
+
+bb28: ; preds = %bb27
+ %reg212-idxcast = sext i16 %reg212 to i64 ; <i64> [#uses=1]
+ %reg212-idxcast-offset = add i64 %reg212-idxcast, 256 ; <i64> [#uses=2]
+ %reg744 = getelementptr [263 x i16]* @yycheck, i64 0, i64 %reg212-idxcast-offset ; <i16*> [#uses=1]
+ %reg221 = load i16* %reg744 ; <i16> [#uses=1]
+ %cond748 = icmp ne i16 %reg221, 256 ; <i1> [#uses=1]
+ br i1 %cond748, label %bb32, label %bb29
+
+bb29: ; preds = %bb28
+ %cast750 = bitcast i16* %reg204 to i8* ; <i8*> [#uses=1]
+ %reg223 = load i16** @yysslim ; <i16*> [#uses=1]
+ %cast751 = bitcast i16* %reg223 to i8* ; <i8*> [#uses=1]
+ %cond752 = icmp ult i8* %cast750, %cast751 ; <i1> [#uses=1]
+ br i1 %cond752, label %bb31, label %bb30
+
+bb30: ; preds = %bb29
+ %reg754 = call i32 @yygrowstack( ) ; <i32> [#uses=1]
+ %cond754 = icmp ne i32 %reg754, 0 ; <i1> [#uses=1]
+ br i1 %cond754, label %bb113, label %bb31
+
+bb31: ; preds = %bb30, %bb29
+ %reg225 = load i16** @yyssp ; <i16*> [#uses=1]
+ %reg757 = getelementptr i16* %reg225, i64 1 ; <i16*> [#uses=2]
+ store i16* %reg757, i16** @yyssp
+ %reg763 = getelementptr [263 x i16]* @yytable, i64 0, i64 %reg212-idxcast-offset ; <i16*> [#uses=1]
+ %reg234 = load i16* %reg763 ; <i16> [#uses=2]
+ %cast768 = sext i16 %reg234 to i32 ; <i32> [#uses=1]
+ store i16 %reg234, i16* %reg757
+ %reg236 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %reg771 = getelementptr %YYSTYPE* %reg236, i64 1 ; <%YYSTYPE*> [#uses=1]
+ store %YYSTYPE* %reg771, %YYSTYPE** @yyvsp
+ %reg239 = load %IntList* getelementptr (%YYSTYPE* @yylval, i64 0, i32 0) ; <%IntList> [#uses=1]
+ %reg771.idx1 = getelementptr %YYSTYPE* %reg236, i64 1, i32 0 ; <%IntList*> [#uses=1]
+ store %IntList %reg239, %IntList* %reg771.idx1
+ br label %bb4
+
+bb32: ; preds = %bb28, %bb27, %bb26, %bb25
+ %cast777 = bitcast i16* %reg204 to i8* ; <i8*> [#uses=1]
+ %cond779 = icmp ule i8* %cast777, %cast778 ; <i1> [#uses=1]
+ br i1 %cond779, label %UnifiedExitNode, label %bb33
+
+bb33: ; preds = %bb32
+ %reg781 = getelementptr i16* %reg204, i64 -1 ; <i16*> [#uses=1]
+ store i16* %reg781, i16** @yyssp
+ %reg244 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1]
+ %reg786 = getelementptr %YYSTYPE* %reg244, i64 -1 ; <%YYSTYPE*> [#uses=1]
+ store %YYSTYPE* %reg786, %YYSTYPE** @yyvsp
+ br label %bb25
+
+bb34: ; preds = %bb23
+ %reg246 = load i32* @yychar ; <i32> [#uses=1]
+ %cond791 = icmp eq i32 %reg246, 0 ; <i1> [#uses=1]
+ br i1 %cond791, label %UnifiedExitNode, label %bb35
+
+bb35: ; preds = %bb34
+ store i32 -1, i32* @yychar
+ br label %bb4
+
+bb36: ; preds = %bb20, %bb4
+ %reg468 = phi i32 [ %cast709, %bb20 ], [ %cast599, %bb4 ] ; <i32> [#uses=31]
+ %reg468-idxcast = sext i32 %reg468 to i64 ; <i64> [#uses=2]
+ %reg796 = getelementptr [25 x i16]* @yylen, i64 0, i64 %reg468-idxcast ; <i16*> [#uses=1]
+ %reg254 = load i16* %reg796 ; <i16> [#uses=2]
+ %reg259 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1]
+ %reg254-idxcast = sext i16 %reg254 to i64 ; <i64> [#uses=1]
+ %reg254-idxcast-scale = mul i64 %reg254-idxcast, -1 ; <i64> [#uses=1]
+ %reg254-idxcast-scale-offset = add i64 %reg254-idxcast-scale, 1 ; <i64> [#uses=1]
+ %reg261.idx1 = getelementptr %YYSTYPE* %reg259, i64 %reg254-idxcast-scale-offset, i32 0 ; <%IntList*> [#uses=1]
+ %reg261 = load %IntList* %reg261.idx1 ; <%IntList> [#uses=1]
+ store %IntList %reg261, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ %cond812 = icmp eq i32 %reg468, 13 ; <i1> [#uses=1]
+ br i1 %cond812, label %bb85, label %bb37
+
+bb37: ; preds = %bb36
+ %cond814 = icmp sgt i32 %reg468, 13 ; <i1> [#uses=1]
+ br i1 %cond814, label %bb56, label %bb38
+
+bb38: ; preds = %bb37
+ %cond817 = icmp eq i32 %reg468, 7 ; <i1> [#uses=1]
+ br i1 %cond817, label %bb79, label %bb39
+
+bb39: ; preds = %bb38
+ %cond819 = icmp sgt i32 %reg468, 7 ; <i1> [#uses=1]
+ br i1 %cond819, label %bb48, label %bb40
+
+bb40: ; preds = %bb39
+ %cond822 = icmp eq i32 %reg468, 4 ; <i1> [#uses=1]
+ br i1 %cond822, label %bb76, label %bb41
+
+bb41: ; preds = %bb40
+ %cond824 = icmp sgt i32 %reg468, 4 ; <i1> [#uses=1]
+ br i1 %cond824, label %bb45, label %bb42
+
+bb42: ; preds = %bb41
+ %cond827 = icmp eq i32 %reg468, 2 ; <i1> [#uses=1]
+ br i1 %cond827, label %bb74, label %bb43
+
+bb43: ; preds = %bb42
+ %cond829 = icmp eq i32 %reg468, 3 ; <i1> [#uses=1]
+ br i1 %cond829, label %bb75, label %bb97
+
+bb45: ; preds = %bb41
+ %cond831 = icmp eq i32 %reg468, 5 ; <i1> [#uses=1]
+ br i1 %cond831, label %bb77, label %bb46
+
+bb46: ; preds = %bb45
+ %cond833 = icmp eq i32 %reg468, 6 ; <i1> [#uses=1]
+ br i1 %cond833, label %bb78, label %bb97
+
+bb48: ; preds = %bb39
+ %cond835 = icmp eq i32 %reg468, 10 ; <i1> [#uses=1]
+ br i1 %cond835, label %bb82, label %bb49
+
+bb49: ; preds = %bb48
+ %cond837 = icmp sgt i32 %reg468, 10 ; <i1> [#uses=1]
+ br i1 %cond837, label %bb53, label %bb50
+
+bb50: ; preds = %bb49
+ %cond840 = icmp eq i32 %reg468, 8 ; <i1> [#uses=1]
+ br i1 %cond840, label %bb80, label %bb51
+
+bb51: ; preds = %bb50
+ %cond842 = icmp eq i32 %reg468, 9 ; <i1> [#uses=1]
+ br i1 %cond842, label %bb81, label %bb97
+
+bb53: ; preds = %bb49
+ %cond844 = icmp eq i32 %reg468, 11 ; <i1> [#uses=1]
+ br i1 %cond844, label %bb83, label %bb54
+
+bb54: ; preds = %bb53
+ %cond846 = icmp eq i32 %reg468, 12 ; <i1> [#uses=1]
+ br i1 %cond846, label %bb84, label %bb97
+
+bb56: ; preds = %bb37
+ %cond848 = icmp eq i32 %reg468, 19 ; <i1> [#uses=1]
+ br i1 %cond848, label %bb91, label %bb57
+
+bb57: ; preds = %bb56
+ %cond850 = icmp sgt i32 %reg468, 19 ; <i1> [#uses=1]
+ br i1 %cond850, label %bb66, label %bb58
+
+bb58: ; preds = %bb57
+ %cond853 = icmp eq i32 %reg468, 16 ; <i1> [#uses=1]
+ br i1 %cond853, label %bb88, label %bb59
+
+bb59: ; preds = %bb58
+ %cond855 = icmp sgt i32 %reg468, 16 ; <i1> [#uses=1]
+ br i1 %cond855, label %bb63, label %bb60
+
+bb60: ; preds = %bb59
+ %cond858 = icmp eq i32 %reg468, 14 ; <i1> [#uses=1]
+ br i1 %cond858, label %bb86, label %bb61
+
+bb61: ; preds = %bb60
+ %cond860 = icmp eq i32 %reg468, 15 ; <i1> [#uses=1]
+ br i1 %cond860, label %bb87, label %bb97
+
+bb63: ; preds = %bb59
+ %cond862 = icmp eq i32 %reg468, 17 ; <i1> [#uses=1]
+ br i1 %cond862, label %bb89, label %bb64
+
+bb64: ; preds = %bb63
+ %cond864 = icmp eq i32 %reg468, 18 ; <i1> [#uses=1]
+ br i1 %cond864, label %bb90, label %bb97
+
+bb66: ; preds = %bb57
+ %cond866 = icmp eq i32 %reg468, 22 ; <i1> [#uses=1]
+ br i1 %cond866, label %bb94, label %bb67
+
+bb67: ; preds = %bb66
+ %cond868 = icmp sgt i32 %reg468, 22 ; <i1> [#uses=1]
+ br i1 %cond868, label %bb71, label %bb68
+
+bb68: ; preds = %bb67
+ %cond871 = icmp eq i32 %reg468, 20 ; <i1> [#uses=1]
+ br i1 %cond871, label %bb92, label %bb69
+
+bb69: ; preds = %bb68
+ %cond873 = icmp eq i32 %reg468, 21 ; <i1> [#uses=1]
+ br i1 %cond873, label %bb93, label %bb97
+
+bb71: ; preds = %bb67
+ %cond875 = icmp eq i32 %reg468, 23 ; <i1> [#uses=1]
+ br i1 %cond875, label %bb95, label %bb72
+
+bb72: ; preds = %bb71
+ %cond877 = icmp eq i32 %reg468, 24 ; <i1> [#uses=1]
+ br i1 %cond877, label %bb96, label %bb97
+
+bb74: ; preds = %bb42
+ call void @yyfinished( )
+ br label %bb97
+
+bb75: ; preds = %bb43
+ %reg262 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %reg264.idx1 = getelementptr %YYSTYPE* %reg262, i64 -2, i32 0 ; <%IntList*> [#uses=1]
+ %reg264 = load %IntList* %reg264.idx1 ; <%IntList> [#uses=1]
+ %reg265.idx = getelementptr %YYSTYPE* %reg262, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg265 = load %IntList* %reg265.idx ; <%IntList> [#uses=1]
+ %cast889 = bitcast %IntList %reg265 to %List ; <%List> [#uses=1]
+ %cast890 = bitcast %IntList %reg264 to %List ; <%List> [#uses=1]
+ call void @doSpec( %List %cast890, %List %cast889 )
+ br label %bb97
+
+bb76: ; preds = %bb40
+ store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb77: ; preds = %bb45
+ %reg269 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %cast894 = getelementptr %YYSTYPE* %reg269, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg271 = load %IntList* %cast894 ; <%IntList> [#uses=1]
+ %reg271.upgrd.1 = bitcast %IntList %reg271 to i8* ; <i8*> [#uses=1]
+ %reg272.idx1 = getelementptr %YYSTYPE* %reg269, i64 -1, i32 0 ; <%IntList*> [#uses=1]
+ %reg272 = load %IntList* %reg272.idx1 ; <%IntList> [#uses=1]
+ %cast901 = bitcast %IntList %reg272 to %List ; <%List> [#uses=1]
+ %reg901 = call %List @newList( i8* %reg271.upgrd.1, %List %cast901 ) ; <%List> [#uses=1]
+ bitcast %List %reg901 to %IntList ; <%IntList>:0 [#uses=1]
+ store %IntList %0, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb78: ; preds = %bb46
+ %reg275 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1]
+ %reg277.idx = getelementptr %YYSTYPE* %reg275, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg277 = load %IntList* %reg277.idx ; <%IntList> [#uses=1]
+ %cast907 = bitcast %IntList %reg277 to %List ; <%List> [#uses=1]
+ %reg907 = call %Arity @newArity( i32 -1, %List %cast907 ) ; <%Arity> [#uses=1]
+ bitcast %Arity %reg907 to %IntList ; <%IntList>:1 [#uses=1]
+ store %IntList %1, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb79: ; preds = %bb38
+ store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ %reg281 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1]
+ %cast912 = getelementptr %YYSTYPE* %reg281, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg282 = load %IntList* %cast912 ; <%IntList> [#uses=1]
+ %reg282.upgrd.2 = bitcast %IntList %reg282 to %List ; <%List> [#uses=1]
+ call void @doGram( %List %reg282.upgrd.2 )
+ br label %bb97
+
+bb80: ; preds = %bb50
+ store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ %reg285 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1]
+ %cast917 = getelementptr %YYSTYPE* %reg285, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg286 = load %IntList* %cast917 ; <%IntList> [#uses=1]
+ %reg286.upgrd.3 = bitcast %IntList %reg286 to i8* ; <i8*> [#uses=1]
+ call void @doStart( i8* %reg286.upgrd.3 )
+ br label %bb97
+
+bb81: ; preds = %bb51
+ store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb82: ; preds = %bb48
+ %reg290 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %cast923 = getelementptr %YYSTYPE* %reg290, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg292 = load %IntList* %cast923 ; <%IntList> [#uses=1]
+ %reg292.upgrd.4 = bitcast %IntList %reg292 to i8* ; <i8*> [#uses=1]
+ %reg293.idx1 = getelementptr %YYSTYPE* %reg290, i64 -1, i32 0 ; <%IntList*> [#uses=1]
+ %reg293 = load %IntList* %reg293.idx1 ; <%IntList> [#uses=1]
+ %cast930 = bitcast %IntList %reg293 to %List ; <%List> [#uses=1]
+ %reg930 = call %List @newList( i8* %reg292.upgrd.4, %List %cast930 ) ; <%List> [#uses=1]
+ bitcast %List %reg930 to %IntList ; <%IntList>:2 [#uses=1]
+ store %IntList %2, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb83: ; preds = %bb53
+ store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb84: ; preds = %bb54
+ %reg298 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %cast936 = getelementptr %YYSTYPE* %reg298, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg300 = load %IntList* %cast936 ; <%IntList> [#uses=1]
+ %reg300.upgrd.5 = bitcast %IntList %reg300 to i8* ; <i8*> [#uses=1]
+ %reg301.idx1 = getelementptr %YYSTYPE* %reg298, i64 -1, i32 0 ; <%IntList*> [#uses=1]
+ %reg301 = load %IntList* %reg301.idx1 ; <%IntList> [#uses=1]
+ %cast943 = bitcast %IntList %reg301 to %List ; <%List> [#uses=1]
+ %reg943 = call %List @newList( i8* %reg300.upgrd.5, %List %cast943 ) ; <%List> [#uses=1]
+ bitcast %List %reg943 to %IntList ; <%IntList>:3 [#uses=1]
+ store %IntList %3, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb85: ; preds = %bb36
+ %reg304 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %cast9521 = getelementptr %YYSTYPE* %reg304, i64 -2, i32 0 ; <%IntList*> [#uses=1]
+ %reg306 = load %IntList* %cast9521 ; <%IntList> [#uses=1]
+ %reg306.upgrd.6 = bitcast %IntList %reg306 to i8* ; <i8*> [#uses=1]
+ %cast953 = bitcast %YYSTYPE* %reg304 to i32* ; <i32*> [#uses=1]
+ %reg307 = load i32* %cast953 ; <i32> [#uses=1]
+ %reg955 = call %Binding @newBinding( i8* %reg306.upgrd.6, i32 %reg307 ) ; <%Binding> [#uses=1]
+ bitcast %Binding %reg955 to %IntList ; <%IntList>:4 [#uses=1]
+ store %IntList %4, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb86: ; preds = %bb60
+ store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb87: ; preds = %bb61
+ %reg312 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %cast961 = getelementptr %YYSTYPE* %reg312, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg314 = load %IntList* %cast961 ; <%IntList> [#uses=1]
+ %reg314.upgrd.7 = bitcast %IntList %reg314 to i8* ; <i8*> [#uses=1]
+ %reg315.idx1 = getelementptr %YYSTYPE* %reg312, i64 -1, i32 0 ; <%IntList*> [#uses=1]
+ %reg315 = load %IntList* %reg315.idx1 ; <%IntList> [#uses=1]
+ %cast968 = bitcast %IntList %reg315 to %List ; <%List> [#uses=1]
+ %reg968 = call %List @newList( i8* %reg314.upgrd.7, %List %cast968 ) ; <%List> [#uses=1]
+ bitcast %List %reg968 to %IntList ; <%IntList>:5 [#uses=1]
+ store %IntList %5, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb88: ; preds = %bb58
+ %reg318 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=4]
+ %cast9791 = getelementptr %YYSTYPE* %reg318, i64 -6, i32 0 ; <%IntList*> [#uses=1]
+ %reg322 = load %IntList* %cast9791 ; <%IntList> [#uses=1]
+ %reg322.upgrd.8 = bitcast %IntList %reg322 to i8* ; <i8*> [#uses=1]
+ %reg323.idx1 = getelementptr %YYSTYPE* %reg318, i64 -4, i32 0 ; <%IntList*> [#uses=1]
+ %reg323 = load %IntList* %reg323.idx1 ; <%IntList> [#uses=1]
+ %reg987 = getelementptr %YYSTYPE* %reg318, i64 -2 ; <%YYSTYPE*> [#uses=1]
+ %cast989 = bitcast %YYSTYPE* %reg987 to i32* ; <i32*> [#uses=1]
+ %reg324 = load i32* %cast989 ; <i32> [#uses=1]
+ %reg325.idx1 = getelementptr %YYSTYPE* %reg318, i64 -1, i32 0 ; <%IntList*> [#uses=1]
+ %reg325 = load %IntList* %reg325.idx1 ; <%IntList> [#uses=1]
+ %cast998 = bitcast %IntList %reg323 to %PatternAST ; <%PatternAST> [#uses=1]
+ %reg996 = call %RuleAST @newRuleAST( i8* %reg322.upgrd.8, %PatternAST %cast998, i32 %reg324, %IntList %reg325 ) ; <%RuleAST> [#uses=1]
+ bitcast %RuleAST %reg996 to %IntList ; <%IntList>:6 [#uses=1]
+ store %IntList %6, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb89: ; preds = %bb63
+ %reg328 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1]
+ %cast1002 = getelementptr %YYSTYPE* %reg328, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg329 = load %IntList* %cast1002 ; <%IntList> [#uses=1]
+ %reg329.upgrd.9 = bitcast %IntList %reg329 to i8* ; <i8*> [#uses=1]
+ %reg1004 = call %PatternAST @newPatternAST( i8* %reg329.upgrd.9, %List null ) ; <%PatternAST> [#uses=1]
+ bitcast %PatternAST %reg1004 to %IntList ; <%IntList>:7 [#uses=1]
+ store %IntList %7, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb90: ; preds = %bb64
+ %reg333 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %cast10131 = getelementptr %YYSTYPE* %reg333, i64 -1, i32 0 ; <%IntList*> [#uses=1]
+ %reg335 = load %IntList* %cast10131 ; <%IntList> [#uses=1]
+ %reg335.upgrd.10 = bitcast %IntList %reg335 to i8* ; <i8*> [#uses=1]
+ %reg1015 = call %List @newList( i8* %reg335.upgrd.10, %List null ) ; <%List> [#uses=1]
+ %cast10211 = getelementptr %YYSTYPE* %reg333, i64 -3, i32 0 ; <%IntList*> [#uses=1]
+ %reg338 = load %IntList* %cast10211 ; <%IntList> [#uses=1]
+ %reg338.upgrd.11 = bitcast %IntList %reg338 to i8* ; <i8*> [#uses=1]
+ %reg1023 = call %PatternAST @newPatternAST( i8* %reg338.upgrd.11, %List %reg1015 ) ; <%PatternAST> [#uses=1]
+ bitcast %PatternAST %reg1023 to %IntList ; <%IntList>:8 [#uses=1]
+ store %IntList %8, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb91: ; preds = %bb56
+ %reg341 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=3]
+ %cast10331 = getelementptr %YYSTYPE* %reg341, i64 -1, i32 0 ; <%IntList*> [#uses=1]
+ %reg344 = load %IntList* %cast10331 ; <%IntList> [#uses=1]
+ %reg344.upgrd.12 = bitcast %IntList %reg344 to i8* ; <i8*> [#uses=1]
+ %reg1035 = call %List @newList( i8* %reg344.upgrd.12, %List null ) ; <%List> [#uses=1]
+ %cast10411 = getelementptr %YYSTYPE* %reg341, i64 -3, i32 0 ; <%IntList*> [#uses=1]
+ %reg347 = load %IntList* %cast10411 ; <%IntList> [#uses=1]
+ %reg347.upgrd.13 = bitcast %IntList %reg347 to i8* ; <i8*> [#uses=1]
+ %reg1043 = call %List @newList( i8* %reg347.upgrd.13, %List %reg1035 ) ; <%List> [#uses=1]
+ %cast10491 = getelementptr %YYSTYPE* %reg341, i64 -5, i32 0 ; <%IntList*> [#uses=1]
+ %reg349 = load %IntList* %cast10491 ; <%IntList> [#uses=1]
+ %reg349.upgrd.14 = bitcast %IntList %reg349 to i8* ; <i8*> [#uses=1]
+ %reg1051 = call %PatternAST @newPatternAST( i8* %reg349.upgrd.14, %List %reg1043 ) ; <%PatternAST> [#uses=1]
+ bitcast %PatternAST %reg1051 to %IntList ; <%IntList>:9 [#uses=1]
+ store %IntList %9, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb92: ; preds = %bb68
+ store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb93: ; preds = %bb69
+ %reg354 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %reg1059 = getelementptr %YYSTYPE* %reg354, i64 -2 ; <%YYSTYPE*> [#uses=1]
+ %cast1061 = bitcast %YYSTYPE* %reg1059 to i32* ; <i32*> [#uses=1]
+ %reg356 = load i32* %cast1061 ; <i32> [#uses=1]
+ %reg357.idx1 = getelementptr %YYSTYPE* %reg354, i64 -1, i32 0 ; <%IntList*> [#uses=1]
+ %reg357 = load %IntList* %reg357.idx1 ; <%IntList> [#uses=1]
+ %reg1068 = call %IntList @newIntList( i32 %reg356, %IntList %reg357 ) ; <%IntList> [#uses=1]
+ store %IntList %reg1068, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb94: ; preds = %bb66
+ store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb95: ; preds = %bb71
+ %reg362 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %reg1076 = getelementptr %YYSTYPE* %reg362, i64 -1 ; <%YYSTYPE*> [#uses=1]
+ %cast1078 = bitcast %YYSTYPE* %reg1076 to i32* ; <i32*> [#uses=1]
+ %reg364 = load i32* %cast1078 ; <i32> [#uses=1]
+ %reg365.idx = getelementptr %YYSTYPE* %reg362, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg365 = load %IntList* %reg365.idx ; <%IntList> [#uses=1]
+ %reg1081 = call %IntList @newIntList( i32 %reg364, %IntList %reg365 ) ; <%IntList> [#uses=1]
+ store %IntList %reg1081, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb96: ; preds = %bb72
+ %reg368 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %reg1088 = getelementptr %YYSTYPE* %reg368, i64 -1 ; <%YYSTYPE*> [#uses=1]
+ %cast1090 = bitcast %YYSTYPE* %reg1088 to i32* ; <i32*> [#uses=1]
+ %reg370 = load i32* %cast1090 ; <i32> [#uses=1]
+ %reg371.idx = getelementptr %YYSTYPE* %reg368, i64 0, i32 0 ; <%IntList*> [#uses=1]
+ %reg371 = load %IntList* %reg371.idx ; <%IntList> [#uses=1]
+ %reg1093 = call %IntList @newIntList( i32 %reg370, %IntList %reg371 ) ; <%IntList> [#uses=1]
+ store %IntList %reg1093, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0)
+ br label %bb97
+
+bb97: ; preds = %bb96, %bb95, %bb94, %bb93, %bb92, %bb91, %bb90, %bb89, %bb88, %bb87, %bb86, %bb85, %bb84, %bb83, %bb82, %bb81, %bb80, %bb79, %bb78, %bb77, %bb76, %bb75, %bb74, %bb72, %bb69, %bb64, %bb61, %bb54, %bb51, %bb46, %bb43
+ %cast1097 = sext i16 %reg254 to i64 ; <i64> [#uses=3]
+ %reg375 = add i64 %cast1097, %cast1097 ; <i64> [#uses=1]
+ %reg377 = load i16** @yyssp ; <i16*> [#uses=1]
+ %cast379 = ptrtoint i16* %reg377 to i64 ; <i64> [#uses=1]
+ %reg381 = sub i64 %cast379, %reg375 ; <i64> [#uses=1]
+ %cast1099 = inttoptr i64 %reg381 to i16* ; <i16*> [#uses=1]
+ store i16* %cast1099, i16** @yyssp
+ %reg382 = load i16** @yyssp ; <i16*> [#uses=3]
+ %reg383 = load i16* %reg382 ; <i16> [#uses=1]
+ %cast1103 = sext i16 %reg383 to i32 ; <i32> [#uses=3]
+ %reg385 = mul i64 %cast1097, 8 ; <i64> [#uses=1]
+ %reg387 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1]
+ %cast389 = ptrtoint %YYSTYPE* %reg387 to i64 ; <i64> [#uses=1]
+ %reg391 = sub i64 %cast389, %reg385 ; <i64> [#uses=1]
+ %cast1108 = inttoptr i64 %reg391 to %YYSTYPE* ; <%YYSTYPE*> [#uses=1]
+ store %YYSTYPE* %cast1108, %YYSTYPE** @yyvsp
+ %reg1111 = getelementptr [25 x i16]* @yylhs, i64 0, i64 %reg468-idxcast ; <i16*> [#uses=1]
+ %reg398 = load i16* %reg1111 ; <i16> [#uses=2]
+ %cast1116 = sext i16 %reg398 to i32 ; <i32> [#uses=1]
+ %cond1117 = icmp ne i32 %cast1103, 0 ; <i1> [#uses=1]
+ br i1 %cond1117, label %bb104, label %bb98
+
+bb98: ; preds = %bb97
+ %cond1119 = icmp ne i32 %cast1116, 0 ; <i1> [#uses=1]
+ br i1 %cond1119, label %bb104, label %bb99
+
+bb99: ; preds = %bb98
+ %reg1122 = getelementptr i16* %reg382, i64 1 ; <i16*> [#uses=2]
+ store i16* %reg1122, i16** @yyssp
+ store i16 1, i16* %reg1122
+ %reg403 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %reg1128 = getelementptr %YYSTYPE* %reg403, i64 1 ; <%YYSTYPE*> [#uses=1]
+ store %YYSTYPE* %reg1128, %YYSTYPE** @yyvsp
+ %reg406 = load %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) ; <%IntList> [#uses=1]
+ %reg1128.idx1 = getelementptr %YYSTYPE* %reg403, i64 1, i32 0 ; <%IntList*> [#uses=1]
+ store %IntList %reg406, %IntList* %reg1128.idx1
+ %reg407 = load i32* @yychar ; <i32> [#uses=1]
+ %cond1135 = icmp sge i32 %reg407, 0 ; <i1> [#uses=1]
+ br i1 %cond1135, label %bb102, label %bb100
+
+bb100: ; preds = %bb99
+ %reg1139 = call i32 @yylex( ) ; <i32> [#uses=1]
+ store i32 %reg1139, i32* @yychar
+ %reg409 = load i32* @yychar ; <i32> [#uses=1]
+ %cond1141 = icmp sge i32 %reg409, 0 ; <i1> [#uses=1]
+ br i1 %cond1141, label %bb102, label %bb101
+
+bb101: ; preds = %bb100
+ store i32 0, i32* @yychar
+ br label %bb102
+
+bb102: ; preds = %bb101, %bb100, %bb99
+ %reg411 = load i32* @yychar ; <i32> [#uses=1]
+ %cond1146 = icmp ne i32 %reg411, 0 ; <i1> [#uses=1]
+ br i1 %cond1146, label %bb4, label %UnifiedExitNode
+
+bb104: ; preds = %bb98, %bb97
+ %reg398-idxcast = sext i16 %reg398 to i64 ; <i64> [#uses=2]
+ %reg1150 = getelementptr [12 x i16]* @yygindex, i64 0, i64 %reg398-idxcast ; <i16*> [#uses=1]
+ %reg418 = load i16* %reg1150 ; <i16> [#uses=1]
+ %cast1155 = sext i16 %reg418 to i32 ; <i32> [#uses=2]
+ %cond1156 = icmp eq i32 %cast1155, 0 ; <i1> [#uses=1]
+ br i1 %cond1156, label %bb109, label %bb105
+
+bb105: ; preds = %bb104
+ %reg473 = add i32 %cast1155, %cast1103 ; <i32> [#uses=3]
+ %cond1158 = icmp slt i32 %reg473, 0 ; <i1> [#uses=1]
+ br i1 %cond1158, label %bb109, label %bb106
+
+bb106: ; preds = %bb105
+ %cond1161 = icmp sgt i32 %reg473, 262 ; <i1> [#uses=1]
+ br i1 %cond1161, label %bb109, label %bb107
+
+bb107: ; preds = %bb106
+ %reg473-idxcast = sext i32 %reg473 to i64 ; <i64> [#uses=2]
+ %reg1166 = getelementptr [263 x i16]* @yycheck, i64 0, i64 %reg473-idxcast ; <i16*> [#uses=1]
+ %reg428 = load i16* %reg1166 ; <i16> [#uses=1]
+ %cast1171 = sext i16 %reg428 to i32 ; <i32> [#uses=1]
+ %cond1172 = icmp ne i32 %cast1171, %cast1103 ; <i1> [#uses=1]
+ br i1 %cond1172, label %bb109, label %bb108
+
+bb108: ; preds = %bb107
+ %reg1175 = getelementptr [263 x i16]* @yytable, i64 0, i64 %reg473-idxcast ; <i16*> [#uses=1]
+ %reg435 = load i16* %reg1175 ; <i16> [#uses=1]
+ %cast1180 = sext i16 %reg435 to i32 ; <i32> [#uses=1]
+ br label %bb110
+
+bb109: ; preds = %bb107, %bb106, %bb105, %bb104
+ %reg1183 = getelementptr [12 x i16]* @yydgoto, i64 0, i64 %reg398-idxcast ; <i16*> [#uses=1]
+ %reg442 = load i16* %reg1183 ; <i16> [#uses=1]
+ %cast1188 = sext i16 %reg442 to i32 ; <i32> [#uses=1]
+ br label %bb110
+
+bb110: ; preds = %bb109, %bb108
+ %reg476 = phi i32 [ %cast1188, %bb109 ], [ %cast1180, %bb108 ] ; <i32> [#uses=2]
+ %cast1189 = bitcast i16* %reg382 to i8* ; <i8*> [#uses=1]
+ %reg444 = load i16** @yysslim ; <i16*> [#uses=1]
+ %cast1190 = bitcast i16* %reg444 to i8* ; <i8*> [#uses=1]
+ %cond1191 = icmp ult i8* %cast1189, %cast1190 ; <i1> [#uses=1]
+ br i1 %cond1191, label %bb112, label %bb111
+
+bb111: ; preds = %bb110
+ %reg1193 = call i32 @yygrowstack( ) ; <i32> [#uses=1]
+ %cond1193 = icmp ne i32 %reg1193, 0 ; <i1> [#uses=1]
+ br i1 %cond1193, label %bb113, label %bb112
+
+bb112: ; preds = %bb111, %bb110
+ %reg446 = load i16** @yyssp ; <i16*> [#uses=1]
+ %reg1196 = getelementptr i16* %reg446, i64 1 ; <i16*> [#uses=2]
+ store i16* %reg1196, i16** @yyssp
+ %cast1357 = trunc i32 %reg476 to i16 ; <i16> [#uses=1]
+ store i16 %cast1357, i16* %reg1196
+ %reg449 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2]
+ %reg1202 = getelementptr %YYSTYPE* %reg449, i64 1 ; <%YYSTYPE*> [#uses=1]
+ store %YYSTYPE* %reg1202, %YYSTYPE** @yyvsp
+ %reg452 = load %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) ; <%IntList> [#uses=1]
+ %reg1202.idx1 = getelementptr %YYSTYPE* %reg449, i64 1, i32 0 ; <%IntList*> [#uses=1]
+ store %IntList %reg452, %IntList* %reg1202.idx1
+ br label %bb4
+
+bb113: ; preds = %bb111, %bb30, %bb13, %bb2
+ call void @yyerror( i8* getelementptr ([20 x i8]* @.LC1, i64 0, i64 0) )
+ br label %UnifiedExitNode
+
+UnifiedExitNode: ; preds = %bb113, %bb102, %bb34, %bb32
+ %UnifiedRetVal = phi i32 [ 1, %bb113 ], [ 1, %bb34 ], [ 1, %bb32 ], [ 0, %bb102 ] ; <i32> [#uses=1]
+ ret i32 %UnifiedRetVal
+}
+
+declare %List @newList(i8*, %List)
+
+declare %IntList @newIntList(i32, %IntList)
+
+declare void @doStart(i8*)
+
+declare void @yyerror(i8*)
+
+declare void @doSpec(%List, %List)
+
+declare %Arity @newArity(i32, %List)
+
+declare %Binding @newBinding(i8*, i32)
+
+declare %PatternAST @newPatternAST(i8*, %List)
+
+declare %RuleAST @newRuleAST(i8*, %PatternAST, i32, %IntList)
+
+declare void @yyfinished()
+
+declare i32 @yylex()
+
+declare void @doGram(%List)
+
+declare i32 @yygrowstack()
diff --git a/test/CodeGen/Generic/ConstantExprLowering.ll b/test/CodeGen/Generic/ConstantExprLowering.ll
new file mode 100644
index 0000000..428d712
--- /dev/null
+++ b/test/CodeGen/Generic/ConstantExprLowering.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s
+
[email protected]_1 = internal constant [16 x i8] c"%d %d %d %d %d\0A\00" ; <[16 x i8]*> [#uses=1]
+@XA = external global i32 ; <i32*> [#uses=1]
+@XB = external global i32 ; <i32*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define void @test(i32 %A, i32 %B, i32 %C, i32 %D) {
+entry:
+ %t1 = icmp slt i32 %A, 0 ; <i1> [#uses=1]
+ br i1 %t1, label %less, label %not_less
+
+less: ; preds = %entry
+ br label %not_less
+
+not_less: ; preds = %less, %entry
+ %t2 = phi i32 [ sub (i32 ptrtoint (i32* @XA to i32), i32 ptrtoint (i32* @XB to i32)), %less ], [ sub (i32 ptrtoint (i32* @XA to i32), i32 ptrtoint (i32* @XB to i32)), %entry ] ; <i32> [#uses=1]
+ %tmp.39 = call i32 (i8*, ...)* @printf( i8* getelementptr ([16 x i8]* @.str_1, i64 0, i64 0), i32 %t2 ) ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/GC/alloc_loop.ll b/test/CodeGen/Generic/GC/alloc_loop.ll
new file mode 100644
index 0000000..fb78ba2
--- /dev/null
+++ b/test/CodeGen/Generic/GC/alloc_loop.ll
@@ -0,0 +1,53 @@
+; RUN: llc < %s
+
+
+declare i8* @llvm_gc_allocate(i32)
+declare void @llvm_gc_initialize(i32)
+
+declare void @llvm.gcroot(i8**, i8*)
+declare void @llvm.gcwrite(i8*, i8*, i8**)
+
+define i32 @main() gc "shadow-stack" {
+entry:
+ %A = alloca i8*
+ %B = alloca i8**
+
+ call void @llvm_gc_initialize(i32 1048576) ; Start with 1MB heap
+
+ ;; void *A;
+ call void @llvm.gcroot(i8** %A, i8* null)
+
+ ;; A = gcalloc(10);
+ %Aptr = call i8* @llvm_gc_allocate(i32 10)
+ store i8* %Aptr, i8** %A
+
+ ;; void **B;
+ %tmp.1 = bitcast i8*** %B to i8**
+ call void @llvm.gcroot(i8** %tmp.1, i8* null)
+
+ ;; B = gcalloc(4);
+ %B.upgrd.1 = call i8* @llvm_gc_allocate(i32 8)
+ %tmp.2 = bitcast i8* %B.upgrd.1 to i8**
+ store i8** %tmp.2, i8*** %B
+
+ ;; *B = A;
+ %B.1 = load i8*** %B
+ %A.1 = load i8** %A
+ call void @llvm.gcwrite(i8* %A.1, i8* %B.upgrd.1, i8** %B.1)
+
+ br label %AllocLoop
+
+AllocLoop:
+ %i = phi i32 [ 0, %entry ], [ %indvar.next, %AllocLoop ]
+ ;; Allocated mem: allocated memory is immediately dead.
+ call i8* @llvm_gc_allocate(i32 100)
+
+ %indvar.next = add i32 %i, 1
+ %exitcond = icmp eq i32 %indvar.next, 10000000
+ br i1 %exitcond, label %Exit, label %AllocLoop
+
+Exit:
+ ret i32 0
+}
+
+declare void @__main()
diff --git a/test/CodeGen/Generic/GC/argpromotion.ll b/test/CodeGen/Generic/GC/argpromotion.ll
new file mode 100644
index 0000000..dda376d
--- /dev/null
+++ b/test/CodeGen/Generic/GC/argpromotion.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -anders-aa -argpromotion
+
+declare void @llvm.gcroot(i8**, i8*)
+
+define i32 @g() {
+entry:
+ %var = alloca i32
+ store i32 1, i32* %var
+ %x = call i32 @f(i32* %var)
+ ret i32 %x
+}
+
+define internal i32 @f(i32* %xp) gc "example" {
+entry:
+ %var = alloca i8*
+ call void @llvm.gcroot(i8** %var, i8* null)
+ %x = load i32* %xp
+ ret i32 %x
+}
diff --git a/test/CodeGen/Generic/GC/badreadproto.ll b/test/CodeGen/Generic/GC/badreadproto.ll
new file mode 100644
index 0000000..4fe90b9
--- /dev/null
+++ b/test/CodeGen/Generic/GC/badreadproto.ll
@@ -0,0 +1,13 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+ %list = type { i32, %list* }
+
+; This usage is invalid now; instead, objects must be bitcast to i8* for input
+; to the gc intrinsics.
+declare %list* @llvm.gcread(%list*, %list**)
+
+define %list* @tl(%list* %l) gc "example" {
+ %hd.ptr = getelementptr %list* %l, i32 0, i32 0
+ %hd = call %list* @llvm.gcread(%list* %l, %list** %hd.ptr)
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Generic/GC/badrootproto.ll b/test/CodeGen/Generic/GC/badrootproto.ll
new file mode 100644
index 0000000..ff86d03
--- /dev/null
+++ b/test/CodeGen/Generic/GC/badrootproto.ll
@@ -0,0 +1,13 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+ %list = type { i32, %list* }
+ %meta = type opaque
+
+; This usage is invalid now; instead, objects must be bitcast to i8* for input
+; to the gc intrinsics.
+declare void @llvm.gcroot(%list*, %meta*)
+
+define void @root() gc "example" {
+ %x.var = alloca i8*
+ call void @llvm.gcroot(i8** %x.var, %meta* null)
+}
diff --git a/test/CodeGen/Generic/GC/badwriteproto.ll b/test/CodeGen/Generic/GC/badwriteproto.ll
new file mode 100644
index 0000000..be81f84
--- /dev/null
+++ b/test/CodeGen/Generic/GC/badwriteproto.ll
@@ -0,0 +1,22 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+ %list = type { i32, %list* }
+
+; This usage is invalid now; instead, objects must be bitcast to i8* for input
+; to the gc intrinsics.
+declare void @llvm.gcwrite(%list*, %list*, %list**)
+
+define %list* @cons(i32 %hd, %list* %tl) gc "example" {
+ %tmp = call i8* @gcalloc(i32 bitcast(%list* getelementptr(%list* null, i32 1) to i32))
+ %cell = bitcast i8* %tmp to %list*
+
+ %hd.ptr = getelementptr %list* %cell, i32 0, i32 0
+ store i32 %hd, i32* %hd.ptr
+
+ %tl.ptr = getelementptr %list* %cell, i32 0, i32 0
+ call void @llvm.gcwrite(%list* %tl, %list* %cell, %list** %tl.ptr)
+
+ ret %cell.2
+}
+
+declare i8* @gcalloc(i32)
diff --git a/test/CodeGen/Generic/GC/deadargelim.ll b/test/CodeGen/Generic/GC/deadargelim.ll
new file mode 100644
index 0000000..1760190
--- /dev/null
+++ b/test/CodeGen/Generic/GC/deadargelim.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -deadargelim
+
+declare void @llvm.gcroot(i8**, i8*)
+
+define void @g() {
+entry:
+ call void @f(i32 0)
+ ret void
+}
+
+define internal void @f(i32 %unused) gc "example" {
+entry:
+ %var = alloca i8*
+ call void @llvm.gcroot(i8** %var, i8* null)
+ ret void
+}
diff --git a/test/CodeGen/Generic/GC/dg.exp b/test/CodeGen/Generic/GC/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/CodeGen/Generic/GC/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/CodeGen/Generic/GC/fat.ll b/test/CodeGen/Generic/GC/fat.ll
new file mode 100644
index 0000000..d05ca3d
--- /dev/null
+++ b/test/CodeGen/Generic/GC/fat.ll
@@ -0,0 +1,10 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+declare void @llvm.gcroot(i8**, i8*) nounwind
+
+define void @f() gc "x" {
+ %st = alloca { i8*, i1 } ; <{ i8*, i1 }*> [#uses=1]
+ %st_ptr = bitcast { i8*, i1 }* %st to i8** ; <i8**> [#uses=1]
+ call void @llvm.gcroot(i8** %st_ptr, i8* null)
+ ret void
+}
diff --git a/test/CodeGen/Generic/GC/inline.ll b/test/CodeGen/Generic/GC/inline.ll
new file mode 100644
index 0000000..9da33ae
--- /dev/null
+++ b/test/CodeGen/Generic/GC/inline.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -inline -S | grep example
+
+ %IntArray = type { i32, [0 x i32*] }
+
+declare void @llvm.gcroot(i8**, i8*) nounwind
+
+define i32 @f() {
+ %x = call i32 @g( ) ; <i32> [#uses=1]
+ ret i32 %x
+}
+
+define internal i32 @g() gc "example" {
+ %root = alloca i8* ; <i8**> [#uses=2]
+ call void @llvm.gcroot( i8** %root, i8* null )
+ %obj = call %IntArray* @h( ) ; <%IntArray*> [#uses=2]
+ %obj.2 = bitcast %IntArray* %obj to i8* ; <i8*> [#uses=1]
+ store i8* %obj.2, i8** %root
+ %Length.ptr = getelementptr %IntArray* %obj, i32 0, i32 0 ; <i32*> [#uses=1]
+ %Length = load i32* %Length.ptr ; <i32> [#uses=1]
+ ret i32 %Length
+}
+
+declare %IntArray* @h()
diff --git a/test/CodeGen/Generic/GC/inline2.ll b/test/CodeGen/Generic/GC/inline2.ll
new file mode 100644
index 0000000..1594705
--- /dev/null
+++ b/test/CodeGen/Generic/GC/inline2.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -inline -S | grep sample
+; RUN: opt < %s -inline -S | grep example
+
+ %IntArray = type { i32, [0 x i32*] }
+
+declare void @llvm.gcroot(i8**, i8*) nounwind
+
+define i32 @f() gc "sample" {
+ %x = call i32 @g( ) ; <i32> [#uses=1]
+ ret i32 %x
+}
+
+define internal i32 @g() gc "example" {
+ %root = alloca i8* ; <i8**> [#uses=2]
+ call void @llvm.gcroot( i8** %root, i8* null )
+ %obj = call %IntArray* @h( ) ; <%IntArray*> [#uses=2]
+ %obj.2 = bitcast %IntArray* %obj to i8* ; <i8*> [#uses=1]
+ store i8* %obj.2, i8** %root
+ %Length.ptr = getelementptr %IntArray* %obj, i32 0, i32 0 ; <i32*> [#uses=1]
+ %Length = load i32* %Length.ptr ; <i32> [#uses=1]
+ ret i32 %Length
+}
+
+declare %IntArray* @h()
diff --git a/test/CodeGen/Generic/GC/lower_gcroot.ll b/test/CodeGen/Generic/GC/lower_gcroot.ll
new file mode 100644
index 0000000..c2d418a
--- /dev/null
+++ b/test/CodeGen/Generic/GC/lower_gcroot.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+
+ %Env = type i8*
+
+define void @.main(%Env) gc "shadow-stack" {
+ %Root = alloca %Env
+ call void @llvm.gcroot( %Env* %Root, %Env null )
+ unreachable
+}
+
+declare void @llvm.gcroot(%Env*, %Env)
diff --git a/test/CodeGen/Generic/GC/outside.ll b/test/CodeGen/Generic/GC/outside.ll
new file mode 100644
index 0000000..2968c69
--- /dev/null
+++ b/test/CodeGen/Generic/GC/outside.ll
@@ -0,0 +1,10 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+declare void @llvm.gcroot(i8**, i8*)
+
+define void @f(i8* %x) {
+ %root = alloca i8*
+ call void @llvm.gcroot(i8** %root, i8* null)
+ store i8* %x, i8** %root
+ ret void
+}
diff --git a/test/CodeGen/Generic/GC/redundant_init.ll b/test/CodeGen/Generic/GC/redundant_init.ll
new file mode 100644
index 0000000..10c70e7
--- /dev/null
+++ b/test/CodeGen/Generic/GC/redundant_init.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 | \
+; RUN: ignore grep {movl..0} | count 0
+
+%struct.obj = type { i8*, %struct.obj* }
+
+declare void @g() gc "shadow-stack"
+
+define void @f(i8* %o) gc "shadow-stack" {
+entry:
+ %root = alloca i8*
+ call void @llvm.gcroot(i8** %root, i8* null)
+ store i8* %o, i8** %root
+ call void @g()
+ ret void
+}
+
+declare void @llvm.gcroot(i8**, i8*)
diff --git a/test/CodeGen/Generic/GC/simple_ocaml.ll b/test/CodeGen/Generic/GC/simple_ocaml.ll
new file mode 100644
index 0000000..f765dc0
--- /dev/null
+++ b/test/CodeGen/Generic/GC/simple_ocaml.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s | grep caml.*__frametable
+; RUN: llc < %s -march=x86 | grep {movl .0}
+
+%struct.obj = type { i8*, %struct.obj* }
+
+define %struct.obj* @fun(%struct.obj* %head) gc "ocaml" {
+entry:
+ %gcroot.0 = alloca i8*
+ %gcroot.1 = alloca i8*
+
+ call void @llvm.gcroot(i8** %gcroot.0, i8* null)
+ call void @llvm.gcroot(i8** %gcroot.1, i8* null)
+
+ %local.0 = bitcast i8** %gcroot.0 to %struct.obj**
+ %local.1 = bitcast i8** %gcroot.1 to %struct.obj**
+
+ store %struct.obj* %head, %struct.obj** %local.0
+ br label %bb.loop
+bb.loop:
+ %t0 = load %struct.obj** %local.0
+ %t1 = getelementptr %struct.obj* %t0, i32 0, i32 1
+ %t2 = bitcast %struct.obj* %t0 to i8*
+ %t3 = bitcast %struct.obj** %t1 to i8**
+ %t4 = call i8* @llvm.gcread(i8* %t2, i8** %t3)
+ %t5 = bitcast i8* %t4 to %struct.obj*
+ %t6 = icmp eq %struct.obj* %t5, null
+ br i1 %t6, label %bb.loop, label %bb.end
+bb.end:
+ %t7 = malloc %struct.obj
+ store %struct.obj* %t7, %struct.obj** %local.1
+ %t8 = bitcast %struct.obj* %t7 to i8*
+ %t9 = load %struct.obj** %local.0
+ %t10 = getelementptr %struct.obj* %t9, i32 0, i32 1
+ %t11 = bitcast %struct.obj* %t9 to i8*
+ %t12 = bitcast %struct.obj** %t10 to i8**
+ call void @llvm.gcwrite(i8* %t8, i8* %t11, i8** %t12)
+ ret %struct.obj* %t7
+}
+
+declare void @llvm.gcroot(i8** %value, i8* %tag)
+declare void @llvm.gcwrite(i8* %value, i8* %obj, i8** %field)
+declare i8* @llvm.gcread(i8* %obj, i8** %field)
diff --git a/test/CodeGen/Generic/Makefile b/test/CodeGen/Generic/Makefile
new file mode 100644
index 0000000..26ebc31
--- /dev/null
+++ b/test/CodeGen/Generic/Makefile
@@ -0,0 +1,23 @@
+# Makefile for running ad-hoc custom LLVM tests
+#
+%.bc: %.ll
+ llvm-as $<
+
+%.llc.s: %.bc
+ llc $< -o $@
+
+%.gcc.s: %.c
+ gcc -O0 -S $< -o $@
+
+%.nat: %.s
+ gcc -O0 -lm $< -o $@
+
+%.cbe.out: %.cbe.nat
+ ./$< > $@
+
+%.out: %.nat
+ ./$< > $@
+
+%.clean:
+ rm -f $(patsubst %.clean,%.bc,$@) $(patsubst %.clean,%.*.s,$@) \
+ $(patsubst %.clean,%.*.nat,$@) $(patsubst %.clean,%.*.out,$@)
diff --git a/test/CodeGen/Generic/add-with-overflow-24.ll b/test/CodeGen/Generic/add-with-overflow-24.ll
new file mode 100644
index 0000000..63f5a22
--- /dev/null
+++ b/test/CodeGen/Generic/add-with-overflow-24.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s
+
+@ok = internal constant [4 x i8] c"%d\0A\00"
+@no = internal constant [4 x i8] c"no\0A\00"
+
+define i1 @func1(i24 signext %v1, i24 signext %v2) nounwind {
+entry:
+ %t = call {i24, i1} @llvm.sadd.with.overflow.i24(i24 %v1, i24 %v2)
+ %sum = extractvalue {i24, i1} %t, 0
+ %sum32 = sext i24 %sum to i32
+ %obit = extractvalue {i24, i1} %t, 1
+ br i1 %obit, label %overflow, label %normal
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum32 ) nounwind
+ ret i1 true
+
+overflow:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+}
+
+define i1 @func2(i24 zeroext %v1, i24 zeroext %v2) nounwind {
+entry:
+ %t = call {i24, i1} @llvm.uadd.with.overflow.i24(i24 %v1, i24 %v2)
+ %sum = extractvalue {i24, i1} %t, 0
+ %sum32 = zext i24 %sum to i32
+ %obit = extractvalue {i24, i1} %t, 1
+ br i1 %obit, label %carry, label %normal
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum32 ) nounwind
+ ret i1 true
+
+carry:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+}
+
+declare i32 @printf(i8*, ...) nounwind
+declare {i24, i1} @llvm.sadd.with.overflow.i24(i24, i24)
+declare {i24, i1} @llvm.uadd.with.overflow.i24(i24, i24)
diff --git a/test/CodeGen/Generic/add-with-overflow.ll b/test/CodeGen/Generic/add-with-overflow.ll
new file mode 100644
index 0000000..0c2c960
--- /dev/null
+++ b/test/CodeGen/Generic/add-with-overflow.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s
+; RUN: llc < %s -fast-isel
+
+@ok = internal constant [4 x i8] c"%d\0A\00"
+@no = internal constant [4 x i8] c"no\0A\00"
+
+define i1 @func1(i32 %v1, i32 %v2) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %overflow, label %normal
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ ret i1 true
+
+overflow:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+}
+
+define i1 @func2(i32 %v1, i32 %v2) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %overflow, label %normal
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ ret i1 true
+
+overflow:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+}
+
+declare i32 @printf(i8*, ...) nounwind
+declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
+declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
diff --git a/test/CodeGen/Generic/asm-large-immediate.ll b/test/CodeGen/Generic/asm-large-immediate.ll
new file mode 100644
index 0000000..605665b
--- /dev/null
+++ b/test/CodeGen/Generic/asm-large-immediate.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s | grep 68719476738
+
+define void @test() {
+entry:
+ tail call void asm sideeffect "/* result: ${0:c} */", "i,~{dirflag},~{fpsr},~{flags}"( i64 68719476738 )
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/badCallArgLRLLVM.ll b/test/CodeGen/Generic/badCallArgLRLLVM.ll
new file mode 100644
index 0000000..4ed88df
--- /dev/null
+++ b/test/CodeGen/Generic/badCallArgLRLLVM.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s
+
+; This caused a problem because the argument of a call was defined by
+; the return value of another call that appears later in the code.
+; When processing the first call, the second call has not yet been processed
+; so no LiveRange has been created for its return value.
+;
+; llc dies in UltraSparcRegInfo::suggestRegs4CallArgs() with:
+; ERROR: In call instr, no LR for arg: 0x1009e0740
+;
+
+declare i32 @getInt(i32)
+
+define i32 @main(i32 %argc, i8** %argv) {
+bb0:
+ br label %bb2
+
+bb1: ; preds = %bb2
+ %reg222 = call i32 @getInt( i32 %reg218 ) ; <i32> [#uses=1]
+ %reg110 = add i32 %reg222, 1 ; <i32> [#uses=2]
+ %b = icmp sle i32 %reg110, 0 ; <i1> [#uses=1]
+ br i1 %b, label %bb2, label %bb3
+
+bb2: ; preds = %bb1, %bb0
+ %reg218 = call i32 @getInt( i32 %argc ) ; <i32> [#uses=1]
+ br label %bb1
+
+bb3: ; preds = %bb1
+ ret i32 %reg110
+}
+
diff --git a/test/CodeGen/Generic/badFoldGEP.ll b/test/CodeGen/Generic/badFoldGEP.ll
new file mode 100644
index 0000000..2d4474b
--- /dev/null
+++ b/test/CodeGen/Generic/badFoldGEP.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s
+
+;; GetMemInstArgs() folded the two getElementPtr instructions together,
+;; producing an illegal getElementPtr. That's because the type generated
+;; by the last index for the first one is a structure field, not an array
+;; element, and the second one indexes off that structure field.
+;; The code is legal but not type-safe and the two GEPs should not be folded.
+;;
+;; This code fragment is from Spec/CINT2000/197.parser/197.parser.bc,
+;; file post_process.c, function build_domain().
+;; (Modified to replace store with load and return load value.)
+;;
+ %Domain = type { i8*, i32, i32*, i32, i32, i32*, %Domain* }
+@domain_array = external global [497 x %Domain] ; <[497 x %Domain]*> [#uses=2]
+
+declare void @opaque([497 x %Domain]*)
+
+define i32 @main(i32 %argc, i8** %argv) {
+bb0:
+ call void @opaque( [497 x %Domain]* @domain_array )
+ %cann-indvar-idxcast = sext i32 %argc to i64 ; <i64> [#uses=1]
+ %reg841 = getelementptr [497 x %Domain]* @domain_array, i64 0, i64 %cann-indvar-idxcast, i32 3 ; <i32*> [#uses=1]
+ %reg846 = getelementptr i32* %reg841, i64 1 ; <i32*> [#uses=1]
+ %reg820 = load i32* %reg846 ; <i32> [#uses=1]
+ ret i32 %reg820
+}
+
diff --git a/test/CodeGen/Generic/badarg6.ll b/test/CodeGen/Generic/badarg6.ll
new file mode 100644
index 0000000..d6e5ac5
--- /dev/null
+++ b/test/CodeGen/Generic/badarg6.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s
+
+; On this code, llc did not pass the sixth argument (%reg321) to printf.
+; It passed the first five in %o0 - %o4, but never initialized %o5.
[email protected] = internal global [44 x i8] c"\09\09M = %g, I = %g, V = %g\0A\09\09O = %g, E = %g\0A\0A\00" ; <[44 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+declare double @opaque(double)
+
+define i32 @main(i32 %argc, i8** %argv) {
+bb25:
+ %b = icmp sle i32 %argc, 2 ; <i1> [#uses=1]
+ br i1 %b, label %bb42, label %bb43
+
+bb42: ; preds = %bb25
+ %reg315 = call double @opaque( double 3.000000e+00 ) ; <double> [#uses=1]
+ %reg316 = call double @opaque( double 3.100000e+00 ) ; <double> [#uses=1]
+ %reg317 = call double @opaque( double 3.200000e+00 ) ; <double> [#uses=1]
+ %reg318 = call double @opaque( double 3.300000e+00 ) ; <double> [#uses=1]
+ %reg319 = call double @opaque( double 3.400000e+00 ) ; <double> [#uses=1]
+ br label %bb43
+
+bb43: ; preds = %bb42, %bb25
+ %reg321 = phi double [ 2.000000e-01, %bb25 ], [ %reg315, %bb42 ] ; <double> [#uses=1]
+ %reg322 = phi double [ 6.000000e+00, %bb25 ], [ %reg316, %bb42 ] ; <double> [#uses=1]
+ %reg323 = phi double [ -1.000000e+00, %bb25 ], [ %reg317, %bb42 ] ; <double> [#uses=1]
+ %reg324 = phi double [ -1.000000e+00, %bb25 ], [ %reg318, %bb42 ] ; <double> [#uses=1]
+ %reg325 = phi double [ 1.000000e+00, %bb25 ], [ %reg319, %bb42 ] ; <double> [#uses=1]
+ %reg609 = call i32 (i8*, ...)* @printf( i8* getelementptr ([44 x i8]* @.LC12, i64 0, i64 0), double %reg325, double %reg324, double %reg323, double %reg322, double %reg321 ) ; <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/badlive.ll b/test/CodeGen/Generic/badlive.ll
new file mode 100644
index 0000000..43b03e31
--- /dev/null
+++ b/test/CodeGen/Generic/badlive.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s
+
+define i32 @main() {
+bb0:
+ %reg109 = malloc i32, i32 100 ; <i32*> [#uses=2]
+ br label %bb2
+
+bb2: ; preds = %bb2, %bb0
+ %cann-indvar1 = phi i32 [ 0, %bb0 ], [ %add1-indvar1, %bb2 ] ; <i32> [#uses=2]
+ %reg127 = mul i32 %cann-indvar1, 2 ; <i32> [#uses=1]
+ %add1-indvar1 = add i32 %cann-indvar1, 1 ; <i32> [#uses=1]
+ store i32 999, i32* %reg109
+ %cond1015 = icmp sle i32 1, 99 ; <i1> [#uses=1]
+ %reg128 = add i32 %reg127, 2 ; <i32> [#uses=0]
+ br i1 %cond1015, label %bb2, label %bb4
+
+bb4: ; preds = %bb4, %bb2
+ %cann-indvar = phi i32 [ %add1-indvar, %bb4 ], [ 0, %bb2 ] ; <i32> [#uses=1]
+ %add1-indvar = add i32 %cann-indvar, 1 ; <i32> [#uses=2]
+ store i32 333, i32* %reg109
+ %reg131 = add i32 %add1-indvar, 3 ; <i32> [#uses=1]
+ %cond1017 = icmp ule i32 %reg131, 99 ; <i1> [#uses=1]
+ br i1 %cond1017, label %bb4, label %bb5
+
+bb5: ; preds = %bb4
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/bool-to-double.ll b/test/CodeGen/Generic/bool-to-double.ll
new file mode 100644
index 0000000..81350a4
--- /dev/null
+++ b/test/CodeGen/Generic/bool-to-double.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s
+define double @test(i1 %X) {
+ %Y = uitofp i1 %X to double ; <double> [#uses=1]
+ ret double %Y
+}
+
diff --git a/test/CodeGen/Generic/bool-vector.ll b/test/CodeGen/Generic/bool-vector.ll
new file mode 100644
index 0000000..4758697
--- /dev/null
+++ b/test/CodeGen/Generic/bool-vector.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+; PR1845
+
+define void @boolVectorSelect(<4 x i1>* %boolVectorPtr) {
+Body:
+ %castPtr = bitcast <4 x i1>* %boolVectorPtr to <4 x i1>*
+ %someBools = load <4 x i1>* %castPtr, align 1 ; <<4 x i1>>
+ %internal = alloca <4 x i1>, align 16 ; <<4 x i1>*> [#uses=1]
+ store <4 x i1> %someBools, <4 x i1>* %internal, align 1
+ ret void
+}
diff --git a/test/CodeGen/Generic/call-ret0.ll b/test/CodeGen/Generic/call-ret0.ll
new file mode 100644
index 0000000..a8e00cd5
--- /dev/null
+++ b/test/CodeGen/Generic/call-ret0.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s
+define i32 @foo(i32 %x) {
+ ret i32 %x
+}
+
+define i32 @main() {
+ %r = call i32 @foo( i32 0 ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
diff --git a/test/CodeGen/Generic/call-ret42.ll b/test/CodeGen/Generic/call-ret42.ll
new file mode 100644
index 0000000..95cc286
--- /dev/null
+++ b/test/CodeGen/Generic/call-ret42.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s
+
+define i32 @foo(i32 %x) {
+ ret i32 42
+}
+
+define i32 @main() {
+ %r = call i32 @foo( i32 15 ) ; <i32> [#uses=1]
+ ret i32 %r
+}
diff --git a/test/CodeGen/Generic/call-void.ll b/test/CodeGen/Generic/call-void.ll
new file mode 100644
index 0000000..9ed4179
--- /dev/null
+++ b/test/CodeGen/Generic/call-void.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+
+define void @foo() {
+ ret void
+}
+
+define i32 @main() {
+ call void @foo( )
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/call2-ret0.ll b/test/CodeGen/Generic/call2-ret0.ll
new file mode 100644
index 0000000..4e57ef8
--- /dev/null
+++ b/test/CodeGen/Generic/call2-ret0.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s
+
+define i32 @bar(i32 %x) {
+ ret i32 0
+}
+
+define i32 @foo(i32 %x) {
+ %q = call i32 @bar( i32 1 ) ; <i32> [#uses=1]
+ ret i32 %q
+}
+
+define i32 @main() {
+ %r = call i32 @foo( i32 2 ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
diff --git a/test/CodeGen/Generic/cast-fp.ll b/test/CodeGen/Generic/cast-fp.ll
new file mode 100644
index 0000000..590b7ce
--- /dev/null
+++ b/test/CodeGen/Generic/cast-fp.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s
+@a_fstr = internal constant [8 x i8] c"a = %f\0A\00" ; <[8 x i8]*> [#uses=1]
+@a_lstr = internal constant [10 x i8] c"a = %lld\0A\00" ; <[10 x i8]*> [#uses=1]
+@a_dstr = internal constant [8 x i8] c"a = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@b_dstr = internal constant [8 x i8] c"b = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@b_fstr = internal constant [8 x i8] c"b = %f\0A\00" ; <[8 x i8]*> [#uses=1]
+@A = global double 2.000000e+00 ; <double*> [#uses=1]
+@B = global i32 2 ; <i32*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %a = load double* @A ; <double> [#uses=4]
+ %a_fs = getelementptr [8 x i8]* @a_fstr, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_fs, double %a ) ; <i32>:1 [#uses=0]
+ %a_d2l = fptosi double %a to i64 ; <i64> [#uses=1]
+ %a_ls = getelementptr [10 x i8]* @a_lstr, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_ls, i64 %a_d2l ) ; <i32>:2 [#uses=0]
+ %a_d2i = fptosi double %a to i32 ; <i32> [#uses=2]
+ %a_ds = getelementptr [8 x i8]* @a_dstr, i64 0, i64 0 ; <i8*> [#uses=3]
+ call i32 (i8*, ...)* @printf( i8* %a_ds, i32 %a_d2i ) ; <i32>:3 [#uses=0]
+ %a_d2sb = fptosi double %a to i8 ; <i8> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_ds, i8 %a_d2sb ) ; <i32>:4 [#uses=0]
+ %a_d2i2sb = trunc i32 %a_d2i to i8 ; <i8> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_ds, i8 %a_d2i2sb ) ; <i32>:5 [#uses=0]
+ %b = load i32* @B ; <i32> [#uses=2]
+ %b_ds = getelementptr [8 x i8]* @b_dstr, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %b_ds, i32 %b ) ; <i32>:6 [#uses=0]
+ %b_i2d = sitofp i32 %b to double ; <double> [#uses=1]
+ %b_fs = getelementptr [8 x i8]* @b_fstr, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %b_fs, double %b_i2d ) ; <i32>:7 [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/constindices.ll b/test/CodeGen/Generic/constindices.ll
new file mode 100644
index 0000000..7deb30f
--- /dev/null
+++ b/test/CodeGen/Generic/constindices.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s
+
+; Test that a sequence of constant indices are folded correctly
+; into the equivalent offset at compile-time.
+
+ %MixedA = type { float, [15 x i32], i8, float }
+ %MixedB = type { float, %MixedA, float }
+@fmtArg = internal global [44 x i8] c"sqrt(2) = %g\0Aexp(1) = %g\0Api = %g\0Afive = %g\0A\00" ; <[44 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %ScalarA = alloca %MixedA ; <%MixedA*> [#uses=1]
+ %ScalarB = alloca %MixedB ; <%MixedB*> [#uses=1]
+ %ArrayA = alloca %MixedA, i32 4 ; <%MixedA*> [#uses=3]
+ %ArrayB = alloca %MixedB, i32 3 ; <%MixedB*> [#uses=2]
+ %I1 = getelementptr %MixedA* %ScalarA, i64 0, i32 0 ; <float*> [#uses=2]
+ store float 0x3FF6A09020000000, float* %I1
+ %I2 = getelementptr %MixedB* %ScalarB, i64 0, i32 1, i32 0 ; <float*> [#uses=2]
+ store float 0x4005BF1420000000, float* %I2
+ %fptrA = getelementptr %MixedA* %ArrayA, i64 1, i32 0 ; <float*> [#uses=1]
+ %fptrB = getelementptr %MixedB* %ArrayB, i64 2, i32 1, i32 0 ; <float*> [#uses=1]
+ store float 0x400921CAC0000000, float* %fptrA
+ store float 5.000000e+00, float* %fptrB
+
+ ;; Test that a sequence of GEPs with constant indices are folded right
+ %fptrA1 = getelementptr %MixedA* %ArrayA, i64 3 ; <%MixedA*> [#uses=1]
+ %fptrA2 = getelementptr %MixedA* %fptrA1, i64 0, i32 1 ; <[15 x i32]*> [#uses=1]
+ %fptrA3 = getelementptr [15 x i32]* %fptrA2, i64 0, i64 8 ; <i32*> [#uses=1]
+ store i32 5, i32* %fptrA3
+ %sqrtTwo = load float* %I1 ; <float> [#uses=1]
+ %exp = load float* %I2 ; <float> [#uses=1]
+ %I3 = getelementptr %MixedA* %ArrayA, i64 1, i32 0 ; <float*> [#uses=1]
+ %pi = load float* %I3 ; <float> [#uses=1]
+ %I4 = getelementptr %MixedB* %ArrayB, i64 2, i32 1, i32 0 ; <float*> [#uses=1]
+ %five = load float* %I4 ; <float> [#uses=1]
+ %dsqrtTwo = fpext float %sqrtTwo to double ; <double> [#uses=1]
+ %dexp = fpext float %exp to double ; <double> [#uses=1]
+ %dpi = fpext float %pi to double ; <double> [#uses=1]
+ %dfive = fpext float %five to double ; <double> [#uses=1]
+ %castFmt = getelementptr [44 x i8]* @fmtArg, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %castFmt, double %dsqrtTwo, double %dexp, double %dpi, double %dfive ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/debug-info.ll b/test/CodeGen/Generic/debug-info.ll
new file mode 100644
index 0000000..20d9f91
--- /dev/null
+++ b/test/CodeGen/Generic/debug-info.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s
+
+ %lldb.compile_unit = type { i32, i16, i16, i8*, i8*, i8*, { }* }
[email protected]_unit7 = external global %lldb.compile_unit ; <%lldb.compile_unit*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, %lldb.compile_unit*)
+
+define void @rb_raise(i32, ...) {
+entry:
+ br i1 false, label %strlen.exit, label %no_exit.i
+
+no_exit.i: ; preds = %entry
+ ret void
+
+strlen.exit: ; preds = %entry
+ call void @llvm.dbg.stoppoint( i32 4358, i32 0, %lldb.compile_unit* @d.compile_unit7 )
+ unreachable
+}
+
diff --git a/test/CodeGen/Generic/dg.exp b/test/CodeGen/Generic/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/CodeGen/Generic/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/CodeGen/Generic/div-neg-power-2.ll b/test/CodeGen/Generic/div-neg-power-2.ll
new file mode 100644
index 0000000..246cd03
--- /dev/null
+++ b/test/CodeGen/Generic/div-neg-power-2.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s
+
+define i32 @test(i32 %X) {
+ %Y = sdiv i32 %X, -2 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/CodeGen/Generic/empty-load-store.ll b/test/CodeGen/Generic/empty-load-store.ll
new file mode 100644
index 0000000..bca7305
--- /dev/null
+++ b/test/CodeGen/Generic/empty-load-store.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s
+; PR2612
+
+@current_foo = internal global { } zeroinitializer
+
+define i32 @foo() {
+entry:
+ %retval = alloca i32
+ store i32 0, i32* %retval
+ %local_foo = alloca { }
+ load { }* @current_foo
+ store { } %0, { }* %local_foo
+ br label %return
+
+return:
+ load i32* %retval
+ ret i32 %1
+}
diff --git a/test/CodeGen/Generic/externally_available.ll b/test/CodeGen/Generic/externally_available.ll
new file mode 100644
index 0000000..7976cc9
--- /dev/null
+++ b/test/CodeGen/Generic/externally_available.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s | not grep test_
+
+; test_function should not be emitted to the .s file.
+define available_externally i32 @test_function() {
+ ret i32 4
+}
+
+; test_global should not be emitted to the .s file.
+@test_global = available_externally global i32 4
+
diff --git a/test/CodeGen/Generic/fastcall.ll b/test/CodeGen/Generic/fastcall.ll
new file mode 100644
index 0000000..35e04f1
--- /dev/null
+++ b/test/CodeGen/Generic/fastcall.ll
@@ -0,0 +1,14 @@
+; Test fastcc works. Test from bug 2770.
+; RUN: llc < %s -relocation-model=pic
+
+
+%struct.__gcov_var = type { i32 }
+@__gcov_var = external global %struct.__gcov_var
+
+define fastcc void @gcov_read_words(i32 %words) {
+entry:
+ store i32 %words, i32* getelementptr (%struct.__gcov_var*
+@__gcov_var,
+i32 0, i32 0)
+ ret void
+}
diff --git a/test/CodeGen/Generic/fneg-fabs.ll b/test/CodeGen/Generic/fneg-fabs.ll
new file mode 100644
index 0000000..2f2f597
--- /dev/null
+++ b/test/CodeGen/Generic/fneg-fabs.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s
+
+define double @fneg(double %X) {
+ %Y = fsub double -0.000000e+00, %X ; <double> [#uses=1]
+ ret double %Y
+}
+
+define float @fnegf(float %X) {
+ %Y = fsub float -0.000000e+00, %X ; <float> [#uses=1]
+ ret float %Y
+}
+
+declare double @fabs(double)
+
+declare float @fabsf(float)
+
+define double @fabstest(double %X) {
+ %Y = call double @fabs( double %X ) ; <double> [#uses=1]
+ ret double %Y
+}
+
+define float @fabsftest(float %X) {
+ %Y = call float @fabsf( float %X ) ; <float> [#uses=1]
+ ret float %Y
+}
+
diff --git a/test/CodeGen/Generic/fp-to-int-invalid.ll b/test/CodeGen/Generic/fp-to-int-invalid.ll
new file mode 100644
index 0000000..cdcc3a2
--- /dev/null
+++ b/test/CodeGen/Generic/fp-to-int-invalid.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s
+; PR4057
+define void @test_cast_float_to_char(i8* %result) nounwind {
+entry:
+ %result_addr = alloca i8* ; <i8**> [#uses=2]
+ %test = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i8* %result, i8** %result_addr
+ store float 0x40B2AFA160000000, float* %test, align 4
+ %0 = load float* %test, align 4 ; <float> [#uses=1]
+ %1 = fptosi float %0 to i8 ; <i8> [#uses=1]
+ %2 = load i8** %result_addr, align 4 ; <i8*> [#uses=1]
+ store i8 %1, i8* %2, align 1
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/Generic/fp_to_int.ll b/test/CodeGen/Generic/fp_to_int.ll
new file mode 100644
index 0000000..ad94413
--- /dev/null
+++ b/test/CodeGen/Generic/fp_to_int.ll
@@ -0,0 +1,81 @@
+; RUN: llc < %s
+
+define i8 @test1(double %X) {
+ %tmp.1 = fptosi double %X to i8 ; <i8> [#uses=1]
+ ret i8 %tmp.1
+}
+
+define i16 @test2(double %X) {
+ %tmp.1 = fptosi double %X to i16 ; <i16> [#uses=1]
+ ret i16 %tmp.1
+}
+
+define i32 @test3(double %X) {
+ %tmp.1 = fptosi double %X to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
+define i64 @test4(double %X) {
+ %tmp.1 = fptosi double %X to i64 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i8 @test1u(double %X) {
+ %tmp.1 = fptoui double %X to i8 ; <i8> [#uses=1]
+ ret i8 %tmp.1
+}
+
+define i16 @test2u(double %X) {
+ %tmp.1 = fptoui double %X to i16 ; <i16> [#uses=1]
+ ret i16 %tmp.1
+}
+
+define i32 @test3u(double %X) {
+ %tmp.1 = fptoui double %X to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
+define i64 @test4u(double %X) {
+ %tmp.1 = fptoui double %X to i64 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i8 @test1f(float %X) {
+ %tmp.1 = fptosi float %X to i8 ; <i8> [#uses=1]
+ ret i8 %tmp.1
+}
+
+define i16 @test2f(float %X) {
+ %tmp.1 = fptosi float %X to i16 ; <i16> [#uses=1]
+ ret i16 %tmp.1
+}
+
+define i32 @test3f(float %X) {
+ %tmp.1 = fptosi float %X to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
+define i64 @test4f(float %X) {
+ %tmp.1 = fptosi float %X to i64 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i8 @test1uf(float %X) {
+ %tmp.1 = fptoui float %X to i8 ; <i8> [#uses=1]
+ ret i8 %tmp.1
+}
+
+define i16 @test2uf(float %X) {
+ %tmp.1 = fptoui float %X to i16 ; <i16> [#uses=1]
+ ret i16 %tmp.1
+}
+
+define i32 @test3uf(float %X) {
+ %tmp.1 = fptoui float %X to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
+define i64 @test4uf(float %X) {
+ %tmp.1 = fptoui float %X to i64 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
diff --git a/test/CodeGen/Generic/fpowi-promote.ll b/test/CodeGen/Generic/fpowi-promote.ll
new file mode 100644
index 0000000..8dacebe
--- /dev/null
+++ b/test/CodeGen/Generic/fpowi-promote.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+
+; PR1239
+
+define float @test(float %tmp23302331, i32 %tmp23282329 ) {
+
+%tmp2339 = call float @llvm.powi.f32( float %tmp23302331, i32 %tmp23282329 )
+ ret float %tmp2339
+}
+
+declare float @llvm.powi.f32(float,i32)
diff --git a/test/CodeGen/Generic/fwdtwice.ll b/test/CodeGen/Generic/fwdtwice.ll
new file mode 100644
index 0000000..6b38f04
--- /dev/null
+++ b/test/CodeGen/Generic/fwdtwice.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s
+
+;;
+;; Test the sequence:
+;; cast -> setle 0, %cast -> br %cond
+;; This sequence should cause the cast value to be forwarded twice,
+;; i.e., cast is forwarded to the setle and the setle is forwarded
+;; to the branch.
+;; register argument of the "branch-on-register" instruction, i.e.,
+;;
+;; This produces the bogus output instruction:
+;; brlez <NULL VALUE>, .L_SumArray_bb3.
+;; This came from %bb1 of sumarrray.ll generated from sumarray.c.
+
+define i32 @SumArray(i32 %Num) {
+ %Num.upgrd.1 = alloca i32 ; <i32*> [#uses=2]
+ br label %Top
+
+Top: ; preds = %Top, %0
+ store i32 %Num, i32* %Num.upgrd.1
+ %reg108 = load i32* %Num.upgrd.1 ; <i32> [#uses=1]
+ %cast1006 = bitcast i32 %reg108 to i32 ; <i32> [#uses=1]
+ %cond1001 = icmp ule i32 %cast1006, 0 ; <i1> [#uses=1]
+ br i1 %cond1001, label %bb6, label %Top
+
+bb6: ; preds = %Top
+ ret i32 42
+}
+
diff --git a/test/CodeGen/Generic/getresult-undef.ll b/test/CodeGen/Generic/getresult-undef.ll
new file mode 100644
index 0000000..c675535
--- /dev/null
+++ b/test/CodeGen/Generic/getresult-undef.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s
+
+define double @foo() {
+ %t = getresult {double, double} undef, 1
+ ret double %t
+}
diff --git a/test/CodeGen/Generic/global-ret0.ll b/test/CodeGen/Generic/global-ret0.ll
new file mode 100644
index 0000000..74bff87
--- /dev/null
+++ b/test/CodeGen/Generic/global-ret0.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s
+
+@g = global i32 0 ; <i32*> [#uses=1]
+
+define i32 @main() {
+ %h = load i32* @g ; <i32> [#uses=1]
+ ret i32 %h
+}
diff --git a/test/CodeGen/Generic/hello.ll b/test/CodeGen/Generic/hello.ll
new file mode 100644
index 0000000..705945c
--- /dev/null
+++ b/test/CodeGen/Generic/hello.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+
[email protected]_1 = internal constant [7 x i8] c"hello\0A\00" ; <[7 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %s = getelementptr [7 x i8]* @.str_1, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %s ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/i128-addsub.ll b/test/CodeGen/Generic/i128-addsub.ll
new file mode 100644
index 0000000..e7cbf4a
--- /dev/null
+++ b/test/CodeGen/Generic/i128-addsub.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s
+
+define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
+entry:
+ %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1]
+ %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
+ %tmp4 = shl i128 %tmp23, 64 ; <i128> [#uses=1]
+ %tmp5 = or i128 %tmp4, %tmp1 ; <i128> [#uses=1]
+ %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1]
+ %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1]
+ %tmp11 = shl i128 %tmp89, 64 ; <i128> [#uses=1]
+ %tmp12 = or i128 %tmp11, %tmp67 ; <i128> [#uses=1]
+ %tmp15 = add i128 %tmp12, %tmp5 ; <i128> [#uses=2]
+ %tmp1617 = trunc i128 %tmp15 to i64 ; <i64> [#uses=1]
+ store i64 %tmp1617, i64* %RL
+ %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
+ %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
+ store i64 %tmp2122, i64* %RH
+ ret void
+}
+
+define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
+entry:
+ %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1]
+ %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
+ %tmp4 = shl i128 %tmp23, 64 ; <i128> [#uses=1]
+ %tmp5 = or i128 %tmp4, %tmp1 ; <i128> [#uses=1]
+ %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1]
+ %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1]
+ %tmp11 = shl i128 %tmp89, 64 ; <i128> [#uses=1]
+ %tmp12 = or i128 %tmp11, %tmp67 ; <i128> [#uses=1]
+ %tmp15 = sub i128 %tmp5, %tmp12 ; <i128> [#uses=2]
+ %tmp1617 = trunc i128 %tmp15 to i64 ; <i64> [#uses=1]
+ store i64 %tmp1617, i64* %RL
+ %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
+ %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
+ store i64 %tmp2122, i64* %RH
+ ret void
+}
diff --git a/test/CodeGen/Generic/i128-arith.ll b/test/CodeGen/Generic/i128-arith.ll
new file mode 100644
index 0000000..cf10463
--- /dev/null
+++ b/test/CodeGen/Generic/i128-arith.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+
+define i64 @foo(i64 %x, i64 %y, i32 %amt) {
+ %tmp0 = zext i64 %x to i128
+ %tmp1 = sext i64 %y to i128
+ %tmp2 = or i128 %tmp0, %tmp1
+ %tmp7 = zext i32 13 to i128
+ %tmp3 = lshr i128 %tmp2, %tmp7
+ %tmp4 = trunc i128 %tmp3 to i64
+ ret i64 %tmp4
+}
diff --git a/test/CodeGen/Generic/inline-asm-special-strings.ll b/test/CodeGen/Generic/inline-asm-special-strings.ll
new file mode 100644
index 0000000..d18221e
--- /dev/null
+++ b/test/CodeGen/Generic/inline-asm-special-strings.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s | grep "foo 0 0"
+
+define void @bar() nounwind {
+ tail call void asm sideeffect "foo ${:uid} ${:uid}", ""() nounwind
+ ret void
+}
diff --git a/test/CodeGen/Generic/intrinsics.ll b/test/CodeGen/Generic/intrinsics.ll
new file mode 100644
index 0000000..29bc499
--- /dev/null
+++ b/test/CodeGen/Generic/intrinsics.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s
+
+;; SQRT
+declare float @llvm.sqrt.f32(float)
+
+declare double @llvm.sqrt.f64(double)
+
+define double @test_sqrt(float %F) {
+ %G = call float @llvm.sqrt.f32( float %F ) ; <float> [#uses=1]
+ %H = fpext float %G to double ; <double> [#uses=1]
+ %I = call double @llvm.sqrt.f64( double %H ) ; <double> [#uses=1]
+ ret double %I
+}
+
+
+; SIN
+declare float @sinf(float) readonly
+
+declare double @sin(double) readonly
+
+define double @test_sin(float %F) {
+ %G = call float @sinf( float %F ) ; <float> [#uses=1]
+ %H = fpext float %G to double ; <double> [#uses=1]
+ %I = call double @sin( double %H ) ; <double> [#uses=1]
+ ret double %I
+}
+
+
+; COS
+declare float @cosf(float) readonly
+
+declare double @cos(double) readonly
+
+define double @test_cos(float %F) {
+ %G = call float @cosf( float %F ) ; <float> [#uses=1]
+ %H = fpext float %G to double ; <double> [#uses=1]
+ %I = call double @cos( double %H ) ; <double> [#uses=1]
+ ret double %I
+}
+
diff --git a/test/CodeGen/Generic/invalid-memcpy.ll b/test/CodeGen/Generic/invalid-memcpy.ll
new file mode 100644
index 0000000..8448565
--- /dev/null
+++ b/test/CodeGen/Generic/invalid-memcpy.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s
+
+; This testcase is invalid (the alignment specified for memcpy is
+; greater than the alignment guaranteed for Qux or C.0.1173), but it
+; should compile, not crash the code generator.
+
[email protected] = external constant [33 x i8] ; <[33 x i8]*> [#uses=1]
+
+define void @Bork() {
+entry:
+ %Qux = alloca [33 x i8] ; <[33 x i8]*> [#uses=1]
+ %Qux1 = bitcast [33 x i8]* %Qux to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i64( i8* %Qux1, i8* getelementptr ([33 x i8]* @C.0.1173, i32 0, i32 0), i64 33, i32 8 )
+ ret void
+}
+
+declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
+
+
diff --git a/test/CodeGen/Generic/isunord.ll b/test/CodeGen/Generic/isunord.ll
new file mode 100644
index 0000000..ebbba01
--- /dev/null
+++ b/test/CodeGen/Generic/isunord.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s
+
+declare i1 @llvm.isunordered.f64(double, double)
+
+define i1 @test(double %X, double %Y) {
+ %tmp27 = fcmp uno double %X, %Y ; <i1> [#uses=1]
+ ret i1 %tmp27
+}
+
diff --git a/test/CodeGen/Generic/llvm-ct-intrinsics.ll b/test/CodeGen/Generic/llvm-ct-intrinsics.ll
new file mode 100644
index 0000000..1db7549
--- /dev/null
+++ b/test/CodeGen/Generic/llvm-ct-intrinsics.ll
@@ -0,0 +1,62 @@
+; Make sure this testcase is supported by all code generators
+; RUN: llc < %s
+
+declare i64 @llvm.ctpop.i64(i64)
+
+declare i32 @llvm.ctpop.i32(i32)
+
+declare i16 @llvm.ctpop.i16(i16)
+
+declare i8 @llvm.ctpop.i8(i8)
+
+define void @ctpoptest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
+ %a = call i8 @llvm.ctpop.i8( i8 %A ) ; <i8> [#uses=1]
+ %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
+ %c = call i32 @llvm.ctpop.i32( i32 %C ) ; <i32> [#uses=1]
+ %d = call i64 @llvm.ctpop.i64( i64 %D ) ; <i64> [#uses=1]
+ store i8 %a, i8* %AP
+ store i16 %b, i16* %BP
+ store i32 %c, i32* %CP
+ store i64 %d, i64* %DP
+ ret void
+}
+
+declare i64 @llvm.ctlz.i64(i64)
+
+declare i32 @llvm.ctlz.i32(i32)
+
+declare i16 @llvm.ctlz.i16(i16)
+
+declare i8 @llvm.ctlz.i8(i8)
+
+define void @ctlztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
+ %a = call i8 @llvm.ctlz.i8( i8 %A ) ; <i8> [#uses=1]
+ %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
+ %c = call i32 @llvm.ctlz.i32( i32 %C ) ; <i32> [#uses=1]
+ %d = call i64 @llvm.ctlz.i64( i64 %D ) ; <i64> [#uses=1]
+ store i8 %a, i8* %AP
+ store i16 %b, i16* %BP
+ store i32 %c, i32* %CP
+ store i64 %d, i64* %DP
+ ret void
+}
+
+declare i64 @llvm.cttz.i64(i64)
+
+declare i32 @llvm.cttz.i32(i32)
+
+declare i16 @llvm.cttz.i16(i16)
+
+declare i8 @llvm.cttz.i8(i8)
+
+define void @cttztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
+ %a = call i8 @llvm.cttz.i8( i8 %A ) ; <i8> [#uses=1]
+ %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
+ %c = call i32 @llvm.cttz.i32( i32 %C ) ; <i32> [#uses=1]
+ %d = call i64 @llvm.cttz.i64( i64 %D ) ; <i64> [#uses=1]
+ store i8 %a, i8* %AP
+ store i16 %b, i16* %BP
+ store i32 %c, i32* %CP
+ store i64 %d, i64* %DP
+ ret void
+}
diff --git a/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll b/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll
new file mode 100644
index 0000000..282e973
--- /dev/null
+++ b/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s
+
+declare { i64, double } @wild()
+
+define void @foo(i64* %p, double* %q) nounwind {
+ %t = invoke { i64, double } @wild() to label %normal unwind label %handler
+
+normal:
+ %mrv_gr = getresult { i64, double } %t, 0
+ store i64 %mrv_gr, i64* %p
+ %mrv_gr12681 = getresult { i64, double } %t, 1
+ store double %mrv_gr12681, double* %q
+ ret void
+
+handler:
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/negintconst.ll b/test/CodeGen/Generic/negintconst.ll
new file mode 100644
index 0000000..67d775e
--- /dev/null
+++ b/test/CodeGen/Generic/negintconst.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s
+
+; Test that a negative constant smaller than 64 bits (e.g., int)
+; is correctly implemented with sign-extension.
+; In particular, the current code generated is:
+;
+; main:
+; .L_main_LL_0:
+; save %o6, -224, %o6
+; setx .G_fmtArg_1, %o1, %o0
+; setuw 1, %o1 ! i = 1
+; setuw 4294967295, %o3 ! THE BUG: 0x00000000ffffffff
+; setsw 0, %i0
+; add %i6, 1999, %o2 ! fval
+; add %o1, %g0, %o1
+; add %o0, 0, %o0
+; mulx %o1, %o3, %o1 ! ERROR: 0xffffffff; should be -1
+; add %o1, 3, %o1 ! ERROR: 0x100000002; should be 0x2
+; mulx %o1, 12, %o3 !
+; add %o2, %o3, %o3 ! produces bad address!
+; call printf
+; nop
+; jmpl %i7+8, %g0
+; restore %g0, 0, %g0
+;
+; llc produces:
+; ioff = 2 fval = 0xffffffff7fffec90 &fval[2] = 0xb7fffeca8
+; instead of:
+; ioff = 2 fval = 0xffffffff7fffec90 &fval[2] = 0xffffffff7fffeca8
+;
+ %Results = type { float, float, float }
+@fmtArg = internal global [39 x i8] c"ioff = %u\09fval = 0x%p\09&fval[2] = 0x%p\0A\00" ; <[39 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %fval = alloca %Results, i32 4 ; <%Results*> [#uses=2]
+ %i = add i32 1, 0 ; <i32> [#uses=1]
+ %iscale = mul i32 %i, -1 ; <i32> [#uses=1]
+ %ioff = add i32 %iscale, 3 ; <i32> [#uses=2]
+ %ioff.upgrd.1 = zext i32 %ioff to i64 ; <i64> [#uses=1]
+ %fptr = getelementptr %Results* %fval, i64 %ioff.upgrd.1 ; <%Results*> [#uses=1]
+ %castFmt = getelementptr [39 x i8]* @fmtArg, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %castFmt, i32 %ioff, %Results* %fval, %Results* %fptr ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/nested-select.ll b/test/CodeGen/Generic/nested-select.ll
new file mode 100644
index 0000000..f81fed3
--- /dev/null
+++ b/test/CodeGen/Generic/nested-select.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -o /dev/null
+
+; Test that select of a select works
+
+%typedef.tree = type opaque
+
+define i32 @ic_test(double %p.0.2.0.val, double %p.0.2.1.val, double %p.0.2.2.val, %typedef.tree* %t) {
+ %result.1.0 = zext i1 false to i32 ; <i32> [#uses=1]
+ %tmp.55 = fcmp oge double 0.000000e+00, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp.66 = fdiv double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ br label %N
+
+N: ; preds = %0
+ %result.1.1 = select i1 %tmp.55, i32 0, i32 %result.1.0 ; <i32> [#uses=1]
+ %tmp.75 = fcmp oge double %tmp.66, 1.000000e+00 ; <i1> [#uses=1]
+ %retval1 = select i1 %tmp.75, i32 0, i32 %result.1.1 ; <i32> [#uses=1]
+ ret i32 %retval1
+}
+
diff --git a/test/CodeGen/Generic/pr2625.ll b/test/CodeGen/Generic/pr2625.ll
new file mode 100644
index 0000000..3e3dc4b
--- /dev/null
+++ b/test/CodeGen/Generic/pr2625.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s
+; PR2625
+
+define i32 @main({ i32, { i32 } }*) {
+entry:
+ %state = alloca { i32, { i32 } }* ; <{ i32, { i32 } }**> [#uses=2]
+ store { i32, { i32 } }* %0, { i32, { i32 } }** %state
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ store i32 0, i32* %retval
+ load { i32, { i32 } }** %state ; <{ i32, { i32 } }*>:1 [#uses=1]
+ store { i32, { i32 } } zeroinitializer, { i32, { i32 } }* %1
+ br label %return
+
+return: ; preds = %entry
+ load i32* %retval ; <i32>:2 [#uses=1]
+ ret i32 %2
+}
diff --git a/test/CodeGen/Generic/pr3288.ll b/test/CodeGen/Generic/pr3288.ll
new file mode 100644
index 0000000..b62710f
--- /dev/null
+++ b/test/CodeGen/Generic/pr3288.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s
+; PR3288
+
+define void @a() {
+ %i = insertvalue [2 x [2 x i32]] undef, [2 x i32] undef, 1
+ ret void
+}
+define void @b() {
+ %i = insertvalue {{i32,float},{i16,double}} undef, {i16,double} undef, 1
+ ret void
+}
+define void @c() {
+ %i = insertvalue [2 x [2 x i32]] zeroinitializer, [2 x i32] zeroinitializer, 1
+ ret void
+}
+define void @d() {
+ %i = insertvalue {{i32,float},{i16,double}} zeroinitializer, {i16,double} zeroinitializer, 1
+ ret void
+}
+define void @e() {
+ %i = insertvalue [2 x [2 x i32]] undef, [2 x i32] undef, 0
+ ret void
+}
+define void @f() {
+ %i = insertvalue {{i32,float},{i16,double}} undef, {i32,float} undef, 0
+ ret void
+}
+define void @g() {
+ %i = insertvalue [2 x [2 x i32]] zeroinitializer, [2 x i32] zeroinitializer, 0
+ ret void
+}
+define void @h() {
+ %i = insertvalue {{i32,float},{i16,double}} zeroinitializer, {i32,float} zeroinitializer, 0
+ ret void
+}
+define void @ax() {
+ %i = insertvalue [2 x [2 x i32]] undef, i32 undef, 1, 1
+ ret void
+}
+define void @bx() {
+ %i = insertvalue {{i32,float},{i16,double}} undef, double undef, 1, 1
+ ret void
+}
+define void @cx() {
+ %i = insertvalue [2 x [2 x i32]] zeroinitializer, i32 zeroinitializer, 1, 1
+ ret void
+}
+define void @dx() {
+ %i = insertvalue {{i32,float},{i16,double}} zeroinitializer, double zeroinitializer, 1, 1
+ ret void
+}
+define void @ex() {
+ %i = insertvalue [2 x [2 x i32]] undef, i32 undef, 0, 1
+ ret void
+}
+define void @fx() {
+ %i = insertvalue {{i32,float},{i16,double}} undef, float undef, 0, 1
+ ret void
+}
+define void @gx() {
+ %i = insertvalue [2 x [2 x i32]] zeroinitializer, i32 zeroinitializer, 0, 1
+ ret void
+}
+define void @hx() {
+ %i = insertvalue {{i32,float},{i16,double}} zeroinitializer, float zeroinitializer, 0, 1
+ ret void
+}
diff --git a/test/CodeGen/Generic/print-add.ll b/test/CodeGen/Generic/print-add.ll
new file mode 100644
index 0000000..95608dc
--- /dev/null
+++ b/test/CodeGen/Generic/print-add.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s
+
[email protected]_1 = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %f = getelementptr [4 x i8]* @.str_1, i64 0, i64 0 ; <i8*> [#uses=3]
+ %d = add i32 1, 0 ; <i32> [#uses=3]
+ call i32 (i8*, ...)* @printf( i8* %f, i32 %d ) ; <i32>:1 [#uses=0]
+ %e = add i32 38, 2 ; <i32> [#uses=2]
+ call i32 (i8*, ...)* @printf( i8* %f, i32 %e ) ; <i32>:2 [#uses=0]
+ %g = add i32 %d, %d ; <i32> [#uses=1]
+ %h = add i32 %e, %g ; <i32> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %f, i32 %h ) ; <i32>:3 [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/print-arith-fp.ll b/test/CodeGen/Generic/print-arith-fp.ll
new file mode 100644
index 0000000..d129ff8
--- /dev/null
+++ b/test/CodeGen/Generic/print-arith-fp.ll
@@ -0,0 +1,61 @@
+; RUN: llc < %s
+@a_str = internal constant [8 x i8] c"a = %f\0A\00" ; <[8 x i8]*> [#uses=1]
+@b_str = internal constant [8 x i8] c"b = %f\0A\00" ; <[8 x i8]*> [#uses=1]
+@add_str = internal constant [12 x i8] c"a + b = %f\0A\00" ; <[12 x i8]*> [#uses=1]
+@sub_str = internal constant [12 x i8] c"a - b = %f\0A\00" ; <[12 x i8]*> [#uses=1]
+@mul_str = internal constant [12 x i8] c"a * b = %f\0A\00" ; <[12 x i8]*> [#uses=1]
+@div_str = internal constant [12 x i8] c"b / a = %f\0A\00" ; <[12 x i8]*> [#uses=1]
+@rem_str = internal constant [13 x i8] c"b %% a = %f\0A\00" ; <[13 x i8]*> [#uses=1]
+@lt_str = internal constant [12 x i8] c"a < b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@le_str = internal constant [13 x i8] c"a <= b = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@gt_str = internal constant [12 x i8] c"a > b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@ge_str = internal constant [13 x i8] c"a >= b = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@eq_str = internal constant [13 x i8] c"a == b = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@ne_str = internal constant [13 x i8] c"a != b = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@A = global double 2.000000e+00 ; <double*> [#uses=1]
+@B = global double 5.000000e+00 ; <double*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %a = load double* @A ; <double> [#uses=12]
+ %b = load double* @B ; <double> [#uses=12]
+ %a_s = getelementptr [8 x i8]* @a_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %b_s = getelementptr [8 x i8]* @b_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_s, double %a ) ; <i32>:1 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %b_s, double %b ) ; <i32>:2 [#uses=0]
+ %add_r = fadd double %a, %b ; <double> [#uses=1]
+ %sub_r = fsub double %a, %b ; <double> [#uses=1]
+ %mul_r = fmul double %a, %b ; <double> [#uses=1]
+ %div_r = fdiv double %b, %a ; <double> [#uses=1]
+ %rem_r = frem double %b, %a ; <double> [#uses=1]
+ %add_s = getelementptr [12 x i8]* @add_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %sub_s = getelementptr [12 x i8]* @sub_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %mul_s = getelementptr [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %div_s = getelementptr [12 x i8]* @div_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %rem_s = getelementptr [13 x i8]* @rem_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %add_s, double %add_r ) ; <i32>:3 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %sub_s, double %sub_r ) ; <i32>:4 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %mul_s, double %mul_r ) ; <i32>:5 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %div_s, double %div_r ) ; <i32>:6 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %rem_s, double %rem_r ) ; <i32>:7 [#uses=0]
+ %lt_r = fcmp olt double %a, %b ; <i1> [#uses=1]
+ %le_r = fcmp ole double %a, %b ; <i1> [#uses=1]
+ %gt_r = fcmp ogt double %a, %b ; <i1> [#uses=1]
+ %ge_r = fcmp oge double %a, %b ; <i1> [#uses=1]
+ %eq_r = fcmp oeq double %a, %b ; <i1> [#uses=1]
+ %ne_r = fcmp une double %a, %b ; <i1> [#uses=1]
+ %lt_s = getelementptr [12 x i8]* @lt_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %le_s = getelementptr [13 x i8]* @le_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %gt_s = getelementptr [12 x i8]* @gt_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %ge_s = getelementptr [13 x i8]* @ge_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %eq_s = getelementptr [13 x i8]* @eq_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %ne_s = getelementptr [13 x i8]* @ne_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %lt_s, i1 %lt_r ) ; <i32>:8 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %le_s, i1 %le_r ) ; <i32>:9 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %gt_s, i1 %gt_r ) ; <i32>:10 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %ge_s, i1 %ge_r ) ; <i32>:11 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %eq_s, i1 %eq_r ) ; <i32>:12 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %ne_s, i1 %ne_r ) ; <i32>:13 [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/print-arith-int.ll b/test/CodeGen/Generic/print-arith-int.ll
new file mode 100644
index 0000000..ce938cf
--- /dev/null
+++ b/test/CodeGen/Generic/print-arith-int.ll
@@ -0,0 +1,84 @@
+; RUN: llc < %s
+@a_str = internal constant [8 x i8] c"a = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@b_str = internal constant [8 x i8] c"b = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@add_str = internal constant [12 x i8] c"a + b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@sub_str = internal constant [12 x i8] c"a - b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@mul_str = internal constant [12 x i8] c"a * b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@div_str = internal constant [12 x i8] c"b / a = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@rem_str = internal constant [13 x i8] c"b \5C% a = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@lt_str = internal constant [12 x i8] c"a < b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@le_str = internal constant [13 x i8] c"a <= b = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@gt_str = internal constant [12 x i8] c"a > b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@ge_str = internal constant [13 x i8] c"a >= b = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@eq_str = internal constant [13 x i8] c"a == b = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@ne_str = internal constant [13 x i8] c"a != b = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@and_str = internal constant [12 x i8] c"a & b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@or_str = internal constant [12 x i8] c"a | b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@xor_str = internal constant [12 x i8] c"a ^ b = %d\0A\00" ; <[12 x i8]*> [#uses=1]
+@shl_str = internal constant [13 x i8] c"b << a = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@shr_str = internal constant [13 x i8] c"b >> a = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@A = global i32 2 ; <i32*> [#uses=1]
+@B = global i32 5 ; <i32*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %a = load i32* @A ; <i32> [#uses=16]
+ %b = load i32* @B ; <i32> [#uses=17]
+ %a_s = getelementptr [8 x i8]* @a_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %b_s = getelementptr [8 x i8]* @b_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_s, i32 %a ) ; <i32>:1 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %b_s, i32 %b ) ; <i32>:2 [#uses=0]
+ %add_r = add i32 %a, %b ; <i32> [#uses=1]
+ %sub_r = sub i32 %a, %b ; <i32> [#uses=1]
+ %mul_r = mul i32 %a, %b ; <i32> [#uses=1]
+ %div_r = sdiv i32 %b, %a ; <i32> [#uses=1]
+ %rem_r = srem i32 %b, %a ; <i32> [#uses=1]
+ %add_s = getelementptr [12 x i8]* @add_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %sub_s = getelementptr [12 x i8]* @sub_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %mul_s = getelementptr [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %div_s = getelementptr [12 x i8]* @div_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %rem_s = getelementptr [13 x i8]* @rem_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %add_s, i32 %add_r ) ; <i32>:3 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %sub_s, i32 %sub_r ) ; <i32>:4 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %mul_s, i32 %mul_r ) ; <i32>:5 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %div_s, i32 %div_r ) ; <i32>:6 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %rem_s, i32 %rem_r ) ; <i32>:7 [#uses=0]
+ %lt_r = icmp slt i32 %a, %b ; <i1> [#uses=1]
+ %le_r = icmp sle i32 %a, %b ; <i1> [#uses=1]
+ %gt_r = icmp sgt i32 %a, %b ; <i1> [#uses=1]
+ %ge_r = icmp sge i32 %a, %b ; <i1> [#uses=1]
+ %eq_r = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ %ne_r = icmp ne i32 %a, %b ; <i1> [#uses=1]
+ %lt_s = getelementptr [12 x i8]* @lt_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %le_s = getelementptr [13 x i8]* @le_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %gt_s = getelementptr [12 x i8]* @gt_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %ge_s = getelementptr [13 x i8]* @ge_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %eq_s = getelementptr [13 x i8]* @eq_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %ne_s = getelementptr [13 x i8]* @ne_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %lt_s, i1 %lt_r ) ; <i32>:8 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %le_s, i1 %le_r ) ; <i32>:9 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %gt_s, i1 %gt_r ) ; <i32>:10 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %ge_s, i1 %ge_r ) ; <i32>:11 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %eq_s, i1 %eq_r ) ; <i32>:12 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %ne_s, i1 %ne_r ) ; <i32>:13 [#uses=0]
+ %and_r = and i32 %a, %b ; <i32> [#uses=1]
+ %or_r = or i32 %a, %b ; <i32> [#uses=1]
+ %xor_r = xor i32 %a, %b ; <i32> [#uses=1]
+ %u = trunc i32 %a to i8 ; <i8> [#uses=2]
+ %shift.upgrd.1 = zext i8 %u to i32 ; <i32> [#uses=1]
+ %shl_r = shl i32 %b, %shift.upgrd.1 ; <i32> [#uses=1]
+ %shift.upgrd.2 = zext i8 %u to i32 ; <i32> [#uses=1]
+ %shr_r = ashr i32 %b, %shift.upgrd.2 ; <i32> [#uses=1]
+ %and_s = getelementptr [12 x i8]* @and_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %or_s = getelementptr [12 x i8]* @or_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %xor_s = getelementptr [12 x i8]* @xor_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %shl_s = getelementptr [13 x i8]* @shl_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %shr_s = getelementptr [13 x i8]* @shr_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %and_s, i32 %and_r ) ; <i32>:14 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %or_s, i32 %or_r ) ; <i32>:15 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %xor_s, i32 %xor_r ) ; <i32>:16 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %shl_s, i32 %shl_r ) ; <i32>:17 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %shr_s, i32 %shr_r ) ; <i32>:18 [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/print-int.ll b/test/CodeGen/Generic/print-int.ll
new file mode 100644
index 0000000..7ca4b3d
--- /dev/null
+++ b/test/CodeGen/Generic/print-int.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s
+
[email protected]_1 = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %f = getelementptr [4 x i8]* @.str_1, i64 0, i64 0 ; <i8*> [#uses=1]
+ %d = add i32 0, 0 ; <i32> [#uses=1]
+ %tmp.0 = call i32 (i8*, ...)* @printf( i8* %f, i32 %d ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/print-mul-exp.ll b/test/CodeGen/Generic/print-mul-exp.ll
new file mode 100644
index 0000000..90fc55b
--- /dev/null
+++ b/test/CodeGen/Generic/print-mul-exp.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s
+
+@a_str = internal constant [8 x i8] c"a = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@a_mul_str = internal constant [13 x i8] c"a * %d = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@A = global i32 2 ; <i32*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %a = load i32* @A ; <i32> [#uses=21]
+ %a_s = getelementptr [8 x i8]* @a_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %a_mul_s = getelementptr [13 x i8]* @a_mul_str, i64 0, i64 0 ; <i8*> [#uses=20]
+ call i32 (i8*, ...)* @printf( i8* %a_s, i32 %a ) ; <i32>:1 [#uses=0]
+ %r_0 = mul i32 %a, 0 ; <i32> [#uses=1]
+ %r_1 = mul i32 %a, 1 ; <i32> [#uses=1]
+ %r_2 = mul i32 %a, 2 ; <i32> [#uses=1]
+ %r_3 = mul i32 %a, 3 ; <i32> [#uses=1]
+ %r_4 = mul i32 %a, 4 ; <i32> [#uses=1]
+ %r_5 = mul i32 %a, 5 ; <i32> [#uses=1]
+ %r_6 = mul i32 %a, 6 ; <i32> [#uses=1]
+ %r_7 = mul i32 %a, 7 ; <i32> [#uses=1]
+ %r_8 = mul i32 %a, 8 ; <i32> [#uses=1]
+ %r_9 = mul i32 %a, 9 ; <i32> [#uses=1]
+ %r_10 = mul i32 %a, 10 ; <i32> [#uses=1]
+ %r_11 = mul i32 %a, 11 ; <i32> [#uses=1]
+ %r_12 = mul i32 %a, 12 ; <i32> [#uses=1]
+ %r_13 = mul i32 %a, 13 ; <i32> [#uses=1]
+ %r_14 = mul i32 %a, 14 ; <i32> [#uses=1]
+ %r_15 = mul i32 %a, 15 ; <i32> [#uses=1]
+ %r_16 = mul i32 %a, 16 ; <i32> [#uses=1]
+ %r_17 = mul i32 %a, 17 ; <i32> [#uses=1]
+ %r_18 = mul i32 %a, 18 ; <i32> [#uses=1]
+ %r_19 = mul i32 %a, 19 ; <i32> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 0, i32 %r_0 ) ; <i32>:2 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 1, i32 %r_1 ) ; <i32>:3 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 2, i32 %r_2 ) ; <i32>:4 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 3, i32 %r_3 ) ; <i32>:5 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 4, i32 %r_4 ) ; <i32>:6 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 5, i32 %r_5 ) ; <i32>:7 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 6, i32 %r_6 ) ; <i32>:8 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 7, i32 %r_7 ) ; <i32>:9 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 8, i32 %r_8 ) ; <i32>:10 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 9, i32 %r_9 ) ; <i32>:11 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 10, i32 %r_10 ) ; <i32>:12 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 11, i32 %r_11 ) ; <i32>:13 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 12, i32 %r_12 ) ; <i32>:14 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 13, i32 %r_13 ) ; <i32>:15 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 14, i32 %r_14 ) ; <i32>:16 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 15, i32 %r_15 ) ; <i32>:17 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 16, i32 %r_16 ) ; <i32>:18 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 17, i32 %r_17 ) ; <i32>:19 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 18, i32 %r_18 ) ; <i32>:20 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 19, i32 %r_19 ) ; <i32>:21 [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/print-mul.ll b/test/CodeGen/Generic/print-mul.ll
new file mode 100644
index 0000000..0707f3c
--- /dev/null
+++ b/test/CodeGen/Generic/print-mul.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s
+
+@a_str = internal constant [8 x i8] c"a = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@b_str = internal constant [8 x i8] c"b = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@a_mul_str = internal constant [13 x i8] c"a * %d = %d\0A\00" ; <[13 x i8]*> [#uses=1]
+@A = global i32 2 ; <i32*> [#uses=1]
+@B = global i32 5 ; <i32*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+entry:
+ %a = load i32* @A ; <i32> [#uses=2]
+ %b = load i32* @B ; <i32> [#uses=1]
+ %a_s = getelementptr [8 x i8]* @a_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %b_s = getelementptr [8 x i8]* @b_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %a_mul_s = getelementptr [13 x i8]* @a_mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_s, i32 %a ) ; <i32>:0 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %b_s, i32 %b ) ; <i32>:1 [#uses=0]
+ br label %shl_test
+
+shl_test: ; preds = %shl_test, %entry
+ %s = phi i32 [ 0, %entry ], [ %s_inc, %shl_test ] ; <i32> [#uses=4]
+ %result = mul i32 %a, %s ; <i32> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_mul_s, i32 %s, i32 %result ) ; <i32>:2 [#uses=0]
+ %s_inc = add i32 %s, 1 ; <i32> [#uses=1]
+ %done = icmp eq i32 %s, 256 ; <i1> [#uses=1]
+ br i1 %done, label %fini, label %shl_test
+
+fini: ; preds = %shl_test
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/print-shift.ll b/test/CodeGen/Generic/print-shift.ll
new file mode 100644
index 0000000..6c5d222
--- /dev/null
+++ b/test/CodeGen/Generic/print-shift.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s
+
+@a_str = internal constant [8 x i8] c"a = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@b_str = internal constant [8 x i8] c"b = %d\0A\00" ; <[8 x i8]*> [#uses=1]
+@a_shl_str = internal constant [14 x i8] c"a << %d = %d\0A\00" ; <[14 x i8]*> [#uses=1]
+@A = global i32 2 ; <i32*> [#uses=1]
+@B = global i32 5 ; <i32*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+entry:
+ %a = load i32* @A ; <i32> [#uses=2]
+ %b = load i32* @B ; <i32> [#uses=1]
+ %a_s = getelementptr [8 x i8]* @a_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %b_s = getelementptr [8 x i8]* @b_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ %a_shl_s = getelementptr [14 x i8]* @a_shl_str, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_s, i32 %a ) ; <i32>:0 [#uses=0]
+ call i32 (i8*, ...)* @printf( i8* %b_s, i32 %b ) ; <i32>:1 [#uses=0]
+ br label %shl_test
+
+shl_test: ; preds = %shl_test, %entry
+ %s = phi i8 [ 0, %entry ], [ %s_inc, %shl_test ] ; <i8> [#uses=4]
+ %shift.upgrd.1 = zext i8 %s to i32 ; <i32> [#uses=1]
+ %result = shl i32 %a, %shift.upgrd.1 ; <i32> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %a_shl_s, i8 %s, i32 %result ) ; <i32>:2 [#uses=0]
+ %s_inc = add i8 %s, 1 ; <i8> [#uses=1]
+ %done = icmp eq i8 %s, 32 ; <i1> [#uses=1]
+ br i1 %done, label %fini, label %shl_test
+
+fini: ; preds = %shl_test
+ ret i32 0
+}
+
diff --git a/test/CodeGen/Generic/ret0.ll b/test/CodeGen/Generic/ret0.ll
new file mode 100644
index 0000000..9e628a1
--- /dev/null
+++ b/test/CodeGen/Generic/ret0.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s
+
+define i32 @main() {
+ ret i32 0
+}
diff --git a/test/CodeGen/Generic/ret42.ll b/test/CodeGen/Generic/ret42.ll
new file mode 100644
index 0000000..f5cd33d
--- /dev/null
+++ b/test/CodeGen/Generic/ret42.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s
+
+define i32 @main() {
+ ret i32 42
+}
diff --git a/test/CodeGen/Generic/select-cc.ll b/test/CodeGen/Generic/select-cc.ll
new file mode 100644
index 0000000..b653e2a
--- /dev/null
+++ b/test/CodeGen/Generic/select-cc.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s
+; PR2504
+
+define <2 x double> @vector_select(<2 x double> %x, <2 x double> %y) nounwind {
+ %x.lo = extractelement <2 x double> %x, i32 0 ; <double> [#uses=1]
+ %x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]
+ %a.d = select i1 %x.lo.ge, <2 x double> %y, <2 x double> %x ; <<2 x double>> [#uses=1]
+ ret <2 x double> %a.d
+}
diff --git a/test/CodeGen/Generic/select.ll b/test/CodeGen/Generic/select.ll
new file mode 100644
index 0000000..63052c1
--- /dev/null
+++ b/test/CodeGen/Generic/select.ll
@@ -0,0 +1,187 @@
+; RUN: llc < %s
+
+%Domain = type { i8*, i32, i32*, i32, i32, i32*, %Domain* }
+@AConst = constant i32 123 ; <i32*> [#uses=1]
+
+; Test setting values of different constants in registers.
+;
+define void @testConsts(i32 %N, float %X) {
+ %a = add i32 %N, 1 ; <i32> [#uses=0]
+ %i = add i32 %N, 12345678 ; <i32> [#uses=0]
+ %b = add i16 4, 3 ; <i16> [#uses=0]
+ %c = fadd float %X, 0.000000e+00 ; <float> [#uses=0]
+ %d = fadd float %X, 0x400921CAC0000000 ; <float> [#uses=0]
+ %f = add i32 -1, 10 ; <i32> [#uses=0]
+ %g = add i16 20, -1 ; <i16> [#uses=0]
+ %j = add i16 -1, 30 ; <i16> [#uses=0]
+ %h = add i8 40, -1 ; <i8> [#uses=0]
+ %k = add i8 -1, 50 ; <i8> [#uses=0]
+ ret void
+}
+
+; A SetCC whose result is used should produce instructions to
+; compute the boolean value in a register. One whose result
+; is unused will only generate the condition code but not
+; the boolean result.
+;
+define void @unusedBool(i32* %x, i32* %y) {
+ icmp eq i32* %x, %y ; <i1>:1 [#uses=1]
+ xor i1 %1, true ; <i1>:2 [#uses=0]
+ icmp ne i32* %x, %y ; <i1>:3 [#uses=0]
+ ret void
+}
+
+; A constant argument to a Phi produces a Cast instruction in the
+; corresponding predecessor basic block. This checks a few things:
+; -- phi arguments coming from the bottom of the same basic block
+; (they should not be forward substituted in the machine code!)
+; -- code generation for casts of various types
+; -- use of immediate fields for integral constants of different sizes
+; -- branch on a constant condition
+;
+define void @mergeConstants(i32* %x, i32* %y) {
+; <label>:0
+ br label %Top
+
+Top: ; preds = %Next, %Top, %0
+ phi i32 [ 0, %0 ], [ 1, %Top ], [ 524288, %Next ] ; <i32>:1 [#uses=0]
+ phi float [ 0.000000e+00, %0 ], [ 1.000000e+00, %Top ], [ 2.000000e+00, %Next ] ; <float>:2 [#uses=0]
+ phi double [ 5.000000e-01, %0 ], [ 1.500000e+00, %Top ], [ 2.500000e+00, %Next ]
+ phi i1 [ true, %0 ], [ false, %Top ], [ true, %Next ] ; <i1>:4 [#uses=0]
+ br i1 true, label %Top, label %Next
+
+Next: ; preds = %Top
+ br label %Top
+}
+
+
+
+; A constant argument to a cast used only once should be forward substituted
+; and loaded where needed, which happens is:
+; -- User of cast has no immediate field
+; -- User of cast has immediate field but constant is too large to fit
+; or constant is not resolved until later (e.g., global address)
+; -- User of cast uses it as a call arg. or return value so it is an implicit
+; use but has to be loaded into a virtual register so that the reg.
+; allocator can allocate the appropriate phys. reg. for it
+;
+define i32* @castconst(float) {
+ %castbig = trunc i64 99999999 to i32 ; <i32> [#uses=1]
+ %castsmall = trunc i64 1 to i32 ; <i32> [#uses=1]
+ %usebig = add i32 %castbig, %castsmall ; <i32> [#uses=0]
+ %castglob = bitcast i32* @AConst to i64* ; <i64*> [#uses=1]
+ %dummyl = load i64* %castglob ; <i64> [#uses=0]
+ %castnull = inttoptr i64 0 to i32* ; <i32*> [#uses=1]
+ ret i32* %castnull
+}
+
+; Test branch-on-comparison-with-zero, in two ways:
+; 1. can be folded
+; 2. cannot be folded because result of comparison is used twice
+;
+define void @testbool(i32 %A, i32 %B) {
+ br label %Top
+
+Top: ; preds = %loop, %0
+ %D = add i32 %A, %B ; <i32> [#uses=2]
+ %E = sub i32 %D, -4 ; <i32> [#uses=1]
+ %C = icmp sle i32 %E, 0 ; <i1> [#uses=1]
+ br i1 %C, label %retlbl, label %loop
+
+loop: ; preds = %loop, %Top
+ %F = add i32 %A, %B ; <i32> [#uses=0]
+ %G = sub i32 %D, -4 ; <i32> [#uses=1]
+ %D.upgrd.1 = icmp sle i32 %G, 0 ; <i1> [#uses=1]
+ %E.upgrd.2 = xor i1 %D.upgrd.1, true ; <i1> [#uses=1]
+ br i1 %E.upgrd.2, label %loop, label %Top
+
+retlbl: ; preds = %Top
+ ret void
+}
+
+
+;; Test use of a boolean result in cast operations.
+;; Requires converting a condition code result into a 0/1 value in a reg.
+;;
+define i32 @castbool(i32 %A, i32 %B) {
+bb0:
+ %cond213 = icmp slt i32 %A, %B ; <i1> [#uses=1]
+ %cast110 = zext i1 %cond213 to i8 ; <i8> [#uses=1]
+ %cast109 = zext i8 %cast110 to i32 ; <i32> [#uses=1]
+ ret i32 %cast109
+}
+
+;; Test use of a boolean result in arithmetic and logical operations.
+;; Requires converting a condition code result into a 0/1 value in a reg.
+;;
+define i1 @boolexpr(i1 %b, i32 %N) {
+ %b2 = icmp sge i32 %N, 0 ; <i1> [#uses=1]
+ %b3 = and i1 %b, %b2 ; <i1> [#uses=1]
+ ret i1 %b3
+}
+
+; Test branch on floating point comparison
+;
+define void @testfloatbool(float %x, float %y) {
+ br label %Top
+
+Top: ; preds = %Top, %0
+ %p = fadd float %x, %y ; <float> [#uses=1]
+ %z = fsub float %x, %y ; <float> [#uses=1]
+ %b = fcmp ole float %p, %z ; <i1> [#uses=2]
+ %c = xor i1 %b, true ; <i1> [#uses=0]
+ br i1 %b, label %Top, label %goon
+
+goon: ; preds = %Top
+ ret void
+}
+
+
+; Test cases where an LLVM instruction requires no machine
+; instructions (e.g., cast int* to long). But there are 2 cases:
+; 1. If the result register has only a single use and the use is in the
+; same basic block, the operand will be copy-propagated during
+; instruction selection.
+; 2. If the result register has multiple uses or is in a different
+; basic block, it cannot (or will not) be copy propagated during
+; instruction selection. It will generate a
+; copy instruction (add-with-0), but this copy should get coalesced
+; away by the register allocator.
+;
+define i32 @checkForward(i32 %N, i32* %A) {
+bb2:
+ %reg114 = shl i32 %N, 2 ; <i32> [#uses=1]
+ %cast115 = sext i32 %reg114 to i64 ; <i64> [#uses=1]
+ %cast116 = ptrtoint i32* %A to i64 ; <i64> [#uses=1]
+ %reg116 = add i64 %cast116, %cast115 ; <i64> [#uses=1]
+ %castPtr = inttoptr i64 %reg116 to i32* ; <i32*> [#uses=1]
+ %reg118 = load i32* %castPtr ; <i32> [#uses=1]
+ %cast117 = sext i32 %reg118 to i64 ; <i64> [#uses=2]
+ %reg159 = add i64 1234567, %cast117 ; <i64> [#uses=0]
+ %reg160 = add i64 7654321, %cast117 ; <i64> [#uses=0]
+ ret i32 0
+}
+
+
+; Test case for unary NOT operation constructed from XOR.
+;
+define void @checkNot(i1 %b, i32 %i) {
+ %notB = xor i1 %b, true ; <i1> [#uses=1]
+ %notI = xor i32 %i, -1 ; <i32> [#uses=2]
+ %F = icmp sge i32 %notI, 100 ; <i1> [#uses=1]
+ %J = add i32 %i, %i ; <i32> [#uses=1]
+ %andNotB = and i1 %F, %notB ; <i1> [#uses=0]
+ %andNotI = and i32 %J, %notI ; <i32> [#uses=0]
+ %notB2 = xor i1 true, %b ; <i1> [#uses=0]
+ %notI2 = xor i32 -1, %i ; <i32> [#uses=0]
+ ret void
+}
+
+; Test case for folding getelementptr into a load/store
+;
+define i32 @checkFoldGEP(%Domain* %D, i64 %idx) {
+ %reg841 = getelementptr %Domain* %D, i64 0, i32 1 ; <i32*> [#uses=1]
+ %reg820 = load i32* %reg841 ; <i32> [#uses=1]
+ ret i32 %reg820
+}
+
diff --git a/test/CodeGen/Generic/shift-int64.ll b/test/CodeGen/Generic/shift-int64.ll
new file mode 100644
index 0000000..670ef20
--- /dev/null
+++ b/test/CodeGen/Generic/shift-int64.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s
+
+define i64 @test_imm(i64 %X) {
+ %Y = ashr i64 %X, 17 ; <i64> [#uses=1]
+ ret i64 %Y
+}
+
+define i64 @test_variable(i64 %X, i8 %Amt) {
+ %shift.upgrd.1 = zext i8 %Amt to i64 ; <i64> [#uses=1]
+ %Y = ashr i64 %X, %shift.upgrd.1 ; <i64> [#uses=1]
+ ret i64 %Y
+}
diff --git a/test/CodeGen/Generic/spillccr.ll b/test/CodeGen/Generic/spillccr.ll
new file mode 100644
index 0000000..0a774c6
--- /dev/null
+++ b/test/CodeGen/Generic/spillccr.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s
+
+; July 6, 2002 -- LLC Regression test
+; This test case checks if the integer CC register %xcc (or %ccr)
+; is correctly spilled. The code fragment came from function
+; MakeGraph in Olden-mst.
+; The original code made all comparisons with 0, so that the %xcc
+; register is not needed for the branch in the first basic block.
+; Replace 0 with 1 in the first comparson so that the
+; branch-on-register instruction cannot be used directly, i.e.,
+; the %xcc register is needed for the first branch.
+;
+
+ %Graph = type %struct.graph_st*
+ %Hash = type %struct.hash*
+ %HashEntry = type %struct.hash_entry*
+ %Vertex = type %struct.vert_st*
+ %struct.graph_st = type { [1 x %Vertex] }
+ %struct.hash = type { %HashEntry*, i32 (i32)*, i32 }
+ %struct.hash_entry = type { i32, i8*, %HashEntry }
+ %struct.vert_st = type { i32, %Vertex, %Hash }
+@HashRange = external global i32 ; <i32*> [#uses=0]
[email protected] = internal global [13 x i8] c"Make phase 2\00" ; <[13 x i8]*> [#uses=0]
[email protected] = internal global [13 x i8] c"Make phase 3\00" ; <[13 x i8]*> [#uses=0]
[email protected] = internal global [13 x i8] c"Make phase 4\00" ; <[13 x i8]*> [#uses=0]
[email protected] = internal global [15 x i8] c"Make returning\00" ; <[15 x i8]*> [#uses=0]
+
+define %Graph @MakeGraph(i32 %numvert, i32 %numproc) {
+bb1:
+ %reg111 = add i32 %numproc, -1 ; <i32> [#uses=2]
+ %cond275 = icmp slt i32 %reg111, 1 ; <i1> [#uses=1]
+ %cond276 = icmp sle i32 %reg111, 0 ; <i1> [#uses=1]
+ %cond277 = icmp sge i32 %numvert, 0 ; <i1> [#uses=1]
+ %reg162 = add i32 %numvert, 3 ; <i32> [#uses=0]
+ br i1 %cond275, label %bb7, label %bb4
+
+bb4: ; preds = %bb1
+ br i1 %cond276, label %bb7, label %bb5
+
+bb5: ; preds = %bb4
+ br i1 %cond277, label %bb7, label %bb6
+
+bb6: ; preds = %bb5
+ ret %Graph null
+
+bb7: ; preds = %bb5, %bb4, %bb1
+ ret %Graph null
+}
+
diff --git a/test/CodeGen/Generic/stack-protector.ll b/test/CodeGen/Generic/stack-protector.ll
new file mode 100644
index 0000000..a59c649
--- /dev/null
+++ b/test/CodeGen/Generic/stack-protector.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -o - | grep {__stack_chk_guard}
+; RUN: llc < %s -o - | grep {__stack_chk_fail}
+
+@"\01LC" = internal constant [11 x i8] c"buf == %s\0A\00" ; <[11 x i8]*> [#uses=1]
+
+define void @test(i8* %a) nounwind ssp {
+entry:
+ %a_addr = alloca i8* ; <i8**> [#uses=2]
+ %buf = alloca [8 x i8] ; <[8 x i8]*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i8* %a, i8** %a_addr
+ %buf1 = bitcast [8 x i8]* %buf to i8* ; <i8*> [#uses=1]
+ %0 = load i8** %a_addr, align 4 ; <i8*> [#uses=1]
+ %1 = call i8* @strcpy(i8* %buf1, i8* %0) nounwind ; <i8*> [#uses=0]
+ %buf2 = bitcast [8 x i8]* %buf to i8* ; <i8*> [#uses=1]
+ %2 = call i32 (i8*, ...)* @printf(i8* getelementptr ([11 x i8]* @"\01LC", i32 0, i32 0), i8* %buf2) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8* @strcpy(i8*, i8*) nounwind
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/Generic/stacksave-restore.ll b/test/CodeGen/Generic/stacksave-restore.ll
new file mode 100644
index 0000000..b124b5f
--- /dev/null
+++ b/test/CodeGen/Generic/stacksave-restore.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s
+
+declare i8* @llvm.stacksave()
+
+declare void @llvm.stackrestore(i8*)
+
+define i32* @test(i32 %N) {
+ %tmp = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %P = alloca i32, i32 %N ; <i32*> [#uses=1]
+ call void @llvm.stackrestore( i8* %tmp )
+ %Q = alloca i32, i32 %N ; <i32*> [#uses=0]
+ ret i32* %P
+}
+
diff --git a/test/CodeGen/Generic/storetrunc-fp.ll b/test/CodeGen/Generic/storetrunc-fp.ll
new file mode 100644
index 0000000..7f7c7f7
--- /dev/null
+++ b/test/CodeGen/Generic/storetrunc-fp.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s
+
+define void @foo(double %a, double %b, float* %fp) {
+ %c = fadd double %a, %b
+ %d = fptrunc double %c to float
+ store float %d, float* %fp
+ ret void
+}
diff --git a/test/CodeGen/Generic/switch-lower-feature.ll b/test/CodeGen/Generic/switch-lower-feature.ll
new file mode 100644
index 0000000..1e9dbee
--- /dev/null
+++ b/test/CodeGen/Generic/switch-lower-feature.ll
@@ -0,0 +1,63 @@
+; RUN: llc < %s
+
+define i32 @test(i32 %tmp158) {
+entry:
+ switch i32 %tmp158, label %bb336 [
+ i32 120, label %bb338
+ i32 121, label %bb338
+ i32 122, label %bb338
+ i32 123, label %bb338
+ i32 124, label %bb338
+ i32 125, label %bb338
+ i32 126, label %bb338
+ i32 1024, label %bb338
+ i32 0, label %bb338
+ i32 1, label %bb338
+ i32 2, label %bb338
+ i32 3, label %bb338
+ i32 4, label %bb338
+ i32 5, label %bb338
+ ]
+bb336:
+ ret i32 10
+bb338:
+ ret i32 11
+}
+
+define i32 @test2(i32 %tmp158) {
+entry:
+ switch i32 %tmp158, label %bb336 [
+ i32 -2147483648, label %bb338
+ i32 -2147483647, label %bb338
+ i32 -2147483646, label %bb338
+ i32 120, label %bb338
+ i32 121, label %bb339
+ i32 122, label %bb340
+ i32 123, label %bb341
+ i32 124, label %bb342
+ i32 125, label %bb343
+ i32 126, label %bb336
+ i32 1024, label %bb338
+ i32 0, label %bb338
+ i32 1, label %bb338
+ i32 2, label %bb338
+ i32 3, label %bb338
+ i32 4, label %bb338
+ i32 5, label %bb338
+ ]
+bb336:
+ ret i32 10
+bb338:
+ ret i32 11
+bb339:
+ ret i32 12
+bb340:
+ ret i32 13
+bb341:
+ ret i32 14
+bb342:
+ ret i32 15
+bb343:
+ ret i32 18
+
+}
diff --git a/test/CodeGen/Generic/switch-lower.ll b/test/CodeGen/Generic/switch-lower.ll
new file mode 100644
index 0000000..1cefe82
--- /dev/null
+++ b/test/CodeGen/Generic/switch-lower.ll
@@ -0,0 +1,348 @@
+; RUN: llc < %s
+
+
+; PR5421
+define void @test1() {
+entry:
+ switch i128 undef, label %exit [
+ i128 55340232221128654848, label %exit
+ i128 92233720368547758080, label %exit
+ i128 73786976294838206464, label %exit
+ i128 147573952589676412928, label %exit
+ ]
+exit:
+ unreachable
+}
+
+
+; PR1197
+define void @test2() {
+entry:
+ br i1 false, label %cond_next954, label %cond_true924
+
+cond_true924: ; preds = %entry
+ ret void
+
+cond_next954: ; preds = %entry
+ switch i8 0, label %cleanup7419 [
+ i8 1, label %bb956
+ i8 2, label %bb1069
+ i8 4, label %bb7328
+ i8 5, label %bb1267
+ i8 8, label %bb1348
+ i8 9, label %bb7328
+ i8 11, label %bb1439
+ i8 12, label %bb1484
+ i8 13, label %bb1706
+ i8 14, label %bb1783
+ i8 17, label %bb1925
+ i8 18, label %bb1929
+ i8 19, label %bb2240
+ i8 25, label %bb2447
+ i8 27, label %bb2480
+ i8 29, label %bb2590
+ i8 30, label %bb2594
+ i8 31, label %bb2621
+ i8 32, label %bb2664
+ i8 33, label %bb2697
+ i8 34, label %bb2735
+ i8 37, label %bb2786
+ i8 38, label %bb2849
+ i8 39, label %bb3269
+ i8 41, label %bb3303
+ i8 42, label %bb3346
+ i8 43, label %bb3391
+ i8 44, label %bb3395
+ i8 50, label %bb3673
+ i8 52, label %bb3677
+ i8 53, label %bb3693
+ i8 54, label %bb7328
+ i8 56, label %bb3758
+ i8 57, label %bb3787
+ i8 64, label %bb5019
+ i8 68, label %cond_true4235
+ i8 69, label %bb4325
+ i8 70, label %bb4526
+ i8 72, label %bb4618
+ i8 73, label %bb4991
+ i8 80, label %bb5012
+ i8 82, label %bb5019
+ i8 84, label %bb5518
+ i8 86, label %bb5752
+ i8 87, label %bb5953
+ i8 89, label %bb6040
+ i8 90, label %bb6132
+ i8 92, label %bb6186
+ i8 93, label %bb6151
+ i8 94, label %bb6155
+ i8 97, label %bb6355
+ i8 98, label %bb5019
+ i8 99, label %bb6401
+ i8 101, label %bb5019
+ i8 102, label %bb1484
+ i8 104, label %bb7064
+ i8 105, label %bb7068
+ i8 106, label %bb7072
+ i8 108, label %bb1065
+ i8 109, label %bb1702
+ i8 110, label %bb2200
+ i8 111, label %bb2731
+ i8 112, label %bb2782
+ i8 113, label %bb2845
+ i8 114, label %bb2875
+ i8 115, label %bb3669
+ i8 116, label %bb7316
+ i8 117, label %bb7316
+ i8 118, label %bb3875
+ i8 119, label %bb4359
+ i8 120, label %bb4987
+ i8 121, label %bb5008
+ i8 122, label %bb5786
+ i8 123, label %bb6147
+ i8 124, label %bb6916
+ i8 125, label %bb6920
+ i8 126, label %bb6955
+ i8 127, label %bb6990
+ i8 -128, label %bb7027
+ i8 -127, label %bb3879
+ i8 -126, label %bb4700
+ i8 -125, label %bb7076
+ i8 -124, label %bb2366
+ i8 -123, label %bb2366
+ i8 -122, label %bb5490
+ ]
+
+bb956: ; preds = %cond_next954
+ ret void
+
+bb1065: ; preds = %cond_next954
+ ret void
+
+bb1069: ; preds = %cond_next954
+ ret void
+
+bb1267: ; preds = %cond_next954
+ ret void
+
+bb1348: ; preds = %cond_next954
+ ret void
+
+bb1439: ; preds = %cond_next954
+ ret void
+
+bb1484: ; preds = %cond_next954, %cond_next954
+ ret void
+
+bb1702: ; preds = %cond_next954
+ ret void
+
+bb1706: ; preds = %cond_next954
+ ret void
+
+bb1783: ; preds = %cond_next954
+ ret void
+
+bb1925: ; preds = %cond_next954
+ ret void
+
+bb1929: ; preds = %cond_next954
+ ret void
+
+bb2200: ; preds = %cond_next954
+ ret void
+
+bb2240: ; preds = %cond_next954
+ ret void
+
+bb2366: ; preds = %cond_next954, %cond_next954
+ ret void
+
+bb2447: ; preds = %cond_next954
+ ret void
+
+bb2480: ; preds = %cond_next954
+ ret void
+
+bb2590: ; preds = %cond_next954
+ ret void
+
+bb2594: ; preds = %cond_next954
+ ret void
+
+bb2621: ; preds = %cond_next954
+ ret void
+
+bb2664: ; preds = %cond_next954
+ ret void
+
+bb2697: ; preds = %cond_next954
+ ret void
+
+bb2731: ; preds = %cond_next954
+ ret void
+
+bb2735: ; preds = %cond_next954
+ ret void
+
+bb2782: ; preds = %cond_next954
+ ret void
+
+bb2786: ; preds = %cond_next954
+ ret void
+
+bb2845: ; preds = %cond_next954
+ ret void
+
+bb2849: ; preds = %cond_next954
+ ret void
+
+bb2875: ; preds = %cond_next954
+ ret void
+
+bb3269: ; preds = %cond_next954
+ ret void
+
+bb3303: ; preds = %cond_next954
+ ret void
+
+bb3346: ; preds = %cond_next954
+ ret void
+
+bb3391: ; preds = %cond_next954
+ ret void
+
+bb3395: ; preds = %cond_next954
+ ret void
+
+bb3669: ; preds = %cond_next954
+ ret void
+
+bb3673: ; preds = %cond_next954
+ ret void
+
+bb3677: ; preds = %cond_next954
+ ret void
+
+bb3693: ; preds = %cond_next954
+ ret void
+
+bb3758: ; preds = %cond_next954
+ ret void
+
+bb3787: ; preds = %cond_next954
+ ret void
+
+bb3875: ; preds = %cond_next954
+ ret void
+
+bb3879: ; preds = %cond_next954
+ ret void
+
+cond_true4235: ; preds = %cond_next954
+ ret void
+
+bb4325: ; preds = %cond_next954
+ ret void
+
+bb4359: ; preds = %cond_next954
+ ret void
+
+bb4526: ; preds = %cond_next954
+ ret void
+
+bb4618: ; preds = %cond_next954
+ ret void
+
+bb4700: ; preds = %cond_next954
+ ret void
+
+bb4987: ; preds = %cond_next954
+ ret void
+
+bb4991: ; preds = %cond_next954
+ ret void
+
+bb5008: ; preds = %cond_next954
+ ret void
+
+bb5012: ; preds = %cond_next954
+ ret void
+
+bb5019: ; preds = %cond_next954, %cond_next954, %cond_next954, %cond_next954
+ ret void
+
+bb5490: ; preds = %cond_next954
+ ret void
+
+bb5518: ; preds = %cond_next954
+ ret void
+
+bb5752: ; preds = %cond_next954
+ ret void
+
+bb5786: ; preds = %cond_next954
+ ret void
+
+bb5953: ; preds = %cond_next954
+ ret void
+
+bb6040: ; preds = %cond_next954
+ ret void
+
+bb6132: ; preds = %cond_next954
+ ret void
+
+bb6147: ; preds = %cond_next954
+ ret void
+
+bb6151: ; preds = %cond_next954
+ ret void
+
+bb6155: ; preds = %cond_next954
+ ret void
+
+bb6186: ; preds = %cond_next954
+ ret void
+
+bb6355: ; preds = %cond_next954
+ ret void
+
+bb6401: ; preds = %cond_next954
+ ret void
+
+bb6916: ; preds = %cond_next954
+ ret void
+
+bb6920: ; preds = %cond_next954
+ ret void
+
+bb6955: ; preds = %cond_next954
+ ret void
+
+bb6990: ; preds = %cond_next954
+ ret void
+
+bb7027: ; preds = %cond_next954
+ ret void
+
+bb7064: ; preds = %cond_next954
+ ret void
+
+bb7068: ; preds = %cond_next954
+ ret void
+
+bb7072: ; preds = %cond_next954
+ ret void
+
+bb7076: ; preds = %cond_next954
+ ret void
+
+bb7316: ; preds = %cond_next954, %cond_next954
+ ret void
+
+bb7328: ; preds = %cond_next954, %cond_next954, %cond_next954
+ ret void
+
+cleanup7419: ; preds = %cond_next954
+ ret void
+}
diff --git a/test/CodeGen/Generic/trap.ll b/test/CodeGen/Generic/trap.ll
new file mode 100644
index 0000000..67d1a7a
--- /dev/null
+++ b/test/CodeGen/Generic/trap.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s
+define i32 @test() noreturn nounwind {
+entry:
+ tail call void @llvm.trap( )
+ unreachable
+}
+
+declare void @llvm.trap() nounwind
+
diff --git a/test/CodeGen/Generic/v-split.ll b/test/CodeGen/Generic/v-split.ll
new file mode 100644
index 0000000..634b562
--- /dev/null
+++ b/test/CodeGen/Generic/v-split.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+%f8 = type <8 x float>
+
+define void @test_f8(%f8 *%P, %f8* %Q, %f8 *%S) {
+ %p = load %f8* %P
+ %q = load %f8* %Q
+ %R = fadd %f8 %p, %q
+ store %f8 %R, %f8 *%S
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/vector-casts.ll b/test/CodeGen/Generic/vector-casts.ll
new file mode 100644
index 0000000..a26918b
--- /dev/null
+++ b/test/CodeGen/Generic/vector-casts.ll
@@ -0,0 +1,45 @@
+; RUN: llc < %s
+; PR2671
+
+define void @a(<2 x double>* %p, <2 x i8>* %q) {
+ %t = load <2 x double>* %p
+ %r = fptosi <2 x double> %t to <2 x i8>
+ store <2 x i8> %r, <2 x i8>* %q
+ ret void
+}
+define void @b(<2 x double>* %p, <2 x i8>* %q) {
+ %t = load <2 x double>* %p
+ %r = fptoui <2 x double> %t to <2 x i8>
+ store <2 x i8> %r, <2 x i8>* %q
+ ret void
+}
+define void @c(<2 x i8>* %p, <2 x double>* %q) {
+ %t = load <2 x i8>* %p
+ %r = sitofp <2 x i8> %t to <2 x double>
+ store <2 x double> %r, <2 x double>* %q
+ ret void
+}
+define void @d(<2 x i8>* %p, <2 x double>* %q) {
+ %t = load <2 x i8>* %p
+ %r = uitofp <2 x i8> %t to <2 x double>
+ store <2 x double> %r, <2 x double>* %q
+ ret void
+}
+define void @e(<2 x i8>* %p, <2 x i16>* %q) {
+ %t = load <2 x i8>* %p
+ %r = sext <2 x i8> %t to <2 x i16>
+ store <2 x i16> %r, <2 x i16>* %q
+ ret void
+}
+define void @f(<2 x i8>* %p, <2 x i16>* %q) {
+ %t = load <2 x i8>* %p
+ %r = zext <2 x i8> %t to <2 x i16>
+ store <2 x i16> %r, <2 x i16>* %q
+ ret void
+}
+define void @g(<2 x i16>* %p, <2 x i8>* %q) {
+ %t = load <2 x i16>* %p
+ %r = trunc <2 x i16> %t to <2 x i8>
+ store <2 x i8> %r, <2 x i8>* %q
+ ret void
+}
diff --git a/test/CodeGen/Generic/vector-constantexpr.ll b/test/CodeGen/Generic/vector-constantexpr.ll
new file mode 100644
index 0000000..d8e0258
--- /dev/null
+++ b/test/CodeGen/Generic/vector-constantexpr.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s
+
+define void @""(float* %inregs, float* %outregs) {
+ %a_addr.i = alloca <4 x float> ; <<4 x float>*> [#uses=1]
+ store <4 x float> < float undef, float undef, float undef, float undef >, <4 x float>* %a_addr.i
+ ret void
+}
diff --git a/test/CodeGen/Generic/vector-identity-shuffle.ll b/test/CodeGen/Generic/vector-identity-shuffle.ll
new file mode 100644
index 0000000..332d6d8
--- /dev/null
+++ b/test/CodeGen/Generic/vector-identity-shuffle.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s
+
+
+define void @test(<4 x float>* %tmp2.i) {
+ %tmp2.i.upgrd.1 = load <4 x float>* %tmp2.i ; <<4 x float>> [#uses=4]
+ %xFloat0.48 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 0 ; <float> [#uses=1]
+ %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, i32 0 ; <<4 x float>> [#uses=1]
+ %xFloat1.50 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 1 ; <float> [#uses=1]
+ %inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, i32 1 ; <<4 x float>> [#uses=1]
+ %xFloat2.53 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 2 ; <float> [#uses=1]
+ %inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, i32 2 ; <<4 x float>> [#uses=1]
+ %xFloat3.56 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 3 ; <float> [#uses=1]
+ %inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, i32 3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %inFloat3.58, <4 x float>* %tmp2.i
+ ret void
+}
+
diff --git a/test/CodeGen/Generic/vector.ll b/test/CodeGen/Generic/vector.ll
new file mode 100644
index 0000000..a0f9a02
--- /dev/null
+++ b/test/CodeGen/Generic/vector.ll
@@ -0,0 +1,154 @@
+; Test that vectors are scalarized/lowered correctly.
+; RUN: llc < %s
+
+
+%d8 = type <8 x double>
+%f1 = type <1 x float>
+%f2 = type <2 x float>
+%f4 = type <4 x float>
+%f8 = type <8 x float>
+%i4 = type <4 x i32>
+
+;;; TEST HANDLING OF VARIOUS VECTOR SIZES
+
+define void @test_f1(%f1* %P, %f1* %Q, %f1* %S) {
+ %p = load %f1* %P ; <%f1> [#uses=1]
+ %q = load %f1* %Q ; <%f1> [#uses=1]
+ %R = fadd %f1 %p, %q ; <%f1> [#uses=1]
+ store %f1 %R, %f1* %S
+ ret void
+}
+
+define void @test_f2(%f2* %P, %f2* %Q, %f2* %S) {
+ %p = load %f2* %P ; <%f2> [#uses=1]
+ %q = load %f2* %Q ; <%f2> [#uses=1]
+ %R = fadd %f2 %p, %q ; <%f2> [#uses=1]
+ store %f2 %R, %f2* %S
+ ret void
+}
+
+define void @test_f4(%f4* %P, %f4* %Q, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %q = load %f4* %Q ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, %q ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+define void @test_div(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fdiv %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+;;; TEST VECTOR CONSTRUCTS
+
+
+define void @test_cst(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float 2.000000e+00, float 4.500000e+00 > ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_zero(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, zeroinitializer ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_undef(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, undef ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_constant_insert(%f4* %S) {
+ %R = insertelement %f4 zeroinitializer, float 1.000000e+01, i32 0 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_variable_buildvector(float %F, %f4* %S) {
+ %R = insertelement %f4 zeroinitializer, float %F, i32 0 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_scalar_to_vector(float %F, %f4* %S) {
+ %R = insertelement %f4 undef, float %F, i32 0 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define float @test_extract_elt(%f8* %P) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %R = extractelement %f8 %p, i32 3 ; <float> [#uses=1]
+ ret float %R
+}
+
+define double @test_extract_elt2(%d8* %P) {
+ %p = load %d8* %P ; <%d8> [#uses=1]
+ %R = extractelement %d8 %p, i32 3 ; <double> [#uses=1]
+ ret double %R
+}
+
+define void @test_cast_1(%f4* %b, %i4* %a) {
+ %tmp = load %f4* %b ; <%f4> [#uses=1]
+ %tmp2 = fadd %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 > ; <%f4> [#uses=1]
+ %tmp3 = bitcast %f4 %tmp2 to %i4 ; <%i4> [#uses=1]
+ %tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 > ; <%i4> [#uses=1]
+ store %i4 %tmp4, %i4* %a
+ ret void
+}
+
+define void @test_cast_2(%f8* %a, <8 x i32>* %b) {
+ %T = load %f8* %a ; <%f8> [#uses=1]
+ %T2 = bitcast %f8 %T to <8 x i32> ; <<8 x i32>> [#uses=1]
+ store <8 x i32> %T2, <8 x i32>* %b
+ ret void
+}
+
+;;; TEST IMPORTANT IDIOMS
+
+define void @splat(%f4* %P, %f4* %Q, float %X) {
+ %tmp = insertelement %f4 undef, float %X, i32 0 ; <%f4> [#uses=1]
+ %tmp2 = insertelement %f4 %tmp, float %X, i32 1 ; <%f4> [#uses=1]
+ %tmp4 = insertelement %f4 %tmp2, float %X, i32 2 ; <%f4> [#uses=1]
+ %tmp6 = insertelement %f4 %tmp4, float %X, i32 3 ; <%f4> [#uses=1]
+ %q = load %f4* %Q ; <%f4> [#uses=1]
+ %R = fadd %f4 %q, %tmp6 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %P
+ ret void
+}
+
+define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) {
+ %tmp = insertelement %i4 undef, i32 %X, i32 0 ; <%i4> [#uses=1]
+ %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 ; <%i4> [#uses=1]
+ %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 ; <%i4> [#uses=1]
+ %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1]
+ %q = load %i4* %Q ; <%i4> [#uses=1]
+ %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1]
+ store %i4 %R, %i4* %P
+ ret void
+}
diff --git a/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll b/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
new file mode 100644
index 0000000..f339373
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s
+; PR4136
+
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-unknown-linux-gnu"
+@uip_len = external global i16 ; <i16*> [#uses=2]
+
+define void @uip_arp_arpin() nounwind {
+entry:
+ %tmp = volatile load i16* @uip_len ; <i16> [#uses=1]
+ %cmp = icmp ult i16 %tmp, 42 ; <i1> [#uses=1]
+ volatile store i16 0, i16* @uip_len
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ ret void
+
+if.end: ; preds = %entry
+ switch i16 0, label %return [
+ i16 256, label %sw.bb
+ i16 512, label %sw.bb18
+ ]
+
+sw.bb: ; preds = %if.end
+ ret void
+
+sw.bb18: ; preds = %if.end
+ ret void
+
+return: ; preds = %if.end
+ ret void
+}
diff --git a/test/CodeGen/MSP430/2009-05-17-Rot.ll b/test/CodeGen/MSP430/2009-05-17-Rot.ll
new file mode 100644
index 0000000..2ae0052
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-05-17-Rot.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=msp430
+
+define i16 @rol1u16(i16 %x.arg) nounwind {
+ %retval = alloca i16
+ %x = alloca i16
+ store i16 %x.arg, i16* %x
+ %1 = load i16* %x
+ %2 = shl i16 %1, 1
+ %3 = load i16* %x
+ %4 = lshr i16 %3, 15
+ %5 = or i16 %2, %4
+ store i16 %5, i16* %retval
+ br label %return
+return:
+ %6 = load i16* %retval
+ ret i16 %6
+}
\ No newline at end of file
diff --git a/test/CodeGen/MSP430/2009-05-17-Shift.ll b/test/CodeGen/MSP430/2009-05-17-Shift.ll
new file mode 100644
index 0000000..25aff60
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-05-17-Shift.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=msp430 | grep rra | count 1
+
+define i16 @lsr2u16(i16 %x.arg) nounwind {
+ %retval = alloca i16
+ %x = alloca i16
+ store i16 %x.arg, i16* %x
+ %1 = load i16* %x
+ %2 = lshr i16 %1, 2
+ store i16 %2, i16* %retval
+ br label %return
+return:
+ %3 = load i16* %retval
+ ret i16 %3
+
+}
\ No newline at end of file
diff --git a/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll b/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll
new file mode 100644
index 0000000..54eb7ff
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=msp430
+
+define i16 @test(double %d) nounwind {
+entry:
+ %add = fadd double %d, 1.000000e+00
+ %call = tail call i16 @funct(double %add) nounwind
+ ret i16 %call
+}
+
+declare i16 @funct(double)
+
diff --git a/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll b/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
new file mode 100644
index 0000000..088d3e1
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s
+; PR4769
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+define i16 @foo() nounwind readnone {
+entry:
+ %result = alloca i16, align 1 ; <i16*> [#uses=2]
+ volatile store i16 0, i16* %result
+ %tmp = volatile load i16* %result ; <i16> [#uses=1]
+ ret i16 %tmp
+}
+
+define i16 @main() nounwind {
+entry:
+ br label %while.cond
+
+while.cond: ; preds = %while.cond, %entry
+ %call = call i16 @bar() nounwind ; <i16> [#uses=1]
+ %tobool = icmp eq i16 %call, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %while.end, label %while.cond
+
+while.end: ; preds = %while.cond
+ %result.i = alloca i16, align 1 ; <i16*> [#uses=2]
+ volatile store i16 0, i16* %result.i
+ %tmp.i = volatile load i16* %result.i ; <i16> [#uses=0]
+ ret i16 0
+}
+
+declare i16 @bar()
diff --git a/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll b/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
new file mode 100644
index 0000000..4d7d9b9
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s | grep 0x0021 | count 2
+; PR4776
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-unknown-unknown"
+
+@"\010x0021" = external global i8, align 1 ; <i8*> [#uses=2]
+
+define zeroext i8 @foo(i8 zeroext %x) nounwind {
+entry:
+ %retval = alloca i8 ; <i8*> [#uses=2]
+ %x.addr = alloca i8 ; <i8*> [#uses=2]
+ %tmp = alloca i8, align 1 ; <i8*> [#uses=2]
+ store i8 %x, i8* %x.addr
+ %tmp1 = volatile load i8* @"\010x0021" ; <i8> [#uses=1]
+ store i8 %tmp1, i8* %tmp
+ %tmp2 = load i8* %x.addr ; <i8> [#uses=1]
+ volatile store i8 %tmp2, i8* @"\010x0021"
+ %tmp3 = load i8* %tmp ; <i8> [#uses=1]
+ store i8 %tmp3, i8* %retval
+ %0 = load i8* %retval ; <i8> [#uses=1]
+ ret i8 %0
+}
diff --git a/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll b/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
new file mode 100644
index 0000000..856eb9d
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
@@ -0,0 +1,14 @@
+; RUN: llc -march=msp430 < %s
+; PR4779
+define void @foo() nounwind {
+entry:
+ %r = alloca i8 ; <i8*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ volatile load i8* %r, align 1 ; <i8>:0 [#uses=1]
+ or i8 %0, 1 ; <i8>:1 [#uses=1]
+ volatile store i8 %1, i8* %r, align 1
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll b/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll
new file mode 100644
index 0000000..94fe5c7
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-elf"
+
+@g_29 = common global i8 0, align 1 ; <i8*> [#uses=0]
+
+define signext i8 @foo(i8 signext %_si1, i8 signext %_si2) nounwind readnone {
+entry:
+; CHECK: foo:
+; CHECK: call #__mulqi3
+ %mul = mul i8 %_si2, %_si1 ; <i8> [#uses=1]
+ ret i8 %mul
+}
+
+define void @uint81(i16* nocapture %p_32) nounwind {
+entry:
+ %call = tail call i16 @bar(i8* bitcast (i8 (i8, i8)* @foo to i8*)) nounwind ; <i16> [#uses=0]
+ ret void
+}
+
+declare i16 @bar(i8*)
diff --git a/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll b/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
new file mode 100644
index 0000000..d232aea
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
@@ -0,0 +1,64 @@
+; RUN: llc < %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-elf"
+
+%struct.httpd_fs_file = type { i8*, i16 }
+%struct.psock = type { %struct.pt, %struct.pt, i8*, i8*, i8*, i16, i16, %struct.httpd_fs_file, i16, i8, i8 }
+%struct.pt = type { i16 }
+
+@foo = external global i8*
+
+define signext i8 @psock_readto(%struct.psock* nocapture %psock, i8 zeroext %c) nounwind {
+entry:
+ switch i16 undef, label %sw.epilog [
+ i16 0, label %sw.bb
+ i16 283, label %if.else.i
+ ]
+
+sw.bb: ; preds = %entry
+ br label %do.body
+
+do.body: ; preds = %while.cond36.i, %while.end.i, %sw.bb
+ br label %while.cond.i
+
+if.else.i: ; preds = %entry
+ br i1 undef, label %psock_newdata.exit, label %if.else11.i
+
+if.else11.i: ; preds = %if.else.i
+ ret i8 0
+
+psock_newdata.exit: ; preds = %if.else.i
+ ret i8 0
+
+while.cond.i: ; preds = %while.body.i, %do.body
+ br i1 undef, label %while.end.i, label %while.body.i
+
+while.body.i: ; preds = %while.cond.i
+ br i1 undef, label %do.end41, label %while.cond.i
+
+while.end.i: ; preds = %while.cond.i
+ br i1 undef, label %do.body, label %while.cond36.i.preheader
+
+while.cond36.i.preheader: ; preds = %while.end.i
+ br label %while.cond36.i
+
+while.cond36.i: ; preds = %while.body41.i, %while.cond36.i.preheader
+ br i1 undef, label %do.body, label %while.body41.i
+
+while.body41.i: ; preds = %while.cond36.i
+ %tmp43.i = load i8** @foo ; <i8*> [#uses=2]
+ %tmp44.i = load i8* %tmp43.i ; <i8> [#uses=1]
+ %ptrincdec50.i = getelementptr inbounds i8* %tmp43.i, i16 1 ; <i8*> [#uses=1]
+ store i8* %ptrincdec50.i, i8** @foo
+ %cmp55.i = icmp eq i8 %tmp44.i, %c ; <i1> [#uses=1]
+ br i1 %cmp55.i, label %do.end41, label %while.cond36.i
+
+do.end41: ; preds = %while.body41.i, %while.body.i
+ br i1 undef, label %if.then46, label %sw.epilog
+
+if.then46: ; preds = %do.end41
+ ret i8 0
+
+sw.epilog: ; preds = %do.end41, %entry
+ ret i8 2
+}
diff --git a/test/CodeGen/MSP430/2009-11-20-NewNode.ll b/test/CodeGen/MSP430/2009-11-20-NewNode.ll
new file mode 100644
index 0000000..887c7d6
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-11-20-NewNode.ll
@@ -0,0 +1,36 @@
+; RUN: llc -march=msp430 < %s
+; PR5558
+
+define i64 @_strtoll_r(i16 %base) nounwind {
+entry:
+ br i1 undef, label %if.then, label %if.end27
+
+if.then: ; preds = %do.end
+ br label %if.end27
+
+if.end27: ; preds = %if.then, %do.end
+ %cond66 = select i1 undef, i64 -9223372036854775808, i64 9223372036854775807 ; <i64> [#uses=3]
+ %conv69 = sext i16 %base to i64 ; <i64> [#uses=1]
+ %div = udiv i64 %cond66, %conv69 ; <i64> [#uses=1]
+ br label %for.cond
+
+for.cond: ; preds = %if.end116, %if.end27
+ br i1 undef, label %if.then152, label %if.then93
+
+if.then93: ; preds = %for.cond
+ br i1 undef, label %if.end116, label %if.then152
+
+if.end116: ; preds = %if.then93
+ %cmp123 = icmp ugt i64 undef, %div ; <i1> [#uses=1]
+ %or.cond = or i1 undef, %cmp123 ; <i1> [#uses=0]
+ br label %for.cond
+
+if.then152: ; preds = %if.then93, %for.cond
+ br i1 undef, label %if.end182, label %if.then172
+
+if.then172: ; preds = %if.then152
+ ret i64 %cond66
+
+if.end182: ; preds = %if.then152
+ ret i64 %cond66
+}
diff --git a/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll b/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll
new file mode 100644
index 0000000..b92477b
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s
+; PR5703
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-unknown-linux-gnu"
+
+define msp430_intrcc void @foo() nounwind {
+entry:
+ %fa = call i16* @llvm.frameaddress(i32 0)
+ store i16 0, i16* %fa
+ ret void
+}
+
+declare i16* @llvm.frameaddress(i32)
diff --git a/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll b/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll
new file mode 100644
index 0000000..a9df1a3e
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s
+; PR 5570
+; ModuleID = 'test.c'
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8:16"
+target triple = "msp430-unknown-unknown"
+
+@buf = common global [10 x i8] zeroinitializer, align 1 ; <[10 x i8]*> [#uses=2]
+
+define i16 @main() noreturn nounwind {
+entry:
+ %0 = tail call i8* asm "", "=r,0"(i8* getelementptr inbounds ([10 x i8]* @buf, i16 0, i16 0)) nounwind ; <i8*> [#uses=1]
+ %sub.ptr = getelementptr inbounds i8* %0, i16 1 ; <i8*> [#uses=1]
+ %sub.ptr.lhs.cast = ptrtoint i8* %sub.ptr to i16 ; <i16> [#uses=1]
+ %sub.ptr.sub = sub i16 %sub.ptr.lhs.cast, ptrtoint ([10 x i8]* @buf to i16) ; <i16> [#uses=1]
+ %cmp = icmp eq i16 %sub.ptr.sub, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %bar.exit, label %if.then.i
+
+if.then.i: ; preds = %entry
+ tail call void @abort() nounwind
+ br label %bar.exit
+
+bar.exit: ; preds = %entry, %if.then.i
+ tail call void @exit(i16 0) nounwind
+ unreachable
+}
+
+declare void @exit(i16) noreturn
+
+declare void @abort()
diff --git a/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/test/CodeGen/MSP430/AddrMode-bis-rx.ll
new file mode 100644
index 0000000..3340494
--- /dev/null
+++ b/test/CodeGen/MSP430/AddrMode-bis-rx.ll
@@ -0,0 +1,74 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
+target triple = "msp430-generic-generic"
+
+define i16 @am1(i16 %x, i16* %a) nounwind {
+ %1 = load i16* %a
+ %2 = or i16 %1,%x
+ ret i16 %2
+}
+; CHECK: am1:
+; CHECK: bis.w 0(r14), r15
+
+@foo = external global i16
+
+define i16 @am2(i16 %x) nounwind {
+ %1 = load i16* @foo
+ %2 = or i16 %1,%x
+ ret i16 %2
+}
+; CHECK: am2:
+; CHECK: bis.w &foo, r15
+
+@bar = internal constant [2 x i8] [ i8 32, i8 64 ]
+
+define i8 @am3(i8 %x, i16 %n) nounwind {
+ %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %n
+ %2 = load i8* %1
+ %3 = or i8 %2,%x
+ ret i8 %3
+}
+; CHECK: am3:
+; CHECK: bis.b &bar(r14), r15
+
+define i16 @am4(i16 %x) nounwind {
+ %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ %2 = or i16 %1,%x
+ ret i16 %2
+}
+; CHECK: am4:
+; CHECK: bis.w &32, r15
+
+define i16 @am5(i16 %x, i16* %a) nounwind {
+ %1 = getelementptr i16* %a, i16 2
+ %2 = load i16* %1
+ %3 = or i16 %2,%x
+ ret i16 %3
+}
+; CHECK: am5:
+; CHECK: bis.w 4(r14), r15
+
+%S = type { i16, i16 }
+@baz = common global %S zeroinitializer, align 1
+
+define i16 @am6(i16 %x) nounwind {
+ %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ %2 = or i16 %1,%x
+ ret i16 %2
+}
+; CHECK: am6:
+; CHECK: bis.w &baz+2, r15
+
+%T = type { i16, [2 x i8] }
+@duh = internal constant %T { i16 16, [2 x i8][i8 32, i8 64 ] }
+
+define i8 @am7(i8 %x, i16 %n) nounwind {
+ %1 = getelementptr %T* @duh, i32 0, i32 1
+ %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n
+ %3= load i8* %2
+ %4 = or i8 %3,%x
+ ret i8 %4
+}
+; CHECK: am7:
+; CHECK: bis.b &duh+2(r14), r15
+
diff --git a/test/CodeGen/MSP430/AddrMode-bis-xr.ll b/test/CodeGen/MSP430/AddrMode-bis-xr.ll
new file mode 100644
index 0000000..ca79fb6
--- /dev/null
+++ b/test/CodeGen/MSP430/AddrMode-bis-xr.ll
@@ -0,0 +1,81 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:16"
+target triple = "msp430-generic-generic"
+
+define void @am1(i16* %a, i16 %x) nounwind {
+ %1 = load i16* %a
+ %2 = or i16 %x, %1
+ store i16 %2, i16* %a
+ ret void
+}
+; CHECK: am1:
+; CHECK: bis.w r14, 0(r15)
+
+@foo = external global i16
+
+define void @am2(i16 %x) nounwind {
+ %1 = load i16* @foo
+ %2 = or i16 %x, %1
+ store i16 %2, i16* @foo
+ ret void
+}
+; CHECK: am2:
+; CHECK: bis.w r15, &foo
+
+@bar = external global [2 x i8]
+
+define void @am3(i16 %i, i8 %x) nounwind {
+ %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %i
+ %2 = load i8* %1
+ %3 = or i8 %x, %2
+ store i8 %3, i8* %1
+ ret void
+}
+; CHECK: am3:
+; CHECK: bis.b r14, &bar(r15)
+
+define void @am4(i16 %x) nounwind {
+ %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ %2 = or i16 %x, %1
+ volatile store i16 %2, i16* inttoptr(i16 32 to i16*)
+ ret void
+}
+; CHECK: am4:
+; CHECK: bis.w r15, &32
+
+define void @am5(i16* %a, i16 %x) readonly {
+ %1 = getelementptr inbounds i16* %a, i16 2
+ %2 = load i16* %1
+ %3 = or i16 %x, %2
+ store i16 %3, i16* %1
+ ret void
+}
+; CHECK: am5:
+; CHECK: bis.w r14, 4(r15)
+
+%S = type { i16, i16 }
+@baz = common global %S zeroinitializer
+
+define void @am6(i16 %x) nounwind {
+ %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ %2 = or i16 %x, %1
+ store i16 %2, i16* getelementptr (%S* @baz, i32 0, i32 1)
+ ret void
+}
+; CHECK: am6:
+; CHECK: bis.w r15, &baz+2
+
+%T = type { i16, [2 x i8] }
+@duh = external global %T
+
+define void @am7(i16 %n, i8 %x) nounwind {
+ %1 = getelementptr %T* @duh, i32 0, i32 1
+ %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n
+ %3 = load i8* %2
+ %4 = or i8 %x, %3
+ store i8 %4, i8* %2
+ ret void
+}
+; CHECK: am7:
+; CHECK: bis.b r14, &duh+2(r15)
+
diff --git a/test/CodeGen/MSP430/AddrMode-mov-rx.ll b/test/CodeGen/MSP430/AddrMode-mov-rx.ll
new file mode 100644
index 0000000..67cbb02
--- /dev/null
+++ b/test/CodeGen/MSP430/AddrMode-mov-rx.ll
@@ -0,0 +1,67 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
+target triple = "msp430-generic-generic"
+
+define i16 @am1(i16* %a) nounwind {
+ %1 = load i16* %a
+ ret i16 %1
+}
+; CHECK: am1:
+; CHECK: mov.w 0(r15), r15
+
+@foo = external global i16
+
+define i16 @am2() nounwind {
+ %1 = load i16* @foo
+ ret i16 %1
+}
+; CHECK: am2:
+; CHECK: mov.w &foo, r15
+
+@bar = internal constant [2 x i8] [ i8 32, i8 64 ]
+
+define i8 @am3(i16 %n) nounwind {
+ %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %n
+ %2 = load i8* %1
+ ret i8 %2
+}
+; CHECK: am3:
+; CHECK: mov.b &bar(r15), r15
+
+define i16 @am4() nounwind {
+ %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ ret i16 %1
+}
+; CHECK: am4:
+; CHECK: mov.w &32, r15
+
+define i16 @am5(i16* %a) nounwind {
+ %1 = getelementptr i16* %a, i16 2
+ %2 = load i16* %1
+ ret i16 %2
+}
+; CHECK: am5:
+; CHECK: mov.w 4(r15), r15
+
+%S = type { i16, i16 }
+@baz = common global %S zeroinitializer, align 1
+
+define i16 @am6() nounwind {
+ %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ ret i16 %1
+}
+; CHECK: am6:
+; CHECK: mov.w &baz+2, r15
+
+%T = type { i16, [2 x i8] }
+@duh = internal constant %T { i16 16, [2 x i8][i8 32, i8 64 ] }
+
+define i8 @am7(i16 %n) nounwind {
+ %1 = getelementptr %T* @duh, i32 0, i32 1
+ %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n
+ %3= load i8* %2
+ ret i8 %3
+}
+; CHECK: am7:
+; CHECK: mov.b &duh+2(r15), r15
+
diff --git a/test/CodeGen/MSP430/AddrMode-mov-xr.ll b/test/CodeGen/MSP430/AddrMode-mov-xr.ll
new file mode 100644
index 0000000..b8155d3
--- /dev/null
+++ b/test/CodeGen/MSP430/AddrMode-mov-xr.ll
@@ -0,0 +1,67 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
+target triple = "msp430-generic-generic"
+
+define void @am1(i16* %a, i16 %b) nounwind {
+ store i16 %b, i16* %a
+ ret void
+}
+; CHECK: am1:
+; CHECK: mov.w r14, 0(r15)
+
+@foo = external global i16
+
+define void @am2(i16 %a) nounwind {
+ store i16 %a, i16* @foo
+ ret void
+}
+; CHECK: am2:
+; CHECK: mov.w r15, &foo
+
+@bar = external global [2 x i8]
+
+define void @am3(i16 %i, i8 %a) nounwind {
+ %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %i
+ store i8 %a, i8* %1
+ ret void
+}
+; CHECK: am3:
+; CHECK: mov.b r14, &bar(r15)
+
+define void @am4(i16 %a) nounwind {
+ volatile store i16 %a, i16* inttoptr(i16 32 to i16*)
+ ret void
+}
+; CHECK: am4:
+; CHECK: mov.w r15, &32
+
+define void @am5(i16* nocapture %p, i16 %a) nounwind readonly {
+ %1 = getelementptr inbounds i16* %p, i16 2
+ store i16 %a, i16* %1
+ ret void
+}
+; CHECK: am5:
+; CHECK: mov.w r14, 4(r15)
+
+%S = type { i16, i16 }
+@baz = common global %S zeroinitializer, align 1
+
+define void @am6(i16 %a) nounwind {
+ store i16 %a, i16* getelementptr (%S* @baz, i32 0, i32 1)
+ ret void
+}
+; CHECK: am6:
+; CHECK: mov.w r15, &baz+2
+
+%T = type { i16, [2 x i8] }
+@duh = external global %T
+
+define void @am7(i16 %n, i8 %a) nounwind {
+ %1 = getelementptr %T* @duh, i32 0, i32 1
+ %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n
+ store i8 %a, i8* %2
+ ret void
+}
+; CHECK: am7:
+; CHECK: mov.b r14, &duh+2(r15)
+
diff --git a/test/CodeGen/MSP430/Inst16mi.ll b/test/CodeGen/MSP430/Inst16mi.ll
new file mode 100644
index 0000000..33d7aa4
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst16mi.ll
@@ -0,0 +1,48 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+@foo = common global i16 0, align 2
+
+define void @mov() nounwind {
+; CHECK: mov:
+; CHECK: mov.w #2, &foo
+ store i16 2, i16 * @foo
+ ret void
+}
+
+define void @add() nounwind {
+; CHECK: add:
+; CHECK: add.w #2, &foo
+ %1 = load i16* @foo
+ %2 = add i16 %1, 2
+ store i16 %2, i16 * @foo
+ ret void
+}
+
+define void @and() nounwind {
+; CHECK: and:
+; CHECK: and.w #2, &foo
+ %1 = load i16* @foo
+ %2 = and i16 %1, 2
+ store i16 %2, i16 * @foo
+ ret void
+}
+
+define void @bis() nounwind {
+; CHECK: bis:
+; CHECK: bis.w #2, &foo
+ %1 = load i16* @foo
+ %2 = or i16 %1, 2
+ store i16 %2, i16 * @foo
+ ret void
+}
+
+define void @xor() nounwind {
+; CHECK: xor:
+; CHECK: xor.w #2, &foo
+ %1 = load i16* @foo
+ %2 = xor i16 %1, 2
+ store i16 %2, i16 * @foo
+ ret void
+}
diff --git a/test/CodeGen/MSP430/Inst16mm.ll b/test/CodeGen/MSP430/Inst16mm.ll
new file mode 100644
index 0000000..510afe3
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst16mm.ll
@@ -0,0 +1,54 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+@foo = common global i16 0, align 2
+@bar = common global i16 0, align 2
+
+define void @mov() nounwind {
+; CHECK: mov:
+; CHECK: mov.w &bar, &foo
+ %1 = load i16* @bar
+ store i16 %1, i16* @foo
+ ret void
+}
+
+define void @add() nounwind {
+; CHECK: add:
+; CHECK: add.w &bar, &foo
+ %1 = load i16* @bar
+ %2 = load i16* @foo
+ %3 = add i16 %2, %1
+ store i16 %3, i16* @foo
+ ret void
+}
+
+define void @and() nounwind {
+; CHECK: and:
+; CHECK: and.w &bar, &foo
+ %1 = load i16* @bar
+ %2 = load i16* @foo
+ %3 = and i16 %2, %1
+ store i16 %3, i16* @foo
+ ret void
+}
+
+define void @bis() nounwind {
+; CHECK: bis:
+; CHECK: bis.w &bar, &foo
+ %1 = load i16* @bar
+ %2 = load i16* @foo
+ %3 = or i16 %2, %1
+ store i16 %3, i16* @foo
+ ret void
+}
+
+define void @xor() nounwind {
+; CHECK: xor:
+; CHECK: xor.w &bar, &foo
+ %1 = load i16* @bar
+ %2 = load i16* @foo
+ %3 = xor i16 %2, %1
+ store i16 %3, i16* @foo
+ ret void
+}
+
diff --git a/test/CodeGen/MSP430/Inst16mr.ll b/test/CodeGen/MSP430/Inst16mr.ll
new file mode 100644
index 0000000..2613f01
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst16mr.ll
@@ -0,0 +1,58 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+@foo = common global i16 0, align 2
+
+define void @mov(i16 %a) nounwind {
+; CHECK: mov:
+; CHECK: mov.w r15, &foo
+ store i16 %a, i16* @foo
+ ret void
+}
+
+define void @add(i16 %a) nounwind {
+; CHECK: add:
+; CHECK: add.w r15, &foo
+ %1 = load i16* @foo
+ %2 = add i16 %a, %1
+ store i16 %2, i16* @foo
+ ret void
+}
+
+define void @and(i16 %a) nounwind {
+; CHECK: and:
+; CHECK: and.w r15, &foo
+ %1 = load i16* @foo
+ %2 = and i16 %a, %1
+ store i16 %2, i16* @foo
+ ret void
+}
+
+define void @bis(i16 %a) nounwind {
+; CHECK: bis:
+; CHECK: bis.w r15, &foo
+ %1 = load i16* @foo
+ %2 = or i16 %a, %1
+ store i16 %2, i16* @foo
+ ret void
+}
+
+define void @bic(i16 zeroext %m) nounwind {
+; CHECK: bic:
+; CHECK: bic.w r15, &foo
+ %1 = xor i16 %m, -1
+ %2 = load i16* @foo
+ %3 = and i16 %2, %1
+ store i16 %3, i16* @foo
+ ret void
+}
+
+define void @xor(i16 %a) nounwind {
+; CHECK: xor:
+; CHECK: xor.w r15, &foo
+ %1 = load i16* @foo
+ %2 = xor i16 %a, %1
+ store i16 %2, i16* @foo
+ ret void
+}
+
diff --git a/test/CodeGen/MSP430/Inst16ri.ll b/test/CodeGen/MSP430/Inst16ri.ll
new file mode 100644
index 0000000..5115a23
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst16ri.ll
@@ -0,0 +1,37 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+define i16 @mov() nounwind {
+; CHECK: mov:
+; CHECK: mov.w #1, r15
+ ret i16 1
+}
+
+define i16 @add(i16 %a, i16 %b) nounwind {
+; CHECK: add:
+; CHECK: add.w #1, r15
+ %1 = add i16 %a, 1
+ ret i16 %1
+}
+
+define i16 @and(i16 %a, i16 %b) nounwind {
+; CHECK: and:
+; CHECK: and.w #1, r15
+ %1 = and i16 %a, 1
+ ret i16 %1
+}
+
+define i16 @bis(i16 %a, i16 %b) nounwind {
+; CHECK: bis:
+; CHECK: bis.w #1, r15
+ %1 = or i16 %a, 1
+ ret i16 %1
+}
+
+define i16 @xor(i16 %a, i16 %b) nounwind {
+; CHECK: xor:
+; CHECK: xor.w #1, r15
+ %1 = xor i16 %a, 1
+ ret i16 %1
+}
diff --git a/test/CodeGen/MSP430/Inst16rm.ll b/test/CodeGen/MSP430/Inst16rm.ll
new file mode 100644
index 0000000..02e89c7
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst16rm.ll
@@ -0,0 +1,46 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+@foo = common global i16 0, align 2
+
+define i16 @add(i16 %a) nounwind {
+; CHECK: add:
+; CHECK: add.w &foo, r15
+ %1 = load i16* @foo
+ %2 = add i16 %a, %1
+ ret i16 %2
+}
+
+define i16 @and(i16 %a) nounwind {
+; CHECK: and:
+; CHECK: and.w &foo, r15
+ %1 = load i16* @foo
+ %2 = and i16 %a, %1
+ ret i16 %2
+}
+
+define i16 @bis(i16 %a) nounwind {
+; CHECK: bis:
+; CHECK: bis.w &foo, r15
+ %1 = load i16* @foo
+ %2 = or i16 %a, %1
+ ret i16 %2
+}
+
+define i16 @bic(i16 %a) nounwind {
+; CHECK: bic:
+; CHECK: bic.w &foo, r15
+ %1 = load i16* @foo
+ %2 = xor i16 %1, -1
+ %3 = and i16 %a, %2
+ ret i16 %3
+}
+
+define i16 @xor(i16 %a) nounwind {
+; CHECK: xor:
+; CHECK: xor.w &foo, r15
+ %1 = load i16* @foo
+ %2 = xor i16 %a, %1
+ ret i16 %2
+}
+
diff --git a/test/CodeGen/MSP430/Inst16rr.ll b/test/CodeGen/MSP430/Inst16rr.ll
new file mode 100644
index 0000000..2f1ba5b4
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst16rr.ll
@@ -0,0 +1,45 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+define i16 @mov(i16 %a, i16 %b) nounwind {
+; CHECK: mov:
+; CHECK: mov.w r14, r15
+ ret i16 %b
+}
+
+define i16 @add(i16 %a, i16 %b) nounwind {
+; CHECK: add:
+; CHECK: add.w r14, r15
+ %1 = add i16 %a, %b
+ ret i16 %1
+}
+
+define i16 @and(i16 %a, i16 %b) nounwind {
+; CHECK: and:
+; CHECK: and.w r14, r15
+ %1 = and i16 %a, %b
+ ret i16 %1
+}
+
+define i16 @bis(i16 %a, i16 %b) nounwind {
+; CHECK: bis:
+; CHECK: bis.w r14, r15
+ %1 = or i16 %a, %b
+ ret i16 %1
+}
+
+define i16 @bic(i16 %a, i16 %b) nounwind {
+; CHECK: bic:
+; CHECK: bic.w r14, r15
+ %1 = xor i16 %b, -1
+ %2 = and i16 %a, %1
+ ret i16 %2
+}
+
+define i16 @xor(i16 %a, i16 %b) nounwind {
+; CHECK: xor:
+; CHECK: xor.w r14, r15
+ %1 = xor i16 %a, %b
+ ret i16 %1
+}
diff --git a/test/CodeGen/MSP430/Inst8mi.ll b/test/CodeGen/MSP430/Inst8mi.ll
new file mode 100644
index 0000000..ef318ce
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst8mi.ll
@@ -0,0 +1,48 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i8:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+@foo = common global i8 0, align 1
+
+define void @mov() nounwind {
+; CHECK: mov:
+; CHECK: mov.b #2, &foo
+ store i8 2, i8 * @foo
+ ret void
+}
+
+define void @add() nounwind {
+; CHECK: add:
+; CHECK: add.b #2, &foo
+ %1 = load i8* @foo
+ %2 = add i8 %1, 2
+ store i8 %2, i8 * @foo
+ ret void
+}
+
+define void @and() nounwind {
+; CHECK: and:
+; CHECK: and.b #2, &foo
+ %1 = load i8* @foo
+ %2 = and i8 %1, 2
+ store i8 %2, i8 * @foo
+ ret void
+}
+
+define void @bis() nounwind {
+; CHECK: bis:
+; CHECK: bis.b #2, &foo
+ %1 = load i8* @foo
+ %2 = or i8 %1, 2
+ store i8 %2, i8 * @foo
+ ret void
+}
+
+define void @xor() nounwind {
+; CHECK: xor:
+; CHECK: xor.b #2, &foo
+ %1 = load i8* @foo
+ %2 = xor i8 %1, 2
+ store i8 %2, i8 * @foo
+ ret void
+}
+
diff --git a/test/CodeGen/MSP430/Inst8mm.ll b/test/CodeGen/MSP430/Inst8mm.ll
new file mode 100644
index 0000000..a2987ac
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst8mm.ll
@@ -0,0 +1,55 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+@foo = common global i8 0, align 1
+@bar = common global i8 0, align 1
+
+define void @mov() nounwind {
+; CHECK: mov:
+; CHECK: mov.b &bar, &foo
+ %1 = load i8* @bar
+ store i8 %1, i8* @foo
+ ret void
+}
+
+define void @add() nounwind {
+; CHECK: add:
+; CHECK: add.b &bar, &foo
+ %1 = load i8* @bar
+ %2 = load i8* @foo
+ %3 = add i8 %2, %1
+ store i8 %3, i8* @foo
+ ret void
+}
+
+define void @and() nounwind {
+; CHECK: and:
+; CHECK: and.b &bar, &foo
+ %1 = load i8* @bar
+ %2 = load i8* @foo
+ %3 = and i8 %2, %1
+ store i8 %3, i8* @foo
+ ret void
+}
+
+define void @bis() nounwind {
+; CHECK: bis:
+; CHECK: bis.b &bar, &foo
+ %1 = load i8* @bar
+ %2 = load i8* @foo
+ %3 = or i8 %2, %1
+ store i8 %3, i8* @foo
+ ret void
+}
+
+define void @xor() nounwind {
+; CHECK: xor:
+; CHECK: xor.b &bar, &foo
+ %1 = load i8* @bar
+ %2 = load i8* @foo
+ %3 = xor i8 %2, %1
+ store i8 %3, i8* @foo
+ ret void
+}
+
diff --git a/test/CodeGen/MSP430/Inst8mr.ll b/test/CodeGen/MSP430/Inst8mr.ll
new file mode 100644
index 0000000..428d1fa
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst8mr.ll
@@ -0,0 +1,58 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+@foo = common global i8 0, align 1
+
+define void @mov(i8 %a) nounwind {
+; CHECK: mov:
+; CHECK: mov.b r15, &foo
+ store i8 %a, i8* @foo
+ ret void
+}
+
+define void @and(i8 %a) nounwind {
+; CHECK: and:
+; CHECK: and.b r15, &foo
+ %1 = load i8* @foo
+ %2 = and i8 %a, %1
+ store i8 %2, i8* @foo
+ ret void
+}
+
+define void @add(i8 %a) nounwind {
+; CHECK: add:
+; CHECK: add.b r15, &foo
+ %1 = load i8* @foo
+ %2 = add i8 %a, %1
+ store i8 %2, i8* @foo
+ ret void
+}
+
+define void @bis(i8 %a) nounwind {
+; CHECK: bis:
+; CHECK: bis.b r15, &foo
+ %1 = load i8* @foo
+ %2 = or i8 %a, %1
+ store i8 %2, i8* @foo
+ ret void
+}
+
+define void @bic(i8 zeroext %m) nounwind {
+; CHECK: bic:
+; CHECK: bic.b r15, &foo
+ %1 = xor i8 %m, -1
+ %2 = load i8* @foo
+ %3 = and i8 %2, %1
+ store i8 %3, i8* @foo
+ ret void
+}
+
+define void @xor(i8 %a) nounwind {
+; CHECK: xor:
+; CHECK: xor.b r15, &foo
+ %1 = load i8* @foo
+ %2 = xor i8 %a, %1
+ store i8 %2, i8* @foo
+ ret void
+}
+
diff --git a/test/CodeGen/MSP430/Inst8ri.ll b/test/CodeGen/MSP430/Inst8ri.ll
new file mode 100644
index 0000000..ac3418a
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst8ri.ll
@@ -0,0 +1,37 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+define i8 @mov() nounwind {
+; CHECK: mov:
+; CHECK: mov.b #1, r15
+ ret i8 1
+}
+
+define i8 @add(i8 %a, i8 %b) nounwind {
+; CHECK: add:
+; CHECK: add.b #1, r15
+ %1 = add i8 %a, 1
+ ret i8 %1
+}
+
+define i8 @and(i8 %a, i8 %b) nounwind {
+; CHECK: and:
+; CHECK: and.b #1, r15
+ %1 = and i8 %a, 1
+ ret i8 %1
+}
+
+define i8 @bis(i8 %a, i8 %b) nounwind {
+; CHECK: bis:
+; CHECK: bis.b #1, r15
+ %1 = or i8 %a, 1
+ ret i8 %1
+}
+
+define i8 @xor(i8 %a, i8 %b) nounwind {
+; CHECK: xor:
+; CHECK: xor.b #1, r15
+ %1 = xor i8 %a, 1
+ ret i8 %1
+}
diff --git a/test/CodeGen/MSP430/Inst8rm.ll b/test/CodeGen/MSP430/Inst8rm.ll
new file mode 100644
index 0000000..c062f04
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst8rm.ll
@@ -0,0 +1,46 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i8:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+@foo = common global i8 0, align 1
+
+define i8 @add(i8 %a) nounwind {
+; CHECK: add:
+; CHECK: add.b &foo, r15
+ %1 = load i8* @foo
+ %2 = add i8 %a, %1
+ ret i8 %2
+}
+
+define i8 @and(i8 %a) nounwind {
+; CHECK: and:
+; CHECK: and.b &foo, r15
+ %1 = load i8* @foo
+ %2 = and i8 %a, %1
+ ret i8 %2
+}
+
+define i8 @bis(i8 %a) nounwind {
+; CHECK: bis:
+; CHECK: bis.b &foo, r15
+ %1 = load i8* @foo
+ %2 = or i8 %a, %1
+ ret i8 %2
+}
+
+define i8 @bic(i8 %a) nounwind {
+; CHECK: bic:
+; CHECK: bic.b &foo, r15
+ %1 = load i8* @foo
+ %2 = xor i8 %1, -1
+ %3 = and i8 %a, %2
+ ret i8 %3
+}
+
+define i8 @xor(i8 %a) nounwind {
+; CHECK: xor:
+; CHECK: xor.b &foo, r15
+ %1 = load i8* @foo
+ %2 = xor i8 %a, %1
+ ret i8 %2
+}
+
diff --git a/test/CodeGen/MSP430/Inst8rr.ll b/test/CodeGen/MSP430/Inst8rr.ll
new file mode 100644
index 0000000..74feaae
--- /dev/null
+++ b/test/CodeGen/MSP430/Inst8rr.ll
@@ -0,0 +1,46 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i8:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+define i8 @mov(i8 %a, i8 %b) nounwind {
+; CHECK: mov:
+; CHECK: mov.b r14, r15
+ ret i8 %b
+}
+
+define i8 @add(i8 %a, i8 %b) nounwind {
+; CHECK: add:
+; CHECK: add.b r14, r15
+ %1 = add i8 %a, %b
+ ret i8 %1
+}
+
+define i8 @and(i8 %a, i8 %b) nounwind {
+; CHECK: and:
+; CHECK: and.w r14, r15
+ %1 = and i8 %a, %b
+ ret i8 %1
+}
+
+define i8 @bis(i8 %a, i8 %b) nounwind {
+; CHECK: bis:
+; CHECK: bis.w r14, r15
+ %1 = or i8 %a, %b
+ ret i8 %1
+}
+
+define i8 @bic(i8 %a, i8 %b) nounwind {
+; CHECK: bic:
+; CHECK: bic.b r14, r15
+ %1 = xor i8 %b, -1
+ %2 = and i8 %a, %1
+ ret i8 %2
+}
+
+define i8 @xor(i8 %a, i8 %b) nounwind {
+; CHECK: xor:
+; CHECK: xor.w r14, r15
+ %1 = xor i8 %a, %b
+ ret i8 %1
+}
+
diff --git a/test/CodeGen/MSP430/bit.ll b/test/CodeGen/MSP430/bit.ll
new file mode 100644
index 0000000..cd664a1
--- /dev/null
+++ b/test/CodeGen/MSP430/bit.ll
@@ -0,0 +1,166 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
+target triple = "msp430-generic-generic"
+
+@foo8 = external global i8
+@bar8 = external global i8
+
+define i8 @bitbrr(i8 %a, i8 %b) nounwind {
+ %t1 = and i8 %a, %b
+ %t2 = icmp ne i8 %t1, 0
+ %t3 = zext i1 %t2 to i8
+ ret i8 %t3
+}
+; CHECK: bitbrr:
+; CHECK: bit.b r14, r15
+
+define i8 @bitbri(i8 %a) nounwind {
+ %t1 = and i8 %a, 15
+ %t2 = icmp ne i8 %t1, 0
+ %t3 = zext i1 %t2 to i8
+ ret i8 %t3
+}
+; CHECK: bitbri:
+; CHECK: bit.b #15, r15
+
+define i8 @bitbir(i8 %a) nounwind {
+ %t1 = and i8 15, %a
+ %t2 = icmp ne i8 %t1, 0
+ %t3 = zext i1 %t2 to i8
+ ret i8 %t3
+}
+; CHECK: bitbir:
+; CHECK: bit.b #15, r15
+
+define i8 @bitbmi() nounwind {
+ %t1 = load i8* @foo8
+ %t2 = and i8 %t1, 15
+ %t3 = icmp ne i8 %t2, 0
+ %t4 = zext i1 %t3 to i8
+ ret i8 %t4
+}
+; CHECK: bitbmi:
+; CHECK: bit.b #15, &foo8
+
+define i8 @bitbim() nounwind {
+ %t1 = load i8* @foo8
+ %t2 = and i8 15, %t1
+ %t3 = icmp ne i8 %t2, 0
+ %t4 = zext i1 %t3 to i8
+ ret i8 %t4
+}
+; CHECK: bitbim:
+; CHECK: bit.b #15, &foo8
+
+define i8 @bitbrm(i8 %a) nounwind {
+ %t1 = load i8* @foo8
+ %t2 = and i8 %a, %t1
+ %t3 = icmp ne i8 %t2, 0
+ %t4 = zext i1 %t3 to i8
+ ret i8 %t4
+}
+; CHECK: bitbrm:
+; CHECK: bit.b &foo8, r15
+
+define i8 @bitbmr(i8 %a) nounwind {
+ %t1 = load i8* @foo8
+ %t2 = and i8 %t1, %a
+ %t3 = icmp ne i8 %t2, 0
+ %t4 = zext i1 %t3 to i8
+ ret i8 %t4
+}
+; CHECK: bitbmr:
+; CHECK: bit.b r15, &foo8
+
+define i8 @bitbmm() nounwind {
+ %t1 = load i8* @foo8
+ %t2 = load i8* @bar8
+ %t3 = and i8 %t1, %t2
+ %t4 = icmp ne i8 %t3, 0
+ %t5 = zext i1 %t4 to i8
+ ret i8 %t5
+}
+; CHECK: bitbmm:
+; CHECK: bit.b &bar8, &foo8
+
+@foo16 = external global i16
+@bar16 = external global i16
+
+define i16 @bitwrr(i16 %a, i16 %b) nounwind {
+ %t1 = and i16 %a, %b
+ %t2 = icmp ne i16 %t1, 0
+ %t3 = zext i1 %t2 to i16
+ ret i16 %t3
+}
+; CHECK: bitwrr:
+; CHECK: bit.w r14, r15
+
+define i16 @bitwri(i16 %a) nounwind {
+ %t1 = and i16 %a, 4080
+ %t2 = icmp ne i16 %t1, 0
+ %t3 = zext i1 %t2 to i16
+ ret i16 %t3
+}
+; CHECK: bitwri:
+; CHECK: bit.w #4080, r15
+
+define i16 @bitwir(i16 %a) nounwind {
+ %t1 = and i16 4080, %a
+ %t2 = icmp ne i16 %t1, 0
+ %t3 = zext i1 %t2 to i16
+ ret i16 %t3
+}
+; CHECK: bitwir:
+; CHECK: bit.w #4080, r15
+
+define i16 @bitwmi() nounwind {
+ %t1 = load i16* @foo16
+ %t2 = and i16 %t1, 4080
+ %t3 = icmp ne i16 %t2, 0
+ %t4 = zext i1 %t3 to i16
+ ret i16 %t4
+}
+; CHECK: bitwmi:
+; CHECK: bit.w #4080, &foo16
+
+define i16 @bitwim() nounwind {
+ %t1 = load i16* @foo16
+ %t2 = and i16 4080, %t1
+ %t3 = icmp ne i16 %t2, 0
+ %t4 = zext i1 %t3 to i16
+ ret i16 %t4
+}
+; CHECK: bitwim:
+; CHECK: bit.w #4080, &foo16
+
+define i16 @bitwrm(i16 %a) nounwind {
+ %t1 = load i16* @foo16
+ %t2 = and i16 %a, %t1
+ %t3 = icmp ne i16 %t2, 0
+ %t4 = zext i1 %t3 to i16
+ ret i16 %t4
+}
+; CHECK: bitwrm:
+; CHECK: bit.w &foo16, r15
+
+define i16 @bitwmr(i16 %a) nounwind {
+ %t1 = load i16* @foo16
+ %t2 = and i16 %t1, %a
+ %t3 = icmp ne i16 %t2, 0
+ %t4 = zext i1 %t3 to i16
+ ret i16 %t4
+}
+; CHECK: bitwmr:
+; CHECK: bit.w r15, &foo16
+
+define i16 @bitwmm() nounwind {
+ %t1 = load i16* @foo16
+ %t2 = load i16* @bar16
+ %t3 = and i16 %t1, %t2
+ %t4 = icmp ne i16 %t3, 0
+ %t5 = zext i1 %t4 to i16
+ ret i16 %t5
+}
+; CHECK: bitwmm:
+; CHECK: bit.w &bar16, &foo16
+
diff --git a/test/CodeGen/MSP430/dg.exp b/test/CodeGen/MSP430/dg.exp
new file mode 100644
index 0000000..e4ea13a
--- /dev/null
+++ b/test/CodeGen/MSP430/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target MSP430] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/MSP430/inline-asm.ll b/test/CodeGen/MSP430/inline-asm.ll
new file mode 100644
index 0000000..0e7886a
--- /dev/null
+++ b/test/CodeGen/MSP430/inline-asm.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-generic-generic"
+
+define void @imm() nounwind {
+ call void asm sideeffect "bic\09$0,r2", "i"(i16 32) nounwind
+ ret void
+}
+
+define void @reg(i16 %a) nounwind {
+ call void asm sideeffect "bic\09$0,r2", "r"(i16 %a) nounwind
+ ret void
+}
+
+@foo = global i16 0, align 2
+
+define void @immmem() nounwind {
+ call void asm sideeffect "bic\09$0,r2", "i"(i16* getelementptr(i16* @foo, i32 1)) nounwind
+ ret void
+}
+
+define void @mem() nounwind {
+ %fooval = load i16* @foo
+ call void asm sideeffect "bic\09$0,r2", "m"(i16 %fooval) nounwind
+ ret void
+}
diff --git a/test/CodeGen/MSP430/postinc.ll b/test/CodeGen/MSP430/postinc.ll
new file mode 100644
index 0000000..8f01b83
--- /dev/null
+++ b/test/CodeGen/MSP430/postinc.ll
@@ -0,0 +1,114 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430"
+
+define zeroext i16 @add(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: add:
+; CHECK: add.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = add i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
+define zeroext i16 @sub(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: sub:
+; CHECK: sub.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = sub i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
+define zeroext i16 @or(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: or:
+; CHECK: bis.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = or i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
+define zeroext i16 @xor(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: xor:
+; CHECK: xor.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = xor i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
+define zeroext i16 @and(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: and:
+; CHECK: and.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = and i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
diff --git a/test/CodeGen/MSP430/setcc.ll b/test/CodeGen/MSP430/setcc.ll
new file mode 100644
index 0000000..9db51cc
--- /dev/null
+++ b/test/CodeGen/MSP430/setcc.ll
@@ -0,0 +1,116 @@
+; RUN: llc -march=msp430 < %s | FileCheck %s
+target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
+target triple = "msp430-generic-generic"
+
+define i16 @sccweqand(i16 %a, i16 %b) nounwind {
+ %t1 = and i16 %a, %b
+ %t2 = icmp eq i16 %t1, 0
+ %t3 = zext i1 %t2 to i16
+ ret i16 %t3
+}
+; CHECK: sccweqand:
+; CHECK: bit.w r14, r15
+; CHECK-NEXT: mov.w r2, r15
+; CHECK-NEXT: and.w #1, r15
+; CHECK-NEXT: xor.w #1, r15
+
+define i16 @sccwneand(i16 %a, i16 %b) nounwind {
+ %t1 = and i16 %a, %b
+ %t2 = icmp ne i16 %t1, 0
+ %t3 = zext i1 %t2 to i16
+ ret i16 %t3
+}
+; CHECK: sccwneand:
+; CHECK: bit.w r14, r15
+; CHECK-NEXT: mov.w r2, r15
+; CHECK-NEXT: and.w #1, r15
+
+define i16 @sccwne(i16 %a, i16 %b) nounwind {
+ %t1 = icmp ne i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+; CHECK:sccwne:
+; CHECK: cmp.w r14, r15
+; CHECK-NEXT: mov.w r2, r15
+; CHECK-NEXT: rra.w r15
+; CHECK-NEXT: and.w #1, r15
+
+define i16 @sccweq(i16 %a, i16 %b) nounwind {
+ %t1 = icmp eq i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+; CHECK:sccweq:
+; CHECK: cmp.w r14, r15
+; CHECK-NEXT: mov.w r2, r15
+; CHECK-NEXT: rra.w r15
+; CHECK-NEXT: and.w #1, r15
+; CHECK-NEXT: xor.w #1, r15
+
+define i16 @sccwugt(i16 %a, i16 %b) nounwind {
+ %t1 = icmp ugt i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+; CHECK:sccwugt:
+; CHECK: cmp.w r15, r14
+; CHECK-NEXT: mov.w r2, r15
+; CHECK-NEXT: and.w #1, r15
+; CHECK-NEXT: xor.w #1, r15
+
+define i16 @sccwuge(i16 %a, i16 %b) nounwind {
+ %t1 = icmp uge i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+; CHECK:sccwuge:
+; CHECK: cmp.w r14, r15
+; CHECK-NEXT: mov.w r2, r15
+; CHECK-NEXT: and.w #1, r15
+
+define i16 @sccwult(i16 %a, i16 %b) nounwind {
+ %t1 = icmp ult i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+; CHECK:sccwult:
+; CHECK: cmp.w r14, r15
+; CHECK-NEXT: mov.w r2, r15
+; CHECK-NEXT: and.w #1, r15
+; CHECK-NEXT: xor.w #1, r15
+
+define i16 @sccwule(i16 %a, i16 %b) nounwind {
+ %t1 = icmp ule i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+; CHECK:sccwule:
+; CHECK: cmp.w r15, r14
+; CHECK-NEXT: mov.w r2, r15
+; CHECK-NEXT: and.w #1, r15
+
+define i16 @sccwsgt(i16 %a, i16 %b) nounwind {
+ %t1 = icmp sgt i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+
+define i16 @sccwsge(i16 %a, i16 %b) nounwind {
+ %t1 = icmp sge i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+
+define i16 @sccwslt(i16 %a, i16 %b) nounwind {
+ %t1 = icmp slt i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+
+define i16 @sccwsle(i16 %a, i16 %b) nounwind {
+ %t1 = icmp sle i16 %a, %b
+ %t2 = zext i1 %t1 to i16
+ ret i16 %t2
+}
+
diff --git a/test/CodeGen/MSP430/shifts.ll b/test/CodeGen/MSP430/shifts.ll
new file mode 100644
index 0000000..b5b3054
--- /dev/null
+++ b/test/CodeGen/MSP430/shifts.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8:16"
+target triple = "msp430-elf"
+
+define zeroext i8 @lshr8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
+entry:
+; CHECK: lshr8:
+; CHECK: rrc.b
+ %shr = lshr i8 %a, %cnt
+ ret i8 %shr
+}
+
+define signext i8 @ashr8(i8 signext %a, i8 zeroext %cnt) nounwind readnone {
+entry:
+; CHECK: ashr8:
+; CHECK: rra.b
+ %shr = ashr i8 %a, %cnt
+ ret i8 %shr
+}
+
+define zeroext i8 @shl8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
+entry:
+; CHECK: shl8
+; CHECK: rla.b
+ %shl = shl i8 %a, %cnt
+ ret i8 %shl
+}
+
+define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
+entry:
+; CHECK: lshr16:
+; CHECK: rrc.w
+ %shr = lshr i16 %a, %cnt
+ ret i16 %shr
+}
+
+define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone {
+entry:
+; CHECK: ashr16:
+; CHECK: rra.w
+ %shr = ashr i16 %a, %cnt
+ ret i16 %shr
+}
+
+define zeroext i16 @shl16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
+entry:
+; CHECK: shl16:
+; CHECK: rla.w
+ %shl = shl i16 %a, %cnt
+ ret i16 %shl
+}
diff --git a/test/CodeGen/Mips/2008-06-05-Carry.ll b/test/CodeGen/Mips/2008-06-05-Carry.ll
new file mode 100644
index 0000000..8e7b70e
--- /dev/null
+++ b/test/CodeGen/Mips/2008-06-05-Carry.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep subu %t | count 2
+; RUN: grep addu %t | count 4
+
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define i64 @add64(i64 %u, i64 %v) nounwind {
+entry:
+ %tmp2 = add i64 %u, %v
+ ret i64 %tmp2
+}
+
+define i64 @sub64(i64 %u, i64 %v) nounwind {
+entry:
+ %tmp2 = sub i64 %u, %v
+ ret i64 %tmp2
+}
diff --git a/test/CodeGen/Mips/2008-07-03-SRet.ll b/test/CodeGen/Mips/2008-07-03-SRet.ll
new file mode 100644
index 0000000..b2aaa00
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-03-SRet.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=mips | grep {sw.*(\$4)} | count 3
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+ %struct.sret0 = type { i32, i32, i32 }
+
+define void @test0(%struct.sret0* noalias sret %agg.result, i32 %dummy) nounwind {
+entry:
+ getelementptr %struct.sret0* %agg.result, i32 0, i32 0 ; <i32*>:0 [#uses=1]
+ store i32 %dummy, i32* %0, align 4
+ getelementptr %struct.sret0* %agg.result, i32 0, i32 1 ; <i32*>:1 [#uses=1]
+ store i32 %dummy, i32* %1, align 4
+ getelementptr %struct.sret0* %agg.result, i32 0, i32 2 ; <i32*>:2 [#uses=1]
+ store i32 %dummy, i32* %2, align 4
+ ret void
+}
+
diff --git a/test/CodeGen/Mips/2008-07-05-ByVal.ll b/test/CodeGen/Mips/2008-07-05-ByVal.ll
new file mode 100644
index 0000000..6bb6bd8
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-05-ByVal.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=mips | grep {lw.*(\$4)} | count 2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+ %struct.byval0 = type { i32, i32 }
+
+define i64 @test0(%struct.byval0* byval %b, i64 %sum) nounwind {
+entry:
+ getelementptr %struct.byval0* %b, i32 0, i32 0 ; <i32*>:0 [#uses=1]
+ load i32* %0, align 4 ; <i32>:1 [#uses=1]
+ getelementptr %struct.byval0* %b, i32 0, i32 1 ; <i32*>:2 [#uses=1]
+ load i32* %2, align 4 ; <i32>:3 [#uses=1]
+ add i32 %3, %1 ; <i32>:4 [#uses=1]
+ sext i32 %4 to i64 ; <i64>:5 [#uses=1]
+ add i64 %5, %sum ; <i64>:6 [#uses=1]
+ ret i64 %6
+}
+
diff --git a/test/CodeGen/Mips/2008-07-06-fadd64.ll b/test/CodeGen/Mips/2008-07-06-fadd64.ll
new file mode 100644
index 0000000..808ce16
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-06-fadd64.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=mips | grep __adddf3
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define double @dofloat(double %a, double %b) nounwind {
+entry:
+ fadd double %a, %b ; <double>:0 [#uses=1]
+ ret double %0
+}
diff --git a/test/CodeGen/Mips/2008-07-07-FPExtend.ll b/test/CodeGen/Mips/2008-07-07-FPExtend.ll
new file mode 100644
index 0000000..7ac0f5f
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-07-FPExtend.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=mips | grep __extendsfdf2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define double @dofloat(float %a) nounwind {
+entry:
+ fpext float %a to double ; <double>:0 [#uses=1]
+ ret double %0
+}
diff --git a/test/CodeGen/Mips/2008-07-07-Float2Int.ll b/test/CodeGen/Mips/2008-07-07-Float2Int.ll
new file mode 100644
index 0000000..ca99636
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-07-Float2Int.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=mips | grep trunc.w.s | count 3
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define i32 @fptoint(float %a) nounwind {
+entry:
+ fptosi float %a to i32 ; <i32>:0 [#uses=1]
+ ret i32 %0
+}
+
+define i32 @fptouint(float %a) nounwind {
+entry:
+ fptoui float %a to i32 ; <i32>:0 [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll b/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll
new file mode 100644
index 0000000..20de18a
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep __floatsidf %t | count 1
+; RUN: grep __floatunsidf %t | count 1
+; RUN: grep __fixdfsi %t | count 1
+; RUN: grep __fixunsdfsi %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define double @int2fp(i32 %a) nounwind {
+entry:
+ sitofp i32 %a to double ; <double>:0 [#uses=1]
+ ret double %0
+}
+
+define double @uint2double(i32 %a) nounwind {
+entry:
+ uitofp i32 %a to double ; <double>:0 [#uses=1]
+ ret double %0
+}
+
+define i32 @double2int(double %a) nounwind {
+entry:
+ fptosi double %a to i32 ; <i32>:0 [#uses=1]
+ ret i32 %0
+}
+
+define i32 @double2uint(double %a) nounwind {
+entry:
+ fptoui double %a to i32 ; <i32>:0 [#uses=1]
+ ret i32 %0
+}
+
diff --git a/test/CodeGen/Mips/2008-07-15-InternalConstant.ll b/test/CodeGen/Mips/2008-07-15-InternalConstant.ll
new file mode 100644
index 0000000..f6b2045
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-15-InternalConstant.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep {rodata.str1.4,"aMS",@progbits} %t | count 1
+; RUN: grep {r.data,} %t | count 1
+; RUN: grep {\%hi} %t | count 2
+; RUN: grep {\%lo} %t | count 2
+; RUN: not grep {gp_rel} %t
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
[email protected] = internal constant [10 x i8] c"AAAAAAAAA\00"
+@i0 = internal constant [5 x i32] [ i32 0, i32 1, i32 2, i32 3, i32 4 ]
+
+define i8* @foo() nounwind {
+entry:
+ ret i8* getelementptr ([10 x i8]* @.str, i32 0, i32 0)
+}
+
+define i32* @bar() nounwind {
+entry:
+ ret i32* getelementptr ([5 x i32]* @i0, i32 0, i32 0)
+}
+
diff --git a/test/CodeGen/Mips/2008-07-15-SmallSection.ll b/test/CodeGen/Mips/2008-07-15-SmallSection.ll
new file mode 100644
index 0000000..26eb4db
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-15-SmallSection.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -mips-ssection-threshold=8 -march=mips -o %t0
+; RUN: llc < %s -mips-ssection-threshold=0 -march=mips -o %t1
+; RUN: grep {sdata} %t0 | count 1
+; RUN: grep {sbss} %t0 | count 1
+; RUN: grep {gp_rel} %t0 | count 2
+; RUN: not grep {sdata} %t1
+; RUN: not grep {sbss} %t1
+; RUN: not grep {gp_rel} %t1
+; RUN: grep {\%hi} %t1 | count 2
+; RUN: grep {\%lo} %t1 | count 2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+ %struct.anon = type { i32, i32 }
+@s0 = global [8 x i8] c"AAAAAAA\00", align 4
+@foo = global %struct.anon { i32 2, i32 3 }
+@bar = global %struct.anon zeroinitializer
+
+define i8* @A0() nounwind {
+entry:
+ ret i8* getelementptr ([8 x i8]* @s0, i32 0, i32 0)
+}
+
+define i32 @A1() nounwind {
+entry:
+ load i32* getelementptr (%struct.anon* @foo, i32 0, i32 0), align 8
+ load i32* getelementptr (%struct.anon* @foo, i32 0, i32 1), align 4
+ add i32 %1, %0
+ ret i32 %2
+}
+
diff --git a/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll b/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll
new file mode 100644
index 0000000..59599b3
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep seh %t | count 1
+; RUN: grep seb %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define i8 @A(i8 %e.0, i8 signext %sum) signext nounwind {
+entry:
+ add i8 %sum, %e.0 ; <i8>:0 [#uses=1]
+ ret i8 %0
+}
+
+define i16 @B(i16 %e.0, i16 signext %sum) signext nounwind {
+entry:
+ add i16 %sum, %e.0 ; <i16>:0 [#uses=1]
+ ret i16 %0
+}
+
diff --git a/test/CodeGen/Mips/2008-07-22-Cstpool.ll b/test/CodeGen/Mips/2008-07-22-Cstpool.ll
new file mode 100644
index 0000000..21ff960
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-22-Cstpool.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep {CPI\[01\]_\[01\]:} %t | count 2
+; RUN: grep {rodata.cst4,"aM",@progbits} %t | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @F(float %a) nounwind {
+entry:
+ fadd float %a, 0x4011333340000000 ; <float>:0 [#uses=1]
+ fadd float %0, 0x4010666660000000 ; <float>:1 [#uses=1]
+ ret float %1
+}
diff --git a/test/CodeGen/Mips/2008-07-23-fpcmp.ll b/test/CodeGen/Mips/2008-07-23-fpcmp.ll
new file mode 100644
index 0000000..80101fa
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-23-fpcmp.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep {c\\..*\\.s} %t | count 3
+; RUN: grep {bc1\[tf\]} %t | count 3
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @A(float %a, float %b) nounwind {
+entry:
+ fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb, label %bb2
+
+bb: ; preds = %entry
+ fadd float %a, 1.000000e+00 ; <float>:1 [#uses=1]
+ ret float %1
+
+bb2: ; preds = %entry
+ ret float %b
+}
+
+define float @B(float %a, float %b) nounwind {
+entry:
+ fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
+ %.0 = select i1 %0, float %a, float %b ; <float> [#uses=1]
+ ret float %.0
+}
+
+define i32 @C(i32 %a, i32 %b, float %j) nounwind {
+entry:
+ fcmp ogt float %j, 1.000000e+00 ; <i1>:0 [#uses=1]
+ %.0 = select i1 %0, i32 %a, i32 %b ; <i32> [#uses=1]
+ ret i32 %.0
+}
+
diff --git a/test/CodeGen/Mips/2008-07-29-icmp.ll b/test/CodeGen/Mips/2008-07-29-icmp.ll
new file mode 100644
index 0000000..042cad6
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-29-icmp.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=mips | grep {b\[ne\]\[eq\]} | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @A(float %a, float %b, i32 %j) nounwind {
+entry:
+ icmp sgt i32 %j, 1 ; <i1>:0 [#uses=1]
+ %.0 = select i1 %0, float %a, float %b ; <float> [#uses=1]
+ ret float %.0
+}
diff --git a/test/CodeGen/Mips/2008-07-31-fcopysign.ll b/test/CodeGen/Mips/2008-07-31-fcopysign.ll
new file mode 100644
index 0000000..77680bc
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-31-fcopysign.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep abs.s %t | count 1
+; RUN: grep neg.s %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @A(float %i, float %j) nounwind {
+entry:
+ tail call float @copysignf( float %i, float %j ) nounwind readnone ; <float>:0 [#uses=1]
+ ret float %0
+}
+
+declare float @copysignf(float, float) nounwind readnone
diff --git a/test/CodeGen/Mips/2008-08-01-AsmInline.ll b/test/CodeGen/Mips/2008-08-01-AsmInline.ll
new file mode 100644
index 0000000..cd35cca
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-01-AsmInline.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep mfhi %t | count 1
+; RUN: grep mflo %t | count 1
+; RUN: grep multu %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+ %struct.DWstruct = type { i32, i32 }
+
+define i32 @A0(i32 %u, i32 %v) nounwind {
+entry:
+ %asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwind
+ %asmresult = extractvalue %struct.DWstruct %asmtmp, 0
+ %asmresult1 = extractvalue %struct.DWstruct %asmtmp, 1 ; <i32> [#uses=1]
+ %res = add i32 %asmresult, %asmresult1
+ ret i32 %res
+}
diff --git a/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll b/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll
new file mode 100644
index 0000000..c41d521
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll
@@ -0,0 +1,18 @@
+; Double return in abicall (default)
+; RUN: llc < %s -march=mips
+; PR2615
+
+define double @main(...) {
+entry:
+ %retval = alloca double ; <double*> [#uses=3]
+ store double 0.000000e+00, double* %retval
+ %r = alloca double ; <double*> [#uses=1]
+ load double* %r ; <double>:0 [#uses=1]
+ store double %0, double* %retval
+ br label %return
+
+return: ; preds = %entry
+ load double* %retval ; <double>:1 [#uses=1]
+ ret double %1
+}
+
diff --git a/test/CodeGen/Mips/2008-08-03-fabs64.ll b/test/CodeGen/Mips/2008-08-03-fabs64.ll
new file mode 100644
index 0000000..2f33e9b
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-03-fabs64.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep {lui.*32767} %t | count 1
+; RUN: grep {ori.*65535} %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define double @A(double %c, double %d) nounwind readnone {
+entry:
+ tail call double @fabs( double %c ) nounwind readnone ; <double>:0 [#uses=1]
+ tail call double @fabs( double %d ) nounwind readnone ; <double>:0 [#uses=1]
+ fadd double %0, %1
+ ret double %2
+}
+
+declare double @fabs(double) nounwind readnone
diff --git a/test/CodeGen/Mips/2008-08-04-Bitconvert.ll b/test/CodeGen/Mips/2008-08-04-Bitconvert.ll
new file mode 100644
index 0000000..ca90b50
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-04-Bitconvert.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=mips -o %t
+; RUN: grep mtc1 %t | count 1
+; RUN: grep mfc1 %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @A(i32 %u) nounwind {
+entry:
+ bitcast i32 %u to float
+ ret float %0
+}
+
+define i32 @B(float %u) nounwind {
+entry:
+ bitcast float %u to i32
+ ret i32 %0
+}
diff --git a/test/CodeGen/Mips/2008-08-06-Alloca.ll b/test/CodeGen/Mips/2008-08-06-Alloca.ll
new file mode 100644
index 0000000..79e49a3
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-06-Alloca.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=mips | grep {subu.*sp} | count 2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define i32 @twoalloca(i32 %size) nounwind {
+entry:
+ alloca i8, i32 %size ; <i8*>:0 [#uses=1]
+ alloca i8, i32 %size ; <i8*>:1 [#uses=1]
+ call i32 @foo( i8* %0 ) nounwind ; <i32>:2 [#uses=1]
+ call i32 @foo( i8* %1 ) nounwind ; <i32>:3 [#uses=1]
+ add i32 %3, %2 ; <i32>:4 [#uses=1]
+ ret i32 %4
+}
+
+declare i32 @foo(i8*)
diff --git a/test/CodeGen/Mips/2008-08-07-CC.ll b/test/CodeGen/Mips/2008-08-07-CC.ll
new file mode 100644
index 0000000..54d454c
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-07-CC.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=mips
+; Mips must ignore fastcc
+
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define internal fastcc i32 @A(i32 %u) nounwind {
+entry:
+ ret i32 %u
+}
+
diff --git a/test/CodeGen/Mips/2008-08-07-FPRound.ll b/test/CodeGen/Mips/2008-08-07-FPRound.ll
new file mode 100644
index 0000000..f3bb965
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-07-FPRound.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=mips | grep __truncdfsf2 | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @round2float(double %a) nounwind {
+entry:
+ fptrunc double %a to float ; <float>:0 [#uses=1]
+ ret float %0
+}
diff --git a/test/CodeGen/Mips/2008-08-08-bswap.ll b/test/CodeGen/Mips/2008-08-08-bswap.ll
new file mode 100644
index 0000000..83289d9
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-08-bswap.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s | grep wsbw | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "psp"
+
+define i32 @__bswapsi2(i32 %u) nounwind {
+entry:
+ tail call i32 @llvm.bswap.i32( i32 %u ) ; <i32>:0 [#uses=1]
+ ret i32 %0
+}
+
+declare i32 @llvm.bswap.i32(i32) nounwind readnone
diff --git a/test/CodeGen/Mips/2008-08-08-ctlz.ll b/test/CodeGen/Mips/2008-08-08-ctlz.ll
new file mode 100644
index 0000000..1da1db2
--- /dev/null
+++ b/test/CodeGen/Mips/2008-08-08-ctlz.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=mips | grep clz | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define i32 @A0(i32 %u) nounwind {
+entry:
+ call i32 @llvm.ctlz.i32( i32 %u )
+ ret i32 %0
+}
+
+declare i32 @llvm.ctlz.i32(i32) nounwind readnone
diff --git a/test/CodeGen/Mips/2008-10-13-LegalizerBug.ll b/test/CodeGen/Mips/2008-10-13-LegalizerBug.ll
new file mode 100644
index 0000000..18f5b3d
--- /dev/null
+++ b/test/CodeGen/Mips/2008-10-13-LegalizerBug.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=mips
+; PR2794
+
+define i32 @main(i8*) nounwind {
+entry:
+ br label %continue.outer
+
+continue.outer: ; preds = %case4, %entry
+ %p.0.ph.rec = phi i32 [ 0, %entry ], [ %indvar.next, %case4 ] ; <i32> [#uses=2]
+ %p.0.ph = getelementptr i8* %0, i32 %p.0.ph.rec ; <i8*> [#uses=1]
+ %1 = load i8* %p.0.ph ; <i8> [#uses=1]
+ switch i8 %1, label %infloop [
+ i8 0, label %return.split
+ i8 76, label %case4
+ i8 108, label %case4
+ i8 104, label %case4
+ i8 42, label %case4
+ ]
+
+case4: ; preds = %continue.outer, %continue.outer, %continue.outer, %continue.outer
+ %indvar.next = add i32 %p.0.ph.rec, 1 ; <i32> [#uses=1]
+ br label %continue.outer
+
+return.split: ; preds = %continue.outer
+ ret i32 0
+
+infloop: ; preds = %infloop, %continue.outer
+ br label %infloop
+}
diff --git a/test/CodeGen/Mips/2008-11-10-xint_to_fp.ll b/test/CodeGen/Mips/2008-11-10-xint_to_fp.ll
new file mode 100644
index 0000000..f518843
--- /dev/null
+++ b/test/CodeGen/Mips/2008-11-10-xint_to_fp.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s
+; PR2667
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "psp"
+ %struct._Bigint = type { %struct._Bigint*, i32, i32, i32, i32, [1 x i32] }
+ %struct.__FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*, i8*, i32)*, i32 (i8*, i8*, i32)*, i32 (i8*, i32, i32)*, i32 (i8*)*, %struct.__sbuf, i8*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i32, %struct._reent*, i32 }
+ %struct.__sbuf = type { i8*, i32 }
+ %struct._atexit = type { %struct._atexit*, i32, [32 x void ()*], %struct._on_exit_args }
+ %struct._glue = type { %struct._glue*, i32, %struct.__FILE* }
+ %struct._on_exit_args = type { [32 x i8*], [32 x i8*], i32, i32 }
+ %struct._reent = type { i32, %struct.__FILE*, %struct.__FILE*, %struct.__FILE*, i32, [25 x i8], i32, i8*, i32, void (%struct._reent*)*, %struct._Bigint*, i32, %struct._Bigint*, %struct._Bigint**, i32, i8*, { { [30 x i8*], [30 x i32] } }, %struct._atexit*, %struct._atexit, void (i32)**, %struct._glue, [3 x %struct.__FILE] }
+@_impure_ptr = external global %struct._reent* ; <%struct._reent**> [#uses=1]
+
+define double @_erand48_r(%struct._reent* %r, i16* %xseed) nounwind {
+entry:
+ tail call void @__dorand48( %struct._reent* %r, i16* %xseed ) nounwind
+ load i16* %xseed, align 2 ; <i16>:0 [#uses=1]
+ uitofp i16 %0 to double ; <double>:1 [#uses=1]
+ tail call double @ldexp( double %1, i32 -48 ) nounwind ; <double>:2 [#uses=1]
+ getelementptr i16* %xseed, i32 1 ; <i16*>:3 [#uses=1]
+ load i16* %3, align 2 ; <i16>:4 [#uses=1]
+ uitofp i16 %4 to double ; <double>:5 [#uses=1]
+ tail call double @ldexp( double %5, i32 -32 ) nounwind ; <double>:6 [#uses=1]
+ fadd double %2, %6 ; <double>:7 [#uses=1]
+ getelementptr i16* %xseed, i32 2 ; <i16*>:8 [#uses=1]
+ load i16* %8, align 2 ; <i16>:9 [#uses=1]
+ uitofp i16 %9 to double ; <double>:10 [#uses=1]
+ tail call double @ldexp( double %10, i32 -16 ) nounwind ; <double>:11 [#uses=1]
+ fadd double %7, %11 ; <double>:12 [#uses=1]
+ ret double %12
+}
+
+declare void @__dorand48(%struct._reent*, i16*)
+
+declare double @ldexp(double, i32)
+
+define double @erand48(i16* %xseed) nounwind {
+entry:
+ load %struct._reent** @_impure_ptr, align 4 ; <%struct._reent*>:0 [#uses=1]
+ tail call void @__dorand48( %struct._reent* %0, i16* %xseed ) nounwind
+ load i16* %xseed, align 2 ; <i16>:1 [#uses=1]
+ uitofp i16 %1 to double ; <double>:2 [#uses=1]
+ tail call double @ldexp( double %2, i32 -48 ) nounwind ; <double>:3 [#uses=1]
+ getelementptr i16* %xseed, i32 1 ; <i16*>:4 [#uses=1]
+ load i16* %4, align 2 ; <i16>:5 [#uses=1]
+ uitofp i16 %5 to double ; <double>:6 [#uses=1]
+ tail call double @ldexp( double %6, i32 -32 ) nounwind ; <double>:7 [#uses=1]
+ fadd double %3, %7 ; <double>:8 [#uses=1]
+ getelementptr i16* %xseed, i32 2 ; <i16*>:9 [#uses=1]
+ load i16* %9, align 2 ; <i16>:10 [#uses=1]
+ uitofp i16 %10 to double ; <double>:11 [#uses=1]
+ tail call double @ldexp( double %11, i32 -16 ) nounwind ; <double>:12 [#uses=1]
+ fadd double %8, %12 ; <double>:13 [#uses=1]
+ ret double %13
+}
diff --git a/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll b/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll
new file mode 100644
index 0000000..636b318
--- /dev/null
+++ b/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32"
+target triple = "mips-unknown-linux"
+
+define float @h() nounwind readnone {
+entry:
+; CHECK: lw $2, %got($CPI1_0)($gp)
+; CHECK: lwc1 $f0, %lo($CPI1_0)($2)
+ ret float 0x400B333340000000
+}
diff --git a/test/CodeGen/Mips/dg.exp b/test/CodeGen/Mips/dg.exp
new file mode 100644
index 0000000..adb2cac
--- /dev/null
+++ b/test/CodeGen/Mips/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target Mips] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/Mips/private.ll b/test/CodeGen/Mips/private.ll
new file mode 100644
index 0000000..34b7547
--- /dev/null
+++ b/test/CodeGen/Mips/private.ll
@@ -0,0 +1,21 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llc < %s -march=mips > %t
+; RUN: grep \\\$foo: %t
+; RUN: grep call.*\\\$foo %t
+; RUN: grep \\\$baz: %t
+; RUN: grep lw.*\\\$baz %t
+
+declare void @foo()
+
+define private void @foo() {
+ ret void
+}
+
+@baz = private global i32 4
+
+define i32 @bar() {
+ call void @foo()
+ %1 = load i32* @baz, align 4
+ ret i32 %1
+}
diff --git a/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll b/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll
new file mode 100644
index 0000000..b508026
--- /dev/null
+++ b/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=pic16 | FileCheck %s
+
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-f32:32:32"
+target triple = "pic16-"
+@i = global i32 -10, align 1 ; <i32*> [#uses=1]
+@j = global i32 -20, align 1 ; <i32*> [#uses=1]
+@pc = global i8* inttoptr (i64 160 to i8*), align 1 ; <i8**> [#uses=3]
[email protected] = internal global i32 0 ; <i32*> [#uses=2]
+
+define void @main() nounwind {
+entry:
+ %tmp = load i32* @i ; <i32> [#uses=1]
+ %tmp1 = load i32* @j ; <i32> [#uses=1]
+ %add = add i32 %tmp, %tmp1 ; <i32> [#uses=1]
+ store i32 %add, i32* @main.auto.k
+ %tmp2 = load i32* @main.auto.k ; <i32> [#uses=1]
+ %add3 = add i32 %tmp2, 32 ; <i32> [#uses=1]
+ %conv = trunc i32 %add3 to i8 ; <i8> [#uses=1]
+ %tmp4 = load i8** @pc ; <i8*> [#uses=1]
+ store i8 %conv, i8* %tmp4
+ %tmp5 = load i8** @pc ; <i8*> [#uses=1]
+ %tmp6 = load i8* %tmp5 ; <i8> [#uses=1]
+ %conv7 = sext i8 %tmp6 to i16 ; <i16> [#uses=1]
+ %sub = sub i16 %conv7, 1 ; <i16> [#uses=1]
+ %conv8 = trunc i16 %sub to i8 ; <i8> [#uses=1]
+ %tmp9 = load i8** @pc ; <i8*> [#uses=1]
+ store i8 %conv8, i8* %tmp9
+ ret void
+}
+
+; CHECK: movf @i + 0, W
diff --git a/test/CodeGen/PIC16/2009-11-20-NewNode.ll b/test/CodeGen/PIC16/2009-11-20-NewNode.ll
new file mode 100644
index 0000000..d68f0f4
--- /dev/null
+++ b/test/CodeGen/PIC16/2009-11-20-NewNode.ll
@@ -0,0 +1,36 @@
+; RUN: llc -march=pic16 < %s
+; PR5558
+
+define i64 @_strtoll_r(i16 %base) nounwind {
+entry:
+ br i1 undef, label %if.then, label %if.end27
+
+if.then: ; preds = %do.end
+ br label %if.end27
+
+if.end27: ; preds = %if.then, %do.end
+ %cond66 = select i1 undef, i64 -9223372036854775808, i64 9223372036854775807 ; <i64> [#uses=3]
+ %conv69 = sext i16 %base to i64 ; <i64> [#uses=1]
+ %div = udiv i64 %cond66, %conv69 ; <i64> [#uses=1]
+ br label %for.cond
+
+for.cond: ; preds = %if.end116, %if.end27
+ br i1 undef, label %if.then152, label %if.then93
+
+if.then93: ; preds = %for.cond
+ br i1 undef, label %if.end116, label %if.then152
+
+if.end116: ; preds = %if.then93
+ %cmp123 = icmp ugt i64 undef, %div ; <i1> [#uses=1]
+ %or.cond = or i1 undef, %cmp123 ; <i1> [#uses=0]
+ br label %for.cond
+
+if.then152: ; preds = %if.then93, %for.cond
+ br i1 undef, label %if.end182, label %if.then172
+
+if.then172: ; preds = %if.then152
+ ret i64 %cond66
+
+if.end182: ; preds = %if.then152
+ ret i64 %cond66
+}
diff --git a/test/CodeGen/PIC16/C16-11.ll b/test/CodeGen/PIC16/C16-11.ll
new file mode 100644
index 0000000..e70092b
--- /dev/null
+++ b/test/CodeGen/PIC16/C16-11.ll
@@ -0,0 +1,37 @@
+;RUN: llc < %s -march=pic16
+
[email protected] = internal global i1 false ; <i1*> [#uses=2]
[email protected] = internal global i1 false ; <i1*> [#uses=2]
+
+define void @c612() nounwind {
+entry:
+ %tmp3.b = load i1* @c612.auto.a.b ; <i1> [#uses=1]
+ %tmp3 = zext i1 %tmp3.b to i16 ; <i16> [#uses=1]
+ %tmp4.b = load i1* @c612.auto.A.b ; <i1> [#uses=1]
+ %tmp4 = select i1 %tmp4.b, i16 2, i16 0 ; <i16> [#uses=1]
+ %cmp5 = icmp ne i16 %tmp3, %tmp4 ; <i1> [#uses=1]
+ %conv7 = zext i1 %cmp5 to i8 ; <i8> [#uses=1]
+ tail call void @expectWrap(i8 %conv7, i8 2)
+ ret void
+}
+
+define void @expectWrap(i8 %boolresult, i8 %errCode) nounwind {
+entry:
+ %tobool = icmp eq i8 %boolresult, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @exit(i16 1)
+ unreachable
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define i16 @main() nounwind {
+entry:
+ tail call void @c612()
+ ret i16 0
+}
+
+declare void @exit(i16) noreturn nounwind
diff --git a/test/CodeGen/PIC16/C16-15.ll b/test/CodeGen/PIC16/C16-15.ll
new file mode 100644
index 0000000..2e1dc0c
--- /dev/null
+++ b/test/CodeGen/PIC16/C16-15.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -march=pic16 | grep "extern @.lib.unordered.f32" | count 3
+
+@pc = global i8* inttoptr (i64 160 to i8*), align 1 ; <i8**> [#uses=2]
+@aa = common global i16 0, align 1 ; <i16*> [#uses=0]
[email protected] = internal global float 0.000000e+00, align 4 ; <float*> [#uses=1]
[email protected] = internal global float 0.000000e+00, align 4 ; <float*> [#uses=1]
+
+define float @dvalue(float %f) nounwind {
+entry:
+ ret float %f
+}
+
+define void @_assert(i16 %line, i16 %result) nounwind {
+entry:
+ %add = add i16 %line, %result ; <i16> [#uses=1]
+ %conv = trunc i16 %add to i8 ; <i8> [#uses=1]
+ %tmp2 = load i8** @pc ; <i8*> [#uses=1]
+ store i8 %conv, i8* %tmp2
+ ret void
+}
+
+define i16 @main() nounwind {
+entry:
+ %retval = alloca i16, align 1 ; <i16*> [#uses=2]
+ store i16 0, i16* %retval
+ call void @c6214()
+ %0 = load i16* %retval ; <i16> [#uses=1]
+ ret i16 %0
+}
+
+define internal void @c6214() nounwind {
+entry:
+ %call = call float @dvalue(float 0x3FF3C0CA40000000) ; <float> [#uses=3]
+ store float %call, float* @c6214.auto.d
+ store float %call, float* @c6214.auto.l
+ %cmp = fcmp ord float %call, 0.000000e+00 ; <i1> [#uses=1]
+ %conv = zext i1 %cmp to i16 ; <i16> [#uses=1]
+ call void @_assert(i16 10, i16 %conv)
+ %tmp3 = load i8** @pc ; <i8*> [#uses=2]
+ %tmp4 = load i8* %tmp3 ; <i8> [#uses=1]
+ %sub = add i8 %tmp4, -10 ; <i8> [#uses=1]
+ store i8 %sub, i8* %tmp3
+ ret void
+}
diff --git a/test/CodeGen/PIC16/C16-49.ll b/test/CodeGen/PIC16/C16-49.ll
new file mode 100644
index 0000000..e59800b
--- /dev/null
+++ b/test/CodeGen/PIC16/C16-49.ll
@@ -0,0 +1,15 @@
+;RUN: llvm-as < %s | llc -march=pic16
+
+@aa = global i16 55, align 1 ; <i16*> [#uses=1]
+@bb = global i16 44, align 1 ; <i16*> [#uses=1]
+@PORTD = external global i8 ; <i8*> [#uses=1]
+
+define void @foo() nounwind {
+entry:
+ %tmp = volatile load i16* @aa ; <i16> [#uses=1]
+ %tmp1 = volatile load i16* @bb ; <i16> [#uses=1]
+ %sub = sub i16 %tmp, %tmp1 ; <i16> [#uses=1]
+ %conv = trunc i16 %sub to i8 ; <i8> [#uses=1]
+ store i8 %conv, i8* @PORTD
+ ret void
+}
diff --git a/test/CodeGen/PIC16/check_inc_files.ll b/test/CodeGen/PIC16/check_inc_files.ll
new file mode 100644
index 0000000..436d416
--- /dev/null
+++ b/test/CodeGen/PIC16/check_inc_files.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s
+
+;CHECK: #include p16f1xxx.inc
+;CHECK: #include stdmacros.inc
+
+define void @foo() nounwind {
+entry:
+ ret void
+}
diff --git a/test/CodeGen/PIC16/dg.exp b/test/CodeGen/PIC16/dg.exp
new file mode 100644
index 0000000..b08b985
--- /dev/null
+++ b/test/CodeGen/PIC16/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target PIC16] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/PIC16/global-in-user-section.ll b/test/CodeGen/PIC16/global-in-user-section.ll
new file mode 100644
index 0000000..74c9d9d
--- /dev/null
+++ b/test/CodeGen/PIC16/global-in-user-section.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=pic16 | FileCheck %s
+
+@G1 = common global i16 0, section "usersection", align 1
+; CHECK: usersection UDATA
+; CHECK: @G1 RES 2
diff --git a/test/CodeGen/PIC16/globals.ll b/test/CodeGen/PIC16/globals.ll
new file mode 100644
index 0000000..432c291
--- /dev/null
+++ b/test/CodeGen/PIC16/globals.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=pic16 | FileCheck %s
+
+@G1 = global i32 4712, section "Address=412"
+; CHECK: @G1.412..user_section.# IDATA 412
+; CHECK: @G1
+; CHECK: dl 4712
+
+@G2 = global i32 0, section "Address=412"
+; CHECK: @G2.412..user_section.# UDATA 412
+; CHECK: @G2 RES 4
+
+@G3 = addrspace(1) constant i32 4712, section "Address=412"
+; CHECK: @G3.412..user_section.# ROMDATA 412
+; CHECK: @G3
+; CHECK: rom_dl 4712
+
+
diff --git a/test/CodeGen/PIC16/result_direction.ll b/test/CodeGen/PIC16/result_direction.ll
new file mode 100644
index 0000000..8549e21
--- /dev/null
+++ b/test/CodeGen/PIC16/result_direction.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s
+
+@a = common global i16 0, align 1 ; <i16*> [#uses=2]
+
+define void @foo() nounwind {
+entry:
+ %tmp = load i16* @a ; <i16> [#uses=1]
+ %add = add nsw i16 %tmp, 1 ; <i16> [#uses=1]
+ store i16 %add, i16* @a
+;CHECK: movlw 1
+;CHECK: addwf @a + 0, F
+ ret void
+}
diff --git a/test/CodeGen/PIC16/sext.ll b/test/CodeGen/PIC16/sext.ll
new file mode 100644
index 0000000..b49925f
--- /dev/null
+++ b/test/CodeGen/PIC16/sext.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=pic16
+
[email protected] = internal global i8 0 ; <i8*> [#uses=1]
+
+define i16 @main() nounwind {
+entry:
+ %tmp = load i8* @main.auto.c ; <i8> [#uses=1]
+ %conv = sext i8 %tmp to i16 ; <i16> [#uses=1]
+ ret i16 %conv
+}
diff --git a/test/CodeGen/PIC16/test_indf_name.ll b/test/CodeGen/PIC16/test_indf_name.ll
new file mode 100644
index 0000000..d52fc11
--- /dev/null
+++ b/test/CodeGen/PIC16/test_indf_name.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s
+
+@pi = common global i16* null, align 1 ; <i16**> [#uses=1]
+
+define void @foo() nounwind {
+entry:
+ %tmp = load i16** @pi ; <i16*> [#uses=1]
+ store i16 1, i16* %tmp
+; CHECK: movwi {{[0-1]}}[INDF{{[0-1]}}]
+; CHECK: movwi {{[0-1]}}[INDF{{[0-1]}}]
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll b/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll
new file mode 100644
index 0000000..f95465c
--- /dev/null
+++ b/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=ppc32
+define void @test() {
+ %tr1 = lshr i32 1, 0 ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll b/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll
new file mode 100644
index 0000000..c3bfa49
--- /dev/null
+++ b/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=ppc32
+
+define void @main() {
+ %tr4 = shl i64 1, 0 ; <i64> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll b/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll
new file mode 100644
index 0000000..dea654a
--- /dev/null
+++ b/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32
+
+define void @main() {
+ %shamt = add i8 0, 1 ; <i8> [#uses=1]
+ %shift.upgrd.1 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr2 = ashr i64 1, %shift.upgrd.1 ; <i64> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll b/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll
new file mode 100644
index 0000000..fc190a48
--- /dev/null
+++ b/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -march=ppc32 | not grep .comm.*X,0
+
+@X = linkonce global { } zeroinitializer ; <{ }*> [#uses=0]
+
diff --git a/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll b/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
new file mode 100644
index 0000000..ad02ece
--- /dev/null
+++ b/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32
+
+define i32 @main() {
+ %setle = icmp sle i64 1, 0 ; <i1> [#uses=1]
+ %select = select i1 true, i1 %setle, i1 true ; <i1> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll b/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll
new file mode 100644
index 0000000..671bf80
--- /dev/null
+++ b/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=ppc32
+
+define i64 @test() {
+ ret i64 undef
+}
diff --git a/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll
new file mode 100644
index 0000000..95012c3
--- /dev/null
+++ b/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll
@@ -0,0 +1,13 @@
+; this should not crash the ppc backend
+
+; RUN: llc < %s -march=ppc32
+
+
+define i32 @test(i32 %j.0.0.i) {
+ %tmp.85.i = and i32 %j.0.0.i, 7 ; <i32> [#uses=1]
+ %tmp.161278.i = bitcast i32 %tmp.85.i to i32 ; <i32> [#uses=1]
+ %tmp.5.i77.i = lshr i32 %tmp.161278.i, 3 ; <i32> [#uses=1]
+ ret i32 %tmp.5.i77.i
+}
+
+
diff --git a/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll b/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll
new file mode 100644
index 0000000..5d1df46
--- /dev/null
+++ b/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll
@@ -0,0 +1,11 @@
+; This function should have exactly one call to fixdfdi, no more!
+
+; RUN: llc < %s -march=ppc32 -mattr=-64bit | \
+; RUN: grep {bl .*fixdfdi} | count 1
+
+define double @test2(double %tmp.7705) {
+ %mem_tmp.2.0.in = fptosi double %tmp.7705 to i64 ; <i64> [#uses=1]
+ %mem_tmp.2.0 = sitofp i64 %mem_tmp.2.0.in to double ; <double> [#uses=1]
+ ret double %mem_tmp.2.0
+}
+
diff --git a/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll b/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll
new file mode 100644
index 0000000..8a5d3b0
--- /dev/null
+++ b/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll
@@ -0,0 +1,11 @@
+; This was erroneously being turned into an rlwinm instruction.
+; The sign bit does matter in this case.
+
+; RUN: llc < %s -march=ppc32 | grep srawi
+
+define i32 @test(i32 %X) {
+ %Y = and i32 %X, -2 ; <i32> [#uses=1]
+ %Z = ashr i32 %Y, 11 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
new file mode 100644
index 0000000..047a12b
--- /dev/null
+++ b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.2.0"
+
+define void @bar(i32 %G, i32 %E, i32 %F, i32 %A, i32 %B, i32 %C, i32 %D, i8* %fmt, ...) {
+ %ap = alloca i8* ; <i8**> [#uses=2]
+ %va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %va.upgrd.1 )
+ %tmp.1 = load i8** %ap ; <i8*> [#uses=1]
+ %tmp.0 = call double @foo( i8* %tmp.1 ) ; <double> [#uses=0]
+ ret void
+}
+
+declare void @llvm.va_start(i8*)
+
+declare double @foo(i8*)
+
diff --git a/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
new file mode 100644
index 0000000..97bb48e
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s | not grep {, f1}
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.2.0"
+
+; Dead argument should reserve an FP register.
+define double @bar(double %DEAD, double %X, double %Y) {
+ %tmp.2 = fadd double %X, %Y ; <double> [#uses=1]
+ ret double %tmp.2
+}
diff --git a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
new file mode 100644
index 0000000..fbf2540
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s
+
+define void @iterative_hash_host_wide_int() {
+ %zero = alloca i32 ; <i32*> [#uses=2]
+ %b = alloca i32 ; <i32*> [#uses=1]
+ store i32 0, i32* %zero
+ %tmp = load i32* %zero ; <i32> [#uses=1]
+ %tmp5 = bitcast i32 %tmp to i32 ; <i32> [#uses=1]
+ %tmp6.u = add i32 %tmp5, 32 ; <i32> [#uses=1]
+ %tmp6 = bitcast i32 %tmp6.u to i32 ; <i32> [#uses=1]
+ %tmp7 = load i64* null ; <i64> [#uses=1]
+ %tmp6.upgrd.1 = trunc i32 %tmp6 to i8 ; <i8> [#uses=1]
+ %shift.upgrd.2 = zext i8 %tmp6.upgrd.1 to i64 ; <i64> [#uses=1]
+ %tmp8 = ashr i64 %tmp7, %shift.upgrd.2 ; <i64> [#uses=1]
+ %tmp8.upgrd.3 = trunc i64 %tmp8 to i32 ; <i32> [#uses=1]
+ store i32 %tmp8.upgrd.3, i32* %b
+ unreachable
+}
+
diff --git a/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll b/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll
new file mode 100644
index 0000000..172e348
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32
+
+
+define double @CalcSpeed(float %tmp127) {
+ %tmp145 = fpext float %tmp127 to double ; <double> [#uses=1]
+ %tmp150 = call double asm "frsqrte $0,$1", "=f,f"( double %tmp145 ) ; <double> [#uses=1]
+ ret double %tmp150
+}
+
diff --git a/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll
new file mode 100644
index 0000000..969772e
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \
+; RUN: grep {vspltish v.*, 10}
+
+define void @test(<8 x i16>* %P) {
+ %tmp = load <8 x i16>* %P ; <<8 x i16>> [#uses=1]
+ %tmp1 = add <8 x i16> %tmp, < i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10 > ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp1, <8 x i16>* %P
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll
new file mode 100644
index 0000000..d225664
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll
@@ -0,0 +1,58 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5
+; END.
+
+define void @test(i8* %stack) {
+entry:
+ %tmp9 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ %tmp30 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp30, label %cond_next54, label %cond_true31
+cond_true860: ; preds = %bb855
+ %tmp879 = tail call <4 x float> @llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
+ %tmp880 = bitcast <4 x float> %tmp879 to <4 x i32> ; <<4 x i32>> [#uses=2]
+ %tmp883 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>> [#uses=1]
+ %tmp883.upgrd.1 = bitcast <4 x i32> %tmp883 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp885 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>> [#uses=1]
+ %tmp885.upgrd.2 = bitcast <4 x i32> %tmp885 to <4 x float> ; <<4 x float>> [#uses=1]
+ br label %cond_next905
+cond_true31: ; preds = %entry
+ ret void
+cond_next54: ; preds = %entry
+ br i1 %tmp9, label %cond_false385, label %bb279
+bb279: ; preds = %cond_next54
+ ret void
+cond_false385: ; preds = %cond_next54
+ %tmp388 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp388, label %cond_next463, label %cond_true389
+cond_true389: ; preds = %cond_false385
+ ret void
+cond_next463: ; preds = %cond_false385
+ %tmp1208107 = icmp ugt i8* null, %stack ; <i1> [#uses=1]
+ br i1 %tmp1208107, label %cond_true1209.preheader, label %bb1212
+cond_true498: ; preds = %cond_true1209.preheader
+ ret void
+cond_true519: ; preds = %cond_true1209.preheader
+ %bothcond = or i1 false, false ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb855, label %bb980
+cond_false548: ; preds = %cond_true1209.preheader
+ ret void
+bb855: ; preds = %cond_true519
+ %tmp859 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp859, label %cond_true860, label %cond_next905
+cond_next905: ; preds = %bb855, %cond_true860
+ %vfpw2.4 = phi <4 x float> [ %tmp885.upgrd.2, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0]
+ %vfpw1.4 = phi <4 x float> [ %tmp883.upgrd.1, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0]
+ %tmp930 = bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=0]
+ ret void
+bb980: ; preds = %cond_true519
+ ret void
+cond_true1209.preheader: ; preds = %cond_next463
+ %tmp496 = and i32 0, 12288 ; <i32> [#uses=1]
+ switch i32 %tmp496, label %cond_false548 [
+ i32 0, label %cond_true498
+ i32 4096, label %cond_true519
+ ]
+bb1212: ; preds = %cond_next463
+ ret void
+}
+
+declare <4 x float> @llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>)
diff --git a/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll
new file mode 100644
index 0000000..0205d10
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -march=ppc32
+; END.
+
+ %struct.attr_desc = type { i8*, %struct.attr_desc*, %struct.attr_value*, %struct.attr_value*, i32 }
+ %struct.attr_value = type { %struct.rtx_def*, %struct.attr_value*, %struct.insn_ent*, i32, i32 }
+ %struct.insn_def = type { %struct.insn_def*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
+ %struct.insn_ent = type { %struct.insn_ent*, %struct.insn_def* }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.u = type { [1 x i64] }
+
+define void @find_attr() {
+entry:
+ %tmp26 = icmp eq %struct.attr_desc* null, null ; <i1> [#uses=1]
+ br i1 %tmp26, label %bb30, label %cond_true27
+cond_true27: ; preds = %entry
+ ret void
+bb30: ; preds = %entry
+ %tmp67 = icmp eq %struct.attr_desc* null, null ; <i1> [#uses=1]
+ br i1 %tmp67, label %cond_next92, label %cond_true68
+cond_true68: ; preds = %bb30
+ ret void
+cond_next92: ; preds = %bb30
+ %tmp173 = getelementptr %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2]
+ %tmp174 = load i32* %tmp173 ; <i32> [#uses=1]
+ %tmp177 = and i32 %tmp174, -9 ; <i32> [#uses=1]
+ store i32 %tmp177, i32* %tmp173
+ %tmp180 = getelementptr %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1]
+ %tmp181 = load i32* %tmp180 ; <i32> [#uses=1]
+ %tmp185 = getelementptr %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2]
+ %tmp186 = load i32* %tmp185 ; <i32> [#uses=1]
+ %tmp183187 = shl i32 %tmp181, 1 ; <i32> [#uses=1]
+ %tmp188 = and i32 %tmp183187, 16 ; <i32> [#uses=1]
+ %tmp190 = and i32 %tmp186, -17 ; <i32> [#uses=1]
+ %tmp191 = or i32 %tmp190, %tmp188 ; <i32> [#uses=1]
+ store i32 %tmp191, i32* %tmp185
+ %tmp193 = getelementptr %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1]
+ %tmp194 = load i32* %tmp193 ; <i32> [#uses=1]
+ %tmp198 = getelementptr %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2]
+ %tmp199 = load i32* %tmp198 ; <i32> [#uses=1]
+ %tmp196200 = shl i32 %tmp194, 2 ; <i32> [#uses=1]
+ %tmp201 = and i32 %tmp196200, 64 ; <i32> [#uses=1]
+ %tmp203 = and i32 %tmp199, -65 ; <i32> [#uses=1]
+ %tmp204 = or i32 %tmp203, %tmp201 ; <i32> [#uses=1]
+ store i32 %tmp204, i32* %tmp198
+ %tmp206 = getelementptr %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1]
+ %tmp207 = load i32* %tmp206 ; <i32> [#uses=1]
+ %tmp211 = getelementptr %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2]
+ %tmp212 = load i32* %tmp211 ; <i32> [#uses=1]
+ %tmp209213 = shl i32 %tmp207, 1 ; <i32> [#uses=1]
+ %tmp214 = and i32 %tmp209213, 128 ; <i32> [#uses=1]
+ %tmp216 = and i32 %tmp212, -129 ; <i32> [#uses=1]
+ %tmp217 = or i32 %tmp216, %tmp214 ; <i32> [#uses=1]
+ store i32 %tmp217, i32* %tmp211
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll
new file mode 100644
index 0000000..1b8b064
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin | grep extsw | count 2
+
+@lens = external global i8* ; <i8**> [#uses=1]
+@vals = external global i32* ; <i32**> [#uses=1]
+
+define i32 @test(i32 %i) {
+ %tmp = load i8** @lens ; <i8*> [#uses=1]
+ %tmp1 = getelementptr i8* %tmp, i32 %i ; <i8*> [#uses=1]
+ %tmp.upgrd.1 = load i8* %tmp1 ; <i8> [#uses=1]
+ %tmp2 = zext i8 %tmp.upgrd.1 to i32 ; <i32> [#uses=1]
+ %tmp3 = load i32** @vals ; <i32*> [#uses=1]
+ %tmp5 = sub i32 1, %tmp2 ; <i32> [#uses=1]
+ %tmp6 = getelementptr i32* %tmp3, i32 %tmp5 ; <i32*> [#uses=1]
+ %tmp7 = load i32* %tmp6 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
+
diff --git a/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll
new file mode 100644
index 0000000..65dd568
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=ppc32
+
+define void @img2buf(i32 %symbol_size_in_bytes, i16* %ui16) nounwind {
+ %tmp93 = load i16* null ; <i16> [#uses=1]
+ %tmp99 = call i16 @llvm.bswap.i16( i16 %tmp93 ) ; <i16> [#uses=1]
+ store i16 %tmp99, i16* %ui16
+ ret void
+}
+
+declare i16 @llvm.bswap.i16(i16)
+
diff --git a/test/CodeGen/PowerPC/2006-08-11-RetVector.ll b/test/CodeGen/PowerPC/2006-08-11-RetVector.ll
new file mode 100644
index 0000000..a947e5c
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-08-11-RetVector.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsldoi
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep vor
+
+define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) {
+ %tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp76
+}
+
diff --git a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll
new file mode 100644
index 0000000..cb76b5c
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s
+
+ %struct..0anon = type { i32 }
+ %struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] }
+
+define fastcc void @immed_double_const(i32 %i0, i32 %i1) {
+entry:
+ %tmp1 = load i32* null ; <i32> [#uses=1]
+ switch i32 %tmp1, label %bb103 [
+ i32 1, label %bb
+ i32 3, label %bb
+ ]
+bb: ; preds = %entry, %entry
+ %tmp14 = icmp sgt i32 0, 31 ; <i1> [#uses=1]
+ br i1 %tmp14, label %cond_next77, label %cond_next17
+cond_next17: ; preds = %bb
+ ret void
+cond_next77: ; preds = %bb
+ %tmp79.not = icmp ne i32 %i1, 0 ; <i1> [#uses=1]
+ %tmp84 = icmp slt i32 %i0, 0 ; <i1> [#uses=2]
+ %bothcond1 = or i1 %tmp79.not, %tmp84 ; <i1> [#uses=1]
+ br i1 %bothcond1, label %bb88, label %bb99
+bb88: ; preds = %cond_next77
+ %bothcond2 = and i1 false, %tmp84 ; <i1> [#uses=0]
+ ret void
+bb99: ; preds = %cond_next77
+ ret void
+bb103: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2006-09-28-shift_64.ll b/test/CodeGen/PowerPC/2006-09-28-shift_64.ll
new file mode 100644
index 0000000..f748a8b
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-09-28-shift_64.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=ppc64
+
+target datalayout = "E-p:64:64"
+target triple = "powerpc64-apple-darwin8"
+
+define void @glArrayElement_CompExec() {
+entry:
+ %tmp3 = and i64 0, -8388609 ; <i64> [#uses=1]
+ br label %cond_true24
+cond_false: ; preds = %cond_true24
+ ret void
+cond_true24: ; preds = %cond_true24, %entry
+ %indvar.ph = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true24 ] ; <i32> [#uses=1]
+ %indvar = add i32 0, %indvar.ph ; <i32> [#uses=2]
+ %code.0 = trunc i32 %indvar to i8 ; <i8> [#uses=1]
+ %tmp5 = add i8 %code.0, 16 ; <i8> [#uses=1]
+ %shift.upgrd.1 = zext i8 %tmp5 to i64 ; <i64> [#uses=1]
+ %tmp7 = lshr i64 %tmp3, %shift.upgrd.1 ; <i64> [#uses=1]
+ %tmp7.upgrd.2 = trunc i64 %tmp7 to i32 ; <i32> [#uses=1]
+ %tmp8 = and i32 %tmp7.upgrd.2, 1 ; <i32> [#uses=1]
+ %tmp8.upgrd.3 = icmp eq i32 %tmp8, 0 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp8.upgrd.3, label %cond_false, label %cond_true24
+}
+
diff --git a/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll
new file mode 100644
index 0000000..57ed250
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=ppc32 -combiner-alias-analysis | grep f5
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.2.0"
+ %struct.Point = type { double, double, double }
+
+define void @offset(%struct.Point* %pt, double %x, double %y, double %z) {
+entry:
+ %tmp = getelementptr %struct.Point* %pt, i32 0, i32 0 ; <double*> [#uses=2]
+ %tmp.upgrd.1 = load double* %tmp ; <double> [#uses=1]
+ %tmp2 = fadd double %tmp.upgrd.1, %x ; <double> [#uses=1]
+ store double %tmp2, double* %tmp
+ %tmp6 = getelementptr %struct.Point* %pt, i32 0, i32 1 ; <double*> [#uses=2]
+ %tmp7 = load double* %tmp6 ; <double> [#uses=1]
+ %tmp9 = fadd double %tmp7, %y ; <double> [#uses=1]
+ store double %tmp9, double* %tmp6
+ %tmp13 = getelementptr %struct.Point* %pt, i32 0, i32 2 ; <double*> [#uses=2]
+ %tmp14 = load double* %tmp13 ; <double> [#uses=1]
+ %tmp16 = fadd double %tmp14, %z ; <double> [#uses=1]
+ store double %tmp16, double* %tmp13
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll b/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll
new file mode 100644
index 0000000..002a064
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=ppc32 | not grep IMPLICIT_DEF
+
+define void @foo(i64 %X) {
+entry:
+ %tmp1 = and i64 %X, 3 ; <i64> [#uses=1]
+ %tmp = icmp sgt i64 %tmp1, 2 ; <i1> [#uses=1]
+ br i1 %tmp, label %UnifiedReturnBlock, label %cond_true
+cond_true: ; preds = %entry
+ %tmp.upgrd.1 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
+
diff --git a/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll b/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
new file mode 100644
index 0000000..3d462b4
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=ppc32 | grep xor
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.7.0"
+
+define void @foo(i32 %X) {
+entry:
+ %tmp1 = and i32 %X, 3 ; <i32> [#uses=1]
+ %tmp2 = xor i32 %tmp1, 1 ; <i32> [#uses=1]
+ %tmp = icmp eq i32 %tmp2, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %UnifiedReturnBlock, label %cond_true
+cond_true: ; preds = %entry
+ tail call i32 (...)* @bar( ) ; <i32>:0 [#uses=0]
+ ret void
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
+
diff --git a/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll b/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
new file mode 100644
index 0000000..3284f0a
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=ppc64
+
+define i32* @foo(i32 %n) {
+ %A = alloca i32, i32 %n ; <i32*> [#uses=1]
+ ret i32* %A
+}
+
diff --git a/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
new file mode 100644
index 0000000..49b3b9d
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=ppc32 | grep rlwimi
+
+define void @test(i16 %div.0.i.i.i.i, i32 %L_num.0.i.i.i.i, i32 %tmp1.i.i206.i.i, i16* %P) {
+ %X = shl i16 %div.0.i.i.i.i, 1 ; <i16> [#uses=1]
+ %tmp28.i.i.i.i = shl i32 %L_num.0.i.i.i.i, 1 ; <i32> [#uses=1]
+ %tmp31.i.i.i.i = icmp slt i32 %tmp28.i.i.i.i, %tmp1.i.i206.i.i ; <i1> [#uses=1]
+ %tmp31.i.i.i.i.upgrd.1 = zext i1 %tmp31.i.i.i.i to i16 ; <i16> [#uses=1]
+ %tmp371.i.i.i.i1 = or i16 %tmp31.i.i.i.i.upgrd.1, %X ; <i16> [#uses=1]
+ %div.0.be.i.i.i.i = xor i16 %tmp371.i.i.i.i1, 1 ; <i16> [#uses=1]
+ store i16 %div.0.be.i.i.i.i, i16* %P
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
new file mode 100644
index 0000000..61b9967
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5
+
+define void @glgRunProcessor15() {
+ %tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >; <<4 x float>> [#uses=1]
+ %tmp3030030304.i = bitcast <4 x float> %tmp26355.i to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp30305.i = shufflevector <8 x i16> zeroinitializer, <8 x i16> %tmp3030030304.i, <8 x i32> < i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15 > ; <<8 x i16>> [#uses=1]
+ %tmp30305.i.upgrd.1 = bitcast <8 x i16> %tmp30305.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp30305.i.upgrd.1, <4 x i32>* null
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll
new file mode 100644
index 0000000..ba86304
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=ppc64
+; RUN: llc < %s -march=ppc32
+; RUN: llc < %s
+
+define void @bitap() {
+entry:
+ %RMask.i = alloca [256 x i32], align 16 ; <[256 x i32]*> [#uses=1]
+ %buffer = alloca [147456 x i8], align 16 ; <[147456 x i8]*> [#uses=0]
+ br i1 false, label %bb19, label %bb.preheader
+bb.preheader: ; preds = %entry
+ ret void
+bb19: ; preds = %entry
+ br i1 false, label %bb12.i, label %cond_next39
+bb12.i: ; preds = %bb12.i, %bb19
+ %i.0.i = phi i32 [ %tmp11.i, %bb12.i ], [ 0, %bb19 ] ; <i32> [#uses=2]
+ %gep.upgrd.1 = zext i32 %i.0.i to i64 ; <i64> [#uses=1]
+ %tmp9.i = getelementptr [256 x i32]* %RMask.i, i32 0, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp9.i
+ %tmp11.i = add i32 %i.0.i, 1 ; <i32> [#uses=1]
+ br label %bb12.i
+cond_next39: ; preds = %bb19
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll
new file mode 100644
index 0000000..6d9a3fa
--- /dev/null
+++ b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=ppc64
+; RUN: llc < %s -march=ppc32
+; RUN: llc < %s
+
[email protected] = external global i1 ; <i1*> [#uses=1]
+
+define fastcc void @qst() {
+entry:
+ br i1 true, label %cond_next71, label %cond_true
+cond_true: ; preds = %entry
+ ret void
+cond_next71: ; preds = %entry
+ %tmp73.b = load i1* @qsz.b ; <i1> [#uses=1]
+ %ii.4.ph = select i1 %tmp73.b, i64 4, i64 0 ; <i64> [#uses=1]
+ br label %bb139
+bb82: ; preds = %bb139
+ ret void
+bb139: ; preds = %bb139, %cond_next71
+ %exitcond89 = icmp eq i64 0, %ii.4.ph ; <i1> [#uses=1]
+ br i1 %exitcond89, label %bb82, label %bb139
+}
+
diff --git a/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll b/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll
new file mode 100644
index 0000000..805528c
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32 | grep extsb
+; RUN: llc < %s -march=ppc32 | grep extsh
+
+define i32 @p1(i8 %c, i16 %s) {
+entry:
+ %tmp = sext i8 %c to i32 ; <i32> [#uses=1]
+ %tmp1 = sext i16 %s to i32 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp1, %tmp ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
new file mode 100644
index 0000000..7b00ac6
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
+; RUN: grep cntlzw
+
+define i32 @foo() nounwind {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %temp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %ctz_x = alloca i32, align 4 ; <i32*> [#uses=3]
+ %ctz_c = alloca i32, align 4 ; <i32*> [#uses=2]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 61440, i32* %ctz_x
+ %tmp = load i32* %ctz_x ; <i32> [#uses=1]
+ %tmp1 = sub i32 0, %tmp ; <i32> [#uses=1]
+ %tmp2 = load i32* %ctz_x ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp1, %tmp2 ; <i32> [#uses=1]
+ %tmp4 = call i32 asm "$(cntlz$|cntlzw$) $0,$1", "=r,r,~{dirflag},~{fpsr},~{flags}"( i32 %tmp3 ) ; <i32> [#uses=1]
+ store i32 %tmp4, i32* %ctz_c
+ %tmp5 = load i32* %ctz_c ; <i32> [#uses=1]
+ store i32 %tmp5, i32* %temp
+ %tmp6 = load i32* %temp ; <i32> [#uses=1]
+ store i32 %tmp6, i32* %retval
+ br label %return
+
+return: ; preds = %entry
+ %retval2 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval2
+}
diff --git a/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll b/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
new file mode 100644
index 0000000..0c45472
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=ppc32
+; RUN: llc < %s -march=ppc64
+
+define i16 @test(i8* %d1, i16* %d2) {
+ %tmp237 = call i16 asm "lhbrx $0, $2, $1", "=r,r,bO,m"( i8* %d1, i32 0, i16* %d2 ) ; <i16> [#uses=1]
+ ret i16 %tmp237
+}
diff --git a/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll b/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
new file mode 100644
index 0000000..fe5145d
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=ppc32
+; RUN: llc < %s -march=ppc64
+
+; Test two things: 1) that a frameidx can be rewritten in an inline asm
+; 2) that inline asms can handle reg+imm addr modes.
+
+ %struct.A = type { i32, i32 }
+
+
+define void @test1() {
+entry:
+ %Out = alloca %struct.A, align 4 ; <%struct.A*> [#uses=1]
+ %tmp2 = getelementptr %struct.A* %Out, i32 0, i32 1
+ %tmp5 = call i32 asm "lwbrx $0, $1", "=r,m"(i32* %tmp2 )
+ ret void
+}
+
+define void @test2() {
+entry:
+ %Out = alloca %struct.A, align 4 ; <%struct.A*> [#uses=1]
+ %tmp2 = getelementptr %struct.A* %Out, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp5 = call i32 asm "lwbrx $0, $2, $1", "=r,r,bO,m"( i8* null, i32 0, i32* %tmp2 ) ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll b/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll
new file mode 100644
index 0000000..621d43b
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | \
+; RUN: grep align.*3
+
+@X = global <{i32, i32}> <{ i32 1, i32 123 }>
diff --git a/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll b/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll
new file mode 100644
index 0000000..f48f365
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.8.0"
+
+
+define void @blargh() {
+entry:
+ %tmp4 = call i32 asm "rlwimi $0,$2,$3,$4,$5", "=r,0,r,n,n,n"( i32 0, i32 0, i32 0, i32 24, i32 31 ) ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll b/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll
new file mode 100644
index 0000000..0473857
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s | grep mflr | count 1
+
+target datalayout = "e-p:32:32"
+target triple = "powerpc-apple-darwin8"
+@str = internal constant [18 x i8] c"hello world!, %d\0A\00" ; <[18 x i8]*> [#uses=1]
+
+
+define i32 @main() {
+entry:
+ %tmp = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([18 x i8]* @str, i32 0, i32 0) ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll
new file mode 100644
index 0000000..e93395a
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=ppc64 -mcpu=g5 | grep cntlzd
+
+define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) {
+ %tmp19 = load i64* %t
+ %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19 ) ; <i64> [#uses=1]
+ %tmp23 = trunc i64 %tmp22 to i32
+ %tmp89 = add i32 %tmp23, -64 ; <i32> [#uses=1]
+ %tmp90 = add i32 %tmp89, 0 ; <i32> [#uses=1]
+ ret i32 %tmp90
+}
+
+declare i64 @llvm.ctlz.i64(i64)
diff --git a/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll
new file mode 100644
index 0000000..d43916d
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll
@@ -0,0 +1,1801 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5
+
+define void @test(<4 x float>*, { { i16, i16, i32 } }*) {
+xOperationInitMasks.exit:
+ %.sub7896 = getelementptr [4 x <4 x i32>]* null, i32 0, i32 0 ; <<4 x i32>*> [#uses=24]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 175, i32 3 ; <<4 x float>*>:2 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 2 ; <<4 x float>*>:3 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 3 ; <<4 x float>*>:4 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 1 ; <<4 x float>*>:5 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 2 ; <<4 x float>*>:6 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 3 ; <<4 x float>*>:7 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 1 ; <<4 x float>*>:8 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 2 ; <<4 x float>*>:9 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 3 ; <<4 x float>*>:10 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 1 ; <<4 x float>*>:11 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 2 ; <<4 x float>*>:12 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 3 ; <<4 x float>*>:13 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 1 ; <<4 x float>*>:14 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 2 ; <<4 x float>*>:15 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 3 ; <<4 x float>*>:16 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 1 ; <<4 x float>*>:17 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 2 ; <<4 x float>*>:18 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 3 ; <<4 x float>*>:19 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 1 ; <<4 x float>*>:20 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 2 ; <<4 x float>*>:21 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 3 ; <<4 x float>*>:22 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 1 ; <<4 x float>*>:23 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 2 ; <<4 x float>*>:24 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 3 ; <<4 x float>*>:25 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 1 ; <<4 x float>*>:26 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 2 ; <<4 x float>*>:27 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 3 ; <<4 x float>*>:28 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 1 ; <<4 x float>*>:29 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 2 ; <<4 x float>*>:30 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 3 ; <<4 x float>*>:31 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 1 ; <<4 x float>*>:32 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 2 ; <<4 x float>*>:33 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 3 ; <<4 x float>*>:34 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 1 ; <<4 x float>*>:35 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 2 ; <<4 x float>*>:36 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 3 ; <<4 x float>*>:37 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 1 ; <<4 x float>*>:38 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 2 ; <<4 x float>*>:39 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 3 ; <<4 x float>*>:40 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 1 ; <<4 x float>*>:41 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 2 ; <<4 x float>*>:42 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 3 ; <<4 x float>*>:43 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 1 ; <<4 x float>*>:44 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 2 ; <<4 x float>*>:45 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 3 ; <<4 x float>*>:46 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 1 ; <<4 x float>*>:47 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 2 ; <<4 x float>*>:48 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 3 ; <<4 x float>*>:49 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 1 ; <<4 x float>*>:50 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 2 ; <<4 x float>*>:51 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 3 ; <<4 x float>*>:52 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 1 ; <<4 x float>*>:53 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 2 ; <<4 x float>*>:54 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 3 ; <<4 x float>*>:55 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 1 ; <<4 x float>*>:56 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 2 ; <<4 x float>*>:57 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 3 ; <<4 x float>*>:58 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 1 ; <<4 x float>*>:59 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 2 ; <<4 x float>*>:60 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 3 ; <<4 x float>*>:61 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 1 ; <<4 x float>*>:62 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 2 ; <<4 x float>*>:63 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 3 ; <<4 x float>*>:64 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 1 ; <<4 x float>*>:65 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 2 ; <<4 x float>*>:66 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 3 ; <<4 x float>*>:67 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 1 ; <<4 x float>*>:68 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 2 ; <<4 x float>*>:69 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 3 ; <<4 x float>*>:70 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 1 ; <<4 x float>*>:71 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 2 ; <<4 x float>*>:72 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 3 ; <<4 x float>*>:73 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 1 ; <<4 x float>*>:74 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 2 ; <<4 x float>*>:75 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 3 ; <<4 x float>*>:76 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 1 ; <<4 x float>*>:77 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 2 ; <<4 x float>*>:78 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 3 ; <<4 x float>*>:79 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 1 ; <<4 x float>*>:80 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 2 ; <<4 x float>*>:81 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 3 ; <<4 x float>*>:82 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 1 ; <<4 x float>*>:83 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 2 ; <<4 x float>*>:84 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 3 ; <<4 x float>*>:85 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 1 ; <<4 x float>*>:86 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 2 ; <<4 x float>*>:87 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 3 ; <<4 x float>*>:88 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 145, i32 1 ; <<4 x float>*>:89 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 143, i32 1 ; <<4 x float>*>:95 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 132, i32 2 ; <<4 x float>*>:129 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 1 ; <<4 x float>*>:137 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 2 ; <<4 x float>*>:138 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 3 ; <<4 x float>*>:139 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 1 ; <<4 x float>*>:140 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 2 ; <<4 x float>*>:141 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 3 ; <<4 x float>*>:142 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 1 ; <<4 x float>*>:143 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 2 ; <<4 x float>*>:144 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 3 ; <<4 x float>*>:145 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 1 ; <<4 x float>*>:146 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 2 ; <<4 x float>*>:147 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 3 ; <<4 x float>*>:148 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 1 ; <<4 x float>*>:149 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 2 ; <<4 x float>*>:150 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 3 ; <<4 x float>*>:151 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 1 ; <<4 x float>*>:152 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 2 ; <<4 x float>*>:153 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 3 ; <<4 x float>*>:154 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 1 ; <<4 x float>*>:155 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 2 ; <<4 x float>*>:156 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 3 ; <<4 x float>*>:157 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 1 ; <<4 x float>*>:158 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 2 ; <<4 x float>*>:159 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 3 ; <<4 x float>*>:160 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 1 ; <<4 x float>*>:161 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 2 ; <<4 x float>*>:162 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 3 ; <<4 x float>*>:163 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 1 ; <<4 x float>*>:164 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 2 ; <<4 x float>*>:165 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 3 ; <<4 x float>*>:166 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 1 ; <<4 x float>*>:167 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 2 ; <<4 x float>*>:168 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 3 ; <<4 x float>*>:169 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 1 ; <<4 x float>*>:170 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 2 ; <<4 x float>*>:171 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 3 ; <<4 x float>*>:172 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 1 ; <<4 x float>*>:173 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 2 ; <<4 x float>*>:174 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 3 ; <<4 x float>*>:175 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 1 ; <<4 x float>*>:176 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 2 ; <<4 x float>*>:177 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 3 ; <<4 x float>*>:178 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 1 ; <<4 x float>*>:179 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 2 ; <<4 x float>*>:180 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 3 ; <<4 x float>*>:181 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 1 ; <<4 x float>*>:182 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 2 ; <<4 x float>*>:183 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 3 ; <<4 x float>*>:184 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 1 ; <<4 x float>*>:185 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 2 ; <<4 x float>*>:186 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 3 ; <<4 x float>*>:187 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 1 ; <<4 x float>*>:188 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 2 ; <<4 x float>*>:189 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 3 ; <<4 x float>*>:190 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 1 ; <<4 x float>*>:191 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 2 ; <<4 x float>*>:192 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 3 ; <<4 x float>*>:193 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 1 ; <<4 x float>*>:194 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 2 ; <<4 x float>*>:195 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 3 ; <<4 x float>*>:196 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 1 ; <<4 x float>*>:197 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 2 ; <<4 x float>*>:198 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 3 ; <<4 x float>*>:199 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 1 ; <<4 x float>*>:200 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 2 ; <<4 x float>*>:201 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 3 ; <<4 x float>*>:202 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 1 ; <<4 x float>*>:203 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 2 ; <<4 x float>*>:204 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 3 ; <<4 x float>*>:205 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 1 ; <<4 x float>*>:206 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 2 ; <<4 x float>*>:207 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 3 ; <<4 x float>*>:208 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 1 ; <<4 x float>*>:209 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 2 ; <<4 x float>*>:210 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 3 ; <<4 x float>*>:211 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 1 ; <<4 x float>*>:212 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 2 ; <<4 x float>*>:213 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 3 ; <<4 x float>*>:214 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 1 ; <<4 x float>*>:215 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 2 ; <<4 x float>*>:216 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 3 ; <<4 x float>*>:217 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 1 ; <<4 x float>*>:218 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 2 ; <<4 x float>*>:219 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 3 ; <<4 x float>*>:220 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 1 ; <<4 x float>*>:221 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 2 ; <<4 x float>*>:222 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 3 ; <<4 x float>*>:223 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 1 ; <<4 x float>*>:224 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 2 ; <<4 x float>*>:225 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 3 ; <<4 x float>*>:226 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 1 ; <<4 x float>*>:227 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 2 ; <<4 x float>*>:228 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 3 ; <<4 x float>*>:229 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 1 ; <<4 x float>*>:230 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 2 ; <<4 x float>*>:231 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 3 ; <<4 x float>*>:232 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 1 ; <<4 x float>*>:233 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 2 ; <<4 x float>*>:234 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 3 ; <<4 x float>*>:235 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 1 ; <<4 x float>*>:236 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 2 ; <<4 x float>*>:237 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 3 ; <<4 x float>*>:238 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 1 ; <<4 x float>*>:239 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 2 ; <<4 x float>*>:240 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 3 ; <<4 x float>*>:241 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 1 ; <<4 x float>*>:242 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 2 ; <<4 x float>*>:243 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 3 ; <<4 x float>*>:244 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 1 ; <<4 x float>*>:245 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 2 ; <<4 x float>*>:246 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 3 ; <<4 x float>*>:247 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 1 ; <<4 x float>*>:248 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 2 ; <<4 x float>*>:249 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 3 ; <<4 x float>*>:250 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 1 ; <<4 x float>*>:251 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 2 ; <<4 x float>*>:252 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 3 ; <<4 x float>*>:253 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 1 ; <<4 x float>*>:254 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 2 ; <<4 x float>*>:255 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 3 ; <<4 x float>*>:256 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 1 ; <<4 x float>*>:257 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 2 ; <<4 x float>*>:258 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 3 ; <<4 x float>*>:259 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 1 ; <<4 x float>*>:260 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 2 ; <<4 x float>*>:261 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 3 ; <<4 x float>*>:262 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 1 ; <<4 x float>*>:263 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 2 ; <<4 x float>*>:264 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 3 ; <<4 x float>*>:265 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 1 ; <<4 x float>*>:266 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 2 ; <<4 x float>*>:267 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 3 ; <<4 x float>*>:268 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 85, i32 1 ; <<4 x float>*>:269 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 63, i32 3 ; <<4 x float>*>:337 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 58, i32 3 ; <<4 x float>*>:352 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 56, i32 2 ; <<4 x float>*>:357 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 56, i32 3 ; <<4 x float>*>:358 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 1 ; <<4 x float>*>:359 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 2 ; <<4 x float>*>:360 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 3 ; <<4 x float>*>:361 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 1 ; <<4 x float>*>:362 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 2 ; <<4 x float>*>:363 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 3 ; <<4 x float>*>:364 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 1 ; <<4 x float>*>:365 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 2 ; <<4 x float>*>:366 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 3 ; <<4 x float>*>:367 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 1 ; <<4 x float>*>:368 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 2 ; <<4 x float>*>:369 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 3 ; <<4 x float>*>:370 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 1 ; <<4 x float>*>:371 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 2 ; <<4 x float>*>:372 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 3 ; <<4 x float>*>:373 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 1 ; <<4 x float>*>:374 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 2 ; <<4 x float>*>:375 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 3 ; <<4 x float>*>:376 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 1 ; <<4 x float>*>:377 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 2 ; <<4 x float>*>:378 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 3 ; <<4 x float>*>:379 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 1 ; <<4 x float>*>:380 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 2 ; <<4 x float>*>:381 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 3 ; <<4 x float>*>:382 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 1 ; <<4 x float>*>:383 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 2 ; <<4 x float>*>:384 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 3 ; <<4 x float>*>:385 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 1 ; <<4 x float>*>:386 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 2 ; <<4 x float>*>:387 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 3 ; <<4 x float>*>:388 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 1 ; <<4 x float>*>:389 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 2 ; <<4 x float>*>:390 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 3 ; <<4 x float>*>:391 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 1 ; <<4 x float>*>:392 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 2 ; <<4 x float>*>:393 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 3 ; <<4 x float>*>:394 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 1 ; <<4 x float>*>:395 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 2 ; <<4 x float>*>:396 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 3 ; <<4 x float>*>:397 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 1 ; <<4 x float>*>:398 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 2 ; <<4 x float>*>:399 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 3 ; <<4 x float>*>:400 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 1 ; <<4 x float>*>:401 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 2 ; <<4 x float>*>:402 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 3 ; <<4 x float>*>:403 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 1 ; <<4 x float>*>:404 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 2 ; <<4 x float>*>:405 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 3 ; <<4 x float>*>:406 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 1 ; <<4 x float>*>:407 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 2 ; <<4 x float>*>:408 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 3 ; <<4 x float>*>:409 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 1 ; <<4 x float>*>:410 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 2 ; <<4 x float>*>:411 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 3 ; <<4 x float>*>:412 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 1 ; <<4 x float>*>:413 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 2 ; <<4 x float>*>:414 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 3 ; <<4 x float>*>:415 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 1 ; <<4 x float>*>:416 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 2 ; <<4 x float>*>:417 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 3 ; <<4 x float>*>:418 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 1 ; <<4 x float>*>:419 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 2 ; <<4 x float>*>:420 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 3 ; <<4 x float>*>:421 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 1 ; <<4 x float>*>:422 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 2 ; <<4 x float>*>:423 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 3 ; <<4 x float>*>:424 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 1 ; <<4 x float>*>:425 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 2 ; <<4 x float>*>:426 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 3 ; <<4 x float>*>:427 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 1 ; <<4 x float>*>:428 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 2 ; <<4 x float>*>:429 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 3 ; <<4 x float>*>:430 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 1 ; <<4 x float>*>:431 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 2 ; <<4 x float>*>:432 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 3 ; <<4 x float>*>:433 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 1 ; <<4 x float>*>:434 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 2 ; <<4 x float>*>:435 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 3 ; <<4 x float>*>:436 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 1 ; <<4 x float>*>:437 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 2 ; <<4 x float>*>:438 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 3 ; <<4 x float>*>:439 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 1 ; <<4 x float>*>:440 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 2 ; <<4 x float>*>:441 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 3 ; <<4 x float>*>:442 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 1 ; <<4 x float>*>:443 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 2 ; <<4 x float>*>:444 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 3 ; <<4 x float>*>:445 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 26, i32 1 ; <<4 x float>*>:446 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 26, i32 3 ; <<4 x float>*>:448 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 184, i32 3 ; <<4 x float>*>:505 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 185, i32 1 ; <<4 x float>*>:506 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 11, i32 3 ; <<4 x float>*>:520 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 12, i32 1 ; <<4 x float>*>:521 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 12, i32 2 ; <<4 x float>*>:522 [#uses=0]
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+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 13, i32 3 ; <<4 x float>*>:526 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:527 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:528 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:529 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:530 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:531 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:532 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:533 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:534 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:535 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 1 ; <<4 x float>*>:536 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 2 ; <<4 x float>*>:537 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 3 ; <<4 x float>*>:538 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 1 ; <<4 x float>*>:539 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 2 ; <<4 x float>*>:540 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 3 ; <<4 x float>*>:541 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:542 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:543 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:544 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 1 ; <<4 x float>*>:545 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 2 ; <<4 x float>*>:546 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 3 ; <<4 x float>*>:547 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 1 ; <<4 x float>*>:548 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 2 ; <<4 x float>*>:549 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 3 ; <<4 x float>*>:550 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:551 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 1 ; <<4 x float>*>:552 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 2 ; <<4 x float>*>:553 [#uses=1]
+ load <4 x float>* %553 ; <<4 x float>>:554 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 3 ; <<4 x float>*>:555 [#uses=0]
+ shufflevector <4 x float> %554, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:556 [#uses=1]
+ call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> zeroinitializer, <4 x float> %556 ) ; <<4 x i32>>:557 [#uses=0]
+ bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:558 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:559 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 2 ; <<4 x float>*>:560 [#uses=1]
+ store <4 x float> zeroinitializer, <4 x float>* %560
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:561 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:562 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 2 ; <<4 x float>*>:563 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:564 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:565 [#uses=1]
+ store <4 x float> %565, <4 x float>* null
+ icmp eq i32 0, 0 ; <i1>:566 [#uses=1]
+ br i1 %566, label %.critedge, label %xPIF.exit
+
+.critedge: ; preds = %xOperationInitMasks.exit
+ getelementptr [4 x <4 x i32>]* null, i32 0, i32 3 ; <<4 x i32>*>:567 [#uses=0]
+ and <4 x i32> zeroinitializer, zeroinitializer ; <<4 x i32>>:568 [#uses=0]
+ or <4 x i32> zeroinitializer, zeroinitializer ; <<4 x i32>>:569 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:570 [#uses=1]
+ br i1 %570, label %.critedge7898, label %xPBRK.exit
+
+.critedge7898: ; preds = %.critedge
+ br label %xPIF.exit
+
+xPIF.exit: ; preds = %.critedge7898, %xOperationInitMasks.exit
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 1 ; <<4 x float>*>:571 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:572 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:573 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:574 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:575 [#uses=0]
+ load <4 x float>* %0 ; <<4 x float>>:576 [#uses=0]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:577 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 0 ; <<4 x float>*>:578 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:579 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:580 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:581 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:582 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:583 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:584 [#uses=1]
+ load <4 x float>* %584 ; <<4 x float>>:585 [#uses=1]
+ load <4 x float>* null ; <<4 x float>>:586 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:587 [#uses=1]
+ load <4 x float>* %587 ; <<4 x float>>:588 [#uses=1]
+ shufflevector <4 x float> %583, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:589 [#uses=1]
+ shufflevector <4 x float> %585, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:590 [#uses=1]
+ shufflevector <4 x float> %588, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:591 [#uses=1]
+ fmul <4 x float> zeroinitializer, %589 ; <<4 x float>>:592 [#uses=0]
+ fmul <4 x float> zeroinitializer, %590 ; <<4 x float>>:593 [#uses=0]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:594 [#uses=1]
+ fmul <4 x float> zeroinitializer, %591 ; <<4 x float>>:595 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:596 [#uses=2]
+ load <4 x float>* %596 ; <<4 x float>>:597 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* %596
+ load <4 x float>* null ; <<4 x float>>:598 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:599 [#uses=0]
+ shufflevector <4 x float> %594, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:600 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:601 [#uses=2]
+ load <4 x float>* %601 ; <<4 x float>>:602 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* %601
+ load <4 x float>* null ; <<4 x float>>:603 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:604 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:605 [#uses=1]
+ load <4 x float>* %605 ; <<4 x float>>:606 [#uses=1]
+ fsub <4 x float> zeroinitializer, %604 ; <<4 x float>>:607 [#uses=2]
+ fsub <4 x float> zeroinitializer, %606 ; <<4 x float>>:608 [#uses=2]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:609 [#uses=0]
+ br i1 false, label %617, label %610
+
+; <label>:610 ; preds = %xPIF.exit
+ load <4 x float>* null ; <<4 x float>>:611 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:612 [#uses=2]
+ load <4 x float>* %612 ; <<4 x float>>:613 [#uses=1]
+ shufflevector <4 x float> %607, <4 x float> %613, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:614 [#uses=1]
+ store <4 x float> %614, <4 x float>* %612
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:615 [#uses=2]
+ load <4 x float>* %615 ; <<4 x float>>:616 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* %615
+ br label %xST.exit400
+
+; <label>:617 ; preds = %xPIF.exit
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:618 [#uses=0]
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:619 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %619, <4 x i32> zeroinitializer ) ; <i32>:620 [#uses=1]
+ icmp eq i32 %620, 0 ; <i1>:621 [#uses=1]
+ br i1 %621, label %625, label %622
+
+; <label>:622 ; preds = %617
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:623 [#uses=0]
+ shufflevector <4 x float> %607, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:624 [#uses=0]
+ br label %625
+
+; <label>:625 ; preds = %622, %617
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:626 [#uses=0]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:627 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:628 [#uses=1]
+ load <4 x float>* %628 ; <<4 x float>>:629 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:630 [#uses=0]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:631 [#uses=1]
+ icmp eq i32 %631, 0 ; <i1>:632 [#uses=1]
+ br i1 %632, label %xST.exit400, label %633
+
+; <label>:633 ; preds = %625
+ load <4 x float>* null ; <<4 x float>>:634 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %634, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:635 [#uses=1]
+ store <4 x float> %635, <4 x float>* null
+ br label %xST.exit400
+
+xST.exit400: ; preds = %633, %625, %610
+ %.17218 = phi <4 x float> [ zeroinitializer, %610 ], [ %608, %633 ], [ %608, %625 ] ; <<4 x float>> [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 0 ; <<4 x float>*>:636 [#uses=1]
+ load <4 x float>* %636 ; <<4 x float>>:637 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:638 [#uses=2]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:639 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:640 [#uses=2]
+ fmul <4 x float> %638, %638 ; <<4 x float>>:641 [#uses=1]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:642 [#uses=0]
+ fmul <4 x float> %640, %640 ; <<4 x float>>:643 [#uses=2]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>>:644 [#uses=0]
+ shufflevector <4 x float> %643, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>>:645 [#uses=1]
+ fadd <4 x float> %645, %643 ; <<4 x float>>:646 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:647 [#uses=1]
+ shufflevector <4 x float> %641, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:648 [#uses=1]
+ fadd <4 x float> zeroinitializer, %647 ; <<4 x float>>:649 [#uses=2]
+ fadd <4 x float> zeroinitializer, %648 ; <<4 x float>>:650 [#uses=0]
+ fadd <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:651 [#uses=2]
+ call <4 x float> @llvm.ppc.altivec.vrsqrtefp( <4 x float> %649 ) ; <<4 x float>>:652 [#uses=1]
+ fmul <4 x float> %652, %649 ; <<4 x float>>:653 [#uses=1]
+ call <4 x float> @llvm.ppc.altivec.vrsqrtefp( <4 x float> %651 ) ; <<4 x float>>:654 [#uses=1]
+ fmul <4 x float> %654, %651 ; <<4 x float>>:655 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:656 [#uses=1]
+ br i1 %656, label %665, label %657
+
+; <label>:657 ; preds = %xST.exit400
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:658 [#uses=0]
+ shufflevector <4 x float> %653, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:659 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:660 [#uses=1]
+ load <4 x float>* %660 ; <<4 x float>>:661 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:662 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:663 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:664 [#uses=0]
+ br label %xST.exit402
+
+; <label>:665 ; preds = %xST.exit400
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:666 [#uses=0]
+ br i1 false, label %669, label %667
+
+; <label>:667 ; preds = %665
+ load <4 x float>* null ; <<4 x float>>:668 [#uses=0]
+ br label %669
+
+; <label>:669 ; preds = %667, %665
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:670 [#uses=0]
+ br label %xST.exit402
+
+xST.exit402: ; preds = %669, %657
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:671 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:672 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:673 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:674 [#uses=1]
+ load <4 x float>* %674 ; <<4 x float>>:675 [#uses=1]
+ load <4 x float>* null ; <<4 x float>>:676 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:677 [#uses=1]
+ shufflevector <4 x float> %675, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:678 [#uses=1]
+ fmul <4 x float> zeroinitializer, %677 ; <<4 x float>>:679 [#uses=0]
+ fmul <4 x float> zeroinitializer, %678 ; <<4 x float>>:680 [#uses=0]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:681 [#uses=1]
+ icmp eq i32 0, 0 ; <i1>:682 [#uses=1]
+ br i1 %682, label %689, label %683
+
+; <label>:683 ; preds = %xST.exit402
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:684 [#uses=1]
+ load <4 x float>* %684 ; <<4 x float>>:685 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:686 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:687 [#uses=0]
+ shufflevector <4 x float> %681, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:688 [#uses=0]
+ br label %xST.exit405
+
+; <label>:689 ; preds = %xST.exit402
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:690 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:691 [#uses=1]
+ shufflevector <4 x i32> %691, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:692 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %692, <4 x i32> zeroinitializer ) ; <i32>:693 [#uses=1]
+ icmp eq i32 %693, 0 ; <i1>:694 [#uses=0]
+ br label %xST.exit405
+
+xST.exit405: ; preds = %689, %683
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:695 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:696 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:697 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:698 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:699 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:700 [#uses=1]
+ fadd <4 x float> zeroinitializer, %700 ; <<4 x float>>:701 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:702 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %702, <4 x i32> zeroinitializer ) ; <i32>:703 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:704 [#uses=2]
+ load <4 x float>* %704 ; <<4 x float>>:705 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* %704
+ load <4 x float>* null ; <<4 x float>>:706 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* null
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:707 [#uses=2]
+ load <4 x float>* %707 ; <<4 x float>>:708 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* %707
+ load <4 x float>* null ; <<4 x float>>:709 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:710 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:711 [#uses=1]
+ shufflevector <4 x float> %711, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:712 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:713 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:714 [#uses=1]
+ load <4 x float>* %714 ; <<4 x float>>:715 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:716 [#uses=0]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:717 [#uses=1]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:718 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 0 ; <<4 x float>*>:719 [#uses=1]
+ store <4 x float> zeroinitializer, <4 x float>* %719
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:720 [#uses=1]
+ shufflevector <4 x float> %717, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:721 [#uses=1]
+ store <4 x float> %721, <4 x float>* %720
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:722 [#uses=1]
+ load <4 x float>* %722 ; <<4 x float>>:723 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %723, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:724 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:725 [#uses=1]
+ store <4 x float> zeroinitializer, <4 x float>* %725
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:726 [#uses=1]
+ load <4 x float>* %726 ; <<4 x float>>:727 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:728 [#uses=1]
+ load <4 x float>* %728 ; <<4 x float>>:729 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:730 [#uses=1]
+ load <4 x float>* %730 ; <<4 x float>>:731 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:732 [#uses=1]
+ load <4 x float>* %732 ; <<4 x float>>:733 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:734 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:735 [#uses=1]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:736 [#uses=1]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:737 [#uses=1]
+ fmul <4 x float> zeroinitializer, %735 ; <<4 x float>>:738 [#uses=1]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:739 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:740 [#uses=1]
+ icmp eq i32 %740, 0 ; <i1>:741 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:742 [#uses=2]
+ load <4 x float>* %742 ; <<4 x float>>:743 [#uses=1]
+ shufflevector <4 x float> %736, <4 x float> %743, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:744 [#uses=1]
+ store <4 x float> %744, <4 x float>* %742
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:745 [#uses=1]
+ load <4 x float>* %745 ; <<4 x float>>:746 [#uses=1]
+ shufflevector <4 x float> %737, <4 x float> %746, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:747 [#uses=0]
+ shufflevector <4 x float> %738, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:748 [#uses=1]
+ store <4 x float> %748, <4 x float>* null
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:749 [#uses=1]
+ load <4 x float>* %749 ; <<4 x float>>:750 [#uses=1]
+ shufflevector <4 x float> %739, <4 x float> %750, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:751 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:752 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:753 [#uses=1]
+ load <4 x float>* %753 ; <<4 x float>>:754 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:755 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:756 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:757 [#uses=1]
+ shufflevector <4 x float> %756, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:758 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:759 [#uses=1]
+ load <4 x float>* %759 ; <<4 x float>>:760 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:761 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:762 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:763 [#uses=1]
+ fadd <4 x float> %757, zeroinitializer ; <<4 x float>>:764 [#uses=0]
+ fadd <4 x float> %758, %763 ; <<4 x float>>:765 [#uses=0]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:766 [#uses=1]
+ br i1 false, label %773, label %767
+
+; <label>:767 ; preds = %xST.exit405
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:768 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:769 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %769, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:770 [#uses=1]
+ store <4 x float> %770, <4 x float>* null
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:771 [#uses=1]
+ load <4 x float>* %771 ; <<4 x float>>:772 [#uses=0]
+ br label %xST.exit422
+
+; <label>:773 ; preds = %xST.exit405
+ br label %xST.exit422
+
+xST.exit422: ; preds = %773, %767
+ %.07267 = phi <4 x float> [ %766, %767 ], [ undef, %773 ] ; <<4 x float>> [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:774 [#uses=0]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:775 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:776 [#uses=1]
+ br i1 %776, label %780, label %777
+
+; <label>:777 ; preds = %xST.exit422
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:778 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:779 [#uses=0]
+ br label %xST.exit431
+
+; <label>:780 ; preds = %xST.exit422
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:781 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:782 [#uses=2]
+ load <4 x float>* %782 ; <<4 x float>>:783 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* %782
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:784 [#uses=1]
+ shufflevector <4 x i32> %784, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:785 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:786 [#uses=0]
+ br label %xST.exit431
+
+xST.exit431: ; preds = %780, %777
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:787 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:788 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:789 [#uses=2]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %789, <4 x i32> zeroinitializer ) ; <i32>:790 [#uses=1]
+ icmp eq i32 %790, 0 ; <i1>:791 [#uses=0]
+ shufflevector <4 x i32> %789, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:792 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %792, <4 x i32> zeroinitializer ) ; <i32>:793 [#uses=1]
+ icmp eq i32 %793, 0 ; <i1>:794 [#uses=1]
+ br i1 %794, label %797, label %795
+
+; <label>:795 ; preds = %xST.exit431
+ load <4 x float>* null ; <<4 x float>>:796 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* null
+ br label %797
+
+; <label>:797 ; preds = %795, %xST.exit431
+ %.07332 = phi <4 x float> [ zeroinitializer, %795 ], [ undef, %xST.exit431 ] ; <<4 x float>> [#uses=0]
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:798 [#uses=0]
+ br i1 false, label %xST.exit434, label %799
+
+; <label>:799 ; preds = %797
+ load <4 x float>* null ; <<4 x float>>:800 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* null
+ br label %xST.exit434
+
+xST.exit434: ; preds = %799, %797
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:801 [#uses=1]
+ shufflevector <4 x i32> %801, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:802 [#uses=0]
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:803 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:804 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 0 ; <<4 x float>*>:805 [#uses=1]
+ load <4 x float>* %805 ; <<4 x float>>:806 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:807 [#uses=1]
+ load <4 x float>* %807 ; <<4 x float>>:808 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:809 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:810 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:811 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:812 [#uses=1]
+ load <4 x float>* %812 ; <<4 x float>>:813 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:814 [#uses=1]
+ load <4 x float>* %814 ; <<4 x float>>:815 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:816 [#uses=0]
+ unreachable
+
+xPBRK.exit: ; preds = %.critedge
+ store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* %.sub7896
+ store <4 x i32> zeroinitializer, <4 x i32>* null
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:817 [#uses=1]
+ load <4 x float>* %817 ; <<4 x float>>:818 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:819 [#uses=1]
+ load <4 x float>* %819 ; <<4 x float>>:820 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:821 [#uses=1]
+ load <4 x float>* %821 ; <<4 x float>>:822 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:823 [#uses=1]
+ shufflevector <4 x float> %818, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:824 [#uses=1]
+ shufflevector <4 x float> %820, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:825 [#uses=1]
+ shufflevector <4 x float> %822, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:826 [#uses=1]
+ shufflevector <4 x float> %823, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:827 [#uses=0]
+ shufflevector <4 x float> %824, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:828 [#uses=1]
+ store <4 x float> %828, <4 x float>* null
+ load <4 x float>* null ; <<4 x float>>:829 [#uses=1]
+ shufflevector <4 x float> %825, <4 x float> %829, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:830 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:831 [#uses=2]
+ load <4 x float>* %831 ; <<4 x float>>:832 [#uses=1]
+ shufflevector <4 x float> %826, <4 x float> %832, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:833 [#uses=1]
+ store <4 x float> %833, <4 x float>* %831
+ br label %xLS.exit449
+
+xLS.exit449: ; preds = %1215, %xPBRK.exit
+ %.27464 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.17463, %1215 ] ; <<4 x float>> [#uses=2]
+ %.27469 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.17468, %1215 ] ; <<4 x float>> [#uses=2]
+ %.27474 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=1]
+ %.17482 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.17486 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.17490 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07489, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17494 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.27504 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.17513 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.17517 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.17552 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07551, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17556 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07555, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17560 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.17583 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07582, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17591 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07590, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17599 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.17618 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07617, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17622 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07621, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17626 = phi <4 x float> [ undef, %xPBRK.exit ], [ zeroinitializer, %1215 ] ; <<4 x float>> [#uses=0]
+ %.17653 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07652, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17657 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07656, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17661 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07660, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17665 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07664, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17723 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07722, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17727 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07726, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17731 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07730, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17735 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07734, %1215 ] ; <<4 x float>> [#uses=2]
+ %.17770 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07769, %1215 ] ; <<4 x float>> [#uses=2]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 0 ; <<4 x float>*>:834 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:835 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:836 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:837 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:838 [#uses=0]
+ shufflevector <4 x float> %835, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:839 [#uses=1]
+ getelementptr <4 x float>* null, i32 878 ; <<4 x float>*>:840 [#uses=1]
+ load <4 x float>* %840 ; <<4 x float>>:841 [#uses=0]
+ call <4 x float> @llvm.ppc.altivec.vcfsx( <4 x i32> zeroinitializer, i32 0 ) ; <<4 x float>>:842 [#uses=1]
+ shufflevector <4 x float> %842, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:843 [#uses=2]
+ call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> %843, <4 x float> %839 ) ; <<4 x i32>>:844 [#uses=1]
+ bitcast <4 x i32> %844 to <4 x float> ; <<4 x float>>:845 [#uses=1]
+ call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> %843, <4 x float> zeroinitializer ) ; <<4 x i32>>:846 [#uses=0]
+ bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:847 [#uses=1]
+ icmp eq i32 0, 0 ; <i1>:848 [#uses=1]
+ br i1 %848, label %854, label %849
+
+; <label>:849 ; preds = %xLS.exit449
+ shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:850 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:851 [#uses=1]
+ store <4 x float> zeroinitializer, <4 x float>* %851
+ shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:852 [#uses=1]
+ store <4 x float> %852, <4 x float>* null
+ shufflevector <4 x float> %847, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:853 [#uses=0]
+ br label %xST.exit451
+
+; <label>:854 ; preds = %xLS.exit449
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:855 [#uses=0]
+ br i1 false, label %859, label %856
+
+; <label>:856 ; preds = %854
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:857 [#uses=2]
+ load <4 x float>* %857 ; <<4 x float>>:858 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* %857
+ br label %859
+
+; <label>:859 ; preds = %856, %854
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:860 [#uses=0]
+ br i1 false, label %864, label %861
+
+; <label>:861 ; preds = %859
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:862 [#uses=1]
+ shufflevector <4 x float> %845, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:863 [#uses=1]
+ store <4 x float> %863, <4 x float>* %862
+ br label %864
+
+; <label>:864 ; preds = %861, %859
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:865 [#uses=1]
+ shufflevector <4 x i32> %865, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:866 [#uses=0]
+ br i1 false, label %868, label %867
+
+; <label>:867 ; preds = %864
+ store <4 x float> zeroinitializer, <4 x float>* null
+ br label %868
+
+; <label>:868 ; preds = %867, %864
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:869 [#uses=0]
+ br label %xST.exit451
+
+xST.exit451: ; preds = %868, %849
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:870 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:871 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:872 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:873 [#uses=1]
+ bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:874 [#uses=1]
+ xor <4 x i32> %874, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>>:875 [#uses=0]
+ bitcast <4 x float> %873 to <4 x i32> ; <<4 x i32>>:876 [#uses=1]
+ xor <4 x i32> %876, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>>:877 [#uses=0]
+ bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:878 [#uses=1]
+ xor <4 x i32> %878, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>>:879 [#uses=1]
+ bitcast <4 x i32> %879 to <4 x float> ; <<4 x float>>:880 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:881 [#uses=1]
+ icmp eq i32 0, 0 ; <i1>:882 [#uses=1]
+ br i1 %882, label %888, label %883
+
+; <label>:883 ; preds = %xST.exit451
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:884 [#uses=1]
+ store <4 x float> zeroinitializer, <4 x float>* %884
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:885 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:886 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:887 [#uses=0]
+ br label %xST.exit453
+
+; <label>:888 ; preds = %xST.exit451
+ shufflevector <4 x i32> %881, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:889 [#uses=0]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:890 [#uses=0]
+ br i1 false, label %894, label %891
+
+; <label>:891 ; preds = %888
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:892 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:893 [#uses=1]
+ store <4 x float> %893, <4 x float>* %892
+ br label %894
+
+; <label>:894 ; preds = %891, %888
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:895 [#uses=1]
+ icmp eq i32 %895, 0 ; <i1>:896 [#uses=1]
+ br i1 %896, label %898, label %897
+
+; <label>:897 ; preds = %894
+ br label %898
+
+; <label>:898 ; preds = %897, %894
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:899 [#uses=0]
+ br i1 false, label %xST.exit453, label %900
+
+; <label>:900 ; preds = %898
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:901 [#uses=1]
+ load <4 x float>* %901 ; <<4 x float>>:902 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %902, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:903 [#uses=0]
+ br label %xST.exit453
+
+xST.exit453: ; preds = %900, %898, %883
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:904 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:905 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:906 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:907 [#uses=1]
+ shufflevector <4 x float> %905, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:908 [#uses=1]
+ bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:909 [#uses=0]
+ bitcast <4 x float> %908 to <4 x i32> ; <<4 x i32>>:910 [#uses=0]
+ bitcast <4 x float> %907 to <4 x i32> ; <<4 x i32>>:911 [#uses=0]
+ bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:912 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:913 [#uses=0]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 2, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:914 [#uses=0]
+ br i1 false, label %915, label %xPIF.exit455
+
+; <label>:915 ; preds = %xST.exit453
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:916 [#uses=0]
+ getelementptr [4 x <4 x i32>]* null, i32 0, i32 3 ; <<4 x i32>*>:917 [#uses=1]
+ store <4 x i32> zeroinitializer, <4 x i32>* %917
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:918 [#uses=1]
+ and <4 x i32> %918, zeroinitializer ; <<4 x i32>>:919 [#uses=0]
+ br label %.critedge7899
+
+.critedge7899: ; preds = %.critedge7899, %915
+ or <4 x i32> zeroinitializer, zeroinitializer ; <<4 x i32>>:920 [#uses=1]
+ br i1 false, label %.critedge7899, label %xPBRK.exit456
+
+xPBRK.exit456: ; preds = %.critedge7899
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 2, <4 x i32> %920, <4 x i32> zeroinitializer ) ; <i32>:921 [#uses=0]
+ unreachable
+
+xPIF.exit455: ; preds = %xST.exit453
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 0 ; <<4 x float>*>:922 [#uses=1]
+ load <4 x float>* %922 ; <<4 x float>>:923 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:924 [#uses=1]
+ load <4 x float>* %924 ; <<4 x float>>:925 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:926 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:927 [#uses=0]
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:928 [#uses=0]
+ bitcast { { i16, i16, i32 } }* %1 to <4 x float>* ; <<4 x float>*>:929 [#uses=0]
+ bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:930 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:931 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:932 [#uses=1]
+ br i1 %932, label %934, label %933
+
+; <label>:933 ; preds = %xPIF.exit455
+ store <4 x float> zeroinitializer, <4 x float>* null
+ br label %934
+
+; <label>:934 ; preds = %933, %xPIF.exit455
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:935 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:936 [#uses=1]
+ br i1 %936, label %xST.exit459, label %937
+
+; <label>:937 ; preds = %934
+ br label %xST.exit459
+
+xST.exit459: ; preds = %937, %934
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:938 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %938, <4 x i32> zeroinitializer ) ; <i32>:939 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 2 ; <<4 x float>*>:940 [#uses=1]
+ store <4 x float> zeroinitializer, <4 x float>* %940
+ load <4 x float>* null ; <<4 x float>>:941 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %941, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:942 [#uses=1]
+ store <4 x float> %942, <4 x float>* null
+ shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:943 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:944 [#uses=0]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:945 [#uses=0]
+ br i1 false, label %947, label %946
+
+; <label>:946 ; preds = %xST.exit459
+ br label %947
+
+; <label>:947 ; preds = %946, %xST.exit459
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:948 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:949 [#uses=1]
+ br i1 %949, label %952, label %950
+
+; <label>:950 ; preds = %947
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:951 [#uses=1]
+ call void @llvm.ppc.altivec.stvewx( <4 x i32> %951, i8* null )
+ br label %952
+
+; <label>:952 ; preds = %950, %947
+ br i1 false, label %955, label %953
+
+; <label>:953 ; preds = %952
+ getelementptr [4 x <4 x i32>]* null, i32 0, i32 2 ; <<4 x i32>*>:954 [#uses=0]
+ br label %955
+
+; <label>:955 ; preds = %953, %952
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:956 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:957 [#uses=1]
+ br i1 %957, label %xStoreDestAddressWithMask.exit461, label %958
+
+; <label>:958 ; preds = %955
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:959 [#uses=1]
+ call void @llvm.ppc.altivec.stvewx( <4 x i32> %959, i8* null )
+ br label %xStoreDestAddressWithMask.exit461
+
+xStoreDestAddressWithMask.exit461: ; preds = %958, %955
+ load <4 x float>* %0 ; <<4 x float>>:960 [#uses=0]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:961 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 0 ; <<4 x float>*>:962 [#uses=0]
+ br i1 false, label %968, label %xST.exit463
+
+xST.exit463: ; preds = %xStoreDestAddressWithMask.exit461
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:963 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 2 ; <<4 x float>*>:964 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 3 ; <<4 x float>*>:965 [#uses=0]
+ load <4 x float>* %0 ; <<4 x float>>:966 [#uses=3]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:967 [#uses=0]
+ br i1 false, label %972, label %969
+
+; <label>:968 ; preds = %xStoreDestAddressWithMask.exit461
+ unreachable
+
+; <label>:969 ; preds = %xST.exit463
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:970 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:971 [#uses=1]
+ store <4 x float> %966, <4 x float>* %971
+ store <4 x float> %966, <4 x float>* null
+ br label %xST.exit465
+
+; <label>:972 ; preds = %xST.exit463
+ call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>>:973 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* null
+ store <4 x float> zeroinitializer, <4 x float>* null
+ load <4 x float>* null ; <<4 x float>>:974 [#uses=0]
+ bitcast <4 x float> %966 to <4 x i32> ; <<4 x i32>>:975 [#uses=1]
+ call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> zeroinitializer, <4 x i32> %975, <4 x i32> zeroinitializer ) ; <<4 x i32>>:976 [#uses=1]
+ bitcast <4 x i32> %976 to <4 x float> ; <<4 x float>>:977 [#uses=1]
+ store <4 x float> %977, <4 x float>* null
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:978 [#uses=0]
+ bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:979 [#uses=1]
+ call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> %979, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>>:980 [#uses=1]
+ bitcast <4 x i32> %980 to <4 x float> ; <<4 x float>>:981 [#uses=0]
+ br label %xST.exit465
+
+xST.exit465: ; preds = %972, %969
+ load <4 x float>* %0 ; <<4 x float>>:982 [#uses=3]
+ icmp eq i32 0, 0 ; <i1>:983 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:984 [#uses=1]
+ br i1 %983, label %989, label %985
+
+; <label>:985 ; preds = %xST.exit465
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:986 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:987 [#uses=1]
+ store <4 x float> %982, <4 x float>* %987
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:988 [#uses=0]
+ br label %xST.exit467
+
+; <label>:989 ; preds = %xST.exit465
+ bitcast <4 x float> %982 to <4 x i32> ; <<4 x i32>>:990 [#uses=0]
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:991 [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* %984
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:992 [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:993 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:994 [#uses=0]
+ bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:995 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:996 [#uses=0]
+ bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:997 [#uses=1]
+ bitcast <4 x float> %982 to <4 x i32> ; <<4 x i32>>:998 [#uses=1]
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:999 [#uses=1]
+ call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> %997, <4 x i32> %998, <4 x i32> %999 ) ; <<4 x i32>>:1000 [#uses=1]
+ bitcast <4 x i32> %1000 to <4 x float> ; <<4 x float>>:1001 [#uses=0]
+ br label %xST.exit467
+
+xST.exit467: ; preds = %989, %985
+ load <4 x float>* %0 ; <<4 x float>>:1002 [#uses=5]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:1003 [#uses=2]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1003, <4 x i32> zeroinitializer ) ; <i32>:1004 [#uses=0]
+ br i1 false, label %1011, label %1005
+
+; <label>:1005 ; preds = %xST.exit467
+ load <4 x float>* null ; <<4 x float>>:1006 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:1007 [#uses=1]
+ load <4 x float>* %1007 ; <<4 x float>>:1008 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:1009 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1010 [#uses=0]
+ br label %xST.exit469
+
+; <label>:1011 ; preds = %xST.exit467
+ shufflevector <4 x i32> %1003, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:1012 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:1013 [#uses=1]
+ br i1 %1013, label %1015, label %1014
+
+; <label>:1014 ; preds = %1011
+ br label %1015
+
+; <label>:1015 ; preds = %1014, %1011
+ %.07472 = phi <4 x float> [ %1002, %1014 ], [ %.27474, %1011 ] ; <<4 x float>> [#uses=0]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:1016 [#uses=1]
+ icmp eq i32 %1016, 0 ; <i1>:1017 [#uses=1]
+ br i1 %1017, label %1021, label %1018
+
+; <label>:1018 ; preds = %1015
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:1019 [#uses=0]
+ shufflevector <4 x float> %1002, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1020 [#uses=0]
+ br label %1021
+
+; <label>:1021 ; preds = %1018, %1015
+ %.07467 = phi <4 x float> [ %1002, %1018 ], [ %.27469, %1015 ] ; <<4 x float>> [#uses=2]
+ icmp eq i32 0, 0 ; <i1>:1022 [#uses=1]
+ br i1 %1022, label %1025, label %1023
+
+; <label>:1023 ; preds = %1021
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:1024 [#uses=1]
+ store <4 x float> zeroinitializer, <4 x float>* %1024
+ br label %1025
+
+; <label>:1025 ; preds = %1023, %1021
+ %.07462 = phi <4 x float> [ %1002, %1023 ], [ %.27464, %1021 ] ; <<4 x float>> [#uses=2]
+ icmp eq i32 0, 0 ; <i1>:1026 [#uses=1]
+ br i1 %1026, label %xST.exit469, label %1027
+
+; <label>:1027 ; preds = %1025
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1028 [#uses=0]
+ br label %xST.exit469
+
+xST.exit469: ; preds = %1027, %1025, %1005
+ %.17463 = phi <4 x float> [ %.27464, %1005 ], [ %.07462, %1027 ], [ %.07462, %1025 ] ; <<4 x float>> [#uses=1]
+ %.17468 = phi <4 x float> [ %.27469, %1005 ], [ %.07467, %1027 ], [ %.07467, %1025 ] ; <<4 x float>> [#uses=1]
+ %.07489 = phi <4 x float> [ %1002, %1005 ], [ %.17490, %1027 ], [ %.17490, %1025 ] ; <<4 x float>> [#uses=1]
+ load <4 x float>* null ; <<4 x float>>:1029 [#uses=0]
+ load <4 x float>* null ; <<4 x float>>:1030 [#uses=0]
+ fsub <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1031 [#uses=1]
+ br i1 false, label %1037, label %1032
+
+; <label>:1032 ; preds = %xST.exit469
+ load <4 x float>* null ; <<4 x float>>:1033 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:1034 [#uses=1]
+ load <4 x float>* %1034 ; <<4 x float>>:1035 [#uses=0]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:1036 [#uses=0]
+ br label %xST.exit472
+
+; <label>:1037 ; preds = %xST.exit469
+ icmp eq i32 0, 0 ; <i1>:1038 [#uses=1]
+ br i1 %1038, label %1040, label %1039
+
+; <label>:1039 ; preds = %1037
+ br label %1040
+
+; <label>:1040 ; preds = %1039, %1037
+ %.07507 = phi <4 x float> [ zeroinitializer, %1039 ], [ zeroinitializer, %1037 ] ; <<4 x float>> [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:1041 [#uses=1]
+ br i1 %1041, label %1045, label %1042
+
+; <label>:1042 ; preds = %1040
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:1043 [#uses=1]
+ load <4 x float>* %1043 ; <<4 x float>>:1044 [#uses=0]
+ br label %1045
+
+; <label>:1045 ; preds = %1042, %1040
+ br i1 false, label %1048, label %1046
+
+; <label>:1046 ; preds = %1045
+ shufflevector <4 x float> %1031, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1047 [#uses=0]
+ br label %1048
+
+; <label>:1048 ; preds = %1046, %1045
+ icmp eq i32 0, 0 ; <i1>:1049 [#uses=1]
+ br i1 %1049, label %xST.exit472, label %1050
+
+; <label>:1050 ; preds = %1048
+ br label %xST.exit472
+
+xST.exit472: ; preds = %1050, %1048, %1032
+ br i1 false, label %1052, label %1051
+
+; <label>:1051 ; preds = %xST.exit472
+ br label %xST.exit474
+
+; <label>:1052 ; preds = %xST.exit472
+ br i1 false, label %1054, label %1053
+
+; <label>:1053 ; preds = %1052
+ br label %1054
+
+; <label>:1054 ; preds = %1053, %1052
+ br i1 false, label %1056, label %1055
+
+; <label>:1055 ; preds = %1054
+ br label %1056
+
+; <label>:1056 ; preds = %1055, %1054
+ br i1 false, label %1058, label %1057
+
+; <label>:1057 ; preds = %1056
+ br label %1058
+
+; <label>:1058 ; preds = %1057, %1056
+ br i1 false, label %xST.exit474, label %1059
+
+; <label>:1059 ; preds = %1058
+ br label %xST.exit474
+
+xST.exit474: ; preds = %1059, %1058, %1051
+ load <4 x float>* null ; <<4 x float>>:1060 [#uses=1]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1061 [#uses=1]
+ fmul <4 x float> %1060, zeroinitializer ; <<4 x float>>:1062 [#uses=2]
+ br i1 false, label %1065, label %1063
+
+; <label>:1063 ; preds = %xST.exit474
+ shufflevector <4 x float> %1062, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1064 [#uses=1]
+ store <4 x float> %1064, <4 x float>* null
+ br label %xST.exit476
+
+; <label>:1065 ; preds = %xST.exit474
+ br i1 false, label %1067, label %1066
+
+; <label>:1066 ; preds = %1065
+ br label %1067
+
+; <label>:1067 ; preds = %1066, %1065
+ shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:1068 [#uses=0]
+ br i1 false, label %1070, label %1069
+
+; <label>:1069 ; preds = %1067
+ br label %1070
+
+; <label>:1070 ; preds = %1069, %1067
+ br i1 false, label %1072, label %1071
+
+; <label>:1071 ; preds = %1070
+ br label %1072
+
+; <label>:1072 ; preds = %1071, %1070
+ br i1 false, label %xST.exit476, label %1073
+
+; <label>:1073 ; preds = %1072
+ br label %xST.exit476
+
+xST.exit476: ; preds = %1073, %1072, %1063
+ %.07551 = phi <4 x float> [ %1062, %1063 ], [ %.17552, %1073 ], [ %.17552, %1072 ] ; <<4 x float>> [#uses=1]
+ %.07555 = phi <4 x float> [ %1061, %1063 ], [ %.17556, %1073 ], [ %.17556, %1072 ] ; <<4 x float>> [#uses=1]
+ br i1 false, label %1075, label %1074
+
+; <label>:1074 ; preds = %xST.exit476
+ br label %xST.exit479
+
+; <label>:1075 ; preds = %xST.exit476
+ br i1 false, label %1077, label %1076
+
+; <label>:1076 ; preds = %1075
+ br label %1077
+
+; <label>:1077 ; preds = %1076, %1075
+ br i1 false, label %1079, label %1078
+
+; <label>:1078 ; preds = %1077
+ br label %1079
+
+; <label>:1079 ; preds = %1078, %1077
+ br i1 false, label %1081, label %1080
+
+; <label>:1080 ; preds = %1079
+ br label %1081
+
+; <label>:1081 ; preds = %1080, %1079
+ br i1 false, label %xST.exit479, label %1082
+
+; <label>:1082 ; preds = %1081
+ br label %xST.exit479
+
+xST.exit479: ; preds = %1082, %1081, %1074
+ br i1 false, label %1084, label %1083
+
+; <label>:1083 ; preds = %xST.exit479
+ br label %xST.exit482
+
+; <label>:1084 ; preds = %xST.exit479
+ br i1 false, label %1086, label %1085
+
+; <label>:1085 ; preds = %1084
+ br label %1086
+
+; <label>:1086 ; preds = %1085, %1084
+ br i1 false, label %1088, label %1087
+
+; <label>:1087 ; preds = %1086
+ br label %1088
+
+; <label>:1088 ; preds = %1087, %1086
+ br i1 false, label %1090, label %1089
+
+; <label>:1089 ; preds = %1088
+ br label %1090
+
+; <label>:1090 ; preds = %1089, %1088
+ br i1 false, label %xST.exit482, label %1091
+
+; <label>:1091 ; preds = %1090
+ br label %xST.exit482
+
+xST.exit482: ; preds = %1091, %1090, %1083
+ br i1 false, label %1093, label %1092
+
+; <label>:1092 ; preds = %xST.exit482
+ br label %xST.exit486
+
+; <label>:1093 ; preds = %xST.exit482
+ br i1 false, label %1095, label %1094
+
+; <label>:1094 ; preds = %1093
+ br label %1095
+
+; <label>:1095 ; preds = %1094, %1093
+ br i1 false, label %1097, label %1096
+
+; <label>:1096 ; preds = %1095
+ br label %1097
+
+; <label>:1097 ; preds = %1096, %1095
+ br i1 false, label %1099, label %1098
+
+; <label>:1098 ; preds = %1097
+ br label %1099
+
+; <label>:1099 ; preds = %1098, %1097
+ br i1 false, label %xST.exit486, label %1100
+
+; <label>:1100 ; preds = %1099
+ br label %xST.exit486
+
+xST.exit486: ; preds = %1100, %1099, %1092
+ br i1 false, label %1102, label %1101
+
+; <label>:1101 ; preds = %xST.exit486
+ br label %xST.exit489
+
+; <label>:1102 ; preds = %xST.exit486
+ br i1 false, label %1104, label %1103
+
+; <label>:1103 ; preds = %1102
+ br label %1104
+
+; <label>:1104 ; preds = %1103, %1102
+ br i1 false, label %1106, label %1105
+
+; <label>:1105 ; preds = %1104
+ br label %1106
+
+; <label>:1106 ; preds = %1105, %1104
+ br i1 false, label %1108, label %1107
+
+; <label>:1107 ; preds = %1106
+ br label %1108
+
+; <label>:1108 ; preds = %1107, %1106
+ br i1 false, label %xST.exit489, label %1109
+
+; <label>:1109 ; preds = %1108
+ br label %xST.exit489
+
+xST.exit489: ; preds = %1109, %1108, %1101
+ br i1 false, label %1111, label %1110
+
+; <label>:1110 ; preds = %xST.exit489
+ br label %xST.exit492
+
+; <label>:1111 ; preds = %xST.exit489
+ br i1 false, label %1113, label %1112
+
+; <label>:1112 ; preds = %1111
+ br label %1113
+
+; <label>:1113 ; preds = %1112, %1111
+ br i1 false, label %1115, label %1114
+
+; <label>:1114 ; preds = %1113
+ br label %1115
+
+; <label>:1115 ; preds = %1114, %1113
+ br i1 false, label %1117, label %1116
+
+; <label>:1116 ; preds = %1115
+ br label %1117
+
+; <label>:1117 ; preds = %1116, %1115
+ br i1 false, label %xST.exit492, label %1118
+
+; <label>:1118 ; preds = %1117
+ br label %xST.exit492
+
+xST.exit492: ; preds = %1118, %1117, %1110
+ load <4 x float>* null ; <<4 x float>>:1119 [#uses=1]
+ fmul <4 x float> %1119, zeroinitializer ; <<4 x float>>:1120 [#uses=1]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1121 [#uses=1]
+ br i1 false, label %1123, label %1122
+
+; <label>:1122 ; preds = %xST.exit492
+ br label %xST.exit495
+
+; <label>:1123 ; preds = %xST.exit492
+ br i1 false, label %1125, label %1124
+
+; <label>:1124 ; preds = %1123
+ br label %1125
+
+; <label>:1125 ; preds = %1124, %1123
+ br i1 false, label %1127, label %1126
+
+; <label>:1126 ; preds = %1125
+ br label %1127
+
+; <label>:1127 ; preds = %1126, %1125
+ br i1 false, label %1129, label %1128
+
+; <label>:1128 ; preds = %1127
+ br label %1129
+
+; <label>:1129 ; preds = %1128, %1127
+ br i1 false, label %xST.exit495, label %1130
+
+; <label>:1130 ; preds = %1129
+ br label %xST.exit495
+
+xST.exit495: ; preds = %1130, %1129, %1122
+ %.07582 = phi <4 x float> [ %1121, %1122 ], [ %.17583, %1130 ], [ %.17583, %1129 ] ; <<4 x float>> [#uses=1]
+ %.07590 = phi <4 x float> [ %1120, %1122 ], [ %.17591, %1130 ], [ %.17591, %1129 ] ; <<4 x float>> [#uses=1]
+ load <4 x float>* null ; <<4 x float>>:1131 [#uses=1]
+ fadd <4 x float> %1131, zeroinitializer ; <<4 x float>>:1132 [#uses=1]
+ fadd <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1133 [#uses=1]
+ br i1 false, label %1135, label %1134
+
+; <label>:1134 ; preds = %xST.exit495
+ br label %xST.exit498
+
+; <label>:1135 ; preds = %xST.exit495
+ br i1 false, label %1137, label %1136
+
+; <label>:1136 ; preds = %1135
+ br label %1137
+
+; <label>:1137 ; preds = %1136, %1135
+ br i1 false, label %1139, label %1138
+
+; <label>:1138 ; preds = %1137
+ br label %1139
+
+; <label>:1139 ; preds = %1138, %1137
+ br i1 false, label %1141, label %1140
+
+; <label>:1140 ; preds = %1139
+ br label %1141
+
+; <label>:1141 ; preds = %1140, %1139
+ br i1 false, label %xST.exit498, label %1142
+
+; <label>:1142 ; preds = %1141
+ br label %xST.exit498
+
+xST.exit498: ; preds = %1142, %1141, %1134
+ %.07617 = phi <4 x float> [ %1133, %1134 ], [ %.17618, %1142 ], [ %.17618, %1141 ] ; <<4 x float>> [#uses=1]
+ %.07621 = phi <4 x float> [ %1132, %1134 ], [ %.17622, %1142 ], [ %.17622, %1141 ] ; <<4 x float>> [#uses=1]
+ load <4 x float>* null ; <<4 x float>>:1143 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:1144 [#uses=1]
+ load <4 x float>* %1144 ; <<4 x float>>:1145 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1146 [#uses=1]
+ load <4 x float>* %1146 ; <<4 x float>>:1147 [#uses=1]
+ shufflevector <4 x float> %1143, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1148 [#uses=1]
+ shufflevector <4 x float> %1145, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1149 [#uses=1]
+ shufflevector <4 x float> %1147, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1150 [#uses=1]
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1151 [#uses=1]
+ fmul <4 x float> zeroinitializer, %1148 ; <<4 x float>>:1152 [#uses=1]
+ fmul <4 x float> zeroinitializer, %1149 ; <<4 x float>>:1153 [#uses=1]
+ fmul <4 x float> zeroinitializer, %1150 ; <<4 x float>>:1154 [#uses=1]
+ br i1 false, label %1156, label %1155
+
+; <label>:1155 ; preds = %xST.exit498
+ br label %xST.exit501
+
+; <label>:1156 ; preds = %xST.exit498
+ br i1 false, label %1158, label %1157
+
+; <label>:1157 ; preds = %1156
+ br label %1158
+
+; <label>:1158 ; preds = %1157, %1156
+ br i1 false, label %1160, label %1159
+
+; <label>:1159 ; preds = %1158
+ br label %1160
+
+; <label>:1160 ; preds = %1159, %1158
+ br i1 false, label %1162, label %1161
+
+; <label>:1161 ; preds = %1160
+ br label %1162
+
+; <label>:1162 ; preds = %1161, %1160
+ br i1 false, label %xST.exit501, label %1163
+
+; <label>:1163 ; preds = %1162
+ br label %xST.exit501
+
+xST.exit501: ; preds = %1163, %1162, %1155
+ %.07652 = phi <4 x float> [ %1154, %1155 ], [ %.17653, %1163 ], [ %.17653, %1162 ] ; <<4 x float>> [#uses=1]
+ %.07656 = phi <4 x float> [ %1153, %1155 ], [ %.17657, %1163 ], [ %.17657, %1162 ] ; <<4 x float>> [#uses=1]
+ %.07660 = phi <4 x float> [ %1152, %1155 ], [ %.17661, %1163 ], [ %.17661, %1162 ] ; <<4 x float>> [#uses=1]
+ %.07664 = phi <4 x float> [ %1151, %1155 ], [ %.17665, %1163 ], [ %.17665, %1162 ] ; <<4 x float>> [#uses=1]
+ load <4 x float>* null ; <<4 x float>>:1164 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:1165 [#uses=1]
+ load <4 x float>* %1165 ; <<4 x float>>:1166 [#uses=1]
+ getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1167 [#uses=1]
+ load <4 x float>* %1167 ; <<4 x float>>:1168 [#uses=1]
+ fadd <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1169 [#uses=1]
+ fadd <4 x float> zeroinitializer, %1164 ; <<4 x float>>:1170 [#uses=1]
+ fadd <4 x float> zeroinitializer, %1166 ; <<4 x float>>:1171 [#uses=1]
+ fadd <4 x float> zeroinitializer, %1168 ; <<4 x float>>:1172 [#uses=1]
+ br i1 false, label %1174, label %1173
+
+; <label>:1173 ; preds = %xST.exit501
+ br label %xST.exit504
+
+; <label>:1174 ; preds = %xST.exit501
+ br i1 false, label %1176, label %1175
+
+; <label>:1175 ; preds = %1174
+ br label %1176
+
+; <label>:1176 ; preds = %1175, %1174
+ br i1 false, label %1178, label %1177
+
+; <label>:1177 ; preds = %1176
+ br label %1178
+
+; <label>:1178 ; preds = %1177, %1176
+ br i1 false, label %1180, label %1179
+
+; <label>:1179 ; preds = %1178
+ br label %1180
+
+; <label>:1180 ; preds = %1179, %1178
+ br i1 false, label %xST.exit504, label %1181
+
+; <label>:1181 ; preds = %1180
+ br label %xST.exit504
+
+xST.exit504: ; preds = %1181, %1180, %1173
+ %.07722 = phi <4 x float> [ %1172, %1173 ], [ %.17723, %1181 ], [ %.17723, %1180 ] ; <<4 x float>> [#uses=1]
+ %.07726 = phi <4 x float> [ %1171, %1173 ], [ %.17727, %1181 ], [ %.17727, %1180 ] ; <<4 x float>> [#uses=1]
+ %.07730 = phi <4 x float> [ %1170, %1173 ], [ %.17731, %1181 ], [ %.17731, %1180 ] ; <<4 x float>> [#uses=1]
+ %.07734 = phi <4 x float> [ %1169, %1173 ], [ %.17735, %1181 ], [ %.17735, %1180 ] ; <<4 x float>> [#uses=1]
+ fadd <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1182 [#uses=1]
+ br i1 false, label %1184, label %1183
+
+; <label>:1183 ; preds = %xST.exit504
+ br label %xST.exit507
+
+; <label>:1184 ; preds = %xST.exit504
+ br i1 false, label %1186, label %1185
+
+; <label>:1185 ; preds = %1184
+ br label %1186
+
+; <label>:1186 ; preds = %1185, %1184
+ br i1 false, label %1188, label %1187
+
+; <label>:1187 ; preds = %1186
+ store <4 x float> zeroinitializer, <4 x float>* null
+ br label %1188
+
+; <label>:1188 ; preds = %1187, %1186
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:1189 [#uses=1]
+ shufflevector <4 x i32> %1189, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:1190 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1190, <4 x i32> zeroinitializer ) ; <i32>:1191 [#uses=1]
+ icmp eq i32 %1191, 0 ; <i1>:1192 [#uses=1]
+ br i1 %1192, label %1196, label %1193
+
+; <label>:1193 ; preds = %1188
+ load <4 x float>* null ; <<4 x float>>:1194 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %1194, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1195 [#uses=1]
+ store <4 x float> %1195, <4 x float>* null
+ br label %1196
+
+; <label>:1196 ; preds = %1193, %1188
+ %.07742 = phi <4 x float> [ zeroinitializer, %1193 ], [ zeroinitializer, %1188 ] ; <<4 x float>> [#uses=0]
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:1197 [#uses=1]
+ shufflevector <4 x i32> %1197, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:1198 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1198, <4 x i32> zeroinitializer ) ; <i32>:1199 [#uses=1]
+ icmp eq i32 %1199, 0 ; <i1>:1200 [#uses=1]
+ br i1 %1200, label %xST.exit507, label %1201
+
+; <label>:1201 ; preds = %1196
+ store <4 x float> zeroinitializer, <4 x float>* null
+ br label %xST.exit507
+
+xST.exit507: ; preds = %1201, %1196, %1183
+ %.07769 = phi <4 x float> [ %1182, %1183 ], [ %.17770, %1201 ], [ %.17770, %1196 ] ; <<4 x float>> [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:1202 [#uses=1]
+ icmp eq i32 %1202, 0 ; <i1>:1203 [#uses=1]
+ br i1 %1203, label %1207, label %1204
+
+; <label>:1204 ; preds = %xST.exit507
+ load <4 x float>* null ; <<4 x float>>:1205 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %1205, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:1206 [#uses=1]
+ store <4 x float> %1206, <4 x float>* null
+ br label %1207
+
+; <label>:1207 ; preds = %1204, %xST.exit507
+ load <4 x i32>* %.sub7896 ; <<4 x i32>>:1208 [#uses=1]
+ shufflevector <4 x i32> %1208, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:1209 [#uses=1]
+ call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1209, <4 x i32> zeroinitializer ) ; <i32>:1210 [#uses=1]
+ icmp eq i32 %1210, 0 ; <i1>:1211 [#uses=1]
+ br i1 %1211, label %1215, label %1212
+
+; <label>:1212 ; preds = %1207
+ load <4 x float>* null ; <<4 x float>>:1213 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %1213, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:1214 [#uses=1]
+ store <4 x float> %1214, <4 x float>* null
+ br label %1215
+
+; <label>:1215 ; preds = %1212, %1207
+ store <4 x float> zeroinitializer, <4 x float>* null
+ br label %xLS.exit449
+}
+
+declare <4 x i32> @llvm.ppc.altivec.vsel(<4 x i32>, <4 x i32>, <4 x i32>)
+
+declare void @llvm.ppc.altivec.stvewx(<4 x i32>, i8*)
+
+declare <4 x float> @llvm.ppc.altivec.vrsqrtefp(<4 x float>)
+
+declare <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32>, i32)
+
+declare i32 @llvm.ppc.altivec.vcmpequw.p(i32, <4 x i32>, <4 x i32>)
+
+declare <4 x i32> @llvm.ppc.altivec.vcmpgtfp(<4 x float>, <4 x float>)
diff --git a/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll b/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
new file mode 100644
index 0000000..86fd947
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep {foo r3, r4}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep {bari r3, 47}
+
+; PR1351
+
+define i32 @test1(i32 %Y, i32 %X) nounwind {
+ %tmp1 = tail call i32 asm "foo${1:I} $0, $1", "=r,rI"( i32 %X )
+ ret i32 %tmp1
+}
+
+define i32 @test2(i32 %Y, i32 %X) nounwind {
+ %tmp1 = tail call i32 asm "bar${1:I} $0, $1", "=r,rI"( i32 47 )
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
new file mode 100644
index 0000000..d1d28ae
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s | grep {subfc r3,r5,r4}
+; RUN: llc < %s | grep {subfze r4,r2}
+; RUN: llc < %s -regalloc=local | grep {subfc r2,r5,r4}
+; RUN: llc < %s -regalloc=local | grep {subfze r3,r3}
+; The first argument of subfc must not be the same as any other register.
+
+; PR1357
+
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "powerpc-apple-darwin8.8.0"
+
+;long long test(int A, int B, int C) {
+; unsigned X, Y;
+; __asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2"
+; : "=r" (X), "=&r" (Y)
+; : "r" (A), "rI" (B), "r" (C));
+; return ((long long)Y << 32) | X;
+;}
+
+define i64 @test(i32 %A, i32 %B, i32 %C) nounwind {
+entry:
+ %Y = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C ) ; <i32> [#uses=1]
+ %tmp5 = load i32* %Y ; <i32> [#uses=1]
+ %tmp56 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]
+ %tmp7 = shl i64 %tmp56, 32 ; <i64> [#uses=1]
+ %tmp89 = zext i32 %tmp4 to i64 ; <i64> [#uses=1]
+ %tmp10 = or i64 %tmp7, %tmp89 ; <i64> [#uses=1]
+ ret i64 %tmp10
+}
diff --git a/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll b/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
new file mode 100644
index 0000000..1df5140
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s
+; PR1382
+
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "powerpc-apple-darwin8.8.0"
+@x = global [2 x i32] [ i32 1, i32 2 ] ; <[2 x i32]*> [#uses=1]
+
+define void @foo() {
+entry:
+ tail call void asm sideeffect "$0 $1", "s,i"( i8* bitcast (i32* getelementptr ([2 x i32]* @x, i32 0, i32 1) to i8*), i8* bitcast (i32* getelementptr ([2 x i32]* @x, i32 0, i32 1) to i8*) )
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll b/test/CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll
new file mode 100644
index 0000000..e4e9314
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=ppc32
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "powerpc-apple-darwin8.8.0"
+ %struct..0anon = type { i32 }
+ %struct.A = type { %struct.anon }
+ %struct.anon = type <{ }>
+
+define void @bork(%struct.A* %In0P) {
+entry:
+ %tmp56 = bitcast %struct.A* %In0P to float* ; <float*> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %i.035.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %tmp8 = getelementptr float* %tmp56, i32 %i.035.0 ; <float*> [#uses=2]
+ %tmp101112 = bitcast float* %tmp8 to i8* ; <i8*> [#uses=1]
+ %tmp1617 = bitcast float* %tmp8 to i32* ; <i32*> [#uses=1]
+ %tmp21 = tail call i32 asm "lwbrx $0, $2, $1", "=r,r,bO,*m"( i8* %tmp101112, i32 0, i32* %tmp1617 ) ; <i32> [#uses=0]
+ %indvar.next = add i32 %i.035.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 4 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll
new file mode 100644
index 0000000..42f2152
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll
@@ -0,0 +1,68 @@
+; RUN: llc < %s -march=ppc32 | grep bl.*baz | count 2
+; RUN: llc < %s -march=ppc32 | grep bl.*quux | count 2
+; RUN: llc < %s -march=ppc32 -enable-tail-merge | grep bl.*baz | count 1
+; RUN: llc < %s -march=ppc32 -enable-tail-merge=1 | grep bl.*quux | count 1
+; Check that tail merging is not the default on ppc, and that -enable-tail-merge works.
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %q_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ store i32 %q, i32* %q_addr
+ %tmp = load i32* %i_addr ; <i32> [#uses=1]
+ %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
+ %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
+ br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_false: ; preds = %entry
+ %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
+ %tmp27 = load i32* %q_addr ; <i32> [#uses=1]
+ %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1]
+ %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1]
+ %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1]
+ br i1 %toBool210, label %cond_true11, label %cond_false15
+
+cond_true11: ; preds = %cond_next
+ %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
+ %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_false15: ; preds = %cond_next
+ %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
+ br label %cond_next18
+
+cond_next18: ; preds = %cond_false15, %cond_true11
+ %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next18
+ %retval20 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll b/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll
new file mode 100644
index 0000000..2938c70
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll
@@ -0,0 +1,14 @@
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "powerpc-apple-darwin8.8.0"
+
+; RUN: llc < %s -march=ppc32 | grep {rlwinm r3, r3, 23, 30, 30}
+; PR1473
+
+define i8 @foo(i16 zeroext %a) zeroext {
+ %tmp2 = lshr i16 %a, 10 ; <i16> [#uses=1]
+ %tmp23 = trunc i16 %tmp2 to i8 ; <i8> [#uses=1]
+ %tmp4 = shl i8 %tmp23, 1 ; <i8> [#uses=1]
+ %tmp5 = and i8 %tmp4, 2 ; <i8> [#uses=1]
+ ret i8 %tmp5
+}
+
diff --git a/test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll b/test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll
new file mode 100644
index 0000000..6de7a09
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll
@@ -0,0 +1,85 @@
+; RUN: llc < %s -march=ppc32 -mattr=+altivec
+
+ %struct.XATest = type { float, i16, i8, i8 }
+ %struct.XArrayRange = type { i8, i8, i8, i8 }
+ %struct.XBlendMode = type { i16, i16, i16, i16, %struct.GIC4, i16, i16, i8, i8, i8, i8 }
+ %struct.XClearC = type { double, %struct.GIC4, %struct.GIC4, float, i32 }
+ %struct.XClipPlane = type { i32, [6 x %struct.GIC4] }
+ %struct.XCBuffer = type { i16, i16, [8 x i16] }
+ %struct.XCMatrix = type { [16 x float]*, %struct.XICSS }
+ %struct.XConvolution = type { %struct.GIC4, %struct.XICSS, i16, i16, float*, i32, i32 }
+ %struct.XDepthTest = type { i16, i16, i8, i8, i8, i8, double, double }
+ %struct.XFixedFunctionProgram = type { %struct.PPSToken* }
+ %struct.XFogMode = type { %struct.GIC4, float, float, float, float, float, i16, i16, i16, i8, i8 }
+ %struct.XFramebufferAttachment = type { i32, i32, i32, i32 }
+ %struct.XHintMode = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 }
+ %struct.XHistogram = type { %struct.XFramebufferAttachment*, i32, i16, i8, i8 }
+ %struct.XICSS = type { %struct.GTCoord2, %struct.GTCoord2, %struct.GTCoord2, %struct.GTCoord2 }
+ %struct.XISubset = type { %struct.XConvolution, %struct.XConvolution, %struct.XConvolution, %struct.XCMatrix, %struct.XMinmax, %struct.XHistogram, %struct.XICSS, %struct.XICSS, %struct.XICSS, %struct.XICSS, i32 }
+ %struct.XLight = type { %struct.GIC4, %struct.GIC4, %struct.GIC4, %struct.GIC4, %struct.XPointLineLimits, float, float, float, float, float, %struct.XPointLineLimits, float, float, float, float, float }
+ %struct.XLightModel = type { %struct.GIC4, [8 x %struct.XLight], [2 x %struct.XMaterial], i32, i16, i16, i16, i8, i8, i8, i8, i8, i8 }
+ %struct.XLightProduct = type { %struct.GIC4, %struct.GIC4, %struct.GIC4 }
+ %struct.XLineMode = type { float, i32, i16, i16, i8, i8, i8, i8 }
+ %struct.XLogicOp = type { i16, i8, i8 }
+ %struct.XMaskMode = type { i32, [3 x i32], i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XMaterial = type { %struct.GIC4, %struct.GIC4, %struct.GIC4, %struct.GIC4, float, float, float, float, [8 x %struct.XLightProduct], %struct.GIC4, [6 x i32], [2 x i32] }
+ %struct.XMinmax = type { %struct.XMinmaxTable*, i16, i8, i8 }
+ %struct.XMinmaxTable = type { %struct.GIC4, %struct.GIC4 }
+ %struct.XMipmaplevel = type { [4 x i32], [4 x i32], [4 x float], [4 x i32], i32, i32, float*, i8*, i16, i16, i16, i16, [2 x float] }
+ %struct.XMultisample = type { float, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XPipelineProgramState = type { i8, i8, i8, i8, %struct.GIC4* }
+ %struct.XPMap = type { i32*, float*, float*, float*, float*, float*, float*, float*, float*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.XPMode = type { float, float, %struct.XPStore, %struct.XPTransfer, %struct.XPMap, %struct.XISubset, i32, i32 }
+ %struct.XPPack = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8 }
+ %struct.XPStore = type { %struct.XPPack, %struct.XPPack }
+ %struct.XPTransfer = type { float, float, float, float, float, float, float, float, float, float, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }
+ %struct.XPointLineLimits = type { float, float, float }
+ %struct.XPointMode = type { float, float, float, float, %struct.XPointLineLimits, float, i8, i8, i8, i8, i16, i16, i32, i16, i16 }
+ %struct.XPGMode = type { [128 x i8], float, float, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XRegisterCCs = type { i8, i8, i8, i8, i32, [2 x %struct.GIC4], [8 x %struct.XRegisterCCsPerStageState], %struct.XRegisterCCsFinalStageState }
+ %struct.XRegisterCCsFinalStageState = type { i8, i8, i8, i8, [7 x %struct.XRegisterCCsPerVariableState] }
+ %struct.XRegisterCCsPerPortionState = type { [4 x %struct.XRegisterCCsPerVariableState], i8, i8, i8, i8, i16, i16, i16, i16, i16, i16 }
+ %struct.XRegisterCCsPerStageState = type { [2 x %struct.XRegisterCCsPerPortionState], [2 x %struct.GIC4] }
+ %struct.XRegisterCCsPerVariableState = type { i16, i16, i16, i16 }
+ %struct.XScissorTest = type { %struct.XFramebufferAttachment, i8, i8, i8, i8 }
+ %struct.XState = type { i16, i16, i16, i16, i32, i32, [256 x %struct.GIC4], [128 x %struct.GIC4], %struct.XViewport, %struct.XXF, %struct.XLightModel, %struct.XATest, %struct.XBlendMode, %struct.XClearC, %struct.XCBuffer, %struct.XDepthTest, %struct.XArrayRange, %struct.XFogMode, %struct.XHintMode, %struct.XLineMode, %struct.XLogicOp, %struct.XMaskMode, %struct.XPMode, %struct.XPointMode, %struct.XPGMode, %struct.XScissorTest, i32, %struct.XStencilTest, [16 x %struct.XTMode], %struct.XArrayRange, [8 x %struct.XTCoordGen], %struct.XClipPlane, %struct.XMultisample, %struct.XRegisterCCs, %struct.XArrayRange, %struct.XArrayRange, [3 x %struct.XPipelineProgramState], %struct.XXFFeedback, i32*, %struct.XFixedFunctionProgram, [3 x i32] }
+ %struct.XStencilTest = type { [3 x { i32, i32, i16, i16, i16, i16 }], i32, [4 x i8] }
+ %struct.XTCoordGen = type { { i16, i16, %struct.GIC4, %struct.GIC4 }, { i16, i16, %struct.GIC4, %struct.GIC4 }, { i16, i16, %struct.GIC4, %struct.GIC4 }, { i16, i16, %struct.GIC4, %struct.GIC4 }, i8, i8, i8, i8 }
+ %struct.XTGeomState = type { i16, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, [6 x i16], [6 x i16] }
+ %struct.XTLevel = type { i32, i32, i16, i16, i16, i8, i8, i16, i16, i16, i16, i8* }
+ %struct.XTMode = type { %struct.GIC4, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, float, float, float, i16, i16, i16, i16, i16, i16, [4 x i16], i8, i8, i8, i8, [3 x float], [4 x float], float, float }
+ %struct.XTParamState = type { i16, i16, i16, i16, i16, i16, %struct.GIC4, float, float, float, float, i16, i16, i16, i16, float, i16, i8, i8, i32, i8* }
+ %struct.XTRec = type { %struct.XTState*, float, float, float, float, %struct.XMipmaplevel*, %struct.XMipmaplevel*, i32, i32, i32, i32, i32, i32, i32, [2 x %struct.PPSToken] }
+ %struct.XTState = type { i16, i8, i8, i16, i16, float, i32, %struct.GISWRSurface*, %struct.XTParamState, %struct.XTGeomState, %struct.XTLevel, [6 x [15 x %struct.XTLevel]] }
+ %struct.XXF = type { [24 x [16 x float]], [24 x [16 x float]], [16 x float], float, float, float, float, float, i8, i8, i8, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i32 }
+ %struct.XXFFeedback = type { i8, i8, i8, i8, [16 x i32], [16 x i32] }
+ %struct.XViewport = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, double, double, i32, i32, i32, i32, float, float, float, float }
+ %struct.GIC4 = type { float, float, float, float }
+ %struct.GISWRSurface = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, [4 x i8*], i32 }
+ %struct.GTCoord2 = type { float, float }
+ %struct.GVMFPContext = type { float, i32, i32, i32, float, [3 x float] }
+ %struct.GVMFPStack = type { [8 x i8*], i8*, i8*, i32, i32, { <4 x float> }, { <4 x float> }, <4 x i32> }
+ %struct.GVMFGAttrib = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, [8 x <4 x float>] }
+ %struct.GVMTs = type { [16 x %struct.XTRec*] }
+ %struct.PPSToken = type { { i16, i16, i32 } }
+ %struct._GVMConstants = type { <4 x i32>, <4 x i32>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, float, float, float, float, float, float, float, float, float, float, float, float, [256 x float], [528 x i8] }
+
+declare <4 x i32> @llvm.ppc.altivec.lvewx(i8*)
+
+declare i32 @llvm.ppc.altivec.vcmpequw.p(i32, <4 x i32>, <4 x i32>)
+
+define void @test(%struct.XState* %gldst, <4 x float>* %prgrm, <4 x float>** %buffs, %struct._GVMConstants* %cnstn, %struct.PPSToken* %pstrm, %struct.GVMFPContext* %vmctx, %struct.GVMTs* %txtrs, %struct.GVMFPStack* %fpstk, %struct.GVMFGAttrib* %start, %struct.GVMFGAttrib* %deriv, i32 %fragx, i32 %fragy) {
+bb58.i:
+ %tmp3405.i = getelementptr %struct.XTRec* null, i32 0, i32 1 ; <float*> [#uses=1]
+ %tmp34053406.i = bitcast float* %tmp3405.i to i8* ; <i8*> [#uses=1]
+ %tmp3407.i = call <4 x i32> @llvm.ppc.altivec.lvewx( i8* %tmp34053406.i ) ; <<4 x i32>> [#uses=0]
+ %tmp4146.i = call i32 @llvm.ppc.altivec.vcmpequw.p( i32 3, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32> [#uses=1]
+ %tmp4147.i = icmp eq i32 %tmp4146.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp4147.i, label %bb8799.i, label %bb4150.i
+
+bb4150.i: ; preds = %bb58.i
+ br label %bb8799.i
+
+bb8799.i: ; preds = %bb4150.i, %bb58.i
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll b/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll
new file mode 100644
index 0000000..06f40d9
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=ppc64
+; PR1596
+
+ %struct._obstack_chunk = type { i8* }
+ %struct.obstack = type { i8*, %struct._obstack_chunk* (i8*, i64)*, i8*, i8 }
+
+define i32 @_obstack_newchunk(%struct.obstack* %h, i32 %length) {
+entry:
+ br i1 false, label %cond_false, label %cond_true
+
+cond_true: ; preds = %entry
+ br i1 false, label %cond_true28, label %cond_next30
+
+cond_false: ; preds = %entry
+ %tmp22 = tail call %struct._obstack_chunk* null( i64 undef ) ; <%struct._obstack_chunk*> [#uses=2]
+ br i1 false, label %cond_true28, label %cond_next30
+
+cond_true28: ; preds = %cond_false, %cond_true
+ %iftmp.0.043.0 = phi %struct._obstack_chunk* [ null, %cond_true ], [ %tmp22, %cond_false ] ; <%struct._obstack_chunk*> [#uses=1]
+ tail call void null( )
+ br label %cond_next30
+
+cond_next30: ; preds = %cond_true28, %cond_false, %cond_true
+ %iftmp.0.043.1 = phi %struct._obstack_chunk* [ %iftmp.0.043.0, %cond_true28 ], [ null, %cond_true ], [ %tmp22, %cond_false ] ; <%struct._obstack_chunk*> [#uses=1]
+ %tmp41 = getelementptr %struct._obstack_chunk* %iftmp.0.043.1, i32 0, i32 0 ; <i8**> [#uses=1]
+ store i8* null, i8** %tmp41, align 8
+ ret i32 undef
+}
diff --git a/test/CodeGen/PowerPC/2007-09-04-AltivecDST.ll b/test/CodeGen/PowerPC/2007-09-04-AltivecDST.ll
new file mode 100644
index 0000000..82ef2b8
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-09-04-AltivecDST.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc64 | grep dst | count 4
+
+define hidden void @_Z4borkPc(i8* %image) {
+entry:
+ tail call void @llvm.ppc.altivec.dst( i8* %image, i32 8, i32 0 )
+ tail call void @llvm.ppc.altivec.dstt( i8* %image, i32 8, i32 0 )
+ tail call void @llvm.ppc.altivec.dstst( i8* %image, i32 8, i32 0 )
+ tail call void @llvm.ppc.altivec.dststt( i8* %image, i32 8, i32 0 )
+ ret void
+}
+
+declare void @llvm.ppc.altivec.dst(i8*, i32, i32)
+declare void @llvm.ppc.altivec.dstt(i8*, i32, i32)
+declare void @llvm.ppc.altivec.dstst(i8*, i32, i32)
+declare void @llvm.ppc.altivec.dststt(i8*, i32, i32)
diff --git a/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll b/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll
new file mode 100644
index 0000000..ea7de98
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=ppc64 | grep lwzx
+
+ %struct.__db_region = type { %struct.__mutex_t, [4 x i8], %struct.anon, i32, [1 x i32] }
+ %struct.__mutex_t = type { i32 }
+ %struct.anon = type { i64, i64 }
+
+define void @foo() {
+entry:
+ %ttype = alloca i32, align 4 ; <i32*> [#uses=1]
+ %regs = alloca [1024 x %struct.__db_region], align 16 ; <[1024 x %struct.__db_region]*> [#uses=0]
+ %tmp = load i32* %ttype, align 4 ; <i32> [#uses=1]
+ %tmp1 = call i32 (...)* @bork( i32 %tmp ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @bork(...)
diff --git a/test/CodeGen/PowerPC/2007-09-08-unaligned.ll b/test/CodeGen/PowerPC/2007-09-08-unaligned.ll
new file mode 100644
index 0000000..898c470
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-09-08-unaligned.ll
@@ -0,0 +1,53 @@
+; RUN: llc < %s | grep stfd | count 3
+; RUN: llc < %s | grep stfs | count 1
+; RUN: llc < %s | grep lfd | count 2
+; RUN: llc < %s | grep lfs | count 2
+; ModuleID = 'foo.c'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin8"
+ %struct.anon = type <{ i8, float }>
+@s = global %struct.anon <{ i8 3, float 0x4014666660000000 }> ; <%struct.anon*> [#uses=1]
+@u = global <{ i8, double }> <{ i8 3, double 5.100000e+00 }> ; <<{ i8, double }>*> [#uses=1]
+@t = weak global %struct.anon zeroinitializer ; <%struct.anon*> [#uses=2]
+@v = weak global <{ i8, double }> zeroinitializer ; <<{ i8, double }>*> [#uses=2]
[email protected] = internal constant [8 x i8] c"%f %lf\0A\00" ; <[8 x i8]*> [#uses=1]
+
+define i32 @foo() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = getelementptr %struct.anon* @s, i32 0, i32 1 ; <float*> [#uses=1]
+ %tmp1 = load float* %tmp, align 1 ; <float> [#uses=1]
+ %tmp2 = getelementptr %struct.anon* @t, i32 0, i32 1 ; <float*> [#uses=1]
+ store float %tmp1, float* %tmp2, align 1
+ %tmp3 = getelementptr <{ i8, double }>* @u, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp4 = load double* %tmp3, align 1 ; <double> [#uses=1]
+ %tmp5 = getelementptr <{ i8, double }>* @v, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %tmp4, double* %tmp5, align 1
+ br label %return
+
+return: ; preds = %entry
+ %retval6 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval6
+}
+
+define i32 @main() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = call i32 @foo( ) ; <i32> [#uses=0]
+ %tmp1 = getelementptr %struct.anon* @t, i32 0, i32 1 ; <float*> [#uses=1]
+ %tmp2 = load float* %tmp1, align 1 ; <float> [#uses=1]
+ %tmp23 = fpext float %tmp2 to double ; <double> [#uses=1]
+ %tmp4 = getelementptr <{ i8, double }>* @v, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp5 = load double* %tmp4, align 1 ; <double> [#uses=1]
+ %tmp6 = getelementptr [8 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp7 = call i32 (i8*, ...)* @printf( i8* %tmp6, double %tmp23, double %tmp5 ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ %retval8 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval8
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll b/test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll
new file mode 100644
index 0000000..d12698b
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc64
+
+ %struct.TCMalloc_SpinLock = type { i32 }
+
+define void @_ZN17TCMalloc_SpinLock4LockEv(%struct.TCMalloc_SpinLock* %this) {
+entry:
+ %tmp3 = call i32 asm sideeffect "1: lwarx $0, 0, $1\0A\09stwcx. $2, 0, $1\0A\09bne- 1b\0A\09isync", "=&r,=*r,r,1,~{dirflag},~{fpsr},~{flags},~{memory}"( i32** null, i32 1, i32* null ) ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/PowerPC/2007-09-12-LiveIntervalsAssert.ll b/test/CodeGen/PowerPC/2007-09-12-LiveIntervalsAssert.ll
new file mode 100644
index 0000000..5cfe54e
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-09-12-LiveIntervalsAssert.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin
+
+declare void @cxa_atexit_check_1(i8*)
+
+define i32 @check_cxa_atexit(i32 (void (i8*)*, i8*, i8*)* %cxa_atexit, void (i8*)* %cxa_finalize) {
+entry:
+ %tmp7 = call i32 null( void (i8*)* @cxa_atexit_check_1, i8* null, i8* null ) ; <i32> [#uses=0]
+ br i1 false, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ ret i32 0
+
+cond_next: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/PowerPC/2007-10-16-InlineAsmFrameOffset.ll b/test/CodeGen/PowerPC/2007-10-16-InlineAsmFrameOffset.ll
new file mode 100644
index 0000000..c4152b4
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-10-16-InlineAsmFrameOffset.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc32
+; rdar://5538377
+
+ %struct.disk_unsigned = type { i32 }
+ %struct._StorePageMax = type { %struct.disk_unsigned, %struct.disk_unsigned, [65536 x i8] }
+
+define i32 @test() {
+entry:
+ %data = alloca i32 ; <i32*> [#uses=1]
+ %compressedPage = alloca %struct._StorePageMax ; <%struct._StorePageMax*> [#uses=0]
+ %tmp107 = call i32 asm "lwbrx $0, $2, $1", "=r,r,bO,*m"( i8* null, i32 0, i32* %data ) ; <i32> [#uses=0]
+ unreachable
+}
+
diff --git a/test/CodeGen/PowerPC/2007-10-18-PtrArithmetic.ll b/test/CodeGen/PowerPC/2007-10-18-PtrArithmetic.ll
new file mode 100644
index 0000000..84fadd1
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-10-18-PtrArithmetic.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=ppc64 -mattr=+altivec
+ %struct.inoutprops = type <{ i8, [3 x i8] }>
+
+define void @bork(float* %argA, float* %argB, float* %res, i8 %inoutspec.0) {
+entry:
+ %.mask = and i8 %inoutspec.0, -16 ; <i8> [#uses=1]
+ %tmp6 = icmp eq i8 %.mask, 16 ; <i1> [#uses=1]
+ br i1 %tmp6, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ %tmp89 = bitcast float* %res to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %tmp1011 = bitcast float* %argA to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %tmp14 = load <4 x i32>* %tmp1011, align 16 ; <<4 x i32>> [#uses=1]
+ %tmp1516 = bitcast float* %argB to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %tmp18 = load <4 x i32>* %tmp1516, align 16 ; <<4 x i32>> [#uses=1]
+ %tmp19 = sdiv <4 x i32> %tmp14, %tmp18 ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp19, <4 x i32>* %tmp89, align 16
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll b/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
new file mode 100644
index 0000000..ee61478
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin9 -regalloc=local -relocation-model=pic
+
+ %struct.NSError = type opaque
+ %struct.NSManagedObjectContext = type opaque
+ %struct.NSPersistentStoreCoordinator = type opaque
+ %struct.NSString = type opaque
+ %struct.NSURL = type opaque
+ %struct._message_ref_t = type { %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*, %struct.objc_selector* }
+ %struct.objc_object = type { }
+ %struct.objc_selector = type opaque
+@"\01L_OBJC_MESSAGE_REF_2" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1]
+@"\01L_OBJC_MESSAGE_REF_6" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1]
+@NSXMLStoreType = external constant %struct.NSString* ; <%struct.NSString**> [#uses=1]
+@"\01L_OBJC_MESSAGE_REF_5" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=2]
+@"\01L_OBJC_MESSAGE_REF_4" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1]
+
+define %struct.NSManagedObjectContext* @"+[ListGenerator(Private) managedObjectContextWithModelURL:storeURL:]"(%struct.objc_object* %self, %struct._message_ref_t* %_cmd, %struct.NSURL* %modelURL, %struct.NSURL* %storeURL) {
+entry:
+ %storeCoordinator = alloca %struct.NSPersistentStoreCoordinator* ; <%struct.NSPersistentStoreCoordinator**> [#uses=0]
+ %tmp29 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* null( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_2" ) ; <%struct.objc_object*> [#uses=0]
+ %tmp34 = load %struct.NSString** @NSXMLStoreType, align 8 ; <%struct.NSString*> [#uses=1]
+ %tmp37 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_5", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1]
+ %tmp42 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* null( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_4", i32 1 ) ; <%struct.objc_object*> [#uses=1]
+ %tmp45 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* %tmp37( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_5", %struct.objc_object* %tmp42, %struct.NSString* null ) ; <%struct.objc_object*> [#uses=1]
+ %tmp48 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* null( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_6", %struct.NSString* %tmp34, i8* null, %struct.NSURL* null, %struct.objc_object* %tmp45, %struct.NSError** null ) ; <%struct.objc_object*> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll b/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll
new file mode 100644
index 0000000..5a07a9b
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin9 -regalloc=local -relocation-model=pic
+
+ %struct.NSError = type opaque
+ %struct.NSManagedObjectContext = type opaque
+ %struct.NSString = type opaque
+ %struct.NSURL = type opaque
+ %struct._message_ref_t = type { %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*, %struct.objc_selector* }
+ %struct.objc_object = type { }
+ %struct.objc_selector = type opaque
+@"\01L_OBJC_MESSAGE_REF_2" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=2]
+@"\01L_OBJC_MESSAGE_REF_6" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=2]
+@NSXMLStoreType = external constant %struct.NSString* ; <%struct.NSString**> [#uses=1]
+@"\01L_OBJC_MESSAGE_REF_4" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=2]
+
+define %struct.NSManagedObjectContext* @"+[ListGenerator(Private) managedObjectContextWithModelURL:storeURL:]"(%struct.objc_object* %self, %struct._message_ref_t* %_cmd, %struct.NSURL* %modelURL, %struct.NSURL* %storeURL) {
+entry:
+ %tmp27 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_2", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1]
+ %tmp29 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* %tmp27( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_2" ) ; <%struct.objc_object*> [#uses=0]
+ %tmp33 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_6", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1]
+ %tmp34 = load %struct.NSString** @NSXMLStoreType, align 8 ; <%struct.NSString*> [#uses=1]
+ %tmp40 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_4", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1]
+ %tmp42 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* %tmp40( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_4", i32 1 ) ; <%struct.objc_object*> [#uses=0]
+ %tmp48 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* %tmp33( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_6", %struct.NSString* %tmp34, i8* null, %struct.NSURL* null, %struct.objc_object* null, %struct.NSError** null ) ; <%struct.objc_object*> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/PowerPC/2007-11-04-CoalescerCrash.ll b/test/CodeGen/PowerPC/2007-11-04-CoalescerCrash.ll
new file mode 100644
index 0000000..a9f242b
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-11-04-CoalescerCrash.ll
@@ -0,0 +1,148 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin
+
+ %struct.HDescriptor = type <{ i32, i32 }>
+
+declare void @bcopy(i8*, i8*, i32)
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ br i1 false, label %bb31, label %bb
+
+bb: ; preds = %entry
+ ret i32 -6
+
+bb31: ; preds = %entry
+ switch i32 0, label %bb189 [
+ i32 73, label %cond_next209
+ i32 74, label %bb74
+ i32 77, label %bb57
+ i32 78, label %cond_next209
+ i32 85, label %cond_next209
+ i32 97, label %cond_next209
+ i32 100, label %cond_next209
+ i32 107, label %cond_next209
+ i32 109, label %bb57
+ i32 112, label %bb43
+ i32 115, label %cond_next209
+ i32 117, label %bb51
+ ]
+
+bb43: ; preds = %bb31
+ br i1 false, label %cond_true48, label %cond_true200.critedge2117
+
+cond_true48: ; preds = %bb43
+ br i1 false, label %cond_next372, label %AllDone
+
+bb51: ; preds = %bb31
+ ret i32 0
+
+bb57: ; preds = %bb31, %bb31
+ ret i32 0
+
+bb74: ; preds = %bb31
+ ret i32 0
+
+bb189: ; preds = %bb31
+ ret i32 0
+
+cond_true200.critedge2117: ; preds = %bb43
+ ret i32 0
+
+cond_next209: ; preds = %bb31, %bb31, %bb31, %bb31, %bb31, %bb31, %bb31
+ ret i32 0
+
+cond_next372: ; preds = %cond_true48
+ switch i32 0, label %bb1728 [
+ i32 73, label %bb1723
+ i32 74, label %cond_true1700
+ i32 78, label %bb1718
+ i32 85, label %bb1713
+ i32 97, label %bb1620
+ i32 107, label %AllDone
+ i32 112, label %cond_next423
+ i32 117, label %cond_next1453
+ ]
+
+cond_next423: ; preds = %cond_next372
+ switch i16 0, label %cond_next691 [
+ i16 18475, label %cond_next807
+ i16 18520, label %cond_next807
+ ]
+
+cond_next691: ; preds = %cond_next423
+ ret i32 0
+
+cond_next807: ; preds = %cond_next423, %cond_next423
+ switch i16 0, label %cond_true1192 [
+ i16 18475, label %cond_next21.i
+ i16 18520, label %cond_next21.i
+ ]
+
+cond_next21.i: ; preds = %cond_next807, %cond_next807
+ br i1 false, label %cond_next934, label %free.i
+
+free.i: ; preds = %cond_next21.i
+ ret i32 0
+
+cond_next934: ; preds = %bb1005, %cond_next21.i
+ %listsize.1 = phi i32 [ 0, %bb1005 ], [ 64, %cond_next21.i ] ; <i32> [#uses=1]
+ %catalogExtents.2 = phi %struct.HDescriptor* [ %catalogExtents.1.reg2mem.1, %bb1005 ], [ null, %cond_next21.i ] ; <%struct.HDescriptor*> [#uses=3]
+ br i1 false, label %cond_next942, label %Return1020
+
+cond_next942: ; preds = %cond_next934
+ br i1 false, label %bb1005, label %bb947
+
+bb947: ; preds = %cond_next971, %cond_next942
+ %indvar = phi i32 [ 0, %cond_next942 ], [ %indvar.next2140, %cond_next971 ] ; <i32> [#uses=2]
+ %catalogExtents.1.reg2mem.0 = phi %struct.HDescriptor* [ %catalogExtents.2, %cond_next942 ], [ %tmp977978, %cond_next971 ] ; <%struct.HDescriptor*> [#uses=1]
+ %extents.0.reg2mem.0 = phi %struct.HDescriptor* [ null, %cond_next942 ], [ %tmp977978, %cond_next971 ] ; <%struct.HDescriptor*> [#uses=1]
+ br i1 false, label %cond_next971, label %Return1020
+
+cond_next971: ; preds = %bb947
+ %tmp = shl i32 %indvar, 6 ; <i32> [#uses=1]
+ %listsize.0.reg2mem.0 = add i32 %tmp, %listsize.1 ; <i32> [#uses=1]
+ %tmp973 = add i32 %listsize.0.reg2mem.0, 64 ; <i32> [#uses=1]
+ %tmp974975 = bitcast %struct.HDescriptor* %extents.0.reg2mem.0 to i8* ; <i8*> [#uses=1]
+ %tmp977 = call i8* @realloc( i8* %tmp974975, i32 %tmp973 ) ; <i8*> [#uses=1]
+ %tmp977978 = bitcast i8* %tmp977 to %struct.HDescriptor* ; <%struct.HDescriptor*> [#uses=3]
+ call void @bcopy( i8* null, i8* null, i32 64 )
+ %indvar.next2140 = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 false, label %bb1005, label %bb947
+
+bb1005: ; preds = %cond_next971, %cond_next942
+ %catalogExtents.1.reg2mem.1 = phi %struct.HDescriptor* [ %catalogExtents.2, %cond_next942 ], [ %tmp977978, %cond_next971 ] ; <%struct.HDescriptor*> [#uses=2]
+ br i1 false, label %Return1020, label %cond_next934
+
+Return1020: ; preds = %bb1005, %bb947, %cond_next934
+ %catalogExtents.3 = phi %struct.HDescriptor* [ %catalogExtents.1.reg2mem.0, %bb947 ], [ %catalogExtents.2, %cond_next934 ], [ %catalogExtents.1.reg2mem.1, %bb1005 ] ; <%struct.HDescriptor*> [#uses=0]
+ ret i32 0
+
+cond_true1192: ; preds = %cond_next807
+ ret i32 0
+
+cond_next1453: ; preds = %cond_next372
+ ret i32 0
+
+bb1620: ; preds = %cond_next372
+ ret i32 0
+
+cond_true1700: ; preds = %cond_next372
+ ret i32 0
+
+bb1713: ; preds = %cond_next372
+ ret i32 0
+
+bb1718: ; preds = %cond_next372
+ ret i32 0
+
+bb1723: ; preds = %cond_next372
+ ret i32 0
+
+bb1728: ; preds = %cond_next372
+ ret i32 -6
+
+AllDone: ; preds = %cond_next372, %cond_true48
+ ret i32 0
+}
+
+declare i8* @realloc(i8*, i32)
diff --git a/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll b/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
new file mode 100644
index 0000000..439ef14
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s -enable-eh
+;; Formerly crashed, see PR 1508
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc64-apple-darwin8"
+ %struct.Range = type { i64, i64 }
+
+define void @Bork(i64 %range.0.0, i64 %range.0.1, i64 %size) {
+entry:
+ %effectiveRange = alloca %struct.Range, align 8 ; <%struct.Range*> [#uses=2]
+ %tmp4 = call i8* @llvm.stacksave() ; <i8*> [#uses=1]
+ %size1 = trunc i64 %size to i32 ; <i32> [#uses=1]
+ %tmp17 = alloca i8*, i32 %size1 ; <i8**> [#uses=1]
+ invoke void @Foo(i8** %tmp17)
+ to label %bb30.preheader unwind label %unwind
+
+bb30.preheader: ; preds = %entry
+ %tmp26 = getelementptr %struct.Range* %effectiveRange, i64 0, i32 1 ; <i64*> [#uses=1]
+ br label %bb30
+
+unwind: ; preds = %cond_true, %entry
+ %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select = call i64 (i8*, i8*, ...)* @llvm.eh.selector.i64(i8* %eh_ptr, i8* bitcast (void ()* @__gxx_personality_v0 to i8*), i8* null) ; <i64> [#uses=0]
+ call void @llvm.stackrestore(i8* %tmp4)
+ call void @_Unwind_Resume(i8* %eh_ptr)
+ unreachable
+
+invcont23: ; preds = %cond_true
+ %tmp27 = load i64* %tmp26, align 8 ; <i64> [#uses=1]
+ %tmp28 = sub i64 %range_addr.1.0, %tmp27 ; <i64> [#uses=1]
+ br label %bb30
+
+bb30: ; preds = %invcont23, %bb30.preheader
+ %range_addr.1.0 = phi i64 [ %tmp28, %invcont23 ], [ %range.0.1, %bb30.preheader ] ; <i64> [#uses=2]
+ %tmp33 = icmp eq i64 %range_addr.1.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp33, label %cleanup, label %cond_true
+
+cond_true: ; preds = %bb30
+ invoke void @Bar(i64 %range.0.0, %struct.Range* %effectiveRange)
+ to label %invcont23 unwind label %unwind
+
+cleanup: ; preds = %bb30
+ ret void
+}
+
+declare i8* @llvm.stacksave() nounwind
+
+declare void @Foo(i8**)
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i64 @llvm.eh.selector.i64(i8*, i8*, ...) nounwind
+
+declare void @__gxx_personality_v0()
+
+declare void @_Unwind_Resume(i8*)
+
+declare void @Bar(i64, %struct.Range*)
+
+declare void @llvm.stackrestore(i8*) nounwind
diff --git a/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll b/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll
new file mode 100644
index 0000000..d1f0285
--- /dev/null
+++ b/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s
+; RUN: llc < %s -march=ppc32 -mcpu=g3
+; RUN: llc < %s -march=ppc32 -mcpu=g5
+; PR1811
+
+define void @execute_shader(<4 x float>* %OUT, <4 x float>* %IN, <4 x float>*
+%CONST) {
+entry:
+ %input2 = load <4 x float>* null, align 16 ; <<4 x float>>
+ %shuffle7 = shufflevector <4 x float> %input2, <4 x float> < float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>> [#uses=1]
+
+ %mul1 = fmul <4 x float> %shuffle7, zeroinitializer ; <<4 x
+ %add2 = fadd <4 x float> %mul1, %input2 ; <<4 x float>>
+ store <4 x float> %add2, <4 x float>* null, align 16
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2008-01-25-EmptyFunction.ll b/test/CodeGen/PowerPC/2008-01-25-EmptyFunction.ll
new file mode 100644
index 0000000..a05245d
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-01-25-EmptyFunction.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 | grep .byte
+target triple = "powerpc-apple-darwin8"
+
+
+define void @bork() noreturn nounwind {
+entry:
+ unreachable
+}
diff --git a/test/CodeGen/PowerPC/2008-02-05-LiveIntervalsAssert.ll b/test/CodeGen/PowerPC/2008-02-05-LiveIntervalsAssert.ll
new file mode 100644
index 0000000..791e9e6
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-02-05-LiveIntervalsAssert.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin
+
+ %struct.Handle = type { %struct.oopDesc** }
+ %struct.JNI_ArgumentPusher = type { %struct.SignatureIterator, %struct.JavaCallArguments* }
+ %struct.JNI_ArgumentPusherArray = type { %struct.JNI_ArgumentPusher, %struct.JvmtiEventEnabled* }
+ %struct.JavaCallArguments = type { [9 x i32], [9 x i32], i32*, i32*, i32, i32, i32 }
+ %struct.JvmtiEventEnabled = type { i64 }
+ %struct.KlassHandle = type { %struct.Handle }
+ %struct.SignatureIterator = type { i32 (...)**, %struct.KlassHandle, i32, i32, i32 }
+ %struct.instanceOopDesc = type { %struct.oopDesc }
+ %struct.oopDesc = type { %struct.instanceOopDesc*, %struct.instanceOopDesc* }
[email protected] = external constant [44 x i8] ; <[44 x i8]*> [#uses=1]
+
+define void @_ZN23JNI_ArgumentPusherArray7iterateEy(%struct.JNI_ArgumentPusherArray* %this, i64 %fingerprint) nounwind {
+entry:
+ br label %bb113
+
+bb22.preheader: ; preds = %bb113
+ ret void
+
+bb32.preheader: ; preds = %bb113
+ ret void
+
+bb42.preheader: ; preds = %bb113
+ ret void
+
+bb52: ; preds = %bb113
+ br label %bb113
+
+bb62.preheader: ; preds = %bb113
+ ret void
+
+bb72.preheader: ; preds = %bb113
+ ret void
+
+bb82: ; preds = %bb113
+ br label %bb113
+
+bb93: ; preds = %bb113
+ br label %bb113
+
+bb103.preheader: ; preds = %bb113
+ ret void
+
+bb113: ; preds = %bb113, %bb93, %bb82, %bb52, %entry
+ %fingerprint_addr.0.reg2mem.9 = phi i64 [ 0, %entry ], [ 0, %bb52 ], [ 0, %bb82 ], [ 0, %bb93 ], [ %tmp118, %bb113 ] ; <i64> [#uses=1]
+ tail call void @_Z28report_should_not_reach_herePKci( i8* getelementptr ([44 x i8]* @.str, i32 0, i32 0), i32 817 ) nounwind
+ %tmp118 = lshr i64 %fingerprint_addr.0.reg2mem.9, 4 ; <i64> [#uses=2]
+ %tmp21158 = and i64 %tmp118, 15 ; <i64> [#uses=1]
+ switch i64 %tmp21158, label %bb113 [
+ i64 1, label %bb22.preheader
+ i64 2, label %bb52
+ i64 3, label %bb32.preheader
+ i64 4, label %bb42.preheader
+ i64 5, label %bb62.preheader
+ i64 6, label %bb82
+ i64 7, label %bb93
+ i64 8, label %bb103.preheader
+ i64 9, label %bb72.preheader
+ i64 10, label %UnifiedReturnBlock
+ ]
+
+UnifiedReturnBlock: ; preds = %bb113
+ ret void
+}
+
+declare void @_Z28report_should_not_reach_herePKci(i8*, i32)
diff --git a/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll b/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll
new file mode 100644
index 0000000..cfa1b10
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin -regalloc=local
+
+define i32 @bork(i64 %foo, i64 %bar) {
+entry:
+ %tmp = load i64* null, align 8 ; <i64> [#uses=2]
+ %tmp2 = icmp ule i64 %tmp, 0 ; <i1> [#uses=1]
+ %min = select i1 %tmp2, i64 %tmp, i64 0 ; <i64> [#uses=1]
+ store i64 %min, i64* null, align 8
+ ret i32 0
+}
diff --git a/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll b/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll
new file mode 100644
index 0000000..e50fac44
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin -enable-ppc32-regscavenger
+
+declare i8* @bar(i32)
+
+define void @foo(i8* %pp) nounwind {
+entry:
+ %tmp2 = tail call i8* @bar( i32 14 ) nounwind ; <i8*> [#uses=0]
+ %tmp28 = bitcast i8* %pp to void ()** ; <void ()**> [#uses=1]
+ %tmp38 = load void ()** %tmp28, align 4 ; <void ()*> [#uses=2]
+ br i1 false, label %bb34, label %bb25
+bb25: ; preds = %entry
+ %tmp30 = bitcast void ()* %tmp38 to void (i8*)* ; <void (i8*)*> [#uses=1]
+ tail call void %tmp30( i8* null ) nounwind
+ ret void
+bb34: ; preds = %entry
+ tail call void %tmp38( ) nounwind
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll b/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll
new file mode 100644
index 0000000..222dde4
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=ppc64 -enable-ppc64-regscavenger
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=1]
+
+define fastcc void @ParseContent(i8* %buf, i32 %bufsize) {
+entry:
+ %items = alloca [10000 x i8*], align 16 ; <[10000 x i8*]*> [#uses=0]
+ %tmp86 = add i32 0, -1 ; <i32> [#uses=1]
+ br i1 false, label %cond_true94, label %cond_next99
+cond_true94: ; preds = %entry
+ %tmp98 = call i32 (i8*, ...)* @printf( i8* getelementptr ([3 x i8]* @.str242, i32 0, i32 0), i8* null ) ; <i32> [#uses=0]
+ %tmp20971 = icmp sgt i32 %tmp86, 0 ; <i1> [#uses=1]
+ br i1 %tmp20971, label %bb101, label %bb212
+cond_next99: ; preds = %entry
+ ret void
+bb101: ; preds = %cond_true94
+ ret void
+bb212: ; preds = %cond_true94
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/PowerPC/2008-03-17-RegScavengerCrash.ll b/test/CodeGen/PowerPC/2008-03-17-RegScavengerCrash.ll
new file mode 100644
index 0000000..9f35b83
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-03-17-RegScavengerCrash.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=ppc32 -enable-ppc32-regscavenger
+
+ %struct._cpp_strbuf = type { i8*, i32, i32 }
+ %struct.cpp_string = type { i32, i8* }
+
+declare fastcc void @emit_numeric_escape(i32, i32, %struct._cpp_strbuf*, i32) nounwind
+
+define i32 @cpp_interpret_string(i32 %pfile, %struct.cpp_string* %from, i32 %wide) nounwind {
+entry:
+ %tmp61 = load i32* null, align 4 ; <i32> [#uses=1]
+ %toBool = icmp eq i32 %wide, 0 ; <i1> [#uses=2]
+ %iftmp.87.0 = select i1 %toBool, i32 %tmp61, i32 0 ; <i32> [#uses=2]
+ %tmp69 = icmp ult i32 %iftmp.87.0, 33 ; <i1> [#uses=1]
+ %min = select i1 %tmp69, i32 %iftmp.87.0, i32 32 ; <i32> [#uses=1]
+ %tmp71 = icmp ugt i32 %min, 31 ; <i1> [#uses=1]
+ br i1 %tmp71, label %bb79, label %bb75
+bb75: ; preds = %entry
+ ret i32 0
+bb79: ; preds = %entry
+ br i1 %toBool, label %bb103, label %bb94
+bb94: ; preds = %bb79
+ br i1 false, label %bb729, label %bb130.preheader
+bb103: ; preds = %bb79
+ ret i32 0
+bb130.preheader: ; preds = %bb94
+ %tmp134 = getelementptr %struct.cpp_string* %from, i32 0, i32 1 ; <i8**> [#uses=0]
+ ret i32 0
+bb729: ; preds = %bb94
+ call fastcc void @emit_numeric_escape( i32 %pfile, i32 0, %struct._cpp_strbuf* null, i32 %wide ) nounwind
+ ret i32 1
+}
diff --git a/test/CodeGen/PowerPC/2008-03-18-RegScavengerAssert.ll b/test/CodeGen/PowerPC/2008-03-18-RegScavengerAssert.ll
new file mode 100644
index 0000000..dd425f5
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-03-18-RegScavengerAssert.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=ppc64 -enable-ppc64-regscavenger
+
+define i16 @test(i8* %d1, i16* %d2) {
+ %tmp237 = call i16 asm "lhbrx $0, $2, $1", "=r,r,bO,m"( i8* %d1, i32 0, i16* %d2 )
+ ret i16 %tmp237
+}
diff --git a/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll b/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll
new file mode 100644
index 0000000..a8fef05
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=ppc64
+
+define fastcc i8* @page_rec_get_next(i8* %rec) nounwind {
+entry:
+ %tmp2627 = ptrtoint i8* %rec to i64 ; <i64> [#uses=2]
+ %tmp28 = and i64 %tmp2627, -16384 ; <i64> [#uses=2]
+ %tmp2829 = inttoptr i64 %tmp28 to i8* ; <i8*> [#uses=1]
+ %tmp37 = getelementptr i8* %tmp2829, i64 42 ; <i8*> [#uses=1]
+ %tmp40 = load i8* %tmp37, align 1 ; <i8> [#uses=1]
+ %tmp4041 = zext i8 %tmp40 to i64 ; <i64> [#uses=1]
+ %tmp42 = shl i64 %tmp4041, 8 ; <i64> [#uses=1]
+ %tmp47 = add i64 %tmp42, 0 ; <i64> [#uses=1]
+ %tmp52 = and i64 %tmp47, 32768 ; <i64> [#uses=1]
+ %tmp72 = icmp eq i64 %tmp52, 0 ; <i1> [#uses=1]
+ br i1 %tmp72, label %bb91, label %bb
+bb: ; preds = %entry
+ ret i8* null
+bb91: ; preds = %entry
+ br i1 false, label %bb100, label %bb185
+bb100: ; preds = %bb91
+ %tmp106 = sub i64 %tmp2627, %tmp28 ; <i64> [#uses=0]
+ ret i8* null
+bb185: ; preds = %bb91
+ ret i8* null
+}
diff --git a/test/CodeGen/PowerPC/2008-03-24-CoalescerBug.ll b/test/CodeGen/PowerPC/2008-03-24-CoalescerBug.ll
new file mode 100644
index 0000000..8776d9a
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-03-24-CoalescerBug.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=ppc32
+
+ %struct..0objc_object = type { %struct.objc_class* }
+ %struct.NSArray = type { %struct..0objc_object }
+ %struct.NSMutableArray = type { %struct.NSArray }
+ %struct.PFTPersistentSymbols = type { %struct..0objc_object, %struct.VMUSymbolicator*, %struct.NSMutableArray*, %struct.__CFDictionary*, %struct.__CFDictionary*, %struct.__CFDictionary*, %struct.__CFDictionary*, %struct.NSMutableArray*, i8, %struct.pthread_mutex_t, %struct.NSMutableArray*, %struct.pthread_rwlock_t }
+ %struct.VMUMachTaskContainer = type { %struct..0objc_object, i32, i32 }
+ %struct.VMUSymbolicator = type { %struct..0objc_object, %struct.NSMutableArray*, %struct.NSArray*, %struct.NSArray*, %struct.VMUMachTaskContainer*, i8 }
+ %struct.__CFDictionary = type opaque
+ %struct.__builtin_CFString = type { i32*, i32, i8*, i32 }
+ %struct.objc_class = type opaque
+ %struct.objc_selector = type opaque
+ %struct.pthread_mutex_t = type { i32, [40 x i8] }
+ %struct.pthread_rwlock_t = type { i32, [124 x i8] }
+external constant %struct.__builtin_CFString ; <%struct.__builtin_CFString*>:0 [#uses=1]
+
+define void @"-[PFTPersistentSymbols saveSymbolWithName:address:path:lineNumber:flags:owner:]"(%struct.PFTPersistentSymbols* %self, %struct.objc_selector* %_cmd, %struct.NSArray* %name, i64 %address, %struct.NSArray* %path, i32 %lineNumber, i64 %flags, %struct..0objc_object* %owner) nounwind {
+entry:
+ br i1 false, label %bb12, label %bb21
+bb12: ; preds = %entry
+ %tmp17 = tail call i8 inttoptr (i64 4294901504 to i8 (%struct..0objc_object*, %struct.objc_selector*, %struct.NSArray*)*)( %struct..0objc_object* null, %struct.objc_selector* null, %struct.NSArray* bitcast (%struct.__builtin_CFString* @0 to %struct.NSArray*) ) signext nounwind ; <i8> [#uses=0]
+ br i1 false, label %bb25, label %bb21
+bb21: ; preds = %bb12, %entry
+ %tmp24 = or i64 %flags, 4 ; <i64> [#uses=1]
+ br label %bb25
+bb25: ; preds = %bb21, %bb12
+ %flags_addr.0 = phi i64 [ %tmp24, %bb21 ], [ %flags, %bb12 ] ; <i64> [#uses=1]
+ %tmp3233 = trunc i64 %flags_addr.0 to i32 ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2008-03-26-CoalescerBug.ll b/test/CodeGen/PowerPC/2008-03-26-CoalescerBug.ll
new file mode 100644
index 0000000..8e5bf56
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-03-26-CoalescerBug.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin
+
+define i32 @t(i64 %byteStart, i32 %activeIndex) nounwind {
+entry:
+ %tmp50 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp5051 = zext i32 %tmp50 to i64 ; <i64> [#uses=3]
+ %tmp53 = udiv i64 %byteStart, %tmp5051 ; <i64> [#uses=1]
+ %tmp5354 = trunc i64 %tmp53 to i32 ; <i32> [#uses=1]
+ %tmp62 = urem i64 %byteStart, %tmp5051 ; <i64> [#uses=1]
+ %tmp94 = add i32 0, 1 ; <i32> [#uses=1]
+ %tmp100 = urem i32 %tmp94, 0 ; <i32> [#uses=2]
+ %tmp108 = add i32 0, %activeIndex ; <i32> [#uses=1]
+ %tmp110 = sub i32 %tmp108, 0 ; <i32> [#uses=1]
+ %tmp112 = urem i32 %tmp110, 0 ; <i32> [#uses=2]
+ %tmp122 = icmp ult i32 %tmp112, %tmp100 ; <i1> [#uses=1]
+ %iftmp.175.0 = select i1 %tmp122, i32 %tmp112, i32 %tmp100 ; <i32> [#uses=1]
+ %tmp119 = add i32 %tmp5354, 0 ; <i32> [#uses=1]
+ %tmp131 = add i32 %tmp119, %iftmp.175.0 ; <i32> [#uses=1]
+ %tmp131132 = zext i32 %tmp131 to i64 ; <i64> [#uses=1]
+ %tmp147 = mul i64 %tmp131132, %tmp5051 ; <i64> [#uses=1]
+ br i1 false, label %bb164, label %bb190
+bb164: ; preds = %entry
+ %tmp171172 = and i64 %tmp62, 4294967295 ; <i64> [#uses=1]
+ %tmp173 = add i64 %tmp171172, %tmp147 ; <i64> [#uses=0]
+ ret i32 0
+bb190: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/PowerPC/2008-04-10-LiveIntervalCrash.ll b/test/CodeGen/PowerPC/2008-04-10-LiveIntervalCrash.ll
new file mode 100644
index 0000000..2706337
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-04-10-LiveIntervalCrash.ll
@@ -0,0 +1,100 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin
+
+define fastcc i64 @nonzero_bits1() nounwind {
+entry:
+ switch i32 0, label %bb1385 [
+ i32 28, label %bb235
+ i32 35, label %bb153
+ i32 37, label %bb951
+ i32 40, label %bb289
+ i32 44, label %bb1344
+ i32 46, label %bb651
+ i32 47, label %bb651
+ i32 48, label %bb322
+ i32 49, label %bb651
+ i32 50, label %bb651
+ i32 51, label %bb651
+ i32 52, label %bb651
+ i32 53, label %bb651
+ i32 54, label %bb535
+ i32 55, label %bb565
+ i32 56, label %bb565
+ i32 58, label %bb1100
+ i32 59, label %bb1100
+ i32 60, label %bb1100
+ i32 61, label %bb1100
+ i32 63, label %bb565
+ i32 64, label %bb565
+ i32 65, label %bb565
+ i32 66, label %bb565
+ i32 73, label %bb302
+ i32 74, label %bb302
+ i32 75, label %bb302
+ i32 76, label %bb302
+ i32 77, label %bb302
+ i32 78, label %bb302
+ i32 79, label %bb302
+ i32 80, label %bb302
+ i32 81, label %bb302
+ i32 82, label %bb302
+ i32 83, label %bb302
+ i32 84, label %bb302
+ i32 85, label %bb302
+ i32 86, label %bb302
+ i32 87, label %bb302
+ i32 88, label %bb302
+ i32 89, label %bb302
+ i32 90, label %bb302
+ i32 91, label %bb507
+ i32 92, label %bb375
+ i32 93, label %bb355
+ i32 103, label %bb1277
+ i32 104, label %bb1310
+ i32 105, label %UnifiedReturnBlock
+ i32 106, label %bb1277
+ i32 107, label %bb1343
+ ]
+bb153: ; preds = %entry
+ ret i64 0
+bb235: ; preds = %entry
+ br i1 false, label %bb245, label %UnifiedReturnBlock
+bb245: ; preds = %bb235
+ ret i64 0
+bb289: ; preds = %entry
+ ret i64 0
+bb302: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
+ ret i64 0
+bb322: ; preds = %entry
+ ret i64 0
+bb355: ; preds = %entry
+ ret i64 0
+bb375: ; preds = %entry
+ ret i64 0
+bb507: ; preds = %entry
+ ret i64 0
+bb535: ; preds = %entry
+ ret i64 0
+bb565: ; preds = %entry, %entry, %entry, %entry, %entry, %entry
+ ret i64 0
+bb651: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry
+ ret i64 0
+bb951: ; preds = %entry
+ ret i64 0
+bb1100: ; preds = %entry, %entry, %entry, %entry
+ ret i64 0
+bb1277: ; preds = %entry, %entry
+ br i1 false, label %UnifiedReturnBlock, label %bb1284
+bb1284: ; preds = %bb1277
+ ret i64 0
+bb1310: ; preds = %entry
+ ret i64 0
+bb1343: ; preds = %entry
+ ret i64 1
+bb1344: ; preds = %entry
+ ret i64 0
+bb1385: ; preds = %entry
+ ret i64 0
+UnifiedReturnBlock: ; preds = %bb1277, %bb235, %entry
+ %UnifiedRetVal = phi i64 [ 0, %bb235 ], [ undef, %bb1277 ], [ -1, %entry ] ; <i64> [#uses=1]
+ ret i64 %UnifiedRetVal
+}
diff --git a/test/CodeGen/PowerPC/2008-04-16-CoalescerBug.ll b/test/CodeGen/PowerPC/2008-04-16-CoalescerBug.ll
new file mode 100644
index 0000000..839098e
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-04-16-CoalescerBug.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin
+; Avoid reading memory that's already freed.
+
[email protected] = appending global [1 x i8*] [ i8* bitcast (i32 (i64)* @_Z13GetSectorSizey to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @_Z13GetSectorSizey(i64 %Base) nounwind {
+entry:
+ br i1 false, label %bb, label %UnifiedReturnBlock
+bb: ; preds = %entry
+ %tmp10 = and i64 0, %Base ; <i64> [#uses=0]
+ ret i32 0
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 131072
+}
diff --git a/test/CodeGen/PowerPC/2008-04-23-CoalescerCrash.ll b/test/CodeGen/PowerPC/2008-04-23-CoalescerCrash.ll
new file mode 100644
index 0000000..7b6d491
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-04-23-CoalescerCrash.ll
@@ -0,0 +1,89 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin
+
+@_ZL10DeviceCode = internal global i16 0 ; <i16*> [#uses=1]
[email protected] = internal constant [64 x i8] c"unlock_then_erase_sector: failed to erase block (status= 0x%x)\0A\00" ; <[64 x i8]*> [#uses=1]
[email protected] = internal constant [68 x i8] c"ProgramByWords - Erasing sector 0x%llx to 0x%llx (size 0x%x bytes)\0A\00" ; <[68 x i8]*> [#uses=1]
[email protected] = internal constant [37 x i8] c"ProgramByWords - Done erasing flash\0A\00" ; <[37 x i8]*> [#uses=1]
[email protected] = internal constant [48 x i8] c"ProgramByWords - Starting to write to FLASH...\0A\00" ; <[48 x i8]*> [#uses=1]
+
+declare void @IOLog(i8*, ...)
+
+declare void @IODelay(i32)
+
+define i32 @_Z14ProgramByWordsPvyy(i8* %buffer, i64 %Offset, i64 %bufferSize) nounwind {
+entry:
+ volatile store i8 -1, i8* null, align 1
+ %tmp28 = icmp eq i8 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp28, label %bb107, label %bb
+
+bb: ; preds = %entry
+ %tmp9596430 = zext i32 0 to i64 ; <i64> [#uses=1]
+ %tmp98431 = add i64 %tmp9596430, %Offset ; <i64> [#uses=1]
+ %tmp100433 = icmp ugt i64 %tmp98431, %Offset ; <i1> [#uses=1]
+ br i1 %tmp100433, label %bb31, label %bb103
+
+bb31: ; preds = %_Z24unlock_then_erase_sectory.exit, %bb
+ %Pos.0.reg2mem.0 = phi i64 [ %tmp93, %_Z24unlock_then_erase_sectory.exit ], [ %Offset, %bb ] ; <i64> [#uses=3]
+ %tmp35 = load i16* @_ZL10DeviceCode, align 2 ; <i16> [#uses=1]
+ %tmp3536 = zext i16 %tmp35 to i32 ; <i32> [#uses=2]
+ %tmp37 = and i32 %tmp3536, 65520 ; <i32> [#uses=1]
+ %tmp38 = icmp eq i32 %tmp37, 35008 ; <i1> [#uses=1]
+ %tmp34 = sub i64 %Pos.0.reg2mem.0, %Offset ; <i64> [#uses=2]
+ br i1 %tmp38, label %bb41, label %bb68
+
+bb41: ; preds = %bb31
+ %tmp43 = add i32 0, -1 ; <i32> [#uses=1]
+ %tmp4344 = zext i32 %tmp43 to i64 ; <i64> [#uses=1]
+ %tmp46 = and i64 %tmp4344, %tmp34 ; <i64> [#uses=0]
+ %tmp49 = and i32 %tmp3536, 1 ; <i32> [#uses=0]
+ ret i32 0
+
+bb68: ; preds = %bb31
+ tail call void (i8*, ...)* @IOLog( i8* getelementptr ([68 x i8]* @.str34, i32 0, i32 0), i64 %tmp34, i64 0, i32 131072 ) nounwind
+ %tmp2021.i = trunc i64 %Pos.0.reg2mem.0 to i32 ; <i32> [#uses=1]
+ %tmp202122.i = inttoptr i32 %tmp2021.i to i8* ; <i8*> [#uses=1]
+ tail call void @IODelay( i32 500 ) nounwind
+ %tmp53.i = volatile load i16* null, align 2 ; <i16> [#uses=2]
+ %tmp5455.i = zext i16 %tmp53.i to i32 ; <i32> [#uses=1]
+ br i1 false, label %bb.i, label %bb65.i
+
+bb.i: ; preds = %bb68
+ ret i32 0
+
+bb65.i: ; preds = %bb68
+ %tmp67.i = icmp eq i16 %tmp53.i, 128 ; <i1> [#uses=1]
+ br i1 %tmp67.i, label %_Z24unlock_then_erase_sectory.exit, label %bb70.i
+
+bb70.i: ; preds = %bb65.i
+ tail call void (i8*, ...)* @IOLog( i8* getelementptr ([64 x i8]* @.str19, i32 0, i32 0), i32 %tmp5455.i ) nounwind
+ ret i32 0
+
+_Z24unlock_then_erase_sectory.exit: ; preds = %bb65.i
+ volatile store i8 -1, i8* %tmp202122.i, align 1
+ %tmp93 = add i64 0, %Pos.0.reg2mem.0 ; <i64> [#uses=2]
+ %tmp98 = add i64 0, %Offset ; <i64> [#uses=1]
+ %tmp100 = icmp ugt i64 %tmp98, %tmp93 ; <i1> [#uses=1]
+ br i1 %tmp100, label %bb31, label %bb103
+
+bb103: ; preds = %_Z24unlock_then_erase_sectory.exit, %bb
+ tail call void (i8*, ...)* @IOLog( i8* getelementptr ([37 x i8]* @.str35, i32 0, i32 0) ) nounwind
+ ret i32 0
+
+bb107: ; preds = %entry
+ tail call void (i8*, ...)* @IOLog( i8* getelementptr ([48 x i8]* @.str36, i32 0, i32 0) ) nounwind
+ %tmp114115 = bitcast i8* %buffer to i16* ; <i16*> [#uses=1]
+ %tmp256 = lshr i64 %bufferSize, 1 ; <i64> [#uses=1]
+ %tmp256257 = trunc i64 %tmp256 to i32 ; <i32> [#uses=1]
+ %tmp258 = getelementptr i16* %tmp114115, i32 %tmp256257 ; <i16*> [#uses=0]
+ ret i32 0
+}
+
+define i32 @_Z17program_64B_blockyPm(i64 %Base, i32* %pData) nounwind {
+entry:
+ unreachable
+}
+
+define i32 @_Z15ProgramByBlocksyy(i64 %Offset, i64 %bufferSize) nounwind {
+entry:
+ ret i32 0
+}
diff --git a/test/CodeGen/PowerPC/2008-05-01-ppc_fp128.ll b/test/CodeGen/PowerPC/2008-05-01-ppc_fp128.ll
new file mode 100644
index 0000000..d42c814
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-05-01-ppc_fp128.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc32
+target triple = "powerpc-apple-darwin9.2.2"
+
+define i256 @func(ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind readnone {
+entry:
+ br i1 false, label %bb36, label %bb484
+
+bb36: ; preds = %entry
+ %tmp124 = fcmp ord ppc_fp128 %b, 0xM00000000000000000000000000000000 ; <i1> [#uses=1]
+ %tmp140 = and i1 %tmp124, fcmp une (ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 0xM00000000000000000000000000000000) ; <i1> [#uses=0]
+ unreachable
+
+bb484: ; preds = %entry
+ ret i256 0
+}
diff --git a/test/CodeGen/PowerPC/2008-06-19-LegalizerCrash.ll b/test/CodeGen/PowerPC/2008-06-19-LegalizerCrash.ll
new file mode 100644
index 0000000..6b40b24
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-06-19-LegalizerCrash.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=ppc32
+
+define void @t() nounwind {
+ call void null( ppc_fp128 undef )
+ unreachable
+}
diff --git a/test/CodeGen/PowerPC/2008-06-21-F128LoadStore.ll b/test/CodeGen/PowerPC/2008-06-21-F128LoadStore.ll
new file mode 100644
index 0000000..862559b
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-06-21-F128LoadStore.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32
+
+@g = external global ppc_fp128
+@h = external global ppc_fp128
+
+define void @f() {
+ %tmp = load ppc_fp128* @g
+ store ppc_fp128 %tmp, ppc_fp128* @h
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll b/test/CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll
new file mode 100644
index 0000000..83c5511
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=ppc32
+; <rdar://problem/6020042>
+
+define i32 @bork() nounwind {
+entry:
+ br i1 true, label %bb1, label %bb3
+
+bb1:
+ %tmp1 = load i8* null, align 1
+ %tmp2 = icmp eq i8 %tmp1, 0
+ br label %bb2
+
+bb2:
+ %val1 = phi i32 [ 0, %bb1 ], [ %val2, %bb2 ]
+ %val2 = select i1 %tmp2, i32 -1, i32 %val1
+ switch i32 %val2, label %bb2 [
+ i32 -1, label %bb3
+ i32 0, label %bb1
+ i32 1, label %bb3
+ i32 2, label %bb1
+ ]
+
+bb3:
+ ret i32 -1
+}
diff --git a/test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll b/test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll
new file mode 100644
index 0000000..8802b97
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vadduhm
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsubuhm
+
+define <4 x i32> @test() nounwind {
+ ret <4 x i32> < i32 4293066722, i32 4293066722, i32 4293066722, i32 4293066722>
+}
+
+define <4 x i32> @test2() nounwind {
+ ret <4 x i32> < i32 1114129, i32 1114129, i32 1114129, i32 1114129>
+}
diff --git a/test/CodeGen/PowerPC/2008-07-15-Bswap.ll b/test/CodeGen/PowerPC/2008-07-15-Bswap.ll
new file mode 100644
index 0000000..4a834f9
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-07-15-Bswap.ll
@@ -0,0 +1,386 @@
+; RUN: llc < %s
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9"
+ %struct.BiPartSrcDescriptor = type <{ %"struct.BiPartSrcDescriptor::$_105" }>
+ %"struct.BiPartSrcDescriptor::$_105" = type { %struct.BiPartSrcDescriptor_NO_VECTOR_ALIGNMENT_size_is_16 }
+ %struct.BiPartSrcDescriptor_NO_VECTOR_ALIGNMENT_size_is_16 = type { [2 x %struct.MotionVectors], [2 x i8], %struct.Map4x4ToPartIdx, [2 x i8], i8, i8 }
+ %struct.Condv = type opaque
+ %struct.DHBFLayerId = type { i8 }
+ %struct.DecodeComplexityInfo = type { i32, i32, i32, i32, %"struct.DecodeComplexityInfo::IntraStats", %"struct.DecodeComplexityInfo::InterStats" }
+ %"struct.DecodeComplexityInfo::InterStats" = type { i32, i32, i32, i32, [5 x i32], [3 x i32], [4 x [4 x i32]], [4 x i32], i32, %struct.MotionVectors, %struct.MotionVectors }
+ %"struct.DecodeComplexityInfo::IntraStats" = type { i32, i32, i32, [5 x i32], [3 x i32], [4 x i32], [3 x i32] }
+ %struct.DecodeComplexityOptions = type { i8, i8, i32, double, i8, float, i8, float, i8, i8, i8, i8, i8 }
+ %struct.DescriptorAllocator = type { %struct.Mutex*, %struct.Mutex*, i8**, i32, i32, i8**, i32, i32, i8**, i32, i32 }
+ %struct.DetailsFromSliceType = type <{ i8 }>
+ %struct.FlatnessAnalysis = type { i16, i16, i32, i32*, i8*, [512 x i32], [256 x i32] }
+ %struct.Frame = type <{ i8, i8, i8, i8, i8, [3 x i8], i32, i32, %struct.Mutex*, %struct.Condv*, [8 x i8], %struct.FramePixels, %struct.FrameMotionVectorCache, %struct.FrameIndex, i32, i8*, i8*, i8*, i8*, i16*, %struct.FlatnessAnalysis, %struct.NoiseAnalysis, %struct.VisualActivity, %struct.FrameMotionInfo, %struct.FrameMotionAnalysis, %struct.FrameDataRateParameters, %struct.FrameEncoderTags, %struct.DecodeComplexityInfo, %struct.DecodeComplexityOptions, %struct.MotionInfoFor16x16_FasterSP*, [1 x i32] }>
+ %struct.FrameDataRateParameters = type { i32, float, i8, i8 }
+ %struct.FrameEncoderTags = type { i8, i8, i32, i8, i8, float }
+ %struct.FrameIndex = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i32, i32, %struct.Frame*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, %struct.DHBFLayerId }
+ %struct.FrameMotionAnalysis = type { i32, i32, i32, %struct.MoEstMotion16x16*, %struct.MbAnalysis*, i32, i32, i16, i16, i32, i32, i32, i32, i8, i8 }
+ %struct.FrameMotionInfo = type { i32, i32, %struct.MoEstMbMotionInfo*, i32, i32, i32, i32, i32 }
+ %struct.FrameMotionVectorCache = type <{ %struct.ThreadAllocator**, i32, i32, i32, %struct.BiPartSrcDescriptor, %struct.BiPartSrcDescriptor, %struct.BiPartSrcDescriptor, [3 x %struct.BiPartSrcDescriptor*], %struct.BiPartSrcDescriptor** }>
+ %struct.FramePixels = type <{ i8, i8, i8, i8, i8, i8, i8, i8, i8*, i8*, i32, [4 x i8*], [4 x i8*], [2 x [4 x i32]], [2 x [4 x i32]], %struct.PixelData, %struct.InterpolationCache*, %struct.InterpolationCache*, %struct.InterpolationCache*, [16 x i16], [16 x i16], [12 x i8], %"struct.PortableSInt32Array<4>", %"struct.PortableSInt32Array<8>", %struct.ICOffsetArraysY, %struct.UVSrcOffsetEtcX_Struct*, i32*, i32*, [3 x i32] }>
+ %struct.ICOffsetArraysY = type { [21 x i32], [21 x i32], [4 x [21 x i32]] }
+ %struct.InterpolationCache = type opaque
+ %struct.LoopFilterInfo = type { %struct.BiPartSrcDescriptor**, i32, i32, i32, i32, i32*, i32, %"struct.LoopFilterInfo::SliceInfoStruct"*, i32, %struct.Mutex*, i16*, %struct.FramePixels*, i8*, i8*, i8*, i8*, i8*, %struct.PerMacroblockBoundaryStrengths*, %struct.Mutex*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8*, i8*, i8, void (i8*, i8*, i32, i32, i32, i32, i32, i8*, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i8*, i32, i8*)*, i32 }
+ %"struct.LoopFilterInfo::SliceInfoStruct" = type { %"struct.LoopFilterInfo::SliceInfoStruct::LFDisableStats", i8, i8, i8, i8, [17 x %struct.Frame*], [17 x %struct.Frame*] }
+ %"struct.LoopFilterInfo::SliceInfoStruct::LFDisableStats" = type { i32, i32 }
+ %struct.LoopFilterParam = type { i32, %struct.LoopFilterInfo*, %struct.FramePixels*, %struct.FrameMotionVectorCache* }
+ %struct.Map4x4ToPartIdx = type { i16 }
+ %struct.MbAnalysis = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, %struct.RdCost, %struct.RdCost, i32 }
+ %struct.MoEstMbMotionInfo = type { i32, i32, i32, i32, [16 x %struct.MoEstPartMotionInfo] }
+ %struct.MoEstMotion16x16 = type { [2 x i8], [2 x %struct.MotionVectors], i8, [3 x %struct.MoEstPredCost] }
+ %struct.MoEstPartMotionInfo = type { i32, %struct.PartGeom, i32, i32, [2 x %struct.MotionVectors], [2 x i8], i16 }
+ %struct.MoEstPredCost = type { i32, i16, i16 }
+ %struct.MotionInfoFor16x16_FasterSP = type { [2 x %struct.MotionVectors], [2 x i8], i8, [2 x i32], i32, i32 }
+ %struct.MotionVectors = type { %"struct.MotionVectors::$_103" }
+ %"struct.MotionVectors::$_103" = type { i32 }
+ %struct.Mutex = type opaque
+ %struct.NoiseAnalysis = type { i16, i16, i32, i8*, i8*, i8*, [512 x i32] }
+ %struct.PartGeom = type { %struct.Map4x4ToPartIdx }
+ %struct.PerMacroblockBoundaryStrengths = type { [16 x i8], [16 x i8], [4 x i8], [4 x i8], [2 x i32] }
+ %struct.PixelData = type { i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8 }
+ %"struct.PortableSInt32Array<4>" = type { [4 x i32] }
+ %"struct.PortableSInt32Array<8>" = type { [8 x i32] }
+ %struct.RdCost = type { i32, i32, i32, double }
+ %struct.ThreadAllocator = type { %struct.DescriptorAllocator*, %struct.BiPartSrcDescriptor*, [256 x %struct.BiPartSrcDescriptor*], i32, i32, i32 }
+ %struct.ThreadedBatch = type opaque
+ %struct.UVSrcOffsetEtcX_Struct = type <{ i16 }>
+ %struct.VisualActivity = type { i16, i16, i32, i32, i32*, i32*, i32, i32, i32*, i32, i32, i32, i32, i32, i8*, i32, [2 x i32], i32, i32, i32, i16*, i16, i16, i16, i16, float, i8*, i32*, i32, i32, i8 }
+@_ZL33table_8_14_indexA_to_alpha_scalar = external constant [64 x i8] ; <[64 x i8]*> [#uses=0]
+@_ZL32table_8_14_indexB_to_beta_scalar = external constant [64 x i8] ; <[64 x i8]*> [#uses=0]
+@_ZL34table_8_15_indexA_bS_to_tc0_scalar = external constant [64 x [4 x i8]] ; <[64 x [4 x i8]]*> [#uses=0]
+@gkDummy = external global i32 ; <i32*> [#uses=0]
+@gkDetailsFromSliceTypeArray = external constant [10 x %struct.DetailsFromSliceType] ; <[10 x %struct.DetailsFromSliceType]*> [#uses=0]
+
+declare i32 @_Z20LoopFilter_ConstructP14LoopFilterInfojj(%struct.LoopFilterInfo*, i32, i32)
+
+declare i32 @_Z25LF_Threading2_assert_doneP14LoopFilterInfo(%struct.LoopFilterInfo*) nounwind
+
+declare i32 @_Z54S_CalcIfLargeMVDeltaForBMbBothPredictionsFromSameFramePK19BiPartSrcDescriptorS1_ijj(%struct.BiPartSrcDescriptor*, %struct.BiPartSrcDescriptor*, i32, i32, i32) nounwind
+
+declare void @_Z30LoopFilter_Internal_FilterLumaPhiiiiii(i8*, i32, i32, i32, i32, i32, i32) nounwind
+
+declare void @_Z33LoopFilter_Internal_FilterChromaVPhiiiiiiiiii(i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind
+
+declare void @_Z33LoopFilter_Internal_FilterChromaHPhiiiiii(i8*, i32, i32, i32, i32, i32, i32) nounwind
+
+declare void @_Z42LoopFilter_Internal_filter_macroblock_lumaPK14LoopFilterInfoPhS2_iiiPK30PerMacroblockBoundaryStrengthsjj(%struct.LoopFilterInfo*, i8*, i8*, i32, i32, i32, %struct.PerMacroblockBoundaryStrengths*, i32, i32) nounwind
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+declare i32 @_Z40LoopFilter_Internal_FilterLumaPlaneMBAFFPK14LoopFilterInfojjj(%struct.LoopFilterInfo*, i32, i32, i32) nounwind
+
+declare void @_Z18LoopFilter_DestroyP14LoopFilterInfo(%struct.LoopFilterInfo*)
+
+declare void @MutexDispose(%struct.Mutex*)
+
+declare void @_ZdaPv(i8*) nounwind
+
+declare void @jvtDisposePTRVectorAligned(i8*)
+
+declare void @jvtDisposePTR(i8*)
+
+declare void @jvtDisposePTRMemAligned(i8*)
+
+declare void @_Z31LoopFilter_Internal_ResetTablesP14LoopFilterInfo(%struct.LoopFilterInfo*) nounwind
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
+
+define i32 @_Z60LoopFilter_Internal_CalculateBoundaryStrengths_MbaffFramePicPK14LoopFilterInfoP22FrameMotionVectorCachejj(%struct.LoopFilterInfo* %lfiPtr, %struct.FrameMotionVectorCache* %frameMotionVectorCachePtr, i32 %mbY_min, i32 %mbY_maxPlus1) nounwind {
+entry:
+ icmp ult i32 %mbY_min, %mbY_maxPlus1 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb16, label %bb642
+
+bb16: ; preds = %entry
+ bitcast %struct.PerMacroblockBoundaryStrengths* null to i32* ; <i32*>:1 [#uses=3]
+ getelementptr i32* %1, i32 1 ; <i32*>:2 [#uses=0]
+ getelementptr i32* %1, i32 2 ; <i32*>:3 [#uses=0]
+ getelementptr i32* %1, i32 3 ; <i32*>:4 [#uses=0]
+ bitcast [16 x i8]* null to i32* ; <i32*>:5 [#uses=3]
+ getelementptr i32* %5, i32 1 ; <i32*>:6 [#uses=0]
+ getelementptr i32* %5, i32 2 ; <i32*>:7 [#uses=0]
+ getelementptr i32* %5, i32 3 ; <i32*>:8 [#uses=0]
+ icmp eq i32 0, 0 ; <i1>:9 [#uses=0]
+ lshr i32 0, 30 ; <i32>:10 [#uses=0]
+ and i32 0, 268435455 ; <i32>:11 [#uses=0]
+ lshr i32 0, 28 ; <i32>:12 [#uses=1]
+ and i32 %12, 3 ; <i32>:13 [#uses=0]
+ and i32 0, 1 ; <i32>:14 [#uses=1]
+ icmp eq i32 %14, 0 ; <i1>:15 [#uses=0]
+ zext i8 0 to i32 ; <i32>:16 [#uses=1]
+ %.not656 = icmp ne i32 0, 0 ; <i1> [#uses=1]
+ icmp eq i8 0, 0 ; <i1>:17 [#uses=0]
+ trunc i32 0 to i8 ; <i8>:18 [#uses=2]
+ add i32 0, 1 ; <i32>:19 [#uses=1]
+ %.not658 = icmp ne i32 0, 0 ; <i1> [#uses=1]
+ and i32 0, 268369920 ; <i32>:20 [#uses=1]
+ icmp eq i32 %20, 268369920 ; <i1>:21 [#uses=2]
+ getelementptr %struct.PerMacroblockBoundaryStrengths* null, i32 0, i32 2 ; <[4 x i8]*>:22 [#uses=1]
+ getelementptr %struct.PerMacroblockBoundaryStrengths* null, i32 0, i32 2, i32 0 ; <i8*>:23 [#uses=0]
+ and i32 0, -2 ; <i32>:24 [#uses=1]
+ add i32 %24, -1 ; <i32>:25 [#uses=0]
+ bitcast [4 x i8]* %22 to i32* ; <i32*>:26 [#uses=3]
+ getelementptr i32* %26, i32 1 ; <i32*>:27 [#uses=0]
+ getelementptr i32* %26, i32 2 ; <i32*>:28 [#uses=0]
+ getelementptr i32* %26, i32 3 ; <i32*>:29 [#uses=0]
+ br label %bb144
+
+bb144: ; preds = %bb395, %bb16
+ %idxEachField11.0773 = phi i32 [ 0, %bb16 ], [ %162, %bb395 ] ; <i32> [#uses=3]
+ %mbYLeft.2776 = phi i32 [ 0, %bb16 ], [ %mbYLeft.2776, %bb395 ] ; <i32> [#uses=3]
+ %mbXYLeft.2775 = phi i32 [ 0, %bb16 ], [ %mbXYLeft.2775, %bb395 ] ; <i32> [#uses=1]
+ %mixedModeLeftEdgeOfMbFlag.2774 = phi i32 [ 0, %bb16 ], [ 0, %bb395 ] ; <i32> [#uses=0]
+ %mbIndexLeft.2772 = phi i32 [ 0, %bb16 ], [ %mbIndexLeft.2772, %bb395 ] ; <i32> [#uses=2]
+ %boundaryStrengthsV.1771 = phi i8* [ null, %bb16 ], [ %158, %bb395 ] ; <i8*> [#uses=2]
+ %numEdgesToTest.1770 = phi i32 [ 4, %bb16 ], [ %numEdgesToTest.2, %bb395 ] ; <i32> [#uses=1]
+ icmp eq i32 %idxEachField11.0773, 0 ; <i1>:30 [#uses=0]
+ getelementptr %struct.BiPartSrcDescriptor** null, i32 %mbIndexLeft.2772 ; <%struct.BiPartSrcDescriptor**>:31 [#uses=1]
+ load %struct.BiPartSrcDescriptor** %31, align 4 ; <%struct.BiPartSrcDescriptor*>:32 [#uses=0]
+ %fMacroblockHasNonZeroBS.4 = select i1 %21, i32 1, i32 0 ; <i32> [#uses=1]
+ %numEdgesToTest.2 = select i1 %21, i32 1, i32 %numEdgesToTest.1770 ; <i32> [#uses=2]
+ store i8 32, i8* %boundaryStrengthsV.1771, align 1
+ br label %labelContinueEdgesLoopV
+
+bb200: ; preds = %labelContinueEdgesLoopV
+ lshr i32 %159, 28 ; <i32>:33 [#uses=2]
+ and i32 %160, %16 ; <i32>:34 [#uses=1]
+ icmp eq i32 %34, 0 ; <i1>:35 [#uses=0]
+ icmp eq i32 %160, 0 ; <i1>:36 [#uses=3]
+ zext i1 %36 to i32 ; <i32>:37 [#uses=1]
+ or i32 %37, -1 ; <i32>:38 [#uses=1]
+ or i32 %38, %33 ; <i32>:39 [#uses=1]
+ icmp eq i32 %39, 0 ; <i1>:40 [#uses=1]
+ br i1 %40, label %bb205, label %bb206
+
+bb205: ; preds = %bb200
+ store i8 32, i8* %158, align 1
+ br label %labelContinueEdgesLoopV
+
+bb206: ; preds = %bb200
+ icmp eq i32 %33, 15 ; <i1>:41 [#uses=1]
+ br i1 %41, label %labelContinueEdgesLoopV, label %bb210.preheader
+
+bb210.preheader: ; preds = %bb206
+ add i32 %160, 0 ; <i32>:42 [#uses=2]
+ %bothcond657 = and i1 %36, %.not656 ; <i1> [#uses=0]
+ shl i32 %idxEachField11.0773, 1 ; <i32>:43 [#uses=1]
+ add i32 %43, 0 ; <i32>:44 [#uses=0]
+ shl i32 %mbYLeft.2776, 2 ; <i32>:45 [#uses=0]
+ add i32 %42, -1 ; <i32>:46 [#uses=1]
+ icmp eq i32 0, 0 ; <i1>:47 [#uses=1]
+ %brmerge689.not = and i1 %47, false ; <i1> [#uses=0]
+ %bothcond659 = and i1 %36, %.not658 ; <i1> [#uses=0]
+ shl i32 %mbYLeft.2776, 1 ; <i32>:48 [#uses=1]
+ or i32 %48, 0 ; <i32>:49 [#uses=1]
+ shl i32 %49, 1 ; <i32>:50 [#uses=0]
+ add i32 0, 0 ; <i32>:51 [#uses=2]
+ mul i32 %51, 0 ; <i32>:52 [#uses=1]
+ add i32 %52, %42 ; <i32>:53 [#uses=1]
+ mul i32 %51, 0 ; <i32>:54 [#uses=1]
+ add i32 %46, %54 ; <i32>:55 [#uses=1]
+ getelementptr %struct.BiPartSrcDescriptor** null, i32 %53 ; <%struct.BiPartSrcDescriptor**>:56 [#uses=1]
+ load %struct.BiPartSrcDescriptor** %56, align 4 ; <%struct.BiPartSrcDescriptor*>:57 [#uses=7]
+ getelementptr %struct.BiPartSrcDescriptor** null, i32 %55 ; <%struct.BiPartSrcDescriptor**>:58 [#uses=1]
+ load %struct.BiPartSrcDescriptor** %58, align 4 ; <%struct.BiPartSrcDescriptor*>:59 [#uses=5]
+ icmp slt i32 %159, 0 ; <i1>:60 [#uses=0]
+ icmp eq %struct.BiPartSrcDescriptor* %57, %59 ; <i1>:61 [#uses=0]
+ bitcast %struct.BiPartSrcDescriptor* %57 to i16* ; <i16*>:62 [#uses=5]
+ load i16* %62, align 2 ; <i16>:63 [#uses=2]
+ getelementptr i16* %62, i32 1 ; <i16*>:64 [#uses=1]
+ load i16* %64, align 2 ; <i16>:65 [#uses=2]
+ getelementptr i16* %62, i32 2 ; <i16*>:66 [#uses=1]
+ load i16* %66, align 2 ; <i16>:67 [#uses=2]
+ getelementptr i16* %62, i32 3 ; <i16*>:68 [#uses=1]
+ load i16* %68, align 2 ; <i16>:69 [#uses=2]
+ getelementptr i16* %62, i32 6 ; <i16*>:70 [#uses=1]
+ load i16* %70, align 2 ; <i16>:71 [#uses=2]
+ bitcast %struct.BiPartSrcDescriptor* %59 to i16* ; <i16*>:72 [#uses=5]
+ load i16* %72, align 2 ; <i16>:73 [#uses=2]
+ getelementptr i16* %72, i32 1 ; <i16*>:74 [#uses=1]
+ load i16* %74, align 2 ; <i16>:75 [#uses=2]
+ getelementptr i16* %72, i32 2 ; <i16*>:76 [#uses=1]
+ load i16* %76, align 2 ; <i16>:77 [#uses=2]
+ getelementptr i16* %72, i32 3 ; <i16*>:78 [#uses=1]
+ load i16* %78, align 2 ; <i16>:79 [#uses=2]
+ getelementptr i16* %72, i32 6 ; <i16*>:80 [#uses=1]
+ load i16* %80, align 2 ; <i16>:81 [#uses=2]
+ sub i16 %63, %73 ; <i16>:82 [#uses=3]
+ sub i16 %65, %75 ; <i16>:83 [#uses=3]
+ sub i16 %67, %77 ; <i16>:84 [#uses=3]
+ sub i16 %69, %79 ; <i16>:85 [#uses=3]
+ sub i16 %71, %81 ; <i16>:86 [#uses=3]
+ sub i16 0, %82 ; <i16>:87 [#uses=1]
+ icmp slt i16 %82, 0 ; <i1>:88 [#uses=1]
+ %. = select i1 %88, i16 %87, i16 %82 ; <i16> [#uses=1]
+ sub i16 0, %83 ; <i16>:89 [#uses=1]
+ icmp slt i16 %83, 0 ; <i1>:90 [#uses=1]
+ %.660 = select i1 %90, i16 %89, i16 %83 ; <i16> [#uses=1]
+ sub i16 0, %84 ; <i16>:91 [#uses=1]
+ icmp slt i16 %84, 0 ; <i1>:92 [#uses=1]
+ %.661 = select i1 %92, i16 %91, i16 %84 ; <i16> [#uses=1]
+ sub i16 0, %85 ; <i16>:93 [#uses=1]
+ icmp slt i16 %85, 0 ; <i1>:94 [#uses=1]
+ %.662 = select i1 %94, i16 %93, i16 %85 ; <i16> [#uses=1]
+ sub i16 0, %86 ; <i16>:95 [#uses=1]
+ icmp slt i16 %86, 0 ; <i1>:96 [#uses=1]
+ %.663 = select i1 %96, i16 %95, i16 %86 ; <i16> [#uses=1]
+ getelementptr %struct.BiPartSrcDescriptor* %57, i32 0, i32 0, i32 0, i32 1, i32 0 ; <i8*>:97 [#uses=1]
+ load i8* %97, align 1 ; <i8>:98 [#uses=1]
+ zext i8 %98 to i32 ; <i32>:99 [#uses=1]
+ getelementptr %struct.BiPartSrcDescriptor* %57, i32 0, i32 0, i32 0, i32 1, i32 1 ; <i8*>:100 [#uses=1]
+ load i8* %100, align 1 ; <i8>:101 [#uses=1]
+ zext i8 %101 to i32 ; <i32>:102 [#uses=1]
+ getelementptr %struct.BiPartSrcDescriptor* %57, i32 0, i32 0, i32 0, i32 3, i32 0 ; <i8*>:103 [#uses=1]
+ load i8* %103, align 1 ; <i8>:104 [#uses=2]
+ zext i8 %104 to i32 ; <i32>:105 [#uses=1]
+ getelementptr %struct.BiPartSrcDescriptor* %59, i32 0, i32 0, i32 0, i32 3, i32 0 ; <i8*>:106 [#uses=1]
+ load i8* %106, align 1 ; <i8>:107 [#uses=2]
+ zext i8 %107 to i32 ; <i32>:108 [#uses=1]
+ getelementptr %struct.BiPartSrcDescriptor* %57, i32 0, i32 0, i32 0, i32 3, i32 1 ; <i8*>:109 [#uses=1]
+ load i8* %109, align 1 ; <i8>:110 [#uses=1]
+ zext i8 %110 to i32 ; <i32>:111 [#uses=1]
+ getelementptr %struct.BiPartSrcDescriptor* %59, i32 0, i32 0, i32 0, i32 3, i32 1 ; <i8*>:112 [#uses=1]
+ load i8* %112, align 1 ; <i8>:113 [#uses=1]
+ zext i8 %113 to i32 ; <i32>:114 [#uses=1]
+ lshr i32 %99, 4 ; <i32>:115 [#uses=1]
+ and i32 %115, 2 ; <i32>:116 [#uses=1]
+ lshr i32 %102, 5 ; <i32>:117 [#uses=1]
+ or i32 %116, %117 ; <i32>:118 [#uses=3]
+ icmp eq i32 %118, 0 ; <i1>:119 [#uses=0]
+ icmp eq i32 %118, 1 ; <i1>:120 [#uses=1]
+ br i1 %120, label %bb297, label %bb298
+
+bb297: ; preds = %bb210.preheader
+ br label %bb298
+
+bb298: ; preds = %bb297, %bb210.preheader
+ %vu8Mask_0.1 = phi i8 [ -1, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=1]
+ %vu8Mask_1.1 = phi i8 [ -1, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=1]
+ %vu8Mask_2.1 = phi i8 [ -1, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=0]
+ %vu8Mask_3.1 = phi i8 [ -1, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=1]
+ %vu8Mask_4.1 = phi i8 [ 0, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=0]
+ %vu8Mask_5.1 = phi i8 [ 0, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=1]
+ %vu8Mask_6.1 = phi i8 [ 0, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=0]
+ %vu8Mask_7.1 = phi i8 [ 0, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=1]
+ %vu8Mask_12.1 = phi i8 [ -1, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=0]
+ %vu8Mask_13.1 = phi i8 [ -1, %bb297 ], [ 0, %bb210.preheader ] ; <i8> [#uses=0]
+ icmp eq i32 %118, 2 ; <i1>:121 [#uses=0]
+ and i8 %vu8Mask_1.1, 3 ; <i8>:122 [#uses=0]
+ and i8 %vu8Mask_5.1, 3 ; <i8>:123 [#uses=0]
+ and i8 %vu8Mask_3.1, %18 ; <i8>:124 [#uses=0]
+ and i8 %vu8Mask_7.1, %18 ; <i8>:125 [#uses=0]
+ icmp eq i8 %104, %107 ; <i1>:126 [#uses=1]
+ br i1 %126, label %bb328, label %bb303
+
+bb303: ; preds = %bb298
+ call i16 @llvm.bswap.i16( i16 %81 ) ; <i16>:127 [#uses=1]
+ sub i16 %63, %77 ; <i16>:128 [#uses=3]
+ sub i16 %65, %79 ; <i16>:129 [#uses=3]
+ sub i16 %67, %73 ; <i16>:130 [#uses=3]
+ sub i16 %69, %75 ; <i16>:131 [#uses=3]
+ sub i16 %71, %127 ; <i16>:132 [#uses=3]
+ sub i16 0, %128 ; <i16>:133 [#uses=1]
+ icmp slt i16 %128, 0 ; <i1>:134 [#uses=1]
+ %.673 = select i1 %134, i16 %133, i16 %128 ; <i16> [#uses=1]
+ sub i16 0, %129 ; <i16>:135 [#uses=1]
+ icmp slt i16 %129, 0 ; <i1>:136 [#uses=1]
+ %.674 = select i1 %136, i16 %135, i16 %129 ; <i16> [#uses=1]
+ sub i16 0, %130 ; <i16>:137 [#uses=1]
+ icmp slt i16 %130, 0 ; <i1>:138 [#uses=1]
+ %.675 = select i1 %138, i16 %137, i16 %130 ; <i16> [#uses=1]
+ sub i16 0, %131 ; <i16>:139 [#uses=1]
+ icmp slt i16 %131, 0 ; <i1>:140 [#uses=1]
+ %.676 = select i1 %140, i16 %139, i16 %131 ; <i16> [#uses=1]
+ sub i16 0, %132 ; <i16>:141 [#uses=1]
+ icmp slt i16 %132, 0 ; <i1>:142 [#uses=1]
+ %.677 = select i1 %142, i16 %141, i16 %132 ; <i16> [#uses=1]
+ br label %bb328
+
+bb328: ; preds = %bb303, %bb298
+ %vu16Delta_0.0 = phi i16 [ %.673, %bb303 ], [ %., %bb298 ] ; <i16> [#uses=1]
+ %vu16Delta_1.0 = phi i16 [ %.674, %bb303 ], [ %.660, %bb298 ] ; <i16> [#uses=0]
+ %vu16Delta_2.0 = phi i16 [ %.675, %bb303 ], [ %.661, %bb298 ] ; <i16> [#uses=0]
+ %vu16Delta_3.0 = phi i16 [ %.676, %bb303 ], [ %.662, %bb298 ] ; <i16> [#uses=0]
+ %vu16Delta_6.0 = phi i16 [ %.677, %bb303 ], [ %.663, %bb298 ] ; <i16> [#uses=0]
+ lshr i16 %vu16Delta_0.0, 8 ; <i16>:143 [#uses=1]
+ trunc i16 %143 to i8 ; <i8>:144 [#uses=1]
+ and i8 %144, %vu8Mask_0.1 ; <i8>:145 [#uses=1]
+ icmp eq i8 %145, 0 ; <i1>:146 [#uses=0]
+ sub i32 %105, %114 ; <i32>:147 [#uses=1]
+ sub i32 %111, %108 ; <i32>:148 [#uses=1]
+ or i32 %147, %148 ; <i32>:149 [#uses=1]
+ icmp eq i32 %149, 0 ; <i1>:150 [#uses=0]
+ call i32 @_Z54S_CalcIfLargeMVDeltaForBMbBothPredictionsFromSameFramePK19BiPartSrcDescriptorS1_ijj( %struct.BiPartSrcDescriptor* %57, %struct.BiPartSrcDescriptor* %59, i32 %19, i32 0, i32 0 ) nounwind ; <i32>:151 [#uses=0]
+ unreachable
+
+labelContinueEdgesLoopV: ; preds = %bb206, %bb205, %bb144
+ %fEdgeHasNonZeroBS.0 = phi i32 [ 0, %bb205 ], [ 0, %bb144 ], [ 1, %bb206 ] ; <i32> [#uses=2]
+ %fMacroblockHasNonZeroBS.6 = phi i32 [ %152, %bb205 ], [ %fMacroblockHasNonZeroBS.4, %bb144 ], [ %152, %bb206 ] ; <i32> [#uses=1]
+ %ixEdge.1 = phi i32 [ %160, %bb205 ], [ 0, %bb144 ], [ %160, %bb206 ] ; <i32> [#uses=1]
+ %bfNZ12.2 = phi i32 [ %159, %bb205 ], [ 0, %bb144 ], [ %159, %bb206 ] ; <i32> [#uses=1]
+ %boundaryStrengthsV.3 = phi i8* [ %158, %bb205 ], [ %boundaryStrengthsV.1771, %bb144 ], [ %158, %bb206 ] ; <i8*> [#uses=3]
+ or i32 %fMacroblockHasNonZeroBS.6, %fEdgeHasNonZeroBS.0 ; <i32>:152 [#uses=2]
+ load i8* %boundaryStrengthsV.3, align 1 ; <i8>:153 [#uses=1]
+ trunc i32 %fEdgeHasNonZeroBS.0 to i8 ; <i8>:154 [#uses=1]
+ shl i8 %154, 5 ; <i8>:155 [#uses=1]
+ xor i8 %155, 32 ; <i8>:156 [#uses=1]
+ or i8 %153, %156 ; <i8>:157 [#uses=1]
+ store i8 %157, i8* %boundaryStrengthsV.3, align 1
+ getelementptr i8* %boundaryStrengthsV.3, i32 4 ; <i8*>:158 [#uses=4]
+ shl i32 %bfNZ12.2, 4 ; <i32>:159 [#uses=4]
+ add i32 %ixEdge.1, 1 ; <i32>:160 [#uses=6]
+ icmp ult i32 %160, %numEdgesToTest.2 ; <i1>:161 [#uses=1]
+ br i1 %161, label %bb200, label %bb395
+
+bb395: ; preds = %labelContinueEdgesLoopV
+ add i32 %idxEachField11.0773, 1 ; <i32>:162 [#uses=2]
+ icmp ugt i32 %162, 0 ; <i1>:163 [#uses=1]
+ br i1 %163, label %bb398, label %bb144
+
+bb398: ; preds = %bb395
+ call void asm sideeffect "dcbt $0, $1", "b%,r,~{memory}"( i32 19, i32* null ) nounwind
+ unreachable
+
+bb642: ; preds = %entry
+ ret i32 0
+}
+
+declare i16 @llvm.bswap.i16(i16) nounwind readnone
+
+declare i8* @jvtNewPtrVectorAligned(i32)
+
+declare i8* @jvtNewPtr(i32)
+
+declare i8* @jvtNewPtrMemAligned(i32)
+
+declare %struct.Mutex* @MutexNew()
+
+declare i8* @_Znam(i32)
+
+declare i32 @_Z24LoopFilter_FilterMbGroupP14LoopFilterInfoP11FramePixelsP22FrameMotionVectorCacheP19ThreadedBatchStructjjij(%struct.LoopFilterInfo*, %struct.FramePixels*, %struct.FrameMotionVectorCache*, %struct.ThreadedBatch*, i32, i32, i32, i32)
+
+declare void @MutexLock(%struct.Mutex*)
+
+declare void @MutexUnlock(%struct.Mutex*)
+
+declare i32 @_Z35LoopFilter_Internal_FilterLumaPlanePK14LoopFilterInfojjjjj(%struct.LoopFilterInfo*, i32, i32, i32, i32, i32)
+
+declare i32 @_Z37LoopFilter_Internal_FilterChromaPlanePK14LoopFilterInfojjjjj(%struct.LoopFilterInfo*, i32, i32, i32, i32, i32)
+
+declare void @_Z44LoopFilter_Internal_filter_macroblock_chromaPK14LoopFilterInfoPhS2_iiiPK30PerMacroblockBoundaryStrengthsjj(%struct.LoopFilterInfo*, i8*, i8*, i32, i32, i32, %struct.PerMacroblockBoundaryStrengths*, i32, i32) nounwind
+
+declare i32 @_Z42LoopFilter_Internal_FilterChromaPlaneMBAFFPK14LoopFilterInfojjj(%struct.LoopFilterInfo*, i32, i32, i32) nounwind
+
+declare i32 @_Z26LF_Threading2_ProcessTasksP14LoopFilterInfoP11FramePixelsP22FrameMotionVectorCacheij(%struct.LoopFilterInfo*, %struct.FramePixels*, %struct.FrameMotionVectorCache*, i32, i32)
+
+declare i32 @_Z46LoopFilter_Internal_CalculateBoundaryStrengthsPK14LoopFilterInfoP22FrameMotionVectorCachejj(%struct.LoopFilterInfo*, %struct.FrameMotionVectorCache*, i32, i32)
+
+declare i32 @_Z44LoopFilter_Internal_FilterLumaChromaPlane_PPP14LoopFilterInfojjjjj(%struct.LoopFilterInfo*, i32, i32, i32, i32, i32)
+
+declare i32 @_Z22LoopFilter_FilterFrameP14LoopFilterInfoP11FramePixelsP22FrameMotionVectorCacheP19ThreadedBatchStructij(%struct.LoopFilterInfo*, %struct.FramePixels*, %struct.FrameMotionVectorCache*, %struct.ThreadedBatch*, i32, i32)
+
+declare void @_Z34LF_Threading2_ProcessTasks_WrapperPv(i8*)
+
+declare void @llvm.memset.i64(i8*, i8, i64, i32) nounwind
diff --git a/test/CodeGen/PowerPC/2008-07-15-Fabs.ll b/test/CodeGen/PowerPC/2008-07-15-Fabs.ll
new file mode 100644
index 0000000..17737d9
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-07-15-Fabs.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9"
+
+define hidden i256 @__divtc3(ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind readnone {
+entry:
+ call ppc_fp128 @fabsl( ppc_fp128 %d ) nounwind readnone ; <ppc_fp128>:0 [#uses=1]
+ fcmp olt ppc_fp128 0xM00000000000000000000000000000000, %0 ; <i1>:1 [#uses=1]
+ %.pn106 = select i1 %1, ppc_fp128 %a, ppc_fp128 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
+ %.pn = fsub ppc_fp128 0xM00000000000000000000000000000000, %.pn106 ; <ppc_fp128> [#uses=1]
+ %y.0 = fdiv ppc_fp128 %.pn, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
+ fmul ppc_fp128 %y.0, 0xM3FF00000000000000000000000000000 ; <ppc_fp128>:2 [#uses=1]
+ fadd ppc_fp128 %2, fmul (ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 0xM00000000000000000000000000000000) ; <ppc_fp128>:3 [#uses=1]
+ %tmpi = fadd ppc_fp128 %3, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmpi, ppc_fp128* null, align 16
+ ret i256 0
+}
+
+declare ppc_fp128 @fabsl(ppc_fp128) nounwind readnone
diff --git a/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll b/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll
new file mode 100644
index 0000000..5cd8c34
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9"
+
+define i16 @t(i16* %dct) signext nounwind {
+entry:
+ load i16* null, align 2 ; <i16>:0 [#uses=2]
+ lshr i16 %0, 11 ; <i16>:1 [#uses=0]
+ trunc i16 %0 to i8 ; <i8>:2 [#uses=1]
+ sext i8 %2 to i16 ; <i16>:3 [#uses=1]
+ add i16 0, %3 ; <i16>:4 [#uses=1]
+ sext i16 %4 to i32 ; <i32>:5 [#uses=1]
+ %dcval.0.in = shl i32 %5, 0 ; <i32> [#uses=1]
+ %dcval.0 = trunc i32 %dcval.0.in to i16 ; <i16> [#uses=1]
+ store i16 %dcval.0, i16* %dct, align 2
+ ret i16 0
+}
diff --git a/test/CodeGen/PowerPC/2008-07-17-Fneg.ll b/test/CodeGen/PowerPC/2008-07-17-Fneg.ll
new file mode 100644
index 0000000..dc1e936
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-07-17-Fneg.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9"
+
+define hidden i64 @__fixunstfdi(ppc_fp128 %a) nounwind {
+entry:
+ br i1 false, label %bb3, label %bb4
+
+bb3: ; preds = %entry
+ fsub ppc_fp128 0xM80000000000000000000000000000000, 0xM00000000000000000000000000000000 ; <ppc_fp128>:0 [#uses=1]
+ fptoui ppc_fp128 %0 to i32 ; <i32>:1 [#uses=1]
+ zext i32 %1 to i64 ; <i64>:2 [#uses=1]
+ sub i64 0, %2 ; <i64>:3 [#uses=1]
+ ret i64 %3
+
+bb4: ; preds = %entry
+ ret i64 0
+}
diff --git a/test/CodeGen/PowerPC/2008-07-24-PPC64-CCBug.ll b/test/CodeGen/PowerPC/2008-07-24-PPC64-CCBug.ll
new file mode 100644
index 0000000..c9c05e1
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-07-24-PPC64-CCBug.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin | grep lwz | grep 228
+
+@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define void @llvm_static_func(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9, i32 %a10, i32 %a11, i32 %a12, i32 %a13, i32 %a14, i32 %a15) nounwind {
+entry:
+ tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i64 0), i32 %a8 ) nounwind ; <i32>:0 [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll b/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll
new file mode 100644
index 0000000..97844dd
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll
@@ -0,0 +1,254 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin
+
+ %struct.CGLDI = type { %struct.cgli*, i32, i32, i32, i32, i32, i8*, i32, void (%struct.CGLSI*, i32, %struct.CGLDI*)*, i8*, %struct.vv_t }
+ %struct.cgli = type { i32, %struct.cgli*, void (%struct.cgli*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32)*, i32, i8*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i8*, i32*, %struct._cgro*, %struct._cgro*, float, float, float, float, i32, i8*, float, i8*, [16 x i32] }
+ %struct.CGLSI = type { %struct.cgli*, i32, i8*, i8*, i32, i32, i8*, void (%struct.cgli*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32)*, %struct.vv_t, %struct.vv_t, %struct.xx_t* }
+ %struct._cgro = type opaque
+ %struct.xx_t = type { [3 x %struct.vv_t], [2 x %struct.vv_t], [2 x [3 x i8*]] }
+ %struct.vv_t = type { <16 x i8> }
[email protected] = appending global [1 x i8*] [ i8* bitcast (void (%struct.CGLSI*, i32, %struct.CGLDI*)* @lb to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @lb(%struct.CGLSI* %src, i32 %n, %struct.CGLDI* %dst) nounwind {
+entry:
+ %0 = load i32* null, align 4 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb.nph4945, label %return
+
+bb.nph4945: ; preds = %entry
+ %2 = bitcast [2 x %struct.vv_t]* null to i64* ; <i64*> [#uses=6]
+ %3 = getelementptr [2 x i64]* null, i32 0, i32 1 ; <i64*> [#uses=6]
+ %4 = bitcast %struct.vv_t* null to i64* ; <i64*> [#uses=5]
+ %5 = getelementptr [2 x i64]* null, i32 0, i32 1 ; <i64*> [#uses=3]
+ br label %bb2326
+
+bb2217: ; preds = %bb2326
+ %6 = or i64 0, 0 ; <i64> [#uses=2]
+ %7 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %8 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %9 = getelementptr float* null, i32 2 ; <float*> [#uses=1]
+ %10 = load float* %9, align 4 ; <float> [#uses=1]
+ %11 = getelementptr float* null, i32 3 ; <float*> [#uses=1]
+ %12 = load float* %11, align 4 ; <float> [#uses=1]
+ %13 = fmul float %10, 6.553500e+04 ; <float> [#uses=1]
+ %14 = fadd float %13, 5.000000e-01 ; <float> [#uses=1]
+ %15 = fmul float %12, 6.553500e+04 ; <float> [#uses=1]
+ %16 = fadd float %15, 5.000000e-01 ; <float> [#uses=3]
+ %17 = fcmp olt float %14, 0.000000e+00 ; <i1> [#uses=0]
+ %18 = fcmp olt float %16, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %18, label %bb2265, label %bb2262
+
+bb2262: ; preds = %bb2217
+ %19 = fcmp ogt float %16, 6.553500e+04 ; <i1> [#uses=1]
+ br i1 %19, label %bb2264, label %bb2265
+
+bb2264: ; preds = %bb2262
+ br label %bb2265
+
+bb2265: ; preds = %bb2264, %bb2262, %bb2217
+ %f3596.0 = phi float [ 6.553500e+04, %bb2264 ], [ 0.000000e+00, %bb2217 ], [ %16, %bb2262 ] ; <float> [#uses=1]
+ %20 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %21 = fptosi float %f3596.0 to i32 ; <i32> [#uses=1]
+ %22 = zext i32 %7 to i64 ; <i64> [#uses=1]
+ %23 = shl i64 %22, 48 ; <i64> [#uses=1]
+ %24 = zext i32 %8 to i64 ; <i64> [#uses=1]
+ %25 = shl i64 %24, 32 ; <i64> [#uses=1]
+ %26 = sext i32 %20 to i64 ; <i64> [#uses=1]
+ %27 = shl i64 %26, 16 ; <i64> [#uses=1]
+ %28 = sext i32 %21 to i64 ; <i64> [#uses=1]
+ %29 = or i64 %25, %23 ; <i64> [#uses=1]
+ %30 = or i64 %29, %27 ; <i64> [#uses=1]
+ %31 = or i64 %30, %28 ; <i64> [#uses=2]
+ %32 = shl i64 %6, 48 ; <i64> [#uses=1]
+ %33 = shl i64 %31, 32 ; <i64> [#uses=1]
+ %34 = and i64 %33, 281470681743360 ; <i64> [#uses=1]
+ store i64 %6, i64* %2, align 16
+ store i64 %31, i64* %3, align 8
+ %35 = getelementptr i8* null, i32 0 ; <i8*> [#uses=1]
+ %36 = bitcast i8* %35 to float* ; <float*> [#uses=4]
+ %37 = load float* %36, align 4 ; <float> [#uses=1]
+ %38 = getelementptr float* %36, i32 1 ; <float*> [#uses=1]
+ %39 = load float* %38, align 4 ; <float> [#uses=1]
+ %40 = fmul float %37, 6.553500e+04 ; <float> [#uses=1]
+ %41 = fadd float %40, 5.000000e-01 ; <float> [#uses=1]
+ %42 = fmul float %39, 6.553500e+04 ; <float> [#uses=1]
+ %43 = fadd float %42, 5.000000e-01 ; <float> [#uses=3]
+ %44 = fcmp olt float %41, 0.000000e+00 ; <i1> [#uses=0]
+ %45 = fcmp olt float %43, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %45, label %bb2277, label %bb2274
+
+bb2274: ; preds = %bb2265
+ %46 = fcmp ogt float %43, 6.553500e+04 ; <i1> [#uses=0]
+ br label %bb2277
+
+bb2277: ; preds = %bb2274, %bb2265
+ %f1582.0 = phi float [ 0.000000e+00, %bb2265 ], [ %43, %bb2274 ] ; <float> [#uses=1]
+ %47 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %48 = fptosi float %f1582.0 to i32 ; <i32> [#uses=1]
+ %49 = getelementptr float* %36, i32 2 ; <float*> [#uses=1]
+ %50 = load float* %49, align 4 ; <float> [#uses=1]
+ %51 = getelementptr float* %36, i32 3 ; <float*> [#uses=1]
+ %52 = load float* %51, align 4 ; <float> [#uses=1]
+ %53 = fmul float %50, 6.553500e+04 ; <float> [#uses=1]
+ %54 = fadd float %53, 5.000000e-01 ; <float> [#uses=1]
+ %55 = fmul float %52, 6.553500e+04 ; <float> [#uses=1]
+ %56 = fadd float %55, 5.000000e-01 ; <float> [#uses=1]
+ %57 = fcmp olt float %54, 0.000000e+00 ; <i1> [#uses=0]
+ %58 = fcmp olt float %56, 0.000000e+00 ; <i1> [#uses=0]
+ %59 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %60 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %61 = zext i32 %47 to i64 ; <i64> [#uses=1]
+ %62 = shl i64 %61, 48 ; <i64> [#uses=1]
+ %63 = zext i32 %48 to i64 ; <i64> [#uses=1]
+ %64 = shl i64 %63, 32 ; <i64> [#uses=1]
+ %65 = sext i32 %59 to i64 ; <i64> [#uses=1]
+ %66 = shl i64 %65, 16 ; <i64> [#uses=1]
+ %67 = sext i32 %60 to i64 ; <i64> [#uses=1]
+ %68 = or i64 %64, %62 ; <i64> [#uses=1]
+ %69 = or i64 %68, %66 ; <i64> [#uses=1]
+ %70 = or i64 %69, %67 ; <i64> [#uses=2]
+ %71 = getelementptr i8* null, i32 0 ; <i8*> [#uses=1]
+ %72 = bitcast i8* %71 to float* ; <float*> [#uses=4]
+ %73 = load float* %72, align 4 ; <float> [#uses=1]
+ %74 = getelementptr float* %72, i32 1 ; <float*> [#uses=1]
+ %75 = load float* %74, align 4 ; <float> [#uses=1]
+ %76 = fmul float %73, 6.553500e+04 ; <float> [#uses=1]
+ %77 = fadd float %76, 5.000000e-01 ; <float> [#uses=3]
+ %78 = fmul float %75, 6.553500e+04 ; <float> [#uses=1]
+ %79 = fadd float %78, 5.000000e-01 ; <float> [#uses=1]
+ %80 = fcmp olt float %77, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %80, label %bb2295, label %bb2292
+
+bb2292: ; preds = %bb2277
+ %81 = fcmp ogt float %77, 6.553500e+04 ; <i1> [#uses=1]
+ br i1 %81, label %bb2294, label %bb2295
+
+bb2294: ; preds = %bb2292
+ br label %bb2295
+
+bb2295: ; preds = %bb2294, %bb2292, %bb2277
+ %f0569.0 = phi float [ 6.553500e+04, %bb2294 ], [ 0.000000e+00, %bb2277 ], [ %77, %bb2292 ] ; <float> [#uses=1]
+ %82 = fcmp olt float %79, 0.000000e+00 ; <i1> [#uses=0]
+ %83 = fptosi float %f0569.0 to i32 ; <i32> [#uses=1]
+ %84 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %85 = getelementptr float* %72, i32 2 ; <float*> [#uses=1]
+ %86 = load float* %85, align 4 ; <float> [#uses=1]
+ %87 = getelementptr float* %72, i32 3 ; <float*> [#uses=1]
+ %88 = load float* %87, align 4 ; <float> [#uses=1]
+ %89 = fmul float %86, 6.553500e+04 ; <float> [#uses=1]
+ %90 = fadd float %89, 5.000000e-01 ; <float> [#uses=1]
+ %91 = fmul float %88, 6.553500e+04 ; <float> [#uses=1]
+ %92 = fadd float %91, 5.000000e-01 ; <float> [#uses=1]
+ %93 = fcmp olt float %90, 0.000000e+00 ; <i1> [#uses=0]
+ %94 = fcmp olt float %92, 0.000000e+00 ; <i1> [#uses=0]
+ %95 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %96 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ %97 = zext i32 %83 to i64 ; <i64> [#uses=1]
+ %98 = shl i64 %97, 48 ; <i64> [#uses=1]
+ %99 = zext i32 %84 to i64 ; <i64> [#uses=1]
+ %100 = shl i64 %99, 32 ; <i64> [#uses=1]
+ %101 = sext i32 %95 to i64 ; <i64> [#uses=1]
+ %102 = shl i64 %101, 16 ; <i64> [#uses=1]
+ %103 = sext i32 %96 to i64 ; <i64> [#uses=1]
+ %104 = or i64 %100, %98 ; <i64> [#uses=1]
+ %105 = or i64 %104, %102 ; <i64> [#uses=1]
+ %106 = or i64 %105, %103 ; <i64> [#uses=2]
+ %107 = shl i64 %70, 16 ; <i64> [#uses=1]
+ %108 = and i64 %107, 4294901760 ; <i64> [#uses=1]
+ %109 = and i64 %106, 65535 ; <i64> [#uses=1]
+ %110 = or i64 %34, %32 ; <i64> [#uses=1]
+ %111 = or i64 %110, %108 ; <i64> [#uses=1]
+ %112 = or i64 %111, %109 ; <i64> [#uses=1]
+ store i64 %70, i64* %4, align 16
+ store i64 %106, i64* %5, align 8
+ %113 = icmp eq i64 %112, 0 ; <i1> [#uses=1]
+ br i1 %113, label %bb2325, label %bb2315
+
+bb2315: ; preds = %bb2295
+ %114 = icmp eq %struct.xx_t* %159, null ; <i1> [#uses=1]
+ br i1 %114, label %bb2318, label %bb2317
+
+bb2317: ; preds = %bb2315
+ %115 = load i64* %2, align 16 ; <i64> [#uses=1]
+ %116 = call i32 (...)* @_u16a_cm( i64 %115, %struct.xx_t* %159, double 0.000000e+00, double 1.047551e+06 ) nounwind ; <i32> [#uses=1]
+ %117 = sext i32 %116 to i64 ; <i64> [#uses=1]
+ store i64 %117, i64* %2, align 16
+ %118 = load i64* %3, align 8 ; <i64> [#uses=1]
+ %119 = call i32 (...)* @_u16a_cm( i64 %118, %struct.xx_t* %159, double 0.000000e+00, double 1.047551e+06 ) nounwind ; <i32> [#uses=1]
+ %120 = sext i32 %119 to i64 ; <i64> [#uses=1]
+ store i64 %120, i64* %3, align 8
+ %121 = load i64* %4, align 16 ; <i64> [#uses=1]
+ %122 = call i32 (...)* @_u16a_cm( i64 %121, %struct.xx_t* %159, double 0.000000e+00, double 1.047551e+06 ) nounwind ; <i32> [#uses=1]
+ %123 = sext i32 %122 to i64 ; <i64> [#uses=1]
+ store i64 %123, i64* %4, align 16
+ %124 = load i64* %5, align 8 ; <i64> [#uses=1]
+ %125 = call i32 (...)* @_u16a_cm( i64 %124, %struct.xx_t* %159, double 0.000000e+00, double 1.047551e+06 ) nounwind ; <i32> [#uses=0]
+ unreachable
+
+bb2318: ; preds = %bb2315
+ %126 = getelementptr %struct.CGLSI* %src, i32 %indvar5021, i32 8 ; <%struct.vv_t*> [#uses=1]
+ %127 = bitcast %struct.vv_t* %126 to i64* ; <i64*> [#uses=1]
+ %128 = load i64* %127, align 8 ; <i64> [#uses=1]
+ %129 = trunc i64 %128 to i32 ; <i32> [#uses=4]
+ %130 = load i64* %2, align 16 ; <i64> [#uses=1]
+ %131 = call i32 (...)* @_u16_ff( i64 %130, i32 %129 ) nounwind ; <i32> [#uses=1]
+ %132 = sext i32 %131 to i64 ; <i64> [#uses=1]
+ store i64 %132, i64* %2, align 16
+ %133 = load i64* %3, align 8 ; <i64> [#uses=1]
+ %134 = call i32 (...)* @_u16_ff( i64 %133, i32 %129 ) nounwind ; <i32> [#uses=1]
+ %135 = sext i32 %134 to i64 ; <i64> [#uses=1]
+ store i64 %135, i64* %3, align 8
+ %136 = load i64* %4, align 16 ; <i64> [#uses=1]
+ %137 = call i32 (...)* @_u16_ff( i64 %136, i32 %129 ) nounwind ; <i32> [#uses=1]
+ %138 = sext i32 %137 to i64 ; <i64> [#uses=1]
+ store i64 %138, i64* %4, align 16
+ %139 = load i64* %5, align 8 ; <i64> [#uses=1]
+ %140 = call i32 (...)* @_u16_ff( i64 %139, i32 %129 ) nounwind ; <i32> [#uses=0]
+ unreachable
+
+bb2319: ; preds = %bb2326
+ %141 = getelementptr %struct.CGLSI* %src, i32 %indvar5021, i32 2 ; <i8**> [#uses=1]
+ %142 = load i8** %141, align 4 ; <i8*> [#uses=4]
+ %143 = getelementptr i8* %142, i32 0 ; <i8*> [#uses=1]
+ %144 = call i32 (...)* @_u16_sf32( double 0.000000e+00, double 6.553500e+04, double 5.000000e-01, i8* %143 ) nounwind ; <i32> [#uses=1]
+ %145 = sext i32 %144 to i64 ; <i64> [#uses=2]
+ %146 = getelementptr i8* %142, i32 0 ; <i8*> [#uses=1]
+ %147 = call i32 (...)* @_u16_sf32( double 0.000000e+00, double 6.553500e+04, double 5.000000e-01, i8* %146 ) nounwind ; <i32> [#uses=1]
+ %148 = sext i32 %147 to i64 ; <i64> [#uses=2]
+ %149 = shl i64 %145, 48 ; <i64> [#uses=0]
+ %150 = shl i64 %148, 32 ; <i64> [#uses=1]
+ %151 = and i64 %150, 281470681743360 ; <i64> [#uses=0]
+ store i64 %145, i64* %2, align 16
+ store i64 %148, i64* %3, align 8
+ %152 = getelementptr i8* %142, i32 0 ; <i8*> [#uses=1]
+ %153 = call i32 (...)* @_u16_sf32( double 0.000000e+00, double 6.553500e+04, double 5.000000e-01, i8* %152 ) nounwind ; <i32> [#uses=1]
+ %154 = sext i32 %153 to i64 ; <i64> [#uses=0]
+ %155 = getelementptr i8* %142, i32 0 ; <i8*> [#uses=1]
+ %156 = call i32 (...)* @_u16_sf32( double 0.000000e+00, double 6.553500e+04, double 5.000000e-01, i8* %155 ) nounwind ; <i32> [#uses=0]
+ unreachable
+
+bb2325: ; preds = %bb2326, %bb2295
+ %indvar.next5145 = add i32 %indvar5021, 1 ; <i32> [#uses=1]
+ br label %bb2326
+
+bb2326: ; preds = %bb2325, %bb.nph4945
+ %indvar5021 = phi i32 [ 0, %bb.nph4945 ], [ %indvar.next5145, %bb2325 ] ; <i32> [#uses=6]
+ %157 = icmp slt i32 %indvar5021, %n ; <i1> [#uses=0]
+ %158 = getelementptr %struct.CGLSI* %src, i32 %indvar5021, i32 10 ; <%struct.xx_t**> [#uses=1]
+ %159 = load %struct.xx_t** %158, align 4 ; <%struct.xx_t*> [#uses=5]
+ %160 = getelementptr %struct.CGLSI* %src, i32 %indvar5021, i32 1 ; <i32*> [#uses=1]
+ %161 = load i32* %160, align 4 ; <i32> [#uses=1]
+ %162 = and i32 %161, 255 ; <i32> [#uses=1]
+ switch i32 %162, label %bb2325 [
+ i32 59, label %bb2217
+ i32 60, label %bb2319
+ ]
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i32 @_u16_ff(...)
+
+declare i32 @_u16a_cm(...)
+
+declare i32 @_u16_sf32(...)
diff --git a/test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll b/test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll
new file mode 100644
index 0000000..91c36ef
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+; XFAIL: *
+; PR2356
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9"
+
+define i32 @test(i64 %x, i32* %p) nounwind {
+ %asmtmp = call i32 asm "", "=r,0"(i64 0) nounwind ; <i32> [#uses=0]
+ %y = add i32 %asmtmp, 1
+ ret i32 %y
+}
diff --git a/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll b/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
new file mode 100644
index 0000000..f474a6d
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=ppc64
+
+define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
+entry:
+ %imag59 = load ppc_fp128* null, align 8 ; <ppc_fp128> [#uses=1]
+ %0 = fmul ppc_fp128 0xM00000000000000000000000000000000, %imag59 ; <ppc_fp128> [#uses=1]
+ %1 = fmul ppc_fp128 0xM00000000000000000000000000000000, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
+ %2 = fadd ppc_fp128 %0, %1 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %2, ppc_fp128* null, align 16
+ unreachable
+}
diff --git a/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll b/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
new file mode 100644
index 0000000..f4c06fb
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=ppc32 -o - | not grep fixunstfsi
+
+define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
+entry:
+ %0 = fcmp olt ppc_fp128 %a, 0xM00000000000000000000000000000000 ; <i1> [#uses=1]
+ br i1 %0, label %bb5, label %bb1
+
+bb1: ; preds = %entry
+ %1 = fmul ppc_fp128 %a, 0xM3DF00000000000000000000000000000 ; <ppc_fp128> [#uses=1]
+ %2 = fptoui ppc_fp128 %1 to i32 ; <i32> [#uses=1]
+ %3 = zext i32 %2 to i64 ; <i64> [#uses=1]
+ %4 = shl i64 %3, 32 ; <i64> [#uses=3]
+ %5 = uitofp i64 %4 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ %6 = fsub ppc_fp128 %a, %5 ; <ppc_fp128> [#uses=3]
+ %7 = fcmp olt ppc_fp128 %6, 0xM00000000000000000000000000000000 ; <i1> [#uses=1]
+ br i1 %7, label %bb2, label %bb3
+
+bb2: ; preds = %bb1
+ %8 = fsub ppc_fp128 0xM80000000000000000000000000000000, %6 ; <ppc_fp128> [#uses=1]
+ %9 = fptoui ppc_fp128 %8 to i32 ; <i32> [#uses=1]
+ %10 = zext i32 %9 to i64 ; <i64> [#uses=1]
+ %11 = sub i64 %4, %10 ; <i64> [#uses=1]
+ ret i64 %11
+
+bb3: ; preds = %bb1
+ %12 = fptoui ppc_fp128 %6 to i32 ; <i32> [#uses=1]
+ %13 = zext i32 %12 to i64 ; <i64> [#uses=1]
+ %14 = or i64 %13, %4 ; <i64> [#uses=1]
+ ret i64 %14
+
+bb5: ; preds = %entry
+ ret i64 0
+}
diff --git a/test/CodeGen/PowerPC/2008-10-30-IllegalShift.ll b/test/CodeGen/PowerPC/2008-10-30-IllegalShift.ll
new file mode 100644
index 0000000..83f3f6f
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-10-30-IllegalShift.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc32
+; PR2986
+@argc = external global i32 ; <i32*> [#uses=1]
+@buffer = external global [32 x i8], align 4 ; <[32 x i8]*> [#uses=1]
+
+define void @test1() nounwind noinline {
+entry:
+ %0 = load i32* @argc, align 4 ; <i32> [#uses=1]
+ %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
+ tail call void @llvm.memset.i32(i8* getelementptr ([32 x i8]* @buffer, i32 0, i32 0), i8 %1, i32 17, i32 4)
+ unreachable
+}
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
diff --git a/test/CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll b/test/CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll
new file mode 100644
index 0000000..20683b9
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s
+; PR2988
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin10.0"
+@a = common global ppc_fp128 0xM00000000000000000000000000000000, align 16 ; <ppc_fp128*> [#uses=2]
+@b = common global ppc_fp128 0xM00000000000000000000000000000000, align 16 ; <ppc_fp128*> [#uses=2]
+@c = common global ppc_fp128 0xM00000000000000000000000000000000, align 16 ; <ppc_fp128*> [#uses=3]
+@d = common global ppc_fp128 0xM00000000000000000000000000000000, align 16 ; <ppc_fp128*> [#uses=2]
+
+define void @foo() nounwind {
+entry:
+ %0 = load ppc_fp128* @a, align 16 ; <ppc_fp128> [#uses=1]
+ %1 = call ppc_fp128 @llvm.sqrt.ppcf128(ppc_fp128 %0) ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %1, ppc_fp128* @a, align 16
+ %2 = load ppc_fp128* @b, align 16 ; <ppc_fp128> [#uses=1]
+ %3 = call ppc_fp128 @"\01_sinl$LDBL128"(ppc_fp128 %2) nounwind readonly ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %3, ppc_fp128* @b, align 16
+ %4 = load ppc_fp128* @c, align 16 ; <ppc_fp128> [#uses=1]
+ %5 = call ppc_fp128 @"\01_cosl$LDBL128"(ppc_fp128 %4) nounwind readonly ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %5, ppc_fp128* @c, align 16
+ %6 = load ppc_fp128* @d, align 16 ; <ppc_fp128> [#uses=1]
+ %7 = load ppc_fp128* @c, align 16 ; <ppc_fp128> [#uses=1]
+ %8 = call ppc_fp128 @llvm.pow.ppcf128(ppc_fp128 %6, ppc_fp128 %7) ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %8, ppc_fp128* @d, align 16
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare ppc_fp128 @llvm.sqrt.ppcf128(ppc_fp128) nounwind readonly
+
+declare ppc_fp128 @"\01_sinl$LDBL128"(ppc_fp128) nounwind readonly
+
+declare ppc_fp128 @"\01_cosl$LDBL128"(ppc_fp128) nounwind readonly
+
+declare ppc_fp128 @llvm.pow.ppcf128(ppc_fp128, ppc_fp128) nounwind readonly
diff --git a/test/CodeGen/PowerPC/2008-12-02-LegalizeTypeAssert.ll b/test/CodeGen/PowerPC/2008-12-02-LegalizeTypeAssert.ll
new file mode 100644
index 0000000..9ed7f6f
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-12-02-LegalizeTypeAssert.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin9.5
+
+define void @__multc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
+entry:
+ %.pre139 = and i1 false, false ; <i1> [#uses=1]
+ br i1 false, label %bb6, label %bb21
+
+bb6: ; preds = %entry
+ %0 = tail call ppc_fp128 @copysignl(ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 %a) nounwind readnone ; <ppc_fp128> [#uses=0]
+ %iftmp.1.0 = select i1 %.pre139, ppc_fp128 0xM3FF00000000000000000000000000000, ppc_fp128 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
+ %1 = tail call ppc_fp128 @copysignl(ppc_fp128 %iftmp.1.0, ppc_fp128 %b) nounwind readnone ; <ppc_fp128> [#uses=0]
+ unreachable
+
+bb21: ; preds = %entry
+ unreachable
+}
+
+declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128) nounwind readnone
diff --git a/test/CodeGen/PowerPC/2008-12-12-EH.ll b/test/CodeGen/PowerPC/2008-12-12-EH.ll
new file mode 100644
index 0000000..2315e36
--- /dev/null
+++ b/test/CodeGen/PowerPC/2008-12-12-EH.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin9 | grep ^__Z1fv.eh
+
+define void @_Z1fv() {
+entry:
+ br label %return
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2009-01-16-DeclareISelBug.ll b/test/CodeGen/PowerPC/2009-01-16-DeclareISelBug.ll
new file mode 100644
index 0000000..d49d58d
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-01-16-DeclareISelBug.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin9.5
+; rdar://6499616
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 } ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"testcase.c\00" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [30 x i8] c"/Volumes/SandBox/NightlyTest/\00" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5628) (LLVM build 9999)\00" ; <[57 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @.str2, i32 0, i32 0) } ; <%llvm.dbg.compile_unit.type*> [#uses=0]
+@"\01LC" = internal constant [13 x i8] c"conftest.val\00" ; <[13 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ %0 = call i8* @fopen(i8* getelementptr ([13 x i8]* @"\01LC", i32 0, i32 0), i8* null) nounwind ; <i8*> [#uses=0]
+ unreachable
+}
+
+declare i8* @fopen(i8*, i8*)
diff --git a/test/CodeGen/PowerPC/2009-03-17-LSRBug.ll b/test/CodeGen/PowerPC/2009-03-17-LSRBug.ll
new file mode 100644
index 0000000..172531e
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-03-17-LSRBug.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin10
+; rdar://6692215
+
+define fastcc void @_qsort(i8* %a, i32 %n, i32 %es, i32 (i8*, i8*)* %cmp, i32 %depth_limit) nounwind optsize ssp {
+entry:
+ br i1 false, label %bb21, label %bb20.loopexit
+
+bb20.loopexit: ; preds = %entry
+ ret void
+
+bb21: ; preds = %entry
+ %0 = getelementptr i8* %a, i32 0 ; <i8*> [#uses=2]
+ br label %bb35
+
+bb29: ; preds = %bb35
+ br i1 false, label %bb7.i252, label %bb34
+
+bb7.i252: ; preds = %bb7.i252, %bb29
+ %pj.0.rec.i247 = phi i32 [ %indvar.next488, %bb7.i252 ], [ 0, %bb29 ] ; <i32> [#uses=2]
+ %pi.0.i248 = getelementptr i8* %pa.1, i32 %pj.0.rec.i247 ; <i8*> [#uses=0]
+ %indvar.next488 = add i32 %pj.0.rec.i247, 1 ; <i32> [#uses=1]
+ br i1 false, label %bb34, label %bb7.i252
+
+bb34: ; preds = %bb7.i252, %bb29
+ %indvar.next505 = add i32 %indvar504, 1 ; <i32> [#uses=1]
+ br label %bb35
+
+bb35: ; preds = %bb34, %bb21
+ %indvar504 = phi i32 [ %indvar.next505, %bb34 ], [ 0, %bb21 ] ; <i32> [#uses=2]
+ %pa.1 = phi i8* [ null, %bb34 ], [ %0, %bb21 ] ; <i8*> [#uses=2]
+ %pb.0.rec = mul i32 %indvar504, %es ; <i32> [#uses=1]
+ br i1 false, label %bb43, label %bb29
+
+bb43: ; preds = %bb43, %bb35
+ br i1 false, label %bb50, label %bb43
+
+bb50: ; preds = %bb43
+ %1 = ptrtoint i8* %pa.1 to i32 ; <i32> [#uses=1]
+ %2 = sub i32 %1, 0 ; <i32> [#uses=2]
+ %3 = icmp sle i32 0, %2 ; <i1> [#uses=1]
+ %min = select i1 %3, i32 0, i32 %2 ; <i32> [#uses=1]
+ br label %bb7.i161
+
+bb7.i161: ; preds = %bb7.i161, %bb50
+ %pj.0.rec.i156 = phi i32 [ %indvar.next394, %bb7.i161 ], [ 0, %bb50 ] ; <i32> [#uses=2]
+ %.sum279 = sub i32 %pj.0.rec.i156, %min ; <i32> [#uses=1]
+ %pb.0.sum542 = add i32 %pb.0.rec, %.sum279 ; <i32> [#uses=1]
+ %pj.0.i158 = getelementptr i8* %0, i32 %pb.0.sum542 ; <i8*> [#uses=0]
+ %indvar.next394 = add i32 %pj.0.rec.i156, 1 ; <i32> [#uses=1]
+ br label %bb7.i161
+}
diff --git a/test/CodeGen/PowerPC/2009-05-28-LegalizeBRCC.ll b/test/CodeGen/PowerPC/2009-05-28-LegalizeBRCC.ll
new file mode 100644
index 0000000..29d115d
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-05-28-LegalizeBRCC.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin10
+; PR4280
+
+define i32 @__fixunssfsi(float %a) nounwind readnone {
+entry:
+ %0 = fcmp ult float %a, 0x41E0000000000000 ; <i1> [#uses=1]
+ br i1 %0, label %bb1, label %bb
+
+bb: ; preds = %entry
+ ret i32 1
+
+bb1: ; preds = %entry
+ ret i32 0
+}
+
diff --git a/test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll b/test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll
new file mode 100644
index 0000000..f64e3dc
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=ppc32 -verify-machineinstrs
+
+; Machine code verifier will call isRegTiedToDefOperand() on /all/ register use
+; operands. We must make sure that the operand flag is found correctly.
+
+; This test case is actually not specific to PowerPC, but the (imm, reg) format
+; of PowerPC "m" operands trigger this bug.
+
+define void @memory_asm_operand(i32 %a) {
+ ; "m" operand will be represented as:
+ ; INLINEASM <es:fake $0>, 10, %R2, 20, -4, %R1
+ ; It is difficult to find the flag operand (20) when starting from %R1
+ call i32 asm "lbzx $0, $1", "=r,m" (i32 %a)
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll b/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
new file mode 100644
index 0000000..5d09696
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=ppc32 | FileCheck %s
+; ModuleID = '<stdin>'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin10.0"
+; It is wrong on powerpc to substitute reg+reg for $0; the stw opcode
+; would have to change.
+
+@x = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
+
+define void @foo(i32 %y) nounwind ssp {
+entry:
+; CHECK: foo
+; CHECK: add r2
+; CHECK: 0(r2)
+ %y_addr = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %y, i32* %y_addr
+ %0 = load i32* %y_addr, align 4 ; <i32> [#uses=1]
+ %1 = getelementptr inbounds [0 x i32]* @x, i32 0, i32 %0 ; <i32*> [#uses=1]
+ call void asm sideeffect "isync\0A\09eieio\0A\09stw $1, $0", "=*o,r,~{memory}"(i32* %1, i32 0) nounwind
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2009-08-23-linkerprivate.ll b/test/CodeGen/PowerPC/2009-08-23-linkerprivate.ll
new file mode 100644
index 0000000..12c4c99
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-08-23-linkerprivate.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 -mtriple=ppc-apple-darwin | FileCheck %s
+
+; ModuleID = '/Volumes/MacOS9/tests/WebKit/JavaScriptCore/profiler/ProfilerServer.mm'
+
+@"\01l_objc_msgSend_fixup_alloc" = linker_private hidden global i32 0, section "__DATA, __objc_msgrefs, coalesced", align 16 ; <i32*> [#uses=0]
+
+; CHECK: .globl l_objc_msgSend_fixup_alloc
+; CHECK: .weak_definition l_objc_msgSend_fixup_alloc
diff --git a/test/CodeGen/PowerPC/2009-09-18-carrybit.ll b/test/CodeGen/PowerPC/2009-09-18-carrybit.ll
new file mode 100644
index 0000000..6c23a61
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-09-18-carrybit.ll
@@ -0,0 +1,62 @@
+; RUN: llc -march=ppc32 < %s | FileCheck %s
+; ModuleID = '<stdin>'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9.6"
+
+define i64 @foo(i64 %r.0.ph, i64 %q.0.ph, i32 %sr1.1.ph) nounwind {
+entry:
+; CHECK: foo:
+; CHECK: subfc
+; CHECK: subfe
+; CHECK: subfc
+; CHECK: subfe
+ %tmp0 = add i64 %r.0.ph, -1 ; <i64> [#uses=1]
+ br label %bb40
+
+bb40: ; preds = %bb40, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb40 ] ; <i32> [#uses=1]
+ %carry.0274 = phi i32 [ 0, %entry ], [%tmp122, %bb40 ] ; <i32> [#uses=1]
+ %r.0273 = phi i64 [ %r.0.ph, %entry ], [ %tmp124, %bb40 ] ; <i64> [#uses=2]
+ %q.0272 = phi i64 [ %q.0.ph, %entry ], [ %ins169, %bb40 ] ; <i64> [#uses=3]
+ %tmp1 = lshr i64 %r.0273, 31 ; <i64> [#uses=1]
+ %tmp2 = trunc i64 %tmp1 to i32 ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp2, -2 ; <i32> [#uses=1]
+ %tmp213 = trunc i64 %r.0273 to i32 ; <i32> [#uses=2]
+ %tmp106 = lshr i32 %tmp213, 31 ; <i32> [#uses=1]
+ %tmp107 = or i32 %tmp3, %tmp106 ; <i32> [#uses=1]
+ %tmp215 = zext i32 %tmp107 to i64 ; <i64> [#uses=1]
+ %tmp216 = shl i64 %tmp215, 32 ; <i64> [#uses=1]
+ %tmp108 = shl i32 %tmp213, 1 ; <i32> [#uses=1]
+ %tmp109 = lshr i64 %q.0272, 63 ; <i64> [#uses=1]
+ %tmp110 = trunc i64 %tmp109 to i32 ; <i32> [#uses=1]
+ %tmp111 = or i32 %tmp108, %tmp110 ; <i32> [#uses=1]
+ %tmp222 = zext i32 %tmp111 to i64 ; <i64> [#uses=1]
+ %ins224 = or i64 %tmp216, %tmp222 ; <i64> [#uses=2]
+ %tmp112 = lshr i64 %q.0272, 31 ; <i64> [#uses=1]
+ %tmp113 = trunc i64 %tmp112 to i32 ; <i32> [#uses=1]
+ %tmp114 = and i32 %tmp113, -2 ; <i32> [#uses=1]
+ %tmp158 = trunc i64 %q.0272 to i32 ; <i32> [#uses=2]
+ %tmp115 = lshr i32 %tmp158, 31 ; <i32> [#uses=1]
+ %tmp116 = or i32 %tmp114, %tmp115 ; <i32> [#uses=1]
+ %tmp160 = zext i32 %tmp116 to i64 ; <i64> [#uses=1]
+ %tmp161 = shl i64 %tmp160, 32 ; <i64> [#uses=1]
+ %tmp117 = shl i32 %tmp158, 1 ; <i32> [#uses=1]
+ %tmp118 = or i32 %tmp117, %carry.0274 ; <i32> [#uses=1]
+ %tmp167 = zext i32 %tmp118 to i64 ; <i64> [#uses=1]
+ %ins169 = or i64 %tmp161, %tmp167 ; <i64> [#uses=2]
+ %tmp119 = sub i64 %tmp0, %ins224 ; <i64> [#uses=1]
+ %tmp120 = ashr i64 %tmp119, 63 ; <i64> [#uses=2]
+ %tmp121 = trunc i64 %tmp120 to i32 ; <i32> [#uses=1]
+ %tmp122 = and i32 %tmp121, 1 ; <i32> [#uses=2]
+ %tmp123 = and i64 %tmp120, %q.0.ph ; <i64> [#uses=1]
+ %tmp124 = sub i64 %ins224, %tmp123 ; <i64> [#uses=2]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %sr1.1.ph ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb41.bb42_crit_edge, label %bb40
+
+bb41.bb42_crit_edge: ; preds = %bb40
+ %phitmp278 = zext i32 %tmp122 to i64 ; <i64> [#uses=1]
+ %tmp125 = shl i64 %ins169, 1 ; <i64> [#uses=1]
+ %tmp126 = or i64 %phitmp278, %tmp125 ; <i64> [#uses=2]
+ ret i64 %tmp126
+}
diff --git a/test/CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll b/test/CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
new file mode 100644
index 0000000..2d9d16a
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
@@ -0,0 +1,105 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin8
+
+define void @gcov_exit() nounwind {
+entry:
+ br i1 undef, label %return, label %bb.nph341
+
+bb.nph341: ; preds = %entry
+ br label %bb25
+
+bb25: ; preds = %read_fatal, %bb.nph341
+ br i1 undef, label %bb49.1, label %bb48
+
+bb48: ; preds = %bb25
+ br label %bb49.1
+
+bb51: ; preds = %bb48.4, %bb49.3
+ switch i32 undef, label %bb58 [
+ i32 0, label %rewrite
+ i32 1734567009, label %bb59
+ ]
+
+bb58: ; preds = %bb51
+ br label %read_fatal
+
+bb59: ; preds = %bb51
+ br i1 undef, label %bb60, label %bb3.i156
+
+bb3.i156: ; preds = %bb59
+ br label %read_fatal
+
+bb60: ; preds = %bb59
+ br i1 undef, label %bb78.preheader, label %rewrite
+
+bb78.preheader: ; preds = %bb60
+ br i1 undef, label %bb62, label %bb80
+
+bb62: ; preds = %bb78.preheader
+ br i1 undef, label %bb64, label %read_mismatch
+
+bb64: ; preds = %bb62
+ br i1 undef, label %bb65, label %read_mismatch
+
+bb65: ; preds = %bb64
+ br i1 undef, label %bb75, label %read_mismatch
+
+read_mismatch: ; preds = %bb98, %bb119.preheader, %bb72, %bb71, %bb65, %bb64, %bb62
+ br label %read_fatal
+
+bb71: ; preds = %bb75
+ br i1 undef, label %bb72, label %read_mismatch
+
+bb72: ; preds = %bb71
+ br i1 undef, label %bb73, label %read_mismatch
+
+bb73: ; preds = %bb72
+ unreachable
+
+bb74: ; preds = %bb75
+ br label %bb75
+
+bb75: ; preds = %bb74, %bb65
+ br i1 undef, label %bb74, label %bb71
+
+bb80: ; preds = %bb78.preheader
+ unreachable
+
+read_fatal: ; preds = %read_mismatch, %bb3.i156, %bb58
+ br i1 undef, label %return, label %bb25
+
+rewrite: ; preds = %bb60, %bb51
+ br i1 undef, label %bb94, label %bb119.preheader
+
+bb94: ; preds = %rewrite
+ unreachable
+
+bb119.preheader: ; preds = %rewrite
+ br i1 undef, label %read_mismatch, label %bb98
+
+bb98: ; preds = %bb119.preheader
+ br label %read_mismatch
+
+return: ; preds = %read_fatal, %entry
+ ret void
+
+bb49.1: ; preds = %bb48, %bb25
+ br i1 undef, label %bb49.2, label %bb48.2
+
+bb49.2: ; preds = %bb48.2, %bb49.1
+ br i1 undef, label %bb49.3, label %bb48.3
+
+bb48.2: ; preds = %bb49.1
+ br label %bb49.2
+
+bb49.3: ; preds = %bb48.3, %bb49.2
+ %c_ix.0.3 = phi i32 [ undef, %bb48.3 ], [ undef, %bb49.2 ] ; <i32> [#uses=1]
+ br i1 undef, label %bb51, label %bb48.4
+
+bb48.3: ; preds = %bb49.2
+ store i64* undef, i64** undef, align 4
+ br label %bb49.3
+
+bb48.4: ; preds = %bb49.3
+ %0 = getelementptr inbounds [5 x i64*]* undef, i32 0, i32 %c_ix.0.3 ; <i64**> [#uses=0]
+ br label %bb51
+}
diff --git a/test/CodeGen/PowerPC/2009-11-15-ReMatBug.ll b/test/CodeGen/PowerPC/2009-11-15-ReMatBug.ll
new file mode 100644
index 0000000..54f4b2e
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-11-15-ReMatBug.ll
@@ -0,0 +1,155 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin8
+
+%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+%struct.__gcov_var = type { %struct.FILE*, i32, i32, i32, i32, i32, i32, [1025 x i32] }
+%struct.__sFILEX = type opaque
+%struct.__sbuf = type { i8*, i32 }
+%struct.gcov_ctr_info = type { i32, i64*, void (i64*, i32)* }
+%struct.gcov_ctr_summary = type { i32, i32, i64, i64, i64 }
+%struct.gcov_fn_info = type { i32, i32, [0 x i32] }
+%struct.gcov_info = type { i32, %struct.gcov_info*, i32, i8*, i32, %struct.gcov_fn_info*, i32, [0 x %struct.gcov_ctr_info] }
+%struct.gcov_summary = type { i32, [1 x %struct.gcov_ctr_summary] }
+
+@__gcov_var = external global %struct.__gcov_var ; <%struct.__gcov_var*> [#uses=1]
+@__sF = external global [0 x %struct.FILE] ; <[0 x %struct.FILE]*> [#uses=1]
[email protected] = external constant [56 x i8], align 4 ; <[56 x i8]*> [#uses=1]
+@gcov_list = external global %struct.gcov_info* ; <%struct.gcov_info**> [#uses=1]
[email protected] = external constant [35 x i8], align 4 ; <[35 x i8]*> [#uses=1]
[email protected] = external constant [9 x i8], align 4 ; <[9 x i8]*> [#uses=1]
[email protected] = external constant [10 x i8], align 4 ; <[10 x i8]*> [#uses=1]
[email protected] = external constant [36 x i8], align 4 ; <[36 x i8]*> [#uses=1]
+
+declare i32 @"\01_fprintf$LDBL128"(%struct.FILE*, i8*, ...) nounwind
+
+define void @gcov_exit() nounwind {
+entry:
+ %gi_ptr.0357 = load %struct.gcov_info** @gcov_list, align 4 ; <%struct.gcov_info*> [#uses=1]
+ %0 = alloca i8, i32 undef, align 1 ; <i8*> [#uses=3]
+ br i1 undef, label %return, label %bb.nph341
+
+bb.nph341: ; preds = %entry
+ %object27 = bitcast %struct.gcov_summary* undef to i8* ; <i8*> [#uses=1]
+ br label %bb25
+
+bb25: ; preds = %read_fatal, %bb.nph341
+ %gi_ptr.1329 = phi %struct.gcov_info* [ %gi_ptr.0357, %bb.nph341 ], [ undef, %read_fatal ] ; <%struct.gcov_info*> [#uses=1]
+ call void @llvm.memset.i32(i8* %object27, i8 0, i32 36, i32 8)
+ br i1 undef, label %bb49.1, label %bb48
+
+bb48: ; preds = %bb25
+ br label %bb49.1
+
+bb51: ; preds = %bb48.4, %bb49.3
+ switch i32 undef, label %bb58 [
+ i32 0, label %rewrite
+ i32 1734567009, label %bb59
+ ]
+
+bb58: ; preds = %bb51
+ %1 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([35 x i8]* @.str7, i32 0, i32 0), i8* %0) nounwind ; <i32> [#uses=0]
+ br label %read_fatal
+
+bb59: ; preds = %bb51
+ br i1 undef, label %bb60, label %bb3.i156
+
+bb3.i156: ; preds = %bb59
+ store i8 52, i8* undef, align 1
+ store i8 42, i8* undef, align 1
+ %2 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([56 x i8]* @.str, i32 0, i32 0), i8* %0, i8* undef, i8* undef) nounwind ; <i32> [#uses=0]
+ br label %read_fatal
+
+bb60: ; preds = %bb59
+ br i1 undef, label %bb78.preheader, label %rewrite
+
+bb78.preheader: ; preds = %bb60
+ br i1 undef, label %bb62, label %bb80
+
+bb62: ; preds = %bb78.preheader
+ br i1 undef, label %bb64, label %read_mismatch
+
+bb64: ; preds = %bb62
+ br i1 undef, label %bb65, label %read_mismatch
+
+bb65: ; preds = %bb64
+ br i1 undef, label %bb75, label %read_mismatch
+
+read_mismatch: ; preds = %bb98, %bb119.preheader, %bb72, %bb71, %bb65, %bb64, %bb62
+ %3 = icmp eq i32 undef, -1 ; <i1> [#uses=1]
+ %iftmp.11.0 = select i1 %3, i8* getelementptr inbounds ([10 x i8]* @.str9, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8]* @.str8, i32 0, i32 0) ; <i8*> [#uses=1]
+ %4 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([36 x i8]* @.str10, i32 0, i32 0), i8* %0, i8* %iftmp.11.0) nounwind ; <i32> [#uses=0]
+ br label %read_fatal
+
+bb71: ; preds = %bb75
+ %5 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %6 = getelementptr inbounds %struct.gcov_info* %gi_ptr.1329, i32 0, i32 7, i32 undef, i32 2 ; <void (i64*, i32)**> [#uses=1]
+ %7 = load void (i64*, i32)** %6, align 4 ; <void (i64*, i32)*> [#uses=1]
+ %8 = call i32 @__gcov_read_unsigned() nounwind ; <i32> [#uses=1]
+ %9 = call i32 @__gcov_read_unsigned() nounwind ; <i32> [#uses=1]
+ %10 = icmp eq i32 %tmp386, %8 ; <i1> [#uses=1]
+ br i1 %10, label %bb72, label %read_mismatch
+
+bb72: ; preds = %bb71
+ %11 = icmp eq i32 undef, %9 ; <i1> [#uses=1]
+ br i1 %11, label %bb73, label %read_mismatch
+
+bb73: ; preds = %bb72
+ call void %7(i64* null, i32 %5) nounwind
+ unreachable
+
+bb74: ; preds = %bb75
+ %12 = add i32 %13, 1 ; <i32> [#uses=1]
+ br label %bb75
+
+bb75: ; preds = %bb74, %bb65
+ %13 = phi i32 [ %12, %bb74 ], [ 0, %bb65 ] ; <i32> [#uses=2]
+ %tmp386 = add i32 0, 27328512 ; <i32> [#uses=1]
+ %14 = shl i32 1, %13 ; <i32> [#uses=1]
+ %15 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %16 = and i32 %15, %14 ; <i32> [#uses=1]
+ %17 = icmp eq i32 %16, 0 ; <i1> [#uses=1]
+ br i1 %17, label %bb74, label %bb71
+
+bb80: ; preds = %bb78.preheader
+ unreachable
+
+read_fatal: ; preds = %read_mismatch, %bb3.i156, %bb58
+ br i1 undef, label %return, label %bb25
+
+rewrite: ; preds = %bb60, %bb51
+ store i32 -1, i32* getelementptr inbounds (%struct.__gcov_var* @__gcov_var, i32 0, i32 6), align 4
+ br i1 undef, label %bb94, label %bb119.preheader
+
+bb94: ; preds = %rewrite
+ unreachable
+
+bb119.preheader: ; preds = %rewrite
+ br i1 undef, label %read_mismatch, label %bb98
+
+bb98: ; preds = %bb119.preheader
+ br label %read_mismatch
+
+return: ; preds = %read_fatal, %entry
+ ret void
+
+bb49.1: ; preds = %bb48, %bb25
+ br i1 undef, label %bb49.2, label %bb48.2
+
+bb49.2: ; preds = %bb48.2, %bb49.1
+ br i1 undef, label %bb49.3, label %bb48.3
+
+bb48.2: ; preds = %bb49.1
+ br label %bb49.2
+
+bb49.3: ; preds = %bb48.3, %bb49.2
+ br i1 undef, label %bb51, label %bb48.4
+
+bb48.3: ; preds = %bb49.2
+ br label %bb49.3
+
+bb48.4: ; preds = %bb49.3
+ br label %bb51
+}
+
+declare i32 @__gcov_read_unsigned() nounwind
+
+declare void @llvm.memset.i32(i8* nocapture, i8, i32, i32) nounwind
diff --git a/test/CodeGen/PowerPC/2009-11-25-ImpDefBug.ll b/test/CodeGen/PowerPC/2009-11-25-ImpDefBug.ll
new file mode 100644
index 0000000..9a22a6f
--- /dev/null
+++ b/test/CodeGen/PowerPC/2009-11-25-ImpDefBug.ll
@@ -0,0 +1,56 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin9.5 -mcpu=g5
+; rdar://7422268
+
+%struct..0EdgeT = type { i32, i32, float, float, i32, i32, i32, float, i32, i32 }
+
+define void @smooth_color_z_triangle(i32 %v0, i32 %v1, i32 %v2, i32 %pv) nounwind {
+entry:
+ br i1 undef, label %return, label %bb14
+
+bb14: ; preds = %entry
+ br i1 undef, label %bb15, label %return
+
+bb15: ; preds = %bb14
+ br i1 undef, label %bb16, label %bb17
+
+bb16: ; preds = %bb15
+ br label %bb17
+
+bb17: ; preds = %bb16, %bb15
+ %0 = fcmp olt float undef, 0.000000e+00 ; <i1> [#uses=2]
+ %eTop.eMaj = select i1 %0, %struct..0EdgeT* undef, %struct..0EdgeT* null ; <%struct..0EdgeT*> [#uses=1]
+ br label %bb69
+
+bb24: ; preds = %bb69
+ br i1 undef, label %bb25, label %bb28
+
+bb25: ; preds = %bb24
+ br label %bb33
+
+bb28: ; preds = %bb24
+ br i1 undef, label %return, label %bb32
+
+bb32: ; preds = %bb28
+ br i1 %0, label %bb38, label %bb33
+
+bb33: ; preds = %bb32, %bb25
+ br i1 undef, label %bb34, label %bb38
+
+bb34: ; preds = %bb33
+ br label %bb38
+
+bb38: ; preds = %bb34, %bb33, %bb32
+ %eRight.08 = phi %struct..0EdgeT* [ %eTop.eMaj, %bb32 ], [ undef, %bb34 ], [ undef, %bb33 ] ; <%struct..0EdgeT*> [#uses=0]
+ %fdgOuter.0 = phi i32 [ %fdgOuter.1, %bb32 ], [ undef, %bb34 ], [ %fdgOuter.1, %bb33 ] ; <i32> [#uses=1]
+ %fz.3 = phi i32 [ %fz.2, %bb32 ], [ 2147483647, %bb34 ], [ %fz.2, %bb33 ] ; <i32> [#uses=1]
+ %1 = add i32 undef, 1 ; <i32> [#uses=0]
+ br label %bb69
+
+bb69: ; preds = %bb38, %bb17
+ %fdgOuter.1 = phi i32 [ undef, %bb17 ], [ %fdgOuter.0, %bb38 ] ; <i32> [#uses=2]
+ %fz.2 = phi i32 [ undef, %bb17 ], [ %fz.3, %bb38 ] ; <i32> [#uses=2]
+ br i1 undef, label %bb24, label %return
+
+return: ; preds = %bb69, %bb28, %bb14, %entry
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/2010-02-04-EmptyGlobal.ll b/test/CodeGen/PowerPC/2010-02-04-EmptyGlobal.ll
new file mode 100644
index 0000000..32ddb34
--- /dev/null
+++ b/test/CodeGen/PowerPC/2010-02-04-EmptyGlobal.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin10 -relocation-model=pic -disable-fp-elim | FileCheck %s
+; <rdar://problem/7604010>
+
+%cmd.type = type { }
+
+@_cmd = constant %cmd.type zeroinitializer
+
+; CHECK: .globl __cmd
+; CHECK-NEXT: .align 3
+; CHECK-NEXT: __cmd:
+; CHECK-NEXT: .space 1
diff --git a/test/CodeGen/PowerPC/Atomics-32.ll b/test/CodeGen/PowerPC/Atomics-32.ll
new file mode 100644
index 0000000..03905a3
--- /dev/null
+++ b/test/CodeGen/PowerPC/Atomics-32.ll
@@ -0,0 +1,749 @@
+; RUN: llc < %s -march=ppc32
+; ModuleID = 'Atomics.c'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9"
+@sc = common global i8 0 ; <i8*> [#uses=52]
+@uc = common global i8 0 ; <i8*> [#uses=100]
+@ss = common global i16 0 ; <i16*> [#uses=15]
+@us = common global i16 0 ; <i16*> [#uses=15]
+@si = common global i32 0 ; <i32*> [#uses=15]
+@ui = common global i32 0 ; <i32*> [#uses=23]
+@sl = common global i32 0 ; <i32*> [#uses=15]
+@ul = common global i32 0 ; <i32*> [#uses=15]
+@sll = common global i64 0, align 8 ; <i64*> [#uses=1]
+@ull = common global i64 0, align 8 ; <i64*> [#uses=1]
+
+define void @test_op_ignore() nounwind {
+entry:
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=0]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %10, i32 1 ) ; <i32>:11 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %12, i32 1 ) ; <i32>:13 [#uses=0]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:14 [#uses=0]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:15 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:16 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %16, i16 1 ) ; <i16>:17 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %18, i16 1 ) ; <i16>:19 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %20, i32 1 ) ; <i32>:21 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:22 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %22, i32 1 ) ; <i32>:23 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:24 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %24, i32 1 ) ; <i32>:25 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:26 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %26, i32 1 ) ; <i32>:27 [#uses=0]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:28 [#uses=0]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:29 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:30 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %30, i16 1 ) ; <i16>:31 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:32 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %32, i16 1 ) ; <i16>:33 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:34 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %34, i32 1 ) ; <i32>:35 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:36 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %36, i32 1 ) ; <i32>:37 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:38 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %38, i32 1 ) ; <i32>:39 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:40 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %40, i32 1 ) ; <i32>:41 [#uses=0]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:42 [#uses=0]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:43 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %44, i16 1 ) ; <i16>:45 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:46 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %46, i16 1 ) ; <i16>:47 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:48 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %48, i32 1 ) ; <i32>:49 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:50 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %50, i32 1 ) ; <i32>:51 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:52 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %52, i32 1 ) ; <i32>:53 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:54 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %54, i32 1 ) ; <i32>:55 [#uses=0]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:56 [#uses=0]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:57 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %58, i16 1 ) ; <i16>:59 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %60, i16 1 ) ; <i16>:61 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:62 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %62, i32 1 ) ; <i32>:63 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:64 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %64, i32 1 ) ; <i32>:65 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:66 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %66, i32 1 ) ; <i32>:67 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:68 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %68, i32 1 ) ; <i32>:69 [#uses=0]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:70 [#uses=0]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:71 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:72 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %72, i16 1 ) ; <i16>:73 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:74 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %74, i16 1 ) ; <i16>:75 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %76, i32 1 ) ; <i32>:77 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:78 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %78, i32 1 ) ; <i32>:79 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:80 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %80, i32 1 ) ; <i32>:81 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:82 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %82, i32 1 ) ; <i32>:83 [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.add.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.sub.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.sub.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.or.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.or.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.xor.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.xor.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.and.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.and.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.nand.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.nand.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.nand.i32.p0i32(i32*, i32) nounwind
+
+define void @test_fetch_and_op() nounwind {
+entry:
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:0 [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:1 [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 11 ) ; <i16>:3 [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 11 ) ; <i16>:5 [#uses=1]
+ store i16 %5, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 11 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 11 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %10, i32 11 ) ; <i32>:11 [#uses=1]
+ store i32 %11, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %12, i32 11 ) ; <i32>:13 [#uses=1]
+ store i32 %13, i32* @ul, align 4
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:14 [#uses=1]
+ store i8 %14, i8* @sc, align 1
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:15 [#uses=1]
+ store i8 %15, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:16 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %16, i16 11 ) ; <i16>:17 [#uses=1]
+ store i16 %17, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %18, i16 11 ) ; <i16>:19 [#uses=1]
+ store i16 %19, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %20, i32 11 ) ; <i32>:21 [#uses=1]
+ store i32 %21, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:22 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %22, i32 11 ) ; <i32>:23 [#uses=1]
+ store i32 %23, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:24 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %24, i32 11 ) ; <i32>:25 [#uses=1]
+ store i32 %25, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:26 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %26, i32 11 ) ; <i32>:27 [#uses=1]
+ store i32 %27, i32* @ul, align 4
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:28 [#uses=1]
+ store i8 %28, i8* @sc, align 1
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:29 [#uses=1]
+ store i8 %29, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:30 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %30, i16 11 ) ; <i16>:31 [#uses=1]
+ store i16 %31, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:32 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %32, i16 11 ) ; <i16>:33 [#uses=1]
+ store i16 %33, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:34 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %34, i32 11 ) ; <i32>:35 [#uses=1]
+ store i32 %35, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:36 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %36, i32 11 ) ; <i32>:37 [#uses=1]
+ store i32 %37, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:38 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %38, i32 11 ) ; <i32>:39 [#uses=1]
+ store i32 %39, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:40 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %40, i32 11 ) ; <i32>:41 [#uses=1]
+ store i32 %41, i32* @ul, align 4
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:42 [#uses=1]
+ store i8 %42, i8* @sc, align 1
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:43 [#uses=1]
+ store i8 %43, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %44, i16 11 ) ; <i16>:45 [#uses=1]
+ store i16 %45, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:46 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %46, i16 11 ) ; <i16>:47 [#uses=1]
+ store i16 %47, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:48 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %48, i32 11 ) ; <i32>:49 [#uses=1]
+ store i32 %49, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:50 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %50, i32 11 ) ; <i32>:51 [#uses=1]
+ store i32 %51, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:52 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %52, i32 11 ) ; <i32>:53 [#uses=1]
+ store i32 %53, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:54 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %54, i32 11 ) ; <i32>:55 [#uses=1]
+ store i32 %55, i32* @ul, align 4
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:56 [#uses=1]
+ store i8 %56, i8* @sc, align 1
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:57 [#uses=1]
+ store i8 %57, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %58, i16 11 ) ; <i16>:59 [#uses=1]
+ store i16 %59, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %60, i16 11 ) ; <i16>:61 [#uses=1]
+ store i16 %61, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:62 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %62, i32 11 ) ; <i32>:63 [#uses=1]
+ store i32 %63, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:64 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %64, i32 11 ) ; <i32>:65 [#uses=1]
+ store i32 %65, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:66 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %66, i32 11 ) ; <i32>:67 [#uses=1]
+ store i32 %67, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:68 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %68, i32 11 ) ; <i32>:69 [#uses=1]
+ store i32 %69, i32* @ul, align 4
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:70 [#uses=1]
+ store i8 %70, i8* @sc, align 1
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:71 [#uses=1]
+ store i8 %71, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:72 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %72, i16 11 ) ; <i16>:73 [#uses=1]
+ store i16 %73, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:74 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %74, i16 11 ) ; <i16>:75 [#uses=1]
+ store i16 %75, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %76, i32 11 ) ; <i32>:77 [#uses=1]
+ store i32 %77, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:78 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %78, i32 11 ) ; <i32>:79 [#uses=1]
+ store i32 %79, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:80 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %80, i32 11 ) ; <i32>:81 [#uses=1]
+ store i32 %81, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:82 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %82, i32 11 ) ; <i32>:83 [#uses=1]
+ store i32 %83, i32* @ul, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_op_and_fetch() nounwind {
+entry:
+ load i8* @uc, align 1 ; <i8>:0 [#uses=2]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 %0 ) ; <i8>:1 [#uses=1]
+ add i8 %1, %0 ; <i8>:2 [#uses=1]
+ store i8 %2, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:3 [#uses=2]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 %3 ) ; <i8>:4 [#uses=1]
+ add i8 %4, %3 ; <i8>:5 [#uses=1]
+ store i8 %5, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:6 [#uses=1]
+ zext i8 %6 to i16 ; <i16>:7 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:8 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %8, i16 %7 ) ; <i16>:9 [#uses=1]
+ add i16 %9, %7 ; <i16>:10 [#uses=1]
+ store i16 %10, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:11 [#uses=1]
+ zext i8 %11 to i16 ; <i16>:12 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:13 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %13, i16 %12 ) ; <i16>:14 [#uses=1]
+ add i16 %14, %12 ; <i16>:15 [#uses=1]
+ store i16 %15, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:16 [#uses=1]
+ zext i8 %16 to i32 ; <i32>:17 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:18 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %18, i32 %17 ) ; <i32>:19 [#uses=1]
+ add i32 %19, %17 ; <i32>:20 [#uses=1]
+ store i32 %20, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:21 [#uses=1]
+ zext i8 %21 to i32 ; <i32>:22 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:23 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %23, i32 %22 ) ; <i32>:24 [#uses=1]
+ add i32 %24, %22 ; <i32>:25 [#uses=1]
+ store i32 %25, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:26 [#uses=1]
+ zext i8 %26 to i32 ; <i32>:27 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:28 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %28, i32 %27 ) ; <i32>:29 [#uses=1]
+ add i32 %29, %27 ; <i32>:30 [#uses=1]
+ store i32 %30, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:31 [#uses=1]
+ zext i8 %31 to i32 ; <i32>:32 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:33 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %33, i32 %32 ) ; <i32>:34 [#uses=1]
+ add i32 %34, %32 ; <i32>:35 [#uses=1]
+ store i32 %35, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:36 [#uses=2]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 %36 ) ; <i8>:37 [#uses=1]
+ sub i8 %37, %36 ; <i8>:38 [#uses=1]
+ store i8 %38, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:39 [#uses=2]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 %39 ) ; <i8>:40 [#uses=1]
+ sub i8 %40, %39 ; <i8>:41 [#uses=1]
+ store i8 %41, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:42 [#uses=1]
+ zext i8 %42 to i16 ; <i16>:43 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %44, i16 %43 ) ; <i16>:45 [#uses=1]
+ sub i16 %45, %43 ; <i16>:46 [#uses=1]
+ store i16 %46, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:47 [#uses=1]
+ zext i8 %47 to i16 ; <i16>:48 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:49 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %49, i16 %48 ) ; <i16>:50 [#uses=1]
+ sub i16 %50, %48 ; <i16>:51 [#uses=1]
+ store i16 %51, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:52 [#uses=1]
+ zext i8 %52 to i32 ; <i32>:53 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:54 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %54, i32 %53 ) ; <i32>:55 [#uses=1]
+ sub i32 %55, %53 ; <i32>:56 [#uses=1]
+ store i32 %56, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:57 [#uses=1]
+ zext i8 %57 to i32 ; <i32>:58 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:59 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %59, i32 %58 ) ; <i32>:60 [#uses=1]
+ sub i32 %60, %58 ; <i32>:61 [#uses=1]
+ store i32 %61, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:62 [#uses=1]
+ zext i8 %62 to i32 ; <i32>:63 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:64 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %64, i32 %63 ) ; <i32>:65 [#uses=1]
+ sub i32 %65, %63 ; <i32>:66 [#uses=1]
+ store i32 %66, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:67 [#uses=1]
+ zext i8 %67 to i32 ; <i32>:68 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:69 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %69, i32 %68 ) ; <i32>:70 [#uses=1]
+ sub i32 %70, %68 ; <i32>:71 [#uses=1]
+ store i32 %71, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:72 [#uses=2]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 %72 ) ; <i8>:73 [#uses=1]
+ or i8 %73, %72 ; <i8>:74 [#uses=1]
+ store i8 %74, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:75 [#uses=2]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 %75 ) ; <i8>:76 [#uses=1]
+ or i8 %76, %75 ; <i8>:77 [#uses=1]
+ store i8 %77, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:78 [#uses=1]
+ zext i8 %78 to i16 ; <i16>:79 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:80 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %80, i16 %79 ) ; <i16>:81 [#uses=1]
+ or i16 %81, %79 ; <i16>:82 [#uses=1]
+ store i16 %82, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:83 [#uses=1]
+ zext i8 %83 to i16 ; <i16>:84 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:85 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %85, i16 %84 ) ; <i16>:86 [#uses=1]
+ or i16 %86, %84 ; <i16>:87 [#uses=1]
+ store i16 %87, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:88 [#uses=1]
+ zext i8 %88 to i32 ; <i32>:89 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:90 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %90, i32 %89 ) ; <i32>:91 [#uses=1]
+ or i32 %91, %89 ; <i32>:92 [#uses=1]
+ store i32 %92, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:93 [#uses=1]
+ zext i8 %93 to i32 ; <i32>:94 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:95 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %95, i32 %94 ) ; <i32>:96 [#uses=1]
+ or i32 %96, %94 ; <i32>:97 [#uses=1]
+ store i32 %97, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:98 [#uses=1]
+ zext i8 %98 to i32 ; <i32>:99 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:100 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %100, i32 %99 ) ; <i32>:101 [#uses=1]
+ or i32 %101, %99 ; <i32>:102 [#uses=1]
+ store i32 %102, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:103 [#uses=1]
+ zext i8 %103 to i32 ; <i32>:104 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:105 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %105, i32 %104 ) ; <i32>:106 [#uses=1]
+ or i32 %106, %104 ; <i32>:107 [#uses=1]
+ store i32 %107, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:108 [#uses=2]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 %108 ) ; <i8>:109 [#uses=1]
+ xor i8 %109, %108 ; <i8>:110 [#uses=1]
+ store i8 %110, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:111 [#uses=2]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 %111 ) ; <i8>:112 [#uses=1]
+ xor i8 %112, %111 ; <i8>:113 [#uses=1]
+ store i8 %113, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:114 [#uses=1]
+ zext i8 %114 to i16 ; <i16>:115 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:116 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %116, i16 %115 ) ; <i16>:117 [#uses=1]
+ xor i16 %117, %115 ; <i16>:118 [#uses=1]
+ store i16 %118, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:119 [#uses=1]
+ zext i8 %119 to i16 ; <i16>:120 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:121 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %121, i16 %120 ) ; <i16>:122 [#uses=1]
+ xor i16 %122, %120 ; <i16>:123 [#uses=1]
+ store i16 %123, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:124 [#uses=1]
+ zext i8 %124 to i32 ; <i32>:125 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:126 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %126, i32 %125 ) ; <i32>:127 [#uses=1]
+ xor i32 %127, %125 ; <i32>:128 [#uses=1]
+ store i32 %128, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:129 [#uses=1]
+ zext i8 %129 to i32 ; <i32>:130 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:131 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %131, i32 %130 ) ; <i32>:132 [#uses=1]
+ xor i32 %132, %130 ; <i32>:133 [#uses=1]
+ store i32 %133, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:134 [#uses=1]
+ zext i8 %134 to i32 ; <i32>:135 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:136 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %136, i32 %135 ) ; <i32>:137 [#uses=1]
+ xor i32 %137, %135 ; <i32>:138 [#uses=1]
+ store i32 %138, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:139 [#uses=1]
+ zext i8 %139 to i32 ; <i32>:140 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:141 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %141, i32 %140 ) ; <i32>:142 [#uses=1]
+ xor i32 %142, %140 ; <i32>:143 [#uses=1]
+ store i32 %143, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:144 [#uses=2]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 %144 ) ; <i8>:145 [#uses=1]
+ and i8 %145, %144 ; <i8>:146 [#uses=1]
+ store i8 %146, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:147 [#uses=2]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 %147 ) ; <i8>:148 [#uses=1]
+ and i8 %148, %147 ; <i8>:149 [#uses=1]
+ store i8 %149, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:150 [#uses=1]
+ zext i8 %150 to i16 ; <i16>:151 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:152 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %152, i16 %151 ) ; <i16>:153 [#uses=1]
+ and i16 %153, %151 ; <i16>:154 [#uses=1]
+ store i16 %154, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:155 [#uses=1]
+ zext i8 %155 to i16 ; <i16>:156 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:157 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %157, i16 %156 ) ; <i16>:158 [#uses=1]
+ and i16 %158, %156 ; <i16>:159 [#uses=1]
+ store i16 %159, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:160 [#uses=1]
+ zext i8 %160 to i32 ; <i32>:161 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:162 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %162, i32 %161 ) ; <i32>:163 [#uses=1]
+ and i32 %163, %161 ; <i32>:164 [#uses=1]
+ store i32 %164, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:165 [#uses=1]
+ zext i8 %165 to i32 ; <i32>:166 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:167 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %167, i32 %166 ) ; <i32>:168 [#uses=1]
+ and i32 %168, %166 ; <i32>:169 [#uses=1]
+ store i32 %169, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:170 [#uses=1]
+ zext i8 %170 to i32 ; <i32>:171 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:172 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %172, i32 %171 ) ; <i32>:173 [#uses=1]
+ and i32 %173, %171 ; <i32>:174 [#uses=1]
+ store i32 %174, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:175 [#uses=1]
+ zext i8 %175 to i32 ; <i32>:176 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:177 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %177, i32 %176 ) ; <i32>:178 [#uses=1]
+ and i32 %178, %176 ; <i32>:179 [#uses=1]
+ store i32 %179, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:180 [#uses=2]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 %180 ) ; <i8>:181 [#uses=1]
+ xor i8 %181, -1 ; <i8>:182 [#uses=1]
+ and i8 %182, %180 ; <i8>:183 [#uses=1]
+ store i8 %183, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:184 [#uses=2]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 %184 ) ; <i8>:185 [#uses=1]
+ xor i8 %185, -1 ; <i8>:186 [#uses=1]
+ and i8 %186, %184 ; <i8>:187 [#uses=1]
+ store i8 %187, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:188 [#uses=1]
+ zext i8 %188 to i16 ; <i16>:189 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:190 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %190, i16 %189 ) ; <i16>:191 [#uses=1]
+ xor i16 %191, -1 ; <i16>:192 [#uses=1]
+ and i16 %192, %189 ; <i16>:193 [#uses=1]
+ store i16 %193, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:194 [#uses=1]
+ zext i8 %194 to i16 ; <i16>:195 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:196 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %196, i16 %195 ) ; <i16>:197 [#uses=1]
+ xor i16 %197, -1 ; <i16>:198 [#uses=1]
+ and i16 %198, %195 ; <i16>:199 [#uses=1]
+ store i16 %199, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:200 [#uses=1]
+ zext i8 %200 to i32 ; <i32>:201 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:202 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %202, i32 %201 ) ; <i32>:203 [#uses=1]
+ xor i32 %203, -1 ; <i32>:204 [#uses=1]
+ and i32 %204, %201 ; <i32>:205 [#uses=1]
+ store i32 %205, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:206 [#uses=1]
+ zext i8 %206 to i32 ; <i32>:207 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:208 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %208, i32 %207 ) ; <i32>:209 [#uses=1]
+ xor i32 %209, -1 ; <i32>:210 [#uses=1]
+ and i32 %210, %207 ; <i32>:211 [#uses=1]
+ store i32 %211, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:212 [#uses=1]
+ zext i8 %212 to i32 ; <i32>:213 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:214 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %214, i32 %213 ) ; <i32>:215 [#uses=1]
+ xor i32 %215, -1 ; <i32>:216 [#uses=1]
+ and i32 %216, %213 ; <i32>:217 [#uses=1]
+ store i32 %217, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:218 [#uses=1]
+ zext i8 %218 to i32 ; <i32>:219 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:220 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %220, i32 %219 ) ; <i32>:221 [#uses=1]
+ xor i32 %221, -1 ; <i32>:222 [#uses=1]
+ and i32 %222, %219 ; <i32>:223 [#uses=1]
+ store i32 %223, i32* @ul, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_compare_and_swap() nounwind {
+entry:
+ load i8* @uc, align 1 ; <i8>:0 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:1 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %0, i8 %1 ) ; <i8>:2 [#uses=1]
+ store i8 %2, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:3 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:4 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %3, i8 %4 ) ; <i8>:5 [#uses=1]
+ store i8 %5, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:6 [#uses=1]
+ zext i8 %6 to i16 ; <i16>:7 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:8 [#uses=1]
+ sext i8 %8 to i16 ; <i16>:9 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:10 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %10, i16 %7, i16 %9 ) ; <i16>:11 [#uses=1]
+ store i16 %11, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:12 [#uses=1]
+ zext i8 %12 to i16 ; <i16>:13 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:14 [#uses=1]
+ sext i8 %14 to i16 ; <i16>:15 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:16 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %16, i16 %13, i16 %15 ) ; <i16>:17 [#uses=1]
+ store i16 %17, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:18 [#uses=1]
+ zext i8 %18 to i32 ; <i32>:19 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:20 [#uses=1]
+ sext i8 %20 to i32 ; <i32>:21 [#uses=1]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:22 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %22, i32 %19, i32 %21 ) ; <i32>:23 [#uses=1]
+ store i32 %23, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:24 [#uses=1]
+ zext i8 %24 to i32 ; <i32>:25 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:26 [#uses=1]
+ sext i8 %26 to i32 ; <i32>:27 [#uses=1]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:28 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %28, i32 %25, i32 %27 ) ; <i32>:29 [#uses=1]
+ store i32 %29, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:30 [#uses=1]
+ zext i8 %30 to i32 ; <i32>:31 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:32 [#uses=1]
+ sext i8 %32 to i32 ; <i32>:33 [#uses=1]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:34 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %34, i32 %31, i32 %33 ) ; <i32>:35 [#uses=1]
+ store i32 %35, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:36 [#uses=1]
+ zext i8 %36 to i32 ; <i32>:37 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:38 [#uses=1]
+ sext i8 %38 to i32 ; <i32>:39 [#uses=1]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:40 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %40, i32 %37, i32 %39 ) ; <i32>:41 [#uses=1]
+ store i32 %41, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:42 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:43 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %42, i8 %43 ) ; <i8>:44 [#uses=1]
+ icmp eq i8 %44, %42 ; <i1>:45 [#uses=1]
+ zext i1 %45 to i32 ; <i32>:46 [#uses=1]
+ store i32 %46, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:47 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:48 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %47, i8 %48 ) ; <i8>:49 [#uses=1]
+ icmp eq i8 %49, %47 ; <i1>:50 [#uses=1]
+ zext i1 %50 to i32 ; <i32>:51 [#uses=1]
+ store i32 %51, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:52 [#uses=1]
+ zext i8 %52 to i16 ; <i16>:53 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:54 [#uses=1]
+ sext i8 %54 to i16 ; <i16>:55 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:56 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %56, i16 %53, i16 %55 ) ; <i16>:57 [#uses=1]
+ icmp eq i16 %57, %53 ; <i1>:58 [#uses=1]
+ zext i1 %58 to i32 ; <i32>:59 [#uses=1]
+ store i32 %59, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:60 [#uses=1]
+ zext i8 %60 to i16 ; <i16>:61 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:62 [#uses=1]
+ sext i8 %62 to i16 ; <i16>:63 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:64 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %64, i16 %61, i16 %63 ) ; <i16>:65 [#uses=1]
+ icmp eq i16 %65, %61 ; <i1>:66 [#uses=1]
+ zext i1 %66 to i32 ; <i32>:67 [#uses=1]
+ store i32 %67, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:68 [#uses=1]
+ zext i8 %68 to i32 ; <i32>:69 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:70 [#uses=1]
+ sext i8 %70 to i32 ; <i32>:71 [#uses=1]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:72 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %72, i32 %69, i32 %71 ) ; <i32>:73 [#uses=1]
+ icmp eq i32 %73, %69 ; <i1>:74 [#uses=1]
+ zext i1 %74 to i32 ; <i32>:75 [#uses=1]
+ store i32 %75, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:76 [#uses=1]
+ zext i8 %76 to i32 ; <i32>:77 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:78 [#uses=1]
+ sext i8 %78 to i32 ; <i32>:79 [#uses=1]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:80 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %80, i32 %77, i32 %79 ) ; <i32>:81 [#uses=1]
+ icmp eq i32 %81, %77 ; <i1>:82 [#uses=1]
+ zext i1 %82 to i32 ; <i32>:83 [#uses=1]
+ store i32 %83, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:84 [#uses=1]
+ zext i8 %84 to i32 ; <i32>:85 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:86 [#uses=1]
+ sext i8 %86 to i32 ; <i32>:87 [#uses=1]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:88 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %88, i32 %85, i32 %87 ) ; <i32>:89 [#uses=1]
+ icmp eq i32 %89, %85 ; <i1>:90 [#uses=1]
+ zext i1 %90 to i32 ; <i32>:91 [#uses=1]
+ store i32 %91, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:92 [#uses=1]
+ zext i8 %92 to i32 ; <i32>:93 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:94 [#uses=1]
+ sext i8 %94 to i32 ; <i32>:95 [#uses=1]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:96 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %96, i32 %93, i32 %95 ) ; <i32>:97 [#uses=1]
+ icmp eq i32 %97, %93 ; <i1>:98 [#uses=1]
+ zext i1 %98 to i32 ; <i32>:99 [#uses=1]
+ store i32 %99, i32* @ui, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8*, i8, i8) nounwind
+
+declare i16 @llvm.atomic.cmp.swap.i16.p0i16(i16*, i16, i16) nounwind
+
+declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind
+
+define void @test_lock() nounwind {
+entry:
+ call i8 @llvm.atomic.swap.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ call i8 @llvm.atomic.swap.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.swap.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.swap.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=1]
+ store i16 %5, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %10, i32 1 ) ; <i32>:11 [#uses=1]
+ store i32 %11, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %12, i32 1 ) ; <i32>:13 [#uses=1]
+ store i32 %13, i32* @ul, align 4
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true, i1 false )
+ volatile store i8 0, i8* @sc, align 1
+ volatile store i8 0, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:14 [#uses=1]
+ volatile store i16 0, i16* %14, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:15 [#uses=1]
+ volatile store i16 0, i16* %15, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:16 [#uses=1]
+ volatile store i32 0, i32* %16, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:17 [#uses=1]
+ volatile store i32 0, i32* %17, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:18 [#uses=1]
+ volatile store i32 0, i32* %18, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:19 [#uses=1]
+ volatile store i32 0, i32* %19, align 4
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:20 [#uses=1]
+ volatile store i64 0, i64* %20, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:21 [#uses=1]
+ volatile store i64 0, i64* %21, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.swap.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.swap.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
diff --git a/test/CodeGen/PowerPC/Atomics-64.ll b/test/CodeGen/PowerPC/Atomics-64.ll
new file mode 100644
index 0000000..1dc4310
--- /dev/null
+++ b/test/CodeGen/PowerPC/Atomics-64.ll
@@ -0,0 +1,773 @@
+; RUN: llc < %s -march=ppc64
+; ModuleID = 'Atomics.c'
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc64-apple-darwin9"
+@sc = common global i8 0 ; <i8*> [#uses=52]
+@uc = common global i8 0 ; <i8*> [#uses=100]
+@ss = common global i16 0 ; <i16*> [#uses=15]
+@us = common global i16 0 ; <i16*> [#uses=15]
+@si = common global i32 0 ; <i32*> [#uses=15]
+@ui = common global i32 0 ; <i32*> [#uses=23]
+@sl = common global i64 0, align 8 ; <i64*> [#uses=15]
+@ul = common global i64 0, align 8 ; <i64*> [#uses=15]
+@sll = common global i64 0, align 8 ; <i64*> [#uses=1]
+@ull = common global i64 0, align 8 ; <i64*> [#uses=1]
+
+define void @test_op_ignore() nounwind {
+entry:
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=0]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:10 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %10, i64 1 ) ; <i64>:11 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:12 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %12, i64 1 ) ; <i64>:13 [#uses=0]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:14 [#uses=0]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:15 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:16 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %16, i16 1 ) ; <i16>:17 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %18, i16 1 ) ; <i16>:19 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %20, i32 1 ) ; <i32>:21 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:22 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %22, i32 1 ) ; <i32>:23 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:24 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %24, i64 1 ) ; <i64>:25 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:26 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %26, i64 1 ) ; <i64>:27 [#uses=0]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:28 [#uses=0]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:29 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:30 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %30, i16 1 ) ; <i16>:31 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:32 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %32, i16 1 ) ; <i16>:33 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:34 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %34, i32 1 ) ; <i32>:35 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:36 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %36, i32 1 ) ; <i32>:37 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:38 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %38, i64 1 ) ; <i64>:39 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:40 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %40, i64 1 ) ; <i64>:41 [#uses=0]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:42 [#uses=0]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:43 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %44, i16 1 ) ; <i16>:45 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:46 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %46, i16 1 ) ; <i16>:47 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:48 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %48, i32 1 ) ; <i32>:49 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:50 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %50, i32 1 ) ; <i32>:51 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:52 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %52, i64 1 ) ; <i64>:53 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:54 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %54, i64 1 ) ; <i64>:55 [#uses=0]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:56 [#uses=0]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:57 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %58, i16 1 ) ; <i16>:59 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %60, i16 1 ) ; <i16>:61 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:62 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %62, i32 1 ) ; <i32>:63 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:64 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %64, i32 1 ) ; <i32>:65 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:66 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %66, i64 1 ) ; <i64>:67 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:68 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %68, i64 1 ) ; <i64>:69 [#uses=0]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:70 [#uses=0]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:71 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:72 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %72, i16 1 ) ; <i16>:73 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:74 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %74, i16 1 ) ; <i16>:75 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %76, i32 1 ) ; <i32>:77 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:78 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %78, i32 1 ) ; <i32>:79 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:80 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %80, i64 1 ) ; <i64>:81 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:82 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %82, i64 1 ) ; <i64>:83 [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.add.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.add.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.sub.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.sub.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.sub.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.or.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.or.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.or.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.xor.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.xor.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.xor.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.and.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.and.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.and.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.nand.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.nand.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.nand.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.nand.i64.p0i64(i64*, i64) nounwind
+
+define void @test_fetch_and_op() nounwind {
+entry:
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:0 [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:1 [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 11 ) ; <i16>:3 [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 11 ) ; <i16>:5 [#uses=1]
+ store i16 %5, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 11 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 11 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:10 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %10, i64 11 ) ; <i64>:11 [#uses=1]
+ store i64 %11, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:12 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %12, i64 11 ) ; <i64>:13 [#uses=1]
+ store i64 %13, i64* @ul, align 8
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:14 [#uses=1]
+ store i8 %14, i8* @sc, align 1
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:15 [#uses=1]
+ store i8 %15, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:16 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %16, i16 11 ) ; <i16>:17 [#uses=1]
+ store i16 %17, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %18, i16 11 ) ; <i16>:19 [#uses=1]
+ store i16 %19, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %20, i32 11 ) ; <i32>:21 [#uses=1]
+ store i32 %21, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:22 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %22, i32 11 ) ; <i32>:23 [#uses=1]
+ store i32 %23, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:24 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %24, i64 11 ) ; <i64>:25 [#uses=1]
+ store i64 %25, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:26 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %26, i64 11 ) ; <i64>:27 [#uses=1]
+ store i64 %27, i64* @ul, align 8
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:28 [#uses=1]
+ store i8 %28, i8* @sc, align 1
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:29 [#uses=1]
+ store i8 %29, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:30 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %30, i16 11 ) ; <i16>:31 [#uses=1]
+ store i16 %31, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:32 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %32, i16 11 ) ; <i16>:33 [#uses=1]
+ store i16 %33, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:34 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %34, i32 11 ) ; <i32>:35 [#uses=1]
+ store i32 %35, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:36 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %36, i32 11 ) ; <i32>:37 [#uses=1]
+ store i32 %37, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:38 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %38, i64 11 ) ; <i64>:39 [#uses=1]
+ store i64 %39, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:40 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %40, i64 11 ) ; <i64>:41 [#uses=1]
+ store i64 %41, i64* @ul, align 8
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:42 [#uses=1]
+ store i8 %42, i8* @sc, align 1
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:43 [#uses=1]
+ store i8 %43, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %44, i16 11 ) ; <i16>:45 [#uses=1]
+ store i16 %45, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:46 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %46, i16 11 ) ; <i16>:47 [#uses=1]
+ store i16 %47, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:48 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %48, i32 11 ) ; <i32>:49 [#uses=1]
+ store i32 %49, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:50 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %50, i32 11 ) ; <i32>:51 [#uses=1]
+ store i32 %51, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:52 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %52, i64 11 ) ; <i64>:53 [#uses=1]
+ store i64 %53, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:54 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %54, i64 11 ) ; <i64>:55 [#uses=1]
+ store i64 %55, i64* @ul, align 8
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:56 [#uses=1]
+ store i8 %56, i8* @sc, align 1
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:57 [#uses=1]
+ store i8 %57, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %58, i16 11 ) ; <i16>:59 [#uses=1]
+ store i16 %59, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %60, i16 11 ) ; <i16>:61 [#uses=1]
+ store i16 %61, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:62 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %62, i32 11 ) ; <i32>:63 [#uses=1]
+ store i32 %63, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:64 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %64, i32 11 ) ; <i32>:65 [#uses=1]
+ store i32 %65, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:66 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %66, i64 11 ) ; <i64>:67 [#uses=1]
+ store i64 %67, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:68 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %68, i64 11 ) ; <i64>:69 [#uses=1]
+ store i64 %69, i64* @ul, align 8
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:70 [#uses=1]
+ store i8 %70, i8* @sc, align 1
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:71 [#uses=1]
+ store i8 %71, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:72 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %72, i16 11 ) ; <i16>:73 [#uses=1]
+ store i16 %73, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:74 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %74, i16 11 ) ; <i16>:75 [#uses=1]
+ store i16 %75, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %76, i32 11 ) ; <i32>:77 [#uses=1]
+ store i32 %77, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:78 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %78, i32 11 ) ; <i32>:79 [#uses=1]
+ store i32 %79, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:80 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %80, i64 11 ) ; <i64>:81 [#uses=1]
+ store i64 %81, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:82 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %82, i64 11 ) ; <i64>:83 [#uses=1]
+ store i64 %83, i64* @ul, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_op_and_fetch() nounwind {
+entry:
+ load i8* @uc, align 1 ; <i8>:0 [#uses=2]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 %0 ) ; <i8>:1 [#uses=1]
+ add i8 %1, %0 ; <i8>:2 [#uses=1]
+ store i8 %2, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:3 [#uses=2]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 %3 ) ; <i8>:4 [#uses=1]
+ add i8 %4, %3 ; <i8>:5 [#uses=1]
+ store i8 %5, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:6 [#uses=1]
+ zext i8 %6 to i16 ; <i16>:7 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:8 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %8, i16 %7 ) ; <i16>:9 [#uses=1]
+ add i16 %9, %7 ; <i16>:10 [#uses=1]
+ store i16 %10, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:11 [#uses=1]
+ zext i8 %11 to i16 ; <i16>:12 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:13 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %13, i16 %12 ) ; <i16>:14 [#uses=1]
+ add i16 %14, %12 ; <i16>:15 [#uses=1]
+ store i16 %15, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:16 [#uses=1]
+ zext i8 %16 to i32 ; <i32>:17 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:18 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %18, i32 %17 ) ; <i32>:19 [#uses=1]
+ add i32 %19, %17 ; <i32>:20 [#uses=1]
+ store i32 %20, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:21 [#uses=1]
+ zext i8 %21 to i32 ; <i32>:22 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:23 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %23, i32 %22 ) ; <i32>:24 [#uses=1]
+ add i32 %24, %22 ; <i32>:25 [#uses=1]
+ store i32 %25, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:26 [#uses=1]
+ zext i8 %26 to i64 ; <i64>:27 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:28 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %28, i64 %27 ) ; <i64>:29 [#uses=1]
+ add i64 %29, %27 ; <i64>:30 [#uses=1]
+ store i64 %30, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:31 [#uses=1]
+ zext i8 %31 to i64 ; <i64>:32 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:33 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %33, i64 %32 ) ; <i64>:34 [#uses=1]
+ add i64 %34, %32 ; <i64>:35 [#uses=1]
+ store i64 %35, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:36 [#uses=2]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 %36 ) ; <i8>:37 [#uses=1]
+ sub i8 %37, %36 ; <i8>:38 [#uses=1]
+ store i8 %38, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:39 [#uses=2]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 %39 ) ; <i8>:40 [#uses=1]
+ sub i8 %40, %39 ; <i8>:41 [#uses=1]
+ store i8 %41, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:42 [#uses=1]
+ zext i8 %42 to i16 ; <i16>:43 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %44, i16 %43 ) ; <i16>:45 [#uses=1]
+ sub i16 %45, %43 ; <i16>:46 [#uses=1]
+ store i16 %46, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:47 [#uses=1]
+ zext i8 %47 to i16 ; <i16>:48 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:49 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %49, i16 %48 ) ; <i16>:50 [#uses=1]
+ sub i16 %50, %48 ; <i16>:51 [#uses=1]
+ store i16 %51, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:52 [#uses=1]
+ zext i8 %52 to i32 ; <i32>:53 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:54 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %54, i32 %53 ) ; <i32>:55 [#uses=1]
+ sub i32 %55, %53 ; <i32>:56 [#uses=1]
+ store i32 %56, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:57 [#uses=1]
+ zext i8 %57 to i32 ; <i32>:58 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:59 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %59, i32 %58 ) ; <i32>:60 [#uses=1]
+ sub i32 %60, %58 ; <i32>:61 [#uses=1]
+ store i32 %61, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:62 [#uses=1]
+ zext i8 %62 to i64 ; <i64>:63 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:64 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %64, i64 %63 ) ; <i64>:65 [#uses=1]
+ sub i64 %65, %63 ; <i64>:66 [#uses=1]
+ store i64 %66, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:67 [#uses=1]
+ zext i8 %67 to i64 ; <i64>:68 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:69 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %69, i64 %68 ) ; <i64>:70 [#uses=1]
+ sub i64 %70, %68 ; <i64>:71 [#uses=1]
+ store i64 %71, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:72 [#uses=2]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 %72 ) ; <i8>:73 [#uses=1]
+ or i8 %73, %72 ; <i8>:74 [#uses=1]
+ store i8 %74, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:75 [#uses=2]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 %75 ) ; <i8>:76 [#uses=1]
+ or i8 %76, %75 ; <i8>:77 [#uses=1]
+ store i8 %77, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:78 [#uses=1]
+ zext i8 %78 to i16 ; <i16>:79 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:80 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %80, i16 %79 ) ; <i16>:81 [#uses=1]
+ or i16 %81, %79 ; <i16>:82 [#uses=1]
+ store i16 %82, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:83 [#uses=1]
+ zext i8 %83 to i16 ; <i16>:84 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:85 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %85, i16 %84 ) ; <i16>:86 [#uses=1]
+ or i16 %86, %84 ; <i16>:87 [#uses=1]
+ store i16 %87, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:88 [#uses=1]
+ zext i8 %88 to i32 ; <i32>:89 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:90 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %90, i32 %89 ) ; <i32>:91 [#uses=1]
+ or i32 %91, %89 ; <i32>:92 [#uses=1]
+ store i32 %92, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:93 [#uses=1]
+ zext i8 %93 to i32 ; <i32>:94 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:95 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %95, i32 %94 ) ; <i32>:96 [#uses=1]
+ or i32 %96, %94 ; <i32>:97 [#uses=1]
+ store i32 %97, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:98 [#uses=1]
+ zext i8 %98 to i64 ; <i64>:99 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:100 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %100, i64 %99 ) ; <i64>:101 [#uses=1]
+ or i64 %101, %99 ; <i64>:102 [#uses=1]
+ store i64 %102, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:103 [#uses=1]
+ zext i8 %103 to i64 ; <i64>:104 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:105 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %105, i64 %104 ) ; <i64>:106 [#uses=1]
+ or i64 %106, %104 ; <i64>:107 [#uses=1]
+ store i64 %107, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:108 [#uses=2]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 %108 ) ; <i8>:109 [#uses=1]
+ xor i8 %109, %108 ; <i8>:110 [#uses=1]
+ store i8 %110, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:111 [#uses=2]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 %111 ) ; <i8>:112 [#uses=1]
+ xor i8 %112, %111 ; <i8>:113 [#uses=1]
+ store i8 %113, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:114 [#uses=1]
+ zext i8 %114 to i16 ; <i16>:115 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:116 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %116, i16 %115 ) ; <i16>:117 [#uses=1]
+ xor i16 %117, %115 ; <i16>:118 [#uses=1]
+ store i16 %118, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:119 [#uses=1]
+ zext i8 %119 to i16 ; <i16>:120 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:121 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %121, i16 %120 ) ; <i16>:122 [#uses=1]
+ xor i16 %122, %120 ; <i16>:123 [#uses=1]
+ store i16 %123, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:124 [#uses=1]
+ zext i8 %124 to i32 ; <i32>:125 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:126 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %126, i32 %125 ) ; <i32>:127 [#uses=1]
+ xor i32 %127, %125 ; <i32>:128 [#uses=1]
+ store i32 %128, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:129 [#uses=1]
+ zext i8 %129 to i32 ; <i32>:130 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:131 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %131, i32 %130 ) ; <i32>:132 [#uses=1]
+ xor i32 %132, %130 ; <i32>:133 [#uses=1]
+ store i32 %133, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:134 [#uses=1]
+ zext i8 %134 to i64 ; <i64>:135 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:136 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %136, i64 %135 ) ; <i64>:137 [#uses=1]
+ xor i64 %137, %135 ; <i64>:138 [#uses=1]
+ store i64 %138, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:139 [#uses=1]
+ zext i8 %139 to i64 ; <i64>:140 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:141 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %141, i64 %140 ) ; <i64>:142 [#uses=1]
+ xor i64 %142, %140 ; <i64>:143 [#uses=1]
+ store i64 %143, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:144 [#uses=2]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 %144 ) ; <i8>:145 [#uses=1]
+ and i8 %145, %144 ; <i8>:146 [#uses=1]
+ store i8 %146, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:147 [#uses=2]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 %147 ) ; <i8>:148 [#uses=1]
+ and i8 %148, %147 ; <i8>:149 [#uses=1]
+ store i8 %149, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:150 [#uses=1]
+ zext i8 %150 to i16 ; <i16>:151 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:152 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %152, i16 %151 ) ; <i16>:153 [#uses=1]
+ and i16 %153, %151 ; <i16>:154 [#uses=1]
+ store i16 %154, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:155 [#uses=1]
+ zext i8 %155 to i16 ; <i16>:156 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:157 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %157, i16 %156 ) ; <i16>:158 [#uses=1]
+ and i16 %158, %156 ; <i16>:159 [#uses=1]
+ store i16 %159, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:160 [#uses=1]
+ zext i8 %160 to i32 ; <i32>:161 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:162 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %162, i32 %161 ) ; <i32>:163 [#uses=1]
+ and i32 %163, %161 ; <i32>:164 [#uses=1]
+ store i32 %164, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:165 [#uses=1]
+ zext i8 %165 to i32 ; <i32>:166 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:167 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %167, i32 %166 ) ; <i32>:168 [#uses=1]
+ and i32 %168, %166 ; <i32>:169 [#uses=1]
+ store i32 %169, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:170 [#uses=1]
+ zext i8 %170 to i64 ; <i64>:171 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:172 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %172, i64 %171 ) ; <i64>:173 [#uses=1]
+ and i64 %173, %171 ; <i64>:174 [#uses=1]
+ store i64 %174, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:175 [#uses=1]
+ zext i8 %175 to i64 ; <i64>:176 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:177 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %177, i64 %176 ) ; <i64>:178 [#uses=1]
+ and i64 %178, %176 ; <i64>:179 [#uses=1]
+ store i64 %179, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:180 [#uses=2]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 %180 ) ; <i8>:181 [#uses=1]
+ xor i8 %181, -1 ; <i8>:182 [#uses=1]
+ and i8 %182, %180 ; <i8>:183 [#uses=1]
+ store i8 %183, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:184 [#uses=2]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 %184 ) ; <i8>:185 [#uses=1]
+ xor i8 %185, -1 ; <i8>:186 [#uses=1]
+ and i8 %186, %184 ; <i8>:187 [#uses=1]
+ store i8 %187, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:188 [#uses=1]
+ zext i8 %188 to i16 ; <i16>:189 [#uses=2]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:190 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %190, i16 %189 ) ; <i16>:191 [#uses=1]
+ xor i16 %191, -1 ; <i16>:192 [#uses=1]
+ and i16 %192, %189 ; <i16>:193 [#uses=1]
+ store i16 %193, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:194 [#uses=1]
+ zext i8 %194 to i16 ; <i16>:195 [#uses=2]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:196 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %196, i16 %195 ) ; <i16>:197 [#uses=1]
+ xor i16 %197, -1 ; <i16>:198 [#uses=1]
+ and i16 %198, %195 ; <i16>:199 [#uses=1]
+ store i16 %199, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:200 [#uses=1]
+ zext i8 %200 to i32 ; <i32>:201 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:202 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %202, i32 %201 ) ; <i32>:203 [#uses=1]
+ xor i32 %203, -1 ; <i32>:204 [#uses=1]
+ and i32 %204, %201 ; <i32>:205 [#uses=1]
+ store i32 %205, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:206 [#uses=1]
+ zext i8 %206 to i32 ; <i32>:207 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:208 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %208, i32 %207 ) ; <i32>:209 [#uses=1]
+ xor i32 %209, -1 ; <i32>:210 [#uses=1]
+ and i32 %210, %207 ; <i32>:211 [#uses=1]
+ store i32 %211, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:212 [#uses=1]
+ zext i8 %212 to i64 ; <i64>:213 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:214 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %214, i64 %213 ) ; <i64>:215 [#uses=1]
+ xor i64 %215, -1 ; <i64>:216 [#uses=1]
+ and i64 %216, %213 ; <i64>:217 [#uses=1]
+ store i64 %217, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:218 [#uses=1]
+ zext i8 %218 to i64 ; <i64>:219 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:220 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %220, i64 %219 ) ; <i64>:221 [#uses=1]
+ xor i64 %221, -1 ; <i64>:222 [#uses=1]
+ and i64 %222, %219 ; <i64>:223 [#uses=1]
+ store i64 %223, i64* @ul, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_compare_and_swap() nounwind {
+entry:
+ load i8* @uc, align 1 ; <i8>:0 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:1 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %0, i8 %1 ) ; <i8>:2 [#uses=1]
+ store i8 %2, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:3 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:4 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %3, i8 %4 ) ; <i8>:5 [#uses=1]
+ store i8 %5, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:6 [#uses=1]
+ zext i8 %6 to i16 ; <i16>:7 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:8 [#uses=1]
+ sext i8 %8 to i16 ; <i16>:9 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:10 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %10, i16 %7, i16 %9 ) ; <i16>:11 [#uses=1]
+ store i16 %11, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:12 [#uses=1]
+ zext i8 %12 to i16 ; <i16>:13 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:14 [#uses=1]
+ sext i8 %14 to i16 ; <i16>:15 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:16 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %16, i16 %13, i16 %15 ) ; <i16>:17 [#uses=1]
+ store i16 %17, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:18 [#uses=1]
+ zext i8 %18 to i32 ; <i32>:19 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:20 [#uses=1]
+ sext i8 %20 to i32 ; <i32>:21 [#uses=1]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:22 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %22, i32 %19, i32 %21 ) ; <i32>:23 [#uses=1]
+ store i32 %23, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:24 [#uses=1]
+ zext i8 %24 to i32 ; <i32>:25 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:26 [#uses=1]
+ sext i8 %26 to i32 ; <i32>:27 [#uses=1]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:28 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %28, i32 %25, i32 %27 ) ; <i32>:29 [#uses=1]
+ store i32 %29, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:30 [#uses=1]
+ zext i8 %30 to i64 ; <i64>:31 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:32 [#uses=1]
+ sext i8 %32 to i64 ; <i64>:33 [#uses=1]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:34 [#uses=1]
+ call i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* %34, i64 %31, i64 %33 ) ; <i64>:35 [#uses=1]
+ store i64 %35, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:36 [#uses=1]
+ zext i8 %36 to i64 ; <i64>:37 [#uses=1]
+ load i8* @sc, align 1 ; <i8>:38 [#uses=1]
+ sext i8 %38 to i64 ; <i64>:39 [#uses=1]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:40 [#uses=1]
+ call i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* %40, i64 %37, i64 %39 ) ; <i64>:41 [#uses=1]
+ store i64 %41, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:42 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:43 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %42, i8 %43 ) ; <i8>:44 [#uses=1]
+ icmp eq i8 %44, %42 ; <i1>:45 [#uses=1]
+ zext i1 %45 to i8 ; <i8>:46 [#uses=1]
+ zext i8 %46 to i32 ; <i32>:47 [#uses=1]
+ store i32 %47, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:48 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:49 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %48, i8 %49 ) ; <i8>:50 [#uses=1]
+ icmp eq i8 %50, %48 ; <i1>:51 [#uses=1]
+ zext i1 %51 to i8 ; <i8>:52 [#uses=1]
+ zext i8 %52 to i32 ; <i32>:53 [#uses=1]
+ store i32 %53, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:54 [#uses=1]
+ zext i8 %54 to i16 ; <i16>:55 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:56 [#uses=1]
+ sext i8 %56 to i16 ; <i16>:57 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %58, i16 %55, i16 %57 ) ; <i16>:59 [#uses=1]
+ icmp eq i16 %59, %55 ; <i1>:60 [#uses=1]
+ zext i1 %60 to i8 ; <i8>:61 [#uses=1]
+ zext i8 %61 to i32 ; <i32>:62 [#uses=1]
+ store i32 %62, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:63 [#uses=1]
+ zext i8 %63 to i16 ; <i16>:64 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:65 [#uses=1]
+ sext i8 %65 to i16 ; <i16>:66 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:67 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %67, i16 %64, i16 %66 ) ; <i16>:68 [#uses=1]
+ icmp eq i16 %68, %64 ; <i1>:69 [#uses=1]
+ zext i1 %69 to i8 ; <i8>:70 [#uses=1]
+ zext i8 %70 to i32 ; <i32>:71 [#uses=1]
+ store i32 %71, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:72 [#uses=1]
+ zext i8 %72 to i32 ; <i32>:73 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:74 [#uses=1]
+ sext i8 %74 to i32 ; <i32>:75 [#uses=1]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %76, i32 %73, i32 %75 ) ; <i32>:77 [#uses=1]
+ icmp eq i32 %77, %73 ; <i1>:78 [#uses=1]
+ zext i1 %78 to i8 ; <i8>:79 [#uses=1]
+ zext i8 %79 to i32 ; <i32>:80 [#uses=1]
+ store i32 %80, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:81 [#uses=1]
+ zext i8 %81 to i32 ; <i32>:82 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:83 [#uses=1]
+ sext i8 %83 to i32 ; <i32>:84 [#uses=1]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:85 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %85, i32 %82, i32 %84 ) ; <i32>:86 [#uses=1]
+ icmp eq i32 %86, %82 ; <i1>:87 [#uses=1]
+ zext i1 %87 to i8 ; <i8>:88 [#uses=1]
+ zext i8 %88 to i32 ; <i32>:89 [#uses=1]
+ store i32 %89, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:90 [#uses=1]
+ zext i8 %90 to i64 ; <i64>:91 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:92 [#uses=1]
+ sext i8 %92 to i64 ; <i64>:93 [#uses=1]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:94 [#uses=1]
+ call i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* %94, i64 %91, i64 %93 ) ; <i64>:95 [#uses=1]
+ icmp eq i64 %95, %91 ; <i1>:96 [#uses=1]
+ zext i1 %96 to i8 ; <i8>:97 [#uses=1]
+ zext i8 %97 to i32 ; <i32>:98 [#uses=1]
+ store i32 %98, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:99 [#uses=1]
+ zext i8 %99 to i64 ; <i64>:100 [#uses=2]
+ load i8* @sc, align 1 ; <i8>:101 [#uses=1]
+ sext i8 %101 to i64 ; <i64>:102 [#uses=1]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:103 [#uses=1]
+ call i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* %103, i64 %100, i64 %102 ) ; <i64>:104 [#uses=1]
+ icmp eq i64 %104, %100 ; <i1>:105 [#uses=1]
+ zext i1 %105 to i8 ; <i8>:106 [#uses=1]
+ zext i8 %106 to i32 ; <i32>:107 [#uses=1]
+ store i32 %107, i32* @ui, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8*, i8, i8) nounwind
+
+declare i16 @llvm.atomic.cmp.swap.i16.p0i16(i16*, i16, i16) nounwind
+
+declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind
+
+declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64*, i64, i64) nounwind
+
+define void @test_lock() nounwind {
+entry:
+ call i8 @llvm.atomic.swap.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ call i8 @llvm.atomic.swap.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.swap.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.swap.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=1]
+ store i16 %5, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:10 [#uses=1]
+ call i64 @llvm.atomic.swap.i64.p0i64( i64* %10, i64 1 ) ; <i64>:11 [#uses=1]
+ store i64 %11, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:12 [#uses=1]
+ call i64 @llvm.atomic.swap.i64.p0i64( i64* %12, i64 1 ) ; <i64>:13 [#uses=1]
+ store i64 %13, i64* @ul, align 8
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true, i1 false )
+ volatile store i8 0, i8* @sc, align 1
+ volatile store i8 0, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:14 [#uses=1]
+ volatile store i16 0, i16* %14, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:15 [#uses=1]
+ volatile store i16 0, i16* %15, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:16 [#uses=1]
+ volatile store i32 0, i32* %16, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:17 [#uses=1]
+ volatile store i32 0, i32* %17, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:18 [#uses=1]
+ volatile store i64 0, i64* %18, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:19 [#uses=1]
+ volatile store i64 0, i64* %19, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:20 [#uses=1]
+ volatile store i64 0, i64* %20, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:21 [#uses=1]
+ volatile store i64 0, i64* %21, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.swap.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.swap.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.swap.i64.p0i64(i64*, i64) nounwind
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
diff --git a/test/CodeGen/PowerPC/Frames-alloca.ll b/test/CodeGen/PowerPC/Frames-alloca.ll
new file mode 100644
index 0000000..aed4fdb
--- /dev/null
+++ b/test/CodeGen/PowerPC/Frames-alloca.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=PPC32
+; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=PPC64
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=PPC32-NOFP
+; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=PPC64-NOFP
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -enable-ppc32-regscavenger | FileCheck %s -check-prefix=PPC32
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -enable-ppc32-regscavenger | FileCheck %s -check-prefix=PPC32-RS
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim -enable-ppc32-regscavenger | FileCheck %s -check-prefix=PPC32-RS-NOFP
+
+; CHECK-PPC32: stw r31, -4(r1)
+; CHECK-PPC32: lwz r1, 0(r1)
+; CHECK-PPC32: lwz r31, -4(r1)
+; CHECK-PPC32-NOFP: stw r31, -4(r1)
+; CHECK-PPC32-NOFP: lwz r1, 0(r1)
+; CHECK-PPC32-NOFP: lwz r31, -4(r1)
+; CHECK-PPC32-RS: stwu r1, -80(r1)
+; CHECK-PPC32-RS-NOFP: stwu r1, -80(r1)
+
+; CHECK-PPC64: std r31, -8(r1)
+; CHECK-PPC64: stdu r1, -128(r1)
+; CHECK-PPC64: ld r1, 0(r1)
+; CHECK-PPC64: ld r31, -8(r1)
+; CHECK-PPC64-NOFP: std r31, -8(r1)
+; CHECK-PPC64-NOFP: stdu r1, -128(r1)
+; CHECK-PPC64-NOFP: ld r1, 0(r1)
+; CHECK-PPC64-NOFP: ld r31, -8(r1)
+
+define i32* @f1(i32 %n) {
+ %tmp = alloca i32, i32 %n ; <i32*> [#uses=1]
+ ret i32* %tmp
+}
diff --git a/test/CodeGen/PowerPC/Frames-large.ll b/test/CodeGen/PowerPC/Frames-large.ll
new file mode 100644
index 0000000..302d3df
--- /dev/null
+++ b/test/CodeGen/PowerPC/Frames-large.ll
@@ -0,0 +1,52 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: llc < %t.bc -march=ppc32 | FileCheck %s -check-prefix=PPC32-NOFP
+; RUN: llc < %t.bc -march=ppc32 -disable-fp-elim | FileCheck %s -check-prefix=PPC32-FP
+
+; RUN: llc < %t.bc -march=ppc64 | FileCheck %s -check-prefix=PPC64-NOFP
+; RUN: llc < %t.bc -march=ppc64 -disable-fp-elim | FileCheck %s -check-prefix=PPC64-FP
+
+
+target triple = "powerpc-apple-darwin8"
+
+define i32* @f1() nounwind {
+ %tmp = alloca i32, i32 8191 ; <i32*> [#uses=1]
+ ret i32* %tmp
+}
+
+; PPC32-NOFP: _f1:
+; PPC32-NOFP: lis r0, -1
+; PPC32-NOFP: ori r0, r0, 32704
+; PPC32-NOFP: stwux r1, r1, r0
+; PPC32-NOFP: addi r3, r1, 68
+; PPC32-NOFP: lwz r1, 0(r1)
+; PPC32-NOFP: blr
+
+; PPC32-FP: _f1:
+; PPC32-FP: stw r31, -4(r1)
+; PPC32-FP: lis r0, -1
+; PPC32-FP: ori r0, r0, 32704
+; PPC32-FP: stwux r1, r1, r0
+; ...
+; PPC32-FP: lwz r1, 0(r1)
+; PPC32-FP: lwz r31, -4(r1)
+; PPC32-FP: blr
+
+
+; PPC64-NOFP: _f1:
+; PPC64-NOFP: lis r0, -1
+; PPC64-NOFP: ori r0, r0, 32656
+; PPC64-NOFP: stdux r1, r1, r0
+; PPC64-NOFP: addi r3, r1, 116
+; PPC64-NOFP: ld r1, 0(r1)
+; PPC64-NOFP: blr
+
+
+; PPC64-FP: _f1:
+; PPC64-FP: std r31, -8(r1)
+; PPC64-FP: lis r0, -1
+; PPC64-FP: ori r0, r0, 32640
+; PPC64-FP: stdux r1, r1, r0
+; ...
+; PPC64-FP: ld r1, 0(r1)
+; PPC64-FP: ld r31, -8(r1)
+; PPC64-FP: blr
diff --git a/test/CodeGen/PowerPC/Frames-leaf.ll b/test/CodeGen/PowerPC/Frames-leaf.ll
new file mode 100644
index 0000000..c2e1d6b
--- /dev/null
+++ b/test/CodeGen/PowerPC/Frames-leaf.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=ppc32 | \
+; RUN: not grep {stw r31, 20(r1)}
+; RUN: llc < %s -march=ppc32 | \
+; RUN: not grep {stwu r1, -.*(r1)}
+; RUN: llc < %s -march=ppc32 | \
+; RUN: not grep {addi r1, r1, }
+; RUN: llc < %s -march=ppc32 | \
+; RUN: not grep {lwz r31, 20(r1)}
+; RUN: llc < %s -march=ppc32 -disable-fp-elim | \
+; RUN: not grep {stw r31, 20(r1)}
+; RUN: llc < %s -march=ppc32 -disable-fp-elim | \
+; RUN: not grep {stwu r1, -.*(r1)}
+; RUN: llc < %s -march=ppc32 -disable-fp-elim | \
+; RUN: not grep {addi r1, r1, }
+; RUN: llc < %s -march=ppc32 -disable-fp-elim | \
+; RUN: not grep {lwz r31, 20(r1)}
+; RUN: llc < %s -march=ppc64 | \
+; RUN: not grep {std r31, 40(r1)}
+; RUN: llc < %s -march=ppc64 | \
+; RUN: not grep {stdu r1, -.*(r1)}
+; RUN: llc < %s -march=ppc64 | \
+; RUN: not grep {addi r1, r1, }
+; RUN: llc < %s -march=ppc64 | \
+; RUN: not grep {ld r31, 40(r1)}
+; RUN: llc < %s -march=ppc64 -disable-fp-elim | \
+; RUN: not grep {stw r31, 40(r1)}
+; RUN: llc < %s -march=ppc64 -disable-fp-elim | \
+; RUN: not grep {stdu r1, -.*(r1)}
+; RUN: llc < %s -march=ppc64 -disable-fp-elim | \
+; RUN: not grep {addi r1, r1, }
+; RUN: llc < %s -march=ppc64 -disable-fp-elim | \
+; RUN: not grep {ld r31, 40(r1)}
+
+define i32* @f1() {
+ %tmp = alloca i32, i32 2 ; <i32*> [#uses=1]
+ ret i32* %tmp
+}
diff --git a/test/CodeGen/PowerPC/Frames-small.ll b/test/CodeGen/PowerPC/Frames-small.ll
new file mode 100644
index 0000000..404fdd0
--- /dev/null
+++ b/test/CodeGen/PowerPC/Frames-small.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1
+; RUN not grep {stw r31, -4(r1)} %t1
+; RUN: grep {stwu r1, -16448(r1)} %t1
+; RUN: grep {addi r1, r1, 16448} %t1
+; RUN: llc < %s -march=ppc32 | \
+; RUN: not grep {lwz r31, -4(r1)}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
+; RUN: -o %t2
+; RUN: grep {stw r31, -4(r1)} %t2
+; RUN: grep {stwu r1, -16448(r1)} %t2
+; RUN: grep {addi r1, r1, 16448} %t2
+; RUN: grep {lwz r31, -4(r1)} %t2
+; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3
+; RUN: not grep {std r31, -8(r1)} %t3
+; RUN: grep {stdu r1, -16496(r1)} %t3
+; RUN: grep {addi r1, r1, 16496} %t3
+; RUN: not grep {ld r31, -8(r1)} %t3
+; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
+; RUN: -o %t4
+; RUN: grep {std r31, -8(r1)} %t4
+; RUN: grep {stdu r1, -16512(r1)} %t4
+; RUN: grep {addi r1, r1, 16512} %t4
+; RUN: grep {ld r31, -8(r1)} %t4
+
+define i32* @f1() {
+ %tmp = alloca i32, i32 4095 ; <i32*> [#uses=1]
+ ret i32* %tmp
+}
+
diff --git a/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll b/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
new file mode 100644
index 0000000..0f7acac
--- /dev/null
+++ b/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin | \
+; RUN: grep {stw r3, 32751}
+; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin | \
+; RUN: grep {stw r3, 32751}
+; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin | \
+; RUN: grep {std r2, 9024}
+
+define void @test() {
+ store i32 0, i32* inttoptr (i64 48725999 to i32*)
+ ret void
+}
+
+define void @test2() {
+ store i64 0, i64* inttoptr (i64 74560 to i64*)
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/addc.ll b/test/CodeGen/PowerPC/addc.ll
new file mode 100644
index 0000000..09a7fbd
--- /dev/null
+++ b/test/CodeGen/PowerPC/addc.ll
@@ -0,0 +1,26 @@
+; All of these should be codegen'd without loading immediates
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: grep addc %t | count 1
+; RUN: grep adde %t | count 1
+; RUN: grep addze %t | count 1
+; RUN: grep addme %t | count 1
+; RUN: grep addic %t | count 2
+
+define i64 @add_ll(i64 %a, i64 %b) {
+entry:
+ %tmp.2 = add i64 %b, %a ; <i64> [#uses=1]
+ ret i64 %tmp.2
+}
+
+define i64 @add_l_5(i64 %a) {
+entry:
+ %tmp.1 = add i64 %a, 5 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i64 @add_l_m5(i64 %a) {
+entry:
+ %tmp.1 = add i64 %a, -5 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
diff --git a/test/CodeGen/PowerPC/addi-reassoc.ll b/test/CodeGen/PowerPC/addi-reassoc.ll
new file mode 100644
index 0000000..2b71ce6
--- /dev/null
+++ b/test/CodeGen/PowerPC/addi-reassoc.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=ppc32 | not grep addi
+
+ %struct.X = type { [5 x i8] }
+
+define i32 @test1([4 x i32]* %P, i32 %i) {
+ %tmp.2 = add i32 %i, 2 ; <i32> [#uses=1]
+ %tmp.4 = getelementptr [4 x i32]* %P, i32 %tmp.2, i32 1 ; <i32*> [#uses=1]
+ %tmp.5 = load i32* %tmp.4 ; <i32> [#uses=1]
+ ret i32 %tmp.5
+}
+
+define i32 @test2(%struct.X* %P, i32 %i) {
+ %tmp.2 = add i32 %i, 2 ; <i32> [#uses=1]
+ %tmp.5 = getelementptr %struct.X* %P, i32 %tmp.2, i32 0, i32 1 ; <i8*> [#uses=1]
+ %tmp.6 = load i8* %tmp.5 ; <i8> [#uses=1]
+ %tmp.7 = sext i8 %tmp.6 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.7
+}
+
diff --git a/test/CodeGen/PowerPC/align.ll b/test/CodeGen/PowerPC/align.ll
new file mode 100644
index 0000000..109a837
--- /dev/null
+++ b/test/CodeGen/PowerPC/align.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -mtriple=powerpc-linux-gnu | FileCheck %s -check-prefix=ELF
+; RUN: llc < %s -mtriple=powerpc-apple-darwin9 | FileCheck %s -check-prefix=DARWIN
+
+@a = global i1 true
+; no alignment
+
+@b = global i8 1
+; no alignment
+
+@c = global i16 2
+;ELF: .align 1
+;ELF: c:
+;DARWIN: .align 1
+;DARWIN: _c:
+
+@d = global i32 3
+;ELF: .align 2
+;ELF: d:
+;DARWIN: .align 2
+;DARWIN: _d:
+
+@e = global i64 4
+;ELF: .align 3
+;ELF: e
+;DARWIN: .align 3
+;DARWIN: _e:
+
+@f = global float 5.0
+;ELF: .align 2
+;ELF: f:
+;DARWIN: .align 2
+;DARWIN: _f:
+
+@g = global double 6.0
+;ELF: .align 3
+;ELF: g:
+;DARWIN: .align 3
+;DARWIN: _g:
+
+@bar = common global [75 x i8] zeroinitializer, align 128
+;ELF: .comm bar,75,128
+;DARWIN: .comm _bar,75,7
diff --git a/test/CodeGen/PowerPC/and-branch.ll b/test/CodeGen/PowerPC/and-branch.ll
new file mode 100644
index 0000000..0484f88
--- /dev/null
+++ b/test/CodeGen/PowerPC/and-branch.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=ppc32 | not grep mfcr
+
+define void @foo(i32 %X, i32 %Y, i32 %Z) {
+entry:
+ %tmp = icmp eq i32 %X, 0 ; <i1> [#uses=1]
+ %tmp3 = icmp slt i32 %Y, 5 ; <i1> [#uses=1]
+ %tmp4 = and i1 %tmp3, %tmp ; <i1> [#uses=1]
+ br i1 %tmp4, label %cond_true, label %UnifiedReturnBlock
+cond_true: ; preds = %entry
+ %tmp5 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
+
diff --git a/test/CodeGen/PowerPC/and-elim.ll b/test/CodeGen/PowerPC/and-elim.ll
new file mode 100644
index 0000000..3685361
--- /dev/null
+++ b/test/CodeGen/PowerPC/and-elim.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=ppc32 | not grep rlwin
+
+define void @test(i8* %P) {
+ %W = load i8* %P
+ %X = shl i8 %W, 1
+ %Y = add i8 %X, 2
+ %Z = and i8 %Y, 254 ; dead and
+ store i8 %Z, i8* %P
+ ret void
+}
+
+define i16 @test2(i16 zeroext %crc) zeroext {
+ ; No and's should be needed for the i16s here.
+ %tmp.1 = lshr i16 %crc, 1
+ %tmp.7 = xor i16 %tmp.1, 40961
+ ret i16 %tmp.7
+}
+
diff --git a/test/CodeGen/PowerPC/and-imm.ll b/test/CodeGen/PowerPC/and-imm.ll
new file mode 100644
index 0000000..64a45e5
--- /dev/null
+++ b/test/CodeGen/PowerPC/and-imm.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc32 | not grep {ori\\|lis}
+
+; andi. r3, r3, 32769
+define i32 @test(i32 %X) {
+ %Y = and i32 %X, 32769 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+; andis. r3, r3, 32769
+define i32 @test2(i32 %X) {
+ %Y = and i32 %X, -2147418112 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/CodeGen/PowerPC/and_add.ll b/test/CodeGen/PowerPC/and_add.ll
new file mode 100644
index 0000000..517e775
--- /dev/null
+++ b/test/CodeGen/PowerPC/and_add.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: grep slwi %t
+; RUN: not grep addi %t
+; RUN: not grep rlwinm %t
+
+define i32 @test(i32 %A) {
+ ;; shift
+ %B = mul i32 %A, 8 ; <i32> [#uses=1]
+ ;; dead, no demanded bits.
+ %C = add i32 %B, 7 ; <i32> [#uses=1]
+ ;; dead once add is gone.
+ %D = and i32 %C, -8 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
diff --git a/test/CodeGen/PowerPC/and_sext.ll b/test/CodeGen/PowerPC/and_sext.ll
new file mode 100644
index 0000000..c6d234ea
--- /dev/null
+++ b/test/CodeGen/PowerPC/and_sext.ll
@@ -0,0 +1,28 @@
+; These tests should not contain a sign extend.
+; RUN: llc < %s -march=ppc32 | not grep extsh
+; RUN: llc < %s -march=ppc32 | not grep extsb
+
+define i32 @test1(i32 %mode.0.i.0) {
+ %tmp.79 = trunc i32 %mode.0.i.0 to i16
+ %tmp.80 = sext i16 %tmp.79 to i32
+ %tmp.81 = and i32 %tmp.80, 24
+ ret i32 %tmp.81
+}
+
+define i16 @test2(i16 signext %X, i16 signext %x) signext {
+ %tmp = sext i16 %X to i32
+ %tmp1 = sext i16 %x to i32
+ %tmp2 = add i32 %tmp, %tmp1
+ %tmp4 = ashr i32 %tmp2, 1
+ %tmp5 = trunc i32 %tmp4 to i16
+ %tmp45 = sext i16 %tmp5 to i32
+ %retval = trunc i32 %tmp45 to i16
+ ret i16 %retval
+}
+
+define i16 @test3(i32 zeroext %X) signext {
+ %tmp1 = lshr i32 %X, 16
+ %tmp2 = trunc i32 %tmp1 to i16
+ ret i16 %tmp2
+}
+
diff --git a/test/CodeGen/PowerPC/and_sra.ll b/test/CodeGen/PowerPC/and_sra.ll
new file mode 100644
index 0000000..e6c02d8
--- /dev/null
+++ b/test/CodeGen/PowerPC/and_sra.ll
@@ -0,0 +1,27 @@
+; Neither of these functions should contain algebraic right shifts
+; RUN: llc < %s -march=ppc32 | not grep srawi
+
+define i32 @test1(i32 %mode.0.i.0) {
+ %tmp.79 = bitcast i32 %mode.0.i.0 to i32 ; <i32> [#uses=1]
+ %tmp.80 = ashr i32 %tmp.79, 15 ; <i32> [#uses=1]
+ %tmp.81 = and i32 %tmp.80, 24 ; <i32> [#uses=1]
+ ret i32 %tmp.81
+}
+
+define i32 @test2(i32 %mode.0.i.0) {
+ %tmp.79 = bitcast i32 %mode.0.i.0 to i32 ; <i32> [#uses=1]
+ %tmp.80 = ashr i32 %tmp.79, 15 ; <i32> [#uses=1]
+ %tmp.81 = lshr i32 %mode.0.i.0, 16 ; <i32> [#uses=1]
+ %tmp.82 = bitcast i32 %tmp.81 to i32 ; <i32> [#uses=1]
+ %tmp.83 = and i32 %tmp.80, %tmp.82 ; <i32> [#uses=1]
+ ret i32 %tmp.83
+}
+
+define i32 @test3(i32 %specbits.6.1) {
+ %tmp.2540 = ashr i32 %specbits.6.1, 11 ; <i32> [#uses=1]
+ %tmp.2541 = bitcast i32 %tmp.2540 to i32 ; <i32> [#uses=1]
+ %tmp.2542 = shl i32 %tmp.2541, 13 ; <i32> [#uses=1]
+ %tmp.2543 = and i32 %tmp.2542, 8192 ; <i32> [#uses=1]
+ ret i32 %tmp.2543
+}
+
diff --git a/test/CodeGen/PowerPC/atomic-1.ll b/test/CodeGen/PowerPC/atomic-1.ll
new file mode 100644
index 0000000..ec4e42d
--- /dev/null
+++ b/test/CodeGen/PowerPC/atomic-1.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=ppc32 | grep lwarx | count 3
+; RUN: llc < %s -march=ppc32 | grep stwcx. | count 4
+
+define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
+ %tmp = call i32 @llvm.atomic.load.add.i32( i32* %mem, i32 %val )
+ ret i32 %tmp
+}
+
+define i32 @exchange_and_cmp(i32* %mem) nounwind {
+ %tmp = call i32 @llvm.atomic.cmp.swap.i32( i32* %mem, i32 0, i32 1 )
+ ret i32 %tmp
+}
+
+define i32 @exchange(i32* %mem, i32 %val) nounwind {
+ %tmp = call i32 @llvm.atomic.swap.i32( i32* %mem, i32 1 )
+ ret i32 %tmp
+}
+
+declare i32 @llvm.atomic.load.add.i32(i32*, i32) nounwind
+declare i32 @llvm.atomic.cmp.swap.i32(i32*, i32, i32) nounwind
+declare i32 @llvm.atomic.swap.i32(i32*, i32) nounwind
diff --git a/test/CodeGen/PowerPC/atomic-2.ll b/test/CodeGen/PowerPC/atomic-2.ll
new file mode 100644
index 0000000..6d9daef
--- /dev/null
+++ b/test/CodeGen/PowerPC/atomic-2.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=ppc64 | grep ldarx | count 3
+; RUN: llc < %s -march=ppc64 | grep stdcx. | count 4
+
+define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
+ %tmp = call i64 @llvm.atomic.load.add.i64( i64* %mem, i64 %val )
+ ret i64 %tmp
+}
+
+define i64 @exchange_and_cmp(i64* %mem) nounwind {
+ %tmp = call i64 @llvm.atomic.cmp.swap.i64( i64* %mem, i64 0, i64 1 )
+ ret i64 %tmp
+}
+
+define i64 @exchange(i64* %mem, i64 %val) nounwind {
+ %tmp = call i64 @llvm.atomic.swap.i64( i64* %mem, i64 1 )
+ ret i64 %tmp
+}
+
+declare i64 @llvm.atomic.load.add.i64(i64*, i64) nounwind
+declare i64 @llvm.atomic.cmp.swap.i64(i64*, i64, i64) nounwind
+declare i64 @llvm.atomic.swap.i64(i64*, i64) nounwind
diff --git a/test/CodeGen/PowerPC/available-externally.ll b/test/CodeGen/PowerPC/available-externally.ll
new file mode 100644
index 0000000..fdead7d
--- /dev/null
+++ b/test/CodeGen/PowerPC/available-externally.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -relocation-model=static | FileCheck %s -check-prefix=STATIC
+; RUN: llc < %s -relocation-model=pic | FileCheck %s -check-prefix=PIC
+; RUN: llc < %s -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC
+; PR4482
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "powerpc-apple-darwin8"
+
+define i32 @foo(i64 %x) nounwind {
+entry:
+; STATIC: _foo:
+; STATIC: bl _exact_log2
+; STATIC: blr
+; STATIC: .subsections_via_symbols
+
+; PIC: _foo:
+; PIC: bl L_exact_log2$stub
+; PIC: blr
+
+; DYNAMIC: _foo:
+; DYNAMIC: bl L_exact_log2$stub
+; DYNAMIC: blr
+
+ %A = call i32 @exact_log2(i64 %x) nounwind
+ ret i32 %A
+}
+
+define available_externally i32 @exact_log2(i64 %x) nounwind {
+entry:
+ ret i32 42
+}
+
+
+; PIC: .section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
+; PIC: L_exact_log2$stub:
+; PIC: .indirect_symbol _exact_log2
+; PIC: mflr r0
+; PIC: bcl 20,31,L_exact_log2$stub$tmp
+
+; PIC: L_exact_log2$stub$tmp:
+; PIC: mflr r11
+; PIC: addis r11,r11,ha16(L_exact_log2$lazy_ptr-L_exact_log2$stub$tmp)
+; PIC: mtlr r0
+; PIC: lwzu r12,lo16(L_exact_log2$lazy_ptr-L_exact_log2$stub$tmp)(r11)
+; PIC: mtctr r12
+; PIC: bctr
+
+; PIC: .section __DATA,__la_symbol_ptr,lazy_symbol_pointers
+; PIC: L_exact_log2$lazy_ptr:
+; PIC: .indirect_symbol _exact_log2
+; PIC: .long dyld_stub_binding_helper
+
+; PIC: .subsections_via_symbols
+
+
+; DYNAMIC: .section __TEXT,__symbol_stub1,symbol_stubs,pure_instructions,16
+; DYNAMIC: L_exact_log2$stub:
+; DYNAMIC: .indirect_symbol _exact_log2
+; DYNAMIC: lis r11,ha16(L_exact_log2$lazy_ptr)
+; DYNAMIC: lwzu r12,lo16(L_exact_log2$lazy_ptr)(r11)
+; DYNAMIC: mtctr r12
+; DYNAMIC: bctr
+
+; DYNAMIC: .section __DATA,__la_symbol_ptr,lazy_symbol_pointers
+; DYNAMIC: L_exact_log2$lazy_ptr:
+; DYNAMIC: .indirect_symbol _exact_log2
+; DYNAMIC: .long dyld_stub_binding_helper
+
+
+
+
+
diff --git a/test/CodeGen/PowerPC/big-endian-actual-args.ll b/test/CodeGen/PowerPC/big-endian-actual-args.ll
new file mode 100644
index 0000000..009f468
--- /dev/null
+++ b/test/CodeGen/PowerPC/big-endian-actual-args.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addc 4, 4, 6}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {adde 3, 3, 5}
+
+define i64 @foo(i64 %x, i64 %y) {
+ %z = add i64 %x, %y
+ ret i64 %z
+}
diff --git a/test/CodeGen/PowerPC/big-endian-call-result.ll b/test/CodeGen/PowerPC/big-endian-call-result.ll
new file mode 100644
index 0000000..fe85404
--- /dev/null
+++ b/test/CodeGen/PowerPC/big-endian-call-result.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addic 4, 4, 1}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addze 3, 3}
+
+declare i64 @foo()
+
+define i64 @bar()
+{
+ %t = call i64 @foo()
+ %s = add i64 %t, 1
+ ret i64 %s
+}
diff --git a/test/CodeGen/PowerPC/big-endian-formal-args.ll b/test/CodeGen/PowerPC/big-endian-formal-args.ll
new file mode 100644
index 0000000..e46e1ec
--- /dev/null
+++ b/test/CodeGen/PowerPC/big-endian-formal-args.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {li 6, 3}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {li 4, 2}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {li 3, 0}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {mr 5, 3}
+
+declare void @bar(i64 %x, i64 %y)
+
+define void @foo() {
+ call void @bar(i64 2, i64 3)
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/branch-opt.ll b/test/CodeGen/PowerPC/branch-opt.ll
new file mode 100644
index 0000000..cc02e40
--- /dev/null
+++ b/test/CodeGen/PowerPC/branch-opt.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep {b LBB.*} | count 4
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.7.0"
+
+define void @foo(i32 %W, i32 %X, i32 %Y, i32 %Z) {
+entry:
+ %tmp1 = and i32 %W, 1 ; <i32> [#uses=1]
+ %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tmp1.upgrd.1, label %cond_false, label %bb5
+bb: ; preds = %bb5, %bb
+ %indvar77 = phi i32 [ %indvar.next78, %bb ], [ 0, %bb5 ] ; <i32> [#uses=1]
+ %tmp2 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %indvar.next78 = add i32 %indvar77, 1 ; <i32> [#uses=2]
+ %exitcond79 = icmp eq i32 %indvar.next78, %X ; <i1> [#uses=1]
+ br i1 %exitcond79, label %cond_next48, label %bb
+bb5: ; preds = %entry
+ %tmp = icmp eq i32 %X, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_next48, label %bb
+cond_false: ; preds = %entry
+ %tmp10 = and i32 %W, 2 ; <i32> [#uses=1]
+ %tmp10.upgrd.2 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1]
+ br i1 %tmp10.upgrd.2, label %cond_false20, label %bb16
+bb12: ; preds = %bb16, %bb12
+ %indvar72 = phi i32 [ %indvar.next73, %bb12 ], [ 0, %bb16 ] ; <i32> [#uses=1]
+ %tmp13 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %indvar.next73 = add i32 %indvar72, 1 ; <i32> [#uses=2]
+ %exitcond74 = icmp eq i32 %indvar.next73, %Y ; <i1> [#uses=1]
+ br i1 %exitcond74, label %cond_next48, label %bb12
+bb16: ; preds = %cond_false
+ %tmp18 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
+ br i1 %tmp18, label %cond_next48, label %bb12
+cond_false20: ; preds = %cond_false
+ %tmp23 = and i32 %W, 4 ; <i32> [#uses=1]
+ %tmp23.upgrd.3 = icmp eq i32 %tmp23, 0 ; <i1> [#uses=1]
+ br i1 %tmp23.upgrd.3, label %cond_false33, label %bb29
+bb25: ; preds = %bb29, %bb25
+ %indvar67 = phi i32 [ %indvar.next68, %bb25 ], [ 0, %bb29 ] ; <i32> [#uses=1]
+ %tmp26 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %indvar.next68 = add i32 %indvar67, 1 ; <i32> [#uses=2]
+ %exitcond69 = icmp eq i32 %indvar.next68, %Z ; <i1> [#uses=1]
+ br i1 %exitcond69, label %cond_next48, label %bb25
+bb29: ; preds = %cond_false20
+ %tmp31 = icmp eq i32 %Z, 0 ; <i1> [#uses=1]
+ br i1 %tmp31, label %cond_next48, label %bb25
+cond_false33: ; preds = %cond_false20
+ %tmp36 = and i32 %W, 8 ; <i32> [#uses=1]
+ %tmp36.upgrd.4 = icmp eq i32 %tmp36, 0 ; <i1> [#uses=1]
+ br i1 %tmp36.upgrd.4, label %cond_next48, label %bb42
+bb38: ; preds = %bb42
+ %tmp39 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb42
+bb42: ; preds = %bb38, %cond_false33
+ %indvar = phi i32 [ %indvar.next, %bb38 ], [ 0, %cond_false33 ] ; <i32> [#uses=4]
+ %W_addr.0 = sub i32 %W, %indvar ; <i32> [#uses=1]
+ %exitcond = icmp eq i32 %indvar, %W ; <i1> [#uses=1]
+ br i1 %exitcond, label %cond_next48, label %bb38
+cond_next48: ; preds = %bb42, %cond_false33, %bb29, %bb25, %bb16, %bb12, %bb5, %bb
+ %W_addr.1 = phi i32 [ %W, %bb5 ], [ %W, %bb16 ], [ %W, %bb29 ], [ %W, %cond_false33 ], [ %W_addr.0, %bb42 ], [ %W, %bb25 ], [ %W, %bb12 ], [ %W, %bb ] ; <i32> [#uses=1]
+ %tmp50 = icmp eq i32 %W_addr.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp50, label %UnifiedReturnBlock, label %cond_true51
+cond_true51: ; preds = %cond_next48
+ %tmp52 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+UnifiedReturnBlock: ; preds = %cond_next48
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/PowerPC/bswap-load-store.ll b/test/CodeGen/PowerPC/bswap-load-store.ll
new file mode 100644
index 0000000..4f6bfc7
--- /dev/null
+++ b/test/CodeGen/PowerPC/bswap-load-store.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=ppc32 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -march=ppc64 | FileCheck %s -check-prefix=X64
+
+
+define void @STWBRX(i32 %i, i8* %ptr, i32 %off) {
+ %tmp1 = getelementptr i8* %ptr, i32 %off ; <i8*> [#uses=1]
+ %tmp1.upgrd.1 = bitcast i8* %tmp1 to i32* ; <i32*> [#uses=1]
+ %tmp13 = tail call i32 @llvm.bswap.i32( i32 %i ) ; <i32> [#uses=1]
+ store i32 %tmp13, i32* %tmp1.upgrd.1
+ ret void
+}
+
+define i32 @LWBRX(i8* %ptr, i32 %off) {
+ %tmp1 = getelementptr i8* %ptr, i32 %off ; <i8*> [#uses=1]
+ %tmp1.upgrd.2 = bitcast i8* %tmp1 to i32* ; <i32*> [#uses=1]
+ %tmp = load i32* %tmp1.upgrd.2 ; <i32> [#uses=1]
+ %tmp14 = tail call i32 @llvm.bswap.i32( i32 %tmp ) ; <i32> [#uses=1]
+ ret i32 %tmp14
+}
+
+define void @STHBRX(i16 %s, i8* %ptr, i32 %off) {
+ %tmp1 = getelementptr i8* %ptr, i32 %off ; <i8*> [#uses=1]
+ %tmp1.upgrd.3 = bitcast i8* %tmp1 to i16* ; <i16*> [#uses=1]
+ %tmp5 = call i16 @llvm.bswap.i16( i16 %s ) ; <i16> [#uses=1]
+ store i16 %tmp5, i16* %tmp1.upgrd.3
+ ret void
+}
+
+define i16 @LHBRX(i8* %ptr, i32 %off) {
+ %tmp1 = getelementptr i8* %ptr, i32 %off ; <i8*> [#uses=1]
+ %tmp1.upgrd.4 = bitcast i8* %tmp1 to i16* ; <i16*> [#uses=1]
+ %tmp = load i16* %tmp1.upgrd.4 ; <i16> [#uses=1]
+ %tmp6 = call i16 @llvm.bswap.i16( i16 %tmp ) ; <i16> [#uses=1]
+ ret i16 %tmp6
+}
+
+declare i32 @llvm.bswap.i32(i32)
+
+declare i16 @llvm.bswap.i16(i16)
+
+
+; X32: stwbrx
+; X32: lwbrx
+; X32: sthbrx
+; X32: lhbrx
+
+; X64: stwbrx
+; X64: lwbrx
+; X64: sthbrx
+; X64: lhbrx
+
diff --git a/test/CodeGen/PowerPC/buildvec_canonicalize.ll b/test/CodeGen/PowerPC/buildvec_canonicalize.ll
new file mode 100644
index 0000000..0454c58
--- /dev/null
+++ b/test/CodeGen/PowerPC/buildvec_canonicalize.ll
@@ -0,0 +1,24 @@
+; There should be exactly one vxor here.
+; RUN: llc < %s -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \
+; RUN: grep vxor | count 1
+
+; There should be exactly one vsplti here.
+; RUN: llc < %s -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \
+; RUN: grep vsplti | count 1
+
+define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) {
+ %tmp = load <4 x float>* %P3 ; <<4 x float>> [#uses=1]
+ %tmp3 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
+ %tmp4 = fmul <4 x float> %tmp, %tmp3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp4, <4 x float>* %P3
+ store <4 x float> zeroinitializer, <4 x float>* %P1
+ store <4 x i32> zeroinitializer, <4 x i32>* %P2
+ ret void
+}
+
+define void @VSPLTI(<4 x i32>* %P2, <8 x i16>* %P3) {
+ store <4 x i32> bitcast (<16 x i8> < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 > to <4 x i32>), <4 x i32>* %P2
+ store <8 x i16> < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1 >, <8 x i16>* %P3
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/calls.ll b/test/CodeGen/PowerPC/calls.ll
new file mode 100644
index 0000000..0db184f
--- /dev/null
+++ b/test/CodeGen/PowerPC/calls.ll
@@ -0,0 +1,32 @@
+; Test various forms of calls.
+
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep {bl } | count 2
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep {bctrl} | count 1
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep {bla } | count 1
+
+declare void @foo()
+
+define void @test_direct() {
+ call void @foo( )
+ ret void
+}
+
+define void @test_extsym(i8* %P) {
+ free i8* %P
+ ret void
+}
+
+define void @test_indirect(void ()* %fp) {
+ call void %fp( )
+ ret void
+}
+
+define void @test_abs() {
+ %fp = inttoptr i32 400 to void ()* ; <void ()*> [#uses=1]
+ call void %fp( )
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/cmp-cmp.ll b/test/CodeGen/PowerPC/cmp-cmp.ll
new file mode 100644
index 0000000..35a5e42
--- /dev/null
+++ b/test/CodeGen/PowerPC/cmp-cmp.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=ppc32 | not grep mfcr
+
+define void @test(i64 %X) {
+ %tmp1 = and i64 %X, 3 ; <i64> [#uses=1]
+ %tmp = icmp sgt i64 %tmp1, 2 ; <i1> [#uses=1]
+ br i1 %tmp, label %UnifiedReturnBlock, label %cond_true
+cond_true: ; preds = %0
+ tail call void @test( i64 0 )
+ ret void
+UnifiedReturnBlock: ; preds = %0
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/compare-duplicate.ll b/test/CodeGen/PowerPC/compare-duplicate.ll
new file mode 100644
index 0000000..f5108c3
--- /dev/null
+++ b/test/CodeGen/PowerPC/compare-duplicate.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin8 | not grep slwi
+
+define i32 @test(i32 %A, i32 %B) {
+ %C = sub i32 %B, %A
+ %D = icmp eq i32 %C, %A
+ br i1 %D, label %T, label %F
+T:
+ ret i32 19123
+F:
+ ret i32 %C
+}
diff --git a/test/CodeGen/PowerPC/compare-simm.ll b/test/CodeGen/PowerPC/compare-simm.ll
new file mode 100644
index 0000000..5ba0500
--- /dev/null
+++ b/test/CodeGen/PowerPC/compare-simm.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
+; RUN: grep {cmpwi cr0, r3, -1}
+
+define i32 @test(i32 %x) {
+ %c = icmp eq i32 %x, -1
+ br i1 %c, label %T, label %F
+T:
+ %A = call i32 @test(i32 123)
+ %B = add i32 %A, 43
+ ret i32 %B
+F:
+ %G = add i32 %x, 1234
+ ret i32 %G
+}
diff --git a/test/CodeGen/PowerPC/constants.ll b/test/CodeGen/PowerPC/constants.ll
new file mode 100644
index 0000000..8901e02
--- /dev/null
+++ b/test/CodeGen/PowerPC/constants.ll
@@ -0,0 +1,52 @@
+; All of these routines should be perform optimal load of constants.
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep lis | count 5
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep ori | count 3
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep {li } | count 4
+
+define i32 @f1() {
+entry:
+ ret i32 1
+}
+
+define i32 @f2() {
+entry:
+ ret i32 -1
+}
+
+define i32 @f3() {
+entry:
+ ret i32 0
+}
+
+define i32 @f4() {
+entry:
+ ret i32 32767
+}
+
+define i32 @f5() {
+entry:
+ ret i32 65535
+}
+
+define i32 @f6() {
+entry:
+ ret i32 65536
+}
+
+define i32 @f7() {
+entry:
+ ret i32 131071
+}
+
+define i32 @f8() {
+entry:
+ ret i32 2147483647
+}
+
+define i32 @f9() {
+entry:
+ ret i32 -2147483648
+}
diff --git a/test/CodeGen/PowerPC/cr_spilling.ll b/test/CodeGen/PowerPC/cr_spilling.ll
new file mode 100644
index 0000000..b215868
--- /dev/null
+++ b/test/CodeGen/PowerPC/cr_spilling.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=ppc32 -regalloc=local -O0 -relocation-model=pic -o -
+; PR1638
+
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=1]
+
+define fastcc void @ParseContent(i8* %buf, i32 %bufsize) {
+entry:
+ %items = alloca [10000 x i8*], align 16 ; <[10000 x i8*]*> [#uses=0]
+ %tmp86 = add i32 0, -1 ; <i32> [#uses=1]
+ br i1 false, label %cond_true94, label %cond_next99
+
+cond_true94: ; preds = %entry
+ %tmp98 = call i32 (i8*, ...)* @printf(i8* getelementptr ([3 x i8]* @.str242, i32 0, i32 0), i8* null) ; <i32> [#uses=0]
+ %tmp20971 = icmp sgt i32 %tmp86, 0 ; <i1> [#uses=1]
+ br i1 %tmp20971, label %bb101, label %bb212
+
+cond_next99: ; preds = %entry
+ ret void
+
+bb101: ; preds = %cond_true94
+ ret void
+
+bb212: ; preds = %cond_true94
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/PowerPC/cttz.ll b/test/CodeGen/PowerPC/cttz.ll
new file mode 100644
index 0000000..ab493a0
--- /dev/null
+++ b/test/CodeGen/PowerPC/cttz.ll
@@ -0,0 +1,11 @@
+; Make sure this testcase does not use ctpop
+; RUN: llc < %s -march=ppc32 | grep -i cntlzw
+
+declare i32 @llvm.cttz.i32(i32)
+
+define i32 @bar(i32 %x) {
+entry:
+ %tmp.1 = call i32 @llvm.cttz.i32( i32 %x ) ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
diff --git a/test/CodeGen/PowerPC/darwin-labels.ll b/test/CodeGen/PowerPC/darwin-labels.ll
new file mode 100644
index 0000000..af23369
--- /dev/null
+++ b/test/CodeGen/PowerPC/darwin-labels.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s | grep {foo bar":}
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.2.0"
+@"foo bar" = global i32 4 ; <i32*> [#uses=0]
+
diff --git a/test/CodeGen/PowerPC/delete-node.ll b/test/CodeGen/PowerPC/delete-node.ll
new file mode 100644
index 0000000..a26c211
--- /dev/null
+++ b/test/CodeGen/PowerPC/delete-node.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=ppc32
+
+; The DAGCombiner leaves behind a dead node in this testcase. Currently
+; ISel is ignoring dead nodes, though it would be preferable for
+; DAGCombiner to be able to eliminate the dead node.
+
+define void @GrayATo32ARGBTabB(i8* %baseAddr, i16** %cmp, i32 %rowBytes) nounwind {
+entry:
+ br label %bb1
+
+bb1: ; preds = %bb1, %entry
+ %0 = load i16* null, align 2 ; <i16> [#uses=1]
+ %1 = ashr i16 %0, 4 ; <i16> [#uses=1]
+ %2 = sext i16 %1 to i32 ; <i32> [#uses=1]
+ %3 = getelementptr i8* null, i32 %2 ; <i8*> [#uses=1]
+ %4 = load i8* %3, align 1 ; <i8> [#uses=1]
+ %5 = zext i8 %4 to i32 ; <i32> [#uses=1]
+ %6 = shl i32 %5, 24 ; <i32> [#uses=1]
+ %7 = or i32 0, %6 ; <i32> [#uses=1]
+ store i32 %7, i32* null, align 4
+ br label %bb1
+}
diff --git a/test/CodeGen/PowerPC/dg.exp b/test/CodeGen/PowerPC/dg.exp
new file mode 100644
index 0000000..9e50b55
--- /dev/null
+++ b/test/CodeGen/PowerPC/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target PowerPC] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/PowerPC/div-2.ll b/test/CodeGen/PowerPC/div-2.ll
new file mode 100644
index 0000000..2fc916f
--- /dev/null
+++ b/test/CodeGen/PowerPC/div-2.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=ppc32 | not grep srawi
+; RUN: llc < %s -march=ppc32 | grep blr
+
+define i32 @test1(i32 %X) {
+ %Y = and i32 %X, 15 ; <i32> [#uses=1]
+ %Z = sdiv i32 %Y, 4 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test2(i32 %W) {
+ %X = and i32 %W, 15 ; <i32> [#uses=1]
+ %Y = sub i32 16, %X ; <i32> [#uses=1]
+ %Z = sdiv i32 %Y, 4 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test3(i32 %W) {
+ %X = and i32 %W, 15 ; <i32> [#uses=1]
+ %Y = sub i32 15, %X ; <i32> [#uses=1]
+ %Z = sdiv i32 %Y, 4 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test4(i32 %W) {
+ %X = and i32 %W, 2 ; <i32> [#uses=1]
+ %Y = sub i32 5, %X ; <i32> [#uses=1]
+ %Z = sdiv i32 %Y, 2 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll b/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll
new file mode 100644
index 0000000..558fd1b
--- /dev/null
+++ b/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll
@@ -0,0 +1,93 @@
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep eqv | count 3
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | \
+; RUN: grep andc | count 3
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep orc | count 2
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | \
+; RUN: grep nor | count 3
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep nand | count 1
+
+define i32 @EQV1(i32 %X, i32 %Y) {
+ %A = xor i32 %X, %Y ; <i32> [#uses=1]
+ %B = xor i32 %A, -1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @EQV2(i32 %X, i32 %Y) {
+ %A = xor i32 %X, -1 ; <i32> [#uses=1]
+ %B = xor i32 %A, %Y ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @EQV3(i32 %X, i32 %Y) {
+ %A = xor i32 %X, -1 ; <i32> [#uses=1]
+ %B = xor i32 %Y, %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @ANDC1(i32 %X, i32 %Y) {
+ %A = xor i32 %Y, -1 ; <i32> [#uses=1]
+ %B = and i32 %X, %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @ANDC2(i32 %X, i32 %Y) {
+ %A = xor i32 %X, -1 ; <i32> [#uses=1]
+ %B = and i32 %A, %Y ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @ORC1(i32 %X, i32 %Y) {
+ %A = xor i32 %Y, -1 ; <i32> [#uses=1]
+ %B = or i32 %X, %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @ORC2(i32 %X, i32 %Y) {
+ %A = xor i32 %X, -1 ; <i32> [#uses=1]
+ %B = or i32 %A, %Y ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @NOR1(i32 %X) {
+ %Y = xor i32 %X, -1 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+define i32 @NOR2(i32 %X, i32 %Y) {
+ %Z = or i32 %X, %Y ; <i32> [#uses=1]
+ %R = xor i32 %Z, -1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @NAND1(i32 %X, i32 %Y) {
+ %Z = and i32 %X, %Y ; <i32> [#uses=1]
+ %W = xor i32 %Z, -1 ; <i32> [#uses=1]
+ ret i32 %W
+}
+
+define void @VNOR(<4 x float>* %P, <4 x float>* %Q) {
+ %tmp = load <4 x float>* %P ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.1 = bitcast <4 x float> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp2 = load <4 x float>* %Q ; <<4 x float>> [#uses=1]
+ %tmp2.upgrd.2 = bitcast <4 x float> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp3 = or <4 x i32> %tmp.upgrd.1, %tmp2.upgrd.2 ; <<4 x i32>> [#uses=1]
+ %tmp4 = xor <4 x i32> %tmp3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %tmp4.upgrd.3 = bitcast <4 x i32> %tmp4 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp4.upgrd.3, <4 x float>* %P
+ ret void
+}
+
+define void @VANDC(<4 x float>* %P, <4 x float>* %Q) {
+ %tmp = load <4 x float>* %P ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.4 = bitcast <4 x float> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp2 = load <4 x float>* %Q ; <<4 x float>> [#uses=1]
+ %tmp2.upgrd.5 = bitcast <4 x float> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp4 = xor <4 x i32> %tmp2.upgrd.5, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %tmp3 = and <4 x i32> %tmp.upgrd.4, %tmp4 ; <<4 x i32>> [#uses=1]
+ %tmp4.upgrd.6 = bitcast <4 x i32> %tmp3 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp4.upgrd.6, <4 x float>* %P
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/extsh.ll b/test/CodeGen/PowerPC/extsh.ll
new file mode 100644
index 0000000..506ff86
--- /dev/null
+++ b/test/CodeGen/PowerPC/extsh.ll
@@ -0,0 +1,8 @@
+; This should turn into a single extsh
+; RUN: llc < %s -march=ppc32 | grep extsh | count 1
+define i32 @test(i32 %X) {
+ %tmp.81 = shl i32 %X, 16 ; <i32> [#uses=1]
+ %tmp.82 = ashr i32 %tmp.81, 16 ; <i32> [#uses=1]
+ ret i32 %tmp.82
+}
+
diff --git a/test/CodeGen/PowerPC/fabs.ll b/test/CodeGen/PowerPC/fabs.ll
new file mode 100644
index 0000000..6ef740f
--- /dev/null
+++ b/test/CodeGen/PowerPC/fabs.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin | grep {fabs f1, f1}
+
+define double @fabs(double %f) {
+entry:
+ %tmp2 = tail call double @fabs( double %f ) ; <double> [#uses=1]
+ ret double %tmp2
+}
diff --git a/test/CodeGen/PowerPC/fma.ll b/test/CodeGen/PowerPC/fma.ll
new file mode 100644
index 0000000..815c72c
--- /dev/null
+++ b/test/CodeGen/PowerPC/fma.ll
@@ -0,0 +1,54 @@
+; RUN: llc < %s -march=ppc32 | \
+; RUN: egrep {fn?madd|fn?msub} | count 8
+
+define double @test_FMADD1(double %A, double %B, double %C) {
+ %D = fmul double %A, %B ; <double> [#uses=1]
+ %E = fadd double %D, %C ; <double> [#uses=1]
+ ret double %E
+}
+
+define double @test_FMADD2(double %A, double %B, double %C) {
+ %D = fmul double %A, %B ; <double> [#uses=1]
+ %E = fadd double %D, %C ; <double> [#uses=1]
+ ret double %E
+}
+
+define double @test_FMSUB(double %A, double %B, double %C) {
+ %D = fmul double %A, %B ; <double> [#uses=1]
+ %E = fsub double %D, %C ; <double> [#uses=1]
+ ret double %E
+}
+
+define double @test_FNMADD1(double %A, double %B, double %C) {
+ %D = fmul double %A, %B ; <double> [#uses=1]
+ %E = fadd double %D, %C ; <double> [#uses=1]
+ %F = fsub double -0.000000e+00, %E ; <double> [#uses=1]
+ ret double %F
+}
+
+define double @test_FNMADD2(double %A, double %B, double %C) {
+ %D = fmul double %A, %B ; <double> [#uses=1]
+ %E = fadd double %C, %D ; <double> [#uses=1]
+ %F = fsub double -0.000000e+00, %E ; <double> [#uses=1]
+ ret double %F
+}
+
+define double @test_FNMSUB1(double %A, double %B, double %C) {
+ %D = fmul double %A, %B ; <double> [#uses=1]
+ %E = fsub double %C, %D ; <double> [#uses=1]
+ ret double %E
+}
+
+define double @test_FNMSUB2(double %A, double %B, double %C) {
+ %D = fmul double %A, %B ; <double> [#uses=1]
+ %E = fsub double %D, %C ; <double> [#uses=1]
+ %F = fsub double -0.000000e+00, %E ; <double> [#uses=1]
+ ret double %F
+}
+
+define float @test_FNMSUBS(float %A, float %B, float %C) {
+ %D = fmul float %A, %B ; <float> [#uses=1]
+ %E = fsub float %D, %C ; <float> [#uses=1]
+ %F = fsub float -0.000000e+00, %E ; <float> [#uses=1]
+ ret float %F
+}
diff --git a/test/CodeGen/PowerPC/fnabs.ll b/test/CodeGen/PowerPC/fnabs.ll
new file mode 100644
index 0000000..bbd5c71
--- /dev/null
+++ b/test/CodeGen/PowerPC/fnabs.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32 | grep fnabs
+
+declare double @fabs(double)
+
+define double @test(double %X) {
+ %Y = call double @fabs( double %X ) ; <double> [#uses=1]
+ %Z = fsub double -0.000000e+00, %Y ; <double> [#uses=1]
+ ret double %Z
+}
+
diff --git a/test/CodeGen/PowerPC/fneg.ll b/test/CodeGen/PowerPC/fneg.ll
new file mode 100644
index 0000000..0bd31bb
--- /dev/null
+++ b/test/CodeGen/PowerPC/fneg.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=ppc32 | not grep fneg
+
+define double @test1(double %a, double %b, double %c, double %d) {
+entry:
+ %tmp2 = fsub double -0.000000e+00, %c ; <double> [#uses=1]
+ %tmp4 = fmul double %tmp2, %d ; <double> [#uses=1]
+ %tmp7 = fmul double %a, %b ; <double> [#uses=1]
+ %tmp9 = fsub double %tmp7, %tmp4 ; <double> [#uses=1]
+ ret double %tmp9
+}
+
+
diff --git a/test/CodeGen/PowerPC/fold-li.ll b/test/CodeGen/PowerPC/fold-li.ll
new file mode 100644
index 0000000..92d8da5
--- /dev/null
+++ b/test/CodeGen/PowerPC/fold-li.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc32 | \
+; RUN: grep -v align | not grep li
+
+;; Test that immediates are folded into these instructions correctly.
+
+define i32 @ADD(i32 %X) nounwind {
+ %Y = add i32 %X, 65537 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+define i32 @SUB(i32 %X) nounwind {
+ %Y = sub i32 %X, 65537 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/CodeGen/PowerPC/fp-branch.ll b/test/CodeGen/PowerPC/fp-branch.ll
new file mode 100644
index 0000000..673da02
--- /dev/null
+++ b/test/CodeGen/PowerPC/fp-branch.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=ppc32 | grep fcmp | count 1
+
+declare i1 @llvm.isunordered.f64(double, double)
+
+define i1 @intcoord_cond_next55(double %tmp48.reload) {
+newFuncRoot:
+ br label %cond_next55
+
+bb72.exitStub: ; preds = %cond_next55
+ ret i1 true
+
+cond_next62.exitStub: ; preds = %cond_next55
+ ret i1 false
+
+cond_next55: ; preds = %newFuncRoot
+ %tmp57 = fcmp oge double %tmp48.reload, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp58 = fcmp uno double %tmp48.reload, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp59 = or i1 %tmp57, %tmp58 ; <i1> [#uses=1]
+ br i1 %tmp59, label %bb72.exitStub, label %cond_next62.exitStub
+}
+
diff --git a/test/CodeGen/PowerPC/fp-int-fp.ll b/test/CodeGen/PowerPC/fp-int-fp.ll
new file mode 100644
index 0000000..18f7f83
--- /dev/null
+++ b/test/CodeGen/PowerPC/fp-int-fp.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep r1
+
+define double @test1(double %X) {
+ %Y = fptosi double %X to i64 ; <i64> [#uses=1]
+ %Z = sitofp i64 %Y to double ; <double> [#uses=1]
+ ret double %Z
+}
+
+define float @test2(double %X) {
+ %Y = fptosi double %X to i64 ; <i64> [#uses=1]
+ %Z = sitofp i64 %Y to float ; <float> [#uses=1]
+ ret float %Z
+}
+
+define double @test3(float %X) {
+ %Y = fptosi float %X to i64 ; <i64> [#uses=1]
+ %Z = sitofp i64 %Y to double ; <double> [#uses=1]
+ ret double %Z
+}
+
+define float @test4(float %X) {
+ %Y = fptosi float %X to i64 ; <i64> [#uses=1]
+ %Z = sitofp i64 %Y to float ; <float> [#uses=1]
+ ret float %Z
+}
+
+
diff --git a/test/CodeGen/PowerPC/fp_to_uint.ll b/test/CodeGen/PowerPC/fp_to_uint.ll
new file mode 100644
index 0000000..1360b62
--- /dev/null
+++ b/test/CodeGen/PowerPC/fp_to_uint.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 | grep fctiwz | count 1
+
+define i16 @foo(float %a) {
+entry:
+ %tmp.1 = fptoui float %a to i16 ; <i16> [#uses=1]
+ ret i16 %tmp.1
+}
+
diff --git a/test/CodeGen/PowerPC/fpcopy.ll b/test/CodeGen/PowerPC/fpcopy.ll
new file mode 100644
index 0000000..7b9446b
--- /dev/null
+++ b/test/CodeGen/PowerPC/fpcopy.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=ppc32 | not grep fmr
+
+define double @test(float %F) {
+ %F.upgrd.1 = fpext float %F to double ; <double> [#uses=1]
+ ret double %F.upgrd.1
+}
+
diff --git a/test/CodeGen/PowerPC/frounds.ll b/test/CodeGen/PowerPC/frounds.ll
new file mode 100644
index 0000000..8eeadc3
--- /dev/null
+++ b/test/CodeGen/PowerPC/frounds.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=ppc32
+
+define i32 @foo() {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %tmp = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp1 = call i32 @llvm.flt.rounds( ) ; <i32> [#uses=1]
+ store i32 %tmp1, i32* %tmp, align 4
+ %tmp2 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ store i32 %tmp2, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval3 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval3
+}
+
+declare i32 @llvm.flt.rounds() nounwind
diff --git a/test/CodeGen/PowerPC/fsqrt.ll b/test/CodeGen/PowerPC/fsqrt.ll
new file mode 100644
index 0000000..74a8725
--- /dev/null
+++ b/test/CodeGen/PowerPC/fsqrt.ll
@@ -0,0 +1,19 @@
+; fsqrt should be generated when the fsqrt feature is enabled, but not
+; otherwise.
+
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \
+; RUN: grep {fsqrt f1, f1}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \
+; RUN: grep {fsqrt f1, f1}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \
+; RUN: not grep {fsqrt f1, f1}
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g4 | \
+; RUN: not grep {fsqrt f1, f1}
+
+declare double @llvm.sqrt.f64(double)
+
+define double @X(double %Y) {
+ %Z = call double @llvm.sqrt.f64( double %Y ) ; <double> [#uses=1]
+ ret double %Z
+}
+
diff --git a/test/CodeGen/PowerPC/hello.ll b/test/CodeGen/PowerPC/hello.ll
new file mode 100644
index 0000000..ea27e92
--- /dev/null
+++ b/test/CodeGen/PowerPC/hello.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=ppc32
+; RUN: llc < %s -march=ppc64
+; PR1399
+
[email protected] = internal constant [13 x i8] c"Hello World!\00"
+
+define i32 @main() {
+ %tmp2 = tail call i32 @puts( i8* getelementptr ([13 x i8]* @.str, i32 0, i64 0) )
+ ret i32 0
+}
+
+declare i32 @puts(i8*)
diff --git a/test/CodeGen/PowerPC/hidden-vis-2.ll b/test/CodeGen/PowerPC/hidden-vis-2.ll
new file mode 100644
index 0000000..e9e2c0a
--- /dev/null
+++ b/test/CodeGen/PowerPC/hidden-vis-2.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin9 | grep non_lazy_ptr | count 6
+
+@x = external hidden global i32 ; <i32*> [#uses=1]
+@y = extern_weak hidden global i32 ; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+ %0 = load i32* @x, align 4 ; <i32> [#uses=1]
+ %1 = load i32* @y, align 4 ; <i32> [#uses=1]
+ %2 = add i32 %1, %0 ; <i32> [#uses=1]
+ ret i32 %2
+}
diff --git a/test/CodeGen/PowerPC/hidden-vis.ll b/test/CodeGen/PowerPC/hidden-vis.ll
new file mode 100644
index 0000000..b2cc143
--- /dev/null
+++ b/test/CodeGen/PowerPC/hidden-vis.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin9 | not grep non_lazy_ptr
+
+@x = weak hidden global i32 0 ; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+ %0 = load i32* @x, align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/PowerPC/i128-and-beyond.ll b/test/CodeGen/PowerPC/i128-and-beyond.ll
new file mode 100644
index 0000000..51bcab2
--- /dev/null
+++ b/test/CodeGen/PowerPC/i128-and-beyond.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 | grep 4294967295 | count 28
+
+; These static initializers are too big to hand off to assemblers
+; as monolithic blobs.
+
+@x = global i128 -1
+@y = global i256 -1
+@z = global i512 -1
diff --git a/test/CodeGen/PowerPC/i64_fp.ll b/test/CodeGen/PowerPC/i64_fp.ll
new file mode 100644
index 0000000..d53c948
--- /dev/null
+++ b/test/CodeGen/PowerPC/i64_fp.ll
@@ -0,0 +1,26 @@
+; fcfid and fctid should be generated when the 64bit feature is enabled, but not
+; otherwise.
+
+; RUN: llc < %s -march=ppc32 -mattr=+64bit | \
+; RUN: grep fcfid
+; RUN: llc < %s -march=ppc32 -mattr=+64bit | \
+; RUN: grep fctidz
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | \
+; RUN: grep fcfid
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | \
+; RUN: grep fctidz
+; RUN: llc < %s -march=ppc32 -mattr=-64bit | \
+; RUN: not grep fcfid
+; RUN: llc < %s -march=ppc32 -mattr=-64bit | \
+; RUN: not grep fctidz
+; RUN: llc < %s -march=ppc32 -mcpu=g4 | \
+; RUN: not grep fcfid
+; RUN: llc < %s -march=ppc32 -mcpu=g4 | \
+; RUN: not grep fctidz
+
+define double @X(double %Y) {
+ %A = fptosi double %Y to i64 ; <i64> [#uses=1]
+ %B = sitofp i64 %A to double ; <double> [#uses=1]
+ ret double %B
+}
+
diff --git a/test/CodeGen/PowerPC/iabs.ll b/test/CodeGen/PowerPC/iabs.ll
new file mode 100644
index 0000000..a43f09c
--- /dev/null
+++ b/test/CodeGen/PowerPC/iabs.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc32 -stats |& \
+; RUN: grep {4 .*Number of machine instrs printed}
+
+;; Integer absolute value, should produce something as good as:
+;; srawi r2, r3, 31
+;; add r3, r3, r2
+;; xor r3, r3, r2
+;; blr
+define i32 @test(i32 %a) {
+ %tmp1neg = sub i32 0, %a
+ %b = icmp sgt i32 %a, -1
+ %abs = select i1 %b, i32 %a, i32 %tmp1neg
+ ret i32 %abs
+}
+
diff --git a/test/CodeGen/PowerPC/illegal-element-type.ll b/test/CodeGen/PowerPC/illegal-element-type.ll
new file mode 100644
index 0000000..58bd055
--- /dev/null
+++ b/test/CodeGen/PowerPC/illegal-element-type.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g3
+
+define void @foo() {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ br i1 false, label %bb26, label %bb
+
+bb19: ; preds = %bb26
+ ret void
+
+bb26: ; preds = %bb
+ br i1 false, label %bb30, label %bb19
+
+bb30: ; preds = %bb26
+ br label %bb45
+
+bb45: ; preds = %bb45, %bb30
+ %V.0 = phi <8 x i16> [ %tmp42, %bb45 ], [ zeroinitializer, %bb30 ] ; <<8 x i16>> [#uses=1]
+ %tmp42 = mul <8 x i16> zeroinitializer, %V.0 ; <<8 x i16>> [#uses=1]
+ br label %bb45
+}
diff --git a/test/CodeGen/PowerPC/indirectbr.ll b/test/CodeGen/PowerPC/indirectbr.ll
new file mode 100644
index 0000000..fbc7bd2
--- /dev/null
+++ b/test/CodeGen/PowerPC/indirectbr.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -relocation-model=pic -march=ppc32 -mtriple=powerpc-apple-darwin | FileCheck %s -check-prefix=PIC
+; RUN: llc < %s -relocation-model=static -march=ppc32 -mtriple=powerpc-apple-darwin | FileCheck %s -check-prefix=STATIC
+
+@nextaddr = global i8* null ; <i8**> [#uses=2]
[email protected] = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
+
+define internal i32 @foo(i32 %i) nounwind {
+; PIC: foo:
+; STATIC: foo:
+entry:
+ %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
+ %1 = icmp eq i8* %0, null ; <i1> [#uses=1]
+ br i1 %1, label %bb3, label %bb2
+
+bb2: ; preds = %entry, %bb3
+ %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
+; PIC: mtctr
+; PIC-NEXT: bctr
+; STATIC: mtctr
+; STATIC-NEXT: bctr
+ indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
+
+bb3: ; preds = %entry
+ %2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
+ %gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
+ br label %bb2
+
+L5: ; preds = %bb2
+ br label %L4
+
+L4: ; preds = %L5, %bb2
+ %res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1]
+ br label %L3
+
+L3: ; preds = %L4, %bb2
+ %res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1]
+ br label %L2
+
+L2: ; preds = %L3, %bb2
+ %res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
+ %phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
+ br label %L1
+
+L1: ; preds = %L2, %bb2
+ %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
+; PIC: addis r4, r2, ha16(L_BA4__foo_L5-"L1$pb")
+; PIC: li r5, lo16(L_BA4__foo_L5-"L1$pb")
+; PIC: add r4, r4, r5
+; PIC: stw r4
+; STATIC: li r2, lo16(L_BA4__foo_L5)
+; STATIC: addis r2, r2, ha16(L_BA4__foo_L5)
+; STATIC: stw r2
+ store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
+ ret i32 %res.3
+}
diff --git a/test/CodeGen/PowerPC/inlineasm-copy.ll b/test/CodeGen/PowerPC/inlineasm-copy.ll
new file mode 100644
index 0000000..e1ff82d
--- /dev/null
+++ b/test/CodeGen/PowerPC/inlineasm-copy.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc32 | not grep mr
+
+define i32 @test(i32 %Y, i32 %X) {
+entry:
+ %tmp = tail call i32 asm "foo $0", "=r"( ) ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @test2(i32 %Y, i32 %X) {
+entry:
+ %tmp1 = tail call i32 asm "foo $0, $1", "=r,r"( i32 %X ) ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
diff --git a/test/CodeGen/PowerPC/int-fp-conv-0.ll b/test/CodeGen/PowerPC/int-fp-conv-0.ll
new file mode 100644
index 0000000..983d2b8
--- /dev/null
+++ b/test/CodeGen/PowerPC/int-fp-conv-0.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=ppc64 > %t
+; RUN: grep __floattitf %t
+; RUN: grep __fixunstfti %t
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc64-apple-darwin9.2.0"
+
+define ppc_fp128 @foo(i128 %a) nounwind {
+entry:
+ %tmp2829 = uitofp i128 %a to ppc_fp128 ; <i64> [#uses=1]
+ ret ppc_fp128 %tmp2829
+}
+define i128 @boo(ppc_fp128 %a) nounwind {
+entry:
+ %tmp2829 = fptoui ppc_fp128 %a to i128 ; <i64> [#uses=1]
+ ret i128 %tmp2829
+}
diff --git a/test/CodeGen/PowerPC/int-fp-conv-1.ll b/test/CodeGen/PowerPC/int-fp-conv-1.ll
new file mode 100644
index 0000000..6c82723
--- /dev/null
+++ b/test/CodeGen/PowerPC/int-fp-conv-1.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=ppc64 | grep __floatditf
+
+define i64 @__fixunstfdi(ppc_fp128 %a) nounwind {
+entry:
+ %tmp1213 = uitofp i64 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ %tmp15 = fsub ppc_fp128 %a, %tmp1213 ; <ppc_fp128> [#uses=1]
+ %tmp2829 = fptoui ppc_fp128 %tmp15 to i32 ; <i32> [#uses=1]
+ %tmp282930 = zext i32 %tmp2829 to i64 ; <i64> [#uses=1]
+ %tmp32 = add i64 %tmp282930, 0 ; <i64> [#uses=1]
+ ret i64 %tmp32
+}
diff --git a/test/CodeGen/PowerPC/invalid-memcpy.ll b/test/CodeGen/PowerPC/invalid-memcpy.ll
new file mode 100644
index 0000000..3b1f306
--- /dev/null
+++ b/test/CodeGen/PowerPC/invalid-memcpy.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=ppc32
+; RUN: llc < %s -march=ppc64
+
+; This testcase is invalid (the alignment specified for memcpy is
+; greater than the alignment guaranteed for Qux or C.0.1173, but it
+; should compile, not crash the code generator.
+
[email protected] = external constant [33 x i8] ; <[33 x i8]*> [#uses=1]
+
+define void @Bork() {
+entry:
+ %Qux = alloca [33 x i8] ; <[33 x i8]*> [#uses=1]
+ %Qux1 = bitcast [33 x i8]* %Qux to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i64( i8* %Qux1, i8* getelementptr ([33 x i8]* @C.0.1173, i32 0, i32 0), i64 33, i32 8 )
+ ret void
+}
+
+declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
+
+
diff --git a/test/CodeGen/PowerPC/inverted-bool-compares.ll b/test/CodeGen/PowerPC/inverted-bool-compares.ll
new file mode 100644
index 0000000..aa7e4d6
--- /dev/null
+++ b/test/CodeGen/PowerPC/inverted-bool-compares.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=ppc32 | not grep xori
+
+define i32 @test(i1 %B, i32* %P) {
+ br i1 %B, label %T, label %F
+
+T: ; preds = %0
+ store i32 123, i32* %P
+ ret i32 0
+
+F: ; preds = %0
+ ret i32 17
+}
+
diff --git a/test/CodeGen/PowerPC/ispositive.ll b/test/CodeGen/PowerPC/ispositive.ll
new file mode 100644
index 0000000..4161e34
--- /dev/null
+++ b/test/CodeGen/PowerPC/ispositive.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
+; RUN: grep {srwi r3, r3, 31}
+
+define i32 @test1(i32 %X) {
+entry:
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
+
diff --git a/test/CodeGen/PowerPC/itofp128.ll b/test/CodeGen/PowerPC/itofp128.ll
new file mode 100644
index 0000000..6d9ef95
--- /dev/null
+++ b/test/CodeGen/PowerPC/itofp128.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc64
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc64-apple-darwin9.2.0"
+
+define i128 @__fixunstfti(ppc_fp128 %a) nounwind {
+entry:
+ %tmp1213 = uitofp i128 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ %tmp15 = fsub ppc_fp128 %a, %tmp1213 ; <ppc_fp128> [#uses=1]
+ %tmp2829 = fptoui ppc_fp128 %tmp15 to i64 ; <i64> [#uses=1]
+ %tmp282930 = zext i64 %tmp2829 to i128 ; <i128> [#uses=1]
+ %tmp32 = add i128 %tmp282930, 0 ; <i128> [#uses=1]
+ ret i128 %tmp32
+}
diff --git a/test/CodeGen/PowerPC/lha.ll b/test/CodeGen/PowerPC/lha.ll
new file mode 100644
index 0000000..3a100c1
--- /dev/null
+++ b/test/CodeGen/PowerPC/lha.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 | grep lha
+
+define i32 @test(i16* %a) {
+ %tmp.1 = load i16* %a ; <i16> [#uses=1]
+ %tmp.2 = sext i16 %tmp.1 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.2
+}
+
diff --git a/test/CodeGen/PowerPC/load-constant-addr.ll b/test/CodeGen/PowerPC/load-constant-addr.ll
new file mode 100644
index 0000000..f1d061c
--- /dev/null
+++ b/test/CodeGen/PowerPC/load-constant-addr.ll
@@ -0,0 +1,9 @@
+; Should fold the ori into the lfs.
+; RUN: llc < %s -march=ppc32 | grep lfs
+; RUN: llc < %s -march=ppc32 | not grep ori
+
+define float @test() {
+ %tmp.i = load float* inttoptr (i32 186018016 to float*) ; <float> [#uses=1]
+ ret float %tmp.i
+}
+
diff --git a/test/CodeGen/PowerPC/long-compare.ll b/test/CodeGen/PowerPC/long-compare.ll
new file mode 100644
index 0000000..94c2526
--- /dev/null
+++ b/test/CodeGen/PowerPC/long-compare.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32 | grep cntlzw
+; RUN: llc < %s -march=ppc32 | not grep xori
+; RUN: llc < %s -march=ppc32 | not grep {li }
+; RUN: llc < %s -march=ppc32 | not grep {mr }
+
+define i1 @test(i64 %x) {
+ %tmp = icmp ult i64 %x, 4294967296
+ ret i1 %tmp
+}
diff --git a/test/CodeGen/PowerPC/longdbl-truncate.ll b/test/CodeGen/PowerPC/longdbl-truncate.ll
new file mode 100644
index 0000000..e5f63c6
--- /dev/null
+++ b/test/CodeGen/PowerPC/longdbl-truncate.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin8"
+
+define double @SolveCubic(ppc_fp128 %X) {
+entry:
+ %Y = fptrunc ppc_fp128 %X to double
+ ret double %Y
+}
diff --git a/test/CodeGen/PowerPC/mask64.ll b/test/CodeGen/PowerPC/mask64.ll
new file mode 100644
index 0000000..139621a
--- /dev/null
+++ b/test/CodeGen/PowerPC/mask64.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc64-apple-darwin9.2.0"
+ %struct.re_pattern_buffer = type <{ i8*, i64, i8, [7 x i8] }>
+
+define i32 @xre_search_2(%struct.re_pattern_buffer* %bufp, i32 %range) nounwind {
+entry:
+ br i1 false, label %bb16, label %bb49
+
+bb16: ; preds = %entry
+ %tmp19 = load i8** null, align 1 ; <i8*> [#uses=1]
+ %tmp21 = load i8* %tmp19, align 1 ; <i8> [#uses=1]
+ switch i8 %tmp21, label %bb49 [
+ i8 0, label %bb45
+ i8 1, label %bb34
+ ]
+
+bb34: ; preds = %bb16
+ ret i32 0
+
+bb45: ; preds = %bb16
+ ret i32 -1
+
+bb49: ; preds = %bb16, %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/PowerPC/mem-rr-addr-mode.ll b/test/CodeGen/PowerPC/mem-rr-addr-mode.ll
new file mode 100644
index 0000000..5661ef9
--- /dev/null
+++ b/test/CodeGen/PowerPC/mem-rr-addr-mode.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep li.*16
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep addi
+
+; Codegen lvx (R+16) as t = li 16, lvx t,R
+; This shares the 16 between the two loads.
+
+define void @func(<4 x float>* %a, <4 x float>* %b) {
+ %tmp1 = getelementptr <4 x float>* %b, i32 1 ; <<4 x float>*> [#uses=1]
+ %tmp = load <4 x float>* %tmp1 ; <<4 x float>> [#uses=1]
+ %tmp3 = getelementptr <4 x float>* %a, i32 1 ; <<4 x float>*> [#uses=1]
+ %tmp4 = load <4 x float>* %tmp3 ; <<4 x float>> [#uses=1]
+ %tmp5 = fmul <4 x float> %tmp, %tmp4 ; <<4 x float>> [#uses=1]
+ %tmp8 = load <4 x float>* %b ; <<4 x float>> [#uses=1]
+ %tmp9 = fadd <4 x float> %tmp5, %tmp8 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp9, <4 x float>* %a
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/mem_update.ll b/test/CodeGen/PowerPC/mem_update.ll
new file mode 100644
index 0000000..b267719
--- /dev/null
+++ b/test/CodeGen/PowerPC/mem_update.ll
@@ -0,0 +1,68 @@
+; RUN: llc < %s -march=ppc32 -enable-ppc-preinc | \
+; RUN: not grep addi
+; RUN: llc < %s -march=ppc64 -enable-ppc-preinc | \
+; RUN: not grep addi
+
+@Glob = global i64 4 ; <i64*> [#uses=2]
+
+define i32* @test0(i32* %X, i32* %dest) {
+ %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2]
+ %A = load i32* %Y ; <i32> [#uses=1]
+ store i32 %A, i32* %dest
+ ret i32* %Y
+}
+
+define i32* @test1(i32* %X, i32* %dest) {
+ %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2]
+ %A = load i32* %Y ; <i32> [#uses=1]
+ store i32 %A, i32* %dest
+ ret i32* %Y
+}
+
+define i16* @test2(i16* %X, i32* %dest) {
+ %Y = getelementptr i16* %X, i32 4 ; <i16*> [#uses=2]
+ %A = load i16* %Y ; <i16> [#uses=1]
+ %B = sext i16 %A to i32 ; <i32> [#uses=1]
+ store i32 %B, i32* %dest
+ ret i16* %Y
+}
+
+define i16* @test3(i16* %X, i32* %dest) {
+ %Y = getelementptr i16* %X, i32 4 ; <i16*> [#uses=2]
+ %A = load i16* %Y ; <i16> [#uses=1]
+ %B = zext i16 %A to i32 ; <i32> [#uses=1]
+ store i32 %B, i32* %dest
+ ret i16* %Y
+}
+
+define i16* @test3a(i16* %X, i64* %dest) {
+ %Y = getelementptr i16* %X, i32 4 ; <i16*> [#uses=2]
+ %A = load i16* %Y ; <i16> [#uses=1]
+ %B = sext i16 %A to i64 ; <i64> [#uses=1]
+ store i64 %B, i64* %dest
+ ret i16* %Y
+}
+
+define i64* @test4(i64* %X, i64* %dest) {
+ %Y = getelementptr i64* %X, i32 4 ; <i64*> [#uses=2]
+ %A = load i64* %Y ; <i64> [#uses=1]
+ store i64 %A, i64* %dest
+ ret i64* %Y
+}
+
+define i16* @test5(i16* %X) {
+ %Y = getelementptr i16* %X, i32 4 ; <i16*> [#uses=2]
+ store i16 7, i16* %Y
+ ret i16* %Y
+}
+
+define i64* @test6(i64* %X, i64 %A) {
+ %Y = getelementptr i64* %X, i32 4 ; <i64*> [#uses=2]
+ store i64 %A, i64* %Y
+ ret i64* %Y
+}
+
+define i64* @test7(i64* %X, i64 %A) {
+ store i64 %A, i64* @Glob
+ ret i64* @Glob
+}
diff --git a/test/CodeGen/PowerPC/mul-neg-power-2.ll b/test/CodeGen/PowerPC/mul-neg-power-2.ll
new file mode 100644
index 0000000..9688d6e
--- /dev/null
+++ b/test/CodeGen/PowerPC/mul-neg-power-2.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 | not grep mul
+
+define i32 @test1(i32 %a) {
+ %tmp.1 = mul i32 %a, -2 ; <i32> [#uses=1]
+ %tmp.2 = add i32 %tmp.1, 63 ; <i32> [#uses=1]
+ ret i32 %tmp.2
+}
+
diff --git a/test/CodeGen/PowerPC/mul-with-overflow.ll b/test/CodeGen/PowerPC/mul-with-overflow.ll
new file mode 100644
index 0000000..f03e3cb
--- /dev/null
+++ b/test/CodeGen/PowerPC/mul-with-overflow.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc32
+
+declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
+define i1 @a(i32 %x) zeroext nounwind {
+ %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3)
+ %obil = extractvalue {i32, i1} %res, 1
+ ret i1 %obil
+}
+
+declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
+define i1 @b(i32 %x) zeroext nounwind {
+ %res = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %x, i32 3)
+ %obil = extractvalue {i32, i1} %res, 1
+ ret i1 %obil
+}
diff --git a/test/CodeGen/PowerPC/mulhs.ll b/test/CodeGen/PowerPC/mulhs.ll
new file mode 100644
index 0000000..9ab8d99
--- /dev/null
+++ b/test/CodeGen/PowerPC/mulhs.ll
@@ -0,0 +1,17 @@
+; All of these ands and shifts should be folded into rlwimi's
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: not grep mulhwu %t
+; RUN: not grep srawi %t
+; RUN: not grep add %t
+; RUN: grep mulhw %t | count 1
+
+define i32 @mulhs(i32 %a, i32 %b) {
+entry:
+ %tmp.1 = sext i32 %a to i64 ; <i64> [#uses=1]
+ %tmp.3 = sext i32 %b to i64 ; <i64> [#uses=1]
+ %tmp.4 = mul i64 %tmp.3, %tmp.1 ; <i64> [#uses=1]
+ %tmp.6 = lshr i64 %tmp.4, 32 ; <i64> [#uses=1]
+ %tmp.7 = trunc i64 %tmp.6 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.7
+}
+
diff --git a/test/CodeGen/PowerPC/multiple-return-values.ll b/test/CodeGen/PowerPC/multiple-return-values.ll
new file mode 100644
index 0000000..b9317f9
--- /dev/null
+++ b/test/CodeGen/PowerPC/multiple-return-values.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=ppc32
+; RUN: llc < %s -march=ppc64
+
+define {i64, float} @bar(i64 %a, float %b) {
+ %y = add i64 %a, 7
+ %z = fadd float %b, 7.0
+ ret i64 %y, float %z
+}
+
+define i64 @foo() {
+ %M = call {i64, float} @bar(i64 21, float 21.0)
+ %N = getresult {i64, float} %M, 0
+ %O = getresult {i64, float} %M, 1
+ %P = fptosi float %O to i64
+ %Q = add i64 %P, %N
+ ret i64 %Q
+}
diff --git a/test/CodeGen/PowerPC/neg.ll b/test/CodeGen/PowerPC/neg.ll
new file mode 100644
index 0000000..c673912
--- /dev/null
+++ b/test/CodeGen/PowerPC/neg.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=ppc32 | grep neg
+
+define i32 @test(i32 %X) {
+ %Y = sub i32 0, %X ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/CodeGen/PowerPC/no-dead-strip.ll b/test/CodeGen/PowerPC/no-dead-strip.ll
new file mode 100644
index 0000000..3459413
--- /dev/null
+++ b/test/CodeGen/PowerPC/no-dead-strip.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s | grep {no_dead_strip.*_X}
+
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "powerpc-apple-darwin8.8.0"
+@X = weak global i32 0 ; <i32*> [#uses=1]
[email protected] = internal constant [4 x i8] c"t.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast (i32* @X to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
diff --git a/test/CodeGen/PowerPC/or-addressing-mode.ll b/test/CodeGen/PowerPC/or-addressing-mode.ll
new file mode 100644
index 0000000..e50374e
--- /dev/null
+++ b/test/CodeGen/PowerPC/or-addressing-mode.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin8 | not grep ori
+; RUN: llc < %s -mtriple=powerpc-apple-darwin8 | not grep rlwimi
+
+define i32 @test1(i8* %P) {
+ %tmp.2.i = ptrtoint i8* %P to i32 ; <i32> [#uses=2]
+ %tmp.4.i = and i32 %tmp.2.i, -65536 ; <i32> [#uses=1]
+ %tmp.10.i = lshr i32 %tmp.2.i, 5 ; <i32> [#uses=1]
+ %tmp.11.i = and i32 %tmp.10.i, 2040 ; <i32> [#uses=1]
+ %tmp.13.i = or i32 %tmp.11.i, %tmp.4.i ; <i32> [#uses=1]
+ %tmp.14.i = inttoptr i32 %tmp.13.i to i32* ; <i32*> [#uses=1]
+ %tmp.3 = load i32* %tmp.14.i ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
+
+define i32 @test2(i32 %P) {
+ %tmp.2 = shl i32 %P, 4 ; <i32> [#uses=1]
+ %tmp.3 = or i32 %tmp.2, 2 ; <i32> [#uses=1]
+ %tmp.4 = inttoptr i32 %tmp.3 to i32* ; <i32*> [#uses=1]
+ %tmp.5 = load i32* %tmp.4 ; <i32> [#uses=1]
+ ret i32 %tmp.5
+}
+
diff --git a/test/CodeGen/PowerPC/ppc-prologue.ll b/test/CodeGen/PowerPC/ppc-prologue.ll
new file mode 100644
index 0000000..e49dcb8
--- /dev/null
+++ b/test/CodeGen/PowerPC/ppc-prologue.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s
+
+define i32 @_Z4funci(i32 %a) ssp {
+; CHECK: mflr r0
+; CHECK-NEXT: stw r31, -4(r1)
+; CHECK-NEXT: stw r0, 8(r1)
+; CHECK-NEXT: stwu r1, -80(r1)
+; CHECK-NEXT: Llabel1:
+; CHECK-NEXT: mr r31, r1
+; CHECK-NEXT: Llabel2:
+entry:
+ %a_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %a, i32* %a_addr
+ %1 = call i32 @_Z3barPi(i32* %a_addr) ; <i32> [#uses=1]
+ store i32 %1, i32* %0, align 4
+ %2 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %2, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
+
+declare i32 @_Z3barPi(i32*)
diff --git a/test/CodeGen/PowerPC/ppcf128-1-opt.ll b/test/CodeGen/PowerPC/ppcf128-1-opt.ll
new file mode 100644
index 0000000..2fc1720
--- /dev/null
+++ b/test/CodeGen/PowerPC/ppcf128-1-opt.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s > %t
+; ModuleID = '<stdin>'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin8"
+
+define ppc_fp128 @plus(ppc_fp128 %x, ppc_fp128 %y) {
+entry:
+ %tmp3 = fadd ppc_fp128 %x, %y ; <ppc_fp128> [#uses=1]
+ ret ppc_fp128 %tmp3
+}
+
+define ppc_fp128 @minus(ppc_fp128 %x, ppc_fp128 %y) {
+entry:
+ %tmp3 = fsub ppc_fp128 %x, %y ; <ppc_fp128> [#uses=1]
+ ret ppc_fp128 %tmp3
+}
+
+define ppc_fp128 @times(ppc_fp128 %x, ppc_fp128 %y) {
+entry:
+ %tmp3 = fmul ppc_fp128 %x, %y ; <ppc_fp128> [#uses=1]
+ ret ppc_fp128 %tmp3
+}
+
+define ppc_fp128 @divide(ppc_fp128 %x, ppc_fp128 %y) {
+entry:
+ %tmp3 = fdiv ppc_fp128 %x, %y ; <ppc_fp128> [#uses=1]
+ ret ppc_fp128 %tmp3
+}
+
diff --git a/test/CodeGen/PowerPC/ppcf128-1.ll b/test/CodeGen/PowerPC/ppcf128-1.ll
new file mode 100644
index 0000000..1047fe5
--- /dev/null
+++ b/test/CodeGen/PowerPC/ppcf128-1.ll
@@ -0,0 +1,92 @@
+; RUN: opt < %s -std-compile-opts | llc > %t
+; ModuleID = 'ld3.c'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin8"
+
+define ppc_fp128 @plus(ppc_fp128 %x, ppc_fp128 %y) {
+entry:
+ %x_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
+ %y_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
+ %retval = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
+ %tmp = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store ppc_fp128 %x, ppc_fp128* %x_addr
+ store ppc_fp128 %y, ppc_fp128* %y_addr
+ %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1]
+ %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1]
+ %tmp3 = fadd ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16
+ %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1]
+ ret ppc_fp128 %retval5
+}
+
+define ppc_fp128 @minus(ppc_fp128 %x, ppc_fp128 %y) {
+entry:
+ %x_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
+ %y_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
+ %retval = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
+ %tmp = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store ppc_fp128 %x, ppc_fp128* %x_addr
+ store ppc_fp128 %y, ppc_fp128* %y_addr
+ %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1]
+ %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1]
+ %tmp3 = fsub ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16
+ %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1]
+ ret ppc_fp128 %retval5
+}
+
+define ppc_fp128 @times(ppc_fp128 %x, ppc_fp128 %y) {
+entry:
+ %x_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
+ %y_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
+ %retval = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
+ %tmp = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store ppc_fp128 %x, ppc_fp128* %x_addr
+ store ppc_fp128 %y, ppc_fp128* %y_addr
+ %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1]
+ %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1]
+ %tmp3 = fmul ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16
+ %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1]
+ ret ppc_fp128 %retval5
+}
+
+define ppc_fp128 @divide(ppc_fp128 %x, ppc_fp128 %y) {
+entry:
+ %x_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
+ %y_addr = alloca ppc_fp128 ; <ppc_fp128*> [#uses=2]
+ %retval = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
+ %tmp = alloca ppc_fp128, align 16 ; <ppc_fp128*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store ppc_fp128 %x, ppc_fp128* %x_addr
+ store ppc_fp128 %y, ppc_fp128* %y_addr
+ %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1]
+ %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1]
+ %tmp3 = fdiv ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16
+ %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1]
+ ret ppc_fp128 %retval5
+}
diff --git a/test/CodeGen/PowerPC/ppcf128-2.ll b/test/CodeGen/PowerPC/ppcf128-2.ll
new file mode 100644
index 0000000..7eee354
--- /dev/null
+++ b/test/CodeGen/PowerPC/ppcf128-2.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc64
+
+define i64 @__fixtfdi(ppc_fp128 %a) nounwind {
+entry:
+ br i1 false, label %bb, label %bb8
+bb: ; preds = %entry
+ %tmp5 = fsub ppc_fp128 0xM80000000000000000000000000000000, %a ; <ppc_fp128> [#uses=1]
+ %tmp6 = tail call i64 @__fixunstfdi( ppc_fp128 %tmp5 ) nounwind ; <i64> [#uses=0]
+ ret i64 0
+bb8: ; preds = %entry
+ ret i64 0
+}
+
+declare i64 @__fixunstfdi(ppc_fp128)
diff --git a/test/CodeGen/PowerPC/ppcf128-3.ll b/test/CodeGen/PowerPC/ppcf128-3.ll
new file mode 100644
index 0000000..5043b62
--- /dev/null
+++ b/test/CodeGen/PowerPC/ppcf128-3.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=ppc32
+ %struct.stp_sequence = type { double, double }
+
+define i32 @stp_sequence_set_short_data(%struct.stp_sequence* %sequence, i32 %count, i16* %data) {
+entry:
+ %tmp1112 = sitofp i16 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ %tmp13 = call i32 (...)* @__inline_isfinite( ppc_fp128 %tmp1112 ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+define i32 @stp_sequence_set_short_data2(%struct.stp_sequence* %sequence, i32 %count, i16* %data) {
+entry:
+ %tmp1112 = sitofp i8 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ %tmp13 = call i32 (...)* @__inline_isfinite( ppc_fp128 %tmp1112 ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+define i32 @stp_sequence_set_short_data3(%struct.stp_sequence* %sequence, i32 %count, i16* %data) {
+entry:
+ %tmp1112 = uitofp i16 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ %tmp13 = call i32 (...)* @__inline_isfinite( ppc_fp128 %tmp1112 ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+define i32 @stp_sequence_set_short_data4(%struct.stp_sequence* %sequence, i32 %count, i16* %data) {
+entry:
+ %tmp1112 = uitofp i8 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ %tmp13 = call i32 (...)* @__inline_isfinite( ppc_fp128 %tmp1112 ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @__inline_isfinite(...)
diff --git a/test/CodeGen/PowerPC/ppcf128-4.ll b/test/CodeGen/PowerPC/ppcf128-4.ll
new file mode 100644
index 0000000..104a25e
--- /dev/null
+++ b/test/CodeGen/PowerPC/ppcf128-4.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32
+
+define ppc_fp128 @__floatditf(i64 %u) nounwind {
+entry:
+ %tmp6 = fmul ppc_fp128 0xM00000000000000000000000000000000, 0xM41F00000000000000000000000000000
+ %tmp78 = trunc i64 %u to i32
+ %tmp789 = uitofp i32 %tmp78 to ppc_fp128
+ %tmp11 = fadd ppc_fp128 %tmp789, %tmp6
+ ret ppc_fp128 %tmp11
+}
diff --git a/test/CodeGen/PowerPC/pr3711_widen_bit.ll b/test/CodeGen/PowerPC/pr3711_widen_bit.ll
new file mode 100644
index 0000000..7abdeda
--- /dev/null
+++ b/test/CodeGen/PowerPC/pr3711_widen_bit.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5
+
+; Test that causes a abort in expanding a bit convert due to a missing support
+; for widening.
+
+define i32 @main() nounwind {
+entry:
+ br i1 icmp ne (i32 trunc (i64 bitcast (<2 x i32> <i32 2, i32 2> to i64) to i32), i32 2), label %bb, label %bb1
+
+bb: ; preds = %entry
+ tail call void @abort() noreturn nounwind
+ unreachable
+
+bb1: ; preds = %entry
+ ret i32 0
+}
+
+declare void @abort() noreturn nounwind
diff --git a/test/CodeGen/PowerPC/private.ll b/test/CodeGen/PowerPC/private.ll
new file mode 100644
index 0000000..f9405f6
--- /dev/null
+++ b/test/CodeGen/PowerPC/private.ll
@@ -0,0 +1,24 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu > %t
+; RUN: grep .Lfoo: %t
+; RUN: grep bl.*\.Lfoo %t
+; RUN: grep .Lbaz: %t
+; RUN: grep lis.*\.Lbaz %t
+; RUN: llc < %s -mtriple=powerpc-apple-darwin > %t
+; RUN: grep L_foo: %t
+; RUN: grep bl.*\L_foo %t
+; RUN: grep L_baz: %t
+; RUN: grep lis.*\L_baz %t
+
+define private void @foo() nounwind {
+ ret void
+}
+
+@baz = private global i32 4
+
+define i32 @bar() nounwind {
+ call void @foo()
+ %1 = load i32* @baz, align 4
+ ret i32 %1
+}
diff --git a/test/CodeGen/PowerPC/reg-coalesce-simple.ll b/test/CodeGen/PowerPC/reg-coalesce-simple.ll
new file mode 100644
index 0000000..e0ddb42
--- /dev/null
+++ b/test/CodeGen/PowerPC/reg-coalesce-simple.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=ppc32 | not grep or
+
+%struct.foo = type { i32, i32, [0 x i8] }
+
+define i32 @test(%struct.foo* %X) nounwind {
+ %tmp1 = getelementptr %struct.foo* %X, i32 0, i32 2, i32 100 ; <i8*> [#uses=1]
+ %tmp = load i8* %tmp1 ; <i8> [#uses=1]
+ %tmp2 = zext i8 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+
diff --git a/test/CodeGen/PowerPC/retaddr.ll b/test/CodeGen/PowerPC/retaddr.ll
new file mode 100644
index 0000000..9f8647d
--- /dev/null
+++ b/test/CodeGen/PowerPC/retaddr.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc32 | grep mflr
+; RUN: llc < %s -march=ppc32 | grep lwz
+; RUN: llc < %s -march=ppc64 | grep {ld r., 16(r1)}
+
+target triple = "powerpc-apple-darwin8"
+
+define void @foo(i8** %X) {
+entry:
+ %tmp = tail call i8* @llvm.returnaddress( i32 0 ) ; <i8*> [#uses=1]
+ store i8* %tmp, i8** %X, align 4
+ ret void
+}
+
+declare i8* @llvm.returnaddress(i32)
+
diff --git a/test/CodeGen/PowerPC/return-val-i128.ll b/test/CodeGen/PowerPC/return-val-i128.ll
new file mode 100644
index 0000000..e14a438
--- /dev/null
+++ b/test/CodeGen/PowerPC/return-val-i128.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=ppc64
+
+define i128 @__fixsfdi(float %a) {
+entry:
+ %a_addr = alloca float ; <float*> [#uses=4]
+ %retval = alloca i128, align 16 ; <i128*> [#uses=2]
+ %tmp = alloca i128, align 16 ; <i128*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float %a, float* %a_addr
+ %tmp1 = load float* %a_addr, align 4 ; <float> [#uses=1]
+ %tmp2 = fcmp olt float %tmp1, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp23 = zext i1 %tmp2 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb8
+bb: ; preds = %entry
+ %tmp4 = load float* %a_addr, align 4 ; <float> [#uses=1]
+ %tmp5 = fsub float -0.000000e+00, %tmp4 ; <float> [#uses=1]
+ %tmp6 = call i128 @__fixunssfDI( float %tmp5 ) nounwind ; <i128> [#uses=1]
+ %tmp7 = sub i128 0, %tmp6 ; <i128> [#uses=1]
+ store i128 %tmp7, i128* %tmp, align 16
+ br label %bb11
+bb8: ; preds = %entry
+ %tmp9 = load float* %a_addr, align 4 ; <float> [#uses=1]
+ %tmp10 = call i128 @__fixunssfDI( float %tmp9 ) nounwind ; <i128> [#uses=1]
+ store i128 %tmp10, i128* %tmp, align 16
+ br label %bb11
+bb11: ; preds = %bb8, %bb
+ %tmp12 = load i128* %tmp, align 16 ; <i128> [#uses=1]
+ store i128 %tmp12, i128* %retval, align 16
+ br label %return
+return: ; preds = %bb11
+ %retval13 = load i128* %retval ; <i128> [#uses=1]
+ ret i128 %retval13
+}
+
+declare i128 @__fixunssfDI(float)
diff --git a/test/CodeGen/PowerPC/rlwimi-commute.ll b/test/CodeGen/PowerPC/rlwimi-commute.ll
new file mode 100644
index 0000000..6410c63
--- /dev/null
+++ b/test/CodeGen/PowerPC/rlwimi-commute.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=ppc32 | grep rlwimi
+; RUN: llc < %s -march=ppc32 | not grep {or }
+
+; Make sure there is no register-register copies here.
+
+define void @test1(i32* %A, i32* %B, i32* %D, i32* %E) {
+ %A.upgrd.1 = load i32* %A ; <i32> [#uses=2]
+ %B.upgrd.2 = load i32* %B ; <i32> [#uses=1]
+ %X = and i32 %A.upgrd.1, 15 ; <i32> [#uses=1]
+ %Y = and i32 %B.upgrd.2, -16 ; <i32> [#uses=1]
+ %Z = or i32 %X, %Y ; <i32> [#uses=1]
+ store i32 %Z, i32* %D
+ store i32 %A.upgrd.1, i32* %E
+ ret void
+}
+
+define void @test2(i32* %A, i32* %B, i32* %D, i32* %E) {
+ %A.upgrd.3 = load i32* %A ; <i32> [#uses=1]
+ %B.upgrd.4 = load i32* %B ; <i32> [#uses=2]
+ %X = and i32 %A.upgrd.3, 15 ; <i32> [#uses=1]
+ %Y = and i32 %B.upgrd.4, -16 ; <i32> [#uses=1]
+ %Z = or i32 %X, %Y ; <i32> [#uses=1]
+ store i32 %Z, i32* %D
+ store i32 %B.upgrd.4, i32* %E
+ ret void
+}
+
+define i32 @test3(i32 %a, i32 %b) {
+ %tmp.1 = and i32 %a, 15 ; <i32> [#uses=1]
+ %tmp.3 = and i32 %b, 240 ; <i32> [#uses=1]
+ %tmp.4 = or i32 %tmp.3, %tmp.1 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+}
+
diff --git a/test/CodeGen/PowerPC/rlwimi-keep-rsh.ll b/test/CodeGen/PowerPC/rlwimi-keep-rsh.ll
new file mode 100644
index 0000000..7bce01c
--- /dev/null
+++ b/test/CodeGen/PowerPC/rlwimi-keep-rsh.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin | FileCheck %s
+; Formerly dropped the RHS of %tmp6 when constructing rlwimi.
+; 7346117
+
+@foo = external global i32
+
+define void @xxx(i32 %a, i32 %b, i32 %c, i32 %d) nounwind optsize {
+; CHECK: _xxx:
+; CHECK: or
+; CHECK: and
+; CHECK: rlwimi
+entry:
+ %tmp0 = ashr i32 %d, 31
+ %tmp1 = and i32 %tmp0, 255
+ %tmp2 = xor i32 %tmp1, 255
+ %tmp3 = ashr i32 %b, 31
+ %tmp4 = ashr i32 %a, 4
+ %tmp5 = or i32 %tmp3, %tmp4
+ %tmp6 = and i32 %tmp2, %tmp5
+ %tmp7 = shl i32 %c, 8
+ %tmp8 = or i32 %tmp6, %tmp7
+ store i32 %tmp8, i32* @foo, align 4
+ br label %return
+
+return:
+ ret void
+; CHECK: blr
+}
\ No newline at end of file
diff --git a/test/CodeGen/PowerPC/rlwimi.ll b/test/CodeGen/PowerPC/rlwimi.ll
new file mode 100644
index 0000000..556ca3d
--- /dev/null
+++ b/test/CodeGen/PowerPC/rlwimi.ll
@@ -0,0 +1,70 @@
+; All of these ands and shifts should be folded into rlwimi's
+; RUN: llc < %s -march=ppc32 | not grep and
+; RUN: llc < %s -march=ppc32 | grep rlwimi | count 8
+
+define i32 @test1(i32 %x, i32 %y) {
+entry:
+ %tmp.3 = shl i32 %x, 16 ; <i32> [#uses=1]
+ %tmp.7 = and i32 %y, 65535 ; <i32> [#uses=1]
+ %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
+
+define i32 @test2(i32 %x, i32 %y) {
+entry:
+ %tmp.7 = and i32 %x, 65535 ; <i32> [#uses=1]
+ %tmp.3 = shl i32 %y, 16 ; <i32> [#uses=1]
+ %tmp.9 = or i32 %tmp.7, %tmp.3 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
+
+define i32 @test3(i32 %x, i32 %y) {
+entry:
+ %tmp.3 = lshr i32 %x, 16 ; <i32> [#uses=1]
+ %tmp.6 = and i32 %y, -65536 ; <i32> [#uses=1]
+ %tmp.7 = or i32 %tmp.6, %tmp.3 ; <i32> [#uses=1]
+ ret i32 %tmp.7
+}
+
+define i32 @test4(i32 %x, i32 %y) {
+entry:
+ %tmp.6 = and i32 %x, -65536 ; <i32> [#uses=1]
+ %tmp.3 = lshr i32 %y, 16 ; <i32> [#uses=1]
+ %tmp.7 = or i32 %tmp.6, %tmp.3 ; <i32> [#uses=1]
+ ret i32 %tmp.7
+}
+
+define i32 @test5(i32 %x, i32 %y) {
+entry:
+ %tmp.3 = shl i32 %x, 1 ; <i32> [#uses=1]
+ %tmp.4 = and i32 %tmp.3, -65536 ; <i32> [#uses=1]
+ %tmp.7 = and i32 %y, 65535 ; <i32> [#uses=1]
+ %tmp.9 = or i32 %tmp.4, %tmp.7 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
+
+define i32 @test6(i32 %x, i32 %y) {
+entry:
+ %tmp.7 = and i32 %x, 65535 ; <i32> [#uses=1]
+ %tmp.3 = shl i32 %y, 1 ; <i32> [#uses=1]
+ %tmp.4 = and i32 %tmp.3, -65536 ; <i32> [#uses=1]
+ %tmp.9 = or i32 %tmp.4, %tmp.7 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
+
+define i32 @test7(i32 %x, i32 %y) {
+entry:
+ %tmp.2 = and i32 %x, -65536 ; <i32> [#uses=1]
+ %tmp.5 = and i32 %y, 65535 ; <i32> [#uses=1]
+ %tmp.7 = or i32 %tmp.5, %tmp.2 ; <i32> [#uses=1]
+ ret i32 %tmp.7
+}
+
+define i32 @test8(i32 %bar) {
+entry:
+ %tmp.3 = shl i32 %bar, 1 ; <i32> [#uses=1]
+ %tmp.4 = and i32 %tmp.3, 2 ; <i32> [#uses=1]
+ %tmp.6 = and i32 %bar, -3 ; <i32> [#uses=1]
+ %tmp.7 = or i32 %tmp.4, %tmp.6 ; <i32> [#uses=1]
+ ret i32 %tmp.7
+}
diff --git a/test/CodeGen/PowerPC/rlwimi2.ll b/test/CodeGen/PowerPC/rlwimi2.ll
new file mode 100644
index 0000000..59a3655
--- /dev/null
+++ b/test/CodeGen/PowerPC/rlwimi2.ll
@@ -0,0 +1,29 @@
+; All of these ands and shifts should be folded into rlwimi's
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: grep rlwimi %t | count 3
+; RUN: grep srwi %t | count 1
+; RUN: not grep slwi %t
+
+define i16 @test1(i32 %srcA, i32 %srcB, i32 %alpha) {
+entry:
+ %tmp.1 = shl i32 %srcA, 15 ; <i32> [#uses=1]
+ %tmp.4 = and i32 %tmp.1, 32505856 ; <i32> [#uses=1]
+ %tmp.6 = and i32 %srcA, 31775 ; <i32> [#uses=1]
+ %tmp.7 = or i32 %tmp.4, %tmp.6 ; <i32> [#uses=1]
+ %tmp.9 = shl i32 %srcB, 15 ; <i32> [#uses=1]
+ %tmp.12 = and i32 %tmp.9, 32505856 ; <i32> [#uses=1]
+ %tmp.14 = and i32 %srcB, 31775 ; <i32> [#uses=1]
+ %tmp.15 = or i32 %tmp.12, %tmp.14 ; <i32> [#uses=1]
+ %tmp.18 = mul i32 %tmp.7, %alpha ; <i32> [#uses=1]
+ %tmp.20 = sub i32 32, %alpha ; <i32> [#uses=1]
+ %tmp.22 = mul i32 %tmp.15, %tmp.20 ; <i32> [#uses=1]
+ %tmp.23 = add i32 %tmp.22, %tmp.18 ; <i32> [#uses=2]
+ %tmp.27 = lshr i32 %tmp.23, 5 ; <i32> [#uses=1]
+ %tmp.28 = trunc i32 %tmp.27 to i16 ; <i16> [#uses=1]
+ %tmp.29 = and i16 %tmp.28, 31775 ; <i16> [#uses=1]
+ %tmp.33 = lshr i32 %tmp.23, 20 ; <i32> [#uses=1]
+ %tmp.34 = trunc i32 %tmp.33 to i16 ; <i16> [#uses=1]
+ %tmp.35 = and i16 %tmp.34, 992 ; <i16> [#uses=1]
+ %tmp.36 = or i16 %tmp.29, %tmp.35 ; <i16> [#uses=1]
+ ret i16 %tmp.36
+}
diff --git a/test/CodeGen/PowerPC/rlwimi3.ll b/test/CodeGen/PowerPC/rlwimi3.ll
new file mode 100644
index 0000000..05d37bf
--- /dev/null
+++ b/test/CodeGen/PowerPC/rlwimi3.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=ppc32 -stats |& \
+; RUN: grep {Number of machine instrs printed} | grep 12
+
+define i16 @Trans16Bit(i32 %srcA, i32 %srcB, i32 %alpha) {
+ %tmp1 = shl i32 %srcA, 15 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 32505856 ; <i32> [#uses=1]
+ %tmp4 = and i32 %srcA, 31775 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp2, %tmp4 ; <i32> [#uses=1]
+ %tmp7 = shl i32 %srcB, 15 ; <i32> [#uses=1]
+ %tmp8 = and i32 %tmp7, 32505856 ; <i32> [#uses=1]
+ %tmp10 = and i32 %srcB, 31775 ; <i32> [#uses=1]
+ %tmp11 = or i32 %tmp8, %tmp10 ; <i32> [#uses=1]
+ %tmp14 = mul i32 %tmp5, %alpha ; <i32> [#uses=1]
+ %tmp16 = sub i32 32, %alpha ; <i32> [#uses=1]
+ %tmp18 = mul i32 %tmp11, %tmp16 ; <i32> [#uses=1]
+ %tmp19 = add i32 %tmp18, %tmp14 ; <i32> [#uses=2]
+ %tmp21 = lshr i32 %tmp19, 5 ; <i32> [#uses=1]
+ %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
+ %tmp = and i16 %tmp21.upgrd.1, 31775 ; <i16> [#uses=1]
+ %tmp23 = lshr i32 %tmp19, 20 ; <i32> [#uses=1]
+ %tmp23.upgrd.2 = trunc i32 %tmp23 to i16 ; <i16> [#uses=1]
+ %tmp24 = and i16 %tmp23.upgrd.2, 992 ; <i16> [#uses=1]
+ %tmp25 = or i16 %tmp, %tmp24 ; <i16> [#uses=1]
+ ret i16 %tmp25
+}
diff --git a/test/CodeGen/PowerPC/rlwinm.ll b/test/CodeGen/PowerPC/rlwinm.ll
new file mode 100644
index 0000000..699f6e7
--- /dev/null
+++ b/test/CodeGen/PowerPC/rlwinm.ll
@@ -0,0 +1,61 @@
+; All of these ands and shifts should be folded into rlwimi's
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: not grep and %t
+; RUN: not grep srawi %t
+; RUN: not grep srwi %t
+; RUN: not grep slwi %t
+; RUN: grep rlwinm %t | count 8
+
+define i32 @test1(i32 %a) {
+entry:
+ %tmp.1 = and i32 %a, 268431360 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
+define i32 @test2(i32 %a) {
+entry:
+ %tmp.1 = and i32 %a, -268435441 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
+define i32 @test3(i32 %a) {
+entry:
+ %tmp.2 = ashr i32 %a, 8 ; <i32> [#uses=1]
+ %tmp.3 = and i32 %tmp.2, 255 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
+
+define i32 @test4(i32 %a) {
+entry:
+ %tmp.3 = lshr i32 %a, 8 ; <i32> [#uses=1]
+ %tmp.4 = and i32 %tmp.3, 255 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+}
+
+define i32 @test5(i32 %a) {
+entry:
+ %tmp.2 = shl i32 %a, 8 ; <i32> [#uses=1]
+ %tmp.3 = and i32 %tmp.2, -8388608 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
+
+define i32 @test6(i32 %a) {
+entry:
+ %tmp.1 = and i32 %a, 65280 ; <i32> [#uses=1]
+ %tmp.2 = ashr i32 %tmp.1, 8 ; <i32> [#uses=1]
+ ret i32 %tmp.2
+}
+
+define i32 @test7(i32 %a) {
+entry:
+ %tmp.1 = and i32 %a, 65280 ; <i32> [#uses=1]
+ %tmp.2 = lshr i32 %tmp.1, 8 ; <i32> [#uses=1]
+ ret i32 %tmp.2
+}
+
+define i32 @test8(i32 %a) {
+entry:
+ %tmp.1 = and i32 %a, 16711680 ; <i32> [#uses=1]
+ %tmp.2 = shl i32 %tmp.1, 8 ; <i32> [#uses=1]
+ ret i32 %tmp.2
+}
diff --git a/test/CodeGen/PowerPC/rlwinm2.ll b/test/CodeGen/PowerPC/rlwinm2.ll
new file mode 100644
index 0000000..46542d8
--- /dev/null
+++ b/test/CodeGen/PowerPC/rlwinm2.ll
@@ -0,0 +1,28 @@
+; All of these ands and shifts should be folded into rlw[i]nm instructions
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: not grep and %t
+; RUN: not grep srawi %t
+; RUN: not grep srwi %t
+; RUN: not grep slwi %t
+; RUN: grep rlwnm %t | count 1
+; RUN: grep rlwinm %t | count 1
+
+define i32 @test1(i32 %X, i32 %Y) {
+entry:
+ %tmp = trunc i32 %Y to i8 ; <i8> [#uses=2]
+ %tmp1 = shl i32 %X, %Y ; <i32> [#uses=1]
+ %tmp2 = sub i32 32, %Y ; <i8> [#uses=1]
+ %tmp3 = lshr i32 %X, %tmp2 ; <i32> [#uses=1]
+ %tmp4 = or i32 %tmp1, %tmp3 ; <i32> [#uses=1]
+ %tmp6 = and i32 %tmp4, 127 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test2(i32 %X) {
+entry:
+ %tmp1 = lshr i32 %X, 27 ; <i32> [#uses=1]
+ %tmp2 = shl i32 %X, 5 ; <i32> [#uses=1]
+ %tmp2.masked = and i32 %tmp2, 96 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp1, %tmp2.masked ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
diff --git a/test/CodeGen/PowerPC/rotl-2.ll b/test/CodeGen/PowerPC/rotl-2.ll
new file mode 100644
index 0000000..d32ef59
--- /dev/null
+++ b/test/CodeGen/PowerPC/rotl-2.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=ppc32 | grep rlwinm | count 4
+; RUN: llc < %s -march=ppc32 | grep rlwnm | count 2
+; RUN: llc < %s -march=ppc32 | not grep or
+
+define i32 @rotl32(i32 %A, i8 %Amt) nounwind {
+ %shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1]
+ %B = shl i32 %A, %shift.upgrd.1 ; <i32> [#uses=1]
+ %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
+ %shift.upgrd.2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
+ %C = lshr i32 %A, %shift.upgrd.2 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotr32(i32 %A, i8 %Amt) nounwind {
+ %shift.upgrd.3 = zext i8 %Amt to i32 ; <i32> [#uses=1]
+ %B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1]
+ %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
+ %shift.upgrd.4 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
+ %C = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotli32(i32 %A) nounwind {
+ %B = shl i32 %A, 5 ; <i32> [#uses=1]
+ %C = lshr i32 %A, 27 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotri32(i32 %A) nounwind {
+ %B = lshr i32 %A, 5 ; <i32> [#uses=1]
+ %C = shl i32 %A, 27 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
diff --git a/test/CodeGen/PowerPC/rotl-64.ll b/test/CodeGen/PowerPC/rotl-64.ll
new file mode 100644
index 0000000..674c9e4
--- /dev/null
+++ b/test/CodeGen/PowerPC/rotl-64.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=ppc64 | grep rldicl
+; RUN: llc < %s -march=ppc64 | grep rldcl
+; PR1613
+
+define i64 @t1(i64 %A) {
+ %tmp1 = lshr i64 %A, 57
+ %tmp2 = shl i64 %A, 7
+ %tmp3 = or i64 %tmp1, %tmp2
+ ret i64 %tmp3
+}
+
+define i64 @t2(i64 %A, i8 zeroext %Amt) {
+ %Amt1 = zext i8 %Amt to i64
+ %tmp1 = lshr i64 %A, %Amt1
+ %Amt2 = sub i8 64, %Amt
+ %Amt3 = zext i8 %Amt2 to i64
+ %tmp2 = shl i64 %A, %Amt3
+ %tmp3 = or i64 %tmp1, %tmp2
+ ret i64 %tmp3
+}
diff --git a/test/CodeGen/PowerPC/rotl.ll b/test/CodeGen/PowerPC/rotl.ll
new file mode 100644
index 0000000..56fc4a8
--- /dev/null
+++ b/test/CodeGen/PowerPC/rotl.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=ppc32 | grep rlwnm | count 2
+; RUN: llc < %s -march=ppc32 | grep rlwinm | count 2
+
+define i32 @rotlw(i32 %x, i32 %sh) {
+entry:
+ %tmp.7 = sub i32 32, %sh ; <i32> [#uses=1]
+ %tmp.10 = lshr i32 %x, %tmp.7 ; <i32> [#uses=2]
+ %tmp.4 = shl i32 %x, %sh ; <i32> [#uses=1]
+ %tmp.12 = or i32 %tmp.10, %tmp.4 ; <i32> [#uses=1]
+ ret i32 %tmp.12
+}
+
+define i32 @rotrw(i32 %x, i32 %sh) {
+entry:
+ %tmp.3 = trunc i32 %sh to i8 ; <i8> [#uses=1]
+ %tmp.4 = lshr i32 %x, %sh ; <i32> [#uses=2]
+ %tmp.7 = sub i32 32, %sh ; <i32> [#uses=1]
+ %tmp.10 = shl i32 %x, %tmp.7 ; <i32> [#uses=1]
+ %tmp.12 = or i32 %tmp.4, %tmp.10 ; <i32> [#uses=1]
+ ret i32 %tmp.12
+}
+
+define i32 @rotlwi(i32 %x) {
+entry:
+ %tmp.7 = lshr i32 %x, 27 ; <i32> [#uses=2]
+ %tmp.3 = shl i32 %x, 5 ; <i32> [#uses=1]
+ %tmp.9 = or i32 %tmp.3, %tmp.7 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
+
+define i32 @rotrwi(i32 %x) {
+entry:
+ %tmp.3 = lshr i32 %x, 5 ; <i32> [#uses=2]
+ %tmp.7 = shl i32 %x, 27 ; <i32> [#uses=1]
+ %tmp.9 = or i32 %tmp.3, %tmp.7 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
diff --git a/test/CodeGen/PowerPC/sections.ll b/test/CodeGen/PowerPC/sections.ll
new file mode 100644
index 0000000..0ff4a89
--- /dev/null
+++ b/test/CodeGen/PowerPC/sections.ll
@@ -0,0 +1,8 @@
+; Test to make sure that bss sections are printed with '.section' directive.
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s
+
+@A = global i32 0
+
+; CHECK: .section .bss,"aw",@nobits
+; CHECK: .globl A
+
diff --git a/test/CodeGen/PowerPC/select-cc.ll b/test/CodeGen/PowerPC/select-cc.ll
new file mode 100644
index 0000000..ccc6489
--- /dev/null
+++ b/test/CodeGen/PowerPC/select-cc.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32
+; PR3011
+
+define <2 x double> @vector_select(<2 x double> %x, <2 x double> %y) nounwind {
+ %x.lo = extractelement <2 x double> %x, i32 0 ; <double> [#uses=1]
+ %x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]
+ %a.d = select i1 %x.lo.ge, <2 x double> %y, <2 x double> %x ; <<2 x double>> [#uses=1]
+ ret <2 x double> %a.d
+}
diff --git a/test/CodeGen/PowerPC/select_lt0.ll b/test/CodeGen/PowerPC/select_lt0.ll
new file mode 100644
index 0000000..95ba84a
--- /dev/null
+++ b/test/CodeGen/PowerPC/select_lt0.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -march=ppc32 | not grep cmp
+
+define i32 @seli32_1(i32 %a) {
+entry:
+ %tmp.1 = icmp slt i32 %a, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i32 5, i32 0 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
+define i32 @seli32_2(i32 %a, i32 %b) {
+entry:
+ %tmp.1 = icmp slt i32 %a, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i32 %b, i32 0 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
+define i32 @seli32_3(i32 %a, i16 %b) {
+entry:
+ %tmp.2 = sext i16 %b to i32 ; <i32> [#uses=1]
+ %tmp.1 = icmp slt i32 %a, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i32 %tmp.2, i32 0 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
+define i32 @seli32_4(i32 %a, i16 %b) {
+entry:
+ %tmp.2 = zext i16 %b to i32 ; <i32> [#uses=1]
+ %tmp.1 = icmp slt i32 %a, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i32 %tmp.2, i32 0 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
+define i16 @seli16_1(i16 %a) {
+entry:
+ %tmp.1 = icmp slt i16 %a, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i16 7, i16 0 ; <i16> [#uses=1]
+ ret i16 %retval
+}
+
+define i16 @seli16_2(i32 %a, i16 %b) {
+ %tmp.1 = icmp slt i32 %a, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.1, i16 %b, i16 0 ; <i16> [#uses=1]
+ ret i16 %retval
+}
+
+define i32 @seli32_a_a(i32 %a) {
+ %tmp = icmp slt i32 %a, 1 ; <i1> [#uses=1]
+ %min = select i1 %tmp, i32 %a, i32 0 ; <i32> [#uses=1]
+ ret i32 %min
+}
diff --git a/test/CodeGen/PowerPC/setcc_no_zext.ll b/test/CodeGen/PowerPC/setcc_no_zext.ll
new file mode 100644
index 0000000..9b2036e
--- /dev/null
+++ b/test/CodeGen/PowerPC/setcc_no_zext.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32 | not grep rlwinm
+
+define i32 @setcc_one_or_zero(i32* %a) {
+entry:
+ %tmp.1 = icmp ne i32* %a, null ; <i1> [#uses=1]
+ %inc.1 = zext i1 %tmp.1 to i32 ; <i32> [#uses=1]
+ ret i32 %inc.1
+}
+
diff --git a/test/CodeGen/PowerPC/seteq-0.ll b/test/CodeGen/PowerPC/seteq-0.ll
new file mode 100644
index 0000000..688b29a
--- /dev/null
+++ b/test/CodeGen/PowerPC/seteq-0.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
+; RUN: grep {srwi r., r., 5}
+
+define i32 @eq0(i32 %a) {
+ %tmp.1 = icmp eq i32 %a, 0 ; <i1> [#uses=1]
+ %tmp.2 = zext i1 %tmp.1 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.2
+}
+
diff --git a/test/CodeGen/PowerPC/shift128.ll b/test/CodeGen/PowerPC/shift128.ll
new file mode 100644
index 0000000..8e518c1
--- /dev/null
+++ b/test/CodeGen/PowerPC/shift128.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc64 | grep sld | count 5
+
+define i128 @foo_lshr(i128 %x, i128 %y) {
+ %r = lshr i128 %x, %y
+ ret i128 %r
+}
+define i128 @foo_ashr(i128 %x, i128 %y) {
+ %r = ashr i128 %x, %y
+ ret i128 %r
+}
+define i128 @foo_shl(i128 %x, i128 %y) {
+ %r = shl i128 %x, %y
+ ret i128 %r
+}
diff --git a/test/CodeGen/PowerPC/shl_elim.ll b/test/CodeGen/PowerPC/shl_elim.ll
new file mode 100644
index 0000000..f177c4a
--- /dev/null
+++ b/test/CodeGen/PowerPC/shl_elim.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=ppc32 | not grep slwi
+
+define i32 @test1(i64 %a) {
+ %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1]
+ %tmp23 = trunc i64 %tmp29 to i32 ; <i32> [#uses=1]
+ %tmp410 = lshr i32 %tmp23, 9 ; <i32> [#uses=1]
+ %tmp45 = trunc i32 %tmp410 to i16 ; <i16> [#uses=1]
+ %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp456
+}
+
diff --git a/test/CodeGen/PowerPC/shl_sext.ll b/test/CodeGen/PowerPC/shl_sext.ll
new file mode 100644
index 0000000..1f35eb4
--- /dev/null
+++ b/test/CodeGen/PowerPC/shl_sext.ll
@@ -0,0 +1,18 @@
+; This test should not contain a sign extend
+; RUN: llc < %s -march=ppc32 | not grep extsb
+
+define i32 @test(i32 %mode.0.i.0) {
+ %tmp.79 = trunc i32 %mode.0.i.0 to i8 ; <i8> [#uses=1]
+ %tmp.80 = sext i8 %tmp.79 to i32 ; <i32> [#uses=1]
+ %tmp.81 = shl i32 %tmp.80, 24 ; <i32> [#uses=1]
+ ret i32 %tmp.81
+}
+
+define i32 @test2(i32 %mode.0.i.0) {
+ %tmp.79 = trunc i32 %mode.0.i.0 to i8 ; <i8> [#uses=1]
+ %tmp.80 = sext i8 %tmp.79 to i32 ; <i32> [#uses=1]
+ %tmp.81 = shl i32 %tmp.80, 16 ; <i32> [#uses=1]
+ %tmp.82 = and i32 %tmp.81, 16711680 ; <i32> [#uses=1]
+ ret i32 %tmp.82
+}
+
diff --git a/test/CodeGen/PowerPC/sign_ext_inreg1.ll b/test/CodeGen/PowerPC/sign_ext_inreg1.ll
new file mode 100644
index 0000000..2679c8e
--- /dev/null
+++ b/test/CodeGen/PowerPC/sign_ext_inreg1.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=ppc32 | grep srwi
+; RUN: llc < %s -march=ppc32 | not grep rlwimi
+
+define i32 @baz(i64 %a) {
+ %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1]
+ %tmp23 = trunc i64 %tmp29 to i32 ; <i32> [#uses=1]
+ %tmp410 = lshr i32 %tmp23, 9 ; <i32> [#uses=1]
+ %tmp45 = trunc i32 %tmp410 to i16 ; <i16> [#uses=1]
+ %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp456
+}
+
diff --git a/test/CodeGen/PowerPC/small-arguments.ll b/test/CodeGen/PowerPC/small-arguments.ll
new file mode 100644
index 0000000..31bcee6
--- /dev/null
+++ b/test/CodeGen/PowerPC/small-arguments.ll
@@ -0,0 +1,52 @@
+; RUN: llc < %s -march=ppc32 | not grep {extsh\\|rlwinm}
+
+declare i16 @foo() signext
+
+define i32 @test1(i16 signext %X) {
+ %Y = sext i16 %X to i32 ;; dead
+ ret i32 %Y
+}
+
+define i32 @test2(i16 zeroext %X) {
+ %Y = sext i16 %X to i32
+ %Z = and i32 %Y, 65535 ;; dead
+ ret i32 %Z
+}
+
+define void @test3() {
+ %tmp.0 = call i16 @foo() signext ;; no extsh!
+ %tmp.1 = icmp slt i16 %tmp.0, 1234
+ br i1 %tmp.1, label %then, label %UnifiedReturnBlock
+
+then:
+ call i32 @test1(i16 0 signext)
+ ret void
+UnifiedReturnBlock:
+ ret void
+}
+
+define i32 @test4(i16* %P) {
+ %tmp.1 = load i16* %P
+ %tmp.2 = zext i16 %tmp.1 to i32
+ %tmp.3 = and i32 %tmp.2, 255
+ ret i32 %tmp.3
+}
+
+define i32 @test5(i16* %P) {
+ %tmp.1 = load i16* %P
+ %tmp.2 = bitcast i16 %tmp.1 to i16
+ %tmp.3 = zext i16 %tmp.2 to i32
+ %tmp.4 = and i32 %tmp.3, 255
+ ret i32 %tmp.4
+}
+
+define i32 @test6(i32* %P) {
+ %tmp.1 = load i32* %P
+ %tmp.2 = and i32 %tmp.1, 255
+ ret i32 %tmp.2
+}
+
+define i16 @test7(float %a) zeroext {
+ %tmp.1 = fptoui float %a to i16
+ ret i16 %tmp.1
+}
diff --git a/test/CodeGen/PowerPC/stfiwx-2.ll b/test/CodeGen/PowerPC/stfiwx-2.ll
new file mode 100644
index 0000000..c49b25c
--- /dev/null
+++ b/test/CodeGen/PowerPC/stfiwx-2.ll
@@ -0,0 +1,11 @@
+; This cannot be a stfiwx
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep stb
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep stfiwx
+
+define void @test(float %F, i8* %P) {
+ %I = fptosi float %F to i32
+ %X = trunc i32 %I to i8
+ store i8 %X, i8* %P
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/stfiwx.ll b/test/CodeGen/PowerPC/stfiwx.ll
new file mode 100644
index 0000000..d1c3f52
--- /dev/null
+++ b/test/CodeGen/PowerPC/stfiwx.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx -o %t1
+; RUN: grep stfiwx %t1
+; RUN: not grep r1 %t1
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-stfiwx \
+; RUN: -o %t2
+; RUN: not grep stfiwx %t2
+; RUN: grep r1 %t2
+
+define void @test(float %a, i32* %b) {
+ %tmp.2 = fptosi float %a to i32 ; <i32> [#uses=1]
+ store i32 %tmp.2, i32* %b
+ ret void
+}
+
+define void @test2(float %a, i32* %b, i32 %i) {
+ %tmp.2 = getelementptr i32* %b, i32 1 ; <i32*> [#uses=1]
+ %tmp.5 = getelementptr i32* %b, i32 %i ; <i32*> [#uses=1]
+ %tmp.7 = fptosi float %a to i32 ; <i32> [#uses=3]
+ store i32 %tmp.7, i32* %tmp.5
+ store i32 %tmp.7, i32* %tmp.2
+ store i32 %tmp.7, i32* %b
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/store-load-fwd.ll b/test/CodeGen/PowerPC/store-load-fwd.ll
new file mode 100644
index 0000000..25663c1
--- /dev/null
+++ b/test/CodeGen/PowerPC/store-load-fwd.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 | not grep lwz
+
+define i32 @test(i32* %P) {
+ store i32 1, i32* %P
+ %V = load i32* %P ; <i32> [#uses=1]
+ ret i32 %V
+}
+
diff --git a/test/CodeGen/PowerPC/stubs.ll b/test/CodeGen/PowerPC/stubs.ll
new file mode 100644
index 0000000..4889263
--- /dev/null
+++ b/test/CodeGen/PowerPC/stubs.ll
@@ -0,0 +1,22 @@
+; RUN: llc %s -o - -mtriple=powerpc-apple-darwin8 | FileCheck %s
+define ppc_fp128 @test1(i64 %X) nounwind readnone {
+entry:
+ %0 = sitofp i64 %X to ppc_fp128
+ ret ppc_fp128 %0
+}
+
+; CHECK: _test1:
+; CHECK: bl ___floatditf$stub
+; CHECK: .section __TEXT,__symbol_stub1,symbol_stubs,pure_instructions,16
+; CHECK: ___floatditf$stub:
+; CHECK: .indirect_symbol ___floatditf
+; CHECK: lis r11,ha16(___floatditf$lazy_ptr)
+; CHECK: lwzu r12,lo16(___floatditf$lazy_ptr)(r11)
+; CHECK: mtctr r12
+; CHECK: bctr
+; CHECK: .section __DATA,__la_symbol_ptr,lazy_symbol_pointers
+; CHECK: ___floatditf$lazy_ptr:
+; CHECK: .indirect_symbol ___floatditf
+; CHECK: .long dyld_stub_binding_helper
+
+
diff --git a/test/CodeGen/PowerPC/subc.ll b/test/CodeGen/PowerPC/subc.ll
new file mode 100644
index 0000000..5914dca
--- /dev/null
+++ b/test/CodeGen/PowerPC/subc.ll
@@ -0,0 +1,25 @@
+; All of these should be codegen'd without loading immediates
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: grep subfc %t | count 1
+; RUN: grep subfe %t | count 1
+; RUN: grep subfze %t | count 1
+; RUN: grep subfme %t | count 1
+; RUN: grep subfic %t | count 2
+
+define i64 @sub_ll(i64 %a, i64 %b) {
+entry:
+ %tmp.2 = sub i64 %a, %b ; <i64> [#uses=1]
+ ret i64 %tmp.2
+}
+
+define i64 @sub_l_5(i64 %a) {
+entry:
+ %tmp.1 = sub i64 5, %a ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i64 @sub_l_m5(i64 %a) {
+entry:
+ %tmp.1 = sub i64 -5, %a ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
diff --git a/test/CodeGen/PowerPC/tailcall1-64.ll b/test/CodeGen/PowerPC/tailcall1-64.ll
new file mode 100644
index 0000000..e9c83a5
--- /dev/null
+++ b/test/CodeGen/PowerPC/tailcall1-64.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=ppc64 -tailcallopt | grep TC_RETURNd8
+define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}
diff --git a/test/CodeGen/PowerPC/tailcall1.ll b/test/CodeGen/PowerPC/tailcall1.ll
new file mode 100644
index 0000000..08f3392
--- /dev/null
+++ b/test/CodeGen/PowerPC/tailcall1.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=ppc32 -tailcallopt | grep TC_RETURN
+define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}
diff --git a/test/CodeGen/PowerPC/tailcallpic1.ll b/test/CodeGen/PowerPC/tailcallpic1.ll
new file mode 100644
index 0000000..f3f5028
--- /dev/null
+++ b/test/CodeGen/PowerPC/tailcallpic1.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -tailcallopt -mtriple=powerpc-apple-darwin -relocation-model=pic | grep TC_RETURN
+
+
+
+define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}
diff --git a/test/CodeGen/PowerPC/tango.net.ftp.FtpClient.ll b/test/CodeGen/PowerPC/tango.net.ftp.FtpClient.ll
new file mode 100644
index 0000000..8a1288a
--- /dev/null
+++ b/test/CodeGen/PowerPC/tango.net.ftp.FtpClient.ll
@@ -0,0 +1,583 @@
+; RUN: llc < %s
+; PR4534
+
+; ModuleID = 'tango.net.ftp.FtpClient.bc'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin9.6.0"
+ %"byte[]" = type { i32, i8* }
[email protected] = external constant [11 x i8] ; <[11 x i8]*> [#uses=1]
[email protected] = external constant [11 x i8] ; <[11 x i8]*> [#uses=2]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (void (%"byte[]")* @foo to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define fastcc void @foo(%"byte[]" %line_arg) {
+entry:
+ %line_arg830 = extractvalue %"byte[]" %line_arg, 0 ; <i32> [#uses=12]
+ %line_arg831 = extractvalue %"byte[]" %line_arg, 1 ; <i8*> [#uses=17]
+ %t5 = load i8* %line_arg831 ; <i8> [#uses=1]
+ br label %forcondi
+
+forcondi: ; preds = %forbodyi, %entry
+ %l.0i = phi i32 [ 10, %entry ], [ %t4i, %forbodyi ] ; <i32> [#uses=2]
+ %p.0i = phi i8* [ getelementptr ([11 x i8]* @.str167, i32 0, i32 -1), %entry ], [ %t7i, %forbodyi ] ; <i8*> [#uses=1]
+ %t4i = add i32 %l.0i, -1 ; <i32> [#uses=1]
+ %t5i = icmp eq i32 %l.0i, 0 ; <i1> [#uses=1]
+ br i1 %t5i, label %forcond.i, label %forbodyi
+
+forbodyi: ; preds = %forcondi
+ %t7i = getelementptr i8* %p.0i, i32 1 ; <i8*> [#uses=2]
+ %t8i = load i8* %t7i ; <i8> [#uses=1]
+ %t12i = icmp eq i8 %t8i, %t5 ; <i1> [#uses=1]
+ br i1 %t12i, label %forcond.i, label %forcondi
+
+forcond.i: ; preds = %forbody.i, %forbodyi, %forcondi
+ %storemerge.i = phi i32 [ %t106.i, %forbody.i ], [ 1, %forcondi ], [ 1, %forbodyi ] ; <i32> [#uses=1]
+ %t77.i286 = phi i1 [ %phit3, %forbody.i ], [ false, %forcondi ], [ false, %forbodyi ] ; <i1> [#uses=1]
+ br i1 %t77.i286, label %forcond.i295, label %forbody.i
+
+forbody.i: ; preds = %forcond.i
+ %t106.i = add i32 %storemerge.i, 1 ; <i32> [#uses=2]
+ %phit3 = icmp ugt i32 %t106.i, 3 ; <i1> [#uses=1]
+ br label %forcond.i
+
+forcond.i295: ; preds = %forbody.i301, %forcond.i
+ %storemerge.i292 = phi i32 [ %t106.i325, %forbody.i301 ], [ 4, %forcond.i ] ; <i32> [#uses=1]
+ %t77.i293 = phi i1 [ %phit2, %forbody.i301 ], [ false, %forcond.i ] ; <i1> [#uses=1]
+ br i1 %t77.i293, label %forcond.i332, label %forbody.i301
+
+forbody.i301: ; preds = %forcond.i295
+ %t106.i325 = add i32 %storemerge.i292, 1 ; <i32> [#uses=2]
+ %phit2 = icmp ugt i32 %t106.i325, 6 ; <i1> [#uses=1]
+ br label %forcond.i295
+
+forcond.i332: ; preds = %forbody.i338, %forcond.i295
+ %storemerge.i329 = phi i32 [ %t106.i362, %forbody.i338 ], [ 7, %forcond.i295 ] ; <i32> [#uses=3]
+ %t77.i330 = phi i1 [ %phit1, %forbody.i338 ], [ false, %forcond.i295 ] ; <i1> [#uses=1]
+ br i1 %t77.i330, label %wcond.i370, label %forbody.i338
+
+forbody.i338: ; preds = %forcond.i332
+ %t106.i362 = add i32 %storemerge.i329, 1 ; <i32> [#uses=2]
+ %phit1 = icmp ugt i32 %t106.i362, 9 ; <i1> [#uses=1]
+ br label %forcond.i332
+
+wcond.i370: ; preds = %wbody.i372, %forcond.i332
+ %.frame.0.11 = phi i32 [ %t18.i371.c, %wbody.i372 ], [ %storemerge.i329, %forcond.i332 ] ; <i32> [#uses=2]
+ %t3.i368 = phi i32 [ %t18.i371.c, %wbody.i372 ], [ %storemerge.i329, %forcond.i332 ] ; <i32> [#uses=5]
+ %t4.i369 = icmp ult i32 %t3.i368, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t4.i369, label %andand.i378, label %wcond22.i383
+
+wbody.i372: ; preds = %andand.i378
+ %t18.i371.c = add i32 %t3.i368, 1 ; <i32> [#uses=2]
+ br label %wcond.i370
+
+andand.i378: ; preds = %wcond.i370
+ %t11.i375 = getelementptr i8* %line_arg831, i32 %t3.i368 ; <i8*> [#uses=1]
+ %t12.i376 = load i8* %t11.i375 ; <i8> [#uses=1]
+ %t14.i377 = icmp eq i8 %t12.i376, 32 ; <i1> [#uses=1]
+ br i1 %t14.i377, label %wbody.i372, label %wcond22.i383
+
+wcond22.i383: ; preds = %wbody23.i385, %andand.i378, %wcond.i370
+ %.frame.0.10 = phi i32 [ %t50.i384, %wbody23.i385 ], [ %.frame.0.11, %wcond.i370 ], [ %.frame.0.11, %andand.i378 ] ; <i32> [#uses=2]
+ %t49.i381 = phi i32 [ %t50.i384, %wbody23.i385 ], [ %t3.i368, %wcond.i370 ], [ %t3.i368, %andand.i378 ] ; <i32> [#uses=5]
+ %t32.i382 = icmp ult i32 %t49.i381, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t32.i382, label %andand33.i391, label %wcond54.i396
+
+wbody23.i385: ; preds = %andand33.i391
+ %t50.i384 = add i32 %t49.i381, 1 ; <i32> [#uses=2]
+ br label %wcond22.i383
+
+andand33.i391: ; preds = %wcond22.i383
+ %t42.i388 = getelementptr i8* %line_arg831, i32 %t49.i381 ; <i8*> [#uses=1]
+ %t43.i389 = load i8* %t42.i388 ; <i8> [#uses=1]
+ %t45.i390 = icmp eq i8 %t43.i389, 32 ; <i1> [#uses=1]
+ br i1 %t45.i390, label %wcond54.i396, label %wbody23.i385
+
+wcond54.i396: ; preds = %wbody55.i401, %andand33.i391, %wcond22.i383
+ %.frame.0.9 = phi i32 [ %t82.i400, %wbody55.i401 ], [ %.frame.0.10, %wcond22.i383 ], [ %.frame.0.10, %andand33.i391 ] ; <i32> [#uses=2]
+ %t81.i394 = phi i32 [ %t82.i400, %wbody55.i401 ], [ %t49.i381, %wcond22.i383 ], [ %t49.i381, %andand33.i391 ] ; <i32> [#uses=3]
+ %t64.i395 = icmp ult i32 %t81.i394, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t64.i395, label %andand65.i407, label %wcond.i716
+
+wbody55.i401: ; preds = %andand65.i407
+ %t82.i400 = add i32 %t81.i394, 1 ; <i32> [#uses=2]
+ br label %wcond54.i396
+
+andand65.i407: ; preds = %wcond54.i396
+ %t74.i404 = getelementptr i8* %line_arg831, i32 %t81.i394 ; <i8*> [#uses=1]
+ %t75.i405 = load i8* %t74.i404 ; <i8> [#uses=1]
+ %t77.i406 = icmp eq i8 %t75.i405, 32 ; <i1> [#uses=1]
+ br i1 %t77.i406, label %wbody55.i401, label %wcond.i716
+
+wcond.i716: ; preds = %wbody.i717, %andand65.i407, %wcond54.i396
+ %.frame.0.0 = phi i32 [ %t18.i.c829, %wbody.i717 ], [ %.frame.0.9, %wcond54.i396 ], [ %.frame.0.9, %andand65.i407 ] ; <i32> [#uses=7]
+ %t4.i715 = icmp ult i32 %.frame.0.0, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t4.i715, label %andand.i721, label %wcond22.i724
+
+wbody.i717: ; preds = %andand.i721
+ %t18.i.c829 = add i32 %.frame.0.0, 1 ; <i32> [#uses=1]
+ br label %wcond.i716
+
+andand.i721: ; preds = %wcond.i716
+ %t11.i718 = getelementptr i8* %line_arg831, i32 %.frame.0.0 ; <i8*> [#uses=1]
+ %t12.i719 = load i8* %t11.i718 ; <i8> [#uses=1]
+ %t14.i720 = icmp eq i8 %t12.i719, 32 ; <i1> [#uses=1]
+ br i1 %t14.i720, label %wbody.i717, label %wcond22.i724
+
+wcond22.i724: ; preds = %wbody23.i726, %andand.i721, %wcond.i716
+ %.frame.0.1 = phi i32 [ %t50.i725, %wbody23.i726 ], [ %.frame.0.0, %wcond.i716 ], [ %.frame.0.0, %andand.i721 ] ; <i32> [#uses=2]
+ %t49.i722 = phi i32 [ %t50.i725, %wbody23.i726 ], [ %.frame.0.0, %wcond.i716 ], [ %.frame.0.0, %andand.i721 ] ; <i32> [#uses=5]
+ %t32.i723 = icmp ult i32 %t49.i722, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t32.i723, label %andand33.i731, label %wcond54.i734
+
+wbody23.i726: ; preds = %andand33.i731
+ %t50.i725 = add i32 %t49.i722, 1 ; <i32> [#uses=2]
+ br label %wcond22.i724
+
+andand33.i731: ; preds = %wcond22.i724
+ %t42.i728 = getelementptr i8* %line_arg831, i32 %t49.i722 ; <i8*> [#uses=1]
+ %t43.i729 = load i8* %t42.i728 ; <i8> [#uses=1]
+ %t45.i730 = icmp eq i8 %t43.i729, 32 ; <i1> [#uses=1]
+ br i1 %t45.i730, label %wcond54.i734, label %wbody23.i726
+
+wcond54.i734: ; preds = %wbody55.i736, %andand33.i731, %wcond22.i724
+ %.frame.0.2 = phi i32 [ %t82.i735, %wbody55.i736 ], [ %.frame.0.1, %wcond22.i724 ], [ %.frame.0.1, %andand33.i731 ] ; <i32> [#uses=2]
+ %t81.i732 = phi i32 [ %t82.i735, %wbody55.i736 ], [ %t49.i722, %wcond22.i724 ], [ %t49.i722, %andand33.i731 ] ; <i32> [#uses=3]
+ %t64.i733 = icmp ult i32 %t81.i732, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t64.i733, label %andand65.i740, label %wcond.i750
+
+wbody55.i736: ; preds = %andand65.i740
+ %t82.i735 = add i32 %t81.i732, 1 ; <i32> [#uses=2]
+ br label %wcond54.i734
+
+andand65.i740: ; preds = %wcond54.i734
+ %t74.i737 = getelementptr i8* %line_arg831, i32 %t81.i732 ; <i8*> [#uses=1]
+ %t75.i738 = load i8* %t74.i737 ; <i8> [#uses=1]
+ %t77.i739 = icmp eq i8 %t75.i738, 32 ; <i1> [#uses=1]
+ br i1 %t77.i739, label %wbody55.i736, label %wcond.i750
+
+wcond.i750: ; preds = %wbody.i752, %andand65.i740, %wcond54.i734
+ %.frame.0.3 = phi i32 [ %t18.i751.c, %wbody.i752 ], [ %.frame.0.2, %wcond54.i734 ], [ %.frame.0.2, %andand65.i740 ] ; <i32> [#uses=11]
+ %t4.i749 = icmp ult i32 %.frame.0.3, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t4.i749, label %andand.i758, label %wcond22.i761
+
+wbody.i752: ; preds = %andand.i758
+ %t18.i751.c = add i32 %.frame.0.3, 1 ; <i32> [#uses=1]
+ br label %wcond.i750
+
+andand.i758: ; preds = %wcond.i750
+ %t11.i755 = getelementptr i8* %line_arg831, i32 %.frame.0.3 ; <i8*> [#uses=1]
+ %t12.i756 = load i8* %t11.i755 ; <i8> [#uses=1]
+ %t14.i757 = icmp eq i8 %t12.i756, 32 ; <i1> [#uses=1]
+ br i1 %t14.i757, label %wbody.i752, label %wcond22.i761
+
+wcond22.i761: ; preds = %wbody23.i763, %andand.i758, %wcond.i750
+ %.frame.0.4 = phi i32 [ %t50.i762, %wbody23.i763 ], [ %.frame.0.3, %wcond.i750 ], [ %.frame.0.3, %andand.i758 ] ; <i32> [#uses=2]
+ %t49.i759 = phi i32 [ %t50.i762, %wbody23.i763 ], [ %.frame.0.3, %wcond.i750 ], [ %.frame.0.3, %andand.i758 ] ; <i32> [#uses=7]
+ %t32.i760 = icmp ult i32 %t49.i759, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t32.i760, label %andand33.i769, label %wcond54.i773
+
+wbody23.i763: ; preds = %andand33.i769
+ %t50.i762 = add i32 %t49.i759, 1 ; <i32> [#uses=2]
+ br label %wcond22.i761
+
+andand33.i769: ; preds = %wcond22.i761
+ %t42.i766 = getelementptr i8* %line_arg831, i32 %t49.i759 ; <i8*> [#uses=1]
+ %t43.i767 = load i8* %t42.i766 ; <i8> [#uses=1]
+ %t45.i768 = icmp eq i8 %t43.i767, 32 ; <i1> [#uses=1]
+ br i1 %t45.i768, label %wcond54.i773, label %wbody23.i763
+
+wcond54.i773: ; preds = %wbody55.i775, %andand33.i769, %wcond22.i761
+ %.frame.0.5 = phi i32 [ %t82.i774, %wbody55.i775 ], [ %.frame.0.4, %wcond22.i761 ], [ %.frame.0.4, %andand33.i769 ] ; <i32> [#uses=1]
+ %t81.i770 = phi i32 [ %t82.i774, %wbody55.i775 ], [ %t49.i759, %wcond22.i761 ], [ %t49.i759, %andand33.i769 ] ; <i32> [#uses=3]
+ %t64.i771 = icmp ult i32 %t81.i770, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t64.i771, label %andand65.i780, label %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786
+
+wbody55.i775: ; preds = %andand65.i780
+ %t82.i774 = add i32 %t81.i770, 1 ; <i32> [#uses=2]
+ br label %wcond54.i773
+
+andand65.i780: ; preds = %wcond54.i773
+ %t74.i777 = getelementptr i8* %line_arg831, i32 %t81.i770 ; <i8*> [#uses=1]
+ %t75.i778 = load i8* %t74.i777 ; <i8> [#uses=1]
+ %t77.i779 = icmp eq i8 %t75.i778, 32 ; <i1> [#uses=1]
+ br i1 %t77.i779, label %wbody55.i775, label %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786
+
+Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786: ; preds = %andand65.i780, %wcond54.i773
+ %t89.i782 = getelementptr i8* %line_arg831, i32 %.frame.0.3 ; <i8*> [#uses=4]
+ %t90.i783 = sub i32 %t49.i759, %.frame.0.3 ; <i32> [#uses=2]
+ br label %wcond.i792
+
+wcond.i792: ; preds = %wbody.i794, %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786
+ %.frame.0.6 = phi i32 [ %.frame.0.5, %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786 ], [ %t18.i793.c, %wbody.i794 ] ; <i32> [#uses=9]
+ %t4.i791 = icmp ult i32 %.frame.0.6, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t4.i791, label %andand.i800, label %wcond22.i803
+
+wbody.i794: ; preds = %andand.i800
+ %t18.i793.c = add i32 %.frame.0.6, 1 ; <i32> [#uses=1]
+ br label %wcond.i792
+
+andand.i800: ; preds = %wcond.i792
+ %t11.i797 = getelementptr i8* %line_arg831, i32 %.frame.0.6 ; <i8*> [#uses=1]
+ %t12.i798 = load i8* %t11.i797 ; <i8> [#uses=1]
+ %t14.i799 = icmp eq i8 %t12.i798, 32 ; <i1> [#uses=1]
+ br i1 %t14.i799, label %wbody.i794, label %wcond22.i803
+
+wcond22.i803: ; preds = %wbody23.i805, %andand.i800, %wcond.i792
+ %t49.i801 = phi i32 [ %t50.i804, %wbody23.i805 ], [ %.frame.0.6, %wcond.i792 ], [ %.frame.0.6, %andand.i800 ] ; <i32> [#uses=7]
+ %t32.i802 = icmp ult i32 %t49.i801, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t32.i802, label %andand33.i811, label %wcond54.i815
+
+wbody23.i805: ; preds = %andand33.i811
+ %t50.i804 = add i32 %t49.i801, 1 ; <i32> [#uses=1]
+ br label %wcond22.i803
+
+andand33.i811: ; preds = %wcond22.i803
+ %t42.i808 = getelementptr i8* %line_arg831, i32 %t49.i801 ; <i8*> [#uses=1]
+ %t43.i809 = load i8* %t42.i808 ; <i8> [#uses=1]
+ %t45.i810 = icmp eq i8 %t43.i809, 32 ; <i1> [#uses=1]
+ br i1 %t45.i810, label %wcond54.i815, label %wbody23.i805
+
+wcond54.i815: ; preds = %wbody55.i817, %andand33.i811, %wcond22.i803
+ %t81.i812 = phi i32 [ %t82.i816, %wbody55.i817 ], [ %t49.i801, %wcond22.i803 ], [ %t49.i801, %andand33.i811 ] ; <i32> [#uses=3]
+ %t64.i813 = icmp ult i32 %t81.i812, %line_arg830 ; <i1> [#uses=1]
+ br i1 %t64.i813, label %andand65.i822, label %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828
+
+wbody55.i817: ; preds = %andand65.i822
+ %t82.i816 = add i32 %t81.i812, 1 ; <i32> [#uses=1]
+ br label %wcond54.i815
+
+andand65.i822: ; preds = %wcond54.i815
+ %t74.i819 = getelementptr i8* %line_arg831, i32 %t81.i812 ; <i8*> [#uses=1]
+ %t75.i820 = load i8* %t74.i819 ; <i8> [#uses=1]
+ %t77.i821 = icmp eq i8 %t75.i820, 32 ; <i1> [#uses=1]
+ br i1 %t77.i821, label %wbody55.i817, label %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828
+
+Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828: ; preds = %andand65.i822, %wcond54.i815
+ %t89.i824 = getelementptr i8* %line_arg831, i32 %.frame.0.6 ; <i8*> [#uses=4]
+ %t90.i825 = sub i32 %t49.i801, %.frame.0.6 ; <i32> [#uses=2]
+ %t63 = load i8* %t89.i824 ; <i8> [#uses=2]
+ br label %forcondi622
+
+forcondi622: ; preds = %forbodyi626, %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828
+ %l.0i618 = phi i32 [ 10, %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828 ], [ %t4i620, %forbodyi626 ] ; <i32> [#uses=2]
+ %p.0i619 = phi i8* [ getelementptr ([11 x i8]* @.str170, i32 0, i32 -1), %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828 ], [ %t7i623, %forbodyi626 ] ; <i8*> [#uses=1]
+ %t4i620 = add i32 %l.0i618, -1 ; <i32> [#uses=1]
+ %t5i621 = icmp eq i32 %l.0i618, 0 ; <i1> [#uses=1]
+ br i1 %t5i621, label %if65, label %forbodyi626
+
+forbodyi626: ; preds = %forcondi622
+ %t7i623 = getelementptr i8* %p.0i619, i32 1 ; <i8*> [#uses=3]
+ %t8i624 = load i8* %t7i623 ; <i8> [#uses=1]
+ %t12i625 = icmp eq i8 %t8i624, %t63 ; <i1> [#uses=1]
+ br i1 %t12i625, label %ifi630, label %forcondi622
+
+ifi630: ; preds = %forbodyi626
+ %t15i627 = ptrtoint i8* %t7i623 to i32 ; <i32> [#uses=1]
+ %t17i629 = sub i32 %t15i627, ptrtoint ([11 x i8]* @.str170 to i32) ; <i32> [#uses=1]
+ %phit636 = icmp eq i32 %t17i629, 10 ; <i1> [#uses=1]
+ br i1 %phit636, label %if65, label %e67
+
+if65: ; preds = %ifi630, %forcondi622
+ %t4i532 = icmp eq i32 %t49.i759, %.frame.0.3 ; <i1> [#uses=1]
+ br i1 %t4i532, label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576, label %forcondi539
+
+forcondi539: ; preds = %zi546, %if65
+ %sign.1.i533 = phi i1 [ %sign.0.i543, %zi546 ], [ false, %if65 ] ; <i1> [#uses=2]
+ %l.0i534 = phi i32 [ %t33i545, %zi546 ], [ %t90.i783, %if65 ] ; <i32> [#uses=3]
+ %p.0i535 = phi i8* [ %t30i544, %zi546 ], [ %t89.i782, %if65 ] ; <i8*> [#uses=6]
+ %c.0.ini536 = phi i8* [ %t30i544, %zi546 ], [ %t89.i782, %if65 ] ; <i8*> [#uses=1]
+ %c.0i537 = load i8* %c.0.ini536 ; <i8> [#uses=2]
+ %t8i538 = icmp eq i32 %l.0i534, 0 ; <i1> [#uses=1]
+ br i1 %t8i538, label %endfori550, label %forbodyi540
+
+forbodyi540: ; preds = %forcondi539
+ switch i8 %c.0i537, label %endfori550 [
+ i8 32, label %zi546
+ i8 9, label %zi546
+ i8 45, label %if20i541
+ i8 43, label %if26i542
+ ]
+
+if20i541: ; preds = %forbodyi540
+ br label %zi546
+
+if26i542: ; preds = %forbodyi540
+ br label %zi546
+
+zi546: ; preds = %if26i542, %if20i541, %forbodyi540, %forbodyi540
+ %sign.0.i543 = phi i1 [ false, %if26i542 ], [ true, %if20i541 ], [ %sign.1.i533, %forbodyi540 ], [ %sign.1.i533, %forbodyi540 ] ; <i1> [#uses=1]
+ %t30i544 = getelementptr i8* %p.0i535, i32 1 ; <i8*> [#uses=2]
+ %t33i545 = add i32 %l.0i534, -1 ; <i32> [#uses=1]
+ br label %forcondi539
+
+endfori550: ; preds = %forbodyi540, %forcondi539
+ %t37i547 = icmp eq i8 %c.0i537, 48 ; <i1> [#uses=1]
+ %t39i548 = icmp sgt i32 %l.0i534, 1 ; <i1> [#uses=1]
+ %or.condi549 = and i1 %t37i547, %t39i548 ; <i1> [#uses=1]
+ br i1 %or.condi549, label %if40i554, label %endif41i564
+
+if40i554: ; preds = %endfori550
+ %t43i551 = getelementptr i8* %p.0i535, i32 1 ; <i8*> [#uses=2]
+ %t44i552 = load i8* %t43i551 ; <i8> [#uses=1]
+ %t45i553 = zext i8 %t44i552 to i32 ; <i32> [#uses=1]
+ switch i32 %t45i553, label %endif41i564 [
+ i32 120, label %case46i556
+ i32 88, label %case46i556
+ i32 98, label %case51i558
+ i32 66, label %case51i558
+ i32 111, label %case56i560
+ i32 79, label %case56i560
+ ]
+
+case46i556: ; preds = %if40i554, %if40i554
+ %t48i555 = getelementptr i8* %p.0i535, i32 2 ; <i8*> [#uses=1]
+ br label %endif41i564
+
+case51i558: ; preds = %if40i554, %if40i554
+ %t53i557 = getelementptr i8* %p.0i535, i32 2 ; <i8*> [#uses=1]
+ br label %endif41i564
+
+case56i560: ; preds = %if40i554, %if40i554
+ %t58i559 = getelementptr i8* %p.0i535, i32 2 ; <i8*> [#uses=1]
+ br label %endif41i564
+
+endif41i564: ; preds = %case56i560, %case51i558, %case46i556, %if40i554, %endfori550
+ %r.0i561 = phi i32 [ 0, %if40i554 ], [ 8, %case56i560 ], [ 2, %case51i558 ], [ 16, %case46i556 ], [ 0, %endfori550 ] ; <i32> [#uses=2]
+ %p.2i562 = phi i8* [ %t43i551, %if40i554 ], [ %t58i559, %case56i560 ], [ %t53i557, %case51i558 ], [ %t48i555, %case46i556 ], [ %p.0i535, %endfori550 ] ; <i8*> [#uses=2]
+ %t63i563 = icmp eq i32 %r.0i561, 0 ; <i1> [#uses=1]
+ br i1 %t63i563, label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576, label %if70i568
+
+if70i568: ; preds = %endif41i564
+ br label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576
+
+Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576: ; preds = %if70i568, %endif41i564, %if65
+ %radix.0.i570 = phi i32 [ 0, %if65 ], [ %r.0i561, %if70i568 ], [ 10, %endif41i564 ] ; <i32> [#uses=2]
+ %p.1i571 = phi i8* [ %p.2i562, %if70i568 ], [ %t89.i782, %if65 ], [ %p.2i562, %endif41i564 ] ; <i8*> [#uses=1]
+ %t84i572 = ptrtoint i8* %p.1i571 to i32 ; <i32> [#uses=1]
+ %t85i573 = ptrtoint i8* %t89.i782 to i32 ; <i32> [#uses=1]
+ %t86i574 = sub i32 %t84i572, %t85i573 ; <i32> [#uses=2]
+ %t6.i575 = sub i32 %t90.i783, %t86i574 ; <i32> [#uses=1]
+ %t59i604 = zext i32 %radix.0.i570 to i64 ; <i64> [#uses=1]
+ br label %fcondi581
+
+fcondi581: ; preds = %if55i610, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576
+ %value.0i577 = phi i64 [ 0, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576 ], [ %t65i607, %if55i610 ] ; <i64> [#uses=1]
+ %fkey.0i579 = phi i32 [ 0, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576 ], [ %t70i609, %if55i610 ] ; <i32> [#uses=3]
+ %t3i580 = icmp ult i32 %fkey.0i579, %t6.i575 ; <i1> [#uses=1]
+ br i1 %t3i580, label %fbodyi587, label %wcond.i422
+
+fbodyi587: ; preds = %fcondi581
+ %t5.s.i582 = add i32 %t86i574, %fkey.0i579 ; <i32> [#uses=1]
+ %t89.i782.s = add i32 %.frame.0.3, %t5.s.i582 ; <i32> [#uses=1]
+ %t5i583 = getelementptr i8* %line_arg831, i32 %t89.i782.s ; <i8*> [#uses=1]
+ %t6i584 = load i8* %t5i583 ; <i8> [#uses=6]
+ %t6.off84i585 = add i8 %t6i584, -48 ; <i8> [#uses=1]
+ %or.cond.i28.i586 = icmp ugt i8 %t6.off84i585, 9 ; <i1> [#uses=1]
+ br i1 %or.cond.i28.i586, label %ei590, label %endifi603
+
+ei590: ; preds = %fbodyi587
+ %t6.off83i588 = add i8 %t6i584, -97 ; <i8> [#uses=1]
+ %or.cond81i589 = icmp ugt i8 %t6.off83i588, 25 ; <i1> [#uses=1]
+ br i1 %or.cond81i589, label %e24i595, label %if22i592
+
+if22i592: ; preds = %ei590
+ %t27i591 = add i8 %t6i584, -39 ; <i8> [#uses=1]
+ br label %endifi603
+
+e24i595: ; preds = %ei590
+ %t6.offi593 = add i8 %t6i584, -65 ; <i8> [#uses=1]
+ %or.cond82i594 = icmp ugt i8 %t6.offi593, 25 ; <i1> [#uses=1]
+ br i1 %or.cond82i594, label %wcond.i422, label %if39i597
+
+if39i597: ; preds = %e24i595
+ %t44.i29.i596 = add i8 %t6i584, -7 ; <i8> [#uses=1]
+ br label %endifi603
+
+endifi603: ; preds = %if39i597, %if22i592, %fbodyi587
+ %c.0.i30.i598 = phi i8 [ %t27i591, %if22i592 ], [ %t44.i29.i596, %if39i597 ], [ %t6i584, %fbodyi587 ] ; <i8> [#uses=1]
+ %t48.i31.i599 = zext i8 %c.0.i30.i598 to i32 ; <i32> [#uses=1]
+ %t49i600 = add i32 %t48.i31.i599, 208 ; <i32> [#uses=1]
+ %t52i601 = and i32 %t49i600, 255 ; <i32> [#uses=2]
+ %t54i602 = icmp ult i32 %t52i601, %radix.0.i570 ; <i1> [#uses=1]
+ br i1 %t54i602, label %if55i610, label %wcond.i422
+
+if55i610: ; preds = %endifi603
+ %t61i605 = mul i64 %value.0i577, %t59i604 ; <i64> [#uses=1]
+ %t64i606 = zext i32 %t52i601 to i64 ; <i64> [#uses=1]
+ %t65i607 = add i64 %t61i605, %t64i606 ; <i64> [#uses=1]
+ %t70i609 = add i32 %fkey.0i579, 1 ; <i32> [#uses=1]
+ br label %fcondi581
+
+e67: ; preds = %ifi630
+ %t4i447 = icmp eq i32 %t49.i801, %.frame.0.6 ; <i1> [#uses=1]
+ br i1 %t4i447, label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491, label %forcondi454
+
+forcondi454: ; preds = %zi461, %e67
+ %c.0i452 = phi i8 [ %c.0i452.pre, %zi461 ], [ %t63, %e67 ] ; <i8> [#uses=2]
+ %sign.1.i448 = phi i1 [ %sign.0.i458, %zi461 ], [ false, %e67 ] ; <i1> [#uses=2]
+ %l.0i449 = phi i32 [ %t33i460, %zi461 ], [ %t90.i825, %e67 ] ; <i32> [#uses=3]
+ %p.0i450 = phi i8* [ %t30i459, %zi461 ], [ %t89.i824, %e67 ] ; <i8*> [#uses=5]
+ %t8i453 = icmp eq i32 %l.0i449, 0 ; <i1> [#uses=1]
+ br i1 %t8i453, label %endfori465, label %forbodyi455
+
+forbodyi455: ; preds = %forcondi454
+ switch i8 %c.0i452, label %endfori465 [
+ i8 32, label %zi461
+ i8 9, label %zi461
+ i8 45, label %if20i456
+ i8 43, label %if26i457
+ ]
+
+if20i456: ; preds = %forbodyi455
+ br label %zi461
+
+if26i457: ; preds = %forbodyi455
+ br label %zi461
+
+zi461: ; preds = %if26i457, %if20i456, %forbodyi455, %forbodyi455
+ %sign.0.i458 = phi i1 [ false, %if26i457 ], [ true, %if20i456 ], [ %sign.1.i448, %forbodyi455 ], [ %sign.1.i448, %forbodyi455 ] ; <i1> [#uses=1]
+ %t30i459 = getelementptr i8* %p.0i450, i32 1 ; <i8*> [#uses=2]
+ %t33i460 = add i32 %l.0i449, -1 ; <i32> [#uses=1]
+ %c.0i452.pre = load i8* %t30i459 ; <i8> [#uses=1]
+ br label %forcondi454
+
+endfori465: ; preds = %forbodyi455, %forcondi454
+ %t37i462 = icmp eq i8 %c.0i452, 48 ; <i1> [#uses=1]
+ %t39i463 = icmp sgt i32 %l.0i449, 1 ; <i1> [#uses=1]
+ %or.condi464 = and i1 %t37i462, %t39i463 ; <i1> [#uses=1]
+ br i1 %or.condi464, label %if40i469, label %endif41i479
+
+if40i469: ; preds = %endfori465
+ %t43i466 = getelementptr i8* %p.0i450, i32 1 ; <i8*> [#uses=2]
+ %t44i467 = load i8* %t43i466 ; <i8> [#uses=1]
+ %t45i468 = zext i8 %t44i467 to i32 ; <i32> [#uses=1]
+ switch i32 %t45i468, label %endif41i479 [
+ i32 120, label %case46i471
+ i32 111, label %case56i475
+ ]
+
+case46i471: ; preds = %if40i469
+ %t48i470 = getelementptr i8* %p.0i450, i32 2 ; <i8*> [#uses=1]
+ br label %endif41i479
+
+case56i475: ; preds = %if40i469
+ %t58i474 = getelementptr i8* %p.0i450, i32 2 ; <i8*> [#uses=1]
+ br label %endif41i479
+
+endif41i479: ; preds = %case56i475, %case46i471, %if40i469, %endfori465
+ %r.0i476 = phi i32 [ 0, %if40i469 ], [ 8, %case56i475 ], [ 16, %case46i471 ], [ 0, %endfori465 ] ; <i32> [#uses=2]
+ %p.2i477 = phi i8* [ %t43i466, %if40i469 ], [ %t58i474, %case56i475 ], [ %t48i470, %case46i471 ], [ %p.0i450, %endfori465 ] ; <i8*> [#uses=2]
+ %t63i478 = icmp eq i32 %r.0i476, 0 ; <i1> [#uses=1]
+ br i1 %t63i478, label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491, label %if70i483
+
+if70i483: ; preds = %endif41i479
+ br label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491
+
+Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491: ; preds = %if70i483, %endif41i479, %e67
+ %radix.0.i485 = phi i32 [ 0, %e67 ], [ %r.0i476, %if70i483 ], [ 10, %endif41i479 ] ; <i32> [#uses=2]
+ %p.1i486 = phi i8* [ %p.2i477, %if70i483 ], [ %t89.i824, %e67 ], [ %p.2i477, %endif41i479 ] ; <i8*> [#uses=1]
+ %t84i487 = ptrtoint i8* %p.1i486 to i32 ; <i32> [#uses=1]
+ %t85i488 = ptrtoint i8* %t89.i824 to i32 ; <i32> [#uses=1]
+ %t86i489 = sub i32 %t84i487, %t85i488 ; <i32> [#uses=2]
+ %ttt = sub i32 %t90.i825, %t86i489 ; <i32> [#uses=1]
+ %t59i519 = zext i32 %radix.0.i485 to i64 ; <i64> [#uses=1]
+ br label %fcondi496
+
+fcondi496: ; preds = %if55i525, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491
+ %value.0i492 = phi i64 [ 0, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491 ], [ %t65i522, %if55i525 ] ; <i64> [#uses=1]
+ %fkey.0i494 = phi i32 [ 0, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491 ], [ %t70i524, %if55i525 ] ; <i32> [#uses=3]
+ %t3i495 = icmp ult i32 %fkey.0i494, %ttt ; <i1> [#uses=1]
+ br i1 %t3i495, label %fbodyi502, label %wcond.i422
+
+fbodyi502: ; preds = %fcondi496
+ %t5.s.i497 = add i32 %t86i489, %fkey.0i494 ; <i32> [#uses=1]
+ %t89.i824.s = add i32 %.frame.0.6, %t5.s.i497 ; <i32> [#uses=1]
+ %t5i498 = getelementptr i8* %line_arg831, i32 %t89.i824.s ; <i8*> [#uses=1]
+ %t6i499 = load i8* %t5i498 ; <i8> [#uses=6]
+ %t6.off84i500 = add i8 %t6i499, -48 ; <i8> [#uses=1]
+ %or.cond.i28.i501 = icmp ugt i8 %t6.off84i500, 9 ; <i1> [#uses=1]
+ br i1 %or.cond.i28.i501, label %ei505, label %endifi518
+
+ei505: ; preds = %fbodyi502
+ %t6.off83i503 = add i8 %t6i499, -97 ; <i8> [#uses=1]
+ %or.cond81i504 = icmp ugt i8 %t6.off83i503, 25 ; <i1> [#uses=1]
+ br i1 %or.cond81i504, label %e24i510, label %if22i507
+
+if22i507: ; preds = %ei505
+ %t27i506 = add i8 %t6i499, -39 ; <i8> [#uses=1]
+ br label %endifi518
+
+e24i510: ; preds = %ei505
+ %t6.offi508 = add i8 %t6i499, -65 ; <i8> [#uses=1]
+ %or.cond82i509 = icmp ugt i8 %t6.offi508, 25 ; <i1> [#uses=1]
+ br i1 %or.cond82i509, label %wcond.i422, label %if39i512
+
+if39i512: ; preds = %e24i510
+ %t44.i29.i511 = add i8 %t6i499, -7 ; <i8> [#uses=1]
+ br label %endifi518
+
+endifi518: ; preds = %if39i512, %if22i507, %fbodyi502
+ %c.0.i30.i513 = phi i8 [ %t27i506, %if22i507 ], [ %t44.i29.i511, %if39i512 ], [ %t6i499, %fbodyi502 ] ; <i8> [#uses=1]
+ %t48.i31.i514 = zext i8 %c.0.i30.i513 to i32 ; <i32> [#uses=1]
+ %t49i515 = add i32 %t48.i31.i514, 208 ; <i32> [#uses=1]
+ %t52i516 = and i32 %t49i515, 255 ; <i32> [#uses=2]
+ %t54i517 = icmp ult i32 %t52i516, %radix.0.i485 ; <i1> [#uses=1]
+ br i1 %t54i517, label %if55i525, label %wcond.i422
+
+if55i525: ; preds = %endifi518
+ %t61i520 = mul i64 %value.0i492, %t59i519 ; <i64> [#uses=1]
+ %t64i521 = zext i32 %t52i516 to i64 ; <i64> [#uses=1]
+ %t65i522 = add i64 %t61i520, %t64i521 ; <i64> [#uses=1]
+ %t70i524 = add i32 %fkey.0i494, 1 ; <i32> [#uses=1]
+ br label %fcondi496
+
+wcond.i422: ; preds = %e40.i, %endifi518, %e24i510, %fcondi496, %endifi603, %e24i595, %fcondi581
+ %sarg60.pn.i = phi i8* [ %p.0.i, %e40.i ], [ undef, %fcondi496 ], [ undef, %e24i510 ], [ undef, %endifi518 ], [ undef, %endifi603 ], [ undef, %e24i595 ], [ undef, %fcondi581 ] ; <i8*> [#uses=3]
+ %start_arg.pn.i = phi i32 [ %t49.i443, %e40.i ], [ 0, %fcondi496 ], [ 0, %e24i510 ], [ 0, %endifi518 ], [ 0, %endifi603 ], [ 0, %e24i595 ], [ 0, %fcondi581 ] ; <i32> [#uses=3]
+ %extent.0.i = phi i32 [ %t51.i, %e40.i ], [ undef, %fcondi496 ], [ undef, %e24i510 ], [ undef, %endifi518 ], [ undef, %endifi603 ], [ undef, %e24i595 ], [ undef, %fcondi581 ] ; <i32> [#uses=3]
+ %p.0.i = getelementptr i8* %sarg60.pn.i, i32 %start_arg.pn.i ; <i8*> [#uses=2]
+ %p.0.s63.i = add i32 %start_arg.pn.i, -1 ; <i32> [#uses=1]
+ %t2i424 = getelementptr i8* %sarg60.pn.i, i32 %p.0.s63.i ; <i8*> [#uses=1]
+ br label %forcondi430
+
+forcondi430: ; preds = %forbodyi434, %wcond.i422
+ %l.0i426 = phi i32 [ %extent.0.i, %wcond.i422 ], [ %t4i428, %forbodyi434 ] ; <i32> [#uses=2]
+ %p.0i427 = phi i8* [ %t2i424, %wcond.i422 ], [ %t7i431, %forbodyi434 ] ; <i8*> [#uses=1]
+ %t4i428 = add i32 %l.0i426, -1 ; <i32> [#uses=1]
+ %t5i429 = icmp eq i32 %l.0i426, 0 ; <i1> [#uses=1]
+ br i1 %t5i429, label %e.i441, label %forbodyi434
+
+forbodyi434: ; preds = %forcondi430
+ %t7i431 = getelementptr i8* %p.0i427, i32 1 ; <i8*> [#uses=3]
+ %t8i432 = load i8* %t7i431 ; <i8> [#uses=1]
+ %t12i433 = icmp eq i8 %t8i432, 32 ; <i1> [#uses=1]
+ br i1 %t12i433, label %ifi438, label %forcondi430
+
+ifi438: ; preds = %forbodyi434
+ %t15i435 = ptrtoint i8* %t7i431 to i32 ; <i32> [#uses=1]
+ %t16i436 = ptrtoint i8* %p.0.i to i32 ; <i32> [#uses=1]
+ %t17i437 = sub i32 %t15i435, %t16i436 ; <i32> [#uses=1]
+ br label %e.i441
+
+e.i441: ; preds = %ifi438, %forcondi430
+ %t2561.i = phi i32 [ %t17i437, %ifi438 ], [ %extent.0.i, %forcondi430 ] ; <i32> [#uses=2]
+ %p.0.s.i = add i32 %start_arg.pn.i, %t2561.i ; <i32> [#uses=1]
+ %t32.s.i = add i32 %p.0.s.i, -1 ; <i32> [#uses=1]
+ %t2i.i = getelementptr i8* %sarg60.pn.i, i32 %t32.s.i ; <i8*> [#uses=1]
+ br label %forbodyi.i
+
+forbodyi.i: ; preds = %forbodyi.i, %e.i441
+ %p.0i.i = phi i8* [ %t2i.i, %e.i441 ], [ %t7i.i, %forbodyi.i ] ; <i8*> [#uses=1]
+ %s2.0i.i = phi i8* [ getelementptr ([5 x i8]* @.str171, i32 0, i32 0), %e.i441 ], [ %t11i.i, %forbodyi.i ] ; <i8*> [#uses=2]
+ %t7i.i = getelementptr i8* %p.0i.i, i32 1 ; <i8*> [#uses=2]
+ %t8i.i = load i8* %t7i.i ; <i8> [#uses=1]
+ %t11i.i = getelementptr i8* %s2.0i.i, i32 1 ; <i8*> [#uses=1]
+ %t12i.i = load i8* %s2.0i.i ; <i8> [#uses=1]
+ %t14i.i = icmp eq i8 %t8i.i, %t12i.i ; <i1> [#uses=1]
+ br i1 %t14i.i, label %forbodyi.i, label %e40.i
+
+e40.i: ; preds = %forbodyi.i
+ %t49.i443 = add i32 %t2561.i, 1 ; <i32> [#uses=2]
+ %t51.i = sub i32 %extent.0.i, %t49.i443 ; <i32> [#uses=1]
+ br label %wcond.i422
+}
diff --git a/test/CodeGen/PowerPC/trampoline.ll b/test/CodeGen/PowerPC/trampoline.ll
new file mode 100644
index 0000000..bc05bb1
--- /dev/null
+++ b/test/CodeGen/PowerPC/trampoline.ll
@@ -0,0 +1,166 @@
+; RUN: llc < %s -march=ppc32 | grep {__trampoline_setup}
+
+module asm "\09.lazy_reference .objc_class_name_NSImageRep"
+module asm "\09.objc_class_name_NSBitmapImageRep=0"
+module asm "\09.globl .objc_class_name_NSBitmapImageRep"
+ %struct.CGImage = type opaque
+ %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]" = type { %struct.NSBitmapImageRep*, void (%struct.__block_1*, %struct.CGImage*)* }
+ %struct.NSBitmapImageRep = type { %struct.NSImageRep }
+ %struct.NSImageRep = type { }
+ %struct.NSZone = type opaque
+ %struct.__block_1 = type { %struct.__invoke_impl, %struct.NSZone*, %struct.NSBitmapImageRep** }
+ %struct.__builtin_trampoline = type { [40 x i8] }
+ %struct.__invoke_impl = type { i8*, i32, i32, i8* }
+ %struct._objc__method_prototype_list = type opaque
+ %struct._objc_class = type { %struct._objc_class*, %struct._objc_class*, i8*, i32, i32, i32, %struct._objc_ivar_list*, %struct._objc_method_list*, %struct.objc_cache*, %struct._objc_protocol**, i8*, %struct._objc_class_ext* }
+ %struct._objc_class_ext = type opaque
+ %struct._objc_ivar_list = type opaque
+ %struct._objc_method = type { %struct.objc_selector*, i8*, i8* }
+ %struct._objc_method_list = type opaque
+ %struct._objc_module = type { i32, i32, i8*, %struct._objc_symtab* }
+ %struct._objc_protocol = type { %struct._objc_protocol_extension*, i8*, %struct._objc_protocol**, %struct._objc__method_prototype_list*, %struct._objc__method_prototype_list* }
+ %struct._objc_protocol_extension = type opaque
+ %struct._objc_super = type { %struct.objc_object*, %struct._objc_class* }
+ %struct._objc_symtab = type { i32, %struct.objc_selector**, i16, i16, [1 x i8*] }
+ %struct.anon = type { %struct._objc__method_prototype_list*, i32, [1 x %struct._objc_method] }
+ %struct.objc_cache = type opaque
+ %struct.objc_object = type opaque
+ %struct.objc_selector = type opaque
+ %struct.objc_super = type opaque
+@_NSConcreteStackBlock = external global i8* ; <i8**> [#uses=1]
+@"\01L_OBJC_SELECTOR_REFERENCES_1" = internal global %struct.objc_selector* bitcast ([34 x i8]* @"\01L_OBJC_METH_VAR_NAME_1" to %struct.objc_selector*), section "__OBJC,__message_refs,literal_pointers,no_dead_strip" ; <%struct.objc_selector**> [#uses=2]
+@"\01L_OBJC_CLASS_NSBitmapImageRep" = internal global %struct._objc_class { %struct._objc_class* @"\01L_OBJC_METACLASS_NSBitmapImageRep", %struct._objc_class* bitcast ([11 x i8]* @"\01L_OBJC_CLASS_NAME_1" to %struct._objc_class*), i8* getelementptr ([17 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0), i32 0, i32 1, i32 0, %struct._objc_ivar_list* null, %struct._objc_method_list* bitcast ({ i8*, i32, [1 x %struct._objc_method] }* @"\01L_OBJC_INSTANCE_METHODS_NSBitmapImageRep" to %struct._objc_method_list*), %struct.objc_cache* null, %struct._objc_protocol** null, i8* null, %struct._objc_class_ext* null }, section "__OBJC,__class,regular,no_dead_strip" ; <%struct._objc_class*> [#uses=3]
+@"\01L_OBJC_SELECTOR_REFERENCES_0" = internal global %struct.objc_selector* bitcast ([14 x i8]* @"\01L_OBJC_METH_VAR_NAME_0" to %struct.objc_selector*), section "__OBJC,__message_refs,literal_pointers,no_dead_strip" ; <%struct.objc_selector**> [#uses=2]
+@"\01L_OBJC_SYMBOLS" = internal global { i32, %struct.objc_selector**, i16, i16, [1 x %struct._objc_class*] } { i32 0, %struct.objc_selector** null, i16 1, i16 0, [1 x %struct._objc_class*] [ %struct._objc_class* @"\01L_OBJC_CLASS_NSBitmapImageRep" ] }, section "__OBJC,__symbols,regular,no_dead_strip" ; <{ i32, %struct.objc_selector**, i16, i16, [1 x %struct._objc_class*] }*> [#uses=2]
+@"\01L_OBJC_METH_VAR_NAME_0" = internal global [14 x i8] c"copyWithZone:\00", section "__TEXT,__cstring,cstring_literals", align 4 ; <[14 x i8]*> [#uses=2]
+@"\01L_OBJC_METH_VAR_TYPE_0" = internal global [20 x i8] c"@12@0:4^{_NSZone=}8\00", section "__TEXT,__cstring,cstring_literals", align 4 ; <[20 x i8]*> [#uses=1]
+@"\01L_OBJC_INSTANCE_METHODS_NSBitmapImageRep" = internal global { i8*, i32, [1 x %struct._objc_method] } { i8* null, i32 1, [1 x %struct._objc_method] [ %struct._objc_method { %struct.objc_selector* bitcast ([14 x i8]* @"\01L_OBJC_METH_VAR_NAME_0" to %struct.objc_selector*), i8* getelementptr ([20 x i8]* @"\01L_OBJC_METH_VAR_TYPE_0", i32 0, i32 0), i8* bitcast (%struct.objc_object* (%struct.NSBitmapImageRep*, %struct.objc_selector*, %struct.NSZone*)* @"-[NSBitmapImageRep copyWithZone:]" to i8*) } ] }, section "__OBJC,__inst_meth,regular,no_dead_strip" ; <{ i8*, i32, [1 x %struct._objc_method] }*> [#uses=2]
+@"\01L_OBJC_CLASS_NAME_0" = internal global [17 x i8] c"NSBitmapImageRep\00", section "__TEXT,__cstring,cstring_literals", align 4 ; <[17 x i8]*> [#uses=1]
+@"\01L_OBJC_CLASS_NAME_1" = internal global [11 x i8] c"NSImageRep\00", section "__TEXT,__cstring,cstring_literals", align 4 ; <[11 x i8]*> [#uses=2]
+@"\01L_OBJC_METACLASS_NSBitmapImageRep" = internal global %struct._objc_class { %struct._objc_class* bitcast ([11 x i8]* @"\01L_OBJC_CLASS_NAME_1" to %struct._objc_class*), %struct._objc_class* bitcast ([11 x i8]* @"\01L_OBJC_CLASS_NAME_1" to %struct._objc_class*), i8* getelementptr ([17 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0), i32 0, i32 2, i32 48, %struct._objc_ivar_list* null, %struct._objc_method_list* null, %struct.objc_cache* null, %struct._objc_protocol** null, i8* null, %struct._objc_class_ext* null }, section "__OBJC,__meta_class,regular,no_dead_strip" ; <%struct._objc_class*> [#uses=2]
+@"\01L_OBJC_METH_VAR_NAME_1" = internal global [34 x i8] c"_performBlockUsingBackingCGImage:\00", section "__TEXT,__cstring,cstring_literals", align 4 ; <[34 x i8]*> [#uses=2]
+@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] zeroinitializer, section "__OBJC, __image_info,regular" ; <[2 x i32]*> [#uses=1]
+@"\01L_OBJC_CLASS_NAME_2" = internal global [1 x i8] zeroinitializer, section "__TEXT,__cstring,cstring_literals", align 4 ; <[1 x i8]*> [#uses=1]
+@"\01L_OBJC_MODULES" = internal global %struct._objc_module { i32 7, i32 16, i8* getelementptr ([1 x i8]* @"\01L_OBJC_CLASS_NAME_2", i32 0, i32 0), %struct._objc_symtab* bitcast ({ i32, %struct.objc_selector**, i16, i16, [1 x %struct._objc_class*] }* @"\01L_OBJC_SYMBOLS" to %struct._objc_symtab*) }, section "__OBJC,__module_info,regular,no_dead_strip" ; <%struct._objc_module*> [#uses=1]
[email protected] = appending global [14 x i8*] [ i8* bitcast (%struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_1" to i8*), i8* bitcast (%struct._objc_class* @"\01L_OBJC_CLASS_NSBitmapImageRep" to i8*), i8* bitcast (%struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_0" to i8*), i8* bitcast ({ i32, %struct.objc_selector**, i16, i16, [1 x %struct._objc_class*] }* @"\01L_OBJC_SYMBOLS" to i8*), i8* getelementptr ([14 x i8]* @"\01L_OBJC_METH_VAR_NAME_0", i32 0, i32 0), i8* getelementptr ([20 x i8]* @"\01L_OBJC_METH_VAR_TYPE_0", i32 0, i32 0), i8* bitcast ({ i8*, i32, [1 x %struct._objc_method] }* @"\01L_OBJC_INSTANCE_METHODS_NSBitmapImageRep" to i8*), i8* getelementptr ([17 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0), i8* getelementptr ([11 x i8]* @"\01L_OBJC_CLASS_NAME_1", i32 0, i32 0), i8* bitcast (%struct._objc_class* @"\01L_OBJC_METACLASS_NSBitmapImageRep" to i8*), i8* getelementptr ([34 x i8]* @"\01L_OBJC_METH_VAR_NAME_1", i32 0, i32 0), i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*), i8* getelementptr ([1 x i8]* @"\01L_OBJC_CLASS_NAME_2", i32 0, i32 0), i8* bitcast (%struct._objc_module* @"\01L_OBJC_MODULES" to i8*) ], section "llvm.metadata" ; <[14 x i8*]*> [#uses=0]
+
+define internal %struct.objc_object* @"-[NSBitmapImageRep copyWithZone:]"(%struct.NSBitmapImageRep* %self, %struct.objc_selector* %_cmd, %struct.NSZone* %zone) nounwind {
+entry:
+ %self_addr = alloca %struct.NSBitmapImageRep* ; <%struct.NSBitmapImageRep**> [#uses=2]
+ %_cmd_addr = alloca %struct.objc_selector* ; <%struct.objc_selector**> [#uses=1]
+ %zone_addr = alloca %struct.NSZone* ; <%struct.NSZone**> [#uses=2]
+ %retval = alloca %struct.objc_object* ; <%struct.objc_object**> [#uses=1]
+ %__block_holder_tmp_1.0 = alloca %struct.__block_1 ; <%struct.__block_1*> [#uses=7]
+ %new = alloca %struct.NSBitmapImageRep* ; <%struct.NSBitmapImageRep**> [#uses=2]
+ %self.1 = alloca %struct.objc_object* ; <%struct.objc_object**> [#uses=2]
+ %0 = alloca i8* ; <i8**> [#uses=2]
+ %TRAMP.9 = alloca %struct.__builtin_trampoline, align 4 ; <%struct.__builtin_trampoline*> [#uses=1]
+ %1 = alloca void (%struct.__block_1*, %struct.CGImage*)* ; <void (%struct.__block_1*, %struct.CGImage*)**> [#uses=2]
+ %2 = alloca %struct.NSBitmapImageRep* ; <%struct.NSBitmapImageRep**> [#uses=2]
+ %FRAME.7 = alloca %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]" ; <%"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"*> [#uses=5]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store %struct.NSBitmapImageRep* %self, %struct.NSBitmapImageRep** %self_addr
+ store %struct.objc_selector* %_cmd, %struct.objc_selector** %_cmd_addr
+ store %struct.NSZone* %zone, %struct.NSZone** %zone_addr
+ %3 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7, i32 0, i32 0 ; <%struct.NSBitmapImageRep**> [#uses=1]
+ %4 = load %struct.NSBitmapImageRep** %self_addr, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1]
+ store %struct.NSBitmapImageRep* %4, %struct.NSBitmapImageRep** %3, align 4
+ %TRAMP.91 = bitcast %struct.__builtin_trampoline* %TRAMP.9 to i8* ; <i8*> [#uses=1]
+ %FRAME.72 = bitcast %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7 to i8* ; <i8*> [#uses=1]
+ %tramp = call i8* @llvm.init.trampoline(i8* %TRAMP.91, i8* bitcast (void (%"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"*, %struct.__block_1*, %struct.CGImage*)* @__helper_1.1632 to i8*), i8* %FRAME.72) ; <i8*> [#uses=1]
+ store i8* %tramp, i8** %0, align 4
+ %5 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7, i32 0, i32 1 ; <void (%struct.__block_1*, %struct.CGImage*)**> [#uses=1]
+ %6 = load i8** %0, align 4 ; <i8*> [#uses=1]
+ %7 = bitcast i8* %6 to void (%struct.__block_1*, %struct.CGImage*)* ; <void (%struct.__block_1*, %struct.CGImage*)*> [#uses=1]
+ store void (%struct.__block_1*, %struct.CGImage*)* %7, void (%struct.__block_1*, %struct.CGImage*)** %5, align 4
+ store %struct.NSBitmapImageRep* null, %struct.NSBitmapImageRep** %new, align 4
+ %8 = getelementptr %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 0 ; <%struct.__invoke_impl*> [#uses=1]
+ %9 = getelementptr %struct.__invoke_impl* %8, i32 0, i32 0 ; <i8**> [#uses=1]
+ store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** %9, align 4
+ %10 = getelementptr %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 0 ; <%struct.__invoke_impl*> [#uses=1]
+ %11 = getelementptr %struct.__invoke_impl* %10, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 67108864, i32* %11, align 4
+ %12 = getelementptr %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 0 ; <%struct.__invoke_impl*> [#uses=1]
+ %13 = getelementptr %struct.__invoke_impl* %12, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 24, i32* %13, align 4
+ %14 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7, i32 0, i32 1 ; <void (%struct.__block_1*, %struct.CGImage*)**> [#uses=1]
+ %15 = load void (%struct.__block_1*, %struct.CGImage*)** %14, align 4 ; <void (%struct.__block_1*, %struct.CGImage*)*> [#uses=1]
+ store void (%struct.__block_1*, %struct.CGImage*)* %15, void (%struct.__block_1*, %struct.CGImage*)** %1, align 4
+ %16 = getelementptr %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 0 ; <%struct.__invoke_impl*> [#uses=1]
+ %17 = getelementptr %struct.__invoke_impl* %16, i32 0, i32 3 ; <i8**> [#uses=1]
+ %18 = load void (%struct.__block_1*, %struct.CGImage*)** %1, align 4 ; <void (%struct.__block_1*, %struct.CGImage*)*> [#uses=1]
+ %19 = bitcast void (%struct.__block_1*, %struct.CGImage*)* %18 to i8* ; <i8*> [#uses=1]
+ store i8* %19, i8** %17, align 4
+ %20 = getelementptr %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 1 ; <%struct.NSZone**> [#uses=1]
+ %21 = load %struct.NSZone** %zone_addr, align 4 ; <%struct.NSZone*> [#uses=1]
+ store %struct.NSZone* %21, %struct.NSZone** %20, align 4
+ %22 = getelementptr %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 2 ; <%struct.NSBitmapImageRep***> [#uses=1]
+ store %struct.NSBitmapImageRep** %new, %struct.NSBitmapImageRep*** %22, align 4
+ %23 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7, i32 0, i32 0 ; <%struct.NSBitmapImageRep**> [#uses=1]
+ %24 = load %struct.NSBitmapImageRep** %23, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1]
+ store %struct.NSBitmapImageRep* %24, %struct.NSBitmapImageRep** %2, align 4
+ %25 = load %struct.NSBitmapImageRep** %2, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1]
+ %26 = bitcast %struct.NSBitmapImageRep* %25 to %struct.objc_object* ; <%struct.objc_object*> [#uses=1]
+ store %struct.objc_object* %26, %struct.objc_object** %self.1, align 4
+ %27 = load %struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_1", align 4 ; <%struct.objc_selector*> [#uses=1]
+ %__block_holder_tmp_1.03 = bitcast %struct.__block_1* %__block_holder_tmp_1.0 to void (%struct.CGImage*)* ; <void (%struct.CGImage*)*> [#uses=1]
+ %28 = load %struct.objc_object** %self.1, align 4 ; <%struct.objc_object*> [#uses=1]
+ %29 = call %struct.objc_object* (%struct.objc_object*, %struct.objc_selector*, ...)* inttoptr (i64 4294901504 to %struct.objc_object* (%struct.objc_object*, %struct.objc_selector*, ...)*)(%struct.objc_object* %28, %struct.objc_selector* %27, void (%struct.CGImage*)* %__block_holder_tmp_1.03) nounwind ; <%struct.objc_object*> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load %struct.objc_object** %retval ; <%struct.objc_object*> [#uses=1]
+ ret %struct.objc_object* %retval5
+}
+
+declare i8* @llvm.init.trampoline(i8*, i8*, i8*) nounwind
+
+define internal void @__helper_1.1632(%"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* nest %CHAIN.8, %struct.__block_1* %_self, %struct.CGImage* %cgImage) nounwind {
+entry:
+ %CHAIN.8_addr = alloca %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* ; <%"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"**> [#uses=2]
+ %_self_addr = alloca %struct.__block_1* ; <%struct.__block_1**> [#uses=3]
+ %cgImage_addr = alloca %struct.CGImage* ; <%struct.CGImage**> [#uses=1]
+ %zone = alloca %struct.NSZone* ; <%struct.NSZone**> [#uses=2]
+ %objc_super = alloca %struct._objc_super ; <%struct._objc_super*> [#uses=3]
+ %new = alloca %struct.NSBitmapImageRep** ; <%struct.NSBitmapImageRep***> [#uses=2]
+ %objc_super.5 = alloca %struct.objc_super* ; <%struct.objc_super**> [#uses=2]
+ %0 = alloca %struct.NSBitmapImageRep* ; <%struct.NSBitmapImageRep**> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %CHAIN.8, %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"** %CHAIN.8_addr
+ store %struct.__block_1* %_self, %struct.__block_1** %_self_addr
+ store %struct.CGImage* %cgImage, %struct.CGImage** %cgImage_addr
+ %1 = load %struct.__block_1** %_self_addr, align 4 ; <%struct.__block_1*> [#uses=1]
+ %2 = getelementptr %struct.__block_1* %1, i32 0, i32 2 ; <%struct.NSBitmapImageRep***> [#uses=1]
+ %3 = load %struct.NSBitmapImageRep*** %2, align 4 ; <%struct.NSBitmapImageRep**> [#uses=1]
+ store %struct.NSBitmapImageRep** %3, %struct.NSBitmapImageRep*** %new, align 4
+ %4 = load %struct.__block_1** %_self_addr, align 4 ; <%struct.__block_1*> [#uses=1]
+ %5 = getelementptr %struct.__block_1* %4, i32 0, i32 1 ; <%struct.NSZone**> [#uses=1]
+ %6 = load %struct.NSZone** %5, align 4 ; <%struct.NSZone*> [#uses=1]
+ store %struct.NSZone* %6, %struct.NSZone** %zone, align 4
+ %7 = load %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"** %CHAIN.8_addr, align 4 ; <%"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"*> [#uses=1]
+ %8 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %7, i32 0, i32 0 ; <%struct.NSBitmapImageRep**> [#uses=1]
+ %9 = load %struct.NSBitmapImageRep** %8, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1]
+ store %struct.NSBitmapImageRep* %9, %struct.NSBitmapImageRep** %0, align 4
+ %10 = load %struct.NSBitmapImageRep** %0, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1]
+ %11 = bitcast %struct.NSBitmapImageRep* %10 to %struct.objc_object* ; <%struct.objc_object*> [#uses=1]
+ %12 = getelementptr %struct._objc_super* %objc_super, i32 0, i32 0 ; <%struct.objc_object**> [#uses=1]
+ store %struct.objc_object* %11, %struct.objc_object** %12, align 4
+ %13 = load %struct._objc_class** getelementptr (%struct._objc_class* @"\01L_OBJC_CLASS_NSBitmapImageRep", i32 0, i32 1), align 4 ; <%struct._objc_class*> [#uses=1]
+ %14 = getelementptr %struct._objc_super* %objc_super, i32 0, i32 1 ; <%struct._objc_class**> [#uses=1]
+ store %struct._objc_class* %13, %struct._objc_class** %14, align 4
+ %objc_super1 = bitcast %struct._objc_super* %objc_super to %struct.objc_super* ; <%struct.objc_super*> [#uses=1]
+ store %struct.objc_super* %objc_super1, %struct.objc_super** %objc_super.5, align 4
+ %15 = load %struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_0", align 4 ; <%struct.objc_selector*> [#uses=1]
+ %16 = load %struct.objc_super** %objc_super.5, align 4 ; <%struct.objc_super*> [#uses=1]
+ %17 = load %struct.NSZone** %zone, align 4 ; <%struct.NSZone*> [#uses=1]
+ %18 = call %struct.objc_object* (%struct.objc_super*, %struct.objc_selector*, ...)* @objc_msgSendSuper(%struct.objc_super* %16, %struct.objc_selector* %15, %struct.NSZone* %17) nounwind ; <%struct.objc_object*> [#uses=1]
+ %19 = bitcast %struct.objc_object* %18 to %struct.NSBitmapImageRep* ; <%struct.NSBitmapImageRep*> [#uses=1]
+ %20 = load %struct.NSBitmapImageRep*** %new, align 4 ; <%struct.NSBitmapImageRep**> [#uses=1]
+ store %struct.NSBitmapImageRep* %19, %struct.NSBitmapImageRep** %20, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare %struct.objc_object* @objc_msgSendSuper(%struct.objc_super*, %struct.objc_selector*, ...)
diff --git a/test/CodeGen/PowerPC/unsafe-math.ll b/test/CodeGen/PowerPC/unsafe-math.ll
new file mode 100644
index 0000000..ef97912
--- /dev/null
+++ b/test/CodeGen/PowerPC/unsafe-math.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32 | grep fmul | count 2
+; RUN: llc < %s -march=ppc32 -enable-unsafe-fp-math | \
+; RUN: grep fmul | count 1
+
+define double @foo(double %X) {
+ %tmp1 = fmul double %X, 1.23
+ %tmp2 = fmul double %tmp1, 4.124
+ ret double %tmp2
+}
+
diff --git a/test/CodeGen/PowerPC/vcmp-fold.ll b/test/CodeGen/PowerPC/vcmp-fold.ll
new file mode 100644
index 0000000..7a42c27
--- /dev/null
+++ b/test/CodeGen/PowerPC/vcmp-fold.ll
@@ -0,0 +1,22 @@
+; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single
+; "vcmpbfp.".
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vcmpbfp | count 1
+
+
+define void @test(<4 x float>* %x, <4 x float>* %y, i32* %P) {
+entry:
+ %tmp = load <4 x float>* %x ; <<4 x float>> [#uses=1]
+ %tmp2 = load <4 x float>* %y ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) ; <i32> [#uses=1]
+ %tmp4 = load <4 x float>* %x ; <<4 x float>> [#uses=1]
+ %tmp6 = load <4 x float>* %y ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ; <<4 x i32>> [#uses=1]
+ %tmp7 = bitcast <4 x i32> %tmp.upgrd.2 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp7, <4 x float>* %x
+ store i32 %tmp.upgrd.1, i32* %P
+ ret void
+}
+
+declare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>)
+
+declare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>)
diff --git a/test/CodeGen/PowerPC/vec_auto_constant.ll b/test/CodeGen/PowerPC/vec_auto_constant.ll
new file mode 100644
index 0000000..973f089
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_auto_constant.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 | FileCheck %s
+; Formerly produced .long, 7320806 (partial)
+; CHECK: .byte 22
+; CHECK: .byte 21
+; CHECK: .byte 20
+; CHECK: .byte 3
+; CHECK: .byte 25
+; CHECK: .byte 24
+; CHECK: .byte 23
+; CHECK: .byte 3
+; CHECK: .byte 28
+; CHECK: .byte 27
+; CHECK: .byte 26
+; CHECK: .byte 3
+; CHECK: .byte 31
+; CHECK: .byte 30
+; CHECK: .byte 29
+; CHECK: .byte 3
+@baz = common global <16 x i8> zeroinitializer ; <<16 x i8>*> [#uses=1]
+
+define void @foo(<16 x i8> %x) nounwind ssp {
+entry:
+ %x_addr = alloca <16 x i8> ; <<16 x i8>*> [#uses=2]
+ %temp = alloca <16 x i8> ; <<16 x i8>*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store <16 x i8> %x, <16 x i8>* %x_addr
+ store <16 x i8> <i8 22, i8 21, i8 20, i8 3, i8 25, i8 24, i8 23, i8 3, i8 28, i8 27, i8 26, i8 3, i8 31, i8 30, i8 29, i8 3>, <16 x i8>* %temp, align 16
+ %0 = load <16 x i8>* %x_addr, align 16 ; <<16 x i8>> [#uses=1]
+ %1 = load <16 x i8>* %temp, align 16 ; <<16 x i8>> [#uses=1]
+ %tmp = add <16 x i8> %0, %1 ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp, <16 x i8>* @baz, align 16
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/vec_br_cmp.ll b/test/CodeGen/PowerPC/vec_br_cmp.ll
new file mode 100644
index 0000000..c34d850
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_br_cmp.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 -o %t
+; RUN: grep vcmpeqfp. %t
+; RUN: not grep mfcr %t
+
+; A predicate compare used immediately by a branch should not generate an mfcr.
+
+define void @test(<4 x float>* %A, <4 x float>* %B) {
+ %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1]
+ %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.1 = tail call i32 @llvm.ppc.altivec.vcmpeqfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp3 ) ; <i32> [#uses=1]
+ %tmp.upgrd.2 = icmp eq i32 %tmp.upgrd.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.2, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %0
+ store <4 x float> zeroinitializer, <4 x float>* %B
+ ret void
+
+UnifiedReturnBlock: ; preds = %0
+ ret void
+}
+
+declare i32 @llvm.ppc.altivec.vcmpeqfp.p(i32, <4 x float>, <4 x float>)
diff --git a/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll b/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll
new file mode 100644
index 0000000..015c086
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mattr=+altivec | FileCheck %s
+; Formerly this did byte loads and word stores.
+@a = external global <16 x i8>
+@b = external global <16 x i8>
+@c = external global <16 x i8>
+
+define void @foo() nounwind ssp {
+; CHECK: _foo:
+; CHECK-NOT: stw
+entry:
+ %tmp0 = load <16 x i8>* @a, align 16
+ %tmp180.i = extractelement <16 x i8> %tmp0, i32 0 ; <i8> [#uses=1]
+ %tmp181.i = insertelement <16 x i8> <i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp180.i, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp182.i = extractelement <16 x i8> %tmp0, i32 1 ; <i8> [#uses=1]
+ %tmp183.i = insertelement <16 x i8> %tmp181.i, i8 %tmp182.i, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp184.i = insertelement <16 x i8> %tmp183.i, i8 0, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp185.i = insertelement <16 x i8> %tmp184.i, i8 0, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp186.i = extractelement <16 x i8> %tmp0, i32 4 ; <i8> [#uses=1]
+ %tmp187.i = insertelement <16 x i8> %tmp185.i, i8 %tmp186.i, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp188.i = extractelement <16 x i8> %tmp0, i32 5 ; <i8> [#uses=1]
+ %tmp189.i = insertelement <16 x i8> %tmp187.i, i8 %tmp188.i, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp190.i = insertelement <16 x i8> %tmp189.i, i8 0, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp191.i = insertelement <16 x i8> %tmp190.i, i8 0, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp192.i = extractelement <16 x i8> %tmp0, i32 8 ; <i8> [#uses=1]
+ %tmp193.i = insertelement <16 x i8> %tmp191.i, i8 %tmp192.i, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp194.i = extractelement <16 x i8> %tmp0, i32 9 ; <i8> [#uses=1]
+ %tmp195.i = insertelement <16 x i8> %tmp193.i, i8 %tmp194.i, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp196.i = insertelement <16 x i8> %tmp195.i, i8 0, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp197.i = insertelement <16 x i8> %tmp196.i, i8 0, i32 13 ; <<16 x i8>> [#uses=1]
+%tmp201 = shufflevector <16 x i8> %tmp197.i, <16 x i8> %tmp0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 28, i32 29>; ModuleID = 'try.c'
+ store <16 x i8> %tmp201, <16 x i8>* @c, align 16
+ br label %return
+
+return: ; preds = %bb2
+ ret void
+; CHECK: blr
+}
diff --git a/test/CodeGen/PowerPC/vec_call.ll b/test/CodeGen/PowerPC/vec_call.ll
new file mode 100644
index 0000000..4511315
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_call.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5
+
+define <4 x i32> @test_arg(<4 x i32> %A, <4 x i32> %B) {
+ %C = add <4 x i32> %A, %B ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %C
+}
+
+define <4 x i32> @foo() {
+ %X = call <4 x i32> @test_arg( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %X
+}
diff --git a/test/CodeGen/PowerPC/vec_constants.ll b/test/CodeGen/PowerPC/vec_constants.ll
new file mode 100644
index 0000000..32c6f48
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_constants.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep CPI
+
+define void @test1(<4 x i32>* %P1, <4 x i32>* %P2, <4 x float>* %P3) {
+ %tmp = load <4 x i32>* %P1 ; <<4 x i32>> [#uses=1]
+ %tmp4 = and <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp4, <4 x i32>* %P1
+ %tmp7 = load <4 x i32>* %P2 ; <<4 x i32>> [#uses=1]
+ %tmp9 = and <4 x i32> %tmp7, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp9, <4 x i32>* %P2
+ %tmp.upgrd.1 = load <4 x float>* %P3 ; <<4 x float>> [#uses=1]
+ %tmp11 = bitcast <4 x float> %tmp.upgrd.1 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp12 = and <4 x i32> %tmp11, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>> [#uses=1]
+ %tmp13 = bitcast <4 x i32> %tmp12 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp13, <4 x float>* %P3
+ ret void
+}
+
+define <4 x i32> @test_30() {
+ ret <4 x i32> < i32 30, i32 30, i32 30, i32 30 >
+}
+
+define <4 x i32> @test_29() {
+ ret <4 x i32> < i32 29, i32 29, i32 29, i32 29 >
+}
+
+define <8 x i16> @test_n30() {
+ ret <8 x i16> < i16 -30, i16 -30, i16 -30, i16 -30, i16 -30, i16 -30, i16 -30, i16 -30 >
+}
+
+define <16 x i8> @test_n104() {
+ ret <16 x i8> < i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104 >
+}
+
+define <4 x i32> @test_vsldoi() {
+ ret <4 x i32> < i32 512, i32 512, i32 512, i32 512 >
+}
+
+define <4 x i32> @test_rol() {
+ ret <4 x i32> < i32 -11534337, i32 -11534337, i32 -11534337, i32 -11534337 >
+}
diff --git a/test/CodeGen/PowerPC/vec_fneg.ll b/test/CodeGen/PowerPC/vec_fneg.ll
new file mode 100644
index 0000000..e01e659
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_fneg.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsubfp
+
+define void @t(<4 x float>* %A) {
+ %tmp2 = load <4 x float>* %A
+ %tmp3 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp2
+ store <4 x float> %tmp3, <4 x float>* %A
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/vec_insert.ll b/test/CodeGen/PowerPC/vec_insert.ll
new file mode 100644
index 0000000..185454c
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_insert.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep sth
+
+define <8 x i16> @insert(<8 x i16> %foo, i16 %a) nounwind {
+entry:
+ %vecext = insertelement <8 x i16> %foo, i16 %a, i32 7 ; <i8> [#uses=1]
+ ret <8 x i16> %vecext
+}
+
diff --git a/test/CodeGen/PowerPC/vec_misaligned.ll b/test/CodeGen/PowerPC/vec_misaligned.ll
new file mode 100644
index 0000000..d7ed64a
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_misaligned.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5
+
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin8"
+ %struct.S2203 = type { %struct.u16qi }
+ %struct.u16qi = type { <16 x i8> }
+@s = weak global %struct.S2203 zeroinitializer ; <%struct.S2203*> [#uses=1]
+
+define void @foo(i32 %x, ...) {
+entry:
+ %x_addr = alloca i32 ; <i32*> [#uses=1]
+ %ap = alloca i8* ; <i8**> [#uses=3]
+ %ap.0 = alloca i8* ; <i8**> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %x, i32* %x_addr
+ %ap1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %ap1 )
+ %tmp = load i8** %ap, align 4 ; <i8*> [#uses=1]
+ store i8* %tmp, i8** %ap.0, align 4
+ %tmp2 = load i8** %ap.0, align 4 ; <i8*> [#uses=1]
+ %tmp3 = getelementptr i8* %tmp2, i64 16 ; <i8*> [#uses=1]
+ store i8* %tmp3, i8** %ap, align 4
+ %tmp4 = load i8** %ap.0, align 4 ; <i8*> [#uses=1]
+ %tmp45 = bitcast i8* %tmp4 to %struct.S2203* ; <%struct.S2203*> [#uses=1]
+ %tmp6 = getelementptr %struct.S2203* @s, i32 0, i32 0 ; <%struct.u16qi*> [#uses=1]
+ %tmp7 = getelementptr %struct.S2203* %tmp45, i32 0, i32 0 ; <%struct.u16qi*> [#uses=1]
+ %tmp8 = getelementptr %struct.u16qi* %tmp6, i32 0, i32 0 ; <<16 x i8>*> [#uses=1]
+ %tmp9 = getelementptr %struct.u16qi* %tmp7, i32 0, i32 0 ; <<16 x i8>*> [#uses=1]
+ %tmp10 = load <16 x i8>* %tmp9, align 4 ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp10, <16 x i8>* %tmp8, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare void @llvm.va_start(i8*) nounwind
diff --git a/test/CodeGen/PowerPC/vec_mul.ll b/test/CodeGen/PowerPC/vec_mul.ll
new file mode 100644
index 0000000..80f4de4
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_mul.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep mullw
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vmsumuhm
+
+define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) {
+ %tmp = load <4 x i32>* %X ; <<4 x i32>> [#uses=1]
+ %tmp2 = load <4 x i32>* %Y ; <<4 x i32>> [#uses=1]
+ %tmp3 = mul <4 x i32> %tmp, %tmp2 ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp3
+}
+
+define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) {
+ %tmp = load <8 x i16>* %X ; <<8 x i16>> [#uses=1]
+ %tmp2 = load <8 x i16>* %Y ; <<8 x i16>> [#uses=1]
+ %tmp3 = mul <8 x i16> %tmp, %tmp2 ; <<8 x i16>> [#uses=1]
+ ret <8 x i16> %tmp3
+}
+
+define <16 x i8> @test_v16i8(<16 x i8>* %X, <16 x i8>* %Y) {
+ %tmp = load <16 x i8>* %X ; <<16 x i8>> [#uses=1]
+ %tmp2 = load <16 x i8>* %Y ; <<16 x i8>> [#uses=1]
+ %tmp3 = mul <16 x i8> %tmp, %tmp2 ; <<16 x i8>> [#uses=1]
+ ret <16 x i8> %tmp3
+}
diff --git a/test/CodeGen/PowerPC/vec_perf_shuffle.ll b/test/CodeGen/PowerPC/vec_perf_shuffle.ll
new file mode 100644
index 0000000..2c3594d
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_perf_shuffle.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep vperm
+
+define <4 x float> @test_uu72(<4 x float>* %P1, <4 x float>* %P2) {
+ %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
+ %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1]
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 undef, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %V3
+}
+
+define <4 x float> @test_30u5(<4 x float>* %P1, <4 x float>* %P2) {
+ %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
+ %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1]
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 0, i32 undef, i32 5 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %V3
+}
+
+define <4 x float> @test_3u73(<4 x float>* %P1, <4 x float>* %P2) {
+ %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
+ %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1]
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 undef, i32 7, i32 3 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %V3
+}
+
+define <4 x float> @test_3774(<4 x float>* %P1, <4 x float>* %P2) {
+ %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
+ %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1]
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 7, i32 7, i32 4 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %V3
+}
+
+define <4 x float> @test_4450(<4 x float>* %P1, <4 x float>* %P2) {
+ %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
+ %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1]
+ %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 4, i32 4, i32 5, i32 0 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %V3
+}
diff --git a/test/CodeGen/PowerPC/vec_shift.ll b/test/CodeGen/PowerPC/vec_shift.ll
new file mode 100644
index 0000000..646fb5f
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_shift.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5
+; PR3628
+
+define void @update(<4 x i32> %val, <4 x i32>* %dst) nounwind {
+entry:
+ %shl = shl <4 x i32> %val, < i32 4, i32 3, i32 2, i32 1 >
+ %shr = ashr <4 x i32> %shl, < i32 1, i32 2, i32 3, i32 4 >
+ store <4 x i32> %shr, <4 x i32>* %dst
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/vec_shuffle.ll b/test/CodeGen/PowerPC/vec_shuffle.ll
new file mode 100644
index 0000000..8270632
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_shuffle.ll
@@ -0,0 +1,504 @@
+; RUN: opt < %s -instcombine | \
+; RUN: llc -march=ppc32 -mcpu=g5 | not grep vperm
+; RUN: llc < %s -march=ppc32 -mcpu=g5 > %t
+; RUN: grep vsldoi %t | count 2
+; RUN: grep vmrgh %t | count 7
+; RUN: grep vmrgl %t | count 6
+; RUN: grep vpkuhum %t | count 1
+; RUN: grep vpkuwum %t | count 1
+
+define void @VSLDOI_xy(<8 x i16>* %A, <8 x i16>* %B) {
+entry:
+ %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=1]
+ %tmp2 = load <8 x i16>* %B ; <<8 x i16>> [#uses=1]
+ %tmp.upgrd.1 = bitcast <8 x i16> %tmp to <16 x i8> ; <<16 x i8>> [#uses=11]
+ %tmp2.upgrd.2 = bitcast <8 x i16> %tmp2 to <16 x i8> ; <<16 x i8>> [#uses=5]
+ %tmp.upgrd.3 = extractelement <16 x i8> %tmp.upgrd.1, i32 5 ; <i8> [#uses=1]
+ %tmp3 = extractelement <16 x i8> %tmp.upgrd.1, i32 6 ; <i8> [#uses=1]
+ %tmp4 = extractelement <16 x i8> %tmp.upgrd.1, i32 7 ; <i8> [#uses=1]
+ %tmp5 = extractelement <16 x i8> %tmp.upgrd.1, i32 8 ; <i8> [#uses=1]
+ %tmp6 = extractelement <16 x i8> %tmp.upgrd.1, i32 9 ; <i8> [#uses=1]
+ %tmp7 = extractelement <16 x i8> %tmp.upgrd.1, i32 10 ; <i8> [#uses=1]
+ %tmp8 = extractelement <16 x i8> %tmp.upgrd.1, i32 11 ; <i8> [#uses=1]
+ %tmp9 = extractelement <16 x i8> %tmp.upgrd.1, i32 12 ; <i8> [#uses=1]
+ %tmp10 = extractelement <16 x i8> %tmp.upgrd.1, i32 13 ; <i8> [#uses=1]
+ %tmp11 = extractelement <16 x i8> %tmp.upgrd.1, i32 14 ; <i8> [#uses=1]
+ %tmp12 = extractelement <16 x i8> %tmp.upgrd.1, i32 15 ; <i8> [#uses=1]
+ %tmp13 = extractelement <16 x i8> %tmp2.upgrd.2, i32 0 ; <i8> [#uses=1]
+ %tmp14 = extractelement <16 x i8> %tmp2.upgrd.2, i32 1 ; <i8> [#uses=1]
+ %tmp15 = extractelement <16 x i8> %tmp2.upgrd.2, i32 2 ; <i8> [#uses=1]
+ %tmp16 = extractelement <16 x i8> %tmp2.upgrd.2, i32 3 ; <i8> [#uses=1]
+ %tmp17 = extractelement <16 x i8> %tmp2.upgrd.2, i32 4 ; <i8> [#uses=1]
+ %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.3, i32 0 ; <<16 x i8>> [#uses=1]
+ %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1]
+ %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp22 = insertelement <16 x i8> %tmp21, i8 %tmp6, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp23 = insertelement <16 x i8> %tmp22, i8 %tmp7, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp24 = insertelement <16 x i8> %tmp23, i8 %tmp8, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp26 = insertelement <16 x i8> %tmp25, i8 %tmp10, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp27 = insertelement <16 x i8> %tmp26, i8 %tmp11, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp29 = insertelement <16 x i8> %tmp28, i8 %tmp13, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp30 = insertelement <16 x i8> %tmp29, i8 %tmp14, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp31 = insertelement <16 x i8> %tmp30, i8 %tmp15, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp32 = insertelement <16 x i8> %tmp31, i8 %tmp16, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp33 = insertelement <16 x i8> %tmp32, i8 %tmp17, i32 15 ; <<16 x i8>> [#uses=1]
+ %tmp33.upgrd.4 = bitcast <16 x i8> %tmp33 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp33.upgrd.4, <8 x i16>* %A
+ ret void
+}
+
+define void @VSLDOI_xx(<8 x i16>* %A, <8 x i16>* %B) {
+ %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=1]
+ %tmp2 = load <8 x i16>* %A ; <<8 x i16>> [#uses=1]
+ %tmp.upgrd.5 = bitcast <8 x i16> %tmp to <16 x i8> ; <<16 x i8>> [#uses=11]
+ %tmp2.upgrd.6 = bitcast <8 x i16> %tmp2 to <16 x i8> ; <<16 x i8>> [#uses=5]
+ %tmp.upgrd.7 = extractelement <16 x i8> %tmp.upgrd.5, i32 5 ; <i8> [#uses=1]
+ %tmp3 = extractelement <16 x i8> %tmp.upgrd.5, i32 6 ; <i8> [#uses=1]
+ %tmp4 = extractelement <16 x i8> %tmp.upgrd.5, i32 7 ; <i8> [#uses=1]
+ %tmp5 = extractelement <16 x i8> %tmp.upgrd.5, i32 8 ; <i8> [#uses=1]
+ %tmp6 = extractelement <16 x i8> %tmp.upgrd.5, i32 9 ; <i8> [#uses=1]
+ %tmp7 = extractelement <16 x i8> %tmp.upgrd.5, i32 10 ; <i8> [#uses=1]
+ %tmp8 = extractelement <16 x i8> %tmp.upgrd.5, i32 11 ; <i8> [#uses=1]
+ %tmp9 = extractelement <16 x i8> %tmp.upgrd.5, i32 12 ; <i8> [#uses=1]
+ %tmp10 = extractelement <16 x i8> %tmp.upgrd.5, i32 13 ; <i8> [#uses=1]
+ %tmp11 = extractelement <16 x i8> %tmp.upgrd.5, i32 14 ; <i8> [#uses=1]
+ %tmp12 = extractelement <16 x i8> %tmp.upgrd.5, i32 15 ; <i8> [#uses=1]
+ %tmp13 = extractelement <16 x i8> %tmp2.upgrd.6, i32 0 ; <i8> [#uses=1]
+ %tmp14 = extractelement <16 x i8> %tmp2.upgrd.6, i32 1 ; <i8> [#uses=1]
+ %tmp15 = extractelement <16 x i8> %tmp2.upgrd.6, i32 2 ; <i8> [#uses=1]
+ %tmp16 = extractelement <16 x i8> %tmp2.upgrd.6, i32 3 ; <i8> [#uses=1]
+ %tmp17 = extractelement <16 x i8> %tmp2.upgrd.6, i32 4 ; <i8> [#uses=1]
+ %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.7, i32 0 ; <<16 x i8>> [#uses=1]
+ %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1]
+ %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp22 = insertelement <16 x i8> %tmp21, i8 %tmp6, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp23 = insertelement <16 x i8> %tmp22, i8 %tmp7, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp24 = insertelement <16 x i8> %tmp23, i8 %tmp8, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp26 = insertelement <16 x i8> %tmp25, i8 %tmp10, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp27 = insertelement <16 x i8> %tmp26, i8 %tmp11, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp29 = insertelement <16 x i8> %tmp28, i8 %tmp13, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp30 = insertelement <16 x i8> %tmp29, i8 %tmp14, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp31 = insertelement <16 x i8> %tmp30, i8 %tmp15, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp32 = insertelement <16 x i8> %tmp31, i8 %tmp16, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp33 = insertelement <16 x i8> %tmp32, i8 %tmp17, i32 15 ; <<16 x i8>> [#uses=1]
+ %tmp33.upgrd.8 = bitcast <16 x i8> %tmp33 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp33.upgrd.8, <8 x i16>* %A
+ ret void
+}
+
+define void @VPERM_promote(<8 x i16>* %A, <8 x i16>* %B) {
+entry:
+ %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=1]
+ %tmp.upgrd.9 = bitcast <8 x i16> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp2 = load <8 x i16>* %B ; <<8 x i16>> [#uses=1]
+ %tmp2.upgrd.10 = bitcast <8 x i16> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp3 = call <4 x i32> @llvm.ppc.altivec.vperm( <4 x i32> %tmp.upgrd.9, <4 x i32> %tmp2.upgrd.10, <16 x i8> < i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14 > ) ; <<4 x i32>> [#uses=1]
+ %tmp3.upgrd.11 = bitcast <4 x i32> %tmp3 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp3.upgrd.11, <8 x i16>* %A
+ ret void
+}
+
+declare <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32>, <4 x i32>, <16 x i8>)
+
+define void @tb_l(<16 x i8>* %A, <16 x i8>* %B) {
+entry:
+ %tmp = load <16 x i8>* %A ; <<16 x i8>> [#uses=8]
+ %tmp2 = load <16 x i8>* %B ; <<16 x i8>> [#uses=8]
+ %tmp.upgrd.12 = extractelement <16 x i8> %tmp, i32 8 ; <i8> [#uses=1]
+ %tmp3 = extractelement <16 x i8> %tmp2, i32 8 ; <i8> [#uses=1]
+ %tmp4 = extractelement <16 x i8> %tmp, i32 9 ; <i8> [#uses=1]
+ %tmp5 = extractelement <16 x i8> %tmp2, i32 9 ; <i8> [#uses=1]
+ %tmp6 = extractelement <16 x i8> %tmp, i32 10 ; <i8> [#uses=1]
+ %tmp7 = extractelement <16 x i8> %tmp2, i32 10 ; <i8> [#uses=1]
+ %tmp8 = extractelement <16 x i8> %tmp, i32 11 ; <i8> [#uses=1]
+ %tmp9 = extractelement <16 x i8> %tmp2, i32 11 ; <i8> [#uses=1]
+ %tmp10 = extractelement <16 x i8> %tmp, i32 12 ; <i8> [#uses=1]
+ %tmp11 = extractelement <16 x i8> %tmp2, i32 12 ; <i8> [#uses=1]
+ %tmp12 = extractelement <16 x i8> %tmp, i32 13 ; <i8> [#uses=1]
+ %tmp13 = extractelement <16 x i8> %tmp2, i32 13 ; <i8> [#uses=1]
+ %tmp14 = extractelement <16 x i8> %tmp, i32 14 ; <i8> [#uses=1]
+ %tmp15 = extractelement <16 x i8> %tmp2, i32 14 ; <i8> [#uses=1]
+ %tmp16 = extractelement <16 x i8> %tmp, i32 15 ; <i8> [#uses=1]
+ %tmp17 = extractelement <16 x i8> %tmp2, i32 15 ; <i8> [#uses=1]
+ %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.12, i32 0 ; <<16 x i8>> [#uses=1]
+ %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1]
+ %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp22 = insertelement <16 x i8> %tmp21, i8 %tmp6, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp23 = insertelement <16 x i8> %tmp22, i8 %tmp7, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp24 = insertelement <16 x i8> %tmp23, i8 %tmp8, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp26 = insertelement <16 x i8> %tmp25, i8 %tmp10, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp27 = insertelement <16 x i8> %tmp26, i8 %tmp11, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp29 = insertelement <16 x i8> %tmp28, i8 %tmp13, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp30 = insertelement <16 x i8> %tmp29, i8 %tmp14, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp31 = insertelement <16 x i8> %tmp30, i8 %tmp15, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp32 = insertelement <16 x i8> %tmp31, i8 %tmp16, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp33 = insertelement <16 x i8> %tmp32, i8 %tmp17, i32 15 ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp33, <16 x i8>* %A
+ ret void
+}
+
+define void @th_l(<8 x i16>* %A, <8 x i16>* %B) {
+entry:
+ %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=4]
+ %tmp2 = load <8 x i16>* %B ; <<8 x i16>> [#uses=4]
+ %tmp.upgrd.13 = extractelement <8 x i16> %tmp, i32 4 ; <i16> [#uses=1]
+ %tmp3 = extractelement <8 x i16> %tmp2, i32 4 ; <i16> [#uses=1]
+ %tmp4 = extractelement <8 x i16> %tmp, i32 5 ; <i16> [#uses=1]
+ %tmp5 = extractelement <8 x i16> %tmp2, i32 5 ; <i16> [#uses=1]
+ %tmp6 = extractelement <8 x i16> %tmp, i32 6 ; <i16> [#uses=1]
+ %tmp7 = extractelement <8 x i16> %tmp2, i32 6 ; <i16> [#uses=1]
+ %tmp8 = extractelement <8 x i16> %tmp, i32 7 ; <i16> [#uses=1]
+ %tmp9 = extractelement <8 x i16> %tmp2, i32 7 ; <i16> [#uses=1]
+ %tmp10 = insertelement <8 x i16> undef, i16 %tmp.upgrd.13, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 1 ; <<8 x i16>> [#uses=1]
+ %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp4, i32 2 ; <<8 x i16>> [#uses=1]
+ %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp6, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp16 = insertelement <8 x i16> %tmp15, i16 %tmp8, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp17 = insertelement <8 x i16> %tmp16, i16 %tmp9, i32 7 ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp17, <8 x i16>* %A
+ ret void
+}
+
+define void @tw_l(<4 x i32>* %A, <4 x i32>* %B) {
+entry:
+ %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=2]
+ %tmp2 = load <4 x i32>* %B ; <<4 x i32>> [#uses=2]
+ %tmp.upgrd.14 = extractelement <4 x i32> %tmp, i32 2 ; <i32> [#uses=1]
+ %tmp3 = extractelement <4 x i32> %tmp2, i32 2 ; <i32> [#uses=1]
+ %tmp4 = extractelement <4 x i32> %tmp, i32 3 ; <i32> [#uses=1]
+ %tmp5 = extractelement <4 x i32> %tmp2, i32 3 ; <i32> [#uses=1]
+ %tmp6 = insertelement <4 x i32> undef, i32 %tmp.upgrd.14, i32 0 ; <<4 x i32>> [#uses=1]
+ %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 1 ; <<4 x i32>> [#uses=1]
+ %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp5, i32 3 ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp9, <4 x i32>* %A
+ ret void
+}
+
+define void @tb_h(<16 x i8>* %A, <16 x i8>* %B) {
+entry:
+ %tmp = load <16 x i8>* %A ; <<16 x i8>> [#uses=8]
+ %tmp2 = load <16 x i8>* %B ; <<16 x i8>> [#uses=8]
+ %tmp.upgrd.15 = extractelement <16 x i8> %tmp, i32 0 ; <i8> [#uses=1]
+ %tmp3 = extractelement <16 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
+ %tmp4 = extractelement <16 x i8> %tmp, i32 1 ; <i8> [#uses=1]
+ %tmp5 = extractelement <16 x i8> %tmp2, i32 1 ; <i8> [#uses=1]
+ %tmp6 = extractelement <16 x i8> %tmp, i32 2 ; <i8> [#uses=1]
+ %tmp7 = extractelement <16 x i8> %tmp2, i32 2 ; <i8> [#uses=1]
+ %tmp8 = extractelement <16 x i8> %tmp, i32 3 ; <i8> [#uses=1]
+ %tmp9 = extractelement <16 x i8> %tmp2, i32 3 ; <i8> [#uses=1]
+ %tmp10 = extractelement <16 x i8> %tmp, i32 4 ; <i8> [#uses=1]
+ %tmp11 = extractelement <16 x i8> %tmp2, i32 4 ; <i8> [#uses=1]
+ %tmp12 = extractelement <16 x i8> %tmp, i32 5 ; <i8> [#uses=1]
+ %tmp13 = extractelement <16 x i8> %tmp2, i32 5 ; <i8> [#uses=1]
+ %tmp14 = extractelement <16 x i8> %tmp, i32 6 ; <i8> [#uses=1]
+ %tmp15 = extractelement <16 x i8> %tmp2, i32 6 ; <i8> [#uses=1]
+ %tmp16 = extractelement <16 x i8> %tmp, i32 7 ; <i8> [#uses=1]
+ %tmp17 = extractelement <16 x i8> %tmp2, i32 7 ; <i8> [#uses=1]
+ %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.15, i32 0 ; <<16 x i8>> [#uses=1]
+ %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1]
+ %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp22 = insertelement <16 x i8> %tmp21, i8 %tmp6, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp23 = insertelement <16 x i8> %tmp22, i8 %tmp7, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp24 = insertelement <16 x i8> %tmp23, i8 %tmp8, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp26 = insertelement <16 x i8> %tmp25, i8 %tmp10, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp27 = insertelement <16 x i8> %tmp26, i8 %tmp11, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp29 = insertelement <16 x i8> %tmp28, i8 %tmp13, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp30 = insertelement <16 x i8> %tmp29, i8 %tmp14, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp31 = insertelement <16 x i8> %tmp30, i8 %tmp15, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp32 = insertelement <16 x i8> %tmp31, i8 %tmp16, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp33 = insertelement <16 x i8> %tmp32, i8 %tmp17, i32 15 ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp33, <16 x i8>* %A
+ ret void
+}
+
+define void @th_h(<8 x i16>* %A, <8 x i16>* %B) {
+entry:
+ %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=4]
+ %tmp2 = load <8 x i16>* %B ; <<8 x i16>> [#uses=4]
+ %tmp.upgrd.16 = extractelement <8 x i16> %tmp, i32 0 ; <i16> [#uses=1]
+ %tmp3 = extractelement <8 x i16> %tmp2, i32 0 ; <i16> [#uses=1]
+ %tmp4 = extractelement <8 x i16> %tmp, i32 1 ; <i16> [#uses=1]
+ %tmp5 = extractelement <8 x i16> %tmp2, i32 1 ; <i16> [#uses=1]
+ %tmp6 = extractelement <8 x i16> %tmp, i32 2 ; <i16> [#uses=1]
+ %tmp7 = extractelement <8 x i16> %tmp2, i32 2 ; <i16> [#uses=1]
+ %tmp8 = extractelement <8 x i16> %tmp, i32 3 ; <i16> [#uses=1]
+ %tmp9 = extractelement <8 x i16> %tmp2, i32 3 ; <i16> [#uses=1]
+ %tmp10 = insertelement <8 x i16> undef, i16 %tmp.upgrd.16, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 1 ; <<8 x i16>> [#uses=1]
+ %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp4, i32 2 ; <<8 x i16>> [#uses=1]
+ %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp6, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp16 = insertelement <8 x i16> %tmp15, i16 %tmp8, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp17 = insertelement <8 x i16> %tmp16, i16 %tmp9, i32 7 ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp17, <8 x i16>* %A
+ ret void
+}
+
+define void @tw_h(<4 x i32>* %A, <4 x i32>* %B) {
+entry:
+ %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=2]
+ %tmp2 = load <4 x i32>* %B ; <<4 x i32>> [#uses=2]
+ %tmp.upgrd.17 = extractelement <4 x i32> %tmp2, i32 0 ; <i32> [#uses=1]
+ %tmp3 = extractelement <4 x i32> %tmp, i32 0 ; <i32> [#uses=1]
+ %tmp4 = extractelement <4 x i32> %tmp2, i32 1 ; <i32> [#uses=1]
+ %tmp5 = extractelement <4 x i32> %tmp, i32 1 ; <i32> [#uses=1]
+ %tmp6 = insertelement <4 x i32> undef, i32 %tmp.upgrd.17, i32 0 ; <<4 x i32>> [#uses=1]
+ %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 1 ; <<4 x i32>> [#uses=1]
+ %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp5, i32 3 ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp9, <4 x i32>* %A
+ ret void
+}
+
+define void @tw_h_flop(<4 x i32>* %A, <4 x i32>* %B) {
+ %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=2]
+ %tmp2 = load <4 x i32>* %B ; <<4 x i32>> [#uses=2]
+ %tmp.upgrd.18 = extractelement <4 x i32> %tmp, i32 0 ; <i32> [#uses=1]
+ %tmp3 = extractelement <4 x i32> %tmp2, i32 0 ; <i32> [#uses=1]
+ %tmp4 = extractelement <4 x i32> %tmp, i32 1 ; <i32> [#uses=1]
+ %tmp5 = extractelement <4 x i32> %tmp2, i32 1 ; <i32> [#uses=1]
+ %tmp6 = insertelement <4 x i32> undef, i32 %tmp.upgrd.18, i32 0 ; <<4 x i32>> [#uses=1]
+ %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 1 ; <<4 x i32>> [#uses=1]
+ %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp5, i32 3 ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp9, <4 x i32>* %A
+ ret void
+}
+
+define void @VMRG_UNARY_tb_l(<16 x i8>* %A, <16 x i8>* %B) {
+entry:
+ %tmp = load <16 x i8>* %A ; <<16 x i8>> [#uses=16]
+ %tmp.upgrd.19 = extractelement <16 x i8> %tmp, i32 8 ; <i8> [#uses=1]
+ %tmp3 = extractelement <16 x i8> %tmp, i32 8 ; <i8> [#uses=1]
+ %tmp4 = extractelement <16 x i8> %tmp, i32 9 ; <i8> [#uses=1]
+ %tmp5 = extractelement <16 x i8> %tmp, i32 9 ; <i8> [#uses=1]
+ %tmp6 = extractelement <16 x i8> %tmp, i32 10 ; <i8> [#uses=1]
+ %tmp7 = extractelement <16 x i8> %tmp, i32 10 ; <i8> [#uses=1]
+ %tmp8 = extractelement <16 x i8> %tmp, i32 11 ; <i8> [#uses=1]
+ %tmp9 = extractelement <16 x i8> %tmp, i32 11 ; <i8> [#uses=1]
+ %tmp10 = extractelement <16 x i8> %tmp, i32 12 ; <i8> [#uses=1]
+ %tmp11 = extractelement <16 x i8> %tmp, i32 12 ; <i8> [#uses=1]
+ %tmp12 = extractelement <16 x i8> %tmp, i32 13 ; <i8> [#uses=1]
+ %tmp13 = extractelement <16 x i8> %tmp, i32 13 ; <i8> [#uses=1]
+ %tmp14 = extractelement <16 x i8> %tmp, i32 14 ; <i8> [#uses=1]
+ %tmp15 = extractelement <16 x i8> %tmp, i32 14 ; <i8> [#uses=1]
+ %tmp16 = extractelement <16 x i8> %tmp, i32 15 ; <i8> [#uses=1]
+ %tmp17 = extractelement <16 x i8> %tmp, i32 15 ; <i8> [#uses=1]
+ %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.19, i32 0 ; <<16 x i8>> [#uses=1]
+ %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1]
+ %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp22 = insertelement <16 x i8> %tmp21, i8 %tmp6, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp23 = insertelement <16 x i8> %tmp22, i8 %tmp7, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp24 = insertelement <16 x i8> %tmp23, i8 %tmp8, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp26 = insertelement <16 x i8> %tmp25, i8 %tmp10, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp27 = insertelement <16 x i8> %tmp26, i8 %tmp11, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp29 = insertelement <16 x i8> %tmp28, i8 %tmp13, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp30 = insertelement <16 x i8> %tmp29, i8 %tmp14, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp31 = insertelement <16 x i8> %tmp30, i8 %tmp15, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp32 = insertelement <16 x i8> %tmp31, i8 %tmp16, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp33 = insertelement <16 x i8> %tmp32, i8 %tmp17, i32 15 ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp33, <16 x i8>* %A
+ ret void
+}
+
+define void @VMRG_UNARY_th_l(<8 x i16>* %A, <8 x i16>* %B) {
+entry:
+ %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=8]
+ %tmp.upgrd.20 = extractelement <8 x i16> %tmp, i32 4 ; <i16> [#uses=1]
+ %tmp3 = extractelement <8 x i16> %tmp, i32 4 ; <i16> [#uses=1]
+ %tmp4 = extractelement <8 x i16> %tmp, i32 5 ; <i16> [#uses=1]
+ %tmp5 = extractelement <8 x i16> %tmp, i32 5 ; <i16> [#uses=1]
+ %tmp6 = extractelement <8 x i16> %tmp, i32 6 ; <i16> [#uses=1]
+ %tmp7 = extractelement <8 x i16> %tmp, i32 6 ; <i16> [#uses=1]
+ %tmp8 = extractelement <8 x i16> %tmp, i32 7 ; <i16> [#uses=1]
+ %tmp9 = extractelement <8 x i16> %tmp, i32 7 ; <i16> [#uses=1]
+ %tmp10 = insertelement <8 x i16> undef, i16 %tmp.upgrd.20, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 1 ; <<8 x i16>> [#uses=1]
+ %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp4, i32 2 ; <<8 x i16>> [#uses=1]
+ %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp6, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp16 = insertelement <8 x i16> %tmp15, i16 %tmp8, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp17 = insertelement <8 x i16> %tmp16, i16 %tmp9, i32 7 ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp17, <8 x i16>* %A
+ ret void
+}
+
+define void @VMRG_UNARY_tw_l(<4 x i32>* %A, <4 x i32>* %B) {
+entry:
+ %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=4]
+ %tmp.upgrd.21 = extractelement <4 x i32> %tmp, i32 2 ; <i32> [#uses=1]
+ %tmp3 = extractelement <4 x i32> %tmp, i32 2 ; <i32> [#uses=1]
+ %tmp4 = extractelement <4 x i32> %tmp, i32 3 ; <i32> [#uses=1]
+ %tmp5 = extractelement <4 x i32> %tmp, i32 3 ; <i32> [#uses=1]
+ %tmp6 = insertelement <4 x i32> undef, i32 %tmp.upgrd.21, i32 0 ; <<4 x i32>> [#uses=1]
+ %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 1 ; <<4 x i32>> [#uses=1]
+ %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp5, i32 3 ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp9, <4 x i32>* %A
+ ret void
+}
+
+define void @VMRG_UNARY_tb_h(<16 x i8>* %A, <16 x i8>* %B) {
+entry:
+ %tmp = load <16 x i8>* %A ; <<16 x i8>> [#uses=16]
+ %tmp.upgrd.22 = extractelement <16 x i8> %tmp, i32 0 ; <i8> [#uses=1]
+ %tmp3 = extractelement <16 x i8> %tmp, i32 0 ; <i8> [#uses=1]
+ %tmp4 = extractelement <16 x i8> %tmp, i32 1 ; <i8> [#uses=1]
+ %tmp5 = extractelement <16 x i8> %tmp, i32 1 ; <i8> [#uses=1]
+ %tmp6 = extractelement <16 x i8> %tmp, i32 2 ; <i8> [#uses=1]
+ %tmp7 = extractelement <16 x i8> %tmp, i32 2 ; <i8> [#uses=1]
+ %tmp8 = extractelement <16 x i8> %tmp, i32 3 ; <i8> [#uses=1]
+ %tmp9 = extractelement <16 x i8> %tmp, i32 3 ; <i8> [#uses=1]
+ %tmp10 = extractelement <16 x i8> %tmp, i32 4 ; <i8> [#uses=1]
+ %tmp11 = extractelement <16 x i8> %tmp, i32 4 ; <i8> [#uses=1]
+ %tmp12 = extractelement <16 x i8> %tmp, i32 5 ; <i8> [#uses=1]
+ %tmp13 = extractelement <16 x i8> %tmp, i32 5 ; <i8> [#uses=1]
+ %tmp14 = extractelement <16 x i8> %tmp, i32 6 ; <i8> [#uses=1]
+ %tmp15 = extractelement <16 x i8> %tmp, i32 6 ; <i8> [#uses=1]
+ %tmp16 = extractelement <16 x i8> %tmp, i32 7 ; <i8> [#uses=1]
+ %tmp17 = extractelement <16 x i8> %tmp, i32 7 ; <i8> [#uses=1]
+ %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.22, i32 0 ; <<16 x i8>> [#uses=1]
+ %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1]
+ %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp22 = insertelement <16 x i8> %tmp21, i8 %tmp6, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp23 = insertelement <16 x i8> %tmp22, i8 %tmp7, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp24 = insertelement <16 x i8> %tmp23, i8 %tmp8, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp26 = insertelement <16 x i8> %tmp25, i8 %tmp10, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp27 = insertelement <16 x i8> %tmp26, i8 %tmp11, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp29 = insertelement <16 x i8> %tmp28, i8 %tmp13, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp30 = insertelement <16 x i8> %tmp29, i8 %tmp14, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp31 = insertelement <16 x i8> %tmp30, i8 %tmp15, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp32 = insertelement <16 x i8> %tmp31, i8 %tmp16, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp33 = insertelement <16 x i8> %tmp32, i8 %tmp17, i32 15 ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp33, <16 x i8>* %A
+ ret void
+}
+
+define void @VMRG_UNARY_th_h(<8 x i16>* %A, <8 x i16>* %B) {
+entry:
+ %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=8]
+ %tmp.upgrd.23 = extractelement <8 x i16> %tmp, i32 0 ; <i16> [#uses=1]
+ %tmp3 = extractelement <8 x i16> %tmp, i32 0 ; <i16> [#uses=1]
+ %tmp4 = extractelement <8 x i16> %tmp, i32 1 ; <i16> [#uses=1]
+ %tmp5 = extractelement <8 x i16> %tmp, i32 1 ; <i16> [#uses=1]
+ %tmp6 = extractelement <8 x i16> %tmp, i32 2 ; <i16> [#uses=1]
+ %tmp7 = extractelement <8 x i16> %tmp, i32 2 ; <i16> [#uses=1]
+ %tmp8 = extractelement <8 x i16> %tmp, i32 3 ; <i16> [#uses=1]
+ %tmp9 = extractelement <8 x i16> %tmp, i32 3 ; <i16> [#uses=1]
+ %tmp10 = insertelement <8 x i16> undef, i16 %tmp.upgrd.23, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 1 ; <<8 x i16>> [#uses=1]
+ %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp4, i32 2 ; <<8 x i16>> [#uses=1]
+ %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp6, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp16 = insertelement <8 x i16> %tmp15, i16 %tmp8, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp17 = insertelement <8 x i16> %tmp16, i16 %tmp9, i32 7 ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp17, <8 x i16>* %A
+ ret void
+}
+
+define void @VMRG_UNARY_tw_h(<4 x i32>* %A, <4 x i32>* %B) {
+entry:
+ %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=4]
+ %tmp.upgrd.24 = extractelement <4 x i32> %tmp, i32 0 ; <i32> [#uses=1]
+ %tmp3 = extractelement <4 x i32> %tmp, i32 0 ; <i32> [#uses=1]
+ %tmp4 = extractelement <4 x i32> %tmp, i32 1 ; <i32> [#uses=1]
+ %tmp5 = extractelement <4 x i32> %tmp, i32 1 ; <i32> [#uses=1]
+ %tmp6 = insertelement <4 x i32> undef, i32 %tmp.upgrd.24, i32 0 ; <<4 x i32>> [#uses=1]
+ %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 1 ; <<4 x i32>> [#uses=1]
+ %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp5, i32 3 ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp9, <4 x i32>* %A
+ ret void
+}
+
+define void @VPCKUHUM_unary(<8 x i16>* %A, <8 x i16>* %B) {
+entry:
+ %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=2]
+ %tmp.upgrd.25 = bitcast <8 x i16> %tmp to <16 x i8> ; <<16 x i8>> [#uses=8]
+ %tmp3 = bitcast <8 x i16> %tmp to <16 x i8> ; <<16 x i8>> [#uses=8]
+ %tmp.upgrd.26 = extractelement <16 x i8> %tmp.upgrd.25, i32 1 ; <i8> [#uses=1]
+ %tmp4 = extractelement <16 x i8> %tmp.upgrd.25, i32 3 ; <i8> [#uses=1]
+ %tmp5 = extractelement <16 x i8> %tmp.upgrd.25, i32 5 ; <i8> [#uses=1]
+ %tmp6 = extractelement <16 x i8> %tmp.upgrd.25, i32 7 ; <i8> [#uses=1]
+ %tmp7 = extractelement <16 x i8> %tmp.upgrd.25, i32 9 ; <i8> [#uses=1]
+ %tmp8 = extractelement <16 x i8> %tmp.upgrd.25, i32 11 ; <i8> [#uses=1]
+ %tmp9 = extractelement <16 x i8> %tmp.upgrd.25, i32 13 ; <i8> [#uses=1]
+ %tmp10 = extractelement <16 x i8> %tmp.upgrd.25, i32 15 ; <i8> [#uses=1]
+ %tmp11 = extractelement <16 x i8> %tmp3, i32 1 ; <i8> [#uses=1]
+ %tmp12 = extractelement <16 x i8> %tmp3, i32 3 ; <i8> [#uses=1]
+ %tmp13 = extractelement <16 x i8> %tmp3, i32 5 ; <i8> [#uses=1]
+ %tmp14 = extractelement <16 x i8> %tmp3, i32 7 ; <i8> [#uses=1]
+ %tmp15 = extractelement <16 x i8> %tmp3, i32 9 ; <i8> [#uses=1]
+ %tmp16 = extractelement <16 x i8> %tmp3, i32 11 ; <i8> [#uses=1]
+ %tmp17 = extractelement <16 x i8> %tmp3, i32 13 ; <i8> [#uses=1]
+ %tmp18 = extractelement <16 x i8> %tmp3, i32 15 ; <i8> [#uses=1]
+ %tmp19 = insertelement <16 x i8> undef, i8 %tmp.upgrd.26, i32 0 ; <<16 x i8>> [#uses=1]
+ %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 1 ; <<16 x i8>> [#uses=1]
+ %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp22 = insertelement <16 x i8> %tmp21, i8 %tmp6, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp23 = insertelement <16 x i8> %tmp22, i8 %tmp7, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp24 = insertelement <16 x i8> %tmp23, i8 %tmp8, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp26 = insertelement <16 x i8> %tmp25, i8 %tmp10, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp27 = insertelement <16 x i8> %tmp26, i8 %tmp11, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp29 = insertelement <16 x i8> %tmp28, i8 %tmp13, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp30 = insertelement <16 x i8> %tmp29, i8 %tmp14, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp31 = insertelement <16 x i8> %tmp30, i8 %tmp15, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp32 = insertelement <16 x i8> %tmp31, i8 %tmp16, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp33 = insertelement <16 x i8> %tmp32, i8 %tmp17, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp34 = insertelement <16 x i8> %tmp33, i8 %tmp18, i32 15 ; <<16 x i8>> [#uses=1]
+ %tmp34.upgrd.27 = bitcast <16 x i8> %tmp34 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp34.upgrd.27, <8 x i16>* %A
+ ret void
+}
+
+define void @VPCKUWUM_unary(<4 x i32>* %A, <4 x i32>* %B) {
+entry:
+ %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=2]
+ %tmp.upgrd.28 = bitcast <4 x i32> %tmp to <8 x i16> ; <<8 x i16>> [#uses=4]
+ %tmp3 = bitcast <4 x i32> %tmp to <8 x i16> ; <<8 x i16>> [#uses=4]
+ %tmp.upgrd.29 = extractelement <8 x i16> %tmp.upgrd.28, i32 1 ; <i16> [#uses=1]
+ %tmp4 = extractelement <8 x i16> %tmp.upgrd.28, i32 3 ; <i16> [#uses=1]
+ %tmp5 = extractelement <8 x i16> %tmp.upgrd.28, i32 5 ; <i16> [#uses=1]
+ %tmp6 = extractelement <8 x i16> %tmp.upgrd.28, i32 7 ; <i16> [#uses=1]
+ %tmp7 = extractelement <8 x i16> %tmp3, i32 1 ; <i16> [#uses=1]
+ %tmp8 = extractelement <8 x i16> %tmp3, i32 3 ; <i16> [#uses=1]
+ %tmp9 = extractelement <8 x i16> %tmp3, i32 5 ; <i16> [#uses=1]
+ %tmp10 = extractelement <8 x i16> %tmp3, i32 7 ; <i16> [#uses=1]
+ %tmp11 = insertelement <8 x i16> undef, i16 %tmp.upgrd.29, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp4, i32 1 ; <<8 x i16>> [#uses=1]
+ %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 2 ; <<8 x i16>> [#uses=1]
+ %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp6, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp16 = insertelement <8 x i16> %tmp15, i16 %tmp8, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp17 = insertelement <8 x i16> %tmp16, i16 %tmp9, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp18 = insertelement <8 x i16> %tmp17, i16 %tmp10, i32 7 ; <<8 x i16>> [#uses=1]
+ %tmp18.upgrd.30 = bitcast <8 x i16> %tmp18 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp18.upgrd.30, <4 x i32>* %A
+ ret void
+}
diff --git a/test/CodeGen/PowerPC/vec_splat.ll b/test/CodeGen/PowerPC/vec_splat.ll
new file mode 100644
index 0000000..6123728
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_splat.ll
@@ -0,0 +1,71 @@
+; Test that vectors are scalarized/lowered correctly.
+; RUN: llc < %s -march=ppc32 -mcpu=g3 | \
+; RUN: grep stfs | count 4
+; RUN: llc < %s -march=ppc32 -mcpu=g5 -o %t
+; RUN: grep vspltw %t | count 2
+; RUN: grep vsplti %t | count 3
+; RUN: grep vsplth %t | count 1
+
+ %f4 = type <4 x float>
+ %i4 = type <4 x i32>
+
+define void @splat(%f4* %P, %f4* %Q, float %X) nounwind {
+ %tmp = insertelement %f4 undef, float %X, i32 0 ; <%f4> [#uses=1]
+ %tmp2 = insertelement %f4 %tmp, float %X, i32 1 ; <%f4> [#uses=1]
+ %tmp4 = insertelement %f4 %tmp2, float %X, i32 2 ; <%f4> [#uses=1]
+ %tmp6 = insertelement %f4 %tmp4, float %X, i32 3 ; <%f4> [#uses=1]
+ %q = load %f4* %Q ; <%f4> [#uses=1]
+ %R = fadd %f4 %q, %tmp6 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %P
+ ret void
+}
+
+define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) nounwind {
+ %tmp = insertelement %i4 undef, i32 %X, i32 0 ; <%i4> [#uses=1]
+ %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 ; <%i4> [#uses=1]
+ %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 ; <%i4> [#uses=1]
+ %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1]
+ %q = load %i4* %Q ; <%i4> [#uses=1]
+ %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1]
+ store %i4 %R, %i4* %P
+ ret void
+}
+
+define void @splat_imm_i32(%i4* %P, %i4* %Q, i32 %X) nounwind {
+ %q = load %i4* %Q ; <%i4> [#uses=1]
+ %R = add %i4 %q, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <%i4> [#uses=1]
+ store %i4 %R, %i4* %P
+ ret void
+}
+
+define void @splat_imm_i16(%i4* %P, %i4* %Q, i32 %X) nounwind {
+ %q = load %i4* %Q ; <%i4> [#uses=1]
+ %R = add %i4 %q, < i32 65537, i32 65537, i32 65537, i32 65537 > ; <%i4> [#uses=1]
+ store %i4 %R, %i4* %P
+ ret void
+}
+
+define void @splat_h(i16 %tmp, <16 x i8>* %dst) nounwind {
+ %tmp.upgrd.1 = insertelement <8 x i16> undef, i16 %tmp, i32 0
+ %tmp72 = insertelement <8 x i16> %tmp.upgrd.1, i16 %tmp, i32 1
+ %tmp73 = insertelement <8 x i16> %tmp72, i16 %tmp, i32 2
+ %tmp74 = insertelement <8 x i16> %tmp73, i16 %tmp, i32 3
+ %tmp75 = insertelement <8 x i16> %tmp74, i16 %tmp, i32 4
+ %tmp76 = insertelement <8 x i16> %tmp75, i16 %tmp, i32 5
+ %tmp77 = insertelement <8 x i16> %tmp76, i16 %tmp, i32 6
+ %tmp78 = insertelement <8 x i16> %tmp77, i16 %tmp, i32 7
+ %tmp78.upgrd.2 = bitcast <8 x i16> %tmp78 to <16 x i8>
+ store <16 x i8> %tmp78.upgrd.2, <16 x i8>* %dst
+ ret void
+}
+
+define void @spltish(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+ %tmp = load <16 x i8>* %B ; <<16 x i8>> [#uses=1]
+ %tmp.s = bitcast <16 x i8> %tmp to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %tmp4 = sub <16 x i8> %tmp.s, bitcast (<8 x i16> < i16 15, i16 15, i16 15, i16 15, i16 15, i16
+ 15, i16 15, i16 15 > to <16 x i8>) ; <<16 x i8>> [#uses=1]
+ %tmp4.u = bitcast <16 x i8> %tmp4 to <16 x i8> ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp4.u, <16 x i8>* %A
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/vec_splat_constant.ll b/test/CodeGen/PowerPC/vec_splat_constant.ll
new file mode 100644
index 0000000..b227794
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_splat_constant.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 | FileCheck %s
+; Formerly incorrectly inserted vsldoi (endian confusion)
+
+@baz = common global <16 x i8> zeroinitializer ; <<16 x i8>*> [#uses=1]
+
+define void @foo(<16 x i8> %x) nounwind ssp {
+entry:
+; CHECK: _foo:
+; CHECK-NOT: vsldoi
+ %x_addr = alloca <16 x i8> ; <<16 x i8>*> [#uses=2]
+ %temp = alloca <16 x i8> ; <<16 x i8>*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store <16 x i8> %x, <16 x i8>* %x_addr
+ store <16 x i8> <i8 0, i8 0, i8 0, i8 14, i8 0, i8 0, i8 0, i8 14, i8 0, i8 0, i8 0, i8 14, i8 0, i8 0, i8 0, i8 14>, <16 x i8>* %temp, align 16
+ %0 = load <16 x i8>* %x_addr, align 16 ; <<16 x i8>> [#uses=1]
+ %1 = load <16 x i8>* %temp, align 16 ; <<16 x i8>> [#uses=1]
+ %tmp = add <16 x i8> %0, %1 ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp, <16 x i8>* @baz, align 16
+ br label %return
+
+return: ; preds = %entry
+ ret void
+; CHECK: blr
+}
diff --git a/test/CodeGen/PowerPC/vec_vrsave.ll b/test/CodeGen/PowerPC/vec_vrsave.ll
new file mode 100644
index 0000000..2a03d58
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_vrsave.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 -o %t
+; RUN: grep vrlw %t
+; RUN: not grep spr %t
+; RUN: not grep vrsave %t
+
+define <4 x i32> @test_rol() {
+ ret <4 x i32> < i32 -11534337, i32 -11534337, i32 -11534337, i32 -11534337 >
+}
+
+define <4 x i32> @test_arg(<4 x i32> %A, <4 x i32> %B) {
+ %C = add <4 x i32> %A, %B ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %C
+}
+
diff --git a/test/CodeGen/PowerPC/vec_zero.ll b/test/CodeGen/PowerPC/vec_zero.ll
new file mode 100644
index 0000000..f862b2c
--- /dev/null
+++ b/test/CodeGen/PowerPC/vec_zero.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vxor
+
+define void @foo(<4 x float>* %P) {
+ %T = load <4 x float>* %P ; <<4 x float>> [#uses=1]
+ %S = fadd <4 x float> zeroinitializer, %T ; <<4 x float>> [#uses=1]
+ store <4 x float> %S, <4 x float>* %P
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/vector-identity-shuffle.ll b/test/CodeGen/PowerPC/vector-identity-shuffle.ll
new file mode 100644
index 0000000..dfa2e35
--- /dev/null
+++ b/test/CodeGen/PowerPC/vector-identity-shuffle.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep test:
+; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep vperm
+
+define void @test(<4 x float>* %tmp2.i) {
+ %tmp2.i.upgrd.1 = load <4 x float>* %tmp2.i ; <<4 x float>> [#uses=4]
+ %xFloat0.48 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 0 ; <float> [#uses=1]
+ %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, i32 0 ; <<4 x float>> [#uses=1]
+ %xFloat1.50 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 1 ; <float> [#uses=1]
+ %inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, i32 1 ; <<4 x float>> [#uses=1]
+ %xFloat2.53 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 2 ; <float> [#uses=1]
+ %inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, i32 2 ; <<4 x float>> [#uses=1]
+ %xFloat3.56 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 3 ; <float> [#uses=1]
+ %inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, i32 3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %inFloat3.58, <4 x float>* %tmp2.i
+ ret void
+}
+
diff --git a/test/CodeGen/PowerPC/vector.ll b/test/CodeGen/PowerPC/vector.ll
new file mode 100644
index 0000000..ee4da31
--- /dev/null
+++ b/test/CodeGen/PowerPC/vector.ll
@@ -0,0 +1,158 @@
+; Test that vectors are scalarized/lowered correctly.
+; RUN: llc < %s -march=ppc32 -mcpu=g5 > %t
+; RUN: llc < %s -march=ppc32 -mcpu=g3 > %t
+
+%d8 = type <8 x double>
+%f1 = type <1 x float>
+%f2 = type <2 x float>
+%f4 = type <4 x float>
+%f8 = type <8 x float>
+%i4 = type <4 x i32>
+
+;;; TEST HANDLING OF VARIOUS VECTOR SIZES
+
+define void @test_f1(%f1* %P, %f1* %Q, %f1* %S) {
+ %p = load %f1* %P ; <%f1> [#uses=1]
+ %q = load %f1* %Q ; <%f1> [#uses=1]
+ %R = fadd %f1 %p, %q ; <%f1> [#uses=1]
+ store %f1 %R, %f1* %S
+ ret void
+}
+
+define void @test_f2(%f2* %P, %f2* %Q, %f2* %S) {
+ %p = load %f2* %P ; <%f2> [#uses=1]
+ %q = load %f2* %Q ; <%f2> [#uses=1]
+ %R = fadd %f2 %p, %q ; <%f2> [#uses=1]
+ store %f2 %R, %f2* %S
+ ret void
+}
+
+define void @test_f4(%f4* %P, %f4* %Q, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %q = load %f4* %Q ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, %q ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+define void @test_div(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fdiv %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+;;; TEST VECTOR CONSTRUCTS
+
+define void @test_cst(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float
+ 2.000000e+00, float 4.500000e+00 > ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_zero(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, zeroinitializer ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_undef(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, undef ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_constant_insert(%f4* %S) {
+ %R = insertelement %f4 zeroinitializer, float 1.000000e+01, i32 0
+ ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_variable_buildvector(float %F, %f4* %S) {
+ %R = insertelement %f4 zeroinitializer, float %F, i32 0
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_scalar_to_vector(float %F, %f4* %S) {
+ %R = insertelement %f4 undef, float %F, i32 0
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define float @test_extract_elt(%f8* %P) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %R = extractelement %f8 %p, i32 3 ; <float> [#uses=1]
+ ret float %R
+}
+
+define double @test_extract_elt2(%d8* %P) {
+ %p = load %d8* %P ; <%d8> [#uses=1]
+ %R = extractelement %d8 %p, i32 3 ; <double> [#uses=1]
+ ret double %R
+}
+
+define void @test_cast_1(%f4* %b, %i4* %a) {
+ %tmp = load %f4* %b ; <%f4> [#uses=1]
+ %tmp2 = fadd %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float
+3.000000e+00, float 4.000000e+00 > ; <%f4> [#uses=1]
+ %tmp3 = bitcast %f4 %tmp2 to %i4 ; <%i4> [#uses=1]
+ %tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 >
+ store %i4 %tmp4, %i4* %a
+ ret void
+}
+
+define void @test_cast_2(%f8* %a, <8 x i32>* %b) {
+ %T = load %f8* %a ; <%f8> [#uses=1]
+ %T2 = bitcast %f8 %T to <8 x i32>
+ store <8 x i32> %T2, <8 x i32>* %b
+ ret void
+}
+
+
+;;; TEST IMPORTANT IDIOMS
+
+define void @splat(%f4* %P, %f4* %Q, float %X) {
+ %tmp = insertelement %f4 undef, float %X, i32 0
+ %tmp2 = insertelement %f4 %tmp, float %X, i32 1
+ %tmp4 = insertelement %f4 %tmp2, float %X, i32 2
+ %tmp6 = insertelement %f4 %tmp4, float %X, i32 3
+ %q = load %f4* %Q ; <%f4> [#uses=1]
+ %R = fadd %f4 %q, %tmp6 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %P
+ ret void
+}
+
+define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) {
+ %tmp = insertelement %i4 undef, i32 %X, i32 0
+ %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1
+ %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2
+ %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3
+ %q = load %i4* %Q ; <%i4> [#uses=1]
+ %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1]
+ store %i4 %R, %i4* %P
+ ret void
+}
+
diff --git a/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll b/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll
new file mode 100644
index 0000000..082f9f4
--- /dev/null
+++ b/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=sparc
+
+define void @execute_list() {
+ %tmp.33.i = fdiv float 0.000000e+00, 0.000000e+00 ; <float> [#uses=1]
+ %tmp.37.i = fmul float 0.000000e+00, %tmp.33.i ; <float> [#uses=1]
+ %tmp.42.i = fadd float %tmp.37.i, 0.000000e+00 ; <float> [#uses=1]
+ call void @gl_EvalCoord1f( float %tmp.42.i )
+ ret void
+}
+
+declare void @gl_EvalCoord1f(float)
+
diff --git a/test/CodeGen/SPARC/2007-05-09-JumpTables.ll b/test/CodeGen/SPARC/2007-05-09-JumpTables.ll
new file mode 100644
index 0000000..41ad3b2
--- /dev/null
+++ b/test/CodeGen/SPARC/2007-05-09-JumpTables.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=sparc
+
+; We cannot emit jump tables on Sparc, but we should correctly handle this case.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+
+define i32 @foo(i32 %f) {
+entry:
+ switch i32 %f, label %bb14 [
+ i32 0, label %UnifiedReturnBlock
+ i32 1, label %bb4
+ i32 2, label %bb7
+ i32 3, label %bb10
+ ]
+
+bb4: ; preds = %entry
+ ret i32 2
+
+bb7: ; preds = %entry
+ ret i32 5
+
+bb10: ; preds = %entry
+ ret i32 9
+
+bb14: ; preds = %entry
+ ret i32 0
+
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 1
+}
diff --git a/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll b/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll
new file mode 100644
index 0000000..77c2002
--- /dev/null
+++ b/test/CodeGen/SPARC/2007-07-05-LiveIntervalAssert.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=sparc
+; PR1540
+
+declare float @sinf(float)
+declare double @sin(double)
+define double @test_sin(float %F) {
+ %G = call float @sinf( float %F ) ; <float> [#uses=1]
+ %H = fpext float %G to double ; <double> [#uses=1]
+ %I = call double @sin( double %H ) ; <double> [#uses=1]
+ ret double %I
+}
diff --git a/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll b/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll
new file mode 100644
index 0000000..e8315f1
--- /dev/null
+++ b/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=sparc
+; PR 1557
+
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
[email protected]_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @set_fast_math } ] ; <[1 x { i32, void ()* }]*> [#uses=0]
+
+define internal void @set_fast_math() nounwind {
+entry:
+ %fsr = alloca i32 ; <i32*> [#uses=4]
+ call void asm "st %fsr, $0", "=*m"(i32* %fsr) nounwind
+ %0 = load i32* %fsr, align 4 ; <i32> [#uses=1]
+ %1 = or i32 %0, 4194304 ; <i32> [#uses=1]
+ store i32 %1, i32* %fsr, align 4
+ call void asm sideeffect "ld $0, %fsr", "*m"(i32* %fsr) nounwind
+ ret void
+}
diff --git a/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll b/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
new file mode 100644
index 0000000..c12e9c1
--- /dev/null
+++ b/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=sparc
+; PR 1557
+
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
+module asm "\09.section\09\22.ctors\22,#alloc,#write"
+module asm "\09.section\09\22.dtors\22,#alloc,#write"
+
+define void @frame_dummy() nounwind {
+entry:
+ %asmtmp = tail call void (i8*)* (void (i8*)*)* asm "", "=r,0"(void (i8*)* @_Jv_RegisterClasses) nounwind ; <void (i8*)*> [#uses=0]
+ unreachable
+}
+
+declare void @_Jv_RegisterClasses(i8*)
diff --git a/test/CodeGen/SPARC/2009-08-28-PIC.ll b/test/CodeGen/SPARC/2009-08-28-PIC.ll
new file mode 100644
index 0000000..a2ba0d0
--- /dev/null
+++ b/test/CodeGen/SPARC/2009-08-28-PIC.ll
@@ -0,0 +1,9 @@
+; RUN: llc -march=sparc --relocation-model=pic < %s | grep _GLOBAL_OFFSET_TABLE_
+
+@foo = global i32 0 ; <i32*> [#uses=1]
+
+define i32 @func() nounwind readonly {
+entry:
+ %0 = load i32* @foo, align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/SPARC/2009-08-28-WeakLinkage.ll b/test/CodeGen/SPARC/2009-08-28-WeakLinkage.ll
new file mode 100644
index 0000000..0167d32
--- /dev/null
+++ b/test/CodeGen/SPARC/2009-08-28-WeakLinkage.ll
@@ -0,0 +1,6 @@
+; RUN: llc -march=sparc < %s | grep weak
+
+define weak i32 @func() nounwind {
+entry:
+ ret i32 0
+}
diff --git a/test/CodeGen/SPARC/basictest.ll b/test/CodeGen/SPARC/basictest.ll
new file mode 100644
index 0000000..9c2c16a
--- /dev/null
+++ b/test/CodeGen/SPARC/basictest.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=sparc
+
+define i32 @test(i32 %X) {
+ %tmp.1 = add i32 %X, 1
+ ret i32 %tmp.1
+}
diff --git a/test/CodeGen/SPARC/ctpop.ll b/test/CodeGen/SPARC/ctpop.ll
new file mode 100644
index 0000000..e56f494
--- /dev/null
+++ b/test/CodeGen/SPARC/ctpop.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=sparc -mattr=-v9 | not grep popc
+; RUN: llc < %s -march=sparcv9 -mattr=v9 | grep popc
+
+declare i32 @llvm.ctpop.i32(i32)
+
+define i32 @test(i32 %X) {
+ %Y = call i32 @llvm.ctpop.i32( i32 %X ) ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/CodeGen/SPARC/dg.exp b/test/CodeGen/SPARC/dg.exp
new file mode 100644
index 0000000..6c0a997
--- /dev/null
+++ b/test/CodeGen/SPARC/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target Sparc] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/SPARC/private.ll b/test/CodeGen/SPARC/private.ll
new file mode 100644
index 0000000..f091aa6
--- /dev/null
+++ b/test/CodeGen/SPARC/private.ll
@@ -0,0 +1,21 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llc < %s -march=sparc > %t
+; RUN: grep .foo: %t
+; RUN: grep call.*\.foo %t
+; RUN: grep .baz: %t
+; RUN: grep ld.*\.baz %t
+
+declare void @foo()
+
+define private void @foo() {
+ ret void
+}
+
+@baz = private global i32 4
+
+define i32 @bar() {
+ call void @foo()
+ %1 = load i32* @baz, align 4
+ ret i32 %1
+}
diff --git a/test/CodeGen/SPARC/xnor.ll b/test/CodeGen/SPARC/xnor.ll
new file mode 100644
index 0000000..6ff66bd
--- /dev/null
+++ b/test/CodeGen/SPARC/xnor.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=sparc | \
+; RUN: grep xnor | count 2
+
+define i32 @test1(i32 %X, i32 %Y) {
+ %A = xor i32 %X, %Y ; <i32> [#uses=1]
+ %B = xor i32 %A, -1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test2(i32 %X, i32 %Y) {
+ %A = xor i32 %X, -1 ; <i32> [#uses=1]
+ %B = xor i32 %A, %Y ; <i32> [#uses=1]
+ ret i32 %B
+}
+
diff --git a/test/CodeGen/SystemZ/00-RetVoid.ll b/test/CodeGen/SystemZ/00-RetVoid.ll
new file mode 100644
index 0000000..de23795
--- /dev/null
+++ b/test/CodeGen/SystemZ/00-RetVoid.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=systemz
+
+define void @foo() {
+entry:
+ ret void
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/01-RetArg.ll b/test/CodeGen/SystemZ/01-RetArg.ll
new file mode 100644
index 0000000..9ab2097
--- /dev/null
+++ b/test/CodeGen/SystemZ/01-RetArg.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=systemz
+
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ ret i64 %b
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/01-RetImm.ll b/test/CodeGen/SystemZ/01-RetImm.ll
new file mode 100644
index 0000000..8b99e68
--- /dev/null
+++ b/test/CodeGen/SystemZ/01-RetImm.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=systemz | grep lghi | count 1
+; RUN: llc < %s -march=systemz | grep llill | count 1
+; RUN: llc < %s -march=systemz | grep llilh | count 1
+; RUN: llc < %s -march=systemz | grep llihl | count 1
+; RUN: llc < %s -march=systemz | grep llihh | count 1
+; RUN: llc < %s -march=systemz | grep lgfi | count 1
+; RUN: llc < %s -march=systemz | grep llilf | count 1
+; RUN: llc < %s -march=systemz | grep llihf | count 1
+
+
+define i64 @foo1() {
+entry:
+ ret i64 1
+}
+
+define i64 @foo2() {
+entry:
+ ret i64 65535
+}
+
+define i64 @foo3() {
+entry:
+ ret i64 131072
+}
+
+define i64 @foo4() {
+entry:
+ ret i64 8589934592
+}
+
+define i64 @foo5() {
+entry:
+ ret i64 562949953421312
+}
+
+define i64 @foo6() {
+entry:
+ ret i64 65537
+}
+
+define i64 @foo7() {
+entry:
+ ret i64 4294967295
+}
+
+define i64 @foo8() {
+entry:
+ ret i64 281483566645248
+}
diff --git a/test/CodeGen/SystemZ/02-MemArith.ll b/test/CodeGen/SystemZ/02-MemArith.ll
new file mode 100644
index 0000000..04022a0
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-MemArith.ll
@@ -0,0 +1,133 @@
+; RUN: llc < %s -march=systemz | FileCheck %s
+
+define i32 @foo1(i32 %a, i32 *%b, i64 %idx) signext {
+; CHECK: foo1:
+; CHECK: a %r2, 4(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, 1 ; <i64> [#uses=1]
+ %ptr = getelementptr i32* %b, i64 %idx2 ; <i32*> [#uses=1]
+ %c = load i32* %ptr
+ %d = add i32 %a, %c
+ ret i32 %d
+}
+
+define i32 @foo2(i32 %a, i32 *%b, i64 %idx) signext {
+; CHECK: foo2:
+; CHECK: ay %r2, -4(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, -1 ; <i64> [#uses=1]
+ %ptr = getelementptr i32* %b, i64 %idx2 ; <i32*> [#uses=1]
+ %c = load i32* %ptr
+ %d = add i32 %a, %c
+ ret i32 %d
+}
+
+define i64 @foo3(i64 %a, i64 *%b, i64 %idx) signext {
+; CHECK: foo3:
+; CHECK: ag %r2, 8(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, 1 ; <i64> [#uses=1]
+ %ptr = getelementptr i64* %b, i64 %idx2 ; <i64*> [#uses=1]
+ %c = load i64* %ptr
+ %d = add i64 %a, %c
+ ret i64 %d
+}
+
+define i32 @foo4(i32 %a, i32 *%b, i64 %idx) signext {
+; CHECK: foo4:
+; CHECK: n %r2, 4(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, 1 ; <i64> [#uses=1]
+ %ptr = getelementptr i32* %b, i64 %idx2 ; <i32*> [#uses=1]
+ %c = load i32* %ptr
+ %d = and i32 %a, %c
+ ret i32 %d
+}
+
+define i32 @foo5(i32 %a, i32 *%b, i64 %idx) signext {
+; CHECK: foo5:
+; CHECK: ny %r2, -4(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, -1 ; <i64> [#uses=1]
+ %ptr = getelementptr i32* %b, i64 %idx2 ; <i32*> [#uses=1]
+ %c = load i32* %ptr
+ %d = and i32 %a, %c
+ ret i32 %d
+}
+
+define i64 @foo6(i64 %a, i64 *%b, i64 %idx) signext {
+; CHECK: foo6:
+; CHECK: ng %r2, 8(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, 1 ; <i64> [#uses=1]
+ %ptr = getelementptr i64* %b, i64 %idx2 ; <i64*> [#uses=1]
+ %c = load i64* %ptr
+ %d = and i64 %a, %c
+ ret i64 %d
+}
+
+define i32 @foo7(i32 %a, i32 *%b, i64 %idx) signext {
+; CHECK: foo7:
+; CHECK: o %r2, 4(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, 1 ; <i64> [#uses=1]
+ %ptr = getelementptr i32* %b, i64 %idx2 ; <i32*> [#uses=1]
+ %c = load i32* %ptr
+ %d = or i32 %a, %c
+ ret i32 %d
+}
+
+define i32 @foo8(i32 %a, i32 *%b, i64 %idx) signext {
+; CHECK: foo8:
+; CHECK: oy %r2, -4(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, -1 ; <i64> [#uses=1]
+ %ptr = getelementptr i32* %b, i64 %idx2 ; <i32*> [#uses=1]
+ %c = load i32* %ptr
+ %d = or i32 %a, %c
+ ret i32 %d
+}
+
+define i64 @foo9(i64 %a, i64 *%b, i64 %idx) signext {
+; CHECK: foo9:
+; CHECK: og %r2, 8(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, 1 ; <i64> [#uses=1]
+ %ptr = getelementptr i64* %b, i64 %idx2 ; <i64*> [#uses=1]
+ %c = load i64* %ptr
+ %d = or i64 %a, %c
+ ret i64 %d
+}
+
+define i32 @foo10(i32 %a, i32 *%b, i64 %idx) signext {
+; CHECK: foo10:
+; CHECK: x %r2, 4(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, 1 ; <i64> [#uses=1]
+ %ptr = getelementptr i32* %b, i64 %idx2 ; <i32*> [#uses=1]
+ %c = load i32* %ptr
+ %d = xor i32 %a, %c
+ ret i32 %d
+}
+
+define i32 @foo11(i32 %a, i32 *%b, i64 %idx) signext {
+; CHECK: foo11:
+; CHECK: xy %r2, -4(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, -1 ; <i64> [#uses=1]
+ %ptr = getelementptr i32* %b, i64 %idx2 ; <i32*> [#uses=1]
+ %c = load i32* %ptr
+ %d = xor i32 %a, %c
+ ret i32 %d
+}
+
+define i64 @foo12(i64 %a, i64 *%b, i64 %idx) signext {
+; CHECK: foo12:
+; CHECK: xg %r2, 8(%r1,%r3)
+entry:
+ %idx2 = add i64 %idx, 1 ; <i64> [#uses=1]
+ %ptr = getelementptr i64* %b, i64 %idx2 ; <i64*> [#uses=1]
+ %c = load i64* %ptr
+ %d = xor i64 %a, %c
+ ret i64 %d
+}
diff --git a/test/CodeGen/SystemZ/02-RetAdd.ll b/test/CodeGen/SystemZ/02-RetAdd.ll
new file mode 100644
index 0000000..9ff9b6a
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetAdd.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=systemz
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = add i64 %a, %b
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetAddImm.ll b/test/CodeGen/SystemZ/02-RetAddImm.ll
new file mode 100644
index 0000000..6d73e4d
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetAddImm.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=systemz
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = add i64 %a, 1
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetAnd.ll b/test/CodeGen/SystemZ/02-RetAnd.ll
new file mode 100644
index 0000000..1492f9d
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetAnd.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=systemz
+
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = and i64 %a, %b
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetAndImm.ll b/test/CodeGen/SystemZ/02-RetAndImm.ll
new file mode 100644
index 0000000..53c5e54
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetAndImm.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=systemz | grep ngr | count 4
+; RUN: llc < %s -march=systemz | grep llilh | count 1
+; RUN: llc < %s -march=systemz | grep llihl | count 1
+; RUN: llc < %s -march=systemz | grep llihh | count 1
+
+define i64 @foo1(i64 %a, i64 %b) {
+entry:
+ %c = and i64 %a, 1
+ ret i64 %c
+}
+
+define i64 @foo2(i64 %a, i64 %b) {
+entry:
+ %c = and i64 %a, 131072
+ ret i64 %c
+}
+
+define i64 @foo3(i64 %a, i64 %b) {
+entry:
+ %c = and i64 %a, 8589934592
+ ret i64 %c
+}
+
+define i64 @foo4(i64 %a, i64 %b) {
+entry:
+ %c = and i64 %a, 562949953421312
+ ret i64 %c
+}
diff --git a/test/CodeGen/SystemZ/02-RetNeg.ll b/test/CodeGen/SystemZ/02-RetNeg.ll
new file mode 100644
index 0000000..7f3380d
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetNeg.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=systemz | grep lcgr | count 1
+
+define i64 @foo(i64 %a) {
+entry:
+ %c = sub i64 0, %a
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetOr.ll b/test/CodeGen/SystemZ/02-RetOr.ll
new file mode 100644
index 0000000..1e8134d
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetOr.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=systemz
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = or i64 %a, %b
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetOrImm.ll b/test/CodeGen/SystemZ/02-RetOrImm.ll
new file mode 100644
index 0000000..68cd24d
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetOrImm.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=systemz | grep oill | count 1
+; RUN: llc < %s -march=systemz | grep oilh | count 1
+; RUN: llc < %s -march=systemz | grep oihl | count 1
+; RUN: llc < %s -march=systemz | grep oihh | count 1
+
+define i64 @foo1(i64 %a, i64 %b) {
+entry:
+ %c = or i64 %a, 1
+ ret i64 %c
+}
+
+define i64 @foo2(i64 %a, i64 %b) {
+entry:
+ %c = or i64 %a, 131072
+ ret i64 %c
+}
+
+define i64 @foo3(i64 %a, i64 %b) {
+entry:
+ %c = or i64 %a, 8589934592
+ ret i64 %c
+}
+
+define i64 @foo4(i64 %a, i64 %b) {
+entry:
+ %c = or i64 %a, 562949953421312
+ ret i64 %c
+}
diff --git a/test/CodeGen/SystemZ/02-RetSub.ll b/test/CodeGen/SystemZ/02-RetSub.ll
new file mode 100644
index 0000000..1c4514f
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetSub.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=systemz
+
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = sub i64 %a, %b
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetSubImm.ll b/test/CodeGen/SystemZ/02-RetSubImm.ll
new file mode 100644
index 0000000..4f91cb0
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetSubImm.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=systemz
+
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = sub i64 %a, 1
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetXor.ll b/test/CodeGen/SystemZ/02-RetXor.ll
new file mode 100644
index 0000000..a9439bf
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetXor.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=systemz
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = xor i64 %a, %b
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetXorImm.ll b/test/CodeGen/SystemZ/02-RetXorImm.ll
new file mode 100644
index 0000000..ea4b829
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetXorImm.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=systemz
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = xor i64 %a, 1
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/03-RetAddImmSubreg.ll b/test/CodeGen/SystemZ/03-RetAddImmSubreg.ll
new file mode 100644
index 0000000..0a81271
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetAddImmSubreg.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=systemz | grep ahi | count 3
+; RUN: llc < %s -march=systemz | grep afi | count 3
+; RUN: llc < %s -march=systemz | grep lgfr | count 4
+; RUN: llc < %s -march=systemz | grep llgfr | count 2
+
+
+define i32 @foo1(i32 %a, i32 %b) {
+entry:
+ %c = add i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) {
+entry:
+ %c = add i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo3(i32 %a, i32 %b) zeroext {
+entry:
+ %c = add i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo4(i32 %a, i32 %b) zeroext {
+entry:
+ %c = add i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo5(i32 %a, i32 %b) signext {
+entry:
+ %c = add i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo6(i32 %a, i32 %b) signext {
+entry:
+ %c = add i32 %a, 131072
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetAddSubreg.ll b/test/CodeGen/SystemZ/03-RetAddSubreg.ll
new file mode 100644
index 0000000..2787083
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetAddSubreg.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=systemz | grep ar | count 3
+; RUN: llc < %s -march=systemz | grep lgfr | count 2
+; RUN: llc < %s -march=systemz | grep llgfr | count 1
+
+define i32 @foo(i32 %a, i32 %b) {
+entry:
+ %c = add i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo1(i32 %a, i32 %b) zeroext {
+entry:
+ %c = add i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) signext {
+entry:
+ %c = add i32 %a, %b
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetAndImmSubreg.ll b/test/CodeGen/SystemZ/03-RetAndImmSubreg.ll
new file mode 100644
index 0000000..32673dd
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetAndImmSubreg.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=systemz | grep ngr | count 6
+
+define i32 @foo1(i32 %a, i32 %b) {
+entry:
+ %c = and i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) {
+entry:
+ %c = and i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo3(i32 %a, i32 %b) zeroext {
+entry:
+ %c = and i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo4(i32 %a, i32 %b) signext {
+entry:
+ %c = and i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo5(i32 %a, i32 %b) zeroext {
+entry:
+ %c = and i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo6(i32 %a, i32 %b) signext {
+entry:
+ %c = and i32 %a, 131072
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetAndSubreg.ll b/test/CodeGen/SystemZ/03-RetAndSubreg.ll
new file mode 100644
index 0000000..ed5e526
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetAndSubreg.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=systemz | grep ngr | count 3
+; RUN: llc < %s -march=systemz | grep nihf | count 1
+
+define i32 @foo(i32 %a, i32 %b) {
+entry:
+ %c = and i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo1(i32 %a, i32 %b) zeroext {
+entry:
+ %c = and i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) signext {
+entry:
+ %c = and i32 %a, %b
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetArgSubreg.ll b/test/CodeGen/SystemZ/03-RetArgSubreg.ll
new file mode 100644
index 0000000..0c9bb14
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetArgSubreg.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=systemz | grep lgr | count 2
+; RUN: llc < %s -march=systemz | grep nihf | count 1
+; RUN: llc < %s -march=systemz | grep lgfr | count 1
+
+
+define i32 @foo(i32 %a, i32 %b) {
+entry:
+ ret i32 %b
+}
+
+define i32 @foo1(i32 %a, i32 %b) zeroext {
+entry:
+ ret i32 %b
+}
+
+define i32 @foo2(i32 %a, i32 %b) signext {
+entry:
+ ret i32 %b
+}
diff --git a/test/CodeGen/SystemZ/03-RetImmSubreg.ll b/test/CodeGen/SystemZ/03-RetImmSubreg.ll
new file mode 100644
index 0000000..343e30b
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetImmSubreg.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=systemz | grep lghi | count 2
+; RUN: llc < %s -march=systemz | grep llill | count 1
+; RUN: llc < %s -march=systemz | grep llilh | count 1
+; RUN: llc < %s -march=systemz | grep lgfi | count 1
+; RUN: llc < %s -march=systemz | grep llilf | count 2
+
+
+define i32 @foo1() {
+entry:
+ ret i32 1
+}
+
+define i32 @foo2() {
+entry:
+ ret i32 65535
+}
+
+define i32 @foo3() {
+entry:
+ ret i32 131072
+}
+
+define i32 @foo4() {
+entry:
+ ret i32 65537
+}
+
+define i32 @foo5() {
+entry:
+ ret i32 4294967295
+}
+
+define i32 @foo6() zeroext {
+entry:
+ ret i32 4294967295
+}
+
+define i32 @foo7() signext {
+entry:
+ ret i32 4294967295
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetNegImmSubreg.ll b/test/CodeGen/SystemZ/03-RetNegImmSubreg.ll
new file mode 100644
index 0000000..87ebcc1
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetNegImmSubreg.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=systemz | grep lcr | count 1
+
+define i32 @foo(i32 %a) {
+entry:
+ %c = sub i32 0, %a
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetOrImmSubreg.ll b/test/CodeGen/SystemZ/03-RetOrImmSubreg.ll
new file mode 100644
index 0000000..6d118b5
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetOrImmSubreg.ll
@@ -0,0 +1,60 @@
+; RUN: llc < %s -march=systemz | grep oill | count 3
+; RUN: llc < %s -march=systemz | grep oilh | count 3
+; RUN: llc < %s -march=systemz | grep oilf | count 3
+; RUN: llc < %s -march=systemz | grep llgfr | count 3
+; RUN: llc < %s -march=systemz | grep lgfr | count 6
+
+define i32 @foo1(i32 %a, i32 %b) {
+entry:
+ %c = or i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) {
+entry:
+ %c = or i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo7(i32 %a, i32 %b) {
+entry:
+ %c = or i32 %a, 123456
+ ret i32 %c
+}
+
+define i32 @foo3(i32 %a, i32 %b) zeroext {
+entry:
+ %c = or i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo8(i32 %a, i32 %b) zeroext {
+entry:
+ %c = or i32 %a, 123456
+ ret i32 %c
+}
+
+define i32 @foo4(i32 %a, i32 %b) signext {
+entry:
+ %c = or i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo5(i32 %a, i32 %b) zeroext {
+entry:
+ %c = or i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo6(i32 %a, i32 %b) signext {
+entry:
+ %c = or i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo9(i32 %a, i32 %b) signext {
+entry:
+ %c = or i32 %a, 123456
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetOrSubreg.ll b/test/CodeGen/SystemZ/03-RetOrSubreg.ll
new file mode 100644
index 0000000..4d7661a
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetOrSubreg.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=systemz | grep ogr | count 3
+; RUN: llc < %s -march=systemz | grep nihf | count 1
+; RUN: llc < %s -march=systemz | grep lgfr | count 1
+
+
+define i32 @foo(i32 %a, i32 %b) {
+entry:
+ %c = or i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo1(i32 %a, i32 %b) zeroext {
+entry:
+ %c = or i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) signext {
+entry:
+ %c = or i32 %a, %b
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetSubImmSubreg.ll b/test/CodeGen/SystemZ/03-RetSubImmSubreg.ll
new file mode 100644
index 0000000..11ca796
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetSubImmSubreg.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=systemz | grep ahi | count 3
+; RUN: llc < %s -march=systemz | grep afi | count 3
+; RUN: llc < %s -march=systemz | grep lgfr | count 4
+; RUN: llc < %s -march=systemz | grep llgfr | count 2
+
+
+define i32 @foo1(i32 %a, i32 %b) {
+entry:
+ %c = sub i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) {
+entry:
+ %c = sub i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo3(i32 %a, i32 %b) zeroext {
+entry:
+ %c = sub i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo4(i32 %a, i32 %b) signext {
+entry:
+ %c = sub i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo5(i32 %a, i32 %b) zeroext {
+entry:
+ %c = sub i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo6(i32 %a, i32 %b) signext {
+entry:
+ %c = sub i32 %a, 131072
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetSubSubreg.ll b/test/CodeGen/SystemZ/03-RetSubSubreg.ll
new file mode 100644
index 0000000..b3e1ac2
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetSubSubreg.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=systemz | grep sr | count 3
+; RUN: llc < %s -march=systemz | grep llgfr | count 1
+; RUN: llc < %s -march=systemz | grep lgfr | count 2
+
+define i32 @foo(i32 %a, i32 %b) {
+entry:
+ %c = sub i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo1(i32 %a, i32 %b) zeroext {
+entry:
+ %c = sub i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) signext {
+entry:
+ %c = sub i32 %a, %b
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetXorImmSubreg.ll b/test/CodeGen/SystemZ/03-RetXorImmSubreg.ll
new file mode 100644
index 0000000..0033126
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetXorImmSubreg.ll
@@ -0,0 +1,58 @@
+; RUN: llc < %s -march=systemz | grep xilf | count 9
+; RUN: llc < %s -march=systemz | grep llgfr | count 3
+; RUN: llc < %s -march=systemz | grep lgfr | count 6
+
+define i32 @foo1(i32 %a, i32 %b) {
+entry:
+ %c = xor i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) {
+entry:
+ %c = xor i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo7(i32 %a, i32 %b) {
+entry:
+ %c = xor i32 %a, 123456
+ ret i32 %c
+}
+
+define i32 @foo3(i32 %a, i32 %b) zeroext {
+entry:
+ %c = xor i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo8(i32 %a, i32 %b) zeroext {
+entry:
+ %c = xor i32 %a, 123456
+ ret i32 %c
+}
+
+define i32 @foo4(i32 %a, i32 %b) signext {
+entry:
+ %c = xor i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo5(i32 %a, i32 %b) zeroext {
+entry:
+ %c = xor i32 %a, 1
+ ret i32 %c
+}
+
+define i32 @foo6(i32 %a, i32 %b) signext {
+entry:
+ %c = xor i32 %a, 131072
+ ret i32 %c
+}
+
+define i32 @foo9(i32 %a, i32 %b) signext {
+entry:
+ %c = xor i32 %a, 123456
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/03-RetXorSubreg.ll b/test/CodeGen/SystemZ/03-RetXorSubreg.ll
new file mode 100644
index 0000000..a9af231
--- /dev/null
+++ b/test/CodeGen/SystemZ/03-RetXorSubreg.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=systemz | grep xgr | count 3
+; RUN: llc < %s -march=systemz | grep nihf | count 1
+; RUN: llc < %s -march=systemz | grep lgfr | count 1
+
+
+define i32 @foo(i32 %a, i32 %b) {
+entry:
+ %c = xor i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo1(i32 %a, i32 %b) zeroext {
+entry:
+ %c = xor i32 %a, %b
+ ret i32 %c
+}
+
+define i32 @foo2(i32 %a, i32 %b) signext {
+entry:
+ %c = xor i32 %a, %b
+ ret i32 %c
+}
+
diff --git a/test/CodeGen/SystemZ/04-RetShifts.ll b/test/CodeGen/SystemZ/04-RetShifts.ll
new file mode 100644
index 0000000..cccdc47
--- /dev/null
+++ b/test/CodeGen/SystemZ/04-RetShifts.ll
@@ -0,0 +1,121 @@
+; RUN: llc < %s -march=systemz | grep sra | count 6
+; RUN: llc < %s -march=systemz | grep srag | count 3
+; RUN: llc < %s -march=systemz | grep srl | count 6
+; RUN: llc < %s -march=systemz | grep srlg | count 3
+; RUN: llc < %s -march=systemz | grep sll | count 6
+; RUN: llc < %s -march=systemz | grep sllg | count 3
+
+define signext i32 @foo1(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %add = add i32 %idx, 1 ; <i32> [#uses=1]
+ %shr = ashr i32 %a, %add ; <i32> [#uses=1]
+ ret i32 %shr
+}
+
+define signext i32 @foo2(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %add = add i32 %idx, 1 ; <i32> [#uses=1]
+ %shr = shl i32 %a, %add ; <i32> [#uses=1]
+ ret i32 %shr
+}
+
+define signext i32 @foo3(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %add = add i32 %idx, 1 ; <i32> [#uses=1]
+ %shr = lshr i32 %a, %add ; <i32> [#uses=1]
+ ret i32 %shr
+}
+
+define signext i64 @foo4(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %add = add i64 %idx, 1 ; <i64> [#uses=1]
+ %shr = ashr i64 %a, %add ; <i64> [#uses=1]
+ ret i64 %shr
+}
+
+define signext i64 @foo5(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %add = add i64 %idx, 1 ; <i64> [#uses=1]
+ %shr = shl i64 %a, %add ; <i64> [#uses=1]
+ ret i64 %shr
+}
+
+define signext i64 @foo6(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %add = add i64 %idx, 1 ; <i64> [#uses=1]
+ %shr = lshr i64 %a, %add ; <i64> [#uses=1]
+ ret i64 %shr
+}
+
+define signext i32 @foo7(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %shr = ashr i32 %a, 1
+ ret i32 %shr
+}
+
+define signext i32 @foo8(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %shr = shl i32 %a, 1
+ ret i32 %shr
+}
+
+define signext i32 @foo9(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %shr = lshr i32 %a, 1
+ ret i32 %shr
+}
+
+define signext i32 @foo10(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %shr = ashr i32 %a, %idx
+ ret i32 %shr
+}
+
+define signext i32 @foo11(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %shr = shl i32 %a, %idx
+ ret i32 %shr
+}
+
+define signext i32 @foo12(i32 %a, i32 %idx) nounwind readnone {
+entry:
+ %shr = lshr i32 %a, %idx
+ ret i32 %shr
+}
+
+define signext i64 @foo13(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %shr = ashr i64 %a, 1
+ ret i64 %shr
+}
+
+define signext i64 @foo14(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %shr = shl i64 %a, 1
+ ret i64 %shr
+}
+
+define signext i64 @foo15(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %shr = lshr i64 %a, 1
+ ret i64 %shr
+}
+
+define signext i64 @foo16(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %shr = ashr i64 %a, %idx
+ ret i64 %shr
+}
+
+define signext i64 @foo17(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %shr = shl i64 %a, %idx
+ ret i64 %shr
+}
+
+define signext i64 @foo18(i64 %a, i64 %idx) nounwind readnone {
+entry:
+ %shr = lshr i64 %a, %idx
+ ret i64 %shr
+}
+
diff --git a/test/CodeGen/SystemZ/05-LoadAddr.ll b/test/CodeGen/SystemZ/05-LoadAddr.ll
new file mode 100644
index 0000000..cf02642
--- /dev/null
+++ b/test/CodeGen/SystemZ/05-LoadAddr.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s | grep lay | count 1
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i64* @foo(i64* %a, i64 %idx) nounwind readnone {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i64* %a, i64 %add.ptr.sum ; <i64*> [#uses=1]
+ ret i64* %add.ptr2
+}
diff --git a/test/CodeGen/SystemZ/05-MemImmStores.ll b/test/CodeGen/SystemZ/05-MemImmStores.ll
new file mode 100644
index 0000000..3cf21cc
--- /dev/null
+++ b/test/CodeGen/SystemZ/05-MemImmStores.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -mattr=+z10 | grep mvghi | count 1
+; RUN: llc < %s -mattr=+z10 | grep mvhi | count 1
+; RUN: llc < %s -mattr=+z10 | grep mvhhi | count 1
+; RUN: llc < %s | grep mvi | count 2
+; RUN: llc < %s | grep mviy | count 1
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @foo1(i64* nocapture %a, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i64* %a, i64 1 ; <i64*> [#uses=1]
+ store i64 1, i64* %add.ptr
+ ret void
+}
+
+define void @foo2(i32* nocapture %a, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i32* %a, i64 1 ; <i32*> [#uses=1]
+ store i32 2, i32* %add.ptr
+ ret void
+}
+
+define void @foo3(i16* nocapture %a, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i16* %a, i64 1 ; <i16*> [#uses=1]
+ store i16 3, i16* %add.ptr
+ ret void
+}
+
+define void @foo4(i8* nocapture %a, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i8* %a, i64 1 ; <i8*> [#uses=1]
+ store i8 4, i8* %add.ptr
+ ret void
+}
+
+define void @foo5(i8* nocapture %a, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i8* %a, i64 -1 ; <i8*> [#uses=1]
+ store i8 4, i8* %add.ptr
+ ret void
+}
+
+define void @foo6(i16* nocapture %a, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i16* %a, i64 -1 ; <i16*> [#uses=1]
+ store i16 3, i16* %add.ptr
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/05-MemLoadsStores.ll b/test/CodeGen/SystemZ/05-MemLoadsStores.ll
new file mode 100644
index 0000000..cf12063
--- /dev/null
+++ b/test/CodeGen/SystemZ/05-MemLoadsStores.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s | grep ly | count 2
+; RUN: llc < %s | grep sty | count 2
+; RUN: llc < %s | grep {l %} | count 2
+; RUN: llc < %s | grep {st %} | count 2
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+define void @foo1(i32* nocapture %foo, i32* nocapture %bar) nounwind {
+entry:
+ %tmp1 = load i32* %foo ; <i32> [#uses=1]
+ store i32 %tmp1, i32* %bar
+ ret void
+}
+
+define void @foo2(i32* nocapture %foo, i32* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i32* %foo, i64 1 ; <i32*> [#uses=1]
+ %tmp1 = load i32* %add.ptr ; <i32> [#uses=1]
+ %add.ptr3.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr5 = getelementptr i32* %bar, i64 %add.ptr3.sum ; <i32*> [#uses=1]
+ store i32 %tmp1, i32* %add.ptr5
+ ret void
+}
+
+define void @foo3(i32* nocapture %foo, i32* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %sub.ptr = getelementptr i32* %foo, i64 -1 ; <i32*> [#uses=1]
+ %tmp1 = load i32* %sub.ptr ; <i32> [#uses=1]
+ %sub.ptr3.sum = add i64 %idx, -1 ; <i64> [#uses=1]
+ %add.ptr = getelementptr i32* %bar, i64 %sub.ptr3.sum ; <i32*> [#uses=1]
+ store i32 %tmp1, i32* %add.ptr
+ ret void
+}
+
+define void @foo4(i32* nocapture %foo, i32* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i32* %foo, i64 8192 ; <i32*> [#uses=1]
+ %tmp1 = load i32* %add.ptr ; <i32> [#uses=1]
+ %add.ptr3.sum = add i64 %idx, 8192 ; <i64> [#uses=1]
+ %add.ptr5 = getelementptr i32* %bar, i64 %add.ptr3.sum ; <i32*> [#uses=1]
+ store i32 %tmp1, i32* %add.ptr5
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/05-MemLoadsStores16.ll b/test/CodeGen/SystemZ/05-MemLoadsStores16.ll
new file mode 100644
index 0000000..1e6232a
--- /dev/null
+++ b/test/CodeGen/SystemZ/05-MemLoadsStores16.ll
@@ -0,0 +1,85 @@
+; RUN: llc < %s | grep {sthy.%} | count 2
+; RUN: llc < %s | grep {lhy.%} | count 2
+; RUN: llc < %s | grep {lh.%} | count 6
+; RUN: llc < %s | grep {sth.%} | count 2
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+define void @foo1(i16* nocapture %foo, i16* nocapture %bar) nounwind {
+entry:
+ %tmp1 = load i16* %foo ; <i16> [#uses=1]
+ store i16 %tmp1, i16* %bar
+ ret void
+}
+
+define void @foo2(i16* nocapture %foo, i16* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i16* %foo, i64 1 ; <i16*> [#uses=1]
+ %tmp1 = load i16* %add.ptr ; <i16> [#uses=1]
+ %add.ptr3.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr5 = getelementptr i16* %bar, i64 %add.ptr3.sum ; <i16*> [#uses=1]
+ store i16 %tmp1, i16* %add.ptr5
+ ret void
+}
+
+define void @foo3(i16* nocapture %foo, i16* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %sub.ptr = getelementptr i16* %foo, i64 -1 ; <i16*> [#uses=1]
+ %tmp1 = load i16* %sub.ptr ; <i16> [#uses=1]
+ %sub.ptr3.sum = add i64 %idx, -1 ; <i64> [#uses=1]
+ %add.ptr = getelementptr i16* %bar, i64 %sub.ptr3.sum ; <i16*> [#uses=1]
+ store i16 %tmp1, i16* %add.ptr
+ ret void
+}
+
+define void @foo4(i16* nocapture %foo, i16* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i16* %foo, i64 8192 ; <i16*> [#uses=1]
+ %tmp1 = load i16* %add.ptr ; <i16> [#uses=1]
+ %add.ptr3.sum = add i64 %idx, 8192 ; <i64> [#uses=1]
+ %add.ptr5 = getelementptr i16* %bar, i64 %add.ptr3.sum ; <i16*> [#uses=1]
+ store i16 %tmp1, i16* %add.ptr5
+ ret void
+}
+
+define void @foo5(i16* nocapture %foo, i32* nocapture %bar) nounwind {
+entry:
+ %tmp1 = load i16* %foo ; <i16> [#uses=1]
+ %conv = sext i16 %tmp1 to i32 ; <i32> [#uses=1]
+ store i32 %conv, i32* %bar
+ ret void
+}
+
+define void @foo6(i16* nocapture %foo, i32* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i16* %foo, i64 1 ; <i16*> [#uses=1]
+ %tmp1 = load i16* %add.ptr ; <i16> [#uses=1]
+ %conv = sext i16 %tmp1 to i32 ; <i32> [#uses=1]
+ %add.ptr3.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr5 = getelementptr i32* %bar, i64 %add.ptr3.sum ; <i32*> [#uses=1]
+ store i32 %conv, i32* %add.ptr5
+ ret void
+}
+
+define void @foo7(i16* nocapture %foo, i32* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %sub.ptr = getelementptr i16* %foo, i64 -1 ; <i16*> [#uses=1]
+ %tmp1 = load i16* %sub.ptr ; <i16> [#uses=1]
+ %conv = sext i16 %tmp1 to i32 ; <i32> [#uses=1]
+ %sub.ptr3.sum = add i64 %idx, -1 ; <i64> [#uses=1]
+ %add.ptr = getelementptr i32* %bar, i64 %sub.ptr3.sum ; <i32*> [#uses=1]
+ store i32 %conv, i32* %add.ptr
+ ret void
+}
+
+define void @foo8(i16* nocapture %foo, i32* nocapture %bar, i64 %idx) nounwind {
+entry:
+ %add.ptr = getelementptr i16* %foo, i64 8192 ; <i16*> [#uses=1]
+ %tmp1 = load i16* %add.ptr ; <i16> [#uses=1]
+ %conv = sext i16 %tmp1 to i32 ; <i32> [#uses=1]
+ %add.ptr3.sum = add i64 %idx, 8192 ; <i64> [#uses=1]
+ %add.ptr5 = getelementptr i32* %bar, i64 %add.ptr3.sum ; <i32*> [#uses=1]
+ store i32 %conv, i32* %add.ptr5
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/05-MemRegLoads.ll b/test/CodeGen/SystemZ/05-MemRegLoads.ll
new file mode 100644
index 0000000..f690a48
--- /dev/null
+++ b/test/CodeGen/SystemZ/05-MemRegLoads.ll
@@ -0,0 +1,75 @@
+; RUN: llc < %s -march=systemz | not grep aghi
+; RUN: llc < %s -march=systemz | grep llgf | count 1
+; RUN: llc < %s -march=systemz | grep llgh | count 1
+; RUN: llc < %s -march=systemz | grep llgc | count 1
+; RUN: llc < %s -march=systemz | grep lgf | count 2
+; RUN: llc < %s -march=systemz | grep lgh | count 2
+; RUN: llc < %s -march=systemz | grep lgb | count 1
+
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define zeroext i64 @foo1(i64* nocapture %a, i64 %idx) nounwind readonly {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i64* %a, i64 %add.ptr.sum ; <i64*> [#uses=1]
+ %tmp3 = load i64* %add.ptr2 ; <i64> [#uses=1]
+ ret i64 %tmp3
+}
+
+define zeroext i32 @foo2(i32* nocapture %a, i64 %idx) nounwind readonly {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i32* %a, i64 %add.ptr.sum ; <i32*> [#uses=1]
+ %tmp3 = load i32* %add.ptr2 ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
+
+define zeroext i16 @foo3(i16* nocapture %a, i64 %idx) nounwind readonly {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i16* %a, i64 %add.ptr.sum ; <i16*> [#uses=1]
+ %tmp3 = load i16* %add.ptr2 ; <i16> [#uses=1]
+ ret i16 %tmp3
+}
+
+define zeroext i8 @foo4(i8* nocapture %a, i64 %idx) nounwind readonly {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i8* %a, i64 %add.ptr.sum ; <i8*> [#uses=1]
+ %tmp3 = load i8* %add.ptr2 ; <i8> [#uses=1]
+ ret i8 %tmp3
+}
+
+define signext i64 @foo5(i64* nocapture %a, i64 %idx) nounwind readonly {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i64* %a, i64 %add.ptr.sum ; <i64*> [#uses=1]
+ %tmp3 = load i64* %add.ptr2 ; <i64> [#uses=1]
+ ret i64 %tmp3
+}
+
+define signext i32 @foo6(i32* nocapture %a, i64 %idx) nounwind readonly {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i32* %a, i64 %add.ptr.sum ; <i32*> [#uses=1]
+ %tmp3 = load i32* %add.ptr2 ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
+
+define signext i16 @foo7(i16* nocapture %a, i64 %idx) nounwind readonly {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i16* %a, i64 %add.ptr.sum ; <i16*> [#uses=1]
+ %tmp3 = load i16* %add.ptr2 ; <i16> [#uses=1]
+ ret i16 %tmp3
+}
+
+define signext i8 @foo8(i8* nocapture %a, i64 %idx) nounwind readonly {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i8* %a, i64 %add.ptr.sum ; <i8*> [#uses=1]
+ %tmp3 = load i8* %add.ptr2 ; <i8> [#uses=1]
+ ret i8 %tmp3
+}
diff --git a/test/CodeGen/SystemZ/05-MemRegStores.ll b/test/CodeGen/SystemZ/05-MemRegStores.ll
new file mode 100644
index 0000000..b851c3f
--- /dev/null
+++ b/test/CodeGen/SystemZ/05-MemRegStores.ll
@@ -0,0 +1,79 @@
+; RUN: llc < %s | not grep aghi
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @foo1(i64* nocapture %a, i64 %idx, i64 %val) nounwind {
+entry:
+
+; CHECK: foo1:
+; CHECK: stg %r4, 8(%r1,%r2)
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i64* %a, i64 %add.ptr.sum ; <i64*> [#uses=1]
+ store i64 %val, i64* %add.ptr2
+ ret void
+}
+
+define void @foo2(i32* nocapture %a, i64 %idx, i32 %val) nounwind {
+entry:
+; CHECK: foo2:
+; CHECK: st %r4, 4(%r1,%r2)
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i32* %a, i64 %add.ptr.sum ; <i32*> [#uses=1]
+ store i32 %val, i32* %add.ptr2
+ ret void
+}
+
+define void @foo3(i16* nocapture %a, i64 %idx, i16 zeroext %val) nounwind {
+entry:
+; CHECK: foo3:
+; CHECK: sth %r4, 2(%r1,%r2)
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i16* %a, i64 %add.ptr.sum ; <i16*> [#uses=1]
+ store i16 %val, i16* %add.ptr2
+ ret void
+}
+
+define void @foo4(i8* nocapture %a, i64 %idx, i8 zeroext %val) nounwind {
+entry:
+; CHECK: foo4:
+; CHECK: stc %r4, 1(%r3,%r2)
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i8* %a, i64 %add.ptr.sum ; <i8*> [#uses=1]
+ store i8 %val, i8* %add.ptr2
+ ret void
+}
+
+define void @foo5(i8* nocapture %a, i64 %idx, i64 %val) nounwind {
+entry:
+; CHECK: foo5:
+; CHECK: stc %r4, 1(%r3,%r2)
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i8* %a, i64 %add.ptr.sum ; <i8*> [#uses=1]
+ %conv = trunc i64 %val to i8 ; <i8> [#uses=1]
+ store i8 %conv, i8* %add.ptr2
+ ret void
+}
+
+define void @foo6(i16* nocapture %a, i64 %idx, i64 %val) nounwind {
+entry:
+; CHECK: foo6:
+; CHECK: sth %r4, 2(%r1,%r2)
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i16* %a, i64 %add.ptr.sum ; <i16*> [#uses=1]
+ %conv = trunc i64 %val to i16 ; <i16> [#uses=1]
+ store i16 %conv, i16* %add.ptr2
+ ret void
+}
+
+define void @foo7(i32* nocapture %a, i64 %idx, i64 %val) nounwind {
+entry:
+; CHECK: foo7:
+; CHECK: st %r4, 4(%r1,%r2)
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i32* %a, i64 %add.ptr.sum ; <i32*> [#uses=1]
+ %conv = trunc i64 %val to i32 ; <i32> [#uses=1]
+ store i32 %conv, i32* %add.ptr2
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/06-CallViaStack.ll b/test/CodeGen/SystemZ/06-CallViaStack.ll
new file mode 100644
index 0000000..e904f49
--- /dev/null
+++ b/test/CodeGen/SystemZ/06-CallViaStack.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s | grep 168 | count 1
+; RUN: llc < %s | grep 160 | count 3
+; RUN: llc < %s | grep 328 | count 1
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i64 @foo(i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g) nounwind {
+entry:
+ %a = alloca i64, align 8 ; <i64*> [#uses=3]
+ store i64 %g, i64* %a
+ call void @bar(i64* %a) nounwind
+ %tmp1 = load i64* %a ; <i64> [#uses=1]
+ ret i64 %tmp1
+}
+
+declare void @bar(i64*)
diff --git a/test/CodeGen/SystemZ/06-FrameIdxLoad.ll b/test/CodeGen/SystemZ/06-FrameIdxLoad.ll
new file mode 100644
index 0000000..c71da9b
--- /dev/null
+++ b/test/CodeGen/SystemZ/06-FrameIdxLoad.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s | grep 160 | count 1
+; RUN: llc < %s | grep 168 | count 1
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i64 @foo(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64* %g) nounwind readnone {
+entry:
+ ret i64 %f
+}
+
+define i64 @bar(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64* %g) nounwind readnone {
+entry:
+ %conv = ptrtoint i64* %g to i64 ; <i64> [#uses=1]
+ ret i64 %conv
+}
diff --git a/test/CodeGen/SystemZ/06-LocalFrame.ll b/test/CodeGen/SystemZ/06-LocalFrame.ll
new file mode 100644
index 0000000..d89b0df
--- /dev/null
+++ b/test/CodeGen/SystemZ/06-LocalFrame.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s | grep 160 | count 1
+; RUN: llc < %s | grep 328 | count 1
+; RUN: llc < %s | grep 168 | count 1
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define noalias i64* @foo(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f) nounwind readnone {
+entry:
+ %g = alloca i64, align 8 ; <i64*> [#uses=1]
+ %add.ptr = getelementptr i64* %g, i64 %f ; <i64*> [#uses=1]
+ ret i64* %add.ptr
+}
diff --git a/test/CodeGen/SystemZ/06-SimpleCall.ll b/test/CodeGen/SystemZ/06-SimpleCall.ll
new file mode 100644
index 0000000..fd4b502
--- /dev/null
+++ b/test/CodeGen/SystemZ/06-SimpleCall.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @foo() nounwind {
+entry:
+ tail call void @bar() nounwind
+ ret void
+}
+
+declare void @bar()
diff --git a/test/CodeGen/SystemZ/07-BrCond.ll b/test/CodeGen/SystemZ/07-BrCond.ll
new file mode 100644
index 0000000..8599717
--- /dev/null
+++ b/test/CodeGen/SystemZ/07-BrCond.ll
@@ -0,0 +1,141 @@
+; RUN: llc < %s | grep je | count 1
+; RUN: llc < %s | grep jne | count 1
+; RUN: llc < %s | grep jhe | count 2
+; RUN: llc < %s | grep jle | count 2
+; RUN: llc < %s | grep jh | count 4
+; RUN: llc < %s | grep jl | count 4
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @foo(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp ult i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+declare void @bar()
+
+define void @foo1(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp ugt i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo2(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp ugt i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo3(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp ult i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo4(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp eq i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo5(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp eq i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo6(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp slt i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo7(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp sgt i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo8(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp sgt i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo9(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp slt i64 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/07-BrCond32.ll b/test/CodeGen/SystemZ/07-BrCond32.ll
new file mode 100644
index 0000000..8ece5ac
--- /dev/null
+++ b/test/CodeGen/SystemZ/07-BrCond32.ll
@@ -0,0 +1,142 @@
+; RUN: llc < %s | grep je | count 1
+; RUN: llc < %s | grep jne | count 1
+; RUN: llc < %s | grep jhe | count 2
+; RUN: llc < %s | grep jle | count 2
+; RUN: llc < %s | grep jh | count 4
+; RUN: llc < %s | grep jl | count 4
+
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @foo(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp ult i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+declare void @bar()
+
+define void @foo1(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp ugt i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo2(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp ugt i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo3(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp ult i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo4(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo5(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo6(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp slt i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo7(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp sgt i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo8(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp sgt i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo9(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp slt i32 %a, %b ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/07-BrUnCond.ll b/test/CodeGen/SystemZ/07-BrUnCond.ll
new file mode 100644
index 0000000..e0bc302c
--- /dev/null
+++ b/test/CodeGen/SystemZ/07-BrUnCond.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-linux"
+
+define void @foo() noreturn nounwind {
+entry:
+ tail call void @baz() nounwind
+ br label %l1
+
+l1: ; preds = %entry, %l1
+ tail call void @bar() nounwind
+ br label %l1
+}
+
+declare void @bar()
+
+declare void @baz()
diff --git a/test/CodeGen/SystemZ/07-CmpImm.ll b/test/CodeGen/SystemZ/07-CmpImm.ll
new file mode 100644
index 0000000..4d0ebda
--- /dev/null
+++ b/test/CodeGen/SystemZ/07-CmpImm.ll
@@ -0,0 +1,137 @@
+; RUN: llc < %s | grep cgfi | count 8
+; RUN: llc < %s | grep clgfi | count 2
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @foo(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp eq i64 %a, 0 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+declare void @bar()
+
+define void @foo1(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp ugt i64 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo2(i64 %a, i64 %b) nounwind {
+entry:
+ %cmp = icmp ugt i64 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo3(i64 %a) nounwind {
+entry:
+ %cmp = icmp eq i64 %a, 0 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo4(i64 %a) nounwind {
+entry:
+ %cmp = icmp eq i64 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo5(i64 %a) nounwind {
+entry:
+ %cmp = icmp eq i64 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo6(i64 %a) nounwind {
+entry:
+ %cmp = icmp slt i64 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo7(i64 %a) nounwind {
+entry:
+ %cmp = icmp sgt i64 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo8(i64 %a) nounwind {
+entry:
+ %cmp = icmp sgt i64 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo9(i64 %a) nounwind {
+entry:
+ %cmp = icmp slt i64 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/07-CmpImm32.ll b/test/CodeGen/SystemZ/07-CmpImm32.ll
new file mode 100644
index 0000000..add34fa
--- /dev/null
+++ b/test/CodeGen/SystemZ/07-CmpImm32.ll
@@ -0,0 +1,139 @@
+; RUN: llc < %s | grep jl | count 3
+; RUN: llc < %s | grep jh | count 3
+; RUN: llc < %s | grep je | count 2
+; RUN: llc < %s | grep jne | count 2
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define void @foo(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp eq i32 %a, 0 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+declare void @bar()
+
+define void @foo1(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp ugt i32 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo2(i32 %a, i32 %b) nounwind {
+entry:
+ %cmp = icmp ugt i32 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo3(i32 %a) nounwind {
+entry:
+ %cmp = icmp eq i32 %a, 0 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo4(i32 %a) nounwind {
+entry:
+ %cmp = icmp eq i32 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo5(i32 %a) nounwind {
+entry:
+ %cmp = icmp eq i32 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo6(i32 %a) nounwind {
+entry:
+ %cmp = icmp slt i32 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo7(i32 %a) nounwind {
+entry:
+ %cmp = icmp sgt i32 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo8(i32 %a) nounwind {
+entry:
+ %cmp = icmp sgt i32 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
+
+define void @foo9(i32 %a) nounwind {
+entry:
+ %cmp = icmp slt i32 %a, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ tail call void @bar() nounwind
+ ret void
+
+if.end: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/07-SelectCC.ll b/test/CodeGen/SystemZ/07-SelectCC.ll
new file mode 100644
index 0000000..aa4b36e
--- /dev/null
+++ b/test/CodeGen/SystemZ/07-SelectCC.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s | grep clgr
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i64 @foo(i64 %a, i64 %b) nounwind readnone {
+entry:
+ %cmp = icmp ult i64 %a, %b ; <i1> [#uses=1]
+ %cond = select i1 %cmp, i64 %a, i64 %b ; <i64> [#uses=1]
+ ret i64 %cond
+}
diff --git a/test/CodeGen/SystemZ/08-DivRem.ll b/test/CodeGen/SystemZ/08-DivRem.ll
new file mode 100644
index 0000000..ff1e441
--- /dev/null
+++ b/test/CodeGen/SystemZ/08-DivRem.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s | grep dsgr | count 2
+; RUN: llc < %s | grep dsgfr | count 2
+; RUN: llc < %s | grep dlr | count 2
+; RUN: llc < %s | grep dlgr | count 2
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i64 @div(i64 %a, i64 %b) nounwind readnone {
+entry:
+ %div = sdiv i64 %a, %b ; <i64> [#uses=1]
+ ret i64 %div
+}
+
+define i32 @div1(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %div = sdiv i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %div
+}
+
+define i64 @div2(i64 %a, i64 %b) nounwind readnone {
+entry:
+ %div = udiv i64 %a, %b ; <i64> [#uses=1]
+ ret i64 %div
+}
+
+define i32 @div3(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %div = udiv i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %div
+}
+
+define i64 @rem(i64 %a, i64 %b) nounwind readnone {
+entry:
+ %rem = srem i64 %a, %b ; <i64> [#uses=1]
+ ret i64 %rem
+}
+
+define i32 @rem1(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %rem = srem i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %rem
+}
+
+define i64 @rem2(i64 %a, i64 %b) nounwind readnone {
+entry:
+ %rem = urem i64 %a, %b ; <i64> [#uses=1]
+ ret i64 %rem
+}
+
+define i32 @rem3(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %rem = urem i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %rem
+}
diff --git a/test/CodeGen/SystemZ/08-DivRemMemOp.ll b/test/CodeGen/SystemZ/08-DivRemMemOp.ll
new file mode 100644
index 0000000..d6ec0e74
--- /dev/null
+++ b/test/CodeGen/SystemZ/08-DivRemMemOp.ll
@@ -0,0 +1,64 @@
+; RUN: llc < %s | grep {dsgf.%} | count 2
+; RUN: llc < %s | grep {dsg.%} | count 2
+; RUN: llc < %s | grep {dl.%} | count 2
+; RUN: llc < %s | grep dlg | count 2
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i64 @div(i64 %a, i64* %b) nounwind readnone {
+entry:
+ %b1 = load i64* %b
+ %div = sdiv i64 %a, %b1
+ ret i64 %div
+}
+
+define i64 @div1(i64 %a, i64* %b) nounwind readnone {
+entry:
+ %b1 = load i64* %b
+ %div = udiv i64 %a, %b1
+ ret i64 %div
+}
+
+define i64 @rem(i64 %a, i64* %b) nounwind readnone {
+entry:
+ %b1 = load i64* %b
+ %div = srem i64 %a, %b1
+ ret i64 %div
+}
+
+define i64 @rem1(i64 %a, i64* %b) nounwind readnone {
+entry:
+ %b1 = load i64* %b
+ %div = urem i64 %a, %b1
+ ret i64 %div
+}
+
+define i32 @div2(i32 %a, i32* %b) nounwind readnone {
+entry:
+ %b1 = load i32* %b
+ %div = sdiv i32 %a, %b1
+ ret i32 %div
+}
+
+define i32 @div3(i32 %a, i32* %b) nounwind readnone {
+entry:
+ %b1 = load i32* %b
+ %div = udiv i32 %a, %b1
+ ret i32 %div
+}
+
+define i32 @rem2(i32 %a, i32* %b) nounwind readnone {
+entry:
+ %b1 = load i32* %b
+ %div = srem i32 %a, %b1
+ ret i32 %div
+}
+
+define i32 @rem3(i32 %a, i32* %b) nounwind readnone {
+entry:
+ %b1 = load i32* %b
+ %div = urem i32 %a, %b1
+ ret i32 %div
+}
+
diff --git a/test/CodeGen/SystemZ/08-SimpleMuls.ll b/test/CodeGen/SystemZ/08-SimpleMuls.ll
new file mode 100644
index 0000000..1ab88d6
--- /dev/null
+++ b/test/CodeGen/SystemZ/08-SimpleMuls.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s | grep msgr | count 2
+; RUN: llc < %s | grep msr | count 2
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i64 @foo(i64 %a, i64 %b) nounwind readnone {
+entry:
+ %mul = mul i64 %b, %a ; <i64> [#uses=1]
+ ret i64 %mul
+}
+
+define i64 @foo2(i64 %a, i64 %b) nounwind readnone {
+entry:
+ %mul = mul i64 %b, %a ; <i64> [#uses=1]
+ ret i64 %mul
+}
+
+define i32 @foo3(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %mul = mul i32 %b, %a ; <i32> [#uses=1]
+ ret i32 %mul
+}
+
+define i32 @foo4(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %mul = mul i32 %b, %a ; <i32> [#uses=1]
+ ret i32 %mul
+}
diff --git a/test/CodeGen/SystemZ/09-DynamicAlloca.ll b/test/CodeGen/SystemZ/09-DynamicAlloca.ll
new file mode 100644
index 0000000..27189ab
--- /dev/null
+++ b/test/CodeGen/SystemZ/09-DynamicAlloca.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+define void @foo(i64 %N) nounwind {
+entry:
+ %N3 = trunc i64 %N to i32 ; <i32> [#uses=1]
+ %vla = alloca i8, i32 %N3, align 2 ; <i8*> [#uses=1]
+ call void @bar(i8* %vla) nounwind
+ ret void
+}
+
+declare void @bar(i8*)
diff --git a/test/CodeGen/SystemZ/09-Globals.ll b/test/CodeGen/SystemZ/09-Globals.ll
new file mode 100644
index 0000000..6e0c1ab
--- /dev/null
+++ b/test/CodeGen/SystemZ/09-Globals.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s | grep larl | count 3
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-linux"
+@bar = common global i64 0, align 8 ; <i64*> [#uses=3]
+
+define i64 @foo() nounwind readonly {
+entry:
+ %tmp = load i64* @bar ; <i64> [#uses=1]
+ ret i64 %tmp
+}
+
+define i64* @foo2() nounwind readnone {
+entry:
+ ret i64* @bar
+}
+
+define i64* @foo3(i64 %idx) nounwind readnone {
+entry:
+ %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
+ %add.ptr2 = getelementptr i64* @bar, i64 %add.ptr.sum ; <i64*> [#uses=1]
+ ret i64* %add.ptr2
+}
diff --git a/test/CodeGen/SystemZ/09-Switches.ll b/test/CodeGen/SystemZ/09-Switches.ll
new file mode 100644
index 0000000..32aaa62
--- /dev/null
+++ b/test/CodeGen/SystemZ/09-Switches.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -march=systemz | grep larl
+
+define i32 @main(i32 %tmp158) {
+entry:
+ switch i32 %tmp158, label %bb336 [
+ i32 -2147483648, label %bb338
+ i32 -2147483647, label %bb338
+ i32 -2147483646, label %bb338
+ i32 120, label %bb338
+ i32 121, label %bb339
+ i32 122, label %bb340
+ i32 123, label %bb341
+ i32 124, label %bb342
+ i32 125, label %bb343
+ i32 126, label %bb336
+ i32 1024, label %bb338
+ i32 0, label %bb338
+ i32 1, label %bb338
+ i32 2, label %bb338
+ i32 3, label %bb338
+ i32 4, label %bb338
+ i32 5, label %bb338
+ ]
+bb336:
+ ret i32 10
+bb338:
+ ret i32 11
+bb339:
+ ret i32 12
+bb340:
+ ret i32 13
+bb341:
+ ret i32 14
+bb342:
+ ret i32 15
+bb343:
+ ret i32 18
+
+}
diff --git a/test/CodeGen/SystemZ/10-FuncsPic.ll b/test/CodeGen/SystemZ/10-FuncsPic.ll
new file mode 100644
index 0000000..cc32538
--- /dev/null
+++ b/test/CodeGen/SystemZ/10-FuncsPic.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -relocation-model=pic | grep GOTENT | count 3
+; RUN: llc < %s -relocation-model=pic | grep PLT | count 1
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+@ptr = external global void (...)* ; <void (...)**> [#uses=2]
+
+define void @foo1() nounwind {
+entry:
+ store void (...)* @func, void (...)** @ptr
+ ret void
+}
+
+declare void @func(...)
+
+define void @foo2() nounwind {
+entry:
+ tail call void (...)* @func() nounwind
+ ret void
+}
+
+define void @foo3() nounwind {
+entry:
+ %tmp = load void (...)** @ptr ; <void (...)*> [#uses=1]
+ tail call void (...)* %tmp() nounwind
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/10-GlobalsPic.ll b/test/CodeGen/SystemZ/10-GlobalsPic.ll
new file mode 100644
index 0000000..a77671e
--- /dev/null
+++ b/test/CodeGen/SystemZ/10-GlobalsPic.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -relocation-model=pic | grep GOTENT | count 6
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+@src = external global i32 ; <i32*> [#uses=2]
+@dst = external global i32 ; <i32*> [#uses=2]
+@ptr = external global i32* ; <i32**> [#uses=2]
+
+define void @foo1() nounwind {
+entry:
+ %tmp = load i32* @src ; <i32> [#uses=1]
+ store i32 %tmp, i32* @dst
+ ret void
+}
+
+define void @foo2() nounwind {
+entry:
+ store i32* @dst, i32** @ptr
+ ret void
+}
+
+define void @foo3() nounwind {
+entry:
+ %tmp = load i32* @src ; <i32> [#uses=1]
+ %tmp1 = load i32** @ptr ; <i32*> [#uses=1]
+ %arrayidx = getelementptr i32* %tmp1, i64 1 ; <i32*> [#uses=1]
+ store i32 %tmp, i32* %arrayidx
+ ret void
+}
diff --git a/test/CodeGen/SystemZ/11-BSwap.ll b/test/CodeGen/SystemZ/11-BSwap.ll
new file mode 100644
index 0000000..609d9dc
--- /dev/null
+++ b/test/CodeGen/SystemZ/11-BSwap.ll
@@ -0,0 +1,74 @@
+; RUN: llc < %s | FileCheck %s
+
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+
+define i16 @foo(i16 zeroext %a) zeroext {
+ %res = tail call i16 @llvm.bswap.i16(i16 %a)
+ ret i16 %res
+}
+
+define i32 @foo2(i32 zeroext %a) zeroext {
+; CHECK: foo2:
+; CHECK: lrvr %r1, %r2
+ %res = tail call i32 @llvm.bswap.i32(i32 %a)
+ ret i32 %res
+}
+
+define i64 @foo3(i64 %a) zeroext {
+; CHECK: foo3:
+; CHECK: lrvgr %r2, %r2
+ %res = tail call i64 @llvm.bswap.i64(i64 %a)
+ ret i64 %res
+}
+
+define i16 @foo4(i16* %b) zeroext {
+ %a = load i16* %b
+ %res = tail call i16 @llvm.bswap.i16(i16 %a)
+ ret i16 %res
+}
+
+define i32 @foo5(i32* %b) zeroext {
+; CHECK: foo5:
+; CHECK: lrv %r1, 0(%r2)
+ %a = load i32* %b
+ %res = tail call i32 @llvm.bswap.i32(i32 %a)
+ ret i32 %res
+}
+
+define i64 @foo6(i64* %b) {
+; CHECK: foo6:
+; CHECK: lrvg %r2, 0(%r2)
+ %a = load i64* %b
+ %res = tail call i64 @llvm.bswap.i64(i64 %a)
+ ret i64 %res
+}
+
+define void @foo7(i16 %a, i16* %b) {
+ %res = tail call i16 @llvm.bswap.i16(i16 %a)
+ store i16 %res, i16* %b
+ ret void
+}
+
+define void @foo8(i32 %a, i32* %b) {
+; CHECK: foo8:
+; CHECK: strv %r2, 0(%r3)
+ %res = tail call i32 @llvm.bswap.i32(i32 %a)
+ store i32 %res, i32* %b
+ ret void
+}
+
+define void @foo9(i64 %a, i64* %b) {
+; CHECK: foo9:
+; CHECK: strvg %r2, 0(%r3)
+ %res = tail call i64 @llvm.bswap.i64(i64 %a)
+ store i64 %res, i64* %b
+ ret void
+}
+
+declare i16 @llvm.bswap.i16(i16) nounwind readnone
+declare i32 @llvm.bswap.i32(i32) nounwind readnone
+declare i64 @llvm.bswap.i64(i64) nounwind readnone
+
diff --git a/test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll b/test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll
new file mode 100644
index 0000000..65f8e14
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-05-29-InvalidRetResult.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-unknown-linux-gnu"
+
+define i32 @main() nounwind {
+entry:
+ %call = call i32 (...)* @random() nounwind ; <i32> [#uses=0]
+ unreachable
+}
+
+declare i32 @random(...)
diff --git a/test/CodeGen/SystemZ/2009-06-02-And32Imm.ll b/test/CodeGen/SystemZ/2009-06-02-And32Imm.ll
new file mode 100644
index 0000000..3cfa97d
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-06-02-And32Imm.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=systemz | grep nilf | count 1
+; RUN: llc < %s -march=systemz | grep nill | count 1
+
+define i32 @gnu_dev_major(i64 %__dev) nounwind readnone {
+entry:
+ %shr = lshr i64 %__dev, 8 ; <i64> [#uses=1]
+ %shr8 = trunc i64 %shr to i32 ; <i32> [#uses=1]
+ %shr2 = lshr i64 %__dev, 32 ; <i64> [#uses=1]
+ %conv = trunc i64 %shr2 to i32 ; <i32> [#uses=1]
+ %and3 = and i32 %conv, -4096 ; <i32> [#uses=1]
+ %and6 = and i32 %shr8, 4095 ; <i32> [#uses=1]
+ %conv5 = or i32 %and6, %and3 ; <i32> [#uses=1]
+ ret i32 %conv5
+}
diff --git a/test/CodeGen/SystemZ/2009-06-02-Rotate.ll b/test/CodeGen/SystemZ/2009-06-02-Rotate.ll
new file mode 100644
index 0000000..07a164d
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-06-02-Rotate.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=systemz | grep rll
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+define i32 @rotl(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %shl = shl i32 %x, 1 ; <i32> [#uses=1]
+ %sub = sub i32 32, 1 ; <i32> [#uses=1]
+ %shr = lshr i32 %x, %sub ; <i32> [#uses=1]
+ %or = or i32 %shr, %shl ; <i32> [#uses=1]
+ ret i32 %or
+}
diff --git a/test/CodeGen/SystemZ/2009-06-05-InvalidArgLoad.ll b/test/CodeGen/SystemZ/2009-06-05-InvalidArgLoad.ll
new file mode 100644
index 0000000..5f6ec50
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-06-05-InvalidArgLoad.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
+target triple = "s390x-ibm-linux"
+ %struct.re_pattern_buffer = type <{ i8*, i64, i64, i64, i8*, i8*, i64, i8, i8, i8, i8, i8, i8, i8, i8 }>
+ %struct.re_registers = type <{ i32, i8, i8, i8, i8, i32*, i32* }>
+
+define i32 @xre_search_2(%struct.re_pattern_buffer* nocapture %bufp, i8* %string1, i32 %size1, i8* %string2, i32 %size2, i32 %startpos, i32 %range, %struct.re_registers* %regs, i32 %stop) nounwind {
+entry:
+ %cmp17.i = icmp slt i32 undef, %startpos ; <i1> [#uses=1]
+ %or.cond.i = or i1 undef, %cmp17.i ; <i1> [#uses=1]
+ br i1 %or.cond.i, label %byte_re_search_2.exit, label %if.then20.i
+
+if.then20.i: ; preds = %entry
+ ret i32 -2
+
+byte_re_search_2.exit: ; preds = %entry
+ ret i32 -1
+}
diff --git a/test/CodeGen/SystemZ/2009-07-04-Shl32.ll b/test/CodeGen/SystemZ/2009-07-04-Shl32.ll
new file mode 100644
index 0000000..99d0ee7
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-07-04-Shl32.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+define void @compdecomp(i8* nocapture %data, i64 %data_len) nounwind {
+entry:
+ br label %for.body38
+
+for.body38: ; preds = %for.body38, %entry
+ br i1 undef, label %for.cond220, label %for.body38
+
+for.cond220: ; preds = %for.cond220, %for.body38
+ br i1 false, label %for.cond220, label %for.end297
+
+for.end297: ; preds = %for.cond220
+ %tmp334 = load i8* undef ; <i8> [#uses=1]
+ %conv343 = zext i8 %tmp334 to i32 ; <i32> [#uses=1]
+ %sub344 = add i32 %conv343, -1 ; <i32> [#uses=1]
+ %shl345 = shl i32 1, %sub344 ; <i32> [#uses=1]
+ %conv346 = sext i32 %shl345 to i64 ; <i64> [#uses=1]
+ br label %for.body356
+
+for.body356: ; preds = %for.body356, %for.end297
+ %mask.1633 = phi i64 [ %conv346, %for.end297 ], [ undef, %for.body356 ] ; <i64> [#uses=0]
+ br label %for.body356
+}
diff --git a/test/CodeGen/SystemZ/2009-07-05-Shifts.ll b/test/CodeGen/SystemZ/2009-07-05-Shifts.ll
new file mode 100644
index 0000000..a35167f
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-07-05-Shifts.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+define signext i32 @bit_place_piece(i32 signext %col, i32 signext %player, i64* nocapture %b1, i64* nocapture %b2) nounwind {
+entry:
+ br i1 undef, label %for.body, label %return
+
+for.body: ; preds = %entry
+ %add = add i32 0, %col ; <i32> [#uses=1]
+ %sh_prom = zext i32 %add to i64 ; <i64> [#uses=1]
+ %shl = shl i64 1, %sh_prom ; <i64> [#uses=1]
+ br i1 undef, label %if.then13, label %if.else
+
+if.then13: ; preds = %for.body
+ ret i32 0
+
+if.else: ; preds = %for.body
+ %or34 = or i64 undef, %shl ; <i64> [#uses=0]
+ ret i32 0
+
+return: ; preds = %entry
+ ret i32 1
+}
diff --git a/test/CodeGen/SystemZ/2009-07-10-BadIncomingArgOffset.ll b/test/CodeGen/SystemZ/2009-07-10-BadIncomingArgOffset.ll
new file mode 100644
index 0000000..6a76a8e
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-07-10-BadIncomingArgOffset.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s | grep 168
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+declare void @rdft(i32 signext, i32 signext, double*, i32* nocapture, double*) nounwind
+
+declare double @mp_mul_d2i_test(i32 signext, i32 signext, double* nocapture) nounwind
+
+define void @mp_mul_radix_test_bb3(i32 %radix, i32 %nfft, double* %tmpfft, i32* %ip, double* %w, double* %arrayidx44.reload, double* %call.out) nounwind {
+newFuncRoot:
+ br label %bb3
+
+bb4.exitStub: ; preds = %bb3
+ store double %call, double* %call.out
+ ret void
+
+bb3: ; preds = %newFuncRoot
+ tail call void @rdft(i32 signext %nfft, i32 signext -1, double* %arrayidx44.reload, i32* %ip, double* %w) nounwind
+ %call = tail call double @mp_mul_d2i_test(i32 signext %radix, i32 signext %nfft, double* %tmpfft) ; <double> [#uses=1]
+ br label %bb4.exitStub
+}
diff --git a/test/CodeGen/SystemZ/2009-07-11-FloatBitConvert.ll b/test/CodeGen/SystemZ/2009-07-11-FloatBitConvert.ll
new file mode 100644
index 0000000..564d343
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-07-11-FloatBitConvert.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+define float @foo(i32 signext %a) {
+entry:
+ %b = bitcast i32 %a to float
+ ret float %b
+}
+
+define i32 @bar(float %a) {
+entry:
+ %b = bitcast float %a to i32
+ ret i32 %b
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/2009-07-11-InvalidRIISel.ll b/test/CodeGen/SystemZ/2009-07-11-InvalidRIISel.ll
new file mode 100644
index 0000000..a91e29e
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-07-11-InvalidRIISel.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s
+
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
+target triple = "s390x-linux"
+
+define signext i32 @dfg_parse() nounwind {
+entry:
+ br i1 undef, label %if.then2208, label %if.else2360
+
+if.then2208: ; preds = %entry
+ br i1 undef, label %bb.nph3189, label %for.end2270
+
+bb.nph3189: ; preds = %if.then2208
+ unreachable
+
+for.end2270: ; preds = %if.then2208
+ %call2279 = call i64 @strlen(i8* undef) nounwind ; <i64> [#uses=1]
+ %add2281 = add i64 0, %call2279 ; <i64> [#uses=1]
+ %tmp2283 = trunc i64 %add2281 to i32 ; <i32> [#uses=1]
+ %tmp2284 = alloca i8, i32 %tmp2283, align 2 ; <i8*> [#uses=1]
+ %yyd.0.i2561.13 = getelementptr i8* %tmp2284, i64 13 ; <i8*> [#uses=1]
+ store i8 117, i8* %yyd.0.i2561.13
+ br label %while.cond.i2558
+
+while.cond.i2558: ; preds = %while.cond.i2558, %for.end2270
+ br label %while.cond.i2558
+
+if.else2360: ; preds = %entry
+ unreachable
+}
+
+declare i64 @strlen(i8* nocapture) nounwind readonly
diff --git a/test/CodeGen/SystemZ/2009-08-21-InlineAsmRConstraint.ll b/test/CodeGen/SystemZ/2009-08-21-InlineAsmRConstraint.ll
new file mode 100644
index 0000000..f7686f1
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-08-21-InlineAsmRConstraint.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:16:16-f128:128:128"
+target triple = "s390x-ibm-linux-gnu"
+
+@__JCR_LIST__ = internal global [0 x i8*] zeroinitializer, section ".jcr", align 8 ; <[0 x i8*]*> [#uses=1]
+
+define internal void @frame_dummy() nounwind {
+entry:
+ %asmtmp = tail call void (i8*)* (void (i8*)*)* asm "", "=r,0"(void (i8*)* @_Jv_RegisterClasses) nounwind ; <void (i8*)*> [#uses=2]
+ %0 = icmp eq void (i8*)* %asmtmp, null ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb3
+
+bb3: ; preds = %entry
+ tail call void %asmtmp(i8* bitcast ([0 x i8*]* @__JCR_LIST__ to i8*)) nounwind
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+declare extern_weak void @_Jv_RegisterClasses(i8*)
diff --git a/test/CodeGen/SystemZ/2009-08-22-FCopySign.ll b/test/CodeGen/SystemZ/2009-08-22-FCopySign.ll
new file mode 100644
index 0000000..fde7d9d
--- /dev/null
+++ b/test/CodeGen/SystemZ/2009-08-22-FCopySign.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:16:16-f128:128:128"
+target triple = "s390x-ibm-linux-gnu"
+
+define double @foo(double %a, double %b) nounwind {
+entry:
+; CHECK: cpsdr %f0, %f2, %f0
+ %0 = tail call double @copysign(double %a, double %b) nounwind readnone
+ ret double %0
+}
+
+define float @bar(float %a, float %b) nounwind {
+entry:
+; CHECK: cpsdr %f0, %f2, %f0
+ %0 = tail call float @copysignf(float %a, float %b) nounwind readnone
+ ret float %0
+}
+
+
+declare double @copysign(double, double) nounwind readnone
+declare float @copysignf(float, float) nounwind readnone
diff --git a/test/CodeGen/SystemZ/2010-01-04-DivMem.ll b/test/CodeGen/SystemZ/2010-01-04-DivMem.ll
new file mode 100644
index 0000000..d730bec
--- /dev/null
+++ b/test/CodeGen/SystemZ/2010-01-04-DivMem.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s
+target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"
+target triple = "s390x-elf"
+
+@REGISTER = external global [10 x i32] ; <[10 x i32]*> [#uses=2]
+
+define void @DIVR_P(i32 signext %PRINT_EFFECT) nounwind {
+entry:
+ %REG1 = alloca i32, align 4 ; <i32*> [#uses=2]
+ %REG2 = alloca i32, align 4 ; <i32*> [#uses=2]
+ %call = call signext i32 (...)* @FORMAT2(i32* %REG1, i32* %REG2) nounwind ; <i32> [#uses=0]
+ %tmp = load i32* %REG1 ; <i32> [#uses=1]
+ %idxprom = sext i32 %tmp to i64 ; <i64> [#uses=1]
+ %arrayidx = getelementptr inbounds [10 x i32]* @REGISTER, i64 0, i64 %idxprom ; <i32*> [#uses=2]
+ %tmp1 = load i32* %arrayidx ; <i32> [#uses=2]
+ %tmp2 = load i32* %REG2 ; <i32> [#uses=1]
+ %idxprom3 = sext i32 %tmp2 to i64 ; <i64> [#uses=1]
+ %arrayidx4 = getelementptr inbounds [10 x i32]* @REGISTER, i64 0, i64 %idxprom3 ; <i32*> [#uses=3]
+ %tmp5 = load i32* %arrayidx4 ; <i32> [#uses=3]
+ %cmp6 = icmp sgt i32 %tmp5, 8388607 ; <i1> [#uses=1]
+ %REG2_SIGN.0 = select i1 %cmp6, i32 -1, i32 1 ; <i32> [#uses=2]
+ %cmp10 = icmp eq i32 %REG2_SIGN.0, 1 ; <i1> [#uses=1]
+ %not.cmp = icmp slt i32 %tmp1, 8388608 ; <i1> [#uses=2]
+ %or.cond = and i1 %cmp10, %not.cmp ; <i1> [#uses=1]
+ br i1 %or.cond, label %if.then13, label %if.end25
+
+if.then13: ; preds = %entry
+ %div = sdiv i32 %tmp5, %tmp1 ; <i32> [#uses=2]
+ store i32 %div, i32* %arrayidx4
+ br label %if.end25
+
+if.end25: ; preds = %if.then13, %entry
+ %tmp35 = phi i32 [ %div, %if.then13 ], [ %tmp5, %entry ] ; <i32> [#uses=1]
+ %cmp27 = icmp eq i32 %REG2_SIGN.0, -1 ; <i1> [#uses=1]
+ %or.cond46 = and i1 %cmp27, %not.cmp ; <i1> [#uses=1]
+ br i1 %or.cond46, label %if.then31, label %if.end45
+
+if.then31: ; preds = %if.end25
+ %sub = sub i32 16777216, %tmp35 ; <i32> [#uses=1]
+ %tmp39 = load i32* %arrayidx ; <i32> [#uses=1]
+ %div40 = udiv i32 %sub, %tmp39 ; <i32> [#uses=1]
+ %sub41 = sub i32 16777216, %div40 ; <i32> [#uses=1]
+ store i32 %sub41, i32* %arrayidx4
+ ret void
+
+if.end45: ; preds = %if.end25
+ ret void
+}
+
+declare signext i32 @FORMAT2(...)
diff --git a/test/CodeGen/SystemZ/dg.exp b/test/CodeGen/SystemZ/dg.exp
new file mode 100644
index 0000000..e9624ba
--- /dev/null
+++ b/test/CodeGen/SystemZ/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target SystemZ] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/Thumb/2007-01-31-RegInfoAssert.ll b/test/CodeGen/Thumb/2007-01-31-RegInfoAssert.ll
new file mode 100644
index 0000000..1e61b23
--- /dev/null
+++ b/test/CodeGen/Thumb/2007-01-31-RegInfoAssert.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=thumb-apple-darwin
+
+%struct.rtx_def = type { i8 }
+@str = external global [7 x i8]
+
+define void @f1() {
+ %D = alloca %struct.rtx_def, align 1
+ %tmp1 = bitcast %struct.rtx_def* %D to i32*
+ %tmp7 = load i32* %tmp1
+ %tmp14 = lshr i32 %tmp7, 1
+ %tmp1415 = and i32 %tmp14, 1
+ call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 )
+ ret void
+}
+
+declare void @printf(i32, ...)
diff --git a/test/CodeGen/Thumb/2007-02-02-JoinIntervalsCrash.ll b/test/CodeGen/Thumb/2007-02-02-JoinIntervalsCrash.ll
new file mode 100644
index 0000000..be2b839
--- /dev/null
+++ b/test/CodeGen/Thumb/2007-02-02-JoinIntervalsCrash.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple=thumb-apple-darwin
+
+ %struct.color_sample = type { i32 }
+ %struct.ref = type { %struct.color_sample, i16, i16 }
+
+define void @zcvrs() {
+ br i1 false, label %bb22, label %UnifiedReturnBlock
+
+bb22:
+ br i1 false, label %bb64, label %UnifiedReturnBlock
+
+bb64:
+ %tmp67 = urem i32 0, 0
+ %tmp69 = icmp slt i32 %tmp67, 10
+ %iftmp.13.0 = select i1 %tmp69, i8 48, i8 55
+ %tmp75 = add i8 %iftmp.13.0, 0
+ store i8 %tmp75, i8* null
+ %tmp81 = udiv i32 0, 0
+ %tmp83 = icmp eq i32 %tmp81, 0
+ br i1 %tmp83, label %bb85, label %bb64
+
+bb85:
+ ret void
+
+UnifiedReturnBlock:
+ ret void
+}
diff --git a/test/CodeGen/Thumb/2007-03-06-AddR7.ll b/test/CodeGen/Thumb/2007-03-06-AddR7.ll
new file mode 100644
index 0000000..8d139e9
--- /dev/null
+++ b/test/CodeGen/Thumb/2007-03-06-AddR7.ll
@@ -0,0 +1,117 @@
+; RUN: llc < %s -march=thumb
+; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4}
+
+ %struct.__fooAllocator = type opaque
+ %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** }
+ %struct.__fooZ = type opaque
+ %struct.__fooU = type opaque
+ %struct.__fooString = type opaque
+ %struct.__fooV = type opaque
+ %struct.fooXBase = type { i32, [4 x i8] }
+ %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zeroext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* }
+ %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] }
+ %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* }
+ %struct.aa_ivar = type { i8*, i8*, i32 }
+ %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] }
+ %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* }
+ %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] }
+ %struct.aa_object = type { %struct.aa_class* }
+ %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] }
+ %struct.aa_ss = type opaque
+@__kfooYTypeID = external global i32 ; <i32*> [#uses=3]
+@__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1]
+@__fooXClassTableSize = external global i32 ; <i32*> [#uses=1]
+@__fooXAaClassTable = external global i32* ; <i32**> [#uses=1]
[email protected] = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2]
+@str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1]
+
+
+define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zeroext {
+entry:
+ %args = alloca i8*, align 4 ; <i8**> [#uses=5]
+ %args4 = bitcast i8** %args to i8* ; <i8*> [#uses=2]
+ call void @llvm.va_start( i8* %args4 )
+ %tmp6 = load i32* @__kfooYTypeID ; <i32> [#uses=1]
+ icmp eq i32 %tmp6, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; <i32> [#uses=1]
+ store i32 %tmp7, i32* @__kfooYTypeID
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp8 = load i32* @__kfooYTypeID ; <i32> [#uses=2]
+ %tmp15 = load i32* @__fooXClassTableSize ; <i32> [#uses=1]
+ icmp ugt i32 %tmp15, %tmp8 ; <i1>:1 [#uses=1]
+ br i1 %1, label %cond_next18, label %cond_true58
+
+cond_next18: ; preds = %cond_next
+ %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp22 = load i32* %tmp21 ; <i32> [#uses=2]
+ %tmp29 = load i32** @__fooXAaClassTable ; <i32*> [#uses=1]
+ %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; <i32*> [#uses=1]
+ %tmp32 = load i32* %tmp31 ; <i32> [#uses=1]
+ icmp eq i32 %tmp22, %tmp32 ; <i1>:2 [#uses=1]
+ %.not = xor i1 %2, true ; <i1> [#uses=1]
+ icmp ugt i32 %tmp22, 4095 ; <i1>:3 [#uses=1]
+ %bothcond = and i1 %.not, %3 ; <i1> [#uses=1]
+ br i1 %bothcond, label %cond_true58, label %bb48
+
+bb48: ; preds = %cond_next18
+ %tmp78 = call i32 @strlen( i8* %componentDesc ) ; <i32> [#uses=4]
+ %tmp92 = alloca i32, i32 %tmp78 ; <i32*> [#uses=2]
+ icmp sgt i32 %tmp78, 0 ; <i1>:4 [#uses=1]
+ br i1 %4, label %cond_true111, label %bb114
+
+cond_true58: ; preds = %cond_next18, %cond_next
+ %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2]
+ icmp eq %struct.aa_ss* %tmp59, null ; <i1>:5 [#uses=1]
+ %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; <i8*> [#uses=2]
+ br i1 %5, label %cond_true60, label %cond_next64
+
+cond_true60: ; preds = %cond_true58
+ %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2]
+ store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319
+ %tmp66137 = volatile load i8** %args ; <i8*> [#uses=1]
+ %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137) zeroext ; <i8> [#uses=1]
+ ret i8 %tmp73138
+
+cond_next64: ; preds = %cond_true58
+ %tmp66 = volatile load i8** %args ; <i8*> [#uses=1]
+ %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zeroext ; <i8> [#uses=1]
+ ret i8 %tmp73
+
+cond_true111: ; preds = %cond_true111, %bb48
+ %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; <i32> [#uses=2]
+ %tmp95 = volatile load i8** %args ; <i8*> [#uses=2]
+ %tmp97 = getelementptr i8* %tmp95, i32 4 ; <i8*> [#uses=1]
+ volatile store i8* %tmp97, i8** %args
+ %tmp9899 = bitcast i8* %tmp95 to i32* ; <i32*> [#uses=1]
+ %tmp100 = load i32* %tmp9899 ; <i32> [#uses=1]
+ %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; <i32*> [#uses=1]
+ store i32 %tmp100, i32* %tmp104
+ %indvar.next = add i32 %idx.2132.0, 1 ; <i32> [#uses=2]
+ icmp eq i32 %indvar.next, %tmp78 ; <i1>:6 [#uses=1]
+ br i1 %6, label %bb114, label %cond_true111
+
+bb114: ; preds = %cond_true111, %bb48
+ call void @llvm.va_end( i8* %args4 )
+ %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zeroext ; <i8> [#uses=1]
+ ret i8 %tmp122
+}
+
+declare i32 @_fooXRegisterClass(%struct.fooXClass*)
+
+declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zeroext
+
+declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...)
+
+declare %struct.aa_ss* @sel_registerName(i8*)
+
+declare void @llvm.va_start(i8*)
+
+declare i32 @strlen(i8*)
+
+declare void @llvm.va_end(i8*)
diff --git a/test/CodeGen/Thumb/2007-05-05-InvalidPushPop.ll b/test/CodeGen/Thumb/2007-05-05-InvalidPushPop.ll
new file mode 100644
index 0000000..2074bfd
--- /dev/null
+++ b/test/CodeGen/Thumb/2007-05-05-InvalidPushPop.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s | not grep r11
+
+target triple = "thumb-linux-gnueabi"
+ %struct.__sched_param = type { i32 }
+ %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 }
[email protected] = internal global i32 1 ; <i32*> [#uses=2]
[email protected] = internal constant [14 x i8] c"Thread 1: %d\0A\00" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"Thread 2: %d\0A\00" ; <[14 x i8]*> [#uses=1]
+
+define i8* @f(i8* %a) {
+entry:
+ %tmp1 = load i32* @i.1882 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=2]
+ store i32 %tmp2, i32* @i.1882
+ %tmp34 = inttoptr i32 %tmp2 to i8* ; <i8*> [#uses=1]
+ ret i8* %tmp34
+}
+
+define i32 @main() {
+entry:
+ %t = alloca i32, align 4 ; <i32*> [#uses=4]
+ %ret = alloca i32, align 4 ; <i32*> [#uses=3]
+ %tmp1 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; <i32> [#uses=0]
+ %tmp2 = load i32* %t ; <i32> [#uses=1]
+ %ret3 = bitcast i32* %ret to i8** ; <i8**> [#uses=2]
+ %tmp4 = call i32 @pthread_join( i32 %tmp2, i8** %ret3 ) ; <i32> [#uses=0]
+ %tmp5 = load i32* %ret ; <i32> [#uses=1]
+ %tmp7 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str, i32 0, i32 0), i32 %tmp5 ) ; <i32> [#uses=0]
+ %tmp8 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; <i32> [#uses=0]
+ %tmp9 = load i32* %t ; <i32> [#uses=1]
+ %tmp11 = call i32 @pthread_join( i32 %tmp9, i8** %ret3 ) ; <i32> [#uses=0]
+ %tmp12 = load i32* %ret ; <i32> [#uses=1]
+ %tmp14 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 %tmp12 ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare i32 @pthread_join(i32, i8**)
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll b/test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll
new file mode 100644
index 0000000..5c883b3
--- /dev/null
+++ b/test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb | grep r0 | count 1
+
+define i32 @a(i32 %x, i32 %y) nounwind readnone {
+entry:
+ %mul = mul i32 %y, %x ; <i32> [#uses=1]
+ ret i32 %mul
+}
+
diff --git a/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll b/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll
new file mode 100644
index 0000000..471a82f
--- /dev/null
+++ b/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -mtriple=thumbv6-elf | not grep "subs sp"
+; PR4567
+
+define arm_apcscc i8* @__gets_chk(i8* %s, i32 %slen) nounwind {
+entry:
+ br i1 undef, label %bb, label %bb1
+
+bb: ; preds = %entry
+ ret i8* undef
+
+bb1: ; preds = %entry
+ br i1 undef, label %bb3, label %bb2
+
+bb2: ; preds = %bb1
+ %0 = alloca i8, i32 undef, align 4 ; <i8*> [#uses=0]
+ br label %bb4
+
+bb3: ; preds = %bb1
+ %1 = malloc i8, i32 undef ; <i8*> [#uses=0]
+ br label %bb4
+
+bb4: ; preds = %bb3, %bb2
+ br i1 undef, label %bb5, label %bb6
+
+bb5: ; preds = %bb4
+ %2 = call arm_apcscc i8* @gets(i8* %s) nounwind ; <i8*> [#uses=1]
+ ret i8* %2
+
+bb6: ; preds = %bb4
+ unreachable
+}
+
+declare arm_apcscc i8* @gets(i8*) nounwind
diff --git a/test/CodeGen/Thumb/2009-07-20-TwoAddrBug.ll b/test/CodeGen/Thumb/2009-07-20-TwoAddrBug.ll
new file mode 100644
index 0000000..6e035d0
--- /dev/null
+++ b/test/CodeGen/Thumb/2009-07-20-TwoAddrBug.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin10
+
[email protected] = external global i64 ; <i64*> [#uses=2]
+
+define arm_apcscc i64 @millisecs() nounwind {
+entry:
+ %0 = load i64* @Time.2535, align 4 ; <i64> [#uses=2]
+ %1 = add i64 %0, 1 ; <i64> [#uses=1]
+ store i64 %1, i64* @Time.2535, align 4
+ ret i64 %0
+}
diff --git a/test/CodeGen/Thumb/2009-07-27-PEIAssert.ll b/test/CodeGen/Thumb/2009-07-27-PEIAssert.ll
new file mode 100644
index 0000000..f195348
--- /dev/null
+++ b/test/CodeGen/Thumb/2009-07-27-PEIAssert.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin -relocation-model=pic -disable-fp-elim
+
+ %struct.LinkList = type { i32, %struct.LinkList* }
+ %struct.List = type { i32, i32* }
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 ()* @main to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define arm_apcscc i32 @main() nounwind {
+entry:
+ %ll = alloca %struct.LinkList*, align 4 ; <%struct.LinkList**> [#uses=1]
+ %0 = call arm_apcscc i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind ; <i32> [#uses=1]
+ switch i32 %0, label %bb5 [
+ i32 7, label %bb4
+ i32 42, label %bb3
+ ]
+
+bb3: ; preds = %entry
+ ret i32 1
+
+bb4: ; preds = %entry
+ ret i32 0
+
+bb5: ; preds = %entry
+ ret i32 1
+}
+
+declare arm_apcscc i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind
diff --git a/test/CodeGen/Thumb/2009-08-12-ConstIslandAssert.ll b/test/CodeGen/Thumb/2009-08-12-ConstIslandAssert.ll
new file mode 100644
index 0000000..ef4b5ce
--- /dev/null
+++ b/test/CodeGen/Thumb/2009-08-12-ConstIslandAssert.ll
@@ -0,0 +1,737 @@
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin
+
+ %struct.BF_KEY = type { [18 x i32], [1024 x i32] }
+
+define arm_apcscc void @BF_encrypt(i32* nocapture %data, %struct.BF_KEY* nocapture %key, i32 %encrypt) nounwind {
+entry:
+ %0 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 0; <i32*> [#uses=2]
+ %1 = load i32* %data, align 4 ; <i32> [#uses=2]
+ %2 = load i32* undef, align 4 ; <i32> [#uses=2]
+ br i1 undef, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %3 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %4 = xor i32 %3, %1 ; <i32> [#uses=4]
+ %5 = load i32* null, align 4 ; <i32> [#uses=1]
+ %6 = lshr i32 %4, 24 ; <i32> [#uses=1]
+ %7 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %6; <i32*> [#uses=1]
+ %8 = load i32* %7, align 4 ; <i32> [#uses=1]
+ %9 = lshr i32 %4, 16 ; <i32> [#uses=1]
+ %10 = or i32 %9, 256 ; <i32> [#uses=1]
+ %11 = and i32 %10, 511 ; <i32> [#uses=1]
+ %12 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %11; <i32*> [#uses=1]
+ %13 = load i32* %12, align 4 ; <i32> [#uses=1]
+ %14 = add i32 %13, %8 ; <i32> [#uses=1]
+ %15 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 undef; <i32*> [#uses=1]
+ %16 = load i32* %15, align 4 ; <i32> [#uses=1]
+ %17 = xor i32 %14, %16 ; <i32> [#uses=1]
+ %18 = or i32 %4, 768 ; <i32> [#uses=1]
+ %19 = and i32 %18, 1023 ; <i32> [#uses=1]
+ %20 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %19; <i32*> [#uses=1]
+ %21 = load i32* %20, align 4 ; <i32> [#uses=1]
+ %22 = add i32 %17, %21 ; <i32> [#uses=1]
+ %23 = xor i32 %5, %2 ; <i32> [#uses=1]
+ %24 = xor i32 %23, %22 ; <i32> [#uses=5]
+ %25 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 2; <i32*> [#uses=1]
+ %26 = load i32* %25, align 4 ; <i32> [#uses=1]
+ %27 = lshr i32 %24, 24 ; <i32> [#uses=1]
+ %28 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %27; <i32*> [#uses=1]
+ %29 = load i32* %28, align 4 ; <i32> [#uses=1]
+ %30 = lshr i32 %24, 16 ; <i32> [#uses=1]
+ %31 = or i32 %30, 256 ; <i32> [#uses=1]
+ %32 = and i32 %31, 511 ; <i32> [#uses=1]
+ %33 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %32; <i32*> [#uses=1]
+ %34 = load i32* %33, align 4 ; <i32> [#uses=1]
+ %35 = add i32 %34, %29 ; <i32> [#uses=1]
+ %36 = lshr i32 %24, 8 ; <i32> [#uses=1]
+ %37 = or i32 %36, 512 ; <i32> [#uses=1]
+ %38 = and i32 %37, 767 ; <i32> [#uses=1]
+ %39 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %38; <i32*> [#uses=1]
+ %40 = load i32* %39, align 4 ; <i32> [#uses=1]
+ %41 = xor i32 %35, %40 ; <i32> [#uses=1]
+ %42 = or i32 %24, 768 ; <i32> [#uses=1]
+ %43 = and i32 %42, 1023 ; <i32> [#uses=1]
+ %44 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %43; <i32*> [#uses=1]
+ %45 = load i32* %44, align 4 ; <i32> [#uses=1]
+ %46 = add i32 %41, %45 ; <i32> [#uses=1]
+ %47 = xor i32 %26, %4 ; <i32> [#uses=1]
+ %48 = xor i32 %47, %46 ; <i32> [#uses=5]
+ %49 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 3; <i32*> [#uses=1]
+ %50 = load i32* %49, align 4 ; <i32> [#uses=1]
+ %51 = lshr i32 %48, 24 ; <i32> [#uses=1]
+ %52 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %51; <i32*> [#uses=1]
+ %53 = load i32* %52, align 4 ; <i32> [#uses=1]
+ %54 = lshr i32 %48, 16 ; <i32> [#uses=1]
+ %55 = or i32 %54, 256 ; <i32> [#uses=1]
+ %56 = and i32 %55, 511 ; <i32> [#uses=1]
+ %57 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %56; <i32*> [#uses=1]
+ %58 = load i32* %57, align 4 ; <i32> [#uses=1]
+ %59 = add i32 %58, %53 ; <i32> [#uses=1]
+ %60 = lshr i32 %48, 8 ; <i32> [#uses=1]
+ %61 = or i32 %60, 512 ; <i32> [#uses=1]
+ %62 = and i32 %61, 767 ; <i32> [#uses=1]
+ %63 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %62; <i32*> [#uses=1]
+ %64 = load i32* %63, align 4 ; <i32> [#uses=1]
+ %65 = xor i32 %59, %64 ; <i32> [#uses=1]
+ %66 = or i32 %48, 768 ; <i32> [#uses=1]
+ %67 = and i32 %66, 1023 ; <i32> [#uses=1]
+ %68 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %67; <i32*> [#uses=1]
+ %69 = load i32* %68, align 4 ; <i32> [#uses=1]
+ %70 = add i32 %65, %69 ; <i32> [#uses=1]
+ %71 = xor i32 %50, %24 ; <i32> [#uses=1]
+ %72 = xor i32 %71, %70 ; <i32> [#uses=5]
+ %73 = load i32* null, align 4 ; <i32> [#uses=1]
+ %74 = lshr i32 %72, 24 ; <i32> [#uses=1]
+ %75 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %74; <i32*> [#uses=1]
+ %76 = load i32* %75, align 4 ; <i32> [#uses=1]
+ %77 = lshr i32 %72, 16 ; <i32> [#uses=1]
+ %78 = or i32 %77, 256 ; <i32> [#uses=1]
+ %79 = and i32 %78, 511 ; <i32> [#uses=1]
+ %80 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %79; <i32*> [#uses=1]
+ %81 = load i32* %80, align 4 ; <i32> [#uses=1]
+ %82 = add i32 %81, %76 ; <i32> [#uses=1]
+ %83 = lshr i32 %72, 8 ; <i32> [#uses=1]
+ %84 = or i32 %83, 512 ; <i32> [#uses=1]
+ %85 = and i32 %84, 767 ; <i32> [#uses=1]
+ %86 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %85; <i32*> [#uses=1]
+ %87 = load i32* %86, align 4 ; <i32> [#uses=1]
+ %88 = xor i32 %82, %87 ; <i32> [#uses=1]
+ %89 = or i32 %72, 768 ; <i32> [#uses=1]
+ %90 = and i32 %89, 1023 ; <i32> [#uses=1]
+ %91 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %90; <i32*> [#uses=1]
+ %92 = load i32* %91, align 4 ; <i32> [#uses=1]
+ %93 = add i32 %88, %92 ; <i32> [#uses=1]
+ %94 = xor i32 %73, %48 ; <i32> [#uses=1]
+ %95 = xor i32 %94, %93 ; <i32> [#uses=5]
+ %96 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %97 = lshr i32 %95, 24 ; <i32> [#uses=1]
+ %98 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %97; <i32*> [#uses=1]
+ %99 = load i32* %98, align 4 ; <i32> [#uses=1]
+ %100 = lshr i32 %95, 16 ; <i32> [#uses=1]
+ %101 = or i32 %100, 256 ; <i32> [#uses=1]
+ %102 = and i32 %101, 511 ; <i32> [#uses=1]
+ %103 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %102; <i32*> [#uses=1]
+ %104 = load i32* %103, align 4 ; <i32> [#uses=1]
+ %105 = add i32 %104, %99 ; <i32> [#uses=1]
+ %106 = lshr i32 %95, 8 ; <i32> [#uses=1]
+ %107 = or i32 %106, 512 ; <i32> [#uses=1]
+ %108 = and i32 %107, 767 ; <i32> [#uses=1]
+ %109 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %108; <i32*> [#uses=1]
+ %110 = load i32* %109, align 4 ; <i32> [#uses=1]
+ %111 = xor i32 %105, %110 ; <i32> [#uses=1]
+ %112 = or i32 %95, 768 ; <i32> [#uses=1]
+ %113 = and i32 %112, 1023 ; <i32> [#uses=1]
+ %114 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %113; <i32*> [#uses=1]
+ %115 = load i32* %114, align 4 ; <i32> [#uses=1]
+ %116 = add i32 %111, %115 ; <i32> [#uses=1]
+ %117 = xor i32 %96, %72 ; <i32> [#uses=1]
+ %118 = xor i32 %117, %116 ; <i32> [#uses=5]
+ %119 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 6; <i32*> [#uses=1]
+ %120 = load i32* %119, align 4 ; <i32> [#uses=1]
+ %121 = lshr i32 %118, 24 ; <i32> [#uses=1]
+ %122 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %121; <i32*> [#uses=1]
+ %123 = load i32* %122, align 4 ; <i32> [#uses=1]
+ %124 = lshr i32 %118, 16 ; <i32> [#uses=1]
+ %125 = or i32 %124, 256 ; <i32> [#uses=1]
+ %126 = and i32 %125, 511 ; <i32> [#uses=1]
+ %127 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %126; <i32*> [#uses=1]
+ %128 = load i32* %127, align 4 ; <i32> [#uses=1]
+ %129 = add i32 %128, %123 ; <i32> [#uses=1]
+ %130 = lshr i32 %118, 8 ; <i32> [#uses=1]
+ %131 = or i32 %130, 512 ; <i32> [#uses=1]
+ %132 = and i32 %131, 767 ; <i32> [#uses=1]
+ %133 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %132; <i32*> [#uses=1]
+ %134 = load i32* %133, align 4 ; <i32> [#uses=1]
+ %135 = xor i32 %129, %134 ; <i32> [#uses=1]
+ %136 = or i32 %118, 768 ; <i32> [#uses=1]
+ %137 = and i32 %136, 1023 ; <i32> [#uses=1]
+ %138 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %137; <i32*> [#uses=1]
+ %139 = load i32* %138, align 4 ; <i32> [#uses=1]
+ %140 = add i32 %135, %139 ; <i32> [#uses=1]
+ %141 = xor i32 %120, %95 ; <i32> [#uses=1]
+ %142 = xor i32 %141, %140 ; <i32> [#uses=5]
+ %143 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 7; <i32*> [#uses=1]
+ %144 = load i32* %143, align 4 ; <i32> [#uses=1]
+ %145 = lshr i32 %142, 24 ; <i32> [#uses=1]
+ %146 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %145; <i32*> [#uses=1]
+ %147 = load i32* %146, align 4 ; <i32> [#uses=1]
+ %148 = lshr i32 %142, 16 ; <i32> [#uses=1]
+ %149 = or i32 %148, 256 ; <i32> [#uses=1]
+ %150 = and i32 %149, 511 ; <i32> [#uses=1]
+ %151 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %150; <i32*> [#uses=1]
+ %152 = load i32* %151, align 4 ; <i32> [#uses=1]
+ %153 = add i32 %152, %147 ; <i32> [#uses=1]
+ %154 = lshr i32 %142, 8 ; <i32> [#uses=1]
+ %155 = or i32 %154, 512 ; <i32> [#uses=1]
+ %156 = and i32 %155, 767 ; <i32> [#uses=1]
+ %157 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %156; <i32*> [#uses=1]
+ %158 = load i32* %157, align 4 ; <i32> [#uses=1]
+ %159 = xor i32 %153, %158 ; <i32> [#uses=1]
+ %160 = or i32 %142, 768 ; <i32> [#uses=1]
+ %161 = and i32 %160, 1023 ; <i32> [#uses=1]
+ %162 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %161; <i32*> [#uses=1]
+ %163 = load i32* %162, align 4 ; <i32> [#uses=1]
+ %164 = add i32 %159, %163 ; <i32> [#uses=1]
+ %165 = xor i32 %144, %118 ; <i32> [#uses=1]
+ %166 = xor i32 %165, %164 ; <i32> [#uses=5]
+ %167 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %168 = lshr i32 %166, 24 ; <i32> [#uses=1]
+ %169 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %168; <i32*> [#uses=1]
+ %170 = load i32* %169, align 4 ; <i32> [#uses=1]
+ %171 = lshr i32 %166, 16 ; <i32> [#uses=1]
+ %172 = or i32 %171, 256 ; <i32> [#uses=1]
+ %173 = and i32 %172, 511 ; <i32> [#uses=1]
+ %174 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %173; <i32*> [#uses=1]
+ %175 = load i32* %174, align 4 ; <i32> [#uses=1]
+ %176 = add i32 %175, %170 ; <i32> [#uses=1]
+ %177 = lshr i32 %166, 8 ; <i32> [#uses=1]
+ %178 = or i32 %177, 512 ; <i32> [#uses=1]
+ %179 = and i32 %178, 767 ; <i32> [#uses=1]
+ %180 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %179; <i32*> [#uses=1]
+ %181 = load i32* %180, align 4 ; <i32> [#uses=1]
+ %182 = xor i32 %176, %181 ; <i32> [#uses=1]
+ %183 = or i32 %166, 768 ; <i32> [#uses=1]
+ %184 = and i32 %183, 1023 ; <i32> [#uses=1]
+ %185 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %184; <i32*> [#uses=1]
+ %186 = load i32* %185, align 4 ; <i32> [#uses=1]
+ %187 = add i32 %182, %186 ; <i32> [#uses=1]
+ %188 = xor i32 %167, %142 ; <i32> [#uses=1]
+ %189 = xor i32 %188, %187 ; <i32> [#uses=5]
+ %190 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 9; <i32*> [#uses=1]
+ %191 = load i32* %190, align 4 ; <i32> [#uses=1]
+ %192 = lshr i32 %189, 24 ; <i32> [#uses=1]
+ %193 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %192; <i32*> [#uses=1]
+ %194 = load i32* %193, align 4 ; <i32> [#uses=1]
+ %195 = lshr i32 %189, 16 ; <i32> [#uses=1]
+ %196 = or i32 %195, 256 ; <i32> [#uses=1]
+ %197 = and i32 %196, 511 ; <i32> [#uses=1]
+ %198 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %197; <i32*> [#uses=1]
+ %199 = load i32* %198, align 4 ; <i32> [#uses=1]
+ %200 = add i32 %199, %194 ; <i32> [#uses=1]
+ %201 = lshr i32 %189, 8 ; <i32> [#uses=1]
+ %202 = or i32 %201, 512 ; <i32> [#uses=1]
+ %203 = and i32 %202, 767 ; <i32> [#uses=1]
+ %204 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %203; <i32*> [#uses=1]
+ %205 = load i32* %204, align 4 ; <i32> [#uses=1]
+ %206 = xor i32 %200, %205 ; <i32> [#uses=1]
+ %207 = or i32 %189, 768 ; <i32> [#uses=1]
+ %208 = and i32 %207, 1023 ; <i32> [#uses=1]
+ %209 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %208; <i32*> [#uses=1]
+ %210 = load i32* %209, align 4 ; <i32> [#uses=1]
+ %211 = add i32 %206, %210 ; <i32> [#uses=1]
+ %212 = xor i32 %191, %166 ; <i32> [#uses=1]
+ %213 = xor i32 %212, %211 ; <i32> [#uses=5]
+ %214 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 10; <i32*> [#uses=1]
+ %215 = load i32* %214, align 4 ; <i32> [#uses=1]
+ %216 = lshr i32 %213, 24 ; <i32> [#uses=1]
+ %217 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %216; <i32*> [#uses=1]
+ %218 = load i32* %217, align 4 ; <i32> [#uses=1]
+ %219 = lshr i32 %213, 16 ; <i32> [#uses=1]
+ %220 = or i32 %219, 256 ; <i32> [#uses=1]
+ %221 = and i32 %220, 511 ; <i32> [#uses=1]
+ %222 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %221; <i32*> [#uses=1]
+ %223 = load i32* %222, align 4 ; <i32> [#uses=1]
+ %224 = add i32 %223, %218 ; <i32> [#uses=1]
+ %225 = lshr i32 %213, 8 ; <i32> [#uses=1]
+ %226 = or i32 %225, 512 ; <i32> [#uses=1]
+ %227 = and i32 %226, 767 ; <i32> [#uses=1]
+ %228 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %227; <i32*> [#uses=1]
+ %229 = load i32* %228, align 4 ; <i32> [#uses=1]
+ %230 = xor i32 %224, %229 ; <i32> [#uses=1]
+ %231 = or i32 %213, 768 ; <i32> [#uses=1]
+ %232 = and i32 %231, 1023 ; <i32> [#uses=1]
+ %233 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %232; <i32*> [#uses=1]
+ %234 = load i32* %233, align 4 ; <i32> [#uses=1]
+ %235 = add i32 %230, %234 ; <i32> [#uses=1]
+ %236 = xor i32 %215, %189 ; <i32> [#uses=1]
+ %237 = xor i32 %236, %235 ; <i32> [#uses=5]
+ %238 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 11; <i32*> [#uses=1]
+ %239 = load i32* %238, align 4 ; <i32> [#uses=1]
+ %240 = lshr i32 %237, 24 ; <i32> [#uses=1]
+ %241 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %240; <i32*> [#uses=1]
+ %242 = load i32* %241, align 4 ; <i32> [#uses=1]
+ %243 = lshr i32 %237, 16 ; <i32> [#uses=1]
+ %244 = or i32 %243, 256 ; <i32> [#uses=1]
+ %245 = and i32 %244, 511 ; <i32> [#uses=1]
+ %246 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %245; <i32*> [#uses=1]
+ %247 = load i32* %246, align 4 ; <i32> [#uses=1]
+ %248 = add i32 %247, %242 ; <i32> [#uses=1]
+ %249 = lshr i32 %237, 8 ; <i32> [#uses=1]
+ %250 = or i32 %249, 512 ; <i32> [#uses=1]
+ %251 = and i32 %250, 767 ; <i32> [#uses=1]
+ %252 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %251; <i32*> [#uses=1]
+ %253 = load i32* %252, align 4 ; <i32> [#uses=1]
+ %254 = xor i32 %248, %253 ; <i32> [#uses=1]
+ %255 = or i32 %237, 768 ; <i32> [#uses=1]
+ %256 = and i32 %255, 1023 ; <i32> [#uses=1]
+ %257 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %256; <i32*> [#uses=1]
+ %258 = load i32* %257, align 4 ; <i32> [#uses=1]
+ %259 = add i32 %254, %258 ; <i32> [#uses=1]
+ %260 = xor i32 %239, %213 ; <i32> [#uses=1]
+ %261 = xor i32 %260, %259 ; <i32> [#uses=5]
+ %262 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %263 = lshr i32 %261, 24 ; <i32> [#uses=1]
+ %264 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %263; <i32*> [#uses=1]
+ %265 = load i32* %264, align 4 ; <i32> [#uses=1]
+ %266 = lshr i32 %261, 16 ; <i32> [#uses=1]
+ %267 = or i32 %266, 256 ; <i32> [#uses=1]
+ %268 = and i32 %267, 511 ; <i32> [#uses=1]
+ %269 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %268; <i32*> [#uses=1]
+ %270 = load i32* %269, align 4 ; <i32> [#uses=1]
+ %271 = add i32 %270, %265 ; <i32> [#uses=1]
+ %272 = lshr i32 %261, 8 ; <i32> [#uses=1]
+ %273 = or i32 %272, 512 ; <i32> [#uses=1]
+ %274 = and i32 %273, 767 ; <i32> [#uses=1]
+ %275 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %274; <i32*> [#uses=1]
+ %276 = load i32* %275, align 4 ; <i32> [#uses=1]
+ %277 = xor i32 %271, %276 ; <i32> [#uses=1]
+ %278 = or i32 %261, 768 ; <i32> [#uses=1]
+ %279 = and i32 %278, 1023 ; <i32> [#uses=1]
+ %280 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %279; <i32*> [#uses=1]
+ %281 = load i32* %280, align 4 ; <i32> [#uses=1]
+ %282 = add i32 %277, %281 ; <i32> [#uses=1]
+ %283 = xor i32 %262, %237 ; <i32> [#uses=1]
+ %284 = xor i32 %283, %282 ; <i32> [#uses=4]
+ %285 = load i32* null, align 4 ; <i32> [#uses=1]
+ %286 = lshr i32 %284, 24 ; <i32> [#uses=1]
+ %287 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %286; <i32*> [#uses=1]
+ %288 = load i32* %287, align 4 ; <i32> [#uses=1]
+ %289 = lshr i32 %284, 16 ; <i32> [#uses=1]
+ %290 = or i32 %289, 256 ; <i32> [#uses=1]
+ %291 = and i32 %290, 511 ; <i32> [#uses=1]
+ %292 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %291; <i32*> [#uses=1]
+ %293 = load i32* %292, align 4 ; <i32> [#uses=1]
+ %294 = add i32 %293, %288 ; <i32> [#uses=1]
+ %295 = lshr i32 %284, 8 ; <i32> [#uses=1]
+ %296 = or i32 %295, 512 ; <i32> [#uses=1]
+ %297 = and i32 %296, 767 ; <i32> [#uses=1]
+ %298 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %297; <i32*> [#uses=1]
+ %299 = load i32* %298, align 4 ; <i32> [#uses=1]
+ %300 = xor i32 %294, %299 ; <i32> [#uses=1]
+ %301 = or i32 %284, 768 ; <i32> [#uses=1]
+ %302 = and i32 %301, 1023 ; <i32> [#uses=1]
+ %303 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %302; <i32*> [#uses=1]
+ %304 = load i32* %303, align 4 ; <i32> [#uses=1]
+ %305 = add i32 %300, %304 ; <i32> [#uses=1]
+ %306 = xor i32 %285, %261 ; <i32> [#uses=1]
+ %307 = xor i32 %306, %305 ; <i32> [#uses=1]
+ %308 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 15; <i32*> [#uses=1]
+ %309 = load i32* %308, align 4 ; <i32> [#uses=1]
+ %310 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 0; <i32*> [#uses=1]
+ %311 = load i32* %310, align 4 ; <i32> [#uses=1]
+ %312 = or i32 0, 256 ; <i32> [#uses=1]
+ %313 = and i32 %312, 511 ; <i32> [#uses=1]
+ %314 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %313; <i32*> [#uses=1]
+ %315 = load i32* %314, align 4 ; <i32> [#uses=1]
+ %316 = add i32 %315, %311 ; <i32> [#uses=1]
+ %317 = or i32 0, 512 ; <i32> [#uses=1]
+ %318 = and i32 %317, 767 ; <i32> [#uses=1]
+ %319 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %318; <i32*> [#uses=1]
+ %320 = load i32* %319, align 4 ; <i32> [#uses=1]
+ %321 = xor i32 %316, %320 ; <i32> [#uses=1]
+ %322 = or i32 0, 768 ; <i32> [#uses=1]
+ %323 = and i32 %322, 1023 ; <i32> [#uses=1]
+ %324 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %323; <i32*> [#uses=1]
+ %325 = load i32* %324, align 4 ; <i32> [#uses=1]
+ %326 = add i32 %321, %325 ; <i32> [#uses=1]
+ %327 = xor i32 %309, %307 ; <i32> [#uses=1]
+ %328 = xor i32 %327, %326 ; <i32> [#uses=5]
+ %329 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 17; <i32*> [#uses=1]
+ br label %bb2
+
+bb1: ; preds = %entry
+ %330 = load i32* null, align 4 ; <i32> [#uses=1]
+ %331 = xor i32 %330, %1 ; <i32> [#uses=4]
+ %332 = load i32* null, align 4 ; <i32> [#uses=1]
+ %333 = lshr i32 %331, 24 ; <i32> [#uses=1]
+ %334 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %333; <i32*> [#uses=1]
+ %335 = load i32* %334, align 4 ; <i32> [#uses=1]
+ %336 = load i32* null, align 4 ; <i32> [#uses=1]
+ %337 = add i32 %336, %335 ; <i32> [#uses=1]
+ %338 = lshr i32 %331, 8 ; <i32> [#uses=1]
+ %339 = or i32 %338, 512 ; <i32> [#uses=1]
+ %340 = and i32 %339, 767 ; <i32> [#uses=1]
+ %341 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %340; <i32*> [#uses=1]
+ %342 = load i32* %341, align 4 ; <i32> [#uses=1]
+ %343 = xor i32 %337, %342 ; <i32> [#uses=1]
+ %344 = or i32 %331, 768 ; <i32> [#uses=1]
+ %345 = and i32 %344, 1023 ; <i32> [#uses=1]
+ %346 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %345; <i32*> [#uses=1]
+ %347 = load i32* %346, align 4 ; <i32> [#uses=1]
+ %348 = add i32 %343, %347 ; <i32> [#uses=1]
+ %349 = xor i32 %332, %2 ; <i32> [#uses=1]
+ %350 = xor i32 %349, %348 ; <i32> [#uses=5]
+ %351 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 15; <i32*> [#uses=1]
+ %352 = load i32* %351, align 4 ; <i32> [#uses=1]
+ %353 = lshr i32 %350, 24 ; <i32> [#uses=1]
+ %354 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %353; <i32*> [#uses=1]
+ %355 = load i32* %354, align 4 ; <i32> [#uses=1]
+ %356 = lshr i32 %350, 16 ; <i32> [#uses=1]
+ %357 = or i32 %356, 256 ; <i32> [#uses=1]
+ %358 = and i32 %357, 511 ; <i32> [#uses=1]
+ %359 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %358; <i32*> [#uses=1]
+ %360 = load i32* %359, align 4 ; <i32> [#uses=1]
+ %361 = add i32 %360, %355 ; <i32> [#uses=1]
+ %362 = lshr i32 %350, 8 ; <i32> [#uses=1]
+ %363 = or i32 %362, 512 ; <i32> [#uses=1]
+ %364 = and i32 %363, 767 ; <i32> [#uses=1]
+ %365 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %364; <i32*> [#uses=1]
+ %366 = load i32* %365, align 4 ; <i32> [#uses=1]
+ %367 = xor i32 %361, %366 ; <i32> [#uses=1]
+ %368 = or i32 %350, 768 ; <i32> [#uses=1]
+ %369 = and i32 %368, 1023 ; <i32> [#uses=1]
+ %370 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %369; <i32*> [#uses=1]
+ %371 = load i32* %370, align 4 ; <i32> [#uses=1]
+ %372 = add i32 %367, %371 ; <i32> [#uses=1]
+ %373 = xor i32 %352, %331 ; <i32> [#uses=1]
+ %374 = xor i32 %373, %372 ; <i32> [#uses=5]
+ %375 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 14; <i32*> [#uses=1]
+ %376 = load i32* %375, align 4 ; <i32> [#uses=1]
+ %377 = lshr i32 %374, 24 ; <i32> [#uses=1]
+ %378 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %377; <i32*> [#uses=1]
+ %379 = load i32* %378, align 4 ; <i32> [#uses=1]
+ %380 = lshr i32 %374, 16 ; <i32> [#uses=1]
+ %381 = or i32 %380, 256 ; <i32> [#uses=1]
+ %382 = and i32 %381, 511 ; <i32> [#uses=1]
+ %383 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %382; <i32*> [#uses=1]
+ %384 = load i32* %383, align 4 ; <i32> [#uses=1]
+ %385 = add i32 %384, %379 ; <i32> [#uses=1]
+ %386 = lshr i32 %374, 8 ; <i32> [#uses=1]
+ %387 = or i32 %386, 512 ; <i32> [#uses=1]
+ %388 = and i32 %387, 767 ; <i32> [#uses=1]
+ %389 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %388; <i32*> [#uses=1]
+ %390 = load i32* %389, align 4 ; <i32> [#uses=1]
+ %391 = xor i32 %385, %390 ; <i32> [#uses=1]
+ %392 = or i32 %374, 768 ; <i32> [#uses=1]
+ %393 = and i32 %392, 1023 ; <i32> [#uses=1]
+ %394 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %393; <i32*> [#uses=1]
+ %395 = load i32* %394, align 4 ; <i32> [#uses=1]
+ %396 = add i32 %391, %395 ; <i32> [#uses=1]
+ %397 = xor i32 %376, %350 ; <i32> [#uses=1]
+ %398 = xor i32 %397, %396 ; <i32> [#uses=5]
+ %399 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 13; <i32*> [#uses=1]
+ %400 = load i32* %399, align 4 ; <i32> [#uses=1]
+ %401 = lshr i32 %398, 24 ; <i32> [#uses=1]
+ %402 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %401; <i32*> [#uses=1]
+ %403 = load i32* %402, align 4 ; <i32> [#uses=1]
+ %404 = lshr i32 %398, 16 ; <i32> [#uses=1]
+ %405 = or i32 %404, 256 ; <i32> [#uses=1]
+ %406 = and i32 %405, 511 ; <i32> [#uses=1]
+ %407 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %406; <i32*> [#uses=1]
+ %408 = load i32* %407, align 4 ; <i32> [#uses=1]
+ %409 = add i32 %408, %403 ; <i32> [#uses=1]
+ %410 = lshr i32 %398, 8 ; <i32> [#uses=1]
+ %411 = or i32 %410, 512 ; <i32> [#uses=1]
+ %412 = and i32 %411, 767 ; <i32> [#uses=1]
+ %413 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %412; <i32*> [#uses=1]
+ %414 = load i32* %413, align 4 ; <i32> [#uses=1]
+ %415 = xor i32 %409, %414 ; <i32> [#uses=1]
+ %416 = or i32 %398, 768 ; <i32> [#uses=1]
+ %417 = and i32 %416, 1023 ; <i32> [#uses=1]
+ %418 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %417; <i32*> [#uses=1]
+ %419 = load i32* %418, align 4 ; <i32> [#uses=1]
+ %420 = add i32 %415, %419 ; <i32> [#uses=1]
+ %421 = xor i32 %400, %374 ; <i32> [#uses=1]
+ %422 = xor i32 %421, %420 ; <i32> [#uses=5]
+ %423 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 12; <i32*> [#uses=1]
+ %424 = load i32* %423, align 4 ; <i32> [#uses=1]
+ %425 = lshr i32 %422, 24 ; <i32> [#uses=1]
+ %426 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %425; <i32*> [#uses=1]
+ %427 = load i32* %426, align 4 ; <i32> [#uses=1]
+ %428 = lshr i32 %422, 16 ; <i32> [#uses=1]
+ %429 = or i32 %428, 256 ; <i32> [#uses=1]
+ %430 = and i32 %429, 511 ; <i32> [#uses=1]
+ %431 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %430; <i32*> [#uses=1]
+ %432 = load i32* %431, align 4 ; <i32> [#uses=1]
+ %433 = add i32 %432, %427 ; <i32> [#uses=1]
+ %434 = lshr i32 %422, 8 ; <i32> [#uses=1]
+ %435 = or i32 %434, 512 ; <i32> [#uses=1]
+ %436 = and i32 %435, 767 ; <i32> [#uses=1]
+ %437 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %436; <i32*> [#uses=1]
+ %438 = load i32* %437, align 4 ; <i32> [#uses=1]
+ %439 = xor i32 %433, %438 ; <i32> [#uses=1]
+ %440 = or i32 %422, 768 ; <i32> [#uses=1]
+ %441 = and i32 %440, 1023 ; <i32> [#uses=1]
+ %442 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %441; <i32*> [#uses=1]
+ %443 = load i32* %442, align 4 ; <i32> [#uses=1]
+ %444 = add i32 %439, %443 ; <i32> [#uses=1]
+ %445 = xor i32 %424, %398 ; <i32> [#uses=1]
+ %446 = xor i32 %445, %444 ; <i32> [#uses=5]
+ %447 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %448 = lshr i32 %446, 24 ; <i32> [#uses=1]
+ %449 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %448; <i32*> [#uses=1]
+ %450 = load i32* %449, align 4 ; <i32> [#uses=1]
+ %451 = lshr i32 %446, 16 ; <i32> [#uses=1]
+ %452 = or i32 %451, 256 ; <i32> [#uses=1]
+ %453 = and i32 %452, 511 ; <i32> [#uses=1]
+ %454 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %453; <i32*> [#uses=1]
+ %455 = load i32* %454, align 4 ; <i32> [#uses=1]
+ %456 = add i32 %455, %450 ; <i32> [#uses=1]
+ %457 = lshr i32 %446, 8 ; <i32> [#uses=1]
+ %458 = or i32 %457, 512 ; <i32> [#uses=1]
+ %459 = and i32 %458, 767 ; <i32> [#uses=1]
+ %460 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %459; <i32*> [#uses=1]
+ %461 = load i32* %460, align 4 ; <i32> [#uses=1]
+ %462 = xor i32 %456, %461 ; <i32> [#uses=1]
+ %463 = or i32 %446, 768 ; <i32> [#uses=1]
+ %464 = and i32 %463, 1023 ; <i32> [#uses=1]
+ %465 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %464; <i32*> [#uses=1]
+ %466 = load i32* %465, align 4 ; <i32> [#uses=1]
+ %467 = add i32 %462, %466 ; <i32> [#uses=1]
+ %468 = xor i32 %447, %422 ; <i32> [#uses=1]
+ %469 = xor i32 %468, %467 ; <i32> [#uses=5]
+ %470 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 10; <i32*> [#uses=1]
+ %471 = load i32* %470, align 4 ; <i32> [#uses=1]
+ %472 = lshr i32 %469, 24 ; <i32> [#uses=1]
+ %473 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %472; <i32*> [#uses=1]
+ %474 = load i32* %473, align 4 ; <i32> [#uses=1]
+ %475 = lshr i32 %469, 16 ; <i32> [#uses=1]
+ %476 = or i32 %475, 256 ; <i32> [#uses=1]
+ %477 = and i32 %476, 511 ; <i32> [#uses=1]
+ %478 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %477; <i32*> [#uses=1]
+ %479 = load i32* %478, align 4 ; <i32> [#uses=1]
+ %480 = add i32 %479, %474 ; <i32> [#uses=1]
+ %481 = lshr i32 %469, 8 ; <i32> [#uses=1]
+ %482 = or i32 %481, 512 ; <i32> [#uses=1]
+ %483 = and i32 %482, 767 ; <i32> [#uses=1]
+ %484 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %483; <i32*> [#uses=1]
+ %485 = load i32* %484, align 4 ; <i32> [#uses=1]
+ %486 = xor i32 %480, %485 ; <i32> [#uses=1]
+ %487 = or i32 %469, 768 ; <i32> [#uses=1]
+ %488 = and i32 %487, 1023 ; <i32> [#uses=1]
+ %489 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %488; <i32*> [#uses=1]
+ %490 = load i32* %489, align 4 ; <i32> [#uses=1]
+ %491 = add i32 %486, %490 ; <i32> [#uses=1]
+ %492 = xor i32 %471, %446 ; <i32> [#uses=1]
+ %493 = xor i32 %492, %491 ; <i32> [#uses=5]
+ %494 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 9; <i32*> [#uses=1]
+ %495 = load i32* %494, align 4 ; <i32> [#uses=1]
+ %496 = lshr i32 %493, 24 ; <i32> [#uses=1]
+ %497 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %496; <i32*> [#uses=1]
+ %498 = load i32* %497, align 4 ; <i32> [#uses=1]
+ %499 = lshr i32 %493, 16 ; <i32> [#uses=1]
+ %500 = or i32 %499, 256 ; <i32> [#uses=1]
+ %501 = and i32 %500, 511 ; <i32> [#uses=1]
+ %502 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %501; <i32*> [#uses=1]
+ %503 = load i32* %502, align 4 ; <i32> [#uses=1]
+ %504 = add i32 %503, %498 ; <i32> [#uses=1]
+ %505 = lshr i32 %493, 8 ; <i32> [#uses=1]
+ %506 = or i32 %505, 512 ; <i32> [#uses=1]
+ %507 = and i32 %506, 767 ; <i32> [#uses=1]
+ %508 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %507; <i32*> [#uses=1]
+ %509 = load i32* %508, align 4 ; <i32> [#uses=1]
+ %510 = xor i32 %504, %509 ; <i32> [#uses=1]
+ %511 = or i32 %493, 768 ; <i32> [#uses=1]
+ %512 = and i32 %511, 1023 ; <i32> [#uses=1]
+ %513 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %512; <i32*> [#uses=1]
+ %514 = load i32* %513, align 4 ; <i32> [#uses=1]
+ %515 = add i32 %510, %514 ; <i32> [#uses=1]
+ %516 = xor i32 %495, %469 ; <i32> [#uses=1]
+ %517 = xor i32 %516, %515 ; <i32> [#uses=5]
+ %518 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 8; <i32*> [#uses=1]
+ %519 = load i32* %518, align 4 ; <i32> [#uses=1]
+ %520 = lshr i32 %517, 24 ; <i32> [#uses=1]
+ %521 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %520; <i32*> [#uses=1]
+ %522 = load i32* %521, align 4 ; <i32> [#uses=1]
+ %523 = lshr i32 %517, 16 ; <i32> [#uses=1]
+ %524 = or i32 %523, 256 ; <i32> [#uses=1]
+ %525 = and i32 %524, 511 ; <i32> [#uses=1]
+ %526 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %525; <i32*> [#uses=1]
+ %527 = load i32* %526, align 4 ; <i32> [#uses=1]
+ %528 = add i32 %527, %522 ; <i32> [#uses=1]
+ %529 = lshr i32 %517, 8 ; <i32> [#uses=1]
+ %530 = or i32 %529, 512 ; <i32> [#uses=1]
+ %531 = and i32 %530, 767 ; <i32> [#uses=1]
+ %532 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %531; <i32*> [#uses=1]
+ %533 = load i32* %532, align 4 ; <i32> [#uses=1]
+ %534 = xor i32 %528, %533 ; <i32> [#uses=1]
+ %535 = or i32 %517, 768 ; <i32> [#uses=1]
+ %536 = and i32 %535, 1023 ; <i32> [#uses=1]
+ %537 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %536; <i32*> [#uses=1]
+ %538 = load i32* %537, align 4 ; <i32> [#uses=1]
+ %539 = add i32 %534, %538 ; <i32> [#uses=1]
+ %540 = xor i32 %519, %493 ; <i32> [#uses=1]
+ %541 = xor i32 %540, %539 ; <i32> [#uses=5]
+ %542 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %543 = lshr i32 %541, 24 ; <i32> [#uses=1]
+ %544 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %543; <i32*> [#uses=1]
+ %545 = load i32* %544, align 4 ; <i32> [#uses=1]
+ %546 = lshr i32 %541, 16 ; <i32> [#uses=1]
+ %547 = or i32 %546, 256 ; <i32> [#uses=1]
+ %548 = and i32 %547, 511 ; <i32> [#uses=1]
+ %549 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %548; <i32*> [#uses=1]
+ %550 = load i32* %549, align 4 ; <i32> [#uses=1]
+ %551 = add i32 %550, %545 ; <i32> [#uses=1]
+ %552 = lshr i32 %541, 8 ; <i32> [#uses=1]
+ %553 = or i32 %552, 512 ; <i32> [#uses=1]
+ %554 = and i32 %553, 767 ; <i32> [#uses=1]
+ %555 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %554; <i32*> [#uses=1]
+ %556 = load i32* %555, align 4 ; <i32> [#uses=1]
+ %557 = xor i32 %551, %556 ; <i32> [#uses=1]
+ %558 = or i32 %541, 768 ; <i32> [#uses=1]
+ %559 = and i32 %558, 1023 ; <i32> [#uses=1]
+ %560 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %559; <i32*> [#uses=1]
+ %561 = load i32* %560, align 4 ; <i32> [#uses=1]
+ %562 = add i32 %557, %561 ; <i32> [#uses=1]
+ %563 = xor i32 %542, %517 ; <i32> [#uses=1]
+ %564 = xor i32 %563, %562 ; <i32> [#uses=5]
+ %565 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 6; <i32*> [#uses=1]
+ %566 = load i32* %565, align 4 ; <i32> [#uses=1]
+ %567 = lshr i32 %564, 24 ; <i32> [#uses=1]
+ %568 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %567; <i32*> [#uses=1]
+ %569 = load i32* %568, align 4 ; <i32> [#uses=1]
+ %570 = lshr i32 %564, 16 ; <i32> [#uses=1]
+ %571 = or i32 %570, 256 ; <i32> [#uses=1]
+ %572 = and i32 %571, 511 ; <i32> [#uses=1]
+ %573 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %572; <i32*> [#uses=1]
+ %574 = load i32* %573, align 4 ; <i32> [#uses=1]
+ %575 = add i32 %574, %569 ; <i32> [#uses=1]
+ %576 = lshr i32 %564, 8 ; <i32> [#uses=1]
+ %577 = or i32 %576, 512 ; <i32> [#uses=1]
+ %578 = and i32 %577, 767 ; <i32> [#uses=1]
+ %579 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %578; <i32*> [#uses=1]
+ %580 = load i32* %579, align 4 ; <i32> [#uses=1]
+ %581 = xor i32 %575, %580 ; <i32> [#uses=1]
+ %582 = or i32 %564, 768 ; <i32> [#uses=1]
+ %583 = and i32 %582, 1023 ; <i32> [#uses=1]
+ %584 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %583; <i32*> [#uses=1]
+ %585 = load i32* %584, align 4 ; <i32> [#uses=1]
+ %586 = add i32 %581, %585 ; <i32> [#uses=1]
+ %587 = xor i32 %566, %541 ; <i32> [#uses=1]
+ %588 = xor i32 %587, %586 ; <i32> [#uses=5]
+ %589 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 5; <i32*> [#uses=1]
+ %590 = load i32* %589, align 4 ; <i32> [#uses=1]
+ %591 = lshr i32 %588, 24 ; <i32> [#uses=1]
+ %592 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %591; <i32*> [#uses=1]
+ %593 = load i32* %592, align 4 ; <i32> [#uses=1]
+ %594 = lshr i32 %588, 16 ; <i32> [#uses=1]
+ %595 = or i32 %594, 256 ; <i32> [#uses=1]
+ %596 = and i32 %595, 511 ; <i32> [#uses=1]
+ %597 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %596; <i32*> [#uses=1]
+ %598 = load i32* %597, align 4 ; <i32> [#uses=1]
+ %599 = add i32 %598, %593 ; <i32> [#uses=1]
+ %600 = lshr i32 %588, 8 ; <i32> [#uses=1]
+ %601 = or i32 %600, 512 ; <i32> [#uses=1]
+ %602 = and i32 %601, 767 ; <i32> [#uses=1]
+ %603 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %602; <i32*> [#uses=1]
+ %604 = load i32* %603, align 4 ; <i32> [#uses=1]
+ %605 = xor i32 %599, %604 ; <i32> [#uses=1]
+ %606 = or i32 %588, 768 ; <i32> [#uses=1]
+ %607 = and i32 %606, 1023 ; <i32> [#uses=1]
+ %608 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %607; <i32*> [#uses=1]
+ %609 = load i32* %608, align 4 ; <i32> [#uses=1]
+ %610 = add i32 %605, %609 ; <i32> [#uses=1]
+ %611 = xor i32 %590, %564 ; <i32> [#uses=1]
+ %612 = xor i32 %611, %610 ; <i32> [#uses=5]
+ %613 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 4; <i32*> [#uses=1]
+ %614 = load i32* %613, align 4 ; <i32> [#uses=1]
+ %615 = lshr i32 %612, 24 ; <i32> [#uses=1]
+ %616 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %615; <i32*> [#uses=1]
+ %617 = load i32* %616, align 4 ; <i32> [#uses=1]
+ %618 = lshr i32 %612, 16 ; <i32> [#uses=1]
+ %619 = or i32 %618, 256 ; <i32> [#uses=1]
+ %620 = and i32 %619, 511 ; <i32> [#uses=1]
+ %621 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %620; <i32*> [#uses=1]
+ %622 = load i32* %621, align 4 ; <i32> [#uses=1]
+ %623 = add i32 %622, %617 ; <i32> [#uses=1]
+ %624 = lshr i32 %612, 8 ; <i32> [#uses=1]
+ %625 = or i32 %624, 512 ; <i32> [#uses=1]
+ %626 = and i32 %625, 767 ; <i32> [#uses=1]
+ %627 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %626; <i32*> [#uses=1]
+ %628 = load i32* %627, align 4 ; <i32> [#uses=1]
+ %629 = xor i32 %623, %628 ; <i32> [#uses=1]
+ %630 = or i32 %612, 768 ; <i32> [#uses=1]
+ %631 = and i32 %630, 1023 ; <i32> [#uses=1]
+ %632 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %631; <i32*> [#uses=1]
+ %633 = load i32* %632, align 4 ; <i32> [#uses=1]
+ %634 = add i32 %629, %633 ; <i32> [#uses=1]
+ %635 = xor i32 %614, %588 ; <i32> [#uses=1]
+ %636 = xor i32 %635, %634 ; <i32> [#uses=5]
+ %637 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 3; <i32*> [#uses=1]
+ %638 = load i32* %637, align 4 ; <i32> [#uses=1]
+ %639 = lshr i32 %636, 24 ; <i32> [#uses=1]
+ %640 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %639; <i32*> [#uses=1]
+ %641 = load i32* %640, align 4 ; <i32> [#uses=1]
+ %642 = lshr i32 %636, 16 ; <i32> [#uses=1]
+ %643 = or i32 %642, 256 ; <i32> [#uses=1]
+ %644 = and i32 %643, 511 ; <i32> [#uses=1]
+ %645 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %644; <i32*> [#uses=1]
+ %646 = load i32* %645, align 4 ; <i32> [#uses=1]
+ %647 = add i32 %646, %641 ; <i32> [#uses=1]
+ %648 = lshr i32 %636, 8 ; <i32> [#uses=1]
+ %649 = or i32 %648, 512 ; <i32> [#uses=1]
+ %650 = and i32 %649, 767 ; <i32> [#uses=1]
+ %651 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %650; <i32*> [#uses=1]
+ %652 = load i32* %651, align 4 ; <i32> [#uses=1]
+ %653 = xor i32 %647, %652 ; <i32> [#uses=1]
+ %654 = or i32 %636, 768 ; <i32> [#uses=1]
+ %655 = and i32 %654, 1023 ; <i32> [#uses=1]
+ %656 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %655; <i32*> [#uses=1]
+ %657 = load i32* %656, align 4 ; <i32> [#uses=1]
+ %658 = add i32 %653, %657 ; <i32> [#uses=1]
+ %659 = xor i32 %638, %612 ; <i32> [#uses=1]
+ %660 = xor i32 %659, %658 ; <i32> [#uses=5]
+ %661 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %662 = lshr i32 %660, 24 ; <i32> [#uses=1]
+ %663 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %662; <i32*> [#uses=1]
+ %664 = load i32* %663, align 4 ; <i32> [#uses=1]
+ %665 = lshr i32 %660, 16 ; <i32> [#uses=1]
+ %666 = or i32 %665, 256 ; <i32> [#uses=1]
+ %667 = and i32 %666, 511 ; <i32> [#uses=1]
+ %668 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %667; <i32*> [#uses=1]
+ %669 = load i32* %668, align 4 ; <i32> [#uses=1]
+ %670 = add i32 %669, %664 ; <i32> [#uses=1]
+ %671 = lshr i32 %660, 8 ; <i32> [#uses=1]
+ %672 = or i32 %671, 512 ; <i32> [#uses=1]
+ %673 = and i32 %672, 767 ; <i32> [#uses=1]
+ %674 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %673; <i32*> [#uses=1]
+ %675 = load i32* %674, align 4 ; <i32> [#uses=1]
+ %676 = xor i32 %670, %675 ; <i32> [#uses=1]
+ %677 = or i32 %660, 768 ; <i32> [#uses=1]
+ %678 = and i32 %677, 1023 ; <i32> [#uses=1]
+ %679 = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %678; <i32*> [#uses=1]
+ %680 = load i32* %679, align 4 ; <i32> [#uses=1]
+ %681 = add i32 %676, %680 ; <i32> [#uses=1]
+ %682 = xor i32 %661, %636 ; <i32> [#uses=1]
+ %683 = xor i32 %682, %681 ; <i32> [#uses=5]
+ %684 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 1; <i32*> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %.pn2.in = phi i32* [ %329, %bb ], [ %0, %bb1 ]; <i32*> [#uses=1]
+ %.pn3 = phi i32 [ %328, %bb ], [ %683, %bb1 ]; <i32> [#uses=1]
+ %.pn15.in = phi i32 [ %328, %bb ], [ %683, %bb1 ]; <i32> [#uses=1]
+ %.pn14.in.in.in = phi i32 [ %328, %bb ], [ %683, %bb1 ]; <i32> [#uses=1]
+ %.pn13.in.in.in = phi i32 [ %328, %bb ], [ %683, %bb1 ]; <i32> [#uses=1]
+ %.pn10.in.in = phi i32 [ %328, %bb ], [ %683, %bb1 ]; <i32> [#uses=1]
+ %.pn4.in = phi i32* [ null, %bb ], [ %684, %bb1 ]; <i32*> [#uses=1]
+ %.pn5 = phi i32 [ 0, %bb ], [ %660, %bb1 ]; <i32> [#uses=1]
+ %.pn14.in.in = lshr i32 %.pn14.in.in.in, 16; <i32> [#uses=1]
+ %.pn14.in = or i32 %.pn14.in.in, 256 ; <i32> [#uses=1]
+ %.pn13.in.in = lshr i32 %.pn13.in.in.in, 8; <i32> [#uses=1]
+ %.pn15 = lshr i32 %.pn15.in, 24 ; <i32> [#uses=1]
+ %.pn14 = and i32 %.pn14.in, 511 ; <i32> [#uses=1]
+ %.pn13.in = or i32 %.pn13.in.in, 512 ; <i32> [#uses=1]
+ %.pn11.in = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %.pn15; <i32*> [#uses=1]
+ %.pn12.in = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %.pn14; <i32*> [#uses=1]
+ %.pn13 = and i32 %.pn13.in, 767 ; <i32> [#uses=1]
+ %.pn10.in = or i32 %.pn10.in.in, 768 ; <i32> [#uses=1]
+ %.pn11 = load i32* %.pn11.in ; <i32> [#uses=1]
+ %.pn12 = load i32* %.pn12.in ; <i32> [#uses=1]
+ %.pn9.in = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %.pn13; <i32*> [#uses=1]
+ %.pn10 = and i32 %.pn10.in, 1023 ; <i32> [#uses=1]
+ %.pn8 = add i32 %.pn12, %.pn11 ; <i32> [#uses=1]
+ %.pn9 = load i32* %.pn9.in ; <i32> [#uses=1]
+ %.pn7.in = getelementptr %struct.BF_KEY* %key, i32 0, i32 1, i32 %.pn10; <i32*> [#uses=1]
+ %.pn6 = xor i32 %.pn8, %.pn9 ; <i32> [#uses=1]
+ %.pn7 = load i32* %.pn7.in ; <i32> [#uses=1]
+ %.pn4 = load i32* %.pn4.in ; <i32> [#uses=1]
+ %.pn2 = load i32* %.pn2.in ; <i32> [#uses=1]
+ %.pn = add i32 %.pn6, %.pn7 ; <i32> [#uses=1]
+ %r.0 = xor i32 %.pn2, %.pn3 ; <i32> [#uses=1]
+ %.pn1 = xor i32 %.pn, %.pn5 ; <i32> [#uses=1]
+ %l.0 = xor i32 %.pn1, %.pn4 ; <i32> [#uses=1]
+ store i32 %l.0, i32* undef, align 4
+ store i32 %r.0, i32* %data, align 4
+ ret void
+}
diff --git a/test/CodeGen/Thumb/2009-08-12-RegInfoAssert.ll b/test/CodeGen/Thumb/2009-08-12-RegInfoAssert.ll
new file mode 100644
index 0000000..b6e67b1
--- /dev/null
+++ b/test/CodeGen/Thumb/2009-08-12-RegInfoAssert.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin
+
+ %struct.vorbis_comment = type { i8**, i32*, i32, i8* }
[email protected] = external constant [2 x i8], align 1 ; <[2 x i8]*> [#uses=1]
+
+declare arm_apcscc i8* @__strcpy_chk(i8*, i8*, i32) nounwind
+
+declare arm_apcscc i8* @__strcat_chk(i8*, i8*, i32) nounwind
+
+define arm_apcscc i8* @vorbis_comment_query(%struct.vorbis_comment* nocapture %vc, i8* %tag, i32 %count) nounwind {
+entry:
+ %0 = alloca i8, i32 undef, align 4 ; <i8*> [#uses=2]
+ %1 = call arm_apcscc i8* @__strcpy_chk(i8* %0, i8* %tag, i32 -1) nounwind; <i8*> [#uses=0]
+ %2 = call arm_apcscc i8* @__strcat_chk(i8* %0, i8* getelementptr ([2 x i8]* @.str16, i32 0, i32 0), i32 -1) nounwind; <i8*> [#uses=0]
+ %3 = getelementptr %struct.vorbis_comment* %vc, i32 0, i32 0; <i8***> [#uses=1]
+ br label %bb11
+
+bb6: ; preds = %bb11
+ %4 = load i8*** %3, align 4 ; <i8**> [#uses=1]
+ %scevgep = getelementptr i8** %4, i32 %8 ; <i8**> [#uses=1]
+ %5 = load i8** %scevgep, align 4 ; <i8*> [#uses=1]
+ br label %bb3.i
+
+bb3.i: ; preds = %bb3.i, %bb6
+ %scevgep7.i = getelementptr i8* %5, i32 0 ; <i8*> [#uses=1]
+ %6 = load i8* %scevgep7.i, align 1 ; <i8> [#uses=0]
+ br i1 undef, label %bb3.i, label %bb10
+
+bb10: ; preds = %bb3.i
+ %7 = add i32 %8, 1 ; <i32> [#uses=1]
+ br label %bb11
+
+bb11: ; preds = %bb10, %entry
+ %8 = phi i32 [ %7, %bb10 ], [ 0, %entry ] ; <i32> [#uses=3]
+ %9 = icmp sgt i32 undef, %8 ; <i1> [#uses=1]
+ br i1 %9, label %bb6, label %bb13
+
+bb13: ; preds = %bb11
+ ret i8* null
+}
diff --git a/test/CodeGen/Thumb/2009-08-20-ISelBug.ll b/test/CodeGen/Thumb/2009-08-20-ISelBug.ll
new file mode 100644
index 0000000..c31b65b
--- /dev/null
+++ b/test/CodeGen/Thumb/2009-08-20-ISelBug.ll
@@ -0,0 +1,66 @@
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin -relocation-model=pic -disable-fp-elim -mattr=+v6 | FileCheck %s
+; rdar://7157006
+
+%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+%struct.__sFILEX = type opaque
+%struct.__sbuf = type { i8*, i32 }
+%struct.asl_file_t = type { i32, i32, i32, %struct.file_string_t*, i64, i64, i64, i64, i64, i64, i32, %struct.FILE*, i8*, i8* }
+%struct.file_string_t = type { i64, i32, %struct.file_string_t*, [0 x i8] }
+
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 (%struct.asl_file_t*, i64, i64*)* @t to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define arm_apcscc i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
+; CHECK: t:
+; CHECK: adds r3, #8
+entry:
+ %val = alloca i64, align 4 ; <i64*> [#uses=3]
+ %0 = icmp eq %struct.asl_file_t* %s, null ; <i1> [#uses=1]
+ br i1 %0, label %bb13, label %bb1
+
+bb1: ; preds = %entry
+ %1 = getelementptr inbounds %struct.asl_file_t* %s, i32 0, i32 11 ; <%struct.FILE**> [#uses=2]
+ %2 = load %struct.FILE** %1, align 4 ; <%struct.FILE*> [#uses=2]
+ %3 = icmp eq %struct.FILE* %2, null ; <i1> [#uses=1]
+ br i1 %3, label %bb13, label %bb3
+
+bb3: ; preds = %bb1
+ %4 = add nsw i64 %off, 8 ; <i64> [#uses=1]
+ %5 = getelementptr inbounds %struct.asl_file_t* %s, i32 0, i32 10 ; <i32*> [#uses=1]
+ %6 = load i32* %5, align 4 ; <i32> [#uses=1]
+ %7 = zext i32 %6 to i64 ; <i64> [#uses=1]
+ %8 = icmp sgt i64 %4, %7 ; <i1> [#uses=1]
+ br i1 %8, label %bb13, label %bb5
+
+bb5: ; preds = %bb3
+ %9 = call arm_apcscc i32 @fseeko(%struct.FILE* %2, i64 %off, i32 0) nounwind ; <i32> [#uses=1]
+ %10 = icmp eq i32 %9, 0 ; <i1> [#uses=1]
+ br i1 %10, label %bb7, label %bb13
+
+bb7: ; preds = %bb5
+ store i64 0, i64* %val, align 4
+ %11 = load %struct.FILE** %1, align 4 ; <%struct.FILE*> [#uses=1]
+ %val8 = bitcast i64* %val to i8* ; <i8*> [#uses=1]
+ %12 = call arm_apcscc i32 @fread(i8* noalias %val8, i32 8, i32 1, %struct.FILE* noalias %11) nounwind ; <i32> [#uses=1]
+ %13 = icmp eq i32 %12, 1 ; <i1> [#uses=1]
+ br i1 %13, label %bb10, label %bb13
+
+bb10: ; preds = %bb7
+ %14 = icmp eq i64* %out, null ; <i1> [#uses=1]
+ br i1 %14, label %bb13, label %bb11
+
+bb11: ; preds = %bb10
+ %15 = load i64* %val, align 4 ; <i64> [#uses=1]
+ %16 = call arm_apcscc i64 @asl_core_ntohq(i64 %15) nounwind ; <i64> [#uses=1]
+ store i64 %16, i64* %out, align 4
+ ret i32 0
+
+bb13: ; preds = %bb10, %bb7, %bb5, %bb3, %bb1, %entry
+ %.0 = phi i32 [ 2, %entry ], [ 2, %bb1 ], [ 7, %bb3 ], [ 7, %bb5 ], [ 7, %bb7 ], [ 0, %bb10 ] ; <i32> [#uses=1]
+ ret i32 %.0
+}
+
+declare arm_apcscc i32 @fseeko(%struct.FILE* nocapture, i64, i32) nounwind
+
+declare arm_apcscc i32 @fread(i8* noalias nocapture, i32, i32, %struct.FILE* noalias nocapture) nounwind
+
+declare arm_apcscc i64 @asl_core_ntohq(i64)
diff --git a/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll
new file mode 100644
index 0000000..2a5d9d6
--- /dev/null
+++ b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll
@@ -0,0 +1,66 @@
+; RUN: llc -O3 < %s | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+target triple = "thumbv7-apple-darwin10"
+
+; This test should not produce any spills, even when tail duplication creates lots of phi nodes.
+; CHECK-NOT: push
+; CHECK-NOT: pop
+; CHECK: bx lr
+
[email protected] = internal constant [5 x i8*] [i8* blockaddress(@interpret_threaded, %RETURN), i8* blockaddress(@interpret_threaded, %INCREMENT), i8* blockaddress(@interpret_threaded, %DECREMENT), i8* blockaddress(@interpret_threaded, %DOUBLE), i8* blockaddress(@interpret_threaded, %SWAPWORD)] ; <[5 x i8*]*> [#uses=5]
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 (i8*)* @interpret_threaded to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define arm_apcscc i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
+entry:
+ %0 = load i8* %opcodes, align 1 ; <i8> [#uses=1]
+ %1 = zext i8 %0 to i32 ; <i32> [#uses=1]
+ %2 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %1 ; <i8**> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb.backedge, %entry
+ %indvar = phi i32 [ %phitmp, %bb.backedge ], [ 1, %entry ] ; <i32> [#uses=2]
+ %gotovar.22.0.in = phi i8** [ %gotovar.22.0.in.be, %bb.backedge ], [ %2, %entry ] ; <i8**> [#uses=1]
+ %result.0 = phi i32 [ %result.0.be, %bb.backedge ], [ 0, %entry ] ; <i32> [#uses=6]
+ %opcodes_addr.0 = getelementptr i8* %opcodes, i32 %indvar ; <i8*> [#uses=4]
+ %gotovar.22.0 = load i8** %gotovar.22.0.in, align 4 ; <i8*> [#uses=1]
+ indirectbr i8* %gotovar.22.0, [label %RETURN, label %INCREMENT, label %DECREMENT, label %DOUBLE, label %SWAPWORD]
+
+RETURN: ; preds = %bb
+ ret i32 %result.0
+
+INCREMENT: ; preds = %bb
+ %3 = add nsw i32 %result.0, 1 ; <i32> [#uses=1]
+ %4 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
+ %5 = zext i8 %4 to i32 ; <i32> [#uses=1]
+ %6 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %5 ; <i8**> [#uses=1]
+ br label %bb.backedge
+
+bb.backedge: ; preds = %SWAPWORD, %DOUBLE, %DECREMENT, %INCREMENT
+ %gotovar.22.0.in.be = phi i8** [ %20, %SWAPWORD ], [ %14, %DOUBLE ], [ %10, %DECREMENT ], [ %6, %INCREMENT ] ; <i8**> [#uses=1]
+ %result.0.be = phi i32 [ %17, %SWAPWORD ], [ %11, %DOUBLE ], [ %7, %DECREMENT ], [ %3, %INCREMENT ] ; <i32> [#uses=1]
+ %phitmp = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb
+
+DECREMENT: ; preds = %bb
+ %7 = add i32 %result.0, -1 ; <i32> [#uses=1]
+ %8 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
+ %9 = zext i8 %8 to i32 ; <i32> [#uses=1]
+ %10 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %9 ; <i8**> [#uses=1]
+ br label %bb.backedge
+
+DOUBLE: ; preds = %bb
+ %11 = shl i32 %result.0, 1 ; <i32> [#uses=1]
+ %12 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
+ %13 = zext i8 %12 to i32 ; <i32> [#uses=1]
+ %14 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %13 ; <i8**> [#uses=1]
+ br label %bb.backedge
+
+SWAPWORD: ; preds = %bb
+ %15 = shl i32 %result.0, 16 ; <i32> [#uses=1]
+ %16 = ashr i32 %result.0, 16 ; <i32> [#uses=1]
+ %17 = or i32 %15, %16 ; <i32> [#uses=1]
+ %18 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
+ %19 = zext i8 %18 to i32 ; <i32> [#uses=1]
+ %20 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %19 ; <i8**> [#uses=1]
+ br label %bb.backedge
+}
diff --git a/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll b/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
new file mode 100644
index 0000000..d676369
--- /dev/null
+++ b/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -regalloc=local -relocation-model=pic | FileCheck %s
+
+target triple = "thumbv6-apple-darwin10"
+
+@fred = internal global i32 0 ; <i32*> [#uses=1]
+
+define arm_apcscc void @foo() nounwind {
+entry:
+; CHECK: str r0, [sp]
+ %0 = call arm_apcscc i32 (...)* @bar() nounwind ; <i32> [#uses=1]
+; CHECK: blx _bar
+; CHECK: ldr r1, [sp]
+ store i32 %0, i32* @fred, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare arm_apcscc i32 @bar(...)
diff --git a/test/CodeGen/Thumb/asmprinter-bug.ll b/test/CodeGen/Thumb/asmprinter-bug.ll
new file mode 100644
index 0000000..1e3c070
--- /dev/null
+++ b/test/CodeGen/Thumb/asmprinter-bug.ll
@@ -0,0 +1,288 @@
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin10 | grep rsbs | grep {#0}
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.adpcm_state = type { i16, i8 }
+@stepsizeTable = internal constant [89 x i32] [i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 16, i32 17, i32 19, i32 21, i32 23, i32 25, i32 28, i32 31, i32 34, i32 37, i32 41, i32 45, i32 50, i32 55, i32 60, i32 66, i32 73, i32 80, i32 88, i32 97, i32 107, i32 118, i32 130, i32 143, i32 157, i32 173, i32 190, i32 209, i32 230, i32 253, i32 279, i32 307, i32 337, i32 371, i32 408, i32 449, i32 494, i32 544, i32 598, i32 658, i32 724, i32 796, i32 876, i32 963, i32 1060, i32 1166, i32 1282, i32 1411, i32 1552, i32 1707, i32 1878, i32 2066, i32 2272, i32 2499, i32 2749, i32 3024, i32 3327, i32 3660, i32 4026, i32 4428, i32 4871, i32 5358, i32 5894, i32 6484, i32 7132, i32 7845, i32 8630, i32 9493, i32 10442, i32 11487, i32 12635, i32 13899, i32 15289, i32 16818, i32 18500, i32 20350, i32 22385, i32 24623, i32 27086, i32 29794, i32 32767] ; <[89 x i32]*> [#uses=4]
+@indexTable = internal constant [16 x i32] [i32 -1, i32 -1, i32 -1, i32 -1, i32 2, i32 4, i32 6, i32 8, i32 -1, i32 -1, i32 -1, i32 -1, i32 2, i32 4, i32 6, i32 8] ; <[16 x i32]*> [#uses=2]
+@abuf = common global [500 x i8] zeroinitializer ; <[500 x i8]*> [#uses=1]
[email protected] = private constant [11 x i8] c"input file\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[11 x i8]*> [#uses=1]
+@sbuf = common global [1000 x i16] zeroinitializer ; <[1000 x i16]*> [#uses=1]
+@state = common global %struct.adpcm_state zeroinitializer ; <%struct.adpcm_state*> [#uses=3]
+@__stderrp = external global %struct.FILE* ; <%struct.FILE**> [#uses=1]
[email protected] = private constant [28 x i8] c"Final valprev=%d, index=%d\0A\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[28 x i8]*> [#uses=1]
+
+define arm_apcscc void @adpcm_coder(i16* nocapture %indata, i8* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
+entry:
+ %0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0 ; <i16*> [#uses=2]
+ %1 = load i16* %0, align 2 ; <i16> [#uses=1]
+ %2 = sext i16 %1 to i32 ; <i32> [#uses=2]
+ %3 = getelementptr %struct.adpcm_state* %state, i32 0, i32 1 ; <i8*> [#uses=2]
+ %4 = load i8* %3, align 2 ; <i8> [#uses=1]
+ %5 = sext i8 %4 to i32 ; <i32> [#uses=3]
+ %6 = getelementptr [89 x i32]* @stepsizeTable, i32 0, i32 %5 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ %8 = icmp sgt i32 %len, 0 ; <i1> [#uses=1]
+ br i1 %8, label %bb, label %bb27
+
+bb: ; preds = %bb25, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb25 ] ; <i32> [#uses=2]
+ %outp.136 = phi i8* [ %outdata, %entry ], [ %outp.0, %bb25 ] ; <i8*> [#uses=3]
+ %bufferstep.035 = phi i32 [ 1, %entry ], [ %tmp, %bb25 ] ; <i32> [#uses=3]
+ %outputbuffer.134 = phi i32 [ undef, %entry ], [ %outputbuffer.0, %bb25 ] ; <i32> [#uses=2]
+ %index.033 = phi i32 [ %5, %entry ], [ %index.2, %bb25 ] ; <i32> [#uses=1]
+ %valpred.132 = phi i32 [ %2, %entry ], [ %valpred.2, %bb25 ] ; <i32> [#uses=2]
+ %step.031 = phi i32 [ %7, %entry ], [ %36, %bb25 ] ; <i32> [#uses=5]
+ %inp.038 = getelementptr i16* %indata, i32 %indvar ; <i16*> [#uses=1]
+ %9 = load i16* %inp.038, align 2 ; <i16> [#uses=1]
+ %10 = sext i16 %9 to i32 ; <i32> [#uses=1]
+ %11 = sub i32 %10, %valpred.132 ; <i32> [#uses=3]
+ %12 = icmp slt i32 %11, 0 ; <i1> [#uses=1]
+ %iftmp.1.0 = select i1 %12, i32 8, i32 0 ; <i32> [#uses=2]
+ %13 = sub i32 0, %11 ; <i32> [#uses=1]
+ %14 = icmp eq i32 %iftmp.1.0, 0 ; <i1> [#uses=2]
+ %. = select i1 %14, i32 %11, i32 %13 ; <i32> [#uses=2]
+ %15 = ashr i32 %step.031, 3 ; <i32> [#uses=1]
+ %16 = icmp slt i32 %., %step.031 ; <i1> [#uses=2]
+ %delta.0 = select i1 %16, i32 0, i32 4 ; <i32> [#uses=2]
+ %17 = select i1 %16, i32 0, i32 %step.031 ; <i32> [#uses=2]
+ %diff.1 = sub i32 %., %17 ; <i32> [#uses=2]
+ %18 = ashr i32 %step.031, 1 ; <i32> [#uses=2]
+ %19 = icmp slt i32 %diff.1, %18 ; <i1> [#uses=2]
+ %20 = or i32 %delta.0, 2 ; <i32> [#uses=1]
+ %21 = select i1 %19, i32 %delta.0, i32 %20 ; <i32> [#uses=1]
+ %22 = select i1 %19, i32 0, i32 %18 ; <i32> [#uses=2]
+ %diff.2 = sub i32 %diff.1, %22 ; <i32> [#uses=1]
+ %23 = ashr i32 %step.031, 2 ; <i32> [#uses=2]
+ %24 = icmp slt i32 %diff.2, %23 ; <i1> [#uses=2]
+ %25 = zext i1 %24 to i32 ; <i32> [#uses=1]
+ %26 = select i1 %24, i32 0, i32 %23 ; <i32> [#uses=1]
+ %vpdiff.0 = add i32 %17, %15 ; <i32> [#uses=1]
+ %vpdiff.1 = add i32 %vpdiff.0, %22 ; <i32> [#uses=1]
+ %vpdiff.2 = add i32 %vpdiff.1, %26 ; <i32> [#uses=2]
+ %tmp30 = sub i32 0, %vpdiff.2 ; <i32> [#uses=1]
+ %valpred.0.p = select i1 %14, i32 %vpdiff.2, i32 %tmp30 ; <i32> [#uses=1]
+ %valpred.0 = add i32 %valpred.0.p, %valpred.132 ; <i32> [#uses=3]
+ %27 = icmp sgt i32 %valpred.0, 32767 ; <i1> [#uses=1]
+ br i1 %27, label %bb18, label %bb16
+
+bb16: ; preds = %bb
+ %28 = icmp slt i32 %valpred.0, -32768 ; <i1> [#uses=1]
+ br i1 %28, label %bb17, label %bb18
+
+bb17: ; preds = %bb16
+ br label %bb18
+
+bb18: ; preds = %bb17, %bb16, %bb
+ %valpred.2 = phi i32 [ -32768, %bb17 ], [ 32767, %bb ], [ %valpred.0, %bb16 ] ; <i32> [#uses=2]
+ %delta.1 = or i32 %21, %iftmp.1.0 ; <i32> [#uses=1]
+ %delta.2 = or i32 %delta.1, %25 ; <i32> [#uses=1]
+ %29 = xor i32 %delta.2, 1 ; <i32> [#uses=3]
+ %30 = getelementptr [16 x i32]* @indexTable, i32 0, i32 %29 ; <i32*> [#uses=1]
+ %31 = load i32* %30, align 4 ; <i32> [#uses=1]
+ %32 = add i32 %31, %index.033 ; <i32> [#uses=2]
+ %33 = icmp slt i32 %32, 0 ; <i1> [#uses=1]
+ %index.1 = select i1 %33, i32 0, i32 %32 ; <i32> [#uses=2]
+ %34 = icmp sgt i32 %index.1, 88 ; <i1> [#uses=1]
+ %index.2 = select i1 %34, i32 88, i32 %index.1 ; <i32> [#uses=3]
+ %35 = getelementptr [89 x i32]* @stepsizeTable, i32 0, i32 %index.2 ; <i32*> [#uses=1]
+ %36 = load i32* %35, align 4 ; <i32> [#uses=1]
+ %37 = icmp eq i32 %bufferstep.035, 0 ; <i1> [#uses=1]
+ br i1 %37, label %bb24, label %bb23
+
+bb23: ; preds = %bb18
+ %38 = shl i32 %29, 4 ; <i32> [#uses=1]
+ %39 = and i32 %38, 240 ; <i32> [#uses=1]
+ br label %bb25
+
+bb24: ; preds = %bb18
+ %40 = trunc i32 %29 to i8 ; <i8> [#uses=1]
+ %41 = and i8 %40, 15 ; <i8> [#uses=1]
+ %42 = trunc i32 %outputbuffer.134 to i8 ; <i8> [#uses=1]
+ %43 = or i8 %41, %42 ; <i8> [#uses=1]
+ store i8 %43, i8* %outp.136, align 1
+ %44 = getelementptr i8* %outp.136, i32 1 ; <i8*> [#uses=1]
+ br label %bb25
+
+bb25: ; preds = %bb24, %bb23
+ %outputbuffer.0 = phi i32 [ %39, %bb23 ], [ %outputbuffer.134, %bb24 ] ; <i32> [#uses=2]
+ %outp.0 = phi i8* [ %outp.136, %bb23 ], [ %44, %bb24 ] ; <i8*> [#uses=2]
+ %tmp = xor i32 %bufferstep.035, 1 ; <i32> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %len ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb26.bb27_crit_edge, label %bb
+
+bb26.bb27_crit_edge: ; preds = %bb25
+ %phitmp44 = icmp eq i32 %bufferstep.035, 1 ; <i1> [#uses=1]
+ br label %bb27
+
+bb27: ; preds = %bb26.bb27_crit_edge, %entry
+ %outp.1.lcssa = phi i8* [ %outp.0, %bb26.bb27_crit_edge ], [ %outdata, %entry ] ; <i8*> [#uses=1]
+ %bufferstep.0.lcssa = phi i1 [ %phitmp44, %bb26.bb27_crit_edge ], [ false, %entry ] ; <i1> [#uses=1]
+ %outputbuffer.1.lcssa = phi i32 [ %outputbuffer.0, %bb26.bb27_crit_edge ], [ undef, %entry ] ; <i32> [#uses=1]
+ %index.0.lcssa = phi i32 [ %index.2, %bb26.bb27_crit_edge ], [ %5, %entry ] ; <i32> [#uses=1]
+ %valpred.1.lcssa = phi i32 [ %valpred.2, %bb26.bb27_crit_edge ], [ %2, %entry ] ; <i32> [#uses=1]
+ br i1 %bufferstep.0.lcssa, label %bb28, label %bb29
+
+bb28: ; preds = %bb27
+ %45 = trunc i32 %outputbuffer.1.lcssa to i8 ; <i8> [#uses=1]
+ store i8 %45, i8* %outp.1.lcssa, align 1
+ br label %bb29
+
+bb29: ; preds = %bb28, %bb27
+ %46 = trunc i32 %valpred.1.lcssa to i16 ; <i16> [#uses=1]
+ store i16 %46, i16* %0, align 2
+ %47 = trunc i32 %index.0.lcssa to i8 ; <i8> [#uses=1]
+ store i8 %47, i8* %3, align 2
+ ret void
+}
+
+define arm_apcscc void @adpcm_decoder(i8* nocapture %indata, i16* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
+entry:
+ %0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0 ; <i16*> [#uses=2]
+ %1 = load i16* %0, align 2 ; <i16> [#uses=1]
+ %2 = sext i16 %1 to i32 ; <i32> [#uses=2]
+ %3 = getelementptr %struct.adpcm_state* %state, i32 0, i32 1 ; <i8*> [#uses=2]
+ %4 = load i8* %3, align 2 ; <i8> [#uses=1]
+ %5 = sext i8 %4 to i32 ; <i32> [#uses=3]
+ %6 = getelementptr [89 x i32]* @stepsizeTable, i32 0, i32 %5 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ %8 = icmp sgt i32 %len, 0 ; <i1> [#uses=1]
+ br i1 %8, label %bb, label %bb22
+
+bb: ; preds = %bb20, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb20 ] ; <i32> [#uses=2]
+ %inp.131 = phi i8* [ %indata, %entry ], [ %inp.0, %bb20 ] ; <i8*> [#uses=3]
+ %bufferstep.028 = phi i32 [ 0, %entry ], [ %tmp, %bb20 ] ; <i32> [#uses=2]
+ %inputbuffer.127 = phi i32 [ undef, %entry ], [ %inputbuffer.0, %bb20 ] ; <i32> [#uses=2]
+ %index.026 = phi i32 [ %5, %entry ], [ %index.2, %bb20 ] ; <i32> [#uses=1]
+ %valpred.125 = phi i32 [ %2, %entry ], [ %valpred.2, %bb20 ] ; <i32> [#uses=1]
+ %step.024 = phi i32 [ %7, %entry ], [ %35, %bb20 ] ; <i32> [#uses=4]
+ %outp.030 = getelementptr i16* %outdata, i32 %indvar ; <i16*> [#uses=1]
+ %9 = icmp eq i32 %bufferstep.028, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb2, label %bb3
+
+bb2: ; preds = %bb
+ %10 = load i8* %inp.131, align 1 ; <i8> [#uses=1]
+ %11 = sext i8 %10 to i32 ; <i32> [#uses=2]
+ %12 = getelementptr i8* %inp.131, i32 1 ; <i8*> [#uses=1]
+ %13 = ashr i32 %11, 4 ; <i32> [#uses=1]
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb
+ %inputbuffer.0 = phi i32 [ %11, %bb2 ], [ %inputbuffer.127, %bb ] ; <i32> [#uses=1]
+ %delta.0.in = phi i32 [ %13, %bb2 ], [ %inputbuffer.127, %bb ] ; <i32> [#uses=5]
+ %inp.0 = phi i8* [ %12, %bb2 ], [ %inp.131, %bb ] ; <i8*> [#uses=1]
+ %delta.0 = and i32 %delta.0.in, 15 ; <i32> [#uses=1]
+ %tmp = xor i32 %bufferstep.028, 1 ; <i32> [#uses=1]
+ %14 = getelementptr [16 x i32]* @indexTable, i32 0, i32 %delta.0 ; <i32*> [#uses=1]
+ %15 = load i32* %14, align 4 ; <i32> [#uses=1]
+ %16 = add i32 %15, %index.026 ; <i32> [#uses=2]
+ %17 = icmp slt i32 %16, 0 ; <i1> [#uses=1]
+ %index.1 = select i1 %17, i32 0, i32 %16 ; <i32> [#uses=2]
+ %18 = icmp sgt i32 %index.1, 88 ; <i1> [#uses=1]
+ %index.2 = select i1 %18, i32 88, i32 %index.1 ; <i32> [#uses=3]
+ %19 = and i32 %delta.0.in, 8 ; <i32> [#uses=1]
+ %20 = ashr i32 %step.024, 3 ; <i32> [#uses=1]
+ %21 = and i32 %delta.0.in, 4 ; <i32> [#uses=1]
+ %22 = icmp eq i32 %21, 0 ; <i1> [#uses=1]
+ %23 = select i1 %22, i32 0, i32 %step.024 ; <i32> [#uses=1]
+ %vpdiff.0 = add i32 %23, %20 ; <i32> [#uses=2]
+ %24 = and i32 %delta.0.in, 2 ; <i32> [#uses=1]
+ %25 = icmp eq i32 %24, 0 ; <i1> [#uses=1]
+ br i1 %25, label %bb11, label %bb10
+
+bb10: ; preds = %bb3
+ %26 = ashr i32 %step.024, 1 ; <i32> [#uses=1]
+ %27 = add i32 %vpdiff.0, %26 ; <i32> [#uses=1]
+ br label %bb11
+
+bb11: ; preds = %bb10, %bb3
+ %vpdiff.1 = phi i32 [ %27, %bb10 ], [ %vpdiff.0, %bb3 ] ; <i32> [#uses=2]
+ %28 = and i32 %delta.0.in, 1 ; <i32> [#uses=1]
+ %toBool = icmp eq i32 %28, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb13, label %bb12
+
+bb12: ; preds = %bb11
+ %29 = ashr i32 %step.024, 2 ; <i32> [#uses=1]
+ %30 = add i32 %vpdiff.1, %29 ; <i32> [#uses=1]
+ br label %bb13
+
+bb13: ; preds = %bb12, %bb11
+ %vpdiff.2 = phi i32 [ %30, %bb12 ], [ %vpdiff.1, %bb11 ] ; <i32> [#uses=2]
+ %31 = icmp eq i32 %19, 0 ; <i1> [#uses=1]
+ %tmp23 = sub i32 0, %vpdiff.2 ; <i32> [#uses=1]
+ %valpred.0.p = select i1 %31, i32 %vpdiff.2, i32 %tmp23 ; <i32> [#uses=1]
+ %valpred.0 = add i32 %valpred.0.p, %valpred.125 ; <i32> [#uses=3]
+ %32 = icmp sgt i32 %valpred.0, 32767 ; <i1> [#uses=1]
+ br i1 %32, label %bb20, label %bb18
+
+bb18: ; preds = %bb13
+ %33 = icmp slt i32 %valpred.0, -32768 ; <i1> [#uses=1]
+ br i1 %33, label %bb19, label %bb20
+
+bb19: ; preds = %bb18
+ br label %bb20
+
+bb20: ; preds = %bb19, %bb18, %bb13
+ %valpred.2 = phi i32 [ -32768, %bb19 ], [ 32767, %bb13 ], [ %valpred.0, %bb18 ] ; <i32> [#uses=3]
+ %34 = getelementptr [89 x i32]* @stepsizeTable, i32 0, i32 %index.2 ; <i32*> [#uses=1]
+ %35 = load i32* %34, align 4 ; <i32> [#uses=1]
+ %36 = trunc i32 %valpred.2 to i16 ; <i16> [#uses=1]
+ store i16 %36, i16* %outp.030, align 2
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %len ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb22, label %bb
+
+bb22: ; preds = %bb20, %entry
+ %index.0.lcssa = phi i32 [ %5, %entry ], [ %index.2, %bb20 ] ; <i32> [#uses=1]
+ %valpred.1.lcssa = phi i32 [ %2, %entry ], [ %valpred.2, %bb20 ] ; <i32> [#uses=1]
+ %37 = trunc i32 %valpred.1.lcssa to i16 ; <i16> [#uses=1]
+ store i16 %37, i16* %0, align 2
+ %38 = trunc i32 %index.0.lcssa to i8 ; <i8> [#uses=1]
+ store i8 %38, i8* %3, align 2
+ ret void
+}
+
+define arm_apcscc i32 @main() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb3, %entry
+ %0 = tail call arm_apcscc i32 (...)* @read(i32 0, i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i32 500) nounwind ; <i32> [#uses=4]
+ %1 = icmp slt i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb1, label %bb2
+
+bb1: ; preds = %bb
+ tail call arm_apcscc void @perror(i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0)) nounwind
+ ret i32 1
+
+bb2: ; preds = %bb
+ %2 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb4, label %bb3
+
+bb3: ; preds = %bb2
+ %3 = shl i32 %0, 1 ; <i32> [#uses=1]
+ tail call arm_apcscc void @adpcm_decoder(i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %3, %struct.adpcm_state* @state) nounwind
+ %4 = shl i32 %0, 2 ; <i32> [#uses=1]
+ %5 = tail call arm_apcscc i32 (...)* @write(i32 1, i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %4) nounwind ; <i32> [#uses=0]
+ br label %bb
+
+bb4: ; preds = %bb2
+ %6 = load %struct.FILE** @__stderrp, align 4 ; <%struct.FILE*> [#uses=1]
+ %7 = load i16* getelementptr (%struct.adpcm_state* @state, i32 0, i32 0), align 4 ; <i16> [#uses=1]
+ %8 = sext i16 %7 to i32 ; <i32> [#uses=1]
+ %9 = load i8* getelementptr (%struct.adpcm_state* @state, i32 0, i32 1), align 2 ; <i8> [#uses=1]
+ %10 = sext i8 %9 to i32 ; <i32> [#uses=1]
+ %11 = tail call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %6, i8* getelementptr ([28 x i8]* @.str1, i32 0, i32 0), i32 %8, i32 %10) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare arm_apcscc i32 @read(...)
+
+declare arm_apcscc void @perror(i8* nocapture) nounwind
+
+declare arm_apcscc i32 @write(...)
+
+declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
diff --git a/test/CodeGen/Thumb/dg.exp b/test/CodeGen/Thumb/dg.exp
new file mode 100644
index 0000000..3ff359a
--- /dev/null
+++ b/test/CodeGen/Thumb/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target ARM] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/Thumb/dyn-stackalloc.ll b/test/CodeGen/Thumb/dyn-stackalloc.ll
new file mode 100644
index 0000000..acfdc91
--- /dev/null
+++ b/test/CodeGen/Thumb/dyn-stackalloc.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s -march=thumb | not grep {ldr sp}
+; RUN: llc < %s -mtriple=thumb-apple-darwin | \
+; RUN: not grep {sub.*r7}
+; RUN: llc < %s -march=thumb | grep 4294967280
+
+ %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
+ %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
+
+define void @t1(%struct.state* %v) {
+ %tmp6 = load i32* null
+ %tmp8 = alloca float, i32 %tmp6
+ store i32 1, i32* null
+ br i1 false, label %bb123.preheader, label %return
+
+bb123.preheader:
+ br i1 false, label %bb43, label %return
+
+bb43:
+ call fastcc void @f1( float* %tmp8, float* null, i32 0 )
+ %tmp70 = load i32* null
+ %tmp85 = getelementptr float* %tmp8, i32 0
+ call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 )
+ ret void
+
+return:
+ ret void
+}
+
+declare fastcc void @f1(float*, float*, i32)
+
+declare fastcc void @f2(float*, float*, float*, i32)
+
+ %struct.comment = type { i8**, i32*, i32, i8* }
+@str215 = external global [2 x i8]
+
+define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
+ %tmp1 = call i32 @strlen( i8* %tag )
+ %tmp3 = call i32 @strlen( i8* %contents )
+ %tmp4 = add i32 %tmp1, 2
+ %tmp5 = add i32 %tmp4, %tmp3
+ %tmp6 = alloca i8, i32 %tmp5
+ %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag )
+ %tmp6.len = call i32 @strlen( i8* %tmp6 )
+ %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
+ call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 )
+ %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents )
+ call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 )
+ ret void
+}
+
+declare i32 @strlen(i8*)
+
+declare i8* @strcat(i8*, i8*)
+
+declare fastcc void @comment_add(%struct.comment*, i8*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i8* @strcpy(i8*, i8*)
diff --git a/test/CodeGen/Thumb/fpconv.ll b/test/CodeGen/Thumb/fpconv.ll
new file mode 100644
index 0000000..7da36ddf
--- /dev/null
+++ b/test/CodeGen/Thumb/fpconv.ll
@@ -0,0 +1,61 @@
+; RUN: llc < %s -march=thumb
+
+define float @f1(double %x) {
+entry:
+ %tmp1 = fptrunc double %x to float ; <float> [#uses=1]
+ ret float %tmp1
+}
+
+define double @f2(float %x) {
+entry:
+ %tmp1 = fpext float %x to double ; <double> [#uses=1]
+ ret double %tmp1
+}
+
+define i32 @f3(float %x) {
+entry:
+ %tmp = fptosi float %x to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @f4(float %x) {
+entry:
+ %tmp = fptoui float %x to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @f5(double %x) {
+entry:
+ %tmp = fptosi double %x to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @f6(double %x) {
+entry:
+ %tmp = fptoui double %x to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define float @f7(i32 %a) {
+entry:
+ %tmp = sitofp i32 %a to float ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @f8(i32 %a) {
+entry:
+ %tmp = sitofp i32 %a to double ; <double> [#uses=1]
+ ret double %tmp
+}
+
+define float @f9(i32 %a) {
+entry:
+ %tmp = uitofp i32 %a to float ; <float> [#uses=1]
+ ret float %tmp
+}
+
+define double @f10(i32 %a) {
+entry:
+ %tmp = uitofp i32 %a to double ; <double> [#uses=1]
+ ret double %tmp
+}
diff --git a/test/CodeGen/Thumb/fpow.ll b/test/CodeGen/Thumb/fpow.ll
new file mode 100644
index 0000000..be3dc0b
--- /dev/null
+++ b/test/CodeGen/Thumb/fpow.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=thumb
+
+define double @t(double %x, double %y) nounwind optsize {
+entry:
+ %0 = tail call double @llvm.pow.f64( double %x, double %y ) ; <double> [#uses=1]
+ ret double %0
+}
+
+declare double @llvm.pow.f64(double, double) nounwind readonly
diff --git a/test/CodeGen/Thumb/frame_thumb.ll b/test/CodeGen/Thumb/frame_thumb.ll
new file mode 100644
index 0000000..0cac755
--- /dev/null
+++ b/test/CodeGen/Thumb/frame_thumb.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=thumb-apple-darwin \
+; RUN: -disable-fp-elim | not grep {r11}
+; RUN: llc < %s -mtriple=thumb-linux-gnueabi \
+; RUN: -disable-fp-elim | not grep {r11}
+
+define i32 @f() {
+entry:
+ ret i32 10
+}
diff --git a/test/CodeGen/Thumb/iabs.ll b/test/CodeGen/Thumb/iabs.ll
new file mode 100644
index 0000000..d7cdcd8
--- /dev/null
+++ b/test/CodeGen/Thumb/iabs.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=thumb -stats |& \
+; RUN: grep {4 .*Number of machine instrs printed}
+
+;; Integer absolute value, should produce something as good as:
+;; Thumb:
+;; asr r2, r0, #31
+;; add r0, r0, r2
+;; eor r0, r2
+;; bx lr
+
+define i32 @test(i32 %a) {
+ %tmp1neg = sub i32 0, %a
+ %b = icmp sgt i32 %a, -1
+ %abs = select i1 %b, i32 %a, i32 %tmp1neg
+ ret i32 %abs
+}
+
diff --git a/test/CodeGen/Thumb/inlineasm-imm-thumb.ll b/test/CodeGen/Thumb/inlineasm-imm-thumb.ll
new file mode 100644
index 0000000..5c8a52a
--- /dev/null
+++ b/test/CodeGen/Thumb/inlineasm-imm-thumb.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s -march=thumb
+
+; Test Thumb-mode "I" constraint, for ADD immediate.
+define i32 @testI(i32 %x) {
+ %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 255 ) nounwind
+ ret i32 %y
+}
+
+; Test Thumb-mode "J" constraint, for negated ADD immediates.
+define void @testJ() {
+ tail call void asm sideeffect ".word $0", "J"( i32 -255 ) nounwind
+ ret void
+}
+
+; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use.
+define void @testK() {
+ tail call void asm sideeffect ".word $0", "K"( i32 65280 ) nounwind
+ ret void
+}
+
+; Test Thumb-mode "L" constraint, for 3-operand ADD immediates.
+define i32 @testL(i32 %x) {
+ %y = call i32 asm "add $0, $1, $2", "=r,r,L"( i32 %x, i32 -7 ) nounwind
+ ret i32 %y
+}
+
+; Test Thumb-mode "M" constraint, for "ADD r = sp + imm".
+define i32 @testM() {
+ %y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind
+ ret i32 %y
+}
+
+; Test Thumb-mode "N" constraint, for values between 0 and 31.
+define i32 @testN(i32 %x) {
+ %y = call i32 asm "lsl $0, $1, $2", "=r,r,N"( i32 %x, i32 31 ) nounwind
+ ret i32 %y
+}
+
+; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm".
+define void @testO() {
+ tail call void asm sideeffect "add sp, sp, $0; add sp, sp, $1", "O,O"( i32 -508, i32 508 ) nounwind
+ ret void
+}
diff --git a/test/CodeGen/Thumb/ispositive.ll b/test/CodeGen/Thumb/ispositive.ll
new file mode 100644
index 0000000..eac3ef2
--- /dev/null
+++ b/test/CodeGen/Thumb/ispositive.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=thumb | FileCheck %s
+
+define i32 @test1(i32 %X) {
+entry:
+; CHECK: test1:
+; CHECK: lsrs r0, r0, #31
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
+
diff --git a/test/CodeGen/Thumb/large-stack.ll b/test/CodeGen/Thumb/large-stack.ll
new file mode 100644
index 0000000..02de36a
--- /dev/null
+++ b/test/CodeGen/Thumb/large-stack.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=thumb | grep {ldr.*LCP} | count 5
+
+define void @test1() {
+ %tmp = alloca [ 64 x i32 ] , align 4
+ ret void
+}
+
+define void @test2() {
+ %tmp = alloca [ 4168 x i8 ] , align 4
+ ret void
+}
+
+define i32 @test3() {
+ %retval = alloca i32, align 4
+ %tmp = alloca i32, align 4
+ %a = alloca [805306369 x i8], align 16
+ store i32 0, i32* %tmp
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/Thumb/ldr_ext.ll b/test/CodeGen/Thumb/ldr_ext.ll
new file mode 100644
index 0000000..9a28124
--- /dev/null
+++ b/test/CodeGen/Thumb/ldr_ext.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -march=thumb | FileCheck %s -check-prefix=V5
+; RUN: llc < %s -march=thumb -mattr=+v6 | FileCheck %s -check-prefix=V6
+
+; rdar://7176514
+
+define i32 @test1(i8* %t1) nounwind {
+; V5: ldrb
+
+; V6: ldrb
+ %tmp.u = load i8* %t1
+ %tmp1.s = zext i8 %tmp.u to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test2(i16* %t1) nounwind {
+; V5: ldrh
+
+; V6: ldrh
+ %tmp.u = load i16* %t1
+ %tmp1.s = zext i16 %tmp.u to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test3(i8* %t0) nounwind {
+; V5: ldrb
+; V5: lsls
+; V5: asrs
+
+; V6: ldrb
+; V6: sxtb
+ %tmp.s = load i8* %t0
+ %tmp1.s = sext i8 %tmp.s to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test4(i16* %t0) nounwind {
+; V5: ldrh
+; V5: lsls
+; V5: asrs
+
+; V6: ldrh
+; V6: sxth
+ %tmp.s = load i16* %t0
+ %tmp1.s = sext i16 %tmp.s to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test5() nounwind {
+; V5: movs r0, #0
+; V5: ldrsh
+
+; V6: movs r0, #0
+; V6: ldrsh
+ %tmp.s = load i16* null
+ %tmp1.s = sext i16 %tmp.s to i32
+ ret i32 %tmp1.s
+}
diff --git a/test/CodeGen/Thumb/ldr_frame.ll b/test/CodeGen/Thumb/ldr_frame.ll
new file mode 100644
index 0000000..81782cd
--- /dev/null
+++ b/test/CodeGen/Thumb/ldr_frame.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=thumb | FileCheck %s
+
+define i32 @f1() {
+; CHECK: f1:
+; CHECK: ldr r0
+ %buf = alloca [32 x i32], align 4
+ %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f2() {
+; CHECK: f2:
+; CHECK: mov r0
+; CHECK: ldrb
+ %buf = alloca [32 x i8], align 4
+ %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0
+ %tmp1 = load i8* %tmp
+ %tmp2 = zext i8 %tmp1 to i32
+ ret i32 %tmp2
+}
+
+define i32 @f3() {
+; CHECK: f3:
+; CHECK: ldr r0
+ %buf = alloca [32 x i32], align 4
+ %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f4() {
+; CHECK: f4:
+; CHECK: mov r0
+; CHECK: ldrb
+ %buf = alloca [32 x i8], align 4
+ %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2
+ %tmp1 = load i8* %tmp
+ %tmp2 = zext i8 %tmp1 to i32
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/Thumb/long-setcc.ll b/test/CodeGen/Thumb/long-setcc.ll
new file mode 100644
index 0000000..8f2d98f
--- /dev/null
+++ b/test/CodeGen/Thumb/long-setcc.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=thumb | grep cmp | count 1
+
+
+define i1 @t1(i64 %x) {
+ %B = icmp slt i64 %x, 0
+ ret i1 %B
+}
+
+define i1 @t2(i64 %x) {
+ %tmp = icmp ult i64 %x, 4294967296
+ ret i1 %tmp
+}
+
+define i1 @t3(i32 %x) {
+ %tmp = icmp ugt i32 %x, -1
+ ret i1 %tmp
+}
diff --git a/test/CodeGen/Thumb/long.ll b/test/CodeGen/Thumb/long.ll
new file mode 100644
index 0000000..e3ef44a
--- /dev/null
+++ b/test/CodeGen/Thumb/long.ll
@@ -0,0 +1,76 @@
+; RUN: llc < %s -march=thumb | \
+; RUN: grep mvn | count 1
+; RUN: llc < %s -march=thumb | \
+; RUN: grep adc | count 1
+; RUN: llc < %s -march=thumb | \
+; RUN: grep sbc | count 1
+; RUN: llc < %s -march=thumb | grep __muldi3
+
+define i64 @f1() {
+entry:
+ ret i64 0
+}
+
+define i64 @f2() {
+entry:
+ ret i64 1
+}
+
+define i64 @f3() {
+entry:
+ ret i64 2147483647
+}
+
+define i64 @f4() {
+entry:
+ ret i64 2147483648
+}
+
+define i64 @f5() {
+entry:
+ ret i64 9223372036854775807
+}
+
+define i64 @f6(i64 %x, i64 %y) {
+entry:
+ %tmp1 = add i64 %y, 1 ; <i64> [#uses=1]
+ ret i64 %tmp1
+}
+
+define void @f7() {
+entry:
+ %tmp = call i64 @f8( ) ; <i64> [#uses=0]
+ ret void
+}
+
+declare i64 @f8()
+
+define i64 @f9(i64 %a, i64 %b) {
+entry:
+ %tmp = sub i64 %a, %b ; <i64> [#uses=1]
+ ret i64 %tmp
+}
+
+define i64 @f(i32 %a, i32 %b) {
+entry:
+ %tmp = sext i32 %a to i64 ; <i64> [#uses=1]
+ %tmp1 = sext i32 %b to i64 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
+ ret i64 %tmp2
+}
+
+define i64 @g(i32 %a, i32 %b) {
+entry:
+ %tmp = zext i32 %a to i64 ; <i64> [#uses=1]
+ %tmp1 = zext i32 %b to i64 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
+ ret i64 %tmp2
+}
+
+define i64 @f10() {
+entry:
+ %a = alloca i64, align 8 ; <i64*> [#uses=1]
+ %retval = load i64* %a ; <i64> [#uses=1]
+ ret i64 %retval
+}
+
diff --git a/test/CodeGen/Thumb/long_shift.ll b/test/CodeGen/Thumb/long_shift.ll
new file mode 100644
index 0000000..2431714
--- /dev/null
+++ b/test/CodeGen/Thumb/long_shift.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=thumb
+
+define i64 @f0(i64 %A, i64 %B) {
+ %tmp = bitcast i64 %A to i64
+ %tmp2 = lshr i64 %B, 1
+ %tmp3 = sub i64 %tmp, %tmp2
+ ret i64 %tmp3
+}
+
+define i32 @f1(i64 %x, i64 %y) {
+ %a = shl i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
+
+define i32 @f2(i64 %x, i64 %y) {
+ %a = ashr i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
+
+define i32 @f3(i64 %x, i64 %y) {
+ %a = lshr i64 %x, %y
+ %b = trunc i64 %a to i32
+ ret i32 %b
+}
diff --git a/test/CodeGen/Thumb/machine-licm.ll b/test/CodeGen/Thumb/machine-licm.ll
new file mode 100644
index 0000000..dae1412
--- /dev/null
+++ b/test/CodeGen/Thumb/machine-licm.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s
+; rdar://7353541
+; rdar://7354376
+
+; The generated code is no where near ideal. It's not recognizing the two
+; constantpool entries being loaded can be merged into one.
+
+@GV = external global i32 ; <i32*> [#uses=2]
+
+define arm_apcscc void @t(i32* nocapture %vals, i32 %c) nounwind {
+entry:
+; CHECK: t:
+ %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+; CHECK: BB#1
+; CHECK: ldr.n r2, LCPI1_0
+; CHECK: add r2, pc
+; CHECK: ldr r{{[0-9]+}}, [r2]
+; CHECK: LBB1_2
+; CHECK: LCPI1_0:
+; CHECK-NOT: LCPI1_1:
+; CHECK: .section
+ %.pre = load i32* @GV, align 4 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %1 = phi i32 [ %.pre, %bb.nph ], [ %3, %bb ] ; <i32> [#uses=1]
+ %i.03 = phi i32 [ 0, %bb.nph ], [ %4, %bb ] ; <i32> [#uses=2]
+ %scevgep = getelementptr i32* %vals, i32 %i.03 ; <i32*> [#uses=1]
+ %2 = load i32* %scevgep, align 4 ; <i32> [#uses=1]
+ %3 = add nsw i32 %1, %2 ; <i32> [#uses=2]
+ store i32 %3, i32* @GV, align 4
+ %4 = add i32 %i.03, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %4, %c ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/Thumb/mul.ll b/test/CodeGen/Thumb/mul.ll
new file mode 100644
index 0000000..c1a2fb2
--- /dev/null
+++ b/test/CodeGen/Thumb/mul.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=thumb | grep mul | count 3
+; RUN: llc < %s -march=thumb | grep lsl | count 1
+
+define i32 @f1(i32 %u) {
+ %tmp = mul i32 %u, %u
+ ret i32 %tmp
+}
+
+define i32 @f2(i32 %u, i32 %v) {
+ %tmp = mul i32 %u, %v
+ ret i32 %tmp
+}
+
+define i32 @f3(i32 %u) {
+ %tmp = mul i32 %u, 5
+ ret i32 %tmp
+}
+
+define i32 @f4(i32 %u) {
+ %tmp = mul i32 %u, 4
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb/pop.ll b/test/CodeGen/Thumb/pop.ll
new file mode 100644
index 0000000..0e1b2e5
--- /dev/null
+++ b/test/CodeGen/Thumb/pop.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s
+; rdar://7268481
+
+define arm_apcscc void @t(i8* %a, ...) nounwind {
+; CHECK: t:
+; CHECK: pop {r3}
+; CHECK-NEXT: add sp, #12
+; CHECK-NEXT: bx r3
+entry:
+ %a.addr = alloca i8*
+ store i8* %a, i8** %a.addr
+ ret void
+}
diff --git a/test/CodeGen/Thumb/push.ll b/test/CodeGen/Thumb/push.ll
new file mode 100644
index 0000000..63773c4
--- /dev/null
+++ b/test/CodeGen/Thumb/push.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-fp-elim | FileCheck %s
+; rdar://7268481
+
+define arm_apcscc void @t() nounwind {
+; CHECK: t:
+; CHECK-NEXT : push {r7}
+entry:
+ call void asm sideeffect ".long 0xe7ffdefe", ""() nounwind
+ ret void
+}
diff --git a/test/CodeGen/Thumb/select.ll b/test/CodeGen/Thumb/select.ll
new file mode 100644
index 0000000..7a183b0
--- /dev/null
+++ b/test/CodeGen/Thumb/select.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -march=thumb | grep beq | count 1
+; RUN: llc < %s -march=thumb | grep bgt | count 1
+; RUN: llc < %s -march=thumb | grep blt | count 3
+; RUN: llc < %s -march=thumb | grep ble | count 1
+; RUN: llc < %s -march=thumb | grep bls | count 1
+; RUN: llc < %s -march=thumb | grep bhi | count 1
+; RUN: llc < %s -march=thumb | grep __ltdf2
+
+define i32 @f1(i32 %a.s) {
+entry:
+ %tmp = icmp eq i32 %a.s, 4
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f2(i32 %a.s) {
+entry:
+ %tmp = icmp sgt i32 %a.s, 4
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f3(i32 %a.s, i32 %b.s) {
+entry:
+ %tmp = icmp slt i32 %a.s, %b.s
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f4(i32 %a.s, i32 %b.s) {
+entry:
+ %tmp = icmp sle i32 %a.s, %b.s
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f5(i32 %a.u, i32 %b.u) {
+entry:
+ %tmp = icmp ule i32 %a.u, %b.u
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f6(i32 %a.u, i32 %b.u) {
+entry:
+ %tmp = icmp ugt i32 %a.u, %b.u
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define double @f7(double %a, double %b) {
+ %tmp = fcmp olt double %a, 1.234e+00
+ %tmp1 = select i1 %tmp, double -1.000e+00, double %b
+ ret double %tmp1
+}
diff --git a/test/CodeGen/Thumb/stack-frame.ll b/test/CodeGen/Thumb/stack-frame.ll
new file mode 100644
index 0000000..b103b33
--- /dev/null
+++ b/test/CodeGen/Thumb/stack-frame.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=thumb
+; RUN: llc < %s -march=thumb | grep add | count 1
+
+define void @f1() {
+ %c = alloca i8, align 1
+ ret void
+}
+
+define i32 @f2() {
+ ret i32 1
+}
+
+
diff --git a/test/CodeGen/Thumb/thumb-imm.ll b/test/CodeGen/Thumb/thumb-imm.ll
new file mode 100644
index 0000000..74a57ff
--- /dev/null
+++ b/test/CodeGen/Thumb/thumb-imm.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=thumb | not grep CPI
+
+
+define i32 @test1() {
+ ret i32 1000
+}
+
+define i32 @test2() {
+ ret i32 -256
+}
diff --git a/test/CodeGen/Thumb/tst_teq.ll b/test/CodeGen/Thumb/tst_teq.ll
new file mode 100644
index 0000000..21ada3e
--- /dev/null
+++ b/test/CodeGen/Thumb/tst_teq.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=thumb | grep tst
+
+define i32 @f(i32 %a) {
+entry:
+ %tmp2 = and i32 %a, 255 ; <i32> [#uses=1]
+ icmp eq i32 %tmp2, 0 ; <i1>:0 [#uses=1]
+ %retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
+define i32 @g(i32 %a) {
+entry:
+ %tmp2 = xor i32 %a, 255
+ icmp eq i32 %tmp2, 0 ; <i1>:0 [#uses=1]
+ %retval = select i1 %0, i32 20, i32 10 ; <i32> [#uses=1]
+ ret i32 %retval
+}
diff --git a/test/CodeGen/Thumb/unord.ll b/test/CodeGen/Thumb/unord.ll
new file mode 100644
index 0000000..39458ae
--- /dev/null
+++ b/test/CodeGen/Thumb/unord.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=thumb | grep bne | count 1
+; RUN: llc < %s -march=thumb | grep beq | count 1
+
+define i32 @f1(float %X, float %Y) {
+ %tmp = fcmp uno float %X, %Y
+ %retval = select i1 %tmp, i32 1, i32 -1
+ ret i32 %retval
+}
+
+define i32 @f2(float %X, float %Y) {
+ %tmp = fcmp ord float %X, %Y
+ %retval = select i1 %tmp, i32 1, i32 -1
+ ret i32 %retval
+}
diff --git a/test/CodeGen/Thumb/vargs.ll b/test/CodeGen/Thumb/vargs.ll
new file mode 100644
index 0000000..16a9c44
--- /dev/null
+++ b/test/CodeGen/Thumb/vargs.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=thumb
+; RUN: llc < %s -mtriple=thumb-linux | grep pop | count 1
+; RUN: llc < %s -mtriple=thumb-darwin | grep pop | count 2
+
+@str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define void @f(i32 %a, ...) {
+entry:
+ %va = alloca i8*, align 4 ; <i8**> [#uses=4]
+ %va.upgrd.1 = bitcast i8** %va to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %va.upgrd.1 )
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp5, %bb ] ; <i32> [#uses=2]
+ %tmp = volatile load i8** %va ; <i8*> [#uses=2]
+ %tmp2 = getelementptr i8* %tmp, i32 4 ; <i8*> [#uses=1]
+ volatile store i8* %tmp2, i8** %va
+ %tmp5 = add i32 %a_addr.0, -1 ; <i32> [#uses=1]
+ %tmp.upgrd.2 = icmp eq i32 %a_addr.0, 1 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.2, label %bb7, label %bb
+
+bb7: ; preds = %bb
+ %tmp3 = bitcast i8* %tmp to i32* ; <i32*> [#uses=1]
+ %tmp.upgrd.3 = load i32* %tmp3 ; <i32> [#uses=1]
+ %tmp10 = call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @str, i32 0, i64 0), i32 %tmp.upgrd.3 ) ; <i32> [#uses=0]
+ %va.upgrd.4 = bitcast i8** %va to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.4 )
+ ret void
+}
+
+declare void @llvm.va_start(i8*)
+
+declare i32 @printf(i8*, ...)
+
+declare void @llvm.va_end(i8*)
diff --git a/test/CodeGen/Thumb2/2009-07-17-CrossRegClassCopy.ll b/test/CodeGen/Thumb2/2009-07-17-CrossRegClassCopy.ll
new file mode 100644
index 0000000..8f2283f
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-07-17-CrossRegClassCopy.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s
+
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumbv6t2-elf"
+ %struct.dwarf_cie = type <{ i32, i32, i8, [0 x i8], [3 x i8] }>
+
+declare arm_apcscc i8* @read_sleb128(i8*, i32* nocapture) nounwind
+
+define arm_apcscc i32 @get_cie_encoding(%struct.dwarf_cie* %cie) nounwind {
+entry:
+ br i1 undef, label %bb1, label %bb13
+
+bb1: ; preds = %entry
+ %tmp38 = add i32 undef, 10 ; <i32> [#uses=1]
+ br label %bb.i
+
+bb.i: ; preds = %bb.i, %bb1
+ %indvar.i = phi i32 [ 0, %bb1 ], [ %2, %bb.i ] ; <i32> [#uses=3]
+ %tmp39 = add i32 %indvar.i, %tmp38 ; <i32> [#uses=1]
+ %p_addr.0.i = getelementptr i8* undef, i32 %tmp39 ; <i8*> [#uses=1]
+ %0 = load i8* %p_addr.0.i, align 1 ; <i8> [#uses=1]
+ %1 = icmp slt i8 %0, 0 ; <i1> [#uses=1]
+ %2 = add i32 %indvar.i, 1 ; <i32> [#uses=1]
+ br i1 %1, label %bb.i, label %read_uleb128.exit
+
+read_uleb128.exit: ; preds = %bb.i
+ %.sum40 = add i32 %indvar.i, undef ; <i32> [#uses=1]
+ %.sum31 = add i32 %.sum40, 2 ; <i32> [#uses=1]
+ %scevgep.i = getelementptr %struct.dwarf_cie* %cie, i32 0, i32 3, i32 %.sum31 ; <i8*> [#uses=1]
+ %3 = call arm_apcscc i8* @read_sleb128(i8* %scevgep.i, i32* undef) ; <i8*> [#uses=0]
+ unreachable
+
+bb13: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll b/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
new file mode 100644
index 0000000..ef076a4
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+vfp2,+thumb2 | FileCheck %s
+; rdar://7076238
+
+@"\01LC" = external constant [36 x i8], align 1 ; <[36 x i8]*> [#uses=1]
+
+define arm_apcscc i32 @t(i32, ...) nounwind {
+entry:
+; CHECK: t:
+; CHECK: add r7, sp, #12
+ %1 = load i8** undef, align 4 ; <i8*> [#uses=3]
+ %2 = getelementptr i8* %1, i32 4 ; <i8*> [#uses=1]
+ %3 = getelementptr i8* %1, i32 8 ; <i8*> [#uses=1]
+ %4 = bitcast i8* %2 to i32* ; <i32*> [#uses=1]
+ %5 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %6 = trunc i32 %5 to i8 ; <i8> [#uses=1]
+ %7 = getelementptr i8* %1, i32 12 ; <i8*> [#uses=1]
+ %8 = bitcast i8* %3 to i32* ; <i32*> [#uses=1]
+ %9 = load i32* %8, align 4 ; <i32> [#uses=1]
+ %10 = trunc i32 %9 to i16 ; <i16> [#uses=1]
+ %11 = bitcast i8* %7 to i32* ; <i32*> [#uses=1]
+ %12 = load i32* %11, align 4 ; <i32> [#uses=1]
+ %13 = trunc i32 %12 to i16 ; <i16> [#uses=1]
+ %14 = load i32* undef, align 4 ; <i32> [#uses=2]
+ %15 = sext i8 %6 to i32 ; <i32> [#uses=2]
+ %16 = sext i16 %10 to i32 ; <i32> [#uses=2]
+ %17 = sext i16 %13 to i32 ; <i32> [#uses=2]
+ %18 = call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([36 x i8]* @"\01LC", i32 0, i32 0), i32 -128, i32 0, i32 %15, i32 %16, i32 %17, i32 0, i32 %14) nounwind ; <i32> [#uses=0]
+ %19 = add i32 0, %15 ; <i32> [#uses=1]
+ %20 = add i32 %19, %16 ; <i32> [#uses=1]
+ %21 = add i32 %20, %14 ; <i32> [#uses=1]
+ %22 = add i32 %21, %17 ; <i32> [#uses=1]
+ %23 = add i32 %22, 0 ; <i32> [#uses=1]
+ ret i32 %23
+}
+
+declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
diff --git a/test/CodeGen/Thumb2/2009-07-23-CPIslandBug.ll b/test/CodeGen/Thumb2/2009-07-23-CPIslandBug.ll
new file mode 100644
index 0000000..4d21f9b
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-07-23-CPIslandBug.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+vfp2,+thumb2
+; rdar://7083961
+
+define arm_apcscc i32 @value(i64 %b1, i64 %b2) nounwind readonly {
+entry:
+ %0 = icmp eq i32 undef, 0 ; <i1> [#uses=1]
+ %mod.0.ph.ph = select i1 %0, float -1.000000e+00, float 1.000000e+00 ; <float> [#uses=1]
+ br label %bb7
+
+bb7: ; preds = %bb7, %entry
+ br i1 undef, label %bb86.preheader, label %bb7
+
+bb86.preheader: ; preds = %bb7
+ %1 = fmul float %mod.0.ph.ph, 5.000000e+00 ; <float> [#uses=0]
+ br label %bb79
+
+bb79: ; preds = %bb79, %bb86.preheader
+ br i1 undef, label %bb119, label %bb79
+
+bb119: ; preds = %bb79
+ ret i32 undef
+}
diff --git a/test/CodeGen/Thumb2/2009-07-30-PEICrash.ll b/test/CodeGen/Thumb2/2009-07-30-PEICrash.ll
new file mode 100644
index 0000000..f74d12e
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-07-30-PEICrash.ll
@@ -0,0 +1,193 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.JHUFF_TBL = type { [17 x i8], [256 x i8], i32 }
+ %struct.JQUANT_TBL = type { [64 x i16], i32 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.anon = type { [8 x i32], [48 x i8] }
+ %struct.backing_store_info = type { void (%struct.jpeg_common_struct*, %struct.backing_store_info*, i8*, i32, i32)*, void (%struct.jpeg_common_struct*, %struct.backing_store_info*, i8*, i32, i32)*, void (%struct.jpeg_common_struct*, %struct.backing_store_info*)*, %struct.FILE*, [64 x i8] }
+ %struct.jpeg_color_deconverter = type { void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*, i8***, i32, i8**, i32)* }
+ %struct.jpeg_color_quantizer = type { void (%struct.jpeg_decompress_struct*, i32)*, void (%struct.jpeg_decompress_struct*, i8**, i8**, i32)*, void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)* }
+ %struct.jpeg_common_struct = type { %struct.jpeg_error_mgr*, %struct.jpeg_memory_mgr*, %struct.jpeg_progress_mgr*, i32, i32 }
+ %struct.jpeg_component_info = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.JQUANT_TBL*, i8* }
+ %struct.jpeg_d_coef_controller = type { void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*, i8***)*, %struct.jvirt_barray_control** }
+ %struct.jpeg_d_main_controller = type { void (%struct.jpeg_decompress_struct*, i32)*, void (%struct.jpeg_decompress_struct*, i8**, i32*, i32)* }
+ %struct.jpeg_d_post_controller = type { void (%struct.jpeg_decompress_struct*, i32)*, void (%struct.jpeg_decompress_struct*, i8***, i32*, i32, i8**, i32*, i32)* }
+ %struct.jpeg_decomp_master = type { void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, i32 }
+ %struct.jpeg_decompress_struct = type { %struct.jpeg_error_mgr*, %struct.jpeg_memory_mgr*, %struct.jpeg_progress_mgr*, i32, i32, %struct.jpeg_source_mgr*, i32, i32, i32, i32, i32, i32, i32, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8**, i32, i32, i32, i32, i32, [64 x i32]*, [4 x %struct.JQUANT_TBL*], [4 x %struct.JHUFF_TBL*], [4 x %struct.JHUFF_TBL*], i32, %struct.jpeg_component_info*, i32, i32, [16 x i8], [16 x i8], [16 x i8], i32, i32, i8, i16, i16, i32, i8, i32, i32, i32, i32, i32, i8*, i32, [4 x %struct.jpeg_component_info*], i32, i32, i32, [10 x i32], i32, i32, i32, i32, i32, %struct.jpeg_decomp_master*, %struct.jpeg_d_main_controller*, %struct.jpeg_d_coef_controller*, %struct.jpeg_d_post_controller*, %struct.jpeg_input_controller*, %struct.jpeg_marker_reader*, %struct.jpeg_entropy_decoder*, %struct.jpeg_inverse_dct*, %struct.jpeg_upsampler*, %struct.jpeg_color_deconverter*, %struct.jpeg_color_quantizer* }
+ %struct.jpeg_entropy_decoder = type { void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*, [64 x i16]**)* }
+ %struct.jpeg_error_mgr = type { void (%struct.jpeg_common_struct*)*, void (%struct.jpeg_common_struct*, i32)*, void (%struct.jpeg_common_struct*)*, void (%struct.jpeg_common_struct*, i8*)*, void (%struct.jpeg_common_struct*)*, i32, %struct.anon, i32, i32, i8**, i32, i8**, i32, i32 }
+ %struct.jpeg_input_controller = type { i32 (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, i32, i32 }
+ %struct.jpeg_inverse_dct = type { void (%struct.jpeg_decompress_struct*)*, [10 x void (%struct.jpeg_decompress_struct*, %struct.jpeg_component_info*, i16*, i8**, i32)*] }
+ %struct.jpeg_marker_reader = type { void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, [16 x i32 (%struct.jpeg_decompress_struct*)*], i32, i32, i32, i32 }
+ %struct.jpeg_memory_mgr = type { i8* (%struct.jpeg_common_struct*, i32, i32)*, i8* (%struct.jpeg_common_struct*, i32, i32)*, i8** (%struct.jpeg_common_struct*, i32, i32, i32)*, [64 x i16]** (%struct.jpeg_common_struct*, i32, i32, i32)*, %struct.jvirt_sarray_control* (%struct.jpeg_common_struct*, i32, i32, i32, i32, i32)*, %struct.jvirt_barray_control* (%struct.jpeg_common_struct*, i32, i32, i32, i32, i32)*, void (%struct.jpeg_common_struct*)*, i8** (%struct.jpeg_common_struct*, %struct.jvirt_sarray_control*, i32, i32, i32)*, [64 x i16]** (%struct.jpeg_common_struct*, %struct.jvirt_barray_control*, i32, i32, i32)*, void (%struct.jpeg_common_struct*, i32)*, void (%struct.jpeg_common_struct*)*, i32 }
+ %struct.jpeg_progress_mgr = type { void (%struct.jpeg_common_struct*)*, i32, i32, i32, i32 }
+ %struct.jpeg_source_mgr = type { i8*, i32, void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*, i32)*, i32 (%struct.jpeg_decompress_struct*, i32)*, void (%struct.jpeg_decompress_struct*)* }
+ %struct.jpeg_upsampler = type { void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*, i8***, i32*, i32, i8**, i32*, i32)*, i32 }
+ %struct.jvirt_barray_control = type { [64 x i16]**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_barray_control*, %struct.backing_store_info }
+ %struct.jvirt_sarray_control = type { i8**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_sarray_control*, %struct.backing_store_info }
+
+define arm_apcscc void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
+entry:
+ %workspace = alloca [64 x float], align 4 ; <[64 x float]*> [#uses=11]
+ %0 = load i8** undef, align 4 ; <i8*> [#uses=5]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=11]
+ %tmp39 = add i32 %indvar, 8 ; <i32> [#uses=0]
+ %tmp41 = add i32 %indvar, 16 ; <i32> [#uses=2]
+ %scevgep42 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp41 ; <float*> [#uses=1]
+ %tmp43 = add i32 %indvar, 24 ; <i32> [#uses=1]
+ %scevgep44 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp43 ; <float*> [#uses=1]
+ %tmp45 = add i32 %indvar, 32 ; <i32> [#uses=1]
+ %scevgep46 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp45 ; <float*> [#uses=1]
+ %tmp47 = add i32 %indvar, 40 ; <i32> [#uses=1]
+ %scevgep48 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp47 ; <float*> [#uses=1]
+ %tmp49 = add i32 %indvar, 48 ; <i32> [#uses=1]
+ %scevgep50 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp49 ; <float*> [#uses=1]
+ %tmp51 = add i32 %indvar, 56 ; <i32> [#uses=1]
+ %scevgep52 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp51 ; <float*> [#uses=1]
+ %wsptr.119 = getelementptr [64 x float]* %workspace, i32 0, i32 %indvar ; <float*> [#uses=1]
+ %tmp54 = shl i32 %indvar, 2 ; <i32> [#uses=1]
+ %scevgep76 = getelementptr i8* undef, i32 %tmp54 ; <i8*> [#uses=1]
+ %quantptr.118 = bitcast i8* %scevgep76 to float* ; <float*> [#uses=1]
+ %scevgep79 = getelementptr i16* %coef_block, i32 %tmp41 ; <i16*> [#uses=0]
+ %inptr.117 = getelementptr i16* %coef_block, i32 %indvar ; <i16*> [#uses=1]
+ %1 = load i16* null, align 2 ; <i16> [#uses=1]
+ %2 = load i16* undef, align 2 ; <i16> [#uses=1]
+ %3 = load i16* %inptr.117, align 2 ; <i16> [#uses=1]
+ %4 = sitofp i16 %3 to float ; <float> [#uses=1]
+ %5 = load float* %quantptr.118, align 4 ; <float> [#uses=1]
+ %6 = fmul float %4, %5 ; <float> [#uses=1]
+ %7 = fsub float %6, undef ; <float> [#uses=2]
+ %8 = fmul float undef, 0x3FF6A09E60000000 ; <float> [#uses=1]
+ %9 = fsub float %8, 0.000000e+00 ; <float> [#uses=2]
+ %10 = fadd float undef, 0.000000e+00 ; <float> [#uses=2]
+ %11 = fadd float %7, %9 ; <float> [#uses=2]
+ %12 = fsub float %7, %9 ; <float> [#uses=2]
+ %13 = sitofp i16 %1 to float ; <float> [#uses=1]
+ %14 = fmul float %13, undef ; <float> [#uses=2]
+ %15 = sitofp i16 %2 to float ; <float> [#uses=1]
+ %16 = load float* undef, align 4 ; <float> [#uses=1]
+ %17 = fmul float %15, %16 ; <float> [#uses=1]
+ %18 = fadd float %14, undef ; <float> [#uses=2]
+ %19 = fsub float %14, undef ; <float> [#uses=2]
+ %20 = fadd float undef, %17 ; <float> [#uses=2]
+ %21 = fadd float %20, %18 ; <float> [#uses=3]
+ %22 = fsub float %20, %18 ; <float> [#uses=1]
+ %23 = fmul float %22, 0x3FF6A09E60000000 ; <float> [#uses=1]
+ %24 = fadd float %19, undef ; <float> [#uses=1]
+ %25 = fmul float %24, 0x3FFD906BC0000000 ; <float> [#uses=2]
+ %26 = fmul float undef, 0x3FF1517A80000000 ; <float> [#uses=1]
+ %27 = fsub float %26, %25 ; <float> [#uses=1]
+ %28 = fmul float %19, 0xC004E7AEA0000000 ; <float> [#uses=1]
+ %29 = fadd float %28, %25 ; <float> [#uses=1]
+ %30 = fsub float %29, %21 ; <float> [#uses=3]
+ %31 = fsub float %23, %30 ; <float> [#uses=3]
+ %32 = fadd float %27, %31 ; <float> [#uses=1]
+ %33 = fadd float %10, %21 ; <float> [#uses=1]
+ store float %33, float* %wsptr.119, align 4
+ %34 = fsub float %10, %21 ; <float> [#uses=1]
+ store float %34, float* %scevgep52, align 4
+ %35 = fadd float %11, %30 ; <float> [#uses=1]
+ store float %35, float* null, align 4
+ %36 = fsub float %11, %30 ; <float> [#uses=1]
+ store float %36, float* %scevgep50, align 4
+ %37 = fadd float %12, %31 ; <float> [#uses=1]
+ store float %37, float* %scevgep42, align 4
+ %38 = fsub float %12, %31 ; <float> [#uses=1]
+ store float %38, float* %scevgep48, align 4
+ %39 = fadd float undef, %32 ; <float> [#uses=1]
+ store float %39, float* %scevgep46, align 4
+ store float undef, float* %scevgep44, align 4
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 undef, label %bb6, label %bb
+
+bb6: ; preds = %bb
+ %.sum10 = add i32 %output_col, 1 ; <i32> [#uses=1]
+ %.sum8 = add i32 %output_col, 6 ; <i32> [#uses=1]
+ %.sum6 = add i32 %output_col, 2 ; <i32> [#uses=1]
+ %.sum = add i32 %output_col, 3 ; <i32> [#uses=1]
+ br label %bb8
+
+bb8: ; preds = %bb8, %bb6
+ %ctr.116 = phi i32 [ 0, %bb6 ], [ %88, %bb8 ] ; <i32> [#uses=3]
+ %scevgep = getelementptr i8** %output_buf, i32 %ctr.116 ; <i8**> [#uses=1]
+ %tmp = shl i32 %ctr.116, 3 ; <i32> [#uses=5]
+ %tmp2392 = or i32 %tmp, 4 ; <i32> [#uses=1]
+ %scevgep24 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp2392 ; <float*> [#uses=1]
+ %tmp2591 = or i32 %tmp, 2 ; <i32> [#uses=1]
+ %scevgep26 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp2591 ; <float*> [#uses=1]
+ %tmp2790 = or i32 %tmp, 6 ; <i32> [#uses=1]
+ %scevgep28 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp2790 ; <float*> [#uses=1]
+ %tmp3586 = or i32 %tmp, 7 ; <i32> [#uses=0]
+ %wsptr.215 = getelementptr [64 x float]* %workspace, i32 0, i32 %tmp ; <float*> [#uses=1]
+ %40 = load i8** %scevgep, align 4 ; <i8*> [#uses=4]
+ %41 = load float* %wsptr.215, align 4 ; <float> [#uses=1]
+ %42 = load float* %scevgep24, align 4 ; <float> [#uses=1]
+ %43 = fadd float %41, %42 ; <float> [#uses=1]
+ %44 = load float* %scevgep26, align 4 ; <float> [#uses=1]
+ %45 = load float* %scevgep28, align 4 ; <float> [#uses=1]
+ %46 = fadd float %44, %45 ; <float> [#uses=1]
+ %47 = fsub float %43, %46 ; <float> [#uses=2]
+ %48 = fsub float undef, 0.000000e+00 ; <float> [#uses=1]
+ %49 = fadd float 0.000000e+00, undef ; <float> [#uses=1]
+ %50 = fptosi float %49 to i32 ; <i32> [#uses=1]
+ %51 = add i32 %50, 4 ; <i32> [#uses=1]
+ %52 = lshr i32 %51, 3 ; <i32> [#uses=1]
+ %53 = and i32 %52, 1023 ; <i32> [#uses=1]
+ %.sum14 = add i32 %53, 128 ; <i32> [#uses=1]
+ %54 = getelementptr i8* %0, i32 %.sum14 ; <i8*> [#uses=1]
+ %55 = load i8* %54, align 1 ; <i8> [#uses=1]
+ store i8 %55, i8* null, align 1
+ %56 = getelementptr i8* %40, i32 %.sum10 ; <i8*> [#uses=1]
+ store i8 0, i8* %56, align 1
+ %57 = load i8* null, align 1 ; <i8> [#uses=1]
+ %58 = getelementptr i8* %40, i32 %.sum8 ; <i8*> [#uses=1]
+ store i8 %57, i8* %58, align 1
+ %59 = fadd float undef, %48 ; <float> [#uses=1]
+ %60 = fptosi float %59 to i32 ; <i32> [#uses=1]
+ %61 = add i32 %60, 4 ; <i32> [#uses=1]
+ %62 = lshr i32 %61, 3 ; <i32> [#uses=1]
+ %63 = and i32 %62, 1023 ; <i32> [#uses=1]
+ %.sum7 = add i32 %63, 128 ; <i32> [#uses=1]
+ %64 = getelementptr i8* %0, i32 %.sum7 ; <i8*> [#uses=1]
+ %65 = load i8* %64, align 1 ; <i8> [#uses=1]
+ %66 = getelementptr i8* %40, i32 %.sum6 ; <i8*> [#uses=1]
+ store i8 %65, i8* %66, align 1
+ %67 = fptosi float undef to i32 ; <i32> [#uses=1]
+ %68 = add i32 %67, 4 ; <i32> [#uses=1]
+ %69 = lshr i32 %68, 3 ; <i32> [#uses=1]
+ %70 = and i32 %69, 1023 ; <i32> [#uses=1]
+ %.sum5 = add i32 %70, 128 ; <i32> [#uses=1]
+ %71 = getelementptr i8* %0, i32 %.sum5 ; <i8*> [#uses=1]
+ %72 = load i8* %71, align 1 ; <i8> [#uses=1]
+ store i8 %72, i8* undef, align 1
+ %73 = fadd float %47, undef ; <float> [#uses=1]
+ %74 = fptosi float %73 to i32 ; <i32> [#uses=1]
+ %75 = add i32 %74, 4 ; <i32> [#uses=1]
+ %76 = lshr i32 %75, 3 ; <i32> [#uses=1]
+ %77 = and i32 %76, 1023 ; <i32> [#uses=1]
+ %.sum3 = add i32 %77, 128 ; <i32> [#uses=1]
+ %78 = getelementptr i8* %0, i32 %.sum3 ; <i8*> [#uses=1]
+ %79 = load i8* %78, align 1 ; <i8> [#uses=1]
+ store i8 %79, i8* undef, align 1
+ %80 = fsub float %47, undef ; <float> [#uses=1]
+ %81 = fptosi float %80 to i32 ; <i32> [#uses=1]
+ %82 = add i32 %81, 4 ; <i32> [#uses=1]
+ %83 = lshr i32 %82, 3 ; <i32> [#uses=1]
+ %84 = and i32 %83, 1023 ; <i32> [#uses=1]
+ %.sum1 = add i32 %84, 128 ; <i32> [#uses=1]
+ %85 = getelementptr i8* %0, i32 %.sum1 ; <i8*> [#uses=1]
+ %86 = load i8* %85, align 1 ; <i8> [#uses=1]
+ %87 = getelementptr i8* %40, i32 %.sum ; <i8*> [#uses=1]
+ store i8 %86, i8* %87, align 1
+ %88 = add i32 %ctr.116, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %88, 8 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb8
+
+return: ; preds = %bb8
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll b/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
new file mode 100644
index 0000000..a8e86d5
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
@@ -0,0 +1,85 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim | FileCheck %s
+
+@csize = external global [100 x [20 x [4 x i8]]] ; <[100 x [20 x [4 x i8]]]*> [#uses=1]
+@vsize = external global [100 x [20 x [4 x i8]]] ; <[100 x [20 x [4 x i8]]]*> [#uses=1]
+@cll = external global [20 x [10 x i8]] ; <[20 x [10 x i8]]*> [#uses=1]
+@lefline = external global [100 x [20 x i32]] ; <[100 x [20 x i32]]*> [#uses=1]
+@sep = external global [20 x i32] ; <[20 x i32]*> [#uses=1]
+
+define arm_apcscc void @main(i32 %argc, i8** %argv) noreturn nounwind {
+; CHECK: main:
+; CHECK: ldrb
+entry:
+ %nb.i.i.i = alloca [25 x i8], align 1 ; <[25 x i8]*> [#uses=0]
+ %line.i.i.i = alloca [200 x i8], align 1 ; <[200 x i8]*> [#uses=1]
+ %line.i = alloca [1024 x i8], align 1 ; <[1024 x i8]*> [#uses=0]
+ br i1 undef, label %bb.i.i, label %bb4.preheader.i
+
+bb.i.i: ; preds = %entry
+ unreachable
+
+bb4.preheader.i: ; preds = %entry
+ br i1 undef, label %tbl.exit, label %bb.i.preheader
+
+bb.i.preheader: ; preds = %bb4.preheader.i
+ %line3.i.i.i = getelementptr [200 x i8]* %line.i.i.i, i32 0, i32 0 ; <i8*> [#uses=1]
+ br label %bb.i
+
+bb.i: ; preds = %bb4.backedge.i, %bb.i.preheader
+ br i1 undef, label %bb3.i, label %bb4.backedge.i
+
+bb3.i: ; preds = %bb.i
+ br i1 undef, label %bb2.i184.i.i, label %bb.i183.i.i
+
+bb.i183.i.i: ; preds = %bb.i183.i.i, %bb3.i
+ br i1 undef, label %bb2.i184.i.i, label %bb.i183.i.i
+
+bb2.i184.i.i: ; preds = %bb.i183.i.i, %bb3.i
+ br i1 undef, label %bb5.i185.i.i, label %bb35.preheader.i.i.i
+
+bb35.preheader.i.i.i: ; preds = %bb2.i184.i.i
+ %0 = load i8* %line3.i.i.i, align 1 ; <i8> [#uses=1]
+ %1 = icmp eq i8 %0, 59 ; <i1> [#uses=1]
+ br i1 %1, label %bb36.i.i.i, label %bb9.i186.i.i
+
+bb5.i185.i.i: ; preds = %bb2.i184.i.i
+ br label %bb.i171.i.i
+
+bb9.i186.i.i: ; preds = %bb35.preheader.i.i.i
+ unreachable
+
+bb36.i.i.i: ; preds = %bb35.preheader.i.i.i
+ br label %bb.i171.i.i
+
+bb.i171.i.i: ; preds = %bb3.i176.i.i, %bb36.i.i.i, %bb5.i185.i.i
+ %2 = phi i32 [ %4, %bb3.i176.i.i ], [ 0, %bb36.i.i.i ], [ 0, %bb5.i185.i.i ] ; <i32> [#uses=6]
+ %scevgep16.i.i.i = getelementptr [20 x i32]* @sep, i32 0, i32 %2 ; <i32*> [#uses=1]
+ %scevgep18.i.i.i = getelementptr [20 x [10 x i8]]* @cll, i32 0, i32 %2, i32 0 ; <i8*> [#uses=0]
+ store i32 -1, i32* %scevgep16.i.i.i, align 4
+ br label %bb1.i175.i.i
+
+bb1.i175.i.i: ; preds = %bb1.i175.i.i, %bb.i171.i.i
+ %i.03.i172.i.i = phi i32 [ 0, %bb.i171.i.i ], [ %3, %bb1.i175.i.i ] ; <i32> [#uses=4]
+ %scevgep11.i.i.i = getelementptr [100 x [20 x i32]]* @lefline, i32 0, i32 %i.03.i172.i.i, i32 %2 ; <i32*> [#uses=1]
+ %scevgep12.i.i.i = getelementptr [100 x [20 x [4 x i8]]]* @vsize, i32 0, i32 %i.03.i172.i.i, i32 %2, i32 0 ; <i8*> [#uses=1]
+ %scevgep13.i.i.i = getelementptr [100 x [20 x [4 x i8]]]* @csize, i32 0, i32 %i.03.i172.i.i, i32 %2, i32 0 ; <i8*> [#uses=0]
+ store i8 0, i8* %scevgep12.i.i.i, align 1
+ store i32 0, i32* %scevgep11.i.i.i, align 4
+ store i32 108, i32* undef, align 4
+ %3 = add i32 %i.03.i172.i.i, 1 ; <i32> [#uses=2]
+ %exitcond.i174.i.i = icmp eq i32 %3, 100 ; <i1> [#uses=1]
+ br i1 %exitcond.i174.i.i, label %bb3.i176.i.i, label %bb1.i175.i.i
+
+bb3.i176.i.i: ; preds = %bb1.i175.i.i
+ %4 = add i32 %2, 1 ; <i32> [#uses=1]
+ br i1 undef, label %bb5.i177.i.i, label %bb.i171.i.i
+
+bb5.i177.i.i: ; preds = %bb3.i176.i.i
+ unreachable
+
+bb4.backedge.i: ; preds = %bb.i
+ br i1 undef, label %tbl.exit, label %bb.i
+
+tbl.exit: ; preds = %bb4.backedge.i, %bb4.preheader.i
+ unreachable
+}
diff --git a/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll
new file mode 100644
index 0000000..6cbfd0d
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim
+
+ type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16)*, i32 } ; type %0
+ type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*)*, i32 } ; type %1
+ type { void (%"struct.xalanc_1_8::FormatterToXML"*, %"struct.xalanc_1_8::XalanDOMString"*)*, i32 } ; type %2
+ type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32, i32)*, i32 } ; type %3
+ type { void (%"struct.xalanc_1_8::FormatterToXML"*)*, i32 } ; type %4
+ %"struct.std::CharVectorType" = type { %"struct.std::_Vector_base<char,std::allocator<char> >" }
+ %"struct.std::_Bit_const_iterator" = type { %"struct.std::_Bit_iterator_base" }
+ %"struct.std::_Bit_iterator_base" = type { i32*, i32 }
+ %"struct.std::_Bvector_base<std::allocator<bool> >" = type { %"struct.std::_Bvector_base<std::allocator<bool> >::_Bvector_impl" }
+ %"struct.std::_Bvector_base<std::allocator<bool> >::_Bvector_impl" = type { %"struct.std::_Bit_const_iterator", %"struct.std::_Bit_const_iterator", i32* }
+ %"struct.std::_Vector_base<char,std::allocator<char> >" = type { %"struct.std::_Vector_base<char,std::allocator<char> >::_Vector_impl" }
+ %"struct.std::_Vector_base<char,std::allocator<char> >::_Vector_impl" = type { i8*, i8*, i8* }
+ %"struct.std::_Vector_base<short unsigned int,std::allocator<short unsigned int> >" = type { %"struct.std::_Vector_base<short unsigned int,std::allocator<short unsigned int> >::_Vector_impl" }
+ %"struct.std::_Vector_base<short unsigned int,std::allocator<short unsigned int> >::_Vector_impl" = type { i16*, i16*, i16* }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >.base" = type { i32 (...)** }
+ %"struct.std::vector<bool,std::allocator<bool> >" = type { %"struct.std::_Bvector_base<std::allocator<bool> >" }
+ %"struct.std::vector<short unsigned int,std::allocator<short unsigned int> >" = type { %"struct.std::_Vector_base<short unsigned int,std::allocator<short unsigned int> >" }
+ %"struct.xalanc_1_8::FormatterListener" = type { %"struct.std::basic_ostream<char,std::char_traits<char> >.base", %"struct.std::basic_ostream<char,std::char_traits<char> >.base"*, i32 }
+ %"struct.xalanc_1_8::FormatterToXML" = type { %"struct.xalanc_1_8::FormatterListener", %"struct.std::basic_ostream<char,std::char_traits<char> >.base"*, %"struct.xalanc_1_8::XalanOutputStream"*, i16, [256 x i16], [256 x i16], i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", i32, i32, %"struct.std::vector<bool,std::allocator<bool> >", %"struct.xalanc_1_8::XalanDOMString", i8, i8, i8, i8, i8, %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", %"struct.std::vector<short unsigned int,std::allocator<short unsigned int> >", i32, %"struct.std::CharVectorType", %"struct.std::vector<bool,std::allocator<bool> >", %0, %1, %2, %3, %0, %1, %2, %3, %4, i16*, i32 }
+ %"struct.xalanc_1_8::XalanDOMString" = type { %"struct.std::vector<short unsigned int,std::allocator<short unsigned int> >", i32 }
+ %"struct.xalanc_1_8::XalanOutputStream" = type { i32 (...)**, i32, %"struct.std::basic_ostream<char,std::char_traits<char> >.base"*, i32, %"struct.std::vector<short unsigned int,std::allocator<short unsigned int> >", %"struct.xalanc_1_8::XalanDOMString", i8, i8, %"struct.std::CharVectorType" }
+
+declare arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"*)
+
+define arm_apcscc void @_ZN10xalanc_1_814FormatterToXML5cdataEPKtj(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) {
+entry:
+ %0 = getelementptr %"struct.xalanc_1_8::FormatterToXML"* %this, i32 0, i32 13 ; <i8*> [#uses=1]
+ br i1 undef, label %bb4, label %bb
+
+bb: ; preds = %entry
+ store i8 0, i8* %0, align 1
+ %1 = getelementptr %"struct.xalanc_1_8::FormatterToXML"* %this, i32 0, i32 0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ %2 = load i32 (...)*** %1, align 4 ; <i32 (...)**> [#uses=1]
+ %3 = getelementptr i32 (...)** %2, i32 11 ; <i32 (...)**> [#uses=1]
+ %4 = load i32 (...)** %3, align 4 ; <i32 (...)*> [#uses=1]
+ %5 = bitcast i32 (...)* %4 to void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32)* ; <void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32)*> [#uses=1]
+ tail call arm_apcscc void %5(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length)
+ ret void
+
+bb4: ; preds = %entry
+ tail call arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"* %this)
+ tail call arm_apcscc void undef(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 0, i32 %length, i8 zeroext undef)
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll b/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll
new file mode 100644
index 0000000..ebe9d46
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabi
+; PR4681
+
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
[email protected] = external constant [30 x i8], align 1 ; <[30 x i8]*> [#uses=1]
+
+define arm_aapcscc i32 @__mf_heuristic_check(i32 %ptr, i32 %ptr_high) nounwind {
+entry:
+ br i1 undef, label %bb1, label %bb
+
+bb: ; preds = %entry
+ unreachable
+
+bb1: ; preds = %entry
+ br i1 undef, label %bb9, label %bb2
+
+bb2: ; preds = %bb1
+ %0 = call i8* @llvm.frameaddress(i32 0) ; <i8*> [#uses=1]
+ %1 = call arm_aapcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* noalias undef, i8* noalias getelementptr ([30 x i8]* @.str2, i32 0, i32 0), i8* %0, i8* null) nounwind ; <i32> [#uses=0]
+ unreachable
+
+bb9: ; preds = %bb1
+ ret i32 undef
+}
+
+declare i8* @llvm.frameaddress(i32) nounwind readnone
+
+declare arm_aapcscc i32 @fprintf(%struct.FILE* noalias nocapture, i8* noalias nocapture, ...) nounwind
diff --git a/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll
new file mode 100644
index 0000000..319d29b7
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll
@@ -0,0 +1,153 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+neon -arm-use-neon-fp -relocation-model=pic -disable-fp-elim
+
+ type { %struct.GAP } ; type %0
+ type { i16, i8, i8 } ; type %1
+ type { [2 x i32], [2 x i32] } ; type %2
+ type { %struct.rec* } ; type %3
+ type { i8, i8, i16, i8, i8, i8, i8 } ; type %4
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.FILE_POS = type { i8, i8, i16, i32 }
+ %struct.FIRST_UNION = type { %struct.FILE_POS }
+ %struct.FOURTH_UNION = type { %struct.STYLE }
+ %struct.GAP = type { i8, i8, i16 }
+ %struct.LIST = type { %struct.rec*, %struct.rec* }
+ %struct.SECOND_UNION = type { %1 }
+ %struct.STYLE = type { %0, %0, i16, i16, i32 }
+ %struct.THIRD_UNION = type { %2 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, %3, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+ %struct.rec = type { %struct.head_type }
[email protected] = external constant [20 x i8], align 1 ; <[20 x i8]*> [#uses=1]
+@no_file_pos = external global %4 ; <%4*> [#uses=1]
+@zz_tmp = external global %struct.rec* ; <%struct.rec**> [#uses=1]
[email protected] = external constant [10 x i8], align 1 ; <[10 x i8]*> [#uses=1]
+@out_fp = external global %struct.FILE* ; <%struct.FILE**> [#uses=2]
+@cpexists = external global i32 ; <i32*> [#uses=2]
[email protected] = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1]
[email protected] = external constant [8 x i8], align 1 ; <[8 x i8]*> [#uses=1]
[email protected] = external constant [11 x i8], align 1 ; <[11 x i8]*> [#uses=1]
+
+declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
+
+declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*)
+
+declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
+
+declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
+
+declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
+
+define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
+entry:
+ br label %bb5
+
+bb5: ; preds = %bb5, %entry
+ %.pn = phi %struct.rec* [ %y.0, %bb5 ], [ undef, %entry ] ; <%struct.rec*> [#uses=1]
+ %y.0.in = getelementptr %struct.rec* %.pn, i32 0, i32 0, i32 0, i32 1, i32 0 ; <%struct.rec**> [#uses=1]
+ %y.0 = load %struct.rec** %y.0.in ; <%struct.rec*> [#uses=2]
+ br i1 undef, label %bb5, label %bb6
+
+bb6: ; preds = %bb5
+ %0 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) nounwind ; <%struct.FILE*> [#uses=1]
+ br i1 false, label %bb.i, label %FontHalfXHeight.exit
+
+bb.i: ; preds = %bb6
+ br label %FontHalfXHeight.exit
+
+FontHalfXHeight.exit: ; preds = %bb.i, %bb6
+ br i1 undef, label %bb.i1, label %FontSize.exit
+
+bb.i1: ; preds = %FontHalfXHeight.exit
+ br label %FontSize.exit
+
+FontSize.exit: ; preds = %bb.i1, %FontHalfXHeight.exit
+ %1 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %2 = icmp ult i32 0, undef ; <i1> [#uses=1]
+ br i1 %2, label %bb.i5, label %FontName.exit
+
+bb.i5: ; preds = %FontSize.exit
+ call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
+ br label %FontName.exit
+
+FontName.exit: ; preds = %bb.i5, %FontSize.exit
+ %3 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %1, i8* undef) nounwind ; <i32> [#uses=0]
+ %4 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; <i32> [#uses=0]
+ %5 = sub i32 %colmark, undef ; <i32> [#uses=1]
+ %6 = sub i32 %rowmark, undef ; <i32> [#uses=1]
+ %7 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
+ %8 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %5, i32 %6) nounwind ; <i32> [#uses=0]
+ store i32 0, i32* @cpexists, align 4
+ %9 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 1 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 4 ; <i32> [#uses=1]
+ %11 = sub i32 0, %10 ; <i32> [#uses=1]
+ %12 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
+ %13 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %11) nounwind ; <i32> [#uses=0]
+ store i32 0, i32* @cpexists, align 4
+ br label %bb100.outer.outer
+
+bb100.outer.outer: ; preds = %bb79.critedge, %bb1.i3, %FontName.exit
+ %x_addr.0.ph.ph = phi %struct.rec* [ %x, %FontName.exit ], [ null, %bb79.critedge ], [ null, %bb1.i3 ] ; <%struct.rec*> [#uses=1]
+ %14 = getelementptr %struct.rec* %x_addr.0.ph.ph, i32 0, i32 0, i32 1, i32 0 ; <%struct.FILE_POS*> [#uses=0]
+ br label %bb100.outer
+
+bb.i80: ; preds = %bb3.i85
+ br i1 undef, label %bb2.i84, label %bb2.i51
+
+bb2.i84: ; preds = %bb100.outer, %bb.i80
+ br i1 undef, label %bb3.i77, label %bb3.i85
+
+bb3.i85: ; preds = %bb2.i84
+ br i1 false, label %StringBeginsWith.exit88, label %bb.i80
+
+StringBeginsWith.exit88: ; preds = %bb3.i85
+ br i1 undef, label %bb3.i77, label %bb2.i51
+
+bb2.i.i68: ; preds = %bb3.i77
+ br label %bb3.i77
+
+bb3.i77: ; preds = %bb2.i.i68, %StringBeginsWith.exit88, %bb2.i84
+ br i1 false, label %bb1.i58, label %bb2.i.i68
+
+bb1.i58: ; preds = %bb3.i77
+ unreachable
+
+bb.i47: ; preds = %bb3.i52
+ br i1 undef, label %bb2.i51, label %bb2.i.i15.critedge
+
+bb2.i51: ; preds = %bb.i47, %StringBeginsWith.exit88, %bb.i80
+ %15 = load i8* undef, align 1 ; <i8> [#uses=0]
+ br i1 false, label %StringBeginsWith.exit55thread-split, label %bb3.i52
+
+bb3.i52: ; preds = %bb2.i51
+ br i1 false, label %StringBeginsWith.exit55, label %bb.i47
+
+StringBeginsWith.exit55thread-split: ; preds = %bb2.i51
+ br label %StringBeginsWith.exit55
+
+StringBeginsWith.exit55: ; preds = %StringBeginsWith.exit55thread-split, %bb3.i52
+ br label %bb2.i41
+
+bb2.i41: ; preds = %bb2.i41, %StringBeginsWith.exit55
+ br label %bb2.i41
+
+bb2.i.i15.critedge: ; preds = %bb.i47
+ %16 = call arm_apcscc i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) nounwind ; <i8*> [#uses=0]
+ %iftmp.560.0 = select i1 undef, i32 2, i32 0 ; <i32> [#uses=1]
+ br label %bb100.outer
+
+bb2.i8: ; preds = %bb100.outer
+ br i1 undef, label %bb1.i3, label %bb79.critedge
+
+bb1.i3: ; preds = %bb2.i8
+ br label %bb100.outer.outer
+
+bb79.critedge: ; preds = %bb2.i8
+ store %struct.rec* null, %struct.rec** @zz_tmp, align 4
+ br label %bb100.outer.outer
+
+bb100.outer: ; preds = %bb2.i.i15.critedge, %bb100.outer.outer
+ %state.0.ph = phi i32 [ 0, %bb100.outer.outer ], [ %iftmp.560.0, %bb2.i.i15.critedge ] ; <i32> [#uses=1]
+ %cond = icmp eq i32 %state.0.ph, 1 ; <i1> [#uses=1]
+ br i1 %cond, label %bb2.i8, label %bb2.i84
+}
diff --git a/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll
new file mode 100644
index 0000000..a62b612
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll
@@ -0,0 +1,508 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+neon -arm-use-neon-fp -relocation-model=pic -disable-fp-elim -O3
+
+ type { i16, i8, i8 } ; type %0
+ type { [2 x i32], [2 x i32] } ; type %1
+ type { %struct.GAP } ; type %2
+ type { %struct.rec* } ; type %3
+ type { i8, i8, i16, i8, i8, i8, i8 } ; type %4
+ type { i8, i8, i8, i8 } ; type %5
+ %struct.COMPOSITE = type { i8, i16, i16 }
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.FILE_POS = type { i8, i8, i16, i32 }
+ %struct.FIRST_UNION = type { %struct.FILE_POS }
+ %struct.FONT_INFO = type { %struct.metrics*, i8*, i16*, %struct.COMPOSITE*, i32, %struct.rec*, %struct.rec*, i16, i16, i16*, i8*, i8*, i16* }
+ %struct.FOURTH_UNION = type { %struct.STYLE }
+ %struct.GAP = type { i8, i8, i16 }
+ %struct.LIST = type { %struct.rec*, %struct.rec* }
+ %struct.SECOND_UNION = type { %0 }
+ %struct.STYLE = type { %2, %2, i16, i16, i32 }
+ %struct.THIRD_UNION = type { %1 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, %3, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+ %struct.metrics = type { i16, i16, i16, i16, i16 }
+ %struct.rec = type { %struct.head_type }
[email protected] = external constant [20 x i8], align 1 ; <[20 x i8]*> [#uses=1]
+@no_file_pos = external global %4 ; <%4*> [#uses=1]
[email protected] = external constant [9 x i8], align 1 ; <[9 x i8]*> [#uses=1]
+@zz_lengths = external global [150 x i8] ; <[150 x i8]*> [#uses=1]
+@next_free.4772 = external global i8** ; <i8***> [#uses=3]
+@top_free.4773 = external global i8** ; <i8***> [#uses=2]
[email protected] = external constant [32 x i8], align 1 ; <[32 x i8]*> [#uses=1]
+@zz_free = external global [524 x %struct.rec*] ; <[524 x %struct.rec*]*> [#uses=2]
+@zz_hold = external global %struct.rec* ; <%struct.rec**> [#uses=5]
+@zz_tmp = external global %struct.rec* ; <%struct.rec**> [#uses=2]
+@zz_res = external global %struct.rec* ; <%struct.rec**> [#uses=2]
+@xx_link = external global %struct.rec* ; <%struct.rec**> [#uses=2]
+@font_count = external global i32 ; <i32*> [#uses=1]
[email protected] = external constant [10 x i8], align 1 ; <[10 x i8]*> [#uses=1]
[email protected] = external constant [30 x i8], align 1 ; <[30 x i8]*> [#uses=1]
[email protected] = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1]
[email protected] = external constant [27 x i8], align 1 ; <[27 x i8]*> [#uses=1]
+@out_fp = external global %struct.FILE* ; <%struct.FILE**> [#uses=3]
[email protected] = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1]
+@cpexists = external global i32 ; <i32*> [#uses=2]
[email protected] = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1]
+@currentfont = external global i32 ; <i32*> [#uses=3]
+@wordcount = external global i32 ; <i32*> [#uses=1]
+@needs = external global %struct.rec* ; <%struct.rec**> [#uses=1]
[email protected] = external constant [6 x i8], align 1 ; <[6 x i8]*> [#uses=1]
[email protected] = external constant [10 x i8], align 1 ; <[10 x i8]*> [#uses=1]
[email protected] = external constant [40 x i8], align 1 ; <[40 x i8]*> [#uses=1]
[email protected] = external constant [8 x i8], align 1 ; <[8 x i8]*> [#uses=1]
[email protected] = external constant [11 x i8], align 1 ; <[11 x i8]*> [#uses=1]
[email protected] = external constant [23 x i8], align 1 ; <[23 x i8]*> [#uses=1]
[email protected] = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1]
[email protected] = external constant [26 x i8], align 1 ; <[26 x i8]*> [#uses=1]
+
+declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
+
+declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*)
+
+declare arm_apcscc i32 @remove(i8* nocapture) nounwind
+
+declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
+
+declare arm_apcscc %struct.rec* @MakeWord(i32, i8* nocapture, %struct.FILE_POS*) nounwind
+
+declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
+
+declare arm_apcscc i32 @"\01_fputs"(i8*, %struct.FILE*)
+
+declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
+
+declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
+
+define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
+entry:
+ %buff = alloca [512 x i8], align 4 ; <[512 x i8]*> [#uses=5]
+ %0 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 1, i32 0, i32 0 ; <i8*> [#uses=2]
+ %1 = load i8* %0, align 4 ; <i8> [#uses=1]
+ %2 = add i8 %1, -94 ; <i8> [#uses=1]
+ %3 = icmp ugt i8 %2, 1 ; <i1> [#uses=1]
+ br i1 %3, label %bb, label %bb1
+
+bb: ; preds = %entry
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %4 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1]
+ %5 = bitcast %struct.SECOND_UNION* %4 to %5* ; <%5*> [#uses=1]
+ %6 = getelementptr %5* %5, i32 0, i32 1 ; <i8*> [#uses=1]
+ %7 = load i8* %6, align 1 ; <i8> [#uses=1]
+ %8 = icmp eq i8 %7, 0 ; <i1> [#uses=1]
+ br i1 %8, label %bb2, label %bb3
+
+bb2: ; preds = %bb1
+ call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([40 x i8]* @.str1802944, i32 0, i32 0)) nounwind
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %9 = load %struct.rec** undef, align 4 ; <%struct.rec*> [#uses=0]
+ br label %bb5
+
+bb5: ; preds = %bb5, %bb3
+ %y.0 = load %struct.rec** null ; <%struct.rec*> [#uses=2]
+ br i1 false, label %bb5, label %bb6
+
+bb6: ; preds = %bb5
+ %10 = load i8* %0, align 4 ; <i8> [#uses=1]
+ %11 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 1, i32 0 ; <%struct.FILE_POS*> [#uses=1]
+ %12 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext %10, %struct.rec** null, %struct.FILE_POS* %11, i32* undef) nounwind ; <%struct.FILE*> [#uses=4]
+ br i1 false, label %bb7, label %bb8
+
+bb7: ; preds = %bb6
+ unreachable
+
+bb8: ; preds = %bb6
+ %13 = and i32 undef, 4095 ; <i32> [#uses=2]
+ %14 = load i32* @currentfont, align 4 ; <i32> [#uses=0]
+ br i1 false, label %bb10, label %bb9
+
+bb9: ; preds = %bb8
+ %15 = icmp ult i32 0, %13 ; <i1> [#uses=1]
+ br i1 %15, label %bb.i, label %FontHalfXHeight.exit
+
+bb.i: ; preds = %bb9
+ call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([17 x i8]* @.str111875, i32 0, i32 0)) nounwind
+ %.pre186 = load i32* @currentfont, align 4 ; <i32> [#uses=1]
+ br label %FontHalfXHeight.exit
+
+FontHalfXHeight.exit: ; preds = %bb.i, %bb9
+ %16 = phi i32 [ %.pre186, %bb.i ], [ %13, %bb9 ] ; <i32> [#uses=1]
+ br i1 false, label %bb.i1, label %bb1.i
+
+bb.i1: ; preds = %FontHalfXHeight.exit
+ br label %bb1.i
+
+bb1.i: ; preds = %bb.i1, %FontHalfXHeight.exit
+ br i1 undef, label %bb2.i, label %FontSize.exit
+
+bb2.i: ; preds = %bb1.i
+ call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 37, i32 61, i8* getelementptr ([30 x i8]* @.str101874, i32 0, i32 0), i32 1, %struct.FILE_POS* null) nounwind
+ unreachable
+
+FontSize.exit: ; preds = %bb1.i
+ %17 = getelementptr %struct.FONT_INFO* undef, i32 %16, i32 5 ; <%struct.rec**> [#uses=0]
+ %18 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %19 = load i32* @currentfont, align 4 ; <i32> [#uses=2]
+ %20 = load i32* @font_count, align 4 ; <i32> [#uses=1]
+ %21 = icmp ult i32 %20, %19 ; <i1> [#uses=1]
+ br i1 %21, label %bb.i5, label %FontName.exit
+
+bb.i5: ; preds = %FontSize.exit
+ call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
+ br label %FontName.exit
+
+FontName.exit: ; preds = %bb.i5, %FontSize.exit
+ %22 = phi %struct.FONT_INFO* [ undef, %bb.i5 ], [ undef, %FontSize.exit ] ; <%struct.FONT_INFO*> [#uses=1]
+ %23 = getelementptr %struct.FONT_INFO* %22, i32 %19, i32 5 ; <%struct.rec**> [#uses=0]
+ %24 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %18, i8* null) nounwind ; <i32> [#uses=0]
+ br label %bb10
+
+bb10: ; preds = %FontName.exit, %bb8
+ %25 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; <i32> [#uses=0]
+ %26 = sub i32 %rowmark, undef ; <i32> [#uses=1]
+ %27 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
+ %28 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %27, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %26) nounwind ; <i32> [#uses=0]
+ store i32 0, i32* @cpexists, align 4
+ %29 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([17 x i8]* @.str192782, i32 0, i32 0), double 2.000000e+01, double 2.000000e+01) nounwind ; <i32> [#uses=0]
+ %30 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %31 = load i32* %30, align 4 ; <i32> [#uses=1]
+ %32 = sub i32 0, %31 ; <i32> [#uses=1]
+ %33 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %34 = sub i32 0, %33 ; <i32> [#uses=1]
+ %35 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
+ %36 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %35, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %32, i32 %34) nounwind ; <i32> [#uses=0]
+ store i32 0, i32* @cpexists, align 4
+ %37 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1]
+ %38 = getelementptr %struct.rec* %37, i32 0, i32 0, i32 4 ; <%struct.FOURTH_UNION*> [#uses=1]
+ %39 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([23 x i8]* @.str1852949, i32 0, i32 0), %struct.FOURTH_UNION* %38) nounwind ; <i32> [#uses=0]
+ %buff14 = getelementptr [512 x i8]* %buff, i32 0, i32 0 ; <i8*> [#uses=5]
+ %40 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
+ %iftmp.506.0 = select i1 undef, i32 2, i32 0 ; <i32> [#uses=1]
+ %41 = getelementptr [512 x i8]* %buff, i32 0, i32 26 ; <i8*> [#uses=1]
+ br label %bb100.outer.outer
+
+bb100.outer.outer: ; preds = %bb83, %bb10
+ %state.0.ph.ph = phi i32 [ %iftmp.506.0, %bb10 ], [ undef, %bb83 ] ; <i32> [#uses=1]
+ %x_addr.0.ph.ph = phi %struct.rec* [ %x, %bb10 ], [ %71, %bb83 ] ; <%struct.rec*> [#uses=1]
+ %42 = getelementptr %struct.rec* %x_addr.0.ph.ph, i32 0, i32 0, i32 1, i32 0 ; <%struct.FILE_POS*> [#uses=0]
+ br label %bb100.outer
+
+bb.i80: ; preds = %bb3.i85
+ %43 = icmp eq i8 %44, %46 ; <i1> [#uses=1]
+ %indvar.next.i79 = add i32 %indvar.i81, 1 ; <i32> [#uses=1]
+ br i1 %43, label %bb2.i84, label %bb2.i51
+
+bb2.i84: ; preds = %bb100.outer, %bb.i80
+ %indvar.i81 = phi i32 [ %indvar.next.i79, %bb.i80 ], [ 0, %bb100.outer ] ; <i32> [#uses=3]
+ %pp.0.i82 = getelementptr [27 x i8]* @.str141878, i32 0, i32 %indvar.i81 ; <i8*> [#uses=2]
+ %sp.0.i83 = getelementptr [512 x i8]* %buff, i32 0, i32 %indvar.i81 ; <i8*> [#uses=1]
+ %44 = load i8* %sp.0.i83, align 1 ; <i8> [#uses=2]
+ %45 = icmp eq i8 %44, 0 ; <i1> [#uses=1]
+ br i1 %45, label %StringBeginsWith.exit88thread-split, label %bb3.i85
+
+bb3.i85: ; preds = %bb2.i84
+ %46 = load i8* %pp.0.i82, align 1 ; <i8> [#uses=3]
+ %47 = icmp eq i8 %46, 0 ; <i1> [#uses=1]
+ br i1 %47, label %StringBeginsWith.exit88, label %bb.i80
+
+StringBeginsWith.exit88thread-split: ; preds = %bb2.i84
+ %.pr = load i8* %pp.0.i82 ; <i8> [#uses=1]
+ br label %StringBeginsWith.exit88
+
+StringBeginsWith.exit88: ; preds = %StringBeginsWith.exit88thread-split, %bb3.i85
+ %48 = phi i8 [ %.pr, %StringBeginsWith.exit88thread-split ], [ %46, %bb3.i85 ] ; <i8> [#uses=1]
+ %phitmp91 = icmp eq i8 %48, 0 ; <i1> [#uses=1]
+ br i1 %phitmp91, label %bb3.i77, label %bb2.i51
+
+bb2.i.i68: ; preds = %bb3.i77
+ br i1 false, label %bb2.i51, label %bb2.i75
+
+bb2.i75: ; preds = %bb2.i.i68
+ br label %bb3.i77
+
+bb3.i77: ; preds = %bb2.i75, %StringBeginsWith.exit88
+ %sp.0.i76 = getelementptr [512 x i8]* %buff, i32 0, i32 undef ; <i8*> [#uses=1]
+ %49 = load i8* %sp.0.i76, align 1 ; <i8> [#uses=1]
+ %50 = icmp eq i8 %49, 0 ; <i1> [#uses=1]
+ br i1 %50, label %bb24, label %bb2.i.i68
+
+bb24: ; preds = %bb3.i77
+ %51 = call arm_apcscc %struct.rec* @MakeWord(i32 11, i8* %41, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=0]
+ %52 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4 ; <i8> [#uses=1]
+ %53 = zext i8 %52 to i32 ; <i32> [#uses=2]
+ %54 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %53 ; <%struct.rec**> [#uses=2]
+ %55 = load %struct.rec** %54, align 4 ; <%struct.rec*> [#uses=3]
+ %56 = icmp eq %struct.rec* %55, null ; <i1> [#uses=1]
+ br i1 %56, label %bb27, label %bb28
+
+bb27: ; preds = %bb24
+ br i1 undef, label %bb.i56, label %GetMemory.exit62
+
+bb.i56: ; preds = %bb27
+ br i1 undef, label %bb1.i58, label %bb2.i60
+
+bb1.i58: ; preds = %bb.i56
+ call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
+ br label %bb2.i60
+
+bb2.i60: ; preds = %bb1.i58, %bb.i56
+ %.pre1.i59 = phi i8** [ undef, %bb1.i58 ], [ undef, %bb.i56 ] ; <i8**> [#uses=1]
+ store i8** undef, i8*** @top_free.4773, align 4
+ br label %GetMemory.exit62
+
+GetMemory.exit62: ; preds = %bb2.i60, %bb27
+ %57 = phi i8** [ %.pre1.i59, %bb2.i60 ], [ undef, %bb27 ] ; <i8**> [#uses=1]
+ %58 = getelementptr i8** %57, i32 %53 ; <i8**> [#uses=1]
+ store i8** %58, i8*** @next_free.4772, align 4
+ store %struct.rec* undef, %struct.rec** @zz_hold, align 4
+ br label %bb29
+
+bb28: ; preds = %bb24
+ store %struct.rec* %55, %struct.rec** @zz_hold, align 4
+ %59 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1]
+ store %struct.rec* %59, %struct.rec** %54, align 4
+ br label %bb29
+
+bb29: ; preds = %bb28, %GetMemory.exit62
+ %.pre184 = phi %struct.rec* [ %55, %bb28 ], [ undef, %GetMemory.exit62 ] ; <%struct.rec*> [#uses=3]
+ store i8 0, i8* undef
+ store %struct.rec* %.pre184, %struct.rec** @xx_link, align 4
+ br i1 undef, label %bb35, label %bb31
+
+bb31: ; preds = %bb29
+ store %struct.rec* %.pre184, %struct.rec** undef
+ br label %bb35
+
+bb35: ; preds = %bb31, %bb29
+ br i1 undef, label %bb41, label %bb37
+
+bb37: ; preds = %bb35
+ %60 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1]
+ store %struct.rec* %60, %struct.rec** undef
+ store %struct.rec* undef, %struct.rec** null
+ store %struct.rec* %.pre184, %struct.rec** null, align 4
+ br label %bb41
+
+bb41: ; preds = %bb37, %bb35
+ %61 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=1]
+ %62 = icmp eq i8* %61, null ; <i1> [#uses=1]
+ %iftmp.554.0 = select i1 %62, i32 2, i32 1 ; <i32> [#uses=1]
+ br label %bb100.outer
+
+bb.i47: ; preds = %bb3.i52
+ %63 = icmp eq i8 %64, %65 ; <i1> [#uses=1]
+ br i1 %63, label %bb2.i51, label %bb2.i41
+
+bb2.i51: ; preds = %bb.i47, %bb2.i.i68, %StringBeginsWith.exit88, %bb.i80
+ %pp.0.i49 = getelementptr [17 x i8]* @.str1872951, i32 0, i32 0 ; <i8*> [#uses=1]
+ %64 = load i8* null, align 1 ; <i8> [#uses=1]
+ br i1 false, label %StringBeginsWith.exit55thread-split, label %bb3.i52
+
+bb3.i52: ; preds = %bb2.i51
+ %65 = load i8* %pp.0.i49, align 1 ; <i8> [#uses=1]
+ br i1 false, label %StringBeginsWith.exit55, label %bb.i47
+
+StringBeginsWith.exit55thread-split: ; preds = %bb2.i51
+ br label %StringBeginsWith.exit55
+
+StringBeginsWith.exit55: ; preds = %StringBeginsWith.exit55thread-split, %bb3.i52
+ br i1 false, label %bb49, label %bb2.i41
+
+bb49: ; preds = %StringBeginsWith.exit55
+ br label %bb2.i41
+
+bb2.i41: ; preds = %bb2.i41, %bb49, %StringBeginsWith.exit55, %bb.i47
+ br i1 false, label %bb2.i41, label %bb2.i.i15
+
+bb2.i.i15: ; preds = %bb2.i41
+ %pp.0.i.i13 = getelementptr [6 x i8]* @.str742838, i32 0, i32 0 ; <i8*> [#uses=1]
+ br i1 false, label %StringBeginsWith.exitthread-split.i18, label %bb3.i.i16
+
+bb3.i.i16: ; preds = %bb2.i.i15
+ %66 = load i8* %pp.0.i.i13, align 1 ; <i8> [#uses=1]
+ br label %StringBeginsWith.exit.i20
+
+StringBeginsWith.exitthread-split.i18: ; preds = %bb2.i.i15
+ br label %StringBeginsWith.exit.i20
+
+StringBeginsWith.exit.i20: ; preds = %StringBeginsWith.exitthread-split.i18, %bb3.i.i16
+ %67 = phi i8 [ undef, %StringBeginsWith.exitthread-split.i18 ], [ %66, %bb3.i.i16 ] ; <i8> [#uses=1]
+ %phitmp.i19 = icmp eq i8 %67, 0 ; <i1> [#uses=1]
+ br i1 %phitmp.i19, label %bb58, label %bb2.i6.i26
+
+bb2.i6.i26: ; preds = %bb2.i6.i26, %StringBeginsWith.exit.i20
+ %indvar.i3.i23 = phi i32 [ %indvar.next.i1.i21, %bb2.i6.i26 ], [ 0, %StringBeginsWith.exit.i20 ] ; <i32> [#uses=3]
+ %sp.0.i5.i25 = getelementptr [512 x i8]* %buff, i32 0, i32 %indvar.i3.i23 ; <i8*> [#uses=0]
+ %pp.0.i4.i24 = getelementptr [10 x i8]* @.str752839, i32 0, i32 %indvar.i3.i23 ; <i8*> [#uses=1]
+ %68 = load i8* %pp.0.i4.i24, align 1 ; <i8> [#uses=0]
+ %indvar.next.i1.i21 = add i32 %indvar.i3.i23, 1 ; <i32> [#uses=1]
+ br i1 undef, label %bb2.i6.i26, label %bb55
+
+bb55: ; preds = %bb2.i6.i26
+ %69 = call arm_apcscc i32 @"\01_fputs"(i8* %buff14, %struct.FILE* undef) nounwind ; <i32> [#uses=0]
+ unreachable
+
+bb58: ; preds = %StringBeginsWith.exit.i20
+ %70 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
+ %iftmp.560.0 = select i1 undef, i32 2, i32 0 ; <i32> [#uses=1]
+ br label %bb100.outer
+
+bb.i7: ; preds = %bb3.i
+ br i1 false, label %bb2.i8, label %bb2.i.i
+
+bb2.i8: ; preds = %bb100.outer, %bb.i7
+ br i1 undef, label %StringBeginsWith.exitthread-split, label %bb3.i
+
+bb3.i: ; preds = %bb2.i8
+ br i1 undef, label %StringBeginsWith.exit, label %bb.i7
+
+StringBeginsWith.exitthread-split: ; preds = %bb2.i8
+ br label %StringBeginsWith.exit
+
+StringBeginsWith.exit: ; preds = %StringBeginsWith.exitthread-split, %bb3.i
+ %phitmp93 = icmp eq i8 undef, 0 ; <i1> [#uses=1]
+ br i1 %phitmp93, label %bb66, label %bb2.i.i
+
+bb66: ; preds = %StringBeginsWith.exit
+ %71 = call arm_apcscc %struct.rec* @MakeWord(i32 11, i8* undef, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=4]
+ %72 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4 ; <i8> [#uses=1]
+ %73 = zext i8 %72 to i32 ; <i32> [#uses=2]
+ %74 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %73 ; <%struct.rec**> [#uses=2]
+ %75 = load %struct.rec** %74, align 4 ; <%struct.rec*> [#uses=3]
+ %76 = icmp eq %struct.rec* %75, null ; <i1> [#uses=1]
+ br i1 %76, label %bb69, label %bb70
+
+bb69: ; preds = %bb66
+ br i1 undef, label %bb.i2, label %GetMemory.exit
+
+bb.i2: ; preds = %bb69
+ %77 = call arm_apcscc noalias i8* @calloc(i32 1020, i32 4) nounwind ; <i8*> [#uses=1]
+ %78 = bitcast i8* %77 to i8** ; <i8**> [#uses=3]
+ store i8** %78, i8*** @next_free.4772, align 4
+ br i1 undef, label %bb1.i3, label %bb2.i4
+
+bb1.i3: ; preds = %bb.i2
+ call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
+ br label %bb2.i4
+
+bb2.i4: ; preds = %bb1.i3, %bb.i2
+ %.pre1.i = phi i8** [ undef, %bb1.i3 ], [ %78, %bb.i2 ] ; <i8**> [#uses=1]
+ %79 = phi i8** [ undef, %bb1.i3 ], [ %78, %bb.i2 ] ; <i8**> [#uses=1]
+ %80 = getelementptr i8** %79, i32 1020 ; <i8**> [#uses=1]
+ store i8** %80, i8*** @top_free.4773, align 4
+ br label %GetMemory.exit
+
+GetMemory.exit: ; preds = %bb2.i4, %bb69
+ %81 = phi i8** [ %.pre1.i, %bb2.i4 ], [ undef, %bb69 ] ; <i8**> [#uses=2]
+ %82 = bitcast i8** %81 to %struct.rec* ; <%struct.rec*> [#uses=3]
+ %83 = getelementptr i8** %81, i32 %73 ; <i8**> [#uses=1]
+ store i8** %83, i8*** @next_free.4772, align 4
+ store %struct.rec* %82, %struct.rec** @zz_hold, align 4
+ br label %bb71
+
+bb70: ; preds = %bb66
+ %84 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1]
+ store %struct.rec* %84, %struct.rec** %74, align 4
+ br label %bb71
+
+bb71: ; preds = %bb70, %GetMemory.exit
+ %.pre185 = phi %struct.rec* [ %75, %bb70 ], [ %82, %GetMemory.exit ] ; <%struct.rec*> [#uses=8]
+ %85 = phi %struct.rec* [ %75, %bb70 ], [ %82, %GetMemory.exit ] ; <%struct.rec*> [#uses=1]
+ %86 = getelementptr %struct.rec* %85, i32 0, i32 0, i32 1, i32 0, i32 0 ; <i8*> [#uses=0]
+ %87 = getelementptr %struct.rec* %.pre185, i32 0, i32 0, i32 0, i32 1, i32 1 ; <%struct.rec**> [#uses=0]
+ %88 = getelementptr %struct.rec* %.pre185, i32 0, i32 0, i32 0, i32 1, i32 0 ; <%struct.rec**> [#uses=1]
+ store %struct.rec* %.pre185, %struct.rec** @xx_link, align 4
+ store %struct.rec* %.pre185, %struct.rec** @zz_res, align 4
+ %89 = load %struct.rec** @needs, align 4 ; <%struct.rec*> [#uses=2]
+ store %struct.rec* %89, %struct.rec** @zz_hold, align 4
+ br i1 false, label %bb77, label %bb73
+
+bb73: ; preds = %bb71
+ %90 = getelementptr %struct.rec* %89, i32 0, i32 0, i32 0, i32 0, i32 0 ; <%struct.rec**> [#uses=1]
+ store %struct.rec* null, %struct.rec** @zz_tmp, align 4
+ store %struct.rec* %.pre185, %struct.rec** %90
+ store %struct.rec* %.pre185, %struct.rec** undef, align 4
+ br label %bb77
+
+bb77: ; preds = %bb73, %bb71
+ store %struct.rec* %.pre185, %struct.rec** @zz_res, align 4
+ store %struct.rec* %71, %struct.rec** @zz_hold, align 4
+ br i1 undef, label %bb83, label %bb79
+
+bb79: ; preds = %bb77
+ %91 = getelementptr %struct.rec* %71, i32 0, i32 0, i32 0, i32 1, i32 0 ; <%struct.rec**> [#uses=1]
+ store %struct.rec* null, %struct.rec** @zz_tmp, align 4
+ %92 = load %struct.rec** %88, align 4 ; <%struct.rec*> [#uses=1]
+ store %struct.rec* %92, %struct.rec** %91
+ %93 = getelementptr %struct.rec* undef, i32 0, i32 0, i32 0, i32 1, i32 1 ; <%struct.rec**> [#uses=1]
+ store %struct.rec* %71, %struct.rec** %93, align 4
+ store %struct.rec* %.pre185, %struct.rec** undef, align 4
+ br label %bb83
+
+bb83: ; preds = %bb79, %bb77
+ br label %bb100.outer.outer
+
+bb.i.i: ; preds = %bb3.i.i
+ br i1 undef, label %bb2.i.i, label %bb2.i6.i
+
+bb2.i.i: ; preds = %bb.i.i, %StringBeginsWith.exit, %bb.i7
+ br i1 undef, label %StringBeginsWith.exitthread-split.i, label %bb3.i.i
+
+bb3.i.i: ; preds = %bb2.i.i
+ br i1 undef, label %StringBeginsWith.exit.i, label %bb.i.i
+
+StringBeginsWith.exitthread-split.i: ; preds = %bb2.i.i
+ br label %StringBeginsWith.exit.i
+
+StringBeginsWith.exit.i: ; preds = %StringBeginsWith.exitthread-split.i, %bb3.i.i
+ br i1 false, label %bb94, label %bb2.i6.i
+
+bb.i2.i: ; preds = %bb3.i7.i
+ br i1 false, label %bb2.i6.i, label %bb91
+
+bb2.i6.i: ; preds = %bb.i2.i, %StringBeginsWith.exit.i, %bb.i.i
+ br i1 undef, label %strip_out.exitthread-split, label %bb3.i7.i
+
+bb3.i7.i: ; preds = %bb2.i6.i
+ %94 = load i8* undef, align 1 ; <i8> [#uses=1]
+ br i1 undef, label %strip_out.exit, label %bb.i2.i
+
+strip_out.exitthread-split: ; preds = %bb2.i6.i
+ %.pr100 = load i8* undef ; <i8> [#uses=1]
+ br label %strip_out.exit
+
+strip_out.exit: ; preds = %strip_out.exitthread-split, %bb3.i7.i
+ %95 = phi i8 [ %.pr100, %strip_out.exitthread-split ], [ %94, %bb3.i7.i ] ; <i8> [#uses=0]
+ br i1 undef, label %bb94, label %bb91
+
+bb91: ; preds = %strip_out.exit, %bb.i2.i
+ unreachable
+
+bb94: ; preds = %strip_out.exit, %StringBeginsWith.exit.i
+ %96 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; <i8*> [#uses=0]
+ unreachable
+
+bb100.outer: ; preds = %bb58, %bb41, %bb100.outer.outer
+ %state.0.ph = phi i32 [ %state.0.ph.ph, %bb100.outer.outer ], [ %iftmp.560.0, %bb58 ], [ %iftmp.554.0, %bb41 ] ; <i32> [#uses=1]
+ switch i32 %state.0.ph, label %bb2.i84 [
+ i32 2, label %bb101.split
+ i32 1, label %bb2.i8
+ ]
+
+bb101.split: ; preds = %bb100.outer
+ %97 = icmp eq i32 undef, 0 ; <i1> [#uses=1]
+ br i1 %97, label %bb103, label %bb102
+
+bb102: ; preds = %bb101.split
+ %98 = call arm_apcscc i32 @remove(i8* getelementptr ([9 x i8]* @.str19294, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ unreachable
+
+bb103: ; preds = %bb101.split
+ %99 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
+ %100 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %99, i8* getelementptr ([26 x i8]* @.str1932957, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ store i32 0, i32* @wordcount, align 4
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
new file mode 100644
index 0000000..7647474
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp | not grep fcpys
+; rdar://7117307
+
+ %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
+ %struct.List = type { %struct.List*, %struct.Patient*, %struct.List* }
+ %struct.Patient = type { i32, i32, i32, %struct.Village* }
+ %struct.Results = type { float, float, float }
+ %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
+
+define arm_apcscc void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
+entry:
+ br i1 undef, label %bb, label %bb6.preheader
+
+bb6.preheader: ; preds = %entry
+ call void @llvm.memcpy.i32(i8* undef, i8* undef, i32 12, i32 4)
+ br i1 undef, label %bb15, label %bb13
+
+bb: ; preds = %entry
+ ret void
+
+bb13: ; preds = %bb13, %bb6.preheader
+ %0 = fadd float undef, undef ; <float> [#uses=1]
+ %1 = fadd float undef, 1.000000e+00 ; <float> [#uses=1]
+ br i1 undef, label %bb15, label %bb13
+
+bb15: ; preds = %bb13, %bb6.preheader
+ %r1.0.0.lcssa = phi float [ 0.000000e+00, %bb6.preheader ], [ %1, %bb13 ] ; <float> [#uses=1]
+ %r1.1.0.lcssa = phi float [ undef, %bb6.preheader ], [ %0, %bb13 ] ; <float> [#uses=0]
+ store float %r1.0.0.lcssa, float* undef, align 4
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
new file mode 100644
index 0000000..acf562c
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp
+; rdar://7117307
+
+ %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
+ %struct.List = type { %struct.List*, %struct.Patient*, %struct.List* }
+ %struct.Patient = type { i32, i32, i32, %struct.Village* }
+ %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
+
+define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
+entry:
+ br i1 undef, label %bb14, label %bb3.preheader
+
+bb3.preheader: ; preds = %entry
+ br label %bb5
+
+bb5: ; preds = %bb5, %bb3.preheader
+ br i1 undef, label %bb11, label %bb5
+
+bb11: ; preds = %bb5
+ %0 = fmul float undef, 0x41E0000000000000 ; <float> [#uses=1]
+ %1 = fptosi float %0 to i32 ; <i32> [#uses=1]
+ store i32 %1, i32* undef, align 4
+ br i1 undef, label %generate_patient.exit, label %generate_patient.exit.thread
+
+generate_patient.exit.thread: ; preds = %bb11
+ ret %struct.List* null
+
+generate_patient.exit: ; preds = %bb11
+ br i1 undef, label %bb14, label %bb12
+
+bb12: ; preds = %generate_patient.exit
+ br i1 undef, label %bb.i, label %bb1.i
+
+bb.i: ; preds = %bb12
+ ret %struct.List* null
+
+bb1.i: ; preds = %bb12
+ ret %struct.List* null
+
+bb14: ; preds = %generate_patient.exit, %entry
+ ret %struct.List* undef
+}
diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
new file mode 100644
index 0000000..3ada026
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
@@ -0,0 +1,54 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon -arm-use-neon-fp
+; rdar://7117307
+
+ %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
+ %struct.List = type { %struct.List*, %struct.Patient*, %struct.List* }
+ %struct.Patient = type { i32, i32, i32, %struct.Village* }
+ %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
+
+define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
+entry:
+ br i1 undef, label %bb14, label %bb3.preheader
+
+bb3.preheader: ; preds = %entry
+ br label %bb5
+
+bb5: ; preds = %bb5, %bb3.preheader
+ br i1 undef, label %bb11, label %bb5
+
+bb11: ; preds = %bb5
+ %0 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %1 = xor i32 %0, 123459876 ; <i32> [#uses=1]
+ %2 = sdiv i32 %1, 127773 ; <i32> [#uses=1]
+ %3 = mul i32 %2, 2836 ; <i32> [#uses=1]
+ %4 = sub i32 0, %3 ; <i32> [#uses=1]
+ %5 = xor i32 %4, 123459876 ; <i32> [#uses=1]
+ %idum_addr.0.i.i = select i1 undef, i32 undef, i32 %5 ; <i32> [#uses=1]
+ %6 = sitofp i32 %idum_addr.0.i.i to double ; <double> [#uses=1]
+ %7 = fmul double %6, 0x3E00000000200000 ; <double> [#uses=1]
+ %8 = fptrunc double %7 to float ; <float> [#uses=2]
+ %9 = fmul float %8, 0x41E0000000000000 ; <float> [#uses=1]
+ %10 = fptosi float %9 to i32 ; <i32> [#uses=1]
+ store i32 %10, i32* undef, align 4
+ %11 = fpext float %8 to double ; <double> [#uses=1]
+ %12 = fcmp ogt double %11, 6.660000e-01 ; <i1> [#uses=1]
+ br i1 %12, label %generate_patient.exit, label %generate_patient.exit.thread
+
+generate_patient.exit.thread: ; preds = %bb11
+ ret %struct.List* null
+
+generate_patient.exit: ; preds = %bb11
+ br i1 undef, label %bb14, label %bb12
+
+bb12: ; preds = %generate_patient.exit
+ br i1 undef, label %bb.i, label %bb1.i
+
+bb.i: ; preds = %bb12
+ ret %struct.List* null
+
+bb1.i: ; preds = %bb12
+ ret %struct.List* null
+
+bb14: ; preds = %generate_patient.exit, %entry
+ ret %struct.List* undef
+}
diff --git a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
new file mode 100644
index 0000000..4077535
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabi | FileCheck %s
+; PR4659
+; PR4682
+
+define hidden arm_aapcscc i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind {
+entry:
+; CHECK: __gcov_execlp:
+; CHECK: mov sp, r7
+; CHECK: sub sp, #4
+ call arm_aapcscc void @__gcov_flush() nounwind
+ br i1 undef, label %bb5, label %bb
+
+bb: ; preds = %bb, %entry
+ br i1 undef, label %bb5, label %bb
+
+bb5: ; preds = %bb, %entry
+ %0 = alloca i8*, i32 undef, align 4 ; <i8**> [#uses=1]
+ %1 = call arm_aapcscc i32 @execvp(i8* %path, i8** %0) nounwind ; <i32> [#uses=1]
+ ret i32 %1
+}
+
+declare hidden arm_aapcscc void @__gcov_flush()
+
+declare arm_aapcscc i32 @execvp(i8*, i8**) nounwind
diff --git a/test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll
new file mode 100644
index 0000000..93f5a0f
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-07-CoalescerBug.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=armv7-eabi -mattr=+vfp2
+; PR4686
+
+ %a = type { i32 (...)** }
+ %b = type { %a }
+ %c = type { float, float, float, float }
+
+declare arm_aapcs_vfpcc float @bar(%c*)
+
+define arm_aapcs_vfpcc void @foo(%b* %x, %c* %y) {
+entry:
+ %0 = call arm_aapcs_vfpcc float @bar(%c* %y) ; <float> [#uses=0]
+ %1 = fadd float undef, undef ; <float> [#uses=1]
+ store float %1, float* undef, align 8
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll b/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll
new file mode 100644
index 0000000..090ed2d
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll
@@ -0,0 +1,80 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 -arm-use-neon-fp
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.JHUFF_TBL = type { [17 x i8], [256 x i8], i32 }
+ %struct.JQUANT_TBL = type { [64 x i16], i32 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.anon = type { [8 x i32], [48 x i8] }
+ %struct.backing_store_info = type { void (%struct.jpeg_common_struct*, %struct.backing_store_info*, i8*, i32, i32)*, void (%struct.jpeg_common_struct*, %struct.backing_store_info*, i8*, i32, i32)*, void (%struct.jpeg_common_struct*, %struct.backing_store_info*)*, %struct.FILE*, [64 x i8] }
+ %struct.jpeg_color_deconverter = type { void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*, i8***, i32, i8**, i32)* }
+ %struct.jpeg_color_quantizer = type { void (%struct.jpeg_decompress_struct*, i32)*, void (%struct.jpeg_decompress_struct*, i8**, i8**, i32)*, void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)* }
+ %struct.jpeg_common_struct = type { %struct.jpeg_error_mgr*, %struct.jpeg_memory_mgr*, %struct.jpeg_progress_mgr*, i32, i32 }
+ %struct.jpeg_component_info = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.JQUANT_TBL*, i8* }
+ %struct.jpeg_d_coef_controller = type { void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*, i8***)*, %struct.jvirt_barray_control** }
+ %struct.jpeg_d_main_controller = type { void (%struct.jpeg_decompress_struct*, i32)*, void (%struct.jpeg_decompress_struct*, i8**, i32*, i32)* }
+ %struct.jpeg_d_post_controller = type { void (%struct.jpeg_decompress_struct*, i32)*, void (%struct.jpeg_decompress_struct*, i8***, i32*, i32, i8**, i32*, i32)* }
+ %struct.jpeg_decomp_master = type { void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, i32 }
+ %struct.jpeg_decompress_struct = type { %struct.jpeg_error_mgr*, %struct.jpeg_memory_mgr*, %struct.jpeg_progress_mgr*, i32, i32, %struct.jpeg_source_mgr*, i32, i32, i32, i32, i32, i32, i32, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8**, i32, i32, i32, i32, i32, [64 x i32]*, [4 x %struct.JQUANT_TBL*], [4 x %struct.JHUFF_TBL*], [4 x %struct.JHUFF_TBL*], i32, %struct.jpeg_component_info*, i32, i32, [16 x i8], [16 x i8], [16 x i8], i32, i32, i8, i16, i16, i32, i8, i32, i32, i32, i32, i32, i8*, i32, [4 x %struct.jpeg_component_info*], i32, i32, i32, [10 x i32], i32, i32, i32, i32, i32, %struct.jpeg_decomp_master*, %struct.jpeg_d_main_controller*, %struct.jpeg_d_coef_controller*, %struct.jpeg_d_post_controller*, %struct.jpeg_input_controller*, %struct.jpeg_marker_reader*, %struct.jpeg_entropy_decoder*, %struct.jpeg_inverse_dct*, %struct.jpeg_upsampler*, %struct.jpeg_color_deconverter*, %struct.jpeg_color_quantizer* }
+ %struct.jpeg_entropy_decoder = type { void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*, [64 x i16]**)* }
+ %struct.jpeg_error_mgr = type { void (%struct.jpeg_common_struct*)*, void (%struct.jpeg_common_struct*, i32)*, void (%struct.jpeg_common_struct*)*, void (%struct.jpeg_common_struct*, i8*)*, void (%struct.jpeg_common_struct*)*, i32, %struct.anon, i32, i32, i8**, i32, i8**, i32, i32 }
+ %struct.jpeg_input_controller = type { i32 (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*)*, i32, i32 }
+ %struct.jpeg_inverse_dct = type { void (%struct.jpeg_decompress_struct*)*, [10 x void (%struct.jpeg_decompress_struct*, %struct.jpeg_component_info*, i16*, i8**, i32)*] }
+ %struct.jpeg_marker_reader = type { void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, [16 x i32 (%struct.jpeg_decompress_struct*)*], i32, i32, i32, i32 }
+ %struct.jpeg_memory_mgr = type { i8* (%struct.jpeg_common_struct*, i32, i32)*, i8* (%struct.jpeg_common_struct*, i32, i32)*, i8** (%struct.jpeg_common_struct*, i32, i32, i32)*, [64 x i16]** (%struct.jpeg_common_struct*, i32, i32, i32)*, %struct.jvirt_sarray_control* (%struct.jpeg_common_struct*, i32, i32, i32, i32, i32)*, %struct.jvirt_barray_control* (%struct.jpeg_common_struct*, i32, i32, i32, i32, i32)*, void (%struct.jpeg_common_struct*)*, i8** (%struct.jpeg_common_struct*, %struct.jvirt_sarray_control*, i32, i32, i32)*, [64 x i16]** (%struct.jpeg_common_struct*, %struct.jvirt_barray_control*, i32, i32, i32)*, void (%struct.jpeg_common_struct*, i32)*, void (%struct.jpeg_common_struct*)*, i32 }
+ %struct.jpeg_progress_mgr = type { void (%struct.jpeg_common_struct*)*, i32, i32, i32, i32 }
+ %struct.jpeg_source_mgr = type { i8*, i32, void (%struct.jpeg_decompress_struct*)*, i32 (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*, i32)*, i32 (%struct.jpeg_decompress_struct*, i32)*, void (%struct.jpeg_decompress_struct*)* }
+ %struct.jpeg_upsampler = type { void (%struct.jpeg_decompress_struct*)*, void (%struct.jpeg_decompress_struct*, i8***, i32*, i32, i8**, i32*, i32)*, i32 }
+ %struct.jvirt_barray_control = type { [64 x i16]**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_barray_control*, %struct.backing_store_info }
+ %struct.jvirt_sarray_control = type { i8**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_sarray_control*, %struct.backing_store_info }
+
+define arm_apcscc void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %0 = load float* undef, align 4 ; <float> [#uses=1]
+ %1 = fmul float undef, %0 ; <float> [#uses=2]
+ %tmp73 = add i32 0, 224 ; <i32> [#uses=1]
+ %scevgep74 = getelementptr i8* null, i32 %tmp73 ; <i8*> [#uses=1]
+ %scevgep7475 = bitcast i8* %scevgep74 to float* ; <float*> [#uses=1]
+ %2 = load float* null, align 4 ; <float> [#uses=1]
+ %3 = fmul float 0.000000e+00, %2 ; <float> [#uses=2]
+ %4 = fadd float %1, %3 ; <float> [#uses=1]
+ %5 = fsub float %1, %3 ; <float> [#uses=2]
+ %6 = fadd float undef, 0.000000e+00 ; <float> [#uses=2]
+ %7 = fmul float undef, 0x3FF6A09E60000000 ; <float> [#uses=1]
+ %8 = fsub float %7, %6 ; <float> [#uses=2]
+ %9 = fsub float %4, %6 ; <float> [#uses=1]
+ %10 = fadd float %5, %8 ; <float> [#uses=2]
+ %11 = fsub float %5, %8 ; <float> [#uses=1]
+ %12 = sitofp i16 undef to float ; <float> [#uses=1]
+ %13 = fmul float %12, 0.000000e+00 ; <float> [#uses=2]
+ %14 = sitofp i16 undef to float ; <float> [#uses=1]
+ %15 = load float* %scevgep7475, align 4 ; <float> [#uses=1]
+ %16 = fmul float %14, %15 ; <float> [#uses=2]
+ %17 = fadd float undef, undef ; <float> [#uses=2]
+ %18 = fadd float %13, %16 ; <float> [#uses=2]
+ %19 = fsub float %13, %16 ; <float> [#uses=1]
+ %20 = fadd float %18, %17 ; <float> [#uses=2]
+ %21 = fsub float %18, %17 ; <float> [#uses=1]
+ %22 = fmul float %21, 0x3FF6A09E60000000 ; <float> [#uses=1]
+ %23 = fmul float undef, 0x3FFD906BC0000000 ; <float> [#uses=2]
+ %24 = fmul float %19, 0x3FF1517A80000000 ; <float> [#uses=1]
+ %25 = fsub float %24, %23 ; <float> [#uses=1]
+ %26 = fadd float undef, %23 ; <float> [#uses=1]
+ %27 = fsub float %26, %20 ; <float> [#uses=3]
+ %28 = fsub float %22, %27 ; <float> [#uses=2]
+ %29 = fadd float %25, %28 ; <float> [#uses=1]
+ %30 = fadd float undef, %20 ; <float> [#uses=1]
+ store float %30, float* undef, align 4
+ %31 = fadd float %10, %27 ; <float> [#uses=1]
+ store float %31, float* undef, align 4
+ %32 = fsub float %10, %27 ; <float> [#uses=1]
+ store float %32, float* undef, align 4
+ %33 = fadd float %11, %28 ; <float> [#uses=1]
+ store float %33, float* undef, align 4
+ %34 = fsub float %9, %29 ; <float> [#uses=1]
+ store float %34, float* undef, align 4
+ br label %bb
+}
diff --git a/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll
new file mode 100644
index 0000000..a0f9918
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -mtriple=armv7-eabi -mattr=+vfp2
+; PR4686
+
+@g_d = external global double ; <double*> [#uses=1]
+
+define arm_aapcscc void @foo(float %yIncr) {
+entry:
+ br i1 undef, label %bb, label %bb4
+
+bb: ; preds = %entry
+ %0 = call arm_aapcs_vfpcc float @bar() ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ store double %1, double* @g_d, align 8
+ br label %bb4
+
+bb4: ; preds = %bb, %entry
+ unreachable
+}
+
+declare arm_aapcs_vfpcc float @bar()
diff --git a/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll b/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll
new file mode 100644
index 0000000..cbe250b
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+vfp2
+
+define arm_apcscc float @t1(i32 %v0) nounwind {
+entry:
+ store i32 undef, i32* undef, align 4
+ %0 = load [4 x i8]** undef, align 4 ; <[4 x i8]*> [#uses=1]
+ %1 = load i8* undef, align 1 ; <i8> [#uses=1]
+ %2 = zext i8 %1 to i32 ; <i32> [#uses=1]
+ %3 = getelementptr [4 x i8]* %0, i32 %v0, i32 0 ; <i8*> [#uses=1]
+ %4 = load i8* %3, align 1 ; <i8> [#uses=1]
+ %5 = zext i8 %4 to i32 ; <i32> [#uses=1]
+ %6 = sub i32 %5, %2 ; <i32> [#uses=1]
+ %7 = sitofp i32 %6 to float ; <float> [#uses=1]
+ ret float %7
+}
diff --git a/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll b/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll
new file mode 100644
index 0000000..8d03b52
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll
@@ -0,0 +1,152 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
+
+%struct.pix_pos = type { i32, i32, i32, i32, i32, i32 }
+
+@getNeighbour = external global void (i32, i32, i32, i32, %struct.pix_pos*)*, align 4 ; <void (i32, i32, i32, i32, %struct.pix_pos*)**> [#uses=2]
+
+define arm_apcscc void @t() nounwind {
+; CHECK: t:
+; CHECK: it eq
+; CHECK-NEXT: cmpeq
+entry:
+ %pix_a.i294 = alloca [4 x %struct.pix_pos], align 4 ; <[4 x %struct.pix_pos]*> [#uses=2]
+ br i1 undef, label %land.rhs, label %lor.end
+
+land.rhs: ; preds = %entry
+ br label %lor.end
+
+lor.end: ; preds = %land.rhs, %entry
+ switch i32 0, label %if.end371 [
+ i32 10, label %if.then366
+ i32 14, label %if.then366
+ ]
+
+if.then366: ; preds = %lor.end, %lor.end
+ unreachable
+
+if.end371: ; preds = %lor.end
+ %arrayidx56.2.i = getelementptr [4 x %struct.pix_pos]* %pix_a.i294, i32 0, i32 2 ; <%struct.pix_pos*> [#uses=1]
+ %arrayidx56.3.i = getelementptr [4 x %struct.pix_pos]* %pix_a.i294, i32 0, i32 3 ; <%struct.pix_pos*> [#uses=1]
+ br i1 undef, label %for.body1857, label %for.end4557
+
+for.body1857: ; preds = %if.end371
+ br i1 undef, label %if.then1867, label %for.cond1933
+
+if.then1867: ; preds = %for.body1857
+ unreachable
+
+for.cond1933: ; preds = %for.body1857
+ br i1 undef, label %for.body1940, label %if.then4493
+
+for.body1940: ; preds = %for.cond1933
+ %shl = shl i32 undef, 2 ; <i32> [#uses=1]
+ %shl1959 = shl i32 undef, 2 ; <i32> [#uses=4]
+ br i1 undef, label %if.then1992, label %if.else2003
+
+if.then1992: ; preds = %for.body1940
+ %tmp14.i302 = load i32* undef ; <i32> [#uses=4]
+ %add.i307452 = or i32 %shl1959, 1 ; <i32> [#uses=1]
+ %sub.i308 = add i32 %shl, -1 ; <i32> [#uses=4]
+ call arm_apcscc void undef(i32 %tmp14.i302, i32 %sub.i308, i32 %shl1959, i32 0, %struct.pix_pos* undef) nounwind
+ %tmp49.i309 = load void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; <void (i32, i32, i32, i32, %struct.pix_pos*)*> [#uses=1]
+ call arm_apcscc void %tmp49.i309(i32 %tmp14.i302, i32 %sub.i308, i32 %add.i307452, i32 0, %struct.pix_pos* null) nounwind
+ %tmp49.1.i = load void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; <void (i32, i32, i32, i32, %struct.pix_pos*)*> [#uses=1]
+ call arm_apcscc void %tmp49.1.i(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.2.i) nounwind
+ call arm_apcscc void undef(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.3.i) nounwind
+ unreachable
+
+if.else2003: ; preds = %for.body1940
+ switch i32 undef, label %if.then2015 [
+ i32 10, label %if.then4382
+ i32 14, label %if.then4382
+ ]
+
+if.then2015: ; preds = %if.else2003
+ br i1 undef, label %if.else2298, label %if.then2019
+
+if.then2019: ; preds = %if.then2015
+ br i1 undef, label %if.then2065, label %if.else2081
+
+if.then2065: ; preds = %if.then2019
+ br label %if.end2128
+
+if.else2081: ; preds = %if.then2019
+ br label %if.end2128
+
+if.end2128: ; preds = %if.else2081, %if.then2065
+ unreachable
+
+if.else2298: ; preds = %if.then2015
+ br i1 undef, label %land.lhs.true2813, label %cond.end2841
+
+land.lhs.true2813: ; preds = %if.else2298
+ br i1 undef, label %cond.end2841, label %cond.true2824
+
+cond.true2824: ; preds = %land.lhs.true2813
+ br label %cond.end2841
+
+cond.end2841: ; preds = %cond.true2824, %land.lhs.true2813, %if.else2298
+ br i1 undef, label %for.cond2882.preheader, label %for.cond2940.preheader
+
+for.cond2882.preheader: ; preds = %cond.end2841
+ %mul3693 = shl i32 undef, 1 ; <i32> [#uses=2]
+ br i1 undef, label %if.then3689, label %if.else3728
+
+for.cond2940.preheader: ; preds = %cond.end2841
+ br label %for.inc3040
+
+for.inc3040: ; preds = %for.inc3040, %for.cond2940.preheader
+ br label %for.inc3040
+
+if.then3689: ; preds = %for.cond2882.preheader
+ %add3695 = add nsw i32 %mul3693, %shl1959 ; <i32> [#uses=1]
+ %mul3697 = shl i32 %add3695, 2 ; <i32> [#uses=2]
+ %arrayidx3705 = getelementptr inbounds i16* undef, i32 1 ; <i16*> [#uses=1]
+ %tmp3706 = load i16* %arrayidx3705 ; <i16> [#uses=1]
+ %conv3707 = sext i16 %tmp3706 to i32 ; <i32> [#uses=1]
+ %add3708 = add nsw i32 %conv3707, %mul3697 ; <i32> [#uses=1]
+ %arrayidx3724 = getelementptr inbounds i16* null, i32 1 ; <i16*> [#uses=1]
+ %tmp3725 = load i16* %arrayidx3724 ; <i16> [#uses=1]
+ %conv3726 = sext i16 %tmp3725 to i32 ; <i32> [#uses=1]
+ %add3727 = add nsw i32 %conv3726, %mul3697 ; <i32> [#uses=1]
+ br label %if.end3770
+
+if.else3728: ; preds = %for.cond2882.preheader
+ %mul3733 = add i32 %shl1959, 1073741816 ; <i32> [#uses=1]
+ %add3735 = add nsw i32 %mul3733, %mul3693 ; <i32> [#uses=1]
+ %mul3737 = shl i32 %add3735, 2 ; <i32> [#uses=2]
+ %tmp3746 = load i16* undef ; <i16> [#uses=1]
+ %conv3747 = sext i16 %tmp3746 to i32 ; <i32> [#uses=1]
+ %add3748 = add nsw i32 %conv3747, %mul3737 ; <i32> [#uses=1]
+ %arrayidx3765 = getelementptr inbounds i16* null, i32 1 ; <i16*> [#uses=1]
+ %tmp3766 = load i16* %arrayidx3765 ; <i16> [#uses=1]
+ %conv3767 = sext i16 %tmp3766 to i32 ; <i32> [#uses=1]
+ %add3768 = add nsw i32 %conv3767, %mul3737 ; <i32> [#uses=1]
+ br label %if.end3770
+
+if.end3770: ; preds = %if.else3728, %if.then3689
+ %vec2_y.1 = phi i32 [ %add3727, %if.then3689 ], [ %add3768, %if.else3728 ] ; <i32> [#uses=0]
+ %vec1_y.2 = phi i32 [ %add3708, %if.then3689 ], [ %add3748, %if.else3728 ] ; <i32> [#uses=0]
+ unreachable
+
+if.then4382: ; preds = %if.else2003, %if.else2003
+ switch i32 undef, label %if.then4394 [
+ i32 10, label %if.else4400
+ i32 14, label %if.else4400
+ ]
+
+if.then4394: ; preds = %if.then4382
+ unreachable
+
+if.else4400: ; preds = %if.then4382, %if.then4382
+ br label %for.cond4451.preheader
+
+for.cond4451.preheader: ; preds = %for.cond4451.preheader, %if.else4400
+ br label %for.cond4451.preheader
+
+if.then4493: ; preds = %for.cond1933
+ unreachable
+
+for.end4557: ; preds = %if.end371
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll
new file mode 100644
index 0000000..b4b6ed9
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -mtriple=thumbv7-eabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s
+
+; A fix for PR5204 will require this check to be changed.
+
+%"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" = type { i8* }
+%"struct.__gnu_cxx::new_allocator<char>" = type <{ i8 }>
+%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" = type { %"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" }
+%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" }
+%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" = type { i32, i32, i32 }
+
+
+define weak arm_aapcs_vfpcc i32 @_ZNKSs7compareERKSs(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) {
+; CHECK: _ZNKSs7compareERKSs:
+; CHECK: it ne
+; CHECK-NEXT: ldmfdne.w
+; CHECK-NEXT: itt eq
+; CHECK-NEXT: subeq.w
+; CHECK-NEXT: ldmfdeq.w
+entry:
+ %0 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i32> [#uses=3]
+ %1 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) ; <i32> [#uses=3]
+ %2 = icmp ult i32 %1, %0 ; <i1> [#uses=1]
+ %3 = select i1 %2, i32 %1, i32 %0 ; <i32> [#uses=1]
+ %4 = tail call arm_aapcs_vfpcc i8* @_ZNKSs7_M_dataEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i8*> [#uses=1]
+ %5 = tail call arm_aapcs_vfpcc i8* @_ZNKSs4dataEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) ; <i8*> [#uses=1]
+ %6 = tail call arm_aapcs_vfpcc i32 @memcmp(i8* %4, i8* %5, i32 %3) nounwind readonly ; <i32> [#uses=2]
+ %7 = icmp eq i32 %6, 0 ; <i1> [#uses=1]
+ br i1 %7, label %bb, label %bb1
+
+bb: ; preds = %entry
+ %8 = sub i32 %0, %1 ; <i32> [#uses=1]
+ ret i32 %8
+
+bb1: ; preds = %entry
+ ret i32 %6
+}
+
+declare arm_aapcs_vfpcc i32 @memcmp(i8* nocapture, i8* nocapture, i32) nounwind readonly
+
+declare arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this)
+
+declare arm_aapcs_vfpcc i8* @_ZNKSs7_M_dataEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this)
+
+declare arm_aapcs_vfpcc i8* @_ZNKSs4dataEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this)
diff --git a/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll b/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll
new file mode 100644
index 0000000..216f3e3
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8
+
+define arm_apcscc void @get_initial_mb16x16_cost() nounwind {
+entry:
+ br i1 undef, label %bb4, label %bb1
+
+bb1: ; preds = %entry
+ br label %bb7
+
+bb4: ; preds = %entry
+ br i1 undef, label %bb7.thread, label %bb5
+
+bb5: ; preds = %bb4
+ br label %bb7
+
+bb7.thread: ; preds = %bb4
+ br label %bb8
+
+bb7: ; preds = %bb5, %bb1
+ br i1 undef, label %bb8, label %bb10
+
+bb8: ; preds = %bb7, %bb7.thread
+ %0 = phi double [ 5.120000e+02, %bb7.thread ], [ undef, %bb7 ] ; <double> [#uses=1]
+ %1 = fdiv double %0, undef ; <double> [#uses=0]
+ unreachable
+
+bb10: ; preds = %bb7
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll
new file mode 100644
index 0000000..9f2e399
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll
@@ -0,0 +1,85 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10
+
+%struct.OP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i32, i16, i16, i8, i8 }
+%struct.SV = type { i8*, i32, i32 }
+
+declare arm_apcscc void @Perl_mg_set(%struct.SV*) nounwind
+
+define arm_apcscc %struct.OP* @Perl_pp_complement() nounwind {
+entry:
+ %0 = load %struct.SV** null, align 4 ; <%struct.SV*> [#uses=2]
+ br i1 undef, label %bb21, label %bb5
+
+bb5: ; preds = %entry
+ br i1 undef, label %bb13, label %bb6
+
+bb6: ; preds = %bb5
+ br i1 undef, label %bb8, label %bb7
+
+bb7: ; preds = %bb6
+ %1 = getelementptr inbounds %struct.SV* %0, i32 0, i32 0 ; <i8**> [#uses=1]
+ %2 = load i8** %1, align 4 ; <i8*> [#uses=1]
+ %3 = getelementptr inbounds i8* %2, i32 12 ; <i8*> [#uses=1]
+ %4 = bitcast i8* %3 to i32* ; <i32*> [#uses=1]
+ %5 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %storemerge5 = xor i32 %5, -1 ; <i32> [#uses=1]
+ call arm_apcscc void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
+ %6 = getelementptr inbounds %struct.SV* undef, i32 0, i32 2 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ %8 = and i32 %7, 16384 ; <i32> [#uses=1]
+ %9 = icmp eq i32 %8, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb12, label %bb11
+
+bb8: ; preds = %bb6
+ unreachable
+
+bb11: ; preds = %bb7
+ call arm_apcscc void @Perl_mg_set(%struct.SV* undef) nounwind
+ br label %bb12
+
+bb12: ; preds = %bb11, %bb7
+ store %struct.SV* undef, %struct.SV** null, align 4
+ br label %bb44
+
+bb13: ; preds = %bb5
+ %10 = call arm_apcscc i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; <i32> [#uses=0]
+ br i1 undef, label %bb.i, label %bb1.i
+
+bb.i: ; preds = %bb13
+ call arm_apcscc void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
+ br label %Perl_sv_setuv.exit
+
+bb1.i: ; preds = %bb13
+ br label %Perl_sv_setuv.exit
+
+Perl_sv_setuv.exit: ; preds = %bb1.i, %bb.i
+ %11 = getelementptr inbounds %struct.SV* undef, i32 0, i32 2 ; <i32*> [#uses=1]
+ %12 = load i32* %11, align 4 ; <i32> [#uses=1]
+ %13 = and i32 %12, 16384 ; <i32> [#uses=1]
+ %14 = icmp eq i32 %13, 0 ; <i1> [#uses=1]
+ br i1 %14, label %bb20, label %bb19
+
+bb19: ; preds = %Perl_sv_setuv.exit
+ call arm_apcscc void @Perl_mg_set(%struct.SV* undef) nounwind
+ br label %bb20
+
+bb20: ; preds = %bb19, %Perl_sv_setuv.exit
+ store %struct.SV* undef, %struct.SV** null, align 4
+ br label %bb44
+
+bb21: ; preds = %entry
+ br i1 undef, label %bb23, label %bb22
+
+bb22: ; preds = %bb21
+ unreachable
+
+bb23: ; preds = %bb21
+ unreachable
+
+bb44: ; preds = %bb20, %bb12
+ ret %struct.OP* undef
+}
+
+declare arm_apcscc void @Perl_sv_setiv(%struct.SV*, i32) nounwind
+
+declare arm_apcscc i32 @Perl_sv_2uv(%struct.SV*) nounwind
diff --git a/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll b/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll
new file mode 100644
index 0000000..8a67bb1
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10
+; rdar://7394794
+
+define arm_apcscc void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind {
+entry:
+ %..i = select i1 false, i64 0, i64 0 ; <i64> [#uses=1]
+ br i1 undef, label %bb11.i, label %bb6.i
+
+bb6.i: ; preds = %entry
+ %0 = lshr i64 %h1, 0 ; <i64> [#uses=1]
+ store i64 %0, i64* %hv, align 4
+ %1 = lshr i64 %l1, 0 ; <i64> [#uses=1]
+ %2 = or i64 0, %1 ; <i64> [#uses=1]
+ store i64 %2, i64* %lv, align 4
+ br label %bb11.i
+
+bb11.i: ; preds = %bb6.i, %entry
+ store i64 %..i, i64* %lv, align 4
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll b/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
new file mode 100644
index 0000000..79ad0a9
--- /dev/null
+++ b/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
@@ -0,0 +1,128 @@
+; RUN: opt < %s -std-compile-opts | \
+; RUN: llc -mtriple=thumbv7-apple-darwin10 -mattr=+neon | FileCheck %s
+
+define arm_apcscc void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
+entry:
+; -- The loop following the load should only use a single add-literation
+; instruction.
+; CHECK: ldr.64
+; CHECK: adds r{{[0-9]+}}, #1
+; CHECK-NOT: adds r{{[0-9]+}}, #1
+; CHECK: subsections_via_symbols
+
+
+ %three_by_three_addr = alloca i32 ; <i32*> [#uses=2]
+ %in_addr = alloca i8* ; <i8**> [#uses=2]
+ %dt_addr = alloca float ; <float*> [#uses=4]
+ %x_size_addr = alloca i32 ; <i32*> [#uses=2]
+ %y_size_addr = alloca i32 ; <i32*> [#uses=1]
+ %bp_addr = alloca i8* ; <i8**> [#uses=1]
+ %tmp_image = alloca i8* ; <i8**> [#uses=0]
+ %out = alloca i8* ; <i8**> [#uses=1]
+ %cp = alloca i8* ; <i8**> [#uses=0]
+ %dpt = alloca i8* ; <i8**> [#uses=4]
+ %dp = alloca i8* ; <i8**> [#uses=2]
+ %ip = alloca i8* ; <i8**> [#uses=0]
+ %centre = alloca i32 ; <i32*> [#uses=0]
+ %tmp = alloca i32 ; <i32*> [#uses=0]
+ %brightness = alloca i32 ; <i32*> [#uses=0]
+ %area = alloca i32 ; <i32*> [#uses=0]
+ %y = alloca i32 ; <i32*> [#uses=0]
+ %x = alloca i32 ; <i32*> [#uses=2]
+ %j = alloca i32 ; <i32*> [#uses=6]
+ %i = alloca i32 ; <i32*> [#uses=1]
+ %mask_size = alloca i32 ; <i32*> [#uses=5]
+ %increment = alloca i32 ; <i32*> [#uses=1]
+ %n_max = alloca i32 ; <i32*> [#uses=4]
+ %temp = alloca float ; <float*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %three_by_three, i32* %three_by_three_addr
+ store i8* %in, i8** %in_addr
+ %dt = fptrunc double %dt1 to float ; <float> [#uses=1]
+ store float %dt, float* %dt_addr
+ store i32 %x_size, i32* %x_size_addr
+ store i32 %y_size, i32* %y_size_addr
+ store i8* %bp, i8** %bp_addr
+ %0 = load i8** %in_addr, align 4 ; <i8*> [#uses=1]
+ store i8* %0, i8** %out, align 4
+ %1 = call arm_apcscc i32 (...)* @foo() nounwind ; <i32> [#uses=1]
+ store i32 %1, i32* %i, align 4
+ %2 = load i32* %three_by_three_addr, align 4 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb, label %bb2
+
+bb: ; preds = %entry
+ %4 = load float* %dt_addr, align 4 ; <float> [#uses=1]
+ %5 = fpext float %4 to double ; <double> [#uses=1]
+ %6 = fmul double %5, 1.500000e+00 ; <double> [#uses=1]
+ %7 = fptosi double %6 to i32 ; <i32> [#uses=1]
+ %8 = add nsw i32 %7, 1 ; <i32> [#uses=1]
+ store i32 %8, i32* %mask_size, align 4
+ br label %bb3
+
+bb2: ; preds = %entry
+ store i32 1, i32* %mask_size, align 4
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb
+ %9 = load i32* %mask_size, align 4 ; <i32> [#uses=1]
+ %10 = mul i32 %9, 2 ; <i32> [#uses=1]
+ %11 = add nsw i32 %10, 1 ; <i32> [#uses=1]
+ store i32 %11, i32* %n_max, align 4
+ %12 = load i32* %x_size_addr, align 4 ; <i32> [#uses=1]
+ %13 = load i32* %n_max, align 4 ; <i32> [#uses=1]
+ %14 = sub i32 %12, %13 ; <i32> [#uses=1]
+ store i32 %14, i32* %increment, align 4
+ %15 = load i32* %n_max, align 4 ; <i32> [#uses=1]
+ %16 = load i32* %n_max, align 4 ; <i32> [#uses=1]
+ %17 = mul i32 %15, %16 ; <i32> [#uses=1]
+ %18 = call arm_apcscc noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1]
+ store i8* %18, i8** %dp, align 4
+ %19 = load i8** %dp, align 4 ; <i8*> [#uses=1]
+ store i8* %19, i8** %dpt, align 4
+ %20 = load float* %dt_addr, align 4 ; <float> [#uses=1]
+ %21 = load float* %dt_addr, align 4 ; <float> [#uses=1]
+ %22 = fmul float %20, %21 ; <float> [#uses=1]
+ %23 = fsub float -0.000000e+00, %22 ; <float> [#uses=1]
+ store float %23, float* %temp, align 4
+ %24 = load i32* %mask_size, align 4 ; <i32> [#uses=1]
+ %25 = sub i32 0, %24 ; <i32> [#uses=1]
+ store i32 %25, i32* %j, align 4
+ br label %bb5
+
+bb4: ; preds = %bb5
+ %26 = load i32* %j, align 4 ; <i32> [#uses=1]
+ %27 = load i32* %j, align 4 ; <i32> [#uses=1]
+ %28 = mul i32 %26, %27 ; <i32> [#uses=1]
+ %29 = sitofp i32 %28 to double ; <double> [#uses=1]
+ %30 = fmul double %29, 1.234000e+00 ; <double> [#uses=1]
+ %31 = fptosi double %30 to i32 ; <i32> [#uses=1]
+ store i32 %31, i32* %x, align 4
+ %32 = load i32* %x, align 4 ; <i32> [#uses=1]
+ %33 = trunc i32 %32 to i8 ; <i8> [#uses=1]
+ %34 = load i8** %dpt, align 4 ; <i8*> [#uses=1]
+ store i8 %33, i8* %34, align 1
+ %35 = load i8** %dpt, align 4 ; <i8*> [#uses=1]
+ %36 = getelementptr inbounds i8* %35, i64 1 ; <i8*> [#uses=1]
+ store i8* %36, i8** %dpt, align 4
+ %37 = load i32* %j, align 4 ; <i32> [#uses=1]
+ %38 = add nsw i32 %37, 1 ; <i32> [#uses=1]
+ store i32 %38, i32* %j, align 4
+ br label %bb5
+
+bb5: ; preds = %bb4, %bb3
+ %39 = load i32* %j, align 4 ; <i32> [#uses=1]
+ %40 = load i32* %mask_size, align 4 ; <i32> [#uses=1]
+ %41 = icmp sle i32 %39, %40 ; <i1> [#uses=1]
+ br i1 %41, label %bb4, label %bb6
+
+bb6: ; preds = %bb5
+ br label %return
+
+return: ; preds = %bb6
+ ret void
+}
+
+declare arm_apcscc i32 @foo(...)
+
+declare arm_apcscc noalias i8* @malloc(i32) nounwind
diff --git a/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll b/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll
new file mode 100644
index 0000000..07a3527
--- /dev/null
+++ b/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll
@@ -0,0 +1,89 @@
+; RUN: llc -relocation-model=pic < %s | grep {:$} | sort | uniq -d | count 0
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+target triple = "thumbv7-apple-darwin10"
+
+; This function produces a duplicate LPC label unless special care is taken when duplicating a t2LDRpci_pic instruction.
+
+%struct.PlatformMutex = type { i32, [40 x i8] }
+%struct.SpinLock = type { %struct.PlatformMutex }
+%"struct.WTF::TCMalloc_ThreadCache" = type { i32, %struct._opaque_pthread_t*, i8, [68 x %"struct.WTF::TCMalloc_ThreadCache_FreeList"], i32, i32, %"struct.WTF::TCMalloc_ThreadCache"*, %"struct.WTF::TCMalloc_ThreadCache"* }
+%"struct.WTF::TCMalloc_ThreadCache_FreeList" = type { i8*, i16, i16 }
+%struct.__darwin_pthread_handler_rec = type { void (i8*)*, i8*, %struct.__darwin_pthread_handler_rec* }
+%struct._opaque_pthread_t = type { i32, %struct.__darwin_pthread_handler_rec*, [596 x i8] }
+
+@_ZN3WTFL8heap_keyE = internal global i32 0 ; <i32*> [#uses=1]
+@_ZN3WTFL10tsd_initedE.b = internal global i1 false ; <i1*> [#uses=2]
+@_ZN3WTFL13pageheap_lockE = internal global %struct.SpinLock { %struct.PlatformMutex { i32 850045863, [40 x i8] zeroinitializer } } ; <%struct.SpinLock*> [#uses=1]
+@_ZN3WTFL12thread_heapsE = internal global %"struct.WTF::TCMalloc_ThreadCache"* null ; <%"struct.WTF::TCMalloc_ThreadCache"**> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (%"struct.WTF::TCMalloc_ThreadCache"* ()* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv() nounwind {
+entry:
+ %0 = tail call arm_apcscc i32 @pthread_mutex_lock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
+ %.b24 = load i1* @_ZN3WTFL10tsd_initedE.b, align 4 ; <i1> [#uses=1]
+ br i1 %.b24, label %bb5, label %bb6
+
+bb5: ; preds = %entry
+ %1 = tail call arm_apcscc %struct._opaque_pthread_t* @pthread_self() nounwind
+ br label %bb6
+
+bb6: ; preds = %bb5, %entry
+ %me.0 = phi %struct._opaque_pthread_t* [ %1, %bb5 ], [ null, %entry ] ; <%struct._opaque_pthread_t*> [#uses=2]
+ br label %bb11
+
+bb7: ; preds = %bb11
+ %2 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %h.0, i32 0, i32 1
+ %3 = load %struct._opaque_pthread_t** %2, align 4
+ %4 = tail call arm_apcscc i32 @pthread_equal(%struct._opaque_pthread_t* %3, %struct._opaque_pthread_t* %me.0) nounwind
+ %5 = icmp eq i32 %4, 0
+ br i1 %5, label %bb10, label %bb14
+
+bb10: ; preds = %bb7
+ %6 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %h.0, i32 0, i32 6
+ br label %bb11
+
+bb11: ; preds = %bb10, %bb6
+ %h.0.in = phi %"struct.WTF::TCMalloc_ThreadCache"** [ @_ZN3WTFL12thread_heapsE, %bb6 ], [ %6, %bb10 ] ; <%"struct.WTF::TCMalloc_ThreadCache"**> [#uses=1]
+ %h.0 = load %"struct.WTF::TCMalloc_ThreadCache"** %h.0.in, align 4 ; <%"struct.WTF::TCMalloc_ThreadCache"*> [#uses=4]
+ %7 = icmp eq %"struct.WTF::TCMalloc_ThreadCache"* %h.0, null
+ br i1 %7, label %bb13, label %bb7
+
+bb13: ; preds = %bb11
+ %8 = tail call arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t* %me.0) nounwind
+ br label %bb14
+
+bb14: ; preds = %bb13, %bb7
+ %heap.1 = phi %"struct.WTF::TCMalloc_ThreadCache"* [ %8, %bb13 ], [ %h.0, %bb7 ] ; <%"struct.WTF::TCMalloc_ThreadCache"*> [#uses=4]
+ %9 = tail call arm_apcscc i32 @pthread_mutex_unlock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
+ %10 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %heap.1, i32 0, i32 2
+ %11 = load i8* %10, align 4
+ %toBool15not = icmp eq i8 %11, 0 ; <i1> [#uses=1]
+ br i1 %toBool15not, label %bb19, label %bb22
+
+bb19: ; preds = %bb14
+ %.b = load i1* @_ZN3WTFL10tsd_initedE.b, align 4 ; <i1> [#uses=1]
+ br i1 %.b, label %bb21, label %bb22
+
+bb21: ; preds = %bb19
+ store i8 1, i8* %10, align 4
+ %12 = load i32* @_ZN3WTFL8heap_keyE, align 4
+ %13 = bitcast %"struct.WTF::TCMalloc_ThreadCache"* %heap.1 to i8*
+ %14 = tail call arm_apcscc i32 @pthread_setspecific(i32 %12, i8* %13) nounwind
+ ret %"struct.WTF::TCMalloc_ThreadCache"* %heap.1
+
+bb22: ; preds = %bb19, %bb14
+ ret %"struct.WTF::TCMalloc_ThreadCache"* %heap.1
+}
+
+declare arm_apcscc i32 @pthread_mutex_lock(%struct.PlatformMutex*)
+
+declare arm_apcscc i32 @pthread_mutex_unlock(%struct.PlatformMutex*)
+
+declare hidden arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t*) nounwind
+
+declare arm_apcscc i32 @pthread_setspecific(i32, i8*)
+
+declare arm_apcscc %struct._opaque_pthread_t* @pthread_self()
+
+declare arm_apcscc i32 @pthread_equal(%struct._opaque_pthread_t*, %struct._opaque_pthread_t*)
+
diff --git a/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll b/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll
new file mode 100644
index 0000000..41682c1
--- /dev/null
+++ b/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll
@@ -0,0 +1,53 @@
+; RUN: llc -O3 -relocation-model=pic -mcpu=cortex-a8 -mattr=+thumb2 < %s
+;
+; This test creates a predicated t2ADDri instruction that is then turned into a t2MOVgpr2gpr instr.
+; Test that that the predicate operands are removed properly.
+;
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+target triple = "thumbv7-apple-darwin10"
+
+declare arm_apcscc void @etoe53(i16* nocapture, i16* nocapture) nounwind
+
+define arm_apcscc void @earith(double* nocapture %value, i32 %icode, double* nocapture %r1, double* nocapture %r2) nounwind {
+entry:
+ %v = alloca [6 x i16], align 4 ; <[6 x i16]*> [#uses=1]
+ br i1 undef, label %bb2.i, label %bb5
+
+bb2.i: ; preds = %entry
+ %0 = bitcast double* %value to i16* ; <i16*> [#uses=1]
+ call arm_apcscc void @etoe53(i16* null, i16* %0) nounwind
+ ret void
+
+bb5: ; preds = %entry
+ switch i32 %icode, label %bb10 [
+ i32 57, label %bb14
+ i32 58, label %bb18
+ i32 67, label %bb22
+ i32 76, label %bb26
+ i32 77, label %bb35
+ ]
+
+bb10: ; preds = %bb5
+ br label %bb46
+
+bb14: ; preds = %bb5
+ unreachable
+
+bb18: ; preds = %bb5
+ unreachable
+
+bb22: ; preds = %bb5
+ unreachable
+
+bb26: ; preds = %bb5
+ br label %bb46
+
+bb35: ; preds = %bb5
+ unreachable
+
+bb46: ; preds = %bb26, %bb10
+ %1 = bitcast double* %value to i16* ; <i16*> [#uses=1]
+ %v47 = getelementptr inbounds [6 x i16]* %v, i32 0, i32 0 ; <i16*> [#uses=1]
+ call arm_apcscc void @etoe53(i16* %v47, i16* %1) nounwind
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/carry.ll b/test/CodeGen/Thumb2/carry.ll
new file mode 100644
index 0000000..de6f6e2
--- /dev/null
+++ b/test/CodeGen/Thumb2/carry.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i64 @f1(i64 %a, i64 %b) {
+entry:
+; CHECK: f1:
+; CHECK: subs r0, r0, r2
+; CHECK: sbcs r1, r3
+ %tmp = sub i64 %a, %b
+ ret i64 %tmp
+}
+
+define i64 @f2(i64 %a, i64 %b) {
+entry:
+; CHECK: f2:
+; CHECK: adds r0, r0, r0
+; CHECK: adcs r1, r1
+; CHECK: subs r0, r0, r2
+; CHECK: sbcs r1, r3
+ %tmp1 = shl i64 %a, 1
+ %tmp2 = sub i64 %tmp1, %b
+ ret i64 %tmp2
+}
diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll
new file mode 100644
index 0000000..572f1e8
--- /dev/null
+++ b/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll
@@ -0,0 +1,52 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8
+
+%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+%struct.__sFILEX = type opaque
+%struct.__sbuf = type { i8*, i32 }
+
+declare arm_apcscc i32 @fgetc(%struct.FILE* nocapture) nounwind
+
+define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+entry:
+ br i1 undef, label %bb, label %bb1
+
+bb: ; preds = %entry
+ unreachable
+
+bb1: ; preds = %entry
+ br i1 undef, label %bb.i1, label %bb1.i2
+
+bb.i1: ; preds = %bb1
+ unreachable
+
+bb1.i2: ; preds = %bb1
+ %0 = call arm_apcscc i32 @fgetc(%struct.FILE* undef) nounwind ; <i32> [#uses=0]
+ br i1 undef, label %bb2.i3, label %bb3.i4
+
+bb2.i3: ; preds = %bb1.i2
+ br i1 undef, label %bb4.i, label %bb3.i4
+
+bb3.i4: ; preds = %bb2.i3, %bb1.i2
+ unreachable
+
+bb4.i: ; preds = %bb2.i3
+ br i1 undef, label %bb5.i, label %get_image.exit
+
+bb5.i: ; preds = %bb4.i
+ unreachable
+
+get_image.exit: ; preds = %bb4.i
+ br i1 undef, label %bb28, label %bb27
+
+bb27: ; preds = %get_image.exit
+ br label %bb.i
+
+bb.i: ; preds = %bb.i, %bb27
+ %1 = fptrunc double undef to float ; <float> [#uses=1]
+ %2 = fptoui float %1 to i8 ; <i8> [#uses=1]
+ store i8 %2, i8* undef, align 1
+ br label %bb.i
+
+bb28: ; preds = %get_image.exit
+ unreachable
+}
diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
new file mode 100644
index 0000000..8f6449e
--- /dev/null
+++ b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 7
+
+define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind {
+entry:
+ br label %bb5
+
+bb5: ; preds = %bb5, %entry
+ br i1 undef, label %bb5, label %bb.nph
+
+bb.nph: ; preds = %bb5
+ br label %bb7
+
+bb7: ; preds = %bb9, %bb.nph
+ %s1.02 = phi float [ undef, %bb.nph ], [ %35, %bb9 ] ; <float> [#uses=3]
+ %tmp79 = add i32 undef, undef ; <i32> [#uses=1]
+ %tmp53 = sub i32 undef, undef ; <i32> [#uses=1]
+ %0 = fadd float 0.000000e+00, 1.000000e+00 ; <float> [#uses=2]
+ %1 = fmul float 0.000000e+00, 0.000000e+00 ; <float> [#uses=2]
+ br label %bb8
+
+bb8: ; preds = %bb8, %bb7
+ %tmp54 = add i32 0, %tmp53 ; <i32> [#uses=0]
+ %fi.1 = getelementptr float* %fz, i32 undef ; <float*> [#uses=2]
+ %tmp80 = add i32 0, %tmp79 ; <i32> [#uses=1]
+ %scevgep81 = getelementptr float* %fz, i32 %tmp80 ; <float*> [#uses=1]
+ %2 = load float* undef, align 4 ; <float> [#uses=1]
+ %3 = fmul float %2, %1 ; <float> [#uses=1]
+ %4 = load float* null, align 4 ; <float> [#uses=2]
+ %5 = fmul float %4, %0 ; <float> [#uses=1]
+ %6 = fsub float %3, %5 ; <float> [#uses=1]
+ %7 = fmul float %4, %1 ; <float> [#uses=1]
+ %8 = fadd float undef, %7 ; <float> [#uses=2]
+ %9 = load float* %fi.1, align 4 ; <float> [#uses=2]
+ %10 = fsub float %9, %8 ; <float> [#uses=1]
+ %11 = fadd float %9, %8 ; <float> [#uses=1]
+ %12 = fsub float 0.000000e+00, %6 ; <float> [#uses=1]
+ %13 = fsub float 0.000000e+00, undef ; <float> [#uses=2]
+ %14 = fmul float undef, %0 ; <float> [#uses=1]
+ %15 = fadd float %14, undef ; <float> [#uses=2]
+ %16 = load float* %scevgep81, align 4 ; <float> [#uses=2]
+ %17 = fsub float %16, %15 ; <float> [#uses=1]
+ %18 = fadd float %16, %15 ; <float> [#uses=2]
+ %19 = load float* undef, align 4 ; <float> [#uses=2]
+ %20 = fsub float %19, %13 ; <float> [#uses=2]
+ %21 = fadd float %19, %13 ; <float> [#uses=1]
+ %22 = fmul float %s1.02, %18 ; <float> [#uses=1]
+ %23 = fmul float 0.000000e+00, %20 ; <float> [#uses=1]
+ %24 = fsub float %22, %23 ; <float> [#uses=1]
+ %25 = fmul float 0.000000e+00, %18 ; <float> [#uses=1]
+ %26 = fmul float %s1.02, %20 ; <float> [#uses=1]
+ %27 = fadd float %25, %26 ; <float> [#uses=1]
+ %28 = fadd float %11, %27 ; <float> [#uses=1]
+ store float %28, float* %fi.1, align 4
+ %29 = fadd float %12, %24 ; <float> [#uses=1]
+ store float %29, float* null, align 4
+ %30 = fmul float 0.000000e+00, %21 ; <float> [#uses=1]
+ %31 = fmul float %s1.02, %17 ; <float> [#uses=1]
+ %32 = fsub float %30, %31 ; <float> [#uses=1]
+ %33 = fsub float %10, %32 ; <float> [#uses=1]
+ store float %33, float* undef, align 4
+ %34 = icmp slt i32 undef, undef ; <i1> [#uses=1]
+ br i1 %34, label %bb8, label %bb9
+
+bb9: ; preds = %bb8
+ %35 = fadd float 0.000000e+00, undef ; <float> [#uses=1]
+ br label %bb7
+}
diff --git a/test/CodeGen/Thumb2/dg.exp b/test/CodeGen/Thumb2/dg.exp
new file mode 100644
index 0000000..3ff359a
--- /dev/null
+++ b/test/CodeGen/Thumb2/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target ARM] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/Thumb2/frameless.ll b/test/CodeGen/Thumb2/frameless.ll
new file mode 100644
index 0000000..c3c8cf1
--- /dev/null
+++ b/test/CodeGen/Thumb2/frameless.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -disable-fp-elim | not grep mov
+; RUN: llc < %s -mtriple=thumbv7-linux -disable-fp-elim | not grep mov
+
+define arm_apcscc void @t() nounwind readnone {
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/frameless2.ll b/test/CodeGen/Thumb2/frameless2.ll
new file mode 100644
index 0000000..7cc7b19
--- /dev/null
+++ b/test/CodeGen/Thumb2/frameless2.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -disable-fp-elim | not grep r7
+
+%struct.noise3 = type { [3 x [17 x i32]] }
+%struct.noiseguard = type { i32, i32, i32 }
+
+define arm_apcscc void @vorbis_encode_noisebias_setup(i8* nocapture %vi.0.7.val, double %s, i32 %block, i32* nocapture %suppress, %struct.noise3* nocapture %in, %struct.noiseguard* nocapture %guard, double %userbias) nounwind {
+entry:
+ %0 = getelementptr %struct.noiseguard* %guard, i32 %block, i32 2; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %1, i32* undef, align 4
+ unreachable
+}
diff --git a/test/CodeGen/Thumb2/ifcvt-neon.ll b/test/CodeGen/Thumb2/ifcvt-neon.ll
new file mode 100644
index 0000000..c667909
--- /dev/null
+++ b/test/CodeGen/Thumb2/ifcvt-neon.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=thumb -mcpu=cortex-a8 | FileCheck %s
+; rdar://7368193
+
+@a = common global float 0.000000e+00 ; <float*> [#uses=2]
+@b = common global float 0.000000e+00 ; <float*> [#uses=1]
+
+define arm_apcscc float @t(i32 %c) nounwind {
+entry:
+ %0 = icmp sgt i32 %c, 1 ; <i1> [#uses=1]
+ %1 = load float* @a, align 4 ; <float> [#uses=2]
+ %2 = load float* @b, align 4 ; <float> [#uses=2]
+ br i1 %0, label %bb, label %bb1
+
+bb: ; preds = %entry
+; CHECK: ite lt
+; CHECK: vsublt.f32
+; CHECK-NEXT: vaddge.f32
+ %3 = fadd float %1, %2 ; <float> [#uses=1]
+ br label %bb2
+
+bb1: ; preds = %entry
+ %4 = fsub float %1, %2 ; <float> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %storemerge = phi float [ %4, %bb1 ], [ %3, %bb ] ; <float> [#uses=2]
+ store float %storemerge, float* @a
+ ret float %storemerge
+}
diff --git a/test/CodeGen/Thumb2/large-stack.ll b/test/CodeGen/Thumb2/large-stack.ll
new file mode 100644
index 0000000..fe0e506
--- /dev/null
+++ b/test/CodeGen/Thumb2/large-stack.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=DARWIN
+; RUN: llc < %s -march=thumb -mattr=+thumb2 -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=LINUX
+
+define void @test1() {
+; DARWIN: test1:
+; DARWIN: sub sp, #256
+; LINUX: test1:
+; LINUX: sub sp, #256
+ %tmp = alloca [ 64 x i32 ] , align 4
+ ret void
+}
+
+define void @test2() {
+; DARWIN: test2:
+; DARWIN: sub.w sp, sp, #4160
+; DARWIN: sub sp, #8
+; LINUX: test2:
+; LINUX: sub.w sp, sp, #4160
+; LINUX: sub sp, #8
+ %tmp = alloca [ 4168 x i8 ] , align 4
+ ret void
+}
+
+define i32 @test3() {
+; DARWIN: test3:
+; DARWIN: push {r4, r7, lr}
+; DARWIN: sub.w sp, sp, #805306368
+; DARWIN: sub sp, #20
+; LINUX: test3:
+; LINUX: stmfd sp!, {r4, r7, r11, lr}
+; LINUX: sub.w sp, sp, #805306368
+; LINUX: sub sp, #16
+ %retval = alloca i32, align 4
+ %tmp = alloca i32, align 4
+ %a = alloca [805306369 x i8], align 16
+ store i32 0, i32* %tmp
+ %tmp1 = load i32* %tmp
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/Thumb2/ldr-str-imm12.ll b/test/CodeGen/Thumb2/ldr-str-imm12.ll
new file mode 100644
index 0000000..47d85b1
--- /dev/null
+++ b/test/CodeGen/Thumb2/ldr-str-imm12.ll
@@ -0,0 +1,79 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim | FileCheck %s
+; rdar://7352504
+; Make sure we use "str r9, [sp, #+28]" instead of "sub.w r4, r7, #256" followed by "str r9, [r4, #-32]".
+
+%0 = type { i16, i8, i8 }
+%1 = type { [2 x i32], [2 x i32] }
+%2 = type { %union.rec* }
+%struct.FILE_POS = type { i8, i8, i16, i32 }
+%struct.GAP = type { i8, i8, i16 }
+%struct.LIST = type { %union.rec*, %union.rec* }
+%struct.STYLE = type { %union.anon, %union.anon, i16, i16, i32 }
+%struct.head_type = type { [2 x %struct.LIST], %union.FIRST_UNION, %union.SECOND_UNION, %union.THIRD_UNION, %union.FOURTH_UNION, %union.rec*, %2, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, i32 }
+%union.FIRST_UNION = type { %struct.FILE_POS }
+%union.FOURTH_UNION = type { %struct.STYLE }
+%union.SECOND_UNION = type { %0 }
+%union.THIRD_UNION = type { %1 }
+%union.anon = type { %struct.GAP }
+%union.rec = type { %struct.head_type }
+
+@zz_hold = external global %union.rec* ; <%union.rec**> [#uses=2]
+@zz_res = external global %union.rec* ; <%union.rec**> [#uses=1]
+
+define arm_apcscc %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
+entry:
+; CHECK: ldr.w r9, [r7, #+28]
+ %xgaps.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0]
+ %ycomp.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0]
+ br i1 false, label %bb, label %bb20
+
+bb: ; preds = %entry
+ unreachable
+
+bb20: ; preds = %entry
+ switch i32 undef, label %bb1287 [
+ i32 11, label %bb119
+ i32 12, label %bb119
+ i32 21, label %bb420
+ i32 23, label %bb420
+ i32 45, label %bb438
+ i32 46, label %bb438
+ i32 55, label %bb533
+ i32 56, label %bb569
+ i32 64, label %bb745
+ i32 78, label %bb1098
+ ]
+
+bb119: ; preds = %bb20, %bb20
+ unreachable
+
+bb420: ; preds = %bb20, %bb20
+; CHECK: bb420
+; CHECK: str r{{[0-7]}}, [sp]
+; CHECK: str r{{[0-7]}}, [sp, #+4]
+; CHECK: str r{{[0-7]}}, [sp, #+8]
+; CHECK: str r{{[0-7]}}, [sp, #+24]
+ store %union.rec* null, %union.rec** @zz_hold, align 4
+ store %union.rec* null, %union.rec** @zz_res, align 4
+ store %union.rec* %x, %union.rec** @zz_hold, align 4
+ %0 = call arm_apcscc %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
+ unreachable
+
+bb438: ; preds = %bb20, %bb20
+ unreachable
+
+bb533: ; preds = %bb20
+ ret %union.rec* %x
+
+bb569: ; preds = %bb20
+ unreachable
+
+bb745: ; preds = %bb20
+ unreachable
+
+bb1098: ; preds = %bb20
+ unreachable
+
+bb1287: ; preds = %bb20
+ unreachable
+}
diff --git a/test/CodeGen/Thumb2/load-global.ll b/test/CodeGen/Thumb2/load-global.ll
new file mode 100644
index 0000000..9286670
--- /dev/null
+++ b/test/CodeGen/Thumb2/load-global.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC
+; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LINUX
+
+@G = external global i32
+
+define i32 @test1() {
+; STATIC: _test1:
+; STATIC: .long _G
+
+; DYNAMIC: _test1:
+; DYNAMIC: .long L_G$non_lazy_ptr
+
+; PIC: _test1
+; PIC: add r0, pc
+; PIC: .long L_G$non_lazy_ptr-(LPC1_0+4)
+
+; LINUX: test1
+; LINUX: .long G(GOT)
+ %tmp = load i32* @G
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/lsr-deficiency.ll b/test/CodeGen/Thumb2/lsr-deficiency.ll
new file mode 100644
index 0000000..7b1b57a
--- /dev/null
+++ b/test/CodeGen/Thumb2/lsr-deficiency.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -relocation-model=pic | FileCheck %s
+; rdar://7387640
+
+; FIXME: We still need to rewrite array reference iv of stride -4 with loop
+; count iv of stride -1.
+
+@G = external global i32 ; <i32*> [#uses=2]
+@array = external global i32* ; <i32**> [#uses=1]
+
+define arm_apcscc void @t() nounwind optsize {
+; CHECK: t:
+; CHECK: mov.w r2, #4000
+; CHECK: movw r3, #1001
+entry:
+ %.pre = load i32* @G, align 4 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+; CHECK: LBB1_1:
+; CHECK: subs r3, #1
+; CHECK: cmp r3, #0
+; CHECK: sub.w r2, r2, #4
+ %0 = phi i32 [ %.pre, %entry ], [ %3, %bb ] ; <i32> [#uses=1]
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %tmp5 = sub i32 1000, %indvar ; <i32> [#uses=1]
+ %1 = load i32** @array, align 4 ; <i32*> [#uses=1]
+ %scevgep = getelementptr i32* %1, i32 %tmp5 ; <i32*> [#uses=1]
+ %2 = load i32* %scevgep, align 4 ; <i32> [#uses=1]
+ %3 = add nsw i32 %2, %0 ; <i32> [#uses=2]
+ store i32 %3, i32* @G, align 4
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 1001 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll
new file mode 100644
index 0000000..9ab19e9
--- /dev/null
+++ b/test/CodeGen/Thumb2/machine-licm.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -disable-fp-elim | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s --check-prefix=PIC
+; rdar://7353541
+; rdar://7354376
+
+; The generated code is no where near ideal. It's not recognizing the two
+; constantpool entries being loaded can be merged into one.
+
+@GV = external global i32 ; <i32*> [#uses=2]
+
+define arm_apcscc void @t(i32* nocapture %vals, i32 %c) nounwind {
+entry:
+; CHECK: t:
+; CHECK: cbz
+ %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+; CHECK: BB#1
+; CHECK: ldr.n r2, LCPI1_0
+; CHECK: ldr r3, [r2]
+; CHECK: ldr r3, [r3]
+; CHECK: ldr r2, [r2]
+; CHECK: LBB1_2
+; CHECK: LCPI1_0:
+; CHECK-NOT: LCPI1_1:
+; CHECK: .section
+
+; PIC: BB#1
+; PIC: ldr.n r2, LCPI1_0
+; PIC: add r2, pc
+; PIC: ldr r3, [r2]
+; PIC: ldr r3, [r3]
+; PIC: ldr r2, [r2]
+; PIC: LBB1_2
+; PIC: LCPI1_0:
+; PIC-NOT: LCPI1_1:
+; PIC: .section
+ %.pre = load i32* @GV, align 4 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %1 = phi i32 [ %.pre, %bb.nph ], [ %3, %bb ] ; <i32> [#uses=1]
+ %i.03 = phi i32 [ 0, %bb.nph ], [ %4, %bb ] ; <i32> [#uses=2]
+ %scevgep = getelementptr i32* %vals, i32 %i.03 ; <i32*> [#uses=1]
+ %2 = load i32* %scevgep, align 4 ; <i32> [#uses=1]
+ %3 = add nsw i32 %1, %2 ; <i32> [#uses=2]
+ store i32 %3, i32* @GV, align 4
+ %4 = add i32 %i.03, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %4, %c ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/mul_const.ll b/test/CodeGen/Thumb2/mul_const.ll
new file mode 100644
index 0000000..9a2ec93
--- /dev/null
+++ b/test/CodeGen/Thumb2/mul_const.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+; rdar://7069502
+
+define i32 @t1(i32 %v) nounwind readnone {
+entry:
+; CHECK: t1:
+; CHECK: add.w r0, r0, r0, lsl #3
+ %0 = mul i32 %v, 9
+ ret i32 %0
+}
+
+define i32 @t2(i32 %v) nounwind readnone {
+entry:
+; CHECK: t2:
+; CHECK: rsb r0, r0, r0, lsl #3
+ %0 = mul i32 %v, 7
+ ret i32 %0
+}
diff --git a/test/CodeGen/Thumb2/pic-load.ll b/test/CodeGen/Thumb2/pic-load.ll
new file mode 100644
index 0000000..1f8aea9
--- /dev/null
+++ b/test/CodeGen/Thumb2/pic-load.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -relocation-model=pic | FileCheck %s
+
+ %struct.anon = type { void ()* }
+ %struct.one_atexit_routine = type { %struct.anon, i32, i8* }
+@__dso_handle = external global { } ; <{ }*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 (void ()*)* @atexit to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind {
+entry:
+; CHECK: atexit:
+; CHECK: add r0, pc
+ %r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3]
+ %0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; <void ()**> [#uses=1]
+ store void ()* %func, void ()** %0, align 4
+ %1 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 0, i32* %1, align 4
+ %2 = call arm_apcscc i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind ; <i32> [#uses=1]
+ ret i32 %2
+}
+
+declare arm_apcscc i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind
diff --git a/test/CodeGen/Thumb2/thumb2-adc.ll b/test/CodeGen/Thumb2/thumb2-adc.ll
new file mode 100644
index 0000000..702df91
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-adc.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 734439407618 = 0x000000ab00000002
+define i64 @f1(i64 %a) {
+; CHECK: f1:
+; CHECK: adds r0, #2
+ %tmp = add i64 %a, 734439407618
+ ret i64 %tmp
+}
+
+; 5066626890203138 = 0x0012001200000002
+define i64 @f2(i64 %a) {
+; CHECK: f2:
+; CHECK: adds r0, #2
+ %tmp = add i64 %a, 5066626890203138
+ ret i64 %tmp
+}
+
+; 3747052064576897026 = 0x3400340000000002
+define i64 @f3(i64 %a) {
+; CHECK: f3:
+; CHECK: adds r0, #2
+ %tmp = add i64 %a, 3747052064576897026
+ ret i64 %tmp
+}
+
+; 6221254862626095106 = 0x5656565600000002
+define i64 @f4(i64 %a) {
+; CHECK: f4:
+; CHECK: adds r0, #2
+ %tmp = add i64 %a, 6221254862626095106
+ ret i64 %tmp
+}
+
+; 287104476244869122 = 0x03fc000000000002
+define i64 @f5(i64 %a) {
+; CHECK: f5:
+; CHECK: adds r0, #2
+ %tmp = add i64 %a, 287104476244869122
+ ret i64 %tmp
+}
+
+define i64 @f6(i64 %a, i64 %b) {
+; CHECK: f6:
+; CHECK: adds r0, r0, r2
+ %tmp = add i64 %a, %b
+ ret i64 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-add.ll b/test/CodeGen/Thumb2/thumb2-add.ll
new file mode 100644
index 0000000..5e25cf6
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-add.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #255
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #256
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #257
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4094
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4095
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4096
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8
+
+define i32 @t2ADDrc_255(i32 %lhs) {
+ %Rd = add i32 %lhs, 255
+ ret i32 %Rd
+}
+
+define i32 @t2ADDrc_256(i32 %lhs) {
+ %Rd = add i32 %lhs, 256
+ ret i32 %Rd
+}
+
+define i32 @t2ADDrc_257(i32 %lhs) {
+ %Rd = add i32 %lhs, 257
+ ret i32 %Rd
+}
+
+define i32 @t2ADDrc_4094(i32 %lhs) {
+ %Rd = add i32 %lhs, 4094
+ ret i32 %Rd
+}
+
+define i32 @t2ADDrc_4095(i32 %lhs) {
+ %Rd = add i32 %lhs, 4095
+ ret i32 %Rd
+}
+
+define i32 @t2ADDrc_4096(i32 %lhs) {
+ %Rd = add i32 %lhs, 4096
+ ret i32 %Rd
+}
+
+define i32 @t2ADDrr(i32 %lhs, i32 %rhs) {
+ %Rd = add i32 %lhs, %rhs
+ ret i32 %Rd
+}
+
+define i32 @t2ADDrs(i32 %lhs, i32 %rhs) {
+ %tmp = shl i32 %rhs, 8
+ %Rd = add i32 %lhs, %tmp
+ ret i32 %Rd
+}
+
diff --git a/test/CodeGen/Thumb2/thumb2-add2.ll b/test/CodeGen/Thumb2/thumb2-add2.ll
new file mode 100644
index 0000000..e496654
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-add2.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 171 = 0x000000ab
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: adds r0, #171
+ %tmp = add i32 %a, 171
+ ret i32 %tmp
+}
+
+; 1179666 = 0x00120012
+define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: add.w r0, r0, #1179666
+ %tmp = add i32 %a, 1179666
+ ret i32 %tmp
+}
+
+; 872428544 = 0x34003400
+define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: add.w r0, r0, #872428544
+ %tmp = add i32 %a, 872428544
+ ret i32 %tmp
+}
+
+; 1448498774 = 0x56565656
+define i32 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: add.w r0, r0, #1448498774
+ %tmp = add i32 %a, 1448498774
+ ret i32 %tmp
+}
+
+; 510 = 0x000001fe
+define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: add.w r0, r0, #510
+ %tmp = add i32 %a, 510
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-add3.ll b/test/CodeGen/Thumb2/thumb2-add3.ll
new file mode 100644
index 0000000..58fc333
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-add3.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a) {
+ %tmp = add i32 %a, 4095
+ ret i32 %tmp
+}
+
+; CHECK: f1:
+; CHECK: addw r0, r0, #4095
diff --git a/test/CodeGen/Thumb2/thumb2-add4.ll b/test/CodeGen/Thumb2/thumb2-add4.ll
new file mode 100644
index 0000000..b94e84d
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-add4.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 171 = 0x000000ab
+define i64 @f1(i64 %a) {
+; CHECK: f1:
+; CHECK: adds r0, #171
+; CHECK: adc r1, r1, #0
+ %tmp = add i64 %a, 171
+ ret i64 %tmp
+}
+
+; 1179666 = 0x00120012
+define i64 @f2(i64 %a) {
+; CHECK: f2:
+; CHECK: adds.w r0, r0, #1179666
+; CHECK: adc r1, r1, #0
+ %tmp = add i64 %a, 1179666
+ ret i64 %tmp
+}
+
+; 872428544 = 0x34003400
+define i64 @f3(i64 %a) {
+; CHECK: f3:
+; CHECK: adds.w r0, r0, #872428544
+; CHECK: adc r1, r1, #0
+ %tmp = add i64 %a, 872428544
+ ret i64 %tmp
+}
+
+; 1448498774 = 0x56565656
+define i64 @f4(i64 %a) {
+; CHECK: f4:
+; CHECK: adds.w r0, r0, #1448498774
+; CHECK: adc r1, r1, #0
+ %tmp = add i64 %a, 1448498774
+ ret i64 %tmp
+}
+
+; 66846720 = 0x03fc0000
+define i64 @f5(i64 %a) {
+; CHECK: f5:
+; CHECK: adds.w r0, r0, #66846720
+; CHECK: adc r1, r1, #0
+ %tmp = add i64 %a, 66846720
+ ret i64 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-add5.ll b/test/CodeGen/Thumb2/thumb2-add5.ll
new file mode 100644
index 0000000..8b3a4f6
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-add5.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: add r0, r1
+ %tmp = add i32 %a, %b
+ ret i32 %tmp
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: add.w r0, r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp1 = add i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: add.w r0, r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp1 = add i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: add.w r0, r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp1 = add i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: add.w r0, r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = add i32 %a, %tmp
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/Thumb2/thumb2-add6.ll b/test/CodeGen/Thumb2/thumb2-add6.ll
new file mode 100644
index 0000000..0ecaa79
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-add6.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i64 @f1(i64 %a, i64 %b) {
+; CHECK: f1:
+; CHECK: adds r0, r0, r2
+; CHECK: adcs r1, r3
+ %tmp = add i64 %a, %b
+ ret i64 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-and.ll b/test/CodeGen/Thumb2/thumb2-and.ll
new file mode 100644
index 0000000..8e2245a
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-and.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: ands r0, r1
+ %tmp = and i32 %a, %b
+ ret i32 %tmp
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: and.w r0, r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp1 = and i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: and.w r0, r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp1 = and i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: and.w r0, r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp1 = and i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: and.w r0, r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = and i32 %a, %tmp
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/Thumb2/thumb2-and2.ll b/test/CodeGen/Thumb2/thumb2-and2.ll
new file mode 100644
index 0000000..76c56d0
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-and2.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 171 = 0x000000ab
+define i32 @f1(i32 %a) {
+ %tmp = and i32 %a, 171
+ ret i32 %tmp
+}
+; CHECK: f1:
+; CHECK: and r0, r0, #171
+
+; 1179666 = 0x00120012
+define i32 @f2(i32 %a) {
+ %tmp = and i32 %a, 1179666
+ ret i32 %tmp
+}
+; CHECK: f2:
+; CHECK: and r0, r0, #1179666
+
+; 872428544 = 0x34003400
+define i32 @f3(i32 %a) {
+ %tmp = and i32 %a, 872428544
+ ret i32 %tmp
+}
+; CHECK: f3:
+; CHECK: and r0, r0, #872428544
+
+; 1448498774 = 0x56565656
+define i32 @f4(i32 %a) {
+ %tmp = and i32 %a, 1448498774
+ ret i32 %tmp
+}
+; CHECK: f4:
+; CHECK: and r0, r0, #1448498774
+
+; 66846720 = 0x03fc0000
+define i32 @f5(i32 %a) {
+ %tmp = and i32 %a, 66846720
+ ret i32 %tmp
+}
+; CHECK: f5:
+; CHECK: and r0, r0, #66846720
diff --git a/test/CodeGen/Thumb2/thumb2-asr.ll b/test/CodeGen/Thumb2/thumb2-asr.ll
new file mode 100644
index 0000000..a0a60e6
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-asr.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: asrs r0, r1
+ %tmp = ashr i32 %a, %b
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-asr2.ll b/test/CodeGen/Thumb2/thumb2-asr2.ll
new file mode 100644
index 0000000..9c8634f
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-asr2.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: asrs r0, r0, #17
+ %tmp = ashr i32 %a, 17
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-bcc.ll b/test/CodeGen/Thumb2/thumb2-bcc.ll
new file mode 100644
index 0000000..aae9f5c
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-bcc.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | not grep it
+
+define i32 @t1(i32 %a, i32 %b, i32 %c) {
+; CHECK: t1:
+; CHECK: cbz
+ %tmp2 = icmp eq i32 %a, 0
+ br i1 %tmp2, label %cond_false, label %cond_true
+
+cond_true:
+ %tmp5 = add i32 %b, 1
+ %tmp6 = and i32 %tmp5, %c
+ ret i32 %tmp6
+
+cond_false:
+ %tmp7 = add i32 %b, -1
+ %tmp8 = xor i32 %tmp7, %c
+ ret i32 %tmp8
+}
diff --git a/test/CodeGen/Thumb2/thumb2-bfc.ll b/test/CodeGen/Thumb2/thumb2-bfc.ll
new file mode 100644
index 0000000..b486045
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-bfc.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 4278190095 = 0xff00000f
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: bfc r
+ %tmp = and i32 %a, 4278190095
+ ret i32 %tmp
+}
+
+; 4286578688 = 0xff800000
+define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: bfc r
+ %tmp = and i32 %a, 4286578688
+ ret i32 %tmp
+}
+
+; 4095 = 0x00000fff
+define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: bfc r
+ %tmp = and i32 %a, 4095
+ ret i32 %tmp
+}
+
+; 2147483646 = 0x7ffffffe not implementable w/ BFC
+define i32 @f4(i32 %a) {
+; CHECK: f4:
+ %tmp = and i32 %a, 2147483646
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-bic.ll b/test/CodeGen/Thumb2/thumb2-bic.ll
new file mode 100644
index 0000000..4e35383
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-bic.ll
@@ -0,0 +1,105 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: bics r0, r1
+ %tmp = xor i32 %b, 4294967295
+ %tmp1 = and i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: bics r0, r1
+ %tmp = xor i32 %b, 4294967295
+ %tmp1 = and i32 %tmp, %a
+ ret i32 %tmp1
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: bics r0, r1
+ %tmp = xor i32 4294967295, %b
+ %tmp1 = and i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: bics r0, r1
+ %tmp = xor i32 4294967295, %b
+ %tmp1 = and i32 %tmp, %a
+ ret i32 %tmp1
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: bic.w r0, r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp1 = xor i32 4294967295, %tmp
+ %tmp2 = and i32 %a, %tmp1
+ ret i32 %tmp2
+}
+
+define i32 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: bic.w r0, r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp1 = xor i32 %tmp, 4294967295
+ %tmp2 = and i32 %tmp1, %a
+ ret i32 %tmp2
+}
+
+define i32 @f7(i32 %a, i32 %b) {
+; CHECK: f7:
+; CHECK: bic.w r0, r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp1 = xor i32 %tmp, 4294967295
+ %tmp2 = and i32 %a, %tmp1
+ ret i32 %tmp2
+}
+
+define i32 @f8(i32 %a, i32 %b) {
+; CHECK: f8:
+; CHECK: bic.w r0, r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = xor i32 4294967295, %tmp
+ %tmp2 = and i32 %tmp1, %a
+ ret i32 %tmp2
+}
+
+; ~0x000000bb = 4294967108
+define i32 @f9(i32 %a) {
+ %tmp = and i32 %a, 4294967108
+ ret i32 %tmp
+
+; CHECK: f9:
+; CHECK: bic r0, r0, #187
+}
+
+; ~0x00aa00aa = 4283826005
+define i32 @f10(i32 %a) {
+ %tmp = and i32 %a, 4283826005
+ ret i32 %tmp
+
+; CHECK: f10:
+; CHECK: bic r0, r0, #11141290
+}
+
+; ~0xcc00cc00 = 872363007
+define i32 @f11(i32 %a) {
+ %tmp = and i32 %a, 872363007
+ ret i32 %tmp
+; CHECK: f11:
+; CHECK: bic r0, r0, #-872363008
+}
+
+; ~0x00110000 = 4293853183
+define i32 @f12(i32 %a) {
+ %tmp = and i32 %a, 4293853183
+ ret i32 %tmp
+; CHECK: f12:
+; CHECK: bic r0, r0, #1114112
+}
diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll
new file mode 100644
index 0000000..1298384
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-branch.ll
@@ -0,0 +1,61 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s
+
+define void @f1(i32 %a, i32 %b, i32* %v) {
+entry:
+; CHECK: f1:
+; CHECK: bne LBB
+ %tmp = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true, label %return
+
+cond_true: ; preds = %entry
+ store i32 0, i32* %v
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @f2(i32 %a, i32 %b, i32* %v) {
+entry:
+; CHECK: f2:
+; CHECK: bge LBB
+ %tmp = icmp slt i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true, label %return
+
+cond_true: ; preds = %entry
+ store i32 0, i32* %v
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @f3(i32 %a, i32 %b, i32* %v) {
+entry:
+; CHECK: f3:
+; CHECK: bhs LBB
+ %tmp = icmp ult i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true, label %return
+
+cond_true: ; preds = %entry
+ store i32 0, i32* %v
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @f4(i32 %a, i32 %b, i32* %v) {
+entry:
+; CHECK: f4:
+; CHECK: blo LBB
+ %tmp = icmp ult i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp, label %return, label %cond_true
+
+cond_true: ; preds = %entry
+ store i32 0, i32* %v
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/thumb2-call.ll b/test/CodeGen/Thumb2/thumb2-call.ll
new file mode 100644
index 0000000..7dc6b26
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-call.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s -check-prefix=DARWIN
+; RUN: llc < %s -mtriple=thumbv7-linux -mattr=+thumb2 | FileCheck %s -check-prefix=LINUX
+
+@t = weak global i32 ()* null ; <i32 ()**> [#uses=1]
+
+declare void @g(i32, i32, i32, i32)
+
+define void @f() {
+; DARWIN: f:
+; DARWIN: blx _g
+
+; LINUX: f:
+; LINUX: bl g
+ call void @g( i32 1, i32 2, i32 3, i32 4 )
+ ret void
+}
+
+define void @h() {
+; DARWIN: h:
+; DARWIN: blx r0
+
+; LINUX: h:
+; LINUX: blx r0
+ %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1]
+ %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/thumb2-cbnz.ll b/test/CodeGen/Thumb2/thumb2-cbnz.ll
new file mode 100644
index 0000000..0fc6899
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-cbnz.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
+; rdar://7354379
+
+declare arm_apcscc double @floor(double) nounwind readnone
+
+define void @t(i1 %a, double %b) {
+entry:
+ br i1 %a, label %bb3, label %bb1
+
+bb1: ; preds = %entry
+ unreachable
+
+bb3: ; preds = %entry
+ br i1 %a, label %bb7, label %bb5
+
+bb5: ; preds = %bb3
+ unreachable
+
+bb7: ; preds = %bb3
+ br i1 %a, label %bb11, label %bb9
+
+bb9: ; preds = %bb7
+; CHECK: cmp r0, #0
+; CHECK-NEXT: cmp r0, #0
+; CHECK-NEXT: cbnz
+ %0 = tail call arm_apcscc double @floor(double %b) nounwind readnone ; <double> [#uses=0]
+ br label %bb11
+
+bb11: ; preds = %bb9, %bb7
+ %1 = getelementptr i32* undef, i32 0
+ store i32 0, i32* %1
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/thumb2-clz.ll b/test/CodeGen/Thumb2/thumb2-clz.ll
new file mode 100644
index 0000000..74728bf
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-clz.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a | FileCheck %s
+
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: clz r
+ %tmp = tail call i32 @llvm.ctlz.i32(i32 %a)
+ ret i32 %tmp
+}
+
+declare i32 @llvm.ctlz.i32(i32) nounwind readnone
diff --git a/test/CodeGen/Thumb2/thumb2-cmn.ll b/test/CodeGen/Thumb2/thumb2-cmn.ll
new file mode 100644
index 0000000..eeaaa7f
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-cmn.ll
@@ -0,0 +1,72 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i1 @f1(i32 %a, i32 %b) {
+ %nb = sub i32 0, %b
+ %tmp = icmp ne i32 %a, %nb
+ ret i1 %tmp
+}
+; CHECK: f1:
+; CHECK: cmn.w r0, r1
+
+define i1 @f2(i32 %a, i32 %b) {
+ %nb = sub i32 0, %b
+ %tmp = icmp ne i32 %nb, %a
+ ret i1 %tmp
+}
+; CHECK: f2:
+; CHECK: cmn.w r0, r1
+
+define i1 @f3(i32 %a, i32 %b) {
+ %nb = sub i32 0, %b
+ %tmp = icmp eq i32 %a, %nb
+ ret i1 %tmp
+}
+; CHECK: f3:
+; CHECK: cmn.w r0, r1
+
+define i1 @f4(i32 %a, i32 %b) {
+ %nb = sub i32 0, %b
+ %tmp = icmp eq i32 %nb, %a
+ ret i1 %tmp
+}
+; CHECK: f4:
+; CHECK: cmn.w r0, r1
+
+define i1 @f5(i32 %a, i32 %b) {
+ %tmp = shl i32 %b, 5
+ %nb = sub i32 0, %tmp
+ %tmp1 = icmp eq i32 %nb, %a
+ ret i1 %tmp1
+}
+; CHECK: f5:
+; CHECK: cmn.w r0, r1, lsl #5
+
+define i1 @f6(i32 %a, i32 %b) {
+ %tmp = lshr i32 %b, 6
+ %nb = sub i32 0, %tmp
+ %tmp1 = icmp ne i32 %nb, %a
+ ret i1 %tmp1
+}
+; CHECK: f6:
+; CHECK: cmn.w r0, r1, lsr #6
+
+define i1 @f7(i32 %a, i32 %b) {
+ %tmp = ashr i32 %b, 7
+ %nb = sub i32 0, %tmp
+ %tmp1 = icmp eq i32 %a, %nb
+ ret i1 %tmp1
+}
+; CHECK: f7:
+; CHECK: cmn.w r0, r1, asr #7
+
+define i1 @f8(i32 %a, i32 %b) {
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %nb = sub i32 0, %tmp
+ %tmp1 = icmp ne i32 %a, %nb
+ ret i1 %tmp1
+}
+; CHECK: f8:
+; CHECK: cmn.w r0, r0, ror #8
+
diff --git a/test/CodeGen/Thumb2/thumb2-cmn2.ll b/test/CodeGen/Thumb2/thumb2-cmn2.ll
new file mode 100644
index 0000000..c0e19f6
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-cmn2.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; -0x000000bb = 4294967109
+define i1 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: cmn.w {{r.*}}, #187
+ %tmp = icmp ne i32 %a, 4294967109
+ ret i1 %tmp
+}
+
+; -0x00aa00aa = 4283826006
+define i1 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: cmn.w {{r.*}}, #11141290
+ %tmp = icmp eq i32 %a, 4283826006
+ ret i1 %tmp
+}
+
+; -0xcc00cc00 = 872363008
+define i1 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: cmn.w {{r.*}}, #-872363008
+ %tmp = icmp ne i32 %a, 872363008
+ ret i1 %tmp
+}
+
+; -0x00110000 = 4293853184
+define i1 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: cmn.w {{r.*}}, #1114112
+ %tmp = icmp eq i32 %a, 4293853184
+ ret i1 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-cmp.ll b/test/CodeGen/Thumb2/thumb2-cmp.ll
new file mode 100644
index 0000000..d4773bb
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-cmp.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 0x000000bb = 187
+define i1 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: cmp r0, #187
+ %tmp = icmp ne i32 %a, 187
+ ret i1 %tmp
+}
+
+; 0x00aa00aa = 11141290
+define i1 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: cmp.w r0, #11141290
+ %tmp = icmp eq i32 %a, 11141290
+ ret i1 %tmp
+}
+
+; 0xcc00cc00 = 3422604288
+define i1 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: cmp.w r0, #-872363008
+ %tmp = icmp ne i32 %a, 3422604288
+ ret i1 %tmp
+}
+
+; 0xdddddddd = 3722304989
+define i1 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: cmp.w r0, #-572662307
+ %tmp = icmp ne i32 %a, 3722304989
+ ret i1 %tmp
+}
+
+; 0x00110000 = 1114112
+define i1 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: cmp.w r0, #1114112
+ %tmp = icmp eq i32 %a, 1114112
+ ret i1 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-cmp2.ll b/test/CodeGen/Thumb2/thumb2-cmp2.ll
new file mode 100644
index 0000000..55c321d
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-cmp2.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i1 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: cmp r0, r1
+ %tmp = icmp ne i32 %a, %b
+ ret i1 %tmp
+}
+
+define i1 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: cmp r0, r1
+ %tmp = icmp eq i32 %a, %b
+ ret i1 %tmp
+}
+
+define i1 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: cmp.w r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp1 = icmp eq i32 %tmp, %a
+ ret i1 %tmp1
+}
+
+define i1 @f7(i32 %a, i32 %b) {
+; CHECK: f7:
+; CHECK: cmp.w r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp1 = icmp ne i32 %tmp, %a
+ ret i1 %tmp1
+}
+
+define i1 @f8(i32 %a, i32 %b) {
+; CHECK: f8:
+; CHECK: cmp.w r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp1 = icmp eq i32 %a, %tmp
+ ret i1 %tmp1
+}
+
+define i1 @f9(i32 %a, i32 %b) {
+; CHECK: f9:
+; CHECK: cmp.w r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = icmp ne i32 %a, %tmp
+ ret i1 %tmp1
+}
diff --git a/test/CodeGen/Thumb2/thumb2-eor.ll b/test/CodeGen/Thumb2/thumb2-eor.ll
new file mode 100644
index 0000000..b7e2766
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-eor.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: eors r0, r1
+ %tmp = xor i32 %a, %b
+ ret i32 %tmp
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: eor.w r0, r1, r0
+ %tmp = xor i32 %b, %a
+ ret i32 %tmp
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: eor.w r0, r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp1 = xor i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: eor.w r0, r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp1 = xor i32 %tmp, %a
+ ret i32 %tmp1
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: eor.w r0, r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp1 = xor i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: eor.w r0, r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = xor i32 %tmp, %a
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/Thumb2/thumb2-eor2.ll b/test/CodeGen/Thumb2/thumb2-eor2.ll
new file mode 100644
index 0000000..6b2e9dc
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-eor2.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 0x000000bb = 187
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: eor {{.*}}#187
+ %tmp = xor i32 %a, 187
+ ret i32 %tmp
+}
+
+; 0x00aa00aa = 11141290
+define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: eor {{.*}}#11141290
+ %tmp = xor i32 %a, 11141290
+ ret i32 %tmp
+}
+
+; 0xcc00cc00 = 3422604288
+define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: eor {{.*}}#-872363008
+ %tmp = xor i32 %a, 3422604288
+ ret i32 %tmp
+}
+
+; 0xdddddddd = 3722304989
+define i32 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: eor {{.*}}#-572662307
+ %tmp = xor i32 %a, 3722304989
+ ret i32 %tmp
+}
+
+; 0x00110000 = 1114112
+define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: eor {{.*}}#1114112
+ %tmp = xor i32 %a, 1114112
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
new file mode 100644
index 0000000..71199ab
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
@@ -0,0 +1,84 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
+
+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
+; CHECK: t1:
+; CHECK: it ne
+; CHECK: cmpne
+ switch i32 %c, label %cond_next [
+ i32 1, label %cond_true
+ i32 7, label %cond_true
+ ]
+
+cond_true:
+ %tmp12 = add i32 %a, 1
+ %tmp1518 = add i32 %tmp12, %b
+ ret i32 %tmp1518
+
+cond_next:
+ %tmp15 = add i32 %b, %a
+ ret i32 %tmp15
+}
+
+; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.
+define i32 @t2(i32 %a, i32 %b) {
+entry:
+; CHECK: t2:
+; CHECK: ite le
+; CHECK: suble
+; CHECK: subgt
+ %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp1434, label %bb17, label %bb.outer
+
+bb.outer: ; preds = %cond_false, %entry
+ %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
+ %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %cond_true, %bb.outer
+ %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
+ %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]
+ %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]
+ %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
+ br i1 %tmp3, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
+ %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp1437, label %bb17, label %bb
+
+cond_false: ; preds = %bb
+ %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
+ %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb17, label %bb.outer
+
+bb17: ; preds = %cond_false, %cond_true, %entry
+ %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
+ ret i32 %a_addr.026.1
+}
+
+@x = external global i32* ; <i32**> [#uses=1]
+
+define void @foo(i32 %a) {
+entry:
+ %tmp = load i32** @x ; <i32*> [#uses=1]
+ store i32 %a, i32* %tmp
+ ret void
+}
+
+define void @t3(i32 %a, i32 %b) {
+entry:
+; CHECK: t3:
+; CHECK: it lt
+; CHECK: poplt {r7, pc}
+ %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ tail call void @foo( i32 %b )
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll
new file mode 100644
index 0000000..d917ffe
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll
@@ -0,0 +1,93 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
+
+define void @foo(i32 %X, i32 %Y) {
+entry:
+; CHECK: foo:
+; CHECK: it ne
+; CHECK: cmpne
+; CHECK: it hi
+; CHECK: pophi {r7, pc}
+ %tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1]
+ %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
+ %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1]
+ br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ %tmp10 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
+
+; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1.
+
+ %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
+
+define fastcc i32 @CountTree(%struct.quad_struct* %tree) {
+entry:
+; CHECK: CountTree:
+; CHECK: it eq
+; CHECK: cmpeq
+; CHECK: bne
+; CHECK: itt eq
+; CHECK: moveq
+; CHECK: popeq
+ br label %tailrecurse
+
+tailrecurse: ; preds = %bb, %entry
+ %tmp6 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
+ %tmp9 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=2]
+ %tmp12 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
+ %tmp14 = icmp eq %struct.quad_struct* null, null ; <i1> [#uses=1]
+ %tmp17 = icmp eq %struct.quad_struct* %tmp6, null ; <i1> [#uses=1]
+ %tmp23 = icmp eq %struct.quad_struct* %tmp9, null ; <i1> [#uses=1]
+ %tmp29 = icmp eq %struct.quad_struct* %tmp12, null ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp17, %tmp14 ; <i1> [#uses=1]
+ %bothcond1 = and i1 %bothcond, %tmp23 ; <i1> [#uses=1]
+ %bothcond2 = and i1 %bothcond1, %tmp29 ; <i1> [#uses=1]
+ br i1 %bothcond2, label %return, label %bb
+
+bb: ; preds = %tailrecurse
+ %tmp41 = tail call fastcc i32 @CountTree( %struct.quad_struct* %tmp9 ) ; <i32> [#uses=0]
+ br label %tailrecurse
+
+return: ; preds = %tailrecurse
+ ret i32 0
+}
+
+ %struct.SString = type { i8*, i32, i32 }
+
+declare void @abort()
+
+define fastcc void @t1(%struct.SString* %word, i8 signext %c) {
+entry:
+; CHECK: t1:
+; CHECK: it ne
+; CHECK: popne {r7, pc}
+ %tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ tail call void @abort( )
+ unreachable
+
+cond_false: ; preds = %entry
+ ret void
+}
+
+define fastcc void @t2() nounwind {
+entry:
+; CHECK: t2:
+; CHECK: cmp r0, #0
+; CHECK: beq
+ br i1 undef, label %bb.i.i3, label %growMapping.exit
+
+bb.i.i3: ; preds = %entry
+ unreachable
+
+growMapping.exit: ; preds = %entry
+ unreachable
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt3.ll b/test/CodeGen/Thumb2/thumb2-ifcvt3.ll
new file mode 100644
index 0000000..496158c
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt3.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
+
+; There shouldn't be a unconditional branch at end of bb52.
+; rdar://7184787
+
+@posed = external global i64 ; <i64*> [#uses=1]
+
+define i1 @ab_bb52(i64 %.reload78, i64* %.out, i64* %.out1) nounwind {
+newFuncRoot:
+ br label %bb52
+
+bb52.bb55_crit_edge.exitStub: ; preds = %bb52
+ store i64 %0, i64* %.out
+ store i64 %2, i64* %.out1
+ ret i1 true
+
+bb52.bb53_crit_edge.exitStub: ; preds = %bb52
+ store i64 %0, i64* %.out
+ store i64 %2, i64* %.out1
+ ret i1 false
+
+bb52: ; preds = %newFuncRoot
+; CHECK: movne
+; CHECK: moveq
+; CHECK: pop
+; CHECK-NEXT: LBB1_1:
+ %0 = load i64* @posed, align 4 ; <i64> [#uses=3]
+ %1 = sub i64 %0, %.reload78 ; <i64> [#uses=1]
+ %2 = ashr i64 %1, 1 ; <i64> [#uses=3]
+ %3 = icmp eq i64 %2, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb52.bb55_crit_edge.exitStub, label %bb52.bb53_crit_edge.exitStub
+}
diff --git a/test/CodeGen/Thumb2/thumb2-jtb.ll b/test/CodeGen/Thumb2/thumb2-jtb.ll
new file mode 100644
index 0000000..f5a56e5
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-jtb.ll
@@ -0,0 +1,120 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 -arm-adjust-jump-tables=0 | not grep tbb
+
+; Do not use tbb / tbh if any destination is before the jumptable.
+; rdar://7102917
+
+define i16 @main__getopt_internal_2E_exit_2E_ce(i32) nounwind {
+newFuncRoot:
+ br label %_getopt_internal.exit.ce
+
+codeRepl127.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 0
+
+parse_options.exit.loopexit.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 1
+
+bb1.i.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 2
+
+bb90.i.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 3
+
+codeRepl104.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 4
+
+codeRepl113.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 5
+
+codeRepl51.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 6
+
+codeRepl70.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 7
+
+codeRepl119.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 8
+
+codeRepl93.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 9
+
+codeRepl101.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 10
+
+codeRepl120.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 11
+
+codeRepl89.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 12
+
+codeRepl45.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 13
+
+codeRepl58.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 14
+
+codeRepl46.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 15
+
+codeRepl50.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 16
+
+codeRepl52.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 17
+
+codeRepl53.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 18
+
+codeRepl61.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 19
+
+codeRepl85.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 20
+
+codeRepl97.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 21
+
+codeRepl79.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 22
+
+codeRepl102.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 23
+
+codeRepl54.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 24
+
+codeRepl57.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 25
+
+codeRepl103.exitStub: ; preds = %_getopt_internal.exit.ce
+ ret i16 26
+
+_getopt_internal.exit.ce: ; preds = %newFuncRoot
+ switch i32 %0, label %codeRepl127.exitStub [
+ i32 -1, label %parse_options.exit.loopexit.exitStub
+ i32 0, label %bb1.i.exitStub
+ i32 63, label %bb90.i.exitStub
+ i32 66, label %codeRepl104.exitStub
+ i32 67, label %codeRepl113.exitStub
+ i32 71, label %codeRepl51.exitStub
+ i32 77, label %codeRepl70.exitStub
+ i32 78, label %codeRepl119.exitStub
+ i32 80, label %codeRepl93.exitStub
+ i32 81, label %codeRepl101.exitStub
+ i32 82, label %codeRepl120.exitStub
+ i32 88, label %codeRepl89.exitStub
+ i32 97, label %codeRepl45.exitStub
+ i32 98, label %codeRepl58.exitStub
+ i32 99, label %codeRepl46.exitStub
+ i32 100, label %codeRepl50.exitStub
+ i32 104, label %codeRepl52.exitStub
+ i32 108, label %codeRepl53.exitStub
+ i32 109, label %codeRepl61.exitStub
+ i32 110, label %codeRepl85.exitStub
+ i32 111, label %codeRepl97.exitStub
+ i32 113, label %codeRepl79.exitStub
+ i32 114, label %codeRepl102.exitStub
+ i32 115, label %codeRepl54.exitStub
+ i32 116, label %codeRepl57.exitStub
+ i32 118, label %codeRepl103.exitStub
+ ]
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ldm.ll b/test/CodeGen/Thumb2/thumb2-ldm.ll
new file mode 100644
index 0000000..da2874d
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ldm.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s
+
+@X = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
+
+define i32 @t1() {
+; CHECK: t1:
+; CHECK: push {r7, lr}
+; CHECK: pop {r7, pc}
+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define i32 @t2() {
+; CHECK: t2:
+; CHECK: push {r7, lr}
+; CHECK: ldmia
+; CHECK: pop {r7, pc}
+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
+ %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1]
+ %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @t3() {
+; CHECK: t3:
+; CHECK: push {r7, lr}
+; CHECK: pop {r7, pc}
+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]
+ %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]
+ %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+declare i32 @f1(i32, i32)
+
+declare i32 @f2(i32, i32, i32)
diff --git a/test/CodeGen/Thumb2/thumb2-ldr.ll b/test/CodeGen/Thumb2/thumb2-ldr.ll
new file mode 100644
index 0000000..94888fd
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ldr.ll
@@ -0,0 +1,72 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32* %v) {
+entry:
+; CHECK: f1:
+; CHECK: ldr r0, [r0]
+ %tmp = load i32* %v
+ ret i32 %tmp
+}
+
+define i32 @f2(i32* %v) {
+entry:
+; CHECK: f2:
+; CHECK: ldr.w r0, [r0, #+4092]
+ %tmp2 = getelementptr i32* %v, i32 1023
+ %tmp = load i32* %tmp2
+ ret i32 %tmp
+}
+
+define i32 @f3(i32* %v) {
+entry:
+; CHECK: f3:
+; CHECK: mov.w r1, #4096
+; CHECK: ldr r0, [r0, r1]
+ %tmp2 = getelementptr i32* %v, i32 1024
+ %tmp = load i32* %tmp2
+ ret i32 %tmp
+}
+
+define i32 @f4(i32 %base) {
+entry:
+; CHECK: f4:
+; CHECK: ldr r0, [r0, #-128]
+ %tmp1 = sub i32 %base, 128
+ %tmp2 = inttoptr i32 %tmp1 to i32*
+ %tmp3 = load i32* %tmp2
+ ret i32 %tmp3
+}
+
+define i32 @f5(i32 %base, i32 %offset) {
+entry:
+; CHECK: f5:
+; CHECK: ldr r0, [r0, r1]
+ %tmp1 = add i32 %base, %offset
+ %tmp2 = inttoptr i32 %tmp1 to i32*
+ %tmp3 = load i32* %tmp2
+ ret i32 %tmp3
+}
+
+define i32 @f6(i32 %base, i32 %offset) {
+entry:
+; CHECK: f6:
+; CHECK: ldr.w r0, [r0, r1, lsl #2]
+ %tmp1 = shl i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i32*
+ %tmp4 = load i32* %tmp3
+ ret i32 %tmp4
+}
+
+define i32 @f7(i32 %base, i32 %offset) {
+entry:
+; CHECK: f7:
+; CHECK: lsrs r1, r1, #2
+; CHECK: ldr r0, [r0, r1]
+
+ %tmp1 = lshr i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i32*
+ %tmp4 = load i32* %tmp3
+ ret i32 %tmp4
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ldr_ext.ll b/test/CodeGen/Thumb2/thumb2-ldr_ext.ll
new file mode 100644
index 0000000..9e6aef4
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ldr_ext.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrb | count 1
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrh | count 1
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrsb | count 1
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrsh | count 1
+
+define i32 @test1(i8* %v.pntr.s0.u1) {
+ %tmp.u = load i8* %v.pntr.s0.u1
+ %tmp1.s = zext i8 %tmp.u to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test2(i16* %v.pntr.s0.u1) {
+ %tmp.u = load i16* %v.pntr.s0.u1
+ %tmp1.s = zext i16 %tmp.u to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test3(i8* %v.pntr.s1.u0) {
+ %tmp.s = load i8* %v.pntr.s1.u0
+ %tmp1.s = sext i8 %tmp.s to i32
+ ret i32 %tmp1.s
+}
+
+define i32 @test4() {
+ %tmp.s = load i16* null
+ %tmp1.s = sext i16 %tmp.s to i32
+ ret i32 %tmp1.s
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ldr_post.ll b/test/CodeGen/Thumb2/thumb2-ldr_post.ll
new file mode 100644
index 0000000..d1af4ba
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ldr_post.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | \
+; RUN: grep {ldr.*\\\[.*\],} | count 1
+
+define i32 @test(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = mul i32 %a, %b ; <i32> [#uses=2]
+ %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1]
+ %tmp3 = load i32* %tmp2 ; <i32> [#uses=1]
+ %tmp4 = sub i32 %tmp1, 8 ; <i32> [#uses=1]
+ %tmp5 = mul i32 %tmp4, %tmp3 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
diff --git a/test/CodeGen/Thumb2/thumb2-ldr_pre.ll b/test/CodeGen/Thumb2/thumb2-ldr_pre.ll
new file mode 100644
index 0000000..9cc3f4a
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ldr_pre.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | \
+; RUN: grep {ldr.*\\!} | count 3
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | \
+; RUN: grep {ldrsb.*\\!} | count 1
+
+define i32* @test1(i32* %X, i32* %dest) {
+ %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2]
+ %A = load i32* %Y ; <i32> [#uses=1]
+ store i32 %A, i32* %dest
+ ret i32* %Y
+}
+
+define i32 @test2(i32 %a, i32 %b) {
+ %tmp1 = sub i32 %a, 64 ; <i32> [#uses=2]
+ %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1]
+ %tmp3 = load i32* %tmp2 ; <i32> [#uses=1]
+ %tmp4 = sub i32 %tmp1, %b ; <i32> [#uses=1]
+ %tmp5 = add i32 %tmp4, %tmp3 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i8* @test3(i8* %X, i32* %dest) {
+ %tmp1 = getelementptr i8* %X, i32 4
+ %tmp2 = load i8* %tmp1
+ %tmp3 = sext i8 %tmp2 to i32
+ store i32 %tmp3, i32* %dest
+ ret i8* %tmp1
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ldrb.ll b/test/CodeGen/Thumb2/thumb2-ldrb.ll
new file mode 100644
index 0000000..bf10097
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ldrb.ll
@@ -0,0 +1,72 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i8 @f1(i8* %v) {
+entry:
+; CHECK: f1:
+; CHECK: ldrb r0, [r0]
+ %tmp = load i8* %v
+ ret i8 %tmp
+}
+
+define i8 @f2(i8* %v) {
+entry:
+; CHECK: f2:
+; CHECK: ldrb r0, [r0, #-1]
+ %tmp2 = getelementptr i8* %v, i8 1023
+ %tmp = load i8* %tmp2
+ ret i8 %tmp
+}
+
+define i8 @f3(i32 %base) {
+entry:
+; CHECK: f3:
+; CHECK: mov.w r1, #4096
+; CHECK: ldrb r0, [r0, r1]
+ %tmp1 = add i32 %base, 4096
+ %tmp2 = inttoptr i32 %tmp1 to i8*
+ %tmp3 = load i8* %tmp2
+ ret i8 %tmp3
+}
+
+define i8 @f4(i32 %base) {
+entry:
+; CHECK: f4:
+; CHECK: ldrb r0, [r0, #-128]
+ %tmp1 = sub i32 %base, 128
+ %tmp2 = inttoptr i32 %tmp1 to i8*
+ %tmp3 = load i8* %tmp2
+ ret i8 %tmp3
+}
+
+define i8 @f5(i32 %base, i32 %offset) {
+entry:
+; CHECK: f5:
+; CHECK: ldrb r0, [r0, r1]
+ %tmp1 = add i32 %base, %offset
+ %tmp2 = inttoptr i32 %tmp1 to i8*
+ %tmp3 = load i8* %tmp2
+ ret i8 %tmp3
+}
+
+define i8 @f6(i32 %base, i32 %offset) {
+entry:
+; CHECK: f6:
+; CHECK: ldrb.w r0, [r0, r1, lsl #2]
+ %tmp1 = shl i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i8*
+ %tmp4 = load i8* %tmp3
+ ret i8 %tmp4
+}
+
+define i8 @f7(i32 %base, i32 %offset) {
+entry:
+; CHECK: f7:
+; CHECK: lsrs r1, r1, #2
+; CHECK: ldrb r0, [r0, r1]
+ %tmp1 = lshr i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i8*
+ %tmp4 = load i8* %tmp3
+ ret i8 %tmp4
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ldrd.ll b/test/CodeGen/Thumb2/thumb2-ldrd.ll
new file mode 100644
index 0000000..22d4e88
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ldrd.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s
+
+@b = external global i64*
+
+define i64 @t(i64 %a) nounwind readonly {
+entry:
+;CHECK: ldrd r2, [r2]
+ %0 = load i64** @b, align 4
+ %1 = load i64* %0, align 4
+ %2 = mul i64 %1, %a
+ ret i64 %2
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ldrh.ll b/test/CodeGen/Thumb2/thumb2-ldrh.ll
new file mode 100644
index 0000000..f1fb79c
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ldrh.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i16 @f1(i16* %v) {
+entry:
+; CHECK: f1:
+; CHECK: ldrh r0, [r0]
+ %tmp = load i16* %v
+ ret i16 %tmp
+}
+
+define i16 @f2(i16* %v) {
+entry:
+; CHECK: f2:
+; CHECK: ldrh.w r0, [r0, #+2046]
+ %tmp2 = getelementptr i16* %v, i16 1023
+ %tmp = load i16* %tmp2
+ ret i16 %tmp
+}
+
+define i16 @f3(i16* %v) {
+entry:
+; CHECK: f3:
+; CHECK: mov.w r1, #4096
+; CHECK: ldrh r0, [r0, r1]
+ %tmp2 = getelementptr i16* %v, i16 2048
+ %tmp = load i16* %tmp2
+ ret i16 %tmp
+}
+
+define i16 @f4(i32 %base) {
+entry:
+; CHECK: f4:
+; CHECK: ldrh r0, [r0, #-128]
+ %tmp1 = sub i32 %base, 128
+ %tmp2 = inttoptr i32 %tmp1 to i16*
+ %tmp3 = load i16* %tmp2
+ ret i16 %tmp3
+}
+
+define i16 @f5(i32 %base, i32 %offset) {
+entry:
+; CHECK: f5:
+; CHECK: ldrh r0, [r0, r1]
+ %tmp1 = add i32 %base, %offset
+ %tmp2 = inttoptr i32 %tmp1 to i16*
+ %tmp3 = load i16* %tmp2
+ ret i16 %tmp3
+}
+
+define i16 @f6(i32 %base, i32 %offset) {
+entry:
+; CHECK: f6:
+; CHECK: ldrh.w r0, [r0, r1, lsl #2]
+ %tmp1 = shl i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i16*
+ %tmp4 = load i16* %tmp3
+ ret i16 %tmp4
+}
+
+define i16 @f7(i32 %base, i32 %offset) {
+entry:
+; CHECK: f7:
+; CHECK: lsrs r1, r1, #2
+; CHECK: ldrh r0, [r0, r1]
+ %tmp1 = lshr i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i16*
+ %tmp4 = load i16* %tmp3
+ ret i16 %tmp4
+}
diff --git a/test/CodeGen/Thumb2/thumb2-lsl.ll b/test/CodeGen/Thumb2/thumb2-lsl.ll
new file mode 100644
index 0000000..6b0818a
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-lsl.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: lsls r0, r0, #5
+ %tmp = shl i32 %a, 5
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-lsl2.ll b/test/CodeGen/Thumb2/thumb2-lsl2.ll
new file mode 100644
index 0000000..f283eef
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-lsl2.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: lsls r0, r1
+ %tmp = shl i32 %a, %b
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-lsr.ll b/test/CodeGen/Thumb2/thumb2-lsr.ll
new file mode 100644
index 0000000..7cbee54
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-lsr.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: lsrs r0, r0, #13
+ %tmp = lshr i32 %a, 13
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-lsr2.ll b/test/CodeGen/Thumb2/thumb2-lsr2.ll
new file mode 100644
index 0000000..87800f9
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-lsr2.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: lsrs r0, r1
+ %tmp = lshr i32 %a, %b
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-lsr3.ll b/test/CodeGen/Thumb2/thumb2-lsr3.ll
new file mode 100644
index 0000000..5cfd3f5
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-lsr3.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2
+
+define i1 @test1(i64 %poscnt, i32 %work) {
+entry:
+; CHECK: rrx r0, r0
+; CHECK: lsrs.w r1, r1, #1
+ %0 = lshr i64 %poscnt, 1
+ %1 = icmp eq i64 %0, 0
+ ret i1 %1
+}
+
+define i1 @test2(i64 %poscnt, i32 %work) {
+entry:
+; CHECK: rrx r0, r0
+; CHECK: asrs.w r1, r1, #1
+ %0 = ashr i64 %poscnt, 1
+ %1 = icmp eq i64 %0, 0
+ ret i1 %1
+}
diff --git a/test/CodeGen/Thumb2/thumb2-mla.ll b/test/CodeGen/Thumb2/thumb2-mla.ll
new file mode 100644
index 0000000..c4cc749
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-mla.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = mul i32 %a, %b
+ %tmp2 = add i32 %c, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f1:
+; CHECK: mla r0, r0, r1, r2
+
+define i32 @f2(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = mul i32 %a, %b
+ %tmp2 = add i32 %tmp1, %c
+ ret i32 %tmp2
+}
+; CHECK: f2:
+; CHECK: mla r0, r0, r1, r2
diff --git a/test/CodeGen/Thumb2/thumb2-mls.ll b/test/CodeGen/Thumb2/thumb2-mls.ll
new file mode 100644
index 0000000..fc9e6ba
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-mls.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = mul i32 %a, %b
+ %tmp2 = sub i32 %c, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f1:
+; CHECK: mls r0, r0, r1, r2
+
+; sub doesn't commute, so no mls for this one
+define i32 @f2(i32 %a, i32 %b, i32 %c) {
+ %tmp1 = mul i32 %a, %b
+ %tmp2 = sub i32 %tmp1, %c
+ ret i32 %tmp2
+}
+; CHECK: f2:
+; CHECK: muls r0, r1
+
diff --git a/test/CodeGen/Thumb2/thumb2-mov.ll b/test/CodeGen/Thumb2/thumb2-mov.ll
new file mode 100644
index 0000000..1dc3614
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-mov.ll
@@ -0,0 +1,266 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; Test #<const>
+
+; var 2.1 - 0x00ab00ab
+define i32 @t2_const_var2_1_ok_1(i32 %lhs) {
+;CHECK: t2_const_var2_1_ok_1:
+;CHECK: add.w r0, r0, #11206827
+ %ret = add i32 %lhs, 11206827 ; 0x00ab00ab
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_1_ok_2(i32 %lhs) {
+;CHECK: t2_const_var2_1_ok_2:
+;CHECK: add.w r0, r0, #11206656
+;CHECK: adds r0, #187
+ %ret = add i32 %lhs, 11206843 ; 0x00ab00bb
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_1_ok_3(i32 %lhs) {
+;CHECK: t2_const_var2_1_ok_3:
+;CHECK: add.w r0, r0, #11206827
+;CHECK: add.w r0, r0, #16777216
+ %ret = add i32 %lhs, 27984043 ; 0x01ab00ab
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_1_ok_4(i32 %lhs) {
+;CHECK: t2_const_var2_1_ok_4:
+;CHECK: add.w r0, r0, #16777472
+;CHECK: add.w r0, r0, #11206827
+ %ret = add i32 %lhs, 27984299 ; 0x01ab01ab
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_1_fail_1(i32 %lhs) {
+;CHECK: t2_const_var2_1_fail_1:
+;CHECK: movw r1, #43777
+;CHECK: movt r1, #427
+;CHECK: add r0, r1
+ %ret = add i32 %lhs, 28027649 ; 0x01abab01
+ ret i32 %ret
+}
+
+; var 2.2 - 0xab00ab00
+define i32 @t2_const_var2_2_ok_1(i32 %lhs) {
+;CHECK: t2_const_var2_2_ok_1:
+;CHECK: add.w r0, r0, #-1426019584
+ %ret = add i32 %lhs, 2868947712 ; 0xab00ab00
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_2_ok_2(i32 %lhs) {
+;CHECK: t2_const_var2_2_ok_2:
+;CHECK: add.w r0, r0, #-1426063360
+;CHECK: add.w r0, r0, #47616
+ %ret = add i32 %lhs, 2868951552 ; 0xab00ba00
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_2_ok_3(i32 %lhs) {
+;CHECK: t2_const_var2_2_ok_3:
+;CHECK: add.w r0, r0, #-1426019584
+;CHECK: adds r0, #16
+ %ret = add i32 %lhs, 2868947728 ; 0xab00ab10
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_2_ok_4(i32 %lhs) {
+;CHECK: t2_const_var2_2_ok_4:
+;CHECK: add.w r0, r0, #-1426019584
+;CHECK: add.w r0, r0, #1048592
+ %ret = add i32 %lhs, 2869996304 ; 0xab10ab10
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_2_fail_1(i32 %lhs) {
+;CHECK: t2_const_var2_2_fail_1:
+;CHECK: movw r1, #43792
+;CHECK: movt r1, #4267
+;CHECK: add r0, r1
+ %ret = add i32 %lhs, 279685904 ; 0x10abab10
+ ret i32 %ret
+}
+
+; var 2.3 - 0xabababab
+define i32 @t2_const_var2_3_ok_1(i32 %lhs) {
+;CHECK: t2_const_var2_3_ok_1:
+;CHECK: add.w r0, r0, #-1414812757
+ %ret = add i32 %lhs, 2880154539 ; 0xabababab
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_3_fail_1(i32 %lhs) {
+;CHECK: t2_const_var2_3_fail_1:
+;CHECK: movw r1, #43962
+;CHECK: movt r1, #43947
+;CHECK: add r0, r1
+ %ret = add i32 %lhs, 2880154554 ; 0xabababba
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_3_fail_2(i32 %lhs) {
+;CHECK: t2_const_var2_3_fail_2:
+;CHECK: movw r1, #47787
+;CHECK: movt r1, #43947
+;CHECK: add r0, r1
+ %ret = add i32 %lhs, 2880158379 ; 0xababbaab
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_3_fail_3(i32 %lhs) {
+;CHECK: t2_const_var2_3_fail_3:
+;CHECK: movw r1, #43947
+;CHECK: movt r1, #43962
+;CHECK: add r0, r1
+ %ret = add i32 %lhs, 2881137579 ; 0xabbaabab
+ ret i32 %ret
+}
+
+define i32 @t2_const_var2_3_fail_4(i32 %lhs) {
+;CHECK: t2_const_var2_3_fail_4:
+;CHECK: movw r1, #43947
+;CHECK: movt r1, #47787
+;CHECK: add r0, r1
+ %ret = add i32 %lhs, 3131812779 ; 0xbaababab
+ ret i32 %ret
+}
+
+; var 3 - 0x0F000000
+define i32 @t2_const_var3_1_ok_1(i32 %lhs) {
+;CHECK: t2_const_var3_1_ok_1:
+;CHECK: add.w r0, r0, #251658240
+ %ret = add i32 %lhs, 251658240 ; 0x0F000000
+ ret i32 %ret
+}
+
+define i32 @t2_const_var3_2_ok_1(i32 %lhs) {
+;CHECK: t2_const_var3_2_ok_1:
+;CHECK: add.w r0, r0, #3948544
+ %ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000
+ ret i32 %ret
+}
+
+define i32 @t2_const_var3_2_ok_2(i32 %lhs) {
+;CHECK: t2_const_var3_2_ok_2:
+;CHECK: add.w r0, r0, #2097152
+;CHECK: add.w r0, r0, #1843200
+ %ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000
+ ret i32 %ret
+}
+
+define i32 @t2_const_var3_3_ok_1(i32 %lhs) {
+;CHECK: t2_const_var3_3_ok_1:
+;CHECK: add.w r0, r0, #258
+ %ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010
+ ret i32 %ret
+}
+
+define i32 @t2_const_var3_4_ok_1(i32 %lhs) {
+;CHECK: t2_const_var3_4_ok_1:
+;CHECK: add.w r0, r0, #-268435456
+ %ret = add i32 %lhs, 4026531840 ; 0xF0000000
+ ret i32 %ret
+}
+
+define i32 @t2MOVTi16_ok_1(i32 %a) {
+; CHECK: t2MOVTi16_ok_1:
+; CHECK: movt r0, #1234
+ %1 = and i32 %a, 65535
+ %2 = shl i32 1234, 16
+ %3 = or i32 %1, %2
+
+ ret i32 %3
+}
+
+define i32 @t2MOVTi16_test_1(i32 %a) {
+; CHECK: t2MOVTi16_test_1:
+; CHECK: movt r0, #1234
+ %1 = shl i32 255, 8
+ %2 = shl i32 1234, 8
+ %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3
+ %4 = shl i32 %2, 8 ; This gives us (1234 << 16) in %4
+ %5 = and i32 %a, %3
+ %6 = or i32 %4, %5
+
+ ret i32 %6
+}
+
+define i32 @t2MOVTi16_test_2(i32 %a) {
+; CHECK: t2MOVTi16_test_2:
+; CHECK: movt r0, #1234
+ %1 = shl i32 255, 8
+ %2 = shl i32 1234, 8
+ %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3
+ %4 = shl i32 %2, 6
+ %5 = and i32 %a, %3
+ %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
+ %7 = or i32 %5, %6
+
+ ret i32 %7
+}
+
+define i32 @t2MOVTi16_test_3(i32 %a) {
+; CHECK: t2MOVTi16_test_3:
+; CHECK: movt r0, #1234
+ %1 = shl i32 255, 8
+ %2 = shl i32 1234, 8
+ %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3
+ %4 = shl i32 %2, 6
+ %5 = and i32 %a, %3
+ %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
+ %7 = lshr i32 %6, 6
+ %8 = shl i32 %7, 6
+ %9 = or i32 %5, %8
+
+ ret i32 %8
+}
+
+; 171 = 0x000000ab
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: movs r0, #171
+ %tmp = add i32 0, 171
+ ret i32 %tmp
+}
+
+; 1179666 = 0x00120012
+define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: mov.w r0, #1179666
+ %tmp = add i32 0, 1179666
+ ret i32 %tmp
+}
+
+; 872428544 = 0x34003400
+define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: mov.w r0, #872428544
+ %tmp = add i32 0, 872428544
+ ret i32 %tmp
+}
+
+; 1448498774 = 0x56565656
+define i32 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: mov.w r0, #1448498774
+ %tmp = add i32 0, 1448498774
+ ret i32 %tmp
+}
+
+; 66846720 = 0x03fc0000
+define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: mov.w r0, #66846720
+ %tmp = add i32 0, 66846720
+ ret i32 %tmp
+}
+
+define i32 @f6(i32 %a) {
+;CHECK: f6
+;CHECK: movw r0, #65535
+ %tmp = add i32 0, 65535
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-mul.ll b/test/CodeGen/Thumb2/thumb2-mul.ll
new file mode 100644
index 0000000..b1515b5
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-mul.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b, i32 %c) {
+; CHECK: f1:
+; CHECK: muls r0, r1
+ %tmp = mul i32 %a, %b
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-mulhi.ll b/test/CodeGen/Thumb2/thumb2-mulhi.ll
new file mode 100644
index 0000000..5d47770
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-mulhi.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep smmul | count 1
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep umull | count 1
+
+define i32 @smulhi(i32 %x, i32 %y) {
+ %tmp = sext i32 %x to i64 ; <i64> [#uses=1]
+ %tmp1 = sext i32 %y to i64 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
+ %tmp3 = lshr i64 %tmp2, 32 ; <i64> [#uses=1]
+ %tmp3.upgrd.1 = trunc i64 %tmp3 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp3.upgrd.1
+}
+
+define i32 @umulhi(i32 %x, i32 %y) {
+ %tmp = zext i32 %x to i64 ; <i64> [#uses=1]
+ %tmp1 = zext i32 %y to i64 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
+ %tmp3 = lshr i64 %tmp2, 32 ; <i64> [#uses=1]
+ %tmp3.upgrd.2 = trunc i64 %tmp3 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp3.upgrd.2
+}
diff --git a/test/CodeGen/Thumb2/thumb2-mvn.ll b/test/CodeGen/Thumb2/thumb2-mvn.ll
new file mode 100644
index 0000000..a8c8f83
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-mvn.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
+
+; 0x000000bb = 187
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: mvn r0, #187
+ %tmp = xor i32 4294967295, 187
+ ret i32 %tmp
+}
+
+; 0x00aa00aa = 11141290
+define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: mvn r0, #11141290
+ %tmp = xor i32 4294967295, 11141290
+ ret i32 %tmp
+}
+
+; 0xcc00cc00 = 3422604288
+define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: mvn r0, #-872363008
+ %tmp = xor i32 4294967295, 3422604288
+ ret i32 %tmp
+}
+
+; 0x00110000 = 1114112
+define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: mvn r0, #1114112
+ %tmp = xor i32 4294967295, 1114112
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-mvn2.ll b/test/CodeGen/Thumb2/thumb2-mvn2.ll
new file mode 100644
index 0000000..375d0aa
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-mvn2.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: mvns r0, r0
+ %tmp = xor i32 4294967295, %a
+ ret i32 %tmp
+}
+
+define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: mvns r0, r0
+ %tmp = xor i32 %a, 4294967295
+ ret i32 %tmp
+}
+
+define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: mvn.w r0, r0, lsl #5
+ %tmp = shl i32 %a, 5
+ %tmp1 = xor i32 %tmp, 4294967295
+ ret i32 %tmp1
+}
+
+define i32 @f6(i32 %a) {
+; CHECK: f6:
+; CHECK: mvn.w r0, r0, lsr #6
+ %tmp = lshr i32 %a, 6
+ %tmp1 = xor i32 %tmp, 4294967295
+ ret i32 %tmp1
+}
+
+define i32 @f7(i32 %a) {
+; CHECK: f7:
+; CHECK: mvn.w r0, r0, asr #7
+ %tmp = ashr i32 %a, 7
+ %tmp1 = xor i32 %tmp, 4294967295
+ ret i32 %tmp1
+}
+
+define i32 @f8(i32 %a) {
+; CHECK: f8:
+; CHECK: mvn.w r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = xor i32 %tmp, 4294967295
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/Thumb2/thumb2-neg.ll b/test/CodeGen/Thumb2/thumb2-neg.ll
new file mode 100644
index 0000000..6bf11ec
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-neg.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: rsbs r0, r0, #0
+ %tmp = sub i32 0, %a
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-orn.ll b/test/CodeGen/Thumb2/thumb2-orn.ll
new file mode 100644
index 0000000..97a3fd7
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-orn.ll
@@ -0,0 +1,72 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+
+define i32 @f1(i32 %a, i32 %b) {
+ %tmp = xor i32 %b, 4294967295
+ %tmp1 = or i32 %a, %tmp
+ ret i32 %tmp1
+}
+; CHECK: f1:
+; CHECK: orn r0, r0, r1
+
+define i32 @f2(i32 %a, i32 %b) {
+ %tmp = xor i32 %b, 4294967295
+ %tmp1 = or i32 %tmp, %a
+ ret i32 %tmp1
+}
+; CHECK: f2:
+; CHECK: orn r0, r0, r1
+
+define i32 @f3(i32 %a, i32 %b) {
+ %tmp = xor i32 4294967295, %b
+ %tmp1 = or i32 %a, %tmp
+ ret i32 %tmp1
+}
+; CHECK: f3:
+; CHECK: orn r0, r0, r1
+
+define i32 @f4(i32 %a, i32 %b) {
+ %tmp = xor i32 4294967295, %b
+ %tmp1 = or i32 %tmp, %a
+ ret i32 %tmp1
+}
+; CHECK: f4:
+; CHECK: orn r0, r0, r1
+
+define i32 @f5(i32 %a, i32 %b) {
+ %tmp = shl i32 %b, 5
+ %tmp1 = xor i32 4294967295, %tmp
+ %tmp2 = or i32 %a, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f5:
+; CHECK: orn r0, r0, r1, lsl #5
+
+define i32 @f6(i32 %a, i32 %b) {
+ %tmp = lshr i32 %b, 6
+ %tmp1 = xor i32 4294967295, %tmp
+ %tmp2 = or i32 %a, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f6:
+; CHECK: orn r0, r0, r1, lsr #6
+
+define i32 @f7(i32 %a, i32 %b) {
+ %tmp = ashr i32 %b, 7
+ %tmp1 = xor i32 4294967295, %tmp
+ %tmp2 = or i32 %a, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f7:
+; CHECK: orn r0, r0, r1, asr #7
+
+define i32 @f8(i32 %a, i32 %b) {
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = xor i32 4294967295, %tmp
+ %tmp2 = or i32 %a, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f8:
+; CHECK: orn r0, r0, r0, ror #8
diff --git a/test/CodeGen/Thumb2/thumb2-orn2.ll b/test/CodeGen/Thumb2/thumb2-orn2.ll
new file mode 100644
index 0000000..34ab3a5
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-orn2.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+
+; 0x000000bb = 187
+define i32 @f1(i32 %a) {
+ %tmp1 = xor i32 4294967295, 187
+ %tmp2 = or i32 %a, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f1:
+; CHECK: orn r0, r0, #187
+
+; 0x00aa00aa = 11141290
+define i32 @f2(i32 %a) {
+ %tmp1 = xor i32 4294967295, 11141290
+ %tmp2 = or i32 %a, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f2:
+; CHECK: orn r0, r0, #11141290
+
+; 0xcc00cc00 = 3422604288
+define i32 @f3(i32 %a) {
+ %tmp1 = xor i32 4294967295, 3422604288
+ %tmp2 = or i32 %a, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f3:
+; CHECK: orn r0, r0, #-872363008
+
+; 0x00110000 = 1114112
+define i32 @f5(i32 %a) {
+ %tmp1 = xor i32 4294967295, 1114112
+ %tmp2 = or i32 %a, %tmp1
+ ret i32 %tmp2
+}
+; CHECK: f5:
+; CHECK: orn r0, r0, #1114112
diff --git a/test/CodeGen/Thumb2/thumb2-orr.ll b/test/CodeGen/Thumb2/thumb2-orr.ll
new file mode 100644
index 0000000..89ab7b1
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-orr.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: orrs r0, r1
+ %tmp2 = or i32 %a, %b
+ ret i32 %tmp2
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: orr.w r0, r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp2 = or i32 %a, %tmp
+ ret i32 %tmp2
+}
+
+define i32 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: orr.w r0, r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp2 = or i32 %a, %tmp
+ ret i32 %tmp2
+}
+
+define i32 @f7(i32 %a, i32 %b) {
+; CHECK: f7:
+; CHECK: orr.w r0, r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp2 = or i32 %a, %tmp
+ ret i32 %tmp2
+}
+
+define i32 @f8(i32 %a, i32 %b) {
+; CHECK: f8:
+; CHECK: orr.w r0, r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp2 = or i32 %a, %tmp
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/Thumb2/thumb2-orr2.ll b/test/CodeGen/Thumb2/thumb2-orr2.ll
new file mode 100644
index 0000000..8f7a3c2
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-orr2.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+
+; 0x000000bb = 187
+define i32 @f1(i32 %a) {
+ %tmp2 = or i32 %a, 187
+ ret i32 %tmp2
+}
+; CHECK: f1:
+; CHECK: orr r0, r0, #187
+
+; 0x00aa00aa = 11141290
+define i32 @f2(i32 %a) {
+ %tmp2 = or i32 %a, 11141290
+ ret i32 %tmp2
+}
+; CHECK: f2:
+; CHECK: orr r0, r0, #11141290
+
+; 0xcc00cc00 = 3422604288
+define i32 @f3(i32 %a) {
+ %tmp2 = or i32 %a, 3422604288
+ ret i32 %tmp2
+}
+; CHECK: f3:
+; CHECK: orr r0, r0, #-872363008
+
+; 0x44444444 = 1145324612
+define i32 @f4(i32 %a) {
+ %tmp2 = or i32 %a, 1145324612
+ ret i32 %tmp2
+}
+; CHECK: f4:
+; CHECK: orr r0, r0, #1145324612
+
+; 0x00110000 = 1114112
+define i32 @f5(i32 %a) {
+ %tmp2 = or i32 %a, 1114112
+ ret i32 %tmp2
+}
+; CHECK: f5:
+; CHECK: orr r0, r0, #1114112
diff --git a/test/CodeGen/Thumb2/thumb2-pack.ll b/test/CodeGen/Thumb2/thumb2-pack.ll
new file mode 100644
index 0000000..a982249
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-pack.ll
@@ -0,0 +1,73 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | \
+; RUN: grep pkhbt | count 5
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | \
+; RUN: grep pkhtb | count 4
+
+define i32 @test1(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %Y, 16 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test1a(i32 %X, i32 %Y) {
+ %tmp19 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp37 = shl i32 %Y, 16 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp37, %tmp19 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test2(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp3 = shl i32 %Y, 12 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp3, -65536 ; <i32> [#uses=1]
+ %tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp57
+}
+
+define i32 @test3(i32 %X, i32 %Y) {
+ %tmp19 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp37 = shl i32 %Y, 18 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp37, %tmp19 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test4(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1]
+ %tmp3 = and i32 %Y, -65536 ; <i32> [#uses=1]
+ %tmp46 = or i32 %tmp3, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp46
+}
+
+define i32 @test5(i32 %X, i32 %Y) {
+ %tmp17 = and i32 %X, -65536 ; <i32> [#uses=1]
+ %tmp2 = bitcast i32 %Y to i32 ; <i32> [#uses=1]
+ %tmp4 = lshr i32 %tmp2, 16 ; <i32> [#uses=2]
+ %tmp5 = or i32 %tmp4, %tmp17 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test5a(i32 %X, i32 %Y) {
+ %tmp110 = and i32 %X, -65536 ; <i32> [#uses=1]
+ %tmp37 = lshr i32 %Y, 16 ; <i32> [#uses=1]
+ %tmp39 = bitcast i32 %tmp37 to i32 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp39, %tmp110 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define i32 @test6(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, -65536 ; <i32> [#uses=1]
+ %tmp37 = lshr i32 %Y, 12 ; <i32> [#uses=1]
+ %tmp38 = bitcast i32 %tmp37 to i32 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp38, 65535 ; <i32> [#uses=1]
+ %tmp59 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp59
+}
+
+define i32 @test7(i32 %X, i32 %Y) {
+ %tmp1 = and i32 %X, -65536 ; <i32> [#uses=1]
+ %tmp3 = ashr i32 %Y, 18 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp3, 65535 ; <i32> [#uses=1]
+ %tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp57
+}
diff --git a/test/CodeGen/Thumb2/thumb2-rev.ll b/test/CodeGen/Thumb2/thumb2-rev.ll
new file mode 100644
index 0000000..27b1672
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-rev.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a | FileCheck %s
+
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: rev r0, r0
+ %tmp = tail call i32 @llvm.bswap.i32(i32 %a)
+ ret i32 %tmp
+}
+
+declare i32 @llvm.bswap.i32(i32) nounwind readnone
+
+define i32 @f2(i32 %X) {
+; CHECK: f2:
+; CHECK: revsh r0, r0
+ %tmp1 = lshr i32 %X, 8
+ %tmp1.upgrd.1 = trunc i32 %tmp1 to i16
+ %tmp3 = trunc i32 %X to i16
+ %tmp2 = and i16 %tmp1.upgrd.1, 255
+ %tmp4 = shl i16 %tmp3, 8
+ %tmp5 = or i16 %tmp2, %tmp4
+ %tmp5.upgrd.2 = sext i16 %tmp5 to i32
+ ret i32 %tmp5.upgrd.2
+}
diff --git a/test/CodeGen/Thumb2/thumb2-rev16.ll b/test/CodeGen/Thumb2/thumb2-rev16.ll
new file mode 100644
index 0000000..39b6ac3
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-rev16.ll
@@ -0,0 +1,32 @@
+; XFAIL: *
+; fixme rev16 pattern is not matching
+
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {rev16\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
+
+; 0xff00ff00 = 4278255360
+; 0x00ff00ff = 16711935
+define i32 @f1(i32 %a) {
+ %l8 = shl i32 %a, 8
+ %r8 = lshr i32 %a, 8
+ %mask_l8 = and i32 %l8, 4278255360
+ %mask_r8 = and i32 %r8, 16711935
+ %tmp = or i32 %mask_l8, %mask_r8
+ ret i32 %tmp
+}
+
+; 0xff000000 = 4278190080
+; 0x00ff0000 = 16711680
+; 0x0000ff00 = 65280
+; 0x000000ff = 255
+define i32 @f2(i32 %a) {
+ %l8 = shl i32 %a, 8
+ %r8 = lshr i32 %a, 8
+ %masklo_l8 = and i32 %l8, 65280
+ %maskhi_l8 = and i32 %l8, 4278190080
+ %masklo_r8 = and i32 %r8, 255
+ %maskhi_r8 = and i32 %r8, 16711680
+ %tmp1 = or i32 %masklo_l8, %masklo_r8
+ %tmp2 = or i32 %maskhi_l8, %maskhi_r8
+ %tmp = or i32 %tmp1, %tmp2
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-ror.ll b/test/CodeGen/Thumb2/thumb2-ror.ll
new file mode 100644
index 0000000..0200116
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ror.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+
+define i32 @f1(i32 %a) {
+ %l8 = shl i32 %a, 10
+ %r8 = lshr i32 %a, 22
+ %tmp = or i32 %l8, %r8
+ ret i32 %tmp
+}
+; CHECK: f1:
+; CHECK: ror.w r0, r0, #22
diff --git a/test/CodeGen/Thumb2/thumb2-ror2.ll b/test/CodeGen/Thumb2/thumb2-ror2.ll
new file mode 100644
index 0000000..ffd1dd7
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-ror2.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: rors r0, r1
+ %db = sub i32 32, %b
+ %l8 = shl i32 %a, %b
+ %r8 = lshr i32 %a, %db
+ %tmp = or i32 %l8, %r8
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-rsb.ll b/test/CodeGen/Thumb2/thumb2-rsb.ll
new file mode 100644
index 0000000..15185be
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-rsb.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+ %tmp = shl i32 %b, 5
+ %tmp1 = sub i32 %tmp, %a
+ ret i32 %tmp1
+}
+; CHECK: f1:
+; CHECK: rsb r0, r0, r1, lsl #5
+
+define i32 @f2(i32 %a, i32 %b) {
+ %tmp = lshr i32 %b, 6
+ %tmp1 = sub i32 %tmp, %a
+ ret i32 %tmp1
+}
+; CHECK: f2:
+; CHECK: rsb r0, r0, r1, lsr #6
+
+define i32 @f3(i32 %a, i32 %b) {
+ %tmp = ashr i32 %b, 7
+ %tmp1 = sub i32 %tmp, %a
+ ret i32 %tmp1
+}
+; CHECK: f3:
+; CHECK: rsb r0, r0, r1, asr #7
+
+define i32 @f4(i32 %a, i32 %b) {
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = sub i32 %tmp, %a
+ ret i32 %tmp1
+}
+; CHECK: f4:
+; CHECK: rsb r0, r0, r0, ror #8
diff --git a/test/CodeGen/Thumb2/thumb2-rsb2.ll b/test/CodeGen/Thumb2/thumb2-rsb2.ll
new file mode 100644
index 0000000..61fb619
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-rsb2.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 171 = 0x000000ab
+define i32 @f1(i32 %a) {
+ %tmp = sub i32 171, %a
+ ret i32 %tmp
+}
+; CHECK: f1:
+; CHECK: rsb.w r0, r0, #171
+
+; 1179666 = 0x00120012
+define i32 @f2(i32 %a) {
+ %tmp = sub i32 1179666, %a
+ ret i32 %tmp
+}
+; CHECK: f2:
+; CHECK: rsb.w r0, r0, #1179666
+
+; 872428544 = 0x34003400
+define i32 @f3(i32 %a) {
+ %tmp = sub i32 872428544, %a
+ ret i32 %tmp
+}
+; CHECK: f3:
+; CHECK: rsb.w r0, r0, #872428544
+
+; 1448498774 = 0x56565656
+define i32 @f4(i32 %a) {
+ %tmp = sub i32 1448498774, %a
+ ret i32 %tmp
+}
+; CHECK: f4:
+; CHECK: rsb.w r0, r0, #1448498774
+
+; 66846720 = 0x03fc0000
+define i32 @f5(i32 %a) {
+ %tmp = sub i32 66846720, %a
+ ret i32 %tmp
+}
+; CHECK: f5:
+; CHECK: rsb.w r0, r0, #66846720
diff --git a/test/CodeGen/Thumb2/thumb2-sbc.ll b/test/CodeGen/Thumb2/thumb2-sbc.ll
new file mode 100644
index 0000000..ad96291
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-sbc.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i64 @f1(i64 %a, i64 %b) {
+; CHECK: f1:
+; CHECK: subs r0, r0, r2
+ %tmp = sub i64 %a, %b
+ ret i64 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-select.ll b/test/CodeGen/Thumb2/thumb2-select.ll
new file mode 100644
index 0000000..2dcf8aa
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-select.ll
@@ -0,0 +1,98 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a.s) {
+entry:
+; CHECK: f1:
+; CHECK: it eq
+; CHECK: moveq
+
+ %tmp = icmp eq i32 %a.s, 4
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f2(i32 %a.s) {
+entry:
+; CHECK: f2:
+; CHECK: it gt
+; CHECK: movgt
+ %tmp = icmp sgt i32 %a.s, 4
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f3(i32 %a.s, i32 %b.s) {
+entry:
+; CHECK: f3:
+; CHECK: it lt
+; CHECK: movlt
+ %tmp = icmp slt i32 %a.s, %b.s
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f4(i32 %a.s, i32 %b.s) {
+entry:
+; CHECK: f4:
+; CHECK: it le
+; CHECK: movle
+
+ %tmp = icmp sle i32 %a.s, %b.s
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f5(i32 %a.u, i32 %b.u) {
+entry:
+; CHECK: f5:
+; CHECK: it ls
+; CHECK: movls
+ %tmp = icmp ule i32 %a.u, %b.u
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f6(i32 %a.u, i32 %b.u) {
+entry:
+; CHECK: f6:
+; CHECK: it hi
+; CHECK: movhi
+ %tmp = icmp ugt i32 %a.u, %b.u
+ %tmp1.s = select i1 %tmp, i32 2, i32 3
+ ret i32 %tmp1.s
+}
+
+define i32 @f7(i32 %a, i32 %b, i32 %c) {
+entry:
+; CHECK: f7:
+; CHECK: it hi
+; CHECK: lsrhi.w
+ %tmp1 = icmp ugt i32 %a, %b
+ %tmp2 = udiv i32 %c, 3
+ %tmp3 = select i1 %tmp1, i32 %tmp2, i32 3
+ ret i32 %tmp3
+}
+
+define i32 @f8(i32 %a, i32 %b, i32 %c) {
+entry:
+; CHECK: f8:
+; CHECK: it lo
+; CHECK: lsllo.w
+ %tmp1 = icmp ult i32 %a, %b
+ %tmp2 = mul i32 %c, 4
+ %tmp3 = select i1 %tmp1, i32 %tmp2, i32 3
+ ret i32 %tmp3
+}
+
+define i32 @f9(i32 %a, i32 %b, i32 %c) {
+entry:
+; CHECK: f9:
+; CHECK: it ge
+; CHECK: rorge.w
+ %tmp1 = icmp sge i32 %a, %b
+ %tmp2 = shl i32 %c, 10
+ %tmp3 = lshr i32 %c, 22
+ %tmp4 = or i32 %tmp2, %tmp3
+ %tmp5 = select i1 %tmp1, i32 %tmp4, i32 3
+ ret i32 %tmp5
+}
diff --git a/test/CodeGen/Thumb2/thumb2-select_xform.ll b/test/CodeGen/Thumb2/thumb2-select_xform.ll
new file mode 100644
index 0000000..7fc2e2a
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-select_xform.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
+; CHECK: t1
+; CHECK: sub.w r0, r1, #-2147483648
+; CHECK: cmp r2, #10
+; CHECK: sub.w r0, r0, #1
+; CHECK: it gt
+; CHECK: movgt r0, r1
+ %tmp1 = icmp sgt i32 %c, 10
+ %tmp2 = select i1 %tmp1, i32 0, i32 2147483647
+ %tmp3 = add i32 %tmp2, %b
+ ret i32 %tmp3
+}
+
+define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind {
+; CHECK: t2
+; CHECK: add.w r0, r1, #-2147483648
+; CHECK: cmp r2, #10
+; CHECK: it gt
+; CHECK: movgt r0, r1
+
+ %tmp1 = icmp sgt i32 %c, 10
+ %tmp2 = select i1 %tmp1, i32 0, i32 2147483648
+ %tmp3 = add i32 %tmp2, %b
+ ret i32 %tmp3
+}
+
+define i32 @t3(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+; CHECK: t3
+; CHECK: sub.w r0, r1, #10
+; CHECK: cmp r2, #10
+; CHECK: it gt
+; CHECK: movgt r0, r1
+ %tmp1 = icmp sgt i32 %c, 10
+ %tmp2 = select i1 %tmp1, i32 0, i32 10
+ %tmp3 = sub i32 %b, %tmp2
+ ret i32 %tmp3
+}
diff --git a/test/CodeGen/Thumb2/thumb2-shifter.ll b/test/CodeGen/Thumb2/thumb2-shifter.ll
new file mode 100644
index 0000000..b106ced
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-shifter.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @t2ADDrs_lsl(i32 %X, i32 %Y) {
+; CHECK: t2ADDrs_lsl
+; CHECK: add.w r0, r0, r1, lsl #16
+ %A = shl i32 %Y, 16
+ %B = add i32 %X, %A
+ ret i32 %B
+}
+
+define i32 @t2ADDrs_lsr(i32 %X, i32 %Y) {
+; CHECK: t2ADDrs_lsr
+; CHECK: add.w r0, r0, r1, lsr #16
+ %A = lshr i32 %Y, 16
+ %B = add i32 %X, %A
+ ret i32 %B
+}
+
+define i32 @t2ADDrs_asr(i32 %X, i32 %Y) {
+; CHECK: t2ADDrs_asr
+; CHECK: add.w r0, r0, r1, asr #16
+ %A = ashr i32 %Y, 16
+ %B = add i32 %X, %A
+ ret i32 %B
+}
+
+; i32 ror(n) = (x >> n) | (x << (32 - n))
+define i32 @t2ADDrs_ror(i32 %X, i32 %Y) {
+; CHECK: t2ADDrs_ror
+; CHECK: add.w r0, r0, r1, ror #16
+ %A = lshr i32 %Y, 16
+ %B = shl i32 %Y, 16
+ %C = or i32 %B, %A
+ %R = add i32 %X, %C
+ ret i32 %R
+}
+
+define i32 @t2ADDrs_noRegShift(i32 %X, i32 %Y, i8 %sh) {
+; CHECK: t2ADDrs_noRegShift
+; CHECK: uxtb r2, r2
+; CHECK: lsls r1, r2
+; CHECK: add r0, r1
+ %shift.upgrd.1 = zext i8 %sh to i32
+ %A = shl i32 %Y, %shift.upgrd.1
+ %B = add i32 %X, %A
+ ret i32 %B
+}
+
diff --git a/test/CodeGen/Thumb2/thumb2-smla.ll b/test/CodeGen/Thumb2/thumb2-smla.ll
new file mode 100644
index 0000000..092ec27
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-smla.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f3(i32 %a, i16 %x, i32 %y) {
+; CHECK: f3
+; CHECK: smlabt r0, r1, r2, r0
+ %tmp = sext i16 %x to i32 ; <i32> [#uses=1]
+ %tmp2 = ashr i32 %y, 16 ; <i32> [#uses=1]
+ %tmp3 = mul i32 %tmp2, %tmp ; <i32> [#uses=1]
+ %tmp5 = add i32 %tmp3, %a ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
diff --git a/test/CodeGen/Thumb2/thumb2-smul.ll b/test/CodeGen/Thumb2/thumb2-smul.ll
new file mode 100644
index 0000000..16ea85d
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-smul.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+@x = weak global i16 0 ; <i16*> [#uses=1]
+@y = weak global i16 0 ; <i16*> [#uses=0]
+
+define i32 @f1(i32 %y) {
+; CHECK: f1
+; CHECK: smulbt r0, r1, r0
+ %tmp = load i16* @x ; <i16> [#uses=1]
+ %tmp1 = add i16 %tmp, 2 ; <i16> [#uses=1]
+ %tmp2 = sext i16 %tmp1 to i32 ; <i32> [#uses=1]
+ %tmp3 = ashr i32 %y, 16 ; <i32> [#uses=1]
+ %tmp4 = mul i32 %tmp2, %tmp3 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define i32 @f2(i32 %x, i32 %y) {
+; CHECK: f2
+; CHECK: smultt r0, r1, r0
+ %tmp1 = ashr i32 %x, 16 ; <i32> [#uses=1]
+ %tmp3 = ashr i32 %y, 16 ; <i32> [#uses=1]
+ %tmp4 = mul i32 %tmp3, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
diff --git a/test/CodeGen/Thumb2/thumb2-spill-q.ll b/test/CodeGen/Thumb2/thumb2-spill-q.ll
new file mode 100644
index 0000000..7935163
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-spill-q.ll
@@ -0,0 +1,58 @@
+; RUN: llc < %s -mtriple=thumbv7-elf -mattr=+neon | FileCheck %s
+; PR4789
+
+%bar = type { float, float, float }
+%baz = type { i32, [16 x %bar], [16 x float], [16 x i32], i8 }
+%foo = type { <4 x float> }
+%quux = type { i32 (...)**, %baz*, i32 }
+%quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo }
+
+declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
+
+define arm_apcscc void @aaa(%quuz* %this, i8* %block) {
+; CHECK: aaa:
+; CHECK: bic r4, r4, #15
+; CHECK: vst1.64 {{.*}}[r{{.*}}, :128]
+; CHECK: vld1.64 {{.*}}[r{{.*}}, :128]
+entry:
+ %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
+ store float 6.300000e+01, float* undef, align 4
+ %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
+ store float 0.000000e+00, float* undef, align 4
+ %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
+ %val173 = load <4 x float>* undef ; <<4 x float>> [#uses=1]
+ br label %bb4
+
+bb4: ; preds = %bb193, %entry
+ %besterror.0.2264 = phi <4 x float> [ undef, %entry ], [ %besterror.0.0, %bb193 ] ; <<4 x float>> [#uses=2]
+ %part0.0.0261 = phi <4 x float> [ zeroinitializer, %entry ], [ %23, %bb193 ] ; <<4 x float>> [#uses=2]
+ %3 = fmul <4 x float> zeroinitializer, %0 ; <<4 x float>> [#uses=2]
+ %4 = fadd <4 x float> %3, %part0.0.0261 ; <<4 x float>> [#uses=1]
+ %5 = shufflevector <4 x float> %3, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
+ %6 = shufflevector <2 x float> %5, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> ; <<4 x float>> [#uses=1]
+ %7 = fmul <4 x float> %1, undef ; <<4 x float>> [#uses=1]
+ %8 = fadd <4 x float> %7, <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01> ; <<4 x float>> [#uses=1]
+ %9 = fptosi <4 x float> %8 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %10 = sitofp <4 x i32> %9 to <4 x float> ; <<4 x float>> [#uses=1]
+ %11 = fmul <4 x float> %10, %2 ; <<4 x float>> [#uses=1]
+ %12 = fmul <4 x float> undef, %6 ; <<4 x float>> [#uses=1]
+ %13 = fmul <4 x float> %11, %4 ; <<4 x float>> [#uses=1]
+ %14 = fsub <4 x float> %12, %13 ; <<4 x float>> [#uses=1]
+ %15 = fsub <4 x float> %14, undef ; <<4 x float>> [#uses=1]
+ %16 = fmul <4 x float> %15, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00> ; <<4 x float>> [#uses=1]
+ %17 = fadd <4 x float> %16, undef ; <<4 x float>> [#uses=1]
+ %18 = fmul <4 x float> %17, %val173 ; <<4 x float>> [#uses=1]
+ %19 = shufflevector <4 x float> %18, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
+ %20 = shufflevector <2 x float> %19, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %21 = fadd <4 x float> zeroinitializer, %20 ; <<4 x float>> [#uses=2]
+ %22 = fcmp ogt <4 x float> %besterror.0.2264, %21 ; <<4 x i1>> [#uses=0]
+ br i1 undef, label %bb193, label %bb186
+
+bb186: ; preds = %bb4
+ br label %bb193
+
+bb193: ; preds = %bb186, %bb4
+ %besterror.0.0 = phi <4 x float> [ %21, %bb186 ], [ %besterror.0.2264, %bb4 ] ; <<4 x float>> [#uses=1]
+ %23 = fadd <4 x float> %part0.0.0261, zeroinitializer ; <<4 x float>> [#uses=1]
+ br label %bb4
+}
diff --git a/test/CodeGen/Thumb2/thumb2-str.ll b/test/CodeGen/Thumb2/thumb2-str.ll
new file mode 100644
index 0000000..3eeec8c
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-str.ll
@@ -0,0 +1,76 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32* %v) {
+; CHECK: f1:
+; CHECK: str r0, [r1]
+ store i32 %a, i32* %v
+ ret i32 %a
+}
+
+define i32 @f2(i32 %a, i32* %v) {
+; CHECK: f2:
+; CHECK: str.w r0, [r1, #+4092]
+ %tmp2 = getelementptr i32* %v, i32 1023
+ store i32 %a, i32* %tmp2
+ ret i32 %a
+}
+
+define i32 @f2a(i32 %a, i32* %v) {
+; CHECK: f2a:
+; CHECK: str r0, [r1, #-128]
+ %tmp2 = getelementptr i32* %v, i32 -32
+ store i32 %a, i32* %tmp2
+ ret i32 %a
+}
+
+define i32 @f3(i32 %a, i32* %v) {
+; CHECK: f3:
+; CHECK: mov.w r2, #4096
+; CHECK: str r0, [r1, r2]
+ %tmp2 = getelementptr i32* %v, i32 1024
+ store i32 %a, i32* %tmp2
+ ret i32 %a
+}
+
+define i32 @f4(i32 %a, i32 %base) {
+entry:
+; CHECK: f4:
+; CHECK: str r0, [r1, #-128]
+ %tmp1 = sub i32 %base, 128
+ %tmp2 = inttoptr i32 %tmp1 to i32*
+ store i32 %a, i32* %tmp2
+ ret i32 %a
+}
+
+define i32 @f5(i32 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f5:
+; CHECK: str r0, [r1, r2]
+ %tmp1 = add i32 %base, %offset
+ %tmp2 = inttoptr i32 %tmp1 to i32*
+ store i32 %a, i32* %tmp2
+ ret i32 %a
+}
+
+define i32 @f6(i32 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f6:
+; CHECK: str.w r0, [r1, r2, lsl #2]
+ %tmp1 = shl i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i32*
+ store i32 %a, i32* %tmp3
+ ret i32 %a
+}
+
+define i32 @f7(i32 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f7:
+; CHECK: lsrs r2, r2, #2
+; CHECK: str r0, [r1, r2]
+ %tmp1 = lshr i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i32*
+ store i32 %a, i32* %tmp3
+ ret i32 %a
+}
diff --git a/test/CodeGen/Thumb2/thumb2-str_post.ll b/test/CodeGen/Thumb2/thumb2-str_post.ll
new file mode 100644
index 0000000..bbfb447
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-str_post.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i16 @test1(i32* %X, i16* %A) {
+; CHECK: test1:
+; CHECK: strh {{.*}}[{{.*}}], #-4
+ %Y = load i32* %X ; <i32> [#uses=1]
+ %tmp1 = trunc i32 %Y to i16 ; <i16> [#uses=1]
+ store i16 %tmp1, i16* %A
+ %tmp2 = ptrtoint i16* %A to i16 ; <i16> [#uses=1]
+ %tmp3 = sub i16 %tmp2, 4 ; <i16> [#uses=1]
+ ret i16 %tmp3
+}
+
+define i32 @test2(i32* %X, i32* %A) {
+; CHECK: test2:
+; CHECK: str {{.*}}[{{.*}}],
+ %Y = load i32* %X ; <i32> [#uses=1]
+ store i32 %Y, i32* %A
+ %tmp1 = ptrtoint i32* %A to i32 ; <i32> [#uses=1]
+ %tmp2 = sub i32 %tmp1, 4 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
diff --git a/test/CodeGen/Thumb2/thumb2-str_pre.ll b/test/CodeGen/Thumb2/thumb2-str_pre.ll
new file mode 100644
index 0000000..9af960b
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-str_pre.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define void @test1(i32* %X, i32* %A, i32** %dest) {
+; CHECK: test1
+; CHECK: str r1, [r0, #+16]!
+ %B = load i32* %A ; <i32> [#uses=1]
+ %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2]
+ store i32 %B, i32* %Y
+ store i32* %Y, i32** %dest
+ ret void
+}
+
+define i16* @test2(i16* %X, i32* %A) {
+; CHECK: test2
+; CHECK: strh r1, [r0, #+8]!
+ %B = load i32* %A ; <i32> [#uses=1]
+ %Y = getelementptr i16* %X, i32 4 ; <i16*> [#uses=2]
+ %tmp = trunc i32 %B to i16 ; <i16> [#uses=1]
+ store i16 %tmp, i16* %Y
+ ret i16* %Y
+}
diff --git a/test/CodeGen/Thumb2/thumb2-strb.ll b/test/CodeGen/Thumb2/thumb2-strb.ll
new file mode 100644
index 0000000..1ebb938
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-strb.ll
@@ -0,0 +1,76 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i8 @f1(i8 %a, i8* %v) {
+; CHECK: f1:
+; CHECK: strb r0, [r1]
+ store i8 %a, i8* %v
+ ret i8 %a
+}
+
+define i8 @f2(i8 %a, i8* %v) {
+; CHECK: f2:
+; CHECK: strb.w r0, [r1, #+4092]
+ %tmp2 = getelementptr i8* %v, i32 4092
+ store i8 %a, i8* %tmp2
+ ret i8 %a
+}
+
+define i8 @f2a(i8 %a, i8* %v) {
+; CHECK: f2a:
+; CHECK: strb r0, [r1, #-128]
+ %tmp2 = getelementptr i8* %v, i32 -128
+ store i8 %a, i8* %tmp2
+ ret i8 %a
+}
+
+define i8 @f3(i8 %a, i8* %v) {
+; CHECK: f3:
+; CHECK: mov.w r2, #4096
+; CHECK: strb r0, [r1, r2]
+ %tmp2 = getelementptr i8* %v, i32 4096
+ store i8 %a, i8* %tmp2
+ ret i8 %a
+}
+
+define i8 @f4(i8 %a, i32 %base) {
+entry:
+; CHECK: f4:
+; CHECK: strb r0, [r1, #-128]
+ %tmp1 = sub i32 %base, 128
+ %tmp2 = inttoptr i32 %tmp1 to i8*
+ store i8 %a, i8* %tmp2
+ ret i8 %a
+}
+
+define i8 @f5(i8 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f5:
+; CHECK: strb r0, [r1, r2]
+ %tmp1 = add i32 %base, %offset
+ %tmp2 = inttoptr i32 %tmp1 to i8*
+ store i8 %a, i8* %tmp2
+ ret i8 %a
+}
+
+define i8 @f6(i8 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f6:
+; CHECK: strb.w r0, [r1, r2, lsl #2]
+ %tmp1 = shl i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i8*
+ store i8 %a, i8* %tmp3
+ ret i8 %a
+}
+
+define i8 @f7(i8 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f7:
+; CHECK: lsrs r2, r2, #2
+; CHECK: strb r0, [r1, r2]
+ %tmp1 = lshr i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i8*
+ store i8 %a, i8* %tmp3
+ ret i8 %a
+}
diff --git a/test/CodeGen/Thumb2/thumb2-strh.ll b/test/CodeGen/Thumb2/thumb2-strh.ll
new file mode 100644
index 0000000..b0eb8c1
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-strh.ll
@@ -0,0 +1,76 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i16 @f1(i16 %a, i16* %v) {
+; CHECK: f1:
+; CHECK: strh r0, [r1]
+ store i16 %a, i16* %v
+ ret i16 %a
+}
+
+define i16 @f2(i16 %a, i16* %v) {
+; CHECK: f2:
+; CHECK: strh.w r0, [r1, #+4092]
+ %tmp2 = getelementptr i16* %v, i32 2046
+ store i16 %a, i16* %tmp2
+ ret i16 %a
+}
+
+define i16 @f2a(i16 %a, i16* %v) {
+; CHECK: f2a:
+; CHECK: strh r0, [r1, #-128]
+ %tmp2 = getelementptr i16* %v, i32 -64
+ store i16 %a, i16* %tmp2
+ ret i16 %a
+}
+
+define i16 @f3(i16 %a, i16* %v) {
+; CHECK: f3:
+; CHECK: mov.w r2, #4096
+; CHECK: strh r0, [r1, r2]
+ %tmp2 = getelementptr i16* %v, i32 2048
+ store i16 %a, i16* %tmp2
+ ret i16 %a
+}
+
+define i16 @f4(i16 %a, i32 %base) {
+entry:
+; CHECK: f4:
+; CHECK: strh r0, [r1, #-128]
+ %tmp1 = sub i32 %base, 128
+ %tmp2 = inttoptr i32 %tmp1 to i16*
+ store i16 %a, i16* %tmp2
+ ret i16 %a
+}
+
+define i16 @f5(i16 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f5:
+; CHECK: strh r0, [r1, r2]
+ %tmp1 = add i32 %base, %offset
+ %tmp2 = inttoptr i32 %tmp1 to i16*
+ store i16 %a, i16* %tmp2
+ ret i16 %a
+}
+
+define i16 @f6(i16 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f6:
+; CHECK: strh.w r0, [r1, r2, lsl #2]
+ %tmp1 = shl i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i16*
+ store i16 %a, i16* %tmp3
+ ret i16 %a
+}
+
+define i16 @f7(i16 %a, i32 %base, i32 %offset) {
+entry:
+; CHECK: f7:
+; CHECK: lsrs r2, r2, #2
+; CHECK: strh r0, [r1, r2]
+ %tmp1 = lshr i32 %offset, 2
+ %tmp2 = add i32 %base, %tmp1
+ %tmp3 = inttoptr i32 %tmp2 to i16*
+ store i16 %a, i16* %tmp3
+ ret i16 %a
+}
diff --git a/test/CodeGen/Thumb2/thumb2-sub.ll b/test/CodeGen/Thumb2/thumb2-sub.ll
new file mode 100644
index 0000000..95335a2
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-sub.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+; 171 = 0x000000ab
+define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: subs r0, #171
+ %tmp = sub i32 %a, 171
+ ret i32 %tmp
+}
+
+; 1179666 = 0x00120012
+define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: sub.w r0, r0, #1179666
+ %tmp = sub i32 %a, 1179666
+ ret i32 %tmp
+}
+
+; 872428544 = 0x34003400
+define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: sub.w r0, r0, #872428544
+ %tmp = sub i32 %a, 872428544
+ ret i32 %tmp
+}
+
+; 1448498774 = 0x56565656
+define i32 @f4(i32 %a) {
+; CHECK: f4:
+; CHECK: sub.w r0, r0, #1448498774
+ %tmp = sub i32 %a, 1448498774
+ ret i32 %tmp
+}
+
+; 510 = 0x000001fe
+define i32 @f5(i32 %a) {
+; CHECK: f5:
+; CHECK: sub.w r0, r0, #510
+ %tmp = sub i32 %a, 510
+ ret i32 %tmp
+}
+
+; Don't change this to an add.
+define i32 @f6(i32 %a) {
+; CHECK: f6:
+; CHECK: subs r0, #1
+ %tmp = sub i32 %a, 1
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-sub2.ll b/test/CodeGen/Thumb2/thumb2-sub2.ll
new file mode 100644
index 0000000..bb99cbd
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-sub2.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a) {
+ %tmp = sub i32 %a, 4095
+ ret i32 %tmp
+}
+; CHECK: f1:
+; CHECK: subw r0, r0, #4095
diff --git a/test/CodeGen/Thumb2/thumb2-sub4.ll b/test/CodeGen/Thumb2/thumb2-sub4.ll
new file mode 100644
index 0000000..a040d17
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-sub4.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: subs r0, r0, r1
+ %tmp = sub i32 %a, %b
+ ret i32 %tmp
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: sub.w r0, r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp1 = sub i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: sub.w r0, r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp1 = sub i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: sub.w r0, r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp1 = sub i32 %a, %tmp
+ ret i32 %tmp1
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+; CHECK: f5:
+; CHECK: sub.w r0, r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = sub i32 %a, %tmp
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/Thumb2/thumb2-sub5.ll b/test/CodeGen/Thumb2/thumb2-sub5.ll
new file mode 100644
index 0000000..c3b56bc
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-sub5.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i64 @f1(i64 %a, i64 %b) {
+; CHECK: f1:
+; CHECK: subs r0, r0, r2
+; CHECK: sbcs r1, r3
+ %tmp = sub i64 %a, %b
+ ret i64 %tmp
+}
diff --git a/test/CodeGen/Thumb2/thumb2-sxt_rot.ll b/test/CodeGen/Thumb2/thumb2-sxt_rot.ll
new file mode 100644
index 0000000..054d5df
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-sxt_rot.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @test0(i8 %A) {
+; CHECK: test0
+; CHECK: sxtb r0, r0
+ %B = sext i8 %A to i32
+ ret i32 %B
+}
+
+define i8 @test1(i32 %A) signext {
+; CHECK: test1
+; CHECK: sxtb.w r0, r0, ror #8
+ %B = lshr i32 %A, 8
+ %C = shl i32 %A, 24
+ %D = or i32 %B, %C
+ %E = trunc i32 %D to i8
+ ret i8 %E
+}
+
+define i32 @test2(i32 %A, i32 %X) signext {
+; CHECK: test2
+; CHECK: lsrs r0, r0, #8
+; CHECK: sxtab r0, r1, r0
+ %B = lshr i32 %A, 8
+ %C = shl i32 %A, 24
+ %D = or i32 %B, %C
+ %E = trunc i32 %D to i8
+ %F = sext i8 %E to i32
+ %G = add i32 %F, %X
+ ret i32 %G
+}
diff --git a/test/CodeGen/Thumb2/thumb2-tbb.ll b/test/CodeGen/Thumb2/thumb2-tbb.ll
new file mode 100644
index 0000000..5dc3cc3
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-tbb.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s
+
+define void @bar(i32 %n.u) {
+entry:
+; CHECK: bar:
+; CHECK: tbb
+; CHECK: .align 1
+
+ switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ]
+bb:
+ tail call void(...)* @foo1()
+ ret void
+bb1:
+ tail call void(...)* @foo2()
+ ret void
+bb2:
+ tail call void(...)* @foo6()
+ ret void
+bb3:
+ tail call void(...)* @foo3()
+ ret void
+bb4:
+ tail call void(...)* @foo4()
+ ret void
+bb5:
+ tail call void(...)* @foo5()
+ ret void
+bb6:
+ tail call void(...)* @foo1()
+ ret void
+bb7:
+ tail call void(...)* @foo2()
+ ret void
+bb8:
+ tail call void(...)* @foo6()
+ ret void
+bb9:
+ tail call void(...)* @foo3()
+ ret void
+bb10:
+ tail call void(...)* @foo4()
+ ret void
+bb11:
+ tail call void(...)* @foo5()
+ ret void
+bb12:
+ tail call void(...)* @foo6()
+ ret void
+}
+
+declare void @foo1(...)
+declare void @foo2(...)
+declare void @foo6(...)
+declare void @foo3(...)
+declare void @foo4(...)
+declare void @foo5(...)
diff --git a/test/CodeGen/Thumb2/thumb2-tbh.ll b/test/CodeGen/Thumb2/thumb2-tbh.ll
new file mode 100644
index 0000000..2cf1d6a
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-tbh.ll
@@ -0,0 +1,84 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s
+
+; Thumb2 target should reorder the bb's in order to use tbb / tbh.
+
+ %struct.R_flstr = type { i32, i32, i8* }
+ %struct._T_tstr = type { i32, %struct.R_flstr*, %struct._T_tstr* }
+@_C_nextcmd = external global i32 ; <i32*> [#uses=3]
[email protected] = external constant [28 x i8], align 1 ; <[28 x i8]*> [#uses=1]
+@_T_gtol = external global %struct._T_tstr* ; <%struct._T_tstr**> [#uses=2]
+
+declare arm_apcscc i32 @strlen(i8* nocapture) nounwind readonly
+
+declare arm_apcscc void @Z_fatal(i8*) noreturn nounwind
+
+declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
+
+define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+; CHECK: main:
+; CHECK: tbb
+entry:
+ br label %bb42.i
+
+bb1.i2: ; preds = %bb42.i
+ br label %bb40.i
+
+bb5.i: ; preds = %bb42.i
+ %0 = or i32 %argc, 32 ; <i32> [#uses=1]
+ br label %bb40.i
+
+bb7.i: ; preds = %bb42.i
+ call arm_apcscc void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 0, i8* null) nounwind
+ unreachable
+
+bb15.i: ; preds = %bb42.i
+ call arm_apcscc void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 2, i8* null) nounwind
+ unreachable
+
+bb23.i: ; preds = %bb42.i
+ %1 = call arm_apcscc i32 @strlen(i8* null) nounwind readonly ; <i32> [#uses=0]
+ unreachable
+
+bb33.i: ; preds = %bb42.i
+ store i32 0, i32* @_C_nextcmd, align 4
+ %2 = call arm_apcscc noalias i8* @calloc(i32 21, i32 1) nounwind ; <i8*> [#uses=0]
+ unreachable
+
+bb34.i: ; preds = %bb42.i
+ %3 = load i32* @_C_nextcmd, align 4 ; <i32> [#uses=1]
+ %4 = add i32 %3, 1 ; <i32> [#uses=1]
+ store i32 %4, i32* @_C_nextcmd, align 4
+ %5 = call arm_apcscc noalias i8* @calloc(i32 22, i32 1) nounwind ; <i8*> [#uses=0]
+ unreachable
+
+bb35.i: ; preds = %bb42.i
+ %6 = call arm_apcscc noalias i8* @calloc(i32 20, i32 1) nounwind ; <i8*> [#uses=0]
+ unreachable
+
+bb37.i: ; preds = %bb42.i
+ %7 = call arm_apcscc noalias i8* @calloc(i32 14, i32 1) nounwind ; <i8*> [#uses=0]
+ unreachable
+
+bb39.i: ; preds = %bb42.i
+ call arm_apcscc void @Z_fatal(i8* getelementptr ([28 x i8]* @.str31, i32 0, i32 0)) nounwind
+ unreachable
+
+bb40.i: ; preds = %bb42.i, %bb5.i, %bb1.i2
+ br label %bb42.i
+
+bb42.i: ; preds = %bb40.i, %entry
+ switch i32 %argc, label %bb39.i [
+ i32 67, label %bb33.i
+ i32 70, label %bb35.i
+ i32 77, label %bb37.i
+ i32 83, label %bb34.i
+ i32 97, label %bb7.i
+ i32 100, label %bb5.i
+ i32 101, label %bb40.i
+ i32 102, label %bb23.i
+ i32 105, label %bb15.i
+ i32 116, label %bb1.i2
+ ]
+}
+
+declare arm_apcscc void @_T_addtol(%struct._T_tstr** nocapture, i32, i8*) nounwind
diff --git a/test/CodeGen/Thumb2/thumb2-teq.ll b/test/CodeGen/Thumb2/thumb2-teq.ll
new file mode 100644
index 0000000..69f0383
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-teq.ll
@@ -0,0 +1,93 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+
+; 0x000000bb = 187
+define i1 @f1(i32 %a) {
+ %tmp = xor i32 %a, 187
+ %tmp1 = icmp ne i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f1:
+; CHECK: teq.w r0, #187
+
+; 0x000000bb = 187
+define i1 @f2(i32 %a) {
+ %tmp = xor i32 %a, 187
+ %tmp1 = icmp eq i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f2:
+; CHECK: teq.w r0, #187
+
+; 0x00aa00aa = 11141290
+define i1 @f3(i32 %a) {
+ %tmp = xor i32 %a, 11141290
+ %tmp1 = icmp eq i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f3:
+; CHECK: teq.w r0, #11141290
+
+; 0x00aa00aa = 11141290
+define i1 @f4(i32 %a) {
+ %tmp = xor i32 %a, 11141290
+ %tmp1 = icmp ne i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f4:
+; CHECK: teq.w r0, #11141290
+
+; 0xcc00cc00 = 3422604288
+define i1 @f5(i32 %a) {
+ %tmp = xor i32 %a, 3422604288
+ %tmp1 = icmp ne i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f5:
+; CHECK: teq.w r0, #-872363008
+
+; 0xcc00cc00 = 3422604288
+define i1 @f6(i32 %a) {
+ %tmp = xor i32 %a, 3422604288
+ %tmp1 = icmp eq i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f6:
+; CHECK: teq.w r0, #-872363008
+
+; 0xdddddddd = 3722304989
+define i1 @f7(i32 %a) {
+ %tmp = xor i32 %a, 3722304989
+ %tmp1 = icmp eq i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f7:
+; CHECK: teq.w r0, #-572662307
+
+; 0xdddddddd = 3722304989
+define i1 @f8(i32 %a) {
+ %tmp = xor i32 %a, 3722304989
+ %tmp1 = icmp ne i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f8:
+; CHECK: teq.w r0, #-572662307
+
+; 0x00110000 = 1114112
+define i1 @f9(i32 %a) {
+ %tmp = xor i32 %a, 1114112
+ %tmp1 = icmp ne i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f9:
+; CHECK: teq.w r0, #1114112
+
+; 0x00110000 = 1114112
+define i1 @f10(i32 %a) {
+ %tmp = xor i32 %a, 1114112
+ %tmp1 = icmp eq i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f10:
+; CHECK: teq.w r0, #1114112
+
diff --git a/test/CodeGen/Thumb2/thumb2-teq2.ll b/test/CodeGen/Thumb2/thumb2-teq2.ll
new file mode 100644
index 0000000..0f122f2
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-teq2.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i1 @f1(i32 %a, i32 %b) {
+; CHECK: f1
+; CHECK: teq.w r0, r1
+ %tmp = xor i32 %a, %b
+ %tmp1 = icmp ne i32 %tmp, 0
+ ret i1 %tmp1
+}
+
+define i1 @f2(i32 %a, i32 %b) {
+; CHECK: f2
+; CHECK: teq.w r0, r1
+ %tmp = xor i32 %a, %b
+ %tmp1 = icmp eq i32 %tmp, 0
+ ret i1 %tmp1
+}
+
+define i1 @f3(i32 %a, i32 %b) {
+; CHECK: f3
+; CHECK: teq.w r0, r1
+ %tmp = xor i32 %a, %b
+ %tmp1 = icmp ne i32 0, %tmp
+ ret i1 %tmp1
+}
+
+define i1 @f4(i32 %a, i32 %b) {
+; CHECK: f4
+; CHECK: teq.w r0, r1
+ %tmp = xor i32 %a, %b
+ %tmp1 = icmp eq i32 0, %tmp
+ ret i1 %tmp1
+}
+
+define i1 @f6(i32 %a, i32 %b) {
+; CHECK: f6
+; CHECK: teq.w r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp1 = xor i32 %a, %tmp
+ %tmp2 = icmp eq i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @f7(i32 %a, i32 %b) {
+; CHECK: f7
+; CHECK: teq.w r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp1 = xor i32 %a, %tmp
+ %tmp2 = icmp eq i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @f8(i32 %a, i32 %b) {
+; CHECK: f8
+; CHECK: teq.w r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp1 = xor i32 %a, %tmp
+ %tmp2 = icmp eq i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @f9(i32 %a, i32 %b) {
+; CHECK: f9
+; CHECK: teq.w r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = xor i32 %a, %tmp
+ %tmp2 = icmp eq i32 %tmp1, 0
+ ret i1 %tmp2
+}
diff --git a/test/CodeGen/Thumb2/thumb2-tst.ll b/test/CodeGen/Thumb2/thumb2-tst.ll
new file mode 100644
index 0000000..d905217
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-tst.ll
@@ -0,0 +1,92 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+
+; 0x000000bb = 187
+define i1 @f1(i32 %a) {
+ %tmp = and i32 %a, 187
+ %tmp1 = icmp ne i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f1:
+; CHECK: tst.w r0, #187
+
+; 0x000000bb = 187
+define i1 @f2(i32 %a) {
+ %tmp = and i32 %a, 187
+ %tmp1 = icmp eq i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f2:
+; CHECK: tst.w r0, #187
+
+; 0x00aa00aa = 11141290
+define i1 @f3(i32 %a) {
+ %tmp = and i32 %a, 11141290
+ %tmp1 = icmp eq i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f3:
+; CHECK: tst.w r0, #11141290
+
+; 0x00aa00aa = 11141290
+define i1 @f4(i32 %a) {
+ %tmp = and i32 %a, 11141290
+ %tmp1 = icmp ne i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f4:
+; CHECK: tst.w r0, #11141290
+
+; 0xcc00cc00 = 3422604288
+define i1 @f5(i32 %a) {
+ %tmp = and i32 %a, 3422604288
+ %tmp1 = icmp ne i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f5:
+; CHECK: tst.w r0, #-872363008
+
+; 0xcc00cc00 = 3422604288
+define i1 @f6(i32 %a) {
+ %tmp = and i32 %a, 3422604288
+ %tmp1 = icmp eq i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f6:
+; CHECK: tst.w r0, #-872363008
+
+; 0xdddddddd = 3722304989
+define i1 @f7(i32 %a) {
+ %tmp = and i32 %a, 3722304989
+ %tmp1 = icmp eq i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f7:
+; CHECK: tst.w r0, #-572662307
+
+; 0xdddddddd = 3722304989
+define i1 @f8(i32 %a) {
+ %tmp = and i32 %a, 3722304989
+ %tmp1 = icmp ne i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f8:
+; CHECK: tst.w r0, #-572662307
+
+; 0x00110000 = 1114112
+define i1 @f9(i32 %a) {
+ %tmp = and i32 %a, 1114112
+ %tmp1 = icmp ne i32 %tmp, 0
+ ret i1 %tmp1
+}
+; CHECK: f9:
+; CHECK: tst.w r0, #1114112
+
+; 0x00110000 = 1114112
+define i1 @f10(i32 %a) {
+ %tmp = and i32 %a, 1114112
+ %tmp1 = icmp eq i32 0, %tmp
+ ret i1 %tmp1
+}
+; CHECK: f10:
+; CHECK: tst.w r0, #1114112
diff --git a/test/CodeGen/Thumb2/thumb2-tst2.ll b/test/CodeGen/Thumb2/thumb2-tst2.ll
new file mode 100644
index 0000000..db202dd
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-tst2.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i1 @f1(i32 %a, i32 %b) {
+; CHECK: f1:
+; CHECK: tst r0, r1
+ %tmp = and i32 %a, %b
+ %tmp1 = icmp ne i32 %tmp, 0
+ ret i1 %tmp1
+}
+
+define i1 @f2(i32 %a, i32 %b) {
+; CHECK: f2:
+; CHECK: tst r0, r1
+ %tmp = and i32 %a, %b
+ %tmp1 = icmp eq i32 %tmp, 0
+ ret i1 %tmp1
+}
+
+define i1 @f3(i32 %a, i32 %b) {
+; CHECK: f3:
+; CHECK: tst r0, r1
+ %tmp = and i32 %a, %b
+ %tmp1 = icmp ne i32 0, %tmp
+ ret i1 %tmp1
+}
+
+define i1 @f4(i32 %a, i32 %b) {
+; CHECK: f4:
+; CHECK: tst r0, r1
+ %tmp = and i32 %a, %b
+ %tmp1 = icmp eq i32 0, %tmp
+ ret i1 %tmp1
+}
+
+define i1 @f6(i32 %a, i32 %b) {
+; CHECK: f6:
+; CHECK: tst.w r0, r1, lsl #5
+ %tmp = shl i32 %b, 5
+ %tmp1 = and i32 %a, %tmp
+ %tmp2 = icmp eq i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @f7(i32 %a, i32 %b) {
+; CHECK: f7:
+; CHECK: tst.w r0, r1, lsr #6
+ %tmp = lshr i32 %b, 6
+ %tmp1 = and i32 %a, %tmp
+ %tmp2 = icmp eq i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @f8(i32 %a, i32 %b) {
+; CHECK: f8:
+; CHECK: tst.w r0, r1, asr #7
+ %tmp = ashr i32 %b, 7
+ %tmp1 = and i32 %a, %tmp
+ %tmp2 = icmp eq i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @f9(i32 %a, i32 %b) {
+; CHECK: f9:
+; CHECK: tst.w r0, r0, ror #8
+ %l8 = shl i32 %a, 24
+ %r8 = lshr i32 %a, 8
+ %tmp = or i32 %l8, %r8
+ %tmp1 = and i32 %a, %tmp
+ %tmp2 = icmp eq i32 %tmp1, 0
+ ret i1 %tmp2
+}
diff --git a/test/CodeGen/Thumb2/thumb2-uxt_rot.ll b/test/CodeGen/Thumb2/thumb2-uxt_rot.ll
new file mode 100644
index 0000000..75e1d70
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-uxt_rot.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i8 @test1(i32 %A.u) zeroext {
+; CHECK: test1
+; CHECK: uxtb r0, r0
+ %B.u = trunc i32 %A.u to i8
+ ret i8 %B.u
+}
+
+define i32 @test2(i32 %A.u, i32 %B.u) zeroext {
+; CHECK: test2
+; CHECK: uxtab r0, r0, r1
+ %C.u = trunc i32 %B.u to i8
+ %D.u = zext i8 %C.u to i32
+ %E.u = add i32 %A.u, %D.u
+ ret i32 %E.u
+}
+
+define i32 @test3(i32 %A.u) zeroext {
+; CHECK: test3
+; CHECK: uxth.w r0, r0, ror #8
+ %B.u = lshr i32 %A.u, 8
+ %C.u = shl i32 %A.u, 24
+ %D.u = or i32 %B.u, %C.u
+ %E.u = trunc i32 %D.u to i16
+ %F.u = zext i16 %E.u to i32
+ ret i32 %F.u
+}
diff --git a/test/CodeGen/Thumb2/thumb2-uxtb.ll b/test/CodeGen/Thumb2/thumb2-uxtb.ll
new file mode 100644
index 0000000..4e23f53
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-uxtb.ll
@@ -0,0 +1,98 @@
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
+define i32 @test1(i32 %x) {
+; CHECK: test1
+; CHECK: uxtb16.w r0, r0
+ %tmp1 = and i32 %x, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @test2(i32 %x) {
+; CHECK: test2
+; CHECK: uxtb16.w r0, r0, ror #8
+ %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test3(i32 %x) {
+; CHECK: test3
+; CHECK: uxtb16.w r0, r0, ror #8
+ %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test4(i32 %x) {
+; CHECK: test4
+; CHECK: uxtb16.w r0, r0, ror #8
+ %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
+ %tmp6 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test5(i32 %x) {
+; CHECK: test5
+; CHECK: uxtb16.w r0, r0, ror #8
+ %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test6(i32 %x) {
+; CHECK: test6
+; CHECK: uxtb16.w r0, r0, ror #16
+ %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test7(i32 %x) {
+; CHECK: test7
+; CHECK: uxtb16.w r0, r0, ror #16
+ %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test8(i32 %x) {
+; CHECK: test8
+; CHECK: uxtb16.w r0, r0, ror #24
+ %tmp1 = shl i32 %x, 8 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16711680 ; <i32> [#uses=1]
+ %tmp5 = lshr i32 %x, 24 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test9(i32 %x) {
+; CHECK: test9
+; CHECK: uxtb16.w r0, r0, ror #24
+ %tmp1 = lshr i32 %x, 24 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x, 8 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test10(i32 %p0) {
+; CHECK: test10
+; CHECK: mov.w r1, #16253176
+; CHECK: and.w r0, r1, r0, lsr #7
+; CHECK: lsrs r1, r0, #5
+; CHECK: uxtb16.w r1, r1
+; CHECK: orr.w r0, r1, r0
+
+ %tmp1 = lshr i32 %p0, 7 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 16253176 ; <i32> [#uses=2]
+ %tmp4 = lshr i32 %tmp2, 5 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 458759 ; <i32> [#uses=1]
+ %tmp7 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
diff --git a/test/CodeGen/Thumb2/tls1.ll b/test/CodeGen/Thumb2/tls1.ll
new file mode 100644
index 0000000..1e55557
--- /dev/null
+++ b/test/CodeGen/Thumb2/tls1.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi | \
+; RUN: grep {i(tpoff)}
+; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi | \
+; RUN: grep {__aeabi_read_tp}
+; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi \
+; RUN: -relocation-model=pic | grep {__tls_get_addr}
+
+
+@i = thread_local global i32 15 ; <i32*> [#uses=2]
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32* @g() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/Thumb2/tls2.ll b/test/CodeGen/Thumb2/tls2.ll
new file mode 100644
index 0000000..b8a0657
--- /dev/null
+++ b/test/CodeGen/Thumb2/tls2.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi | FileCheck %s -check-prefix=CHECK-NOT-PIC
+; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC
+
+@i = external thread_local global i32 ; <i32*> [#uses=2]
+
+define i32 @f() {
+entry:
+; CHECK-NOT-PIC: f:
+; CHECK-NOT-PIC: add r0, pc
+; CHECK-NOT-PIC: ldr r1, [r0]
+; CHECK-NOT-PIC: i(gottpoff)
+
+; CHECK-PIC: f:
+; CHECK-PIC: bl __tls_get_addr(PLT)
+ %tmp1 = load i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32* @g() {
+entry:
+; CHECK-NOT-PIC: g:
+; CHECK-NOT-PIC: add r0, pc
+; CHECK-NOT-PIC: ldr r1, [r0]
+; CHECK-NOT-PIC: i(gottpoff)
+
+; CHECK-PIC: g:
+; CHECK-PIC: bl __tls_get_addr(PLT)
+ ret i32* @i
+}
diff --git a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
new file mode 100644
index 0000000..2484860
--- /dev/null
+++ b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
@@ -0,0 +1,18 @@
+; The old instruction selector used to load all arguments to a call up in
+; registers, then start pushing them all onto the stack. This is bad news as
+; it makes a ton of annoying overlapping live ranges. This code should not
+; cause spills!
+;
+; RUN: llc < %s -march=x86 -stats |& not grep spilled
+
+target datalayout = "e-p:32:32"
+
+define i32 @test(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
+ ret i32 0
+}
+
+define i32 @main() {
+ %X = call i32 @test( i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll b/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll
new file mode 100644
index 0000000..5c40eeaa
--- /dev/null
+++ b/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86
+
+define i32 @test() {
+entry:
+ ret i32 7
+Test: ; No predecessors!
+ %A = call i32 @test( ) ; <i32> [#uses=1]
+ %B = call i32 @test( ) ; <i32> [#uses=1]
+ %C = add i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
+
diff --git a/test/CodeGen/X86/2003-11-03-GlobalBool.ll b/test/CodeGen/X86/2003-11-03-GlobalBool.ll
new file mode 100644
index 0000000..8b0a185
--- /dev/null
+++ b/test/CodeGen/X86/2003-11-03-GlobalBool.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -march=x86 | \
+; RUN: not grep {.byte\[\[:space:\]\]*true}
+
+@X = global i1 true ; <i1*> [#uses=0]
diff --git a/test/CodeGen/X86/2004-02-12-Memcpy.ll b/test/CodeGen/X86/2004-02-12-Memcpy.ll
new file mode 100644
index 0000000..f15a1b4
--- /dev/null
+++ b/test/CodeGen/X86/2004-02-12-Memcpy.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep movs | count 1
+
+@A = global [32 x i32] zeroinitializer
+@B = global [32 x i32] zeroinitializer
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+define void @main() nounwind {
+ ; dword copy
+ call void @llvm.memcpy.i32(i8* bitcast ([32 x i32]* @A to i8*),
+ i8* bitcast ([32 x i32]* @B to i8*),
+ i32 128, i32 4 )
+
+ ; word copy
+ call void @llvm.memcpy.i32( i8* bitcast ([32 x i32]* @A to i8*),
+ i8* bitcast ([32 x i32]* @B to i8*),
+ i32 128, i32 2 )
+
+ ; byte copy
+ call void @llvm.memcpy.i32( i8* bitcast ([32 x i32]* @A to i8*),
+ i8* bitcast ([32 x i32]* @B to i8*),
+ i32 128, i32 1 )
+
+ ret void
+}
diff --git a/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll b/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
new file mode 100644
index 0000000..fea2b54
--- /dev/null
+++ b/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 | grep {(%esp}
+; RUN: llc < %s -march=x86 | grep {pushl %ebp} | count 1
+; RUN: llc < %s -march=x86 | grep {popl %ebp} | count 1
+
+declare i8* @llvm.returnaddress(i32)
+
+declare i8* @llvm.frameaddress(i32)
+
+define i8* @test1() {
+ %X = call i8* @llvm.returnaddress( i32 0 ) ; <i8*> [#uses=1]
+ ret i8* %X
+}
+
+define i8* @test2() {
+ %X = call i8* @llvm.frameaddress( i32 0 ) ; <i8*> [#uses=1]
+ ret i8* %X
+}
+
diff --git a/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll b/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll
new file mode 100644
index 0000000..f986ebd
--- /dev/null
+++ b/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86 | grep -i ESP | not grep sub
+
+define i32 @test(i32 %X) {
+ ret i32 %X
+}
diff --git a/test/CodeGen/X86/2004-02-22-Casts.ll b/test/CodeGen/X86/2004-02-22-Casts.ll
new file mode 100644
index 0000000..dabf7d3
--- /dev/null
+++ b/test/CodeGen/X86/2004-02-22-Casts.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86
+define i1 @test1(double %X) {
+ %V = fcmp one double %X, 0.000000e+00 ; <i1> [#uses=1]
+ ret i1 %V
+}
+
+define double @test2(i64 %X) {
+ %V = uitofp i64 %X to double ; <double> [#uses=1]
+ ret double %V
+}
+
+
diff --git a/test/CodeGen/X86/2004-03-30-Select-Max.ll b/test/CodeGen/X86/2004-03-30-Select-Max.ll
new file mode 100644
index 0000000..b6631b6
--- /dev/null
+++ b/test/CodeGen/X86/2004-03-30-Select-Max.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | not grep {j\[lgbe\]}
+
+define i32 @max(i32 %A, i32 %B) {
+ %gt = icmp sgt i32 %A, %B ; <i1> [#uses=1]
+ %R = select i1 %gt, i32 %A, i32 %B ; <i32> [#uses=1]
+ ret i32 %R
+}
+
diff --git a/test/CodeGen/X86/2004-04-09-SameValueCoalescing.ll b/test/CodeGen/X86/2004-04-09-SameValueCoalescing.ll
new file mode 100644
index 0000000..c62fee1b
--- /dev/null
+++ b/test/CodeGen/X86/2004-04-09-SameValueCoalescing.ll
@@ -0,0 +1,13 @@
+; Linear scan does not currently coalesce any two variables that have
+; overlapping live intervals. When two overlapping intervals have the same
+; value, they can be joined though.
+;
+; RUN: llc < %s -march=x86 -regalloc=linearscan | \
+; RUN: not grep {mov %\[A-Z\]\\\{2,3\\\}, %\[A-Z\]\\\{2,3\\\}}
+
+define i64 @test(i64 %x) {
+entry:
+ %tmp.1 = mul i64 %x, 4294967297 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
diff --git a/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll b/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll
new file mode 100644
index 0000000..f8ed016
--- /dev/null
+++ b/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86
+
+define double @test(double %d) {
+ %X = select i1 false, double %d, double %d ; <double> [#uses=1]
+ ret double %X
+}
+
diff --git a/test/CodeGen/X86/2004-06-10-StackifierCrash.ll b/test/CodeGen/X86/2004-06-10-StackifierCrash.ll
new file mode 100644
index 0000000..036aa6a
--- /dev/null
+++ b/test/CodeGen/X86/2004-06-10-StackifierCrash.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86
+
+define i1 @T(double %X) {
+ %V = fcmp oeq double %X, %X ; <i1> [#uses=1]
+ ret i1 %V
+}
diff --git a/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll b/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll
new file mode 100644
index 0000000..db3af01
--- /dev/null
+++ b/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86
+
+define i1 @test(i1 %C, i1 %D, i32 %X, i32 %Y) {
+ %E = icmp slt i32 %X, %Y ; <i1> [#uses=1]
+ %F = select i1 %C, i1 %D, i1 %E ; <i1> [#uses=1]
+ ret i1 %F
+}
+
diff --git a/test/CodeGen/X86/2005-01-17-CycleInDAG.ll b/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
new file mode 100644
index 0000000..32fafc6
--- /dev/null
+++ b/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
@@ -0,0 +1,17 @@
+; This testcase was distilled from 132.ijpeg. Bsaically we cannot fold the
+; load into the sub instruction here as it induces a cycle in the dag, which
+; is invalid code (there is no correct way to order the instruction). Check
+; that we do not fold the load into the sub.
+
+; RUN: llc < %s -march=x86 | not grep sub.*GLOBAL
+
+@GLOBAL = external global i32 ; <i32*> [#uses=1]
+
+define i32 @test(i32* %P1, i32* %P2, i32* %P3) {
+ %L = load i32* @GLOBAL ; <i32> [#uses=1]
+ store i32 12, i32* %P2
+ %Y = load i32* %P3 ; <i32> [#uses=1]
+ %Z = sub i32 %Y, %L ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll b/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
new file mode 100644
index 0000000..30a6ac6
--- /dev/null
+++ b/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86 | not grep 18446744073709551612
+
+@A = external global i32 ; <i32*> [#uses=1]
+@Y = global i32* getelementptr (i32* @A, i32 -1) ; <i32**> [#uses=0]
+
diff --git a/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
new file mode 100644
index 0000000..5266009
--- /dev/null
+++ b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=x86 -mcpu=generic
+; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes.
+
+define void @radfg_() {
+entry:
+ br i1 false, label %no_exit.16.preheader, label %loopentry.0
+loopentry.0: ; preds = %entry
+ ret void
+no_exit.16.preheader: ; preds = %entry
+ br label %no_exit.16
+no_exit.16: ; preds = %no_exit.16, %no_exit.16.preheader
+ br i1 false, label %loopexit.16.loopexit, label %no_exit.16
+loopexit.16.loopexit: ; preds = %no_exit.16
+ br label %no_exit.18
+no_exit.18: ; preds = %loopexit.20, %loopexit.16.loopexit
+ %tmp.882 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=2]
+ br i1 false, label %loopexit.19, label %no_exit.19.preheader
+no_exit.19.preheader: ; preds = %no_exit.18
+ ret void
+loopexit.19: ; preds = %no_exit.18
+ br i1 false, label %loopexit.20, label %no_exit.20
+no_exit.20: ; preds = %loopexit.21, %loopexit.19
+ %ai2.1122.tmp.3 = phi float [ %tmp.958, %loopexit.21 ], [ %tmp.882, %loopexit.19 ] ; <float> [#uses=1]
+ %tmp.950 = fmul float %tmp.882, %ai2.1122.tmp.3 ; <float> [#uses=1]
+ %tmp.951 = fsub float 0.000000e+00, %tmp.950 ; <float> [#uses=1]
+ %tmp.958 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=1]
+ br i1 false, label %loopexit.21, label %no_exit.21.preheader
+no_exit.21.preheader: ; preds = %no_exit.20
+ ret void
+loopexit.21: ; preds = %no_exit.20
+ br i1 false, label %loopexit.20, label %no_exit.20
+loopexit.20: ; preds = %loopexit.21, %loopexit.19
+ %ar2.1124.tmp.2 = phi float [ 0.000000e+00, %loopexit.19 ], [ %tmp.951, %loopexit.21 ] ; <float> [#uses=0]
+ br i1 false, label %loopexit.18.loopexit, label %no_exit.18
+loopexit.18.loopexit: ; preds = %loopexit.20
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll b/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
new file mode 100644
index 0000000..d906da4
--- /dev/null
+++ b/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 | \
+; RUN: grep shld | count 1
+;
+; Check that the isel does not fold the shld, which already folds a load
+; and has two uses, into a store.
+
+@A = external global i32 ; <i32*> [#uses=2]
+
+define i32 @test5(i32 %B, i8 %C) {
+ %tmp.1 = load i32* @A ; <i32> [#uses=1]
+ %shift.upgrd.1 = zext i8 %C to i32 ; <i32> [#uses=1]
+ %tmp.2 = shl i32 %tmp.1, %shift.upgrd.1 ; <i32> [#uses=1]
+ %tmp.3 = sub i8 32, %C ; <i8> [#uses=1]
+ %shift.upgrd.2 = zext i8 %tmp.3 to i32 ; <i32> [#uses=1]
+ %tmp.4 = lshr i32 %B, %shift.upgrd.2 ; <i32> [#uses=1]
+ %tmp.5 = or i32 %tmp.4, %tmp.2 ; <i32> [#uses=2]
+ store i32 %tmp.5, i32* @A
+ ret i32 %tmp.5
+}
+
diff --git a/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
new file mode 100644
index 0000000..dc69ef8
--- /dev/null
+++ b/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 | not grep {subl.*%esp}
+
+define i32 @f(i32 %a, i32 %b) {
+ %tmp.2 = mul i32 %a, %a ; <i32> [#uses=1]
+ %tmp.5 = shl i32 %a, 1 ; <i32> [#uses=1]
+ %tmp.6 = mul i32 %tmp.5, %b ; <i32> [#uses=1]
+ %tmp.10 = mul i32 %b, %b ; <i32> [#uses=1]
+ %tmp.7 = add i32 %tmp.10, %tmp.2 ; <i32> [#uses=1]
+ %tmp.11 = add i32 %tmp.7, %tmp.6 ; <i32> [#uses=1]
+ ret i32 %tmp.11
+}
+
diff --git a/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
new file mode 100644
index 0000000..0421896
--- /dev/null
+++ b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -stats |& \
+; RUN: grep asm-printer | grep 7
+
+define i32 @g(i32 %a, i32 %b) nounwind {
+ %tmp.1 = shl i32 %b, 1 ; <i32> [#uses=1]
+ %tmp.3 = add i32 %tmp.1, %a ; <i32> [#uses=1]
+ %tmp.5 = mul i32 %tmp.3, %a ; <i32> [#uses=1]
+ %tmp.8 = mul i32 %b, %b ; <i32> [#uses=1]
+ %tmp.9 = add i32 %tmp.5, %tmp.8 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
+
diff --git a/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll b/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll
new file mode 100644
index 0000000..3f67097
--- /dev/null
+++ b/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah
+; END.
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8.6.1"
+ %struct.GLTColor4 = type { float, float, float, float }
+ %struct.GLTCoord3 = type { float, float, float }
+ %struct.__GLIContextRec = type { { %struct.anon, { [24 x [16 x float]], [24 x [16 x float]] }, %struct.GLTColor4, { float, float, float, float, %struct.GLTCoord3, float } }, { float, float, float, float, float, float, float, float, [4 x i32], [4 x i32], [4 x i32] } }
+ %struct.__GLvertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, i8, i8, i8, i8, [4 x float], [2 x i8*], i32, i32, [16 x %struct.GLTColor4] }
+ %struct.anon = type { float, float, float, float, float, float, float, float }
+
+declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
+
+declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)
+
+declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>)
+
+define void @gleLLVMVecInterpolateClip() {
+entry:
+ br i1 false, label %cond_false, label %cond_false183
+cond_false: ; preds = %entry
+ br i1 false, label %cond_false183, label %cond_true69
+cond_true69: ; preds = %cond_false
+ ret void
+cond_false183: ; preds = %cond_false, %entry
+ %vuizmsk.0.1 = phi <4 x i32> [ < i32 -1, i32 -1, i32 -1, i32 0 >, %entry ], [ < i32 -1, i32 0, i32 0, i32 0 >, %cond_false ] ; <<4 x i32>> [#uses=2]
+ %tmp192 = extractelement <4 x i32> %vuizmsk.0.1, i32 2 ; <i32> [#uses=1]
+ %tmp193 = extractelement <4 x i32> %vuizmsk.0.1, i32 3 ; <i32> [#uses=2]
+ %tmp195 = insertelement <4 x i32> zeroinitializer, i32 %tmp192, i32 1 ; <<4 x i32>> [#uses=1]
+ %tmp196 = insertelement <4 x i32> %tmp195, i32 %tmp193, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp197 = insertelement <4 x i32> %tmp196, i32 %tmp193, i32 3 ; <<4 x i32>> [#uses=1]
+ %tmp336 = and <4 x i32> zeroinitializer, %tmp197 ; <<4 x i32>> [#uses=1]
+ %tmp337 = bitcast <4 x i32> %tmp336 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp378 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp337, <4 x float> zeroinitializer, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp379 = bitcast <4 x float> %tmp378 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp388 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> zeroinitializer, <4 x i32> %tmp379 ) ; <<4 x i32>> [#uses=1]
+ %tmp392 = bitcast <8 x i16> %tmp388 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp399 = extractelement <8 x i16> %tmp392, i32 7 ; <i16> [#uses=1]
+ %tmp423 = insertelement <8 x i16> zeroinitializer, i16 %tmp399, i32 7 ; <<8 x i16>> [#uses=1]
+ %tmp427 = bitcast <8 x i16> %tmp423 to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %tmp428 = tail call i32 @llvm.x86.sse2.pmovmskb.128( <16 x i8> %tmp427 ) ; <i32> [#uses=1]
+ %tmp432 = trunc i32 %tmp428 to i8 ; <i8> [#uses=1]
+ %tmp = and i8 %tmp432, 42 ; <i8> [#uses=1]
+ %tmp436 = bitcast i8 %tmp to i8 ; <i8> [#uses=1]
+ %tmp446 = zext i8 %tmp436 to i32 ; <i32> [#uses=1]
+ %tmp447 = shl i32 %tmp446, 24 ; <i32> [#uses=1]
+ %tmp449 = or i32 0, %tmp447 ; <i32> [#uses=1]
+ store i32 %tmp449, i32* null
+ ret void
+}
diff --git a/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll b/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
new file mode 100644
index 0000000..8783a11
--- /dev/null
+++ b/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static > %t
+; RUN: grep {movl _last} %t | count 1
+; RUN: grep {cmpl.*_last} %t | count 1
+
+@block = external global i8* ; <i8**> [#uses=1]
+@last = external global i32 ; <i32*> [#uses=3]
+
+define i1 @loadAndRLEsource_no_exit_2E_1_label_2E_0(i32 %tmp.21.reload, i32 %tmp.8) {
+newFuncRoot:
+ br label %label.0
+label.0.no_exit.1_crit_edge.exitStub: ; preds = %label.0
+ ret i1 true
+codeRepl5.exitStub: ; preds = %label.0
+ ret i1 false
+label.0: ; preds = %newFuncRoot
+ %tmp.35 = load i32* @last ; <i32> [#uses=1]
+ %inc.1 = add i32 %tmp.35, 1 ; <i32> [#uses=2]
+ store i32 %inc.1, i32* @last
+ %tmp.36 = load i8** @block ; <i8*> [#uses=1]
+ %tmp.38 = getelementptr i8* %tmp.36, i32 %inc.1 ; <i8*> [#uses=1]
+ %tmp.40 = trunc i32 %tmp.21.reload to i8 ; <i8> [#uses=1]
+ store i8 %tmp.40, i8* %tmp.38
+ %tmp.910 = load i32* @last ; <i32> [#uses=1]
+ %tmp.1111 = icmp slt i32 %tmp.910, %tmp.8 ; <i1> [#uses=1]
+ %tmp.1412 = icmp ne i32 %tmp.21.reload, 257 ; <i1> [#uses=1]
+ %tmp.1613 = and i1 %tmp.1111, %tmp.1412 ; <i1> [#uses=1]
+ br i1 %tmp.1613, label %label.0.no_exit.1_crit_edge.exitStub, label %codeRepl5.exitStub
+}
+
diff --git a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
new file mode 100644
index 0000000..b045329
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
@@ -0,0 +1,76 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& \
+; RUN: not grep {Number of register spills}
+; END.
+
+
+define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) {
+ %tmp44 = load <4 x float>* %a ; <<4 x float>> [#uses=9]
+ %tmp46 = load <4 x float>* %b ; <<4 x float>> [#uses=1]
+ %tmp48 = load <4 x float>* %c ; <<4 x float>> [#uses=1]
+ %tmp50 = load <4 x float>* %d ; <<4 x float>> [#uses=1]
+ %tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
+ %tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp60 = xor <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ %tmp61 = bitcast <4 x i32> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp74 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp75 = bitcast <4 x float> %tmp74 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp88 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp89 = bitcast <4 x float> %tmp88 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp98 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp75, <4 x i32> %tmp89 ) ; <<4 x i32>> [#uses=1]
+ %tmp102 = bitcast <8 x i16> %tmp98 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp.upgrd.1 = shufflevector <8 x i16> %tmp102, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp105 = shufflevector <8 x i16> %tmp.upgrd.1, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp105.upgrd.2 = bitcast <8 x i16> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp105.upgrd.2, <4 x float>* %a
+ %tmp108 = bitcast <4 x float> %tmp46 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp109 = shufflevector <4 x i32> %tmp108, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
+ %tmp109.upgrd.3 = bitcast <4 x i32> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp119 = xor <4 x i32> %tmp109, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ %tmp120 = bitcast <4 x i32> %tmp119 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp133 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp109.upgrd.3, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp134 = bitcast <4 x float> %tmp133 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp147 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp148 = bitcast <4 x float> %tmp147 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp159 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp134, <4 x i32> %tmp148 ) ; <<4 x i32>> [#uses=1]
+ %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp166 = shufflevector <8 x i16> %tmp164, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp166.upgrd.4 = bitcast <8 x i16> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp166.upgrd.4, <4 x float>* %b
+ %tmp169 = bitcast <4 x float> %tmp48 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp170 = shufflevector <4 x i32> %tmp169, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
+ %tmp170.upgrd.5 = bitcast <4 x i32> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp180 = xor <4 x i32> %tmp170, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ %tmp181 = bitcast <4 x i32> %tmp180 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp194 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp170.upgrd.5, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp195 = bitcast <4 x float> %tmp194 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp208 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp181, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp209 = bitcast <4 x float> %tmp208 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp220 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp195, <4 x i32> %tmp209 ) ; <<4 x i32>> [#uses=1]
+ %tmp224 = bitcast <8 x i16> %tmp220 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp225 = shufflevector <8 x i16> %tmp224, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp227 = shufflevector <8 x i16> %tmp225, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp227.upgrd.6 = bitcast <8 x i16> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp227.upgrd.6, <4 x float>* %c
+ %tmp230 = bitcast <4 x float> %tmp50 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp231 = shufflevector <4 x i32> %tmp230, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
+ %tmp231.upgrd.7 = bitcast <4 x i32> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp241 = xor <4 x i32> %tmp231, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
+ %tmp242 = bitcast <4 x i32> %tmp241 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp255 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp231.upgrd.7, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp256 = bitcast <4 x float> %tmp255 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp269 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp242, i8 1 ) ; <<4 x float>> [#uses=1]
+ %tmp270 = bitcast <4 x float> %tmp269 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp281 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp256, <4 x i32> %tmp270 ) ; <<4 x i32>> [#uses=1]
+ %tmp285 = bitcast <8 x i16> %tmp281 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp286 = shufflevector <8 x i16> %tmp285, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp288 = shufflevector <8 x i16> %tmp286, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp288.upgrd.8 = bitcast <8 x i16> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp288.upgrd.8, <4 x float>* %d
+ ret i32 0
+}
+
+declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
+
+declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)
diff --git a/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/test/CodeGen/X86/2006-05-02-InstrSched1.ll
new file mode 100644
index 0000000..7d0a6ab
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-02-InstrSched1.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 -relocation-model=static -stats |& \
+; RUN: grep asm-printer | grep 14
+;
+@size20 = external global i32 ; <i32*> [#uses=1]
+@in5 = external global i8* ; <i8**> [#uses=1]
+
+define i32 @compare(i8* %a, i8* %b) nounwind {
+ %tmp = bitcast i8* %a to i32* ; <i32*> [#uses=1]
+ %tmp1 = bitcast i8* %b to i32* ; <i32*> [#uses=1]
+ %tmp.upgrd.1 = load i32* @size20 ; <i32> [#uses=1]
+ %tmp.upgrd.2 = load i8** @in5 ; <i8*> [#uses=2]
+ %tmp3 = load i32* %tmp1 ; <i32> [#uses=1]
+ %gep.upgrd.3 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
+ %tmp4 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; <i8*> [#uses=2]
+ %tmp7 = load i32* %tmp ; <i32> [#uses=1]
+ %gep.upgrd.4 = zext i32 %tmp7 to i64 ; <i64> [#uses=1]
+ %tmp8 = getelementptr i8* %tmp.upgrd.2, i64 %gep.upgrd.4 ; <i8*> [#uses=2]
+ %tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 ) ; <i32> [#uses=1]
+ ret i32 %tmp.upgrd.5
+}
+
+declare i32 @memcmp(i8*, i8*, i32)
+
diff --git a/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/test/CodeGen/X86/2006-05-02-InstrSched2.ll
new file mode 100644
index 0000000..23954d7
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-02-InstrSched2.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -stats |& \
+; RUN: grep asm-printer | grep 13
+
+define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {
+newFuncRoot:
+ br label %cond_true456.i
+bb459.i.exitStub: ; preds = %cond_true456.i
+ store i32 %tmp449.i, i32* %tmp449.i.out
+ ret void
+cond_true456.i: ; preds = %cond_true456.i, %newFuncRoot
+ %__s441.2.4.i = phi i8* [ %tmp451.i.upgrd.1, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; <i8*> [#uses=2]
+ %__h.2.4.i = phi i32 [ %tmp449.i, %cond_true456.i ], [ 0, %newFuncRoot ] ; <i32> [#uses=1]
+ %tmp446.i = mul i32 %__h.2.4.i, 5 ; <i32> [#uses=1]
+ %tmp.i = load i8* %__s441.2.4.i ; <i8> [#uses=1]
+ %tmp448.i = sext i8 %tmp.i to i32 ; <i32> [#uses=1]
+ %tmp449.i = add i32 %tmp448.i, %tmp446.i ; <i32> [#uses=2]
+ %tmp450.i = ptrtoint i8* %__s441.2.4.i to i32 ; <i32> [#uses=1]
+ %tmp451.i = add i32 %tmp450.i, 1 ; <i32> [#uses=1]
+ %tmp451.i.upgrd.1 = inttoptr i32 %tmp451.i to i8* ; <i8*> [#uses=2]
+ %tmp45435.i = load i8* %tmp451.i.upgrd.1 ; <i8> [#uses=1]
+ %tmp45536.i = icmp eq i8 %tmp45435.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp45536.i, label %bb459.i.exitStub, label %cond_true456.i
+}
+
diff --git a/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll b/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll
new file mode 100644
index 0000000..8421483
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll
@@ -0,0 +1,25 @@
+; Coalescing from R32 to a subset R32_. Once another register coalescer bug is
+; fixed, the movb should go away as well.
+
+; RUN: llc < %s -march=x86 -relocation-model=static | \
+; RUN: grep movl
+
+@B = external global i32 ; <i32*> [#uses=2]
+@C = external global i16* ; <i16**> [#uses=2]
+
+define void @test(i32 %A) {
+ %A.upgrd.1 = trunc i32 %A to i8 ; <i8> [#uses=1]
+ %tmp2 = load i32* @B ; <i32> [#uses=1]
+ %tmp3 = and i8 %A.upgrd.1, 16 ; <i8> [#uses=1]
+ %shift.upgrd.2 = zext i8 %tmp3 to i32 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %tmp2, %shift.upgrd.2 ; <i32> [#uses=1]
+ store i32 %tmp4, i32* @B
+ %tmp6 = lshr i32 %A, 3 ; <i32> [#uses=1]
+ %tmp = load i16** @C ; <i16*> [#uses=1]
+ %tmp8 = ptrtoint i16* %tmp to i32 ; <i32> [#uses=1]
+ %tmp9 = add i32 %tmp8, %tmp6 ; <i32> [#uses=1]
+ %tmp9.upgrd.3 = inttoptr i32 %tmp9 to i16* ; <i16*> [#uses=1]
+ store i16* %tmp9.upgrd.3, i16** @C
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2006-05-08-InstrSched.ll b/test/CodeGen/X86/2006-05-08-InstrSched.ll
new file mode 100644
index 0000000..d58d638
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-08-InstrSched.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -relocation-model=static | not grep {subl.*%esp}
+
+@A = external global i16* ; <i16**> [#uses=1]
+@B = external global i32 ; <i32*> [#uses=1]
+@C = external global i32 ; <i32*> [#uses=2]
+
+define void @test() {
+ %tmp = load i16** @A ; <i16*> [#uses=1]
+ %tmp1 = getelementptr i16* %tmp, i32 1 ; <i16*> [#uses=1]
+ %tmp.upgrd.1 = load i16* %tmp1 ; <i16> [#uses=1]
+ %tmp3 = zext i16 %tmp.upgrd.1 to i32 ; <i32> [#uses=1]
+ %tmp.upgrd.2 = load i32* @B ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp.upgrd.2, 16 ; <i32> [#uses=1]
+ %tmp5 = load i32* @C ; <i32> [#uses=1]
+ %tmp6 = trunc i32 %tmp4 to i8 ; <i8> [#uses=2]
+ %shift.upgrd.3 = zext i8 %tmp6 to i32 ; <i32> [#uses=1]
+ %tmp7 = shl i32 %tmp5, %shift.upgrd.3 ; <i32> [#uses=1]
+ %tmp9 = xor i8 %tmp6, 16 ; <i8> [#uses=1]
+ %shift.upgrd.4 = zext i8 %tmp9 to i32 ; <i32> [#uses=1]
+ %tmp11 = lshr i32 %tmp3, %shift.upgrd.4 ; <i32> [#uses=1]
+ %tmp12 = or i32 %tmp11, %tmp7 ; <i32> [#uses=1]
+ store i32 %tmp12, i32* @C
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll
new file mode 100644
index 0000000..bdbe713
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\
+; RUN: grep {asm-printer} | grep 31
+
+target datalayout = "e-p:32:32"
+define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind {
+entry:
+ %tmp9 = icmp slt i32 %M, 5 ; <i1> [#uses=1]
+ br i1 %tmp9, label %return, label %cond_true
+
+cond_true: ; preds = %cond_true, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %tmp. = shl i32 %indvar, 2 ; <i32> [#uses=1]
+ %tmp.10 = add nsw i32 %tmp., 1 ; <i32> [#uses=2]
+ %tmp31 = add nsw i32 %tmp.10, -1 ; <i32> [#uses=4]
+ %tmp32 = getelementptr i32* %mpp, i32 %tmp31 ; <i32*> [#uses=1]
+ %tmp34 = bitcast i32* %tmp32 to <16 x i8>* ; <i8*> [#uses=1]
+ %tmp = load <16 x i8>* %tmp34, align 1
+ %tmp42 = getelementptr i32* %tpmm, i32 %tmp31 ; <i32*> [#uses=1]
+ %tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %tmp46 = load <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1]
+ %tmp54 = bitcast <16 x i8> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp55 = add <4 x i32> %tmp54, %tmp46 ; <<4 x i32>> [#uses=2]
+ %tmp55.upgrd.2 = bitcast <4 x i32> %tmp55 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp62 = getelementptr i32* %ip, i32 %tmp31 ; <i32*> [#uses=1]
+ %tmp65 = bitcast i32* %tmp62 to <16 x i8>* ; <i8*> [#uses=1]
+ %tmp66 = load <16 x i8>* %tmp65, align 1
+ %tmp73 = getelementptr i32* %tpim, i32 %tmp31 ; <i32*> [#uses=1]
+ %tmp73.upgrd.3 = bitcast i32* %tmp73 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %tmp77 = load <4 x i32>* %tmp73.upgrd.3 ; <<4 x i32>> [#uses=1]
+ %tmp87 = bitcast <16 x i8> %tmp66 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp88 = add <4 x i32> %tmp87, %tmp77 ; <<4 x i32>> [#uses=2]
+ %tmp88.upgrd.4 = bitcast <4 x i32> %tmp88 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp99 = tail call <4 x i32> @llvm.x86.sse2.pcmpgt.d( <4 x i32> %tmp88, <4 x i32> %tmp55 ) ; <<4 x i32>> [#uses=1]
+ %tmp99.upgrd.5 = bitcast <4 x i32> %tmp99 to <2 x i64> ; <<2 x i64>> [#uses=2]
+ %tmp110 = xor <2 x i64> %tmp99.upgrd.5, < i64 -1, i64 -1 > ; <<2 x i64>> [#uses=1]
+ %tmp111 = and <2 x i64> %tmp110, %tmp55.upgrd.2 ; <<2 x i64>> [#uses=1]
+ %tmp121 = and <2 x i64> %tmp99.upgrd.5, %tmp88.upgrd.4 ; <<2 x i64>> [#uses=1]
+ %tmp131 = or <2 x i64> %tmp121, %tmp111 ; <<2 x i64>> [#uses=1]
+ %tmp137 = getelementptr i32* %mc, i32 %tmp.10 ; <i32*> [#uses=1]
+ %tmp137.upgrd.7 = bitcast i32* %tmp137 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> %tmp131, <2 x i64>* %tmp137.upgrd.7
+ %tmp147 = add nsw i32 %tmp.10, 8 ; <i32> [#uses=1]
+ %tmp.upgrd.8 = icmp slt i32 %tmp147, %M ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp.upgrd.8, label %cond_true, label %return
+
+return: ; preds = %cond_true, %entry
+ ret void
+}
+
+declare <4 x i32> @llvm.x86.sse2.pcmpgt.d(<4 x i32>, <4 x i32>)
diff --git a/test/CodeGen/X86/2006-05-17-VectorArg.ll b/test/CodeGen/X86/2006-05-17-VectorArg.ll
new file mode 100644
index 0000000..b36d61e
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-17-VectorArg.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define <4 x float> @opRSQ(<4 x float> %a) nounwind {
+entry:
+ %tmp2 = extractelement <4 x float> %a, i32 3 ; <float> [#uses=2]
+ %abscond = fcmp oge float %tmp2, -0.000000e+00 ; <i1> [#uses=1]
+ %abs = select i1 %abscond, float %tmp2, float 0.000000e+00 ; <float> [#uses=1]
+ %tmp3 = tail call float @llvm.sqrt.f32( float %abs ) ; <float> [#uses=1]
+ %tmp4 = fdiv float 1.000000e+00, %tmp3 ; <float> [#uses=1]
+ %tmp11 = insertelement <4 x float> zeroinitializer, float %tmp4, i32 3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp11
+}
+
+declare float @llvm.sqrt.f32(float)
+
diff --git a/test/CodeGen/X86/2006-05-22-FPSetEQ.ll b/test/CodeGen/X86/2006-05-22-FPSetEQ.ll
new file mode 100644
index 0000000..083d068
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-22-FPSetEQ.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 | grep setnp
+; RUN: llc < %s -march=x86 -enable-unsafe-fp-math | \
+; RUN: not grep setnp
+
+define i32 @test(float %f) {
+ %tmp = fcmp oeq float %f, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp.upgrd.1 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.upgrd.1
+}
+
diff --git a/test/CodeGen/X86/2006-05-25-CycleInDAG.ll b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
new file mode 100644
index 0000000..0288278
--- /dev/null
+++ b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86
+
+define i32 @test() {
+ br i1 false, label %cond_next33, label %cond_true12
+cond_true12: ; preds = %0
+ ret i32 0
+cond_next33: ; preds = %0
+ %tmp44.i = call double @foo( double 0.000000e+00, i32 32 ) ; <double> [#uses=1]
+ %tmp61.i = load i8* null ; <i8> [#uses=1]
+ %tmp61.i.upgrd.1 = zext i8 %tmp61.i to i32 ; <i32> [#uses=1]
+ %tmp58.i = or i32 0, %tmp61.i.upgrd.1 ; <i32> [#uses=1]
+ %tmp62.i = or i32 %tmp58.i, 0 ; <i32> [#uses=1]
+ %tmp62.i.upgrd.2 = sitofp i32 %tmp62.i to double ; <double> [#uses=1]
+ %tmp64.i = fadd double %tmp62.i.upgrd.2, %tmp44.i ; <double> [#uses=1]
+ %tmp68.i = call double @foo( double %tmp64.i, i32 0 ) ; <double> [#uses=0]
+ ret i32 0
+}
+
+declare double @foo(double, i32)
+
diff --git a/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll b/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
new file mode 100644
index 0000000..4ea364d
--- /dev/null
+++ b/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86
+; PR825
+
+define i64 @test() {
+ %tmp.i5 = call i64 asm sideeffect "rdtsc", "=A,~{dirflag},~{fpsr},~{flags}"( ) ; <i64> [#uses=1]
+ ret i64 %tmp.i5
+}
+
diff --git a/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll b/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
new file mode 100644
index 0000000..568fbbc
--- /dev/null
+++ b/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86
+; PR828
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define void @_ZN5() {
+cond_true9:
+ %tmp3.i.i = call i32 asm sideeffect "lock; cmpxchg $1,$2", "={ax},q,m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( i32 0, i32* null, i32 0 ) ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2006-07-19-ATTAsm.ll b/test/CodeGen/X86/2006-07-19-ATTAsm.ll
new file mode 100644
index 0000000..c8fd10f
--- /dev/null
+++ b/test/CodeGen/X86/2006-07-19-ATTAsm.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att
+; PR834
+; END.
+
+target datalayout = "e-p:32:32"
+target triple = "i386-unknown-freebsd6.1"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
+ %llvm.dbg.global_variable.type = type { i32, { }*, { }*, i8*, i8 *, i8*, { }*, i32, { }*, i1, i1, { }* }
+@x = global i32 0 ; <i32*> [#uses=1]
[email protected]_variable = internal constant %llvm.dbg.global_variable.type {
+ i32 327732,
+ { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.global_variables to { }*),
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i8* getelementptr ([2 x i8]* @str, i64 0, i64 0),
+ i8* getelementptr ([2 x i8]* @str, i64 0, i64 0),
+ i8* null,
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i32 1,
+ { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*),
+ i1 false,
+ i1 true,
+ { }* bitcast (i32* @x to { }*) }, section "llvm.metadata" ; <%llvm.dbg.global_variable.type*> [#uses=0]
[email protected]_variables = linkonce constant %llvm.dbg.anchor.type { i32 327680, i32 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type {
+ i32 327697,
+ { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*),
+ i32 4,
+ i8* getelementptr ([10 x i8]* @str1, i64 0, i64 0),
+ i8* getelementptr ([32 x i8]* @str2, i64 0, i64 0),
+ i8* getelementptr ([45 x i8]* @str3, i64 0, i64 0) }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 327680, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
+@str1 = internal constant [10 x i8] c"testb.cpp\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
+@str2 = internal constant [32 x i8] c"/Sources/Projects/DwarfTesting/\00", section "llvm.metadata" ; <[32 x i8]*> [#uses=1]
+@str3 = internal constant [45 x i8] c"4.0.1 LLVM (Apple Computer, Inc. build 5400)\00", section "llvm.metadata" ; <[45 x i8]*> [#uses=1]
+@str = internal constant [2 x i8] c"x\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type {
+ i32 327716,
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i8* getelementptr ([4 x i8]* @str4, i64 0, i64 0),
+ { }* null,
+ i32 0,
+ i64 32,
+ i64 32,
+ i64 0,
+ i32 0,
+ i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
+@str4 = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
diff --git a/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/test/CodeGen/X86/2006-07-20-InlineAsm.ll
new file mode 100644
index 0000000..cac47cd
--- /dev/null
+++ b/test/CodeGen/X86/2006-07-20-InlineAsm.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86
+; PR833
+
+@G = weak global i32 0 ; <i32*> [#uses=3]
+
+define i32 @foo(i32 %X) {
+entry:
+ %X_addr = alloca i32 ; <i32*> [#uses=3]
+ store i32 %X, i32* %X_addr
+ call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,m,1,~{dirflag},~{fpsr},~{flags}"( i32* @G, i32* %X_addr, i32* @G, i32 %X )
+ %tmp1 = load i32* %X_addr ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @foo2(i32 %X) {
+entry:
+ %X_addr = alloca i32 ; <i32*> [#uses=3]
+ store i32 %X, i32* %X_addr
+ call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,1,~{dirflag},~{fpsr},~{flags}"( i32* @G, i32* %X_addr, i32 %X )
+ %tmp1 = load i32* %X_addr ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
diff --git a/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll b/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll
new file mode 100644
index 0000000..deae086
--- /dev/null
+++ b/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86 | grep -- 4294967240
+; PR853
+
+@X = global i32* inttoptr (i64 -56 to i32*) ; <i32**> [#uses=0]
+
diff --git a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
new file mode 100644
index 0000000..3159cec
--- /dev/null
+++ b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
@@ -0,0 +1,10 @@
+; PR850
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att > %t
+; RUN: grep {movl 4(%eax),%ebp} %t
+; RUN: grep {movl 0(%eax), %ebx} %t
+
+define i32 @foo(i32 %__s.i.i, i32 %tmp5.i.i, i32 %tmp6.i.i, i32 %tmp7.i.i, i32 %tmp8.i.i) {
+ %tmp9.i.i = call i32 asm sideeffect "push %ebp\0Apush %ebx\0Amovl 4($2),%ebp\0Amovl 0($2), %ebx\0Amovl $1,%eax\0Aint $$0x80\0Apop %ebx\0Apop %ebp", "={ax},i,0,{cx},{dx},{si},{di}"( i32 192, i32 %__s.i.i, i32 %tmp5.i.i, i32 %tmp6.i.i, i32 %tmp7.i.i, i32 %tmp8.i.i ) ; <i32> [#uses=1]
+ ret i32 %tmp9.i.i
+}
+
diff --git a/test/CodeGen/X86/2006-08-07-CycleInDAG.ll b/test/CodeGen/X86/2006-08-07-CycleInDAG.ll
new file mode 100644
index 0000000..aea707e
--- /dev/null
+++ b/test/CodeGen/X86/2006-08-07-CycleInDAG.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+ %struct.foo = type opaque
+
+define fastcc i32 @test(%struct.foo* %v, %struct.foo* %vi) {
+ br i1 false, label %ilog2.exit, label %cond_true.i
+
+cond_true.i: ; preds = %0
+ ret i32 0
+
+ilog2.exit: ; preds = %0
+ %tmp24.i = load i32* null ; <i32> [#uses=1]
+ %tmp13.i12.i = tail call double @ldexp( double 0.000000e+00, i32 0 ) ; <double> [#uses=1]
+ %tmp13.i13.i = fptrunc double %tmp13.i12.i to float ; <float> [#uses=1]
+ %tmp11.s = load i32* null ; <i32> [#uses=1]
+ %tmp11.i = bitcast i32 %tmp11.s to i32 ; <i32> [#uses=1]
+ %n.i = bitcast i32 %tmp24.i to i32 ; <i32> [#uses=1]
+ %tmp13.i7 = mul i32 %tmp11.i, %n.i ; <i32> [#uses=1]
+ %tmp.i8 = tail call i8* @calloc( i32 %tmp13.i7, i32 4 ) ; <i8*> [#uses=0]
+ br i1 false, label %bb224.preheader.i, label %bb.i
+
+bb.i: ; preds = %ilog2.exit
+ ret i32 0
+
+bb224.preheader.i: ; preds = %ilog2.exit
+ %tmp165.i = fpext float %tmp13.i13.i to double ; <double> [#uses=0]
+ ret i32 0
+}
+
+declare i8* @calloc(i32, i32)
+
+declare double @ldexp(double, i32)
diff --git a/test/CodeGen/X86/2006-08-16-CycleInDAG.ll b/test/CodeGen/X86/2006-08-16-CycleInDAG.ll
new file mode 100644
index 0000000..5fee326
--- /dev/null
+++ b/test/CodeGen/X86/2006-08-16-CycleInDAG.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86
+ %struct.expr = type { %struct.rtx_def*, i32, %struct.expr*, %struct.occr*, %struct.occr*, %struct.rtx_def* }
+ %struct.hash_table = type { %struct.expr**, i32, i32, i32 }
+ %struct.occr = type { %struct.occr*, %struct.rtx_def*, i8, i8 }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.u = type { [1 x i64] }
+
+define void @test() {
+ %tmp = load i32* null ; <i32> [#uses=1]
+ %tmp8 = call i32 @hash_rtx( ) ; <i32> [#uses=1]
+ %tmp11 = urem i32 %tmp8, %tmp ; <i32> [#uses=1]
+ br i1 false, label %cond_next, label %return
+
+cond_next: ; preds = %0
+ %gep.upgrd.1 = zext i32 %tmp11 to i64 ; <i64> [#uses=1]
+ %tmp17 = getelementptr %struct.expr** null, i64 %gep.upgrd.1 ; <%struct.expr**> [#uses=0]
+ ret void
+
+return: ; preds = %0
+ ret void
+}
+
+declare i32 @hash_rtx()
diff --git a/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll b/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll
new file mode 100644
index 0000000..a19d8f7
--- /dev/null
+++ b/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -mcpu=i386 | \
+; RUN: not grep {movl %eax, %edx}
+
+define i32 @foo(i32 %t, i32 %C) {
+entry:
+ br label %cond_true
+
+cond_true: ; preds = %cond_true, %entry
+ %t_addr.0.0 = phi i32 [ %t, %entry ], [ %tmp7, %cond_true ] ; <i32> [#uses=2]
+ %tmp7 = add i32 %t_addr.0.0, 1 ; <i32> [#uses=1]
+ %tmp = icmp sgt i32 %C, 39 ; <i1> [#uses=1]
+ br i1 %tmp, label %bb12, label %cond_true
+
+bb12: ; preds = %cond_true
+ ret i32 %t_addr.0.0
+}
+
diff --git a/test/CodeGen/X86/2006-09-01-CycleInDAG.ll b/test/CodeGen/X86/2006-09-01-CycleInDAG.ll
new file mode 100644
index 0000000..1e890bb
--- /dev/null
+++ b/test/CodeGen/X86/2006-09-01-CycleInDAG.ll
@@ -0,0 +1,131 @@
+; RUN: llc < %s -march=x86
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8"
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct._var_map = type { %struct.partition_def*, i32*, i32*, %struct.tree_node**, i32, i32, i32* }
+ %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 }
+ %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* }
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_iterator = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, i32 }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.block_stmt_iterator = type { %struct.tree_stmt_iterator, %struct.basic_block_def* }
+ %struct.coalesce_list_d = type { %struct._var_map*, %struct.partition_pair_d**, i1 }
+ %struct.conflict_graph_def = type opaque
+ %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] }
+ %struct.def_operand_ptr = type { %struct.tree_node** }
+ %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+ %struct.die_struct = type opaque
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.__sbuf*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_iterator = type { i32, %struct.VEC_edge** }
+ %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.elt_list = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.__sbuf, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i1, i1, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.__sbuf, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.ht_identifier = type { i8*, i32, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.lang_type = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.loop = type opaque
+ %struct.machine_function = type { i32, i32, i8*, i32, i32 }
+ %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.partition_def = type { i32, [1 x %struct.partition_elem] }
+ %struct.partition_elem = type { i32, %struct.partition_elem*, i32 }
+ %struct.partition_pair_d = type { i32, i32, i32, %struct.partition_pair_d* }
+ %struct.phi_arg_d = type { %struct.tree_node*, i1 }
+ %struct.pointer_set_t = type opaque
+ %struct.ptr_info_def = type { i8, %struct.bitmap_head_def*, %struct.tree_node* }
+ %struct.real_value = type opaque
+ %struct.reg_info_def = type opaque
+ %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 }
+ %struct.rtvec_def = type opaque
+ %struct.rtx_def = type opaque
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.simple_bitmap_def = type { i32, i32, i32, [1 x i64] }
+ %struct.ssa_op_iter = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.stmt_operands_d*, i1 }
+ %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 }
+ %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* }
+ %struct.temp_slot = type opaque
+ %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* }
+ %struct.tree_ann_d = type { %struct.stmt_ann_d }
+ %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree }
+ %struct.tree_block = type { %struct.tree_common, i8, [3 x i8], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl = type { %struct.tree_common, %struct.__sbuf, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u1_a = type { i32 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_exp = type { %struct.tree_common, %struct.__sbuf*, i32, %struct.tree_node*, [1 x %struct.tree_node*] }
+ %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
+ %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi }
+ %struct.tree_int_cst_lowhi = type { i64, i64 }
+ %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_live_info_d = type { %struct._var_map*, %struct.bitmap_head_def*, %struct.bitmap_head_def**, i32, %struct.bitmap_head_def** }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.tree_partition_associator_d = type { %struct.varray_head_tag*, %struct.varray_head_tag*, i32*, i32*, i32, i32, %struct._var_map* }
+ %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] }
+ %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* }
+ %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* }
+ %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* }
+ %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* }
+ %struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* }
+ %struct.tree_string = type { %struct.tree_common, i32, [1 x i8] }
+ %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_decl_u1_a, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* }
+ %struct.tree_type_symtab = type { i32 }
+ %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 }
+ %struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] }
+ %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* }
+ %struct.use_operand_ptr = type { %struct.tree_node** }
+ %struct.use_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+ %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* }
+ %struct.v_may_def_optype_d = type { i32, [1 x %struct.v_def_use_operand_type_t] }
+ %struct.v_must_def_optype_d = type { i32, [1 x %struct.v_def_use_operand_type_t] }
+ %struct.value_set = type opaque
+ %struct.var_ann_d = type { %struct.tree_ann_common_d, i8, i8, %struct.tree_node*, %struct.varray_head_tag*, i32, i32, i32, %struct.tree_node*, %struct.tree_node* }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_data = type { [1 x i64] }
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.varray_data }
+ %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] }
+@basic_block_info = external global %struct.varray_head_tag* ; <%struct.varray_head_tag**> [#uses=1]
+
+define void @calculate_live_on_entry_cond_true3632(%struct.varray_head_tag* %stack3023.6, i32* %tmp3629, %struct.VEC_edge*** %tmp3397.out) {
+newFuncRoot:
+ br label %cond_true3632
+
+bb3502.exitStub: ; preds = %cond_true3632
+ store %struct.VEC_edge** %tmp3397, %struct.VEC_edge*** %tmp3397.out
+ ret void
+
+cond_true3632: ; preds = %newFuncRoot
+ %tmp3378 = load i32* %tmp3629 ; <i32> [#uses=1]
+ %tmp3379 = add i32 %tmp3378, -1 ; <i32> [#uses=1]
+ %tmp3381 = getelementptr %struct.varray_head_tag* %stack3023.6, i32 0, i32 4 ; <%struct.varray_data*> [#uses=1]
+ %tmp3382 = bitcast %struct.varray_data* %tmp3381 to [1 x i32]* ; <[1 x i32]*> [#uses=1]
+ %gep.upgrd.1 = zext i32 %tmp3379 to i64 ; <i64> [#uses=1]
+ %tmp3383 = getelementptr [1 x i32]* %tmp3382, i32 0, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ %tmp3384 = load i32* %tmp3383 ; <i32> [#uses=1]
+ %tmp3387 = load i32* %tmp3629 ; <i32> [#uses=1]
+ %tmp3388 = add i32 %tmp3387, -1 ; <i32> [#uses=1]
+ store i32 %tmp3388, i32* %tmp3629
+ %tmp3391 = load %struct.varray_head_tag** @basic_block_info ; <%struct.varray_head_tag*> [#uses=1]
+ %tmp3393 = getelementptr %struct.varray_head_tag* %tmp3391, i32 0, i32 4 ; <%struct.varray_data*> [#uses=1]
+ %tmp3394 = bitcast %struct.varray_data* %tmp3393 to [1 x %struct.basic_block_def*]* ; <[1 x %struct.basic_block_def*]*> [#uses=1]
+ %tmp3395 = getelementptr [1 x %struct.basic_block_def*]* %tmp3394, i32 0, i32 %tmp3384 ; <%struct.basic_block_def**> [#uses=1]
+ %tmp3396 = load %struct.basic_block_def** %tmp3395 ; <%struct.basic_block_def*> [#uses=1]
+ %tmp3397 = getelementptr %struct.basic_block_def* %tmp3396, i32 0, i32 3 ; <%struct.VEC_edge**> [#uses=1]
+ br label %bb3502.exitStub
+}
diff --git a/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll b/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
new file mode 100644
index 0000000..795d464
--- /dev/null
+++ b/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s
+; PR933
+
+define fastcc i1 @test() {
+ ret i1 true
+}
+
diff --git a/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll
new file mode 100644
index 0000000..bf9fa57
--- /dev/null
+++ b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=sse | grep movaps
+; Test that the load is NOT folded into the intrinsic, which would zero the top
+; elts of the loaded vector.
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8.7.2"
+
+define <4 x float> @test(<4 x float> %A, <4 x float>* %B) {
+ %BV = load <4 x float>* %B ; <<4 x float>> [#uses=1]
+ %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %A, <4 x float> %BV ) ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp28
+}
+
+declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
+
diff --git a/test/CodeGen/X86/2006-10-09-CycleInDAG.ll b/test/CodeGen/X86/2006-10-09-CycleInDAG.ll
new file mode 100644
index 0000000..fbb14ee
--- /dev/null
+++ b/test/CodeGen/X86/2006-10-09-CycleInDAG.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86
+
+define void @_ZN13QFSFileEngine4readEPcx() {
+ %tmp201 = load i32* null ; <i32> [#uses=1]
+ %tmp201.upgrd.1 = sext i32 %tmp201 to i64 ; <i64> [#uses=1]
+ %tmp202 = load i64* null ; <i64> [#uses=1]
+ %tmp203 = add i64 %tmp201.upgrd.1, %tmp202 ; <i64> [#uses=1]
+ store i64 %tmp203, i64* null
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll b/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll
new file mode 100644
index 0000000..b1f0451
--- /dev/null
+++ b/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86 | grep shrl
+; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31
+; is then optimized away.
+@tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
+
+define void @copy_if_shared_r() {
+ %tmp = load i32* null ; <i32> [#uses=1]
+ %tmp56 = and i32 %tmp, 255 ; <i32> [#uses=1]
+ %gep.upgrd.1 = zext i32 %tmp56 to i64 ; <i64> [#uses=1]
+ %tmp8 = getelementptr [0 x i32]* @tree_code_type, i32 0, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ %tmp9 = load i32* %tmp8 ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, -1 ; <i32> [#uses=1]
+ %tmp.upgrd.2 = icmp ugt i32 %tmp10, 2 ; <i1> [#uses=1]
+ %tmp14 = load i32* null ; <i32> [#uses=1]
+ %tmp15 = lshr i32 %tmp14, 31 ; <i32> [#uses=1]
+ %tmp15.upgrd.3 = trunc i32 %tmp15 to i8 ; <i8> [#uses=1]
+ %tmp16 = icmp ne i8 %tmp15.upgrd.3, 0 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.2, label %cond_false25, label %cond_true
+cond_true: ; preds = %0
+ br i1 %tmp16, label %cond_true17, label %cond_false
+cond_true17: ; preds = %cond_true
+ ret void
+cond_false: ; preds = %cond_true
+ ret void
+cond_false25: ; preds = %0
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2006-10-12-CycleInDAG.ll b/test/CodeGen/X86/2006-10-12-CycleInDAG.ll
new file mode 100644
index 0000000..3b987ac
--- /dev/null
+++ b/test/CodeGen/X86/2006-10-12-CycleInDAG.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=x86
+ %struct.function = type opaque
+ %struct.lang_decl = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.rtx_def = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %union.tree_ann_d = type opaque
+
+define void @check_format_arg() {
+ br i1 false, label %cond_next196, label %bb12.preheader
+
+bb12.preheader: ; preds = %0
+ ret void
+
+cond_next196: ; preds = %0
+ br i1 false, label %cond_next330, label %cond_true304
+
+cond_true304: ; preds = %cond_next196
+ ret void
+
+cond_next330: ; preds = %cond_next196
+ br i1 false, label %cond_next472, label %bb441
+
+bb441: ; preds = %cond_next330
+ ret void
+
+cond_next472: ; preds = %cond_next330
+ %tmp490 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
+ %tmp492 = getelementptr %struct.tree_node* %tmp490, i32 0, i32 0, i32 0, i32 3 ; <i8*> [#uses=1]
+ %tmp492.upgrd.1 = bitcast i8* %tmp492 to i32* ; <i32*> [#uses=1]
+ %tmp493 = load i32* %tmp492.upgrd.1 ; <i32> [#uses=1]
+ %tmp495 = trunc i32 %tmp493 to i8 ; <i8> [#uses=1]
+ %tmp496 = icmp eq i8 %tmp495, 11 ; <i1> [#uses=1]
+ %tmp496.upgrd.2 = zext i1 %tmp496 to i8 ; <i8> [#uses=1]
+ store i8 %tmp496.upgrd.2, i8* null
+ ret void
+}
diff --git a/test/CodeGen/X86/2006-10-13-CycleInDAG.ll b/test/CodeGen/X86/2006-10-13-CycleInDAG.ll
new file mode 100644
index 0000000..6ed2e7b
--- /dev/null
+++ b/test/CodeGen/X86/2006-10-13-CycleInDAG.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86
+@str = external global [18 x i8] ; <[18 x i8]*> [#uses=1]
+
+define void @test() {
+bb.i:
+ %tmp.i660 = load <4 x float>* null ; <<4 x float>> [#uses=1]
+ call void (i32, ...)* @printf( i32 0, i8* getelementptr ([18 x i8]* @str, i32 0, i64 0), double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 )
+ %tmp152.i = load <4 x i32>* null ; <<4 x i32>> [#uses=1]
+ %tmp156.i = bitcast <4 x i32> %tmp152.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp175.i = bitcast <4 x float> %tmp.i660 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp176.i = xor <4 x i32> %tmp156.i, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %tmp177.i = and <4 x i32> %tmp176.i, %tmp175.i ; <<4 x i32>> [#uses=1]
+ %tmp190.i = or <4 x i32> %tmp177.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp191.i = bitcast <4 x i32> %tmp190.i to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp191.i, <4 x float>* null
+ ret void
+}
+
+declare void @printf(i32, ...)
diff --git a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
new file mode 100644
index 0000000..88e8b4a
--- /dev/null
+++ b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s
+
+@str = internal constant [14 x i8] c"Hello world!\0A\00" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [13 x i8] c"Blah world!\0A\00" ; <[13 x i8]*> [#uses=1]
+
+define i32 @test(i32 %argc, i8** %argv) nounwind {
+entry:
+; CHECK: cmpl $2
+; CHECK-NEXT: je
+; CHECK-NEXT: %entry
+
+ switch i32 %argc, label %UnifiedReturnBlock [
+ i32 1, label %bb
+ i32 2, label %bb2
+ ]
+
+bb: ; preds = %entry
+ %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @str, i32 0, i64 0) ) ; <i32> [#uses=0]
+ ret i32 0
+
+bb2: ; preds = %entry
+ %tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @str.upgrd.1, i32 0, i64 0) ) ; <i32> [#uses=0]
+ ret i32 0
+
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/test/CodeGen/X86/2006-11-12-CSRetCC.ll
new file mode 100644
index 0000000..91210ea
--- /dev/null
+++ b/test/CodeGen/X86/2006-11-12-CSRetCC.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s -march=x86 | grep {subl \$4, %esp}
+
+target triple = "i686-pc-linux-gnu"
+@str = internal constant [9 x i8] c"%f+%f*i\0A\00" ; <[9 x i8]*> [#uses=1]
+
+define i32 @main() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ %tmp = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4]
+ %tmp1 = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4]
+ %tmp2 = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=3]
+ %pi = alloca double, align 8 ; <double*> [#uses=2]
+ %z = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store double 0x400921FB54442D18, double* %pi
+ %tmp.upgrd.1 = load double* %pi ; <double> [#uses=1]
+ %real = getelementptr { double, double }* %tmp1, i64 0, i32 0 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %real
+ %real3 = getelementptr { double, double }* %tmp1, i64 0, i32 1 ; <double*> [#uses=1]
+ store double %tmp.upgrd.1, double* %real3
+ %tmp.upgrd.2 = getelementptr { double, double }* %tmp, i64 0, i32 0 ; <double*> [#uses=1]
+ %tmp4 = getelementptr { double, double }* %tmp1, i64 0, i32 0 ; <double*> [#uses=1]
+ %tmp5 = load double* %tmp4 ; <double> [#uses=1]
+ store double %tmp5, double* %tmp.upgrd.2
+ %tmp6 = getelementptr { double, double }* %tmp, i64 0, i32 1 ; <double*> [#uses=1]
+ %tmp7 = getelementptr { double, double }* %tmp1, i64 0, i32 1 ; <double*> [#uses=1]
+ %tmp8 = load double* %tmp7 ; <double> [#uses=1]
+ store double %tmp8, double* %tmp6
+ %tmp.upgrd.3 = bitcast { double, double }* %tmp to { i64, i64 }* ; <{ i64, i64 }*> [#uses=1]
+ %tmp.upgrd.4 = getelementptr { i64, i64 }* %tmp.upgrd.3, i64 0, i32 0 ; <i64*> [#uses=1]
+ %tmp.upgrd.5 = load i64* %tmp.upgrd.4 ; <i64> [#uses=1]
+ %tmp9 = bitcast { double, double }* %tmp to { i64, i64 }* ; <{ i64, i64 }*> [#uses=1]
+ %tmp10 = getelementptr { i64, i64 }* %tmp9, i64 0, i32 1 ; <i64*> [#uses=1]
+ %tmp11 = load i64* %tmp10 ; <i64> [#uses=1]
+ call void @cexp( { double, double }* sret %tmp2, i64 %tmp.upgrd.5, i64 %tmp11 )
+ %tmp12 = getelementptr { double, double }* %z, i64 0, i32 0 ; <double*> [#uses=1]
+ %tmp13 = getelementptr { double, double }* %tmp2, i64 0, i32 0 ; <double*> [#uses=1]
+ %tmp14 = load double* %tmp13 ; <double> [#uses=1]
+ store double %tmp14, double* %tmp12
+ %tmp15 = getelementptr { double, double }* %z, i64 0, i32 1 ; <double*> [#uses=1]
+ %tmp16 = getelementptr { double, double }* %tmp2, i64 0, i32 1 ; <double*> [#uses=1]
+ %tmp17 = load double* %tmp16 ; <double> [#uses=1]
+ store double %tmp17, double* %tmp15
+ %tmp18 = getelementptr { double, double }* %z, i64 0, i32 1 ; <double*> [#uses=1]
+ %tmp19 = load double* %tmp18 ; <double> [#uses=1]
+ %tmp20 = getelementptr { double, double }* %z, i64 0, i32 0 ; <double*> [#uses=1]
+ %tmp21 = load double* %tmp20 ; <double> [#uses=1]
+ %tmp.upgrd.6 = getelementptr [9 x i8]* @str, i32 0, i64 0 ; <i8*> [#uses=1]
+ %tmp.upgrd.7 = call i32 (i8*, ...)* @printf( i8* %tmp.upgrd.6, double %tmp21, double %tmp19 ) ; <i32> [#uses=0]
+ br label %return
+return: ; preds = %entry
+ %retval.upgrd.8 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval.upgrd.8
+}
+
+declare void @cexp({ double, double }* sret , i64, i64)
+
+declare i32 @printf(i8*, ...)
+
diff --git a/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/test/CodeGen/X86/2006-11-17-IllegalMove.ll
new file mode 100644
index 0000000..e839d72
--- /dev/null
+++ b/test/CodeGen/X86/2006-11-17-IllegalMove.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep movb %t | count 2
+; RUN: grep {movzb\[wl\]} %t
+
+
+define void @handle_vector_size_attribute() nounwind {
+entry:
+ %tmp69 = load i32* null ; <i32> [#uses=1]
+ switch i32 %tmp69, label %bb84 [
+ i32 2, label %bb77
+ i32 1, label %bb77
+ ]
+
+bb77: ; preds = %entry, %entry
+ %tmp99 = udiv i64 0, 0 ; <i64> [#uses=1]
+ %tmp = load i8* null ; <i8> [#uses=1]
+ %tmp114 = icmp eq i64 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp114, label %cond_true115, label %cond_next136
+
+bb84: ; preds = %entry
+ ret void
+
+cond_true115: ; preds = %bb77
+ %tmp118 = load i8* null ; <i8> [#uses=1]
+ br i1 false, label %cond_next129, label %cond_true120
+
+cond_true120: ; preds = %cond_true115
+ %tmp127 = udiv i8 %tmp, %tmp118 ; <i8> [#uses=1]
+ %tmp127.upgrd.1 = zext i8 %tmp127 to i64 ; <i64> [#uses=1]
+ br label %cond_next129
+
+cond_next129: ; preds = %cond_true120, %cond_true115
+ %iftmp.30.0 = phi i64 [ %tmp127.upgrd.1, %cond_true120 ], [ 0, %cond_true115 ] ; <i64> [#uses=1]
+ %tmp132 = icmp eq i64 %iftmp.30.0, %tmp99 ; <i1> [#uses=1]
+ br i1 %tmp132, label %cond_false148, label %cond_next136
+
+cond_next136: ; preds = %cond_next129, %bb77
+ ret void
+
+cond_false148: ; preds = %cond_next129
+ ret void
+}
diff --git a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll
new file mode 100644
index 0000000..ea2e6db
--- /dev/null
+++ b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | grep test.*1
+; PR1016
+
+define i32 @test(i32 %A, i32 %B, i32 %C) {
+ %a = trunc i32 %A to i1 ; <i1> [#uses=1]
+ %D = select i1 %a, i32 %B, i32 %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
diff --git a/test/CodeGen/X86/2006-11-28-Memcpy.ll b/test/CodeGen/X86/2006-11-28-Memcpy.ll
new file mode 100644
index 0000000..8c1573f
--- /dev/null
+++ b/test/CodeGen/X86/2006-11-28-Memcpy.ll
@@ -0,0 +1,34 @@
+; PR1022, PR1023
+; RUN: llc < %s -march=x86 | grep -- -573785174 | count 2
+; RUN: llc < %s -march=x86 | grep -E {movl _?bytes2} | count 1
+
+@fmt = constant [4 x i8] c"%x\0A\00" ; <[4 x i8]*> [#uses=2]
+@bytes = constant [4 x i8] c"\AA\BB\CC\DD" ; <[4 x i8]*> [#uses=1]
+@bytes2 = global [4 x i8] c"\AA\BB\CC\DD" ; <[4 x i8]*> [#uses=1]
+
+define i32 @test1() nounwind {
+ %y = alloca i32 ; <i32*> [#uses=2]
+ %c = bitcast i32* %y to i8* ; <i8*> [#uses=1]
+ %z = getelementptr [4 x i8]* @bytes, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %c, i8* %z, i32 4, i32 1 )
+ %r = load i32* %y ; <i32> [#uses=1]
+ %t = bitcast [4 x i8]* @fmt to i8* ; <i8*> [#uses=1]
+ %tmp = call i32 (i8*, ...)* @printf( i8* %t, i32 %r ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
+define void @test2() nounwind {
+ %y = alloca i32 ; <i32*> [#uses=2]
+ %c = bitcast i32* %y to i8* ; <i8*> [#uses=1]
+ %z = getelementptr [4 x i8]* @bytes2, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %c, i8* %z, i32 4, i32 1 )
+ %r = load i32* %y ; <i32> [#uses=1]
+ %t = bitcast [4 x i8]* @fmt to i8* ; <i8*> [#uses=1]
+ %tmp = call i32 (i8*, ...)* @printf( i8* %t, i32 %r ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i32 @printf(i8*, ...)
+
diff --git a/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll b/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll
new file mode 100644
index 0000000..50a244b
--- /dev/null
+++ b/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86
+; PR1049
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.QBasicAtomic = type { i32 }
+ %struct.QByteArray = type { %"struct.QByteArray::Data"* }
+ %"struct.QByteArray::Data" = type { %struct.QBasicAtomic, i32, i32, i8*, [1 x i8] }
+ %struct.QFactoryLoader = type { %struct.QObject }
+ %struct.QImageIOHandler = type { i32 (...)**, %struct.QImageIOHandlerPrivate* }
+ %struct.QImageIOHandlerPrivate = type opaque
+ %struct.QImageWriter = type { %struct.QImageWriterPrivate* }
+ %struct.QImageWriterPrivate = type { %struct.QByteArray, %struct.QFactoryLoader*, i1, %struct.QImageIOHandler*, i32, float, %struct.QString, %struct.QString, i32, %struct.QString, %struct.QImageWriter* }
+ %"struct.QList<QByteArray>" = type { %"struct.QList<QByteArray>::._20" }
+ %"struct.QList<QByteArray>::._20" = type { %struct.QListData }
+ %struct.QListData = type { %"struct.QListData::Data"* }
+ %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] }
+ %struct.QObject = type { i32 (...)**, %struct.QObjectData* }
+ %struct.QObjectData = type { i32 (...)**, %struct.QObject*, %struct.QObject*, %"struct.QList<QByteArray>", i8, [3 x i8], i32, i32 }
+ %struct.QString = type { %"struct.QString::Data"* }
+ %"struct.QString::Data" = type { %struct.QBasicAtomic, i32, i32, i16*, i8, i8, [1 x i16] }
+
+define i1 @_ZNK12QImageWriter8canWriteEv() {
+ %tmp62 = load %struct.QImageWriterPrivate** null ; <%struct.QImageWriterPrivate*> [#uses=1]
+ %tmp = getelementptr %struct.QImageWriterPrivate* %tmp62, i32 0, i32 9 ; <%struct.QString*> [#uses=1]
+ %tmp75 = call %struct.QString* @_ZN7QStringaSERKS_( %struct.QString* %tmp, %struct.QString* null ) ; <%struct.QString*> [#uses=0]
+ call void asm sideeffect "lock\0Adecl $0\0Asetne 1", "=*m"( i32* null )
+ ret i1 false
+}
+
+declare %struct.QString* @_ZN7QStringaSERKS_(%struct.QString*, %struct.QString*)
diff --git a/test/CodeGen/X86/2006-12-19-IntelSyntax.ll b/test/CodeGen/X86/2006-12-19-IntelSyntax.ll
new file mode 100644
index 0000000..f81b303
--- /dev/null
+++ b/test/CodeGen/X86/2006-12-19-IntelSyntax.ll
@@ -0,0 +1,86 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel
+; PR1061
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define void @bar(i32 %n) {
+entry:
+ switch i32 %n, label %bb12 [
+ i32 1, label %bb
+ i32 2, label %bb6
+ i32 4, label %bb7
+ i32 5, label %bb8
+ i32 6, label %bb10
+ i32 7, label %bb1
+ i32 8, label %bb3
+ i32 9, label %bb4
+ i32 10, label %bb9
+ i32 11, label %bb2
+ i32 12, label %bb5
+ i32 13, label %bb11
+ ]
+
+bb: ; preds = %entry
+ call void (...)* @foo1( )
+ ret void
+
+bb1: ; preds = %entry
+ call void (...)* @foo2( )
+ ret void
+
+bb2: ; preds = %entry
+ call void (...)* @foo6( )
+ ret void
+
+bb3: ; preds = %entry
+ call void (...)* @foo3( )
+ ret void
+
+bb4: ; preds = %entry
+ call void (...)* @foo4( )
+ ret void
+
+bb5: ; preds = %entry
+ call void (...)* @foo5( )
+ ret void
+
+bb6: ; preds = %entry
+ call void (...)* @foo1( )
+ ret void
+
+bb7: ; preds = %entry
+ call void (...)* @foo2( )
+ ret void
+
+bb8: ; preds = %entry
+ call void (...)* @foo6( )
+ ret void
+
+bb9: ; preds = %entry
+ call void (...)* @foo3( )
+ ret void
+
+bb10: ; preds = %entry
+ call void (...)* @foo4( )
+ ret void
+
+bb11: ; preds = %entry
+ call void (...)* @foo5( )
+ ret void
+
+bb12: ; preds = %entry
+ call void (...)* @foo6( )
+ ret void
+}
+
+declare void @foo1(...)
+
+declare void @foo2(...)
+
+declare void @foo6(...)
+
+declare void @foo3(...)
+
+declare void @foo4(...)
+
+declare void @foo5(...)
diff --git a/test/CodeGen/X86/2007-01-08-InstrSched.ll b/test/CodeGen/X86/2007-01-08-InstrSched.ll
new file mode 100644
index 0000000..317ed0a
--- /dev/null
+++ b/test/CodeGen/X86/2007-01-08-InstrSched.ll
@@ -0,0 +1,22 @@
+; PR1075
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -O3 | FileCheck %s
+
+define float @foo(float %x) nounwind {
+ %tmp1 = fmul float %x, 3.000000e+00
+ %tmp3 = fmul float %x, 5.000000e+00
+ %tmp5 = fmul float %x, 7.000000e+00
+ %tmp7 = fmul float %x, 1.100000e+01
+ %tmp10 = fadd float %tmp1, %tmp3
+ %tmp12 = fadd float %tmp10, %tmp5
+ %tmp14 = fadd float %tmp12, %tmp7
+ ret float %tmp14
+
+; CHECK: mulss LCPI1_3(%rip)
+; CHECK-NEXT: mulss LCPI1_0(%rip)
+; CHECK-NEXT: mulss LCPI1_1(%rip)
+; CHECK-NEXT: mulss LCPI1_2(%rip)
+; CHECK-NEXT: addss
+; CHECK-NEXT: addss
+; CHECK-NEXT: addss
+; CHECK-NEXT: ret
+}
diff --git a/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll b/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll
new file mode 100644
index 0000000..de226a1
--- /dev/null
+++ b/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll
@@ -0,0 +1,19 @@
+; RUN: llc %s -o - -march=x86-64 | grep {(%rdi,%rax,8)}
+; RUN: llc %s -o - -march=x86-64 | not grep {addq.*8}
+
+define void @foo(double* %y) nounwind {
+entry:
+ br label %bb
+
+bb:
+ %i = phi i64 [ 0, %entry ], [ %k, %bb ]
+ %j = getelementptr double* %y, i64 %i
+ store double 0.000000e+00, double* %j
+ %k = add i64 %i, 1
+ %n = icmp eq i64 %k, 0
+ br i1 %n, label %return, label %bb
+
+return:
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
new file mode 100644
index 0000000..5e7c0a7
--- /dev/null
+++ b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
@@ -0,0 +1,462 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep leaq %t
+; RUN: not grep {,%rsp)} %t
+; PR1103
+
+target datalayout = "e-p:64:64"
+@i6000 = global [128 x i64] zeroinitializer, align 16
+
+
+define void @foo(i32* %a0, i32* %a1, i32* %a2, i32* %a3, i32* %a4, i32* %a5) {
+b:
+ %r = load i32* %a0
+ %r2 = load i32* %a1
+ %r4 = load i32* %a2
+ %r6 = load i32* %a3
+ %r8 = load i32* %a4
+ %r14 = load i32* %a5
+ %rx = sext i32 %r2 to i64
+ %r9 = sext i32 %r to i64
+ %r11 = add i64 %rx, 0
+ %ras = icmp slt i64 %r11, 0
+ %r12 = select i1 %ras, i64 0, i64 %r11
+ %r16 = sext i32 %r14 to i64
+ %r17 = sext i32 %r8 to i64
+ %r18 = sub i64 %r16, 0
+ %r19 = add i64 %r18, 0
+ %r20 = icmp slt i64 %r19, 0
+ %r19h = add i64 %r18, 0
+ %r22 = select i1 %r20, i64 1, i64 %r19h
+ %r23 = mul i64 %r22, 0
+ %r23a = trunc i64 %r23 to i32
+ %r24 = shl i32 %r23a, 0
+ %r25 = add i32 %r24, 0
+ %ras2 = alloca i8, i32 %r25, align 16
+ %r28 = getelementptr i8* %ras2, i32 0
+ %r38 = shl i64 %r12, 0
+ %s2013 = add i64 %r38, 0
+ %c22012 = getelementptr i8* %ras2, i64 %s2013
+ %r42 = shl i64 %r12, 0
+ %s2011 = add i64 %r42, 16
+ %c22010 = getelementptr i8* %ras2, i64 %s2011
+ %r50 = add i64 %r16, 0
+ %r51 = icmp slt i64 %r50, 0
+ %r50sh = shl i64 %r50, 0
+ %r50j = add i64 %r50sh, 0
+ %r54 = select i1 %r51, i64 0, i64 %r50j
+ %r56 = mul i64 %r54, %r12
+ %r28s = add i64 %r56, 16
+ %c2 = getelementptr i8* %ras2, i64 %r28s
+ %r60 = sub i32 %r2, %r
+ %r61 = icmp slt i32 %r60, 0
+ br i1 %r61, label %a29b, label %b63
+a29b:
+ %r155 = sub i32 %r6, %r4
+ %r156 = icmp slt i32 %r155, 0
+ br i1 %r156, label %a109b, label %b158
+b63:
+ %r66 = sext i32 %r60 to i64
+ %r67 = add i64 %r66, 0
+ %r76 = mul i64 %r17, 0
+ %r82 = add i64 %r76, 0
+ %r84 = icmp slt i64 %r67, 0
+ br i1 %r84, label %b85, label %a25b
+b85:
+ %e641 = phi i64 [ 0, %b63 ], [ %r129, %a25b ]
+ %r137 = icmp slt i64 %e641, 0
+ br i1 %r137, label %a25b140q, label %a29b
+a25b140q:
+ br label %a25b140
+a25b:
+ %w1989 = phi i64 [ 0, %b63 ], [ %v1990, %a25b ]
+ %e642 = shl i64 %w1989, 0
+ %r129 = add i64 %e642, 0
+ %r132 = add i64 %e642, 0
+ %r134 = icmp slt i64 %r132, 0
+ %v1990 = add i64 %w1989, 0
+ br i1 %r134, label %b85, label %a25b
+a25b140:
+ %w1982 = phi i64 [ 0, %a25b140q ], [ %v1983, %a25b140 ]
+ %r145 = add i64 %r82, 0
+ %v1983 = add i64 %w1982, 0
+ %u1987 = icmp slt i64 %v1983, 0
+ br i1 %u1987, label %a29b, label %a25b140
+b158:
+ %r161 = sext i32 %r to i64
+ %r163 = sext i32 %r4 to i64
+ br label %a29b173
+a29b173:
+ %w1964 = phi i64 [ 0, %b158 ], [ %v1973, %b1606 ]
+ %b1974 = mul i64 %r163, 0
+ %b1975 = add i64 %r161, 0
+ %b1976 = mul i64 %w1964, 0
+ %b1977 = add i64 %b1976, 0
+ %s761 = bitcast i64 %b1977 to i64
+ %b1980 = mul i64 %w1964, 0
+ %s661 = add i64 %b1980, 0
+ br i1 %r61, label %a33b, label %b179
+a33b:
+ %r328 = icmp slt i32 %r14, 0
+ %r335 = or i1 %r328, %r61
+ br i1 %r335, label %a50b, label %b341
+b179:
+ %r182 = sext i32 %r60 to i64
+ %r183 = add i64 %r182, 0
+ %r187 = icmp slt i64 %r183, 0
+ br i1 %r187, label %b188, label %a30b
+b188:
+ %e653 = phi i64 [ 0, %b179 ], [ %r283, %a30b ]
+ %r291 = icmp slt i64 %e653, 0
+ br i1 %r291, label %a30b294q, label %a33b
+a30b294q:
+ br label %a30b294
+a30b:
+ %w = phi i64 [ 0, %b179 ], [ %v, %a30b ]
+ %b2 = shl i64 %w, 0
+ %r283 = add i64 %b2, 0
+ %r286 = add i64 %b2, 0
+ %r288 = icmp slt i64 %r286, 0
+ %v = add i64 %w, 0
+ br i1 %r288, label %b188, label %a30b
+a30b294:
+ %w1847 = phi i64 [ 0, %a30b294q ], [ %v1848, %a30b294 ]
+ %v1848 = add i64 %w1847, 0
+ %u = icmp slt i64 %v1848, 0
+ br i1 %u, label %a33b, label %a30b294
+a50b:
+ %r814 = add i32 %r14, 0
+ %r815 = icmp slt i32 %r814, 0
+ %r817 = or i1 %r61, %r815
+ br i1 %r817, label %a57b, label %b820
+b341:
+ %w1874 = phi i64 [ 0, %a33b ], [ %v1880, %b463 ]
+ %d753 = bitcast i64 %w1874 to i64
+ %r343 = add i64 %s661, 0
+ %r346 = add i64 %r343, 0
+ %r347 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r346
+ %r348 = load float* %r347
+ %r352 = add i64 %r343, 0
+ %r353 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r352
+ %r354 = load float* %r353
+ %r362 = load float* bitcast ([128 x i64]* @i6000 to float*)
+ %r363 = fadd float 0.000000e+00, %r362
+ %r370 = load float* bitcast ([128 x i64]* @i6000 to float*)
+ %r376 = icmp slt i64 %r16, 0
+ br i1 %r376, label %b377, label %a35b
+b377:
+ %d753p = phi i64 [ %d753, %b341 ], [ %r411, %a35b ]
+ %s761p = phi i64 [ %s761, %b341 ], [ 322, %a35b ]
+ %e784 = phi i64 [ 0, %b341 ], [ %r454, %a35b ]
+ %s794 = add i64 %d753p, 0
+ %r462 = icmp slt i64 %e784, 0
+ br i1 %r462, label %a35b465, label %b463
+a35b:
+ %w1865 = phi i64 [ 0, %b341 ], [ %v1866, %a35b ]
+ %e785 = shl i64 %w1865, 0
+ %b1877 = mul i64 %w1865, 0
+ %s795 = add i64 %b1877, 0
+ %r399 = fadd float %r354, 0.000000e+00
+ %r402 = fadd float %r370, 0.000000e+00
+ %r403 = fadd float %r348, 0.000000e+00
+ %r411 = add i64 %s795, 0
+ %r431 = fadd float %r362, 0.000000e+00
+ %r454 = add i64 %e785, 0
+ %r457 = add i64 %e785, 0
+ %r459 = icmp slt i64 %r457, 0
+ %v1866 = add i64 %w1865, 0
+ br i1 %r459, label %b377, label %a35b
+b463:
+ %r506 = add i64 %d753, 0
+ %r511 = sext i32 %r60 to i64
+ %r512 = add i64 %r511, 0
+ %r513 = icmp slt i64 %r506, 0
+ %v1880 = add i64 %w1874, 0
+ br i1 %r513, label %b341, label %b514
+a35b465:
+ %r469 = add i64 %s794, 0
+ br label %b463
+b514:
+ %r525 = mul i64 %r17, 0
+ %r533 = add i64 %r525, 0
+ br label %b535
+b535:
+ %w1855 = phi i64 [ 0, %b514 ], [ %v1856, %b712 ]
+ %s923 = phi i64 [ 0, %b514 ], [ %r799, %b712 ]
+ %s933 = phi i64 [ %r533, %b514 ], [ %r795, %b712 ]
+ %r538 = add i64 %w1855, 0
+ %r539 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r538
+ %r540 = load float* %r539
+ %r551 = load float* bitcast ([128 x i64]* @i6000 to float*)
+ %r562 = sub i64 %s933, 0
+ %r564 = icmp slt i64 %r512, 0
+ br i1 %r564, label %b565, label %a45b
+b565:
+ %e944 = phi i64 [ 0, %b535 ], [ %r703, %a45b ]
+ %r711 = icmp slt i64 %e944, 0
+ br i1 %r711, label %a45b714, label %b712
+a45b:
+ %w1852 = phi i64 [ 0, %b535 ], [ %v1853, %a45b ]
+ %e945 = shl i64 %w1852, 0
+ %r609 = add i64 %r562, 0
+ %r703 = add i64 %e945, 0
+ %r706 = add i64 %e945, 0
+ %r708 = icmp slt i64 %r706, 0
+ %v1853 = add i64 %w1852, 0
+ br i1 %r708, label %b565, label %a45b
+b712:
+ %r795 = add i64 %rx, 0
+ %r799 = add i64 %s923, 0
+ %r802 = add i64 %w1855, 0
+ %r807 = icmp slt i64 %r802, 0
+ %v1856 = add i64 %w1855, 0
+ br i1 %r807, label %b535, label %a50b
+a45b714:
+ %r717 = add i64 %e944, 0
+ %r720 = add i64 %r717, 0
+ %r721 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r720
+ %r722 = load float* %r721
+ %r726 = add i64 %r717, 0
+ %r727 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r726
+ %r728 = load float* %r727
+ %r732 = add i64 %r717, 0
+ %r733 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r732
+ %r734 = load float* %r733
+ %r738 = add i64 %r717, 0
+ %r739 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r738
+ %r740 = load float* %r739
+ %r744 = add i64 %r717, 0
+ %r745 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r744
+ %r746 = load float* %r745
+ %r750 = add i64 %r717, 0
+ %r751 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r750
+ %r752 = load float* %r751
+ %r753 = fadd float %r752, %r746
+ %r754 = fadd float %r728, %r722
+ %r755 = fadd float %r734, %r754
+ %r756 = fadd float %r755, %r740
+ %r757 = fadd float %r753, %r756
+ %r759 = fadd float %r757, %r540
+ %r770 = add i64 %r717, 0
+ %r771 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r770
+ %r772 = load float* %r771
+ %r776 = add i64 %r717, 0
+ %r777 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r776
+ %r778 = load float* %r777
+ %r781 = fadd float %r363, %r772
+ %r782 = fadd float %r781, %r778
+ %r783 = fadd float %r551, %r782
+ br label %b712
+a57b:
+ br i1 %r335, label %a66b, label %b1086
+b820:
+ %r823 = sext i32 %r2 to i64
+ %r834 = sext i32 %r8 to i64
+ %r844 = add i64 %r16, 0
+ %r846 = sext i32 %r60 to i64
+ %r847 = add i64 %r846, 0
+ %r851 = load float* bitcast ([128 x i64]* @i6000 to float*)
+ %r856 = sub i64 %rx, 0
+ br label %b858
+b858:
+ %w1891 = phi i64 [ 0, %b820 ], [ %v1892, %b1016 ]
+ %s1193 = phi i64 [ 0, %b820 ], [ %r1068, %b1016 ]
+ %b1894 = mul i64 %r834, 0
+ %b1896 = shl i64 %r823, 0
+ %b1902 = mul i64 %w1891, 0
+ %s1173 = add i64 %b1902, 0
+ %r859 = add i64 %r856, 0
+ %r862 = add i64 %w1891, 0
+ %r863 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r862
+ %r864 = load float* %r863
+ %r868 = add i64 %w1891, 0
+ %r869 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r868
+ %r870 = load float* %r869
+ %r873 = sub i64 %r859, 0
+ %r876 = sub i64 %s1173, 0
+ %r878 = icmp slt i64 %r847, 0
+ br i1 %r878, label %b879, label %a53b
+b879:
+ %e1204 = phi i64 [ 0, %b858 ], [ %r1007, %a53b ]
+ %r1015 = icmp slt i64 %e1204, 0
+ br i1 %r1015, label %a53b1019q, label %b1016
+a53b1019q:
+ %b1888 = sub i64 %r846, 0
+ %b1889 = add i64 %b1888, 0
+ br label %a53b1019
+a53b:
+ %w1881 = phi i64 [ 0, %b858 ], [ %v1882, %a53b ]
+ %e1205 = shl i64 %w1881, 0
+ %r1007 = add i64 %e1205, 0
+ %r1010 = add i64 %e1205, 0
+ %r1012 = icmp slt i64 %r1010, 0
+ %v1882 = add i64 %w1881, 0
+ br i1 %r1012, label %b879, label %a53b
+b1016:
+ %r1068 = add i64 %s1193, 0
+ %r1071 = add i64 %w1891, 0
+ %r1073 = icmp slt i64 %r1071, %r844
+ %v1892 = add i64 %w1891, 0
+ br i1 %r1073, label %b858, label %a57b
+a53b1019:
+ %w1885 = phi i64 [ 0, %a53b1019q ], [ %v1886, %a53b1019 ]
+ %r1022 = add i64 %r876, 0
+ %r1024 = bitcast i8* %c2 to float*
+ %r1025 = add i64 %r1022, 0
+ %r1026 = getelementptr float* %r1024, i64 %r1025
+ %r1027 = load float* %r1026
+ %r1032 = add i64 %r873, 0
+ %r1033 = add i64 %r1032, 0
+ %r1034 = getelementptr float* %r1024, i64 %r1033
+ %r1035 = load float* %r1034
+ %r1037 = bitcast i8* %c22010 to float*
+ %r1040 = getelementptr float* %r1037, i64 %r1025
+ %r1044 = fadd float %r864, %r1035
+ %r1046 = fadd float %r870, %r1027
+ %r1047 = fadd float %r1044, %r1046
+ %r1048 = fadd float %r851, %r1047
+ %v1886 = add i64 %w1885, 0
+ %u1890 = icmp slt i64 %v1886, %b1889
+ br i1 %u1890, label %b1016, label %a53b1019
+a66b:
+ br i1 %r817, label %a93b, label %b1321
+b1086:
+ %r1089 = sext i32 %r2 to i64
+ %r1090 = add i64 %rx, 0
+ %r1096 = mul i64 %r9, 0
+ %r1101 = sext i32 %r8 to i64
+ %r1104 = add i64 %r1096, 0
+ %r1108 = sub i64 %r1104, 0
+ %r1110 = sext i32 %r60 to i64
+ %r1111 = add i64 %r1110, 0
+ %r1113 = sext i32 %r14 to i64
+ %r1114 = add i64 %r16, 0
+ br label %b1117
+b1117:
+ %w1915 = phi i64 [ 0, %b1086 ], [ %v1957, %b1263 ]
+ %d1353 = bitcast i64 %w1915 to i64
+ %r1120 = add i64 %s661, 0
+ %r1121 = add i64 %r1120, 0
+ %r1122 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1121
+ %r1123 = load float* %r1122
+ %r1132 = bitcast i8* %c22012 to float*
+ %r1134 = getelementptr float* %r1132, i64 %w1915
+ %r1135 = load float* %r1134
+ %r1136 = fadd float %r1123, %r1135
+ %r1138 = icmp slt i64 %r1114, 0
+ br i1 %r1138, label %b1139, label %a63b
+b1139:
+ %e1364 = phi i64 [ 0, %b1117 ], [ %r1254, %a63b ]
+ %p1998 = phi i64 [ %s761, %b1117 ], [ %r1216, %a63b ]
+ %r1108p = phi i64 [ %r1108, %b1117 ], [ %r1219, %a63b ]
+ %p2004 = phi i64 [ %d1353, %b1117 ], [ %r1090, %a63b ]
+ %s1374 = phi i64 [ 0, %b1117 ], [ %r1251, %a63b ]
+ %s1384 = add i64 %r1108p, 0
+ %s1394 = add i64 %p1998, 0
+ %r1262 = icmp slt i64 %e1364, %r1114
+ br i1 %r1262, label %a63b1266q, label %b1263
+a63b1266q:
+ %b1947 = sub i64 %r1113, 0
+ %b1948 = add i64 %b1947, 0
+ br label %a63b1266
+a63b:
+ %w1904 = phi i64 [ 0, %b1117 ], [ %v1905, %a63b ]
+ %s1375 = phi i64 [ 0, %b1117 ], [ %r1251, %a63b ]
+ %b1906 = add i64 %r1089, 0
+ %b1907 = mul i64 %r1101, 0
+ %b1929 = mul i64 %w1904, 0
+ %s1395 = add i64 %b1929, 0
+ %e1365 = shl i64 %w1904, 0
+ %r1163 = add i64 %r1090, 0
+ %r1167 = add i64 %s1375, 0
+ %r1191 = add i64 %r1163, 0
+ %r1195 = add i64 %r1167, 0
+ %r1216 = add i64 %s1395, 0
+ %r1219 = add i64 %r1191, 0
+ %r1223 = add i64 %r1195, 0
+ %r1251 = add i64 %r1223, 0
+ %r1254 = add i64 %e1365, 0
+ %r1257 = add i64 %e1365, 0
+ %r1259 = icmp slt i64 %r1257, %r1114
+ %v1905 = add i64 %w1904, 0
+ br i1 %r1259, label %b1139, label %a63b
+b1263:
+ %r1306 = add i64 %d1353, 0
+ %r1308 = icmp slt i64 %r1306, %r1111
+ %v1957 = add i64 %w1915, 0
+ br i1 %r1308, label %b1117, label %a66b
+a63b1266:
+ %w1944 = phi i64 [ 0, %a63b1266q ], [ %v1945, %a63b1266 ]
+ %s1377 = phi i64 [ %s1374, %a63b1266q ], [ %r1297, %a63b1266 ]
+ %r1282 = fadd float %r1136, 0.000000e+00
+ %r1297 = add i64 %s1377, 0
+ %v1945 = add i64 %w1944, 0
+ %u1949 = icmp slt i64 %v1945, %b1948
+ br i1 %u1949, label %b1263, label %a63b1266
+a93b:
+ br i1 %r61, label %b1606, label %a97b
+b1321:
+ %r1331 = mul i64 %r17, 0
+ %r1339 = add i64 %r1331, 0
+ br label %b1342
+b1342:
+ %w1960 = phi i64 [ 0, %b1321 ], [ %v1961, %b1582 ]
+ %s1523 = phi i64 [ %r1339, %b1321 ], [ %r1587, %b1582 ]
+ %s1563 = phi i64 [ 0, %b1321 ], [ %r1591, %b1582 ]
+ %d1533 = bitcast i64 %w1960 to i64
+ %b1968 = mul i64 %w1960, 0
+ %s1543 = add i64 %b1968, 0
+ %r1345 = add i64 %s1523, 0
+ %r1348 = sub i64 %r1345, 0
+ %r1352 = add i64 %s1523, 0
+ %r1355 = sub i64 %r1352, 0
+ %r1370 = add i64 %d1533, 0
+ %r1371 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1370
+ %r1372 = load float* %r1371
+ br label %a74b
+a74b:
+ %w1958 = phi i64 [ 0, %b1342 ], [ %v1959, %a74b ]
+ %r1379 = add i64 %s1543, 0
+ %r1403 = add i64 %r1355, 0
+ %r1422 = add i64 %r1348, 0
+ %r1526 = fadd float %r1372, 0.000000e+00
+ %r1573 = add i64 %w1958, 0
+ %r1581 = icmp slt i64 %r1573, 0
+ %v1959 = add i64 %w1958, 0
+ br i1 %r1581, label %a74b, label %b1582
+b1582:
+ %r1587 = add i64 %rx, 0
+ %r1591 = add i64 %s1563, 0
+ %r1596 = add i64 %d1533, 0
+ %r1601 = icmp slt i64 %r1596, 0
+ %v1961 = add i64 %w1960, 0
+ br i1 %r1601, label %b1342, label %a93b
+b1606:
+ %r1833 = add i64 %w1964, 0
+ %r1840 = icmp slt i64 %r1833, 0
+ %v1973 = add i64 %w1964, 0
+ br i1 %r1840, label %a29b173, label %a109b
+a97b:
+ %w1970 = phi i64 [ 0, %a93b ], [ %v1971, %a97b ]
+ %r1613 = add i64 %w1964, 0
+ %r1614 = mul i64 %r1613, 0
+ %r1622 = add i64 %r1614, 0
+ %r1754 = bitcast i8* %r28 to float*
+ %r1756 = getelementptr float* %r1754, i64 %w1970
+ %r1757 = load float* %r1756
+ %r1761 = add i64 %r1622, 0
+ %r1762 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1761
+ %r1763 = load float* %r1762
+ %r1767 = add i64 %r1622, 0
+ %r1768 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1767
+ %r1772 = fadd float %r1763, 0.000000e+00
+ %r1773 = fadd float %r1772, 0.000000e+00
+ %r1809 = fadd float %r1757, 0.000000e+00
+ %r1810 = fadd float %r1773, %r1809
+ store float %r1810, float* %r1768
+ %r1818 = add i64 %w1970, 0
+ %r1826 = icmp slt i64 %r1818, 0
+ %v1971 = add i64 %w1970, 0
+ br i1 %r1826, label %a97b, label %b1606
+a109b:
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll b/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll
new file mode 100644
index 0000000..e83e2e5
--- /dev/null
+++ b/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86
+; Test 'ri' constraint.
+
+define void @run_init_process() {
+ %tmp = call i32 asm sideeffect "push %ebx ; movl $2,%ebx ; int $$0x80 ; pop %ebx", "={ax},0,ri,{cx},{dx},~{dirflag},~{fpsr},~{flags},~{memory}"( i32 11, i32 0, i32 0, i32 0 )
+ unreachable
+ }
diff --git a/test/CodeGen/X86/2007-02-04-OrAddrMode.ll b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll
new file mode 100644
index 0000000..10bbe74
--- /dev/null
+++ b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 | grep {orl \$1, %eax}
+; RUN: llc < %s -march=x86 | grep {leal 3(,%eax,8)}
+
+;; This example can't fold the or into an LEA.
+define i32 @test(float ** %tmp2, i32 %tmp12) nounwind {
+ %tmp3 = load float** %tmp2
+ %tmp132 = shl i32 %tmp12, 2 ; <i32> [#uses=1]
+ %tmp4 = bitcast float* %tmp3 to i8* ; <i8*> [#uses=1]
+ %ctg2 = getelementptr i8* %tmp4, i32 %tmp132 ; <i8*> [#uses=1]
+ %tmp6 = ptrtoint i8* %ctg2 to i32 ; <i32> [#uses=1]
+ %tmp14 = or i32 %tmp6, 1 ; <i32> [#uses=1]
+ ret i32 %tmp14
+}
+
+
+;; This can!
+define i32 @test2(i32 %a, i32 %b) nounwind {
+ %c = shl i32 %a, 3
+ %d = or i32 %c, 3
+ ret i32 %d
+}
diff --git a/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll
new file mode 100644
index 0000000..954c95d
--- /dev/null
+++ b/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic
+; PR1027
+
+ %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
+@stderr = external global %struct._IO_FILE*
+
+define void @__eprintf(i8* %string, i8* %expression, i32 %line, i8* %filename) {
+ %tmp = load %struct._IO_FILE** @stderr
+ %tmp5 = tail call i32 (%struct._IO_FILE*, i8*, ...)* @fprintf( %struct._IO_FILE* %tmp, i8* %string, i8* %expression, i32 %line, i8* %filename )
+ %tmp6 = load %struct._IO_FILE** @stderr
+ %tmp7 = tail call i32 @fflush( %struct._IO_FILE* %tmp6 )
+ tail call void @abort( )
+ unreachable
+}
+
+declare i32 @fprintf(%struct._IO_FILE*, i8*, ...)
+
+declare i32 @fflush(%struct._IO_FILE*)
+
+declare void @abort()
diff --git a/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll b/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll
new file mode 100644
index 0000000..a8f0e57
--- /dev/null
+++ b/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll
@@ -0,0 +1,13 @@
+; PR1219
+; RUN: llc < %s -march=x86 | grep {movl \$1, %eax}
+
+define i32 @test(i1 %X) {
+old_entry1:
+ %hvar2 = zext i1 %X to i32
+ %C = icmp sgt i32 %hvar2, -1
+ br i1 %C, label %cond_true15, label %cond_true
+cond_true15:
+ ret i32 1
+cond_true:
+ ret i32 2
+}
diff --git a/test/CodeGen/X86/2007-02-25-FastCCStack.ll b/test/CodeGen/X86/2007-02-25-FastCCStack.ll
new file mode 100644
index 0000000..2e2b56d
--- /dev/null
+++ b/test/CodeGen/X86/2007-02-25-FastCCStack.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86 -mcpu=pentium3
+
+define internal fastcc double @ggc_rlimit_bound(double %limit) {
+ ret double %limit
+}
diff --git a/test/CodeGen/X86/2007-03-01-SpillerCrash.ll b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll
new file mode 100644
index 0000000..112d1ab
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll
@@ -0,0 +1,86 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | not grep movhlps
+
+define void @test() nounwind {
+test.exit:
+ fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:0 [#uses=4]
+ load <4 x float>* null ; <<4 x float>>:1 [#uses=1]
+ shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:2 [#uses=1]
+ fmul <4 x float> %0, %2 ; <<4 x float>>:3 [#uses=1]
+ fsub <4 x float> zeroinitializer, %3 ; <<4 x float>>:4 [#uses=1]
+ fmul <4 x float> %4, zeroinitializer ; <<4 x float>>:5 [#uses=2]
+ bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:6 [#uses=1]
+ and <4 x i32> %6, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>>:7 [#uses=1]
+ bitcast <4 x i32> %7 to <4 x float> ; <<4 x float>>:8 [#uses=2]
+ extractelement <4 x float> %8, i32 0 ; <float>:9 [#uses=1]
+ extractelement <4 x float> %8, i32 1 ; <float>:10 [#uses=2]
+ br i1 false, label %11, label %19
+
+; <label>:11 ; preds = %test.exit
+ br i1 false, label %17, label %12
+
+; <label>:12 ; preds = %11
+ br i1 false, label %19, label %13
+
+; <label>:13 ; preds = %12
+ fsub float -0.000000e+00, 0.000000e+00 ; <float>:14 [#uses=1]
+ %tmp207 = extractelement <4 x float> zeroinitializer, i32 0 ; <float> [#uses=1]
+ %tmp208 = extractelement <4 x float> zeroinitializer, i32 2 ; <float> [#uses=1]
+ fsub float -0.000000e+00, %tmp208 ; <float>:15 [#uses=1]
+ %tmp155 = extractelement <4 x float> zeroinitializer, i32 0 ; <float> [#uses=1]
+ %tmp156 = extractelement <4 x float> zeroinitializer, i32 2 ; <float> [#uses=1]
+ fsub float -0.000000e+00, %tmp156 ; <float>:16 [#uses=1]
+ br label %19
+
+; <label>:17 ; preds = %11
+ br i1 false, label %19, label %18
+
+; <label>:18 ; preds = %17
+ br label %19
+
+; <label>:19 ; preds = %18, %17, %13, %12, %test.exit
+ phi i32 [ 5, %18 ], [ 3, %13 ], [ 1, %test.exit ], [ 2, %12 ], [ 4, %17 ] ; <i32>:20 [#uses=0]
+ phi float [ 0.000000e+00, %18 ], [ %16, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:21 [#uses=1]
+ phi float [ 0.000000e+00, %18 ], [ %tmp155, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:22 [#uses=1]
+ phi float [ 0.000000e+00, %18 ], [ %15, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:23 [#uses=1]
+ phi float [ 0.000000e+00, %18 ], [ %tmp207, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:24 [#uses=1]
+ phi float [ 0.000000e+00, %18 ], [ %10, %13 ], [ %9, %test.exit ], [ %10, %12 ], [ 0.000000e+00, %17 ] ; <float>:25 [#uses=2]
+ phi float [ 0.000000e+00, %18 ], [ %14, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:26 [#uses=1]
+ phi float [ 0.000000e+00, %18 ], [ 0.000000e+00, %13 ], [ 0.000000e+00, %test.exit ], [ 0.000000e+00, %12 ], [ 0.000000e+00, %17 ] ; <float>:27 [#uses=1]
+ insertelement <4 x float> undef, float %27, i32 0 ; <<4 x float>>:28 [#uses=1]
+ insertelement <4 x float> %28, float %26, i32 1 ; <<4 x float>>:29 [#uses=0]
+ insertelement <4 x float> undef, float %24, i32 0 ; <<4 x float>>:30 [#uses=1]
+ insertelement <4 x float> %30, float %23, i32 1 ; <<4 x float>>:31 [#uses=1]
+ insertelement <4 x float> %31, float %25, i32 2 ; <<4 x float>>:32 [#uses=1]
+ insertelement <4 x float> %32, float %25, i32 3 ; <<4 x float>>:33 [#uses=1]
+ fdiv <4 x float> %33, zeroinitializer ; <<4 x float>>:34 [#uses=1]
+ fmul <4 x float> %34, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 > ; <<4 x float>>:35 [#uses=1]
+ insertelement <4 x float> undef, float %22, i32 0 ; <<4 x float>>:36 [#uses=1]
+ insertelement <4 x float> %36, float %21, i32 1 ; <<4 x float>>:37 [#uses=0]
+ br i1 false, label %foo.exit, label %38
+
+; <label>:38 ; preds = %19
+ extractelement <4 x float> %0, i32 0 ; <float>:39 [#uses=1]
+ fcmp ogt float %39, 0.000000e+00 ; <i1>:40 [#uses=1]
+ extractelement <4 x float> %0, i32 2 ; <float>:41 [#uses=1]
+ extractelement <4 x float> %0, i32 1 ; <float>:42 [#uses=1]
+ fsub float -0.000000e+00, %42 ; <float>:43 [#uses=2]
+ %tmp189 = extractelement <4 x float> %5, i32 2 ; <float> [#uses=1]
+ br i1 %40, label %44, label %46
+
+; <label>:44 ; preds = %38
+ fsub float -0.000000e+00, %tmp189 ; <float>:45 [#uses=0]
+ br label %foo.exit
+
+; <label>:46 ; preds = %38
+ %tmp192 = extractelement <4 x float> %5, i32 1 ; <float> [#uses=1]
+ fsub float -0.000000e+00, %tmp192 ; <float>:47 [#uses=1]
+ br label %foo.exit
+
+foo.exit: ; preds = %46, %44, %19
+ phi float [ 0.000000e+00, %44 ], [ %47, %46 ], [ 0.000000e+00, %19 ] ; <float>:48 [#uses=0]
+ phi float [ %43, %44 ], [ %43, %46 ], [ 0.000000e+00, %19 ] ; <float>:49 [#uses=0]
+ phi float [ 0.000000e+00, %44 ], [ %41, %46 ], [ 0.000000e+00, %19 ] ; <float>:50 [#uses=0]
+ shufflevector <4 x float> %35, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>>:51 [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll b/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
new file mode 100644
index 0000000..4cac9b4
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
@@ -0,0 +1,73 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-darwin | \
+; RUN: grep push | count 3
+
+define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) {
+entry:
+ icmp sgt i32 %size, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ %tmp5.sum72 = add i32 %col, 7 ; <i32> [#uses=1]
+ %tmp5.sum71 = add i32 %col, 5 ; <i32> [#uses=1]
+ %tmp5.sum70 = add i32 %col, 3 ; <i32> [#uses=1]
+ %tmp5.sum69 = add i32 %col, 2 ; <i32> [#uses=1]
+ %tmp5.sum68 = add i32 %col, 1 ; <i32> [#uses=1]
+ %tmp5.sum66 = add i32 %col, 4 ; <i32> [#uses=1]
+ %tmp5.sum = add i32 %col, 6 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.preheader
+ %i.073.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %p_addr.076.0.rec = mul i32 %i.073.0, 9 ; <i32> [#uses=9]
+ %p_addr.076.0 = getelementptr i8* %p, i32 %p_addr.076.0.rec ; <i8*> [#uses=1]
+ %tmp2 = getelementptr i8** %buf, i32 %i.073.0 ; <i8**> [#uses=1]
+ %tmp3 = load i8** %tmp2 ; <i8*> [#uses=8]
+ %tmp5 = getelementptr i8* %tmp3, i32 %col ; <i8*> [#uses=1]
+ %tmp7 = load i8* %p_addr.076.0 ; <i8> [#uses=1]
+ store i8 %tmp7, i8* %tmp5
+ %p_addr.076.0.sum93 = add i32 %p_addr.076.0.rec, 1 ; <i32> [#uses=1]
+ %tmp11 = getelementptr i8* %p, i32 %p_addr.076.0.sum93 ; <i8*> [#uses=1]
+ %tmp13 = load i8* %tmp11 ; <i8> [#uses=1]
+ %tmp15 = getelementptr i8* %tmp3, i32 %tmp5.sum72 ; <i8*> [#uses=1]
+ store i8 %tmp13, i8* %tmp15
+ %p_addr.076.0.sum92 = add i32 %p_addr.076.0.rec, 2 ; <i32> [#uses=1]
+ %tmp17 = getelementptr i8* %p, i32 %p_addr.076.0.sum92 ; <i8*> [#uses=1]
+ %tmp19 = load i8* %tmp17 ; <i8> [#uses=1]
+ %tmp21 = getelementptr i8* %tmp3, i32 %tmp5.sum71 ; <i8*> [#uses=1]
+ store i8 %tmp19, i8* %tmp21
+ %p_addr.076.0.sum91 = add i32 %p_addr.076.0.rec, 3 ; <i32> [#uses=1]
+ %tmp23 = getelementptr i8* %p, i32 %p_addr.076.0.sum91 ; <i8*> [#uses=1]
+ %tmp25 = load i8* %tmp23 ; <i8> [#uses=1]
+ %tmp27 = getelementptr i8* %tmp3, i32 %tmp5.sum70 ; <i8*> [#uses=1]
+ store i8 %tmp25, i8* %tmp27
+ %p_addr.076.0.sum90 = add i32 %p_addr.076.0.rec, 4 ; <i32> [#uses=1]
+ %tmp29 = getelementptr i8* %p, i32 %p_addr.076.0.sum90 ; <i8*> [#uses=1]
+ %tmp31 = load i8* %tmp29 ; <i8> [#uses=1]
+ %tmp33 = getelementptr i8* %tmp3, i32 %tmp5.sum69 ; <i8*> [#uses=2]
+ store i8 %tmp31, i8* %tmp33
+ %p_addr.076.0.sum89 = add i32 %p_addr.076.0.rec, 5 ; <i32> [#uses=1]
+ %tmp35 = getelementptr i8* %p, i32 %p_addr.076.0.sum89 ; <i8*> [#uses=1]
+ %tmp37 = load i8* %tmp35 ; <i8> [#uses=1]
+ %tmp39 = getelementptr i8* %tmp3, i32 %tmp5.sum68 ; <i8*> [#uses=1]
+ store i8 %tmp37, i8* %tmp39
+ %p_addr.076.0.sum88 = add i32 %p_addr.076.0.rec, 6 ; <i32> [#uses=1]
+ %tmp41 = getelementptr i8* %p, i32 %p_addr.076.0.sum88 ; <i8*> [#uses=1]
+ %tmp43 = load i8* %tmp41 ; <i8> [#uses=1]
+ store i8 %tmp43, i8* %tmp33
+ %p_addr.076.0.sum87 = add i32 %p_addr.076.0.rec, 7 ; <i32> [#uses=1]
+ %tmp47 = getelementptr i8* %p, i32 %p_addr.076.0.sum87 ; <i8*> [#uses=1]
+ %tmp49 = load i8* %tmp47 ; <i8> [#uses=1]
+ %tmp51 = getelementptr i8* %tmp3, i32 %tmp5.sum66 ; <i8*> [#uses=1]
+ store i8 %tmp49, i8* %tmp51
+ %p_addr.076.0.sum = add i32 %p_addr.076.0.rec, 8 ; <i32> [#uses=1]
+ %tmp53 = getelementptr i8* %p, i32 %p_addr.076.0.sum ; <i8*> [#uses=1]
+ %tmp55 = load i8* %tmp53 ; <i8> [#uses=1]
+ %tmp57 = getelementptr i8* %tmp3, i32 %tmp5.sum ; <i8*> [#uses=1]
+ store i8 %tmp55, i8* %tmp57
+ %indvar.next = add i32 %i.073.0, 1 ; <i32> [#uses=2]
+ icmp eq i32 %indvar.next, %size ; <i1>:1 [#uses=1]
+ br i1 %1, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-03-16-InlineAsm.ll b/test/CodeGen/X86/2007-03-16-InlineAsm.ll
new file mode 100644
index 0000000..9580726
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-16-InlineAsm.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86
+
+; ModuleID = 'a.bc'
+
+define i32 @foo(i32 %A, i32 %B) {
+entry:
+ %A_addr = alloca i32 ; <i32*> [#uses=2]
+ %B_addr = alloca i32 ; <i32*> [#uses=1]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %ret = alloca i32, align 4 ; <i32*> [#uses=2]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %A, i32* %A_addr
+ store i32 %B, i32* %B_addr
+ %tmp1 = load i32* %A_addr ; <i32> [#uses=1]
+ %tmp2 = call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 7, i32 %tmp1 ) ; <i32> [#uses=1]
+ store i32 %tmp2, i32* %ret
+ %tmp3 = load i32* %ret ; <i32> [#uses=1]
+ store i32 %tmp3, i32* %tmp
+ %tmp4 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp4, i32* %retval
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval5
+}
diff --git a/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll
new file mode 100644
index 0000000..70936fb
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86
+; PR1259
+
+define void @test() {
+ %tmp2 = call i32 asm "...", "=r,~{dirflag},~{fpsr},~{flags},~{dx},~{cx},~{ax}"( )
+ unreachable
+}
diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
new file mode 100644
index 0000000..44d68dd
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86
+
+define i32 @test(i16 %tmp40414244) {
+ %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 )
+ ret i32 %tmp48
+}
+
+define i32 @test2(i16 %tmp40414244) {
+ %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 14 )
+ ret i32 %tmp48
+}
diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
new file mode 100644
index 0000000..3312e01
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 | grep {mov %gs:72, %eax}
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin9"
+
+define void @test() {
+ %tmp1 = tail call i32* asm sideeffect "mov %gs:${1:P}, $0", "=r,i,~{dirflag},~{fpsr},~{flags}"( i32 72 ) ; <%struct._pthread*> [#uses=1]
+ ret void
+}
+
+
diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
new file mode 100644
index 0000000..c1b1ad1
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mcpu=yonah -march=x86 | \
+; RUN: grep {cmpltsd %xmm0, %xmm0}
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin9"
+
+
+define void @acoshf() {
+ %tmp19 = tail call <2 x double> asm sideeffect "pcmpeqd $0, $0 \0A\09 cmpltsd $0, $0", "=x,0,~{dirflag},~{fpsr},~{flags}"( <2 x double> zeroinitializer ) ; <<2 x double>> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
new file mode 100644
index 0000000..30453d5
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | grep {psrlw \$8, %xmm0}
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin9"
+
+define void @test() {
+ tail call void asm sideeffect "psrlw $0, %xmm0", "X,~{dirflag},~{fpsr},~{flags}"( i32 8 )
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2007-03-26-CoalescerBug.ll b/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
new file mode 100644
index 0000000..9676f14
--- /dev/null
+++ b/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=x86
+
+@data = external global [339 x i64]
+
+define void @foo(...) {
+bb1:
+ %t43 = load i64* getelementptr ([339 x i64]* @data, i32 0, i64 212), align 4
+ br i1 false, label %bb80, label %bb6
+bb6:
+ br i1 false, label %bb38, label %bb265
+bb265:
+ ret void
+bb38:
+ br i1 false, label %bb80, label %bb49
+bb80:
+ br i1 false, label %bb146, label %bb268
+bb49:
+ ret void
+bb113:
+ ret void
+bb268:
+ %t1062 = shl i64 %t43, 3
+ %t1066 = shl i64 0, 3
+ br label %bb85
+bb85:
+ %t1025 = phi i64 [ 0, %bb268 ], [ %t102.0, %bb234 ]
+ %t1028 = phi i64 [ 0, %bb268 ], [ %t1066, %bb234 ]
+ %t1031 = phi i64 [ 0, %bb268 ], [ %t103.0, %bb234 ]
+ %t1034 = phi i64 [ 0, %bb268 ], [ %t1066, %bb234 ]
+ %t102.0 = add i64 %t1028, %t1025
+ %t103.0 = add i64 %t1034, %t1031
+ br label %bb86
+bb86:
+ %t108.0 = phi i64 [ %t102.0, %bb85 ], [ %t1139, %bb248 ]
+ %t110.0 = phi i64 [ %t103.0, %bb85 ], [ %t1142, %bb248 ]
+ br label %bb193
+bb193:
+ %t1081 = add i64 %t110.0, -8
+ %t1087 = add i64 %t108.0, -8
+ br i1 false, label %bb193, label %bb248
+bb248:
+ %t1139 = add i64 %t108.0, %t1062
+ %t1142 = add i64 %t110.0, %t1062
+ br i1 false, label %bb86, label %bb234
+bb234:
+ br i1 false, label %bb85, label %bb113
+bb146:
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll b/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll
new file mode 100644
index 0000000..9f09e88
--- /dev/null
+++ b/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s
+; PR1314
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.CycleCount = type { i64, i64 }
+ %struct.bc_struct = type { i32, i32, i32, i32, %struct.bc_struct*, i8*, i8* }
+@_programStartTime = external global %struct.CycleCount ; <%struct.CycleCount*> [#uses=1]
+
+define fastcc i32 @bc_divide(%struct.bc_struct* %n1, %struct.bc_struct* %n2, %struct.bc_struct** %quot, i32 %scale) nounwind {
+entry:
+ %tmp7.i46 = tail call i64 asm sideeffect ".byte 0x0f,0x31", "={dx},=*{ax},~{dirflag},~{fpsr},~{flags}"( i64* getelementptr (%struct.CycleCount* @_programStartTime, i32 0, i32 1) ) ; <i64> [#uses=0]
+ %tmp221 = sdiv i32 10, 0 ; <i32> [#uses=1]
+ tail call fastcc void @_one_mult( i8* null, i32 0, i32 %tmp221, i8* null )
+ ret i32 0
+}
+
+declare fastcc void @_one_mult(i8*, i32, i32, i8*)
diff --git a/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
new file mode 100644
index 0000000..f48c132
--- /dev/null
+++ b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define void @test(<4 x float> %tmp42i) {
+ %tmp42 = call <4 x float> asm "movss $1, $0", "=x,m,~{dirflag},~{fpsr},~{flags}"( float* null ) ; <<4 x float>> [#uses=1]
+ %tmp49 = shufflevector <4 x float> %tmp42, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %cond_true10
+ %tmp52 = bitcast <4 x float> %tmp49 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp53 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp52, <4 x i32> < i32 8, i32 undef, i32 undef, i32 undef > ) ; <<4 x i32>> [#uses=1]
+ %tmp105 = bitcast <4 x i32> %tmp53 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp108 = fsub <4 x float> zeroinitializer, %tmp105 ; <<4 x float>> [#uses=0]
+ br label %bb
+
+return: ; preds = %entry
+ ret void
+}
+
+declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>)
diff --git a/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll
new file mode 100644
index 0000000..4604f46
--- /dev/null
+++ b/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic --disable-fp-elim
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.partition_def = type { i32, [1 x %struct.partition_elem] }
+ %struct.partition_elem = type { i32, %struct.partition_elem*, i32 }
+
+define void @partition_print(%struct.partition_def* %part) {
+entry:
+ br i1 false, label %bb.preheader, label %bb99
+
+bb.preheader: ; preds = %entry
+ br i1 false, label %cond_true, label %cond_next90
+
+cond_true: ; preds = %bb.preheader
+ br i1 false, label %bb32, label %bb87.critedge
+
+bb32: ; preds = %bb32, %cond_true
+ %i.2115.0 = phi i32 [ 0, %cond_true ], [ %indvar.next127, %bb32 ] ; <i32> [#uses=1]
+ %c.2112.0 = phi i32 [ 0, %cond_true ], [ %tmp49, %bb32 ] ; <i32> [#uses=1]
+ %tmp43 = getelementptr %struct.partition_def* %part, i32 0, i32 1, i32 %c.2112.0, i32 1 ; <%struct.partition_elem**> [#uses=1]
+ %tmp44 = load %struct.partition_elem** %tmp43 ; <%struct.partition_elem*> [#uses=1]
+ %tmp4445 = ptrtoint %struct.partition_elem* %tmp44 to i32 ; <i32> [#uses=1]
+ %tmp48 = sub i32 %tmp4445, 0 ; <i32> [#uses=1]
+ %tmp49 = sdiv i32 %tmp48, 12 ; <i32> [#uses=1]
+ %indvar.next127 = add i32 %i.2115.0, 1 ; <i32> [#uses=2]
+ %exitcond128 = icmp eq i32 %indvar.next127, 0 ; <i1> [#uses=1]
+ br i1 %exitcond128, label %bb58, label %bb32
+
+bb58: ; preds = %bb32
+ ret void
+
+bb87.critedge: ; preds = %cond_true
+ ret void
+
+cond_next90: ; preds = %bb.preheader
+ ret void
+
+bb99: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll
new file mode 100644
index 0000000..7528129
--- /dev/null
+++ b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86-64 | not grep 4294967112
+; PR1348
+
+ %struct.md5_ctx = type { i32, i32, i32, i32, [2 x i32], i32, [128 x i8], [4294967288 x i8] }
+
+define i8* @md5_buffer(i8* %buffer, i64 %len, i8* %resblock) {
+entry:
+ %ctx = alloca %struct.md5_ctx, align 16 ; <%struct.md5_ctx*> [#uses=3]
+ call void @md5_init_ctx( %struct.md5_ctx* %ctx )
+ call void @md5_process_bytes( i8* %buffer, i64 %len, %struct.md5_ctx* %ctx )
+ %tmp4 = call i8* @md5_finish_ctx( %struct.md5_ctx* %ctx, i8* %resblock ) ; <i8*> [#uses=1]
+ ret i8* %tmp4
+}
+
+declare void @md5_init_ctx(%struct.md5_ctx*)
+
+declare i8* @md5_finish_ctx(%struct.md5_ctx*, i8*)
+
+declare void @md5_process_bytes(i8*, i64, %struct.md5_ctx*)
diff --git a/test/CodeGen/X86/2007-04-24-VectorCrash.ll b/test/CodeGen/X86/2007-04-24-VectorCrash.ll
new file mode 100644
index 0000000..e38992d
--- /dev/null
+++ b/test/CodeGen/X86/2007-04-24-VectorCrash.ll
@@ -0,0 +1,63 @@
+; RUN: llc < %s -mcpu=yonah
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>)
+
+define void @test(float* %P) {
+entry:
+ or <4 x i32> zeroinitializer, and (<4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), <4 x i32> < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 >) ; <<4 x i32>>:0 [#uses=1]
+ bitcast <4 x i32> %0 to <4 x float> ; <<4 x float>>:1 [#uses=1]
+ fsub <4 x float> %1, zeroinitializer ; <<4 x float>>:2 [#uses=1]
+ fsub <4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer), %2 ; <<4 x float>>:3 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %3, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:4 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %4, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:5 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %5, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:6 [#uses=1]
+ shufflevector <4 x float> %6, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:7 [#uses=1]
+ shufflevector <4 x float> %7, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:8 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %8, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:9 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %9, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:10 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %10, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:11 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %11, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:12 [#uses=1]
+ shufflevector <4 x float> %12, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:13 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %13, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:14 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %14, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:15 [#uses=1]
+ shufflevector <4 x float> %15, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:16 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %16, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:17 [#uses=1]
+ shufflevector <4 x float> %17, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:18 [#uses=1]
+ shufflevector <4 x float> %18, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:19 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %19, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:20 [#uses=1]
+ shufflevector <4 x float> %20, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:21 [#uses=1]
+ shufflevector <4 x float> %21, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:22 [#uses=1]
+ fmul <4 x float> %22, zeroinitializer ; <<4 x float>>:23 [#uses=1]
+ shufflevector <4 x float> %23, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:24 [#uses=1]
+ call <4 x float> @llvm.x86.sse.add.ss( <4 x float> zeroinitializer, <4 x float> %24 ) ; <<4 x float>>:25 [#uses=1]
+ shufflevector <4 x float> %25, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:26 [#uses=1]
+ shufflevector <4 x float> %26, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:27 [#uses=1]
+ shufflevector <4 x float> %27, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:28 [#uses=1]
+ fmul <4 x float> zeroinitializer, %28 ; <<4 x float>>:29 [#uses=1]
+ fadd <4 x float> %29, zeroinitializer ; <<4 x float>>:30 [#uses=1]
+ fmul <4 x float> zeroinitializer, %30 ; <<4 x float>>:31 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %31, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:32 [#uses=1]
+ fmul <4 x float> zeroinitializer, %32 ; <<4 x float>>:33 [#uses=1]
+ shufflevector <4 x float> %33, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:34 [#uses=1]
+ fmul <4 x float> zeroinitializer, %34 ; <<4 x float>>:35 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %35, <4 x i32> < i32 0, i32 1, i32 6, i32 7 > ; <<4 x float>>:36 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %36, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:37 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %37, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:38 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %38, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:39 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %39, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:40 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %40, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:41 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %41, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:42 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %42, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:43 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %43, <4 x i32> < i32 4, i32 1, i32 6, i32 7 > ; <<4 x float>>:44 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %44, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:45 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %45, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:46 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %46, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:47 [#uses=1]
+ shufflevector <4 x float> zeroinitializer, <4 x float> %47, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:48 [#uses=1]
+ shufflevector <4 x float> %48, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>>:49 [#uses=1]
+ fadd <4 x float> %49, zeroinitializer ; <<4 x float>>:50 [#uses=1]
+ %tmp5845 = extractelement <4 x float> %50, i32 2 ; <float> [#uses=1]
+ store float %tmp5845, float* %P
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll
new file mode 100644
index 0000000..113d0eb
--- /dev/null
+++ b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -o - -march=x86 -mattr=+mmx | grep paddq | count 2
+; RUN: llc < %s -o - -march=x86 -mattr=+mmx | grep movq | count 2
+
+define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) {
+entry:
+ %tmp2942 = icmp eq i32 %count, 0 ; <i1> [#uses=1]
+ br i1 %tmp2942, label %bb31, label %bb26
+
+bb26: ; preds = %bb26, %entry
+ %i.037.0 = phi i32 [ 0, %entry ], [ %tmp25, %bb26 ] ; <i32> [#uses=3]
+ %sum.035.0 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1]
+ %tmp13 = getelementptr <1 x i64>* %b, i32 %i.037.0 ; <<1 x i64>*> [#uses=1]
+ %tmp14 = load <1 x i64>* %tmp13 ; <<1 x i64>> [#uses=1]
+ %tmp18 = getelementptr <1 x i64>* %a, i32 %i.037.0 ; <<1 x i64>*> [#uses=1]
+ %tmp19 = load <1 x i64>* %tmp18 ; <<1 x i64>> [#uses=1]
+ %tmp21 = add <1 x i64> %tmp19, %tmp14 ; <<1 x i64>> [#uses=1]
+ %tmp22 = add <1 x i64> %tmp21, %sum.035.0 ; <<1 x i64>> [#uses=2]
+ %tmp25 = add i32 %i.037.0, 1 ; <i32> [#uses=2]
+ %tmp29 = icmp ult i32 %tmp25, %count ; <i1> [#uses=1]
+ br i1 %tmp29, label %bb26, label %bb31
+
+bb31: ; preds = %bb26, %entry
+ %sum.035.1 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1]
+ ret <1 x i64> %sum.035.1
+}
diff --git a/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll b/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
new file mode 100644
index 0000000..85a2ecc
--- /dev/null
+++ b/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s | not grep {bsrl.*10}
+; PR1356
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @main() {
+entry:
+ %tmp4 = tail call i32 asm "bsrl $1, $0", "=r,ro,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 10 ) ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
diff --git a/test/CodeGen/X86/2007-05-05-VecCastExpand.ll b/test/CodeGen/X86/2007-05-05-VecCastExpand.ll
new file mode 100644
index 0000000..e58b193
--- /dev/null
+++ b/test/CodeGen/X86/2007-05-05-VecCastExpand.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 -mcpu=i386 -mattr=+sse
+; PR1371
+
+@str = external global [18 x i8] ; <[18 x i8]*> [#uses=1]
+
+define void @test() {
+bb.i:
+ %tmp.i660 = load <4 x float>* null ; <<4 x float>> [#uses=1]
+ call void (i32, ...)* @printf( i32 0, i8* getelementptr ([18 x i8]* @str, i32 0, i64 0), double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 )
+ %tmp152.i = load <4 x i32>* null ; <<4 x i32>> [#uses=1]
+ %tmp156.i = bitcast <4 x i32> %tmp152.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp175.i = bitcast <4 x float> %tmp.i660 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp176.i = xor <4 x i32> %tmp156.i, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %tmp177.i = and <4 x i32> %tmp176.i, %tmp175.i ; <<4 x i32>> [#uses=1]
+ %tmp190.i = or <4 x i32> %tmp177.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp191.i = bitcast <4 x i32> %tmp190.i to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp191.i, <4 x float>* null
+ ret void
+}
+
+declare void @printf(i32, ...)
diff --git a/test/CodeGen/X86/2007-05-07-InvokeSRet.ll b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll
new file mode 100644
index 0000000..a3ff2f6
--- /dev/null
+++ b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -enable-eh -disable-fp-elim | not grep {addl .12, %esp}
+; PR1398
+
+ %struct.S = type { i32, i32 }
+
+declare void @invokee(%struct.S* sret )
+
+define void @invoker(%struct.S* %name.0.0) {
+entry:
+ invoke void @invokee( %struct.S* %name.0.0 sret )
+ to label %return unwind label %return
+
+return: ; preds = %entry, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll
new file mode 100644
index 0000000..8ef2538
--- /dev/null
+++ b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86-64
+
+ %struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }>
+ %struct.OpaqueXDataStorageType = type opaque
+
+declare i16 @GetParamDesc(%struct.XDesc*, i32, i32, %struct.XDesc*) signext
+
+declare void @r_raise(i64, i8*, ...)
+
+define i64 @app_send_event(i64 %self, i64 %event_class, i64 %event_id, i64 %params, i64 %need_retval) {
+entry:
+ br i1 false, label %cond_true109, label %bb83.preheader
+
+bb83.preheader: ; preds = %entry
+ ret i64 0
+
+cond_true109: ; preds = %entry
+ br i1 false, label %cond_next164, label %cond_true239
+
+cond_next164: ; preds = %cond_true109
+ %tmp176 = call i16 @GetParamDesc( %struct.XDesc* null, i32 1701999219, i32 1413830740, %struct.XDesc* null ) signext ; <i16> [#uses=0]
+ call void (i64, i8*, ...)* @r_raise( i64 0, i8* null )
+ unreachable
+
+cond_true239: ; preds = %cond_true109
+ ret i64 0
+}
diff --git a/test/CodeGen/X86/2007-05-15-maskmovq.ll b/test/CodeGen/X86/2007-05-15-maskmovq.ll
new file mode 100644
index 0000000..2093b8f
--- /dev/null
+++ b/test/CodeGen/X86/2007-05-15-maskmovq.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mcpu=yonah
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define void @test(<1 x i64> %c64, <1 x i64> %mask1, i8* %P) {
+entry:
+ %tmp4 = bitcast <1 x i64> %mask1 to <8 x i8> ; <<8 x i8>> [#uses=1]
+ %tmp6 = bitcast <1 x i64> %c64 to <8 x i8> ; <<8 x i8>> [#uses=1]
+ tail call void @llvm.x86.mmx.maskmovq( <8 x i8> %tmp6, <8 x i8> %tmp4, i8* %P )
+ ret void
+}
+
+declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*)
diff --git a/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll
new file mode 100644
index 0000000..b27ef83
--- /dev/null
+++ b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep punpckhwd
+
+declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>)
+
+declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>)
+
+define fastcc void @test(i32* %src, i32 %sbpr, i32* %dst, i32 %dbpr, i32 %w, i32 %h, i32 %dstalpha, i32 %mask) {
+ %tmp633 = shufflevector <8 x i16> zeroinitializer, <8 x i16> undef, <8 x i32> < i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7 >
+ %tmp715 = mul <8 x i16> zeroinitializer, %tmp633
+ %tmp776 = bitcast <8 x i16> %tmp715 to <4 x i32>
+ %tmp777 = add <4 x i32> %tmp776, shufflevector (<4 x i32> < i32 65537, i32 0, i32 0, i32 0 >, <4 x i32> < i32 65537, i32 0, i32 0, i32 0 >, <4 x i32> zeroinitializer)
+ %tmp805 = add <4 x i32> %tmp777, zeroinitializer
+ %tmp832 = bitcast <4 x i32> %tmp805 to <8 x i16>
+ %tmp838 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp832, <8 x i16> < i16 8, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef > )
+ %tmp1020 = tail call <16 x i8> @llvm.x86.sse2.packuswb.128( <8 x i16> zeroinitializer, <8 x i16> %tmp838 )
+ %tmp1030 = bitcast <16 x i8> %tmp1020 to <4 x i32>
+ %tmp1033 = add <4 x i32> zeroinitializer, %tmp1030
+ %tmp1048 = bitcast <4 x i32> %tmp1033 to <2 x i64>
+ %tmp1049 = or <2 x i64> %tmp1048, zeroinitializer
+ store <2 x i64> %tmp1049, <2 x i64>* null
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll b/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll
new file mode 100644
index 0000000..321e116
--- /dev/null
+++ b/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep GOTPCREL
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep ".align.*3"
+
+ %struct.A = type { [1024 x i8] }
+@_ZN1A1aE = global %struct.A zeroinitializer, align 32 ; <%struct.A*> [#uses=1]
[email protected]_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN1A1aE } ] ; <[1 x { i32, void ()* }]*> [#uses=0]
+
+define internal void @_GLOBAL__I__ZN1A1aE() section "__TEXT,__StaticInit,regular,pure_instructions" {
+entry:
+ br label %bb.i
+
+bb.i: ; preds = %bb.i, %entry
+ %i.1.i1.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb.i ] ; <i32> [#uses=2]
+ %tmp1012.i = sext i32 %i.1.i1.0 to i64 ; <i64> [#uses=1]
+ %tmp13.i = getelementptr %struct.A* @_ZN1A1aE, i32 0, i32 0, i64 %tmp1012.i ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp13.i
+ %indvar.next = add i32 %i.1.i1.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 1024 ; <i1> [#uses=1]
+ br i1 %exitcond, label %_Z41__static_initialization_and_destruction_0ii.exit, label %bb.i
+
+_Z41__static_initialization_and_destruction_0ii.exit: ; preds = %bb.i
+ ret void
+}
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2007-06-04-tailmerge4.ll b/test/CodeGen/X86/2007-06-04-tailmerge4.ll
new file mode 100644
index 0000000..baf2377
--- /dev/null
+++ b/test/CodeGen/X86/2007-06-04-tailmerge4.ll
@@ -0,0 +1,454 @@
+; RUN: llc < %s -enable-eh -asm-verbose | grep invcont131
+; PR 1496: tail merge was incorrectly removing this block
+
+; ModuleID = 'report.1.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+ %struct.ALLOC = type { %struct.string___XUB, [2 x i8] }
+ %struct.RETURN = type { i32, i32, i32, i64 }
+ %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* }
+ %struct.ada__tags__dispatch_table = type { [1 x i8*] }
+ %struct.ada__text_io__text_afcb = type { %struct.system__file_control_block__afcb, i32, i32, i32, i32, i32, %struct.ada__text_io__text_afcb*, i8, i8 }
+ %struct.string___XUB = type { i32, i32 }
+ %struct.string___XUP = type { i8*, %struct.string___XUB* }
+ %struct.system__file_control_block__afcb = type { %struct.ada__streams__root_stream_type, i32, %struct.string___XUP, i32, %struct.string___XUP, i8, i8, i8, i8, i8, i8, i8, %struct.system__file_control_block__afcb*, %struct.system__file_control_block__afcb* }
+ %struct.system__secondary_stack__mark_id = type { i8*, i32 }
+ %struct.wide_string___XUP = type { i16*, %struct.string___XUB* }
+@report_E = global i8 0 ; <i8*> [#uses=0]
+@report__test_status = internal global i8 1 ; <i8*> [#uses=8]
+@report__test_name = internal global [15 x i8] zeroinitializer ; <[15 x i8]*> [#uses=10]
+@report__test_name_len = internal global i32 0 ; <i32*> [#uses=15]
[email protected] = internal constant [12 x i8] c"report.adb\00\00" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 1 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [1 x i8] c":" ; <[1 x i8]*> [#uses=1]
[email protected] = internal constant [1 x i8] c" " ; <[1 x i8]*> [#uses=1]
[email protected] = internal constant [1 x i8] c"-" ; <[1 x i8]*> [#uses=1]
[email protected] = internal constant [10 x i8] c"0123456789" ; <[10 x i8]*> [#uses=12]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 3 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 6 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 5 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [0 x i8] zeroinitializer ; <[0 x i8]*> [#uses=1]
[email protected] = internal constant [3 x i8] c"2.5" ; <[3 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"ACATS " ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c",.,. " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [1 x i8] c"." ; <[1 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"---- " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c" - " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c" * " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c" + " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c" ! " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 37 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [37 x i8] c" PASSED ============================." ; <[37 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"==== " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [37 x i8] c" NOT-APPLICABLE ++++++++++++++++++++." ; <[37 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"++++ " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [37 x i8] c" TENTATIVELY PASSED !!!!!!!!!!!!!!!!." ; <[37 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"!!!! " ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [37 x i8] c" SEE '!' COMMENTS FOR SPECIAL NOTES!!" ; <[37 x i8]*> [#uses=1]
[email protected] = internal constant [37 x i8] c" FAILED ****************************." ; <[37 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"**** " ; <[5 x i8]*> [#uses=1]
+@__gnat_others_value = external constant i32 ; <i32*> [#uses=2]
+@system__soft_links__abort_undefer = external global void ()* ; <void ()**> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 2, i32 6 } ; <%struct.string___XUB*> [#uses=1]
+
+declare void @report__put_msg(i64 %msg.0.0)
+
+declare void @__gnat_rcheck_05(i8*, i32)
+
+declare void @__gnat_rcheck_12(i8*, i32)
+
+declare %struct.ada__text_io__text_afcb* @ada__text_io__standard_output()
+
+declare void @ada__text_io__set_col(%struct.ada__text_io__text_afcb*, i32)
+
+declare void @ada__text_io__put_line(%struct.ada__text_io__text_afcb*, i64)
+
+declare void @report__time_stamp(%struct.string___XUP* sret %agg.result)
+
+declare i64 @ada__calendar__clock()
+
+declare void @ada__calendar__split(%struct.RETURN* sret , i64)
+
+declare void @system__string_ops_concat_5__str_concat_5(%struct.string___XUP* sret , i64, i64, i64, i64, i64)
+
+declare void @system__string_ops_concat_3__str_concat_3(%struct.string___XUP* sret , i64, i64, i64)
+
+declare i8* @system__secondary_stack__ss_allocate(i32)
+
+declare void @report__test(i64 %name.0.0, i64 %descr.0.0)
+
+declare void @system__secondary_stack__ss_mark(%struct.system__secondary_stack__mark_id* sret )
+
+declare i8* @llvm.eh.exception()
+
+declare i32 @llvm.eh.selector(i8*, i8*, ...)
+
+declare i32 @llvm.eh.typeid.for(i8*)
+
+declare i32 @__gnat_eh_personality(...)
+
+declare i32 @_Unwind_Resume(...)
+
+declare void @__gnat_rcheck_07(i8*, i32)
+
+declare void @system__secondary_stack__ss_release(i64)
+
+declare void @report__comment(i64 %descr.0.0)
+
+declare void @report__failed(i64 %descr.0.0)
+
+declare void @report__not_applicable(i64 %descr.0.0)
+
+declare void @report__special_action(i64 %descr.0.0)
+
+define void @report__result() {
+entry:
+ %tmp = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3]
+ %A.210 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3]
+ %tmp5 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3]
+ %A.229 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3]
+ %tmp10 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3]
+ %A.248 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3]
+ %tmp15 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3]
+ %A.270 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3]
+ %tmp20 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3]
+ %A.284 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3]
+ %tmp25 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3]
+ call void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp sret )
+ %tmp28 = getelementptr %struct.system__secondary_stack__mark_id* %tmp, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp29 = load i8** %tmp28 ; <i8*> [#uses=2]
+ %tmp31 = getelementptr %struct.system__secondary_stack__mark_id* %tmp, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp32 = load i32* %tmp31 ; <i32> [#uses=2]
+ %tmp33 = load i8* @report__test_status ; <i8> [#uses=1]
+ switch i8 %tmp33, label %bb483 [
+ i8 0, label %bb
+ i8 2, label %bb143
+ i8 3, label %bb261
+ ]
+
+bb: ; preds = %entry
+ %tmp34 = load i32* @report__test_name_len ; <i32> [#uses=4]
+ %tmp35 = icmp sgt i32 %tmp34, 0 ; <i1> [#uses=2]
+ %tmp40 = icmp sgt i32 %tmp34, 15 ; <i1> [#uses=1]
+ %bothcond139 = and i1 %tmp35, %tmp40 ; <i1> [#uses=1]
+ br i1 %bothcond139, label %cond_true43, label %cond_next44
+
+cond_true43: ; preds = %bb
+ invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 212 )
+ to label %UnifiedUnreachableBlock unwind label %unwind
+
+unwind: ; preds = %invcont589, %cond_next567, %bb555, %cond_true497, %invcont249, %cond_next227, %bb215, %cond_true157, %invcont131, %cond_next109, %bb97, %cond_true43
+ %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1]
+ br label %cleanup717
+
+cond_next44: ; preds = %bb
+ %tmp72 = getelementptr %struct.string___XUB* %A.210, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp72
+ %tmp73 = getelementptr %struct.string___XUB* %A.210, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %tmp34, i32* %tmp73
+ br i1 %tmp35, label %cond_true80, label %cond_next109
+
+cond_true80: ; preds = %cond_next44
+ %tmp45.off = add i32 %tmp34, -1 ; <i32> [#uses=1]
+ %bothcond = icmp ugt i32 %tmp45.off, 14 ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb97, label %cond_next109
+
+bb97: ; preds = %cond_true80
+ invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 212 )
+ to label %UnifiedUnreachableBlock unwind label %unwind
+
+cond_next109: ; preds = %cond_true80, %cond_next44
+ %A.210128 = ptrtoint %struct.string___XUB* %A.210 to i32 ; <i32> [#uses=1]
+ %A.210128129 = zext i32 %A.210128 to i64 ; <i64> [#uses=1]
+ %A.210128129130 = shl i64 %A.210128129, 32 ; <i64> [#uses=1]
+ %A.210128129130.ins = or i64 %A.210128129130, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1]
+ invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp5 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str17 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.210128129130.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str16 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) )
+ to label %invcont131 unwind label %unwind
+
+invcont131: ; preds = %cond_next109
+ %tmp133 = getelementptr %struct.string___XUP* %tmp5, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp134 = load i8** %tmp133 ; <i8*> [#uses=1]
+ %tmp134120 = ptrtoint i8* %tmp134 to i32 ; <i32> [#uses=1]
+ %tmp134120121 = zext i32 %tmp134120 to i64 ; <i64> [#uses=1]
+ %tmp136 = getelementptr %struct.string___XUP* %tmp5, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %tmp137 = load %struct.string___XUB** %tmp136 ; <%struct.string___XUB*> [#uses=1]
+ %tmp137116 = ptrtoint %struct.string___XUB* %tmp137 to i32 ; <i32> [#uses=1]
+ %tmp137116117 = zext i32 %tmp137116 to i64 ; <i64> [#uses=1]
+ %tmp137116117118 = shl i64 %tmp137116117, 32 ; <i64> [#uses=1]
+ %tmp137116117118.ins = or i64 %tmp137116117118, %tmp134120121 ; <i64> [#uses=1]
+ invoke fastcc void @report__put_msg( i64 %tmp137116117118.ins )
+ to label %cond_next618 unwind label %unwind
+
+bb143: ; preds = %entry
+ %tmp144 = load i32* @report__test_name_len ; <i32> [#uses=4]
+ %tmp147 = icmp sgt i32 %tmp144, 0 ; <i1> [#uses=2]
+ %tmp154 = icmp sgt i32 %tmp144, 15 ; <i1> [#uses=1]
+ %bothcond140 = and i1 %tmp147, %tmp154 ; <i1> [#uses=1]
+ br i1 %bothcond140, label %cond_true157, label %cond_next160
+
+cond_true157: ; preds = %bb143
+ invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 215 )
+ to label %UnifiedUnreachableBlock unwind label %unwind
+
+cond_next160: ; preds = %bb143
+ %tmp189 = getelementptr %struct.string___XUB* %A.229, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp189
+ %tmp190 = getelementptr %struct.string___XUB* %A.229, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %tmp144, i32* %tmp190
+ br i1 %tmp147, label %cond_true197, label %cond_next227
+
+cond_true197: ; preds = %cond_next160
+ %tmp161.off = add i32 %tmp144, -1 ; <i32> [#uses=1]
+ %bothcond1 = icmp ugt i32 %tmp161.off, 14 ; <i1> [#uses=1]
+ br i1 %bothcond1, label %bb215, label %cond_next227
+
+bb215: ; preds = %cond_true197
+ invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 215 )
+ to label %UnifiedUnreachableBlock unwind label %unwind
+
+cond_next227: ; preds = %cond_true197, %cond_next160
+ %A.229105 = ptrtoint %struct.string___XUB* %A.229 to i32 ; <i32> [#uses=1]
+ %A.229105106 = zext i32 %A.229105 to i64 ; <i64> [#uses=1]
+ %A.229105106107 = shl i64 %A.229105106, 32 ; <i64> [#uses=1]
+ %A.229105106107.ins = or i64 %A.229105106107, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1]
+ invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp10 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str19 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.229105106107.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str18 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) )
+ to label %invcont249 unwind label %unwind
+
+invcont249: ; preds = %cond_next227
+ %tmp251 = getelementptr %struct.string___XUP* %tmp10, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp252 = load i8** %tmp251 ; <i8*> [#uses=1]
+ %tmp25297 = ptrtoint i8* %tmp252 to i32 ; <i32> [#uses=1]
+ %tmp2529798 = zext i32 %tmp25297 to i64 ; <i64> [#uses=1]
+ %tmp254 = getelementptr %struct.string___XUP* %tmp10, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %tmp255 = load %struct.string___XUB** %tmp254 ; <%struct.string___XUB*> [#uses=1]
+ %tmp25593 = ptrtoint %struct.string___XUB* %tmp255 to i32 ; <i32> [#uses=1]
+ %tmp2559394 = zext i32 %tmp25593 to i64 ; <i64> [#uses=1]
+ %tmp255939495 = shl i64 %tmp2559394, 32 ; <i64> [#uses=1]
+ %tmp255939495.ins = or i64 %tmp255939495, %tmp2529798 ; <i64> [#uses=1]
+ invoke fastcc void @report__put_msg( i64 %tmp255939495.ins )
+ to label %cond_next618 unwind label %unwind
+
+bb261: ; preds = %entry
+ %tmp262 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=2]
+ %tmp263 = load i32* @report__test_name_len ; <i32> [#uses=4]
+ %tmp266 = icmp sgt i32 %tmp263, 0 ; <i1> [#uses=2]
+ %tmp273 = icmp sgt i32 %tmp263, 15 ; <i1> [#uses=1]
+ %bothcond141 = and i1 %tmp266, %tmp273 ; <i1> [#uses=1]
+ br i1 %bothcond141, label %cond_true276, label %cond_next281
+
+cond_true276: ; preds = %bb261
+ invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 218 )
+ to label %UnifiedUnreachableBlock unwind label %unwind277
+
+unwind277: ; preds = %invcont467, %cond_next442, %invcont370, %cond_next348, %bb336, %cond_true276
+ %eh_ptr278 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1]
+ call void @llvm.stackrestore( i8* %tmp262 )
+ br label %cleanup717
+
+cond_next281: ; preds = %bb261
+ %tmp310 = getelementptr %struct.string___XUB* %A.248, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp310
+ %tmp311 = getelementptr %struct.string___XUB* %A.248, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %tmp263, i32* %tmp311
+ br i1 %tmp266, label %cond_true318, label %cond_next348
+
+cond_true318: ; preds = %cond_next281
+ %tmp282.off = add i32 %tmp263, -1 ; <i32> [#uses=1]
+ %bothcond2 = icmp ugt i32 %tmp282.off, 14 ; <i1> [#uses=1]
+ br i1 %bothcond2, label %bb336, label %cond_next348
+
+bb336: ; preds = %cond_true318
+ invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 218 )
+ to label %UnifiedUnreachableBlock unwind label %unwind277
+
+cond_next348: ; preds = %cond_true318, %cond_next281
+ %A.24882 = ptrtoint %struct.string___XUB* %A.248 to i32 ; <i32> [#uses=1]
+ %A.2488283 = zext i32 %A.24882 to i64 ; <i64> [#uses=1]
+ %A.248828384 = shl i64 %A.2488283, 32 ; <i64> [#uses=1]
+ %A.248828384.ins = or i64 %A.248828384, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1]
+ invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp15 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.248828384.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str20 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) )
+ to label %invcont370 unwind label %unwind277
+
+invcont370: ; preds = %cond_next348
+ %tmp372 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp373 = load i8** %tmp372 ; <i8*> [#uses=1]
+ %tmp37374 = ptrtoint i8* %tmp373 to i32 ; <i32> [#uses=1]
+ %tmp3737475 = zext i32 %tmp37374 to i64 ; <i64> [#uses=1]
+ %tmp375 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %tmp376 = load %struct.string___XUB** %tmp375 ; <%struct.string___XUB*> [#uses=1]
+ %tmp37670 = ptrtoint %struct.string___XUB* %tmp376 to i32 ; <i32> [#uses=1]
+ %tmp3767071 = zext i32 %tmp37670 to i64 ; <i64> [#uses=1]
+ %tmp376707172 = shl i64 %tmp3767071, 32 ; <i64> [#uses=1]
+ %tmp376707172.ins = or i64 %tmp376707172, %tmp3737475 ; <i64> [#uses=1]
+ invoke fastcc void @report__put_msg( i64 %tmp376707172.ins )
+ to label %invcont381 unwind label %unwind277
+
+invcont381: ; preds = %invcont370
+ %tmp382 = load i32* @report__test_name_len ; <i32> [#uses=6]
+ %tmp415 = icmp sgt i32 %tmp382, -1 ; <i1> [#uses=1]
+ %max416 = select i1 %tmp415, i32 %tmp382, i32 0 ; <i32> [#uses=1]
+ %tmp417 = alloca i8, i32 %max416 ; <i8*> [#uses=3]
+ %tmp423 = icmp sgt i32 %tmp382, 0 ; <i1> [#uses=1]
+ br i1 %tmp423, label %bb427, label %cond_next442
+
+bb427: ; preds = %invcont381
+ store i8 32, i8* %tmp417
+ %tmp434 = icmp eq i32 %tmp382, 1 ; <i1> [#uses=1]
+ br i1 %tmp434, label %cond_next442, label %cond_next438.preheader
+
+cond_next438.preheader: ; preds = %bb427
+ %tmp. = add i32 %tmp382, -1 ; <i32> [#uses=1]
+ br label %cond_next438
+
+cond_next438: ; preds = %cond_next438, %cond_next438.preheader
+ %indvar = phi i32 [ 0, %cond_next438.preheader ], [ %J130b.513.5, %cond_next438 ] ; <i32> [#uses=1]
+ %J130b.513.5 = add i32 %indvar, 1 ; <i32> [#uses=3]
+ %tmp43118 = getelementptr i8* %tmp417, i32 %J130b.513.5 ; <i8*> [#uses=1]
+ store i8 32, i8* %tmp43118
+ %exitcond = icmp eq i32 %J130b.513.5, %tmp. ; <i1> [#uses=1]
+ br i1 %exitcond, label %cond_next442, label %cond_next438
+
+cond_next442: ; preds = %cond_next438, %bb427, %invcont381
+ %tmp448 = getelementptr %struct.string___XUB* %A.270, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp448
+ %tmp449 = getelementptr %struct.string___XUB* %A.270, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %tmp382, i32* %tmp449
+ %tmp41762 = ptrtoint i8* %tmp417 to i32 ; <i32> [#uses=1]
+ %tmp4176263 = zext i32 %tmp41762 to i64 ; <i64> [#uses=1]
+ %A.27058 = ptrtoint %struct.string___XUB* %A.270 to i32 ; <i32> [#uses=1]
+ %A.2705859 = zext i32 %A.27058 to i64 ; <i64> [#uses=1]
+ %A.270585960 = shl i64 %A.2705859, 32 ; <i64> [#uses=1]
+ %A.270585960.ins = or i64 %tmp4176263, %A.270585960 ; <i64> [#uses=1]
+ invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp20 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.270585960.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str22 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) )
+ to label %invcont467 unwind label %unwind277
+
+invcont467: ; preds = %cond_next442
+ %tmp469 = getelementptr %struct.string___XUP* %tmp20, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp470 = load i8** %tmp469 ; <i8*> [#uses=1]
+ %tmp47050 = ptrtoint i8* %tmp470 to i32 ; <i32> [#uses=1]
+ %tmp4705051 = zext i32 %tmp47050 to i64 ; <i64> [#uses=1]
+ %tmp472 = getelementptr %struct.string___XUP* %tmp20, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %tmp473 = load %struct.string___XUB** %tmp472 ; <%struct.string___XUB*> [#uses=1]
+ %tmp47346 = ptrtoint %struct.string___XUB* %tmp473 to i32 ; <i32> [#uses=1]
+ %tmp4734647 = zext i32 %tmp47346 to i64 ; <i64> [#uses=1]
+ %tmp473464748 = shl i64 %tmp4734647, 32 ; <i64> [#uses=1]
+ %tmp473464748.ins = or i64 %tmp473464748, %tmp4705051 ; <i64> [#uses=1]
+ invoke fastcc void @report__put_msg( i64 %tmp473464748.ins )
+ to label %cleanup unwind label %unwind277
+
+cleanup: ; preds = %invcont467
+ call void @llvm.stackrestore( i8* %tmp262 )
+ br label %cond_next618
+
+bb483: ; preds = %entry
+ %tmp484 = load i32* @report__test_name_len ; <i32> [#uses=4]
+ %tmp487 = icmp sgt i32 %tmp484, 0 ; <i1> [#uses=2]
+ %tmp494 = icmp sgt i32 %tmp484, 15 ; <i1> [#uses=1]
+ %bothcond142 = and i1 %tmp487, %tmp494 ; <i1> [#uses=1]
+ br i1 %bothcond142, label %cond_true497, label %cond_next500
+
+cond_true497: ; preds = %bb483
+ invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 223 )
+ to label %UnifiedUnreachableBlock unwind label %unwind
+
+cond_next500: ; preds = %bb483
+ %tmp529 = getelementptr %struct.string___XUB* %A.284, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp529
+ %tmp530 = getelementptr %struct.string___XUB* %A.284, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %tmp484, i32* %tmp530
+ br i1 %tmp487, label %cond_true537, label %cond_next567
+
+cond_true537: ; preds = %cond_next500
+ %tmp501.off = add i32 %tmp484, -1 ; <i32> [#uses=1]
+ %bothcond3 = icmp ugt i32 %tmp501.off, 14 ; <i1> [#uses=1]
+ br i1 %bothcond3, label %bb555, label %cond_next567
+
+bb555: ; preds = %cond_true537
+ invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 223 )
+ to label %UnifiedUnreachableBlock unwind label %unwind
+
+cond_next567: ; preds = %cond_true537, %cond_next500
+ %A.28435 = ptrtoint %struct.string___XUB* %A.284 to i32 ; <i32> [#uses=1]
+ %A.2843536 = zext i32 %A.28435 to i64 ; <i64> [#uses=1]
+ %A.284353637 = shl i64 %A.2843536, 32 ; <i64> [#uses=1]
+ %A.284353637.ins = or i64 %A.284353637, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1]
+ invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp25 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str24 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.284353637.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str23 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) )
+ to label %invcont589 unwind label %unwind
+
+invcont589: ; preds = %cond_next567
+ %tmp591 = getelementptr %struct.string___XUP* %tmp25, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp592 = load i8** %tmp591 ; <i8*> [#uses=1]
+ %tmp59228 = ptrtoint i8* %tmp592 to i32 ; <i32> [#uses=1]
+ %tmp5922829 = zext i32 %tmp59228 to i64 ; <i64> [#uses=1]
+ %tmp594 = getelementptr %struct.string___XUP* %tmp25, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %tmp595 = load %struct.string___XUB** %tmp594 ; <%struct.string___XUB*> [#uses=1]
+ %tmp59524 = ptrtoint %struct.string___XUB* %tmp595 to i32 ; <i32> [#uses=1]
+ %tmp5952425 = zext i32 %tmp59524 to i64 ; <i64> [#uses=1]
+ %tmp595242526 = shl i64 %tmp5952425, 32 ; <i64> [#uses=1]
+ %tmp595242526.ins = or i64 %tmp595242526, %tmp5922829 ; <i64> [#uses=1]
+ invoke fastcc void @report__put_msg( i64 %tmp595242526.ins )
+ to label %cond_next618 unwind label %unwind
+
+cond_next618: ; preds = %invcont589, %cleanup, %invcont249, %invcont131
+ store i8 1, i8* @report__test_status
+ store i32 7, i32* @report__test_name_len
+ store i8 78, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 0)
+ store i8 79, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 1)
+ store i8 95, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 2)
+ store i8 78, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 3)
+ store i8 65, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 4)
+ store i8 77, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 5)
+ store i8 69, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 6)
+ %CHAIN.310.0.0.0.val5.i = ptrtoint i8* %tmp29 to i32 ; <i32> [#uses=1]
+ %CHAIN.310.0.0.0.val56.i = zext i32 %CHAIN.310.0.0.0.val5.i to i64 ; <i64> [#uses=1]
+ %CHAIN.310.0.0.1.val2.i = zext i32 %tmp32 to i64 ; <i64> [#uses=1]
+ %CHAIN.310.0.0.1.val23.i = shl i64 %CHAIN.310.0.0.1.val2.i, 32 ; <i64> [#uses=1]
+ %CHAIN.310.0.0.1.val23.ins.i = or i64 %CHAIN.310.0.0.1.val23.i, %CHAIN.310.0.0.0.val56.i ; <i64> [#uses=1]
+ call void @system__secondary_stack__ss_release( i64 %CHAIN.310.0.0.1.val23.ins.i )
+ ret void
+
+cleanup717: ; preds = %unwind277, %unwind
+ %eh_exception.0 = phi i8* [ %eh_ptr278, %unwind277 ], [ %eh_ptr, %unwind ] ; <i8*> [#uses=1]
+ %CHAIN.310.0.0.0.val5.i8 = ptrtoint i8* %tmp29 to i32 ; <i32> [#uses=1]
+ %CHAIN.310.0.0.0.val56.i9 = zext i32 %CHAIN.310.0.0.0.val5.i8 to i64 ; <i64> [#uses=1]
+ %CHAIN.310.0.0.1.val2.i10 = zext i32 %tmp32 to i64 ; <i64> [#uses=1]
+ %CHAIN.310.0.0.1.val23.i11 = shl i64 %CHAIN.310.0.0.1.val2.i10, 32 ; <i64> [#uses=1]
+ %CHAIN.310.0.0.1.val23.ins.i12 = or i64 %CHAIN.310.0.0.1.val23.i11, %CHAIN.310.0.0.0.val56.i9 ; <i64> [#uses=1]
+ call void @system__secondary_stack__ss_release( i64 %CHAIN.310.0.0.1.val23.ins.i12 )
+ call i32 (...)* @_Unwind_Resume( i8* %eh_exception.0 ) ; <i32>:0 [#uses=0]
+ unreachable
+
+UnifiedUnreachableBlock: ; preds = %bb555, %cond_true497, %bb336, %cond_true276, %bb215, %cond_true157, %bb97, %cond_true43
+ unreachable
+}
+
+declare i8* @llvm.stacksave()
+
+declare void @llvm.stackrestore(i8*)
+
+declare i32 @report__ident_int(i32 %x)
+
+declare i8 @report__equal(i32 %x, i32 %y)
+
+declare i8 @report__ident_char(i8 zeroext %x)
+
+declare i16 @report__ident_wide_char(i16 zeroext %x)
+
+declare i8 @report__ident_bool(i8 %x)
+
+declare void @report__ident_str(%struct.string___XUP* sret %agg.result, i64 %x.0.0)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare void @report__ident_wide_str(%struct.wide_string___XUP* sret %agg.result, i64 %x.0.0)
+
+declare void @__gnat_begin_handler(i8*)
+
+declare void @__gnat_end_handler(i8*)
+
+declare void @report__legal_file_name(%struct.string___XUP* sret %agg.result, i32 %x, i64 %nam.0.0)
+
+declare void @__gnat_rcheck_06(i8*, i32)
+
+declare void @system__string_ops__str_concat_cs(%struct.string___XUP* sret , i8 zeroext , i64)
diff --git a/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll
new file mode 100644
index 0000000..36a97ef
--- /dev/null
+++ b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll
@@ -0,0 +1,129 @@
+; PR1495
+; RUN: llc < %s -march=x86
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+ %struct.AVRational = type { i32, i32 }
+ %struct.FFTComplex = type { float, float }
+ %struct.FFTContext = type { i32, i32, i16*, %struct.FFTComplex*, %struct.FFTComplex*, void (%struct.FFTContext*, %struct.FFTComplex*)*, void (%struct.MDCTContext*, float*, float*, float*)* }
+ %struct.MDCTContext = type { i32, i32, float*, float*, %struct.FFTContext }
+ %struct.Minima = type { i32, i32, i32, i32 }
+ %struct.codebook_t = type { i32, i8*, i32*, i32, float, float, i32, i32, i32*, float*, float* }
+ %struct.floor_class_t = type { i32, i32, i32, i32* }
+ %struct.floor_t = type { i32, i32*, i32, %struct.floor_class_t*, i32, i32, i32, %struct.Minima* }
+ %struct.mapping_t = type { i32, i32*, i32*, i32*, i32, i32*, i32* }
+ %struct.residue_t = type { i32, i32, i32, i32, i32, i32, [8 x i8]*, [2 x float]* }
+ %struct.venc_context_t = type { i32, i32, [2 x i32], [2 x %struct.MDCTContext], [2 x float*], i32, float*, float*, float*, float*, float, i32, %struct.codebook_t*, i32, %struct.floor_t*, i32, %struct.residue_t*, i32, %struct.mapping_t*, i32, %struct.AVRational* }
+
+define fastcc i32 @put_main_header(%struct.venc_context_t* %venc, i8** %out) {
+entry:
+ br i1 false, label %bb1820, label %bb288.bb148_crit_edge
+
+bb288.bb148_crit_edge: ; preds = %entry
+ ret i32 0
+
+cond_next1712: ; preds = %bb1820.bb1680_crit_edge
+ ret i32 0
+
+bb1817: ; preds = %bb1820.bb1680_crit_edge
+ br label %bb1820
+
+bb1820: ; preds = %bb1817, %entry
+ %pb.1.50 = phi i32 [ %tmp1693, %bb1817 ], [ 8, %entry ] ; <i32> [#uses=3]
+ br i1 false, label %bb2093, label %bb1820.bb1680_crit_edge
+
+bb1820.bb1680_crit_edge: ; preds = %bb1820
+ %tmp1693 = add i32 %pb.1.50, 8 ; <i32> [#uses=2]
+ %tmp1702 = icmp slt i32 %tmp1693, 0 ; <i1> [#uses=1]
+ br i1 %tmp1702, label %cond_next1712, label %bb1817
+
+bb2093: ; preds = %bb1820
+ %tmp2102 = add i32 %pb.1.50, 65 ; <i32> [#uses=0]
+ %tmp2236 = add i32 %pb.1.50, 72 ; <i32> [#uses=1]
+ %tmp2237 = sdiv i32 %tmp2236, 8 ; <i32> [#uses=2]
+ br i1 false, label %bb2543, label %bb2536.bb2396_crit_edge
+
+bb2536.bb2396_crit_edge: ; preds = %bb2093
+ ret i32 0
+
+bb2543: ; preds = %bb2093
+ br i1 false, label %cond_next2576, label %bb2690
+
+cond_next2576: ; preds = %bb2543
+ ret i32 0
+
+bb2682: ; preds = %bb2690
+ ret i32 0
+
+bb2690: ; preds = %bb2543
+ br i1 false, label %bb2682, label %bb2698
+
+bb2698: ; preds = %bb2690
+ br i1 false, label %cond_next2726, label %bb2831
+
+cond_next2726: ; preds = %bb2698
+ ret i32 0
+
+bb2831: ; preds = %bb2698
+ br i1 false, label %cond_next2859, label %bb2964
+
+cond_next2859: ; preds = %bb2831
+ br i1 false, label %bb2943, label %cond_true2866
+
+cond_true2866: ; preds = %cond_next2859
+ br i1 false, label %cond_true2874, label %cond_false2897
+
+cond_true2874: ; preds = %cond_true2866
+ ret i32 0
+
+cond_false2897: ; preds = %cond_true2866
+ ret i32 0
+
+bb2943: ; preds = %cond_next2859
+ ret i32 0
+
+bb2964: ; preds = %bb2831
+ br i1 false, label %cond_next2997, label %bb4589
+
+cond_next2997: ; preds = %bb2964
+ ret i32 0
+
+bb3103: ; preds = %bb4589
+ ret i32 0
+
+bb4589: ; preds = %bb2964
+ br i1 false, label %bb3103, label %bb4597
+
+bb4597: ; preds = %bb4589
+ br i1 false, label %cond_next4630, label %bb4744
+
+cond_next4630: ; preds = %bb4597
+ br i1 false, label %bb4744, label %cond_true4724
+
+cond_true4724: ; preds = %cond_next4630
+ br i1 false, label %bb4736, label %bb7531
+
+bb4736: ; preds = %cond_true4724
+ ret i32 0
+
+bb4744: ; preds = %cond_next4630, %bb4597
+ ret i32 0
+
+bb7531: ; preds = %cond_true4724
+ %v_addr.023.0.i6 = add i32 %tmp2237, -255 ; <i32> [#uses=1]
+ br label %bb.i14
+
+bb.i14: ; preds = %bb.i14, %bb7531
+ %n.021.0.i8 = phi i32 [ 0, %bb7531 ], [ %indvar.next, %bb.i14 ] ; <i32> [#uses=2]
+ %tmp..i9 = mul i32 %n.021.0.i8, -255 ; <i32> [#uses=1]
+ %tmp5.i11 = add i32 %v_addr.023.0.i6, %tmp..i9 ; <i32> [#uses=1]
+ %tmp10.i12 = icmp ugt i32 %tmp5.i11, 254 ; <i1> [#uses=1]
+ %indvar.next = add i32 %n.021.0.i8, 1 ; <i32> [#uses=1]
+ br i1 %tmp10.i12, label %bb.i14, label %bb12.loopexit.i18
+
+bb12.loopexit.i18: ; preds = %bb.i14
+ call void @llvm.memcpy.i32( i8* null, i8* null, i32 %tmp2237, i32 1 )
+ ret i32 0
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/X86/2007-06-14-branchfold.ll b/test/CodeGen/X86/2007-06-14-branchfold.ll
new file mode 100644
index 0000000..2680b15
--- /dev/null
+++ b/test/CodeGen/X86/2007-06-14-branchfold.ll
@@ -0,0 +1,133 @@
+; RUN: llc < %s -march=x86 -mcpu=i686 | not grep jmp
+; check that branch folding understands FP_REG_KILL is not a branch
+
+target triple = "i686-pc-linux-gnu"
+ %struct.FRAME.c34003a = type { float, float }
+@report_E = global i8 0 ; <i8*> [#uses=0]
+
+define void @main() {
+entry:
+ %FRAME.31 = alloca %struct.FRAME.c34003a, align 8 ; <%struct.FRAME.c34003a*> [#uses=4]
+ %tmp20 = call i32 @report__ident_int( i32 -50 ) ; <i32> [#uses=1]
+ %tmp2021 = sitofp i32 %tmp20 to float ; <float> [#uses=5]
+ %tmp23 = fcmp ult float %tmp2021, 0xC7EFFFFFE0000000 ; <i1> [#uses=1]
+ %tmp26 = fcmp ugt float %tmp2021, 0x47EFFFFFE0000000 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp23, %tmp26 ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb, label %bb30
+
+bb: ; preds = %entry
+ unwind
+
+bb30: ; preds = %entry
+ %tmp35 = call i32 @report__ident_int( i32 50 ) ; <i32> [#uses=1]
+ %tmp3536 = sitofp i32 %tmp35 to float ; <float> [#uses=4]
+ %tmp38 = fcmp ult float %tmp3536, 0xC7EFFFFFE0000000 ; <i1> [#uses=1]
+ %tmp44 = fcmp ugt float %tmp3536, 0x47EFFFFFE0000000 ; <i1> [#uses=1]
+ %bothcond226 = or i1 %tmp38, %tmp44 ; <i1> [#uses=1]
+ br i1 %bothcond226, label %bb47, label %bb49
+
+bb47: ; preds = %bb30
+ unwind
+
+bb49: ; preds = %bb30
+ %tmp60 = fcmp ult float %tmp3536, %tmp2021 ; <i1> [#uses=1]
+ %tmp60.not = xor i1 %tmp60, true ; <i1> [#uses=1]
+ %tmp65 = fcmp olt float %tmp2021, 0xC7EFFFFFE0000000 ; <i1> [#uses=1]
+ %bothcond227 = and i1 %tmp65, %tmp60.not ; <i1> [#uses=1]
+ br i1 %bothcond227, label %cond_true68, label %cond_next70
+
+cond_true68: ; preds = %bb49
+ unwind
+
+cond_next70: ; preds = %bb49
+ %tmp71 = call i32 @report__ident_int( i32 -30 ) ; <i32> [#uses=1]
+ %tmp7172 = sitofp i32 %tmp71 to float ; <float> [#uses=3]
+ %tmp74 = fcmp ult float %tmp7172, 0xC7EFFFFFE0000000 ; <i1> [#uses=1]
+ %tmp80 = fcmp ugt float %tmp7172, 0x47EFFFFFE0000000 ; <i1> [#uses=1]
+ %bothcond228 = or i1 %tmp74, %tmp80 ; <i1> [#uses=1]
+ br i1 %bothcond228, label %bb83, label %bb85
+
+bb83: ; preds = %cond_next70
+ unwind
+
+bb85: ; preds = %cond_next70
+ %tmp90 = getelementptr %struct.FRAME.c34003a* %FRAME.31, i32 0, i32 1 ; <float*> [#uses=3]
+ store float %tmp7172, float* %tmp90
+ %tmp92 = call i32 @report__ident_int( i32 30 ) ; <i32> [#uses=1]
+ %tmp9293 = sitofp i32 %tmp92 to float ; <float> [#uses=7]
+ %tmp95 = fcmp ult float %tmp9293, 0xC7EFFFFFE0000000 ; <i1> [#uses=1]
+ %tmp101 = fcmp ugt float %tmp9293, 0x47EFFFFFE0000000 ; <i1> [#uses=1]
+ %bothcond229 = or i1 %tmp95, %tmp101 ; <i1> [#uses=1]
+ br i1 %bothcond229, label %bb104, label %bb106
+
+bb104: ; preds = %bb85
+ unwind
+
+bb106: ; preds = %bb85
+ %tmp111 = getelementptr %struct.FRAME.c34003a* %FRAME.31, i32 0, i32 0 ; <float*> [#uses=2]
+ store float %tmp9293, float* %tmp111
+ %tmp123 = load float* %tmp90 ; <float> [#uses=4]
+ %tmp125 = fcmp ult float %tmp9293, %tmp123 ; <i1> [#uses=1]
+ br i1 %tmp125, label %cond_next147, label %cond_true128
+
+cond_true128: ; preds = %bb106
+ %tmp133 = fcmp olt float %tmp123, %tmp2021 ; <i1> [#uses=1]
+ %tmp142 = fcmp ogt float %tmp9293, %tmp3536 ; <i1> [#uses=1]
+ %bothcond230 = or i1 %tmp133, %tmp142 ; <i1> [#uses=1]
+ br i1 %bothcond230, label %bb145, label %cond_next147
+
+bb145: ; preds = %cond_true128
+ unwind
+
+cond_next147: ; preds = %cond_true128, %bb106
+ %tmp157 = fcmp ugt float %tmp123, -3.000000e+01 ; <i1> [#uses=1]
+ %tmp165 = fcmp ult float %tmp9293, -3.000000e+01 ; <i1> [#uses=1]
+ %bothcond231 = or i1 %tmp157, %tmp165 ; <i1> [#uses=1]
+ br i1 %bothcond231, label %bb168, label %bb169
+
+bb168: ; preds = %cond_next147
+ unwind
+
+bb169: ; preds = %cond_next147
+ %tmp176 = fcmp ugt float %tmp123, 3.000000e+01 ; <i1> [#uses=1]
+ %tmp184 = fcmp ult float %tmp9293, 3.000000e+01 ; <i1> [#uses=1]
+ %bothcond232 = or i1 %tmp176, %tmp184 ; <i1> [#uses=1]
+ br i1 %bothcond232, label %bb187, label %bb188
+
+bb187: ; preds = %bb169
+ unwind
+
+bb188: ; preds = %bb169
+ %tmp192 = call fastcc float @c34003a__ident.154( %struct.FRAME.c34003a* %FRAME.31, float 3.000000e+01 ) ; <float> [#uses=2]
+ %tmp194 = load float* %tmp90 ; <float> [#uses=1]
+ %tmp196 = fcmp ugt float %tmp194, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp196, label %bb207, label %cond_next200
+
+cond_next200: ; preds = %bb188
+ %tmp202 = load float* %tmp111 ; <float> [#uses=1]
+ %tmp204 = fcmp ult float %tmp202, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp204, label %bb207, label %bb208
+
+bb207: ; preds = %cond_next200, %bb188
+ unwind
+
+bb208: ; preds = %cond_next200
+ %tmp212 = call fastcc float @c34003a__ident.154( %struct.FRAME.c34003a* %FRAME.31, float 0.000000e+00 ) ; <float> [#uses=1]
+ %tmp214 = fcmp oge float %tmp212, %tmp192 ; <i1> [#uses=1]
+ %tmp217 = fcmp oge float %tmp192, 1.000000e+02 ; <i1> [#uses=1]
+ %tmp221 = or i1 %tmp214, %tmp217 ; <i1> [#uses=1]
+ br i1 %tmp221, label %cond_true224, label %UnifiedReturnBlock
+
+cond_true224: ; preds = %bb208
+ call void @abort( ) noreturn
+ ret void
+
+UnifiedReturnBlock: ; preds = %bb208
+ ret void
+}
+
+declare fastcc float @c34003a__ident.154(%struct.FRAME.c34003a* %CHAIN.32, float %x)
+
+declare i32 @report__ident_int(i32 %x)
+
+declare void @abort() noreturn
diff --git a/test/CodeGen/X86/2007-06-15-IntToMMX.ll b/test/CodeGen/X86/2007-06-15-IntToMMX.ll
new file mode 100644
index 0000000..6128d8b
--- /dev/null
+++ b/test/CodeGen/X86/2007-06-15-IntToMMX.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep paddusw
+@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1]
+
+define void @foo(<1 x i64> %A, <1 x i64> %B) {
+entry:
+ %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1]
+ %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %tmp8, <1 x i64>* @R
+ tail call void @llvm.x86.mmx.emms( )
+ ret void
+}
+
+declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>)
+
+declare void @llvm.x86.mmx.emms()
diff --git a/test/CodeGen/X86/2007-06-28-X86-64-isel.ll b/test/CodeGen/X86/2007-06-28-X86-64-isel.ll
new file mode 100644
index 0000000..9d42c49
--- /dev/null
+++ b/test/CodeGen/X86/2007-06-28-X86-64-isel.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse2
+
+define void @test() {
+ %tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) )
+ %tmp2 = bitcast <8 x i16> %tmp1 to <4 x i32>
+ br i1 false, label %bb1, label %bb2
+
+bb2:
+ %tmp38007.i = extractelement <4 x i32> %tmp2, i32 3
+ ret void
+
+bb1:
+ ret void
+}
+
+declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>)
diff --git a/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll b/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll
new file mode 100644
index 0000000..d2d6388
--- /dev/null
+++ b/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define void @test() {
+entry:
+ br i1 false, label %bb13944.preheader, label %cond_true418
+
+cond_true418: ; preds = %entry
+ ret void
+
+bb13944.preheader: ; preds = %entry
+ br i1 false, label %bb3517, label %bb13968.preheader
+
+bb3517: ; preds = %bb13944.preheader
+ br i1 false, label %cond_false7408, label %cond_next11422
+
+cond_false7408: ; preds = %bb3517
+ switch i32 0, label %cond_false10578 [
+ i32 7, label %cond_next11422
+ i32 6, label %cond_true7828
+ i32 1, label %cond_true10095
+ i32 3, label %cond_true10095
+ i32 5, label %cond_true10176
+ i32 24, label %cond_true10176
+ ]
+
+cond_true7828: ; preds = %cond_false7408
+ br i1 false, label %cond_next8191, label %cond_true8045
+
+cond_true8045: ; preds = %cond_true7828
+ ret void
+
+cond_next8191: ; preds = %cond_true7828
+ %tmp8234 = sub <4 x i32> < i32 939524096, i32 939524096, i32 939524096, i32 939524096 >, zeroinitializer ; <<4 x i32>> [#uses=0]
+ ret void
+
+cond_true10095: ; preds = %cond_false7408, %cond_false7408
+ ret void
+
+cond_true10176: ; preds = %cond_false7408, %cond_false7408
+ ret void
+
+cond_false10578: ; preds = %cond_false7408
+ ret void
+
+cond_next11422: ; preds = %cond_false7408, %bb3517
+ ret void
+
+bb13968.preheader: ; preds = %bb13944.preheader
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
new file mode 100644
index 0000000..dc11eec9
--- /dev/null
+++ b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define void @test(<4 x float>* %arg) {
+ %tmp89 = getelementptr <4 x float>* %arg, i64 3
+ %tmp1144 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, zeroinitializer
+ store <4 x float> %tmp1144, <4 x float>* null
+ %tmp1149 = load <4 x float>* %tmp89
+ %tmp1150 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp1149
+ store <4 x float> %tmp1150, <4 x float>* %tmp89
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
new file mode 100644
index 0000000..2c513f1
--- /dev/null
+++ b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rsi, %mm0}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rdi, %mm1}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {paddusw %mm0, %mm1}
+
+@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1]
+
+define void @foo(<1 x i64> %A, <1 x i64> %B) nounwind {
+entry:
+ %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1]
+ %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %tmp8, <1 x i64>* @R
+ tail call void @llvm.x86.mmx.emms( )
+ ret void
+}
+
+declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>)
+
+declare void @llvm.x86.mmx.emms()
diff --git a/test/CodeGen/X86/2007-07-10-StackerAssert.ll b/test/CodeGen/X86/2007-07-10-StackerAssert.ll
new file mode 100644
index 0000000..d611677
--- /dev/null
+++ b/test/CodeGen/X86/2007-07-10-StackerAssert.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic
+; PR1545
+
[email protected] = external constant [56 x i8] ; <[56 x i8]*> [#uses=1]
+
+declare void @PR_LogPrint(i8*, ...)
+
+define i32 @_ZN13nsPrintEngine19SetupToPrintContentEP16nsIDeviceContextP12nsIDOMWindow() {
+entry:
+ br i1 false, label %cond_true122, label %cond_next453
+
+cond_true122: ; preds = %entry
+ br i1 false, label %bb164, label %cond_true136
+
+cond_true136: ; preds = %cond_true122
+ ret i32 0
+
+bb164: ; preds = %cond_true122
+ br i1 false, label %bb383, label %cond_true354
+
+cond_true354: ; preds = %bb164
+ ret i32 0
+
+bb383: ; preds = %bb164
+ %tmp408 = load float* null ; <float> [#uses=2]
+ br i1 false, label %cond_true425, label %cond_next443
+
+cond_true425: ; preds = %bb383
+ %tmp430 = load float* null ; <float> [#uses=1]
+ %tmp432 = fsub float %tmp430, %tmp408 ; <float> [#uses=1]
+ %tmp432433 = fpext float %tmp432 to double ; <double> [#uses=1]
+ %tmp434435 = fpext float %tmp408 to double ; <double> [#uses=1]
+ call void (i8*, ...)* @PR_LogPrint( i8* getelementptr ([56 x i8]* @.str97, i32 0, i32 0), double 0.000000e+00, double %tmp434435, double %tmp432433 )
+ ret i32 0
+
+cond_next443: ; preds = %bb383
+ ret i32 0
+
+cond_next453: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2007-07-18-Vector-Extract.ll b/test/CodeGen/X86/2007-07-18-Vector-Extract.ll
new file mode 100644
index 0000000..8625b27
--- /dev/null
+++ b/test/CodeGen/X86/2007-07-18-Vector-Extract.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax}
+; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax}
+define i64 @foo_0(<2 x i64>* %val) {
+entry:
+ %val12 = getelementptr <2 x i64>* %val, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp7 = load i64* %val12 ; <i64> [#uses=1]
+ ret i64 %tmp7
+}
+
+define i64 @foo_1(<2 x i64>* %val) {
+entry:
+ %tmp2.gep = getelementptr <2 x i64>* %val, i32 0, i32 1 ; <i64*> [#uses=1]
+ %tmp4 = load i64* %tmp2.gep ; <i64> [#uses=1]
+ ret i64 %tmp4
+}
diff --git a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
new file mode 100644
index 0000000..3cd8052
--- /dev/null
+++ b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | not grep movl
+
+define i8 @t(i8 zeroext %x, i8 zeroext %y) zeroext {
+ %tmp2 = add i8 %x, 2
+ %tmp4 = add i8 %y, -2
+ %tmp5 = mul i8 %tmp4, %tmp2
+ ret i8 %tmp5
+}
diff --git a/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll b/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
new file mode 100644
index 0000000..7768f36
--- /dev/null
+++ b/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
@@ -0,0 +1,235 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep "movb %ah, %r"
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, [4 x i8], i64 }
+ %struct.PyBoolScalarObject = type { i64, %struct._typeobject*, i8 }
+ %struct.PyBufferProcs = type { i64 (%struct.PyObject*, i64, i8**)*, i64 (%struct.PyObject*, i64, i8**)*, i64 (%struct.PyObject*, i64*)*, i64 (%struct.PyObject*, i64, i8**)* }
+ %struct.PyGetSetDef = type { i8*, %struct.PyObject* (%struct.PyObject*, i8*)*, i32 (%struct.PyObject*, %struct.PyObject*, i8*)*, i8*, i8* }
+ %struct.PyMappingMethods = type { i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)* }
+ %struct.PyMemberDef = type opaque
+ %struct.PyMethodDef = type { i8*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32, i8* }
+ %struct.PyNumberMethods = type { %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, i32 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject**, %struct.PyObject**)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)* }
+ %struct.PyObject = type { i64, %struct._typeobject* }
+ %struct.PySequenceMethods = type { i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, i64)*, %struct.PyObject* (%struct.PyObject*, i64)*, %struct.PyObject* (%struct.PyObject*, i64, i64)*, i32 (%struct.PyObject*, i64, %struct.PyObject*)*, i32 (%struct.PyObject*, i64, i64, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, i64)* }
+ %struct.PyTupleObject = type { i64, %struct._typeobject*, i64, [1 x %struct.PyObject*] }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct._typeobject = type { i64, %struct._typeobject*, i64, i8*, i64, i64, void (%struct.PyObject*)*, i32 (%struct.PyObject*, %struct.FILE*, i32)*, %struct.PyObject* (%struct.PyObject*, i8*)*, i32 (%struct.PyObject*, i8*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyNumberMethods*, %struct.PySequenceMethods*, %struct.PyMappingMethods*, i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyBufferProcs*, i64, i8*, i32 (%struct.PyObject*, i32 (%struct.PyObject*, i8*)*, i8*)*, i32 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, i32)*, i64, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyMethodDef*, %struct.PyMemberDef*, %struct.PyGetSetDef*, %struct._typeobject*, %struct.PyObject*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, i64, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct._typeobject*, i64)*, %struct.PyObject* (%struct._typeobject*, %struct.PyObject*, %struct.PyObject*)*, void (i8*)*, i32 (%struct.PyObject*)*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, void (%struct.PyObject*)* }
+@PyArray_API = external global i8** ; <i8***> [#uses=4]
+@PyUFunc_API = external global i8** ; <i8***> [#uses=4]
[email protected] = external constant [14 x i8] ; <[14 x i8]*> [#uses=1]
+
+define %struct.PyObject* @ubyte_divmod(%struct.PyObject* %a, %struct.PyObject* %b) {
+entry:
+ %arg1 = alloca i8, align 1 ; <i8*> [#uses=3]
+ %arg2 = alloca i8, align 1 ; <i8*> [#uses=3]
+ %first = alloca i32, align 4 ; <i32*> [#uses=2]
+ %bufsize = alloca i32, align 4 ; <i32*> [#uses=1]
+ %errmask = alloca i32, align 4 ; <i32*> [#uses=2]
+ %errobj = alloca %struct.PyObject*, align 8 ; <%struct.PyObject**> [#uses=2]
+ %tmp3.i = call fastcc i32 @_ubyte_convert_to_ctype( %struct.PyObject* %a, i8* %arg1 ) ; <i32> [#uses=2]
+ %tmp5.i = icmp slt i32 %tmp3.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp5.i, label %_ubyte_convert2_to_ctypes.exit, label %cond_next.i
+
+cond_next.i: ; preds = %entry
+ %tmp11.i = call fastcc i32 @_ubyte_convert_to_ctype( %struct.PyObject* %b, i8* %arg2 ) ; <i32> [#uses=2]
+ %tmp13.i = icmp slt i32 %tmp11.i, 0 ; <i1> [#uses=1]
+ %retval.i = select i1 %tmp13.i, i32 %tmp11.i, i32 0 ; <i32> [#uses=1]
+ switch i32 %retval.i, label %bb35 [
+ i32 -2, label %bb17
+ i32 -1, label %bb4
+ ]
+
+_ubyte_convert2_to_ctypes.exit: ; preds = %entry
+ switch i32 %tmp3.i, label %bb35 [
+ i32 -2, label %bb17
+ i32 -1, label %bb4
+ ]
+
+bb4: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i
+ %tmp5 = load i8*** @PyArray_API, align 8 ; <i8**> [#uses=1]
+ %tmp6 = getelementptr i8** %tmp5, i64 2 ; <i8**> [#uses=1]
+ %tmp7 = load i8** %tmp6 ; <i8*> [#uses=1]
+ %tmp78 = bitcast i8* %tmp7 to %struct._typeobject* ; <%struct._typeobject*> [#uses=1]
+ %tmp9 = getelementptr %struct._typeobject* %tmp78, i32 0, i32 12 ; <%struct.PyNumberMethods**> [#uses=1]
+ %tmp10 = load %struct.PyNumberMethods** %tmp9 ; <%struct.PyNumberMethods*> [#uses=1]
+ %tmp11 = getelementptr %struct.PyNumberMethods* %tmp10, i32 0, i32 5 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)**> [#uses=1]
+ %tmp12 = load %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)** %tmp11 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*> [#uses=1]
+ %tmp15 = call %struct.PyObject* %tmp12( %struct.PyObject* %a, %struct.PyObject* %b ) ; <%struct.PyObject*> [#uses=1]
+ ret %struct.PyObject* %tmp15
+
+bb17: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i
+ %tmp18 = call %struct.PyObject* @PyErr_Occurred( ) ; <%struct.PyObject*> [#uses=1]
+ %tmp19 = icmp eq %struct.PyObject* %tmp18, null ; <i1> [#uses=1]
+ br i1 %tmp19, label %cond_next, label %UnifiedReturnBlock
+
+cond_next: ; preds = %bb17
+ %tmp22 = load i8*** @PyArray_API, align 8 ; <i8**> [#uses=1]
+ %tmp23 = getelementptr i8** %tmp22, i64 10 ; <i8**> [#uses=1]
+ %tmp24 = load i8** %tmp23 ; <i8*> [#uses=1]
+ %tmp2425 = bitcast i8* %tmp24 to %struct._typeobject* ; <%struct._typeobject*> [#uses=1]
+ %tmp26 = getelementptr %struct._typeobject* %tmp2425, i32 0, i32 12 ; <%struct.PyNumberMethods**> [#uses=1]
+ %tmp27 = load %struct.PyNumberMethods** %tmp26 ; <%struct.PyNumberMethods*> [#uses=1]
+ %tmp28 = getelementptr %struct.PyNumberMethods* %tmp27, i32 0, i32 5 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)**> [#uses=1]
+ %tmp29 = load %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)** %tmp28 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*> [#uses=1]
+ %tmp32 = call %struct.PyObject* %tmp29( %struct.PyObject* %a, %struct.PyObject* %b ) ; <%struct.PyObject*> [#uses=1]
+ ret %struct.PyObject* %tmp32
+
+bb35: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i
+ %tmp36 = load i8*** @PyUFunc_API, align 8 ; <i8**> [#uses=1]
+ %tmp37 = getelementptr i8** %tmp36, i64 27 ; <i8**> [#uses=1]
+ %tmp38 = load i8** %tmp37 ; <i8*> [#uses=1]
+ %tmp3839 = bitcast i8* %tmp38 to void ()* ; <void ()*> [#uses=1]
+ call void %tmp3839( )
+ %tmp40 = load i8* %arg2, align 1 ; <i8> [#uses=4]
+ %tmp1.i = icmp eq i8 %tmp40, 0 ; <i1> [#uses=2]
+ br i1 %tmp1.i, label %cond_true.i, label %cond_false.i
+
+cond_true.i: ; preds = %bb35
+ %tmp3.i196 = call i32 @feraiseexcept( i32 4 ) ; <i32> [#uses=0]
+ %tmp46207 = load i8* %arg2, align 1 ; <i8> [#uses=3]
+ %tmp48208 = load i8* %arg1, align 1 ; <i8> [#uses=2]
+ %tmp1.i197210 = icmp eq i8 %tmp48208, 0 ; <i1> [#uses=1]
+ %tmp4.i212 = icmp eq i8 %tmp46207, 0 ; <i1> [#uses=1]
+ %tmp7.i198213 = or i1 %tmp1.i197210, %tmp4.i212 ; <i1> [#uses=1]
+ br i1 %tmp7.i198213, label %cond_true.i200, label %cond_next17.i
+
+cond_false.i: ; preds = %bb35
+ %tmp42 = load i8* %arg1, align 1 ; <i8> [#uses=3]
+ %tmp7.i = udiv i8 %tmp42, %tmp40 ; <i8> [#uses=2]
+ %tmp1.i197 = icmp eq i8 %tmp42, 0 ; <i1> [#uses=1]
+ %tmp7.i198 = or i1 %tmp1.i197, %tmp1.i ; <i1> [#uses=1]
+ br i1 %tmp7.i198, label %cond_true.i200, label %cond_next17.i
+
+cond_true.i200: ; preds = %cond_false.i, %cond_true.i
+ %out.0 = phi i8 [ 0, %cond_true.i ], [ %tmp7.i, %cond_false.i ] ; <i8> [#uses=2]
+ %tmp46202.0 = phi i8 [ %tmp46207, %cond_true.i ], [ %tmp40, %cond_false.i ] ; <i8> [#uses=1]
+ %tmp11.i199 = icmp eq i8 %tmp46202.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp11.i199, label %cond_true14.i, label %ubyte_ctype_remainder.exit
+
+cond_true14.i: ; preds = %cond_true.i200
+ %tmp15.i = call i32 @feraiseexcept( i32 4 ) ; <i32> [#uses=0]
+ br label %ubyte_ctype_remainder.exit
+
+cond_next17.i: ; preds = %cond_false.i, %cond_true.i
+ %out.1 = phi i8 [ 0, %cond_true.i ], [ %tmp7.i, %cond_false.i ] ; <i8> [#uses=1]
+ %tmp46202.1 = phi i8 [ %tmp46207, %cond_true.i ], [ %tmp40, %cond_false.i ] ; <i8> [#uses=1]
+ %tmp48205.1 = phi i8 [ %tmp48208, %cond_true.i ], [ %tmp42, %cond_false.i ] ; <i8> [#uses=1]
+ %tmp20.i = urem i8 %tmp48205.1, %tmp46202.1 ; <i8> [#uses=1]
+ br label %ubyte_ctype_remainder.exit
+
+ubyte_ctype_remainder.exit: ; preds = %cond_next17.i, %cond_true14.i, %cond_true.i200
+ %out2.0 = phi i8 [ %tmp20.i, %cond_next17.i ], [ 0, %cond_true14.i ], [ 0, %cond_true.i200 ] ; <i8> [#uses=1]
+ %out.2 = phi i8 [ %out.1, %cond_next17.i ], [ %out.0, %cond_true14.i ], [ %out.0, %cond_true.i200 ] ; <i8> [#uses=1]
+ %tmp52 = load i8*** @PyUFunc_API, align 8 ; <i8**> [#uses=1]
+ %tmp53 = getelementptr i8** %tmp52, i64 28 ; <i8**> [#uses=1]
+ %tmp54 = load i8** %tmp53 ; <i8*> [#uses=1]
+ %tmp5455 = bitcast i8* %tmp54 to i32 ()* ; <i32 ()*> [#uses=1]
+ %tmp56 = call i32 %tmp5455( ) ; <i32> [#uses=2]
+ %tmp58 = icmp eq i32 %tmp56, 0 ; <i1> [#uses=1]
+ br i1 %tmp58, label %cond_next89, label %cond_true61
+
+cond_true61: ; preds = %ubyte_ctype_remainder.exit
+ %tmp62 = load i8*** @PyUFunc_API, align 8 ; <i8**> [#uses=1]
+ %tmp63 = getelementptr i8** %tmp62, i64 25 ; <i8**> [#uses=1]
+ %tmp64 = load i8** %tmp63 ; <i8*> [#uses=1]
+ %tmp6465 = bitcast i8* %tmp64 to i32 (i8*, i32*, i32*, %struct.PyObject**)* ; <i32 (i8*, i32*, i32*, %struct.PyObject**)*> [#uses=1]
+ %tmp67 = call i32 %tmp6465( i8* getelementptr ([14 x i8]* @.str5, i32 0, i64 0), i32* %bufsize, i32* %errmask, %struct.PyObject** %errobj ) ; <i32> [#uses=1]
+ %tmp68 = icmp slt i32 %tmp67, 0 ; <i1> [#uses=1]
+ br i1 %tmp68, label %UnifiedReturnBlock, label %cond_next73
+
+cond_next73: ; preds = %cond_true61
+ store i32 1, i32* %first, align 4
+ %tmp74 = load i8*** @PyUFunc_API, align 8 ; <i8**> [#uses=1]
+ %tmp75 = getelementptr i8** %tmp74, i64 29 ; <i8**> [#uses=1]
+ %tmp76 = load i8** %tmp75 ; <i8*> [#uses=1]
+ %tmp7677 = bitcast i8* %tmp76 to i32 (i32, %struct.PyObject*, i32, i32*)* ; <i32 (i32, %struct.PyObject*, i32, i32*)*> [#uses=1]
+ %tmp79 = load %struct.PyObject** %errobj, align 8 ; <%struct.PyObject*> [#uses=1]
+ %tmp80 = load i32* %errmask, align 4 ; <i32> [#uses=1]
+ %tmp82 = call i32 %tmp7677( i32 %tmp80, %struct.PyObject* %tmp79, i32 %tmp56, i32* %first ) ; <i32> [#uses=1]
+ %tmp83 = icmp eq i32 %tmp82, 0 ; <i1> [#uses=1]
+ br i1 %tmp83, label %cond_next89, label %UnifiedReturnBlock
+
+cond_next89: ; preds = %cond_next73, %ubyte_ctype_remainder.exit
+ %tmp90 = call %struct.PyObject* @PyTuple_New( i64 2 ) ; <%struct.PyObject*> [#uses=9]
+ %tmp92 = icmp eq %struct.PyObject* %tmp90, null ; <i1> [#uses=1]
+ br i1 %tmp92, label %UnifiedReturnBlock, label %cond_next97
+
+cond_next97: ; preds = %cond_next89
+ %tmp98 = load i8*** @PyArray_API, align 8 ; <i8**> [#uses=1]
+ %tmp99 = getelementptr i8** %tmp98, i64 25 ; <i8**> [#uses=1]
+ %tmp100 = load i8** %tmp99 ; <i8*> [#uses=1]
+ %tmp100101 = bitcast i8* %tmp100 to %struct._typeobject* ; <%struct._typeobject*> [#uses=2]
+ %tmp102 = getelementptr %struct._typeobject* %tmp100101, i32 0, i32 38 ; <%struct.PyObject* (%struct._typeobject*, i64)**> [#uses=1]
+ %tmp103 = load %struct.PyObject* (%struct._typeobject*, i64)** %tmp102 ; <%struct.PyObject* (%struct._typeobject*, i64)*> [#uses=1]
+ %tmp108 = call %struct.PyObject* %tmp103( %struct._typeobject* %tmp100101, i64 0 ) ; <%struct.PyObject*> [#uses=3]
+ %tmp110 = icmp eq %struct.PyObject* %tmp108, null ; <i1> [#uses=1]
+ br i1 %tmp110, label %cond_true113, label %cond_next135
+
+cond_true113: ; preds = %cond_next97
+ %tmp115 = getelementptr %struct.PyObject* %tmp90, i32 0, i32 0 ; <i64*> [#uses=2]
+ %tmp116 = load i64* %tmp115 ; <i64> [#uses=1]
+ %tmp117 = add i64 %tmp116, -1 ; <i64> [#uses=2]
+ store i64 %tmp117, i64* %tmp115
+ %tmp123 = icmp eq i64 %tmp117, 0 ; <i1> [#uses=1]
+ br i1 %tmp123, label %cond_true126, label %UnifiedReturnBlock
+
+cond_true126: ; preds = %cond_true113
+ %tmp128 = getelementptr %struct.PyObject* %tmp90, i32 0, i32 1 ; <%struct._typeobject**> [#uses=1]
+ %tmp129 = load %struct._typeobject** %tmp128 ; <%struct._typeobject*> [#uses=1]
+ %tmp130 = getelementptr %struct._typeobject* %tmp129, i32 0, i32 6 ; <void (%struct.PyObject*)**> [#uses=1]
+ %tmp131 = load void (%struct.PyObject*)** %tmp130 ; <void (%struct.PyObject*)*> [#uses=1]
+ call void %tmp131( %struct.PyObject* %tmp90 )
+ ret %struct.PyObject* null
+
+cond_next135: ; preds = %cond_next97
+ %tmp136137 = bitcast %struct.PyObject* %tmp108 to %struct.PyBoolScalarObject* ; <%struct.PyBoolScalarObject*> [#uses=1]
+ %tmp139 = getelementptr %struct.PyBoolScalarObject* %tmp136137, i32 0, i32 2 ; <i8*> [#uses=1]
+ store i8 %out.2, i8* %tmp139
+ %tmp140141 = bitcast %struct.PyObject* %tmp90 to %struct.PyTupleObject* ; <%struct.PyTupleObject*> [#uses=2]
+ %tmp143 = getelementptr %struct.PyTupleObject* %tmp140141, i32 0, i32 3, i64 0 ; <%struct.PyObject**> [#uses=1]
+ store %struct.PyObject* %tmp108, %struct.PyObject** %tmp143
+ %tmp145 = load i8*** @PyArray_API, align 8 ; <i8**> [#uses=1]
+ %tmp146 = getelementptr i8** %tmp145, i64 25 ; <i8**> [#uses=1]
+ %tmp147 = load i8** %tmp146 ; <i8*> [#uses=1]
+ %tmp147148 = bitcast i8* %tmp147 to %struct._typeobject* ; <%struct._typeobject*> [#uses=2]
+ %tmp149 = getelementptr %struct._typeobject* %tmp147148, i32 0, i32 38 ; <%struct.PyObject* (%struct._typeobject*, i64)**> [#uses=1]
+ %tmp150 = load %struct.PyObject* (%struct._typeobject*, i64)** %tmp149 ; <%struct.PyObject* (%struct._typeobject*, i64)*> [#uses=1]
+ %tmp155 = call %struct.PyObject* %tmp150( %struct._typeobject* %tmp147148, i64 0 ) ; <%struct.PyObject*> [#uses=3]
+ %tmp157 = icmp eq %struct.PyObject* %tmp155, null ; <i1> [#uses=1]
+ br i1 %tmp157, label %cond_true160, label %cond_next182
+
+cond_true160: ; preds = %cond_next135
+ %tmp162 = getelementptr %struct.PyObject* %tmp90, i32 0, i32 0 ; <i64*> [#uses=2]
+ %tmp163 = load i64* %tmp162 ; <i64> [#uses=1]
+ %tmp164 = add i64 %tmp163, -1 ; <i64> [#uses=2]
+ store i64 %tmp164, i64* %tmp162
+ %tmp170 = icmp eq i64 %tmp164, 0 ; <i1> [#uses=1]
+ br i1 %tmp170, label %cond_true173, label %UnifiedReturnBlock
+
+cond_true173: ; preds = %cond_true160
+ %tmp175 = getelementptr %struct.PyObject* %tmp90, i32 0, i32 1 ; <%struct._typeobject**> [#uses=1]
+ %tmp176 = load %struct._typeobject** %tmp175 ; <%struct._typeobject*> [#uses=1]
+ %tmp177 = getelementptr %struct._typeobject* %tmp176, i32 0, i32 6 ; <void (%struct.PyObject*)**> [#uses=1]
+ %tmp178 = load void (%struct.PyObject*)** %tmp177 ; <void (%struct.PyObject*)*> [#uses=1]
+ call void %tmp178( %struct.PyObject* %tmp90 )
+ ret %struct.PyObject* null
+
+cond_next182: ; preds = %cond_next135
+ %tmp183184 = bitcast %struct.PyObject* %tmp155 to %struct.PyBoolScalarObject* ; <%struct.PyBoolScalarObject*> [#uses=1]
+ %tmp186 = getelementptr %struct.PyBoolScalarObject* %tmp183184, i32 0, i32 2 ; <i8*> [#uses=1]
+ store i8 %out2.0, i8* %tmp186
+ %tmp190 = getelementptr %struct.PyTupleObject* %tmp140141, i32 0, i32 3, i64 1 ; <%struct.PyObject**> [#uses=1]
+ store %struct.PyObject* %tmp155, %struct.PyObject** %tmp190
+ ret %struct.PyObject* %tmp90
+
+UnifiedReturnBlock: ; preds = %cond_true160, %cond_true113, %cond_next89, %cond_next73, %cond_true61, %bb17
+ ret %struct.PyObject* null
+}
+
+declare i32 @feraiseexcept(i32)
+
+declare fastcc i32 @_ubyte_convert_to_ctype(%struct.PyObject*, i8*)
+
+declare %struct.PyObject* @PyErr_Occurred()
+
+declare %struct.PyObject* @PyTuple_New(i64)
diff --git a/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll b/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
new file mode 100644
index 0000000..e93092f
--- /dev/null
+++ b/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 | grep {movsbl}
+
+@X = global i32 0 ; <i32*> [#uses=1]
+
+define i8 @_Z3fooi(i32 %x) signext {
+entry:
+ store i32 %x, i32* @X, align 4
+ %retval67 = trunc i32 %x to i8 ; <i8> [#uses=1]
+ ret i8 %retval67
+}
diff --git a/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll b/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll
new file mode 100644
index 0000000..c90a85f1
--- /dev/null
+++ b/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 | not grep drectve
+; PR1607
+
+%hlvm_programs_element = type { i8*, i32 (i32, i8**)* }
+@hlvm_programs = appending constant [1 x %hlvm_programs_element]
+zeroinitializer
+
+define %hlvm_programs_element* @hlvm_get_programs() {
+entry:
+ ret %hlvm_programs_element* getelementptr([1 x %hlvm_programs_element]*
+ @hlvm_programs, i32 0, i32 0)
+}
diff --git a/test/CodeGen/X86/2007-09-05-InvalidAsm.ll b/test/CodeGen/X86/2007-09-05-InvalidAsm.ll
new file mode 100644
index 0000000..5acb051
--- /dev/null
+++ b/test/CodeGen/X86/2007-09-05-InvalidAsm.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -x86-asm-syntax=intel | not grep {lea\[\[:space:\]\]R}
+
+ %struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* }
+ %struct.AGenericManager = type <{ i8 }>
+ %struct.ComponentInstanceRecord = type opaque
+ %struct.ComponentParameters = type { [1 x i64] }
+
+define i32 @_ZN12AGenericCall10MapIDPtrAtEsRP23ComponentInstanceRecord(%struct.AGenericCall* %this, i16 signext %param, %struct.ComponentInstanceRecord** %instance) {
+entry:
+ %tmp4 = icmp slt i16 %param, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ %tmp1415 = shl i16 %param, 3 ; <i16> [#uses=1]
+ %tmp17 = getelementptr %struct.AGenericCall* %this, i32 0, i32 1 ; <%struct.ComponentParameters**> [#uses=1]
+ %tmp18 = load %struct.ComponentParameters** %tmp17, align 8 ; <%struct.ComponentParameters*> [#uses=1]
+ %tmp1920 = bitcast %struct.ComponentParameters* %tmp18 to i8* ; <i8*> [#uses=1]
+ %tmp212223 = sext i16 %tmp1415 to i64 ; <i64> [#uses=1]
+ %tmp24 = getelementptr i8* %tmp1920, i64 %tmp212223 ; <i8*> [#uses=1]
+ %tmp2425 = bitcast i8* %tmp24 to i64* ; <i64*> [#uses=1]
+ %tmp28 = load i64* %tmp2425, align 8 ; <i64> [#uses=1]
+ %tmp2829 = inttoptr i64 %tmp28 to i32* ; <i32*> [#uses=1]
+ %tmp31 = getelementptr %struct.AGenericCall* %this, i32 0, i32 2 ; <i32**> [#uses=1]
+ store i32* %tmp2829, i32** %tmp31, align 8
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp4243 = shl i16 %param, 3 ; <i16> [#uses=1]
+ %tmp46 = getelementptr %struct.AGenericCall* %this, i32 0, i32 1 ; <%struct.ComponentParameters**> [#uses=1]
+ %tmp47 = load %struct.ComponentParameters** %tmp46, align 8 ; <%struct.ComponentParameters*> [#uses=1]
+ %tmp4849 = bitcast %struct.ComponentParameters* %tmp47 to i8* ; <i8*> [#uses=1]
+ %tmp505152 = sext i16 %tmp4243 to i64 ; <i64> [#uses=1]
+ %tmp53 = getelementptr i8* %tmp4849, i64 %tmp505152 ; <i8*> [#uses=1]
+ %tmp5354 = bitcast i8* %tmp53 to i64* ; <i64*> [#uses=1]
+ %tmp58 = load i64* %tmp5354, align 8 ; <i64> [#uses=1]
+ %tmp59 = icmp eq i64 %tmp58, 0 ; <i1> [#uses=1]
+ br i1 %tmp59, label %UnifiedReturnBlock, label %cond_true63
+
+cond_true63: ; preds = %cond_next
+ %tmp65 = getelementptr %struct.AGenericCall* %this, i32 0, i32 0 ; <%struct.AGenericManager**> [#uses=1]
+ %tmp66 = load %struct.AGenericManager** %tmp65, align 8 ; <%struct.AGenericManager*> [#uses=1]
+ %tmp69 = tail call i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord( %struct.AGenericManager* %tmp66, %struct.ComponentInstanceRecord** %instance ) ; <i32> [#uses=1]
+ ret i32 %tmp69
+
+UnifiedReturnBlock: ; preds = %cond_next
+ ret i32 undef
+}
+
+declare i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord(%struct.AGenericManager*, %struct.ComponentInstanceRecord**)
diff --git a/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll b/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll
new file mode 100644
index 0000000..c5d2a46
--- /dev/null
+++ b/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -march=x86 | grep weak | count 2
+@__gthrw_pthread_once = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+
+declare extern_weak i32 @pthread_once(i32*, void ()*)
diff --git a/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll b/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll
new file mode 100644
index 0000000..56ee2a3
--- /dev/null
+++ b/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll
@@ -0,0 +1,65 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin -enable-eh | grep {isNullOrNil].eh"} | count 2
+
+ %struct.NSString = type { }
+ %struct._objc__method_prototype_list = type opaque
+ %struct._objc_category = type { i8*, i8*, %struct._objc_method_list*, %struct._objc_method_list*, %struct._objc_protocol**, i32, %struct._prop_list_t* }
+ %struct._objc_method = type { %struct.objc_selector*, i8*, i8* }
+ %struct._objc_method_list = type opaque
+ %struct._objc_module = type { i32, i32, i8*, %struct._objc_symtab* }
+ %struct._objc_protocol = type { %struct._objc_protocol_extension*, i8*, %struct._objc_protocol**, %struct._objc__method_prototype_list*, %struct._objc__method_prototype_list* }
+ %struct._objc_protocol_extension = type opaque
+ %struct._objc_symtab = type { i32, %struct.objc_selector**, i16, i16, [1 x i8*] }
+ %struct._prop_list_t = type opaque
+ %struct.anon = type { %struct._objc__method_prototype_list*, i32, [1 x %struct._objc_method] }
+ %struct.objc_selector = type opaque
+@"\01L_OBJC_SYMBOLS" = internal global { i32, i32, i16, i16, [1 x %struct._objc_category*] } {
+ i32 0,
+ i32 0,
+ i16 0,
+ i16 1,
+ [1 x %struct._objc_category*] [ %struct._objc_category* bitcast ({ i8*, i8*, %struct._objc_method_list*, i32, i32, i32, i32 }* @"\01L_OBJC_CATEGORY_NSString_local" to %struct._objc_category*) ] }, section "__OBJC,__symbols,regular,no_dead_strip" ; <{ i32, i32, i16, i16, [1 x %struct._objc_category*] }*> [#uses=2]
+@"\01L_OBJC_CATEGORY_INSTANCE_METHODS_NSString_local" = internal global { i32, i32, [1 x %struct._objc_method] } {
+ i32 0,
+ i32 1,
+ [1 x %struct._objc_method] [ %struct._objc_method {
+ %struct.objc_selector* bitcast ([12 x i8]* @"\01L_OBJC_METH_VAR_NAME_0" to %struct.objc_selector*),
+ i8* getelementptr ([7 x i8]* @"\01L_OBJC_METH_VAR_TYPE_0", i32 0, i32 0),
+ i8* bitcast (i8 (%struct.NSString*, %struct.objc_selector*) signext * @"-[NSString(local) isNullOrNil]" to i8*) } ] }, section "__OBJC,__cat_inst_meth,regular,no_dead_strip" ; <{ i32, i32, [1 x %struct._objc_method] }*> [#uses=3]
+@"\01L_OBJC_CATEGORY_NSString_local" = internal global { i8*, i8*, %struct._objc_method_list*, i32, i32, i32, i32 } {
+ i8* getelementptr ([6 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0),
+ i8* getelementptr ([9 x i8]* @"\01L_OBJC_CLASS_NAME_1", i32 0, i32 0),
+ %struct._objc_method_list* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01L_OBJC_CATEGORY_INSTANCE_METHODS_NSString_local" to %struct._objc_method_list*),
+ i32 0,
+ i32 0,
+ i32 28,
+ i32 0 }, section "__OBJC,__category,regular,no_dead_strip" ; <{ i8*, i8*, %struct._objc_method_list*, i32, i32, i32, i32 }*> [#uses=2]
+@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] zeroinitializer, section "__OBJC,__image_info,regular" ; <[2 x i32]*> [#uses=1]
+@"\01L_OBJC_MODULES" = internal global %struct._objc_module {
+ i32 7,
+ i32 16,
+ i8* getelementptr ([1 x i8]* @"\01L_OBJC_CLASS_NAME_2", i32 0, i32 0),
+ %struct._objc_symtab* bitcast ({ i32, i32, i16, i16, [1 x %struct._objc_category*] }* @"\01L_OBJC_SYMBOLS" to %struct._objc_symtab*) }, section "__OBJC,__module_info,regular,no_dead_strip" ; <%struct._objc_module*> [#uses=1]
+@"\01.objc_class_ref_NSString" = internal global i8* @"\01.objc_class_name_NSString" ; <i8**> [#uses=0]
+@"\01.objc_class_name_NSString" = external global i8 ; <i8*> [#uses=1]
+@"\01.objc_category_name_NSString_local" = constant i32 0 ; <i32*> [#uses=1]
+@"\01L_OBJC_CLASS_NAME_2" = internal global [1 x i8] zeroinitializer, section "__TEXT,__cstring,cstring_literals" ; <[1 x i8]*> [#uses=2]
+@"\01L_OBJC_CLASS_NAME_1" = internal global [9 x i8] c"NSString\00", section "__TEXT,__cstring,cstring_literals" ; <[9 x i8]*> [#uses=2]
+@"\01L_OBJC_CLASS_NAME_0" = internal global [6 x i8] c"local\00", section "__TEXT,__cstring,cstring_literals" ; <[6 x i8]*> [#uses=2]
+@"\01L_OBJC_METH_VAR_NAME_0" = internal global [12 x i8] c"isNullOrNil\00", section "__TEXT,__cstring,cstring_literals" ; <[12 x i8]*> [#uses=3]
+@"\01L_OBJC_METH_VAR_TYPE_0" = internal global [7 x i8] c"c8@0:4\00", section "__TEXT,__cstring,cstring_literals" ; <[7 x i8]*> [#uses=2]
[email protected] = appending global [11 x i8*] [ i8* bitcast ({ i32, i32, i16, i16, [1 x %struct._objc_category*] }* @"\01L_OBJC_SYMBOLS" to i8*), i8* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01L_OBJC_CATEGORY_INSTANCE_METHODS_NSString_local" to i8*), i8* bitcast ({ i8*, i8*, %struct._objc_method_list*, i32, i32, i32, i32 }* @"\01L_OBJC_CATEGORY_NSString_local" to i8*), i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*), i8* bitcast (%struct._objc_module* @"\01L_OBJC_MODULES" to i8*), i8* bitcast (i32* @"\01.objc_category_name_NSString_local" to i8*), i8* getelementptr ([1 x i8]* @"\01L_OBJC_CLASS_NAME_2", i32 0, i32 0), i8* getelementptr ([9 x i8]* @"\01L_OBJC_CLASS_NAME_1", i32 0, i32 0), i8* getelementptr ([6 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0), i8* getelementptr ([12 x i8]* @"\01L_OBJC_METH_VAR_NAME_0", i32 0, i32 0), i8* getelementptr ([7 x i8]* @"\01L_OBJC_METH_VAR_TYPE_0", i32 0, i32 0) ], section "llvm.metadata" ; <[11 x i8*]*> [#uses=0]
+
+define internal i8 @"-[NSString(local) isNullOrNil]"(%struct.NSString* %self, %struct.objc_selector* %_cmd) signext {
+entry:
+ %self_addr = alloca %struct.NSString* ; <%struct.NSString**> [#uses=1]
+ %_cmd_addr = alloca %struct.objc_selector* ; <%struct.objc_selector**> [#uses=1]
+ %retval = alloca i8, align 1 ; <i8*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store %struct.NSString* %self, %struct.NSString** %self_addr
+ store %struct.objc_selector* %_cmd, %struct.objc_selector** %_cmd_addr
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i8* %retval ; <i8> [#uses=1]
+ ret i8 %retval1
+}
diff --git a/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll b/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
new file mode 100644
index 0000000..0ae1897
--- /dev/null
+++ b/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep -- -86
+
+define i16 @f(<4 x float>* %tmp116117.i1061.i) nounwind {
+entry:
+ alloca [4 x <4 x float>] ; <[4 x <4 x float>]*>:0 [#uses=167]
+ alloca [4 x <4 x float>] ; <[4 x <4 x float>]*>:1 [#uses=170]
+ alloca [4 x <4 x i32>] ; <[4 x <4 x i32>]*>:2 [#uses=12]
+ %.sub6235.i = getelementptr [4 x <4 x float>]* %0, i32 0, i32 0 ; <<4 x float>*> [#uses=76]
+ %.sub.i = getelementptr [4 x <4 x float>]* %1, i32 0, i32 0 ; <<4 x float>*> [#uses=59]
+
+ %tmp124.i1062.i = getelementptr <4 x float>* %tmp116117.i1061.i, i32 63 ; <<4 x float>*> [#uses=1]
+ %tmp125.i1063.i = load <4 x float>* %tmp124.i1062.i ; <<4 x float>> [#uses=5]
+ %tmp828.i1077.i = shufflevector <4 x float> %tmp125.i1063.i, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>> [#uses=4]
+ %tmp704.i1085.i = load <4 x float>* %.sub6235.i ; <<4 x float>> [#uses=1]
+ %tmp712.i1086.i = call <4 x float> @llvm.x86.sse.max.ps( <4 x float> %tmp704.i1085.i, <4 x float> %tmp828.i1077.i ) ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp712.i1086.i, <4 x float>* %.sub.i
+
+ %tmp2587.i1145.gep.i = getelementptr [4 x <4 x float>]* %1, i32 0, i32 0, i32 2 ; <float*> [#uses=1]
+ %tmp5334.i = load float* %tmp2587.i1145.gep.i ; <float> [#uses=5]
+ %tmp2723.i1170.i = insertelement <4 x float> undef, float %tmp5334.i, i32 2 ; <<4 x float>> [#uses=5]
+ store <4 x float> %tmp2723.i1170.i, <4 x float>* %.sub6235.i
+
+ %tmp1406.i1367.i = shufflevector <4 x float> %tmp2723.i1170.i, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>> [#uses=1]
+ %tmp84.i1413.i = load <4 x float>* %.sub6235.i ; <<4 x float>> [#uses=1]
+ %tmp89.i1415.i = fmul <4 x float> %tmp84.i1413.i, %tmp1406.i1367.i ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp89.i1415.i, <4 x float>* %.sub.i
+ ret i16 0
+}
+
+declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>)
diff --git a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll
new file mode 100644
index 0000000..4d69715
--- /dev/null
+++ b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+define x86_fp80 @foo(x86_fp80 %x) nounwind{
+entry:
+ %tmp2 = call x86_fp80 @llvm.sqrt.f80( x86_fp80 %x )
+ ret x86_fp80 %tmp2
+
+; CHECK: foo:
+; CHECK: fldt 4(%esp)
+; CHECK-NEXT: fsqrt
+; CHECK-NEXT: ret
+}
+
+declare x86_fp80 @llvm.sqrt.f80(x86_fp80)
+
+define x86_fp80 @bar(x86_fp80 %x) nounwind {
+entry:
+ %tmp2 = call x86_fp80 @llvm.powi.f80( x86_fp80 %x, i32 3 )
+ ret x86_fp80 %tmp2
+; CHECK: bar:
+; CHECK: fldt 4(%esp)
+; CHECK-NEXT: fld %st(0)
+; CHECK-NEXT: fmul %st(1)
+; CHECK-NEXT: fmulp %st(1)
+; CHECK-NEXT: ret
+}
+
+declare x86_fp80 @llvm.powi.f80(x86_fp80, i32)
diff --git a/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll b/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll
new file mode 100644
index 0000000..6fc8ec9
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 | not grep pushf
+
+ %struct.gl_texture_image = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8* }
+ %struct.gl_texture_object = type { i32, i32, i32, float, [4 x i32], i32, i32, i32, i32, i32, float, [11 x %struct.gl_texture_image*], [1024 x i8], i32, i32, i32, i8, i8*, i8, void (%struct.gl_texture_object*, i32, float*, float*, float*, float*, i8*, i8*, i8*, i8*)*, %struct.gl_texture_object* }
+
+define fastcc void @sample_3d_linear(%struct.gl_texture_object* %tObj, %struct.gl_texture_image* %img, float %s, float %t, float %r, i8* %red, i8* %green, i8* %blue, i8* %alpha) {
+entry:
+ %tmp15 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp16 = icmp eq i32 %tmp15, 10497 ; <i1> [#uses=1]
+ %tmp2152 = call float @floorf( float 0.000000e+00 ) ; <float> [#uses=0]
+ br i1 %tmp16, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ ret void
+
+cond_false: ; preds = %entry
+ ret void
+}
+
+declare float @floorf(float)
diff --git a/test/CodeGen/X86/2007-10-05-3AddrConvert.ll b/test/CodeGen/X86/2007-10-05-3AddrConvert.ll
new file mode 100644
index 0000000..67323e8
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-05-3AddrConvert.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -march=x86 | grep lea
+
+ %struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] }
+ %struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* }
+ %struct.node = type { i16, double, [3 x double], i32, i32 }
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+entry:
+ %0 = malloc %struct.anon ; <%struct.anon*> [#uses=2]
+ %1 = getelementptr %struct.anon* %0, i32 0, i32 2 ; <%struct.node**> [#uses=1]
+ br label %bb14.i
+
+bb14.i: ; preds = %bb14.i, %entry
+ %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %2, %bb14.i ] ; <i32> [#uses=1]
+ %2 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %exitcond74.i = icmp eq i32 %2, 32 ; <i1> [#uses=1]
+ br i1 %exitcond74.i, label %bb32.i, label %bb14.i
+
+bb32.i: ; preds = %bb32.i, %bb14.i
+ %tmp.0.reg2mem.0.i = phi i32 [ %indvar.next63.i, %bb32.i ], [ 0, %bb14.i ] ; <i32> [#uses=1]
+ %indvar.next63.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %exitcond64.i = icmp eq i32 %indvar.next63.i, 64 ; <i1> [#uses=1]
+ br i1 %exitcond64.i, label %bb47.loopexit.i, label %bb32.i
+
+bb.i.i: ; preds = %bb47.loopexit.i
+ unreachable
+
+stepsystem.exit.i: ; preds = %bb47.loopexit.i
+ store %struct.node* null, %struct.node** %1, align 4
+ br label %bb.i6.i
+
+bb.i6.i: ; preds = %bb.i6.i, %stepsystem.exit.i
+ %tmp.0.i.i = add i32 0, -1 ; <i32> [#uses=1]
+ %3 = icmp slt i32 %tmp.0.i.i, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb107.i.i, label %bb.i6.i
+
+bb107.i.i: ; preds = %bb107.i.i, %bb.i6.i
+ %q_addr.0.i.i.in = phi %struct.bnode** [ null, %bb107.i.i ], [ %4, %bb.i6.i ] ; <%struct.bnode**> [#uses=1]
+ %q_addr.0.i.i = load %struct.bnode** %q_addr.0.i.i.in ; <%struct.bnode*> [#uses=0]
+ br label %bb107.i.i
+
+bb47.loopexit.i: ; preds = %bb32.i
+ %4 = getelementptr %struct.anon* %0, i32 0, i32 4, i32 0 ; <%struct.bnode**> [#uses=1]
+ %5 = icmp eq %struct.node* null, null ; <i1> [#uses=1]
+ br i1 %5, label %stepsystem.exit.i, label %bb.i.i
+}
diff --git a/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll b/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
new file mode 100644
index 0000000..fc11347
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -march=x86 | not grep movb
+
+define i16 @f(i32* %bp, i32* %ss) signext {
+entry:
+ br label %cond_next127
+
+cond_next127: ; preds = %cond_next391, %entry
+ %v.1 = phi i32 [ undef, %entry ], [ %tmp411, %cond_next391 ] ; <i32> [#uses=1]
+ %tmp149 = mul i32 0, %v.1 ; <i32> [#uses=0]
+ %tmp254 = and i32 0, 15 ; <i32> [#uses=1]
+ %tmp256 = and i32 0, 15 ; <i32> [#uses=2]
+ br i1 false, label %cond_true267, label %cond_next391
+
+cond_true267: ; preds = %cond_next127
+ ret i16 0
+
+cond_next391: ; preds = %cond_next127
+ %tmp393 = load i32* %ss, align 4 ; <i32> [#uses=1]
+ %tmp395 = load i32* %bp, align 4 ; <i32> [#uses=2]
+ %tmp396 = shl i32 %tmp393, %tmp395 ; <i32> [#uses=2]
+ %tmp398 = sub i32 32, %tmp256 ; <i32> [#uses=2]
+ %tmp399 = lshr i32 %tmp396, %tmp398 ; <i32> [#uses=1]
+ %tmp405 = lshr i32 %tmp396, 31 ; <i32> [#uses=1]
+ %tmp406 = add i32 %tmp405, -1 ; <i32> [#uses=1]
+ %tmp409 = lshr i32 %tmp406, %tmp398 ; <i32> [#uses=1]
+ %tmp411 = sub i32 %tmp399, %tmp409 ; <i32> [#uses=1]
+ %tmp422445 = add i32 %tmp254, 0 ; <i32> [#uses=1]
+ %tmp426447 = add i32 %tmp395, %tmp256 ; <i32> [#uses=1]
+ store i32 %tmp426447, i32* %bp, align 4
+ %tmp429448 = icmp ult i32 %tmp422445, 63 ; <i1> [#uses=1]
+ br i1 %tmp429448, label %cond_next127, label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %cond_next391
+ ret i16 0
+}
diff --git a/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll b/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
new file mode 100644
index 0000000..ea1bbc4
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
@@ -0,0 +1,45 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep addss | not grep esp
+
+define fastcc void @fht(float* %fz, i16 signext %n) {
+entry:
+ br i1 true, label %bb171.preheader, label %bb431
+
+bb171.preheader: ; preds = %entry
+ %tmp176 = fadd float 0.000000e+00, 1.000000e+00 ; <float> [#uses=2]
+ %gi.1 = getelementptr float* %fz, i32 0 ; <float*> [#uses=2]
+ %tmp240 = load float* %gi.1, align 4 ; <float> [#uses=1]
+ %tmp242 = fsub float %tmp240, 0.000000e+00 ; <float> [#uses=2]
+ %tmp251 = getelementptr float* %fz, i32 0 ; <float*> [#uses=1]
+ %tmp252 = load float* %tmp251, align 4 ; <float> [#uses=1]
+ %tmp258 = getelementptr float* %fz, i32 0 ; <float*> [#uses=2]
+ %tmp259 = load float* %tmp258, align 4 ; <float> [#uses=2]
+ %tmp261 = fmul float %tmp259, %tmp176 ; <float> [#uses=1]
+ %tmp262 = fsub float 0.000000e+00, %tmp261 ; <float> [#uses=2]
+ %tmp269 = fmul float %tmp252, %tmp176 ; <float> [#uses=1]
+ %tmp276 = fmul float %tmp259, 0.000000e+00 ; <float> [#uses=1]
+ %tmp277 = fadd float %tmp269, %tmp276 ; <float> [#uses=2]
+ %tmp281 = getelementptr float* %fz, i32 0 ; <float*> [#uses=1]
+ %tmp282 = load float* %tmp281, align 4 ; <float> [#uses=2]
+ %tmp284 = fsub float %tmp282, %tmp277 ; <float> [#uses=1]
+ %tmp291 = fadd float %tmp282, %tmp277 ; <float> [#uses=1]
+ %tmp298 = fsub float 0.000000e+00, %tmp262 ; <float> [#uses=1]
+ %tmp305 = fadd float 0.000000e+00, %tmp262 ; <float> [#uses=1]
+ %tmp315 = fmul float 0.000000e+00, %tmp291 ; <float> [#uses=1]
+ %tmp318 = fmul float 0.000000e+00, %tmp298 ; <float> [#uses=1]
+ %tmp319 = fadd float %tmp315, %tmp318 ; <float> [#uses=1]
+ %tmp329 = fadd float 0.000000e+00, %tmp319 ; <float> [#uses=1]
+ store float %tmp329, float* null, align 4
+ %tmp336 = fsub float %tmp242, 0.000000e+00 ; <float> [#uses=1]
+ store float %tmp336, float* %tmp258, align 4
+ %tmp343 = fadd float %tmp242, 0.000000e+00 ; <float> [#uses=1]
+ store float %tmp343, float* null, align 4
+ %tmp355 = fmul float 0.000000e+00, %tmp305 ; <float> [#uses=1]
+ %tmp358 = fmul float 0.000000e+00, %tmp284 ; <float> [#uses=1]
+ %tmp359 = fadd float %tmp355, %tmp358 ; <float> [#uses=1]
+ %tmp369 = fadd float 0.000000e+00, %tmp359 ; <float> [#uses=1]
+ store float %tmp369, float* %gi.1, align 4
+ ret void
+
+bb431: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll b/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll
new file mode 100644
index 0000000..a3872ad
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -march=x86 | grep sarl | not grep esp
+
+define i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) signext {
+entry:
+ br label %cond_next127
+
+cond_next127: ; preds = %cond_next391, %entry
+ %tmp151 = add i32 0, %round ; <i32> [#uses=1]
+ %tmp153 = ashr i32 %tmp151, %scale ; <i32> [#uses=1]
+ %tmp158 = xor i32 0, %tmp153 ; <i32> [#uses=1]
+ %tmp160 = or i32 %tmp158, 0 ; <i32> [#uses=1]
+ %tmp180181 = sext i16 0 to i32 ; <i32> [#uses=1]
+ %tmp183 = add i32 %tmp160, 1 ; <i32> [#uses=1]
+ br i1 false, label %cond_true188, label %cond_next245
+
+cond_true188: ; preds = %cond_next127
+ ret i16 0
+
+cond_next245: ; preds = %cond_next127
+ %tmp253444 = lshr i32 %tmp180181, 4 ; <i32> [#uses=1]
+ %tmp254 = and i32 %tmp253444, 15 ; <i32> [#uses=1]
+ br i1 false, label %cond_true267, label %cond_next391
+
+cond_true267: ; preds = %cond_next245
+ %tmp269 = load i8** %byteptr, align 4 ; <i8*> [#uses=3]
+ %tmp270 = load i8* %tmp269, align 1 ; <i8> [#uses=1]
+ %tmp270271 = zext i8 %tmp270 to i32 ; <i32> [#uses=1]
+ %tmp272 = getelementptr i8* %tmp269, i32 1 ; <i8*> [#uses=2]
+ store i8* %tmp272, i8** %byteptr, align 4
+ %tmp276 = load i8* %tmp272, align 1 ; <i8> [#uses=1]
+ %tmp278 = getelementptr i8* %tmp269, i32 2 ; <i8*> [#uses=1]
+ store i8* %tmp278, i8** %byteptr, align 4
+ %tmp286 = icmp eq i32 %tmp270271, %markerPrefix ; <i1> [#uses=1]
+ %cond = icmp eq i8 %tmp276, 0 ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp286, %cond ; <i1> [#uses=1]
+ br i1 %bothcond, label %cond_true294, label %cond_next327
+
+cond_true294: ; preds = %cond_true267
+ ret i16 0
+
+cond_next327: ; preds = %cond_true267
+ br i1 false, label %cond_true343, label %cond_next391
+
+cond_true343: ; preds = %cond_next327
+ %tmp345 = load i8** %byteptr, align 4 ; <i8*> [#uses=1]
+ store i8* null, i8** %byteptr, align 4
+ store i8* %tmp345, i8** %byteptr, align 4
+ br label %cond_next391
+
+cond_next391: ; preds = %cond_true343, %cond_next327, %cond_next245
+ %tmp422445 = add i32 %tmp254, %tmp183 ; <i32> [#uses=1]
+ %tmp429448 = icmp ult i32 %tmp422445, 63 ; <i1> [#uses=1]
+ br i1 %tmp429448, label %cond_next127, label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %cond_next391
+ ret i16 0
+}
diff --git a/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll b/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll
new file mode 100644
index 0000000..8a55935
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
+
+ %struct._Unwind_Context = type { }
+
+define i32 @execute_stack_op(i8* %op_ptr, i8* %op_end, %struct._Unwind_Context* %context, i64 %initial) {
+entry:
+ br i1 false, label %bb, label %return
+
+bb: ; preds = %bb31, %entry
+ br i1 false, label %bb6, label %bb31
+
+bb6: ; preds = %bb
+ %tmp10 = load i64* null, align 8 ; <i64> [#uses=1]
+ %tmp16 = load i64* null, align 8 ; <i64> [#uses=1]
+ br i1 false, label %bb23, label %bb31
+
+bb23: ; preds = %bb6
+ %tmp2526.cast = and i64 %tmp16, 4294967295 ; <i64> [#uses=1]
+ %tmp27 = ashr i64 %tmp10, %tmp2526.cast ; <i64> [#uses=1]
+ br label %bb31
+
+bb31: ; preds = %bb23, %bb6, %bb
+ %result.0 = phi i64 [ %tmp27, %bb23 ], [ 0, %bb ], [ 0, %bb6 ] ; <i64> [#uses=0]
+ br i1 false, label %bb, label %return
+
+return: ; preds = %bb31, %entry
+ ret i32 undef
+}
diff --git a/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll b/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll
new file mode 100644
index 0000000..1e4ae84
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll
@@ -0,0 +1,400 @@
+; RUN: llc < %s -mtriple=x86_64-linux-gnu
+; PR1729
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] }
+ %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.addr_diff_vec_flags = type <{ i8, i8, i8, i8 }>
+ %struct.alloc_pool_def = type { i8*, i64, i64, %struct.alloc_pool_list_def*, i64, i64, i64, %struct.alloc_pool_list_def*, i64, i64 }
+ %struct.alloc_pool_list_def = type { %struct.alloc_pool_list_def* }
+ %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 }
+ %struct.bb_ann_d = type opaque
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [2 x i64] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.cselib_val_struct = type opaque
+ %struct.dataflow_d = type opaque
+ %struct.die_struct = type opaque
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_iterator = type { i32, %struct.VEC_edge** }
+ %struct.eh_status = type opaque
+ %struct.elt_list = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 }
+ %struct.ht_identifier = type { i8*, i32, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.lang_type = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.loop = type opaque
+ %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
+ %struct.mem_attrs = type { i64, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32 }
+ %struct.obstack = type { i64, %struct._obstack_chunk*, i8*, i8*, i8*, i64, i32, %struct._obstack_chunk* (i8*, i64)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.phi_arg_d = type { %struct.tree_node*, i8 }
+ %struct.ptr_info_def = type opaque
+ %struct.real_value = type opaque
+ %struct.reg_attrs = type { %struct.tree_node*, i64 }
+ %struct.reg_info_def = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 }
+ %struct.rtunion = type { i8* }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.simple_bitmap_def = type { i32, i32, i32, [1 x i64] }
+ %struct.stack_local_entry = type opaque
+ %struct.temp_slot = type opaque
+ %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree }
+ %struct.tree_block = type { %struct.tree_common, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u1_a = type <{ i32 }>
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_exp = type { %struct.tree_common, %struct.location_t*, i32, %struct.tree_node*, [1 x %struct.tree_node*] }
+ %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
+ %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi }
+ %struct.tree_int_cst_lowhi = type { i64, i64 }
+ %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] }
+ %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* }
+ %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* }
+ %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* }
+ %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* }
+ %struct.tree_string = type { %struct.tree_common, i32, [1 x i8] }
+ %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* }
+ %struct.tree_type_symtab = type { i8* }
+ %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 }
+ %struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] }
+ %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* }
+ %struct.u = type { [1 x %struct.rtunion] }
+ %struct.value_set = type opaque
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_data = type { [1 x i64] }
+ %struct.varray_head_tag = type { i64, i64, i32, i8*, %struct.varray_data }
+ %union.tree_ann_d = type opaque
+@first_edge_aux_obj = external global i8* ; <i8**> [#uses=0]
+@first_block_aux_obj = external global i8* ; <i8**> [#uses=0]
+@n_edges = external global i32 ; <i32*> [#uses=0]
+@ENTRY_BLOCK_PTR = external global %struct.basic_block_def* ; <%struct.basic_block_def**> [#uses=0]
+@EXIT_BLOCK_PTR = external global %struct.basic_block_def* ; <%struct.basic_block_def**> [#uses=0]
+@n_basic_blocks = external global i32 ; <i32*> [#uses=0]
[email protected] = external constant [9 x i8] ; <[9 x i8]*> [#uses=0]
+@rbi_pool = external global %struct.alloc_pool_def* ; <%struct.alloc_pool_def**> [#uses=0]
+@__FUNCTION__.19643 = external constant [18 x i8] ; <[18 x i8]*> [#uses=0]
[email protected] = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.19670 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
+@basic_block_info = external global %struct.varray_head_tag* ; <%struct.varray_head_tag**> [#uses=0]
+@last_basic_block = external global i32 ; <i32*> [#uses=0]
+@__FUNCTION__.19696 = external constant [14 x i8] ; <[14 x i8]*> [#uses=0]
+@__FUNCTION__.20191 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
+@block_aux_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=0]
+@__FUNCTION__.20301 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.20316 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
+@edge_aux_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=0]
+@stderr = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=0]
+@__FUNCTION__.20463 = external constant [11 x i8] ; <[11 x i8]*> [#uses=0]
[email protected] = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
[email protected] = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [11 x i8] ; <[11 x i8]*> [#uses=0]
[email protected] = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [13 x i8*] ; <[13 x i8*]*> [#uses=0]
[email protected] = external constant [9 x i8] ; <[9 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [9 x i8] ; <[9 x i8]*> [#uses=0]
[email protected] = external constant [13 x i8] ; <[13 x i8]*> [#uses=0]
[email protected] = external constant [12 x i8] ; <[12 x i8]*> [#uses=0]
[email protected] = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
[email protected] = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
+@__FUNCTION__.19709 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
+@__FUNCTION__.19813 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
[email protected] = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
[email protected] = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
[email protected] = external global i1 ; <i1*> [#uses=0]
+@__FUNCTION__.20244 = external constant [21 x i8] ; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.19601 = external constant [12 x i8] ; <[12 x i8]*> [#uses=0]
+@__FUNCTION__.14571 = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
+@__FUNCTION__.14535 = external constant [13 x i8] ; <[13 x i8]*> [#uses=0]
[email protected] = external constant [28 x i8] ; <[28 x i8]*> [#uses=0]
+@__FUNCTION__.14589 = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
+@__FUNCTION__.19792 = external constant [12 x i8] ; <[12 x i8]*> [#uses=0]
+@__FUNCTION__.19851 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
+@profile_status = external global i32 ; <i32*> [#uses=0]
[email protected] = external constant [46 x i8] ; <[46 x i8]*> [#uses=0]
[email protected] = external constant [49 x i8] ; <[49 x i8]*> [#uses=0]
[email protected] = external constant [54 x i8] ; <[54 x i8]*> [#uses=0]
[email protected] = external constant [49 x i8] ; <[49 x i8]*> [#uses=1]
+@__FUNCTION__.19948 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
+@reg_n_info = external global %struct.varray_head_tag* ; <%struct.varray_head_tag**> [#uses=0]
+@reload_completed = external global i32 ; <i32*> [#uses=0]
[email protected] = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
[email protected] = external constant [43 x i8] ; <[43 x i8]*> [#uses=0]
[email protected] = external constant [13 x i8] ; <[13 x i8]*> [#uses=0]
[email protected] = external constant [1 x i8] ; <[1 x i8]*> [#uses=0]
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=0]
[email protected] = external constant [16 x i8] ; <[16 x i8]*> [#uses=0]
+@cfun = external global %struct.function* ; <%struct.function**> [#uses=0]
[email protected] = external constant [14 x i8] ; <[14 x i8]*> [#uses=0]
[email protected] = external constant [11 x i8] ; <[11 x i8]*> [#uses=0]
[email protected] = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
[email protected] = external constant [17 x i8] ; <[17 x i8]*> [#uses=0]
[email protected] = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
+@mode_size = external global [48 x i8] ; <[48 x i8]*> [#uses=0]
+@target_flags = external global i32 ; <i32*> [#uses=0]
[email protected] = external constant [11 x i8] ; <[11 x i8]*> [#uses=0]
+@reg_class_names = external global [0 x i8*] ; <[0 x i8*]*> [#uses=0]
[email protected] = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
[email protected] = external constant [13 x i8] ; <[13 x i8]*> [#uses=0]
[email protected] = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
[email protected] = external constant [12 x i8] ; <[12 x i8]*> [#uses=0]
[email protected] = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [29 x i8] ; <[29 x i8]*> [#uses=0]
[email protected] = external constant [17 x i8] ; <[17 x i8]*> [#uses=0]
[email protected] = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
[email protected] = external constant [22 x i8] ; <[22 x i8]*> [#uses=0]
[email protected] = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
[email protected] = external constant [12 x i8] ; <[12 x i8]*> [#uses=0]
[email protected] = external constant [26 x i8] ; <[26 x i8]*> [#uses=0]
[email protected] = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
[email protected] = external constant [14 x i8] ; <[14 x i8]*> [#uses=0]
[email protected] = external constant [26 x i8] ; <[26 x i8]*> [#uses=0]
[email protected] = external constant [24 x i8] ; <[24 x i8]*> [#uses=0]
[email protected] = external global i1 ; <i1*> [#uses=0]
+@__FUNCTION__.20369 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.20442 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
+@bb_bitnames.20476 = external constant [6 x i8*] ; <[6 x i8*]*> [#uses=0]
[email protected] = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
[email protected] = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
[email protected] = external constant [17 x i8] ; <[17 x i8]*> [#uses=0]
[email protected] = external constant [11 x i8] ; <[11 x i8]*> [#uses=0]
[email protected] = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
+@__FUNCTION__.20520 = external constant [32 x i8] ; <[32 x i8]*> [#uses=0]
+@dump_file = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=0]
[email protected] = external constant [86 x i8] ; <[86 x i8]*> [#uses=0]
[email protected] = external constant [94 x i8] ; <[94 x i8]*> [#uses=0]
+@reg_obstack = external global %struct.bitmap_obstack ; <%struct.bitmap_obstack*> [#uses=0]
+
+declare void @init_flow()
+
+declare i8* @ggc_alloc_cleared_stat(i64)
+
+declare fastcc void @free_edge(%struct.edge_def*)
+
+declare void @ggc_free(i8*)
+
+declare %struct.basic_block_def* @alloc_block()
+
+declare void @alloc_rbi_pool()
+
+declare %struct.alloc_pool_def* @create_alloc_pool(i8*, i64, i64)
+
+declare void @free_rbi_pool()
+
+declare void @free_alloc_pool(%struct.alloc_pool_def*)
+
+declare void @initialize_bb_rbi(%struct.basic_block_def*)
+
+declare void @fancy_abort(i8*, i32, i8*)
+
+declare i8* @pool_alloc(%struct.alloc_pool_def*)
+
+declare void @llvm.memset.i64(i8*, i8, i64, i32)
+
+declare void @link_block(%struct.basic_block_def*, %struct.basic_block_def*)
+
+declare void @unlink_block(%struct.basic_block_def*)
+
+declare void @compact_blocks()
+
+declare void @varray_check_failed(%struct.varray_head_tag*, i64, i8*, i32, i8*)
+
+declare void @expunge_block(%struct.basic_block_def*)
+
+declare void @clear_bb_flags()
+
+declare void @alloc_aux_for_block(%struct.basic_block_def*, i32)
+
+declare void @_obstack_newchunk(%struct.obstack*, i32)
+
+declare void @clear_aux_for_blocks()
+
+declare void @free_aux_for_blocks()
+
+declare void @obstack_free(%struct.obstack*, i8*)
+
+declare void @alloc_aux_for_edge(%struct.edge_def*, i32)
+
+declare void @debug_bb(%struct.basic_block_def*)
+
+declare void @dump_bb(%struct.basic_block_def*, %struct._IO_FILE*, i32)
+
+declare %struct.basic_block_def* @debug_bb_n(i32)
+
+declare void @dump_edge_info(%struct._IO_FILE*, %struct.edge_def*, i32)
+
+declare i32 @fputs_unlocked(i8* noalias , %struct._IO_FILE* noalias )
+
+declare i32 @fprintf(%struct._IO_FILE* noalias , i8* noalias , ...)
+
+declare i64 @fwrite(i8*, i64, i64, i8*)
+
+declare i32 @__overflow(%struct._IO_FILE*, i32)
+
+declare %struct.edge_def* @unchecked_make_edge(%struct.basic_block_def*, %struct.basic_block_def*, i32)
+
+declare i8* @vec_gc_p_reserve(i8*, i32)
+
+declare void @vec_assert_fail(i8*, i8*, i8*, i32, i8*)
+
+declare void @execute_on_growing_pred(%struct.edge_def*)
+
+declare %struct.edge_def* @make_edge(%struct.basic_block_def*, %struct.basic_block_def*, i32)
+
+declare %struct.edge_def* @find_edge(%struct.basic_block_def*, %struct.basic_block_def*)
+
+declare %struct.edge_def* @make_single_succ_edge(%struct.basic_block_def*, %struct.basic_block_def*, i32)
+
+declare %struct.edge_def* @cached_make_edge(%struct.simple_bitmap_def**, %struct.basic_block_def*, %struct.basic_block_def*, i32)
+
+declare void @redirect_edge_succ(%struct.edge_def*, %struct.basic_block_def*)
+
+declare void @execute_on_shrinking_pred(%struct.edge_def*)
+
+declare void @alloc_aux_for_blocks(i32)
+
+declare i8* @xmalloc(i64)
+
+declare i32 @_obstack_begin(%struct.obstack*, i32, i32, i8* (i64)*, void (i8*)*)
+
+declare void @free(i8*)
+
+declare void @clear_edges()
+
+declare void @remove_edge(%struct.edge_def*)
+
+declare %struct.edge_def* @redirect_edge_succ_nodup(%struct.edge_def*, %struct.basic_block_def*)
+
+declare void @redirect_edge_pred(%struct.edge_def*, %struct.basic_block_def*)
+
+define void @check_bb_profile(%struct.basic_block_def* %bb, %struct._IO_FILE* %file) {
+entry:
+ br i1 false, label %cond_false759.preheader, label %cond_false149.preheader
+
+cond_false149.preheader: ; preds = %entry
+ ret void
+
+cond_false759.preheader: ; preds = %entry
+ br i1 false, label %cond_next873, label %cond_true794
+
+bb644: ; preds = %cond_next873
+ ret void
+
+cond_true794: ; preds = %cond_false759.preheader
+ ret void
+
+cond_next873: ; preds = %cond_false759.preheader
+ br i1 false, label %bb882, label %bb644
+
+bb882: ; preds = %cond_next873
+ br i1 false, label %cond_true893, label %cond_next901
+
+cond_true893: ; preds = %bb882
+ br label %cond_false1036
+
+cond_next901: ; preds = %bb882
+ ret void
+
+bb929: ; preds = %cond_next1150
+ %tmp934 = add i64 0, %lsum.11225.0 ; <i64> [#uses=1]
+ br i1 false, label %cond_next979, label %cond_true974
+
+cond_true974: ; preds = %bb929
+ ret void
+
+cond_next979: ; preds = %bb929
+ br label %cond_false1036
+
+cond_false1036: ; preds = %cond_next979, %cond_true893
+ %lsum.11225.0 = phi i64 [ 0, %cond_true893 ], [ %tmp934, %cond_next979 ] ; <i64> [#uses=2]
+ br i1 false, label %cond_next1056, label %cond_true1051
+
+cond_true1051: ; preds = %cond_false1036
+ ret void
+
+cond_next1056: ; preds = %cond_false1036
+ br i1 false, label %cond_next1150, label %cond_true1071
+
+cond_true1071: ; preds = %cond_next1056
+ ret void
+
+cond_next1150: ; preds = %cond_next1056
+ %tmp1156 = icmp eq %struct.edge_def* null, null ; <i1> [#uses=1]
+ br i1 %tmp1156, label %bb1159, label %bb929
+
+bb1159: ; preds = %cond_next1150
+ br i1 false, label %cond_true1169, label %UnifiedReturnBlock
+
+cond_true1169: ; preds = %bb1159
+ %tmp11741175 = trunc i64 %lsum.11225.0 to i32 ; <i32> [#uses=1]
+ %tmp1178 = tail call i32 (%struct._IO_FILE* noalias , i8* noalias , ...)* @fprintf( %struct._IO_FILE* %file noalias , i8* getelementptr ([49 x i8]* @.str32, i32 0, i64 0) noalias , i32 %tmp11741175, i32 0 ) ; <i32> [#uses=0]
+ ret void
+
+UnifiedReturnBlock: ; preds = %bb1159
+ ret void
+}
+
+declare void @dump_flow_info(%struct._IO_FILE*)
+
+declare i32 @max_reg_num()
+
+declare void @rtl_check_failed_flag(i8*, %struct.rtx_def*, i8*, i32, i8*)
+
+declare i32 @reg_preferred_class(i32)
+
+declare i32 @reg_alternate_class(i32)
+
+declare i8 @maybe_hot_bb_p(%struct.basic_block_def*) zeroext
+
+declare i8 @probably_never_executed_bb_p(%struct.basic_block_def*) zeroext
+
+declare void @dump_regset(%struct.bitmap_head_def*, %struct._IO_FILE*)
+
+declare void @debug_flow_info()
+
+declare void @alloc_aux_for_edges(i32)
+
+declare void @clear_aux_for_edges()
+
+declare void @free_aux_for_edges()
+
+declare void @brief_dump_cfg(%struct._IO_FILE*)
+
+declare i32 @fputc(i32, i8*)
+
+declare void @update_bb_profile_for_threading(%struct.basic_block_def*, i32, i64, %struct.edge_def*)
diff --git a/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll b/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll
new file mode 100644
index 0000000..fbcac50
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
+
+define i64 @__ashldi3(i64 %u, i64 %b) {
+entry:
+ br i1 false, label %UnifiedReturnBlock, label %cond_next
+
+cond_next: ; preds = %entry
+ %tmp9 = sub i64 32, %b ; <i64> [#uses=2]
+ %tmp11 = icmp slt i64 %tmp9, 1 ; <i1> [#uses=1]
+ %tmp2180 = trunc i64 %u to i32 ; <i32> [#uses=2]
+ %tmp2223 = trunc i64 %tmp9 to i32 ; <i32> [#uses=2]
+ br i1 %tmp11, label %cond_true14, label %cond_false
+
+cond_true14: ; preds = %cond_next
+ %tmp24 = sub i32 0, %tmp2223 ; <i32> [#uses=1]
+ %tmp25 = shl i32 %tmp2180, %tmp24 ; <i32> [#uses=1]
+ %tmp2569 = zext i32 %tmp25 to i64 ; <i64> [#uses=1]
+ %tmp256970 = shl i64 %tmp2569, 32 ; <i64> [#uses=1]
+ ret i64 %tmp256970
+
+cond_false: ; preds = %cond_next
+ %tmp35 = lshr i32 %tmp2180, %tmp2223 ; <i32> [#uses=1]
+ %tmp54 = or i32 %tmp35, 0 ; <i32> [#uses=1]
+ %tmp5464 = zext i32 %tmp54 to i64 ; <i64> [#uses=1]
+ %tmp546465 = shl i64 %tmp5464, 32 ; <i64> [#uses=1]
+ %tmp546465.ins = or i64 %tmp546465, 0 ; <i64> [#uses=1]
+ ret i64 %tmp546465.ins
+
+UnifiedReturnBlock:
+ ret i64 %u
+}
diff --git a/test/CodeGen/X86/2007-10-16-IllegalAsm.ll b/test/CodeGen/X86/2007-10-16-IllegalAsm.ll
new file mode 100644
index 0000000..6d0cb47
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-16-IllegalAsm.ll
@@ -0,0 +1,272 @@
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep movb | not grep x
+; PR1734
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.lang_type = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
+ %struct.rtunion = type { i8* }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.stack_local_entry = type opaque
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* }
+ %struct.u = type { [1 x %struct.rtunion] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_data = type { [1 x i64] }
+ %struct.varray_head_tag = type { i64, i64, i32, i8*, %struct.varray_data }
+ %union.tree_ann_d = type opaque
[email protected] = external constant [28 x i8] ; <[28 x i8]*> [#uses=1]
+@tree_code_type = external constant [0 x i32] ; <[0 x i32]*> [#uses=5]
+@global_trees = external global [47 x %struct.tree_node*] ; <[47 x %struct.tree_node*]*> [#uses=1]
+@mode_size = external global [48 x i8] ; <[48 x i8]*> [#uses=1]
+@__FUNCTION__.22683 = external constant [12 x i8] ; <[12 x i8]*> [#uses=1]
+
+define void @layout_type(%struct.tree_node* %type) {
+entry:
+ %tmp15 = icmp eq %struct.tree_node* %type, null ; <i1> [#uses=1]
+ br i1 %tmp15, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ tail call void @fancy_abort( i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1713, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_false: ; preds = %entry
+ %tmp19 = load %struct.tree_node** getelementptr ([47 x %struct.tree_node*]* @global_trees, i32 0, i64 0), align 8 ; <%struct.tree_node*> [#uses=1]
+ %tmp21 = icmp eq %struct.tree_node* %tmp19, %type ; <i1> [#uses=1]
+ br i1 %tmp21, label %UnifiedReturnBlock, label %cond_next25
+
+cond_next25: ; preds = %cond_false
+ %tmp30 = getelementptr %struct.tree_node* %type, i32 0, i32 0, i32 0, i32 3 ; <i8*> [#uses=1]
+ %tmp3031 = bitcast i8* %tmp30 to i32* ; <i32*> [#uses=6]
+ %tmp32 = load i32* %tmp3031, align 8 ; <i32> [#uses=3]
+ %tmp3435 = trunc i32 %tmp32 to i8 ; <i8> [#uses=3]
+ %tmp34353637 = zext i8 %tmp3435 to i64 ; <i64> [#uses=1]
+ %tmp38 = getelementptr [0 x i32]* @tree_code_type, i32 0, i64 %tmp34353637 ; <i32*> [#uses=1]
+ %tmp39 = load i32* %tmp38, align 4 ; <i32> [#uses=1]
+ %tmp40 = icmp eq i32 %tmp39, 2 ; <i1> [#uses=4]
+ br i1 %tmp40, label %cond_next46, label %cond_true43
+
+cond_true43: ; preds = %cond_next25
+ tail call void @tree_class_check_failed( %struct.tree_node* %type, i32 2, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1719, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_next46: ; preds = %cond_next25
+ %tmp4950 = bitcast %struct.tree_node* %type to %struct.tree_type* ; <%struct.tree_type*> [#uses=2]
+ %tmp51 = getelementptr %struct.tree_type* %tmp4950, i32 0, i32 2 ; <%struct.tree_node**> [#uses=2]
+ %tmp52 = load %struct.tree_node** %tmp51, align 8 ; <%struct.tree_node*> [#uses=1]
+ %tmp53 = icmp eq %struct.tree_node* %tmp52, null ; <i1> [#uses=1]
+ br i1 %tmp53, label %cond_next57, label %UnifiedReturnBlock
+
+cond_next57: ; preds = %cond_next46
+ %tmp65 = and i32 %tmp32, 255 ; <i32> [#uses=1]
+ switch i32 %tmp65, label %UnifiedReturnBlock [
+ i32 6, label %bb140
+ i32 7, label %bb69
+ i32 8, label %bb140
+ i32 13, label %bb478
+ i32 23, label %bb
+ ]
+
+bb: ; preds = %cond_next57
+ tail call void @fancy_abort( i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1727, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+bb69: ; preds = %cond_next57
+ br i1 %tmp40, label %cond_next91, label %cond_true88
+
+cond_true88: ; preds = %bb69
+ tail call void @tree_class_check_failed( %struct.tree_node* %type, i32 2, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1730, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_next91: ; preds = %bb69
+ %tmp96 = getelementptr %struct.tree_node* %type, i32 0, i32 0, i32 8 ; <i8*> [#uses=1]
+ %tmp9697 = bitcast i8* %tmp96 to i32* ; <i32*> [#uses=2]
+ %tmp98 = load i32* %tmp9697, align 8 ; <i32> [#uses=2]
+ %tmp100101552 = and i32 %tmp98, 511 ; <i32> [#uses=1]
+ %tmp102 = icmp eq i32 %tmp100101552, 0 ; <i1> [#uses=1]
+ br i1 %tmp102, label %cond_true105, label %bb140
+
+cond_true105: ; preds = %cond_next91
+ br i1 %tmp40, label %cond_next127, label %cond_true124
+
+cond_true124: ; preds = %cond_true105
+ tail call void @tree_class_check_failed( %struct.tree_node* %type, i32 2, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1731, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_next127: ; preds = %cond_true105
+ %tmp136 = or i32 %tmp98, 1 ; <i32> [#uses=1]
+ %tmp137 = and i32 %tmp136, -511 ; <i32> [#uses=1]
+ store i32 %tmp137, i32* %tmp9697, align 8
+ br label %bb140
+
+bb140: ; preds = %cond_next127, %cond_next91, %cond_next57, %cond_next57
+ switch i8 %tmp3435, label %cond_true202 [
+ i8 6, label %cond_next208
+ i8 9, label %cond_next208
+ i8 7, label %cond_next208
+ i8 8, label %cond_next208
+ i8 10, label %cond_next208
+ ]
+
+cond_true202: ; preds = %bb140
+ tail call void (%struct.tree_node*, i8*, i32, i8*, ...)* @tree_check_failed( %struct.tree_node* %type, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1738, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0), i32 9, i32 6, i32 7, i32 8, i32 10, i32 0 )
+ unreachable
+
+cond_next208: ; preds = %bb140, %bb140, %bb140, %bb140, %bb140
+ %tmp213 = getelementptr %struct.tree_type* %tmp4950, i32 0, i32 14 ; <%struct.tree_node**> [#uses=1]
+ %tmp214 = load %struct.tree_node** %tmp213, align 8 ; <%struct.tree_node*> [#uses=2]
+ %tmp217 = getelementptr %struct.tree_node* %tmp214, i32 0, i32 0, i32 0, i32 3 ; <i8*> [#uses=1]
+ %tmp217218 = bitcast i8* %tmp217 to i32* ; <i32*> [#uses=1]
+ %tmp219 = load i32* %tmp217218, align 8 ; <i32> [#uses=1]
+ %tmp221222 = trunc i32 %tmp219 to i8 ; <i8> [#uses=1]
+ %tmp223 = icmp eq i8 %tmp221222, 24 ; <i1> [#uses=1]
+ br i1 %tmp223, label %cond_true226, label %cond_next340
+
+cond_true226: ; preds = %cond_next208
+ switch i8 %tmp3435, label %cond_true288 [
+ i8 6, label %cond_next294
+ i8 9, label %cond_next294
+ i8 7, label %cond_next294
+ i8 8, label %cond_next294
+ i8 10, label %cond_next294
+ ]
+
+cond_true288: ; preds = %cond_true226
+ tail call void (%struct.tree_node*, i8*, i32, i8*, ...)* @tree_check_failed( %struct.tree_node* %type, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1739, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0), i32 9, i32 6, i32 7, i32 8, i32 10, i32 0 )
+ unreachable
+
+cond_next294: ; preds = %cond_true226, %cond_true226, %cond_true226, %cond_true226, %cond_true226
+ %tmp301 = tail call i32 @tree_int_cst_sgn( %struct.tree_node* %tmp214 ) ; <i32> [#uses=1]
+ %tmp302 = icmp sgt i32 %tmp301, -1 ; <i1> [#uses=1]
+ br i1 %tmp302, label %cond_true305, label %cond_next340
+
+cond_true305: ; preds = %cond_next294
+ %tmp313 = load i32* %tmp3031, align 8 ; <i32> [#uses=2]
+ %tmp315316 = trunc i32 %tmp313 to i8 ; <i8> [#uses=1]
+ %tmp315316317318 = zext i8 %tmp315316 to i64 ; <i64> [#uses=1]
+ %tmp319 = getelementptr [0 x i32]* @tree_code_type, i32 0, i64 %tmp315316317318 ; <i32*> [#uses=1]
+ %tmp320 = load i32* %tmp319, align 4 ; <i32> [#uses=1]
+ %tmp321 = icmp eq i32 %tmp320, 2 ; <i1> [#uses=1]
+ br i1 %tmp321, label %cond_next327, label %cond_true324
+
+cond_true324: ; preds = %cond_true305
+ tail call void @tree_class_check_failed( %struct.tree_node* %type, i32 2, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1740, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_next327: ; preds = %cond_true305
+ %tmp338 = or i32 %tmp313, 8192 ; <i32> [#uses=1]
+ store i32 %tmp338, i32* %tmp3031, align 8
+ br label %cond_next340
+
+cond_next340: ; preds = %cond_next327, %cond_next294, %cond_next208
+ %tmp348 = load i32* %tmp3031, align 8 ; <i32> [#uses=1]
+ %tmp350351 = trunc i32 %tmp348 to i8 ; <i8> [#uses=1]
+ %tmp350351352353 = zext i8 %tmp350351 to i64 ; <i64> [#uses=1]
+ %tmp354 = getelementptr [0 x i32]* @tree_code_type, i32 0, i64 %tmp350351352353 ; <i32*> [#uses=1]
+ %tmp355 = load i32* %tmp354, align 4 ; <i32> [#uses=1]
+ %tmp356 = icmp eq i32 %tmp355, 2 ; <i1> [#uses=1]
+ br i1 %tmp356, label %cond_next385, label %cond_true359
+
+cond_true359: ; preds = %cond_next340
+ tail call void @tree_class_check_failed( %struct.tree_node* %type, i32 2, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1742, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_next385: ; preds = %cond_next340
+ %tmp390 = getelementptr %struct.tree_node* %type, i32 0, i32 0, i32 8 ; <i8*> [#uses=1]
+ %tmp390391 = bitcast i8* %tmp390 to i32* ; <i32*> [#uses=3]
+ %tmp392 = load i32* %tmp390391, align 8 ; <i32> [#uses=1]
+ %tmp394 = and i32 %tmp392, 511 ; <i32> [#uses=1]
+ %tmp397 = tail call i32 @smallest_mode_for_size( i32 %tmp394, i32 2 ) ; <i32> [#uses=1]
+ %tmp404 = load i32* %tmp390391, align 8 ; <i32> [#uses=1]
+ %tmp397398405 = shl i32 %tmp397, 9 ; <i32> [#uses=1]
+ %tmp407 = and i32 %tmp397398405, 65024 ; <i32> [#uses=1]
+ %tmp408 = and i32 %tmp404, -65025 ; <i32> [#uses=1]
+ %tmp409 = or i32 %tmp408, %tmp407 ; <i32> [#uses=2]
+ store i32 %tmp409, i32* %tmp390391, align 8
+ %tmp417 = load i32* %tmp3031, align 8 ; <i32> [#uses=1]
+ %tmp419420 = trunc i32 %tmp417 to i8 ; <i8> [#uses=1]
+ %tmp419420421422 = zext i8 %tmp419420 to i64 ; <i64> [#uses=1]
+ %tmp423 = getelementptr [0 x i32]* @tree_code_type, i32 0, i64 %tmp419420421422 ; <i32*> [#uses=1]
+ %tmp424 = load i32* %tmp423, align 4 ; <i32> [#uses=1]
+ %tmp425 = icmp eq i32 %tmp424, 2 ; <i1> [#uses=1]
+ br i1 %tmp425, label %cond_next454, label %cond_true428
+
+cond_true428: ; preds = %cond_next385
+ tail call void @tree_class_check_failed( %struct.tree_node* %type, i32 2, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1744, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_next454: ; preds = %cond_next385
+ lshr i32 %tmp409, 9 ; <i32>:0 [#uses=1]
+ trunc i32 %0 to i8 ; <i8>:1 [#uses=1]
+ %tmp463464 = and i8 %1, 127 ; <i8> [#uses=1]
+ %tmp463464465466 = zext i8 %tmp463464 to i64 ; <i64> [#uses=1]
+ %tmp467 = getelementptr [48 x i8]* @mode_size, i32 0, i64 %tmp463464465466 ; <i8*> [#uses=1]
+ %tmp468 = load i8* %tmp467, align 1 ; <i8> [#uses=1]
+ %tmp468469553 = zext i8 %tmp468 to i16 ; <i16> [#uses=1]
+ %tmp470471 = shl i16 %tmp468469553, 3 ; <i16> [#uses=1]
+ %tmp470471472 = zext i16 %tmp470471 to i64 ; <i64> [#uses=1]
+ %tmp473 = tail call %struct.tree_node* @size_int_kind( i64 %tmp470471472, i32 2 ) ; <%struct.tree_node*> [#uses=1]
+ store %struct.tree_node* %tmp473, %struct.tree_node** %tmp51, align 8
+ ret void
+
+bb478: ; preds = %cond_next57
+ br i1 %tmp40, label %cond_next500, label %cond_true497
+
+cond_true497: ; preds = %bb478
+ tail call void @tree_class_check_failed( %struct.tree_node* %type, i32 2, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1755, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_next500: ; preds = %bb478
+ %tmp506 = getelementptr %struct.tree_node* %type, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
+ %tmp507 = load %struct.tree_node** %tmp506, align 8 ; <%struct.tree_node*> [#uses=2]
+ %tmp511 = getelementptr %struct.tree_node* %tmp507, i32 0, i32 0, i32 0, i32 3 ; <i8*> [#uses=1]
+ %tmp511512 = bitcast i8* %tmp511 to i32* ; <i32*> [#uses=1]
+ %tmp513 = load i32* %tmp511512, align 8 ; <i32> [#uses=2]
+ %tmp515516 = trunc i32 %tmp513 to i8 ; <i8> [#uses=1]
+ %tmp515516517518 = zext i8 %tmp515516 to i64 ; <i64> [#uses=1]
+ %tmp519 = getelementptr [0 x i32]* @tree_code_type, i32 0, i64 %tmp515516517518 ; <i32*> [#uses=1]
+ %tmp520 = load i32* %tmp519, align 4 ; <i32> [#uses=1]
+ %tmp521 = icmp eq i32 %tmp520, 2 ; <i1> [#uses=1]
+ br i1 %tmp521, label %cond_next527, label %cond_true524
+
+cond_true524: ; preds = %cond_next500
+ tail call void @tree_class_check_failed( %struct.tree_node* %tmp507, i32 2, i8* getelementptr ([28 x i8]* @.str, i32 0, i64 0), i32 1755, i8* getelementptr ([12 x i8]* @__FUNCTION__.22683, i32 0, i32 0) )
+ unreachable
+
+cond_next527: ; preds = %cond_next500
+ %tmp545 = and i32 %tmp513, 8192 ; <i32> [#uses=1]
+ %tmp547 = and i32 %tmp32, -8193 ; <i32> [#uses=1]
+ %tmp548 = or i32 %tmp547, %tmp545 ; <i32> [#uses=1]
+ store i32 %tmp548, i32* %tmp3031, align 8
+ ret void
+
+UnifiedReturnBlock: ; preds = %cond_next57, %cond_next46, %cond_false
+ ret void
+}
+
+declare void @fancy_abort(i8*, i32, i8*)
+
+declare void @tree_class_check_failed(%struct.tree_node*, i32, i8*, i32, i8*)
+
+declare i32 @smallest_mode_for_size(i32, i32)
+
+declare %struct.tree_node* @size_int_kind(i64, i32)
+
+declare void @tree_check_failed(%struct.tree_node*, i8*, i32, i8*, ...)
+
+declare i32 @tree_int_cst_sgn(%struct.tree_node*)
diff --git a/test/CodeGen/X86/2007-10-16-fp80_select.ll b/test/CodeGen/X86/2007-10-16-fp80_select.ll
new file mode 100644
index 0000000..3f9845c
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-16-fp80_select.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86
+; ModuleID = 'bugpoint-reduced-simplified.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9"
+ %struct.wxPoint2DInt = type { i32, i32 }
+
+define x86_fp80 @_ZNK12wxPoint2DInt14GetVectorAngleEv(%struct.wxPoint2DInt* %this) {
+entry:
+ br i1 false, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ %tmp8 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp9 = icmp sgt i32 %tmp8, -1 ; <i1> [#uses=1]
+ %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %retval
+
+UnifiedReturnBlock: ; preds = %entry
+ ret x86_fp80 0xK4005B400000000000000
+}
diff --git a/test/CodeGen/X86/2007-10-17-IllegalAsm.ll b/test/CodeGen/X86/2007-10-17-IllegalAsm.ll
new file mode 100644
index 0000000..c0bb55e
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-17-IllegalAsm.ll
@@ -0,0 +1,87 @@
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep addb | not grep x
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep cmpb | not grep x
+; PR1734
+
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
+ %struct.rtunion = type { i8* }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.stack_local_entry = type opaque
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.u = type { [1 x %struct.rtunion] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_data = type { [1 x i64] }
+ %struct.varray_head_tag = type { i64, i64, i32, i8*, %struct.varray_data }
+ %union.tree_ann_d = type opaque
+
+define void @layout_type(%struct.tree_node* %type) {
+entry:
+ %tmp32 = load i32* null, align 8 ; <i32> [#uses=3]
+ %tmp3435 = trunc i32 %tmp32 to i8 ; <i8> [#uses=1]
+ %tmp53 = icmp eq %struct.tree_node* null, null ; <i1> [#uses=1]
+ br i1 %tmp53, label %cond_next57, label %UnifiedReturnBlock
+
+cond_next57: ; preds = %entry
+ %tmp65 = and i32 %tmp32, 255 ; <i32> [#uses=1]
+ switch i32 %tmp65, label %UnifiedReturnBlock [
+ i32 6, label %bb140
+ i32 7, label %bb140
+ i32 8, label %bb140
+ i32 13, label %bb478
+ ]
+
+bb140: ; preds = %cond_next57, %cond_next57, %cond_next57
+ %tmp219 = load i32* null, align 8 ; <i32> [#uses=1]
+ %tmp221222 = trunc i32 %tmp219 to i8 ; <i8> [#uses=1]
+ %tmp223 = icmp eq i8 %tmp221222, 24 ; <i1> [#uses=1]
+ br i1 %tmp223, label %cond_true226, label %cond_next340
+
+cond_true226: ; preds = %bb140
+ switch i8 %tmp3435, label %cond_true288 [
+ i8 6, label %cond_next340
+ i8 9, label %cond_next340
+ i8 7, label %cond_next340
+ i8 8, label %cond_next340
+ i8 10, label %cond_next340
+ ]
+
+cond_true288: ; preds = %cond_true226
+ unreachable
+
+cond_next340: ; preds = %cond_true226, %cond_true226, %cond_true226, %cond_true226, %cond_true226, %bb140
+ ret void
+
+bb478: ; preds = %cond_next57
+ br i1 false, label %cond_next500, label %cond_true497
+
+cond_true497: ; preds = %bb478
+ unreachable
+
+cond_next500: ; preds = %bb478
+ %tmp513 = load i32* null, align 8 ; <i32> [#uses=1]
+ %tmp545 = and i32 %tmp513, 8192 ; <i32> [#uses=1]
+ %tmp547 = and i32 %tmp32, -8193 ; <i32> [#uses=1]
+ %tmp548 = or i32 %tmp547, %tmp545 ; <i32> [#uses=1]
+ store i32 %tmp548, i32* null, align 8
+ ret void
+
+UnifiedReturnBlock: ; preds = %cond_next57, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
new file mode 100644
index 0000000..600bd1f
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
@@ -0,0 +1,84 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR
+
+define i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) signext {
+entry:
+ br label %bb
+
+bb: ; preds = %cond_next391, %entry
+ %cnt.0 = phi i32 [ 0, %entry ], [ %tmp422445, %cond_next391 ] ; <i32> [#uses=1]
+ %v.1 = phi i32 [ undef, %entry ], [ %tmp411, %cond_next391 ] ; <i32> [#uses=0]
+ br i1 false, label %cond_true, label %cond_next127
+
+cond_true: ; preds = %bb
+ store i8* null, i8** %byteptr, align 4
+ store i8* null, i8** %byteptr, align 4
+ br label %cond_next127
+
+cond_next127: ; preds = %cond_true, %bb
+ %tmp151 = add i32 0, %round ; <i32> [#uses=1]
+ %tmp153 = ashr i32 %tmp151, %scale ; <i32> [#uses=2]
+ %tmp154155 = trunc i32 %tmp153 to i16 ; <i16> [#uses=1]
+ %tmp154155156 = sext i16 %tmp154155 to i32 ; <i32> [#uses=1]
+ %tmp158 = xor i32 %tmp154155156, %tmp153 ; <i32> [#uses=1]
+ %tmp160 = or i32 %tmp158, %cnt.0 ; <i32> [#uses=1]
+ %tmp171 = load i32* %bitptr, align 4 ; <i32> [#uses=1]
+ %tmp180181 = sext i16 0 to i32 ; <i32> [#uses=3]
+ %tmp183 = add i32 %tmp160, 1 ; <i32> [#uses=1]
+ br i1 false, label %cond_true188, label %cond_next245
+
+cond_true188: ; preds = %cond_next127
+ ret i16 0
+
+cond_next245: ; preds = %cond_next127
+ %tmp249 = ashr i32 %tmp180181, 8 ; <i32> [#uses=1]
+ %tmp250 = add i32 %tmp171, %tmp249 ; <i32> [#uses=1]
+ %tmp253444 = lshr i32 %tmp180181, 4 ; <i32> [#uses=1]
+ %tmp254 = and i32 %tmp253444, 15 ; <i32> [#uses=1]
+ %tmp256 = and i32 %tmp180181, 15 ; <i32> [#uses=2]
+ %tmp264 = icmp ugt i32 %tmp250, 15 ; <i1> [#uses=1]
+ br i1 %tmp264, label %cond_true267, label %cond_next391
+
+cond_true267: ; preds = %cond_next245
+ store i8* null, i8** %byteptr, align 4
+ store i8* null, i8** %byteptr, align 4
+ br i1 false, label %cond_true289, label %cond_next327
+
+cond_true289: ; preds = %cond_true267
+ ret i16 0
+
+cond_next327: ; preds = %cond_true267
+ br i1 false, label %cond_true343, label %cond_next385
+
+cond_true343: ; preds = %cond_next327
+ %tmp345 = load i8** %byteptr, align 4 ; <i8*> [#uses=1]
+ store i8* null, i8** %byteptr, align 4
+ br i1 false, label %cond_next385, label %cond_true352
+
+cond_true352: ; preds = %cond_true343
+ store i8* %tmp345, i8** %byteptr, align 4
+ br i1 false, label %cond_true364, label %cond_next385
+
+cond_true364: ; preds = %cond_true352
+ ret i16 0
+
+cond_next385: ; preds = %cond_true352, %cond_true343, %cond_next327
+ br label %cond_next391
+
+cond_next391: ; preds = %cond_next385, %cond_next245
+ %tmp393 = load i32* %source, align 4 ; <i32> [#uses=1]
+ %tmp395 = load i32* %bitptr, align 4 ; <i32> [#uses=2]
+ %tmp396 = shl i32 %tmp393, %tmp395 ; <i32> [#uses=1]
+ %tmp398 = sub i32 32, %tmp256 ; <i32> [#uses=1]
+ %tmp405 = lshr i32 %tmp396, 31 ; <i32> [#uses=1]
+ %tmp406 = add i32 %tmp405, -1 ; <i32> [#uses=1]
+ %tmp409 = lshr i32 %tmp406, %tmp398 ; <i32> [#uses=1]
+ %tmp411 = sub i32 0, %tmp409 ; <i32> [#uses=1]
+ %tmp422445 = add i32 %tmp254, %tmp183 ; <i32> [#uses=2]
+ %tmp426447 = add i32 %tmp395, %tmp256 ; <i32> [#uses=1]
+ store i32 %tmp426447, i32* %bitptr, align 4
+ %tmp429448 = icmp ult i32 %tmp422445, 63 ; <i1> [#uses=1]
+ br i1 %tmp429448, label %bb, label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %cond_next391
+ ret i16 0
+}
diff --git a/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll b/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
new file mode 100644
index 0000000..984094d
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+; PR1748
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define i32 @kernel_init(i8* %unused) {
+entry:
+ call void asm sideeffect "foo ${0:q}", "=*imr"( i64* null )
+ ret i32 0
+}
+
diff --git a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
new file mode 100644
index 0000000..86d3bbf
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 | grep mov | count 1
+
+define i16 @t() signext {
+entry:
+ %tmp180 = load i16* null, align 2 ; <i16> [#uses=3]
+ %tmp180181 = sext i16 %tmp180 to i32 ; <i32> [#uses=1]
+ %tmp185 = icmp slt i16 %tmp180, 0 ; <i1> [#uses=1]
+ br i1 %tmp185, label %cond_true188, label %cond_next245
+
+cond_true188: ; preds = %entry
+ %tmp195196 = trunc i16 %tmp180 to i8 ; <i8> [#uses=0]
+ ret i16 0
+
+cond_next245: ; preds = %entry
+ %tmp256 = and i32 %tmp180181, 15 ; <i32> [#uses=0]
+ ret i16 0
+}
diff --git a/test/CodeGen/X86/2007-10-30-LSRCrash.ll b/test/CodeGen/X86/2007-10-30-LSRCrash.ll
new file mode 100644
index 0000000..42db98b
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-30-LSRCrash.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -march=x86
+
+define i32 @unique(i8* %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) {
+entry:
+ br i1 false, label %cond_true15, label %cond_next107
+
+cond_true15: ; preds = %entry
+ br i1 false, label %bb98.preheader, label %bb
+
+bb: ; preds = %cond_true15
+ ret i32 0
+
+bb98.preheader: ; preds = %cond_true15
+ br i1 false, label %bb103, label %bb69.outer
+
+bb76.split: ; preds = %bb69.outer.split.split, %bb69.us208
+ br i1 false, label %bb103, label %bb69.outer
+
+bb69.outer: ; preds = %bb76.split, %bb98.preheader
+ %from.0.reg2mem.0.ph.rec = phi i32 [ %tmp75.rec, %bb76.split ], [ 0, %bb98.preheader ] ; <i32> [#uses=1]
+ %tmp75.rec = add i32 %from.0.reg2mem.0.ph.rec, 1 ; <i32> [#uses=2]
+ %tmp75 = getelementptr i8* null, i32 %tmp75.rec ; <i8*> [#uses=6]
+ br i1 false, label %bb69.us208, label %bb69.outer.split.split
+
+bb69.us208: ; preds = %bb69.outer
+ switch i32 0, label %bb76.split [
+ i32 47, label %bb89
+ i32 58, label %bb89
+ i32 92, label %bb89
+ ]
+
+bb69.outer.split.split: ; preds = %bb69.outer
+ switch i8 0, label %bb76.split [
+ i8 47, label %bb89
+ i8 58, label %bb89
+ i8 92, label %bb89
+ ]
+
+bb89: ; preds = %bb69.outer.split.split, %bb69.outer.split.split, %bb69.outer.split.split, %bb69.us208, %bb69.us208, %bb69.us208
+ %tmp75.lcssa189 = phi i8* [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.outer.split.split ], [ %tmp75, %bb69.outer.split.split ], [ %tmp75, %bb69.outer.split.split ] ; <i8*> [#uses=0]
+ ret i32 0
+
+bb103: ; preds = %bb76.split, %bb98.preheader
+ ret i32 0
+
+cond_next107: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2007-10-31-extractelement-i64.ll b/test/CodeGen/X86/2007-10-31-extractelement-i64.ll
new file mode 100644
index 0000000..1b8e67d
--- /dev/null
+++ b/test/CodeGen/X86/2007-10-31-extractelement-i64.ll
@@ -0,0 +1,82 @@
+; RUN: llc < %s -march=x86 -mattr=sse2
+; ModuleID = 'yyy.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+define <1 x i64> @a(<2 x i64> %__A) {
+entry:
+ %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2]
+ %retval = alloca <1 x i64>, align 8 ; <<1 x i64>*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store <2 x i64> %__A, <2 x i64>* %__A_addr
+ %tmp = load <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp1 = bitcast <2 x i64> %tmp to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp2 = extractelement <2 x i64> %tmp1, i32 0 ; <i64> [#uses=1]
+ %tmp3 = bitcast i64 %tmp2 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %tmp3, <1 x i64>* %retval, align 8
+ %tmp4 = load <1 x i64>* %retval, align 8 ; <<1 x i64>> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load <1 x i64>* %retval ; <<1 x i64>> [#uses=1]
+ ret <1 x i64> %retval5
+}
+
+define <1 x i64> @b(<2 x i64> %__A) {
+entry:
+ %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2]
+ %retval = alloca <1 x i64>, align 8 ; <<1 x i64>*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store <2 x i64> %__A, <2 x i64>* %__A_addr
+ %tmp = load <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp1 = bitcast <2 x i64> %tmp to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp2 = extractelement <2 x i64> %tmp1, i32 1 ; <i64> [#uses=1]
+ %tmp3 = bitcast i64 %tmp2 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %tmp3, <1 x i64>* %retval, align 8
+ %tmp4 = load <1 x i64>* %retval, align 8 ; <<1 x i64>> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load <1 x i64>* %retval ; <<1 x i64>> [#uses=1]
+ ret <1 x i64> %retval5
+}
+
+define i64 @c(<2 x i64> %__A) {
+entry:
+ %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2]
+ %retval = alloca i64, align 8 ; <i64*> [#uses=2]
+ %tmp = alloca i64, align 8 ; <i64*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store <2 x i64> %__A, <2 x i64>* %__A_addr
+ %tmp1 = load <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp2 = bitcast <2 x i64> %tmp1 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp3 = extractelement <2 x i64> %tmp2, i32 0 ; <i64> [#uses=1]
+ store i64 %tmp3, i64* %tmp, align 8
+ %tmp4 = load i64* %tmp, align 8 ; <i64> [#uses=1]
+ store i64 %tmp4, i64* %retval, align 8
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load i64* %retval ; <i64> [#uses=1]
+ ret i64 %retval5
+}
+
+define i64 @d(<2 x i64> %__A) {
+entry:
+ %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2]
+ %retval = alloca i64, align 8 ; <i64*> [#uses=2]
+ %tmp = alloca i64, align 8 ; <i64*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store <2 x i64> %__A, <2 x i64>* %__A_addr
+ %tmp1 = load <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp2 = bitcast <2 x i64> %tmp1 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp3 = extractelement <2 x i64> %tmp2, i32 1 ; <i64> [#uses=1]
+ store i64 %tmp3, i64* %tmp, align 8
+ %tmp4 = load i64* %tmp, align 8 ; <i64> [#uses=1]
+ store i64 %tmp4, i64* %retval, align 8
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load i64* %retval ; <i64> [#uses=1]
+ ret i64 %retval5
+}
diff --git a/test/CodeGen/X86/2007-11-01-ISelCrash.ll b/test/CodeGen/X86/2007-11-01-ISelCrash.ll
new file mode 100644
index 0000000..019c6a8
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-01-ISelCrash.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86
+
+ %"struct.K::JL" = type <{ i8 }>
+ %struct.jv = type { i64 }
+
+declare fastcc i64 @f(i32, %"struct.K::JL"*, i8*, i8*, %struct.jv*)
+
+define void @t(%"struct.K::JL"* %obj, i8* %name, i8* %sig, %struct.jv* %args) {
+entry:
+ %tmp5 = tail call fastcc i64 @f( i32 1, %"struct.K::JL"* %obj, i8* %name, i8* %sig, %struct.jv* %args ) ; <i64> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-11-02-BadAsm.ll b/test/CodeGen/X86/2007-11-02-BadAsm.ll
new file mode 100644
index 0000000..4e11cda
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-02-BadAsm.ll
@@ -0,0 +1,144 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl | not grep rax
+
+ %struct.color_sample = type { i64 }
+ %struct.gs_matrix = type { float, i64, float, i64, float, i64, float, i64, float, i64, float, i64 }
+ %struct.ref = type { %struct.color_sample, i16, i16 }
+ %struct.status = type { %struct.gs_matrix, i8*, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i32 }
+
+define i32 @ztype1imagepath(%struct.ref* %op) {
+entry:
+ br i1 false, label %cond_next, label %UnifiedReturnBlock
+
+cond_next: ; preds = %entry
+ br i1 false, label %cond_next68, label %UnifiedReturnBlock
+
+cond_next68: ; preds = %cond_next
+ %tmp5.i.i = malloc i8, i32 0 ; <i8*> [#uses=2]
+ br i1 false, label %bb81.outer.i, label %xit.i
+
+bb81.outer.i: ; preds = %bb87.i, %cond_next68
+ %tmp67.i = add i32 0, 1 ; <i32> [#uses=1]
+ br label %bb81.i
+
+bb61.i: ; preds = %bb81.i
+ %tmp71.i = getelementptr i8* %tmp5.i.i, i64 0 ; <i8*> [#uses=1]
+ %tmp72.i = load i8* %tmp71.i, align 1 ; <i8> [#uses=1]
+ %tmp73.i = icmp eq i8 %tmp72.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp73.i, label %bb81.i, label %xit.i
+
+bb81.i: ; preds = %bb61.i, %bb81.outer.i
+ br i1 false, label %bb87.i, label %bb61.i
+
+bb87.i: ; preds = %bb81.i
+ br i1 false, label %bb81.outer.i, label %xit.i
+
+xit.i: ; preds = %bb87.i, %bb61.i, %cond_next68
+ %lsbx.0.reg2mem.1.i = phi i32 [ 0, %cond_next68 ], [ 0, %bb61.i ], [ %tmp67.i, %bb87.i ] ; <i32> [#uses=1]
+ %tmp6162.i.i = fptrunc double 0.000000e+00 to float ; <float> [#uses=1]
+ %tmp67.i15.i = fptrunc double 0.000000e+00 to float ; <float> [#uses=1]
+ %tmp24.i27.i = icmp eq i64 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp24.i27.i, label %cond_next.i79.i, label %cond_true.i34.i
+
+cond_true.i34.i: ; preds = %xit.i
+ ret i32 0
+
+cond_next.i79.i: ; preds = %xit.i
+ %phitmp167.i = fptosi double 0.000000e+00 to i64 ; <i64> [#uses=1]
+ %tmp142143.i = fpext float %tmp6162.i.i to double ; <double> [#uses=1]
+ %tmp2.i139.i = fadd double %tmp142143.i, 5.000000e-01 ; <double> [#uses=1]
+ %tmp23.i140.i = fptosi double %tmp2.i139.i to i64 ; <i64> [#uses=1]
+ br i1 false, label %cond_true.i143.i, label %round_coord.exit148.i
+
+cond_true.i143.i: ; preds = %cond_next.i79.i
+ %tmp8.i142.i = icmp sgt i64 %tmp23.i140.i, -32768 ; <i1> [#uses=1]
+ br i1 %tmp8.i142.i, label %cond_true11.i145.i, label %round_coord.exit148.i
+
+cond_true11.i145.i: ; preds = %cond_true.i143.i
+ ret i32 0
+
+round_coord.exit148.i: ; preds = %cond_true.i143.i, %cond_next.i79.i
+ %tmp144149.i = phi i32 [ 32767, %cond_next.i79.i ], [ -32767, %cond_true.i143.i ] ; <i32> [#uses=1]
+ store i32 %tmp144149.i, i32* null, align 8
+ %tmp147148.i = fpext float %tmp67.i15.i to double ; <double> [#uses=1]
+ %tmp2.i128.i = fadd double %tmp147148.i, 5.000000e-01 ; <double> [#uses=1]
+ %tmp23.i129.i = fptosi double %tmp2.i128.i to i64 ; <i64> [#uses=2]
+ %tmp5.i130.i = icmp slt i64 %tmp23.i129.i, 32768 ; <i1> [#uses=1]
+ br i1 %tmp5.i130.i, label %cond_true.i132.i, label %round_coord.exit137.i
+
+cond_true.i132.i: ; preds = %round_coord.exit148.i
+ %tmp8.i131.i = icmp sgt i64 %tmp23.i129.i, -32768 ; <i1> [#uses=1]
+ br i1 %tmp8.i131.i, label %cond_true11.i134.i, label %round_coord.exit137.i
+
+cond_true11.i134.i: ; preds = %cond_true.i132.i
+ br label %round_coord.exit137.i
+
+round_coord.exit137.i: ; preds = %cond_true11.i134.i, %cond_true.i132.i, %round_coord.exit148.i
+ %tmp149138.i = phi i32 [ 0, %cond_true11.i134.i ], [ 32767, %round_coord.exit148.i ], [ -32767, %cond_true.i132.i ] ; <i32> [#uses=1]
+ br i1 false, label %cond_true.i121.i, label %round_coord.exit126.i
+
+cond_true.i121.i: ; preds = %round_coord.exit137.i
+ br i1 false, label %cond_true11.i123.i, label %round_coord.exit126.i
+
+cond_true11.i123.i: ; preds = %cond_true.i121.i
+ br label %round_coord.exit126.i
+
+round_coord.exit126.i: ; preds = %cond_true11.i123.i, %cond_true.i121.i, %round_coord.exit137.i
+ %tmp153127.i = phi i32 [ 0, %cond_true11.i123.i ], [ 32767, %round_coord.exit137.i ], [ -32767, %cond_true.i121.i ] ; <i32> [#uses=1]
+ br i1 false, label %cond_true.i110.i, label %round_coord.exit115.i
+
+cond_true.i110.i: ; preds = %round_coord.exit126.i
+ br i1 false, label %cond_true11.i112.i, label %round_coord.exit115.i
+
+cond_true11.i112.i: ; preds = %cond_true.i110.i
+ br label %round_coord.exit115.i
+
+round_coord.exit115.i: ; preds = %cond_true11.i112.i, %cond_true.i110.i, %round_coord.exit126.i
+ %tmp157116.i = phi i32 [ 0, %cond_true11.i112.i ], [ 32767, %round_coord.exit126.i ], [ -32767, %cond_true.i110.i ] ; <i32> [#uses=2]
+ br i1 false, label %cond_true.i99.i, label %round_coord.exit104.i
+
+cond_true.i99.i: ; preds = %round_coord.exit115.i
+ br i1 false, label %cond_true11.i101.i, label %round_coord.exit104.i
+
+cond_true11.i101.i: ; preds = %cond_true.i99.i
+ %tmp1213.i100.i = trunc i64 %phitmp167.i to i32 ; <i32> [#uses=1]
+ br label %cond_next172.i
+
+round_coord.exit104.i: ; preds = %cond_true.i99.i, %round_coord.exit115.i
+ %UnifiedRetVal.i102.i = phi i32 [ 32767, %round_coord.exit115.i ], [ -32767, %cond_true.i99.i ] ; <i32> [#uses=1]
+ %tmp164.i = call fastcc i32 @put_int( %struct.status* null, i32 %tmp157116.i ) ; <i32> [#uses=0]
+ br label %cond_next172.i
+
+cond_next172.i: ; preds = %round_coord.exit104.i, %cond_true11.i101.i
+ %tmp161105.reg2mem.0.i = phi i32 [ %tmp1213.i100.i, %cond_true11.i101.i ], [ %UnifiedRetVal.i102.i, %round_coord.exit104.i ] ; <i32> [#uses=1]
+ %tmp174.i = icmp eq i32 %tmp153127.i, 0 ; <i1> [#uses=1]
+ %bothcond.i = and i1 false, %tmp174.i ; <i1> [#uses=1]
+ %tmp235.i = call fastcc i32 @put_int( %struct.status* null, i32 %tmp149138.i ) ; <i32> [#uses=0]
+ %tmp245.i = load i8** null, align 8 ; <i8*> [#uses=2]
+ %tmp246.i = getelementptr i8* %tmp245.i, i64 1 ; <i8*> [#uses=1]
+ br i1 %bothcond.i, label %cond_next254.i, label %bb259.i
+
+cond_next254.i: ; preds = %cond_next172.i
+ store i8 13, i8* %tmp245.i, align 1
+ br label %bb259.i
+
+bb259.i: ; preds = %cond_next254.i, %cond_next172.i
+ %storemerge.i = phi i8* [ %tmp246.i, %cond_next254.i ], [ null, %cond_next172.i ] ; <i8*> [#uses=0]
+ %tmp261.i = shl i32 %lsbx.0.reg2mem.1.i, 2 ; <i32> [#uses=1]
+ store i32 %tmp261.i, i32* null, align 8
+ %tmp270.i = add i32 0, %tmp157116.i ; <i32> [#uses=1]
+ store i32 %tmp270.i, i32* null, align 8
+ %tmp275.i = add i32 0, %tmp161105.reg2mem.0.i ; <i32> [#uses=0]
+ br i1 false, label %trace_cells.exit.i, label %bb.preheader.i.i
+
+bb.preheader.i.i: ; preds = %bb259.i
+ ret i32 0
+
+trace_cells.exit.i: ; preds = %bb259.i
+ free i8* %tmp5.i.i
+ ret i32 0
+
+UnifiedReturnBlock: ; preds = %cond_next, %entry
+ ret i32 -20
+}
+
+declare fastcc i32 @put_int(%struct.status*, i32)
diff --git a/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll b/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll
new file mode 100644
index 0000000..27ec826
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s
+; PR1763
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @yield() {
+ %tmp9 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( i64* null, i64 0 ) ; <i64>
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll b/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll
new file mode 100644
index 0000000..4045618
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; PR1766
+
+ %struct.dentry = type { %struct.dentry_operations* }
+ %struct.dentry_operations = type { i32 (%struct.dentry*, %struct.qstr*)* }
+ %struct.qstr = type { i32, i32, i8* }
+
+define %struct.dentry* @d_hash_and_lookup(%struct.dentry* %dir, %struct.qstr* %name) {
+entry:
+ br i1 false, label %bb37, label %bb
+
+bb: ; preds = %bb, %entry
+ %name8.0.reg2mem.0.rec = phi i64 [ %indvar.next, %bb ], [ 0, %entry ] ; <i64> [#uses=1]
+ %hash.0.reg2mem.0 = phi i64 [ %tmp27, %bb ], [ 0, %entry ] ; <i64> [#uses=1]
+ %tmp13 = load i8* null, align 1 ; <i8> [#uses=1]
+ %tmp1314 = zext i8 %tmp13 to i64 ; <i64> [#uses=1]
+ %tmp25 = lshr i64 %tmp1314, 4 ; <i64> [#uses=1]
+ %tmp22 = add i64 %tmp25, %hash.0.reg2mem.0 ; <i64> [#uses=1]
+ %tmp26 = add i64 %tmp22, 0 ; <i64> [#uses=1]
+ %tmp27 = mul i64 %tmp26, 11 ; <i64> [#uses=2]
+ %indvar.next = add i64 %name8.0.reg2mem.0.rec, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, 0 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb37.loopexit, label %bb
+
+bb37.loopexit: ; preds = %bb
+ %phitmp = trunc i64 %tmp27 to i32 ; <i32> [#uses=1]
+ br label %bb37
+
+bb37: ; preds = %bb37.loopexit, %entry
+ %hash.0.reg2mem.1 = phi i32 [ %phitmp, %bb37.loopexit ], [ 0, %entry ] ; <i32> [#uses=1]
+ store i32 %hash.0.reg2mem.1, i32* null, align 8
+ %tmp75 = tail call i32 null( %struct.dentry* %dir, %struct.qstr* %name ) ; <i32> [#uses=0]
+ %tmp84 = tail call i32 (...)* @d_lookup( %struct.dentry* %dir, %struct.qstr* %name ) ; <i32> [#uses=0]
+ ret %struct.dentry* null
+}
+
+declare i32 @d_lookup(...)
diff --git a/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll b/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
new file mode 100644
index 0000000..6b871aa
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; PR1767
+
+define void @xor_sse_2(i64 %bytes, i64* %p1, i64* %p2) {
+entry:
+ %p2_addr = alloca i64* ; <i64**> [#uses=2]
+ %lines = alloca i32 ; <i32*> [#uses=2]
+ store i64* %p2, i64** %p2_addr, align 8
+ %tmp1 = lshr i64 %bytes, 8 ; <i64> [#uses=1]
+ %tmp12 = trunc i64 %tmp1 to i32 ; <i32> [#uses=2]
+ store i32 %tmp12, i32* %lines, align 4
+ %tmp6 = call i64* asm sideeffect "foo",
+"=r,=*r,=*r,r,0,1,2,~{dirflag},~{fpsr},~{flags},~{memory}"( i64** %p2_addr,
+i32* %lines, i64 256, i64* %p1, i64* %p2, i32 %tmp12 ) ; <i64*> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
new file mode 100644
index 0000000..8e586a7
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -relocation-model=static | grep {foo _str$}
+; PR1761
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+@str = internal constant [12 x i8] c"init/main.c\00" ; <[12 x i8]*> [#uses=1]
+
+define i32 @unknown_bootoption() {
+entry:
+ tail call void asm sideeffect "foo ${0:c}\0A", "i,~{dirflag},~{fpsr},~{flags}"( i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) )
+ ret i32 undef
+}
diff --git a/test/CodeGen/X86/2007-11-06-InstrSched.ll b/test/CodeGen/X86/2007-11-06-InstrSched.ll
new file mode 100644
index 0000000..f6db0d0
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-06-InstrSched.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep lea
+
+define float @foo(i32* %x, float* %y, i32 %c) nounwind {
+entry:
+ %tmp2132 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
+ br i1 %tmp2132, label %bb23, label %bb18
+
+bb18: ; preds = %bb18, %entry
+ %i.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp17, %bb18 ] ; <i32> [#uses=3]
+ %res.0.reg2mem.0 = phi float [ 0.000000e+00, %entry ], [ %tmp14, %bb18 ] ; <float> [#uses=1]
+ %tmp3 = getelementptr i32* %x, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1]
+ %tmp4 = load i32* %tmp3, align 4 ; <i32> [#uses=1]
+ %tmp45 = sitofp i32 %tmp4 to float ; <float> [#uses=1]
+ %tmp8 = getelementptr float* %y, i32 %i.0.reg2mem.0 ; <float*> [#uses=1]
+ %tmp9 = load float* %tmp8, align 4 ; <float> [#uses=1]
+ %tmp11 = fmul float %tmp9, %tmp45 ; <float> [#uses=1]
+ %tmp14 = fadd float %tmp11, %res.0.reg2mem.0 ; <float> [#uses=2]
+ %tmp17 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp21 = icmp ult i32 %tmp17, %c ; <i1> [#uses=1]
+ br i1 %tmp21, label %bb18, label %bb23
+
+bb23: ; preds = %bb18, %entry
+ %res.0.reg2mem.1 = phi float [ 0.000000e+00, %entry ], [ %tmp14, %bb18 ] ; <float> [#uses=1]
+ ret float %res.0.reg2mem.1
+}
diff --git a/test/CodeGen/X86/2007-11-07-MulBy4.ll b/test/CodeGen/X86/2007-11-07-MulBy4.ll
new file mode 100644
index 0000000..d5b630b
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-07-MulBy4.ll
@@ -0,0 +1,129 @@
+; RUN: llc < %s -march=x86 | not grep imul
+
+ %struct.eebb = type { %struct.eebb*, i16* }
+ %struct.hf = type { %struct.hf*, i16*, i8*, i32, i32, %struct.eebb*, i32, i32, i8*, i8*, i8*, i8*, i16*, i8*, i16*, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, i8* }
+ %struct.foo_data = type { i32, i32, i32, i32*, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i16*, i16*, i16*, i16*, i32, i32, i32, %struct.ri*, i8*, %struct.hf* }
+ %struct.ri = type { %struct.ri*, i32, i8*, i16*, i32*, i32 }
+
+define fastcc i32 @foo(i16* %eptr, i8* %ecode, %struct.foo_data* %md, i32 %ims) {
+entry:
+ %tmp36 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp37 = icmp ult i32 0, %tmp36 ; <i1> [#uses=1]
+ br i1 %tmp37, label %cond_next79, label %cond_true
+
+cond_true: ; preds = %entry
+ ret i32 0
+
+cond_next79: ; preds = %entry
+ %tmp85 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp86 = icmp ult i32 0, %tmp85 ; <i1> [#uses=1]
+ br i1 %tmp86, label %cond_next130, label %cond_true89
+
+cond_true89: ; preds = %cond_next79
+ ret i32 0
+
+cond_next130: ; preds = %cond_next79
+ %tmp173 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp173, label %cond_next201, label %cond_true176
+
+cond_true176: ; preds = %cond_next130
+ ret i32 0
+
+cond_next201: ; preds = %cond_next130
+ switch i32 0, label %bb19955 [
+ i32 0, label %bb1266
+ i32 1, label %bb5018
+ i32 2, label %bb5075
+ i32 3, label %cond_true5534
+ i32 4, label %cond_true5534
+ i32 5, label %bb6039
+ i32 6, label %bb6181
+ i32 7, label %bb6323
+ i32 8, label %bb6463
+ i32 9, label %bb6605
+ i32 10, label %bb6746
+ i32 11, label %cond_next5871
+ i32 16, label %bb5452
+ i32 17, label %bb5395
+ i32 19, label %bb4883
+ i32 20, label %bb5136
+ i32 23, label %bb12899
+ i32 64, label %bb2162
+ i32 69, label %bb1447
+ i32 70, label %bb1737
+ i32 71, label %bb1447
+ i32 72, label %bb1737
+ i32 73, label %cond_true1984
+ i32 75, label %bb740
+ i32 80, label %bb552
+ ]
+
+bb552: ; preds = %cond_next201
+ ret i32 0
+
+bb740: ; preds = %cond_next201
+ ret i32 0
+
+bb1266: ; preds = %cond_next201
+ ret i32 0
+
+bb1447: ; preds = %cond_next201, %cond_next201
+ ret i32 0
+
+bb1737: ; preds = %cond_next201, %cond_next201
+ ret i32 0
+
+cond_true1984: ; preds = %cond_next201
+ ret i32 0
+
+bb2162: ; preds = %cond_next201
+ ret i32 0
+
+bb4883: ; preds = %cond_next201
+ ret i32 0
+
+bb5018: ; preds = %cond_next201
+ ret i32 0
+
+bb5075: ; preds = %cond_next201
+ ret i32 0
+
+bb5136: ; preds = %cond_next201
+ ret i32 0
+
+bb5395: ; preds = %cond_next201
+ ret i32 0
+
+bb5452: ; preds = %cond_next201
+ ret i32 0
+
+cond_true5534: ; preds = %cond_next201, %cond_next201
+ ret i32 0
+
+cond_next5871: ; preds = %cond_next201
+ ret i32 0
+
+bb6039: ; preds = %cond_next201
+ ret i32 0
+
+bb6181: ; preds = %cond_next201
+ ret i32 0
+
+bb6323: ; preds = %cond_next201
+ ret i32 0
+
+bb6463: ; preds = %cond_next201
+ ret i32 0
+
+bb6605: ; preds = %cond_next201
+ ret i32 0
+
+bb6746: ; preds = %cond_next201
+ ret i32 0
+
+bb12899: ; preds = %cond_next201
+ ret i32 0
+
+bb19955: ; preds = %cond_next201
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll b/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll
new file mode 100644
index 0000000..9c004f9
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll
@@ -0,0 +1,68 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att | grep movl | count 2
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att | not grep movb
+
+ %struct.double_int = type { i64, i64 }
+ %struct.tree_common = type <{ i8, [3 x i8] }>
+ %struct.tree_int_cst = type { %struct.tree_common, %struct.double_int }
+ %struct.tree_node = type { %struct.tree_int_cst }
+@tree_code_type = external constant [0 x i32] ; <[0 x i32]*> [#uses=1]
+
+define i32 @simple_cst_equal(%struct.tree_node* %t1, %struct.tree_node* %t2) nounwind {
+entry:
+ %tmp2526 = bitcast %struct.tree_node* %t1 to i32* ; <i32*> [#uses=1]
+ br i1 false, label %UnifiedReturnBlock, label %bb21
+
+bb21: ; preds = %entry
+ %tmp27 = load i32* %tmp2526, align 4 ; <i32> [#uses=1]
+ %tmp29 = and i32 %tmp27, 255 ; <i32> [#uses=3]
+ %tmp2930 = trunc i32 %tmp29 to i8 ; <i8> [#uses=1]
+ %tmp37 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp39 = and i32 %tmp37, 255 ; <i32> [#uses=2]
+ %tmp3940 = trunc i32 %tmp39 to i8 ; <i8> [#uses=1]
+ %tmp43 = add i32 %tmp29, -3 ; <i32> [#uses=1]
+ %tmp44 = icmp ult i32 %tmp43, 3 ; <i1> [#uses=1]
+ br i1 %tmp44, label %bb47.split, label %bb76
+
+bb47.split: ; preds = %bb21
+ ret i32 0
+
+bb76: ; preds = %bb21
+ br i1 false, label %bb82, label %bb146.split
+
+bb82: ; preds = %bb76
+ %tmp94 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp39 ; <i32*> [#uses=1]
+ %tmp95 = load i32* %tmp94, align 4 ; <i32> [#uses=1]
+ %tmp9596 = trunc i32 %tmp95 to i8 ; <i8> [#uses=1]
+ %tmp98 = add i8 %tmp9596, -4 ; <i8> [#uses=1]
+ %tmp99 = icmp ugt i8 %tmp98, 5 ; <i1> [#uses=1]
+ br i1 %tmp99, label %bb102, label %bb106
+
+bb102: ; preds = %bb82
+ ret i32 0
+
+bb106: ; preds = %bb82
+ ret i32 0
+
+bb146.split: ; preds = %bb76
+ %tmp149 = icmp eq i8 %tmp2930, %tmp3940 ; <i1> [#uses=1]
+ br i1 %tmp149, label %bb153, label %UnifiedReturnBlock
+
+bb153: ; preds = %bb146.split
+ switch i32 %tmp29, label %UnifiedReturnBlock [
+ i32 0, label %bb155
+ i32 1, label %bb187
+ ]
+
+bb155: ; preds = %bb153
+ ret i32 0
+
+bb187: ; preds = %bb153
+ %tmp198 = icmp eq %struct.tree_node* %t1, %t2 ; <i1> [#uses=1]
+ br i1 %tmp198, label %bb201, label %UnifiedReturnBlock
+
+bb201: ; preds = %bb187
+ ret i32 0
+
+UnifiedReturnBlock: ; preds = %bb187, %bb153, %bb146.split, %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll b/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
new file mode 100644
index 0000000..721d4c9
--- /dev/null
+++ b/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
@@ -0,0 +1,86 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from
+; kicking in.
+
+declare fastcc void @rdft(i32, i32, double*, i32*, double*)
+
+define fastcc void @mp_sqrt(i32 %n, i32 %radix, i32* %in, i32* %out, i32* %tmp1, i32* %tmp2, i32 %nfft, double* %tmp1fft, double* %tmp2fft, i32* %ip, double* %w) nounwind {
+entry:
+ br label %bb.i5
+
+bb.i5: ; preds = %bb.i5, %entry
+ %nfft_init.0.i = phi i32 [ 1, %entry ], [ %tmp7.i3, %bb.i5 ] ; <i32> [#uses=1]
+ %foo = phi i1 [1, %entry], [0, %bb.i5]
+ %tmp7.i3 = shl i32 %nfft_init.0.i, 1 ; <i32> [#uses=2]
+ br i1 %foo, label %bb.i5, label %mp_unexp_mp2d.exit.i
+
+mp_unexp_mp2d.exit.i: ; preds = %bb.i5
+ br i1 %foo, label %cond_next.i, label %cond_true.i
+
+cond_true.i: ; preds = %mp_unexp_mp2d.exit.i
+ ret void
+
+cond_next.i: ; preds = %mp_unexp_mp2d.exit.i
+ %tmp22.i = sdiv i32 0, 2 ; <i32> [#uses=2]
+ br i1 %foo, label %cond_true29.i, label %cond_next36.i
+
+cond_true29.i: ; preds = %cond_next.i
+ ret void
+
+cond_next36.i: ; preds = %cond_next.i
+ store i32 %tmp22.i, i32* null, align 4
+ %tmp8.i14.i = select i1 %foo, i32 1, i32 0 ; <i32> [#uses=1]
+ br label %bb.i28.i
+
+bb.i28.i: ; preds = %bb.i28.i, %cond_next36.i
+; CHECK: %bb.i28.i
+; CHECK: addl $2
+; CHECK: addl $2
+ %j.0.reg2mem.0.i16.i = phi i32 [ 0, %cond_next36.i ], [ %indvar.next39.i, %bb.i28.i ] ; <i32> [#uses=2]
+ %din_addr.1.reg2mem.0.i17.i = phi double [ 0.000000e+00, %cond_next36.i ], [ %tmp16.i25.i, %bb.i28.i ] ; <double> [#uses=1]
+ %tmp1.i18.i = fptosi double %din_addr.1.reg2mem.0.i17.i to i32 ; <i32> [#uses=2]
+ %tmp4.i19.i = icmp slt i32 %tmp1.i18.i, %radix ; <i1> [#uses=1]
+ %x.0.i21.i = select i1 %tmp4.i19.i, i32 %tmp1.i18.i, i32 0 ; <i32> [#uses=1]
+ %tmp41.sum.i = add i32 %j.0.reg2mem.0.i16.i, 2 ; <i32> [#uses=0]
+ %tmp1213.i23.i = sitofp i32 %x.0.i21.i to double ; <double> [#uses=1]
+ %tmp15.i24.i = fsub double 0.000000e+00, %tmp1213.i23.i ; <double> [#uses=1]
+ %tmp16.i25.i = fmul double 0.000000e+00, %tmp15.i24.i ; <double> [#uses=1]
+ %indvar.next39.i = add i32 %j.0.reg2mem.0.i16.i, 2 ; <i32> [#uses=2]
+ %exitcond40.i = icmp eq i32 %indvar.next39.i, %tmp8.i14.i ; <i1> [#uses=1]
+ br i1 %exitcond40.i, label %mp_unexp_d2mp.exit29.i, label %bb.i28.i
+
+mp_unexp_d2mp.exit29.i: ; preds = %bb.i28.i
+ %tmp46.i = sub i32 0, %tmp22.i ; <i32> [#uses=1]
+ store i32 %tmp46.i, i32* null, align 4
+ br i1 %exitcond40.i, label %bb.i.i, label %mp_sqrt_init.exit
+
+bb.i.i: ; preds = %bb.i.i, %mp_unexp_d2mp.exit29.i
+ br label %bb.i.i
+
+mp_sqrt_init.exit: ; preds = %mp_unexp_d2mp.exit29.i
+ tail call fastcc void @mp_mul_csqu( i32 0, double* %tmp1fft )
+ tail call fastcc void @rdft( i32 0, i32 -1, double* null, i32* %ip, double* %w )
+ tail call fastcc void @mp_mul_d2i( i32 0, i32 %radix, i32 0, double* %tmp1fft, i32* %tmp2 )
+ br i1 %exitcond40.i, label %cond_false.i, label %cond_true36.i
+
+cond_true36.i: ; preds = %mp_sqrt_init.exit
+ ret void
+
+cond_false.i: ; preds = %mp_sqrt_init.exit
+ tail call fastcc void @mp_round( i32 0, i32 %radix, i32 0, i32* %out )
+ tail call fastcc void @mp_add( i32 0, i32 %radix, i32* %tmp1, i32* %tmp2, i32* %tmp1 )
+ tail call fastcc void @mp_sub( i32 0, i32 %radix, i32* %in, i32* %tmp2, i32* %tmp2 )
+ tail call fastcc void @mp_round( i32 0, i32 %radix, i32 0, i32* %tmp1 )
+ tail call fastcc void @mp_mul_d2i( i32 0, i32 %radix, i32 %tmp7.i3, double* %tmp2fft, i32* %tmp2 )
+ ret void
+}
+
+declare fastcc void @mp_add(i32, i32, i32*, i32*, i32*)
+
+declare fastcc void @mp_sub(i32, i32, i32*, i32*, i32*)
+
+declare fastcc void @mp_round(i32, i32, i32, i32*)
+
+declare fastcc void @mp_mul_csqu(i32, double*)
+
+declare fastcc void @mp_mul_d2i(i32, i32, i32, double*, i32*)
diff --git a/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll b/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll
new file mode 100644
index 0000000..ca995cc
--- /dev/null
+++ b/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll
@@ -0,0 +1,680 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin | not grep IMPLICIT_DEF
+
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.ggBRDF = type { i32 (...)** }
+ %"struct.ggBST<ggMaterial>" = type { %"struct.ggBSTNode<ggMaterial>"*, i32 }
+ %"struct.ggBST<ggRasterSurfaceTexture>" = type { %"struct.ggBSTNode<ggRasterSurfaceTexture>"*, i32 }
+ %"struct.ggBST<ggSolidTexture>" = type { %"struct.ggBSTNode<ggSolidTexture>"*, i32 }
+ %"struct.ggBST<ggSpectrum>" = type { %"struct.ggBSTNode<ggSpectrum>"*, i32 }
+ %"struct.ggBST<mrObjectRecord>" = type { %"struct.ggBSTNode<mrObjectRecord>"*, i32 }
+ %"struct.ggBSTNode<ggMaterial>" = type { %"struct.ggBSTNode<ggMaterial>"*, %"struct.ggBSTNode<ggMaterial>"*, %struct.ggString, %struct.ggMaterial* }
+ %"struct.ggBSTNode<ggRasterSurfaceTexture>" = type { %"struct.ggBSTNode<ggRasterSurfaceTexture>"*, %"struct.ggBSTNode<ggRasterSurfaceTexture>"*, %struct.ggString, %struct.ggRasterSurfaceTexture* }
+ %"struct.ggBSTNode<ggSolidTexture>" = type { %"struct.ggBSTNode<ggSolidTexture>"*, %"struct.ggBSTNode<ggSolidTexture>"*, %struct.ggString, %struct.ggBRDF* }
+ %"struct.ggBSTNode<ggSpectrum>" = type { %"struct.ggBSTNode<ggSpectrum>"*, %"struct.ggBSTNode<ggSpectrum>"*, %struct.ggString, %struct.ggSpectrum* }
+ %"struct.ggBSTNode<mrObjectRecord>" = type { %"struct.ggBSTNode<mrObjectRecord>"*, %"struct.ggBSTNode<mrObjectRecord>"*, %struct.ggString, %struct.mrObjectRecord* }
+ %"struct.ggDictionary<ggMaterial>" = type { %"struct.ggBST<ggMaterial>" }
+ %"struct.ggDictionary<ggRasterSurfaceTexture>" = type { %"struct.ggBST<ggRasterSurfaceTexture>" }
+ %"struct.ggDictionary<ggSolidTexture>" = type { %"struct.ggBST<ggSolidTexture>" }
+ %"struct.ggDictionary<ggSpectrum>" = type { %"struct.ggBST<ggSpectrum>" }
+ %"struct.ggDictionary<mrObjectRecord>" = type { %"struct.ggBST<mrObjectRecord>" }
+ %struct.ggHAffineMatrix3 = type { %struct.ggHMatrix3 }
+ %struct.ggHBoxMatrix3 = type { %struct.ggHAffineMatrix3 }
+ %struct.ggHMatrix3 = type { [4 x [4 x double]] }
+ %struct.ggMaterial = type { i32 (...)**, %struct.ggBRDF* }
+ %struct.ggPoint3 = type { [3 x double] }
+ %"struct.ggRGBPixel<char>" = type { [3 x i8], i8 }
+ %"struct.ggRaster<ggRGBPixel<unsigned char> >" = type { i32, i32, %"struct.ggRGBPixel<char>"* }
+ %struct.ggRasterSurfaceTexture = type { %"struct.ggRaster<ggRGBPixel<unsigned char> >"* }
+ %struct.ggSolidNoise3 = type { i32, [256 x %struct.ggPoint3], [256 x i32] }
+ %struct.ggSpectrum = type { [8 x float] }
+ %struct.ggString = type { %"struct.ggString::StringRep"* }
+ %"struct.ggString::StringRep" = type { i32, i32, [1 x i8] }
+ %"struct.ggTrain<mrPixelRenderer*>" = type { %struct.ggBRDF**, i32, i32 }
+ %struct.mrObjectRecord = type { %struct.ggHBoxMatrix3, %struct.ggHBoxMatrix3, %struct.mrSurfaceList, %struct.ggMaterial*, i32, %struct.ggRasterSurfaceTexture*, %struct.ggBRDF*, i32, i32 }
+ %struct.mrScene = type { %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggBRDF*, %struct.ggBRDF*, %struct.ggBRDF*, i32, double, %"struct.ggDictionary<mrObjectRecord>", %"struct.ggDictionary<ggRasterSurfaceTexture>", %"struct.ggDictionary<ggSolidTexture>", %"struct.ggDictionary<ggSpectrum>", %"struct.ggDictionary<ggMaterial>" }
+ %struct.mrSurfaceList = type { %struct.ggBRDF, %"struct.ggTrain<mrPixelRenderer*>" }
+ %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>" = type { %"struct.std::locale::facet" }
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"* }
+ %"struct.std::basic_istream<char,std::char_traits<char> >" = type { i32 (...)**, i32, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %struct.__sbuf, [8 x %struct.__sbuf], i32, %struct.__sbuf*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
[email protected] = external constant [7 x i8] ; <[7 x i8]*> [#uses=1]
[email protected] = external constant [11 x i8] ; <[11 x i8]*> [#uses=1]
+
+define fastcc void @_ZN7mrScene4ReadERSi(%struct.mrScene* %this, %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces) {
+entry:
+ %tmp6.i.i8288 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit unwind label %lpad ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit: ; preds = %entry
+ %tmp6.i.i8995 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit96 unwind label %lpad3825 ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit96: ; preds = %_ZN8ggStringC1Ei.exit
+ %tmp6.i.i97103 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit104 unwind label %lpad3829 ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit104: ; preds = %_ZN8ggStringC1Ei.exit96
+ %tmp6.i.i105111 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit112 unwind label %lpad3833 ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit112: ; preds = %_ZN8ggStringC1Ei.exit104
+ %tmp6.i.i122128 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit129 unwind label %lpad3837 ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit129: ; preds = %_ZN8ggStringC1Ei.exit112
+ %tmp6.i.i132138 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit139 unwind label %lpad3841 ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit139: ; preds = %_ZN8ggStringC1Ei.exit129
+ %tmp295 = invoke i8* @_Znwm( i32 16 )
+ to label %invcont294 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+invcont294: ; preds = %_ZN8ggStringC1Ei.exit139
+ %tmp10.i.i141 = invoke i8* @_Znam( i32 16 )
+ to label %_ZN13mrSurfaceListC1Ev.exit unwind label %lpad3849 ; <i8*> [#uses=0]
+
+_ZN13mrSurfaceListC1Ev.exit: ; preds = %invcont294
+ %tmp3.i148 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i.noexc: ; preds = %_ZN13mrSurfaceListC1Ev.exit
+ %tmp15.i149 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i.noexc unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i.noexc: ; preds = %tmp3.i.noexc
+ br i1 false, label %bb308, label %bb.i
+
+bb.i: ; preds = %tmp15.i.noexc
+ ret void
+
+bb308: ; preds = %tmp15.i.noexc
+ br i1 false, label %bb3743.preheader, label %bb315
+
+bb3743.preheader: ; preds = %bb308
+ %tmp16.i3862 = getelementptr %struct.ggPoint3* null, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp16.i3859 = getelementptr %struct.ggPoint3* null, i32 0, i32 0, i32 0 ; <double*> [#uses=3]
+ br label %bb3743
+
+bb315: ; preds = %bb308
+ ret void
+
+bb333: ; preds = %invcont3758, %invcont335
+ %tmp3.i167180 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i167.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i167.noexc: ; preds = %bb333
+ %tmp15.i182 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i.noexc181 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i.noexc181: ; preds = %tmp3.i167.noexc
+ br i1 false, label %invcont335, label %bb.i178
+
+bb.i178: ; preds = %tmp15.i.noexc181
+ ret void
+
+invcont335: ; preds = %tmp15.i.noexc181
+ br i1 false, label %bb3743, label %bb333
+
+bb345: ; preds = %invcont3758
+ br i1 false, label %bb353, label %bb360
+
+bb353: ; preds = %bb345
+ %tmp356 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null )
+ to label %bb3743 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+bb360: ; preds = %bb345
+ br i1 false, label %bb368, label %bb374
+
+bb368: ; preds = %bb360
+ %tmp373 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null )
+ to label %bb3743 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+bb374: ; preds = %bb360
+ br i1 false, label %bb396, label %bb421
+
+bb396: ; preds = %bb374
+ ret void
+
+bb421: ; preds = %bb374
+ br i1 false, label %bb429, label %bb530
+
+bb429: ; preds = %bb421
+ ret void
+
+bb530: ; preds = %bb421
+ br i1 false, label %bb538, label %bb673
+
+bb538: ; preds = %bb530
+ ret void
+
+bb673: ; preds = %bb530
+ br i1 false, label %bb681, label %bb778
+
+bb681: ; preds = %bb673
+ ret void
+
+bb778: ; preds = %bb673
+ br i1 false, label %bb786, label %bb891
+
+bb786: ; preds = %bb778
+ ret void
+
+bb891: ; preds = %bb778
+ br i1 false, label %bb899, label %bb998
+
+bb899: ; preds = %bb891
+ ret void
+
+bb998: ; preds = %bb891
+ br i1 false, label %bb1168, label %bb1190
+
+bb1168: ; preds = %bb998
+ ret void
+
+bb1190: ; preds = %bb998
+ br i1 false, label %bb1198, label %bb1220
+
+bb1198: ; preds = %bb1190
+ ret void
+
+bb1220: ; preds = %bb1190
+ br i1 false, label %bb1228, label %bb1250
+
+bb1228: ; preds = %bb1220
+ ret void
+
+bb1250: ; preds = %bb1220
+ br i1 false, label %bb1258, label %bb1303
+
+bb1258: ; preds = %bb1250
+ ret void
+
+bb1303: ; preds = %bb1250
+ br i1 false, label %bb1311, label %bb1366
+
+bb1311: ; preds = %bb1303
+ ret void
+
+bb1366: ; preds = %bb1303
+ br i1 false, label %bb1374, label %bb1432
+
+bb1374: ; preds = %bb1366
+ ret void
+
+bb1432: ; preds = %bb1366
+ br i1 false, label %bb1440, label %bb1495
+
+bb1440: ; preds = %bb1432
+ ret void
+
+bb1495: ; preds = %bb1432
+ br i1 false, label %bb1503, label %bb1561
+
+bb1503: ; preds = %bb1495
+ ret void
+
+bb1561: ; preds = %bb1495
+ br i1 false, label %bb1569, label %bb1624
+
+bb1569: ; preds = %bb1561
+ ret void
+
+bb1624: ; preds = %bb1561
+ br i1 false, label %bb1632, label %bb1654
+
+bb1632: ; preds = %bb1624
+ store double 0.000000e+00, double* %tmp16.i3859, align 8
+ %tmp3.i38383852 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3838.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3838.noexc: ; preds = %bb1632
+ %tmp15.i38473853 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i3847.noexc unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i3847.noexc: ; preds = %tmp3.i3838.noexc
+ br i1 false, label %invcont1634, label %bb.i3850
+
+bb.i3850: ; preds = %tmp15.i3847.noexc
+ ret void
+
+invcont1634: ; preds = %tmp15.i3847.noexc
+ %tmp3.i38173831 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3817.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3817.noexc: ; preds = %invcont1634
+ %tmp15.i38263832 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i3826.noexc unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i3826.noexc: ; preds = %tmp3.i3817.noexc
+ br i1 false, label %invcont1636, label %bb.i3829
+
+bb.i3829: ; preds = %tmp15.i3826.noexc
+ ret void
+
+invcont1636: ; preds = %tmp15.i3826.noexc
+ %tmp8.i38083811 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* %tmp16.i3862 )
+ to label %tmp8.i3808.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+tmp8.i3808.noexc: ; preds = %invcont1636
+ %tmp9.i38093812 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp8.i38083811, double* null )
+ to label %tmp9.i3809.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+tmp9.i3809.noexc: ; preds = %tmp8.i3808.noexc
+ %tmp10.i38103813 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp9.i38093812, double* null )
+ to label %invcont1638 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont1638: ; preds = %tmp9.i3809.noexc
+ %tmp8.i37983801 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* %tmp16.i3859 )
+ to label %tmp8.i3798.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+tmp8.i3798.noexc: ; preds = %invcont1638
+ %tmp9.i37993802 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp8.i37983801, double* null )
+ to label %tmp9.i3799.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+tmp9.i3799.noexc: ; preds = %tmp8.i3798.noexc
+ %tmp10.i38003803 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp9.i37993802, double* null )
+ to label %invcont1640 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont1640: ; preds = %tmp9.i3799.noexc
+ %tmp3.i3778 = load double* %tmp16.i3859, align 8 ; <double> [#uses=1]
+ %tmp1643 = invoke i8* @_Znwm( i32 76 )
+ to label %invcont1642 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+invcont1642: ; preds = %invcont1640
+ %tmp18.i3770 = fsub double %tmp3.i3778, 0.000000e+00 ; <double> [#uses=0]
+ invoke fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i( %struct.mrScene* %this, %struct.ggBRDF* null, %struct.ggString* null, %struct.ggString* null, i32 0 )
+ to label %bb3743 unwind label %lpad3845
+
+bb1654: ; preds = %bb1624
+ br i1 false, label %bb1662, label %bb1693
+
+bb1662: ; preds = %bb1654
+ %tmp3.i37143728 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3714.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3714.noexc: ; preds = %bb1662
+ %tmp15.i37233729 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i3723.noexc unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i3723.noexc: ; preds = %tmp3.i3714.noexc
+ ret void
+
+bb1693: ; preds = %bb1654
+ br i1 false, label %bb1701, label %bb1745
+
+bb1701: ; preds = %bb1693
+ %tmp3.i36493663 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3649.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3649.noexc: ; preds = %bb1701
+ ret void
+
+bb1745: ; preds = %bb1693
+ br i1 false, label %bb1753, label %bb1797
+
+bb1753: ; preds = %bb1745
+ ret void
+
+bb1797: ; preds = %bb1745
+ br i1 false, label %bb1805, label %bb1847
+
+bb1805: ; preds = %bb1797
+ ret void
+
+bb1847: ; preds = %bb1797
+ br i1 false, label %bb1855, label %bb1897
+
+bb1855: ; preds = %bb1847
+ %tmp3.i34633477 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3463.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3463.noexc: ; preds = %bb1855
+ %tmp15.i34723478 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i3472.noexc unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i3472.noexc: ; preds = %tmp3.i3463.noexc
+ br i1 false, label %invcont1857, label %bb.i3475
+
+bb.i3475: ; preds = %tmp15.i3472.noexc
+ invoke fastcc void @_ZN8ggStringaSEPKc( %struct.ggString* null, i8* null )
+ to label %invcont1857 unwind label %lpad3845
+
+invcont1857: ; preds = %bb.i3475, %tmp15.i3472.noexc
+ %tmp1860 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null )
+ to label %invcont1859 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont1859: ; preds = %invcont1857
+ %tmp1862 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp1860, double* null )
+ to label %invcont1861 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont1861: ; preds = %invcont1859
+ %tmp1864 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp1862, double* null )
+ to label %invcont1863 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont1863: ; preds = %invcont1861
+ %tmp1866 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp1864, double* null )
+ to label %invcont1865 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont1865: ; preds = %invcont1863
+ %tmp1868 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp1866, double* null )
+ to label %invcont1867 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont1867: ; preds = %invcont1865
+ %tmp1881 = invoke i8 @_ZNKSt9basic_iosIcSt11char_traitsIcEE4goodEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) zeroext
+ to label %invcont1880 unwind label %lpad3845 ; <i8> [#uses=0]
+
+invcont1880: ; preds = %invcont1867
+ %tmp1883 = invoke i8* @_Znwm( i32 24 )
+ to label %invcont1882 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+invcont1882: ; preds = %invcont1880
+ invoke fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i( %struct.mrScene* %this, %struct.ggBRDF* null, %struct.ggString* null, %struct.ggString* null, i32 0 )
+ to label %bb3743 unwind label %lpad3845
+
+bb1897: ; preds = %bb1847
+ br i1 false, label %bb1905, label %bb1947
+
+bb1905: ; preds = %bb1897
+ ret void
+
+bb1947: ; preds = %bb1897
+ br i1 false, label %bb1955, label %bb2000
+
+bb1955: ; preds = %bb1947
+ ret void
+
+bb2000: ; preds = %bb1947
+ br i1 false, label %bb2008, label %bb2053
+
+bb2008: ; preds = %bb2000
+ ret void
+
+bb2053: ; preds = %bb2000
+ br i1 false, label %bb2061, label %bb2106
+
+bb2061: ; preds = %bb2053
+ %tmp3.i32433257 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3243.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3243.noexc: ; preds = %bb2061
+ %tmp15.i32523258 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %bb.i3255 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+bb.i3255: ; preds = %tmp3.i3243.noexc
+ invoke fastcc void @_ZN8ggStringaSEPKc( %struct.ggString* null, i8* null )
+ to label %invcont2063 unwind label %lpad3845
+
+invcont2063: ; preds = %bb.i3255
+ ret void
+
+bb2106: ; preds = %bb2053
+ %tmp7.i3214 = call i32 @strcmp( i8* %tmp5.i161, i8* getelementptr ([7 x i8]* @.str80, i32 0, i32 0) ) nounwind readonly ; <i32> [#uses=0]
+ br i1 false, label %bb2114, label %bb2136
+
+bb2114: ; preds = %bb2106
+ %tmp3.i31923206 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3192.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3192.noexc: ; preds = %bb2114
+ %tmp15.i32013207 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i3201.noexc unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i3201.noexc: ; preds = %tmp3.i3192.noexc
+ br i1 false, label %invcont2116, label %bb.i3204
+
+bb.i3204: ; preds = %tmp15.i3201.noexc
+ ret void
+
+invcont2116: ; preds = %tmp15.i3201.noexc
+ %tmp3.i31713185 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3171.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3171.noexc: ; preds = %invcont2116
+ %tmp15.i31803186 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i3180.noexc unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i3180.noexc: ; preds = %tmp3.i3171.noexc
+ br i1 false, label %invcont2118, label %bb.i3183
+
+bb.i3183: ; preds = %tmp15.i3180.noexc
+ ret void
+
+invcont2118: ; preds = %tmp15.i3180.noexc
+ %tmp8.i31623165 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null )
+ to label %tmp8.i3162.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+tmp8.i3162.noexc: ; preds = %invcont2118
+ %tmp9.i31633166 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp8.i31623165, double* null )
+ to label %tmp9.i3163.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+tmp9.i3163.noexc: ; preds = %tmp8.i3162.noexc
+ %tmp10.i31643167 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp9.i31633166, double* null )
+ to label %invcont2120 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont2120: ; preds = %tmp9.i3163.noexc
+ %tmp2123 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null )
+ to label %invcont2122 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont2122: ; preds = %invcont2120
+ %tmp2125 = invoke i8* @_Znwm( i32 36 )
+ to label %invcont2124 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+invcont2124: ; preds = %invcont2122
+ invoke fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i( %struct.mrScene* %this, %struct.ggBRDF* null, %struct.ggString* null, %struct.ggString* null, i32 0 )
+ to label %bb3743 unwind label %lpad3845
+
+bb2136: ; preds = %bb2106
+ %tmp7.i3128 = call i32 @strcmp( i8* %tmp5.i161, i8* getelementptr ([11 x i8]* @.str81, i32 0, i32 0) ) nounwind readonly ; <i32> [#uses=0]
+ br i1 false, label %bb2144, label %bb3336
+
+bb2144: ; preds = %bb2136
+ %tmp6.i.i31173123 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit3124 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit3124: ; preds = %bb2144
+ %tmp3.i30983112 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i3098.noexc unwind label %lpad3921 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i3098.noexc: ; preds = %_ZN8ggStringC1Ei.exit3124
+ %tmp15.i31073113 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i3107.noexc unwind label %lpad3921 ; <i8*> [#uses=0]
+
+tmp15.i3107.noexc: ; preds = %tmp3.i3098.noexc
+ br i1 false, label %invcont2147, label %bb.i3110
+
+bb.i3110: ; preds = %tmp15.i3107.noexc
+ ret void
+
+invcont2147: ; preds = %tmp15.i3107.noexc
+ %tmp2161 = invoke i8 @_ZNKSt9basic_iosIcSt11char_traitsIcEE4goodEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) zeroext
+ to label %invcont2160 unwind label %lpad3921 ; <i8> [#uses=0]
+
+invcont2160: ; preds = %invcont2147
+ %tmp4.i30933094 = invoke fastcc %struct.ggSpectrum* @_ZN5ggBSTI10ggSpectrumE4findERK8ggString3( %"struct.ggBSTNode<ggSpectrum>"* null, %struct.ggString* null )
+ to label %invcont2164 unwind label %lpad3921 ; <%struct.ggSpectrum*> [#uses=0]
+
+invcont2164: ; preds = %invcont2160
+ br i1 false, label %bb2170, label %bb2181
+
+bb2170: ; preds = %invcont2164
+ ret void
+
+bb2181: ; preds = %invcont2164
+ invoke fastcc void @_ZN8ggStringD1Ev( %struct.ggString* null )
+ to label %bb3743 unwind label %lpad3845
+
+bb3336: ; preds = %bb2136
+ br i1 false, label %bb3344, label %bb3734
+
+bb3344: ; preds = %bb3336
+ %tmp6.i.i773779 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit780 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit780: ; preds = %bb3344
+ %tmp6.i.i765771 = invoke i8* @_Znam( i32 12 )
+ to label %_ZN8ggStringC1Ei.exit772 unwind label %lpad4025 ; <i8*> [#uses=0]
+
+_ZN8ggStringC1Ei.exit772: ; preds = %_ZN8ggStringC1Ei.exit780
+ %tmp3.i746760 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i746.noexc unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i746.noexc: ; preds = %_ZN8ggStringC1Ei.exit772
+ %tmp15.i755761 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i755.noexc unwind label %lpad4029 ; <i8*> [#uses=0]
+
+tmp15.i755.noexc: ; preds = %tmp3.i746.noexc
+ br i1 false, label %invcont3348, label %bb.i758
+
+bb.i758: ; preds = %tmp15.i755.noexc
+ ret void
+
+invcont3348: ; preds = %tmp15.i755.noexc
+ %tmp3.i726740 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i726.noexc unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i726.noexc: ; preds = %invcont3348
+ %tmp15.i735741 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i735.noexc unwind label %lpad4029 ; <i8*> [#uses=0]
+
+tmp15.i735.noexc: ; preds = %tmp3.i726.noexc
+ br i1 false, label %bb3458, label %bb.i738
+
+bb.i738: ; preds = %tmp15.i735.noexc
+ ret void
+
+bb3458: ; preds = %tmp15.i735.noexc
+ br i1 false, label %bb3466, label %bb3491
+
+bb3466: ; preds = %bb3458
+ %tmp3469 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null )
+ to label %invcont3468 unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont3468: ; preds = %bb3466
+ %tmp3471 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp3469, double* null )
+ to label %invcont3470 unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont3470: ; preds = %invcont3468
+ %tmp3473 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERi( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp3471, i32* null )
+ to label %invcont3472 unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont3472: ; preds = %invcont3470
+ %tmp3475 = invoke i8* @_Znwm( i32 7196 )
+ to label %invcont3474 unwind label %lpad4029 ; <i8*> [#uses=1]
+
+invcont3474: ; preds = %invcont3472
+ invoke fastcc void @_ZN13ggSolidNoise3C1Ev( %struct.ggSolidNoise3* null )
+ to label %_ZN22ggCoverageSolidTextureC1Eddi.exit unwind label %lpad4045
+
+_ZN22ggCoverageSolidTextureC1Eddi.exit: ; preds = %invcont3474
+ %tmp34823483 = bitcast i8* %tmp3475 to %struct.ggBRDF* ; <%struct.ggBRDF*> [#uses=2]
+ invoke fastcc void @_ZN5ggBSTI14ggSolidTextureE17InsertIntoSubtreeERK8ggStringPS0_RP9ggBSTNodeIS0_E( %"struct.ggBST<ggSolidTexture>"* null, %struct.ggString* null, %struct.ggBRDF* %tmp34823483, %"struct.ggBSTNode<ggSolidTexture>"** null )
+ to label %bb3662 unwind label %lpad4029
+
+bb3491: ; preds = %bb3458
+ ret void
+
+bb3662: ; preds = %_ZN22ggCoverageSolidTextureC1Eddi.exit
+ invoke fastcc void @_ZN8ggStringD1Ev( %struct.ggString* null )
+ to label %invcont3663 unwind label %lpad4025
+
+invcont3663: ; preds = %bb3662
+ invoke fastcc void @_ZN8ggStringD1Ev( %struct.ggString* null )
+ to label %bb3743 unwind label %lpad3845
+
+bb3734: ; preds = %bb3336
+ ret void
+
+bb3743: ; preds = %invcont3663, %bb2181, %invcont2124, %invcont1882, %invcont1642, %bb368, %bb353, %invcont335, %bb3743.preheader
+ %tex1.3 = phi %struct.ggBRDF* [ undef, %bb3743.preheader ], [ %tex1.3, %bb368 ], [ %tex1.3, %invcont1642 ], [ %tex1.3, %invcont1882 ], [ %tex1.3, %invcont2124 ], [ %tex1.3, %bb2181 ], [ %tex1.3, %invcont335 ], [ %tmp34823483, %invcont3663 ], [ %tex1.3, %bb353 ] ; <%struct.ggBRDF*> [#uses=7]
+ %tmp3.i312325 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null )
+ to label %tmp3.i312.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0]
+
+tmp3.i312.noexc: ; preds = %bb3743
+ %tmp15.i327 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %tmp15.i.noexc326 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+tmp15.i.noexc326: ; preds = %tmp3.i312.noexc
+ br i1 false, label %invcont3745, label %bb.i323
+
+bb.i323: ; preds = %tmp15.i.noexc326
+ ret void
+
+invcont3745: ; preds = %tmp15.i.noexc326
+ %tmp3759 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null )
+ to label %invcont3758 unwind label %lpad3845 ; <i8*> [#uses=0]
+
+invcont3758: ; preds = %invcont3745
+ %tmp5.i161 = getelementptr %"struct.ggString::StringRep"* null, i32 0, i32 2, i32 0 ; <i8*> [#uses=2]
+ br i1 false, label %bb333, label %bb345
+
+lpad: ; preds = %entry
+ ret void
+
+lpad3825: ; preds = %_ZN8ggStringC1Ei.exit
+ ret void
+
+lpad3829: ; preds = %_ZN8ggStringC1Ei.exit96
+ ret void
+
+lpad3833: ; preds = %_ZN8ggStringC1Ei.exit104
+ ret void
+
+lpad3837: ; preds = %_ZN8ggStringC1Ei.exit112
+ ret void
+
+lpad3841: ; preds = %_ZN8ggStringC1Ei.exit129
+ ret void
+
+lpad3845: ; preds = %invcont3745, %tmp3.i312.noexc, %bb3743, %invcont3663, %bb3344, %bb2181, %bb2144, %invcont2124, %invcont2122, %invcont2120, %tmp9.i3163.noexc, %tmp8.i3162.noexc, %invcont2118, %tmp3.i3171.noexc, %invcont2116, %tmp3.i3192.noexc, %bb2114, %bb.i3255, %tmp3.i3243.noexc, %bb2061, %invcont1882, %invcont1880, %invcont1867, %invcont1865, %invcont1863, %invcont1861, %invcont1859, %invcont1857, %bb.i3475, %tmp3.i3463.noexc, %bb1855, %bb1701, %tmp3.i3714.noexc, %bb1662, %invcont1642, %invcont1640, %tmp9.i3799.noexc, %tmp8.i3798.noexc, %invcont1638, %tmp9.i3809.noexc, %tmp8.i3808.noexc, %invcont1636, %tmp3.i3817.noexc, %invcont1634, %tmp3.i3838.noexc, %bb1632, %bb368, %bb353, %tmp3.i167.noexc, %bb333, %tmp3.i.noexc, %_ZN13mrSurfaceListC1Ev.exit, %_ZN8ggStringC1Ei.exit139
+ ret void
+
+lpad3849: ; preds = %invcont294
+ ret void
+
+lpad3921: ; preds = %invcont2160, %invcont2147, %tmp3.i3098.noexc, %_ZN8ggStringC1Ei.exit3124
+ ret void
+
+lpad4025: ; preds = %bb3662, %_ZN8ggStringC1Ei.exit780
+ ret void
+
+lpad4029: ; preds = %_ZN22ggCoverageSolidTextureC1Eddi.exit, %invcont3472, %invcont3470, %invcont3468, %bb3466, %tmp3.i726.noexc, %invcont3348, %tmp3.i746.noexc, %_ZN8ggStringC1Ei.exit772
+ ret void
+
+lpad4045: ; preds = %invcont3474
+ ret void
+}
+
+declare fastcc void @_ZN8ggStringD1Ev(%struct.ggString*)
+
+declare i8* @_Znam(i32)
+
+declare fastcc void @_ZN8ggStringaSEPKc(%struct.ggString*, i8*)
+
+declare i32 @strcmp(i8*, i8*) nounwind readonly
+
+declare %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERi(%"struct.std::basic_istream<char,std::char_traits<char> >"*, i32*)
+
+declare i8* @_Znwm(i32)
+
+declare i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv(%"struct.std::basic_ios<char,std::char_traits<char> >"*)
+
+declare %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd(%"struct.std::basic_istream<char,std::char_traits<char> >"*, double*)
+
+declare %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_(%"struct.std::basic_istream<char,std::char_traits<char> >"*, i8*)
+
+declare fastcc void @_ZN13ggSolidNoise3C1Ev(%struct.ggSolidNoise3*)
+
+declare i8 @_ZNKSt9basic_iosIcSt11char_traitsIcEE4goodEv(%"struct.std::basic_ios<char,std::char_traits<char> >"*) zeroext
+
+declare fastcc %struct.ggSpectrum* @_ZN5ggBSTI10ggSpectrumE4findERK8ggString3(%"struct.ggBSTNode<ggSpectrum>"*, %struct.ggString*)
+
+declare fastcc void @_ZN5ggBSTI14ggSolidTextureE17InsertIntoSubtreeERK8ggStringPS0_RP9ggBSTNodeIS0_E(%"struct.ggBST<ggSolidTexture>"*, %struct.ggString*, %struct.ggBRDF*, %"struct.ggBSTNode<ggSolidTexture>"**)
+
+declare fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i(%struct.mrScene*, %struct.ggBRDF*, %struct.ggString*, %struct.ggString*, i32)
diff --git a/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll b/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll
new file mode 100644
index 0000000..455de91
--- /dev/null
+++ b/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu
+; PR1799
+
+ %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
+ %struct.c34007g__pkg__parent = type { i32*, %struct.c34007g__designated___XUB* }
+
+define void @_ada_c34007g() {
+entry:
+ %x8 = alloca %struct.c34007g__pkg__parent, align 8 ; <%struct.c34007g__pkg__parent*> [#uses=2]
+ br i1 true, label %bb1271, label %bb848
+
+bb848: ; preds = %entry
+ ret void
+
+bb1271: ; preds = %bb898
+ %tmp1272 = getelementptr %struct.c34007g__pkg__parent* %x8, i32 0, i32 0 ; <i32**> [#uses=1]
+ %x82167 = bitcast %struct.c34007g__pkg__parent* %x8 to i64* ; <i64*> [#uses=1]
+ br i1 true, label %bb4668, label %bb848
+
+bb4668: ; preds = %bb4648
+ %tmp5464 = load i64* %x82167, align 8 ; <i64> [#uses=1]
+ %tmp5467 = icmp ne i64 0, %tmp5464 ; <i1> [#uses=1]
+ %tmp5470 = load i32** %tmp1272, align 8 ; <i32*> [#uses=1]
+ %tmp5471 = icmp eq i32* %tmp5470, null ; <i1> [#uses=1]
+ call fastcc void @c34007g__pkg__create.311( %struct.c34007g__pkg__parent* null, i32 7, i32 9, i32 2, i32 4, i32 1 )
+ %tmp5475 = or i1 %tmp5471, %tmp5467 ; <i1> [#uses=1]
+ %tmp5497 = or i1 %tmp5475, false ; <i1> [#uses=1]
+ br i1 %tmp5497, label %bb848, label %bb5507
+
+bb5507: ; preds = %bb4668
+ ret void
+
+}
+
+declare fastcc void @c34007g__pkg__create.311(%struct.c34007g__pkg__parent*, i32, i32, i32, i32, i32)
diff --git a/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll b/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
new file mode 100644
index 0000000..265d968
--- /dev/null
+++ b/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86 | grep {(%esp)} | count 2
+; PR1872
+
+ %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
+ %struct.c34007g__pkg__parent = type { i32*, %struct.c34007g__designated___XUB* }
+
+define void @_ada_c34007g() {
+entry:
+ %x8 = alloca %struct.c34007g__pkg__parent, align 8 ; <%struct.c34007g__pkg__parent*> [#uses=2]
+ %tmp1272 = getelementptr %struct.c34007g__pkg__parent* %x8, i32 0, i32 0 ; <i32**> [#uses=1]
+ %x82167 = bitcast %struct.c34007g__pkg__parent* %x8 to i64* ; <i64*> [#uses=1]
+ br i1 true, label %bb4668, label %bb848
+
+bb4668: ; preds = %bb4648
+ %tmp5464 = load i64* %x82167, align 8 ; <i64> [#uses=1]
+ %tmp5467 = icmp ne i64 0, %tmp5464 ; <i1> [#uses=1]
+ %tmp5470 = load i32** %tmp1272, align 8 ; <i32*> [#uses=1]
+ %tmp5471 = icmp eq i32* %tmp5470, null ; <i1> [#uses=1]
+ %tmp5475 = or i1 %tmp5471, %tmp5467 ; <i1> [#uses=1]
+ %tmp5497 = or i1 %tmp5475, false ; <i1> [#uses=1]
+ br i1 %tmp5497, label %bb848, label %bb5507
+
+bb848: ; preds = %entry
+ ret void
+
+bb5507: ; preds = %bb4668
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-01-08-IllegalCMP.ll b/test/CodeGen/X86/2008-01-08-IllegalCMP.ll
new file mode 100644
index 0000000..7aec613
--- /dev/null
+++ b/test/CodeGen/X86/2008-01-08-IllegalCMP.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i64 @__absvdi2(i64 %a) nounwind {
+entry:
+ %w.0 = select i1 false, i64 0, i64 %a ; <i64> [#uses=2]
+ %tmp9 = icmp slt i64 %w.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp9, label %bb12, label %bb13
+
+bb12: ; preds = %entry
+ unreachable
+
+bb13: ; preds = %entry
+ ret i64 %w.0
+}
diff --git a/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll b/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll
new file mode 100644
index 0000000..b040095
--- /dev/null
+++ b/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=x86 | not grep pushf
+
+ %struct.indexentry = type { i32, i8*, i8*, i8*, i8*, i8* }
+
+define i32 @_bfd_stab_section_find_nearest_line(i32 %offset) nounwind {
+entry:
+ %tmp910 = add i32 0, %offset ; <i32> [#uses=1]
+ br i1 true, label %bb951, label %bb917
+
+bb917: ; preds = %entry
+ ret i32 0
+
+bb951: ; preds = %bb986, %entry
+ %tmp955 = sdiv i32 0, 2 ; <i32> [#uses=3]
+ %tmp961 = getelementptr %struct.indexentry* null, i32 %tmp955, i32 0 ; <i32*> [#uses=1]
+ br i1 true, label %bb986, label %bb967
+
+bb967: ; preds = %bb951
+ ret i32 0
+
+bb986: ; preds = %bb951
+ %tmp993 = load i32* %tmp961, align 4 ; <i32> [#uses=1]
+ %tmp995 = icmp ugt i32 %tmp993, %tmp910 ; <i1> [#uses=2]
+ %tmp1002 = add i32 %tmp955, 1 ; <i32> [#uses=1]
+ %low.0 = select i1 %tmp995, i32 0, i32 %tmp1002 ; <i32> [#uses=1]
+ %high.0 = select i1 %tmp995, i32 %tmp955, i32 0 ; <i32> [#uses=1]
+ %tmp1006 = icmp eq i32 %low.0, %high.0 ; <i1> [#uses=1]
+ br i1 %tmp1006, label %UnifiedReturnBlock, label %bb951
+
+UnifiedReturnBlock: ; preds = %bb986
+ ret i32 1
+}
diff --git a/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll b/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll
new file mode 100644
index 0000000..6997d53
--- /dev/null
+++ b/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -o - | grep sinl
+
+target triple = "i686-pc-linux-gnu"
+
+define x86_fp80 @f(x86_fp80 %x) nounwind {
+entry:
+ %tmp2 = tail call x86_fp80 @sinl( x86_fp80 %x ) nounwind readonly ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %tmp2
+}
+
+declare x86_fp80 @sinl(x86_fp80) nounwind readonly
diff --git a/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll b/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
new file mode 100644
index 0000000..d795610
--- /dev/null
+++ b/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -regalloc=local
+
+define void @SolveCubic(double %a, double %b, double %c, double %d, i32* %solutions, double* %x) {
+entry:
+ %tmp71 = load x86_fp80* null, align 16 ; <x86_fp80> [#uses=1]
+ %tmp72 = fdiv x86_fp80 %tmp71, 0xKC000C000000000000000 ; <x86_fp80> [#uses=1]
+ %tmp73 = fadd x86_fp80 0xK00000000000000000000, %tmp72 ; <x86_fp80> [#uses=1]
+ %tmp7374 = fptrunc x86_fp80 %tmp73 to double ; <double> [#uses=1]
+ store double %tmp7374, double* null, align 8
+ %tmp81 = load double* null, align 8 ; <double> [#uses=1]
+ %tmp82 = fadd double %tmp81, 0x401921FB54442D18 ; <double> [#uses=1]
+ %tmp83 = fdiv double %tmp82, 3.000000e+00 ; <double> [#uses=1]
+ %tmp84 = call double @cos( double %tmp83 ) ; <double> [#uses=1]
+ %tmp85 = fmul double 0.000000e+00, %tmp84 ; <double> [#uses=1]
+ %tmp8586 = fpext double %tmp85 to x86_fp80 ; <x86_fp80> [#uses=1]
+ %tmp87 = load x86_fp80* null, align 16 ; <x86_fp80> [#uses=1]
+ %tmp88 = fdiv x86_fp80 %tmp87, 0xKC000C000000000000000 ; <x86_fp80> [#uses=1]
+ %tmp89 = fadd x86_fp80 %tmp8586, %tmp88 ; <x86_fp80> [#uses=1]
+ %tmp8990 = fptrunc x86_fp80 %tmp89 to double ; <double> [#uses=1]
+ store double %tmp8990, double* null, align 8
+ %tmp97 = load double* null, align 8 ; <double> [#uses=1]
+ %tmp98 = fadd double %tmp97, 0x402921FB54442D18 ; <double> [#uses=1]
+ %tmp99 = fdiv double %tmp98, 3.000000e+00 ; <double> [#uses=1]
+ %tmp100 = call double @cos( double %tmp99 ) ; <double> [#uses=1]
+ %tmp101 = fmul double 0.000000e+00, %tmp100 ; <double> [#uses=1]
+ %tmp101102 = fpext double %tmp101 to x86_fp80 ; <x86_fp80> [#uses=1]
+ %tmp103 = load x86_fp80* null, align 16 ; <x86_fp80> [#uses=1]
+ %tmp104 = fdiv x86_fp80 %tmp103, 0xKC000C000000000000000 ; <x86_fp80> [#uses=1]
+ %tmp105 = fadd x86_fp80 %tmp101102, %tmp104 ; <x86_fp80> [#uses=1]
+ %tmp105106 = fptrunc x86_fp80 %tmp105 to double ; <double> [#uses=1]
+ store double %tmp105106, double* null, align 8
+ ret void
+}
+
+declare double @cos(double)
diff --git a/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll b/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll
new file mode 100644
index 0000000..e91f52e
--- /dev/null
+++ b/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86 | not grep IMPLICIT_DEF
+
+ %struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, i32, i32 }
+
+define void @localize_local_bb19_bb(%struct.node_t** %cur_node) {
+newFuncRoot:
+ %tmp1 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
+ %tmp2 = getelementptr %struct.node_t* %tmp1, i32 0, i32 4 ; <double**> [#uses=1]
+ %tmp3 = load double** %tmp2, align 4 ; <double*> [#uses=1]
+ %tmp4 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
+ %tmp5 = getelementptr %struct.node_t* %tmp4, i32 0, i32 4 ; <double**> [#uses=1]
+ store double* %tmp3, double** %tmp5, align 4
+ %tmp6 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
+ %tmp7 = getelementptr %struct.node_t* %tmp6, i32 0, i32 3 ; <double***> [#uses=1]
+ %tmp8 = load double*** %tmp7, align 4 ; <double**> [#uses=1]
+ %tmp9 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
+ %tmp10 = getelementptr %struct.node_t* %tmp9, i32 0, i32 3 ; <double***> [#uses=1]
+ store double** %tmp8, double*** %tmp10, align 4
+ %tmp11 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
+ %tmp12 = getelementptr %struct.node_t* %tmp11, i32 0, i32 0 ; <double**> [#uses=1]
+ %tmp13 = load double** %tmp12, align 4 ; <double*> [#uses=1]
+ %tmp14 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
+ %tmp15 = getelementptr %struct.node_t* %tmp14, i32 0, i32 0 ; <double**> [#uses=1]
+ store double* %tmp13, double** %tmp15, align 4
+ %tmp16 = load %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1]
+ %tmp17 = getelementptr %struct.node_t* %tmp16, i32 0, i32 1 ; <%struct.node_t**> [#uses=1]
+ %tmp18 = load %struct.node_t** %tmp17, align 4 ; <%struct.node_t*> [#uses=1]
+ store %struct.node_t* %tmp18, %struct.node_t** %cur_node, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-01-16-Trampoline.ll b/test/CodeGen/X86/2008-01-16-Trampoline.ll
new file mode 100644
index 0000000..704b2ba
--- /dev/null
+++ b/test/CodeGen/X86/2008-01-16-Trampoline.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
+
+ %struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets = type { i32, i32, void (i32, i32)*, i8 (i32, i32)* }
+
+define fastcc i32 @gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets.5146(i64 %table.0.0, i64 %table.0.1, i32 %last, i32 %pos) {
+entry:
+ %tramp22 = call i8* @llvm.init.trampoline( i8* null, i8* bitcast (void (%struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets*, i32, i32)* @gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets__move.5177 to i8*), i8* null ) ; <i8*> [#uses=0]
+ unreachable
+}
+
+declare void @gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets__move.5177(%struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets* nest , i32, i32) nounwind
+
+declare i8* @llvm.init.trampoline(i8*, i8*, i8*) nounwind
diff --git a/test/CodeGen/X86/2008-01-25-EmptyFunction.ll b/test/CodeGen/X86/2008-01-25-EmptyFunction.ll
new file mode 100644
index 0000000..387645f
--- /dev/null
+++ b/test/CodeGen/X86/2008-01-25-EmptyFunction.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | grep {.byte 0}
+target triple = "i686-apple-darwin8"
+
+
+define void @bork() noreturn nounwind {
+entry:
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-02-05-ISelCrash.ll b/test/CodeGen/X86/2008-02-05-ISelCrash.ll
new file mode 100644
index 0000000..443a32d
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-05-ISelCrash.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86
+; PR1975
+
+@nodes = external global i64 ; <i64*> [#uses=2]
+
+define fastcc i32 @ab(i32 %alpha, i32 %beta) nounwind {
+entry:
+ %tmp1 = load i64* @nodes, align 8 ; <i64> [#uses=1]
+ %tmp2 = add i64 %tmp1, 1 ; <i64> [#uses=1]
+ store i64 %tmp2, i64* @nodes, align 8
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll b/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
new file mode 100644
index 0000000..d2d5149
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xor | grep CPI
+
+define void @casin({ double, double }* sret %agg.result, double %z.0, double %z.1) nounwind {
+entry:
+ %memtmp = alloca { double, double }, align 8 ; <{ double, double }*> [#uses=3]
+ %tmp4 = fsub double -0.000000e+00, %z.1 ; <double> [#uses=1]
+ call void @casinh( { double, double }* sret %memtmp, double %tmp4, double %z.0 ) nounwind
+ %tmp19 = getelementptr { double, double }* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp20 = load double* %tmp19, align 8 ; <double> [#uses=1]
+ %tmp22 = getelementptr { double, double }* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp23 = load double* %tmp22, align 8 ; <double> [#uses=1]
+ %tmp32 = fsub double -0.000000e+00, %tmp20 ; <double> [#uses=1]
+ %tmp37 = getelementptr { double, double }* %agg.result, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %tmp23, double* %tmp37, align 8
+ %tmp40 = getelementptr { double, double }* %agg.result, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %tmp32, double* %tmp40, align 8
+ ret void
+}
+
+declare void @casinh({ double, double }* sret , double, double) nounwind
diff --git a/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll b/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll
new file mode 100644
index 0000000..b772d77
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll
@@ -0,0 +1,99 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep andpd | not grep esp
+
+declare double @llvm.sqrt.f64(double) nounwind readnone
+
+declare fastcc void @ApplyGivens(double**, double, double, i32, i32, i32, i32) nounwind
+
+declare double @fabs(double)
+
+define void @main_bb114_2E_outer_2E_i_bb3_2E_i27(double** %tmp12.sub.i.i, [51 x double*]* %tmp12.i.i.i, i32 %i.0.reg2mem.0.ph.i, i32 %tmp11688.i, i32 %tmp19.i, i32 %tmp24.i, [51 x double*]* %tmp12.i.i) {
+newFuncRoot:
+ br label %bb3.i27
+
+bb111.i77.bb121.i_crit_edge.exitStub: ; preds = %bb111.i77
+ ret void
+
+bb3.i27: ; preds = %bb111.i77.bb3.i27_crit_edge, %newFuncRoot
+ %indvar94.i = phi i32 [ 0, %newFuncRoot ], [ %tmp113.i76, %bb111.i77.bb3.i27_crit_edge ] ; <i32> [#uses=6]
+ %tmp6.i20 = getelementptr [51 x double*]* %tmp12.i.i, i32 0, i32 %indvar94.i ; <double**> [#uses=1]
+ %tmp7.i21 = load double** %tmp6.i20, align 4 ; <double*> [#uses=2]
+ %tmp10.i = add i32 %indvar94.i, %i.0.reg2mem.0.ph.i ; <i32> [#uses=5]
+ %tmp11.i22 = getelementptr double* %tmp7.i21, i32 %tmp10.i ; <double*> [#uses=1]
+ %tmp12.i23 = load double* %tmp11.i22, align 8 ; <double> [#uses=4]
+ %tmp20.i24 = add i32 %tmp19.i, %indvar94.i ; <i32> [#uses=3]
+ %tmp21.i = getelementptr double* %tmp7.i21, i32 %tmp20.i24 ; <double*> [#uses=1]
+ %tmp22.i25 = load double* %tmp21.i, align 8 ; <double> [#uses=3]
+ %tmp1.i.i26 = fcmp oeq double %tmp12.i23, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp1.i.i26, label %bb3.i27.Givens.exit.i49_crit_edge, label %bb5.i.i31
+
+bb5.i.i31: ; preds = %bb3.i27
+ %tmp7.i.i28 = call double @fabs( double %tmp12.i23 ) nounwind ; <double> [#uses=1]
+ %tmp9.i.i29 = call double @fabs( double %tmp22.i25 ) nounwind ; <double> [#uses=1]
+ %tmp10.i.i30 = fcmp ogt double %tmp7.i.i28, %tmp9.i.i29 ; <i1> [#uses=1]
+ br i1 %tmp10.i.i30, label %bb13.i.i37, label %bb30.i.i43
+
+bb13.i.i37: ; preds = %bb5.i.i31
+ %tmp15.i.i32 = fsub double -0.000000e+00, %tmp22.i25 ; <double> [#uses=1]
+ %tmp17.i.i33 = fdiv double %tmp15.i.i32, %tmp12.i23 ; <double> [#uses=3]
+ %tmp20.i4.i = fmul double %tmp17.i.i33, %tmp17.i.i33 ; <double> [#uses=1]
+ %tmp21.i.i34 = fadd double %tmp20.i4.i, 1.000000e+00 ; <double> [#uses=1]
+ %tmp22.i.i35 = call double @llvm.sqrt.f64( double %tmp21.i.i34 ) nounwind ; <double> [#uses=1]
+ %tmp23.i5.i = fdiv double 1.000000e+00, %tmp22.i.i35 ; <double> [#uses=2]
+ %tmp28.i.i36 = fmul double %tmp23.i5.i, %tmp17.i.i33 ; <double> [#uses=1]
+ br label %Givens.exit.i49
+
+bb30.i.i43: ; preds = %bb5.i.i31
+ %tmp32.i.i38 = fsub double -0.000000e+00, %tmp12.i23 ; <double> [#uses=1]
+ %tmp34.i.i39 = fdiv double %tmp32.i.i38, %tmp22.i25 ; <double> [#uses=3]
+ %tmp37.i6.i = fmul double %tmp34.i.i39, %tmp34.i.i39 ; <double> [#uses=1]
+ %tmp38.i.i40 = fadd double %tmp37.i6.i, 1.000000e+00 ; <double> [#uses=1]
+ %tmp39.i7.i = call double @llvm.sqrt.f64( double %tmp38.i.i40 ) nounwind ; <double> [#uses=1]
+ %tmp40.i.i41 = fdiv double 1.000000e+00, %tmp39.i7.i ; <double> [#uses=2]
+ %tmp45.i.i42 = fmul double %tmp40.i.i41, %tmp34.i.i39 ; <double> [#uses=1]
+ br label %Givens.exit.i49
+
+Givens.exit.i49: ; preds = %bb3.i27.Givens.exit.i49_crit_edge, %bb30.i.i43, %bb13.i.i37
+ %s.0.i44 = phi double [ %tmp45.i.i42, %bb30.i.i43 ], [ %tmp23.i5.i, %bb13.i.i37 ], [ 0.000000e+00, %bb3.i27.Givens.exit.i49_crit_edge ] ; <double> [#uses=2]
+ %c.0.i45 = phi double [ %tmp40.i.i41, %bb30.i.i43 ], [ %tmp28.i.i36, %bb13.i.i37 ], [ 1.000000e+00, %bb3.i27.Givens.exit.i49_crit_edge ] ; <double> [#uses=2]
+ %tmp26.i46 = add i32 %tmp24.i, %indvar94.i ; <i32> [#uses=2]
+ %tmp27.i47 = icmp slt i32 %tmp26.i46, 51 ; <i1> [#uses=1]
+ %min.i48 = select i1 %tmp27.i47, i32 %tmp26.i46, i32 50 ; <i32> [#uses=1]
+ call fastcc void @ApplyGivens( double** %tmp12.sub.i.i, double %s.0.i44, double %c.0.i45, i32 %tmp20.i24, i32 %tmp10.i, i32 %indvar94.i, i32 %min.i48 ) nounwind
+ br label %codeRepl
+
+codeRepl: ; preds = %Givens.exit.i49
+ call void @main_bb114_2E_outer_2E_i_bb3_2E_i27_bb_2E_i48_2E_i( i32 %tmp10.i, i32 %tmp20.i24, double %s.0.i44, double %c.0.i45, [51 x double*]* %tmp12.i.i.i )
+ br label %ApplyRGivens.exit49.i
+
+ApplyRGivens.exit49.i: ; preds = %codeRepl
+ %tmp10986.i = icmp sgt i32 %tmp11688.i, %tmp10.i ; <i1> [#uses=1]
+ br i1 %tmp10986.i, label %ApplyRGivens.exit49.i.bb52.i57_crit_edge, label %ApplyRGivens.exit49.i.bb111.i77_crit_edge
+
+codeRepl1: ; preds = %ApplyRGivens.exit49.i.bb52.i57_crit_edge
+ call void @main_bb114_2E_outer_2E_i_bb3_2E_i27_bb52_2E_i57( i32 %tmp10.i, double** %tmp12.sub.i.i, [51 x double*]* %tmp12.i.i.i, i32 %i.0.reg2mem.0.ph.i, i32 %tmp11688.i, i32 %tmp19.i, i32 %tmp24.i, [51 x double*]* %tmp12.i.i )
+ br label %bb105.i.bb111.i77_crit_edge
+
+bb111.i77: ; preds = %bb105.i.bb111.i77_crit_edge, %ApplyRGivens.exit49.i.bb111.i77_crit_edge
+ %tmp113.i76 = add i32 %indvar94.i, 1 ; <i32> [#uses=2]
+ %tmp118.i = icmp sgt i32 %tmp11688.i, %tmp113.i76 ; <i1> [#uses=1]
+ br i1 %tmp118.i, label %bb111.i77.bb3.i27_crit_edge, label %bb111.i77.bb121.i_crit_edge.exitStub
+
+bb3.i27.Givens.exit.i49_crit_edge: ; preds = %bb3.i27
+ br label %Givens.exit.i49
+
+ApplyRGivens.exit49.i.bb52.i57_crit_edge: ; preds = %ApplyRGivens.exit49.i
+ br label %codeRepl1
+
+ApplyRGivens.exit49.i.bb111.i77_crit_edge: ; preds = %ApplyRGivens.exit49.i
+ br label %bb111.i77
+
+bb105.i.bb111.i77_crit_edge: ; preds = %codeRepl1
+ br label %bb111.i77
+
+bb111.i77.bb3.i27_crit_edge: ; preds = %bb111.i77
+ br label %bb3.i27
+}
+
+declare void @main_bb114_2E_outer_2E_i_bb3_2E_i27_bb_2E_i48_2E_i(i32, i32, double, double, [51 x double*]*)
+
+declare void @main_bb114_2E_outer_2E_i_bb3_2E_i27_bb52_2E_i57(i32, double**, [51 x double*]*, i32, i32, i32, i32, [51 x double*]*)
diff --git a/test/CodeGen/X86/2008-02-14-BitMiscompile.ll b/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
new file mode 100644
index 0000000..1983f1d
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | grep and
+define i32 @test(i1 %A) {
+ %B = zext i1 %A to i32 ; <i32> [#uses=1]
+ %C = sub i32 0, %B ; <i32> [#uses=1]
+ %D = and i32 %C, 255 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
diff --git a/test/CodeGen/X86/2008-02-18-TailMergingBug.ll b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
new file mode 100644
index 0000000..7463a0e
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
@@ -0,0 +1,219 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& grep {Number of block tails merged} | grep 9
+; PR1909
+
[email protected] = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1]
+
+define void @minmax(float* %result) nounwind optsize {
+entry:
+ %tmp2 = load float* %result, align 4 ; <float> [#uses=6]
+ %tmp4 = getelementptr float* %result, i32 2 ; <float*> [#uses=5]
+ %tmp5 = load float* %tmp4, align 4 ; <float> [#uses=10]
+ %tmp7 = getelementptr float* %result, i32 4 ; <float*> [#uses=5]
+ %tmp8 = load float* %tmp7, align 4 ; <float> [#uses=8]
+ %tmp10 = getelementptr float* %result, i32 6 ; <float*> [#uses=3]
+ %tmp11 = load float* %tmp10, align 4 ; <float> [#uses=8]
+ %tmp12 = fcmp olt float %tmp8, %tmp11 ; <i1> [#uses=5]
+ br i1 %tmp12, label %bb, label %bb21
+
+bb: ; preds = %entry
+ %tmp23469 = fcmp olt float %tmp5, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp23469, label %bb26, label %bb30
+
+bb21: ; preds = %entry
+ %tmp23 = fcmp olt float %tmp5, %tmp11 ; <i1> [#uses=1]
+ br i1 %tmp23, label %bb26, label %bb30
+
+bb26: ; preds = %bb21, %bb
+ %tmp52471 = fcmp olt float %tmp2, %tmp5 ; <i1> [#uses=1]
+ br i1 %tmp52471, label %bb111, label %bb59
+
+bb30: ; preds = %bb21, %bb
+ br i1 %tmp12, label %bb40, label %bb50
+
+bb40: ; preds = %bb30
+ %tmp52473 = fcmp olt float %tmp2, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp52473, label %bb111, label %bb59
+
+bb50: ; preds = %bb30
+ %tmp52 = fcmp olt float %tmp2, %tmp11 ; <i1> [#uses=1]
+ br i1 %tmp52, label %bb111, label %bb59
+
+bb59: ; preds = %bb50, %bb40, %bb26
+ br i1 %tmp12, label %bb72, label %bb80
+
+bb72: ; preds = %bb59
+ %tmp82475 = fcmp olt float %tmp5, %tmp8 ; <i1> [#uses=2]
+ %brmerge786 = or i1 %tmp82475, %tmp12 ; <i1> [#uses=1]
+ %tmp4.mux787 = select i1 %tmp82475, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
+ br i1 %brmerge786, label %bb111, label %bb103
+
+bb80: ; preds = %bb59
+ %tmp82 = fcmp olt float %tmp5, %tmp11 ; <i1> [#uses=2]
+ %brmerge = or i1 %tmp82, %tmp12 ; <i1> [#uses=1]
+ %tmp4.mux = select i1 %tmp82, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
+ br i1 %brmerge, label %bb111, label %bb103
+
+bb103: ; preds = %bb80, %bb72
+ br label %bb111
+
+bb111: ; preds = %bb103, %bb80, %bb72, %bb50, %bb40, %bb26
+ %iftmp.0.0.in = phi float* [ %tmp10, %bb103 ], [ %result, %bb26 ], [ %result, %bb40 ], [ %result, %bb50 ], [ %tmp4.mux, %bb80 ], [ %tmp4.mux787, %bb72 ] ; <float*> [#uses=1]
+ %iftmp.0.0 = load float* %iftmp.0.0.in ; <float> [#uses=1]
+ %tmp125 = fcmp ogt float %tmp8, %tmp11 ; <i1> [#uses=5]
+ br i1 %tmp125, label %bb128, label %bb136
+
+bb128: ; preds = %bb111
+ %tmp138477 = fcmp ogt float %tmp5, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp138477, label %bb141, label %bb145
+
+bb136: ; preds = %bb111
+ %tmp138 = fcmp ogt float %tmp5, %tmp11 ; <i1> [#uses=1]
+ br i1 %tmp138, label %bb141, label %bb145
+
+bb141: ; preds = %bb136, %bb128
+ %tmp167479 = fcmp ogt float %tmp2, %tmp5 ; <i1> [#uses=1]
+ br i1 %tmp167479, label %bb226, label %bb174
+
+bb145: ; preds = %bb136, %bb128
+ br i1 %tmp125, label %bb155, label %bb165
+
+bb155: ; preds = %bb145
+ %tmp167481 = fcmp ogt float %tmp2, %tmp8 ; <i1> [#uses=1]
+ br i1 %tmp167481, label %bb226, label %bb174
+
+bb165: ; preds = %bb145
+ %tmp167 = fcmp ogt float %tmp2, %tmp11 ; <i1> [#uses=1]
+ br i1 %tmp167, label %bb226, label %bb174
+
+bb174: ; preds = %bb165, %bb155, %bb141
+ br i1 %tmp125, label %bb187, label %bb195
+
+bb187: ; preds = %bb174
+ %tmp197483 = fcmp ogt float %tmp5, %tmp8 ; <i1> [#uses=2]
+ %brmerge790 = or i1 %tmp197483, %tmp125 ; <i1> [#uses=1]
+ %tmp4.mux791 = select i1 %tmp197483, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
+ br i1 %brmerge790, label %bb226, label %bb218
+
+bb195: ; preds = %bb174
+ %tmp197 = fcmp ogt float %tmp5, %tmp11 ; <i1> [#uses=2]
+ %brmerge788 = or i1 %tmp197, %tmp125 ; <i1> [#uses=1]
+ %tmp4.mux789 = select i1 %tmp197, float* %tmp4, float* %tmp7 ; <float*> [#uses=1]
+ br i1 %brmerge788, label %bb226, label %bb218
+
+bb218: ; preds = %bb195, %bb187
+ br label %bb226
+
+bb226: ; preds = %bb218, %bb195, %bb187, %bb165, %bb155, %bb141
+ %iftmp.7.0.in = phi float* [ %tmp10, %bb218 ], [ %result, %bb141 ], [ %result, %bb155 ], [ %result, %bb165 ], [ %tmp4.mux789, %bb195 ], [ %tmp4.mux791, %bb187 ] ; <float*> [#uses=1]
+ %iftmp.7.0 = load float* %iftmp.7.0.in ; <float> [#uses=1]
+ %tmp229 = getelementptr float* %result, i32 1 ; <float*> [#uses=7]
+ %tmp230 = load float* %tmp229, align 4 ; <float> [#uses=6]
+ %tmp232 = getelementptr float* %result, i32 3 ; <float*> [#uses=5]
+ %tmp233 = load float* %tmp232, align 4 ; <float> [#uses=10]
+ %tmp235 = getelementptr float* %result, i32 5 ; <float*> [#uses=5]
+ %tmp236 = load float* %tmp235, align 4 ; <float> [#uses=8]
+ %tmp238 = getelementptr float* %result, i32 7 ; <float*> [#uses=3]
+ %tmp239 = load float* %tmp238, align 4 ; <float> [#uses=8]
+ %tmp240 = fcmp olt float %tmp236, %tmp239 ; <i1> [#uses=5]
+ br i1 %tmp240, label %bb243, label %bb251
+
+bb243: ; preds = %bb226
+ %tmp253485 = fcmp olt float %tmp233, %tmp236 ; <i1> [#uses=1]
+ br i1 %tmp253485, label %bb256, label %bb260
+
+bb251: ; preds = %bb226
+ %tmp253 = fcmp olt float %tmp233, %tmp239 ; <i1> [#uses=1]
+ br i1 %tmp253, label %bb256, label %bb260
+
+bb256: ; preds = %bb251, %bb243
+ %tmp282487 = fcmp olt float %tmp230, %tmp233 ; <i1> [#uses=1]
+ br i1 %tmp282487, label %bb341, label %bb289
+
+bb260: ; preds = %bb251, %bb243
+ br i1 %tmp240, label %bb270, label %bb280
+
+bb270: ; preds = %bb260
+ %tmp282489 = fcmp olt float %tmp230, %tmp236 ; <i1> [#uses=1]
+ br i1 %tmp282489, label %bb341, label %bb289
+
+bb280: ; preds = %bb260
+ %tmp282 = fcmp olt float %tmp230, %tmp239 ; <i1> [#uses=1]
+ br i1 %tmp282, label %bb341, label %bb289
+
+bb289: ; preds = %bb280, %bb270, %bb256
+ br i1 %tmp240, label %bb302, label %bb310
+
+bb302: ; preds = %bb289
+ %tmp312491 = fcmp olt float %tmp233, %tmp236 ; <i1> [#uses=2]
+ %brmerge793 = or i1 %tmp312491, %tmp240 ; <i1> [#uses=1]
+ %tmp232.mux794 = select i1 %tmp312491, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
+ br i1 %brmerge793, label %bb341, label %bb333
+
+bb310: ; preds = %bb289
+ %tmp312 = fcmp olt float %tmp233, %tmp239 ; <i1> [#uses=2]
+ %brmerge792 = or i1 %tmp312, %tmp240 ; <i1> [#uses=1]
+ %tmp232.mux = select i1 %tmp312, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
+ br i1 %brmerge792, label %bb341, label %bb333
+
+bb333: ; preds = %bb310, %bb302
+ br label %bb341
+
+bb341: ; preds = %bb333, %bb310, %bb302, %bb280, %bb270, %bb256
+ %iftmp.14.0.in = phi float* [ %tmp238, %bb333 ], [ %tmp229, %bb280 ], [ %tmp229, %bb270 ], [ %tmp229, %bb256 ], [ %tmp232.mux, %bb310 ], [ %tmp232.mux794, %bb302 ] ; <float*> [#uses=1]
+ %iftmp.14.0 = load float* %iftmp.14.0.in ; <float> [#uses=1]
+ %tmp355 = fcmp ogt float %tmp236, %tmp239 ; <i1> [#uses=5]
+ br i1 %tmp355, label %bb358, label %bb366
+
+bb358: ; preds = %bb341
+ %tmp368493 = fcmp ogt float %tmp233, %tmp236 ; <i1> [#uses=1]
+ br i1 %tmp368493, label %bb371, label %bb375
+
+bb366: ; preds = %bb341
+ %tmp368 = fcmp ogt float %tmp233, %tmp239 ; <i1> [#uses=1]
+ br i1 %tmp368, label %bb371, label %bb375
+
+bb371: ; preds = %bb366, %bb358
+ %tmp397495 = fcmp ogt float %tmp230, %tmp233 ; <i1> [#uses=1]
+ br i1 %tmp397495, label %bb456, label %bb404
+
+bb375: ; preds = %bb366, %bb358
+ br i1 %tmp355, label %bb385, label %bb395
+
+bb385: ; preds = %bb375
+ %tmp397497 = fcmp ogt float %tmp230, %tmp236 ; <i1> [#uses=1]
+ br i1 %tmp397497, label %bb456, label %bb404
+
+bb395: ; preds = %bb375
+ %tmp397 = fcmp ogt float %tmp230, %tmp239 ; <i1> [#uses=1]
+ br i1 %tmp397, label %bb456, label %bb404
+
+bb404: ; preds = %bb395, %bb385, %bb371
+ br i1 %tmp355, label %bb417, label %bb425
+
+bb417: ; preds = %bb404
+ %tmp427499 = fcmp ogt float %tmp233, %tmp236 ; <i1> [#uses=2]
+ %brmerge797 = or i1 %tmp427499, %tmp355 ; <i1> [#uses=1]
+ %tmp232.mux798 = select i1 %tmp427499, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
+ br i1 %brmerge797, label %bb456, label %bb448
+
+bb425: ; preds = %bb404
+ %tmp427 = fcmp ogt float %tmp233, %tmp239 ; <i1> [#uses=2]
+ %brmerge795 = or i1 %tmp427, %tmp355 ; <i1> [#uses=1]
+ %tmp232.mux796 = select i1 %tmp427, float* %tmp232, float* %tmp235 ; <float*> [#uses=1]
+ br i1 %brmerge795, label %bb456, label %bb448
+
+bb448: ; preds = %bb425, %bb417
+ br label %bb456
+
+bb456: ; preds = %bb448, %bb425, %bb417, %bb395, %bb385, %bb371
+ %iftmp.21.0.in = phi float* [ %tmp238, %bb448 ], [ %tmp229, %bb395 ], [ %tmp229, %bb385 ], [ %tmp229, %bb371 ], [ %tmp232.mux796, %bb425 ], [ %tmp232.mux798, %bb417 ] ; <float*> [#uses=1]
+ %iftmp.21.0 = load float* %iftmp.21.0.in ; <float> [#uses=1]
+ %tmp458459 = fpext float %iftmp.21.0 to double ; <double> [#uses=1]
+ %tmp460461 = fpext float %iftmp.7.0 to double ; <double> [#uses=1]
+ %tmp462463 = fpext float %iftmp.14.0 to double ; <double> [#uses=1]
+ %tmp464465 = fpext float %iftmp.0.0 to double ; <double> [#uses=1]
+ %tmp467 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([48 x i8]* @.str, i32 0, i32 0), double %tmp464465, double %tmp462463, double %tmp460461, double %tmp458459 ) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
new file mode 100644
index 0000000..5115e48
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s | grep {a:} | not grep ax
+; RUN: llc < %s | grep {b:} | not grep ax
+; PR2078
+; The clobber list says that "ax" is clobbered. Make sure that eax isn't
+; allocated to the input/output register.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@pixels = weak global i32 0 ; <i32*> [#uses=2]
+
+define void @test() nounwind {
+entry:
+ %tmp = load i32* @pixels, align 4 ; <i32> [#uses=1]
+ %tmp1 = tail call i32 asm sideeffect "a: $0 $1", "=r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( i32 %tmp ) nounwind ; <i32> [#uses=1]
+ store i32 %tmp1, i32* @pixels, align 4
+ ret void
+}
+
+define void @test2(i16* %block, i8* %pixels, i32 %line_size) nounwind {
+entry:
+ %tmp1 = getelementptr i16* %block, i32 64 ; <i16*> [#uses=1]
+ %tmp3 = tail call i8* asm sideeffect "b: $0 $1 $2", "=r,r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( i16* %tmp1, i8* %pixels ) nounwind ; <i8*> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll b/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
new file mode 100644
index 0000000..6b1eefe
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -regalloc=local -march=x86 -mattr=+mmx | grep esi
+; PR2082
+; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of
+; registers.
+define void @transpose4x4(i8* %dst, i8* %src, i32 %dst_stride, i32 %src_stride) {
+entry:
+ %dst_addr = alloca i8* ; <i8**> [#uses=5]
+ %src_addr = alloca i8* ; <i8**> [#uses=5]
+ %dst_stride_addr = alloca i32 ; <i32*> [#uses=4]
+ %src_stride_addr = alloca i32 ; <i32*> [#uses=4]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i8* %dst, i8** %dst_addr
+ store i8* %src, i8** %src_addr
+ store i32 %dst_stride, i32* %dst_stride_addr
+ store i32 %src_stride, i32* %src_stride_addr
+ %tmp = load i8** %dst_addr, align 4 ; <i8*> [#uses=1]
+ %tmp1 = getelementptr i8* %tmp, i32 0 ; <i8*> [#uses=1]
+ %tmp12 = bitcast i8* %tmp1 to i32* ; <i32*> [#uses=1]
+ %tmp3 = load i8** %dst_addr, align 4 ; <i8*> [#uses=1]
+ %tmp4 = load i32* %dst_stride_addr, align 4 ; <i32> [#uses=1]
+ %tmp5 = getelementptr i8* %tmp3, i32 %tmp4 ; <i8*> [#uses=1]
+ %tmp56 = bitcast i8* %tmp5 to i32* ; <i32*> [#uses=1]
+ %tmp7 = load i32* %dst_stride_addr, align 4 ; <i32> [#uses=1]
+ %tmp8 = mul i32 %tmp7, 2 ; <i32> [#uses=1]
+ %tmp9 = load i8** %dst_addr, align 4 ; <i8*> [#uses=1]
+ %tmp10 = getelementptr i8* %tmp9, i32 %tmp8 ; <i8*> [#uses=1]
+ %tmp1011 = bitcast i8* %tmp10 to i32* ; <i32*> [#uses=1]
+ %tmp13 = load i32* %dst_stride_addr, align 4 ; <i32> [#uses=1]
+ %tmp14 = mul i32 %tmp13, 3 ; <i32> [#uses=1]
+ %tmp15 = load i8** %dst_addr, align 4 ; <i8*> [#uses=1]
+ %tmp16 = getelementptr i8* %tmp15, i32 %tmp14 ; <i8*> [#uses=1]
+ %tmp1617 = bitcast i8* %tmp16 to i32* ; <i32*> [#uses=1]
+ %tmp18 = load i8** %src_addr, align 4 ; <i8*> [#uses=1]
+ %tmp19 = getelementptr i8* %tmp18, i32 0 ; <i8*> [#uses=1]
+ %tmp1920 = bitcast i8* %tmp19 to i32* ; <i32*> [#uses=1]
+ %tmp21 = load i8** %src_addr, align 4 ; <i8*> [#uses=1]
+ %tmp22 = load i32* %src_stride_addr, align 4 ; <i32> [#uses=1]
+ %tmp23 = getelementptr i8* %tmp21, i32 %tmp22 ; <i8*> [#uses=1]
+ %tmp2324 = bitcast i8* %tmp23 to i32* ; <i32*> [#uses=1]
+ %tmp25 = load i32* %src_stride_addr, align 4 ; <i32> [#uses=1]
+ %tmp26 = mul i32 %tmp25, 2 ; <i32> [#uses=1]
+ %tmp27 = load i8** %src_addr, align 4 ; <i8*> [#uses=1]
+ %tmp28 = getelementptr i8* %tmp27, i32 %tmp26 ; <i8*> [#uses=1]
+ %tmp2829 = bitcast i8* %tmp28 to i32* ; <i32*> [#uses=1]
+ %tmp30 = load i32* %src_stride_addr, align 4 ; <i32> [#uses=1]
+ %tmp31 = mul i32 %tmp30, 3 ; <i32> [#uses=1]
+ %tmp32 = load i8** %src_addr, align 4 ; <i8*> [#uses=1]
+ %tmp33 = getelementptr i8* %tmp32, i32 %tmp31 ; <i8*> [#uses=1]
+ %tmp3334 = bitcast i8* %tmp33 to i32* ; <i32*> [#uses=1]
+ call void asm sideeffect "movd $4, %mm0 \0A\09movd $5, %mm1 \0A\09movd $6, %mm2 \0A\09movd $7, %mm3 \0A\09punpcklbw %mm1, %mm0 \0A\09punpcklbw %mm3, %mm2 \0A\09movq %mm0, %mm1 \0A\09punpcklwd %mm2, %mm0 \0A\09punpckhwd %mm2, %mm1 \0A\09movd %mm0, $0 \0A\09punpckhdq %mm0, %mm0 \0A\09movd %mm0, $1 \0A\09movd %mm1, $2 \0A\09punpckhdq %mm1, %mm1 \0A\09movd %mm1, $3 \0A\09", "=*m,=*m,=*m,=*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"( i32* %tmp12, i32* %tmp56, i32* %tmp1011, i32* %tmp1617, i32* %tmp1920, i32* %tmp2324, i32* %tmp2829, i32* %tmp3334 ) nounwind
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-02-22-ReMatBug.ll b/test/CodeGen/X86/2008-02-22-ReMatBug.ll
new file mode 100644
index 0000000..8d6bb0d
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-22-ReMatBug.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=x86 -stats |& grep {Number of re-materialization} | grep 3
+; rdar://5761454
+
+ %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
+
+define %struct.quad_struct* @MakeTree(i32 %size, i32 %center_x, i32 %center_y, i32 %lo_proc, i32 %hi_proc, %struct.quad_struct* %parent, i32 %ct, i32 %level) nounwind {
+entry:
+ br i1 true, label %bb43.i, label %bb.i
+
+bb.i: ; preds = %entry
+ ret %struct.quad_struct* null
+
+bb43.i: ; preds = %entry
+ br i1 true, label %CheckOutside.exit40.i, label %bb11.i38.i
+
+bb11.i38.i: ; preds = %bb43.i
+ ret %struct.quad_struct* null
+
+CheckOutside.exit40.i: ; preds = %bb43.i
+ br i1 true, label %CheckOutside.exit30.i, label %bb11.i28.i
+
+bb11.i28.i: ; preds = %CheckOutside.exit40.i
+ ret %struct.quad_struct* null
+
+CheckOutside.exit30.i: ; preds = %CheckOutside.exit40.i
+ br i1 true, label %CheckOutside.exit20.i, label %bb11.i18.i
+
+bb11.i18.i: ; preds = %CheckOutside.exit30.i
+ ret %struct.quad_struct* null
+
+CheckOutside.exit20.i: ; preds = %CheckOutside.exit30.i
+ br i1 true, label %bb34, label %bb11.i8.i
+
+bb11.i8.i: ; preds = %CheckOutside.exit20.i
+ ret %struct.quad_struct* null
+
+bb34: ; preds = %CheckOutside.exit20.i
+ %tmp15.reg2mem.0 = sdiv i32 %size, 2 ; <i32> [#uses=7]
+ %tmp85 = sub i32 %center_y, %tmp15.reg2mem.0 ; <i32> [#uses=2]
+ %tmp88 = sub i32 %center_x, %tmp15.reg2mem.0 ; <i32> [#uses=2]
+ %tmp92 = tail call %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 %tmp88, i32 %tmp85, i32 0, i32 %hi_proc, %struct.quad_struct* null, i32 2, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
+ %tmp99 = add i32 0, %hi_proc ; <i32> [#uses=1]
+ %tmp100 = sdiv i32 %tmp99, 2 ; <i32> [#uses=1]
+ %tmp110 = tail call %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 0, i32 %tmp85, i32 0, i32 %tmp100, %struct.quad_struct* null, i32 3, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
+ %tmp122 = add i32 %tmp15.reg2mem.0, %center_y ; <i32> [#uses=2]
+ %tmp129 = tail call %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 0, i32 %tmp122, i32 0, i32 0, %struct.quad_struct* null, i32 1, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
+ %tmp147 = tail call %struct.quad_struct* @MakeTree( i32 %tmp15.reg2mem.0, i32 %tmp88, i32 %tmp122, i32 %lo_proc, i32 0, %struct.quad_struct* null, i32 0, i32 0 ) nounwind ; <%struct.quad_struct*> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll b/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll
new file mode 100644
index 0000000..1d31859
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mattr=+sse2
+; PR2076
+
+define void @h264_h_loop_filter_luma_mmx2(i8* %pix, i32 %stride, i32 %alpha, i32 %beta, i8* %tc0) nounwind {
+entry:
+ %tmp164 = getelementptr [16 x i32]* null, i32 0, i32 11 ; <i32*> [#uses=1]
+ %tmp169 = getelementptr [16 x i32]* null, i32 0, i32 13 ; <i32*> [#uses=1]
+ %tmp174 = getelementptr [16 x i32]* null, i32 0, i32 15 ; <i32*> [#uses=1]
+ %tmp154.sum317 = add i32 0, %stride ; <i32> [#uses=1]
+ %tmp154.sum315 = mul i32 %stride, 6 ; <i32> [#uses=1]
+ %tmp154.sum = mul i32 %stride, 7 ; <i32> [#uses=1]
+ %pix_addr.0327.rec = mul i32 0, 0 ; <i32> [#uses=4]
+ br i1 false, label %bb292, label %bb32
+
+bb32: ; preds = %entry
+ %pix_addr.0327.sum340 = add i32 %pix_addr.0327.rec, 0 ; <i32> [#uses=1]
+ %tmp154 = getelementptr i8* %pix, i32 %pix_addr.0327.sum340 ; <i8*> [#uses=1]
+ %tmp177178 = bitcast i8* %tmp154 to i32* ; <i32*> [#uses=1]
+ %pix_addr.0327.sum339 = add i32 %pix_addr.0327.rec, %tmp154.sum317 ; <i32> [#uses=1]
+ %tmp181 = getelementptr i8* %pix, i32 %pix_addr.0327.sum339 ; <i8*> [#uses=1]
+ %tmp181182 = bitcast i8* %tmp181 to i32* ; <i32*> [#uses=1]
+ %pix_addr.0327.sum338 = add i32 %pix_addr.0327.rec, %tmp154.sum315 ; <i32> [#uses=1]
+ %tmp186 = getelementptr i8* %pix, i32 %pix_addr.0327.sum338 ; <i8*> [#uses=1]
+ %tmp186187 = bitcast i8* %tmp186 to i32* ; <i32*> [#uses=1]
+ %pix_addr.0327.sum337 = add i32 %pix_addr.0327.rec, %tmp154.sum ; <i32> [#uses=1]
+ %tmp191 = getelementptr i8* %pix, i32 %pix_addr.0327.sum337 ; <i8*> [#uses=1]
+ %tmp191192 = bitcast i8* %tmp191 to i32* ; <i32*> [#uses=1]
+ call void asm sideeffect "movd $4, %mm0 \0A\09movd $5, %mm1 \0A\09movd $6, %mm2 \0A\09movd $7, %mm3 \0A\09punpcklbw %mm1, %mm0 \0A\09punpcklbw %mm3, %mm2 \0A\09movq %mm0, %mm1 \0A\09punpcklwd %mm2, %mm0 \0A\09punpckhwd %mm2, %mm1 \0A\09movd %mm0, $0 \0A\09punpckhdq %mm0, %mm0 \0A\09movd %mm0, $1 \0A\09movd %mm1, $2 \0A\09punpckhdq %mm1, %mm1 \0A\09movd %mm1, $3 \0A\09", "=*m,=*m,=*m,=*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"( i32* null, i32* %tmp164, i32* %tmp169, i32* %tmp174, i32* %tmp177178, i32* %tmp181182, i32* %tmp186187, i32* %tmp191192 ) nounwind
+ unreachable
+
+bb292: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll b/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
new file mode 100644
index 0000000..6615b8c
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -march=x86-64
+
+ %struct.XX = type <{ i8 }>
+ %struct.YY = type { i64 }
+ %struct.ZZ = type opaque
+
+define i8 @f(%struct.XX*** %fontMap, %struct.XX* %uen) signext {
+entry:
+ %tmp45 = add i16 0, 1 ; <i16> [#uses=2]
+ br i1 false, label %bb124, label %bb53
+
+bb53: ; preds = %entry
+ %tmp55 = call %struct.YY** @AA( i64 1, %struct.XX* %uen ) ; <%struct.YY**> [#uses=3]
+ %tmp2728128 = load %struct.XX** null ; <%struct.XX*> [#uses=1]
+ %tmp61 = load %struct.YY** %tmp55, align 8 ; <%struct.YY*> [#uses=1]
+ %tmp62 = getelementptr %struct.YY* %tmp61, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp63 = load i64* %tmp62, align 8 ; <i64> [#uses=1]
+ %tmp6566 = zext i16 %tmp45 to i64 ; <i64> [#uses=1]
+ %tmp67 = shl i64 %tmp6566, 1 ; <i64> [#uses=1]
+ call void @BB( %struct.YY** %tmp55, i64 %tmp67, i8 signext 0, %struct.XX* %uen )
+ %tmp121131 = icmp eq i16 %tmp45, 1 ; <i1> [#uses=1]
+ br i1 %tmp121131, label %bb124, label %bb70.preheader
+
+bb70.preheader: ; preds = %bb53
+ %tmp72 = bitcast %struct.XX* %tmp2728128 to %struct.ZZ*** ; <%struct.ZZ***> [#uses=1]
+ br label %bb70
+
+bb70: ; preds = %bb119, %bb70.preheader
+ %indvar133 = phi i32 [ %indvar.next134, %bb119 ], [ 0, %bb70.preheader ] ; <i32> [#uses=2]
+ %tmp.135 = trunc i64 %tmp63 to i32 ; <i32> [#uses=1]
+ %tmp136 = shl i32 %indvar133, 1 ; <i32> [#uses=1]
+ %DD = add i32 %tmp136, %tmp.135 ; <i32> [#uses=1]
+ %tmp73 = load %struct.ZZ*** %tmp72, align 8 ; <%struct.ZZ**> [#uses=0]
+ br i1 false, label %bb119, label %bb77
+
+bb77: ; preds = %bb70
+ %tmp8384 = trunc i32 %DD to i16 ; <i16> [#uses=1]
+ %tmp85 = sub i16 0, %tmp8384 ; <i16> [#uses=1]
+ store i16 %tmp85, i16* null, align 8
+ call void @CC( %struct.YY** %tmp55, i64 0, i64 2, i8* null, %struct.XX* %uen )
+ ret i8 0
+
+bb119: ; preds = %bb70
+ %indvar.next134 = add i32 %indvar133, 1 ; <i32> [#uses=1]
+ br label %bb70
+
+bb124: ; preds = %bb53, %entry
+ ret i8 undef
+}
+
+declare %struct.YY** @AA(i64, %struct.XX*)
+
+declare void @BB(%struct.YY**, i64, i8 signext , %struct.XX*)
+
+declare void @CC(%struct.YY**, i64, i64, i8*, %struct.XX*)
diff --git a/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll b/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
new file mode 100644
index 0000000..0b4eb3a
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define void @dct_unquantize_h263_intra_mmx(i16* %block, i32 %n, i32 %qscale) nounwind {
+entry:
+ %tmp1 = shl i32 %qscale, 1 ; <i32> [#uses=1]
+ br i1 false, label %bb46, label %bb59
+
+bb46: ; preds = %entry
+ ret void
+
+bb59: ; preds = %entry
+ tail call void asm sideeffect "movd $1, %mm6 \0A\09packssdw %mm6, %mm6 \0A\09packssdw %mm6, %mm6 \0A\09movd $2, %mm5 \0A\09pxor %mm7, %mm7 \0A\09packssdw %mm5, %mm5 \0A\09packssdw %mm5, %mm5 \0A\09psubw %mm5, %mm7 \0A\09pxor %mm4, %mm4 \0A\09.align 1<<4\0A\091: \0A\09movq ($0, $3), %mm0 \0A\09movq 8($0, $3), %mm1 \0A\09pmullw %mm6, %mm0 \0A\09pmullw %mm6, %mm1 \0A\09movq ($0, $3), %mm2 \0A\09movq 8($0, $3), %mm3 \0A\09pcmpgtw %mm4, %mm2 \0A\09pcmpgtw %mm4, %mm3 \0A\09pxor %mm2, %mm0 \0A\09pxor %mm3, %mm1 \0A\09paddw %mm7, %mm0 \0A\09paddw %mm7, %mm1 \0A\09pxor %mm0, %mm2 \0A\09pxor %mm1, %mm3 \0A\09pcmpeqw %mm7, %mm0 \0A\09pcmpeqw %mm7, %mm1 \0A\09pandn %mm2, %mm0 \0A\09pandn %mm3, %mm1 \0A\09movq %mm0, ($0, $3) \0A\09movq %mm1, 8($0, $3) \0A\09add $$16, $3 \0A\09jng 1b \0A\09", "r,imr,imr,r,~{dirflag},~{fpsr},~{flags},~{memory}"( i16* null, i32 %tmp1, i32 0, i32 0 ) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll b/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
new file mode 100644
index 0000000..ad7950c
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
@@ -0,0 +1,66 @@
+; RUN: llc < %s -march=x86
+
+ %struct.CompAtom = type <{ %struct.Position, float, i32 }>
+ %struct.Lattice = type { %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, i32, i32, i32 }
+ %struct.Position = type { double, double, double }
+
+define fastcc %struct.CompAtom* @_ZNK7Lattice6createEP8CompAtomii(%struct.Lattice* %this, %struct.CompAtom* %d, i32 %n, i32 %i) {
+entry:
+ %tmp18 = tail call i8* @_Znam( i32 0 ) ; <i8*> [#uses=1]
+ %tmp1819 = bitcast i8* %tmp18 to %struct.CompAtom* ; <%struct.CompAtom*> [#uses=4]
+ %tmp3286 = icmp eq i32 %n, 0 ; <i1> [#uses=1]
+ br i1 %tmp3286, label %bb35, label %bb24
+
+bb24: ; preds = %bb24, %entry
+ %tmp9.0.reg2mem.0.rec = phi i32 [ %indvar.next, %bb24 ], [ 0, %entry ] ; <i32> [#uses=3]
+ %tmp3.i.i = getelementptr %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 1 ; <double*> [#uses=0]
+ %tmp5.i.i = getelementptr %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 2 ; <double*> [#uses=1]
+ store double -9.999900e+04, double* %tmp5.i.i, align 4
+ %indvar.next = add i32 %tmp9.0.reg2mem.0.rec, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb35, label %bb24
+
+bb35: ; preds = %bb24, %entry
+ %tmp42 = sdiv i32 %i, 9 ; <i32> [#uses=1]
+ %tmp43 = add i32 %tmp42, -1 ; <i32> [#uses=1]
+ %tmp4344 = sitofp i32 %tmp43 to double ; <double> [#uses=1]
+ %tmp17.i76 = fmul double %tmp4344, 0.000000e+00 ; <double> [#uses=1]
+ %tmp48 = sdiv i32 %i, 3 ; <i32> [#uses=1]
+ %tmp49 = srem i32 %tmp48, 3 ; <i32> [#uses=1]
+ %tmp50 = add i32 %tmp49, -1 ; <i32> [#uses=1]
+ %tmp5051 = sitofp i32 %tmp50 to double ; <double> [#uses=1]
+ %tmp17.i63 = fmul double %tmp5051, 0.000000e+00 ; <double> [#uses=1]
+ %tmp55 = srem i32 %i, 3 ; <i32> [#uses=1]
+ %tmp56 = add i32 %tmp55, -1 ; <i32> [#uses=1]
+ %tmp5657 = sitofp i32 %tmp56 to double ; <double> [#uses=1]
+ %tmp15.i49 = getelementptr %struct.Lattice* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp16.i50 = load double* %tmp15.i49, align 4 ; <double> [#uses=1]
+ %tmp17.i = fmul double %tmp5657, %tmp16.i50 ; <double> [#uses=1]
+ %tmp20.i39 = fadd double %tmp17.i, %tmp17.i63 ; <double> [#uses=1]
+ %tmp20.i23 = fadd double %tmp20.i39, %tmp17.i76 ; <double> [#uses=1]
+ br i1 false, label %bb58.preheader, label %bb81
+
+bb58.preheader: ; preds = %bb35
+ %smax = select i1 false, i32 1, i32 %n ; <i32> [#uses=1]
+ br label %bb58
+
+bb58: ; preds = %bb58, %bb58.preheader
+ %tmp20.i7 = getelementptr %struct.CompAtom* %d, i32 0, i32 2 ; <i32*> [#uses=2]
+ %tmp25.i = getelementptr %struct.CompAtom* %tmp1819, i32 0, i32 2 ; <i32*> [#uses=2]
+ %tmp74.i = load i32* %tmp20.i7, align 1 ; <i32> [#uses=1]
+ %tmp82.i = and i32 %tmp74.i, 134217728 ; <i32> [#uses=1]
+ %tmp85.i = or i32 0, %tmp82.i ; <i32> [#uses=1]
+ store i32 %tmp85.i, i32* %tmp25.i, align 1
+ %tmp88.i = load i32* %tmp20.i7, align 1 ; <i32> [#uses=1]
+ %tmp95.i = and i32 %tmp88.i, -268435456 ; <i32> [#uses=1]
+ %tmp97.i = or i32 0, %tmp95.i ; <i32> [#uses=1]
+ store i32 %tmp97.i, i32* %tmp25.i, align 1
+ %tmp6.i = fadd double 0.000000e+00, %tmp20.i23 ; <double> [#uses=0]
+ %exitcond96 = icmp eq i32 0, %smax ; <i1> [#uses=1]
+ br i1 %exitcond96, label %bb81, label %bb58
+
+bb81: ; preds = %bb58, %bb35
+ ret %struct.CompAtom* %tmp1819
+}
+
+declare i8* @_Znam(i32)
diff --git a/test/CodeGen/X86/2008-02-27-PEICrash.ll b/test/CodeGen/X86/2008-02-27-PEICrash.ll
new file mode 100644
index 0000000..d842967
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-27-PEICrash.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define i64 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone {
+entry:
+ br i1 false, label %bb56, label %bb33
+
+bb33: ; preds = %entry
+ br label %bb56
+
+bb56: ; preds = %bb33, %entry
+ %tmp36.pn = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; <float> [#uses=1]
+ %b.pn509 = phi float [ %b, %bb33 ], [ %a, %entry ] ; <float> [#uses=1]
+ %a.pn = phi float [ %a, %bb33 ], [ %b, %entry ] ; <float> [#uses=1]
+ %tmp41.pn508 = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; <float> [#uses=1]
+ %tmp51.pn = phi float [ 0.000000e+00, %bb33 ], [ %a, %entry ] ; <float> [#uses=1]
+ %tmp44.pn = fmul float %tmp36.pn, %b.pn509 ; <float> [#uses=1]
+ %tmp46.pn = fadd float %tmp44.pn, %a.pn ; <float> [#uses=1]
+ %tmp53.pn = fsub float 0.000000e+00, %tmp51.pn ; <float> [#uses=1]
+ %x.0 = fdiv float %tmp46.pn, %tmp41.pn508 ; <float> [#uses=1]
+ %y.0 = fdiv float %tmp53.pn, 0.000000e+00 ; <float> [#uses=1]
+ br i1 false, label %bb433, label %bb98
+
+bb98: ; preds = %bb56
+ %tmp102 = fmul float 0.000000e+00, %a ; <float> [#uses=1]
+ %tmp106 = fmul float 0.000000e+00, %b ; <float> [#uses=1]
+ br label %bb433
+
+bb433: ; preds = %bb98, %bb56
+ %x.1 = phi float [ %tmp102, %bb98 ], [ %x.0, %bb56 ] ; <float> [#uses=0]
+ %y.1 = phi float [ %tmp106, %bb98 ], [ %y.0, %bb56 ] ; <float> [#uses=1]
+ %tmp460 = fadd float %y.1, 0.000000e+00 ; <float> [#uses=0]
+ ret i64 0
+}
diff --git a/test/CodeGen/X86/2008-03-06-frem-fpstack.ll b/test/CodeGen/X86/2008-03-06-frem-fpstack.ll
new file mode 100644
index 0000000..70a83b5
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-06-frem-fpstack.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -mcpu=i386
+; PR2122
+define float @func(float %a, float %b) nounwind {
+entry:
+ %tmp3 = frem float %a, %b ; <float> [#uses=1]
+ ret float %tmp3
+}
diff --git a/test/CodeGen/X86/2008-03-07-APIntBug.ll b/test/CodeGen/X86/2008-03-07-APIntBug.ll
new file mode 100644
index 0000000..84e4827
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-07-APIntBug.ll
@@ -0,0 +1,94 @@
+; RUN: llc < %s -march=x86 -mcpu=i386 | not grep 255
+
+ %struct.CONSTRAINT = type { i32, i32, i32, i32 }
+ %struct.FIRST_UNION = type { %struct.anon }
+ %struct.FOURTH_UNION = type { %struct.CONSTRAINT }
+ %struct.LIST = type { %struct.rec*, %struct.rec* }
+ %struct.SECOND_UNION = type { { i16, i8, i8 } }
+ %struct.THIRD_UNION = type { { [2 x i32], [2 x i32] } }
+ %struct.anon = type { i8, i8, i32 }
+ %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, { %struct.rec* }, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+ %struct.rec = type { %struct.head_type }
+ %struct.symbol_type = type <{ [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i16, i16, i8, i8, i8, i8 }>
+ %struct.word_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, [4 x i8] }
+
+define void @InsertSym_bb1163(%struct.rec** %s) {
+newFuncRoot:
+ br label %bb1163
+bb1233.exitStub: ; preds = %bb1163
+ ret void
+bb1163: ; preds = %newFuncRoot
+ %tmp1164 = load %struct.rec** %s, align 4 ; <%struct.rec*> [#uses=1]
+ %tmp1165 = getelementptr %struct.rec* %tmp1164, i32 0, i32 0 ; <%struct.head_type*> [#uses=1]
+ %tmp11651166 = bitcast %struct.head_type* %tmp1165 to %struct.symbol_type* ; <%struct.symbol_type*> [#uses=1]
+ %tmp1167 = getelementptr %struct.symbol_type* %tmp11651166, i32 0, i32 3 ; <%struct.rec**> [#uses=1]
+ %tmp1168 = load %struct.rec** %tmp1167, align 1 ; <%struct.rec*> [#uses=2]
+ %tmp1169 = load %struct.rec** %s, align 4 ; <%struct.rec*> [#uses=1]
+ %tmp1170 = getelementptr %struct.rec* %tmp1169, i32 0, i32 0 ; <%struct.head_type*> [#uses=1]
+ %tmp11701171 = bitcast %struct.head_type* %tmp1170 to %struct.symbol_type* ; <%struct.symbol_type*> [#uses=1]
+ %tmp1172 = getelementptr %struct.symbol_type* %tmp11701171, i32 0, i32 3 ; <%struct.rec**> [#uses=1]
+ %tmp1173 = load %struct.rec** %tmp1172, align 1 ; <%struct.rec*> [#uses=2]
+ %tmp1174 = getelementptr %struct.rec* %tmp1173, i32 0, i32 0 ; <%struct.head_type*> [#uses=1]
+ %tmp11741175 = bitcast %struct.head_type* %tmp1174 to %struct.word_type* ; <%struct.word_type*> [#uses=1]
+ %tmp1176 = getelementptr %struct.word_type* %tmp11741175, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1]
+ %tmp1177 = getelementptr %struct.SECOND_UNION* %tmp1176, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1]
+ %tmp11771178 = bitcast { i16, i8, i8 }* %tmp1177 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1]
+ %tmp1179 = getelementptr <{ i8, i8, i8, i8 }>* %tmp11771178, i32 0, i32 2 ; <i8*> [#uses=2]
+ %mask1180 = and i8 1, 1 ; <i8> [#uses=2]
+ %tmp1181 = load i8* %tmp1179, align 1 ; <i8> [#uses=1]
+ %tmp1182 = shl i8 %mask1180, 7 ; <i8> [#uses=1]
+ %tmp1183 = and i8 %tmp1181, 127 ; <i8> [#uses=1]
+ %tmp1184 = or i8 %tmp1183, %tmp1182 ; <i8> [#uses=1]
+ store i8 %tmp1184, i8* %tmp1179, align 1
+ %mask1185 = and i8 %mask1180, 1 ; <i8> [#uses=0]
+ %tmp1186 = getelementptr %struct.rec* %tmp1173, i32 0, i32 0 ; <%struct.head_type*> [#uses=1]
+ %tmp11861187 = bitcast %struct.head_type* %tmp1186 to %struct.word_type* ; <%struct.word_type*> [#uses=1]
+ %tmp1188 = getelementptr %struct.word_type* %tmp11861187, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1]
+ %tmp1189 = getelementptr %struct.SECOND_UNION* %tmp1188, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1]
+ %tmp11891190 = bitcast { i16, i8, i8 }* %tmp1189 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1]
+ %tmp1191 = getelementptr <{ i8, i8, i8, i8 }>* %tmp11891190, i32 0, i32 2 ; <i8*> [#uses=1]
+ %tmp1192 = load i8* %tmp1191, align 1 ; <i8> [#uses=1]
+ %tmp1193 = lshr i8 %tmp1192, 7 ; <i8> [#uses=1]
+ %mask1194 = and i8 %tmp1193, 1 ; <i8> [#uses=2]
+ %mask1195 = and i8 %mask1194, 1 ; <i8> [#uses=0]
+ %tmp1196 = getelementptr %struct.rec* %tmp1168, i32 0, i32 0 ; <%struct.head_type*> [#uses=1]
+ %tmp11961197 = bitcast %struct.head_type* %tmp1196 to %struct.word_type* ; <%struct.word_type*> [#uses=1]
+ %tmp1198 = getelementptr %struct.word_type* %tmp11961197, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1]
+ %tmp1199 = getelementptr %struct.SECOND_UNION* %tmp1198, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1]
+ %tmp11991200 = bitcast { i16, i8, i8 }* %tmp1199 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1]
+ %tmp1201 = getelementptr <{ i8, i8, i8, i8 }>* %tmp11991200, i32 0, i32 1 ; <i8*> [#uses=2]
+ %mask1202 = and i8 %mask1194, 1 ; <i8> [#uses=2]
+ %tmp1203 = load i8* %tmp1201, align 1 ; <i8> [#uses=1]
+ %tmp1204 = shl i8 %mask1202, 1 ; <i8> [#uses=1]
+ %tmp1205 = and i8 %tmp1204, 2 ; <i8> [#uses=1]
+ %tmp1206 = and i8 %tmp1203, -3 ; <i8> [#uses=1]
+ %tmp1207 = or i8 %tmp1206, %tmp1205 ; <i8> [#uses=1]
+ store i8 %tmp1207, i8* %tmp1201, align 1
+ %mask1208 = and i8 %mask1202, 1 ; <i8> [#uses=0]
+ %tmp1209 = getelementptr %struct.rec* %tmp1168, i32 0, i32 0 ; <%struct.head_type*> [#uses=1]
+ %tmp12091210 = bitcast %struct.head_type* %tmp1209 to %struct.word_type* ; <%struct.word_type*> [#uses=1]
+ %tmp1211 = getelementptr %struct.word_type* %tmp12091210, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1]
+ %tmp1212 = getelementptr %struct.SECOND_UNION* %tmp1211, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1]
+ %tmp12121213 = bitcast { i16, i8, i8 }* %tmp1212 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1]
+ %tmp1214 = getelementptr <{ i8, i8, i8, i8 }>* %tmp12121213, i32 0, i32 1 ; <i8*> [#uses=1]
+ %tmp1215 = load i8* %tmp1214, align 1 ; <i8> [#uses=1]
+ %tmp1216 = shl i8 %tmp1215, 6 ; <i8> [#uses=1]
+ %tmp1217 = lshr i8 %tmp1216, 7 ; <i8> [#uses=1]
+ %mask1218 = and i8 %tmp1217, 1 ; <i8> [#uses=2]
+ %mask1219 = and i8 %mask1218, 1 ; <i8> [#uses=0]
+ %tmp1220 = load %struct.rec** %s, align 4 ; <%struct.rec*> [#uses=1]
+ %tmp1221 = getelementptr %struct.rec* %tmp1220, i32 0, i32 0 ; <%struct.head_type*> [#uses=1]
+ %tmp12211222 = bitcast %struct.head_type* %tmp1221 to %struct.word_type* ; <%struct.word_type*> [#uses=1]
+ %tmp1223 = getelementptr %struct.word_type* %tmp12211222, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1]
+ %tmp1224 = getelementptr %struct.SECOND_UNION* %tmp1223, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1]
+ %tmp12241225 = bitcast { i16, i8, i8 }* %tmp1224 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1]
+ %tmp1226 = getelementptr <{ i8, i8, i8, i8 }>* %tmp12241225, i32 0, i32 1 ; <i8*> [#uses=2]
+ %mask1227 = and i8 %mask1218, 1 ; <i8> [#uses=2]
+ %tmp1228 = load i8* %tmp1226, align 1 ; <i8> [#uses=1]
+ %tmp1229 = and i8 %mask1227, 1 ; <i8> [#uses=1]
+ %tmp1230 = and i8 %tmp1228, -2 ; <i8> [#uses=1]
+ %tmp1231 = or i8 %tmp1230, %tmp1229 ; <i8> [#uses=1]
+ store i8 %tmp1231, i8* %tmp1226, align 1
+ %mask1232 = and i8 %mask1227, 1 ; <i8> [#uses=0]
+ br label %bb1233.exitStub
+}
diff --git a/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll b/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll
new file mode 100644
index 0000000..cd2d609
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim -schedule-livein-copies | not grep {Number of register spills}
+; PR2134
+
+declare fastcc i8* @w_addchar(i8*, i32*, i32*, i8 signext ) nounwind
+
+define x86_stdcallcc i32 @parse_backslash(i8** inreg %word, i32* inreg %word_length, i32* inreg %max_length) nounwind {
+entry:
+ %tmp6 = load i8* null, align 1 ; <i8> [#uses=1]
+ br label %bb13
+bb13: ; preds = %entry
+ %tmp26 = call fastcc i8* @w_addchar( i8* null, i32* %word_length, i32* %max_length, i8 signext %tmp6 ) nounwind ; <i8*> [#uses=1]
+ store i8* %tmp26, i8** %word, align 4
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll b/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll
new file mode 100644
index 0000000..e673d31
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -relocation-model=pic | grep TLSGD | count 2
+; PR2137
+
+; ModuleID = '1.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %struct.__res_state = type { i32 }
+@__resp = thread_local global %struct.__res_state* @_res ; <%struct.__res_state**> [#uses=1]
+@_res = global %struct.__res_state zeroinitializer, section ".bss" ; <%struct.__res_state*> [#uses=1]
+
+@__libc_resp = hidden alias %struct.__res_state** @__resp ; <%struct.__res_state**> [#uses=2]
+
+define i32 @foo() {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = load %struct.__res_state** @__libc_resp, align 4 ; <%struct.__res_state*> [#uses=1]
+ %tmp1 = getelementptr %struct.__res_state* %tmp, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp1, align 4
+ br label %return
+return: ; preds = %entry
+ %retval2 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval2
+}
+
+define i32 @bar() {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = load %struct.__res_state** @__libc_resp, align 4 ; <%struct.__res_state*> [#uses=1]
+ %tmp1 = getelementptr %struct.__res_state* %tmp, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp1, align 4
+ br label %return
+return: ; preds = %entry
+ %retval2 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval2
+}
diff --git a/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll b/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll
new file mode 100644
index 0000000..c6ba22e
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll
@@ -0,0 +1,68 @@
+; RUN: llc < %s -march=x86
+
+define i16 @t(i32 %depth) signext nounwind {
+entry:
+ br i1 false, label %bb74, label %bb
+bb: ; preds = %entry
+ ret i16 0
+bb74: ; preds = %entry
+ switch i32 0, label %bail [
+ i32 17, label %bb84
+ i32 18, label %bb81
+ i32 33, label %bb80
+ i32 34, label %bb84
+ ]
+bb80: ; preds = %bb74
+ switch i32 %depth, label %bb103 [
+ i32 16, label %bb96
+ i32 32, label %bb91
+ i32 846624121, label %bb96
+ i32 1094862674, label %bb91
+ i32 1096368963, label %bb91
+ i32 1111970369, label %bb91
+ i32 1278555445, label %bb96
+ i32 1278555701, label %bb96
+ i32 1380401729, label %bb91
+ i32 1668118891, label %bb91
+ i32 1916022840, label %bb91
+ i32 1983131704, label %bb91
+ i32 2037741171, label %bb96
+ i32 2037741173, label %bb96
+ ]
+bb81: ; preds = %bb74
+ ret i16 0
+bb84: ; preds = %bb74, %bb74
+ switch i32 %depth, label %bb103 [
+ i32 16, label %bb96
+ i32 32, label %bb91
+ i32 846624121, label %bb96
+ i32 1094862674, label %bb91
+ i32 1096368963, label %bb91
+ i32 1111970369, label %bb91
+ i32 1278555445, label %bb96
+ i32 1278555701, label %bb96
+ i32 1380401729, label %bb91
+ i32 1668118891, label %bb91
+ i32 1916022840, label %bb91
+ i32 1983131704, label %bb91
+ i32 2037741171, label %bb96
+ i32 2037741173, label %bb96
+ ]
+bb91: ; preds = %bb84, %bb84, %bb84, %bb84, %bb84, %bb84, %bb84, %bb84, %bb80, %bb80, %bb80, %bb80, %bb80, %bb80, %bb80, %bb80
+ %wMB.0.reg2mem.0 = phi i16 [ 16, %bb80 ], [ 16, %bb80 ], [ 16, %bb80 ], [ 16, %bb80 ], [ 16, %bb80 ], [ 16, %bb80 ], [ 16, %bb80 ], [ 16, %bb80 ], [ 0, %bb84 ], [ 0, %bb84 ], [ 0, %bb84 ], [ 0, %bb84 ], [ 0, %bb84 ], [ 0, %bb84 ], [ 0, %bb84 ], [ 0, %bb84 ] ; <i16> [#uses=2]
+ %tmp941478 = shl i16 %wMB.0.reg2mem.0, 2 ; <i16> [#uses=1]
+ br label %bb103
+bb96: ; preds = %bb84, %bb84, %bb84, %bb84, %bb84, %bb84, %bb80, %bb80, %bb80, %bb80, %bb80, %bb80
+ ret i16 0
+bb103: ; preds = %bb91, %bb84, %bb80
+ %wMB.0.reg2mem.2 = phi i16 [ %wMB.0.reg2mem.0, %bb91 ], [ 16, %bb80 ], [ 0, %bb84 ] ; <i16> [#uses=1]
+ %bBump.0 = phi i16 [ %tmp941478, %bb91 ], [ 16, %bb80 ], [ 0, %bb84 ] ; <i16> [#uses=0]
+ br i1 false, label %bb164, label %UnifiedReturnBlock
+bb164: ; preds = %bb103
+ %tmp167168 = sext i16 %wMB.0.reg2mem.2 to i32 ; <i32> [#uses=0]
+ ret i16 0
+bail: ; preds = %bb74
+ ret i16 0
+UnifiedReturnBlock: ; preds = %bb103
+ ret i16 0
+}
diff --git a/test/CodeGen/X86/2008-03-14-SpillerCrash.ll b/test/CodeGen/X86/2008-03-14-SpillerCrash.ll
new file mode 100644
index 0000000..8946415
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-14-SpillerCrash.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu
+; PR2138
+
+ %struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] }
+ %struct.anon = type { i8* }
+ %struct.locale_data = type { i8*, i8*, i32, i32, { void (%struct.locale_data*)*, %struct.anon }, i32, i32, i32, [0 x %struct.locale_data_value] }
+ %struct.locale_data_value = type { i32* }
+
+@wcstoll_l = alias i64 (i32*, i32**, i32, %struct.__locale_struct*)* @__wcstoll_l ; <i64 (i32*, i32**, i32, %struct.__locale_struct*)*> [#uses=0]
+
+define i64 @____wcstoll_l_internal(i32* %nptr, i32** %endptr, i32 %base, i32 %group, %struct.__locale_struct* %loc) nounwind {
+entry:
+ %tmp27 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp83 = getelementptr i32* %nptr, i32 1 ; <i32*> [#uses=1]
+ %tmp233 = add i32 0, -48 ; <i32> [#uses=1]
+ br label %bb271.us
+bb271.us: ; preds = %entry
+ br label %bb374.outer
+bb311.split: ; preds = %bb305.us
+ %tmp313 = add i32 %tmp378.us, -48 ; <i32> [#uses=1]
+ br i1 false, label %bb374.outer, label %bb383
+bb327.split: ; preds = %bb314.us
+ ret i64 0
+bb374.outer: ; preds = %bb311.split, %bb271.us
+ %tmp370371552.pn.in = phi i32 [ %tmp233, %bb271.us ], [ %tmp313, %bb311.split ] ; <i32> [#uses=1]
+ %tmp278279.pn = phi i64 [ 0, %bb271.us ], [ %tmp373.reg2mem.0.ph, %bb311.split ] ; <i64> [#uses=1]
+ %s.5.ph = phi i32* [ null, %bb271.us ], [ %tmp376.us, %bb311.split ] ; <i32*> [#uses=1]
+ %tmp366367550.pn = sext i32 %base to i64 ; <i64> [#uses=1]
+ %tmp370371552.pn = zext i32 %tmp370371552.pn.in to i64 ; <i64> [#uses=1]
+ %tmp369551.pn = mul i64 %tmp278279.pn, %tmp366367550.pn ; <i64> [#uses=1]
+ %tmp373.reg2mem.0.ph = add i64 %tmp370371552.pn, %tmp369551.pn ; <i64> [#uses=1]
+ br label %bb374.us
+bb374.us: ; preds = %bb314.us, %bb374.outer
+ %tmp376.us = getelementptr i32* %s.5.ph, i32 0 ; <i32*> [#uses=3]
+ %tmp378.us = load i32* %tmp376.us, align 4 ; <i32> [#uses=2]
+ %tmp302.us = icmp eq i32* %tmp376.us, %tmp83 ; <i1> [#uses=1]
+ %bothcond484.us = or i1 false, %tmp302.us ; <i1> [#uses=1]
+ br i1 %bothcond484.us, label %bb383, label %bb305.us
+bb305.us: ; preds = %bb374.us
+ br i1 false, label %bb311.split, label %bb314.us
+bb314.us: ; preds = %bb305.us
+ %tmp320.us = icmp eq i32 %tmp378.us, %tmp27 ; <i1> [#uses=1]
+ br i1 %tmp320.us, label %bb374.us, label %bb327.split
+bb383: ; preds = %bb374.us, %bb311.split
+ ret i64 0
+}
+
+declare i64 @__wcstoll_l(i32*, i32**, i32, %struct.__locale_struct*) nounwind
diff --git a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
new file mode 100644
index 0000000..ccc4d75
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep movss | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 1
+
+ %struct..0objc_object = type opaque
+ %struct.OhBoy = type { }
+ %struct.BooHoo = type { i32 }
+ %struct.objc_selector = type opaque
[email protected] = appending global [1 x i8*] [ i8* bitcast (void (%struct.OhBoy*, %struct.objc_selector*, i32, %struct.BooHoo*)* @"-[MessageHeaderDisplay adjustFontSizeBy:viewingState:]" to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @"-[MessageHeaderDisplay adjustFontSizeBy:viewingState:]"(%struct.OhBoy* %self, %struct.objc_selector* %_cmd, i32 %delta, %struct.BooHoo* %viewingState) nounwind {
+entry:
+ %tmp19 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp24 = tail call float bitcast (void (%struct..0objc_object*, ...)* @objc_msgSend_fpret to float (%struct..0objc_object*, %struct.objc_selector*)*)( %struct..0objc_object* null, %struct.objc_selector* null ) nounwind ; <float> [#uses=2]
+ %tmp30 = icmp sgt i32 %delta, 0 ; <i1> [#uses=1]
+ br i1 %tmp30, label %bb33, label %bb87.preheader
+bb33: ; preds = %entry
+ %tmp28 = fadd float 0.000000e+00, %tmp24 ; <float> [#uses=1]
+ %tmp35 = fcmp ogt float %tmp28, 1.800000e+01 ; <i1> [#uses=1]
+ br i1 %tmp35, label %bb38, label %bb87.preheader
+bb38: ; preds = %bb33
+ %tmp53 = add i32 %tmp19, %delta ; <i32> [#uses=2]
+ br i1 false, label %bb50, label %bb43
+bb43: ; preds = %bb38
+ store i32 %tmp53, i32* null, align 4
+ ret void
+bb50: ; preds = %bb38
+ %tmp56 = fsub float 1.800000e+01, %tmp24 ; <float> [#uses=1]
+ %tmp57 = fcmp ugt float 0.000000e+00, %tmp56 ; <i1> [#uses=1]
+ br i1 %tmp57, label %bb64, label %bb87.preheader
+bb64: ; preds = %bb50
+ ret void
+bb87.preheader: ; preds = %bb50, %bb33, %entry
+ %usableDelta.0 = phi i32 [ %delta, %entry ], [ %delta, %bb33 ], [ %tmp53, %bb50 ] ; <i32> [#uses=1]
+ %tmp100 = tail call %struct..0objc_object* (%struct..0objc_object*, %struct.objc_selector*, ...)* @objc_msgSend( %struct..0objc_object* null, %struct.objc_selector* null, %struct..0objc_object* null ) nounwind ; <%struct..0objc_object*> [#uses=2]
+ %tmp106 = tail call %struct..0objc_object* (%struct..0objc_object*, %struct.objc_selector*, ...)* @objc_msgSend( %struct..0objc_object* %tmp100, %struct.objc_selector* null ) nounwind ; <%struct..0objc_object*> [#uses=0]
+ %umax = select i1 false, i32 1, i32 0 ; <i32> [#uses=1]
+ br label %bb108
+bb108: ; preds = %bb108, %bb87.preheader
+ %attachmentIndex.0.reg2mem.0 = phi i32 [ 0, %bb87.preheader ], [ %indvar.next, %bb108 ] ; <i32> [#uses=2]
+ %tmp114 = tail call %struct..0objc_object* (%struct..0objc_object*, %struct.objc_selector*, ...)* @objc_msgSend( %struct..0objc_object* %tmp100, %struct.objc_selector* null, i32 %attachmentIndex.0.reg2mem.0 ) nounwind ; <%struct..0objc_object*> [#uses=1]
+ %tmp121 = tail call %struct..0objc_object* (%struct..0objc_object*, %struct.objc_selector*, ...)* @objc_msgSend( %struct..0objc_object* %tmp114, %struct.objc_selector* null, i32 %usableDelta.0 ) nounwind ; <%struct..0objc_object*> [#uses=0]
+ %indvar.next = add i32 %attachmentIndex.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %umax ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb130, label %bb108
+bb130: ; preds = %bb108
+ ret void
+}
+
+declare %struct..0objc_object* @objc_msgSend(%struct..0objc_object*, %struct.objc_selector*, ...)
+
+declare void @objc_msgSend_fpret(%struct..0objc_object*, ...)
diff --git a/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll b/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
new file mode 100644
index 0000000..eaa883c
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86
+
+define i32 @t() nounwind {
+entry:
+ %tmp54 = add i32 0, 1 ; <i32> [#uses=1]
+ br i1 false, label %bb71, label %bb77
+bb71: ; preds = %entry
+ %tmp74 = shl i32 %tmp54, 1 ; <i32> [#uses=1]
+ %tmp76 = ashr i32 %tmp74, 3 ; <i32> [#uses=1]
+ br label %bb77
+bb77: ; preds = %bb71, %entry
+ %payLoadSize.0 = phi i32 [ %tmp76, %bb71 ], [ 0, %entry ] ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll b/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll
new file mode 100644
index 0000000..4dc3a10
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##}
+
+ %struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* }
+ %struct.AGenericManager = type <{ i8 }>
+ %struct.ComponentInstanceRecord = type opaque
+ %struct.ComponentParameters = type { [1 x i64] }
+
+define i32 @_ZN12AGenericCall10MapIDPtrAtEsRP23ComponentInstanceRecord(%struct.AGenericCall* %this, i16 signext %param, %struct.ComponentInstanceRecord** %instance) {
+entry:
+ %tmp4 = icmp slt i16 %param, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ %tmp1415 = shl i16 %param, 3 ; <i16> [#uses=1]
+ %tmp17 = getelementptr %struct.AGenericCall* %this, i32 0, i32 1 ; <%struct.ComponentParameters**> [#uses=1]
+ %tmp18 = load %struct.ComponentParameters** %tmp17, align 8 ; <%struct.ComponentParameters*> [#uses=1]
+ %tmp1920 = bitcast %struct.ComponentParameters* %tmp18 to i8* ; <i8*> [#uses=1]
+ %tmp212223 = sext i16 %tmp1415 to i64 ; <i64> [#uses=1]
+ %tmp24 = getelementptr i8* %tmp1920, i64 %tmp212223 ; <i8*> [#uses=1]
+ %tmp2425 = bitcast i8* %tmp24 to i64* ; <i64*> [#uses=1]
+ %tmp28 = load i64* %tmp2425, align 8 ; <i64> [#uses=1]
+ %tmp2829 = inttoptr i64 %tmp28 to i32* ; <i32*> [#uses=1]
+ %tmp31 = getelementptr %struct.AGenericCall* %this, i32 0, i32 2 ; <i32**> [#uses=1]
+ store i32* %tmp2829, i32** %tmp31, align 8
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp4243 = shl i16 %param, 3 ; <i16> [#uses=1]
+ %tmp46 = getelementptr %struct.AGenericCall* %this, i32 0, i32 1 ; <%struct.ComponentParameters**> [#uses=1]
+ %tmp47 = load %struct.ComponentParameters** %tmp46, align 8 ; <%struct.ComponentParameters*> [#uses=1]
+ %tmp4849 = bitcast %struct.ComponentParameters* %tmp47 to i8* ; <i8*> [#uses=1]
+ %tmp505152 = sext i16 %tmp4243 to i64 ; <i64> [#uses=1]
+ %tmp53 = getelementptr i8* %tmp4849, i64 %tmp505152 ; <i8*> [#uses=1]
+ %tmp5354 = bitcast i8* %tmp53 to i64* ; <i64*> [#uses=1]
+ %tmp58 = load i64* %tmp5354, align 8 ; <i64> [#uses=1]
+ %tmp59 = icmp eq i64 %tmp58, 0 ; <i1> [#uses=1]
+ br i1 %tmp59, label %UnifiedReturnBlock, label %cond_true63
+
+cond_true63: ; preds = %cond_next
+ %tmp65 = getelementptr %struct.AGenericCall* %this, i32 0, i32 0 ; <%struct.AGenericManager**> [#uses=1]
+ %tmp66 = load %struct.AGenericManager** %tmp65, align 8 ; <%struct.AGenericManager*> [#uses=1]
+ %tmp69 = tail call i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord( %struct.AGenericManager* %tmp66, %struct.ComponentInstanceRecord** %instance ) ; <i32> [#uses=1]
+ ret i32 %tmp69
+
+UnifiedReturnBlock: ; preds = %cond_next
+ ret i32 undef
+}
+
+declare i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord(%struct.AGenericManager*, %struct.ComponentInstanceRecord**)
diff --git a/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll b/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
new file mode 100644
index 0000000..2d868e0
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define void @t() {
+entry:
+ %tmp455 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 1, i32 0, i32 3, i32 2 > ; <<4 x float>> [#uses=1]
+ %tmp457 = fmul <4 x float> zeroinitializer, %tmp455 ; <<4 x float>> [#uses=2]
+ %tmp461 = shufflevector <4 x float> %tmp457, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
+ %tmp465 = shufflevector <4 x float> %tmp457, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>> [#uses=1]
+ %tmp466 = fsub <4 x float> %tmp461, %tmp465 ; <<4 x float>> [#uses=1]
+ %tmp536 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp466, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
+ %tmp542 = shufflevector <4 x float> %tmp536, <4 x float> zeroinitializer, <4 x i32> < i32 6, i32 7, i32 2, i32 3 > ; <<4 x float>> [#uses=1]
+ %tmp580 = bitcast <4 x float> %tmp542 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp582 = and <4 x i32> %tmp580, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp591 = or <4 x i32> %tmp582, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp592 = bitcast <4 x i32> %tmp591 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp609 = fdiv <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, %tmp592 ; <<4 x float>> [#uses=1]
+ %tmp652 = shufflevector <4 x float> %tmp609, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>> [#uses=1]
+ %tmp662 = fmul <4 x float> zeroinitializer, %tmp652 ; <<4 x float>> [#uses=1]
+ %tmp678 = shufflevector <4 x float> %tmp662, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>> [#uses=1]
+ %tmp753 = fmul <4 x float> zeroinitializer, %tmp678 ; <<4 x float>> [#uses=1]
+ %tmp754 = fsub <4 x float> zeroinitializer, %tmp753 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp754, <4 x float>* null, align 16
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll b/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll
new file mode 100644
index 0000000..305968ac
--- /dev/null
+++ b/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim | grep add | grep 12 | not grep non_lazy_ptr
+; Don't fold re-materialized load into a two address instruction
+
+ %"struct.Smarts::Runnable" = type { i32 (...)**, i32 }
+ %struct.__sbuf = type { i8*, i32 }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %struct.__sbuf, [8 x %struct.__sbuf], i32, %struct.__sbuf*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.Smarts::Runnable"**, i32, %"struct.Smarts::Runnable"**, i8** }
+@_ZTVSt9basic_iosIcSt11char_traitsIcEE = external constant [4 x i32 (...)*] ; <[4 x i32 (...)*]*> [#uses=1]
+@_ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE = external constant [4 x i8*] ; <[4 x i8*]*> [#uses=1]
+@_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE = external constant [10 x i32 (...)*] ; <[10 x i32 (...)*]*> [#uses=2]
+@_ZTVSt15basic_streambufIcSt11char_traitsIcEE = external constant [16 x i32 (...)*] ; <[16 x i32 (...)*]*> [#uses=1]
+@_ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE = external constant [16 x i32 (...)*] ; <[16 x i32 (...)*]*> [#uses=1]
+
+define void @_GLOBAL__I__ZN5Pooma5pinfoE() nounwind {
+entry:
+ store i32 (...)** getelementptr ([10 x i32 (...)*]* @_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i32 8), i32 (...)*** null, align 4
+ %tmp96.i.i142.i = call i8* @_Znwm( i32 180 ) nounwind ; <i8*> [#uses=2]
+ call void @_ZNSt8ios_baseC2Ev( %"struct.std::ios_base"* null ) nounwind
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @_ZTVSt9basic_iosIcSt11char_traitsIcEE, i32 0, i32 2), i32 (...)*** null, align 4
+ store i32 (...)** null, i32 (...)*** null, align 4
+ %ctg2242.i.i163.i = getelementptr i8* %tmp96.i.i142.i, i32 0 ; <i8*> [#uses=1]
+ %tmp150.i.i164.i = load i8** getelementptr ([4 x i8*]* @_ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i64 2), align 4 ; <i8*> [#uses=1]
+ %tmp150151.i.i165.i = bitcast i8* %tmp150.i.i164.i to i32 (...)** ; <i32 (...)**> [#uses=1]
+ %tmp153.i.i166.i = bitcast i8* %ctg2242.i.i163.i to i32 (...)*** ; <i32 (...)***> [#uses=1]
+ store i32 (...)** %tmp150151.i.i165.i, i32 (...)*** %tmp153.i.i166.i, align 4
+ %tmp159.i.i167.i = bitcast i8* %tmp96.i.i142.i to i32 (...)*** ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([10 x i32 (...)*]* @_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i32 3), i32 (...)*** %tmp159.i.i167.i, align 4
+ store i32 (...)** getelementptr ([16 x i32 (...)*]* @_ZTVSt15basic_streambufIcSt11char_traitsIcEE, i32 0, i32 2), i32 (...)*** null, align 4
+ call void @_ZNSt6localeC1Ev( %"struct.std::locale"* null ) nounwind
+ store i32 (...)** getelementptr ([16 x i32 (...)*]* @_ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE, i32 0, i32 2), i32 (...)*** null, align 4
+ unreachable
+}
+
+declare i8* @_Znwm(i32)
+
+declare void @_ZNSt8ios_baseC2Ev(%"struct.std::ios_base"*)
+
+declare void @_ZNSt6localeC1Ev(%"struct.std::locale"*) nounwind
diff --git a/test/CodeGen/X86/2008-04-02-unnamedEH.ll b/test/CodeGen/X86/2008-04-02-unnamedEH.ll
new file mode 100644
index 0000000..27bbbaa
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-02-unnamedEH.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @_Z3bazv() {
+ call void @0( ) ; <i32>:1 [#uses=0]
+ ret void
+}
+
+define internal void @""() {
+ call i32 @_Z3barv( ) ; <i32>:4 [#uses=1]
+ ret void
+}
+; CHECK: unnamed_1.eh
+
+declare i32 @_Z3barv()
diff --git a/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll b/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll
new file mode 100644
index 0000000..dc8c097
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx
+
+define i32 @t2() nounwind {
+entry:
+ tail call void asm sideeffect "# top of block", "~{dirflag},~{fpsr},~{flags},~{di},~{si},~{dx},~{cx},~{ax}"( ) nounwind
+ tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ tail call void asm sideeffect ".line 8", "~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ %tmp1 = tail call <2 x i32> asm sideeffect "movd $1, $0", "=={mm4},{bp},~{dirflag},~{fpsr},~{flags},~{memory}"( i32 undef ) nounwind ; <<2 x i32>> [#uses=1]
+ tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ tail call void asm sideeffect ".line 9", "~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ %tmp3 = tail call i32 asm sideeffect "movd $1, $0", "=={bp},{mm3},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> undef ) nounwind ; <i32> [#uses=1]
+ tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ tail call void asm sideeffect ".line 10", "~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ tail call void asm sideeffect "movntq $0, 0($1,$2)", "{mm0},{di},{bp},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> undef, i32 undef, i32 %tmp3 ) nounwind
+ tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ tail call void asm sideeffect ".line 11", "~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ %tmp8 = tail call i32 asm sideeffect "movd $1, $0", "=={bp},{mm4},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> %tmp1 ) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
diff --git a/test/CodeGen/X86/2008-04-09-BranchFolding.ll b/test/CodeGen/X86/2008-04-09-BranchFolding.ll
new file mode 100644
index 0000000..41fbdd19
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-09-BranchFolding.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -march=x86 | not grep jmp
+
+ %struct..0anon = type { i32 }
+ %struct.binding_level = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.binding_level*, i8, i8, i8, i8, i8, i32, %struct.tree_node* }
+ %struct.lang_decl = type opaque
+ %struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] }
+ %struct.tree_decl = type { [12 x i8], i8*, i32, %struct.tree_node*, i32, i8, i8, i8, i8, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct..0anon, { %struct.rtx_def* }, %struct.tree_node*, %struct.lang_decl* }
+ %struct.tree_node = type { %struct.tree_decl }
+
+define fastcc %struct.tree_node* @pushdecl(%struct.tree_node* %x) nounwind {
+entry:
+ %tmp3.i40 = icmp eq %struct.binding_level* null, null ; <i1> [#uses=2]
+ br i1 false, label %bb143, label %bb140
+bb140: ; preds = %entry
+ br i1 %tmp3.i40, label %bb160, label %bb17.i
+bb17.i: ; preds = %bb140
+ ret %struct.tree_node* null
+bb143: ; preds = %entry
+ %tmp8.i43 = load %struct.tree_node** null, align 4 ; <%struct.tree_node*> [#uses=1]
+ br i1 %tmp3.i40, label %bb160, label %bb9.i48
+bb9.i48: ; preds = %bb143
+ ret %struct.tree_node* null
+bb160: ; preds = %bb143, %bb140
+ %t.0.reg2mem.0 = phi %struct.tree_node* [ null, %bb140 ], [ %tmp8.i43, %bb143 ] ; <%struct.tree_node*> [#uses=1]
+ %tmp162 = icmp eq %struct.tree_node* %t.0.reg2mem.0, null ; <i1> [#uses=2]
+ br i1 %tmp162, label %bb174, label %bb165
+bb165: ; preds = %bb160
+ br label %bb174
+bb174: ; preds = %bb165, %bb160
+ %line.0 = phi i32 [ 0, %bb165 ], [ undef, %bb160 ] ; <i32> [#uses=1]
+ %file.0 = phi i8* [ null, %bb165 ], [ undef, %bb160 ] ; <i8*> [#uses=1]
+ br i1 %tmp162, label %bb344, label %bb73.i
+bb73.i: ; preds = %bb174
+ br i1 false, label %bb226.i, label %bb220.i
+bb220.i: ; preds = %bb73.i
+ ret %struct.tree_node* null
+bb226.i: ; preds = %bb73.i
+ br i1 false, label %bb260, label %bb273.i
+bb273.i: ; preds = %bb226.i
+ ret %struct.tree_node* null
+bb260: ; preds = %bb226.i
+ tail call void (i8*, i32, ...)* @pedwarn_with_file_and_line( i8* %file.0, i32 %line.0, i8* null ) nounwind
+ ret %struct.tree_node* null
+bb344: ; preds = %bb174
+ ret %struct.tree_node* null
+}
+
+declare void @pedwarn_with_file_and_line(i8*, i32, ...) nounwind
diff --git a/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll b/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll
new file mode 100644
index 0000000..2aea9c5
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim -O0 -regalloc=local
+; PR5534
+
+ %struct.CGPoint = type { double, double }
+ %struct.NSArray = type { %struct.NSObject }
+ %struct.NSAssertionHandler = type { %struct.NSObject, i8* }
+ %struct.NSDockTile = type { %struct.NSObject, %struct.NSObject*, i8*, %struct.NSView*, %struct.NSView*, %struct.NSView*, %struct.NSArray*, %struct._SPFlags, %struct.CGPoint, [5 x %struct.NSObject*] }
+ %struct.NSDocument = type { %struct.NSObject, %struct.NSWindow*, %struct.NSObject*, %struct.NSURL*, %struct.NSArray*, %struct.NSPrintInfo*, i64, %struct.NSView*, %struct.NSObject*, %struct.NSObject*, %struct.NSUndoManager*, %struct._BCFlags2, %struct.NSArray* }
+ %struct.AA = type { %struct.NSObject, %struct.NSDocument*, %struct.NSURL*, %struct.NSArray*, %struct.NSArray* }
+ %struct.NSError = type { %struct.NSObject, i8*, i64, %struct.NSArray*, %struct.NSArray* }
+ %struct.NSImage = type { %struct.NSObject, %struct.NSArray*, %struct.CGPoint, %struct._BCFlags2, %struct.NSObject*, %struct._NSImageAuxiliary* }
+ %struct.NSMutableArray = type { %struct.NSArray }
+ %struct.NSObject = type { %struct.NSObject* }
+ %struct.NSPrintInfo = type { %struct.NSObject, %struct.NSMutableArray*, %struct.NSObject* }
+ %struct.NSRect = type { %struct.CGPoint, %struct.CGPoint }
+ %struct.NSRegion = type opaque
+ %struct.NSResponder = type { %struct.NSObject, %struct.NSObject* }
+ %struct.NSToolbar = type { %struct.NSObject, %struct.NSArray*, %struct.NSMutableArray*, %struct.NSMutableArray*, %struct.NSArray*, %struct.NSObject*, %struct.NSArray*, i8*, %struct.NSObject*, %struct.NSWindow*, %struct.NSObject*, %struct.NSObject*, i64, %struct._BCFlags2, i64, %struct.NSObject* }
+ %struct.NSURL = type { %struct.NSObject, %struct.NSArray*, %struct.NSURL*, i8*, i8* }
+ %struct.NSUndoManager = type { %struct.NSObject, %struct.NSObject*, %struct.NSObject*, %struct.NSArray*, i64, %struct._SPFlags, %struct.NSObject*, i8*, i8*, i8* }
+ %struct.NSView = type { %struct.NSResponder, %struct.NSRect, %struct.NSRect, %struct.NSObject*, %struct.NSObject*, %struct.NSWindow*, %struct.NSObject*, %struct.NSObject*, %struct.NSObject*, %struct.NSObject*, %struct._NSViewAuxiliary*, %struct._BCFlags, %struct._SPFlags }
+ %struct.NSWindow = type { %struct.NSResponder, %struct.NSRect, %struct.NSObject*, %struct.NSObject*, %struct.NSResponder*, %struct.NSView*, %struct.NSView*, %struct.NSObject*, %struct.NSObject*, i32, i64, i32, %struct.NSArray*, %struct.NSObject*, i8, i8, i8, i8, i8*, i8*, %struct.NSImage*, i32, %struct.NSMutableArray*, %struct.NSURL*, %struct.CGPoint*, %struct.NSArray*, %struct.NSArray*, %struct.__wFlags, %struct.NSObject*, %struct.NSView*, %struct.NSWindowAuxiliary* }
+ %struct.NSWindowAuxiliary = type { %struct.NSObject, %struct.NSArray*, %struct.NSDockTile*, %struct._NSWindowAnimator*, %struct.NSRect, i32, %struct.NSAssertionHandler*, %struct.NSUndoManager*, %struct.NSWindowController*, %struct.NSAssertionHandler*, %struct.NSObject*, i32, %struct.__CFRunLoopObserver*, %struct.__CFRunLoopObserver*, %struct.NSArray*, %struct.NSArray*, %struct.NSView*, %struct.NSRegion*, %struct.NSWindow*, %struct.NSWindow*, %struct.NSArray*, %struct.NSMutableArray*, %struct.NSArray*, %struct.NSWindow*, %struct.CGPoint, %struct.NSObject*, i8*, i8*, i32, %struct.NSObject*, %struct.NSArray*, double, %struct.CGPoint, %struct.NSArray*, %struct.NSMutableArray*, %struct.NSMutableArray*, %struct.NSWindow*, %struct.NSView*, %struct.NSArray*, %struct.__auxWFlags, i32, i8*, double, %struct.NSObject*, %struct.NSObject*, %struct.__CFArray*, %struct.NSRegion*, %struct.NSArray*, %struct.NSRect, %struct.NSToolbar*, %struct.NSRect, %struct.NSMutableArray* }
+ %struct.NSWindowController = type { %struct.NSResponder, %struct.NSWindow*, %struct.NSArray*, %struct.NSDocument*, %struct.NSArray*, %struct.NSObject*, %struct._SPFlags, %struct.NSArray*, %struct.NSObject* }
+ %struct._BCFlags = type <{ i8, i8, i8, i8 }>
+ %struct._BCFlags2 = type <{ i8, [3 x i8] }>
+ %struct._NSImageAuxiliary = type opaque
+ %struct._NSViewAuxiliary = type opaque
+ %struct._NSWindowAnimator = type opaque
+ %struct._SPFlags = type <{ i32 }>
+ %struct.__CFArray = type opaque
+ %struct.__CFRunLoopObserver = type opaque
+ %struct.__auxWFlags = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16 }
+ %struct.__wFlags = type <{ i8, i8, i8, i8, i8, i8, i8, i8 }>
+ %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* }
+ %struct.objc_selector = type opaque
+@"\01L_OBJC_MESSAGE_REF_228" = internal global %struct._message_ref_t zeroinitializer ; <%struct._message_ref_t*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast (void (%struct.AA*, %struct._message_ref_t*, %struct.NSError*, i64, %struct.NSObject*, %struct.objc_selector*, i8*)* @"-[AA BB:optionIndex:delegate:CC:contextInfo:]" to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @"-[AA BB:optionIndex:delegate:CC:contextInfo:]"(%struct.AA* %self, %struct._message_ref_t* %_cmd, %struct.NSError* %inError, i64 %inOptionIndex, %struct.NSObject* %inDelegate, %struct.objc_selector* %inDidRecoverSelector, i8* %inContextInfo) {
+entry:
+ %tmp105 = load %struct.NSArray** null, align 8 ; <%struct.NSArray*> [#uses=1]
+ %tmp107 = load %struct.NSObject** null, align 8 ; <%struct.NSObject*> [#uses=1]
+ call void null( %struct.NSObject* %tmp107, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_228", %struct.NSArray* %tmp105, i8 signext 0 )
+ %tmp111 = call %struct.NSObject* (%struct.NSObject*, %struct.objc_selector*, ...)* @objc_msgSend( %struct.NSObject* null, %struct.objc_selector* null, i32 0, i8* null ) ; <%struct.NSObject*> [#uses=0]
+ ret void
+}
+
+declare %struct.NSObject* @objc_msgSend(%struct.NSObject*, %struct.objc_selector*, ...)
diff --git a/test/CodeGen/X86/2008-04-16-CoalescerBug.ll b/test/CodeGen/X86/2008-04-16-CoalescerBug.ll
new file mode 100644
index 0000000..3ccc0fe
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-16-CoalescerBug.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=x86
+
+define void @Hubba(i8* %saveunder, i32 %firstBlob, i32 %select) nounwind {
+entry:
+ br i1 false, label %bb53.us, label %bb53
+bb53.us: ; preds = %bb94.us, %bb53.us, %entry
+ switch i8 1, label %bb71.us [
+ i8 0, label %bb53.us
+ i8 1, label %bb94.us
+ ]
+bb94.us: ; preds = %bb71.us, %bb53.us
+ %result.0.us = phi i32 [ %tmp93.us, %bb71.us ], [ 0, %bb53.us ] ; <i32> [#uses=2]
+ %tmp101.us = lshr i32 %result.0.us, 3 ; <i32> [#uses=1]
+ %result.0163.us = trunc i32 %result.0.us to i16 ; <i16> [#uses=2]
+ shl i16 %result.0163.us, 7 ; <i16>:0 [#uses=1]
+ %tmp106.us = and i16 %0, -1024 ; <i16> [#uses=1]
+ shl i16 %result.0163.us, 2 ; <i16>:1 [#uses=1]
+ %tmp109.us = and i16 %1, -32 ; <i16> [#uses=1]
+ %tmp111112.us = trunc i32 %tmp101.us to i16 ; <i16> [#uses=1]
+ %tmp110.us = or i16 %tmp109.us, %tmp111112.us ; <i16> [#uses=1]
+ %tmp113.us = or i16 %tmp110.us, %tmp106.us ; <i16> [#uses=1]
+ store i16 %tmp113.us, i16* null, align 2
+ br label %bb53.us
+bb71.us: ; preds = %bb53.us
+ %tmp80.us = load i8* null, align 1 ; <i8> [#uses=1]
+ %tmp8081.us = zext i8 %tmp80.us to i32 ; <i32> [#uses=1]
+ %tmp87.us = mul i32 %tmp8081.us, 0 ; <i32> [#uses=1]
+ %tmp92.us = add i32 0, %tmp87.us ; <i32> [#uses=1]
+ %tmp93.us = udiv i32 %tmp92.us, 255 ; <i32> [#uses=1]
+ br label %bb94.us
+bb53: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-04-16-ReMatBug.ll b/test/CodeGen/X86/2008-04-16-ReMatBug.ll
new file mode 100644
index 0000000..6e8891b
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-16-ReMatBug.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep movw | not grep {, %e}
+
+ %struct.DBC_t = type { i32, i8*, i16, %struct.DBC_t*, i8*, i8*, i8*, i8*, i8*, %struct.DBC_t*, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32*, i8, i16, %struct.DRVOPT*, i16 }
+ %struct.DRVOPT = type { i16, i32, i8, %struct.DRVOPT* }
+ %struct.GENV_t = type { i32, i8*, i16, i8*, i8*, i32, i32, i32, i32, %struct.DBC_t*, i16 }
+ %struct.pthread_mutex_t = type { i32, [40 x i8] }
+@iodbcdm_global_lock = external global %struct.pthread_mutex_t ; <%struct.pthread_mutex_t*> [#uses=1]
+
+define i16 @SQLDriversW(i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 signext %cbDrvDescMax, i16* %pcbDrvDesc, i32* %szDrvAttr, i16 signext %cbDrvAttrMax, i16* %pcbDrvAttr) signext nounwind {
+entry:
+ %tmp12 = bitcast i8* %henv to %struct.GENV_t* ; <%struct.GENV_t*> [#uses=1]
+ br i1 true, label %bb28, label %bb
+bb: ; preds = %entry
+ ret i16 0
+bb28: ; preds = %entry
+ br i1 false, label %bb37, label %done
+bb37: ; preds = %bb28
+ %tmp46 = getelementptr %struct.GENV_t* %tmp12, i32 0, i32 10 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp46, align 4
+ br i1 false, label %bb74, label %bb92
+bb74: ; preds = %bb37
+ br label %bb92
+bb92: ; preds = %bb74, %bb37
+ %tmp95180 = shl i16 %cbDrvAttrMax, 2 ; <i16> [#uses=1]
+ %tmp100178 = shl i16 %cbDrvDescMax, 2 ; <i16> [#uses=1]
+ %tmp113 = tail call i16 @SQLDrivers_Internal( i8* %henv, i16 zeroext %fDir, i8* null, i16 signext %tmp100178, i16* %pcbDrvDesc, i8* null, i16 signext %tmp95180, i16* %pcbDrvAttr, i8 zeroext 87 ) signext nounwind ; <i16> [#uses=1]
+ br i1 false, label %done, label %bb137
+bb137: ; preds = %bb92
+ ret i16 0
+done: ; preds = %bb92, %bb28
+ %retcode.0 = phi i16 [ -2, %bb28 ], [ %tmp113, %bb92 ] ; <i16> [#uses=2]
+ br i1 false, label %bb167, label %bb150
+bb150: ; preds = %done
+ %tmp157158 = sext i16 %retcode.0 to i32 ; <i32> [#uses=1]
+ tail call void @trace_SQLDriversW( i32 1, i32 %tmp157158, i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 signext %cbDrvDescMax, i16* %pcbDrvDesc, i32* %szDrvAttr, i16 signext %cbDrvAttrMax, i16* %pcbDrvAttr ) nounwind
+ ret i16 0
+bb167: ; preds = %done
+ %tmp168 = tail call i32 @pthread_mutex_unlock( %struct.pthread_mutex_t* @iodbcdm_global_lock ) nounwind ; <i32> [#uses=0]
+ ret i16 %retcode.0
+}
+
+declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*)
+
+declare i16 @SQLDrivers_Internal(i8*, i16 zeroext , i8*, i16 signext , i16*, i8*, i16 signext , i16*, i8 zeroext ) signext nounwind
+
+declare void @trace_SQLDriversW(i32, i32, i8*, i16 zeroext , i32*, i16 signext , i16*, i32*, i16 signext , i16*)
diff --git a/test/CodeGen/X86/2008-04-17-CoalescerBug.ll b/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
new file mode 100644
index 0000000..ac48285
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
@@ -0,0 +1,171 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep xorl | grep {%e}
+; Make sure xorl operands are 32-bit registers.
+
+ %struct.tm = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8* }
+ %struct.wxDateTime = type { %struct.wxLongLong }
+ %"struct.wxDateTime::TimeZone" = type { i32 }
+ %struct.wxLongLong = type { i64 }
+ %struct.wxString = type { %struct.wxStringBase }
+ %struct.wxStringBase = type { i32* }
[email protected] = external constant [27 x i32] ; <[27 x i32]*> [#uses=1]
[email protected] = external constant [14 x i32] ; <[14 x i32]*> [#uses=1]
+@_ZZNK10wxDateTime5GetTmERKNS_8TimeZoneEE12__FUNCTION__ = external constant [6 x i8] ; <[6 x i8]*> [#uses=1]
[email protected] = external constant [29 x i32] ; <[29 x i32]*> [#uses=1]
[email protected] = external constant [5 x i32] ; <[5 x i32]*> [#uses=1]
+
+define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(%struct.wxString* noalias sret %agg.result, %struct.wxDateTime* %this, i32* %format, %"struct.wxDateTime::TimeZone"* %tz, i1 %foo) {
+entry:
+ br i1 %foo, label %bb116.i, label %bb115.critedge.i
+bb115.critedge.i: ; preds = %entry
+ ret void
+bb116.i: ; preds = %entry
+ br i1 %foo, label %bb52.i.i, label %bb3118
+bb3118: ; preds = %bb116.i
+ ret void
+bb52.i.i: ; preds = %bb116.i
+ br i1 %foo, label %bb142.i, label %bb115.critedge.i.i
+bb115.critedge.i.i: ; preds = %bb52.i.i
+ ret void
+bb142.i: ; preds = %bb52.i.i
+ br i1 %foo, label %bb161.i, label %bb182.i
+bb161.i: ; preds = %bb142.i
+ br label %bb3261
+bb182.i: ; preds = %bb142.i
+ ret void
+bb3261: ; preds = %bb7834, %bb161.i
+ %tmp3263 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp3264 = icmp eq i32 %tmp3263, 37 ; <i1> [#uses=1]
+ br i1 %tmp3264, label %bb3306, label %bb3267
+bb3267: ; preds = %bb3261
+ ret void
+bb3306: ; preds = %bb3261
+ %tmp3310 = invoke %struct.wxStringBase* @_ZN12wxStringBaseaSEPKw( %struct.wxStringBase* null, i32* getelementptr ([5 x i32]* @.str89, i32 0, i32 0) )
+ to label %bb3314 unwind label %lpad ; <%struct.wxStringBase*> [#uses=0]
+bb3314: ; preds = %bb3306
+ %tmp3316 = load i32* null, align 4 ; <i32> [#uses=1]
+ switch i32 %tmp3316, label %bb7595 [
+ i32 0, label %bb7819
+ i32 37, label %bb7806
+ i32 66, label %bb3477
+ i32 72, label %bb5334
+ i32 73, label %bb5484
+ i32 77, label %bb6118
+ i32 83, label %bb6406
+ i32 85, label %bb6556
+ i32 87, label %bb6708
+ i32 89, label %bb7308
+ i32 98, label %bb3477
+ i32 99, label %bb3626
+ i32 100, label %bb5184
+ i32 106, label %bb5657
+ i32 108, label %bb5809
+ i32 109, label %bb5968
+ i32 119, label %bb6860
+ i32 120, label %bb3626
+ i32 121, label %bb7158
+ ]
+bb3477: ; preds = %bb3314, %bb3314
+ ret void
+bb3626: ; preds = %bb3314, %bb3314
+ ret void
+bb5184: ; preds = %bb3314
+ ret void
+bb5334: ; preds = %bb3314
+ ret void
+bb5484: ; preds = %bb3314
+ ret void
+bb5657: ; preds = %bb3314
+ %tmp5661 = invoke i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE( %struct.wxDateTime* %this, %"struct.wxDateTime::TimeZone"* %tz ) zeroext
+ to label %invcont5660 unwind label %lpad ; <i16> [#uses=0]
+invcont5660: ; preds = %bb5657
+ ret void
+bb5809: ; preds = %bb3314
+ %tmp61.i.i8486 = icmp sgt i64 0, -1 ; <i1> [#uses=1]
+ %tmp95.i.i8490 = icmp slt i64 0, 2147483647000 ; <i1> [#uses=1]
+ %bothcond9308 = and i1 %tmp61.i.i8486, %tmp95.i.i8490 ; <i1> [#uses=1]
+ br i1 %bothcond9308, label %bb91.i8504, label %bb115.critedge.i.i8492
+bb115.critedge.i.i8492: ; preds = %bb5809
+ ret void
+bb91.i8504: ; preds = %bb5809
+ br i1 %foo, label %bb155.i8541, label %bb182.i8560
+bb155.i8541: ; preds = %bb91.i8504
+ %tmp156.i85398700 = invoke %struct.tm* @gmtime_r( i32* null, %struct.tm* null )
+ to label %bb182.i8560 unwind label %lpad ; <%struct.tm*> [#uses=1]
+bb182.i8560: ; preds = %bb155.i8541, %bb91.i8504
+ %tm48.0.i8558 = phi %struct.tm* [ null, %bb91.i8504 ], [ %tmp156.i85398700, %bb155.i8541 ] ; <%struct.tm*> [#uses=0]
+ br i1 %foo, label %bb278.i8617, label %bb187.i8591
+bb187.i8591: ; preds = %bb182.i8560
+ %tmp245.i8588 = srem i64 0, 86400000 ; <i64> [#uses=1]
+ br i1 %foo, label %bb264.i8592, label %bb265.i8606
+bb264.i8592: ; preds = %bb187.i8591
+ ret void
+bb265.i8606: ; preds = %bb187.i8591
+ %tmp268269.i8593 = trunc i64 %tmp245.i8588 to i32 ; <i32> [#uses=1]
+ %tmp273.i8594 = srem i32 %tmp268269.i8593, 1000 ; <i32> [#uses=1]
+ %tmp273274.i8595 = trunc i32 %tmp273.i8594 to i16 ; <i16> [#uses=1]
+ br label %invcont5814
+bb278.i8617: ; preds = %bb182.i8560
+ %timeOnly50.0.i8622 = add i32 0, 0 ; <i32> [#uses=1]
+ br i1 %foo, label %bb440.i8663, label %bb448.i8694
+bb440.i8663: ; preds = %bb278.i8617
+ invoke void @_Z10wxOnAssertPKwiPKcS0_S0_( i32* getelementptr ([27 x i32]* @.str, i32 0, i32 0), i32 1717, i8* getelementptr ([6 x i8]* @_ZZNK10wxDateTime5GetTmERKNS_8TimeZoneEE12__FUNCTION__, i32 0, i32 0), i32* getelementptr ([29 x i32]* @.str33, i32 0, i32 0), i32* getelementptr ([14 x i32]* @.str4, i32 0, i32 0) )
+ to label %bb448.i8694 unwind label %lpad
+bb448.i8694: ; preds = %bb440.i8663, %bb278.i8617
+ %tmp477.i8669 = srem i32 %timeOnly50.0.i8622, 1000 ; <i32> [#uses=1]
+ %tmp477478.i8670 = trunc i32 %tmp477.i8669 to i16 ; <i16> [#uses=1]
+ br label %invcont5814
+invcont5814: ; preds = %bb448.i8694, %bb265.i8606
+ %tmp812.0.0 = phi i16 [ %tmp477478.i8670, %bb448.i8694 ], [ %tmp273274.i8595, %bb265.i8606 ] ; <i16> [#uses=1]
+ %tmp58165817 = zext i16 %tmp812.0.0 to i32 ; <i32> [#uses=1]
+ invoke void (%struct.wxString*, i32*, ...)* @_ZN8wxString6FormatEPKwz( %struct.wxString* noalias sret null, i32* null, i32 %tmp58165817 )
+ to label %invcont5831 unwind label %lpad
+invcont5831: ; preds = %invcont5814
+ %tmp5862 = invoke i8 @_ZN12wxStringBase10ConcatSelfEmPKwm( %struct.wxStringBase* null, i32 0, i32* null, i32 0 ) zeroext
+ to label %bb7834 unwind label %lpad8185 ; <i8> [#uses=0]
+bb5968: ; preds = %bb3314
+ invoke void (%struct.wxString*, i32*, ...)* @_ZN8wxString6FormatEPKwz( %struct.wxString* noalias sret null, i32* null, i32 0 )
+ to label %invcont5981 unwind label %lpad
+invcont5981: ; preds = %bb5968
+ ret void
+bb6118: ; preds = %bb3314
+ ret void
+bb6406: ; preds = %bb3314
+ ret void
+bb6556: ; preds = %bb3314
+ ret void
+bb6708: ; preds = %bb3314
+ ret void
+bb6860: ; preds = %bb3314
+ ret void
+bb7158: ; preds = %bb3314
+ ret void
+bb7308: ; preds = %bb3314
+ ret void
+bb7595: ; preds = %bb3314
+ ret void
+bb7806: ; preds = %bb3314
+ %tmp7814 = invoke %struct.wxStringBase* @_ZN12wxStringBase6appendEmw( %struct.wxStringBase* null, i32 1, i32 0 )
+ to label %bb7834 unwind label %lpad ; <%struct.wxStringBase*> [#uses=0]
+bb7819: ; preds = %bb3314
+ ret void
+bb7834: ; preds = %bb7806, %invcont5831
+ br label %bb3261
+lpad: ; preds = %bb7806, %bb5968, %invcont5814, %bb440.i8663, %bb155.i8541, %bb5657, %bb3306
+ ret void
+lpad8185: ; preds = %invcont5831
+ ret void
+}
+
+declare void @_Z10wxOnAssertPKwiPKcS0_S0_(i32*, i32, i8*, i32*, i32*)
+
+declare i8 @_ZN12wxStringBase10ConcatSelfEmPKwm(%struct.wxStringBase*, i32, i32*, i32) zeroext
+
+declare %struct.tm* @gmtime_r(i32*, %struct.tm*)
+
+declare i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE(%struct.wxDateTime*, %"struct.wxDateTime::TimeZone"*) zeroext
+
+declare %struct.wxStringBase* @_ZN12wxStringBase6appendEmw(%struct.wxStringBase*, i32, i32)
+
+declare %struct.wxStringBase* @_ZN12wxStringBaseaSEPKw(%struct.wxStringBase*, i32*)
+
+declare void @_ZN8wxString6FormatEPKwz(%struct.wxString* noalias sret , i32*, ...)
diff --git a/test/CodeGen/X86/2008-04-24-MemCpyBug.ll b/test/CodeGen/X86/2008-04-24-MemCpyBug.ll
new file mode 100644
index 0000000..6389267
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-24-MemCpyBug.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 | not grep 120
+; Don't accidentally add the offset twice for trailing bytes.
+
+ %struct.S63 = type { [63 x i8] }
+@g1s63 = external global %struct.S63 ; <%struct.S63*> [#uses=1]
+
+declare void @test63(%struct.S63* byval align 4 ) nounwind
+
+define void @testit63_entry_2E_ce() nounwind {
+ tail call void @test63( %struct.S63* byval align 4 @g1s63 ) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll b/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll
new file mode 100644
index 0000000..4eaca17c
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mattr=+sse41
+; rdar://5886601
+; gcc testsuite: gcc.target/i386/sse4_1-pblendw.c
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define i32 @main() nounwind {
+entry:
+ %tmp122 = load <2 x i64>* null, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp126 = bitcast <2 x i64> %tmp122 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp129 = call <8 x i16> @llvm.x86.sse41.pblendw( <8 x i16> zeroinitializer, <8 x i16> %tmp126, i32 2 ) nounwind ; <<8 x i16>> [#uses=0]
+ ret i32 0
+}
+
+declare <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16>, <8 x i16>, i32) nounwind
diff --git a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
new file mode 100644
index 0000000..38d6aa6
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s | grep {1 \$2 3}
+; rdar://5720231
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @test() nounwind {
+entry:
+ tail call void asm sideeffect " ${0:c} $1 ${2:c} ", "imr,imr,i,~{dirflag},~{fpsr},~{flags}"( i32 1, i32 2, i32 3 ) nounwind
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2008-04-28-CoalescerBug.ll b/test/CodeGen/X86/2008-04-28-CoalescerBug.ll
new file mode 100644
index 0000000..5b97eb7
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-28-CoalescerBug.ll
@@ -0,0 +1,167 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl > %t
+; RUN: not grep {r\[abcd\]x} %t
+; RUN: not grep {r\[ds\]i} %t
+; RUN: not grep {r\[bs\]p} %t
+
+ %struct.BITMAP = type { i16, i16, i32, i32, i32, i32, i32, i32, i8*, i8* }
+ %struct.BltData = type { float, float, float, float }
+ %struct.BltDepth = type { i32, i8**, i32, %struct.BITMAP* (%struct.BltDepth**, %struct.BITMAP*, i32, i32, float*, float, i32)*, i32 (%struct.BltDepth**, %struct.BltOp*)*, i32 (%struct.BltDepth**, %struct.BltOp*, %struct.BltImg*)*, i32 (%struct.BltDepth**, %struct.BltOp*, %struct.BltSh*)*, [28 x [2 x [2 x i32]]]*, %struct.BltData* }
+ %struct.BltImg = type { i32, i8, i8, i8, float, float*, float*, i32, i32, float*, i32 (i8*, i8*, i8**, i32*, i8**, i32*)*, i8* }
+ %struct.BltOp = type { i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i8* }
+ %struct.BltSh = type { i8, i8, i8, i8, float, float*, float*, float*, float*, i32, i32, float*, float*, float* }
+
+define void @t(%struct.BltDepth* %depth, %struct.BltOp* %bop, i32 %mode) nounwind {
+entry:
+ switch i32 %mode, label %return [
+ i32 1, label %bb2898.us
+ i32 18, label %bb13086.preheader
+ ]
+
+bb13086.preheader: ; preds = %entry
+ %tmp13098 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ %tmp13238 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br label %bb13088
+
+bb2898.us: ; preds = %bb2898.us, %entry
+ br label %bb2898.us
+
+bb13088: ; preds = %bb13572, %bb13567, %bb13107, %bb13086.preheader
+ br i1 %tmp13098, label %bb13107, label %bb13101
+
+bb13101: ; preds = %bb13088
+ br label %bb13107
+
+bb13107: ; preds = %bb13101, %bb13088
+ %iftmp.684.0 = phi i32 [ 0, %bb13101 ], [ 65535, %bb13088 ] ; <i32> [#uses=2]
+ %tmp13111 = load i64* null, align 8 ; <i64> [#uses=3]
+ %tmp13116 = lshr i64 %tmp13111, 16 ; <i64> [#uses=1]
+ %tmp1311613117 = trunc i64 %tmp13116 to i32 ; <i32> [#uses=1]
+ %tmp13118 = and i32 %tmp1311613117, 65535 ; <i32> [#uses=1]
+ %tmp13120 = lshr i64 %tmp13111, 32 ; <i64> [#uses=1]
+ %tmp1312013121 = trunc i64 %tmp13120 to i32 ; <i32> [#uses=1]
+ %tmp13122 = and i32 %tmp1312013121, 65535 ; <i32> [#uses=2]
+ %tmp13124 = lshr i64 %tmp13111, 48 ; <i64> [#uses=1]
+ %tmp1312413125 = trunc i64 %tmp13124 to i32 ; <i32> [#uses=2]
+ %tmp1314013141not = xor i16 0, -1 ; <i16> [#uses=1]
+ %tmp1314013141not13142 = zext i16 %tmp1314013141not to i32 ; <i32> [#uses=3]
+ %tmp13151 = mul i32 %tmp13122, %tmp1314013141not13142 ; <i32> [#uses=1]
+ %tmp13154 = mul i32 %tmp1312413125, %tmp1314013141not13142 ; <i32> [#uses=1]
+ %tmp13157 = mul i32 %iftmp.684.0, %tmp1314013141not13142 ; <i32> [#uses=1]
+ %tmp13171 = add i32 %tmp13151, 1 ; <i32> [#uses=1]
+ %tmp13172 = add i32 %tmp13171, 0 ; <i32> [#uses=1]
+ %tmp13176 = add i32 %tmp13154, 1 ; <i32> [#uses=1]
+ %tmp13177 = add i32 %tmp13176, 0 ; <i32> [#uses=1]
+ %tmp13181 = add i32 %tmp13157, 1 ; <i32> [#uses=1]
+ %tmp13182 = add i32 %tmp13181, 0 ; <i32> [#uses=1]
+ %tmp13188 = lshr i32 %tmp13172, 16 ; <i32> [#uses=1]
+ %tmp13190 = lshr i32 %tmp13177, 16 ; <i32> [#uses=1]
+ %tmp13192 = lshr i32 %tmp13182, 16 ; <i32> [#uses=1]
+ %tmp13198 = sub i32 %tmp13118, 0 ; <i32> [#uses=1]
+ %tmp13201 = sub i32 %tmp13122, %tmp13188 ; <i32> [#uses=1]
+ %tmp13204 = sub i32 %tmp1312413125, %tmp13190 ; <i32> [#uses=1]
+ %tmp13207 = sub i32 %iftmp.684.0, %tmp13192 ; <i32> [#uses=1]
+ %tmp1320813209 = zext i32 %tmp13204 to i64 ; <i64> [#uses=1]
+ %tmp13211 = shl i64 %tmp1320813209, 48 ; <i64> [#uses=1]
+ %tmp1321213213 = zext i32 %tmp13201 to i64 ; <i64> [#uses=1]
+ %tmp13214 = shl i64 %tmp1321213213, 32 ; <i64> [#uses=1]
+ %tmp13215 = and i64 %tmp13214, 281470681743360 ; <i64> [#uses=1]
+ %tmp1321713218 = zext i32 %tmp13198 to i64 ; <i64> [#uses=1]
+ %tmp13219 = shl i64 %tmp1321713218, 16 ; <i64> [#uses=1]
+ %tmp13220 = and i64 %tmp13219, 4294901760 ; <i64> [#uses=1]
+ %tmp13216 = or i64 %tmp13211, 0 ; <i64> [#uses=1]
+ %tmp13221 = or i64 %tmp13216, %tmp13215 ; <i64> [#uses=1]
+ %tmp13225 = or i64 %tmp13221, %tmp13220 ; <i64> [#uses=4]
+ %tmp1322713228 = trunc i32 %tmp13207 to i16 ; <i16> [#uses=4]
+ %tmp13233 = icmp eq i16 %tmp1322713228, 0 ; <i1> [#uses=1]
+ br i1 %tmp13233, label %bb13088, label %bb13236
+
+bb13236: ; preds = %bb13107
+ br i1 false, label %bb13567, label %bb13252
+
+bb13252: ; preds = %bb13236
+ %tmp1329013291 = zext i16 %tmp1322713228 to i64 ; <i64> [#uses=8]
+ %tmp13296 = lshr i64 %tmp13225, 16 ; <i64> [#uses=1]
+ %tmp13297 = and i64 %tmp13296, 65535 ; <i64> [#uses=1]
+ %tmp13299 = lshr i64 %tmp13225, 32 ; <i64> [#uses=1]
+ %tmp13300 = and i64 %tmp13299, 65535 ; <i64> [#uses=1]
+ %tmp13302 = lshr i64 %tmp13225, 48 ; <i64> [#uses=1]
+ %tmp13306 = sub i64 %tmp1329013291, 0 ; <i64> [#uses=0]
+ %tmp13309 = sub i64 %tmp1329013291, %tmp13297 ; <i64> [#uses=1]
+ %tmp13312 = sub i64 %tmp1329013291, %tmp13300 ; <i64> [#uses=1]
+ %tmp13315 = sub i64 %tmp1329013291, %tmp13302 ; <i64> [#uses=1]
+ %tmp13318 = mul i64 %tmp1329013291, %tmp1329013291 ; <i64> [#uses=1]
+ br i1 false, label %bb13339, label %bb13324
+
+bb13324: ; preds = %bb13252
+ br i1 false, label %bb13339, label %bb13330
+
+bb13330: ; preds = %bb13324
+ %tmp13337 = sdiv i64 0, 0 ; <i64> [#uses=1]
+ br label %bb13339
+
+bb13339: ; preds = %bb13330, %bb13324, %bb13252
+ %r0120.0 = phi i64 [ %tmp13337, %bb13330 ], [ 0, %bb13252 ], [ 4294836225, %bb13324 ] ; <i64> [#uses=1]
+ br i1 false, label %bb13360, label %bb13345
+
+bb13345: ; preds = %bb13339
+ br i1 false, label %bb13360, label %bb13351
+
+bb13351: ; preds = %bb13345
+ %tmp13354 = mul i64 0, %tmp13318 ; <i64> [#uses=1]
+ %tmp13357 = sub i64 %tmp1329013291, %tmp13309 ; <i64> [#uses=1]
+ %tmp13358 = sdiv i64 %tmp13354, %tmp13357 ; <i64> [#uses=1]
+ br label %bb13360
+
+bb13360: ; preds = %bb13351, %bb13345, %bb13339
+ %r1121.0 = phi i64 [ %tmp13358, %bb13351 ], [ 0, %bb13339 ], [ 4294836225, %bb13345 ] ; <i64> [#uses=1]
+ br i1 false, label %bb13402, label %bb13387
+
+bb13387: ; preds = %bb13360
+ br label %bb13402
+
+bb13402: ; preds = %bb13387, %bb13360
+ %r3123.0 = phi i64 [ 0, %bb13360 ], [ 4294836225, %bb13387 ] ; <i64> [#uses=1]
+ %tmp13404 = icmp eq i16 %tmp1322713228, -1 ; <i1> [#uses=1]
+ br i1 %tmp13404, label %bb13435, label %bb13407
+
+bb13407: ; preds = %bb13402
+ br label %bb13435
+
+bb13435: ; preds = %bb13407, %bb13402
+ %r0120.1 = phi i64 [ 0, %bb13407 ], [ %r0120.0, %bb13402 ] ; <i64> [#uses=0]
+ %r1121.1 = phi i64 [ 0, %bb13407 ], [ %r1121.0, %bb13402 ] ; <i64> [#uses=0]
+ %r3123.1 = phi i64 [ 0, %bb13407 ], [ %r3123.0, %bb13402 ] ; <i64> [#uses=0]
+ %tmp13450 = mul i64 0, %tmp13312 ; <i64> [#uses=0]
+ %tmp13455 = mul i64 0, %tmp13315 ; <i64> [#uses=0]
+ %tmp13461 = add i64 0, %tmp1329013291 ; <i64> [#uses=1]
+ %tmp13462 = mul i64 %tmp13461, 65535 ; <i64> [#uses=1]
+ %tmp13466 = sub i64 %tmp13462, 0 ; <i64> [#uses=1]
+ %tmp13526 = add i64 %tmp13466, 1 ; <i64> [#uses=1]
+ %tmp13527 = add i64 %tmp13526, 0 ; <i64> [#uses=1]
+ %tmp13528 = ashr i64 %tmp13527, 16 ; <i64> [#uses=4]
+ %tmp13536 = sub i64 %tmp13528, 0 ; <i64> [#uses=1]
+ %tmp13537 = shl i64 %tmp13536, 32 ; <i64> [#uses=1]
+ %tmp13538 = and i64 %tmp13537, 281470681743360 ; <i64> [#uses=1]
+ %tmp13542 = sub i64 %tmp13528, 0 ; <i64> [#uses=1]
+ %tmp13543 = shl i64 %tmp13542, 16 ; <i64> [#uses=1]
+ %tmp13544 = and i64 %tmp13543, 4294901760 ; <i64> [#uses=1]
+ %tmp13548 = sub i64 %tmp13528, 0 ; <i64> [#uses=1]
+ %tmp13549 = and i64 %tmp13548, 65535 ; <i64> [#uses=1]
+ %tmp13539 = or i64 %tmp13538, 0 ; <i64> [#uses=1]
+ %tmp13545 = or i64 %tmp13539, %tmp13549 ; <i64> [#uses=1]
+ %tmp13550 = or i64 %tmp13545, %tmp13544 ; <i64> [#uses=1]
+ %tmp1355213553 = trunc i64 %tmp13528 to i16 ; <i16> [#uses=1]
+ br label %bb13567
+
+bb13567: ; preds = %bb13435, %bb13236
+ %tsp1040.0.0 = phi i64 [ %tmp13550, %bb13435 ], [ %tmp13225, %bb13236 ] ; <i64> [#uses=0]
+ %tsp1040.1.0 = phi i16 [ %tmp1355213553, %bb13435 ], [ %tmp1322713228, %bb13236 ] ; <i16> [#uses=1]
+ br i1 %tmp13238, label %bb13088, label %bb13572
+
+bb13572: ; preds = %bb13567
+ store i16 %tsp1040.1.0, i16* null, align 2
+ br label %bb13088
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll b/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll
new file mode 100644
index 0000000..6e8e98d
--- /dev/null
+++ b/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86
+
+define i64 @t(i64 %maxIdleDuration) nounwind {
+ call void asm sideeffect "wrmsr", "{cx},A,~{dirflag},~{fpsr},~{flags}"( i32 416, i64 0 ) nounwind
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll b/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
new file mode 100644
index 0000000..a708224
--- /dev/null
+++ b/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jnp
+; rdar://5902801
+
+declare void @test2()
+
+define i32 @test(double %p) nounwind {
+ %tmp5 = fcmp uno double %p, 0.000000e+00
+ br i1 %tmp5, label %bb, label %UnifiedReturnBlock
+bb:
+ call void @test2()
+ ret i32 17
+UnifiedReturnBlock:
+ ret i32 42
+}
+
diff --git a/test/CodeGen/X86/2008-05-09-PHIElimBug.ll b/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
new file mode 100644
index 0000000..cea00760
--- /dev/null
+++ b/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86
+
+ %struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
+
+define fastcc void @t() nounwind {
+entry:
+ br i1 false, label %bb23816.preheader, label %bb23821
+
+bb23816.preheader: ; preds = %entry
+ %tmp23735 = and i32 0, 2 ; <i32> [#uses=0]
+ br label %bb23830
+
+bb23821: ; preds = %entry
+ br i1 false, label %bb23830, label %bb23827
+
+bb23827: ; preds = %bb23821
+ %tmp23829 = getelementptr %struct.V* null, i32 0, i32 42 ; <i32*> [#uses=0]
+ br label %bb23830
+
+bb23830: ; preds = %bb23827, %bb23821, %bb23816.preheader
+ %scaledInDst.2.reg2mem.5 = phi i8 [ undef, %bb23827 ], [ undef, %bb23821 ], [ undef, %bb23816.preheader ] ; <i8> [#uses=1]
+ %toBool35047 = icmp eq i8 %scaledInDst.2.reg2mem.5, 0 ; <i1> [#uses=1]
+ %bothcond39107 = or i1 %toBool35047, false ; <i1> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll b/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
new file mode 100644
index 0000000..5ceb546
--- /dev/null
+++ b/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define fastcc void @glgVectorFloatConversion() nounwind {
+ %tmp12745 = load <4 x float>* null, align 16 ; <<4 x float>> [#uses=1]
+ %tmp12773 = insertelement <4 x float> %tmp12745, float 1.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp12774 = insertelement <4 x float> %tmp12773, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp12775 = insertelement <4 x float> %tmp12774, float 1.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp12775, <4 x float>* null, align 16
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-05-12-tailmerge-5.ll b/test/CodeGen/X86/2008-05-12-tailmerge-5.ll
new file mode 100644
index 0000000..4852e89
--- /dev/null
+++ b/test/CodeGen/X86/2008-05-12-tailmerge-5.ll
@@ -0,0 +1,145 @@
+; RUN: llc < %s | grep abort | count 1
+; Calls to abort should all be merged
+
+; ModuleID = '5898899.c'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+ %struct.BoundaryAlignment = type { [3 x i8], i8, i16, i16, i8, [2 x i8] }
+
+define void @passing2(i64 %str.0, i64 %str.1, i16 signext %s, i32 %j, i8 signext %c, i16 signext %t, i16 signext %u, i8 signext %d) nounwind optsize {
+entry:
+ %str_addr = alloca %struct.BoundaryAlignment ; <%struct.BoundaryAlignment*> [#uses=7]
+ %s_addr = alloca i16 ; <i16*> [#uses=1]
+ %j_addr = alloca i32 ; <i32*> [#uses=2]
+ %c_addr = alloca i8 ; <i8*> [#uses=2]
+ %t_addr = alloca i16 ; <i16*> [#uses=2]
+ %u_addr = alloca i16 ; <i16*> [#uses=2]
+ %d_addr = alloca i8 ; <i8*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = bitcast %struct.BoundaryAlignment* %str_addr to { i64, i64 }* ; <{ i64, i64 }*> [#uses=1]
+ %tmp1 = getelementptr { i64, i64 }* %tmp, i32 0, i32 0 ; <i64*> [#uses=1]
+ store i64 %str.0, i64* %tmp1
+ %tmp2 = bitcast %struct.BoundaryAlignment* %str_addr to { i64, i64 }* ; <{ i64, i64 }*> [#uses=1]
+ %tmp3 = getelementptr { i64, i64 }* %tmp2, i32 0, i32 1 ; <i64*> [#uses=1]
+ %bc = bitcast i64* %tmp3 to i8* ; <i8*> [#uses=2]
+ %byte = trunc i64 %str.1 to i8 ; <i8> [#uses=1]
+ store i8 %byte, i8* %bc
+ %shft = lshr i64 %str.1, 8 ; <i64> [#uses=2]
+ %Loc = getelementptr i8* %bc, i32 1 ; <i8*> [#uses=2]
+ %byte4 = trunc i64 %shft to i8 ; <i8> [#uses=1]
+ store i8 %byte4, i8* %Loc
+ %shft5 = lshr i64 %shft, 8 ; <i64> [#uses=2]
+ %Loc6 = getelementptr i8* %Loc, i32 1 ; <i8*> [#uses=2]
+ %byte7 = trunc i64 %shft5 to i8 ; <i8> [#uses=1]
+ store i8 %byte7, i8* %Loc6
+ %shft8 = lshr i64 %shft5, 8 ; <i64> [#uses=2]
+ %Loc9 = getelementptr i8* %Loc6, i32 1 ; <i8*> [#uses=2]
+ %byte10 = trunc i64 %shft8 to i8 ; <i8> [#uses=1]
+ store i8 %byte10, i8* %Loc9
+ %shft11 = lshr i64 %shft8, 8 ; <i64> [#uses=0]
+ %Loc12 = getelementptr i8* %Loc9, i32 1 ; <i8*> [#uses=0]
+ store i16 %s, i16* %s_addr
+ store i32 %j, i32* %j_addr
+ store i8 %c, i8* %c_addr
+ store i16 %t, i16* %t_addr
+ store i16 %u, i16* %u_addr
+ store i8 %d, i8* %d_addr
+ %tmp13 = getelementptr %struct.BoundaryAlignment* %str_addr, i32 0, i32 0 ; <[3 x i8]*> [#uses=1]
+ %tmp1314 = bitcast [3 x i8]* %tmp13 to i32* ; <i32*> [#uses=1]
+ %tmp15 = load i32* %tmp1314, align 4 ; <i32> [#uses=1]
+ %tmp16 = shl i32 %tmp15, 14 ; <i32> [#uses=1]
+ %tmp17 = ashr i32 %tmp16, 23 ; <i32> [#uses=1]
+ %tmp1718 = trunc i32 %tmp17 to i16 ; <i16> [#uses=1]
+ %sextl = shl i16 %tmp1718, 7 ; <i16> [#uses=1]
+ %sextr = ashr i16 %sextl, 7 ; <i16> [#uses=2]
+ %sextl19 = shl i16 %sextr, 7 ; <i16> [#uses=1]
+ %sextr20 = ashr i16 %sextl19, 7 ; <i16> [#uses=0]
+ %sextl21 = shl i16 %sextr, 7 ; <i16> [#uses=1]
+ %sextr22 = ashr i16 %sextl21, 7 ; <i16> [#uses=1]
+ %sextr2223 = sext i16 %sextr22 to i32 ; <i32> [#uses=1]
+ %tmp24 = load i32* %j_addr, align 4 ; <i32> [#uses=1]
+ %tmp25 = icmp ne i32 %sextr2223, %tmp24 ; <i1> [#uses=1]
+ %tmp2526 = zext i1 %tmp25 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp2526, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb27
+
+bb: ; preds = %entry
+ call void (...)* @abort( ) noreturn nounwind
+ unreachable
+
+bb27: ; preds = %entry
+ %tmp28 = getelementptr %struct.BoundaryAlignment* %str_addr, i32 0, i32 1 ; <i8*> [#uses=1]
+ %tmp29 = load i8* %tmp28, align 4 ; <i8> [#uses=1]
+ %tmp30 = load i8* %c_addr, align 1 ; <i8> [#uses=1]
+ %tmp31 = icmp ne i8 %tmp29, %tmp30 ; <i1> [#uses=1]
+ %tmp3132 = zext i1 %tmp31 to i8 ; <i8> [#uses=1]
+ %toBool33 = icmp ne i8 %tmp3132, 0 ; <i1> [#uses=1]
+ br i1 %toBool33, label %bb34, label %bb35
+
+bb34: ; preds = %bb27
+ call void (...)* @abort( ) noreturn nounwind
+ unreachable
+
+bb35: ; preds = %bb27
+ %tmp36 = getelementptr %struct.BoundaryAlignment* %str_addr, i32 0, i32 2 ; <i16*> [#uses=1]
+ %tmp37 = load i16* %tmp36, align 4 ; <i16> [#uses=1]
+ %tmp38 = shl i16 %tmp37, 7 ; <i16> [#uses=1]
+ %tmp39 = ashr i16 %tmp38, 7 ; <i16> [#uses=1]
+ %sextl40 = shl i16 %tmp39, 7 ; <i16> [#uses=1]
+ %sextr41 = ashr i16 %sextl40, 7 ; <i16> [#uses=2]
+ %sextl42 = shl i16 %sextr41, 7 ; <i16> [#uses=1]
+ %sextr43 = ashr i16 %sextl42, 7 ; <i16> [#uses=0]
+ %sextl44 = shl i16 %sextr41, 7 ; <i16> [#uses=1]
+ %sextr45 = ashr i16 %sextl44, 7 ; <i16> [#uses=1]
+ %tmp46 = load i16* %t_addr, align 2 ; <i16> [#uses=1]
+ %tmp47 = icmp ne i16 %sextr45, %tmp46 ; <i1> [#uses=1]
+ %tmp4748 = zext i1 %tmp47 to i8 ; <i8> [#uses=1]
+ %toBool49 = icmp ne i8 %tmp4748, 0 ; <i1> [#uses=1]
+ br i1 %toBool49, label %bb50, label %bb51
+
+bb50: ; preds = %bb35
+ call void (...)* @abort( ) noreturn nounwind
+ unreachable
+
+bb51: ; preds = %bb35
+ %tmp52 = getelementptr %struct.BoundaryAlignment* %str_addr, i32 0, i32 3 ; <i16*> [#uses=1]
+ %tmp53 = load i16* %tmp52, align 4 ; <i16> [#uses=1]
+ %tmp54 = shl i16 %tmp53, 7 ; <i16> [#uses=1]
+ %tmp55 = ashr i16 %tmp54, 7 ; <i16> [#uses=1]
+ %sextl56 = shl i16 %tmp55, 7 ; <i16> [#uses=1]
+ %sextr57 = ashr i16 %sextl56, 7 ; <i16> [#uses=2]
+ %sextl58 = shl i16 %sextr57, 7 ; <i16> [#uses=1]
+ %sextr59 = ashr i16 %sextl58, 7 ; <i16> [#uses=0]
+ %sextl60 = shl i16 %sextr57, 7 ; <i16> [#uses=1]
+ %sextr61 = ashr i16 %sextl60, 7 ; <i16> [#uses=1]
+ %tmp62 = load i16* %u_addr, align 2 ; <i16> [#uses=1]
+ %tmp63 = icmp ne i16 %sextr61, %tmp62 ; <i1> [#uses=1]
+ %tmp6364 = zext i1 %tmp63 to i8 ; <i8> [#uses=1]
+ %toBool65 = icmp ne i8 %tmp6364, 0 ; <i1> [#uses=1]
+ br i1 %toBool65, label %bb66, label %bb67
+
+bb66: ; preds = %bb51
+ call void (...)* @abort( ) noreturn nounwind
+ unreachable
+
+bb67: ; preds = %bb51
+ %tmp68 = getelementptr %struct.BoundaryAlignment* %str_addr, i32 0, i32 4 ; <i8*> [#uses=1]
+ %tmp69 = load i8* %tmp68, align 4 ; <i8> [#uses=1]
+ %tmp70 = load i8* %d_addr, align 1 ; <i8> [#uses=1]
+ %tmp71 = icmp ne i8 %tmp69, %tmp70 ; <i1> [#uses=1]
+ %tmp7172 = zext i1 %tmp71 to i8 ; <i8> [#uses=1]
+ %toBool73 = icmp ne i8 %tmp7172, 0 ; <i1> [#uses=1]
+ br i1 %toBool73, label %bb74, label %bb75
+
+bb74: ; preds = %bb67
+ call void (...)* @abort( ) noreturn nounwind
+ unreachable
+
+bb75: ; preds = %bb67
+ br label %return
+
+return: ; preds = %bb75
+ ret void
+}
+
+declare void @abort(...) noreturn nounwind
diff --git a/test/CodeGen/X86/2008-05-21-CoalescerBug.ll b/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
new file mode 100644
index 0000000..9cf50f4
--- /dev/null
+++ b/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
@@ -0,0 +1,98 @@
+; RUN: llc < %s -march=x86 -O0 -fast-isel=false | grep mov | count 5
+; PR2343
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.VEC_basic_block_base = type { i32, i32, [1 x %struct.basic_block_def*] }
+ %struct.VEC_basic_block_gc = type { %struct.VEC_basic_block_base }
+ %struct.VEC_edge_base = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct.VEC_edge_gc = type { %struct.VEC_edge_base }
+ %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] }
+ %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base }
+ %struct.VEC_temp_slot_p_base = type { i32, i32, [1 x %struct.temp_slot*] }
+ %struct.VEC_temp_slot_p_gc = type { %struct.VEC_temp_slot_p_base }
+ %struct.VEC_tree_base = type { i32, i32, [1 x %struct.tree_node*] }
+ %struct.VEC_tree_gc = type { %struct.VEC_tree_base }
+ %struct.__sbuf = type { i8*, i32 }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.basic_block_def = type { %struct.tree_node*, %struct.VEC_edge_gc*, %struct.VEC_edge_gc*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_il_dependent, %struct.tree_node*, %struct.edge_prediction*, i64, i32, i32, i32, i32 }
+ %struct.basic_block_il_dependent = type { %struct.rtl_bb_info* }
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.block_symbol = type { [3 x %struct.cfg_stats_d], %struct.object_block*, i64 }
+ %struct.cfg_stats_d = type { i32 }
+ %struct.control_flow_graph = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.VEC_basic_block_gc*, i32, i32, i32, %struct.VEC_basic_block_gc*, i32 }
+ %struct.def_optype_d = type { %struct.def_optype_d*, %struct.tree_node** }
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.__sbuf*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.__sbuf, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.control_flow_graph*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.VEC_temp_slot_p_gc*, %struct.temp_slot*, %struct.var_refs_queue*, i32, i32, i32, i32, %struct.machine_function*, i32, i32, %struct.language_function*, %struct.htab*, %struct.rtx_def*, i32, i32, i32, %struct.__sbuf, %struct.VEC_tree_gc*, %struct.tree_node*, i8*, i8*, i8*, i8*, i8*, %struct.tree_node*, i8, i8, i8, i8, i8, i8 }
+ %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.language_function = type opaque
+ %struct.loop = type { i32, %struct.basic_block_def*, %struct.basic_block_def*, %llvm.dbg.anchor.type, i32, i32, i32, i32, %struct.loop**, i32, %struct.loop*, %struct.loop*, %struct.loop*, %struct.loop*, i8*, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound*, %struct.edge_def*, i32 }
+ %struct.machine_function = type opaque
+ %struct.maydef_optype_d = type { %struct.maydef_optype_d*, %struct.tree_node*, %struct.tree_node*, %struct.ssa_use_operand_d }
+ %struct.nb_iter_bound = type { %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound* }
+ %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* }
+ %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.rtl_bb_info = type { %struct.rtx_def*, %struct.rtx_def*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, %struct.rtx_def*, %struct.rtx_def*, i32 }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.section = type { %struct.unnamed_section }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.ssa_use_operand_d = type { %struct.ssa_use_operand_d*, %struct.ssa_use_operand_d*, %struct.tree_node*, %struct.tree_node** }
+ %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.bitmap_head_def*, i32, i8* }
+ %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.use_optype_d*, %struct.maydef_optype_d*, %struct.vuse_optype_d*, %struct.maydef_optype_d* }
+ %struct.temp_slot = type opaque
+ %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* }
+ %struct.tree_ann_d = type { %struct.stmt_ann_d }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl_common = type { %struct.tree_decl_minimal, %struct.tree_node*, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_minimal = type { %struct.tree_common, %struct.__sbuf, i32, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl_non_common = type { %struct.tree_decl_with_vis, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_with_rtl = type { %struct.tree_decl_common, %struct.rtx_def*, i32 }
+ %struct.tree_decl_with_vis = type { %struct.tree_decl_with_rtl, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 }
+ %struct.tree_function_decl = type { %struct.tree_decl_non_common, i8, i8, i64, %struct.function* }
+ %struct.tree_node = type { %struct.tree_function_decl }
+ %struct.u = type { %struct.block_symbol }
+ %struct.unnamed_section = type { %struct.cfg_stats_d, void (i8*)*, i8*, %struct.section* }
+ %struct.use_optype_d = type { %struct.use_optype_d*, %struct.ssa_use_operand_d }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.vuse_optype_d = type { %struct.vuse_optype_d*, %struct.tree_node*, %struct.ssa_use_operand_d }
[email protected] = appending global [1 x i8*] [ i8* bitcast (%struct.edge_def* (%struct.edge_def*, %struct.basic_block_def*)* @tree_redirect_edge_and_branch to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define %struct.edge_def* @tree_redirect_edge_and_branch(%struct.edge_def* %e1, %struct.basic_block_def* %dest2) nounwind {
+entry:
+ br label %bb497
+
+bb483: ; preds = %bb497
+ %tmp496 = load %struct.tree_node** null, align 4 ; <%struct.tree_node*> [#uses=1]
+ br label %bb497
+
+bb497: ; preds = %bb483, %entry
+ %cases.0 = phi %struct.tree_node* [ %tmp496, %bb483 ], [ null, %entry ] ; <%struct.tree_node*> [#uses=1]
+ %last.0 = phi %struct.tree_node* [ %cases.0, %bb483 ], [ undef, %entry ] ; <%struct.tree_node*> [#uses=1]
+ %foo = phi i1 [ 0, %bb483 ], [ 1, %entry ]
+ br i1 %foo, label %bb483, label %bb502
+
+bb502: ; preds = %bb497
+ br i1 %foo, label %bb507, label %bb841
+
+bb507: ; preds = %bb502
+ %tmp517 = getelementptr %struct.tree_node* %last.0, i32 0, i32 0 ; <%struct.tree_function_decl*> [#uses=1]
+ %tmp517518 = bitcast %struct.tree_function_decl* %tmp517 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1]
+ %tmp519 = getelementptr %struct.tree_common* %tmp517518, i32 0, i32 0 ; <%struct.tree_node**> [#uses=1]
+ store %struct.tree_node* null, %struct.tree_node** %tmp519, align 4
+ br label %bb841
+
+bb841: ; preds = %bb507, %bb502
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll b/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll
new file mode 100644
index 0000000..19a7354
--- /dev/null
+++ b/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movups | count 2
+
+define void @a(<4 x float>* %x) nounwind {
+entry:
+ %tmp2 = load <4 x float>* %x, align 1
+ %inv = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %tmp2)
+ store <4 x float> %inv, <4 x float>* %x, align 1
+ ret void
+}
+
+declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>)
diff --git a/test/CodeGen/X86/2008-05-28-CoalescerBug.ll b/test/CodeGen/X86/2008-05-28-CoalescerBug.ll
new file mode 100644
index 0000000..32bf8d4
--- /dev/null
+++ b/test/CodeGen/X86/2008-05-28-CoalescerBug.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; PR2289
+
+define void @_ada_ca11001() {
+entry:
+ %tmp59 = call i16 @ca11001_0__cartesian_assign( i8 zeroext 0, i8 zeroext 0, i16 undef ) ; <i16> [#uses=0]
+ unreachable
+}
+
+declare i16 @ca11001_0__cartesian_assign(i8 zeroext , i8 zeroext , i16)
diff --git a/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll b/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
new file mode 100644
index 0000000..f1a19ec
--- /dev/null
+++ b/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=local
+
+@_ZTVN10Evaluation10GridOutputILi3EEE = external constant [5 x i32 (...)*] ; <[5 x i32 (...)*]*> [#uses=1]
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i8* @_Znwm(i32)
+
+declare i8* @__cxa_begin_catch(i8*) nounwind
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ br i1 false, label %bb37, label %bb34
+
+bb34: ; preds = %entry
+ ret i32 1
+
+bb37: ; preds = %entry
+ %tmp12.i.i.i.i.i66 = invoke i8* @_Znwm( i32 12 )
+ to label %tmp12.i.i.i.i.i.noexc65 unwind label %lpad243 ; <i8*> [#uses=0]
+
+tmp12.i.i.i.i.i.noexc65: ; preds = %bb37
+ unreachable
+
+lpad243: ; preds = %bb37
+ %eh_ptr244 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1]
+ store i32 (...)** getelementptr ([5 x i32 (...)*]* @_ZTVN10Evaluation10GridOutputILi3EEE, i32 0, i32 2), i32 (...)*** null, align 8
+ %tmp133 = call i8* @__cxa_begin_catch( i8* %eh_ptr244 ) nounwind ; <i8*> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll b/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll
new file mode 100644
index 0000000..236b7cd
--- /dev/null
+++ b/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep subl | grep 24
+
+ %struct.argument_t = type { i8*, %struct.argument_t*, i32, %struct.ipc_type_t*, i32, void (...)*, void (...)*, void (...)*, void (...)*, void (...)*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, %struct.routine*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, i32, i32, i32, i32, i32, i32 }
+ %struct.ipc_type_t = type { i8*, %struct.ipc_type_t*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, %struct.ipc_type_t*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8* }
+ %struct.routine = type opaque
+@"\01LC" = external constant [11 x i8] ; <[11 x i8]*> [#uses=1]
+
+define i8* @InArgMsgField(%struct.argument_t* %arg, i8* %str) nounwind {
+entry:
+ %who = alloca [20 x i8] ; <[20 x i8]*> [#uses=1]
+ %who1 = getelementptr [20 x i8]* %who, i32 0, i32 0 ; <i8*> [#uses=2]
+ call void @llvm.memset.i32( i8* %who1, i8 0, i32 20, i32 1 )
+ call void @llvm.memcpy.i32( i8* %who1, i8* getelementptr ([11 x i8]* @"\01LC", i32 0, i32 0), i32 11, i32 1 )
+ unreachable
+}
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll b/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll
new file mode 100644
index 0000000..90af387
--- /dev/null
+++ b/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 | not grep movsd
+; RUN: llc < %s -march=x86 | grep movw
+; RUN: llc < %s -march=x86 | grep addw
+; These transforms are turned off for volatile loads and stores.
+; Check that they weren't turned off for all loads and stores!
+
+@atomic = global double 0.000000e+00 ; <double*> [#uses=1]
+@atomic2 = global double 0.000000e+00 ; <double*> [#uses=1]
+@ioport = global i32 0 ; <i32*> [#uses=1]
+@ioport2 = global i32 0 ; <i32*> [#uses=1]
+
+define i16 @f(i64 %x) {
+ %b = bitcast i64 %x to double ; <double> [#uses=1]
+ store double %b, double* @atomic
+ store double 0.000000e+00, double* @atomic2
+ %l = load i32* @ioport ; <i32> [#uses=1]
+ %t = trunc i32 %l to i16 ; <i16> [#uses=1]
+ %l2 = load i32* @ioport2 ; <i32> [#uses=1]
+ %tmp = lshr i32 %l2, 16 ; <i32> [#uses=1]
+ %t2 = trunc i32 %tmp to i16 ; <i16> [#uses=1]
+ %f = add i16 %t, %t2 ; <i16> [#uses=1]
+ ret i16 %f
+}
diff --git a/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll b/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll
new file mode 100644
index 0000000..500cd1f
--- /dev/null
+++ b/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 5
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movl | count 2
+
+@atomic = global double 0.000000e+00 ; <double*> [#uses=1]
+@atomic2 = global double 0.000000e+00 ; <double*> [#uses=1]
+@anything = global i64 0 ; <i64*> [#uses=1]
+@ioport = global i32 0 ; <i32*> [#uses=2]
+
+define i16 @f(i64 %x, double %y) {
+ %b = bitcast i64 %x to double ; <double> [#uses=1]
+ volatile store double %b, double* @atomic ; one processor operation only
+ volatile store double 0.000000e+00, double* @atomic2 ; one processor operation only
+ %b2 = bitcast double %y to i64 ; <i64> [#uses=1]
+ volatile store i64 %b2, i64* @anything ; may transform to store of double
+ %l = volatile load i32* @ioport ; must not narrow
+ %t = trunc i32 %l to i16 ; <i16> [#uses=1]
+ %l2 = volatile load i32* @ioport ; must not narrow
+ %tmp = lshr i32 %l2, 16 ; <i32> [#uses=1]
+ %t2 = trunc i32 %tmp to i16 ; <i16> [#uses=1]
+ %f = add i16 %t, %t2 ; <i16> [#uses=1]
+ ret i16 %f
+}
diff --git a/test/CodeGen/X86/2008-06-16-SubregsBug.ll b/test/CodeGen/X86/2008-06-16-SubregsBug.ll
new file mode 100644
index 0000000..4d4819a
--- /dev/null
+++ b/test/CodeGen/X86/2008-06-16-SubregsBug.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep mov | count 4
+
+define i16 @test(i16* %tmp179) nounwind {
+ %tmp180 = load i16* %tmp179, align 2 ; <i16> [#uses=2]
+ %tmp184 = and i16 %tmp180, -1024 ; <i16> [#uses=1]
+ %tmp186 = icmp eq i16 %tmp184, -32768 ; <i1> [#uses=1]
+ br i1 %tmp186, label %bb189, label %bb288
+
+bb189: ; preds = %0
+ ret i16 %tmp180
+
+bb288: ; preds = %0
+ ret i16 32
+}
diff --git a/test/CodeGen/X86/2008-06-18-BadShuffle.ll b/test/CodeGen/X86/2008-06-18-BadShuffle.ll
new file mode 100644
index 0000000..66f9065
--- /dev/null
+++ b/test/CodeGen/X86/2008-06-18-BadShuffle.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -mcpu=i386 -mattr=+sse2 | grep pinsrw
+
+; Test to make sure we actually insert the bottom element of the vector
+define <8 x i16> @a(<8 x i16> %a) nounwind {
+entry:
+ shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> < i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8 >
+ %add = add <8 x i16> %0, %a
+ ret <8 x i16> %add
+}
+
diff --git a/test/CodeGen/X86/2008-06-25-VecISelBug.ll b/test/CodeGen/X86/2008-06-25-VecISelBug.ll
new file mode 100644
index 0000000..72d1907
--- /dev/null
+++ b/test/CodeGen/X86/2008-06-25-VecISelBug.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep pslldq
+
+define void @t() nounwind {
+entry:
+ %tmp1 = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 0, i32 1, i32 4, i32 5 >
+ %tmp2 = insertelement <4 x float> %tmp1, float 1.000000e+00, i32 3
+ store <4 x float> %tmp2, <4 x float>* null, align 16
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll b/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll
new file mode 100644
index 0000000..46341fc
--- /dev/null
+++ b/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll
@@ -0,0 +1,99 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9
+
+ %struct.ogg_stream_state = type { i8*, i32, i32, i32, i32*, i64*, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 }
+ %struct.res_state = type { i32, i32, i32, i32, float*, float*, i32, i32 }
+ %struct.vorbis_comment = type { i8**, i32*, i32, i8* }
+
+declare i32 @strlen(i8*) nounwind readonly
+
+define i32 @res_init(%struct.res_state* %state, i32 %channels, i32 %outfreq, i32 %infreq, i32 %op1, ...) nounwind {
+entry:
+ br i1 false, label %bb95, label %bb
+
+bb: ; preds = %entry
+ br i1 false, label %bb95, label %bb24
+
+bb24: ; preds = %bb
+ br i1 false, label %bb40.preheader, label %bb26
+
+bb26: ; preds = %bb24
+ ret i32 -1
+
+bb40.preheader: ; preds = %bb24
+ br i1 false, label %bb39, label %bb49.outer
+
+bb39: ; preds = %bb39, %bb40.preheader
+ shl i32 0, 1 ; <i32>:0 [#uses=0]
+ br i1 false, label %bb39, label %bb49.outer
+
+bb49.outer: ; preds = %bb39, %bb40.preheader
+ getelementptr %struct.res_state* %state, i32 0, i32 3 ; <i32*>:1 [#uses=0]
+ getelementptr %struct.res_state* %state, i32 0, i32 7 ; <i32*>:2 [#uses=0]
+ %base10.1 = select i1 false, float* null, float* null ; <float*> [#uses=1]
+ br label %bb74
+
+bb69: ; preds = %bb74
+ br label %bb71
+
+bb71: ; preds = %bb74, %bb69
+ store float 0.000000e+00, float* null, align 4
+ add i32 0, 1 ; <i32>:3 [#uses=1]
+ %indvar.next137 = add i32 %indvar136, 1 ; <i32> [#uses=1]
+ br i1 false, label %bb74, label %bb73
+
+bb73: ; preds = %bb71
+ %.rec = add i32 %base10.2.ph.rec, 1 ; <i32> [#uses=2]
+ getelementptr float* %base10.1, i32 %.rec ; <float*>:4 [#uses=1]
+ br label %bb74
+
+bb74: ; preds = %bb73, %bb71, %bb49.outer
+ %N13.1.ph = phi i32 [ 0, %bb49.outer ], [ 0, %bb73 ], [ %N13.1.ph, %bb71 ] ; <i32> [#uses=1]
+ %dest12.2.ph = phi float* [ null, %bb49.outer ], [ %4, %bb73 ], [ %dest12.2.ph, %bb71 ] ; <float*> [#uses=1]
+ %x8.0.ph = phi i32 [ 0, %bb49.outer ], [ %3, %bb73 ], [ %x8.0.ph, %bb71 ] ; <i32> [#uses=1]
+ %base10.2.ph.rec = phi i32 [ 0, %bb49.outer ], [ %.rec, %bb73 ], [ %base10.2.ph.rec, %bb71 ] ; <i32> [#uses=2]
+ %indvar136 = phi i32 [ %indvar.next137, %bb71 ], [ 0, %bb73 ], [ 0, %bb49.outer ] ; <i32> [#uses=1]
+ br i1 false, label %bb71, label %bb69
+
+bb95: ; preds = %bb, %entry
+ ret i32 -1
+}
+
+define i32 @read_resampled(i8* %d, float** %buffer, i32 %samples) nounwind {
+entry:
+ br i1 false, label %bb17.preheader, label %bb30
+
+bb17.preheader: ; preds = %entry
+ load i32* null, align 4 ; <i32>:0 [#uses=0]
+ br label %bb16
+
+bb16: ; preds = %bb16, %bb17.preheader
+ %i1.036 = phi i32 [ 0, %bb17.preheader ], [ %1, %bb16 ] ; <i32> [#uses=1]
+ add i32 %i1.036, 1 ; <i32>:1 [#uses=2]
+ icmp ult i32 %1, 0 ; <i1>:2 [#uses=0]
+ br label %bb16
+
+bb30: ; preds = %entry
+ ret i32 0
+}
+
+define i32 @ogg_stream_reset_serialno(%struct.ogg_stream_state* %os, i32 %serialno) nounwind {
+entry:
+ unreachable
+}
+
+define void @vorbis_lsp_to_curve(float* %curve, i32* %map, i32 %n, i32 %ln, float* %lsp, i32 %m, float %amp, float %ampoffset) nounwind {
+entry:
+ unreachable
+}
+
+define i32 @vorbis_comment_query_count(%struct.vorbis_comment* %vc, i8* %tag) nounwind {
+entry:
+ %strlen = call i32 @strlen( i8* null ) ; <i32> [#uses=1]
+ %endptr = getelementptr i8* null, i32 %strlen ; <i8*> [#uses=0]
+ unreachable
+}
+
+define fastcc i32 @push(%struct.res_state* %state, float* %pool, i32* %poolfill, i32* %offset, float* %dest, i32 %dststep, float* %source, i32 %srcstep, i32 %srclen) nounwind {
+entry:
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll b/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll
new file mode 100644
index 0000000..1a786ef7
--- /dev/null
+++ b/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s | grep ax
+; PR2024
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define i32 @foo(i32 %A, i32 %B) nounwind section ".init.text" {
+entry:
+ tail call i32 @bar( i32 %A, i32 %B ) nounwind ; <i32>:0 [#uses=1]
+ ret i32 %0
+}
+
+declare i32 @bar(i32, i32)
diff --git a/test/CodeGen/X86/2008-07-11-SHLBy1.ll b/test/CodeGen/X86/2008-07-11-SHLBy1.ll
new file mode 100644
index 0000000..ff2b05f
--- /dev/null
+++ b/test/CodeGen/X86/2008-07-11-SHLBy1.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86-64 -o - | not grep shr
+define i128 @sl(i128 %x) {
+ %t = shl i128 %x, 1
+ ret i128 %t
+}
diff --git a/test/CodeGen/X86/2008-07-11-SpillerBug.ll b/test/CodeGen/X86/2008-07-11-SpillerBug.ll
new file mode 100644
index 0000000..cd99c0e
--- /dev/null
+++ b/test/CodeGen/X86/2008-07-11-SpillerBug.ll
@@ -0,0 +1,54 @@
+; RUN: llc < %s -march=x86 -relocation-model=static -disable-fp-elim -post-RA-scheduler=false -asm-verbose=0 | FileCheck %s
+; PR2536
+
+
+; CHECK: movw %cx
+; CHECK-NEXT: andl $65534, %
+; CHECK-NEXT: movl %
+; CHECK-NEXT: movl $17
+
+@g_5 = external global i16 ; <i16*> [#uses=2]
+@g_107 = external global i16 ; <i16*> [#uses=1]
+@g_229 = external global i32 ; <i32*> [#uses=1]
+@g_227 = external global i16 ; <i16*> [#uses=1]
+
+define i32 @func_54(i32 %p_55, i16 zeroext %p_56) nounwind {
+entry:
+ load i16* @g_5, align 2 ; <i16>:0 [#uses=1]
+ zext i16 %0 to i32 ; <i32>:1 [#uses=1]
+ %.mask = and i32 %1, 65534 ; <i32> [#uses=1]
+ icmp eq i32 %.mask, 0 ; <i1>:2 [#uses=1]
+ load i32* @g_229, align 4 ; <i32>:3 [#uses=1]
+ load i16* @g_227, align 2 ; <i16>:4 [#uses=1]
+ icmp eq i16 %4, 0 ; <i1>:5 [#uses=1]
+ load i16* @g_5, align 2 ; <i16>:6 [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb7.preheader, %entry
+ %indvar4 = phi i32 [ 0, %entry ], [ %indvar.next5, %bb7.preheader ] ; <i32> [#uses=1]
+ %p_56_addr.1.reg2mem.0 = phi i16 [ %p_56, %entry ], [ %p_56_addr.0, %bb7.preheader ] ; <i16> [#uses=2]
+ br i1 %2, label %bb7.preheader, label %bb5
+
+bb5: ; preds = %bb
+ store i16 %6, i16* @g_107, align 2
+ br label %bb7.preheader
+
+bb7.preheader: ; preds = %bb5, %bb
+ icmp eq i16 %p_56_addr.1.reg2mem.0, 0 ; <i1>:7 [#uses=1]
+ %.0 = select i1 %7, i32 1, i32 %3 ; <i32> [#uses=1]
+ urem i32 1, %.0 ; <i32>:8 [#uses=1]
+ icmp eq i32 %8, 0 ; <i1>:9 [#uses=1]
+ %.not = xor i1 %9, true ; <i1> [#uses=1]
+ %.not1 = xor i1 %5, true ; <i1> [#uses=1]
+ %brmerge = or i1 %.not, %.not1 ; <i1> [#uses=1]
+ %iftmp.6.0 = select i1 %brmerge, i32 3, i32 0 ; <i32> [#uses=1]
+ mul i32 %iftmp.6.0, %3 ; <i32>:10 [#uses=1]
+ icmp eq i32 %10, 0 ; <i1>:11 [#uses=1]
+ %p_56_addr.0 = select i1 %11, i16 %p_56_addr.1.reg2mem.0, i16 1 ; <i16> [#uses=1]
+ %indvar.next5 = add i32 %indvar4, 1 ; <i32> [#uses=2]
+ %exitcond6 = icmp eq i32 %indvar.next5, 17 ; <i1> [#uses=1]
+ br i1 %exitcond6, label %bb25, label %bb
+
+bb25: ; preds = %bb7.preheader
+ ret i32 1
+}
diff --git a/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll b/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll
new file mode 100644
index 0000000..f56604b
--- /dev/null
+++ b/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
+
+ %struct.SV = type { i8*, i64, i64 }
+@"\01LC25" = external constant [8 x i8] ; <[8 x i8]*> [#uses=1]
+
+declare void @Perl_sv_catpvf(%struct.SV*, i8*, ...) nounwind
+
+declare fastcc i64 @Perl_utf8n_to_uvuni(i8*, i64, i64*, i64) nounwind
+
+define fastcc i8* @Perl_pv_uni_display(%struct.SV* %dsv, i8* %spv, i64 %len, i64 %pvlim, i64 %flags) nounwind {
+entry:
+ br i1 false, label %bb, label %bb40
+
+bb: ; preds = %entry
+ tail call fastcc i64 @Perl_utf8n_to_uvuni( i8* null, i64 13, i64* null, i64 255 ) nounwind ; <i64>:0 [#uses=1]
+ br i1 false, label %bb6, label %bb33
+
+bb6: ; preds = %bb
+ br i1 false, label %bb30, label %bb31
+
+bb30: ; preds = %bb6
+ unreachable
+
+bb31: ; preds = %bb6
+ icmp eq i8 0, 0 ; <i1>:1 [#uses=0]
+ br label %bb33
+
+bb33: ; preds = %bb31, %bb
+ tail call void (%struct.SV*, i8*, ...)* @Perl_sv_catpvf( %struct.SV* %dsv, i8* getelementptr ([8 x i8]* @"\01LC25", i32 0, i64 0), i64 %0 ) nounwind
+ unreachable
+
+bb40: ; preds = %entry
+ ret i8* null
+}
diff --git a/test/CodeGen/X86/2008-07-19-movups-spills.ll b/test/CodeGen/X86/2008-07-19-movups-spills.ll
new file mode 100644
index 0000000..98919ee
--- /dev/null
+++ b/test/CodeGen/X86/2008-07-19-movups-spills.ll
@@ -0,0 +1,636 @@
+; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75
+; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 1
+; PR2539
+
+external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2]
+external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:2 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:3 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:4 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:5 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:6 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:7 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:8 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:9 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:10 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:11 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:12 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:13 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:14 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:15 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:16 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:17 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:18 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:19 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:20 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:21 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:22 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:23 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:24 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:25 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:26 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:27 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:28 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:29 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:30 [#uses=1]
+external global <4 x float>, align 1 ; <<4 x float>*>:31 [#uses=1]
+
+declare void @abort()
+
+define void @""() {
+ load <4 x float>* @0, align 1 ; <<4 x float>>:1 [#uses=2]
+ load <4 x float>* @1, align 1 ; <<4 x float>>:2 [#uses=3]
+ load <4 x float>* @2, align 1 ; <<4 x float>>:3 [#uses=4]
+ load <4 x float>* @3, align 1 ; <<4 x float>>:4 [#uses=5]
+ load <4 x float>* @4, align 1 ; <<4 x float>>:5 [#uses=6]
+ load <4 x float>* @5, align 1 ; <<4 x float>>:6 [#uses=7]
+ load <4 x float>* @6, align 1 ; <<4 x float>>:7 [#uses=8]
+ load <4 x float>* @7, align 1 ; <<4 x float>>:8 [#uses=9]
+ load <4 x float>* @8, align 1 ; <<4 x float>>:9 [#uses=10]
+ load <4 x float>* @9, align 1 ; <<4 x float>>:10 [#uses=11]
+ load <4 x float>* @10, align 1 ; <<4 x float>>:11 [#uses=12]
+ load <4 x float>* @11, align 1 ; <<4 x float>>:12 [#uses=13]
+ load <4 x float>* @12, align 1 ; <<4 x float>>:13 [#uses=14]
+ load <4 x float>* @13, align 1 ; <<4 x float>>:14 [#uses=15]
+ load <4 x float>* @14, align 1 ; <<4 x float>>:15 [#uses=16]
+ load <4 x float>* @15, align 1 ; <<4 x float>>:16 [#uses=17]
+ load <4 x float>* @16, align 1 ; <<4 x float>>:17 [#uses=18]
+ load <4 x float>* @17, align 1 ; <<4 x float>>:18 [#uses=19]
+ load <4 x float>* @18, align 1 ; <<4 x float>>:19 [#uses=20]
+ load <4 x float>* @19, align 1 ; <<4 x float>>:20 [#uses=21]
+ load <4 x float>* @20, align 1 ; <<4 x float>>:21 [#uses=22]
+ load <4 x float>* @21, align 1 ; <<4 x float>>:22 [#uses=23]
+ load <4 x float>* @22, align 1 ; <<4 x float>>:23 [#uses=24]
+ load <4 x float>* @23, align 1 ; <<4 x float>>:24 [#uses=25]
+ load <4 x float>* @24, align 1 ; <<4 x float>>:25 [#uses=26]
+ load <4 x float>* @25, align 1 ; <<4 x float>>:26 [#uses=27]
+ load <4 x float>* @26, align 1 ; <<4 x float>>:27 [#uses=28]
+ load <4 x float>* @27, align 1 ; <<4 x float>>:28 [#uses=29]
+ load <4 x float>* @28, align 1 ; <<4 x float>>:29 [#uses=30]
+ load <4 x float>* @29, align 1 ; <<4 x float>>:30 [#uses=31]
+ load <4 x float>* @30, align 1 ; <<4 x float>>:31 [#uses=32]
+ load <4 x float>* @31, align 1 ; <<4 x float>>:32 [#uses=33]
+ fmul <4 x float> %1, %1 ; <<4 x float>>:33 [#uses=1]
+ fmul <4 x float> %33, %2 ; <<4 x float>>:34 [#uses=1]
+ fmul <4 x float> %34, %3 ; <<4 x float>>:35 [#uses=1]
+ fmul <4 x float> %35, %4 ; <<4 x float>>:36 [#uses=1]
+ fmul <4 x float> %36, %5 ; <<4 x float>>:37 [#uses=1]
+ fmul <4 x float> %37, %6 ; <<4 x float>>:38 [#uses=1]
+ fmul <4 x float> %38, %7 ; <<4 x float>>:39 [#uses=1]
+ fmul <4 x float> %39, %8 ; <<4 x float>>:40 [#uses=1]
+ fmul <4 x float> %40, %9 ; <<4 x float>>:41 [#uses=1]
+ fmul <4 x float> %41, %10 ; <<4 x float>>:42 [#uses=1]
+ fmul <4 x float> %42, %11 ; <<4 x float>>:43 [#uses=1]
+ fmul <4 x float> %43, %12 ; <<4 x float>>:44 [#uses=1]
+ fmul <4 x float> %44, %13 ; <<4 x float>>:45 [#uses=1]
+ fmul <4 x float> %45, %14 ; <<4 x float>>:46 [#uses=1]
+ fmul <4 x float> %46, %15 ; <<4 x float>>:47 [#uses=1]
+ fmul <4 x float> %47, %16 ; <<4 x float>>:48 [#uses=1]
+ fmul <4 x float> %48, %17 ; <<4 x float>>:49 [#uses=1]
+ fmul <4 x float> %49, %18 ; <<4 x float>>:50 [#uses=1]
+ fmul <4 x float> %50, %19 ; <<4 x float>>:51 [#uses=1]
+ fmul <4 x float> %51, %20 ; <<4 x float>>:52 [#uses=1]
+ fmul <4 x float> %52, %21 ; <<4 x float>>:53 [#uses=1]
+ fmul <4 x float> %53, %22 ; <<4 x float>>:54 [#uses=1]
+ fmul <4 x float> %54, %23 ; <<4 x float>>:55 [#uses=1]
+ fmul <4 x float> %55, %24 ; <<4 x float>>:56 [#uses=1]
+ fmul <4 x float> %56, %25 ; <<4 x float>>:57 [#uses=1]
+ fmul <4 x float> %57, %26 ; <<4 x float>>:58 [#uses=1]
+ fmul <4 x float> %58, %27 ; <<4 x float>>:59 [#uses=1]
+ fmul <4 x float> %59, %28 ; <<4 x float>>:60 [#uses=1]
+ fmul <4 x float> %60, %29 ; <<4 x float>>:61 [#uses=1]
+ fmul <4 x float> %61, %30 ; <<4 x float>>:62 [#uses=1]
+ fmul <4 x float> %62, %31 ; <<4 x float>>:63 [#uses=1]
+ fmul <4 x float> %63, %32 ; <<4 x float>>:64 [#uses=3]
+ fmul <4 x float> %2, %2 ; <<4 x float>>:65 [#uses=1]
+ fmul <4 x float> %65, %3 ; <<4 x float>>:66 [#uses=1]
+ fmul <4 x float> %66, %4 ; <<4 x float>>:67 [#uses=1]
+ fmul <4 x float> %67, %5 ; <<4 x float>>:68 [#uses=1]
+ fmul <4 x float> %68, %6 ; <<4 x float>>:69 [#uses=1]
+ fmul <4 x float> %69, %7 ; <<4 x float>>:70 [#uses=1]
+ fmul <4 x float> %70, %8 ; <<4 x float>>:71 [#uses=1]
+ fmul <4 x float> %71, %9 ; <<4 x float>>:72 [#uses=1]
+ fmul <4 x float> %72, %10 ; <<4 x float>>:73 [#uses=1]
+ fmul <4 x float> %73, %11 ; <<4 x float>>:74 [#uses=1]
+ fmul <4 x float> %74, %12 ; <<4 x float>>:75 [#uses=1]
+ fmul <4 x float> %75, %13 ; <<4 x float>>:76 [#uses=1]
+ fmul <4 x float> %76, %14 ; <<4 x float>>:77 [#uses=1]
+ fmul <4 x float> %77, %15 ; <<4 x float>>:78 [#uses=1]
+ fmul <4 x float> %78, %16 ; <<4 x float>>:79 [#uses=1]
+ fmul <4 x float> %79, %17 ; <<4 x float>>:80 [#uses=1]
+ fmul <4 x float> %80, %18 ; <<4 x float>>:81 [#uses=1]
+ fmul <4 x float> %81, %19 ; <<4 x float>>:82 [#uses=1]
+ fmul <4 x float> %82, %20 ; <<4 x float>>:83 [#uses=1]
+ fmul <4 x float> %83, %21 ; <<4 x float>>:84 [#uses=1]
+ fmul <4 x float> %84, %22 ; <<4 x float>>:85 [#uses=1]
+ fmul <4 x float> %85, %23 ; <<4 x float>>:86 [#uses=1]
+ fmul <4 x float> %86, %24 ; <<4 x float>>:87 [#uses=1]
+ fmul <4 x float> %87, %25 ; <<4 x float>>:88 [#uses=1]
+ fmul <4 x float> %88, %26 ; <<4 x float>>:89 [#uses=1]
+ fmul <4 x float> %89, %27 ; <<4 x float>>:90 [#uses=1]
+ fmul <4 x float> %90, %28 ; <<4 x float>>:91 [#uses=1]
+ fmul <4 x float> %91, %29 ; <<4 x float>>:92 [#uses=1]
+ fmul <4 x float> %92, %30 ; <<4 x float>>:93 [#uses=1]
+ fmul <4 x float> %93, %31 ; <<4 x float>>:94 [#uses=1]
+ fmul <4 x float> %94, %32 ; <<4 x float>>:95 [#uses=1]
+ fmul <4 x float> %3, %3 ; <<4 x float>>:96 [#uses=1]
+ fmul <4 x float> %96, %4 ; <<4 x float>>:97 [#uses=1]
+ fmul <4 x float> %97, %5 ; <<4 x float>>:98 [#uses=1]
+ fmul <4 x float> %98, %6 ; <<4 x float>>:99 [#uses=1]
+ fmul <4 x float> %99, %7 ; <<4 x float>>:100 [#uses=1]
+ fmul <4 x float> %100, %8 ; <<4 x float>>:101 [#uses=1]
+ fmul <4 x float> %101, %9 ; <<4 x float>>:102 [#uses=1]
+ fmul <4 x float> %102, %10 ; <<4 x float>>:103 [#uses=1]
+ fmul <4 x float> %103, %11 ; <<4 x float>>:104 [#uses=1]
+ fmul <4 x float> %104, %12 ; <<4 x float>>:105 [#uses=1]
+ fmul <4 x float> %105, %13 ; <<4 x float>>:106 [#uses=1]
+ fmul <4 x float> %106, %14 ; <<4 x float>>:107 [#uses=1]
+ fmul <4 x float> %107, %15 ; <<4 x float>>:108 [#uses=1]
+ fmul <4 x float> %108, %16 ; <<4 x float>>:109 [#uses=1]
+ fmul <4 x float> %109, %17 ; <<4 x float>>:110 [#uses=1]
+ fmul <4 x float> %110, %18 ; <<4 x float>>:111 [#uses=1]
+ fmul <4 x float> %111, %19 ; <<4 x float>>:112 [#uses=1]
+ fmul <4 x float> %112, %20 ; <<4 x float>>:113 [#uses=1]
+ fmul <4 x float> %113, %21 ; <<4 x float>>:114 [#uses=1]
+ fmul <4 x float> %114, %22 ; <<4 x float>>:115 [#uses=1]
+ fmul <4 x float> %115, %23 ; <<4 x float>>:116 [#uses=1]
+ fmul <4 x float> %116, %24 ; <<4 x float>>:117 [#uses=1]
+ fmul <4 x float> %117, %25 ; <<4 x float>>:118 [#uses=1]
+ fmul <4 x float> %118, %26 ; <<4 x float>>:119 [#uses=1]
+ fmul <4 x float> %119, %27 ; <<4 x float>>:120 [#uses=1]
+ fmul <4 x float> %120, %28 ; <<4 x float>>:121 [#uses=1]
+ fmul <4 x float> %121, %29 ; <<4 x float>>:122 [#uses=1]
+ fmul <4 x float> %122, %30 ; <<4 x float>>:123 [#uses=1]
+ fmul <4 x float> %123, %31 ; <<4 x float>>:124 [#uses=1]
+ fmul <4 x float> %124, %32 ; <<4 x float>>:125 [#uses=1]
+ fmul <4 x float> %4, %4 ; <<4 x float>>:126 [#uses=1]
+ fmul <4 x float> %126, %5 ; <<4 x float>>:127 [#uses=1]
+ fmul <4 x float> %127, %6 ; <<4 x float>>:128 [#uses=1]
+ fmul <4 x float> %128, %7 ; <<4 x float>>:129 [#uses=1]
+ fmul <4 x float> %129, %8 ; <<4 x float>>:130 [#uses=1]
+ fmul <4 x float> %130, %9 ; <<4 x float>>:131 [#uses=1]
+ fmul <4 x float> %131, %10 ; <<4 x float>>:132 [#uses=1]
+ fmul <4 x float> %132, %11 ; <<4 x float>>:133 [#uses=1]
+ fmul <4 x float> %133, %12 ; <<4 x float>>:134 [#uses=1]
+ fmul <4 x float> %134, %13 ; <<4 x float>>:135 [#uses=1]
+ fmul <4 x float> %135, %14 ; <<4 x float>>:136 [#uses=1]
+ fmul <4 x float> %136, %15 ; <<4 x float>>:137 [#uses=1]
+ fmul <4 x float> %137, %16 ; <<4 x float>>:138 [#uses=1]
+ fmul <4 x float> %138, %17 ; <<4 x float>>:139 [#uses=1]
+ fmul <4 x float> %139, %18 ; <<4 x float>>:140 [#uses=1]
+ fmul <4 x float> %140, %19 ; <<4 x float>>:141 [#uses=1]
+ fmul <4 x float> %141, %20 ; <<4 x float>>:142 [#uses=1]
+ fmul <4 x float> %142, %21 ; <<4 x float>>:143 [#uses=1]
+ fmul <4 x float> %143, %22 ; <<4 x float>>:144 [#uses=1]
+ fmul <4 x float> %144, %23 ; <<4 x float>>:145 [#uses=1]
+ fmul <4 x float> %145, %24 ; <<4 x float>>:146 [#uses=1]
+ fmul <4 x float> %146, %25 ; <<4 x float>>:147 [#uses=1]
+ fmul <4 x float> %147, %26 ; <<4 x float>>:148 [#uses=1]
+ fmul <4 x float> %148, %27 ; <<4 x float>>:149 [#uses=1]
+ fmul <4 x float> %149, %28 ; <<4 x float>>:150 [#uses=1]
+ fmul <4 x float> %150, %29 ; <<4 x float>>:151 [#uses=1]
+ fmul <4 x float> %151, %30 ; <<4 x float>>:152 [#uses=1]
+ fmul <4 x float> %152, %31 ; <<4 x float>>:153 [#uses=1]
+ fmul <4 x float> %153, %32 ; <<4 x float>>:154 [#uses=1]
+ fmul <4 x float> %5, %5 ; <<4 x float>>:155 [#uses=1]
+ fmul <4 x float> %155, %6 ; <<4 x float>>:156 [#uses=1]
+ fmul <4 x float> %156, %7 ; <<4 x float>>:157 [#uses=1]
+ fmul <4 x float> %157, %8 ; <<4 x float>>:158 [#uses=1]
+ fmul <4 x float> %158, %9 ; <<4 x float>>:159 [#uses=1]
+ fmul <4 x float> %159, %10 ; <<4 x float>>:160 [#uses=1]
+ fmul <4 x float> %160, %11 ; <<4 x float>>:161 [#uses=1]
+ fmul <4 x float> %161, %12 ; <<4 x float>>:162 [#uses=1]
+ fmul <4 x float> %162, %13 ; <<4 x float>>:163 [#uses=1]
+ fmul <4 x float> %163, %14 ; <<4 x float>>:164 [#uses=1]
+ fmul <4 x float> %164, %15 ; <<4 x float>>:165 [#uses=1]
+ fmul <4 x float> %165, %16 ; <<4 x float>>:166 [#uses=1]
+ fmul <4 x float> %166, %17 ; <<4 x float>>:167 [#uses=1]
+ fmul <4 x float> %167, %18 ; <<4 x float>>:168 [#uses=1]
+ fmul <4 x float> %168, %19 ; <<4 x float>>:169 [#uses=1]
+ fmul <4 x float> %169, %20 ; <<4 x float>>:170 [#uses=1]
+ fmul <4 x float> %170, %21 ; <<4 x float>>:171 [#uses=1]
+ fmul <4 x float> %171, %22 ; <<4 x float>>:172 [#uses=1]
+ fmul <4 x float> %172, %23 ; <<4 x float>>:173 [#uses=1]
+ fmul <4 x float> %173, %24 ; <<4 x float>>:174 [#uses=1]
+ fmul <4 x float> %174, %25 ; <<4 x float>>:175 [#uses=1]
+ fmul <4 x float> %175, %26 ; <<4 x float>>:176 [#uses=1]
+ fmul <4 x float> %176, %27 ; <<4 x float>>:177 [#uses=1]
+ fmul <4 x float> %177, %28 ; <<4 x float>>:178 [#uses=1]
+ fmul <4 x float> %178, %29 ; <<4 x float>>:179 [#uses=1]
+ fmul <4 x float> %179, %30 ; <<4 x float>>:180 [#uses=1]
+ fmul <4 x float> %180, %31 ; <<4 x float>>:181 [#uses=1]
+ fmul <4 x float> %181, %32 ; <<4 x float>>:182 [#uses=1]
+ fmul <4 x float> %6, %6 ; <<4 x float>>:183 [#uses=1]
+ fmul <4 x float> %183, %7 ; <<4 x float>>:184 [#uses=1]
+ fmul <4 x float> %184, %8 ; <<4 x float>>:185 [#uses=1]
+ fmul <4 x float> %185, %9 ; <<4 x float>>:186 [#uses=1]
+ fmul <4 x float> %186, %10 ; <<4 x float>>:187 [#uses=1]
+ fmul <4 x float> %187, %11 ; <<4 x float>>:188 [#uses=1]
+ fmul <4 x float> %188, %12 ; <<4 x float>>:189 [#uses=1]
+ fmul <4 x float> %189, %13 ; <<4 x float>>:190 [#uses=1]
+ fmul <4 x float> %190, %14 ; <<4 x float>>:191 [#uses=1]
+ fmul <4 x float> %191, %15 ; <<4 x float>>:192 [#uses=1]
+ fmul <4 x float> %192, %16 ; <<4 x float>>:193 [#uses=1]
+ fmul <4 x float> %193, %17 ; <<4 x float>>:194 [#uses=1]
+ fmul <4 x float> %194, %18 ; <<4 x float>>:195 [#uses=1]
+ fmul <4 x float> %195, %19 ; <<4 x float>>:196 [#uses=1]
+ fmul <4 x float> %196, %20 ; <<4 x float>>:197 [#uses=1]
+ fmul <4 x float> %197, %21 ; <<4 x float>>:198 [#uses=1]
+ fmul <4 x float> %198, %22 ; <<4 x float>>:199 [#uses=1]
+ fmul <4 x float> %199, %23 ; <<4 x float>>:200 [#uses=1]
+ fmul <4 x float> %200, %24 ; <<4 x float>>:201 [#uses=1]
+ fmul <4 x float> %201, %25 ; <<4 x float>>:202 [#uses=1]
+ fmul <4 x float> %202, %26 ; <<4 x float>>:203 [#uses=1]
+ fmul <4 x float> %203, %27 ; <<4 x float>>:204 [#uses=1]
+ fmul <4 x float> %204, %28 ; <<4 x float>>:205 [#uses=1]
+ fmul <4 x float> %205, %29 ; <<4 x float>>:206 [#uses=1]
+ fmul <4 x float> %206, %30 ; <<4 x float>>:207 [#uses=1]
+ fmul <4 x float> %207, %31 ; <<4 x float>>:208 [#uses=1]
+ fmul <4 x float> %208, %32 ; <<4 x float>>:209 [#uses=1]
+ fmul <4 x float> %7, %7 ; <<4 x float>>:210 [#uses=1]
+ fmul <4 x float> %210, %8 ; <<4 x float>>:211 [#uses=1]
+ fmul <4 x float> %211, %9 ; <<4 x float>>:212 [#uses=1]
+ fmul <4 x float> %212, %10 ; <<4 x float>>:213 [#uses=1]
+ fmul <4 x float> %213, %11 ; <<4 x float>>:214 [#uses=1]
+ fmul <4 x float> %214, %12 ; <<4 x float>>:215 [#uses=1]
+ fmul <4 x float> %215, %13 ; <<4 x float>>:216 [#uses=1]
+ fmul <4 x float> %216, %14 ; <<4 x float>>:217 [#uses=1]
+ fmul <4 x float> %217, %15 ; <<4 x float>>:218 [#uses=1]
+ fmul <4 x float> %218, %16 ; <<4 x float>>:219 [#uses=1]
+ fmul <4 x float> %219, %17 ; <<4 x float>>:220 [#uses=1]
+ fmul <4 x float> %220, %18 ; <<4 x float>>:221 [#uses=1]
+ fmul <4 x float> %221, %19 ; <<4 x float>>:222 [#uses=1]
+ fmul <4 x float> %222, %20 ; <<4 x float>>:223 [#uses=1]
+ fmul <4 x float> %223, %21 ; <<4 x float>>:224 [#uses=1]
+ fmul <4 x float> %224, %22 ; <<4 x float>>:225 [#uses=1]
+ fmul <4 x float> %225, %23 ; <<4 x float>>:226 [#uses=1]
+ fmul <4 x float> %226, %24 ; <<4 x float>>:227 [#uses=1]
+ fmul <4 x float> %227, %25 ; <<4 x float>>:228 [#uses=1]
+ fmul <4 x float> %228, %26 ; <<4 x float>>:229 [#uses=1]
+ fmul <4 x float> %229, %27 ; <<4 x float>>:230 [#uses=1]
+ fmul <4 x float> %230, %28 ; <<4 x float>>:231 [#uses=1]
+ fmul <4 x float> %231, %29 ; <<4 x float>>:232 [#uses=1]
+ fmul <4 x float> %232, %30 ; <<4 x float>>:233 [#uses=1]
+ fmul <4 x float> %233, %31 ; <<4 x float>>:234 [#uses=1]
+ fmul <4 x float> %234, %32 ; <<4 x float>>:235 [#uses=1]
+ fmul <4 x float> %8, %8 ; <<4 x float>>:236 [#uses=1]
+ fmul <4 x float> %236, %9 ; <<4 x float>>:237 [#uses=1]
+ fmul <4 x float> %237, %10 ; <<4 x float>>:238 [#uses=1]
+ fmul <4 x float> %238, %11 ; <<4 x float>>:239 [#uses=1]
+ fmul <4 x float> %239, %12 ; <<4 x float>>:240 [#uses=1]
+ fmul <4 x float> %240, %13 ; <<4 x float>>:241 [#uses=1]
+ fmul <4 x float> %241, %14 ; <<4 x float>>:242 [#uses=1]
+ fmul <4 x float> %242, %15 ; <<4 x float>>:243 [#uses=1]
+ fmul <4 x float> %243, %16 ; <<4 x float>>:244 [#uses=1]
+ fmul <4 x float> %244, %17 ; <<4 x float>>:245 [#uses=1]
+ fmul <4 x float> %245, %18 ; <<4 x float>>:246 [#uses=1]
+ fmul <4 x float> %246, %19 ; <<4 x float>>:247 [#uses=1]
+ fmul <4 x float> %247, %20 ; <<4 x float>>:248 [#uses=1]
+ fmul <4 x float> %248, %21 ; <<4 x float>>:249 [#uses=1]
+ fmul <4 x float> %249, %22 ; <<4 x float>>:250 [#uses=1]
+ fmul <4 x float> %250, %23 ; <<4 x float>>:251 [#uses=1]
+ fmul <4 x float> %251, %24 ; <<4 x float>>:252 [#uses=1]
+ fmul <4 x float> %252, %25 ; <<4 x float>>:253 [#uses=1]
+ fmul <4 x float> %253, %26 ; <<4 x float>>:254 [#uses=1]
+ fmul <4 x float> %254, %27 ; <<4 x float>>:255 [#uses=1]
+ fmul <4 x float> %255, %28 ; <<4 x float>>:256 [#uses=1]
+ fmul <4 x float> %256, %29 ; <<4 x float>>:257 [#uses=1]
+ fmul <4 x float> %257, %30 ; <<4 x float>>:258 [#uses=1]
+ fmul <4 x float> %258, %31 ; <<4 x float>>:259 [#uses=1]
+ fmul <4 x float> %259, %32 ; <<4 x float>>:260 [#uses=1]
+ fmul <4 x float> %9, %9 ; <<4 x float>>:261 [#uses=1]
+ fmul <4 x float> %261, %10 ; <<4 x float>>:262 [#uses=1]
+ fmul <4 x float> %262, %11 ; <<4 x float>>:263 [#uses=1]
+ fmul <4 x float> %263, %12 ; <<4 x float>>:264 [#uses=1]
+ fmul <4 x float> %264, %13 ; <<4 x float>>:265 [#uses=1]
+ fmul <4 x float> %265, %14 ; <<4 x float>>:266 [#uses=1]
+ fmul <4 x float> %266, %15 ; <<4 x float>>:267 [#uses=1]
+ fmul <4 x float> %267, %16 ; <<4 x float>>:268 [#uses=1]
+ fmul <4 x float> %268, %17 ; <<4 x float>>:269 [#uses=1]
+ fmul <4 x float> %269, %18 ; <<4 x float>>:270 [#uses=1]
+ fmul <4 x float> %270, %19 ; <<4 x float>>:271 [#uses=1]
+ fmul <4 x float> %271, %20 ; <<4 x float>>:272 [#uses=1]
+ fmul <4 x float> %272, %21 ; <<4 x float>>:273 [#uses=1]
+ fmul <4 x float> %273, %22 ; <<4 x float>>:274 [#uses=1]
+ fmul <4 x float> %274, %23 ; <<4 x float>>:275 [#uses=1]
+ fmul <4 x float> %275, %24 ; <<4 x float>>:276 [#uses=1]
+ fmul <4 x float> %276, %25 ; <<4 x float>>:277 [#uses=1]
+ fmul <4 x float> %277, %26 ; <<4 x float>>:278 [#uses=1]
+ fmul <4 x float> %278, %27 ; <<4 x float>>:279 [#uses=1]
+ fmul <4 x float> %279, %28 ; <<4 x float>>:280 [#uses=1]
+ fmul <4 x float> %280, %29 ; <<4 x float>>:281 [#uses=1]
+ fmul <4 x float> %281, %30 ; <<4 x float>>:282 [#uses=1]
+ fmul <4 x float> %282, %31 ; <<4 x float>>:283 [#uses=1]
+ fmul <4 x float> %283, %32 ; <<4 x float>>:284 [#uses=1]
+ fmul <4 x float> %10, %10 ; <<4 x float>>:285 [#uses=1]
+ fmul <4 x float> %285, %11 ; <<4 x float>>:286 [#uses=1]
+ fmul <4 x float> %286, %12 ; <<4 x float>>:287 [#uses=1]
+ fmul <4 x float> %287, %13 ; <<4 x float>>:288 [#uses=1]
+ fmul <4 x float> %288, %14 ; <<4 x float>>:289 [#uses=1]
+ fmul <4 x float> %289, %15 ; <<4 x float>>:290 [#uses=1]
+ fmul <4 x float> %290, %16 ; <<4 x float>>:291 [#uses=1]
+ fmul <4 x float> %291, %17 ; <<4 x float>>:292 [#uses=1]
+ fmul <4 x float> %292, %18 ; <<4 x float>>:293 [#uses=1]
+ fmul <4 x float> %293, %19 ; <<4 x float>>:294 [#uses=1]
+ fmul <4 x float> %294, %20 ; <<4 x float>>:295 [#uses=1]
+ fmul <4 x float> %295, %21 ; <<4 x float>>:296 [#uses=1]
+ fmul <4 x float> %296, %22 ; <<4 x float>>:297 [#uses=1]
+ fmul <4 x float> %297, %23 ; <<4 x float>>:298 [#uses=1]
+ fmul <4 x float> %298, %24 ; <<4 x float>>:299 [#uses=1]
+ fmul <4 x float> %299, %25 ; <<4 x float>>:300 [#uses=1]
+ fmul <4 x float> %300, %26 ; <<4 x float>>:301 [#uses=1]
+ fmul <4 x float> %301, %27 ; <<4 x float>>:302 [#uses=1]
+ fmul <4 x float> %302, %28 ; <<4 x float>>:303 [#uses=1]
+ fmul <4 x float> %303, %29 ; <<4 x float>>:304 [#uses=1]
+ fmul <4 x float> %304, %30 ; <<4 x float>>:305 [#uses=1]
+ fmul <4 x float> %305, %31 ; <<4 x float>>:306 [#uses=1]
+ fmul <4 x float> %306, %32 ; <<4 x float>>:307 [#uses=1]
+ fmul <4 x float> %11, %11 ; <<4 x float>>:308 [#uses=1]
+ fmul <4 x float> %308, %12 ; <<4 x float>>:309 [#uses=1]
+ fmul <4 x float> %309, %13 ; <<4 x float>>:310 [#uses=1]
+ fmul <4 x float> %310, %14 ; <<4 x float>>:311 [#uses=1]
+ fmul <4 x float> %311, %15 ; <<4 x float>>:312 [#uses=1]
+ fmul <4 x float> %312, %16 ; <<4 x float>>:313 [#uses=1]
+ fmul <4 x float> %313, %17 ; <<4 x float>>:314 [#uses=1]
+ fmul <4 x float> %314, %18 ; <<4 x float>>:315 [#uses=1]
+ fmul <4 x float> %315, %19 ; <<4 x float>>:316 [#uses=1]
+ fmul <4 x float> %316, %20 ; <<4 x float>>:317 [#uses=1]
+ fmul <4 x float> %317, %21 ; <<4 x float>>:318 [#uses=1]
+ fmul <4 x float> %318, %22 ; <<4 x float>>:319 [#uses=1]
+ fmul <4 x float> %319, %23 ; <<4 x float>>:320 [#uses=1]
+ fmul <4 x float> %320, %24 ; <<4 x float>>:321 [#uses=1]
+ fmul <4 x float> %321, %25 ; <<4 x float>>:322 [#uses=1]
+ fmul <4 x float> %322, %26 ; <<4 x float>>:323 [#uses=1]
+ fmul <4 x float> %323, %27 ; <<4 x float>>:324 [#uses=1]
+ fmul <4 x float> %324, %28 ; <<4 x float>>:325 [#uses=1]
+ fmul <4 x float> %325, %29 ; <<4 x float>>:326 [#uses=1]
+ fmul <4 x float> %326, %30 ; <<4 x float>>:327 [#uses=1]
+ fmul <4 x float> %327, %31 ; <<4 x float>>:328 [#uses=1]
+ fmul <4 x float> %328, %32 ; <<4 x float>>:329 [#uses=1]
+ fmul <4 x float> %12, %12 ; <<4 x float>>:330 [#uses=1]
+ fmul <4 x float> %330, %13 ; <<4 x float>>:331 [#uses=1]
+ fmul <4 x float> %331, %14 ; <<4 x float>>:332 [#uses=1]
+ fmul <4 x float> %332, %15 ; <<4 x float>>:333 [#uses=1]
+ fmul <4 x float> %333, %16 ; <<4 x float>>:334 [#uses=1]
+ fmul <4 x float> %334, %17 ; <<4 x float>>:335 [#uses=1]
+ fmul <4 x float> %335, %18 ; <<4 x float>>:336 [#uses=1]
+ fmul <4 x float> %336, %19 ; <<4 x float>>:337 [#uses=1]
+ fmul <4 x float> %337, %20 ; <<4 x float>>:338 [#uses=1]
+ fmul <4 x float> %338, %21 ; <<4 x float>>:339 [#uses=1]
+ fmul <4 x float> %339, %22 ; <<4 x float>>:340 [#uses=1]
+ fmul <4 x float> %340, %23 ; <<4 x float>>:341 [#uses=1]
+ fmul <4 x float> %341, %24 ; <<4 x float>>:342 [#uses=1]
+ fmul <4 x float> %342, %25 ; <<4 x float>>:343 [#uses=1]
+ fmul <4 x float> %343, %26 ; <<4 x float>>:344 [#uses=1]
+ fmul <4 x float> %344, %27 ; <<4 x float>>:345 [#uses=1]
+ fmul <4 x float> %345, %28 ; <<4 x float>>:346 [#uses=1]
+ fmul <4 x float> %346, %29 ; <<4 x float>>:347 [#uses=1]
+ fmul <4 x float> %347, %30 ; <<4 x float>>:348 [#uses=1]
+ fmul <4 x float> %348, %31 ; <<4 x float>>:349 [#uses=1]
+ fmul <4 x float> %349, %32 ; <<4 x float>>:350 [#uses=1]
+ fmul <4 x float> %13, %13 ; <<4 x float>>:351 [#uses=1]
+ fmul <4 x float> %351, %14 ; <<4 x float>>:352 [#uses=1]
+ fmul <4 x float> %352, %15 ; <<4 x float>>:353 [#uses=1]
+ fmul <4 x float> %353, %16 ; <<4 x float>>:354 [#uses=1]
+ fmul <4 x float> %354, %17 ; <<4 x float>>:355 [#uses=1]
+ fmul <4 x float> %355, %18 ; <<4 x float>>:356 [#uses=1]
+ fmul <4 x float> %356, %19 ; <<4 x float>>:357 [#uses=1]
+ fmul <4 x float> %357, %20 ; <<4 x float>>:358 [#uses=1]
+ fmul <4 x float> %358, %21 ; <<4 x float>>:359 [#uses=1]
+ fmul <4 x float> %359, %22 ; <<4 x float>>:360 [#uses=1]
+ fmul <4 x float> %360, %23 ; <<4 x float>>:361 [#uses=1]
+ fmul <4 x float> %361, %24 ; <<4 x float>>:362 [#uses=1]
+ fmul <4 x float> %362, %25 ; <<4 x float>>:363 [#uses=1]
+ fmul <4 x float> %363, %26 ; <<4 x float>>:364 [#uses=1]
+ fmul <4 x float> %364, %27 ; <<4 x float>>:365 [#uses=1]
+ fmul <4 x float> %365, %28 ; <<4 x float>>:366 [#uses=1]
+ fmul <4 x float> %366, %29 ; <<4 x float>>:367 [#uses=1]
+ fmul <4 x float> %367, %30 ; <<4 x float>>:368 [#uses=1]
+ fmul <4 x float> %368, %31 ; <<4 x float>>:369 [#uses=1]
+ fmul <4 x float> %369, %32 ; <<4 x float>>:370 [#uses=1]
+ fmul <4 x float> %14, %14 ; <<4 x float>>:371 [#uses=1]
+ fmul <4 x float> %371, %15 ; <<4 x float>>:372 [#uses=1]
+ fmul <4 x float> %372, %16 ; <<4 x float>>:373 [#uses=1]
+ fmul <4 x float> %373, %17 ; <<4 x float>>:374 [#uses=1]
+ fmul <4 x float> %374, %18 ; <<4 x float>>:375 [#uses=1]
+ fmul <4 x float> %375, %19 ; <<4 x float>>:376 [#uses=1]
+ fmul <4 x float> %376, %20 ; <<4 x float>>:377 [#uses=1]
+ fmul <4 x float> %377, %21 ; <<4 x float>>:378 [#uses=1]
+ fmul <4 x float> %378, %22 ; <<4 x float>>:379 [#uses=1]
+ fmul <4 x float> %379, %23 ; <<4 x float>>:380 [#uses=1]
+ fmul <4 x float> %380, %24 ; <<4 x float>>:381 [#uses=1]
+ fmul <4 x float> %381, %25 ; <<4 x float>>:382 [#uses=1]
+ fmul <4 x float> %382, %26 ; <<4 x float>>:383 [#uses=1]
+ fmul <4 x float> %383, %27 ; <<4 x float>>:384 [#uses=1]
+ fmul <4 x float> %384, %28 ; <<4 x float>>:385 [#uses=1]
+ fmul <4 x float> %385, %29 ; <<4 x float>>:386 [#uses=1]
+ fmul <4 x float> %386, %30 ; <<4 x float>>:387 [#uses=1]
+ fmul <4 x float> %387, %31 ; <<4 x float>>:388 [#uses=1]
+ fmul <4 x float> %388, %32 ; <<4 x float>>:389 [#uses=1]
+ fmul <4 x float> %15, %15 ; <<4 x float>>:390 [#uses=1]
+ fmul <4 x float> %390, %16 ; <<4 x float>>:391 [#uses=1]
+ fmul <4 x float> %391, %17 ; <<4 x float>>:392 [#uses=1]
+ fmul <4 x float> %392, %18 ; <<4 x float>>:393 [#uses=1]
+ fmul <4 x float> %393, %19 ; <<4 x float>>:394 [#uses=1]
+ fmul <4 x float> %394, %20 ; <<4 x float>>:395 [#uses=1]
+ fmul <4 x float> %395, %21 ; <<4 x float>>:396 [#uses=1]
+ fmul <4 x float> %396, %22 ; <<4 x float>>:397 [#uses=1]
+ fmul <4 x float> %397, %23 ; <<4 x float>>:398 [#uses=1]
+ fmul <4 x float> %398, %24 ; <<4 x float>>:399 [#uses=1]
+ fmul <4 x float> %399, %25 ; <<4 x float>>:400 [#uses=1]
+ fmul <4 x float> %400, %26 ; <<4 x float>>:401 [#uses=1]
+ fmul <4 x float> %401, %27 ; <<4 x float>>:402 [#uses=1]
+ fmul <4 x float> %402, %28 ; <<4 x float>>:403 [#uses=1]
+ fmul <4 x float> %403, %29 ; <<4 x float>>:404 [#uses=1]
+ fmul <4 x float> %404, %30 ; <<4 x float>>:405 [#uses=1]
+ fmul <4 x float> %405, %31 ; <<4 x float>>:406 [#uses=1]
+ fmul <4 x float> %406, %32 ; <<4 x float>>:407 [#uses=1]
+ fmul <4 x float> %16, %16 ; <<4 x float>>:408 [#uses=1]
+ fmul <4 x float> %408, %17 ; <<4 x float>>:409 [#uses=1]
+ fmul <4 x float> %409, %18 ; <<4 x float>>:410 [#uses=1]
+ fmul <4 x float> %410, %19 ; <<4 x float>>:411 [#uses=1]
+ fmul <4 x float> %411, %20 ; <<4 x float>>:412 [#uses=1]
+ fmul <4 x float> %412, %21 ; <<4 x float>>:413 [#uses=1]
+ fmul <4 x float> %413, %22 ; <<4 x float>>:414 [#uses=1]
+ fmul <4 x float> %414, %23 ; <<4 x float>>:415 [#uses=1]
+ fmul <4 x float> %415, %24 ; <<4 x float>>:416 [#uses=1]
+ fmul <4 x float> %416, %25 ; <<4 x float>>:417 [#uses=1]
+ fmul <4 x float> %417, %26 ; <<4 x float>>:418 [#uses=1]
+ fmul <4 x float> %418, %27 ; <<4 x float>>:419 [#uses=1]
+ fmul <4 x float> %419, %28 ; <<4 x float>>:420 [#uses=1]
+ fmul <4 x float> %420, %29 ; <<4 x float>>:421 [#uses=1]
+ fmul <4 x float> %421, %30 ; <<4 x float>>:422 [#uses=1]
+ fmul <4 x float> %422, %31 ; <<4 x float>>:423 [#uses=1]
+ fmul <4 x float> %423, %32 ; <<4 x float>>:424 [#uses=1]
+ fmul <4 x float> %17, %17 ; <<4 x float>>:425 [#uses=1]
+ fmul <4 x float> %425, %18 ; <<4 x float>>:426 [#uses=1]
+ fmul <4 x float> %426, %19 ; <<4 x float>>:427 [#uses=1]
+ fmul <4 x float> %427, %20 ; <<4 x float>>:428 [#uses=1]
+ fmul <4 x float> %428, %21 ; <<4 x float>>:429 [#uses=1]
+ fmul <4 x float> %429, %22 ; <<4 x float>>:430 [#uses=1]
+ fmul <4 x float> %430, %23 ; <<4 x float>>:431 [#uses=1]
+ fmul <4 x float> %431, %24 ; <<4 x float>>:432 [#uses=1]
+ fmul <4 x float> %432, %25 ; <<4 x float>>:433 [#uses=1]
+ fmul <4 x float> %433, %26 ; <<4 x float>>:434 [#uses=1]
+ fmul <4 x float> %434, %27 ; <<4 x float>>:435 [#uses=1]
+ fmul <4 x float> %435, %28 ; <<4 x float>>:436 [#uses=1]
+ fmul <4 x float> %436, %29 ; <<4 x float>>:437 [#uses=1]
+ fmul <4 x float> %437, %30 ; <<4 x float>>:438 [#uses=1]
+ fmul <4 x float> %438, %31 ; <<4 x float>>:439 [#uses=1]
+ fmul <4 x float> %439, %32 ; <<4 x float>>:440 [#uses=1]
+ fmul <4 x float> %18, %18 ; <<4 x float>>:441 [#uses=1]
+ fmul <4 x float> %441, %19 ; <<4 x float>>:442 [#uses=1]
+ fmul <4 x float> %442, %20 ; <<4 x float>>:443 [#uses=1]
+ fmul <4 x float> %443, %21 ; <<4 x float>>:444 [#uses=1]
+ fmul <4 x float> %444, %22 ; <<4 x float>>:445 [#uses=1]
+ fmul <4 x float> %445, %23 ; <<4 x float>>:446 [#uses=1]
+ fmul <4 x float> %446, %24 ; <<4 x float>>:447 [#uses=1]
+ fmul <4 x float> %447, %25 ; <<4 x float>>:448 [#uses=1]
+ fmul <4 x float> %448, %26 ; <<4 x float>>:449 [#uses=1]
+ fmul <4 x float> %449, %27 ; <<4 x float>>:450 [#uses=1]
+ fmul <4 x float> %450, %28 ; <<4 x float>>:451 [#uses=1]
+ fmul <4 x float> %451, %29 ; <<4 x float>>:452 [#uses=1]
+ fmul <4 x float> %452, %30 ; <<4 x float>>:453 [#uses=1]
+ fmul <4 x float> %453, %31 ; <<4 x float>>:454 [#uses=1]
+ fmul <4 x float> %454, %32 ; <<4 x float>>:455 [#uses=1]
+ fmul <4 x float> %19, %19 ; <<4 x float>>:456 [#uses=1]
+ fmul <4 x float> %456, %20 ; <<4 x float>>:457 [#uses=1]
+ fmul <4 x float> %457, %21 ; <<4 x float>>:458 [#uses=1]
+ fmul <4 x float> %458, %22 ; <<4 x float>>:459 [#uses=1]
+ fmul <4 x float> %459, %23 ; <<4 x float>>:460 [#uses=1]
+ fmul <4 x float> %460, %24 ; <<4 x float>>:461 [#uses=1]
+ fmul <4 x float> %461, %25 ; <<4 x float>>:462 [#uses=1]
+ fmul <4 x float> %462, %26 ; <<4 x float>>:463 [#uses=1]
+ fmul <4 x float> %463, %27 ; <<4 x float>>:464 [#uses=1]
+ fmul <4 x float> %464, %28 ; <<4 x float>>:465 [#uses=1]
+ fmul <4 x float> %465, %29 ; <<4 x float>>:466 [#uses=1]
+ fmul <4 x float> %466, %30 ; <<4 x float>>:467 [#uses=1]
+ fmul <4 x float> %467, %31 ; <<4 x float>>:468 [#uses=1]
+ fmul <4 x float> %468, %32 ; <<4 x float>>:469 [#uses=1]
+ fmul <4 x float> %20, %20 ; <<4 x float>>:470 [#uses=1]
+ fmul <4 x float> %470, %21 ; <<4 x float>>:471 [#uses=1]
+ fmul <4 x float> %471, %22 ; <<4 x float>>:472 [#uses=1]
+ fmul <4 x float> %472, %23 ; <<4 x float>>:473 [#uses=1]
+ fmul <4 x float> %473, %24 ; <<4 x float>>:474 [#uses=1]
+ fmul <4 x float> %474, %25 ; <<4 x float>>:475 [#uses=1]
+ fmul <4 x float> %475, %26 ; <<4 x float>>:476 [#uses=1]
+ fmul <4 x float> %476, %27 ; <<4 x float>>:477 [#uses=1]
+ fmul <4 x float> %477, %28 ; <<4 x float>>:478 [#uses=1]
+ fmul <4 x float> %478, %29 ; <<4 x float>>:479 [#uses=1]
+ fmul <4 x float> %479, %30 ; <<4 x float>>:480 [#uses=1]
+ fmul <4 x float> %480, %31 ; <<4 x float>>:481 [#uses=1]
+ fmul <4 x float> %481, %32 ; <<4 x float>>:482 [#uses=1]
+ fmul <4 x float> %21, %21 ; <<4 x float>>:483 [#uses=1]
+ fmul <4 x float> %483, %22 ; <<4 x float>>:484 [#uses=1]
+ fmul <4 x float> %484, %23 ; <<4 x float>>:485 [#uses=1]
+ fmul <4 x float> %485, %24 ; <<4 x float>>:486 [#uses=1]
+ fmul <4 x float> %486, %25 ; <<4 x float>>:487 [#uses=1]
+ fmul <4 x float> %487, %26 ; <<4 x float>>:488 [#uses=1]
+ fmul <4 x float> %488, %27 ; <<4 x float>>:489 [#uses=1]
+ fmul <4 x float> %489, %28 ; <<4 x float>>:490 [#uses=1]
+ fmul <4 x float> %490, %29 ; <<4 x float>>:491 [#uses=1]
+ fmul <4 x float> %491, %30 ; <<4 x float>>:492 [#uses=1]
+ fmul <4 x float> %492, %31 ; <<4 x float>>:493 [#uses=1]
+ fmul <4 x float> %493, %32 ; <<4 x float>>:494 [#uses=1]
+ fmul <4 x float> %22, %22 ; <<4 x float>>:495 [#uses=1]
+ fmul <4 x float> %495, %23 ; <<4 x float>>:496 [#uses=1]
+ fmul <4 x float> %496, %24 ; <<4 x float>>:497 [#uses=1]
+ fmul <4 x float> %497, %25 ; <<4 x float>>:498 [#uses=1]
+ fmul <4 x float> %498, %26 ; <<4 x float>>:499 [#uses=1]
+ fmul <4 x float> %499, %27 ; <<4 x float>>:500 [#uses=1]
+ fmul <4 x float> %500, %28 ; <<4 x float>>:501 [#uses=1]
+ fmul <4 x float> %501, %29 ; <<4 x float>>:502 [#uses=1]
+ fmul <4 x float> %502, %30 ; <<4 x float>>:503 [#uses=1]
+ fmul <4 x float> %503, %31 ; <<4 x float>>:504 [#uses=1]
+ fmul <4 x float> %504, %32 ; <<4 x float>>:505 [#uses=1]
+ fmul <4 x float> %23, %23 ; <<4 x float>>:506 [#uses=1]
+ fmul <4 x float> %506, %24 ; <<4 x float>>:507 [#uses=1]
+ fmul <4 x float> %507, %25 ; <<4 x float>>:508 [#uses=1]
+ fmul <4 x float> %508, %26 ; <<4 x float>>:509 [#uses=1]
+ fmul <4 x float> %509, %27 ; <<4 x float>>:510 [#uses=1]
+ fmul <4 x float> %510, %28 ; <<4 x float>>:511 [#uses=1]
+ fmul <4 x float> %511, %29 ; <<4 x float>>:512 [#uses=1]
+ fmul <4 x float> %512, %30 ; <<4 x float>>:513 [#uses=1]
+ fmul <4 x float> %513, %31 ; <<4 x float>>:514 [#uses=1]
+ fmul <4 x float> %514, %32 ; <<4 x float>>:515 [#uses=1]
+ fmul <4 x float> %24, %24 ; <<4 x float>>:516 [#uses=1]
+ fmul <4 x float> %516, %25 ; <<4 x float>>:517 [#uses=1]
+ fmul <4 x float> %517, %26 ; <<4 x float>>:518 [#uses=1]
+ fmul <4 x float> %518, %27 ; <<4 x float>>:519 [#uses=1]
+ fmul <4 x float> %519, %28 ; <<4 x float>>:520 [#uses=1]
+ fmul <4 x float> %520, %29 ; <<4 x float>>:521 [#uses=1]
+ fmul <4 x float> %521, %30 ; <<4 x float>>:522 [#uses=1]
+ fmul <4 x float> %522, %31 ; <<4 x float>>:523 [#uses=1]
+ fmul <4 x float> %523, %32 ; <<4 x float>>:524 [#uses=1]
+ fmul <4 x float> %25, %25 ; <<4 x float>>:525 [#uses=1]
+ fmul <4 x float> %525, %26 ; <<4 x float>>:526 [#uses=1]
+ fmul <4 x float> %526, %27 ; <<4 x float>>:527 [#uses=1]
+ fmul <4 x float> %527, %28 ; <<4 x float>>:528 [#uses=1]
+ fmul <4 x float> %528, %29 ; <<4 x float>>:529 [#uses=1]
+ fmul <4 x float> %529, %30 ; <<4 x float>>:530 [#uses=1]
+ fmul <4 x float> %530, %31 ; <<4 x float>>:531 [#uses=1]
+ fmul <4 x float> %531, %32 ; <<4 x float>>:532 [#uses=1]
+ fmul <4 x float> %26, %26 ; <<4 x float>>:533 [#uses=1]
+ fmul <4 x float> %533, %27 ; <<4 x float>>:534 [#uses=1]
+ fmul <4 x float> %534, %28 ; <<4 x float>>:535 [#uses=1]
+ fmul <4 x float> %535, %29 ; <<4 x float>>:536 [#uses=1]
+ fmul <4 x float> %536, %30 ; <<4 x float>>:537 [#uses=1]
+ fmul <4 x float> %537, %31 ; <<4 x float>>:538 [#uses=1]
+ fmul <4 x float> %538, %32 ; <<4 x float>>:539 [#uses=1]
+ fmul <4 x float> %27, %27 ; <<4 x float>>:540 [#uses=1]
+ fmul <4 x float> %540, %28 ; <<4 x float>>:541 [#uses=1]
+ fmul <4 x float> %541, %29 ; <<4 x float>>:542 [#uses=1]
+ fmul <4 x float> %542, %30 ; <<4 x float>>:543 [#uses=1]
+ fmul <4 x float> %543, %31 ; <<4 x float>>:544 [#uses=1]
+ fmul <4 x float> %544, %32 ; <<4 x float>>:545 [#uses=1]
+ fmul <4 x float> %28, %28 ; <<4 x float>>:546 [#uses=1]
+ fmul <4 x float> %546, %29 ; <<4 x float>>:547 [#uses=1]
+ fmul <4 x float> %547, %30 ; <<4 x float>>:548 [#uses=1]
+ fmul <4 x float> %548, %31 ; <<4 x float>>:549 [#uses=1]
+ fmul <4 x float> %549, %32 ; <<4 x float>>:550 [#uses=1]
+ fmul <4 x float> %29, %29 ; <<4 x float>>:551 [#uses=1]
+ fmul <4 x float> %551, %30 ; <<4 x float>>:552 [#uses=1]
+ fmul <4 x float> %552, %31 ; <<4 x float>>:553 [#uses=1]
+ fmul <4 x float> %553, %32 ; <<4 x float>>:554 [#uses=1]
+ fmul <4 x float> %30, %30 ; <<4 x float>>:555 [#uses=1]
+ fmul <4 x float> %555, %31 ; <<4 x float>>:556 [#uses=1]
+ fmul <4 x float> %556, %32 ; <<4 x float>>:557 [#uses=1]
+ fmul <4 x float> %31, %31 ; <<4 x float>>:558 [#uses=1]
+ fmul <4 x float> %558, %32 ; <<4 x float>>:559 [#uses=1]
+ fmul <4 x float> %32, %32 ; <<4 x float>>:560 [#uses=1]
+ fadd <4 x float> %64, %64 ; <<4 x float>>:561 [#uses=1]
+ fadd <4 x float> %561, %64 ; <<4 x float>>:562 [#uses=1]
+ fadd <4 x float> %562, %95 ; <<4 x float>>:563 [#uses=1]
+ fadd <4 x float> %563, %125 ; <<4 x float>>:564 [#uses=1]
+ fadd <4 x float> %564, %154 ; <<4 x float>>:565 [#uses=1]
+ fadd <4 x float> %565, %182 ; <<4 x float>>:566 [#uses=1]
+ fadd <4 x float> %566, %209 ; <<4 x float>>:567 [#uses=1]
+ fadd <4 x float> %567, %235 ; <<4 x float>>:568 [#uses=1]
+ fadd <4 x float> %568, %260 ; <<4 x float>>:569 [#uses=1]
+ fadd <4 x float> %569, %284 ; <<4 x float>>:570 [#uses=1]
+ fadd <4 x float> %570, %307 ; <<4 x float>>:571 [#uses=1]
+ fadd <4 x float> %571, %329 ; <<4 x float>>:572 [#uses=1]
+ fadd <4 x float> %572, %350 ; <<4 x float>>:573 [#uses=1]
+ fadd <4 x float> %573, %370 ; <<4 x float>>:574 [#uses=1]
+ fadd <4 x float> %574, %389 ; <<4 x float>>:575 [#uses=1]
+ fadd <4 x float> %575, %407 ; <<4 x float>>:576 [#uses=1]
+ fadd <4 x float> %576, %424 ; <<4 x float>>:577 [#uses=1]
+ fadd <4 x float> %577, %440 ; <<4 x float>>:578 [#uses=1]
+ fadd <4 x float> %578, %455 ; <<4 x float>>:579 [#uses=1]
+ fadd <4 x float> %579, %469 ; <<4 x float>>:580 [#uses=1]
+ fadd <4 x float> %580, %482 ; <<4 x float>>:581 [#uses=1]
+ fadd <4 x float> %581, %494 ; <<4 x float>>:582 [#uses=1]
+ fadd <4 x float> %582, %505 ; <<4 x float>>:583 [#uses=1]
+ fadd <4 x float> %583, %515 ; <<4 x float>>:584 [#uses=1]
+ fadd <4 x float> %584, %524 ; <<4 x float>>:585 [#uses=1]
+ fadd <4 x float> %585, %532 ; <<4 x float>>:586 [#uses=1]
+ fadd <4 x float> %586, %539 ; <<4 x float>>:587 [#uses=1]
+ fadd <4 x float> %587, %545 ; <<4 x float>>:588 [#uses=1]
+ fadd <4 x float> %588, %550 ; <<4 x float>>:589 [#uses=1]
+ fadd <4 x float> %589, %554 ; <<4 x float>>:590 [#uses=1]
+ fadd <4 x float> %590, %557 ; <<4 x float>>:591 [#uses=1]
+ fadd <4 x float> %591, %559 ; <<4 x float>>:592 [#uses=1]
+ fadd <4 x float> %592, %560 ; <<4 x float>>:593 [#uses=1]
+ store <4 x float> %593, <4 x float>* @0, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-07-22-CombinerCrash.ll b/test/CodeGen/X86/2008-07-22-CombinerCrash.ll
new file mode 100644
index 0000000..0f67145
--- /dev/null
+++ b/test/CodeGen/X86/2008-07-22-CombinerCrash.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; PR2566
+
+external global i16 ; <i16*>:0 [#uses=1]
+external global <4 x i16> ; <<4 x i16>*>:1 [#uses=1]
+
+declare void @abort()
+
+define void @t() nounwind {
+ load i16* @0 ; <i16>:1 [#uses=1]
+ zext i16 %1 to i64 ; <i64>:2 [#uses=1]
+ bitcast i64 %2 to <4 x i16> ; <<4 x i16>>:3 [#uses=1]
+ shufflevector <4 x i16> %3, <4 x i16> undef, <4 x i32> zeroinitializer ; <<4 x i16>>:4 [#uses=1]
+ store <4 x i16> %4, <4 x i16>* @1
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-07-23-VSetCC.ll b/test/CodeGen/X86/2008-07-23-VSetCC.ll
new file mode 100644
index 0000000..684ca5c
--- /dev/null
+++ b/test/CodeGen/X86/2008-07-23-VSetCC.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=x86 -mcpu=pentium
+; PR2575
+
+define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
+ br i1 false, label %bb.nph, label %._crit_edge
+
+bb.nph: ; preds = %bb.nph, %0
+ %X = icmp sgt <4 x i32> zeroinitializer, < i32 -128, i32 -128, i32 -128, i32 -128 > ; <<4 x i32>>:1 [#uses=1]
+ sext <4 x i1> %X to <4 x i32>
+ extractelement <4 x i32> %1, i32 3 ; <i32>:2 [#uses=1]
+ lshr i32 %2, 31 ; <i32>:3 [#uses=1]
+ trunc i32 %3 to i1 ; <i1>:4 [#uses=1]
+ select i1 %4, i32 -1, i32 0 ; <i32>:5 [#uses=1]
+ insertelement <4 x i32> zeroinitializer, i32 %5, i32 3 ; <<4 x i32>>:6 [#uses=1]
+ and <4 x i32> zeroinitializer, %6 ; <<4 x i32>>:7 [#uses=1]
+ bitcast <4 x i32> %7 to <4 x float> ; <<4 x float>>:8 [#uses=1]
+ fmul <4 x float> zeroinitializer, %8 ; <<4 x float>>:9 [#uses=1]
+ bitcast <4 x float> %9 to <4 x i32> ; <<4 x i32>>:10 [#uses=1]
+ or <4 x i32> %10, zeroinitializer ; <<4 x i32>>:11 [#uses=1]
+ bitcast <4 x i32> %11 to <4 x float> ; <<4 x float>>:12 [#uses=1]
+ fmul <4 x float> %12, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 > ; <<4 x float>>:13 [#uses=1]
+ fsub <4 x float> %13, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 > ; <<4 x float>>:14 [#uses=1]
+ extractelement <4 x float> %14, i32 3 ; <float>:15 [#uses=1]
+ call float @fmaxf( float 0.000000e+00, float %15 ) ; <float>:16 [#uses=0]
+ br label %bb.nph
+
+._crit_edge: ; preds = %0
+ ret void
+}
+
+
+declare float @fmaxf(float, float)
diff --git a/test/CodeGen/X86/2008-08-05-SpillerBug.ll b/test/CodeGen/X86/2008-08-05-SpillerBug.ll
new file mode 100644
index 0000000..67e14ff
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-05-SpillerBug.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -disable-fp-elim -stats |& grep asm-printer | grep 58
+; PR2568
+
+@g_3 = external global i16 ; <i16*> [#uses=1]
+@g_5 = external global i32 ; <i32*> [#uses=3]
+
+declare i32 @func_15(i16 signext , i16 signext , i32) nounwind
+
+define void @func_9_entry_2E_ce(i8 %p_11) nounwind {
+newFuncRoot:
+ br label %entry.ce
+
+entry.ce.ret.exitStub: ; preds = %entry.ce
+ ret void
+
+entry.ce: ; preds = %newFuncRoot
+ load i16* @g_3, align 2 ; <i16>:0 [#uses=1]
+ icmp sgt i16 %0, 0 ; <i1>:1 [#uses=1]
+ zext i1 %1 to i32 ; <i32>:2 [#uses=1]
+ load i32* @g_5, align 4 ; <i32>:3 [#uses=4]
+ icmp ugt i32 %2, %3 ; <i1>:4 [#uses=1]
+ zext i1 %4 to i32 ; <i32>:5 [#uses=1]
+ icmp eq i32 %3, 0 ; <i1>:6 [#uses=1]
+ %.0 = select i1 %6, i32 1, i32 %3 ; <i32> [#uses=1]
+ urem i32 1, %.0 ; <i32>:7 [#uses=2]
+ sext i8 %p_11 to i16 ; <i16>:8 [#uses=1]
+ trunc i32 %3 to i16 ; <i16>:9 [#uses=1]
+ tail call i32 @func_15( i16 signext %8, i16 signext %9, i32 1 ) nounwind ; <i32>:10 [#uses=0]
+ load i32* @g_5, align 4 ; <i32>:11 [#uses=1]
+ trunc i32 %11 to i16 ; <i16>:12 [#uses=1]
+ tail call i32 @func_15( i16 signext %12, i16 signext 1, i32 %7 ) nounwind ; <i32>:13 [#uses=0]
+ sext i8 %p_11 to i32 ; <i32>:14 [#uses=1]
+ %p_11.lobit = lshr i8 %p_11, 7 ; <i8> [#uses=1]
+ %tmp = zext i8 %p_11.lobit to i32 ; <i32> [#uses=1]
+ %tmp.not = xor i32 %tmp, 1 ; <i32> [#uses=1]
+ %.015 = ashr i32 %14, %tmp.not ; <i32> [#uses=2]
+ icmp eq i32 %.015, 0 ; <i1>:15 [#uses=1]
+ %.016 = select i1 %15, i32 1, i32 %.015 ; <i32> [#uses=1]
+ udiv i32 %7, %.016 ; <i32>:16 [#uses=1]
+ icmp ult i32 %5, %16 ; <i1>:17 [#uses=1]
+ zext i1 %17 to i32 ; <i32>:18 [#uses=1]
+ store i32 %18, i32* @g_5, align 4
+ br label %entry.ce.ret.exitStub
+}
diff --git a/test/CodeGen/X86/2008-08-06-RewriterBug.ll b/test/CodeGen/X86/2008-08-06-RewriterBug.ll
new file mode 100644
index 0000000..4428035
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-06-RewriterBug.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -march=x86
+; PR2596
+
+@data = external global [400 x i64] ; <[400 x i64]*> [#uses=5]
+
+define void @foo(double* noalias, double* noalias) {
+ load i64* getelementptr ([400 x i64]* @data, i32 0, i64 200), align 4 ; <i64>:3 [#uses=1]
+ load i64* getelementptr ([400 x i64]* @data, i32 0, i64 199), align 4 ; <i64>:4 [#uses=1]
+ load i64* getelementptr ([400 x i64]* @data, i32 0, i64 198), align 4 ; <i64>:5 [#uses=2]
+ load i64* getelementptr ([400 x i64]* @data, i32 0, i64 197), align 4 ; <i64>:6 [#uses=1]
+ br i1 false, label %28, label %7
+
+; <label>:7 ; preds = %2
+ load double** getelementptr (double** bitcast ([400 x i64]* @data to double**), i64 180), align 8 ; <double*>:8 [#uses=1]
+ bitcast double* %8 to double* ; <double*>:9 [#uses=1]
+ ptrtoint double* %9 to i64 ; <i64>:10 [#uses=1]
+ mul i64 %4, %3 ; <i64>:11 [#uses=1]
+ add i64 0, %11 ; <i64>:12 [#uses=1]
+ shl i64 %12, 3 ; <i64>:13 [#uses=1]
+ sub i64 %10, %13 ; <i64>:14 [#uses=1]
+ add i64 %5, 0 ; <i64>:15 [#uses=1]
+ shl i64 %15, 3 ; <i64>:16 [#uses=1]
+ bitcast i64 %16 to i64 ; <i64>:17 [#uses=1]
+ mul i64 %6, %5 ; <i64>:18 [#uses=1]
+ add i64 0, %18 ; <i64>:19 [#uses=1]
+ shl i64 %19, 3 ; <i64>:20 [#uses=1]
+ sub i64 %17, %20 ; <i64>:21 [#uses=1]
+ add i64 0, %21 ; <i64>:22 [#uses=1]
+ add i64 0, %14 ; <i64>:23 [#uses=1]
+ br label %24
+
+; <label>:24 ; preds = %24, %7
+ phi i64 [ 0, %24 ], [ %22, %7 ] ; <i64>:25 [#uses=1]
+ phi i64 [ 0, %24 ], [ %23, %7 ] ; <i64>:26 [#uses=0]
+ add i64 %25, 24 ; <i64>:27 [#uses=0]
+ br label %24
+
+; <label>:28 ; preds = %2
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll b/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll
new file mode 100644
index 0000000..32f6ca0
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movzbl
+
+define i32 @foo(<4 x float> %a, <4 x float> %b) nounwind {
+entry:
+ tail call i32 @llvm.x86.sse.ucomige.ss( <4 x float> %a, <4 x float> %b ) nounwind readnone
+ ret i32 %0
+}
+
+declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/X86/2008-08-19-SubAndFetch.ll b/test/CodeGen/X86/2008-08-19-SubAndFetch.ll
new file mode 100644
index 0000000..8475e8d
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-19-SubAndFetch.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+@var = external global i64 ; <i64*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+; CHECK: main:
+; CHECK: lock
+; CHECK: decq
+ tail call i64 @llvm.atomic.load.sub.i64.p0i64( i64* @var, i64 1 ) ; <i64>:0 [#uses=0]
+ unreachable
+}
+
+declare i64 @llvm.atomic.load.sub.i64.p0i64(i64*, i64) nounwind
diff --git a/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll b/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
new file mode 100644
index 0000000..c76dd7d
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86-64
+
+ %struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* }
+ %struct.QBasicAtomic = type { i32 }
+ %struct.QClipData = type { i32, %"struct.QClipData::ClipLine"*, i32, i32, %struct.QT_FT_Span*, i32, i32, i32, i32 }
+ %"struct.QClipData::ClipLine" = type { i32, %struct.QT_FT_Span* }
+ %struct.QRasterBuffer = type { %struct.QRect, %struct.QRect, %struct.QRegion, %struct.QRegion, %struct.QClipData*, %struct.QClipData*, i8, i8, i32, i32, i32, i32, %struct.DrawHelper*, i32, i32, i32, i8* }
+ %struct.QRect = type { i32, i32, i32, i32 }
+ %struct.QRegion = type { %"struct.QRegion::QRegionData"* }
+ %"struct.QRegion::QRegionData" = type { %struct.QBasicAtomic, %struct._XRegion*, i8*, %struct.QRegionPrivate* }
+ %struct.QRegionPrivate = type opaque
+ %struct.QT_FT_Span = type { i16, i16, i16, i8 }
+ %struct._XRegion = type opaque
+
+define hidden void @_Z24qt_bitmapblit16_sse3dnowP13QRasterBufferiijPKhiii(%struct.QRasterBuffer* %rasterBuffer, i32 %x, i32 %y, i32 %color, i8* %src, i32 %width, i32 %height, i32 %stride) nounwind {
+entry:
+ br i1 false, label %bb.nph144.split, label %bb133
+
+bb.nph144.split: ; preds = %entry
+ tail call void @llvm.x86.mmx.maskmovq( <8 x i8> zeroinitializer, <8 x i8> zeroinitializer, i8* null ) nounwind
+ unreachable
+
+bb133: ; preds = %entry
+ ret void
+}
+
+declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*) nounwind
diff --git a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll
new file mode 100644
index 0000000..eacb4a5
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movd | count 1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movq
+; PR2677
+
+
+ %struct.Bigint = type { %struct.Bigint*, i32, i32, i32, i32, [1 x i32] }
+
+define double @_Z7qstrtodPKcPS0_Pb(i8* %s00, i8** %se, i8* %ok) nounwind {
+entry:
+ br i1 false, label %bb151, label %bb163
+
+bb151: ; preds = %entry
+ br label %bb163
+
+bb163: ; preds = %bb151, %entry
+ %tmp366 = load double* null, align 8 ; <double> [#uses=1]
+ %tmp368 = fmul double %tmp366, 0.000000e+00 ; <double> [#uses=1]
+ %tmp368226 = bitcast double %tmp368 to i64 ; <i64> [#uses=1]
+ br label %bb5.i
+
+bb5.i: ; preds = %bb5.i57.i, %bb163
+ %b.0.i = phi %struct.Bigint* [ null, %bb163 ], [ %tmp9.i.i41.i, %bb5.i57.i ] ; <%struct.Bigint*> [#uses=1]
+ %tmp3.i7.i728 = load i32* null, align 4 ; <i32> [#uses=1]
+ br label %bb.i27.i
+
+bb.i27.i: ; preds = %bb.i27.i, %bb5.i
+ %tmp23.i20.i = lshr i32 0, 16 ; <i32> [#uses=1]
+ br i1 false, label %bb.i27.i, label %bb5.i57.i
+
+bb5.i57.i: ; preds = %bb.i27.i
+ %tmp50.i35.i = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp51.i36.i = add i32 %tmp50.i35.i, 1 ; <i32> [#uses=2]
+ %tmp2.i.i37.i = shl i32 1, %tmp51.i36.i ; <i32> [#uses=2]
+ %tmp4.i.i38.i = shl i32 %tmp2.i.i37.i, 2 ; <i32> [#uses=1]
+ %tmp7.i.i39.i = add i32 %tmp4.i.i38.i, 28 ; <i32> [#uses=1]
+ %tmp8.i.i40.i = malloc i8, i32 %tmp7.i.i39.i ; <i8*> [#uses=1]
+ %tmp9.i.i41.i = bitcast i8* %tmp8.i.i40.i to %struct.Bigint* ; <%struct.Bigint*> [#uses=2]
+ store i32 %tmp51.i36.i, i32* null, align 8
+ store i32 %tmp2.i.i37.i, i32* null, align 4
+ free %struct.Bigint* %b.0.i
+ store i32 %tmp23.i20.i, i32* null, align 4
+ %tmp74.i61.i = add i32 %tmp3.i7.i728, 1 ; <i32> [#uses=1]
+ store i32 %tmp74.i61.i, i32* null, align 4
+ br i1 false, label %bb5.i, label %bb7.i
+
+bb7.i: ; preds = %bb5.i57.i
+ %tmp514 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp515 = sext i32 %tmp514 to i64 ; <i64> [#uses=1]
+ %tmp516 = shl i64 %tmp515, 2 ; <i64> [#uses=1]
+ %tmp517 = add i64 %tmp516, 8 ; <i64> [#uses=1]
+ %tmp519 = getelementptr %struct.Bigint* %tmp9.i.i41.i, i32 0, i32 3 ; <i32*> [#uses=1]
+ %tmp523 = bitcast i32* %tmp519 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i64( i8* null, i8* %tmp523, i64 %tmp517, i32 1 )
+ %tmp524136 = bitcast i64 %tmp368226 to double ; <double> [#uses=1]
+ store double %tmp524136, double* null
+ unreachable
+}
+
+declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) nounwind
diff --git a/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll b/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll
new file mode 100644
index 0000000..101b3c5
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mcpu=core2 | grep pxor | count 2
+; RUN: llc < %s -mcpu=core2 | not grep movapd
+; PR2715
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.XPTTypeDescriptorPrefix = type { i8 }
+ %struct.nsISupports = type { i32 (...)** }
+ %struct.nsXPTCMiniVariant = type { %"struct.nsXPTCMiniVariant::._39" }
+ %"struct.nsXPTCMiniVariant::._39" = type { i64 }
+ %struct.nsXPTCVariant = type { %struct.nsXPTCMiniVariant, i8*, %struct.nsXPTType, i8 }
+ %struct.nsXPTType = type { %struct.XPTTypeDescriptorPrefix }
+
+define i32 @XPTC_InvokeByIndex(%struct.nsISupports* %that, i32 %methodIndex, i32 %paramCount, %struct.nsXPTCVariant* %params) nounwind {
+entry:
+ call void asm sideeffect "", "{xmm0},{xmm1},{xmm2},{xmm3},{xmm4},{xmm5},{xmm6},{xmm7},~{dirflag},~{fpsr},~{flags}"( double undef, double undef, double undef, double 1.0, double undef, double 0.0, double undef, double 0.0 ) nounwind
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll b/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
new file mode 100644
index 0000000..b92c789
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
@@ -0,0 +1,17 @@
+; Check that eh_return & unwind_init were properly lowered
+; RUN: llc < %s | grep %ebp | count 7
+; RUN: llc < %s | grep %ecx | count 5
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i386-pc-linux"
+
+define i8* @test(i32 %a, i8* %b) {
+entry:
+ call void @llvm.eh.unwind.init()
+ %foo = alloca i32
+ call void @llvm.eh.return.i32(i32 %a, i8* %b)
+ unreachable
+}
+
+declare void @llvm.eh.return.i32(i32, i8*)
+declare void @llvm.eh.unwind.init()
diff --git a/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll b/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll
new file mode 100644
index 0000000..00ab735
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll
@@ -0,0 +1,17 @@
+; Check that eh_return & unwind_init were properly lowered
+; RUN: llc < %s | grep %rbp | count 5
+; RUN: llc < %s | grep %rcx | count 3
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define i8* @test(i64 %a, i8* %b) {
+entry:
+ call void @llvm.eh.unwind.init()
+ %foo = alloca i32
+ call void @llvm.eh.return.i64(i64 %a, i8* %b)
+ unreachable
+}
+
+declare void @llvm.eh.return.i64(i64, i8*)
+declare void @llvm.eh.unwind.init()
diff --git a/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll b/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
new file mode 100644
index 0000000..60be0d5
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1
+; PR2687
+
+define <2 x double> @a(<2 x i32> %x) nounwind {
+entry:
+ %y = sitofp <2 x i32> %x to <2 x double>
+ ret <2 x double> %y
+}
+
+define <2 x i32> @b(<2 x double> %x) nounwind {
+entry:
+ %y = fptosi <2 x double> %x to <2 x i32>
+ ret <2 x i32> %y
+}
diff --git a/test/CodeGen/X86/2008-09-09-LinearScanBug.ll b/test/CodeGen/X86/2008-09-09-LinearScanBug.ll
new file mode 100644
index 0000000..b3312d9
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-09-LinearScanBug.ll
@@ -0,0 +1,65 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin
+; PR2757
+
+@g_3 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @func_125(i32 %p_126, i32 %p_128, i32 %p_129) nounwind {
+entry:
+ %tmp2.i = load i32* @g_3 ; <i32> [#uses=2]
+ %conv = trunc i32 %tmp2.i to i16 ; <i16> [#uses=3]
+ br label %forcond1.preheader.i.i7
+
+forcond1.preheader.i.i7: ; preds = %forinc6.i.i25, %entry
+ %p_86.addr.06.i.i4 = phi i32 [ 0, %entry ], [ %sub.i.i.i23, %forinc6.i.i25 ] ; <i32> [#uses=1]
+ %p_87.addr.15.i.i5 = phi i32 [ 0, %entry ], [ %p_87.addr.0.lcssa.i.i21, %forinc6.i.i25 ] ; <i32> [#uses=2]
+ br i1 false, label %forinc6.i.i25, label %forinc.i.i11
+
+forinc.i.i11: ; preds = %forcond1.backedge.i.i20, %forcond1.preheader.i.i7
+ %p_87.addr.02.i.i8 = phi i32 [ %p_87.addr.15.i.i5, %forcond1.preheader.i.i7 ], [ %p_87.addr.0.be.i.i18, %forcond1.backedge.i.i20 ] ; <i32> [#uses=1]
+ %conv.i.i9 = trunc i32 %p_87.addr.02.i.i8 to i8 ; <i8> [#uses=1]
+ br i1 false, label %land_rhs3.i.i.i14, label %lor_rhs.i.i.i17
+
+land_rhs3.i.i.i14: ; preds = %forinc.i.i11
+ br i1 false, label %forcond1.backedge.i.i20, label %lor_rhs.i.i.i17
+
+lor_rhs.i.i.i17: ; preds = %land_rhs3.i.i.i14, %forinc.i.i11
+ %conv29.i.i.i15 = sext i8 %conv.i.i9 to i32 ; <i32> [#uses=1]
+ %add.i.i.i16 = add i32 %conv29.i.i.i15, 1 ; <i32> [#uses=1]
+ br label %forcond1.backedge.i.i20
+
+forcond1.backedge.i.i20: ; preds = %lor_rhs.i.i.i17, %land_rhs3.i.i.i14
+ %p_87.addr.0.be.i.i18 = phi i32 [ %add.i.i.i16, %lor_rhs.i.i.i17 ], [ 0, %land_rhs3.i.i.i14 ] ; <i32> [#uses=3]
+ %tobool3.i.i19 = icmp eq i32 %p_87.addr.0.be.i.i18, 0 ; <i1> [#uses=1]
+ br i1 %tobool3.i.i19, label %forinc6.i.i25, label %forinc.i.i11
+
+forinc6.i.i25: ; preds = %forcond1.backedge.i.i20, %forcond1.preheader.i.i7
+ %p_87.addr.0.lcssa.i.i21 = phi i32 [ %p_87.addr.15.i.i5, %forcond1.preheader.i.i7 ], [ %p_87.addr.0.be.i.i18, %forcond1.backedge.i.i20 ] ; <i32> [#uses=1]
+ %conv.i.i.i22 = and i32 %p_86.addr.06.i.i4, 255 ; <i32> [#uses=1]
+ %sub.i.i.i23 = add i32 %conv.i.i.i22, -1 ; <i32> [#uses=2]
+ %phitmp.i.i24 = icmp eq i32 %sub.i.i.i23, 0 ; <i1> [#uses=1]
+ br i1 %phitmp.i.i24, label %func_106.exit27, label %forcond1.preheader.i.i7
+
+func_106.exit27: ; preds = %forinc6.i.i25
+ %cmp = icmp ne i32 %tmp2.i, 1 ; <i1> [#uses=3]
+ %cmp.ext = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ br i1 %cmp, label %safe_mod_int16_t_s_s.exit, label %lor_rhs.i
+
+lor_rhs.i: ; preds = %func_106.exit27
+ %tobool.i = xor i1 %cmp, true ; <i1> [#uses=1]
+ %or.cond.i = or i1 false, %tobool.i ; <i1> [#uses=1]
+ br i1 %or.cond.i, label %ifend.i, label %safe_mod_int16_t_s_s.exit
+
+ifend.i: ; preds = %lor_rhs.i
+ %conv6.i = sext i16 %conv to i32 ; <i32> [#uses=1]
+ %rem.i = urem i32 %conv6.i, %cmp.ext ; <i32> [#uses=1]
+ %conv8.i = trunc i32 %rem.i to i16 ; <i16> [#uses=1]
+ br label %safe_mod_int16_t_s_s.exit
+
+safe_mod_int16_t_s_s.exit: ; preds = %ifend.i, %lor_rhs.i, %func_106.exit27
+ %call31 = phi i16 [ %conv8.i, %ifend.i ], [ %conv, %func_106.exit27 ], [ %conv, %lor_rhs.i ] ; <i16> [#uses=1]
+ %conv4 = sext i16 %call31 to i32 ; <i32> [#uses=1]
+ %call5 = tail call i32 (...)* @func_104( i32 %conv4 ) ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @func_104(...)
diff --git a/test/CodeGen/X86/2008-09-11-CoalescerBug.ll b/test/CodeGen/X86/2008-09-11-CoalescerBug.ll
new file mode 100644
index 0000000..108f243
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-11-CoalescerBug.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=x86
+; PR2783
+
+@g_15 = external global i16 ; <i16*> [#uses=2]
+
+define i32 @func_3(i32 %p_5) nounwind {
+entry:
+ %0 = srem i32 1, 0 ; <i32> [#uses=2]
+ %1 = load i16* @g_15, align 2 ; <i16> [#uses=1]
+ %2 = zext i16 %1 to i32 ; <i32> [#uses=1]
+ %3 = and i32 %2, 1 ; <i32> [#uses=1]
+ %4 = tail call i32 (...)* @rshift_u_s( i32 1 ) nounwind ; <i32> [#uses=1]
+ %5 = icmp slt i32 %4, 2 ; <i1> [#uses=1]
+ %6 = zext i1 %5 to i32 ; <i32> [#uses=1]
+ %7 = icmp sge i32 %3, %6 ; <i1> [#uses=1]
+ %8 = zext i1 %7 to i32 ; <i32> [#uses=1]
+ %9 = load i16* @g_15, align 2 ; <i16> [#uses=1]
+ %10 = icmp eq i16 %9, 0 ; <i1> [#uses=1]
+ %11 = zext i1 %10 to i32 ; <i32> [#uses=1]
+ %12 = tail call i32 (...)* @func_20( i32 1 ) nounwind ; <i32> [#uses=1]
+ %13 = icmp sge i32 %11, %12 ; <i1> [#uses=1]
+ %14 = zext i1 %13 to i32 ; <i32> [#uses=1]
+ %15 = sub i32 %8, %14 ; <i32> [#uses=1]
+ %16 = icmp ult i32 %15, 2 ; <i1> [#uses=1]
+ %17 = zext i1 %16 to i32 ; <i32> [#uses=1]
+ %18 = icmp ugt i32 %0, 3 ; <i1> [#uses=1]
+ %or.cond = or i1 false, %18 ; <i1> [#uses=1]
+ %19 = select i1 %or.cond, i32 0, i32 %0 ; <i32> [#uses=1]
+ %.0 = lshr i32 %17, %19 ; <i32> [#uses=1]
+ %20 = tail call i32 (...)* @func_7( i32 %.0 ) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @rshift_u_s(...)
+
+declare i32 @func_20(...)
+
+declare i32 @func_7(...)
diff --git a/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll b/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
new file mode 100644
index 0000000..534f990
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=x86
+; PR2748
+
+@g_73 = external global i32 ; <i32*> [#uses=1]
+@g_5 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @func_44(i16 signext %p_46) nounwind {
+entry:
+ %0 = load i32* @g_5, align 4 ; <i32> [#uses=1]
+ %1 = ashr i32 %0, 1 ; <i32> [#uses=1]
+ %2 = icmp sgt i32 %1, 1 ; <i1> [#uses=1]
+ %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
+ %4 = load i32* @g_73, align 4 ; <i32> [#uses=1]
+ %5 = zext i16 %p_46 to i64 ; <i64> [#uses=1]
+ %6 = sub i64 0, %5 ; <i64> [#uses=1]
+ %7 = trunc i64 %6 to i8 ; <i8> [#uses=2]
+ %8 = trunc i32 %4 to i8 ; <i8> [#uses=2]
+ %9 = icmp eq i8 %8, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb11, label %bb12
+
+bb11: ; preds = %entry
+ %10 = urem i8 %7, %8 ; <i8> [#uses=1]
+ br label %bb12
+
+bb12: ; preds = %bb11, %entry
+ %.014.in = phi i8 [ %10, %bb11 ], [ %7, %entry ] ; <i8> [#uses=1]
+ %11 = icmp ne i8 %.014.in, 0 ; <i1> [#uses=1]
+ %12 = zext i1 %11 to i32 ; <i32> [#uses=1]
+ %13 = tail call i32 (...)* @func_48( i32 %12, i32 %3, i32 0 ) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @func_48(...)
diff --git a/test/CodeGen/X86/2008-09-17-inline-asm-1.ll b/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
new file mode 100644
index 0000000..74429c3
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86 | not grep "movl %eax, %eax"
+; RUN: llc < %s -march=x86 | not grep "movl %edx, %edx"
+; RUN: llc < %s -march=x86 | not grep "movl (%eax), %eax"
+; RUN: llc < %s -march=x86 | not grep "movl (%edx), %edx"
+; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl %eax, %eax"
+; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl %edx, %edx"
+; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl (%eax), %eax"
+; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl (%edx), %edx"
+
+; %0 must not be put in EAX or EDX.
+; In the first asm, $0 and $2 must not be put in EAX.
+; In the second asm, $0 and $2 must not be put in EDX.
+; This is kind of hard to test thoroughly, but the things above should continue
+; to pass, I think.
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@x = common global i32 0 ; <i32*> [#uses=1]
+
+define i32 @aci(i32* %pw) nounwind {
+entry:
+ %0 = load i32* @x, align 4 ; <i32> [#uses=1]
+ %asmtmp = tail call { i32, i32 } asm "movl $0, %eax\0A\090:\0A\09test %eax, %eax\0A\09je 1f\0A\09movl %eax, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{ax},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind ; <{ i32, i32 }> [#uses=0]
+ %asmtmp2 = tail call { i32, i32 } asm "movl $0, %edx\0A\090:\0A\09test %edx, %edx\0A\09je 1f\0A\09movl %edx, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{dx},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind ; <{ i32, i32 }> [#uses=1]
+ %asmresult3 = extractvalue { i32, i32 } %asmtmp2, 0 ; <i32> [#uses=1]
+ %1 = add i32 %asmresult3, %0 ; <i32> [#uses=1]
+ ret i32 %1
+}
diff --git a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
new file mode 100644
index 0000000..e3b6fdf
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86 | grep "#%ebp %esi %edi 8(%edx) %eax (%ebx)"
+; RUN: llc < %s -march=x86 -regalloc=local | grep "#%edi %ebp %edx 8(%ebx) %eax (%esi)"
+; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers
+; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
+; operand. There are many combinations that work; this is what llc puts out now.
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+ %struct.foo = type { i32, i32, i8* }
+
+define i32 @get(%struct.foo* %c, i8* %state) nounwind {
+entry:
+ %0 = getelementptr %struct.foo* %c, i32 0, i32 0 ; <i32*> [#uses=2]
+ %1 = getelementptr %struct.foo* %c, i32 0, i32 1 ; <i32*> [#uses=2]
+ %2 = getelementptr %struct.foo* %c, i32 0, i32 2 ; <i8**> [#uses=2]
+ %3 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %4 = load i32* %1, align 4 ; <i32> [#uses=1]
+ %5 = load i8* %state, align 1 ; <i8> [#uses=1]
+ %asmtmp = tail call { i32, i32, i32, i32 } asm sideeffect "#$0 $1 $2 $3 $4 $5", "=&r,=r,=r,=*m,=&q,=*imr,1,2,*m,5,~{dirflag},~{fpsr},~{flags},~{cx}"(i8** %2, i8* %state, i32 %3, i32 %4, i8** %2, i8 %5) nounwind ; <{ i32, i32, i32, i32 }> [#uses=3]
+ %asmresult = extractvalue { i32, i32, i32, i32 } %asmtmp, 0 ; <i32> [#uses=1]
+ %asmresult1 = extractvalue { i32, i32, i32, i32 } %asmtmp, 1 ; <i32> [#uses=1]
+ store i32 %asmresult1, i32* %0
+ %asmresult2 = extractvalue { i32, i32, i32, i32 } %asmtmp, 2 ; <i32> [#uses=1]
+ store i32 %asmresult2, i32* %1
+ ret i32 %asmresult
+}
diff --git a/test/CodeGen/X86/2008-09-19-RegAllocBug.ll b/test/CodeGen/X86/2008-09-19-RegAllocBug.ll
new file mode 100644
index 0000000..a8f2912
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-19-RegAllocBug.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin
+; PR2808
+
+@g_3 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @func_4() nounwind {
+entry:
+ %0 = load i32* @g_3, align 4 ; <i32> [#uses=2]
+ %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
+ %2 = sub i8 1, %1 ; <i8> [#uses=1]
+ %3 = sext i8 %2 to i32 ; <i32> [#uses=1]
+ %.0 = ashr i32 %3, select (i1 icmp ne (i8 zext (i1 icmp ugt (i32 ptrtoint (i32 ()* @func_4 to i32), i32 3) to i8), i8 0), i32 0, i32 ptrtoint (i32 ()* @func_4 to i32)) ; <i32> [#uses=1]
+ %4 = urem i32 %0, %.0 ; <i32> [#uses=1]
+ %5 = icmp eq i32 %4, 0 ; <i1> [#uses=1]
+ br i1 %5, label %return, label %bb4
+
+bb4: ; preds = %entry
+ ret i32 undef
+
+return: ; preds = %entry
+ ret i32 undef
+}
diff --git a/test/CodeGen/X86/2008-09-25-sseregparm-1.ll b/test/CodeGen/X86/2008-09-25-sseregparm-1.ll
new file mode 100644
index 0000000..c92a8f4
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-25-sseregparm-1.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movs | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2
+; check 'inreg' attribute for sse_regparm
+
+define double @foo1() inreg nounwind {
+ ret double 1.0
+}
+
+define float @foo2() inreg nounwind {
+ ret float 1.0
+}
+
+define double @bar() nounwind {
+ ret double 1.0
+}
+
+define float @bar2() nounwind {
+ ret float 1.0
+}
diff --git a/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll b/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll
new file mode 100644
index 0000000..f1ada28
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9
+
+ %struct._Unwind_Context = type { [18 x i8*], i8*, i8*, i8*, %struct.dwarf_eh_bases, i32, i32, i32, [18 x i8] }
+ %struct._Unwind_Exception = type { i64, void (i32, %struct._Unwind_Exception*)*, i32, i32, [3 x i32] }
+ %struct.dwarf_eh_bases = type { i8*, i8*, i8* }
+
+declare fastcc void @uw_init_context_1(%struct._Unwind_Context*, i8*, i8*)
+
+declare i8* @llvm.eh.dwarf.cfa(i32) nounwind
+
+define hidden void @_Unwind_Resume(%struct._Unwind_Exception* %exc) noreturn noreturn {
+entry:
+ %0 = call i8* @llvm.eh.dwarf.cfa(i32 0) ; <i8*> [#uses=1]
+ call fastcc void @uw_init_context_1(%struct._Unwind_Context* null, i8* %0, i8* null)
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-09-29-ReMatBug.ll b/test/CodeGen/X86/2008-09-29-ReMatBug.ll
new file mode 100644
index 0000000..c36cf39
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-29-ReMatBug.ll
@@ -0,0 +1,85 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim
+
+ %struct..0objc_selector = type opaque
+ %struct.NSString = type opaque
+ %struct.XCStringList = type { i32, %struct._XCStringListNode* }
+ %struct._XCStringListNode = type { [3 x i8], [0 x i8], i8 }
+ %struct.__builtin_CFString = type { i32*, i32, i8*, i32 }
+internal constant %struct.__builtin_CFString { i32* getelementptr ([0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 1992, i8* getelementptr ([3 x i8]* @"\01LC", i32 0, i32 0), i32 2 } ; <%struct.__builtin_CFString*>:0 [#uses=1]
+@__CFConstantStringClassReference = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
+@"\01LC" = internal constant [3 x i8] c"NO\00" ; <[3 x i8]*> [#uses=1]
+@"\01LC1" = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast (%struct.NSString* (%struct.XCStringList*, %struct..0objc_selector*)* @"-[XCStringList stringRepresentation]" to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define %struct.NSString* @"-[XCStringList stringRepresentation]"(%struct.XCStringList* %self, %struct..0objc_selector* %_cmd) nounwind {
+entry:
+ %0 = load i32* null, align 4 ; <i32> [#uses=1]
+ %1 = and i32 %0, 16777215 ; <i32> [#uses=1]
+ %2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb44, label %bb4
+
+bb4: ; preds = %entry
+ %3 = load %struct._XCStringListNode** null, align 4 ; <%struct._XCStringListNode*> [#uses=2]
+ %4 = icmp eq %struct._XCStringListNode* %3, null ; <i1> [#uses=1]
+ %5 = bitcast %struct._XCStringListNode* %3 to i32* ; <i32*> [#uses=1]
+ br label %bb37.outer
+
+bb6: ; preds = %bb37
+ br label %bb19
+
+bb19: ; preds = %bb37, %bb6
+ %.rle = phi i32 [ 0, %bb6 ], [ %10, %bb37 ] ; <i32> [#uses=1]
+ %bufptr.0.lcssa = phi i8* [ null, %bb6 ], [ null, %bb37 ] ; <i8*> [#uses=2]
+ %6 = and i32 %.rle, 16777215 ; <i32> [#uses=1]
+ %7 = icmp eq i32 %6, 0 ; <i1> [#uses=1]
+ br i1 %7, label %bb25.split, label %bb37
+
+bb25.split: ; preds = %bb19
+ call void @foo(i8* getelementptr ([1 x i8]* @"\01LC1", i32 0, i32 0)) nounwind nounwind
+ br label %bb35.outer
+
+bb34: ; preds = %bb35, %bb35, %bb35, %bb35
+ %8 = getelementptr i8* %bufptr.0.lcssa, i32 %totalLength.0.ph ; <i8*> [#uses=1]
+ store i8 92, i8* %8, align 1
+ br label %bb35.outer
+
+bb35.outer: ; preds = %bb34, %bb25.split
+ %totalLength.0.ph = add i32 0, %totalLength.1.ph ; <i32> [#uses=2]
+ br label %bb35
+
+bb35: ; preds = %bb35, %bb35.outer
+ %9 = load i8* null, align 1 ; <i8> [#uses=1]
+ switch i8 %9, label %bb35 [
+ i8 0, label %bb37.outer
+ i8 32, label %bb34
+ i8 92, label %bb34
+ i8 34, label %bb34
+ i8 39, label %bb34
+ ]
+
+bb37.outer: ; preds = %bb35, %bb4
+ %totalLength.1.ph = phi i32 [ 0, %bb4 ], [ %totalLength.0.ph, %bb35 ] ; <i32> [#uses=1]
+ %bufptr.1.ph = phi i8* [ null, %bb4 ], [ %bufptr.0.lcssa, %bb35 ] ; <i8*> [#uses=2]
+ br i1 %4, label %bb39.split, label %bb37
+
+bb37: ; preds = %bb37.outer, %bb19
+ %10 = load i32* %5, align 4 ; <i32> [#uses=1]
+ br i1 false, label %bb6, label %bb19
+
+bb39.split: ; preds = %bb37.outer
+ %11 = bitcast i8* null to %struct.NSString* ; <%struct.NSString*> [#uses=2]
+ %12 = icmp eq i8* null, %bufptr.1.ph ; <i1> [#uses=1]
+ br i1 %12, label %bb44, label %bb42
+
+bb42: ; preds = %bb39.split
+ call void @quux(i8* %bufptr.1.ph) nounwind nounwind
+ ret %struct.NSString* %11
+
+bb44: ; preds = %bb39.split, %entry
+ %.0 = phi %struct.NSString* [ bitcast (%struct.__builtin_CFString* @0 to %struct.NSString*), %entry ], [ %11, %bb39.split ] ; <%struct.NSString*> [#uses=1]
+ ret %struct.NSString* %.0
+}
+
+declare void @foo(i8*)
+
+declare void @quux(i8*)
diff --git a/test/CodeGen/X86/2008-09-29-VolatileBug.ll b/test/CodeGen/X86/2008-09-29-VolatileBug.ll
new file mode 100644
index 0000000..935c4c5
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-29-VolatileBug.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 | not grep movz
+; PR2835
+
+@g_407 = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast (i32 ()* @main to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @main() nounwind {
+entry:
+ %0 = volatile load i32* @g_407, align 4 ; <i32> [#uses=1]
+ %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
+ %2 = tail call i32 @func_45(i8 zeroext %1) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @func_45(i8 zeroext) nounwind
diff --git a/test/CodeGen/X86/2008-10-02-Atomics32-2.ll b/test/CodeGen/X86/2008-10-02-Atomics32-2.ll
new file mode 100644
index 0000000..b48c4ad
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-02-Atomics32-2.ll
@@ -0,0 +1,969 @@
+; RUN: llc < %s -march=x86 > %t
+;; This version includes 64-bit version of binary operators (in 32-bit mode).
+;; Swap, cmp-and-swap not supported yet in this mode.
+; ModuleID = 'Atomics.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@sc = common global i8 0 ; <i8*> [#uses=52]
+@uc = common global i8 0 ; <i8*> [#uses=112]
+@ss = common global i16 0 ; <i16*> [#uses=15]
+@us = common global i16 0 ; <i16*> [#uses=15]
+@si = common global i32 0 ; <i32*> [#uses=15]
+@ui = common global i32 0 ; <i32*> [#uses=23]
+@sl = common global i32 0 ; <i32*> [#uses=15]
+@ul = common global i32 0 ; <i32*> [#uses=15]
+@sll = common global i64 0, align 8 ; <i64*> [#uses=13]
+@ull = common global i64 0, align 8 ; <i64*> [#uses=13]
+
+define void @test_op_ignore() nounwind {
+entry:
+ %0 = call i8 @llvm.atomic.load.add.i8.p0i8(i8* @sc, i8 1) ; <i8> [#uses=0]
+ %1 = call i8 @llvm.atomic.load.add.i8.p0i8(i8* @uc, i8 1) ; <i8> [#uses=0]
+ %2 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %3 = call i16 @llvm.atomic.load.add.i16.p0i16(i16* %2, i16 1) ; <i16> [#uses=0]
+ %4 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %5 = call i16 @llvm.atomic.load.add.i16.p0i16(i16* %4, i16 1) ; <i16> [#uses=0]
+ %6 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %7 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %6, i32 1) ; <i32> [#uses=0]
+ %8 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %9 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %8, i32 1) ; <i32> [#uses=0]
+ %10 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %11 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %10, i32 1) ; <i32> [#uses=0]
+ %12 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %13 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %12, i32 1) ; <i32> [#uses=0]
+ %14 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %15 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %14, i64 1) ; <i64> [#uses=0]
+ %16 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %17 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %16, i64 1) ; <i64> [#uses=0]
+ %18 = call i8 @llvm.atomic.load.sub.i8.p0i8(i8* @sc, i8 1) ; <i8> [#uses=0]
+ %19 = call i8 @llvm.atomic.load.sub.i8.p0i8(i8* @uc, i8 1) ; <i8> [#uses=0]
+ %20 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %21 = call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %20, i16 1) ; <i16> [#uses=0]
+ %22 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %23 = call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %22, i16 1) ; <i16> [#uses=0]
+ %24 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %25 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %24, i32 1) ; <i32> [#uses=0]
+ %26 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %27 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %26, i32 1) ; <i32> [#uses=0]
+ %28 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %29 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %28, i32 1) ; <i32> [#uses=0]
+ %30 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %31 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %30, i32 1) ; <i32> [#uses=0]
+ %32 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %33 = call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %32, i64 1) ; <i64> [#uses=0]
+ %34 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %35 = call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %34, i64 1) ; <i64> [#uses=0]
+ %36 = call i8 @llvm.atomic.load.or.i8.p0i8(i8* @sc, i8 1) ; <i8> [#uses=0]
+ %37 = call i8 @llvm.atomic.load.or.i8.p0i8(i8* @uc, i8 1) ; <i8> [#uses=0]
+ %38 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %39 = call i16 @llvm.atomic.load.or.i16.p0i16(i16* %38, i16 1) ; <i16> [#uses=0]
+ %40 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %41 = call i16 @llvm.atomic.load.or.i16.p0i16(i16* %40, i16 1) ; <i16> [#uses=0]
+ %42 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %43 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %42, i32 1) ; <i32> [#uses=0]
+ %44 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %45 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %44, i32 1) ; <i32> [#uses=0]
+ %46 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %47 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %46, i32 1) ; <i32> [#uses=0]
+ %48 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %49 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %48, i32 1) ; <i32> [#uses=0]
+ %50 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %51 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %50, i64 1) ; <i64> [#uses=0]
+ %52 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %53 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %52, i64 1) ; <i64> [#uses=0]
+ %54 = call i8 @llvm.atomic.load.xor.i8.p0i8(i8* @sc, i8 1) ; <i8> [#uses=0]
+ %55 = call i8 @llvm.atomic.load.xor.i8.p0i8(i8* @uc, i8 1) ; <i8> [#uses=0]
+ %56 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %57 = call i16 @llvm.atomic.load.xor.i16.p0i16(i16* %56, i16 1) ; <i16> [#uses=0]
+ %58 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %59 = call i16 @llvm.atomic.load.xor.i16.p0i16(i16* %58, i16 1) ; <i16> [#uses=0]
+ %60 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %61 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %60, i32 1) ; <i32> [#uses=0]
+ %62 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %63 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %62, i32 1) ; <i32> [#uses=0]
+ %64 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %65 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %64, i32 1) ; <i32> [#uses=0]
+ %66 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %67 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %66, i32 1) ; <i32> [#uses=0]
+ %68 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %69 = call i64 @llvm.atomic.load.xor.i64.p0i64(i64* %68, i64 1) ; <i64> [#uses=0]
+ %70 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %71 = call i64 @llvm.atomic.load.xor.i64.p0i64(i64* %70, i64 1) ; <i64> [#uses=0]
+ %72 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @sc, i8 1) ; <i8> [#uses=0]
+ %73 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @uc, i8 1) ; <i8> [#uses=0]
+ %74 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %75 = call i16 @llvm.atomic.load.and.i16.p0i16(i16* %74, i16 1) ; <i16> [#uses=0]
+ %76 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %77 = call i16 @llvm.atomic.load.and.i16.p0i16(i16* %76, i16 1) ; <i16> [#uses=0]
+ %78 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %79 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %78, i32 1) ; <i32> [#uses=0]
+ %80 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %81 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %80, i32 1) ; <i32> [#uses=0]
+ %82 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %83 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %82, i32 1) ; <i32> [#uses=0]
+ %84 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %85 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %84, i32 1) ; <i32> [#uses=0]
+ %86 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %87 = call i64 @llvm.atomic.load.and.i64.p0i64(i64* %86, i64 1) ; <i64> [#uses=0]
+ %88 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %89 = call i64 @llvm.atomic.load.and.i64.p0i64(i64* %88, i64 1) ; <i64> [#uses=0]
+ %90 = call i8 @llvm.atomic.load.nand.i8.p0i8(i8* @sc, i8 1) ; <i8> [#uses=0]
+ %91 = call i8 @llvm.atomic.load.nand.i8.p0i8(i8* @uc, i8 1) ; <i8> [#uses=0]
+ %92 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %93 = call i16 @llvm.atomic.load.nand.i16.p0i16(i16* %92, i16 1) ; <i16> [#uses=0]
+ %94 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %95 = call i16 @llvm.atomic.load.nand.i16.p0i16(i16* %94, i16 1) ; <i16> [#uses=0]
+ %96 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %97 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %96, i32 1) ; <i32> [#uses=0]
+ %98 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %99 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %98, i32 1) ; <i32> [#uses=0]
+ %100 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %101 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %100, i32 1) ; <i32> [#uses=0]
+ %102 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %103 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %102, i32 1) ; <i32> [#uses=0]
+ %104 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %105 = call i64 @llvm.atomic.load.nand.i64.p0i64(i64* %104, i64 1) ; <i64> [#uses=0]
+ %106 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %107 = call i64 @llvm.atomic.load.nand.i64.p0i64(i64* %106, i64 1) ; <i64> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.add.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.add.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.sub.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.sub.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.sub.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.or.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.or.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.or.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.xor.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.xor.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.xor.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.and.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.and.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.and.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.nand.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.nand.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.nand.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.nand.i64.p0i64(i64*, i64) nounwind
+
+define void @test_fetch_and_op() nounwind {
+entry:
+ %0 = call i8 @llvm.atomic.load.add.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ %1 = call i8 @llvm.atomic.load.add.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ %2 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %3 = call i16 @llvm.atomic.load.add.i16.p0i16(i16* %2, i16 11) ; <i16> [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ %4 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %5 = call i16 @llvm.atomic.load.add.i16.p0i16(i16* %4, i16 11) ; <i16> [#uses=1]
+ store i16 %5, i16* @us, align 2
+ %6 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %7 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %6, i32 11) ; <i32> [#uses=1]
+ store i32 %7, i32* @si, align 4
+ %8 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %9 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %8, i32 11) ; <i32> [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ %10 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %11 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %10, i32 11) ; <i32> [#uses=1]
+ store i32 %11, i32* @sl, align 4
+ %12 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %13 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %12, i32 11) ; <i32> [#uses=1]
+ store i32 %13, i32* @ul, align 4
+ %14 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %15 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %14, i64 11) ; <i64> [#uses=1]
+ store i64 %15, i64* @sll, align 8
+ %16 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %17 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %16, i64 11) ; <i64> [#uses=1]
+ store i64 %17, i64* @ull, align 8
+ %18 = call i8 @llvm.atomic.load.sub.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
+ store i8 %18, i8* @sc, align 1
+ %19 = call i8 @llvm.atomic.load.sub.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
+ store i8 %19, i8* @uc, align 1
+ %20 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %21 = call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %20, i16 11) ; <i16> [#uses=1]
+ store i16 %21, i16* @ss, align 2
+ %22 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %23 = call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %22, i16 11) ; <i16> [#uses=1]
+ store i16 %23, i16* @us, align 2
+ %24 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %25 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %24, i32 11) ; <i32> [#uses=1]
+ store i32 %25, i32* @si, align 4
+ %26 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %27 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %26, i32 11) ; <i32> [#uses=1]
+ store i32 %27, i32* @ui, align 4
+ %28 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %29 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %28, i32 11) ; <i32> [#uses=1]
+ store i32 %29, i32* @sl, align 4
+ %30 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %31 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %30, i32 11) ; <i32> [#uses=1]
+ store i32 %31, i32* @ul, align 4
+ %32 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %33 = call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %32, i64 11) ; <i64> [#uses=1]
+ store i64 %33, i64* @sll, align 8
+ %34 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %35 = call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %34, i64 11) ; <i64> [#uses=1]
+ store i64 %35, i64* @ull, align 8
+ %36 = call i8 @llvm.atomic.load.or.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
+ store i8 %36, i8* @sc, align 1
+ %37 = call i8 @llvm.atomic.load.or.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
+ store i8 %37, i8* @uc, align 1
+ %38 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %39 = call i16 @llvm.atomic.load.or.i16.p0i16(i16* %38, i16 11) ; <i16> [#uses=1]
+ store i16 %39, i16* @ss, align 2
+ %40 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %41 = call i16 @llvm.atomic.load.or.i16.p0i16(i16* %40, i16 11) ; <i16> [#uses=1]
+ store i16 %41, i16* @us, align 2
+ %42 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %43 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %42, i32 11) ; <i32> [#uses=1]
+ store i32 %43, i32* @si, align 4
+ %44 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %45 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %44, i32 11) ; <i32> [#uses=1]
+ store i32 %45, i32* @ui, align 4
+ %46 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %47 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %46, i32 11) ; <i32> [#uses=1]
+ store i32 %47, i32* @sl, align 4
+ %48 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %49 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %48, i32 11) ; <i32> [#uses=1]
+ store i32 %49, i32* @ul, align 4
+ %50 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %51 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %50, i64 11) ; <i64> [#uses=1]
+ store i64 %51, i64* @sll, align 8
+ %52 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %53 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %52, i64 11) ; <i64> [#uses=1]
+ store i64 %53, i64* @ull, align 8
+ %54 = call i8 @llvm.atomic.load.xor.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
+ store i8 %54, i8* @sc, align 1
+ %55 = call i8 @llvm.atomic.load.xor.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
+ store i8 %55, i8* @uc, align 1
+ %56 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %57 = call i16 @llvm.atomic.load.xor.i16.p0i16(i16* %56, i16 11) ; <i16> [#uses=1]
+ store i16 %57, i16* @ss, align 2
+ %58 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %59 = call i16 @llvm.atomic.load.xor.i16.p0i16(i16* %58, i16 11) ; <i16> [#uses=1]
+ store i16 %59, i16* @us, align 2
+ %60 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %61 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %60, i32 11) ; <i32> [#uses=1]
+ store i32 %61, i32* @si, align 4
+ %62 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %63 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %62, i32 11) ; <i32> [#uses=1]
+ store i32 %63, i32* @ui, align 4
+ %64 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %65 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %64, i32 11) ; <i32> [#uses=1]
+ store i32 %65, i32* @sl, align 4
+ %66 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %67 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %66, i32 11) ; <i32> [#uses=1]
+ store i32 %67, i32* @ul, align 4
+ %68 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %69 = call i64 @llvm.atomic.load.xor.i64.p0i64(i64* %68, i64 11) ; <i64> [#uses=1]
+ store i64 %69, i64* @sll, align 8
+ %70 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %71 = call i64 @llvm.atomic.load.xor.i64.p0i64(i64* %70, i64 11) ; <i64> [#uses=1]
+ store i64 %71, i64* @ull, align 8
+ %72 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
+ store i8 %72, i8* @sc, align 1
+ %73 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
+ store i8 %73, i8* @uc, align 1
+ %74 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %75 = call i16 @llvm.atomic.load.and.i16.p0i16(i16* %74, i16 11) ; <i16> [#uses=1]
+ store i16 %75, i16* @ss, align 2
+ %76 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %77 = call i16 @llvm.atomic.load.and.i16.p0i16(i16* %76, i16 11) ; <i16> [#uses=1]
+ store i16 %77, i16* @us, align 2
+ %78 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %79 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %78, i32 11) ; <i32> [#uses=1]
+ store i32 %79, i32* @si, align 4
+ %80 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %81 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %80, i32 11) ; <i32> [#uses=1]
+ store i32 %81, i32* @ui, align 4
+ %82 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %83 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %82, i32 11) ; <i32> [#uses=1]
+ store i32 %83, i32* @sl, align 4
+ %84 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %85 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %84, i32 11) ; <i32> [#uses=1]
+ store i32 %85, i32* @ul, align 4
+ %86 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %87 = call i64 @llvm.atomic.load.and.i64.p0i64(i64* %86, i64 11) ; <i64> [#uses=1]
+ store i64 %87, i64* @sll, align 8
+ %88 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %89 = call i64 @llvm.atomic.load.and.i64.p0i64(i64* %88, i64 11) ; <i64> [#uses=1]
+ store i64 %89, i64* @ull, align 8
+ %90 = call i8 @llvm.atomic.load.nand.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
+ store i8 %90, i8* @sc, align 1
+ %91 = call i8 @llvm.atomic.load.nand.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
+ store i8 %91, i8* @uc, align 1
+ %92 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %93 = call i16 @llvm.atomic.load.nand.i16.p0i16(i16* %92, i16 11) ; <i16> [#uses=1]
+ store i16 %93, i16* @ss, align 2
+ %94 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %95 = call i16 @llvm.atomic.load.nand.i16.p0i16(i16* %94, i16 11) ; <i16> [#uses=1]
+ store i16 %95, i16* @us, align 2
+ %96 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %97 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %96, i32 11) ; <i32> [#uses=1]
+ store i32 %97, i32* @si, align 4
+ %98 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %99 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %98, i32 11) ; <i32> [#uses=1]
+ store i32 %99, i32* @ui, align 4
+ %100 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %101 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %100, i32 11) ; <i32> [#uses=1]
+ store i32 %101, i32* @sl, align 4
+ %102 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %103 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %102, i32 11) ; <i32> [#uses=1]
+ store i32 %103, i32* @ul, align 4
+ %104 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %105 = call i64 @llvm.atomic.load.nand.i64.p0i64(i64* %104, i64 11) ; <i64> [#uses=1]
+ store i64 %105, i64* @sll, align 8
+ %106 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %107 = call i64 @llvm.atomic.load.nand.i64.p0i64(i64* %106, i64 11) ; <i64> [#uses=1]
+ store i64 %107, i64* @ull, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_op_and_fetch() nounwind {
+entry:
+ %0 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %1 = zext i8 %0 to i32 ; <i32> [#uses=1]
+ %2 = trunc i32 %1 to i8 ; <i8> [#uses=2]
+ %3 = call i8 @llvm.atomic.load.add.i8.p0i8(i8* @sc, i8 %2) ; <i8> [#uses=1]
+ %4 = add i8 %3, %2 ; <i8> [#uses=1]
+ store i8 %4, i8* @sc, align 1
+ %5 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %6 = zext i8 %5 to i32 ; <i32> [#uses=1]
+ %7 = trunc i32 %6 to i8 ; <i8> [#uses=2]
+ %8 = call i8 @llvm.atomic.load.add.i8.p0i8(i8* @uc, i8 %7) ; <i8> [#uses=1]
+ %9 = add i8 %8, %7 ; <i8> [#uses=1]
+ store i8 %9, i8* @uc, align 1
+ %10 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %11 = zext i8 %10 to i32 ; <i32> [#uses=1]
+ %12 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %13 = trunc i32 %11 to i16 ; <i16> [#uses=2]
+ %14 = call i16 @llvm.atomic.load.add.i16.p0i16(i16* %12, i16 %13) ; <i16> [#uses=1]
+ %15 = add i16 %14, %13 ; <i16> [#uses=1]
+ store i16 %15, i16* @ss, align 2
+ %16 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %17 = zext i8 %16 to i32 ; <i32> [#uses=1]
+ %18 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %19 = trunc i32 %17 to i16 ; <i16> [#uses=2]
+ %20 = call i16 @llvm.atomic.load.add.i16.p0i16(i16* %18, i16 %19) ; <i16> [#uses=1]
+ %21 = add i16 %20, %19 ; <i16> [#uses=1]
+ store i16 %21, i16* @us, align 2
+ %22 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %23 = zext i8 %22 to i32 ; <i32> [#uses=2]
+ %24 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %25 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %24, i32 %23) ; <i32> [#uses=1]
+ %26 = add i32 %25, %23 ; <i32> [#uses=1]
+ store i32 %26, i32* @si, align 4
+ %27 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %28 = zext i8 %27 to i32 ; <i32> [#uses=2]
+ %29 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %30 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %29, i32 %28) ; <i32> [#uses=1]
+ %31 = add i32 %30, %28 ; <i32> [#uses=1]
+ store i32 %31, i32* @ui, align 4
+ %32 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %33 = zext i8 %32 to i32 ; <i32> [#uses=2]
+ %34 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %35 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %34, i32 %33) ; <i32> [#uses=1]
+ %36 = add i32 %35, %33 ; <i32> [#uses=1]
+ store i32 %36, i32* @sl, align 4
+ %37 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %38 = zext i8 %37 to i32 ; <i32> [#uses=2]
+ %39 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %40 = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %39, i32 %38) ; <i32> [#uses=1]
+ %41 = add i32 %40, %38 ; <i32> [#uses=1]
+ store i32 %41, i32* @ul, align 4
+ %42 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %43 = zext i8 %42 to i64 ; <i64> [#uses=2]
+ %44 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %45 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %44, i64 %43) ; <i64> [#uses=1]
+ %46 = add i64 %45, %43 ; <i64> [#uses=1]
+ store i64 %46, i64* @sll, align 8
+ %47 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %48 = zext i8 %47 to i64 ; <i64> [#uses=2]
+ %49 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %50 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %49, i64 %48) ; <i64> [#uses=1]
+ %51 = add i64 %50, %48 ; <i64> [#uses=1]
+ store i64 %51, i64* @ull, align 8
+ %52 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %53 = zext i8 %52 to i32 ; <i32> [#uses=1]
+ %54 = trunc i32 %53 to i8 ; <i8> [#uses=2]
+ %55 = call i8 @llvm.atomic.load.sub.i8.p0i8(i8* @sc, i8 %54) ; <i8> [#uses=1]
+ %56 = sub i8 %55, %54 ; <i8> [#uses=1]
+ store i8 %56, i8* @sc, align 1
+ %57 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %58 = zext i8 %57 to i32 ; <i32> [#uses=1]
+ %59 = trunc i32 %58 to i8 ; <i8> [#uses=2]
+ %60 = call i8 @llvm.atomic.load.sub.i8.p0i8(i8* @uc, i8 %59) ; <i8> [#uses=1]
+ %61 = sub i8 %60, %59 ; <i8> [#uses=1]
+ store i8 %61, i8* @uc, align 1
+ %62 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %63 = zext i8 %62 to i32 ; <i32> [#uses=1]
+ %64 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %65 = trunc i32 %63 to i16 ; <i16> [#uses=2]
+ %66 = call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %64, i16 %65) ; <i16> [#uses=1]
+ %67 = sub i16 %66, %65 ; <i16> [#uses=1]
+ store i16 %67, i16* @ss, align 2
+ %68 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %69 = zext i8 %68 to i32 ; <i32> [#uses=1]
+ %70 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %71 = trunc i32 %69 to i16 ; <i16> [#uses=2]
+ %72 = call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %70, i16 %71) ; <i16> [#uses=1]
+ %73 = sub i16 %72, %71 ; <i16> [#uses=1]
+ store i16 %73, i16* @us, align 2
+ %74 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %75 = zext i8 %74 to i32 ; <i32> [#uses=2]
+ %76 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %77 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %76, i32 %75) ; <i32> [#uses=1]
+ %78 = sub i32 %77, %75 ; <i32> [#uses=1]
+ store i32 %78, i32* @si, align 4
+ %79 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %80 = zext i8 %79 to i32 ; <i32> [#uses=2]
+ %81 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %82 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %81, i32 %80) ; <i32> [#uses=1]
+ %83 = sub i32 %82, %80 ; <i32> [#uses=1]
+ store i32 %83, i32* @ui, align 4
+ %84 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %85 = zext i8 %84 to i32 ; <i32> [#uses=2]
+ %86 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %87 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %86, i32 %85) ; <i32> [#uses=1]
+ %88 = sub i32 %87, %85 ; <i32> [#uses=1]
+ store i32 %88, i32* @sl, align 4
+ %89 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %90 = zext i8 %89 to i32 ; <i32> [#uses=2]
+ %91 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %92 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %91, i32 %90) ; <i32> [#uses=1]
+ %93 = sub i32 %92, %90 ; <i32> [#uses=1]
+ store i32 %93, i32* @ul, align 4
+ %94 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %95 = zext i8 %94 to i64 ; <i64> [#uses=2]
+ %96 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %97 = call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %96, i64 %95) ; <i64> [#uses=1]
+ %98 = sub i64 %97, %95 ; <i64> [#uses=1]
+ store i64 %98, i64* @sll, align 8
+ %99 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %100 = zext i8 %99 to i64 ; <i64> [#uses=2]
+ %101 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %102 = call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %101, i64 %100) ; <i64> [#uses=1]
+ %103 = sub i64 %102, %100 ; <i64> [#uses=1]
+ store i64 %103, i64* @ull, align 8
+ %104 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %105 = zext i8 %104 to i32 ; <i32> [#uses=1]
+ %106 = trunc i32 %105 to i8 ; <i8> [#uses=2]
+ %107 = call i8 @llvm.atomic.load.or.i8.p0i8(i8* @sc, i8 %106) ; <i8> [#uses=1]
+ %108 = or i8 %107, %106 ; <i8> [#uses=1]
+ store i8 %108, i8* @sc, align 1
+ %109 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %110 = zext i8 %109 to i32 ; <i32> [#uses=1]
+ %111 = trunc i32 %110 to i8 ; <i8> [#uses=2]
+ %112 = call i8 @llvm.atomic.load.or.i8.p0i8(i8* @uc, i8 %111) ; <i8> [#uses=1]
+ %113 = or i8 %112, %111 ; <i8> [#uses=1]
+ store i8 %113, i8* @uc, align 1
+ %114 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %115 = zext i8 %114 to i32 ; <i32> [#uses=1]
+ %116 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %117 = trunc i32 %115 to i16 ; <i16> [#uses=2]
+ %118 = call i16 @llvm.atomic.load.or.i16.p0i16(i16* %116, i16 %117) ; <i16> [#uses=1]
+ %119 = or i16 %118, %117 ; <i16> [#uses=1]
+ store i16 %119, i16* @ss, align 2
+ %120 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %121 = zext i8 %120 to i32 ; <i32> [#uses=1]
+ %122 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %123 = trunc i32 %121 to i16 ; <i16> [#uses=2]
+ %124 = call i16 @llvm.atomic.load.or.i16.p0i16(i16* %122, i16 %123) ; <i16> [#uses=1]
+ %125 = or i16 %124, %123 ; <i16> [#uses=1]
+ store i16 %125, i16* @us, align 2
+ %126 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %127 = zext i8 %126 to i32 ; <i32> [#uses=2]
+ %128 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %129 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %128, i32 %127) ; <i32> [#uses=1]
+ %130 = or i32 %129, %127 ; <i32> [#uses=1]
+ store i32 %130, i32* @si, align 4
+ %131 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %132 = zext i8 %131 to i32 ; <i32> [#uses=2]
+ %133 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %134 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %133, i32 %132) ; <i32> [#uses=1]
+ %135 = or i32 %134, %132 ; <i32> [#uses=1]
+ store i32 %135, i32* @ui, align 4
+ %136 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %137 = zext i8 %136 to i32 ; <i32> [#uses=2]
+ %138 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %139 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %138, i32 %137) ; <i32> [#uses=1]
+ %140 = or i32 %139, %137 ; <i32> [#uses=1]
+ store i32 %140, i32* @sl, align 4
+ %141 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %142 = zext i8 %141 to i32 ; <i32> [#uses=2]
+ %143 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %144 = call i32 @llvm.atomic.load.or.i32.p0i32(i32* %143, i32 %142) ; <i32> [#uses=1]
+ %145 = or i32 %144, %142 ; <i32> [#uses=1]
+ store i32 %145, i32* @ul, align 4
+ %146 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %147 = zext i8 %146 to i64 ; <i64> [#uses=2]
+ %148 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %149 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %148, i64 %147) ; <i64> [#uses=1]
+ %150 = or i64 %149, %147 ; <i64> [#uses=1]
+ store i64 %150, i64* @sll, align 8
+ %151 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %152 = zext i8 %151 to i64 ; <i64> [#uses=2]
+ %153 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %154 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %153, i64 %152) ; <i64> [#uses=1]
+ %155 = or i64 %154, %152 ; <i64> [#uses=1]
+ store i64 %155, i64* @ull, align 8
+ %156 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %157 = zext i8 %156 to i32 ; <i32> [#uses=1]
+ %158 = trunc i32 %157 to i8 ; <i8> [#uses=2]
+ %159 = call i8 @llvm.atomic.load.xor.i8.p0i8(i8* @sc, i8 %158) ; <i8> [#uses=1]
+ %160 = xor i8 %159, %158 ; <i8> [#uses=1]
+ store i8 %160, i8* @sc, align 1
+ %161 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %162 = zext i8 %161 to i32 ; <i32> [#uses=1]
+ %163 = trunc i32 %162 to i8 ; <i8> [#uses=2]
+ %164 = call i8 @llvm.atomic.load.xor.i8.p0i8(i8* @uc, i8 %163) ; <i8> [#uses=1]
+ %165 = xor i8 %164, %163 ; <i8> [#uses=1]
+ store i8 %165, i8* @uc, align 1
+ %166 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %167 = zext i8 %166 to i32 ; <i32> [#uses=1]
+ %168 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %169 = trunc i32 %167 to i16 ; <i16> [#uses=2]
+ %170 = call i16 @llvm.atomic.load.xor.i16.p0i16(i16* %168, i16 %169) ; <i16> [#uses=1]
+ %171 = xor i16 %170, %169 ; <i16> [#uses=1]
+ store i16 %171, i16* @ss, align 2
+ %172 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %173 = zext i8 %172 to i32 ; <i32> [#uses=1]
+ %174 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %175 = trunc i32 %173 to i16 ; <i16> [#uses=2]
+ %176 = call i16 @llvm.atomic.load.xor.i16.p0i16(i16* %174, i16 %175) ; <i16> [#uses=1]
+ %177 = xor i16 %176, %175 ; <i16> [#uses=1]
+ store i16 %177, i16* @us, align 2
+ %178 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %179 = zext i8 %178 to i32 ; <i32> [#uses=2]
+ %180 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %181 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %180, i32 %179) ; <i32> [#uses=1]
+ %182 = xor i32 %181, %179 ; <i32> [#uses=1]
+ store i32 %182, i32* @si, align 4
+ %183 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %184 = zext i8 %183 to i32 ; <i32> [#uses=2]
+ %185 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %186 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %185, i32 %184) ; <i32> [#uses=1]
+ %187 = xor i32 %186, %184 ; <i32> [#uses=1]
+ store i32 %187, i32* @ui, align 4
+ %188 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %189 = zext i8 %188 to i32 ; <i32> [#uses=2]
+ %190 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %191 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %190, i32 %189) ; <i32> [#uses=1]
+ %192 = xor i32 %191, %189 ; <i32> [#uses=1]
+ store i32 %192, i32* @sl, align 4
+ %193 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %194 = zext i8 %193 to i32 ; <i32> [#uses=2]
+ %195 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %196 = call i32 @llvm.atomic.load.xor.i32.p0i32(i32* %195, i32 %194) ; <i32> [#uses=1]
+ %197 = xor i32 %196, %194 ; <i32> [#uses=1]
+ store i32 %197, i32* @ul, align 4
+ %198 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %199 = zext i8 %198 to i64 ; <i64> [#uses=2]
+ %200 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %201 = call i64 @llvm.atomic.load.xor.i64.p0i64(i64* %200, i64 %199) ; <i64> [#uses=1]
+ %202 = xor i64 %201, %199 ; <i64> [#uses=1]
+ store i64 %202, i64* @sll, align 8
+ %203 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %204 = zext i8 %203 to i64 ; <i64> [#uses=2]
+ %205 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %206 = call i64 @llvm.atomic.load.xor.i64.p0i64(i64* %205, i64 %204) ; <i64> [#uses=1]
+ %207 = xor i64 %206, %204 ; <i64> [#uses=1]
+ store i64 %207, i64* @ull, align 8
+ %208 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %209 = zext i8 %208 to i32 ; <i32> [#uses=1]
+ %210 = trunc i32 %209 to i8 ; <i8> [#uses=2]
+ %211 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @sc, i8 %210) ; <i8> [#uses=1]
+ %212 = and i8 %211, %210 ; <i8> [#uses=1]
+ store i8 %212, i8* @sc, align 1
+ %213 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %214 = zext i8 %213 to i32 ; <i32> [#uses=1]
+ %215 = trunc i32 %214 to i8 ; <i8> [#uses=2]
+ %216 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @uc, i8 %215) ; <i8> [#uses=1]
+ %217 = and i8 %216, %215 ; <i8> [#uses=1]
+ store i8 %217, i8* @uc, align 1
+ %218 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %219 = zext i8 %218 to i32 ; <i32> [#uses=1]
+ %220 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %221 = trunc i32 %219 to i16 ; <i16> [#uses=2]
+ %222 = call i16 @llvm.atomic.load.and.i16.p0i16(i16* %220, i16 %221) ; <i16> [#uses=1]
+ %223 = and i16 %222, %221 ; <i16> [#uses=1]
+ store i16 %223, i16* @ss, align 2
+ %224 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %225 = zext i8 %224 to i32 ; <i32> [#uses=1]
+ %226 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %227 = trunc i32 %225 to i16 ; <i16> [#uses=2]
+ %228 = call i16 @llvm.atomic.load.and.i16.p0i16(i16* %226, i16 %227) ; <i16> [#uses=1]
+ %229 = and i16 %228, %227 ; <i16> [#uses=1]
+ store i16 %229, i16* @us, align 2
+ %230 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %231 = zext i8 %230 to i32 ; <i32> [#uses=2]
+ %232 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %233 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %232, i32 %231) ; <i32> [#uses=1]
+ %234 = and i32 %233, %231 ; <i32> [#uses=1]
+ store i32 %234, i32* @si, align 4
+ %235 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %236 = zext i8 %235 to i32 ; <i32> [#uses=2]
+ %237 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %238 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %237, i32 %236) ; <i32> [#uses=1]
+ %239 = and i32 %238, %236 ; <i32> [#uses=1]
+ store i32 %239, i32* @ui, align 4
+ %240 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %241 = zext i8 %240 to i32 ; <i32> [#uses=2]
+ %242 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %243 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %242, i32 %241) ; <i32> [#uses=1]
+ %244 = and i32 %243, %241 ; <i32> [#uses=1]
+ store i32 %244, i32* @sl, align 4
+ %245 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %246 = zext i8 %245 to i32 ; <i32> [#uses=2]
+ %247 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %248 = call i32 @llvm.atomic.load.and.i32.p0i32(i32* %247, i32 %246) ; <i32> [#uses=1]
+ %249 = and i32 %248, %246 ; <i32> [#uses=1]
+ store i32 %249, i32* @ul, align 4
+ %250 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %251 = zext i8 %250 to i64 ; <i64> [#uses=2]
+ %252 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %253 = call i64 @llvm.atomic.load.and.i64.p0i64(i64* %252, i64 %251) ; <i64> [#uses=1]
+ %254 = and i64 %253, %251 ; <i64> [#uses=1]
+ store i64 %254, i64* @sll, align 8
+ %255 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %256 = zext i8 %255 to i64 ; <i64> [#uses=2]
+ %257 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %258 = call i64 @llvm.atomic.load.and.i64.p0i64(i64* %257, i64 %256) ; <i64> [#uses=1]
+ %259 = and i64 %258, %256 ; <i64> [#uses=1]
+ store i64 %259, i64* @ull, align 8
+ %260 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %261 = zext i8 %260 to i32 ; <i32> [#uses=1]
+ %262 = trunc i32 %261 to i8 ; <i8> [#uses=2]
+ %263 = call i8 @llvm.atomic.load.nand.i8.p0i8(i8* @sc, i8 %262) ; <i8> [#uses=1]
+ %264 = xor i8 %263, -1 ; <i8> [#uses=1]
+ %265 = and i8 %264, %262 ; <i8> [#uses=1]
+ store i8 %265, i8* @sc, align 1
+ %266 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %267 = zext i8 %266 to i32 ; <i32> [#uses=1]
+ %268 = trunc i32 %267 to i8 ; <i8> [#uses=2]
+ %269 = call i8 @llvm.atomic.load.nand.i8.p0i8(i8* @uc, i8 %268) ; <i8> [#uses=1]
+ %270 = xor i8 %269, -1 ; <i8> [#uses=1]
+ %271 = and i8 %270, %268 ; <i8> [#uses=1]
+ store i8 %271, i8* @uc, align 1
+ %272 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %273 = zext i8 %272 to i32 ; <i32> [#uses=1]
+ %274 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %275 = trunc i32 %273 to i16 ; <i16> [#uses=2]
+ %276 = call i16 @llvm.atomic.load.nand.i16.p0i16(i16* %274, i16 %275) ; <i16> [#uses=1]
+ %277 = xor i16 %276, -1 ; <i16> [#uses=1]
+ %278 = and i16 %277, %275 ; <i16> [#uses=1]
+ store i16 %278, i16* @ss, align 2
+ %279 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %280 = zext i8 %279 to i32 ; <i32> [#uses=1]
+ %281 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %282 = trunc i32 %280 to i16 ; <i16> [#uses=2]
+ %283 = call i16 @llvm.atomic.load.nand.i16.p0i16(i16* %281, i16 %282) ; <i16> [#uses=1]
+ %284 = xor i16 %283, -1 ; <i16> [#uses=1]
+ %285 = and i16 %284, %282 ; <i16> [#uses=1]
+ store i16 %285, i16* @us, align 2
+ %286 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %287 = zext i8 %286 to i32 ; <i32> [#uses=2]
+ %288 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %289 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %288, i32 %287) ; <i32> [#uses=1]
+ %290 = xor i32 %289, -1 ; <i32> [#uses=1]
+ %291 = and i32 %290, %287 ; <i32> [#uses=1]
+ store i32 %291, i32* @si, align 4
+ %292 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %293 = zext i8 %292 to i32 ; <i32> [#uses=2]
+ %294 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %295 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %294, i32 %293) ; <i32> [#uses=1]
+ %296 = xor i32 %295, -1 ; <i32> [#uses=1]
+ %297 = and i32 %296, %293 ; <i32> [#uses=1]
+ store i32 %297, i32* @ui, align 4
+ %298 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %299 = zext i8 %298 to i32 ; <i32> [#uses=2]
+ %300 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %301 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %300, i32 %299) ; <i32> [#uses=1]
+ %302 = xor i32 %301, -1 ; <i32> [#uses=1]
+ %303 = and i32 %302, %299 ; <i32> [#uses=1]
+ store i32 %303, i32* @sl, align 4
+ %304 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %305 = zext i8 %304 to i32 ; <i32> [#uses=2]
+ %306 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %307 = call i32 @llvm.atomic.load.nand.i32.p0i32(i32* %306, i32 %305) ; <i32> [#uses=1]
+ %308 = xor i32 %307, -1 ; <i32> [#uses=1]
+ %309 = and i32 %308, %305 ; <i32> [#uses=1]
+ store i32 %309, i32* @ul, align 4
+ %310 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %311 = zext i8 %310 to i64 ; <i64> [#uses=2]
+ %312 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ %313 = call i64 @llvm.atomic.load.nand.i64.p0i64(i64* %312, i64 %311) ; <i64> [#uses=1]
+ %314 = xor i64 %313, -1 ; <i64> [#uses=1]
+ %315 = and i64 %314, %311 ; <i64> [#uses=1]
+ store i64 %315, i64* @sll, align 8
+ %316 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %317 = zext i8 %316 to i64 ; <i64> [#uses=2]
+ %318 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ %319 = call i64 @llvm.atomic.load.nand.i64.p0i64(i64* %318, i64 %317) ; <i64> [#uses=1]
+ %320 = xor i64 %319, -1 ; <i64> [#uses=1]
+ %321 = and i64 %320, %317 ; <i64> [#uses=1]
+ store i64 %321, i64* @ull, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_compare_and_swap() nounwind {
+entry:
+ %0 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %1 = zext i8 %0 to i32 ; <i32> [#uses=1]
+ %2 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %3 = zext i8 %2 to i32 ; <i32> [#uses=1]
+ %4 = trunc i32 %3 to i8 ; <i8> [#uses=1]
+ %5 = trunc i32 %1 to i8 ; <i8> [#uses=1]
+ %6 = call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* @sc, i8 %4, i8 %5) ; <i8> [#uses=1]
+ store i8 %6, i8* @sc, align 1
+ %7 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %8 = zext i8 %7 to i32 ; <i32> [#uses=1]
+ %9 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %10 = zext i8 %9 to i32 ; <i32> [#uses=1]
+ %11 = trunc i32 %10 to i8 ; <i8> [#uses=1]
+ %12 = trunc i32 %8 to i8 ; <i8> [#uses=1]
+ %13 = call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* @uc, i8 %11, i8 %12) ; <i8> [#uses=1]
+ store i8 %13, i8* @uc, align 1
+ %14 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %15 = sext i8 %14 to i16 ; <i16> [#uses=1]
+ %16 = zext i16 %15 to i32 ; <i32> [#uses=1]
+ %17 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %18 = zext i8 %17 to i32 ; <i32> [#uses=1]
+ %19 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %20 = trunc i32 %18 to i16 ; <i16> [#uses=1]
+ %21 = trunc i32 %16 to i16 ; <i16> [#uses=1]
+ %22 = call i16 @llvm.atomic.cmp.swap.i16.p0i16(i16* %19, i16 %20, i16 %21) ; <i16> [#uses=1]
+ store i16 %22, i16* @ss, align 2
+ %23 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %24 = sext i8 %23 to i16 ; <i16> [#uses=1]
+ %25 = zext i16 %24 to i32 ; <i32> [#uses=1]
+ %26 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %27 = zext i8 %26 to i32 ; <i32> [#uses=1]
+ %28 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %29 = trunc i32 %27 to i16 ; <i16> [#uses=1]
+ %30 = trunc i32 %25 to i16 ; <i16> [#uses=1]
+ %31 = call i16 @llvm.atomic.cmp.swap.i16.p0i16(i16* %28, i16 %29, i16 %30) ; <i16> [#uses=1]
+ store i16 %31, i16* @us, align 2
+ %32 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %33 = sext i8 %32 to i32 ; <i32> [#uses=1]
+ %34 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %35 = zext i8 %34 to i32 ; <i32> [#uses=1]
+ %36 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %37 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %36, i32 %35, i32 %33) ; <i32> [#uses=1]
+ store i32 %37, i32* @si, align 4
+ %38 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %39 = sext i8 %38 to i32 ; <i32> [#uses=1]
+ %40 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %41 = zext i8 %40 to i32 ; <i32> [#uses=1]
+ %42 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %43 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %42, i32 %41, i32 %39) ; <i32> [#uses=1]
+ store i32 %43, i32* @ui, align 4
+ %44 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %45 = sext i8 %44 to i32 ; <i32> [#uses=1]
+ %46 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %47 = zext i8 %46 to i32 ; <i32> [#uses=1]
+ %48 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %49 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %48, i32 %47, i32 %45) ; <i32> [#uses=1]
+ store i32 %49, i32* @sl, align 4
+ %50 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %51 = sext i8 %50 to i32 ; <i32> [#uses=1]
+ %52 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %53 = zext i8 %52 to i32 ; <i32> [#uses=1]
+ %54 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %55 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %54, i32 %53, i32 %51) ; <i32> [#uses=1]
+ store i32 %55, i32* @ul, align 4
+ %56 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %57 = zext i8 %56 to i32 ; <i32> [#uses=1]
+ %58 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %59 = zext i8 %58 to i32 ; <i32> [#uses=1]
+ %60 = trunc i32 %59 to i8 ; <i8> [#uses=2]
+ %61 = trunc i32 %57 to i8 ; <i8> [#uses=1]
+ %62 = call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* @sc, i8 %60, i8 %61) ; <i8> [#uses=1]
+ %63 = icmp eq i8 %62, %60 ; <i1> [#uses=1]
+ %64 = zext i1 %63 to i8 ; <i8> [#uses=1]
+ %65 = zext i8 %64 to i32 ; <i32> [#uses=1]
+ store i32 %65, i32* @ui, align 4
+ %66 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %67 = zext i8 %66 to i32 ; <i32> [#uses=1]
+ %68 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %69 = zext i8 %68 to i32 ; <i32> [#uses=1]
+ %70 = trunc i32 %69 to i8 ; <i8> [#uses=2]
+ %71 = trunc i32 %67 to i8 ; <i8> [#uses=1]
+ %72 = call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* @uc, i8 %70, i8 %71) ; <i8> [#uses=1]
+ %73 = icmp eq i8 %72, %70 ; <i1> [#uses=1]
+ %74 = zext i1 %73 to i8 ; <i8> [#uses=1]
+ %75 = zext i8 %74 to i32 ; <i32> [#uses=1]
+ store i32 %75, i32* @ui, align 4
+ %76 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %77 = sext i8 %76 to i16 ; <i16> [#uses=1]
+ %78 = zext i16 %77 to i32 ; <i32> [#uses=1]
+ %79 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %80 = zext i8 %79 to i32 ; <i32> [#uses=1]
+ %81 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %82 = trunc i32 %80 to i16 ; <i16> [#uses=2]
+ %83 = trunc i32 %78 to i16 ; <i16> [#uses=1]
+ %84 = call i16 @llvm.atomic.cmp.swap.i16.p0i16(i16* %81, i16 %82, i16 %83) ; <i16> [#uses=1]
+ %85 = icmp eq i16 %84, %82 ; <i1> [#uses=1]
+ %86 = zext i1 %85 to i8 ; <i8> [#uses=1]
+ %87 = zext i8 %86 to i32 ; <i32> [#uses=1]
+ store i32 %87, i32* @ui, align 4
+ %88 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %89 = sext i8 %88 to i16 ; <i16> [#uses=1]
+ %90 = zext i16 %89 to i32 ; <i32> [#uses=1]
+ %91 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %92 = zext i8 %91 to i32 ; <i32> [#uses=1]
+ %93 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %94 = trunc i32 %92 to i16 ; <i16> [#uses=2]
+ %95 = trunc i32 %90 to i16 ; <i16> [#uses=1]
+ %96 = call i16 @llvm.atomic.cmp.swap.i16.p0i16(i16* %93, i16 %94, i16 %95) ; <i16> [#uses=1]
+ %97 = icmp eq i16 %96, %94 ; <i1> [#uses=1]
+ %98 = zext i1 %97 to i8 ; <i8> [#uses=1]
+ %99 = zext i8 %98 to i32 ; <i32> [#uses=1]
+ store i32 %99, i32* @ui, align 4
+ %100 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %101 = sext i8 %100 to i32 ; <i32> [#uses=1]
+ %102 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %103 = zext i8 %102 to i32 ; <i32> [#uses=2]
+ %104 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %105 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %104, i32 %103, i32 %101) ; <i32> [#uses=1]
+ %106 = icmp eq i32 %105, %103 ; <i1> [#uses=1]
+ %107 = zext i1 %106 to i8 ; <i8> [#uses=1]
+ %108 = zext i8 %107 to i32 ; <i32> [#uses=1]
+ store i32 %108, i32* @ui, align 4
+ %109 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %110 = sext i8 %109 to i32 ; <i32> [#uses=1]
+ %111 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %112 = zext i8 %111 to i32 ; <i32> [#uses=2]
+ %113 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %114 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %113, i32 %112, i32 %110) ; <i32> [#uses=1]
+ %115 = icmp eq i32 %114, %112 ; <i1> [#uses=1]
+ %116 = zext i1 %115 to i8 ; <i8> [#uses=1]
+ %117 = zext i8 %116 to i32 ; <i32> [#uses=1]
+ store i32 %117, i32* @ui, align 4
+ %118 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %119 = sext i8 %118 to i32 ; <i32> [#uses=1]
+ %120 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %121 = zext i8 %120 to i32 ; <i32> [#uses=2]
+ %122 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %123 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %122, i32 %121, i32 %119) ; <i32> [#uses=1]
+ %124 = icmp eq i32 %123, %121 ; <i1> [#uses=1]
+ %125 = zext i1 %124 to i8 ; <i8> [#uses=1]
+ %126 = zext i8 %125 to i32 ; <i32> [#uses=1]
+ store i32 %126, i32* @ui, align 4
+ %127 = load i8* @sc, align 1 ; <i8> [#uses=1]
+ %128 = sext i8 %127 to i32 ; <i32> [#uses=1]
+ %129 = load i8* @uc, align 1 ; <i8> [#uses=1]
+ %130 = zext i8 %129 to i32 ; <i32> [#uses=2]
+ %131 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %132 = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %131, i32 %130, i32 %128) ; <i32> [#uses=1]
+ %133 = icmp eq i32 %132, %130 ; <i1> [#uses=1]
+ %134 = zext i1 %133 to i8 ; <i8> [#uses=1]
+ %135 = zext i8 %134 to i32 ; <i32> [#uses=1]
+ store i32 %135, i32* @ui, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8*, i8, i8) nounwind
+
+declare i16 @llvm.atomic.cmp.swap.i16.p0i16(i16*, i16, i16) nounwind
+
+declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind
+
+define void @test_lock() nounwind {
+entry:
+ %0 = call i8 @llvm.atomic.swap.i8.p0i8(i8* @sc, i8 1) ; <i8> [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ %1 = call i8 @llvm.atomic.swap.i8.p0i8(i8* @uc, i8 1) ; <i8> [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ %2 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ %3 = call i16 @llvm.atomic.swap.i16.p0i16(i16* %2, i16 1) ; <i16> [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ %4 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ %5 = call i16 @llvm.atomic.swap.i16.p0i16(i16* %4, i16 1) ; <i16> [#uses=1]
+ store i16 %5, i16* @us, align 2
+ %6 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ %7 = call i32 @llvm.atomic.swap.i32.p0i32(i32* %6, i32 1) ; <i32> [#uses=1]
+ store i32 %7, i32* @si, align 4
+ %8 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ %9 = call i32 @llvm.atomic.swap.i32.p0i32(i32* %8, i32 1) ; <i32> [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ %10 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ %11 = call i32 @llvm.atomic.swap.i32.p0i32(i32* %10, i32 1) ; <i32> [#uses=1]
+ store i32 %11, i32* @sl, align 4
+ %12 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ %13 = call i32 @llvm.atomic.swap.i32.p0i32(i32* %12, i32 1) ; <i32> [#uses=1]
+ store i32 %13, i32* @ul, align 4
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false)
+ volatile store i8 0, i8* @sc, align 1
+ volatile store i8 0, i8* @uc, align 1
+ %14 = bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*> [#uses=1]
+ volatile store i16 0, i16* %14, align 2
+ %15 = bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*> [#uses=1]
+ volatile store i16 0, i16* %15, align 2
+ %16 = bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*> [#uses=1]
+ volatile store i32 0, i32* %16, align 4
+ %17 = bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*> [#uses=1]
+ volatile store i32 0, i32* %17, align 4
+ %18 = bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*> [#uses=1]
+ volatile store i32 0, i32* %18, align 4
+ %19 = bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*> [#uses=1]
+ volatile store i32 0, i32* %19, align 4
+ %20 = bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*> [#uses=1]
+ volatile store i64 0, i64* %20, align 8
+ %21 = bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*> [#uses=1]
+ volatile store i64 0, i64* %21, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.swap.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.swap.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
diff --git a/test/CodeGen/X86/2008-10-06-MMXISelBug.ll b/test/CodeGen/X86/2008-10-06-MMXISelBug.ll
new file mode 100644
index 0000000..7f7b1a4
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-06-MMXISelBug.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2
+; PR2850
+
+@tmp_V2i = common global <2 x i32> zeroinitializer ; <<2 x i32>*> [#uses=2]
+
+define void @f0() nounwind {
+entry:
+ %0 = load <2 x i32>* @tmp_V2i, align 8 ; <<2 x i32>> [#uses=1]
+ %1 = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer ; <<2 x i32>> [#uses=1]
+ store <2 x i32> %1, <2 x i32>* @tmp_V2i, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll b/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll
new file mode 100644
index 0000000..a135cd4
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll
@@ -0,0 +1,13 @@
+; ModuleID = 'nan.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldl
+; This NaN should be shortened to a double (not a float).
+
+declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f)
+
+define i32 @main() {
+entry_nan.main:
+ call x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 0xK7FFFC001234000000800)
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll b/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll
new file mode 100644
index 0000000..bd48105
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll
@@ -0,0 +1,18 @@
+; ModuleID = 'nan.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldt | count 3
+; it is not safe to shorten any of these NaNs.
+
+declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f)
+
+@_D3nan4rvale = global x86_fp80 0xK7FFF8001234000000000 ; <x86_fp80*> [#uses=1]
+
+define i32 @main() {
+entry_nan.main:
+ %tmp = load x86_fp80* @_D3nan4rvale ; <x86_fp80> [#uses=1]
+ call x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %tmp)
+ call x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 0xK7FFF8001234000000000)
+ call x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 0xK7FFFC001234000000400)
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2008-10-07-SSEISelBug.ll b/test/CodeGen/X86/2008-10-07-SSEISelBug.ll
new file mode 100644
index 0000000..bc57612
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-07-SSEISelBug.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86 -mattr=+sse,-sse2
+
+define <4 x float> @f(float %w) nounwind {
+entry:
+ %retval = alloca <4 x float> ; <<4 x float>*> [#uses=2]
+ %w.addr = alloca float ; <float*> [#uses=2]
+ %.compoundliteral = alloca <4 x float> ; <<4 x float>*> [#uses=2]
+ store float %w, float* %w.addr
+ %tmp = load float* %w.addr ; <float> [#uses=1]
+ %0 = insertelement <4 x float> undef, float %tmp, i32 0 ; <<4 x float>> [#uses=1]
+ %1 = insertelement <4 x float> %0, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
+ %2 = insertelement <4 x float> %1, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %3 = insertelement <4 x float> %2, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %3, <4 x float>* %.compoundliteral
+ %tmp1 = load <4 x float>* %.compoundliteral ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp1, <4 x float>* %retval
+ br label %return
+
+return: ; preds = %entry
+ %4 = load <4 x float>* %retval ; <<4 x float>> [#uses=1]
+ ret <4 x float> %4
+}
diff --git a/test/CodeGen/X86/2008-10-11-CallCrash.ll b/test/CodeGen/X86/2008-10-11-CallCrash.ll
new file mode 100644
index 0000000..efc6125
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-11-CallCrash.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s
+; PR2735
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+@g_385 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @func_45(i64 %p_46, i32 %p_48) nounwind {
+entry:
+ %0 = tail call i32 (...)* @lshift_s_u(i64 %p_46, i64 0) nounwind ; <i32> [#uses=0]
+ %1 = load i32* @g_385, align 4 ; <i32> [#uses=1]
+ %2 = shl i32 %1, 1 ; <i32> [#uses=1]
+ %3 = and i32 %2, 32 ; <i32> [#uses=1]
+ %4 = tail call i32 (...)* @func_87(i32 undef, i32 %p_48, i32 1) nounwind ; <i32> [#uses=1]
+ %5 = add i32 %3, %4 ; <i32> [#uses=1]
+ %6 = tail call i32 (...)* @div_rhs(i32 %5) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @lshift_s_u(...)
+declare i32 @func_87(...)
+declare i32 @div_rhs(...)
diff --git a/test/CodeGen/X86/2008-10-13-CoalescerBug.ll b/test/CodeGen/X86/2008-10-13-CoalescerBug.ll
new file mode 100644
index 0000000..4d3f8c2
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-13-CoalescerBug.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=x86
+; PR2775
+
+define i32 @func_77(i8 zeroext %p_79) nounwind {
+entry:
+ %0 = tail call i32 (...)* @func_43(i32 1) nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb3, label %bb
+
+bb: ; preds = %entry
+ br label %bb3
+
+bb3: ; preds = %bb, %entry
+ %p_79_addr.0 = phi i8 [ 0, %bb ], [ %p_79, %entry ] ; <i8> [#uses=1]
+ %2 = zext i8 %p_79_addr.0 to i32 ; <i32> [#uses=2]
+ %3 = zext i1 false to i32 ; <i32> [#uses=2]
+ %4 = tail call i32 (...)* @rshift_u_s(i32 1) nounwind ; <i32> [#uses=0]
+ %5 = lshr i32 %2, %2 ; <i32> [#uses=3]
+ %6 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %6, label %bb6, label %bb9
+
+bb6: ; preds = %bb3
+ %7 = ashr i32 %5, %3 ; <i32> [#uses=1]
+ %8 = icmp eq i32 %7, 0 ; <i1> [#uses=1]
+ %9 = select i1 %8, i32 %3, i32 0 ; <i32> [#uses=1]
+ %. = shl i32 %5, %9 ; <i32> [#uses=1]
+ br label %bb9
+
+bb9: ; preds = %bb6, %bb3
+ %.0 = phi i32 [ %., %bb6 ], [ %5, %bb3 ] ; <i32> [#uses=0]
+ br i1 false, label %return, label %bb10
+
+bb10: ; preds = %bb9
+ ret i32 undef
+
+return: ; preds = %bb9
+ ret i32 undef
+}
+
+declare i32 @func_43(...)
+
+declare i32 @rshift_u_s(...)
diff --git a/test/CodeGen/X86/2008-10-16-SpillerBug.ll b/test/CodeGen/X86/2008-10-16-SpillerBug.ll
new file mode 100644
index 0000000..b8ca364
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-16-SpillerBug.ll
@@ -0,0 +1,155 @@
+; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*edi}
+
+ %struct.XXDActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 }
+ %struct.XXDAlphaTest = type { float, i16, i8, i8 }
+ %struct.XXDArrayRange = type { i8, i8, i8, i8 }
+ %struct.XXDBlendMode = type { i16, i16, i16, i16, %struct.XXTColor4, i16, i16, i8, i8, i8, i8 }
+ %struct.XXDClearColor = type { double, %struct.XXTColor4, %struct.XXTColor4, float, i32 }
+ %struct.XXDClipPlane = type { i32, [6 x %struct.XXTColor4] }
+ %struct.XXDColorBuffer = type { i16, i8, i8, [8 x i16], i8, i8, i8, i8 }
+ %struct.XXDColorMatrix = type { [16 x float]*, %struct.XXDImagingCC }
+ %struct.XXDConvolution = type { %struct.XXTColor4, %struct.XXDImagingCC, i16, i16, [0 x i32], float*, i32, i32 }
+ %struct.XXDDepthTest = type { i16, i16, i8, i8, i8, i8, double, double }
+ %struct.XXDFixedFunction = type { %struct.YYToken* }
+ %struct.XXDFogMode = type { %struct.XXTColor4, float, float, float, float, float, i16, i16, i16, i8, i8 }
+ %struct.XXDHintMode = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 }
+ %struct.XXDHistogram = type { %struct.XXTFixedColor4*, i32, i16, i8, i8 }
+ %struct.XXDImagingCC = type { { float, float }, { float, float }, { float, float }, { float, float } }
+ %struct.XXDImagingSubset = type { %struct.XXDConvolution, %struct.XXDConvolution, %struct.XXDConvolution, %struct.XXDColorMatrix, %struct.XXDMinmax, %struct.XXDHistogram, %struct.XXDImagingCC, %struct.XXDImagingCC, %struct.XXDImagingCC, %struct.XXDImagingCC, i32, [0 x i32] }
+ %struct.XXDLight = type { %struct.XXTColor4, %struct.XXTColor4, %struct.XXTColor4, %struct.XXTColor4, %struct.XXTCoord3, float, float, float, float, float, %struct.XXTCoord3, float, %struct.XXTCoord3, float, %struct.XXTCoord3, float, float, float, float, float }
+ %struct.XXDLightModel = type { %struct.XXTColor4, [8 x %struct.XXDLight], [2 x %struct.XXDMaterial], i32, i16, i16, i16, i8, i8, i8, i8, i8, i8 }
+ %struct.XXDLightProduct = type { %struct.XXTColor4, %struct.XXTColor4, %struct.XXTColor4 }
+ %struct.XXDLineMode = type { float, i32, i16, i16, i8, i8, i8, i8 }
+ %struct.XXDLogicOp = type { i16, i8, i8 }
+ %struct.XXDMaskMode = type { i32, [3 x i32], i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XXDMaterial = type { %struct.XXTColor4, %struct.XXTColor4, %struct.XXTColor4, %struct.XXTColor4, float, float, float, float, [8 x %struct.XXDLightProduct], %struct.XXTColor4, [8 x i32] }
+ %struct.XXDMinmax = type { %struct.XXDMinmaxTable*, i16, i8, i8, [0 x i32] }
+ %struct.XXDMinmaxTable = type { %struct.XXTColor4, %struct.XXTColor4 }
+ %struct.XXDMultisample = type { float, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XXDPipelineProgramState = type { i8, i8, i8, i8, [0 x i32], %struct.XXTColor4* }
+ %struct.XXDPixelMap = type { i32*, float*, float*, float*, float*, float*, float*, float*, float*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.XXDPixelMode = type { float, float, %struct.XXDPixelStore, %struct.XXDPixelTransfer, %struct.XXDPixelMap, %struct.XXDImagingSubset, i32, i32 }
+ %struct.XXDPixelPack = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8 }
+ %struct.XXDPixelStore = type { %struct.XXDPixelPack, %struct.XXDPixelPack }
+ %struct.XXDPixelTransfer = type { float, float, float, float, float, float, float, float, float, float, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }
+ %struct.XXDPointMode = type { float, float, float, float, %struct.XXTCoord3, float, i8, i8, i8, i8, i16, i16, i32, i16, i16 }
+ %struct.XXDPolygonMode = type { [128 x i8], float, float, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XXDRegisterCombiners = type { i8, i8, i8, i8, i32, [2 x %struct.XXTColor4], [8 x %struct.XXDRegisterCombinersPerStageState], %struct.XXDRegisterCombinersFinalStageState }
+ %struct.XXDRegisterCombinersFinalStageState = type { i8, i8, i8, i8, [7 x %struct.XXDRegisterCombinersPerVariableState] }
+ %struct.XXDRegisterCombinersPerPortionState = type { [4 x %struct.XXDRegisterCombinersPerVariableState], i8, i8, i8, i8, i16, i16, i16, i16, i16, i16 }
+ %struct.XXDRegisterCombinersPerStageState = type { [2 x %struct.XXDRegisterCombinersPerPortionState], [2 x %struct.XXTColor4] }
+ %struct.XXDRegisterCombinersPerVariableState = type { i16, i16, i16, i16 }
+ %struct.XXDScissorTest = type { %struct.XXTFixedColor4, i8, i8, i8, i8 }
+ %struct.XXDState = type <{ i16, i16, i16, i16, i32, i32, [256 x %struct.XXTColor4], [128 x %struct.XXTColor4], %struct.XXDViewport, %struct.XXDTransform, %struct.XXDLightModel, %struct.XXDActiveTextureTargets, %struct.XXDAlphaTest, %struct.XXDBlendMode, %struct.XXDClearColor, %struct.XXDColorBuffer, %struct.XXDDepthTest, %struct.XXDArrayRange, %struct.XXDFogMode, %struct.XXDHintMode, %struct.XXDLineMode, %struct.XXDLogicOp, %struct.XXDMaskMode, %struct.XXDPixelMode, %struct.XXDPointMode, %struct.XXDPolygonMode, %struct.XXDScissorTest, i32, %struct.XXDStencilTest, [8 x %struct.XXDTextureMode], [16 x %struct.XXDTextureImageMode], %struct.XXDArrayRange, [8 x %struct.XXDTextureCoordGen], %struct.XXDClipPlane, %struct.XXDMultisample, %struct.XXDRegisterCombiners, %struct.XXDArrayRange, %struct.XXDArrayRange, [3 x %struct.XXDPipelineProgramState], %struct.XXDArrayRange, %struct.XXDTransformFeedback, i32*, %struct.XXDFixedFunction, [3 x i32], [2 x i32] }>
+ %struct.XXDStencilTest = type { [3 x { i32, i32, i16, i16, i16, i16 }], i32, [4 x i8] }
+ %struct.XXDTextureCoordGen = type { { i16, i16, %struct.XXTColor4, %struct.XXTColor4 }, { i16, i16, %struct.XXTColor4, %struct.XXTColor4 }, { i16, i16, %struct.XXTColor4, %struct.XXTColor4 }, { i16, i16, %struct.XXTColor4, %struct.XXTColor4 }, i8, i8, i8, i8 }
+ %struct.XXDTextureImageMode = type { float }
+ %struct.XXDTextureMode = type { %struct.XXTColor4, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, float, float, i16, i16, i16, i16, i16, i16, [4 x i16], i8, i8, i8, i8, [3 x float], [4 x float], float, float }
+ %struct.XXDTextureRec = type opaque
+ %struct.XXDTransform = type <{ [24 x [16 x float]], [24 x [16 x float]], [16 x float], float, float, float, float, float, i8, i8, i8, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i32 }>
+ %struct.XXDTransformFeedback = type { i8, i8, i8, i8, [0 x i32], [16 x i32], [16 x i32] }
+ %struct.XXDViewport = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, double, double, i32, i32, i32, i32, float, float, float, float }
+ %struct.XXTColor4 = type { float, float, float, float }
+ %struct.XXTCoord3 = type { float, float, float }
+ %struct.XXTFixedColor4 = type { i32, i32, i32, i32 }
+ %struct.XXVMTextures = type { [16 x %struct.XXDTextureRec*] }
+ %struct.XXVMVPContext = type { i32 }
+ %struct.XXVMVPStack = type { i32, i32 }
+ %struct.YYToken = type { { i16, i16, i32 } }
+ %struct._XXVMConstants = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, float, float, float, float, float, float, float, float, float, float, float, float, [256 x float], [4096 x i8], [8 x float], [48 x float], [128 x float], [528 x i8], { void (i8*, i8*, i32, i8*)*, float (float)*, float (float)*, float (float)*, i32 (float)* } }
[email protected] = appending global [1 x i8*] [ i8* bitcast (void (%struct.XXDState*, <4 x float>*, <4 x float>**, %struct._XXVMConstants*, %struct.YYToken*, %struct.XXVMVPContext*, %struct.XXVMTextures*, %struct.XXVMVPStack*, <4 x float>*, <4 x float>*, <4 x float>*, <4 x float>*, <4 x float>*, <4 x float>*, <4 x float>*, <4 x float>*, [4 x <4 x float>]*, i32*, <4 x i32>*, i64)* @t to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @t(%struct.XXDState* %gldst, <4 x float>* %prgrm, <4 x float>** %buffs, %struct._XXVMConstants* %cnstn, %struct.YYToken* %pstrm, %struct.XXVMVPContext* %vmctx, %struct.XXVMTextures* %txtrs, %struct.XXVMVPStack* %vpstk, <4 x float>* %atr0, <4 x float>* %atr1, <4 x float>* %atr2, <4 x float>* %atr3, <4 x float>* %vtx0, <4 x float>* %vtx1, <4 x float>* %vtx2, <4 x float>* %vtx3, [4 x <4 x float>]* %tmpGbl, i32* %oldMsk, <4 x i32>* %adrGbl, i64 %key_token) nounwind {
+entry:
+ %0 = trunc i64 %key_token to i32 ; <i32> [#uses=1]
+ %1 = getelementptr %struct.YYToken* %pstrm, i32 %0 ; <%struct.YYToken*> [#uses=5]
+ br label %bb1132
+
+bb51: ; preds = %bb1132
+ %2 = getelementptr %struct.YYToken* %1, i32 %operation.0.rec, i32 0, i32 0 ; <i16*> [#uses=1]
+ %3 = load i16* %2, align 1 ; <i16> [#uses=3]
+ %4 = lshr i16 %3, 6 ; <i16> [#uses=1]
+ %5 = trunc i16 %4 to i8 ; <i8> [#uses=1]
+ %6 = zext i8 %5 to i32 ; <i32> [#uses=1]
+ %7 = trunc i16 %3 to i8 ; <i8> [#uses=1]
+ %8 = and i8 %7, 7 ; <i8> [#uses=1]
+ %mask5556 = zext i8 %8 to i32 ; <i32> [#uses=3]
+ %.sum1324 = add i32 %mask5556, 2 ; <i32> [#uses=1]
+ %.rec = add i32 %operation.0.rec, %.sum1324 ; <i32> [#uses=1]
+ %9 = bitcast %struct.YYToken* %operation.0 to i32* ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 1 ; <i32> [#uses=1]
+ %11 = lshr i32 %10, 16 ; <i32> [#uses=2]
+ %12 = trunc i32 %11 to i8 ; <i8> [#uses=1]
+ %13 = and i8 %12, 1 ; <i8> [#uses=1]
+ %14 = lshr i16 %3, 15 ; <i16> [#uses=1]
+ %15 = trunc i16 %14 to i8 ; <i8> [#uses=1]
+ %16 = or i8 %13, %15 ; <i8> [#uses=1]
+ %17 = icmp eq i8 %16, 0 ; <i1> [#uses=1]
+ br i1 %17, label %bb94, label %bb75
+
+bb75: ; preds = %bb51
+ %18 = getelementptr %struct.YYToken* %1, i32 0, i32 0, i32 0 ; <i16*> [#uses=1]
+ %19 = load i16* %18, align 4 ; <i16> [#uses=1]
+ %20 = load i16* null, align 2 ; <i16> [#uses=1]
+ %21 = zext i16 %19 to i64 ; <i64> [#uses=1]
+ %22 = zext i16 %20 to i64 ; <i64> [#uses=1]
+ %23 = shl i64 %22, 16 ; <i64> [#uses=1]
+ %.ins1177 = or i64 %23, %21 ; <i64> [#uses=1]
+ %.ins1175 = or i64 %.ins1177, 0 ; <i64> [#uses=1]
+ %24 = and i32 %11, 1 ; <i32> [#uses=1]
+ %.neg1333 = sub i32 %mask5556, %24 ; <i32> [#uses=1]
+ %.neg1335 = sub i32 %.neg1333, 0 ; <i32> [#uses=1]
+ %25 = sub i32 %.neg1335, 0 ; <i32> [#uses=1]
+ br label %bb94
+
+bb94: ; preds = %bb75, %bb51
+ %extraToken.0 = phi i64 [ %.ins1175, %bb75 ], [ %extraToken.1, %bb51 ] ; <i64> [#uses=1]
+ %argCount.0 = phi i32 [ %25, %bb75 ], [ %mask5556, %bb51 ] ; <i32> [#uses=1]
+ %operation.0.sum1392 = add i32 %operation.0.rec, 1 ; <i32> [#uses=2]
+ %26 = getelementptr %struct.YYToken* %1, i32 %operation.0.sum1392, i32 0, i32 0 ; <i16*> [#uses=1]
+ %27 = load i16* %26, align 4 ; <i16> [#uses=1]
+ %28 = getelementptr %struct.YYToken* %1, i32 %operation.0.sum1392, i32 0, i32 1 ; <i16*> [#uses=1]
+ %29 = load i16* %28, align 2 ; <i16> [#uses=1]
+ store i16 %27, i16* null, align 8
+ store i16 %29, i16* null, align 2
+ br i1 false, label %bb1132, label %bb110
+
+bb110: ; preds = %bb94
+ switch i32 %6, label %bb1078 [
+ i32 30, label %bb960
+ i32 32, label %bb801
+ i32 38, label %bb809
+ i32 78, label %bb1066
+ ]
+
+bb801: ; preds = %bb110
+ unreachable
+
+bb809: ; preds = %bb110
+ unreachable
+
+bb960: ; preds = %bb110
+ %30 = icmp eq i32 %argCount.0, 1 ; <i1> [#uses=1]
+ br i1 %30, label %bb962, label %bb965
+
+bb962: ; preds = %bb960
+ unreachable
+
+bb965: ; preds = %bb960
+ unreachable
+
+bb1066: ; preds = %bb110
+ unreachable
+
+bb1078: ; preds = %bb110
+ unreachable
+
+bb1132: ; preds = %bb94, %entry
+ %extraToken.1 = phi i64 [ undef, %entry ], [ %extraToken.0, %bb94 ] ; <i64> [#uses=1]
+ %operation.0.rec = phi i32 [ 0, %entry ], [ %.rec, %bb94 ] ; <i32> [#uses=4]
+ %operation.0 = getelementptr %struct.YYToken* %1, i32 %operation.0.rec ; <%struct.YYToken*> [#uses=1]
+ br i1 false, label %bb1134, label %bb51
+
+bb1134: ; preds = %bb1132
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll b/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll
new file mode 100644
index 0000000..de4c1e7
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; PR2762
+define void @foo(<4 x i32>* %p, <4 x double>* %q) {
+ %n = load <4 x i32>* %p
+ %z = sitofp <4 x i32> %n to <4 x double>
+ store <4 x double> %z, <4 x double>* %q
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
new file mode 100644
index 0000000..b2e6061
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
+
+define void @test(i64 %x) nounwind {
+entry:
+ tail call void asm sideeffect "ASM: $0", "r,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
+ ret void
+}
+
diff --git a/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll b/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
new file mode 100644
index 0000000..353d1c7
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
+
+; from gcc.c-torture/compile/920520-1.c
+
+define i32 @g() nounwind {
+entry:
+ call void asm sideeffect "$0", "r"(double 1.500000e+00) nounwind
+ ret i32 0
+}
+
diff --git a/test/CodeGen/X86/2008-10-24-FlippedCompare.ll b/test/CodeGen/X86/2008-10-24-FlippedCompare.ll
new file mode 100644
index 0000000..421b931
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-24-FlippedCompare.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o - | not grep {ucomiss\[^,\]*esp}
+
+define void @f(float %wt) {
+entry:
+ %0 = fcmp ogt float %wt, 0.000000e+00 ; <i1> [#uses=1]
+ %1 = tail call i32 @g(i32 44) ; <i32> [#uses=3]
+ %2 = inttoptr i32 %1 to i8* ; <i8*> [#uses=2]
+ br i1 %0, label %bb, label %bb1
+
+bb: ; preds = %entry
+ ret void
+
+bb1: ; preds = %entry
+ ret void
+}
+
+declare i32 @g(i32)
diff --git a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
new file mode 100644
index 0000000..afeb358
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills}
+
+define fastcc void @fourn(double* %data, i32 %isign) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2]
+ %idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1]
+ %0 = add i32 %indvar93, 2 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1]
+ br i1 %1, label %bb30.loopexit, label %bb
+
+bb3: ; preds = %bb30.loopexit, %bb25, %bb3
+ %2 = load i32* null, align 4 ; <i32> [#uses=1]
+ %3 = mul i32 %2, 0 ; <i32> [#uses=1]
+ %4 = icmp slt i32 0, %3 ; <i1> [#uses=1]
+ br i1 %4, label %bb18, label %bb3
+
+bb18: ; preds = %bb3
+ %5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1]
+ %6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1]
+ br label %bb24.preheader
+
+bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader
+ br label %bb22.preheader
+
+bb25: ; preds = %bb24.preheader
+ %7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0]
+ %8 = add i32 %i3.122100, 0 ; <i32> [#uses=1]
+ %9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb3, label %bb24.preheader
+
+bb24.preheader: ; preds = %bb25, %bb18
+ %i3.122100 = or i32 0, 1 ; <i32> [#uses=2]
+ %10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1]
+ br i1 %10, label %bb25, label %bb22.preheader
+
+bb30.loopexit: ; preds = %bb
+ %11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1]
+ br label %bb3
+}
+
+declare double @sin(double) nounwind readonly
diff --git a/test/CodeGen/X86/2008-10-27-StackRealignment.ll b/test/CodeGen/X86/2008-10-27-StackRealignment.ll
new file mode 100644
index 0000000..784bc72
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-27-StackRealignment.ll
@@ -0,0 +1,22 @@
+; Linux doesn't support stack realignment for functions with allocas (PR2888).
+; Until it does, we shouldn't use movaps to access the stack. On targets with
+; sufficiently aligned stack (e.g. darwin) we should.
+
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mcpu=yonah | not grep movaps
+; RUN: llc < %s -mtriple=i686-apple-darwin9 -mcpu=yonah | grep movaps | count 2
+
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define void @foo(i32 %t) nounwind {
+ %tmp1210 = alloca i8, i32 32, align 4
+ call void @llvm.memset.i64(i8* %tmp1210, i8 0, i64 32, i32 4)
+
+ %x = alloca i8, i32 %t
+ call void @dummy(i8* %x)
+ ret void
+}
+
+declare void @dummy(i8* %x)
+declare void @llvm.memset.i64(i8*, i8, i64, i32) nounwind
diff --git a/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll b/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll
new file mode 100644
index 0000000..7ad94f1
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86
+; PR2977
+define i8* @ap_php_conv_p2(){
+entry:
+ %ap.addr = alloca i8* ; <i8**> [#uses=36]
+ br label %sw.bb301
+sw.bb301:
+ %0 = va_arg i8** %ap.addr, i64 ; <i64> [#uses=1]
+ br label %sw.bb301
+}
diff --git a/test/CodeGen/X86/2008-11-03-F80VAARG.ll b/test/CodeGen/X86/2008-11-03-F80VAARG.ll
new file mode 100644
index 0000000..507799b
--- /dev/null
+++ b/test/CodeGen/X86/2008-11-03-F80VAARG.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -o - | not grep 10
+
+declare void @llvm.va_start(i8*) nounwind
+
+declare void @llvm.va_copy(i8*, i8*) nounwind
+
+declare void @llvm.va_end(i8*) nounwind
+
+define x86_fp80 @test(...) nounwind {
+ %ap = alloca i8* ; <i8**> [#uses=3]
+ %v1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start(i8* %v1)
+ %t1 = va_arg i8** %ap, x86_fp80 ; <x86_fp80> [#uses=1]
+ %t2 = va_arg i8** %ap, x86_fp80 ; <x86_fp80> [#uses=1]
+ %t = fadd x86_fp80 %t1, %t2 ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %t
+}
diff --git a/test/CodeGen/X86/2008-11-06-testb.ll b/test/CodeGen/X86/2008-11-06-testb.ll
new file mode 100644
index 0000000..f8f317c
--- /dev/null
+++ b/test/CodeGen/X86/2008-11-06-testb.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep testb
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+ %struct.x = type <{ i8, i8, i16 }>
+
+define i32 @foo(%struct.x* %p) nounwind {
+entry:
+ %0 = getelementptr %struct.x* %p, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 55, i8* %0, align 1
+ %1 = bitcast %struct.x* %p to i32* ; <i32*> [#uses=1]
+ %2 = load i32* %1, align 1 ; <i32> [#uses=1]
+ %3 = and i32 %2, 512 ; <i32> [#uses=1]
+ %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
+ br i1 %4, label %bb5, label %bb
+
+bb: ; preds = %entry
+ %5 = tail call i32 (...)* @xx() nounwind ; <i32> [#uses=1]
+ ret i32 %5
+
+bb5: ; preds = %entry
+ ret i32 0
+}
+
+declare i32 @xx(...)
diff --git a/test/CodeGen/X86/2008-11-13-inlineasm-3.ll b/test/CodeGen/X86/2008-11-13-inlineasm-3.ll
new file mode 100644
index 0000000..1dc97fc
--- /dev/null
+++ b/test/CodeGen/X86/2008-11-13-inlineasm-3.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu
+; PR 1779
+; Using 'A' constraint and a tied constraint together used to crash.
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.linux_dirent64 = type { i64, i64, i16, i8, [0 x i8] }
+
+define i32 @sys_getdents64(i32 %fd, %struct.linux_dirent64* %dirent, i32 %count) {
+entry:
+ br i1 true, label %cond_next29, label %UnifiedReturnBlock
+
+cond_next29: ; preds = %entry
+ %tmp83 = call i32 asm sideeffect "1:\09movl %eax,0($2)\0A2:\09movl %edx,4($2)\0A3:\0A.section .fixup,\22ax\22\0A4:\09movl $3,$0\0A\09jmp 3b\0A.previous\0A .section __ex_table,\22a\22\0A .balign 4 \0A .long 1b,4b\0A .previous\0A .section __ex_table,\22a\22\0A .balign 4 \0A .long 2b,4b\0A .previous\0A", "=r,A,r,i,0,~{dirflag},~{fpsr},~{flags}"(i64 0, i64* null, i32 -14, i32 0) nounwind ; <i32> [#uses=0]
+ br label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 -14
+}
diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll
new file mode 100644
index 0000000..2e114ab
--- /dev/null
+++ b/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985 | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define zeroext i16 @a(i16 zeroext %x) nounwind {
+entry:
+ %div = udiv i16 %x, 33 ; <i32> [#uses=1]
+ ret i16 %div
+}
diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll
new file mode 100644
index 0000000..7c811af
--- /dev/null
+++ b/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define signext i16 @a(i16 signext %x) nounwind {
+entry:
+ %div = sdiv i16 %x, 33 ; <i32> [#uses=1]
+ ret i16 %div
+}
diff --git a/test/CodeGen/X86/2008-11-29-ULT-Sign.ll b/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
new file mode 100644
index 0000000..6dca141
--- /dev/null
+++ b/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep "jns" | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i32 @a(i32 %x) nounwind {
+entry:
+ %cmp = icmp ult i32 %x, -2147483648 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ %call = call i32 (...)* @b() ; <i32> [#uses=0]
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ br label %return
+
+return: ; preds = %if.end
+ ret i32 undef
+}
+
+declare i32 @b(...)
+
diff --git a/test/CodeGen/X86/2008-12-01-SpillerAssert.ll b/test/CodeGen/X86/2008-12-01-SpillerAssert.ll
new file mode 100644
index 0000000..d96d806
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-01-SpillerAssert.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; PR3124
+
+ %struct.cpuinfo_x86 = type { i8, i8, i8, i8, i32, i8, i8, i8, i32, i32, [9 x i32], [16 x i8], [64 x i8], i32, i32, i32, i64, %struct.cpumask_t, i16, i16, i16, i16, i16, i16, i16, i16, i32 }
+ %struct.cpumask_t = type { [1 x i64] }
[email protected] = external constant [70 x i8] ; <[70 x i8]*> [#uses=1]
+
+declare i32 @printk(i8*, ...)
+
+define void @display_cacheinfo(%struct.cpuinfo_x86* %c) nounwind section ".cpuinit.text" {
+entry:
+ %asmtmp = tail call { i32, i32, i32, i32 } asm "cpuid", "={ax},={bx},={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 -2147483643, i32 0) nounwind ; <{ i32, i32, i32, i32 }> [#uses=0]
+ %0 = tail call i32 (i8*, ...)* @printk(i8* getelementptr ([70 x i8]* @.str10, i32 0, i64 0), i32 0, i32 0, i32 0, i32 0) nounwind ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll b/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
new file mode 100644
index 0000000..1f8bd45
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | not grep lea
+; The inner loop should use [reg] addressing, not [reg+reg] addressing.
+; rdar://6403965
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+
+define i8* @test(i8* %Q, i32* %L) nounwind {
+entry:
+ br label %bb1
+
+bb: ; preds = %bb1, %bb1
+ %indvar.next = add i32 %P.0.rec, 1 ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %P.0.rec = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %P.0 = getelementptr i8* %Q, i32 %P.0.rec ; <i8*> [#uses=2]
+ %0 = load i8* %P.0, align 1 ; <i8> [#uses=1]
+ switch i8 %0, label %bb3 [
+ i8 12, label %bb
+ i8 42, label %bb
+ ]
+
+bb3: ; preds = %bb1
+ %P.0.sum = add i32 %P.0.rec, 2 ; <i32> [#uses=1]
+ %1 = getelementptr i8* %Q, i32 %P.0.sum ; <i8*> [#uses=1]
+ store i8 4, i8* %1, align 1
+ ret i8* %P.0
+}
diff --git a/test/CodeGen/X86/2008-12-02-IllegalResultType.ll b/test/CodeGen/X86/2008-12-02-IllegalResultType.ll
new file mode 100644
index 0000000..4b72cb9
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-02-IllegalResultType.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s
+; PR3117
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+@g_118 = external global i8 ; <i8*> [#uses=1]
+@g_7 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @func_73(i32 %p_74) nounwind {
+entry:
+ %0 = load i32* @g_7, align 4 ; <i32> [#uses=1]
+ %1 = or i8 0, 118 ; <i8> [#uses=1]
+ %2 = zext i8 %1 to i64 ; <i64> [#uses=1]
+ %3 = icmp ne i32 %0, 0 ; <i1> [#uses=1]
+ %4 = zext i1 %3 to i64 ; <i64> [#uses=1]
+ %5 = or i64 %4, -758998846 ; <i64> [#uses=3]
+ %6 = icmp sle i64 %2, %5 ; <i1> [#uses=1]
+ %7 = zext i1 %6 to i8 ; <i8> [#uses=1]
+ %8 = or i8 %7, 118 ; <i8> [#uses=1]
+ %9 = zext i8 %8 to i64 ; <i64> [#uses=1]
+ %10 = icmp sle i64 %9, 0 ; <i1> [#uses=1]
+ %11 = zext i1 %10 to i8 ; <i8> [#uses=1]
+ %12 = or i8 %11, 118 ; <i8> [#uses=1]
+ %13 = zext i8 %12 to i64 ; <i64> [#uses=1]
+ %14 = icmp sle i64 %13, %5 ; <i1> [#uses=1]
+ %15 = zext i1 %14 to i8 ; <i8> [#uses=1]
+ %16 = or i8 %15, 118 ; <i8> [#uses=1]
+ %17 = zext i8 %16 to i64 ; <i64> [#uses=1]
+ %18 = icmp sle i64 %17, 0 ; <i1> [#uses=1]
+ %19 = zext i1 %18 to i8 ; <i8> [#uses=1]
+ %20 = or i8 %19, 118 ; <i8> [#uses=1]
+ %21 = zext i8 %20 to i64 ; <i64> [#uses=1]
+ %22 = icmp sle i64 %21, %5 ; <i1> [#uses=1]
+ %23 = zext i1 %22 to i8 ; <i8> [#uses=1]
+ %24 = or i8 %23, 118 ; <i8> [#uses=1]
+ store i8 %24, i8* @g_118, align 1
+ ret i32 undef
+}
diff --git a/test/CodeGen/X86/2008-12-02-dagcombine-1.ll b/test/CodeGen/X86/2008-12-02-dagcombine-1.ll
new file mode 100644
index 0000000..fe5bff3
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-02-dagcombine-1.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+; a - a should be found and removed, leaving refs to only L and P
+define i8* @test(i8* %a, i8* %L, i8* %P) nounwind {
+entry:
+ %0 = ptrtoint i8* %a to i32
+ %1 = sub i32 -2, %0
+ %2 = ptrtoint i8* %P to i32
+ %3 = sub i32 0, %2
+ %4 = ptrtoint i8* %L to i32
+ %5 = add i32 %4, %3
+ %6 = add i32 %5, %1 ; <i32> [#uses=1]
+ %7 = getelementptr i8* %a, i32 %6 ; <i8*> [#uses=1]
+ br label %return
+
+return: ; preds = %bb3
+ ret i8* %7
+}
diff --git a/test/CodeGen/X86/2008-12-02-dagcombine-2.ll b/test/CodeGen/X86/2008-12-02-dagcombine-2.ll
new file mode 100644
index 0000000..4cb1b42
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-02-dagcombine-2.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+; a - a should be found and removed, leaving refs to only L and P
+define i8* @test(i8* %a, i8* %L, i8* %P) nounwind {
+entry:
+ %0 = ptrtoint i8* %a to i32
+ %1 = ptrtoint i8* %P to i32
+ %2 = sub i32 %1, %0
+ %3 = ptrtoint i8* %L to i32
+ %4 = sub i32 %2, %3 ; <i32> [#uses=1]
+ %5 = getelementptr i8* %a, i32 %4 ; <i8*> [#uses=1]
+ br label %return
+
+return: ; preds = %bb3
+ ret i8* %5
+}
diff --git a/test/CodeGen/X86/2008-12-02-dagcombine-3.ll b/test/CodeGen/X86/2008-12-02-dagcombine-3.ll
new file mode 100644
index 0000000..d5a676a7
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-02-dagcombine-3.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 | grep add | count 2
+; RUN: llc < %s -march=x86 | grep sub | grep -v subsections | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+; this should be rearranged to have two +s and one -
+define i32 @test(i8* %a, i8* %L, i8* %P) nounwind {
+entry:
+ %0 = ptrtoint i8* %P to i32
+ %1 = sub i32 -2, %0
+ %2 = ptrtoint i8* %L to i32
+ %3 = ptrtoint i8* %a to i32
+ %4 = sub i32 %2, %3 ; <i32> [#uses=1]
+ %5 = add i32 %1, %4 ; <i32> [#uses=1]
+ br label %return
+
+return: ; preds = %bb3
+ ret i32 %5
+}
diff --git a/test/CodeGen/X86/2008-12-05-SpillerCrash.ll b/test/CodeGen/X86/2008-12-05-SpillerCrash.ll
new file mode 100644
index 0000000..7fd2e6f
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-05-SpillerCrash.ll
@@ -0,0 +1,237 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9.5 -mattr=+sse41 -relocation-model=pic
+
+ %struct.XXActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 }
+ %struct.XXAlphaTest = type { float, i16, i8, i8 }
+ %struct.XXArrayRange = type { i8, i8, i8, i8 }
+ %struct.XXBlendMode = type { i16, i16, i16, i16, %struct.ZZIColor4, i16, i16, i8, i8, i8, i8 }
+ %struct.XXBBRec = type opaque
+ %struct.XXBBstate = type { %struct.ZZGTransformKey, %struct.ZZGTransformKey, %struct.XXProgramLimits, %struct.XXProgramLimits, i8, i8, i8, i8, %struct.ZZSBB, %struct.ZZSBB, [4 x %struct.ZZSBB], %struct.ZZSBB, %struct.ZZSBB, %struct.ZZSBB, [8 x %struct.ZZSBB], %struct.ZZSBB }
+ %struct.XXClearColor = type { double, %struct.ZZIColor4, %struct.ZZIColor4, float, i32 }
+ %struct.XXClipPlane = type { i32, [6 x %struct.ZZIColor4] }
+ %struct.XXColorBB = type { i16, i8, i8, [8 x i16], i8, i8, i8, i8 }
+ %struct.XXColorMatrix = type { [16 x float]*, %struct.XXImagingColorScale }
+ %struct.XXConfig = type { i32, float, %struct.ZZGTransformKey, %struct.ZZGTransformKey, i8, i8, i8, i8, i8, i8, i16, i32, i32, i32, %struct.XXPixelFormatInfo, %struct.XXPointLineLimits, %struct.XXPointLineLimits, %struct.XXRenderFeatures, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.XXTextureLimits, [3 x %struct.XXPipelineProgramLimits], %struct.XXFragmentProgramLimits, %struct.XXVertexProgramLimits, %struct.XXGeometryShaderLimits, %struct.XXProgramLimits, %struct.XXGeometryShaderLimits, %struct.XXVertexDescriptor*, %struct.XXVertexDescriptor*, [3 x i32], [4 x i32], [0 x i32] }
+ %struct.XXContextRec = type { float, float, float, float, float, float, float, float, %struct.ZZIColor4, %struct.ZZIColor4, %struct.YYFPContext, [16 x [2 x %struct.PPStreamToken]], %struct.ZZGProcessor, %struct._YYConstants*, void (%struct.XXContextRec*, i32, i32, %struct.YYFragmentAttrib*, %struct.YYFragmentAttrib*, i32)*, %struct._YYFunction*, %struct.PPStreamToken*, void (%struct.XXContextRec*, %struct.XXVertex*)*, void (%struct.XXContextRec*, %struct.XXVertex*, %struct.XXVertex*)*, void (%struct.XXContextRec*, %struct.XXVertex*, %struct.XXVertex*, %struct.XXVertex*)*, %struct._YYFunction*, %struct._YYFunction*, %struct._YYFunction*, [4 x i32], [3 x i32], [3 x i32], float, float, float, %struct.PPStreamToken, i32, %struct.ZZSDrawable, %struct.XXFramebufferRec*, %struct.XXFramebufferRec*, %struct.XXRect, %struct.XXFormat, %struct.XXFormat, %struct.XXFormat, %struct.XXConfig*, %struct.XXBBstate, %struct.XXBBstate, %struct.XXSharedRec*, %struct.XXState*, %struct.XXPluginState*, %struct.XXVertex*, %struct.YYFragmentAttrib*, %struct.YYFragmentAttrib*, %struct.YYFragmentAttrib*, %struct.XXProgramRec*, %struct.XXPipelineProgramRec*, %struct.YYTextures, %struct.XXStippleData, i8, i16, i8, i32, i32, i32, %struct.XXQueryRec*, %struct.XXQueryRec*, %struct.XXFallback, { void (i8*, i8*, i32, i8*)* } }
+ %struct.XXConvolution = type { %struct.ZZIColor4, %struct.XXImagingColorScale, i16, i16, [0 x i32], float*, i32, i32 }
+ %struct.XXCurrent16A = type { [8 x %struct.ZZIColor4], [16 x %struct.ZZIColor4], %struct.ZZIColor4, %struct.XXPointLineLimits, float, %struct.XXPointLineLimits, float, [4 x float], %struct.XXPointLineLimits, float, float, float, float, i8, i8, i8, i8 }
+ %struct.XXDepthTest = type { i16, i16, i8, i8, i8, i8, double, double }
+ %struct.XXDrawableWindow = type { i32, i32, i32 }
+ %struct.XXFallback = type { float*, %struct.XXRenderDispatch*, %struct.XXConfig*, i8*, i8*, i32, i32 }
+ %struct.XXFenceRec = type opaque
+ %struct.XXFixedFunction = type { %struct.PPStreamToken* }
+ %struct.XXFogMode = type { %struct.ZZIColor4, float, float, float, float, float, i16, i16, i16, i8, i8 }
+ %struct.XXFormat = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i32, i32, i32 }
+ %struct.XXFragmentProgramLimits = type { i32, i32, i32, i16, i16, i32, i32 }
+ %struct.XXFramebufferAttachment = type { i16, i16, i32, i32, i32 }
+ %struct.XXFramebufferData = type { [10 x %struct.XXFramebufferAttachment], [8 x i16], i16, i16, i16, i8, i8, i32, i32 }
+ %struct.XXFramebufferRec = type { %struct.XXFramebufferData*, %struct.XXPluginFramebufferData*, %struct.XXFormat, i8, i8, i8, i8 }
+ %struct.XXGeometryShaderLimits = type { i32, i32, i32, i32, i32 }
+ %struct.XXHintMode = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 }
+ %struct.XXHistogram = type { %struct.XXProgramLimits*, i32, i16, i8, i8 }
+ %struct.XXImagingColorScale = type { %struct.ZZTCoord2, %struct.ZZTCoord2, %struct.ZZTCoord2, %struct.ZZTCoord2 }
+ %struct.XXImagingSubset = type { %struct.XXConvolution, %struct.XXConvolution, %struct.XXConvolution, %struct.XXColorMatrix, %struct.XXMinmax, %struct.XXHistogram, %struct.XXImagingColorScale, %struct.XXImagingColorScale, %struct.XXImagingColorScale, %struct.XXImagingColorScale, i32, [0 x i32] }
+ %struct.XXLight = type { %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.XXPointLineLimits, float, float, float, float, float, %struct.XXPointLineLimits, float, %struct.XXPointLineLimits, float, %struct.XXPointLineLimits, float, float, float, float, float }
+ %struct.XXLightModel = type { %struct.ZZIColor4, [8 x %struct.XXLight], [2 x %struct.XXMaterial], i32, i16, i16, i16, i8, i8, i8, i8, i8, i8 }
+ %struct.XXLightProduct = type { %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4 }
+ %struct.XXLineMode = type { float, i32, i16, i16, i8, i8, i8, i8 }
+ %struct.XXLogicOp = type { i16, i8, i8 }
+ %struct.XXMaskMode = type { i32, [3 x i32], i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XXMaterial = type { %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, float, float, float, float, [8 x %struct.XXLightProduct], %struct.ZZIColor4, [8 x i32] }
+ %struct.XXMinmax = type { %struct.XXMinmaxTable*, i16, i8, i8, [0 x i32] }
+ %struct.XXMinmaxTable = type { %struct.ZZIColor4, %struct.ZZIColor4 }
+ %struct.XXMipmaplevel = type { [4 x i32], [4 x i32], [4 x float], [4 x i32], i32, i32, float*, i8*, i16, i16, i16, i16, [2 x float] }
+ %struct.XXMultisample = type { float, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XXPipelineProgramData = type { i16, i8, i8, i32, %struct.PPStreamToken*, i64, %struct.ZZIColor4*, i32, [0 x i32] }
+ %struct.XXPipelineProgramLimits = type { i32, i16, i16, i32, i16, i16, i32, i32 }
+ %struct.XXPipelineProgramRec = type { %struct.XXPipelineProgramData*, %struct.PPStreamToken*, %struct.XXContextRec*, { %struct._YYFunction*, \2, \2, [20 x i32], [64 x i32], i32, i32, i32 }*, i32, i32 }
+ %struct.XXPipelineProgramState = type { i8, i8, i8, i8, [0 x i32], %struct.ZZIColor4* }
+ %struct.XXPixelFormatInfo = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XXPixelMap = type { i32*, float*, float*, float*, float*, float*, float*, float*, float*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.XXPixelMode = type { float, float, %struct.XXPixelStore, %struct.XXPixelTransfer, %struct.XXPixelMap, %struct.XXImagingSubset, i32, i32 }
+ %struct.XXPixelPack = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8 }
+ %struct.XXPixelStore = type { %struct.XXPixelPack, %struct.XXPixelPack }
+ %struct.XXPixelTransfer = type { float, float, float, float, float, float, float, float, float, float, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }
+ %struct.XXPluginFramebufferData = type { [10 x %struct.XXTextureRec*], i8, i8, i8, i8 }
+ %struct.XXPluginProgramData = type { [3 x %struct.XXPipelineProgramRec*], %struct.XXBBRec**, i32, [0 x i32] }
+ %struct.XXPluginState = type { [16 x [5 x %struct.XXTextureRec*]], [3 x %struct.XXTextureRec*], [3 x %struct.XXPipelineProgramRec*], [3 x %struct.XXPipelineProgramRec*], %struct.XXProgramRec*, %struct.XXVertexArrayRec*, [16 x %struct.XXBBRec*], %struct.XXFramebufferRec*, %struct.XXFramebufferRec* }
+ %struct.XXPointLineLimits = type { float, float, float }
+ %struct.XXPointMode = type { float, float, float, float, %struct.XXPointLineLimits, float, i8, i8, i8, i8, i16, i16, i32, i16, i16 }
+ %struct.XXPolygonMode = type { [128 x i8], float, float, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XXProgramData = type { i32, i32, i32, i32, %struct.PPStreamToken*, i32*, i32, i32, i32, i32, i8, i8, i8, i8, [0 x i32] }
+ %struct.XXProgramLimits = type { i32, i32, i32, i32 }
+ %struct.XXProgramRec = type { %struct.XXProgramData*, %struct.XXPluginProgramData*, %struct.ZZIColor4**, i32 }
+ %struct.XXQueryRec = type { i32, i32, %struct.XXQueryRec* }
+ %struct.XXRect = type { i32, i32, i32, i32, i32, i32 }
+ %struct.XXRegisterCombiners = type { i8, i8, i8, i8, i32, [2 x %struct.ZZIColor4], [8 x %struct.XXRegisterCombinersPerStageState], %struct.XXRegisterCombinersFinalStageState }
+ %struct.XXRegisterCombinersFinalStageState = type { i8, i8, i8, i8, [7 x %struct.XXRegisterCombinersPerVariableState] }
+ %struct.XXRegisterCombinersPerPortionState = type { [4 x %struct.XXRegisterCombinersPerVariableState], i8, i8, i8, i8, i16, i16, i16, i16, i16, i16 }
+ %struct.XXRegisterCombinersPerStageState = type { [2 x %struct.XXRegisterCombinersPerPortionState], [2 x %struct.ZZIColor4] }
+ %struct.XXRegisterCombinersPerVariableState = type { i16, i16, i16, i16 }
+ %struct.XXRenderDispatch = type { void (%struct.XXContextRec*, i32, float)*, void (%struct.XXContextRec*, i32)*, i32 (%struct.XXContextRec*, i32, i32, i32, i32, i32, i32, i8*, i32, %struct.XXBBRec*)*, i32 (%struct.XXContextRec*, %struct.XXVertex*, i32, i32, i32, i32, i8*, i32, %struct.XXBBRec*)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32, i32, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32, float, float, i8*, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex**, i32)*, void (%struct.XXContextRec*, %struct.XXVertex**, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex**, i32, i32)*, i8* (%struct.XXContextRec*, i32, i32*)*, void (%struct.XXContextRec*, i32, i32, i32)*, i8* (%struct.XXContextRec*, i32, i32, i32, i32, i32)*, void (%struct.XXContextRec*, i32, i32, i32, i32, i32, i8*)*, void (%struct.XXContextRec*)*, void (%struct.XXContextRec*)*, void (%struct.XXContextRec*)*, void (%struct.XXContextRec*, %struct.XXFenceRec*)*, void (%struct.XXContextRec*, i32, %struct.XXQueryRec*)*, void (%struct.XXContextRec*, %struct.XXQueryRec*)*, i32 (%struct.XXContextRec*, i32, i32, i32, i32, i32, i8*, %struct.ZZIColor4*, %struct.XXCurrent16A*)*, i32 (%struct.XXContextRec*, %struct.XXTextureRec*, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, i32 (%struct.XXContextRec*, %struct.XXTextureRec*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, %struct.XXBBRec*)*, i32 (%struct.XXContextRec*, %struct.XXTextureRec*, i32)*, i32 (%struct.XXContextRec*, %struct.XXBBRec*, i32, i32, i8*)*, void (%struct.XXContextRec*, i32)*, void (%struct.XXContextRec*)*, void (%struct.XXContextRec*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, i32 (%struct.XXContextRec*, %struct.XXQueryRec*)*, void (%struct.XXContextRec*)* }
+ %struct.XXRenderFeatures = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.XXSWRSurfaceRec = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, [4 x i8*], i32 }
+ %struct.XXScissorTest = type { %struct.XXProgramLimits, i8, i8, i8, i8 }
+ %struct.XXSharedData = type { }
+ %struct.XXSharedRec = type { %struct.__ZZarrayelementDrawInfoListType, %struct.XXSharedData*, i32, i8, i8, i8, i8 }
+ %struct.XXState = type <{ i16, i16, i16, i16, i32, i32, [256 x %struct.ZZIColor4], [128 x %struct.ZZIColor4], %struct.XXViewport, %struct.XXTransform, %struct.XXLightModel, %struct.XXActiveTextureTargets, %struct.XXAlphaTest, %struct.XXBlendMode, %struct.XXClearColor, %struct.XXColorBB, %struct.XXDepthTest, %struct.XXArrayRange, %struct.XXFogMode, %struct.XXHintMode, %struct.XXLineMode, %struct.XXLogicOp, %struct.XXMaskMode, %struct.XXPixelMode, %struct.XXPointMode, %struct.XXPolygonMode, %struct.XXScissorTest, i32, %struct.XXStencilTest, [8 x %struct.XXTextureMode], [16 x %struct.XXTextureImageMode], %struct.XXArrayRange, [8 x %struct.XXTextureCoordGen], %struct.XXClipPlane, %struct.XXMultisample, %struct.XXRegisterCombiners, %struct.XXArrayRange, %struct.XXArrayRange, [3 x %struct.XXPipelineProgramState], %struct.XXArrayRange, %struct.XXTransformFeedback, i32*, %struct.XXFixedFunction, [1 x i32] }>
+ %struct.XXStencilTest = type { [3 x { i32, i32, i16, i16, i16, i16 }], i32, [4 x i8] }
+ %struct.XXStippleData = type { i32, i16, i16, [32 x [32 x i8]] }
+ %struct.XXTextureCoordGen = type { { i16, i16, %struct.ZZIColor4, %struct.ZZIColor4 }, { i16, i16, %struct.ZZIColor4, %struct.ZZIColor4 }, { i16, i16, %struct.ZZIColor4, %struct.ZZIColor4 }, { i16, i16, %struct.ZZIColor4, %struct.ZZIColor4 }, i8, i8, i8, i8 }
+ %struct.XXTextureGeomState = type { i16, i16, i16, i16, i16, i8, i8, i8, i8, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, [6 x i16], [6 x i16] }
+ %struct.XXTextureImageMode = type { float }
+ %struct.XXTextureLevel = type { i32, i32, i16, i16, i16, i8, i8, i16, i16, i16, i16, i8* }
+ %struct.XXTextureLimits = type { float, float, i16, i16, i16, i16, i16, i16, i16, i16, i16, i8, i8, [16 x i16], i32 }
+ %struct.XXTextureMode = type { %struct.ZZIColor4, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, float, float, i16, i16, i16, i16, i16, i16, [4 x i16], i8, i8, i8, i8, [3 x float], [4 x float], float, float }
+ %struct.XXTextureParamState = type { i16, i16, i16, i16, i16, i16, %struct.ZZIColor4, float, float, float, float, i16, i16, i16, i16, float, i16, i8, i8, i32, i8* }
+ %struct.XXTextureRec = type { [4 x float], %struct.XXTextureState*, %struct.XXMipmaplevel*, %struct.XXMipmaplevel*, float, float, float, float, i8, i8, i8, i8, i16, i16, i16, i16, i32, float, [2 x %struct.PPStreamToken] }
+ %struct.XXTextureState = type { i16, i8, i8, i16, i16, float, i32, %struct.XXSWRSurfaceRec*, %struct.XXTextureParamState, %struct.XXTextureGeomState, i16, i16, i8*, %struct.XXTextureLevel, [1 x [15 x %struct.XXTextureLevel]] }
+ %struct.XXTransform = type <{ [24 x [16 x float]], [24 x [16 x float]], [16 x float], float, float, float, float, float, i8, i8, i8, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i32 }>
+ %struct.XXTransformFeedback = type { i8, i8, i8, i8, [0 x i32], [16 x i32], [16 x i32] }
+ %struct.XXVertex = type { %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.XXPointLineLimits, float, %struct.ZZIColor4, float, i8, i8, i8, i8, float, float, i32, i32, i32, i32, [4 x float], [2 x %struct.XXMaterial*], [2 x i32], [8 x %struct.ZZIColor4] }
+ %struct.XXVertexArrayRec = type opaque
+ %struct.XXVertexDescriptor = type { i8, i8, i8, i8, [0 x i32] }
+ %struct.XXVertexProgramLimits = type { i16, i16, i32, i32 }
+ %struct.XXViewport = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, double, double, i32, i32, i32, i32, float, float, float, float }
+ %struct.ZZGColorTable = type { i32, i32, i32, i8* }
+ %struct.ZZGOperation = type { i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, %struct.ZZGColorTable, %struct.ZZGColorTable, %struct.ZZGColorTable }
+ %struct.ZZGProcessor = type { void (%struct.XXPixelMode*, %struct.ZZGOperation*, %struct._ZZGProcessorData*, %union._ZZGFunctionKey*)*, %struct._YYFunction*, %union._ZZGFunctionKey*, %struct._ZZGProcessorData* }
+ %struct.ZZGTransformKey = type { i32, i32 }
+ %struct.ZZIColor4 = type { float, float, float, float }
+ %struct.ZZSBB = type { i8* }
+ %struct.ZZSDrawable = type { %struct.ZZSWindowRec* }
+ %struct.ZZSWindowRec = type { %struct.ZZGTransformKey, %struct.ZZGTransformKey, i32, i32, %struct.ZZSDrawable, i8*, i8*, i8*, i8*, i8*, [4 x i8*], i32, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8, %struct.XXDrawableWindow, i32, i32, i8*, i8* }
+ %struct.ZZTCoord2 = type { float, float }
+ %struct.YYFPContext = type { float, i32, i32, i32, float, [3 x float] }
+ %struct.YYFragmentAttrib = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, [8 x <4 x float>] }
+ %struct.YYTextures = type { [16 x %struct.XXTextureRec*] }
+ %struct.PPStreamToken = type { { i16, i16, i32 } }
+ %struct._ZZGProcessorData = type { void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32)*, i8* (i32)*, void (i8*)* }
+ %struct._YYConstants = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, float, float, float, float, float, float, float, float, float, float, float, float, [256 x float], [4096 x i8], [8 x float], [48 x float], [128 x float], [528 x i8], { void (i8*, i8*, i32, i8*)*, float (float)*, float (float)*, float (float)*, i32 (float)* } }
+ %struct._YYFunction = type opaque
+ %struct.__ZZarrayelementDrawInfoListType = type { i32, [40 x i8] }
+ %union._ZZGFunctionKey = type opaque
[email protected] = appending global [1 x i8*] [ i8* bitcast (void (%struct.XXContextRec*, i32, i32, %struct.YYFragmentAttrib*, %struct.YYFragmentAttrib*, i32)* @t to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @t(%struct.XXContextRec* %ctx, i32 %x, i32 %y, %struct.YYFragmentAttrib* %start, %struct.YYFragmentAttrib* %deriv, i32 %num_frags) nounwind {
+entry:
+ %tmp7485.i.i.i = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %tmp8382.i.i.i = extractelement <4 x i32> zeroinitializer, i32 1 ; <i32> [#uses=1]
+ %tmp8383.i.i.i = extractelement <4 x i32> zeroinitializer, i32 2 ; <i32> [#uses=2]
+ %tmp8384.i.i.i = extractelement <4 x i32> zeroinitializer, i32 3 ; <i32> [#uses=2]
+ br label %bb7551.i.i.i
+
+bb4426.i.i.i: ; preds = %bb7551.i.i.i
+ %0 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8383.i.i.i, i32 3 ; <[4 x i32]*> [#uses=1]
+ %1 = bitcast [4 x i32]* %0 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %2 = load <4 x i32>* %1, align 16 ; <<4 x i32>> [#uses=1]
+ %3 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8384.i.i.i, i32 3 ; <[4 x i32]*> [#uses=1]
+ %4 = bitcast [4 x i32]* %3 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %5 = load <4 x i32>* %4, align 16 ; <<4 x i32>> [#uses=1]
+ %6 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x i32>> [#uses=1]
+ %7 = bitcast <4 x i32> %6 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %8 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %7, <2 x i32> < i32 1, i32 3 > ; <<2 x i64>> [#uses=1]
+ %9 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8382.i.i.i, i32 6 ; <float**> [#uses=1]
+ %10 = load float** %9, align 4 ; <float*> [#uses=1]
+ %11 = bitcast float* %10 to i8* ; <i8*> [#uses=1]
+ %12 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8383.i.i.i, i32 6 ; <float**> [#uses=1]
+ %13 = load float** %12, align 4 ; <float*> [#uses=1]
+ %14 = bitcast float* %13 to i8* ; <i8*> [#uses=1]
+ %15 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8384.i.i.i, i32 6 ; <float**> [#uses=1]
+ %16 = load float** %15, align 4 ; <float*> [#uses=1]
+ %17 = bitcast float* %16 to i8* ; <i8*> [#uses=1]
+ %tmp7308.i.i.i = and <2 x i64> zeroinitializer, %8 ; <<2 x i64>> [#uses=1]
+ %18 = bitcast <2 x i64> %tmp7308.i.i.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %19 = mul <4 x i32> %18, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %20 = add <4 x i32> %19, zeroinitializer ; <<4 x i32>> [#uses=3]
+ %21 = load i32* null, align 4 ; <i32> [#uses=0]
+ %22 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> zeroinitializer) nounwind readnone ; <<4 x float>> [#uses=1]
+ %23 = fmul <4 x float> %22, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 > ; <<4 x float>> [#uses=1]
+ %tmp2114.i119.i.i = extractelement <4 x i32> %20, i32 1 ; <i32> [#uses=1]
+ %24 = shl i32 %tmp2114.i119.i.i, 2 ; <i32> [#uses=1]
+ %25 = getelementptr i8* %11, i32 %24 ; <i8*> [#uses=1]
+ %26 = bitcast i8* %25 to i32* ; <i32*> [#uses=1]
+ %27 = load i32* %26, align 4 ; <i32> [#uses=1]
+ %28 = or i32 %27, -16777216 ; <i32> [#uses=1]
+ %tmp1927.i120.i.i = insertelement <4 x i32> undef, i32 %28, i32 0 ; <<4 x i32>> [#uses=1]
+ %29 = bitcast <4 x i32> %tmp1927.i120.i.i to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %30 = shufflevector <16 x i8> %29, <16 x i8> < i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef >, <16 x i32> < i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23 > ; <<16 x i8>> [#uses=1]
+ %31 = bitcast <16 x i8> %30 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %32 = shufflevector <8 x i16> %31, <8 x i16> < i16 0, i16 0, i16 0, i16 0, i16 undef, i16 undef, i16 undef, i16 undef >, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1]
+ %33 = bitcast <8 x i16> %32 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %34 = shufflevector <4 x i32> %33, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 > ; <<4 x i32>> [#uses=1]
+ %35 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %34) nounwind readnone ; <<4 x float>> [#uses=1]
+ %36 = fmul <4 x float> %35, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 > ; <<4 x float>> [#uses=1]
+ %tmp2113.i124.i.i = extractelement <4 x i32> %20, i32 2 ; <i32> [#uses=1]
+ %37 = shl i32 %tmp2113.i124.i.i, 2 ; <i32> [#uses=1]
+ %38 = getelementptr i8* %14, i32 %37 ; <i8*> [#uses=1]
+ %39 = bitcast i8* %38 to i32* ; <i32*> [#uses=1]
+ %40 = load i32* %39, align 4 ; <i32> [#uses=1]
+ %41 = or i32 %40, -16777216 ; <i32> [#uses=1]
+ %tmp1963.i125.i.i = insertelement <4 x i32> undef, i32 %41, i32 0 ; <<4 x i32>> [#uses=1]
+ %42 = bitcast <4 x i32> %tmp1963.i125.i.i to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %43 = shufflevector <16 x i8> %42, <16 x i8> < i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef >, <16 x i32> < i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23 > ; <<16 x i8>> [#uses=1]
+ %44 = bitcast <16 x i8> %43 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %45 = shufflevector <8 x i16> %44, <8 x i16> < i16 0, i16 0, i16 0, i16 0, i16 undef, i16 undef, i16 undef, i16 undef >, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1]
+ %46 = bitcast <8 x i16> %45 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %47 = shufflevector <4 x i32> %46, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 > ; <<4 x i32>> [#uses=1]
+ %48 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %47) nounwind readnone ; <<4 x float>> [#uses=1]
+ %49 = fmul <4 x float> %48, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 > ; <<4 x float>> [#uses=1]
+ %tmp2112.i129.i.i = extractelement <4 x i32> %20, i32 3 ; <i32> [#uses=1]
+ %50 = shl i32 %tmp2112.i129.i.i, 2 ; <i32> [#uses=1]
+ %51 = getelementptr i8* %17, i32 %50 ; <i8*> [#uses=1]
+ %52 = bitcast i8* %51 to i32* ; <i32*> [#uses=1]
+ %53 = load i32* %52, align 4 ; <i32> [#uses=1]
+ %54 = or i32 %53, -16777216 ; <i32> [#uses=1]
+ %tmp1999.i130.i.i = insertelement <4 x i32> undef, i32 %54, i32 0 ; <<4 x i32>> [#uses=1]
+ %55 = bitcast <4 x i32> %tmp1999.i130.i.i to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %56 = shufflevector <16 x i8> %55, <16 x i8> < i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef >, <16 x i32> < i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23 > ; <<16 x i8>> [#uses=1]
+ %57 = bitcast <16 x i8> %56 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %58 = shufflevector <8 x i16> %57, <8 x i16> < i16 0, i16 0, i16 0, i16 0, i16 undef, i16 undef, i16 undef, i16 undef >, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1]
+ %59 = bitcast <8 x i16> %58 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %60 = shufflevector <4 x i32> %59, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 > ; <<4 x i32>> [#uses=1]
+ %61 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %60) nounwind readnone ; <<4 x float>> [#uses=1]
+ %62 = fmul <4 x float> %61, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 > ; <<4 x float>> [#uses=1]
+ %63 = fmul <4 x float> %23, zeroinitializer ; <<4 x float>> [#uses=1]
+ %64 = fadd <4 x float> zeroinitializer, %63 ; <<4 x float>> [#uses=1]
+ %65 = fmul <4 x float> %36, zeroinitializer ; <<4 x float>> [#uses=1]
+ %66 = fadd <4 x float> zeroinitializer, %65 ; <<4 x float>> [#uses=1]
+ %67 = fmul <4 x float> %49, zeroinitializer ; <<4 x float>> [#uses=1]
+ %68 = fadd <4 x float> zeroinitializer, %67 ; <<4 x float>> [#uses=1]
+ %69 = fmul <4 x float> %62, zeroinitializer ; <<4 x float>> [#uses=1]
+ %70 = fadd <4 x float> zeroinitializer, %69 ; <<4 x float>> [#uses=1]
+ %tmp7452.i.i.i = bitcast <4 x float> %64 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp7454.i.i.i = and <4 x i32> %tmp7452.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp7459.i.i.i = or <4 x i32> %tmp7454.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp7460.i.i.i = bitcast <4 x i32> %tmp7459.i.i.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp7468.i.i.i = bitcast <4 x float> %66 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp7470.i.i.i = and <4 x i32> %tmp7468.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp7475.i.i.i = or <4 x i32> %tmp7470.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp7476.i.i.i = bitcast <4 x i32> %tmp7475.i.i.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp7479.i.i.i = bitcast <4 x float> %.279.1.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp7480.i.i.i = and <4 x i32> zeroinitializer, %tmp7479.i.i.i ; <<4 x i32>> [#uses=1]
+ %tmp7484.i.i.i = bitcast <4 x float> %68 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp7486.i.i.i = and <4 x i32> %tmp7484.i.i.i, %tmp7485.i.i.i ; <<4 x i32>> [#uses=1]
+ %tmp7491.i.i.i = or <4 x i32> %tmp7486.i.i.i, %tmp7480.i.i.i ; <<4 x i32>> [#uses=1]
+ %tmp7492.i.i.i = bitcast <4 x i32> %tmp7491.i.i.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp7495.i.i.i = bitcast <4 x float> %.380.1.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp7496.i.i.i = and <4 x i32> zeroinitializer, %tmp7495.i.i.i ; <<4 x i32>> [#uses=1]
+ %tmp7500.i.i.i = bitcast <4 x float> %70 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp7502.i.i.i = and <4 x i32> %tmp7500.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %tmp7507.i.i.i = or <4 x i32> %tmp7502.i.i.i, %tmp7496.i.i.i ; <<4 x i32>> [#uses=1]
+ %tmp7508.i.i.i = bitcast <4 x i32> %tmp7507.i.i.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %indvar.next.i.i.i = add i32 %aniso.0.i.i.i, 1 ; <i32> [#uses=1]
+ br label %bb7551.i.i.i
+
+bb7551.i.i.i: ; preds = %bb4426.i.i.i, %entry
+ %.077.1.i = phi <4 x float> [ undef, %entry ], [ %tmp7460.i.i.i, %bb4426.i.i.i ] ; <<4 x float>> [#uses=0]
+ %.178.1.i = phi <4 x float> [ undef, %entry ], [ %tmp7476.i.i.i, %bb4426.i.i.i ] ; <<4 x float>> [#uses=0]
+ %.279.1.i = phi <4 x float> [ undef, %entry ], [ %tmp7492.i.i.i, %bb4426.i.i.i ] ; <<4 x float>> [#uses=1]
+ %.380.1.i = phi <4 x float> [ undef, %entry ], [ %tmp7508.i.i.i, %bb4426.i.i.i ] ; <<4 x float>> [#uses=1]
+ %aniso.0.i.i.i = phi i32 [ 0, %entry ], [ %indvar.next.i.i.i, %bb4426.i.i.i ] ; <i32> [#uses=1]
+ br i1 false, label %glvmInterpretFPTransformFour6.exit, label %bb4426.i.i.i
+
+glvmInterpretFPTransformFour6.exit: ; preds = %bb7551.i.i.i
+ unreachable
+}
+
+declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
diff --git a/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll b/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll
new file mode 100644
index 0000000..e97b63d
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu | grep ^.L_Z1fv.eh
+; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu | grep ^.L_Z1fv.eh
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin9 | grep ^__Z1fv.eh
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 | grep ^__Z1fv.eh
+
+define void @_Z1fv() {
+entry:
+ br label %return
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/X86/2008-12-16-BadShift.ll b/test/CodeGen/X86/2008-12-16-BadShift.ll
new file mode 100644
index 0000000..6c70c5b
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-16-BadShift.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s | not grep shrl
+; Note: this test is really trying to make sure that the shift
+; returns the right result; shrl is most likely wrong,
+; but if CodeGen starts legitimately using an shrl here,
+; please adjust the test appropriately.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
[email protected] = internal constant [6 x i8] c"%lld\0A\00" ; <[6 x i8]*> [#uses=1]
+
+define i64 @mebbe_shift(i32 %xx, i32 %test) nounwind {
+entry:
+ %conv = zext i32 %xx to i64 ; <i64> [#uses=1]
+ %tobool = icmp ne i32 %test, 0 ; <i1> [#uses=1]
+ %shl = select i1 %tobool, i64 3, i64 0 ; <i64> [#uses=1]
+ %x.0 = shl i64 %conv, %shl ; <i64> [#uses=1]
+ ret i64 %x.0
+}
+
diff --git a/test/CodeGen/X86/2008-12-16-dagcombine-4.ll b/test/CodeGen/X86/2008-12-16-dagcombine-4.ll
new file mode 100644
index 0000000..3080d08
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-16-dagcombine-4.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+; a - a should be found and removed, leaving refs to only L and P
+define i32 @test(i32 %a, i32 %L, i32 %P) nounwind {
+entry:
+ %0 = sub i32 %a, %L
+ %1 = add i32 %P, %0
+ %2 = sub i32 %1, %a
+ br label %return
+
+return: ; preds = %bb3
+ ret i32 %2
+}
diff --git a/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll b/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll
new file mode 100644
index 0000000..a6cabc4
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -asm-verbose=0 | FileCheck %s
+; PR3149
+; Make sure the copy after inline asm is not coalesced away.
+
+; CHECK: ## InlineAsm End
+; CHECK-NEXT: BB1_2:
+; CHECK-NEXT: movl %esi, %eax
+
+
+@"\01LC" = internal constant [7 x i8] c"n0=%d\0A\00" ; <[7 x i8]*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast (i32 (i64, i64)* @umoddi3 to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @umoddi3(i64 %u, i64 %v) nounwind noinline {
+entry:
+ %0 = trunc i64 %v to i32 ; <i32> [#uses=2]
+ %1 = trunc i64 %u to i32 ; <i32> [#uses=4]
+ %2 = lshr i64 %u, 32 ; <i64> [#uses=1]
+ %3 = trunc i64 %2 to i32 ; <i32> [#uses=2]
+ %4 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([7 x i8]* @"\01LC", i32 0, i32 0), i32 %1) nounwind ; <i32> [#uses=0]
+ %5 = icmp ult i32 %1, %0 ; <i1> [#uses=1]
+ br i1 %5, label %bb2, label %bb
+
+bb: ; preds = %entry
+ %6 = lshr i64 %v, 32 ; <i64> [#uses=1]
+ %7 = trunc i64 %6 to i32 ; <i32> [#uses=1]
+ %asmtmp = tail call { i32, i32 } asm "subl $5,$1\0A\09sbbl $3,$0", "=r,=&r,0,imr,1,imr,~{dirflag},~{fpsr},~{flags}"(i32 %3, i32 %7, i32 %1, i32 %0) nounwind ; <{ i32, i32 }> [#uses=2]
+ %asmresult = extractvalue { i32, i32 } %asmtmp, 0 ; <i32> [#uses=1]
+ %asmresult1 = extractvalue { i32, i32 } %asmtmp, 1 ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb, %entry
+ %n1.0 = phi i32 [ %asmresult, %bb ], [ %3, %entry ] ; <i32> [#uses=1]
+ %n0.0 = phi i32 [ %asmresult1, %bb ], [ %1, %entry ] ; <i32> [#uses=1]
+ %8 = add i32 %n0.0, %n1.0 ; <i32> [#uses=1]
+ ret i32 %8
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/X86/2008-12-22-dagcombine-5.ll b/test/CodeGen/X86/2008-12-22-dagcombine-5.ll
new file mode 100644
index 0000000..75773e0
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-22-dagcombine-5.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+; -(-a) - a should be found and removed, leaving refs to only L and P
+define i32 @test(i32 %a, i32 %L, i32 %P) nounwind {
+entry:
+ %0 = sub i32 %L, %a
+ %1 = sub i32 %P, %0
+ %2 = sub i32 %1, %a
+ br label %return
+
+return: ; preds = %bb3
+ ret i32 %2
+}
diff --git a/test/CodeGen/X86/2008-12-23-crazy-address.ll b/test/CodeGen/X86/2008-12-23-crazy-address.ll
new file mode 100644
index 0000000..2edcaea
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-23-crazy-address.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=x86 -relocation-model=static | grep {lea.*X.*esp} | count 2
+
+@X = external global [0 x i32]
+
+define void @foo() nounwind {
+entry:
+ %Y = alloca i32
+ call void @frob(i32* %Y) nounwind
+ %Y3 = bitcast i32* %Y to i8*
+ %ctg2 = getelementptr i8* %Y3, i32 ptrtoint ([0 x i32]* @X to i32)
+ %0 = ptrtoint i8* %ctg2 to i32
+ call void @borf(i32 %0) nounwind
+ ret void
+}
+
+define void @bar(i32 %i) nounwind {
+entry:
+ %Y = alloca [10 x i32]
+ %0 = getelementptr [10 x i32]* %Y, i32 0, i32 0
+ call void @frob(i32* %0) nounwind
+ %1 = getelementptr [0 x i32]* @X, i32 0, i32 %i
+ %2 = getelementptr [10 x i32]* %Y, i32 0, i32 0
+ %3 = ptrtoint i32* %2 to i32
+ %4 = bitcast i32* %1 to i8*
+ %ctg2 = getelementptr i8* %4, i32 %3
+ %5 = ptrtoint i8* %ctg2 to i32
+ call void @borf(i32 %5) nounwind
+ ret void
+}
+
+declare void @frob(i32*)
+
+declare void @borf(i32)
diff --git a/test/CodeGen/X86/2008-12-23-dagcombine-6.ll b/test/CodeGen/X86/2008-12-23-dagcombine-6.ll
new file mode 100644
index 0000000..bae9283
--- /dev/null
+++ b/test/CodeGen/X86/2008-12-23-dagcombine-6.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 4
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+; a - a should be found and removed, leaving refs to only L and P
+define i32 @test(i32 %a, i32 %L, i32 %P) nounwind {
+entry:
+ %0 = add i32 %a, %L
+ %1 = add i32 %P, %0
+ %2 = sub i32 %1, %a
+ br label %return
+
+return: ; preds = %bb3
+ ret i32 %2
+}
+define i32 @test2(i32 %a, i32 %L, i32 %P) nounwind {
+entry:
+ %0 = add i32 %L, %a
+ %1 = add i32 %P, %0
+ %2 = sub i32 %1, %a
+ br label %return
+
+return: ; preds = %bb3
+ ret i32 %2
+}
diff --git a/test/CodeGen/X86/2009-01-12-CoalescerBug.ll b/test/CodeGen/X86/2009-01-12-CoalescerBug.ll
new file mode 100644
index 0000000..27a7113
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-12-CoalescerBug.ll
@@ -0,0 +1,84 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | grep movq | count 2
+; PR3311
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.VEC_basic_block_base = type { i32, i32, [1 x %struct.basic_block_def*] }
+ %struct.VEC_basic_block_gc = type { %struct.VEC_basic_block_base }
+ %struct.VEC_edge_base = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct.VEC_edge_gc = type { %struct.VEC_edge_base }
+ %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] }
+ %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base }
+ %struct.VEC_temp_slot_p_base = type { i32, i32, [1 x %struct.temp_slot*] }
+ %struct.VEC_temp_slot_p_gc = type { %struct.VEC_temp_slot_p_base }
+ %struct.VEC_tree_base = type { i32, i32, [1 x %struct.tree_node*] }
+ %struct.VEC_tree_gc = type { %struct.VEC_tree_base }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.basic_block_def = type { %struct.tree_node*, %struct.VEC_edge_gc*, %struct.VEC_edge_gc*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_il_dependent, %struct.tree_node*, %struct.edge_prediction*, i64, i32, i32, i32, i32 }
+ %struct.basic_block_il_dependent = type { %struct.rtl_bb_info* }
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [2 x i64] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.block_symbol = type { [3 x %struct.rtunion], %struct.object_block*, i64 }
+ %struct.c_arg_info = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i8 }
+ %struct.c_language_function = type { %struct.stmt_tree_s }
+ %struct.c_switch = type opaque
+ %struct.control_flow_graph = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.VEC_basic_block_gc*, i32, i32, i32, %struct.VEC_basic_block_gc*, i32 }
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_prediction = type opaque
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.control_flow_graph*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.VEC_temp_slot_p_gc*, %struct.temp_slot*, %struct.var_refs_queue*, i32, i32, i32, i32, %struct.machine_function*, i32, i32, %struct.language_function*, %struct.htab*, %struct.rtx_def*, i32, i32, i32, %struct.location_t, %struct.VEC_tree_gc*, %struct.tree_node*, i8*, i8*, i8*, i8*, i8*, %struct.tree_node*, i8, i8, i8, i8, i8, i8 }
+ %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i64, i64, i64, i32, i32, i8* (i64, i64)*, void (i8*)*, i8*, i8* (i8*, i64, i64)*, void (i8*, i8*)*, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type { i8 }
+ %struct.language_function = type { %struct.c_language_function, %struct.tree_node*, %struct.tree_node*, %struct.c_switch*, %struct.c_arg_info*, i32, i32, i32, i32 }
+ %struct.location_t = type { i8*, i32 }
+ %struct.loop = type opaque
+ %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, [4 x i32], i32, i32, i32 }
+ %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* }
+ %struct.obstack = type { i64, %struct._obstack_chunk*, i8*, i8*, i8*, i64, i32, %struct._obstack_chunk* (i8*, i64)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.omp_clause_subcode = type { i32 }
+ %struct.rtl_bb_info = type { %struct.rtx_def*, %struct.rtx_def*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, %struct.rtx_def*, %struct.rtx_def*, i32 }
+ %struct.rtunion = type { i8* }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.section = type { %struct.unnamed_section }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.stack_local_entry = type opaque
+ %struct.stmt_tree_s = type { %struct.tree_node*, i32 }
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl_common = type { %struct.tree_decl_minimal, %struct.tree_node*, i8, i8, i8, i8, i8, i32, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_minimal = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl_non_common = type { %struct.tree_decl_with_vis, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl_with_rtl = type { %struct.tree_decl_common, %struct.rtx_def*, i32 }
+ %struct.tree_decl_with_vis = type { %struct.tree_decl_with_rtl, %struct.tree_node*, %struct.tree_node*, i8, i8, i8, i8 }
+ %struct.tree_function_decl = type { %struct.tree_decl_non_common, i32, i8, i8, i64, %struct.function* }
+ %struct.tree_node = type { %struct.tree_function_decl }
+ %struct.u = type { %struct.block_symbol }
+ %struct.unnamed_section = type { %struct.omp_clause_subcode, void (i8*)*, i8*, %struct.section* }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %union.tree_ann_d = type opaque
[email protected] = external constant [31 x i8] ; <[31 x i8]*> [#uses=1]
+@integer_types = external global [11 x %struct.tree_node*] ; <[11 x %struct.tree_node*]*> [#uses=1]
+@__FUNCTION__.31164 = external constant [23 x i8], align 16 ; <[23 x i8]*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast (i32 (i32, i32)* @c_common_type_for_size to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @c_common_type_for_size(i32 %bits, i32 %unsignedp) nounwind {
+entry:
+ %0 = load %struct.tree_node** getelementptr ([11 x %struct.tree_node*]* @integer_types, i32 0, i64 5), align 8 ; <%struct.tree_node*> [#uses=1]
+ br i1 false, label %bb16, label %bb
+
+bb: ; preds = %entry
+ tail call void @tree_class_check_failed(%struct.tree_node* %0, i32 2, i8* getelementptr ([31 x i8]* @.str1, i32 0, i64 0), i32 1785, i8* getelementptr ([23 x i8]* @__FUNCTION__.31164, i32 0, i32 0)) noreturn nounwind
+ unreachable
+
+bb16: ; preds = %entry
+ %tmp = add i32 %bits, %unsignedp ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+declare void @tree_class_check_failed(%struct.tree_node*, i32, i8*, i32, i8*) noreturn
diff --git a/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll b/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
new file mode 100644
index 0000000..9c71469
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx -enable-legalize-types-checking
+
+declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone
+
+define void @__mindd16(<16 x double>* sret %vec.result, <16 x double> %x, double %y) nounwind {
+entry:
+ %tmp3.i = shufflevector <16 x double> zeroinitializer, <16 x double> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x double>> [#uses=1]
+ %tmp10.i.i = shufflevector <8 x double> %tmp3.i, <8 x double> undef, <4 x i32> < i32 4, i32 5, i32 6, i32 7 > ; <<4 x double>> [#uses=1]
+ %tmp3.i2.i.i = shufflevector <4 x double> %tmp10.i.i, <4 x double> undef, <2 x i32> < i32 0, i32 1 > ; <<2 x double>> [#uses=1]
+ %0 = tail call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> zeroinitializer, <2 x double> %tmp3.i2.i.i) nounwind ; <<2 x double>> [#uses=1]
+ %tmp5.i3.i.i = shufflevector <2 x double> %0, <2 x double> undef, <4 x i32> < i32 0, i32 1, i32 undef, i32 undef > ; <<4 x double>> [#uses=1]
+ %tmp6.i4.i.i = shufflevector <4 x double> zeroinitializer, <4 x double> %tmp5.i3.i.i, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x double>> [#uses=1]
+ %tmp14.i8.i.i = shufflevector <4 x double> %tmp6.i4.i.i, <4 x double> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 4, i32 5 > ; <<4 x double>> [#uses=1]
+ %tmp13.i.i = shufflevector <4 x double> %tmp14.i8.i.i, <4 x double> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef > ; <<8 x double>> [#uses=1]
+ %tmp14.i.i = shufflevector <8 x double> zeroinitializer, <8 x double> %tmp13.i.i, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11 > ; <<8 x double>> [#uses=1]
+ %tmp5.i = shufflevector <8 x double> %tmp14.i.i, <8 x double> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef > ; <<16 x double>> [#uses=1]
+ %tmp6.i = shufflevector <16 x double> %x, <16 x double> %tmp5.i, <16 x i32> < i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15 > ; <<16 x double>> [#uses=1]
+ %tmp14.i = shufflevector <16 x double> %tmp6.i, <16 x double> zeroinitializer, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23 > ; <<16 x double>> [#uses=1]
+ store <16 x double> %tmp14.i, <16 x double>* %vec.result
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-01-16-SchedulerBug.ll b/test/CodeGen/X86/2009-01-16-SchedulerBug.ll
new file mode 100644
index 0000000..99bef6c
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-16-SchedulerBug.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin
+; rdar://6501631
+
+ %CF = type { %Register }
+ %XXV = type { i32 (...)** }
+ %Register = type { %"struct.XXC::BCFs", i32 }
+ %"struct.XXC::BCFs" = type { i32 }
+
+declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind
+
+define fastcc %XXV* @bar(%CF* %call_frame, %XXV** %exception) nounwind {
+prologue:
+ %param_x = load %XXV** null ; <%XXV*> [#uses=1]
+ %unique_1.i = ptrtoint %XXV* %param_x to i1 ; <i1> [#uses=1]
+ br i1 %unique_1.i, label %NextVerify42, label %FailedVerify
+
+NextVerify42: ; preds = %prologue
+ %param_y = load %XXV** null ; <%XXV*> [#uses=1]
+ %unique_1.i58 = ptrtoint %XXV* %param_y to i1 ; <i1> [#uses=1]
+ br i1 %unique_1.i58, label %function_setup.cont, label %FailedVerify
+
+function_setup.cont: ; preds = %NextVerify42
+ br i1 false, label %label13, label %label
+
+label: ; preds = %function_setup.cont
+ %has_exn = icmp eq %XXV* null, null ; <i1> [#uses=1]
+ br i1 %has_exn, label %kjsNumberLiteral.exit, label %handle_exception
+
+kjsNumberLiteral.exit: ; preds = %label
+ %0 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 0, i32 0) ; <{ i32, i1 }> [#uses=2]
+ %intAdd = extractvalue { i32, i1 } %0, 0 ; <i32> [#uses=2]
+ %intAddOverflow = extractvalue { i32, i1 } %0, 1 ; <i1> [#uses=1]
+ %toint56 = ashr i32 %intAdd, 1 ; <i32> [#uses=1]
+ %toFP57 = sitofp i32 %toint56 to double ; <double> [#uses=1]
+ br i1 %intAddOverflow, label %rematerializeAdd, label %label13
+
+label13: ; preds = %kjsNumberLiteral.exit, %function_setup.cont
+ %var_lr1.0 = phi double [ %toFP57, %kjsNumberLiteral.exit ], [ 0.000000e+00, %function_setup.cont ] ; <double> [#uses=0]
+ unreachable
+
+FailedVerify: ; preds = %NextVerify42, %prologue
+ ret %XXV* null
+
+rematerializeAdd: ; preds = %kjsNumberLiteral.exit
+ %rematerializedInt = sub i32 %intAdd, 0 ; <i32> [#uses=0]
+ ret %XXV* null
+
+handle_exception: ; preds = %label
+ ret %XXV* undef
+}
diff --git a/test/CodeGen/X86/2009-01-16-UIntToFP.ll b/test/CodeGen/X86/2009-01-16-UIntToFP.ll
new file mode 100644
index 0000000..2eab5f1
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-16-UIntToFP.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=x86
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define hidden float @__floatundisf(i64 %u) nounwind readnone {
+entry:
+ %0 = icmp ugt i64 %u, 9007199254740991 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %bb2
+
+bb: ; preds = %entry
+ %1 = and i64 %u, 2047 ; <i64> [#uses=1]
+ %2 = icmp eq i64 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ %3 = or i64 %u, 2048 ; <i64> [#uses=1]
+ %4 = and i64 %3, -2048 ; <i64> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb, %entry
+ %u_addr.0 = phi i64 [ %4, %bb1 ], [ %u, %entry ], [ %u, %bb ] ; <i64> [#uses=2]
+ %5 = lshr i64 %u_addr.0, 32 ; <i64> [#uses=1]
+ %6 = trunc i64 %5 to i32 ; <i32> [#uses=1]
+ %7 = uitofp i32 %6 to double ; <double> [#uses=1]
+ %8 = fmul double %7, 0x41F0000000000000 ; <double> [#uses=1]
+ %9 = trunc i64 %u_addr.0 to i32 ; <i32> [#uses=1]
+ %10 = uitofp i32 %9 to double ; <double> [#uses=1]
+ %11 = fadd double %10, %8 ; <double> [#uses=1]
+ %12 = fptrunc double %11 to float ; <float> [#uses=1]
+ ret float %12
+}
diff --git a/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll b/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll
new file mode 100644
index 0000000..f895336
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s
+; rdar://6505632
+; reduced from 483.xalancbmk
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ %"struct.std::basic_ostream<char,std::char_traits<char> >.base" = type { i32 (...)** }
+ %"struct.xercesc_2_5::ASCIIRangeFactory" = type { %"struct.std::basic_ostream<char,std::char_traits<char> >.base", i8, i8 }
+@_ZN11xercesc_2_5L17gIdeographicCharsE = external constant [7 x i16] ; <[7 x i16]*> [#uses=3]
+
+define void @_ZN11xercesc_2_515XMLRangeFactory11buildRangesEv(%"struct.xercesc_2_5::ASCIIRangeFactory"* %this) {
+entry:
+ br i1 false, label %bb5, label %return
+
+bb5: ; preds = %entry
+ br label %bb4.i.i
+
+bb4.i.i: ; preds = %bb4.i.i, %bb5
+ br i1 false, label %bb.i51, label %bb4.i.i
+
+bb.i51: ; preds = %bb.i51, %bb4.i.i
+ br i1 false, label %bb4.i.i70, label %bb.i51
+
+bb4.i.i70: ; preds = %bb4.i.i70, %bb.i51
+ br i1 false, label %_ZN11xercesc_2_59XMLString9stringLenEPKt.exit.i73, label %bb4.i.i70
+
+_ZN11xercesc_2_59XMLString9stringLenEPKt.exit.i73: ; preds = %bb4.i.i70
+ %0 = load i16* getelementptr ([7 x i16]* @_ZN11xercesc_2_5L17gIdeographicCharsE, i32 0, i32 add (i32 ashr (i32 sub (i32 ptrtoint (i16* getelementptr ([7 x i16]* @_ZN11xercesc_2_5L17gIdeographicCharsE, i32 0, i32 4) to i32), i32 ptrtoint ([7 x i16]* @_ZN11xercesc_2_5L17gIdeographicCharsE to i32)), i32 1), i32 1)), align 4 ; <i16> [#uses=0]
+ br label %bb4.i5.i141
+
+bb4.i5.i141: ; preds = %bb4.i5.i141, %_ZN11xercesc_2_59XMLString9stringLenEPKt.exit.i73
+ br label %bb4.i5.i141
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-01-25-NoSSE.ll b/test/CodeGen/X86/2009-01-25-NoSSE.ll
new file mode 100644
index 0000000..0583ef1
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-25-NoSSE.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86-64 -mattr=-sse,-sse2 | not grep xmm
+; PR3402
+target datalayout =
+"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.ktermios = type { i32, i32, i32, i32, i8, [19 x i8], i32, i32 }
+
+define void @foo() nounwind {
+entry:
+ %termios = alloca %struct.ktermios, align 8
+ %termios1 = bitcast %struct.ktermios* %termios to i8*
+ call void @llvm.memset.i64(i8* %termios1, i8 0, i64 44, i32 8)
+ call void @bar(%struct.ktermios* %termios) nounwind
+ ret void
+}
+
+declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
+
+declare void @bar(%struct.ktermios*)
+
diff --git a/test/CodeGen/X86/2009-01-26-WrongCheck.ll b/test/CodeGen/X86/2009-01-26-WrongCheck.ll
new file mode 100644
index 0000000..117ff47
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-26-WrongCheck.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 -enable-legalize-types-checking
+; PR3393
+
+define void @foo(i32 inreg %x) {
+ %t709 = select i1 false, i32 0, i32 %x ; <i32> [#uses=1]
+ %t711 = add i32 %t709, 1 ; <i32> [#uses=4]
+ %t801 = icmp slt i32 %t711, 0 ; <i1> [#uses=1]
+ %t712 = zext i32 %t711 to i64 ; <i64> [#uses=1]
+ %t804 = select i1 %t801, i64 0, i64 %t712 ; <i64> [#uses=1]
+ store i64 %t804, i64* null
+ %t815 = icmp slt i32 %t711, 0 ; <i1> [#uses=1]
+ %t814 = sext i32 %t711 to i64 ; <i64> [#uses=1]
+ %t816 = select i1 %t815, i64 0, i64 %t814 ; <i64> [#uses=1]
+ store i64 %t816, i64* null
+ unreachable
+}
diff --git a/test/CodeGen/X86/2009-01-27-NullStrings.ll b/test/CodeGen/X86/2009-01-27-NullStrings.ll
new file mode 100644
index 0000000..8684f4a
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-27-NullStrings.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s
+; CHECK: .section __TEXT,__cstring,cstring_literals
+
+@x = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+
+@y = global [1 x i8]* @x
+
diff --git a/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll b/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll
new file mode 100644
index 0000000..ce3ea82
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9.6 -regalloc=local -disable-fp-elim
+; rdar://6538384
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.Lit = type { i32 }
+ %struct.StreamBuffer = type { %struct.FILE*, [1048576 x i8], i32, i32 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+
+declare fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer*)
+
+declare i8* @llvm.eh.exception() nounwind
+
+define i32 @main(i32 %argc, i8** nocapture %argv) noreturn {
+entry:
+ %0 = invoke fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer* null)
+ to label %bb1.i16.i.i unwind label %lpad.i.i ; <i32> [#uses=0]
+
+bb1.i16.i.i: ; preds = %entry
+ br i1 false, label %bb.i.i.i.i, label %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i
+
+bb.i.i.i.i: ; preds = %bb1.i16.i.i
+ br label %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i
+
+_ZN3vecI3LitE4pushERKS0_.exit.i.i.i: ; preds = %bb.i.i.i.i, %bb1.i16.i.i
+ %lits.i.i.0.0 = phi %struct.Lit* [ null, %bb1.i16.i.i ], [ null, %bb.i.i.i.i ] ; <%struct.Lit*> [#uses=1]
+ %1 = invoke fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer* null)
+ to label %.noexc21.i.i unwind label %lpad.i.i ; <i32> [#uses=0]
+
+.noexc21.i.i: ; preds = %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i
+ unreachable
+
+lpad.i.i: ; preds = %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i, %entry
+ %lits.i.i.0.3 = phi %struct.Lit* [ %lits.i.i.0.0, %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i ], [ null, %entry ] ; <%struct.Lit*> [#uses=1]
+ %eh_ptr.i.i = call i8* @llvm.eh.exception() ; <i8*> [#uses=0]
+ free %struct.Lit* %lits.i.i.0.3
+ unreachable
+}
diff --git a/test/CodeGen/X86/2009-01-31-BigShift.ll b/test/CodeGen/X86/2009-01-31-BigShift.ll
new file mode 100644
index 0000000..4eb0ec1
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-31-BigShift.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | not grep and
+; PR3401
+
+define void @x(i288 %i) nounwind {
+ call void @add(i288 %i)
+ ret void
+}
+
+declare void @add(i288)
diff --git a/test/CodeGen/X86/2009-01-31-BigShift2.ll b/test/CodeGen/X86/2009-01-31-BigShift2.ll
new file mode 100644
index 0000000..9d24084
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-31-BigShift2.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 | grep {mov.*56}
+; PR3449
+
+define void @test(<8 x double>* %P, i64* %Q) nounwind {
+ %A = load <8 x double>* %P ; <<8 x double>> [#uses=1]
+ %B = bitcast <8 x double> %A to i512 ; <i512> [#uses=1]
+ %C = lshr i512 %B, 448 ; <i512> [#uses=1]
+ %D = trunc i512 %C to i64 ; <i64> [#uses=1]
+ volatile store i64 %D, i64* %Q
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-01-31-BigShift3.ll b/test/CodeGen/X86/2009-01-31-BigShift3.ll
new file mode 100644
index 0000000..1b531e3
--- /dev/null
+++ b/test/CodeGen/X86/2009-01-31-BigShift3.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=x86
+; PR3450
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ %struct.BitMap = type { i8* }
+ %struct.BitMapListStruct = type { %struct.BitMap, %struct.BitMapListStruct*, %struct.BitMapListStruct* }
+ %struct.Material = type { float, float, float, %struct.Material*, %struct.Material* }
+ %struct.ObjPoint = type { double, double, double, double, double, double }
+ %struct.ObjectStruct = type { [57 x i8], %struct.PointListStruct*, %struct.Poly3Struct*, %struct.Poly4Struct*, %struct.Texture*, %struct.Material*, %struct.Point, i32, i32, %struct.Point, %struct.Point, %struct.Point, %struct.ObjectStruct*, %struct.ObjectStruct*, i32, i32, i32, i32, i32, i32, i32, %struct.ObjectStruct*, %struct.ObjectStruct* }
+ %struct.Point = type { double, double, double }
+ %struct.PointListStruct = type { %struct.ObjPoint*, %struct.PointListStruct*, %struct.PointListStruct* }
+ %struct.Poly3Struct = type { [3 x %struct.ObjPoint*], %struct.Material*, %struct.Texture*, %struct.Poly3Struct*, %struct.Poly3Struct* }
+ %struct.Poly4Struct = type { [4 x %struct.ObjPoint*], %struct.Material*, %struct.Texture*, %struct.Poly4Struct*, %struct.Poly4Struct* }
+ %struct.Texture = type { %struct.Point, %struct.BitMapListStruct*, %struct.Point, %struct.Point, %struct.Point, %struct.Texture*, %struct.Texture* }
+
+define fastcc void @ScaleObjectAdd(%struct.ObjectStruct* %o, double %sx, double %sy, double %sz) nounwind {
+entry:
+ %sz101112.ins = or i960 0, 0 ; <i960> [#uses=1]
+ br i1 false, label %return, label %bb1.preheader
+
+bb1.preheader: ; preds = %entry
+ %0 = lshr i960 %sz101112.ins, 640 ; <i960> [#uses=0]
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.preheader
+ br label %bb1
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-02-01-LargeMask.ll b/test/CodeGen/X86/2009-02-01-LargeMask.ll
new file mode 100644
index 0000000..c4042e6
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-01-LargeMask.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=x86
+; PR3453
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %struct.cl_engine = type { i32, i16, i32, i8**, i8**, i8*, i8*, i8*, i8*, i8*, i8*, i8* }
+ %struct.cl_limits = type { i32, i32, i32, i32, i16, i32 }
+ %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
+ %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }
+ %struct.cli_ac_patt = type { i16*, i16*, i16, i16, i8, i32, i32, i8*, i8*, i32, i16, i16, i16, i16, %struct.cli_ac_alt**, i8, i16, %struct.cli_ac_patt*, %struct.cli_ac_patt* }
+ %struct.cli_bm_patt = type { i8*, i8*, i16, i16, i8*, i8*, i8, %struct.cli_bm_patt*, i16 }
+ %struct.cli_ctx = type { i8**, i32*, %struct.cli_matcher*, %struct.cl_engine*, %struct.cl_limits*, i32, i32, i32, i32, %struct.cli_dconf* }
+ %struct.cli_dconf = type { i32, i32, i32, i32, i32, i32, i32 }
+ %struct.cli_matcher = type { i16, i8, i8*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
+
+define fastcc i32 @cli_scanautoit(i32 %desc, %struct.cli_ctx* %ctx, i32 %offset) nounwind {
+entry:
+ br i1 false, label %bb.i49.i72, label %bb14
+
+bb.i49.i72: ; preds = %bb.i49.i72, %entry
+ %UNP.i1482.0 = phi i288 [ %.ins659, %bb.i49.i72 ], [ undef, %entry ] ; <i288> [#uses=1]
+ %0 = load i32* null, align 4 ; <i32> [#uses=1]
+ %1 = xor i32 %0, 17834 ; <i32> [#uses=1]
+ %2 = zext i32 %1 to i288 ; <i288> [#uses=1]
+ %3 = shl i288 %2, 160 ; <i288> [#uses=1]
+ %UNP.i1482.in658.mask = and i288 %UNP.i1482.0, -6277101733925179126504886505003981583386072424808101969921 ; <i288> [#uses=1]
+ %.ins659 = or i288 %3, %UNP.i1482.in658.mask ; <i288> [#uses=1]
+ br label %bb.i49.i72
+
+bb14: ; preds = %entry
+ ret i32 -123
+}
diff --git a/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll b/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll
new file mode 100644
index 0000000..e75af13
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86
+; PR3411
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+@g_3 = external global i32 ; <i32*> [#uses=1]
+
+define void @bar(i64 %p_66) nounwind {
+entry:
+ br i1 false, label %bb, label %bb1
+
+bb: ; preds = %entry
+ unreachable
+
+bb1: ; preds = %entry
+ %0 = load i32* @g_3, align 4 ; <i32> [#uses=2]
+ %1 = sext i32 %0 to i64 ; <i64> [#uses=1]
+ %2 = or i64 %1, %p_66 ; <i64> [#uses=1]
+ %3 = shl i64 %2, 0 ; <i64> [#uses=1]
+ %4 = and i64 %3, %p_66 ; <i64> [#uses=1]
+ %5 = icmp eq i64 %4, 1 ; <i1> [#uses=1]
+ %6 = trunc i64 %p_66 to i32 ; <i32> [#uses=2]
+ %7 = or i32 %0, %6 ; <i32> [#uses=2]
+ %8 = sub i32 %7, %6 ; <i32> [#uses=1]
+ %iftmp.0.0 = select i1 %5, i32 %8, i32 %7 ; <i32> [#uses=1]
+ %9 = tail call i32 @foo(i32 %iftmp.0.0) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @foo(i32)
diff --git a/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll b/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll
new file mode 100644
index 0000000..4880f62
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s | grep p-92
+; PR3481
+; The offset should print as -92, not +17179869092
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+@p = common global [10 x i32] zeroinitializer, align 4 ; <[10 x i32]*>
+@g = global [1 x i32*] [ i32* bitcast (i8* getelementptr (i8* bitcast
+([10 x i32]* @p to i8*), i64 17179869092) to i32*) ], align 4
diff --git a/test/CodeGen/X86/2009-02-05-CoalescerBug.ll b/test/CodeGen/X86/2009-02-05-CoalescerBug.ll
new file mode 100644
index 0000000..0ffa8fd
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-05-CoalescerBug.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movss | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movaps | count 4
+
+define i1 @t([2 x float]* %y, [2 x float]* %w, i32, [2 x float]* %x.pn59, i32 %smax190, i32 %j.1180, <4 x float> %wu.2179, <4 x float> %wr.2178, <4 x float>* %tmp89.out, <4 x float>* %tmp107.out, i32* %indvar.next218.out) nounwind {
+newFuncRoot:
+ %tmp82 = insertelement <4 x float> %wr.2178, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp85 = insertelement <4 x float> %tmp82, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp87 = insertelement <4 x float> %tmp85, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp89 = insertelement <4 x float> %tmp87, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp89, <4 x float>* %tmp89.out
+ ret i1 false
+}
diff --git a/test/CodeGen/X86/2009-02-08-CoalescerBug.ll b/test/CodeGen/X86/2009-02-08-CoalescerBug.ll
new file mode 100644
index 0000000..908cc08
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-08-CoalescerBug.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86
+; PR3486
+
+define i32 @foo(i8 signext %p_26) nounwind {
+entry:
+ %0 = icmp eq i8 %p_26, 0 ; <i1> [#uses=2]
+ %or.cond = or i1 false, %0 ; <i1> [#uses=2]
+ %iftmp.1.0 = zext i1 %or.cond to i16 ; <i16> [#uses=1]
+ br i1 %0, label %bb.i, label %bar.exit
+
+bb.i: ; preds = %entry
+ %1 = zext i1 %or.cond to i32 ; <i32> [#uses=1]
+ %2 = sdiv i32 %1, 0 ; <i32> [#uses=1]
+ %3 = trunc i32 %2 to i16 ; <i16> [#uses=1]
+ br label %bar.exit
+
+bar.exit: ; preds = %bb.i, %entry
+ %4 = phi i16 [ %3, %bb.i ], [ %iftmp.1.0, %entry ] ; <i16> [#uses=1]
+ %5 = trunc i16 %4 to i8 ; <i8> [#uses=1]
+ %6 = sext i8 %5 to i32 ; <i32> [#uses=1]
+ ret i32 %6
+}
diff --git a/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll b/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll
new file mode 100644
index 0000000..1284b0d
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s
+; PR3537
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ %struct.GetBitContext = type <{ i8*, i8*, i32, i32 }>
+
+define i32 @alac_decode_frame() nounwind {
+entry:
+ %tmp2 = load i8** null ; <i8*> [#uses=2]
+ %tmp34 = getelementptr i8* %tmp2, i32 4 ; <i8*> [#uses=2]
+ %tmp5.i424 = bitcast i8* %tmp34 to i8** ; <i8**> [#uses=2]
+ %tmp15.i = getelementptr i8* %tmp2, i32 12 ; <i8*> [#uses=1]
+ %0 = bitcast i8* %tmp15.i to i32* ; <i32*> [#uses=1]
+ br i1 false, label %if.then43, label %if.end47
+
+if.then43: ; preds = %entry
+ ret i32 0
+
+if.end47: ; preds = %entry
+ %tmp5.i590 = load i8** %tmp5.i424 ; <i8*> [#uses=0]
+ store i32 19, i32* %0
+ %tmp6.i569 = load i8** %tmp5.i424 ; <i8*> [#uses=0]
+ %1 = call i32 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 0) nounwind ; <i32> [#uses=0]
+ br i1 false, label %bb.nph, label %if.then63
+
+if.then63: ; preds = %if.end47
+ unreachable
+
+bb.nph: ; preds = %if.end47
+ %2 = bitcast i8* %tmp34 to %struct.GetBitContext* ; <%struct.GetBitContext*> [#uses=1]
+ %call9.i = call fastcc i32 @decode_scalar(%struct.GetBitContext* %2, i32 0, i32 0, i32 0) nounwind ; <i32> [#uses=0]
+ unreachable
+}
+
+declare fastcc i32 @decode_scalar(%struct.GetBitContext* nocapture, i32, i32, i32) nounwind
diff --git a/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll b/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
new file mode 100644
index 0000000..72c7ee9
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
@@ -0,0 +1,76 @@
+; RUN: llc < %s
+; RUN: llc < %s -march=x86-64
+; PR3538
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.block.type = type { i32, { }* }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+ %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }* }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.subrange.type = type { i32, i64, i64 }
+ %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"t.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [2 x i8] c".\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"clang\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([2 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"test\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([5 x i8]* @.str4, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str4, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 3, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"X\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459009, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), i8* getelementptr ([2 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 3, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.block.type { i32 458763, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*) }, section "llvm.metadata" ; <%llvm.dbg.block.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subrange.type { i32 458785, i64 0, i64 0 }, section "llvm.metadata" ; <%llvm.dbg.subrange.type*> [#uses=1]
[email protected] = internal constant [1 x { }*] [{ }* bitcast (%llvm.dbg.subrange.type* @llvm.dbg.subrange to { }*)], section "llvm.metadata" ; <[1 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458753, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* null, i32 0, i64 0, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast ([1 x { }*]* @llvm.dbg.array to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"Y\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, { }* bitcast (%llvm.dbg.block.type* @llvm.dbg.block to { }*), i8* getelementptr ([2 x i8]* @.str6, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
+
+define i32 @test(i32 %X) nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=1]
+ %X.addr = alloca i32 ; <i32*> [#uses=3]
+ %saved_stack = alloca i8* ; <i8**> [#uses=2]
+ call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ store i32 %X, i32* %X.addr
+ %0 = bitcast i32* %X.addr to { }* ; <{ }*> [#uses=1]
+ call void @llvm.dbg.declare({ }* %0, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable to { }*))
+ call void @llvm.dbg.region.start({ }* bitcast (%llvm.dbg.block.type* @llvm.dbg.block to { }*))
+ call void @llvm.dbg.stoppoint(i32 4, i32 3, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %1 = call i8* @llvm.stacksave() ; <i8*> [#uses=1]
+ store i8* %1, i8** %saved_stack
+ %tmp = load i32* %X.addr ; <i32> [#uses=1]
+ %2 = mul i32 4, %tmp ; <i32> [#uses=1]
+ %vla = alloca i8, i32 %2 ; <i8*> [#uses=1]
+ %tmp1 = bitcast i8* %vla to i32* ; <i32*> [#uses=1]
+ %3 = bitcast i32* %tmp1 to { }* ; <{ }*> [#uses=1]
+ call void @llvm.dbg.declare({ }* %3, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable7 to { }*))
+ call void @llvm.dbg.stoppoint(i32 5, i32 1, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.block.type* @llvm.dbg.block to { }*))
+ br label %cleanup
+
+cleanup: ; preds = %entry
+ %tmp2 = load i8** %saved_stack ; <i8*> [#uses=1]
+ call void @llvm.stackrestore(i8* %tmp2)
+ call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ %4 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %4
+}
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.declare({ }*, { }*) nounwind
+
+declare void @llvm.dbg.region.start({ }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare i8* @llvm.stacksave() nounwind
+
+declare void @llvm.stackrestore(i8*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind
diff --git a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
new file mode 100644
index 0000000..2e148ad
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 | grep {\$-81920} | count 3
+; RUN: llc < %s -march=x86 | grep {\$4294885376} | count 1
+
+; ModuleID = 'shant.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+define void @f() nounwind {
+entry:
+ call void asm sideeffect "foo $0", "n,~{dirflag},~{fpsr},~{flags}"(i32 -81920) nounwind
+ call void asm sideeffect "foo $0", "i,~{dirflag},~{fpsr},~{flags}"(i32 -81920) nounwind
+ call void asm sideeffect "foo $0", "e,~{dirflag},~{fpsr},~{flags}"(i32 -81920) nounwind
+ call void asm sideeffect "foo $0", "Z,~{dirflag},~{fpsr},~{flags}"(i64 4294885376) nounwind
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-02-12-SpillerBug.ll b/test/CodeGen/X86/2009-02-12-SpillerBug.ll
new file mode 100644
index 0000000..4f8a5e7
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-12-SpillerBug.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8
+; PR3561
+
+define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind {
+entry:
+ %0 = fmul x86_fp80 %b, %d ; <x86_fp80> [#uses=1]
+ %1 = fsub x86_fp80 0xK00000000000000000000, %0 ; <x86_fp80> [#uses=1]
+ %2 = fadd x86_fp80 0xK00000000000000000000, 0xK00000000000000000000 ; <x86_fp80> [#uses=1]
+ %3 = fcmp uno x86_fp80 %1, 0xK00000000000000000000 ; <i1> [#uses=1]
+ %4 = fcmp uno x86_fp80 %2, 0xK00000000000000000000 ; <i1> [#uses=1]
+ %or.cond = and i1 %3, %4 ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb47, label %bb71
+
+bb47: ; preds = %entry
+ %5 = fcmp uno x86_fp80 %a, 0xK00000000000000000000 ; <i1> [#uses=1]
+ br i1 %5, label %bb60, label %bb62
+
+bb60: ; preds = %bb47
+ %6 = tail call x86_fp80 @copysignl(x86_fp80 0xK00000000000000000000, x86_fp80 %a) nounwind readnone ; <x86_fp80> [#uses=0]
+ br label %bb62
+
+bb62: ; preds = %bb60, %bb47
+ unreachable
+
+bb71: ; preds = %entry
+ ret void
+}
+
+declare x86_fp80 @copysignl(x86_fp80, x86_fp80) nounwind readnone
diff --git a/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll b/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll
new file mode 100644
index 0000000..58a7f9f
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split
+
+define i32 @main() nounwind {
+bb4.i.thread:
+ br label %bb5.i4
+
+bb16: ; preds = %bb111.i
+ %phitmp = add i32 %indvar.reg2mem.4, 1 ; <i32> [#uses=2]
+ switch i32 %indvar.reg2mem.4, label %bb100.i [
+ i32 0, label %bb5.i4
+ i32 1, label %bb5.i4
+ i32 2, label %bb5.i4
+ i32 5, label %bb.i14.i
+ i32 6, label %bb.i14.i
+ i32 7, label %bb.i14.i
+ ]
+
+bb5.i4: ; preds = %bb16, %bb16, %bb16, %bb4.i.thread
+ br i1 false, label %bb102.i, label %bb103.i
+
+bb.i14.i: ; preds = %bb16, %bb16, %bb16
+ %0 = malloc [600 x i32] ; <[600 x i32]*> [#uses=0]
+ %1 = icmp eq i32 %phitmp, 7 ; <i1> [#uses=1]
+ %tl.0.i = select i1 %1, float 1.000000e+02, float 1.000000e+00 ; <float> [#uses=1]
+ %2 = icmp eq i32 %phitmp, 8 ; <i1> [#uses=1]
+ %tu.0.i = select i1 %2, float 1.000000e+02, float 1.000000e+00 ; <float> [#uses=1]
+ br label %bb30.i
+
+bb30.i: ; preds = %bb36.i, %bb.i14.i
+ %i.1173.i = phi i32 [ 0, %bb.i14.i ], [ %indvar.next240.i, %bb36.i ] ; <i32> [#uses=3]
+ %3 = icmp eq i32 0, %i.1173.i ; <i1> [#uses=1]
+ br i1 %3, label %bb33.i, label %bb34.i
+
+bb33.i: ; preds = %bb30.i
+ store float %tl.0.i, float* null, align 4
+ br label %bb36.i
+
+bb34.i: ; preds = %bb30.i
+ %4 = icmp eq i32 0, %i.1173.i ; <i1> [#uses=1]
+ br i1 %4, label %bb35.i, label %bb36.i
+
+bb35.i: ; preds = %bb34.i
+ store float %tu.0.i, float* null, align 4
+ br label %bb36.i
+
+bb36.i: ; preds = %bb35.i, %bb34.i, %bb33.i
+ %indvar.next240.i = add i32 %i.1173.i, 1 ; <i32> [#uses=1]
+ br label %bb30.i
+
+bb100.i: ; preds = %bb16
+ ret i32 0
+
+bb102.i: ; preds = %bb5.i4
+ br label %bb103.i
+
+bb103.i: ; preds = %bb102.i, %bb5.i4
+ %indvar.reg2mem.4 = phi i32 [ 0, %bb5.i4 ], [ 0, %bb102.i ] ; <i32> [#uses=2]
+ %n.0.reg2mem.1.i = phi i32 [ 0, %bb102.i ], [ 0, %bb5.i4 ] ; <i32> [#uses=1]
+ %5 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %5, label %bb111.i, label %bb108.i
+
+bb108.i: ; preds = %bb103.i
+ ret i32 0
+
+bb111.i: ; preds = %bb103.i
+ %6 = icmp sgt i32 %n.0.reg2mem.1.i, 7 ; <i1> [#uses=1]
+ br i1 %6, label %bb16, label %bb112.i
+
+bb112.i: ; preds = %bb111.i
+ unreachable
+}
diff --git a/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll b/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll
new file mode 100644
index 0000000..b3dd13c
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s | grep weak | count 3
+; PR3629
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-unknown-freebsd7.1"
+module asm ".ident\09\22$FreeBSD$\22"
+ %struct.anon = type <{ %struct.uart_devinfo* }>
+ %struct.lock_object = type <{ i8*, i32, i32, %struct.witness* }>
+ %struct.mtx = type <{ %struct.lock_object, i64 }>
+ %struct.uart_bas = type <{ i64, i64, i32, i32, i32, i8, i8, i8, i8 }>
+ %struct.uart_class = type opaque
+ %struct.uart_devinfo = type <{ %struct.anon, %struct.uart_ops*, %struct.uart_bas, i32, i32, i32, i32, i32, i8, i8, i8, i8, i32 (%struct.uart_softc*)*, i32 (%struct.uart_softc*)*, i8*, %struct.mtx* }>
+ %struct.uart_ops = type <{ i32 (%struct.uart_bas*)*, void (%struct.uart_bas*, i32, i32, i32, i32)*, void (%struct.uart_bas*)*, void (%struct.uart_bas*, i32)*, i32 (%struct.uart_bas*)*, i32 (%struct.uart_bas*, %struct.mtx*)* }>
+ %struct.uart_softc = type opaque
+ %struct.witness = type opaque
+
+@uart_classes = internal global [3 x %struct.uart_class*] [%struct.uart_class* @uart_ns8250_class, %struct.uart_class* @uart_sab82532_class, %struct.uart_class* @uart_z8530_class], align 8 ; <[3 x %struct.uart_class*]*> [#uses=1]
+@uart_ns8250_class = extern_weak global %struct.uart_class ; <%struct.uart_class*> [#uses=1]
+@uart_sab82532_class = extern_weak global %struct.uart_class ; <%struct.uart_class*> [#uses=1]
+@uart_z8530_class = extern_weak global %struct.uart_class ; <%struct.uart_class*> [#uses=1]
diff --git a/test/CodeGen/X86/2009-02-25-CommuteBug.ll b/test/CodeGen/X86/2009-02-25-CommuteBug.ll
new file mode 100644
index 0000000..7ea6998
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-25-CommuteBug.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep commuted
+; rdar://6608609
+
+define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
+entry:
+ %tmp.i2 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp2.i = or <2 x i64> %tmp.i2, <i64 4607632778762754458, i64 4607632778762754458> ; <<2 x i64>> [#uses=1]
+ %tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double> ; <<2 x double>> [#uses=1]
+ %0 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %A, <2 x double> %tmp3.i) nounwind readnone ; <<2 x double>> [#uses=1]
+ %tmp.i = fadd <2 x double> %0, %C ; <<2 x double>> [#uses=1]
+ ret <2 x double> %tmp.i
+}
+
+declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone
diff --git a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
new file mode 100644
index 0000000..a4d642b
--- /dev/null
+++ b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse3 -stats |& not grep {machine-licm}
+; rdar://6627786
+
+target triple = "x86_64-apple-darwin10.0"
+ %struct.Key = type { i64 }
+ %struct.__Rec = type opaque
+ %struct.__vv = type { }
+
+define %struct.__vv* @t(%struct.Key* %desc, i64 %p) nounwind ssp {
+entry:
+ br label %bb4
+
+bb4: ; preds = %bb.i, %bb26, %bb4, %entry
+ %0 = call i32 (...)* @xxGetOffsetForCode(i32 undef) nounwind ; <i32> [#uses=0]
+ %ins = or i64 %p, 2097152 ; <i64> [#uses=1]
+ %1 = call i32 (...)* @xxCalculateMidType(%struct.Key* %desc, i32 0) nounwind ; <i32> [#uses=1]
+ %cond = icmp eq i32 %1, 1 ; <i1> [#uses=1]
+ br i1 %cond, label %bb26, label %bb4
+
+bb26: ; preds = %bb4
+ %2 = and i64 %ins, 15728640 ; <i64> [#uses=1]
+ %cond.i = icmp eq i64 %2, 1048576 ; <i1> [#uses=1]
+ br i1 %cond.i, label %bb.i, label %bb4
+
+bb.i: ; preds = %bb26
+ %3 = load i32* null, align 4 ; <i32> [#uses=1]
+ %4 = uitofp i32 %3 to float ; <float> [#uses=1]
+ %.sum13.i = add i64 0, 4 ; <i64> [#uses=1]
+ %5 = getelementptr i8* null, i64 %.sum13.i ; <i8*> [#uses=1]
+ %6 = bitcast i8* %5 to i32* ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ %8 = uitofp i32 %7 to float ; <float> [#uses=1]
+ %.sum.i = add i64 0, 8 ; <i64> [#uses=1]
+ %9 = getelementptr i8* null, i64 %.sum.i ; <i8*> [#uses=1]
+ %10 = bitcast i8* %9 to i32* ; <i32*> [#uses=1]
+ %11 = load i32* %10, align 4 ; <i32> [#uses=1]
+ %12 = uitofp i32 %11 to float ; <float> [#uses=1]
+ %13 = insertelement <4 x float> undef, float %4, i32 0 ; <<4 x float>> [#uses=1]
+ %14 = insertelement <4 x float> %13, float %8, i32 1 ; <<4 x float>> [#uses=1]
+ %15 = insertelement <4 x float> %14, float %12, i32 2 ; <<4 x float>> [#uses=1]
+ store <4 x float> %15, <4 x float>* null, align 16
+ br label %bb4
+}
+
+declare i32 @xxGetOffsetForCode(...)
+
+declare i32 @xxCalculateMidType(...)
diff --git a/test/CodeGen/X86/2009-03-03-BTHang.ll b/test/CodeGen/X86/2009-03-03-BTHang.ll
new file mode 100644
index 0000000..bb95925
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-03-BTHang.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=x86
+; rdar://6642541
+
+ %struct.HandleBlock = type { [30 x i32], [990 x i8*], %struct.HandleBlockTrailer }
+ %struct.HandleBlockTrailer = type { %struct.HandleBlock* }
+
+define hidden zeroext i8 @IsHandleAllocatedFromPool(i8** %h) nounwind optsize {
+entry:
+ %0 = ptrtoint i8** %h to i32 ; <i32> [#uses=2]
+ %1 = and i32 %0, -4096 ; <i32> [#uses=1]
+ %2 = inttoptr i32 %1 to %struct.HandleBlock* ; <%struct.HandleBlock*> [#uses=3]
+ %3 = getelementptr %struct.HandleBlock* %2, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 4096 ; <i32> [#uses=1]
+ %5 = icmp eq i32 %4, 1751280747 ; <i1> [#uses=1]
+ br i1 %5, label %bb, label %bb1
+
+bb: ; preds = %entry
+ %6 = getelementptr %struct.HandleBlock* %2, i32 0, i32 1 ; <[990 x i8*]*> [#uses=1]
+ %7 = ptrtoint [990 x i8*]* %6 to i32 ; <i32> [#uses=1]
+ %8 = sub i32 %0, %7 ; <i32> [#uses=2]
+ %9 = lshr i32 %8, 2 ; <i32> [#uses=1]
+ %10 = ashr i32 %8, 7 ; <i32> [#uses=1]
+ %11 = and i32 %10, 134217727 ; <i32> [#uses=1]
+ %12 = getelementptr %struct.HandleBlock* %2, i32 0, i32 0, i32 %11 ; <i32*> [#uses=1]
+ %not.i = and i32 %9, 31 ; <i32> [#uses=1]
+ %13 = xor i32 %not.i, 31 ; <i32> [#uses=1]
+ %14 = shl i32 1, %13 ; <i32> [#uses=1]
+ %15 = load i32* %12, align 4 ; <i32> [#uses=1]
+ %16 = and i32 %15, %14 ; <i32> [#uses=1]
+ %17 = icmp eq i32 %16, 0 ; <i1> [#uses=1]
+ %tmp = zext i1 %17 to i8 ; <i8> [#uses=1]
+ ret i8 %tmp
+
+bb1: ; preds = %entry
+ ret i8 0
+}
+
diff --git a/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll b/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
new file mode 100644
index 0000000..9deeceb
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86
+; PR3686
+; rdar://6661799
+
+define i32 @x(i32 %y) nounwind readnone {
+entry:
+ %tmp14 = zext i32 %y to i80 ; <i80> [#uses=1]
+ %tmp15 = bitcast i80 %tmp14 to x86_fp80 ; <x86_fp80> [#uses=1]
+ %add = fadd x86_fp80 %tmp15, 0xK3FFF8000000000000000 ; <x86_fp80> [#uses=1]
+ %tmp11 = bitcast x86_fp80 %add to i80 ; <i80> [#uses=1]
+ %tmp10 = trunc i80 %tmp11 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
+
diff --git a/test/CodeGen/X86/2009-03-05-burr-list-crash.ll b/test/CodeGen/X86/2009-03-05-burr-list-crash.ll
new file mode 100644
index 0000000..411a0c9
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-05-burr-list-crash.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+external global i32 ; <i32*>:0 [#uses=1]
+
+declare i64 @strlen(i8* nocapture) nounwind readonly
+
+define fastcc i8* @1(i8*) nounwind {
+ br i1 false, label %3, label %2
+
+; <label>:2 ; preds = %1
+ ret i8* %0
+
+; <label>:3 ; preds = %1
+ %4 = call i64 @strlen(i8* %0) nounwind readonly ; <i64> [#uses=1]
+ %5 = trunc i64 %4 to i32 ; <i32> [#uses=2]
+ %6 = load i32* @0, align 4 ; <i32> [#uses=1]
+ %7 = sub i32 %5, %6 ; <i32> [#uses=2]
+ %8 = sext i32 %5 to i64 ; <i64> [#uses=1]
+ %9 = sext i32 %7 to i64 ; <i64> [#uses=1]
+ %10 = sub i64 %8, %9 ; <i64> [#uses=1]
+ %11 = getelementptr i8* %0, i64 %10 ; <i8*> [#uses=1]
+ %12 = icmp sgt i32 %7, 0 ; <i1> [#uses=1]
+ br i1 %12, label %13, label %14
+
+; <label>:13 ; preds = %13, %3
+ br label %13
+
+; <label>:14 ; preds = %3
+ %15 = call noalias i8* @make_temp_file(i8* %11) nounwind ; <i8*> [#uses=0]
+ unreachable
+}
+
+declare noalias i8* @make_temp_file(i8*)
diff --git a/test/CodeGen/X86/2009-03-07-FPConstSelect.ll b/test/CodeGen/X86/2009-03-07-FPConstSelect.ll
new file mode 100644
index 0000000..39caddc
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-07-FPConstSelect.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm
+; This should do a single load into the fp stack for the return, not diddle with xmm registers.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define float @f(i32 %x) nounwind readnone {
+entry:
+ %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
+ ret float %iftmp.0.0
+}
diff --git a/test/CodeGen/X86/2009-03-09-APIntCrash.ll b/test/CodeGen/X86/2009-03-09-APIntCrash.ll
new file mode 100644
index 0000000..896c968
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-09-APIntCrash.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86-64
+; PR3763
+ %struct.__block_descriptor = type { i64, i64 }
+
+define %struct.__block_descriptor @evUTCTime() nounwind {
+entry:
+ br i1 false, label %if.then, label %return
+
+if.then: ; preds = %entry
+ %srcval18 = load i128* null, align 8 ; <i128> [#uses=1]
+ %tmp15 = lshr i128 %srcval18, 64 ; <i128> [#uses=1]
+ %tmp9 = mul i128 %tmp15, 18446744073709551616000 ; <i128> [#uses=1]
+ br label %return
+
+return: ; preds = %if.then, %entry
+ %retval.0 = phi i128 [ %tmp9, %if.then ], [ undef, %entry ] ; <i128> [#uses=0]
+ ret %struct.__block_descriptor undef
+}
+
+define i128 @test(i128 %arg) nounwind {
+ %A = shl i128 1, 92
+ %B = sub i128 0, %A
+ %C = mul i128 %arg, %B
+ ret i128 %C ;; should codegen to neg(shift)
+}
diff --git a/test/CodeGen/X86/2009-03-09-SpillerBug.ll b/test/CodeGen/X86/2009-03-09-SpillerBug.ll
new file mode 100644
index 0000000..4224210
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-09-SpillerBug.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu
+; PR3706
+
+define void @__mulxc3(x86_fp80 %b) nounwind {
+entry:
+ %call = call x86_fp80 @y(x86_fp80* null, x86_fp80* null) ; <x86_fp80> [#uses=0]
+ %cmp = fcmp ord x86_fp80 %b, 0xK00000000000000000000 ; <i1> [#uses=1]
+ %sub = fsub x86_fp80 %b, %b ; <x86_fp80> [#uses=1]
+ %cmp7 = fcmp uno x86_fp80 %sub, 0xK00000000000000000000 ; <i1> [#uses=1]
+ %and12 = and i1 %cmp7, %cmp ; <i1> [#uses=1]
+ %and = zext i1 %and12 to i32 ; <i32> [#uses=1]
+ %conv9 = sitofp i32 %and to x86_fp80 ; <x86_fp80> [#uses=1]
+ store x86_fp80 %conv9, x86_fp80* null
+ store x86_fp80 %b, x86_fp80* null
+ ret void
+}
+
+declare x86_fp80 @y(x86_fp80*, x86_fp80*)
diff --git a/test/CodeGen/X86/2009-03-10-CoalescerBug.ll b/test/CodeGen/X86/2009-03-10-CoalescerBug.ll
new file mode 100644
index 0000000..90dff88
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-10-CoalescerBug.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; rdar://r6661945
+
+ %struct.WINDOW = type { i16, i16, i16, i16, i16, i16, i16, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.ldat*, i16, i16, i32, i32, %struct.WINDOW*, %struct.pdat, i16, %struct.cchar_t }
+ %struct.cchar_t = type { i32, [5 x i32] }
+ %struct.ldat = type { %struct.cchar_t*, i16, i16, i16 }
+ %struct.pdat = type { i16, i16, i16, i16, i16, i16 }
+
+define i32 @pnoutrefresh(%struct.WINDOW* %win, i32 %pminrow, i32 %pmincol, i32 %sminrow, i32 %smincol, i32 %smaxrow, i32 %smaxcol) nounwind optsize ssp {
+entry:
+ %0 = load i16* null, align 4 ; <i16> [#uses=2]
+ %1 = icmp sgt i16 0, %0 ; <i1> [#uses=1]
+ br i1 %1, label %bb12, label %bb13
+
+bb12: ; preds = %entry
+ %2 = sext i16 %0 to i32 ; <i32> [#uses=1]
+ %3 = sub i32 %2, 0 ; <i32> [#uses=1]
+ %4 = add i32 %3, %smaxrow ; <i32> [#uses=2]
+ %5 = trunc i32 %4 to i16 ; <i16> [#uses=1]
+ %6 = add i16 0, %5 ; <i16> [#uses=1]
+ br label %bb13
+
+bb13: ; preds = %bb12, %entry
+ %pmaxrow.0 = phi i16 [ %6, %bb12 ], [ 0, %entry ] ; <i16> [#uses=0]
+ %smaxrow_addr.0 = phi i32 [ %4, %bb12 ], [ %smaxrow, %entry ] ; <i32> [#uses=1]
+ %7 = trunc i32 %smaxrow_addr.0 to i16 ; <i16> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2009-03-11-CoalescerBug.ll b/test/CodeGen/X86/2009-03-11-CoalescerBug.ll
new file mode 100644
index 0000000..d5ba93e
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-11-CoalescerBug.ll
@@ -0,0 +1,85 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -stats |& grep regcoalescing | grep commuting
+
+@lookupTable5B = external global [64 x i32], align 32 ; <[64 x i32]*> [#uses=1]
+@lookupTable3B = external global [16 x i32], align 32 ; <[16 x i32]*> [#uses=1]
+@disparity0 = external global i32 ; <i32*> [#uses=5]
+@disparity1 = external global i32 ; <i32*> [#uses=3]
+
+define i32 @calc(i32 %theWord, i32 %k) nounwind {
+entry:
+ %0 = lshr i32 %theWord, 3 ; <i32> [#uses=1]
+ %1 = and i32 %0, 31 ; <i32> [#uses=1]
+ %2 = shl i32 %k, 5 ; <i32> [#uses=1]
+ %3 = or i32 %1, %2 ; <i32> [#uses=1]
+ %4 = and i32 %theWord, 7 ; <i32> [#uses=1]
+ %5 = shl i32 %k, 3 ; <i32> [#uses=1]
+ %6 = or i32 %5, %4 ; <i32> [#uses=1]
+ %7 = getelementptr [64 x i32]* @lookupTable5B, i32 0, i32 %3 ; <i32*> [#uses=1]
+ %8 = load i32* %7, align 4 ; <i32> [#uses=5]
+ %9 = getelementptr [16 x i32]* @lookupTable3B, i32 0, i32 %6 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 4 ; <i32> [#uses=5]
+ %11 = and i32 %8, 65536 ; <i32> [#uses=1]
+ %12 = icmp eq i32 %11, 0 ; <i1> [#uses=1]
+ br i1 %12, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %13 = and i32 %8, 994 ; <i32> [#uses=1]
+ %14 = load i32* @disparity0, align 4 ; <i32> [#uses=2]
+ store i32 %14, i32* @disparity1, align 4
+ br label %bb8
+
+bb1: ; preds = %entry
+ %15 = lshr i32 %8, 18 ; <i32> [#uses=1]
+ %16 = and i32 %15, 1 ; <i32> [#uses=1]
+ %17 = load i32* @disparity0, align 4 ; <i32> [#uses=4]
+ %18 = icmp eq i32 %16, %17 ; <i1> [#uses=1]
+ %not = select i1 %18, i32 0, i32 994 ; <i32> [#uses=1]
+ %.masked = and i32 %8, 994 ; <i32> [#uses=1]
+ %result.1 = xor i32 %not, %.masked ; <i32> [#uses=2]
+ %19 = and i32 %8, 524288 ; <i32> [#uses=1]
+ %20 = icmp eq i32 %19, 0 ; <i1> [#uses=1]
+ br i1 %20, label %bb7, label %bb6
+
+bb6: ; preds = %bb1
+ %21 = xor i32 %17, 1 ; <i32> [#uses=2]
+ store i32 %21, i32* @disparity1, align 4
+ br label %bb8
+
+bb7: ; preds = %bb1
+ store i32 %17, i32* @disparity1, align 4
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb6, %bb
+ %22 = phi i32 [ %17, %bb7 ], [ %21, %bb6 ], [ %14, %bb ] ; <i32> [#uses=4]
+ %result.0 = phi i32 [ %result.1, %bb7 ], [ %result.1, %bb6 ], [ %13, %bb ] ; <i32> [#uses=2]
+ %23 = and i32 %10, 65536 ; <i32> [#uses=1]
+ %24 = icmp eq i32 %23, 0 ; <i1> [#uses=1]
+ br i1 %24, label %bb10, label %bb9
+
+bb9: ; preds = %bb8
+ %25 = and i32 %10, 29 ; <i32> [#uses=1]
+ %26 = or i32 %result.0, %25 ; <i32> [#uses=1]
+ store i32 %22, i32* @disparity0, align 4
+ ret i32 %26
+
+bb10: ; preds = %bb8
+ %27 = lshr i32 %10, 18 ; <i32> [#uses=1]
+ %28 = and i32 %27, 1 ; <i32> [#uses=1]
+ %29 = icmp eq i32 %28, %22 ; <i1> [#uses=1]
+ %not13 = select i1 %29, i32 0, i32 29 ; <i32> [#uses=1]
+ %.masked20 = and i32 %10, 29 ; <i32> [#uses=1]
+ %.pn = xor i32 %not13, %.masked20 ; <i32> [#uses=1]
+ %result.3 = or i32 %.pn, %result.0 ; <i32> [#uses=2]
+ %30 = and i32 %10, 524288 ; <i32> [#uses=1]
+ %31 = icmp eq i32 %30, 0 ; <i1> [#uses=1]
+ br i1 %31, label %bb17, label %bb16
+
+bb16: ; preds = %bb10
+ %32 = xor i32 %22, 1 ; <i32> [#uses=1]
+ store i32 %32, i32* @disparity0, align 4
+ ret i32 %result.3
+
+bb17: ; preds = %bb10
+ store i32 %22, i32* @disparity0, align 4
+ ret i32 %result.3
+}
diff --git a/test/CodeGen/X86/2009-03-12-CPAlignBug.ll b/test/CodeGen/X86/2009-03-12-CPAlignBug.ll
new file mode 100644
index 0000000..3564f01
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-12-CPAlignBug.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 | not grep {.space}
+; rdar://6668548
+
+declare double @llvm.sqrt.f64(double) nounwind readonly
+
+declare double @fabs(double)
+
+declare double @llvm.pow.f64(double, double) nounwind readonly
+
+define void @SolveCubic_bb1(i32* %solutions, double* %x, x86_fp80 %.reload, x86_fp80 %.reload5, x86_fp80 %.reload6, double %.reload8) nounwind {
+newFuncRoot:
+ br label %bb1
+
+bb1.ret.exitStub: ; preds = %bb1
+ ret void
+
+bb1: ; preds = %newFuncRoot
+ store i32 1, i32* %solutions, align 4
+ %0 = tail call double @llvm.sqrt.f64(double %.reload8) ; <double> [#uses=1]
+ %1 = fptrunc x86_fp80 %.reload6 to double ; <double> [#uses=1]
+ %2 = tail call double @fabs(double %1) nounwind readnone ; <double> [#uses=1]
+ %3 = fadd double %0, %2 ; <double> [#uses=1]
+ %4 = tail call double @llvm.pow.f64(double %3, double 0x3FD5555555555555) ; <double> [#uses=1]
+ %5 = fpext double %4 to x86_fp80 ; <x86_fp80> [#uses=2]
+ %6 = fdiv x86_fp80 %.reload5, %5 ; <x86_fp80> [#uses=1]
+ %7 = fadd x86_fp80 %5, %6 ; <x86_fp80> [#uses=1]
+ %8 = fptrunc x86_fp80 %7 to double ; <double> [#uses=1]
+ %9 = fcmp olt x86_fp80 %.reload6, 0xK00000000000000000000 ; <i1> [#uses=1]
+ %iftmp.6.0 = select i1 %9, double 1.000000e+00, double -1.000000e+00 ; <double> [#uses=1]
+ %10 = fmul double %8, %iftmp.6.0 ; <double> [#uses=1]
+ %11 = fpext double %10 to x86_fp80 ; <x86_fp80> [#uses=1]
+ %12 = fdiv x86_fp80 %.reload, 0xKC000C000000000000000 ; <x86_fp80> [#uses=1]
+ %13 = fadd x86_fp80 %11, %12 ; <x86_fp80> [#uses=1]
+ %14 = fptrunc x86_fp80 %13 to double ; <double> [#uses=1]
+ store double %14, double* %x, align 1
+ br label %bb1.ret.exitStub
+}
diff --git a/test/CodeGen/X86/2009-03-13-PHIElimBug.ll b/test/CodeGen/X86/2009-03-13-PHIElimBug.ll
new file mode 100644
index 0000000..ad7f9f7
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-13-PHIElimBug.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=x86 | FileCheck %s
+; Check the register copy comes after the call to f and before the call to g
+; PR3784
+
+declare i32 @f()
+
+declare i32 @g()
+
+define i32 @phi() {
+entry:
+ %a = call i32 @f() ; <i32> [#uses=1]
+ %b = invoke i32 @g()
+ to label %cont unwind label %lpad ; <i32> [#uses=1]
+
+cont: ; preds = %entry
+ %x = phi i32 [ %b, %entry ] ; <i32> [#uses=0]
+ %aa = call i32 @g() ; <i32> [#uses=1]
+ %bb = invoke i32 @g()
+ to label %cont2 unwind label %lpad ; <i32> [#uses=1]
+
+cont2: ; preds = %cont
+ %xx = phi i32 [ %bb, %cont ] ; <i32> [#uses=1]
+ ret i32 %xx
+
+lpad: ; preds = %cont, %entry
+ %y = phi i32 [ %a, %entry ], [ %aa, %cont ] ; <i32> [#uses=1]
+ ret i32 %y
+}
+
+; CHECK: call{{.*}}f
+; CHECK-NEXT: Llabel1:
+; CHECK-NEXT: movl %eax, %esi
diff --git a/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll b/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
new file mode 100644
index 0000000..11c4101
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s
+; Check that register copies in the landing pad come after the EH_LABEL
+
+declare i32 @f()
+
+define i32 @phi(i32 %x) {
+entry:
+ %a = invoke i32 @f()
+ to label %cont unwind label %lpad ; <i32> [#uses=1]
+
+cont: ; preds = %entry
+ %b = invoke i32 @f()
+ to label %cont2 unwind label %lpad ; <i32> [#uses=1]
+
+cont2: ; preds = %cont
+ ret i32 %b
+
+lpad: ; preds = %cont, %entry
+ %v = phi i32 [ %x, %entry ], [ %a, %cont ] ; <i32> [#uses=1]
+ ret i32 %v
+}
+
+; CHECK: lpad
+; CHECK-NEXT: Llabel
diff --git a/test/CodeGen/X86/2009-03-16-SpillerBug.ll b/test/CodeGen/X86/2009-03-16-SpillerBug.ll
new file mode 100644
index 0000000..80e7639
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-16-SpillerBug.ll
@@ -0,0 +1,167 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -stats |& grep virtregrewriter | not grep {stores unfolded}
+; rdar://6682365
+
+; Do not clobber a register if another spill slot is available in it and it's marked "do not clobber".
+
+ %struct.CAST_KEY = type { [32 x i32], i32 }
+@CAST_S_table0 = constant [2 x i32] [i32 821772500, i32 -1616838901], align 32 ; <[2 x i32]*> [#uses=0]
+@CAST_S_table4 = constant [2 x i32] [i32 2127105028, i32 745436345], align 32 ; <[2 x i32]*> [#uses=6]
+@CAST_S_table5 = constant [2 x i32] [i32 -151351395, i32 749497569], align 32 ; <[2 x i32]*> [#uses=5]
+@CAST_S_table6 = constant [2 x i32] [i32 -2048901095, i32 858518887], align 32 ; <[2 x i32]*> [#uses=4]
+@CAST_S_table7 = constant [2 x i32] [i32 -501862387, i32 -1143078916], align 32 ; <[2 x i32]*> [#uses=5]
+@CAST_S_table1 = constant [2 x i32] [i32 522195092, i32 -284448933], align 32 ; <[2 x i32]*> [#uses=0]
+@CAST_S_table2 = constant [2 x i32] [i32 -1913667008, i32 637164959], align 32 ; <[2 x i32]*> [#uses=0]
+@CAST_S_table3 = constant [2 x i32] [i32 -1649212384, i32 532081118], align 32 ; <[2 x i32]*> [#uses=0]
+
+define void @CAST_set_key(%struct.CAST_KEY* nocapture %key, i32 %len, i8* nocapture %data) nounwind ssp {
+bb1.thread:
+ %0 = getelementptr [16 x i32]* null, i32 0, i32 5 ; <i32*> [#uses=1]
+ %1 = getelementptr [16 x i32]* null, i32 0, i32 8 ; <i32*> [#uses=1]
+ %2 = load i32* null, align 4 ; <i32> [#uses=1]
+ %3 = shl i32 %2, 24 ; <i32> [#uses=1]
+ %4 = load i32* null, align 4 ; <i32> [#uses=1]
+ %5 = shl i32 %4, 16 ; <i32> [#uses=1]
+ %6 = load i32* null, align 4 ; <i32> [#uses=1]
+ %7 = or i32 %5, %3 ; <i32> [#uses=1]
+ %8 = or i32 %7, %6 ; <i32> [#uses=1]
+ %9 = or i32 %8, 0 ; <i32> [#uses=1]
+ %10 = load i32* null, align 4 ; <i32> [#uses=1]
+ %11 = shl i32 %10, 24 ; <i32> [#uses=1]
+ %12 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %13 = shl i32 %12, 16 ; <i32> [#uses=1]
+ %14 = load i32* null, align 4 ; <i32> [#uses=1]
+ %15 = or i32 %13, %11 ; <i32> [#uses=1]
+ %16 = or i32 %15, %14 ; <i32> [#uses=1]
+ %17 = or i32 %16, 0 ; <i32> [#uses=1]
+ br label %bb11
+
+bb11: ; preds = %bb11, %bb1.thread
+ %18 = phi i32 [ %110, %bb11 ], [ 0, %bb1.thread ] ; <i32> [#uses=1]
+ %19 = phi i32 [ %112, %bb11 ], [ 0, %bb1.thread ] ; <i32> [#uses=0]
+ %20 = phi i32 [ 0, %bb11 ], [ 0, %bb1.thread ] ; <i32> [#uses=0]
+ %21 = phi i32 [ %113, %bb11 ], [ 0, %bb1.thread ] ; <i32> [#uses=1]
+ %X.0.0 = phi i32 [ %9, %bb1.thread ], [ %92, %bb11 ] ; <i32> [#uses=0]
+ %X.1.0 = phi i32 [ %17, %bb1.thread ], [ 0, %bb11 ] ; <i32> [#uses=0]
+ %22 = getelementptr [2 x i32]* @CAST_S_table6, i32 0, i32 %21 ; <i32*> [#uses=0]
+ %23 = getelementptr [2 x i32]* @CAST_S_table5, i32 0, i32 %18 ; <i32*> [#uses=0]
+ %24 = load i32* null, align 4 ; <i32> [#uses=1]
+ %25 = xor i32 0, %24 ; <i32> [#uses=1]
+ %26 = xor i32 %25, 0 ; <i32> [#uses=1]
+ %27 = xor i32 %26, 0 ; <i32> [#uses=4]
+ %28 = and i32 %27, 255 ; <i32> [#uses=2]
+ %29 = lshr i32 %27, 8 ; <i32> [#uses=1]
+ %30 = and i32 %29, 255 ; <i32> [#uses=2]
+ %31 = lshr i32 %27, 16 ; <i32> [#uses=1]
+ %32 = and i32 %31, 255 ; <i32> [#uses=1]
+ %33 = getelementptr [2 x i32]* @CAST_S_table4, i32 0, i32 %28 ; <i32*> [#uses=1]
+ %34 = load i32* %33, align 4 ; <i32> [#uses=2]
+ %35 = getelementptr [2 x i32]* @CAST_S_table5, i32 0, i32 %30 ; <i32*> [#uses=1]
+ %36 = load i32* %35, align 4 ; <i32> [#uses=2]
+ %37 = xor i32 %34, 0 ; <i32> [#uses=1]
+ %38 = xor i32 %37, %36 ; <i32> [#uses=1]
+ %39 = xor i32 %38, 0 ; <i32> [#uses=1]
+ %40 = xor i32 %39, 0 ; <i32> [#uses=1]
+ %41 = xor i32 %40, 0 ; <i32> [#uses=3]
+ %42 = lshr i32 %41, 8 ; <i32> [#uses=1]
+ %43 = and i32 %42, 255 ; <i32> [#uses=2]
+ %44 = lshr i32 %41, 16 ; <i32> [#uses=1]
+ %45 = and i32 %44, 255 ; <i32> [#uses=1]
+ %46 = getelementptr [2 x i32]* @CAST_S_table4, i32 0, i32 %43 ; <i32*> [#uses=1]
+ %47 = load i32* %46, align 4 ; <i32> [#uses=1]
+ %48 = load i32* null, align 4 ; <i32> [#uses=1]
+ %49 = xor i32 %47, 0 ; <i32> [#uses=1]
+ %50 = xor i32 %49, %48 ; <i32> [#uses=1]
+ %51 = xor i32 %50, 0 ; <i32> [#uses=1]
+ %52 = xor i32 %51, 0 ; <i32> [#uses=1]
+ %53 = xor i32 %52, 0 ; <i32> [#uses=2]
+ %54 = and i32 %53, 255 ; <i32> [#uses=1]
+ %55 = lshr i32 %53, 24 ; <i32> [#uses=1]
+ %56 = getelementptr [2 x i32]* @CAST_S_table6, i32 0, i32 %55 ; <i32*> [#uses=1]
+ %57 = load i32* %56, align 4 ; <i32> [#uses=1]
+ %58 = xor i32 0, %57 ; <i32> [#uses=1]
+ %59 = xor i32 %58, 0 ; <i32> [#uses=1]
+ %60 = xor i32 %59, 0 ; <i32> [#uses=1]
+ store i32 %60, i32* null, align 4
+ %61 = getelementptr [2 x i32]* @CAST_S_table4, i32 0, i32 0 ; <i32*> [#uses=1]
+ %62 = load i32* %61, align 4 ; <i32> [#uses=1]
+ %63 = getelementptr [2 x i32]* @CAST_S_table7, i32 0, i32 %54 ; <i32*> [#uses=1]
+ %64 = load i32* %63, align 4 ; <i32> [#uses=1]
+ %65 = xor i32 0, %64 ; <i32> [#uses=1]
+ %66 = xor i32 %65, 0 ; <i32> [#uses=1]
+ store i32 %66, i32* null, align 4
+ %67 = getelementptr [2 x i32]* @CAST_S_table7, i32 0, i32 %45 ; <i32*> [#uses=1]
+ %68 = load i32* %67, align 4 ; <i32> [#uses=1]
+ %69 = xor i32 %36, %34 ; <i32> [#uses=1]
+ %70 = xor i32 %69, 0 ; <i32> [#uses=1]
+ %71 = xor i32 %70, %68 ; <i32> [#uses=1]
+ %72 = xor i32 %71, 0 ; <i32> [#uses=1]
+ store i32 %72, i32* null, align 4
+ %73 = getelementptr [2 x i32]* @CAST_S_table4, i32 0, i32 %32 ; <i32*> [#uses=1]
+ %74 = load i32* %73, align 4 ; <i32> [#uses=2]
+ %75 = load i32* null, align 4 ; <i32> [#uses=1]
+ %76 = getelementptr [2 x i32]* @CAST_S_table6, i32 0, i32 %43 ; <i32*> [#uses=1]
+ %77 = load i32* %76, align 4 ; <i32> [#uses=1]
+ %78 = getelementptr [2 x i32]* @CAST_S_table7, i32 0, i32 0 ; <i32*> [#uses=1]
+ %79 = load i32* %78, align 4 ; <i32> [#uses=1]
+ %80 = getelementptr [2 x i32]* @CAST_S_table7, i32 0, i32 %30 ; <i32*> [#uses=1]
+ %81 = load i32* %80, align 4 ; <i32> [#uses=2]
+ %82 = xor i32 %75, %74 ; <i32> [#uses=1]
+ %83 = xor i32 %82, %77 ; <i32> [#uses=1]
+ %84 = xor i32 %83, %79 ; <i32> [#uses=1]
+ %85 = xor i32 %84, %81 ; <i32> [#uses=1]
+ store i32 %85, i32* null, align 4
+ %86 = getelementptr [2 x i32]* @CAST_S_table5, i32 0, i32 %28 ; <i32*> [#uses=1]
+ %87 = load i32* %86, align 4 ; <i32> [#uses=1]
+ %88 = xor i32 %74, %41 ; <i32> [#uses=1]
+ %89 = xor i32 %88, %87 ; <i32> [#uses=1]
+ %90 = xor i32 %89, 0 ; <i32> [#uses=1]
+ %91 = xor i32 %90, %81 ; <i32> [#uses=1]
+ %92 = xor i32 %91, 0 ; <i32> [#uses=3]
+ %93 = lshr i32 %92, 16 ; <i32> [#uses=1]
+ %94 = and i32 %93, 255 ; <i32> [#uses=1]
+ store i32 %94, i32* null, align 4
+ %95 = lshr i32 %92, 24 ; <i32> [#uses=2]
+ %96 = getelementptr [2 x i32]* @CAST_S_table4, i32 0, i32 %95 ; <i32*> [#uses=1]
+ %97 = load i32* %96, align 4 ; <i32> [#uses=1]
+ %98 = getelementptr [2 x i32]* @CAST_S_table5, i32 0, i32 0 ; <i32*> [#uses=1]
+ %99 = load i32* %98, align 4 ; <i32> [#uses=1]
+ %100 = load i32* null, align 4 ; <i32> [#uses=0]
+ %101 = xor i32 %97, 0 ; <i32> [#uses=1]
+ %102 = xor i32 %101, %99 ; <i32> [#uses=1]
+ %103 = xor i32 %102, 0 ; <i32> [#uses=1]
+ %104 = xor i32 %103, 0 ; <i32> [#uses=0]
+ store i32 0, i32* null, align 4
+ %105 = xor i32 0, %27 ; <i32> [#uses=1]
+ %106 = xor i32 %105, 0 ; <i32> [#uses=1]
+ %107 = xor i32 %106, 0 ; <i32> [#uses=1]
+ %108 = xor i32 %107, 0 ; <i32> [#uses=1]
+ %109 = xor i32 %108, %62 ; <i32> [#uses=3]
+ %110 = and i32 %109, 255 ; <i32> [#uses=1]
+ %111 = lshr i32 %109, 16 ; <i32> [#uses=1]
+ %112 = and i32 %111, 255 ; <i32> [#uses=1]
+ %113 = lshr i32 %109, 24 ; <i32> [#uses=3]
+ store i32 %113, i32* %1, align 4
+ %114 = load i32* null, align 4 ; <i32> [#uses=1]
+ %115 = xor i32 0, %114 ; <i32> [#uses=1]
+ %116 = xor i32 %115, 0 ; <i32> [#uses=1]
+ %117 = xor i32 %116, 0 ; <i32> [#uses=1]
+ %K.0.sum42 = or i32 0, 12 ; <i32> [#uses=1]
+ %118 = getelementptr [32 x i32]* null, i32 0, i32 %K.0.sum42 ; <i32*> [#uses=1]
+ store i32 %117, i32* %118, align 4
+ %119 = getelementptr [2 x i32]* @CAST_S_table5, i32 0, i32 0 ; <i32*> [#uses=0]
+ store i32 0, i32* null, align 4
+ %120 = getelementptr [2 x i32]* @CAST_S_table6, i32 0, i32 %113 ; <i32*> [#uses=1]
+ %121 = load i32* %120, align 4 ; <i32> [#uses=1]
+ %122 = xor i32 0, %121 ; <i32> [#uses=1]
+ store i32 %122, i32* null, align 4
+ %123 = getelementptr [2 x i32]* @CAST_S_table4, i32 0, i32 0 ; <i32*> [#uses=1]
+ %124 = load i32* %123, align 4 ; <i32> [#uses=1]
+ %125 = getelementptr [2 x i32]* @CAST_S_table7, i32 0, i32 %95 ; <i32*> [#uses=1]
+ %126 = load i32* %125, align 4 ; <i32> [#uses=1]
+ %127 = xor i32 0, %124 ; <i32> [#uses=1]
+ %128 = xor i32 %127, 0 ; <i32> [#uses=1]
+ %129 = xor i32 %128, %126 ; <i32> [#uses=1]
+ %130 = xor i32 %129, 0 ; <i32> [#uses=1]
+ store i32 %130, i32* null, align 4
+ br label %bb11
+}
diff --git a/test/CodeGen/X86/2009-03-23-LinearScanBug.ll b/test/CodeGen/X86/2009-03-23-LinearScanBug.ll
new file mode 100644
index 0000000..06dfdc0
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-23-LinearScanBug.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -O0
+
+define fastcc void @optimize_bit_field() nounwind {
+bb4:
+ %a = load i32* null ; <i32> [#uses=1]
+ %s = load i32* getelementptr (i32* null, i32 1) ; <i32> [#uses=1]
+ %z = load i32* getelementptr (i32* null, i32 2) ; <i32> [#uses=1]
+ %r = bitcast i32 0 to i32 ; <i32> [#uses=1]
+ %q = trunc i32 %z to i8 ; <i8> [#uses=1]
+ %b = icmp eq i8 0, %q ; <i1> [#uses=1]
+ br i1 %b, label %bb73, label %bb72
+
+bb72: ; preds = %bb4
+ %f = tail call fastcc i32 @gen_lowpart(i32 %r, i32 %a) nounwind ; <i32> [#uses=1]
+ br label %bb73
+
+bb73: ; preds = %bb72, %bb4
+ %y = phi i32 [ %f, %bb72 ], [ %s, %bb4 ] ; <i32> [#uses=1]
+ store i32 %y, i32* getelementptr (i32* null, i32 3)
+ unreachable
+}
+
+declare fastcc i32 @gen_lowpart(i32, i32) nounwind
diff --git a/test/CodeGen/X86/2009-03-23-MultiUseSched.ll b/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
new file mode 100644
index 0000000..b5873ba
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
@@ -0,0 +1,242 @@
+; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static -stats -info-output-file - > %t
+; RUN: not grep spill %t
+; RUN: not grep {%rsp} %t
+; RUN: not grep {%rbp} %t
+
+; The register-pressure scheduler should be able to schedule this in a
+; way that does not require spills.
+
+@X = external global i64 ; <i64*> [#uses=25]
+
+define fastcc i64 @foo() nounwind {
+ %tmp = volatile load i64* @X ; <i64> [#uses=7]
+ %tmp1 = volatile load i64* @X ; <i64> [#uses=5]
+ %tmp2 = volatile load i64* @X ; <i64> [#uses=3]
+ %tmp3 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp4 = volatile load i64* @X ; <i64> [#uses=5]
+ %tmp5 = volatile load i64* @X ; <i64> [#uses=3]
+ %tmp6 = volatile load i64* @X ; <i64> [#uses=2]
+ %tmp7 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp8 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp9 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp10 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp11 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp12 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp13 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp14 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp15 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp16 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp17 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp18 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp19 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp20 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp21 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp22 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp23 = volatile load i64* @X ; <i64> [#uses=1]
+ %tmp24 = call i64 @llvm.bswap.i64(i64 %tmp8) ; <i64> [#uses=1]
+ %tmp25 = add i64 %tmp6, %tmp5 ; <i64> [#uses=1]
+ %tmp26 = add i64 %tmp25, %tmp4 ; <i64> [#uses=1]
+ %tmp27 = add i64 %tmp7, %tmp4 ; <i64> [#uses=1]
+ %tmp28 = add i64 %tmp27, %tmp26 ; <i64> [#uses=1]
+ %tmp29 = add i64 %tmp28, %tmp24 ; <i64> [#uses=2]
+ %tmp30 = add i64 %tmp2, %tmp1 ; <i64> [#uses=1]
+ %tmp31 = add i64 %tmp30, %tmp ; <i64> [#uses=1]
+ %tmp32 = add i64 %tmp2, %tmp1 ; <i64> [#uses=1]
+ %tmp33 = add i64 %tmp31, %tmp32 ; <i64> [#uses=1]
+ %tmp34 = add i64 %tmp29, %tmp3 ; <i64> [#uses=5]
+ %tmp35 = add i64 %tmp33, %tmp ; <i64> [#uses=1]
+ %tmp36 = add i64 %tmp35, %tmp29 ; <i64> [#uses=7]
+ %tmp37 = call i64 @llvm.bswap.i64(i64 %tmp9) ; <i64> [#uses=1]
+ %tmp38 = add i64 %tmp4, %tmp5 ; <i64> [#uses=1]
+ %tmp39 = add i64 %tmp38, %tmp34 ; <i64> [#uses=1]
+ %tmp40 = add i64 %tmp6, %tmp37 ; <i64> [#uses=1]
+ %tmp41 = add i64 %tmp40, %tmp39 ; <i64> [#uses=1]
+ %tmp42 = add i64 %tmp41, %tmp34 ; <i64> [#uses=2]
+ %tmp43 = add i64 %tmp1, %tmp ; <i64> [#uses=1]
+ %tmp44 = add i64 %tmp36, %tmp43 ; <i64> [#uses=1]
+ %tmp45 = add i64 %tmp1, %tmp ; <i64> [#uses=1]
+ %tmp46 = add i64 %tmp44, %tmp45 ; <i64> [#uses=1]
+ %tmp47 = add i64 %tmp42, %tmp2 ; <i64> [#uses=5]
+ %tmp48 = add i64 %tmp36, %tmp46 ; <i64> [#uses=1]
+ %tmp49 = add i64 %tmp48, %tmp42 ; <i64> [#uses=7]
+ %tmp50 = call i64 @llvm.bswap.i64(i64 %tmp10) ; <i64> [#uses=1]
+ %tmp51 = add i64 %tmp34, %tmp4 ; <i64> [#uses=1]
+ %tmp52 = add i64 %tmp51, %tmp47 ; <i64> [#uses=1]
+ %tmp53 = add i64 %tmp5, %tmp50 ; <i64> [#uses=1]
+ %tmp54 = add i64 %tmp53, %tmp52 ; <i64> [#uses=1]
+ %tmp55 = add i64 %tmp54, %tmp47 ; <i64> [#uses=2]
+ %tmp56 = add i64 %tmp36, %tmp ; <i64> [#uses=1]
+ %tmp57 = add i64 %tmp49, %tmp56 ; <i64> [#uses=1]
+ %tmp58 = add i64 %tmp36, %tmp ; <i64> [#uses=1]
+ %tmp59 = add i64 %tmp57, %tmp58 ; <i64> [#uses=1]
+ %tmp60 = add i64 %tmp55, %tmp1 ; <i64> [#uses=5]
+ %tmp61 = add i64 %tmp49, %tmp59 ; <i64> [#uses=1]
+ %tmp62 = add i64 %tmp61, %tmp55 ; <i64> [#uses=7]
+ %tmp63 = call i64 @llvm.bswap.i64(i64 %tmp11) ; <i64> [#uses=1]
+ %tmp64 = add i64 %tmp47, %tmp34 ; <i64> [#uses=1]
+ %tmp65 = add i64 %tmp64, %tmp60 ; <i64> [#uses=1]
+ %tmp66 = add i64 %tmp4, %tmp63 ; <i64> [#uses=1]
+ %tmp67 = add i64 %tmp66, %tmp65 ; <i64> [#uses=1]
+ %tmp68 = add i64 %tmp67, %tmp60 ; <i64> [#uses=2]
+ %tmp69 = add i64 %tmp49, %tmp36 ; <i64> [#uses=1]
+ %tmp70 = add i64 %tmp62, %tmp69 ; <i64> [#uses=1]
+ %tmp71 = add i64 %tmp49, %tmp36 ; <i64> [#uses=1]
+ %tmp72 = add i64 %tmp70, %tmp71 ; <i64> [#uses=1]
+ %tmp73 = add i64 %tmp68, %tmp ; <i64> [#uses=5]
+ %tmp74 = add i64 %tmp62, %tmp72 ; <i64> [#uses=1]
+ %tmp75 = add i64 %tmp74, %tmp68 ; <i64> [#uses=7]
+ %tmp76 = call i64 @llvm.bswap.i64(i64 %tmp12) ; <i64> [#uses=1]
+ %tmp77 = add i64 %tmp60, %tmp47 ; <i64> [#uses=1]
+ %tmp78 = add i64 %tmp77, %tmp73 ; <i64> [#uses=1]
+ %tmp79 = add i64 %tmp34, %tmp76 ; <i64> [#uses=1]
+ %tmp80 = add i64 %tmp79, %tmp78 ; <i64> [#uses=1]
+ %tmp81 = add i64 %tmp80, %tmp73 ; <i64> [#uses=2]
+ %tmp82 = add i64 %tmp62, %tmp49 ; <i64> [#uses=1]
+ %tmp83 = add i64 %tmp75, %tmp82 ; <i64> [#uses=1]
+ %tmp84 = add i64 %tmp62, %tmp49 ; <i64> [#uses=1]
+ %tmp85 = add i64 %tmp83, %tmp84 ; <i64> [#uses=1]
+ %tmp86 = add i64 %tmp81, %tmp36 ; <i64> [#uses=5]
+ %tmp87 = add i64 %tmp75, %tmp85 ; <i64> [#uses=1]
+ %tmp88 = add i64 %tmp87, %tmp81 ; <i64> [#uses=7]
+ %tmp89 = call i64 @llvm.bswap.i64(i64 %tmp13) ; <i64> [#uses=1]
+ %tmp90 = add i64 %tmp73, %tmp60 ; <i64> [#uses=1]
+ %tmp91 = add i64 %tmp90, %tmp86 ; <i64> [#uses=1]
+ %tmp92 = add i64 %tmp47, %tmp89 ; <i64> [#uses=1]
+ %tmp93 = add i64 %tmp92, %tmp91 ; <i64> [#uses=1]
+ %tmp94 = add i64 %tmp93, %tmp86 ; <i64> [#uses=2]
+ %tmp95 = add i64 %tmp75, %tmp62 ; <i64> [#uses=1]
+ %tmp96 = add i64 %tmp88, %tmp95 ; <i64> [#uses=1]
+ %tmp97 = add i64 %tmp75, %tmp62 ; <i64> [#uses=1]
+ %tmp98 = add i64 %tmp96, %tmp97 ; <i64> [#uses=1]
+ %tmp99 = add i64 %tmp94, %tmp49 ; <i64> [#uses=5]
+ %tmp100 = add i64 %tmp88, %tmp98 ; <i64> [#uses=1]
+ %tmp101 = add i64 %tmp100, %tmp94 ; <i64> [#uses=7]
+ %tmp102 = call i64 @llvm.bswap.i64(i64 %tmp14) ; <i64> [#uses=1]
+ %tmp103 = add i64 %tmp86, %tmp73 ; <i64> [#uses=1]
+ %tmp104 = add i64 %tmp103, %tmp99 ; <i64> [#uses=1]
+ %tmp105 = add i64 %tmp102, %tmp60 ; <i64> [#uses=1]
+ %tmp106 = add i64 %tmp105, %tmp104 ; <i64> [#uses=1]
+ %tmp107 = add i64 %tmp106, %tmp99 ; <i64> [#uses=2]
+ %tmp108 = add i64 %tmp88, %tmp75 ; <i64> [#uses=1]
+ %tmp109 = add i64 %tmp101, %tmp108 ; <i64> [#uses=1]
+ %tmp110 = add i64 %tmp88, %tmp75 ; <i64> [#uses=1]
+ %tmp111 = add i64 %tmp109, %tmp110 ; <i64> [#uses=1]
+ %tmp112 = add i64 %tmp107, %tmp62 ; <i64> [#uses=5]
+ %tmp113 = add i64 %tmp101, %tmp111 ; <i64> [#uses=1]
+ %tmp114 = add i64 %tmp113, %tmp107 ; <i64> [#uses=7]
+ %tmp115 = call i64 @llvm.bswap.i64(i64 %tmp15) ; <i64> [#uses=1]
+ %tmp116 = add i64 %tmp99, %tmp86 ; <i64> [#uses=1]
+ %tmp117 = add i64 %tmp116, %tmp112 ; <i64> [#uses=1]
+ %tmp118 = add i64 %tmp115, %tmp73 ; <i64> [#uses=1]
+ %tmp119 = add i64 %tmp118, %tmp117 ; <i64> [#uses=1]
+ %tmp120 = add i64 %tmp119, %tmp112 ; <i64> [#uses=2]
+ %tmp121 = add i64 %tmp101, %tmp88 ; <i64> [#uses=1]
+ %tmp122 = add i64 %tmp114, %tmp121 ; <i64> [#uses=1]
+ %tmp123 = add i64 %tmp101, %tmp88 ; <i64> [#uses=1]
+ %tmp124 = add i64 %tmp122, %tmp123 ; <i64> [#uses=1]
+ %tmp125 = add i64 %tmp120, %tmp75 ; <i64> [#uses=5]
+ %tmp126 = add i64 %tmp114, %tmp124 ; <i64> [#uses=1]
+ %tmp127 = add i64 %tmp126, %tmp120 ; <i64> [#uses=7]
+ %tmp128 = call i64 @llvm.bswap.i64(i64 %tmp16) ; <i64> [#uses=1]
+ %tmp129 = add i64 %tmp112, %tmp99 ; <i64> [#uses=1]
+ %tmp130 = add i64 %tmp129, %tmp125 ; <i64> [#uses=1]
+ %tmp131 = add i64 %tmp128, %tmp86 ; <i64> [#uses=1]
+ %tmp132 = add i64 %tmp131, %tmp130 ; <i64> [#uses=1]
+ %tmp133 = add i64 %tmp132, %tmp125 ; <i64> [#uses=2]
+ %tmp134 = add i64 %tmp114, %tmp101 ; <i64> [#uses=1]
+ %tmp135 = add i64 %tmp127, %tmp134 ; <i64> [#uses=1]
+ %tmp136 = add i64 %tmp114, %tmp101 ; <i64> [#uses=1]
+ %tmp137 = add i64 %tmp135, %tmp136 ; <i64> [#uses=1]
+ %tmp138 = add i64 %tmp133, %tmp88 ; <i64> [#uses=5]
+ %tmp139 = add i64 %tmp127, %tmp137 ; <i64> [#uses=1]
+ %tmp140 = add i64 %tmp139, %tmp133 ; <i64> [#uses=7]
+ %tmp141 = call i64 @llvm.bswap.i64(i64 %tmp17) ; <i64> [#uses=1]
+ %tmp142 = add i64 %tmp125, %tmp112 ; <i64> [#uses=1]
+ %tmp143 = add i64 %tmp142, %tmp138 ; <i64> [#uses=1]
+ %tmp144 = add i64 %tmp141, %tmp99 ; <i64> [#uses=1]
+ %tmp145 = add i64 %tmp144, %tmp143 ; <i64> [#uses=1]
+ %tmp146 = add i64 %tmp145, %tmp138 ; <i64> [#uses=2]
+ %tmp147 = add i64 %tmp127, %tmp114 ; <i64> [#uses=1]
+ %tmp148 = add i64 %tmp140, %tmp147 ; <i64> [#uses=1]
+ %tmp149 = add i64 %tmp127, %tmp114 ; <i64> [#uses=1]
+ %tmp150 = add i64 %tmp148, %tmp149 ; <i64> [#uses=1]
+ %tmp151 = add i64 %tmp146, %tmp101 ; <i64> [#uses=5]
+ %tmp152 = add i64 %tmp140, %tmp150 ; <i64> [#uses=1]
+ %tmp153 = add i64 %tmp152, %tmp146 ; <i64> [#uses=7]
+ %tmp154 = call i64 @llvm.bswap.i64(i64 %tmp18) ; <i64> [#uses=1]
+ %tmp155 = add i64 %tmp138, %tmp125 ; <i64> [#uses=1]
+ %tmp156 = add i64 %tmp155, %tmp151 ; <i64> [#uses=1]
+ %tmp157 = add i64 %tmp154, %tmp112 ; <i64> [#uses=1]
+ %tmp158 = add i64 %tmp157, %tmp156 ; <i64> [#uses=1]
+ %tmp159 = add i64 %tmp158, %tmp151 ; <i64> [#uses=2]
+ %tmp160 = add i64 %tmp140, %tmp127 ; <i64> [#uses=1]
+ %tmp161 = add i64 %tmp153, %tmp160 ; <i64> [#uses=1]
+ %tmp162 = add i64 %tmp140, %tmp127 ; <i64> [#uses=1]
+ %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
+ %tmp164 = add i64 %tmp159, %tmp114 ; <i64> [#uses=5]
+ %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
+ %tmp166 = add i64 %tmp165, %tmp159 ; <i64> [#uses=7]
+ %tmp167 = call i64 @llvm.bswap.i64(i64 %tmp19) ; <i64> [#uses=1]
+ %tmp168 = add i64 %tmp151, %tmp138 ; <i64> [#uses=1]
+ %tmp169 = add i64 %tmp168, %tmp164 ; <i64> [#uses=1]
+ %tmp170 = add i64 %tmp167, %tmp125 ; <i64> [#uses=1]
+ %tmp171 = add i64 %tmp170, %tmp169 ; <i64> [#uses=1]
+ %tmp172 = add i64 %tmp171, %tmp164 ; <i64> [#uses=2]
+ %tmp173 = add i64 %tmp153, %tmp140 ; <i64> [#uses=1]
+ %tmp174 = add i64 %tmp166, %tmp173 ; <i64> [#uses=1]
+ %tmp175 = add i64 %tmp153, %tmp140 ; <i64> [#uses=1]
+ %tmp176 = add i64 %tmp174, %tmp175 ; <i64> [#uses=1]
+ %tmp177 = add i64 %tmp172, %tmp127 ; <i64> [#uses=5]
+ %tmp178 = add i64 %tmp166, %tmp176 ; <i64> [#uses=1]
+ %tmp179 = add i64 %tmp178, %tmp172 ; <i64> [#uses=6]
+ %tmp180 = call i64 @llvm.bswap.i64(i64 %tmp20) ; <i64> [#uses=1]
+ %tmp181 = add i64 %tmp164, %tmp151 ; <i64> [#uses=1]
+ %tmp182 = add i64 %tmp181, %tmp177 ; <i64> [#uses=1]
+ %tmp183 = add i64 %tmp180, %tmp138 ; <i64> [#uses=1]
+ %tmp184 = add i64 %tmp183, %tmp182 ; <i64> [#uses=1]
+ %tmp185 = add i64 %tmp184, %tmp177 ; <i64> [#uses=2]
+ %tmp186 = add i64 %tmp166, %tmp153 ; <i64> [#uses=1]
+ %tmp187 = add i64 %tmp179, %tmp186 ; <i64> [#uses=1]
+ %tmp188 = add i64 %tmp166, %tmp153 ; <i64> [#uses=1]
+ %tmp189 = add i64 %tmp187, %tmp188 ; <i64> [#uses=1]
+ %tmp190 = add i64 %tmp185, %tmp140 ; <i64> [#uses=4]
+ %tmp191 = add i64 %tmp179, %tmp189 ; <i64> [#uses=1]
+ %tmp192 = add i64 %tmp191, %tmp185 ; <i64> [#uses=4]
+ %tmp193 = call i64 @llvm.bswap.i64(i64 %tmp21) ; <i64> [#uses=1]
+ %tmp194 = add i64 %tmp177, %tmp164 ; <i64> [#uses=1]
+ %tmp195 = add i64 %tmp194, %tmp190 ; <i64> [#uses=1]
+ %tmp196 = add i64 %tmp193, %tmp151 ; <i64> [#uses=1]
+ %tmp197 = add i64 %tmp196, %tmp195 ; <i64> [#uses=1]
+ %tmp198 = add i64 %tmp197, %tmp190 ; <i64> [#uses=2]
+ %tmp199 = add i64 %tmp179, %tmp166 ; <i64> [#uses=1]
+ %tmp200 = add i64 %tmp192, %tmp199 ; <i64> [#uses=1]
+ %tmp201 = add i64 %tmp179, %tmp166 ; <i64> [#uses=1]
+ %tmp202 = add i64 %tmp200, %tmp201 ; <i64> [#uses=1]
+ %tmp203 = add i64 %tmp198, %tmp153 ; <i64> [#uses=3]
+ %tmp204 = add i64 %tmp192, %tmp202 ; <i64> [#uses=1]
+ %tmp205 = add i64 %tmp204, %tmp198 ; <i64> [#uses=2]
+ %tmp206 = call i64 @llvm.bswap.i64(i64 %tmp22) ; <i64> [#uses=1]
+ %tmp207 = add i64 %tmp190, %tmp177 ; <i64> [#uses=1]
+ %tmp208 = add i64 %tmp207, %tmp203 ; <i64> [#uses=1]
+ %tmp209 = add i64 %tmp206, %tmp164 ; <i64> [#uses=1]
+ %tmp210 = add i64 %tmp209, %tmp208 ; <i64> [#uses=1]
+ %tmp211 = add i64 %tmp210, %tmp203 ; <i64> [#uses=2]
+ %tmp212 = add i64 %tmp192, %tmp179 ; <i64> [#uses=1]
+ %tmp213 = add i64 %tmp205, %tmp212 ; <i64> [#uses=1]
+ %tmp214 = add i64 %tmp192, %tmp179 ; <i64> [#uses=1]
+ %tmp215 = add i64 %tmp213, %tmp214 ; <i64> [#uses=1]
+ %tmp216 = add i64 %tmp211, %tmp166 ; <i64> [#uses=2]
+ %tmp217 = add i64 %tmp205, %tmp215 ; <i64> [#uses=1]
+ %tmp218 = add i64 %tmp217, %tmp211 ; <i64> [#uses=1]
+ %tmp219 = call i64 @llvm.bswap.i64(i64 %tmp23) ; <i64> [#uses=2]
+ volatile store i64 %tmp219, i64* @X, align 8
+ %tmp220 = add i64 %tmp203, %tmp190 ; <i64> [#uses=1]
+ %tmp221 = add i64 %tmp220, %tmp216 ; <i64> [#uses=1]
+ %tmp222 = add i64 %tmp219, %tmp177 ; <i64> [#uses=1]
+ %tmp223 = add i64 %tmp222, %tmp221 ; <i64> [#uses=1]
+ %tmp224 = add i64 %tmp223, %tmp216 ; <i64> [#uses=1]
+ %tmp225 = add i64 %tmp224, %tmp218 ; <i64> [#uses=1]
+ ret i64 %tmp225
+}
+
+declare i64 @llvm.bswap.i64(i64) nounwind readnone
diff --git a/test/CodeGen/X86/2009-03-23-i80-fp80.ll b/test/CodeGen/X86/2009-03-23-i80-fp80.ll
new file mode 100644
index 0000000..e542325
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-23-i80-fp80.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep 302245289961712575840256
+; RUN: opt < %s -instcombine -S | grep K40018000000000000000
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9"
+
+define i80 @from() {
+ %tmp = bitcast x86_fp80 0xK4000C000000000000000 to i80
+ ret i80 %tmp
+}
+
+define x86_fp80 @to() {
+ %tmp = bitcast i80 302259125019767858003968 to x86_fp80
+ ret x86_fp80 %tmp
+}
diff --git a/test/CodeGen/X86/2009-03-25-TestBug.ll b/test/CodeGen/X86/2009-03-25-TestBug.ll
new file mode 100644
index 0000000..f40fddc
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-25-TestBug.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -o %t
+; RUN: not grep and %t
+; RUN: not grep shr %t
+; rdar://6661955
+
+@hello = internal constant [7 x i8] c"hello\0A\00"
+@world = internal constant [7 x i8] c"world\0A\00"
+
+define void @func(i32* %b) nounwind {
+bb1579.i.i: ; preds = %bb1514.i.i, %bb191.i.i
+ %tmp176 = load i32* %b, align 4
+ %tmp177 = and i32 %tmp176, 2
+ %tmp178 = icmp eq i32 %tmp177, 0
+ br i1 %tmp178, label %hello, label %world
+
+hello:
+ %h = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @hello, i32 0, i32 0))
+ ret void
+
+world:
+ %w = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @world, i32 0, i32 0))
+ ret void
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll b/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll
new file mode 100644
index 0000000..f486479
--- /dev/null
+++ b/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define double @t(double %x) nounwind ssp noimplicitfloat {
+entry:
+ br i1 false, label %return, label %bb3
+
+bb3: ; preds = %entry
+ ret double 0.000000e+00
+
+return: ; preds = %entry
+ ret double undef
+}
diff --git a/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll b/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll
new file mode 100644
index 0000000..97bbd93
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll
@@ -0,0 +1,165 @@
+; RUN: llc < %s
+; rdar://6774324
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+ type <{ i32, %1 }> ; type %0
+ type <{ [216 x i8] }> ; type %1
+ type <{ %3, %4*, %28*, i64, i32, %6, %6, i32, i32, i32, i32, void (i8*, i32)*, i8*, %29*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i8*], i32, %30, i32, %24, %4*, %4*, i64, i64, i32, i32, void (i32, %2*)*, i32, i32, i32, i32, i32, i32, i32, i32, %24, i64, i64, i64, i64, i64, %21, i32, i32, %21, i32, %31*, %3, %33, %34, %9*, i32, i32, %3, %3, %35, %41*, %42*, %11, i32, i32, i32, i8, i8, i8, i8, %69*, %69, %9*, %9*, [11 x %61], %3, i8*, i32, i64, i64, i32, i32, i32, i64 }> ; type %2
+ type <{ %3*, %3* }> ; type %3
+ type <{ %3, i32, %2*, %2*, %2*, %5*, i32, i32, %21, i64, i64, i64, i32, %22, %9*, %6, %4*, %23 }> ; type %4
+ type <{ %3, %3, %4*, %4*, i32, %6, %9*, %9*, %5*, %20* }> ; type %5
+ type <{ %7, i16, i8, i8, %8 }> ; type %6
+ type <{ i32 }> ; type %7
+ type <{ i8*, i8*, [2 x i32], i16, i8, i8, i8*, i8, i8, i8, i8, i8* }> ; type %8
+ type <{ %10, %13, %15, i32, i32, i32, i32, %9*, %9*, %16*, i32, %17*, i64, i32 }> ; type %9
+ type <{ i32, i32, %11 }> ; type %10
+ type <{ %12 }> ; type %11
+ type <{ [12 x i8] }> ; type %12
+ type <{ %14 }> ; type %13
+ type <{ [40 x i8] }> ; type %14
+ type <{ [4 x i8] }> ; type %15
+ type <{ %15, %15 }> ; type %16
+ type <{ %17*, %17*, %9*, i32, %18*, %19* }> ; type %17
+ type opaque ; type %18
+ type <{ i32, i32, %9*, %9*, i32, i32 }> ; type %19
+ type <{ %5*, %20*, %20*, %20* }> ; type %20
+ type <{ %3, %3*, void (i8*, i8*)*, i8*, i8*, i64 }> ; type %21
+ type <{ i32, [4 x i32], i32, i32, [128 x %3] }> ; type %22
+ type <{ %24, %24, %24, %24*, %24*, %24*, %25, %26, %27, i32, i32, i8* }> ; type %23
+ type <{ i64, i32, i32, i32 }> ; type %24
+ type <{ i32, i32 }> ; type %25
+ type <{ i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32 }> ; type %26
+ type <{ [16 x %17*], i32 }> ; type %27
+ type <{ i8, i8, i8, i8, %7, %3 }> ; type %28
+ type <{ i32, %11*, i8*, i8*, %11* }> ; type %29
+ type <{ i32, i32, i32, i32, i64 }> ; type %30
+ type <{ %32*, %3, %3, i32, i32, i32, %5* }> ; type %31
+ type opaque ; type %32
+ type <{ [44 x i8] }> ; type %33
+ type <{ %17* }> ; type %34
+ type <{ %36, %36*, i32, [4 x %40], i32, i32, i64, i32 }> ; type %35
+ type <{ i8*, %0*, %37*, i64, %39, i32, %39, %6, i64, i64, i8*, i32 }> ; type %36
+ type <{ i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, %38 }> ; type %37
+ type <{ i16, i16, i8, i8, i16, i32, i16, i16, i32, i16, i16, i32, i32, [8 x [8 x i16]], [8 x [16 x i16]], [96 x i8] }> ; type %38
+ type <{ i8, i8, i8, i8, i8, i8, i8, i8 }> ; type %39
+ type <{ i64 }> ; type %40
+ type <{ %11, i32, i32, i32, %42*, %3, i8*, %3, %5*, %32*, i32, i32, i32, i32, i32, i32, i32, %59, %60, i64, i64, i32, %11, %9*, %9*, %9*, [11 x %61], %9*, %9*, %9*, %9*, %9*, [3 x %9*], %62*, %3, %3, i32, i32, %9*, %9*, i32, %67*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, %68*, [2 x i32], i64, i64, i32 }> ; type %41
+ type <{ %43, %44, %47*, i64, i64, i64, i32, %11, %54, %46*, %46*, i32, i32, i32, i32, i32, i32, i32 }> ; type %42
+ type <{ i16, i8, i8, i32, i32 }> ; type %43
+ type <{ %45, i32, i32 }> ; type %44
+ type <{ %46*, %46*, i64, i64 }> ; type %45
+ type <{ %45, %15, i64, i8, i8, i8, i8, i16, i16 }> ; type %46
+ type <{ i64*, i64, %48*, i32, i32, i32, %6, %53, i32, i64, i64*, i64*, %48*, %48*, %48*, i32 }> ; type %47
+ type <{ %3, %43, i64, %49*, i32, i32, i32, i32, %48*, %48*, i64, %50*, i64, %52*, i32, i16, i16, i8, i8, i8, i8, %3, %3, i64, i32, i32, i32, i8*, i32, i8, i8, i8, i8, %3 }> ; type %48
+ type <{ %3, %3, %49*, %48*, i64, i8, i8, i8, i8, i32, i8, i8, i8, i8 }> ; type %49
+ type <{ i32, %51* }> ; type %50
+ type <{ void (%50*)*, void (%50*)*, i32 (%50*, %52*, i32)*, i32 (%50*)*, i32 (%50*, i64, i32, i32, i32*)*, i32 (%50*, i64, i32, i64*, i32*, i32, i32, i32)*, i32 (%50*, i64, i32)*, i32 (%50*, i64, i64, i32)*, i32 (%50*, i64, i64, i32)*, i32 (%50*, i32)*, i32 (%50*)*, i8* }> ; type %51
+ type <{ i32, %48* }> ; type %52
+ type <{ i32, i32, i32 }> ; type %53
+ type <{ %11, %55*, i32, %53, i64 }> ; type %54
+ type <{ %3, i32, i32, i32, i32, i32, [64 x i8], %56 }> ; type %55
+ type <{ %57, %58, %58 }> ; type %56
+ type <{ i64, i64, i64, i64, i64 }> ; type %57
+ type <{ i64, i64, i64, i64, i64, i64, i64, i64 }> ; type %58
+ type <{ [2 x i32] }> ; type %59
+ type <{ [8 x i32] }> ; type %60
+ type <{ %9*, i32, i32, i32 }> ; type %61
+ type <{ %11, i32, %11, i32, i32, %63*, i32, %64*, %65, i32, i32, i32, i32, %41* }> ; type %62
+ type <{ %10*, i32, %15, %15 }> ; type %63
+ type opaque ; type %64
+ type <{ i32, %66*, %66*, %66**, %66*, %66** }> ; type %65
+ type <{ %63, i32, %62*, %66*, %66* }> ; type %66
+ type <{ i32, i32, [0 x %39] }> ; type %67
+ type opaque ; type %68
+ type <{ %69*, void (%69*, %2*)* }> ; type %69
+ type <{ %70*, %2*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i32, %71, i32, i32, i64, i64, i64, %72, i8*, i8*, %73, %4*, %79*, %81*, %39*, %84, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i32, i64*, i32, i64*, i8*, i32, [256 x i32], i64, i64, %86, %77*, i64, i64, %88*, %2*, %2* }> ; type %70
+ type <{ %3, i64, i32, i32 }> ; type %71
+ type <{ i64, i64, i64 }> ; type %72
+ type <{ %73*, %73*, %73*, %73*, %74*, %75*, %76*, %70*, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, [3 x %78*], i8*, i8* }> ; type %73
+ type <{ %74*, %74*, %75*, %76*, %73*, i32, i32, i32, i32, i32, i8*, i8* }> ; type %74
+ type <{ %75*, %73*, %74*, %76*, i32, i32, i32, i32, %78*, i8*, i8* }> ; type %75
+ type <{ %76*, %73*, %74*, %75*, i32, i32, i32, i32, i8*, i8*, %77* }> ; type %76
+ type opaque ; type %77
+ type <{ %78*, %75*, i8, i8, i8, i8, i16, i16, i16, i8, i8, i32, [0 x %73*] }> ; type %78
+ type <{ i32, i32, i32, [20 x %80] }> ; type %79
+ type <{ i64*, i8* }> ; type %80
+ type <{ [256 x %39], [19 x %39], i8, i8, i8, i8, i8, i8, i8, i8, %82, i8, i8, i8, i8, i8, i8, i8, i8, %82, %83 }> ; type %81
+ type <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16 }> ; type %82
+ type <{ [16 x i64], i64 }> ; type %83
+ type <{ %82*, %85, %85, %39*, i32 }> ; type %84
+ type <{ i16, %39* }> ; type %85
+ type <{ %87, i8* }> ; type %86
+ type <{ i32, i32, i32, i8, i8, i16, i32, i32, i32, i32, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }> ; type %87
+ type <{ i64, i64, i32, i32, i32, i32 }> ; type %88
+ type <{ i32, i32, i32, i32, i32, i32, i32 }> ; type %89
+@kernel_stack_size = external global i32 ; <i32*> [#uses=1]
+
+define void @test(%0*) nounwind {
+ %2 = tail call %2* asm sideeffect "mov %gs:${1:P},$0", "=r,i,~{dirflag},~{fpsr},~{flags}"(i32 ptrtoint (%2** getelementptr (%70* null, i32 0, i32 1) to i32)) nounwind ; <%2*> [#uses=1]
+ %3 = getelementptr %2* %2, i32 0, i32 15 ; <i32*> [#uses=1]
+ %4 = load i32* %3 ; <i32> [#uses=2]
+ %5 = icmp eq i32 %4, 0 ; <i1> [#uses=1]
+ br i1 %5, label %47, label %6
+
+; <label>:6 ; preds = %1
+ %7 = load i32* @kernel_stack_size ; <i32> [#uses=1]
+ %8 = add i32 %7, %4 ; <i32> [#uses=1]
+ %9 = inttoptr i32 %8 to %89* ; <%89*> [#uses=12]
+ %10 = tail call %2* asm sideeffect "mov %gs:${1:P},$0", "=r,i,~{dirflag},~{fpsr},~{flags}"(i32 ptrtoint (%2** getelementptr (%70* null, i32 0, i32 1) to i32)) nounwind ; <%2*> [#uses=1]
+ %11 = getelementptr %2* %10, i32 0, i32 65, i32 1 ; <%36**> [#uses=1]
+ %12 = load %36** %11 ; <%36*> [#uses=1]
+ %13 = getelementptr %36* %12, i32 0, i32 1 ; <%0**> [#uses=1]
+ %14 = load %0** %13 ; <%0*> [#uses=1]
+ %15 = icmp eq %0* %14, %0 ; <i1> [#uses=1]
+ br i1 %15, label %40, label %16
+
+; <label>:16 ; preds = %6
+ %17 = getelementptr %0* %0, i32 0, i32 1 ; <%1*> [#uses=1]
+ %18 = getelementptr %89* %9, i32 -1, i32 0 ; <i32*> [#uses=1]
+ %19 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 32 ; <i8*> [#uses=1]
+ %20 = bitcast i8* %19 to i32* ; <i32*> [#uses=1]
+ %21 = load i32* %20 ; <i32> [#uses=1]
+ store i32 %21, i32* %18
+ %22 = getelementptr %89* %9, i32 -1, i32 1 ; <i32*> [#uses=1]
+ %23 = ptrtoint %1* %17 to i32 ; <i32> [#uses=1]
+ store i32 %23, i32* %22
+ %24 = getelementptr %89* %9, i32 -1, i32 2 ; <i32*> [#uses=1]
+ %25 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 24 ; <i8*> [#uses=1]
+ %26 = bitcast i8* %25 to i32* ; <i32*> [#uses=1]
+ %27 = load i32* %26 ; <i32> [#uses=1]
+ store i32 %27, i32* %24
+ %28 = getelementptr %89* %9, i32 -1, i32 3 ; <i32*> [#uses=1]
+ %29 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 16 ; <i8*> [#uses=1]
+ %30 = bitcast i8* %29 to i32* ; <i32*> [#uses=1]
+ %31 = load i32* %30 ; <i32> [#uses=1]
+ store i32 %31, i32* %28
+ %32 = getelementptr %89* %9, i32 -1, i32 4 ; <i32*> [#uses=1]
+ %33 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 20 ; <i8*> [#uses=1]
+ %34 = bitcast i8* %33 to i32* ; <i32*> [#uses=1]
+ %35 = load i32* %34 ; <i32> [#uses=1]
+ store i32 %35, i32* %32
+ %36 = getelementptr %89* %9, i32 -1, i32 5 ; <i32*> [#uses=1]
+ %37 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 56 ; <i8*> [#uses=1]
+ %38 = bitcast i8* %37 to i32* ; <i32*> [#uses=1]
+ %39 = load i32* %38 ; <i32> [#uses=1]
+ store i32 %39, i32* %36
+ ret void
+
+; <label>:40 ; preds = %6
+ %41 = getelementptr %89* %9, i32 -1, i32 0 ; <i32*> [#uses=1]
+ tail call void asm sideeffect "movl %ebx, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %41) nounwind
+ %42 = getelementptr %89* %9, i32 -1, i32 1 ; <i32*> [#uses=1]
+ tail call void asm sideeffect "movl %esp, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %42) nounwind
+ %43 = getelementptr %89* %9, i32 -1, i32 2 ; <i32*> [#uses=1]
+ tail call void asm sideeffect "movl %ebp, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %43) nounwind
+ %44 = getelementptr %89* %9, i32 -1, i32 3 ; <i32*> [#uses=1]
+ tail call void asm sideeffect "movl %edi, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %44) nounwind
+ %45 = getelementptr %89* %9, i32 -1, i32 4 ; <i32*> [#uses=1]
+ tail call void asm sideeffect "movl %esi, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %45) nounwind
+ %46 = getelementptr %89* %9, i32 -1, i32 5 ; <i32*> [#uses=1]
+ tail call void asm sideeffect "movl $$1f, $0\0A1:", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %46) nounwind
+ ret void
+
+; <label>:47 ; preds = %1
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll b/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll
new file mode 100644
index 0000000..27f11cf
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -fast-isel
+; radr://6772169
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10"
+ type { i32, i1 } ; type %0
+
+declare %0 @llvm.sadd.with.overflow.i32(i32, i32) nounwind
+
+define fastcc i32 @test() nounwind {
+entry:
+ %tmp1 = call %0 @llvm.sadd.with.overflow.i32(i32 1, i32 0)
+ %tmp2 = extractvalue %0 %tmp1, 1
+ br i1 %tmp2, label %.backedge, label %BB3
+
+BB3:
+ %tmp4 = extractvalue %0 %tmp1, 0
+ br label %.backedge
+
+.backedge:
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2009-04-12-picrel.ll b/test/CodeGen/X86/2009-04-12-picrel.ll
new file mode 100644
index 0000000..f1942801
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-12-picrel.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small > %t
+; RUN: grep leaq %t | count 1
+
+@dst = external global [131072 x i32]
+@ptr = external global i32*
+
+define void @off01(i64 %i) nounwind {
+entry:
+ %.sum = add i64 %i, 16
+ %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %.sum
+ store i32* %0, i32** @ptr, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
new file mode 100644
index 0000000..ff8cf0a
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin
+; rdar://6781755
+; PR3934
+
+ type { i32, i32 } ; type %0
+
+define void @bn_sqr_comba8(i32* nocapture %r, i32* %a) nounwind {
+entry:
+ %asmtmp23 = tail call %0 asm "mulq $3", "={ax},={dx},{ax},*m,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 0, i32* %a) nounwind ; <%0> [#uses=1]
+ %asmresult25 = extractvalue %0 %asmtmp23, 1 ; <i32> [#uses=1]
+ %asmtmp26 = tail call %0 asm "addq $0,$0; adcq $2,$1", "={dx},=r,imr,0,1,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 0, i32 %asmresult25, i32 0) nounwind ; <%0> [#uses=1]
+ %asmresult27 = extractvalue %0 %asmtmp26, 0 ; <i32> [#uses=1]
+ %asmtmp29 = tail call %0 asm "addq $0,$0; adcq $2,$1", "={ax},={dx},imr,0,1,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 0, i32 0, i32 %asmresult27) nounwind ; <%0> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-04-13-2AddrAssert.ll b/test/CodeGen/X86/2009-04-13-2AddrAssert.ll
new file mode 100644
index 0000000..4362ba4
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-13-2AddrAssert.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s
+; rdar://6781755
+; PR3934
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-undermydesk-freebsd8.0"
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+entry:
+ %call = tail call i32 (...)* @getpid() ; <i32> [#uses=1]
+ %conv = trunc i32 %call to i16 ; <i16> [#uses=1]
+ %0 = tail call i16 asm "xchgb ${0:h}, ${0:b}","=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv) nounwind ; <i16> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @getpid(...)
diff --git a/test/CodeGen/X86/2009-04-14-IllegalRegs.ll b/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
new file mode 100644
index 0000000..bfa3eaa
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -O0 -regalloc=local | not grep sil
+; rdar://6787136
+
+ %struct.X = type { i8, [32 x i8] }
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 ()* @z to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @z() nounwind ssp {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %xxx = alloca %struct.X ; <%struct.X*> [#uses=6]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = getelementptr %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1]
+ %2 = getelementptr [32 x i8]* %1, i32 0, i32 31 ; <i8*> [#uses=1]
+ store i8 48, i8* %2, align 1
+ %3 = getelementptr %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1]
+ %4 = getelementptr [32 x i8]* %3, i32 0, i32 31 ; <i8*> [#uses=1]
+ %5 = load i8* %4, align 1 ; <i8> [#uses=1]
+ %6 = getelementptr %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1]
+ %7 = getelementptr [32 x i8]* %6, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 %5, i8* %7, align 1
+ %8 = getelementptr %struct.X* %xxx, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 15, i8* %8, align 1
+ %9 = call i32 (...)* bitcast (i32 (%struct.X*, %struct.X*)* @f to i32 (...)*)(%struct.X* byval align 4 %xxx, %struct.X* byval align 4 %xxx) nounwind ; <i32> [#uses=1]
+ store i32 %9, i32* %0, align 4
+ %10 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %10, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
+
+declare i32 @f(%struct.X* byval align 4, %struct.X* byval align 4) nounwind ssp
diff --git a/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll
new file mode 100644
index 0000000..f46eed4
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll
@@ -0,0 +1,141 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of modref unfolded}
+; XFAIL: *
+; 69408 removed the opportunity for this optimization to work
+
+ %struct.SHA512_CTX = type { [8 x i64], i64, i64, %struct.anon, i32, i32 }
+ %struct.anon = type { [16 x i64] }
+@K512 = external constant [80 x i64], align 32 ; <[80 x i64]*> [#uses=2]
+
+define fastcc void @sha512_block_data_order(%struct.SHA512_CTX* nocapture %ctx, i8* nocapture %in, i64 %num) nounwind ssp {
+entry:
+ br label %bb349
+
+bb349: ; preds = %bb349, %entry
+ %e.0489 = phi i64 [ 0, %entry ], [ %e.0, %bb349 ] ; <i64> [#uses=3]
+ %b.0472 = phi i64 [ 0, %entry ], [ %87, %bb349 ] ; <i64> [#uses=2]
+ %asmtmp356 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %e.0489) nounwind ; <i64> [#uses=1]
+ %0 = xor i64 0, %asmtmp356 ; <i64> [#uses=1]
+ %1 = add i64 0, %0 ; <i64> [#uses=1]
+ %2 = add i64 %1, 0 ; <i64> [#uses=1]
+ %3 = add i64 %2, 0 ; <i64> [#uses=1]
+ %4 = add i64 %3, 0 ; <i64> [#uses=5]
+ %asmtmp372 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 %4) nounwind ; <i64> [#uses=1]
+ %asmtmp373 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 %4) nounwind ; <i64> [#uses=0]
+ %5 = xor i64 %asmtmp372, 0 ; <i64> [#uses=0]
+ %6 = xor i64 0, %b.0472 ; <i64> [#uses=1]
+ %7 = and i64 %4, %6 ; <i64> [#uses=1]
+ %8 = xor i64 %7, 0 ; <i64> [#uses=1]
+ %9 = add i64 0, %8 ; <i64> [#uses=1]
+ %10 = add i64 %9, 0 ; <i64> [#uses=2]
+ %asmtmp377 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 61, i64 0) nounwind ; <i64> [#uses=1]
+ %11 = xor i64 0, %asmtmp377 ; <i64> [#uses=1]
+ %12 = add i64 0, %11 ; <i64> [#uses=1]
+ %13 = add i64 %12, 0 ; <i64> [#uses=1]
+ %not381 = xor i64 0, -1 ; <i64> [#uses=1]
+ %14 = and i64 %e.0489, %not381 ; <i64> [#uses=1]
+ %15 = xor i64 0, %14 ; <i64> [#uses=1]
+ %16 = add i64 %15, 0 ; <i64> [#uses=1]
+ %17 = add i64 %16, %13 ; <i64> [#uses=1]
+ %18 = add i64 %17, 0 ; <i64> [#uses=1]
+ %19 = add i64 %18, 0 ; <i64> [#uses=2]
+ %20 = add i64 %19, %b.0472 ; <i64> [#uses=3]
+ %21 = add i64 %19, 0 ; <i64> [#uses=1]
+ %22 = add i64 %21, 0 ; <i64> [#uses=1]
+ %23 = add i32 0, 12 ; <i32> [#uses=1]
+ %24 = and i32 %23, 12 ; <i32> [#uses=1]
+ %25 = zext i32 %24 to i64 ; <i64> [#uses=1]
+ %26 = getelementptr [16 x i64]* null, i64 0, i64 %25 ; <i64*> [#uses=0]
+ %27 = add i64 0, %e.0489 ; <i64> [#uses=1]
+ %28 = add i64 %27, 0 ; <i64> [#uses=1]
+ %29 = add i64 %28, 0 ; <i64> [#uses=1]
+ %30 = add i64 %29, 0 ; <i64> [#uses=2]
+ %31 = and i64 %10, %4 ; <i64> [#uses=1]
+ %32 = xor i64 0, %31 ; <i64> [#uses=1]
+ %33 = add i64 %30, 0 ; <i64> [#uses=3]
+ %34 = add i64 %30, %32 ; <i64> [#uses=1]
+ %35 = add i64 %34, 0 ; <i64> [#uses=1]
+ %36 = and i64 %33, %20 ; <i64> [#uses=1]
+ %37 = xor i64 %36, 0 ; <i64> [#uses=1]
+ %38 = add i64 %37, 0 ; <i64> [#uses=1]
+ %39 = add i64 %38, 0 ; <i64> [#uses=1]
+ %40 = add i64 %39, 0 ; <i64> [#uses=1]
+ %41 = add i64 %40, 0 ; <i64> [#uses=1]
+ %42 = add i64 %41, %4 ; <i64> [#uses=3]
+ %43 = or i32 0, 6 ; <i32> [#uses=1]
+ %44 = and i32 %43, 14 ; <i32> [#uses=1]
+ %45 = zext i32 %44 to i64 ; <i64> [#uses=1]
+ %46 = getelementptr [16 x i64]* null, i64 0, i64 %45 ; <i64*> [#uses=1]
+ %not417 = xor i64 %42, -1 ; <i64> [#uses=1]
+ %47 = and i64 %20, %not417 ; <i64> [#uses=1]
+ %48 = xor i64 0, %47 ; <i64> [#uses=1]
+ %49 = getelementptr [80 x i64]* @K512, i64 0, i64 0 ; <i64*> [#uses=1]
+ %50 = load i64* %49, align 8 ; <i64> [#uses=1]
+ %51 = add i64 %48, 0 ; <i64> [#uses=1]
+ %52 = add i64 %51, 0 ; <i64> [#uses=1]
+ %53 = add i64 %52, 0 ; <i64> [#uses=1]
+ %54 = add i64 %53, %50 ; <i64> [#uses=2]
+ %asmtmp420 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 0) nounwind ; <i64> [#uses=1]
+ %asmtmp421 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 0) nounwind ; <i64> [#uses=1]
+ %55 = xor i64 %asmtmp420, 0 ; <i64> [#uses=1]
+ %56 = xor i64 %55, %asmtmp421 ; <i64> [#uses=1]
+ %57 = add i64 %54, %10 ; <i64> [#uses=5]
+ %58 = add i64 %54, 0 ; <i64> [#uses=1]
+ %59 = add i64 %58, %56 ; <i64> [#uses=2]
+ %60 = or i32 0, 7 ; <i32> [#uses=1]
+ %61 = and i32 %60, 15 ; <i32> [#uses=1]
+ %62 = zext i32 %61 to i64 ; <i64> [#uses=1]
+ %63 = getelementptr [16 x i64]* null, i64 0, i64 %62 ; <i64*> [#uses=2]
+ %64 = load i64* null, align 8 ; <i64> [#uses=1]
+ %65 = lshr i64 %64, 6 ; <i64> [#uses=1]
+ %66 = xor i64 0, %65 ; <i64> [#uses=1]
+ %67 = xor i64 %66, 0 ; <i64> [#uses=1]
+ %68 = load i64* %46, align 8 ; <i64> [#uses=1]
+ %69 = load i64* null, align 8 ; <i64> [#uses=1]
+ %70 = add i64 %68, 0 ; <i64> [#uses=1]
+ %71 = add i64 %70, %67 ; <i64> [#uses=1]
+ %72 = add i64 %71, %69 ; <i64> [#uses=1]
+ %asmtmp427 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 18, i64 %57) nounwind ; <i64> [#uses=1]
+ %asmtmp428 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 41, i64 %57) nounwind ; <i64> [#uses=1]
+ %73 = xor i64 %asmtmp427, 0 ; <i64> [#uses=1]
+ %74 = xor i64 %73, %asmtmp428 ; <i64> [#uses=1]
+ %75 = and i64 %57, %42 ; <i64> [#uses=1]
+ %not429 = xor i64 %57, -1 ; <i64> [#uses=1]
+ %76 = and i64 %33, %not429 ; <i64> [#uses=1]
+ %77 = xor i64 %75, %76 ; <i64> [#uses=1]
+ %78 = getelementptr [80 x i64]* @K512, i64 0, i64 0 ; <i64*> [#uses=1]
+ %79 = load i64* %78, align 16 ; <i64> [#uses=1]
+ %80 = add i64 %77, %20 ; <i64> [#uses=1]
+ %81 = add i64 %80, %72 ; <i64> [#uses=1]
+ %82 = add i64 %81, %74 ; <i64> [#uses=1]
+ %83 = add i64 %82, %79 ; <i64> [#uses=1]
+ %asmtmp432 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 34, i64 %59) nounwind ; <i64> [#uses=1]
+ %asmtmp433 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 39, i64 %59) nounwind ; <i64> [#uses=1]
+ %84 = xor i64 %asmtmp432, 0 ; <i64> [#uses=1]
+ %85 = xor i64 %84, %asmtmp433 ; <i64> [#uses=1]
+ %86 = add i64 %83, %22 ; <i64> [#uses=2]
+ %87 = add i64 0, %85 ; <i64> [#uses=1]
+ %asmtmp435 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 8, i64 0) nounwind ; <i64> [#uses=1]
+ %88 = xor i64 0, %asmtmp435 ; <i64> [#uses=1]
+ %89 = load i64* null, align 8 ; <i64> [#uses=3]
+ %asmtmp436 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 19, i64 %89) nounwind ; <i64> [#uses=1]
+ %asmtmp437 = call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 61, i64 %89) nounwind ; <i64> [#uses=1]
+ %90 = lshr i64 %89, 6 ; <i64> [#uses=1]
+ %91 = xor i64 %asmtmp436, %90 ; <i64> [#uses=1]
+ %92 = xor i64 %91, %asmtmp437 ; <i64> [#uses=1]
+ %93 = load i64* %63, align 8 ; <i64> [#uses=1]
+ %94 = load i64* null, align 8 ; <i64> [#uses=1]
+ %95 = add i64 %93, %88 ; <i64> [#uses=1]
+ %96 = add i64 %95, %92 ; <i64> [#uses=1]
+ %97 = add i64 %96, %94 ; <i64> [#uses=2]
+ store i64 %97, i64* %63, align 8
+ %98 = and i64 %86, %57 ; <i64> [#uses=1]
+ %not441 = xor i64 %86, -1 ; <i64> [#uses=1]
+ %99 = and i64 %42, %not441 ; <i64> [#uses=1]
+ %100 = xor i64 %98, %99 ; <i64> [#uses=1]
+ %101 = add i64 %100, %33 ; <i64> [#uses=1]
+ %102 = add i64 %101, %97 ; <i64> [#uses=1]
+ %103 = add i64 %102, 0 ; <i64> [#uses=1]
+ %104 = add i64 %103, 0 ; <i64> [#uses=1]
+ %e.0 = add i64 %104, %35 ; <i64> [#uses=1]
+ br label %bb349
+}
diff --git a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
new file mode 100644
index 0000000..d7b9463
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
@@ -0,0 +1,121 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 83
+; rdar://6802189
+
+; Test if linearscan is unfavoring registers for allocation to allow more reuse
+; of reloads from stack slots.
+
+ %struct.SHA_CTX = type { i32, i32, i32, i32, i32, i32, i32, [16 x i32], i32 }
+
+define fastcc void @sha1_block_data_order(%struct.SHA_CTX* nocapture %c, i8* %p, i64 %num) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %asmtmp511 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=3]
+ %asmtmp513 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=2]
+ %asmtmp516 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=1]
+ %asmtmp517 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2]
+ %0 = xor i32 0, %asmtmp513 ; <i32> [#uses=0]
+ %1 = add i32 0, %asmtmp517 ; <i32> [#uses=1]
+ %2 = add i32 %1, 0 ; <i32> [#uses=1]
+ %3 = add i32 %2, 0 ; <i32> [#uses=1]
+ %asmtmp519 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=1]
+ %4 = xor i32 0, %asmtmp511 ; <i32> [#uses=1]
+ %asmtmp520 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %4) nounwind ; <i32> [#uses=2]
+ %5 = xor i32 0, %asmtmp516 ; <i32> [#uses=1]
+ %6 = xor i32 %5, %asmtmp519 ; <i32> [#uses=1]
+ %7 = add i32 %asmtmp513, -899497514 ; <i32> [#uses=1]
+ %8 = add i32 %7, %asmtmp520 ; <i32> [#uses=1]
+ %9 = add i32 %8, %6 ; <i32> [#uses=1]
+ %10 = add i32 %9, 0 ; <i32> [#uses=1]
+ %asmtmp523 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=1]
+ %asmtmp525 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %3) nounwind ; <i32> [#uses=2]
+ %11 = xor i32 0, %asmtmp525 ; <i32> [#uses=1]
+ %12 = add i32 0, %11 ; <i32> [#uses=1]
+ %13 = add i32 %12, 0 ; <i32> [#uses=2]
+ %asmtmp528 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %10) nounwind ; <i32> [#uses=1]
+ %14 = xor i32 0, %asmtmp520 ; <i32> [#uses=1]
+ %asmtmp529 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %14) nounwind ; <i32> [#uses=1]
+ %asmtmp530 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %13) nounwind ; <i32> [#uses=1]
+ %15 = add i32 0, %asmtmp530 ; <i32> [#uses=1]
+ %16 = xor i32 0, %asmtmp523 ; <i32> [#uses=1]
+ %asmtmp532 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %16) nounwind ; <i32> [#uses=2]
+ %asmtmp533 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %15) nounwind ; <i32> [#uses=1]
+ %17 = xor i32 %13, %asmtmp528 ; <i32> [#uses=1]
+ %18 = xor i32 %17, 0 ; <i32> [#uses=1]
+ %19 = add i32 %asmtmp525, -899497514 ; <i32> [#uses=1]
+ %20 = add i32 %19, %asmtmp532 ; <i32> [#uses=1]
+ %21 = add i32 %20, %18 ; <i32> [#uses=1]
+ %22 = add i32 %21, %asmtmp533 ; <i32> [#uses=1]
+ %23 = xor i32 0, %asmtmp511 ; <i32> [#uses=1]
+ %24 = xor i32 %23, 0 ; <i32> [#uses=1]
+ %asmtmp535 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %24) nounwind ; <i32> [#uses=3]
+ %25 = add i32 0, %asmtmp535 ; <i32> [#uses=1]
+ %26 = add i32 %25, 0 ; <i32> [#uses=1]
+ %27 = add i32 %26, 0 ; <i32> [#uses=1]
+ %28 = xor i32 0, %asmtmp529 ; <i32> [#uses=0]
+ %29 = xor i32 %22, 0 ; <i32> [#uses=1]
+ %30 = xor i32 %29, 0 ; <i32> [#uses=1]
+ %31 = add i32 0, %30 ; <i32> [#uses=1]
+ %32 = add i32 %31, 0 ; <i32> [#uses=3]
+ %asmtmp541 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2]
+ %asmtmp542 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %32) nounwind ; <i32> [#uses=1]
+ %33 = add i32 0, %asmtmp541 ; <i32> [#uses=1]
+ %34 = add i32 %33, 0 ; <i32> [#uses=1]
+ %35 = add i32 %34, %asmtmp542 ; <i32> [#uses=1]
+ %asmtmp543 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %27) nounwind ; <i32> [#uses=2]
+ %36 = xor i32 0, %asmtmp535 ; <i32> [#uses=0]
+ %37 = xor i32 %32, 0 ; <i32> [#uses=1]
+ %38 = xor i32 %37, %asmtmp543 ; <i32> [#uses=1]
+ %39 = add i32 0, %38 ; <i32> [#uses=1]
+ %40 = add i32 %39, 0 ; <i32> [#uses=2]
+ %asmtmp546 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %32) nounwind ; <i32> [#uses=1]
+ %asmtmp547 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2]
+ %41 = add i32 0, -899497514 ; <i32> [#uses=1]
+ %42 = add i32 %41, %asmtmp547 ; <i32> [#uses=1]
+ %43 = add i32 %42, 0 ; <i32> [#uses=1]
+ %44 = add i32 %43, 0 ; <i32> [#uses=3]
+ %asmtmp549 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %35) nounwind ; <i32> [#uses=2]
+ %45 = xor i32 0, %asmtmp541 ; <i32> [#uses=1]
+ %asmtmp550 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %45) nounwind ; <i32> [#uses=2]
+ %asmtmp551 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %44) nounwind ; <i32> [#uses=1]
+ %46 = xor i32 %40, %asmtmp546 ; <i32> [#uses=1]
+ %47 = xor i32 %46, %asmtmp549 ; <i32> [#uses=1]
+ %48 = add i32 %asmtmp543, -899497514 ; <i32> [#uses=1]
+ %49 = add i32 %48, %asmtmp550 ; <i32> [#uses=1]
+ %50 = add i32 %49, %47 ; <i32> [#uses=1]
+ %51 = add i32 %50, %asmtmp551 ; <i32> [#uses=1]
+ %asmtmp552 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %40) nounwind ; <i32> [#uses=2]
+ %52 = xor i32 %44, %asmtmp549 ; <i32> [#uses=1]
+ %53 = xor i32 %52, %asmtmp552 ; <i32> [#uses=1]
+ %54 = add i32 0, %53 ; <i32> [#uses=1]
+ %55 = add i32 %54, 0 ; <i32> [#uses=2]
+ %asmtmp555 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %44) nounwind ; <i32> [#uses=2]
+ %56 = xor i32 0, %asmtmp532 ; <i32> [#uses=1]
+ %57 = xor i32 %56, %asmtmp547 ; <i32> [#uses=1]
+ %asmtmp556 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %57) nounwind ; <i32> [#uses=1]
+ %58 = add i32 0, %asmtmp556 ; <i32> [#uses=1]
+ %59 = add i32 %58, 0 ; <i32> [#uses=1]
+ %60 = add i32 %59, 0 ; <i32> [#uses=1]
+ %asmtmp558 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %51) nounwind ; <i32> [#uses=1]
+ %61 = xor i32 %asmtmp517, %asmtmp511 ; <i32> [#uses=1]
+ %62 = xor i32 %61, %asmtmp535 ; <i32> [#uses=1]
+ %63 = xor i32 %62, %asmtmp550 ; <i32> [#uses=1]
+ %asmtmp559 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %63) nounwind ; <i32> [#uses=1]
+ %64 = xor i32 %55, %asmtmp555 ; <i32> [#uses=1]
+ %65 = xor i32 %64, %asmtmp558 ; <i32> [#uses=1]
+ %asmtmp561 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %55) nounwind ; <i32> [#uses=1]
+ %66 = add i32 %asmtmp552, -899497514 ; <i32> [#uses=1]
+ %67 = add i32 %66, %65 ; <i32> [#uses=1]
+ %68 = add i32 %67, %asmtmp559 ; <i32> [#uses=1]
+ %69 = add i32 %68, 0 ; <i32> [#uses=1]
+ %70 = add i32 %69, 0 ; <i32> [#uses=1]
+ store i32 %70, i32* null, align 4
+ %71 = add i32 0, %60 ; <i32> [#uses=1]
+ store i32 %71, i32* null, align 4
+ %72 = add i32 0, %asmtmp561 ; <i32> [#uses=1]
+ store i32 %72, i32* null, align 4
+ %73 = add i32 0, %asmtmp555 ; <i32> [#uses=1]
+ store i32 %73, i32* null, align 4
+ br label %bb
+}
diff --git a/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll b/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
new file mode 100644
index 0000000..abbe97a
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
@@ -0,0 +1,31 @@
+; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -asm-verbose=false \
+; RUN: -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false < %s | \
+; RUN: FileCheck %s
+; rdar://6808032
+
+; CHECK: pextrw $14
+; CHECK-NEXT: movzbl
+; CHECK-NEXT: (%ebp)
+; CHECK-NEXT: pinsrw
+
+define void @update(i8** %args_list) nounwind {
+entry:
+ %cmp.i = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %cmp.i, label %if.then.i, label %test_cl.exit
+
+if.then.i: ; preds = %entry
+ %val = load <16 x i8> addrspace(1)* null ; <<16 x i8>> [#uses=8]
+ %tmp10.i = shufflevector <16 x i8> <i8 0, i8 0, i8 0, i8 undef, i8 0, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef>, <16 x i8> %val, <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 4, i32 undef, i32 6, i32 undef, i32 29, i32 undef, i32 10, i32 11, i32 12, i32 undef, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
+ %tmp17.i = shufflevector <16 x i8> %tmp10.i, <16 x i8> %val, <16 x i32> <i32 0, i32 1, i32 2, i32 18, i32 4, i32 undef, i32 6, i32 undef, i32 8, i32 undef, i32 10, i32 11, i32 12, i32 undef, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
+ %tmp24.i = shufflevector <16 x i8> %tmp17.i, <16 x i8> %val, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 24, i32 6, i32 undef, i32 8, i32 undef, i32 10, i32 11, i32 12, i32 undef, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
+ %tmp31.i = shufflevector <16 x i8> %tmp24.i, <16 x i8> %val, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 undef, i32 8, i32 undef, i32 10, i32 11, i32 12, i32 21, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
+ %tmp38.i = shufflevector <16 x i8> %tmp31.i, <16 x i8> %val, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 27, i32 8, i32 undef, i32 10, i32 11, i32 12, i32 13, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
+ %tmp45.i = shufflevector <16 x i8> %tmp38.i, <16 x i8> %val, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 undef, i32 10, i32 11, i32 12, i32 13, i32 29, i32 undef> ; <<16 x i8>> [#uses=1]
+ %tmp52.i = shufflevector <16 x i8> %tmp45.i, <16 x i8> %val, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 21, i32 10, i32 11, i32 12, i32 13, i32 14, i32 undef> ; <<16 x i8>> [#uses=1]
+ %tmp59.i = shufflevector <16 x i8> %tmp52.i, <16 x i8> %val, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 20> ; <<16 x i8>> [#uses=1]
+ store <16 x i8> %tmp59.i, <16 x i8> addrspace(1)* null
+ ret void
+
+test_cl.exit: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-04-24.ll b/test/CodeGen/X86/2009-04-24.ll
new file mode 100644
index 0000000..c1ec45f
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-24.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -regalloc=local -relocation-model=pic > %t
+; RUN: grep {leal.*TLSGD.*___tls_get_addr} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=local -relocation-model=pic > %t2
+; RUN: grep {leaq.*TLSGD.*__tls_get_addr} %t2
+; PR4004
+
+@i = thread_local global i32 15
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32* @i
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/2009-04-25-CoalescerBug.ll b/test/CodeGen/X86/2009-04-25-CoalescerBug.ll
new file mode 100644
index 0000000..94d3eb2
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-25-CoalescerBug.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86-64 | grep mov | count 2
+; rdar://6806252
+
+define i64 @test(i32* %tmp13) nounwind {
+entry:
+ br label %while.cond
+
+while.cond: ; preds = %while.cond, %entry
+ %tmp15 = load i32* %tmp13 ; <i32> [#uses=2]
+ %bf.lo = lshr i32 %tmp15, 1 ; <i32> [#uses=1]
+ %bf.lo.cleared = and i32 %bf.lo, 2147483647 ; <i32> [#uses=1]
+ %conv = zext i32 %bf.lo.cleared to i64 ; <i64> [#uses=1]
+ %bf.lo.cleared25 = and i32 %tmp15, 1 ; <i32> [#uses=1]
+ %tobool = icmp ne i32 %bf.lo.cleared25, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %while.cond, label %while.end
+
+while.end: ; preds = %while.cond
+ ret i64 %conv
+}
diff --git a/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll b/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll
new file mode 100644
index 0000000..7981a52
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll
@@ -0,0 +1,1457 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; PR4034
+
+ %struct.BiContextType = type { i16, i8 }
+ %struct.Bitstream = type { i32, i32, i32, i32, i8*, i32 }
+ %struct.DataPartition = type { %struct.Bitstream*, %struct.DecodingEnvironment, i32 (%struct.SyntaxElement*, %struct.ImageParameters*, %struct.DataPartition*)* }
+ %struct.DecRefPicMarking_t = type { i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t* }
+ %struct.DecodingEnvironment = type { i32, i32, i32, i32, i32, i8*, i32* }
+ %struct.ImageParameters = type { i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [16 x [16 x i16]], [6 x [32 x i32]], [16 x [16 x i32]], [4 x [12 x [4 x [4 x i32]]]], [16 x i32], i8**, i32*, i32***, i32**, i32, i32, i32, i32, %struct.Slice*, %struct.Macroblock*, i32, i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32***, i32***, i32****, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x [2 x i32]], [3 x [2 x i32]], i32, i32, i64, i64, %struct.timeb, %struct.timeb, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.Macroblock = type { i32, [2 x i32], i32, i32, %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], i32, i64, i64, i32, i32, [4 x i8], [4 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.MotionInfoContexts = type { [4 x [11 x %struct.BiContextType]], [2 x [9 x %struct.BiContextType]], [2 x [10 x %struct.BiContextType]], [2 x [6 x %struct.BiContextType]], [4 x %struct.BiContextType], [4 x %struct.BiContextType], [3 x %struct.BiContextType] }
+ %struct.PixelPos = type { i32, i32, i32, i32, i32, i32 }
+ %struct.Slice = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.DataPartition*, %struct.MotionInfoContexts*, %struct.TextureInfoContexts*, i32, i32*, i32*, i32*, i32, i32*, i32*, i32*, i32 (%struct.ImageParameters*, %struct.inp_par*)*, i32, i32, i32, i32 }
+ %struct.SyntaxElement = type { i32, i32, i32, i32, i32, i32, i32, i32, void (i32, i32, i32*, i32*)*, void (%struct.SyntaxElement*, %struct.ImageParameters*, %struct.DecodingEnvironment*)* }
+ %struct.TextureInfoContexts = type { [2 x %struct.BiContextType], [4 x %struct.BiContextType], [3 x [4 x %struct.BiContextType]], [10 x [4 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [5 x %struct.BiContextType]], [10 x [5 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]] }
+ %struct.inp_par = type { [1000 x i8], [1000 x i8], [1000 x i8], i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.timeb = type { i64, i16, i16, i16 }
+@get_mb_block_pos = external global void (i32, i32*, i32*)* ; <void (i32, i32*, i32*)**> [#uses=1]
+@img = external global %struct.ImageParameters* ; <%struct.ImageParameters**> [#uses=14]
[email protected] = appending global [1 x i8*] [i8* bitcast (void (i32, i32, i32, i32, %struct.PixelPos*)* @getAffNeighbour to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @getAffNeighbour(i32 %curr_mb_nr, i32 %xN, i32 %yN, i32 %is_chroma, %struct.PixelPos* %pix) nounwind {
+entry:
+ %Opq.sa.calc = add i32 0, 2 ; <i32> [#uses=2]
+ %0 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=3]
+ %1 = getelementptr %struct.ImageParameters* %0, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %2 = load %struct.Macroblock** %1, align 8 ; <%struct.Macroblock*> [#uses=24]
+ %3 = zext i32 %curr_mb_nr to i64 ; <i64> [#uses=24]
+ %4 = sext i32 %is_chroma to i64 ; <i64> [#uses=8]
+ br label %meshBB392
+
+entry.fragment: ; preds = %meshBB392
+ %Opq.sa.calc747 = add i32 %Opq.sa.calc921, 70 ; <i32> [#uses=0]
+ %5 = getelementptr %struct.ImageParameters* %0, i64 0, i32 119, i64 %4, i64 0 ; <i32*> [#uses=1]
+ %6 = load i32* %5, align 4 ; <i32> [#uses=2]
+ %7 = getelementptr %struct.ImageParameters* %0, i64 0, i32 119, i64 %4, i64 1 ; <i32*> [#uses=1]
+ %8 = load i32* %7, align 4 ; <i32> [#uses=5]
+ br label %entry.fragment181
+
+entry.fragment181: ; preds = %entry.fragment
+ %Opq.sa.calc863 = add i32 %Opq.sa.calc921, -50 ; <i32> [#uses=4]
+ %9 = getelementptr %struct.PixelPos* %pix, i64 0, i32 0 ; <i32*> [#uses=4]
+ store i32 0, i32* %9, align 4
+ %10 = add i32 %8, -1 ; <i32> [#uses=6]
+ %11 = icmp slt i32 %10, %yN ; <i1> [#uses=1]
+ br i1 %11, label %meshBB448, label %bb
+
+bb: ; preds = %entry.fragment181
+ %Opq.sa.calc460 = add i32 %Opq.sa.calc863, 50 ; <i32> [#uses=0]
+ %12 = add i32 %6, -1 ; <i32> [#uses=5]
+ %13 = icmp slt i32 %12, %xN ; <i1> [#uses=1]
+ br label %bb.fragment
+
+bb.fragment: ; preds = %bb
+ %Opq.sa.calc976 = add i32 %Opq.sa.calc863, 13 ; <i32> [#uses=3]
+ %.not8 = icmp sgt i32 %yN, -1 ; <i1> [#uses=1]
+ %14 = icmp sgt i32 %8, %yN ; <i1> [#uses=1]
+ %or.cond.not = and i1 %14, %.not8 ; <i1> [#uses=3]
+ %or.cond1 = and i1 %or.cond.not, %13 ; <i1> [#uses=1]
+ br i1 %or.cond1, label %meshBB396, label %bb3
+
+bb3: ; preds = %bb.fragment
+ %Opq.sa.calc462 = sub i32 %Opq.sa.calc976, -152 ; <i32> [#uses=5]
+ %Opq.sa.calc461 = sub i32 %Opq.sa.calc462, 168 ; <i32> [#uses=2]
+ %15 = icmp slt i32 %xN, 0 ; <i1> [#uses=1]
+ br i1 %15, label %bb4, label %meshBB404
+
+bb4: ; preds = %bb3
+ %Opq.sa.calc467 = xor i32 %Opq.sa.calc462, 171 ; <i32> [#uses=2]
+ %Opq.sa.calc465 = sub i32 %Opq.sa.calc467, %Opq.sa.calc462 ; <i32> [#uses=1]
+ %Opq.sa.calc466 = xor i32 %Opq.sa.calc465, -164 ; <i32> [#uses=1]
+ %16 = icmp slt i32 %yN, 0 ; <i1> [#uses=1]
+ br i1 %16, label %meshBB428, label %meshBB392
+
+bb5: ; preds = %meshBB428
+ %Opq.sa.calc470 = sub i32 %Opq.sa.calc897, -49 ; <i32> [#uses=1]
+ %17 = getelementptr %struct.Macroblock* %2, i64 %3, i32 20 ; <i32*> [#uses=1]
+ %18 = load i32* %17, align 4 ; <i32> [#uses=1]
+ br label %bb5.fragment
+
+bb5.fragment: ; preds = %bb5
+ %Opq.sa.calc873 = sub i32 %Opq.sa.calc470, 169 ; <i32> [#uses=7]
+ %19 = icmp eq i32 %18, 0 ; <i1> [#uses=1]
+ %20 = and i32 %curr_mb_nr, 1 ; <i32> [#uses=1]
+ %21 = icmp eq i32 %20, 0 ; <i1> [#uses=2]
+ br i1 %19, label %bb6, label %bb13
+
+bb6: ; preds = %bb5.fragment
+ %Opq.sa.calc473 = xor i32 %Opq.sa.calc873, 81 ; <i32> [#uses=1]
+ br i1 %21, label %bb7, label %meshBB348
+
+bb7: ; preds = %bb6
+ %Opq.sa.calc476 = add i32 %Opq.sa.calc873, -58 ; <i32> [#uses=1]
+ %22 = getelementptr %struct.Macroblock* %2, i64 %3, i32 25 ; <i32*> [#uses=1]
+ %23 = load i32* %22, align 8 ; <i32> [#uses=1]
+ %24 = add i32 %23, 1 ; <i32> [#uses=1]
+ %25 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ br label %meshBB388
+
+bb7.fragment: ; preds = %meshBB388
+ %Opq.sa.calc709 = sub i32 %Opq.sa.calc886, 143 ; <i32> [#uses=1]
+ %Opq.sa.calc707 = add i32 %Opq.sa.calc709, %Opq.sa.calc886 ; <i32> [#uses=1]
+ %Opq.sa.calc708 = xor i32 %Opq.sa.calc707, 474 ; <i32> [#uses=0]
+ store i32 %.SV194.phi, i32* %.SV196.phi, align 4
+ %26 = getelementptr %struct.Macroblock* %.load17.SV.phi, i64 %.load36.SV.phi, i32 29 ; <i32*> [#uses=1]
+ %27 = load i32* %26, align 8 ; <i32> [#uses=2]
+ store i32 %27, i32* %.load67.SV.phi, align 4
+ br label %bb96
+
+bb8: ; preds = %meshBB348
+ %Opq.sa.calc479 = sub i32 %Opq.sa.calc805, 141 ; <i32> [#uses=1]
+ %28 = getelementptr %struct.Macroblock* %2, i64 %3, i32 22 ; <i32*> [#uses=2]
+ %29 = load i32* %28, align 4 ; <i32> [#uses=2]
+ %30 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=2]
+ br label %meshBB368
+
+bb8.fragment: ; preds = %meshBB368
+ %Opq.sa.calc765 = sub i32 %Opq.sa.calc768, -115 ; <i32> [#uses=2]
+ store i32 %.SV198.phi, i32* %.SV200.phi, align 4
+ %31 = getelementptr %struct.Macroblock* %.load16.SV.phi, i64 %.load35.SV.phi, i32 26 ; <i32*> [#uses=2]
+ %32 = load i32* %31, align 4 ; <i32> [#uses=4]
+ store i32 %32, i32* %.load66.SV.phi, align 4
+ %33 = load i32* %31, align 4 ; <i32> [#uses=1]
+ %34 = icmp eq i32 %33, 0 ; <i1> [#uses=1]
+ br i1 %34, label %bb96, label %bb9
+
+bb9: ; preds = %bb8.fragment
+ %Opq.sa.calc482 = xor i32 %Opq.sa.calc765, 163 ; <i32> [#uses=0]
+ %35 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %36 = getelementptr %struct.ImageParameters* %35, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %37 = load %struct.Macroblock** %36, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %38 = load i32* %.SV76.phi, align 4 ; <i32> [#uses=1]
+ br label %bb9.fragment
+
+bb9.fragment: ; preds = %bb9
+ %Opq.sa.calc999 = add i32 %Opq.sa.calc765, -44 ; <i32> [#uses=1]
+ %39 = sext i32 %38 to i64 ; <i64> [#uses=1]
+ %40 = getelementptr %struct.Macroblock* %37, i64 %39, i32 20 ; <i32*> [#uses=1]
+ %41 = load i32* %40, align 4 ; <i32> [#uses=1]
+ %42 = icmp eq i32 %41, 0 ; <i1> [#uses=1]
+ br i1 %42, label %bb96, label %bb11
+
+bb11: ; preds = %bb9.fragment
+ %Opq.sa.calc485 = sub i32 %Opq.sa.calc999, 200 ; <i32> [#uses=2]
+ %43 = add i32 %.SV78.phi, 1 ; <i32> [#uses=1]
+ br label %meshBB332
+
+bb11.fragment: ; preds = %meshBB332
+ %Opq.sa.calc954 = xor i32 %Opq.link.mask859, 233 ; <i32> [#uses=0]
+ store i32 %.SV206.phi, i32* %.load81.SV.phi, align 4
+ %44 = add i32 %.load50.SV.phi, %yN ; <i32> [#uses=1]
+ %45 = ashr i32 %44, 1 ; <i32> [#uses=1]
+ br label %bb96
+
+bb13: ; preds = %bb5.fragment
+ %Opq.sa.calc490 = xor i32 %Opq.sa.calc873, 175 ; <i32> [#uses=1]
+ %Opq.sa.calc488 = sub i32 %Opq.sa.calc490, %Opq.sa.calc873 ; <i32> [#uses=1]
+ %Opq.sa.calc489 = sub i32 %Opq.sa.calc488, 133 ; <i32> [#uses=1]
+ %46 = getelementptr %struct.Macroblock* %2, i64 %3, i32 25 ; <i32*> [#uses=1]
+ br label %meshBB360
+
+bb13.fragment: ; preds = %meshBB360
+ %Opq.sa.calc870 = add i32 %Opq.sa.calc866, -129 ; <i32> [#uses=3]
+ %47 = load i32* %.SV208.phi, align 8 ; <i32> [#uses=3]
+ br i1 %.load74.SV.phi, label %bb14, label %meshBB412
+
+bb14: ; preds = %bb13.fragment
+ %Opq.sa.calc493 = add i32 %Opq.sa.calc870, 103 ; <i32> [#uses=1]
+ %48 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=2]
+ store i32 %47, i32* %48, align 4
+ %49 = getelementptr %struct.Macroblock* %2, i64 %3, i32 29 ; <i32*> [#uses=2]
+ br label %bb14.fragment
+
+bb14.fragment: ; preds = %bb14
+ %Opq.sa.calc723 = sub i32 %Opq.sa.calc493, 117 ; <i32> [#uses=4]
+ %50 = load i32* %49, align 8 ; <i32> [#uses=4]
+ store i32 %50, i32* %.SV52.phi1113, align 4
+ %51 = load i32* %49, align 8 ; <i32> [#uses=1]
+ %52 = icmp eq i32 %51, 0 ; <i1> [#uses=1]
+ br i1 %52, label %meshBB, label %bb15
+
+bb15: ; preds = %bb14.fragment
+ %Opq.sa.calc496 = sub i32 %Opq.sa.calc723, -8 ; <i32> [#uses=1]
+ %53 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %54 = getelementptr %struct.ImageParameters* %53, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %55 = load %struct.Macroblock** %54, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %56 = load i32* %.SV208.phi, align 8 ; <i32> [#uses=1]
+ br label %meshBB324
+
+bb15.fragment: ; preds = %meshBB324
+ %Opq.sa.calc925 = xor i32 %Opq.sa.calc750, 215 ; <i32> [#uses=2]
+ %57 = sext i32 %.SV214.phi to i64 ; <i64> [#uses=1]
+ %58 = getelementptr %struct.Macroblock* %.SV212.phi, i64 %57, i32 20 ; <i32*> [#uses=1]
+ %59 = load i32* %58, align 4 ; <i32> [#uses=1]
+ %60 = icmp eq i32 %59, 0 ; <i1> [#uses=1]
+ br i1 %60, label %bb16, label %bb96
+
+bb16: ; preds = %bb15.fragment
+ %Opq.sa.calc499 = sub i32 %Opq.sa.calc925, -140 ; <i32> [#uses=0]
+ %61 = add i32 %.SV87.phi, 1 ; <i32> [#uses=1]
+ br label %bb16.fragment
+
+bb16.fragment: ; preds = %bb16
+ %Opq.sa.calc968 = add i32 %Opq.sa.calc925, 129 ; <i32> [#uses=0]
+ store i32 %61, i32* %.SV91.phi, align 4
+ %62 = shl i32 %yN, 1 ; <i32> [#uses=1]
+ br label %bb96
+
+bb19: ; preds = %meshBB412
+ %Opq.sa.calc502 = sub i32 %Opq.sa.calc932, -94 ; <i32> [#uses=0]
+ %63 = add i32 %.SV87.phi1030, 1 ; <i32> [#uses=1]
+ %64 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ br label %bb19.fragment
+
+bb19.fragment: ; preds = %bb19
+ %Opq.sa.calc880 = xor i32 %Opq.sa.calc932, 246 ; <i32> [#uses=0]
+ store i32 %63, i32* %64, align 4
+ %65 = getelementptr %struct.Macroblock* %2, i64 %3, i32 29 ; <i32*> [#uses=1]
+ %66 = load i32* %65, align 8 ; <i32> [#uses=2]
+ store i32 %66, i32* %.SV52.phi1186, align 4
+ br label %bb96
+
+bb21: ; preds = %meshBB392
+ %Opq.sa.calc505 = add i32 %Opq.sa.calc921, -40 ; <i32> [#uses=2]
+ br i1 %or.cond.not.SV.phi, label %meshBB360, label %bb97
+
+bb23: ; preds = %meshBB360
+ %Opq.sa.calc509 = xor i32 %Opq.sa.calc866, 70 ; <i32> [#uses=1]
+ %Opq.sa.calc508 = sub i32 %Opq.sa.calc509, -19 ; <i32> [#uses=0]
+ %67 = getelementptr %struct.Macroblock* %2, i64 %3, i32 20 ; <i32*> [#uses=1]
+ %68 = load i32* %67, align 4 ; <i32> [#uses=1]
+ %69 = icmp eq i32 %68, 0 ; <i1> [#uses=1]
+ %70 = and i32 %curr_mb_nr, 1 ; <i32> [#uses=1]
+ %71 = icmp eq i32 %70, 0 ; <i1> [#uses=2]
+ br label %bb23.fragment
+
+bb23.fragment: ; preds = %bb23
+ %Opq.sa.calc847 = sub i32 %Opq.sa.calc866, -9 ; <i32> [#uses=2]
+ %72 = getelementptr %struct.Macroblock* %2, i64 %3, i32 22 ; <i32*> [#uses=3]
+ %73 = load i32* %72, align 4 ; <i32> [#uses=3]
+ %74 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=3]
+ store i32 %73, i32* %74, align 4
+ br label %bb23.fragment182
+
+bb23.fragment182: ; preds = %bb23.fragment
+ %Opq.sa.calc744 = xor i32 %Opq.sa.calc847, 152 ; <i32> [#uses=4]
+ %Opq.sa.calc742 = add i32 %Opq.sa.calc744, %Opq.sa.calc847 ; <i32> [#uses=1]
+ %Opq.sa.calc743 = add i32 %Opq.sa.calc742, -149 ; <i32> [#uses=2]
+ %75 = getelementptr %struct.Macroblock* %2, i64 %3, i32 26 ; <i32*> [#uses=2]
+ %76 = load i32* %75, align 4 ; <i32> [#uses=3]
+ store i32 %76, i32* %.SV52.phi1113, align 4
+ %77 = load i32* %75, align 4 ; <i32> [#uses=1]
+ %78 = icmp ne i32 %77, 0 ; <i1> [#uses=2]
+ br i1 %69, label %meshBB344, label %meshBB432
+
+bb24: ; preds = %meshBB344
+ %Opq.sa.calc512 = add i32 %Opq.sa.calc716, -55 ; <i32> [#uses=3]
+ br i1 %.SV96.phi, label %bb25, label %bb32
+
+bb25: ; preds = %bb24
+ %Opq.sa.calc515 = sub i32 %Opq.sa.calc716, 18 ; <i32> [#uses=1]
+ br i1 %.SV135.phi, label %bb26, label %bb96
+
+bb26: ; preds = %bb25
+ %Opq.sa.calc519 = xor i32 %Opq.sa.calc515, 23 ; <i32> [#uses=2]
+ %Opq.sa.calc518 = xor i32 %Opq.sa.calc519, 84 ; <i32> [#uses=1]
+ %79 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %80 = getelementptr %struct.ImageParameters* %79, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %81 = load %struct.Macroblock** %80, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %82 = load i32* %.SV99.phi, align 4 ; <i32> [#uses=1]
+ br label %meshBB340
+
+bb26.fragment: ; preds = %meshBB340
+ %Opq.sa.calc918 = xor i32 %Opq.sa.calc754, 228 ; <i32> [#uses=4]
+ %Opq.sa.calc916 = add i32 %Opq.sa.calc918, %Opq.sa.calc754 ; <i32> [#uses=1]
+ %Opq.sa.calc917 = add i32 %Opq.sa.calc916, -237 ; <i32> [#uses=1]
+ %83 = sext i32 %.SV230.phi to i64 ; <i64> [#uses=1]
+ %84 = getelementptr %struct.Macroblock* %.SV228.phi, i64 %83, i32 20 ; <i32*> [#uses=1]
+ %85 = load i32* %84, align 4 ; <i32> [#uses=1]
+ %86 = icmp eq i32 %85, 0 ; <i1> [#uses=1]
+ br i1 %86, label %meshBB420, label %meshBB356
+
+bb28: ; preds = %meshBB356
+ %Opq.sa.calc522 = xor i32 %Opq.sa.calc983, 107 ; <i32> [#uses=2]
+ %87 = and i32 %yN, 1 ; <i32> [#uses=1]
+ %88 = icmp eq i32 %87, 0 ; <i1> [#uses=1]
+ br i1 %88, label %bb29, label %bb30
+
+bb29: ; preds = %bb28
+ %Opq.sa.calc525 = xor i32 %Opq.sa.calc522, 151 ; <i32> [#uses=2]
+ %89 = ashr i32 %yN, 1 ; <i32> [#uses=1]
+ br label %meshBB340
+
+bb30: ; preds = %bb28
+ %Opq.sa.calc528 = sub i32 %Opq.sa.calc522, -64 ; <i32> [#uses=1]
+ %90 = add i32 %.SV104.phi1160, 1 ; <i32> [#uses=1]
+ br label %bb30.fragment
+
+bb30.fragment: ; preds = %bb30
+ %Opq.sa.calc791 = add i32 %Opq.sa.calc528, -14 ; <i32> [#uses=0]
+ store i32 %90, i32* %.SV111.phi1159, align 4
+ %91 = ashr i32 %yN, 1 ; <i32> [#uses=1]
+ br label %bb96
+
+bb32: ; preds = %bb24
+ %Opq.sa.calc531 = xor i32 %Opq.sa.calc512, 50 ; <i32> [#uses=1]
+ br i1 %.SV135.phi, label %bb33, label %meshBB324
+
+bb33: ; preds = %bb32
+ %Opq.sa.calc534 = sub i32 %Opq.sa.calc512, -75 ; <i32> [#uses=2]
+ %92 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %93 = getelementptr %struct.ImageParameters* %92, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %94 = load %struct.Macroblock** %93, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %95 = load i32* %.SV99.phi, align 4 ; <i32> [#uses=1]
+ br label %bb33.fragment
+
+bb33.fragment: ; preds = %bb33
+ %Opq.sa.calc712 = add i32 %Opq.sa.calc534, -109 ; <i32> [#uses=3]
+ %96 = sext i32 %95 to i64 ; <i64> [#uses=1]
+ %97 = getelementptr %struct.Macroblock* %94, i64 %96, i32 20 ; <i32*> [#uses=1]
+ %98 = load i32* %97, align 4 ; <i32> [#uses=1]
+ %99 = icmp eq i32 %98, 0 ; <i1> [#uses=1]
+ br i1 %99, label %bb34, label %meshBB
+
+bb34: ; preds = %bb33.fragment
+ %Opq.sa.calc537 = add i32 %Opq.sa.calc712, 8 ; <i32> [#uses=1]
+ %100 = add i32 %.SV104.phi, 1 ; <i32> [#uses=1]
+ br label %meshBB328
+
+bb34.fragment: ; preds = %meshBB328
+ %Opq.sa.calc965 = xor i32 %Opq.sa.calc787, 251 ; <i32> [#uses=0]
+ store i32 %.SV238.phi, i32* %.load116.SV.phi, align 4
+ br label %bb96
+
+bb35: ; preds = %meshBB
+ %Opq.sa.calc541 = add i32 %Opq.sa.calc828, -112 ; <i32> [#uses=3]
+ %Opq.sa.calc540 = xor i32 %Opq.sa.calc541, 3 ; <i32> [#uses=1]
+ %101 = and i32 %yN, 1 ; <i32> [#uses=1]
+ %102 = icmp eq i32 %101, 0 ; <i1> [#uses=1]
+ br i1 %102, label %meshBB372, label %meshBB448
+
+bb36: ; preds = %meshBB372
+ %Opq.sa.calc544 = sub i32 %Opq.sa.calc812, -10 ; <i32> [#uses=0]
+ %103 = add i32 %.SV43.phi1015, %yN ; <i32> [#uses=1]
+ br label %bb36.fragment
+
+bb36.fragment: ; preds = %bb36
+ %Opq.sa.calc762 = add i32 %Opq.sa.calc812, -69 ; <i32> [#uses=0]
+ %104 = ashr i32 %103, 1 ; <i32> [#uses=1]
+ br label %bb96
+
+bb37: ; preds = %meshBB448
+ %Opq.sa.calc547 = add i32 %Opq.sa.calc958, -49 ; <i32> [#uses=1]
+ %105 = add i32 %.SV104.phi1157, 1 ; <i32> [#uses=1]
+ br label %meshBB348
+
+bb37.fragment: ; preds = %meshBB348
+ %Opq.sa.calc728 = add i32 %Opq.sa.calc805, -5 ; <i32> [#uses=0]
+ store i32 %.SV242.phi, i32* %.load115.SV.phi, align 4
+ %106 = add i32 %.load48.SV.phi, %yN ; <i32> [#uses=1]
+ %107 = ashr i32 %106, 1 ; <i32> [#uses=1]
+ br label %bb96
+
+bb39: ; preds = %meshBB432
+ %Opq.sa.calc550 = sub i32 %Opq.sa.calc798, -214 ; <i32> [#uses=0]
+ br i1 %.SV96.phi1038, label %bb40, label %bb48
+
+bb40: ; preds = %bb39
+ %Opq.sa.calc554 = xor i32 %Opq.sa.calc798, 14 ; <i32> [#uses=4]
+ %Opq.sa.calc553 = sub i32 %Opq.sa.calc554, 7 ; <i32> [#uses=1]
+ br i1 %.SV135.phi1039, label %meshBB336, label %meshBB444
+
+bb41: ; preds = %meshBB336
+ %Opq.sa.calc557 = sub i32 %Opq.sa.calc979, 143 ; <i32> [#uses=1]
+ %108 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %109 = getelementptr %struct.ImageParameters* %108, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %110 = load %struct.Macroblock** %109, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %111 = load i32* %.SV99.phi1128, align 4 ; <i32> [#uses=1]
+ br label %bb41.fragment
+
+bb41.fragment: ; preds = %bb41
+ %Opq.sa.calc987 = xor i32 %Opq.sa.calc557, 213 ; <i32> [#uses=4]
+ %112 = sext i32 %111 to i64 ; <i64> [#uses=1]
+ %113 = getelementptr %struct.Macroblock* %110, i64 %112, i32 20 ; <i32*> [#uses=1]
+ %114 = load i32* %113, align 4 ; <i32> [#uses=1]
+ %115 = icmp eq i32 %114, 0 ; <i1> [#uses=1]
+ br i1 %115, label %bb42, label %bb96
+
+bb42: ; preds = %bb41.fragment
+ %Opq.sa.calc560 = add i32 %Opq.sa.calc987, -221 ; <i32> [#uses=1]
+ %116 = ashr i32 %.SV43.phi1230, 1 ; <i32> [#uses=1]
+ %117 = icmp sgt i32 %116, %yN ; <i1> [#uses=1]
+ br i1 %117, label %meshBB432, label %bb44
+
+bb43: ; preds = %meshBB432
+ %Opq.sa.calc563 = xor i32 %Opq.sa.calc798, 31 ; <i32> [#uses=0]
+ %118 = shl i32 %yN, 1 ; <i32> [#uses=1]
+ br label %bb96
+
+bb44: ; preds = %bb42
+ %Opq.sa.calc566 = sub i32 %Opq.sa.calc987, 217 ; <i32> [#uses=1]
+ %119 = add i32 %.SV104.phi1127, 1 ; <i32> [#uses=1]
+ br label %meshBB332
+
+bb44.fragment: ; preds = %meshBB332
+ %Opq.sa.calc894 = add i32 %Opq.sa.calc856, -200 ; <i32> [#uses=1]
+ store i32 %.SV248.phi, i32* %.load114.SV.phi, align 4
+ %120 = shl i32 %yN, 1 ; <i32> [#uses=1]
+ %121 = sub i32 %120, %.load46.SV.phi ; <i32> [#uses=1]
+ br label %meshBB376
+
+bb48: ; preds = %bb39
+ %Opq.sa.calc569 = sub i32 %Opq.sa.calc798, -110 ; <i32> [#uses=1]
+ br i1 %.SV135.phi1039, label %bb49, label %bb96
+
+bb49: ; preds = %bb48
+ %Opq.sa.calc572 = add i32 %Opq.sa.calc798, 84 ; <i32> [#uses=0]
+ %122 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %123 = getelementptr %struct.ImageParameters* %122, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %124 = load %struct.Macroblock** %123, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %125 = load i32* %.SV99.phi1037, align 4 ; <i32> [#uses=1]
+ br label %bb49.fragment
+
+bb49.fragment: ; preds = %bb49
+ %Opq.sa.calc860 = sub i32 %Opq.sa.calc569, 114 ; <i32> [#uses=5]
+ %126 = sext i32 %125 to i64 ; <i64> [#uses=1]
+ %127 = getelementptr %struct.Macroblock* %124, i64 %126, i32 20 ; <i32*> [#uses=1]
+ %128 = load i32* %127, align 4 ; <i32> [#uses=1]
+ %129 = icmp eq i32 %128, 0 ; <i1> [#uses=1]
+ br i1 %129, label %bb50, label %meshBB380
+
+bb50: ; preds = %bb49.fragment
+ %Opq.sa.calc577 = add i32 %Opq.sa.calc860, 12 ; <i32> [#uses=2]
+ %130 = ashr i32 %.SV43.phi1178, 1 ; <i32> [#uses=1]
+ %131 = icmp sgt i32 %130, %yN ; <i1> [#uses=1]
+ br i1 %131, label %meshBB328, label %bb52
+
+bb51: ; preds = %meshBB328
+ %Opq.sa.calc580 = xor i32 %Opq.sa.calc787, 194 ; <i32> [#uses=0]
+ %132 = shl i32 %yN, 1 ; <i32> [#uses=1]
+ %133 = or i32 %132, 1 ; <i32> [#uses=1]
+ br label %bb96
+
+bb52: ; preds = %bb50
+ %Opq.sa.calc584 = sub i32 %Opq.sa.calc860, -65 ; <i32> [#uses=2]
+ %Opq.sa.calc583 = sub i32 %Opq.sa.calc584, 50 ; <i32> [#uses=1]
+ %134 = add i32 %.SV104.phi1036, 1 ; <i32> [#uses=1]
+ store i32 %134, i32* %.SV111.phi1035, align 4
+ br label %meshBB384
+
+bb52.fragment: ; preds = %meshBB384
+ %Opq.sa.calc844 = add i32 %Opq.sa.calc901, -214 ; <i32> [#uses=1]
+ %135 = shl i32 %yN, 1 ; <i32> [#uses=1]
+ %136 = or i32 %135, 1 ; <i32> [#uses=1]
+ %137 = sub i32 %136, %.load44.SV.phi ; <i32> [#uses=1]
+ br label %meshBB388
+
+bb54: ; preds = %meshBB380
+ %Opq.sa.calc589 = add i32 %Opq.sa.calc946, 108 ; <i32> [#uses=1]
+ %138 = add i32 %.SV104.phi1124, 1 ; <i32> [#uses=1]
+ br label %bb54.fragment
+
+bb54.fragment: ; preds = %bb54
+ %Opq.sa.calc883 = xor i32 %Opq.sa.calc589, 119 ; <i32> [#uses=2]
+ store i32 %138, i32* %.SV111.phi1123, align 4
+ br label %meshBB440
+
+bb56: ; preds = %meshBB404
+ %Opq.sa.calc592 = sub i32 %Opq.sa.calc939, 87 ; <i32> [#uses=2]
+ %.not4 = icmp sgt i32 %xN, -1 ; <i1> [#uses=1]
+ %139 = icmp sgt i32 %.SV40.phi, %xN ; <i1> [#uses=1]
+ br label %meshBB364
+
+bb56.fragment: ; preds = %meshBB364
+ %Opq.sa.calc1002 = xor i32 %Opq.link.mask737, 77 ; <i32> [#uses=6]
+ %or.cond5 = and i1 %.SV256.phi, %.not4.SV.phi ; <i1> [#uses=1]
+ %140 = icmp slt i32 %yN, 0 ; <i1> [#uses=2]
+ br i1 %or.cond5, label %bb58, label %bb83
+
+bb58: ; preds = %bb56.fragment
+ %Opq.sa.calc596 = xor i32 %Opq.sa.calc1002, 73 ; <i32> [#uses=1]
+ %Opq.sa.calc595 = add i32 %Opq.sa.calc596, 147 ; <i32> [#uses=0]
+ br i1 %140, label %bb59, label %bb76
+
+bb59: ; preds = %bb58
+ %Opq.sa.calc599 = add i32 %Opq.sa.calc1002, 151 ; <i32> [#uses=0]
+ %141 = getelementptr %struct.Macroblock* %2, i64 %3, i32 20 ; <i32*> [#uses=1]
+ %142 = load i32* %141, align 4 ; <i32> [#uses=1]
+ br label %bb59.fragment
+
+bb59.fragment: ; preds = %bb59
+ %Opq.sa.calc731 = sub i32 %Opq.sa.calc1002, -161 ; <i32> [#uses=3]
+ %143 = icmp eq i32 %142, 0 ; <i1> [#uses=1]
+ %144 = and i32 %curr_mb_nr, 1 ; <i32> [#uses=1]
+ %145 = icmp eq i32 %144, 0 ; <i1> [#uses=2]
+ br i1 %143, label %bb60, label %bb68
+
+bb60: ; preds = %bb59.fragment
+ %Opq.sa.calc602 = xor i32 %Opq.sa.calc731, 1 ; <i32> [#uses=2]
+ br i1 %145, label %bb61, label %bb66
+
+bb61: ; preds = %bb60
+ %Opq.sa.calc605 = xor i32 %Opq.sa.calc731, 57 ; <i32> [#uses=1]
+ %146 = getelementptr %struct.Macroblock* %2, i64 %3, i32 23 ; <i32*> [#uses=2]
+ %147 = load i32* %146, align 8 ; <i32> [#uses=3]
+ %148 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=3]
+ br label %bb61.fragment
+
+bb61.fragment: ; preds = %bb61
+ %Opq.sa.calc700 = sub i32 %Opq.sa.calc605, 108 ; <i32> [#uses=3]
+ store i32 %147, i32* %148, align 4
+ %149 = getelementptr %struct.Macroblock* %2, i64 %3, i32 27 ; <i32*> [#uses=4]
+ %150 = load i32* %149, align 8 ; <i32> [#uses=1]
+ %151 = icmp eq i32 %150, 0 ; <i1> [#uses=1]
+ br i1 %151, label %bb65, label %bb62
+
+bb62: ; preds = %bb61.fragment
+ %Opq.sa.calc608 = add i32 %Opq.sa.calc700, -94 ; <i32> [#uses=1]
+ %152 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=2]
+ %153 = getelementptr %struct.ImageParameters* %152, i64 0, i32 45 ; <i32*> [#uses=1]
+ %154 = load i32* %153, align 4 ; <i32> [#uses=1]
+ %155 = icmp eq i32 %154, 1 ; <i1> [#uses=1]
+ br i1 %155, label %bb63, label %bb64
+
+bb63: ; preds = %bb62
+ %Opq.sa.calc611 = add i32 %Opq.sa.calc700, -101 ; <i32> [#uses=2]
+ %156 = getelementptr %struct.ImageParameters* %152, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %157 = load %struct.Macroblock** %156, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %158 = load i32* %146, align 8 ; <i32> [#uses=1]
+ br label %meshBB452
+
+bb63.fragment: ; preds = %meshBB452
+ %Opq.sa.calc891 = add i32 %Opq.link.mask823, 18 ; <i32> [#uses=2]
+ %Opq.sa.calc890 = add i32 %Opq.sa.calc891, -3 ; <i32> [#uses=2]
+ %159 = sext i32 %.SV266.phi to i64 ; <i64> [#uses=1]
+ %160 = getelementptr %struct.Macroblock* %.SV264.phi, i64 %159, i32 20 ; <i32*> [#uses=1]
+ %161 = load i32* %160, align 4 ; <i32> [#uses=1]
+ %162 = icmp eq i32 %161, 0 ; <i1> [#uses=1]
+ br i1 %162, label %bb64, label %meshBB456
+
+bb64: ; preds = %bb63.fragment, %bb62
+ %.SV38.phi1132 = phi i64 [ %.SV38.phi1110, %bb63.fragment ], [ %.SV38.phi1098, %bb62 ] ; <i64> [#uses=1]
+ %.SV52.phi1131 = phi i32* [ %.SV52.phi1109, %bb63.fragment ], [ %.SV52.phi1097, %bb62 ] ; <i32*> [#uses=1]
+ %.SV68.phi1130 = phi i32 [ %.SV68.phi1108, %bb63.fragment ], [ %.SV68.phi1096, %bb62 ] ; <i32> [#uses=1]
+ %.SV70.phi1129 = phi i32 [ %.SV70.phi1107, %bb63.fragment ], [ %.SV70.phi1095, %bb62 ] ; <i32> [#uses=1]
+ %Opq.link.SV615.phi = phi i32 [ %Opq.sa.calc890, %bb63.fragment ], [ %Opq.sa.calc608, %bb62 ] ; <i32> [#uses=1]
+ %.SV150.phi = phi i32* [ %.SV150.phi1060, %bb63.fragment ], [ %148, %bb62 ] ; <i32*> [#uses=1]
+ %.SV152.phi = phi i32* [ %.SV152.phi1059, %bb63.fragment ], [ %149, %bb62 ] ; <i32*> [#uses=1]
+ %.SV148.phi = phi i32 [ %.SV148.phi1057, %bb63.fragment ], [ %147, %bb62 ] ; <i32> [#uses=1]
+ %Opq.link.mask = and i32 %Opq.link.SV615.phi, 1 ; <i32> [#uses=1]
+ %Opq.sa.calc614 = add i32 %Opq.link.mask, 189 ; <i32> [#uses=1]
+ %163 = add i32 %.SV148.phi, 1 ; <i32> [#uses=1]
+ store i32 %163, i32* %.SV150.phi, align 4
+ br label %bb65
+
+bb65: ; preds = %meshBB456, %bb64, %bb61.fragment
+ %.SV38.phi1144 = phi i64 [ %.SV38.phi1137, %meshBB456 ], [ %.SV38.phi1098, %bb61.fragment ], [ %.SV38.phi1132, %bb64 ] ; <i64> [#uses=1]
+ %.SV52.phi1143 = phi i32* [ %.SV52.phi1136, %meshBB456 ], [ %.SV52.phi1097, %bb61.fragment ], [ %.SV52.phi1131, %bb64 ] ; <i32*> [#uses=1]
+ %.SV68.phi1142 = phi i32 [ %.SV68.phi1135, %meshBB456 ], [ %.SV68.phi1096, %bb61.fragment ], [ %.SV68.phi1130, %bb64 ] ; <i32> [#uses=1]
+ %.SV70.phi1141 = phi i32 [ %.SV70.phi1134, %meshBB456 ], [ %.SV70.phi1095, %bb61.fragment ], [ %.SV70.phi1129, %bb64 ] ; <i32> [#uses=1]
+ %.SV152.phi1058 = phi i32* [ %.SV152.phi1133, %meshBB456 ], [ %149, %bb61.fragment ], [ %.SV152.phi, %bb64 ] ; <i32*> [#uses=1]
+ %Opq.link.SV618.phi = phi i32 [ %Opq.sa.calc816, %meshBB456 ], [ %Opq.sa.calc700, %bb61.fragment ], [ %Opq.sa.calc614, %bb64 ] ; <i32> [#uses=1]
+ %Opq.link.mask620 = and i32 %Opq.link.SV618.phi, 40 ; <i32> [#uses=1]
+ %Opq.sa.calc617 = add i32 %Opq.link.mask620, -35 ; <i32> [#uses=2]
+ %164 = load i32* %.SV152.phi1058, align 8 ; <i32> [#uses=1]
+ br label %meshBB436
+
+bb65.fragment: ; preds = %meshBB436
+ %Opq.sa.calc832 = add i32 %Opq.link.mask706, 1 ; <i32> [#uses=2]
+ store i32 %.SV268.phi, i32* %.load62.SV.phi, align 4
+ br label %meshBB364
+
+bb66: ; preds = %bb60
+ %Opq.sa.calc621 = add i32 %Opq.sa.calc602, -217 ; <i32> [#uses=1]
+ %165 = add i32 %curr_mb_nr, -1 ; <i32> [#uses=1]
+ %166 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ br label %meshBB420
+
+bb66.fragment: ; preds = %meshBB420
+ %Opq.sa.calc795 = xor i32 %Opq.sa.calc837, 105 ; <i32> [#uses=2]
+ %Opq.sa.calc794 = sub i32 %Opq.sa.calc795, 167 ; <i32> [#uses=1]
+ store i32 %.SV270.phi, i32* %.SV272.phi, align 4
+ store i32 1, i32* %.load61.SV.phi, align 4
+ br label %meshBB444
+
+bb68: ; preds = %bb59.fragment
+ %Opq.sa.calc624 = sub i32 %Opq.sa.calc731, 229 ; <i32> [#uses=3]
+ %167 = getelementptr %struct.Macroblock* %2, i64 %3, i32 23 ; <i32*> [#uses=1]
+ br label %meshBB344
+
+bb68.fragment: ; preds = %meshBB344
+ %Opq.sa.calc784 = sub i32 %Opq.link.mask722, 3 ; <i32> [#uses=5]
+ %168 = load i32* %.SV274.phi, align 8 ; <i32> [#uses=3]
+ br i1 %.load144.SV.phi, label %bb69, label %meshBB412
+
+bb69: ; preds = %bb68.fragment
+ %Opq.sa.calc627 = add i32 %Opq.sa.calc784, 163 ; <i32> [#uses=0]
+ %169 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=2]
+ store i32 %168, i32* %169, align 4
+ %170 = getelementptr %struct.Macroblock* %2, i64 %3, i32 27 ; <i32*> [#uses=2]
+ br label %bb69.fragment
+
+bb69.fragment: ; preds = %bb69
+ %Opq.sa.calc996 = sub i32 %Opq.sa.calc784, -9 ; <i32> [#uses=3]
+ %Opq.sa.calc994 = sub i32 %Opq.sa.calc996, %Opq.sa.calc784 ; <i32> [#uses=1]
+ %Opq.sa.calc995 = sub i32 %Opq.sa.calc994, 3 ; <i32> [#uses=2]
+ %171 = load i32* %170, align 8 ; <i32> [#uses=3]
+ store i32 %171, i32* %.SV52.phi1170, align 4
+ %172 = load i32* %170, align 8 ; <i32> [#uses=1]
+ %173 = icmp eq i32 %172, 0 ; <i1> [#uses=1]
+ br i1 %173, label %meshBB396, label %meshBB400
+
+bb70: ; preds = %meshBB400
+ %Opq.sa.calc630 = add i32 %Opq.sa.calc824, -203 ; <i32> [#uses=2]
+ %174 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %175 = getelementptr %struct.ImageParameters* %174, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %176 = load %struct.Macroblock** %175, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %177 = load i32* %.SV156.phi, align 8 ; <i32> [#uses=1]
+ br label %meshBB428
+
+bb70.fragment: ; preds = %meshBB428
+ %Opq.sa.calc739 = xor i32 %Opq.sa.calc897, 213 ; <i32> [#uses=2]
+ %Opq.sa.calc738 = sub i32 %Opq.sa.calc739, 1 ; <i32> [#uses=2]
+ %178 = sext i32 %.SV280.phi to i64 ; <i64> [#uses=1]
+ %179 = getelementptr %struct.Macroblock* %.SV278.phi, i64 %178, i32 20 ; <i32*> [#uses=1]
+ %180 = load i32* %179, align 4 ; <i32> [#uses=1]
+ %181 = icmp eq i32 %180, 0 ; <i1> [#uses=1]
+ br i1 %181, label %meshBB452, label %meshBB356
+
+bb71: ; preds = %meshBB452
+ %Opq.sa.calc633 = xor i32 %Opq.sa.calc820, 118 ; <i32> [#uses=1]
+ %182 = add i32 %.SV158.phi1106, 1 ; <i32> [#uses=1]
+ br label %meshBB352
+
+bb71.fragment: ; preds = %meshBB352
+ %Opq.sa.calc809 = sub i32 %Opq.sa.calc876, 17 ; <i32> [#uses=2]
+ store i32 %.SV282.phi, i32* %.load163.SV.phi, align 4
+ %183 = shl i32 %yN, 1 ; <i32> [#uses=1]
+ br label %meshBB436
+
+bb74: ; preds = %meshBB412
+ %Opq.sa.calc636 = xor i32 %Opq.sa.calc932, 233 ; <i32> [#uses=1]
+ %184 = add i32 %.SV158.phi1063, 1 ; <i32> [#uses=1]
+ %185 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ br label %bb74.fragment
+
+bb74.fragment: ; preds = %bb74
+ %Opq.sa.calc1011 = sub i32 %Opq.sa.calc636, -19 ; <i32> [#uses=0]
+ store i32 %184, i32* %185, align 4
+ %186 = getelementptr %struct.Macroblock* %2, i64 %3, i32 27 ; <i32*> [#uses=1]
+ %187 = load i32* %186, align 8 ; <i32> [#uses=2]
+ store i32 %187, i32* %.SV52.phi1186, align 4
+ br label %bb96
+
+bb76: ; preds = %bb58
+ %Opq.sa.calc640 = xor i32 %Opq.sa.calc1002, 71 ; <i32> [#uses=4]
+ %Opq.sa.calc639 = xor i32 %Opq.sa.calc640, 219 ; <i32> [#uses=0]
+ %188 = icmp eq i32 %yN, 0 ; <i1> [#uses=1]
+ br i1 %188, label %bb77, label %bb79
+
+bb77: ; preds = %bb76
+ %Opq.sa.calc643 = add i32 %Opq.sa.calc640, 2 ; <i32> [#uses=2]
+ %189 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %190 = getelementptr %struct.ImageParameters* %189, i64 0, i32 45 ; <i32*> [#uses=1]
+ %191 = load i32* %190, align 4 ; <i32> [#uses=1]
+ %192 = icmp eq i32 %191, 2 ; <i1> [#uses=1]
+ br i1 %192, label %meshBB416, label %bb79
+
+bb78: ; preds = %meshBB416
+ %Opq.sa.calc647 = xor i32 %Opq.sa.calc971, 25 ; <i32> [#uses=2]
+ %Opq.sa.calc646 = sub i32 %Opq.sa.calc647, 29 ; <i32> [#uses=0]
+ %193 = getelementptr %struct.Macroblock* %2, i64 %3, i32 23 ; <i32*> [#uses=1]
+ %194 = load i32* %193, align 8 ; <i32> [#uses=1]
+ %195 = add i32 %194, 1 ; <i32> [#uses=1]
+ br label %bb78.fragment
+
+bb78.fragment: ; preds = %bb78
+ %Opq.sa.calc850 = sub i32 %Opq.sa.calc647, -93 ; <i32> [#uses=0]
+ %196 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %195, i32* %196, align 4
+ store i32 1, i32* %.SV52.phi1200, align 4
+ %197 = add i32 %yN, -1 ; <i32> [#uses=1]
+ br label %bb98
+
+bb79: ; preds = %bb77, %bb76
+ %Opq.link.SV652.phi = phi i32 [ %Opq.sa.calc643, %bb77 ], [ %Opq.sa.calc640, %bb76 ] ; <i32> [#uses=1]
+ %Opq.link.mask654 = and i32 %Opq.link.SV652.phi, 8 ; <i32> [#uses=1]
+ %Opq.sa.calc651 = sub i32 %Opq.link.mask654, -2 ; <i32> [#uses=3]
+ %Opq.sa.calc650 = xor i32 %Opq.sa.calc651, 1 ; <i32> [#uses=2]
+ br i1 %or.cond.not.SV.phi1094, label %meshBB456, label %meshBB352
+
+bb81: ; preds = %meshBB456
+ %Opq.sa.calc655 = add i32 %Opq.sa.calc816, 56 ; <i32> [#uses=0]
+ %198 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %curr_mb_nr, i32* %198, align 4
+ store i32 1, i32* %.SV52.phi1136, align 4
+ br label %bb98
+
+bb83: ; preds = %bb56.fragment
+ %Opq.sa.calc658 = sub i32 %Opq.sa.calc1002, 73 ; <i32> [#uses=3]
+ br i1 %140, label %bb84, label %meshBB424
+
+bb84: ; preds = %bb83
+ %Opq.sa.calc661 = xor i32 %Opq.sa.calc658, 22 ; <i32> [#uses=1]
+ %199 = getelementptr %struct.Macroblock* %2, i64 %3, i32 20 ; <i32*> [#uses=1]
+ %200 = load i32* %199, align 4 ; <i32> [#uses=1]
+ br label %meshBB400
+
+bb84.fragment: ; preds = %meshBB400
+ %Opq.sa.calc802 = xor i32 %Opq.sa.calc824, 240 ; <i32> [#uses=3]
+ %201 = icmp eq i32 %.SV290.phi, 0 ; <i1> [#uses=1]
+ %202 = and i32 %curr_mb_nr, 1 ; <i32> [#uses=1]
+ %203 = icmp eq i32 %202, 0 ; <i1> [#uses=2]
+ br i1 %201, label %meshBB372, label %bb89
+
+bb85: ; preds = %meshBB372
+ %Opq.sa.calc667 = sub i32 %Opq.sa.calc812, 20 ; <i32> [#uses=3]
+ %Opq.sa.calc666 = sub i32 %Opq.sa.calc667, 84 ; <i32> [#uses=2]
+ %Opq.sa.calc664 = add i32 %Opq.sa.calc666, %Opq.sa.calc667 ; <i32> [#uses=1]
+ %Opq.sa.calc665 = add i32 %Opq.sa.calc664, -112 ; <i32> [#uses=2]
+ br i1 %.SV167.phi, label %meshBB336, label %meshBB440
+
+bb86: ; preds = %meshBB336
+ %Opq.sa.calc670 = sub i32 %Opq.sa.calc979, 35 ; <i32> [#uses=1]
+ %204 = getelementptr %struct.Macroblock* %2, i64 %3, i32 24 ; <i32*> [#uses=1]
+ %205 = load i32* %204, align 4 ; <i32> [#uses=1]
+ %206 = add i32 %205, 1 ; <i32> [#uses=1]
+ %207 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ br label %bb86.fragment
+
+bb86.fragment: ; preds = %bb86
+ %Opq.sa.calc943 = xor i32 %Opq.sa.calc670, 123 ; <i32> [#uses=2]
+ store i32 %206, i32* %207, align 4
+ %208 = getelementptr %struct.Macroblock* %2, i64 %3, i32 28 ; <i32*> [#uses=1]
+ %209 = load i32* %208, align 4 ; <i32> [#uses=2]
+ store i32 %209, i32* %.SV52.phi1234, align 4
+ br label %meshBB424
+
+bb87: ; preds = %meshBB440
+ %Opq.sa.calc674 = xor i32 %Opq.sa.calc990, 44 ; <i32> [#uses=1]
+ %Opq.sa.calc673 = xor i32 %Opq.sa.calc674, 160 ; <i32> [#uses=1]
+ store i32 0, i32* %.SV52.phi1235, align 4
+ br label %meshBB408
+
+bb89: ; preds = %bb84.fragment
+ %Opq.sa.calc677 = sub i32 %Opq.sa.calc802, -183 ; <i32> [#uses=1]
+ %210 = getelementptr %struct.Macroblock* %2, i64 %3, i32 24 ; <i32*> [#uses=2]
+ br label %bb89.fragment
+
+bb89.fragment: ; preds = %bb89
+ %Opq.sa.calc962 = add i32 %Opq.sa.calc677, -188 ; <i32> [#uses=3]
+ %211 = load i32* %210, align 4 ; <i32> [#uses=3]
+ br i1 %203, label %bb90, label %meshBB408
+
+bb90: ; preds = %bb89.fragment
+ %Opq.sa.calc680 = xor i32 %Opq.sa.calc962, 92 ; <i32> [#uses=1]
+ %212 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=2]
+ store i32 %211, i32* %212, align 4
+ %213 = getelementptr %struct.Macroblock* %2, i64 %3, i32 28 ; <i32*> [#uses=2]
+ br label %bb90.fragment
+
+bb90.fragment: ; preds = %bb90
+ %Opq.sa.calc773 = sub i32 %Opq.sa.calc680, 60 ; <i32> [#uses=3]
+ %Opq.sa.calc772 = add i32 %Opq.sa.calc773, -25 ; <i32> [#uses=2]
+ %214 = load i32* %213, align 4 ; <i32> [#uses=3]
+ store i32 %214, i32* %.SV52.phi1190, align 4
+ %215 = load i32* %213, align 4 ; <i32> [#uses=1]
+ %216 = icmp eq i32 %215, 0 ; <i1> [#uses=1]
+ br i1 %216, label %meshBB416, label %meshBB368
+
+bb91: ; preds = %meshBB368
+ %Opq.sa.calc683 = sub i32 %Opq.sa.calc768, -7 ; <i32> [#uses=0]
+ %217 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %218 = getelementptr %struct.ImageParameters* %217, i64 0, i32 39 ; <%struct.Macroblock**> [#uses=1]
+ %219 = load %struct.Macroblock** %218, align 8 ; <%struct.Macroblock*> [#uses=1]
+ %220 = load i32* %.SV170.phi, align 4 ; <i32> [#uses=1]
+ br label %bb91.fragment
+
+bb91.fragment: ; preds = %bb91
+ %Opq.sa.calc853 = xor i32 %Opq.sa.calc768, 8 ; <i32> [#uses=1]
+ %221 = sext i32 %220 to i64 ; <i64> [#uses=1]
+ %222 = getelementptr %struct.Macroblock* %219, i64 %221, i32 20 ; <i32*> [#uses=1]
+ %223 = load i32* %222, align 4 ; <i32> [#uses=1]
+ %224 = icmp eq i32 %223, 0 ; <i1> [#uses=1]
+ br i1 %224, label %bb92, label %bb96
+
+bb92: ; preds = %bb91.fragment
+ %Opq.sa.calc686 = xor i32 %Opq.sa.calc853, 2 ; <i32> [#uses=1]
+ %225 = add i32 %.SV172.phi, 1 ; <i32> [#uses=1]
+ br label %bb92.fragment
+
+bb92.fragment: ; preds = %bb92
+ %Opq.sa.calc1005 = xor i32 %Opq.sa.calc686, 130 ; <i32> [#uses=2]
+ store i32 %225, i32* %.SV176.phi, align 4
+ %226 = shl i32 %yN, 1 ; <i32> [#uses=1]
+ br label %meshBB380
+
+bb95: ; preds = %meshBB408
+ %Opq.sa.calc689 = xor i32 %Opq.sa.calc912, 207 ; <i32> [#uses=3]
+ %227 = add i32 %.SV172.phi1074, 1 ; <i32> [#uses=1]
+ %228 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ br label %meshBB384
+
+bb95.fragment: ; preds = %meshBB384
+ %Opq.sa.calc841 = sub i32 %Opq.sa.calc901, 76 ; <i32> [#uses=0]
+ store i32 %.SV306.phi, i32* %.SV308.phi, align 4
+ %229 = getelementptr %struct.Macroblock* %.load.SV.phi, i64 %.load20.SV.phi, i32 28 ; <i32*> [#uses=1]
+ %230 = load i32* %229, align 4 ; <i32> [#uses=2]
+ store i32 %230, i32* %.load53.SV.phi, align 4
+ br label %bb96
+
+bb96: ; preds = %meshBB444, %meshBB440, %meshBB436, %meshBB424, %meshBB420, %meshBB416, %meshBB396, %meshBB388, %meshBB380, %meshBB376, %meshBB364, %meshBB356, %meshBB340, %meshBB324, %meshBB, %bb95.fragment, %bb91.fragment, %bb74.fragment, %bb51, %bb48, %bb43, %bb41.fragment, %bb37.fragment, %bb36.fragment, %bb34.fragment, %bb30.fragment, %bb25, %bb19.fragment, %bb16.fragment, %bb15.fragment, %bb11.fragment, %bb9.fragment, %bb8.fragment, %bb7.fragment
+ %.SV38.phi1087 = phi i64 [ %.SV38.phi1224, %meshBB444 ], [ %.SV38.phi1210, %meshBB440 ], [ %.SV38.phi1147, %meshBB436 ], [ %.SV38.phi1197, %meshBB424 ], [ %.SV38.phi1194, %meshBB420 ], [ %.SV38.phi1201, %meshBB416 ], [ %.SV38.phi, %meshBB396 ], [ %.SV38.phi1118, %meshBB388 ], [ %.SV38.phi1207, %meshBB380 ], [ %.SV38.phi1153, %meshBB376 ], [ %.SV38.phi1098, %meshBB364 ], [ %.SV38.phi1121, %meshBB356 ], [ %.SV38.phi1167, %meshBB340 ], [ %.SV38.phi1175, %meshBB324 ], [ %.SV38.phi1183, %meshBB ], [ %.SV38.phi1164, %bb91.fragment ], [ %.SV38.phi1179, %bb48 ], [ %.SV38.phi1231, %bb41.fragment ], [ %.SV38.phi1172, %bb25 ], [ %.SV38.phi1175, %bb15.fragment ], [ %.SV38.phi1164, %bb9.fragment ], [ %.SV38.phi1164, %bb8.fragment ], [ %.SV38.phi1221, %bb95.fragment ], [ %.SV38.phi1187, %bb74.fragment ], [ %.SV38.phi1227, %bb51 ], [ %.SV38.phi1179, %bb43 ], [ %.SV38.phi1103, %bb37.fragment ], [ %.SV38.phi1214, %bb36.fragment ], [ %.SV38.phi1227, %bb34.fragment ], [ %.SV38.phi1121, %bb30.fragment ], [ %.SV38.phi1187, %bb19.fragment ], [ %.SV38.phi1175, %bb16.fragment ], [ %.SV38.phi1204, %bb11.fragment ], [ %.SV38.phi1118, %bb7.fragment ] ; <i64> [#uses=2]
+ %.SV68.phi1086 = phi i32 [ %.SV68.phi1223, %meshBB444 ], [ %.SV68.phi1209, %meshBB440 ], [ %.SV68.phi1146, %meshBB436 ], [ %.SV68.phi1196, %meshBB424 ], [ %.SV68.phi1193, %meshBB420 ], [ %.SV68.phi1199, %meshBB416 ], [ %.SV68.phi, %meshBB396 ], [ %.SV68.phi1117, %meshBB388 ], [ %.SV68.phi1206, %meshBB380 ], [ %.SV68.phi1152, %meshBB376 ], [ %.SV68.phi1096, %meshBB364 ], [ %.SV68.phi1120, %meshBB356 ], [ %.SV68.phi1166, %meshBB340 ], [ %.SV68.phi1174, %meshBB324 ], [ %.SV68.phi1181, %meshBB ], [ %.SV68.phi1162, %bb91.fragment ], [ %.SV68.phi1177, %bb48 ], [ %.SV68.phi1229, %bb41.fragment ], [ %.SV68.phi1169, %bb25 ], [ %.SV68.phi1174, %bb15.fragment ], [ %.SV68.phi1162, %bb9.fragment ], [ %.SV68.phi1162, %bb8.fragment ], [ %.SV68.phi1220, %bb95.fragment ], [ %.SV68.phi1185, %bb74.fragment ], [ %.SV68.phi1226, %bb51 ], [ %.SV68.phi1177, %bb43 ], [ %.SV68.phi1100, %bb37.fragment ], [ %.SV68.phi1212, %bb36.fragment ], [ %.SV68.phi1226, %bb34.fragment ], [ %.SV68.phi1120, %bb30.fragment ], [ %.SV68.phi1185, %bb19.fragment ], [ %.SV68.phi1174, %bb16.fragment ], [ %.SV68.phi1203, %bb11.fragment ], [ %.SV68.phi1117, %bb7.fragment ] ; <i32> [#uses=2]
+ %.SV70.phi1085 = phi i32 [ %.SV70.phi1222, %meshBB444 ], [ %.SV70.phi1208, %meshBB440 ], [ %.SV70.phi1145, %meshBB436 ], [ %.SV70.phi1195, %meshBB424 ], [ %.SV70.phi1192, %meshBB420 ], [ %.SV70.phi1198, %meshBB416 ], [ %.SV70.phi, %meshBB396 ], [ %.SV70.phi1116, %meshBB388 ], [ %.SV70.phi1205, %meshBB380 ], [ %.SV70.phi1151, %meshBB376 ], [ %.SV70.phi1095, %meshBB364 ], [ %.SV70.phi1119, %meshBB356 ], [ %.SV70.phi1165, %meshBB340 ], [ %.SV70.phi1173, %meshBB324 ], [ %.SV70.phi1180, %meshBB ], [ %.SV70.phi1161, %bb91.fragment ], [ %.SV70.phi1176, %bb48 ], [ %.SV70.phi1228, %bb41.fragment ], [ %.SV70.phi1168, %bb25 ], [ %.SV70.phi1173, %bb15.fragment ], [ %.SV70.phi1161, %bb9.fragment ], [ %.SV70.phi1161, %bb8.fragment ], [ %.SV70.phi1219, %bb95.fragment ], [ %.SV70.phi1184, %bb74.fragment ], [ %.SV70.phi1225, %bb51 ], [ %.SV70.phi1176, %bb43 ], [ %.SV70.phi1099, %bb37.fragment ], [ %.SV70.phi1211, %bb36.fragment ], [ %.SV70.phi1225, %bb34.fragment ], [ %.SV70.phi1119, %bb30.fragment ], [ %.SV70.phi1184, %bb19.fragment ], [ %.SV70.phi1173, %bb16.fragment ], [ %.SV70.phi1202, %bb11.fragment ], [ %.SV70.phi1116, %bb7.fragment ] ; <i32> [#uses=2]
+ %.SV.phi = phi i32 [ %.SV.phi1048, %meshBB444 ], [ %.SV.phi1056, %meshBB440 ], [ %.SV.phi1067, %meshBB436 ], [ %.SV.phi1072, %meshBB424 ], [ %.SV.phi1044, %meshBB420 ], [ %.SV.phi1076, %meshBB416 ], [ %.SV.phi1065, %meshBB396 ], [ %.SV.phi1054, %meshBB388 ], [ %.SV.phi1052, %meshBB380 ], [ %.SV.phi1050, %meshBB376 ], [ %.SV.phi1062, %meshBB364 ], [ %.SV.phi1046, %meshBB356 ], [ %.SV.phi1042, %meshBB340 ], [ %.SV.phi1032, %meshBB324 ], [ %.SV.phi1034, %meshBB ], [ %.SV178.phi, %bb91.fragment ], [ %.SV118.phi1040, %bb48 ], [ %.SV118.phi1125, %bb41.fragment ], [ %.SV118.phi, %bb25 ], [ %.load94.SV.phi, %bb15.fragment ], [ %32, %bb9.fragment ], [ %32, %bb8.fragment ], [ %230, %bb95.fragment ], [ %187, %bb74.fragment ], [ %.SV118.phi1081, %bb51 ], [ %.SV118.phi1040, %bb43 ], [ %.load131.SV.phi, %bb37.fragment ], [ %.SV118.phi1154, %bb36.fragment ], [ %.load129.SV.phi, %bb34.fragment ], [ %.SV118.phi1158, %bb30.fragment ], [ %66, %bb19.fragment ], [ %.SV93.phi, %bb16.fragment ], [ %.load84.SV.phi, %bb11.fragment ], [ %27, %bb7.fragment ] ; <i32> [#uses=1]
+ %yM.0.SV.phi = phi i32 [ -1, %meshBB444 ], [ %yN, %meshBB440 ], [ %yM.0.SV.phi1066, %meshBB436 ], [ %yN, %meshBB424 ], [ %yN, %meshBB420 ], [ -1, %meshBB416 ], [ -1, %meshBB396 ], [ %yM.0.SV.phi1053, %meshBB388 ], [ %yM.0.SV.phi1051, %meshBB380 ], [ %yM.0.SV.phi1049, %meshBB376 ], [ %yN, %meshBB364 ], [ %yN, %meshBB356 ], [ %yM.0.SV.phi1041, %meshBB340 ], [ -1, %meshBB324 ], [ -1, %meshBB ], [ %yN, %bb91.fragment ], [ -1, %bb48 ], [ %yN, %bb41.fragment ], [ -1, %bb25 ], [ %yN, %bb15.fragment ], [ %yN, %bb9.fragment ], [ -1, %bb8.fragment ], [ %yN, %bb95.fragment ], [ %yN, %bb74.fragment ], [ %133, %bb51 ], [ %118, %bb43 ], [ %107, %bb37.fragment ], [ %104, %bb36.fragment ], [ %yN, %bb34.fragment ], [ %91, %bb30.fragment ], [ %yN, %bb19.fragment ], [ %62, %bb16.fragment ], [ %45, %bb11.fragment ], [ %yN, %bb7.fragment ] ; <i32> [#uses=2]
+ %Opq.sa.calc693 = add i32 0, 15 ; <i32> [#uses=2]
+ %Opq.sa.calc692 = xor i32 %Opq.sa.calc693, 8 ; <i32> [#uses=1]
+ %231 = icmp eq i32 %.SV.phi, 0 ; <i1> [#uses=1]
+ br i1 %231, label %bb97, label %meshBB404
+
+bb97: ; preds = %meshBB424, %meshBB408, %meshBB352, %bb96, %bb21
+ %.SV38.phi1150 = phi i64 [ %.SV38.phi1197, %meshBB424 ], [ %.SV38.phi1218, %meshBB408 ], [ %.SV38.phi1140, %meshBB352 ], [ %.SV38.phi1087, %bb96 ], [ %4, %bb21 ] ; <i64> [#uses=1]
+ %.SV68.phi1149 = phi i32 [ %.SV68.phi1196, %meshBB424 ], [ %.SV68.phi1216, %meshBB408 ], [ %.SV68.phi1139, %meshBB352 ], [ %.SV68.phi1086, %bb96 ], [ %.SV68.phi1021, %bb21 ] ; <i32> [#uses=1]
+ %.SV70.phi1148 = phi i32 [ %.SV70.phi1195, %meshBB424 ], [ %.SV70.phi1215, %meshBB408 ], [ %.SV70.phi1138, %meshBB352 ], [ %.SV70.phi1085, %bb96 ], [ %.SV70.phi1027, %bb21 ] ; <i32> [#uses=1]
+ %yM.0.reg2mem.0.SV.phi = phi i32 [ -1, %meshBB424 ], [ -1, %meshBB408 ], [ -1, %meshBB352 ], [ %yM.0.SV.phi, %bb96 ], [ -1, %bb21 ] ; <i32> [#uses=1]
+ %Opq.sa.calc694 = xor i32 0, 243 ; <i32> [#uses=1]
+ %232 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %233 = getelementptr %struct.ImageParameters* %232, i64 0, i32 45 ; <i32*> [#uses=1]
+ br label %bb97.fragment
+
+bb97.fragment: ; preds = %bb97
+ %Opq.sa.calc928 = xor i32 %Opq.sa.calc694, 128 ; <i32> [#uses=1]
+ %234 = load i32* %233, align 4 ; <i32> [#uses=1]
+ %235 = icmp eq i32 %234, 0 ; <i1> [#uses=1]
+ br i1 %235, label %return, label %bb98
+
+bb98: ; preds = %meshBB444, %meshBB404, %bb97.fragment, %bb81, %bb78.fragment
+ %.SV38.phi1093 = phi i64 [ %.SV38.phi1224, %meshBB444 ], [ %.SV38.phi1017, %meshBB404 ], [ %.SV38.phi1150, %bb97.fragment ], [ %.SV38.phi1137, %bb81 ], [ %.SV38.phi1201, %bb78.fragment ] ; <i64> [#uses=2]
+ %.SV68.phi1092 = phi i32 [ %.SV68.phi1223, %meshBB444 ], [ %.SV68.phi1023, %meshBB404 ], [ %.SV68.phi1149, %bb97.fragment ], [ %.SV68.phi1135, %bb81 ], [ %.SV68.phi1199, %bb78.fragment ] ; <i32> [#uses=2]
+ %.SV70.phi1091 = phi i32 [ %.SV70.phi1222, %meshBB444 ], [ %.SV70.phi1028, %meshBB404 ], [ %.SV70.phi1148, %bb97.fragment ], [ %.SV70.phi1134, %bb81 ], [ %.SV70.phi1198, %bb78.fragment ] ; <i32> [#uses=2]
+ %yM.0.reg2mem.1.SV.phi1068 = phi i32 [ %yN, %meshBB444 ], [ %yM.0.reg2mem.1.SV.phi1077, %meshBB404 ], [ %yM.0.reg2mem.0.SV.phi, %bb97.fragment ], [ %yN, %bb81 ], [ %197, %bb78.fragment ] ; <i32> [#uses=1]
+ %Opq.sa.calc695 = xor i32 0, 23 ; <i32> [#uses=2]
+ %236 = and i32 %.SV70.phi1091, %xN ; <i32> [#uses=1]
+ %237 = getelementptr %struct.PixelPos* %pix, i64 0, i32 2 ; <i32*> [#uses=2]
+ store i32 %236, i32* %237, align 4
+ %238 = and i32 %yM.0.reg2mem.1.SV.phi1068, %.SV68.phi1092 ; <i32> [#uses=1]
+ %239 = getelementptr %struct.PixelPos* %pix, i64 0, i32 3 ; <i32*> [#uses=2]
+ store i32 %238, i32* %239, align 4
+ %240 = getelementptr %struct.PixelPos* %pix, i64 0, i32 5 ; <i32*> [#uses=1]
+ br label %meshBB376
+
+bb98.fragment: ; preds = %meshBB376
+ %Opq.sa.calc1008 = sub i32 %Opq.link.mask911, 13 ; <i32> [#uses=1]
+ %241 = getelementptr %struct.PixelPos* %pix, i64 0, i32 4 ; <i32*> [#uses=4]
+ %242 = getelementptr %struct.PixelPos* %pix, i64 0, i32 1 ; <i32*> [#uses=1]
+ %243 = load i32* %242, align 4 ; <i32> [#uses=1]
+ %244 = load void (i32, i32*, i32*)** @get_mb_block_pos, align 8 ; <void (i32, i32*, i32*)*> [#uses=1]
+ tail call void %244(i32 %243, i32* %241, i32* %.SV317.phi) nounwind
+ %245 = load i32* %241, align 4 ; <i32> [#uses=1]
+ %246 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %247 = getelementptr %struct.ImageParameters* %246, i64 0, i32 119, i64 %.load39.SV.phi, i64 0 ; <i32*> [#uses=1]
+ %248 = load i32* %247, align 4 ; <i32> [#uses=1]
+ %249 = mul i32 %248, %245 ; <i32> [#uses=2]
+ store i32 %249, i32* %241, align 4
+ br label %bb98.fragment183
+
+bb98.fragment183: ; preds = %bb98.fragment
+ %Opq.sa.calc777 = sub i32 %Opq.sa.calc1008, -158 ; <i32> [#uses=1]
+ %Opq.sa.calc776 = sub i32 %Opq.sa.calc777, 46 ; <i32> [#uses=0]
+ %250 = load i32* %.SV317.phi, align 4 ; <i32> [#uses=1]
+ %251 = load %struct.ImageParameters** @img, align 8 ; <%struct.ImageParameters*> [#uses=1]
+ %252 = getelementptr %struct.ImageParameters* %251, i64 0, i32 119, i64 %.load39.SV.phi, i64 1 ; <i32*> [#uses=1]
+ %253 = load i32* %252, align 4 ; <i32> [#uses=1]
+ %254 = mul i32 %253, %250 ; <i32> [#uses=1]
+ %255 = load i32* %.SV313.phi, align 4 ; <i32> [#uses=1]
+ %256 = add i32 %255, %249 ; <i32> [#uses=1]
+ store i32 %256, i32* %241, align 4
+ %257 = load i32* %.SV315.phi, align 4 ; <i32> [#uses=1]
+ %258 = add i32 %257, %254 ; <i32> [#uses=1]
+ store i32 %258, i32* %.SV317.phi, align 4
+ ret void
+
+return: ; preds = %meshBB448, %meshBB396, %bb97.fragment
+ %Opq.link.SV697.phi = phi i32 [ %Opq.sa.calc957, %meshBB448 ], [ %Opq.sa.calc758, %meshBB396 ], [ %Opq.sa.calc928, %bb97.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask699 = and i32 %Opq.link.SV697.phi, 0 ; <i32> [#uses=1]
+ %Opq.sa.calc696 = add i32 %Opq.link.mask699, 238 ; <i32> [#uses=0]
+ ret void
+
+meshBB: ; preds = %bb33.fragment, %bb14.fragment
+ %.SV38.phi1183 = phi i64 [ %.SV38.phi1115, %bb14.fragment ], [ %.SV38.phi1172, %bb33.fragment ] ; <i64> [#uses=3]
+ %.SV68.phi1181 = phi i32 [ %.SV68.phi1112, %bb14.fragment ], [ %.SV68.phi1169, %bb33.fragment ] ; <i32> [#uses=3]
+ %.SV70.phi1180 = phi i32 [ %.SV70.phi1111, %bb14.fragment ], [ %.SV70.phi1168, %bb33.fragment ] ; <i32> [#uses=3]
+ %.SV104.phi1084 = phi i32 [ undef, %bb14.fragment ], [ %.SV104.phi, %bb33.fragment ] ; <i32> [#uses=1]
+ %.SV111.phi1083 = phi i32* [ undef, %bb14.fragment ], [ %.SV111.phi, %bb33.fragment ] ; <i32*> [#uses=1]
+ %.SV118.phi1082 = phi i32 [ undef, %bb14.fragment ], [ %.SV118.phi, %bb33.fragment ] ; <i32> [#uses=2]
+ %.SV.phi1034 = phi i32 [ %50, %bb14.fragment ], [ undef, %bb33.fragment ] ; <i32> [#uses=1]
+ %meshStackVariable.phi = phi i32 [ %Opq.sa.calc723, %bb14.fragment ], [ %Opq.sa.calc712, %bb33.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV829.phi = phi i32 [ %Opq.sa.calc723, %bb14.fragment ], [ %Opq.sa.calc534, %bb33.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask831 = and i32 %Opq.link.SV829.phi, 0 ; <i32> [#uses=1]
+ %Opq.sa.calc828 = sub i32 %Opq.link.mask831, -117 ; <i32> [#uses=2]
+ %meshCmp = icmp eq i32 %meshStackVariable.phi, 3 ; <i1> [#uses=1]
+ br i1 %meshCmp, label %bb35, label %bb96
+
+meshBB324: ; preds = %bb32, %bb15
+ %.SV38.phi1175 = phi i64 [ %.SV38.phi1172, %bb32 ], [ %.SV38.phi1115, %bb15 ] ; <i64> [#uses=3]
+ %.SV68.phi1174 = phi i32 [ %.SV68.phi1169, %bb32 ], [ %.SV68.phi1112, %bb15 ] ; <i32> [#uses=3]
+ %.SV70.phi1173 = phi i32 [ %.SV70.phi1168, %bb32 ], [ %.SV70.phi1111, %bb15 ] ; <i32> [#uses=3]
+ %.load94.SV.phi = phi i32 [ undef, %bb32 ], [ %50, %bb15 ] ; <i32> [#uses=1]
+ %.SV212.phi = phi %struct.Macroblock* [ undef, %bb32 ], [ %55, %bb15 ] ; <%struct.Macroblock*> [#uses=1]
+ %.SV214.phi = phi i32 [ undef, %bb32 ], [ %56, %bb15 ] ; <i32> [#uses=1]
+ %meshStackVariable325.phi = phi i32 [ %Opq.sa.calc531, %bb32 ], [ %Opq.sa.calc496, %bb15 ] ; <i32> [#uses=1]
+ %Opq.link.SV751.phi = phi i32 [ %Opq.sa.calc512, %bb32 ], [ %Opq.sa.calc723, %bb15 ] ; <i32> [#uses=1]
+ %.SV.phi1032 = phi i32 [ %.SV118.phi, %bb32 ], [ undef, %bb15 ] ; <i32> [#uses=1]
+ %.SV93.phi = phi i32 [ undef, %bb32 ], [ %50, %bb15 ] ; <i32> [#uses=1]
+ %.SV91.phi = phi i32* [ undef, %bb32 ], [ %48, %bb15 ] ; <i32*> [#uses=1]
+ %.SV87.phi = phi i32 [ undef, %bb32 ], [ %47, %bb15 ] ; <i32> [#uses=1]
+ %Opq.link.mask753 = and i32 %Opq.link.SV751.phi, 4 ; <i32> [#uses=1]
+ %Opq.sa.calc750 = add i32 %Opq.link.mask753, 203 ; <i32> [#uses=1]
+ %meshCmp327 = icmp eq i32 %meshStackVariable325.phi, 14 ; <i1> [#uses=1]
+ br i1 %meshCmp327, label %bb15.fragment, label %bb96
+
+meshBB328: ; preds = %bb50, %bb34
+ %.SV38.phi1227 = phi i64 [ %.SV38.phi1179, %bb50 ], [ %.SV38.phi1172, %bb34 ] ; <i64> [#uses=2]
+ %.SV68.phi1226 = phi i32 [ %.SV68.phi1177, %bb50 ], [ %.SV68.phi1169, %bb34 ] ; <i32> [#uses=2]
+ %.SV70.phi1225 = phi i32 [ %.SV70.phi1176, %bb50 ], [ %.SV70.phi1168, %bb34 ] ; <i32> [#uses=2]
+ %.SV118.phi1081 = phi i32 [ %.SV118.phi1040, %bb50 ], [ %.SV118.phi, %bb34 ] ; <i32> [#uses=1]
+ %.load129.SV.phi = phi i32 [ undef, %bb50 ], [ %.SV118.phi, %bb34 ] ; <i32> [#uses=1]
+ %.load116.SV.phi = phi i32* [ undef, %bb50 ], [ %.SV111.phi, %bb34 ] ; <i32*> [#uses=1]
+ %.SV238.phi = phi i32 [ undef, %bb50 ], [ %100, %bb34 ] ; <i32> [#uses=1]
+ %meshStackVariable329.phi = phi i32 [ %Opq.sa.calc577, %bb50 ], [ %Opq.sa.calc537, %bb34 ] ; <i32> [#uses=1]
+ %Opq.link.SV788.phi = phi i32 [ %Opq.sa.calc577, %bb50 ], [ %Opq.sa.calc712, %bb34 ] ; <i32> [#uses=1]
+ %Opq.link.mask790 = and i32 %Opq.link.SV788.phi, 1 ; <i32> [#uses=1]
+ %Opq.sa.calc787 = sub i32 %Opq.link.mask790, -227 ; <i32> [#uses=2]
+ %meshCmp331 = icmp eq i32 %meshStackVariable329.phi, 11 ; <i1> [#uses=1]
+ br i1 %meshCmp331, label %bb34.fragment, label %bb51
+
+meshBB332: ; preds = %bb44, %bb11
+ %.SV38.phi1204 = phi i64 [ %.SV38.phi1231, %bb44 ], [ %.SV38.phi1164, %bb11 ] ; <i64> [#uses=2]
+ %.SV68.phi1203 = phi i32 [ %.SV68.phi1229, %bb44 ], [ %.SV68.phi1162, %bb11 ] ; <i32> [#uses=2]
+ %.SV70.phi1202 = phi i32 [ %.SV70.phi1228, %bb44 ], [ %.SV70.phi1161, %bb11 ] ; <i32> [#uses=2]
+ %.load127.SV.phi = phi i32 [ %.SV118.phi1125, %bb44 ], [ undef, %bb11 ] ; <i32> [#uses=1]
+ %.load114.SV.phi = phi i32* [ %.SV111.phi1126, %bb44 ], [ undef, %bb11 ] ; <i32*> [#uses=1]
+ %.load46.SV.phi = phi i32 [ %.SV43.phi1230, %bb44 ], [ undef, %bb11 ] ; <i32> [#uses=1]
+ %.SV248.phi = phi i32 [ %119, %bb44 ], [ undef, %bb11 ] ; <i32> [#uses=1]
+ %.load84.SV.phi = phi i32 [ undef, %bb44 ], [ %32, %bb11 ] ; <i32> [#uses=1]
+ %.load81.SV.phi = phi i32* [ undef, %bb44 ], [ %.SV80.phi, %bb11 ] ; <i32*> [#uses=1]
+ %.load50.SV.phi = phi i32 [ undef, %bb44 ], [ %.SV43.phi1163, %bb11 ] ; <i32> [#uses=1]
+ %.SV206.phi = phi i32 [ undef, %bb44 ], [ %43, %bb11 ] ; <i32> [#uses=1]
+ %meshStackVariable333.phi = phi i32 [ %Opq.sa.calc566, %bb44 ], [ %Opq.sa.calc485, %bb11 ] ; <i32> [#uses=1]
+ %Opq.link.SV857.phi = phi i32 [ %Opq.sa.calc987, %bb44 ], [ %Opq.sa.calc485, %bb11 ] ; <i32> [#uses=1]
+ %Opq.link.mask859 = and i32 %Opq.link.SV857.phi, 4 ; <i32> [#uses=2]
+ %Opq.sa.calc856 = add i32 %Opq.link.mask859, 204 ; <i32> [#uses=2]
+ %meshCmp335 = icmp eq i32 %meshStackVariable333.phi, 4 ; <i1> [#uses=1]
+ br i1 %meshCmp335, label %bb11.fragment, label %bb44.fragment
+
+meshBB336: ; preds = %bb85, %bb40
+ %.SV52.phi1234 = phi i32* [ %.SV52.phi1213, %bb85 ], [ undef, %bb40 ] ; <i32*> [#uses=1]
+ %.SV38.phi1231 = phi i64 [ %.SV38.phi1214, %bb85 ], [ %.SV38.phi1179, %bb40 ] ; <i64> [#uses=4]
+ %.SV43.phi1230 = phi i32 [ undef, %bb85 ], [ %.SV43.phi1178, %bb40 ] ; <i32> [#uses=3]
+ %.SV68.phi1229 = phi i32 [ %.SV68.phi1212, %bb85 ], [ %.SV68.phi1177, %bb40 ] ; <i32> [#uses=4]
+ %.SV70.phi1228 = phi i32 [ %.SV70.phi1211, %bb85 ], [ %.SV70.phi1176, %bb40 ] ; <i32> [#uses=4]
+ %.SV99.phi1128 = phi i32* [ undef, %bb85 ], [ %.SV99.phi1037, %bb40 ] ; <i32*> [#uses=1]
+ %.SV104.phi1127 = phi i32 [ undef, %bb85 ], [ %.SV104.phi1036, %bb40 ] ; <i32> [#uses=2]
+ %.SV111.phi1126 = phi i32* [ undef, %bb85 ], [ %.SV111.phi1035, %bb40 ] ; <i32*> [#uses=2]
+ %.SV118.phi1125 = phi i32 [ undef, %bb85 ], [ %.SV118.phi1040, %bb40 ] ; <i32> [#uses=3]
+ %meshStackVariable337.phi = phi i32 [ %Opq.sa.calc665, %bb85 ], [ %Opq.sa.calc553, %bb40 ] ; <i32> [#uses=1]
+ %Opq.link.SV980.phi = phi i32 [ %Opq.sa.calc667, %bb85 ], [ %Opq.sa.calc554, %bb40 ] ; <i32> [#uses=1]
+ %Opq.link.mask982 = and i32 %Opq.link.SV980.phi, 1 ; <i32> [#uses=1]
+ %Opq.sa.calc979 = sub i32 %Opq.link.mask982, -153 ; <i32> [#uses=2]
+ %meshCmp339 = icmp eq i32 %meshStackVariable337.phi, 4 ; <i1> [#uses=1]
+ br i1 %meshCmp339, label %bb41, label %bb86
+
+meshBB340: ; preds = %bb29, %bb26
+ %.SV38.phi1167 = phi i64 [ %.SV38.phi1121, %bb29 ], [ %.SV38.phi1172, %bb26 ] ; <i64> [#uses=3]
+ %.SV68.phi1166 = phi i32 [ %.SV68.phi1120, %bb29 ], [ %.SV68.phi1169, %bb26 ] ; <i32> [#uses=3]
+ %.SV70.phi1165 = phi i32 [ %.SV70.phi1119, %bb29 ], [ %.SV70.phi1168, %bb26 ] ; <i32> [#uses=3]
+ %.SV104.phi1080 = phi i32 [ undef, %bb29 ], [ %.SV104.phi, %bb26 ] ; <i32> [#uses=1]
+ %.SV111.phi1079 = phi i32* [ undef, %bb29 ], [ %.SV111.phi, %bb26 ] ; <i32*> [#uses=1]
+ %.SV118.phi1078 = phi i32 [ %.SV118.phi1158, %bb29 ], [ %.SV118.phi, %bb26 ] ; <i32> [#uses=1]
+ %.load123.SV.phi = phi i32 [ undef, %bb29 ], [ %.SV118.phi, %bb26 ] ; <i32> [#uses=2]
+ %.SV228.phi = phi %struct.Macroblock* [ undef, %bb29 ], [ %81, %bb26 ] ; <%struct.Macroblock*> [#uses=1]
+ %.SV230.phi = phi i32 [ undef, %bb29 ], [ %82, %bb26 ] ; <i32> [#uses=1]
+ %meshStackVariable341.phi = phi i32 [ %Opq.sa.calc525, %bb29 ], [ %Opq.sa.calc518, %bb26 ] ; <i32> [#uses=1]
+ %Opq.link.SV755.phi = phi i32 [ %Opq.sa.calc525, %bb29 ], [ %Opq.sa.calc519, %bb26 ] ; <i32> [#uses=1]
+ %.SV.phi1042 = phi i32 [ %.SV118.phi1158, %bb29 ], [ undef, %bb26 ] ; <i32> [#uses=1]
+ %yM.0.SV.phi1041 = phi i32 [ %89, %bb29 ], [ undef, %bb26 ] ; <i32> [#uses=1]
+ %Opq.link.mask757 = and i32 %Opq.link.SV755.phi, 12 ; <i32> [#uses=1]
+ %Opq.sa.calc754 = add i32 %Opq.link.mask757, 225 ; <i32> [#uses=2]
+ %meshCmp343 = icmp eq i32 %meshStackVariable341.phi, 9 ; <i1> [#uses=1]
+ br i1 %meshCmp343, label %bb26.fragment, label %bb96
+
+meshBB344: ; preds = %bb68, %bb23.fragment182
+ %.SV38.phi1172 = phi i64 [ %.SV38.phi1115, %bb23.fragment182 ], [ %.SV38.phi1098, %bb68 ] ; <i64> [#uses=8]
+ %.SV52.phi1170 = phi i32* [ undef, %bb23.fragment182 ], [ %.SV52.phi1097, %bb68 ] ; <i32*> [#uses=2]
+ %.SV68.phi1169 = phi i32 [ %.SV68.phi1112, %bb23.fragment182 ], [ %.SV68.phi1096, %bb68 ] ; <i32> [#uses=8]
+ %.SV70.phi1168 = phi i32 [ %.SV70.phi1111, %bb23.fragment182 ], [ %.SV70.phi1095, %bb68 ] ; <i32> [#uses=8]
+ %.load144.SV.phi = phi i1 [ undef, %bb23.fragment182 ], [ %145, %bb68 ] ; <i1> [#uses=1]
+ %.SV274.phi = phi i32* [ undef, %bb23.fragment182 ], [ %167, %bb68 ] ; <i32*> [#uses=2]
+ %.SV118.phi = phi i32 [ %76, %bb23.fragment182 ], [ undef, %bb68 ] ; <i32> [#uses=7]
+ %.SV135.phi = phi i1 [ %78, %bb23.fragment182 ], [ undef, %bb68 ] ; <i1> [#uses=2]
+ %meshStackVariable345.phi = phi i32 [ %Opq.sa.calc743, %bb23.fragment182 ], [ %Opq.sa.calc624, %bb68 ] ; <i32> [#uses=1]
+ %Opq.link.SV717.phi = phi i32 [ %Opq.sa.calc744, %bb23.fragment182 ], [ %Opq.sa.calc624, %bb68 ] ; <i32> [#uses=1]
+ %Opq.link.SV720.phi = phi i32 [ %Opq.sa.calc743, %bb23.fragment182 ], [ %Opq.sa.calc624, %bb68 ] ; <i32> [#uses=1]
+ %.SV96.phi = phi i1 [ %71, %bb23.fragment182 ], [ undef, %bb68 ] ; <i1> [#uses=1]
+ %.SV99.phi = phi i32* [ %72, %bb23.fragment182 ], [ undef, %bb68 ] ; <i32*> [#uses=2]
+ %.SV104.phi = phi i32 [ %73, %bb23.fragment182 ], [ undef, %bb68 ] ; <i32> [#uses=3]
+ %.SV111.phi = phi i32* [ %74, %bb23.fragment182 ], [ undef, %bb68 ] ; <i32*> [#uses=3]
+ %Opq.link.mask722 = and i32 %Opq.link.SV720.phi, 9 ; <i32> [#uses=3]
+ %Opq.link.mask719 = and i32 %Opq.link.SV717.phi, 0 ; <i32> [#uses=1]
+ %Opq.sa.calc715 = sub i32 %Opq.link.mask719, %Opq.link.mask722 ; <i32> [#uses=1]
+ %Opq.sa.calc716 = sub i32 %Opq.sa.calc715, -101 ; <i32> [#uses=2]
+ %meshCmp347 = icmp eq i32 %meshStackVariable345.phi, 9 ; <i1> [#uses=1]
+ br i1 %meshCmp347, label %bb68.fragment, label %bb24
+
+meshBB348: ; preds = %bb37, %bb6
+ %.SV38.phi1103 = phi i64 [ %.SV38.phi1014, %bb6 ], [ %.SV38.phi1019, %bb37 ] ; <i64> [#uses=2]
+ %.SV43.phi1102 = phi i32 [ %.SV43.phi, %bb6 ], [ %.SV43.phi1018, %bb37 ] ; <i32> [#uses=1]
+ %.SV52.phi1101 = phi i32* [ %.SV52.phi, %bb6 ], [ undef, %bb37 ] ; <i32*> [#uses=1]
+ %.SV68.phi1100 = phi i32 [ %.SV68.phi1020, %bb6 ], [ %.SV68.phi1025, %bb37 ] ; <i32> [#uses=2]
+ %.SV70.phi1099 = phi i32 [ %.SV70.phi1026, %bb6 ], [ %.SV70.phi1233, %bb37 ] ; <i32> [#uses=2]
+ %.load131.SV.phi = phi i32 [ undef, %bb6 ], [ %.SV118.phi1155, %bb37 ] ; <i32> [#uses=1]
+ %.load115.SV.phi = phi i32* [ undef, %bb6 ], [ %.SV111.phi1156, %bb37 ] ; <i32*> [#uses=1]
+ %.load48.SV.phi = phi i32 [ undef, %bb6 ], [ %.SV43.phi1018, %bb37 ] ; <i32> [#uses=1]
+ %.SV242.phi = phi i32 [ undef, %bb6 ], [ %105, %bb37 ] ; <i32> [#uses=1]
+ %meshStackVariable349.phi = phi i32 [ %Opq.sa.calc473, %bb6 ], [ %Opq.sa.calc547, %bb37 ] ; <i32> [#uses=1]
+ %Opq.link.SV806.phi = phi i32 [ %Opq.sa.calc873, %bb6 ], [ %Opq.sa.calc958, %bb37 ] ; <i32> [#uses=1]
+ %Opq.link.mask808 = and i32 %Opq.link.SV806.phi, 12 ; <i32> [#uses=1]
+ %Opq.sa.calc805 = sub i32 %Opq.link.mask808, -147 ; <i32> [#uses=3]
+ %meshCmp351 = icmp eq i32 %meshStackVariable349.phi, 13 ; <i1> [#uses=1]
+ br i1 %meshCmp351, label %bb37.fragment, label %bb8
+
+meshBB352: ; preds = %bb79, %bb71
+ %.SV38.phi1140 = phi i64 [ %.SV38.phi1110, %bb71 ], [ %.SV38.phi1098, %bb79 ] ; <i64> [#uses=2]
+ %.SV68.phi1139 = phi i32 [ %.SV68.phi1108, %bb71 ], [ %.SV68.phi1096, %bb79 ] ; <i32> [#uses=2]
+ %.SV70.phi1138 = phi i32 [ %.SV70.phi1107, %bb71 ], [ %.SV70.phi1095, %bb79 ] ; <i32> [#uses=2]
+ %.load166.SV.phi = phi i32 [ %.SV164.phi1104, %bb71 ], [ undef, %bb79 ] ; <i32> [#uses=1]
+ %.load163.SV.phi = phi i32* [ %.SV162.phi1105, %bb71 ], [ undef, %bb79 ] ; <i32*> [#uses=1]
+ %.SV282.phi = phi i32 [ %182, %bb71 ], [ undef, %bb79 ] ; <i32> [#uses=1]
+ %meshStackVariable353.phi = phi i32 [ %Opq.sa.calc633, %bb71 ], [ %Opq.sa.calc650, %bb79 ] ; <i32> [#uses=1]
+ %Opq.link.SV877.phi = phi i32 [ %Opq.sa.calc820, %bb71 ], [ %Opq.sa.calc650, %bb79 ] ; <i32> [#uses=1]
+ %Opq.link.mask879 = and i32 %Opq.link.SV877.phi, 1 ; <i32> [#uses=1]
+ %Opq.sa.calc876 = add i32 %Opq.link.mask879, 18 ; <i32> [#uses=1]
+ %meshCmp355 = icmp eq i32 %meshStackVariable353.phi, 11 ; <i1> [#uses=1]
+ br i1 %meshCmp355, label %bb97, label %bb71.fragment
+
+meshBB356: ; preds = %bb70.fragment, %bb26.fragment
+ %.SV104.phi1160 = phi i32 [ undef, %bb70.fragment ], [ %.SV104.phi1080, %bb26.fragment ] ; <i32> [#uses=1]
+ %.SV111.phi1159 = phi i32* [ undef, %bb70.fragment ], [ %.SV111.phi1079, %bb26.fragment ] ; <i32*> [#uses=1]
+ %.SV118.phi1158 = phi i32 [ undef, %bb70.fragment ], [ %.SV118.phi1078, %bb26.fragment ] ; <i32> [#uses=3]
+ %.SV38.phi1121 = phi i64 [ %.SV38.phi1014, %bb70.fragment ], [ %.SV38.phi1167, %bb26.fragment ] ; <i64> [#uses=3]
+ %.SV68.phi1120 = phi i32 [ %.SV68.phi1020, %bb70.fragment ], [ %.SV68.phi1166, %bb26.fragment ] ; <i32> [#uses=3]
+ %.SV70.phi1119 = phi i32 [ %.SV70.phi1026, %bb70.fragment ], [ %.SV70.phi1165, %bb26.fragment ] ; <i32> [#uses=3]
+ %.SV.phi1046 = phi i32 [ %.load165.SV.phi, %bb70.fragment ], [ %.load123.SV.phi, %bb26.fragment ] ; <i32> [#uses=1]
+ %meshStackVariable357.phi = phi i32 [ %Opq.sa.calc738, %bb70.fragment ], [ %Opq.sa.calc917, %bb26.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV984.phi = phi i32 [ %Opq.sa.calc738, %bb70.fragment ], [ %Opq.sa.calc918, %bb26.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask986 = and i32 %Opq.link.SV984.phi, 9 ; <i32> [#uses=1]
+ %Opq.sa.calc983 = xor i32 %Opq.link.mask986, 251 ; <i32> [#uses=1]
+ %meshCmp359 = icmp eq i32 %meshStackVariable357.phi, 9 ; <i1> [#uses=1]
+ br i1 %meshCmp359, label %bb28, label %bb96
+
+meshBB360: ; preds = %bb21, %bb13
+ %.SV38.phi1115 = phi i64 [ %4, %bb21 ], [ %.SV38.phi1014, %bb13 ] ; <i64> [#uses=5]
+ %.SV52.phi1113 = phi i32* [ %.SV52.phi1022, %bb21 ], [ %.SV52.phi, %bb13 ] ; <i32*> [#uses=3]
+ %.SV68.phi1112 = phi i32 [ %.SV68.phi1021, %bb21 ], [ %.SV68.phi1020, %bb13 ] ; <i32> [#uses=5]
+ %.SV70.phi1111 = phi i32 [ %.SV70.phi1027, %bb21 ], [ %.SV70.phi1026, %bb13 ] ; <i32> [#uses=5]
+ %.load74.SV.phi = phi i1 [ undef, %bb21 ], [ %21, %bb13 ] ; <i1> [#uses=1]
+ %.SV208.phi = phi i32* [ undef, %bb21 ], [ %46, %bb13 ] ; <i32*> [#uses=2]
+ %meshStackVariable361.phi = phi i32 [ %Opq.sa.calc505, %bb21 ], [ %Opq.sa.calc489, %bb13 ] ; <i32> [#uses=1]
+ %Opq.link.SV867.phi = phi i32 [ %Opq.sa.calc505, %bb21 ], [ %Opq.sa.calc873, %bb13 ] ; <i32> [#uses=1]
+ %Opq.link.mask869 = and i32 %Opq.link.SV867.phi, 1 ; <i32> [#uses=1]
+ %Opq.sa.calc866 = add i32 %Opq.link.mask869, 148 ; <i32> [#uses=4]
+ %meshCmp363 = icmp eq i32 %meshStackVariable361.phi, 16 ; <i1> [#uses=1]
+ br i1 %meshCmp363, label %bb13.fragment, label %bb23
+
+meshBB364: ; preds = %bb65.fragment, %bb56
+ %.SV38.phi1098 = phi i64 [ %.SV38.phi1017, %bb56 ], [ %.SV38.phi1147, %bb65.fragment ] ; <i64> [#uses=11]
+ %.SV52.phi1097 = phi i32* [ %.SV52.phi1024, %bb56 ], [ undef, %bb65.fragment ] ; <i32*> [#uses=8]
+ %.SV68.phi1096 = phi i32 [ %.SV68.phi1023, %bb56 ], [ %.SV68.phi1146, %bb65.fragment ] ; <i32> [#uses=11]
+ %.SV70.phi1095 = phi i32 [ %.SV70.phi1028, %bb56 ], [ %.SV70.phi1145, %bb65.fragment ] ; <i32> [#uses=11]
+ %or.cond.not.SV.phi1094 = phi i1 [ %or.cond.not.SV.phi1029, %bb56 ], [ undef, %bb65.fragment ] ; <i1> [#uses=1]
+ %.SV.phi1062 = phi i32 [ undef, %bb56 ], [ %.SV268.phi, %bb65.fragment ] ; <i32> [#uses=1]
+ %.not4.SV.phi = phi i1 [ %.not4, %bb56 ], [ undef, %bb65.fragment ] ; <i1> [#uses=1]
+ %.SV256.phi = phi i1 [ %139, %bb56 ], [ undef, %bb65.fragment ] ; <i1> [#uses=1]
+ %meshStackVariable365.phi = phi i32 [ %Opq.sa.calc592, %bb56 ], [ %Opq.sa.calc832, %bb65.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV735.phi = phi i32 [ %Opq.sa.calc592, %bb56 ], [ %Opq.sa.calc832, %bb65.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask737 = and i32 %Opq.link.SV735.phi, 0 ; <i32> [#uses=2]
+ %Opq.sa.calc734 = sub i32 %Opq.link.mask737, -242 ; <i32> [#uses=0]
+ %meshCmp367 = icmp eq i32 %meshStackVariable365.phi, 1 ; <i1> [#uses=1]
+ br i1 %meshCmp367, label %bb96, label %bb56.fragment
+
+meshBB368: ; preds = %bb90.fragment, %bb8
+ %.SV38.phi1164 = phi i64 [ %.SV38.phi1103, %bb8 ], [ %.SV38.phi1191, %bb90.fragment ] ; <i64> [#uses=5]
+ %.SV43.phi1163 = phi i32 [ %.SV43.phi1102, %bb8 ], [ undef, %bb90.fragment ] ; <i32> [#uses=1]
+ %.SV68.phi1162 = phi i32 [ %.SV68.phi1100, %bb8 ], [ %.SV68.phi1189, %bb90.fragment ] ; <i32> [#uses=5]
+ %.SV70.phi1161 = phi i32 [ %.SV70.phi1099, %bb8 ], [ %.SV70.phi1188, %bb90.fragment ] ; <i32> [#uses=5]
+ %.SV178.phi = phi i32 [ undef, %bb8 ], [ %214, %bb90.fragment ] ; <i32> [#uses=2]
+ %.SV176.phi = phi i32* [ undef, %bb8 ], [ %212, %bb90.fragment ] ; <i32*> [#uses=1]
+ %.SV170.phi = phi i32* [ undef, %bb8 ], [ %210, %bb90.fragment ] ; <i32*> [#uses=1]
+ %.SV172.phi = phi i32 [ undef, %bb8 ], [ %211, %bb90.fragment ] ; <i32> [#uses=1]
+ %.SV76.phi = phi i32* [ %28, %bb8 ], [ undef, %bb90.fragment ] ; <i32*> [#uses=1]
+ %.SV78.phi = phi i32 [ %29, %bb8 ], [ undef, %bb90.fragment ] ; <i32> [#uses=1]
+ %.SV80.phi = phi i32* [ %30, %bb8 ], [ undef, %bb90.fragment ] ; <i32*> [#uses=1]
+ %.load66.SV.phi = phi i32* [ %.SV52.phi1101, %bb8 ], [ undef, %bb90.fragment ] ; <i32*> [#uses=1]
+ %.load35.SV.phi = phi i64 [ %3, %bb8 ], [ undef, %bb90.fragment ] ; <i64> [#uses=1]
+ %.load16.SV.phi = phi %struct.Macroblock* [ %2, %bb8 ], [ undef, %bb90.fragment ] ; <%struct.Macroblock*> [#uses=1]
+ %.SV198.phi = phi i32 [ %29, %bb8 ], [ undef, %bb90.fragment ] ; <i32> [#uses=1]
+ %.SV200.phi = phi i32* [ %30, %bb8 ], [ undef, %bb90.fragment ] ; <i32*> [#uses=1]
+ %meshStackVariable369.phi = phi i32 [ %Opq.sa.calc479, %bb8 ], [ %Opq.sa.calc772, %bb90.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV769.phi = phi i32 [ %Opq.sa.calc805, %bb8 ], [ %Opq.sa.calc772, %bb90.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask771 = and i32 %Opq.link.SV769.phi, 2 ; <i32> [#uses=1]
+ %Opq.sa.calc768 = xor i32 %Opq.link.mask771, 135 ; <i32> [#uses=3]
+ %meshCmp371 = icmp eq i32 %meshStackVariable369.phi, 2 ; <i1> [#uses=1]
+ br i1 %meshCmp371, label %bb91, label %bb8.fragment
+
+meshBB372: ; preds = %bb84.fragment, %bb35
+ %.SV38.phi1214 = phi i64 [ %.SV38.phi1191, %bb84.fragment ], [ %.SV38.phi1183, %bb35 ] ; <i64> [#uses=3]
+ %.SV52.phi1213 = phi i32* [ %.SV52.phi1190, %bb84.fragment ], [ undef, %bb35 ] ; <i32*> [#uses=2]
+ %.SV68.phi1212 = phi i32 [ %.SV68.phi1189, %bb84.fragment ], [ %.SV68.phi1181, %bb35 ] ; <i32> [#uses=3]
+ %.SV70.phi1211 = phi i32 [ %.SV70.phi1188, %bb84.fragment ], [ %.SV70.phi1180, %bb35 ] ; <i32> [#uses=3]
+ %.SV118.phi1154 = phi i32 [ undef, %bb84.fragment ], [ %.SV118.phi1082, %bb35 ] ; <i32> [#uses=1]
+ %.SV167.phi = phi i1 [ %203, %bb84.fragment ], [ undef, %bb35 ] ; <i1> [#uses=1]
+ %meshStackVariable373.phi = phi i32 [ %Opq.sa.calc802, %bb84.fragment ], [ %Opq.sa.calc540, %bb35 ] ; <i32> [#uses=1]
+ %Opq.link.SV813.phi = phi i32 [ %Opq.sa.calc802, %bb84.fragment ], [ %Opq.sa.calc541, %bb35 ] ; <i32> [#uses=1]
+ %Opq.link.mask815 = and i32 %Opq.link.SV813.phi, 0 ; <i32> [#uses=1]
+ %Opq.sa.calc812 = sub i32 %Opq.link.mask815, -121 ; <i32> [#uses=3]
+ %meshCmp375 = icmp eq i32 %meshStackVariable373.phi, 6 ; <i1> [#uses=1]
+ br i1 %meshCmp375, label %bb36, label %bb85
+
+meshBB376: ; preds = %bb98, %bb44.fragment
+ %.SV38.phi1153 = phi i64 [ %.SV38.phi1093, %bb98 ], [ %.SV38.phi1204, %bb44.fragment ] ; <i64> [#uses=1]
+ %.SV68.phi1152 = phi i32 [ %.SV68.phi1092, %bb98 ], [ %.SV68.phi1203, %bb44.fragment ] ; <i32> [#uses=1]
+ %.SV70.phi1151 = phi i32 [ %.SV70.phi1091, %bb98 ], [ %.SV70.phi1202, %bb44.fragment ] ; <i32> [#uses=1]
+ %.load39.SV.phi = phi i64 [ %.SV38.phi1093, %bb98 ], [ undef, %bb44.fragment ] ; <i64> [#uses=2]
+ %.SV313.phi = phi i32* [ %237, %bb98 ], [ undef, %bb44.fragment ] ; <i32*> [#uses=1]
+ %.SV315.phi = phi i32* [ %239, %bb98 ], [ undef, %bb44.fragment ] ; <i32*> [#uses=1]
+ %.SV317.phi = phi i32* [ %240, %bb98 ], [ undef, %bb44.fragment ] ; <i32*> [#uses=3]
+ %.SV.phi1050 = phi i32 [ undef, %bb98 ], [ %.load127.SV.phi, %bb44.fragment ] ; <i32> [#uses=1]
+ %yM.0.SV.phi1049 = phi i32 [ undef, %bb98 ], [ %121, %bb44.fragment ] ; <i32> [#uses=1]
+ %meshStackVariable377.phi = phi i32 [ %Opq.sa.calc695, %bb98 ], [ %Opq.sa.calc894, %bb44.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV909.phi = phi i32 [ %Opq.sa.calc695, %bb98 ], [ %Opq.sa.calc856, %bb44.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask911 = and i32 %Opq.link.SV909.phi, 16 ; <i32> [#uses=2]
+ %Opq.sa.calc908 = add i32 %Opq.link.mask911, -11 ; <i32> [#uses=0]
+ %meshCmp379 = icmp eq i32 %meshStackVariable377.phi, 8 ; <i1> [#uses=1]
+ br i1 %meshCmp379, label %bb96, label %bb98.fragment
+
+meshBB380: ; preds = %bb92.fragment, %bb49.fragment
+ %.SV38.phi1207 = phi i64 [ %.SV38.phi1164, %bb92.fragment ], [ %.SV38.phi1179, %bb49.fragment ] ; <i64> [#uses=2]
+ %.SV68.phi1206 = phi i32 [ %.SV68.phi1162, %bb92.fragment ], [ %.SV68.phi1177, %bb49.fragment ] ; <i32> [#uses=2]
+ %.SV70.phi1205 = phi i32 [ %.SV70.phi1161, %bb92.fragment ], [ %.SV70.phi1176, %bb49.fragment ] ; <i32> [#uses=2]
+ %.SV104.phi1124 = phi i32 [ undef, %bb92.fragment ], [ %.SV104.phi1036, %bb49.fragment ] ; <i32> [#uses=1]
+ %.SV111.phi1123 = phi i32* [ undef, %bb92.fragment ], [ %.SV111.phi1035, %bb49.fragment ] ; <i32*> [#uses=1]
+ %.SV118.phi1122 = phi i32 [ undef, %bb92.fragment ], [ %.SV118.phi1040, %bb49.fragment ] ; <i32> [#uses=1]
+ %meshStackVariable381.phi = phi i32 [ %Opq.sa.calc1005, %bb92.fragment ], [ %Opq.sa.calc860, %bb49.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV947.phi = phi i32 [ %Opq.sa.calc1005, %bb92.fragment ], [ %Opq.sa.calc860, %bb49.fragment ] ; <i32> [#uses=1]
+ %.SV.phi1052 = phi i32 [ %.SV178.phi, %bb92.fragment ], [ undef, %bb49.fragment ] ; <i32> [#uses=1]
+ %yM.0.SV.phi1051 = phi i32 [ %226, %bb92.fragment ], [ undef, %bb49.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask949 = and i32 %Opq.link.SV947.phi, 1 ; <i32> [#uses=1]
+ %Opq.sa.calc946 = sub i32 %Opq.link.mask949, -4 ; <i32> [#uses=1]
+ %meshCmp383 = icmp eq i32 %meshStackVariable381.phi, 1 ; <i1> [#uses=1]
+ br i1 %meshCmp383, label %bb54, label %bb96
+
+meshBB384: ; preds = %bb95, %bb52
+ %.SV38.phi1221 = phi i64 [ %.SV38.phi1179, %bb52 ], [ %.SV38.phi1218, %bb95 ] ; <i64> [#uses=2]
+ %.SV68.phi1220 = phi i32 [ %.SV68.phi1177, %bb52 ], [ %.SV68.phi1216, %bb95 ] ; <i32> [#uses=2]
+ %.SV70.phi1219 = phi i32 [ %.SV70.phi1176, %bb52 ], [ %.SV70.phi1215, %bb95 ] ; <i32> [#uses=2]
+ %.load53.SV.phi = phi i32* [ undef, %bb52 ], [ %.SV52.phi1217, %bb95 ] ; <i32*> [#uses=1]
+ %.load20.SV.phi = phi i64 [ undef, %bb52 ], [ %3, %bb95 ] ; <i64> [#uses=1]
+ %.load.SV.phi = phi %struct.Macroblock* [ undef, %bb52 ], [ %2, %bb95 ] ; <%struct.Macroblock*> [#uses=1]
+ %.SV306.phi = phi i32 [ undef, %bb52 ], [ %227, %bb95 ] ; <i32> [#uses=1]
+ %.SV308.phi = phi i32* [ undef, %bb52 ], [ %228, %bb95 ] ; <i32*> [#uses=1]
+ %.load126.SV.phi = phi i32 [ %.SV118.phi1040, %bb52 ], [ undef, %bb95 ] ; <i32> [#uses=1]
+ %.load44.SV.phi = phi i32 [ %.SV43.phi1178, %bb52 ], [ undef, %bb95 ] ; <i32> [#uses=1]
+ %meshStackVariable385.phi = phi i32 [ %Opq.sa.calc583, %bb52 ], [ %Opq.sa.calc689, %bb95 ] ; <i32> [#uses=1]
+ %Opq.link.SV902.phi = phi i32 [ %Opq.sa.calc860, %bb52 ], [ %Opq.sa.calc689, %bb95 ] ; <i32> [#uses=1]
+ %Opq.link.SV905.phi = phi i32 [ %Opq.sa.calc584, %bb52 ], [ %Opq.sa.calc689, %bb95 ] ; <i32> [#uses=1]
+ %Opq.link.mask907 = and i32 %Opq.link.SV905.phi, 0 ; <i32> [#uses=0]
+ %Opq.link.mask904 = and i32 %Opq.link.SV902.phi, 1 ; <i32> [#uses=1]
+ %Opq.sa.calc901 = xor i32 %Opq.link.mask904, 227 ; <i32> [#uses=3]
+ %meshCmp387 = icmp eq i32 %meshStackVariable385.phi, 5 ; <i1> [#uses=1]
+ br i1 %meshCmp387, label %bb95.fragment, label %bb52.fragment
+
+meshBB388: ; preds = %bb52.fragment, %bb7
+ %.SV38.phi1118 = phi i64 [ %.SV38.phi1014, %bb7 ], [ %.SV38.phi1221, %bb52.fragment ] ; <i64> [#uses=2]
+ %.SV68.phi1117 = phi i32 [ %.SV68.phi1020, %bb7 ], [ %.SV68.phi1220, %bb52.fragment ] ; <i32> [#uses=2]
+ %.SV70.phi1116 = phi i32 [ %.SV70.phi1026, %bb7 ], [ %.SV70.phi1219, %bb52.fragment ] ; <i32> [#uses=2]
+ %.SV.phi1054 = phi i32 [ undef, %bb7 ], [ %.load126.SV.phi, %bb52.fragment ] ; <i32> [#uses=1]
+ %yM.0.SV.phi1053 = phi i32 [ undef, %bb7 ], [ %137, %bb52.fragment ] ; <i32> [#uses=1]
+ %.load67.SV.phi = phi i32* [ %.SV52.phi, %bb7 ], [ undef, %bb52.fragment ] ; <i32*> [#uses=1]
+ %.load36.SV.phi = phi i64 [ %3, %bb7 ], [ undef, %bb52.fragment ] ; <i64> [#uses=1]
+ %.load17.SV.phi = phi %struct.Macroblock* [ %2, %bb7 ], [ undef, %bb52.fragment ] ; <%struct.Macroblock*> [#uses=1]
+ %.SV194.phi = phi i32 [ %24, %bb7 ], [ undef, %bb52.fragment ] ; <i32> [#uses=1]
+ %.SV196.phi = phi i32* [ %25, %bb7 ], [ undef, %bb52.fragment ] ; <i32*> [#uses=1]
+ %meshStackVariable389.phi = phi i32 [ %Opq.sa.calc476, %bb7 ], [ %Opq.sa.calc844, %bb52.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV887.phi = phi i32 [ %Opq.sa.calc873, %bb7 ], [ %Opq.sa.calc901, %bb52.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask889 = and i32 %Opq.link.SV887.phi, 64 ; <i32> [#uses=1]
+ %Opq.sa.calc886 = sub i32 %Opq.link.mask889, -170 ; <i32> [#uses=2]
+ %meshCmp391 = icmp eq i32 %meshStackVariable389.phi, 12 ; <i1> [#uses=1]
+ br i1 %meshCmp391, label %bb96, label %bb7.fragment
+
+meshBB392: ; preds = %bb4, %entry
+ %meshStackVariable393.phi = phi i32 [ %Opq.sa.calc466, %bb4 ], [ %Opq.sa.calc, %entry ] ; <i32> [#uses=1]
+ %Opq.link.SV922.phi = phi i32 [ %Opq.sa.calc462, %bb4 ], [ %Opq.sa.calc, %entry ] ; <i32> [#uses=1]
+ %or.cond.not.SV.phi = phi i1 [ %or.cond.not, %bb4 ], [ undef, %entry ] ; <i1> [#uses=1]
+ %.SV70.phi1027 = phi i32 [ %12, %bb4 ], [ undef, %entry ] ; <i32> [#uses=2]
+ %.SV52.phi1022 = phi i32* [ %9, %bb4 ], [ undef, %entry ] ; <i32*> [#uses=1]
+ %.SV68.phi1021 = phi i32 [ %10, %bb4 ], [ undef, %entry ] ; <i32> [#uses=2]
+ %.SV43.phi1015 = phi i32 [ %8, %bb4 ], [ undef, %entry ] ; <i32> [#uses=3]
+ %Opq.link.mask924 = and i32 %Opq.link.SV922.phi, 2 ; <i32> [#uses=1]
+ %Opq.sa.calc921 = add i32 %Opq.link.mask924, 57 ; <i32> [#uses=3]
+ %meshCmp395 = icmp eq i32 %meshStackVariable393.phi, 2 ; <i1> [#uses=1]
+ br i1 %meshCmp395, label %entry.fragment, label %bb21
+
+meshBB396: ; preds = %bb69.fragment, %bb.fragment
+ %.SV.phi1065 = phi i32 [ undef, %bb.fragment ], [ %171, %bb69.fragment ] ; <i32> [#uses=1]
+ %meshStackVariable397.phi = phi i32 [ %Opq.sa.calc976, %bb.fragment ], [ %Opq.sa.calc995, %bb69.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV759.phi = phi i32 [ %Opq.sa.calc976, %bb.fragment ], [ %Opq.sa.calc995, %bb69.fragment ] ; <i32> [#uses=1]
+ %.SV70.phi = phi i32 [ %12, %bb.fragment ], [ %.SV70.phi1168, %bb69.fragment ] ; <i32> [#uses=1]
+ %.SV68.phi = phi i32 [ %10, %bb.fragment ], [ %.SV68.phi1169, %bb69.fragment ] ; <i32> [#uses=1]
+ %.SV38.phi = phi i64 [ %4, %bb.fragment ], [ %.SV38.phi1172, %bb69.fragment ] ; <i64> [#uses=1]
+ %Opq.link.mask761 = and i32 %Opq.link.SV759.phi, 6 ; <i32> [#uses=1]
+ %Opq.sa.calc758 = add i32 %Opq.link.mask761, 53 ; <i32> [#uses=1]
+ %meshCmp399 = icmp eq i32 %meshStackVariable397.phi, 6 ; <i1> [#uses=1]
+ br i1 %meshCmp399, label %bb96, label %return
+
+meshBB400: ; preds = %bb84, %bb69.fragment
+ %.SV38.phi1191 = phi i64 [ %.SV38.phi1098, %bb84 ], [ %.SV38.phi1172, %bb69.fragment ] ; <i64> [#uses=5]
+ %.SV52.phi1190 = phi i32* [ %.SV52.phi1097, %bb84 ], [ undef, %bb69.fragment ] ; <i32*> [#uses=3]
+ %.SV68.phi1189 = phi i32 [ %.SV68.phi1096, %bb84 ], [ %.SV68.phi1169, %bb69.fragment ] ; <i32> [#uses=5]
+ %.SV70.phi1188 = phi i32 [ %.SV70.phi1095, %bb84 ], [ %.SV70.phi1168, %bb69.fragment ] ; <i32> [#uses=5]
+ %.SV290.phi = phi i32 [ %200, %bb84 ], [ undef, %bb69.fragment ] ; <i32> [#uses=1]
+ %.SV164.phi = phi i32 [ undef, %bb84 ], [ %171, %bb69.fragment ] ; <i32> [#uses=2]
+ %meshStackVariable401.phi = phi i32 [ %Opq.sa.calc661, %bb84 ], [ %Opq.sa.calc996, %bb69.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV825.phi = phi i32 [ %Opq.sa.calc658, %bb84 ], [ %Opq.sa.calc996, %bb69.fragment ] ; <i32> [#uses=1]
+ %.SV162.phi = phi i32* [ undef, %bb84 ], [ %169, %bb69.fragment ] ; <i32*> [#uses=1]
+ %.SV156.phi = phi i32* [ undef, %bb84 ], [ %.SV274.phi, %bb69.fragment ] ; <i32*> [#uses=1]
+ %.SV158.phi = phi i32 [ undef, %bb84 ], [ %168, %bb69.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask827 = and i32 %Opq.link.SV825.phi, 4 ; <i32> [#uses=1]
+ %Opq.sa.calc824 = xor i32 %Opq.link.mask827, 228 ; <i32> [#uses=2]
+ %meshCmp403 = icmp eq i32 %meshStackVariable401.phi, 15 ; <i1> [#uses=1]
+ br i1 %meshCmp403, label %bb70, label %bb84.fragment
+
+meshBB404: ; preds = %bb96, %bb3
+ %yM.0.reg2mem.1.SV.phi1077 = phi i32 [ %yM.0.SV.phi, %bb96 ], [ undef, %bb3 ] ; <i32> [#uses=1]
+ %meshStackVariable405.phi = phi i32 [ %Opq.sa.calc692, %bb96 ], [ %Opq.sa.calc461, %bb3 ] ; <i32> [#uses=1]
+ %Opq.link.SV940.phi = phi i32 [ %Opq.sa.calc693, %bb96 ], [ %Opq.sa.calc461, %bb3 ] ; <i32> [#uses=1]
+ %or.cond.not.SV.phi1029 = phi i1 [ undef, %bb96 ], [ %or.cond.not, %bb3 ] ; <i1> [#uses=1]
+ %.SV70.phi1028 = phi i32 [ %.SV70.phi1085, %bb96 ], [ %12, %bb3 ] ; <i32> [#uses=2]
+ %.SV52.phi1024 = phi i32* [ undef, %bb96 ], [ %9, %bb3 ] ; <i32*> [#uses=1]
+ %.SV68.phi1023 = phi i32 [ %.SV68.phi1086, %bb96 ], [ %10, %bb3 ] ; <i32> [#uses=2]
+ %.SV38.phi1017 = phi i64 [ %.SV38.phi1087, %bb96 ], [ %4, %bb3 ] ; <i64> [#uses=2]
+ %.SV40.phi = phi i32 [ undef, %bb96 ], [ %6, %bb3 ] ; <i32> [#uses=1]
+ %Opq.link.mask942 = and i32 %Opq.link.SV940.phi, 6 ; <i32> [#uses=1]
+ %Opq.sa.calc939 = sub i32 %Opq.link.mask942, -87 ; <i32> [#uses=1]
+ %meshCmp407 = icmp eq i32 %meshStackVariable405.phi, 6 ; <i1> [#uses=1]
+ br i1 %meshCmp407, label %bb56, label %bb98
+
+meshBB408: ; preds = %bb89.fragment, %bb87
+ %.SV38.phi1218 = phi i64 [ %.SV38.phi1191, %bb89.fragment ], [ %.SV38.phi1210, %bb87 ] ; <i64> [#uses=2]
+ %.SV52.phi1217 = phi i32* [ %.SV52.phi1190, %bb89.fragment ], [ %.SV52.phi1235, %bb87 ] ; <i32*> [#uses=1]
+ %.SV68.phi1216 = phi i32 [ %.SV68.phi1189, %bb89.fragment ], [ %.SV68.phi1209, %bb87 ] ; <i32> [#uses=2]
+ %.SV70.phi1215 = phi i32 [ %.SV70.phi1188, %bb89.fragment ], [ %.SV70.phi1208, %bb87 ] ; <i32> [#uses=2]
+ %.SV172.phi1074 = phi i32 [ %211, %bb89.fragment ], [ undef, %bb87 ] ; <i32> [#uses=1]
+ %meshStackVariable409.phi = phi i32 [ %Opq.sa.calc962, %bb89.fragment ], [ %Opq.sa.calc673, %bb87 ] ; <i32> [#uses=1]
+ %Opq.link.SV913.phi = phi i32 [ %Opq.sa.calc962, %bb89.fragment ], [ %Opq.sa.calc990, %bb87 ] ; <i32> [#uses=1]
+ %Opq.link.mask915 = and i32 %Opq.link.SV913.phi, 9 ; <i32> [#uses=1]
+ %Opq.sa.calc912 = xor i32 %Opq.link.mask915, 195 ; <i32> [#uses=1]
+ %meshCmp411 = icmp eq i32 %meshStackVariable409.phi, 1 ; <i1> [#uses=1]
+ br i1 %meshCmp411, label %bb97, label %bb95
+
+meshBB412: ; preds = %bb68.fragment, %bb13.fragment
+ %.SV38.phi1187 = phi i64 [ %.SV38.phi1115, %bb13.fragment ], [ %.SV38.phi1172, %bb68.fragment ] ; <i64> [#uses=2]
+ %.SV52.phi1186 = phi i32* [ %.SV52.phi1113, %bb13.fragment ], [ %.SV52.phi1170, %bb68.fragment ] ; <i32*> [#uses=2]
+ %.SV68.phi1185 = phi i32 [ %.SV68.phi1112, %bb13.fragment ], [ %.SV68.phi1169, %bb68.fragment ] ; <i32> [#uses=2]
+ %.SV70.phi1184 = phi i32 [ %.SV70.phi1111, %bb13.fragment ], [ %.SV70.phi1168, %bb68.fragment ] ; <i32> [#uses=2]
+ %.SV158.phi1063 = phi i32 [ undef, %bb13.fragment ], [ %168, %bb68.fragment ] ; <i32> [#uses=1]
+ %.SV87.phi1030 = phi i32 [ %47, %bb13.fragment ], [ undef, %bb68.fragment ] ; <i32> [#uses=1]
+ %meshStackVariable413.phi = phi i32 [ %Opq.sa.calc870, %bb13.fragment ], [ %Opq.sa.calc784, %bb68.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV933.phi = phi i32 [ %Opq.sa.calc870, %bb13.fragment ], [ %Opq.link.mask722, %bb68.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV936.phi = phi i32 [ %Opq.sa.calc866, %bb13.fragment ], [ %Opq.sa.calc784, %bb68.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask938 = and i32 %Opq.link.SV936.phi, 4 ; <i32> [#uses=1]
+ %Opq.link.mask935 = and i32 %Opq.link.SV933.phi, 0 ; <i32> [#uses=1]
+ %Opq.sa.calc931 = sub i32 %Opq.link.mask935, %Opq.link.mask938 ; <i32> [#uses=1]
+ %Opq.sa.calc932 = xor i32 %Opq.sa.calc931, -51 ; <i32> [#uses=3]
+ %meshCmp415 = icmp eq i32 %meshStackVariable413.phi, 6 ; <i1> [#uses=1]
+ br i1 %meshCmp415, label %bb74, label %bb19
+
+meshBB416: ; preds = %bb90.fragment, %bb77
+ %.SV38.phi1201 = phi i64 [ %.SV38.phi1191, %bb90.fragment ], [ %.SV38.phi1098, %bb77 ] ; <i64> [#uses=2]
+ %.SV52.phi1200 = phi i32* [ undef, %bb90.fragment ], [ %.SV52.phi1097, %bb77 ] ; <i32*> [#uses=1]
+ %.SV68.phi1199 = phi i32 [ %.SV68.phi1189, %bb90.fragment ], [ %.SV68.phi1096, %bb77 ] ; <i32> [#uses=2]
+ %.SV70.phi1198 = phi i32 [ %.SV70.phi1188, %bb90.fragment ], [ %.SV70.phi1095, %bb77 ] ; <i32> [#uses=2]
+ %.SV.phi1076 = phi i32 [ %214, %bb90.fragment ], [ undef, %bb77 ] ; <i32> [#uses=1]
+ %meshStackVariable417.phi = phi i32 [ %Opq.sa.calc773, %bb90.fragment ], [ %Opq.sa.calc643, %bb77 ] ; <i32> [#uses=1]
+ %Opq.link.SV973.phi = phi i32 [ %Opq.sa.calc773, %bb90.fragment ], [ %Opq.sa.calc640, %bb77 ] ; <i32> [#uses=1]
+ %Opq.link.mask975 = and i32 %Opq.link.SV973.phi, 10 ; <i32> [#uses=1]
+ %Opq.sa.calc972 = xor i32 %Opq.link.mask975, 110 ; <i32> [#uses=1]
+ %Opq.sa.calc971 = add i32 %Opq.sa.calc972, -19 ; <i32> [#uses=1]
+ %meshCmp419 = icmp eq i32 %meshStackVariable417.phi, 12 ; <i1> [#uses=1]
+ br i1 %meshCmp419, label %bb78, label %bb96
+
+meshBB420: ; preds = %bb66, %bb26.fragment
+ %.SV38.phi1194 = phi i64 [ %.SV38.phi1098, %bb66 ], [ %.SV38.phi1167, %bb26.fragment ] ; <i64> [#uses=2]
+ %.SV68.phi1193 = phi i32 [ %.SV68.phi1096, %bb66 ], [ %.SV68.phi1166, %bb26.fragment ] ; <i32> [#uses=2]
+ %.SV70.phi1192 = phi i32 [ %.SV70.phi1095, %bb66 ], [ %.SV70.phi1165, %bb26.fragment ] ; <i32> [#uses=2]
+ %.load61.SV.phi = phi i32* [ %.SV52.phi1097, %bb66 ], [ undef, %bb26.fragment ] ; <i32*> [#uses=1]
+ %.SV270.phi = phi i32 [ %165, %bb66 ], [ undef, %bb26.fragment ] ; <i32> [#uses=1]
+ %.SV272.phi = phi i32* [ %166, %bb66 ], [ undef, %bb26.fragment ] ; <i32*> [#uses=1]
+ %.SV.phi1044 = phi i32 [ undef, %bb66 ], [ %.load123.SV.phi, %bb26.fragment ] ; <i32> [#uses=1]
+ %meshStackVariable421.phi = phi i32 [ %Opq.sa.calc621, %bb66 ], [ %Opq.sa.calc918, %bb26.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV838.phi = phi i32 [ %Opq.sa.calc602, %bb66 ], [ %Opq.sa.calc918, %bb26.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask840 = and i32 %Opq.link.SV838.phi, 9 ; <i32> [#uses=2]
+ %Opq.sa.calc837 = sub i32 %Opq.link.mask840, -202 ; <i32> [#uses=2]
+ %Opq.sa.calc835 = sub i32 %Opq.sa.calc837, %Opq.link.mask840 ; <i32> [#uses=1]
+ %Opq.sa.calc836 = xor i32 %Opq.sa.calc835, 176 ; <i32> [#uses=0]
+ %meshCmp423 = icmp eq i32 %meshStackVariable421.phi, 9 ; <i1> [#uses=1]
+ br i1 %meshCmp423, label %bb96, label %bb66.fragment
+
+meshBB424: ; preds = %bb86.fragment, %bb83
+ %.SV38.phi1197 = phi i64 [ %.SV38.phi1231, %bb86.fragment ], [ %.SV38.phi1098, %bb83 ] ; <i64> [#uses=2]
+ %.SV68.phi1196 = phi i32 [ %.SV68.phi1229, %bb86.fragment ], [ %.SV68.phi1096, %bb83 ] ; <i32> [#uses=2]
+ %.SV70.phi1195 = phi i32 [ %.SV70.phi1228, %bb86.fragment ], [ %.SV70.phi1095, %bb83 ] ; <i32> [#uses=2]
+ %.SV.phi1072 = phi i32 [ %209, %bb86.fragment ], [ undef, %bb83 ] ; <i32> [#uses=1]
+ %meshStackVariable425.phi = phi i32 [ %Opq.sa.calc943, %bb86.fragment ], [ %Opq.sa.calc658, %bb83 ] ; <i32> [#uses=1]
+ %Opq.link.SV951.phi = phi i32 [ %Opq.sa.calc943, %bb86.fragment ], [ %Opq.sa.calc1002, %bb83 ] ; <i32> [#uses=1]
+ %Opq.link.mask953 = and i32 %Opq.link.SV951.phi, 12 ; <i32> [#uses=1]
+ %Opq.sa.calc950 = sub i32 %Opq.link.mask953, -208 ; <i32> [#uses=0]
+ %meshCmp427 = icmp eq i32 %meshStackVariable425.phi, 4 ; <i1> [#uses=1]
+ br i1 %meshCmp427, label %bb97, label %bb96
+
+meshBB428: ; preds = %bb70, %bb4
+ %.SV158.phi1090 = phi i32 [ %.SV158.phi, %bb70 ], [ undef, %bb4 ] ; <i32> [#uses=1]
+ %.SV162.phi1089 = phi i32* [ %.SV162.phi, %bb70 ], [ undef, %bb4 ] ; <i32*> [#uses=1]
+ %.SV164.phi1088 = phi i32 [ %.SV164.phi, %bb70 ], [ undef, %bb4 ] ; <i32> [#uses=1]
+ %.load165.SV.phi = phi i32 [ %.SV164.phi, %bb70 ], [ undef, %bb4 ] ; <i32> [#uses=1]
+ %.SV278.phi = phi %struct.Macroblock* [ %176, %bb70 ], [ undef, %bb4 ] ; <%struct.Macroblock*> [#uses=1]
+ %.SV280.phi = phi i32 [ %177, %bb70 ], [ undef, %bb4 ] ; <i32> [#uses=1]
+ %meshStackVariable429.phi = phi i32 [ %Opq.sa.calc630, %bb70 ], [ %Opq.sa.calc467, %bb4 ] ; <i32> [#uses=1]
+ %Opq.link.SV898.phi = phi i32 [ %Opq.sa.calc630, %bb70 ], [ %Opq.sa.calc462, %bb4 ] ; <i32> [#uses=1]
+ %.SV70.phi1026 = phi i32 [ %.SV70.phi1188, %bb70 ], [ %12, %bb4 ] ; <i32> [#uses=5]
+ %.SV52.phi = phi i32* [ undef, %bb70 ], [ %9, %bb4 ] ; <i32*> [#uses=3]
+ %.SV68.phi1020 = phi i32 [ %.SV68.phi1189, %bb70 ], [ %10, %bb4 ] ; <i32> [#uses=5]
+ %.SV38.phi1014 = phi i64 [ %.SV38.phi1191, %bb70 ], [ %4, %bb4 ] ; <i64> [#uses=5]
+ %.SV43.phi = phi i32 [ undef, %bb70 ], [ %8, %bb4 ] ; <i32> [#uses=1]
+ %Opq.link.mask900 = and i32 %Opq.link.SV898.phi, 4 ; <i32> [#uses=1]
+ %Opq.sa.calc897 = xor i32 %Opq.link.mask900, 193 ; <i32> [#uses=3]
+ %meshCmp431 = icmp eq i32 %meshStackVariable429.phi, 5 ; <i1> [#uses=1]
+ br i1 %meshCmp431, label %bb5, label %bb70.fragment
+
+meshBB432: ; preds = %bb42, %bb23.fragment182
+ %.SV38.phi1179 = phi i64 [ %.SV38.phi1115, %bb23.fragment182 ], [ %.SV38.phi1231, %bb42 ] ; <i64> [#uses=7]
+ %.SV43.phi1178 = phi i32 [ %.SV43.phi1015, %bb23.fragment182 ], [ %.SV43.phi1230, %bb42 ] ; <i32> [#uses=3]
+ %.SV68.phi1177 = phi i32 [ %.SV68.phi1112, %bb23.fragment182 ], [ %.SV68.phi1229, %bb42 ] ; <i32> [#uses=7]
+ %.SV70.phi1176 = phi i32 [ %.SV70.phi1111, %bb23.fragment182 ], [ %.SV70.phi1228, %bb42 ] ; <i32> [#uses=7]
+ %.SV118.phi1040 = phi i32 [ %76, %bb23.fragment182 ], [ %.SV118.phi1125, %bb42 ] ; <i32> [#uses=7]
+ %.SV135.phi1039 = phi i1 [ %78, %bb23.fragment182 ], [ undef, %bb42 ] ; <i1> [#uses=2]
+ %meshStackVariable433.phi = phi i32 [ %Opq.sa.calc744, %bb23.fragment182 ], [ %Opq.sa.calc560, %bb42 ] ; <i32> [#uses=1]
+ %Opq.link.SV799.phi = phi i32 [ %Opq.sa.calc744, %bb23.fragment182 ], [ %Opq.sa.calc987, %bb42 ] ; <i32> [#uses=1]
+ %.SV96.phi1038 = phi i1 [ %71, %bb23.fragment182 ], [ undef, %bb42 ] ; <i1> [#uses=1]
+ %.SV99.phi1037 = phi i32* [ %72, %bb23.fragment182 ], [ undef, %bb42 ] ; <i32*> [#uses=2]
+ %.SV104.phi1036 = phi i32 [ %73, %bb23.fragment182 ], [ %.SV104.phi1127, %bb42 ] ; <i32> [#uses=3]
+ %.SV111.phi1035 = phi i32* [ %74, %bb23.fragment182 ], [ %.SV111.phi1126, %bb42 ] ; <i32*> [#uses=3]
+ %Opq.link.mask801 = and i32 %Opq.link.SV799.phi, 6 ; <i32> [#uses=1]
+ %Opq.sa.calc798 = xor i32 %Opq.link.mask801, 3 ; <i32> [#uses=5]
+ %meshCmp435 = icmp eq i32 %meshStackVariable433.phi, 1 ; <i1> [#uses=1]
+ br i1 %meshCmp435, label %bb43, label %bb39
+
+meshBB436: ; preds = %bb71.fragment, %bb65
+ %.SV38.phi1147 = phi i64 [ %.SV38.phi1144, %bb65 ], [ %.SV38.phi1140, %bb71.fragment ] ; <i64> [#uses=2]
+ %.SV68.phi1146 = phi i32 [ %.SV68.phi1142, %bb65 ], [ %.SV68.phi1139, %bb71.fragment ] ; <i32> [#uses=2]
+ %.SV70.phi1145 = phi i32 [ %.SV70.phi1141, %bb65 ], [ %.SV70.phi1138, %bb71.fragment ] ; <i32> [#uses=2]
+ %.SV.phi1067 = phi i32 [ undef, %bb65 ], [ %.load166.SV.phi, %bb71.fragment ] ; <i32> [#uses=1]
+ %yM.0.SV.phi1066 = phi i32 [ undef, %bb65 ], [ %183, %bb71.fragment ] ; <i32> [#uses=1]
+ %.load62.SV.phi = phi i32* [ %.SV52.phi1143, %bb65 ], [ undef, %bb71.fragment ] ; <i32*> [#uses=1]
+ %.SV268.phi = phi i32 [ %164, %bb65 ], [ undef, %bb71.fragment ] ; <i32> [#uses=2]
+ %meshStackVariable437.phi = phi i32 [ %Opq.sa.calc617, %bb65 ], [ %Opq.sa.calc809, %bb71.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV704.phi = phi i32 [ %Opq.sa.calc617, %bb65 ], [ %Opq.sa.calc809, %bb71.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask706 = and i32 %Opq.link.SV704.phi, 0 ; <i32> [#uses=2]
+ %Opq.sa.calc703 = add i32 %Opq.link.mask706, 216 ; <i32> [#uses=0]
+ %meshCmp439 = icmp eq i32 %meshStackVariable437.phi, 2 ; <i1> [#uses=1]
+ br i1 %meshCmp439, label %bb96, label %bb65.fragment
+
+meshBB440: ; preds = %bb85, %bb54.fragment
+ %.SV52.phi1235 = phi i32* [ %.SV52.phi1213, %bb85 ], [ undef, %bb54.fragment ] ; <i32*> [#uses=2]
+ %.SV38.phi1210 = phi i64 [ %.SV38.phi1214, %bb85 ], [ %.SV38.phi1207, %bb54.fragment ] ; <i64> [#uses=2]
+ %.SV68.phi1209 = phi i32 [ %.SV68.phi1212, %bb85 ], [ %.SV68.phi1206, %bb54.fragment ] ; <i32> [#uses=2]
+ %.SV70.phi1208 = phi i32 [ %.SV70.phi1211, %bb85 ], [ %.SV70.phi1205, %bb54.fragment ] ; <i32> [#uses=2]
+ %.SV.phi1056 = phi i32 [ undef, %bb85 ], [ %.SV118.phi1122, %bb54.fragment ] ; <i32> [#uses=1]
+ %meshStackVariable441.phi = phi i32 [ %Opq.sa.calc666, %bb85 ], [ %Opq.sa.calc883, %bb54.fragment ] ; <i32> [#uses=1]
+ %Opq.link.SV991.phi = phi i32 [ %Opq.sa.calc665, %bb85 ], [ %Opq.sa.calc883, %bb54.fragment ] ; <i32> [#uses=1]
+ %Opq.link.mask993 = and i32 %Opq.link.SV991.phi, 6 ; <i32> [#uses=1]
+ %Opq.sa.calc990 = xor i32 %Opq.link.mask993, 139 ; <i32> [#uses=2]
+ %meshCmp443 = icmp eq i32 %meshStackVariable441.phi, 6 ; <i1> [#uses=1]
+ br i1 %meshCmp443, label %bb96, label %bb87
+
+meshBB444: ; preds = %bb66.fragment, %bb40
+ %.SV38.phi1224 = phi i64 [ %.SV38.phi1194, %bb66.fragment ], [ %.SV38.phi1179, %bb40 ] ; <i64> [#uses=2]
+ %.SV68.phi1223 = phi i32 [ %.SV68.phi1193, %bb66.fragment ], [ %.SV68.phi1177, %bb40 ] ; <i32> [#uses=2]
+ %.SV70.phi1222 = phi i32 [ %.SV70.phi1192, %bb66.fragment ], [ %.SV70.phi1176, %bb40 ] ; <i32> [#uses=2]
+ %.SV.phi1048 = phi i32 [ undef, %bb66.fragment ], [ %.SV118.phi1040, %bb40 ] ; <i32> [#uses=1]
+ %meshStackVariable445.phi = phi i32 [ %Opq.sa.calc794, %bb66.fragment ], [ %Opq.sa.calc554, %bb40 ] ; <i32> [#uses=1]
+ %Opq.link.SV781.phi = phi i32 [ %Opq.sa.calc795, %bb66.fragment ], [ %Opq.sa.calc554, %bb40 ] ; <i32> [#uses=1]
+ %Opq.link.mask783 = and i32 %Opq.link.SV781.phi, 10 ; <i32> [#uses=1]
+ %Opq.sa.calc780 = add i32 %Opq.link.mask783, 1 ; <i32> [#uses=0]
+ %meshCmp447 = icmp eq i32 %meshStackVariable445.phi, 11 ; <i1> [#uses=1]
+ br i1 %meshCmp447, label %bb96, label %bb98
+
+meshBB448: ; preds = %bb35, %entry.fragment181
+ %.SV70.phi1233 = phi i32 [ undef, %entry.fragment181 ], [ %.SV70.phi1180, %bb35 ] ; <i32> [#uses=1]
+ %.SV104.phi1157 = phi i32 [ undef, %entry.fragment181 ], [ %.SV104.phi1084, %bb35 ] ; <i32> [#uses=1]
+ %.SV111.phi1156 = phi i32* [ undef, %entry.fragment181 ], [ %.SV111.phi1083, %bb35 ] ; <i32*> [#uses=1]
+ %.SV118.phi1155 = phi i32 [ undef, %entry.fragment181 ], [ %.SV118.phi1082, %bb35 ] ; <i32> [#uses=1]
+ %.SV68.phi1025 = phi i32 [ %10, %entry.fragment181 ], [ %.SV68.phi1181, %bb35 ] ; <i32> [#uses=1]
+ %meshStackVariable449.phi = phi i32 [ %Opq.sa.calc863, %entry.fragment181 ], [ %Opq.sa.calc541, %bb35 ] ; <i32> [#uses=1]
+ %Opq.link.SV959.phi = phi i32 [ %Opq.sa.calc863, %entry.fragment181 ], [ %Opq.sa.calc828, %bb35 ] ; <i32> [#uses=1]
+ %.SV38.phi1019 = phi i64 [ %4, %entry.fragment181 ], [ %.SV38.phi1183, %bb35 ] ; <i64> [#uses=1]
+ %.SV43.phi1018 = phi i32 [ %8, %entry.fragment181 ], [ %.SV43.phi1015, %bb35 ] ; <i32> [#uses=2]
+ %Opq.link.mask961 = and i32 %Opq.link.SV959.phi, 1 ; <i32> [#uses=1]
+ %Opq.sa.calc958 = xor i32 %Opq.link.mask961, 63 ; <i32> [#uses=3]
+ %Opq.sa.calc957 = xor i32 %Opq.sa.calc958, 126 ; <i32> [#uses=1]
+ %meshCmp451 = icmp eq i32 %meshStackVariable449.phi, 5 ; <i1> [#uses=1]
+ br i1 %meshCmp451, label %bb37, label %return
+
+meshBB452: ; preds = %bb70.fragment, %bb63
+ %.SV38.phi1110 = phi i64 [ %.SV38.phi1014, %bb70.fragment ], [ %.SV38.phi1098, %bb63 ] ; <i64> [#uses=3]
+ %.SV52.phi1109 = phi i32* [ undef, %bb70.fragment ], [ %.SV52.phi1097, %bb63 ] ; <i32*> [#uses=2]
+ %.SV68.phi1108 = phi i32 [ %.SV68.phi1020, %bb70.fragment ], [ %.SV68.phi1096, %bb63 ] ; <i32> [#uses=3]
+ %.SV70.phi1107 = phi i32 [ %.SV70.phi1026, %bb70.fragment ], [ %.SV70.phi1095, %bb63 ] ; <i32> [#uses=3]
+ %.SV158.phi1106 = phi i32 [ %.SV158.phi1090, %bb70.fragment ], [ undef, %bb63 ] ; <i32> [#uses=1]
+ %.SV162.phi1105 = phi i32* [ %.SV162.phi1089, %bb70.fragment ], [ undef, %bb63 ] ; <i32*> [#uses=1]
+ %.SV164.phi1104 = phi i32 [ %.SV164.phi1088, %bb70.fragment ], [ undef, %bb63 ] ; <i32> [#uses=1]
+ %.SV264.phi = phi %struct.Macroblock* [ undef, %bb70.fragment ], [ %157, %bb63 ] ; <%struct.Macroblock*> [#uses=1]
+ %.SV266.phi = phi i32 [ undef, %bb70.fragment ], [ %158, %bb63 ] ; <i32> [#uses=1]
+ %meshStackVariable453.phi = phi i32 [ %Opq.sa.calc739, %bb70.fragment ], [ %Opq.sa.calc611, %bb63 ] ; <i32> [#uses=1]
+ %Opq.link.SV821.phi = phi i32 [ %Opq.sa.calc897, %bb70.fragment ], [ %Opq.sa.calc611, %bb63 ] ; <i32> [#uses=1]
+ %.SV150.phi1060 = phi i32* [ undef, %bb70.fragment ], [ %148, %bb63 ] ; <i32*> [#uses=1]
+ %.SV152.phi1059 = phi i32* [ undef, %bb70.fragment ], [ %149, %bb63 ] ; <i32*> [#uses=2]
+ %.SV148.phi1057 = phi i32 [ undef, %bb70.fragment ], [ %147, %bb63 ] ; <i32> [#uses=1]
+ %Opq.link.mask823 = and i32 %Opq.link.SV821.phi, 4 ; <i32> [#uses=2]
+ %Opq.sa.calc820 = sub i32 %Opq.link.mask823, -97 ; <i32> [#uses=2]
+ %meshCmp455 = icmp eq i32 %meshStackVariable453.phi, 6 ; <i1> [#uses=1]
+ br i1 %meshCmp455, label %bb63.fragment, label %bb71
+
+meshBB456: ; preds = %bb79, %bb63.fragment
+ %.SV38.phi1137 = phi i64 [ %.SV38.phi1110, %bb63.fragment ], [ %.SV38.phi1098, %bb79 ] ; <i64> [#uses=2]
+ %.SV52.phi1136 = phi i32* [ %.SV52.phi1109, %bb63.fragment ], [ %.SV52.phi1097, %bb79 ] ; <i32*> [#uses=2]
+ %.SV68.phi1135 = phi i32 [ %.SV68.phi1108, %bb63.fragment ], [ %.SV68.phi1096, %bb79 ] ; <i32> [#uses=2]
+ %.SV70.phi1134 = phi i32 [ %.SV70.phi1107, %bb63.fragment ], [ %.SV70.phi1095, %bb79 ] ; <i32> [#uses=2]
+ %.SV152.phi1133 = phi i32* [ %.SV152.phi1059, %bb63.fragment ], [ undef, %bb79 ] ; <i32*> [#uses=1]
+ %meshStackVariable457.phi = phi i32 [ %Opq.sa.calc890, %bb63.fragment ], [ %Opq.sa.calc651, %bb79 ] ; <i32> [#uses=1]
+ %Opq.link.SV817.phi = phi i32 [ %Opq.sa.calc891, %bb63.fragment ], [ %Opq.sa.calc651, %bb79 ] ; <i32> [#uses=1]
+ %Opq.link.mask819 = and i32 %Opq.link.SV817.phi, 2 ; <i32> [#uses=1]
+ %Opq.sa.calc816 = add i32 %Opq.link.mask819, 186 ; <i32> [#uses=2]
+ %meshCmp459 = icmp eq i32 %meshStackVariable457.phi, 10 ; <i1> [#uses=1]
+ br i1 %meshCmp459, label %bb81, label %bb65
+}
diff --git a/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll b/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll
new file mode 100644
index 0000000..d77e528
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9
+; PR4056
+
+define void @int163(i32 %p_4, i32 %p_5) nounwind {
+entry:
+ %0 = tail call i32 @bar(i32 1) nounwind ; <i32> [#uses=2]
+ %1 = icmp sgt i32 %0, 7 ; <i1> [#uses=1]
+ br i1 %1, label %foo.exit, label %bb.i
+
+bb.i: ; preds = %entry
+ %2 = lshr i32 1, %0 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
+ %4 = zext i1 %3 to i32 ; <i32> [#uses=1]
+ %.p_5 = shl i32 %p_5, %4 ; <i32> [#uses=1]
+ br label %foo.exit
+
+foo.exit: ; preds = %bb.i, %entry
+ %5 = phi i32 [ %.p_5, %bb.i ], [ %p_5, %entry ] ; <i32> [#uses=1]
+ %6 = icmp eq i32 %5, 0 ; <i1> [#uses=0]
+ %7 = tail call i32 @bar(i32 %p_5) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @bar(i32)
diff --git a/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll b/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll
new file mode 100644
index 0000000..f025654
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9
+; PR4051
+
+define void @int163(i32 %p_4, i32 %p_5) nounwind {
+entry:
+ %0 = tail call i32 @foo(i32 1) nounwind ; <i32> [#uses=2]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb.i, label %bar.exit
+
+bb.i: ; preds = %entry
+ %2 = lshr i32 1, %0 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
+ %retval.i = select i1 %3, i32 1, i32 %p_5 ; <i32> [#uses=1]
+ br label %bar.exit
+
+bar.exit: ; preds = %bb.i, %entry
+ %4 = phi i32 [ %retval.i, %bb.i ], [ %p_5, %entry ] ; <i32> [#uses=1]
+ %5 = icmp eq i32 %4, 0 ; <i1> [#uses=0]
+ %6 = tail call i32 @foo(i32 %p_5) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @foo(i32)
diff --git a/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll b/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll
new file mode 100644
index 0000000..0a2fcdb
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll
@@ -0,0 +1,165 @@
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | grep cmpxchgl | not grep eax
+; PR4076
+
+ type { i8, i8, i8 } ; type %0
+ type { i32, i8** } ; type %1
+ type { %3* } ; type %2
+ type { %4 } ; type %3
+ type { %5 } ; type %4
+ type { %6, i32, %7 } ; type %5
+ type { i8* } ; type %6
+ type { i32, [12 x i8] } ; type %7
+ type { %9 } ; type %8
+ type { %10, %11*, i8 } ; type %9
+ type { %11* } ; type %10
+ type { i32, %6, i8*, %12, %13*, i8, i32, %28, %29, i32, %30, i32, i32, i32, i8*, i8*, i8, i8 } ; type %11
+ type { %13* } ; type %12
+ type { %14, i32, %13*, %21 } ; type %13
+ type { %15, %16 } ; type %14
+ type { i32 (...)** } ; type %15
+ type { %17, i8* (i32)*, void (i8*)*, i8 } ; type %16
+ type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %18 } ; type %17
+ type { %19* } ; type %18
+ type { i32, %20**, i32, %20**, i8** } ; type %19
+ type { i32 (...)**, i32 } ; type %20
+ type { %22, %25*, i8, i8, %17*, %26*, %27*, %27* } ; type %21
+ type { i32 (...)**, i32, i32, i32, i32, i32, %23*, %24, [8 x %24], i32, %24*, %18 } ; type %22
+ type { %23*, void (i32, %22*, i32)*, i32, i32 } ; type %23
+ type { i8*, i32 } ; type %24
+ type { i32 (...)**, %21 } ; type %25
+ type { %20, i32*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 } ; type %26
+ type { %20 } ; type %27
+ type { void (%9*)*, i32 } ; type %28
+ type { %15* } ; type %29
+ type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8* } ; type %30
+@AtomicOps_Internalx86CPUFeatures = external global %0 ; <%0*> [#uses=1]
+internal constant [19 x i8] c"xxxxxxxxxxxxxxxxxx\00" ; <[19 x i8]*>:0 [#uses=1]
+internal constant [47 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00" ; <[47 x i8]*>:1 [#uses=1]
+
+define i8** @func6(i8 zeroext, i32, i32, %1*) nounwind {
+; <label>:4
+ %5 = alloca i32, align 4 ; <i32*> [#uses=2]
+ %6 = alloca i32, align 4 ; <i32*> [#uses=2]
+ %7 = alloca %2, align 8 ; <%2*> [#uses=3]
+ %8 = alloca %8, align 8 ; <%8*> [#uses=2]
+ br label %17
+
+; <label>:9 ; preds = %17
+ %10 = getelementptr %1* %3, i32 %19, i32 0 ; <i32*> [#uses=1]
+ %11 = load i32* %10, align 4 ; <i32> [#uses=1]
+ %12 = icmp eq i32 %11, %2 ; <i1> [#uses=1]
+ br i1 %12, label %13, label %16
+
+; <label>:13 ; preds = %9
+ %14 = getelementptr %1* %3, i32 %19, i32 1 ; <i8***> [#uses=1]
+ %15 = load i8*** %14, align 4 ; <i8**> [#uses=1]
+ ret i8** %15
+
+; <label>:16 ; preds = %9
+ %indvar.next13 = add i32 %18, 1 ; <i32> [#uses=1]
+ br label %17
+
+; <label>:17 ; preds = %16, %4
+ %18 = phi i32 [ 0, %4 ], [ %indvar.next13, %16 ] ; <i32> [#uses=2]
+ %19 = add i32 %18, %1 ; <i32> [#uses=3]
+ %20 = icmp sgt i32 %19, 3 ; <i1> [#uses=1]
+ br i1 %20, label %21, label %9
+
+; <label>:21 ; preds = %17
+ call void @func5()
+ %22 = getelementptr %1* %3, i32 0, i32 0 ; <i32*> [#uses=1]
+ %23 = load i32* %22, align 4 ; <i32> [#uses=1]
+ %24 = icmp eq i32 %23, 0 ; <i1> [#uses=1]
+ br i1 %24, label %._crit_edge, label %._crit_edge1
+
+._crit_edge1: ; preds = %._crit_edge1, %21
+ %25 = phi i32 [ 0, %21 ], [ %26, %._crit_edge1 ] ; <i32> [#uses=1]
+ %26 = add i32 %25, 1 ; <i32> [#uses=4]
+ %27 = getelementptr %1* %3, i32 %26, i32 0 ; <i32*> [#uses=1]
+ %28 = load i32* %27, align 4 ; <i32> [#uses=1]
+ %29 = icmp ne i32 %28, 0 ; <i1> [#uses=1]
+ %30 = icmp ne i32 %26, 4 ; <i1> [#uses=1]
+ %31 = and i1 %29, %30 ; <i1> [#uses=1]
+ br i1 %31, label %._crit_edge1, label %._crit_edge
+
+._crit_edge: ; preds = %._crit_edge1, %21
+ %32 = phi i32 [ 0, %21 ], [ %26, %._crit_edge1 ] ; <i32> [#uses=3]
+ %33 = call i8* @pthread_getspecific(i32 0) nounwind ; <i8*> [#uses=2]
+ %34 = icmp ne i8* %33, null ; <i1> [#uses=1]
+ %35 = icmp eq i8 %0, 0 ; <i1> [#uses=1]
+ %36 = or i1 %34, %35 ; <i1> [#uses=1]
+ br i1 %36, label %._crit_edge4, label %37
+
+; <label>:37 ; preds = %._crit_edge
+ %38 = call i8* @func2(i32 2048) ; <i8*> [#uses=4]
+ call void @llvm.memset.i32(i8* %38, i8 0, i32 2048, i32 4)
+ %39 = call i32 @pthread_setspecific(i32 0, i8* %38) nounwind ; <i32> [#uses=2]
+ store i32 %39, i32* %5
+ store i32 0, i32* %6
+ %40 = icmp eq i32 %39, 0 ; <i1> [#uses=1]
+ br i1 %40, label %41, label %43
+
+; <label>:41 ; preds = %37
+ %42 = getelementptr %2* %7, i32 0, i32 0 ; <%3**> [#uses=1]
+ store %3* null, %3** %42, align 8
+ br label %._crit_edge4
+
+; <label>:43 ; preds = %37
+ %44 = call %3* @func1(i32* %5, i32* %6, i8* getelementptr ([47 x i8]* @1, i32 0, i32 0)) ; <%3*> [#uses=2]
+ %45 = getelementptr %2* %7, i32 0, i32 0 ; <%3**> [#uses=1]
+ store %3* %44, %3** %45, align 8
+ %46 = icmp eq %3* %44, null ; <i1> [#uses=1]
+ br i1 %46, label %._crit_edge4, label %47
+
+; <label>:47 ; preds = %43
+ call void @func4(%8* %8, i8* getelementptr ([19 x i8]* @0, i32 0, i32 0), i32 165, %2* %7)
+ call void @func3(%8* %8) noreturn
+ unreachable
+
+._crit_edge4: ; preds = %43, %41, %._crit_edge
+ %48 = phi i8* [ %38, %41 ], [ %33, %._crit_edge ], [ %38, %43 ] ; <i8*> [#uses=2]
+ %49 = bitcast i8* %48 to i8** ; <i8**> [#uses=3]
+ %50 = icmp ne i8* %48, null ; <i1> [#uses=1]
+ %51 = icmp slt i32 %32, 4 ; <i1> [#uses=1]
+ %52 = and i1 %50, %51 ; <i1> [#uses=1]
+ br i1 %52, label %53, label %._crit_edge6
+
+; <label>:53 ; preds = %._crit_edge4
+ %54 = getelementptr %1* %3, i32 %32, i32 0 ; <i32*> [#uses=1]
+ %55 = call i32 asm sideeffect "lock; cmpxchgl $1,$2", "={ax},q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %2, i32* %54, i32 0) nounwind ; <i32> [#uses=1]
+ %56 = load i8* getelementptr (%0* @AtomicOps_Internalx86CPUFeatures, i32 0, i32 0), align 8 ; <i8> [#uses=1]
+ %57 = icmp eq i8 %56, 0 ; <i1> [#uses=1]
+ br i1 %57, label %._crit_edge7, label %58
+
+; <label>:58 ; preds = %53
+ call void asm sideeffect "lfence", "~{dirflag},~{fpsr},~{flags},~{memory}"() nounwind
+ br label %._crit_edge7
+
+._crit_edge7: ; preds = %58, %53
+ %59 = icmp eq i32 %55, 0 ; <i1> [#uses=1]
+ br i1 %59, label %60, label %._crit_edge6
+
+._crit_edge6: ; preds = %._crit_edge7, %._crit_edge4
+ ret i8** %49
+
+; <label>:60 ; preds = %._crit_edge7
+ %61 = getelementptr %1* %3, i32 %32, i32 1 ; <i8***> [#uses=1]
+ store i8** %49, i8*** %61, align 4
+ ret i8** %49
+}
+
+declare %3* @func1(i32* nocapture, i32* nocapture, i8*)
+
+declare void @func5()
+
+declare void @func4(%8*, i8*, i32, %2*)
+
+declare void @func3(%8*) noreturn
+
+declare i8* @pthread_getspecific(i32) nounwind
+
+declare i8* @func2(i32)
+
+declare void @llvm.memset.i32(i8* nocapture, i8, i32, i32) nounwind
+
+declare i32 @pthread_setspecific(i32, i8*) nounwind
diff --git a/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll b/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll
new file mode 100644
index 0000000..a2fd2e4
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s | grep {movl.*%ebx, 8(%esi)}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.0"
+
+define void @cpuid(i32* %data) nounwind {
+entry:
+ %arrayidx = getelementptr i32* %data, i32 1 ; <i32*> [#uses=1]
+ %arrayidx2 = getelementptr i32* %data, i32 2 ; <i32*> [#uses=1]
+ %arrayidx4 = getelementptr i32* %data, i32 3 ; <i32*> [#uses=1]
+ %arrayidx6 = getelementptr i32* %data, i32 4 ; <i32*> [#uses=1]
+ %arrayidx8 = getelementptr i32* %data, i32 5 ; <i32*> [#uses=1]
+ %tmp9 = load i32* %arrayidx8 ; <i32> [#uses=1]
+ %arrayidx11 = getelementptr i32* %data, i32 6 ; <i32*> [#uses=1]
+ %tmp12 = load i32* %arrayidx11 ; <i32> [#uses=1]
+ %arrayidx14 = getelementptr i32* %data, i32 7 ; <i32*> [#uses=1]
+ %tmp15 = load i32* %arrayidx14 ; <i32> [#uses=1]
+ %arrayidx17 = getelementptr i32* %data, i32 8 ; <i32*> [#uses=1]
+ %tmp18 = load i32* %arrayidx17 ; <i32> [#uses=1]
+ %0 = call i32 asm "cpuid", "={ax},=*{bx},=*{cx},=*{dx},{ax},{bx},{cx},{dx},~{dirflag},~{fpsr},~{flags}"(i32* %arrayidx2, i32* %arrayidx4, i32* %arrayidx6, i32 %tmp9, i32 %tmp12, i32 %tmp15, i32 %tmp18) nounwind ; <i32> [#uses=1]
+ store i32 %0, i32* %arrayidx
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-04-29-LinearScanBug.ll b/test/CodeGen/X86/2009-04-29-LinearScanBug.ll
new file mode 100644
index 0000000..6843723
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-29-LinearScanBug.ll
@@ -0,0 +1,215 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10
+; rdar://6837009
+
+ type { %struct.pf_state*, %struct.pf_state*, %struct.pf_state*, i32 } ; type %0
+ type { %2 } ; type %1
+ type { %struct.pf_addr, %struct.pf_addr } ; type %2
+ type { %struct.in6_addr } ; type %3
+ type { [4 x i32] } ; type %4
+ type { %struct.pfi_dynaddr*, [4 x i8] } ; type %5
+ type { %struct.pfi_dynaddr*, %struct.pfi_dynaddr** } ; type %6
+ type { %struct.pfr_ktable*, %struct.pfr_ktable*, %struct.pfr_ktable*, i32 } ; type %7
+ type { %struct.pfr_ktable* } ; type %8
+ type { i8* } ; type %9
+ type { %11 } ; type %10
+ type { i8*, i8*, %struct.radix_node* } ; type %11
+ type { [2 x %struct.pf_rulequeue], %13, %13 } ; type %12
+ type { %struct.pf_rulequeue*, %struct.pf_rule**, i32, i32, i32 } ; type %13
+ type { %struct.pf_anchor*, %struct.pf_anchor*, %struct.pf_anchor*, i32 } ; type %14
+ type { %struct.pfi_kif*, %struct.pfi_kif*, %struct.pfi_kif*, i32 } ; type %15
+ type { %struct.ifnet*, %struct.ifnet** } ; type %16
+ type { %18 } ; type %17
+ type { %struct.pkthdr, %19 } ; type %18
+ type { %struct.m_ext, [176 x i8] } ; type %19
+ type { %struct.ifmultiaddr*, %struct.ifmultiaddr** } ; type %20
+ type { i32, %22 } ; type %21
+ type { i8*, [4 x i8] } ; type %22
+ type { %struct.tcphdr* } ; type %23
+ type { %struct.pf_ike_state } ; type %24
+ type { %struct.pf_state_key*, %struct.pf_state_key*, %struct.pf_state_key*, i32 } ; type %25
+ type { %struct.pf_src_node*, %struct.pf_src_node*, %struct.pf_src_node*, i32 } ; type %26
+ %struct.anon = type { %struct.pf_state*, %struct.pf_state** }
+ %struct.au_mask_t = type { i32, i32 }
+ %struct.bpf_if = type opaque
+ %struct.dlil_threading_info = type opaque
+ %struct.ether_header = type { [6 x i8], [6 x i8], i16 }
+ %struct.ext_refsq = type { %struct.ext_refsq*, %struct.ext_refsq* }
+ %struct.hook_desc = type { %struct.hook_desc_head, void (i8*)*, i8* }
+ %struct.hook_desc_head = type { %struct.hook_desc*, %struct.hook_desc** }
+ %struct.if_data_internal = type { i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, %struct.au_mask_t, i32, i32, i32 }
+ %struct.ifaddr = type { %struct.sockaddr*, %struct.sockaddr*, %struct.sockaddr*, %struct.ifnet*, %struct.ifaddrhead, void (i32, %struct.rtentry*, %struct.sockaddr*)*, i32, i32, i32, void (%struct.ifaddr*)*, void (%struct.ifaddr*, i32)*, i32 }
+ %struct.ifaddrhead = type { %struct.ifaddr*, %struct.ifaddr** }
+ %struct.ifmultiaddr = type { %20, %struct.sockaddr*, %struct.ifmultiaddr*, %struct.ifnet*, i32, i8*, i32, void (i8*)* }
+ %struct.ifmultihead = type { %struct.ifmultiaddr* }
+ %struct.ifnet = type { i8*, i8*, %16, %struct.ifaddrhead, i32, i32 (%struct.ifnet*, %struct.sockaddr*)*, i32, %struct.bpf_if*, i16, i16, i16, i16, i32, i8*, i32, %struct.if_data_internal, i32, i32 (%struct.ifnet*, %struct.mbuf*)*, i32 (%struct.ifnet*, i32, i8*)*, i32 (%struct.ifnet*, i32, i32 (%struct.ifnet*, %struct.mbuf*)*)*, void (%struct.ifnet*)*, i32 (%struct.ifnet*, %struct.mbuf*, i8*, i32*)*, void (%struct.ifnet*, %struct.kev_msg*)*, i32 (%struct.ifnet*, %struct.mbuf**, %struct.sockaddr*, i8*, i8*)*, i32, %struct.ifnet_filter_head, i32, i8*, i32, %struct.ifmultihead, i32, i32 (%struct.ifnet*, i32, %struct.ifnet_demux_desc*, i32)*, i32 (%struct.ifnet*, i32)*, %struct.proto_hash_entry*, i8*, %struct.dlil_threading_info*, i8*, %struct.ifqueue, [1 x i32], i32, %struct.ifprefixhead, %struct.lck_rw_t*, %21, i32, %struct.thread*, %struct.pfi_kif*, %struct.lck_mtx_t*, %struct.route }
+ %struct.ifnet_demux_desc = type { i32, i8*, i32 }
+ %struct.ifnet_filter = type opaque
+ %struct.ifnet_filter_head = type { %struct.ifnet_filter*, %struct.ifnet_filter** }
+ %struct.ifprefix = type { %struct.sockaddr*, %struct.ifnet*, %struct.ifprefixhead, i8, i8 }
+ %struct.ifprefixhead = type { %struct.ifprefix*, %struct.ifprefix** }
+ %struct.ifqueue = type { i8*, i8*, i32, i32, i32 }
+ %struct.in6_addr = type { %4 }
+ %struct.in_addr = type { i32 }
+ %struct.kev_d_vectors = type { i32, i8* }
+ %struct.kev_msg = type { i32, i32, i32, i32, [5 x %struct.kev_d_vectors] }
+ %struct.lck_mtx_t = type { [3 x i32] }
+ %struct.lck_rw_t = type <{ [3 x i32] }>
+ %struct.m_ext = type { i8*, void (i8*, i32, i8*)*, i32, i8*, %struct.ext_refsq, %struct.au_mask_t* }
+ %struct.m_hdr = type { %struct.mbuf*, %struct.mbuf*, i32, i8*, i16, i16 }
+ %struct.m_tag = type { %struct.packet_tags, i16, i16, i32 }
+ %struct.mbuf = type { %struct.m_hdr, %17 }
+ %struct.packet_tags = type { %struct.m_tag* }
+ %struct.pf_addr = type { %3 }
+ %struct.pf_addr_wrap = type <{ %1, %5, i8, i8, [6 x i8] }>
+ %struct.pf_anchor = type { %14, %14, %struct.pf_anchor*, %struct.pf_anchor_node, [64 x i8], [1024 x i8], %struct.pf_ruleset, i32, i32 }
+ %struct.pf_anchor_node = type { %struct.pf_anchor* }
+ %struct.pf_app_state = type { void (%struct.pf_state*, i32, i32, %struct.pf_pdesc*, %struct.pfi_kif*)*, i32 (%struct.pf_app_state*, %struct.pf_app_state*)*, i32 (%struct.pf_app_state*, %struct.pf_app_state*)*, %24 }
+ %struct.pf_ike_state = type { i64 }
+ %struct.pf_mtag = type { i8*, i32, i32, i16, i8, i8 }
+ %struct.pf_palist = type { %struct.pf_pooladdr*, %struct.pf_pooladdr** }
+ %struct.pf_pdesc = type { %struct.pf_threshold, i64, %23, %struct.pf_addr, %struct.pf_addr, %struct.pf_rule*, %struct.pf_addr*, %struct.pf_addr*, %struct.ether_header*, %struct.mbuf*, i32, %struct.pf_mtag*, i16*, i32, i16, i8, i8, i8, i8 }
+ %struct.pf_pool = type { %struct.pf_palist, [2 x i32], %struct.pf_pooladdr*, [4 x i8], %struct.in6_addr, %struct.pf_addr, i32, [2 x i16], i8, i8, [1 x i32] }
+ %struct.pf_pooladdr = type <{ %struct.pf_addr_wrap, %struct.pf_palist, [2 x i32], [16 x i8], %struct.pfi_kif*, [1 x i32] }>
+ %struct.pf_rule = type <{ %struct.pf_rule_addr, %struct.pf_rule_addr, [8 x %struct.pf_rule_ptr], [64 x i8], [16 x i8], [64 x i8], [64 x i8], [64 x i8], [64 x i8], [32 x i8], %struct.pf_rulequeue, [2 x i32], %struct.pf_pool, i64, [2 x i64], [2 x i64], %struct.pfi_kif*, [4 x i8], %struct.pf_anchor*, [4 x i8], %struct.pfr_ktable*, [4 x i8], i32, i32, [26 x i32], i32, i32, i32, i32, i32, i32, %struct.au_mask_t, i32, i32, i32, i32, i32, i32, i32, i16, i16, i16, i16, i16, [2 x i8], %struct.pf_rule_gid, %struct.pf_rule_gid, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, [2 x i8] }>
+ %struct.pf_rule_addr = type <{ %struct.pf_addr_wrap, %struct.pf_rule_xport, i8, [7 x i8] }>
+ %struct.pf_rule_gid = type { [2 x i32], i8, [3 x i8] }
+ %struct.pf_rule_ptr = type { %struct.pf_rule*, [4 x i8] }
+ %struct.pf_rule_xport = type { i32, [4 x i8] }
+ %struct.pf_rulequeue = type { %struct.pf_rule*, %struct.pf_rule** }
+ %struct.pf_ruleset = type { [5 x %12], %struct.pf_anchor*, i32, i32, i32 }
+ %struct.pf_src_node = type <{ %26, %struct.pf_addr, %struct.pf_addr, %struct.pf_rule_ptr, %struct.pfi_kif*, [2 x i64], [2 x i64], i32, i32, %struct.pf_threshold, i64, i64, i8, i8, [2 x i8] }>
+ %struct.pf_state = type <{ i64, i32, i32, %struct.anon, %struct.anon, %0, %struct.pf_state_peer, %struct.pf_state_peer, %struct.pf_rule_ptr, %struct.pf_rule_ptr, %struct.pf_rule_ptr, %struct.pf_addr, %struct.hook_desc_head, %struct.pf_state_key*, %struct.pfi_kif*, %struct.pfi_kif*, %struct.pf_src_node*, %struct.pf_src_node*, [2 x i64], [2 x i64], i64, i64, i64, i16, i8, i8, i8, i8, [6 x i8] }>
+ %struct.pf_state_host = type { %struct.pf_addr, %struct.in_addr }
+ %struct.pf_state_key = type { %struct.pf_state_host, %struct.pf_state_host, %struct.pf_state_host, i8, i8, i8, i8, %struct.pf_app_state*, %25, %25, %struct.anon, i16 }
+ %struct.pf_state_peer = type { i32, i32, i32, i16, i8, i8, i16, i8, %struct.pf_state_scrub*, [3 x i8] }
+ %struct.pf_state_scrub = type { %struct.au_mask_t, i32, i32, i32, i16, i8, i8, i32 }
+ %struct.pf_threshold = type { i32, i32, i32, i32 }
+ %struct.pfi_dynaddr = type { %6, %struct.pf_addr, %struct.pf_addr, %struct.pf_addr, %struct.pf_addr, %struct.pfr_ktable*, %struct.pfi_kif*, i8*, i32, i32, i32, i8, i8 }
+ %struct.pfi_kif = type { [16 x i8], %15, [2 x [2 x [2 x i64]]], [2 x [2 x [2 x i64]]], i64, i32, i8*, %struct.ifnet*, i32, i32, %6 }
+ %struct.pfr_ktable = type { %struct.pfr_tstats, %7, %8, %struct.radix_node_head*, %struct.radix_node_head*, %struct.pfr_ktable*, %struct.pfr_ktable*, %struct.pf_ruleset*, i64, i32 }
+ %struct.pfr_table = type { [1024 x i8], [32 x i8], i32, i8 }
+ %struct.pfr_tstats = type { %struct.pfr_table, [2 x [3 x i64]], [2 x [3 x i64]], i64, i64, i64, i32, [2 x i32] }
+ %struct.pkthdr = type { i32, %struct.ifnet*, i8*, i32, i32, i32, i16, i16, %struct.packet_tags }
+ %struct.proto_hash_entry = type opaque
+ %struct.radix_mask = type { i16, i8, i8, %struct.radix_mask*, %9, i32 }
+ %struct.radix_node = type { %struct.radix_mask*, %struct.radix_node*, i16, i8, i8, %10 }
+ %struct.radix_node_head = type { %struct.radix_node*, i32, i32, %struct.radix_node* (i8*, i8*, %struct.radix_node_head*, %struct.radix_node*)*, %struct.radix_node* (i8*, i8*, %struct.radix_node_head*, %struct.radix_node*)*, %struct.radix_node* (i8*, i8*, %struct.radix_node_head*)*, %struct.radix_node* (i8*, i8*, %struct.radix_node_head*)*, %struct.radix_node* (i8*, %struct.radix_node_head*)*, %struct.radix_node* (i8*, %struct.radix_node_head*, i32 (%struct.radix_node*, i8*)*, i8*)*, %struct.radix_node* (i8*, i8*, %struct.radix_node_head*)*, %struct.radix_node* (i8*, i8*, %struct.radix_node_head*, i32 (%struct.radix_node*, i8*)*, i8*)*, %struct.radix_node* (i8*, %struct.radix_node_head*)*, i32 (%struct.radix_node_head*, i32 (%struct.radix_node*, i8*)*, i8*)*, i32 (%struct.radix_node_head*, i8*, i8*, i32 (%struct.radix_node*, i8*)*, i8*)*, void (%struct.radix_node*, %struct.radix_node_head*)*, [3 x %struct.radix_node], i32 }
+ %struct.route = type { %struct.rtentry*, i32, %struct.sockaddr }
+ %struct.rt_metrics = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i32] }
+ %struct.rtentry = type { [2 x %struct.radix_node], %struct.sockaddr*, i32, i32, %struct.ifnet*, %struct.ifaddr*, %struct.sockaddr*, i8*, void (i8*)*, %struct.rt_metrics, %struct.rtentry*, %struct.rtentry*, i32, %struct.lck_mtx_t }
+ %struct.sockaddr = type { i8, i8, [14 x i8] }
+ %struct.tcphdr = type { i16, i16, i32, i32, i8, i8, i16, i16, i16 }
+ %struct.thread = type opaque
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 (%struct.pf_state_key*, %struct.pf_state_key*)* @pf_state_compare_ext_gwy to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define fastcc i32 @pf_state_compare_ext_gwy(%struct.pf_state_key* nocapture %a, %struct.pf_state_key* nocapture %b) nounwind optsize ssp {
+entry:
+ %0 = zext i8 0 to i32 ; <i32> [#uses=2]
+ %1 = load i8* null, align 1 ; <i8> [#uses=2]
+ %2 = zext i8 %1 to i32 ; <i32> [#uses=1]
+ %3 = sub i32 %0, %2 ; <i32> [#uses=1]
+ %4 = icmp eq i8 0, %1 ; <i1> [#uses=1]
+ br i1 %4, label %bb1, label %bb79
+
+bb1: ; preds = %entry
+ %5 = load i8* null, align 4 ; <i8> [#uses=2]
+ %6 = zext i8 %5 to i32 ; <i32> [#uses=2]
+ %7 = getelementptr %struct.pf_state_key* %b, i32 0, i32 3 ; <i8*> [#uses=1]
+ %8 = load i8* %7, align 4 ; <i8> [#uses=2]
+ %9 = zext i8 %8 to i32 ; <i32> [#uses=1]
+ %10 = sub i32 %6, %9 ; <i32> [#uses=1]
+ %11 = icmp eq i8 %5, %8 ; <i1> [#uses=1]
+ br i1 %11, label %bb3, label %bb79
+
+bb3: ; preds = %bb1
+ switch i32 %0, label %bb23 [
+ i32 1, label %bb4
+ i32 6, label %bb6
+ i32 17, label %bb10
+ i32 47, label %bb17
+ i32 50, label %bb21
+ i32 58, label %bb4
+ ]
+
+bb4: ; preds = %bb3, %bb3
+ %12 = load i16* null, align 4 ; <i16> [#uses=1]
+ %13 = zext i16 %12 to i32 ; <i32> [#uses=1]
+ %14 = sub i32 0, %13 ; <i32> [#uses=1]
+ br i1 false, label %bb23, label %bb79
+
+bb6: ; preds = %bb3
+ %15 = load i16* null, align 4 ; <i16> [#uses=1]
+ %16 = zext i16 %15 to i32 ; <i32> [#uses=1]
+ %17 = sub i32 0, %16 ; <i32> [#uses=1]
+ ret i32 %17
+
+bb10: ; preds = %bb3
+ %18 = load i8* null, align 1 ; <i8> [#uses=2]
+ %19 = zext i8 %18 to i32 ; <i32> [#uses=1]
+ %20 = sub i32 0, %19 ; <i32> [#uses=1]
+ %21 = icmp eq i8 0, %18 ; <i1> [#uses=1]
+ br i1 %21, label %bb12, label %bb79
+
+bb12: ; preds = %bb10
+ %22 = load i16* null, align 4 ; <i16> [#uses=1]
+ %23 = zext i16 %22 to i32 ; <i32> [#uses=1]
+ %24 = sub i32 0, %23 ; <i32> [#uses=1]
+ ret i32 %24
+
+bb17: ; preds = %bb3
+ %25 = load i8* null, align 1 ; <i8> [#uses=2]
+ %26 = icmp eq i8 %25, 1 ; <i1> [#uses=1]
+ br i1 %26, label %bb18, label %bb23
+
+bb18: ; preds = %bb17
+ %27 = icmp eq i8 %25, 0 ; <i1> [#uses=1]
+ br i1 %27, label %bb19, label %bb23
+
+bb19: ; preds = %bb18
+ %28 = load i16* null, align 4 ; <i16> [#uses=1]
+ %29 = zext i16 %28 to i32 ; <i32> [#uses=1]
+ %30 = sub i32 0, %29 ; <i32> [#uses=1]
+ br i1 false, label %bb23, label %bb79
+
+bb21: ; preds = %bb3
+ %31 = getelementptr %struct.pf_state_key* %a, i32 0, i32 1, i32 1, i32 0 ; <i32*> [#uses=1]
+ %32 = load i32* %31, align 4 ; <i32> [#uses=2]
+ %33 = getelementptr %struct.pf_state_key* %b, i32 0, i32 1, i32 1, i32 0 ; <i32*> [#uses=1]
+ %34 = load i32* %33, align 4 ; <i32> [#uses=2]
+ %35 = sub i32 %32, %34 ; <i32> [#uses=1]
+ %36 = icmp eq i32 %32, %34 ; <i1> [#uses=1]
+ br i1 %36, label %bb23, label %bb79
+
+bb23: ; preds = %bb21, %bb19, %bb18, %bb17, %bb4, %bb3
+ %cond = icmp eq i32 %6, 2 ; <i1> [#uses=1]
+ br i1 %cond, label %bb24, label %bb70
+
+bb24: ; preds = %bb23
+ ret i32 1
+
+bb70: ; preds = %bb23
+ %37 = load i32 (%struct.pf_app_state*, %struct.pf_app_state*)** null, align 4 ; <i32 (%struct.pf_app_state*, %struct.pf_app_state*)*> [#uses=3]
+ br i1 false, label %bb78, label %bb73
+
+bb73: ; preds = %bb70
+ %38 = load i32 (%struct.pf_app_state*, %struct.pf_app_state*)** null, align 4 ; <i32 (%struct.pf_app_state*, %struct.pf_app_state*)*> [#uses=2]
+ %39 = icmp eq i32 (%struct.pf_app_state*, %struct.pf_app_state*)* %38, null ; <i1> [#uses=1]
+ br i1 %39, label %bb78, label %bb74
+
+bb74: ; preds = %bb73
+ %40 = ptrtoint i32 (%struct.pf_app_state*, %struct.pf_app_state*)* %37 to i32 ; <i32> [#uses=1]
+ %41 = sub i32 0, %40 ; <i32> [#uses=1]
+ %42 = icmp eq i32 (%struct.pf_app_state*, %struct.pf_app_state*)* %38, %37 ; <i1> [#uses=1]
+ br i1 %42, label %bb76, label %bb79
+
+bb76: ; preds = %bb74
+ %43 = tail call i32 %37(%struct.pf_app_state* null, %struct.pf_app_state* null) nounwind ; <i32> [#uses=1]
+ ret i32 %43
+
+bb78: ; preds = %bb73, %bb70
+ ret i32 0
+
+bb79: ; preds = %bb74, %bb21, %bb19, %bb10, %bb4, %bb1, %entry
+ %.0 = phi i32 [ %3, %entry ], [ %10, %bb1 ], [ %14, %bb4 ], [ %20, %bb10 ], [ %30, %bb19 ], [ %35, %bb21 ], [ %41, %bb74 ] ; <i32> [#uses=1]
+ ret i32 %.0
+}
diff --git a/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll b/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll
new file mode 100644
index 0000000..d1f9cf8
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll
@@ -0,0 +1,117 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -disable-fp-elim -relocation-model=pic
+; PR4099
+
+ type { [62 x %struct.Bitvec*] } ; type %0
+ type { i8* } ; type %1
+ type { double } ; type %2
+ %struct..5sPragmaType = type { i8*, i32 }
+ %struct.AggInfo = type { i8, i8, i32, %struct.ExprList*, i32, %struct.AggInfo_col*, i32, i32, i32, %struct.AggInfo_func*, i32, i32 }
+ %struct.AggInfo_col = type { %struct.Table*, i32, i32, i32, i32, %struct.Expr* }
+ %struct.AggInfo_func = type { %struct.Expr*, %struct.FuncDef*, i32, i32 }
+ %struct.AuxData = type { i8*, void (i8*)* }
+ %struct.Bitvec = type { i32, i32, i32, %0 }
+ %struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* }
+ %struct.BtLock = type { %struct.Btree*, i32, i8, %struct.BtLock* }
+ %struct.BtShared = type { %struct.Pager*, %struct.sqlite3*, %struct.BtCursor*, %struct.MemPage*, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, i8, i32, i8*, void (i8*)*, %struct.sqlite3_mutex*, %struct.BusyHandler, i32, %struct.BtShared*, %struct.BtLock*, %struct.Btree* }
+ %struct.Btree = type { %struct.sqlite3*, %struct.BtShared*, i8, i8, i8, i32, %struct.Btree*, %struct.Btree* }
+ %struct.BtreeMutexArray = type { i32, [11 x %struct.Btree*] }
+ %struct.BusyHandler = type { i32 (i8*, i32)*, i8*, i32 }
+ %struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 }
+ %struct.CollSeq = type { i8*, i8, i8, i8*, i32 (i8*, i32, i8*, i32, i8*)*, void (i8*)* }
+ %struct.Column = type { i8*, %struct.Expr*, i8*, i8*, i8, i8, i8, i8 }
+ %struct.Context = type { i64, i32, %struct.Fifo }
+ %struct.CountCtx = type { i64 }
+ %struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8* }
+ %struct.Db = type { i8*, %struct.Btree*, i8, i8, i8*, void (i8*)*, %struct.Schema* }
+ %struct.DbPage = type { %struct.Pager*, i32, %struct.DbPage*, %struct.DbPage*, %struct.PagerLruLink, %struct.DbPage*, i8, i8, i8, i8, i8, i16, %struct.DbPage*, %struct.DbPage*, i8* }
+ %struct.Expr = type { i8, i8, i16, %struct.CollSeq*, %struct.Expr*, %struct.Expr*, %struct.ExprList*, %struct..5sPragmaType, %struct..5sPragmaType, i32, i32, %struct.AggInfo*, i32, i32, %struct.Select*, %struct.Table*, i32 }
+ %struct.ExprList = type { i32, i32, i32, %struct.ExprList_item* }
+ %struct.ExprList_item = type { %struct.Expr*, i8*, i8, i8, i8 }
+ %struct.FKey = type { %struct.Table*, %struct.FKey*, i8*, %struct.FKey*, i32, %struct.sColMap*, i8, i8, i8, i8 }
+ %struct.Fifo = type { i32, %struct.FifoPage*, %struct.FifoPage* }
+ %struct.FifoPage = type { i32, i32, i32, %struct.FifoPage*, [1 x i64] }
+ %struct.FuncDef = type { i16, i8, i8, i8, i8*, %struct.FuncDef*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*)*, [1 x i8] }
+ %struct.Hash = type { i8, i8, i32, i32, %struct.HashElem*, %struct._ht* }
+ %struct.HashElem = type { %struct.HashElem*, %struct.HashElem*, i8*, i8*, i32 }
+ %struct.IdList = type { %struct..5sPragmaType*, i32, i32 }
+ %struct.Index = type { i8*, i32, i32*, i32*, %struct.Table*, i32, i8, i8, i8*, %struct.Index*, %struct.Schema*, i8*, i8** }
+ %struct.KeyInfo = type { %struct.sqlite3*, i8, i8, i8, i32, i8*, [1 x %struct.CollSeq*] }
+ %struct.Mem = type { %struct.CountCtx, double, %struct.sqlite3*, i8*, i32, i16, i8, i8, void (i8*)* }
+ %struct.MemPage = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, [5 x %struct._OvflCell], %struct.BtShared*, i8*, %struct.DbPage*, i32, %struct.MemPage* }
+ %struct.Module = type { %struct.sqlite3_module*, i8*, i8*, void (i8*)* }
+ %struct.Op = type { i8, i8, i8, i8, i32, i32, i32, %1 }
+ %struct.Pager = type { %struct.sqlite3_vfs*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Bitvec*, %struct.Bitvec*, i8*, i8*, i8*, i8*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.BusyHandler*, %struct.PagerLruList, %struct.DbPage*, %struct.DbPage*, %struct.DbPage*, i64, i64, i64, i64, i64, i32, void (%struct.DbPage*, i32)*, void (%struct.DbPage*, i32)*, i32, %struct.DbPage**, i8*, [16 x i8] }
+ %struct.PagerLruLink = type { %struct.DbPage*, %struct.DbPage* }
+ %struct.PagerLruList = type { %struct.DbPage*, %struct.DbPage*, %struct.DbPage* }
+ %struct.Schema = type { i32, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Table*, i8, i8, i16, i32, %struct.sqlite3* }
+ %struct.Select = type { %struct.ExprList*, i8, i8, i8, i8, i8, i8, i8, %struct.SrcList*, %struct.Expr*, %struct.ExprList*, %struct.Expr*, %struct.ExprList*, %struct.Select*, %struct.Select*, %struct.Select*, %struct.Expr*, %struct.Expr*, i32, i32, [3 x i32] }
+ %struct.SrcList = type { i16, i16, [1 x %struct.SrcList_item] }
+ %struct.SrcList_item = type { i8*, i8*, i8*, %struct.Table*, %struct.Select*, i8, i8, i32, %struct.Expr*, %struct.IdList*, i64 }
+ %struct.Table = type { i8*, i32, %struct.Column*, i32, %struct.Index*, i32, %struct.Select*, i32, %struct.Trigger*, %struct.FKey*, i8*, %struct.Expr*, i32, i8, i8, i8, i8, i8, i8, i8, %struct.Module*, %struct.sqlite3_vtab*, i32, i8**, %struct.Schema* }
+ %struct.Trigger = type { i8*, i8*, i8, i8, %struct.Expr*, %struct.IdList*, %struct..5sPragmaType, %struct.Schema*, %struct.Schema*, %struct.TriggerStep*, %struct.Trigger* }
+ %struct.TriggerStep = type { i32, i32, %struct.Trigger*, %struct.Select*, %struct..5sPragmaType, %struct.Expr*, %struct.ExprList*, %struct.IdList*, %struct.TriggerStep*, %struct.TriggerStep* }
+ %struct.Vdbe = type { %struct.sqlite3*, %struct.Vdbe*, %struct.Vdbe*, i32, i32, %struct.Op*, i32, i32, i32*, %struct.Mem**, %struct.Mem*, i32, %struct.Cursor**, i32, %struct.Mem*, i8**, i32, i32, i32, %struct.Mem*, i32, i32, %struct.Fifo, i32, i32, %struct.Context*, i32, i32, i32, i32, i32, [25 x i32], i32, i32, i8**, i8*, %struct.Mem*, i8, i8, i8, i8, i8, i8, i32, i64, i32, %struct.BtreeMutexArray, i32, i8*, i32 }
+ %struct.VdbeFunc = type { %struct.FuncDef*, i32, [1 x %struct.AuxData] }
+ %struct._OvflCell = type { i8*, i16 }
+ %struct._ht = type { i32, %struct.HashElem* }
+ %struct.sColMap = type { i32, i8* }
+ %struct.sqlite3 = type { %struct.sqlite3_vfs*, i32, %struct.Db*, i32, i32, i32, i32, i8, i8, i8, i8, i32, %struct.CollSeq*, i64, i64, i32, i32, i32, %struct.sqlite3_mutex*, %struct.sqlite3InitInfo, i32, i8**, %struct.Vdbe*, i32, void (i8*, i8*)*, i8*, void (i8*, i8*, i64)*, i8*, i8*, i32 (i8*)*, i8*, void (i8*)*, i8*, void (i8*, i32, i8*, i8*, i64)*, void (i8*, %struct.sqlite3*, i32, i8*)*, void (i8*, %struct.sqlite3*, i32, i8*)*, i8*, %struct.Mem*, i8*, i8*, %2, i32 (i8*, i32, i8*, i8*, i8*, i8*)*, i8*, i32 (i8*)*, i8*, i32, %struct.Hash, %struct.Table*, %struct.sqlite3_vtab**, i32, %struct.Hash, %struct.Hash, %struct.BusyHandler, i32, [2 x %struct.Db], i8 }
+ %struct.sqlite3InitInfo = type { i32, i32, i8 }
+ %struct.sqlite3_context = type { %struct.FuncDef*, %struct.VdbeFunc*, %struct.Mem, %struct.Mem*, i32, %struct.CollSeq* }
+ %struct.sqlite3_file = type { %struct.sqlite3_io_methods* }
+ %struct.sqlite3_index_constraint = type { i32, i8, i8, i32 }
+ %struct.sqlite3_index_constraint_usage = type { i32, i8 }
+ %struct.sqlite3_index_info = type { i32, %struct.sqlite3_index_constraint*, i32, %struct.sqlite3_index_constraint_usage*, %struct.sqlite3_index_constraint_usage*, i32, i8*, i32, i32, double }
+ %struct.sqlite3_io_methods = type { i32, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i64)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i64*)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i32, i8*)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*)* }
+ %struct.sqlite3_module = type { i32, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_index_info*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_vtab_cursor**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, i32, i8*, i32, %struct.Mem**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, %struct.sqlite3_context*, i32)*, i32 (%struct.sqlite3_vtab_cursor*, i64*)*, i32 (%struct.sqlite3_vtab*, i32, %struct.Mem**, i64*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, i32, i8*, void (%struct.sqlite3_context*, i32, %struct.Mem**)**, i8**)*, i32 (%struct.sqlite3_vtab*, i8*)* }
+ %struct.sqlite3_mutex = type opaque
+ %struct.sqlite3_vfs = type { i32, i32, i32, %struct.sqlite3_vfs*, i8*, i8*, i32 (%struct.sqlite3_vfs*, i8*, %struct.sqlite3_file*, i32, i32*)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i8*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*)*, void (%struct.sqlite3_vfs*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*, i8*)*, void (%struct.sqlite3_vfs*, i8*)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i32)*, i32 (%struct.sqlite3_vfs*, double*)* }
+ %struct.sqlite3_vtab = type { %struct.sqlite3_module*, i32, i8* }
+ %struct.sqlite3_vtab_cursor = type { %struct.sqlite3_vtab* }
+
+define fastcc void @dropCell(%struct.MemPage* nocapture %pPage, i32 %idx, i32 %sz) nounwind ssp {
+entry:
+ %0 = load i8** null, align 8 ; <i8*> [#uses=4]
+ %1 = or i32 0, 0 ; <i32> [#uses=1]
+ %2 = icmp slt i32 %sz, 4 ; <i1> [#uses=1]
+ %size_addr.0.i = select i1 %2, i32 4, i32 %sz ; <i32> [#uses=1]
+ br label %bb3.i
+
+bb3.i: ; preds = %bb3.i, %entry
+ %3 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ %or.cond.i = or i1 %3, false ; <i1> [#uses=1]
+ br i1 %or.cond.i, label %bb5.i, label %bb3.i
+
+bb5.i: ; preds = %bb3.i
+ %4 = getelementptr i8* %0, i64 0 ; <i8*> [#uses=1]
+ store i8 0, i8* %4, align 1
+ %5 = getelementptr i8* %0, i64 0 ; <i8*> [#uses=1]
+ store i8 0, i8* %5, align 1
+ %6 = add i32 %1, 2 ; <i32> [#uses=1]
+ %7 = zext i32 %6 to i64 ; <i64> [#uses=2]
+ %8 = getelementptr i8* %0, i64 %7 ; <i8*> [#uses=1]
+ %9 = lshr i32 %size_addr.0.i, 8 ; <i32> [#uses=1]
+ %10 = trunc i32 %9 to i8 ; <i8> [#uses=1]
+ store i8 %10, i8* %8, align 1
+ %.sum31.i = add i64 %7, 1 ; <i64> [#uses=1]
+ %11 = getelementptr i8* %0, i64 %.sum31.i ; <i8*> [#uses=1]
+ store i8 0, i8* %11, align 1
+ br label %bb11.outer.i
+
+bb11.outer.i: ; preds = %bb11.outer.i, %bb5.i
+ %12 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %12, label %bb12.i, label %bb11.outer.i
+
+bb12.i: ; preds = %bb11.outer.i
+ %i.08 = add i32 %idx, 1 ; <i32> [#uses=1]
+ %13 = icmp sgt i32 0, %i.08 ; <i1> [#uses=1]
+ br i1 %13, label %bb, label %bb2
+
+bb: ; preds = %bb12.i
+ br label %bb2
+
+bb2: ; preds = %bb, %bb12.i
+ %14 = getelementptr %struct.MemPage* %pPage, i64 0, i32 1 ; <i8*> [#uses=1]
+ store i8 1, i8* %14, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-04-scale.ll b/test/CodeGen/X86/2009-04-scale.ll
new file mode 100644
index 0000000..e4c756c
--- /dev/null
+++ b/test/CodeGen/X86/2009-04-scale.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-unknown-linux-gnu
+; PR3995
+
+ %struct.vtable = type { i32 (...)** }
+ %struct.array = type { %struct.impl, [256 x %struct.pair], [256 x %struct.pair], [256 x %struct.pair], [256 x %struct.pair], [256 x %struct.pair], [256 x %struct.pair] }
+ %struct.impl = type { %struct.vtable, i8, %struct.impl*, i32, i32, i64, i64 }
+ %struct.pair = type { i64, i64 }
+
+define void @test() {
+entry:
+ %0 = load i32* null, align 4 ; <i32> [#uses=1]
+ %1 = lshr i32 %0, 8 ; <i32> [#uses=1]
+ %2 = and i32 %1, 255 ; <i32> [#uses=1]
+ %3 = getelementptr %struct.array* null, i32 0, i32 3 ; <[256 x %struct.pair]*> [#uses=1]
+ %4 = getelementptr [256 x %struct.pair]* %3, i32 0, i32 %2 ; <%struct.pair*> [#uses=1]
+ %5 = getelementptr %struct.pair* %4, i32 0, i32 1 ; <i64*> [#uses=1]
+ %6 = load i64* %5, align 4 ; <i64> [#uses=1]
+ %7 = xor i64 0, %6 ; <i64> [#uses=1]
+ %8 = xor i64 %7, 0 ; <i64> [#uses=1]
+ %9 = xor i64 %8, 0 ; <i64> [#uses=1]
+ store i64 %9, i64* null, align 8
+ unreachable
+}
diff --git a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
new file mode 100644
index 0000000..738b5fb
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -relocation-model=static > %t
+; RUN: grep "1: ._pv_cpu_ops+8" %t
+; RUN: grep "2: ._G" %t
+; PR4152
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ %struct.pv_cpu_ops = type { i32, [2 x i32] }
+@pv_cpu_ops = external global %struct.pv_cpu_ops ; <%struct.pv_cpu_ops*> [#uses=1]
+@G = external global i32 ; <i32*> [#uses=1]
+
+define void @x() nounwind {
+entry:
+ tail call void asm sideeffect "1: $0", "i,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr (%struct.pv_cpu_ops* @pv_cpu_ops, i32 0, i32 1, i32 1)) nounwind
+ tail call void asm sideeffect "2: $0", "i,~{dirflag},~{fpsr},~{flags}"(i32* @G) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll b/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
new file mode 100644
index 0000000..a5e28c0
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86
+; PR4188
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+@g_9 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @int86(i32 %p_87) nounwind {
+entry:
+ %0 = trunc i32 %p_87 to i8 ; <i8> [#uses=1]
+ %1 = icmp ne i8 %0, 0 ; <i1> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb.i, %bb, %entry
+ %2 = volatile load i32* @g_9, align 4 ; <i32> [#uses=2]
+ %3 = icmp sgt i32 %2, 1 ; <i1> [#uses=1]
+ %4 = and i1 %3, %1 ; <i1> [#uses=1]
+ br i1 %4, label %bb.i, label %bb
+
+bb.i: ; preds = %bb
+ %5 = icmp sgt i32 0, %2 ; <i1> [#uses=0]
+ br label %bb
+}
diff --git a/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll b/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll
new file mode 100644
index 0000000..6e062fb
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86-64
+; PR3886
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+entry:
+ %a = call <1 x i64> @bar()
+ %tmp5.i = extractelement <1 x i64> %a, i32 0
+ %tmp11 = bitcast i64 %tmp5.i to <1 x i64>
+ %tmp8 = extractelement <1 x i64> %tmp11, i32 0
+ %call6 = call i32 (i64)* @foo(i64 %tmp8)
+ ret i32 undef
+}
+
+declare i32 @foo(i64)
+
+declare <1 x i64> @bar()
diff --git a/test/CodeGen/X86/2009-05-23-available_externally.ll b/test/CodeGen/X86/2009-05-23-available_externally.ll
new file mode 100644
index 0000000..94773d9
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-23-available_externally.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -relocation-model=pic | grep atoi | grep PLT
+; PR4253
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define i32 @foo(i8* %x) nounwind readonly {
+entry:
+ %call = tail call fastcc i32 @atoi(i8* %x) nounwind readonly ; <i32> [#uses=1]
+ ret i32 %call
+}
+
+define available_externally fastcc i32 @atoi(i8* %__nptr) nounwind readonly {
+entry:
+ %call = tail call i64 @strtol(i8* nocapture %__nptr, i8** null, i32 10) nounwind readonly ; <i64> [#uses=1]
+ %conv = trunc i64 %call to i32 ; <i32> [#uses=1]
+ ret i32 %conv
+}
+
+declare i64 @strtol(i8*, i8** nocapture, i32) nounwind
diff --git a/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll b/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll
new file mode 100644
index 0000000..3cd5416
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s | FileCheck %s
+
+; Check that the shr(shl X, 56), 48) is not mistakenly turned into
+; a shr (X, -8) that gets subsequently "optimized away" as undef
+; PR4254
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define i64 @foo(i64 %b) nounwind readnone {
+entry:
+; CHECK: foo:
+; CHECK: shlq $56, %rdi
+; CHECK: sarq $48, %rdi
+; CHECK: leaq 1(%rdi), %rax
+ %shl = shl i64 %b, 56 ; <i64> [#uses=1]
+ %shr = ashr i64 %shl, 48 ; <i64> [#uses=1]
+ %add5 = or i64 %shr, 1 ; <i64> [#uses=1]
+ ret i64 %add5
+}
diff --git a/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll b/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
new file mode 100644
index 0000000..2fd42f4
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=x86-64
+
+ %struct.tempsym_t = type { i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32 }
+
+define fastcc signext i8 @S_next_symbol(%struct.tempsym_t* %symptr) nounwind ssp {
+entry:
+ br label %bb116
+
+bb: ; preds = %bb116
+ switch i8 undef, label %bb14 [
+ i8 9, label %bb116
+ i8 32, label %bb116
+ i8 10, label %bb116
+ i8 13, label %bb116
+ i8 12, label %bb116
+ ]
+
+bb14: ; preds = %bb
+ br i1 undef, label %bb75, label %bb115
+
+bb75: ; preds = %bb14
+ %srcval16 = load i448* null, align 8 ; <i448> [#uses=1]
+ %tmp = zext i32 undef to i448 ; <i448> [#uses=1]
+ %tmp15 = shl i448 %tmp, 288 ; <i448> [#uses=1]
+ %mask = and i448 %srcval16, -2135987035423586845985235064014169866455883682256196619149693890381755748887481053010428711403521 ; <i448> [#uses=1]
+ %ins = or i448 %tmp15, %mask ; <i448> [#uses=1]
+ store i448 %ins, i448* null, align 8
+ ret i8 1
+
+bb115: ; preds = %bb14
+ ret i8 1
+
+bb116: ; preds = %bb, %bb, %bb, %bb, %bb, %entry
+ br i1 undef, label %bb, label %bb117
+
+bb117: ; preds = %bb116
+ ret i8 0
+}
diff --git a/test/CodeGen/X86/2009-05-30-ISelBug.ll b/test/CodeGen/X86/2009-05-30-ISelBug.ll
new file mode 100644
index 0000000..af552d4
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-30-ISelBug.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86-64 | not grep {movzbl %\[abcd\]h,}
+
+define void @BZ2_bzDecompress_bb5_2E_outer_bb35_2E_i_bb54_2E_i(i32*, i32 %c_nblock_used.2.i, i32 %.reload51, i32* %.out, i32* %.out1, i32* %.out2, i32* %.out3) nounwind {
+newFuncRoot:
+ br label %bb54.i
+
+bb35.i.backedge.exitStub: ; preds = %bb54.i
+ store i32 %6, i32* %.out
+ store i32 %10, i32* %.out1
+ store i32 %11, i32* %.out2
+ store i32 %12, i32* %.out3
+ ret void
+
+bb54.i: ; preds = %newFuncRoot
+ %1 = zext i32 %.reload51 to i64 ; <i64> [#uses=1]
+ %2 = getelementptr i32* %0, i64 %1 ; <i32*> [#uses=1]
+ %3 = load i32* %2, align 4 ; <i32> [#uses=2]
+ %4 = lshr i32 %3, 8 ; <i32> [#uses=1]
+ %5 = and i32 %3, 255 ; <i32> [#uses=1]
+ %6 = add i32 %5, 4 ; <i32> [#uses=1]
+ %7 = zext i32 %4 to i64 ; <i64> [#uses=1]
+ %8 = getelementptr i32* %0, i64 %7 ; <i32*> [#uses=1]
+ %9 = load i32* %8, align 4 ; <i32> [#uses=2]
+ %10 = and i32 %9, 255 ; <i32> [#uses=1]
+ %11 = lshr i32 %9, 8 ; <i32> [#uses=1]
+ %12 = add i32 %c_nblock_used.2.i, 5 ; <i32> [#uses=1]
+ br label %bb35.i.backedge.exitStub
+}
diff --git a/test/CodeGen/X86/2009-06-02-RewriterBug.ll b/test/CodeGen/X86/2009-06-02-RewriterBug.ll
new file mode 100644
index 0000000..779f985
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-02-RewriterBug.ll
@@ -0,0 +1,362 @@
+; RUN: llc < %s -mtriple=x86_64-undermydesk-freebsd8.0 -relocation-model=pic -disable-fp-elim
+; PR4225
+
+define void @sha256_block1(i32* nocapture %arr, i8* nocapture %in, i64 %num) nounwind {
+entry:
+ br i1 undef, label %while.end, label %bb.nph
+
+bb.nph: ; preds = %entry
+ br label %while.body
+
+while.body: ; preds = %for.end, %bb.nph
+ %indvar2787 = phi i64 [ 0, %bb.nph ], [ %indvar.next2788, %for.end ] ; <i64> [#uses=2]
+ %tmp2791 = mul i64 %indvar2787, 44 ; <i64> [#uses=0]
+ %ctg22996 = getelementptr i8* %in, i64 0 ; <i8*> [#uses=1]
+ %conv = zext i32 undef to i64 ; <i64> [#uses=1]
+ %conv11 = zext i32 undef to i64 ; <i64> [#uses=1]
+ %tmp18 = load i32* undef ; <i32> [#uses=1]
+ %conv19 = zext i32 %tmp18 to i64 ; <i64> [#uses=1]
+ %tmp30 = load i32* undef ; <i32> [#uses=1]
+ %conv31 = zext i32 %tmp30 to i64 ; <i64> [#uses=4]
+ %ptrincdec3065 = load i8* null ; <i8> [#uses=1]
+ %conv442709 = zext i8 %ptrincdec3065 to i64 ; <i64> [#uses=1]
+ %shl45 = shl i64 %conv442709, 16 ; <i64> [#uses=1]
+ %conv632707 = zext i8 undef to i64 ; <i64> [#uses=1]
+ %or = or i64 %shl45, 0 ; <i64> [#uses=1]
+ %or55 = or i64 %or, %conv632707 ; <i64> [#uses=1]
+ %or64 = or i64 %or55, 0 ; <i64> [#uses=1]
+ %shr85 = lshr i64 %conv31, 25 ; <i64> [#uses=0]
+ %add = add i64 %conv11, 1508970993 ; <i64> [#uses=1]
+ %add95 = add i64 %add, 0 ; <i64> [#uses=1]
+ %add98 = add i64 %add95, 0 ; <i64> [#uses=1]
+ %add99 = add i64 %add98, %or64 ; <i64> [#uses=1]
+ %add134 = add i64 %add99, 0 ; <i64> [#uses=4]
+ store i32 undef, i32* undef
+ %shl187 = shl i64 %add134, 21 ; <i64> [#uses=0]
+ %and203 = and i64 %add134, %conv31 ; <i64> [#uses=1]
+ %xor208 = xor i64 0, %and203 ; <i64> [#uses=1]
+ %add212 = add i64 0, %xor208 ; <i64> [#uses=1]
+ %add213 = add i64 %add212, 0 ; <i64> [#uses=1]
+ %add248 = add i64 %add213, 0 ; <i64> [#uses=3]
+ %conv2852690 = zext i8 undef to i64 ; <i64> [#uses=1]
+ %or277 = or i64 0, %conv2852690 ; <i64> [#uses=1]
+ %or286 = or i64 %or277, 0 ; <i64> [#uses=1]
+ %neg319 = xor i64 %add248, 4294967295 ; <i64> [#uses=1]
+ %and321 = and i64 %neg319, %conv31 ; <i64> [#uses=1]
+ %xor322 = xor i64 %and321, 0 ; <i64> [#uses=1]
+ %add314 = add i64 %conv, 2870763221 ; <i64> [#uses=1]
+ %add323 = add i64 %add314, %or286 ; <i64> [#uses=1]
+ %add326 = add i64 %add323, %xor322 ; <i64> [#uses=1]
+ %add327 = add i64 %add326, 0 ; <i64> [#uses=2]
+ %add362 = add i64 %add327, %conv19 ; <i64> [#uses=4]
+ %add365 = add i64 0, %add327 ; <i64> [#uses=3]
+ %shl409 = shl i64 %add362, 26 ; <i64> [#uses=0]
+ %and431 = and i64 %add362, %add248 ; <i64> [#uses=1]
+ %neg433 = xor i64 %add362, -1 ; <i64> [#uses=1]
+ %and435 = and i64 %add134, %neg433 ; <i64> [#uses=1]
+ %xor436 = xor i64 %and431, %and435 ; <i64> [#uses=1]
+ %add428 = add i64 %conv31, 3624381080 ; <i64> [#uses=1]
+ %add437 = add i64 %add428, 0 ; <i64> [#uses=1]
+ %add440 = add i64 %add437, %xor436 ; <i64> [#uses=1]
+ %add441 = add i64 %add440, 0 ; <i64> [#uses=1]
+ %shl443 = shl i64 %add365, 30 ; <i64> [#uses=1]
+ %and445 = lshr i64 %add365, 2 ; <i64> [#uses=1]
+ %shr446 = and i64 %and445, 1073741823 ; <i64> [#uses=1]
+ %or447 = or i64 %shr446, %shl443 ; <i64> [#uses=1]
+ %xor461 = xor i64 0, %or447 ; <i64> [#uses=1]
+ %add473 = add i64 %xor461, 0 ; <i64> [#uses=1]
+ %add479 = add i64 %add473, %add441 ; <i64> [#uses=3]
+ %conv4932682 = zext i8 undef to i64 ; <i64> [#uses=1]
+ %shl494 = shl i64 %conv4932682, 16 ; <i64> [#uses=1]
+ %ptrincdec4903012 = load i8* null ; <i8> [#uses=1]
+ %conv5032681 = zext i8 %ptrincdec4903012 to i64 ; <i64> [#uses=1]
+ %shl504 = shl i64 %conv5032681, 8 ; <i64> [#uses=1]
+ %ptrincdec5003009 = load i8* null ; <i8> [#uses=1]
+ %conv5132680 = zext i8 %ptrincdec5003009 to i64 ; <i64> [#uses=1]
+ %or495 = or i64 %shl494, 0 ; <i64> [#uses=1]
+ %or505 = or i64 %or495, %conv5132680 ; <i64> [#uses=1]
+ %or514 = or i64 %or505, %shl504 ; <i64> [#uses=1]
+ store i32 undef, i32* undef
+ %or540 = or i64 undef, 0 ; <i64> [#uses=0]
+ %add542 = add i64 %add134, 310598401 ; <i64> [#uses=1]
+ %add551 = add i64 %add542, %or514 ; <i64> [#uses=1]
+ %add554 = add i64 %add551, 0 ; <i64> [#uses=1]
+ %add555 = add i64 %add554, 0 ; <i64> [#uses=1]
+ %or561 = or i64 undef, undef ; <i64> [#uses=1]
+ %or567 = or i64 undef, undef ; <i64> [#uses=1]
+ %and572 = lshr i64 %add479, 22 ; <i64> [#uses=1]
+ %shr573 = and i64 %and572, 1023 ; <i64> [#uses=1]
+ %or574 = or i64 %shr573, 0 ; <i64> [#uses=1]
+ %xor568 = xor i64 %or567, %or574 ; <i64> [#uses=1]
+ %xor575 = xor i64 %xor568, %or561 ; <i64> [#uses=1]
+ %add587 = add i64 %xor575, 0 ; <i64> [#uses=1]
+ %add593 = add i64 %add587, %add555 ; <i64> [#uses=1]
+ %ptrincdec6043000 = load i8* null ; <i8> [#uses=1]
+ %conv6172676 = zext i8 %ptrincdec6043000 to i64 ; <i64> [#uses=1]
+ %shl618 = shl i64 %conv6172676, 8 ; <i64> [#uses=1]
+ %ptrincdec6142997 = load i8* %ctg22996 ; <i8> [#uses=1]
+ %conv6272675 = zext i8 %ptrincdec6142997 to i64 ; <i64> [#uses=1]
+ %or619 = or i64 0, %conv6272675 ; <i64> [#uses=1]
+ %or628 = or i64 %or619, %shl618 ; <i64> [#uses=1]
+ %add656 = add i64 %add248, 607225278 ; <i64> [#uses=1]
+ %add665 = add i64 %add656, %or628 ; <i64> [#uses=1]
+ %add668 = add i64 %add665, 0 ; <i64> [#uses=1]
+ %add669 = add i64 %add668, 0 ; <i64> [#uses=1]
+ %and699 = and i64 %add479, %add365 ; <i64> [#uses=1]
+ %xor700 = xor i64 0, %and699 ; <i64> [#uses=1]
+ %add701 = add i64 0, %xor700 ; <i64> [#uses=1]
+ %add707 = add i64 %add701, %add669 ; <i64> [#uses=4]
+ %ptrincdec6242994 = load i8* null ; <i8> [#uses=1]
+ %conv7122673 = zext i8 %ptrincdec6242994 to i64 ; <i64> [#uses=1]
+ %shl713 = shl i64 %conv7122673, 24 ; <i64> [#uses=1]
+ %conv7412670 = zext i8 undef to i64 ; <i64> [#uses=1]
+ %or723 = or i64 0, %shl713 ; <i64> [#uses=1]
+ %or733 = or i64 %or723, %conv7412670 ; <i64> [#uses=1]
+ %or742 = or i64 %or733, 0 ; <i64> [#uses=2]
+ %conv743 = trunc i64 %or742 to i32 ; <i32> [#uses=1]
+ store i32 %conv743, i32* undef
+ %xor762 = xor i64 undef, 0 ; <i64> [#uses=0]
+ %add770 = add i64 %add362, 1426881987 ; <i64> [#uses=1]
+ %add779 = add i64 %add770, %or742 ; <i64> [#uses=1]
+ %add782 = add i64 %add779, 0 ; <i64> [#uses=1]
+ %add783 = add i64 %add782, 0 ; <i64> [#uses=1]
+ %shl785 = shl i64 %add707, 30 ; <i64> [#uses=1]
+ %and787 = lshr i64 %add707, 2 ; <i64> [#uses=1]
+ %shr788 = and i64 %and787, 1073741823 ; <i64> [#uses=1]
+ %or789 = or i64 %shr788, %shl785 ; <i64> [#uses=1]
+ %shl791 = shl i64 %add707, 19 ; <i64> [#uses=0]
+ %xor803 = xor i64 0, %or789 ; <i64> [#uses=1]
+ %and813 = and i64 %add593, %add479 ; <i64> [#uses=1]
+ %xor814 = xor i64 0, %and813 ; <i64> [#uses=1]
+ %add815 = add i64 %xor803, %xor814 ; <i64> [#uses=1]
+ %add821 = add i64 %add815, %add783 ; <i64> [#uses=1]
+ %add1160 = add i64 0, %add707 ; <i64> [#uses=0]
+ %add1157 = add i64 undef, undef ; <i64> [#uses=0]
+ %ptrincdec11742940 = load i8* null ; <i8> [#uses=1]
+ %conv11872651 = zext i8 %ptrincdec11742940 to i64 ; <i64> [#uses=1]
+ %shl1188 = shl i64 %conv11872651, 8 ; <i64> [#uses=1]
+ %or1198 = or i64 0, %shl1188 ; <i64> [#uses=1]
+ store i32 undef, i32* undef
+ %add1226 = add i64 %or1198, 3248222580 ; <i64> [#uses=1]
+ %add1235 = add i64 %add1226, 0 ; <i64> [#uses=1]
+ %add1238 = add i64 %add1235, 0 ; <i64> [#uses=1]
+ %add1239 = add i64 %add1238, 0 ; <i64> [#uses=1]
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %while.body
+ %add821.pn = phi i64 [ %add821, %while.body ], [ undef, %for.body ] ; <i64> [#uses=0]
+ %add1239.pn = phi i64 [ %add1239, %while.body ], [ 0, %for.body ] ; <i64> [#uses=0]
+ br i1 undef, label %for.end, label %for.body
+
+for.body: ; preds = %for.cond
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %indvar.next2788 = add i64 %indvar2787, 1 ; <i64> [#uses=1]
+ br i1 undef, label %while.end, label %while.body
+
+while.end: ; preds = %for.end, %entry
+ ret void
+}
+
+define void @sha256_block2(i32* nocapture %arr, i8* nocapture %in, i64 %num) nounwind {
+entry:
+ br i1 undef, label %while.end, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %arrayidx5 = getelementptr i32* %arr, i64 1 ; <i32*> [#uses=1]
+ %arrayidx9 = getelementptr i32* %arr, i64 2 ; <i32*> [#uses=2]
+ %arrayidx13 = getelementptr i32* %arr, i64 3 ; <i32*> [#uses=2]
+ %arrayidx25 = getelementptr i32* %arr, i64 6 ; <i32*> [#uses=1]
+ %arrayidx29 = getelementptr i32* %arr, i64 7 ; <i32*> [#uses=1]
+ br label %while.body
+
+while.body: ; preds = %for.end, %bb.nph
+ %tmp3 = load i32* %arr ; <i32> [#uses=2]
+ %conv = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
+ %tmp10 = load i32* %arrayidx9 ; <i32> [#uses=1]
+ %conv11 = zext i32 %tmp10 to i64 ; <i64> [#uses=1]
+ %tmp14 = load i32* %arrayidx13 ; <i32> [#uses=3]
+ %conv15 = zext i32 %tmp14 to i64 ; <i64> [#uses=2]
+ %tmp18 = load i32* undef ; <i32> [#uses=2]
+ %conv19 = zext i32 %tmp18 to i64 ; <i64> [#uses=1]
+ %conv23 = zext i32 undef to i64 ; <i64> [#uses=1]
+ %tmp26 = load i32* %arrayidx25 ; <i32> [#uses=1]
+ %conv27 = zext i32 %tmp26 to i64 ; <i64> [#uses=1]
+ %tmp30 = load i32* %arrayidx29 ; <i32> [#uses=2]
+ %conv31 = zext i32 %tmp30 to i64 ; <i64> [#uses=5]
+ %shl72 = shl i64 %conv31, 26 ; <i64> [#uses=1]
+ %shr = lshr i64 %conv31, 6 ; <i64> [#uses=1]
+ %or74 = or i64 %shl72, %shr ; <i64> [#uses=1]
+ %shr85 = lshr i64 %conv31, 25 ; <i64> [#uses=0]
+ %xor87 = xor i64 0, %or74 ; <i64> [#uses=1]
+ %and902706 = and i32 %tmp30, %tmp3 ; <i32> [#uses=1]
+ %and90 = zext i32 %and902706 to i64 ; <i64> [#uses=1]
+ %xor94 = xor i64 0, %and90 ; <i64> [#uses=1]
+ %add = add i64 %conv11, 1508970993 ; <i64> [#uses=1]
+ %add95 = add i64 %add, %xor94 ; <i64> [#uses=1]
+ %add98 = add i64 %add95, %xor87 ; <i64> [#uses=1]
+ %add99 = add i64 %add98, 0 ; <i64> [#uses=2]
+ %xor130 = zext i32 undef to i64 ; <i64> [#uses=1]
+ %add134 = add i64 %add99, %conv27 ; <i64> [#uses=2]
+ %add131 = add i64 %xor130, 0 ; <i64> [#uses=1]
+ %add137 = add i64 %add131, %add99 ; <i64> [#uses=5]
+ %conv1422700 = zext i8 undef to i64 ; <i64> [#uses=1]
+ %shl143 = shl i64 %conv1422700, 24 ; <i64> [#uses=1]
+ %ptrincdec1393051 = load i8* undef ; <i8> [#uses=1]
+ %conv1512699 = zext i8 %ptrincdec1393051 to i64 ; <i64> [#uses=1]
+ %shl152 = shl i64 %conv1512699, 16 ; <i64> [#uses=1]
+ %conv1712697 = zext i8 undef to i64 ; <i64> [#uses=1]
+ %or153 = or i64 %shl152, %shl143 ; <i64> [#uses=1]
+ %or163 = or i64 %or153, %conv1712697 ; <i64> [#uses=1]
+ %or172 = or i64 %or163, 0 ; <i64> [#uses=1]
+ %and203 = and i64 %add134, %conv31 ; <i64> [#uses=1]
+ %xor208 = xor i64 0, %and203 ; <i64> [#uses=1]
+ %add200 = add i64 0, 2453635748 ; <i64> [#uses=1]
+ %add209 = add i64 %add200, %or172 ; <i64> [#uses=1]
+ %add212 = add i64 %add209, %xor208 ; <i64> [#uses=1]
+ %add213 = add i64 %add212, 0 ; <i64> [#uses=2]
+ %shl228 = shl i64 %add137, 10 ; <i64> [#uses=1]
+ %and230 = lshr i64 %add137, 22 ; <i64> [#uses=1]
+ %shr231 = and i64 %and230, 1023 ; <i64> [#uses=1]
+ %or232 = or i64 %shr231, %shl228 ; <i64> [#uses=1]
+ %xor226 = xor i64 0, %or232 ; <i64> [#uses=1]
+ %xor233 = xor i64 %xor226, 0 ; <i64> [#uses=1]
+ %and2362695 = zext i32 undef to i64 ; <i64> [#uses=1]
+ %xor240 = and i64 %add137, %and2362695 ; <i64> [#uses=1]
+ %and2432694 = and i32 %tmp18, %tmp14 ; <i32> [#uses=1]
+ %and243 = zext i32 %and2432694 to i64 ; <i64> [#uses=1]
+ %xor244 = xor i64 %xor240, %and243 ; <i64> [#uses=1]
+ %add248 = add i64 %add213, %conv23 ; <i64> [#uses=2]
+ %add245 = add i64 %xor233, %xor244 ; <i64> [#uses=1]
+ %add251 = add i64 %add245, %add213 ; <i64> [#uses=1]
+ %conv2752691 = zext i8 undef to i64 ; <i64> [#uses=1]
+ %shl276 = shl i64 %conv2752691, 8 ; <i64> [#uses=0]
+ %and317 = and i64 %add248, %add134 ; <i64> [#uses=1]
+ %neg319 = xor i64 %add248, 4294967295 ; <i64> [#uses=1]
+ %and321 = and i64 %neg319, %conv31 ; <i64> [#uses=1]
+ %xor322 = xor i64 %and321, %and317 ; <i64> [#uses=1]
+ %add314 = add i64 %conv, 2870763221 ; <i64> [#uses=1]
+ %add323 = add i64 %add314, 0 ; <i64> [#uses=1]
+ %add326 = add i64 %add323, %xor322 ; <i64> [#uses=1]
+ %add327 = add i64 %add326, 0 ; <i64> [#uses=2]
+ %and3502689 = xor i64 %add137, %conv15 ; <i64> [#uses=1]
+ %xor354 = and i64 %add251, %and3502689 ; <i64> [#uses=1]
+ %and357 = and i64 %add137, %conv15 ; <i64> [#uses=1]
+ %xor358 = xor i64 %xor354, %and357 ; <i64> [#uses=1]
+ %add362 = add i64 %add327, %conv19 ; <i64> [#uses=1]
+ %add359 = add i64 0, %xor358 ; <i64> [#uses=1]
+ %add365 = add i64 %add359, %add327 ; <i64> [#uses=1]
+ %add770 = add i64 %add362, 1426881987 ; <i64> [#uses=1]
+ %add779 = add i64 %add770, 0 ; <i64> [#uses=1]
+ %add782 = add i64 %add779, 0 ; <i64> [#uses=1]
+ %add783 = add i64 %add782, 0 ; <i64> [#uses=2]
+ %add818 = add i64 %add783, %add365 ; <i64> [#uses=1]
+ %add821 = add i64 0, %add783 ; <i64> [#uses=1]
+ store i32 undef, i32* undef
+ %add1046 = add i64 undef, undef ; <i64> [#uses=1]
+ %add1160 = add i64 undef, undef ; <i64> [#uses=1]
+ store i32 0, i32* undef
+ %add1235 = add i64 0, %add818 ; <i64> [#uses=1]
+ %add1238 = add i64 %add1235, 0 ; <i64> [#uses=1]
+ %add1239 = add i64 %add1238, 0 ; <i64> [#uses=1]
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %while.body
+ %h.0 = phi i64 [ undef, %while.body ], [ %add2035, %for.body ] ; <i64> [#uses=1]
+ %g.0 = phi i64 [ %add1046, %while.body ], [ undef, %for.body ] ; <i64> [#uses=1]
+ %f.0 = phi i64 [ %add1160, %while.body ], [ undef, %for.body ] ; <i64> [#uses=1]
+ %add821.pn = phi i64 [ %add821, %while.body ], [ undef, %for.body ] ; <i64> [#uses=0]
+ %add1239.pn2648 = phi i64 [ %add1239, %while.body ], [ undef, %for.body ] ; <i64> [#uses=0]
+ %d.0 = phi i64 [ undef, %while.body ], [ %add2038, %for.body ] ; <i64> [#uses=2]
+ br i1 undef, label %for.end, label %for.body
+
+for.body: ; preds = %for.cond
+ %conv1390 = zext i32 undef to i64 ; <i64> [#uses=1]
+ %add1375 = add i64 0, %h.0 ; <i64> [#uses=1]
+ %add1384 = add i64 %add1375, 0 ; <i64> [#uses=1]
+ %add1391 = add i64 %add1384, %conv1390 ; <i64> [#uses=1]
+ %add1392 = add i64 %add1391, 0 ; <i64> [#uses=2]
+ %or1411 = or i64 0, undef ; <i64> [#uses=1]
+ %xor1405 = xor i64 0, %or1411 ; <i64> [#uses=1]
+ %xor1412 = xor i64 %xor1405, 0 ; <i64> [#uses=1]
+ %add1427 = add i64 %add1392, %d.0 ; <i64> [#uses=1]
+ %add1424 = add i64 %xor1412, 0 ; <i64> [#uses=1]
+ %add1430 = add i64 %add1424, %add1392 ; <i64> [#uses=5]
+ %tmp1438 = load i32* undef ; <i32> [#uses=1]
+ %conv1439 = zext i32 %tmp1438 to i64 ; <i64> [#uses=4]
+ %shl1441 = shl i64 %conv1439, 25 ; <i64> [#uses=1]
+ %shr1444 = lshr i64 %conv1439, 7 ; <i64> [#uses=1]
+ %or1445 = or i64 %shl1441, %shr1444 ; <i64> [#uses=1]
+ %shr1450 = lshr i64 %conv1439, 18 ; <i64> [#uses=1]
+ %or1451 = or i64 0, %shr1450 ; <i64> [#uses=1]
+ %shr1454 = lshr i64 %conv1439, 3 ; <i64> [#uses=1]
+ %xor1452 = xor i64 %or1451, %shr1454 ; <i64> [#uses=1]
+ %xor1455 = xor i64 %xor1452, %or1445 ; <i64> [#uses=1]
+ %conv1464 = zext i32 undef to i64 ; <i64> [#uses=4]
+ %shl1466 = shl i64 %conv1464, 15 ; <i64> [#uses=1]
+ %shr1469 = lshr i64 %conv1464, 17 ; <i64> [#uses=1]
+ %or1470 = or i64 %shl1466, %shr1469 ; <i64> [#uses=1]
+ %shr1475 = lshr i64 %conv1464, 19 ; <i64> [#uses=1]
+ %or1476 = or i64 0, %shr1475 ; <i64> [#uses=1]
+ %shr1479 = lshr i64 %conv1464, 10 ; <i64> [#uses=1]
+ %xor1477 = xor i64 %or1476, %shr1479 ; <i64> [#uses=1]
+ %xor1480 = xor i64 %xor1477, %or1470 ; <i64> [#uses=1]
+ %tmp1499 = load i32* null ; <i32> [#uses=1]
+ %conv1500 = zext i32 %tmp1499 to i64 ; <i64> [#uses=1]
+ %add1491 = add i64 %conv1500, 0 ; <i64> [#uses=1]
+ %add1501 = add i64 %add1491, %xor1455 ; <i64> [#uses=1]
+ %add1502 = add i64 %add1501, %xor1480 ; <i64> [#uses=1]
+ %conv1504 = and i64 %add1502, 4294967295 ; <i64> [#uses=1]
+ %tmp1541 = load i32* undef ; <i32> [#uses=1]
+ %conv1542 = zext i32 %tmp1541 to i64 ; <i64> [#uses=1]
+ %add1527 = add i64 %conv1542, %g.0 ; <i64> [#uses=1]
+ %add1536 = add i64 %add1527, 0 ; <i64> [#uses=1]
+ %add1543 = add i64 %add1536, %conv1504 ; <i64> [#uses=1]
+ %add1544 = add i64 %add1543, 0 ; <i64> [#uses=1]
+ %shl1546 = shl i64 %add1430, 30 ; <i64> [#uses=1]
+ %and1548 = lshr i64 %add1430, 2 ; <i64> [#uses=1]
+ %shr1549 = and i64 %and1548, 1073741823 ; <i64> [#uses=1]
+ %or1550 = or i64 %shr1549, %shl1546 ; <i64> [#uses=1]
+ %shl1552 = shl i64 %add1430, 19 ; <i64> [#uses=1]
+ %or1556 = or i64 0, %shl1552 ; <i64> [#uses=1]
+ %shl1559 = shl i64 %add1430, 10 ; <i64> [#uses=1]
+ %or1563 = or i64 0, %shl1559 ; <i64> [#uses=1]
+ %xor1557 = xor i64 %or1556, %or1563 ; <i64> [#uses=1]
+ %xor1564 = xor i64 %xor1557, %or1550 ; <i64> [#uses=1]
+ %add1576 = add i64 %xor1564, 0 ; <i64> [#uses=1]
+ %add1582 = add i64 %add1576, %add1544 ; <i64> [#uses=3]
+ store i32 undef, i32* undef
+ %tmp1693 = load i32* undef ; <i32> [#uses=1]
+ %conv1694 = zext i32 %tmp1693 to i64 ; <i64> [#uses=1]
+ %add1679 = add i64 %conv1694, %f.0 ; <i64> [#uses=1]
+ %add1688 = add i64 %add1679, 0 ; <i64> [#uses=1]
+ %add1695 = add i64 %add1688, 0 ; <i64> [#uses=1]
+ %add1696 = add i64 %add1695, 0 ; <i64> [#uses=1]
+ %shl1698 = shl i64 %add1582, 30 ; <i64> [#uses=0]
+ %shl1704 = shl i64 %add1582, 19 ; <i64> [#uses=0]
+ %add1734 = add i64 0, %add1696 ; <i64> [#uses=1]
+ %add1983 = add i64 0, %add1427 ; <i64> [#uses=1]
+ %add1992 = add i64 %add1983, 0 ; <i64> [#uses=1]
+ %add1999 = add i64 %add1992, 0 ; <i64> [#uses=1]
+ %add2000 = add i64 %add1999, 0 ; <i64> [#uses=2]
+ %and2030 = and i64 %add1734, %add1582 ; <i64> [#uses=1]
+ %xor2031 = xor i64 0, %and2030 ; <i64> [#uses=1]
+ %add2035 = add i64 %add2000, %add1430 ; <i64> [#uses=1]
+ %add2032 = add i64 0, %xor2031 ; <i64> [#uses=1]
+ %add2038 = add i64 %add2032, %add2000 ; <i64> [#uses=1]
+ store i32 0, i32* undef
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ store i32 undef, i32* %arrayidx5
+ store i32 undef, i32* %arrayidx9
+ %d.02641 = trunc i64 %d.0 to i32 ; <i32> [#uses=1]
+ %conv2524 = add i32 %tmp14, %d.02641 ; <i32> [#uses=1]
+ store i32 %conv2524, i32* %arrayidx13
+ %exitcond2789 = icmp eq i64 undef, %num ; <i1> [#uses=1]
+ br i1 %exitcond2789, label %while.end, label %while.body
+
+while.end: ; preds = %for.end, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll
new file mode 100644
index 0000000..e6f3008
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s | grep "subq.*\\\$40, \\\%rsp"
+target triple = "x86_64-mingw64"
+
+define x86_fp80 @a(i64 %x) nounwind readnone {
+entry:
+ %conv = sitofp i64 %x to x86_fp80 ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %conv
+}
+
diff --git a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll
new file mode 100644
index 0000000..cb64bf2
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -o %t1
+; RUN: grep "subq.*\\\$72, \\\%rsp" %t1
+; RUN: grep "movaps \\\%xmm8, 32\\\(\\\%rsp\\\)" %t1
+; RUN: grep "movaps \\\%xmm7, 48\\\(\\\%rsp\\\)" %t1
+target triple = "x86_64-mingw64"
+
+define i32 @a() nounwind {
+entry:
+ tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind
+ ret i32 undef
+}
+
diff --git a/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll b/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
new file mode 100644
index 0000000..9415732
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -march=x86
+
+ type { %struct.GAP } ; type %0
+ type { i16, i8, i8 } ; type %1
+ type { [2 x i32], [2 x i32] } ; type %2
+ type { %struct.rec* } ; type %3
+ %struct.FILE_POS = type { i8, i8, i16, i32 }
+ %struct.FIRST_UNION = type { %struct.FILE_POS }
+ %struct.FOURTH_UNION = type { %struct.STYLE }
+ %struct.GAP = type { i8, i8, i16 }
+ %struct.LIST = type { %struct.rec*, %struct.rec* }
+ %struct.SECOND_UNION = type { %1 }
+ %struct.STYLE = type { %0, %0, i16, i16, i32 }
+ %struct.THIRD_UNION = type { %2 }
+ %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, %3, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+ %struct.rec = type { %struct.head_type }
+
+define fastcc void @MinSize(%struct.rec* %x) nounwind {
+entry:
+ %tmp13 = load i8* undef, align 4 ; <i8> [#uses=3]
+ %tmp14 = zext i8 %tmp13 to i32 ; <i32> [#uses=2]
+ switch i32 %tmp14, label %bb1109 [
+ i32 42, label %bb246
+ ]
+
+bb246: ; preds = %entry, %entry
+ switch i8 %tmp13, label %bb249 [
+ i8 42, label %bb269
+ i8 44, label %bb269
+ ]
+
+bb249: ; preds = %bb246
+ %tmp3240 = icmp eq i8 %tmp13, 0 ; <i1> [#uses=1]
+ br i1 %tmp3240, label %bb974, label %bb269
+
+bb269:
+ %tmp3424 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 0, i32 0, i32 1 ; <%struct.rec**> [#uses=0]
+ unreachable
+
+bb974:
+ unreachable
+
+bb1109: ; preds = %entry
+ call fastcc void @Image(i32 %tmp14) nounwind ; <i8*> [#uses=0]
+ unreachable
+}
+
+declare fastcc void @Image(i32) nounwind
diff --git a/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll b/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
new file mode 100644
index 0000000..336f17e
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movl
+
+define <8 x i8> @a(i8 zeroext %x) nounwind {
+ %r = insertelement <8 x i8> undef, i8 %x, i32 0
+ ret <8 x i8> %r
+}
+
diff --git a/test/CodeGen/X86/2009-06-05-VZextByteShort.ll b/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
new file mode 100644
index 0000000..5c51480
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 > %t1
+; RUN: grep movzwl %t1 | count 2
+; RUN: grep movzbl %t1 | count 2
+; RUN: grep movd %t1 | count 4
+
+define <4 x i16> @a(i32* %x1) nounwind {
+ %x2 = load i32* %x1
+ %x3 = lshr i32 %x2, 1
+ %x = trunc i32 %x3 to i16
+ %r = insertelement <4 x i16> zeroinitializer, i16 %x, i32 0
+ ret <4 x i16> %r
+}
+
+define <8 x i16> @b(i32* %x1) nounwind {
+ %x2 = load i32* %x1
+ %x3 = lshr i32 %x2, 1
+ %x = trunc i32 %x3 to i16
+ %r = insertelement <8 x i16> zeroinitializer, i16 %x, i32 0
+ ret <8 x i16> %r
+}
+
+define <8 x i8> @c(i32* %x1) nounwind {
+ %x2 = load i32* %x1
+ %x3 = lshr i32 %x2, 1
+ %x = trunc i32 %x3 to i8
+ %r = insertelement <8 x i8> zeroinitializer, i8 %x, i32 0
+ ret <8 x i8> %r
+}
+
+define <16 x i8> @d(i32* %x1) nounwind {
+ %x2 = load i32* %x1
+ %x3 = lshr i32 %x2, 1
+ %x = trunc i32 %x3 to i8
+ %r = insertelement <16 x i8> zeroinitializer, i8 %x, i32 0
+ ret <16 x i8> %r
+}
+
diff --git a/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll b/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll
new file mode 100644
index 0000000..8bb3dc6
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+
+define <2 x i64> @_mm_insert_epi16(<2 x i64> %a, i32 %b, i32 %imm) nounwind readnone {
+entry:
+ %conv = bitcast <2 x i64> %a to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %conv2 = trunc i32 %b to i16 ; <i16> [#uses=1]
+ %and = and i32 %imm, 7 ; <i32> [#uses=1]
+ %vecins = insertelement <8 x i16> %conv, i16 %conv2, i32 %and ; <<8 x i16>> [#uses=1]
+ %conv6 = bitcast <8 x i16> %vecins to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %conv6
+}
diff --git a/test/CodeGen/X86/2009-06-05-sitofpCrash.ll b/test/CodeGen/X86/2009-06-05-sitofpCrash.ll
new file mode 100644
index 0000000..e361804
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-05-sitofpCrash.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+sse
+; PR2598
+
+define <2 x float> @a(<2 x i32> %i) nounwind {
+ %r = sitofp <2 x i32> %i to <2 x float>
+ ret <2 x float> %r
+}
+
+define <2 x i32> @b(<2 x float> %i) nounwind {
+ %r = fptosi <2 x float> %i to <2 x i32>
+ ret <2 x i32> %r
+}
+
diff --git a/test/CodeGen/X86/2009-06-06-ConcatVectors.ll b/test/CodeGen/X86/2009-06-06-ConcatVectors.ll
new file mode 100644
index 0000000..92419fc
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-06-ConcatVectors.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s
+
+define <2 x i64> @_mm_movpi64_pi64(<1 x i64> %a, <1 x i64> %b) nounwind readnone {
+entry:
+ %0 = shufflevector <1 x i64> %a, <1 x i64> %b, <2 x i32> <i32 0, i32 1>
+ ret <2 x i64> %0
+}
+
diff --git a/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll b/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll
new file mode 100644
index 0000000..07ef53e
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep movl | count 2
+
+define i64 @a(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %0 = insertelement <2 x i32> undef, i32 %a, i32 0 ; <<2 x i32>> [#uses=1]
+ %1 = insertelement <2 x i32> %0, i32 %b, i32 1 ; <<2 x i32>> [#uses=1]
+ %conv = bitcast <2 x i32> %1 to i64 ; <i64> [#uses=1]
+ ret i64 %conv
+}
+
diff --git a/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll b/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
new file mode 100644
index 0000000..673e936
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt
+; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm
+
+; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call
+; calling convention out of sync with standard c calling convention on x86_64)
+; Bug 4278.
+
+declare fastcc double @tailcallee(x86_fp80, <2 x float>)
+
+define fastcc double @tailcall() {
+entry:
+ %tmp = fpext float 1.000000e+00 to x86_fp80
+ %tmp2 = tail call fastcc double @tailcallee( x86_fp80 %tmp, <2 x float> <float 1.000000e+00, float 1.000000e+00>)
+ ret double %tmp2
+}
diff --git a/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll b/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll
new file mode 100644
index 0000000..feb5780
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -tailcallopt | not grep TAILCALL
+
+; Bug 4396. This tail call can NOT be optimized.
+
+declare fastcc i8* @_D3gcx2GC12mallocNoSyncMFmkZPv() nounwind
+
+define fastcc i8* @_D3gcx2GC12callocNoSyncMFmkZPv() nounwind {
+entry:
+ %tmp6 = tail call fastcc i8* @_D3gcx2GC12mallocNoSyncMFmkZPv() ; <i8*> [#uses=2]
+ %tmp9 = tail call i8* @memset(i8* %tmp6, i32 0, i64 2) ; <i8*> [#uses=0]
+ ret i8* %tmp6
+}
+
+declare i8* @memset(i8*, i32, i64)
diff --git a/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll b/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
new file mode 100644
index 0000000..228cd48
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mattr=+sse,-sse2
+; PR2484
+
+define <4 x float> @f4523(<4 x float> %a,<4 x float> %b) nounwind {
+entry:
+%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4,i32
+5,i32 2,i32 3>
+ret <4 x float> %shuffle
+}
diff --git a/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll b/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll
new file mode 100644
index 0000000..fcc71ae
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll
@@ -0,0 +1,137 @@
+; RUN: llc < %s -march=x86 -mtriple=x86_64-unknown-freebsd7.2
+; PR4478
+
+ %struct.sockaddr = type <{ i8, i8, [14 x i8] }>
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ br label %while.cond
+
+while.cond: ; preds = %sw.bb6, %entry
+ switch i32 undef, label %sw.default [
+ i32 -1, label %while.end
+ i32 119, label %sw.bb6
+ ]
+
+sw.bb6: ; preds = %while.cond
+ br i1 undef, label %if.then, label %while.cond
+
+if.then: ; preds = %sw.bb6
+ ret i32 1
+
+sw.default: ; preds = %while.cond
+ ret i32 1
+
+while.end: ; preds = %while.cond
+ br i1 undef, label %if.then15, label %if.end16
+
+if.then15: ; preds = %while.end
+ ret i32 1
+
+if.end16: ; preds = %while.end
+ br i1 undef, label %lor.lhs.false, label %if.then21
+
+lor.lhs.false: ; preds = %if.end16
+ br i1 undef, label %if.end22, label %if.then21
+
+if.then21: ; preds = %lor.lhs.false, %if.end16
+ ret i32 1
+
+if.end22: ; preds = %lor.lhs.false
+ br i1 undef, label %lor.lhs.false27, label %if.then51
+
+lor.lhs.false27: ; preds = %if.end22
+ br i1 undef, label %lor.lhs.false39, label %if.then51
+
+lor.lhs.false39: ; preds = %lor.lhs.false27
+ br i1 undef, label %if.end52, label %if.then51
+
+if.then51: ; preds = %lor.lhs.false39, %lor.lhs.false27, %if.end22
+ ret i32 1
+
+if.end52: ; preds = %lor.lhs.false39
+ br i1 undef, label %if.then57, label %if.end58
+
+if.then57: ; preds = %if.end52
+ ret i32 1
+
+if.end58: ; preds = %if.end52
+ br i1 undef, label %if.then64, label %if.end65
+
+if.then64: ; preds = %if.end58
+ ret i32 1
+
+if.end65: ; preds = %if.end58
+ br i1 undef, label %if.then71, label %if.end72
+
+if.then71: ; preds = %if.end65
+ ret i32 1
+
+if.end72: ; preds = %if.end65
+ br i1 undef, label %if.then83, label %if.end84
+
+if.then83: ; preds = %if.end72
+ ret i32 1
+
+if.end84: ; preds = %if.end72
+ br i1 undef, label %if.then101, label %if.end102
+
+if.then101: ; preds = %if.end84
+ ret i32 1
+
+if.end102: ; preds = %if.end84
+ br i1 undef, label %if.then113, label %if.end114
+
+if.then113: ; preds = %if.end102
+ ret i32 1
+
+if.end114: ; preds = %if.end102
+ br i1 undef, label %if.then209, label %if.end210
+
+if.then209: ; preds = %if.end114
+ ret i32 1
+
+if.end210: ; preds = %if.end114
+ br i1 undef, label %if.then219, label %if.end220
+
+if.then219: ; preds = %if.end210
+ ret i32 1
+
+if.end220: ; preds = %if.end210
+ br i1 undef, label %if.end243, label %lor.lhs.false230
+
+lor.lhs.false230: ; preds = %if.end220
+ unreachable
+
+if.end243: ; preds = %if.end220
+ br i1 undef, label %if.then249, label %if.end250
+
+if.then249: ; preds = %if.end243
+ ret i32 1
+
+if.end250: ; preds = %if.end243
+ br i1 undef, label %if.end261, label %if.then260
+
+if.then260: ; preds = %if.end250
+ ret i32 1
+
+if.end261: ; preds = %if.end250
+ br i1 undef, label %if.then270, label %if.end271
+
+if.then270: ; preds = %if.end261
+ ret i32 1
+
+if.end271: ; preds = %if.end261
+ %call.i = call i32 @arc4random() nounwind ; <i32> [#uses=1]
+ %rem.i = urem i32 %call.i, 16383 ; <i32> [#uses=1]
+ %rem1.i = trunc i32 %rem.i to i16 ; <i16> [#uses=1]
+ %conv2.i = or i16 %rem1.i, -16384 ; <i16> [#uses=1]
+ %0 = call i16 asm "xchgb ${0:h}, ${0:b}", "=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv2.i) nounwind ; <i16> [#uses=1]
+ store i16 %0, i16* undef
+ %call281 = call i32 @bind(i32 undef, %struct.sockaddr* undef, i32 16) nounwind ; <i32> [#uses=0]
+ unreachable
+}
+
+declare i32 @bind(i32, %struct.sockaddr*, i32)
+
+declare i32 @arc4random()
diff --git a/test/CodeGen/X86/2009-07-07-SplitICmp.ll b/test/CodeGen/X86/2009-07-07-SplitICmp.ll
new file mode 100644
index 0000000..eb9378b
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-07-SplitICmp.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -disable-mmx
+
+define void @test2(<2 x i32> %A, <2 x i32> %B, <2 x i32>* %C) nounwind {
+ %D = icmp sgt <2 x i32> %A, %B
+ %E = zext <2 x i1> %D to <2 x i32>
+ store <2 x i32> %E, <2 x i32>* %C
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll b/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll
new file mode 100644
index 0000000..0fdfdcb
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86
+; PR3037
+
+define void @entry(<4 x i8>* %dest) {
+ %1 = xor <4 x i1> zeroinitializer, < i1 true, i1 true, i1 true, i1 true >
+ %2 = extractelement <4 x i1> %1, i32 3
+ %3 = zext i1 %2 to i8
+ %4 = insertelement <4 x i8> zeroinitializer, i8 %3, i32 3
+ store <4 x i8> %4, <4 x i8>* %dest, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-07-15-CoalescerBug.ll b/test/CodeGen/X86/2009-07-15-CoalescerBug.ll
new file mode 100644
index 0000000..eabaf77
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-15-CoalescerBug.ll
@@ -0,0 +1,958 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+
+ %struct.ANY = type { i8* }
+ %struct.AV = type { %struct.XPVAV*, i32, i32 }
+ %struct.CLONE_PARAMS = type { %struct.AV*, i64, %struct.PerlInterpreter* }
+ %struct.CV = type { %struct.XPVCV*, i32, i32 }
+ %struct.DIR = type { i32, i64, i64, i8*, i32, i64, i64, i32, %struct.__darwin_pthread_mutex_t, %struct._telldir* }
+ %struct.GP = type { %struct.SV*, i32, %struct.io*, %struct.CV*, %struct.AV*, %struct.HV*, %struct.GV*, %struct.CV*, i32, i32, i32, i8* }
+ %struct.GV = type { %struct.XPVGV*, i32, i32 }
+ %struct.HE = type { %struct.HE*, %struct.HEK*, %struct.SV* }
+ %struct.HEK = type { i32, i32, [1 x i8] }
+ %struct.HV = type { %struct.XPVHV*, i32, i32 }
+ %struct.MAGIC = type { %struct.MAGIC*, %struct.MGVTBL*, i16, i8, i8, %struct.SV*, i8*, i32 }
+ %struct.MGVTBL = type { i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*, %struct.SV*, i8*, i32)*, i32 (%struct.MAGIC*, %struct.CLONE_PARAMS*)* }
+ %struct.OP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i64, i16, i16, i8, i8 }
+ %struct.PMOP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i64, i16, i16, i8, i8, %struct.OP*, %struct.OP*, %struct.OP*, %struct.OP*, %struct.PMOP*, %struct.REGEXP*, i32, i32, i8, %struct.HV* }
+ %struct.PerlIO_funcs = type { i64, i8*, i64, i32, i64 (%struct.PerlIOl**, i8*, %struct.SV*, %struct.PerlIO_funcs*)*, i64 (%struct.PerlIOl**)*, %struct.PerlIOl** (%struct.PerlIO_funcs*, %struct.PerlIO_list_t*, i64, i8*, i32, i32, i32, %struct.PerlIOl**, i32, %struct.SV**)*, i64 (%struct.PerlIOl**)*, %struct.SV* (%struct.PerlIOl**, %struct.CLONE_PARAMS*, i32)*, i64 (%struct.PerlIOl**)*, %struct.PerlIOl** (%struct.PerlIOl**, %struct.PerlIOl**, %struct.CLONE_PARAMS*, i32)*, i64 (%struct.PerlIOl**, i8*, i64)*, i64 (%struct.PerlIOl**, i8*, i64)*, i64 (%struct.PerlIOl**, i8*, i64)*, i64 (%struct.PerlIOl**, i64, i32)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, void (%struct.PerlIOl**)*, void (%struct.PerlIOl**)*, i8* (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i8* (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, void (%struct.PerlIOl**, i8*, i64)* }
+ %struct.PerlIO_list_t = type { i64, i64, i64, %struct.PerlIO_pair_t* }
+ %struct.PerlIO_pair_t = type { %struct.PerlIO_funcs*, %struct.SV* }
+ %struct.PerlIOl = type { %struct.PerlIOl*, %struct.PerlIO_funcs*, i32 }
+ %struct.PerlInterpreter = type { i8 }
+ %struct.REGEXP = type { i32*, i32*, %struct.regnode*, %struct.reg_substr_data*, i8*, %struct.reg_data*, i8*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, [1 x %struct.regnode] }
+ %struct.SV = type { i8*, i32, i32 }
+ %struct.XPVAV = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, %struct.SV**, %struct.SV*, i8 }
+ %struct.XPVCV = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, %struct.HV*, %struct.OP*, %struct.OP*, void (%struct.CV*)*, %struct.ANY, %struct.GV*, i8*, i64, %struct.AV*, %struct.CV*, i16, i32 }
+ %struct.XPVGV = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, %struct.GP*, i8*, i64, %struct.HV*, i8 }
+ %struct.XPVHV = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, i32, %struct.HE*, %struct.PMOP*, i8* }
+ %struct.XPVIO = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, %struct.PerlIOl**, %struct.PerlIOl**, %struct.anon, i64, i64, i64, i64, i8*, %struct.GV*, i8*, %struct.GV*, i8*, %struct.GV*, i16, i8, i8 }
+ %struct.__darwin_pthread_mutex_t = type { i64, [56 x i8] }
+ %struct._telldir = type opaque
+ %struct.anon = type { %struct.DIR* }
+ %struct.io = type { %struct.XPVIO*, i32, i32 }
+ %struct.reg_data = type { i32, i8*, [1 x i8*] }
+ %struct.reg_substr_data = type { [3 x %struct.reg_substr_datum] }
+ %struct.reg_substr_datum = type { i32, i32, %struct.SV*, %struct.SV* }
+ %struct.regnode = type { i8, i8, i16 }
+
+define i32 @Perl_yylex() nounwind ssp {
+entry:
+ br i1 undef, label %bb21, label %bb
+
+bb: ; preds = %entry
+ unreachable
+
+bb21: ; preds = %entry
+ switch i32 undef, label %bb103 [
+ i32 1, label %bb101
+ i32 4, label %bb75
+ i32 6, label %bb68
+ i32 7, label %bb67
+ i32 8, label %bb25
+ ]
+
+bb25: ; preds = %bb21
+ ret i32 41
+
+bb67: ; preds = %bb21
+ ret i32 40
+
+bb68: ; preds = %bb21
+ br i1 undef, label %bb69, label %bb70
+
+bb69: ; preds = %bb68
+ ret i32 undef
+
+bb70: ; preds = %bb68
+ unreachable
+
+bb75: ; preds = %bb21
+ unreachable
+
+bb101: ; preds = %bb21
+ unreachable
+
+bb103: ; preds = %bb21
+ switch i32 undef, label %bb104 [
+ i32 0, label %bb126
+ i32 4, label %fake_eof
+ i32 26, label %fake_eof
+ i32 34, label %bb1423
+ i32 36, label %bb1050
+ i32 37, label %bb534
+ i32 39, label %bb1412
+ i32 41, label %bb643
+ i32 44, label %bb544
+ i32 48, label %bb1406
+ i32 49, label %bb1406
+ i32 50, label %bb1406
+ i32 51, label %bb1406
+ i32 52, label %bb1406
+ i32 53, label %bb1406
+ i32 54, label %bb1406
+ i32 55, label %bb1406
+ i32 56, label %bb1406
+ i32 57, label %bb1406
+ i32 59, label %bb639
+ i32 65, label %keylookup
+ i32 66, label %keylookup
+ i32 67, label %keylookup
+ i32 68, label %keylookup
+ i32 69, label %keylookup
+ i32 70, label %keylookup
+ i32 71, label %keylookup
+ i32 72, label %keylookup
+ i32 73, label %keylookup
+ i32 74, label %keylookup
+ i32 75, label %keylookup
+ i32 76, label %keylookup
+ i32 77, label %keylookup
+ i32 78, label %keylookup
+ i32 79, label %keylookup
+ i32 80, label %keylookup
+ i32 81, label %keylookup
+ i32 82, label %keylookup
+ i32 83, label %keylookup
+ i32 84, label %keylookup
+ i32 85, label %keylookup
+ i32 86, label %keylookup
+ i32 87, label %keylookup
+ i32 88, label %keylookup
+ i32 89, label %keylookup
+ i32 90, label %keylookup
+ i32 92, label %bb1455
+ i32 95, label %keylookup
+ i32 96, label %bb1447
+ i32 97, label %keylookup
+ i32 98, label %keylookup
+ i32 99, label %keylookup
+ i32 100, label %keylookup
+ i32 101, label %keylookup
+ i32 102, label %keylookup
+ i32 103, label %keylookup
+ i32 104, label %keylookup
+ i32 105, label %keylookup
+ i32 106, label %keylookup
+ i32 107, label %keylookup
+ i32 108, label %keylookup
+ i32 109, label %keylookup
+ i32 110, label %keylookup
+ i32 111, label %keylookup
+ i32 112, label %keylookup
+ i32 113, label %keylookup
+ i32 114, label %keylookup
+ i32 115, label %keylookup
+ i32 116, label %keylookup
+ i32 117, label %keylookup
+ i32 118, label %keylookup
+ i32 119, label %keylookup
+ i32 120, label %keylookup
+ i32 121, label %keylookup
+ i32 122, label %keylookup
+ i32 126, label %bb544
+ ]
+
+bb104: ; preds = %bb103
+ unreachable
+
+bb126: ; preds = %bb103
+ ret i32 0
+
+fake_eof: ; preds = %bb1841, %bb103, %bb103
+ unreachable
+
+bb534: ; preds = %bb103
+ unreachable
+
+bb544: ; preds = %bb103, %bb103
+ ret i32 undef
+
+bb639: ; preds = %bb103
+ unreachable
+
+bb643: ; preds = %bb103
+ unreachable
+
+bb1050: ; preds = %bb103
+ unreachable
+
+bb1406: ; preds = %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103
+ unreachable
+
+bb1412: ; preds = %bb103
+ unreachable
+
+bb1423: ; preds = %bb103
+ unreachable
+
+bb1447: ; preds = %bb103
+ unreachable
+
+bb1455: ; preds = %bb103
+ unreachable
+
+keylookup: ; preds = %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103
+ br i1 undef, label %bb1498, label %bb1496
+
+bb1496: ; preds = %keylookup
+ br i1 undef, label %bb1498, label %bb1510.preheader
+
+bb1498: ; preds = %bb1496, %keylookup
+ unreachable
+
+bb1510.preheader: ; preds = %bb1496
+ br i1 undef, label %bb1511, label %bb1518
+
+bb1511: ; preds = %bb1510.preheader
+ br label %bb1518
+
+bb1518: ; preds = %bb1511, %bb1510.preheader
+ switch i32 undef, label %bb741.i4285 [
+ i32 95, label %bb744.i4287
+ i32 115, label %bb852.i4394
+ ]
+
+bb741.i4285: ; preds = %bb1518
+ br label %Perl_keyword.exit4735
+
+bb744.i4287: ; preds = %bb1518
+ br label %Perl_keyword.exit4735
+
+bb852.i4394: ; preds = %bb1518
+ br i1 undef, label %bb861.i4404, label %bb856.i4399
+
+bb856.i4399: ; preds = %bb852.i4394
+ br label %Perl_keyword.exit4735
+
+bb861.i4404: ; preds = %bb852.i4394
+ br label %Perl_keyword.exit4735
+
+Perl_keyword.exit4735: ; preds = %bb861.i4404, %bb856.i4399, %bb744.i4287, %bb741.i4285
+ br i1 undef, label %bb1544, label %reserved_word
+
+bb1544: ; preds = %Perl_keyword.exit4735
+ br i1 undef, label %bb1565, label %bb1545
+
+bb1545: ; preds = %bb1544
+ br i1 undef, label %bb1563, label %bb1558
+
+bb1558: ; preds = %bb1545
+ %0 = load %struct.SV** undef ; <%struct.SV*> [#uses=1]
+ %1 = bitcast %struct.SV* %0 to %struct.GV* ; <%struct.GV*> [#uses=5]
+ br i1 undef, label %bb1563, label %bb1559
+
+bb1559: ; preds = %bb1558
+ br i1 undef, label %bb1560, label %bb1563
+
+bb1560: ; preds = %bb1559
+ br i1 undef, label %bb1563, label %bb1561
+
+bb1561: ; preds = %bb1560
+ br i1 undef, label %bb1562, label %bb1563
+
+bb1562: ; preds = %bb1561
+ br label %bb1563
+
+bb1563: ; preds = %bb1562, %bb1561, %bb1560, %bb1559, %bb1558, %bb1545
+ %gv19.3 = phi %struct.GV* [ %1, %bb1562 ], [ undef, %bb1545 ], [ %1, %bb1558 ], [ %1, %bb1559 ], [ %1, %bb1560 ], [ %1, %bb1561 ] ; <%struct.GV*> [#uses=0]
+ br i1 undef, label %bb1565, label %reserved_word
+
+bb1565: ; preds = %bb1563, %bb1544
+ br i1 undef, label %bb1573, label %bb1580
+
+bb1573: ; preds = %bb1565
+ br label %bb1580
+
+bb1580: ; preds = %bb1573, %bb1565
+ br i1 undef, label %bb1595, label %reserved_word
+
+bb1595: ; preds = %bb1580
+ br i1 undef, label %reserved_word, label %bb1597
+
+bb1597: ; preds = %bb1595
+ br i1 undef, label %reserved_word, label %bb1602
+
+bb1602: ; preds = %bb1597
+ br label %reserved_word
+
+reserved_word: ; preds = %bb1602, %bb1597, %bb1595, %bb1580, %bb1563, %Perl_keyword.exit4735
+ switch i32 undef, label %bb2012 [
+ i32 1, label %bb1819
+ i32 2, label %bb1830
+ i32 4, label %bb1841
+ i32 5, label %bb1841
+ i32 8, label %bb1880
+ i32 14, label %bb1894
+ i32 16, label %bb1895
+ i32 17, label %bb1896
+ i32 18, label %bb1897
+ i32 19, label %bb1898
+ i32 20, label %bb1899
+ i32 22, label %bb1906
+ i32 23, label %bb1928
+ i32 24, label %bb2555
+ i32 26, label %bb1929
+ i32 31, label %bb1921
+ i32 32, label %bb1930
+ i32 33, label %bb1905
+ i32 34, label %bb1936
+ i32 35, label %bb1927
+ i32 37, label %bb1962
+ i32 40, label %bb1951
+ i32 41, label %bb1946
+ i32 42, label %bb1968
+ i32 44, label %bb1969
+ i32 45, label %bb1970
+ i32 46, label %bb2011
+ i32 47, label %bb2006
+ i32 48, label %bb2007
+ i32 49, label %bb2009
+ i32 50, label %bb2010
+ i32 51, label %bb2008
+ i32 53, label %bb1971
+ i32 54, label %bb1982
+ i32 55, label %bb2005
+ i32 59, label %bb2081
+ i32 61, label %bb2087
+ i32 64, label %bb2080
+ i32 65, label %really_sub
+ i32 66, label %bb2079
+ i32 67, label %bb2089
+ i32 69, label %bb2155
+ i32 72, label %bb2137
+ i32 74, label %bb2138
+ i32 75, label %bb2166
+ i32 76, label %bb2144
+ i32 78, label %bb2145
+ i32 81, label %bb2102
+ i32 82, label %bb2108
+ i32 84, label %bb2114
+ i32 85, label %bb2115
+ i32 86, label %bb2116
+ i32 89, label %bb2146
+ i32 90, label %bb2147
+ i32 91, label %bb2148
+ i32 93, label %bb2154
+ i32 94, label %bb2167
+ i32 96, label %bb2091
+ i32 97, label %bb2090
+ i32 98, label %bb2088
+ i32 100, label %bb2173
+ i32 101, label %bb2174
+ i32 102, label %bb2175
+ i32 103, label %bb2180
+ i32 104, label %bb2181
+ i32 106, label %bb2187
+ i32 107, label %bb2188
+ i32 110, label %bb2206
+ i32 112, label %bb2217
+ i32 113, label %bb2218
+ i32 114, label %bb2199
+ i32 119, label %bb2205
+ i32 120, label %bb2229
+ i32 121, label %bb2233
+ i32 122, label %bb2234
+ i32 123, label %bb2235
+ i32 124, label %bb2236
+ i32 125, label %bb2237
+ i32 126, label %bb2238
+ i32 127, label %bb2239
+ i32 128, label %bb2268
+ i32 129, label %bb2267
+ i32 133, label %bb2276
+ i32 134, label %bb2348
+ i32 135, label %bb2337
+ i32 137, label %bb2239
+ i32 138, label %bb2367
+ i32 139, label %bb2368
+ i32 140, label %bb2369
+ i32 141, label %bb2357
+ i32 143, label %bb2349
+ i32 144, label %bb2350
+ i32 146, label %bb2356
+ i32 147, label %bb2370
+ i32 148, label %bb2445
+ i32 149, label %bb2453
+ i32 151, label %bb2381
+ i32 152, label %bb2457
+ i32 154, label %bb2516
+ i32 156, label %bb2522
+ i32 158, label %bb2527
+ i32 159, label %bb2537
+ i32 160, label %bb2503
+ i32 162, label %bb2504
+ i32 163, label %bb2464
+ i32 165, label %bb2463
+ i32 166, label %bb2538
+ i32 168, label %bb2515
+ i32 170, label %bb2549
+ i32 172, label %bb2566
+ i32 173, label %bb2595
+ i32 174, label %bb2565
+ i32 175, label %bb2567
+ i32 176, label %bb2568
+ i32 177, label %bb2569
+ i32 178, label %bb2570
+ i32 179, label %bb2594
+ i32 182, label %bb2571
+ i32 183, label %bb2572
+ i32 185, label %bb2593
+ i32 186, label %bb2583
+ i32 187, label %bb2596
+ i32 189, label %bb2602
+ i32 190, label %bb2603
+ i32 191, label %bb2604
+ i32 192, label %bb2605
+ i32 193, label %bb2606
+ i32 196, label %bb2617
+ i32 197, label %bb2618
+ i32 198, label %bb2619
+ i32 199, label %bb2627
+ i32 200, label %bb2625
+ i32 201, label %bb2626
+ i32 206, label %really_sub
+ i32 207, label %bb2648
+ i32 208, label %bb2738
+ i32 209, label %bb2739
+ i32 210, label %bb2740
+ i32 211, label %bb2742
+ i32 212, label %bb2741
+ i32 213, label %bb2737
+ i32 214, label %bb2743
+ i32 217, label %bb2758
+ i32 219, label %bb2764
+ i32 220, label %bb2765
+ i32 221, label %bb2744
+ i32 222, label %bb2766
+ i32 226, label %bb2785
+ i32 227, label %bb2783
+ i32 228, label %bb2784
+ i32 229, label %bb2790
+ i32 230, label %bb2797
+ i32 232, label %bb2782
+ i32 234, label %bb2791
+ i32 236, label %bb2815
+ i32 237, label %bb2818
+ i32 238, label %bb2819
+ i32 239, label %bb2820
+ i32 240, label %bb2817
+ i32 241, label %bb2816
+ i32 242, label %bb2821
+ i32 243, label %bb2826
+ i32 244, label %bb2829
+ i32 245, label %bb2830
+ ]
+
+bb1819: ; preds = %reserved_word
+ unreachable
+
+bb1830: ; preds = %reserved_word
+ unreachable
+
+bb1841: ; preds = %reserved_word, %reserved_word
+ br i1 undef, label %fake_eof, label %bb1842
+
+bb1842: ; preds = %bb1841
+ unreachable
+
+bb1880: ; preds = %reserved_word
+ unreachable
+
+bb1894: ; preds = %reserved_word
+ ret i32 undef
+
+bb1895: ; preds = %reserved_word
+ ret i32 301
+
+bb1896: ; preds = %reserved_word
+ ret i32 undef
+
+bb1897: ; preds = %reserved_word
+ ret i32 undef
+
+bb1898: ; preds = %reserved_word
+ ret i32 undef
+
+bb1899: ; preds = %reserved_word
+ ret i32 undef
+
+bb1905: ; preds = %reserved_word
+ ret i32 278
+
+bb1906: ; preds = %reserved_word
+ unreachable
+
+bb1921: ; preds = %reserved_word
+ ret i32 288
+
+bb1927: ; preds = %reserved_word
+ ret i32 undef
+
+bb1928: ; preds = %reserved_word
+ ret i32 undef
+
+bb1929: ; preds = %reserved_word
+ ret i32 undef
+
+bb1930: ; preds = %reserved_word
+ ret i32 undef
+
+bb1936: ; preds = %reserved_word
+ br i1 undef, label %bb2834, label %bb1937
+
+bb1937: ; preds = %bb1936
+ ret i32 undef
+
+bb1946: ; preds = %reserved_word
+ unreachable
+
+bb1951: ; preds = %reserved_word
+ ret i32 undef
+
+bb1962: ; preds = %reserved_word
+ ret i32 undef
+
+bb1968: ; preds = %reserved_word
+ ret i32 280
+
+bb1969: ; preds = %reserved_word
+ ret i32 276
+
+bb1970: ; preds = %reserved_word
+ ret i32 277
+
+bb1971: ; preds = %reserved_word
+ ret i32 288
+
+bb1982: ; preds = %reserved_word
+ br i1 undef, label %bb2834, label %bb1986
+
+bb1986: ; preds = %bb1982
+ ret i32 undef
+
+bb2005: ; preds = %reserved_word
+ ret i32 undef
+
+bb2006: ; preds = %reserved_word
+ ret i32 282
+
+bb2007: ; preds = %reserved_word
+ ret i32 282
+
+bb2008: ; preds = %reserved_word
+ ret i32 282
+
+bb2009: ; preds = %reserved_word
+ ret i32 282
+
+bb2010: ; preds = %reserved_word
+ ret i32 282
+
+bb2011: ; preds = %reserved_word
+ ret i32 282
+
+bb2012: ; preds = %reserved_word
+ unreachable
+
+bb2079: ; preds = %reserved_word
+ ret i32 undef
+
+bb2080: ; preds = %reserved_word
+ ret i32 282
+
+bb2081: ; preds = %reserved_word
+ ret i32 undef
+
+bb2087: ; preds = %reserved_word
+ ret i32 undef
+
+bb2088: ; preds = %reserved_word
+ ret i32 287
+
+bb2089: ; preds = %reserved_word
+ ret i32 287
+
+bb2090: ; preds = %reserved_word
+ ret i32 undef
+
+bb2091: ; preds = %reserved_word
+ ret i32 280
+
+bb2102: ; preds = %reserved_word
+ ret i32 282
+
+bb2108: ; preds = %reserved_word
+ ret i32 undef
+
+bb2114: ; preds = %reserved_word
+ ret i32 undef
+
+bb2115: ; preds = %reserved_word
+ ret i32 282
+
+bb2116: ; preds = %reserved_word
+ ret i32 282
+
+bb2137: ; preds = %reserved_word
+ ret i32 undef
+
+bb2138: ; preds = %reserved_word
+ ret i32 282
+
+bb2144: ; preds = %reserved_word
+ ret i32 undef
+
+bb2145: ; preds = %reserved_word
+ ret i32 282
+
+bb2146: ; preds = %reserved_word
+ ret i32 undef
+
+bb2147: ; preds = %reserved_word
+ ret i32 undef
+
+bb2148: ; preds = %reserved_word
+ ret i32 282
+
+bb2154: ; preds = %reserved_word
+ ret i32 undef
+
+bb2155: ; preds = %reserved_word
+ ret i32 282
+
+bb2166: ; preds = %reserved_word
+ ret i32 282
+
+bb2167: ; preds = %reserved_word
+ ret i32 undef
+
+bb2173: ; preds = %reserved_word
+ ret i32 274
+
+bb2174: ; preds = %reserved_word
+ ret i32 undef
+
+bb2175: ; preds = %reserved_word
+ br i1 undef, label %bb2834, label %bb2176
+
+bb2176: ; preds = %bb2175
+ ret i32 undef
+
+bb2180: ; preds = %reserved_word
+ ret i32 undef
+
+bb2181: ; preds = %reserved_word
+ ret i32 undef
+
+bb2187: ; preds = %reserved_word
+ ret i32 undef
+
+bb2188: ; preds = %reserved_word
+ ret i32 280
+
+bb2199: ; preds = %reserved_word
+ ret i32 295
+
+bb2205: ; preds = %reserved_word
+ ret i32 287
+
+bb2206: ; preds = %reserved_word
+ ret i32 287
+
+bb2217: ; preds = %reserved_word
+ ret i32 undef
+
+bb2218: ; preds = %reserved_word
+ ret i32 undef
+
+bb2229: ; preds = %reserved_word
+ unreachable
+
+bb2233: ; preds = %reserved_word
+ ret i32 undef
+
+bb2234: ; preds = %reserved_word
+ ret i32 undef
+
+bb2235: ; preds = %reserved_word
+ ret i32 undef
+
+bb2236: ; preds = %reserved_word
+ ret i32 undef
+
+bb2237: ; preds = %reserved_word
+ ret i32 undef
+
+bb2238: ; preds = %reserved_word
+ ret i32 undef
+
+bb2239: ; preds = %reserved_word, %reserved_word
+ unreachable
+
+bb2267: ; preds = %reserved_word
+ ret i32 280
+
+bb2268: ; preds = %reserved_word
+ ret i32 288
+
+bb2276: ; preds = %reserved_word
+ unreachable
+
+bb2337: ; preds = %reserved_word
+ ret i32 300
+
+bb2348: ; preds = %reserved_word
+ ret i32 undef
+
+bb2349: ; preds = %reserved_word
+ ret i32 undef
+
+bb2350: ; preds = %reserved_word
+ ret i32 undef
+
+bb2356: ; preds = %reserved_word
+ ret i32 undef
+
+bb2357: ; preds = %reserved_word
+ br i1 undef, label %bb2834, label %bb2358
+
+bb2358: ; preds = %bb2357
+ ret i32 undef
+
+bb2367: ; preds = %reserved_word
+ ret i32 undef
+
+bb2368: ; preds = %reserved_word
+ ret i32 270
+
+bb2369: ; preds = %reserved_word
+ ret i32 undef
+
+bb2370: ; preds = %reserved_word
+ unreachable
+
+bb2381: ; preds = %reserved_word
+ unreachable
+
+bb2445: ; preds = %reserved_word
+ unreachable
+
+bb2453: ; preds = %reserved_word
+ unreachable
+
+bb2457: ; preds = %reserved_word
+ unreachable
+
+bb2463: ; preds = %reserved_word
+ ret i32 286
+
+bb2464: ; preds = %reserved_word
+ unreachable
+
+bb2503: ; preds = %reserved_word
+ ret i32 280
+
+bb2504: ; preds = %reserved_word
+ ret i32 undef
+
+bb2515: ; preds = %reserved_word
+ ret i32 undef
+
+bb2516: ; preds = %reserved_word
+ ret i32 undef
+
+bb2522: ; preds = %reserved_word
+ unreachable
+
+bb2527: ; preds = %reserved_word
+ unreachable
+
+bb2537: ; preds = %reserved_word
+ ret i32 undef
+
+bb2538: ; preds = %reserved_word
+ ret i32 undef
+
+bb2549: ; preds = %reserved_word
+ unreachable
+
+bb2555: ; preds = %reserved_word
+ br i1 undef, label %bb2834, label %bb2556
+
+bb2556: ; preds = %bb2555
+ ret i32 undef
+
+bb2565: ; preds = %reserved_word
+ ret i32 undef
+
+bb2566: ; preds = %reserved_word
+ ret i32 undef
+
+bb2567: ; preds = %reserved_word
+ ret i32 undef
+
+bb2568: ; preds = %reserved_word
+ ret i32 undef
+
+bb2569: ; preds = %reserved_word
+ ret i32 undef
+
+bb2570: ; preds = %reserved_word
+ ret i32 undef
+
+bb2571: ; preds = %reserved_word
+ ret i32 undef
+
+bb2572: ; preds = %reserved_word
+ ret i32 undef
+
+bb2583: ; preds = %reserved_word
+ br i1 undef, label %bb2834, label %bb2584
+
+bb2584: ; preds = %bb2583
+ ret i32 undef
+
+bb2593: ; preds = %reserved_word
+ ret i32 282
+
+bb2594: ; preds = %reserved_word
+ ret i32 282
+
+bb2595: ; preds = %reserved_word
+ ret i32 undef
+
+bb2596: ; preds = %reserved_word
+ ret i32 undef
+
+bb2602: ; preds = %reserved_word
+ ret i32 undef
+
+bb2603: ; preds = %reserved_word
+ ret i32 undef
+
+bb2604: ; preds = %reserved_word
+ ret i32 undef
+
+bb2605: ; preds = %reserved_word
+ ret i32 undef
+
+bb2606: ; preds = %reserved_word
+ ret i32 undef
+
+bb2617: ; preds = %reserved_word
+ ret i32 undef
+
+bb2618: ; preds = %reserved_word
+ ret i32 undef
+
+bb2619: ; preds = %reserved_word
+ unreachable
+
+bb2625: ; preds = %reserved_word
+ ret i32 undef
+
+bb2626: ; preds = %reserved_word
+ ret i32 undef
+
+bb2627: ; preds = %reserved_word
+ ret i32 undef
+
+bb2648: ; preds = %reserved_word
+ ret i32 undef
+
+really_sub: ; preds = %reserved_word, %reserved_word
+ unreachable
+
+bb2737: ; preds = %reserved_word
+ ret i32 undef
+
+bb2738: ; preds = %reserved_word
+ ret i32 undef
+
+bb2739: ; preds = %reserved_word
+ ret i32 undef
+
+bb2740: ; preds = %reserved_word
+ ret i32 undef
+
+bb2741: ; preds = %reserved_word
+ ret i32 undef
+
+bb2742: ; preds = %reserved_word
+ ret i32 undef
+
+bb2743: ; preds = %reserved_word
+ ret i32 undef
+
+bb2744: ; preds = %reserved_word
+ unreachable
+
+bb2758: ; preds = %reserved_word
+ ret i32 undef
+
+bb2764: ; preds = %reserved_word
+ ret i32 282
+
+bb2765: ; preds = %reserved_word
+ ret i32 282
+
+bb2766: ; preds = %reserved_word
+ ret i32 undef
+
+bb2782: ; preds = %reserved_word
+ ret i32 273
+
+bb2783: ; preds = %reserved_word
+ ret i32 275
+
+bb2784: ; preds = %reserved_word
+ ret i32 undef
+
+bb2785: ; preds = %reserved_word
+ br i1 undef, label %bb2834, label %bb2786
+
+bb2786: ; preds = %bb2785
+ ret i32 undef
+
+bb2790: ; preds = %reserved_word
+ ret i32 undef
+
+bb2791: ; preds = %reserved_word
+ ret i32 undef
+
+bb2797: ; preds = %reserved_word
+ ret i32 undef
+
+bb2815: ; preds = %reserved_word
+ ret i32 undef
+
+bb2816: ; preds = %reserved_word
+ ret i32 272
+
+bb2817: ; preds = %reserved_word
+ ret i32 undef
+
+bb2818: ; preds = %reserved_word
+ ret i32 282
+
+bb2819: ; preds = %reserved_word
+ ret i32 undef
+
+bb2820: ; preds = %reserved_word
+ ret i32 282
+
+bb2821: ; preds = %reserved_word
+ unreachable
+
+bb2826: ; preds = %reserved_word
+ unreachable
+
+bb2829: ; preds = %reserved_word
+ ret i32 300
+
+bb2830: ; preds = %reserved_word
+ unreachable
+
+bb2834: ; preds = %bb2785, %bb2583, %bb2555, %bb2357, %bb2175, %bb1982, %bb1936
+ ret i32 283
+}
diff --git a/test/CodeGen/X86/2009-07-16-CoalescerBug.ll b/test/CodeGen/X86/2009-07-16-CoalescerBug.ll
new file mode 100644
index 0000000..48af440
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-16-CoalescerBug.ll
@@ -0,0 +1,210 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; rdar://7059496
+
+ %struct.brinfo = type <{ %struct.brinfo*, %struct.brinfo*, i8*, i32, i32, i32, i8, i8, i8, i8 }>
+ %struct.cadata = type <{ i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, %struct.cmatcher*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i8, i8, i8, i8 }>
+ %struct.cline = type <{ %struct.cline*, i32, i8, i8, i8, i8, i8*, i32, i8, i8, i8, i8, i8*, i32, i8, i8, i8, i8, i8*, i32, i32, %struct.cline*, %struct.cline*, i32, i32 }>
+ %struct.cmatch = type <{ i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i8, i8, i8, i8, i32*, i32*, i8*, i8*, i32, i32, i32, i32, i16, i8, i8, i16, i8, i8 }>
+ %struct.cmatcher = type <{ i32, i8, i8, i8, i8, %struct.cmatcher*, i32, i8, i8, i8, i8, %struct.cpattern*, i32, i8, i8, i8, i8, %struct.cpattern*, i32, i8, i8, i8, i8, %struct.cpattern*, i32, i8, i8, i8, i8, %struct.cpattern*, i32, i8, i8, i8, i8 }>
+ %struct.cpattern = type <{ %struct.cpattern*, i32, i8, i8, i8, i8, %union.anon }>
+ %struct.patprog = type <{ i64, i64, i64, i64, i32, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8 }>
+ %union.anon = type <{ [8 x i8] }>
+
+define i32 @addmatches(%struct.cadata* %dat, i8** nocapture %argv) nounwind ssp {
+entry:
+ br i1 undef, label %if.else, label %if.then91
+
+if.then91: ; preds = %entry
+ br label %if.end96
+
+if.else: ; preds = %entry
+ br label %if.end96
+
+if.end96: ; preds = %if.else, %if.then91
+ br i1 undef, label %lor.lhs.false, label %if.then105
+
+lor.lhs.false: ; preds = %if.end96
+ br i1 undef, label %if.else139, label %if.then105
+
+if.then105: ; preds = %lor.lhs.false, %if.end96
+ unreachable
+
+if.else139: ; preds = %lor.lhs.false
+ br i1 undef, label %land.end, label %land.rhs
+
+land.rhs: ; preds = %if.else139
+ unreachable
+
+land.end: ; preds = %if.else139
+ br i1 undef, label %land.lhs.true285, label %if.then315
+
+land.lhs.true285: ; preds = %land.end
+ br i1 undef, label %if.end324, label %if.then322
+
+if.then315: ; preds = %land.end
+ unreachable
+
+if.then322: ; preds = %land.lhs.true285
+ unreachable
+
+if.end324: ; preds = %land.lhs.true285
+ br i1 undef, label %if.end384, label %if.then358
+
+if.then358: ; preds = %if.end324
+ unreachable
+
+if.end384: ; preds = %if.end324
+ br i1 undef, label %if.end394, label %land.lhs.true387
+
+land.lhs.true387: ; preds = %if.end384
+ unreachable
+
+if.end394: ; preds = %if.end384
+ br i1 undef, label %if.end498, label %land.lhs.true399
+
+land.lhs.true399: ; preds = %if.end394
+ br i1 undef, label %if.end498, label %if.then406
+
+if.then406: ; preds = %land.lhs.true399
+ unreachable
+
+if.end498: ; preds = %land.lhs.true399, %if.end394
+ br i1 undef, label %if.end514, label %if.then503
+
+if.then503: ; preds = %if.end498
+ unreachable
+
+if.end514: ; preds = %if.end498
+ br i1 undef, label %if.end585, label %if.then520
+
+if.then520: ; preds = %if.end514
+ br i1 undef, label %lor.lhs.false547, label %if.then560
+
+lor.lhs.false547: ; preds = %if.then520
+ unreachable
+
+if.then560: ; preds = %if.then520
+ br i1 undef, label %if.end585, label %land.lhs.true566
+
+land.lhs.true566: ; preds = %if.then560
+ br i1 undef, label %if.end585, label %if.then573
+
+if.then573: ; preds = %land.lhs.true566
+ unreachable
+
+if.end585: ; preds = %land.lhs.true566, %if.then560, %if.end514
+ br i1 undef, label %cond.true593, label %cond.false599
+
+cond.true593: ; preds = %if.end585
+ unreachable
+
+cond.false599: ; preds = %if.end585
+ br i1 undef, label %if.end647, label %if.then621
+
+if.then621: ; preds = %cond.false599
+ br i1 undef, label %cond.true624, label %cond.false630
+
+cond.true624: ; preds = %if.then621
+ br label %if.end647
+
+cond.false630: ; preds = %if.then621
+ unreachable
+
+if.end647: ; preds = %cond.true624, %cond.false599
+ br i1 undef, label %if.end723, label %if.then701
+
+if.then701: ; preds = %if.end647
+ br label %if.end723
+
+if.end723: ; preds = %if.then701, %if.end647
+ br i1 undef, label %if.else1090, label %if.then729
+
+if.then729: ; preds = %if.end723
+ br i1 undef, label %if.end887, label %if.then812
+
+if.then812: ; preds = %if.then729
+ unreachable
+
+if.end887: ; preds = %if.then729
+ br i1 undef, label %if.end972, label %if.then893
+
+if.then893: ; preds = %if.end887
+ br i1 undef, label %if.end919, label %if.then903
+
+if.then903: ; preds = %if.then893
+ unreachable
+
+if.end919: ; preds = %if.then893
+ br label %if.end972
+
+if.end972: ; preds = %if.end919, %if.end887
+ %sline.0 = phi %struct.cline* [ undef, %if.end919 ], [ null, %if.end887 ] ; <%struct.cline*> [#uses=5]
+ %bcs.0 = phi i32 [ undef, %if.end919 ], [ 0, %if.end887 ] ; <i32> [#uses=5]
+ br i1 undef, label %if.end1146, label %land.lhs.true975
+
+land.lhs.true975: ; preds = %if.end972
+ br i1 undef, label %if.end1146, label %if.then980
+
+if.then980: ; preds = %land.lhs.true975
+ br i1 undef, label %cond.false1025, label %cond.false1004
+
+cond.false1004: ; preds = %if.then980
+ unreachable
+
+cond.false1025: ; preds = %if.then980
+ br i1 undef, label %if.end1146, label %if.then1071
+
+if.then1071: ; preds = %cond.false1025
+ br i1 undef, label %if.then1074, label %if.end1081
+
+if.then1074: ; preds = %if.then1071
+ br label %if.end1081
+
+if.end1081: ; preds = %if.then1074, %if.then1071
+ %call1083 = call %struct.patprog* @patcompile(i8* undef, i32 0, i8** null) nounwind ssp ; <%struct.patprog*> [#uses=2]
+ br i1 undef, label %if.end1146, label %if.then1086
+
+if.then1086: ; preds = %if.end1081
+ br label %if.end1146
+
+if.else1090: ; preds = %if.end723
+ br i1 undef, label %if.end1146, label %land.lhs.true1093
+
+land.lhs.true1093: ; preds = %if.else1090
+ br i1 undef, label %if.end1146, label %if.then1098
+
+if.then1098: ; preds = %land.lhs.true1093
+ unreachable
+
+if.end1146: ; preds = %land.lhs.true1093, %if.else1090, %if.then1086, %if.end1081, %cond.false1025, %land.lhs.true975, %if.end972
+ %cp.0 = phi %struct.patprog* [ %call1083, %if.then1086 ], [ null, %if.end972 ], [ null, %land.lhs.true975 ], [ null, %cond.false1025 ], [ %call1083, %if.end1081 ], [ null, %if.else1090 ], [ null, %land.lhs.true1093 ] ; <%struct.patprog*> [#uses=1]
+ %sline.1 = phi %struct.cline* [ %sline.0, %if.then1086 ], [ %sline.0, %if.end972 ], [ %sline.0, %land.lhs.true975 ], [ %sline.0, %cond.false1025 ], [ %sline.0, %if.end1081 ], [ null, %if.else1090 ], [ null, %land.lhs.true1093 ] ; <%struct.cline*> [#uses=1]
+ %bcs.1 = phi i32 [ %bcs.0, %if.then1086 ], [ %bcs.0, %if.end972 ], [ %bcs.0, %land.lhs.true975 ], [ %bcs.0, %cond.false1025 ], [ %bcs.0, %if.end1081 ], [ 0, %if.else1090 ], [ 0, %land.lhs.true1093 ] ; <i32> [#uses=1]
+ br i1 undef, label %if.end1307, label %do.body1270
+
+do.body1270: ; preds = %if.end1146
+ unreachable
+
+if.end1307: ; preds = %if.end1146
+ br i1 undef, label %if.end1318, label %if.then1312
+
+if.then1312: ; preds = %if.end1307
+ unreachable
+
+if.end1318: ; preds = %if.end1307
+ br i1 undef, label %for.cond1330.preheader, label %if.then1323
+
+if.then1323: ; preds = %if.end1318
+ unreachable
+
+for.cond1330.preheader: ; preds = %if.end1318
+ %call1587 = call i8* @comp_match(i8* undef, i8* undef, i8* undef, %struct.patprog* %cp.0, %struct.cline** undef, i32 0, %struct.brinfo** undef, i32 0, %struct.brinfo** undef, i32 %bcs.1, i32* undef) nounwind ssp ; <i8*> [#uses=0]
+ %call1667 = call %struct.cmatch* @add_match_data(i32 0, i8* undef, i8* undef, %struct.cline* undef, i8* undef, i8* null, i8* undef, i8* undef, i8* undef, i8* undef, %struct.cline* null, i8* undef, %struct.cline* %sline.1, i8* undef, i32 undef, i32 undef) ssp ; <%struct.cmatch*> [#uses=0]
+ unreachable
+}
+
+declare %struct.patprog* @patcompile(i8*, i32, i8**) ssp
+
+declare i8* @comp_match(i8*, i8*, i8*, %struct.patprog*, %struct.cline**, i32, %struct.brinfo**, i32, %struct.brinfo**, i32, i32*) ssp
+
+declare %struct.cmatch* @add_match_data(i32, i8*, i8*, %struct.cline*, i8*, i8*, i8*, i8*, i8*, i8*, %struct.cline*, i8*, %struct.cline*, i8*, i32, i32) nounwind ssp
diff --git a/test/CodeGen/X86/2009-07-16-LoadFoldingBug.ll b/test/CodeGen/X86/2009-07-16-LoadFoldingBug.ll
new file mode 100644
index 0000000..e21c892
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-16-LoadFoldingBug.ll
@@ -0,0 +1,102 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
+
+; CHECK: _foo:
+; CHECK: pavgw LCPI1_4(%rip)
+
+; rdar://7057804
+
+define void @foo(i16* %out8x8, i16* %in8x8, i32 %lastrow) optsize ssp {
+entry:
+ %0 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518>, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %1 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %0, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %2 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> zeroinitializer, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %3 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %2, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp.i.i10 = add <8 x i16> %0, %3 ; <<8 x i16>> [#uses=1]
+ %4 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> zeroinitializer, <8 x i16> %1) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %5 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i10, <8 x i16> %4) nounwind readnone ; <<8 x i16>> [#uses=3]
+ %6 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %5, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %7 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518>, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %8 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %7, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %9 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> zeroinitializer, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %10 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %9, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp.i.i8 = add <8 x i16> %7, %10 ; <<8 x i16>> [#uses=1]
+ %11 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %8) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %12 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i8, <8 x i16> %11) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %13 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> undef, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %14 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %5, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %15 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %5, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %16 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %6, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %17 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %12, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %18 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %13, <8 x i16> %15) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %19 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %14) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %20 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=4]
+ %21 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %17) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %22 = bitcast <8 x i16> %21 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %23 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170>, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %24 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %23, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %25 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> zeroinitializer, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %26 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %25, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp.i.i6 = add <8 x i16> %23, %26 ; <<8 x i16>> [#uses=1]
+ %27 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %24) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %28 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i6, <8 x i16> %27) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %29 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170>, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %30 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %29, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %31 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> zeroinitializer, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %32 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %31, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp.i.i4 = add <8 x i16> %29, %32 ; <<8 x i16>> [#uses=1]
+ %33 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %30) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %34 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i4, <8 x i16> %33) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %35 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170>, <8 x i16> %20) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %tmp.i2.i1 = mul <8 x i16> %20, <i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170> ; <<8 x i16>> [#uses=1]
+ %36 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %35, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %37 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %tmp.i2.i1, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %38 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %37, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp.i.i2 = add <8 x i16> %35, %38 ; <<8 x i16>> [#uses=1]
+ %39 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %19, <8 x i16> %36) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %40 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i2, <8 x i16> %39) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %41 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170>, <8 x i16> %20) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %tmp.i2.i = mul <8 x i16> %20, <i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170> ; <<8 x i16>> [#uses=1]
+ %42 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %41, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %43 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %tmp.i2.i, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %44 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %43, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp.i.i = add <8 x i16> %41, %44 ; <<8 x i16>> [#uses=1]
+ %45 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %19, <8 x i16> %42) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %46 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i, <8 x i16> %45) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %47 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %18, <8 x i16> %16) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %48 = bitcast <8 x i16> %47 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %49 = bitcast <8 x i16> %28 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %50 = getelementptr i16* %out8x8, i64 8 ; <i16*> [#uses=1]
+ %51 = bitcast i16* %50 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> %49, <2 x i64>* %51, align 16
+ %52 = bitcast <8 x i16> %40 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %53 = getelementptr i16* %out8x8, i64 16 ; <i16*> [#uses=1]
+ %54 = bitcast i16* %53 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> %52, <2 x i64>* %54, align 16
+ %55 = getelementptr i16* %out8x8, i64 24 ; <i16*> [#uses=1]
+ %56 = bitcast i16* %55 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> %48, <2 x i64>* %56, align 16
+ %57 = bitcast <8 x i16> %46 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %58 = getelementptr i16* %out8x8, i64 40 ; <i16*> [#uses=1]
+ %59 = bitcast i16* %58 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> %57, <2 x i64>* %59, align 16
+ %60 = bitcast <8 x i16> %34 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %61 = getelementptr i16* %out8x8, i64 48 ; <i16*> [#uses=1]
+ %62 = bitcast i16* %61 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> %60, <2 x i64>* %62, align 16
+ %63 = getelementptr i16* %out8x8, i64 56 ; <i16*> [#uses=1]
+ %64 = bitcast i16* %63 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> %22, <2 x i64>* %64, align 16
+ ret void
+}
+
+declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32) nounwind readnone
diff --git a/test/CodeGen/X86/2009-07-17-StackColoringBug.ll b/test/CodeGen/X86/2009-07-17-StackColoringBug.ll
new file mode 100644
index 0000000..3e5bd34
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-17-StackColoringBug.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -disable-fp-elim -color-ss-with-regs | not grep dil
+; PR4552
+
+target triple = "i386-pc-linux-gnu"
+@g_8 = internal global i32 0 ; <i32*> [#uses=1]
+@g_72 = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 (i32, i8, i8)* @uint84 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @uint84(i32 %p_15, i8 signext %p_17, i8 signext %p_19) nounwind {
+entry:
+ %g_72.promoted = load i32* @g_72 ; <i32> [#uses=1]
+ %g_8.promoted = load i32* @g_8 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %func_40.exit, %entry
+ %g_8.tmp.1 = phi i32 [ %g_8.promoted, %entry ], [ %g_8.tmp.0, %func_40.exit ] ; <i32> [#uses=3]
+ %g_72.tmp.1 = phi i32 [ %g_72.promoted, %entry ], [ %g_72.tmp.0, %func_40.exit ] ; <i32> [#uses=3]
+ %retval12.i4.i.i = trunc i32 %g_8.tmp.1 to i8 ; <i8> [#uses=2]
+ %0 = trunc i32 %g_72.tmp.1 to i8 ; <i8> [#uses=2]
+ %1 = mul i8 %retval12.i4.i.i, %0 ; <i8> [#uses=1]
+ %2 = icmp eq i8 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb2.i.i, label %bb.i.i
+
+bb.i.i: ; preds = %bb
+ %3 = sext i8 %0 to i32 ; <i32> [#uses=1]
+ %4 = and i32 %3, 50295 ; <i32> [#uses=1]
+ %5 = icmp eq i32 %4, 0 ; <i1> [#uses=1]
+ br i1 %5, label %bb2.i.i, label %func_55.exit.i
+
+bb2.i.i: ; preds = %bb.i.i, %bb
+ br label %func_55.exit.i
+
+func_55.exit.i: ; preds = %bb2.i.i, %bb.i.i
+ %g_72.tmp.2 = phi i32 [ 1, %bb2.i.i ], [ %g_72.tmp.1, %bb.i.i ] ; <i32> [#uses=1]
+ %6 = phi i32 [ 1, %bb2.i.i ], [ %g_72.tmp.1, %bb.i.i ] ; <i32> [#uses=1]
+ %7 = trunc i32 %6 to i8 ; <i8> [#uses=2]
+ %8 = mul i8 %7, %retval12.i4.i.i ; <i8> [#uses=1]
+ %9 = icmp eq i8 %8, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb2.i4.i, label %bb.i3.i
+
+bb.i3.i: ; preds = %func_55.exit.i
+ %10 = sext i8 %7 to i32 ; <i32> [#uses=1]
+ %11 = and i32 %10, 50295 ; <i32> [#uses=1]
+ %12 = icmp eq i32 %11, 0 ; <i1> [#uses=1]
+ br i1 %12, label %bb2.i4.i, label %func_40.exit
+
+bb2.i4.i: ; preds = %bb.i3.i, %func_55.exit.i
+ br label %func_40.exit
+
+func_40.exit: ; preds = %bb2.i4.i, %bb.i3.i
+ %g_72.tmp.0 = phi i32 [ 1, %bb2.i4.i ], [ %g_72.tmp.2, %bb.i3.i ] ; <i32> [#uses=1]
+ %phitmp = icmp sgt i32 %g_8.tmp.1, 0 ; <i1> [#uses=1]
+ %g_8.tmp.0 = select i1 %phitmp, i32 %g_8.tmp.1, i32 1 ; <i32> [#uses=1]
+ br label %bb
+}
diff --git a/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll b/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll
new file mode 100644
index 0000000..a0095ab2
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86-64
+; PR4583
+
+define i32 @atomic_cmpset_long(i64* %dst, i64 %exp, i64 %src) nounwind ssp noredzone noimplicitfloat {
+entry:
+ %0 = call i8 asm sideeffect "\09lock ; \09\09\09cmpxchgq $2,$1 ;\09 sete\09$0 ;\09\091:\09\09\09\09# atomic_cmpset_long", "={ax},=*m,r,{ax},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* undef, i64 undef, i64 undef, i64* undef) nounwind ; <i8> [#uses=0]
+ br label %1
+
+; <label>:1 ; preds = %entry
+ ret i32 undef
+}
diff --git a/test/CodeGen/X86/2009-07-20-CoalescerBug.ll b/test/CodeGen/X86/2009-07-20-CoalescerBug.ll
new file mode 100644
index 0000000..e99edd6
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-20-CoalescerBug.ll
@@ -0,0 +1,165 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; PR4587
+; rdar://7072590
+
+ %struct.re_pattern_buffer = type <{ i8*, i64, i64, i64, i8*, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8 }>
+
+define fastcc i32 @regex_compile(i8* %pattern, i64 %size, i64 %syntax, %struct.re_pattern_buffer* nocapture %bufp) nounwind ssp {
+entry:
+ br i1 undef, label %return, label %if.end
+
+if.end: ; preds = %entry
+ %tmp35 = getelementptr %struct.re_pattern_buffer* %bufp, i64 0, i32 3 ; <i64*> [#uses=1]
+ store i64 %syntax, i64* %tmp35
+ store i32 undef, i32* undef
+ br i1 undef, label %if.then66, label %if.end102
+
+if.then66: ; preds = %if.end
+ br i1 false, label %if.else, label %if.then70
+
+if.then70: ; preds = %if.then66
+ %call74 = call i8* @xrealloc(i8* undef, i64 32) nounwind ssp ; <i8*> [#uses=0]
+ unreachable
+
+if.else: ; preds = %if.then66
+ br i1 false, label %do.body86, label %if.end99
+
+do.body86: ; preds = %if.else
+ br i1 false, label %do.end, label %if.then90
+
+if.then90: ; preds = %do.body86
+ unreachable
+
+do.end: ; preds = %do.body86
+ ret i32 12
+
+if.end99: ; preds = %if.else
+ br label %if.end102
+
+if.end102: ; preds = %if.end99, %if.end
+ br label %while.body
+
+while.body: ; preds = %if.end1126, %sw.bb532, %while.body, %if.end102
+ %laststart.2 = phi i8* [ null, %if.end102 ], [ %laststart.7.ph, %if.end1126 ], [ %laststart.2, %sw.bb532 ], [ %laststart.2, %while.body ] ; <i8*> [#uses=6]
+ %b.1 = phi i8* [ undef, %if.end102 ], [ %ctg29688, %if.end1126 ], [ %b.1, %sw.bb532 ], [ %b.1, %while.body ] ; <i8*> [#uses=5]
+ br i1 undef, label %while.body, label %if.end127
+
+if.end127: ; preds = %while.body
+ switch i32 undef, label %sw.bb532 [
+ i32 123, label %handle_interval
+ i32 92, label %do.body3527
+ ]
+
+sw.bb532: ; preds = %if.end127
+ br i1 undef, label %while.body, label %if.end808
+
+if.end808: ; preds = %sw.bb532
+ br i1 undef, label %while.cond1267.preheader, label %if.then811
+
+while.cond1267.preheader: ; preds = %if.end808
+ br i1 false, label %return, label %if.end1294
+
+if.then811: ; preds = %if.end808
+ %call817 = call fastcc i8* @skip_one_char(i8* %laststart.2) ssp ; <i8*> [#uses=0]
+ br i1 undef, label %cond.end834, label %lor.lhs.false827
+
+lor.lhs.false827: ; preds = %if.then811
+ br label %cond.end834
+
+cond.end834: ; preds = %lor.lhs.false827, %if.then811
+ br i1 undef, label %land.lhs.true838, label %while.cond979.preheader
+
+land.lhs.true838: ; preds = %cond.end834
+ br i1 undef, label %if.then842, label %while.cond979.preheader
+
+if.then842: ; preds = %land.lhs.true838
+ %conv851 = trunc i64 undef to i32 ; <i32> [#uses=1]
+ br label %while.cond979.preheader
+
+while.cond979.preheader: ; preds = %if.then842, %land.lhs.true838, %cond.end834
+ %startoffset.0.ph = phi i32 [ 0, %cond.end834 ], [ 0, %land.lhs.true838 ], [ %conv851, %if.then842 ] ; <i32> [#uses=2]
+ %laststart.7.ph = phi i8* [ %laststart.2, %cond.end834 ], [ %laststart.2, %land.lhs.true838 ], [ %laststart.2, %if.then842 ] ; <i8*> [#uses=3]
+ %b.4.ph = phi i8* [ %b.1, %cond.end834 ], [ %b.1, %land.lhs.true838 ], [ %b.1, %if.then842 ] ; <i8*> [#uses=3]
+ %ctg29688 = getelementptr i8* %b.4.ph, i64 6 ; <i8*> [#uses=1]
+ br label %while.cond979
+
+while.cond979: ; preds = %if.end1006, %while.cond979.preheader
+ %cmp991 = icmp ugt i64 undef, 0 ; <i1> [#uses=1]
+ br i1 %cmp991, label %do.body994, label %while.end1088
+
+do.body994: ; preds = %while.cond979
+ br i1 undef, label %return, label %if.end1006
+
+if.end1006: ; preds = %do.body994
+ %cmp1014 = icmp ugt i64 undef, 32768 ; <i1> [#uses=1]
+ %storemerge10953 = select i1 %cmp1014, i64 32768, i64 undef ; <i64> [#uses=1]
+ store i64 %storemerge10953, i64* undef
+ br i1 false, label %return, label %while.cond979
+
+while.end1088: ; preds = %while.cond979
+ br i1 undef, label %if.then1091, label %if.else1101
+
+if.then1091: ; preds = %while.end1088
+ store i8 undef, i8* undef
+ %idx.ext1132.pre = zext i32 %startoffset.0.ph to i64 ; <i64> [#uses=1]
+ %add.ptr1133.pre = getelementptr i8* %laststart.7.ph, i64 %idx.ext1132.pre ; <i8*> [#uses=1]
+ %sub.ptr.lhs.cast1135.pre = ptrtoint i8* %add.ptr1133.pre to i64 ; <i64> [#uses=1]
+ br label %if.end1126
+
+if.else1101: ; preds = %while.end1088
+ %cond1109 = select i1 undef, i32 18, i32 14 ; <i32> [#uses=1]
+ %idx.ext1112 = zext i32 %startoffset.0.ph to i64 ; <i64> [#uses=1]
+ %add.ptr1113 = getelementptr i8* %laststart.7.ph, i64 %idx.ext1112 ; <i8*> [#uses=2]
+ %sub.ptr.rhs.cast1121 = ptrtoint i8* %add.ptr1113 to i64 ; <i64> [#uses=1]
+ call fastcc void @insert_op1(i32 %cond1109, i8* %add.ptr1113, i32 undef, i8* %b.4.ph) ssp
+ br label %if.end1126
+
+if.end1126: ; preds = %if.else1101, %if.then1091
+ %sub.ptr.lhs.cast1135.pre-phi = phi i64 [ %sub.ptr.rhs.cast1121, %if.else1101 ], [ %sub.ptr.lhs.cast1135.pre, %if.then1091 ] ; <i64> [#uses=1]
+ %add.ptr1128 = getelementptr i8* %b.4.ph, i64 3 ; <i8*> [#uses=1]
+ %sub.ptr.rhs.cast1136 = ptrtoint i8* %add.ptr1128 to i64 ; <i64> [#uses=1]
+ %sub.ptr.sub1137 = sub i64 %sub.ptr.lhs.cast1135.pre-phi, %sub.ptr.rhs.cast1136 ; <i64> [#uses=1]
+ %sub.ptr.sub11378527 = trunc i64 %sub.ptr.sub1137 to i32 ; <i32> [#uses=1]
+ %conv1139 = add i32 %sub.ptr.sub11378527, -3 ; <i32> [#uses=1]
+ store i8 undef, i8* undef
+ %shr10.i8599 = lshr i32 %conv1139, 8 ; <i32> [#uses=1]
+ %conv6.i8600 = trunc i32 %shr10.i8599 to i8 ; <i8> [#uses=1]
+ store i8 %conv6.i8600, i8* undef
+ br label %while.body
+
+if.end1294: ; preds = %while.cond1267.preheader
+ ret i32 12
+
+do.body3527: ; preds = %if.end127
+ br i1 undef, label %do.end3536, label %if.then3531
+
+if.then3531: ; preds = %do.body3527
+ unreachable
+
+do.end3536: ; preds = %do.body3527
+ ret i32 5
+
+handle_interval: ; preds = %if.end127
+ br i1 undef, label %do.body4547, label %cond.false4583
+
+do.body4547: ; preds = %handle_interval
+ br i1 undef, label %do.end4556, label %if.then4551
+
+if.then4551: ; preds = %do.body4547
+ unreachable
+
+do.end4556: ; preds = %do.body4547
+ ret i32 9
+
+cond.false4583: ; preds = %handle_interval
+ unreachable
+
+return: ; preds = %if.end1006, %do.body994, %while.cond1267.preheader, %entry
+ ret i32 undef
+}
+
+declare i8* @xrealloc(i8*, i64) ssp
+
+declare fastcc i8* @skip_one_char(i8*) nounwind readonly ssp
+
+declare fastcc void @insert_op1(i32, i8*, i32, i8*) nounwind ssp
diff --git a/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll b/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll
new file mode 100644
index 0000000..e83b3a7
--- /dev/null
+++ b/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86
+
+@bsBuff = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 ()* @bsGetUInt32 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define fastcc i32 @bsGetUInt32() nounwind ssp {
+entry:
+ %bsBuff.promoted44 = load i32* @bsBuff ; <i32> [#uses=1]
+ %0 = add i32 0, -8 ; <i32> [#uses=1]
+ %1 = lshr i32 %bsBuff.promoted44, %0 ; <i32> [#uses=1]
+ %2 = shl i32 %1, 8 ; <i32> [#uses=1]
+ br label %bb3.i17
+
+bb3.i9: ; preds = %bb3.i17
+ br i1 false, label %bb2.i16, label %bb1.i15
+
+bb1.i15: ; preds = %bb3.i9
+ unreachable
+
+bb2.i16: ; preds = %bb3.i9
+ br label %bb3.i17
+
+bb3.i17: ; preds = %bb2.i16, %entry
+ br i1 false, label %bb3.i9, label %bsR.exit18
+
+bsR.exit18: ; preds = %bb3.i17
+ %3 = or i32 0, %2 ; <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll b/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll
new file mode 100644
index 0000000..b9b09a3
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64
+; PR4669
+declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32)
+
+define <1 x i64> @test(i64 %t) {
+entry:
+ %t1 = insertelement <1 x i64> undef, i64 %t, i32 0
+ %t2 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %t1, i32 48)
+ ret <1 x i64> %t2
+}
diff --git a/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll b/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll
new file mode 100644
index 0000000..b329c91
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll
@@ -0,0 +1,142 @@
+; RUN: llc < %s -O3
+; PR4626
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+@g_3 = common global i8 0, align 1 ; <i8*> [#uses=2]
+
+define signext i8 @safe_mul_func_int16_t_s_s(i32 %_si1, i8 signext %_si2) nounwind readnone {
+entry:
+ %tobool = icmp eq i32 %_si1, 0 ; <i1> [#uses=1]
+ %cmp = icmp sgt i8 %_si2, 0 ; <i1> [#uses=2]
+ %or.cond = or i1 %cmp, %tobool ; <i1> [#uses=1]
+ br i1 %or.cond, label %lor.rhs, label %land.lhs.true3
+
+land.lhs.true3: ; preds = %entry
+ %conv5 = sext i8 %_si2 to i32 ; <i32> [#uses=1]
+ %cmp7 = icmp slt i32 %conv5, %_si1 ; <i1> [#uses=1]
+ br i1 %cmp7, label %cond.end, label %lor.rhs
+
+lor.rhs: ; preds = %land.lhs.true3, %entry
+ %cmp10.not = icmp slt i32 %_si1, 1 ; <i1> [#uses=1]
+ %or.cond23 = and i1 %cmp, %cmp10.not ; <i1> [#uses=1]
+ br i1 %or.cond23, label %lor.end, label %cond.false
+
+lor.end: ; preds = %lor.rhs
+ %tobool19 = icmp ne i8 %_si2, 0 ; <i1> [#uses=2]
+ %lor.ext = zext i1 %tobool19 to i32 ; <i32> [#uses=1]
+ br i1 %tobool19, label %cond.end, label %cond.false
+
+cond.false: ; preds = %lor.end, %lor.rhs
+ %conv21 = sext i8 %_si2 to i32 ; <i32> [#uses=1]
+ br label %cond.end
+
+cond.end: ; preds = %cond.false, %lor.end, %land.lhs.true3
+ %cond = phi i32 [ %conv21, %cond.false ], [ 1, %land.lhs.true3 ], [ %lor.ext, %lor.end ] ; <i32> [#uses=1]
+ %conv22 = trunc i32 %cond to i8 ; <i8> [#uses=1]
+ ret i8 %conv22
+}
+
+define i32 @func_34(i8 signext %p_35) nounwind readonly {
+entry:
+ %tobool = icmp eq i8 %p_35, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %lor.lhs.false, label %if.then
+
+lor.lhs.false: ; preds = %entry
+ %tmp1 = load i8* @g_3 ; <i8> [#uses=1]
+ %tobool3 = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tobool3, label %return, label %if.then
+
+if.then: ; preds = %lor.lhs.false, %entry
+ %tmp4 = load i8* @g_3 ; <i8> [#uses=1]
+ %conv5 = sext i8 %tmp4 to i32 ; <i32> [#uses=1]
+ ret i32 %conv5
+
+return: ; preds = %lor.lhs.false
+ ret i32 0
+}
+
+define void @foo(i32 %p_5) noreturn nounwind {
+entry:
+ %cmp = icmp sgt i32 %p_5, 0 ; <i1> [#uses=2]
+ %call = tail call i32 @safe() nounwind ; <i32> [#uses=1]
+ %conv1 = trunc i32 %call to i8 ; <i8> [#uses=3]
+ %tobool.i = xor i1 %cmp, true ; <i1> [#uses=3]
+ %cmp.i = icmp sgt i8 %conv1, 0 ; <i1> [#uses=3]
+ %or.cond.i = or i1 %cmp.i, %tobool.i ; <i1> [#uses=1]
+ br i1 %or.cond.i, label %lor.rhs.i, label %land.lhs.true3.i
+
+land.lhs.true3.i: ; preds = %entry
+ %xor = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ %conv5.i = sext i8 %conv1 to i32 ; <i32> [#uses=1]
+ %cmp7.i = icmp slt i32 %conv5.i, %xor ; <i1> [#uses=1]
+ %cmp7.i.not = xor i1 %cmp7.i, true ; <i1> [#uses=1]
+ %or.cond23.i = and i1 %cmp.i, %tobool.i ; <i1> [#uses=1]
+ %or.cond = and i1 %cmp7.i.not, %or.cond23.i ; <i1> [#uses=1]
+ br i1 %or.cond, label %lor.end.i, label %for.inc
+
+lor.rhs.i: ; preds = %entry
+ %or.cond23.i.old = and i1 %cmp.i, %tobool.i ; <i1> [#uses=1]
+ br i1 %or.cond23.i.old, label %lor.end.i, label %for.inc
+
+lor.end.i: ; preds = %lor.rhs.i, %land.lhs.true3.i
+ %tobool19.i = icmp eq i8 %conv1, 0 ; <i1> [#uses=0]
+ br label %for.inc
+
+for.inc: ; preds = %for.inc, %lor.end.i, %lor.rhs.i, %land.lhs.true3.i
+ br label %for.inc
+}
+
+declare i32 @safe()
+
+define i32 @func_35(i8 signext %p_35) nounwind readonly {
+entry:
+ %tobool = icmp eq i8 %p_35, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %lor.lhs.false, label %if.then
+
+lor.lhs.false: ; preds = %entry
+ %tmp1 = load i8* @g_3 ; <i8> [#uses=1]
+ %tobool3 = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tobool3, label %return, label %if.then
+
+if.then: ; preds = %lor.lhs.false, %entry
+ %tmp4 = load i8* @g_3 ; <i8> [#uses=1]
+ %conv5 = sext i8 %tmp4 to i32 ; <i32> [#uses=1]
+ ret i32 %conv5
+
+return: ; preds = %lor.lhs.false
+ ret i32 0
+}
+
+define void @bar(i32 %p_5) noreturn nounwind {
+entry:
+ %cmp = icmp sgt i32 %p_5, 0 ; <i1> [#uses=2]
+ %call = tail call i32 @safe() nounwind ; <i32> [#uses=1]
+ %conv1 = trunc i32 %call to i8 ; <i8> [#uses=3]
+ %tobool.i = xor i1 %cmp, true ; <i1> [#uses=3]
+ %cmp.i = icmp sgt i8 %conv1, 0 ; <i1> [#uses=3]
+ %or.cond.i = or i1 %cmp.i, %tobool.i ; <i1> [#uses=1]
+ br i1 %or.cond.i, label %lor.rhs.i, label %land.lhs.true3.i
+
+land.lhs.true3.i: ; preds = %entry
+ %xor = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ %conv5.i = sext i8 %conv1 to i32 ; <i32> [#uses=1]
+ %cmp7.i = icmp slt i32 %conv5.i, %xor ; <i1> [#uses=1]
+ %cmp7.i.not = xor i1 %cmp7.i, true ; <i1> [#uses=1]
+ %or.cond23.i = and i1 %cmp.i, %tobool.i ; <i1> [#uses=1]
+ %or.cond = and i1 %cmp7.i.not, %or.cond23.i ; <i1> [#uses=1]
+ br i1 %or.cond, label %lor.end.i, label %for.inc
+
+lor.rhs.i: ; preds = %entry
+ %or.cond23.i.old = and i1 %cmp.i, %tobool.i ; <i1> [#uses=1]
+ br i1 %or.cond23.i.old, label %lor.end.i, label %for.inc
+
+lor.end.i: ; preds = %lor.rhs.i, %land.lhs.true3.i
+ %tobool19.i = icmp eq i8 %conv1, 0 ; <i1> [#uses=0]
+ br label %for.inc
+
+for.inc: ; preds = %for.inc, %lor.end.i, %lor.rhs.i, %land.lhs.true3.i
+ br label %for.inc
+}
+
+declare i32 @safe()
diff --git a/test/CodeGen/X86/2009-08-06-inlineasm.ll b/test/CodeGen/X86/2009-08-06-inlineasm.ll
new file mode 100644
index 0000000..cc2f3d8
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-06-inlineasm.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s
+; PR4668
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define i32 @x(i32 %qscale) nounwind {
+entry:
+ %temp_block = alloca [64 x i16], align 16 ; <[64 x i16]*> [#uses=0]
+ %tmp = call i32 asm sideeffect "xor %edx, %edx", "={dx},~{dirflag},~{fpsr},~{flags}"() nounwind ; <i32> [#uses=1]
+ br i1 undef, label %if.end78, label %if.then28
+
+if.then28: ; preds = %entry
+ br label %if.end78
+
+if.end78: ; preds = %if.then28, %entry
+ %level.1 = phi i32 [ %tmp, %if.then28 ], [ 0, %entry ] ; <i32> [#uses=1]
+ %add.ptr1 = getelementptr [64 x i16]* null, i32 0, i32 %qscale ; <i16*> [#uses=1]
+ %add.ptr2 = getelementptr [64 x i16]* null, i32 1, i32 %qscale ; <i16*> [#uses=1]
+ %add.ptr3 = getelementptr [64 x i16]* null, i32 2, i32 %qscale ; <i16*> [#uses=1]
+ %add.ptr4 = getelementptr [64 x i16]* null, i32 3, i32 %qscale ; <i16*> [#uses=1]
+ %add.ptr5 = getelementptr [64 x i16]* null, i32 4, i32 %qscale ; <i16*> [#uses=1]
+ %add.ptr6 = getelementptr [64 x i16]* null, i32 5, i32 %qscale ; <i16*> [#uses=1]
+ %tmp1 = call i32 asm sideeffect "nop", "={ax},r,r,r,r,r,0,~{dirflag},~{fpsr},~{flags}"(i16* %add.ptr6, i16* %add.ptr5, i16* %add.ptr4, i16* %add.ptr3, i16* %add.ptr2, i16* %add.ptr1) nounwind ; <i32> [#uses=0]
+ ret i32 %level.1
+}
diff --git a/test/CodeGen/X86/2009-08-08-CastError.ll b/test/CodeGen/X86/2009-08-08-CastError.ll
new file mode 100644
index 0000000..9456d91
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-08-CastError.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64-mingw64 | grep movabsq
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define <4 x float> @RecursiveTestFunc1(i8*) {
+EntryBlock:
+ %1 = call <4 x float> inttoptr (i64 5367207198 to <4 x float> (i8*, float, float, float, float)*)(i8* %0, float 8.000000e+00, float 5.000000e+00, float 3.000000e+00, float 4.000000e+00) ; <<4 x float>> [#uses=1]
+ ret <4 x float> %1
+}
diff --git a/test/CodeGen/X86/2009-08-12-badswitch.ll b/test/CodeGen/X86/2009-08-12-badswitch.ll
new file mode 100644
index 0000000..a94fce0
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-12-badswitch.ll
@@ -0,0 +1,176 @@
+; RUN: llc < %s | grep LJT
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10"
+
+declare void @f1() nounwind readnone
+declare void @f2() nounwind readnone
+declare void @f3() nounwind readnone
+declare void @f4() nounwind readnone
+declare void @f5() nounwind readnone
+declare void @f6() nounwind readnone
+declare void @f7() nounwind readnone
+declare void @f8() nounwind readnone
+declare void @f9() nounwind readnone
+declare void @f10() nounwind readnone
+declare void @f11() nounwind readnone
+declare void @f12() nounwind readnone
+declare void @f13() nounwind readnone
+declare void @f14() nounwind readnone
+declare void @f15() nounwind readnone
+declare void @f16() nounwind readnone
+declare void @f17() nounwind readnone
+declare void @f18() nounwind readnone
+declare void @f19() nounwind readnone
+declare void @f20() nounwind readnone
+declare void @f21() nounwind readnone
+declare void @f22() nounwind readnone
+declare void @f23() nounwind readnone
+declare void @f24() nounwind readnone
+declare void @f25() nounwind readnone
+declare void @f26() nounwind readnone
+
+define internal fastcc i32 @foo(i64 %bar) nounwind ssp {
+entry:
+ br label %bb49
+
+bb49:
+ switch i64 %bar, label %RETURN [
+ i64 2, label %RRETURN_2
+ i64 3, label %RRETURN_6
+ i64 4, label %RRETURN_7
+ i64 5, label %RRETURN_14
+ i64 6, label %RRETURN_15
+ i64 7, label %RRETURN_16
+ i64 8, label %RRETURN_17
+ i64 9, label %RRETURN_18
+ i64 10, label %RRETURN_19
+ i64 11, label %RRETURN_20
+ i64 12, label %RRETURN_21
+ i64 13, label %RRETURN_22
+ i64 14, label %RRETURN_24
+ i64 15, label %RRETURN_26
+ i64 16, label %RRETURN_27
+ i64 17, label %RRETURN_28
+ i64 18, label %RRETURN_29
+ i64 19, label %RRETURN_30
+ i64 20, label %RRETURN_31
+ i64 21, label %RRETURN_38
+ i64 22, label %RRETURN_40
+ i64 23, label %RRETURN_42
+ i64 24, label %RRETURN_44
+ i64 25, label %RRETURN_48
+ i64 26, label %RRETURN_52
+ i64 27, label %RRETURN_1
+ ]
+
+RETURN:
+ call void @f1()
+ br label %EXIT
+
+RRETURN_2: ; preds = %bb49
+ call void @f2()
+ br label %EXIT
+
+RRETURN_6: ; preds = %bb49
+ call void @f2()
+ br label %EXIT
+
+RRETURN_7: ; preds = %bb49
+ call void @f3()
+ br label %EXIT
+
+RRETURN_14: ; preds = %bb49
+ call void @f4()
+ br label %EXIT
+
+RRETURN_15: ; preds = %bb49
+ call void @f5()
+ br label %EXIT
+
+RRETURN_16: ; preds = %bb49
+ call void @f6()
+ br label %EXIT
+
+RRETURN_17: ; preds = %bb49
+ call void @f7()
+ br label %EXIT
+
+RRETURN_18: ; preds = %bb49
+ call void @f8()
+ br label %EXIT
+
+RRETURN_19: ; preds = %bb49
+ call void @f9()
+ br label %EXIT
+
+RRETURN_20: ; preds = %bb49
+ call void @f10()
+ br label %EXIT
+
+RRETURN_21: ; preds = %bb49
+ call void @f11()
+ br label %EXIT
+
+RRETURN_22: ; preds = %bb49
+ call void @f12()
+ br label %EXIT
+
+RRETURN_24: ; preds = %bb49
+ call void @f13()
+ br label %EXIT
+
+RRETURN_26: ; preds = %bb49
+ call void @f14()
+ br label %EXIT
+
+RRETURN_27: ; preds = %bb49
+ call void @f15()
+ br label %EXIT
+
+RRETURN_28: ; preds = %bb49
+ call void @f16()
+ br label %EXIT
+
+RRETURN_29: ; preds = %bb49
+ call void @f17()
+ br label %EXIT
+
+RRETURN_30: ; preds = %bb49
+ call void @f18()
+ br label %EXIT
+
+RRETURN_31: ; preds = %bb49
+ call void @f19()
+ br label %EXIT
+
+RRETURN_38: ; preds = %bb49
+ call void @f20()
+ br label %EXIT
+
+RRETURN_40: ; preds = %bb49
+ call void @f21()
+ br label %EXIT
+
+RRETURN_42: ; preds = %bb49
+ call void @f22()
+ br label %EXIT
+
+RRETURN_44: ; preds = %bb49
+ call void @f23()
+ br label %EXIT
+
+RRETURN_48: ; preds = %bb49
+ call void @f24()
+ br label %EXIT
+
+RRETURN_52: ; preds = %bb49
+ call void @f25()
+ br label %EXIT
+
+RRETURN_1: ; preds = %bb49
+ call void @f26()
+ br label %EXIT
+
+EXIT:
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll b/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll
new file mode 100644
index 0000000..6b0d6d9
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s
+target triple = "x86_64-mingw"
+
+; ModuleID = 'mm.bc'
+ type opaque ; type %0
+ type opaque ; type %1
+
+define internal fastcc float @computeMipmappingRho(%0* %shaderExecutionStatePtr, i32 %index, <4 x float> %texCoord, <4 x float> %texCoordDX, <4 x float> %texCoordDY) readonly {
+indexCheckBlock:
+ %indexCmp = icmp ugt i32 %index, 16 ; <i1> [#uses=1]
+ br i1 %indexCmp, label %zeroReturnBlock, label %primitiveTextureFetchBlock
+
+primitiveTextureFetchBlock: ; preds = %indexCheckBlock
+ %pointerArithmeticTmp = bitcast %0* %shaderExecutionStatePtr to i8* ; <i8*> [#uses=1]
+ %pointerArithmeticTmp1 = getelementptr i8* %pointerArithmeticTmp, i64 1808 ; <i8*> [#uses=1]
+ %pointerArithmeticTmp2 = bitcast i8* %pointerArithmeticTmp1 to %1** ; <%1**> [#uses=1]
+ %primitivePtr = load %1** %pointerArithmeticTmp2 ; <%1*> [#uses=1]
+ %pointerArithmeticTmp3 = bitcast %1* %primitivePtr to i8* ; <i8*> [#uses=1]
+ %pointerArithmeticTmp4 = getelementptr i8* %pointerArithmeticTmp3, i64 19408 ; <i8*> [#uses=1]
+ %pointerArithmeticTmp5 = bitcast i8* %pointerArithmeticTmp4 to %1** ; <%1**> [#uses=1]
+ %primitiveTexturePtr = getelementptr %1** %pointerArithmeticTmp5, i32 %index ; <%1**> [#uses=1]
+ %primitiveTexturePtr6 = load %1** %primitiveTexturePtr ; <%1*> [#uses=2]
+ br label %textureCheckBlock
+
+textureCheckBlock: ; preds = %primitiveTextureFetchBlock
+ %texturePtrInt = ptrtoint %1* %primitiveTexturePtr6 to i64 ; <i64> [#uses=1]
+ %testTextureNULL = icmp eq i64 %texturePtrInt, 0 ; <i1> [#uses=1]
+ br i1 %testTextureNULL, label %zeroReturnBlock, label %rhoCalculateBlock
+
+rhoCalculateBlock: ; preds = %textureCheckBlock
+ %pointerArithmeticTmp7 = bitcast %1* %primitiveTexturePtr6 to i8* ; <i8*> [#uses=1]
+ %pointerArithmeticTmp8 = getelementptr i8* %pointerArithmeticTmp7, i64 640 ; <i8*> [#uses=1]
+ %pointerArithmeticTmp9 = bitcast i8* %pointerArithmeticTmp8 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %dimensionsPtr = load <4 x float>* %pointerArithmeticTmp9, align 1 ; <<4 x float>> [#uses=2]
+ %texDiffDX = fsub <4 x float> %texCoordDX, %texCoord ; <<4 x float>> [#uses=1]
+ %texDiffDY = fsub <4 x float> %texCoordDY, %texCoord ; <<4 x float>> [#uses=1]
+ %ddx = fmul <4 x float> %texDiffDX, %dimensionsPtr ; <<4 x float>> [#uses=2]
+ %ddx10 = fmul <4 x float> %texDiffDY, %dimensionsPtr ; <<4 x float>> [#uses=2]
+ %ddxSquared = fmul <4 x float> %ddx, %ddx ; <<4 x float>> [#uses=3]
+ %0 = shufflevector <4 x float> %ddxSquared, <4 x float> %ddxSquared, <4 x i32> <i32 1, i32 0, i32 0, i32 0> ; <<4 x float>> [#uses=1]
+ %dxSquared = fadd <4 x float> %ddxSquared, %0 ; <<4 x float>> [#uses=1]
+ %1 = call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %dxSquared) ; <<4 x float>> [#uses=1]
+ %ddySquared = fmul <4 x float> %ddx10, %ddx10 ; <<4 x float>> [#uses=3]
+ %2 = shufflevector <4 x float> %ddySquared, <4 x float> %ddySquared, <4 x i32> <i32 1, i32 0, i32 0, i32 0> ; <<4 x float>> [#uses=1]
+ %dySquared = fadd <4 x float> %ddySquared, %2 ; <<4 x float>> [#uses=1]
+ %3 = call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %dySquared) ; <<4 x float>> [#uses=1]
+ %4 = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %1, <4 x float> %3) ; <<4 x float>> [#uses=1]
+ %rho = extractelement <4 x float> %4, i32 0 ; <float> [#uses=1]
+ ret float %rho
+
+zeroReturnBlock: ; preds = %textureCheckBlock, %indexCheckBlock
+ ret float 0.000000e+00
+}
+
+declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll b/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll
new file mode 100644
index 0000000..5f6cf3b
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-pc-linux | FileCheck %s
+
+@a = external global i96, align 4
+@b = external global i64, align 8
+
+define void @c() nounwind {
+; CHECK: movl a+8, %eax
+ %srcval1 = load i96* @a, align 4
+ %sroa.store.elt2 = lshr i96 %srcval1, 64
+ %tmp = trunc i96 %sroa.store.elt2 to i64
+; CHECK: movl %eax, b
+; CHECK: movl $0, b+4
+ store i64 %tmp, i64* @b, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll b/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll
new file mode 100644
index 0000000..790fd88
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll
@@ -0,0 +1,69 @@
+; RUN: llc < %s -march=x86
+; PR4753
+
+; This function has a sub-register reuse undone.
+
+@uint8 = external global i32 ; <i32*> [#uses=3]
+
+declare signext i8 @foo(i32, i8 signext) nounwind readnone
+
+declare signext i8 @bar(i32, i8 signext) nounwind readnone
+
+define i32 @uint80(i8 signext %p_52) nounwind {
+entry:
+ %0 = sext i8 %p_52 to i16 ; <i16> [#uses=1]
+ %1 = tail call i32 @func_24(i16 zeroext %0, i8 signext ptrtoint (i8 (i32, i8)* @foo to i8)) nounwind; <i32> [#uses=1]
+ %2 = trunc i32 %1 to i8 ; <i8> [#uses=1]
+ %3 = or i8 %2, 1 ; <i8> [#uses=1]
+ %4 = tail call i32 @safe(i32 1) nounwind ; <i32> [#uses=0]
+ %5 = tail call i32 @func_24(i16 zeroext 0, i8 signext undef) nounwind; <i32> [#uses=1]
+ %6 = trunc i32 %5 to i8 ; <i8> [#uses=1]
+ %7 = xor i8 %3, %p_52 ; <i8> [#uses=1]
+ %8 = xor i8 %7, %6 ; <i8> [#uses=1]
+ %9 = icmp ne i8 %p_52, 0 ; <i1> [#uses=1]
+ %10 = zext i1 %9 to i8 ; <i8> [#uses=1]
+ %11 = tail call i32 @func_24(i16 zeroext ptrtoint (i8 (i32, i8)* @bar to i16), i8 signext %10) nounwind; <i32> [#uses=1]
+ %12 = tail call i32 @func_24(i16 zeroext 0, i8 signext 1) nounwind; <i32> [#uses=0]
+ br i1 undef, label %bb2, label %bb
+
+bb: ; preds = %entry
+ br i1 undef, label %bb2, label %bb3
+
+bb2: ; preds = %bb, %entry
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb
+ %iftmp.2.0 = phi i32 [ 0, %bb2 ], [ 1, %bb ] ; <i32> [#uses=1]
+ %13 = icmp ne i32 %11, %iftmp.2.0 ; <i1> [#uses=1]
+ %14 = tail call i32 @safe(i32 -2) nounwind ; <i32> [#uses=0]
+ %15 = zext i1 %13 to i8 ; <i8> [#uses=1]
+ %16 = tail call signext i8 @func_53(i8 signext undef, i8 signext 1, i8 signext %15, i8 signext %8) nounwind; <i8> [#uses=0]
+ br i1 undef, label %bb5, label %bb4
+
+bb4: ; preds = %bb3
+ %17 = volatile load i32* @uint8, align 4 ; <i32> [#uses=0]
+ br label %bb5
+
+bb5: ; preds = %bb4, %bb3
+ %18 = volatile load i32* @uint8, align 4 ; <i32> [#uses=0]
+ %19 = sext i8 undef to i16 ; <i16> [#uses=1]
+ %20 = tail call i32 @func_24(i16 zeroext %19, i8 signext 1) nounwind; <i32> [#uses=0]
+ br i1 undef, label %return, label %bb6.preheader
+
+bb6.preheader: ; preds = %bb5
+ %21 = sext i8 %p_52 to i32 ; <i32> [#uses=1]
+ %22 = volatile load i32* @uint8, align 4 ; <i32> [#uses=0]
+ %23 = tail call i32 (...)* @safefuncts(i32 %21, i32 1) nounwind; <i32> [#uses=0]
+ unreachable
+
+return: ; preds = %bb5
+ ret i32 undef
+}
+
+declare i32 @func_24(i16 zeroext, i8 signext)
+
+declare i32 @safe(i32)
+
+declare signext i8 @func_53(i8 signext, i8 signext, i8 signext, i8 signext)
+
+declare i32 @safefuncts(...)
diff --git a/test/CodeGen/X86/2009-08-23-linkerprivate.ll b/test/CodeGen/X86/2009-08-23-linkerprivate.ll
new file mode 100644
index 0000000..3da8f00
--- /dev/null
+++ b/test/CodeGen/X86/2009-08-23-linkerprivate.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | FileCheck %s
+
+; ModuleID = '/Volumes/MacOS9/tests/WebKit/JavaScriptCore/profiler/ProfilerServer.mm'
+
+@"\01l_objc_msgSend_fixup_alloc" = linker_private hidden global i32 0, section "__DATA, __objc_msgrefs, coalesced", align 16 ; <i32*> [#uses=0]
+
+; CHECK: .globl l_objc_msgSend_fixup_alloc
+; CHECK: .weak_definition l_objc_msgSend_fixup_alloc
diff --git a/test/CodeGen/X86/2009-09-07-CoalescerBug.ll b/test/CodeGen/X86/2009-09-07-CoalescerBug.ll
new file mode 100644
index 0000000..a5b4a79
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-07-CoalescerBug.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-freebsd7.2 -code-model=kernel | FileCheck %s
+; PR4689
+
+%struct.__s = type { [8 x i8] }
+%struct.pcb = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i16, i8* }
+%struct.pcpu = type { i32*, i32*, i32*, i32*, %struct.pcb*, i64, i32, i32, i32, i32 }
+
+define i64 @hammer_time(i64 %modulep, i64 %physfree) nounwind ssp noredzone noimplicitfloat {
+; CHECK: hammer_time:
+; CHECK: movq $Xrsvd, %rax
+; CHECK: movq $Xrsvd, %rsi
+; CHECK: movq $Xrsvd, %rdi
+entry:
+ br i1 undef, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ br label %for.body
+
+for.body: ; preds = %for.inc, %if.end
+ switch i32 undef, label %if.then76 [
+ i32 9, label %for.inc
+ i32 10, label %for.inc
+ i32 11, label %for.inc
+ i32 12, label %for.inc
+ ]
+
+if.then76: ; preds = %for.body
+ unreachable
+
+for.inc: ; preds = %for.body, %for.body, %for.body, %for.body
+ br i1 undef, label %for.end, label %for.body
+
+for.end: ; preds = %for.inc
+ call void asm sideeffect "mov $1,%gs:$0", "=*m,r,~{dirflag},~{fpsr},~{flags}"(%struct.__s* bitcast (%struct.pcb** getelementptr (%struct.pcpu* null, i32 0, i32 4) to %struct.__s*), i64 undef) nounwind
+ br label %for.body170
+
+for.body170: ; preds = %for.body170, %for.end
+ store i64 or (i64 and (i64 or (i64 ptrtoint (void (i32, i32, i32, i32)* @Xrsvd to i64), i64 2097152), i64 2162687), i64 or (i64 or (i64 and (i64 shl (i64 ptrtoint (void (i32, i32, i32, i32)* @Xrsvd to i64), i64 32), i64 -281474976710656), i64 140737488355328), i64 15393162788864)), i64* undef
+ br i1 undef, label %for.end175, label %for.body170
+
+for.end175: ; preds = %for.body170
+ unreachable
+}
+
+declare void @Xrsvd(i32, i32, i32, i32) ssp noredzone noimplicitfloat
diff --git a/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll b/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll
new file mode 100644
index 0000000..7b5e871
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim | FileCheck %s
+
+; It's not legal to fold a load from 32-bit stack slot into a 64-bit
+; instruction. If done, the instruction does a 64-bit load and that's not
+; safe. This can happen we a subreg_to_reg 0 has been coalesced. One
+; exception is when the instruction that folds the load is a move, then we
+; can simply turn it into a 32-bit load from the stack slot.
+; rdar://7170444
+
+%struct.ComplexType = type { i32 }
+
+define i32 @t(i32 %clientPort, i32 %pluginID, i32 %requestID, i32 %objectID, i64 %serverIdentifier, i64 %argumentsData, i32 %argumentsLength) ssp {
+entry:
+; CHECK: _t:
+; CHECK: movl 16(%rbp),
+ %0 = zext i32 %argumentsLength to i64 ; <i64> [#uses=1]
+ %1 = zext i32 %clientPort to i64 ; <i64> [#uses=1]
+ %2 = inttoptr i64 %1 to %struct.ComplexType* ; <%struct.ComplexType*> [#uses=1]
+ %3 = invoke i8* @pluginInstance(i8* undef, i32 %pluginID)
+ to label %invcont unwind label %lpad ; <i8*> [#uses=1]
+
+invcont: ; preds = %entry
+ %4 = add i32 %requestID, %pluginID ; <i32> [#uses=0]
+ %5 = invoke zeroext i8 @invoke(i8* %3, i32 %objectID, i8* undef, i64 %argumentsData, i32 %argumentsLength, i64* undef, i32* undef)
+ to label %invcont1 unwind label %lpad ; <i8> [#uses=0]
+
+invcont1: ; preds = %invcont
+ %6 = getelementptr inbounds %struct.ComplexType* %2, i64 0, i32 0 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ invoke void @booleanAndDataReply(i32 %7, i32 undef, i32 %requestID, i32 undef, i64 undef, i32 undef)
+ to label %invcont2 unwind label %lpad
+
+invcont2: ; preds = %invcont1
+ ret i32 0
+
+lpad: ; preds = %invcont1, %invcont, %entry
+ %8 = call i32 @vm_deallocate(i32 undef, i64 0, i64 %0) ; <i32> [#uses=0]
+ unreachable
+}
+
+declare i32 @vm_deallocate(i32, i64, i64)
+
+declare i8* @pluginInstance(i8*, i32)
+
+declare zeroext i8 @invoke(i8*, i32, i8*, i64, i32, i64*, i32*)
+
+declare void @booleanAndDataReply(i32, i32, i32, i32, i64, i32)
diff --git a/test/CodeGen/X86/2009-09-10-SpillComments.ll b/test/CodeGen/X86/2009-09-10-SpillComments.ll
new file mode 100644
index 0000000..f9ca861
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-10-SpillComments.ll
@@ -0,0 +1,108 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s
+
+; This test shouldn't require spills.
+
+; CHECK: subq $8, %rsp
+; CHECK-NOT: $rsp
+; CHECK: addq $8, %rsp
+
+ %struct..0anon = type { i32 }
+ %struct.rtvec_def = type { i32, [1 x %struct..0anon] }
+ %struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] }
+@rtx_format = external global [116 x i8*] ; <[116 x i8*]*> [#uses=1]
+@rtx_length = external global [117 x i32] ; <[117 x i32]*> [#uses=1]
+
+declare %struct.rtx_def* @fixup_memory_subreg(%struct.rtx_def*, %struct.rtx_def*, i32)
+
+define %struct.rtx_def* @walk_fixup_memory_subreg(%struct.rtx_def* %x, %struct.rtx_def* %insn) {
+entry:
+ %tmp2 = icmp eq %struct.rtx_def* %x, null ; <i1> [#uses=1]
+ br i1 %tmp2, label %UnifiedReturnBlock, label %cond_next
+
+cond_next: ; preds = %entry
+ %tmp6 = getelementptr %struct.rtx_def* %x, i32 0, i32 0 ; <i16*> [#uses=1]
+ %tmp7 = load i16* %tmp6 ; <i16> [#uses=2]
+ %tmp78 = zext i16 %tmp7 to i32 ; <i32> [#uses=2]
+ %tmp10 = icmp eq i16 %tmp7, 54 ; <i1> [#uses=1]
+ br i1 %tmp10, label %cond_true13, label %cond_next32
+
+cond_true13: ; preds = %cond_next
+ %tmp15 = getelementptr %struct.rtx_def* %x, i32 0, i32 3 ; <[1 x %struct..0anon]*> [#uses=1]
+ %tmp1718 = bitcast [1 x %struct..0anon]* %tmp15 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1]
+ %tmp19 = load %struct.rtx_def** %tmp1718 ; <%struct.rtx_def*> [#uses=1]
+ %tmp20 = getelementptr %struct.rtx_def* %tmp19, i32 0, i32 0 ; <i16*> [#uses=1]
+ %tmp21 = load i16* %tmp20 ; <i16> [#uses=1]
+ %tmp22 = icmp eq i16 %tmp21, 57 ; <i1> [#uses=1]
+ br i1 %tmp22, label %cond_true25, label %cond_next32
+
+cond_true25: ; preds = %cond_true13
+ %tmp29 = tail call %struct.rtx_def* @fixup_memory_subreg( %struct.rtx_def* %x, %struct.rtx_def* %insn, i32 1 ) nounwind ; <%struct.rtx_def*> [#uses=1]
+ ret %struct.rtx_def* %tmp29
+
+cond_next32: ; preds = %cond_true13, %cond_next
+ %tmp34 = getelementptr [116 x i8*]* @rtx_format, i32 0, i32 %tmp78 ; <i8**> [#uses=1]
+ %tmp35 = load i8** %tmp34, align 4 ; <i8*> [#uses=1]
+ %tmp37 = getelementptr [117 x i32]* @rtx_length, i32 0, i32 %tmp78 ; <i32*> [#uses=1]
+ %tmp38 = load i32* %tmp37, align 4 ; <i32> [#uses=1]
+ %i.011 = add i32 %tmp38, -1 ; <i32> [#uses=2]
+ %tmp12513 = icmp sgt i32 %i.011, -1 ; <i1> [#uses=1]
+ br i1 %tmp12513, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %bb123, %cond_next32
+ %indvar = phi i32 [ %indvar.next26, %bb123 ], [ 0, %cond_next32 ] ; <i32> [#uses=2]
+ %i.01.0 = sub i32 %i.011, %indvar ; <i32> [#uses=5]
+ %tmp42 = getelementptr i8* %tmp35, i32 %i.01.0 ; <i8*> [#uses=2]
+ %tmp43 = load i8* %tmp42 ; <i8> [#uses=1]
+ switch i8 %tmp43, label %bb123 [
+ i8 101, label %cond_true47
+ i8 69, label %bb105.preheader
+ ]
+
+cond_true47: ; preds = %bb
+ %tmp52 = getelementptr %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0 ; <%struct..0anon*> [#uses=1]
+ %tmp5354 = bitcast %struct..0anon* %tmp52 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1]
+ %tmp55 = load %struct.rtx_def** %tmp5354 ; <%struct.rtx_def*> [#uses=1]
+ %tmp58 = tail call %struct.rtx_def* @walk_fixup_memory_subreg( %struct.rtx_def* %tmp55, %struct.rtx_def* %insn ) nounwind ; <%struct.rtx_def*> [#uses=1]
+ %tmp62 = getelementptr %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0, i32 0 ; <i32*> [#uses=1]
+ %tmp58.c = ptrtoint %struct.rtx_def* %tmp58 to i32 ; <i32> [#uses=1]
+ store i32 %tmp58.c, i32* %tmp62
+ %tmp6816 = load i8* %tmp42 ; <i8> [#uses=1]
+ %tmp6917 = icmp eq i8 %tmp6816, 69 ; <i1> [#uses=1]
+ br i1 %tmp6917, label %bb105.preheader, label %bb123
+
+bb105.preheader: ; preds = %cond_true47, %bb
+ %tmp11020 = getelementptr %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0 ; <%struct..0anon*> [#uses=1]
+ %tmp11111221 = bitcast %struct..0anon* %tmp11020 to %struct.rtvec_def** ; <%struct.rtvec_def**> [#uses=3]
+ %tmp11322 = load %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=1]
+ %tmp11423 = getelementptr %struct.rtvec_def* %tmp11322, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp11524 = load i32* %tmp11423 ; <i32> [#uses=1]
+ %tmp11625 = icmp eq i32 %tmp11524, 0 ; <i1> [#uses=1]
+ br i1 %tmp11625, label %bb123, label %bb73
+
+bb73: ; preds = %bb73, %bb105.preheader
+ %j.019 = phi i32 [ %tmp104, %bb73 ], [ 0, %bb105.preheader ] ; <i32> [#uses=3]
+ %tmp81 = load %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=2]
+ %tmp92 = getelementptr %struct.rtvec_def* %tmp81, i32 0, i32 1, i32 %j.019 ; <%struct..0anon*> [#uses=1]
+ %tmp9394 = bitcast %struct..0anon* %tmp92 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1]
+ %tmp95 = load %struct.rtx_def** %tmp9394 ; <%struct.rtx_def*> [#uses=1]
+ %tmp98 = tail call %struct.rtx_def* @walk_fixup_memory_subreg( %struct.rtx_def* %tmp95, %struct.rtx_def* %insn ) nounwind ; <%struct.rtx_def*> [#uses=1]
+ %tmp101 = getelementptr %struct.rtvec_def* %tmp81, i32 0, i32 1, i32 %j.019, i32 0 ; <i32*> [#uses=1]
+ %tmp98.c = ptrtoint %struct.rtx_def* %tmp98 to i32 ; <i32> [#uses=1]
+ store i32 %tmp98.c, i32* %tmp101
+ %tmp104 = add i32 %j.019, 1 ; <i32> [#uses=2]
+ %tmp113 = load %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=1]
+ %tmp114 = getelementptr %struct.rtvec_def* %tmp113, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp115 = load i32* %tmp114 ; <i32> [#uses=1]
+ %tmp116 = icmp ult i32 %tmp104, %tmp115 ; <i1> [#uses=1]
+ br i1 %tmp116, label %bb73, label %bb123
+
+bb123: ; preds = %bb73, %bb105.preheader, %cond_true47, %bb
+ %i.0 = add i32 %i.01.0, -1 ; <i32> [#uses=1]
+ %tmp125 = icmp sgt i32 %i.0, -1 ; <i1> [#uses=1]
+ %indvar.next26 = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp125, label %bb, label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %bb123, %cond_next32, %entry
+ %UnifiedRetVal = phi %struct.rtx_def* [ null, %entry ], [ %x, %cond_next32 ], [ %x, %bb123 ] ; <%struct.rtx_def*> [#uses=1]
+ ret %struct.rtx_def* %UnifiedRetVal
+}
diff --git a/test/CodeGen/X86/2009-09-16-CoalescerBug.ll b/test/CodeGen/X86/2009-09-16-CoalescerBug.ll
new file mode 100644
index 0000000..18b5a17
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-16-CoalescerBug.ll
@@ -0,0 +1,64 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10
+; PR4910
+
+%0 = type { i32, i32, i32, i32 }
+
+@boot_cpu_id = external global i32 ; <i32*> [#uses=1]
+@cpu_logical = common global i32 0, align 4 ; <i32*> [#uses=1]
+
+define void @topo_probe_0xb() nounwind ssp {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.inc38, %entry
+ %0 = phi i32 [ 0, %entry ], [ %inc40, %for.inc38 ] ; <i32> [#uses=3]
+ %cmp = icmp slt i32 %0, 3 ; <i1> [#uses=1]
+ br i1 %cmp, label %for.body, label %for.end41
+
+for.body: ; preds = %for.cond
+ %1 = tail call %0 asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},0,{cx},~{dirflag},~{fpsr},~{flags}"(i32 11, i32 %0) nounwind ; <%0> [#uses=3]
+ %asmresult.i = extractvalue %0 %1, 0 ; <i32> [#uses=1]
+ %asmresult10.i = extractvalue %0 %1, 2 ; <i32> [#uses=1]
+ %and = and i32 %asmresult.i, 31 ; <i32> [#uses=2]
+ %shr42 = lshr i32 %asmresult10.i, 8 ; <i32> [#uses=1]
+ %and12 = and i32 %shr42, 255 ; <i32> [#uses=2]
+ %cmp14 = icmp eq i32 %and12, 0 ; <i1> [#uses=1]
+ br i1 %cmp14, label %for.end41, label %lor.lhs.false
+
+lor.lhs.false: ; preds = %for.body
+ %asmresult9.i = extractvalue %0 %1, 1 ; <i32> [#uses=1]
+ %and7 = and i32 %asmresult9.i, 65535 ; <i32> [#uses=1]
+ %cmp16 = icmp eq i32 %and7, 0 ; <i1> [#uses=1]
+ br i1 %cmp16, label %for.end41, label %for.cond17.preheader
+
+for.cond17.preheader: ; preds = %lor.lhs.false
+ %tmp24 = load i32* @boot_cpu_id ; <i32> [#uses=1]
+ %shr26 = ashr i32 %tmp24, %and ; <i32> [#uses=1]
+ br label %for.body20
+
+for.body20: ; preds = %for.body20, %for.cond17.preheader
+ %2 = phi i32 [ 0, %for.cond17.preheader ], [ %inc32, %for.body20 ] ; <i32> [#uses=2]
+ %cnt.143 = phi i32 [ 0, %for.cond17.preheader ], [ %inc.cnt.1, %for.body20 ] ; <i32> [#uses=1]
+ %shr23 = ashr i32 %2, %and ; <i32> [#uses=1]
+ %cmp27 = icmp eq i32 %shr23, %shr26 ; <i1> [#uses=1]
+ %inc = zext i1 %cmp27 to i32 ; <i32> [#uses=1]
+ %inc.cnt.1 = add i32 %inc, %cnt.143 ; <i32> [#uses=2]
+ %inc32 = add nsw i32 %2, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %inc32, 255 ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body20
+
+for.end: ; preds = %for.body20
+ %cmp34 = icmp eq i32 %and12, 1 ; <i1> [#uses=1]
+ br i1 %cmp34, label %if.then35, label %for.inc38
+
+if.then35: ; preds = %for.end
+ store i32 %inc.cnt.1, i32* @cpu_logical
+ br label %for.inc38
+
+for.inc38: ; preds = %for.end, %if.then35
+ %inc40 = add nsw i32 %0, 1 ; <i32> [#uses=1]
+ br label %for.cond
+
+for.end41: ; preds = %lor.lhs.false, %for.body, %for.cond
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-09-19-SchedCustomLoweringBug.ll b/test/CodeGen/X86/2009-09-19-SchedCustomLoweringBug.ll
new file mode 100644
index 0000000..8cb538b
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-19-SchedCustomLoweringBug.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10 -post-RA-scheduler=true | FileCheck %s
+
+; PR4958
+
+define i32 @main() nounwind ssp {
+entry:
+; CHECK: main:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ br label %bb
+
+bb: ; preds = %bb1, %entry
+; CHECK: addl $1
+; CHECK-NEXT: movl %e
+; CHECK-NEXT: adcl $0
+ %i.0 = phi i64 [ 0, %entry ], [ %0, %bb1 ] ; <i64> [#uses=1]
+ %0 = add nsw i64 %i.0, 1 ; <i64> [#uses=2]
+ %1 = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ %2 = icmp sle i64 %0, 1 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %bb2
+
+bb2: ; preds = %bb1, %bb
+ br label %return
+
+return: ; preds = %bb2
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/2009-09-19-earlyclobber.ll b/test/CodeGen/X86/2009-09-19-earlyclobber.ll
new file mode 100644
index 0000000..4f44cae
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-19-earlyclobber.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s | FileCheck %s
+; ModuleID = '4964.c'
+; PR 4964
+; Registers other than RAX, RCX are OK, but they must be different.
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+ type { i64, i64 } ; type %0
+
+define i64 @flsst(i64 %find) nounwind ssp {
+entry:
+; CHECK: FOO %rax %rcx
+ %asmtmp = tail call %0 asm sideeffect "FOO $0 $1 $2", "=r,=&r,rm,~{dirflag},~{fpsr},~{flags},~{cc}"(i64 %find) nounwind ; <%0> [#uses=1]
+ %asmresult = extractvalue %0 %asmtmp, 0 ; <i64> [#uses=1]
+ ret i64 %asmresult
+}
diff --git a/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll b/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll
new file mode 100644
index 0000000..80b88358
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10.0 -relocation-model=pic | FileCheck %s
+
+define void @dot(i16* nocapture %A, i32 %As, i16* nocapture %B, i32 %Bs, i16* nocapture %C, i32 %N) nounwind ssp {
+; CHECK: dot:
+; CHECK: decl %
+; CHECK-NEXT: jne
+entry:
+ %0 = icmp sgt i32 %N, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %bb2
+
+bb: ; preds = %bb, %entry
+ %i.03 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %sum.04 = phi i32 [ 0, %entry ], [ %10, %bb ] ; <i32> [#uses=1]
+ %1 = mul i32 %i.03, %As ; <i32> [#uses=1]
+ %2 = getelementptr i16* %A, i32 %1 ; <i16*> [#uses=1]
+ %3 = load i16* %2, align 2 ; <i16> [#uses=1]
+ %4 = sext i16 %3 to i32 ; <i32> [#uses=1]
+ %5 = mul i32 %i.03, %Bs ; <i32> [#uses=1]
+ %6 = getelementptr i16* %B, i32 %5 ; <i16*> [#uses=1]
+ %7 = load i16* %6, align 2 ; <i16> [#uses=1]
+ %8 = sext i16 %7 to i32 ; <i32> [#uses=1]
+ %9 = mul i32 %8, %4 ; <i32> [#uses=1]
+ %10 = add i32 %9, %sum.04 ; <i32> [#uses=2]
+ %indvar.next = add i32 %i.03, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb1.bb2_crit_edge, label %bb
+
+bb1.bb2_crit_edge: ; preds = %bb
+ %phitmp = trunc i32 %10 to i16 ; <i16> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %entry, %bb1.bb2_crit_edge
+ %sum.0.lcssa = phi i16 [ %phitmp, %bb1.bb2_crit_edge ], [ 0, %entry ] ; <i16> [#uses=1]
+ store i16 %sum.0.lcssa, i16* %C, align 2
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-09-22-CoalescerBug.ll b/test/CodeGen/X86/2009-09-22-CoalescerBug.ll
new file mode 100644
index 0000000..33f35f8
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-22-CoalescerBug.ll
@@ -0,0 +1,124 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp {
+entry:
+ br i1 undef, label %bb, label %bb1
+
+bb: ; preds = %entry
+ ret i32 3
+
+bb1: ; preds = %entry
+ br i1 undef, label %bb3, label %bb2
+
+bb2: ; preds = %bb1
+ ret i32 3
+
+bb3: ; preds = %bb1
+ br i1 undef, label %bb.i18, label %quantum_getwidth.exit
+
+bb.i18: ; preds = %bb.i18, %bb3
+ br i1 undef, label %bb.i18, label %quantum_getwidth.exit
+
+quantum_getwidth.exit: ; preds = %bb.i18, %bb3
+ br i1 undef, label %bb4, label %bb6.preheader
+
+bb4: ; preds = %quantum_getwidth.exit
+ unreachable
+
+bb6.preheader: ; preds = %quantum_getwidth.exit
+ br i1 undef, label %bb.i1, label %bb1.i2
+
+bb.i1: ; preds = %bb6.preheader
+ unreachable
+
+bb1.i2: ; preds = %bb6.preheader
+ br i1 undef, label %bb2.i, label %bb3.i4
+
+bb2.i: ; preds = %bb1.i2
+ unreachable
+
+bb3.i4: ; preds = %bb1.i2
+ br i1 undef, label %quantum_new_qureg.exit, label %bb4.i
+
+bb4.i: ; preds = %bb3.i4
+ unreachable
+
+quantum_new_qureg.exit: ; preds = %bb3.i4
+ br i1 undef, label %bb9, label %bb11.thread
+
+bb11.thread: ; preds = %quantum_new_qureg.exit
+ %.cast.i = zext i32 undef to i64 ; <i64> [#uses=1]
+ br label %bb.i37
+
+bb9: ; preds = %quantum_new_qureg.exit
+ unreachable
+
+bb.i37: ; preds = %bb.i37, %bb11.thread
+ %0 = load i64* undef, align 8 ; <i64> [#uses=1]
+ %1 = shl i64 %0, %.cast.i ; <i64> [#uses=1]
+ store i64 %1, i64* undef, align 8
+ br i1 undef, label %bb.i37, label %quantum_addscratch.exit
+
+quantum_addscratch.exit: ; preds = %bb.i37
+ br i1 undef, label %bb12.preheader, label %bb14
+
+bb12.preheader: ; preds = %quantum_addscratch.exit
+ unreachable
+
+bb14: ; preds = %quantum_addscratch.exit
+ br i1 undef, label %bb17, label %bb.nph
+
+bb.nph: ; preds = %bb14
+ unreachable
+
+bb17: ; preds = %bb14
+ br i1 undef, label %bb1.i7, label %quantum_measure.exit
+
+bb1.i7: ; preds = %bb17
+ br label %quantum_measure.exit
+
+quantum_measure.exit: ; preds = %bb1.i7, %bb17
+ switch i32 undef, label %bb21 [
+ i32 -1, label %bb18
+ i32 0, label %bb20
+ ]
+
+bb18: ; preds = %quantum_measure.exit
+ unreachable
+
+bb20: ; preds = %quantum_measure.exit
+ unreachable
+
+bb21: ; preds = %quantum_measure.exit
+ br i1 undef, label %quantum_frac_approx.exit, label %bb1.i
+
+bb1.i: ; preds = %bb21
+ unreachable
+
+quantum_frac_approx.exit: ; preds = %bb21
+ br i1 undef, label %bb25, label %bb26
+
+bb25: ; preds = %quantum_frac_approx.exit
+ unreachable
+
+bb26: ; preds = %quantum_frac_approx.exit
+ br i1 undef, label %quantum_gcd.exit, label %bb.i
+
+bb.i: ; preds = %bb.i, %bb26
+ br i1 undef, label %quantum_gcd.exit, label %bb.i
+
+quantum_gcd.exit: ; preds = %bb.i, %bb26
+ br i1 undef, label %bb32, label %bb33
+
+bb32: ; preds = %quantum_gcd.exit
+ br i1 undef, label %bb.i.i, label %quantum_delete_qureg.exit
+
+bb.i.i: ; preds = %bb32
+ ret i32 0
+
+quantum_delete_qureg.exit: ; preds = %bb32
+ ret i32 0
+
+bb33: ; preds = %quantum_gcd.exit
+ unreachable
+}
diff --git a/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll b/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll
new file mode 100644
index 0000000..d37d4b8
--- /dev/null
+++ b/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll
@@ -0,0 +1,91 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+
+; rdar://7247745
+
+%struct._lck_mtx_ = type { %union.anon }
+%struct._lck_rw_t_internal_ = type <{ i16, i8, i8, i32, i32, i32 }>
+%struct.anon = type { i64, i64, [2 x i8], i8, i8, i32 }
+%struct.memory_object = type { i32, i32, %struct.memory_object_pager_ops* }
+%struct.memory_object_control = type { i32, i32, %struct.vm_object* }
+%struct.memory_object_pager_ops = type { void (%struct.memory_object*)*, void (%struct.memory_object*)*, i32 (%struct.memory_object*, %struct.memory_object_control*, i32)*, i32 (%struct.memory_object*)*, i32 (%struct.memory_object*, i64, i32, i32, i32*)*, i32 (%struct.memory_object*, i64, i32, i64*, i32*, i32, i32, i32)*, i32 (%struct.memory_object*, i64, i32)*, i32 (%struct.memory_object*, i64, i64, i32)*, i32 (%struct.memory_object*, i64, i64, i32)*, i32 (%struct.memory_object*, i32)*, i32 (%struct.memory_object*)*, i8* }
+%struct.queue_entry = type { %struct.queue_entry*, %struct.queue_entry* }
+%struct.upl = type { %struct._lck_mtx_, i32, i32, %struct.vm_object*, i64, i32, i64, %struct.vm_object*, i32, i8* }
+%struct.upl_page_info = type <{ i32, i8, [3 x i8] }>
+%struct.vm_object = type { %struct.queue_entry, %struct._lck_rw_t_internal_, i64, %struct.vm_page*, i32, i32, i32, i32, %struct.vm_object*, %struct.vm_object*, i64, %struct.memory_object*, i64, %struct.memory_object_control*, i32, i16, i16, [2 x i8], i8, i8, %struct.queue_entry, %struct.queue_entry, i64, i32, i32, i32, i8*, i64, i8, i8, [2 x i8], %struct.queue_entry }
+%struct.vm_page = type { %struct.queue_entry, %struct.queue_entry, %struct.vm_page*, %struct.vm_object*, i64, [2 x i8], i8, i8, i32, i8, i8, i8, i8, i32 }
+%union.anon = type { %struct.anon }
+
+declare i64 @OSAddAtomic64(i64, i64*) noredzone noimplicitfloat
+
+define i32 @upl_commit_range(%struct.upl* %upl, i32 %offset, i32 %size, i32 %flags, %struct.upl_page_info* %page_list, i32 %count, i32* nocapture %empty) nounwind noredzone noimplicitfloat {
+entry:
+ br i1 undef, label %if.then, label %if.end
+
+if.end: ; preds = %entry
+ br i1 undef, label %if.end143, label %if.then136
+
+if.then136: ; preds = %if.end
+ unreachable
+
+if.end143: ; preds = %if.end
+ br i1 undef, label %if.else155, label %if.then153
+
+if.then153: ; preds = %if.end143
+ br label %while.cond
+
+if.else155: ; preds = %if.end143
+ unreachable
+
+while.cond: ; preds = %if.end1039, %if.then153
+ br i1 undef, label %if.then1138, label %while.body
+
+while.body: ; preds = %while.cond
+ br i1 undef, label %if.end260, label %if.then217
+
+if.then217: ; preds = %while.body
+ br i1 undef, label %if.end260, label %if.then230
+
+if.then230: ; preds = %if.then217
+ br i1 undef, label %if.then246, label %if.end260
+
+if.then246: ; preds = %if.then230
+ br label %if.end260
+
+if.end260: ; preds = %if.then246, %if.then230, %if.then217, %while.body
+ br i1 undef, label %if.end296, label %if.then266
+
+if.then266: ; preds = %if.end260
+ unreachable
+
+if.end296: ; preds = %if.end260
+ br i1 undef, label %if.end1039, label %if.end306
+
+if.end306: ; preds = %if.end296
+ br i1 undef, label %if.end796, label %if.then616
+
+if.then616: ; preds = %if.end306
+ br i1 undef, label %commit_next_page, label %do.body716
+
+do.body716: ; preds = %if.then616
+ %call721 = call i64 @OSAddAtomic64(i64 1, i64* undef) nounwind noredzone noimplicitfloat ; <i64> [#uses=0]
+ call void asm sideeffect "movq\090x0($0),%rdi\0A\09movq\090x8($0),%rsi\0A\09.section __DATA, __data\0A\09.globl __dtrace_probeDOLLAR${:uid}4794___vminfo____pgrec\0A\09__dtrace_probeDOLLAR${:uid}4794___vminfo____pgrec:.quad 1f\0A\09.text\0A\091:nop\0A\09nop\0A\09nop\0A\09", "r,~{memory},~{di},~{si},~{dirflag},~{fpsr},~{flags}"(i64* undef) nounwind
+ br label %commit_next_page
+
+if.end796: ; preds = %if.end306
+ unreachable
+
+commit_next_page: ; preds = %do.body716, %if.then616
+ br i1 undef, label %if.end1039, label %if.then1034
+
+if.then1034: ; preds = %commit_next_page
+ br label %if.end1039
+
+if.end1039: ; preds = %if.then1034, %commit_next_page, %if.end296
+ br label %while.cond
+
+if.then1138: ; preds = %while.cond
+ unreachable
+
+if.then: ; preds = %entry
+ ret i32 4
+}
diff --git a/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll b/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll
new file mode 100644
index 0000000..91c5440
--- /dev/null
+++ b/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll
@@ -0,0 +1,264 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -stats |& grep {machine-licm} | grep 2
+; rdar://7274692
+
+%0 = type { [125 x i32] }
+%1 = type { i32 }
+%struct..5sPragmaType = type { i8*, i32 }
+%struct.AggInfo = type { i8, i8, i32, %struct.ExprList*, i32, %struct.AggInfo_col*, i32, i32, i32, %struct.AggInfo_func*, i32, i32 }
+%struct.AggInfo_col = type { %struct.Table*, i32, i32, i32, i32, %struct.Expr* }
+%struct.AggInfo_func = type { %struct.Expr*, %struct.FuncDef*, i32, i32 }
+%struct.AuxData = type { i8*, void (i8*)* }
+%struct.Bitvec = type { i32, i32, i32, %0 }
+%struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* }
+%struct.BtLock = type { %struct.Btree*, i32, i8, %struct.BtLock* }
+%struct.BtShared = type { %struct.Pager*, %struct.sqlite3*, %struct.BtCursor*, %struct.MemPage*, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, i8, i32, i8*, void (i8*)*, %struct.sqlite3_mutex*, %struct.BusyHandler, i32, %struct.BtShared*, %struct.BtLock*, %struct.Btree* }
+%struct.Btree = type { %struct.sqlite3*, %struct.BtShared*, i8, i8, i8, i32, %struct.Btree*, %struct.Btree* }
+%struct.BtreeMutexArray = type { i32, [11 x %struct.Btree*] }
+%struct.BusyHandler = type { i32 (i8*, i32)*, i8*, i32 }
+%struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 }
+%struct.CollSeq = type { i8*, i8, i8, i8*, i32 (i8*, i32, i8*, i32, i8*)*, void (i8*)* }
+%struct.Column = type { i8*, %struct.Expr*, i8*, i8*, i8, i8, i8, i8 }
+%struct.Context = type { i64, i32, %struct.Fifo }
+%struct.CountCtx = type { i64 }
+%struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8* }
+%struct.Db = type { i8*, %struct.Btree*, i8, i8, i8*, void (i8*)*, %struct.Schema* }
+%struct.DbPage = type { %struct.Pager*, i32, %struct.DbPage*, %struct.DbPage*, %struct.PagerLruLink, %struct.DbPage*, i8, i8, i8, i8, i8, i16, %struct.DbPage*, %struct.DbPage*, i8* }
+%struct.Expr = type { i8, i8, i16, %struct.CollSeq*, %struct.Expr*, %struct.Expr*, %struct.ExprList*, %struct..5sPragmaType, %struct..5sPragmaType, i32, i32, %struct.AggInfo*, i32, i32, %struct.Select*, %struct.Table*, i32 }
+%struct.ExprList = type { i32, i32, i32, %struct.ExprList_item* }
+%struct.ExprList_item = type { %struct.Expr*, i8*, i8, i8, i8 }
+%struct.FILE = type { i8*, i32, i32, i16, i16, %struct..5sPragmaType, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct..5sPragmaType, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct..5sPragmaType, i32, i64 }
+%struct.FKey = type { %struct.Table*, %struct.FKey*, i8*, %struct.FKey*, i32, %struct.sColMap*, i8, i8, i8, i8 }
+%struct.Fifo = type { i32, %struct.FifoPage*, %struct.FifoPage* }
+%struct.FifoPage = type { i32, i32, i32, %struct.FifoPage*, [1 x i64] }
+%struct.FuncDef = type { i16, i8, i8, i8, i8*, %struct.FuncDef*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*)*, [1 x i8] }
+%struct.Hash = type { i8, i8, i32, i32, %struct.HashElem*, %struct._ht* }
+%struct.HashElem = type { %struct.HashElem*, %struct.HashElem*, i8*, i8*, i32 }
+%struct.IdList = type { %struct..5sPragmaType*, i32, i32 }
+%struct.Index = type { i8*, i32, i32*, i32*, %struct.Table*, i32, i8, i8, i8*, %struct.Index*, %struct.Schema*, i8*, i8** }
+%struct.KeyInfo = type { %struct.sqlite3*, i8, i8, i8, i32, i8*, [1 x %struct.CollSeq*] }
+%struct.Mem = type { %struct.CountCtx, double, %struct.sqlite3*, i8*, i32, i16, i8, i8, void (i8*)* }
+%struct.MemPage = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, [5 x %struct._OvflCell], %struct.BtShared*, i8*, %struct.DbPage*, i32, %struct.MemPage* }
+%struct.Module = type { %struct.sqlite3_module*, i8*, i8*, void (i8*)* }
+%struct.Op = type { i8, i8, i8, i8, i32, i32, i32, %1 }
+%struct.Pager = type { %struct.sqlite3_vfs*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Bitvec*, %struct.Bitvec*, i8*, i8*, i8*, i8*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.BusyHandler*, %struct.PagerLruList, %struct.DbPage*, %struct.DbPage*, %struct.DbPage*, i64, i64, i64, i64, i64, i32, void (%struct.DbPage*, i32)*, void (%struct.DbPage*, i32)*, i32, %struct.DbPage**, i8*, [16 x i8] }
+%struct.PagerLruLink = type { %struct.DbPage*, %struct.DbPage* }
+%struct.PagerLruList = type { %struct.DbPage*, %struct.DbPage*, %struct.DbPage* }
+%struct.Schema = type { i32, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Table*, i8, i8, i16, i32, %struct.sqlite3* }
+%struct.Select = type { %struct.ExprList*, i8, i8, i8, i8, i8, i8, i8, %struct.SrcList*, %struct.Expr*, %struct.ExprList*, %struct.Expr*, %struct.ExprList*, %struct.Select*, %struct.Select*, %struct.Select*, %struct.Expr*, %struct.Expr*, i32, i32, [3 x i32] }
+%struct.SrcList = type { i16, i16, [1 x %struct.SrcList_item] }
+%struct.SrcList_item = type { i8*, i8*, i8*, %struct.Table*, %struct.Select*, i8, i8, i32, %struct.Expr*, %struct.IdList*, i64 }
+%struct.Table = type { i8*, i32, %struct.Column*, i32, %struct.Index*, i32, %struct.Select*, i32, %struct.Trigger*, %struct.FKey*, i8*, %struct.Expr*, i32, i8, i8, i8, i8, i8, i8, i8, %struct.Module*, %struct.sqlite3_vtab*, i32, i8**, %struct.Schema* }
+%struct.Trigger = type { i8*, i8*, i8, i8, %struct.Expr*, %struct.IdList*, %struct..5sPragmaType, %struct.Schema*, %struct.Schema*, %struct.TriggerStep*, %struct.Trigger* }
+%struct.TriggerStep = type { i32, i32, %struct.Trigger*, %struct.Select*, %struct..5sPragmaType, %struct.Expr*, %struct.ExprList*, %struct.IdList*, %struct.TriggerStep*, %struct.TriggerStep* }
+%struct.Vdbe = type { %struct.sqlite3*, %struct.Vdbe*, %struct.Vdbe*, i32, i32, %struct.Op*, i32, i32, i32*, %struct.Mem**, %struct.Mem*, i32, %struct.Cursor**, i32, %struct.Mem*, i8**, i32, i32, i32, %struct.Mem*, i32, i32, %struct.Fifo, i32, i32, %struct.Context*, i32, i32, i32, i32, i32, [25 x i32], i32, i32, i8**, i8*, %struct.Mem*, i8, i8, i8, i8, i8, i8, i32, i64, i32, %struct.BtreeMutexArray, i32, i8*, i32 }
+%struct.VdbeFunc = type { %struct.FuncDef*, i32, [1 x %struct.AuxData] }
+%struct._OvflCell = type { i8*, i16 }
+%struct._RuneCharClass = type { [14 x i8], i32 }
+%struct._RuneEntry = type { i32, i32, i32, i32* }
+%struct._RuneLocale = type { [8 x i8], [32 x i8], i32 (i8*, i32, i8**)*, i32 (i32, i8*, i32, i8**)*, i32, [256 x i32], [256 x i32], [256 x i32], %struct._RuneRange, %struct._RuneRange, %struct._RuneRange, i8*, i32, i32, %struct._RuneCharClass* }
+%struct._RuneRange = type { i32, %struct._RuneEntry* }
+%struct.__sFILEX = type opaque
+%struct._ht = type { i32, %struct.HashElem* }
+%struct.callback_data = type { %struct.sqlite3*, i32, i32, %struct.FILE*, i32, i32, i32, i8*, [20 x i8], [100 x i32], [100 x i32], [20 x i8], %struct.previous_mode_data, [1024 x i8], i8* }
+%struct.previous_mode_data = type { i32, i32, i32, [100 x i32] }
+%struct.sColMap = type { i32, i8* }
+%struct.sqlite3 = type { %struct.sqlite3_vfs*, i32, %struct.Db*, i32, i32, i32, i32, i8, i8, i8, i8, i32, %struct.CollSeq*, i64, i64, i32, i32, i32, %struct.sqlite3_mutex*, %struct.sqlite3InitInfo, i32, i8**, %struct.Vdbe*, i32, void (i8*, i8*)*, i8*, void (i8*, i8*, i64)*, i8*, i8*, i32 (i8*)*, i8*, void (i8*)*, i8*, void (i8*, i32, i8*, i8*, i64)*, void (i8*, %struct.sqlite3*, i32, i8*)*, void (i8*, %struct.sqlite3*, i32, i8*)*, i8*, %struct.Mem*, i8*, i8*, %union.anon, i32 (i8*, i32, i8*, i8*, i8*, i8*)*, i8*, i32 (i8*)*, i8*, i32, %struct.Hash, %struct.Table*, %struct.sqlite3_vtab**, i32, %struct.Hash, %struct.Hash, %struct.BusyHandler, i32, [2 x %struct.Db], i8 }
+%struct.sqlite3InitInfo = type { i32, i32, i8 }
+%struct.sqlite3_context = type { %struct.FuncDef*, %struct.VdbeFunc*, %struct.Mem, %struct.Mem*, i32, %struct.CollSeq* }
+%struct.sqlite3_file = type { %struct.sqlite3_io_methods* }
+%struct.sqlite3_index_constraint = type { i32, i8, i8, i32 }
+%struct.sqlite3_index_constraint_usage = type { i32, i8 }
+%struct.sqlite3_index_info = type { i32, %struct.sqlite3_index_constraint*, i32, %struct.sqlite3_index_constraint_usage*, %struct.sqlite3_index_constraint_usage*, i32, i8*, i32, i32, double }
+%struct.sqlite3_io_methods = type { i32, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i64)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i64*)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i32, i8*)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*)* }
+%struct.sqlite3_module = type { i32, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_index_info*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_vtab_cursor**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, i32, i8*, i32, %struct.Mem**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, %struct.sqlite3_context*, i32)*, i32 (%struct.sqlite3_vtab_cursor*, i64*)*, i32 (%struct.sqlite3_vtab*, i32, %struct.Mem**, i64*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, i32, i8*, void (%struct.sqlite3_context*, i32, %struct.Mem**)**, i8**)*, i32 (%struct.sqlite3_vtab*, i8*)* }
+%struct.sqlite3_mutex = type opaque
+%struct.sqlite3_vfs = type { i32, i32, i32, %struct.sqlite3_vfs*, i8*, i8*, i32 (%struct.sqlite3_vfs*, i8*, %struct.sqlite3_file*, i32, i32*)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i8*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*)*, void (%struct.sqlite3_vfs*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*, i8*)*, void (%struct.sqlite3_vfs*, i8*)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i32)*, i32 (%struct.sqlite3_vfs*, double*)* }
+%struct.sqlite3_vtab = type { %struct.sqlite3_module*, i32, i8* }
+%struct.sqlite3_vtab_cursor = type { %struct.sqlite3_vtab* }
+%union.anon = type { double }
+
+@_DefaultRuneLocale = external global %struct._RuneLocale ; <%struct._RuneLocale*> [#uses=2]
+@__stderrp = external global %struct.FILE* ; <%struct.FILE**> [#uses=1]
[email protected] = internal constant [16 x i8] c"Out of memory!\0A\00", align 1 ; <[16 x i8]*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (void (%struct.callback_data*, i8*)* @set_table_name to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define fastcc void @set_table_name(%struct.callback_data* nocapture %p, i8* %zName) nounwind ssp {
+entry:
+ %0 = getelementptr inbounds %struct.callback_data* %p, i32 0, i32 7 ; <i8**> [#uses=3]
+ %1 = load i8** %0, align 4 ; <i8*> [#uses=2]
+ %2 = icmp eq i8* %1, null ; <i1> [#uses=1]
+ br i1 %2, label %bb1, label %bb
+
+bb: ; preds = %entry
+ free i8* %1
+ store i8* null, i8** %0, align 4
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %3 = icmp eq i8* %zName, null ; <i1> [#uses=1]
+ br i1 %3, label %return, label %bb2
+
+bb2: ; preds = %bb1
+ %4 = load i8* %zName, align 1 ; <i8> [#uses=2]
+ %5 = zext i8 %4 to i32 ; <i32> [#uses=2]
+ %6 = icmp sgt i8 %4, -1 ; <i1> [#uses=1]
+ br i1 %6, label %bb.i.i, label %bb1.i.i
+
+bb.i.i: ; preds = %bb2
+ %7 = getelementptr inbounds %struct._RuneLocale* @_DefaultRuneLocale, i32 0, i32 5, i32 %5 ; <i32*> [#uses=1]
+ %8 = load i32* %7, align 4 ; <i32> [#uses=1]
+ %9 = and i32 %8, 256 ; <i32> [#uses=1]
+ br label %isalpha.exit
+
+bb1.i.i: ; preds = %bb2
+ %10 = tail call i32 @__maskrune(i32 %5, i32 256) nounwind ; <i32> [#uses=1]
+ br label %isalpha.exit
+
+isalpha.exit: ; preds = %bb1.i.i, %bb.i.i
+ %storemerge.in.in.i.i = phi i32 [ %9, %bb.i.i ], [ %10, %bb1.i.i ] ; <i32> [#uses=1]
+ %storemerge.in.i.i = icmp eq i32 %storemerge.in.in.i.i, 0 ; <i1> [#uses=1]
+ br i1 %storemerge.in.i.i, label %bb3, label %bb5
+
+bb3: ; preds = %isalpha.exit
+ %11 = load i8* %zName, align 1 ; <i8> [#uses=2]
+ %12 = icmp eq i8 %11, 95 ; <i1> [#uses=1]
+ br i1 %12, label %bb5, label %bb12.preheader
+
+bb5: ; preds = %bb3, %isalpha.exit
+ %.pre = load i8* %zName, align 1 ; <i8> [#uses=1]
+ br label %bb12.preheader
+
+bb12.preheader: ; preds = %bb5, %bb3
+ %13 = phi i8 [ %.pre, %bb5 ], [ %11, %bb3 ] ; <i8> [#uses=1]
+ %needQuote.1.ph = phi i32 [ 0, %bb5 ], [ 1, %bb3 ] ; <i32> [#uses=2]
+ %14 = icmp eq i8 %13, 0 ; <i1> [#uses=1]
+ br i1 %14, label %bb13, label %bb7
+
+bb7: ; preds = %bb11, %bb12.preheader
+ %i.011 = phi i32 [ %tmp17, %bb11 ], [ 0, %bb12.preheader ] ; <i32> [#uses=2]
+ %n.110 = phi i32 [ %26, %bb11 ], [ 0, %bb12.preheader ] ; <i32> [#uses=3]
+ %needQuote.19 = phi i32 [ %needQuote.0, %bb11 ], [ %needQuote.1.ph, %bb12.preheader ] ; <i32> [#uses=2]
+ %scevgep16 = getelementptr i8* %zName, i32 %i.011 ; <i8*> [#uses=2]
+ %tmp17 = add i32 %i.011, 1 ; <i32> [#uses=2]
+ %scevgep18 = getelementptr i8* %zName, i32 %tmp17 ; <i8*> [#uses=1]
+ %15 = load i8* %scevgep16, align 1 ; <i8> [#uses=2]
+ %16 = zext i8 %15 to i32 ; <i32> [#uses=2]
+ %17 = icmp sgt i8 %15, -1 ; <i1> [#uses=1]
+ br i1 %17, label %bb.i.i2, label %bb1.i.i3
+
+bb.i.i2: ; preds = %bb7
+ %18 = getelementptr inbounds %struct._RuneLocale* @_DefaultRuneLocale, i32 0, i32 5, i32 %16 ; <i32*> [#uses=1]
+ %19 = load i32* %18, align 4 ; <i32> [#uses=1]
+ %20 = and i32 %19, 1280 ; <i32> [#uses=1]
+ br label %isalnum.exit
+
+bb1.i.i3: ; preds = %bb7
+ %21 = tail call i32 @__maskrune(i32 %16, i32 1280) nounwind ; <i32> [#uses=1]
+ br label %isalnum.exit
+
+isalnum.exit: ; preds = %bb1.i.i3, %bb.i.i2
+ %storemerge.in.in.i.i4 = phi i32 [ %20, %bb.i.i2 ], [ %21, %bb1.i.i3 ] ; <i32> [#uses=1]
+ %storemerge.in.i.i5 = icmp eq i32 %storemerge.in.in.i.i4, 0 ; <i1> [#uses=1]
+ br i1 %storemerge.in.i.i5, label %bb8, label %bb11
+
+bb8: ; preds = %isalnum.exit
+ %22 = load i8* %scevgep16, align 1 ; <i8> [#uses=2]
+ %23 = icmp eq i8 %22, 95 ; <i1> [#uses=1]
+ br i1 %23, label %bb11, label %bb9
+
+bb9: ; preds = %bb8
+ %24 = icmp eq i8 %22, 39 ; <i1> [#uses=1]
+ %25 = zext i1 %24 to i32 ; <i32> [#uses=1]
+ %.n.1 = add i32 %n.110, %25 ; <i32> [#uses=1]
+ br label %bb11
+
+bb11: ; preds = %bb9, %bb8, %isalnum.exit
+ %needQuote.0 = phi i32 [ 1, %bb9 ], [ %needQuote.19, %isalnum.exit ], [ %needQuote.19, %bb8 ] ; <i32> [#uses=2]
+ %n.0 = phi i32 [ %.n.1, %bb9 ], [ %n.110, %isalnum.exit ], [ %n.110, %bb8 ] ; <i32> [#uses=1]
+ %26 = add nsw i32 %n.0, 1 ; <i32> [#uses=2]
+ %27 = load i8* %scevgep18, align 1 ; <i8> [#uses=1]
+ %28 = icmp eq i8 %27, 0 ; <i1> [#uses=1]
+ br i1 %28, label %bb13, label %bb7
+
+bb13: ; preds = %bb11, %bb12.preheader
+ %n.1.lcssa = phi i32 [ 0, %bb12.preheader ], [ %26, %bb11 ] ; <i32> [#uses=2]
+ %needQuote.1.lcssa = phi i32 [ %needQuote.1.ph, %bb12.preheader ], [ %needQuote.0, %bb11 ] ; <i32> [#uses=1]
+ %29 = add nsw i32 %n.1.lcssa, 2 ; <i32> [#uses=1]
+ %30 = icmp eq i32 %needQuote.1.lcssa, 0 ; <i1> [#uses=3]
+ %n.1. = select i1 %30, i32 %n.1.lcssa, i32 %29 ; <i32> [#uses=1]
+ %31 = add nsw i32 %n.1., 1 ; <i32> [#uses=1]
+ %32 = malloc i8, i32 %31 ; <i8*> [#uses=7]
+ store i8* %32, i8** %0, align 4
+ %33 = icmp eq i8* %32, null ; <i1> [#uses=1]
+ br i1 %33, label %bb16, label %bb17
+
+bb16: ; preds = %bb13
+ %34 = load %struct.FILE** @__stderrp, align 4 ; <%struct.FILE*> [#uses=1]
+ %35 = bitcast %struct.FILE* %34 to i8* ; <i8*> [#uses=1]
+ %36 = tail call i32 @"\01_fwrite$UNIX2003"(i8* getelementptr inbounds ([16 x i8]* @.str10, i32 0, i32 0), i32 1, i32 15, i8* %35) nounwind ; <i32> [#uses=0]
+ tail call void @exit(i32 1) noreturn nounwind
+ unreachable
+
+bb17: ; preds = %bb13
+ br i1 %30, label %bb23.preheader, label %bb18
+
+bb18: ; preds = %bb17
+ store i8 39, i8* %32, align 4
+ br label %bb23.preheader
+
+bb23.preheader: ; preds = %bb18, %bb17
+ %n.3.ph = phi i32 [ 1, %bb18 ], [ 0, %bb17 ] ; <i32> [#uses=2]
+ %37 = load i8* %zName, align 1 ; <i8> [#uses=1]
+ %38 = icmp eq i8 %37, 0 ; <i1> [#uses=1]
+ br i1 %38, label %bb24, label %bb20
+
+bb20: ; preds = %bb22, %bb23.preheader
+ %storemerge18 = phi i32 [ %tmp, %bb22 ], [ 0, %bb23.preheader ] ; <i32> [#uses=2]
+ %n.37 = phi i32 [ %n.4, %bb22 ], [ %n.3.ph, %bb23.preheader ] ; <i32> [#uses=3]
+ %scevgep = getelementptr i8* %zName, i32 %storemerge18 ; <i8*> [#uses=1]
+ %tmp = add i32 %storemerge18, 1 ; <i32> [#uses=2]
+ %scevgep15 = getelementptr i8* %zName, i32 %tmp ; <i8*> [#uses=1]
+ %39 = load i8* %scevgep, align 1 ; <i8> [#uses=2]
+ %40 = getelementptr inbounds i8* %32, i32 %n.37 ; <i8*> [#uses=1]
+ store i8 %39, i8* %40, align 1
+ %41 = add nsw i32 %n.37, 1 ; <i32> [#uses=2]
+ %42 = icmp eq i8 %39, 39 ; <i1> [#uses=1]
+ br i1 %42, label %bb21, label %bb22
+
+bb21: ; preds = %bb20
+ %43 = getelementptr inbounds i8* %32, i32 %41 ; <i8*> [#uses=1]
+ store i8 39, i8* %43, align 1
+ %44 = add nsw i32 %n.37, 2 ; <i32> [#uses=1]
+ br label %bb22
+
+bb22: ; preds = %bb21, %bb20
+ %n.4 = phi i32 [ %44, %bb21 ], [ %41, %bb20 ] ; <i32> [#uses=2]
+ %45 = load i8* %scevgep15, align 1 ; <i8> [#uses=1]
+ %46 = icmp eq i8 %45, 0 ; <i1> [#uses=1]
+ br i1 %46, label %bb24, label %bb20
+
+bb24: ; preds = %bb22, %bb23.preheader
+ %n.3.lcssa = phi i32 [ %n.3.ph, %bb23.preheader ], [ %n.4, %bb22 ] ; <i32> [#uses=3]
+ br i1 %30, label %bb26, label %bb25
+
+bb25: ; preds = %bb24
+ %47 = getelementptr inbounds i8* %32, i32 %n.3.lcssa ; <i8*> [#uses=1]
+ store i8 39, i8* %47, align 1
+ %48 = add nsw i32 %n.3.lcssa, 1 ; <i32> [#uses=1]
+ br label %bb26
+
+bb26: ; preds = %bb25, %bb24
+ %n.5 = phi i32 [ %48, %bb25 ], [ %n.3.lcssa, %bb24 ] ; <i32> [#uses=1]
+ %49 = getelementptr inbounds i8* %32, i32 %n.5 ; <i8*> [#uses=1]
+ store i8 0, i8* %49, align 1
+ ret void
+
+return: ; preds = %bb1
+ ret void
+}
+
+declare i32 @"\01_fwrite$UNIX2003"(i8*, i32, i32, i8*)
+
+declare void @exit(i32) noreturn nounwind
+
+declare i32 @__maskrune(i32, i32)
diff --git a/test/CodeGen/X86/2009-10-14-LiveVariablesBug.ll b/test/CodeGen/X86/2009-10-14-LiveVariablesBug.ll
new file mode 100644
index 0000000..c1aa17c
--- /dev/null
+++ b/test/CodeGen/X86/2009-10-14-LiveVariablesBug.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin
+; rdar://7299435
+
+@i = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (void (i16)* @foo to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @foo(i16 signext %source) nounwind ssp {
+entry:
+ %source_addr = alloca i16, align 2 ; <i16*> [#uses=2]
+ store i16 %source, i16* %source_addr
+ store i32 4, i32* @i, align 4
+ call void asm sideeffect "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind
+ %asmtmp = call i16 asm sideeffect "movw $1, $0", "=={ax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i16* %source_addr) nounwind ; <i16> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-10-19-EmergencySpill.ll b/test/CodeGen/X86/2009-10-19-EmergencySpill.ll
new file mode 100644
index 0000000..ba44a2e
--- /dev/null
+++ b/test/CodeGen/X86/2009-10-19-EmergencySpill.ll
@@ -0,0 +1,54 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -disable-fp-elim
+; rdar://7291624
+
+%union.RtreeCoord = type { float }
+%struct.RtreeCell = type { i64, [10 x %union.RtreeCoord] }
+%struct.Rtree = type { i32, i32*, i32, i32, i32, i32, i8*, i8* }
+%struct.RtreeNode = type { i32*, i64, i32, i32, i8*, i32* }
+
+define fastcc void @nodeOverwriteCell(%struct.Rtree* nocapture %pRtree, %struct.RtreeNode* nocapture %pNode, %struct.RtreeCell* nocapture %pCell, i32 %iCell) nounwind ssp {
+entry:
+ %0 = load i8** undef, align 8 ; <i8*> [#uses=2]
+ %1 = load i32* undef, align 8 ; <i32> [#uses=1]
+ %2 = mul i32 %1, %iCell ; <i32> [#uses=1]
+ %3 = add nsw i32 %2, 4 ; <i32> [#uses=1]
+ %4 = sext i32 %3 to i64 ; <i64> [#uses=2]
+ %5 = load i64* null, align 8 ; <i64> [#uses=2]
+ %6 = lshr i64 %5, 48 ; <i64> [#uses=1]
+ %7 = trunc i64 %6 to i8 ; <i8> [#uses=1]
+ store i8 %7, i8* undef, align 1
+ %8 = lshr i64 %5, 8 ; <i64> [#uses=1]
+ %9 = trunc i64 %8 to i8 ; <i8> [#uses=1]
+ %.sum4 = add i64 %4, 6 ; <i64> [#uses=1]
+ %10 = getelementptr inbounds i8* %0, i64 %.sum4 ; <i8*> [#uses=1]
+ store i8 %9, i8* %10, align 1
+ %11 = getelementptr inbounds %struct.Rtree* %pRtree, i64 0, i32 3 ; <i32*> [#uses=1]
+ br i1 undef, label %bb.nph, label %bb2
+
+bb.nph: ; preds = %entry
+ %tmp25 = add i64 %4, 11 ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i64> [#uses=3]
+ %scevgep = getelementptr %struct.RtreeCell* %pCell, i64 0, i32 1, i64 %indvar ; <%union.RtreeCoord*> [#uses=1]
+ %scevgep12 = bitcast %union.RtreeCoord* %scevgep to i32* ; <i32*> [#uses=1]
+ %tmp = shl i64 %indvar, 2 ; <i64> [#uses=1]
+ %tmp26 = add i64 %tmp, %tmp25 ; <i64> [#uses=1]
+ %scevgep27 = getelementptr i8* %0, i64 %tmp26 ; <i8*> [#uses=1]
+ %12 = load i32* %scevgep12, align 4 ; <i32> [#uses=1]
+ %13 = lshr i32 %12, 24 ; <i32> [#uses=1]
+ %14 = trunc i32 %13 to i8 ; <i8> [#uses=1]
+ store i8 %14, i8* undef, align 1
+ store i8 undef, i8* %scevgep27, align 1
+ %15 = load i32* %11, align 4 ; <i32> [#uses=1]
+ %16 = shl i32 %15, 1 ; <i32> [#uses=1]
+ %17 = icmp sgt i32 %16, undef ; <i1> [#uses=1]
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
+ br i1 %17, label %bb, label %bb2
+
+bb2: ; preds = %bb, %entry
+ %18 = getelementptr inbounds %struct.RtreeNode* %pNode, i64 0, i32 3 ; <i32*> [#uses=1]
+ store i32 1, i32* %18, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll b/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
new file mode 100644
index 0000000..d7f0c1a
--- /dev/null
+++ b/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
@@ -0,0 +1,69 @@
+; RUN: llvm-as <%s | llc | FileCheck %s
+; PR 5247
+; check that cmp is not scheduled before the add
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
[email protected] = external constant [45 x i8] ; <[45 x i8]*> [#uses=1]
+@__profiling_callsite_timestamps_live = external global [1216 x i64] ; <[1216 x i64]*> [#uses=2]
+
+define i32 @cl_init(i32 %initoptions) nounwind {
+entry:
+ %retval.i = alloca i32 ; <i32*> [#uses=3]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %initoptions.addr = alloca i32 ; <i32*> [#uses=2]
+ tail call void asm sideeffect "cpuid", "~{ax},~{bx},~{cx},~{dx},~{memory},~{dirflag},~{fpsr},~{flags}"() nounwind
+ %0 = tail call i64 @llvm.readcyclecounter() nounwind ; <i64> [#uses=1]
+ store i32 %initoptions, i32* %initoptions.addr
+ %1 = bitcast i32* %initoptions.addr to { }* ; <{ }*> [#uses=0]
+ call void asm sideeffect "cpuid", "~{ax},~{bx},~{cx},~{dx},~{memory},~{dirflag},~{fpsr},~{flags}"() nounwind
+ %2 = call i64 @llvm.readcyclecounter() nounwind ; <i64> [#uses=1]
+ %call.i = call i32 @lt_dlinit() nounwind ; <i32> [#uses=1]
+ %tobool.i = icmp ne i32 %call.i, 0 ; <i1> [#uses=1]
+ br i1 %tobool.i, label %if.then.i, label %if.end.i
+
+if.then.i: ; preds = %entry
+ %call1.i = call i32 @warn_dlerror(i8* getelementptr inbounds ([45 x i8]* @.str76843, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ store i32 -1, i32* %retval.i
+ br label %lt_init.exit
+
+if.end.i: ; preds = %entry
+ store i32 0, i32* %retval.i
+ br label %lt_init.exit
+
+lt_init.exit: ; preds = %if.end.i, %if.then.i
+ %3 = load i32* %retval.i ; <i32> [#uses=1]
+ call void asm sideeffect "cpuid", "~{ax},~{bx},~{cx},~{dx},~{memory},~{dirflag},~{fpsr},~{flags}"() nounwind
+ %4 = call i64 @llvm.readcyclecounter() nounwind ; <i64> [#uses=1]
+ %5 = sub i64 %4, %2 ; <i64> [#uses=1]
+ %6 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* getelementptr inbounds ([1216 x i64]* @__profiling_callsite_timestamps_live, i32 0, i32 51), i64 %5) nounwind ; <i64> [#uses=0]
+;CHECK: lock
+;CHECK-NEXT: {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
+;CHECK-NEXT: cmpl $0,
+;CHECK-NEXT: jne
+ %cmp = icmp eq i32 %3, 0 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %lt_init.exit
+ call void @cli_rarload()
+ br label %if.end
+
+if.end: ; preds = %if.then, %lt_init.exit
+ store i32 0, i32* %retval
+ %7 = load i32* %retval ; <i32> [#uses=1]
+ tail call void asm sideeffect "cpuid", "~{ax},~{bx},~{cx},~{dx},~{memory},~{dirflag},~{fpsr},~{flags}"() nounwind
+ %8 = tail call i64 @llvm.readcyclecounter() nounwind ; <i64> [#uses=1]
+ %9 = sub i64 %8, %0 ; <i64> [#uses=1]
+ %10 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* getelementptr inbounds ([1216 x i64]* @__profiling_callsite_timestamps_live, i32 0, i32 50), i64 %9) ; <i64> [#uses=0]
+ ret i32 %7
+}
+
+declare void @cli_rarload() nounwind
+
+declare i32 @lt_dlinit()
+
+declare i32 @warn_dlerror(i8*) nounwind
+
+declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind
+
+declare i64 @llvm.readcyclecounter() nounwind
diff --git a/test/CodeGen/X86/2009-10-25-RewriterBug.ll b/test/CodeGen/X86/2009-10-25-RewriterBug.ll
new file mode 100644
index 0000000..5b4e818
--- /dev/null
+++ b/test/CodeGen/X86/2009-10-25-RewriterBug.ll
@@ -0,0 +1,171 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim
+
+%struct.DecRefPicMarking_t = type { i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t* }
+%struct.FrameStore = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.StorablePicture*, %struct.StorablePicture*, %struct.StorablePicture* }
+%struct.StorablePicture = type { i32, i32, i32, i32, i32, [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], [50 x [6 x [33 x i64]]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16**, i16***, i8*, i16**, i8***, i64***, i64***, i16****, i8**, i8**, %struct.StorablePicture*, %struct.StorablePicture*, %struct.StorablePicture*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, %struct.DecRefPicMarking_t*, i32 }
+
+define fastcc void @insert_picture_in_dpb(%struct.FrameStore* nocapture %fs, %struct.StorablePicture* %p) nounwind ssp {
+entry:
+ %0 = getelementptr inbounds %struct.FrameStore* %fs, i64 0, i32 12 ; <%struct.StorablePicture**> [#uses=1]
+ %1 = icmp eq i32 undef, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb.i, label %bb36.i
+
+bb.i: ; preds = %entry
+ br i1 undef, label %bb3.i, label %bb14.preheader.i
+
+bb3.i: ; preds = %bb.i
+ unreachable
+
+bb14.preheader.i: ; preds = %bb.i
+ br i1 undef, label %bb9.i, label %bb20.preheader.i
+
+bb9.i: ; preds = %bb9.i, %bb14.preheader.i
+ br i1 undef, label %bb9.i, label %bb20.preheader.i
+
+bb20.preheader.i: ; preds = %bb9.i, %bb14.preheader.i
+ br i1 undef, label %bb18.i, label %bb29.preheader.i
+
+bb18.i: ; preds = %bb20.preheader.i
+ unreachable
+
+bb29.preheader.i: ; preds = %bb20.preheader.i
+ br i1 undef, label %bb24.i, label %bb30.i
+
+bb24.i: ; preds = %bb29.preheader.i
+ unreachable
+
+bb30.i: ; preds = %bb29.preheader.i
+ store i32 undef, i32* undef, align 8
+ br label %bb67.preheader.i
+
+bb36.i: ; preds = %entry
+ br label %bb67.preheader.i
+
+bb67.preheader.i: ; preds = %bb36.i, %bb30.i
+ %2 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2]
+ %3 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2]
+ %4 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=2]
+ %5 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %6 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %7 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %8 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %9 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %10 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %11 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %12 = phi %struct.StorablePicture* [ null, %bb36.i ], [ undef, %bb30.i ] ; <%struct.StorablePicture*> [#uses=1]
+ br i1 undef, label %bb38.i, label %bb68.i
+
+bb38.i: ; preds = %bb66.i, %bb67.preheader.i
+ %13 = phi %struct.StorablePicture* [ %37, %bb66.i ], [ %2, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %14 = phi %struct.StorablePicture* [ %38, %bb66.i ], [ %3, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %15 = phi %struct.StorablePicture* [ %39, %bb66.i ], [ %4, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %16 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %5, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %17 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %6, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %18 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %7, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %19 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %8, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %20 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %9, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %21 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %10, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %22 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %11, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %23 = phi %struct.StorablePicture* [ %40, %bb66.i ], [ %12, %bb67.preheader.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %indvar248.i = phi i64 [ %indvar.next249.i, %bb66.i ], [ 0, %bb67.preheader.i ] ; <i64> [#uses=3]
+ %storemerge52.i = trunc i64 %indvar248.i to i32 ; <i32> [#uses=1]
+ %24 = getelementptr inbounds %struct.StorablePicture* %23, i64 0, i32 19 ; <i32*> [#uses=0]
+ br i1 undef, label %bb.nph51.i, label %bb66.i
+
+bb.nph51.i: ; preds = %bb38.i
+ %25 = sdiv i32 %storemerge52.i, 8 ; <i32> [#uses=0]
+ br label %bb39.i
+
+bb39.i: ; preds = %bb64.i, %bb.nph51.i
+ %26 = phi %struct.StorablePicture* [ %17, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %27 = phi %struct.StorablePicture* [ %18, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
+ %28 = phi %struct.StorablePicture* [ %19, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
+ %29 = phi %struct.StorablePicture* [ %20, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
+ %30 = phi %struct.StorablePicture* [ %21, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
+ %31 = phi %struct.StorablePicture* [ %22, %bb.nph51.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=0]
+ br i1 undef, label %bb57.i, label %bb40.i
+
+bb40.i: ; preds = %bb39.i
+ br i1 undef, label %bb57.i, label %bb41.i
+
+bb41.i: ; preds = %bb40.i
+ %storemerge10.i = select i1 undef, i32 2, i32 4 ; <i32> [#uses=1]
+ %32 = zext i32 %storemerge10.i to i64 ; <i64> [#uses=1]
+ br i1 undef, label %bb45.i, label %bb47.i
+
+bb45.i: ; preds = %bb41.i
+ %33 = getelementptr inbounds %struct.StorablePicture* %26, i64 0, i32 5, i64 undef, i64 %32, i64 undef ; <i64*> [#uses=1]
+ %34 = load i64* %33, align 8 ; <i64> [#uses=1]
+ br label %bb47.i
+
+bb47.i: ; preds = %bb45.i, %bb41.i
+ %storemerge11.i = phi i64 [ %34, %bb45.i ], [ 0, %bb41.i ] ; <i64> [#uses=0]
+ %scevgep246.i = getelementptr i64* undef, i64 undef ; <i64*> [#uses=0]
+ br label %bb64.i
+
+bb57.i: ; preds = %bb40.i, %bb39.i
+ br i1 undef, label %bb58.i, label %bb60.i
+
+bb58.i: ; preds = %bb57.i
+ br label %bb60.i
+
+bb60.i: ; preds = %bb58.i, %bb57.i
+ %35 = load i64*** undef, align 8 ; <i64**> [#uses=1]
+ %scevgep256.i = getelementptr i64** %35, i64 %indvar248.i ; <i64**> [#uses=1]
+ %36 = load i64** %scevgep256.i, align 8 ; <i64*> [#uses=1]
+ %scevgep243.i = getelementptr i64* %36, i64 undef ; <i64*> [#uses=1]
+ store i64 -1, i64* %scevgep243.i, align 8
+ br label %bb64.i
+
+bb64.i: ; preds = %bb60.i, %bb47.i
+ br i1 undef, label %bb39.i, label %bb66.i
+
+bb66.i: ; preds = %bb64.i, %bb38.i
+ %37 = phi %struct.StorablePicture* [ %13, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2]
+ %38 = phi %struct.StorablePicture* [ %14, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2]
+ %39 = phi %struct.StorablePicture* [ %15, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=2]
+ %40 = phi %struct.StorablePicture* [ %16, %bb38.i ], [ null, %bb64.i ] ; <%struct.StorablePicture*> [#uses=8]
+ %indvar.next249.i = add i64 %indvar248.i, 1 ; <i64> [#uses=1]
+ br i1 undef, label %bb38.i, label %bb68.i
+
+bb68.i: ; preds = %bb66.i, %bb67.preheader.i
+ %41 = phi %struct.StorablePicture* [ %2, %bb67.preheader.i ], [ %37, %bb66.i ] ; <%struct.StorablePicture*> [#uses=0]
+ %42 = phi %struct.StorablePicture* [ %3, %bb67.preheader.i ], [ %38, %bb66.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %43 = phi %struct.StorablePicture* [ %4, %bb67.preheader.i ], [ %39, %bb66.i ] ; <%struct.StorablePicture*> [#uses=1]
+ br i1 undef, label %bb.nph48.i, label %bb108.i
+
+bb.nph48.i: ; preds = %bb68.i
+ br label %bb80.i
+
+bb80.i: ; preds = %bb104.i, %bb.nph48.i
+ %44 = phi %struct.StorablePicture* [ %42, %bb.nph48.i ], [ null, %bb104.i ] ; <%struct.StorablePicture*> [#uses=1]
+ %45 = phi %struct.StorablePicture* [ %43, %bb.nph48.i ], [ null, %bb104.i ] ; <%struct.StorablePicture*> [#uses=1]
+ br i1 undef, label %bb.nph39.i, label %bb104.i
+
+bb.nph39.i: ; preds = %bb80.i
+ br label %bb81.i
+
+bb81.i: ; preds = %bb102.i, %bb.nph39.i
+ %46 = phi %struct.StorablePicture* [ %44, %bb.nph39.i ], [ %48, %bb102.i ] ; <%struct.StorablePicture*> [#uses=0]
+ %47 = phi %struct.StorablePicture* [ %45, %bb.nph39.i ], [ %48, %bb102.i ] ; <%struct.StorablePicture*> [#uses=0]
+ br i1 undef, label %bb83.i, label %bb82.i
+
+bb82.i: ; preds = %bb81.i
+ br i1 undef, label %bb83.i, label %bb101.i
+
+bb83.i: ; preds = %bb82.i, %bb81.i
+ br label %bb102.i
+
+bb101.i: ; preds = %bb82.i
+ br label %bb102.i
+
+bb102.i: ; preds = %bb101.i, %bb83.i
+ %48 = load %struct.StorablePicture** %0, align 8 ; <%struct.StorablePicture*> [#uses=2]
+ br i1 undef, label %bb81.i, label %bb104.i
+
+bb104.i: ; preds = %bb102.i, %bb80.i
+ br label %bb80.i
+
+bb108.i: ; preds = %bb68.i
+ unreachable
+}
diff --git a/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll b/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll
new file mode 100644
index 0000000..b5be65f
--- /dev/null
+++ b/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s
+; rdar://7362871
+
+define void @bar(i32 %b, i32 %a) nounwind optsize ssp {
+entry:
+; CHECK: leal 15(%rsi), %edi
+; CHECK-NOT: movl
+; CHECK: _foo
+ %0 = add i32 %a, 15 ; <i32> [#uses=1]
+ %1 = zext i32 %0 to i64 ; <i64> [#uses=1]
+ tail call void @foo(i64 %1) nounwind
+ ret void
+}
+
+declare void @foo(i64)
diff --git a/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll b/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll
new file mode 100644
index 0000000..5398eef
--- /dev/null
+++ b/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll
@@ -0,0 +1,133 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim
+; rdar://7394770
+
+%struct.JVTLib_100487 = type <{ i8 }>
+
+define i32 @_Z13JVTLib_10335613JVTLib_10266513JVTLib_100579S_S_S_jPhj(i16* nocapture %ResidualX_Array.0, %struct.JVTLib_100487* nocapture byval align 4 %xqp, i16* nocapture %ResidualL_Array.0, i16* %ResidualDCZ_Array.0, i16* nocapture %ResidualACZ_FOArray.0, i32 %useFRextDequant, i8* nocapture %JVTLib_103357, i32 %use_field_scan) ssp {
+bb.nph:
+ %0 = shl i32 undef, 1 ; <i32> [#uses=2]
+ %mask133.masked.masked.masked.masked.masked.masked = or i640 undef, undef ; <i640> [#uses=1]
+ br label %bb
+
+bb: ; preds = %_ZL13JVTLib_105204PKsPK13JVTLib_105184PsPhjS5_j.exit, %bb.nph
+ br i1 undef, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ br i1 undef, label %bb.i, label %bb1.i
+
+bb2: ; preds = %bb
+ unreachable
+
+bb.i: ; preds = %bb1
+ br label %_ZL13JVTLib_105204PKsPK13JVTLib_105184PsPhjS5_j.exit
+
+bb1.i: ; preds = %bb1
+ br label %_ZL13JVTLib_105204PKsPK13JVTLib_105184PsPhjS5_j.exit
+
+_ZL13JVTLib_105204PKsPK13JVTLib_105184PsPhjS5_j.exit: ; preds = %bb1.i, %bb.i
+ br i1 undef, label %bb5, label %bb
+
+bb5: ; preds = %_ZL13JVTLib_105204PKsPK13JVTLib_105184PsPhjS5_j.exit
+ %mask271.masked.masked.masked.masked.masked.masked.masked = or i256 0, undef ; <i256> [#uses=2]
+ %mask266.masked.masked.masked.masked.masked.masked = or i256 %mask271.masked.masked.masked.masked.masked.masked.masked, undef ; <i256> [#uses=1]
+ %mask241.masked = or i256 undef, undef ; <i256> [#uses=1]
+ %ins237 = or i256 undef, 0 ; <i256> [#uses=1]
+ br i1 undef, label %bb9, label %bb10
+
+bb9: ; preds = %bb5
+ br i1 undef, label %bb12.i, label %_ZL13JVTLib_105255PKsPK13JVTLib_105184Psj.exit
+
+bb12.i: ; preds = %bb9
+ br label %_ZL13JVTLib_105255PKsPK13JVTLib_105184Psj.exit
+
+_ZL13JVTLib_105255PKsPK13JVTLib_105184Psj.exit: ; preds = %bb12.i, %bb9
+ ret i32 undef
+
+bb10: ; preds = %bb5
+ %1 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %2 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %3 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %4 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %5 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %6 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %tmp211 = lshr i256 %mask271.masked.masked.masked.masked.masked.masked.masked, 112 ; <i256> [#uses=0]
+ %7 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %tmp208 = lshr i256 %mask266.masked.masked.masked.masked.masked.masked, 128 ; <i256> [#uses=1]
+ %tmp209 = trunc i256 %tmp208 to i16 ; <i16> [#uses=1]
+ %8 = sext i16 %tmp209 to i32 ; <i32> [#uses=1]
+ %9 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %10 = sext i16 undef to i32 ; <i32> [#uses=1]
+ %tmp193 = lshr i256 %mask241.masked, 208 ; <i256> [#uses=1]
+ %tmp194 = trunc i256 %tmp193 to i16 ; <i16> [#uses=1]
+ %11 = sext i16 %tmp194 to i32 ; <i32> [#uses=1]
+ %tmp187 = lshr i256 %ins237, 240 ; <i256> [#uses=1]
+ %tmp188 = trunc i256 %tmp187 to i16 ; <i16> [#uses=1]
+ %12 = sext i16 %tmp188 to i32 ; <i32> [#uses=1]
+ %13 = add nsw i32 %4, %1 ; <i32> [#uses=1]
+ %14 = add nsw i32 %5, 0 ; <i32> [#uses=1]
+ %15 = add nsw i32 %6, %2 ; <i32> [#uses=1]
+ %16 = add nsw i32 %7, %3 ; <i32> [#uses=1]
+ %17 = add nsw i32 0, %8 ; <i32> [#uses=1]
+ %18 = add nsw i32 %11, %9 ; <i32> [#uses=1]
+ %19 = add nsw i32 0, %10 ; <i32> [#uses=1]
+ %20 = add nsw i32 %12, 0 ; <i32> [#uses=1]
+ %21 = add nsw i32 %17, %13 ; <i32> [#uses=2]
+ %22 = add nsw i32 %18, %14 ; <i32> [#uses=2]
+ %23 = add nsw i32 %19, %15 ; <i32> [#uses=2]
+ %24 = add nsw i32 %20, %16 ; <i32> [#uses=2]
+ %25 = add nsw i32 %22, %21 ; <i32> [#uses=2]
+ %26 = add nsw i32 %24, %23 ; <i32> [#uses=2]
+ %27 = sub i32 %21, %22 ; <i32> [#uses=1]
+ %28 = sub i32 %23, %24 ; <i32> [#uses=1]
+ %29 = add nsw i32 %26, %25 ; <i32> [#uses=1]
+ %30 = sub i32 %25, %26 ; <i32> [#uses=1]
+ %31 = sub i32 %27, %28 ; <i32> [#uses=1]
+ %32 = ashr i32 %29, 1 ; <i32> [#uses=2]
+ %33 = ashr i32 %30, 1 ; <i32> [#uses=2]
+ %34 = ashr i32 %31, 1 ; <i32> [#uses=2]
+ %35 = icmp sgt i32 %32, 32767 ; <i1> [#uses=1]
+ %o0_0.0.i = select i1 %35, i32 32767, i32 %32 ; <i32> [#uses=2]
+ %36 = icmp slt i32 %o0_0.0.i, -32768 ; <i1> [#uses=1]
+ %37 = icmp sgt i32 %33, 32767 ; <i1> [#uses=1]
+ %o1_0.0.i = select i1 %37, i32 32767, i32 %33 ; <i32> [#uses=2]
+ %38 = icmp slt i32 %o1_0.0.i, -32768 ; <i1> [#uses=1]
+ %39 = icmp sgt i32 %34, 32767 ; <i1> [#uses=1]
+ %o2_0.0.i = select i1 %39, i32 32767, i32 %34 ; <i32> [#uses=2]
+ %40 = icmp slt i32 %o2_0.0.i, -32768 ; <i1> [#uses=1]
+ %tmp101 = lshr i640 %mask133.masked.masked.masked.masked.masked.masked, 256 ; <i640> [#uses=1]
+ %41 = trunc i32 %o0_0.0.i to i16 ; <i16> [#uses=1]
+ %tmp358 = select i1 %36, i16 -32768, i16 %41 ; <i16> [#uses=2]
+ %42 = trunc i32 %o1_0.0.i to i16 ; <i16> [#uses=1]
+ %tmp347 = select i1 %38, i16 -32768, i16 %42 ; <i16> [#uses=1]
+ %43 = trunc i32 %o2_0.0.i to i16 ; <i16> [#uses=1]
+ %tmp335 = select i1 %40, i16 -32768, i16 %43 ; <i16> [#uses=1]
+ %44 = icmp sgt i16 %tmp358, -1 ; <i1> [#uses=2]
+ %..i24 = select i1 %44, i16 %tmp358, i16 undef ; <i16> [#uses=1]
+ %45 = icmp sgt i16 %tmp347, -1 ; <i1> [#uses=1]
+ %46 = icmp sgt i16 %tmp335, -1 ; <i1> [#uses=1]
+ %47 = zext i16 %..i24 to i32 ; <i32> [#uses=1]
+ %tmp = trunc i640 %tmp101 to i32 ; <i32> [#uses=1]
+ %48 = and i32 %tmp, 65535 ; <i32> [#uses=2]
+ %49 = mul i32 %47, %48 ; <i32> [#uses=1]
+ %50 = zext i16 undef to i32 ; <i32> [#uses=1]
+ %51 = mul i32 %50, %48 ; <i32> [#uses=1]
+ %52 = add i32 %49, %0 ; <i32> [#uses=1]
+ %53 = add i32 %51, %0 ; <i32> [#uses=1]
+ %54 = lshr i32 %52, undef ; <i32> [#uses=1]
+ %55 = lshr i32 %53, undef ; <i32> [#uses=1]
+ %56 = trunc i32 %54 to i16 ; <i16> [#uses=1]
+ %57 = trunc i32 %55 to i16 ; <i16> [#uses=1]
+ %vs16Out0_0.0.i = select i1 %44, i16 %56, i16 undef ; <i16> [#uses=1]
+ %vs16Out0_4.0.i = select i1 %45, i16 0, i16 undef ; <i16> [#uses=1]
+ %vs16Out1_0.0.i = select i1 %46, i16 %57, i16 undef ; <i16> [#uses=1]
+ br i1 undef, label %bb129.i, label %_ZL13JVTLib_105207PKsPK13JVTLib_105184Psj.exit
+
+bb129.i: ; preds = %bb10
+ br label %_ZL13JVTLib_105207PKsPK13JVTLib_105184Psj.exit
+
+_ZL13JVTLib_105207PKsPK13JVTLib_105184Psj.exit: ; preds = %bb129.i, %bb10
+ %58 = phi i16 [ %vs16Out0_4.0.i, %bb129.i ], [ undef, %bb10 ] ; <i16> [#uses=0]
+ %59 = phi i16 [ undef, %bb129.i ], [ %vs16Out1_0.0.i, %bb10 ] ; <i16> [#uses=0]
+ store i16 %vs16Out0_0.0.i, i16* %ResidualDCZ_Array.0, align 2
+ unreachable
+}
diff --git a/test/CodeGen/X86/2009-11-16-MachineLICM.ll b/test/CodeGen/X86/2009-11-16-MachineLICM.ll
new file mode 100644
index 0000000..8f274df
--- /dev/null
+++ b/test/CodeGen/X86/2009-11-16-MachineLICM.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; rdar://7395200
+
+@g = common global [4 x float] zeroinitializer, align 16 ; <[4 x float]*> [#uses=4]
+
+define void @foo(i32 %n, float* nocapture %x) nounwind ssp {
+entry:
+; CHECK: foo:
+ %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+; CHECK: movq _g@GOTPCREL(%rip), [[REG:%[a-z]+]]
+ %tmp = zext i32 %n to i64 ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+; CHECK: LBB1_2:
+ %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i64> [#uses=2]
+ %tmp9 = shl i64 %indvar, 2 ; <i64> [#uses=4]
+ %tmp1016 = or i64 %tmp9, 1 ; <i64> [#uses=1]
+ %scevgep = getelementptr float* %x, i64 %tmp1016 ; <float*> [#uses=1]
+ %tmp1117 = or i64 %tmp9, 2 ; <i64> [#uses=1]
+ %scevgep12 = getelementptr float* %x, i64 %tmp1117 ; <float*> [#uses=1]
+ %tmp1318 = or i64 %tmp9, 3 ; <i64> [#uses=1]
+ %scevgep14 = getelementptr float* %x, i64 %tmp1318 ; <float*> [#uses=1]
+ %x_addr.03 = getelementptr float* %x, i64 %tmp9 ; <float*> [#uses=1]
+ %1 = load float* getelementptr inbounds ([4 x float]* @g, i64 0, i64 0), align 16 ; <float> [#uses=1]
+ store float %1, float* %x_addr.03, align 4
+ %2 = load float* getelementptr inbounds ([4 x float]* @g, i64 0, i64 1), align 4 ; <float> [#uses=1]
+ store float %2, float* %scevgep, align 4
+ %3 = load float* getelementptr inbounds ([4 x float]* @g, i64 0, i64 2), align 8 ; <float> [#uses=1]
+ store float %3, float* %scevgep12, align 4
+ %4 = load float* getelementptr inbounds ([4 x float]* @g, i64 0, i64 3), align 4 ; <float> [#uses=1]
+ store float %4, float* %scevgep14, align 4
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, %tmp ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll b/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll
new file mode 100644
index 0000000..3ce9edb
--- /dev/null
+++ b/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; rdar://7396984
+
+@str = private constant [28 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxx\00", align 1
+
+define void @t(i32 %count) ssp nounwind {
+entry:
+; CHECK: t:
+; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip)
+; CHECK: movups L_str(%rip), %xmm0
+ %tmp0 = alloca [60 x i8], align 1
+ %tmp1 = getelementptr inbounds [60 x i8]* %tmp0, i64 0, i64 0
+ br label %bb1
+
+bb1:
+; CHECK: LBB1_1:
+; CHECK: movaps %xmm0, (%rsp)
+ %tmp2 = phi i32 [ %tmp3, %bb1 ], [ 0, %entry ]
+ call void @llvm.memcpy.i64(i8* %tmp1, i8* getelementptr inbounds ([28 x i8]* @str, i64 0, i64 0), i64 28, i32 1)
+ %tmp3 = add i32 %tmp2, 1
+ %tmp4 = icmp eq i32 %tmp3, %count
+ br i1 %tmp4, label %bb2, label %bb1
+
+bb2:
+ ret void
+}
+
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
diff --git a/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll b/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
new file mode 100644
index 0000000..5c1a2bc
--- /dev/null
+++ b/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
@@ -0,0 +1,52 @@
+; RUN: llc -O3 < %s
+; This test fails with:
+; Assertion failed: (!B && "UpdateTerminators requires analyzable predecessors!"), function updateTerminator, MachineBasicBlock.cpp, line 255.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.2"
+
+%"struct.llvm::InlineAsm::ConstraintInfo" = type { i32, i8, i8, i8, i8, %"struct.std::vector<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >" }
+%"struct.std::_Vector_base<llvm::InlineAsm::ConstraintInfo,std::allocator<llvm::InlineAsm::ConstraintInfo> >" = type { %"struct.std::_Vector_base<llvm::InlineAsm::ConstraintInfo,std::allocator<llvm::InlineAsm::ConstraintInfo> >::_Vector_impl" }
+%"struct.std::_Vector_base<llvm::InlineAsm::ConstraintInfo,std::allocator<llvm::InlineAsm::ConstraintInfo> >::_Vector_impl" = type { %"struct.llvm::InlineAsm::ConstraintInfo"*, %"struct.llvm::InlineAsm::ConstraintInfo"*, %"struct.llvm::InlineAsm::ConstraintInfo"* }
+%"struct.std::_Vector_base<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >" = type { %"struct.std::_Vector_base<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >::_Vector_impl" }
+%"struct.std::_Vector_base<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >::_Vector_impl" = type { %"struct.std::string"*, %"struct.std::string"*, %"struct.std::string"* }
+%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* }
+%"struct.std::string" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" }
+%"struct.std::vector<llvm::InlineAsm::ConstraintInfo,std::allocator<llvm::InlineAsm::ConstraintInfo> >" = type { %"struct.std::_Vector_base<llvm::InlineAsm::ConstraintInfo,std::allocator<llvm::InlineAsm::ConstraintInfo> >" }
+%"struct.std::vector<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >" = type { %"struct.std::_Vector_base<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >" }
+
+define zeroext i8 @_ZN4llvm9InlineAsm14ConstraintInfo5ParseENS_9StringRefERSt6vectorIS1_SaIS1_EE(%"struct.llvm::InlineAsm::ConstraintInfo"* nocapture %this, i64 %Str.0, i64 %Str.1, %"struct.std::vector<llvm::InlineAsm::ConstraintInfo,std::allocator<llvm::InlineAsm::ConstraintInfo> >"* nocapture %ConstraintsSoFar) nounwind ssp align 2 {
+entry:
+ br i1 undef, label %bb56, label %bb27.outer
+
+bb8: ; preds = %bb27.outer108, %bb13
+ switch i8 undef, label %bb27.outer [
+ i8 35, label %bb56
+ i8 37, label %bb14
+ i8 38, label %bb10
+ i8 42, label %bb56
+ ]
+
+bb27.outer: ; preds = %bb8, %entry
+ %I.2.ph = phi i8* [ undef, %entry ], [ %I.2.ph109, %bb8 ] ; <i8*> [#uses=2]
+ br label %bb27.outer108
+
+bb10: ; preds = %bb8
+ %toBool = icmp eq i8 0, 0 ; <i1> [#uses=1]
+ %or.cond = and i1 undef, %toBool ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb13, label %bb56
+
+bb13: ; preds = %bb10
+ br i1 undef, label %bb27.outer108, label %bb8
+
+bb14: ; preds = %bb8
+ ret i8 1
+
+bb27.outer108: ; preds = %bb13, %bb27.outer
+ %I.2.ph109 = getelementptr i8* %I.2.ph, i64 undef ; <i8*> [#uses=1]
+ %scevgep = getelementptr i8* %I.2.ph, i64 undef ; <i8*> [#uses=0]
+ br label %bb8
+
+bb56: ; preds = %bb10, %bb8, %bb8, %entry
+ ret i8 1
+}
diff --git a/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll b/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll
new file mode 100644
index 0000000..0edaa70
--- /dev/null
+++ b/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s
+; PR 5300
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+
+@g_296 = external global i8, align 1 ; <i8*> [#uses=1]
+
+define noalias i8** @func_31(i32** nocapture %int8p_33, i8** nocapture %p_34, i8* nocapture %p_35) nounwind {
+entry:
+ %cmp.i = icmp sgt i16 undef, 234 ; <i1> [#uses=1]
+ %tmp17 = select i1 %cmp.i, i16 undef, i16 0 ; <i16> [#uses=2]
+ %conv8 = trunc i16 %tmp17 to i8 ; <i8> [#uses=3]
+ br i1 undef, label %cond.false.i29, label %land.lhs.true.i
+
+land.lhs.true.i: ; preds = %entry
+ %tobool5.i = icmp eq i32 undef, undef ; <i1> [#uses=1]
+ br i1 %tobool5.i, label %cond.false.i29, label %bar.exit
+
+cond.false.i29: ; preds = %land.lhs.true.i, %entry
+ %tmp = sub i8 0, %conv8 ; <i8> [#uses=1]
+ %mul.i = and i8 %conv8, %tmp ; <i8> [#uses=1]
+ br label %bar.exit
+
+bar.exit: ; preds = %cond.false.i29, %land.lhs.true.i
+ %call1231 = phi i8 [ %mul.i, %cond.false.i29 ], [ %conv8, %land.lhs.true.i ] ; <i8> [#uses=0]
+ %conv21 = trunc i16 %tmp17 to i8 ; <i8> [#uses=1]
+ store i8 %conv21, i8* @g_296
+ ret i8** undef
+}
diff --git a/test/CodeGen/X86/2009-11-25-ImpDefBug.ll b/test/CodeGen/X86/2009-11-25-ImpDefBug.ll
new file mode 100644
index 0000000..7606c0e
--- /dev/null
+++ b/test/CodeGen/X86/2009-11-25-ImpDefBug.ll
@@ -0,0 +1,116 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; pr5600
+
+%struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t }
+%struct.ASN1ObjHeader = type { i8, %"struct.__gmp_expr<__mpz_struct [1],__mpz_struct [1]>", i64, i32, i32, i32 }
+%struct.ASN1Object = type { i32 (...)**, i32, i32, i64 }
+%struct.ASN1Unit = type { [4 x i32 (%struct.ASN1ObjHeader*, %struct.ASN1Object**)*], %"struct.std::ASN1ObjList" }
+%"struct.__gmp_expr<__mpz_struct [1],__mpz_struct [1]>" = type { [1 x %struct.__mpz_struct] }
+%struct.__mpz_struct = type { i32, i32, i64* }
+%struct.__pthread_list_t = type { %struct.__pthread_list_t*, %struct.__pthread_list_t* }
+%struct.pthread_attr_t = type { i64, [48 x i8] }
+%struct.pthread_mutex_t = type { %struct..0__pthread_mutex_s }
+%struct.pthread_mutexattr_t = type { i32 }
+%"struct.std::ASN1ObjList" = type { %"struct.std::_Vector_base<ASN1Object*,std::allocator<ASN1Object*> >" }
+%"struct.std::_Vector_base<ASN1Object*,std::allocator<ASN1Object*> >" = type { %"struct.std::_Vector_base<ASN1Object*,std::allocator<ASN1Object*> >::_Vector_impl" }
+%"struct.std::_Vector_base<ASN1Object*,std::allocator<ASN1Object*> >::_Vector_impl" = type { %struct.ASN1Object**, %struct.ASN1Object**, %struct.ASN1Object** }
+%struct.xmstream = type { i8*, i64, i64, i64, i8 }
+
+declare void @_ZNSt6vectorIP10ASN1ObjectSaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%"struct.std::ASN1ObjList"* nocapture, i64, %struct.ASN1Object** nocapture)
+
+declare i32 @_Z17LoadObjectFromBERR8xmstreamPP10ASN1ObjectPPF10ASN1StatusP13ASN1ObjHeaderS3_E(%struct.xmstream*, %struct.ASN1Object**, i32 (%struct.ASN1ObjHeader*, %struct.ASN1Object**)**)
+
+define i32 @_ZN8ASN1Unit4loadER8xmstreamjm18ASN1LengthEncoding(%struct.ASN1Unit* %this, %struct.xmstream* nocapture %stream, i32 %numObjects, i64 %size, i32 %lEncoding) {
+entry:
+ br label %meshBB85
+
+bb5: ; preds = %bb13.fragment.cl135, %bb13.fragment.cl, %bb.i.i.bbcl.disp, %bb13.fragment
+ %0 = invoke i32 @_Z17LoadObjectFromBERR8xmstreamPP10ASN1ObjectPPF10ASN1StatusP13ASN1ObjHeaderS3_E(%struct.xmstream* undef, %struct.ASN1Object** undef, i32 (%struct.ASN1ObjHeader*, %struct.ASN1Object**)** undef)
+ to label %meshBB81.bbcl.disp unwind label %lpad ; <i32> [#uses=0]
+
+bb10.fragment: ; preds = %bb13.fragment.bbcl.disp
+ br i1 undef, label %bb1.i.fragment.bbcl.disp, label %bb.i.i.bbcl.disp
+
+bb1.i.fragment: ; preds = %bb1.i.fragment.bbcl.disp
+ invoke void @_ZNSt6vectorIP10ASN1ObjectSaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%"struct.std::ASN1ObjList"* undef, i64 undef, %struct.ASN1Object** undef)
+ to label %meshBB81.bbcl.disp unwind label %lpad
+
+bb13.fragment: ; preds = %bb13.fragment.bbcl.disp
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb5
+
+bb.i4: ; preds = %bb.i4.bbcl.disp, %bb1.i.fragment.bbcl.disp
+ ret i32 undef
+
+bb1.i5: ; preds = %bb.i1
+ ret i32 undef
+
+lpad: ; preds = %bb1.i.fragment.cl, %bb1.i.fragment, %bb5
+ %.SV10.phi807 = phi i8* [ undef, %bb1.i.fragment.cl ], [ undef, %bb1.i.fragment ], [ undef, %bb5 ] ; <i8*> [#uses=1]
+ %1 = load i8* %.SV10.phi807, align 8 ; <i8> [#uses=0]
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb13.fragment.bbcl.disp
+
+bb.i1: ; preds = %bb.i.i.bbcl.disp
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb1.i5
+
+meshBB81: ; preds = %meshBB81.bbcl.disp, %bb.i.i.bbcl.disp
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb.i4.bbcl.disp
+
+meshBB85: ; preds = %meshBB81.bbcl.disp, %bb.i4.bbcl.disp, %bb1.i.fragment.bbcl.disp, %bb.i.i.bbcl.disp, %entry
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb13.fragment.bbcl.disp
+
+bb.i.i.bbcl.disp: ; preds = %bb10.fragment
+ switch i8 undef, label %meshBB85 [
+ i8 123, label %bb.i1
+ i8 97, label %bb5
+ i8 44, label %meshBB81
+ i8 1, label %meshBB81.cl
+ i8 51, label %meshBB81.cl141
+ ]
+
+bb1.i.fragment.cl: ; preds = %bb1.i.fragment.bbcl.disp
+ invoke void @_ZNSt6vectorIP10ASN1ObjectSaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%"struct.std::ASN1ObjList"* undef, i64 undef, %struct.ASN1Object** undef)
+ to label %meshBB81.bbcl.disp unwind label %lpad
+
+bb1.i.fragment.bbcl.disp: ; preds = %bb10.fragment
+ switch i8 undef, label %bb.i4 [
+ i8 97, label %bb1.i.fragment
+ i8 7, label %bb1.i.fragment.cl
+ i8 35, label %bb.i4.cl
+ i8 77, label %meshBB85
+ ]
+
+bb13.fragment.cl: ; preds = %bb13.fragment.bbcl.disp
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb5
+
+bb13.fragment.cl135: ; preds = %bb13.fragment.bbcl.disp
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb5
+
+bb13.fragment.bbcl.disp: ; preds = %meshBB85, %lpad
+ switch i8 undef, label %bb10.fragment [
+ i8 67, label %bb13.fragment.cl
+ i8 108, label %bb13.fragment
+ i8 58, label %bb13.fragment.cl135
+ ]
+
+bb.i4.cl: ; preds = %bb.i4.bbcl.disp, %bb1.i.fragment.bbcl.disp
+ ret i32 undef
+
+bb.i4.bbcl.disp: ; preds = %meshBB81.cl141, %meshBB81.cl, %meshBB81
+ switch i8 undef, label %bb.i4 [
+ i8 35, label %bb.i4.cl
+ i8 77, label %meshBB85
+ ]
+
+meshBB81.cl: ; preds = %meshBB81.bbcl.disp, %bb.i.i.bbcl.disp
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb.i4.bbcl.disp
+
+meshBB81.cl141: ; preds = %meshBB81.bbcl.disp, %bb.i.i.bbcl.disp
+ br i1 undef, label %meshBB81.bbcl.disp, label %bb.i4.bbcl.disp
+
+meshBB81.bbcl.disp: ; preds = %meshBB81.cl141, %meshBB81.cl, %bb13.fragment.cl135, %bb13.fragment.cl, %bb1.i.fragment.cl, %meshBB85, %meshBB81, %bb.i1, %lpad, %bb13.fragment, %bb1.i.fragment, %bb5
+ switch i8 undef, label %meshBB85 [
+ i8 44, label %meshBB81
+ i8 1, label %meshBB81.cl
+ i8 51, label %meshBB81.cl141
+ ]
+}
diff --git a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
new file mode 100644
index 0000000..1e7a418
--- /dev/null
+++ b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; pr5391
+
+define void @t() nounwind ssp {
+entry:
+; CHECK: t:
+; CHECK: movl %ecx, %eax
+; CHECK: %eax = foo (%eax, %ecx)
+ %b = alloca i32 ; <i32*> [#uses=2]
+ %a = alloca i32 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load i32* %b, align 4 ; <i32> [#uses=1]
+ %1 = load i32* %b, align 4 ; <i32> [#uses=1]
+ %asmtmp = call i32 asm "$0 = foo ($1, $2)", "=&{ax},%0,r,~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1) nounwind ; <i32> [#uses=1]
+ store i32 %asmtmp, i32* %a
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @t2() nounwind ssp {
+entry:
+; CHECK: t2:
+; CHECK: movl %eax, %ecx
+; CHECK: %ecx = foo (%ecx, %eax)
+ %b = alloca i32 ; <i32*> [#uses=2]
+ %a = alloca i32 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load i32* %b, align 4 ; <i32> [#uses=1]
+ %1 = load i32* %b, align 4 ; <i32> [#uses=1]
+ %asmtmp = call i32 asm "$0 = foo ($1, $2)", "=&r,%0,r,~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1) nounwind ; <i32> [#uses=1]
+ store i32 %asmtmp, i32* %a
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll b/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll
new file mode 100644
index 0000000..f7ba661
--- /dev/null
+++ b/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll
@@ -0,0 +1,63 @@
+; RUN: llc -relocation-model=pic < %s | FileCheck %s
+; PR5723
+target datalayout = "e-p:64:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+%0 = type { [1 x i64] }
+%link = type { %0* }
+%test = type { i32, %link }
+
+@data = global [2 x i64] zeroinitializer, align 64 ; <[2 x i64]*> [#uses=1]
+@ptr = linkonce thread_local global [1 x i64] [i64 ptrtoint ([2 x i64]* @data to i64)], align 64 ; <[1 x i64]*> [#uses=1]
+@link_ptr = linkonce thread_local global [1 x i64] zeroinitializer, align 64 ; <[1 x i64]*> [#uses=1]
+@_dm_my_pe = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
+@_dm_pes_in_prog = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
+@_dm_npes_div_mult = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
+@_dm_npes_div_shift = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
+@_dm_pe_addr_loc = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
+@_dm_offset_addr_mask = external global [1 x i64], align 64 ; <[1 x i64]*> [#uses=0]
+
+define void @leaf() nounwind {
+; CHECK: leaf:
+; CHECK-NOT: -8(%rsp)
+; CHECK: leaq link_ptr@TLSGD
+; CHECK: call __tls_get_addr@PLT
+"file foo2.c, line 14, bb1":
+ %p = alloca %test*, align 8 ; <%test**> [#uses=4]
+ br label %"file foo2.c, line 14, bb2"
+
+"file foo2.c, line 14, bb2": ; preds = %"file foo2.c, line 14, bb1"
+ br label %"@CFE_debug_label_0"
+
+"@CFE_debug_label_0": ; preds = %"file foo2.c, line 14, bb2"
+ %r = load %test** bitcast ([1 x i64]* @ptr to %test**), align 8 ; <%test*> [#uses=1]
+ store %test* %r, %test** %p, align 8
+ br label %"@CFE_debug_label_2"
+
+"@CFE_debug_label_2": ; preds = %"@CFE_debug_label_0"
+ %r1 = load %link** bitcast ([1 x i64]* @link_ptr to %link**), align 8 ; <%link*> [#uses=1]
+ %r2 = load %test** %p, align 8 ; <%test*> [#uses=1]
+ %r3 = ptrtoint %test* %r2 to i64 ; <i64> [#uses=1]
+ %r4 = inttoptr i64 %r3 to %link** ; <%link**> [#uses=1]
+ %r5 = getelementptr %link** %r4, i64 1 ; <%link**> [#uses=1]
+ store %link* %r1, %link** %r5, align 8
+ br label %"@CFE_debug_label_3"
+
+"@CFE_debug_label_3": ; preds = %"@CFE_debug_label_2"
+ %r6 = load %test** %p, align 8 ; <%test*> [#uses=1]
+ %r7 = ptrtoint %test* %r6 to i64 ; <i64> [#uses=1]
+ %r8 = inttoptr i64 %r7 to %link* ; <%link*> [#uses=1]
+ %r9 = getelementptr %link* %r8, i64 1 ; <%link*> [#uses=1]
+ store %link* %r9, %link** bitcast ([1 x i64]* @link_ptr to %link**), align 8
+ br label %"@CFE_debug_label_4"
+
+"@CFE_debug_label_4": ; preds = %"@CFE_debug_label_3"
+ %r10 = load %test** %p, align 8 ; <%test*> [#uses=1]
+ %r11 = ptrtoint %test* %r10 to i64 ; <i64> [#uses=1]
+ %r12 = inttoptr i64 %r11 to i32* ; <i32*> [#uses=1]
+ store i32 1, i32* %r12, align 4
+ br label %"@CFE_debug_label_5"
+
+"@CFE_debug_label_5": ; preds = %"@CFE_debug_label_4"
+ ret void
+}
diff --git a/test/CodeGen/X86/2009-12-12-CoalescerBug.ll b/test/CodeGen/X86/2009-12-12-CoalescerBug.ll
new file mode 100644
index 0000000..4e8f5fd
--- /dev/null
+++ b/test/CodeGen/X86/2009-12-12-CoalescerBug.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+
+define i32 @do_loop(i32* nocapture %sdp, i32* nocapture %ddp, i8* %mdp, i8* nocapture %cdp, i32 %w) nounwind readonly optsize ssp {
+entry:
+ br label %bb
+
+bb: ; preds = %bb5, %entry
+ %mask.1.in = load i8* undef, align 1 ; <i8> [#uses=3]
+ %0 = icmp eq i8 %mask.1.in, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb5, label %bb1
+
+bb1: ; preds = %bb
+ br i1 undef, label %bb2, label %bb3
+
+bb2: ; preds = %bb1
+; CHECK: %bb2
+; CHECK: movb %ch, %al
+ %1 = zext i8 %mask.1.in to i32 ; <i32> [#uses=1]
+ %2 = zext i8 undef to i32 ; <i32> [#uses=1]
+ %3 = mul i32 %2, %1 ; <i32> [#uses=1]
+ %4 = add i32 %3, 1 ; <i32> [#uses=1]
+ %5 = add i32 %4, 0 ; <i32> [#uses=1]
+ %6 = lshr i32 %5, 8 ; <i32> [#uses=1]
+ %retval12.i = trunc i32 %6 to i8 ; <i8> [#uses=1]
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %mask.0.in = phi i8 [ %retval12.i, %bb2 ], [ %mask.1.in, %bb1 ] ; <i8> [#uses=1]
+ %7 = icmp eq i8 %mask.0.in, 0 ; <i1> [#uses=1]
+ br i1 %7, label %bb5, label %bb4
+
+bb4: ; preds = %bb3
+ br label %bb5
+
+bb5: ; preds = %bb4, %bb3, %bb
+ br i1 undef, label %bb6, label %bb
+
+bb6: ; preds = %bb5
+ ret i32 undef
+}
diff --git a/test/CodeGen/X86/20090313-signext.ll b/test/CodeGen/X86/20090313-signext.ll
new file mode 100644
index 0000000..de930d5
--- /dev/null
+++ b/test/CodeGen/X86/20090313-signext.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86-64 -relocation-model=pic > %t
+; RUN: grep {movswl %ax, %edi} %t
+; RUN: grep {movw (%rax), %ax} %t
+; XFAIL: *
+
+@x = common global i16 0
+
+define signext i16 @f() nounwind {
+entry:
+ %0 = tail call signext i16 @h() nounwind
+ %1 = sext i16 %0 to i32
+ tail call void @g(i32 %1) nounwind
+ %2 = load i16* @x, align 2
+ ret i16 %2
+}
+
+declare signext i16 @h()
+
+declare void @g(i32)
diff --git a/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll b/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll
new file mode 100644
index 0000000..e7004e2
--- /dev/null
+++ b/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64
+; <rdar://problem/7499313>
+target triple = "i686-apple-darwin8"
+
+declare void @func2(i16 zeroext)
+
+define void @func1() nounwind {
+entry:
+ %t1 = icmp ne i8 undef, 0
+ %t2 = icmp eq i8 undef, 14
+ %t3 = and i1 %t1, %t2
+ %t4 = select i1 %t3, i16 0, i16 128
+ call void @func2(i16 zeroext %t4) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/2010-01-07-ISelBug.ll b/test/CodeGen/X86/2010-01-07-ISelBug.ll
new file mode 100644
index 0000000..081fab7
--- /dev/null
+++ b/test/CodeGen/X86/2010-01-07-ISelBug.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; rdar://r7519827
+
+define i32 @t() nounwind ssp {
+entry:
+ br label %if.end.i11
+
+if.end.i11: ; preds = %lor.lhs.false.i10, %lor.lhs.false.i10, %lor.lhs.false.i10
+ br i1 undef, label %for.body161, label %for.end197
+
+for.body161: ; preds = %if.end.i11
+ br label %for.end197
+
+for.end197: ; preds = %for.body161, %if.end.i11
+ %mlucEntry.4 = phi i96 [ undef, %for.body161 ], [ undef, %if.end.i11 ] ; <i96> [#uses=2]
+ store i96 %mlucEntry.4, i96* undef, align 8
+ %tmp172 = lshr i96 %mlucEntry.4, 64 ; <i96> [#uses=1]
+ %tmp173 = trunc i96 %tmp172 to i32 ; <i32> [#uses=1]
+ %tmp1.i1.i = call i32 @llvm.bswap.i32(i32 %tmp173) nounwind ; <i32> [#uses=1]
+ store i32 %tmp1.i1.i, i32* undef, align 8
+ unreachable
+
+if.then283: ; preds = %lor.lhs.false.i10, %do.end105, %for.end
+ ret i32 undef
+}
+
+declare i32 @llvm.bswap.i32(i32) nounwind readnone
diff --git a/test/CodeGen/X86/2010-01-07-UAMemFeature.ll b/test/CodeGen/X86/2010-01-07-UAMemFeature.ll
new file mode 100644
index 0000000..3728f15
--- /dev/null
+++ b/test/CodeGen/X86/2010-01-07-UAMemFeature.ll
@@ -0,0 +1,11 @@
+; RUN: llc -mcpu=yonah -mattr=vector-unaligned-mem -march=x86 < %s | FileCheck %s
+; CHECK: addps (
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define <4 x float> @foo(<4 x float>* %P, <4 x float> %In) nounwind {
+ %A = load <4 x float>* %P, align 4
+ %B = add <4 x float> %A, %In
+ ret <4 x float> %B
+}
diff --git a/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll b/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
new file mode 100644
index 0000000..172e1c7
--- /dev/null
+++ b/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; rdar://r7512579
+
+; PHI defs in the atomic loop should be used by the add / adc
+; instructions. They should not be dead.
+
+define void @t(i64* nocapture %p) nounwind ssp {
+entry:
+; CHECK: t:
+; CHECK: movl $1
+; CHECK: movl (%ebp), %eax
+; CHECK: movl 4(%ebp), %edx
+; CHECK: LBB1_1:
+; CHECK-NOT: movl $1
+; CHECK-NOT: movl $0
+; CHECK: addl
+; CHECK: adcl
+; CHECK: lock
+; CHECK: cmpxchg8b
+; CHECK: jne
+ tail call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
+ %0 = tail call i64 @llvm.atomic.load.add.i64.p0i64(i64* %p, i64 1) ; <i64> [#uses=0]
+ tail call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
+ ret void
+}
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
+
+declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind
diff --git a/test/CodeGen/X86/2010-01-11-ExtraPHIArg.ll b/test/CodeGen/X86/2010-01-11-ExtraPHIArg.ll
new file mode 100644
index 0000000..db98eef
--- /dev/null
+++ b/test/CodeGen/X86/2010-01-11-ExtraPHIArg.ll
@@ -0,0 +1,97 @@
+; RUN: llc -verify-machineinstrs < %s
+;
+; The lowering of a switch combined with constand folding would leave spurious extra arguments on a PHI instruction.
+;
+target triple = "x86_64-apple-darwin10"
+
+define void @foo() {
+ br label %cond_true813.i
+
+cond_true813.i: ; preds = %0
+ br i1 false, label %cond_true818.i, label %cond_next1146.i
+
+cond_true818.i: ; preds = %cond_true813.i
+ br i1 false, label %recog_memoized.exit52, label %cond_next1146.i
+
+recog_memoized.exit52: ; preds = %cond_true818.i
+ switch i32 0, label %bb886.i.preheader [
+ i32 0, label %bb907.i
+ i32 44, label %bb866.i
+ i32 103, label %bb874.i
+ i32 114, label %bb874.i
+ ]
+
+bb857.i: ; preds = %bb886.i, %bb866.i
+ %tmp862.i494.24 = phi i8* [ null, %bb866.i ], [ %tmp862.i494.26, %bb886.i ] ; <i8*> [#uses=1]
+ switch i32 0, label %bb886.i.preheader [
+ i32 0, label %bb907.i
+ i32 44, label %bb866.i
+ i32 103, label %bb874.i
+ i32 114, label %bb874.i
+ ]
+
+bb866.i.loopexit: ; preds = %bb874.i
+ br label %bb866.i
+
+bb866.i.loopexit31: ; preds = %cond_true903.i
+ br label %bb866.i
+
+bb866.i: ; preds = %bb866.i.loopexit31, %bb866.i.loopexit, %bb857.i, %recog_memoized.exit52
+ br i1 false, label %bb907.i, label %bb857.i
+
+bb874.i.preheader.loopexit: ; preds = %cond_true903.i, %cond_true903.i
+ ret void
+
+bb874.i: ; preds = %bb857.i, %bb857.i, %recog_memoized.exit52, %recog_memoized.exit52
+ switch i32 0, label %bb886.i.preheader.loopexit [
+ i32 0, label %bb907.i
+ i32 44, label %bb866.i.loopexit
+ i32 103, label %bb874.i.backedge
+ i32 114, label %bb874.i.backedge
+ ]
+
+bb874.i.backedge: ; preds = %bb874.i, %bb874.i
+ ret void
+
+bb886.i.preheader.loopexit: ; preds = %bb874.i
+ ret void
+
+bb886.i.preheader: ; preds = %bb857.i, %recog_memoized.exit52
+ %tmp862.i494.26 = phi i8* [ undef, %recog_memoized.exit52 ], [ %tmp862.i494.24, %bb857.i ] ; <i8*> [#uses=1]
+ br label %bb886.i
+
+bb886.i: ; preds = %cond_true903.i, %bb886.i.preheader
+ br i1 false, label %bb857.i, label %cond_true903.i
+
+cond_true903.i: ; preds = %bb886.i
+ switch i32 0, label %bb886.i [
+ i32 0, label %bb907.i
+ i32 44, label %bb866.i.loopexit31
+ i32 103, label %bb874.i.preheader.loopexit
+ i32 114, label %bb874.i.preheader.loopexit
+ ]
+
+bb907.i: ; preds = %cond_true903.i, %bb874.i, %bb866.i, %bb857.i, %recog_memoized.exit52
+ br i1 false, label %cond_next1146.i, label %cond_true910.i
+
+cond_true910.i: ; preds = %bb907.i
+ ret void
+
+cond_next1146.i: ; preds = %bb907.i, %cond_true818.i, %cond_true813.i
+ ret void
+
+bb2060.i: ; No predecessors!
+ br i1 false, label %cond_true2064.i, label %bb2067.i
+
+cond_true2064.i: ; preds = %bb2060.i
+ unreachable
+
+bb2067.i: ; preds = %bb2060.i
+ ret void
+
+cond_next3473: ; No predecessors!
+ ret void
+
+cond_next3521: ; No predecessors!
+ ret void
+}
diff --git a/test/CodeGen/X86/2010-01-13-OptExtBug.ll b/test/CodeGen/X86/2010-01-13-OptExtBug.ll
new file mode 100644
index 0000000..d49e2a8
--- /dev/null
+++ b/test/CodeGen/X86/2010-01-13-OptExtBug.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu
+; PR6027
+
+%class.OlsonTimeZone = type { i16, i32*, i8*, i16 }
+
+define void @XX(%class.OlsonTimeZone* %this) align 2 {
+entry:
+ %call = tail call i8* @_Z15uprv_malloc_4_2v()
+ %0 = bitcast i8* %call to double*
+ %tmp = getelementptr inbounds %class.OlsonTimeZone* %this, i32 0, i32 3
+ %tmp2 = load i16* %tmp
+ %tmp525 = getelementptr inbounds %class.OlsonTimeZone* %this, i32 0, i32 0
+ %tmp626 = load i16* %tmp525
+ %cmp27 = icmp slt i16 %tmp2, %tmp626
+ br i1 %cmp27, label %bb.nph, label %for.end
+
+for.cond:
+ %tmp6 = load i16* %tmp5
+ %cmp = icmp slt i16 %inc, %tmp6
+ %indvar.next = add i32 %indvar, 1
+ br i1 %cmp, label %for.body, label %for.end
+
+bb.nph:
+ %tmp10 = getelementptr inbounds %class.OlsonTimeZone* %this, i32 0, i32 2
+ %tmp17 = getelementptr inbounds %class.OlsonTimeZone* %this, i32 0, i32 1
+ %tmp5 = getelementptr inbounds %class.OlsonTimeZone* %this, i32 0, i32 0
+ %tmp29 = sext i16 %tmp2 to i32
+ %tmp31 = add i16 %tmp2, 1
+ %tmp32 = zext i16 %tmp31 to i32
+ br label %for.body
+
+for.body:
+ %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %for.cond ]
+ %tmp30 = add i32 %indvar, %tmp29
+ %tmp33 = add i32 %indvar, %tmp32
+ %inc = trunc i32 %tmp33 to i16
+ %tmp11 = load i8** %tmp10
+ %arrayidx = getelementptr i8* %tmp11, i32 %tmp30
+ %tmp12 = load i8* %arrayidx
+ br label %for.cond
+
+for.end:
+ ret void
+}
+
+declare i8* @_Z15uprv_malloc_4_2v()
diff --git a/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll b/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll
new file mode 100644
index 0000000..5d96e4a
--- /dev/null
+++ b/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86-64
+; ModuleID = 'bugpoint-reduced-simplified.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @numvec_(i32* noalias %ncelet, i32* noalias %ncel, i32* noalias %nfac, i32* noalias %nfabor, i32* noalias %lregis, i32* noalias %irveci, i32* noalias %irvecb, [0 x [2 x i32]]* noalias %ifacel, [0 x i32]* noalias %ifabor, [0 x i32]* noalias %inumfi, [0 x i32]* noalias %inumfb, [1 x i32]* noalias %iworkf, [0 x i32]* noalias %ismbs) {
+"file bug754399.f90, line 1, bb1":
+ %r1037 = bitcast <2 x double> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=1]
+ br label %"file bug754399.f90, line 184, in inner vector loop at depth 0, bb164"
+
+"file bug754399.f90, line 184, in inner vector loop at depth 0, bb164": ; preds = %"file bug754399.f90, line 184, in inner vector loop at depth 0, bb164", %"file bug754399.f90, line 1, bb1"
+ %tmp641 = add i64 0, 48 ; <i64> [#uses=1]
+ %tmp641642 = inttoptr i64 %tmp641 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %r1258 = load <4 x i32>* %tmp641642, align 4 ; <<4 x i32>> [#uses=2]
+ %r1295 = extractelement <4 x i32> %r1258, i32 3 ; <i32> [#uses=1]
+ %r1296 = sext i32 %r1295 to i64 ; <i64> [#uses=1]
+ %r1297 = add i64 %r1296, -1 ; <i64> [#uses=1]
+ %r1298183 = getelementptr [0 x i32]* %ismbs, i64 0, i64 %r1297 ; <i32*> [#uses=1]
+ %r1298184 = load i32* %r1298183, align 4 ; <i32> [#uses=1]
+ %r1301 = extractelement <4 x i32> %r1037, i32 3 ; <i32> [#uses=1]
+ %r1302 = mul i32 %r1298184, %r1301 ; <i32> [#uses=1]
+ %r1306 = insertelement <4 x i32> zeroinitializer, i32 %r1302, i32 3 ; <<4 x i32>> [#uses=1]
+ %r1321 = add <4 x i32> %r1306, %r1258 ; <<4 x i32>> [#uses=1]
+ %tmp643 = add i64 0, 48 ; <i64> [#uses=1]
+ %tmp643644 = inttoptr i64 %tmp643 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ store <4 x i32> %r1321, <4 x i32>* %tmp643644, align 4
+ br label %"file bug754399.f90, line 184, in inner vector loop at depth 0, bb164"
+}
diff --git a/test/CodeGen/X86/2010-01-19-OptExtBug.ll b/test/CodeGen/X86/2010-01-19-OptExtBug.ll
new file mode 100644
index 0000000..cd8960b
--- /dev/null
+++ b/test/CodeGen/X86/2010-01-19-OptExtBug.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -relocation-model=pic -disable-fp-elim -stats |& not grep ext-opt
+
+define fastcc i8* @S_scan_str(i8* %start, i32 %keep_quoted, i32 %keep_delims) nounwind ssp {
+entry:
+ switch i8 undef, label %bb6 [
+ i8 9, label %bb5
+ i8 32, label %bb5
+ i8 10, label %bb5
+ i8 13, label %bb5
+ i8 12, label %bb5
+ ]
+
+bb5: ; preds = %entry, %entry, %entry, %entry, %entry
+ br label %bb6
+
+bb6: ; preds = %bb5, %entry
+ br i1 undef, label %bb7, label %bb9
+
+bb7: ; preds = %bb6
+ unreachable
+
+bb9: ; preds = %bb6
+ %0 = load i8* undef, align 1 ; <i8> [#uses=3]
+ br i1 undef, label %bb12, label %bb10
+
+bb10: ; preds = %bb9
+ br i1 undef, label %bb12, label %bb11
+
+bb11: ; preds = %bb10
+ unreachable
+
+bb12: ; preds = %bb10, %bb9
+ br i1 undef, label %bb13, label %bb14
+
+bb13: ; preds = %bb12
+ store i8 %0, i8* undef, align 1
+ %1 = zext i8 %0 to i32 ; <i32> [#uses=1]
+ br label %bb18
+
+bb14: ; preds = %bb12
+ br label %bb18
+
+bb18: ; preds = %bb14, %bb13
+ %termcode.0 = phi i32 [ %1, %bb13 ], [ undef, %bb14 ] ; <i32> [#uses=2]
+ %2 = icmp eq i8 %0, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb21, label %bb19
+
+bb19: ; preds = %bb18
+ br i1 undef, label %bb21, label %bb20
+
+bb20: ; preds = %bb19
+ br label %bb21
+
+bb21: ; preds = %bb20, %bb19, %bb18
+ %termcode.1 = phi i32 [ %termcode.0, %bb18 ], [ %termcode.0, %bb19 ], [ undef, %bb20 ] ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/2010-02-01-TaillCallCrash.ll b/test/CodeGen/X86/2010-02-01-TaillCallCrash.ll
new file mode 100644
index 0000000..2751174
--- /dev/null
+++ b/test/CodeGen/X86/2010-02-01-TaillCallCrash.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; PR6196
+
+%"char[]" = type [1 x i8]
+
[email protected] = external constant %"char[]", align 1 ; <%"char[]"*> [#uses=1]
+
+define i32 @regex_subst() nounwind {
+entry:
+ %0 = tail call i32 bitcast (%"char[]"* @.str to i32 (i32)*)(i32 0) nounwind ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/2010-02-03-DualUndef.ll b/test/CodeGen/X86/2010-02-03-DualUndef.ll
new file mode 100644
index 0000000..d116ecc
--- /dev/null
+++ b/test/CodeGen/X86/2010-02-03-DualUndef.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86-64
+; PR6086
+define fastcc void @prepOutput() nounwind {
+bb: ; preds = %output.exit
+ br label %bb.i1
+
+bb.i1: ; preds = %bb7.i, %bb
+ br i1 undef, label %bb7.i, label %bb.nph.i
+
+bb.nph.i: ; preds = %bb.i1
+ br label %bb3.i
+
+bb3.i: ; preds = %bb5.i6, %bb.nph.i
+ %tmp10.i = trunc i64 undef to i32 ; <i32> [#uses=1]
+ br i1 undef, label %bb4.i, label %bb5.i6
+
+bb4.i: ; preds = %bb3.i
+ br label %bb5.i6
+
+bb5.i6: ; preds = %bb4.i, %bb3.i
+ %0 = phi i32 [ undef, %bb4.i ], [ undef, %bb3.i ] ; <i32> [#uses=1]
+ %1 = icmp slt i32 %0, %tmp10.i ; <i1> [#uses=1]
+ br i1 %1, label %bb7.i, label %bb3.i
+
+bb7.i: ; preds = %bb5.i6, %bb.i1
+ br label %bb.i1
+}
diff --git a/test/CodeGen/X86/2010-02-04-SchedulerBug.ll b/test/CodeGen/X86/2010-02-04-SchedulerBug.ll
new file mode 100644
index 0000000..c966e21d
--- /dev/null
+++ b/test/CodeGen/X86/2010-02-04-SchedulerBug.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin11
+; rdar://7604000
+
+%struct.a_t = type { i8*, i64*, i8*, i32, i32, i64*, i64*, i64* }
+%struct.b_t = type { i32, i32, i32, i32, i64, i64, i64, i64 }
+
+define void @t(i32 %cNum, i64 %max) nounwind optsize ssp noimplicitfloat {
+entry:
+ %0 = load %struct.b_t** null, align 4 ; <%struct.b_t*> [#uses=1]
+ %1 = getelementptr inbounds %struct.b_t* %0, i32 %cNum, i32 5 ; <i64*> [#uses=1]
+ %2 = load i64* %1, align 4 ; <i64> [#uses=1]
+ %3 = icmp ult i64 %2, %max ; <i1> [#uses=1]
+ %4 = getelementptr inbounds %struct.a_t* null, i32 0, i32 7 ; <i64**> [#uses=1]
+ %5 = load i64** %4, align 4 ; <i64*> [#uses=0]
+ %6 = load i64* null, align 4 ; <i64> [#uses=1]
+ br i1 %3, label %bb2, label %bb
+
+bb: ; preds = %entry
+ br label %bb3
+
+bb2: ; preds = %entry
+ %7 = or i64 %6, undef ; <i64> [#uses=1]
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb
+ %misc_enables.0 = phi i64 [ undef, %bb ], [ %7, %bb2 ] ; <i64> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/3addr-16bit.ll b/test/CodeGen/X86/3addr-16bit.ll
new file mode 100644
index 0000000..c51247a
--- /dev/null
+++ b/test/CodeGen/X86/3addr-16bit.ll
@@ -0,0 +1,95 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -asm-verbose=false | FileCheck %s -check-prefix=64BIT
+; rdar://7329206
+
+; In 32-bit the partial register stall would degrade performance.
+
+define zeroext i16 @t1(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
+entry:
+; 32BIT: t1:
+; 32BIT: movw 20(%esp), %ax
+; 32BIT-NOT: movw %ax, %cx
+; 32BIT: leal 1(%eax), %ecx
+
+; 64BIT: t1:
+; 64BIT-NOT: movw %si, %ax
+; 64BIT: leal 1(%rsi), %eax
+ %0 = icmp eq i16 %k, %c ; <i1> [#uses=1]
+ %1 = add i16 %k, 1 ; <i16> [#uses=3]
+ br i1 %0, label %bb, label %bb1
+
+bb: ; preds = %entry
+ tail call void @foo(i16 zeroext %1) nounwind
+ ret i16 %1
+
+bb1: ; preds = %entry
+ ret i16 %1
+}
+
+define zeroext i16 @t2(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
+entry:
+; 32BIT: t2:
+; 32BIT: movw 20(%esp), %ax
+; 32BIT-NOT: movw %ax, %cx
+; 32BIT: leal -1(%eax), %ecx
+
+; 64BIT: t2:
+; 64BIT-NOT: movw %si, %ax
+; 64BIT: leal -1(%rsi), %eax
+ %0 = icmp eq i16 %k, %c ; <i1> [#uses=1]
+ %1 = add i16 %k, -1 ; <i16> [#uses=3]
+ br i1 %0, label %bb, label %bb1
+
+bb: ; preds = %entry
+ tail call void @foo(i16 zeroext %1) nounwind
+ ret i16 %1
+
+bb1: ; preds = %entry
+ ret i16 %1
+}
+
+declare void @foo(i16 zeroext)
+
+define zeroext i16 @t3(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
+entry:
+; 32BIT: t3:
+; 32BIT: movw 20(%esp), %ax
+; 32BIT-NOT: movw %ax, %cx
+; 32BIT: leal 2(%eax), %ecx
+
+; 64BIT: t3:
+; 64BIT-NOT: movw %si, %ax
+; 64BIT: leal 2(%rsi), %eax
+ %0 = add i16 %k, 2 ; <i16> [#uses=3]
+ %1 = icmp eq i16 %k, %c ; <i1> [#uses=1]
+ br i1 %1, label %bb, label %bb1
+
+bb: ; preds = %entry
+ tail call void @foo(i16 zeroext %0) nounwind
+ ret i16 %0
+
+bb1: ; preds = %entry
+ ret i16 %0
+}
+
+define zeroext i16 @t4(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
+entry:
+; 32BIT: t4:
+; 32BIT: movw 16(%esp), %ax
+; 32BIT: movw 20(%esp), %cx
+; 32BIT-NOT: movw %cx, %dx
+; 32BIT: leal (%ecx,%eax), %edx
+
+; 64BIT: t4:
+; 64BIT-NOT: movw %si, %ax
+; 64BIT: leal (%rsi,%rdi), %eax
+ %0 = add i16 %k, %c ; <i16> [#uses=3]
+ %1 = icmp eq i16 %k, %c ; <i1> [#uses=1]
+ br i1 %1, label %bb, label %bb1
+
+bb: ; preds = %entry
+ tail call void @foo(i16 zeroext %0) nounwind
+ ret i16 %0
+
+bb1: ; preds = %entry
+ ret i16 %0
+}
diff --git a/test/CodeGen/X86/3addr-or.ll b/test/CodeGen/X86/3addr-or.ll
new file mode 100644
index 0000000..30a1f36
--- /dev/null
+++ b/test/CodeGen/X86/3addr-or.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; rdar://7527734
+
+define i32 @test(i32 %x) nounwind readnone ssp {
+entry:
+; CHECK: test:
+; CHECK: leal 3(%rdi), %eax
+ %0 = shl i32 %x, 5 ; <i32> [#uses=1]
+ %1 = or i32 %0, 3 ; <i32> [#uses=1]
+ ret i32 %1
+}
+
+define i64 @test2(i8 %A, i8 %B) nounwind {
+; CHECK: test2:
+; CHECK: shrq $4
+; CHECK-NOT: movq
+; CHECK-NOT: orq
+; CHECK: leaq
+; CHECK: ret
+ %C = zext i8 %A to i64 ; <i64> [#uses=1]
+ %D = shl i64 %C, 4 ; <i64> [#uses=1]
+ %E = and i64 %D, 48 ; <i64> [#uses=1]
+ %F = zext i8 %B to i64 ; <i64> [#uses=1]
+ %G = lshr i64 %F, 4 ; <i64> [#uses=1]
+ %H = or i64 %G, %E ; <i64> [#uses=1]
+ ret i64 %H
+}
diff --git a/test/CodeGen/X86/Atomics-32.ll b/test/CodeGen/X86/Atomics-32.ll
new file mode 100644
index 0000000..0e9b73e
--- /dev/null
+++ b/test/CodeGen/X86/Atomics-32.ll
@@ -0,0 +1,818 @@
+; RUN: llc < %s -march=x86 > %t
+;; Note the 64-bit variants are not supported yet (in 32-bit mode).
+; ModuleID = 'Atomics.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@sc = common global i8 0 ; <i8*> [#uses=52]
+@uc = common global i8 0 ; <i8*> [#uses=100]
+@ss = common global i16 0 ; <i16*> [#uses=15]
+@us = common global i16 0 ; <i16*> [#uses=15]
+@si = common global i32 0 ; <i32*> [#uses=15]
+@ui = common global i32 0 ; <i32*> [#uses=23]
+@sl = common global i32 0 ; <i32*> [#uses=15]
+@ul = common global i32 0 ; <i32*> [#uses=15]
+
+define void @test_op_ignore() nounwind {
+entry:
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=0]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %10, i32 1 ) ; <i32>:11 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %12, i32 1 ) ; <i32>:13 [#uses=0]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:14 [#uses=0]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:15 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:16 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %16, i16 1 ) ; <i16>:17 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %18, i16 1 ) ; <i16>:19 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %20, i32 1 ) ; <i32>:21 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:22 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %22, i32 1 ) ; <i32>:23 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:24 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %24, i32 1 ) ; <i32>:25 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:26 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %26, i32 1 ) ; <i32>:27 [#uses=0]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:28 [#uses=0]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:29 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:30 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %30, i16 1 ) ; <i16>:31 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:32 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %32, i16 1 ) ; <i16>:33 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:34 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %34, i32 1 ) ; <i32>:35 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:36 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %36, i32 1 ) ; <i32>:37 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:38 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %38, i32 1 ) ; <i32>:39 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:40 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %40, i32 1 ) ; <i32>:41 [#uses=0]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:42 [#uses=0]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:43 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %44, i16 1 ) ; <i16>:45 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:46 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %46, i16 1 ) ; <i16>:47 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:48 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %48, i32 1 ) ; <i32>:49 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:50 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %50, i32 1 ) ; <i32>:51 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:52 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %52, i32 1 ) ; <i32>:53 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:54 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %54, i32 1 ) ; <i32>:55 [#uses=0]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:56 [#uses=0]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:57 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %58, i16 1 ) ; <i16>:59 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %60, i16 1 ) ; <i16>:61 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:62 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %62, i32 1 ) ; <i32>:63 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:64 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %64, i32 1 ) ; <i32>:65 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:66 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %66, i32 1 ) ; <i32>:67 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:68 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %68, i32 1 ) ; <i32>:69 [#uses=0]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:70 [#uses=0]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:71 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:72 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %72, i16 1 ) ; <i16>:73 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:74 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %74, i16 1 ) ; <i16>:75 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %76, i32 1 ) ; <i32>:77 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:78 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %78, i32 1 ) ; <i32>:79 [#uses=0]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:80 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %80, i32 1 ) ; <i32>:81 [#uses=0]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:82 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %82, i32 1 ) ; <i32>:83 [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.add.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.sub.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.sub.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.or.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.or.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.xor.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.xor.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.and.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.and.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
+
+declare i8 @llvm.atomic.load.nand.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.nand.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.nand.i32.p0i32(i32*, i32) nounwind
+
+define void @test_fetch_and_op() nounwind {
+entry:
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:0 [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:1 [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 11 ) ; <i16>:3 [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 11 ) ; <i16>:5 [#uses=1]
+ store i16 %5, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 11 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 11 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %10, i32 11 ) ; <i32>:11 [#uses=1]
+ store i32 %11, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %12, i32 11 ) ; <i32>:13 [#uses=1]
+ store i32 %13, i32* @ul, align 4
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:14 [#uses=1]
+ store i8 %14, i8* @sc, align 1
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:15 [#uses=1]
+ store i8 %15, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:16 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %16, i16 11 ) ; <i16>:17 [#uses=1]
+ store i16 %17, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %18, i16 11 ) ; <i16>:19 [#uses=1]
+ store i16 %19, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %20, i32 11 ) ; <i32>:21 [#uses=1]
+ store i32 %21, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:22 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %22, i32 11 ) ; <i32>:23 [#uses=1]
+ store i32 %23, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:24 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %24, i32 11 ) ; <i32>:25 [#uses=1]
+ store i32 %25, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:26 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %26, i32 11 ) ; <i32>:27 [#uses=1]
+ store i32 %27, i32* @ul, align 4
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:28 [#uses=1]
+ store i8 %28, i8* @sc, align 1
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:29 [#uses=1]
+ store i8 %29, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:30 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %30, i16 11 ) ; <i16>:31 [#uses=1]
+ store i16 %31, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:32 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %32, i16 11 ) ; <i16>:33 [#uses=1]
+ store i16 %33, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:34 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %34, i32 11 ) ; <i32>:35 [#uses=1]
+ store i32 %35, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:36 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %36, i32 11 ) ; <i32>:37 [#uses=1]
+ store i32 %37, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:38 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %38, i32 11 ) ; <i32>:39 [#uses=1]
+ store i32 %39, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:40 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %40, i32 11 ) ; <i32>:41 [#uses=1]
+ store i32 %41, i32* @ul, align 4
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:42 [#uses=1]
+ store i8 %42, i8* @sc, align 1
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:43 [#uses=1]
+ store i8 %43, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:44 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %44, i16 11 ) ; <i16>:45 [#uses=1]
+ store i16 %45, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:46 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %46, i16 11 ) ; <i16>:47 [#uses=1]
+ store i16 %47, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:48 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %48, i32 11 ) ; <i32>:49 [#uses=1]
+ store i32 %49, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:50 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %50, i32 11 ) ; <i32>:51 [#uses=1]
+ store i32 %51, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:52 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %52, i32 11 ) ; <i32>:53 [#uses=1]
+ store i32 %53, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:54 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %54, i32 11 ) ; <i32>:55 [#uses=1]
+ store i32 %55, i32* @ul, align 4
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:56 [#uses=1]
+ store i8 %56, i8* @sc, align 1
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:57 [#uses=1]
+ store i8 %57, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %58, i16 11 ) ; <i16>:59 [#uses=1]
+ store i16 %59, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %60, i16 11 ) ; <i16>:61 [#uses=1]
+ store i16 %61, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:62 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %62, i32 11 ) ; <i32>:63 [#uses=1]
+ store i32 %63, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:64 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %64, i32 11 ) ; <i32>:65 [#uses=1]
+ store i32 %65, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:66 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %66, i32 11 ) ; <i32>:67 [#uses=1]
+ store i32 %67, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:68 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %68, i32 11 ) ; <i32>:69 [#uses=1]
+ store i32 %69, i32* @ul, align 4
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:70 [#uses=1]
+ store i8 %70, i8* @sc, align 1
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:71 [#uses=1]
+ store i8 %71, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:72 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %72, i16 11 ) ; <i16>:73 [#uses=1]
+ store i16 %73, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:74 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %74, i16 11 ) ; <i16>:75 [#uses=1]
+ store i16 %75, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %76, i32 11 ) ; <i32>:77 [#uses=1]
+ store i32 %77, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:78 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %78, i32 11 ) ; <i32>:79 [#uses=1]
+ store i32 %79, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:80 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %80, i32 11 ) ; <i32>:81 [#uses=1]
+ store i32 %81, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:82 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %82, i32 11 ) ; <i32>:83 [#uses=1]
+ store i32 %83, i32* @ul, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_op_and_fetch() nounwind {
+entry:
+ load i8* @uc, align 1 ; <i8>:0 [#uses=1]
+ zext i8 %0 to i32 ; <i32>:1 [#uses=1]
+ trunc i32 %1 to i8 ; <i8>:2 [#uses=2]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 %2 ) ; <i8>:3 [#uses=1]
+ add i8 %3, %2 ; <i8>:4 [#uses=1]
+ store i8 %4, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:5 [#uses=1]
+ zext i8 %5 to i32 ; <i32>:6 [#uses=1]
+ trunc i32 %6 to i8 ; <i8>:7 [#uses=2]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 %7 ) ; <i8>:8 [#uses=1]
+ add i8 %8, %7 ; <i8>:9 [#uses=1]
+ store i8 %9, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:10 [#uses=1]
+ zext i8 %10 to i32 ; <i32>:11 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:12 [#uses=1]
+ trunc i32 %11 to i16 ; <i16>:13 [#uses=2]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %12, i16 %13 ) ; <i16>:14 [#uses=1]
+ add i16 %14, %13 ; <i16>:15 [#uses=1]
+ store i16 %15, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:16 [#uses=1]
+ zext i8 %16 to i32 ; <i32>:17 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
+ trunc i32 %17 to i16 ; <i16>:19 [#uses=2]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %18, i16 %19 ) ; <i16>:20 [#uses=1]
+ add i16 %20, %19 ; <i16>:21 [#uses=1]
+ store i16 %21, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:22 [#uses=1]
+ zext i8 %22 to i32 ; <i32>:23 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:24 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %24, i32 %23 ) ; <i32>:25 [#uses=1]
+ add i32 %25, %23 ; <i32>:26 [#uses=1]
+ store i32 %26, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:27 [#uses=1]
+ zext i8 %27 to i32 ; <i32>:28 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:29 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %29, i32 %28 ) ; <i32>:30 [#uses=1]
+ add i32 %30, %28 ; <i32>:31 [#uses=1]
+ store i32 %31, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:32 [#uses=1]
+ zext i8 %32 to i32 ; <i32>:33 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:34 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %34, i32 %33 ) ; <i32>:35 [#uses=1]
+ add i32 %35, %33 ; <i32>:36 [#uses=1]
+ store i32 %36, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:37 [#uses=1]
+ zext i8 %37 to i32 ; <i32>:38 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:39 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %39, i32 %38 ) ; <i32>:40 [#uses=1]
+ add i32 %40, %38 ; <i32>:41 [#uses=1]
+ store i32 %41, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:42 [#uses=1]
+ zext i8 %42 to i32 ; <i32>:43 [#uses=1]
+ trunc i32 %43 to i8 ; <i8>:44 [#uses=2]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 %44 ) ; <i8>:45 [#uses=1]
+ sub i8 %45, %44 ; <i8>:46 [#uses=1]
+ store i8 %46, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:47 [#uses=1]
+ zext i8 %47 to i32 ; <i32>:48 [#uses=1]
+ trunc i32 %48 to i8 ; <i8>:49 [#uses=2]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 %49 ) ; <i8>:50 [#uses=1]
+ sub i8 %50, %49 ; <i8>:51 [#uses=1]
+ store i8 %51, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:52 [#uses=1]
+ zext i8 %52 to i32 ; <i32>:53 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:54 [#uses=1]
+ trunc i32 %53 to i16 ; <i16>:55 [#uses=2]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %54, i16 %55 ) ; <i16>:56 [#uses=1]
+ sub i16 %56, %55 ; <i16>:57 [#uses=1]
+ store i16 %57, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:58 [#uses=1]
+ zext i8 %58 to i32 ; <i32>:59 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:60 [#uses=1]
+ trunc i32 %59 to i16 ; <i16>:61 [#uses=2]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %60, i16 %61 ) ; <i16>:62 [#uses=1]
+ sub i16 %62, %61 ; <i16>:63 [#uses=1]
+ store i16 %63, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:64 [#uses=1]
+ zext i8 %64 to i32 ; <i32>:65 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:66 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %66, i32 %65 ) ; <i32>:67 [#uses=1]
+ sub i32 %67, %65 ; <i32>:68 [#uses=1]
+ store i32 %68, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:69 [#uses=1]
+ zext i8 %69 to i32 ; <i32>:70 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:71 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %71, i32 %70 ) ; <i32>:72 [#uses=1]
+ sub i32 %72, %70 ; <i32>:73 [#uses=1]
+ store i32 %73, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:74 [#uses=1]
+ zext i8 %74 to i32 ; <i32>:75 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %76, i32 %75 ) ; <i32>:77 [#uses=1]
+ sub i32 %77, %75 ; <i32>:78 [#uses=1]
+ store i32 %78, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:79 [#uses=1]
+ zext i8 %79 to i32 ; <i32>:80 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:81 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %81, i32 %80 ) ; <i32>:82 [#uses=1]
+ sub i32 %82, %80 ; <i32>:83 [#uses=1]
+ store i32 %83, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:84 [#uses=1]
+ zext i8 %84 to i32 ; <i32>:85 [#uses=1]
+ trunc i32 %85 to i8 ; <i8>:86 [#uses=2]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 %86 ) ; <i8>:87 [#uses=1]
+ or i8 %87, %86 ; <i8>:88 [#uses=1]
+ store i8 %88, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:89 [#uses=1]
+ zext i8 %89 to i32 ; <i32>:90 [#uses=1]
+ trunc i32 %90 to i8 ; <i8>:91 [#uses=2]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 %91 ) ; <i8>:92 [#uses=1]
+ or i8 %92, %91 ; <i8>:93 [#uses=1]
+ store i8 %93, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:94 [#uses=1]
+ zext i8 %94 to i32 ; <i32>:95 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:96 [#uses=1]
+ trunc i32 %95 to i16 ; <i16>:97 [#uses=2]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %96, i16 %97 ) ; <i16>:98 [#uses=1]
+ or i16 %98, %97 ; <i16>:99 [#uses=1]
+ store i16 %99, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:100 [#uses=1]
+ zext i8 %100 to i32 ; <i32>:101 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:102 [#uses=1]
+ trunc i32 %101 to i16 ; <i16>:103 [#uses=2]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %102, i16 %103 ) ; <i16>:104 [#uses=1]
+ or i16 %104, %103 ; <i16>:105 [#uses=1]
+ store i16 %105, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:106 [#uses=1]
+ zext i8 %106 to i32 ; <i32>:107 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:108 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %108, i32 %107 ) ; <i32>:109 [#uses=1]
+ or i32 %109, %107 ; <i32>:110 [#uses=1]
+ store i32 %110, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:111 [#uses=1]
+ zext i8 %111 to i32 ; <i32>:112 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:113 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %113, i32 %112 ) ; <i32>:114 [#uses=1]
+ or i32 %114, %112 ; <i32>:115 [#uses=1]
+ store i32 %115, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:116 [#uses=1]
+ zext i8 %116 to i32 ; <i32>:117 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:118 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %118, i32 %117 ) ; <i32>:119 [#uses=1]
+ or i32 %119, %117 ; <i32>:120 [#uses=1]
+ store i32 %120, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:121 [#uses=1]
+ zext i8 %121 to i32 ; <i32>:122 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:123 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %123, i32 %122 ) ; <i32>:124 [#uses=1]
+ or i32 %124, %122 ; <i32>:125 [#uses=1]
+ store i32 %125, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:126 [#uses=1]
+ zext i8 %126 to i32 ; <i32>:127 [#uses=1]
+ trunc i32 %127 to i8 ; <i8>:128 [#uses=2]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 %128 ) ; <i8>:129 [#uses=1]
+ xor i8 %129, %128 ; <i8>:130 [#uses=1]
+ store i8 %130, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:131 [#uses=1]
+ zext i8 %131 to i32 ; <i32>:132 [#uses=1]
+ trunc i32 %132 to i8 ; <i8>:133 [#uses=2]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 %133 ) ; <i8>:134 [#uses=1]
+ xor i8 %134, %133 ; <i8>:135 [#uses=1]
+ store i8 %135, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:136 [#uses=1]
+ zext i8 %136 to i32 ; <i32>:137 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:138 [#uses=1]
+ trunc i32 %137 to i16 ; <i16>:139 [#uses=2]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %138, i16 %139 ) ; <i16>:140 [#uses=1]
+ xor i16 %140, %139 ; <i16>:141 [#uses=1]
+ store i16 %141, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:142 [#uses=1]
+ zext i8 %142 to i32 ; <i32>:143 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:144 [#uses=1]
+ trunc i32 %143 to i16 ; <i16>:145 [#uses=2]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %144, i16 %145 ) ; <i16>:146 [#uses=1]
+ xor i16 %146, %145 ; <i16>:147 [#uses=1]
+ store i16 %147, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:148 [#uses=1]
+ zext i8 %148 to i32 ; <i32>:149 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:150 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %150, i32 %149 ) ; <i32>:151 [#uses=1]
+ xor i32 %151, %149 ; <i32>:152 [#uses=1]
+ store i32 %152, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:153 [#uses=1]
+ zext i8 %153 to i32 ; <i32>:154 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:155 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %155, i32 %154 ) ; <i32>:156 [#uses=1]
+ xor i32 %156, %154 ; <i32>:157 [#uses=1]
+ store i32 %157, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:158 [#uses=1]
+ zext i8 %158 to i32 ; <i32>:159 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:160 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %160, i32 %159 ) ; <i32>:161 [#uses=1]
+ xor i32 %161, %159 ; <i32>:162 [#uses=1]
+ store i32 %162, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:163 [#uses=1]
+ zext i8 %163 to i32 ; <i32>:164 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:165 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %165, i32 %164 ) ; <i32>:166 [#uses=1]
+ xor i32 %166, %164 ; <i32>:167 [#uses=1]
+ store i32 %167, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:168 [#uses=1]
+ zext i8 %168 to i32 ; <i32>:169 [#uses=1]
+ trunc i32 %169 to i8 ; <i8>:170 [#uses=2]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 %170 ) ; <i8>:171 [#uses=1]
+ and i8 %171, %170 ; <i8>:172 [#uses=1]
+ store i8 %172, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:173 [#uses=1]
+ zext i8 %173 to i32 ; <i32>:174 [#uses=1]
+ trunc i32 %174 to i8 ; <i8>:175 [#uses=2]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 %175 ) ; <i8>:176 [#uses=1]
+ and i8 %176, %175 ; <i8>:177 [#uses=1]
+ store i8 %177, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:178 [#uses=1]
+ zext i8 %178 to i32 ; <i32>:179 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:180 [#uses=1]
+ trunc i32 %179 to i16 ; <i16>:181 [#uses=2]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %180, i16 %181 ) ; <i16>:182 [#uses=1]
+ and i16 %182, %181 ; <i16>:183 [#uses=1]
+ store i16 %183, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:184 [#uses=1]
+ zext i8 %184 to i32 ; <i32>:185 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:186 [#uses=1]
+ trunc i32 %185 to i16 ; <i16>:187 [#uses=2]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %186, i16 %187 ) ; <i16>:188 [#uses=1]
+ and i16 %188, %187 ; <i16>:189 [#uses=1]
+ store i16 %189, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:190 [#uses=1]
+ zext i8 %190 to i32 ; <i32>:191 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:192 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %192, i32 %191 ) ; <i32>:193 [#uses=1]
+ and i32 %193, %191 ; <i32>:194 [#uses=1]
+ store i32 %194, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:195 [#uses=1]
+ zext i8 %195 to i32 ; <i32>:196 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:197 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %197, i32 %196 ) ; <i32>:198 [#uses=1]
+ and i32 %198, %196 ; <i32>:199 [#uses=1]
+ store i32 %199, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:200 [#uses=1]
+ zext i8 %200 to i32 ; <i32>:201 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:202 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %202, i32 %201 ) ; <i32>:203 [#uses=1]
+ and i32 %203, %201 ; <i32>:204 [#uses=1]
+ store i32 %204, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:205 [#uses=1]
+ zext i8 %205 to i32 ; <i32>:206 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:207 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %207, i32 %206 ) ; <i32>:208 [#uses=1]
+ and i32 %208, %206 ; <i32>:209 [#uses=1]
+ store i32 %209, i32* @ul, align 4
+ load i8* @uc, align 1 ; <i8>:210 [#uses=1]
+ zext i8 %210 to i32 ; <i32>:211 [#uses=1]
+ trunc i32 %211 to i8 ; <i8>:212 [#uses=2]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 %212 ) ; <i8>:213 [#uses=1]
+ xor i8 %213, -1 ; <i8>:214 [#uses=1]
+ and i8 %214, %212 ; <i8>:215 [#uses=1]
+ store i8 %215, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:216 [#uses=1]
+ zext i8 %216 to i32 ; <i32>:217 [#uses=1]
+ trunc i32 %217 to i8 ; <i8>:218 [#uses=2]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 %218 ) ; <i8>:219 [#uses=1]
+ xor i8 %219, -1 ; <i8>:220 [#uses=1]
+ and i8 %220, %218 ; <i8>:221 [#uses=1]
+ store i8 %221, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:222 [#uses=1]
+ zext i8 %222 to i32 ; <i32>:223 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:224 [#uses=1]
+ trunc i32 %223 to i16 ; <i16>:225 [#uses=2]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %224, i16 %225 ) ; <i16>:226 [#uses=1]
+ xor i16 %226, -1 ; <i16>:227 [#uses=1]
+ and i16 %227, %225 ; <i16>:228 [#uses=1]
+ store i16 %228, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:229 [#uses=1]
+ zext i8 %229 to i32 ; <i32>:230 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:231 [#uses=1]
+ trunc i32 %230 to i16 ; <i16>:232 [#uses=2]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %231, i16 %232 ) ; <i16>:233 [#uses=1]
+ xor i16 %233, -1 ; <i16>:234 [#uses=1]
+ and i16 %234, %232 ; <i16>:235 [#uses=1]
+ store i16 %235, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:236 [#uses=1]
+ zext i8 %236 to i32 ; <i32>:237 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:238 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %238, i32 %237 ) ; <i32>:239 [#uses=1]
+ xor i32 %239, -1 ; <i32>:240 [#uses=1]
+ and i32 %240, %237 ; <i32>:241 [#uses=1]
+ store i32 %241, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:242 [#uses=1]
+ zext i8 %242 to i32 ; <i32>:243 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:244 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %244, i32 %243 ) ; <i32>:245 [#uses=1]
+ xor i32 %245, -1 ; <i32>:246 [#uses=1]
+ and i32 %246, %243 ; <i32>:247 [#uses=1]
+ store i32 %247, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:248 [#uses=1]
+ zext i8 %248 to i32 ; <i32>:249 [#uses=2]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:250 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %250, i32 %249 ) ; <i32>:251 [#uses=1]
+ xor i32 %251, -1 ; <i32>:252 [#uses=1]
+ and i32 %252, %249 ; <i32>:253 [#uses=1]
+ store i32 %253, i32* @sl, align 4
+ load i8* @uc, align 1 ; <i8>:254 [#uses=1]
+ zext i8 %254 to i32 ; <i32>:255 [#uses=2]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:256 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %256, i32 %255 ) ; <i32>:257 [#uses=1]
+ xor i32 %257, -1 ; <i32>:258 [#uses=1]
+ and i32 %258, %255 ; <i32>:259 [#uses=1]
+ store i32 %259, i32* @ul, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_compare_and_swap() nounwind {
+entry:
+ load i8* @sc, align 1 ; <i8>:0 [#uses=1]
+ zext i8 %0 to i32 ; <i32>:1 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:2 [#uses=1]
+ zext i8 %2 to i32 ; <i32>:3 [#uses=1]
+ trunc i32 %3 to i8 ; <i8>:4 [#uses=1]
+ trunc i32 %1 to i8 ; <i8>:5 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %4, i8 %5 ) ; <i8>:6 [#uses=1]
+ store i8 %6, i8* @sc, align 1
+ load i8* @sc, align 1 ; <i8>:7 [#uses=1]
+ zext i8 %7 to i32 ; <i32>:8 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:9 [#uses=1]
+ zext i8 %9 to i32 ; <i32>:10 [#uses=1]
+ trunc i32 %10 to i8 ; <i8>:11 [#uses=1]
+ trunc i32 %8 to i8 ; <i8>:12 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %11, i8 %12 ) ; <i8>:13 [#uses=1]
+ store i8 %13, i8* @uc, align 1
+ load i8* @sc, align 1 ; <i8>:14 [#uses=1]
+ sext i8 %14 to i16 ; <i16>:15 [#uses=1]
+ zext i16 %15 to i32 ; <i32>:16 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:17 [#uses=1]
+ zext i8 %17 to i32 ; <i32>:18 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:19 [#uses=1]
+ trunc i32 %18 to i16 ; <i16>:20 [#uses=1]
+ trunc i32 %16 to i16 ; <i16>:21 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %19, i16 %20, i16 %21 ) ; <i16>:22 [#uses=1]
+ store i16 %22, i16* @ss, align 2
+ load i8* @sc, align 1 ; <i8>:23 [#uses=1]
+ sext i8 %23 to i16 ; <i16>:24 [#uses=1]
+ zext i16 %24 to i32 ; <i32>:25 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:26 [#uses=1]
+ zext i8 %26 to i32 ; <i32>:27 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:28 [#uses=1]
+ trunc i32 %27 to i16 ; <i16>:29 [#uses=1]
+ trunc i32 %25 to i16 ; <i16>:30 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %28, i16 %29, i16 %30 ) ; <i16>:31 [#uses=1]
+ store i16 %31, i16* @us, align 2
+ load i8* @sc, align 1 ; <i8>:32 [#uses=1]
+ sext i8 %32 to i32 ; <i32>:33 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:34 [#uses=1]
+ zext i8 %34 to i32 ; <i32>:35 [#uses=1]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:36 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %36, i32 %35, i32 %33 ) ; <i32>:37 [#uses=1]
+ store i32 %37, i32* @si, align 4
+ load i8* @sc, align 1 ; <i8>:38 [#uses=1]
+ sext i8 %38 to i32 ; <i32>:39 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:40 [#uses=1]
+ zext i8 %40 to i32 ; <i32>:41 [#uses=1]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:42 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %42, i32 %41, i32 %39 ) ; <i32>:43 [#uses=1]
+ store i32 %43, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:44 [#uses=1]
+ sext i8 %44 to i32 ; <i32>:45 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:46 [#uses=1]
+ zext i8 %46 to i32 ; <i32>:47 [#uses=1]
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:48 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %48, i32 %47, i32 %45 ) ; <i32>:49 [#uses=1]
+ store i32 %49, i32* @sl, align 4
+ load i8* @sc, align 1 ; <i8>:50 [#uses=1]
+ sext i8 %50 to i32 ; <i32>:51 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:52 [#uses=1]
+ zext i8 %52 to i32 ; <i32>:53 [#uses=1]
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:54 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %54, i32 %53, i32 %51 ) ; <i32>:55 [#uses=1]
+ store i32 %55, i32* @ul, align 4
+ load i8* @sc, align 1 ; <i8>:56 [#uses=1]
+ zext i8 %56 to i32 ; <i32>:57 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:58 [#uses=1]
+ zext i8 %58 to i32 ; <i32>:59 [#uses=1]
+ trunc i32 %59 to i8 ; <i8>:60 [#uses=2]
+ trunc i32 %57 to i8 ; <i8>:61 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %60, i8 %61 ) ; <i8>:62 [#uses=1]
+ icmp eq i8 %62, %60 ; <i1>:63 [#uses=1]
+ zext i1 %63 to i8 ; <i8>:64 [#uses=1]
+ zext i8 %64 to i32 ; <i32>:65 [#uses=1]
+ store i32 %65, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:66 [#uses=1]
+ zext i8 %66 to i32 ; <i32>:67 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:68 [#uses=1]
+ zext i8 %68 to i32 ; <i32>:69 [#uses=1]
+ trunc i32 %69 to i8 ; <i8>:70 [#uses=2]
+ trunc i32 %67 to i8 ; <i8>:71 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %70, i8 %71 ) ; <i8>:72 [#uses=1]
+ icmp eq i8 %72, %70 ; <i1>:73 [#uses=1]
+ zext i1 %73 to i8 ; <i8>:74 [#uses=1]
+ zext i8 %74 to i32 ; <i32>:75 [#uses=1]
+ store i32 %75, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:76 [#uses=1]
+ sext i8 %76 to i16 ; <i16>:77 [#uses=1]
+ zext i16 %77 to i32 ; <i32>:78 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:79 [#uses=1]
+ zext i8 %79 to i32 ; <i32>:80 [#uses=1]
+ trunc i32 %80 to i8 ; <i8>:81 [#uses=2]
+ trunc i32 %78 to i8 ; <i8>:82 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i16* @ss to i8*), i8 %81, i8 %82 ) ; <i8>:83 [#uses=1]
+ icmp eq i8 %83, %81 ; <i1>:84 [#uses=1]
+ zext i1 %84 to i8 ; <i8>:85 [#uses=1]
+ zext i8 %85 to i32 ; <i32>:86 [#uses=1]
+ store i32 %86, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:87 [#uses=1]
+ sext i8 %87 to i16 ; <i16>:88 [#uses=1]
+ zext i16 %88 to i32 ; <i32>:89 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:90 [#uses=1]
+ zext i8 %90 to i32 ; <i32>:91 [#uses=1]
+ trunc i32 %91 to i8 ; <i8>:92 [#uses=2]
+ trunc i32 %89 to i8 ; <i8>:93 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i16* @us to i8*), i8 %92, i8 %93 ) ; <i8>:94 [#uses=1]
+ icmp eq i8 %94, %92 ; <i1>:95 [#uses=1]
+ zext i1 %95 to i8 ; <i8>:96 [#uses=1]
+ zext i8 %96 to i32 ; <i32>:97 [#uses=1]
+ store i32 %97, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:98 [#uses=1]
+ sext i8 %98 to i32 ; <i32>:99 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:100 [#uses=1]
+ zext i8 %100 to i32 ; <i32>:101 [#uses=1]
+ trunc i32 %101 to i8 ; <i8>:102 [#uses=2]
+ trunc i32 %99 to i8 ; <i8>:103 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i32* @si to i8*), i8 %102, i8 %103 ) ; <i8>:104 [#uses=1]
+ icmp eq i8 %104, %102 ; <i1>:105 [#uses=1]
+ zext i1 %105 to i8 ; <i8>:106 [#uses=1]
+ zext i8 %106 to i32 ; <i32>:107 [#uses=1]
+ store i32 %107, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:108 [#uses=1]
+ sext i8 %108 to i32 ; <i32>:109 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:110 [#uses=1]
+ zext i8 %110 to i32 ; <i32>:111 [#uses=1]
+ trunc i32 %111 to i8 ; <i8>:112 [#uses=2]
+ trunc i32 %109 to i8 ; <i8>:113 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i32* @ui to i8*), i8 %112, i8 %113 ) ; <i8>:114 [#uses=1]
+ icmp eq i8 %114, %112 ; <i1>:115 [#uses=1]
+ zext i1 %115 to i8 ; <i8>:116 [#uses=1]
+ zext i8 %116 to i32 ; <i32>:117 [#uses=1]
+ store i32 %117, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:118 [#uses=1]
+ sext i8 %118 to i32 ; <i32>:119 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:120 [#uses=1]
+ zext i8 %120 to i32 ; <i32>:121 [#uses=1]
+ trunc i32 %121 to i8 ; <i8>:122 [#uses=2]
+ trunc i32 %119 to i8 ; <i8>:123 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i32* @sl to i8*), i8 %122, i8 %123 ) ; <i8>:124 [#uses=1]
+ icmp eq i8 %124, %122 ; <i1>:125 [#uses=1]
+ zext i1 %125 to i8 ; <i8>:126 [#uses=1]
+ zext i8 %126 to i32 ; <i32>:127 [#uses=1]
+ store i32 %127, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:128 [#uses=1]
+ sext i8 %128 to i32 ; <i32>:129 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:130 [#uses=1]
+ zext i8 %130 to i32 ; <i32>:131 [#uses=1]
+ trunc i32 %131 to i8 ; <i8>:132 [#uses=2]
+ trunc i32 %129 to i8 ; <i8>:133 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i32* @ul to i8*), i8 %132, i8 %133 ) ; <i8>:134 [#uses=1]
+ icmp eq i8 %134, %132 ; <i1>:135 [#uses=1]
+ zext i1 %135 to i8 ; <i8>:136 [#uses=1]
+ zext i8 %136 to i32 ; <i32>:137 [#uses=1]
+ store i32 %137, i32* @ui, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8*, i8, i8) nounwind
+
+declare i16 @llvm.atomic.cmp.swap.i16.p0i16(i16*, i16, i16) nounwind
+
+declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind
+
+define void @test_lock() nounwind {
+entry:
+ call i8 @llvm.atomic.swap.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ call i8 @llvm.atomic.swap.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.swap.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.swap.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=1]
+ store i16 %5, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:10 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %10, i32 1 ) ; <i32>:11 [#uses=1]
+ store i32 %11, i32* @sl, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:12 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %12, i32 1 ) ; <i32>:13 [#uses=1]
+ store i32 %13, i32* @ul, align 4
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true, i1 false )
+ volatile store i8 0, i8* @sc, align 1
+ volatile store i8 0, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:14 [#uses=1]
+ volatile store i16 0, i16* %14, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:15 [#uses=1]
+ volatile store i16 0, i16* %15, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:16 [#uses=1]
+ volatile store i32 0, i32* %16, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:17 [#uses=1]
+ volatile store i32 0, i32* %17, align 4
+ bitcast i8* bitcast (i32* @sl to i8*) to i32* ; <i32*>:18 [#uses=1]
+ volatile store i32 0, i32* %18, align 4
+ bitcast i8* bitcast (i32* @ul to i8*) to i32* ; <i32*>:19 [#uses=1]
+ volatile store i32 0, i32* %19, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.swap.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.swap.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
diff --git a/test/CodeGen/X86/Atomics-64.ll b/test/CodeGen/X86/Atomics-64.ll
new file mode 100644
index 0000000..ac174b9
--- /dev/null
+++ b/test/CodeGen/X86/Atomics-64.ll
@@ -0,0 +1,1015 @@
+; RUN: llc < %s -march=x86-64 > %t
+; ModuleID = 'Atomics.c'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+@sc = common global i8 0 ; <i8*> [#uses=56]
+@uc = common global i8 0 ; <i8*> [#uses=116]
+@ss = common global i16 0 ; <i16*> [#uses=15]
+@us = common global i16 0 ; <i16*> [#uses=15]
+@si = common global i32 0 ; <i32*> [#uses=15]
+@ui = common global i32 0 ; <i32*> [#uses=25]
+@sl = common global i64 0 ; <i64*> [#uses=15]
+@ul = common global i64 0 ; <i64*> [#uses=15]
+@sll = common global i64 0 ; <i64*> [#uses=15]
+@ull = common global i64 0 ; <i64*> [#uses=15]
+
+define void @test_op_ignore() nounwind {
+entry:
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=0]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:10 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %10, i64 1 ) ; <i64>:11 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:12 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %12, i64 1 ) ; <i64>:13 [#uses=0]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:14 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %14, i64 1 ) ; <i64>:15 [#uses=0]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:16 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %16, i64 1 ) ; <i64>:17 [#uses=0]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:18 [#uses=0]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:19 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:20 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %20, i16 1 ) ; <i16>:21 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:22 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %22, i16 1 ) ; <i16>:23 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:24 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %24, i32 1 ) ; <i32>:25 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:26 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %26, i32 1 ) ; <i32>:27 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:28 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %28, i64 1 ) ; <i64>:29 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:30 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %30, i64 1 ) ; <i64>:31 [#uses=0]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:32 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %32, i64 1 ) ; <i64>:33 [#uses=0]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:34 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %34, i64 1 ) ; <i64>:35 [#uses=0]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:36 [#uses=0]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:37 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:38 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %38, i16 1 ) ; <i16>:39 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:40 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %40, i16 1 ) ; <i16>:41 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:42 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %42, i32 1 ) ; <i32>:43 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:44 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %44, i32 1 ) ; <i32>:45 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:46 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %46, i64 1 ) ; <i64>:47 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:48 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %48, i64 1 ) ; <i64>:49 [#uses=0]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:50 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %50, i64 1 ) ; <i64>:51 [#uses=0]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:52 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %52, i64 1 ) ; <i64>:53 [#uses=0]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:54 [#uses=0]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:55 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:56 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %56, i16 1 ) ; <i16>:57 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %58, i16 1 ) ; <i16>:59 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:60 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %60, i32 1 ) ; <i32>:61 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:62 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %62, i32 1 ) ; <i32>:63 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:64 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %64, i64 1 ) ; <i64>:65 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:66 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %66, i64 1 ) ; <i64>:67 [#uses=0]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:68 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %68, i64 1 ) ; <i64>:69 [#uses=0]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:70 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %70, i64 1 ) ; <i64>:71 [#uses=0]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:72 [#uses=0]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:73 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:74 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %74, i16 1 ) ; <i16>:75 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:76 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %76, i16 1 ) ; <i16>:77 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:78 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %78, i32 1 ) ; <i32>:79 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:80 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %80, i32 1 ) ; <i32>:81 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:82 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %82, i64 1 ) ; <i64>:83 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:84 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %84, i64 1 ) ; <i64>:85 [#uses=0]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:86 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %86, i64 1 ) ; <i64>:87 [#uses=0]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:88 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %88, i64 1 ) ; <i64>:89 [#uses=0]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:90 [#uses=0]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:91 [#uses=0]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:92 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %92, i16 1 ) ; <i16>:93 [#uses=0]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:94 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %94, i16 1 ) ; <i16>:95 [#uses=0]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:96 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %96, i32 1 ) ; <i32>:97 [#uses=0]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:98 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %98, i32 1 ) ; <i32>:99 [#uses=0]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:100 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %100, i64 1 ) ; <i64>:101 [#uses=0]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:102 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %102, i64 1 ) ; <i64>:103 [#uses=0]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:104 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %104, i64 1 ) ; <i64>:105 [#uses=0]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:106 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %106, i64 1 ) ; <i64>:107 [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.add.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.add.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.sub.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.sub.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.sub.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.or.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.or.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.or.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.xor.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.xor.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.xor.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.and.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.and.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.and.i64.p0i64(i64*, i64) nounwind
+
+declare i8 @llvm.atomic.load.nand.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.load.nand.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.load.nand.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.load.nand.i64.p0i64(i64*, i64) nounwind
+
+define void @test_fetch_and_op() nounwind {
+entry:
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:0 [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:1 [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %2, i16 11 ) ; <i16>:3 [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %4, i16 11 ) ; <i16>:5 [#uses=1]
+ store i16 %5, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %6, i32 11 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %8, i32 11 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:10 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %10, i64 11 ) ; <i64>:11 [#uses=1]
+ store i64 %11, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:12 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %12, i64 11 ) ; <i64>:13 [#uses=1]
+ store i64 %13, i64* @ul, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:14 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %14, i64 11 ) ; <i64>:15 [#uses=1]
+ store i64 %15, i64* @sll, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:16 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %16, i64 11 ) ; <i64>:17 [#uses=1]
+ store i64 %17, i64* @ull, align 8
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:18 [#uses=1]
+ store i8 %18, i8* @sc, align 1
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:19 [#uses=1]
+ store i8 %19, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:20 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %20, i16 11 ) ; <i16>:21 [#uses=1]
+ store i16 %21, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:22 [#uses=1]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %22, i16 11 ) ; <i16>:23 [#uses=1]
+ store i16 %23, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:24 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %24, i32 11 ) ; <i32>:25 [#uses=1]
+ store i32 %25, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:26 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %26, i32 11 ) ; <i32>:27 [#uses=1]
+ store i32 %27, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:28 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %28, i64 11 ) ; <i64>:29 [#uses=1]
+ store i64 %29, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:30 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %30, i64 11 ) ; <i64>:31 [#uses=1]
+ store i64 %31, i64* @ul, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:32 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %32, i64 11 ) ; <i64>:33 [#uses=1]
+ store i64 %33, i64* @sll, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:34 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %34, i64 11 ) ; <i64>:35 [#uses=1]
+ store i64 %35, i64* @ull, align 8
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:36 [#uses=1]
+ store i8 %36, i8* @sc, align 1
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:37 [#uses=1]
+ store i8 %37, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:38 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %38, i16 11 ) ; <i16>:39 [#uses=1]
+ store i16 %39, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:40 [#uses=1]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %40, i16 11 ) ; <i16>:41 [#uses=1]
+ store i16 %41, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:42 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %42, i32 11 ) ; <i32>:43 [#uses=1]
+ store i32 %43, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:44 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %44, i32 11 ) ; <i32>:45 [#uses=1]
+ store i32 %45, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:46 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %46, i64 11 ) ; <i64>:47 [#uses=1]
+ store i64 %47, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:48 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %48, i64 11 ) ; <i64>:49 [#uses=1]
+ store i64 %49, i64* @ul, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:50 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %50, i64 11 ) ; <i64>:51 [#uses=1]
+ store i64 %51, i64* @sll, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:52 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %52, i64 11 ) ; <i64>:53 [#uses=1]
+ store i64 %53, i64* @ull, align 8
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:54 [#uses=1]
+ store i8 %54, i8* @sc, align 1
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:55 [#uses=1]
+ store i8 %55, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:56 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %56, i16 11 ) ; <i16>:57 [#uses=1]
+ store i16 %57, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:58 [#uses=1]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %58, i16 11 ) ; <i16>:59 [#uses=1]
+ store i16 %59, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:60 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %60, i32 11 ) ; <i32>:61 [#uses=1]
+ store i32 %61, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:62 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %62, i32 11 ) ; <i32>:63 [#uses=1]
+ store i32 %63, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:64 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %64, i64 11 ) ; <i64>:65 [#uses=1]
+ store i64 %65, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:66 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %66, i64 11 ) ; <i64>:67 [#uses=1]
+ store i64 %67, i64* @ul, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:68 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %68, i64 11 ) ; <i64>:69 [#uses=1]
+ store i64 %69, i64* @sll, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:70 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %70, i64 11 ) ; <i64>:71 [#uses=1]
+ store i64 %71, i64* @ull, align 8
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:72 [#uses=1]
+ store i8 %72, i8* @sc, align 1
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:73 [#uses=1]
+ store i8 %73, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:74 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %74, i16 11 ) ; <i16>:75 [#uses=1]
+ store i16 %75, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:76 [#uses=1]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %76, i16 11 ) ; <i16>:77 [#uses=1]
+ store i16 %77, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:78 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %78, i32 11 ) ; <i32>:79 [#uses=1]
+ store i32 %79, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:80 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %80, i32 11 ) ; <i32>:81 [#uses=1]
+ store i32 %81, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:82 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %82, i64 11 ) ; <i64>:83 [#uses=1]
+ store i64 %83, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:84 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %84, i64 11 ) ; <i64>:85 [#uses=1]
+ store i64 %85, i64* @ul, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:86 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %86, i64 11 ) ; <i64>:87 [#uses=1]
+ store i64 %87, i64* @sll, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:88 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %88, i64 11 ) ; <i64>:89 [#uses=1]
+ store i64 %89, i64* @ull, align 8
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 11 ) ; <i8>:90 [#uses=1]
+ store i8 %90, i8* @sc, align 1
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 11 ) ; <i8>:91 [#uses=1]
+ store i8 %91, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:92 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %92, i16 11 ) ; <i16>:93 [#uses=1]
+ store i16 %93, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:94 [#uses=1]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %94, i16 11 ) ; <i16>:95 [#uses=1]
+ store i16 %95, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:96 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %96, i32 11 ) ; <i32>:97 [#uses=1]
+ store i32 %97, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:98 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %98, i32 11 ) ; <i32>:99 [#uses=1]
+ store i32 %99, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:100 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %100, i64 11 ) ; <i64>:101 [#uses=1]
+ store i64 %101, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:102 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %102, i64 11 ) ; <i64>:103 [#uses=1]
+ store i64 %103, i64* @ul, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:104 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %104, i64 11 ) ; <i64>:105 [#uses=1]
+ store i64 %105, i64* @sll, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:106 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %106, i64 11 ) ; <i64>:107 [#uses=1]
+ store i64 %107, i64* @ull, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_op_and_fetch() nounwind {
+entry:
+ load i8* @uc, align 1 ; <i8>:0 [#uses=1]
+ zext i8 %0 to i32 ; <i32>:1 [#uses=1]
+ trunc i32 %1 to i8 ; <i8>:2 [#uses=2]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @sc, i8 %2 ) ; <i8>:3 [#uses=1]
+ add i8 %3, %2 ; <i8>:4 [#uses=1]
+ store i8 %4, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:5 [#uses=1]
+ zext i8 %5 to i32 ; <i32>:6 [#uses=1]
+ trunc i32 %6 to i8 ; <i8>:7 [#uses=2]
+ call i8 @llvm.atomic.load.add.i8.p0i8( i8* @uc, i8 %7 ) ; <i8>:8 [#uses=1]
+ add i8 %8, %7 ; <i8>:9 [#uses=1]
+ store i8 %9, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:10 [#uses=1]
+ zext i8 %10 to i32 ; <i32>:11 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:12 [#uses=1]
+ trunc i32 %11 to i16 ; <i16>:13 [#uses=2]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %12, i16 %13 ) ; <i16>:14 [#uses=1]
+ add i16 %14, %13 ; <i16>:15 [#uses=1]
+ store i16 %15, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:16 [#uses=1]
+ zext i8 %16 to i32 ; <i32>:17 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:18 [#uses=1]
+ trunc i32 %17 to i16 ; <i16>:19 [#uses=2]
+ call i16 @llvm.atomic.load.add.i16.p0i16( i16* %18, i16 %19 ) ; <i16>:20 [#uses=1]
+ add i16 %20, %19 ; <i16>:21 [#uses=1]
+ store i16 %21, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:22 [#uses=1]
+ zext i8 %22 to i32 ; <i32>:23 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:24 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %24, i32 %23 ) ; <i32>:25 [#uses=1]
+ add i32 %25, %23 ; <i32>:26 [#uses=1]
+ store i32 %26, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:27 [#uses=1]
+ zext i8 %27 to i32 ; <i32>:28 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:29 [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %29, i32 %28 ) ; <i32>:30 [#uses=1]
+ add i32 %30, %28 ; <i32>:31 [#uses=1]
+ store i32 %31, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:32 [#uses=1]
+ zext i8 %32 to i64 ; <i64>:33 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:34 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %34, i64 %33 ) ; <i64>:35 [#uses=1]
+ add i64 %35, %33 ; <i64>:36 [#uses=1]
+ store i64 %36, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:37 [#uses=1]
+ zext i8 %37 to i64 ; <i64>:38 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:39 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %39, i64 %38 ) ; <i64>:40 [#uses=1]
+ add i64 %40, %38 ; <i64>:41 [#uses=1]
+ store i64 %41, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:42 [#uses=1]
+ zext i8 %42 to i64 ; <i64>:43 [#uses=2]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:44 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %44, i64 %43 ) ; <i64>:45 [#uses=1]
+ add i64 %45, %43 ; <i64>:46 [#uses=1]
+ store i64 %46, i64* @sll, align 8
+ load i8* @uc, align 1 ; <i8>:47 [#uses=1]
+ zext i8 %47 to i64 ; <i64>:48 [#uses=2]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:49 [#uses=1]
+ call i64 @llvm.atomic.load.add.i64.p0i64( i64* %49, i64 %48 ) ; <i64>:50 [#uses=1]
+ add i64 %50, %48 ; <i64>:51 [#uses=1]
+ store i64 %51, i64* @ull, align 8
+ load i8* @uc, align 1 ; <i8>:52 [#uses=1]
+ zext i8 %52 to i32 ; <i32>:53 [#uses=1]
+ trunc i32 %53 to i8 ; <i8>:54 [#uses=2]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @sc, i8 %54 ) ; <i8>:55 [#uses=1]
+ sub i8 %55, %54 ; <i8>:56 [#uses=1]
+ store i8 %56, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:57 [#uses=1]
+ zext i8 %57 to i32 ; <i32>:58 [#uses=1]
+ trunc i32 %58 to i8 ; <i8>:59 [#uses=2]
+ call i8 @llvm.atomic.load.sub.i8.p0i8( i8* @uc, i8 %59 ) ; <i8>:60 [#uses=1]
+ sub i8 %60, %59 ; <i8>:61 [#uses=1]
+ store i8 %61, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:62 [#uses=1]
+ zext i8 %62 to i32 ; <i32>:63 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:64 [#uses=1]
+ trunc i32 %63 to i16 ; <i16>:65 [#uses=2]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %64, i16 %65 ) ; <i16>:66 [#uses=1]
+ sub i16 %66, %65 ; <i16>:67 [#uses=1]
+ store i16 %67, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:68 [#uses=1]
+ zext i8 %68 to i32 ; <i32>:69 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:70 [#uses=1]
+ trunc i32 %69 to i16 ; <i16>:71 [#uses=2]
+ call i16 @llvm.atomic.load.sub.i16.p0i16( i16* %70, i16 %71 ) ; <i16>:72 [#uses=1]
+ sub i16 %72, %71 ; <i16>:73 [#uses=1]
+ store i16 %73, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:74 [#uses=1]
+ zext i8 %74 to i32 ; <i32>:75 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:76 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %76, i32 %75 ) ; <i32>:77 [#uses=1]
+ sub i32 %77, %75 ; <i32>:78 [#uses=1]
+ store i32 %78, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:79 [#uses=1]
+ zext i8 %79 to i32 ; <i32>:80 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:81 [#uses=1]
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %81, i32 %80 ) ; <i32>:82 [#uses=1]
+ sub i32 %82, %80 ; <i32>:83 [#uses=1]
+ store i32 %83, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:84 [#uses=1]
+ zext i8 %84 to i64 ; <i64>:85 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:86 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %86, i64 %85 ) ; <i64>:87 [#uses=1]
+ sub i64 %87, %85 ; <i64>:88 [#uses=1]
+ store i64 %88, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:89 [#uses=1]
+ zext i8 %89 to i64 ; <i64>:90 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:91 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %91, i64 %90 ) ; <i64>:92 [#uses=1]
+ sub i64 %92, %90 ; <i64>:93 [#uses=1]
+ store i64 %93, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:94 [#uses=1]
+ zext i8 %94 to i64 ; <i64>:95 [#uses=2]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:96 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %96, i64 %95 ) ; <i64>:97 [#uses=1]
+ sub i64 %97, %95 ; <i64>:98 [#uses=1]
+ store i64 %98, i64* @sll, align 8
+ load i8* @uc, align 1 ; <i8>:99 [#uses=1]
+ zext i8 %99 to i64 ; <i64>:100 [#uses=2]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:101 [#uses=1]
+ call i64 @llvm.atomic.load.sub.i64.p0i64( i64* %101, i64 %100 ) ; <i64>:102 [#uses=1]
+ sub i64 %102, %100 ; <i64>:103 [#uses=1]
+ store i64 %103, i64* @ull, align 8
+ load i8* @uc, align 1 ; <i8>:104 [#uses=1]
+ zext i8 %104 to i32 ; <i32>:105 [#uses=1]
+ trunc i32 %105 to i8 ; <i8>:106 [#uses=2]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @sc, i8 %106 ) ; <i8>:107 [#uses=1]
+ or i8 %107, %106 ; <i8>:108 [#uses=1]
+ store i8 %108, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:109 [#uses=1]
+ zext i8 %109 to i32 ; <i32>:110 [#uses=1]
+ trunc i32 %110 to i8 ; <i8>:111 [#uses=2]
+ call i8 @llvm.atomic.load.or.i8.p0i8( i8* @uc, i8 %111 ) ; <i8>:112 [#uses=1]
+ or i8 %112, %111 ; <i8>:113 [#uses=1]
+ store i8 %113, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:114 [#uses=1]
+ zext i8 %114 to i32 ; <i32>:115 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:116 [#uses=1]
+ trunc i32 %115 to i16 ; <i16>:117 [#uses=2]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %116, i16 %117 ) ; <i16>:118 [#uses=1]
+ or i16 %118, %117 ; <i16>:119 [#uses=1]
+ store i16 %119, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:120 [#uses=1]
+ zext i8 %120 to i32 ; <i32>:121 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:122 [#uses=1]
+ trunc i32 %121 to i16 ; <i16>:123 [#uses=2]
+ call i16 @llvm.atomic.load.or.i16.p0i16( i16* %122, i16 %123 ) ; <i16>:124 [#uses=1]
+ or i16 %124, %123 ; <i16>:125 [#uses=1]
+ store i16 %125, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:126 [#uses=1]
+ zext i8 %126 to i32 ; <i32>:127 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:128 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %128, i32 %127 ) ; <i32>:129 [#uses=1]
+ or i32 %129, %127 ; <i32>:130 [#uses=1]
+ store i32 %130, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:131 [#uses=1]
+ zext i8 %131 to i32 ; <i32>:132 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:133 [#uses=1]
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %133, i32 %132 ) ; <i32>:134 [#uses=1]
+ or i32 %134, %132 ; <i32>:135 [#uses=1]
+ store i32 %135, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:136 [#uses=1]
+ zext i8 %136 to i64 ; <i64>:137 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:138 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %138, i64 %137 ) ; <i64>:139 [#uses=1]
+ or i64 %139, %137 ; <i64>:140 [#uses=1]
+ store i64 %140, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:141 [#uses=1]
+ zext i8 %141 to i64 ; <i64>:142 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:143 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %143, i64 %142 ) ; <i64>:144 [#uses=1]
+ or i64 %144, %142 ; <i64>:145 [#uses=1]
+ store i64 %145, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:146 [#uses=1]
+ zext i8 %146 to i64 ; <i64>:147 [#uses=2]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:148 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %148, i64 %147 ) ; <i64>:149 [#uses=1]
+ or i64 %149, %147 ; <i64>:150 [#uses=1]
+ store i64 %150, i64* @sll, align 8
+ load i8* @uc, align 1 ; <i8>:151 [#uses=1]
+ zext i8 %151 to i64 ; <i64>:152 [#uses=2]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:153 [#uses=1]
+ call i64 @llvm.atomic.load.or.i64.p0i64( i64* %153, i64 %152 ) ; <i64>:154 [#uses=1]
+ or i64 %154, %152 ; <i64>:155 [#uses=1]
+ store i64 %155, i64* @ull, align 8
+ load i8* @uc, align 1 ; <i8>:156 [#uses=1]
+ zext i8 %156 to i32 ; <i32>:157 [#uses=1]
+ trunc i32 %157 to i8 ; <i8>:158 [#uses=2]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @sc, i8 %158 ) ; <i8>:159 [#uses=1]
+ xor i8 %159, %158 ; <i8>:160 [#uses=1]
+ store i8 %160, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:161 [#uses=1]
+ zext i8 %161 to i32 ; <i32>:162 [#uses=1]
+ trunc i32 %162 to i8 ; <i8>:163 [#uses=2]
+ call i8 @llvm.atomic.load.xor.i8.p0i8( i8* @uc, i8 %163 ) ; <i8>:164 [#uses=1]
+ xor i8 %164, %163 ; <i8>:165 [#uses=1]
+ store i8 %165, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:166 [#uses=1]
+ zext i8 %166 to i32 ; <i32>:167 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:168 [#uses=1]
+ trunc i32 %167 to i16 ; <i16>:169 [#uses=2]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %168, i16 %169 ) ; <i16>:170 [#uses=1]
+ xor i16 %170, %169 ; <i16>:171 [#uses=1]
+ store i16 %171, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:172 [#uses=1]
+ zext i8 %172 to i32 ; <i32>:173 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:174 [#uses=1]
+ trunc i32 %173 to i16 ; <i16>:175 [#uses=2]
+ call i16 @llvm.atomic.load.xor.i16.p0i16( i16* %174, i16 %175 ) ; <i16>:176 [#uses=1]
+ xor i16 %176, %175 ; <i16>:177 [#uses=1]
+ store i16 %177, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:178 [#uses=1]
+ zext i8 %178 to i32 ; <i32>:179 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:180 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %180, i32 %179 ) ; <i32>:181 [#uses=1]
+ xor i32 %181, %179 ; <i32>:182 [#uses=1]
+ store i32 %182, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:183 [#uses=1]
+ zext i8 %183 to i32 ; <i32>:184 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:185 [#uses=1]
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %185, i32 %184 ) ; <i32>:186 [#uses=1]
+ xor i32 %186, %184 ; <i32>:187 [#uses=1]
+ store i32 %187, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:188 [#uses=1]
+ zext i8 %188 to i64 ; <i64>:189 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:190 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %190, i64 %189 ) ; <i64>:191 [#uses=1]
+ xor i64 %191, %189 ; <i64>:192 [#uses=1]
+ store i64 %192, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:193 [#uses=1]
+ zext i8 %193 to i64 ; <i64>:194 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:195 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %195, i64 %194 ) ; <i64>:196 [#uses=1]
+ xor i64 %196, %194 ; <i64>:197 [#uses=1]
+ store i64 %197, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:198 [#uses=1]
+ zext i8 %198 to i64 ; <i64>:199 [#uses=2]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:200 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %200, i64 %199 ) ; <i64>:201 [#uses=1]
+ xor i64 %201, %199 ; <i64>:202 [#uses=1]
+ store i64 %202, i64* @sll, align 8
+ load i8* @uc, align 1 ; <i8>:203 [#uses=1]
+ zext i8 %203 to i64 ; <i64>:204 [#uses=2]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:205 [#uses=1]
+ call i64 @llvm.atomic.load.xor.i64.p0i64( i64* %205, i64 %204 ) ; <i64>:206 [#uses=1]
+ xor i64 %206, %204 ; <i64>:207 [#uses=1]
+ store i64 %207, i64* @ull, align 8
+ load i8* @uc, align 1 ; <i8>:208 [#uses=1]
+ zext i8 %208 to i32 ; <i32>:209 [#uses=1]
+ trunc i32 %209 to i8 ; <i8>:210 [#uses=2]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @sc, i8 %210 ) ; <i8>:211 [#uses=1]
+ and i8 %211, %210 ; <i8>:212 [#uses=1]
+ store i8 %212, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:213 [#uses=1]
+ zext i8 %213 to i32 ; <i32>:214 [#uses=1]
+ trunc i32 %214 to i8 ; <i8>:215 [#uses=2]
+ call i8 @llvm.atomic.load.and.i8.p0i8( i8* @uc, i8 %215 ) ; <i8>:216 [#uses=1]
+ and i8 %216, %215 ; <i8>:217 [#uses=1]
+ store i8 %217, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:218 [#uses=1]
+ zext i8 %218 to i32 ; <i32>:219 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:220 [#uses=1]
+ trunc i32 %219 to i16 ; <i16>:221 [#uses=2]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %220, i16 %221 ) ; <i16>:222 [#uses=1]
+ and i16 %222, %221 ; <i16>:223 [#uses=1]
+ store i16 %223, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:224 [#uses=1]
+ zext i8 %224 to i32 ; <i32>:225 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:226 [#uses=1]
+ trunc i32 %225 to i16 ; <i16>:227 [#uses=2]
+ call i16 @llvm.atomic.load.and.i16.p0i16( i16* %226, i16 %227 ) ; <i16>:228 [#uses=1]
+ and i16 %228, %227 ; <i16>:229 [#uses=1]
+ store i16 %229, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:230 [#uses=1]
+ zext i8 %230 to i32 ; <i32>:231 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:232 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %232, i32 %231 ) ; <i32>:233 [#uses=1]
+ and i32 %233, %231 ; <i32>:234 [#uses=1]
+ store i32 %234, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:235 [#uses=1]
+ zext i8 %235 to i32 ; <i32>:236 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:237 [#uses=1]
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %237, i32 %236 ) ; <i32>:238 [#uses=1]
+ and i32 %238, %236 ; <i32>:239 [#uses=1]
+ store i32 %239, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:240 [#uses=1]
+ zext i8 %240 to i64 ; <i64>:241 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:242 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %242, i64 %241 ) ; <i64>:243 [#uses=1]
+ and i64 %243, %241 ; <i64>:244 [#uses=1]
+ store i64 %244, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:245 [#uses=1]
+ zext i8 %245 to i64 ; <i64>:246 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:247 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %247, i64 %246 ) ; <i64>:248 [#uses=1]
+ and i64 %248, %246 ; <i64>:249 [#uses=1]
+ store i64 %249, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:250 [#uses=1]
+ zext i8 %250 to i64 ; <i64>:251 [#uses=2]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:252 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %252, i64 %251 ) ; <i64>:253 [#uses=1]
+ and i64 %253, %251 ; <i64>:254 [#uses=1]
+ store i64 %254, i64* @sll, align 8
+ load i8* @uc, align 1 ; <i8>:255 [#uses=1]
+ zext i8 %255 to i64 ; <i64>:256 [#uses=2]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:257 [#uses=1]
+ call i64 @llvm.atomic.load.and.i64.p0i64( i64* %257, i64 %256 ) ; <i64>:258 [#uses=1]
+ and i64 %258, %256 ; <i64>:259 [#uses=1]
+ store i64 %259, i64* @ull, align 8
+ load i8* @uc, align 1 ; <i8>:260 [#uses=1]
+ zext i8 %260 to i32 ; <i32>:261 [#uses=1]
+ trunc i32 %261 to i8 ; <i8>:262 [#uses=2]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @sc, i8 %262 ) ; <i8>:263 [#uses=1]
+ xor i8 %263, -1 ; <i8>:264 [#uses=1]
+ and i8 %264, %262 ; <i8>:265 [#uses=1]
+ store i8 %265, i8* @sc, align 1
+ load i8* @uc, align 1 ; <i8>:266 [#uses=1]
+ zext i8 %266 to i32 ; <i32>:267 [#uses=1]
+ trunc i32 %267 to i8 ; <i8>:268 [#uses=2]
+ call i8 @llvm.atomic.load.nand.i8.p0i8( i8* @uc, i8 %268 ) ; <i8>:269 [#uses=1]
+ xor i8 %269, -1 ; <i8>:270 [#uses=1]
+ and i8 %270, %268 ; <i8>:271 [#uses=1]
+ store i8 %271, i8* @uc, align 1
+ load i8* @uc, align 1 ; <i8>:272 [#uses=1]
+ zext i8 %272 to i32 ; <i32>:273 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:274 [#uses=1]
+ trunc i32 %273 to i16 ; <i16>:275 [#uses=2]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %274, i16 %275 ) ; <i16>:276 [#uses=1]
+ xor i16 %276, -1 ; <i16>:277 [#uses=1]
+ and i16 %277, %275 ; <i16>:278 [#uses=1]
+ store i16 %278, i16* @ss, align 2
+ load i8* @uc, align 1 ; <i8>:279 [#uses=1]
+ zext i8 %279 to i32 ; <i32>:280 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:281 [#uses=1]
+ trunc i32 %280 to i16 ; <i16>:282 [#uses=2]
+ call i16 @llvm.atomic.load.nand.i16.p0i16( i16* %281, i16 %282 ) ; <i16>:283 [#uses=1]
+ xor i16 %283, -1 ; <i16>:284 [#uses=1]
+ and i16 %284, %282 ; <i16>:285 [#uses=1]
+ store i16 %285, i16* @us, align 2
+ load i8* @uc, align 1 ; <i8>:286 [#uses=1]
+ zext i8 %286 to i32 ; <i32>:287 [#uses=2]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:288 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %288, i32 %287 ) ; <i32>:289 [#uses=1]
+ xor i32 %289, -1 ; <i32>:290 [#uses=1]
+ and i32 %290, %287 ; <i32>:291 [#uses=1]
+ store i32 %291, i32* @si, align 4
+ load i8* @uc, align 1 ; <i8>:292 [#uses=1]
+ zext i8 %292 to i32 ; <i32>:293 [#uses=2]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:294 [#uses=1]
+ call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %294, i32 %293 ) ; <i32>:295 [#uses=1]
+ xor i32 %295, -1 ; <i32>:296 [#uses=1]
+ and i32 %296, %293 ; <i32>:297 [#uses=1]
+ store i32 %297, i32* @ui, align 4
+ load i8* @uc, align 1 ; <i8>:298 [#uses=1]
+ zext i8 %298 to i64 ; <i64>:299 [#uses=2]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:300 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %300, i64 %299 ) ; <i64>:301 [#uses=1]
+ xor i64 %301, -1 ; <i64>:302 [#uses=1]
+ and i64 %302, %299 ; <i64>:303 [#uses=1]
+ store i64 %303, i64* @sl, align 8
+ load i8* @uc, align 1 ; <i8>:304 [#uses=1]
+ zext i8 %304 to i64 ; <i64>:305 [#uses=2]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:306 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %306, i64 %305 ) ; <i64>:307 [#uses=1]
+ xor i64 %307, -1 ; <i64>:308 [#uses=1]
+ and i64 %308, %305 ; <i64>:309 [#uses=1]
+ store i64 %309, i64* @ul, align 8
+ load i8* @uc, align 1 ; <i8>:310 [#uses=1]
+ zext i8 %310 to i64 ; <i64>:311 [#uses=2]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:312 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %312, i64 %311 ) ; <i64>:313 [#uses=1]
+ xor i64 %313, -1 ; <i64>:314 [#uses=1]
+ and i64 %314, %311 ; <i64>:315 [#uses=1]
+ store i64 %315, i64* @sll, align 8
+ load i8* @uc, align 1 ; <i8>:316 [#uses=1]
+ zext i8 %316 to i64 ; <i64>:317 [#uses=2]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:318 [#uses=1]
+ call i64 @llvm.atomic.load.nand.i64.p0i64( i64* %318, i64 %317 ) ; <i64>:319 [#uses=1]
+ xor i64 %319, -1 ; <i64>:320 [#uses=1]
+ and i64 %320, %317 ; <i64>:321 [#uses=1]
+ store i64 %321, i64* @ull, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @test_compare_and_swap() nounwind {
+entry:
+ load i8* @sc, align 1 ; <i8>:0 [#uses=1]
+ zext i8 %0 to i32 ; <i32>:1 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:2 [#uses=1]
+ zext i8 %2 to i32 ; <i32>:3 [#uses=1]
+ trunc i32 %3 to i8 ; <i8>:4 [#uses=1]
+ trunc i32 %1 to i8 ; <i8>:5 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %4, i8 %5 ) ; <i8>:6 [#uses=1]
+ store i8 %6, i8* @sc, align 1
+ load i8* @sc, align 1 ; <i8>:7 [#uses=1]
+ zext i8 %7 to i32 ; <i32>:8 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:9 [#uses=1]
+ zext i8 %9 to i32 ; <i32>:10 [#uses=1]
+ trunc i32 %10 to i8 ; <i8>:11 [#uses=1]
+ trunc i32 %8 to i8 ; <i8>:12 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %11, i8 %12 ) ; <i8>:13 [#uses=1]
+ store i8 %13, i8* @uc, align 1
+ load i8* @sc, align 1 ; <i8>:14 [#uses=1]
+ sext i8 %14 to i16 ; <i16>:15 [#uses=1]
+ zext i16 %15 to i32 ; <i32>:16 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:17 [#uses=1]
+ zext i8 %17 to i32 ; <i32>:18 [#uses=1]
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:19 [#uses=1]
+ trunc i32 %18 to i16 ; <i16>:20 [#uses=1]
+ trunc i32 %16 to i16 ; <i16>:21 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %19, i16 %20, i16 %21 ) ; <i16>:22 [#uses=1]
+ store i16 %22, i16* @ss, align 2
+ load i8* @sc, align 1 ; <i8>:23 [#uses=1]
+ sext i8 %23 to i16 ; <i16>:24 [#uses=1]
+ zext i16 %24 to i32 ; <i32>:25 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:26 [#uses=1]
+ zext i8 %26 to i32 ; <i32>:27 [#uses=1]
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:28 [#uses=1]
+ trunc i32 %27 to i16 ; <i16>:29 [#uses=1]
+ trunc i32 %25 to i16 ; <i16>:30 [#uses=1]
+ call i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* %28, i16 %29, i16 %30 ) ; <i16>:31 [#uses=1]
+ store i16 %31, i16* @us, align 2
+ load i8* @sc, align 1 ; <i8>:32 [#uses=1]
+ sext i8 %32 to i32 ; <i32>:33 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:34 [#uses=1]
+ zext i8 %34 to i32 ; <i32>:35 [#uses=1]
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:36 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %36, i32 %35, i32 %33 ) ; <i32>:37 [#uses=1]
+ store i32 %37, i32* @si, align 4
+ load i8* @sc, align 1 ; <i8>:38 [#uses=1]
+ sext i8 %38 to i32 ; <i32>:39 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:40 [#uses=1]
+ zext i8 %40 to i32 ; <i32>:41 [#uses=1]
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:42 [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %42, i32 %41, i32 %39 ) ; <i32>:43 [#uses=1]
+ store i32 %43, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:44 [#uses=1]
+ sext i8 %44 to i64 ; <i64>:45 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:46 [#uses=1]
+ zext i8 %46 to i64 ; <i64>:47 [#uses=1]
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:48 [#uses=1]
+ call i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* %48, i64 %47, i64 %45 ) ; <i64>:49 [#uses=1]
+ store i64 %49, i64* @sl, align 8
+ load i8* @sc, align 1 ; <i8>:50 [#uses=1]
+ sext i8 %50 to i64 ; <i64>:51 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:52 [#uses=1]
+ zext i8 %52 to i64 ; <i64>:53 [#uses=1]
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:54 [#uses=1]
+ call i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* %54, i64 %53, i64 %51 ) ; <i64>:55 [#uses=1]
+ store i64 %55, i64* @ul, align 8
+ load i8* @sc, align 1 ; <i8>:56 [#uses=1]
+ sext i8 %56 to i64 ; <i64>:57 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:58 [#uses=1]
+ zext i8 %58 to i64 ; <i64>:59 [#uses=1]
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:60 [#uses=1]
+ call i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* %60, i64 %59, i64 %57 ) ; <i64>:61 [#uses=1]
+ store i64 %61, i64* @sll, align 8
+ load i8* @sc, align 1 ; <i8>:62 [#uses=1]
+ sext i8 %62 to i64 ; <i64>:63 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:64 [#uses=1]
+ zext i8 %64 to i64 ; <i64>:65 [#uses=1]
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:66 [#uses=1]
+ call i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* %66, i64 %65, i64 %63 ) ; <i64>:67 [#uses=1]
+ store i64 %67, i64* @ull, align 8
+ load i8* @sc, align 1 ; <i8>:68 [#uses=1]
+ zext i8 %68 to i32 ; <i32>:69 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:70 [#uses=1]
+ zext i8 %70 to i32 ; <i32>:71 [#uses=1]
+ trunc i32 %71 to i8 ; <i8>:72 [#uses=2]
+ trunc i32 %69 to i8 ; <i8>:73 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @sc, i8 %72, i8 %73 ) ; <i8>:74 [#uses=1]
+ icmp eq i8 %74, %72 ; <i1>:75 [#uses=1]
+ zext i1 %75 to i8 ; <i8>:76 [#uses=1]
+ zext i8 %76 to i32 ; <i32>:77 [#uses=1]
+ store i32 %77, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:78 [#uses=1]
+ zext i8 %78 to i32 ; <i32>:79 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:80 [#uses=1]
+ zext i8 %80 to i32 ; <i32>:81 [#uses=1]
+ trunc i32 %81 to i8 ; <i8>:82 [#uses=2]
+ trunc i32 %79 to i8 ; <i8>:83 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* @uc, i8 %82, i8 %83 ) ; <i8>:84 [#uses=1]
+ icmp eq i8 %84, %82 ; <i1>:85 [#uses=1]
+ zext i1 %85 to i8 ; <i8>:86 [#uses=1]
+ zext i8 %86 to i32 ; <i32>:87 [#uses=1]
+ store i32 %87, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:88 [#uses=1]
+ sext i8 %88 to i16 ; <i16>:89 [#uses=1]
+ zext i16 %89 to i32 ; <i32>:90 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:91 [#uses=1]
+ zext i8 %91 to i32 ; <i32>:92 [#uses=1]
+ trunc i32 %92 to i8 ; <i8>:93 [#uses=2]
+ trunc i32 %90 to i8 ; <i8>:94 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i16* @ss to i8*), i8 %93, i8 %94 ) ; <i8>:95 [#uses=1]
+ icmp eq i8 %95, %93 ; <i1>:96 [#uses=1]
+ zext i1 %96 to i8 ; <i8>:97 [#uses=1]
+ zext i8 %97 to i32 ; <i32>:98 [#uses=1]
+ store i32 %98, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:99 [#uses=1]
+ sext i8 %99 to i16 ; <i16>:100 [#uses=1]
+ zext i16 %100 to i32 ; <i32>:101 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:102 [#uses=1]
+ zext i8 %102 to i32 ; <i32>:103 [#uses=1]
+ trunc i32 %103 to i8 ; <i8>:104 [#uses=2]
+ trunc i32 %101 to i8 ; <i8>:105 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i16* @us to i8*), i8 %104, i8 %105 ) ; <i8>:106 [#uses=1]
+ icmp eq i8 %106, %104 ; <i1>:107 [#uses=1]
+ zext i1 %107 to i8 ; <i8>:108 [#uses=1]
+ zext i8 %108 to i32 ; <i32>:109 [#uses=1]
+ store i32 %109, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:110 [#uses=1]
+ sext i8 %110 to i32 ; <i32>:111 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:112 [#uses=1]
+ zext i8 %112 to i32 ; <i32>:113 [#uses=1]
+ trunc i32 %113 to i8 ; <i8>:114 [#uses=2]
+ trunc i32 %111 to i8 ; <i8>:115 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i32* @si to i8*), i8 %114, i8 %115 ) ; <i8>:116 [#uses=1]
+ icmp eq i8 %116, %114 ; <i1>:117 [#uses=1]
+ zext i1 %117 to i8 ; <i8>:118 [#uses=1]
+ zext i8 %118 to i32 ; <i32>:119 [#uses=1]
+ store i32 %119, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:120 [#uses=1]
+ sext i8 %120 to i32 ; <i32>:121 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:122 [#uses=1]
+ zext i8 %122 to i32 ; <i32>:123 [#uses=1]
+ trunc i32 %123 to i8 ; <i8>:124 [#uses=2]
+ trunc i32 %121 to i8 ; <i8>:125 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i32* @ui to i8*), i8 %124, i8 %125 ) ; <i8>:126 [#uses=1]
+ icmp eq i8 %126, %124 ; <i1>:127 [#uses=1]
+ zext i1 %127 to i8 ; <i8>:128 [#uses=1]
+ zext i8 %128 to i32 ; <i32>:129 [#uses=1]
+ store i32 %129, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:130 [#uses=1]
+ sext i8 %130 to i64 ; <i64>:131 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:132 [#uses=1]
+ zext i8 %132 to i64 ; <i64>:133 [#uses=1]
+ trunc i64 %133 to i8 ; <i8>:134 [#uses=2]
+ trunc i64 %131 to i8 ; <i8>:135 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i64* @sl to i8*), i8 %134, i8 %135 ) ; <i8>:136 [#uses=1]
+ icmp eq i8 %136, %134 ; <i1>:137 [#uses=1]
+ zext i1 %137 to i8 ; <i8>:138 [#uses=1]
+ zext i8 %138 to i32 ; <i32>:139 [#uses=1]
+ store i32 %139, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:140 [#uses=1]
+ sext i8 %140 to i64 ; <i64>:141 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:142 [#uses=1]
+ zext i8 %142 to i64 ; <i64>:143 [#uses=1]
+ trunc i64 %143 to i8 ; <i8>:144 [#uses=2]
+ trunc i64 %141 to i8 ; <i8>:145 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i64* @ul to i8*), i8 %144, i8 %145 ) ; <i8>:146 [#uses=1]
+ icmp eq i8 %146, %144 ; <i1>:147 [#uses=1]
+ zext i1 %147 to i8 ; <i8>:148 [#uses=1]
+ zext i8 %148 to i32 ; <i32>:149 [#uses=1]
+ store i32 %149, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:150 [#uses=1]
+ sext i8 %150 to i64 ; <i64>:151 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:152 [#uses=1]
+ zext i8 %152 to i64 ; <i64>:153 [#uses=1]
+ trunc i64 %153 to i8 ; <i8>:154 [#uses=2]
+ trunc i64 %151 to i8 ; <i8>:155 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i64* @sll to i8*), i8 %154, i8 %155 ) ; <i8>:156 [#uses=1]
+ icmp eq i8 %156, %154 ; <i1>:157 [#uses=1]
+ zext i1 %157 to i8 ; <i8>:158 [#uses=1]
+ zext i8 %158 to i32 ; <i32>:159 [#uses=1]
+ store i32 %159, i32* @ui, align 4
+ load i8* @sc, align 1 ; <i8>:160 [#uses=1]
+ sext i8 %160 to i64 ; <i64>:161 [#uses=1]
+ load i8* @uc, align 1 ; <i8>:162 [#uses=1]
+ zext i8 %162 to i64 ; <i64>:163 [#uses=1]
+ trunc i64 %163 to i8 ; <i8>:164 [#uses=2]
+ trunc i64 %161 to i8 ; <i8>:165 [#uses=1]
+ call i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* bitcast (i64* @ull to i8*), i8 %164, i8 %165 ) ; <i8>:166 [#uses=1]
+ icmp eq i8 %166, %164 ; <i1>:167 [#uses=1]
+ zext i1 %167 to i8 ; <i8>:168 [#uses=1]
+ zext i8 %168 to i32 ; <i32>:169 [#uses=1]
+ store i32 %169, i32* @ui, align 4
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8*, i8, i8) nounwind
+
+declare i16 @llvm.atomic.cmp.swap.i16.p0i16(i16*, i16, i16) nounwind
+
+declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind
+
+declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64*, i64, i64) nounwind
+
+define void @test_lock() nounwind {
+entry:
+ call i8 @llvm.atomic.swap.i8.p0i8( i8* @sc, i8 1 ) ; <i8>:0 [#uses=1]
+ store i8 %0, i8* @sc, align 1
+ call i8 @llvm.atomic.swap.i8.p0i8( i8* @uc, i8 1 ) ; <i8>:1 [#uses=1]
+ store i8 %1, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:2 [#uses=1]
+ call i16 @llvm.atomic.swap.i16.p0i16( i16* %2, i16 1 ) ; <i16>:3 [#uses=1]
+ store i16 %3, i16* @ss, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:4 [#uses=1]
+ call i16 @llvm.atomic.swap.i16.p0i16( i16* %4, i16 1 ) ; <i16>:5 [#uses=1]
+ store i16 %5, i16* @us, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:6 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %6, i32 1 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* @si, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:8 [#uses=1]
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %8, i32 1 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* @ui, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:10 [#uses=1]
+ call i64 @llvm.atomic.swap.i64.p0i64( i64* %10, i64 1 ) ; <i64>:11 [#uses=1]
+ store i64 %11, i64* @sl, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:12 [#uses=1]
+ call i64 @llvm.atomic.swap.i64.p0i64( i64* %12, i64 1 ) ; <i64>:13 [#uses=1]
+ store i64 %13, i64* @ul, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:14 [#uses=1]
+ call i64 @llvm.atomic.swap.i64.p0i64( i64* %14, i64 1 ) ; <i64>:15 [#uses=1]
+ store i64 %15, i64* @sll, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:16 [#uses=1]
+ call i64 @llvm.atomic.swap.i64.p0i64( i64* %16, i64 1 ) ; <i64>:17 [#uses=1]
+ store i64 %17, i64* @ull, align 8
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true, i1 false )
+ volatile store i8 0, i8* @sc, align 1
+ volatile store i8 0, i8* @uc, align 1
+ bitcast i8* bitcast (i16* @ss to i8*) to i16* ; <i16*>:18 [#uses=1]
+ volatile store i16 0, i16* %18, align 2
+ bitcast i8* bitcast (i16* @us to i8*) to i16* ; <i16*>:19 [#uses=1]
+ volatile store i16 0, i16* %19, align 2
+ bitcast i8* bitcast (i32* @si to i8*) to i32* ; <i32*>:20 [#uses=1]
+ volatile store i32 0, i32* %20, align 4
+ bitcast i8* bitcast (i32* @ui to i8*) to i32* ; <i32*>:21 [#uses=1]
+ volatile store i32 0, i32* %21, align 4
+ bitcast i8* bitcast (i64* @sl to i8*) to i64* ; <i64*>:22 [#uses=1]
+ volatile store i64 0, i64* %22, align 8
+ bitcast i8* bitcast (i64* @ul to i8*) to i64* ; <i64*>:23 [#uses=1]
+ volatile store i64 0, i64* %23, align 8
+ bitcast i8* bitcast (i64* @sll to i8*) to i64* ; <i64*>:24 [#uses=1]
+ volatile store i64 0, i64* %24, align 8
+ bitcast i8* bitcast (i64* @ull to i8*) to i64* ; <i64*>:25 [#uses=1]
+ volatile store i64 0, i64* %25, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i8 @llvm.atomic.swap.i8.p0i8(i8*, i8) nounwind
+
+declare i16 @llvm.atomic.swap.i16.p0i16(i16*, i16) nounwind
+
+declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
+
+declare i64 @llvm.atomic.swap.i64.p0i64(i64*, i64) nounwind
+
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
diff --git a/test/CodeGen/X86/SwitchLowering.ll b/test/CodeGen/X86/SwitchLowering.ll
new file mode 100644
index 0000000..29a0e82
--- /dev/null
+++ b/test/CodeGen/X86/SwitchLowering.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86 | grep cmp | count 1
+; PR964
+
+define i8* @FindChar(i8* %CurPtr) {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %CurPtr_addr.0.rec = bitcast i32 %indvar to i32 ; <i32> [#uses=1]
+ %gep.upgrd.1 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %CurPtr_addr.0 = getelementptr i8* %CurPtr, i64 %gep.upgrd.1 ; <i8*> [#uses=1]
+ %tmp = load i8* %CurPtr_addr.0 ; <i8> [#uses=3]
+ %tmp2.rec = add i32 %CurPtr_addr.0.rec, 1 ; <i32> [#uses=1]
+ %tmp2 = getelementptr i8* %CurPtr, i32 %tmp2.rec ; <i8*> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ switch i8 %tmp, label %bb [
+ i8 0, label %bb7
+ i8 120, label %bb7
+ ]
+
+bb7: ; preds = %bb, %bb
+ tail call void @foo( i8 %tmp )
+ ret i8* %tmp2
+}
+
+declare void @foo(i8)
+
diff --git a/test/CodeGen/X86/abi-isel.ll b/test/CodeGen/X86/abi-isel.ll
new file mode 100644
index 0000000..9208738
--- /dev/null
+++ b/test/CodeGen/X86/abi-isel.ll
@@ -0,0 +1,9646 @@
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-32-STATIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-32-PIC
+
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-64-STATIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-64-PIC
+
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-STATIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-PIC
+
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-STATIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-PIC
+
+@src = external global [131072 x i32]
+@dst = external global [131072 x i32]
+@xsrc = external global [32 x i32]
+@xdst = external global [32 x i32]
+@ptr = external global i32*
+@dsrc = global [131072 x i32] zeroinitializer, align 32
+@ddst = global [131072 x i32] zeroinitializer, align 32
+@dptr = global i32* null
+@lsrc = internal global [131072 x i32] zeroinitializer
+@ldst = internal global [131072 x i32] zeroinitializer
+@lptr = internal global i32* null
+@ifunc = external global void ()*
+@difunc = global void ()* null
+@lifunc = internal global void ()* null
+@lxsrc = internal global [32 x i32] zeroinitializer, align 32
+@lxdst = internal global [32 x i32] zeroinitializer, align 32
+@dxsrc = global [32 x i32] zeroinitializer, align 32
+@dxdst = global [32 x i32] zeroinitializer, align 32
+
+define void @foo00() nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 0), align 4
+ store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 0), align 4
+ ret void
+
+; LINUX-64-STATIC: foo00:
+; LINUX-64-STATIC: movl src(%rip), %eax
+; LINUX-64-STATIC: movl %eax, dst
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo00:
+; LINUX-32-STATIC: movl src, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, dst
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo00:
+; LINUX-32-PIC: movl src, %eax
+; LINUX-32-PIC-NEXT: movl %eax, dst
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax), %eax
+; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo00:
+; DARWIN-32-STATIC: movl _src, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _dst
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo00:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo00:
+; DARWIN-32-PIC: call L1$pb
+; DARWIN-32-PIC-NEXT: L1$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L1$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L1$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @fxo00() nounwind {
+entry:
+ %0 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 0), align 4
+ store i32 %0, i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 0), align 4
+ ret void
+
+; LINUX-64-STATIC: fxo00:
+; LINUX-64-STATIC: movl xsrc(%rip), %eax
+; LINUX-64-STATIC: movl %eax, xdst
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: fxo00:
+; LINUX-32-STATIC: movl xsrc, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, xdst
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: fxo00:
+; LINUX-32-PIC: movl xsrc, %eax
+; LINUX-32-PIC-NEXT: movl %eax, xdst
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: fxo00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax), %eax
+; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _fxo00:
+; DARWIN-32-STATIC: movl _xsrc, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _xdst
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _fxo00:
+; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _fxo00:
+; DARWIN-32-PIC: call L2$pb
+; DARWIN-32-PIC-NEXT: L2$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L2$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L2$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _fxo00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _fxo00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _fxo00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @foo01() nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @dst, i32 0, i32 0), i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: foo01:
+; LINUX-64-STATIC: movq $dst, ptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo01:
+; LINUX-32-STATIC: movl $dst, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo01:
+; LINUX-32-PIC: movl $dst, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo01:
+; DARWIN-32-STATIC: movl $_dst, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo01:
+; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo01:
+; DARWIN-32-PIC: call L3$pb
+; DARWIN-32-PIC-NEXT: L3$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L3$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L3$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @fxo01() nounwind {
+entry:
+ store i32* getelementptr ([32 x i32]* @xdst, i32 0, i32 0), i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: fxo01:
+; LINUX-64-STATIC: movq $xdst, ptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: fxo01:
+; LINUX-32-STATIC: movl $xdst, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: fxo01:
+; LINUX-32-PIC: movl $xdst, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: fxo01:
+; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _fxo01:
+; DARWIN-32-STATIC: movl $_xdst, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _fxo01:
+; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _fxo01:
+; DARWIN-32-PIC: call L4$pb
+; DARWIN-32-PIC-NEXT: L4$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L4$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L4$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _fxo01:
+; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _fxo01:
+; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _fxo01:
+; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @foo02() nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 0), align 4
+ store i32 %1, i32* %0, align 4
+ ret void
+; LINUX-64-STATIC: foo02:
+; LINUX-64-STATIC: movl src(%rip), %
+; LINUX-64-STATIC: movq ptr(%rip), %
+; LINUX-64-STATIC: movl
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo02:
+; LINUX-32-STATIC: movl src, %eax
+; LINUX-32-STATIC-NEXT: movl ptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, (%ecx)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo02:
+; LINUX-32-PIC: movl src, %eax
+; LINUX-32-PIC-NEXT: movl ptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, (%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo02:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo02:
+; DARWIN-32-STATIC: movl _src, %eax
+; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo02:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo02:
+; DARWIN-32-PIC: call L5$pb
+; DARWIN-32-PIC-NEXT: L5$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L5$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L5$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo02:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo02:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo02:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @fxo02() nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 0), align 4
+ store i32 %1, i32* %0, align 4
+; LINUX-64-STATIC: fxo02:
+; LINUX-64-STATIC: movl xsrc(%rip), %
+; LINUX-64-STATIC: movq ptr(%rip), %
+; LINUX-64-STATIC: movl
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: fxo02:
+; LINUX-32-STATIC: movl xsrc, %eax
+; LINUX-32-STATIC-NEXT: movl ptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, (%ecx)
+; LINUX-32-STATIC-NEXT: ret
+ ret void
+
+; LINUX-32-PIC: fxo02:
+; LINUX-32-PIC: movl xsrc, %eax
+; LINUX-32-PIC-NEXT: movl ptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, (%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: fxo02:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _fxo02:
+; DARWIN-32-STATIC: movl _xsrc, %eax
+; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _fxo02:
+; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _fxo02:
+; DARWIN-32-PIC: call L6$pb
+; DARWIN-32-PIC-NEXT: L6$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L6$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L6$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _fxo02:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _fxo02:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _fxo02:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @foo03() nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 0), align 32
+ store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 0), align 32
+ ret void
+; LINUX-64-STATIC: foo03:
+; LINUX-64-STATIC: movl dsrc(%rip), %eax
+; LINUX-64-STATIC: movl %eax, ddst
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo03:
+; LINUX-32-STATIC: movl dsrc, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ddst
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo03:
+; LINUX-32-PIC: movl dsrc, %eax
+; LINUX-32-PIC-NEXT: movl %eax, ddst
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax), %eax
+; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo03:
+; DARWIN-32-STATIC: movl _dsrc, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ddst
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo03:
+; DARWIN-32-DYNAMIC: movl _dsrc, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ddst
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo03:
+; DARWIN-32-PIC: call L7$pb
+; DARWIN-32-PIC-NEXT: L7$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl _dsrc-L7$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _ddst-L7$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo03:
+; DARWIN-64-STATIC: movl _dsrc(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movl %eax, _ddst(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo03:
+; DARWIN-64-DYNAMIC: movl _dsrc(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ddst(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo03:
+; DARWIN-64-PIC: movl _dsrc(%rip), %eax
+; DARWIN-64-PIC-NEXT: movl %eax, _ddst(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @foo04() nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i32 0), i32** @dptr, align 8
+ ret void
+; LINUX-64-STATIC: foo04:
+; LINUX-64-STATIC: movq $ddst, dptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo04:
+; LINUX-32-STATIC: movl $ddst, dptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo04:
+; LINUX-32-PIC: movl $ddst, dptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo04:
+; DARWIN-32-STATIC: movl $_ddst, _dptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo04:
+; DARWIN-32-DYNAMIC: movl $_ddst, _dptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo04:
+; DARWIN-32-PIC: call L8$pb
+; DARWIN-32-PIC-NEXT: L8$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _ddst-L8$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L8$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo04:
+; DARWIN-64-STATIC: leaq _ddst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo04:
+; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo04:
+; DARWIN-64-PIC: leaq _ddst(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @foo05() nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 0), align 32
+ store i32 %1, i32* %0, align 4
+ ret void
+; LINUX-64-STATIC: foo05:
+; LINUX-64-STATIC: movl dsrc(%rip), %
+; LINUX-64-STATIC: movq dptr(%rip), %
+; LINUX-64-STATIC: movl
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo05:
+; LINUX-32-STATIC: movl dsrc, %eax
+; LINUX-32-STATIC-NEXT: movl dptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, (%ecx)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo05:
+; LINUX-32-PIC: movl dsrc, %eax
+; LINUX-32-PIC-NEXT: movl dptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, (%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo05:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax), %eax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo05:
+; DARWIN-32-STATIC: movl _dsrc, %eax
+; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo05:
+; DARWIN-32-DYNAMIC: movl _dsrc, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo05:
+; DARWIN-32-PIC: call L9$pb
+; DARWIN-32-PIC-NEXT: L9$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl _dsrc-L9$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl _dptr-L9$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo05:
+; DARWIN-64-STATIC: movl _dsrc(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo05:
+; DARWIN-64-DYNAMIC: movl _dsrc(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo05:
+; DARWIN-64-PIC: movl _dsrc(%rip), %eax
+; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @foo06() nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 0), align 4
+ store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 0), align 4
+ ret void
+; LINUX-64-STATIC: foo06:
+; LINUX-64-STATIC: movl lsrc(%rip), %eax
+; LINUX-64-STATIC: movl %eax, ldst(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo06:
+; LINUX-32-STATIC: movl lsrc, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ldst
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo06:
+; LINUX-32-PIC: movl lsrc, %eax
+; LINUX-32-PIC-NEXT: movl %eax, ldst
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo06:
+; LINUX-64-PIC: movl lsrc(%rip), %eax
+; LINUX-64-PIC-NEXT: movl %eax, ldst(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo06:
+; DARWIN-32-STATIC: movl _lsrc, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ldst
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo06:
+; DARWIN-32-DYNAMIC: movl _lsrc, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ldst
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo06:
+; DARWIN-32-PIC: call L10$pb
+; DARWIN-32-PIC-NEXT: L10$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl _lsrc-L10$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _ldst-L10$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo06:
+; DARWIN-64-STATIC: movl _lsrc(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movl %eax, _ldst(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo06:
+; DARWIN-64-DYNAMIC: movl _lsrc(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ldst(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo06:
+; DARWIN-64-PIC: movl _lsrc(%rip), %eax
+; DARWIN-64-PIC-NEXT: movl %eax, _ldst(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @foo07() nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i32 0), i32** @lptr, align 8
+ ret void
+; LINUX-64-STATIC: foo07:
+; LINUX-64-STATIC: movq $ldst, lptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo07:
+; LINUX-32-STATIC: movl $ldst, lptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo07:
+; LINUX-32-PIC: movl $ldst, lptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo07:
+; LINUX-64-PIC: leaq ldst(%rip), %rax
+; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo07:
+; DARWIN-32-STATIC: movl $_ldst, _lptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo07:
+; DARWIN-32-DYNAMIC: movl $_ldst, _lptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo07:
+; DARWIN-32-PIC: call L11$pb
+; DARWIN-32-PIC-NEXT: L11$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _ldst-L11$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L11$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo07:
+; DARWIN-64-STATIC: leaq _ldst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo07:
+; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo07:
+; DARWIN-64-PIC: leaq _ldst(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @foo08() nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 0), align 4
+ store i32 %1, i32* %0, align 4
+ ret void
+; LINUX-64-STATIC: foo08:
+; LINUX-64-STATIC: movl lsrc(%rip), %
+; LINUX-64-STATIC: movq lptr(%rip), %
+; LINUX-64-STATIC: movl
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: foo08:
+; LINUX-32-STATIC: movl lsrc, %eax
+; LINUX-32-STATIC-NEXT: movl lptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, (%ecx)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: foo08:
+; LINUX-32-PIC: movl lsrc, %eax
+; LINUX-32-PIC-NEXT: movl lptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, (%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: foo08:
+; LINUX-64-PIC: movl lsrc(%rip), %eax
+; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _foo08:
+; DARWIN-32-STATIC: movl _lsrc, %eax
+; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _foo08:
+; DARWIN-32-DYNAMIC: movl _lsrc, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _foo08:
+; DARWIN-32-PIC: call L12$pb
+; DARWIN-32-PIC-NEXT: L12$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl _lsrc-L12$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl _lptr-L12$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _foo08:
+; DARWIN-64-STATIC: movl _lsrc(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _foo08:
+; DARWIN-64-DYNAMIC: movl _lsrc(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _foo08:
+; DARWIN-64-PIC: movl _lsrc(%rip), %eax
+; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux00() nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16), align 4
+ store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16), align 4
+ ret void
+; LINUX-64-STATIC: qux00:
+; LINUX-64-STATIC: movl src+64(%rip), %eax
+; LINUX-64-STATIC: movl %eax, dst+64(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux00:
+; LINUX-32-STATIC: movl src+64, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, dst+64
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: qux00:
+; LINUX-32-PIC: movl src+64, %eax
+; LINUX-32-PIC-NEXT: movl %eax, dst+64
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax), %eax
+; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux00:
+; DARWIN-32-STATIC: movl _src+64, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _dst+64
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux00:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl 64(%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux00:
+; DARWIN-32-PIC: call L13$pb
+; DARWIN-32-PIC-NEXT: L13$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L13$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl 64(%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L13$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qxx00() nounwind {
+entry:
+ %0 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16), align 4
+ store i32 %0, i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16), align 4
+ ret void
+; LINUX-64-STATIC: qxx00:
+; LINUX-64-STATIC: movl xsrc+64(%rip), %eax
+; LINUX-64-STATIC: movl %eax, xdst+64(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qxx00:
+; LINUX-32-STATIC: movl xsrc+64, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, xdst+64
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: qxx00:
+; LINUX-32-PIC: movl xsrc+64, %eax
+; LINUX-32-PIC-NEXT: movl %eax, xdst+64
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qxx00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax), %eax
+; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qxx00:
+; DARWIN-32-STATIC: movl _xsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _xdst+64
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qxx00:
+; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl 64(%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qxx00:
+; DARWIN-32-PIC: call L14$pb
+; DARWIN-32-PIC-NEXT: L14$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L14$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl 64(%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L14$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qxx00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qxx00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qxx00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux01() nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16), i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: qux01:
+; LINUX-64-STATIC: movq $dst+64, ptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux01:
+; LINUX-32-STATIC: movl $dst+64, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: qux01:
+; LINUX-32-PIC: movl $dst+64, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux01:
+; DARWIN-32-STATIC: movl $_dst+64, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux01:
+; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux01:
+; DARWIN-32-PIC: call L15$pb
+; DARWIN-32-PIC-NEXT: L15$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L15$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: addl $64, %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L15$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qxx01() nounwind {
+entry:
+ store i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16), i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: qxx01:
+; LINUX-64-STATIC: movq $xdst+64, ptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qxx01:
+; LINUX-32-STATIC: movl $xdst+64, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: qxx01:
+; LINUX-32-PIC: movl $xdst+64, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qxx01:
+; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qxx01:
+; DARWIN-32-STATIC: movl $_xdst+64, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qxx01:
+; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qxx01:
+; DARWIN-32-PIC: call L16$pb
+; DARWIN-32-PIC-NEXT: L16$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L16$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: addl $64, %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L16$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qxx01:
+; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qxx01:
+; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qxx01:
+; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux02() nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16), align 4
+ %2 = getelementptr i32* %0, i64 16
+ store i32 %1, i32* %2, align 4
+; LINUX-64-STATIC: qux02:
+; LINUX-64-STATIC: movl src+64(%rip), %eax
+; LINUX-64-STATIC: movq ptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 64(%rcx)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux02:
+; LINUX-32-STATIC: movl src+64, %eax
+; LINUX-32-STATIC-NEXT: movl ptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, 64(%ecx)
+; LINUX-32-STATIC-NEXT: ret
+ ret void
+
+; LINUX-32-PIC: qux02:
+; LINUX-32-PIC: movl src+64, %eax
+; LINUX-32-PIC-NEXT: movl ptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, 64(%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux02:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux02:
+; DARWIN-32-STATIC: movl _src+64, %eax
+; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux02:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl 64(%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux02:
+; DARWIN-32-PIC: call L17$pb
+; DARWIN-32-PIC-NEXT: L17$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L17$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl 64(%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L17$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux02:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux02:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux02:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qxx02() nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16), align 4
+ %2 = getelementptr i32* %0, i64 16
+ store i32 %1, i32* %2, align 4
+; LINUX-64-STATIC: qxx02:
+; LINUX-64-STATIC: movl xsrc+64(%rip), %eax
+; LINUX-64-STATIC: movq ptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 64(%rcx)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qxx02:
+; LINUX-32-STATIC: movl xsrc+64, %eax
+; LINUX-32-STATIC-NEXT: movl ptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, 64(%ecx)
+; LINUX-32-STATIC-NEXT: ret
+ ret void
+
+; LINUX-32-PIC: qxx02:
+; LINUX-32-PIC: movl xsrc+64, %eax
+; LINUX-32-PIC-NEXT: movl ptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, 64(%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qxx02:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qxx02:
+; DARWIN-32-STATIC: movl _xsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qxx02:
+; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl 64(%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qxx02:
+; DARWIN-32-PIC: call L18$pb
+; DARWIN-32-PIC-NEXT: L18$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L18$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl 64(%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L18$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qxx02:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qxx02:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qxx02:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux03() nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16), align 32
+ store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16), align 32
+ ret void
+; LINUX-64-STATIC: qux03:
+; LINUX-64-STATIC: movl dsrc+64(%rip), %eax
+; LINUX-64-STATIC: movl %eax, ddst+64(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux03:
+; LINUX-32-STATIC: movl dsrc+64, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ddst+64
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: qux03:
+; LINUX-32-PIC: movl dsrc+64, %eax
+; LINUX-32-PIC-NEXT: movl %eax, ddst+64
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax), %eax
+; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux03:
+; DARWIN-32-STATIC: movl _dsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ddst+64
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux03:
+; DARWIN-32-DYNAMIC: movl _dsrc+64, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ddst+64
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux03:
+; DARWIN-32-PIC: call L19$pb
+; DARWIN-32-PIC-NEXT: L19$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl (_dsrc-L19$pb)+64(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, (_ddst-L19$pb)+64(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux03:
+; DARWIN-64-STATIC: movl _dsrc+64(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movl %eax, _ddst+64(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux03:
+; DARWIN-64-DYNAMIC: movl _dsrc+64(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ddst+64(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux03:
+; DARWIN-64-PIC: movl _dsrc+64(%rip), %eax
+; DARWIN-64-PIC-NEXT: movl %eax, _ddst+64(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux04() nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16), i32** @dptr, align 8
+ ret void
+; LINUX-64-STATIC: qux04:
+; LINUX-64-STATIC: movq $ddst+64, dptr(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux04:
+; LINUX-32-STATIC: movl $ddst+64, dptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: qux04:
+; LINUX-32-PIC: movl $ddst+64, dptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux04:
+; DARWIN-32-STATIC: movl $_ddst+64, _dptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux04:
+; DARWIN-32-DYNAMIC: movl $_ddst+64, _dptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux04:
+; DARWIN-32-PIC: call L20$pb
+; DARWIN-32-PIC-NEXT: L20$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_ddst-L20$pb)+64(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L20$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux04:
+; DARWIN-64-STATIC: leaq _ddst+64(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux04:
+; DARWIN-64-DYNAMIC: leaq _ddst+64(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux04:
+; DARWIN-64-PIC: leaq _ddst+64(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux05() nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16), align 32
+ %2 = getelementptr i32* %0, i64 16
+ store i32 %1, i32* %2, align 4
+; LINUX-64-STATIC: qux05:
+; LINUX-64-STATIC: movl dsrc+64(%rip), %eax
+; LINUX-64-STATIC: movq dptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 64(%rcx)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux05:
+; LINUX-32-STATIC: movl dsrc+64, %eax
+; LINUX-32-STATIC-NEXT: movl dptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, 64(%ecx)
+; LINUX-32-STATIC-NEXT: ret
+ ret void
+
+; LINUX-32-PIC: qux05:
+; LINUX-32-PIC: movl dsrc+64, %eax
+; LINUX-32-PIC-NEXT: movl dptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, 64(%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux05:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax), %eax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux05:
+; DARWIN-32-STATIC: movl _dsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux05:
+; DARWIN-32-DYNAMIC: movl _dsrc+64, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux05:
+; DARWIN-32-PIC: call L21$pb
+; DARWIN-32-PIC-NEXT: L21$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl (_dsrc-L21$pb)+64(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl _dptr-L21$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux05:
+; DARWIN-64-STATIC: movl _dsrc+64(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux05:
+; DARWIN-64-DYNAMIC: movl _dsrc+64(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux05:
+; DARWIN-64-PIC: movl _dsrc+64(%rip), %eax
+; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux06() nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16), align 4
+ store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16), align 4
+ ret void
+; LINUX-64-STATIC: qux06:
+; LINUX-64-STATIC: movl lsrc+64(%rip), %eax
+; LINUX-64-STATIC: movl %eax, ldst+64
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux06:
+; LINUX-32-STATIC: movl lsrc+64, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ldst+64
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: qux06:
+; LINUX-32-PIC: movl lsrc+64, %eax
+; LINUX-32-PIC-NEXT: movl %eax, ldst+64
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux06:
+; LINUX-64-PIC: movl lsrc+64(%rip), %eax
+; LINUX-64-PIC-NEXT: movl %eax, ldst+64(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux06:
+; DARWIN-32-STATIC: movl _lsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ldst+64
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux06:
+; DARWIN-32-DYNAMIC: movl _lsrc+64, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ldst+64
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux06:
+; DARWIN-32-PIC: call L22$pb
+; DARWIN-32-PIC-NEXT: L22$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl (_lsrc-L22$pb)+64(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, (_ldst-L22$pb)+64(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux06:
+; DARWIN-64-STATIC: movl _lsrc+64(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movl %eax, _ldst+64(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux06:
+; DARWIN-64-DYNAMIC: movl _lsrc+64(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ldst+64(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux06:
+; DARWIN-64-PIC: movl _lsrc+64(%rip), %eax
+; DARWIN-64-PIC-NEXT: movl %eax, _ldst+64(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux07() nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16), i32** @lptr, align 8
+ ret void
+; LINUX-64-STATIC: qux07:
+; LINUX-64-STATIC: movq $ldst+64, lptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux07:
+; LINUX-32-STATIC: movl $ldst+64, lptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: qux07:
+; LINUX-32-PIC: movl $ldst+64, lptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux07:
+; LINUX-64-PIC: leaq ldst+64(%rip), %rax
+; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux07:
+; DARWIN-32-STATIC: movl $_ldst+64, _lptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux07:
+; DARWIN-32-DYNAMIC: movl $_ldst+64, _lptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux07:
+; DARWIN-32-PIC: call L23$pb
+; DARWIN-32-PIC-NEXT: L23$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_ldst-L23$pb)+64(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L23$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux07:
+; DARWIN-64-STATIC: leaq _ldst+64(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux07:
+; DARWIN-64-DYNAMIC: leaq _ldst+64(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux07:
+; DARWIN-64-PIC: leaq _ldst+64(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @qux08() nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16), align 4
+ %2 = getelementptr i32* %0, i64 16
+ store i32 %1, i32* %2, align 4
+; LINUX-64-STATIC: qux08:
+; LINUX-64-STATIC: movl lsrc+64(%rip), %eax
+; LINUX-64-STATIC: movq lptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 64(%rcx)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: qux08:
+; LINUX-32-STATIC: movl lsrc+64, %eax
+; LINUX-32-STATIC-NEXT: movl lptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, 64(%ecx)
+; LINUX-32-STATIC-NEXT: ret
+ ret void
+
+; LINUX-32-PIC: qux08:
+; LINUX-32-PIC: movl lsrc+64, %eax
+; LINUX-32-PIC-NEXT: movl lptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, 64(%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: qux08:
+; LINUX-64-PIC: movl lsrc+64(%rip), %eax
+; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _qux08:
+; DARWIN-32-STATIC: movl _lsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _qux08:
+; DARWIN-32-DYNAMIC: movl _lsrc+64, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _qux08:
+; DARWIN-32-PIC: call L24$pb
+; DARWIN-32-PIC-NEXT: L24$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl (_lsrc-L24$pb)+64(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl _lptr-L24$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _qux08:
+; DARWIN-64-STATIC: movl _lsrc+64(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _qux08:
+; DARWIN-64-DYNAMIC: movl _lsrc+64(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _qux08:
+; DARWIN-64-PIC: movl _lsrc+64(%rip), %eax
+; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind00(i64 %i) nounwind {
+entry:
+ %0 = getelementptr [131072 x i32]* @src, i64 0, i64 %i
+ %1 = load i32* %0, align 4
+ %2 = getelementptr [131072 x i32]* @dst, i64 0, i64 %i
+ store i32 %1, i32* %2, align 4
+ ret void
+; LINUX-64-STATIC: ind00:
+; LINUX-64-STATIC: movl src(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, dst(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl src(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, dst(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl src(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, dst(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _src(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _dst(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind00:
+; DARWIN-32-PIC: call L25$pb
+; DARWIN-32-PIC-NEXT: L25$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L25$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl (%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L25$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ixd00(i64 %i) nounwind {
+entry:
+ %0 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %i
+ %1 = load i32* %0, align 4
+ %2 = getelementptr [32 x i32]* @xdst, i64 0, i64 %i
+ store i32 %1, i32* %2, align 4
+ ret void
+; LINUX-64-STATIC: ixd00:
+; LINUX-64-STATIC: movl xsrc(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, xdst(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ixd00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl xsrc(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, xdst(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ixd00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl xsrc(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, xdst(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ixd00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ixd00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _xsrc(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _xdst(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ixd00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ixd00:
+; DARWIN-32-PIC: call L26$pb
+; DARWIN-32-PIC-NEXT: L26$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L26$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl (%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L26$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ixd00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ixd00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ixd00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind01(i64 %i) nounwind {
+entry:
+ %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %i
+ store i32* %0, i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: ind01:
+; LINUX-64-STATIC: leaq dst(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, ptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal dst(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal dst(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind01:
+; LINUX-64-PIC: shlq $2, %rdi
+; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), %rdi
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq %rdi, (%rax)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _dst(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: shll $2, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl L_dst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind01:
+; DARWIN-32-PIC: call L27$pb
+; DARWIN-32-PIC-NEXT: L27$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: shll $2, %ecx
+; DARWIN-32-PIC-NEXT: addl L_dst$non_lazy_ptr-L27$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L27$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind01:
+; DARWIN-64-STATIC: shlq $2, %rdi
+; DARWIN-64-STATIC-NEXT: addq _dst@GOTPCREL(%rip), %rdi
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq %rdi, (%rax)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind01:
+; DARWIN-64-DYNAMIC: shlq $2, %rdi
+; DARWIN-64-DYNAMIC-NEXT: addq _dst@GOTPCREL(%rip), %rdi
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rdi, (%rax)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind01:
+; DARWIN-64-PIC: shlq $2, %rdi
+; DARWIN-64-PIC-NEXT: addq _dst@GOTPCREL(%rip), %rdi
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq %rdi, (%rax)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ixd01(i64 %i) nounwind {
+entry:
+ %0 = getelementptr [32 x i32]* @xdst, i64 0, i64 %i
+ store i32* %0, i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: ixd01:
+; LINUX-64-STATIC: leaq xdst(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, ptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ixd01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal xdst(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ixd01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal xdst(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ixd01:
+; LINUX-64-PIC: shlq $2, %rdi
+; LINUX-64-PIC-NEXT: addq xdst@GOTPCREL(%rip), %rdi
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq %rdi, (%rax)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ixd01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _xdst(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ixd01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: shll $2, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl L_xdst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ixd01:
+; DARWIN-32-PIC: call L28$pb
+; DARWIN-32-PIC-NEXT: L28$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: shll $2, %ecx
+; DARWIN-32-PIC-NEXT: addl L_xdst$non_lazy_ptr-L28$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L28$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ixd01:
+; DARWIN-64-STATIC: shlq $2, %rdi
+; DARWIN-64-STATIC-NEXT: addq _xdst@GOTPCREL(%rip), %rdi
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq %rdi, (%rax)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ixd01:
+; DARWIN-64-DYNAMIC: shlq $2, %rdi
+; DARWIN-64-DYNAMIC-NEXT: addq _xdst@GOTPCREL(%rip), %rdi
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rdi, (%rax)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ixd01:
+; DARWIN-64-PIC: shlq $2, %rdi
+; DARWIN-64-PIC-NEXT: addq _xdst@GOTPCREL(%rip), %rdi
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq %rdi, (%rax)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind02(i64 %i) nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %i
+ %2 = load i32* %1, align 4
+ %3 = getelementptr i32* %0, i64 %i
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: ind02:
+; LINUX-64-STATIC: movl src(,%rdi,4), %eax
+; LINUX-64-STATIC: movq ptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind02:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl src(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl ptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind02:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl src(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl ptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, (%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind02:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind02:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _src(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _ptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind02:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind02:
+; DARWIN-32-PIC: call L29$pb
+; DARWIN-32-PIC-NEXT: L29$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L29$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl (%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L29$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind02:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind02:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind02:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ixd02(i64 %i) nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %i
+ %2 = load i32* %1, align 4
+ %3 = getelementptr i32* %0, i64 %i
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: ixd02:
+; LINUX-64-STATIC: movl xsrc(,%rdi,4), %eax
+; LINUX-64-STATIC: movq ptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ixd02:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl xsrc(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl ptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ixd02:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl xsrc(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl ptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, (%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ixd02:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ixd02:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _xsrc(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _ptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ixd02:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ixd02:
+; DARWIN-32-PIC: call L30$pb
+; DARWIN-32-PIC-NEXT: L30$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L30$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl (%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L30$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ixd02:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ixd02:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ixd02:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind03(i64 %i) nounwind {
+entry:
+ %0 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %i
+ %1 = load i32* %0, align 4
+ %2 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %i
+ store i32 %1, i32* %2, align 4
+ ret void
+; LINUX-64-STATIC: ind03:
+; LINUX-64-STATIC: movl dsrc(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, ddst(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind03:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl dsrc(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, ddst(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind03:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl dsrc(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, ddst(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind03:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _dsrc(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _ddst(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind03:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dsrc(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ddst(,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind03:
+; DARWIN-32-PIC: call L31$pb
+; DARWIN-32-PIC-NEXT: L31$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl _dsrc-L31$pb(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl %edx, _ddst-L31$pb(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind03:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind03:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind03:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind04(i64 %i) nounwind {
+entry:
+ %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %i
+ store i32* %0, i32** @dptr, align 8
+ ret void
+; LINUX-64-STATIC: ind04:
+; LINUX-64-STATIC: leaq ddst(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, dptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind04:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ddst(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, dptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind04:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ddst(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, dptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind04:
+; LINUX-64-PIC: shlq $2, %rdi
+; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), %rdi
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq %rdi, (%rax)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind04:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ddst(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _dptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind04:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ddst(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _dptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind04:
+; DARWIN-32-PIC: call L32$pb
+; DARWIN-32-PIC-NEXT: L32$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal _ddst-L32$pb(%eax,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L32$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind04:
+; DARWIN-64-STATIC: leaq _ddst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq (%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind04:
+; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq (%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind04:
+; DARWIN-64-PIC: leaq _ddst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq (%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind05(i64 %i) nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %i
+ %2 = load i32* %1, align 4
+ %3 = getelementptr i32* %0, i64 %i
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: ind05:
+; LINUX-64-STATIC: movl dsrc(,%rdi,4), %eax
+; LINUX-64-STATIC: movq dptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind05:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl dsrc(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl dptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind05:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl dsrc(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl dptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, (%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind05:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind05:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _dsrc(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _dptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind05:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dsrc(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind05:
+; DARWIN-32-PIC: call L33$pb
+; DARWIN-32-PIC-NEXT: L33$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl _dsrc-L33$pb(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl _dptr-L33$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind05:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind05:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind05:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind06(i64 %i) nounwind {
+entry:
+ %0 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %i
+ %1 = load i32* %0, align 4
+ %2 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %i
+ store i32 %1, i32* %2, align 4
+ ret void
+; LINUX-64-STATIC: ind06:
+; LINUX-64-STATIC: movl lsrc(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, ldst(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind06:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl lsrc(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, ldst(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind06:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl lsrc(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, ldst(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind06:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: leaq ldst(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind06:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _lsrc(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _ldst(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind06:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lsrc(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ldst(,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind06:
+; DARWIN-32-PIC: call L34$pb
+; DARWIN-32-PIC-NEXT: L34$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl _lsrc-L34$pb(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl %edx, _ldst-L34$pb(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind06:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind06:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind06:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind07(i64 %i) nounwind {
+entry:
+ %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %i
+ store i32* %0, i32** @lptr, align 8
+ ret void
+; LINUX-64-STATIC: ind07:
+; LINUX-64-STATIC: leaq ldst(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, lptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind07:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ldst(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, lptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind07:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ldst(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, lptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind07:
+; LINUX-64-PIC: leaq ldst(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq (%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind07:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ldst(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _lptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind07:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ldst(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _lptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind07:
+; DARWIN-32-PIC: call L35$pb
+; DARWIN-32-PIC-NEXT: L35$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal _ldst-L35$pb(%eax,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L35$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind07:
+; DARWIN-64-STATIC: leaq _ldst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq (%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind07:
+; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq (%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind07:
+; DARWIN-64-PIC: leaq _ldst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq (%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ind08(i64 %i) nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %i
+ %2 = load i32* %1, align 4
+ %3 = getelementptr i32* %0, i64 %i
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: ind08:
+; LINUX-64-STATIC: movl lsrc(,%rdi,4), %eax
+; LINUX-64-STATIC: movq lptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ind08:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl lsrc(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl lptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ind08:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl lsrc(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl lptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, (%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ind08:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ind08:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _lsrc(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _lptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ind08:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lsrc(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ind08:
+; DARWIN-32-PIC: call L36$pb
+; DARWIN-32-PIC-NEXT: L36$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl _lsrc-L36$pb(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl _lptr-L36$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ind08:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ind08:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ind08:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off00(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %0
+ %2 = load i32* %1, align 4
+ %3 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: off00:
+; LINUX-64-STATIC: movl src+64(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, dst+64(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl src+64(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, dst+64(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl src+64(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, dst+64(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _src+64(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _dst+64(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl 64(%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off00:
+; DARWIN-32-PIC: call L37$pb
+; DARWIN-32-PIC-NEXT: L37$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L37$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl 64(%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L37$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @oxf00(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %0
+ %2 = load i32* %1, align 4
+ %3 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: oxf00:
+; LINUX-64-STATIC: movl xsrc+64(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, xdst+64(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: oxf00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl xsrc+64(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, xdst+64(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: oxf00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl xsrc+64(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, xdst+64(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: oxf00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _oxf00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _xsrc+64(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _xdst+64(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _oxf00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl 64(%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _oxf00:
+; DARWIN-32-PIC: call L38$pb
+; DARWIN-32-PIC-NEXT: L38$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L38$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl 64(%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L38$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _oxf00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _oxf00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _oxf00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off01(i64 %i) nounwind {
+entry:
+ %.sum = add i64 %i, 16
+ %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %.sum
+ store i32* %0, i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: off01:
+; LINUX-64-STATIC: leaq dst+64(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, ptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal dst+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal dst+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _dst+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off01:
+; DARWIN-32-PIC: call L39$pb
+; DARWIN-32-PIC-NEXT: L39$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L39$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: leal 64(%edx,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L39$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @oxf01(i64 %i) nounwind {
+entry:
+ %.sum = add i64 %i, 16
+ %0 = getelementptr [32 x i32]* @xdst, i64 0, i64 %.sum
+ store i32* %0, i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: oxf01:
+; LINUX-64-STATIC: leaq xdst+64(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, ptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: oxf01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal xdst+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: oxf01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal xdst+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: oxf01:
+; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _oxf01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _xdst+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _oxf01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _oxf01:
+; DARWIN-32-PIC: call L40$pb
+; DARWIN-32-PIC-NEXT: L40$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L40$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: leal 64(%edx,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L40$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _oxf01:
+; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _oxf01:
+; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _oxf01:
+; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off02(i64 %i) nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = add i64 %i, 16
+ %2 = getelementptr [131072 x i32]* @src, i64 0, i64 %1
+ %3 = load i32* %2, align 4
+ %4 = getelementptr i32* %0, i64 %1
+ store i32 %3, i32* %4, align 4
+ ret void
+; LINUX-64-STATIC: off02:
+; LINUX-64-STATIC: movl src+64(,%rdi,4), %eax
+; LINUX-64-STATIC: movq ptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off02:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl src+64(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl ptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off02:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl src+64(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl ptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off02:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off02:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _src+64(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _ptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off02:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl 64(%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off02:
+; DARWIN-32-PIC: call L41$pb
+; DARWIN-32-PIC-NEXT: L41$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L41$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl 64(%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L41$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off02:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off02:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off02:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @oxf02(i64 %i) nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = add i64 %i, 16
+ %2 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %1
+ %3 = load i32* %2, align 4
+ %4 = getelementptr i32* %0, i64 %1
+ store i32 %3, i32* %4, align 4
+ ret void
+; LINUX-64-STATIC: oxf02:
+; LINUX-64-STATIC: movl xsrc+64(,%rdi,4), %eax
+; LINUX-64-STATIC: movq ptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: oxf02:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl xsrc+64(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl ptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: oxf02:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl xsrc+64(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl ptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: oxf02:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _oxf02:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _xsrc+64(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _ptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _oxf02:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl 64(%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _oxf02:
+; DARWIN-32-PIC: call L42$pb
+; DARWIN-32-PIC-NEXT: L42$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L42$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl 64(%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L42$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _oxf02:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _oxf02:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _oxf02:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off03(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %0
+ %2 = load i32* %1, align 4
+ %3 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: off03:
+; LINUX-64-STATIC: movl dsrc+64(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, ddst+64(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off03:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl dsrc+64(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, ddst+64(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off03:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl dsrc+64(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, ddst+64(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off03:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _dsrc+64(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _ddst+64(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off03:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dsrc+64(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ddst+64(,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off03:
+; DARWIN-32-PIC: call L43$pb
+; DARWIN-32-PIC-NEXT: L43$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl (_dsrc-L43$pb)+64(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl %edx, (_ddst-L43$pb)+64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off03:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off03:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off03:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off04(i64 %i) nounwind {
+entry:
+ %.sum = add i64 %i, 16
+ %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %.sum
+ store i32* %0, i32** @dptr, align 8
+ ret void
+; LINUX-64-STATIC: off04:
+; LINUX-64-STATIC: leaq ddst+64(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, dptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off04:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ddst+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, dptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off04:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ddst+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, dptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off04:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ddst+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _dptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off04:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ddst+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _dptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off04:
+; DARWIN-32-PIC: call L44$pb
+; DARWIN-32-PIC-NEXT: L44$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_ddst-L44$pb)+64(%eax,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L44$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off04:
+; DARWIN-64-STATIC: leaq _ddst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off04:
+; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off04:
+; DARWIN-64-PIC: leaq _ddst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off05(i64 %i) nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = add i64 %i, 16
+ %2 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %1
+ %3 = load i32* %2, align 4
+ %4 = getelementptr i32* %0, i64 %1
+ store i32 %3, i32* %4, align 4
+ ret void
+; LINUX-64-STATIC: off05:
+; LINUX-64-STATIC: movl dsrc+64(,%rdi,4), %eax
+; LINUX-64-STATIC: movq dptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off05:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl dsrc+64(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl dptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off05:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl dsrc+64(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl dptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off05:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off05:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _dsrc+64(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _dptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off05:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dsrc+64(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off05:
+; DARWIN-32-PIC: call L45$pb
+; DARWIN-32-PIC-NEXT: L45$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl (_dsrc-L45$pb)+64(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl _dptr-L45$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off05:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off05:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off05:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off06(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %0
+ %2 = load i32* %1, align 4
+ %3 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: off06:
+; LINUX-64-STATIC: movl lsrc+64(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, ldst+64(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off06:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl lsrc+64(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, ldst+64(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off06:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl lsrc+64(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, ldst+64(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off06:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: leaq ldst(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off06:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _lsrc+64(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _ldst+64(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off06:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lsrc+64(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ldst+64(,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off06:
+; DARWIN-32-PIC: call L46$pb
+; DARWIN-32-PIC-NEXT: L46$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl (_lsrc-L46$pb)+64(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl %edx, (_ldst-L46$pb)+64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off06:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off06:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off06:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off07(i64 %i) nounwind {
+entry:
+ %.sum = add i64 %i, 16
+ %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %.sum
+ store i32* %0, i32** @lptr, align 8
+ ret void
+; LINUX-64-STATIC: off07:
+; LINUX-64-STATIC: leaq ldst+64(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, lptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off07:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ldst+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, lptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off07:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ldst+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, lptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off07:
+; LINUX-64-PIC: leaq ldst(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off07:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ldst+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _lptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off07:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ldst+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _lptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off07:
+; DARWIN-32-PIC: call L47$pb
+; DARWIN-32-PIC-NEXT: L47$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_ldst-L47$pb)+64(%eax,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L47$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off07:
+; DARWIN-64-STATIC: leaq _ldst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off07:
+; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off07:
+; DARWIN-64-PIC: leaq _ldst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @off08(i64 %i) nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = add i64 %i, 16
+ %2 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %1
+ %3 = load i32* %2, align 4
+ %4 = getelementptr i32* %0, i64 %1
+ store i32 %3, i32* %4, align 4
+ ret void
+; LINUX-64-STATIC: off08:
+; LINUX-64-STATIC: movl lsrc+64(,%rdi,4), %eax
+; LINUX-64-STATIC: movq lptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: off08:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl lsrc+64(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl lptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: off08:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl lsrc+64(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl lptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: off08:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _off08:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _lsrc+64(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _lptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _off08:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lsrc+64(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _off08:
+; DARWIN-32-PIC: call L48$pb
+; DARWIN-32-PIC-NEXT: L48$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl (_lsrc-L48$pb)+64(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl _lptr-L48$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _off08:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _off08:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _off08:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo00(i64 %i) nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 65536), align 4
+ store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536), align 4
+ ret void
+; LINUX-64-STATIC: moo00:
+; LINUX-64-STATIC: movl src+262144(%rip), %eax
+; LINUX-64-STATIC: movl %eax, dst+262144(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo00:
+; LINUX-32-STATIC: movl src+262144, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, dst+262144
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo00:
+; LINUX-32-PIC: movl src+262144, %eax
+; LINUX-32-PIC-NEXT: movl %eax, dst+262144
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax), %eax
+; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo00:
+; DARWIN-32-STATIC: movl _src+262144, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _dst+262144
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo00:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl 262144(%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 262144(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo00:
+; DARWIN-32-PIC: call L49$pb
+; DARWIN-32-PIC-NEXT: L49$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L49$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl 262144(%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L49$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 262144(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 262144(%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 262144(%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo01(i64 %i) nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536), i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: moo01:
+; LINUX-64-STATIC: movq $dst+262144, ptr(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo01:
+; LINUX-32-STATIC: movl $dst+262144, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo01:
+; LINUX-32-PIC: movl $dst+262144, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo01:
+; LINUX-64-PIC: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo01:
+; DARWIN-32-STATIC: movl $_dst+262144, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo01:
+; DARWIN-32-DYNAMIC: movl $262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl L_dst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo01:
+; DARWIN-32-PIC: call L50$pb
+; DARWIN-32-PIC-NEXT: L50$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl $262144, %ecx
+; DARWIN-32-PIC-NEXT: addl L_dst$non_lazy_ptr-L50$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L50$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo01:
+; DARWIN-64-STATIC: movl $262144, %eax
+; DARWIN-64-STATIC-NEXT: addq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo01:
+; DARWIN-64-DYNAMIC: movl $262144, %eax
+; DARWIN-64-DYNAMIC-NEXT: addq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo01:
+; DARWIN-64-PIC: movl $262144, %eax
+; DARWIN-64-PIC-NEXT: addq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo02(i64 %i) nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 65536), align 4
+ %2 = getelementptr i32* %0, i64 65536
+ store i32 %1, i32* %2, align 4
+ ret void
+; LINUX-64-STATIC: moo02:
+; LINUX-64-STATIC: movl src+262144(%rip), %eax
+; LINUX-64-STATIC: movq ptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 262144(%rcx)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo02:
+; LINUX-32-STATIC: movl src+262144, %eax
+; LINUX-32-STATIC-NEXT: movl ptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, 262144(%ecx)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo02:
+; LINUX-32-PIC: movl src+262144, %eax
+; LINUX-32-PIC-NEXT: movl ptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, 262144(%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo02:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo02:
+; DARWIN-32-STATIC: movl _src+262144, %eax
+; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, 262144(%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo02:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl 262144(%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 262144(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo02:
+; DARWIN-32-PIC: call L51$pb
+; DARWIN-32-PIC-NEXT: L51$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L51$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl 262144(%ecx), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L51$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 262144(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo02:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 262144(%rax), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo02:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo02:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 262144(%rax), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo03(i64 %i) nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 65536), align 32
+ store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536), align 32
+ ret void
+; LINUX-64-STATIC: moo03:
+; LINUX-64-STATIC: movl dsrc+262144(%rip), %eax
+; LINUX-64-STATIC: movl %eax, ddst+262144(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo03:
+; LINUX-32-STATIC: movl dsrc+262144, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ddst+262144
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo03:
+; LINUX-32-PIC: movl dsrc+262144, %eax
+; LINUX-32-PIC-NEXT: movl %eax, ddst+262144
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax), %eax
+; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo03:
+; DARWIN-32-STATIC: movl _dsrc+262144, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ddst+262144
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo03:
+; DARWIN-32-DYNAMIC: movl _dsrc+262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ddst+262144
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo03:
+; DARWIN-32-PIC: call L52$pb
+; DARWIN-32-PIC-NEXT: L52$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl (_dsrc-L52$pb)+262144(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, (_ddst-L52$pb)+262144(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo03:
+; DARWIN-64-STATIC: movl _dsrc+262144(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movl %eax, _ddst+262144(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo03:
+; DARWIN-64-DYNAMIC: movl _dsrc+262144(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ddst+262144(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo03:
+; DARWIN-64-PIC: movl _dsrc+262144(%rip), %eax
+; DARWIN-64-PIC-NEXT: movl %eax, _ddst+262144(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo04(i64 %i) nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536), i32** @dptr, align 8
+ ret void
+; LINUX-64-STATIC: moo04:
+; LINUX-64-STATIC: movq $ddst+262144, dptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo04:
+; LINUX-32-STATIC: movl $ddst+262144, dptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo04:
+; LINUX-32-PIC: movl $ddst+262144, dptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo04:
+; LINUX-64-PIC: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo04:
+; DARWIN-32-STATIC: movl $_ddst+262144, _dptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo04:
+; DARWIN-32-DYNAMIC: movl $_ddst+262144, _dptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo04:
+; DARWIN-32-PIC: call L53$pb
+; DARWIN-32-PIC-NEXT: L53$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_ddst-L53$pb)+262144(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L53$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo04:
+; DARWIN-64-STATIC: leaq _ddst+262144(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo04:
+; DARWIN-64-DYNAMIC: leaq _ddst+262144(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo04:
+; DARWIN-64-PIC: leaq _ddst+262144(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo05(i64 %i) nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 65536), align 32
+ %2 = getelementptr i32* %0, i64 65536
+ store i32 %1, i32* %2, align 4
+ ret void
+; LINUX-64-STATIC: moo05:
+; LINUX-64-STATIC: movl dsrc+262144(%rip), %eax
+; LINUX-64-STATIC: movq dptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 262144(%rcx)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo05:
+; LINUX-32-STATIC: movl dsrc+262144, %eax
+; LINUX-32-STATIC-NEXT: movl dptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, 262144(%ecx)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo05:
+; LINUX-32-PIC: movl dsrc+262144, %eax
+; LINUX-32-PIC-NEXT: movl dptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, 262144(%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo05:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax), %eax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo05:
+; DARWIN-32-STATIC: movl _dsrc+262144, %eax
+; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, 262144(%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo05:
+; DARWIN-32-DYNAMIC: movl _dsrc+262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 262144(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo05:
+; DARWIN-32-PIC: call L54$pb
+; DARWIN-32-PIC-NEXT: L54$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl (_dsrc-L54$pb)+262144(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl _dptr-L54$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 262144(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo05:
+; DARWIN-64-STATIC: movl _dsrc+262144(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo05:
+; DARWIN-64-DYNAMIC: movl _dsrc+262144(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo05:
+; DARWIN-64-PIC: movl _dsrc+262144(%rip), %eax
+; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo06(i64 %i) nounwind {
+entry:
+ %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 65536), align 4
+ store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536), align 4
+ ret void
+; LINUX-64-STATIC: moo06:
+; LINUX-64-STATIC: movl lsrc+262144(%rip), %eax
+; LINUX-64-STATIC: movl %eax, ldst+262144(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo06:
+; LINUX-32-STATIC: movl lsrc+262144, %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ldst+262144
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo06:
+; LINUX-32-PIC: movl lsrc+262144, %eax
+; LINUX-32-PIC-NEXT: movl %eax, ldst+262144
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo06:
+; LINUX-64-PIC: movl lsrc+262144(%rip), %eax
+; LINUX-64-PIC-NEXT: movl %eax, ldst+262144(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo06:
+; DARWIN-32-STATIC: movl _lsrc+262144, %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ldst+262144
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo06:
+; DARWIN-32-DYNAMIC: movl _lsrc+262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ldst+262144
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo06:
+; DARWIN-32-PIC: call L55$pb
+; DARWIN-32-PIC-NEXT: L55$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl (_lsrc-L55$pb)+262144(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, (_ldst-L55$pb)+262144(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo06:
+; DARWIN-64-STATIC: movl _lsrc+262144(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movl %eax, _ldst+262144(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo06:
+; DARWIN-64-DYNAMIC: movl _lsrc+262144(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ldst+262144(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo06:
+; DARWIN-64-PIC: movl _lsrc+262144(%rip), %eax
+; DARWIN-64-PIC-NEXT: movl %eax, _ldst+262144(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo07(i64 %i) nounwind {
+entry:
+ store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536), i32** @lptr, align 8
+ ret void
+; LINUX-64-STATIC: moo07:
+; LINUX-64-STATIC: movq $ldst+262144, lptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo07:
+; LINUX-32-STATIC: movl $ldst+262144, lptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo07:
+; LINUX-32-PIC: movl $ldst+262144, lptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo07:
+; LINUX-64-PIC: leaq ldst+262144(%rip), %rax
+; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo07:
+; DARWIN-32-STATIC: movl $_ldst+262144, _lptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo07:
+; DARWIN-32-DYNAMIC: movl $_ldst+262144, _lptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo07:
+; DARWIN-32-PIC: call L56$pb
+; DARWIN-32-PIC-NEXT: L56$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_ldst-L56$pb)+262144(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L56$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo07:
+; DARWIN-64-STATIC: leaq _ldst+262144(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo07:
+; DARWIN-64-DYNAMIC: leaq _ldst+262144(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo07:
+; DARWIN-64-PIC: leaq _ldst+262144(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @moo08(i64 %i) nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 65536), align 4
+ %2 = getelementptr i32* %0, i64 65536
+ store i32 %1, i32* %2, align 4
+ ret void
+; LINUX-64-STATIC: moo08:
+; LINUX-64-STATIC: movl lsrc+262144(%rip), %eax
+; LINUX-64-STATIC: movq lptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 262144(%rcx)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: moo08:
+; LINUX-32-STATIC: movl lsrc+262144, %eax
+; LINUX-32-STATIC-NEXT: movl lptr, %ecx
+; LINUX-32-STATIC-NEXT: movl %eax, 262144(%ecx)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: moo08:
+; LINUX-32-PIC: movl lsrc+262144, %eax
+; LINUX-32-PIC-NEXT: movl lptr, %ecx
+; LINUX-32-PIC-NEXT: movl %eax, 262144(%ecx)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: moo08:
+; LINUX-64-PIC: movl lsrc+262144(%rip), %eax
+; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _moo08:
+; DARWIN-32-STATIC: movl _lsrc+262144, %eax
+; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-STATIC-NEXT: movl %eax, 262144(%ecx)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _moo08:
+; DARWIN-32-DYNAMIC: movl _lsrc+262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, 262144(%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _moo08:
+; DARWIN-32-PIC: call L57$pb
+; DARWIN-32-PIC-NEXT: L57$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl (_lsrc-L57$pb)+262144(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl _lptr-L57$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, 262144(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _moo08:
+; DARWIN-64-STATIC: movl _lsrc+262144(%rip), %eax
+; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _moo08:
+; DARWIN-64-DYNAMIC: movl _lsrc+262144(%rip), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _moo08:
+; DARWIN-64-PIC: movl _lsrc+262144(%rip), %eax
+; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big00(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %0
+ %2 = load i32* %1, align 4
+ %3 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: big00:
+; LINUX-64-STATIC: movl src+262144(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, dst+262144(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl src+262144(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, dst+262144(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl src+262144(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, dst+262144(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _src+262144(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _dst+262144(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl 262144(%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big00:
+; DARWIN-32-PIC: call L58$pb
+; DARWIN-32-PIC-NEXT: L58$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L58$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl 262144(%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L58$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big01(i64 %i) nounwind {
+entry:
+ %.sum = add i64 %i, 65536
+ %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %.sum
+ store i32* %0, i32** @ptr, align 8
+ ret void
+; LINUX-64-STATIC: big01:
+; LINUX-64-STATIC: leaq dst+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, ptr(%rip)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal dst+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, ptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal dst+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, ptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _dst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _ptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big01:
+; DARWIN-32-PIC: call L59$pb
+; DARWIN-32-PIC-NEXT: L59$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L59$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: leal 262144(%edx,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L59$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %ecx, (%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq %rax, (%rcx)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big02(i64 %i) nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = add i64 %i, 65536
+ %2 = getelementptr [131072 x i32]* @src, i64 0, i64 %1
+ %3 = load i32* %2, align 4
+ %4 = getelementptr i32* %0, i64 %1
+ store i32 %3, i32* %4, align 4
+ ret void
+; LINUX-64-STATIC: big02:
+; LINUX-64-STATIC: movl src+262144(,%rdi,4), %eax
+; LINUX-64-STATIC: movq ptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big02:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl src+262144(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl ptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big02:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl src+262144(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl ptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big02:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big02:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _src+262144(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _ptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big02:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl 262144(%ecx,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big02:
+; DARWIN-32-PIC: call L60$pb
+; DARWIN-32-PIC-NEXT: L60$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L60$pb(%eax), %edx
+; DARWIN-32-PIC-NEXT: movl 262144(%edx,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L60$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big02:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big02:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big02:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big03(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %0
+ %2 = load i32* %1, align 4
+ %3 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: big03:
+; LINUX-64-STATIC: movl dsrc+262144(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, ddst+262144(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big03:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl dsrc+262144(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, ddst+262144(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big03:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl dsrc+262144(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, ddst+262144(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big03:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _dsrc+262144(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _ddst+262144(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big03:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dsrc+262144(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ddst+262144(,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big03:
+; DARWIN-32-PIC: call L61$pb
+; DARWIN-32-PIC-NEXT: L61$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl (_dsrc-L61$pb)+262144(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl %edx, (_ddst-L61$pb)+262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big03:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big03:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big03:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: leaq _ddst(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big04(i64 %i) nounwind {
+entry:
+ %.sum = add i64 %i, 65536
+ %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %.sum
+ store i32* %0, i32** @dptr, align 8
+ ret void
+; LINUX-64-STATIC: big04:
+; LINUX-64-STATIC: leaq ddst+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, dptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big04:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ddst+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, dptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big04:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ddst+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, dptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq %rax, (%rcx)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big04:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ddst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _dptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big04:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ddst+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _dptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big04:
+; DARWIN-32-PIC: call L62$pb
+; DARWIN-32-PIC-NEXT: L62$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_ddst-L62$pb)+262144(%eax,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L62$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big04:
+; DARWIN-64-STATIC: leaq _ddst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big04:
+; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big04:
+; DARWIN-64-PIC: leaq _ddst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big05(i64 %i) nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = add i64 %i, 65536
+ %2 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %1
+ %3 = load i32* %2, align 4
+ %4 = getelementptr i32* %0, i64 %1
+ store i32 %3, i32* %4, align 4
+ ret void
+; LINUX-64-STATIC: big05:
+; LINUX-64-STATIC: movl dsrc+262144(,%rdi,4), %eax
+; LINUX-64-STATIC: movq dptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big05:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl dsrc+262144(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl dptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big05:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl dsrc+262144(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl dptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big05:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movq (%rcx), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big05:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _dsrc+262144(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _dptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big05:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dsrc+262144(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big05:
+; DARWIN-32-PIC: call L63$pb
+; DARWIN-32-PIC-NEXT: L63$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl (_dsrc-L63$pb)+262144(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl _dptr-L63$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big05:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big05:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big05:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big06(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %0
+ %2 = load i32* %1, align 4
+ %3 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0
+ store i32 %2, i32* %3, align 4
+ ret void
+; LINUX-64-STATIC: big06:
+; LINUX-64-STATIC: movl lsrc+262144(,%rdi,4), %eax
+; LINUX-64-STATIC: movl %eax, ldst+262144(,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big06:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl lsrc+262144(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl %ecx, ldst+262144(,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big06:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl lsrc+262144(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl %ecx, ldst+262144(,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big06:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: leaq ldst(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big06:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _lsrc+262144(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl %ecx, _ldst+262144(,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big06:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lsrc+262144(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ldst+262144(,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big06:
+; DARWIN-32-PIC: call L64$pb
+; DARWIN-32-PIC-NEXT: L64$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl (_lsrc-L64$pb)+262144(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl %edx, (_ldst-L64$pb)+262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big06:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big06:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big06:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: leaq _ldst(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big07(i64 %i) nounwind {
+entry:
+ %.sum = add i64 %i, 65536
+ %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %.sum
+ store i32* %0, i32** @lptr, align 8
+ ret void
+; LINUX-64-STATIC: big07:
+; LINUX-64-STATIC: leaq ldst+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: movq %rax, lptr
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big07:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ldst+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: movl %eax, lptr
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big07:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ldst+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: movl %eax, lptr
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big07:
+; LINUX-64-PIC: leaq ldst(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big07:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ldst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: movl %eax, _lptr
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big07:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ldst+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl %eax, _lptr
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big07:
+; DARWIN-32-PIC: call L65$pb
+; DARWIN-32-PIC-NEXT: L65$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_ldst-L65$pb)+262144(%eax,%ecx,4), %ecx
+; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L65$pb(%eax)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big07:
+; DARWIN-64-STATIC: leaq _ldst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big07:
+; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big07:
+; DARWIN-64-PIC: leaq _ldst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @big08(i64 %i) nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = add i64 %i, 65536
+ %2 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %1
+ %3 = load i32* %2, align 4
+ %4 = getelementptr i32* %0, i64 %1
+ store i32 %3, i32* %4, align 4
+ ret void
+; LINUX-64-STATIC: big08:
+; LINUX-64-STATIC: movl lsrc+262144(,%rdi,4), %eax
+; LINUX-64-STATIC: movq lptr(%rip), %rcx
+; LINUX-64-STATIC: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: big08:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl lsrc+262144(,%eax,4), %ecx
+; LINUX-32-STATIC-NEXT: movl lptr, %edx
+; LINUX-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: big08:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl lsrc+262144(,%eax,4), %ecx
+; LINUX-32-PIC-NEXT: movl lptr, %edx
+; LINUX-32-PIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: big08:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _big08:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _lsrc+262144(,%eax,4), %ecx
+; DARWIN-32-STATIC-NEXT: movl _lptr, %edx
+; DARWIN-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _big08:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lsrc+262144(,%eax,4), %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %edx
+; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 262144(%edx,%eax,4)
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _big08:
+; DARWIN-32-PIC: call L66$pb
+; DARWIN-32-PIC-NEXT: L66$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl (_lsrc-L66$pb)+262144(%eax,%ecx,4), %edx
+; DARWIN-32-PIC-NEXT: movl _lptr-L66$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl %edx, 262144(%eax,%ecx,4)
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _big08:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _big08:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _big08:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax
+; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4)
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar00() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @src to i8*)
+; LINUX-64-STATIC: bar00:
+; LINUX-64-STATIC: movl $src, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar00:
+; LINUX-32-STATIC: movl $src, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar00:
+; LINUX-32-PIC: movl $src, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar00:
+; DARWIN-32-STATIC: movl $_src, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar00:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar00:
+; DARWIN-32-PIC: call L67$pb
+; DARWIN-32-PIC-NEXT: L67$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L67$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bxr00() nounwind {
+entry:
+ ret i8* bitcast ([32 x i32]* @xsrc to i8*)
+; LINUX-64-STATIC: bxr00:
+; LINUX-64-STATIC: movl $xsrc, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bxr00:
+; LINUX-32-STATIC: movl $xsrc, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bxr00:
+; LINUX-32-PIC: movl $xsrc, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bxr00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bxr00:
+; DARWIN-32-STATIC: movl $_xsrc, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bxr00:
+; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bxr00:
+; DARWIN-32-PIC: call L68$pb
+; DARWIN-32-PIC-NEXT: L68$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L68$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bxr00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bxr00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bxr00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar01() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @dst to i8*)
+; LINUX-64-STATIC: bar01:
+; LINUX-64-STATIC: movl $dst, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar01:
+; LINUX-32-STATIC: movl $dst, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar01:
+; LINUX-32-PIC: movl $dst, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar01:
+; DARWIN-32-STATIC: movl $_dst, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar01:
+; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar01:
+; DARWIN-32-PIC: call L69$pb
+; DARWIN-32-PIC-NEXT: L69$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L69$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bxr01() nounwind {
+entry:
+ ret i8* bitcast ([32 x i32]* @xdst to i8*)
+; LINUX-64-STATIC: bxr01:
+; LINUX-64-STATIC: movl $xdst, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bxr01:
+; LINUX-32-STATIC: movl $xdst, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bxr01:
+; LINUX-32-PIC: movl $xdst, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bxr01:
+; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bxr01:
+; DARWIN-32-STATIC: movl $_xdst, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bxr01:
+; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bxr01:
+; DARWIN-32-PIC: call L70$pb
+; DARWIN-32-PIC-NEXT: L70$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L70$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bxr01:
+; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bxr01:
+; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bxr01:
+; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar02() nounwind {
+entry:
+ ret i8* bitcast (i32** @ptr to i8*)
+; LINUX-64-STATIC: bar02:
+; LINUX-64-STATIC: movl $ptr, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar02:
+; LINUX-32-STATIC: movl $ptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar02:
+; LINUX-32-PIC: movl $ptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar02:
+; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar02:
+; DARWIN-32-STATIC: movl $_ptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar02:
+; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar02:
+; DARWIN-32-PIC: call L71$pb
+; DARWIN-32-PIC-NEXT: L71$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L71$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar02:
+; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar02:
+; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar02:
+; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar03() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @dsrc to i8*)
+; LINUX-64-STATIC: bar03:
+; LINUX-64-STATIC: movl $dsrc, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar03:
+; LINUX-32-STATIC: movl $dsrc, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar03:
+; LINUX-32-PIC: movl $dsrc, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar03:
+; DARWIN-32-STATIC: movl $_dsrc, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar03:
+; DARWIN-32-DYNAMIC: movl $_dsrc, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar03:
+; DARWIN-32-PIC: call L72$pb
+; DARWIN-32-PIC-NEXT: L72$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _dsrc-L72$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar03:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar03:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar03:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar04() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @ddst to i8*)
+; LINUX-64-STATIC: bar04:
+; LINUX-64-STATIC: movl $ddst, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar04:
+; LINUX-32-STATIC: movl $ddst, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar04:
+; LINUX-32-PIC: movl $ddst, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar04:
+; DARWIN-32-STATIC: movl $_ddst, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar04:
+; DARWIN-32-DYNAMIC: movl $_ddst, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar04:
+; DARWIN-32-PIC: call L73$pb
+; DARWIN-32-PIC-NEXT: L73$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _ddst-L73$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar04:
+; DARWIN-64-STATIC: leaq _ddst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar04:
+; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar04:
+; DARWIN-64-PIC: leaq _ddst(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar05() nounwind {
+entry:
+ ret i8* bitcast (i32** @dptr to i8*)
+; LINUX-64-STATIC: bar05:
+; LINUX-64-STATIC: movl $dptr, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar05:
+; LINUX-32-STATIC: movl $dptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar05:
+; LINUX-32-PIC: movl $dptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar05:
+; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar05:
+; DARWIN-32-STATIC: movl $_dptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar05:
+; DARWIN-32-DYNAMIC: movl $_dptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar05:
+; DARWIN-32-PIC: call L74$pb
+; DARWIN-32-PIC-NEXT: L74$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _dptr-L74$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar05:
+; DARWIN-64-STATIC: leaq _dptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar05:
+; DARWIN-64-DYNAMIC: leaq _dptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar05:
+; DARWIN-64-PIC: leaq _dptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar06() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @lsrc to i8*)
+; LINUX-64-STATIC: bar06:
+; LINUX-64-STATIC: movl $lsrc, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar06:
+; LINUX-32-STATIC: movl $lsrc, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar06:
+; LINUX-32-PIC: movl $lsrc, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar06:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar06:
+; DARWIN-32-STATIC: movl $_lsrc, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar06:
+; DARWIN-32-DYNAMIC: movl $_lsrc, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar06:
+; DARWIN-32-PIC: call L75$pb
+; DARWIN-32-PIC-NEXT: L75$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _lsrc-L75$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar06:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar06:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar06:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar07() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @ldst to i8*)
+; LINUX-64-STATIC: bar07:
+; LINUX-64-STATIC: movl $ldst, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar07:
+; LINUX-32-STATIC: movl $ldst, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar07:
+; LINUX-32-PIC: movl $ldst, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar07:
+; LINUX-64-PIC: leaq ldst(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar07:
+; DARWIN-32-STATIC: movl $_ldst, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar07:
+; DARWIN-32-DYNAMIC: movl $_ldst, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar07:
+; DARWIN-32-PIC: call L76$pb
+; DARWIN-32-PIC-NEXT: L76$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _ldst-L76$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar07:
+; DARWIN-64-STATIC: leaq _ldst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar07:
+; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar07:
+; DARWIN-64-PIC: leaq _ldst(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bar08() nounwind {
+entry:
+ ret i8* bitcast (i32** @lptr to i8*)
+; LINUX-64-STATIC: bar08:
+; LINUX-64-STATIC: movl $lptr, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bar08:
+; LINUX-32-STATIC: movl $lptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bar08:
+; LINUX-32-PIC: movl $lptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bar08:
+; LINUX-64-PIC: leaq lptr(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bar08:
+; DARWIN-32-STATIC: movl $_lptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bar08:
+; DARWIN-32-DYNAMIC: movl $_lptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bar08:
+; DARWIN-32-PIC: call L77$pb
+; DARWIN-32-PIC-NEXT: L77$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _lptr-L77$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bar08:
+; DARWIN-64-STATIC: leaq _lptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bar08:
+; DARWIN-64-DYNAMIC: leaq _lptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bar08:
+; DARWIN-64-PIC: leaq _lptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har00() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @src to i8*)
+; LINUX-64-STATIC: har00:
+; LINUX-64-STATIC: movl $src, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har00:
+; LINUX-32-STATIC: movl $src, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har00:
+; LINUX-32-PIC: movl $src, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har00:
+; DARWIN-32-STATIC: movl $_src, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har00:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har00:
+; DARWIN-32-PIC: call L78$pb
+; DARWIN-32-PIC-NEXT: L78$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L78$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @hxr00() nounwind {
+entry:
+ ret i8* bitcast ([32 x i32]* @xsrc to i8*)
+; LINUX-64-STATIC: hxr00:
+; LINUX-64-STATIC: movl $xsrc, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: hxr00:
+; LINUX-32-STATIC: movl $xsrc, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: hxr00:
+; LINUX-32-PIC: movl $xsrc, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: hxr00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _hxr00:
+; DARWIN-32-STATIC: movl $_xsrc, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _hxr00:
+; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _hxr00:
+; DARWIN-32-PIC: call L79$pb
+; DARWIN-32-PIC-NEXT: L79$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L79$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _hxr00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _hxr00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _hxr00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har01() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @dst to i8*)
+; LINUX-64-STATIC: har01:
+; LINUX-64-STATIC: movl $dst, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har01:
+; LINUX-32-STATIC: movl $dst, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har01:
+; LINUX-32-PIC: movl $dst, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har01:
+; DARWIN-32-STATIC: movl $_dst, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har01:
+; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har01:
+; DARWIN-32-PIC: call L80$pb
+; DARWIN-32-PIC-NEXT: L80$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L80$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @hxr01() nounwind {
+entry:
+ ret i8* bitcast ([32 x i32]* @xdst to i8*)
+; LINUX-64-STATIC: hxr01:
+; LINUX-64-STATIC: movl $xdst, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: hxr01:
+; LINUX-32-STATIC: movl $xdst, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: hxr01:
+; LINUX-32-PIC: movl $xdst, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: hxr01:
+; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _hxr01:
+; DARWIN-32-STATIC: movl $_xdst, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _hxr01:
+; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _hxr01:
+; DARWIN-32-PIC: call L81$pb
+; DARWIN-32-PIC-NEXT: L81$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L81$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _hxr01:
+; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _hxr01:
+; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _hxr01:
+; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har02() nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = bitcast i32* %0 to i8*
+ ret i8* %1
+; LINUX-64-STATIC: har02:
+; LINUX-64-STATIC: movq ptr(%rip), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har02:
+; LINUX-32-STATIC: movl ptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har02:
+; LINUX-32-PIC: movl ptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har02:
+; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq (%rax), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har02:
+; DARWIN-32-STATIC: movl _ptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har02:
+; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har02:
+; DARWIN-32-PIC: call L82$pb
+; DARWIN-32-PIC-NEXT: L82$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L82$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har02:
+; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq (%rax), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har02:
+; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq (%rax), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har02:
+; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq (%rax), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har03() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @dsrc to i8*)
+; LINUX-64-STATIC: har03:
+; LINUX-64-STATIC: movl $dsrc, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har03:
+; LINUX-32-STATIC: movl $dsrc, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har03:
+; LINUX-32-PIC: movl $dsrc, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har03:
+; DARWIN-32-STATIC: movl $_dsrc, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har03:
+; DARWIN-32-DYNAMIC: movl $_dsrc, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har03:
+; DARWIN-32-PIC: call L83$pb
+; DARWIN-32-PIC-NEXT: L83$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _dsrc-L83$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har03:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har03:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har03:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har04() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @ddst to i8*)
+; LINUX-64-STATIC: har04:
+; LINUX-64-STATIC: movl $ddst, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har04:
+; LINUX-32-STATIC: movl $ddst, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har04:
+; LINUX-32-PIC: movl $ddst, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har04:
+; DARWIN-32-STATIC: movl $_ddst, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har04:
+; DARWIN-32-DYNAMIC: movl $_ddst, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har04:
+; DARWIN-32-PIC: call L84$pb
+; DARWIN-32-PIC-NEXT: L84$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _ddst-L84$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har04:
+; DARWIN-64-STATIC: leaq _ddst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har04:
+; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har04:
+; DARWIN-64-PIC: leaq _ddst(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har05() nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = bitcast i32* %0 to i8*
+ ret i8* %1
+; LINUX-64-STATIC: har05:
+; LINUX-64-STATIC: movq dptr(%rip), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har05:
+; LINUX-32-STATIC: movl dptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har05:
+; LINUX-32-PIC: movl dptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har05:
+; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq (%rax), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har05:
+; DARWIN-32-STATIC: movl _dptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har05:
+; DARWIN-32-DYNAMIC: movl _dptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har05:
+; DARWIN-32-PIC: call L85$pb
+; DARWIN-32-PIC-NEXT: L85$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl _dptr-L85$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har05:
+; DARWIN-64-STATIC: movq _dptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har05:
+; DARWIN-64-DYNAMIC: movq _dptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har05:
+; DARWIN-64-PIC: movq _dptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har06() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @lsrc to i8*)
+; LINUX-64-STATIC: har06:
+; LINUX-64-STATIC: movl $lsrc, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har06:
+; LINUX-32-STATIC: movl $lsrc, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har06:
+; LINUX-32-PIC: movl $lsrc, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har06:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har06:
+; DARWIN-32-STATIC: movl $_lsrc, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har06:
+; DARWIN-32-DYNAMIC: movl $_lsrc, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har06:
+; DARWIN-32-PIC: call L86$pb
+; DARWIN-32-PIC-NEXT: L86$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _lsrc-L86$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har06:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har06:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har06:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har07() nounwind {
+entry:
+ ret i8* bitcast ([131072 x i32]* @ldst to i8*)
+; LINUX-64-STATIC: har07:
+; LINUX-64-STATIC: movl $ldst, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har07:
+; LINUX-32-STATIC: movl $ldst, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har07:
+; LINUX-32-PIC: movl $ldst, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har07:
+; LINUX-64-PIC: leaq ldst(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har07:
+; DARWIN-32-STATIC: movl $_ldst, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har07:
+; DARWIN-32-DYNAMIC: movl $_ldst, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har07:
+; DARWIN-32-PIC: call L87$pb
+; DARWIN-32-PIC-NEXT: L87$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _ldst-L87$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har07:
+; DARWIN-64-STATIC: leaq _ldst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har07:
+; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har07:
+; DARWIN-64-PIC: leaq _ldst(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @har08() nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = bitcast i32* %0 to i8*
+ ret i8* %1
+; LINUX-64-STATIC: har08:
+; LINUX-64-STATIC: movq lptr(%rip), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: har08:
+; LINUX-32-STATIC: movl lptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: har08:
+; LINUX-32-PIC: movl lptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: har08:
+; LINUX-64-PIC: movq lptr(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _har08:
+; DARWIN-32-STATIC: movl _lptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _har08:
+; DARWIN-32-DYNAMIC: movl _lptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _har08:
+; DARWIN-32-PIC: call L88$pb
+; DARWIN-32-PIC-NEXT: L88$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl _lptr-L88$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _har08:
+; DARWIN-64-STATIC: movq _lptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _har08:
+; DARWIN-64-DYNAMIC: movq _lptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _har08:
+; DARWIN-64-PIC: movq _lptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat00() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16) to i8*)
+; LINUX-64-STATIC: bat00:
+; LINUX-64-STATIC: movl $src+64, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat00:
+; LINUX-32-STATIC: movl $src+64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat00:
+; LINUX-32-PIC: movl $src+64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat00:
+; DARWIN-32-STATIC: movl $_src+64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat00:
+; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat00:
+; DARWIN-32-PIC: call L89$pb
+; DARWIN-32-PIC-NEXT: L89$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L89$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: addl $64, %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bxt00() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16) to i8*)
+; LINUX-64-STATIC: bxt00:
+; LINUX-64-STATIC: movl $xsrc+64, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bxt00:
+; LINUX-32-STATIC: movl $xsrc+64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bxt00:
+; LINUX-32-PIC: movl $xsrc+64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bxt00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bxt00:
+; DARWIN-32-STATIC: movl $_xsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bxt00:
+; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bxt00:
+; DARWIN-32-PIC: call L90$pb
+; DARWIN-32-PIC-NEXT: L90$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L90$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: addl $64, %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bxt00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bxt00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bxt00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat01() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16) to i8*)
+; LINUX-64-STATIC: bat01:
+; LINUX-64-STATIC: movl $dst+64, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat01:
+; LINUX-32-STATIC: movl $dst+64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat01:
+; LINUX-32-PIC: movl $dst+64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat01:
+; DARWIN-32-STATIC: movl $_dst+64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat01:
+; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat01:
+; DARWIN-32-PIC: call L91$pb
+; DARWIN-32-PIC-NEXT: L91$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L91$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: addl $64, %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bxt01() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16) to i8*)
+; LINUX-64-STATIC: bxt01:
+; LINUX-64-STATIC: movl $xdst+64, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bxt01:
+; LINUX-32-STATIC: movl $xdst+64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bxt01:
+; LINUX-32-PIC: movl $xdst+64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bxt01:
+; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bxt01:
+; DARWIN-32-STATIC: movl $_xdst+64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bxt01:
+; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bxt01:
+; DARWIN-32-PIC: call L92$pb
+; DARWIN-32-PIC-NEXT: L92$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L92$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: addl $64, %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bxt01:
+; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bxt01:
+; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bxt01:
+; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat02() nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = getelementptr i32* %0, i64 16
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: bat02:
+; LINUX-64-STATIC: movq ptr(%rip), %rax
+; LINUX-64-STATIC: addq $64, %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat02:
+; LINUX-32-STATIC: movl ptr, %eax
+; LINUX-32-STATIC-NEXT: addl $64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat02:
+; LINUX-32-PIC: movl ptr, %eax
+; LINUX-32-PIC-NEXT: addl $64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat02:
+; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq (%rax), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat02:
+; DARWIN-32-STATIC: movl _ptr, %eax
+; DARWIN-32-STATIC-NEXT: addl $64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat02:
+; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat02:
+; DARWIN-32-PIC: call L93$pb
+; DARWIN-32-PIC-NEXT: L93$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L93$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: addl $64, %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat02:
+; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq (%rax), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat02:
+; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq (%rax), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat02:
+; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq (%rax), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat03() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16) to i8*)
+; LINUX-64-STATIC: bat03:
+; LINUX-64-STATIC: movl $dsrc+64, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat03:
+; LINUX-32-STATIC: movl $dsrc+64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat03:
+; LINUX-32-PIC: movl $dsrc+64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat03:
+; DARWIN-32-STATIC: movl $_dsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat03:
+; DARWIN-32-DYNAMIC: movl $_dsrc+64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat03:
+; DARWIN-32-PIC: call L94$pb
+; DARWIN-32-PIC-NEXT: L94$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_dsrc-L94$pb)+64(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat03:
+; DARWIN-64-STATIC: leaq _dsrc+64(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat03:
+; DARWIN-64-DYNAMIC: leaq _dsrc+64(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat03:
+; DARWIN-64-PIC: leaq _dsrc+64(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat04() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16) to i8*)
+; LINUX-64-STATIC: bat04:
+; LINUX-64-STATIC: movl $ddst+64, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat04:
+; LINUX-32-STATIC: movl $ddst+64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat04:
+; LINUX-32-PIC: movl $ddst+64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat04:
+; DARWIN-32-STATIC: movl $_ddst+64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat04:
+; DARWIN-32-DYNAMIC: movl $_ddst+64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat04:
+; DARWIN-32-PIC: call L95$pb
+; DARWIN-32-PIC-NEXT: L95$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_ddst-L95$pb)+64(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat04:
+; DARWIN-64-STATIC: leaq _ddst+64(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat04:
+; DARWIN-64-DYNAMIC: leaq _ddst+64(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat04:
+; DARWIN-64-PIC: leaq _ddst+64(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat05() nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = getelementptr i32* %0, i64 16
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: bat05:
+; LINUX-64-STATIC: movq dptr(%rip), %rax
+; LINUX-64-STATIC: addq $64, %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat05:
+; LINUX-32-STATIC: movl dptr, %eax
+; LINUX-32-STATIC-NEXT: addl $64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat05:
+; LINUX-32-PIC: movl dptr, %eax
+; LINUX-32-PIC-NEXT: addl $64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat05:
+; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq (%rax), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat05:
+; DARWIN-32-STATIC: movl _dptr, %eax
+; DARWIN-32-STATIC-NEXT: addl $64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat05:
+; DARWIN-32-DYNAMIC: movl _dptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat05:
+; DARWIN-32-PIC: call L96$pb
+; DARWIN-32-PIC-NEXT: L96$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl _dptr-L96$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: addl $64, %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat05:
+; DARWIN-64-STATIC: movq _dptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat05:
+; DARWIN-64-DYNAMIC: movq _dptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat05:
+; DARWIN-64-PIC: movq _dptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat06() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16) to i8*)
+; LINUX-64-STATIC: bat06:
+; LINUX-64-STATIC: movl $lsrc+64, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat06:
+; LINUX-32-STATIC: movl $lsrc+64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat06:
+; LINUX-32-PIC: movl $lsrc+64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat06:
+; LINUX-64-PIC: leaq lsrc+64(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat06:
+; DARWIN-32-STATIC: movl $_lsrc+64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat06:
+; DARWIN-32-DYNAMIC: movl $_lsrc+64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat06:
+; DARWIN-32-PIC: call L97$pb
+; DARWIN-32-PIC-NEXT: L97$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_lsrc-L97$pb)+64(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat06:
+; DARWIN-64-STATIC: leaq _lsrc+64(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat06:
+; DARWIN-64-DYNAMIC: leaq _lsrc+64(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat06:
+; DARWIN-64-PIC: leaq _lsrc+64(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat07() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16) to i8*)
+; LINUX-64-STATIC: bat07:
+; LINUX-64-STATIC: movl $ldst+64, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat07:
+; LINUX-32-STATIC: movl $ldst+64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat07:
+; LINUX-32-PIC: movl $ldst+64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat07:
+; LINUX-64-PIC: leaq ldst+64(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat07:
+; DARWIN-32-STATIC: movl $_ldst+64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat07:
+; DARWIN-32-DYNAMIC: movl $_ldst+64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat07:
+; DARWIN-32-PIC: call L98$pb
+; DARWIN-32-PIC-NEXT: L98$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_ldst-L98$pb)+64(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat07:
+; DARWIN-64-STATIC: leaq _ldst+64(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat07:
+; DARWIN-64-DYNAMIC: leaq _ldst+64(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat07:
+; DARWIN-64-PIC: leaq _ldst+64(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bat08() nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = getelementptr i32* %0, i64 16
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: bat08:
+; LINUX-64-STATIC: movq lptr(%rip), %rax
+; LINUX-64-STATIC: addq $64, %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bat08:
+; LINUX-32-STATIC: movl lptr, %eax
+; LINUX-32-STATIC-NEXT: addl $64, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bat08:
+; LINUX-32-PIC: movl lptr, %eax
+; LINUX-32-PIC-NEXT: addl $64, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bat08:
+; LINUX-64-PIC: movq lptr(%rip), %rax
+; LINUX-64-PIC-NEXT: addq $64, %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bat08:
+; DARWIN-32-STATIC: movl _lptr, %eax
+; DARWIN-32-STATIC-NEXT: addl $64, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bat08:
+; DARWIN-32-DYNAMIC: movl _lptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bat08:
+; DARWIN-32-PIC: call L99$pb
+; DARWIN-32-PIC-NEXT: L99$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl _lptr-L99$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: addl $64, %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bat08:
+; DARWIN-64-STATIC: movq _lptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: addq $64, %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bat08:
+; DARWIN-64-DYNAMIC: movq _lptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bat08:
+; DARWIN-64-PIC: movq _lptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: addq $64, %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam00() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @src, i32 0, i64 65536) to i8*)
+; LINUX-64-STATIC: bam00:
+; LINUX-64-STATIC: movl $src+262144, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam00:
+; LINUX-32-STATIC: movl $src+262144, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam00:
+; LINUX-32-PIC: movl $src+262144, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam00:
+; LINUX-64-PIC: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam00:
+; DARWIN-32-STATIC: movl $_src+262144, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam00:
+; DARWIN-32-DYNAMIC: movl $262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl L_src$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam00:
+; DARWIN-32-PIC: call L100$pb
+; DARWIN-32-PIC-NEXT: L100$pb:
+; DARWIN-32-PIC-NEXT: popl %ecx
+; DARWIN-32-PIC-NEXT: movl $262144, %eax
+; DARWIN-32-PIC-NEXT: addl L_src$non_lazy_ptr-L100$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam00:
+; DARWIN-64-STATIC: movl $262144, %eax
+; DARWIN-64-STATIC-NEXT: addq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam00:
+; DARWIN-64-DYNAMIC: movl $262144, %eax
+; DARWIN-64-DYNAMIC-NEXT: addq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam00:
+; DARWIN-64-PIC: movl $262144, %eax
+; DARWIN-64-PIC-NEXT: addq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam01() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536) to i8*)
+; LINUX-64-STATIC: bam01:
+; LINUX-64-STATIC: movl $dst+262144, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam01:
+; LINUX-32-STATIC: movl $dst+262144, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam01:
+; LINUX-32-PIC: movl $dst+262144, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam01:
+; LINUX-64-PIC: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam01:
+; DARWIN-32-STATIC: movl $_dst+262144, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam01:
+; DARWIN-32-DYNAMIC: movl $262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl L_dst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam01:
+; DARWIN-32-PIC: call L101$pb
+; DARWIN-32-PIC-NEXT: L101$pb:
+; DARWIN-32-PIC-NEXT: popl %ecx
+; DARWIN-32-PIC-NEXT: movl $262144, %eax
+; DARWIN-32-PIC-NEXT: addl L_dst$non_lazy_ptr-L101$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam01:
+; DARWIN-64-STATIC: movl $262144, %eax
+; DARWIN-64-STATIC-NEXT: addq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam01:
+; DARWIN-64-DYNAMIC: movl $262144, %eax
+; DARWIN-64-DYNAMIC-NEXT: addq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam01:
+; DARWIN-64-PIC: movl $262144, %eax
+; DARWIN-64-PIC-NEXT: addq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bxm01() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 65536) to i8*)
+; LINUX-64-STATIC: bxm01:
+; LINUX-64-STATIC: movl $xdst+262144, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bxm01:
+; LINUX-32-STATIC: movl $xdst+262144, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bxm01:
+; LINUX-32-PIC: movl $xdst+262144, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bxm01:
+; LINUX-64-PIC: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bxm01:
+; DARWIN-32-STATIC: movl $_xdst+262144, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bxm01:
+; DARWIN-32-DYNAMIC: movl $262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl L_xdst$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bxm01:
+; DARWIN-32-PIC: call L102$pb
+; DARWIN-32-PIC-NEXT: L102$pb:
+; DARWIN-32-PIC-NEXT: popl %ecx
+; DARWIN-32-PIC-NEXT: movl $262144, %eax
+; DARWIN-32-PIC-NEXT: addl L_xdst$non_lazy_ptr-L102$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bxm01:
+; DARWIN-64-STATIC: movl $262144, %eax
+; DARWIN-64-STATIC-NEXT: addq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bxm01:
+; DARWIN-64-DYNAMIC: movl $262144, %eax
+; DARWIN-64-DYNAMIC-NEXT: addq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bxm01:
+; DARWIN-64-PIC: movl $262144, %eax
+; DARWIN-64-PIC-NEXT: addq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam02() nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = getelementptr i32* %0, i64 65536
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: bam02:
+; LINUX-64-STATIC: movl $262144, %eax
+; LINUX-64-STATIC: addq ptr(%rip), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam02:
+; LINUX-32-STATIC: movl $262144, %eax
+; LINUX-32-STATIC-NEXT: addl ptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam02:
+; LINUX-32-PIC: movl $262144, %eax
+; LINUX-32-PIC-NEXT: addl ptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam02:
+; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq (%rcx), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam02:
+; DARWIN-32-STATIC: movl $262144, %eax
+; DARWIN-32-STATIC-NEXT: addl _ptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam02:
+; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: movl $262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl (%ecx), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam02:
+; DARWIN-32-PIC: call L103$pb
+; DARWIN-32-PIC-NEXT: L103$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L103$pb(%eax), %ecx
+; DARWIN-32-PIC-NEXT: movl $262144, %eax
+; DARWIN-32-PIC-NEXT: addl (%ecx), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam02:
+; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-STATIC-NEXT: movl $262144, %eax
+; DARWIN-64-STATIC-NEXT: addq (%rcx), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam02:
+; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-DYNAMIC-NEXT: movl $262144, %eax
+; DARWIN-64-DYNAMIC-NEXT: addq (%rcx), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam02:
+; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rcx
+; DARWIN-64-PIC-NEXT: movl $262144, %eax
+; DARWIN-64-PIC-NEXT: addq (%rcx), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam03() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 65536) to i8*)
+; LINUX-64-STATIC: bam03:
+; LINUX-64-STATIC: movl $dsrc+262144, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam03:
+; LINUX-32-STATIC: movl $dsrc+262144, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam03:
+; LINUX-32-PIC: movl $dsrc+262144, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam03:
+; LINUX-64-PIC: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam03:
+; DARWIN-32-STATIC: movl $_dsrc+262144, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam03:
+; DARWIN-32-DYNAMIC: movl $_dsrc+262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam03:
+; DARWIN-32-PIC: call L104$pb
+; DARWIN-32-PIC-NEXT: L104$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_dsrc-L104$pb)+262144(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam03:
+; DARWIN-64-STATIC: leaq _dsrc+262144(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam03:
+; DARWIN-64-DYNAMIC: leaq _dsrc+262144(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam03:
+; DARWIN-64-PIC: leaq _dsrc+262144(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam04() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536) to i8*)
+; LINUX-64-STATIC: bam04:
+; LINUX-64-STATIC: movl $ddst+262144, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam04:
+; LINUX-32-STATIC: movl $ddst+262144, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam04:
+; LINUX-32-PIC: movl $ddst+262144, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam04:
+; LINUX-64-PIC: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam04:
+; DARWIN-32-STATIC: movl $_ddst+262144, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam04:
+; DARWIN-32-DYNAMIC: movl $_ddst+262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam04:
+; DARWIN-32-PIC: call L105$pb
+; DARWIN-32-PIC-NEXT: L105$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_ddst-L105$pb)+262144(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam04:
+; DARWIN-64-STATIC: leaq _ddst+262144(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam04:
+; DARWIN-64-DYNAMIC: leaq _ddst+262144(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam04:
+; DARWIN-64-PIC: leaq _ddst+262144(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam05() nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = getelementptr i32* %0, i64 65536
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: bam05:
+; LINUX-64-STATIC: movl $262144, %eax
+; LINUX-64-STATIC: addq dptr(%rip), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam05:
+; LINUX-32-STATIC: movl $262144, %eax
+; LINUX-32-STATIC-NEXT: addl dptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam05:
+; LINUX-32-PIC: movl $262144, %eax
+; LINUX-32-PIC-NEXT: addl dptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam05:
+; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rcx
+; LINUX-64-PIC-NEXT: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq (%rcx), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam05:
+; DARWIN-32-STATIC: movl $262144, %eax
+; DARWIN-32-STATIC-NEXT: addl _dptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam05:
+; DARWIN-32-DYNAMIC: movl $262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl _dptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam05:
+; DARWIN-32-PIC: call L106$pb
+; DARWIN-32-PIC-NEXT: L106$pb:
+; DARWIN-32-PIC-NEXT: popl %ecx
+; DARWIN-32-PIC-NEXT: movl $262144, %eax
+; DARWIN-32-PIC-NEXT: addl _dptr-L106$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam05:
+; DARWIN-64-STATIC: movl $262144, %eax
+; DARWIN-64-STATIC-NEXT: addq _dptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam05:
+; DARWIN-64-DYNAMIC: movl $262144, %eax
+; DARWIN-64-DYNAMIC-NEXT: addq _dptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam05:
+; DARWIN-64-PIC: movl $262144, %eax
+; DARWIN-64-PIC-NEXT: addq _dptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam06() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 65536) to i8*)
+; LINUX-64-STATIC: bam06:
+; LINUX-64-STATIC: movl $lsrc+262144, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam06:
+; LINUX-32-STATIC: movl $lsrc+262144, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam06:
+; LINUX-32-PIC: movl $lsrc+262144, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam06:
+; LINUX-64-PIC: leaq lsrc+262144(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam06:
+; DARWIN-32-STATIC: movl $_lsrc+262144, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam06:
+; DARWIN-32-DYNAMIC: movl $_lsrc+262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam06:
+; DARWIN-32-PIC: call L107$pb
+; DARWIN-32-PIC-NEXT: L107$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_lsrc-L107$pb)+262144(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam06:
+; DARWIN-64-STATIC: leaq _lsrc+262144(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam06:
+; DARWIN-64-DYNAMIC: leaq _lsrc+262144(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam06:
+; DARWIN-64-PIC: leaq _lsrc+262144(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam07() nounwind {
+entry:
+ ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536) to i8*)
+; LINUX-64-STATIC: bam07:
+; LINUX-64-STATIC: movl $ldst+262144, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam07:
+; LINUX-32-STATIC: movl $ldst+262144, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam07:
+; LINUX-32-PIC: movl $ldst+262144, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam07:
+; LINUX-64-PIC: leaq ldst+262144(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam07:
+; DARWIN-32-STATIC: movl $_ldst+262144, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam07:
+; DARWIN-32-DYNAMIC: movl $_ldst+262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam07:
+; DARWIN-32-PIC: call L108$pb
+; DARWIN-32-PIC-NEXT: L108$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal (_ldst-L108$pb)+262144(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam07:
+; DARWIN-64-STATIC: leaq _ldst+262144(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam07:
+; DARWIN-64-DYNAMIC: leaq _ldst+262144(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam07:
+; DARWIN-64-PIC: leaq _ldst+262144(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @bam08() nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = getelementptr i32* %0, i64 65536
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: bam08:
+; LINUX-64-STATIC: movl $262144, %eax
+; LINUX-64-STATIC: addq lptr(%rip), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: bam08:
+; LINUX-32-STATIC: movl $262144, %eax
+; LINUX-32-STATIC-NEXT: addl lptr, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: bam08:
+; LINUX-32-PIC: movl $262144, %eax
+; LINUX-32-PIC-NEXT: addl lptr, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: bam08:
+; LINUX-64-PIC: movl $262144, %eax
+; LINUX-64-PIC-NEXT: addq lptr(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _bam08:
+; DARWIN-32-STATIC: movl $262144, %eax
+; DARWIN-32-STATIC-NEXT: addl _lptr, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _bam08:
+; DARWIN-32-DYNAMIC: movl $262144, %eax
+; DARWIN-32-DYNAMIC-NEXT: addl _lptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _bam08:
+; DARWIN-32-PIC: call L109$pb
+; DARWIN-32-PIC-NEXT: L109$pb:
+; DARWIN-32-PIC-NEXT: popl %ecx
+; DARWIN-32-PIC-NEXT: movl $262144, %eax
+; DARWIN-32-PIC-NEXT: addl _lptr-L109$pb(%ecx), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _bam08:
+; DARWIN-64-STATIC: movl $262144, %eax
+; DARWIN-64-STATIC-NEXT: addq _lptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _bam08:
+; DARWIN-64-DYNAMIC: movl $262144, %eax
+; DARWIN-64-DYNAMIC-NEXT: addq _lptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _bam08:
+; DARWIN-64-PIC: movl $262144, %eax
+; DARWIN-64-PIC-NEXT: addq _lptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat00(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cat00:
+; LINUX-64-STATIC: leaq src+64(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal src+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal src+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _src+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat00:
+; DARWIN-32-PIC: call L110$pb
+; DARWIN-32-PIC-NEXT: L110$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L110$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cxt00(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cxt00:
+; LINUX-64-STATIC: leaq xsrc+64(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cxt00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal xsrc+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cxt00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal xsrc+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cxt00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cxt00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _xsrc+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cxt00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cxt00:
+; DARWIN-32-PIC: call L111$pb
+; DARWIN-32-PIC-NEXT: L111$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L111$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cxt00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cxt00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cxt00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat01(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cat01:
+; LINUX-64-STATIC: leaq dst+64(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal dst+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal dst+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _dst+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat01:
+; DARWIN-32-PIC: call L112$pb
+; DARWIN-32-PIC-NEXT: L112$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L112$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cxt01(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cxt01:
+; LINUX-64-STATIC: leaq xdst+64(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cxt01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal xdst+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cxt01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal xdst+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cxt01:
+; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cxt01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _xdst+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cxt01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cxt01:
+; DARWIN-32-PIC: call L113$pb
+; DARWIN-32-PIC-NEXT: L113$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L113$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cxt01:
+; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cxt01:
+; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cxt01:
+; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat02(i64 %i) nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = add i64 %i, 16
+ %2 = getelementptr i32* %0, i64 %1
+ %3 = bitcast i32* %2 to i8*
+ ret i8* %3
+; LINUX-64-STATIC: cat02:
+; LINUX-64-STATIC: movq ptr(%rip), %rax
+; LINUX-64-STATIC: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat02:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl ptr, %ecx
+; LINUX-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat02:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl ptr, %ecx
+; LINUX-32-PIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat02:
+; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq (%rax), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat02:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx
+; DARWIN-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat02:
+; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%eax,%ecx,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat02:
+; DARWIN-32-PIC: call L114$pb
+; DARWIN-32-PIC-NEXT: L114$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L114$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat02:
+; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq (%rax), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat02:
+; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq (%rax), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat02:
+; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq (%rax), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat03(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cat03:
+; LINUX-64-STATIC: leaq dsrc+64(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat03:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal dsrc+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat03:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal dsrc+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat03:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _dsrc+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat03:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _dsrc+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat03:
+; DARWIN-32-PIC: call L115$pb
+; DARWIN-32-PIC-NEXT: L115$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_dsrc-L115$pb)+64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat03:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat03:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat03:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat04(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cat04:
+; LINUX-64-STATIC: leaq ddst+64(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat04:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ddst+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat04:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ddst+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat04:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ddst+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat04:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ddst+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat04:
+; DARWIN-32-PIC: call L116$pb
+; DARWIN-32-PIC-NEXT: L116$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_ddst-L116$pb)+64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat04:
+; DARWIN-64-STATIC: leaq _ddst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat04:
+; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat04:
+; DARWIN-64-PIC: leaq _ddst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat05(i64 %i) nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = add i64 %i, 16
+ %2 = getelementptr i32* %0, i64 %1
+ %3 = bitcast i32* %2 to i8*
+ ret i8* %3
+; LINUX-64-STATIC: cat05:
+; LINUX-64-STATIC: movq dptr(%rip), %rax
+; LINUX-64-STATIC: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat05:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl dptr, %ecx
+; LINUX-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat05:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl dptr, %ecx
+; LINUX-32-PIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat05:
+; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq (%rax), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat05:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat05:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat05:
+; DARWIN-32-PIC: call L117$pb
+; DARWIN-32-PIC-NEXT: L117$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl _dptr-L117$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat05:
+; DARWIN-64-STATIC: movq _dptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat05:
+; DARWIN-64-DYNAMIC: movq _dptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat05:
+; DARWIN-64-PIC: movq _dptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat06(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cat06:
+; LINUX-64-STATIC: leaq lsrc+64(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat06:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal lsrc+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat06:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal lsrc+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat06:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat06:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _lsrc+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat06:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _lsrc+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat06:
+; DARWIN-32-PIC: call L118$pb
+; DARWIN-32-PIC-NEXT: L118$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_lsrc-L118$pb)+64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat06:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat06:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat06:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat07(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 16
+ %1 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cat07:
+; LINUX-64-STATIC: leaq ldst+64(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat07:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ldst+64(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat07:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ldst+64(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat07:
+; LINUX-64-PIC: leaq ldst(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat07:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ldst+64(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat07:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ldst+64(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat07:
+; DARWIN-32-PIC: call L119$pb
+; DARWIN-32-PIC-NEXT: L119$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_ldst-L119$pb)+64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat07:
+; DARWIN-64-STATIC: leaq _ldst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat07:
+; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat07:
+; DARWIN-64-PIC: leaq _ldst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cat08(i64 %i) nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = add i64 %i, 16
+ %2 = getelementptr i32* %0, i64 %1
+ %3 = bitcast i32* %2 to i8*
+ ret i8* %3
+; LINUX-64-STATIC: cat08:
+; LINUX-64-STATIC: movq lptr(%rip), %rax
+; LINUX-64-STATIC: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cat08:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl lptr, %ecx
+; LINUX-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cat08:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl lptr, %ecx
+; LINUX-32-PIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cat08:
+; LINUX-64-PIC: movq lptr(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cat08:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cat08:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cat08:
+; DARWIN-32-PIC: call L120$pb
+; DARWIN-32-PIC-NEXT: L120$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl _lptr-L120$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cat08:
+; DARWIN-64-STATIC: movq _lptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cat08:
+; DARWIN-64-DYNAMIC: movq _lptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cat08:
+; DARWIN-64-PIC: movq _lptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam00(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cam00:
+; LINUX-64-STATIC: leaq src+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal src+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal src+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam00:
+; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _src+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam00:
+; DARWIN-32-PIC: call L121$pb
+; DARWIN-32-PIC-NEXT: L121$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L121$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam00:
+; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam00:
+; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam00:
+; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cxm00(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cxm00:
+; LINUX-64-STATIC: leaq xsrc+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cxm00:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal xsrc+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cxm00:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal xsrc+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cxm00:
+; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cxm00:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _xsrc+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cxm00:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cxm00:
+; DARWIN-32-PIC: call L122$pb
+; DARWIN-32-PIC-NEXT: L122$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L122$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cxm00:
+; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cxm00:
+; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cxm00:
+; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam01(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cam01:
+; LINUX-64-STATIC: leaq dst+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal dst+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal dst+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam01:
+; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _dst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam01:
+; DARWIN-32-PIC: call L123$pb
+; DARWIN-32-PIC-NEXT: L123$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L123$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam01:
+; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam01:
+; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam01:
+; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cxm01(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cxm01:
+; LINUX-64-STATIC: leaq xdst+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cxm01:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal xdst+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cxm01:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal xdst+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cxm01:
+; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cxm01:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _xdst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cxm01:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cxm01:
+; DARWIN-32-PIC: call L124$pb
+; DARWIN-32-PIC-NEXT: L124$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L124$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cxm01:
+; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cxm01:
+; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cxm01:
+; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam02(i64 %i) nounwind {
+entry:
+ %0 = load i32** @ptr, align 8
+ %1 = add i64 %i, 65536
+ %2 = getelementptr i32* %0, i64 %1
+ %3 = bitcast i32* %2 to i8*
+ ret i8* %3
+; LINUX-64-STATIC: cam02:
+; LINUX-64-STATIC: movq ptr(%rip), %rax
+; LINUX-64-STATIC: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam02:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl ptr, %ecx
+; LINUX-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam02:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl ptr, %ecx
+; LINUX-32-PIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam02:
+; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq (%rax), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam02:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx
+; DARWIN-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam02:
+; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 262144(%eax,%ecx,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam02:
+; DARWIN-32-PIC: call L125$pb
+; DARWIN-32-PIC-NEXT: L125$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L125$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: movl (%eax), %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam02:
+; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: movq (%rax), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam02:
+; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: movq (%rax), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam02:
+; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: movq (%rax), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam03(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cam03:
+; LINUX-64-STATIC: leaq dsrc+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam03:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal dsrc+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam03:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal dsrc+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam03:
+; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam03:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _dsrc+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam03:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _dsrc+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam03:
+; DARWIN-32-PIC: call L126$pb
+; DARWIN-32-PIC-NEXT: L126$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_dsrc-L126$pb)+262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam03:
+; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam03:
+; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam03:
+; DARWIN-64-PIC: leaq _dsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam04(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cam04:
+; LINUX-64-STATIC: leaq ddst+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam04:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ddst+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam04:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ddst+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam04:
+; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam04:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ddst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam04:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ddst+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam04:
+; DARWIN-32-PIC: call L127$pb
+; DARWIN-32-PIC-NEXT: L127$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_ddst-L127$pb)+262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam04:
+; DARWIN-64-STATIC: leaq _ddst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam04:
+; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam04:
+; DARWIN-64-PIC: leaq _ddst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam05(i64 %i) nounwind {
+entry:
+ %0 = load i32** @dptr, align 8
+ %1 = add i64 %i, 65536
+ %2 = getelementptr i32* %0, i64 %1
+ %3 = bitcast i32* %2 to i8*
+ ret i8* %3
+; LINUX-64-STATIC: cam05:
+; LINUX-64-STATIC: movq dptr(%rip), %rax
+; LINUX-64-STATIC: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam05:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl dptr, %ecx
+; LINUX-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam05:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl dptr, %ecx
+; LINUX-32-PIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam05:
+; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: movq (%rax), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam05:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam05:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam05:
+; DARWIN-32-PIC: call L128$pb
+; DARWIN-32-PIC-NEXT: L128$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl _dptr-L128$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam05:
+; DARWIN-64-STATIC: movq _dptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam05:
+; DARWIN-64-DYNAMIC: movq _dptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam05:
+; DARWIN-64-PIC: movq _dptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam06(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cam06:
+; LINUX-64-STATIC: leaq lsrc+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam06:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal lsrc+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam06:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal lsrc+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam06:
+; LINUX-64-PIC: leaq lsrc(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam06:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _lsrc+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam06:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _lsrc+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam06:
+; DARWIN-32-PIC: call L129$pb
+; DARWIN-32-PIC-NEXT: L129$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_lsrc-L129$pb)+262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam06:
+; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam06:
+; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam06:
+; DARWIN-64-PIC: leaq _lsrc(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam07(i64 %i) nounwind {
+entry:
+ %0 = add i64 %i, 65536
+ %1 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0
+ %2 = bitcast i32* %1 to i8*
+ ret i8* %2
+; LINUX-64-STATIC: cam07:
+; LINUX-64-STATIC: leaq ldst+262144(,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam07:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: leal ldst+262144(,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam07:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: leal ldst+262144(,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam07:
+; LINUX-64-PIC: leaq ldst(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam07:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: leal _ldst+262144(,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam07:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: leal _ldst+262144(,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam07:
+; DARWIN-32-PIC: call L130$pb
+; DARWIN-32-PIC-NEXT: L130$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: leal (_ldst-L130$pb)+262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam07:
+; DARWIN-64-STATIC: leaq _ldst(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam07:
+; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam07:
+; DARWIN-64-PIC: leaq _ldst(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define i8* @cam08(i64 %i) nounwind {
+entry:
+ %0 = load i32** @lptr, align 8
+ %1 = add i64 %i, 65536
+ %2 = getelementptr i32* %0, i64 %1
+ %3 = bitcast i32* %2 to i8*
+ ret i8* %3
+; LINUX-64-STATIC: cam08:
+; LINUX-64-STATIC: movq lptr(%rip), %rax
+; LINUX-64-STATIC: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: cam08:
+; LINUX-32-STATIC: movl 4(%esp), %eax
+; LINUX-32-STATIC-NEXT: movl lptr, %ecx
+; LINUX-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: cam08:
+; LINUX-32-PIC: movl 4(%esp), %eax
+; LINUX-32-PIC-NEXT: movl lptr, %ecx
+; LINUX-32-PIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: cam08:
+; LINUX-64-PIC: movq lptr(%rip), %rax
+; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _cam08:
+; DARWIN-32-STATIC: movl 4(%esp), %eax
+; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _cam08:
+; DARWIN-32-DYNAMIC: movl 4(%esp), %eax
+; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx
+; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _cam08:
+; DARWIN-32-PIC: call L131$pb
+; DARWIN-32-PIC-NEXT: L131$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx
+; DARWIN-32-PIC-NEXT: movl _lptr-L131$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _cam08:
+; DARWIN-64-STATIC: movq _lptr(%rip), %rax
+; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _cam08:
+; DARWIN-64-DYNAMIC: movq _lptr(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _cam08:
+; DARWIN-64-PIC: movq _lptr(%rip), %rax
+; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @lcallee() nounwind {
+entry:
+ call void @x() nounwind
+ call void @x() nounwind
+ call void @x() nounwind
+ call void @x() nounwind
+ call void @x() nounwind
+ call void @x() nounwind
+ call void @x() nounwind
+ ret void
+; LINUX-64-STATIC: lcallee:
+; LINUX-64-STATIC: callq x
+; LINUX-64-STATIC: callq x
+; LINUX-64-STATIC: callq x
+; LINUX-64-STATIC: callq x
+; LINUX-64-STATIC: callq x
+; LINUX-64-STATIC: callq x
+; LINUX-64-STATIC: callq x
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: lcallee:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call x
+; LINUX-32-STATIC-NEXT: call x
+; LINUX-32-STATIC-NEXT: call x
+; LINUX-32-STATIC-NEXT: call x
+; LINUX-32-STATIC-NEXT: call x
+; LINUX-32-STATIC-NEXT: call x
+; LINUX-32-STATIC-NEXT: call x
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: lcallee:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call x
+; LINUX-32-PIC-NEXT: call x
+; LINUX-32-PIC-NEXT: call x
+; LINUX-32-PIC-NEXT: call x
+; LINUX-32-PIC-NEXT: call x
+; LINUX-32-PIC-NEXT: call x
+; LINUX-32-PIC-NEXT: call x
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: lcallee:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq x@PLT
+; LINUX-64-PIC-NEXT: callq x@PLT
+; LINUX-64-PIC-NEXT: callq x@PLT
+; LINUX-64-PIC-NEXT: callq x@PLT
+; LINUX-64-PIC-NEXT: callq x@PLT
+; LINUX-64-PIC-NEXT: callq x@PLT
+; LINUX-64-PIC-NEXT: callq x@PLT
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _lcallee:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call _x
+; DARWIN-32-STATIC-NEXT: call _x
+; DARWIN-32-STATIC-NEXT: call _x
+; DARWIN-32-STATIC-NEXT: call _x
+; DARWIN-32-STATIC-NEXT: call _x
+; DARWIN-32-STATIC-NEXT: call _x
+; DARWIN-32-STATIC-NEXT: call _x
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _lcallee:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call L_x$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_x$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_x$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_x$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_x$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_x$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_x$stub
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _lcallee:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call L_x$stub
+; DARWIN-32-PIC-NEXT: call L_x$stub
+; DARWIN-32-PIC-NEXT: call L_x$stub
+; DARWIN-32-PIC-NEXT: call L_x$stub
+; DARWIN-32-PIC-NEXT: call L_x$stub
+; DARWIN-32-PIC-NEXT: call L_x$stub
+; DARWIN-32-PIC-NEXT: call L_x$stub
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _lcallee:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq _x
+; DARWIN-64-STATIC-NEXT: callq _x
+; DARWIN-64-STATIC-NEXT: callq _x
+; DARWIN-64-STATIC-NEXT: callq _x
+; DARWIN-64-STATIC-NEXT: callq _x
+; DARWIN-64-STATIC-NEXT: callq _x
+; DARWIN-64-STATIC-NEXT: callq _x
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _lcallee:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq _x
+; DARWIN-64-DYNAMIC-NEXT: callq _x
+; DARWIN-64-DYNAMIC-NEXT: callq _x
+; DARWIN-64-DYNAMIC-NEXT: callq _x
+; DARWIN-64-DYNAMIC-NEXT: callq _x
+; DARWIN-64-DYNAMIC-NEXT: callq _x
+; DARWIN-64-DYNAMIC-NEXT: callq _x
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _lcallee:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq _x
+; DARWIN-64-PIC-NEXT: callq _x
+; DARWIN-64-PIC-NEXT: callq _x
+; DARWIN-64-PIC-NEXT: callq _x
+; DARWIN-64-PIC-NEXT: callq _x
+; DARWIN-64-PIC-NEXT: callq _x
+; DARWIN-64-PIC-NEXT: callq _x
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+declare void @x()
+
+define internal void @dcallee() nounwind {
+entry:
+ call void @y() nounwind
+ call void @y() nounwind
+ call void @y() nounwind
+ call void @y() nounwind
+ call void @y() nounwind
+ call void @y() nounwind
+ call void @y() nounwind
+ ret void
+; LINUX-64-STATIC: dcallee:
+; LINUX-64-STATIC: callq y
+; LINUX-64-STATIC: callq y
+; LINUX-64-STATIC: callq y
+; LINUX-64-STATIC: callq y
+; LINUX-64-STATIC: callq y
+; LINUX-64-STATIC: callq y
+; LINUX-64-STATIC: callq y
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: dcallee:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call y
+; LINUX-32-STATIC-NEXT: call y
+; LINUX-32-STATIC-NEXT: call y
+; LINUX-32-STATIC-NEXT: call y
+; LINUX-32-STATIC-NEXT: call y
+; LINUX-32-STATIC-NEXT: call y
+; LINUX-32-STATIC-NEXT: call y
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: dcallee:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call y
+; LINUX-32-PIC-NEXT: call y
+; LINUX-32-PIC-NEXT: call y
+; LINUX-32-PIC-NEXT: call y
+; LINUX-32-PIC-NEXT: call y
+; LINUX-32-PIC-NEXT: call y
+; LINUX-32-PIC-NEXT: call y
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: dcallee:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq y@PLT
+; LINUX-64-PIC-NEXT: callq y@PLT
+; LINUX-64-PIC-NEXT: callq y@PLT
+; LINUX-64-PIC-NEXT: callq y@PLT
+; LINUX-64-PIC-NEXT: callq y@PLT
+; LINUX-64-PIC-NEXT: callq y@PLT
+; LINUX-64-PIC-NEXT: callq y@PLT
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _dcallee:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call _y
+; DARWIN-32-STATIC-NEXT: call _y
+; DARWIN-32-STATIC-NEXT: call _y
+; DARWIN-32-STATIC-NEXT: call _y
+; DARWIN-32-STATIC-NEXT: call _y
+; DARWIN-32-STATIC-NEXT: call _y
+; DARWIN-32-STATIC-NEXT: call _y
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _dcallee:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call L_y$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_y$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_y$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_y$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_y$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_y$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_y$stub
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _dcallee:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call L_y$stub
+; DARWIN-32-PIC-NEXT: call L_y$stub
+; DARWIN-32-PIC-NEXT: call L_y$stub
+; DARWIN-32-PIC-NEXT: call L_y$stub
+; DARWIN-32-PIC-NEXT: call L_y$stub
+; DARWIN-32-PIC-NEXT: call L_y$stub
+; DARWIN-32-PIC-NEXT: call L_y$stub
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _dcallee:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq _y
+; DARWIN-64-STATIC-NEXT: callq _y
+; DARWIN-64-STATIC-NEXT: callq _y
+; DARWIN-64-STATIC-NEXT: callq _y
+; DARWIN-64-STATIC-NEXT: callq _y
+; DARWIN-64-STATIC-NEXT: callq _y
+; DARWIN-64-STATIC-NEXT: callq _y
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _dcallee:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq _y
+; DARWIN-64-DYNAMIC-NEXT: callq _y
+; DARWIN-64-DYNAMIC-NEXT: callq _y
+; DARWIN-64-DYNAMIC-NEXT: callq _y
+; DARWIN-64-DYNAMIC-NEXT: callq _y
+; DARWIN-64-DYNAMIC-NEXT: callq _y
+; DARWIN-64-DYNAMIC-NEXT: callq _y
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _dcallee:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq _y
+; DARWIN-64-PIC-NEXT: callq _y
+; DARWIN-64-PIC-NEXT: callq _y
+; DARWIN-64-PIC-NEXT: callq _y
+; DARWIN-64-PIC-NEXT: callq _y
+; DARWIN-64-PIC-NEXT: callq _y
+; DARWIN-64-PIC-NEXT: callq _y
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+declare void @y()
+
+define void ()* @address() nounwind {
+entry:
+ ret void ()* @callee
+; LINUX-64-STATIC: address:
+; LINUX-64-STATIC: movl $callee, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: address:
+; LINUX-32-STATIC: movl $callee, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: address:
+; LINUX-32-PIC: movl $callee, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: address:
+; LINUX-64-PIC: movq callee@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _address:
+; DARWIN-32-STATIC: movl $_callee, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _address:
+; DARWIN-32-DYNAMIC: movl L_callee$non_lazy_ptr, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _address:
+; DARWIN-32-PIC: call L134$pb
+; DARWIN-32-PIC-NEXT: L134$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_callee$non_lazy_ptr-L134$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _address:
+; DARWIN-64-STATIC: movq _callee@GOTPCREL(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _address:
+; DARWIN-64-DYNAMIC: movq _callee@GOTPCREL(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _address:
+; DARWIN-64-PIC: movq _callee@GOTPCREL(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+declare void @callee()
+
+define void ()* @laddress() nounwind {
+entry:
+ ret void ()* @lcallee
+; LINUX-64-STATIC: laddress:
+; LINUX-64-STATIC: movl $lcallee, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: laddress:
+; LINUX-32-STATIC: movl $lcallee, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: laddress:
+; LINUX-32-PIC: movl $lcallee, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: laddress:
+; LINUX-64-PIC: movq lcallee@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _laddress:
+; DARWIN-32-STATIC: movl $_lcallee, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _laddress:
+; DARWIN-32-DYNAMIC: movl $_lcallee, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _laddress:
+; DARWIN-32-PIC: call L135$pb
+; DARWIN-32-PIC-NEXT: L135$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _lcallee-L135$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _laddress:
+; DARWIN-64-STATIC: leaq _lcallee(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _laddress:
+; DARWIN-64-DYNAMIC: leaq _lcallee(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _laddress:
+; DARWIN-64-PIC: leaq _lcallee(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void ()* @daddress() nounwind {
+entry:
+ ret void ()* @dcallee
+; LINUX-64-STATIC: daddress:
+; LINUX-64-STATIC: movl $dcallee, %eax
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: daddress:
+; LINUX-32-STATIC: movl $dcallee, %eax
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: daddress:
+; LINUX-32-PIC: movl $dcallee, %eax
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: daddress:
+; LINUX-64-PIC: leaq dcallee(%rip), %rax
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _daddress:
+; DARWIN-32-STATIC: movl $_dcallee, %eax
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _daddress:
+; DARWIN-32-DYNAMIC: movl $_dcallee, %eax
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _daddress:
+; DARWIN-32-PIC: call L136$pb
+; DARWIN-32-PIC-NEXT: L136$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: leal _dcallee-L136$pb(%eax), %eax
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _daddress:
+; DARWIN-64-STATIC: leaq _dcallee(%rip), %rax
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _daddress:
+; DARWIN-64-DYNAMIC: leaq _dcallee(%rip), %rax
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _daddress:
+; DARWIN-64-PIC: leaq _dcallee(%rip), %rax
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @caller() nounwind {
+entry:
+ call void @callee() nounwind
+ call void @callee() nounwind
+ ret void
+; LINUX-64-STATIC: caller:
+; LINUX-64-STATIC: callq callee
+; LINUX-64-STATIC: callq callee
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: caller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call callee
+; LINUX-32-STATIC-NEXT: call callee
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: caller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call callee
+; LINUX-32-PIC-NEXT: call callee
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: caller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq callee@PLT
+; LINUX-64-PIC-NEXT: callq callee@PLT
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _caller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call _callee
+; DARWIN-32-STATIC-NEXT: call _callee
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _caller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub
+; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _caller:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call L_callee$stub
+; DARWIN-32-PIC-NEXT: call L_callee$stub
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _caller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq _callee
+; DARWIN-64-STATIC-NEXT: callq _callee
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _caller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq _callee
+; DARWIN-64-DYNAMIC-NEXT: callq _callee
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _caller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq _callee
+; DARWIN-64-PIC-NEXT: callq _callee
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @dcaller() nounwind {
+entry:
+ call void @dcallee() nounwind
+ call void @dcallee() nounwind
+ ret void
+; LINUX-64-STATIC: dcaller:
+; LINUX-64-STATIC: callq dcallee
+; LINUX-64-STATIC: callq dcallee
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: dcaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call dcallee
+; LINUX-32-STATIC-NEXT: call dcallee
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: dcaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call dcallee
+; LINUX-32-PIC-NEXT: call dcallee
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: dcaller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq dcallee
+; LINUX-64-PIC-NEXT: callq dcallee
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _dcaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call _dcallee
+; DARWIN-32-STATIC-NEXT: call _dcallee
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _dcaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call _dcallee
+; DARWIN-32-DYNAMIC-NEXT: call _dcallee
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _dcaller:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call _dcallee
+; DARWIN-32-PIC-NEXT: call _dcallee
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _dcaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq _dcallee
+; DARWIN-64-STATIC-NEXT: callq _dcallee
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _dcaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq _dcallee
+; DARWIN-64-DYNAMIC-NEXT: callq _dcallee
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _dcaller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq _dcallee
+; DARWIN-64-PIC-NEXT: callq _dcallee
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @lcaller() nounwind {
+entry:
+ call void @lcallee() nounwind
+ call void @lcallee() nounwind
+ ret void
+; LINUX-64-STATIC: lcaller:
+; LINUX-64-STATIC: callq lcallee
+; LINUX-64-STATIC: callq lcallee
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: lcaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call lcallee
+; LINUX-32-STATIC-NEXT: call lcallee
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: lcaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call lcallee
+; LINUX-32-PIC-NEXT: call lcallee
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: lcaller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq lcallee@PLT
+; LINUX-64-PIC-NEXT: callq lcallee@PLT
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _lcaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call _lcallee
+; DARWIN-32-STATIC-NEXT: call _lcallee
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _lcaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call _lcallee
+; DARWIN-32-DYNAMIC-NEXT: call _lcallee
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _lcaller:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call _lcallee
+; DARWIN-32-PIC-NEXT: call _lcallee
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _lcaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq _lcallee
+; DARWIN-64-STATIC-NEXT: callq _lcallee
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _lcaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq _lcallee
+; DARWIN-64-DYNAMIC-NEXT: callq _lcallee
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _lcaller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq _lcallee
+; DARWIN-64-PIC-NEXT: callq _lcallee
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @tailcaller() nounwind {
+entry:
+ call void @callee() nounwind
+ ret void
+; LINUX-64-STATIC: tailcaller:
+; LINUX-64-STATIC: callq callee
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: tailcaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call callee
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: tailcaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call callee
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: tailcaller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq callee@PLT
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _tailcaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call _callee
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _tailcaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _tailcaller:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call L_callee$stub
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _tailcaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq _callee
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _tailcaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq _callee
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _tailcaller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq _callee
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @dtailcaller() nounwind {
+entry:
+ call void @dcallee() nounwind
+ ret void
+; LINUX-64-STATIC: dtailcaller:
+; LINUX-64-STATIC: callq dcallee
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: dtailcaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call dcallee
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: dtailcaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call dcallee
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: dtailcaller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq dcallee
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _dtailcaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call _dcallee
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _dtailcaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call _dcallee
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _dtailcaller:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call _dcallee
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _dtailcaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq _dcallee
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _dtailcaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq _dcallee
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _dtailcaller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq _dcallee
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ltailcaller() nounwind {
+entry:
+ call void @lcallee() nounwind
+ ret void
+; LINUX-64-STATIC: ltailcaller:
+; LINUX-64-STATIC: callq lcallee
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ltailcaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call lcallee
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ltailcaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call lcallee
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ltailcaller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq lcallee@PLT
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ltailcaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call _lcallee
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ltailcaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call _lcallee
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ltailcaller:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call _lcallee
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ltailcaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq _lcallee
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ltailcaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq _lcallee
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ltailcaller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq _lcallee
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @icaller() nounwind {
+entry:
+ %0 = load void ()** @ifunc, align 8
+ call void %0() nounwind
+ %1 = load void ()** @ifunc, align 8
+ call void %1() nounwind
+ ret void
+; LINUX-64-STATIC: icaller:
+; LINUX-64-STATIC: callq *ifunc
+; LINUX-64-STATIC: callq *ifunc
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: icaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call *ifunc
+; LINUX-32-STATIC-NEXT: call *ifunc
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: icaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call *ifunc
+; LINUX-32-PIC-NEXT: call *ifunc
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: icaller:
+; LINUX-64-PIC: pushq %rbx
+; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), %rbx
+; LINUX-64-PIC-NEXT: callq *(%rbx)
+; LINUX-64-PIC-NEXT: callq *(%rbx)
+; LINUX-64-PIC-NEXT: popq %rbx
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _icaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call *_ifunc
+; DARWIN-32-STATIC-NEXT: call *_ifunc
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _icaller:
+; DARWIN-32-DYNAMIC: pushl %esi
+; DARWIN-32-DYNAMIC-NEXT: subl $8, %esp
+; DARWIN-32-DYNAMIC-NEXT: movl L_ifunc$non_lazy_ptr, %esi
+; DARWIN-32-DYNAMIC-NEXT: call *(%esi)
+; DARWIN-32-DYNAMIC-NEXT: call *(%esi)
+; DARWIN-32-DYNAMIC-NEXT: addl $8, %esp
+; DARWIN-32-DYNAMIC-NEXT: popl %esi
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _icaller:
+; DARWIN-32-PIC: pushl %esi
+; DARWIN-32-PIC-NEXT: subl $8, %esp
+; DARWIN-32-PIC-NEXT: call L143$pb
+; DARWIN-32-PIC-NEXT: L143$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_ifunc$non_lazy_ptr-L143$pb(%eax), %esi
+; DARWIN-32-PIC-NEXT: call *(%esi)
+; DARWIN-32-PIC-NEXT: call *(%esi)
+; DARWIN-32-PIC-NEXT: addl $8, %esp
+; DARWIN-32-PIC-NEXT: popl %esi
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _icaller:
+; DARWIN-64-STATIC: pushq %rbx
+; DARWIN-64-STATIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx
+; DARWIN-64-STATIC-NEXT: callq *(%rbx)
+; DARWIN-64-STATIC-NEXT: callq *(%rbx)
+; DARWIN-64-STATIC-NEXT: popq %rbx
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _icaller:
+; DARWIN-64-DYNAMIC: pushq %rbx
+; DARWIN-64-DYNAMIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx
+; DARWIN-64-DYNAMIC-NEXT: callq *(%rbx)
+; DARWIN-64-DYNAMIC-NEXT: callq *(%rbx)
+; DARWIN-64-DYNAMIC-NEXT: popq %rbx
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _icaller:
+; DARWIN-64-PIC: pushq %rbx
+; DARWIN-64-PIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx
+; DARWIN-64-PIC-NEXT: callq *(%rbx)
+; DARWIN-64-PIC-NEXT: callq *(%rbx)
+; DARWIN-64-PIC-NEXT: popq %rbx
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @dicaller() nounwind {
+entry:
+ %0 = load void ()** @difunc, align 8
+ call void %0() nounwind
+ %1 = load void ()** @difunc, align 8
+ call void %1() nounwind
+ ret void
+; LINUX-64-STATIC: dicaller:
+; LINUX-64-STATIC: callq *difunc
+; LINUX-64-STATIC: callq *difunc
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: dicaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call *difunc
+; LINUX-32-STATIC-NEXT: call *difunc
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: dicaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call *difunc
+; LINUX-32-PIC-NEXT: call *difunc
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: dicaller:
+; LINUX-64-PIC: pushq %rbx
+; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), %rbx
+; LINUX-64-PIC-NEXT: callq *(%rbx)
+; LINUX-64-PIC-NEXT: callq *(%rbx)
+; LINUX-64-PIC-NEXT: popq %rbx
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _dicaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call *_difunc
+; DARWIN-32-STATIC-NEXT: call *_difunc
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _dicaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call *_difunc
+; DARWIN-32-DYNAMIC-NEXT: call *_difunc
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _dicaller:
+; DARWIN-32-PIC: pushl %esi
+; DARWIN-32-PIC-NEXT: subl $8, %esp
+; DARWIN-32-PIC-NEXT: call L144$pb
+; DARWIN-32-PIC-NEXT: L144$pb:
+; DARWIN-32-PIC-NEXT: popl %esi
+; DARWIN-32-PIC-NEXT: call *_difunc-L144$pb(%esi)
+; DARWIN-32-PIC-NEXT: call *_difunc-L144$pb(%esi)
+; DARWIN-32-PIC-NEXT: addl $8, %esp
+; DARWIN-32-PIC-NEXT: popl %esi
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _dicaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip)
+; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip)
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _dicaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip)
+; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip)
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _dicaller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq *_difunc(%rip)
+; DARWIN-64-PIC-NEXT: callq *_difunc(%rip)
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @licaller() nounwind {
+entry:
+ %0 = load void ()** @lifunc, align 8
+ call void %0() nounwind
+ %1 = load void ()** @lifunc, align 8
+ call void %1() nounwind
+ ret void
+; LINUX-64-STATIC: licaller:
+; LINUX-64-STATIC: callq *lifunc
+; LINUX-64-STATIC: callq *lifunc
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: licaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call *lifunc
+; LINUX-32-STATIC-NEXT: call *lifunc
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: licaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call *lifunc
+; LINUX-32-PIC-NEXT: call *lifunc
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: licaller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq *lifunc(%rip)
+; LINUX-64-PIC-NEXT: callq *lifunc(%rip)
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _licaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call *_lifunc
+; DARWIN-32-STATIC-NEXT: call *_lifunc
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _licaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call *_lifunc
+; DARWIN-32-DYNAMIC-NEXT: call *_lifunc
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _licaller:
+; DARWIN-32-PIC: pushl %esi
+; DARWIN-32-PIC-NEXT: subl $8, %esp
+; DARWIN-32-PIC-NEXT: call L145$pb
+; DARWIN-32-PIC-NEXT: L145$pb:
+; DARWIN-32-PIC-NEXT: popl %esi
+; DARWIN-32-PIC-NEXT: call *_lifunc-L145$pb(%esi)
+; DARWIN-32-PIC-NEXT: call *_lifunc-L145$pb(%esi)
+; DARWIN-32-PIC-NEXT: addl $8, %esp
+; DARWIN-32-PIC-NEXT: popl %esi
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _licaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _licaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _licaller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @itailcaller() nounwind {
+entry:
+ %0 = load void ()** @ifunc, align 8
+ call void %0() nounwind
+ %1 = load void ()** @ifunc, align 8
+ call void %1() nounwind
+ ret void
+; LINUX-64-STATIC: itailcaller:
+; LINUX-64-STATIC: callq *ifunc
+; LINUX-64-STATIC: callq *ifunc
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: itailcaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call *ifunc
+; LINUX-32-STATIC-NEXT: call *ifunc
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: itailcaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call *ifunc
+; LINUX-32-PIC-NEXT: call *ifunc
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: itailcaller:
+; LINUX-64-PIC: pushq %rbx
+; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), %rbx
+; LINUX-64-PIC-NEXT: callq *(%rbx)
+; LINUX-64-PIC-NEXT: callq *(%rbx)
+; LINUX-64-PIC-NEXT: popq %rbx
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _itailcaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call *_ifunc
+; DARWIN-32-STATIC-NEXT: call *_ifunc
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _itailcaller:
+; DARWIN-32-DYNAMIC: pushl %esi
+; DARWIN-32-DYNAMIC-NEXT: subl $8, %esp
+; DARWIN-32-DYNAMIC-NEXT: movl L_ifunc$non_lazy_ptr, %esi
+; DARWIN-32-DYNAMIC-NEXT: call *(%esi)
+; DARWIN-32-DYNAMIC-NEXT: call *(%esi)
+; DARWIN-32-DYNAMIC-NEXT: addl $8, %esp
+; DARWIN-32-DYNAMIC-NEXT: popl %esi
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _itailcaller:
+; DARWIN-32-PIC: pushl %esi
+; DARWIN-32-PIC-NEXT: subl $8, %esp
+; DARWIN-32-PIC-NEXT: call L146$pb
+; DARWIN-32-PIC-NEXT: L146$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: movl L_ifunc$non_lazy_ptr-L146$pb(%eax), %esi
+; DARWIN-32-PIC-NEXT: call *(%esi)
+; DARWIN-32-PIC-NEXT: call *(%esi)
+; DARWIN-32-PIC-NEXT: addl $8, %esp
+; DARWIN-32-PIC-NEXT: popl %esi
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _itailcaller:
+; DARWIN-64-STATIC: pushq %rbx
+; DARWIN-64-STATIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx
+; DARWIN-64-STATIC-NEXT: callq *(%rbx)
+; DARWIN-64-STATIC-NEXT: callq *(%rbx)
+; DARWIN-64-STATIC-NEXT: popq %rbx
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _itailcaller:
+; DARWIN-64-DYNAMIC: pushq %rbx
+; DARWIN-64-DYNAMIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx
+; DARWIN-64-DYNAMIC-NEXT: callq *(%rbx)
+; DARWIN-64-DYNAMIC-NEXT: callq *(%rbx)
+; DARWIN-64-DYNAMIC-NEXT: popq %rbx
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _itailcaller:
+; DARWIN-64-PIC: pushq %rbx
+; DARWIN-64-PIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx
+; DARWIN-64-PIC-NEXT: callq *(%rbx)
+; DARWIN-64-PIC-NEXT: callq *(%rbx)
+; DARWIN-64-PIC-NEXT: popq %rbx
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @ditailcaller() nounwind {
+entry:
+ %0 = load void ()** @difunc, align 8
+ call void %0() nounwind
+ ret void
+; LINUX-64-STATIC: ditailcaller:
+; LINUX-64-STATIC: callq *difunc
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: ditailcaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call *difunc
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: ditailcaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call *difunc
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: ditailcaller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), %rax
+; LINUX-64-PIC-NEXT: callq *(%rax)
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _ditailcaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call *_difunc
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _ditailcaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call *_difunc
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _ditailcaller:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call L147$pb
+; DARWIN-32-PIC-NEXT: L147$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: call *_difunc-L147$pb(%eax)
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _ditailcaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip)
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _ditailcaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip)
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _ditailcaller:
+; DARWIN-64-PIC: callq *_difunc(%rip)
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
+
+define void @litailcaller() nounwind {
+entry:
+ %0 = load void ()** @lifunc, align 8
+ call void %0() nounwind
+ ret void
+; LINUX-64-STATIC: litailcaller:
+; LINUX-64-STATIC: callq *lifunc
+; LINUX-64-STATIC: ret
+
+; LINUX-32-STATIC: litailcaller:
+; LINUX-32-STATIC: subl $4, %esp
+; LINUX-32-STATIC-NEXT: call *lifunc
+; LINUX-32-STATIC-NEXT: addl $4, %esp
+; LINUX-32-STATIC-NEXT: ret
+
+; LINUX-32-PIC: litailcaller:
+; LINUX-32-PIC: subl $4, %esp
+; LINUX-32-PIC-NEXT: call *lifunc
+; LINUX-32-PIC-NEXT: addl $4, %esp
+; LINUX-32-PIC-NEXT: ret
+
+; LINUX-64-PIC: litailcaller:
+; LINUX-64-PIC: subq $8, %rsp
+; LINUX-64-PIC-NEXT: callq *lifunc(%rip)
+; LINUX-64-PIC-NEXT: addq $8, %rsp
+; LINUX-64-PIC-NEXT: ret
+
+; DARWIN-32-STATIC: _litailcaller:
+; DARWIN-32-STATIC: subl $12, %esp
+; DARWIN-32-STATIC-NEXT: call *_lifunc
+; DARWIN-32-STATIC-NEXT: addl $12, %esp
+; DARWIN-32-STATIC-NEXT: ret
+
+; DARWIN-32-DYNAMIC: _litailcaller:
+; DARWIN-32-DYNAMIC: subl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: call *_lifunc
+; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp
+; DARWIN-32-DYNAMIC-NEXT: ret
+
+; DARWIN-32-PIC: _litailcaller:
+; DARWIN-32-PIC: subl $12, %esp
+; DARWIN-32-PIC-NEXT: call L148$pb
+; DARWIN-32-PIC-NEXT: L148$pb:
+; DARWIN-32-PIC-NEXT: popl %eax
+; DARWIN-32-PIC-NEXT: call *_lifunc-L148$pb(%eax)
+; DARWIN-32-PIC-NEXT: addl $12, %esp
+; DARWIN-32-PIC-NEXT: ret
+
+; DARWIN-64-STATIC: _litailcaller:
+; DARWIN-64-STATIC: subq $8, %rsp
+; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-STATIC-NEXT: addq $8, %rsp
+; DARWIN-64-STATIC-NEXT: ret
+
+; DARWIN-64-DYNAMIC: _litailcaller:
+; DARWIN-64-DYNAMIC: subq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp
+; DARWIN-64-DYNAMIC-NEXT: ret
+
+; DARWIN-64-PIC: _litailcaller:
+; DARWIN-64-PIC: subq $8, %rsp
+; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip)
+; DARWIN-64-PIC-NEXT: addq $8, %rsp
+; DARWIN-64-PIC-NEXT: ret
+}
diff --git a/test/CodeGen/X86/add.ll b/test/CodeGen/X86/add.ll
new file mode 100644
index 0000000..3991a68
--- /dev/null
+++ b/test/CodeGen/X86/add.ll
@@ -0,0 +1,94 @@
+; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
+
+; The immediate can be encoded in a smaller way if the
+; instruction is a sub instead of an add.
+
+define i32 @test1(i32 inreg %a) nounwind {
+ %b = add i32 %a, 128
+ ret i32 %b
+; X32: subl $-128, %eax
+; X64: subl $-128,
+}
+define i64 @test2(i64 inreg %a) nounwind {
+ %b = add i64 %a, 2147483648
+ ret i64 %b
+; X32: addl $-2147483648, %eax
+; X64: subq $-2147483648,
+}
+define i64 @test3(i64 inreg %a) nounwind {
+ %b = add i64 %a, 128
+ ret i64 %b
+
+; X32: addl $128, %eax
+; X64: subq $-128,
+}
+
+define i1 @test4(i32 %v1, i32 %v2, i32* %X) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %overflow, label %normal
+
+normal:
+ store i32 0, i32* %X
+ br label %overflow
+
+overflow:
+ ret i1 false
+
+; X32: test4:
+; X32: addl
+; X32-NEXT: jo
+
+; X64: test4:
+; X64: addl %esi, %edi
+; X64-NEXT: jo
+}
+
+define i1 @test5(i32 %v1, i32 %v2, i32* %X) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %carry, label %normal
+
+normal:
+ store i32 0, i32* %X
+ br label %carry
+
+carry:
+ ret i1 false
+
+; X32: test5:
+; X32: addl
+; X32-NEXT: jb
+
+; X64: test5:
+; X64: addl %esi, %edi
+; X64-NEXT: jb
+}
+
+declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
+declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
+
+
+define i64 @test6(i64 %A, i32 %B) nounwind {
+ %tmp12 = zext i32 %B to i64 ; <i64> [#uses=1]
+ %tmp3 = shl i64 %tmp12, 32 ; <i64> [#uses=1]
+ %tmp5 = add i64 %tmp3, %A ; <i64> [#uses=1]
+ ret i64 %tmp5
+
+; X32: test6:
+; X32: movl 12(%esp), %edx
+; X32-NEXT: addl 8(%esp), %edx
+; X32-NEXT: movl 4(%esp), %eax
+; X32-NEXT: ret
+
+; X64: test6:
+; X64: shlq $32, %rsi
+; X64: leaq (%rsi,%rdi), %rax
+; X64: ret
+}
+
diff --git a/test/CodeGen/X86/addr-label-difference.ll b/test/CodeGen/X86/addr-label-difference.ll
new file mode 100644
index 0000000..547d6b5
--- /dev/null
+++ b/test/CodeGen/X86/addr-label-difference.ll
@@ -0,0 +1,22 @@
+; RUN: llc %s -o - | grep {__TEXT,__const}
+; PR5929
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+target triple = "i386-apple-darwin10.0"
+
+; This array should go into the __TEXT,__const section, not into the
+; __DATA,__const section, because the elements don't need relocations.
[email protected] = internal constant [3 x i32] [i32 sub (i32 ptrtoint (i8* blockaddress(@test, %foo) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %bar) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %hack) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32))] ; <[3 x i32]*> [#uses=1]
+
+define void @test(i32 %i) nounwind ssp {
+entry:
+ br label %foo
+
+foo: ; preds = %indirectgoto, %indirectgoto, %indirectgoto, %indirectgoto, %indirectgoto
+ br label %bar
+
+bar: ; preds = %foo, %indirectgoto
+ br label %hack
+
+hack: ; preds = %bar, %indirectgoto
+ ret void
+}
diff --git a/test/CodeGen/X86/aliases.ll b/test/CodeGen/X86/aliases.ll
new file mode 100644
index 0000000..3020eb3
--- /dev/null
+++ b/test/CodeGen/X86/aliases.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t
+; RUN: grep { = } %t | count 7
+; RUN: grep set %t | count 16
+; RUN: grep globl %t | count 6
+; RUN: grep weak %t | count 1
+; RUN: grep hidden %t | count 1
+; RUN: grep protected %t | count 1
+
+@bar = external global i32
+@foo1 = alias i32* @bar
+@foo2 = alias i32* @bar
+
+%FunTy = type i32()
+
+declare i32 @foo_f()
+@bar_f = alias weak %FunTy* @foo_f
+
+@bar_i = alias internal i32* @bar
+
+@A = alias bitcast (i32* @bar to i64*)
+
+@bar_h = hidden alias i32* @bar
+
+@bar_p = protected alias i32* @bar
+
+define i32 @test() {
+entry:
+ %tmp = load i32* @foo1
+ %tmp1 = load i32* @foo2
+ %tmp0 = load i32* @bar_i
+ %tmp2 = call i32 @foo_f()
+ %tmp3 = add i32 %tmp, %tmp2
+ %tmp4 = call %FunTy* @bar_f()
+ %tmp5 = add i32 %tmp3, %tmp4
+ %tmp6 = add i32 %tmp1, %tmp5
+ %tmp7 = add i32 %tmp6, %tmp0
+ ret i32 %tmp7
+}
diff --git a/test/CodeGen/X86/aligned-comm.ll b/test/CodeGen/X86/aligned-comm.ll
new file mode 100644
index 0000000..7715869
--- /dev/null
+++ b/test/CodeGen/X86/aligned-comm.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep {array,16512,7}
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep {array,16512,7}
+
+; Darwin 9+ should get alignment on common symbols.
+@array = common global [4128 x i32] zeroinitializer, align 128
diff --git a/test/CodeGen/X86/all-ones-vector.ll b/test/CodeGen/X86/all-ones-vector.ll
new file mode 100644
index 0000000..10fecad
--- /dev/null
+++ b/test/CodeGen/X86/all-ones-vector.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -mattr=sse2 | grep pcmpeqd | count 4
+
+define <4 x i32> @ioo() nounwind {
+ ret <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
+}
+define <2 x i64> @loo() nounwind {
+ ret <2 x i64> <i64 -1, i64 -1>
+}
+define <2 x double> @doo() nounwind {
+ ret <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff>
+}
+define <4 x float> @foo() nounwind {
+ ret <4 x float> <float 0xffffffffe0000000, float 0xffffffffe0000000, float 0xffffffffe0000000, float 0xffffffffe0000000>
+}
diff --git a/test/CodeGen/X86/alloca-align-rounding.ll b/test/CodeGen/X86/alloca-align-rounding.ll
new file mode 100644
index 0000000..f45e9b8
--- /dev/null
+++ b/test/CodeGen/X86/alloca-align-rounding.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | grep and | count 1
+; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux | grep and | count 1
+
+declare void @bar(<2 x i64>* %n)
+
+define void @foo(i32 %h) {
+ %p = alloca <2 x i64>, i32 %h
+ call void @bar(<2 x i64>* %p)
+ ret void
+}
+
+define void @foo2(i32 %h) {
+ %p = alloca <2 x i64>, i32 %h, align 32
+ call void @bar(<2 x i64>* %p)
+ ret void
+}
diff --git a/test/CodeGen/X86/and-or-fold.ll b/test/CodeGen/X86/and-or-fold.ll
new file mode 100644
index 0000000..7733b8a5
--- /dev/null
+++ b/test/CodeGen/X86/and-or-fold.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 | grep and | count 1
+
+; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1
+; in this case.
+
+define i32 @test6(i32 %x, i16 %y) {
+ %tmp1 = zext i16 %y to i32 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 127 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
diff --git a/test/CodeGen/X86/and-su.ll b/test/CodeGen/X86/and-su.ll
new file mode 100644
index 0000000..38db88a
--- /dev/null
+++ b/test/CodeGen/X86/and-su.ll
@@ -0,0 +1,53 @@
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+; Don't duplicate the load.
+
+define fastcc i32 @foo(i32* %p) nounwind {
+; CHECK: foo:
+; CHECK: andl $10, %eax
+; CHECK: je
+ %t0 = load i32* %p
+ %t2 = and i32 %t0, 10
+ %t3 = icmp ne i32 %t2, 0
+ br i1 %t3, label %bb63, label %bb76
+bb63:
+ ret i32 %t2
+bb76:
+ ret i32 0
+}
+
+define fastcc double @bar(i32 %hash, double %x, double %y) nounwind {
+entry:
+; CHECK: bar:
+ %0 = and i32 %hash, 15
+ %1 = icmp ult i32 %0, 8
+ br i1 %1, label %bb11, label %bb10
+
+bb10:
+; CHECK: bb10
+; CHECK: testb $1
+ %2 = and i32 %hash, 1
+ %3 = icmp eq i32 %2, 0
+ br i1 %3, label %bb13, label %bb11
+
+bb11:
+ %4 = fsub double -0.000000e+00, %x
+ br label %bb13
+
+bb13:
+; CHECK: bb13
+; CHECK: testb $2
+ %iftmp.9.0 = phi double [ %4, %bb11 ], [ %x, %bb10 ]
+ %5 = and i32 %hash, 2
+ %6 = icmp eq i32 %5, 0
+ br i1 %6, label %bb16, label %bb14
+
+bb14:
+ %7 = fsub double -0.000000e+00, %y
+ br label %bb16
+
+bb16:
+ %iftmp.10.0 = phi double [ %7, %bb14 ], [ %y, %bb13 ]
+ %8 = fadd double %iftmp.9.0, %iftmp.10.0
+ ret double %8
+}
diff --git a/test/CodeGen/X86/anyext.ll b/test/CodeGen/X86/anyext.ll
new file mode 100644
index 0000000..106fe83
--- /dev/null
+++ b/test/CodeGen/X86/anyext.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86-64 | grep movzbl | count 2
+
+; Use movzbl to avoid partial-register updates.
+
+define i32 @foo(i32 %p, i8 zeroext %x) nounwind {
+ %q = trunc i32 %p to i8
+ %r = udiv i8 %q, %x
+ %s = zext i8 %r to i32
+ %t = and i32 %s, 1
+ ret i32 %t
+}
+define i32 @bar(i32 %p, i16 zeroext %x) nounwind {
+ %q = trunc i32 %p to i16
+ %r = udiv i16 %q, %x
+ %s = zext i16 %r to i32
+ %t = and i32 %s, 1
+ ret i32 %t
+}
diff --git a/test/CodeGen/X86/arg-cast.ll b/test/CodeGen/X86/arg-cast.ll
new file mode 100644
index 0000000..c111514
--- /dev/null
+++ b/test/CodeGen/X86/arg-cast.ll
@@ -0,0 +1,18 @@
+; This should compile to movl $2147483647, %eax + andl only.
+; RUN: llc < %s | grep andl
+; RUN: llc < %s | not grep movsd
+; RUN: llc < %s | grep esp | not grep add
+; rdar://5736574
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+define i32 @foo(double %x) nounwind {
+entry:
+ %x15 = bitcast double %x to i64 ; <i64> [#uses=1]
+ %tmp713 = lshr i64 %x15, 32 ; <i64> [#uses=1]
+ %tmp714 = trunc i64 %tmp713 to i32 ; <i32> [#uses=1]
+ %tmp8 = and i32 %tmp714, 2147483647 ; <i32> [#uses=1]
+ ret i32 %tmp8
+}
+
diff --git a/test/CodeGen/X86/asm-block-labels.ll b/test/CodeGen/X86/asm-block-labels.ll
new file mode 100644
index 0000000..a43d430
--- /dev/null
+++ b/test/CodeGen/X86/asm-block-labels.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -std-compile-opts | llc
+; ModuleID = 'block12.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+define void @bar() {
+entry:
+ br label %"LASM$foo"
+
+"LASM$foo": ; preds = %entry
+ call void asm sideeffect ".file \22block12.c\22", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect ".line 1", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect "int $$1", "~{dirflag},~{fpsr},~{flags},~{memory}"( )
+ call void asm sideeffect ".file \22block12.c\22", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect ".line 2", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect "brl ${0:l}", "X,~{dirflag},~{fpsr},~{flags},~{memory}"( label %"LASM$foo" )
+ br label %return
+
+return: ; preds = %"LASM$foo"
+ ret void
+}
+
+define void @baz() {
+entry:
+ call void asm sideeffect ".file \22block12.c\22", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect ".line 3", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect "brl ${0:l}", "X,~{dirflag},~{fpsr},~{flags},~{memory}"( label %"LASM$foo" )
+ call void asm sideeffect ".file \22block12.c\22", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect ".line 4", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect "int $$1", "~{dirflag},~{fpsr},~{flags},~{memory}"( )
+ br label %"LASM$foo"
+
+"LASM$foo": ; preds = %entry
+ call void asm sideeffect ".file \22block12.c\22", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect ".line 5", "~{dirflag},~{fpsr},~{flags}"( )
+ call void asm sideeffect "int $$1", "~{dirflag},~{fpsr},~{flags},~{memory}"( )
+ br label %return
+
+return: ; preds = %"LASM$foo"
+ ret void
+}
diff --git a/test/CodeGen/X86/asm-global-imm.ll b/test/CodeGen/X86/asm-global-imm.ll
new file mode 100644
index 0000000..96da224
--- /dev/null
+++ b/test/CodeGen/X86/asm-global-imm.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 -relocation-model=static | \
+; RUN: grep {test1 \$_GV}
+; RUN: llc < %s -march=x86 -relocation-model=static | \
+; RUN: grep {test2 _GV}
+; PR882
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin9.0.0d2"
+@GV = weak global i32 0 ; <i32*> [#uses=2]
+@str = external global [12 x i8] ; <[12 x i8]*> [#uses=1]
+
+define void @foo() {
+entry:
+ tail call void asm sideeffect "test1 $0", "i,~{dirflag},~{fpsr},~{flags}"( i32* @GV )
+ tail call void asm sideeffect "test2 ${0:c}", "i,~{dirflag},~{fpsr},~{flags}"( i32* @GV )
+ ret void
+}
+
+define void @unknown_bootoption() {
+entry:
+ call void asm sideeffect "ud2\0A\09.word ${0:c}\0A\09.long ${1:c}\0A", "i,i,~{dirflag},~{fpsr},~{flags}"( i32 235, i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) )
+ ret void
+}
diff --git a/test/CodeGen/X86/asm-indirect-mem.ll b/test/CodeGen/X86/asm-indirect-mem.ll
new file mode 100644
index 0000000..c57aa99
--- /dev/null
+++ b/test/CodeGen/X86/asm-indirect-mem.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+; PR2267
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @atomic_store_rel_int(i32* %p, i32 %v) nounwind {
+entry:
+ %asmtmp = tail call i32 asm sideeffect "xchgl $1,$0", "=*m,=r,*m,1,~{dirflag},~{fpsr},~{flags}"( i32* %p, i32* %p, i32 %v ) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/X86/asm-modifier-P.ll b/test/CodeGen/X86/asm-modifier-P.ll
new file mode 100644
index 0000000..6139da8
--- /dev/null
+++ b/test/CodeGen/X86/asm-modifier-P.ll
@@ -0,0 +1,79 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32
+; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32
+; RUN: llc < %s -march=x86-64 -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64
+; RUN: llc < %s -march=x86-64 -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64
+; PR3379
+; XFAIL: *
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+@G = external global i32 ; <i32*> [#uses=1]
+
+declare void @bar(...)
+
+; extern int G;
+; void test1() {
+; asm("frob %0 x" : : "m"(G));
+; asm("frob %P0 x" : : "m"(G));
+;}
+
+define void @test1() nounwind {
+entry:
+; P suffix removes (rip) in -static 64-bit mode.
+
+; CHECK-PIC-64: test1:
+; CHECK-PIC-64: movq G@GOTPCREL(%rip), %rax
+; CHECK-PIC-64: frob (%rax) x
+; CHECK-PIC-64: frob (%rax) x
+
+; CHECK-STATIC-64: test1:
+; CHECK-STATIC-64: frob G(%rip) x
+; CHECK-STATIC-64: frob G x
+
+; CHECK-PIC-32: test1:
+; CHECK-PIC-32: frob G x
+; CHECK-PIC-32: frob G x
+
+; CHECK-STATIC-32: test1:
+; CHECK-STATIC-32: frob G x
+; CHECK-STATIC-32: frob G x
+
+ call void asm "frob $0 x", "*m"(i32* @G) nounwind
+ call void asm "frob ${0:P} x", "*m"(i32* @G) nounwind
+ ret void
+}
+
+define void @test3() nounwind {
+entry:
+; CHECK-STATIC-64: test3:
+; CHECK-STATIC-64: call bar
+; CHECK-STATIC-64: call test3
+; CHECK-STATIC-64: call $bar
+; CHECK-STATIC-64: call $test3
+
+; CHECK-STATIC-32: test3:
+; CHECK-STATIC-32: call bar
+; CHECK-STATIC-32: call test3
+; CHECK-STATIC-32: call $bar
+; CHECK-STATIC-32: call $test3
+
+; CHECK-PIC-64: test3:
+; CHECK-PIC-64: call bar@PLT
+; CHECK-PIC-64: call test3@PLT
+; CHECK-PIC-64: call $bar
+; CHECK-PIC-64: call $test3
+
+; CHECK-PIC-32: test3:
+; CHECK-PIC-32: call bar@PLT
+; CHECK-PIC-32: call test3@PLT
+; CHECK-PIC-32: call $bar
+; CHECK-PIC-32: call $test3
+
+
+; asm(" blah %P0" : : "X"(bar));
+ tail call void asm sideeffect "call ${0:P}", "X"(void (...)* @bar) nounwind
+ tail call void asm sideeffect "call ${0:P}", "X"(void (...)* bitcast (void ()* @test3 to void (...)*)) nounwind
+ tail call void asm sideeffect "call $0", "X"(void (...)* @bar) nounwind
+ tail call void asm sideeffect "call $0", "X"(void (...)* bitcast (void ()* @test3 to void (...)*)) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/asm-modifier.ll b/test/CodeGen/X86/asm-modifier.ll
new file mode 100644
index 0000000..44f972e
--- /dev/null
+++ b/test/CodeGen/X86/asm-modifier.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s | FileCheck %s
+; ModuleID = 'asm.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+define i32 @test1() nounwind {
+entry:
+; CHECK: test1:
+; CHECK: movw %gs:6, %ax
+ %asmtmp.i = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 6) nounwind ; <i16> [#uses=1]
+ %0 = zext i16 %asmtmp.i to i32 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+define zeroext i16 @test2(i32 %address) nounwind {
+entry:
+; CHECK: test2:
+; CHECK: movw %gs:(%eax), %ax
+ %asmtmp = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 %address) nounwind ; <i16> [#uses=1]
+ ret i16 %asmtmp
+}
+
+@n = global i32 42 ; <i32*> [#uses=3]
+@y = common global i32 0 ; <i32*> [#uses=3]
+
+define void @test3() nounwind {
+entry:
+; CHECK: test3:
+; CHECK: movl _n, %eax
+ call void asm sideeffect "movl ${0:a}, %eax", "ir,~{dirflag},~{fpsr},~{flags},~{eax}"(i32* @n) nounwind
+ ret void
+}
+
+define void @test4() nounwind {
+entry:
+; CHECK: test4:
+; CHECK: movl L_y$non_lazy_ptr, %ecx
+; CHECK: movl (%ecx), %eax
+ call void asm sideeffect "movl ${0:a}, %eax", "ir,~{dirflag},~{fpsr},~{flags},~{eax}"(i32* @y) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/atomic_add.ll b/test/CodeGen/X86/atomic_add.ll
new file mode 100644
index 0000000..d00f8e8
--- /dev/null
+++ b/test/CodeGen/X86/atomic_add.ll
@@ -0,0 +1,217 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; rdar://7103704
+
+define void @sub1(i32* nocapture %p, i32 %v) nounwind ssp {
+entry:
+; CHECK: sub1:
+; CHECK: subl
+ %0 = tail call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %p, i32 %v) ; <i32> [#uses=0]
+ ret void
+}
+
+define void @inc4(i64* nocapture %p) nounwind ssp {
+entry:
+; CHECK: inc4:
+; CHECK: incq
+ %0 = tail call i64 @llvm.atomic.load.add.i64.p0i64(i64* %p, i64 1) ; <i64> [#uses=0]
+ ret void
+}
+
+declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind
+
+define void @add8(i64* nocapture %p) nounwind ssp {
+entry:
+; CHECK: add8:
+; CHECK: addq $2
+ %0 = tail call i64 @llvm.atomic.load.add.i64.p0i64(i64* %p, i64 2) ; <i64> [#uses=0]
+ ret void
+}
+
+define void @add4(i64* nocapture %p, i32 %v) nounwind ssp {
+entry:
+; CHECK: add4:
+; CHECK: addq
+ %0 = sext i32 %v to i64 ; <i64> [#uses=1]
+ %1 = tail call i64 @llvm.atomic.load.add.i64.p0i64(i64* %p, i64 %0) ; <i64> [#uses=0]
+ ret void
+}
+
+define void @inc3(i8* nocapture %p) nounwind ssp {
+entry:
+; CHECK: inc3:
+; CHECK: incb
+ %0 = tail call i8 @llvm.atomic.load.add.i8.p0i8(i8* %p, i8 1) ; <i8> [#uses=0]
+ ret void
+}
+
+declare i8 @llvm.atomic.load.add.i8.p0i8(i8* nocapture, i8) nounwind
+
+define void @add7(i8* nocapture %p) nounwind ssp {
+entry:
+; CHECK: add7:
+; CHECK: addb $2
+ %0 = tail call i8 @llvm.atomic.load.add.i8.p0i8(i8* %p, i8 2) ; <i8> [#uses=0]
+ ret void
+}
+
+define void @add3(i8* nocapture %p, i32 %v) nounwind ssp {
+entry:
+; CHECK: add3:
+; CHECK: addb
+ %0 = trunc i32 %v to i8 ; <i8> [#uses=1]
+ %1 = tail call i8 @llvm.atomic.load.add.i8.p0i8(i8* %p, i8 %0) ; <i8> [#uses=0]
+ ret void
+}
+
+define void @inc2(i16* nocapture %p) nounwind ssp {
+entry:
+; CHECK: inc2:
+; CHECK: incw
+ %0 = tail call i16 @llvm.atomic.load.add.i16.p0i16(i16* %p, i16 1) ; <i16> [#uses=0]
+ ret void
+}
+
+declare i16 @llvm.atomic.load.add.i16.p0i16(i16* nocapture, i16) nounwind
+
+define void @add6(i16* nocapture %p) nounwind ssp {
+entry:
+; CHECK: add6:
+; CHECK: addw $2
+ %0 = tail call i16 @llvm.atomic.load.add.i16.p0i16(i16* %p, i16 2) ; <i16> [#uses=0]
+ ret void
+}
+
+define void @add2(i16* nocapture %p, i32 %v) nounwind ssp {
+entry:
+; CHECK: add2:
+; CHECK: addw
+ %0 = trunc i32 %v to i16 ; <i16> [#uses=1]
+ %1 = tail call i16 @llvm.atomic.load.add.i16.p0i16(i16* %p, i16 %0) ; <i16> [#uses=0]
+ ret void
+}
+
+define void @inc1(i32* nocapture %p) nounwind ssp {
+entry:
+; CHECK: inc1:
+; CHECK: incl
+ %0 = tail call i32 @llvm.atomic.load.add.i32.p0i32(i32* %p, i32 1) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @llvm.atomic.load.add.i32.p0i32(i32* nocapture, i32) nounwind
+
+define void @add5(i32* nocapture %p) nounwind ssp {
+entry:
+; CHECK: add5:
+; CHECK: addl $2
+ %0 = tail call i32 @llvm.atomic.load.add.i32.p0i32(i32* %p, i32 2) ; <i32> [#uses=0]
+ ret void
+}
+
+define void @add1(i32* nocapture %p, i32 %v) nounwind ssp {
+entry:
+; CHECK: add1:
+; CHECK: addl
+ %0 = tail call i32 @llvm.atomic.load.add.i32.p0i32(i32* %p, i32 %v) ; <i32> [#uses=0]
+ ret void
+}
+
+define void @dec4(i64* nocapture %p) nounwind ssp {
+entry:
+; CHECK: dec4:
+; CHECK: decq
+ %0 = tail call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %p, i64 1) ; <i64> [#uses=0]
+ ret void
+}
+
+declare i64 @llvm.atomic.load.sub.i64.p0i64(i64* nocapture, i64) nounwind
+
+define void @sub8(i64* nocapture %p) nounwind ssp {
+entry:
+; CHECK: sub8:
+; CHECK: subq $2
+ %0 = tail call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %p, i64 2) ; <i64> [#uses=0]
+ ret void
+}
+
+define void @sub4(i64* nocapture %p, i32 %v) nounwind ssp {
+entry:
+; CHECK: sub4:
+; CHECK: subq
+ %0 = sext i32 %v to i64 ; <i64> [#uses=1]
+ %1 = tail call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %p, i64 %0) ; <i64> [#uses=0]
+ ret void
+}
+
+define void @dec3(i8* nocapture %p) nounwind ssp {
+entry:
+; CHECK: dec3:
+; CHECK: decb
+ %0 = tail call i8 @llvm.atomic.load.sub.i8.p0i8(i8* %p, i8 1) ; <i8> [#uses=0]
+ ret void
+}
+
+declare i8 @llvm.atomic.load.sub.i8.p0i8(i8* nocapture, i8) nounwind
+
+define void @sub7(i8* nocapture %p) nounwind ssp {
+entry:
+; CHECK: sub7:
+; CHECK: subb $2
+ %0 = tail call i8 @llvm.atomic.load.sub.i8.p0i8(i8* %p, i8 2) ; <i8> [#uses=0]
+ ret void
+}
+
+define void @sub3(i8* nocapture %p, i32 %v) nounwind ssp {
+entry:
+; CHECK: sub3:
+; CHECK: subb
+ %0 = trunc i32 %v to i8 ; <i8> [#uses=1]
+ %1 = tail call i8 @llvm.atomic.load.sub.i8.p0i8(i8* %p, i8 %0) ; <i8> [#uses=0]
+ ret void
+}
+
+define void @dec2(i16* nocapture %p) nounwind ssp {
+entry:
+; CHECK: dec2:
+; CHECK: decw
+ %0 = tail call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %p, i16 1) ; <i16> [#uses=0]
+ ret void
+}
+
+declare i16 @llvm.atomic.load.sub.i16.p0i16(i16* nocapture, i16) nounwind
+
+define void @sub6(i16* nocapture %p) nounwind ssp {
+entry:
+; CHECK: sub6:
+; CHECK: subw $2
+ %0 = tail call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %p, i16 2) ; <i16> [#uses=0]
+ ret void
+}
+
+define void @sub2(i16* nocapture %p, i32 %v) nounwind ssp {
+entry:
+; CHECK: sub2:
+; CHECK: subw
+ %0 = trunc i32 %v to i16 ; <i16> [#uses=1]
+ %1 = tail call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %p, i16 %0) ; <i16> [#uses=0]
+ ret void
+}
+
+define void @dec1(i32* nocapture %p) nounwind ssp {
+entry:
+; CHECK: dec1:
+; CHECK: decl
+ %0 = tail call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %p, i32 1) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @llvm.atomic.load.sub.i32.p0i32(i32* nocapture, i32) nounwind
+
+define void @sub5(i32* nocapture %p) nounwind ssp {
+entry:
+; CHECK: sub5:
+; CHECK: subl $2
+ %0 = tail call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %p, i32 2) ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/atomic_op.ll b/test/CodeGen/X86/atomic_op.ll
new file mode 100644
index 0000000..3ef1887
--- /dev/null
+++ b/test/CodeGen/X86/atomic_op.ll
@@ -0,0 +1,94 @@
+; RUN: llc < %s -march=x86 -o %t1
+; RUN: grep "lock" %t1 | count 17
+; RUN: grep "xaddl" %t1 | count 4
+; RUN: grep "cmpxchgl" %t1 | count 13
+; RUN: grep "xchgl" %t1 | count 14
+; RUN: grep "cmova" %t1 | count 2
+; RUN: grep "cmovb" %t1 | count 2
+; RUN: grep "cmovg" %t1 | count 2
+; RUN: grep "cmovl" %t1 | count 2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+define void @main(i32 %argc, i8** %argv) {
+entry:
+ %argc.addr = alloca i32 ; <i32*> [#uses=1]
+ %argv.addr = alloca i8** ; <i8***> [#uses=1]
+ %val1 = alloca i32 ; <i32*> [#uses=2]
+ %val2 = alloca i32 ; <i32*> [#uses=15]
+ %andt = alloca i32 ; <i32*> [#uses=2]
+ %ort = alloca i32 ; <i32*> [#uses=2]
+ %xort = alloca i32 ; <i32*> [#uses=2]
+ %old = alloca i32 ; <i32*> [#uses=18]
+ %temp = alloca i32 ; <i32*> [#uses=2]
+ store i32 %argc, i32* %argc.addr
+ store i8** %argv, i8*** %argv.addr
+ store i32 0, i32* %val1
+ store i32 31, i32* %val2
+ store i32 3855, i32* %andt
+ store i32 3855, i32* %ort
+ store i32 3855, i32* %xort
+ store i32 4, i32* %temp
+ %tmp = load i32* %temp ; <i32> [#uses=1]
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val1, i32 %tmp ) ; <i32>:0 [#uses=1]
+ store i32 %0, i32* %old
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 30 ) ; <i32>:1 [#uses=1]
+ store i32 %1, i32* %old
+ call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:2 [#uses=1]
+ store i32 %2, i32* %old
+ call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:3 [#uses=1]
+ store i32 %3, i32* %old
+ call i32 @llvm.atomic.load.and.i32.p0i32( i32* %andt, i32 4080 ) ; <i32>:4 [#uses=1]
+ store i32 %4, i32* %old
+ call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ort, i32 4080 ) ; <i32>:5 [#uses=1]
+ store i32 %5, i32* %old
+ call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %xort, i32 4080 ) ; <i32>:6 [#uses=1]
+ store i32 %6, i32* %old
+ call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 16 ) ; <i32>:7 [#uses=1]
+ store i32 %7, i32* %old
+ %neg = sub i32 0, 1 ; <i32> [#uses=1]
+ call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 %neg ) ; <i32>:8 [#uses=1]
+ store i32 %8, i32* %old
+ call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:9 [#uses=1]
+ store i32 %9, i32* %old
+ call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 0 ) ; <i32>:10 [#uses=1]
+ store i32 %10, i32* %old
+ call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %val2, i32 65535 ) ; <i32>:11 [#uses=1]
+ store i32 %11, i32* %old
+ call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %val2, i32 10 ) ; <i32>:12 [#uses=1]
+ store i32 %12, i32* %old
+ call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:13 [#uses=1]
+ store i32 %13, i32* %old
+ call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %val2, i32 10 ) ; <i32>:14 [#uses=1]
+ store i32 %14, i32* %old
+ call i32 @llvm.atomic.swap.i32.p0i32( i32* %val2, i32 1976 ) ; <i32>:15 [#uses=1]
+ store i32 %15, i32* %old
+ %neg1 = sub i32 0, 10 ; <i32> [#uses=1]
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %val2, i32 %neg1, i32 1 ) ; <i32>:16 [#uses=1]
+ store i32 %16, i32* %old
+ call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %val2, i32 1976, i32 1 ) ; <i32>:17 [#uses=1]
+ store i32 %17, i32* %old
+ ret void
+}
+
+declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.load.min.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.load.max.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.load.umax.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.load.umin.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind
+
+declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind
diff --git a/test/CodeGen/X86/attribute-sections.ll b/test/CodeGen/X86/attribute-sections.ll
new file mode 100644
index 0000000..3035334
--- /dev/null
+++ b/test/CodeGen/X86/attribute-sections.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
+
+declare i32 @foo()
+@G0 = global i32 ()* @foo, section ".init_array"
+
+; LINUX: .section .init_array,"aw"
+; LINUX: .globl G0
+
+@G1 = global i32 ()* @foo, section ".fini_array"
+
+; LINUX: .section .fini_array,"aw"
+; LINUX: .globl G1
+
+@G2 = global i32 ()* @foo, section ".preinit_array"
+
+; LINUX: .section .preinit_array,"aw"
+; LINUX: .globl G2
+
diff --git a/test/CodeGen/X86/avoid-lea-scale2.ll b/test/CodeGen/X86/avoid-lea-scale2.ll
new file mode 100644
index 0000000..8003de2
--- /dev/null
+++ b/test/CodeGen/X86/avoid-lea-scale2.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86-64 | grep {leal.*-2(\[%\]rdi,\[%\]rdi)}
+
+define i32 @foo(i32 %x) nounwind readnone {
+ %t0 = shl i32 %x, 1
+ %t1 = add i32 %t0, -2
+ ret i32 %t1
+}
+
diff --git a/test/CodeGen/X86/avoid-loop-align-2.ll b/test/CodeGen/X86/avoid-loop-align-2.ll
new file mode 100644
index 0000000..fc9d1f0
--- /dev/null
+++ b/test/CodeGen/X86/avoid-loop-align-2.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=x86 | grep align | count 4
+
+; TODO: Is it a good idea to align inner loops? It's hard to know without
+; knowing what their trip counts are, or other dynamic information. For
+; now, CodeGen aligns all loops.
+
+@x = external global i32* ; <i32**> [#uses=1]
+
+define i32 @t(i32 %a, i32 %b) nounwind readonly ssp {
+entry:
+ %0 = icmp eq i32 %a, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb5, label %bb.nph12
+
+bb.nph12: ; preds = %entry
+ %1 = icmp eq i32 %b, 0 ; <i1> [#uses=1]
+ %2 = load i32** @x, align 8 ; <i32*> [#uses=1]
+ br i1 %1, label %bb2.preheader, label %bb2.preheader.us
+
+bb2.preheader.us: ; preds = %bb2.bb3_crit_edge.us, %bb.nph12
+ %indvar18 = phi i32 [ 0, %bb.nph12 ], [ %indvar.next19, %bb2.bb3_crit_edge.us ] ; <i32> [#uses=2]
+ %sum.111.us = phi i32 [ 0, %bb.nph12 ], [ %4, %bb2.bb3_crit_edge.us ] ; <i32> [#uses=0]
+ %tmp16 = mul i32 %indvar18, %a ; <i32> [#uses=1]
+ br label %bb1.us
+
+bb1.us: ; preds = %bb1.us, %bb2.preheader.us
+ %indvar = phi i32 [ 0, %bb2.preheader.us ], [ %indvar.next, %bb1.us ] ; <i32> [#uses=2]
+ %tmp17 = add i32 %indvar, %tmp16 ; <i32> [#uses=1]
+ %tmp. = zext i32 %tmp17 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr i32* %2, i64 %tmp. ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 4 ; <i32> [#uses=2]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %b ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb2.bb3_crit_edge.us, label %bb1.us
+
+bb2.bb3_crit_edge.us: ; preds = %bb1.us
+ %indvar.next19 = add i32 %indvar18, 1 ; <i32> [#uses=2]
+ %exitcond22 = icmp eq i32 %indvar.next19, %a ; <i1> [#uses=1]
+ br i1 %exitcond22, label %bb5, label %bb2.preheader.us
+
+bb2.preheader: ; preds = %bb2.preheader, %bb.nph12
+ %indvar24 = phi i32 [ %indvar.next25, %bb2.preheader ], [ 0, %bb.nph12 ] ; <i32> [#uses=1]
+ %indvar.next25 = add i32 %indvar24, 1 ; <i32> [#uses=2]
+ %exitcond28 = icmp eq i32 %indvar.next25, %a ; <i1> [#uses=1]
+ br i1 %exitcond28, label %bb5, label %bb2.preheader
+
+bb5: ; preds = %bb2.preheader, %bb2.bb3_crit_edge.us, %entry
+ %sum.1.lcssa = phi i32 [ 0, %entry ], [ 0, %bb2.preheader ], [ %4, %bb2.bb3_crit_edge.us ] ; <i32> [#uses=1]
+ ret i32 %sum.1.lcssa
+}
diff --git a/test/CodeGen/X86/avoid-loop-align.ll b/test/CodeGen/X86/avoid-loop-align.ll
new file mode 100644
index 0000000..d4c5c672
--- /dev/null
+++ b/test/CodeGen/X86/avoid-loop-align.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+
+; CodeGen should align the top of the loop, which differs from the loop
+; header in this case.
+
+; CHECK: jmp LBB1_2
+; CHECK: .align
+; CHECK: LBB1_1:
+
+@A = common global [100 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=1]
+
+define i8* @test(i8* %Q, i32* %L) nounwind {
+entry:
+ %tmp = tail call i32 (...)* @foo() nounwind ; <i32> [#uses=2]
+ %tmp1 = inttoptr i32 %tmp to i8* ; <i8*> [#uses=1]
+ br label %bb1
+
+bb: ; preds = %bb1, %bb1
+ %indvar.next = add i32 %P.0.rec, 1 ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %P.0.rec = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %P.0 = getelementptr i8* %tmp1, i32 %P.0.rec ; <i8*> [#uses=3]
+ %tmp2 = load i8* %P.0, align 1 ; <i8> [#uses=1]
+ switch i8 %tmp2, label %bb4 [
+ i8 12, label %bb
+ i8 42, label %bb
+ ]
+
+bb4: ; preds = %bb1
+ %tmp3 = ptrtoint i8* %P.0 to i32 ; <i32> [#uses=1]
+ %tmp4 = sub i32 %tmp3, %tmp ; <i32> [#uses=1]
+ %tmp5 = getelementptr [100 x i32]* @A, i32 0, i32 %tmp4 ; <i32*> [#uses=1]
+ store i32 4, i32* %tmp5, align 4
+ ret i8* %P.0
+}
+
+declare i32 @foo(...)
diff --git a/test/CodeGen/X86/bigstructret.ll b/test/CodeGen/X86/bigstructret.ll
new file mode 100644
index 0000000..633995d
--- /dev/null
+++ b/test/CodeGen/X86/bigstructret.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -o %t
+; RUN: grep "movl .24601, 12(%ecx)" %t
+; RUN: grep "movl .48, 8(%ecx)" %t
+; RUN: grep "movl .24, 4(%ecx)" %t
+; RUN: grep "movl .12, (%ecx)" %t
+
+%0 = type { i32, i32, i32, i32 }
+
+define internal fastcc %0 @ReturnBigStruct() nounwind readnone {
+entry:
+ %0 = insertvalue %0 zeroinitializer, i32 12, 0
+ %1 = insertvalue %0 %0, i32 24, 1
+ %2 = insertvalue %0 %1, i32 48, 2
+ %3 = insertvalue %0 %2, i32 24601, 3
+ ret %0 %3
+}
+
diff --git a/test/CodeGen/X86/bigstructret2.ll b/test/CodeGen/X86/bigstructret2.ll
new file mode 100644
index 0000000..46e0fd2
--- /dev/null
+++ b/test/CodeGen/X86/bigstructret2.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -o %t
+
+%0 = type { i64, i64 }
+
+declare fastcc %0 @ReturnBigStruct() nounwind readnone
+
+define void @test(%0* %p) {
+ %1 = call fastcc %0 @ReturnBigStruct()
+ store %0 %1, %0* %p
+ ret void
+}
+
diff --git a/test/CodeGen/X86/bitcast-int-to-vector.ll b/test/CodeGen/X86/bitcast-int-to-vector.ll
new file mode 100644
index 0000000..4c25979
--- /dev/null
+++ b/test/CodeGen/X86/bitcast-int-to-vector.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86
+
+define i1 @foo(i64 %a)
+{
+ %t = bitcast i64 %a to <2 x float>
+ %r = extractelement <2 x float> %t, i32 0
+ %s = extractelement <2 x float> %t, i32 1
+ %b = fcmp uno float %r, %s
+ ret i1 %b
+}
diff --git a/test/CodeGen/X86/bitcast.ll b/test/CodeGen/X86/bitcast.ll
new file mode 100644
index 0000000..c34c675
--- /dev/null
+++ b/test/CodeGen/X86/bitcast.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
+; PR1033
+
+define i64 @test1(double %t) {
+ %u = bitcast double %t to i64 ; <i64> [#uses=1]
+ ret i64 %u
+}
+
+define double @test2(i64 %t) {
+ %u = bitcast i64 %t to double ; <double> [#uses=1]
+ ret double %u
+}
+
+define i32 @test3(float %t) {
+ %u = bitcast float %t to i32 ; <i32> [#uses=1]
+ ret i32 %u
+}
+
+define float @test4(i32 %t) {
+ %u = bitcast i32 %t to float ; <float> [#uses=1]
+ ret float %u
+}
+
diff --git a/test/CodeGen/X86/bitcast2.ll b/test/CodeGen/X86/bitcast2.ll
new file mode 100644
index 0000000..48922b5
--- /dev/null
+++ b/test/CodeGen/X86/bitcast2.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 | grep movd | count 2
+; RUN: llc < %s -march=x86-64 | not grep rsp
+
+define i64 @test1(double %A) {
+ %B = bitcast double %A to i64
+ ret i64 %B
+}
+
+define double @test2(i64 %A) {
+ %B = bitcast i64 %A to double
+ ret double %B
+}
+
diff --git a/test/CodeGen/X86/br-fold.ll b/test/CodeGen/X86/br-fold.ll
new file mode 100644
index 0000000..8af3bd1
--- /dev/null
+++ b/test/CodeGen/X86/br-fold.ll
@@ -0,0 +1,20 @@
+; RUN: llc -march=x86-64 < %s | FileCheck %s
+
+; CHECK: orq
+; CHECK-NEXT: jne
+
+@_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE = external constant [33 x i16], align 32 ; <[33 x i16]*> [#uses=1]
+@_ZN11xercesc_2_56XMLUni16fgNotationStringE = external constant [9 x i16], align 16 ; <[9 x i16]*> [#uses=1]
+
+define fastcc void @foo() {
+entry:
+ br i1 icmp eq (i64 or (i64 ptrtoint ([33 x i16]* @_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE to i64),
+ i64 ptrtoint ([9 x i16]* @_ZN11xercesc_2_56XMLUni16fgNotationStringE to i64)), i64 0),
+ label %bb8.i329, label %bb4.i.i318.preheader
+
+bb4.i.i318.preheader: ; preds = %bb6
+ unreachable
+
+bb8.i329: ; preds = %bb6
+ unreachable
+}
diff --git a/test/CodeGen/X86/brcond.ll b/test/CodeGen/X86/brcond.ll
new file mode 100644
index 0000000..130483a
--- /dev/null
+++ b/test/CodeGen/X86/brcond.ll
@@ -0,0 +1,69 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s
+; rdar://7475489
+
+define i32 @test1(i32 %a, i32 %b) nounwind ssp {
+entry:
+; CHECK: test1:
+; CHECK: xorb
+; CHECK-NOT: andb
+; CHECK-NOT: shrb
+; CHECK: testb $64
+ %0 = and i32 %a, 16384
+ %1 = icmp ne i32 %0, 0
+ %2 = and i32 %b, 16384
+ %3 = icmp ne i32 %2, 0
+ %4 = xor i1 %1, %3
+ br i1 %4, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %5 = tail call i32 (...)* @foo() nounwind ; <i32> [#uses=1]
+ ret i32 %5
+
+bb1: ; preds = %entry
+ %6 = tail call i32 (...)* @bar() nounwind ; <i32> [#uses=1]
+ ret i32 %6
+}
+
+declare i32 @foo(...)
+
+declare i32 @bar(...)
+
+
+
+; PR3351 - (P == 0) & (Q == 0) -> (P|Q) == 0
+define i32 @test2(i32* %P, i32* %Q) nounwind ssp {
+entry:
+ %a = icmp eq i32* %P, null ; <i1> [#uses=1]
+ %b = icmp eq i32* %Q, null ; <i1> [#uses=1]
+ %c = and i1 %a, %b
+ br i1 %c, label %bb1, label %return
+
+bb1: ; preds = %entry
+ ret i32 4
+
+return: ; preds = %entry
+ ret i32 192
+; CHECK: test2:
+; CHECK: movl 4(%esp), %eax
+; CHECK-NEXT: orl 8(%esp), %eax
+; CHECK-NEXT: jne LBB2_2
+}
+
+; PR3351 - (P != 0) | (Q != 0) -> (P|Q) != 0
+define i32 @test3(i32* %P, i32* %Q) nounwind ssp {
+entry:
+ %a = icmp ne i32* %P, null ; <i1> [#uses=1]
+ %b = icmp ne i32* %Q, null ; <i1> [#uses=1]
+ %c = or i1 %a, %b
+ br i1 %c, label %bb1, label %return
+
+bb1: ; preds = %entry
+ ret i32 4
+
+return: ; preds = %entry
+ ret i32 192
+; CHECK: test3:
+; CHECK: movl 4(%esp), %eax
+; CHECK-NEXT: orl 8(%esp), %eax
+; CHECK-NEXT: je LBB3_2
+}
diff --git a/test/CodeGen/X86/break-anti-dependencies.ll b/test/CodeGen/X86/break-anti-dependencies.ll
new file mode 100644
index 0000000..972b3cd
--- /dev/null
+++ b/test/CodeGen/X86/break-anti-dependencies.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=none > %t
+; RUN: grep {%xmm0} %t | count 14
+; RUN: not grep {%xmm1} %t
+; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=critical > %t
+; RUN: grep {%xmm0} %t | count 7
+; RUN: grep {%xmm1} %t | count 7
+
+define void @goo(double* %r, double* %p, double* %q) nounwind {
+entry:
+ %0 = load double* %p, align 8
+ %1 = fadd double %0, 1.100000e+00
+ %2 = fmul double %1, 1.200000e+00
+ %3 = fadd double %2, 1.300000e+00
+ %4 = fmul double %3, 1.400000e+00
+ %5 = fadd double %4, 1.500000e+00
+ %6 = fptosi double %5 to i32
+ %7 = load double* %r, align 8
+ %8 = fadd double %7, 7.100000e+00
+ %9 = fmul double %8, 7.200000e+00
+ %10 = fadd double %9, 7.300000e+00
+ %11 = fmul double %10, 7.400000e+00
+ %12 = fadd double %11, 7.500000e+00
+ %13 = fptosi double %12 to i32
+ %14 = icmp slt i32 %6, %13
+ br i1 %14, label %bb, label %return
+
+bb:
+ store double 9.300000e+00, double* %q, align 8
+ ret void
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/X86/break-sse-dep.ll b/test/CodeGen/X86/break-sse-dep.ll
new file mode 100644
index 0000000..acc0647
--- /dev/null
+++ b/test/CodeGen/X86/break-sse-dep.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | FileCheck %s
+
+define double @t1(float* nocapture %x) nounwind readonly ssp {
+entry:
+; CHECK: t1:
+; CHECK: movss (%rdi), %xmm0
+; CHECK; cvtss2sd %xmm0, %xmm0
+
+ %0 = load float* %x, align 4
+ %1 = fpext float %0 to double
+ ret double %1
+}
+
+define float @t2(double* nocapture %x) nounwind readonly ssp optsize {
+entry:
+; CHECK: t2:
+; CHECK; cvtsd2ss (%rdi), %xmm0
+ %0 = load double* %x, align 8
+ %1 = fptrunc double %0 to float
+ ret float %1
+}
diff --git a/test/CodeGen/X86/bss_pagealigned.ll b/test/CodeGen/X86/bss_pagealigned.ll
new file mode 100644
index 0000000..da95aca
--- /dev/null
+++ b/test/CodeGen/X86/bss_pagealigned.ll
@@ -0,0 +1,21 @@
+; RUN: llc --code-model=kernel -march=x86-64 <%s -asm-verbose=0 | FileCheck %s
+; PR4933
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+%struct.kmem_cache_order_objects = type { i64 }
+declare i8* @memset(i8*, i32, i64)
+define void @unxlate_dev_mem_ptr(i64 %phis, i8* %addr) nounwind {
+ %pte.addr.i = alloca %struct.kmem_cache_order_objects*
+ %call8 = call i8* @memset(i8* bitcast ([512 x %struct.kmem_cache_order_objects]* @bm_pte to i8*), i32 0, i64 4096)
+; CHECK: movq $bm_pte, %rdi
+; CHECK-NEXT: xorl %esi, %esi
+; CHECK-NEXT: movl $4096, %edx
+; CHECK-NEXT: callq memset
+ ret void
+}
+@bm_pte = internal global [512 x %struct.kmem_cache_order_objects] zeroinitializer, section ".bss.page_aligned", align 4096
+; CHECK: .section .bss.page_aligned,"aw",@nobits
+; CHECK-NEXT: .align 4096
+; CHECK-NEXT: bm_pte:
+; CHECK-NEXT: .zero 4096
+; CHECK-NEXT: .size bm_pte, 4096
diff --git a/test/CodeGen/X86/bswap-inline-asm.ll b/test/CodeGen/X86/bswap-inline-asm.ll
new file mode 100644
index 0000000..5bf58fa
--- /dev/null
+++ b/test/CodeGen/X86/bswap-inline-asm.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: not grep APP %t
+; RUN: grep bswapq %t | count 2
+; RUN: grep bswapl %t | count 1
+
+define i64 @foo(i64 %x) nounwind {
+ %asmtmp = tail call i64 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
+ ret i64 %asmtmp
+}
+define i64 @bar(i64 %x) nounwind {
+ %asmtmp = tail call i64 asm "bswapq ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
+ ret i64 %asmtmp
+}
+define i32 @pen(i32 %x) nounwind {
+ %asmtmp = tail call i32 asm "bswapl ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind
+ ret i32 %asmtmp
+}
diff --git a/test/CodeGen/X86/bswap.ll b/test/CodeGen/X86/bswap.ll
new file mode 100644
index 0000000..0a72c1c
--- /dev/null
+++ b/test/CodeGen/X86/bswap.ll
@@ -0,0 +1,27 @@
+; bswap should be constant folded when it is passed a constant argument
+
+; RUN: llc < %s -march=x86 | \
+; RUN: grep bswapl | count 3
+; RUN: llc < %s -march=x86 | grep rolw | count 1
+
+declare i16 @llvm.bswap.i16(i16)
+
+declare i32 @llvm.bswap.i32(i32)
+
+declare i64 @llvm.bswap.i64(i64)
+
+define i16 @W(i16 %A) {
+ %Z = call i16 @llvm.bswap.i16( i16 %A ) ; <i16> [#uses=1]
+ ret i16 %Z
+}
+
+define i32 @X(i32 %A) {
+ %Z = call i32 @llvm.bswap.i32( i32 %A ) ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i64 @Y(i64 %A) {
+ %Z = call i64 @llvm.bswap.i64( i64 %A ) ; <i64> [#uses=1]
+ ret i64 %Z
+}
+
diff --git a/test/CodeGen/X86/bt.ll b/test/CodeGen/X86/bt.ll
new file mode 100644
index 0000000..ec447e5
--- /dev/null
+++ b/test/CodeGen/X86/bt.ll
@@ -0,0 +1,442 @@
+; RUN: llc < %s -march=x86 | grep btl | count 28
+; RUN: llc < %s -march=x86 -mcpu=pentium4 | grep btl | not grep esp
+; RUN: llc < %s -march=x86 -mcpu=penryn | grep btl | not grep esp
+; PR3253
+
+; The register+memory form of the BT instruction should be usable on
+; pentium4, however it is currently disabled due to the register+memory
+; form having different semantics than the register+register form.
+
+; Test these patterns:
+; (X & (1 << N)) != 0 --> BT(X, N).
+; ((X >>u N) & 1) != 0 --> BT(X, N).
+; as well as several variations:
+; - The second form can use an arithmetic shift.
+; - Either form can use == instead of !=.
+; - Either form can compare with an operand of the &
+; instead of with 0.
+; - The comparison can be commuted (only cases where neither
+; operand is constant are included).
+; - The and can be commuted.
+
+define void @test2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @test2b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 1, %tmp29
+ %tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @atest2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @atest2b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 1, %tmp29
+ %tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @test3(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @test3b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %x, %tmp29
+ %tmp4 = icmp eq i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @testne2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @testne2b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 1, %tmp29
+ %tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @atestne2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @atestne2b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 1, %tmp29
+ %tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @testne3(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @testne3b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %x, %tmp29
+ %tmp4 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @query2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @query2b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 1, %tmp29
+ %tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @aquery2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @aquery2b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 1, %tmp29
+ %tmp4 = icmp eq i32 %tmp3, 1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @query3(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp3, %tmp29 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @query3b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %x, %tmp29
+ %tmp4 = icmp eq i32 %tmp3, %tmp29 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @query3x(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp29, %tmp3 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @query3bx(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %x, %tmp29
+ %tmp4 = icmp eq i32 %tmp29, %tmp3 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @queryne2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @queryne2b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 1, %tmp29
+ %tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @aqueryne2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @aqueryne2b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = ashr i32 %x, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 1, %tmp29
+ %tmp4 = icmp ne i32 %tmp3, 1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @queryne3(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp3, %tmp29 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @queryne3b(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %x, %tmp29
+ %tmp4 = icmp ne i32 %tmp3, %tmp29 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @queryne3x(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp29, %x ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp29, %tmp3 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @queryne3bx(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp29 = shl i32 1, %n ; <i32> [#uses=1]
+ %tmp3 = and i32 %x, %tmp29
+ %tmp4 = icmp ne i32 %tmp29, %tmp3 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare void @foo()
diff --git a/test/CodeGen/X86/byval.ll b/test/CodeGen/X86/byval.ll
new file mode 100644
index 0000000..af36e1b
--- /dev/null
+++ b/test/CodeGen/X86/byval.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 | grep {movq 8(%rsp), %rax}
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {movl 8(%esp), %edx} %t
+; RUN: grep {movl 4(%esp), %eax} %t
+
+%struct.s = type { i64, i64, i64 }
+
+define i64 @f(%struct.s* byval %a) {
+entry:
+ %tmp2 = getelementptr %struct.s* %a, i32 0, i32 0
+ %tmp3 = load i64* %tmp2, align 8
+ ret i64 %tmp3
+}
diff --git a/test/CodeGen/X86/byval2.ll b/test/CodeGen/X86/byval2.ll
new file mode 100644
index 0000000..71129f5
--- /dev/null
+++ b/test/CodeGen/X86/byval2.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
+
+%struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
+ i64, i64, i64, i64, i64, i64, i64, i64,
+ i64 }
+
+define void @g(i64 %a, i64 %b, i64 %c) {
+entry:
+ %d = alloca %struct.s, align 16
+ %tmp = getelementptr %struct.s* %d, i32 0, i32 0
+ store i64 %a, i64* %tmp, align 16
+ %tmp2 = getelementptr %struct.s* %d, i32 0, i32 1
+ store i64 %b, i64* %tmp2, align 16
+ %tmp4 = getelementptr %struct.s* %d, i32 0, i32 2
+ store i64 %c, i64* %tmp4, align 16
+ call void @f( %struct.s* %d byval)
+ call void @f( %struct.s* %d byval)
+ ret void
+}
+
+declare void @f(%struct.s* byval)
diff --git a/test/CodeGen/X86/byval3.ll b/test/CodeGen/X86/byval3.ll
new file mode 100644
index 0000000..504e0be
--- /dev/null
+++ b/test/CodeGen/X86/byval3.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
+
+%struct.s = type { i32, i32, i32, i32, i32, i32, i32, i32,
+ i32, i32, i32, i32, i32, i32, i32, i32,
+ i32, i32, i32, i32, i32, i32, i32, i32,
+ i32, i32, i32, i32, i32, i32, i32, i32,
+ i32 }
+
+define void @g(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6) nounwind {
+entry:
+ %d = alloca %struct.s, align 16
+ %tmp = getelementptr %struct.s* %d, i32 0, i32 0
+ store i32 %a1, i32* %tmp, align 16
+ %tmp2 = getelementptr %struct.s* %d, i32 0, i32 1
+ store i32 %a2, i32* %tmp2, align 16
+ %tmp4 = getelementptr %struct.s* %d, i32 0, i32 2
+ store i32 %a3, i32* %tmp4, align 16
+ %tmp6 = getelementptr %struct.s* %d, i32 0, i32 3
+ store i32 %a4, i32* %tmp6, align 16
+ %tmp8 = getelementptr %struct.s* %d, i32 0, i32 4
+ store i32 %a5, i32* %tmp8, align 16
+ %tmp10 = getelementptr %struct.s* %d, i32 0, i32 5
+ store i32 %a6, i32* %tmp10, align 16
+ call void @f( %struct.s* %d byval)
+ call void @f( %struct.s* %d byval)
+ ret void
+}
+
+declare void @f(%struct.s* byval)
diff --git a/test/CodeGen/X86/byval4.ll b/test/CodeGen/X86/byval4.ll
new file mode 100644
index 0000000..4db9d65
--- /dev/null
+++ b/test/CodeGen/X86/byval4.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
+
+%struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16,
+ i16, i16, i16, i16, i16, i16, i16, i16,
+ i16, i16, i16, i16, i16, i16, i16, i16,
+ i16, i16, i16, i16, i16, i16, i16, i16,
+ i16, i16, i16, i16, i16, i16, i16, i16,
+ i16, i16, i16, i16, i16, i16, i16, i16,
+ i16, i16, i16, i16, i16, i16, i16, i16,
+ i16, i16, i16, i16, i16, i16, i16, i16,
+ i16 }
+
+
+define void @g(i16 signext %a1, i16 signext %a2, i16 signext %a3,
+ i16 signext %a4, i16 signext %a5, i16 signext %a6) nounwind {
+entry:
+ %a = alloca %struct.s, align 16
+ %tmp = getelementptr %struct.s* %a, i32 0, i32 0
+ store i16 %a1, i16* %tmp, align 16
+ %tmp2 = getelementptr %struct.s* %a, i32 0, i32 1
+ store i16 %a2, i16* %tmp2, align 16
+ %tmp4 = getelementptr %struct.s* %a, i32 0, i32 2
+ store i16 %a3, i16* %tmp4, align 16
+ %tmp6 = getelementptr %struct.s* %a, i32 0, i32 3
+ store i16 %a4, i16* %tmp6, align 16
+ %tmp8 = getelementptr %struct.s* %a, i32 0, i32 4
+ store i16 %a5, i16* %tmp8, align 16
+ %tmp10 = getelementptr %struct.s* %a, i32 0, i32 5
+ store i16 %a6, i16* %tmp10, align 16
+ call void @f( %struct.s* %a byval )
+ call void @f( %struct.s* %a byval )
+ ret void
+}
+
+declare void @f(%struct.s* byval)
diff --git a/test/CodeGen/X86/byval5.ll b/test/CodeGen/X86/byval5.ll
new file mode 100644
index 0000000..69c115b
--- /dev/null
+++ b/test/CodeGen/X86/byval5.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
+
+%struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8, i8, i8, i8, i8, i8, i8, i8,
+ i8 }
+
+
+define void @g(i8 signext %a1, i8 signext %a2, i8 signext %a3,
+ i8 signext %a4, i8 signext %a5, i8 signext %a6) {
+entry:
+ %a = alloca %struct.s
+ %tmp = getelementptr %struct.s* %a, i32 0, i32 0
+ store i8 %a1, i8* %tmp, align 8
+ %tmp2 = getelementptr %struct.s* %a, i32 0, i32 1
+ store i8 %a2, i8* %tmp2, align 8
+ %tmp4 = getelementptr %struct.s* %a, i32 0, i32 2
+ store i8 %a3, i8* %tmp4, align 8
+ %tmp6 = getelementptr %struct.s* %a, i32 0, i32 3
+ store i8 %a4, i8* %tmp6, align 8
+ %tmp8 = getelementptr %struct.s* %a, i32 0, i32 4
+ store i8 %a5, i8* %tmp8, align 8
+ %tmp10 = getelementptr %struct.s* %a, i32 0, i32 5
+ store i8 %a6, i8* %tmp10, align 8
+ call void @f( %struct.s* %a byval )
+ call void @f( %struct.s* %a byval )
+ ret void
+}
+
+declare void @f(%struct.s* byval)
diff --git a/test/CodeGen/X86/byval6.ll b/test/CodeGen/X86/byval6.ll
new file mode 100644
index 0000000..b060369
--- /dev/null
+++ b/test/CodeGen/X86/byval6.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 | grep add | not grep 16
+
+ %struct.W = type { x86_fp80, x86_fp80 }
+@B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32
[email protected] = internal constant %struct.W { x86_fp80 0xK4001E000000000000000, x86_fp80 0xK40028000000000000000 }
+
+define i32 @main() nounwind {
+entry:
+ tail call void (i32, ...)* @bar( i32 3, %struct.W* byval @.cpx ) nounwind
+ tail call void (i32, ...)* @baz( i32 3, %struct.W* byval @B ) nounwind
+ ret i32 undef
+}
+
+declare void @bar(i32, ...)
+
+declare void @baz(i32, ...)
diff --git a/test/CodeGen/X86/byval7.ll b/test/CodeGen/X86/byval7.ll
new file mode 100644
index 0000000..0da93ba
--- /dev/null
+++ b/test/CodeGen/X86/byval7.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | egrep {add|lea} | grep 16
+
+ %struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
+ <2 x i64> }
+
+define i32 @main() nounwind {
+entry:
+ %s = alloca %struct.S ; <%struct.S*> [#uses=2]
+ %tmp15 = getelementptr %struct.S* %s, i32 0, i32 0 ; <<2 x i64>*> [#uses=1]
+ store <2 x i64> < i64 8589934595, i64 1 >, <2 x i64>* %tmp15, align 16
+ call void @t( i32 1, %struct.S* byval %s ) nounwind
+ ret i32 0
+}
+
+declare void @t(i32, %struct.S* byval )
diff --git a/test/CodeGen/X86/call-imm.ll b/test/CodeGen/X86/call-imm.ll
new file mode 100644
index 0000000..87785bc
--- /dev/null
+++ b/test/CodeGen/X86/call-imm.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mtriple=i386-darwin-apple -relocation-model=static | grep {call.*12345678}
+; RUN: llc < %s -mtriple=i386-darwin-apple -relocation-model=pic | not grep {call.*12345678}
+; RUN: llc < %s -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | grep {call.*12345678}
+
+; Call to immediate is not safe on x86-64 unless we *know* that the
+; call will be within 32-bits pcrel from the dest immediate.
+
+; RUN: llc < %s -march=x86-64 | grep {call.*\*%rax}
+
+; PR3666
+; PR3773
+; rdar://6904453
+
+define i32 @main() nounwind {
+entry:
+ %0 = call i32 inttoptr (i32 12345678 to i32 (i32)*)(i32 0) nounwind ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/call-push.ll b/test/CodeGen/X86/call-push.ll
new file mode 100644
index 0000000..02cbccc
--- /dev/null
+++ b/test/CodeGen/X86/call-push.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -disable-fp-elim | FileCheck %s
+
+ %struct.decode_t = type { i8, i8, i8, i8, i16, i8, i8, %struct.range_t** }
+ %struct.range_t = type { float, float, i32, i32, i32, [0 x i8] }
+
+define i32 @decode_byte(%struct.decode_t* %decode) nounwind {
+; CHECK: decode_byte:
+; CHECK: pushl
+; CHECK: popl
+; CHECK: popl
+; CHECK: jmp
+entry:
+ %tmp2 = getelementptr %struct.decode_t* %decode, i32 0, i32 4 ; <i16*> [#uses=1]
+ %tmp23 = bitcast i16* %tmp2 to i32* ; <i32*> [#uses=1]
+ %tmp4 = load i32* %tmp23 ; <i32> [#uses=1]
+ %tmp514 = lshr i32 %tmp4, 24 ; <i32> [#uses=1]
+ %tmp56 = trunc i32 %tmp514 to i8 ; <i8> [#uses=1]
+ %tmp7 = icmp eq i8 %tmp56, 0 ; <i1> [#uses=1]
+ br i1 %tmp7, label %UnifiedReturnBlock, label %cond_true
+
+cond_true: ; preds = %entry
+ %tmp10 = tail call i32 @f( %struct.decode_t* %decode ) ; <i32> [#uses=1]
+ ret i32 %tmp10
+
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 0
+}
+
+declare i32 @f(%struct.decode_t*)
diff --git a/test/CodeGen/X86/change-compare-stride-0.ll b/test/CodeGen/X86/change-compare-stride-0.ll
new file mode 100644
index 0000000..d520a6f
--- /dev/null
+++ b/test/CodeGen/X86/change-compare-stride-0.ll
@@ -0,0 +1,77 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {cmpl \$-478,} %t
+; RUN: not grep inc %t
+; RUN: not grep {leal 1(} %t
+; RUN: not grep {leal -1(} %t
+; RUN: grep dec %t | count 1
+
+define void @borf(i8* nocapture %in, i8* nocapture %out) nounwind {
+bb4.thread:
+ br label %bb2.outer
+
+bb2.outer: ; preds = %bb4, %bb4.thread
+ %indvar18 = phi i32 [ 0, %bb4.thread ], [ %indvar.next28, %bb4 ] ; <i32> [#uses=3]
+ %tmp34 = mul i32 %indvar18, 65535 ; <i32> [#uses=1]
+ %i.0.reg2mem.0.ph = add i32 %tmp34, 639 ; <i32> [#uses=1]
+ %0 = and i32 %i.0.reg2mem.0.ph, 65535 ; <i32> [#uses=1]
+ %1 = mul i32 %0, 480 ; <i32> [#uses=1]
+ %tmp20 = mul i32 %indvar18, -478 ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb2, %bb2.outer
+ %indvar = phi i32 [ 0, %bb2.outer ], [ %indvar.next, %bb2 ] ; <i32> [#uses=3]
+ %ctg2 = getelementptr i8* %out, i32 %tmp20 ; <i8*> [#uses=1]
+ %tmp21 = ptrtoint i8* %ctg2 to i32 ; <i32> [#uses=1]
+ %tmp23 = sub i32 %tmp21, %indvar ; <i32> [#uses=1]
+ %out_addr.0.reg2mem.0 = inttoptr i32 %tmp23 to i8* ; <i8*> [#uses=1]
+ %tmp25 = mul i32 %indvar, 65535 ; <i32> [#uses=1]
+ %j.0.reg2mem.0 = add i32 %tmp25, 479 ; <i32> [#uses=1]
+ %2 = and i32 %j.0.reg2mem.0, 65535 ; <i32> [#uses=1]
+ %3 = add i32 %1, %2 ; <i32> [#uses=9]
+ %4 = add i32 %3, -481 ; <i32> [#uses=1]
+ %5 = getelementptr i8* %in, i32 %4 ; <i8*> [#uses=1]
+ %6 = load i8* %5, align 1 ; <i8> [#uses=1]
+ %7 = add i32 %3, -480 ; <i32> [#uses=1]
+ %8 = getelementptr i8* %in, i32 %7 ; <i8*> [#uses=1]
+ %9 = load i8* %8, align 1 ; <i8> [#uses=1]
+ %10 = add i32 %3, -479 ; <i32> [#uses=1]
+ %11 = getelementptr i8* %in, i32 %10 ; <i8*> [#uses=1]
+ %12 = load i8* %11, align 1 ; <i8> [#uses=1]
+ %13 = add i32 %3, -1 ; <i32> [#uses=1]
+ %14 = getelementptr i8* %in, i32 %13 ; <i8*> [#uses=1]
+ %15 = load i8* %14, align 1 ; <i8> [#uses=1]
+ %16 = getelementptr i8* %in, i32 %3 ; <i8*> [#uses=1]
+ %17 = load i8* %16, align 1 ; <i8> [#uses=1]
+ %18 = add i32 %3, 1 ; <i32> [#uses=1]
+ %19 = getelementptr i8* %in, i32 %18 ; <i8*> [#uses=1]
+ %20 = load i8* %19, align 1 ; <i8> [#uses=1]
+ %21 = add i32 %3, 481 ; <i32> [#uses=1]
+ %22 = getelementptr i8* %in, i32 %21 ; <i8*> [#uses=1]
+ %23 = load i8* %22, align 1 ; <i8> [#uses=1]
+ %24 = add i32 %3, 480 ; <i32> [#uses=1]
+ %25 = getelementptr i8* %in, i32 %24 ; <i8*> [#uses=1]
+ %26 = load i8* %25, align 1 ; <i8> [#uses=1]
+ %27 = add i32 %3, 479 ; <i32> [#uses=1]
+ %28 = getelementptr i8* %in, i32 %27 ; <i8*> [#uses=1]
+ %29 = load i8* %28, align 1 ; <i8> [#uses=1]
+ %30 = add i8 %9, %6 ; <i8> [#uses=1]
+ %31 = add i8 %30, %12 ; <i8> [#uses=1]
+ %32 = add i8 %31, %15 ; <i8> [#uses=1]
+ %33 = add i8 %32, %17 ; <i8> [#uses=1]
+ %34 = add i8 %33, %20 ; <i8> [#uses=1]
+ %35 = add i8 %34, %23 ; <i8> [#uses=1]
+ %36 = add i8 %35, %26 ; <i8> [#uses=1]
+ %37 = add i8 %36, %29 ; <i8> [#uses=1]
+ store i8 %37, i8* %out_addr.0.reg2mem.0, align 1
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 478 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb4, label %bb2
+
+bb4: ; preds = %bb2
+ %indvar.next28 = add i32 %indvar18, 1 ; <i32> [#uses=2]
+ %exitcond29 = icmp eq i32 %indvar.next28, 638 ; <i1> [#uses=1]
+ br i1 %exitcond29, label %return, label %bb2.outer
+
+return: ; preds = %bb4
+ ret void
+}
diff --git a/test/CodeGen/X86/change-compare-stride-1.ll b/test/CodeGen/X86/change-compare-stride-1.ll
new file mode 100644
index 0000000..a9ddbdb
--- /dev/null
+++ b/test/CodeGen/X86/change-compare-stride-1.ll
@@ -0,0 +1,86 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep {cmpq \$-478,} %t
+; RUN: not grep inc %t
+; RUN: not grep {leal 1(} %t
+; RUN: not grep {leal -1(} %t
+; RUN: grep dec %t | count 1
+
+define void @borf(i8* nocapture %in, i8* nocapture %out) nounwind {
+bb4.thread:
+ br label %bb2.outer
+
+bb2.outer: ; preds = %bb4, %bb4.thread
+ %indvar19 = phi i64 [ 0, %bb4.thread ], [ %indvar.next29, %bb4 ] ; <i64> [#uses=3]
+ %indvar31 = trunc i64 %indvar19 to i16 ; <i16> [#uses=1]
+ %i.0.reg2mem.0.ph = sub i16 639, %indvar31 ; <i16> [#uses=1]
+ %0 = zext i16 %i.0.reg2mem.0.ph to i32 ; <i32> [#uses=1]
+ %1 = mul i32 %0, 480 ; <i32> [#uses=1]
+ %tmp21 = mul i64 %indvar19, -478 ; <i64> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb2, %bb2.outer
+ %indvar = phi i64 [ 0, %bb2.outer ], [ %indvar.next, %bb2 ] ; <i64> [#uses=3]
+ %indvar16 = trunc i64 %indvar to i16 ; <i16> [#uses=1]
+ %ctg2 = getelementptr i8* %out, i64 %tmp21 ; <i8*> [#uses=1]
+ %tmp22 = ptrtoint i8* %ctg2 to i64 ; <i64> [#uses=1]
+ %tmp24 = sub i64 %tmp22, %indvar ; <i64> [#uses=1]
+ %out_addr.0.reg2mem.0 = inttoptr i64 %tmp24 to i8* ; <i8*> [#uses=1]
+ %j.0.reg2mem.0 = sub i16 479, %indvar16 ; <i16> [#uses=1]
+ %2 = zext i16 %j.0.reg2mem.0 to i32 ; <i32> [#uses=1]
+ %3 = add i32 %1, %2 ; <i32> [#uses=9]
+ %4 = add i32 %3, -481 ; <i32> [#uses=1]
+ %5 = zext i32 %4 to i64 ; <i64> [#uses=1]
+ %6 = getelementptr i8* %in, i64 %5 ; <i8*> [#uses=1]
+ %7 = load i8* %6, align 1 ; <i8> [#uses=1]
+ %8 = add i32 %3, -480 ; <i32> [#uses=1]
+ %9 = zext i32 %8 to i64 ; <i64> [#uses=1]
+ %10 = getelementptr i8* %in, i64 %9 ; <i8*> [#uses=1]
+ %11 = load i8* %10, align 1 ; <i8> [#uses=1]
+ %12 = add i32 %3, -479 ; <i32> [#uses=1]
+ %13 = zext i32 %12 to i64 ; <i64> [#uses=1]
+ %14 = getelementptr i8* %in, i64 %13 ; <i8*> [#uses=1]
+ %15 = load i8* %14, align 1 ; <i8> [#uses=1]
+ %16 = add i32 %3, -1 ; <i32> [#uses=1]
+ %17 = zext i32 %16 to i64 ; <i64> [#uses=1]
+ %18 = getelementptr i8* %in, i64 %17 ; <i8*> [#uses=1]
+ %19 = load i8* %18, align 1 ; <i8> [#uses=1]
+ %20 = zext i32 %3 to i64 ; <i64> [#uses=1]
+ %21 = getelementptr i8* %in, i64 %20 ; <i8*> [#uses=1]
+ %22 = load i8* %21, align 1 ; <i8> [#uses=1]
+ %23 = add i32 %3, 1 ; <i32> [#uses=1]
+ %24 = zext i32 %23 to i64 ; <i64> [#uses=1]
+ %25 = getelementptr i8* %in, i64 %24 ; <i8*> [#uses=1]
+ %26 = load i8* %25, align 1 ; <i8> [#uses=1]
+ %27 = add i32 %3, 481 ; <i32> [#uses=1]
+ %28 = zext i32 %27 to i64 ; <i64> [#uses=1]
+ %29 = getelementptr i8* %in, i64 %28 ; <i8*> [#uses=1]
+ %30 = load i8* %29, align 1 ; <i8> [#uses=1]
+ %31 = add i32 %3, 480 ; <i32> [#uses=1]
+ %32 = zext i32 %31 to i64 ; <i64> [#uses=1]
+ %33 = getelementptr i8* %in, i64 %32 ; <i8*> [#uses=1]
+ %34 = load i8* %33, align 1 ; <i8> [#uses=1]
+ %35 = add i32 %3, 479 ; <i32> [#uses=1]
+ %36 = zext i32 %35 to i64 ; <i64> [#uses=1]
+ %37 = getelementptr i8* %in, i64 %36 ; <i8*> [#uses=1]
+ %38 = load i8* %37, align 1 ; <i8> [#uses=1]
+ %39 = add i8 %11, %7 ; <i8> [#uses=1]
+ %40 = add i8 %39, %15 ; <i8> [#uses=1]
+ %41 = add i8 %40, %19 ; <i8> [#uses=1]
+ %42 = add i8 %41, %22 ; <i8> [#uses=1]
+ %43 = add i8 %42, %26 ; <i8> [#uses=1]
+ %44 = add i8 %43, %30 ; <i8> [#uses=1]
+ %45 = add i8 %44, %34 ; <i8> [#uses=1]
+ %46 = add i8 %45, %38 ; <i8> [#uses=1]
+ store i8 %46, i8* %out_addr.0.reg2mem.0, align 1
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, 478 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb4, label %bb2
+
+bb4: ; preds = %bb2
+ %indvar.next29 = add i64 %indvar19, 1 ; <i64> [#uses=2]
+ %exitcond30 = icmp eq i64 %indvar.next29, 638 ; <i1> [#uses=1]
+ br i1 %exitcond30, label %return, label %bb2.outer
+
+return: ; preds = %bb4
+ ret void
+}
diff --git a/test/CodeGen/X86/clz.ll b/test/CodeGen/X86/clz.ll
new file mode 100644
index 0000000..3f27187
--- /dev/null
+++ b/test/CodeGen/X86/clz.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86 | grep bsr | count 2
+; RUN: llc < %s -march=x86 | grep bsf
+; RUN: llc < %s -march=x86 | grep cmov | count 3
+
+define i32 @t1(i32 %x) nounwind {
+ %tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
+ ret i32 %tmp
+}
+
+declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+
+define i32 @t2(i32 %x) nounwind {
+ %tmp = tail call i32 @llvm.cttz.i32( i32 %x )
+ ret i32 %tmp
+}
+
+declare i32 @llvm.cttz.i32(i32) nounwind readnone
+
+define i16 @t3(i16 %x, i16 %y) nounwind {
+entry:
+ %tmp1 = add i16 %x, %y
+ %tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1 ) ; <i16> [#uses=1]
+ ret i16 %tmp2
+}
+
+declare i16 @llvm.ctlz.i16(i16) nounwind readnone
diff --git a/test/CodeGen/X86/cmov.ll b/test/CodeGen/X86/cmov.ll
new file mode 100644
index 0000000..39d9d1e
--- /dev/null
+++ b/test/CodeGen/X86/cmov.ll
@@ -0,0 +1,157 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
+entry:
+; CHECK: test1:
+; CHECK: btl
+; CHECK-NEXT: movl $12, %eax
+; CHECK-NEXT: cmovael (%rcx), %eax
+; CHECK-NEXT: ret
+
+ %0 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %1 = and i32 %0, 1 ; <i32> [#uses=1]
+ %toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+ %v = load i32* %vp
+ %.0 = select i1 %toBool, i32 %v, i32 12 ; <i32> [#uses=1]
+ ret i32 %.0
+}
+define i32 @test2(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
+entry:
+; CHECK: test2:
+; CHECK: btl
+; CHECK-NEXT: movl $12, %eax
+; CHECK-NEXT: cmovbl (%rcx), %eax
+; CHECK-NEXT: ret
+
+ %0 = lshr i32 %x, %n ; <i32> [#uses=1]
+ %1 = and i32 %0, 1 ; <i32> [#uses=1]
+ %toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+ %v = load i32* %vp
+ %.0 = select i1 %toBool, i32 12, i32 %v ; <i32> [#uses=1]
+ ret i32 %.0
+}
+
+
+; x86's 32-bit cmov doesn't clobber the high 32 bits of the destination
+; if the condition is false. An explicit zero-extend (movl) is needed
+; after the cmov.
+
+declare void @bar(i64) nounwind
+
+define void @test3(i64 %a, i64 %b, i1 %p) nounwind {
+; CHECK: test3:
+; CHECK: cmovnel %edi, %esi
+; CHECK-NEXT: movl %esi, %edi
+
+ %c = trunc i64 %a to i32
+ %d = trunc i64 %b to i32
+ %e = select i1 %p, i32 %c, i32 %d
+ %f = zext i32 %e to i64
+ call void @bar(i64 %f)
+ ret void
+}
+
+
+
+; CodeGen shouldn't try to do a setne after an expanded 8-bit conditional
+; move without recomputing EFLAGS, because the expansion of the conditional
+; move with control flow may clobber EFLAGS (e.g., with xor, to set the
+; register to zero).
+
+; The test is a little awkward; the important part is that there's a test before the
+; setne.
+; PR4814
+
+
+@g_3 = external global i8 ; <i8*> [#uses=1]
+@g_96 = external global i8 ; <i8*> [#uses=2]
+@g_100 = external global i8 ; <i8*> [#uses=2]
+@_2E_str = external constant [15 x i8], align 1 ; <[15 x i8]*> [#uses=1]
+
+define i32 @test4() nounwind {
+entry:
+ %0 = load i8* @g_3, align 1 ; <i8> [#uses=2]
+ %1 = sext i8 %0 to i32 ; <i32> [#uses=1]
+ %.lobit.i = lshr i8 %0, 7 ; <i8> [#uses=1]
+ %tmp.i = zext i8 %.lobit.i to i32 ; <i32> [#uses=1]
+ %tmp.not.i = xor i32 %tmp.i, 1 ; <i32> [#uses=1]
+ %iftmp.17.0.i.i = ashr i32 %1, %tmp.not.i ; <i32> [#uses=1]
+ %retval56.i.i = trunc i32 %iftmp.17.0.i.i to i8 ; <i8> [#uses=1]
+ %2 = icmp eq i8 %retval56.i.i, 0 ; <i1> [#uses=2]
+ %g_96.promoted.i = load i8* @g_96 ; <i8> [#uses=3]
+ %3 = icmp eq i8 %g_96.promoted.i, 0 ; <i1> [#uses=2]
+ br i1 %3, label %func_4.exit.i, label %bb.i.i.i
+
+bb.i.i.i: ; preds = %entry
+ %4 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0]
+ br label %func_4.exit.i
+
+; CHECK: test4:
+; CHECK: g_100
+; CHECK: testb
+; CHECK: testb %al, %al
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: testb
+
+func_4.exit.i: ; preds = %bb.i.i.i, %entry
+ %.not.i = xor i1 %2, true ; <i1> [#uses=1]
+ %brmerge.i = or i1 %3, %.not.i ; <i1> [#uses=1]
+ %.mux.i = select i1 %2, i8 %g_96.promoted.i, i8 0 ; <i8> [#uses=1]
+ br i1 %brmerge.i, label %func_1.exit, label %bb.i.i
+
+bb.i.i: ; preds = %func_4.exit.i
+ %5 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0]
+ br label %func_1.exit
+
+func_1.exit: ; preds = %bb.i.i, %func_4.exit.i
+ %g_96.tmp.0.i = phi i8 [ %g_96.promoted.i, %bb.i.i ], [ %.mux.i, %func_4.exit.i ] ; <i8> [#uses=2]
+ store i8 %g_96.tmp.0.i, i8* @g_96
+ %6 = zext i8 %g_96.tmp.0.i to i32 ; <i32> [#uses=1]
+ %7 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8* nocapture, ...) nounwind
+
+
+; Should compile to setcc | -2.
+; rdar://6668608
+define i32 @test5(i32* nocapture %P) nounwind readonly {
+entry:
+; CHECK: test5:
+; CHECK: setg %al
+; CHECK: movzbl %al, %eax
+; CHECK: orl $-2, %eax
+; CHECK: ret
+
+ %0 = load i32* %P, align 4 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %1, i32 -1, i32 -2 ; <i32> [#uses=1]
+ ret i32 %iftmp.0.0
+}
+
+define i32 @test6(i32* nocapture %P) nounwind readonly {
+entry:
+; CHECK: test6:
+; CHECK: setl %al
+; CHECK: movzbl %al, %eax
+; CHECK: leal 4(%rax,%rax,8), %eax
+; CHECK: ret
+ %0 = load i32* %P, align 4 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %1, i32 4, i32 13 ; <i32> [#uses=1]
+ ret i32 %iftmp.0.0
+}
+
+
+; Don't try to use a 16-bit conditional move to do an 8-bit select,
+; because it isn't worth it. Just use a branch instead.
+define i8 @test7(i1 inreg %c, i8 inreg %a, i8 inreg %b) nounwind {
+; CHECK: test7:
+; CHECK: testb $1, %dil
+; CHECK-NEXT: jne LBB
+
+ %d = select i1 %c, i8 %a, i8 %b
+ ret i8 %d
+}
diff --git a/test/CodeGen/X86/cmp-test.ll b/test/CodeGen/X86/cmp-test.ll
new file mode 100644
index 0000000..898c09b
--- /dev/null
+++ b/test/CodeGen/X86/cmp-test.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86 | grep cmp | count 1
+; RUN: llc < %s -march=x86 | grep test | count 1
+
+define i32 @f1(i32 %X, i32* %y) {
+ %tmp = load i32* %y ; <i32> [#uses=1]
+ %tmp.upgrd.1 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true
+
+cond_true: ; preds = %0
+ ret i32 1
+
+ReturnBlock: ; preds = %0
+ ret i32 0
+}
+
+define i32 @f2(i32 %X, i32* %y) {
+ %tmp = load i32* %y ; <i32> [#uses=1]
+ %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1]
+ %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
+
+cond_true: ; preds = %0
+ ret i32 1
+
+ReturnBlock: ; preds = %0
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/cmp0.ll b/test/CodeGen/X86/cmp0.ll
new file mode 100644
index 0000000..48784488
--- /dev/null
+++ b/test/CodeGen/X86/cmp0.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+define i64 @test0(i64 %x) nounwind {
+ %t = icmp eq i64 %x, 0
+ %r = zext i1 %t to i64
+ ret i64 %r
+; CHECK: test0:
+; CHECK: testq %rdi, %rdi
+; CHECK: sete %al
+; CHECK: movzbl %al, %eax
+; CHECK: ret
+}
+
+define i64 @test1(i64 %x) nounwind {
+ %t = icmp slt i64 %x, 1
+ %r = zext i1 %t to i64
+ ret i64 %r
+; CHECK: test1:
+; CHECK: testq %rdi, %rdi
+; CHECK: setle %al
+; CHECK: movzbl %al, %eax
+; CHECK: ret
+}
+
diff --git a/test/CodeGen/X86/cmp2.ll b/test/CodeGen/X86/cmp2.ll
new file mode 100644
index 0000000..9a8e00c
--- /dev/null
+++ b/test/CodeGen/X86/cmp2.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep ucomisd | grep CPI | count 2
+
+define i32 @test(double %A) nounwind {
+ entry:
+ %tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1]
+ %tmp5 = fcmp ult double %A, 7.500000e+01; <i1> [#uses=1]
+ %bothcond = or i1 %tmp2, %tmp5; <i1> [#uses=1]
+ br i1 %bothcond, label %bb8, label %bb12
+
+ bb8:; preds = %entry
+ %tmp9 = tail call i32 (...)* @foo( ) nounwind ; <i32> [#uses=1]
+ ret i32 %tmp9
+
+ bb12:; preds = %entry
+ ret i32 32
+}
+
+declare i32 @foo(...)
diff --git a/test/CodeGen/X86/coalesce-esp.ll b/test/CodeGen/X86/coalesce-esp.ll
new file mode 100644
index 0000000..0fe4e56
--- /dev/null
+++ b/test/CodeGen/X86/coalesce-esp.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s | grep {movl %esp, %eax}
+; PR4572
+
+; Don't coalesce with %esp if it would end up putting %esp in
+; the index position of an address, because that can't be
+; encoded on x86. It would actually be slightly better to
+; swap the address operands though, since there's no scale.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-mingw32"
+ %"struct.std::valarray<unsigned int>" = type { i32, i32* }
+
+define void @_ZSt17__gslice_to_indexjRKSt8valarrayIjES2_RS0_(i32 %__o, %"struct.std::valarray<unsigned int>"* nocapture %__l, %"struct.std::valarray<unsigned int>"* nocapture %__s, %"struct.std::valarray<unsigned int>"* nocapture %__i) nounwind {
+entry:
+ %0 = alloca i32, i32 undef, align 4 ; <i32*> [#uses=1]
+ br i1 undef, label %return, label %bb4
+
+bb4: ; preds = %bb7.backedge, %entry
+ %indvar = phi i32 [ %indvar.next, %bb7.backedge ], [ 0, %entry ] ; <i32> [#uses=2]
+ %scevgep24.sum = sub i32 undef, %indvar ; <i32> [#uses=2]
+ %scevgep25 = getelementptr i32* %0, i32 %scevgep24.sum ; <i32*> [#uses=1]
+ %scevgep27 = getelementptr i32* undef, i32 %scevgep24.sum ; <i32*> [#uses=1]
+ %1 = load i32* %scevgep27, align 4 ; <i32> [#uses=0]
+ br i1 undef, label %bb7.backedge, label %bb5
+
+bb5: ; preds = %bb4
+ store i32 0, i32* %scevgep25, align 4
+ br label %bb7.backedge
+
+bb7.backedge: ; preds = %bb5, %bb4
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb4
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/coalescer-commute1.ll b/test/CodeGen/X86/coalescer-commute1.ll
new file mode 100644
index 0000000..8aa0bfd
--- /dev/null
+++ b/test/CodeGen/X86/coalescer-commute1.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
+; PR1877
+
+@NNTOT = weak global i32 0 ; <i32*> [#uses=1]
+@G = weak global float 0.000000e+00 ; <float*> [#uses=1]
+
+define void @runcont(i32* %source) nounwind {
+entry:
+ %tmp10 = load i32* @NNTOT, align 4 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %neuron.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %thesum.0 = phi float [ 0.000000e+00, %entry ], [ %tmp6, %bb ] ; <float> [#uses=1]
+ %tmp2 = getelementptr i32* %source, i32 %neuron.0 ; <i32*> [#uses=1]
+ %tmp3 = load i32* %tmp2, align 4 ; <i32> [#uses=1]
+ %tmp34 = sitofp i32 %tmp3 to float ; <float> [#uses=1]
+ %tmp6 = fadd float %tmp34, %thesum.0 ; <float> [#uses=2]
+ %indvar.next = add i32 %neuron.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %tmp10 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb13, label %bb
+
+bb13: ; preds = %bb
+ volatile store float %tmp6, float* @G, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/coalescer-commute2.ll b/test/CodeGen/X86/coalescer-commute2.ll
new file mode 100644
index 0000000..5d10bba
--- /dev/null
+++ b/test/CodeGen/X86/coalescer-commute2.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=x86-64 | grep paddw | count 2
+; RUN: llc < %s -march=x86-64 | not grep mov
+
+; The 2-addr pass should ensure that identical code is produced for these functions
+; no extra copy should be generated.
+
+define <2 x i64> @test1(<2 x i64> %x, <2 x i64> %y) nounwind {
+entry:
+ %tmp6 = bitcast <2 x i64> %y to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp8 = bitcast <2 x i64> %x to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp9 = add <8 x i16> %tmp8, %tmp6 ; <<8 x i16>> [#uses=1]
+ %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp10
+}
+
+define <2 x i64> @test2(<2 x i64> %x, <2 x i64> %y) nounwind {
+entry:
+ %tmp6 = bitcast <2 x i64> %x to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp8 = bitcast <2 x i64> %y to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp9 = add <8 x i16> %tmp8, %tmp6 ; <<8 x i16>> [#uses=1]
+ %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp10
+}
+
+
+; The coalescer should commute the add to avoid a copy.
+define <4 x float> @test3(<4 x float> %V) {
+entry:
+ %tmp8 = shufflevector <4 x float> %V, <4 x float> undef,
+ <4 x i32> < i32 3, i32 2, i32 1, i32 0 >
+ %add = fadd <4 x float> %tmp8, %V
+ ret <4 x float> %add
+}
+
diff --git a/test/CodeGen/X86/coalescer-commute3.ll b/test/CodeGen/X86/coalescer-commute3.ll
new file mode 100644
index 0000000..e5bd448
--- /dev/null
+++ b/test/CodeGen/X86/coalescer-commute3.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 6
+
+ %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
+
+define i32 @perimeter(%struct.quad_struct* %tree, i32 %size) nounwind {
+entry:
+ switch i32 %size, label %UnifiedReturnBlock [
+ i32 2, label %bb
+ i32 0, label %bb50
+ ]
+
+bb: ; preds = %entry
+ %tmp31 = tail call i32 @perimeter( %struct.quad_struct* null, i32 0 ) nounwind ; <i32> [#uses=1]
+ %tmp40 = tail call i32 @perimeter( %struct.quad_struct* null, i32 0 ) nounwind ; <i32> [#uses=1]
+ %tmp33 = add i32 0, %tmp31 ; <i32> [#uses=1]
+ %tmp42 = add i32 %tmp33, %tmp40 ; <i32> [#uses=1]
+ ret i32 %tmp42
+
+bb50: ; preds = %entry
+ ret i32 0
+
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/coalescer-commute4.ll b/test/CodeGen/X86/coalescer-commute4.ll
new file mode 100644
index 0000000..02a9781
--- /dev/null
+++ b/test/CodeGen/X86/coalescer-commute4.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
+; PR1501
+
+define float @foo(i32* %x, float* %y, i32 %c) nounwind {
+entry:
+ %tmp2132 = icmp eq i32 %c, 0 ; <i1> [#uses=2]
+ br i1 %tmp2132, label %bb23, label %bb.preheader
+
+bb.preheader: ; preds = %entry
+ %umax = select i1 %tmp2132, i32 1, i32 %c ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.preheader
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %res.0.reg2mem.0 = phi float [ 0.000000e+00, %bb.preheader ], [ %tmp14, %bb ] ; <float> [#uses=1]
+ %tmp3 = getelementptr i32* %x, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1]
+ %tmp4 = load i32* %tmp3, align 4 ; <i32> [#uses=1]
+ %tmp45 = sitofp i32 %tmp4 to float ; <float> [#uses=1]
+ %tmp8 = getelementptr float* %y, i32 %i.0.reg2mem.0 ; <float*> [#uses=1]
+ %tmp9 = load float* %tmp8, align 4 ; <float> [#uses=1]
+ %tmp11 = fmul float %tmp9, %tmp45 ; <float> [#uses=1]
+ %tmp14 = fadd float %tmp11, %res.0.reg2mem.0 ; <float> [#uses=2]
+ %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %umax ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb23, label %bb
+
+bb23: ; preds = %bb, %entry
+ %res.0.reg2mem.1 = phi float [ 0.000000e+00, %entry ], [ %tmp14, %bb ] ; <float> [#uses=1]
+ ret float %res.0.reg2mem.1
+}
diff --git a/test/CodeGen/X86/coalescer-commute5.ll b/test/CodeGen/X86/coalescer-commute5.ll
new file mode 100644
index 0000000..510d115
--- /dev/null
+++ b/test/CodeGen/X86/coalescer-commute5.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
+
+define i32 @t() {
+entry:
+ br i1 true, label %bb1664, label %bb1656
+bb1656: ; preds = %entry
+ ret i32 0
+bb1664: ; preds = %entry
+ %tmp4297 = bitcast <16 x i8> zeroinitializer to <2 x i64> ; <<2 x i64>> [#uses=2]
+ %tmp4351 = call <16 x i8> @llvm.x86.sse2.pcmpeq.b( <16 x i8> zeroinitializer, <16 x i8> zeroinitializer ) nounwind readnone ; <<16 x i8>> [#uses=0]
+ br i1 false, label %bb5310, label %bb4743
+bb4743: ; preds = %bb1664
+ %tmp4360.not28 = or <2 x i64> zeroinitializer, %tmp4297 ; <<2 x i64>> [#uses=1]
+ br label %bb5310
+bb5310: ; preds = %bb4743, %bb1664
+ %tmp4360.not28.pn = phi <2 x i64> [ %tmp4360.not28, %bb4743 ], [ %tmp4297, %bb1664 ] ; <<2 x i64>> [#uses=1]
+ %tmp4415.not.pn = or <2 x i64> zeroinitializer, %tmp4360.not28.pn ; <<2 x i64>> [#uses=0]
+ ret i32 0
+}
+
+declare <16 x i8> @llvm.x86.sse2.pcmpeq.b(<16 x i8>, <16 x i8>) nounwind readnone
diff --git a/test/CodeGen/X86/coalescer-cross.ll b/test/CodeGen/X86/coalescer-cross.ll
new file mode 100644
index 0000000..7d6f399
--- /dev/null
+++ b/test/CodeGen/X86/coalescer-cross.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10 | not grep movaps
+; rdar://6509240
+
+ type { %struct.TValue } ; type %0
+ type { %struct.L_Umaxalign, i32, %struct.Node* } ; type %1
+ %struct.CallInfo = type { %struct.TValue*, %struct.TValue*, %struct.TValue*, i32*, i32, i32 }
+ %struct.GCObject = type { %struct.lua_State }
+ %struct.L_Umaxalign = type { double }
+ %struct.Mbuffer = type { i8*, i32, i32 }
+ %struct.Node = type { %struct.TValue, %struct.TKey }
+ %struct.TKey = type { %1 }
+ %struct.TString = type { %struct.anon }
+ %struct.TValue = type { %struct.L_Umaxalign, i32 }
+ %struct.Table = type { %struct.GCObject*, i8, i8, i8, i8, %struct.Table*, %struct.TValue*, %struct.Node*, %struct.Node*, %struct.GCObject*, i32 }
+ %struct.UpVal = type { %struct.GCObject*, i8, i8, %struct.TValue*, %0 }
+ %struct.anon = type { %struct.GCObject*, i8, i8, i8, i32, i32 }
+ %struct.global_State = type { %struct.stringtable, i8* (i8*, i8*, i32, i32)*, i8*, i8, i8, i32, %struct.GCObject*, %struct.GCObject**, %struct.GCObject*, %struct.GCObject*, %struct.GCObject*, %struct.GCObject*, %struct.Mbuffer, i32, i32, i32, i32, i32, i32, i32 (%struct.lua_State*)*, %struct.TValue, %struct.lua_State*, %struct.UpVal, [9 x %struct.Table*], [17 x %struct.TString*] }
+ %struct.lua_Debug = type { i32, i8*, i8*, i8*, i8*, i32, i32, i32, i32, [60 x i8], i32 }
+ %struct.lua_State = type { %struct.GCObject*, i8, i8, i8, %struct.TValue*, %struct.TValue*, %struct.global_State*, %struct.CallInfo*, i32*, %struct.TValue*, %struct.TValue*, %struct.CallInfo*, %struct.CallInfo*, i32, i32, i16, i16, i8, i8, i32, i32, void (%struct.lua_State*, %struct.lua_Debug*)*, %struct.TValue, %struct.TValue, %struct.GCObject*, %struct.GCObject*, %struct.lua_longjmp*, i32 }
+ %struct.lua_longjmp = type { %struct.lua_longjmp*, [18 x i32], i32 }
+ %struct.stringtable = type { %struct.GCObject**, i32, i32 }
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 (%struct.lua_State*)* @os_clock to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @os_clock(%struct.lua_State* nocapture %L) nounwind ssp {
+entry:
+ %0 = tail call i32 @"\01_clock$UNIX2003"() nounwind ; <i32> [#uses=1]
+ %1 = uitofp i32 %0 to double ; <double> [#uses=1]
+ %2 = fdiv double %1, 1.000000e+06 ; <double> [#uses=1]
+ %3 = getelementptr %struct.lua_State* %L, i32 0, i32 4 ; <%struct.TValue**> [#uses=3]
+ %4 = load %struct.TValue** %3, align 4 ; <%struct.TValue*> [#uses=2]
+ %5 = getelementptr %struct.TValue* %4, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %2, double* %5, align 4
+ %6 = getelementptr %struct.TValue* %4, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 3, i32* %6, align 4
+ %7 = load %struct.TValue** %3, align 4 ; <%struct.TValue*> [#uses=1]
+ %8 = getelementptr %struct.TValue* %7, i32 1 ; <%struct.TValue*> [#uses=1]
+ store %struct.TValue* %8, %struct.TValue** %3, align 4
+ ret i32 1
+}
+
+declare i32 @"\01_clock$UNIX2003"()
diff --git a/test/CodeGen/X86/coalescer-remat.ll b/test/CodeGen/X86/coalescer-remat.ll
new file mode 100644
index 0000000..4db520f
--- /dev/null
+++ b/test/CodeGen/X86/coalescer-remat.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep xor | count 3
+
+@val = internal global i64 0 ; <i64*> [#uses=1]
+@"\01LC" = internal constant [7 x i8] c"0x%lx\0A\00" ; <[7 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ %0 = tail call i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* @val, i64 0, i64 1) ; <i64> [#uses=1]
+ %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([7 x i8]* @"\01LC", i32 0, i64 0), i64 %0) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64*, i64, i64) nounwind
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/X86/code_placement.ll b/test/CodeGen/X86/code_placement.ll
new file mode 100644
index 0000000..9747183
--- /dev/null
+++ b/test/CodeGen/X86/code_placement.ll
@@ -0,0 +1,136 @@
+; RUN: llc -march=x86 < %s | FileCheck %s
+
+@Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5]
+@Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4]
+@Te3 = external global [256 x i32] ; <[256 x i32]*> [#uses=2]
+
+define void @t(i8* nocapture %in, i8* nocapture %out, i32* nocapture %rk, i32 %r) nounwind ssp {
+entry:
+ %0 = load i32* %rk, align 4 ; <i32> [#uses=1]
+ %1 = getelementptr i32* %rk, i64 1 ; <i32*> [#uses=1]
+ %2 = load i32* %1, align 4 ; <i32> [#uses=1]
+ %tmp15 = add i32 %r, -1 ; <i32> [#uses=1]
+ %tmp.16 = zext i32 %tmp15 to i64 ; <i64> [#uses=2]
+ br label %bb
+; CHECK: jmp
+; CHECK-NEXT: align
+
+bb: ; preds = %bb1, %entry
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb1 ] ; <i64> [#uses=3]
+ %s1.0 = phi i32 [ %2, %entry ], [ %56, %bb1 ] ; <i32> [#uses=2]
+ %s0.0 = phi i32 [ %0, %entry ], [ %43, %bb1 ] ; <i32> [#uses=2]
+ %tmp18 = shl i64 %indvar, 4 ; <i64> [#uses=4]
+ %rk26 = bitcast i32* %rk to i8* ; <i8*> [#uses=6]
+ %3 = lshr i32 %s0.0, 24 ; <i32> [#uses=1]
+ %4 = zext i32 %3 to i64 ; <i64> [#uses=1]
+ %5 = getelementptr [256 x i32]* @Te0, i64 0, i64 %4 ; <i32*> [#uses=1]
+ %6 = load i32* %5, align 4 ; <i32> [#uses=1]
+ %7 = lshr i32 %s1.0, 16 ; <i32> [#uses=1]
+ %8 = and i32 %7, 255 ; <i32> [#uses=1]
+ %9 = zext i32 %8 to i64 ; <i64> [#uses=1]
+ %10 = getelementptr [256 x i32]* @Te1, i64 0, i64 %9 ; <i32*> [#uses=1]
+ %11 = load i32* %10, align 4 ; <i32> [#uses=1]
+ %ctg2.sum2728 = or i64 %tmp18, 8 ; <i64> [#uses=1]
+ %12 = getelementptr i8* %rk26, i64 %ctg2.sum2728 ; <i8*> [#uses=1]
+ %13 = bitcast i8* %12 to i32* ; <i32*> [#uses=1]
+ %14 = load i32* %13, align 4 ; <i32> [#uses=1]
+ %15 = xor i32 %11, %6 ; <i32> [#uses=1]
+ %16 = xor i32 %15, %14 ; <i32> [#uses=3]
+ %17 = lshr i32 %s1.0, 24 ; <i32> [#uses=1]
+ %18 = zext i32 %17 to i64 ; <i64> [#uses=1]
+ %19 = getelementptr [256 x i32]* @Te0, i64 0, i64 %18 ; <i32*> [#uses=1]
+ %20 = load i32* %19, align 4 ; <i32> [#uses=1]
+ %21 = and i32 %s0.0, 255 ; <i32> [#uses=1]
+ %22 = zext i32 %21 to i64 ; <i64> [#uses=1]
+ %23 = getelementptr [256 x i32]* @Te3, i64 0, i64 %22 ; <i32*> [#uses=1]
+ %24 = load i32* %23, align 4 ; <i32> [#uses=1]
+ %ctg2.sum2930 = or i64 %tmp18, 12 ; <i64> [#uses=1]
+ %25 = getelementptr i8* %rk26, i64 %ctg2.sum2930 ; <i8*> [#uses=1]
+ %26 = bitcast i8* %25 to i32* ; <i32*> [#uses=1]
+ %27 = load i32* %26, align 4 ; <i32> [#uses=1]
+ %28 = xor i32 %24, %20 ; <i32> [#uses=1]
+ %29 = xor i32 %28, %27 ; <i32> [#uses=4]
+ %30 = lshr i32 %16, 24 ; <i32> [#uses=1]
+ %31 = zext i32 %30 to i64 ; <i64> [#uses=1]
+ %32 = getelementptr [256 x i32]* @Te0, i64 0, i64 %31 ; <i32*> [#uses=1]
+ %33 = load i32* %32, align 4 ; <i32> [#uses=2]
+ %exitcond = icmp eq i64 %indvar, %tmp.16 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ %ctg2.sum31 = add i64 %tmp18, 16 ; <i64> [#uses=1]
+ %34 = getelementptr i8* %rk26, i64 %ctg2.sum31 ; <i8*> [#uses=1]
+ %35 = bitcast i8* %34 to i32* ; <i32*> [#uses=1]
+ %36 = lshr i32 %29, 16 ; <i32> [#uses=1]
+ %37 = and i32 %36, 255 ; <i32> [#uses=1]
+ %38 = zext i32 %37 to i64 ; <i64> [#uses=1]
+ %39 = getelementptr [256 x i32]* @Te1, i64 0, i64 %38 ; <i32*> [#uses=1]
+ %40 = load i32* %39, align 4 ; <i32> [#uses=1]
+ %41 = load i32* %35, align 4 ; <i32> [#uses=1]
+ %42 = xor i32 %40, %33 ; <i32> [#uses=1]
+ %43 = xor i32 %42, %41 ; <i32> [#uses=1]
+ %44 = lshr i32 %29, 24 ; <i32> [#uses=1]
+ %45 = zext i32 %44 to i64 ; <i64> [#uses=1]
+ %46 = getelementptr [256 x i32]* @Te0, i64 0, i64 %45 ; <i32*> [#uses=1]
+ %47 = load i32* %46, align 4 ; <i32> [#uses=1]
+ %48 = and i32 %16, 255 ; <i32> [#uses=1]
+ %49 = zext i32 %48 to i64 ; <i64> [#uses=1]
+ %50 = getelementptr [256 x i32]* @Te3, i64 0, i64 %49 ; <i32*> [#uses=1]
+ %51 = load i32* %50, align 4 ; <i32> [#uses=1]
+ %ctg2.sum32 = add i64 %tmp18, 20 ; <i64> [#uses=1]
+ %52 = getelementptr i8* %rk26, i64 %ctg2.sum32 ; <i8*> [#uses=1]
+ %53 = bitcast i8* %52 to i32* ; <i32*> [#uses=1]
+ %54 = load i32* %53, align 4 ; <i32> [#uses=1]
+ %55 = xor i32 %51, %47 ; <i32> [#uses=1]
+ %56 = xor i32 %55, %54 ; <i32> [#uses=1]
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
+ br label %bb
+
+bb2: ; preds = %bb
+ %tmp10 = shl i64 %tmp.16, 4 ; <i64> [#uses=2]
+ %ctg2.sum = add i64 %tmp10, 16 ; <i64> [#uses=1]
+ %tmp1213 = getelementptr i8* %rk26, i64 %ctg2.sum ; <i8*> [#uses=1]
+ %57 = bitcast i8* %tmp1213 to i32* ; <i32*> [#uses=1]
+ %58 = and i32 %33, -16777216 ; <i32> [#uses=1]
+ %59 = lshr i32 %29, 16 ; <i32> [#uses=1]
+ %60 = and i32 %59, 255 ; <i32> [#uses=1]
+ %61 = zext i32 %60 to i64 ; <i64> [#uses=1]
+ %62 = getelementptr [256 x i32]* @Te1, i64 0, i64 %61 ; <i32*> [#uses=1]
+ %63 = load i32* %62, align 4 ; <i32> [#uses=1]
+ %64 = and i32 %63, 16711680 ; <i32> [#uses=1]
+ %65 = or i32 %64, %58 ; <i32> [#uses=1]
+ %66 = load i32* %57, align 4 ; <i32> [#uses=1]
+ %67 = xor i32 %65, %66 ; <i32> [#uses=2]
+ %68 = lshr i32 %29, 8 ; <i32> [#uses=1]
+ %69 = zext i32 %68 to i64 ; <i64> [#uses=1]
+ %70 = getelementptr [256 x i32]* @Te0, i64 0, i64 %69 ; <i32*> [#uses=1]
+ %71 = load i32* %70, align 4 ; <i32> [#uses=1]
+ %72 = and i32 %71, -16777216 ; <i32> [#uses=1]
+ %73 = and i32 %16, 255 ; <i32> [#uses=1]
+ %74 = zext i32 %73 to i64 ; <i64> [#uses=1]
+ %75 = getelementptr [256 x i32]* @Te1, i64 0, i64 %74 ; <i32*> [#uses=1]
+ %76 = load i32* %75, align 4 ; <i32> [#uses=1]
+ %77 = and i32 %76, 16711680 ; <i32> [#uses=1]
+ %78 = or i32 %77, %72 ; <i32> [#uses=1]
+ %ctg2.sum25 = add i64 %tmp10, 20 ; <i64> [#uses=1]
+ %79 = getelementptr i8* %rk26, i64 %ctg2.sum25 ; <i8*> [#uses=1]
+ %80 = bitcast i8* %79 to i32* ; <i32*> [#uses=1]
+ %81 = load i32* %80, align 4 ; <i32> [#uses=1]
+ %82 = xor i32 %78, %81 ; <i32> [#uses=2]
+ %83 = lshr i32 %67, 24 ; <i32> [#uses=1]
+ %84 = trunc i32 %83 to i8 ; <i8> [#uses=1]
+ store i8 %84, i8* %out, align 1
+ %85 = lshr i32 %67, 16 ; <i32> [#uses=1]
+ %86 = trunc i32 %85 to i8 ; <i8> [#uses=1]
+ %87 = getelementptr i8* %out, i64 1 ; <i8*> [#uses=1]
+ store i8 %86, i8* %87, align 1
+ %88 = getelementptr i8* %out, i64 4 ; <i8*> [#uses=1]
+ %89 = lshr i32 %82, 24 ; <i32> [#uses=1]
+ %90 = trunc i32 %89 to i8 ; <i8> [#uses=1]
+ store i8 %90, i8* %88, align 1
+ %91 = lshr i32 %82, 16 ; <i32> [#uses=1]
+ %92 = trunc i32 %91 to i8 ; <i8> [#uses=1]
+ %93 = getelementptr i8* %out, i64 5 ; <i8*> [#uses=1]
+ store i8 %92, i8* %93, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/codegen-dce.ll b/test/CodeGen/X86/codegen-dce.ll
new file mode 100644
index 0000000..d83efaf
--- /dev/null
+++ b/test/CodeGen/X86/codegen-dce.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s -march=x86 -stats |& grep {codegen-dce} | grep {Number of dead instructions deleted}
+
+ %struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] }
+ %struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* }
+ %struct.node = type { i16, double, [3 x double], i32, i32 }
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+entry:
+ %0 = malloc %struct.anon ; <%struct.anon*> [#uses=2]
+ %1 = getelementptr %struct.anon* %0, i32 0, i32 2 ; <%struct.node**> [#uses=1]
+ br label %bb14.i
+
+bb14.i: ; preds = %bb14.i, %entry
+ %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %2, %bb14.i ] ; <i32> [#uses=1]
+ %2 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %exitcond74.i = icmp eq i32 %2, 32 ; <i1> [#uses=1]
+ br i1 %exitcond74.i, label %bb32.i, label %bb14.i
+
+bb32.i: ; preds = %bb32.i, %bb14.i
+ %tmp.0.reg2mem.0.i = phi i32 [ %indvar.next63.i, %bb32.i ], [ 0, %bb14.i ] ; <i32> [#uses=1]
+ %indvar.next63.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %exitcond64.i = icmp eq i32 %indvar.next63.i, 64 ; <i1> [#uses=1]
+ br i1 %exitcond64.i, label %bb47.loopexit.i, label %bb32.i
+
+bb.i.i: ; preds = %bb47.loopexit.i
+ unreachable
+
+stepsystem.exit.i: ; preds = %bb47.loopexit.i
+ store %struct.node* null, %struct.node** %1, align 4
+ br label %bb.i6.i
+
+bb.i6.i: ; preds = %bb.i6.i, %stepsystem.exit.i
+ br i1 false, label %bb107.i.i, label %bb.i6.i
+
+bb107.i.i: ; preds = %bb107.i.i, %bb.i6.i
+ %q_addr.0.i.i.in = phi %struct.bnode** [ null, %bb107.i.i ], [ %3, %bb.i6.i ] ; <%struct.bnode**> [#uses=0]
+ br label %bb107.i.i
+
+bb47.loopexit.i: ; preds = %bb32.i
+ %3 = getelementptr %struct.anon* %0, i32 0, i32 4, i32 0 ; <%struct.bnode**> [#uses=1]
+ %4 = icmp eq %struct.node* null, null ; <i1> [#uses=1]
+ br i1 %4, label %stepsystem.exit.i, label %bb.i.i
+}
diff --git a/test/CodeGen/X86/codegen-prepare-cast.ll b/test/CodeGen/X86/codegen-prepare-cast.ll
new file mode 100644
index 0000000..2a8ead8
--- /dev/null
+++ b/test/CodeGen/X86/codegen-prepare-cast.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86-64
+; PR4297
+
+target datalayout =
+"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %"byte[]" = type { i64, i8* }
+ %"char[][]" = type { i64, %"byte[]"* }
[email protected] = external constant [7 x i8] ; <[7 x i8]*> [#uses=1]
+
+define fastcc i32 @_Dmain(%"char[][]" %unnamed) {
+entry:
+ %tmp = getelementptr [7 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1]
+ br i1 undef, label %foreachbody, label %foreachend
+
+foreachbody: ; preds = %entry
+ %tmp4 = getelementptr i8* %tmp, i32 undef ; <i8*> [#uses=1]
+ %tmp5 = load i8* %tmp4 ; <i8> [#uses=0]
+ unreachable
+
+foreachend: ; preds = %entry
+ ret i32 0
+}
+
diff --git a/test/CodeGen/X86/codegen-prepare-extload.ll b/test/CodeGen/X86/codegen-prepare-extload.ll
new file mode 100644
index 0000000..9f57d53
--- /dev/null
+++ b/test/CodeGen/X86/codegen-prepare-extload.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+; rdar://7304838
+
+; CodeGenPrepare should move the zext into the block with the load
+; so that SelectionDAG can select it with the load.
+
+; CHECK: movzbl (%rdi), %eax
+
+define void @foo(i8* %p, i32* %q) {
+entry:
+ %t = load i8* %p
+ %a = icmp slt i8 %t, 20
+ br i1 %a, label %true, label %false
+true:
+ %s = zext i8 %t to i32
+ store i32 %s, i32* %q
+ ret void
+false:
+ ret void
+}
diff --git a/test/CodeGen/X86/codemodel.ll b/test/CodeGen/X86/codemodel.ll
new file mode 100644
index 0000000..b6ca1ce
--- /dev/null
+++ b/test/CodeGen/X86/codemodel.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
+; RUN: llc < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+@data = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
+
+define i32 @foo() nounwind readonly {
+entry:
+; CHECK-SMALL: foo:
+; CHECK-SMALL: movl data(%rip), %eax
+; CHECK-KERNEL: foo:
+; CHECK-KERNEL: movl data, %eax
+ %0 = load i32* getelementptr ([0 x i32]* @data, i64 0, i64 0), align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+define i32 @foo2() nounwind readonly {
+entry:
+; CHECK-SMALL: foo2:
+; CHECK-SMALL: movl data+40(%rip), %eax
+; CHECK-KERNEL: foo2:
+; CHECK-KERNEL: movl data+40, %eax
+ %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 10), align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+define i32 @foo3() nounwind readonly {
+entry:
+; CHECK-SMALL: foo3:
+; CHECK-SMALL: movl data-40(%rip), %eax
+; CHECK-KERNEL: foo3:
+; CHECK-KERNEL: movq $-40, %rax
+ %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 -10), align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+define i32 @foo4() nounwind readonly {
+entry:
+; FIXME: We really can use movabsl here!
+; CHECK-SMALL: foo4:
+; CHECK-SMALL: movl $16777216, %eax
+; CHECK-SMALL: movl data(%rax), %eax
+; CHECK-KERNEL: foo4:
+; CHECK-KERNEL: movl data+16777216, %eax
+ %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 4194304), align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+define i32 @foo1() nounwind readonly {
+entry:
+; CHECK-SMALL: foo1:
+; CHECK-SMALL: movl data+16777212(%rip), %eax
+; CHECK-KERNEL: foo1:
+; CHECK-KERNEL: movl data+16777212, %eax
+ %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 4194303), align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
+define i32 @foo5() nounwind readonly {
+entry:
+; CHECK-SMALL: foo5:
+; CHECK-SMALL: movl data-16777216(%rip), %eax
+; CHECK-KERNEL: foo5:
+; CHECK-KERNEL: movq $-16777216, %rax
+ %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 -4194304), align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/combine-lds.ll b/test/CodeGen/X86/combine-lds.ll
new file mode 100644
index 0000000..b49d081
--- /dev/null
+++ b/test/CodeGen/X86/combine-lds.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fldl | count 1
+
+define double @doload64(i64 %x) nounwind {
+ %tmp717 = bitcast i64 %x to double
+ ret double %tmp717
+}
diff --git a/test/CodeGen/X86/combiner-aa-0.ll b/test/CodeGen/X86/combiner-aa-0.ll
new file mode 100644
index 0000000..a61ef7a
--- /dev/null
+++ b/test/CodeGen/X86/combiner-aa-0.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86-64 -combiner-global-alias-analysis -combiner-alias-analysis
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+ %struct.Hash_Key = type { [4 x i32], i32 }
+@g_flipV_hashkey = external global %struct.Hash_Key, align 16 ; <%struct.Hash_Key*> [#uses=1]
+
+define void @foo() nounwind {
+ %t0 = load i32* undef, align 16 ; <i32> [#uses=1]
+ %t1 = load i32* null, align 4 ; <i32> [#uses=1]
+ %t2 = srem i32 %t0, 32 ; <i32> [#uses=1]
+ %t3 = shl i32 1, %t2 ; <i32> [#uses=1]
+ %t4 = xor i32 %t3, %t1 ; <i32> [#uses=1]
+ store i32 %t4, i32* null, align 4
+ %t5 = getelementptr %struct.Hash_Key* @g_flipV_hashkey, i64 0, i32 0, i64 0 ; <i32*> [#uses=2]
+ %t6 = load i32* %t5, align 4 ; <i32> [#uses=1]
+ %t7 = shl i32 1, undef ; <i32> [#uses=1]
+ %t8 = xor i32 %t7, %t6 ; <i32> [#uses=1]
+ store i32 %t8, i32* %t5, align 4
+ unreachable
+}
diff --git a/test/CodeGen/X86/combiner-aa-1.ll b/test/CodeGen/X86/combiner-aa-1.ll
new file mode 100644
index 0000000..58a7129
--- /dev/null
+++ b/test/CodeGen/X86/combiner-aa-1.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s --combiner-alias-analysis --combiner-global-alias-analysis
+; PR4880
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+%struct.alst_node = type { %struct.node }
+%struct.arg_node = type { %struct.node, i8*, %struct.alst_node* }
+%struct.arglst_node = type { %struct.alst_node, %struct.arg_node*, %struct.arglst_node* }
+%struct.lam_node = type { %struct.alst_node, %struct.arg_node*, %struct.alst_node* }
+%struct.node = type { i32 (...)**, %struct.node* }
+
+define i32 @._ZN8lam_node18resolve_name_clashEP8arg_nodeP9alst_node._ZNK8lam_nodeeqERK8exp_node._ZN11arglst_nodeD0Ev(%struct.lam_node* %this.this, %struct.arg_node* %outer_arg, %struct.alst_node* %env.cmp, %struct.arglst_node* %this, i32 %functionID) {
+comb_entry:
+ %.SV59 = alloca %struct.node* ; <%struct.node**> [#uses=1]
+ %0 = load i32 (...)*** null, align 4 ; <i32 (...)**> [#uses=1]
+ %1 = getelementptr inbounds i32 (...)** %0, i32 3 ; <i32 (...)**> [#uses=1]
+ %2 = load i32 (...)** %1, align 4 ; <i32 (...)*> [#uses=1]
+ store %struct.node* undef, %struct.node** %.SV59
+ %3 = bitcast i32 (...)* %2 to i32 (%struct.node*)* ; <i32 (%struct.node*)*> [#uses=1]
+ %4 = tail call i32 %3(%struct.node* undef) ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/commute-intrinsic.ll b/test/CodeGen/X86/commute-intrinsic.ll
new file mode 100644
index 0000000..d810cb1
--- /dev/null
+++ b/test/CodeGen/X86/commute-intrinsic.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | not grep movaps
+
+@a = external global <2 x i64> ; <<2 x i64>*> [#uses=1]
+
+define <2 x i64> @madd(<2 x i64> %b) nounwind {
+entry:
+ %tmp2 = load <2 x i64>* @a, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp6 = bitcast <2 x i64> %b to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp9 = bitcast <2 x i64> %tmp2 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp11 = tail call <4 x i32> @llvm.x86.sse2.pmadd.wd( <8 x i16> %tmp9, <8 x i16> %tmp6 ) nounwind readnone ; <<4 x i32>> [#uses=1]
+ %tmp14 = bitcast <4 x i32> %tmp11 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp14
+}
+
+declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnone
diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll
new file mode 100644
index 0000000..56ea26b
--- /dev/null
+++ b/test/CodeGen/X86/commute-two-addr.ll
@@ -0,0 +1,25 @@
+; The register allocator can commute two-address instructions to avoid
+; insertion of register-register copies.
+
+; Make sure there are only 3 mov's for each testcase
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep {\\\<mov\\\>} | count 6
+
+
+target triple = "i686-pc-linux-gnu"
+@G = external global i32 ; <i32*> [#uses=2]
+
+declare void @ext(i32)
+
+define i32 @add_test(i32 %X, i32 %Y) {
+ %Z = add i32 %X, %Y ; <i32> [#uses=1]
+ store i32 %Z, i32* @G
+ ret i32 %X
+}
+
+define i32 @xor_test(i32 %X, i32 %Y) {
+ %Z = xor i32 %X, %Y ; <i32> [#uses=1]
+ store i32 %Z, i32* @G
+ ret i32 %X
+}
+
diff --git a/test/CodeGen/X86/compare-add.ll b/test/CodeGen/X86/compare-add.ll
new file mode 100644
index 0000000..358ee59
--- /dev/null
+++ b/test/CodeGen/X86/compare-add.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | not grep add
+
+define i1 @X(i32 %X) {
+ %Y = add i32 %X, 14 ; <i32> [#uses=1]
+ %Z = icmp ne i32 %Y, 12345 ; <i1> [#uses=1]
+ ret i1 %Z
+}
+
diff --git a/test/CodeGen/X86/compare-inf.ll b/test/CodeGen/X86/compare-inf.ll
new file mode 100644
index 0000000..2be90c9
--- /dev/null
+++ b/test/CodeGen/X86/compare-inf.ll
@@ -0,0 +1,76 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; Convert oeq and une to ole/oge/ule/uge when comparing with infinity
+; and negative infinity, because those are more efficient on x86.
+
+; CHECK: oeq_inff:
+; CHECK: ucomiss
+; CHECK: jae
+define float @oeq_inff(float %x, float %y) nounwind readonly {
+ %t0 = fcmp oeq float %x, 0x7FF0000000000000
+ %t1 = select i1 %t0, float 1.0, float %y
+ ret float %t1
+}
+
+; CHECK: oeq_inf:
+; CHECK: ucomisd
+; CHECK: jae
+define double @oeq_inf(double %x, double %y) nounwind readonly {
+ %t0 = fcmp oeq double %x, 0x7FF0000000000000
+ %t1 = select i1 %t0, double 1.0, double %y
+ ret double %t1
+}
+
+; CHECK: une_inff:
+; CHECK: ucomiss
+; CHECK: jb
+define float @une_inff(float %x, float %y) nounwind readonly {
+ %t0 = fcmp une float %x, 0x7FF0000000000000
+ %t1 = select i1 %t0, float 1.0, float %y
+ ret float %t1
+}
+
+; CHECK: une_inf:
+; CHECK: ucomisd
+; CHECK: jb
+define double @une_inf(double %x, double %y) nounwind readonly {
+ %t0 = fcmp une double %x, 0x7FF0000000000000
+ %t1 = select i1 %t0, double 1.0, double %y
+ ret double %t1
+}
+
+; CHECK: oeq_neg_inff:
+; CHECK: ucomiss
+; CHECK: jae
+define float @oeq_neg_inff(float %x, float %y) nounwind readonly {
+ %t0 = fcmp oeq float %x, 0xFFF0000000000000
+ %t1 = select i1 %t0, float 1.0, float %y
+ ret float %t1
+}
+
+; CHECK: oeq_neg_inf:
+; CHECK: ucomisd
+; CHECK: jae
+define double @oeq_neg_inf(double %x, double %y) nounwind readonly {
+ %t0 = fcmp oeq double %x, 0xFFF0000000000000
+ %t1 = select i1 %t0, double 1.0, double %y
+ ret double %t1
+}
+
+; CHECK: une_neg_inff:
+; CHECK: ucomiss
+; CHECK: jb
+define float @une_neg_inff(float %x, float %y) nounwind readonly {
+ %t0 = fcmp une float %x, 0xFFF0000000000000
+ %t1 = select i1 %t0, float 1.0, float %y
+ ret float %t1
+}
+
+; CHECK: une_neg_inf:
+; CHECK: ucomisd
+; CHECK: jb
+define double @une_neg_inf(double %x, double %y) nounwind readonly {
+ %t0 = fcmp une double %x, 0xFFF0000000000000
+ %t1 = select i1 %t0, double 1.0, double %y
+ ret double %t1
+}
diff --git a/test/CodeGen/X86/compare_folding.ll b/test/CodeGen/X86/compare_folding.ll
new file mode 100644
index 0000000..84c152d
--- /dev/null
+++ b/test/CodeGen/X86/compare_folding.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | \
+; RUN: grep movsd | count 1
+; RUN: llc < %s -march=x86 -mcpu=yonah | \
+; RUN: grep ucomisd
+declare i1 @llvm.isunordered.f64(double, double)
+
+define i1 @test1(double %X, double %Y) {
+ %COM = fcmp uno double %X, %Y ; <i1> [#uses=1]
+ ret i1 %COM
+}
+
diff --git a/test/CodeGen/X86/compiler_used.ll b/test/CodeGen/X86/compiler_used.ll
new file mode 100644
index 0000000..be8de5e
--- /dev/null
+++ b/test/CodeGen/X86/compiler_used.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep no_dead_strip | count 1
+; We should have a .no_dead_strip directive for Z but not for X/Y.
+
+@X = internal global i8 4
+@Y = internal global i32 123
+@Z = internal global i8 4
+
[email protected] = appending global [1 x i8*] [ i8* @Z ], section "llvm.metadata"
[email protected]_used = appending global [2 x i8*] [ i8* @X, i8* bitcast (i32* @Y to i8*)], section "llvm.metadata"
diff --git a/test/CodeGen/X86/complex-fca.ll b/test/CodeGen/X86/complex-fca.ll
new file mode 100644
index 0000000..7e7acaa
--- /dev/null
+++ b/test/CodeGen/X86/complex-fca.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 | grep mov | count 2
+
+define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %z) nounwind {
+entry:
+ %z8 = extractvalue { x86_fp80, x86_fp80 } %z, 0
+ %z9 = extractvalue { x86_fp80, x86_fp80 } %z, 1
+ %0 = fsub x86_fp80 0xK80000000000000000000, %z9
+ %insert = insertvalue { x86_fp80, x86_fp80 } undef, x86_fp80 %0, 0
+ %insert7 = insertvalue { x86_fp80, x86_fp80 } %insert, x86_fp80 %z8, 1
+ call void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %insert7) nounwind
+ ret void
+}
+
+declare void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret, { x86_fp80, x86_fp80 }) nounwind
diff --git a/test/CodeGen/X86/const-select.ll b/test/CodeGen/X86/const-select.ll
new file mode 100644
index 0000000..ca8cc14
--- /dev/null
+++ b/test/CodeGen/X86/const-select.ll
@@ -0,0 +1,22 @@
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+; RUN: llc < %s | grep {LCPI1_0(,%eax,4)}
+define float @f(i32 %x) nounwind readnone {
+entry:
+ %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1]
+ ret float %iftmp.0.0
+}
+
+; RUN: llc < %s | grep {movsbl.*(%e.x,%e.x,4), %eax}
+define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly {
+entry:
+ %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1]
+ %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1]
+ %2 = load i8* %1, align 1 ; <i8> [#uses=1]
+ ret i8 %2
+}
+
diff --git a/test/CodeGen/X86/constant-pool-remat-0.ll b/test/CodeGen/X86/constant-pool-remat-0.ll
new file mode 100644
index 0000000..05388f9
--- /dev/null
+++ b/test/CodeGen/X86/constant-pool-remat-0.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 | grep LCPI | count 3
+; RUN: llc < %s -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 6
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep LCPI | count 3
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 12
+
+declare float @qux(float %y)
+
+define float @array(float %a) nounwind {
+ %n = fmul float %a, 9.0
+ %m = call float @qux(float %n)
+ %o = fmul float %m, 9.0
+ ret float %o
+}
diff --git a/test/CodeGen/X86/constant-pool-sharing.ll b/test/CodeGen/X86/constant-pool-sharing.ll
new file mode 100644
index 0000000..c3e97ad
--- /dev/null
+++ b/test/CodeGen/X86/constant-pool-sharing.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; llc should share constant pool entries between this integer vector
+; and this floating-point vector since they have the same encoding.
+
+; CHECK: LCPI1_0(%rip), %xmm0
+; CHECK: movaps %xmm0, (%rdi)
+; CHECK: movaps %xmm0, (%rsi)
+
+define void @foo(<4 x i32>* %p, <4 x float>* %q, i1 %t) nounwind {
+entry:
+ br label %loop
+loop:
+ store <4 x i32><i32 1073741824, i32 1073741824, i32 1073741824, i32 1073741824>, <4 x i32>* %p
+ store <4 x float><float 2.0, float 2.0, float 2.0, float 2.0>, <4 x float>* %q
+ br i1 %t, label %loop, label %ret
+ret:
+ ret void
+}
diff --git a/test/CodeGen/X86/constpool.ll b/test/CodeGen/X86/constpool.ll
new file mode 100644
index 0000000..2aac486
--- /dev/null
+++ b/test/CodeGen/X86/constpool.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s
+; RUN: llc < %s -fast-isel
+; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -fast-isel -march=x86-64
+; PR4466
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.7"
+
+define i32 @main() nounwind {
+entry:
+ %0 = fcmp oeq float undef, 0x7FF0000000000000 ; <i1> [#uses=1]
+ %1 = zext i1 %0 to i32 ; <i32> [#uses=1]
+ store i32 %1, i32* undef, align 4
+ ret i32 undef
+}
diff --git a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
new file mode 100644
index 0000000..8e38fe3
--- /dev/null
+++ b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86-64 -o %t -stats -info-output-file - | \
+; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 10
+; RUN: grep {leal 1(\%rsi),} %t
+
+define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2, i8* %ptr) nounwind optsize {
+entry:
+ %0 = add i32 %i2, 1 ; <i32> [#uses=1]
+ %1 = sext i32 %0 to i64 ; <i64> [#uses=1]
+ %2 = getelementptr i8* %ptr, i64 %1 ; <i8*> [#uses=1]
+ %3 = load i8* %2, align 1 ; <i8> [#uses=1]
+ %4 = icmp eq i8 0, %3 ; <i1> [#uses=1]
+ br i1 %4, label %bb3, label %bb34
+
+bb3: ; preds = %entry
+ %5 = add i32 %i2, 4 ; <i32> [#uses=0]
+ %6 = trunc i32 %5 to i8
+ ret i8 %6
+
+bb34: ; preds = %entry
+ ret i8 0
+}
+
diff --git a/test/CodeGen/X86/copysign-zero.ll b/test/CodeGen/X86/copysign-zero.ll
new file mode 100644
index 0000000..47522d8
--- /dev/null
+++ b/test/CodeGen/X86/copysign-zero.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s | not grep orpd
+; RUN: llc < %s | grep andpd | count 1
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+
+define double @test(double %X) nounwind {
+entry:
+ %tmp2 = tail call double @copysign( double 0.000000e+00, double %X ) nounwind readnone ; <double> [#uses=1]
+ ret double %tmp2
+}
+
+declare double @copysign(double, double) nounwind readnone
+
diff --git a/test/CodeGen/X86/critical-edge-split.ll b/test/CodeGen/X86/critical-edge-split.ll
new file mode 100644
index 0000000..4fe554d
--- /dev/null
+++ b/test/CodeGen/X86/critical-edge-split.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -tailcallopt=false -stats -info-output-file - | grep asm-printer | grep 31
+
+ %CC = type { %Register }
+ %II = type { %"struct.XX::II::$_74" }
+ %JITFunction = type %YYValue* (%CC*, %YYValue**)
+ %YYValue = type { i32 (...)** }
+ %Register = type { %"struct.XX::ByteCodeFeatures" }
+ %"struct.XX::ByteCodeFeatures" = type { i32 }
+ %"struct.XX::II::$_74" = type { i8* }
[email protected] = appending global [1 x i8*] [ i8* bitcast (%JITFunction* @loop to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define %YYValue* @loop(%CC*, %YYValue**) nounwind {
+; <label>:2
+ %3 = getelementptr %CC* %0, i32 -9 ; <%CC*> [#uses=1]
+ %4 = bitcast %CC* %3 to %YYValue** ; <%YYValue**> [#uses=2]
+ %5 = load %YYValue** %4 ; <%YYValue*> [#uses=3]
+ %unique_1.i = ptrtoint %YYValue* %5 to i1 ; <i1> [#uses=1]
+ br i1 %unique_1.i, label %loop, label %11
+
+loop: ; preds = %6, %2
+ %.1 = phi %YYValue* [ inttoptr (i32 1 to %YYValue*), %2 ], [ %intAddValue, %6 ] ; <%YYValue*> [#uses=3]
+ %immediateCmp = icmp slt %YYValue* %.1, %5 ; <i1> [#uses=1]
+ br i1 %immediateCmp, label %6, label %8
+
+; <label>:6 ; preds = %loop
+ %lhsInt = ptrtoint %YYValue* %.1 to i32 ; <i32> [#uses=1]
+ %7 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %lhsInt, i32 2) ; <{ i32, i1 }> [#uses=2]
+ %intAdd = extractvalue { i32, i1 } %7, 0 ; <i32> [#uses=1]
+ %intAddValue = inttoptr i32 %intAdd to %YYValue* ; <%YYValue*> [#uses=1]
+ %intAddOverflow = extractvalue { i32, i1 } %7, 1 ; <i1> [#uses=1]
+ br i1 %intAddOverflow, label %.loopexit, label %loop
+
+; <label>:8 ; preds = %loop
+ ret %YYValue* inttoptr (i32 10 to %YYValue*)
+
+.loopexit: ; preds = %6
+ %9 = bitcast %CC* %0 to %YYValue** ; <%YYValue**> [#uses=1]
+ store %YYValue* %.1, %YYValue** %9
+ store %YYValue* %5, %YYValue** %4
+ %10 = call fastcc %YYValue* @foobar(%II* inttoptr (i32 3431104 to %II*), %CC* %0, %YYValue** %1) ; <%YYValue*> [#uses=1]
+ ret %YYValue* %10
+
+; <label>:11 ; preds = %2
+ %12 = call fastcc %YYValue* @foobar(%II* inttoptr (i32 3431080 to %II*), %CC* %0, %YYValue** %1) ; <%YYValue*> [#uses=1]
+ ret %YYValue* %12
+}
+
+declare fastcc %YYValue* @foobar(%II*, %CC*, %YYValue**) nounwind
+
+declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind
diff --git a/test/CodeGen/X86/cstring.ll b/test/CodeGen/X86/cstring.ll
new file mode 100644
index 0000000..5b5a766
--- /dev/null
+++ b/test/CodeGen/X86/cstring.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | not grep comm
+; rdar://6479858
+
+@str1 = internal constant [1 x i8] zeroinitializer
diff --git a/test/CodeGen/X86/dag-rauw-cse.ll b/test/CodeGen/X86/dag-rauw-cse.ll
new file mode 100644
index 0000000..edcfeb7
--- /dev/null
+++ b/test/CodeGen/X86/dag-rauw-cse.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | grep {orl \$1}
+; PR3018
+
+define i32 @test(i32 %A) nounwind {
+ %B = or i32 %A, 1
+ %C = or i32 %B, 1
+ %D = and i32 %C, 7057
+ ret i32 %D
+}
diff --git a/test/CodeGen/X86/dagcombine-buildvector.ll b/test/CodeGen/X86/dagcombine-buildvector.ll
new file mode 100644
index 0000000..c0ee2ac
--- /dev/null
+++ b/test/CodeGen/X86/dagcombine-buildvector.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -mcpu=penryn -disable-mmx -o %t
+; RUN: grep unpcklpd %t | count 1
+; RUN: grep movapd %t | count 1
+; RUN: grep movaps %t | count 1
+
+; Shows a dag combine bug that will generate an illegal build vector
+; with v2i64 build_vector i32, i32.
+
+define void @test(<2 x double>* %dst, <4 x double> %src) nounwind {
+entry:
+ %tmp7.i = shufflevector <4 x double> %src, <4 x double> undef, <2 x i32> < i32 0, i32 2 >
+ store <2 x double> %tmp7.i, <2 x double>* %dst
+ ret void
+}
+
+define void @test2(<4 x i16>* %src, <4 x i32>* %dest) nounwind {
+entry:
+ %tmp1 = load <4 x i16>* %src
+ %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+ %0 = tail call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3)
+ store <4 x i32> %0, <4 x i32>* %dest
+ ret void
+}
+
+declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone
diff --git a/test/CodeGen/X86/dagcombine-cse.ll b/test/CodeGen/X86/dagcombine-cse.ll
new file mode 100644
index 0000000..c3c7990
--- /dev/null
+++ b/test/CodeGen/X86/dagcombine-cse.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -stats |& grep asm-printer | grep 14
+
+define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) nounwind {
+entry:
+ %tmp7 = mul i32 %idxY, %ref_frame_stride ; <i32> [#uses=2]
+ %tmp9 = add i32 %tmp7, %idxX ; <i32> [#uses=1]
+ %tmp11 = getelementptr i8* %ref_frame_ptr, i32 %tmp9 ; <i8*> [#uses=1]
+ %tmp1112 = bitcast i8* %tmp11 to i32* ; <i32*> [#uses=1]
+ %tmp13 = load i32* %tmp1112, align 4 ; <i32> [#uses=1]
+ %tmp18 = add i32 %idxX, 4 ; <i32> [#uses=1]
+ %tmp20.sum = add i32 %tmp18, %tmp7 ; <i32> [#uses=1]
+ %tmp21 = getelementptr i8* %ref_frame_ptr, i32 %tmp20.sum ; <i8*> [#uses=1]
+ %tmp2122 = bitcast i8* %tmp21 to i16* ; <i16*> [#uses=1]
+ %tmp23 = load i16* %tmp2122, align 2 ; <i16> [#uses=1]
+ %tmp2425 = zext i16 %tmp23 to i64 ; <i64> [#uses=1]
+ %tmp26 = shl i64 %tmp2425, 32 ; <i64> [#uses=1]
+ %tmp2728 = zext i32 %tmp13 to i64 ; <i64> [#uses=1]
+ %tmp29 = or i64 %tmp26, %tmp2728 ; <i64> [#uses=1]
+ %tmp3454 = bitcast i64 %tmp29 to double ; <double> [#uses=1]
+ %tmp35 = insertelement <2 x double> undef, double %tmp3454, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp36 = insertelement <2 x double> %tmp35, double 0.000000e+00, i32 1 ; <<2 x double>> [#uses=1]
+ %tmp42 = bitcast <2 x double> %tmp36 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp43 = shufflevector <8 x i16> %tmp42, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 1, i32 2, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
+ %tmp47 = bitcast <8 x i16> %tmp43 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp48 = extractelement <4 x i32> %tmp47, i32 0 ; <i32> [#uses=1]
+ ret i32 %tmp48
+}
diff --git a/test/CodeGen/X86/darwin-bzero.ll b/test/CodeGen/X86/darwin-bzero.ll
new file mode 100644
index 0000000..a9573cf
--- /dev/null
+++ b/test/CodeGen/X86/darwin-bzero.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep __bzero
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
+define void @foo(i8* %p, i32 %len) {
+ call void @llvm.memset.i32(i8* %p, i8 0, i32 %len, i32 1)
+ ret void
+}
diff --git a/test/CodeGen/X86/darwin-no-dead-strip.ll b/test/CodeGen/X86/darwin-no-dead-strip.ll
new file mode 100644
index 0000000..452d1f8
--- /dev/null
+++ b/test/CodeGen/X86/darwin-no-dead-strip.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s | grep no_dead_strip
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8.7.2"
+@x = weak global i32 0 ; <i32*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast (i32* @x to i8*) ] ; <[1 x i8*]*> [#uses=0]
+
diff --git a/test/CodeGen/X86/darwin-quote.ll b/test/CodeGen/X86/darwin-quote.ll
new file mode 100644
index 0000000..8fddc11
--- /dev/null
+++ b/test/CodeGen/X86/darwin-quote.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+
+
+define internal i64 @baz() nounwind {
+ %tmp = load i64* @"+x"
+ ret i64 %tmp
+; CHECK: _baz:
+; CHECK: movl "L_+x$non_lazy_ptr", %ecx
+}
+
+
+@"+x" = external global i64
+
+; CHECK: "L_+x$non_lazy_ptr":
+; CHECK: .indirect_symbol "_+x"
diff --git a/test/CodeGen/X86/darwin-stub.ll b/test/CodeGen/X86/darwin-stub.ll
new file mode 100644
index 0000000..b4d2e1a
--- /dev/null
+++ b/test/CodeGen/X86/darwin-stub.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep stub
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | not grep stub
+
+@"\01LC" = internal constant [13 x i8] c"Hello World!\00" ; <[13 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ %0 = tail call i32 @puts(i8* getelementptr ([13 x i8]* @"\01LC", i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @puts(i8*)
diff --git a/test/CodeGen/X86/dg.exp b/test/CodeGen/X86/dg.exp
new file mode 100644
index 0000000..629a147
--- /dev/null
+++ b/test/CodeGen/X86/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target X86] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/X86/discontiguous-loops.ll b/test/CodeGen/X86/discontiguous-loops.ll
new file mode 100644
index 0000000..479c450
--- /dev/null
+++ b/test/CodeGen/X86/discontiguous-loops.ll
@@ -0,0 +1,72 @@
+; RUN: llc -verify-loop-info -verify-dom-info -march=x86-64 < %s
+; PR5243
+
[email protected] = external constant [37 x i8], align 8 ; <[37 x i8]*> [#uses=1]
+
+define void @foo() nounwind {
+bb:
+ br label %ybb1
+
+ybb1: ; preds = %yybb13, %xbb6, %bb
+ switch i32 undef, label %bb18 [
+ i32 150, label %ybb2
+ i32 151, label %bb17
+ i32 152, label %bb19
+ i32 157, label %ybb8
+ ]
+
+ybb2: ; preds = %ybb1
+ %tmp = icmp eq i8** undef, null ; <i1> [#uses=1]
+ br i1 %tmp, label %bb3, label %xbb6
+
+bb3: ; preds = %ybb2
+ unreachable
+
+xbb4: ; preds = %xbb6
+ store i32 0, i32* undef, align 8
+ br i1 undef, label %xbb6, label %bb5
+
+bb5: ; preds = %xbb4
+ call fastcc void @decl_mode_check_failed() nounwind
+ unreachable
+
+xbb6: ; preds = %xbb4, %ybb2
+ %tmp7 = icmp slt i32 undef, 0 ; <i1> [#uses=1]
+ br i1 %tmp7, label %xbb4, label %ybb1
+
+ybb8: ; preds = %ybb1
+ %tmp9 = icmp eq i8** undef, null ; <i1> [#uses=1]
+ br i1 %tmp9, label %bb10, label %ybb12
+
+bb10: ; preds = %ybb8
+ %tmp11 = load i8** undef, align 8 ; <i8*> [#uses=1]
+ call void (i8*, ...)* @fatal(i8* getelementptr inbounds ([37 x i8]* @.str96, i64 0, i64 0), i8* %tmp11) nounwind
+ unreachable
+
+ybb12: ; preds = %ybb8
+ br i1 undef, label %bb15, label %ybb13
+
+ybb13: ; preds = %ybb12
+ %tmp14 = icmp sgt i32 undef, 0 ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb16, label %ybb1
+
+bb15: ; preds = %ybb12
+ call void (i8*, ...)* @fatal(i8* getelementptr inbounds ([37 x i8]* @.str96, i64 0, i64 0), i8* undef) nounwind
+ unreachable
+
+bb16: ; preds = %ybb13
+ unreachable
+
+bb17: ; preds = %ybb1
+ unreachable
+
+bb18: ; preds = %ybb1
+ unreachable
+
+bb19: ; preds = %ybb1
+ unreachable
+}
+
+declare void @fatal(i8*, ...)
+
+declare fastcc void @decl_mode_check_failed() nounwind
diff --git a/test/CodeGen/X86/div_const.ll b/test/CodeGen/X86/div_const.ll
new file mode 100644
index 0000000..f0ada41
--- /dev/null
+++ b/test/CodeGen/X86/div_const.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 | grep 365384439
+
+define i32 @f9188_mul365384439_shift27(i32 %A) {
+ %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
diff --git a/test/CodeGen/X86/divrem.ll b/test/CodeGen/X86/divrem.ll
new file mode 100644
index 0000000..e86b52f
--- /dev/null
+++ b/test/CodeGen/X86/divrem.ll
@@ -0,0 +1,58 @@
+; RUN: llc < %s -march=x86-64 | grep div | count 8
+
+define void @si64(i64 %x, i64 %y, i64* %p, i64* %q) {
+ %r = sdiv i64 %x, %y
+ %t = srem i64 %x, %y
+ store i64 %r, i64* %p
+ store i64 %t, i64* %q
+ ret void
+}
+define void @si32(i32 %x, i32 %y, i32* %p, i32* %q) {
+ %r = sdiv i32 %x, %y
+ %t = srem i32 %x, %y
+ store i32 %r, i32* %p
+ store i32 %t, i32* %q
+ ret void
+}
+define void @si16(i16 %x, i16 %y, i16* %p, i16* %q) {
+ %r = sdiv i16 %x, %y
+ %t = srem i16 %x, %y
+ store i16 %r, i16* %p
+ store i16 %t, i16* %q
+ ret void
+}
+define void @si8(i8 %x, i8 %y, i8* %p, i8* %q) {
+ %r = sdiv i8 %x, %y
+ %t = srem i8 %x, %y
+ store i8 %r, i8* %p
+ store i8 %t, i8* %q
+ ret void
+}
+define void @ui64(i64 %x, i64 %y, i64* %p, i64* %q) {
+ %r = udiv i64 %x, %y
+ %t = urem i64 %x, %y
+ store i64 %r, i64* %p
+ store i64 %t, i64* %q
+ ret void
+}
+define void @ui32(i32 %x, i32 %y, i32* %p, i32* %q) {
+ %r = udiv i32 %x, %y
+ %t = urem i32 %x, %y
+ store i32 %r, i32* %p
+ store i32 %t, i32* %q
+ ret void
+}
+define void @ui16(i16 %x, i16 %y, i16* %p, i16* %q) {
+ %r = udiv i16 %x, %y
+ %t = urem i16 %x, %y
+ store i16 %r, i16* %p
+ store i16 %t, i16* %q
+ ret void
+}
+define void @ui8(i8 %x, i8 %y, i8* %p, i8* %q) {
+ %r = udiv i8 %x, %y
+ %t = urem i8 %x, %y
+ store i8 %r, i8* %p
+ store i8 %t, i8* %q
+ ret void
+}
diff --git a/test/CodeGen/X86/dll-linkage.ll b/test/CodeGen/X86/dll-linkage.ll
new file mode 100644
index 0000000..c634c7e
--- /dev/null
+++ b/test/CodeGen/X86/dll-linkage.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=i386-pc-mingw32 | FileCheck %s
+
+declare dllimport void @foo()
+
+define void @bar() nounwind {
+; CHECK: call *__imp__foo
+ call void @foo()
+ ret void
+}
diff --git a/test/CodeGen/X86/dollar-name.ll b/test/CodeGen/X86/dollar-name.ll
new file mode 100644
index 0000000..3b26319
--- /dev/null
+++ b/test/CodeGen/X86/dollar-name.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux | FileCheck %s
+; PR1339
+
+@"$bar" = global i32 zeroinitializer
+@"$qux" = external global i32
+
+define i32 @"$foo"() nounwind {
+; CHECK: movl ($bar),
+; CHECK: addl ($qux),
+; CHECK: call ($hen)
+ %m = load i32* @"$bar"
+ %n = load i32* @"$qux"
+ %t = add i32 %m, %n
+ %u = call i32 @"$hen"(i32 %t)
+ ret i32 %u
+}
+
+declare i32 @"$hen"(i32 %a)
diff --git a/test/CodeGen/X86/dyn-stackalloc.ll b/test/CodeGen/X86/dyn-stackalloc.ll
new file mode 100644
index 0000000..1df0920
--- /dev/null
+++ b/test/CodeGen/X86/dyn-stackalloc.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 | not egrep {\\\$4294967289|-7}
+; RUN: llc < %s -march=x86 | egrep {\\\$4294967280|-16}
+; RUN: llc < %s -march=x86-64 | grep {\\-16}
+
+define void @t() nounwind {
+A:
+ br label %entry
+
+entry:
+ %m1 = alloca i32, align 4
+ %m2 = alloca [7 x i8], align 16
+ call void @s( i32* %m1, [7 x i8]* %m2 )
+ ret void
+}
+
+declare void @s(i32*, [7 x i8]*)
diff --git a/test/CodeGen/X86/empty-struct-return-type.ll b/test/CodeGen/X86/empty-struct-return-type.ll
new file mode 100644
index 0000000..34cd5d9
--- /dev/null
+++ b/test/CodeGen/X86/empty-struct-return-type.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 | grep call
+; PR4688
+
+; Return types can be empty structs, which can be awkward.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @_ZN15QtSharedPointer22internalSafetyCheckAddEPVKv(i8* %ptr) {
+entry:
+ %0 = call { } @_ZNK5QHashIPv15QHashDummyValueE5valueERKS0_(i8** undef) ; <{ }> [#uses=0]
+ ret void
+}
+
+declare hidden { } @_ZNK5QHashIPv15QHashDummyValueE5valueERKS0_(i8** nocapture) nounwind
diff --git a/test/CodeGen/X86/epilogue.ll b/test/CodeGen/X86/epilogue.ll
new file mode 100644
index 0000000..52dcb61
--- /dev/null
+++ b/test/CodeGen/X86/epilogue.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 | not grep lea
+; RUN: llc < %s -march=x86 | grep {movl %ebp}
+
+declare void @bar(<2 x i64>* %n)
+
+define void @foo(i64 %h) {
+ %k = trunc i64 %h to i32
+ %p = alloca <2 x i64>, i32 %k
+ call void @bar(<2 x i64>* %p)
+ ret void
+}
diff --git a/test/CodeGen/X86/extend.ll b/test/CodeGen/X86/extend.ll
new file mode 100644
index 0000000..9553b1b
--- /dev/null
+++ b/test/CodeGen/X86/extend.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movzx | count 1
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movsx | count 1
+
+@G1 = internal global i8 0 ; <i8*> [#uses=1]
+@G2 = internal global i8 0 ; <i8*> [#uses=1]
+
+define i16 @test1() {
+ %tmp.0 = load i8* @G1 ; <i8> [#uses=1]
+ %tmp.3 = zext i8 %tmp.0 to i16 ; <i16> [#uses=1]
+ ret i16 %tmp.3
+}
+
+define i16 @test2() {
+ %tmp.0 = load i8* @G2 ; <i8> [#uses=1]
+ %tmp.3 = sext i8 %tmp.0 to i16 ; <i16> [#uses=1]
+ ret i16 %tmp.3
+}
+
diff --git a/test/CodeGen/X86/extern_weak.ll b/test/CodeGen/X86/extern_weak.ll
new file mode 100644
index 0000000..01e32aa
--- /dev/null
+++ b/test/CodeGen/X86/extern_weak.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin | grep weak_reference | count 2
+
+@Y = global i32 (i8*)* @X ; <i32 (i8*)**> [#uses=0]
+
+declare extern_weak i32 @X(i8*)
+
+define void @bar() {
+ tail call void (...)* @foo( )
+ ret void
+}
+
+declare extern_weak void @foo(...)
+
diff --git a/test/CodeGen/X86/extmul128.ll b/test/CodeGen/X86/extmul128.ll
new file mode 100644
index 0000000..9b59829
--- /dev/null
+++ b/test/CodeGen/X86/extmul128.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86-64 | grep mul | count 2
+
+define i128 @i64_sext_i128(i64 %a, i64 %b) {
+ %aa = sext i64 %a to i128
+ %bb = sext i64 %b to i128
+ %cc = mul i128 %aa, %bb
+ ret i128 %cc
+}
+define i128 @i64_zext_i128(i64 %a, i64 %b) {
+ %aa = zext i64 %a to i128
+ %bb = zext i64 %b to i128
+ %cc = mul i128 %aa, %bb
+ ret i128 %cc
+}
diff --git a/test/CodeGen/X86/extmul64.ll b/test/CodeGen/X86/extmul64.ll
new file mode 100644
index 0000000..9e20ded
--- /dev/null
+++ b/test/CodeGen/X86/extmul64.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 | grep mul | count 2
+
+define i64 @i32_sext_i64(i32 %a, i32 %b) {
+ %aa = sext i32 %a to i64
+ %bb = sext i32 %b to i64
+ %cc = mul i64 %aa, %bb
+ ret i64 %cc
+}
+define i64 @i32_zext_i64(i32 %a, i32 %b) {
+ %aa = zext i32 %a to i64
+ %bb = zext i32 %b to i64
+ %cc = mul i64 %aa, %bb
+ ret i64 %cc
+}
diff --git a/test/CodeGen/X86/extract-combine.ll b/test/CodeGen/X86/extract-combine.ll
new file mode 100644
index 0000000..2040e87
--- /dev/null
+++ b/test/CodeGen/X86/extract-combine.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 -mcpu=core2 -o %t
+; RUN: not grep unpcklps %t
+
+define i32 @foo() nounwind {
+entry:
+ %tmp74.i25762 = shufflevector <16 x float> zeroinitializer, <16 x float> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19> ; <<16 x float>> [#uses=1]
+ %tmp518 = shufflevector <16 x float> %tmp74.i25762, <16 x float> undef, <4 x i32> <i32 12, i32 13, i32 14, i32 15> ; <<4 x float>> [#uses=1]
+ %movss.i25611 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp518, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]
+ %conv3.i25615 = shufflevector <4 x float> %movss.i25611, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> ; <<4 x float>> [#uses=1]
+ %sub.i25620 = fsub <4 x float> %conv3.i25615, zeroinitializer ; <<4 x float>> [#uses=1]
+ %mul.i25621 = fmul <4 x float> zeroinitializer, %sub.i25620 ; <<4 x float>> [#uses=1]
+ %add.i25622 = fadd <4 x float> zeroinitializer, %mul.i25621 ; <<4 x float>> [#uses=1]
+ store <4 x float> %add.i25622, <4 x float>* null
+ unreachable
+}
diff --git a/test/CodeGen/X86/extract-extract.ll b/test/CodeGen/X86/extract-extract.ll
new file mode 100644
index 0000000..ad79ab9
--- /dev/null
+++ b/test/CodeGen/X86/extract-extract.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 >/dev/null
+; PR4699
+
+; Handle this extractvalue-of-extractvalue case without getting in
+; trouble with CSE in DAGCombine.
+
+ %cc = type { %crd }
+ %cr = type { i32 }
+ %crd = type { i64, %cr* }
+ %pp = type { %cc }
+
+define fastcc void @foo(%pp* nocapture byval %p_arg) {
+entry:
+ %tmp2 = getelementptr %pp* %p_arg, i64 0, i32 0 ; <%cc*> [#uses=
+ %tmp3 = load %cc* %tmp2 ; <%cc> [#uses=1]
+ %tmp34 = extractvalue %cc %tmp3, 0 ; <%crd> [#uses=1]
+ %tmp345 = extractvalue %crd %tmp34, 0 ; <i64> [#uses=1]
+ %.ptr.i = load %cr** undef ; <%cr*> [#uses=0]
+ %tmp15.i = shl i64 %tmp345, 3 ; <i64> [#uses=0]
+ store %cr* undef, %cr** undef
+ ret void
+}
+
+
diff --git a/test/CodeGen/X86/extractelement-from-arg.ll b/test/CodeGen/X86/extractelement-from-arg.ll
new file mode 100644
index 0000000..4ea37f0
--- /dev/null
+++ b/test/CodeGen/X86/extractelement-from-arg.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse2
+
+define void @test(float* %R, <4 x float> %X) nounwind {
+ %tmp = extractelement <4 x float> %X, i32 3
+ store float %tmp, float* %R
+ ret void
+}
diff --git a/test/CodeGen/X86/extractelement-load.ll b/test/CodeGen/X86/extractelement-load.ll
new file mode 100644
index 0000000..ee57d9b
--- /dev/null
+++ b/test/CodeGen/X86/extractelement-load.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | not grep movd
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | not grep movd
+
+define i32 @t(<2 x i64>* %val) nounwind {
+ %tmp2 = load <2 x i64>* %val, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp3 = bitcast <2 x i64> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp4 = extractelement <4 x i32> %tmp3, i32 2 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
diff --git a/test/CodeGen/X86/extractelement-shuffle.ll b/test/CodeGen/X86/extractelement-shuffle.ll
new file mode 100644
index 0000000..d1ba9a8
--- /dev/null
+++ b/test/CodeGen/X86/extractelement-shuffle.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s
+
+; Examples that exhibits a bug in DAGCombine. The case is triggered by the
+; following program. The bug is DAGCombine assumes that the bit convert
+; preserves the number of elements so the optimization code tries to read
+; through the 3rd mask element, which doesn't exist.
+define i32 @update(<2 x i64> %val1, <2 x i64> %val2) nounwind readnone {
+entry:
+ %shuf = shufflevector <2 x i64> %val1, <2 x i64> %val2, <2 x i32> <i32 0, i32 3>
+ %bit = bitcast <2 x i64> %shuf to <4 x i32>
+ %res = extractelement <4 x i32> %bit, i32 3
+ ret i32 %res
+}
diff --git a/test/CodeGen/X86/extractps.ll b/test/CodeGen/X86/extractps.ll
new file mode 100644
index 0000000..14778f0
--- /dev/null
+++ b/test/CodeGen/X86/extractps.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86 -mcpu=penryn > %t
+; RUN: not grep movd %t
+; RUN: grep {movss %xmm} %t | count 1
+; RUN: grep {extractps \\\$1, %xmm0, } %t | count 1
+; PR2647
+
+external global float, align 16 ; <float*>:0 [#uses=2]
+
+define internal void @""() nounwind {
+ load float* @0, align 16 ; <float>:1 [#uses=1]
+ insertelement <4 x float> undef, float %1, i32 0 ; <<4 x float>>:2 [#uses=1]
+ call <4 x float> @llvm.x86.sse.rsqrt.ss( <4 x float> %2 ) ; <<4 x float>>:3 [#uses=1]
+ extractelement <4 x float> %3, i32 0 ; <float>:4 [#uses=1]
+ store float %4, float* @0, align 16
+ ret void
+}
+define internal void @""() nounwind {
+ load float* @0, align 16 ; <float>:1 [#uses=1]
+ insertelement <4 x float> undef, float %1, i32 1 ; <<4 x float>>:2 [#uses=1]
+ call <4 x float> @llvm.x86.sse.rsqrt.ss( <4 x float> %2 ) ; <<4 x float>>:3 [#uses=1]
+ extractelement <4 x float> %3, i32 1 ; <float>:4 [#uses=1]
+ store float %4, float* @0, align 16
+ ret void
+}
+
+declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
+
diff --git a/test/CodeGen/X86/fabs.ll b/test/CodeGen/X86/fabs.ll
new file mode 100644
index 0000000..54947c3
--- /dev/null
+++ b/test/CodeGen/X86/fabs.ll
@@ -0,0 +1,28 @@
+; Make sure this testcase codegens to the fabs instruction, not a call to fabsf
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fabs\$ | \
+; RUN: count 2
+; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \
+; RUN: grep fabs\$ | count 3
+
+declare float @fabsf(float)
+
+declare x86_fp80 @fabsl(x86_fp80)
+
+define float @test1(float %X) {
+ %Y = call float @fabsf(float %X)
+ ret float %Y
+}
+
+define double @test2(double %X) {
+ %Y = fcmp oge double %X, -0.0
+ %Z = fsub double -0.0, %X
+ %Q = select i1 %Y, double %X, double %Z
+ ret double %Q
+}
+
+define x86_fp80 @test3(x86_fp80 %X) {
+ %Y = call x86_fp80 @fabsl(x86_fp80 %X)
+ ret x86_fp80 %Y
+}
+
+
diff --git a/test/CodeGen/X86/fast-cc-callee-pops.ll b/test/CodeGen/X86/fast-cc-callee-pops.ll
new file mode 100644
index 0000000..5e88ed7
--- /dev/null
+++ b/test/CodeGen/X86/fast-cc-callee-pops.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20}
+
+; Check that a fastcc function pops its stack variables before returning.
+
+define x86_fastcallcc void @func(i64 %X, i64 %Y, float %G, double %Z) nounwind {
+ ret void
+}
diff --git a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
new file mode 100644
index 0000000..e151821
--- /dev/null
+++ b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep {add ESP, 8}
+
+target triple = "i686-pc-linux-gnu"
+
+declare x86_fastcallcc void @func(i32*, i64)
+
+define x86_fastcallcc void @caller(i32, i64) {
+ %X = alloca i32 ; <i32*> [#uses=1]
+ call x86_fastcallcc void @func( i32* %X, i64 0 )
+ ret void
+}
+
diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
new file mode 100644
index 0000000..fe96c0c
--- /dev/null
+++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep {mov EDX, 1}
+; check that fastcc is passing stuff in regs.
+
+declare x86_fastcallcc i64 @callee(i64)
+
+define i64 @caller() {
+ %X = call x86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1]
+ ret i64 %X
+}
+
+define x86_fastcallcc i64 @caller2(i64 %X) {
+ ret i64 %X
+}
+
diff --git a/test/CodeGen/X86/fast-isel-bail.ll b/test/CodeGen/X86/fast-isel-bail.ll
new file mode 100644
index 0000000..9072c5c
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-bail.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -O0
+
+; This file is for regression tests for cases where FastISel needs
+; to gracefully bail out and let SelectionDAGISel take over.
+
+ type { i64, i8* } ; type %0
+
+declare void @bar(%0)
+
+define fastcc void @foo() nounwind {
+entry:
+ call void @bar(%0 zeroinitializer)
+ unreachable
+}
diff --git a/test/CodeGen/X86/fast-isel-bc.ll b/test/CodeGen/X86/fast-isel-bc.ll
new file mode 100644
index 0000000..f2696ce
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-bc.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -O0 -march=x86-64 -mattr=+mmx | FileCheck %s
+; PR4684
+
+target datalayout =
+"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.8"
+
+declare void @func2(<1 x i64>)
+
+define void @func1() nounwind {
+
+; This isn't spectacular, but it's MMX code at -O0...
+; CHECK: movl $2, %eax
+; CHECK: movd %rax, %mm0
+; CHECK: movd %mm0, %rdi
+
+ call void @func2(<1 x i64> <i64 2>)
+ ret void
+}
diff --git a/test/CodeGen/X86/fast-isel-call.ll b/test/CodeGen/X86/fast-isel-call.ll
new file mode 100644
index 0000000..5fcdbbb
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-call.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -fast-isel -march=x86 | grep and
+
+define i32 @t() nounwind {
+tak:
+ %tmp = call i1 @foo()
+ br i1 %tmp, label %BB1, label %BB2
+BB1:
+ ret i32 1
+BB2:
+ ret i32 0
+}
+
+declare i1 @foo() zeroext nounwind
diff --git a/test/CodeGen/X86/fast-isel-constpool.ll b/test/CodeGen/X86/fast-isel-constpool.ll
new file mode 100644
index 0000000..84d10f3
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-constpool.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -fast-isel | grep {LCPI1_0(%rip)}
+; Make sure fast isel uses rip-relative addressing when required.
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.0"
+
+define i32 @f0(double %x) nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %x.addr = alloca double ; <double*> [#uses=2]
+ store double %x, double* %x.addr
+ %tmp = load double* %x.addr ; <double> [#uses=1]
+ %cmp = fcmp olt double %tmp, 8.500000e-01 ; <i1> [#uses=1]
+ %conv = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ store i32 %conv, i32* %retval
+ %0 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/fast-isel-fneg.ll b/test/CodeGen/X86/fast-isel-fneg.ll
new file mode 100644
index 0000000..5ffd48b
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-fneg.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86-64 | FileCheck %s
+; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | grep xor | count 2
+
+; CHECK: doo:
+; CHECK: xor
+define double @doo(double %x) nounwind {
+ %y = fsub double -0.0, %x
+ ret double %y
+}
+
+; CHECK: foo:
+; CHECK: xor
+define float @foo(float %x) nounwind {
+ %y = fsub float -0.0, %x
+ ret float %y
+}
diff --git a/test/CodeGen/X86/fast-isel-gep.ll b/test/CodeGen/X86/fast-isel-gep.ll
new file mode 100644
index 0000000..5b8acec
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-gep.ll
@@ -0,0 +1,53 @@
+; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -march=x86 -O0 | FileCheck %s --check-prefix=X32
+
+; GEP indices are interpreted as signed integers, so they
+; should be sign-extended to 64 bits on 64-bit targets.
+; PR3181
+define i32 @test1(i32 %t3, i32* %t1) nounwind {
+ %t9 = getelementptr i32* %t1, i32 %t3 ; <i32*> [#uses=1]
+ %t15 = load i32* %t9 ; <i32> [#uses=1]
+ ret i32 %t15
+; X32: test1:
+; X32: movl (%ecx,%eax,4), %eax
+; X32: ret
+
+; X64: test1:
+; X64: movslq %edi, %rax
+; X64: movl (%rsi,%rax,4), %eax
+; X64: ret
+
+}
+define i32 @test2(i64 %t3, i32* %t1) nounwind {
+ %t9 = getelementptr i32* %t1, i64 %t3 ; <i32*> [#uses=1]
+ %t15 = load i32* %t9 ; <i32> [#uses=1]
+ ret i32 %t15
+; X32: test2:
+; X32: movl (%eax,%ecx,4), %eax
+; X32: ret
+
+; X64: test2:
+; X64: movl (%rsi,%rdi,4), %eax
+; X64: ret
+}
+
+
+
+; PR4984
+define i8 @test3(i8* %start) nounwind {
+entry:
+ %A = getelementptr i8* %start, i64 -2 ; <i8*> [#uses=1]
+ %B = load i8* %A, align 1 ; <i8> [#uses=1]
+ ret i8 %B
+
+
+; X32: test3:
+; X32: movl 4(%esp), %eax
+; X32: movb -2(%eax), %al
+; X32: ret
+
+; X64: test3:
+; X64: movb -2(%rdi), %al
+; X64: ret
+
+}
diff --git a/test/CodeGen/X86/fast-isel-gv.ll b/test/CodeGen/X86/fast-isel-gv.ll
new file mode 100644
index 0000000..34f8b38
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-gv.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -fast-isel | grep {_kill@GOTPCREL(%rip)}
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+@f = global i8 (...)* @kill ; <i8 (...)**> [#uses=1]
+
+declare signext i8 @kill(...)
+
+define i32 @main() nounwind ssp {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = load i8 (...)** @f, align 8 ; <i8 (...)*> [#uses=1]
+ %2 = icmp ne i8 (...)* %1, @kill ; <i1> [#uses=1]
+ %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
+ store i32 %3, i32* %0, align 4
+ %4 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %4, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
diff --git a/test/CodeGen/X86/fast-isel-i1.ll b/test/CodeGen/X86/fast-isel-i1.ll
new file mode 100644
index 0000000..d066578
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-i1.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 -fast-isel | grep {andb \$1, %}
+
+declare i64 @bar(i64)
+
+define i32 @foo(i64 %x) nounwind {
+ %y = add i64 %x, -3 ; <i64> [#uses=1]
+ %t = call i64 @bar(i64 %y) ; <i64> [#uses=1]
+ %s = mul i64 %t, 77 ; <i64> [#uses=1]
+ %z = trunc i64 %s to i1 ; <i1> [#uses=1]
+ br label %next
+
+next: ; preds = %0
+ %u = zext i1 %z to i32 ; <i32> [#uses=1]
+ %v = add i32 %u, 1999 ; <i32> [#uses=1]
+ br label %exit
+
+exit: ; preds = %next
+ ret i32 %v
+}
diff --git a/test/CodeGen/X86/fast-isel-mem.ll b/test/CodeGen/X86/fast-isel-mem.ll
new file mode 100644
index 0000000..35ec1e7
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-mem.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin | \
+; RUN: grep lazy_ptr, | count 2
+; RUN: llc < %s -fast-isel -march=x86 -relocation-model=static | \
+; RUN: grep lea
+
+@src = external global i32
+
+define i32 @loadgv() nounwind {
+entry:
+ %0 = load i32* @src, align 4
+ %1 = load i32* @src, align 4
+ %2 = add i32 %0, %1
+ store i32 %2, i32* @src
+ ret i32 %2
+}
+
+%stuff = type { i32 (...)** }
+@LotsStuff = external constant [4 x i32 (...)*]
+
+define void @t(%stuff* %this) nounwind {
+entry:
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @LotsStuff, i32 0, i32 2), i32 (...)*** null, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/fast-isel-phys.ll b/test/CodeGen/X86/fast-isel-phys.ll
new file mode 100644
index 0000000..158ef55
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-phys.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86
+
+define i8 @t2(i8 %a, i8 %c) nounwind {
+ %tmp = shl i8 %a, %c
+ ret i8 %tmp
+}
+
+define i8 @t1(i8 %a) nounwind {
+ %tmp = mul i8 %a, 17
+ ret i8 %tmp
+}
diff --git a/test/CodeGen/X86/fast-isel-shift-imm.ll b/test/CodeGen/X86/fast-isel-shift-imm.ll
new file mode 100644
index 0000000..35f7a72
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-shift-imm.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -O0 | grep {sarl \$80, %eax}
+; PR3242
+
+define i32 @foo(i32 %x) nounwind {
+ %y = ashr i32 %x, 50000
+ ret i32 %y
+}
diff --git a/test/CodeGen/X86/fast-isel-tailcall.ll b/test/CodeGen/X86/fast-isel-tailcall.ll
new file mode 100644
index 0000000..c3e527c
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-tailcall.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | not grep add
+; PR4154
+
+; On x86, -tailcallopt changes the ABI so the caller shouldn't readjust
+; the stack pointer after the call in this code.
+
+define i32 @stub(i8* %t0) nounwind {
+entry:
+ %t1 = load i32* inttoptr (i32 139708680 to i32*) ; <i32> [#uses=1]
+ %t2 = bitcast i8* %t0 to i32 (i32)* ; <i32 (i32)*> [#uses=1]
+ %t3 = call fastcc i32 %t2(i32 %t1) ; <i32> [#uses=1]
+ ret i32 %t3
+}
diff --git a/test/CodeGen/X86/fast-isel-tls.ll b/test/CodeGen/X86/fast-isel-tls.ll
new file mode 100644
index 0000000..a5e6642
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-tls.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | grep __tls_get_addr
+; PR3654
+
+@v = thread_local global i32 0
+define i32 @f() nounwind {
+entry:
+ %t = load i32* @v
+ %s = add i32 %t, 1
+ ret i32 %s
+}
diff --git a/test/CodeGen/X86/fast-isel-trunc.ll b/test/CodeGen/X86/fast-isel-trunc.ll
new file mode 100644
index 0000000..69b26c5
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-trunc.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -fast-isel -fast-isel-abort
+; RUN: llc < %s -march=x86-64 -fast-isel -fast-isel-abort
+
+define i8 @t1(i32 %x) signext nounwind {
+ %tmp1 = trunc i32 %x to i8
+ ret i8 %tmp1
+}
+
+define i8 @t2(i16 signext %x) signext nounwind {
+ %tmp1 = trunc i16 %x to i8
+ ret i8 %tmp1
+}
diff --git a/test/CodeGen/X86/fast-isel.ll b/test/CodeGen/X86/fast-isel.ll
new file mode 100644
index 0000000..84b3fd7
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel.ll
@@ -0,0 +1,75 @@
+; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86 -mattr=sse2
+
+; This tests very minimal fast-isel functionality.
+
+define i32* @foo(i32* %p, i32* %q, i32** %z) nounwind {
+entry:
+ %r = load i32* %p
+ %s = load i32* %q
+ %y = load i32** %z
+ br label %fast
+
+fast:
+ %t0 = add i32 %r, %s
+ %t1 = mul i32 %t0, %s
+ %t2 = sub i32 %t1, %s
+ %t3 = and i32 %t2, %s
+ %t4 = xor i32 %t3, 3
+ %t5 = xor i32 %t4, %s
+ %t6 = add i32 %t5, 2
+ %t7 = getelementptr i32* %y, i32 1
+ %t8 = getelementptr i32* %t7, i32 %t6
+ br label %exit
+
+exit:
+ ret i32* %t8
+}
+
+define double @bar(double* %p, double* %q) nounwind {
+entry:
+ %r = load double* %p
+ %s = load double* %q
+ br label %fast
+
+fast:
+ %t0 = fadd double %r, %s
+ %t1 = fmul double %t0, %s
+ %t2 = fsub double %t1, %s
+ %t3 = fadd double %t2, 707.0
+ br label %exit
+
+exit:
+ ret double %t3
+}
+
+define i32 @cast() nounwind {
+entry:
+ %tmp2 = bitcast i32 0 to i32
+ ret i32 %tmp2
+}
+
+define i1 @ptrtoint_i1(i8* %p) nounwind {
+ %t = ptrtoint i8* %p to i1
+ ret i1 %t
+}
+define i8* @inttoptr_i1(i1 %p) nounwind {
+ %t = inttoptr i1 %p to i8*
+ ret i8* %t
+}
+define i32 @ptrtoint_i32(i8* %p) nounwind {
+ %t = ptrtoint i8* %p to i32
+ ret i32 %t
+}
+define i8* @inttoptr_i32(i32 %p) nounwind {
+ %t = inttoptr i32 %p to i8*
+ ret i8* %t
+}
+
+define void @store_i1(i1* %p, i1 %t) nounwind {
+ store i1 %t, i1* %p
+ ret void
+}
+define i1 @load_i1(i1* %p) nounwind {
+ %t = load i1* %p
+ ret i1 %t
+}
diff --git a/test/CodeGen/X86/fastcall-correct-mangling.ll b/test/CodeGen/X86/fastcall-correct-mangling.ll
new file mode 100644
index 0000000..2b48f5f
--- /dev/null
+++ b/test/CodeGen/X86/fastcall-correct-mangling.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=i386-unknown-mingw32 | \
+; RUN: grep {@12}
+
+; Check that a fastcall function gets correct mangling
+
+define x86_fastcallcc void @func(i64 %X, i8 %Y, i8 %G, i16 %Z) {
+ ret void
+}
+
diff --git a/test/CodeGen/X86/fastcc-2.ll b/test/CodeGen/X86/fastcc-2.ll
new file mode 100644
index 0000000..d044a2a
--- /dev/null
+++ b/test/CodeGen/X86/fastcc-2.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1
+
+define i32 @foo() nounwind {
+entry:
+ tail call fastcc void @bar( double 1.000000e+00 ) nounwind
+ ret i32 0
+}
+
+declare fastcc void @bar(double)
diff --git a/test/CodeGen/X86/fastcc-byval.ll b/test/CodeGen/X86/fastcc-byval.ll
new file mode 100644
index 0000000..52b3e57
--- /dev/null
+++ b/test/CodeGen/X86/fastcc-byval.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -tailcallopt=false | grep {movl\[\[:space:\]\]*8(%esp), %eax} | count 2
+; PR3122
+; rdar://6400815
+
+; byval requires a copy, even with fastcc.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+ %struct.MVT = type { i32 }
+
+define fastcc i32 @bar() nounwind {
+ %V = alloca %struct.MVT
+ %a = getelementptr %struct.MVT* %V, i32 0, i32 0
+ store i32 1, i32* %a
+ call fastcc void @foo(%struct.MVT* byval %V) nounwind
+ %t = load i32* %a
+ ret i32 %t
+}
+
+declare fastcc void @foo(%struct.MVT* byval)
diff --git a/test/CodeGen/X86/fastcc-sret.ll b/test/CodeGen/X86/fastcc-sret.ll
new file mode 100644
index 0000000..d4574188
--- /dev/null
+++ b/test/CodeGen/X86/fastcc-sret.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 -tailcallopt=false | grep ret | not grep 4
+
+ %struct.foo = type { [4 x i32] }
+
+define fastcc void @bar(%struct.foo* noalias sret %agg.result) nounwind {
+entry:
+ %tmp1 = getelementptr %struct.foo* %agg.result, i32 0, i32 0
+ %tmp3 = getelementptr [4 x i32]* %tmp1, i32 0, i32 0
+ store i32 1, i32* %tmp3, align 8
+ ret void
+}
+
+@dst = external global i32
+
+define void @foo() nounwind {
+ %memtmp = alloca %struct.foo, align 4
+ call fastcc void @bar( %struct.foo* sret %memtmp ) nounwind
+ %tmp4 = getelementptr %struct.foo* %memtmp, i32 0, i32 0
+ %tmp5 = getelementptr [4 x i32]* %tmp4, i32 0, i32 0
+ %tmp6 = load i32* %tmp5
+ store i32 %tmp6, i32* @dst
+ ret void
+}
diff --git a/test/CodeGen/X86/fastcc.ll b/test/CodeGen/X86/fastcc.ll
new file mode 100644
index 0000000..705ab7b
--- /dev/null
+++ b/test/CodeGen/X86/fastcc.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -post-RA-scheduler=false | FileCheck %s
+; CHECK: movsd %xmm0, 8(%esp)
+; CHECK: xorl %ecx, %ecx
+
+@d = external global double ; <double*> [#uses=1]
+@c = external global double ; <double*> [#uses=1]
+@b = external global double ; <double*> [#uses=1]
+@a = external global double ; <double*> [#uses=1]
+
+define i32 @foo() nounwind {
+entry:
+ %0 = load double* @d, align 8 ; <double> [#uses=1]
+ %1 = load double* @c, align 8 ; <double> [#uses=1]
+ %2 = load double* @b, align 8 ; <double> [#uses=1]
+ %3 = load double* @a, align 8 ; <double> [#uses=1]
+ tail call fastcc void @bar( i32 0, i32 1, i32 2, double 1.000000e+00, double %3, double %2, double %1, double %0 ) nounwind
+ ret i32 0
+}
+
+declare fastcc void @bar(i32, i32, i32, double, double, double, double, double)
diff --git a/test/CodeGen/X86/fastcc3struct.ll b/test/CodeGen/X86/fastcc3struct.ll
new file mode 100644
index 0000000..84f8ef6
--- /dev/null
+++ b/test/CodeGen/X86/fastcc3struct.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -o %t
+; RUN: grep "movl .48, %ecx" %t
+; RUN: grep "movl .24, %edx" %t
+; RUN: grep "movl .12, %eax" %t
+
+%0 = type { i32, i32, i32 }
+
+define internal fastcc %0 @ReturnBigStruct() nounwind readnone {
+entry:
+ %0 = insertvalue %0 zeroinitializer, i32 12, 0
+ %1 = insertvalue %0 %0, i32 24, 1
+ %2 = insertvalue %0 %1, i32 48, 2
+ ret %0 %2
+}
+
diff --git a/test/CodeGen/X86/field-extract-use-trunc.ll b/test/CodeGen/X86/field-extract-use-trunc.ll
new file mode 100644
index 0000000..6020530
--- /dev/null
+++ b/test/CodeGen/X86/field-extract-use-trunc.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -march=x86 | grep sar | count 1
+; RUN: llc < %s -march=x86-64 | not grep sar
+
+define i32 @test(i32 %f12) {
+ %tmp7.25 = lshr i32 %f12, 16
+ %tmp7.26 = trunc i32 %tmp7.25 to i8
+ %tmp78.2 = sext i8 %tmp7.26 to i32
+ ret i32 %tmp78.2
+}
+
+define i32 @test2(i32 %f12) {
+ %f11 = shl i32 %f12, 8
+ %tmp7.25 = ashr i32 %f11, 24
+ ret i32 %tmp7.25
+}
+
+define i32 @test3(i32 %f12) {
+ %f11 = shl i32 %f12, 13
+ %tmp7.25 = ashr i32 %f11, 24
+ ret i32 %tmp7.25
+}
+
+define i64 @test4(i64 %f12) {
+ %f11 = shl i64 %f12, 32
+ %tmp7.25 = ashr i64 %f11, 32
+ ret i64 %tmp7.25
+}
+
+define i16 @test5(i16 %f12) {
+ %f11 = shl i16 %f12, 2
+ %tmp7.25 = ashr i16 %f11, 8
+ ret i16 %tmp7.25
+}
+
+define i16 @test6(i16 %f12) {
+ %f11 = shl i16 %f12, 8
+ %tmp7.25 = ashr i16 %f11, 8
+ ret i16 %tmp7.25
+}
diff --git a/test/CodeGen/X86/fildll.ll b/test/CodeGen/X86/fildll.ll
new file mode 100644
index 0000000..c5a3765
--- /dev/null
+++ b/test/CodeGen/X86/fildll.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2
+
+define fastcc double @sint64_to_fp(i64 %X) {
+ %R = sitofp i64 %X to double ; <double> [#uses=1]
+ ret double %R
+}
+
+define fastcc double @uint64_to_fp(i64 %X) {
+ %R = uitofp i64 %X to double ; <double> [#uses=1]
+ ret double %R
+}
+
diff --git a/test/CodeGen/X86/fmul-zero.ll b/test/CodeGen/X86/fmul-zero.ll
new file mode 100644
index 0000000..03bad65
--- /dev/null
+++ b/test/CodeGen/X86/fmul-zero.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86-64 -enable-unsafe-fp-math | not grep mulps
+; RUN: llc < %s -march=x86-64 | grep mulps
+
+define void @test14(<4 x float>*) nounwind {
+ load <4 x float>* %0, align 1
+ fmul <4 x float> %2, zeroinitializer
+ store <4 x float> %3, <4 x float>* %0, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/fold-add.ll b/test/CodeGen/X86/fold-add.ll
new file mode 100644
index 0000000..5e80ea5
--- /dev/null
+++ b/test/CodeGen/X86/fold-add.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86-64 | grep {cmpb \$0, (%r.\*,%r.\*)}
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.6"
+@prev_length = internal global i32 0 ; <i32*> [#uses=1]
+@window = internal global [65536 x i8] zeroinitializer, align 32 ; <[65536 x i8]*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 (i32)* @longest_match to i8*)] ; <[1 x i8*]*> [#uses=0]
+
+define fastcc i32 @longest_match(i32 %cur_match) nounwind {
+entry:
+ %0 = load i32* @prev_length, align 4 ; <i32> [#uses=3]
+ %1 = zext i32 %cur_match to i64 ; <i64> [#uses=1]
+ %2 = sext i32 %0 to i64 ; <i64> [#uses=1]
+ %.sum3 = add i64 %1, %2 ; <i64> [#uses=1]
+ %3 = getelementptr [65536 x i8]* @window, i64 0, i64 %.sum3 ; <i8*> [#uses=1]
+ %4 = load i8* %3, align 1 ; <i8> [#uses=1]
+ %5 = icmp eq i8 %4, 0 ; <i1> [#uses=1]
+ br i1 %5, label %bb5, label %bb23
+
+bb5: ; preds = %entry
+ ret i32 %0
+
+bb23: ; preds = %entry
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/fold-and-shift.ll b/test/CodeGen/X86/fold-and-shift.ll
new file mode 100644
index 0000000..9f79f77
--- /dev/null
+++ b/test/CodeGen/X86/fold-and-shift.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 | not grep and
+
+define i32 @t1(i8* %X, i32 %i) {
+entry:
+ %tmp2 = shl i32 %i, 2 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp2, 1020 ; <i32> [#uses=1]
+ %tmp7 = getelementptr i8* %X, i32 %tmp4 ; <i8*> [#uses=1]
+ %tmp78 = bitcast i8* %tmp7 to i32* ; <i32*> [#uses=1]
+ %tmp9 = load i32* %tmp78, align 4 ; <i32> [#uses=1]
+ ret i32 %tmp9
+}
+
+define i32 @t2(i16* %X, i32 %i) {
+entry:
+ %tmp2 = shl i32 %i, 1 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp2, 131070 ; <i32> [#uses=1]
+ %tmp7 = getelementptr i16* %X, i32 %tmp4 ; <i16*> [#uses=1]
+ %tmp78 = bitcast i16* %tmp7 to i32* ; <i32*> [#uses=1]
+ %tmp9 = load i32* %tmp78, align 4 ; <i32> [#uses=1]
+ ret i32 %tmp9
+}
diff --git a/test/CodeGen/X86/fold-call-2.ll b/test/CodeGen/X86/fold-call-2.ll
new file mode 100644
index 0000000..7a2b038
--- /dev/null
+++ b/test/CodeGen/X86/fold-call-2.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep mov | count 1
+
+@f = external global void ()* ; <void ()**> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ load void ()** @f, align 8 ; <void ()*>:0 [#uses=1]
+ tail call void %0( ) nounwind
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/fold-call-3.ll b/test/CodeGen/X86/fold-call-3.ll
new file mode 100644
index 0000000..337a7ed
--- /dev/null
+++ b/test/CodeGen/X86/fold-call-3.ll
@@ -0,0 +1,45 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep call | grep 560
+; rdar://6522427
+
+ %"struct.clang::Action" = type { %"struct.clang::ActionBase" }
+ %"struct.clang::ActionBase" = type { i32 (...)** }
+ %"struct.clang::ActionBase::ActionResult<0u>" = type { i8*, i8 }
+@NumTrials = internal global i32 10000000 ; <i32*> [#uses=2]
[email protected] = appending global [1 x i8*] [ i8* bitcast (void (i8*, %"struct.clang::Action"*)* @_Z25RawPointerPerformanceTestPvRN5clang6ActionE to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @_Z25RawPointerPerformanceTestPvRN5clang6ActionE(i8* %Val, %"struct.clang::Action"* %Actions) nounwind {
+entry:
+ %0 = alloca %"struct.clang::ActionBase::ActionResult<0u>", align 8 ; <%"struct.clang::ActionBase::ActionResult<0u>"*> [#uses=3]
+ %1 = load i32* @NumTrials, align 4 ; <i32> [#uses=1]
+ %2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %3 = getelementptr %"struct.clang::Action"* %Actions, i64 0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ %mrv_gep = bitcast %"struct.clang::ActionBase::ActionResult<0u>"* %0 to i64* ; <i64*> [#uses=1]
+ %mrv_gep1 = getelementptr %"struct.clang::ActionBase::ActionResult<0u>"* %0, i64 0, i32 1 ; <i8*> [#uses=1]
+ %4 = bitcast i8* %mrv_gep1 to i64* ; <i64*> [#uses=1]
+ %5 = getelementptr %"struct.clang::ActionBase::ActionResult<0u>"* %0, i64 0, i32 0 ; <i8**> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %Trial.01 = phi i32 [ 0, %bb.nph ], [ %12, %bb ] ; <i32> [#uses=1]
+ %Val_addr.02 = phi i8* [ %Val, %bb.nph ], [ %11, %bb ] ; <i8*> [#uses=1]
+ %6 = load i32 (...)*** %3, align 8 ; <i32 (...)**> [#uses=1]
+ %7 = getelementptr i32 (...)** %6, i64 70 ; <i32 (...)**> [#uses=1]
+ %8 = load i32 (...)** %7, align 8 ; <i32 (...)*> [#uses=1]
+ %9 = bitcast i32 (...)* %8 to { i64, i64 } (%"struct.clang::Action"*, i8*)* ; <{ i64, i64 } (%"struct.clang::Action"*, i8*)*> [#uses=1]
+ %10 = call { i64, i64 } %9(%"struct.clang::Action"* %Actions, i8* %Val_addr.02) nounwind ; <{ i64, i64 }> [#uses=2]
+ %mrv_gr = extractvalue { i64, i64 } %10, 0 ; <i64> [#uses=1]
+ store i64 %mrv_gr, i64* %mrv_gep
+ %mrv_gr2 = extractvalue { i64, i64 } %10, 1 ; <i64> [#uses=1]
+ store i64 %mrv_gr2, i64* %4
+ %11 = load i8** %5, align 8 ; <i8*> [#uses=1]
+ %12 = add i32 %Trial.01, 1 ; <i32> [#uses=2]
+ %13 = load i32* @NumTrials, align 4 ; <i32> [#uses=1]
+ %14 = icmp ult i32 %12, %13 ; <i1> [#uses=1]
+ br i1 %14, label %bb, label %return
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/fold-call.ll b/test/CodeGen/X86/fold-call.ll
new file mode 100644
index 0000000..603e9ad
--- /dev/null
+++ b/test/CodeGen/X86/fold-call.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 | not grep mov
+; RUN: llc < %s -march=x86-64 | not grep mov
+
+declare void @bar()
+
+define void @foo(i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, void()* %arg) nounwind {
+ call void @bar()
+ call void %arg()
+ ret void
+}
diff --git a/test/CodeGen/X86/fold-imm.ll b/test/CodeGen/X86/fold-imm.ll
new file mode 100644
index 0000000..f1fcbcf
--- /dev/null
+++ b/test/CodeGen/X86/fold-imm.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 | grep inc
+; RUN: llc < %s -march=x86 | grep add | grep 4
+
+define i32 @test(i32 %X) nounwind {
+entry:
+ %0 = add i32 %X, 1
+ ret i32 %0
+}
+
+define i32 @test2(i32 %X) nounwind {
+entry:
+ %0 = add i32 %X, 4
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/fold-load.ll b/test/CodeGen/X86/fold-load.ll
new file mode 100644
index 0000000..5525af2
--- /dev/null
+++ b/test/CodeGen/X86/fold-load.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -march=x86 | FileCheck %s
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 }
+@stmt_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=1]
+
+; This should just not crash.
+define void @test1() nounwind {
+entry:
+ br i1 true, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ %new_size.0.i = select i1 false, i32 0, i32 0 ; <i32> [#uses=1]
+ %tmp.i = load i32* bitcast (i8* getelementptr (%struct.obstack* @stmt_obstack, i32 0, i32 10) to i32*) ; <i32> [#uses=1]
+ %tmp.i.upgrd.1 = trunc i32 %tmp.i to i8 ; <i8> [#uses=1]
+ %tmp21.i = and i8 %tmp.i.upgrd.1, 1 ; <i8> [#uses=1]
+ %tmp22.i = icmp eq i8 %tmp21.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp22.i, label %cond_false30.i, label %cond_true23.i
+
+cond_true23.i: ; preds = %cond_true
+ ret void
+
+cond_false30.i: ; preds = %cond_true
+ %tmp35.i = tail call %struct._obstack_chunk* null( i32 %new_size.0.i ) ; <%struct._obstack_chunk*> [#uses=0]
+ ret void
+
+cond_next: ; preds = %entry
+ ret void
+}
+
+
+
+define i32 @test2(i16* %P, i16* %Q) nounwind {
+ %A = load i16* %P, align 4 ; <i16> [#uses=11]
+ %C = zext i16 %A to i32 ; <i32> [#uses=1]
+ %D = and i32 %C, 255 ; <i32> [#uses=1]
+ br label %L
+L:
+
+ store i16 %A, i16* %Q
+ ret i32 %D
+
+; CHECK: test2:
+; CHECK: movl 4(%esp), %eax
+; CHECK-NEXT: movzwl (%eax), %ecx
+
+}
+
diff --git a/test/CodeGen/X86/fold-mul-lohi.ll b/test/CodeGen/X86/fold-mul-lohi.ll
new file mode 100644
index 0000000..0351eca
--- /dev/null
+++ b/test/CodeGen/X86/fold-mul-lohi.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86 | not grep lea
+; RUN: llc < %s -march=x86-64 | not grep lea
+
+@B = external global [1000 x i8], align 32
+@A = external global [1000 x i8], align 32
+@P = external global [1000 x i8], align 32
+
+define void @foo(i32 %m) nounwind {
+entry:
+ %tmp1 = icmp sgt i32 %m, 0
+ br i1 %tmp1, label %bb, label %return
+
+bb:
+ %i.019.0 = phi i32 [ %indvar.next, %bb ], [ 0, %entry ]
+ %tmp2 = getelementptr [1000 x i8]* @B, i32 0, i32 %i.019.0
+ %tmp3 = load i8* %tmp2, align 4
+ %tmp4 = mul i8 %tmp3, 2
+ %tmp5 = getelementptr [1000 x i8]* @A, i32 0, i32 %i.019.0
+ store i8 %tmp4, i8* %tmp5, align 4
+ %tmp8 = mul i32 %i.019.0, 9
+ %tmp10 = getelementptr [1000 x i8]* @P, i32 0, i32 %tmp8
+ store i8 17, i8* %tmp10, align 4
+ %indvar.next = add i32 %i.019.0, 1
+ %exitcond = icmp eq i32 %indvar.next, %m
+ br i1 %exitcond, label %return, label %bb
+
+return:
+ ret void
+}
+
diff --git a/test/CodeGen/X86/fold-pcmpeqd-0.ll b/test/CodeGen/X86/fold-pcmpeqd-0.ll
new file mode 100644
index 0000000..ef5202f
--- /dev/null
+++ b/test/CodeGen/X86/fold-pcmpeqd-0.ll
@@ -0,0 +1,105 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | grep orps | grep CPI1_2 | count 2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
+
+; This testcase shouldn't need to spill the -1 value,
+; so it should just use pcmpeqd to materialize an all-ones vector.
+; For i386, cp load of -1 are folded.
+
+ %struct.__ImageExecInfo = type <{ <4 x i32>, <4 x float>, <2 x i64>, i8*, i8*, i8*, i32, i32, i32, i32, i32 }>
+ %struct._cl_image_format_t = type <{ i32, i32, i32 }>
+ %struct._image2d_t = type <{ i8*, %struct._cl_image_format_t, i32, i32, i32, i32, i32, i32 }>
+
+define void @program_1(%struct._image2d_t* %dest, %struct._image2d_t* %t0, <4 x float> %p0, <4 x float> %p1, <4 x float> %p4, <4 x float> %p5, <4 x float> %p6) nounwind {
+entry:
+ %tmp3.i = load i32* null ; <i32> [#uses=1]
+ %cmp = icmp sgt i32 %tmp3.i, 200 ; <i1> [#uses=1]
+ br i1 %cmp, label %forcond, label %ifthen
+
+ifthen: ; preds = %entry
+ ret void
+
+forcond: ; preds = %entry
+ %tmp3.i536 = load i32* null ; <i32> [#uses=1]
+ %cmp12 = icmp slt i32 0, %tmp3.i536 ; <i1> [#uses=1]
+ br i1 %cmp12, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %bitcast204.i313 = bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>> [#uses=1]
+ %mul233 = fmul <4 x float> %bitcast204.i313, zeroinitializer ; <<4 x float>> [#uses=1]
+ %mul257 = fmul <4 x float> %mul233, zeroinitializer ; <<4 x float>> [#uses=1]
+ %mul275 = fmul <4 x float> %mul257, zeroinitializer ; <<4 x float>> [#uses=1]
+ %tmp51 = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %mul275, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
+ %bitcast198.i182 = bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=0]
+ %bitcast204.i185 = bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp69 = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> zeroinitializer) nounwind ; <<4 x i32>> [#uses=1]
+ %tmp70 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp69) nounwind ; <<4 x float>> [#uses=1]
+ %sub140.i78 = fsub <4 x float> zeroinitializer, %tmp70 ; <<4 x float>> [#uses=2]
+ %mul166.i86 = fmul <4 x float> zeroinitializer, %sub140.i78 ; <<4 x float>> [#uses=1]
+ %add167.i87 = fadd <4 x float> %mul166.i86, < float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000 > ; <<4 x float>> [#uses=1]
+ %mul171.i88 = fmul <4 x float> %add167.i87, %sub140.i78 ; <<4 x float>> [#uses=1]
+ %add172.i89 = fadd <4 x float> %mul171.i88, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 > ; <<4 x float>> [#uses=1]
+ %bitcast176.i90 = bitcast <4 x float> %add172.i89 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andnps178.i92 = and <4 x i32> %bitcast176.i90, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %bitcast179.i93 = bitcast <4 x i32> %andnps178.i92 to <4 x float> ; <<4 x float>> [#uses=1]
+ %mul186.i96 = fmul <4 x float> %bitcast179.i93, zeroinitializer ; <<4 x float>> [#uses=1]
+ %bitcast190.i98 = bitcast <4 x float> %mul186.i96 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andnps192.i100 = and <4 x i32> %bitcast190.i98, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %xorps.i102 = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %orps203.i103 = or <4 x i32> %andnps192.i100, %xorps.i102 ; <<4 x i32>> [#uses=1]
+ %bitcast204.i104 = bitcast <4 x i32> %orps203.i103 to <4 x float> ; <<4 x float>> [#uses=1]
+ %cmple.i = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> zeroinitializer, <4 x float> %tmp51, i8 2) nounwind ; <<4 x float>> [#uses=1]
+ %tmp80 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
+ %sub140.i = fsub <4 x float> zeroinitializer, %tmp80 ; <<4 x float>> [#uses=1]
+ %bitcast148.i = bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andnps150.i = and <4 x i32> %bitcast148.i, < i32 -2139095041, i32 -2139095041, i32 -2139095041, i32 -2139095041 > ; <<4 x i32>> [#uses=0]
+ %mul171.i = fmul <4 x float> zeroinitializer, %sub140.i ; <<4 x float>> [#uses=1]
+ %add172.i = fadd <4 x float> %mul171.i, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 > ; <<4 x float>> [#uses=1]
+ %bitcast176.i = bitcast <4 x float> %add172.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andnps178.i = and <4 x i32> %bitcast176.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %bitcast179.i = bitcast <4 x i32> %andnps178.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %mul186.i = fmul <4 x float> %bitcast179.i, zeroinitializer ; <<4 x float>> [#uses=1]
+ %bitcast189.i = bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=0]
+ %bitcast190.i = bitcast <4 x float> %mul186.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andnps192.i = and <4 x i32> %bitcast190.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %bitcast198.i = bitcast <4 x float> %cmple.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %xorps.i = xor <4 x i32> %bitcast198.i, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %orps203.i = or <4 x i32> %andnps192.i, %xorps.i ; <<4 x i32>> [#uses=1]
+ %bitcast204.i = bitcast <4 x i32> %orps203.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %mul307 = fmul <4 x float> %bitcast204.i185, zeroinitializer ; <<4 x float>> [#uses=1]
+ %mul310 = fmul <4 x float> %bitcast204.i104, zeroinitializer ; <<4 x float>> [#uses=2]
+ %mul313 = fmul <4 x float> %bitcast204.i, zeroinitializer ; <<4 x float>> [#uses=1]
+ %tmp82 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %mul307, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
+ %bitcast11.i15 = bitcast <4 x float> %tmp82 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andnps.i17 = and <4 x i32> %bitcast11.i15, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %orps.i18 = or <4 x i32> %andnps.i17, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %bitcast17.i19 = bitcast <4 x i32> %orps.i18 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp83 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %mul310, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
+ %bitcast.i3 = bitcast <4 x float> %mul310 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %bitcast6.i4 = bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=2]
+ %andps.i5 = and <4 x i32> %bitcast.i3, %bitcast6.i4 ; <<4 x i32>> [#uses=1]
+ %bitcast11.i6 = bitcast <4 x float> %tmp83 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %not.i7 = xor <4 x i32> %bitcast6.i4, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %andnps.i8 = and <4 x i32> %bitcast11.i6, %not.i7 ; <<4 x i32>> [#uses=1]
+ %orps.i9 = or <4 x i32> %andnps.i8, %andps.i5 ; <<4 x i32>> [#uses=1]
+ %bitcast17.i10 = bitcast <4 x i32> %orps.i9 to <4 x float> ; <<4 x float>> [#uses=1]
+ %bitcast.i = bitcast <4 x float> %mul313 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andps.i = and <4 x i32> %bitcast.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %orps.i = or <4 x i32> zeroinitializer, %andps.i ; <<4 x i32>> [#uses=1]
+ %bitcast17.i = bitcast <4 x i32> %orps.i to <4 x float> ; <<4 x float>> [#uses=1]
+ call void null(<4 x float> %bitcast17.i19, <4 x float> %bitcast17.i10, <4 x float> %bitcast17.i, <4 x float> zeroinitializer, %struct.__ImageExecInfo* null, <4 x i32> zeroinitializer) nounwind
+ unreachable
+
+afterfor: ; preds = %forcond
+ ret void
+}
+
+declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
+
+declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/X86/fold-pcmpeqd-1.ll b/test/CodeGen/X86/fold-pcmpeqd-1.ll
new file mode 100644
index 0000000..cc4198d
--- /dev/null
+++ b/test/CodeGen/X86/fold-pcmpeqd-1.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
+; RUN: grep pcmpeqd %t | count 1
+; RUN: grep xor %t | count 1
+; RUN: not grep LCP %t
+
+define <2 x double> @foo() nounwind {
+ ret <2 x double> bitcast (<2 x i64><i64 -1, i64 -1> to <2 x double>)
+}
+define <2 x double> @bar() nounwind {
+ ret <2 x double> bitcast (<2 x i64><i64 0, i64 0> to <2 x double>)
+}
diff --git a/test/CodeGen/X86/fold-pcmpeqd-2.ll b/test/CodeGen/X86/fold-pcmpeqd-2.ll
new file mode 100644
index 0000000..49f8795
--- /dev/null
+++ b/test/CodeGen/X86/fold-pcmpeqd-2.ll
@@ -0,0 +1,83 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
+
+; This testcase should need to spill the -1 value on x86-32,
+; so it shouldn't use pcmpeqd to materialize an all-ones vector; it
+; should use a constant-pool load instead.
+
+ %struct.__ImageExecInfo = type <{ <4 x i32>, <4 x float>, <2 x i64>, i8*, i8*, i8*, i32, i32, i32, i32, i32 }>
+ %struct._cl_image_format_t = type <{ i32, i32, i32 }>
+ %struct._image2d_t = type <{ i8*, %struct._cl_image_format_t, i32, i32, i32, i32, i32, i32 }>
+
+define void @program_1(%struct._image2d_t* %dest, %struct._image2d_t* %t0, <4 x float> %p0, <4 x float> %p1, <4 x float> %p4, <4 x float> %p5, <4 x float> %p6) nounwind {
+entry:
+ %tmp3.i = load i32* null ; <i32> [#uses=1]
+ %cmp = icmp slt i32 0, %tmp3.i ; <i1> [#uses=1]
+ br i1 %cmp, label %forcond, label %ifthen
+
+ifthen: ; preds = %entry
+ ret void
+
+forcond: ; preds = %entry
+ %tmp3.i536 = load i32* null ; <i32> [#uses=1]
+ %cmp12 = icmp slt i32 0, %tmp3.i536 ; <i1> [#uses=1]
+ br i1 %cmp12, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %bitcast204.i104 = bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp78 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> < float 1.280000e+02, float 1.280000e+02, float 1.280000e+02, float 1.280000e+02 >, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=2]
+ %tmp79 = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp78) nounwind ; <<4 x i32>> [#uses=1]
+ %tmp80 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp79) nounwind ; <<4 x float>> [#uses=1]
+ %sub140.i = fsub <4 x float> %tmp78, %tmp80 ; <<4 x float>> [#uses=2]
+ %mul166.i = fmul <4 x float> zeroinitializer, %sub140.i ; <<4 x float>> [#uses=1]
+ %add167.i = fadd <4 x float> %mul166.i, < float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000 > ; <<4 x float>> [#uses=1]
+ %mul171.i = fmul <4 x float> %add167.i, %sub140.i ; <<4 x float>> [#uses=1]
+ %add172.i = fadd <4 x float> %mul171.i, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 > ; <<4 x float>> [#uses=1]
+ %bitcast176.i = bitcast <4 x float> %add172.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andnps178.i = and <4 x i32> %bitcast176.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %bitcast179.i = bitcast <4 x i32> %andnps178.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %mul186.i = fmul <4 x float> %bitcast179.i, zeroinitializer ; <<4 x float>> [#uses=1]
+ %bitcast190.i = bitcast <4 x float> %mul186.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andnps192.i = and <4 x i32> %bitcast190.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %xorps.i = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %orps203.i = or <4 x i32> %andnps192.i, %xorps.i ; <<4 x i32>> [#uses=1]
+ %bitcast204.i = bitcast <4 x i32> %orps203.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %mul310 = fmul <4 x float> %bitcast204.i104, zeroinitializer ; <<4 x float>> [#uses=2]
+ %mul313 = fmul <4 x float> %bitcast204.i, zeroinitializer ; <<4 x float>> [#uses=1]
+ %cmpunord.i11 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> zeroinitializer, <4 x float> zeroinitializer, i8 3) nounwind ; <<4 x float>> [#uses=1]
+ %bitcast6.i13 = bitcast <4 x float> %cmpunord.i11 to <4 x i32> ; <<4 x i32>> [#uses=2]
+ %andps.i14 = and <4 x i32> zeroinitializer, %bitcast6.i13 ; <<4 x i32>> [#uses=1]
+ %not.i16 = xor <4 x i32> %bitcast6.i13, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %andnps.i17 = and <4 x i32> zeroinitializer, %not.i16 ; <<4 x i32>> [#uses=1]
+ %orps.i18 = or <4 x i32> %andnps.i17, %andps.i14 ; <<4 x i32>> [#uses=1]
+ %bitcast17.i19 = bitcast <4 x i32> %orps.i18 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp83 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %mul310, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
+ %bitcast.i3 = bitcast <4 x float> %mul310 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %andps.i5 = and <4 x i32> %bitcast.i3, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %bitcast11.i6 = bitcast <4 x float> %tmp83 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %not.i7 = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %andnps.i8 = and <4 x i32> %bitcast11.i6, %not.i7 ; <<4 x i32>> [#uses=1]
+ %orps.i9 = or <4 x i32> %andnps.i8, %andps.i5 ; <<4 x i32>> [#uses=1]
+ %bitcast17.i10 = bitcast <4 x i32> %orps.i9 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp84 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %mul313, <4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
+ %bitcast6.i = bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=2]
+ %andps.i = and <4 x i32> zeroinitializer, %bitcast6.i ; <<4 x i32>> [#uses=1]
+ %bitcast11.i = bitcast <4 x float> %tmp84 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %not.i = xor <4 x i32> %bitcast6.i, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %andnps.i = and <4 x i32> %bitcast11.i, %not.i ; <<4 x i32>> [#uses=1]
+ %orps.i = or <4 x i32> %andnps.i, %andps.i ; <<4 x i32>> [#uses=1]
+ %bitcast17.i = bitcast <4 x i32> %orps.i to <4 x float> ; <<4 x float>> [#uses=1]
+ call void null(<4 x float> %bitcast17.i19, <4 x float> %bitcast17.i10, <4 x float> %bitcast17.i, <4 x float> zeroinitializer, %struct.__ImageExecInfo* null, <4 x i32> zeroinitializer) nounwind
+ unreachable
+
+afterfor: ; preds = %forcond
+ ret void
+}
+
+declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
+
+declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/CodeGen/X86/fold-sext-trunc.ll b/test/CodeGen/X86/fold-sext-trunc.ll
new file mode 100644
index 0000000..2605123
--- /dev/null
+++ b/test/CodeGen/X86/fold-sext-trunc.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86-64 | grep movslq | count 1
+; PR4050
+
+ type { i64 } ; type %0
+ %struct.S1 = type { i16, i32 }
+@g_10 = external global %struct.S1 ; <%struct.S1*> [#uses=2]
+
+declare void @func_28(i64, i64)
+
+define void @int322(i32 %foo) nounwind {
+entry:
+ %val = load i64* getelementptr (%0* bitcast (%struct.S1* @g_10 to %0*), i32 0, i32 0) ; <i64> [#uses=1]
+ %0 = load i32* getelementptr (%struct.S1* @g_10, i32 0, i32 1), align 4 ; <i32> [#uses=1]
+ %1 = sext i32 %0 to i64 ; <i64> [#uses=1]
+ %tmp4.i = lshr i64 %val, 32 ; <i64> [#uses=1]
+ %tmp5.i = trunc i64 %tmp4.i to i32 ; <i32> [#uses=1]
+ %2 = sext i32 %tmp5.i to i64 ; <i64> [#uses=1]
+ tail call void @func_28(i64 %2, i64 %1) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/fp-immediate-shorten.ll b/test/CodeGen/X86/fp-immediate-shorten.ll
new file mode 100644
index 0000000..cafc61a
--- /dev/null
+++ b/test/CodeGen/X86/fp-immediate-shorten.ll
@@ -0,0 +1,9 @@
+;; Test that this FP immediate is stored in the constant pool as a float.
+
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | \
+; RUN: grep {.long.1123418112}
+
+define double @D() {
+ ret double 1.230000e+02
+}
+
diff --git a/test/CodeGen/X86/fp-in-intregs.ll b/test/CodeGen/X86/fp-in-intregs.ll
new file mode 100644
index 0000000..08ea77d
--- /dev/null
+++ b/test/CodeGen/X86/fp-in-intregs.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | not egrep {\(\(xor\|and\)ps\|movd\)}
+
+; These operations should be done in integer registers, eliminating constant
+; pool loads, movd's etc.
+
+define i32 @test1(float %x) nounwind {
+entry:
+ %tmp2 = fsub float -0.000000e+00, %x ; <float> [#uses=1]
+ %tmp210 = bitcast float %tmp2 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp210
+}
+
+define i32 @test2(float %x) nounwind {
+entry:
+ %tmp2 = tail call float @copysignf( float 1.000000e+00, float %x ) nounwind readnone ; <float> [#uses=1]
+ %tmp210 = bitcast float %tmp2 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp210
+}
+
+declare float @copysignf(float, float) nounwind readnone
+
diff --git a/test/CodeGen/X86/fp-stack-2results.ll b/test/CodeGen/X86/fp-stack-2results.ll
new file mode 100644
index 0000000..321e267
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-2results.ll
@@ -0,0 +1,60 @@
+; RUN: llc < %s -march=x86 | grep fldz
+; RUN: llc < %s -march=x86-64 | grep fld1
+
+; This is basically this code on x86-64:
+; _Complex long double test() { return 1.0; }
+define {x86_fp80, x86_fp80} @test() {
+ %A = fpext double 1.0 to x86_fp80
+ %B = fpext double 0.0 to x86_fp80
+ ret x86_fp80 %A, x86_fp80 %B
+}
+
+
+;_test2:
+; fld1
+; fld %st(0)
+; ret
+define {x86_fp80, x86_fp80} @test2() {
+ %A = fpext double 1.0 to x86_fp80
+ ret x86_fp80 %A, x86_fp80 %A
+}
+
+; Uses both values.
+define void @call1(x86_fp80 *%P1, x86_fp80 *%P2) {
+ %a = call {x86_fp80,x86_fp80} @test()
+ %b = getresult {x86_fp80,x86_fp80} %a, 0
+ store x86_fp80 %b, x86_fp80* %P1
+
+ %c = getresult {x86_fp80,x86_fp80} %a, 1
+ store x86_fp80 %c, x86_fp80* %P2
+ ret void
+}
+
+; Uses both values, requires fxch
+define void @call2(x86_fp80 *%P1, x86_fp80 *%P2) {
+ %a = call {x86_fp80,x86_fp80} @test()
+ %b = getresult {x86_fp80,x86_fp80} %a, 1
+ store x86_fp80 %b, x86_fp80* %P1
+
+ %c = getresult {x86_fp80,x86_fp80} %a, 0
+ store x86_fp80 %c, x86_fp80* %P2
+ ret void
+}
+
+; Uses ST(0), ST(1) is dead but must be popped.
+define void @call3(x86_fp80 *%P1, x86_fp80 *%P2) {
+ %a = call {x86_fp80,x86_fp80} @test()
+ %b = getresult {x86_fp80,x86_fp80} %a, 0
+ store x86_fp80 %b, x86_fp80* %P1
+ ret void
+}
+
+; Uses ST(1), ST(0) is dead and must be popped.
+define void @call4(x86_fp80 *%P1, x86_fp80 *%P2) {
+ %a = call {x86_fp80,x86_fp80} @test()
+
+ %c = getresult {x86_fp80,x86_fp80} %a, 1
+ store x86_fp80 %c, x86_fp80* %P2
+ ret void
+}
+
diff --git a/test/CodeGen/X86/fp-stack-O0-crash.ll b/test/CodeGen/X86/fp-stack-O0-crash.ll
new file mode 100644
index 0000000..4768ea2
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-O0-crash.ll
@@ -0,0 +1,30 @@
+; RUN: llc %s -O0 -fast-isel -regalloc=local -o -
+; PR4767
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10"
+
+define void @fn(x86_fp80 %x) nounwind ssp {
+entry:
+ %x.addr = alloca x86_fp80 ; <x86_fp80*> [#uses=5]
+ store x86_fp80 %x, x86_fp80* %x.addr
+ br i1 false, label %cond.true, label %cond.false
+
+cond.true: ; preds = %entry
+ %tmp = load x86_fp80* %x.addr ; <x86_fp80> [#uses=1]
+ %tmp1 = load x86_fp80* %x.addr ; <x86_fp80> [#uses=1]
+ %cmp = fcmp oeq x86_fp80 %tmp, %tmp1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+cond.false: ; preds = %entry
+ %tmp2 = load x86_fp80* %x.addr ; <x86_fp80> [#uses=1]
+ %tmp3 = load x86_fp80* %x.addr ; <x86_fp80> [#uses=1]
+ %cmp4 = fcmp une x86_fp80 %tmp2, %tmp3 ; <i1> [#uses=1]
+ br i1 %cmp4, label %if.then, label %if.end
+
+if.then: ; preds = %cond.false, %cond.true
+ br label %if.end
+
+if.end: ; preds = %if.then, %cond.false, %cond.true
+ ret void
+}
diff --git a/test/CodeGen/X86/fp-stack-compare.ll b/test/CodeGen/X86/fp-stack-compare.ll
new file mode 100644
index 0000000..4bdf459
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-compare.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mcpu=i386 | \
+; RUN: grep {fucomi.*st.\[12\]}
+; PR1012
+
+define float @foo(float* %col.2.0) {
+ %tmp = load float* %col.2.0 ; <float> [#uses=3]
+ %tmp16 = fcmp olt float %tmp, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp20 = fsub float -0.000000e+00, %tmp ; <float> [#uses=1]
+ %iftmp.2.0 = select i1 %tmp16, float %tmp20, float %tmp ; <float> [#uses=1]
+ ret float %iftmp.2.0
+}
+
diff --git a/test/CodeGen/X86/fp-stack-direct-ret.ll b/test/CodeGen/X86/fp-stack-direct-ret.ll
new file mode 100644
index 0000000..5a28bb5
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-direct-ret.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 | not grep fstp
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movsd
+
+declare double @foo()
+
+define double @bar() {
+entry:
+ %tmp5 = tail call double @foo()
+ ret double %tmp5
+}
+
diff --git a/test/CodeGen/X86/fp-stack-ret-conv.ll b/test/CodeGen/X86/fp-stack-ret-conv.ll
new file mode 100644
index 0000000..f220b24
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-ret-conv.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mcpu=yonah | grep cvtss2sd
+; RUN: llc < %s -mcpu=yonah | grep fstps
+; RUN: llc < %s -mcpu=yonah | not grep cvtsd2ss
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define void @test(double *%b) {
+entry:
+ %tmp13 = tail call double @foo()
+ %tmp1314 = fptrunc double %tmp13 to float ; <float> [#uses=1]
+ %tmp3940 = fpext float %tmp1314 to double ; <double> [#uses=1]
+ volatile store double %tmp3940, double* %b
+ ret void
+}
+
+declare double @foo()
diff --git a/test/CodeGen/X86/fp-stack-ret-store.ll b/test/CodeGen/X86/fp-stack-ret-store.ll
new file mode 100644
index 0000000..05dfc54
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-ret-store.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -mcpu=yonah | not grep movss
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+; This should store directly into P from the FP stack. It should not
+; go through a stack slot to get there.
+
+define void @bar(double* %P) {
+entry:
+ %tmp = tail call double (...)* @foo( ) ; <double> [#uses=1]
+ store double %tmp, double* %P, align 8
+ ret void
+}
+
+declare double @foo(...)
+
+define void @bar2(float* %P) {
+entry:
+ %tmp = tail call double (...)* @foo2( ) ; <double> [#uses=1]
+ %tmp1 = fptrunc double %tmp to float ; <float> [#uses=1]
+ store float %tmp1, float* %P, align 4
+ ret void
+}
+
+declare double @foo2(...)
+
diff --git a/test/CodeGen/X86/fp-stack-ret.ll b/test/CodeGen/X86/fp-stack-ret.ll
new file mode 100644
index 0000000..c83a0cb
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-ret.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t
+; RUN: grep fldl %t | count 1
+; RUN: not grep xmm %t
+; RUN: grep {sub.*esp} %t | count 1
+
+; These testcases shouldn't require loading into an XMM register then storing
+; to memory, then reloading into an FPStack reg.
+
+define double @test1(double *%P) {
+ %A = load double* %P
+ ret double %A
+}
+
+; fastcc should return a value
+define fastcc double @test2(<2 x double> %A) {
+ %B = extractelement <2 x double> %A, i32 0
+ ret double %B
+}
+
+define fastcc double @test3(<4 x float> %A) {
+ %B = bitcast <4 x float> %A to <2 x double>
+ %C = call fastcc double @test2(<2 x double> %B)
+ ret double %C
+}
+
diff --git a/test/CodeGen/X86/fp-stack-retcopy.ll b/test/CodeGen/X86/fp-stack-retcopy.ll
new file mode 100644
index 0000000..67dcb18
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-retcopy.ll
@@ -0,0 +1,12 @@
+; This should not copy the result of foo into an xmm register.
+; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm
+; rdar://5689903
+
+declare double @foo()
+
+define double @carg({ double, double }* byval %z) nounwind {
+entry:
+ %tmp5 = tail call double @foo() nounwind ; <double> [#uses=1]
+ ret double %tmp5
+}
+
diff --git a/test/CodeGen/X86/fp-stack-set-st1.ll b/test/CodeGen/X86/fp-stack-set-st1.ll
new file mode 100644
index 0000000..894897a
--- /dev/null
+++ b/test/CodeGen/X86/fp-stack-set-st1.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 | grep fxch | count 2
+
+define i32 @main() nounwind {
+entry:
+ %asmtmp = tail call { double, double } asm sideeffect "fmul\09%st(1),%st\0A\09fst\09%st(1)\0A\09frndint\0A\09fxch %st(1)\0A\09fsub\09%st(1),%st\0A\09f2xm1\0A\09", "={st},={st(1)},0,1,~{dirflag},~{fpsr},~{flags}"(double 0x4030FEFBD582097D, double 4.620000e+01) nounwind ; <{ double, double }> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/fp2sint.ll b/test/CodeGen/X86/fp2sint.ll
new file mode 100644
index 0000000..1675444
--- /dev/null
+++ b/test/CodeGen/X86/fp2sint.ll
@@ -0,0 +1,18 @@
+;; LowerFP_TO_SINT should not create a stack object if it's not needed.
+
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep add
+
+define i32 @main(i32 %argc, i8** %argv) {
+cond_false.i.i.i: ; preds = %bb.i5
+ %tmp35.i = load double* null, align 8 ; <double> [#uses=1]
+ %tmp3536.i = fptosi double %tmp35.i to i32 ; <i32> [#uses=1]
+ %tmp3536140.i = zext i32 %tmp3536.i to i64 ; <i64> [#uses=1]
+ %tmp39.i = load double* null, align 4 ; <double> [#uses=1]
+ %tmp3940.i = fptosi double %tmp39.i to i32 ; <i32> [#uses=1]
+ %tmp3940137.i = zext i32 %tmp3940.i to i64 ; <i64> [#uses=1]
+ %tmp3940137138.i = shl i64 %tmp3940137.i, 32 ; <i64> [#uses=1]
+ %tmp3940137138.ins.i = or i64 %tmp3940137138.i, %tmp3536140.i ; <i64> [#uses=1]
+ %tmp95.i.i = trunc i64 %tmp3940137138.ins.i to i32 ; <i32> [#uses=1]
+ store i32 %tmp95.i.i, i32* null, align 4
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/fp_constant_op.ll b/test/CodeGen/X86/fp_constant_op.ll
new file mode 100644
index 0000000..b3ec538
--- /dev/null
+++ b/test/CodeGen/X86/fp_constant_op.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s
+; Test that the load of the constant is folded into the operation.
+
+
+define double @foo_add(double %P) {
+ %tmp.1 = fadd double %P, 1.230000e+02 ; <double> [#uses=1]
+ ret double %tmp.1
+}
+; CHECK: foo_add:
+; CHECK: fadd DWORD PTR
+
+define double @foo_mul(double %P) {
+ %tmp.1 = fmul double %P, 1.230000e+02 ; <double> [#uses=1]
+ ret double %tmp.1
+}
+; CHECK: foo_mul:
+; CHECK: fmul DWORD PTR
+
+define double @foo_sub(double %P) {
+ %tmp.1 = fsub double %P, 1.230000e+02 ; <double> [#uses=1]
+ ret double %tmp.1
+}
+; CHECK: foo_sub:
+; CHECK: fadd DWORD PTR
+
+define double @foo_subr(double %P) {
+ %tmp.1 = fsub double 1.230000e+02, %P ; <double> [#uses=1]
+ ret double %tmp.1
+}
+; CHECK: foo_subr:
+; CHECK: fsub QWORD PTR
+
+define double @foo_div(double %P) {
+ %tmp.1 = fdiv double %P, 1.230000e+02 ; <double> [#uses=1]
+ ret double %tmp.1
+}
+; CHECK: foo_div:
+; CHECK: fdiv DWORD PTR
+
+define double @foo_divr(double %P) {
+ %tmp.1 = fdiv double 1.230000e+02, %P ; <double> [#uses=1]
+ ret double %tmp.1
+}
+; CHECK: foo_divr:
+; CHECK: fdiv QWORD PTR
+
diff --git a/test/CodeGen/X86/fp_load_cast_fold.ll b/test/CodeGen/X86/fp_load_cast_fold.ll
new file mode 100644
index 0000000..a160ac6
--- /dev/null
+++ b/test/CodeGen/X86/fp_load_cast_fold.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 | grep fild | not grep ESP
+
+define double @short(i16* %P) {
+ %V = load i16* %P ; <i16> [#uses=1]
+ %V2 = sitofp i16 %V to double ; <double> [#uses=1]
+ ret double %V2
+}
+
+define double @int(i32* %P) {
+ %V = load i32* %P ; <i32> [#uses=1]
+ %V2 = sitofp i32 %V to double ; <double> [#uses=1]
+ ret double %V2
+}
+
+define double @long(i64* %P) {
+ %V = load i64* %P ; <i64> [#uses=1]
+ %V2 = sitofp i64 %V to double ; <double> [#uses=1]
+ ret double %V2
+}
+
diff --git a/test/CodeGen/X86/fp_load_fold.ll b/test/CodeGen/X86/fp_load_fold.ll
new file mode 100644
index 0000000..0145069
--- /dev/null
+++ b/test/CodeGen/X86/fp_load_fold.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep -i ST | not grep {fadd\\|fsub\\|fdiv\\|fmul}
+
+; Test that the load of the memory location is folded into the operation.
+
+define double @test_add(double %X, double* %P) {
+ %Y = load double* %P ; <double> [#uses=1]
+ %R = fadd double %X, %Y ; <double> [#uses=1]
+ ret double %R
+}
+
+define double @test_mul(double %X, double* %P) {
+ %Y = load double* %P ; <double> [#uses=1]
+ %R = fmul double %X, %Y ; <double> [#uses=1]
+ ret double %R
+}
+
+define double @test_sub(double %X, double* %P) {
+ %Y = load double* %P ; <double> [#uses=1]
+ %R = fsub double %X, %Y ; <double> [#uses=1]
+ ret double %R
+}
+
+define double @test_subr(double %X, double* %P) {
+ %Y = load double* %P ; <double> [#uses=1]
+ %R = fsub double %Y, %X ; <double> [#uses=1]
+ ret double %R
+}
+
+define double @test_div(double %X, double* %P) {
+ %Y = load double* %P ; <double> [#uses=1]
+ %R = fdiv double %X, %Y ; <double> [#uses=1]
+ ret double %R
+}
+
+define double @test_divr(double %X, double* %P) {
+ %Y = load double* %P ; <double> [#uses=1]
+ %R = fdiv double %Y, %X ; <double> [#uses=1]
+ ret double %R
+}
diff --git a/test/CodeGen/X86/fsxor-alignment.ll b/test/CodeGen/X86/fsxor-alignment.ll
new file mode 100644
index 0000000..6a8dbcf
--- /dev/null
+++ b/test/CodeGen/X86/fsxor-alignment.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-unsafe-fp-math | \
+; RUN: grep -v sp | grep xorps | count 2
+
+; Don't fold the incoming stack arguments into the xorps instructions used
+; to do floating-point negations, because the arguments aren't vectors
+; and aren't vector-aligned.
+
+define void @foo(float* %p, float* %q, float %s, float %y) {
+ %ss = fsub float -0.0, %s
+ %yy = fsub float -0.0, %y
+ store float %ss, float* %p
+ store float %yy, float* %q
+ ret void
+}
diff --git a/test/CodeGen/X86/full-lsr.ll b/test/CodeGen/X86/full-lsr.ll
new file mode 100644
index 0000000..3bd58b6
--- /dev/null
+++ b/test/CodeGen/X86/full-lsr.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -march=x86 >%t
+
+; TODO: Enhance full lsr mode to get this:
+; RUNX: grep {addl \\\$4,} %t | count 3
+; RUNX: not grep {,%} %t
+
+; For now, it should find this, which is still pretty good:
+; RUN: not grep {addl \\\$4,} %t
+; RUN: grep {,%} %t | count 6
+
+define void @foo(float* nocapture %A, float* nocapture %B, float* nocapture %C, i32 %N) nounwind {
+entry:
+ %0 = icmp sgt i32 %N, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %return
+
+bb: ; preds = %bb, %entry
+ %i.03 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=5]
+ %1 = getelementptr float* %A, i32 %i.03 ; <float*> [#uses=1]
+ %2 = load float* %1, align 4 ; <float> [#uses=1]
+ %3 = getelementptr float* %B, i32 %i.03 ; <float*> [#uses=1]
+ %4 = load float* %3, align 4 ; <float> [#uses=1]
+ %5 = fadd float %2, %4 ; <float> [#uses=1]
+ %6 = getelementptr float* %C, i32 %i.03 ; <float*> [#uses=1]
+ store float %5, float* %6, align 4
+ %7 = add i32 %i.03, 10 ; <i32> [#uses=3]
+ %8 = getelementptr float* %A, i32 %7 ; <float*> [#uses=1]
+ %9 = load float* %8, align 4 ; <float> [#uses=1]
+ %10 = getelementptr float* %B, i32 %7 ; <float*> [#uses=1]
+ %11 = load float* %10, align 4 ; <float> [#uses=1]
+ %12 = fadd float %9, %11 ; <float> [#uses=1]
+ %13 = getelementptr float* %C, i32 %7 ; <float*> [#uses=1]
+ store float %12, float* %13, align 4
+ %indvar.next = add i32 %i.03, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/ga-offset.ll b/test/CodeGen/X86/ga-offset.ll
new file mode 100644
index 0000000..9f6d3f7
--- /dev/null
+++ b/test/CodeGen/X86/ga-offset.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: not grep lea %t
+; RUN: not grep add %t
+; RUN: grep mov %t | count 1
+; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static > %t
+; RUN: not grep lea %t
+; RUN: not grep add %t
+; RUN: grep mov %t | count 1
+
+; This store should fold to a single mov instruction.
+
+@ptr = global i32* null
+@dst = global [131072 x i32] zeroinitializer
+
+define void @foo() nounwind {
+ store i32* getelementptr ([131072 x i32]* @dst, i32 0, i32 16), i32** @ptr
+ ret void
+}
diff --git a/test/CodeGen/X86/global-sections-tls.ll b/test/CodeGen/X86/global-sections-tls.ll
new file mode 100644
index 0000000..2c23030
--- /dev/null
+++ b/test/CodeGen/X86/global-sections-tls.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
+
+; PR4639
+@G1 = internal thread_local global i32 0 ; <i32*> [#uses=1]
+; LINUX: .section .tbss,"awT",@nobits
+; LINUX: G1:
+
+
+define i32* @foo() nounwind readnone {
+entry:
+ ret i32* @G1
+}
+
+
diff --git a/test/CodeGen/X86/global-sections.ll b/test/CodeGen/X86/global-sections.ll
new file mode 100644
index 0000000..1a7b577
--- /dev/null
+++ b/test/CodeGen/X86/global-sections.ll
@@ -0,0 +1,137 @@
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN
+
+
+; int G1;
+@G1 = common global i32 0
+
+; LINUX: .type G1,@object
+; LINUX: .comm G1,4,4
+
+; DARWIN: .comm _G1,4,2
+
+
+
+
+; const int G2 __attribute__((weak)) = 42;
+@G2 = weak_odr constant i32 42
+
+
+; TODO: linux drops this into .rodata, we drop it into ".gnu.linkonce.r.G2"
+
+; DARWIN: .section __TEXT,__const_coal,coalesced
+; DARWIN: _G2:
+; DARWIN: .long 42
+
+
+; int * const G3 = &G1;
+@G3 = constant i32* @G1
+
+; DARWIN: .section __DATA,__const
+; DARWIN: .globl _G3
+; DARWIN: _G3:
+; DARWIN: .long _G1
+
+
+; _Complex long long const G4 = 34;
+@G4 = constant {i64,i64} { i64 34, i64 0 }
+
+; DARWIN: .section __TEXT,__const
+; DARWIN: _G4:
+; DARWIN: .long 34
+
+
+; int G5 = 47;
+@G5 = global i32 47
+
+; LINUX: .data
+; LINUX: .globl G5
+; LINUX: G5:
+; LINUX: .long 47
+
+; DARWIN: .section __DATA,__data
+; DARWIN: .globl _G5
+; DARWIN: _G5:
+; DARWIN: .long 47
+
+
+; PR4584
+@"foo bar" = linkonce global i32 42
+
+; LINUX: .type foo_20_bar,@object
+; LINUX:.section .gnu.linkonce.d.foo_20_bar,"aw",@progbits
+; LINUX: .weak foo_20_bar
+; LINUX: foo_20_bar:
+
+; DARWIN: .section __DATA,__datacoal_nt,coalesced
+; DARWIN: .globl "_foo bar"
+; DARWIN: .weak_definition "_foo bar"
+; DARWIN: "_foo bar":
+
+; PR4650
+@G6 = weak_odr constant [1 x i8] c"\01"
+
+; LINUX: .type G6,@object
+; LINUX: .section .gnu.linkonce.r.G6,"a",@progbits
+; LINUX: .weak G6
+; LINUX: G6:
+; LINUX: .byte 1
+; LINUX: .size G6, 1
+
+; DARWIN: .section __TEXT,__const_coal,coalesced
+; DARWIN: .globl _G6
+; DARWIN: .weak_definition _G6
+; DARWIN:_G6:
+; DARWIN: .byte 1
+
+
+@G7 = constant [10 x i8] c"abcdefghi\00"
+
+; DARWIN: __TEXT,__cstring,cstring_literals
+; DARWIN: .globl _G7
+; DARWIN: _G7:
+; DARWIN: .asciz "abcdefghi"
+
+; LINUX: .section .rodata.str1.1,"aMS",@progbits,1
+; LINUX: .globl G7
+; LINUX: G7:
+; LINUX: .asciz "abcdefghi"
+
+
+@G8 = constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ]
+
+; DARWIN: .section __TEXT,__ustring
+; DARWIN: .globl _G8
+; DARWIN: _G8:
+
+; LINUX: .section .rodata.str2.2,"aMS",@progbits,2
+; LINUX: .globl G8
+; LINUX:G8:
+
+@G9 = constant [4 x i32] [ i32 1, i32 2, i32 3, i32 0 ]
+
+; DARWIN: .section __TEXT,__const
+; DARWIN: .globl _G9
+; DARWIN: _G9:
+
+; LINUX: .section .rodata.str4.4,"aMS",@progbits,4
+; LINUX: .globl G9
+; LINUX:G9
+
+
+@G10 = weak global [100 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=0]
+
+
+; DARWIN: .section __DATA,__datacoal_nt,coalesced
+; DARWIN: .globl _G10
+; DARWIN: .weak_definition _G10
+; DARWIN: .align 5
+; DARWIN: _G10:
+; DARWIN: .space 400
+
+; LINUX: .bss
+; LINUX: .weak G10
+; LINUX: .align 32
+; LINUX: G10:
+; LINUX: .zero 400
+
diff --git a/test/CodeGen/X86/h-register-addressing-32.ll b/test/CodeGen/X86/h-register-addressing-32.ll
new file mode 100644
index 0000000..76ffd665
--- /dev/null
+++ b/test/CodeGen/X86/h-register-addressing-32.ll
@@ -0,0 +1,53 @@
+; RUN: llc < %s -march=x86 | grep {movzbl %\[abcd\]h,} | count 7
+
+; Use h-register extract and zero-extend.
+
+define double @foo8(double* nocapture inreg %p, i32 inreg %x) nounwind readonly {
+ %t0 = lshr i32 %x, 8
+ %t1 = and i32 %t0, 255
+ %t2 = getelementptr double* %p, i32 %t1
+ %t3 = load double* %t2, align 8
+ ret double %t3
+}
+define float @foo4(float* nocapture inreg %p, i32 inreg %x) nounwind readonly {
+ %t0 = lshr i32 %x, 8
+ %t1 = and i32 %t0, 255
+ %t2 = getelementptr float* %p, i32 %t1
+ %t3 = load float* %t2, align 8
+ ret float %t3
+}
+define i16 @foo2(i16* nocapture inreg %p, i32 inreg %x) nounwind readonly {
+ %t0 = lshr i32 %x, 8
+ %t1 = and i32 %t0, 255
+ %t2 = getelementptr i16* %p, i32 %t1
+ %t3 = load i16* %t2, align 8
+ ret i16 %t3
+}
+define i8 @foo1(i8* nocapture inreg %p, i32 inreg %x) nounwind readonly {
+ %t0 = lshr i32 %x, 8
+ %t1 = and i32 %t0, 255
+ %t2 = getelementptr i8* %p, i32 %t1
+ %t3 = load i8* %t2, align 8
+ ret i8 %t3
+}
+define i8 @bar8(i8* nocapture inreg %p, i32 inreg %x) nounwind readonly {
+ %t0 = lshr i32 %x, 5
+ %t1 = and i32 %t0, 2040
+ %t2 = getelementptr i8* %p, i32 %t1
+ %t3 = load i8* %t2, align 8
+ ret i8 %t3
+}
+define i8 @bar4(i8* nocapture inreg %p, i32 inreg %x) nounwind readonly {
+ %t0 = lshr i32 %x, 6
+ %t1 = and i32 %t0, 1020
+ %t2 = getelementptr i8* %p, i32 %t1
+ %t3 = load i8* %t2, align 8
+ ret i8 %t3
+}
+define i8 @bar2(i8* nocapture inreg %p, i32 inreg %x) nounwind readonly {
+ %t0 = lshr i32 %x, 7
+ %t1 = and i32 %t0, 510
+ %t2 = getelementptr i8* %p, i32 %t1
+ %t3 = load i8* %t2, align 8
+ ret i8 %t3
+}
diff --git a/test/CodeGen/X86/h-register-addressing-64.ll b/test/CodeGen/X86/h-register-addressing-64.ll
new file mode 100644
index 0000000..98817f3
--- /dev/null
+++ b/test/CodeGen/X86/h-register-addressing-64.ll
@@ -0,0 +1,53 @@
+; RUN: llc < %s -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 7
+
+; Use h-register extract and zero-extend.
+
+define double @foo8(double* nocapture inreg %p, i64 inreg %x) nounwind readonly {
+ %t0 = lshr i64 %x, 8
+ %t1 = and i64 %t0, 255
+ %t2 = getelementptr double* %p, i64 %t1
+ %t3 = load double* %t2, align 8
+ ret double %t3
+}
+define float @foo4(float* nocapture inreg %p, i64 inreg %x) nounwind readonly {
+ %t0 = lshr i64 %x, 8
+ %t1 = and i64 %t0, 255
+ %t2 = getelementptr float* %p, i64 %t1
+ %t3 = load float* %t2, align 8
+ ret float %t3
+}
+define i16 @foo2(i16* nocapture inreg %p, i64 inreg %x) nounwind readonly {
+ %t0 = lshr i64 %x, 8
+ %t1 = and i64 %t0, 255
+ %t2 = getelementptr i16* %p, i64 %t1
+ %t3 = load i16* %t2, align 8
+ ret i16 %t3
+}
+define i8 @foo1(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
+ %t0 = lshr i64 %x, 8
+ %t1 = and i64 %t0, 255
+ %t2 = getelementptr i8* %p, i64 %t1
+ %t3 = load i8* %t2, align 8
+ ret i8 %t3
+}
+define i8 @bar8(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
+ %t0 = lshr i64 %x, 5
+ %t1 = and i64 %t0, 2040
+ %t2 = getelementptr i8* %p, i64 %t1
+ %t3 = load i8* %t2, align 8
+ ret i8 %t3
+}
+define i8 @bar4(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
+ %t0 = lshr i64 %x, 6
+ %t1 = and i64 %t0, 1020
+ %t2 = getelementptr i8* %p, i64 %t1
+ %t3 = load i8* %t2, align 8
+ ret i8 %t3
+}
+define i8 @bar2(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
+ %t0 = lshr i64 %x, 7
+ %t1 = and i64 %t0, 510
+ %t2 = getelementptr i8* %p, i64 %t1
+ %t3 = load i8* %t2, align 8
+ ret i8 %t3
+}
diff --git a/test/CodeGen/X86/h-register-store.ll b/test/CodeGen/X86/h-register-store.ll
new file mode 100644
index 0000000..d30e6b3
--- /dev/null
+++ b/test/CodeGen/X86/h-register-store.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep mov %t | count 6
+; RUN: grep {movb %ah, (%rsi)} %t | count 3
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep mov %t | count 3
+; RUN: grep {movb %ah, (%e} %t | count 3
+
+; Use h-register extract and store.
+
+define void @foo16(i16 inreg %p, i8* inreg %z) nounwind {
+ %q = lshr i16 %p, 8
+ %t = trunc i16 %q to i8
+ store i8 %t, i8* %z
+ ret void
+}
+define void @foo32(i32 inreg %p, i8* inreg %z) nounwind {
+ %q = lshr i32 %p, 8
+ %t = trunc i32 %q to i8
+ store i8 %t, i8* %z
+ ret void
+}
+define void @foo64(i64 inreg %p, i8* inreg %z) nounwind {
+ %q = lshr i64 %p, 8
+ %t = trunc i64 %q to i8
+ store i8 %t, i8* %z
+ ret void
+}
diff --git a/test/CodeGen/X86/h-registers-0.ll b/test/CodeGen/X86/h-registers-0.ll
new file mode 100644
index 0000000..878fd93
--- /dev/null
+++ b/test/CodeGen/X86/h-registers-0.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 4
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {incb %ah} %t | count 3
+; RUN: grep {movzbl %ah,} %t | count 3
+
+; Use h registers. On x86-64, codegen doesn't support general allocation
+; of h registers yet, due to x86 encoding complications.
+
+define void @bar64(i64 inreg %x, i8* inreg %p) nounwind {
+ %t0 = lshr i64 %x, 8
+ %t1 = trunc i64 %t0 to i8
+ %t2 = add i8 %t1, 1
+ store i8 %t2, i8* %p
+ ret void
+}
+
+define void @bar32(i32 inreg %x, i8* inreg %p) nounwind {
+ %t0 = lshr i32 %x, 8
+ %t1 = trunc i32 %t0 to i8
+ %t2 = add i8 %t1, 1
+ store i8 %t2, i8* %p
+ ret void
+}
+
+define void @bar16(i16 inreg %x, i8* inreg %p) nounwind {
+ %t0 = lshr i16 %x, 8
+ %t1 = trunc i16 %t0 to i8
+ %t2 = add i8 %t1, 1
+ store i8 %t2, i8* %p
+ ret void
+}
+
+define i64 @qux64(i64 inreg %x) nounwind {
+ %t0 = lshr i64 %x, 8
+ %t1 = and i64 %t0, 255
+ ret i64 %t1
+}
+
+define i32 @qux32(i32 inreg %x) nounwind {
+ %t0 = lshr i32 %x, 8
+ %t1 = and i32 %t0, 255
+ ret i32 %t1
+}
+
+define i16 @qux16(i16 inreg %x) nounwind {
+ %t0 = lshr i16 %x, 8
+ ret i16 %t0
+}
diff --git a/test/CodeGen/X86/h-registers-1.ll b/test/CodeGen/X86/h-registers-1.ll
new file mode 100644
index 0000000..e97ebab
--- /dev/null
+++ b/test/CodeGen/X86/h-registers-1.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep {movzbl %\[abcd\]h,} %t | count 8
+; RUN: grep {%\[abcd\]h} %t | not grep {%r\[\[:digit:\]\]*d}
+
+; LLVM creates virtual registers for values live across blocks
+; based on the type of the value. Make sure that the extracts
+; here use the GR64_NOREX register class for their result,
+; instead of plain GR64.
+
+define i64 @foo(i64 %a, i64 %b, i64 %c, i64 %d,
+ i64 %e, i64 %f, i64 %g, i64 %h) {
+ %sa = lshr i64 %a, 8
+ %A = and i64 %sa, 255
+ %sb = lshr i64 %b, 8
+ %B = and i64 %sb, 255
+ %sc = lshr i64 %c, 8
+ %C = and i64 %sc, 255
+ %sd = lshr i64 %d, 8
+ %D = and i64 %sd, 255
+ %se = lshr i64 %e, 8
+ %E = and i64 %se, 255
+ %sf = lshr i64 %f, 8
+ %F = and i64 %sf, 255
+ %sg = lshr i64 %g, 8
+ %G = and i64 %sg, 255
+ %sh = lshr i64 %h, 8
+ %H = and i64 %sh, 255
+ br label %next
+
+next:
+ %u = add i64 %A, %B
+ %v = add i64 %C, %D
+ %w = add i64 %E, %F
+ %x = add i64 %G, %H
+ %y = add i64 %u, %v
+ %z = add i64 %w, %x
+ %t = add i64 %y, %z
+ ret i64 %t
+}
diff --git a/test/CodeGen/X86/h-registers-2.ll b/test/CodeGen/X86/h-registers-2.ll
new file mode 100644
index 0000000..16e13f8
--- /dev/null
+++ b/test/CodeGen/X86/h-registers-2.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {movzbl %\[abcd\]h,} %t | count 1
+; RUN: grep {shll \$3,} %t | count 1
+
+; Use an h register, but don't omit the explicit shift for
+; non-address use(s).
+
+define i32 @foo(i8* %x, i32 %y) nounwind {
+ %t0 = lshr i32 %y, 8 ; <i32> [#uses=1]
+ %t1 = and i32 %t0, 255 ; <i32> [#uses=2]
+ %t2 = shl i32 %t1, 3
+ %t3 = getelementptr i8* %x, i32 %t2 ; <i8*> [#uses=1]
+ store i8 77, i8* %t3, align 4
+ ret i32 %t2
+}
diff --git a/test/CodeGen/X86/h-registers-3.ll b/test/CodeGen/X86/h-registers-3.ll
new file mode 100644
index 0000000..8a0b07b
--- /dev/null
+++ b/test/CodeGen/X86/h-registers-3.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 | grep mov | count 1
+; RUN: llc < %s -march=x86-64 | grep mov | count 1
+
+define zeroext i8 @foo() nounwind ssp {
+entry:
+ %0 = tail call zeroext i16 (...)* @bar() nounwind
+ %1 = lshr i16 %0, 8
+ %2 = trunc i16 %1 to i8
+ ret i8 %2
+}
+
+declare zeroext i16 @bar(...)
diff --git a/test/CodeGen/X86/hidden-vis-2.ll b/test/CodeGen/X86/hidden-vis-2.ll
new file mode 100644
index 0000000..74554d1
--- /dev/null
+++ b/test/CodeGen/X86/hidden-vis-2.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep mov | count 1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | not grep GOT
+
+@x = weak hidden global i32 0 ; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+ %0 = load i32* @x, align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/hidden-vis-3.ll b/test/CodeGen/X86/hidden-vis-3.ll
new file mode 100644
index 0000000..4be881e
--- /dev/null
+++ b/test/CodeGen/X86/hidden-vis-3.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64
+
+@x = external hidden global i32 ; <i32*> [#uses=1]
+@y = extern_weak hidden global i32 ; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+; X32: _t:
+; X32: movl _y, %eax
+
+; X64: _t:
+; X64: movl _y(%rip), %eax
+
+ %0 = load i32* @x, align 4 ; <i32> [#uses=1]
+ %1 = load i32* @y, align 4 ; <i32> [#uses=1]
+ %2 = add i32 %1, %0 ; <i32> [#uses=1]
+ ret i32 %2
+}
diff --git a/test/CodeGen/X86/hidden-vis-4.ll b/test/CodeGen/X86/hidden-vis-4.ll
new file mode 100644
index 0000000..a8aede5
--- /dev/null
+++ b/test/CodeGen/X86/hidden-vis-4.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s
+
+@x = common hidden global i32 0 ; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+; CHECK: t:
+; CHECK: movl _x, %eax
+; CHECK: .comm _x,4
+ %0 = load i32* @x, align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/hidden-vis-5.ll b/test/CodeGen/X86/hidden-vis-5.ll
new file mode 100644
index 0000000..88fae37
--- /dev/null
+++ b/test/CodeGen/X86/hidden-vis-5.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -relocation-model=pic -disable-fp-elim -unwind-tables | FileCheck %s
+; <rdar://problem/7383328>
+
[email protected] = private constant [12 x i8] c"hello world\00", align 1 ; <[12 x i8]*> [#uses=1]
+
+define hidden void @func() nounwind ssp {
+entry:
+ %0 = call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @.str, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i32 @puts(i8*)
+
+define hidden i32 @main() nounwind ssp {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @func() nounwind
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
+
+; CHECK: .private_extern _func.eh
+; CHECK: .private_extern _main.eh
diff --git a/test/CodeGen/X86/hidden-vis.ll b/test/CodeGen/X86/hidden-vis.ll
new file mode 100644
index 0000000..a948bdf
--- /dev/null
+++ b/test/CodeGen/X86/hidden-vis.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN
+
+@a = hidden global i32 0
+@b = external global i32
+
+define weak hidden void @t1() nounwind {
+; LINUX: .hidden t1
+; LINUX: t1:
+
+; DARWIN: .private_extern _t1
+; DARWIN: t1:
+ ret void
+}
+
+define weak void @t2() nounwind {
+; LINUX: t2:
+; LINUX: .hidden a
+
+; DARWIN: t2:
+; DARWIN: .private_extern _a
+ ret void
+}
+
diff --git a/test/CodeGen/X86/i128-and-beyond.ll b/test/CodeGen/X86/i128-and-beyond.ll
new file mode 100644
index 0000000..b741681
--- /dev/null
+++ b/test/CodeGen/X86/i128-and-beyond.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep -- -1 | count 14
+
+; These static initializers are too big to hand off to assemblers
+; as monolithic blobs.
+
+@x = global i128 -1
+@y = global i256 -1
+@z = global i512 -1
diff --git a/test/CodeGen/X86/i128-immediate.ll b/test/CodeGen/X86/i128-immediate.ll
new file mode 100644
index 0000000..c47569e
--- /dev/null
+++ b/test/CodeGen/X86/i128-immediate.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86-64 | grep movq | count 2
+
+define i128 @__addvti3() {
+ ret i128 -1
+}
diff --git a/test/CodeGen/X86/i128-mul.ll b/test/CodeGen/X86/i128-mul.ll
new file mode 100644
index 0000000..e9d30d6
--- /dev/null
+++ b/test/CodeGen/X86/i128-mul.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64
+; PR1198
+
+define i64 @foo(i64 %x, i64 %y) {
+ %tmp0 = zext i64 %x to i128
+ %tmp1 = zext i64 %y to i128
+ %tmp2 = mul i128 %tmp0, %tmp1
+ %tmp7 = zext i32 64 to i128
+ %tmp3 = lshr i128 %tmp2, %tmp7
+ %tmp4 = trunc i128 %tmp3 to i64
+ ret i64 %tmp4
+}
diff --git a/test/CodeGen/X86/i128-ret.ll b/test/CodeGen/X86/i128-ret.ll
new file mode 100644
index 0000000..277f428
--- /dev/null
+++ b/test/CodeGen/X86/i128-ret.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86-64 | grep {movq 8(%rdi), %rdx}
+; RUN: llc < %s -march=x86-64 | grep {movq (%rdi), %rax}
+
+define i128 @test(i128 *%P) {
+ %A = load i128* %P
+ ret i128 %A
+}
+
diff --git a/test/CodeGen/X86/i256-add.ll b/test/CodeGen/X86/i256-add.ll
new file mode 100644
index 0000000..5a7a7a7
--- /dev/null
+++ b/test/CodeGen/X86/i256-add.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep adcl %t | count 7
+; RUN: grep sbbl %t | count 7
+
+define void @add(i256* %p, i256* %q) nounwind {
+ %a = load i256* %p
+ %b = load i256* %q
+ %c = add i256 %a, %b
+ store i256 %c, i256* %p
+ ret void
+}
+define void @sub(i256* %p, i256* %q) nounwind {
+ %a = load i256* %p
+ %b = load i256* %q
+ %c = sub i256 %a, %b
+ store i256 %c, i256* %p
+ ret void
+}
diff --git a/test/CodeGen/X86/i2k.ll b/test/CodeGen/X86/i2k.ll
new file mode 100644
index 0000000..6116c2e
--- /dev/null
+++ b/test/CodeGen/X86/i2k.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86
+
+define void @foo(i2011* %x, i2011* %y, i2011* %p) nounwind {
+ %a = load i2011* %x
+ %b = load i2011* %y
+ %c = add i2011 %a, %b
+ store i2011 %c, i2011* %p
+ ret void
+}
diff --git a/test/CodeGen/X86/i64-mem-copy.ll b/test/CodeGen/X86/i64-mem-copy.ll
new file mode 100644
index 0000000..847e209
--- /dev/null
+++ b/test/CodeGen/X86/i64-mem-copy.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 | grep {movq.*(%rsi), %rax}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movsd.*(%eax),}
+
+; Uses movsd to load / store i64 values if sse2 is available.
+
+; rdar://6659858
+
+define void @foo(i64* %x, i64* %y) nounwind {
+entry:
+ %tmp1 = load i64* %y, align 8 ; <i64> [#uses=1]
+ store i64 %tmp1, i64* %x, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/iabs.ll b/test/CodeGen/X86/iabs.ll
new file mode 100644
index 0000000..6a79ee8
--- /dev/null
+++ b/test/CodeGen/X86/iabs.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86-64 -stats |& \
+; RUN: grep {6 .*Number of machine instrs printed}
+
+;; Integer absolute value, should produce something at least as good as:
+;; movl %edi, %eax
+;; sarl $31, %eax
+;; addl %eax, %edi
+;; xorl %eax, %edi
+;; movl %edi, %eax
+;; ret
+define i32 @test(i32 %a) nounwind {
+ %tmp1neg = sub i32 0, %a
+ %b = icmp sgt i32 %a, -1
+ %abs = select i1 %b, i32 %a, i32 %tmp1neg
+ ret i32 %abs
+}
+
diff --git a/test/CodeGen/X86/illegal-insert.ll b/test/CodeGen/X86/illegal-insert.ll
new file mode 100644
index 0000000..dbf1b14
--- /dev/null
+++ b/test/CodeGen/X86/illegal-insert.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86-64
+
+define <4 x double> @foo0(<4 x double> %t) {
+ %r = insertelement <4 x double> %t, double 2.3, i32 0
+ ret <4 x double> %r
+}
+define <4 x double> @foo1(<4 x double> %t) {
+ %r = insertelement <4 x double> %t, double 2.3, i32 1
+ ret <4 x double> %r
+}
+define <4 x double> @foo2(<4 x double> %t) {
+ %r = insertelement <4 x double> %t, double 2.3, i32 2
+ ret <4 x double> %r
+}
+define <4 x double> @foo3(<4 x double> %t) {
+ %r = insertelement <4 x double> %t, double 2.3, i32 3
+ ret <4 x double> %r
+}
diff --git a/test/CodeGen/X86/illegal-vector-args-return.ll b/test/CodeGen/X86/illegal-vector-args-return.ll
new file mode 100644
index 0000000..cecf77a
--- /dev/null
+++ b/test/CodeGen/X86/illegal-vector-args-return.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0}
+
+define <4 x double> @foo(<4 x double> %x, <4 x double> %z) {
+ %y = fmul <4 x double> %x, %z
+ ret <4 x double> %y
+}
+
+define <8 x float> @bar(<8 x float> %x, <8 x float> %z) {
+ %y = fadd <8 x float> %x, %z
+ ret <8 x float> %y
+}
diff --git a/test/CodeGen/X86/imp-def-copies.ll b/test/CodeGen/X86/imp-def-copies.ll
new file mode 100644
index 0000000..9117840
--- /dev/null
+++ b/test/CodeGen/X86/imp-def-copies.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86 | not grep mov
+
+ %struct.active_line = type { %struct.gs_fixed_point, %struct.gs_fixed_point, i32, i32, i32, %struct.line_segment*, i32, i16, i16, %struct.active_line*, %struct.active_line* }
+ %struct.gs_fixed_point = type { i32, i32 }
+ %struct.line_list = type { %struct.active_line*, i32, i16, %struct.active_line*, %struct.active_line*, %struct.active_line*, %struct.active_line, i32 }
+ %struct.line_segment = type { %struct.line_segment*, %struct.line_segment*, i32, %struct.gs_fixed_point }
+ %struct.subpath = type { %struct.line_segment*, %struct.line_segment*, i32, %struct.gs_fixed_point, %struct.line_segment*, i32, i32, i8 }
+
+define fastcc void @add_y_list(%struct.subpath* %ppath.0.4.val, i16 signext %tag, %struct.line_list* %ll, i32 %pbox.0.0.1.val, i32 %pbox.0.1.0.val, i32 %pbox.0.1.1.val) nounwind {
+entry:
+ br i1 false, label %return, label %bb
+bb: ; preds = %bb280, %entry
+ %psub.1.reg2mem.0 = phi %struct.subpath* [ %psub.0.reg2mem.0, %bb280 ], [ undef, %entry ] ; <%struct.subpath*> [#uses=1]
+ %plast.1.reg2mem.0 = phi %struct.line_segment* [ %plast.0.reg2mem.0, %bb280 ], [ undef, %entry ] ; <%struct.line_segment*> [#uses=1]
+ %prev_dir.0.reg2mem.0 = phi i32 [ %dir.0.reg2mem.0, %bb280 ], [ undef, %entry ] ; <i32> [#uses=1]
+ br i1 false, label %bb280, label %bb109
+bb109: ; preds = %bb
+ %tmp113 = icmp sgt i32 0, %prev_dir.0.reg2mem.0 ; <i1> [#uses=1]
+ br i1 %tmp113, label %bb116, label %bb280
+bb116: ; preds = %bb109
+ ret void
+bb280: ; preds = %bb109, %bb
+ %psub.0.reg2mem.0 = phi %struct.subpath* [ null, %bb ], [ %psub.1.reg2mem.0, %bb109 ] ; <%struct.subpath*> [#uses=1]
+ %plast.0.reg2mem.0 = phi %struct.line_segment* [ null, %bb ], [ %plast.1.reg2mem.0, %bb109 ] ; <%struct.line_segment*> [#uses=1]
+ %dir.0.reg2mem.0 = phi i32 [ 0, %bb ], [ 0, %bb109 ] ; <i32> [#uses=1]
+ br i1 false, label %return, label %bb
+return: ; preds = %bb280, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/imul-lea-2.ll b/test/CodeGen/X86/imul-lea-2.ll
new file mode 100644
index 0000000..1cb54b3
--- /dev/null
+++ b/test/CodeGen/X86/imul-lea-2.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 | grep lea | count 3
+; RUN: llc < %s -march=x86-64 | grep shl | count 1
+; RUN: llc < %s -march=x86-64 | not grep imul
+
+define i64 @t1(i64 %a) nounwind readnone {
+entry:
+ %0 = mul i64 %a, 81 ; <i64> [#uses=1]
+ ret i64 %0
+}
+
+define i64 @t2(i64 %a) nounwind readnone {
+entry:
+ %0 = mul i64 %a, 40 ; <i64> [#uses=1]
+ ret i64 %0
+}
diff --git a/test/CodeGen/X86/imul-lea.ll b/test/CodeGen/X86/imul-lea.ll
new file mode 100644
index 0000000..4e8e2af
--- /dev/null
+++ b/test/CodeGen/X86/imul-lea.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 | grep lea
+
+declare i32 @foo()
+
+define i32 @test() {
+ %tmp.0 = tail call i32 @foo( ) ; <i32> [#uses=1]
+ %tmp.1 = mul i32 %tmp.0, 9 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
diff --git a/test/CodeGen/X86/inline-asm-2addr.ll b/test/CodeGen/X86/inline-asm-2addr.ll
new file mode 100644
index 0000000..4a2c7fc
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-2addr.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86-64 | not grep movq
+
+define i64 @t(i64 %a, i64 %b) nounwind ssp {
+entry:
+ %asmtmp = tail call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i64 %a) nounwind ; <i64> [#uses=1]
+ %asmtmp1 = tail call i64 asm "rorq $1,$0", "=r,J,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i64 %b) nounwind ; <i64> [#uses=1]
+ %0 = add i64 %asmtmp1, %asmtmp ; <i64> [#uses=1]
+ ret i64 %0
+}
diff --git a/test/CodeGen/X86/inline-asm-R-constraint.ll b/test/CodeGen/X86/inline-asm-R-constraint.ll
new file mode 100644
index 0000000..66c27ac
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-R-constraint.ll
@@ -0,0 +1,18 @@
+; RUN: llc -march=x86-64 < %s | FileCheck %s
+; 7282062
+; ModuleID = '<stdin>'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+
+define void @udiv8(i8* %quotient, i16 zeroext %a, i8 zeroext %b, i8 zeroext %c, i8* %remainder) nounwind ssp {
+entry:
+; CHECK: udiv8:
+; CHECK-NOT: movb %ah, (%r8)
+ %a_addr = alloca i16, align 2 ; <i16*> [#uses=2]
+ %b_addr = alloca i8, align 1 ; <i8*> [#uses=2]
+ store i16 %a, i16* %a_addr
+ store i8 %b, i8* %b_addr
+ call void asm "\09\09movw\09$2, %ax\09\09\0A\09\09divb\09$3\09\09\09\0A\09\09movb\09%al, $0\09\0A\09\09movb %ah, ($4)", "=*m,=*m,*m,*m,R,~{dirflag},~{fpsr},~{flags},~{ax}"(i8* %quotient, i8* %remainder, i16* %a_addr, i8* %b_addr, i8* %remainder) nounwind
+ ret void
+; CHECK: ret
+}
diff --git a/test/CodeGen/X86/inline-asm-flag-clobber.ll b/test/CodeGen/X86/inline-asm-flag-clobber.ll
new file mode 100644
index 0000000..51ea843
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-flag-clobber.ll
@@ -0,0 +1,19 @@
+; RUN: llc -march=x86-64 < %s | FileCheck %s
+; PR3701
+
+define i64 @t(i64* %arg) nounwind {
+ br i1 true, label %1, label %5
+
+; <label>:1 ; preds = %0
+ %2 = icmp eq i64* null, %arg ; <i1> [#uses=1]
+ %3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%struct.thread*> [#uses=0]
+; CHECK: test
+; CHECK-NEXT: j
+ br i1 %2, label %4, label %5
+
+; <label>:4 ; preds = %1
+ ret i64 1
+
+; <label>:5 ; preds = %1
+ ret i64 0
+}
diff --git a/test/CodeGen/X86/inline-asm-fpstack.ll b/test/CodeGen/X86/inline-asm-fpstack.ll
new file mode 100644
index 0000000..09b0929
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-fpstack.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s -march=x86
+
+define x86_fp80 @test1() {
+ %tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"()
+ ret x86_fp80 %tmp85
+}
+
+define double @test2() {
+ %tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
+ ret double %tmp85
+}
+
+define void @test3(x86_fp80 %X) {
+ call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X)
+ ret void
+}
+
+define void @test4(double %X) {
+ call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %X)
+ ret void
+}
+
+define void @test5(double %X) {
+ %Y = fadd double %X, 123.0
+ call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %Y)
+ ret void
+}
+
+define void @test6(double %A, double %B, double %C,
+ double %D, double %E) nounwind {
+entry:
+ ; Uses the same value twice, should have one fstp after the asm.
+ tail call void asm sideeffect "foo $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %A, double %A ) nounwind
+ ; Uses two different values, should be in st(0)/st(1) and both be popped.
+ tail call void asm sideeffect "bar $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %B, double %C ) nounwind
+ ; Uses two different values, one of which isn't killed in this asm, it
+ ; should not be popped after the asm.
+ tail call void asm sideeffect "baz $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %D, double %E ) nounwind
+ ; This is the last use of %D, so it should be popped after.
+ tail call void asm sideeffect "baz $0", "f,~{dirflag},~{fpsr},~{flags}"( double %D ) nounwind
+ ret void
+}
+
diff --git a/test/CodeGen/X86/inline-asm-fpstack2.ll b/test/CodeGen/X86/inline-asm-fpstack2.ll
new file mode 100644
index 0000000..ffa6ee6
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-fpstack2.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {fld %%st(0)} %t
+; PR4185
+
+define void @test() {
+return:
+ call void asm sideeffect "fistpl $0", "{st}"(double 1.000000e+06)
+ call void asm sideeffect "fistpl $0", "{st}"(double 1.000000e+06)
+ ret void
+}
diff --git a/test/CodeGen/X86/inline-asm-fpstack3.ll b/test/CodeGen/X86/inline-asm-fpstack3.ll
new file mode 100644
index 0000000..17945fe
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-fpstack3.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {fld %%st(0)} %t
+; PR4459
+
+declare x86_fp80 @ceil(x86_fp80)
+
+declare void @test(x86_fp80)
+
+define void @test2(x86_fp80 %a) {
+entry:
+ %0 = call x86_fp80 @ceil(x86_fp80 %a)
+ call void asm sideeffect "fistpl $0", "{st}"( x86_fp80 %0)
+ call void @test(x86_fp80 %0 )
+ ret void
+}
diff --git a/test/CodeGen/X86/inline-asm-fpstack4.ll b/test/CodeGen/X86/inline-asm-fpstack4.ll
new file mode 100644
index 0000000..bae2970
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-fpstack4.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86
+; PR4484
+
+declare x86_fp80 @ceil()
+
+declare void @test(x86_fp80)
+
+define void @test2(x86_fp80 %a) {
+entry:
+ %0 = call x86_fp80 @ceil()
+ call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a)
+ call void @test(x86_fp80 %0)
+ ret void
+}
+
diff --git a/test/CodeGen/X86/inline-asm-fpstack5.ll b/test/CodeGen/X86/inline-asm-fpstack5.ll
new file mode 100644
index 0000000..8b219cf
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-fpstack5.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86
+; PR4485
+
+define void @test(x86_fp80* %a) {
+entry:
+ %0 = load x86_fp80* %a, align 16
+ %1 = fmul x86_fp80 %0, 0xK4006B400000000000000
+ %2 = fmul x86_fp80 %1, 0xK4012F424000000000000
+ tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2)
+ %3 = load x86_fp80* %a, align 16
+ %4 = fmul x86_fp80 %3, 0xK4006B400000000000000
+ %5 = fmul x86_fp80 %4, 0xK4012F424000000000000
+ tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5)
+ ret void
+}
diff --git a/test/CodeGen/X86/inline-asm-modifier-n.ll b/test/CodeGen/X86/inline-asm-modifier-n.ll
new file mode 100644
index 0000000..5e76b6c
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-modifier-n.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | grep { 37}
+; rdar://7008959
+
+define void @bork() nounwind {
+entry:
+ tail call void asm sideeffect "BORK ${0:n}", "i,~{dirflag},~{fpsr},~{flags}"(i32 -37) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/inline-asm-mrv.ll b/test/CodeGen/X86/inline-asm-mrv.ll
new file mode 100644
index 0000000..78d7e77
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-mrv.ll
@@ -0,0 +1,35 @@
+; PR2094
+; RUN: llc < %s -march=x86-64 | grep movslq
+; RUN: llc < %s -march=x86-64 | grep addps
+; RUN: llc < %s -march=x86-64 | grep paddd
+; RUN: llc < %s -march=x86-64 | not grep movq
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+
+define i32 @test1(i8* %v, i8* %blk2, i8* %blk1, i32 %stride, i32 %h) nounwind {
+ %tmp12 = sext i32 %stride to i64 ; <i64> [#uses=1]
+ %mrv = call {i32, i8*, i8*} asm sideeffect "$0 $1 $2 $3 $4 $5 $6",
+ "=r,=r,=r,r,r,r,r"( i64 %tmp12, i32 %h, i8* %blk1, i8* %blk2 ) nounwind
+ %tmp6 = getresult {i32, i8*, i8*} %mrv, 0
+ %tmp7 = call i32 asm sideeffect "set $0",
+ "=r,~{dirflag},~{fpsr},~{flags}"( ) nounwind
+ ret i32 %tmp7
+}
+
+define <4 x float> @test2() nounwind {
+ %mrv = call {<4 x float>, <4 x float>} asm "set $0, $1", "=x,=x"()
+ %a = getresult {<4 x float>, <4 x float>} %mrv, 0
+ %b = getresult {<4 x float>, <4 x float>} %mrv, 1
+ %c = fadd <4 x float> %a, %b
+ ret <4 x float> %c
+}
+
+define <4 x i32> @test3() nounwind {
+ %mrv = call {<4 x i32>, <4 x i32>} asm "set $0, $1", "=x,=x"()
+ %a = getresult {<4 x i32>, <4 x i32>} %mrv, 0
+ %b = getresult {<4 x i32>, <4 x i32>} %mrv, 1
+ %c = add <4 x i32> %a, %b
+ ret <4 x i32> %c
+}
+
diff --git a/test/CodeGen/X86/inline-asm-out-regs.ll b/test/CodeGen/X86/inline-asm-out-regs.ll
new file mode 100644
index 0000000..46966f5
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-out-regs.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu
+; PR3391
+
+@pci_indirect = external global { } ; <{ }*> [#uses=1]
+@pcibios_last_bus = external global i32 ; <i32*> [#uses=2]
+
+define void @pci_pcbios_init() nounwind section ".init.text" {
+entry:
+ br label %bb1.i
+
+bb1.i: ; preds = %bb6.i.i, %bb1.i, %entry
+ %0 = load i32* null, align 8 ; <i32> [#uses=1]
+ %1 = icmp ugt i32 %0, 1048575 ; <i1> [#uses=1]
+ br i1 %1, label %bb2.i, label %bb1.i
+
+bb2.i: ; preds = %bb1.i
+ %asmtmp.i.i = tail call { i32, i32, i32, i32 } asm "lcall *(%edi); cld\0A\09jc 1f\0A\09xor %ah, %ah\0A1:", "={dx},={ax},={bx},={cx},1,{di},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 45313, { }* @pci_indirect) nounwind ; <{ i32, i32, i32, i32 }> [#uses=2]
+ %asmresult2.i.i = extractvalue { i32, i32, i32, i32 } %asmtmp.i.i, 1
+ ; <i32> [#uses=1]
+ %2 = lshr i32 %asmresult2.i.i, 8 ; <i32> [#uses=1]
+ %3 = trunc i32 %2 to i8 ; <i8> [#uses=1]
+ %4 = load i32* @pcibios_last_bus, align 4 ; <i32> [#uses=1]
+ %5 = icmp slt i32 %4, 0 ; <i1> [#uses=1]
+ br i1 %5, label %bb5.i.i, label %bb6.i.i
+
+bb5.i.i: ; preds = %bb2.i
+ %asmresult4.i.i = extractvalue { i32, i32, i32, i32 } %asmtmp.i.i, 3
+ ; <i32> [#uses=1]
+ %6 = and i32 %asmresult4.i.i, 255 ; <i32> [#uses=1]
+ store i32 %6, i32* @pcibios_last_bus, align 4
+ br label %bb6.i.i
+
+bb6.i.i: ; preds = %bb5.i.i, %bb2.i
+ %7 = icmp eq i8 %3, 0 ; <i1> [#uses=1]
+ %or.cond.i.i = and i1 %7, false ; <i1> [#uses=1]
+ br i1 %or.cond.i.i, label %bb1.i, label %bb8.i.i
+
+bb8.i.i: ; preds = %bb6.i.i
+ unreachable
+}
diff --git a/test/CodeGen/X86/inline-asm-pic.ll b/test/CodeGen/X86/inline-asm-pic.ll
new file mode 100644
index 0000000..0b5ff08
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-pic.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | grep lea
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | grep call
+
+@main_q = internal global i8* null ; <i8**> [#uses=1]
+
+define void @func2() nounwind {
+entry:
+ tail call void asm "mov $1,%gs:$0", "=*m,ri,~{dirflag},~{fpsr},~{flags}"(i8** inttoptr (i32 152 to i8**), i8* bitcast (i8** @main_q to i8*)) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/inline-asm-q-regs.ll b/test/CodeGen/X86/inline-asm-q-regs.ll
new file mode 100644
index 0000000..ab44206
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-q-regs.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64
+; rdar://7066579
+
+ type { i64, i64, i64, i64, i64 } ; type %0
+
+define void @t() nounwind {
+entry:
+ %asmtmp = call %0 asm sideeffect "mov %cr0, $0 \0Amov %cr2, $1 \0Amov %cr3, $2 \0Amov %cr4, $3 \0Amov %cr8, $0 \0A", "=q,=q,=q,=q,=q,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%0> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/inline-asm-tied.ll b/test/CodeGen/X86/inline-asm-tied.ll
new file mode 100644
index 0000000..1f4a13f
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-tied.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 | grep {movl %edx, 12(%esp)} | count 2
+; rdar://6992609
+
+target triple = "i386-apple-darwin9.0"
[email protected] = appending global [1 x i8*] [i8* bitcast (i64 (i64)* @_OSSwapInt64 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i64 @_OSSwapInt64(i64 %_data) nounwind {
+entry:
+ %retval = alloca i64 ; <i64*> [#uses=2]
+ %_data.addr = alloca i64 ; <i64*> [#uses=4]
+ store i64 %_data, i64* %_data.addr
+ %tmp = load i64* %_data.addr ; <i64> [#uses=1]
+ %0 = call i64 asm "bswap %eax\0A\09bswap %edx\0A\09xchgl %eax, %edx", "=A,0,~{dirflag},~{fpsr},~{flags}"(i64 %tmp) nounwind ; <i64> [#uses=1]
+ store i64 %0, i64* %_data.addr
+ %tmp1 = load i64* %_data.addr ; <i64> [#uses=1]
+ store i64 %tmp1, i64* %retval
+ %1 = load i64* %retval ; <i64> [#uses=1]
+ ret i64 %1
+}
diff --git a/test/CodeGen/X86/inline-asm-x-scalar.ll b/test/CodeGen/X86/inline-asm-x-scalar.ll
new file mode 100644
index 0000000..5a9628b
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-x-scalar.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah
+
+define void @test1() {
+ tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000)
+ ret void
+}
+
+define void @test2() {
+ %tmp53 = tail call i32 asm "ucomiss $1, $3\0Acmovae $2, $0 ", "=r,mx,mr,x,0,~{dirflag},~{fpsr},~{flags},~{cc}"( float 0x41E0000000000000, i32 2147483647, float 0.000000e+00, i32 0 ) ; <i32> [#uses
+ unreachable
+}
+
+define void @test3() {
+ tail call void asm sideeffect "ucomiss $0, $1", "mx,x,~{dirflag},~{fpsr},~{flags},~{cc}"( float 0x41E0000000000000, i32 65536 )
+ ret void
+}
+
+define void @test4() {
+ %tmp1 = tail call float asm "", "=x,0,~{dirflag},~{fpsr},~{flags}"( float 0x47EFFFFFE0000000 ); <float> [#uses=1]
+ %tmp4 = fsub float %tmp1, 0x3810000000000000 ; <float> [#uses=1]
+ tail call void asm sideeffect "", "x,~{dirflag},~{fpsr},~{flags}"( float %tmp4 )
+ ret void
+}
+
diff --git a/test/CodeGen/X86/inline-asm.ll b/test/CodeGen/X86/inline-asm.ll
new file mode 100644
index 0000000..c66d7a8
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86
+
+define i32 @test1() nounwind {
+ ; Dest is AX, dest type = i32.
+ %tmp4 = call i32 asm sideeffect "FROB $0", "={ax}"()
+ ret i32 %tmp4
+}
+
+define void @test2(i32 %V) nounwind {
+ ; input is AX, in type = i32.
+ call void asm sideeffect "FROB $0", "{ax}"(i32 %V)
+ ret void
+}
+
+define void @test3() nounwind {
+ ; FP constant as a memory operand.
+ tail call void asm sideeffect "frob $0", "m"( float 0x41E0000000000000)
+ ret void
+}
+
+define void @test4() nounwind {
+ ; J means a constant in range 0 to 63.
+ tail call void asm sideeffect "bork $0", "J"(i32 37) nounwind
+ ret void
+}
diff --git a/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/test/CodeGen/X86/ins_subreg_coalesce-1.ll
new file mode 100644
index 0000000..2243f93
--- /dev/null
+++ b/test/CodeGen/X86/ins_subreg_coalesce-1.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 | grep mov | count 3
+
+define fastcc i32 @sqlite3ExprResolveNames() nounwind {
+entry:
+ br i1 false, label %UnifiedReturnBlock, label %bb4
+bb4: ; preds = %entry
+ br i1 false, label %bb17, label %bb22
+bb17: ; preds = %bb4
+ ret i32 1
+bb22: ; preds = %bb4
+ br i1 true, label %walkExprTree.exit, label %bb4.i
+bb4.i: ; preds = %bb22
+ ret i32 0
+walkExprTree.exit: ; preds = %bb22
+ %tmp83 = load i16* null, align 4 ; <i16> [#uses=1]
+ %tmp84 = or i16 %tmp83, 2 ; <i16> [#uses=2]
+ store i16 %tmp84, i16* null, align 4
+ %tmp98993 = zext i16 %tmp84 to i32 ; <i32> [#uses=1]
+ %tmp1004 = lshr i32 %tmp98993, 3 ; <i32> [#uses=1]
+ %tmp100.lobit5 = and i32 %tmp1004, 1 ; <i32> [#uses=1]
+ ret i32 %tmp100.lobit5
+UnifiedReturnBlock: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/ins_subreg_coalesce-2.ll b/test/CodeGen/X86/ins_subreg_coalesce-2.ll
new file mode 100644
index 0000000..f2c9cc7
--- /dev/null
+++ b/test/CodeGen/X86/ins_subreg_coalesce-2.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86-64 | not grep movw
+
+define i16 @test5(i16 %f12) nounwind {
+ %f11 = shl i16 %f12, 2 ; <i16> [#uses=1]
+ %tmp7.25 = ashr i16 %f11, 8 ; <i16> [#uses=1]
+ ret i16 %tmp7.25
+}
diff --git a/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/test/CodeGen/X86/ins_subreg_coalesce-3.ll
new file mode 100644
index 0000000..627edc5
--- /dev/null
+++ b/test/CodeGen/X86/ins_subreg_coalesce-3.ll
@@ -0,0 +1,93 @@
+; RUN: llc < %s -march=x86-64 | grep mov | count 5
+
+ %struct.COMPOSITE = type { i8, i16, i16 }
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.FILE_POS = type { i8, i8, i16, i32 }
+ %struct.FIRST_UNION = type { %struct.FILE_POS }
+ %struct.FONT_INFO = type { %struct.metrics*, i8*, i16*, %struct.COMPOSITE*, i32, %struct.rec*, %struct.rec*, i16, i16, i16*, i8*, i8*, i16* }
+ %struct.FOURTH_UNION = type { %struct.STYLE }
+ %struct.GAP = type { i8, i8, i16 }
+ %struct.LIST = type { %struct.rec*, %struct.rec* }
+ %struct.SECOND_UNION = type { { i16, i8, i8 } }
+ %struct.STYLE = type { { %struct.GAP }, { %struct.GAP }, i16, i16, i32 }
+ %struct.THIRD_UNION = type { %struct.FILE*, [8 x i8] }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, { %struct.rec* }, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+ %struct.metrics = type { i16, i16, i16, i16, i16 }
+ %struct.rec = type { %struct.head_type }
+
+define void @FontChange(i1 %foo) nounwind {
+entry:
+ br i1 %foo, label %bb298, label %bb49
+bb49: ; preds = %entry
+ ret void
+bb298: ; preds = %entry
+ br i1 %foo, label %bb304, label %bb366
+bb304: ; preds = %bb298
+ br i1 %foo, label %bb330, label %bb428
+bb330: ; preds = %bb366, %bb304
+ br label %bb366
+bb366: ; preds = %bb330, %bb298
+ br i1 %foo, label %bb330, label %bb428
+bb428: ; preds = %bb366, %bb304
+ br i1 %foo, label %bb650, label %bb433
+bb433: ; preds = %bb428
+ ret void
+bb650: ; preds = %bb650, %bb428
+ %tmp658 = load i8* null, align 8 ; <i8> [#uses=1]
+ %tmp659 = icmp eq i8 %tmp658, 0 ; <i1> [#uses=1]
+ br i1 %tmp659, label %bb650, label %bb662
+bb662: ; preds = %bb650
+ %tmp685 = icmp eq %struct.rec* null, null ; <i1> [#uses=1]
+ br i1 %tmp685, label %bb761, label %bb688
+bb688: ; preds = %bb662
+ ret void
+bb761: ; preds = %bb662
+ %tmp487248736542 = load i32* null, align 4 ; <i32> [#uses=2]
+ %tmp487648776541 = and i32 %tmp487248736542, 57344 ; <i32> [#uses=1]
+ %tmp4881 = icmp eq i32 %tmp487648776541, 8192 ; <i1> [#uses=1]
+ br i1 %tmp4881, label %bb4884, label %bb4897
+bb4884: ; preds = %bb761
+ %tmp488948906540 = and i32 %tmp487248736542, 7168 ; <i32> [#uses=1]
+ %tmp4894 = icmp eq i32 %tmp488948906540, 1024 ; <i1> [#uses=1]
+ br i1 %tmp4894, label %bb4932, label %bb4897
+bb4897: ; preds = %bb4884, %bb761
+ ret void
+bb4932: ; preds = %bb4884
+ %tmp4933 = load i32* null, align 4 ; <i32> [#uses=1]
+ br i1 %foo, label %bb5054, label %bb4940
+bb4940: ; preds = %bb4932
+ %tmp4943 = load i32* null, align 4 ; <i32> [#uses=2]
+ switch i32 %tmp4933, label %bb5054 [
+ i32 159, label %bb4970
+ i32 160, label %bb5002
+ ]
+bb4970: ; preds = %bb4940
+ %tmp49746536 = trunc i32 %tmp4943 to i16 ; <i16> [#uses=1]
+ %tmp49764977 = and i16 %tmp49746536, 4095 ; <i16> [#uses=1]
+ %mask498049814982 = zext i16 %tmp49764977 to i64 ; <i64> [#uses=1]
+ %tmp4984 = getelementptr %struct.FONT_INFO* null, i64 %mask498049814982, i32 5 ; <%struct.rec**> [#uses=1]
+ %tmp4985 = load %struct.rec** %tmp4984, align 8 ; <%struct.rec*> [#uses=1]
+ %tmp4988 = getelementptr %struct.rec* %tmp4985, i64 0, i32 0, i32 3 ; <%struct.THIRD_UNION*> [#uses=1]
+ %tmp4991 = bitcast %struct.THIRD_UNION* %tmp4988 to i32* ; <i32*> [#uses=1]
+ %tmp4992 = load i32* %tmp4991, align 8 ; <i32> [#uses=1]
+ %tmp49924993 = trunc i32 %tmp4992 to i16 ; <i16> [#uses=1]
+ %tmp4996 = add i16 %tmp49924993, 0 ; <i16> [#uses=1]
+ br label %bb5054
+bb5002: ; preds = %bb4940
+ %tmp50066537 = trunc i32 %tmp4943 to i16 ; <i16> [#uses=1]
+ %tmp50085009 = and i16 %tmp50066537, 4095 ; <i16> [#uses=1]
+ %mask501250135014 = zext i16 %tmp50085009 to i64 ; <i64> [#uses=1]
+ %tmp5016 = getelementptr %struct.FONT_INFO* null, i64 %mask501250135014, i32 5 ; <%struct.rec**> [#uses=1]
+ %tmp5017 = load %struct.rec** %tmp5016, align 8 ; <%struct.rec*> [#uses=1]
+ %tmp5020 = getelementptr %struct.rec* %tmp5017, i64 0, i32 0, i32 3 ; <%struct.THIRD_UNION*> [#uses=1]
+ %tmp5023 = bitcast %struct.THIRD_UNION* %tmp5020 to i32* ; <i32*> [#uses=1]
+ %tmp5024 = load i32* %tmp5023, align 8 ; <i32> [#uses=1]
+ %tmp50245025 = trunc i32 %tmp5024 to i16 ; <i16> [#uses=1]
+ %tmp5028 = sub i16 %tmp50245025, 0 ; <i16> [#uses=1]
+ br label %bb5054
+bb5054: ; preds = %bb5002, %bb4970, %bb4940, %bb4932
+ %flen.0.reg2mem.0 = phi i16 [ %tmp4996, %bb4970 ], [ %tmp5028, %bb5002 ], [ 0, %bb4932 ], [ undef, %bb4940 ] ; <i16> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/insertelement-copytoregs.ll b/test/CodeGen/X86/insertelement-copytoregs.ll
new file mode 100644
index 0000000..34a29ca
--- /dev/null
+++ b/test/CodeGen/X86/insertelement-copytoregs.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86-64 | grep -v IMPLICIT_DEF
+
+define void @foo(<2 x float>* %p) {
+ %t = insertelement <2 x float> undef, float 0.0, i32 0
+ %v = insertelement <2 x float> %t, float 0.0, i32 1
+ br label %bb8
+
+bb8:
+ store <2 x float> %v, <2 x float>* %p
+ ret void
+}
diff --git a/test/CodeGen/X86/insertelement-legalize.ll b/test/CodeGen/X86/insertelement-legalize.ll
new file mode 100644
index 0000000..18aade2
--- /dev/null
+++ b/test/CodeGen/X86/insertelement-legalize.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -disable-mmx
+
+; Test to check that we properly legalize an insert vector element
+define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind {
+entry:
+ %tmp4 = insertelement <2 x i64> %val, i64 %x, i32 0 ; <<2 x i64>> [#uses=1]
+ %add = add <2 x i64> %tmp4, %val ; <<2 x i64>> [#uses=1]
+ store <2 x i64> %add, <2 x i64>* %dst
+ ret void
+}
diff --git a/test/CodeGen/X86/invalid-shift-immediate.ll b/test/CodeGen/X86/invalid-shift-immediate.ll
new file mode 100644
index 0000000..77a9f7e
--- /dev/null
+++ b/test/CodeGen/X86/invalid-shift-immediate.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86
+; PR2098
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @foo(i32 %x) {
+entry:
+ %x_addr = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %x, i32* %x_addr
+ %tmp = load i32* %x_addr, align 4 ; <i32> [#uses=1]
+ %tmp1 = ashr i32 %tmp, -2 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 1 ; <i32> [#uses=1]
+ %tmp23 = trunc i32 %tmp2 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb5
+
+bb: ; preds = %entry
+ %tmp4 = call i32 (...)* @bar( ) nounwind ; <i32> [#uses=0]
+ br label %bb5
+
+bb5: ; preds = %bb, %entry
+ br label %return
+
+return: ; preds = %bb5
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/X86/isel-sink.ll b/test/CodeGen/X86/isel-sink.ll
new file mode 100644
index 0000000..0f94b23
--- /dev/null
+++ b/test/CodeGen/X86/isel-sink.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 | not grep lea
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 | \
+; RUN: grep {movl \$4, (.*,.*,4)}
+
+define i32 @test(i32* %X, i32 %B) {
+ ; This gep should be sunk out of this block into the load/store users.
+ %P = getelementptr i32* %X, i32 %B
+ %G = icmp ult i32 %B, 1234
+ br i1 %G, label %T, label %F
+T:
+ store i32 4, i32* %P
+ ret i32 141
+F:
+ %V = load i32* %P
+ ret i32 %V
+}
+
+
diff --git a/test/CodeGen/X86/isel-sink2.ll b/test/CodeGen/X86/isel-sink2.ll
new file mode 100644
index 0000000..5ed0e00
--- /dev/null
+++ b/test/CodeGen/X86/isel-sink2.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {movb.7(%...)} %t
+; RUN: not grep leal %t
+
+define i8 @test(i32 *%P) nounwind {
+ %Q = getelementptr i32* %P, i32 1
+ %R = bitcast i32* %Q to i8*
+ %S = load i8* %R
+ %T = icmp eq i8 %S, 0
+ br i1 %T, label %TB, label %F
+TB:
+ ret i8 4
+F:
+ %U = getelementptr i8* %R, i32 3
+ %V = load i8* %U
+ ret i8 %V
+}
diff --git a/test/CodeGen/X86/isel-sink3.ll b/test/CodeGen/X86/isel-sink3.ll
new file mode 100644
index 0000000..8d3d97a
--- /dev/null
+++ b/test/CodeGen/X86/isel-sink3.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s | grep {addl.\$4, %ecx}
+; RUN: llc < %s | not grep leal
+; this should not sink %1 into bb1, that would increase reg pressure.
+
+; rdar://6399178
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i32 @bar(i32** %P) nounwind {
+entry:
+ %0 = load i32** %P, align 4 ; <i32*> [#uses=2]
+ %1 = getelementptr i32* %0, i32 1 ; <i32*> [#uses=1]
+ %2 = icmp ugt i32* %1, inttoptr (i64 1233 to i32*) ; <i1> [#uses=1]
+ br i1 %2, label %bb1, label %bb
+
+bb: ; preds = %entry
+ store i32* inttoptr (i64 123 to i32*), i32** %P, align 4
+ br label %bb1
+
+bb1: ; preds = %entry, %bb
+ %3 = getelementptr i32* %1, i32 1 ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 4 ; <i32> [#uses=1]
+ ret i32 %4
+}
diff --git a/test/CodeGen/X86/isint.ll b/test/CodeGen/X86/isint.ll
new file mode 100644
index 0000000..507a328
--- /dev/null
+++ b/test/CodeGen/X86/isint.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
+; RUN: not grep cmp %t
+; RUN: not grep xor %t
+; RUN: grep jne %t | count 1
+; RUN: grep jp %t | count 1
+; RUN: grep setnp %t | count 1
+; RUN: grep sete %t | count 1
+; RUN: grep and %t | count 1
+; RUN: grep cvt %t | count 4
+
+define i32 @isint_return(double %d) nounwind {
+ %i = fptosi double %d to i32
+ %e = sitofp i32 %i to double
+ %c = fcmp oeq double %d, %e
+ %z = zext i1 %c to i32
+ ret i32 %z
+}
+
+declare void @foo()
+
+define void @isint_branch(double %d) nounwind {
+ %i = fptosi double %d to i32
+ %e = sitofp i32 %i to double
+ %c = fcmp oeq double %d, %e
+ br i1 %c, label %true, label %false
+true:
+ call void @foo()
+ ret void
+false:
+ ret void
+}
diff --git a/test/CodeGen/X86/isnan.ll b/test/CodeGen/X86/isnan.ll
new file mode 100644
index 0000000..4d465c0
--- /dev/null
+++ b/test/CodeGen/X86/isnan.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | not grep call
+
+declare i1 @llvm.isunordered.f64(double)
+
+define i1 @test_isnan(double %X) {
+ %R = fcmp uno double %X, %X ; <i1> [#uses=1]
+ ret i1 %R
+}
+
diff --git a/test/CodeGen/X86/isnan2.ll b/test/CodeGen/X86/isnan2.ll
new file mode 100644
index 0000000..7753346
--- /dev/null
+++ b/test/CodeGen/X86/isnan2.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep pxor
+
+; This should not need to materialize 0.0 to evaluate the condition.
+
+define i32 @test(double %X) nounwind {
+entry:
+ %tmp6 = fcmp uno double %X, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp67 = zext i1 %tmp6 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp67
+}
+
diff --git a/test/CodeGen/X86/ispositive.ll b/test/CodeGen/X86/ispositive.ll
new file mode 100644
index 0000000..8adf723
--- /dev/null
+++ b/test/CodeGen/X86/ispositive.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | grep {shrl.*31}
+
+define i32 @test1(i32 %X) {
+entry:
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
+
diff --git a/test/CodeGen/X86/iv-users-in-other-loops.ll b/test/CodeGen/X86/iv-users-in-other-loops.ll
new file mode 100644
index 0000000..c695c29
--- /dev/null
+++ b/test/CodeGen/X86/iv-users-in-other-loops.ll
@@ -0,0 +1,296 @@
+; RUN: llc < %s -march=x86-64 -o %t
+; RUN: grep inc %t | count 1
+; RUN: grep dec %t | count 2
+; RUN: grep addq %t | count 13
+; RUN: not grep addb %t
+; RUN: grep leaq %t | count 9
+; RUN: grep leal %t | count 3
+; RUN: grep movq %t | count 5
+
+; IV users in each of the loops from other loops shouldn't cause LSR
+; to insert new induction variables. Previously it would create a
+; flood of new induction variables.
+; Also, the loop reversal should kick in once.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @foo(float* %A, i32 %IA, float* %B, i32 %IB, float* nocapture %C, i32 %N) nounwind {
+entry:
+ %0 = xor i32 %IA, 1 ; <i32> [#uses=1]
+ %1 = xor i32 %IB, 1 ; <i32> [#uses=1]
+ %2 = or i32 %1, %0 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb2, label %bb13
+
+bb: ; preds = %bb3
+ %4 = load float* %A_addr.0, align 4 ; <float> [#uses=1]
+ %5 = load float* %B_addr.0, align 4 ; <float> [#uses=1]
+ %6 = fmul float %4, %5 ; <float> [#uses=1]
+ %7 = fadd float %6, %Sum0.0 ; <float> [#uses=1]
+ %indvar.next154 = add i64 %B_addr.0.rec, 1 ; <i64> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %entry, %bb
+ %B_addr.0.rec = phi i64 [ %indvar.next154, %bb ], [ 0, %entry ] ; <i64> [#uses=14]
+ %Sum0.0 = phi float [ %7, %bb ], [ 0.000000e+00, %entry ] ; <float> [#uses=5]
+ %indvar146 = trunc i64 %B_addr.0.rec to i32 ; <i32> [#uses=1]
+ %N_addr.0 = sub i32 %N, %indvar146 ; <i32> [#uses=6]
+ %A_addr.0 = getelementptr float* %A, i64 %B_addr.0.rec ; <float*> [#uses=4]
+ %B_addr.0 = getelementptr float* %B, i64 %B_addr.0.rec ; <float*> [#uses=4]
+ %8 = icmp sgt i32 %N_addr.0, 0 ; <i1> [#uses=1]
+ br i1 %8, label %bb3, label %bb4
+
+bb3: ; preds = %bb2
+ %9 = ptrtoint float* %A_addr.0 to i64 ; <i64> [#uses=1]
+ %10 = and i64 %9, 15 ; <i64> [#uses=1]
+ %11 = icmp eq i64 %10, 0 ; <i1> [#uses=1]
+ br i1 %11, label %bb4, label %bb
+
+bb4: ; preds = %bb3, %bb2
+ %12 = ptrtoint float* %B_addr.0 to i64 ; <i64> [#uses=1]
+ %13 = and i64 %12, 15 ; <i64> [#uses=1]
+ %14 = icmp eq i64 %13, 0 ; <i1> [#uses=1]
+ %15 = icmp sgt i32 %N_addr.0, 15 ; <i1> [#uses=2]
+ br i1 %14, label %bb6.preheader, label %bb10.preheader
+
+bb10.preheader: ; preds = %bb4
+ br i1 %15, label %bb9, label %bb12.loopexit
+
+bb6.preheader: ; preds = %bb4
+ br i1 %15, label %bb5, label %bb8.loopexit
+
+bb5: ; preds = %bb5, %bb6.preheader
+ %indvar143 = phi i64 [ 0, %bb6.preheader ], [ %indvar.next144, %bb5 ] ; <i64> [#uses=3]
+ %vSum0.072 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %21, %bb5 ] ; <<4 x float>> [#uses=1]
+ %vSum1.070 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %29, %bb5 ] ; <<4 x float>> [#uses=1]
+ %vSum2.069 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %37, %bb5 ] ; <<4 x float>> [#uses=1]
+ %vSum3.067 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %45, %bb5 ] ; <<4 x float>> [#uses=1]
+ %indvar145 = trunc i64 %indvar143 to i32 ; <i32> [#uses=1]
+ %tmp150 = mul i32 %indvar145, -16 ; <i32> [#uses=1]
+ %N_addr.268 = add i32 %tmp150, %N_addr.0 ; <i32> [#uses=1]
+ %A_addr.273.rec = shl i64 %indvar143, 4 ; <i64> [#uses=5]
+ %B_addr.0.sum180 = add i64 %B_addr.0.rec, %A_addr.273.rec ; <i64> [#uses=2]
+ %B_addr.271 = getelementptr float* %B, i64 %B_addr.0.sum180 ; <float*> [#uses=1]
+ %A_addr.273 = getelementptr float* %A, i64 %B_addr.0.sum180 ; <float*> [#uses=1]
+ tail call void asm sideeffect ";# foo", "~{dirflag},~{fpsr},~{flags}"() nounwind
+ %16 = bitcast float* %A_addr.273 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %17 = load <4 x float>* %16, align 16 ; <<4 x float>> [#uses=1]
+ %18 = bitcast float* %B_addr.271 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %19 = load <4 x float>* %18, align 16 ; <<4 x float>> [#uses=1]
+ %20 = fmul <4 x float> %17, %19 ; <<4 x float>> [#uses=1]
+ %21 = fadd <4 x float> %20, %vSum0.072 ; <<4 x float>> [#uses=2]
+ %A_addr.273.sum163 = or i64 %A_addr.273.rec, 4 ; <i64> [#uses=1]
+ %A_addr.0.sum175 = add i64 %B_addr.0.rec, %A_addr.273.sum163 ; <i64> [#uses=2]
+ %22 = getelementptr float* %A, i64 %A_addr.0.sum175 ; <float*> [#uses=1]
+ %23 = bitcast float* %22 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %24 = load <4 x float>* %23, align 16 ; <<4 x float>> [#uses=1]
+ %25 = getelementptr float* %B, i64 %A_addr.0.sum175 ; <float*> [#uses=1]
+ %26 = bitcast float* %25 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %27 = load <4 x float>* %26, align 16 ; <<4 x float>> [#uses=1]
+ %28 = fmul <4 x float> %24, %27 ; <<4 x float>> [#uses=1]
+ %29 = fadd <4 x float> %28, %vSum1.070 ; <<4 x float>> [#uses=2]
+ %A_addr.273.sum161 = or i64 %A_addr.273.rec, 8 ; <i64> [#uses=1]
+ %A_addr.0.sum174 = add i64 %B_addr.0.rec, %A_addr.273.sum161 ; <i64> [#uses=2]
+ %30 = getelementptr float* %A, i64 %A_addr.0.sum174 ; <float*> [#uses=1]
+ %31 = bitcast float* %30 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %32 = load <4 x float>* %31, align 16 ; <<4 x float>> [#uses=1]
+ %33 = getelementptr float* %B, i64 %A_addr.0.sum174 ; <float*> [#uses=1]
+ %34 = bitcast float* %33 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %35 = load <4 x float>* %34, align 16 ; <<4 x float>> [#uses=1]
+ %36 = fmul <4 x float> %32, %35 ; <<4 x float>> [#uses=1]
+ %37 = fadd <4 x float> %36, %vSum2.069 ; <<4 x float>> [#uses=2]
+ %A_addr.273.sum159 = or i64 %A_addr.273.rec, 12 ; <i64> [#uses=1]
+ %A_addr.0.sum173 = add i64 %B_addr.0.rec, %A_addr.273.sum159 ; <i64> [#uses=2]
+ %38 = getelementptr float* %A, i64 %A_addr.0.sum173 ; <float*> [#uses=1]
+ %39 = bitcast float* %38 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %40 = load <4 x float>* %39, align 16 ; <<4 x float>> [#uses=1]
+ %41 = getelementptr float* %B, i64 %A_addr.0.sum173 ; <float*> [#uses=1]
+ %42 = bitcast float* %41 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %43 = load <4 x float>* %42, align 16 ; <<4 x float>> [#uses=1]
+ %44 = fmul <4 x float> %40, %43 ; <<4 x float>> [#uses=1]
+ %45 = fadd <4 x float> %44, %vSum3.067 ; <<4 x float>> [#uses=2]
+ %.rec83 = add i64 %A_addr.273.rec, 16 ; <i64> [#uses=1]
+ %A_addr.0.sum172 = add i64 %B_addr.0.rec, %.rec83 ; <i64> [#uses=2]
+ %46 = getelementptr float* %A, i64 %A_addr.0.sum172 ; <float*> [#uses=1]
+ %47 = getelementptr float* %B, i64 %A_addr.0.sum172 ; <float*> [#uses=1]
+ %48 = add i32 %N_addr.268, -16 ; <i32> [#uses=2]
+ %49 = icmp sgt i32 %48, 15 ; <i1> [#uses=1]
+ %indvar.next144 = add i64 %indvar143, 1 ; <i64> [#uses=1]
+ br i1 %49, label %bb5, label %bb8.loopexit
+
+bb7: ; preds = %bb7, %bb8.loopexit
+ %indvar130 = phi i64 [ 0, %bb8.loopexit ], [ %indvar.next131, %bb7 ] ; <i64> [#uses=3]
+ %vSum0.260 = phi <4 x float> [ %vSum0.0.lcssa, %bb8.loopexit ], [ %55, %bb7 ] ; <<4 x float>> [#uses=1]
+ %indvar132 = trunc i64 %indvar130 to i32 ; <i32> [#uses=1]
+ %tmp133 = mul i32 %indvar132, -4 ; <i32> [#uses=1]
+ %N_addr.358 = add i32 %tmp133, %N_addr.2.lcssa ; <i32> [#uses=1]
+ %A_addr.361.rec = shl i64 %indvar130, 2 ; <i64> [#uses=3]
+ %B_addr.359 = getelementptr float* %B_addr.2.lcssa, i64 %A_addr.361.rec ; <float*> [#uses=1]
+ %A_addr.361 = getelementptr float* %A_addr.2.lcssa, i64 %A_addr.361.rec ; <float*> [#uses=1]
+ %50 = bitcast float* %A_addr.361 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %51 = load <4 x float>* %50, align 16 ; <<4 x float>> [#uses=1]
+ %52 = bitcast float* %B_addr.359 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %53 = load <4 x float>* %52, align 16 ; <<4 x float>> [#uses=1]
+ %54 = fmul <4 x float> %51, %53 ; <<4 x float>> [#uses=1]
+ %55 = fadd <4 x float> %54, %vSum0.260 ; <<4 x float>> [#uses=2]
+ %.rec85 = add i64 %A_addr.361.rec, 4 ; <i64> [#uses=2]
+ %56 = getelementptr float* %A_addr.2.lcssa, i64 %.rec85 ; <float*> [#uses=1]
+ %57 = getelementptr float* %B_addr.2.lcssa, i64 %.rec85 ; <float*> [#uses=1]
+ %58 = add i32 %N_addr.358, -4 ; <i32> [#uses=2]
+ %59 = icmp sgt i32 %58, 3 ; <i1> [#uses=1]
+ %indvar.next131 = add i64 %indvar130, 1 ; <i64> [#uses=1]
+ br i1 %59, label %bb7, label %bb13
+
+bb8.loopexit: ; preds = %bb5, %bb6.preheader
+ %A_addr.2.lcssa = phi float* [ %A_addr.0, %bb6.preheader ], [ %46, %bb5 ] ; <float*> [#uses=3]
+ %vSum0.0.lcssa = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %21, %bb5 ] ; <<4 x float>> [#uses=2]
+ %B_addr.2.lcssa = phi float* [ %B_addr.0, %bb6.preheader ], [ %47, %bb5 ] ; <float*> [#uses=3]
+ %vSum1.0.lcssa = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %29, %bb5 ] ; <<4 x float>> [#uses=2]
+ %vSum2.0.lcssa = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %37, %bb5 ] ; <<4 x float>> [#uses=2]
+ %N_addr.2.lcssa = phi i32 [ %N_addr.0, %bb6.preheader ], [ %48, %bb5 ] ; <i32> [#uses=3]
+ %vSum3.0.lcssa = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %45, %bb5 ] ; <<4 x float>> [#uses=2]
+ %60 = icmp sgt i32 %N_addr.2.lcssa, 3 ; <i1> [#uses=1]
+ br i1 %60, label %bb7, label %bb13
+
+bb9: ; preds = %bb9, %bb10.preheader
+ %indvar106 = phi i64 [ 0, %bb10.preheader ], [ %indvar.next107, %bb9 ] ; <i64> [#uses=3]
+ %vSum0.339 = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %75, %bb9 ] ; <<4 x float>> [#uses=1]
+ %vSum1.237 = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %80, %bb9 ] ; <<4 x float>> [#uses=1]
+ %vSum2.236 = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %85, %bb9 ] ; <<4 x float>> [#uses=1]
+ %vSum3.234 = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %90, %bb9 ] ; <<4 x float>> [#uses=1]
+ %indvar108 = trunc i64 %indvar106 to i32 ; <i32> [#uses=1]
+ %tmp113 = mul i32 %indvar108, -16 ; <i32> [#uses=1]
+ %N_addr.435 = add i32 %tmp113, %N_addr.0 ; <i32> [#uses=1]
+ %A_addr.440.rec = shl i64 %indvar106, 4 ; <i64> [#uses=5]
+ %B_addr.0.sum = add i64 %B_addr.0.rec, %A_addr.440.rec ; <i64> [#uses=2]
+ %B_addr.438 = getelementptr float* %B, i64 %B_addr.0.sum ; <float*> [#uses=1]
+ %A_addr.440 = getelementptr float* %A, i64 %B_addr.0.sum ; <float*> [#uses=1]
+ %61 = bitcast float* %B_addr.438 to <4 x float>* ; <i8*> [#uses=1]
+ %62 = load <4 x float>* %61, align 1
+ %B_addr.438.sum169 = or i64 %A_addr.440.rec, 4 ; <i64> [#uses=1]
+ %B_addr.0.sum187 = add i64 %B_addr.0.rec, %B_addr.438.sum169 ; <i64> [#uses=2]
+ %63 = getelementptr float* %B, i64 %B_addr.0.sum187 ; <float*> [#uses=1]
+ %64 = bitcast float* %63 to <4 x float>* ; <i8*> [#uses=1]
+ %65 = load <4 x float>* %64, align 1
+ %B_addr.438.sum168 = or i64 %A_addr.440.rec, 8 ; <i64> [#uses=1]
+ %B_addr.0.sum186 = add i64 %B_addr.0.rec, %B_addr.438.sum168 ; <i64> [#uses=2]
+ %66 = getelementptr float* %B, i64 %B_addr.0.sum186 ; <float*> [#uses=1]
+ %67 = bitcast float* %66 to <4 x float>* ; <i8*> [#uses=1]
+ %68 = load <4 x float>* %67, align 1
+ %B_addr.438.sum167 = or i64 %A_addr.440.rec, 12 ; <i64> [#uses=1]
+ %B_addr.0.sum185 = add i64 %B_addr.0.rec, %B_addr.438.sum167 ; <i64> [#uses=2]
+ %69 = getelementptr float* %B, i64 %B_addr.0.sum185 ; <float*> [#uses=1]
+ %70 = bitcast float* %69 to <4 x float>* ; <i8*> [#uses=1]
+ %71 = load <4 x float>* %70, align 1
+ %72 = bitcast float* %A_addr.440 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %73 = load <4 x float>* %72, align 16 ; <<4 x float>> [#uses=1]
+ %74 = fmul <4 x float> %73, %62 ; <<4 x float>> [#uses=1]
+ %75 = fadd <4 x float> %74, %vSum0.339 ; <<4 x float>> [#uses=2]
+ %76 = getelementptr float* %A, i64 %B_addr.0.sum187 ; <float*> [#uses=1]
+ %77 = bitcast float* %76 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %78 = load <4 x float>* %77, align 16 ; <<4 x float>> [#uses=1]
+ %79 = fmul <4 x float> %78, %65 ; <<4 x float>> [#uses=1]
+ %80 = fadd <4 x float> %79, %vSum1.237 ; <<4 x float>> [#uses=2]
+ %81 = getelementptr float* %A, i64 %B_addr.0.sum186 ; <float*> [#uses=1]
+ %82 = bitcast float* %81 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %83 = load <4 x float>* %82, align 16 ; <<4 x float>> [#uses=1]
+ %84 = fmul <4 x float> %83, %68 ; <<4 x float>> [#uses=1]
+ %85 = fadd <4 x float> %84, %vSum2.236 ; <<4 x float>> [#uses=2]
+ %86 = getelementptr float* %A, i64 %B_addr.0.sum185 ; <float*> [#uses=1]
+ %87 = bitcast float* %86 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %88 = load <4 x float>* %87, align 16 ; <<4 x float>> [#uses=1]
+ %89 = fmul <4 x float> %88, %71 ; <<4 x float>> [#uses=1]
+ %90 = fadd <4 x float> %89, %vSum3.234 ; <<4 x float>> [#uses=2]
+ %.rec89 = add i64 %A_addr.440.rec, 16 ; <i64> [#uses=1]
+ %A_addr.0.sum170 = add i64 %B_addr.0.rec, %.rec89 ; <i64> [#uses=2]
+ %91 = getelementptr float* %A, i64 %A_addr.0.sum170 ; <float*> [#uses=1]
+ %92 = getelementptr float* %B, i64 %A_addr.0.sum170 ; <float*> [#uses=1]
+ %93 = add i32 %N_addr.435, -16 ; <i32> [#uses=2]
+ %94 = icmp sgt i32 %93, 15 ; <i1> [#uses=1]
+ %indvar.next107 = add i64 %indvar106, 1 ; <i64> [#uses=1]
+ br i1 %94, label %bb9, label %bb12.loopexit
+
+bb11: ; preds = %bb11, %bb12.loopexit
+ %indvar = phi i64 [ 0, %bb12.loopexit ], [ %indvar.next, %bb11 ] ; <i64> [#uses=3]
+ %vSum0.428 = phi <4 x float> [ %vSum0.3.lcssa, %bb12.loopexit ], [ %100, %bb11 ] ; <<4 x float>> [#uses=1]
+ %indvar96 = trunc i64 %indvar to i32 ; <i32> [#uses=1]
+ %tmp = mul i32 %indvar96, -4 ; <i32> [#uses=1]
+ %N_addr.526 = add i32 %tmp, %N_addr.4.lcssa ; <i32> [#uses=1]
+ %A_addr.529.rec = shl i64 %indvar, 2 ; <i64> [#uses=3]
+ %B_addr.527 = getelementptr float* %B_addr.4.lcssa, i64 %A_addr.529.rec ; <float*> [#uses=1]
+ %A_addr.529 = getelementptr float* %A_addr.4.lcssa, i64 %A_addr.529.rec ; <float*> [#uses=1]
+ %95 = bitcast float* %B_addr.527 to <4 x float>* ; <i8*> [#uses=1]
+ %96 = load <4 x float>* %95, align 1
+ %97 = bitcast float* %A_addr.529 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %98 = load <4 x float>* %97, align 16 ; <<4 x float>> [#uses=1]
+ %99 = fmul <4 x float> %98, %96 ; <<4 x float>> [#uses=1]
+ %100 = fadd <4 x float> %99, %vSum0.428 ; <<4 x float>> [#uses=2]
+ %.rec91 = add i64 %A_addr.529.rec, 4 ; <i64> [#uses=2]
+ %101 = getelementptr float* %A_addr.4.lcssa, i64 %.rec91 ; <float*> [#uses=1]
+ %102 = getelementptr float* %B_addr.4.lcssa, i64 %.rec91 ; <float*> [#uses=1]
+ %103 = add i32 %N_addr.526, -4 ; <i32> [#uses=2]
+ %104 = icmp sgt i32 %103, 3 ; <i1> [#uses=1]
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
+ br i1 %104, label %bb11, label %bb13
+
+bb12.loopexit: ; preds = %bb9, %bb10.preheader
+ %A_addr.4.lcssa = phi float* [ %A_addr.0, %bb10.preheader ], [ %91, %bb9 ] ; <float*> [#uses=3]
+ %vSum0.3.lcssa = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %75, %bb9 ] ; <<4 x float>> [#uses=2]
+ %B_addr.4.lcssa = phi float* [ %B_addr.0, %bb10.preheader ], [ %92, %bb9 ] ; <float*> [#uses=3]
+ %vSum1.2.lcssa = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %80, %bb9 ] ; <<4 x float>> [#uses=2]
+ %vSum2.2.lcssa = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %85, %bb9 ] ; <<4 x float>> [#uses=2]
+ %N_addr.4.lcssa = phi i32 [ %N_addr.0, %bb10.preheader ], [ %93, %bb9 ] ; <i32> [#uses=3]
+ %vSum3.2.lcssa = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %90, %bb9 ] ; <<4 x float>> [#uses=2]
+ %105 = icmp sgt i32 %N_addr.4.lcssa, 3 ; <i1> [#uses=1]
+ br i1 %105, label %bb11, label %bb13
+
+bb13: ; preds = %bb12.loopexit, %bb11, %bb8.loopexit, %bb7, %entry
+ %Sum0.1 = phi float [ 0.000000e+00, %entry ], [ %Sum0.0, %bb7 ], [ %Sum0.0, %bb8.loopexit ], [ %Sum0.0, %bb11 ], [ %Sum0.0, %bb12.loopexit ] ; <float> [#uses=1]
+ %vSum3.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum3.0.lcssa, %bb7 ], [ %vSum3.0.lcssa, %bb8.loopexit ], [ %vSum3.2.lcssa, %bb11 ], [ %vSum3.2.lcssa, %bb12.loopexit ] ; <<4 x float>> [#uses=1]
+ %N_addr.1 = phi i32 [ %N, %entry ], [ %N_addr.2.lcssa, %bb8.loopexit ], [ %58, %bb7 ], [ %N_addr.4.lcssa, %bb12.loopexit ], [ %103, %bb11 ] ; <i32> [#uses=2]
+ %vSum2.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum2.0.lcssa, %bb7 ], [ %vSum2.0.lcssa, %bb8.loopexit ], [ %vSum2.2.lcssa, %bb11 ], [ %vSum2.2.lcssa, %bb12.loopexit ] ; <<4 x float>> [#uses=1]
+ %vSum1.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum1.0.lcssa, %bb7 ], [ %vSum1.0.lcssa, %bb8.loopexit ], [ %vSum1.2.lcssa, %bb11 ], [ %vSum1.2.lcssa, %bb12.loopexit ] ; <<4 x float>> [#uses=1]
+ %B_addr.1 = phi float* [ %B, %entry ], [ %B_addr.2.lcssa, %bb8.loopexit ], [ %57, %bb7 ], [ %B_addr.4.lcssa, %bb12.loopexit ], [ %102, %bb11 ] ; <float*> [#uses=1]
+ %vSum0.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum0.0.lcssa, %bb8.loopexit ], [ %55, %bb7 ], [ %vSum0.3.lcssa, %bb12.loopexit ], [ %100, %bb11 ] ; <<4 x float>> [#uses=1]
+ %A_addr.1 = phi float* [ %A, %entry ], [ %A_addr.2.lcssa, %bb8.loopexit ], [ %56, %bb7 ], [ %A_addr.4.lcssa, %bb12.loopexit ], [ %101, %bb11 ] ; <float*> [#uses=1]
+ %106 = fadd <4 x float> %vSum0.1, %vSum2.1 ; <<4 x float>> [#uses=1]
+ %107 = fadd <4 x float> %vSum1.1, %vSum3.1 ; <<4 x float>> [#uses=1]
+ %108 = fadd <4 x float> %106, %107 ; <<4 x float>> [#uses=4]
+ %tmp23 = extractelement <4 x float> %108, i32 0 ; <float> [#uses=1]
+ %tmp21 = extractelement <4 x float> %108, i32 1 ; <float> [#uses=1]
+ %109 = fadd float %tmp23, %tmp21 ; <float> [#uses=1]
+ %tmp19 = extractelement <4 x float> %108, i32 2 ; <float> [#uses=1]
+ %tmp17 = extractelement <4 x float> %108, i32 3 ; <float> [#uses=1]
+ %110 = fadd float %tmp19, %tmp17 ; <float> [#uses=1]
+ %111 = fadd float %109, %110 ; <float> [#uses=1]
+ %Sum0.254 = fadd float %111, %Sum0.1 ; <float> [#uses=2]
+ %112 = icmp sgt i32 %N_addr.1, 0 ; <i1> [#uses=1]
+ br i1 %112, label %bb.nph56, label %bb16
+
+bb.nph56: ; preds = %bb13
+ %tmp. = zext i32 %N_addr.1 to i64 ; <i64> [#uses=1]
+ br label %bb14
+
+bb14: ; preds = %bb14, %bb.nph56
+ %indvar117 = phi i64 [ 0, %bb.nph56 ], [ %indvar.next118, %bb14 ] ; <i64> [#uses=3]
+ %Sum0.255 = phi float [ %Sum0.254, %bb.nph56 ], [ %Sum0.2, %bb14 ] ; <float> [#uses=1]
+ %tmp.122 = sext i32 %IB to i64 ; <i64> [#uses=1]
+ %B_addr.652.rec = mul i64 %indvar117, %tmp.122 ; <i64> [#uses=1]
+ %tmp.124 = sext i32 %IA to i64 ; <i64> [#uses=1]
+ %A_addr.653.rec = mul i64 %indvar117, %tmp.124 ; <i64> [#uses=1]
+ %B_addr.652 = getelementptr float* %B_addr.1, i64 %B_addr.652.rec ; <float*> [#uses=1]
+ %A_addr.653 = getelementptr float* %A_addr.1, i64 %A_addr.653.rec ; <float*> [#uses=1]
+ %113 = load float* %A_addr.653, align 4 ; <float> [#uses=1]
+ %114 = load float* %B_addr.652, align 4 ; <float> [#uses=1]
+ %115 = fmul float %113, %114 ; <float> [#uses=1]
+ %Sum0.2 = fadd float %115, %Sum0.255 ; <float> [#uses=2]
+ %indvar.next118 = add i64 %indvar117, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next118, %tmp. ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb16, label %bb14
+
+bb16: ; preds = %bb14, %bb13
+ %Sum0.2.lcssa = phi float [ %Sum0.254, %bb13 ], [ %Sum0.2, %bb14 ] ; <float> [#uses=1]
+ store float %Sum0.2.lcssa, float* %C, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/jump_sign.ll b/test/CodeGen/X86/jump_sign.ll
new file mode 100644
index 0000000..5e8e162
--- /dev/null
+++ b/test/CodeGen/X86/jump_sign.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 | grep jns
+
+define i32 @f(i32 %X) {
+entry:
+ %tmp1 = add i32 %X, 1 ; <i32> [#uses=1]
+ %tmp = icmp slt i32 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ %tmp2 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp3 = tail call i32 (...)* @baz( ) ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
diff --git a/test/CodeGen/X86/large-gep-scale.ll b/test/CodeGen/X86/large-gep-scale.ll
new file mode 100644
index 0000000..143294e
--- /dev/null
+++ b/test/CodeGen/X86/large-gep-scale.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 | FileCheck %s
+; PR5281
+
+; After scaling, this type doesn't fit in memory. Codegen should generate
+; correct addressing still.
+
+; CHECK: shll $2, %edx
+
+define fastcc i32* @_ada_smkr([2147483647 x i32]* %u, i32 %t) nounwind {
+ %x = getelementptr [2147483647 x i32]* %u, i32 %t, i32 0
+ ret i32* %x
+}
diff --git a/test/CodeGen/X86/ldzero.ll b/test/CodeGen/X86/ldzero.ll
new file mode 100644
index 0000000..dab04bc
--- /dev/null
+++ b/test/CodeGen/X86/ldzero.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s
+; verify PR 1700 is still fixed
+; ModuleID = 'hh.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+define x86_fp80 @x() {
+entry:
+ %retval = alloca x86_fp80, align 16 ; <x86_fp80*> [#uses=2]
+ %tmp = alloca x86_fp80, align 16 ; <x86_fp80*> [#uses=2]
+ %d = alloca double, align 8 ; <double*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store double 0.000000e+00, double* %d, align 8
+ %tmp1 = load double* %d, align 8 ; <double> [#uses=1]
+ %tmp12 = fpext double %tmp1 to x86_fp80 ; <x86_fp80> [#uses=1]
+ store x86_fp80 %tmp12, x86_fp80* %tmp, align 16
+ %tmp3 = load x86_fp80* %tmp, align 16 ; <x86_fp80> [#uses=1]
+ store x86_fp80 %tmp3, x86_fp80* %retval, align 16
+ br label %return
+
+return: ; preds = %entry
+ %retval4 = load x86_fp80* %retval ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %retval4
+}
+
+define double @y() {
+entry:
+ %retval = alloca double, align 8 ; <double*> [#uses=2]
+ %tmp = alloca double, align 8 ; <double*> [#uses=2]
+ %ld = alloca x86_fp80, align 16 ; <x86_fp80*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store x86_fp80 0xK00000000000000000000, x86_fp80* %ld, align 16
+ %tmp1 = load x86_fp80* %ld, align 16 ; <x86_fp80> [#uses=1]
+ %tmp12 = fptrunc x86_fp80 %tmp1 to double ; <double> [#uses=1]
+ store double %tmp12, double* %tmp, align 8
+ %tmp3 = load double* %tmp, align 8 ; <double> [#uses=1]
+ store double %tmp3, double* %retval, align 8
+ br label %return
+
+return: ; preds = %entry
+ %retval4 = load double* %retval ; <double> [#uses=1]
+ ret double %retval4
+}
diff --git a/test/CodeGen/X86/lea-2.ll b/test/CodeGen/X86/lea-2.ll
new file mode 100644
index 0000000..6930350
--- /dev/null
+++ b/test/CodeGen/X86/lea-2.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep {lea EAX, DWORD PTR \\\[... + 4\\*... - 5\\\]}
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: not grep add
+
+define i32 @test1(i32 %A, i32 %B) {
+ %tmp1 = shl i32 %A, 2 ; <i32> [#uses=1]
+ %tmp3 = add i32 %B, -5 ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp3, %tmp1 ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+
diff --git a/test/CodeGen/X86/lea-3.ll b/test/CodeGen/X86/lea-3.ll
new file mode 100644
index 0000000..44413d6
--- /dev/null
+++ b/test/CodeGen/X86/lea-3.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax}
+define i32 @test(i32 %a) {
+ %tmp2 = mul i32 %a, 3 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+; RUN: llc < %s -march=x86-64 | grep {leaq (,%rdi,4), %rax}
+define i64 @test2(i64 %a) {
+ %tmp2 = shl i64 %a, 2
+ %tmp3 = or i64 %tmp2, %a
+ ret i64 %tmp3
+}
+
+;; TODO! LEA instead of shift + copy.
+define i64 @test3(i64 %a) {
+ %tmp2 = shl i64 %a, 3
+ ret i64 %tmp2
+}
+
diff --git a/test/CodeGen/X86/lea-4.ll b/test/CodeGen/X86/lea-4.ll
new file mode 100644
index 0000000..2171204
--- /dev/null
+++ b/test/CodeGen/X86/lea-4.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86-64 | grep lea | count 2
+
+define zeroext i16 @t1(i32 %on_off) nounwind {
+entry:
+ %0 = sub i32 %on_off, 1
+ %1 = mul i32 %0, 2
+ %2 = trunc i32 %1 to i16
+ %3 = zext i16 %2 to i32
+ %4 = trunc i32 %3 to i16
+ ret i16 %4
+}
+
+define i32 @t2(i32 %on_off) nounwind {
+entry:
+ %0 = sub i32 %on_off, 1
+ %1 = mul i32 %0, 2
+ %2 = and i32 %1, 65535
+ ret i32 %2
+}
diff --git a/test/CodeGen/X86/lea-recursion.ll b/test/CodeGen/X86/lea-recursion.ll
new file mode 100644
index 0000000..3f32fd2
--- /dev/null
+++ b/test/CodeGen/X86/lea-recursion.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -march=x86-64 | grep lea | count 12
+
+; This testcase was written to demonstrate an instruction-selection problem,
+; however it also happens to expose a limitation in the DAGCombiner's
+; expression reassociation which causes it to miss opportunities for
+; constant folding due to the intermediate adds having multiple uses.
+; The Reassociate pass has similar limitations. If these limitations are
+; fixed, the test commands above will need to be updated to expect fewer
+; lea instructions.
+
+@g0 = weak global [1000 x i32] zeroinitializer, align 32 ; <[1000 x i32]*> [#uses=8]
+@g1 = weak global [1000 x i32] zeroinitializer, align 32 ; <[1000 x i32]*> [#uses=7]
+
+define void @foo() {
+entry:
+ %tmp4 = load i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 0) ; <i32> [#uses=1]
+ %tmp8 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 0) ; <i32> [#uses=1]
+ %tmp9 = add i32 %tmp4, 1 ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=2]
+ store i32 %tmp10, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 1)
+ %tmp8.1 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp9.1 = add i32 %tmp10, 1 ; <i32> [#uses=1]
+ %tmp10.1 = add i32 %tmp9.1, %tmp8.1 ; <i32> [#uses=2]
+ store i32 %tmp10.1, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 2)
+ %tmp8.2 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 2) ; <i32> [#uses=1]
+ %tmp9.2 = add i32 %tmp10.1, 1 ; <i32> [#uses=1]
+ %tmp10.2 = add i32 %tmp9.2, %tmp8.2 ; <i32> [#uses=2]
+ store i32 %tmp10.2, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 3)
+ %tmp8.3 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 3) ; <i32> [#uses=1]
+ %tmp9.3 = add i32 %tmp10.2, 1 ; <i32> [#uses=1]
+ %tmp10.3 = add i32 %tmp9.3, %tmp8.3 ; <i32> [#uses=2]
+ store i32 %tmp10.3, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 4)
+ %tmp8.4 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 4) ; <i32> [#uses=1]
+ %tmp9.4 = add i32 %tmp10.3, 1 ; <i32> [#uses=1]
+ %tmp10.4 = add i32 %tmp9.4, %tmp8.4 ; <i32> [#uses=2]
+ store i32 %tmp10.4, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 5)
+ %tmp8.5 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 5) ; <i32> [#uses=1]
+ %tmp9.5 = add i32 %tmp10.4, 1 ; <i32> [#uses=1]
+ %tmp10.5 = add i32 %tmp9.5, %tmp8.5 ; <i32> [#uses=2]
+ store i32 %tmp10.5, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 6)
+ %tmp8.6 = load i32* getelementptr ([1000 x i32]* @g1, i32 0, i32 6) ; <i32> [#uses=1]
+ %tmp9.6 = add i32 %tmp10.5, 1 ; <i32> [#uses=1]
+ %tmp10.6 = add i32 %tmp9.6, %tmp8.6 ; <i32> [#uses=1]
+ store i32 %tmp10.6, i32* getelementptr ([1000 x i32]* @g0, i32 0, i32 7)
+ ret void
+}
+
diff --git a/test/CodeGen/X86/lea.ll b/test/CodeGen/X86/lea.ll
new file mode 100644
index 0000000..22a9644
--- /dev/null
+++ b/test/CodeGen/X86/lea.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+define i32 @test1(i32 %x) nounwind {
+ %tmp1 = shl i32 %x, 3
+ %tmp2 = add i32 %tmp1, 7
+ ret i32 %tmp2
+; CHECK: test1:
+; CHECK: leal 7(,%rdi,8), %eax
+}
+
+
+; ISel the add of -4 with a neg and use an lea for the rest of the
+; arithemtic.
+define i32 @test2(i32 %x_offs) nounwind readnone {
+entry:
+ %t0 = icmp sgt i32 %x_offs, 4
+ br i1 %t0, label %bb.nph, label %bb2
+
+bb.nph:
+ %tmp = add i32 %x_offs, -5
+ %tmp6 = lshr i32 %tmp, 2
+ %tmp7 = mul i32 %tmp6, -4
+ %tmp8 = add i32 %tmp7, %x_offs
+ %tmp9 = add i32 %tmp8, -4
+ ret i32 %tmp9
+
+bb2:
+ ret i32 %x_offs
+; CHECK: test2:
+; CHECK: leal -5(%rdi), %eax
+; CHECK: andl $-4, %eax
+; CHECK: negl %eax
+; CHECK: leal -4(%rdi,%rax), %eax
+}
diff --git a/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll b/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
new file mode 100644
index 0000000..6a8c154
--- /dev/null
+++ b/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
@@ -0,0 +1,11 @@
+; RUN: llc -march=x86-64 -enable-legalize-types-checking < %s
+; PR5092
+
+define <4 x float> @bug(float %a) nounwind {
+entry:
+ %cmp = fcmp oeq float %a, 0.000000e+00 ; <i1> [#uses=1]
+ %temp = select i1 %cmp, <4 x float> <float 1.000000e+00, float 0.000000e+00,
+float 0.000000e+00, float 0.000000e+00>, <4 x float> zeroinitializer
+ ret <4 x float> %temp
+}
+
diff --git a/test/CodeGen/X86/legalizedag_vec.ll b/test/CodeGen/X86/legalizedag_vec.ll
new file mode 100644
index 0000000..574b46a
--- /dev/null
+++ b/test/CodeGen/X86/legalizedag_vec.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=sse2 -disable-mmx -o %t
+; RUN: grep {call.*divdi3} %t | count 2
+
+
+; Test case for r63760 where we generate a legalization assert that an illegal
+; type has been inserted by LegalizeDAG after LegalizeType has run. With sse2,
+; v2i64 is a legal type but with mmx disabled, i64 is an illegal type. When
+; legalizing the divide in LegalizeDAG, we scalarize the vector divide and make
+; two 64 bit divide library calls which introduces i64 nodes that needs to be
+; promoted.
+
+define <2 x i64> @test_long_div(<2 x i64> %num, <2 x i64> %div) {
+ %div.r = sdiv <2 x i64> %num, %div
+ ret <2 x i64> %div.r
+}
diff --git a/test/CodeGen/X86/lfence.ll b/test/CodeGen/X86/lfence.ll
new file mode 100644
index 0000000..7a96ca3
--- /dev/null
+++ b/test/CodeGen/X86/lfence.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep lfence
+
+declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
+
+define void @test() {
+ call void @llvm.memory.barrier( i1 true, i1 false, i1 false, i1 false, i1 true)
+ ret void
+}
diff --git a/test/CodeGen/X86/limited-prec.ll b/test/CodeGen/X86/limited-prec.ll
new file mode 100644
index 0000000..7bf4ac2
--- /dev/null
+++ b/test/CodeGen/X86/limited-prec.ll
@@ -0,0 +1,60 @@
+; RUN: llc < %s -limit-float-precision=6 -march=x86 | \
+; RUN: not grep exp | not grep log | not grep pow
+; RUN: llc < %s -limit-float-precision=12 -march=x86 | \
+; RUN: not grep exp | not grep log | not grep pow
+; RUN: llc < %s -limit-float-precision=18 -march=x86 | \
+; RUN: not grep exp | not grep log | not grep pow
+
+define float @f1(float %x) nounwind noinline {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = call float @llvm.exp.f32(float %x) ; <float> [#uses=1]
+ ret float %0
+}
+
+declare float @llvm.exp.f32(float) nounwind readonly
+
+define float @f2(float %x) nounwind noinline {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = call float @llvm.exp2.f32(float %x) ; <float> [#uses=1]
+ ret float %0
+}
+
+declare float @llvm.exp2.f32(float) nounwind readonly
+
+define float @f3(float %x) nounwind noinline {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = call float @llvm.pow.f32(float 1.000000e+01, float %x) ; <float> [#uses=1]
+ ret float %0
+}
+
+declare float @llvm.pow.f32(float, float) nounwind readonly
+
+define float @f4(float %x) nounwind noinline {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = call float @llvm.log.f32(float %x) ; <float> [#uses=1]
+ ret float %0
+}
+
+declare float @llvm.log.f32(float) nounwind readonly
+
+define float @f5(float %x) nounwind noinline {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = call float @llvm.log2.f32(float %x) ; <float> [#uses=1]
+ ret float %0
+}
+
+declare float @llvm.log2.f32(float) nounwind readonly
+
+define float @f6(float %x) nounwind noinline {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = call float @llvm.log10.f32(float %x) ; <float> [#uses=1]
+ ret float %0
+}
+
+declare float @llvm.log10.f32(float) nounwind readonly
diff --git a/test/CodeGen/X86/live-out-reg-info.ll b/test/CodeGen/X86/live-out-reg-info.ll
new file mode 100644
index 0000000..8cd9774
--- /dev/null
+++ b/test/CodeGen/X86/live-out-reg-info.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86-64 | grep testb
+
+; Make sure dagcombine doesn't eliminate the comparison due
+; to an off-by-one bug with ComputeMaskedBits information.
+
+declare void @qux()
+
+define void @foo(i32 %a) {
+ %t0 = lshr i32 %a, 23
+ br label %next
+next:
+ %t1 = and i32 %t0, 256
+ %t2 = icmp eq i32 %t1, 0
+ br i1 %t2, label %true, label %false
+true:
+ call void @qux()
+ ret void
+false:
+ ret void
+}
diff --git a/test/CodeGen/X86/local-liveness.ll b/test/CodeGen/X86/local-liveness.ll
new file mode 100644
index 0000000..321f208
--- /dev/null
+++ b/test/CodeGen/X86/local-liveness.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=x86 -regalloc=local | grep {subl %eax, %edx}
+
+; Local regalloc shouldn't assume that both the uses of the
+; sub instruction are kills, because one of them is tied
+; to an output. Previously, it was allocating both inputs
+; in the same register.
+
+define i32 @func_3() nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %g_323 = alloca i8 ; <i8*> [#uses=2]
+ %p_5 = alloca i64, align 8 ; <i64*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i64 0, i64* %p_5, align 8
+ store i8 1, i8* %g_323, align 1
+ %1 = load i8* %g_323, align 1 ; <i8> [#uses=1]
+ %2 = sext i8 %1 to i64 ; <i64> [#uses=1]
+ %3 = load i64* %p_5, align 8 ; <i64> [#uses=1]
+ %4 = sub i64 %3, %2 ; <i64> [#uses=1]
+ %5 = icmp sge i64 %4, 0 ; <i1> [#uses=1]
+ %6 = zext i1 %5 to i32 ; <i32> [#uses=1]
+ store i32 %6, i32* %0, align 4
+ %7 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %7, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
diff --git a/test/CodeGen/X86/long-setcc.ll b/test/CodeGen/X86/long-setcc.ll
new file mode 100644
index 0000000..e0165fb
--- /dev/null
+++ b/test/CodeGen/X86/long-setcc.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 | grep cmp | count 1
+; RUN: llc < %s -march=x86 | grep shr | count 1
+; RUN: llc < %s -march=x86 | grep xor | count 1
+
+define i1 @t1(i64 %x) nounwind {
+ %B = icmp slt i64 %x, 0
+ ret i1 %B
+}
+
+define i1 @t2(i64 %x) nounwind {
+ %tmp = icmp ult i64 %x, 4294967296
+ ret i1 %tmp
+}
+
+define i1 @t3(i32 %x) nounwind {
+ %tmp = icmp ugt i32 %x, -1
+ ret i1 %tmp
+}
diff --git a/test/CodeGen/X86/longlong-deadload.ll b/test/CodeGen/X86/longlong-deadload.ll
new file mode 100644
index 0000000..9a4c8f2
--- /dev/null
+++ b/test/CodeGen/X86/longlong-deadload.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 | not grep '4{(%...)}
+; This should not load or store the top part of *P.
+
+define void @test(i64* %P) nounwind {
+entry:
+ %tmp1 = load i64* %P, align 8 ; <i64> [#uses=1]
+ %tmp2 = xor i64 %tmp1, 1 ; <i64> [#uses=1]
+ store i64 %tmp2, i64* %P, align 8
+ ret void
+}
+
diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll
new file mode 100644
index 0000000..a125e54
--- /dev/null
+++ b/test/CodeGen/X86/loop-blocks.ll
@@ -0,0 +1,207 @@
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false | FileCheck %s
+
+; These tests check for loop branching structure, and that the loop align
+; directive is placed in the expected place.
+
+; CodeGen should insert a branch into the middle of the loop in
+; order to avoid a branch within the loop.
+
+; CHECK: simple:
+; CHECK: jmp .LBB1_1
+; CHECK-NEXT: align
+; CHECK-NEXT: .LBB1_2:
+; CHECK-NEXT: callq loop_latch
+; CHECK-NEXT: .LBB1_1:
+; CHECK-NEXT: callq loop_header
+
+define void @simple() nounwind {
+entry:
+ br label %loop
+
+loop:
+ call void @loop_header()
+ %t0 = tail call i32 @get()
+ %t1 = icmp slt i32 %t0, 0
+ br i1 %t1, label %done, label %bb
+
+bb:
+ call void @loop_latch()
+ br label %loop
+
+done:
+ call void @exit()
+ ret void
+}
+
+; CodeGen should move block_a to the top of the loop so that it
+; falls through into the loop, avoiding a branch within the loop.
+
+; CHECK: slightly_more_involved:
+; CHECK: jmp .LBB2_1
+; CHECK-NEXT: align
+; CHECK-NEXT: .LBB2_4:
+; CHECK-NEXT: callq bar99
+; CHECK-NEXT: .LBB2_1:
+; CHECK-NEXT: callq body
+
+define void @slightly_more_involved() nounwind {
+entry:
+ br label %loop
+
+loop:
+ call void @body()
+ %t0 = call i32 @get()
+ %t1 = icmp slt i32 %t0, 2
+ br i1 %t1, label %block_a, label %bb
+
+bb:
+ %t2 = call i32 @get()
+ %t3 = icmp slt i32 %t2, 99
+ br i1 %t3, label %exit, label %loop
+
+block_a:
+ call void @bar99()
+ br label %loop
+
+exit:
+ call void @exit()
+ ret void
+}
+
+; Same as slightly_more_involved, but block_a is now a CFG diamond with
+; fallthrough edges which should be preserved.
+
+; CHECK: yet_more_involved:
+; CHECK: jmp .LBB3_1
+; CHECK-NEXT: align
+; CHECK-NEXT: .LBB3_4:
+; CHECK-NEXT: callq bar99
+; CHECK-NEXT: callq get
+; CHECK-NEXT: cmpl $2999, %eax
+; CHECK-NEXT: jg .LBB3_6
+; CHECK-NEXT: callq block_a_true_func
+; CHECK-NEXT: jmp .LBB3_7
+; CHECK-NEXT: .LBB3_6:
+; CHECK-NEXT: callq block_a_false_func
+; CHECK-NEXT: .LBB3_7:
+; CHECK-NEXT: callq block_a_merge_func
+; CHECK-NEXT: .LBB3_1:
+; CHECK-NEXT: callq body
+
+define void @yet_more_involved() nounwind {
+entry:
+ br label %loop
+
+loop:
+ call void @body()
+ %t0 = call i32 @get()
+ %t1 = icmp slt i32 %t0, 2
+ br i1 %t1, label %block_a, label %bb
+
+bb:
+ %t2 = call i32 @get()
+ %t3 = icmp slt i32 %t2, 99
+ br i1 %t3, label %exit, label %loop
+
+block_a:
+ call void @bar99()
+ %z0 = call i32 @get()
+ %z1 = icmp slt i32 %z0, 3000
+ br i1 %z1, label %block_a_true, label %block_a_false
+
+block_a_true:
+ call void @block_a_true_func()
+ br label %block_a_merge
+
+block_a_false:
+ call void @block_a_false_func()
+ br label %block_a_merge
+
+block_a_merge:
+ call void @block_a_merge_func()
+ br label %loop
+
+exit:
+ call void @exit()
+ ret void
+}
+
+; CodeGen should move the CFG islands that are part of the loop but don't
+; conveniently fit anywhere so that they are at least contiguous with the
+; loop.
+
+; CHECK: cfg_islands:
+; CHECK: jmp .LBB4_1
+; CHECK-NEXT: align
+; CHECK-NEXT: .LBB4_7:
+; CHECK-NEXT: callq bar100
+; CHECK-NEXT: jmp .LBB4_1
+; CHECK-NEXT: .LBB4_8:
+; CHECK-NEXT: callq bar101
+; CHECK-NEXT: jmp .LBB4_1
+; CHECK-NEXT: .LBB4_9:
+; CHECK-NEXT: callq bar102
+; CHECK-NEXT: jmp .LBB4_1
+; CHECK-NEXT: .LBB4_5:
+; CHECK-NEXT: callq loop_latch
+; CHECK-NEXT: .LBB4_1:
+; CHECK-NEXT: callq loop_header
+
+define void @cfg_islands() nounwind {
+entry:
+ br label %loop
+
+loop:
+ call void @loop_header()
+ %t0 = call i32 @get()
+ %t1 = icmp slt i32 %t0, 100
+ br i1 %t1, label %block100, label %bb
+
+bb:
+ %t2 = call i32 @get()
+ %t3 = icmp slt i32 %t2, 101
+ br i1 %t3, label %block101, label %bb1
+
+bb1:
+ %t4 = call i32 @get()
+ %t5 = icmp slt i32 %t4, 102
+ br i1 %t5, label %block102, label %bb2
+
+bb2:
+ %t6 = call i32 @get()
+ %t7 = icmp slt i32 %t6, 103
+ br i1 %t7, label %exit, label %bb3
+
+bb3:
+ call void @loop_latch()
+ br label %loop
+
+exit:
+ call void @exit()
+ ret void
+
+block100:
+ call void @bar100()
+ br label %loop
+
+block101:
+ call void @bar101()
+ br label %loop
+
+block102:
+ call void @bar102()
+ br label %loop
+}
+
+declare void @bar99() nounwind
+declare void @bar100() nounwind
+declare void @bar101() nounwind
+declare void @bar102() nounwind
+declare void @body() nounwind
+declare void @exit() nounwind
+declare void @loop_header() nounwind
+declare void @loop_latch() nounwind
+declare i32 @get() nounwind
+declare void @block_a_true_func() nounwind
+declare void @block_a_false_func() nounwind
+declare void @block_a_merge_func() nounwind
diff --git a/test/CodeGen/X86/loop-hoist.ll b/test/CodeGen/X86/loop-hoist.ll
new file mode 100644
index 0000000..b9008e5
--- /dev/null
+++ b/test/CodeGen/X86/loop-hoist.ll
@@ -0,0 +1,27 @@
+; LSR should hoist the load from the "Arr" stub out of the loop.
+
+; RUN: llc < %s -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 | FileCheck %s
+
+; CHECK: _foo:
+; CHECK: L_Arr$non_lazy_ptr
+; CHECK: LBB1_1:
+
+@Arr = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
+
+define void @foo(i32 %N.in, i32 %x) nounwind {
+entry:
+ %N = bitcast i32 %N.in to i32 ; <i32> [#uses=1]
+ br label %cond_true
+
+cond_true: ; preds = %cond_true, %entry
+ %indvar = phi i32 [ %x, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %i.0.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
+ %tmp = getelementptr [0 x i32]* @Arr, i32 0, i32 %i.0.0 ; <i32*> [#uses=1]
+ store i32 %i.0.0, i32* %tmp
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %cond_true
+
+return: ; preds = %cond_true
+ ret void
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce-2.ll b/test/CodeGen/X86/loop-strength-reduce-2.ll
new file mode 100644
index 0000000..30b5114
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce-2.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=x86 -relocation-model=pic | \
+; RUN: grep {, 4} | count 1
+; RUN: llc < %s -march=x86 | not grep lea
+;
+; Make sure the common loop invariant A is hoisted up to preheader,
+; since too many registers are needed to subsume it into the addressing modes.
+; It's safe to sink A in when it's not pic.
+
+@A = global [16 x [16 x i32]] zeroinitializer, align 32 ; <[16 x [16 x i32]]*> [#uses=2]
+
+define void @test(i32 %row, i32 %N.in) nounwind {
+entry:
+ %N = bitcast i32 %N.in to i32 ; <i32> [#uses=1]
+ %tmp5 = icmp sgt i32 %N.in, 0 ; <i1> [#uses=1]
+ br i1 %tmp5, label %cond_true, label %return
+
+cond_true: ; preds = %cond_true, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %i.0.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
+ %tmp2 = add i32 %i.0.0, 1 ; <i32> [#uses=1]
+ %tmp = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp2 ; <i32*> [#uses=1]
+ store i32 4, i32* %tmp
+ %tmp5.upgrd.1 = add i32 %i.0.0, 2 ; <i32> [#uses=1]
+ %tmp7 = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp5.upgrd.1 ; <i32*> [#uses=1]
+ store i32 5, i32* %tmp7
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %cond_true
+
+return: ; preds = %cond_true, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce-3.ll b/test/CodeGen/X86/loop-strength-reduce-3.ll
new file mode 100644
index 0000000..70c9134
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce-3.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=dynamic-no-pic | \
+; RUN: grep {A+} | count 2
+;
+; Make sure the common loop invariant A is not hoisted up to preheader,
+; since it can be subsumed it into the addressing modes.
+
+@A = global [16 x [16 x i32]] zeroinitializer, align 32 ; <[16 x [16 x i32]]*> [#uses=2]
+
+define void @test(i32 %row, i32 %N.in) nounwind {
+entry:
+ %N = bitcast i32 %N.in to i32 ; <i32> [#uses=1]
+ %tmp5 = icmp sgt i32 %N.in, 0 ; <i1> [#uses=1]
+ br i1 %tmp5, label %cond_true, label %return
+
+cond_true: ; preds = %cond_true, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %i.0.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
+ %tmp2 = add i32 %i.0.0, 1 ; <i32> [#uses=1]
+ %tmp = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp2 ; <i32*> [#uses=1]
+ store i32 4, i32* %tmp
+ %tmp5.upgrd.1 = add i32 %i.0.0, 2 ; <i32> [#uses=1]
+ %tmp7 = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp5.upgrd.1 ; <i32*> [#uses=1]
+ store i32 5, i32* %tmp7
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %cond_true
+
+return: ; preds = %cond_true, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce.ll b/test/CodeGen/X86/loop-strength-reduce.ll
new file mode 100644
index 0000000..4cb56ca
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86 -relocation-model=static | \
+; RUN: grep {A+} | count 2
+;
+; Make sure the common loop invariant A is not hoisted up to preheader,
+; since it can be subsumed into the addressing mode in all uses.
+
+@A = internal global [16 x [16 x i32]] zeroinitializer, align 32 ; <[16 x [16 x i32]]*> [#uses=2]
+
+define void @test(i32 %row, i32 %N.in) nounwind {
+entry:
+ %N = bitcast i32 %N.in to i32 ; <i32> [#uses=1]
+ %tmp5 = icmp sgt i32 %N.in, 0 ; <i1> [#uses=1]
+ br i1 %tmp5, label %cond_true, label %return
+
+cond_true: ; preds = %cond_true, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %i.0.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
+ %tmp2 = add i32 %i.0.0, 1 ; <i32> [#uses=1]
+ %tmp = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp2 ; <i32*> [#uses=1]
+ store i32 4, i32* %tmp
+ %tmp5.upgrd.1 = add i32 %i.0.0, 2 ; <i32> [#uses=1]
+ %tmp7 = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp5.upgrd.1 ; <i32*> [#uses=1]
+ store i32 5, i32* %tmp7
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %cond_true
+
+return: ; preds = %cond_true, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce2.ll b/test/CodeGen/X86/loop-strength-reduce2.ll
new file mode 100644
index 0000000..9b53adb
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce2.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic | grep {\$pb} | grep mov
+;
+; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader.
+
+@flags2 = internal global [8193 x i8] zeroinitializer, align 32 ; <[8193 x i8]*> [#uses=1]
+
+define void @test(i32 %k, i32 %i) nounwind {
+entry:
+ %k_addr.012 = shl i32 %i, 1 ; <i32> [#uses=1]
+ %tmp14 = icmp sgt i32 %k_addr.012, 8192 ; <i1> [#uses=1]
+ br i1 %tmp14, label %return, label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %tmp. = shl i32 %i, 1 ; <i32> [#uses=1]
+ %tmp.15 = mul i32 %indvar, %i ; <i32> [#uses=1]
+ %tmp.16 = add i32 %tmp.15, %tmp. ; <i32> [#uses=2]
+ %k_addr.0.0 = bitcast i32 %tmp.16 to i32 ; <i32> [#uses=1]
+ %gep.upgrd.1 = zext i32 %tmp.16 to i64 ; <i64> [#uses=1]
+ %tmp = getelementptr [8193 x i8]* @flags2, i32 0, i64 %gep.upgrd.1 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp
+ %k_addr.0 = add i32 %k_addr.0.0, %i ; <i32> [#uses=1]
+ %tmp.upgrd.2 = icmp sgt i32 %k_addr.0, 8192 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp.upgrd.2, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce3.ll b/test/CodeGen/X86/loop-strength-reduce3.ll
new file mode 100644
index 0000000..c45a374
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce3.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=x86 | grep cmp | grep 240
+; RUN: llc < %s -march=x86 | grep inc | count 1
+
+define i32 @foo(i32 %A, i32 %B, i32 %C, i32 %D) nounwind {
+entry:
+ %tmp2955 = icmp sgt i32 %C, 0 ; <i1> [#uses=1]
+ br i1 %tmp2955, label %bb26.outer.us, label %bb40.split
+
+bb26.outer.us: ; preds = %bb26.bb32_crit_edge.us, %entry
+ %i.044.0.ph.us = phi i32 [ 0, %entry ], [ %indvar.next57, %bb26.bb32_crit_edge.us ] ; <i32> [#uses=2]
+ %k.1.ph.us = phi i32 [ 0, %entry ], [ %k.0.us, %bb26.bb32_crit_edge.us ] ; <i32> [#uses=1]
+ %tmp3.us = mul i32 %i.044.0.ph.us, 6 ; <i32> [#uses=1]
+ br label %bb1.us
+
+bb1.us: ; preds = %bb1.us, %bb26.outer.us
+ %j.053.us = phi i32 [ 0, %bb26.outer.us ], [ %tmp25.us, %bb1.us ] ; <i32> [#uses=2]
+ %k.154.us = phi i32 [ %k.1.ph.us, %bb26.outer.us ], [ %k.0.us, %bb1.us ] ; <i32> [#uses=1]
+ %tmp5.us = add i32 %tmp3.us, %j.053.us ; <i32> [#uses=1]
+ %tmp7.us = shl i32 %D, %tmp5.us ; <i32> [#uses=2]
+ %tmp9.us = icmp eq i32 %tmp7.us, %B ; <i1> [#uses=1]
+ %tmp910.us = zext i1 %tmp9.us to i32 ; <i32> [#uses=1]
+ %tmp12.us = and i32 %tmp7.us, %A ; <i32> [#uses=1]
+ %tmp19.us = and i32 %tmp12.us, %tmp910.us ; <i32> [#uses=1]
+ %k.0.us = add i32 %tmp19.us, %k.154.us ; <i32> [#uses=3]
+ %tmp25.us = add i32 %j.053.us, 1 ; <i32> [#uses=2]
+ %tmp29.us = icmp slt i32 %tmp25.us, %C ; <i1> [#uses=1]
+ br i1 %tmp29.us, label %bb1.us, label %bb26.bb32_crit_edge.us
+
+bb26.bb32_crit_edge.us: ; preds = %bb1.us
+ %indvar.next57 = add i32 %i.044.0.ph.us, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next57, 40 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb40.split, label %bb26.outer.us
+
+bb40.split: ; preds = %bb26.bb32_crit_edge.us, %entry
+ %k.1.lcssa.lcssa.us-lcssa = phi i32 [ %k.0.us, %bb26.bb32_crit_edge.us ], [ 0, %entry ] ; <i32> [#uses=1]
+ ret i32 %k.1.lcssa.lcssa.us-lcssa
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce4.ll b/test/CodeGen/X86/loop-strength-reduce4.ll
new file mode 100644
index 0000000..07e46ec
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce4.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=x86 | grep cmp | grep 64
+; RUN: llc < %s -march=x86 | not grep inc
+
+@state = external global [0 x i32] ; <[0 x i32]*> [#uses=4]
+@S = external global [0 x i32] ; <[0 x i32]*> [#uses=4]
+
+define i32 @foo() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %t.063.0 = phi i32 [ 0, %entry ], [ %tmp47, %bb ] ; <i32> [#uses=1]
+ %j.065.0 = shl i32 %indvar, 2 ; <i32> [#uses=4]
+ %tmp3 = getelementptr [0 x i32]* @state, i32 0, i32 %j.065.0 ; <i32*> [#uses=2]
+ %tmp4 = load i32* %tmp3, align 4 ; <i32> [#uses=1]
+ %tmp6 = getelementptr [0 x i32]* @S, i32 0, i32 %t.063.0 ; <i32*> [#uses=1]
+ %tmp7 = load i32* %tmp6, align 4 ; <i32> [#uses=1]
+ %tmp8 = xor i32 %tmp7, %tmp4 ; <i32> [#uses=2]
+ store i32 %tmp8, i32* %tmp3, align 4
+ %tmp1378 = or i32 %j.065.0, 1 ; <i32> [#uses=1]
+ %tmp16 = getelementptr [0 x i32]* @state, i32 0, i32 %tmp1378 ; <i32*> [#uses=2]
+ %tmp17 = load i32* %tmp16, align 4 ; <i32> [#uses=1]
+ %tmp19 = getelementptr [0 x i32]* @S, i32 0, i32 %tmp8 ; <i32*> [#uses=1]
+ %tmp20 = load i32* %tmp19, align 4 ; <i32> [#uses=1]
+ %tmp21 = xor i32 %tmp20, %tmp17 ; <i32> [#uses=2]
+ store i32 %tmp21, i32* %tmp16, align 4
+ %tmp2680 = or i32 %j.065.0, 2 ; <i32> [#uses=1]
+ %tmp29 = getelementptr [0 x i32]* @state, i32 0, i32 %tmp2680 ; <i32*> [#uses=2]
+ %tmp30 = load i32* %tmp29, align 4 ; <i32> [#uses=1]
+ %tmp32 = getelementptr [0 x i32]* @S, i32 0, i32 %tmp21 ; <i32*> [#uses=1]
+ %tmp33 = load i32* %tmp32, align 4 ; <i32> [#uses=1]
+ %tmp34 = xor i32 %tmp33, %tmp30 ; <i32> [#uses=2]
+ store i32 %tmp34, i32* %tmp29, align 4
+ %tmp3982 = or i32 %j.065.0, 3 ; <i32> [#uses=1]
+ %tmp42 = getelementptr [0 x i32]* @state, i32 0, i32 %tmp3982 ; <i32*> [#uses=2]
+ %tmp43 = load i32* %tmp42, align 4 ; <i32> [#uses=1]
+ %tmp45 = getelementptr [0 x i32]* @S, i32 0, i32 %tmp34 ; <i32*> [#uses=1]
+ %tmp46 = load i32* %tmp45, align 4 ; <i32> [#uses=1]
+ %tmp47 = xor i32 %tmp46, %tmp43 ; <i32> [#uses=3]
+ store i32 %tmp47, i32* %tmp42, align 4
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 4 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb57, label %bb
+
+bb57: ; preds = %bb
+ %tmp59 = and i32 %tmp47, 255 ; <i32> [#uses=1]
+ ret i32 %tmp59
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce5.ll b/test/CodeGen/X86/loop-strength-reduce5.ll
new file mode 100644
index 0000000..b07eeb6
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce5.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 | grep inc | count 1
+
+@X = weak global i16 0 ; <i16*> [#uses=1]
+@Y = weak global i16 0 ; <i16*> [#uses=1]
+
+define void @foo(i32 %N) nounwind {
+entry:
+ %tmp1019 = icmp sgt i32 %N, 0 ; <i1> [#uses=1]
+ br i1 %tmp1019, label %bb, label %return
+
+bb: ; preds = %bb, %entry
+ %i.014.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %tmp1 = trunc i32 %i.014.0 to i16 ; <i16> [#uses=2]
+ volatile store i16 %tmp1, i16* @X, align 2
+ %tmp34 = shl i16 %tmp1, 2 ; <i16> [#uses=1]
+ volatile store i16 %tmp34, i16* @Y, align 2
+ %indvar.next = add i32 %i.014.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce6.ll b/test/CodeGen/X86/loop-strength-reduce6.ll
new file mode 100644
index 0000000..bbafcf7c
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce6.ll
@@ -0,0 +1,66 @@
+; RUN: llc < %s -march=x86-64 | not grep inc
+
+define fastcc i32 @decodeMP3(i32 %isize, i32* %done) nounwind {
+entry:
+ br i1 false, label %cond_next191, label %cond_true189
+
+cond_true189: ; preds = %entry
+ ret i32 0
+
+cond_next191: ; preds = %entry
+ br i1 false, label %cond_next37.i, label %cond_false.i9
+
+cond_false.i9: ; preds = %cond_next191
+ ret i32 0
+
+cond_next37.i: ; preds = %cond_next191
+ br i1 false, label %cond_false50.i, label %cond_true44.i
+
+cond_true44.i: ; preds = %cond_next37.i
+ br i1 false, label %cond_true11.i.i, label %bb414.preheader.i
+
+cond_true11.i.i: ; preds = %cond_true44.i
+ ret i32 0
+
+cond_false50.i: ; preds = %cond_next37.i
+ ret i32 0
+
+bb414.preheader.i: ; preds = %cond_true44.i
+ br i1 false, label %bb.i18, label %do_layer3.exit
+
+bb.i18: ; preds = %bb414.preheader.i
+ br i1 false, label %bb358.i, label %cond_true79.i
+
+cond_true79.i: ; preds = %bb.i18
+ ret i32 0
+
+bb331.i: ; preds = %bb358.i, %cond_true.i149.i
+ br i1 false, label %cond_true.i149.i, label %cond_false.i151.i
+
+cond_true.i149.i: ; preds = %bb331.i
+ br i1 false, label %bb178.preheader.i.i, label %bb331.i
+
+cond_false.i151.i: ; preds = %bb331.i
+ ret i32 0
+
+bb163.i.i: ; preds = %bb178.preheader.i.i, %bb163.i.i
+ %rawout2.451.rec.i.i = phi i64 [ 0, %bb178.preheader.i.i ], [ %indvar.next260.i, %bb163.i.i ] ; <i64> [#uses=2]
+ %i.052.i.i = trunc i64 %rawout2.451.rec.i.i to i32 ; <i32> [#uses=1]
+ %tmp165.i144.i = shl i32 %i.052.i.i, 5 ; <i32> [#uses=1]
+ %tmp165169.i.i = sext i32 %tmp165.i144.i to i64 ; <i64> [#uses=0]
+ %indvar.next260.i = add i64 %rawout2.451.rec.i.i, 1 ; <i64> [#uses=2]
+ %exitcond261.i = icmp eq i64 %indvar.next260.i, 18 ; <i1> [#uses=1]
+ br i1 %exitcond261.i, label %bb178.preheader.i.i, label %bb163.i.i
+
+bb178.preheader.i.i: ; preds = %bb163.i.i, %cond_true.i149.i
+ br label %bb163.i.i
+
+bb358.i: ; preds = %bb.i18
+ br i1 false, label %bb331.i, label %bb406.i
+
+bb406.i: ; preds = %bb358.i
+ ret i32 0
+
+do_layer3.exit: ; preds = %bb414.preheader.i
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce7.ll b/test/CodeGen/X86/loop-strength-reduce7.ll
new file mode 100644
index 0000000..4b565a6
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce7.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -march=x86 | not grep imul
+
+target triple = "i386-apple-darwin9.6"
+ %struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
+ %struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] }
+ %struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] }
+ %struct.lame_global_flags = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
+
+define fastcc void @outer_loop(%struct.lame_global_flags* nocapture %gfp, double* nocapture %xr, i32 %targ_bits, double* nocapture %best_noise, %struct.III_psy_xmin* nocapture %l3_xmin, i32* nocapture %l3_enc, %struct.III_scalefac_t* nocapture %scalefac, %struct.gr_info* nocapture %cod_info, i32 %ch) nounwind {
+entry:
+ br label %bb4
+
+bb4: ; preds = %bb4, %entry
+ br i1 true, label %bb5, label %bb4
+
+bb5: ; preds = %bb4
+ br i1 true, label %bb28.i37, label %bb.i4
+
+bb.i4: ; preds = %bb.i4, %bb5
+ br label %bb.i4
+
+bb28.i37: ; preds = %bb33.i47, %bb5
+ %i.1.reg2mem.0.i = phi i32 [ %0, %bb33.i47 ], [ 0, %bb5 ] ; <i32> [#uses=2]
+ %0 = add i32 %i.1.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ br label %bb29.i38
+
+bb29.i38: ; preds = %bb33.i47, %bb28.i37
+ %indvar32.i = phi i32 [ %indvar.next33.i, %bb33.i47 ], [ 0, %bb28.i37 ] ; <i32> [#uses=2]
+ %sfb.314.i = add i32 %indvar32.i, 0 ; <i32> [#uses=3]
+ %1 = getelementptr [4 x [21 x double]]* null, i32 0, i32 %0, i32 %sfb.314.i ; <double*> [#uses=1]
+ %2 = load double* %1, align 8 ; <double> [#uses=0]
+ br i1 false, label %bb30.i41, label %bb33.i47
+
+bb30.i41: ; preds = %bb29.i38
+ %3 = getelementptr %struct.III_scalefac_t* null, i32 0, i32 1, i32 %sfb.314.i, i32 %i.1.reg2mem.0.i ; <i32*> [#uses=1]
+ store i32 0, i32* %3, align 4
+ br label %bb33.i47
+
+bb33.i47: ; preds = %bb30.i41, %bb29.i38
+ %4 = add i32 %sfb.314.i, 1 ; <i32> [#uses=1]
+ %phitmp.i46 = icmp ugt i32 %4, 11 ; <i1> [#uses=1]
+ %indvar.next33.i = add i32 %indvar32.i, 1 ; <i32> [#uses=1]
+ br i1 %phitmp.i46, label %bb28.i37, label %bb29.i38
+}
diff --git a/test/CodeGen/X86/loop-strength-reduce8.ll b/test/CodeGen/X86/loop-strength-reduce8.ll
new file mode 100644
index 0000000..e14cd8a
--- /dev/null
+++ b/test/CodeGen/X86/loop-strength-reduce8.ll
@@ -0,0 +1,78 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep leal | not grep 16
+
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32 }
+ %struct.bitmap_element = type { %struct.bitmap_element*, %struct.bitmap_element*, i32, [2 x i64] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element*, %struct.bitmap_element*, i32 }
+ %struct.branch_path = type { %struct.rtx_def*, i32 }
+ %struct.c_lang_decl = type <{ i8, [3 x i8] }>
+ %struct.constant_descriptor = type { %struct.constant_descriptor*, i8*, %struct.rtx_def*, { x86_fp80 } }
+ %struct.eh_region = type { %struct.eh_region*, %struct.eh_region*, %struct.eh_region*, i32, %struct.bitmap_head_def*, i32, { { %struct.eh_region*, %struct.eh_region*, %struct.eh_region*, %struct.rtx_def* } }, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.eh_status = type { %struct.eh_region*, %struct.eh_region**, %struct.eh_region*, %struct.eh_region*, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32, i32, %struct.varray_head_tag*, %struct.varray_head_tag*, %struct.varray_head_tag*, %struct.branch_path*, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.sequence_stack*, i32, i32, i8*, i32, i8*, %struct.tree_node**, %struct.rtx_def** }
+ %struct.equiv_table = type { %struct.rtx_def*, %struct.rtx_def* }
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.stmt_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, i8*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, i8*, %struct.initial_value_struct*, i32, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32, %struct.rtx_def**, %struct.temp_slot*, i32, i32, i32, %struct.var_refs_queue*, i32, i32, i8*, %struct.tree_node*, %struct.rtx_def*, i32, i32, %struct.machine_function*, i32, i32, %struct.language_function*, %struct.rtx_def*, i8, i8, i8 }
+ %struct.goto_fixup = type { %struct.goto_fixup*, %struct.rtx_def*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.rtx_def*, %struct.tree_node* }
+ %struct.initial_value_struct = type { i32, i32, %struct.equiv_table* }
+ %struct.label_chain = type { %struct.label_chain*, %struct.tree_node* }
+ %struct.lang_decl = type { %struct.c_lang_decl, %struct.tree_node* }
+ %struct.language_function = type { %struct.stmt_tree_s, %struct.tree_node* }
+ %struct.machine_function = type { [59 x [3 x %struct.rtx_def*]], i32, i32 }
+ %struct.nesting = type { %struct.nesting*, %struct.nesting*, i32, %struct.rtx_def*, { { i32, %struct.rtx_def*, %struct.rtx_def*, %struct.nesting*, %struct.tree_node*, %struct.tree_node*, %struct.label_chain*, i32, i32, i32, i32, %struct.rtx_def*, %struct.tree_node** } } }
+ %struct.pool_constant = type { %struct.constant_descriptor*, %struct.pool_constant*, %struct.pool_constant*, %struct.rtx_def*, i32, i32, i32, i64, i32 }
+ %struct.rtunion = type { i64 }
+ %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.sequence_stack* }
+ %struct.stmt_status = type { %struct.nesting*, %struct.nesting*, %struct.nesting*, %struct.nesting*, %struct.nesting*, %struct.nesting*, i32, i32, %struct.tree_node*, %struct.rtx_def*, i32, i8*, i32, %struct.goto_fixup* }
+ %struct.stmt_tree_s = type { %struct.tree_node*, %struct.tree_node*, i8*, i32 }
+ %struct.temp_slot = type { %struct.temp_slot*, %struct.rtx_def*, %struct.rtx_def*, i32, i64, %struct.tree_node*, %struct.tree_node*, i8, i8, i32, i32, i64, i64 }
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, i8*, i32, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, { %struct.function* }, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_exp = type { %struct.tree_common, i32, [1 x %struct.tree_node*] }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type { %struct.constant_descriptor**, %struct.pool_constant**, %struct.pool_constant*, %struct.pool_constant*, i64, %struct.rtx_def* }
+ %struct.varray_data = type { [1 x i64] }
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.varray_data }
+@lineno = internal global i32 0 ; <i32*> [#uses=1]
+@tree_code_length = internal global [256 x i32] zeroinitializer
[email protected] = appending global [1 x i8*] [ i8* bitcast (%struct.tree_node* (i32, ...)* @build_stmt to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define %struct.tree_node* @build_stmt(i32 %code, ...) nounwind {
+entry:
+ %p = alloca i8* ; <i8**> [#uses=3]
+ %p1 = bitcast i8** %p to i8* ; <i8*> [#uses=2]
+ call void @llvm.va_start(i8* %p1)
+ %0 = call fastcc %struct.tree_node* @make_node(i32 %code) nounwind ; <%struct.tree_node*> [#uses=2]
+ %1 = getelementptr [256 x i32]* @tree_code_length, i32 0, i32 %code ; <i32*> [#uses=1]
+ %2 = load i32* %1, align 4 ; <i32> [#uses=2]
+ %3 = load i32* @lineno, align 4 ; <i32> [#uses=1]
+ %4 = bitcast %struct.tree_node* %0 to %struct.tree_exp* ; <%struct.tree_exp*> [#uses=2]
+ %5 = getelementptr %struct.tree_exp* %4, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %3, i32* %5, align 4
+ %6 = icmp sgt i32 %2, 0 ; <i1> [#uses=1]
+ br i1 %6, label %bb, label %bb3
+
+bb: ; preds = %bb, %entry
+ %i.01 = phi i32 [ %indvar.next, %bb ], [ 0, %entry ] ; <i32> [#uses=2]
+ %7 = load i8** %p, align 4 ; <i8*> [#uses=2]
+ %8 = getelementptr i8* %7, i32 4 ; <i8*> [#uses=1]
+ store i8* %8, i8** %p, align 4
+ %9 = bitcast i8* %7 to %struct.tree_node** ; <%struct.tree_node**> [#uses=1]
+ %10 = load %struct.tree_node** %9, align 4 ; <%struct.tree_node*> [#uses=1]
+ %11 = getelementptr %struct.tree_exp* %4, i32 0, i32 2, i32 %i.01 ; <%struct.tree_node**> [#uses=1]
+ store %struct.tree_node* %10, %struct.tree_node** %11, align 4
+ %indvar.next = add i32 %i.01, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %2 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb3, label %bb
+
+bb3: ; preds = %bb, %entry
+ call void @llvm.va_end(i8* %p1)
+ ret %struct.tree_node* %0
+}
+
+declare void @llvm.va_start(i8*) nounwind
+
+declare void @llvm.va_end(i8*) nounwind
+
+declare fastcc %struct.tree_node* @make_node(i32) nounwind
diff --git a/test/CodeGen/X86/lsr-loop-exit-cond.ll b/test/CodeGen/X86/lsr-loop-exit-cond.ll
new file mode 100644
index 0000000..474450a
--- /dev/null
+++ b/test/CodeGen/X86/lsr-loop-exit-cond.ll
@@ -0,0 +1,137 @@
+; RUN: llc -march=x86-64 < %s | FileCheck %s
+
+; CHECK: decq
+; CHECK-NEXT: jne
+
+@Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5]
+@Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4]
+@Te3 = external global [256 x i32] ; <[256 x i32]*> [#uses=2]
+
+define void @t(i8* nocapture %in, i8* nocapture %out, i32* nocapture %rk, i32 %r) nounwind ssp {
+entry:
+ %0 = load i32* %rk, align 4 ; <i32> [#uses=1]
+ %1 = getelementptr i32* %rk, i64 1 ; <i32*> [#uses=1]
+ %2 = load i32* %1, align 4 ; <i32> [#uses=1]
+ %tmp15 = add i32 %r, -1 ; <i32> [#uses=1]
+ %tmp.16 = zext i32 %tmp15 to i64 ; <i64> [#uses=2]
+ br label %bb
+
+bb: ; preds = %bb1, %entry
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb1 ] ; <i64> [#uses=3]
+ %s1.0 = phi i32 [ %2, %entry ], [ %56, %bb1 ] ; <i32> [#uses=2]
+ %s0.0 = phi i32 [ %0, %entry ], [ %43, %bb1 ] ; <i32> [#uses=2]
+ %tmp18 = shl i64 %indvar, 4 ; <i64> [#uses=4]
+ %rk26 = bitcast i32* %rk to i8* ; <i8*> [#uses=6]
+ %3 = lshr i32 %s0.0, 24 ; <i32> [#uses=1]
+ %4 = zext i32 %3 to i64 ; <i64> [#uses=1]
+ %5 = getelementptr [256 x i32]* @Te0, i64 0, i64 %4 ; <i32*> [#uses=1]
+ %6 = load i32* %5, align 4 ; <i32> [#uses=1]
+ %7 = lshr i32 %s1.0, 16 ; <i32> [#uses=1]
+ %8 = and i32 %7, 255 ; <i32> [#uses=1]
+ %9 = zext i32 %8 to i64 ; <i64> [#uses=1]
+ %10 = getelementptr [256 x i32]* @Te1, i64 0, i64 %9 ; <i32*> [#uses=1]
+ %11 = load i32* %10, align 4 ; <i32> [#uses=1]
+ %ctg2.sum2728 = or i64 %tmp18, 8 ; <i64> [#uses=1]
+ %12 = getelementptr i8* %rk26, i64 %ctg2.sum2728 ; <i8*> [#uses=1]
+ %13 = bitcast i8* %12 to i32* ; <i32*> [#uses=1]
+ %14 = load i32* %13, align 4 ; <i32> [#uses=1]
+ %15 = xor i32 %11, %6 ; <i32> [#uses=1]
+ %16 = xor i32 %15, %14 ; <i32> [#uses=3]
+ %17 = lshr i32 %s1.0, 24 ; <i32> [#uses=1]
+ %18 = zext i32 %17 to i64 ; <i64> [#uses=1]
+ %19 = getelementptr [256 x i32]* @Te0, i64 0, i64 %18 ; <i32*> [#uses=1]
+ %20 = load i32* %19, align 4 ; <i32> [#uses=1]
+ %21 = and i32 %s0.0, 255 ; <i32> [#uses=1]
+ %22 = zext i32 %21 to i64 ; <i64> [#uses=1]
+ %23 = getelementptr [256 x i32]* @Te3, i64 0, i64 %22 ; <i32*> [#uses=1]
+ %24 = load i32* %23, align 4 ; <i32> [#uses=1]
+ %ctg2.sum2930 = or i64 %tmp18, 12 ; <i64> [#uses=1]
+ %25 = getelementptr i8* %rk26, i64 %ctg2.sum2930 ; <i8*> [#uses=1]
+ %26 = bitcast i8* %25 to i32* ; <i32*> [#uses=1]
+ %27 = load i32* %26, align 4 ; <i32> [#uses=1]
+ %28 = xor i32 %24, %20 ; <i32> [#uses=1]
+ %29 = xor i32 %28, %27 ; <i32> [#uses=4]
+ %30 = lshr i32 %16, 24 ; <i32> [#uses=1]
+ %31 = zext i32 %30 to i64 ; <i64> [#uses=1]
+ %32 = getelementptr [256 x i32]* @Te0, i64 0, i64 %31 ; <i32*> [#uses=1]
+ %33 = load i32* %32, align 4 ; <i32> [#uses=2]
+ %exitcond = icmp eq i64 %indvar, %tmp.16 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ %ctg2.sum31 = add i64 %tmp18, 16 ; <i64> [#uses=1]
+ %34 = getelementptr i8* %rk26, i64 %ctg2.sum31 ; <i8*> [#uses=1]
+ %35 = bitcast i8* %34 to i32* ; <i32*> [#uses=1]
+ %36 = lshr i32 %29, 16 ; <i32> [#uses=1]
+ %37 = and i32 %36, 255 ; <i32> [#uses=1]
+ %38 = zext i32 %37 to i64 ; <i64> [#uses=1]
+ %39 = getelementptr [256 x i32]* @Te1, i64 0, i64 %38 ; <i32*> [#uses=1]
+ %40 = load i32* %39, align 4 ; <i32> [#uses=1]
+ %41 = load i32* %35, align 4 ; <i32> [#uses=1]
+ %42 = xor i32 %40, %33 ; <i32> [#uses=1]
+ %43 = xor i32 %42, %41 ; <i32> [#uses=1]
+ %44 = lshr i32 %29, 24 ; <i32> [#uses=1]
+ %45 = zext i32 %44 to i64 ; <i64> [#uses=1]
+ %46 = getelementptr [256 x i32]* @Te0, i64 0, i64 %45 ; <i32*> [#uses=1]
+ %47 = load i32* %46, align 4 ; <i32> [#uses=1]
+ %48 = and i32 %16, 255 ; <i32> [#uses=1]
+ %49 = zext i32 %48 to i64 ; <i64> [#uses=1]
+ %50 = getelementptr [256 x i32]* @Te3, i64 0, i64 %49 ; <i32*> [#uses=1]
+ %51 = load i32* %50, align 4 ; <i32> [#uses=1]
+ %ctg2.sum32 = add i64 %tmp18, 20 ; <i64> [#uses=1]
+ %52 = getelementptr i8* %rk26, i64 %ctg2.sum32 ; <i8*> [#uses=1]
+ %53 = bitcast i8* %52 to i32* ; <i32*> [#uses=1]
+ %54 = load i32* %53, align 4 ; <i32> [#uses=1]
+ %55 = xor i32 %51, %47 ; <i32> [#uses=1]
+ %56 = xor i32 %55, %54 ; <i32> [#uses=1]
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
+ br label %bb
+
+bb2: ; preds = %bb
+ %tmp10 = shl i64 %tmp.16, 4 ; <i64> [#uses=2]
+ %ctg2.sum = add i64 %tmp10, 16 ; <i64> [#uses=1]
+ %tmp1213 = getelementptr i8* %rk26, i64 %ctg2.sum ; <i8*> [#uses=1]
+ %57 = bitcast i8* %tmp1213 to i32* ; <i32*> [#uses=1]
+ %58 = and i32 %33, -16777216 ; <i32> [#uses=1]
+ %59 = lshr i32 %29, 16 ; <i32> [#uses=1]
+ %60 = and i32 %59, 255 ; <i32> [#uses=1]
+ %61 = zext i32 %60 to i64 ; <i64> [#uses=1]
+ %62 = getelementptr [256 x i32]* @Te1, i64 0, i64 %61 ; <i32*> [#uses=1]
+ %63 = load i32* %62, align 4 ; <i32> [#uses=1]
+ %64 = and i32 %63, 16711680 ; <i32> [#uses=1]
+ %65 = or i32 %64, %58 ; <i32> [#uses=1]
+ %66 = load i32* %57, align 4 ; <i32> [#uses=1]
+ %67 = xor i32 %65, %66 ; <i32> [#uses=2]
+ %68 = lshr i32 %29, 8 ; <i32> [#uses=1]
+ %69 = zext i32 %68 to i64 ; <i64> [#uses=1]
+ %70 = getelementptr [256 x i32]* @Te0, i64 0, i64 %69 ; <i32*> [#uses=1]
+ %71 = load i32* %70, align 4 ; <i32> [#uses=1]
+ %72 = and i32 %71, -16777216 ; <i32> [#uses=1]
+ %73 = and i32 %16, 255 ; <i32> [#uses=1]
+ %74 = zext i32 %73 to i64 ; <i64> [#uses=1]
+ %75 = getelementptr [256 x i32]* @Te1, i64 0, i64 %74 ; <i32*> [#uses=1]
+ %76 = load i32* %75, align 4 ; <i32> [#uses=1]
+ %77 = and i32 %76, 16711680 ; <i32> [#uses=1]
+ %78 = or i32 %77, %72 ; <i32> [#uses=1]
+ %ctg2.sum25 = add i64 %tmp10, 20 ; <i64> [#uses=1]
+ %79 = getelementptr i8* %rk26, i64 %ctg2.sum25 ; <i8*> [#uses=1]
+ %80 = bitcast i8* %79 to i32* ; <i32*> [#uses=1]
+ %81 = load i32* %80, align 4 ; <i32> [#uses=1]
+ %82 = xor i32 %78, %81 ; <i32> [#uses=2]
+ %83 = lshr i32 %67, 24 ; <i32> [#uses=1]
+ %84 = trunc i32 %83 to i8 ; <i8> [#uses=1]
+ store i8 %84, i8* %out, align 1
+ %85 = lshr i32 %67, 16 ; <i32> [#uses=1]
+ %86 = trunc i32 %85 to i8 ; <i8> [#uses=1]
+ %87 = getelementptr i8* %out, i64 1 ; <i8*> [#uses=1]
+ store i8 %86, i8* %87, align 1
+ %88 = getelementptr i8* %out, i64 4 ; <i8*> [#uses=1]
+ %89 = lshr i32 %82, 24 ; <i32> [#uses=1]
+ %90 = trunc i32 %89 to i8 ; <i8> [#uses=1]
+ store i8 %90, i8* %88, align 1
+ %91 = lshr i32 %82, 16 ; <i32> [#uses=1]
+ %92 = trunc i32 %91 to i8 ; <i8> [#uses=1]
+ %93 = getelementptr i8* %out, i64 5 ; <i8*> [#uses=1]
+ store i8 %92, i8* %93, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/lsr-negative-stride.ll b/test/CodeGen/X86/lsr-negative-stride.ll
new file mode 100644
index 0000000..b08356c
--- /dev/null
+++ b/test/CodeGen/X86/lsr-negative-stride.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: not grep neg %t
+; RUN: not grep sub.*esp %t
+; RUN: not grep esi %t
+; RUN: not grep push %t
+
+; This corresponds to:
+;int t(int a, int b) {
+; while (a != b) {
+; if (a > b)
+; a -= b;
+; else
+; b -= a;
+; }
+; return a;
+;}
+
+
+define i32 @t(i32 %a, i32 %b) nounwind {
+entry:
+ %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ br i1 %tmp1434, label %bb17, label %bb.outer
+
+bb.outer: ; preds = %cond_false, %entry
+ %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
+ %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %cond_true, %bb.outer
+ %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
+ %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
+ %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]
+ %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]
+ %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
+ br i1 %tmp3, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
+ %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp1437, label %bb17, label %bb
+
+cond_false: ; preds = %bb
+ %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
+ %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb17, label %bb.outer
+
+bb17: ; preds = %cond_false, %cond_true, %entry
+ %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
+ ret i32 %a_addr.026.1
+}
diff --git a/test/CodeGen/X86/lsr-sort.ll b/test/CodeGen/X86/lsr-sort.ll
new file mode 100644
index 0000000..1f3b59a
--- /dev/null
+++ b/test/CodeGen/X86/lsr-sort.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep inc %t | count 1
+; RUN: not grep incw %t
+
+@X = common global i16 0 ; <i16*> [#uses=1]
+
+define i32 @foo(i32 %N) nounwind {
+entry:
+ %0 = icmp sgt i32 %N, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %return
+
+bb: ; preds = %bb, %entry
+ %i.03 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %1 = trunc i32 %i.03 to i16 ; <i16> [#uses=1]
+ volatile store i16 %1, i16* @X, align 2
+ %indvar.next = add i32 %i.03, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ %h = phi i32 [ 0, %entry ], [ %indvar.next, %bb ]
+ ret i32 %h
+}
diff --git a/test/CodeGen/X86/masked-iv-safe.ll b/test/CodeGen/X86/masked-iv-safe.ll
new file mode 100644
index 0000000..bc493bd
--- /dev/null
+++ b/test/CodeGen/X86/masked-iv-safe.ll
@@ -0,0 +1,244 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: not grep and %t
+; RUN: not grep movz %t
+; RUN: not grep sar %t
+; RUN: not grep shl %t
+; RUN: grep add %t | count 2
+; RUN: grep inc %t | count 4
+; RUN: grep dec %t | count 2
+; RUN: grep lea %t | count 2
+
+; Optimize away zext-inreg and sext-inreg on the loop induction
+; variable using trip-count information.
+
+define void @count_up(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 10
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @count_down(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 10, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @count_up_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 10
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @count_down_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 10, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @another_count_up(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 18446744073709551615, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @another_count_down(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 18446744073709551615
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @another_count_up_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 18446744073709551615, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @another_count_down_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 18446744073709551615
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/X86/masked-iv-unsafe.ll b/test/CodeGen/X86/masked-iv-unsafe.ll
new file mode 100644
index 0000000..f23c020
--- /dev/null
+++ b/test/CodeGen/X86/masked-iv-unsafe.ll
@@ -0,0 +1,386 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep and %t | count 6
+; RUN: grep movzb %t | count 6
+; RUN: grep sar %t | count 12
+
+; Don't optimize away zext-inreg and sext-inreg on the loop induction
+; variable, because it isn't safe to do so in these cases.
+
+define void @count_up(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 10, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @count_down(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 10, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 20
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @count_up_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 10, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @count_down_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 10, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 20
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @another_count_up(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, %n
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @another_count_down(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ %n, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 10
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @another_count_up_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, %n
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @another_count_down_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ %n, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 10
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @yet_another_count_down(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 18446744073709551615
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @yet_another_count_up(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 3
+ %exitcond = icmp eq i64 %indvar.next, 10
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @still_another_count_down(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 10, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 3
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @yet_another_count_up_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 3
+ %exitcond = icmp eq i64 %indvar.next, 10
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+define void @yet_another_count_down_signed(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 10, %entry ], [ %indvar.next, %loop ]
+ %s0 = shl i64 %indvar, 8
+ %indvar.i8 = ashr i64 %s0, 8
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %s1 = shl i64 %indvar, 24
+ %indvar.i24 = ashr i64 %s1, 24
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = sub i64 %indvar, 3
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
+
+
+
diff --git a/test/CodeGen/X86/maskmovdqu.ll b/test/CodeGen/X86/maskmovdqu.ll
new file mode 100644
index 0000000..7796f0e
--- /dev/null
+++ b/test/CodeGen/X86/maskmovdqu.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep -i EDI
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep -i RDI
+; rdar://6573467
+
+define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind {
+entry:
+ tail call void @llvm.x86.sse2.maskmov.dqu( <16 x i8> %a, <16 x i8> %b, i8* %c )
+ ret void
+}
+
+declare void @llvm.x86.sse2.maskmov.dqu(<16 x i8>, <16 x i8>, i8*) nounwind
diff --git a/test/CodeGen/X86/memcmp.ll b/test/CodeGen/X86/memcmp.ll
new file mode 100644
index 0000000..b90d2e2
--- /dev/null
+++ b/test/CodeGen/X86/memcmp.ll
@@ -0,0 +1,110 @@
+; RUN: llc %s -o - -march=x86-64 | FileCheck %s
+
+; This tests codegen time inlining/optimization of memcmp
+; rdar://6480398
+
[email protected] = private constant [23 x i8] c"fooooooooooooooooooooo\00", align 1 ; <[23 x i8]*> [#uses=1]
+
+declare i32 @memcmp(...)
+
+define void @memcmp2(i8* %X, i8* %Y, i32* nocapture %P) nounwind {
+entry:
+ %0 = tail call i32 (...)* @memcmp(i8* %X, i8* %Y, i32 2) nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %return, label %bb
+
+bb: ; preds = %entry
+ store i32 4, i32* %P, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+; CHECK: memcmp2:
+; CHECK: movw (%rsi), %ax
+; CHECK: cmpw %ax, (%rdi)
+}
+
+define void @memcmp2a(i8* %X, i32* nocapture %P) nounwind {
+entry:
+ %0 = tail call i32 (...)* @memcmp(i8* %X, i8* getelementptr inbounds ([23 x i8]* @.str, i32 0, i32 1), i32 2) nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %return, label %bb
+
+bb: ; preds = %entry
+ store i32 4, i32* %P, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+; CHECK: memcmp2a:
+; CHECK: cmpw $28527, (%rdi)
+}
+
+
+define void @memcmp4(i8* %X, i8* %Y, i32* nocapture %P) nounwind {
+entry:
+ %0 = tail call i32 (...)* @memcmp(i8* %X, i8* %Y, i32 4) nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %return, label %bb
+
+bb: ; preds = %entry
+ store i32 4, i32* %P, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+; CHECK: memcmp4:
+; CHECK: movl (%rsi), %eax
+; CHECK: cmpl %eax, (%rdi)
+}
+
+define void @memcmp4a(i8* %X, i32* nocapture %P) nounwind {
+entry:
+ %0 = tail call i32 (...)* @memcmp(i8* %X, i8* getelementptr inbounds ([23 x i8]* @.str, i32 0, i32 1), i32 4) nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %return, label %bb
+
+bb: ; preds = %entry
+ store i32 4, i32* %P, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+; CHECK: memcmp4a:
+; CHECK: cmpl $1869573999, (%rdi)
+}
+
+define void @memcmp8(i8* %X, i8* %Y, i32* nocapture %P) nounwind {
+entry:
+ %0 = tail call i32 (...)* @memcmp(i8* %X, i8* %Y, i32 8) nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %return, label %bb
+
+bb: ; preds = %entry
+ store i32 4, i32* %P, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+; CHECK: memcmp8:
+; CHECK: movq (%rsi), %rax
+; CHECK: cmpq %rax, (%rdi)
+}
+
+define void @memcmp8a(i8* %X, i32* nocapture %P) nounwind {
+entry:
+ %0 = tail call i32 (...)* @memcmp(i8* %X, i8* getelementptr inbounds ([23 x i8]* @.str, i32 0, i32 0), i32 8) nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %return, label %bb
+
+bb: ; preds = %entry
+ store i32 4, i32* %P, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+; CHECK: memcmp8a:
+; CHECK: movabsq $8029759185026510694, %rax
+; CHECK: cmpq %rax, (%rdi)
+}
+
diff --git a/test/CodeGen/X86/memcpy-2.ll b/test/CodeGen/X86/memcpy-2.ll
new file mode 100644
index 0000000..2dc939e
--- /dev/null
+++ b/test/CodeGen/X86/memcpy-2.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7
+; RUN: llc < %s -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 5
+
+ %struct.ParmT = type { [25 x i8], i8, i8* }
[email protected] = internal constant [25 x i8] c"image\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" ; <[25 x i8]*> [#uses=1]
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+define void @t(i32 %argc, i8** %argv) nounwind {
+entry:
+ %parms.i = alloca [13 x %struct.ParmT] ; <[13 x %struct.ParmT]*> [#uses=1]
+ %parms1.i = getelementptr [13 x %struct.ParmT]* %parms.i, i32 0, i32 0, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %parms1.i, i8* getelementptr ([25 x i8]* @.str12, i32 0, i32 0), i32 25, i32 1 ) nounwind
+ unreachable
+}
diff --git a/test/CodeGen/X86/memcpy.ll b/test/CodeGen/X86/memcpy.ll
new file mode 100644
index 0000000..24530cd
--- /dev/null
+++ b/test/CodeGen/X86/memcpy.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86-64 | grep call.*memcpy | count 2
+
+declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
+
+define i8* @my_memcpy(i8* %a, i8* %b, i64 %n) {
+entry:
+ tail call void @llvm.memcpy.i64( i8* %a, i8* %b, i64 %n, i32 1 )
+ ret i8* %a
+}
+
+define i8* @my_memcpy2(i64* %a, i64* %b, i64 %n) {
+entry:
+ %tmp14 = bitcast i64* %a to i8*
+ %tmp25 = bitcast i64* %b to i8*
+ tail call void @llvm.memcpy.i64(i8* %tmp14, i8* %tmp25, i64 %n, i32 8 )
+ ret i8* %tmp14
+}
diff --git a/test/CodeGen/X86/memmove-0.ll b/test/CodeGen/X86/memmove-0.ll
new file mode 100644
index 0000000..d405068
--- /dev/null
+++ b/test/CodeGen/X86/memmove-0.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memcpy}
+
+declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
+
+define void @foo(i8* noalias %d, i8* noalias %s, i64 %l)
+{
+ call void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 1)
+ ret void
+}
diff --git a/test/CodeGen/X86/memmove-1.ll b/test/CodeGen/X86/memmove-1.ll
new file mode 100644
index 0000000..2057be88
--- /dev/null
+++ b/test/CodeGen/X86/memmove-1.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove}
+
+declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
+
+define void @foo(i8* %d, i8* %s, i64 %l)
+{
+ call void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 1)
+ ret void
+}
diff --git a/test/CodeGen/X86/memmove-2.ll b/test/CodeGen/X86/memmove-2.ll
new file mode 100644
index 0000000..68a9f4d
--- /dev/null
+++ b/test/CodeGen/X86/memmove-2.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | not grep call
+
+declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
+
+define void @foo(i8* noalias %d, i8* noalias %s)
+{
+ call void @llvm.memmove.i64(i8* %d, i8* %s, i64 32, i32 1)
+ ret void
+}
diff --git a/test/CodeGen/X86/memmove-3.ll b/test/CodeGen/X86/memmove-3.ll
new file mode 100644
index 0000000..d8a419c
--- /dev/null
+++ b/test/CodeGen/X86/memmove-3.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove}
+
+declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
+
+define void @foo(i8* %d, i8* %s)
+{
+ call void @llvm.memmove.i64(i8* %d, i8* %s, i64 32, i32 1)
+ ret void
+}
diff --git a/test/CodeGen/X86/memmove-4.ll b/test/CodeGen/X86/memmove-4.ll
new file mode 100644
index 0000000..027db1f
--- /dev/null
+++ b/test/CodeGen/X86/memmove-4.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s | not grep call
+
+target triple = "i686-pc-linux-gnu"
+
+define void @a(i8* %a, i8* %b) nounwind {
+ %tmp2 = bitcast i8* %a to i8*
+ %tmp3 = bitcast i8* %b to i8*
+ tail call void @llvm.memmove.i32( i8* %tmp2, i8* %tmp3, i32 12, i32 4 )
+ ret void
+}
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/X86/memset-2.ll b/test/CodeGen/X86/memset-2.ll
new file mode 100644
index 0000000..7deb52f
--- /dev/null
+++ b/test/CodeGen/X86/memset-2.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s | not grep rep
+; RUN: llc < %s | grep memset
+
+target triple = "i386"
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
+
+define fastcc i32 @cli_scanzip(i32 %desc) nounwind {
+entry:
+ br label %bb8.i.i.i.i
+
+bb8.i.i.i.i: ; preds = %bb8.i.i.i.i, %entry
+ icmp eq i32 0, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb61.i.i.i, label %bb8.i.i.i.i
+
+bb32.i.i.i: ; preds = %bb61.i.i.i
+ ptrtoint i8* %tail.0.i.i.i to i32 ; <i32>:1 [#uses=1]
+ sub i32 0, %1 ; <i32>:2 [#uses=1]
+ icmp sgt i32 %2, 19 ; <i1>:3 [#uses=1]
+ br i1 %3, label %bb34.i.i.i, label %bb61.i.i.i
+
+bb34.i.i.i: ; preds = %bb32.i.i.i
+ load i32* null, align 4 ; <i32>:4 [#uses=1]
+ icmp eq i32 %4, 101010256 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb8.i11.i.i.i, label %bb61.i.i.i
+
+bb8.i11.i.i.i: ; preds = %bb8.i11.i.i.i, %bb34.i.i.i
+ icmp eq i32 0, 0 ; <i1>:6 [#uses=1]
+ br i1 %6, label %cli_dbgmsg.exit49.i, label %bb8.i11.i.i.i
+
+cli_dbgmsg.exit49.i: ; preds = %bb8.i11.i.i.i
+ icmp eq [32768 x i8]* null, null ; <i1>:7 [#uses=1]
+ br i1 %7, label %bb1.i28.i, label %bb8.i.i
+
+bb61.i.i.i: ; preds = %bb61.i.i.i, %bb34.i.i.i, %bb32.i.i.i, %bb8.i.i.i.i
+ %tail.0.i.i.i = getelementptr [1024 x i8]* null, i32 0, i32 0 ; <i8*> [#uses=2]
+ load i8* %tail.0.i.i.i, align 1 ; <i8>:8 [#uses=1]
+ icmp eq i8 %8, 80 ; <i1>:9 [#uses=1]
+ br i1 %9, label %bb32.i.i.i, label %bb61.i.i.i
+
+bb1.i28.i: ; preds = %cli_dbgmsg.exit49.i
+ call void @llvm.memset.i32( i8* null, i8 0, i32 88, i32 1 ) nounwind
+ unreachable
+
+bb8.i.i: ; preds = %bb8.i.i, %cli_dbgmsg.exit49.i
+ br label %bb8.i.i
+}
diff --git a/test/CodeGen/X86/memset.ll b/test/CodeGen/X86/memset.ll
new file mode 100644
index 0000000..cf7464d
--- /dev/null
+++ b/test/CodeGen/X86/memset.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 9
+; RUN: llc < %s -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 3
+
+ %struct.x = type { i16, i16 }
+
+define void @t() nounwind {
+entry:
+ %up_mvd = alloca [8 x %struct.x] ; <[8 x %struct.x]*> [#uses=2]
+ %up_mvd116 = getelementptr [8 x %struct.x]* %up_mvd, i32 0, i32 0 ; <%struct.x*> [#uses=1]
+ %tmp110117 = bitcast [8 x %struct.x]* %up_mvd to i8* ; <i8*> [#uses=1]
+ call void @llvm.memset.i64( i8* %tmp110117, i8 0, i64 32, i32 8 )
+ call void @foo( %struct.x* %up_mvd116 ) nounwind
+ ret void
+}
+
+declare void @foo(%struct.x*)
+
+declare void @llvm.memset.i64(i8*, i8, i64, i32) nounwind
diff --git a/test/CodeGen/X86/memset64-on-x86-32.ll b/test/CodeGen/X86/memset64-on-x86-32.ll
new file mode 100644
index 0000000..da8fc51
--- /dev/null
+++ b/test/CodeGen/X86/memset64-on-x86-32.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep stosl
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movq | count 10
+
+define void @bork() nounwind {
+entry:
+ call void @llvm.memset.i64( i8* null, i8 0, i64 80, i32 4 )
+ ret void
+}
+
+declare void @llvm.memset.i64(i8*, i8, i64, i32) nounwind
+
diff --git a/test/CodeGen/X86/mfence.ll b/test/CodeGen/X86/mfence.ll
new file mode 100644
index 0000000..a1b2283
--- /dev/null
+++ b/test/CodeGen/X86/mfence.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep sfence
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep lfence
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mfence
+
+
+declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
+
+define void @test() {
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 false, i1 false, i1 true)
+ call void @llvm.memory.barrier( i1 true, i1 false, i1 true, i1 false, i1 true)
+ call void @llvm.memory.barrier( i1 true, i1 false, i1 false, i1 true, i1 true)
+
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 false, i1 true)
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 false, i1 true, i1 true)
+ call void @llvm.memory.barrier( i1 true, i1 false, i1 true, i1 true, i1 true)
+
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true , i1 true)
+ call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 false , i1 true)
+ ret void
+}
diff --git a/test/CodeGen/X86/mingw-alloca.ll b/test/CodeGen/X86/mingw-alloca.ll
new file mode 100644
index 0000000..7dcd84d
--- /dev/null
+++ b/test/CodeGen/X86/mingw-alloca.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i386-pc-mingw32"
+
+define void @foo1(i32 %N) nounwind {
+entry:
+; CHECK: _foo1:
+; CHECK: call __alloca
+ %tmp14 = alloca i32, i32 %N ; <i32*> [#uses=1]
+ call void @bar1( i32* %tmp14 )
+ ret void
+}
+
+declare void @bar1(i32*)
+
+define void @foo2(i32 inreg %N) nounwind {
+entry:
+; CHECK: _foo2:
+; CHECK: andl $-16, %esp
+; CHECK: pushl %eax
+; CHECK: call __alloca
+; CHECK: movl 8028(%esp), %eax
+ %A2 = alloca [2000 x i32], align 16 ; <[2000 x i32]*> [#uses=1]
+ %A2.sub = getelementptr [2000 x i32]* %A2, i32 0, i32 0 ; <i32*> [#uses=1]
+ call void @bar2( i32* %A2.sub, i32 %N )
+ ret void
+}
+
+declare void @bar2(i32*, i32)
diff --git a/test/CodeGen/X86/mmx-arg-passing.ll b/test/CodeGen/X86/mmx-arg-passing.ll
new file mode 100644
index 0000000..426e98e
--- /dev/null
+++ b/test/CodeGen/X86/mmx-arg-passing.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep mm0 | count 3
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep esp | count 1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep xmm0
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep rdi
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | not grep movups
+;
+; On Darwin x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].
+; On Darwin x86-32, v1i64 values are passed in memory.
+; On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].
+; On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.
+
+@u1 = external global <8 x i8>
+
+define void @t1(<8 x i8> %v1) nounwind {
+ store <8 x i8> %v1, <8 x i8>* @u1, align 8
+ ret void
+}
+
+@u2 = external global <1 x i64>
+
+define void @t2(<1 x i64> %v1) nounwind {
+ store <1 x i64> %v1, <1 x i64>* @u2, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/mmx-arg-passing2.ll b/test/CodeGen/X86/mmx-arg-passing2.ll
new file mode 100644
index 0000000..c42af08
--- /dev/null
+++ b/test/CodeGen/X86/mmx-arg-passing2.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movq2dq | count 1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2
+
+@g_v8qi = external global <8 x i8>
+
+define void @t1() nounwind {
+ %tmp3 = load <8 x i8>* @g_v8qi, align 8
+ %tmp4 = tail call i32 (...)* @pass_v8qi( <8 x i8> %tmp3 ) nounwind
+ ret void
+}
+
+define void @t2(<8 x i8> %v1, <8 x i8> %v2) nounwind {
+ %tmp3 = add <8 x i8> %v1, %v2
+ %tmp4 = tail call i32 (...)* @pass_v8qi( <8 x i8> %tmp3 ) nounwind
+ ret void
+}
+
+define void @t3() nounwind {
+ call void @pass_v1di( <1 x i64> zeroinitializer )
+ ret void
+}
+
+declare i32 @pass_v8qi(...)
+declare void @pass_v1di(<1 x i64>)
diff --git a/test/CodeGen/X86/mmx-arith.ll b/test/CodeGen/X86/mmx-arith.ll
new file mode 100644
index 0000000..e4dfdbf
--- /dev/null
+++ b/test/CodeGen/X86/mmx-arith.ll
@@ -0,0 +1,131 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx
+
+;; A basic sanity check to make sure that MMX arithmetic actually compiles.
+
+define void @foo(<8 x i8>* %A, <8 x i8>* %B) {
+entry:
+ %tmp1 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1]
+ %tmp3 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp4 = add <8 x i8> %tmp1, %tmp3 ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp4, <8 x i8>* %A
+ %tmp7 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp12 = tail call <8 x i8> @llvm.x86.mmx.padds.b( <8 x i8> %tmp4, <8 x i8> %tmp7 ) ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp12, <8 x i8>* %A
+ %tmp16 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp21 = tail call <8 x i8> @llvm.x86.mmx.paddus.b( <8 x i8> %tmp12, <8 x i8> %tmp16 ) ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp21, <8 x i8>* %A
+ %tmp27 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp28 = sub <8 x i8> %tmp21, %tmp27 ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp28, <8 x i8>* %A
+ %tmp31 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp36 = tail call <8 x i8> @llvm.x86.mmx.psubs.b( <8 x i8> %tmp28, <8 x i8> %tmp31 ) ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp36, <8 x i8>* %A
+ %tmp40 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp45 = tail call <8 x i8> @llvm.x86.mmx.psubus.b( <8 x i8> %tmp36, <8 x i8> %tmp40 ) ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp45, <8 x i8>* %A
+ %tmp51 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp52 = mul <8 x i8> %tmp45, %tmp51 ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp52, <8 x i8>* %A
+ %tmp57 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp58 = and <8 x i8> %tmp52, %tmp57 ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp58, <8 x i8>* %A
+ %tmp63 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp64 = or <8 x i8> %tmp58, %tmp63 ; <<8 x i8>> [#uses=2]
+ store <8 x i8> %tmp64, <8 x i8>* %A
+ %tmp69 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
+ %tmp70 = xor <8 x i8> %tmp64, %tmp69 ; <<8 x i8>> [#uses=1]
+ store <8 x i8> %tmp70, <8 x i8>* %A
+ tail call void @llvm.x86.mmx.emms( )
+ ret void
+}
+
+define void @baz(<2 x i32>* %A, <2 x i32>* %B) {
+entry:
+ %tmp1 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1]
+ %tmp3 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1]
+ %tmp4 = add <2 x i32> %tmp1, %tmp3 ; <<2 x i32>> [#uses=2]
+ store <2 x i32> %tmp4, <2 x i32>* %A
+ %tmp9 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1]
+ %tmp10 = sub <2 x i32> %tmp4, %tmp9 ; <<2 x i32>> [#uses=2]
+ store <2 x i32> %tmp10, <2 x i32>* %A
+ %tmp15 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1]
+ %tmp16 = mul <2 x i32> %tmp10, %tmp15 ; <<2 x i32>> [#uses=2]
+ store <2 x i32> %tmp16, <2 x i32>* %A
+ %tmp21 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1]
+ %tmp22 = and <2 x i32> %tmp16, %tmp21 ; <<2 x i32>> [#uses=2]
+ store <2 x i32> %tmp22, <2 x i32>* %A
+ %tmp27 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1]
+ %tmp28 = or <2 x i32> %tmp22, %tmp27 ; <<2 x i32>> [#uses=2]
+ store <2 x i32> %tmp28, <2 x i32>* %A
+ %tmp33 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1]
+ %tmp34 = xor <2 x i32> %tmp28, %tmp33 ; <<2 x i32>> [#uses=1]
+ store <2 x i32> %tmp34, <2 x i32>* %A
+ tail call void @llvm.x86.mmx.emms( )
+ ret void
+}
+
+define void @bar(<4 x i16>* %A, <4 x i16>* %B) {
+entry:
+ %tmp1 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1]
+ %tmp3 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp4 = add <4 x i16> %tmp1, %tmp3 ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp4, <4 x i16>* %A
+ %tmp7 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp12 = tail call <4 x i16> @llvm.x86.mmx.padds.w( <4 x i16> %tmp4, <4 x i16> %tmp7 ) ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp12, <4 x i16>* %A
+ %tmp16 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp21 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp12, <4 x i16> %tmp16 ) ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp21, <4 x i16>* %A
+ %tmp27 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp28 = sub <4 x i16> %tmp21, %tmp27 ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp28, <4 x i16>* %A
+ %tmp31 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp36 = tail call <4 x i16> @llvm.x86.mmx.psubs.w( <4 x i16> %tmp28, <4 x i16> %tmp31 ) ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp36, <4 x i16>* %A
+ %tmp40 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp45 = tail call <4 x i16> @llvm.x86.mmx.psubus.w( <4 x i16> %tmp36, <4 x i16> %tmp40 ) ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp45, <4 x i16>* %A
+ %tmp51 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp52 = mul <4 x i16> %tmp45, %tmp51 ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp52, <4 x i16>* %A
+ %tmp55 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp60 = tail call <4 x i16> @llvm.x86.mmx.pmulh.w( <4 x i16> %tmp52, <4 x i16> %tmp55 ) ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp60, <4 x i16>* %A
+ %tmp64 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp69 = tail call <2 x i32> @llvm.x86.mmx.pmadd.wd( <4 x i16> %tmp60, <4 x i16> %tmp64 ) ; <<2 x i32>> [#uses=1]
+ %tmp70 = bitcast <2 x i32> %tmp69 to <4 x i16> ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp70, <4 x i16>* %A
+ %tmp75 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp76 = and <4 x i16> %tmp70, %tmp75 ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp76, <4 x i16>* %A
+ %tmp81 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp82 = or <4 x i16> %tmp76, %tmp81 ; <<4 x i16>> [#uses=2]
+ store <4 x i16> %tmp82, <4 x i16>* %A
+ %tmp87 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
+ %tmp88 = xor <4 x i16> %tmp82, %tmp87 ; <<4 x i16>> [#uses=1]
+ store <4 x i16> %tmp88, <4 x i16>* %A
+ tail call void @llvm.x86.mmx.emms( )
+ ret void
+}
+
+declare <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8>, <8 x i8>)
+
+declare <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8>, <8 x i8>)
+
+declare <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8>, <8 x i8>)
+
+declare <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8>, <8 x i8>)
+
+declare <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16>, <4 x i16>)
+
+declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>)
+
+declare <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16>, <4 x i16>)
+
+declare <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16>, <4 x i16>)
+
+declare <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16>, <4 x i16>)
+
+declare <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16>, <4 x i16>)
+
+declare void @llvm.x86.mmx.emms()
diff --git a/test/CodeGen/X86/mmx-bitcast-to-i64.ll b/test/CodeGen/X86/mmx-bitcast-to-i64.ll
new file mode 100644
index 0000000..1fd8f67
--- /dev/null
+++ b/test/CodeGen/X86/mmx-bitcast-to-i64.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86-64 | grep movd | count 4
+
+define i64 @foo(<1 x i64>* %p) {
+ %t = load <1 x i64>* %p
+ %u = add <1 x i64> %t, %t
+ %s = bitcast <1 x i64> %u to i64
+ ret i64 %s
+}
+define i64 @goo(<2 x i32>* %p) {
+ %t = load <2 x i32>* %p
+ %u = add <2 x i32> %t, %t
+ %s = bitcast <2 x i32> %u to i64
+ ret i64 %s
+}
+define i64 @hoo(<4 x i16>* %p) {
+ %t = load <4 x i16>* %p
+ %u = add <4 x i16> %t, %t
+ %s = bitcast <4 x i16> %u to i64
+ ret i64 %s
+}
+define i64 @ioo(<8 x i8>* %p) {
+ %t = load <8 x i8>* %p
+ %u = add <8 x i8> %t, %t
+ %s = bitcast <8 x i8> %u to i64
+ ret i64 %s
+}
diff --git a/test/CodeGen/X86/mmx-copy-gprs.ll b/test/CodeGen/X86/mmx-copy-gprs.ll
new file mode 100644
index 0000000..3607043
--- /dev/null
+++ b/test/CodeGen/X86/mmx-copy-gprs.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 | grep {movq.*(%rsi), %rax}
+; RUN: llc < %s -march=x86 -mattr=-sse2 | grep {movl.*4(%eax),}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movsd.(%eax),}
+
+; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
+; increases the places that need to use emms.
+
+; rdar://5741668
+
+define void @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind {
+entry:
+ %tmp1 = load <1 x i64>* %y, align 8 ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %tmp1, <1 x i64>* %x, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/mmx-emms.ll b/test/CodeGen/X86/mmx-emms.ll
new file mode 100644
index 0000000..5ff2588
--- /dev/null
+++ b/test/CodeGen/X86/mmx-emms.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep emms
+define void @foo() {
+entry:
+ call void @llvm.x86.mmx.emms( )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare void @llvm.x86.mmx.emms()
diff --git a/test/CodeGen/X86/mmx-insert-element.ll b/test/CodeGen/X86/mmx-insert-element.ll
new file mode 100644
index 0000000..a063ee1
--- /dev/null
+++ b/test/CodeGen/X86/mmx-insert-element.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movq
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq
+
+define <2 x i32> @qux(i32 %A) nounwind {
+ %tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1 ; <<2 x i32>> [#uses=1]
+ ret <2 x i32> %tmp3
+}
diff --git a/test/CodeGen/X86/mmx-pinsrw.ll b/test/CodeGen/X86/mmx-pinsrw.ll
new file mode 100644
index 0000000..3af09f4
--- /dev/null
+++ b/test/CodeGen/X86/mmx-pinsrw.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep pinsrw | count 1
+; PR2562
+
+external global i16 ; <i16*>:0 [#uses=1]
+external global <4 x i16> ; <<4 x i16>*>:1 [#uses=2]
+
+declare void @abort()
+
+define void @""() {
+ load i16* @0 ; <i16>:1 [#uses=1]
+ load <4 x i16>* @1 ; <<4 x i16>>:2 [#uses=1]
+ insertelement <4 x i16> %2, i16 %1, i32 0 ; <<4 x i16>>:3 [#uses=1]
+ store <4 x i16> %3, <4 x i16>* @1
+ ret void
+}
diff --git a/test/CodeGen/X86/mmx-punpckhdq.ll b/test/CodeGen/X86/mmx-punpckhdq.ll
new file mode 100644
index 0000000..0af7e01
--- /dev/null
+++ b/test/CodeGen/X86/mmx-punpckhdq.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep punpckhdq | count 1
+
+define void @bork(<1 x i64>* %x) {
+entry:
+ %tmp2 = load <1 x i64>* %x ; <<1 x i64>> [#uses=1]
+ %tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32> ; <<2 x i32>> [#uses=1]
+ %tmp9 = shufflevector <2 x i32> %tmp6, <2 x i32> undef, <2 x i32> < i32 1, i32 1 > ; <<2 x i32>> [#uses=1]
+ %tmp10 = bitcast <2 x i32> %tmp9 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %tmp10, <1 x i64>* %x
+ tail call void @llvm.x86.mmx.emms( )
+ ret void
+}
+
+declare void @llvm.x86.mmx.emms()
diff --git a/test/CodeGen/X86/mmx-s2v.ll b/test/CodeGen/X86/mmx-s2v.ll
new file mode 100644
index 0000000..c98023c
--- /dev/null
+++ b/test/CodeGen/X86/mmx-s2v.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx
+; PR2574
+
+define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) {; <label>:0
+ br i1 true, label %bb.nph, label %._crit_edge
+
+bb.nph: ; preds = %bb.nph, %0
+ %t2206f2.0 = phi <2 x float> [ %2, %bb.nph ], [ undef, %0 ] ; <<2 x float>> [#uses=1]
+ insertelement <2 x float> %t2206f2.0, float 0.000000e+00, i32 0 ; <<2 x float>>:1 [#uses=1]
+ insertelement <2 x float> %1, float 0.000000e+00, i32 1 ; <<2 x float>>:2 [#uses=1]
+ br label %bb.nph
+
+._crit_edge: ; preds = %0
+ ret void
+}
diff --git a/test/CodeGen/X86/mmx-shift.ll b/test/CodeGen/X86/mmx-shift.ll
new file mode 100644
index 0000000..dd0aa2c
--- /dev/null
+++ b/test/CodeGen/X86/mmx-shift.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq | grep 32
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psllq | grep 32
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep psrad
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psrlw
+
+define i64 @t1(<1 x i64> %mm1) nounwind {
+entry:
+ %tmp6 = tail call <1 x i64> @llvm.x86.mmx.pslli.q( <1 x i64> %mm1, i32 32 ) ; <<1 x i64>> [#uses=1]
+ %retval1112 = bitcast <1 x i64> %tmp6 to i64 ; <i64> [#uses=1]
+ ret i64 %retval1112
+}
+
+declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32) nounwind readnone
+
+define i64 @t2(<2 x i32> %mm1, <2 x i32> %mm2) nounwind {
+entry:
+ %tmp7 = tail call <2 x i32> @llvm.x86.mmx.psra.d( <2 x i32> %mm1, <2 x i32> %mm2 ) nounwind readnone ; <<2 x i32>> [#uses=1]
+ %retval1112 = bitcast <2 x i32> %tmp7 to i64 ; <i64> [#uses=1]
+ ret i64 %retval1112
+}
+
+declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <2 x i32>) nounwind readnone
+
+define i64 @t3(<1 x i64> %mm1, i32 %bits) nounwind {
+entry:
+ %tmp6 = bitcast <1 x i64> %mm1 to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp8 = tail call <4 x i16> @llvm.x86.mmx.psrli.w( <4 x i16> %tmp6, i32 %bits ) nounwind readnone ; <<4 x i16>> [#uses=1]
+ %retval1314 = bitcast <4 x i16> %tmp8 to i64 ; <i64> [#uses=1]
+ ret i64 %retval1314
+}
+
+declare <4 x i16> @llvm.x86.mmx.psrli.w(<4 x i16>, i32) nounwind readnone
diff --git a/test/CodeGen/X86/mmx-shuffle.ll b/test/CodeGen/X86/mmx-shuffle.ll
new file mode 100644
index 0000000..e3125c7
--- /dev/null
+++ b/test/CodeGen/X86/mmx-shuffle.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mcpu=yonah
+; PR1427
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+ %struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* }
+ %struct.QBasicAtomic = type { i32 }
+ %struct.QClipData = type { i32, "struct.QClipData::ClipLine"*, i32, i32, %struct.QT_FT_Span*, i32, i32, i32, i32 }
+ "struct.QClipData::ClipLine" = type { i32, %struct.QT_FT_Span* }
+ %struct.QRasterBuffer = type { %struct.QRect, %struct.QRegion, %struct.QClipData*, %struct.QClipData*, i8, i32, i32, %struct.DrawHelper*, i32, i32, i32, i8* }
+ %struct.QRect = type { i32, i32, i32, i32 }
+ %struct.QRegion = type { "struct.QRegion::QRegionData"* }
+ "struct.QRegion::QRegionData" = type { %struct.QBasicAtomic, %struct._XRegion*, i8*, %struct.QRegionPrivate* }
+ %struct.QRegionPrivate = type opaque
+ %struct.QT_FT_Span = type { i16, i16, i16, i8 }
+ %struct._XRegion = type opaque
+
+define void @_Z19qt_bitmapblit16_sseP13QRasterBufferiijPKhiii(%struct.QRasterBuffer* %rasterBuffer, i32 %x, i32 %y, i32 %color, i8* %src, i32 %width, i32 %height, i32 %stride) {
+entry:
+ %tmp528 = bitcast <8 x i8> zeroinitializer to <2 x i32> ; <<2 x i32>> [#uses=1]
+ %tmp529 = and <2 x i32> %tmp528, bitcast (<4 x i16> < i16 -32640, i16 16448, i16 8224, i16 4112 > to <2 x i32>) ; <<2 x i32>> [#uses=1]
+ %tmp542 = bitcast <2 x i32> %tmp529 to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp543 = add <4 x i16> %tmp542, < i16 0, i16 16448, i16 24672, i16 28784 > ; <<4 x i16>> [#uses=1]
+ %tmp555 = bitcast <4 x i16> %tmp543 to <8 x i8> ; <<8 x i8>> [#uses=1]
+ tail call void @llvm.x86.mmx.maskmovq( <8 x i8> zeroinitializer, <8 x i8> %tmp555, i8* null )
+ ret void
+}
+
+declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*)
diff --git a/test/CodeGen/X86/mmx-vzmovl-2.ll b/test/CodeGen/X86/mmx-vzmovl-2.ll
new file mode 100644
index 0000000..8253c20
--- /dev/null
+++ b/test/CodeGen/X86/mmx-vzmovl-2.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep pxor
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep punpckldq
+
+ %struct.vS1024 = type { [8 x <4 x i32>] }
+ %struct.vS512 = type { [4 x <4 x i32>] }
+
+declare <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64>, i32) nounwind readnone
+
+define void @t() nounwind {
+entry:
+ br label %bb554
+
+bb554: ; preds = %bb554, %entry
+ %sum.0.reg2mem.0 = phi <1 x i64> [ %tmp562, %bb554 ], [ zeroinitializer, %entry ] ; <<1 x i64>> [#uses=1]
+ %0 = load <1 x i64>* null, align 8 ; <<1 x i64>> [#uses=2]
+ %1 = bitcast <1 x i64> %0 to <2 x i32> ; <<2 x i32>> [#uses=1]
+ %tmp555 = and <2 x i32> %1, < i32 -1, i32 0 > ; <<2 x i32>> [#uses=1]
+ %2 = bitcast <2 x i32> %tmp555 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ %3 = call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %0, i32 32) nounwind readnone ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %sum.0.reg2mem.0, <1 x i64>* null
+ %tmp558 = add <1 x i64> %sum.0.reg2mem.0, %2 ; <<1 x i64>> [#uses=1]
+ %4 = call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %tmp558, i32 32) nounwind readnone ; <<1 x i64>> [#uses=1]
+ %tmp562 = add <1 x i64> %4, %3 ; <<1 x i64>> [#uses=1]
+ br label %bb554
+}
diff --git a/test/CodeGen/X86/mmx-vzmovl.ll b/test/CodeGen/X86/mmx-vzmovl.ll
new file mode 100644
index 0000000..d21e240
--- /dev/null
+++ b/test/CodeGen/X86/mmx-vzmovl.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movd
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movq
+
+define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind {
+entry:
+ %0 = load <1 x i64>* %a, align 8 ; <<1 x i64>> [#uses=1]
+ %1 = bitcast <1 x i64> %0 to <2 x i32> ; <<2 x i32>> [#uses=1]
+ %2 = and <2 x i32> %1, < i32 -1, i32 0 > ; <<2 x i32>> [#uses=1]
+ %3 = bitcast <2 x i32> %2 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ store <1 x i64> %3, <1 x i64>* %b, align 8
+ br label %bb2
+
+bb2: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/movfs.ll b/test/CodeGen/X86/movfs.ll
new file mode 100644
index 0000000..823e986
--- /dev/null
+++ b/test/CodeGen/X86/movfs.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | grep fs
+
+define i32 @foo() nounwind readonly {
+entry:
+ %tmp = load i32* addrspace(257)* getelementptr (i32* addrspace(257)* inttoptr (i32 72 to i32* addrspace(257)*), i32 31) ; <i32*> [#uses=1]
+ %tmp1 = load i32* %tmp ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll
new file mode 100644
index 0000000..b04048b
--- /dev/null
+++ b/test/CodeGen/X86/movgs.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | grep gs
+
+define i32 @foo() nounwind readonly {
+entry:
+ %tmp = load i32* addrspace(256)* getelementptr (i32* addrspace(256)* inttoptr (i32 72 to i32* addrspace(256)*), i32 31) ; <i32*> [#uses=1]
+ %tmp1 = load i32* %tmp ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/mul-legalize.ll b/test/CodeGen/X86/mul-legalize.ll
new file mode 100644
index 0000000..069737d
--- /dev/null
+++ b/test/CodeGen/X86/mul-legalize.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 | grep 24576
+; PR2135
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
[email protected] = constant [13 x i8] c"c45531m.adb\00\00"
+
+define void @main() nounwind {
+entry:
+ %tmp1 = call i1 @report__equal( i32 3, i32 3 )
+ %b.0 = select i1 %tmp1, i64 35184372088832, i64 0
+ %tmp7 = mul i64 3, %b.0
+ %tmp32 = icmp eq i64 %tmp7, 105553116266496
+ br i1 %tmp32, label %return, label %bb35
+bb35:
+ call void @abort( )
+ unreachable
+return:
+ ret void
+}
+
+declare i1 @report__equal(i32 %x, i32 %y) nounwind
+
+declare void @abort()
diff --git a/test/CodeGen/X86/mul-remat.ll b/test/CodeGen/X86/mul-remat.ll
new file mode 100644
index 0000000..3fa0050
--- /dev/null
+++ b/test/CodeGen/X86/mul-remat.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | grep mov | count 1
+; PR1874
+
+define i32 @test(i32 %a, i32 %b) {
+entry:
+ %tmp3 = mul i32 %b, %a
+ ret i32 %tmp3
+}
diff --git a/test/CodeGen/X86/mul-shift-reassoc.ll b/test/CodeGen/X86/mul-shift-reassoc.ll
new file mode 100644
index 0000000..3777d8b
--- /dev/null
+++ b/test/CodeGen/X86/mul-shift-reassoc.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 | grep lea
+; RUN: llc < %s -march=x86 | not grep add
+
+define i32 @test(i32 %X, i32 %Y) {
+ ; Push the shl through the mul to allow an LEA to be formed, instead
+ ; of using a shift and add separately.
+ %tmp.2 = shl i32 %X, 1 ; <i32> [#uses=1]
+ %tmp.3 = mul i32 %tmp.2, %Y ; <i32> [#uses=1]
+ %tmp.5 = add i32 %tmp.3, %Y ; <i32> [#uses=1]
+ ret i32 %tmp.5
+}
+
diff --git a/test/CodeGen/X86/mul128.ll b/test/CodeGen/X86/mul128.ll
new file mode 100644
index 0000000..6825b99
--- /dev/null
+++ b/test/CodeGen/X86/mul128.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86-64 | grep mul | count 3
+
+define i128 @foo(i128 %t, i128 %u) {
+ %k = mul i128 %t, %u
+ ret i128 %k
+}
diff --git a/test/CodeGen/X86/mul64.ll b/test/CodeGen/X86/mul64.ll
new file mode 100644
index 0000000..5a25c5d
--- /dev/null
+++ b/test/CodeGen/X86/mul64.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86 | grep mul | count 3
+
+define i64 @foo(i64 %t, i64 %u) {
+ %k = mul i64 %t, %u
+ ret i64 %k
+}
diff --git a/test/CodeGen/X86/multiple-return-values-cross-block.ll b/test/CodeGen/X86/multiple-return-values-cross-block.ll
new file mode 100644
index 0000000..e9837d0
--- /dev/null
+++ b/test/CodeGen/X86/multiple-return-values-cross-block.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86
+
+declare {x86_fp80, x86_fp80} @test()
+
+define void @call2(x86_fp80 *%P1, x86_fp80 *%P2) {
+ %a = call {x86_fp80,x86_fp80} @test()
+ %b = getresult {x86_fp80,x86_fp80} %a, 1
+ store x86_fp80 %b, x86_fp80* %P1
+br label %L
+
+L:
+ %c = getresult {x86_fp80,x86_fp80} %a, 0
+ store x86_fp80 %c, x86_fp80* %P2
+ ret void
+}
diff --git a/test/CodeGen/X86/multiple-return-values.ll b/test/CodeGen/X86/multiple-return-values.ll
new file mode 100644
index 0000000..018d997
--- /dev/null
+++ b/test/CodeGen/X86/multiple-return-values.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86
+
+define {i64, float} @bar(i64 %a, float %b) {
+ %y = add i64 %a, 7
+ %z = fadd float %b, 7.0
+ ret i64 %y, float %z
+}
+
+define i64 @foo() {
+ %M = call {i64, float} @bar(i64 21, float 21.0)
+ %N = getresult {i64, float} %M, 0
+ %O = getresult {i64, float} %M, 1
+ %P = fptosi float %O to i64
+ %Q = add i64 %P, %N
+ ret i64 %Q
+}
diff --git a/test/CodeGen/X86/nancvt.ll b/test/CodeGen/X86/nancvt.ll
new file mode 100644
index 0000000..82b7331
--- /dev/null
+++ b/test/CodeGen/X86/nancvt.ll
@@ -0,0 +1,183 @@
+; RUN: opt < %s -std-compile-opts | llc > %t
+; RUN: grep 2147027116 %t | count 3
+; RUN: grep 2147228864 %t | count 3
+; RUN: grep 2146502828 %t | count 3
+; RUN: grep 2143034560 %t | count 3
+; Compile time conversions of NaNs.
+; ModuleID = 'nan2.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+ %struct..0anon = type { float }
+ %struct..1anon = type { double }
+@fnan = constant [3 x i32] [ i32 2143831397, i32 2143831396, i32 2143831398 ] ; <[3 x i32]*> [#uses=1]
+@dnan = constant [3 x i64] [ i64 9223235251041752696, i64 9223235251041752697, i64 9223235250773317239 ], align 8 ; <[3 x i64]*> [#uses=1]
+@fsnan = constant [3 x i32] [ i32 2139637093, i32 2139637092, i32 2139637094 ] ; <[3 x i32]*> [#uses=1]
+@dsnan = constant [3 x i64] [ i64 9220983451228067448, i64 9220983451228067449, i64 9220983450959631991 ], align 8 ; <[3 x i64]*> [#uses=1]
[email protected] = internal constant [10 x i8] c"%08x%08x\0A\00" ; <[10 x i8]*> [#uses=2]
[email protected] = internal constant [6 x i8] c"%08x\0A\00" ; <[6 x i8]*> [#uses=2]
+
+@var = external global i32
+
+define i32 @main() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ %i = alloca i32, align 4 ; <i32*> [#uses=20]
+ %uf = alloca %struct..0anon, align 4 ; <%struct..0anon*> [#uses=8]
+ %ud = alloca %struct..1anon, align 8 ; <%struct..1anon*> [#uses=10]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 0, i32* %i, align 4
+ br label %bb23
+
+bb: ; preds = %bb23
+ %tmp = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp1 = getelementptr [3 x i32]* @fnan, i32 0, i32 %tmp ; <i32*> [#uses=1]
+ %tmp2 = load i32* %tmp1, align 4 ; <i32> [#uses=1]
+ %tmp3 = getelementptr %struct..0anon* %uf, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp34 = bitcast float* %tmp3 to i32* ; <i32*> [#uses=1]
+ store i32 %tmp2, i32* %tmp34, align 4
+ %tmp5 = getelementptr %struct..0anon* %uf, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp6 = load float* %tmp5, align 4 ; <float> [#uses=1]
+ %tmp67 = fpext float %tmp6 to double ; <double> [#uses=1]
+ %tmp8 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %tmp67, double* %tmp8, align 8
+ %tmp9 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp910 = bitcast double* %tmp9 to i64* ; <i64*> [#uses=1]
+ %tmp11 = load i64* %tmp910, align 8 ; <i64> [#uses=1]
+ %tmp1112 = trunc i64 %tmp11 to i32 ; <i32> [#uses=1]
+ %tmp13 = and i32 %tmp1112, -1 ; <i32> [#uses=1]
+ %tmp14 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp1415 = bitcast double* %tmp14 to i64* ; <i64*> [#uses=1]
+ %tmp16 = load i64* %tmp1415, align 8 ; <i64> [#uses=1]
+ %.cast = zext i32 32 to i64 ; <i64> [#uses=1]
+ %tmp17 = ashr i64 %tmp16, %.cast ; <i64> [#uses=1]
+ %tmp1718 = trunc i64 %tmp17 to i32 ; <i32> [#uses=1]
+ %tmp19 = getelementptr [10 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1]
+ volatile store i32 %tmp1718, i32* @var
+ volatile store i32 %tmp13, i32* @var
+ %tmp21 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp22 = add i32 %tmp21, 1 ; <i32> [#uses=1]
+ store i32 %tmp22, i32* %i, align 4
+ br label %bb23
+
+bb23: ; preds = %bb, %entry
+ %tmp24 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp25 = icmp sle i32 %tmp24, 2 ; <i1> [#uses=1]
+ %tmp2526 = zext i1 %tmp25 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp2526, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb27
+
+bb27: ; preds = %bb23
+ store i32 0, i32* %i, align 4
+ br label %bb46
+
+bb28: ; preds = %bb46
+ %tmp29 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp30 = getelementptr [3 x i64]* @dnan, i32 0, i32 %tmp29 ; <i64*> [#uses=1]
+ %tmp31 = load i64* %tmp30, align 8 ; <i64> [#uses=1]
+ %tmp32 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp3233 = bitcast double* %tmp32 to i64* ; <i64*> [#uses=1]
+ store i64 %tmp31, i64* %tmp3233, align 8
+ %tmp35 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp36 = load double* %tmp35, align 8 ; <double> [#uses=1]
+ %tmp3637 = fptrunc double %tmp36 to float ; <float> [#uses=1]
+ %tmp38 = getelementptr %struct..0anon* %uf, i32 0, i32 0 ; <float*> [#uses=1]
+ store float %tmp3637, float* %tmp38, align 4
+ %tmp39 = getelementptr %struct..0anon* %uf, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp3940 = bitcast float* %tmp39 to i32* ; <i32*> [#uses=1]
+ %tmp41 = load i32* %tmp3940, align 4 ; <i32> [#uses=1]
+ %tmp42 = getelementptr [6 x i8]* @.str1, i32 0, i32 0 ; <i8*> [#uses=1]
+ volatile store i32 %tmp41, i32* @var
+ %tmp44 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp45 = add i32 %tmp44, 1 ; <i32> [#uses=1]
+ store i32 %tmp45, i32* %i, align 4
+ br label %bb46
+
+bb46: ; preds = %bb28, %bb27
+ %tmp47 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp48 = icmp sle i32 %tmp47, 2 ; <i1> [#uses=1]
+ %tmp4849 = zext i1 %tmp48 to i8 ; <i8> [#uses=1]
+ %toBool50 = icmp ne i8 %tmp4849, 0 ; <i1> [#uses=1]
+ br i1 %toBool50, label %bb28, label %bb51
+
+bb51: ; preds = %bb46
+ store i32 0, i32* %i, align 4
+ br label %bb78
+
+bb52: ; preds = %bb78
+ %tmp53 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp54 = getelementptr [3 x i32]* @fsnan, i32 0, i32 %tmp53 ; <i32*> [#uses=1]
+ %tmp55 = load i32* %tmp54, align 4 ; <i32> [#uses=1]
+ %tmp56 = getelementptr %struct..0anon* %uf, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp5657 = bitcast float* %tmp56 to i32* ; <i32*> [#uses=1]
+ store i32 %tmp55, i32* %tmp5657, align 4
+ %tmp58 = getelementptr %struct..0anon* %uf, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp59 = load float* %tmp58, align 4 ; <float> [#uses=1]
+ %tmp5960 = fpext float %tmp59 to double ; <double> [#uses=1]
+ %tmp61 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %tmp5960, double* %tmp61, align 8
+ %tmp62 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp6263 = bitcast double* %tmp62 to i64* ; <i64*> [#uses=1]
+ %tmp64 = load i64* %tmp6263, align 8 ; <i64> [#uses=1]
+ %tmp6465 = trunc i64 %tmp64 to i32 ; <i32> [#uses=1]
+ %tmp66 = and i32 %tmp6465, -1 ; <i32> [#uses=1]
+ %tmp68 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp6869 = bitcast double* %tmp68 to i64* ; <i64*> [#uses=1]
+ %tmp70 = load i64* %tmp6869, align 8 ; <i64> [#uses=1]
+ %.cast71 = zext i32 32 to i64 ; <i64> [#uses=1]
+ %tmp72 = ashr i64 %tmp70, %.cast71 ; <i64> [#uses=1]
+ %tmp7273 = trunc i64 %tmp72 to i32 ; <i32> [#uses=1]
+ %tmp74 = getelementptr [10 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1]
+ volatile store i32 %tmp7273, i32* @var
+ volatile store i32 %tmp66, i32* @var
+ %tmp76 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp77 = add i32 %tmp76, 1 ; <i32> [#uses=1]
+ store i32 %tmp77, i32* %i, align 4
+ br label %bb78
+
+bb78: ; preds = %bb52, %bb51
+ %tmp79 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp80 = icmp sle i32 %tmp79, 2 ; <i1> [#uses=1]
+ %tmp8081 = zext i1 %tmp80 to i8 ; <i8> [#uses=1]
+ %toBool82 = icmp ne i8 %tmp8081, 0 ; <i1> [#uses=1]
+ br i1 %toBool82, label %bb52, label %bb83
+
+bb83: ; preds = %bb78
+ store i32 0, i32* %i, align 4
+ br label %bb101
+
+bb84: ; preds = %bb101
+ %tmp85 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp86 = getelementptr [3 x i64]* @dsnan, i32 0, i32 %tmp85 ; <i64*> [#uses=1]
+ %tmp87 = load i64* %tmp86, align 8 ; <i64> [#uses=1]
+ %tmp88 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp8889 = bitcast double* %tmp88 to i64* ; <i64*> [#uses=1]
+ store i64 %tmp87, i64* %tmp8889, align 8
+ %tmp90 = getelementptr %struct..1anon* %ud, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp91 = load double* %tmp90, align 8 ; <double> [#uses=1]
+ %tmp9192 = fptrunc double %tmp91 to float ; <float> [#uses=1]
+ %tmp93 = getelementptr %struct..0anon* %uf, i32 0, i32 0 ; <float*> [#uses=1]
+ store float %tmp9192, float* %tmp93, align 4
+ %tmp94 = getelementptr %struct..0anon* %uf, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp9495 = bitcast float* %tmp94 to i32* ; <i32*> [#uses=1]
+ %tmp96 = load i32* %tmp9495, align 4 ; <i32> [#uses=1]
+ %tmp97 = getelementptr [6 x i8]* @.str1, i32 0, i32 0 ; <i8*> [#uses=1]
+ volatile store i32 %tmp96, i32* @var
+ %tmp99 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp100 = add i32 %tmp99, 1 ; <i32> [#uses=1]
+ store i32 %tmp100, i32* %i, align 4
+ br label %bb101
+
+bb101: ; preds = %bb84, %bb83
+ %tmp102 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp103 = icmp sle i32 %tmp102, 2 ; <i1> [#uses=1]
+ %tmp103104 = zext i1 %tmp103 to i8 ; <i8> [#uses=1]
+ %toBool105 = icmp ne i8 %tmp103104, 0 ; <i1> [#uses=1]
+ br i1 %toBool105, label %bb84, label %bb106
+
+bb106: ; preds = %bb101
+ br label %return
+
+return: ; preds = %bb106
+ %retval107 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval107
+}
diff --git a/test/CodeGen/X86/narrow_op-1.ll b/test/CodeGen/X86/narrow_op-1.ll
new file mode 100644
index 0000000..18f1108
--- /dev/null
+++ b/test/CodeGen/X86/narrow_op-1.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86-64 | grep orb | count 1
+; RUN: llc < %s -march=x86-64 | grep orb | grep 1
+; RUN: llc < %s -march=x86-64 | grep orl | count 1
+; RUN: llc < %s -march=x86-64 | grep orl | grep 16842752
+
+ %struct.bf = type { i64, i16, i16, i32 }
+@bfi = common global %struct.bf zeroinitializer, align 16
+
+define void @t1() nounwind optsize ssp {
+entry:
+ %0 = load i32* bitcast (i16* getelementptr (%struct.bf* @bfi, i32 0, i32 1) to i32*), align 8
+ %1 = or i32 %0, 65536
+ store i32 %1, i32* bitcast (i16* getelementptr (%struct.bf* @bfi, i32 0, i32 1) to i32*), align 8
+ ret void
+}
+
+define void @t2() nounwind optsize ssp {
+entry:
+ %0 = load i32* bitcast (i16* getelementptr (%struct.bf* @bfi, i32 0, i32 1) to i32*), align 8
+ %1 = or i32 %0, 16842752
+ store i32 %1, i32* bitcast (i16* getelementptr (%struct.bf* @bfi, i32 0, i32 1) to i32*), align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/narrow_op-2.ll b/test/CodeGen/X86/narrow_op-2.ll
new file mode 100644
index 0000000..796ef7a
--- /dev/null
+++ b/test/CodeGen/X86/narrow_op-2.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+ %struct.bf = type { i64, i16, i16, i32 }
+@bfi = external global %struct.bf*
+
+define void @t1() nounwind ssp {
+entry:
+
+; CHECK: andb $-2, 10(
+; CHECK: andb $-3, 10(
+
+ %0 = load %struct.bf** @bfi, align 8
+ %1 = getelementptr %struct.bf* %0, i64 0, i32 1
+ %2 = bitcast i16* %1 to i32*
+ %3 = load i32* %2, align 1
+ %4 = and i32 %3, -65537
+ store i32 %4, i32* %2, align 1
+ %5 = load %struct.bf** @bfi, align 8
+ %6 = getelementptr %struct.bf* %5, i64 0, i32 1
+ %7 = bitcast i16* %6 to i32*
+ %8 = load i32* %7, align 1
+ %9 = and i32 %8, -131073
+ store i32 %9, i32* %7, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/neg-shl-add.ll b/test/CodeGen/X86/neg-shl-add.ll
new file mode 100644
index 0000000..7aebc38
--- /dev/null
+++ b/test/CodeGen/X86/neg-shl-add.ll
@@ -0,0 +1,17 @@
+; RUN: llc -march=x86-64 < %s | not grep negq
+
+; These sequences don't need neg instructions; they can be done with
+; a single shift and sub each.
+
+define i64 @foo(i64 %x, i64 %y, i64 %n) nounwind {
+ %a = sub i64 0, %y
+ %b = shl i64 %a, %n
+ %c = add i64 %b, %x
+ ret i64 %c
+}
+define i64 @boo(i64 %x, i64 %y, i64 %n) nounwind {
+ %a = sub i64 0, %y
+ %b = shl i64 %a, %n
+ %c = add i64 %x, %b
+ ret i64 %c
+}
diff --git a/test/CodeGen/X86/neg_fp.ll b/test/CodeGen/X86/neg_fp.ll
new file mode 100644
index 0000000..57164f2
--- /dev/null
+++ b/test/CodeGen/X86/neg_fp.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t
+; RUN: grep xorps %t | count 1
+
+; Test that when we don't -enable-unsafe-fp-math, we don't do the optimization
+; -0 - (A - B) to (B - A) because A==B, -0 != 0
+
+define float @negfp(float %a, float %b) {
+entry:
+ %sub = fsub float %a, %b ; <float> [#uses=1]
+ %neg = fsub float -0.000000e+00, %sub ; <float> [#uses=1]
+ ret float %neg
+}
diff --git a/test/CodeGen/X86/negate-add-zero.ll b/test/CodeGen/X86/negate-add-zero.ll
new file mode 100644
index 0000000..c3f412e
--- /dev/null
+++ b/test/CodeGen/X86/negate-add-zero.ll
@@ -0,0 +1,1145 @@
+; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | not grep xor
+; PR3374
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ %struct.AtomList = type { %"struct.CDSListRep<IVMAtom*>"* }
+ %struct.AtomTree = type { %struct.IVM*, %"struct.CDSList<CDSList<HingeNode*> >" }
+ %"struct.CDS::DefaultAlloc" = type <{ i8 }>
+ %"struct.CDS::SingularError" = type { %"struct.CDS::exception" }
+ %"struct.CDS::auto_ptr<IVMAtom>" = type { %struct.IVMAtom* }
+ %"struct.CDS::exception" = type { [300 x i8] }
+ %"struct.CDSList<CDSList<HingeNode*> >" = type { %"struct.CDSListRep<CDSList<HingeNode*> >"* }
+ %"struct.CDSList<CDSList<int> >" = type { %"struct.CDSListRep<CDSList<int> >"* }
+ %"struct.CDSList<HingeNode*>" = type { %"struct.CDSListRep<HingeNode*>"* }
+ %"struct.CDSList<InternalDynamics::HingeSpec>" = type { %"struct.CDSListRep<InternalDynamics::HingeSpec>"* }
+ %"struct.CDSList<Loop>" = type { %"struct.CDSListRep<Loop>"* }
+ %"struct.CDSList<Pair<int, int> >" = type { %"struct.CDSListRep<Pair<int, int> >"* }
+ %"struct.CDSList<int>" = type { %"struct.CDSListRep<int>"* }
+ %"struct.CDSListRep<CDSList<HingeNode*> >" = type opaque
+ %"struct.CDSListRep<CDSList<int> >" = type opaque
+ %"struct.CDSListRep<HingeNode*>" = type { i32, i32, %struct.HingeNode**, i32 }
+ %"struct.CDSListRep<IVMAtom*>" = type { i32, i32, %struct.IVMAtom**, i32 }
+ %"struct.CDSListRep<InternalDynamics::HingeSpec>" = type opaque
+ %"struct.CDSListRep<Loop>" = type opaque
+ %"struct.CDSListRep<Pair<int, int> >" = type opaque
+ %"struct.CDSListRep<int>" = type { i32, i32, i32*, i32 }
+ %"struct.CDSMatrixBase<double>" = type { %"struct.CDSMatrixRep<double>"* }
+ %"struct.CDSMatrixRep<double>" = type opaque
+ %"struct.CDSStringRep<char>" = type { i8*, i32, i32, i32, i32 }
+ %"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>" = type { %"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>" }
+ %"struct.CDSVector<double,0,CDS::DefaultAlloc>" = type { %"struct.CDSVectorBase<double,CDS::DefaultAlloc>" }
+ %"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>" = type { %"struct.CDSVectorRep<Vec3,CDS::DefaultAlloc>"* }
+ %"struct.CDSVectorBase<double,CDS::DefaultAlloc>" = type { %"struct.CDSVectorRep<double,CDS::DefaultAlloc>"* }
+ %"struct.CDSVectorRep<Vec3,CDS::DefaultAlloc>" = type { i32, %"struct.CDS::DefaultAlloc", %struct.Vec3*, i32 }
+ %"struct.CDSVectorRep<double,CDS::DefaultAlloc>" = type { i32, %"struct.CDS::DefaultAlloc", double*, i32 }
+ %"struct.FixedMatrix<double,1,1,0,0>" = type { %"struct.FixedMatrixBase<double,1,1>" }
+ %"struct.FixedMatrix<double,1,3,0,0>" = type { %"struct.FixedMatrixBase<double,1,3>" }
+ %"struct.FixedMatrix<double,1,6,0,0>" = type { %"struct.FixedMatrixBase<double,1,6>" }
+ %"struct.FixedMatrix<double,2,2,0,0>" = type { %"struct.FixedMatrixBase<double,2,2>" }
+ %"struct.FixedMatrix<double,2,6,0,0>" = type { %"struct.FixedMatrixBase<double,2,6>" }
+ %"struct.FixedMatrix<double,3,3,0,0>" = type { %"struct.FixedMatrixBase<double,3,3>" }
+ %"struct.FixedMatrix<double,3,6,0,0>" = type { %"struct.FixedMatrixBase<double,3,6>" }
+ %"struct.FixedMatrix<double,5,5,0,0>" = type { %"struct.FixedMatrixBase<double,5,5>" }
+ %"struct.FixedMatrix<double,5,6,0,0>" = type { %"struct.FixedMatrixBase<double,5,6>" }
+ %"struct.FixedMatrixBase<double,1,1>" = type { [1 x double] }
+ %"struct.FixedMatrixBase<double,1,3>" = type { [3 x double] }
+ %"struct.FixedMatrixBase<double,1,6>" = type { [6 x double] }
+ %"struct.FixedMatrixBase<double,2,2>" = type { [4 x double] }
+ %"struct.FixedMatrixBase<double,2,6>" = type { [12 x double] }
+ %"struct.FixedMatrixBase<double,3,3>" = type { [9 x double] }
+ %"struct.FixedMatrixBase<double,3,6>" = type { [18 x double] }
+ %"struct.FixedMatrixBase<double,5,5>" = type { [25 x double] }
+ %"struct.FixedMatrixBase<double,5,6>" = type { [30 x double] }
+ %"struct.FixedMatrixBase<double,6,6>" = type { [36 x double] }
+ %"struct.FixedVector<double,2,0>" = type { %"struct.FixedVectorBase<double,2>" }
+ %"struct.FixedVector<double,5,0>" = type { %"struct.FixedVectorBase<double,5>" }
+ %"struct.FixedVectorBase<double,2>" = type { [2 x double] }
+ %"struct.FixedVectorBase<double,5>" = type { [5 x double] }
+ %struct.HNodeOrigin = type { %struct.HingeNode }
+ %struct.HNodeRotate2 = type { %"struct.HingeNodeSpec<2>", %struct.Vec3, %struct.Vec3, %struct.Vec3, %struct.Vec3, %struct.Vec3, %struct.Mat3, %struct.Mat3, %struct.Vec3, %"struct.CDS::auto_ptr<IVMAtom>", %"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>" }
+ %struct.HNodeRotate3 = type { %"struct.HingeNodeSpec<3>", %struct.Vec4, %struct.Vec4, %struct.Vec4, %struct.Vec3, %"struct.CDS::auto_ptr<IVMAtom>", %"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>", double, double, double, double, double, double, i8 }
+ %struct.HNodeTorsion = type { %"struct.HingeNodeSpec<1>", %struct.Vec3, %"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>", %struct.Vec3, %struct.Mat3 }
+ %struct.HNodeTranslate = type { %"struct.HingeNodeSpec<3>", %struct.IVMAtom*, %struct.Vec3, %"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>" }
+ %struct.HNodeTranslateRotate2 = type { %"struct.HingeNodeSpec<5>", %struct.Vec3, %struct.Vec3, %struct.Vec3, %struct.Vec3, %struct.Vec3, %struct.Mat3, %struct.Mat3, %struct.Vec3, %"struct.CDS::auto_ptr<IVMAtom>", %"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>" }
+ %struct.HNodeTranslateRotate3 = type { %"struct.HingeNodeSpec<6>", %struct.Vec4, %struct.Vec4, %struct.Vec4, %struct.Vec3, %"struct.CDS::auto_ptr<IVMAtom>", %"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>", double, double, double, double, double, double, i8 }
+ %struct.HingeNode = type { i32 (...)**, %struct.HingeNode*, %"struct.CDSList<HingeNode*>", i32, %struct.AtomList, %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %struct.PhiMatrix, %struct.Mat6, %struct.Mat6, %"struct.FixedMatrix<double,1,6,0,0>", %struct.Mat6, %"struct.FixedMatrix<double,1,6,0,0>", %struct.Mat3, %struct.Mat6, %struct.IVM*, %struct.IVMAtom* }
+ %"struct.HingeNodeSpec<1>" = type { %struct.HingeNode, i32, double, %struct.InertiaTensor, %struct.Mat6, %struct.Vec3, %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,1,0,0>", %"struct.FixedMatrix<double,1,1,0,0>", %"struct.FixedMatrix<double,1,1,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,1,0,0>", %"struct.FixedMatrix<double,1,1,0,0>", %"struct.FixedMatrix<double,1,1,0,0>", %"struct.FixedMatrix<double,1,1,0,0>", %"struct.FixedMatrix<double,1,6,0,0>" }
+ %"struct.HingeNodeSpec<2>" = type { %struct.HingeNode, i32, double, %struct.InertiaTensor, %struct.Mat6, %struct.Vec3, %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedVector<double,2,0>", %"struct.FixedVector<double,2,0>", %"struct.FixedVector<double,2,0>", %"struct.FixedMatrix<double,2,6,0,0>", %"struct.FixedVector<double,2,0>", %"struct.FixedVector<double,2,0>", %"struct.FixedVector<double,2,0>", %"struct.FixedMatrix<double,2,2,0,0>", %"struct.FixedMatrix<double,2,6,0,0>" }
+ %"struct.HingeNodeSpec<3>" = type { %struct.HingeNode, i32, double, %struct.InertiaTensor, %struct.Mat6, %struct.Vec3, %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,3,0,0>", %"struct.FixedMatrix<double,1,3,0,0>", %"struct.FixedMatrix<double,1,3,0,0>", %"struct.FixedMatrix<double,3,6,0,0>", %"struct.FixedMatrix<double,1,3,0,0>", %"struct.FixedMatrix<double,1,3,0,0>", %"struct.FixedMatrix<double,1,3,0,0>", %"struct.FixedMatrix<double,3,3,0,0>", %"struct.FixedMatrix<double,3,6,0,0>" }
+ %"struct.HingeNodeSpec<5>" = type { %struct.HingeNode, i32, double, %struct.InertiaTensor, %struct.Mat6, %struct.Vec3, %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedVector<double,5,0>", %"struct.FixedVector<double,5,0>", %"struct.FixedVector<double,5,0>", %"struct.FixedMatrix<double,5,6,0,0>", %"struct.FixedVector<double,5,0>", %"struct.FixedVector<double,5,0>", %"struct.FixedVector<double,5,0>", %"struct.FixedMatrix<double,5,5,0,0>", %"struct.FixedMatrix<double,5,6,0,0>" }
+ %"struct.HingeNodeSpec<6>" = type { %struct.HingeNode, i32, double, %struct.InertiaTensor, %struct.Mat6, %struct.Vec3, %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %struct.Mat6, %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %"struct.FixedMatrix<double,1,6,0,0>", %struct.Mat6, %struct.Mat6 }
+ %struct.IVM = type { i32 (...)**, %struct.AtomTree*, %struct.Integrator*, %struct.LengthConstraints*, i32, i32, i32, i8, i8, i8, i8, double, double, double, double, double, double, double, double, double, i32, double, double, double, double, double, double, %"struct.CDSList<Loop>", %"struct.CDSList<Pair<int, int> >", %struct.AtomList, %"struct.CDSList<CDSList<int> >", %"struct.CDSList<InternalDynamics::HingeSpec>", %struct.String, %"struct.CDSList<int>", i32 (%"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)*, double (%"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)*, i32 (%"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>"*)*, double (%"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<Vec3,0,CDS::DefaultAlloc>"*)* }
+ %struct.IVMAtom = type { i32, %struct.HingeNode*, %struct.AtomList, %struct.Vec3, %struct.Vec3, %struct.Vec3, double, double }
+ %struct.InertiaTensor = type { %struct.Mat3 }
+ %struct.Integrator = type { i32 (...)**, %"struct.CDSVector<double,0,CDS::DefaultAlloc>", %"struct.CDSVector<double,0,CDS::DefaultAlloc>", %struct.IVM* }
+ %"struct.InternalDynamics::HingeSpec" = type { %struct.String, i32, i32, %"struct.CDSList<int>" }
+ %struct.LengthConstraints = type { double, i32, i32, %struct.IVM*, %struct.LengthConstraintsPrivates* }
+ %struct.LengthConstraintsPrivates = type opaque
+ %struct.Mat3 = type { %"struct.FixedMatrix<double,3,3,0,0>" }
+ %struct.Mat6 = type { %"struct.FixedMatrixBase<double,6,6>" }
+ %"struct.MatrixTools::InverseResults<FullMatrix<double> >" = type { %"struct.CDSVector<double,0,CDS::DefaultAlloc>", i32 }
+ %struct.PhiMatrix = type { %struct.Vec3 }
+ %struct.PhiMatrixTranspose = type { %struct.PhiMatrix* }
+ %struct.RMat = type { %"struct.CDSMatrixBase<double>" }
+ %struct.String = type { %"struct.CDSStringRep<char>"* }
+ %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >" = type { %struct.Mat6*, i32, i32, i32, i32 }
+ %"struct.SubVector<CDSVector<double, 1, CDS::DefaultAlloc> >" = type { %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, i32, i32 }
+ %"struct.SubVector<FixedVector<double, 6, 0> >" = type { %"struct.FixedMatrix<double,1,6,0,0>"*, i32, i32 }
+ %struct.Vec3 = type { %"struct.FixedMatrix<double,1,3,0,0>" }
+ %struct.Vec4 = type { %"struct.FixedMatrix<double,2,2,0,0>" }
+ %struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo }
+ %struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, %"struct.std::type_info"* }
+ %struct.__type_info_pseudo = type { i8*, i8* }
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+ %"struct.std::type_info" = type { i32 (...)**, i8* }
+@_ZN9HingeNode7DEG2RADE = external constant double, align 8 ; <double*> [#uses=0]
+@"\01LC" = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
+@"\01LC1" = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
+@"\01LC2" = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
+@"\01LC3" = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
+@"\01LC4" = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
+@"\01LC5" = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
+@"\01LC6" = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
+@"\01LC7" = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
+@"\01LC8" = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
+@"\01LC9" = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
+@"\01LC10" = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
+@_ZStL8__ioinit = external global %"struct.CDS::DefaultAlloc" ; <%"struct.CDS::DefaultAlloc"*> [#uses=0]
+@__dso_handle = external global i8* ; <i8**> [#uses=0]
+@_ZTIN9HingeNode17VirtualBaseMethodE = external constant %struct.__class_type_info_pseudo ; <%struct.__class_type_info_pseudo*> [#uses=0]
+@_ZTVN10__cxxabiv117__class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=0]
+@_ZTSN9HingeNode17VirtualBaseMethodE = external constant [32 x i8], align 4 ; <[32 x i8]*> [#uses=0]
+@_ZTV9HingeNode = external constant [31 x i32 (...)*], align 32 ; <[31 x i32 (...)*]*> [#uses=0]
+@_ZTI9HingeNode = external constant %struct.__class_type_info_pseudo ; <%struct.__class_type_info_pseudo*> [#uses=0]
+@_ZTS9HingeNode = external constant [11 x i8] ; <[11 x i8]*> [#uses=0]
+@_ZTV11HNodeOrigin = external constant [31 x i32 (...)*], align 32 ; <[31 x i32 (...)*]*> [#uses=0]
+@_ZTI11HNodeOrigin = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTVN10__cxxabiv120__si_class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=0]
+@_ZTS11HNodeOrigin = external constant [14 x i8] ; <[14 x i8]*> [#uses=0]
+@_ZTV13HingeNodeSpecILi1EE = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI13HingeNodeSpecILi1EE = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS13HingeNodeSpecILi1EE = external constant [22 x i8] ; <[22 x i8]*> [#uses=0]
+@_ZTV13HingeNodeSpecILi3EE = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI13HingeNodeSpecILi3EE = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS13HingeNodeSpecILi3EE = external constant [22 x i8] ; <[22 x i8]*> [#uses=0]
+@_ZTV13HingeNodeSpecILi2EE = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI13HingeNodeSpecILi2EE = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS13HingeNodeSpecILi2EE = external constant [22 x i8] ; <[22 x i8]*> [#uses=0]
+@_ZTV13HingeNodeSpecILi6EE = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI13HingeNodeSpecILi6EE = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS13HingeNodeSpecILi6EE = external constant [22 x i8] ; <[22 x i8]*> [#uses=0]
+@_ZTV13HingeNodeSpecILi5EE = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI13HingeNodeSpecILi5EE = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS13HingeNodeSpecILi5EE = external constant [22 x i8] ; <[22 x i8]*> [#uses=0]
+@_ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+@"\01LC11" = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
+@"\01LC12" = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
+@"\01LC13" = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
+@_ZSt4cerr = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+@"\01LC14" = external constant [29 x i8] ; <[29 x i8]*> [#uses=0]
+@"\01LC15" = external constant [11 x i8] ; <[11 x i8]*> [#uses=0]
+@"\01LC16" = external constant [13 x i8] ; <[13 x i8]*> [#uses=0]
+@"\01LC17" = external constant [21 x i8] ; <[21 x i8]*> [#uses=0]
+@"\01LC18" = external constant [8 x i8] ; <[8 x i8]*> [#uses=0]
+@"\01LC19" = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
+@"\01LC20" = external constant [42 x i8] ; <[42 x i8]*> [#uses=0]
+@_ZTIN16InternalDynamics9ExceptionE = external constant %struct.__class_type_info_pseudo ; <%struct.__class_type_info_pseudo*> [#uses=0]
+@_ZTSN16InternalDynamics9ExceptionE = external constant [31 x i8], align 4 ; <[31 x i8]*> [#uses=0]
+@_ZTIN3CDS13SingularErrorE = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTSN3CDS13SingularErrorE = external constant [22 x i8] ; <[22 x i8]*> [#uses=0]
+@_ZTIN3CDS9exceptionE = external constant %struct.__class_type_info_pseudo ; <%struct.__class_type_info_pseudo*> [#uses=0]
+@_ZTSN3CDS9exceptionE = external constant [17 x i8] ; <[17 x i8]*> [#uses=0]
+@_ZTV12HNodeTorsion = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI12HNodeTorsion = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS12HNodeTorsion = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
+@_ZTV12HNodeRotate3 = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI12HNodeRotate3 = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS12HNodeRotate3 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
+@_ZTV12HNodeRotate2 = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI12HNodeRotate2 = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS12HNodeRotate2 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
+@_ZTV21HNodeTranslateRotate3 = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI21HNodeTranslateRotate3 = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS21HNodeTranslateRotate3 = external constant [24 x i8] ; <[24 x i8]*> [#uses=0]
+@_ZTV21HNodeTranslateRotate2 = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI21HNodeTranslateRotate2 = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS21HNodeTranslateRotate2 = external constant [24 x i8] ; <[24 x i8]*> [#uses=0]
+@_ZTV14HNodeTranslate = external constant [33 x i32 (...)*], align 32 ; <[33 x i32 (...)*]*> [#uses=0]
+@_ZTI14HNodeTranslate = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=0]
+@_ZTS14HNodeTranslate = external constant [17 x i8] ; <[17 x i8]*> [#uses=0]
+@"\01LC21" = external constant [31 x i8] ; <[31 x i8]*> [#uses=0]
+@"\01LC22" = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
+@"\01LC23" = external constant [12 x i8] ; <[12 x i8]*> [#uses=0]
+@"\01LC24" = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
+@"\01LC25" = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
+@"\01LC26" = external constant [7 x i8] ; <[7 x i8]*> [#uses=0]
+@"\01LC27" = external constant [43 x i8] ; <[43 x i8]*> [#uses=0]
+@"\01LC28" = external constant [15 x i8] ; <[15 x i8]*> [#uses=0]
+@"\01LC29" = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
+@"\01LC30" = external constant [41 x i8] ; <[41 x i8]*> [#uses=0]
[email protected]_ctors = external global [1 x { i32, void ()* }] ; <[1 x { i32, void ()* }]*> [#uses=0]
+
+declare void @_GLOBAL__I__ZN9HingeNode7DEG2RADE() section "__TEXT,__StaticInit,regular,pure_instructions"
+
+declare void @_ZN9HingeNode16velFromCartesianEv(%struct.HingeNode*) nounwind
+
+declare i32 @_ZNK9HingeNode6offsetEv(%struct.HingeNode*) nounwind
+
+declare i32 @_ZNK9HingeNode6getDOFEv(%struct.HingeNode*) nounwind
+
+declare i32 @_ZNK9HingeNode6getDimEv(%struct.HingeNode*) nounwind
+
+declare double @_ZN9HingeNode8kineticEEv(%struct.HingeNode*) nounwind
+
+declare double @_ZN9HingeNode8approxKEEv(%struct.HingeNode*) nounwind
+
+declare i8* @_ZN9HingeNode4typeEv(%struct.HingeNode*) nounwind
+
+declare i8* @_ZN11HNodeOrigin4typeEv(%struct.HNodeOrigin*) nounwind
+
+declare void @_ZN11HNodeOrigin5calcPEv(%struct.HNodeOrigin*) nounwind
+
+declare void @_ZN11HNodeOrigin5calcZEv(%struct.HNodeOrigin*) nounwind
+
+declare void @_ZN11HNodeOrigin9calcPandZEv(%struct.HNodeOrigin*) nounwind
+
+declare void @_ZN11HNodeOrigin9calcAccelEv(%struct.HNodeOrigin*) nounwind
+
+declare void @_ZN11HNodeOrigin17calcInternalForceEv(%struct.HNodeOrigin*) nounwind
+
+declare void @_ZN11HNodeOrigin18prepareVelInternalEv(%struct.HNodeOrigin*) nounwind
+
+declare void @_ZN11HNodeOrigin13propagateSVelERK11FixedVectorIdLi6ELi0EE(%struct.HNodeOrigin*, %"struct.FixedMatrix<double,1,6,0,0>"*) nounwind
+
+declare void @_ZN11HNodeOrigin9setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%struct.HNodeOrigin*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare void @_ZN11HNodeOrigin6setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeOrigin*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare void @_ZN11HNodeOrigin14setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%struct.HNodeOrigin*, %"struct.FixedMatrix<double,1,6,0,0>"*) nounwind
+
+declare void @_ZN11HNodeOrigin18enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES4_(%struct.HNodeOrigin*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare void @_ZN11HNodeOrigin5printEi(%struct.HNodeOrigin*, i32) nounwind
+
+declare void @_ZN11HNodeOrigin6getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeOrigin*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare void @_ZN11HNodeOrigin6getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeOrigin*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare void @_ZN11HNodeOrigin8getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeOrigin*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare void @_ZN11HNodeOrigin16getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeOrigin*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare void @_ZN11HNodeOrigin5calcYEv(%struct.HNodeOrigin*) nounwind
+
+declare i8* @_ZN14HNodeTranslate4typeEv(%struct.HNodeTranslate*) nounwind
+
+declare i8* @_ZN21HNodeTranslateRotate34typeEv(%struct.HNodeTranslateRotate3*) nounwind
+
+declare i32 @_ZNK21HNodeTranslateRotate36getDimEv(%struct.HNodeTranslateRotate3*) nounwind
+
+declare i8* @_ZN12HNodeRotate34typeEv(%struct.HNodeRotate3*) nounwind
+
+declare i32 @_ZNK12HNodeRotate36getDimEv(%struct.HNodeRotate3*) nounwind
+
+declare i8* @_ZN12HNodeRotate24typeEv(%struct.HNodeRotate2*) nounwind
+
+declare i32 @_ZNK12HNodeRotate26getDimEv(%struct.HNodeRotate2*) nounwind
+
+declare i8* @_ZN21HNodeTranslateRotate24typeEv(%struct.HNodeTranslateRotate2*) nounwind
+
+declare i32 @_ZNK21HNodeTranslateRotate26getDimEv(%struct.HNodeTranslateRotate2*) nounwind
+
+declare i8* @_ZN12HNodeTorsion4typeEv(%struct.HNodeTorsion*) nounwind
+
+declare fastcc double @_ZL12sumMassToTipPK9HingeNode(%struct.HingeNode*)
+
+declare void @_ZN13InertiaTensor4calcERK4Vec3RK7CDSListIP7IVMAtomE(%struct.InertiaTensor*, %struct.Vec3*, %struct.AtomList*) nounwind
+
+declare fastcc double @_ZL15sumInertiaToTipPK9HingeNodeRK4Vec3S4_(%struct.HingeNode*, %struct.Vec3*, %struct.Vec3*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsI11FixedVectorIdLi6ELi0EEERSoS2_RK9SubVectorIT_E(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.SubVector<FixedVector<double, 6, 0> >"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St5_Setw(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i32)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, double)
+
+declare void @_Z14orthoTransformIdLi3ELi3EE11FixedMatrixIT_XT1_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT0_ELi0ELi0EERKS0_IS1_XT1_EXT0_ELi0ELi0EE(%"struct.FixedMatrix<double,3,3,0,0>"* noalias sret, %"struct.FixedMatrix<double,3,3,0,0>"*, %"struct.FixedMatrix<double,3,3,0,0>"*)
+
+declare void @_ZN12HNodeRotate27calcRotEv(%struct.HNodeRotate2*)
+
+declare void @_ZN21HNodeTranslateRotate27calcRotEv(%struct.HNodeTranslateRotate2*)
+
+declare void @_ZmlIdLi6ELi6EE11FixedVectorIT_XT0_ELi0EERK11FixedMatrixIS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_ELi0EE(%"struct.FixedMatrix<double,1,6,0,0>"* noalias sret, %struct.Mat6*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZmlIdLi6ELi6ELi6EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%struct.Mat6* noalias sret, %struct.Mat6*, %struct.Mat6*)
+
+declare void @_ZmlIdLi6ELi6ELi3EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,3,6,0,0>"* noalias sret, %struct.Mat6*, %"struct.FixedMatrix<double,3,6,0,0>"*)
+
+declare void @_ZmlIdLi6ELi6ELi2EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,2,6,0,0>"* noalias sret, %struct.Mat6*, %"struct.FixedMatrix<double,2,6,0,0>"*)
+
+declare void @_ZmlIdLi5ELi6EE11FixedVectorIT_XT0_ELi0EERK11FixedMatrixIS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_ELi0EE(%"struct.FixedVector<double,5,0>"* noalias sret, %"struct.FixedMatrix<double,5,6,0,0>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZmlIdLi6ELi6ELi5EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,5,6,0,0>"* noalias sret, %struct.Mat6*, %"struct.FixedMatrix<double,5,6,0,0>"*)
+
+declare void @_ZN12HNodeRotate39setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%struct.HNodeRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate29setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%struct.HNodeRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate39setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%struct.HNodeTranslateRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate29setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%struct.HNodeTranslateRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare i32 @_ZNK13HingeNodeSpecILi1EE6offsetEv(%"struct.HingeNodeSpec<1>"*) nounwind
+
+declare %struct.Vec3* @_ZNK13HingeNodeSpecILi1EE5posCMEv(%"struct.HingeNodeSpec<1>"*) nounwind
+
+declare double* @_ZNK13HingeNodeSpecILi1EE4massEv(%"struct.HingeNodeSpec<1>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi1EE9calcPandZEv(%"struct.HingeNodeSpec<1>"*)
+
+declare i32 @_ZNK13HingeNodeSpecILi1EE6getDOFEv(%"struct.HingeNodeSpec<1>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi1EE6getDimEv(%"struct.HingeNodeSpec<1>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi1EE18enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%"struct.HingeNodeSpec<1>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi5EE6offsetEv(%"struct.HingeNodeSpec<5>"*) nounwind
+
+declare %struct.Vec3* @_ZNK13HingeNodeSpecILi5EE5posCMEv(%"struct.HingeNodeSpec<5>"*) nounwind
+
+declare double* @_ZNK13HingeNodeSpecILi5EE4massEv(%"struct.HingeNodeSpec<5>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi5EE9calcPandZEv(%"struct.HingeNodeSpec<5>"*)
+
+declare i32 @_ZNK13HingeNodeSpecILi5EE6getDOFEv(%"struct.HingeNodeSpec<5>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi5EE6getDimEv(%"struct.HingeNodeSpec<5>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi5EE18enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%"struct.HingeNodeSpec<5>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi2EE6offsetEv(%"struct.HingeNodeSpec<2>"*) nounwind
+
+declare %struct.Vec3* @_ZNK13HingeNodeSpecILi2EE5posCMEv(%"struct.HingeNodeSpec<2>"*) nounwind
+
+declare double* @_ZNK13HingeNodeSpecILi2EE4massEv(%"struct.HingeNodeSpec<2>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi2EE9calcPandZEv(%"struct.HingeNodeSpec<2>"*)
+
+declare i32 @_ZNK13HingeNodeSpecILi2EE6getDOFEv(%"struct.HingeNodeSpec<2>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi2EE6getDimEv(%"struct.HingeNodeSpec<2>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi2EE18enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%"struct.HingeNodeSpec<2>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi3EE6offsetEv(%"struct.HingeNodeSpec<3>"*) nounwind
+
+declare %struct.Vec3* @_ZNK13HingeNodeSpecILi3EE5posCMEv(%"struct.HingeNodeSpec<3>"*) nounwind
+
+declare double* @_ZNK13HingeNodeSpecILi3EE4massEv(%"struct.HingeNodeSpec<3>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi3EE9calcPandZEv(%"struct.HingeNodeSpec<3>"*)
+
+declare i32 @_ZNK13HingeNodeSpecILi3EE6getDOFEv(%"struct.HingeNodeSpec<3>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi6EE6offsetEv(%"struct.HingeNodeSpec<6>"*) nounwind
+
+declare %struct.Vec3* @_ZNK13HingeNodeSpecILi6EE5posCMEv(%"struct.HingeNodeSpec<6>"*) nounwind
+
+declare double* @_ZNK13HingeNodeSpecILi6EE4massEv(%"struct.HingeNodeSpec<6>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi6EE9calcPandZEv(%"struct.HingeNodeSpec<6>"*)
+
+declare i32 @_ZNK13HingeNodeSpecILi6EE6getDOFEv(%"struct.HingeNodeSpec<6>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi6EE6getDimEv(%"struct.HingeNodeSpec<6>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi6EE9setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES6_(%"struct.HingeNodeSpec<6>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE18enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%"struct.HingeNodeSpec<6>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare i32 @_ZNK13HingeNodeSpecILi3EE6getDimEv(%"struct.HingeNodeSpec<3>"*) nounwind
+
+declare void @_ZN13HingeNodeSpecILi3EE9setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES6_(%"struct.HingeNodeSpec<3>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE18enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%"struct.HingeNodeSpec<3>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*) nounwind
+
+declare void @_Z14orthoTransformIdLi6ELi6EE11FixedMatrixIT_XT1_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT0_ELi0ELi0EERKS0_IS1_XT1_EXT0_ELi0ELi0EE(%struct.Mat6* noalias sret, %struct.Mat6*, %struct.Mat6*)
+
+declare double @_ZN13HingeNodeSpecILi1EE8kineticEEv(%"struct.HingeNodeSpec<1>"*)
+
+declare double @_ZN13HingeNodeSpecILi3EE8kineticEEv(%"struct.HingeNodeSpec<3>"*)
+
+declare double @_ZN13HingeNodeSpecILi2EE8kineticEEv(%"struct.HingeNodeSpec<2>"*)
+
+declare double @_ZN13HingeNodeSpecILi6EE8kineticEEv(%"struct.HingeNodeSpec<6>"*)
+
+declare double @_ZN13HingeNodeSpecILi5EE8kineticEEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZmlIdLi6ELi5ELi6EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%struct.Mat6* noalias sret, %"struct.FixedMatrix<double,5,6,0,0>"*, %"struct.FixedMatrix<double,5,6,0,0>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE9setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES6_(%"struct.HingeNodeSpec<1>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE9setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES6_(%"struct.HingeNodeSpec<5>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE9setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES6_(%"struct.HingeNodeSpec<2>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_Z14orthoTransformIdLi3ELi6EE11FixedMatrixIT_XT1_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT0_ELi0ELi0EERKS0_IS1_XT1_EXT0_ELi0ELi0EE(%struct.Mat6* noalias sret, %"struct.FixedMatrix<double,3,3,0,0>"*, %"struct.FixedMatrix<double,3,6,0,0>"*)
+
+declare void @_ZmlIdLi6ELi1ELi6EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%struct.Mat6* noalias sret, %"struct.FixedMatrix<double,1,6,0,0>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZmlIdLi6ELi5ELi5EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,5,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,5,6,0,0>"*, %"struct.FixedMatrix<double,5,5,0,0>"*)
+
+declare void @_Z14orthoTransformIdLi5ELi6EE11FixedMatrixIT_XT1_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT0_ELi0ELi0EERKS0_IS1_XT1_EXT0_ELi0ELi0EE(%struct.Mat6* noalias sret, %"struct.FixedMatrix<double,5,5,0,0>"*, %"struct.FixedMatrix<double,5,6,0,0>"*)
+
+declare void @_Z14orthoTransformIdLi2ELi6EE11FixedMatrixIT_XT1_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT0_ELi0ELi0EERKS0_IS1_XT1_EXT0_ELi0ELi0EE(%struct.Mat6* noalias sret, %"struct.FixedMatrix<double,2,2,0,0>"*, %"struct.FixedMatrix<double,2,6,0,0>"*)
+
+declare void @_ZmlIdLi1ELi6ELi6EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,1,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,6,0,0>"*, %struct.Mat6*)
+
+declare void @_ZmlIdLi5ELi6ELi6EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,5,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,5,6,0,0>"*, %struct.Mat6*)
+
+declare void @_Z14orthoTransformIdLi6ELi5EE11FixedMatrixIT_XT1_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT0_ELi0ELi0EERKS0_IS1_XT1_EXT0_ELi0ELi0EE(%"struct.FixedMatrix<double,5,5,0,0>"* noalias sret, %struct.Mat6*, %"struct.FixedMatrix<double,5,6,0,0>"*)
+
+declare void @_ZmlIdLi2ELi6ELi6EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,2,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,2,6,0,0>"*, %struct.Mat6*)
+
+declare void @_Z14orthoTransformIdLi6ELi2EE11FixedMatrixIT_XT1_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT0_ELi0ELi0EERKS0_IS1_XT1_EXT0_ELi0ELi0EE(%"struct.FixedMatrix<double,2,2,0,0>"* noalias sret, %struct.Mat6*, %"struct.FixedMatrix<double,2,6,0,0>"*)
+
+declare void @_ZmlIdLi3ELi6ELi6EE11FixedMatrixIT_XT0_EXT2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT1_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,3,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,3,6,0,0>"*, %struct.Mat6*)
+
+declare void @_Z14orthoTransformIdLi6ELi3EE11FixedMatrixIT_XT1_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT0_ELi0ELi0EERKS0_IS1_XT1_EXT0_ELi0ELi0EE(%"struct.FixedMatrix<double,3,3,0,0>"* noalias sret, %struct.Mat6*, %"struct.FixedMatrix<double,3,6,0,0>"*)
+
+declare void @_ZNSt8ios_base4InitC1Ev(%"struct.CDS::DefaultAlloc"*)
+
+declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) nounwind
+
+declare void @__tcf_0(i8* nocapture)
+
+declare void @_ZNSt8ios_base4InitD1Ev(%"struct.CDS::DefaultAlloc"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsRSoRK9HingeNode(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %struct.HingeNode*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsRSoPK7IVMAtom(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %struct.IVMAtom*)
+
+declare void @_ZN9HingeNode8addChildEPS_(%struct.HingeNode*, %struct.HingeNode*)
+
+declare void @_ZN7CDSListIP9HingeNodeE6appendES1_(%"struct.CDSList<HingeNode*>"*, %struct.HingeNode*)
+
+declare void @_ZN9HingeNode4getHEv(%struct.RMat* noalias sret, %struct.HingeNode*)
+
+declare i8* @__cxa_allocate_exception(i32) nounwind
+
+declare void @__cxa_throw(i8*, i8*, void (i8*)*) noreturn
+
+declare void @_ZN9HingeNode16getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HingeNode*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN9HingeNode9calcAccelEv(%struct.HingeNode*)
+
+declare void @_ZN9HingeNode8getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HingeNode*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN9HingeNode6getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HingeNode*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN9HingeNode6getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HingeNode*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN9HingeNode5printEi(%struct.HingeNode*, i32)
+
+declare void @_ZN9HingeNode18enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES4_(%struct.HingeNode*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN9HingeNode14setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%struct.HingeNode*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN9HingeNode6setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HingeNode*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN9HingeNode9setPosVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEES5_(%struct.HingeNode*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN9HingeNode13propagateSVelERK11FixedVectorIdLi6ELi0EE(%struct.HingeNode*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN9HingeNode18prepareVelInternalEv(%struct.HingeNode*)
+
+declare void @_ZN9HingeNode17calcInternalForceEv(%struct.HingeNode*)
+
+declare void @_ZN9HingeNode5calcYEv(%struct.HingeNode*)
+
+declare void @_ZN9HingeNode9calcPandZEv(%struct.HingeNode*)
+
+declare void @_ZN9HingeNode5calcZEv(%struct.HingeNode*)
+
+declare void @_ZN9HingeNode5calcPEv(%struct.HingeNode*)
+
+declare double* @_ZNK9HingeNode4massEv(%struct.HingeNode*)
+
+declare %struct.Vec3* @_ZNK9HingeNode5posCMEv(%struct.HingeNode*)
+
+declare i8* @_Znam(i32)
+
+declare void @_ZN7CDSListIP9HingeNodeEC1Eii(%"struct.CDSList<HingeNode*>"*, i32, i32)
+
+declare i8* @_Znwm(i32)
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
+
+declare i32 @llvm.eh.typeid.for.i32(i8*) nounwind
+
+declare void @_ZdlPv(i8*) nounwind
+
+declare i32 @__gxx_personality_v0(...)
+
+declare void @_Unwind_Resume_or_Rethrow(i8*)
+
+declare void @_ZN7CDSListIP7IVMAtomEC1Eii(%struct.AtomList*, i32, i32)
+
+declare void @_ZN13CDSVectorBaseIdN3CDS12DefaultAllocEE8splitRepEv(%"struct.CDSVectorBase<double,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeTorsion16getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTorsion*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE8getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<1>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE6getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<1>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE6getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<1>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE16getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<1>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate316getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE16getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<3>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE8getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<3>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE6getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<3>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE6getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<3>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate216getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate28getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate26getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate26getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate38getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate36getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate36getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE16getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<2>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE8getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<2>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE6getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<2>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE6getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<2>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate316getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate38getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate36getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate36getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE16getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<6>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE8getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<6>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE6getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<6>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE6getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<6>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate216getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate28getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate26getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate26getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE16getInternalForceER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<5>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE8getAccelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<5>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE6getVelER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<5>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE6getPosER9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<5>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13CDSVectorBaseI4Vec3N3CDS12DefaultAllocEE8splitRepEv(%"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"*)
+
+declare void @_ZN7CDSListIP7IVMAtomE8splitRepEv(%struct.AtomList*)
+
+declare void @_ZN7CDSListIP9HingeNodeE8splitRepEv(%"struct.CDSList<HingeNode*>"*)
+
+declare void @_ZdaPv(i8*) nounwind
+
+declare void @_ZSt9terminatev() noreturn nounwind
+
+declare void @_ZN9HingeNodeC2EPK3IVMP7IVMAtomPKS3_PS_(%struct.HingeNode*, %struct.IVM*, %struct.IVMAtom*, %struct.IVMAtom*, %struct.HingeNode*)
+
+declare void @_ZN9HingeNodeD1Ev(%struct.HingeNode*)
+
+declare void @_ZN9HingeNodeD0Ev(%struct.HingeNode*)
+
+declare void @_ZN7CDSListIP7IVMAtomE6appendES1_(%struct.AtomList*, %struct.IVMAtom*)
+
+declare void @_ZN9HingeNodeC1EPK3IVMP7IVMAtomPKS3_PS_(%struct.HingeNode*, %struct.IVM*, %struct.IVMAtom*, %struct.IVMAtom*, %struct.HingeNode*)
+
+declare void @_ZN9HingeNodeD2Ev(%struct.HingeNode*)
+
+declare void @_ZN11HNodeOriginD0Ev(%struct.HNodeOrigin*)
+
+declare void @_ZN11HNodeOriginD1Ev(%struct.HNodeOrigin*)
+
+declare void @_ZN13HingeNodeSpecILi1EED0Ev(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EED1Ev(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE5calcPEv(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE5calcZEv(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE5calcYEv(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE17calcInternalForceEv(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE18prepareVelInternalEv(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE13propagateSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<1>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare double @_ZN13HingeNodeSpecILi1EE8approxKEEv(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE6setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<1>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE14setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<1>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE5printEi(%"struct.HingeNodeSpec<1>"*, i32)
+
+declare void @_ZN13HingeNodeSpecILi1EE9calcAccelEv(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE4getHEv(%struct.RMat* noalias sret, %"struct.HingeNodeSpec<1>"*)
+
+declare void @__cxa_pure_virtual() nounwind
+
+declare void @_ZN13HingeNodeSpecILi3EED0Ev(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EED1Ev(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE5calcPEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE5calcZEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE5calcYEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE17calcInternalForceEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE18prepareVelInternalEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE13propagateSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<3>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare double @_ZN13HingeNodeSpecILi3EE8approxKEEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE6setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<3>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE14setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<3>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE5printEi(%"struct.HingeNodeSpec<3>"*, i32)
+
+declare void @_ZN13HingeNodeSpecILi3EE9calcAccelEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE4getHEv(%struct.RMat* noalias sret, %"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EED0Ev(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EED1Ev(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE5calcPEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE5calcZEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE5calcYEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE17calcInternalForceEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE18prepareVelInternalEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE13propagateSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<2>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare double @_ZN13HingeNodeSpecILi2EE8approxKEEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE6setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<2>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE14setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<2>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE5printEi(%"struct.HingeNodeSpec<2>"*, i32)
+
+declare void @_ZN13HingeNodeSpecILi2EE9calcAccelEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE4getHEv(%struct.RMat* noalias sret, %"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EED0Ev(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EED1Ev(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE5calcPEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE5calcZEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE5calcYEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE17calcInternalForceEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE18prepareVelInternalEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE13propagateSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<6>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare double @_ZN13HingeNodeSpecILi6EE8approxKEEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE6setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<6>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE14setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<6>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE5printEi(%"struct.HingeNodeSpec<6>"*, i32)
+
+declare void @_ZN13HingeNodeSpecILi6EE9calcAccelEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE4getHEv(%struct.RMat* noalias sret, %"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EED0Ev(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EED1Ev(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE5calcPEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE5calcZEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE5calcYEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE17calcInternalForceEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE18prepareVelInternalEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE13propagateSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<5>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare double @_ZN13HingeNodeSpecILi5EE8approxKEEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE6setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%"struct.HingeNodeSpec<5>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE14setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%"struct.HingeNodeSpec<5>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE5printEi(%"struct.HingeNodeSpec<5>"*, i32)
+
+declare void @_ZN13HingeNodeSpecILi5EE9calcAccelEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE4getHEv(%struct.RMat* noalias sret, %"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN12HNodeTorsion7calcRotEv(%struct.HNodeTorsion*)
+
+declare double @sin(double) nounwind readnone
+
+declare double @cos(double) nounwind readnone
+
+declare void @_ZN12HNodeRotate37calcRotEv(%struct.HNodeRotate3*)
+
+declare void @_ZN21HNodeTranslateRotate37calcRotEv(%struct.HNodeTranslateRotate3*)
+
+declare void @_ZN9HingeNodeC2ERKS_(%struct.HingeNode*, %struct.HingeNode*)
+
+declare void @_ZN7CDSListIP9HingeNodeEC1ERKS2_(%"struct.CDSList<HingeNode*>"*, %"struct.CDSList<HingeNode*>"*)
+
+declare void @_ZN7CDSListIP7IVMAtomEC1ERKS2_(%struct.AtomList*, %struct.AtomList*)
+
+declare void @_ZN11HNodeOriginC2EPK9HingeNode(%struct.HNodeOrigin*, %struct.HingeNode*)
+
+declare void @_ZN13HingeNodeSpecILi1EEC2EPK9HingeNodeRi(%"struct.HingeNodeSpec<1>"*, %struct.HingeNode*, i32*)
+
+declare void @_ZN13HingeNodeSpecILi3EEC2EPK9HingeNodeRi(%"struct.HingeNodeSpec<3>"*, %struct.HingeNode*, i32*)
+
+declare void @_ZN13HingeNodeSpecILi2EEC2EPK9HingeNodeRi(%"struct.HingeNodeSpec<2>"*, %struct.HingeNode*, i32*)
+
+declare void @_ZN13HingeNodeSpecILi6EEC2EPK9HingeNodeRi(%"struct.HingeNodeSpec<6>"*, %struct.HingeNode*, i32*)
+
+declare void @_ZN13HingeNodeSpecILi5EEC2EPK9HingeNodeRi(%"struct.HingeNodeSpec<5>"*, %struct.HingeNode*, i32*)
+
+declare void @_ZplI4Vec3K11FixedVectorIdLi6ELi0EEET_RK9SubVectorIT0_ERKS4_(%struct.Vec3* noalias sret, %"struct.SubVector<FixedVector<double, 6, 0> >"*, %struct.Vec3*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi1ELi6ELi0ELi0EEEENT_13TransposeTypeERKS3_(%"struct.FixedMatrix<double,1,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN12HNodeRotate314setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%struct.HNodeRotate3*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN12HNodeRotate214setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%struct.HNodeRotate2*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN21HNodeTranslateRotate314setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%struct.HNodeTranslateRotate3*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN21HNodeTranslateRotate214setVelFromSVelERK11FixedVectorIdLi6ELi0EE(%struct.HNodeTranslateRotate2*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE9calcPropsEv(%"struct.HingeNodeSpec<1>"*)
+
+declare zeroext i8 @_ZNK3IVM12minimizationEv(%struct.IVM*)
+
+declare void @_Z8blockVecIdLi3ELi3EE11FixedVectorIT_XplT0_T1_ELi0EERKS0_IS1_XT0_ELi0EERKS0_IS1_XT1_ELi0EE(%"struct.FixedMatrix<double,1,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,3,0,0>"*, %"struct.FixedMatrix<double,1,3,0,0>"*)
+
+declare void @_ZN12HNodeTorsion11toCartesianEv(%struct.HNodeTorsion*)
+
+declare void @_ZN13HingeNodeSpecILi1EE18calcCartesianForceEv(%"struct.HingeNodeSpec<1>"*)
+
+declare void @_ZN13HingeNodeSpecILi3EE18calcCartesianForceEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN13HingeNodeSpecILi2EE18calcCartesianForceEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE18calcCartesianForceEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE18calcCartesianForceEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN12HNodeTorsion5calcHEv(%struct.HNodeTorsion*)
+
+declare void @_Z10blockMat12IdLi1ELi3ELi3EE11FixedMatrixIT_XT0_EXplT1_T2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,1,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,3,0,0>"*, %"struct.FixedMatrix<double,1,3,0,0>"*)
+
+declare void @_ZN13CDSMatrixBaseIdEC2I11FixedMatrixIdLi1ELi6ELi0ELi0EEEERKT_(%"struct.CDSMatrixBase<double>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi6ELi1ELi0ELi0EEEENT_13TransposeTypeERKS3_(%"struct.FixedMatrix<double,1,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St13_Setprecision(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i32)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi6EERSoS0_RK15FixedVectorBaseIT_XT0_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,1,6>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8 signext)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi3EERSoS0_RK15FixedVectorBaseIT_XT0_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,1,3>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi1EERSoS0_RK15FixedVectorBaseIT_XT0_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,1,1>"*)
+
+declare void @_ZN11FixedVectorIdLi3ELi0EE6subColILi6ELi1ELi0ELi0EEES0_RK11FixedMatrixIdXT_EXT0_EXT1_EXT2_EEiii(%"struct.FixedMatrix<double,1,3,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,6,0,0>"*, i32, i32, i32)
+
+declare %"struct.FixedMatrixBase<double,6,6>"* @_ZN15FixedMatrixBaseIdLi6ELi6EEpLERKS0_(%"struct.FixedMatrixBase<double,6,6>"*, %"struct.FixedMatrixBase<double,6,6>"*)
+
+declare void @_ZN13HingeNodeSpecILi6EE9calcPropsEv(%"struct.HingeNodeSpec<6>"*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi6ELi6ELi0ELi0EEEENT_13TransposeTypeERKS3_(%struct.Mat6* noalias sret, %struct.Mat6*)
+
+declare void @_ZN21HNodeTranslateRotate311toCartesianEv(%struct.HNodeTranslateRotate3*)
+
+define linkonce void @_ZN21HNodeTranslateRotate36setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate3* %this, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"* %velv) {
+entry:
+ %0 = add i32 0, -1 ; <i32> [#uses=1]
+ %1 = getelementptr double* null, i32 %0 ; <double*> [#uses=1]
+ %2 = load double* %1, align 8 ; <double> [#uses=1]
+ %3 = load double* null, align 8 ; <double> [#uses=2]
+ %4 = load double* null, align 8 ; <double> [#uses=2]
+ %5 = load double* null, align 8 ; <double> [#uses=3]
+ %6 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 2, i32 0, i32 0, i32 0, i32 0 ; <double*> [#uses=0]
+ %7 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 2, i32 0, i32 0, i32 0, i32 1 ; <double*> [#uses=0]
+ %8 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 2, i32 0, i32 0, i32 0, i32 2 ; <double*> [#uses=0]
+ %9 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 2, i32 0, i32 0, i32 0, i32 3 ; <double*> [#uses=0]
+ %10 = load double* null, align 8 ; <double> [#uses=2]
+ %11 = fsub double -0.000000e+00, %10 ; <double> [#uses=1]
+ %12 = load double* null, align 8 ; <double> [#uses=2]
+ %13 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 1, i32 0, i32 0, i32 0, i32 3 ; <double*> [#uses=1]
+ %14 = load double* %13, align 8 ; <double> [#uses=2]
+ %15 = fsub double -0.000000e+00, %14 ; <double> [#uses=1]
+ %16 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 1, i32 0, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %17 = load double* %16, align 8 ; <double> [#uses=2]
+ %18 = fsub double -0.000000e+00, %17 ; <double> [#uses=1]
+ %19 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 0 ; <double*> [#uses=0]
+ %20 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 3 ; <double*> [#uses=0]
+ %21 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 6 ; <double*> [#uses=0]
+ %22 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 9 ; <double*> [#uses=0]
+ %23 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 1 ; <double*> [#uses=0]
+ %24 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 4 ; <double*> [#uses=0]
+ %25 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 7 ; <double*> [#uses=0]
+ %26 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 10 ; <double*> [#uses=0]
+ %27 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 2 ; <double*> [#uses=0]
+ %28 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 5 ; <double*> [#uses=0]
+ %29 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 8 ; <double*> [#uses=0]
+ %30 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 11 ; <double*> [#uses=0]
+ %31 = getelementptr %"struct.FixedMatrix<double,1,3,0,0>"* null, i32 0, i32 0, i32 0, i32 0 ; <double*> [#uses=0]
+ %32 = getelementptr %"struct.FixedMatrix<double,1,3,0,0>"* null, i32 0, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %33 = getelementptr %"struct.FixedMatrix<double,1,3,0,0>"* null, i32 0, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ %34 = fmul double %17, %5 ; <double> [#uses=1]
+ %35 = fadd double 0.000000e+00, %34 ; <double> [#uses=1]
+ %36 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %37 = fmul double %14, %3 ; <double> [#uses=1]
+ %38 = fadd double %36, %37 ; <double> [#uses=1]
+ %39 = fmul double %12, %4 ; <double> [#uses=1]
+ %40 = fadd double %38, %39 ; <double> [#uses=1]
+ %41 = fmul double %5, %11 ; <double> [#uses=1]
+ %42 = fadd double %40, %41 ; <double> [#uses=2]
+ store double %42, double* %32, align 8
+ %43 = fmul double %2, %15 ; <double> [#uses=1]
+ %44 = fadd double %43, 0.000000e+00 ; <double> [#uses=1]
+ %45 = fmul double %3, %18 ; <double> [#uses=1]
+ %46 = fadd double %44, %45 ; <double> [#uses=1]
+ %47 = fmul double %10, %4 ; <double> [#uses=1]
+ %48 = fadd double %46, %47 ; <double> [#uses=1]
+ %49 = fmul double %12, %5 ; <double> [#uses=1]
+ %50 = fadd double %48, %49 ; <double> [#uses=2]
+ store double %50, double* %33, align 8
+ %51 = fmul double %35, 2.000000e+00 ; <double> [#uses=1]
+ %52 = fmul double %42, 2.000000e+00 ; <double> [#uses=1]
+ %53 = fmul double %50, 2.000000e+00 ; <double> [#uses=1]
+ %54 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 0, i32 10, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %51, double* %54, align 8
+ %55 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 0, i32 10, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %52, double* %55, align 8
+ %56 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 0, i32 10, i32 0, i32 0, i32 2 ; <double*> [#uses=1]
+ store double %53, double* %56, align 8
+ %57 = add i32 0, 4 ; <i32> [#uses=1]
+ %58 = getelementptr %"struct.SubVector<CDSVector<double, 1, CDS::DefaultAlloc> >"* null, i32 0, i32 0 ; <%"struct.CDSVector<double,0,CDS::DefaultAlloc>"**> [#uses=1]
+ store %"struct.CDSVector<double,0,CDS::DefaultAlloc>"* %velv, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"** %58, align 8
+ %59 = getelementptr %"struct.SubVector<CDSVector<double, 1, CDS::DefaultAlloc> >"* null, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %57, i32* %59, align 4
+ %60 = getelementptr %"struct.SubVector<CDSVector<double, 1, CDS::DefaultAlloc> >"* null, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 3, i32* %60, align 8
+ unreachable
+}
+
+declare void @_ZmlRK11FixedMatrixIdLi6ELi6ELi0ELi0EERK18PhiMatrixTranspose(%struct.Mat6* noalias sret, %struct.Mat6*, %struct.PhiMatrixTranspose*)
+
+declare void @_ZmlI4Mat3K11FixedMatrixIdLi6ELi6ELi0ELi0EEET_RK9SubMatrixIT0_ERKS4_(%struct.Mat3* noalias sret, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*, %struct.Mat3*)
+
+declare void @_ZmiI4Mat3K11FixedMatrixIdLi6ELi6ELi0ELi0EEET_RK9SubMatrixIT0_ERKS4_(%struct.Mat3* noalias sret, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*, %struct.Mat3*)
+
+declare %"struct.FixedMatrixBase<double,3,3>"* @_ZN15FixedMatrixBaseIdLi3ELi3EEmIERKS0_(%"struct.FixedMatrixBase<double,3,3>"*, %"struct.FixedMatrixBase<double,3,3>"*)
+
+declare void @_ZplI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RKS3_RK9SubMatrixIT0_E(%struct.Mat3* noalias sret, %struct.Mat3*, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*)
+
+declare void @_ZN13CDSVectorBaseIdN3CDS12DefaultAllocEED2Ev(%"struct.CDSVectorBase<double,CDS::DefaultAlloc>"*)
+
+declare void @_ZN13HingeNodeSpecILi1EE7calcD_GERK11FixedMatrixIdLi6ELi6ELi0ELi0EE(%"struct.HingeNodeSpec<1>"*, %struct.Mat6*)
+
+declare void @_ZN11MatrixTools7inverseI11FixedMatrixIdLi1ELi1ELi0ELi0EEEET_RKS3_NS_14InverseResultsINS3_10MatrixTypeEEE(%"struct.FixedMatrix<double,1,1,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,1,0,0>"*, %"struct.MatrixTools::InverseResults<FullMatrix<double> >"*)
+
+declare i8* @__cxa_get_exception_ptr(i8*) nounwind
+
+declare i8* @__cxa_begin_catch(i8*) nounwind
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi1ELi1EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,1,1>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi1ELi6EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,1,6>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEi(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i32)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIcERSoS0_RK9CDSStringIT_E(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %struct.String*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEPFRSoS_E(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.std::basic_ostream<char,std::char_traits<char> >"* (%"struct.std::basic_ostream<char,std::char_traits<char> >"*)*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(%"struct.std::basic_ostream<char,std::char_traits<char> >"*)
+
+declare void @__cxa_end_catch()
+
+declare void @_ZmlI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RKS3_RK9SubMatrixIT0_E(%struct.Mat3* noalias sret, %struct.Mat3*, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*)
+
+declare void @_ZmlI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RK9SubMatrixIT0_ERKS3_(%struct.Mat3* noalias sret, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*, %struct.Mat3*)
+
+declare void @_ZmiI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RK9SubMatrixIT0_ERKS3_(%struct.Mat3* noalias sret, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*, %struct.Mat3*)
+
+declare %"struct.FixedMatrixBase<double,6,6>"* @_ZN15FixedMatrixBaseIdLi6ELi6EEmIERKS0_(%"struct.FixedMatrixBase<double,6,6>"*, %"struct.FixedMatrixBase<double,6,6>"*)
+
+declare void @_ZN13CDSVectorBaseI4Vec3N3CDS12DefaultAllocEEC2EiS2_(%"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"*, i32, %"struct.CDS::DefaultAlloc"* byval align 4)
+
+declare void @_ZN13CDSVectorBaseI4Vec3N3CDS12DefaultAllocEED2Ev(%"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeTorsionD0Ev(%struct.HNodeTorsion*)
+
+declare void @_ZN12HNodeTorsionD1Ev(%struct.HNodeTorsion*)
+
+declare void @_ZN12HNodeRotate3D0Ev(%struct.HNodeRotate3*)
+
+declare void @_ZN12HNodeRotate3D1Ev(%struct.HNodeRotate3*)
+
+declare void @_ZN12HNodeRotate36setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate318enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES4_(%struct.HNodeRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate35printEi(%struct.HNodeRotate3*, i32)
+
+declare void @_ZN12HNodeRotate35calcHEv(%struct.HNodeRotate3*)
+
+declare void @_ZN12HNodeRotate311toCartesianEv(%struct.HNodeRotate3*)
+
+declare void @_ZN12HNodeRotate2D0Ev(%struct.HNodeRotate2*)
+
+declare void @_ZN12HNodeRotate2D1Ev(%struct.HNodeRotate2*)
+
+declare void @_ZN12HNodeRotate26setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate218enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES4_(%struct.HNodeRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN12HNodeRotate25printEi(%struct.HNodeRotate2*, i32)
+
+declare void @_ZN12HNodeRotate25calcHEv(%struct.HNodeRotate2*)
+
+declare void @_ZN12HNodeRotate211toCartesianEv(%struct.HNodeRotate2*)
+
+declare void @_ZN21HNodeTranslateRotate3D0Ev(%struct.HNodeTranslateRotate3*)
+
+declare void @_ZN21HNodeTranslateRotate3D1Ev(%struct.HNodeTranslateRotate3*)
+
+declare void @_ZN21HNodeTranslateRotate318enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES4_(%struct.HNodeTranslateRotate3*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate35printEi(%struct.HNodeTranslateRotate3*, i32)
+
+declare void @_ZN21HNodeTranslateRotate35calcHEv(%struct.HNodeTranslateRotate3*)
+
+declare void @_ZN21HNodeTranslateRotate2D0Ev(%struct.HNodeTranslateRotate2*)
+
+declare void @_ZN21HNodeTranslateRotate2D1Ev(%struct.HNodeTranslateRotate2*)
+
+declare void @_ZN21HNodeTranslateRotate26setVelERK9CDSVectorIdLi1EN3CDS12DefaultAllocEE(%struct.HNodeTranslateRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate218enforceConstraintsER9CDSVectorIdLi1EN3CDS12DefaultAllocEES4_(%struct.HNodeTranslateRotate2*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*, %"struct.CDSVector<double,0,CDS::DefaultAlloc>"*)
+
+declare void @_ZN21HNodeTranslateRotate25printEi(%struct.HNodeTranslateRotate2*, i32)
+
+declare void @_ZN21HNodeTranslateRotate25calcHEv(%struct.HNodeTranslateRotate2*)
+
+declare void @_ZN21HNodeTranslateRotate211toCartesianEv(%struct.HNodeTranslateRotate2*)
+
+declare void @_ZN14HNodeTranslateC2EPK9HingeNodeP7IVMAtomRi(%struct.HNodeTranslate*, %struct.HingeNode*, %struct.IVMAtom*, i32*)
+
+declare void @_ZN14HNodeTranslateD1Ev(%struct.HNodeTranslate*)
+
+declare void @_ZN14HNodeTranslateD0Ev(%struct.HNodeTranslate*)
+
+declare void @_ZN14HNodeTranslate5calcHEv(%struct.HNodeTranslate*)
+
+declare void @_ZN14HNodeTranslate11toCartesianEv(%struct.HNodeTranslate*)
+
+declare void @_ZN12HNodeRotate3C2EPK9HingeNodeP7IVMAtomRib(%struct.HNodeRotate3*, %struct.HingeNode*, %struct.IVMAtom*, i32*, i8 zeroext)
+
+declare void @_ZN8AtomTree6findCMEPK9HingeNode(%struct.Vec3* noalias sret, %struct.HingeNode*)
+
+declare %struct.IVMAtom** @_ZN7CDSListIP7IVMAtomE7prependERKS1_(%struct.AtomList*, %struct.IVMAtom**)
+
+declare %"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"* @_ZN13CDSVectorBaseI4Vec3N3CDS12DefaultAllocEE6resizeEi(%"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"*, i32)
+
+declare void @_ZN12HNodeRotate2C2EPK9HingeNodeRK4Vec3Ri(%struct.HNodeRotate2*, %struct.HingeNode*, %struct.Vec3*, i32*)
+
+declare void @_ZN21HNodeTranslateRotate3C2EPK9HingeNodeP7IVMAtomRib(%struct.HNodeTranslateRotate3*, %struct.HingeNode*, %struct.IVMAtom*, i32*, i8 zeroext)
+
+declare void @_ZN13HingeNodeSpecILi3EE9calcPropsEv(%"struct.HingeNodeSpec<3>"*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi3ELi6ELi0ELi0EEEENT_13TransposeTypeERKS3_(%"struct.FixedMatrix<double,3,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,3,6,0,0>"*)
+
+declare void @_ZN11MatrixTools9transposeI4Mat3EENT_13TransposeTypeERKS2_(%struct.Mat3* noalias sret, %struct.Mat3*)
+
+declare void @_Z10blockMat12IdLi3ELi3ELi3EE11FixedMatrixIT_XT0_EXplT1_T2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,3,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,3,3,0,0>"*, %"struct.FixedMatrix<double,3,3,0,0>"*)
+
+declare void @_ZN13CDSMatrixBaseIdEC2I11FixedMatrixIdLi3ELi6ELi0ELi0EEEERKT_(%"struct.CDSMatrixBase<double>"*, %"struct.FixedMatrix<double,3,6,0,0>"*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi6ELi3ELi0ELi0EEEENT_13TransposeTypeERKS3_(%"struct.FixedMatrix<double,3,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,3,6,0,0>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi4EERSoS0_RK15FixedVectorBaseIT_XT0_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,2,2>"*)
+
+declare double @_Z4normIdLi4EET_RK11FixedVectorIS0_XT0_ELi0EE(%"struct.FixedMatrix<double,2,2,0,0>"*)
+
+declare %"struct.FixedMatrixBase<double,2,2>"* @_ZN15FixedVectorBaseIdLi4EEdVERKd(%"struct.FixedMatrixBase<double,2,2>"*, double*)
+
+declare %"struct.FixedMatrixBase<double,2,2>"* @_ZN15FixedVectorBaseIdLi4EEmIERKS0_(%"struct.FixedMatrixBase<double,2,2>"*, %"struct.FixedMatrixBase<double,2,2>"*)
+
+declare void @_ZN11FixedVectorIdLi3ELi0EE6subColILi6ELi3ELi0ELi0EEES0_RK11FixedMatrixIdXT_EXT0_EXT1_EXT2_EEiii(%"struct.FixedMatrix<double,1,3,0,0>"* noalias sret, %"struct.FixedMatrix<double,3,6,0,0>"*, i32, i32, i32)
+
+declare void @_ZN13HingeNodeSpecILi3EE7calcD_GERK11FixedMatrixIdLi6ELi6ELi0ELi0EE(%"struct.HingeNodeSpec<3>"*, %struct.Mat6*)
+
+declare void @_ZN11MatrixTools7inverseI11FixedMatrixIdLi3ELi3ELi0ELi0EEEET_RKS3_NS_14InverseResultsINS3_10MatrixTypeEEE(%"struct.FixedMatrix<double,3,3,0,0>"* noalias sret, %"struct.FixedMatrix<double,3,3,0,0>"*, %"struct.MatrixTools::InverseResults<FullMatrix<double> >"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi3ELi3EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,3,3>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi3ELi6EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,3,6>"*)
+
+declare void @_Z7unitVecRK4Vec3(%struct.Vec3* noalias sret, %struct.Vec3*)
+
+declare double @_Z4normIdLi3EET_RK11FixedVectorIS0_XT0_ELi0EE(%"struct.FixedMatrix<double,1,3,0,0>"*)
+
+declare void @_ZN12HNodeTorsionC2EPK9HingeNodeRK4Vec3Ri(%struct.HNodeTorsion*, %struct.HingeNode*, %struct.Vec3*, i32*)
+
+declare double @acos(double) nounwind readnone
+
+declare double @atan2(double, double) nounwind readnone
+
+declare void @_ZN21HNodeTranslateRotate2C2EPK9HingeNodeRi(%struct.HNodeTranslateRotate2*, %struct.HingeNode*, i32*)
+
+declare void @_ZN13HingeNodeSpecILi2EE9calcPropsEv(%"struct.HingeNodeSpec<2>"*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi2ELi6ELi0ELi0EEEENT_13TransposeTypeERKS3_(%"struct.FixedMatrix<double,2,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,2,6,0,0>"*)
+
+declare void @_Z10blockMat21IdLi1ELi3ELi1EE11FixedMatrixIT_XplT0_T2_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT2_EXT1_ELi0ELi0EE(%"struct.FixedMatrix<double,1,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,3,0,0>"*, %"struct.FixedMatrix<double,1,3,0,0>"*)
+
+declare void @_Z10blockMat12IdLi2ELi3ELi3EE11FixedMatrixIT_XT0_EXplT1_T2_ELi0ELi0EERKS0_IS1_XT0_EXT1_ELi0ELi0EERKS0_IS1_XT0_EXT2_ELi0ELi0EE(%"struct.FixedMatrix<double,2,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,1,6,0,0>"*, %"struct.FixedMatrix<double,1,6,0,0>"*)
+
+declare void @_ZN13CDSMatrixBaseIdEC2I11FixedMatrixIdLi2ELi6ELi0ELi0EEEERKT_(%"struct.CDSMatrixBase<double>"*, %"struct.FixedMatrix<double,2,6,0,0>"*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi6ELi2ELi0ELi0EEEENT_13TransposeTypeERKS3_(%"struct.FixedMatrix<double,2,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,2,6,0,0>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi2EERSoS0_RK15FixedVectorBaseIT_XT0_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedVectorBase<double,2>"*)
+
+declare %"struct.FixedMatrixBase<double,1,3>"* @_ZN15FixedVectorBaseIdLi3EEdVERKd(%"struct.FixedMatrixBase<double,1,3>"*, double*)
+
+declare %"struct.FixedMatrixBase<double,1,3>"* @_ZN15FixedVectorBaseIdLi3EEmIERKS0_(%"struct.FixedMatrixBase<double,1,3>"*, %"struct.FixedMatrixBase<double,1,3>"*)
+
+declare void @_ZN11FixedVectorIdLi3ELi0EE6subColILi6ELi2ELi0ELi0EEES0_RK11FixedMatrixIdXT_EXT0_EXT1_EXT2_EEiii(%"struct.FixedMatrix<double,1,3,0,0>"* noalias sret, %"struct.FixedMatrix<double,2,6,0,0>"*, i32, i32, i32)
+
+declare void @_ZN13HingeNodeSpecILi2EE7calcD_GERK11FixedMatrixIdLi6ELi6ELi0ELi0EE(%"struct.HingeNodeSpec<2>"*, %struct.Mat6*)
+
+declare void @_ZN11MatrixTools7inverseI11FixedMatrixIdLi2ELi2ELi0ELi0EEEET_RKS3_NS_14InverseResultsINS3_10MatrixTypeEEE(%"struct.FixedMatrix<double,2,2,0,0>"* noalias sret, %"struct.FixedMatrix<double,2,2,0,0>"*, %"struct.MatrixTools::InverseResults<FullMatrix<double> >"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi2ELi2EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,2,2>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi2ELi6EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,2,6>"*)
+
+declare zeroext i8 @_ZNK9CDSStringIcE7matchesEPKcb(%struct.String*, i8*, i8 zeroext)
+
+declare %struct.HingeNode* @_Z9constructP9HingeNodeRKN16InternalDynamics9HingeSpecERi(%struct.HingeNode*, %"struct.InternalDynamics::HingeSpec"*, i32*)
+
+declare void @_ZN9CDSStringIcEC1ERKS0_(%struct.String*, %struct.String*)
+
+declare void @_ZN9CDSStringIcE8downcaseEv(%struct.String*)
+
+declare %struct.String* @_ZN9CDSStringIcEaSEPKc(%struct.String*, i8*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIP7IVMAtomERSoS2_RK7CDSListIT_E(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %struct.AtomList*)
+
+declare i32 @_ZNK7CDSListIP9HingeNodeE8getIndexERKS1_(%"struct.CDSList<HingeNode*>"*, %struct.HingeNode**)
+
+declare void @_ZN13CDSMatrixBaseIdEC2I11FixedMatrixIdLi6ELi6ELi0ELi0EEEERKT_(%"struct.CDSMatrixBase<double>"*, %struct.Mat6*)
+
+declare void @_ZN11FixedVectorIdLi3ELi0EE6subColILi6ELi6ELi0ELi0EEES0_RK11FixedMatrixIdXT_EXT0_EXT1_EXT2_EEiii(%"struct.FixedMatrix<double,1,3,0,0>"* noalias sret, %struct.Mat6*, i32, i32, i32)
+
+declare void @_ZN13HingeNodeSpecILi6EE7calcD_GERK11FixedMatrixIdLi6ELi6ELi0ELi0EE(%"struct.HingeNodeSpec<6>"*, %struct.Mat6*)
+
+declare void @_ZN11MatrixTools7inverseI11FixedMatrixIdLi6ELi6ELi0ELi0EEEET_RKS3_NS_14InverseResultsINS3_10MatrixTypeEEE(%struct.Mat6* noalias sret, %struct.Mat6*, %"struct.MatrixTools::InverseResults<FullMatrix<double> >"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi6ELi6EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,6,6>"*)
+
+declare void @_ZN13HingeNodeSpecILi5EE9calcPropsEv(%"struct.HingeNodeSpec<5>"*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi5ELi6ELi0ELi0EEEENT_13TransposeTypeERKS3_(%"struct.FixedMatrix<double,5,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,5,6,0,0>"*)
+
+declare void @_ZN13CDSMatrixBaseIdEC2I11FixedMatrixIdLi5ELi6ELi0ELi0EEEERKT_(%"struct.CDSMatrixBase<double>"*, %"struct.FixedMatrix<double,5,6,0,0>"*)
+
+declare void @_ZN11MatrixTools9transposeI11FixedMatrixIdLi6ELi5ELi0ELi0EEEENT_13TransposeTypeERKS3_(%"struct.FixedMatrix<double,5,6,0,0>"* noalias sret, %"struct.FixedMatrix<double,5,6,0,0>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi5EERSoS0_RK15FixedVectorBaseIT_XT0_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedVectorBase<double,5>"*)
+
+declare void @_ZN11FixedVectorIdLi3ELi0EE6subColILi6ELi5ELi0ELi0EEES0_RK11FixedMatrixIdXT_EXT0_EXT1_EXT2_EEiii(%"struct.FixedMatrix<double,1,3,0,0>"* noalias sret, %"struct.FixedMatrix<double,5,6,0,0>"*, i32, i32, i32)
+
+declare void @_ZN13HingeNodeSpecILi5EE7calcD_GERK11FixedMatrixIdLi6ELi6ELi0ELi0EE(%"struct.HingeNodeSpec<5>"*, %struct.Mat6*)
+
+declare void @_ZN11MatrixTools7inverseI11FixedMatrixIdLi5ELi5ELi0ELi0EEEET_RKS3_NS_14InverseResultsINS3_10MatrixTypeEEE(%"struct.FixedMatrix<double,5,5,0,0>"* noalias sret, %"struct.FixedMatrix<double,5,5,0,0>"*, %"struct.MatrixTools::InverseResults<FullMatrix<double> >"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi5ELi5EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,5,5>"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZlsIdLi5ELi6EERSoS0_RK15FixedMatrixBaseIT_XT0_EXT1_EE(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.FixedMatrixBase<double,5,6>"*)
+
+declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
diff --git a/test/CodeGen/X86/negative-sin.ll b/test/CodeGen/X86/negative-sin.ll
new file mode 100644
index 0000000..7842eb8
--- /dev/null
+++ b/test/CodeGen/X86/negative-sin.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -enable-unsafe-fp-math -march=x86-64 | \
+; RUN: not egrep {addsd|subsd|xor}
+
+declare double @sin(double %f)
+
+define double @foo(double %e)
+{
+ %f = fsub double 0.0, %e
+ %g = call double @sin(double %f) readonly
+ %h = fsub double 0.0, %g
+ ret double %h
+}
diff --git a/test/CodeGen/X86/negative-stride-fptosi-user.ll b/test/CodeGen/X86/negative-stride-fptosi-user.ll
new file mode 100644
index 0000000..332e0b9
--- /dev/null
+++ b/test/CodeGen/X86/negative-stride-fptosi-user.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86-64 | grep cvtsi2sd
+
+; LSR previously eliminated the sitofp by introducing an induction
+; variable which stepped by a bogus ((double)UINT32_C(-1)). It's theoretically
+; possible to eliminate the sitofp using a proper -1.0 step though; this
+; test should be changed if that is done.
+
+define void @foo(i32 %N) nounwind {
+entry:
+ %0 = icmp slt i32 %N, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %return
+
+bb: ; preds = %bb, %entry
+ %i.03 = phi i32 [ 0, %entry ], [ %2, %bb ] ; <i32> [#uses=2]
+ %1 = sitofp i32 %i.03 to double ; <double> [#uses=1]
+ tail call void @bar(double %1) nounwind
+ %2 = add nsw i32 %i.03, -1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %2, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+declare void @bar(double)
diff --git a/test/CodeGen/X86/negative-subscript.ll b/test/CodeGen/X86/negative-subscript.ll
new file mode 100644
index 0000000..28f7d6b
--- /dev/null
+++ b/test/CodeGen/X86/negative-subscript.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86
+; rdar://6559995
+
+@a = external global [255 x i8*], align 32
+
+define i32 @main() nounwind {
+entry:
+ store i8* bitcast (i8** getelementptr ([255 x i8*]* @a, i32 0, i32 -2147483624) to i8*), i8** getelementptr ([255 x i8*]* @a, i32 0, i32 16), align 32
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/negative_zero.ll b/test/CodeGen/X86/negative_zero.ll
new file mode 100644
index 0000000..29474c2
--- /dev/null
+++ b/test/CodeGen/X86/negative_zero.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | grep fchs
+
+
+define double @T() {
+ ret double -1.0 ;; codegen as fld1/fchs, not as a load from cst pool
+}
diff --git a/test/CodeGen/X86/nobt.ll b/test/CodeGen/X86/nobt.ll
new file mode 100644
index 0000000..35090e3
--- /dev/null
+++ b/test/CodeGen/X86/nobt.ll
@@ -0,0 +1,70 @@
+; RUN: llc < %s -march=x86 | not grep btl
+
+; This tests some cases where BT must not be generated. See also bt.ll.
+; Fixes 20040709-[12].c in gcc testsuite.
+
+define void @test2(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp1 = and i32 %x, 1
+ %tmp2 = urem i32 %tmp1, 15
+ %tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp3, %tmp2 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @test3(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp1 = and i32 %x, 1
+ %tmp2 = urem i32 %tmp1, 15
+ %tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp eq i32 %tmp2, %tmp3 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @test4(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp1 = and i32 %x, 1
+ %tmp2 = urem i32 %tmp1, 15
+ %tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp2, %tmp3 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define void @test5(i32 %x, i32 %n) nounwind {
+entry:
+ %tmp1 = and i32 %x, 1
+ %tmp2 = urem i32 %tmp1, 15
+ %tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
+ %tmp4 = icmp ne i32 %tmp2, %tmp3 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+
+bb: ; preds = %entry
+ call void @foo()
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare void @foo()
diff --git a/test/CodeGen/X86/nofence.ll b/test/CodeGen/X86/nofence.ll
new file mode 100644
index 0000000..244d2e9
--- /dev/null
+++ b/test/CodeGen/X86/nofence.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep fence
+
+declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
+
+define void @test() {
+ call void @llvm.memory.barrier( i1 true, i1 false, i1 false, i1 false, i1 false)
+ call void @llvm.memory.barrier( i1 false, i1 true, i1 false, i1 false, i1 false)
+ call void @llvm.memory.barrier( i1 false, i1 false, i1 true, i1 false, i1 false)
+ call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 false)
+
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 false, i1 false, i1 false)
+ call void @llvm.memory.barrier( i1 true, i1 false, i1 true, i1 false, i1 false)
+ call void @llvm.memory.barrier( i1 true, i1 false, i1 false, i1 true, i1 false)
+ call void @llvm.memory.barrier( i1 false, i1 true, i1 true, i1 false, i1 false)
+ call void @llvm.memory.barrier( i1 false, i1 true, i1 false, i1 true, i1 false)
+ call void @llvm.memory.barrier( i1 false, i1 false, i1 true, i1 true, i1 false)
+
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 false, i1 false)
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 false, i1 true, i1 false)
+ call void @llvm.memory.barrier( i1 true, i1 false, i1 true, i1 true, i1 false)
+ call void @llvm.memory.barrier( i1 false, i1 true, i1 true, i1 true, i1 false)
+
+
+ call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true , i1 false)
+ call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 false , i1 false)
+ ret void
+}
diff --git a/test/CodeGen/X86/nosse-error1.ll b/test/CodeGen/X86/nosse-error1.ll
new file mode 100644
index 0000000..16cbb73
--- /dev/null
+++ b/test/CodeGen/X86/nosse-error1.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as < %s > %t1
+; RUN: not llc -march=x86-64 -mattr=-sse < %t1 2> %t2
+; RUN: grep "SSE register return with SSE disabled" %t2
+; RUN: llc -march=x86-64 < %t1 | grep xmm
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+@f = external global float ; <float*> [#uses=4]
+@d = external global double ; <double*> [#uses=4]
+
+define void @test() nounwind {
+entry:
+ %0 = load float* @f, align 4 ; <float> [#uses=1]
+ %1 = tail call float @foo1(float %0) nounwind ; <float> [#uses=1]
+ store float %1, float* @f, align 4
+ %2 = load double* @d, align 8 ; <double> [#uses=1]
+ %3 = tail call double @foo2(double %2) nounwind ; <double> [#uses=1]
+ store double %3, double* @d, align 8
+ %4 = load float* @f, align 4 ; <float> [#uses=1]
+ %5 = tail call float @foo3(float %4) nounwind ; <float> [#uses=1]
+ store float %5, float* @f, align 4
+ %6 = load double* @d, align 8 ; <double> [#uses=1]
+ %7 = tail call double @foo4(double %6) nounwind ; <double> [#uses=1]
+ store double %7, double* @d, align 8
+ ret void
+}
+
+declare float @foo1(float)
+
+declare double @foo2(double)
+
+declare float @foo3(float)
+
+declare double @foo4(double)
diff --git a/test/CodeGen/X86/nosse-error2.ll b/test/CodeGen/X86/nosse-error2.ll
new file mode 100644
index 0000000..45a5eaf
--- /dev/null
+++ b/test/CodeGen/X86/nosse-error2.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as < %s > %t1
+; RUN: not llc -march=x86 -mcpu=i686 -mattr=-sse < %t1 2> %t2
+; RUN: grep "SSE register return with SSE disabled" %t2
+; RUN: llc -march=x86 -mcpu=i686 -mattr=+sse < %t1 | grep xmm
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-unknown-linux-gnu"
+@f = external global float ; <float*> [#uses=4]
+@d = external global double ; <double*> [#uses=4]
+
+define void @test() nounwind {
+entry:
+ %0 = load float* @f, align 4 ; <float> [#uses=1]
+ %1 = tail call inreg float @foo1(float inreg %0) nounwind ; <float> [#uses=1]
+ store float %1, float* @f, align 4
+ %2 = load double* @d, align 8 ; <double> [#uses=1]
+ %3 = tail call inreg double @foo2(double inreg %2) nounwind ; <double> [#uses=1]
+ store double %3, double* @d, align 8
+ %4 = load float* @f, align 4 ; <float> [#uses=1]
+ %5 = tail call inreg float @foo3(float inreg %4) nounwind ; <float> [#uses=1]
+ store float %5, float* @f, align 4
+ %6 = load double* @d, align 8 ; <double> [#uses=1]
+ %7 = tail call inreg double @foo4(double inreg %6) nounwind ; <double> [#uses=1]
+ store double %7, double* @d, align 8
+ ret void
+}
+
+declare inreg float @foo1(float inreg)
+
+declare inreg double @foo2(double inreg)
+
+declare inreg float @foo3(float inreg)
+
+declare inreg double @foo4(double inreg)
diff --git a/test/CodeGen/X86/nosse-varargs.ll b/test/CodeGen/X86/nosse-varargs.ll
new file mode 100644
index 0000000..e6da0ab
--- /dev/null
+++ b/test/CodeGen/X86/nosse-varargs.ll
@@ -0,0 +1,46 @@
+; RUN: llvm-as < %s > %t
+; RUN: llc -march=x86-64 -mattr=-sse < %t | not grep xmm
+; RUN: llc -march=x86-64 < %t | grep xmm
+; PR3403
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.__va_list_tag = type { i32, i32, i8*, i8* }
+
+define i32 @foo(float %a, i8* nocapture %fmt, ...) nounwind {
+entry:
+ %ap = alloca [1 x %struct.__va_list_tag], align 8 ; <[1 x %struct.__va_list_tag]*> [#uses=4]
+ %ap12 = bitcast [1 x %struct.__va_list_tag]* %ap to i8* ; <i8*> [#uses=2]
+ call void @llvm.va_start(i8* %ap12)
+ %0 = getelementptr [1 x %struct.__va_list_tag]* %ap, i64 0, i64 0, i32 0 ; <i32*> [#uses=2]
+ %1 = load i32* %0, align 8 ; <i32> [#uses=3]
+ %2 = icmp ult i32 %1, 48 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %bb3
+
+bb: ; preds = %entry
+ %3 = getelementptr [1 x %struct.__va_list_tag]* %ap, i64 0, i64 0, i32 3 ; <i8**> [#uses=1]
+ %4 = load i8** %3, align 8 ; <i8*> [#uses=1]
+ %5 = inttoptr i32 %1 to i8* ; <i8*> [#uses=1]
+ %6 = ptrtoint i8* %5 to i64 ; <i64> [#uses=1]
+ %ctg2 = getelementptr i8* %4, i64 %6 ; <i8*> [#uses=1]
+ %7 = add i32 %1, 8 ; <i32> [#uses=1]
+ store i32 %7, i32* %0, align 8
+ br label %bb4
+
+bb3: ; preds = %entry
+ %8 = getelementptr [1 x %struct.__va_list_tag]* %ap, i64 0, i64 0, i32 2 ; <i8**> [#uses=2]
+ %9 = load i8** %8, align 8 ; <i8*> [#uses=2]
+ %10 = getelementptr i8* %9, i64 8 ; <i8*> [#uses=1]
+ store i8* %10, i8** %8, align 8
+ br label %bb4
+
+bb4: ; preds = %bb3, %bb
+ %addr.0.0 = phi i8* [ %ctg2, %bb ], [ %9, %bb3 ] ; <i8*> [#uses=1]
+ %11 = bitcast i8* %addr.0.0 to i32* ; <i32*> [#uses=1]
+ %12 = load i32* %11, align 4 ; <i32> [#uses=1]
+ call void @llvm.va_end(i8* %ap12)
+ ret i32 %12
+}
+
+declare void @llvm.va_start(i8*) nounwind
+
+declare void @llvm.va_end(i8*) nounwind
diff --git a/test/CodeGen/X86/object-size.ll b/test/CodeGen/X86/object-size.ll
new file mode 100644
index 0000000..eed3cfc
--- /dev/null
+++ b/test/CodeGen/X86/object-size.ll
@@ -0,0 +1,55 @@
+; RUN: llc -O0 < %s -march=x86-64 | FileCheck %s -check-prefix=X64
+
+; ModuleID = 'ts.c'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0"
+
+@p = common global i8* null, align 8 ; <i8**> [#uses=4]
[email protected] = private constant [3 x i8] c"Hi\00" ; <[3 x i8]*> [#uses=1]
+
+define void @bar() nounwind ssp {
+entry:
+ %tmp = load i8** @p ; <i8*> [#uses=1]
+ %0 = call i64 @llvm.objectsize.i64(i8* %tmp, i1 0) ; <i64> [#uses=1]
+ %cmp = icmp ne i64 %0, -1 ; <i1> [#uses=1]
+; X64: movq $-1, %rax
+; X64: cmpq $-1, %rax
+ br i1 %cmp, label %cond.true, label %cond.false
+
+cond.true: ; preds = %entry
+ %tmp1 = load i8** @p ; <i8*> [#uses=1]
+ %tmp2 = load i8** @p ; <i8*> [#uses=1]
+ %1 = call i64 @llvm.objectsize.i64(i8* %tmp2, i1 1) ; <i64> [#uses=1]
+ %call = call i8* @__strcpy_chk(i8* %tmp1, i8* getelementptr inbounds ([3 x i8]* @.str, i32 0, i32 0), i64 %1) ssp ; <i8*> [#uses=1]
+ br label %cond.end
+
+cond.false: ; preds = %entry
+ %tmp3 = load i8** @p ; <i8*> [#uses=1]
+ %call4 = call i8* @__inline_strcpy_chk(i8* %tmp3, i8* getelementptr inbounds ([3 x i8]* @.str, i32 0, i32 0)) ssp ; <i8*> [#uses=1]
+ br label %cond.end
+
+cond.end: ; preds = %cond.false, %cond.true
+ %cond = phi i8* [ %call, %cond.true ], [ %call4, %cond.false ] ; <i8*> [#uses=0]
+ ret void
+}
+
+declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readonly
+
+declare i8* @__strcpy_chk(i8*, i8*, i64) ssp
+
+define internal i8* @__inline_strcpy_chk(i8* %__dest, i8* %__src) nounwind ssp {
+entry:
+ %retval = alloca i8* ; <i8**> [#uses=2]
+ %__dest.addr = alloca i8* ; <i8**> [#uses=3]
+ %__src.addr = alloca i8* ; <i8**> [#uses=2]
+ store i8* %__dest, i8** %__dest.addr
+ store i8* %__src, i8** %__src.addr
+ %tmp = load i8** %__dest.addr ; <i8*> [#uses=1]
+ %tmp1 = load i8** %__src.addr ; <i8*> [#uses=1]
+ %tmp2 = load i8** %__dest.addr ; <i8*> [#uses=1]
+ %0 = call i64 @llvm.objectsize.i64(i8* %tmp2, i1 1) ; <i64> [#uses=1]
+ %call = call i8* @__strcpy_chk(i8* %tmp, i8* %tmp1, i64 %0) ssp ; <i8*> [#uses=1]
+ store i8* %call, i8** %retval
+ %1 = load i8** %retval ; <i8*> [#uses=1]
+ ret i8* %1
+}
diff --git a/test/CodeGen/X86/omit-label.ll b/test/CodeGen/X86/omit-label.ll
new file mode 100644
index 0000000..0ec03eb
--- /dev/null
+++ b/test/CodeGen/X86/omit-label.ll
@@ -0,0 +1,57 @@
+; RUN: llc < %s -asm-verbose=false -mtriple=x86_64-linux-gnu | FileCheck %s
+; PR4126
+; PR4732
+
+; Don't omit these labels' definitions.
+
+; CHECK: bux:
+; CHECK: LBB1_1:
+
+define void @bux(i32 %p_53) nounwind optsize {
+entry:
+ %0 = icmp eq i32 %p_53, 0 ; <i1> [#uses=1]
+ %1 = icmp sgt i32 %p_53, 0 ; <i1> [#uses=1]
+ %or.cond = and i1 %0, %1 ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb.i, label %bb3
+
+bb.i: ; preds = %entry
+ %2 = add i32 %p_53, 1 ; <i32> [#uses=1]
+ %3 = icmp slt i32 %2, 0 ; <i1> [#uses=0]
+ br label %bb3
+
+bb3: ; preds = %bb.i, %entry
+ %4 = tail call i32 (...)* @baz(i32 0) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @baz(...)
+
+; Don't omit this label in the assembly output.
+; CHECK: int321:
+; CHECK: LBB2_1
+; CHECK: LBB2_1
+; CHECK: LBB2_1:
+
+define void @int321(i8 signext %p_103, i32 %uint8p_104) nounwind readnone {
+entry:
+ %tobool = icmp eq i8 %p_103, 0 ; <i1> [#uses=1]
+ %cmp.i = icmp sgt i8 %p_103, 0 ; <i1> [#uses=1]
+ %or.cond = and i1 %tobool, %cmp.i ; <i1> [#uses=1]
+ br i1 %or.cond, label %land.end.i, label %for.cond.preheader
+
+land.end.i: ; preds = %entry
+ %conv3.i = sext i8 %p_103 to i32 ; <i32> [#uses=1]
+ %div.i = sdiv i32 1, %conv3.i ; <i32> [#uses=1]
+ %tobool.i = icmp eq i32 %div.i, -2147483647 ; <i1> [#uses=0]
+ br label %for.cond.preheader
+
+for.cond.preheader: ; preds = %land.end.i, %entry
+ %cmp = icmp sgt i8 %p_103, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %for.end.split, label %for.cond
+
+for.cond: ; preds = %for.cond.preheader, %for.cond
+ br label %for.cond
+
+for.end.split: ; preds = %for.cond.preheader
+ ret void
+}
diff --git a/test/CodeGen/X86/opt-ext-uses.ll b/test/CodeGen/X86/opt-ext-uses.ll
new file mode 100644
index 0000000..fa2aef5
--- /dev/null
+++ b/test/CodeGen/X86/opt-ext-uses.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 | grep movw | count 1
+
+define i16 @t() signext {
+entry:
+ %tmp180 = load i16* null, align 2 ; <i16> [#uses=3]
+ %tmp180181 = sext i16 %tmp180 to i32 ; <i32> [#uses=1]
+ %tmp182 = add i16 %tmp180, 10
+ %tmp185 = icmp slt i16 %tmp182, 0 ; <i1> [#uses=1]
+ br i1 %tmp185, label %cond_true188, label %cond_next245
+
+cond_true188: ; preds = %entry
+ %tmp195196 = trunc i16 %tmp180 to i8 ; <i8> [#uses=0]
+ ret i16 %tmp180
+
+cond_next245: ; preds = %entry
+ %tmp256 = and i32 %tmp180181, 15 ; <i32> [#uses=0]
+ %tmp3 = trunc i32 %tmp256 to i16
+ ret i16 %tmp3
+}
diff --git a/test/CodeGen/X86/optimize-max-0.ll b/test/CodeGen/X86/optimize-max-0.ll
new file mode 100644
index 0000000..162c7a5
--- /dev/null
+++ b/test/CodeGen/X86/optimize-max-0.ll
@@ -0,0 +1,461 @@
+; RUN: llc < %s -march=x86 | not grep cmov
+
+; LSR should be able to eliminate the max computations by
+; making the loops use slt/ult comparisons instead of ne comparisons.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+
+define void @foo(i8* %r, i32 %s, i32 %w, i32 %x, i8* %j, i32 %d) nounwind {
+entry:
+ %0 = mul i32 %x, %w ; <i32> [#uses=2]
+ %1 = mul i32 %x, %w ; <i32> [#uses=1]
+ %2 = sdiv i32 %1, 4 ; <i32> [#uses=1]
+ %.sum2 = add i32 %2, %0 ; <i32> [#uses=2]
+ %cond = icmp eq i32 %d, 1 ; <i1> [#uses=1]
+ br i1 %cond, label %bb29, label %bb10.preheader
+
+bb10.preheader: ; preds = %entry
+ %3 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb.nph9, label %bb18.loopexit
+
+bb.nph7: ; preds = %bb7.preheader
+ %4 = mul i32 %y.08, %w ; <i32> [#uses=1]
+ %5 = mul i32 %y.08, %s ; <i32> [#uses=1]
+ %6 = add i32 %5, 1 ; <i32> [#uses=1]
+ %tmp8 = icmp sgt i32 1, %w ; <i1> [#uses=1]
+ %smax9 = select i1 %tmp8, i32 1, i32 %w ; <i32> [#uses=1]
+ br label %bb6
+
+bb6: ; preds = %bb7, %bb.nph7
+ %x.06 = phi i32 [ 0, %bb.nph7 ], [ %indvar.next7, %bb7 ] ; <i32> [#uses=3]
+ %7 = add i32 %x.06, %4 ; <i32> [#uses=1]
+ %8 = shl i32 %x.06, 1 ; <i32> [#uses=1]
+ %9 = add i32 %6, %8 ; <i32> [#uses=1]
+ %10 = getelementptr i8* %r, i32 %9 ; <i8*> [#uses=1]
+ %11 = load i8* %10, align 1 ; <i8> [#uses=1]
+ %12 = getelementptr i8* %j, i32 %7 ; <i8*> [#uses=1]
+ store i8 %11, i8* %12, align 1
+ br label %bb7
+
+bb7: ; preds = %bb6
+ %indvar.next7 = add i32 %x.06, 1 ; <i32> [#uses=2]
+ %exitcond10 = icmp ne i32 %indvar.next7, %smax9 ; <i1> [#uses=1]
+ br i1 %exitcond10, label %bb6, label %bb7.bb9_crit_edge
+
+bb7.bb9_crit_edge: ; preds = %bb7
+ br label %bb9
+
+bb9: ; preds = %bb7.preheader, %bb7.bb9_crit_edge
+ br label %bb10
+
+bb10: ; preds = %bb9
+ %indvar.next11 = add i32 %y.08, 1 ; <i32> [#uses=2]
+ %exitcond12 = icmp ne i32 %indvar.next11, %x ; <i1> [#uses=1]
+ br i1 %exitcond12, label %bb7.preheader, label %bb10.bb18.loopexit_crit_edge
+
+bb10.bb18.loopexit_crit_edge: ; preds = %bb10
+ br label %bb10.bb18.loopexit_crit_edge.split
+
+bb10.bb18.loopexit_crit_edge.split: ; preds = %bb.nph9, %bb10.bb18.loopexit_crit_edge
+ br label %bb18.loopexit
+
+bb.nph9: ; preds = %bb10.preheader
+ %13 = icmp sgt i32 %w, 0 ; <i1> [#uses=1]
+ br i1 %13, label %bb.nph9.split, label %bb10.bb18.loopexit_crit_edge.split
+
+bb.nph9.split: ; preds = %bb.nph9
+ br label %bb7.preheader
+
+bb7.preheader: ; preds = %bb.nph9.split, %bb10
+ %y.08 = phi i32 [ 0, %bb.nph9.split ], [ %indvar.next11, %bb10 ] ; <i32> [#uses=3]
+ br i1 true, label %bb.nph7, label %bb9
+
+bb.nph5: ; preds = %bb18.loopexit
+ %14 = sdiv i32 %w, 2 ; <i32> [#uses=1]
+ %15 = icmp slt i32 %w, 2 ; <i1> [#uses=1]
+ %16 = sdiv i32 %x, 2 ; <i32> [#uses=2]
+ br i1 %15, label %bb18.bb20_crit_edge.split, label %bb.nph5.split
+
+bb.nph5.split: ; preds = %bb.nph5
+ %tmp2 = icmp sgt i32 1, %16 ; <i1> [#uses=1]
+ %smax3 = select i1 %tmp2, i32 1, i32 %16 ; <i32> [#uses=1]
+ br label %bb13
+
+bb13: ; preds = %bb18, %bb.nph5.split
+ %y.14 = phi i32 [ 0, %bb.nph5.split ], [ %indvar.next1, %bb18 ] ; <i32> [#uses=4]
+ %17 = mul i32 %14, %y.14 ; <i32> [#uses=2]
+ %18 = shl i32 %y.14, 1 ; <i32> [#uses=1]
+ %19 = srem i32 %y.14, 2 ; <i32> [#uses=1]
+ %20 = add i32 %19, %18 ; <i32> [#uses=1]
+ %21 = mul i32 %20, %s ; <i32> [#uses=2]
+ br i1 true, label %bb.nph3, label %bb17
+
+bb.nph3: ; preds = %bb13
+ %22 = add i32 %17, %0 ; <i32> [#uses=1]
+ %23 = add i32 %17, %.sum2 ; <i32> [#uses=1]
+ %24 = sdiv i32 %w, 2 ; <i32> [#uses=2]
+ %tmp = icmp sgt i32 1, %24 ; <i1> [#uses=1]
+ %smax = select i1 %tmp, i32 1, i32 %24 ; <i32> [#uses=1]
+ br label %bb14
+
+bb14: ; preds = %bb15, %bb.nph3
+ %x.12 = phi i32 [ 0, %bb.nph3 ], [ %indvar.next, %bb15 ] ; <i32> [#uses=5]
+ %25 = shl i32 %x.12, 2 ; <i32> [#uses=1]
+ %26 = add i32 %25, %21 ; <i32> [#uses=1]
+ %27 = getelementptr i8* %r, i32 %26 ; <i8*> [#uses=1]
+ %28 = load i8* %27, align 1 ; <i8> [#uses=1]
+ %.sum = add i32 %22, %x.12 ; <i32> [#uses=1]
+ %29 = getelementptr i8* %j, i32 %.sum ; <i8*> [#uses=1]
+ store i8 %28, i8* %29, align 1
+ %30 = shl i32 %x.12, 2 ; <i32> [#uses=1]
+ %31 = or i32 %30, 2 ; <i32> [#uses=1]
+ %32 = add i32 %31, %21 ; <i32> [#uses=1]
+ %33 = getelementptr i8* %r, i32 %32 ; <i8*> [#uses=1]
+ %34 = load i8* %33, align 1 ; <i8> [#uses=1]
+ %.sum6 = add i32 %23, %x.12 ; <i32> [#uses=1]
+ %35 = getelementptr i8* %j, i32 %.sum6 ; <i8*> [#uses=1]
+ store i8 %34, i8* %35, align 1
+ br label %bb15
+
+bb15: ; preds = %bb14
+ %indvar.next = add i32 %x.12, 1 ; <i32> [#uses=2]
+ %exitcond = icmp ne i32 %indvar.next, %smax ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb14, label %bb15.bb17_crit_edge
+
+bb15.bb17_crit_edge: ; preds = %bb15
+ br label %bb17
+
+bb17: ; preds = %bb15.bb17_crit_edge, %bb13
+ br label %bb18
+
+bb18.loopexit: ; preds = %bb10.bb18.loopexit_crit_edge.split, %bb10.preheader
+ %36 = icmp slt i32 %x, 2 ; <i1> [#uses=1]
+ br i1 %36, label %bb20, label %bb.nph5
+
+bb18: ; preds = %bb17
+ %indvar.next1 = add i32 %y.14, 1 ; <i32> [#uses=2]
+ %exitcond4 = icmp ne i32 %indvar.next1, %smax3 ; <i1> [#uses=1]
+ br i1 %exitcond4, label %bb13, label %bb18.bb20_crit_edge
+
+bb18.bb20_crit_edge: ; preds = %bb18
+ br label %bb18.bb20_crit_edge.split
+
+bb18.bb20_crit_edge.split: ; preds = %bb18.bb20_crit_edge, %bb.nph5
+ br label %bb20
+
+bb20: ; preds = %bb18.bb20_crit_edge.split, %bb18.loopexit
+ switch i32 %d, label %return [
+ i32 3, label %bb22
+ i32 1, label %bb29
+ ]
+
+bb22: ; preds = %bb20
+ %37 = mul i32 %x, %w ; <i32> [#uses=1]
+ %38 = sdiv i32 %37, 4 ; <i32> [#uses=1]
+ %.sum3 = add i32 %38, %.sum2 ; <i32> [#uses=2]
+ %39 = add i32 %x, 15 ; <i32> [#uses=1]
+ %40 = and i32 %39, -16 ; <i32> [#uses=1]
+ %41 = add i32 %w, 15 ; <i32> [#uses=1]
+ %42 = and i32 %41, -16 ; <i32> [#uses=1]
+ %43 = mul i32 %40, %s ; <i32> [#uses=1]
+ %44 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %44, label %bb.nph, label %bb26
+
+bb.nph: ; preds = %bb22
+ br label %bb23
+
+bb23: ; preds = %bb24, %bb.nph
+ %y.21 = phi i32 [ 0, %bb.nph ], [ %indvar.next5, %bb24 ] ; <i32> [#uses=3]
+ %45 = mul i32 %y.21, %42 ; <i32> [#uses=1]
+ %.sum1 = add i32 %45, %43 ; <i32> [#uses=1]
+ %46 = getelementptr i8* %r, i32 %.sum1 ; <i8*> [#uses=1]
+ %47 = mul i32 %y.21, %w ; <i32> [#uses=1]
+ %.sum5 = add i32 %47, %.sum3 ; <i32> [#uses=1]
+ %48 = getelementptr i8* %j, i32 %.sum5 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32(i8* %48, i8* %46, i32 %w, i32 1)
+ br label %bb24
+
+bb24: ; preds = %bb23
+ %indvar.next5 = add i32 %y.21, 1 ; <i32> [#uses=2]
+ %exitcond6 = icmp ne i32 %indvar.next5, %x ; <i1> [#uses=1]
+ br i1 %exitcond6, label %bb23, label %bb24.bb26_crit_edge
+
+bb24.bb26_crit_edge: ; preds = %bb24
+ br label %bb26
+
+bb26: ; preds = %bb24.bb26_crit_edge, %bb22
+ %49 = mul i32 %x, %w ; <i32> [#uses=1]
+ %.sum4 = add i32 %.sum3, %49 ; <i32> [#uses=1]
+ %50 = getelementptr i8* %j, i32 %.sum4 ; <i8*> [#uses=1]
+ %51 = mul i32 %x, %w ; <i32> [#uses=1]
+ %52 = sdiv i32 %51, 2 ; <i32> [#uses=1]
+ tail call void @llvm.memset.i32(i8* %50, i8 -128, i32 %52, i32 1)
+ ret void
+
+bb29: ; preds = %bb20, %entry
+ %53 = add i32 %w, 15 ; <i32> [#uses=1]
+ %54 = and i32 %53, -16 ; <i32> [#uses=1]
+ %55 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %55, label %bb.nph11, label %bb33
+
+bb.nph11: ; preds = %bb29
+ br label %bb30
+
+bb30: ; preds = %bb31, %bb.nph11
+ %y.310 = phi i32 [ 0, %bb.nph11 ], [ %indvar.next13, %bb31 ] ; <i32> [#uses=3]
+ %56 = mul i32 %y.310, %54 ; <i32> [#uses=1]
+ %57 = getelementptr i8* %r, i32 %56 ; <i8*> [#uses=1]
+ %58 = mul i32 %y.310, %w ; <i32> [#uses=1]
+ %59 = getelementptr i8* %j, i32 %58 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32(i8* %59, i8* %57, i32 %w, i32 1)
+ br label %bb31
+
+bb31: ; preds = %bb30
+ %indvar.next13 = add i32 %y.310, 1 ; <i32> [#uses=2]
+ %exitcond14 = icmp ne i32 %indvar.next13, %x ; <i1> [#uses=1]
+ br i1 %exitcond14, label %bb30, label %bb31.bb33_crit_edge
+
+bb31.bb33_crit_edge: ; preds = %bb31
+ br label %bb33
+
+bb33: ; preds = %bb31.bb33_crit_edge, %bb29
+ %60 = mul i32 %x, %w ; <i32> [#uses=1]
+ %61 = getelementptr i8* %j, i32 %60 ; <i8*> [#uses=1]
+ %62 = mul i32 %x, %w ; <i32> [#uses=1]
+ %63 = sdiv i32 %62, 2 ; <i32> [#uses=1]
+ tail call void @llvm.memset.i32(i8* %61, i8 -128, i32 %63, i32 1)
+ ret void
+
+return: ; preds = %bb20
+ ret void
+}
+
+define void @bar(i8* %r, i32 %s, i32 %w, i32 %x, i8* %j, i32 %d) nounwind {
+entry:
+ %0 = mul i32 %x, %w ; <i32> [#uses=2]
+ %1 = mul i32 %x, %w ; <i32> [#uses=1]
+ %2 = udiv i32 %1, 4 ; <i32> [#uses=1]
+ %.sum2 = add i32 %2, %0 ; <i32> [#uses=2]
+ %cond = icmp eq i32 %d, 1 ; <i1> [#uses=1]
+ br i1 %cond, label %bb29, label %bb10.preheader
+
+bb10.preheader: ; preds = %entry
+ %3 = icmp ne i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb.nph9, label %bb18.loopexit
+
+bb.nph7: ; preds = %bb7.preheader
+ %4 = mul i32 %y.08, %w ; <i32> [#uses=1]
+ %5 = mul i32 %y.08, %s ; <i32> [#uses=1]
+ %6 = add i32 %5, 1 ; <i32> [#uses=1]
+ %tmp8 = icmp ugt i32 1, %w ; <i1> [#uses=1]
+ %smax9 = select i1 %tmp8, i32 1, i32 %w ; <i32> [#uses=1]
+ br label %bb6
+
+bb6: ; preds = %bb7, %bb.nph7
+ %x.06 = phi i32 [ 0, %bb.nph7 ], [ %indvar.next7, %bb7 ] ; <i32> [#uses=3]
+ %7 = add i32 %x.06, %4 ; <i32> [#uses=1]
+ %8 = shl i32 %x.06, 1 ; <i32> [#uses=1]
+ %9 = add i32 %6, %8 ; <i32> [#uses=1]
+ %10 = getelementptr i8* %r, i32 %9 ; <i8*> [#uses=1]
+ %11 = load i8* %10, align 1 ; <i8> [#uses=1]
+ %12 = getelementptr i8* %j, i32 %7 ; <i8*> [#uses=1]
+ store i8 %11, i8* %12, align 1
+ br label %bb7
+
+bb7: ; preds = %bb6
+ %indvar.next7 = add i32 %x.06, 1 ; <i32> [#uses=2]
+ %exitcond10 = icmp ne i32 %indvar.next7, %smax9 ; <i1> [#uses=1]
+ br i1 %exitcond10, label %bb6, label %bb7.bb9_crit_edge
+
+bb7.bb9_crit_edge: ; preds = %bb7
+ br label %bb9
+
+bb9: ; preds = %bb7.preheader, %bb7.bb9_crit_edge
+ br label %bb10
+
+bb10: ; preds = %bb9
+ %indvar.next11 = add i32 %y.08, 1 ; <i32> [#uses=2]
+ %exitcond12 = icmp ne i32 %indvar.next11, %x ; <i1> [#uses=1]
+ br i1 %exitcond12, label %bb7.preheader, label %bb10.bb18.loopexit_crit_edge
+
+bb10.bb18.loopexit_crit_edge: ; preds = %bb10
+ br label %bb10.bb18.loopexit_crit_edge.split
+
+bb10.bb18.loopexit_crit_edge.split: ; preds = %bb.nph9, %bb10.bb18.loopexit_crit_edge
+ br label %bb18.loopexit
+
+bb.nph9: ; preds = %bb10.preheader
+ %13 = icmp ugt i32 %w, 0 ; <i1> [#uses=1]
+ br i1 %13, label %bb.nph9.split, label %bb10.bb18.loopexit_crit_edge.split
+
+bb.nph9.split: ; preds = %bb.nph9
+ br label %bb7.preheader
+
+bb7.preheader: ; preds = %bb.nph9.split, %bb10
+ %y.08 = phi i32 [ 0, %bb.nph9.split ], [ %indvar.next11, %bb10 ] ; <i32> [#uses=3]
+ br i1 true, label %bb.nph7, label %bb9
+
+bb.nph5: ; preds = %bb18.loopexit
+ %14 = udiv i32 %w, 2 ; <i32> [#uses=1]
+ %15 = icmp ult i32 %w, 2 ; <i1> [#uses=1]
+ %16 = udiv i32 %x, 2 ; <i32> [#uses=2]
+ br i1 %15, label %bb18.bb20_crit_edge.split, label %bb.nph5.split
+
+bb.nph5.split: ; preds = %bb.nph5
+ %tmp2 = icmp ugt i32 1, %16 ; <i1> [#uses=1]
+ %smax3 = select i1 %tmp2, i32 1, i32 %16 ; <i32> [#uses=1]
+ br label %bb13
+
+bb13: ; preds = %bb18, %bb.nph5.split
+ %y.14 = phi i32 [ 0, %bb.nph5.split ], [ %indvar.next1, %bb18 ] ; <i32> [#uses=4]
+ %17 = mul i32 %14, %y.14 ; <i32> [#uses=2]
+ %18 = shl i32 %y.14, 1 ; <i32> [#uses=1]
+ %19 = urem i32 %y.14, 2 ; <i32> [#uses=1]
+ %20 = add i32 %19, %18 ; <i32> [#uses=1]
+ %21 = mul i32 %20, %s ; <i32> [#uses=2]
+ br i1 true, label %bb.nph3, label %bb17
+
+bb.nph3: ; preds = %bb13
+ %22 = add i32 %17, %0 ; <i32> [#uses=1]
+ %23 = add i32 %17, %.sum2 ; <i32> [#uses=1]
+ %24 = udiv i32 %w, 2 ; <i32> [#uses=2]
+ %tmp = icmp ugt i32 1, %24 ; <i1> [#uses=1]
+ %smax = select i1 %tmp, i32 1, i32 %24 ; <i32> [#uses=1]
+ br label %bb14
+
+bb14: ; preds = %bb15, %bb.nph3
+ %x.12 = phi i32 [ 0, %bb.nph3 ], [ %indvar.next, %bb15 ] ; <i32> [#uses=5]
+ %25 = shl i32 %x.12, 2 ; <i32> [#uses=1]
+ %26 = add i32 %25, %21 ; <i32> [#uses=1]
+ %27 = getelementptr i8* %r, i32 %26 ; <i8*> [#uses=1]
+ %28 = load i8* %27, align 1 ; <i8> [#uses=1]
+ %.sum = add i32 %22, %x.12 ; <i32> [#uses=1]
+ %29 = getelementptr i8* %j, i32 %.sum ; <i8*> [#uses=1]
+ store i8 %28, i8* %29, align 1
+ %30 = shl i32 %x.12, 2 ; <i32> [#uses=1]
+ %31 = or i32 %30, 2 ; <i32> [#uses=1]
+ %32 = add i32 %31, %21 ; <i32> [#uses=1]
+ %33 = getelementptr i8* %r, i32 %32 ; <i8*> [#uses=1]
+ %34 = load i8* %33, align 1 ; <i8> [#uses=1]
+ %.sum6 = add i32 %23, %x.12 ; <i32> [#uses=1]
+ %35 = getelementptr i8* %j, i32 %.sum6 ; <i8*> [#uses=1]
+ store i8 %34, i8* %35, align 1
+ br label %bb15
+
+bb15: ; preds = %bb14
+ %indvar.next = add i32 %x.12, 1 ; <i32> [#uses=2]
+ %exitcond = icmp ne i32 %indvar.next, %smax ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb14, label %bb15.bb17_crit_edge
+
+bb15.bb17_crit_edge: ; preds = %bb15
+ br label %bb17
+
+bb17: ; preds = %bb15.bb17_crit_edge, %bb13
+ br label %bb18
+
+bb18.loopexit: ; preds = %bb10.bb18.loopexit_crit_edge.split, %bb10.preheader
+ %36 = icmp ult i32 %x, 2 ; <i1> [#uses=1]
+ br i1 %36, label %bb20, label %bb.nph5
+
+bb18: ; preds = %bb17
+ %indvar.next1 = add i32 %y.14, 1 ; <i32> [#uses=2]
+ %exitcond4 = icmp ne i32 %indvar.next1, %smax3 ; <i1> [#uses=1]
+ br i1 %exitcond4, label %bb13, label %bb18.bb20_crit_edge
+
+bb18.bb20_crit_edge: ; preds = %bb18
+ br label %bb18.bb20_crit_edge.split
+
+bb18.bb20_crit_edge.split: ; preds = %bb18.bb20_crit_edge, %bb.nph5
+ br label %bb20
+
+bb20: ; preds = %bb18.bb20_crit_edge.split, %bb18.loopexit
+ switch i32 %d, label %return [
+ i32 3, label %bb22
+ i32 1, label %bb29
+ ]
+
+bb22: ; preds = %bb20
+ %37 = mul i32 %x, %w ; <i32> [#uses=1]
+ %38 = udiv i32 %37, 4 ; <i32> [#uses=1]
+ %.sum3 = add i32 %38, %.sum2 ; <i32> [#uses=2]
+ %39 = add i32 %x, 15 ; <i32> [#uses=1]
+ %40 = and i32 %39, -16 ; <i32> [#uses=1]
+ %41 = add i32 %w, 15 ; <i32> [#uses=1]
+ %42 = and i32 %41, -16 ; <i32> [#uses=1]
+ %43 = mul i32 %40, %s ; <i32> [#uses=1]
+ %44 = icmp ugt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %44, label %bb.nph, label %bb26
+
+bb.nph: ; preds = %bb22
+ br label %bb23
+
+bb23: ; preds = %bb24, %bb.nph
+ %y.21 = phi i32 [ 0, %bb.nph ], [ %indvar.next5, %bb24 ] ; <i32> [#uses=3]
+ %45 = mul i32 %y.21, %42 ; <i32> [#uses=1]
+ %.sum1 = add i32 %45, %43 ; <i32> [#uses=1]
+ %46 = getelementptr i8* %r, i32 %.sum1 ; <i8*> [#uses=1]
+ %47 = mul i32 %y.21, %w ; <i32> [#uses=1]
+ %.sum5 = add i32 %47, %.sum3 ; <i32> [#uses=1]
+ %48 = getelementptr i8* %j, i32 %.sum5 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32(i8* %48, i8* %46, i32 %w, i32 1)
+ br label %bb24
+
+bb24: ; preds = %bb23
+ %indvar.next5 = add i32 %y.21, 1 ; <i32> [#uses=2]
+ %exitcond6 = icmp ne i32 %indvar.next5, %x ; <i1> [#uses=1]
+ br i1 %exitcond6, label %bb23, label %bb24.bb26_crit_edge
+
+bb24.bb26_crit_edge: ; preds = %bb24
+ br label %bb26
+
+bb26: ; preds = %bb24.bb26_crit_edge, %bb22
+ %49 = mul i32 %x, %w ; <i32> [#uses=1]
+ %.sum4 = add i32 %.sum3, %49 ; <i32> [#uses=1]
+ %50 = getelementptr i8* %j, i32 %.sum4 ; <i8*> [#uses=1]
+ %51 = mul i32 %x, %w ; <i32> [#uses=1]
+ %52 = udiv i32 %51, 2 ; <i32> [#uses=1]
+ tail call void @llvm.memset.i32(i8* %50, i8 -128, i32 %52, i32 1)
+ ret void
+
+bb29: ; preds = %bb20, %entry
+ %53 = add i32 %w, 15 ; <i32> [#uses=1]
+ %54 = and i32 %53, -16 ; <i32> [#uses=1]
+ %55 = icmp ugt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %55, label %bb.nph11, label %bb33
+
+bb.nph11: ; preds = %bb29
+ br label %bb30
+
+bb30: ; preds = %bb31, %bb.nph11
+ %y.310 = phi i32 [ 0, %bb.nph11 ], [ %indvar.next13, %bb31 ] ; <i32> [#uses=3]
+ %56 = mul i32 %y.310, %54 ; <i32> [#uses=1]
+ %57 = getelementptr i8* %r, i32 %56 ; <i8*> [#uses=1]
+ %58 = mul i32 %y.310, %w ; <i32> [#uses=1]
+ %59 = getelementptr i8* %j, i32 %58 ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i32(i8* %59, i8* %57, i32 %w, i32 1)
+ br label %bb31
+
+bb31: ; preds = %bb30
+ %indvar.next13 = add i32 %y.310, 1 ; <i32> [#uses=2]
+ %exitcond14 = icmp ne i32 %indvar.next13, %x ; <i1> [#uses=1]
+ br i1 %exitcond14, label %bb30, label %bb31.bb33_crit_edge
+
+bb31.bb33_crit_edge: ; preds = %bb31
+ br label %bb33
+
+bb33: ; preds = %bb31.bb33_crit_edge, %bb29
+ %60 = mul i32 %x, %w ; <i32> [#uses=1]
+ %61 = getelementptr i8* %j, i32 %60 ; <i8*> [#uses=1]
+ %62 = mul i32 %x, %w ; <i32> [#uses=1]
+ %63 = udiv i32 %62, 2 ; <i32> [#uses=1]
+ tail call void @llvm.memset.i32(i8* %61, i8 -128, i32 %63, i32 1)
+ ret void
+
+return: ; preds = %bb20
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
diff --git a/test/CodeGen/X86/optimize-max-1.ll b/test/CodeGen/X86/optimize-max-1.ll
new file mode 100644
index 0000000..ad6c24d
--- /dev/null
+++ b/test/CodeGen/X86/optimize-max-1.ll
@@ -0,0 +1,78 @@
+; RUN: llc < %s -march=x86-64 | not grep cmov
+
+; LSR should be able to eliminate both smax and umax expressions
+; in loop trip counts.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define void @fs(double* nocapture %p, i64 %n) nounwind {
+entry:
+ %tmp = icmp slt i64 %n, 1 ; <i1> [#uses=1]
+ %smax = select i1 %tmp, i64 1, i64 %n ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %i.0 = phi i64 [ 0, %entry ], [ %0, %bb ] ; <i64> [#uses=2]
+ %scevgep = getelementptr double* %p, i64 %i.0 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %scevgep, align 8
+ %0 = add i64 %i.0, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %0, %smax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @bs(double* nocapture %p, i64 %n) nounwind {
+entry:
+ %tmp = icmp sge i64 %n, 1 ; <i1> [#uses=1]
+ %smax = select i1 %tmp, i64 %n, i64 1 ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %i.0 = phi i64 [ 0, %entry ], [ %0, %bb ] ; <i64> [#uses=2]
+ %scevgep = getelementptr double* %p, i64 %i.0 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %scevgep, align 8
+ %0 = add i64 %i.0, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %0, %smax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @fu(double* nocapture %p, i64 %n) nounwind {
+entry:
+ %tmp = icmp eq i64 %n, 0 ; <i1> [#uses=1]
+ %umax = select i1 %tmp, i64 1, i64 %n ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %i.0 = phi i64 [ 0, %entry ], [ %0, %bb ] ; <i64> [#uses=2]
+ %scevgep = getelementptr double* %p, i64 %i.0 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %scevgep, align 8
+ %0 = add i64 %i.0, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %0, %umax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @bu(double* nocapture %p, i64 %n) nounwind {
+entry:
+ %tmp = icmp ne i64 %n, 0 ; <i1> [#uses=1]
+ %umax = select i1 %tmp, i64 %n, i64 1 ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %i.0 = phi i64 [ 0, %entry ], [ %0, %bb ] ; <i64> [#uses=2]
+ %scevgep = getelementptr double* %p, i64 %i.0 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %scevgep, align 8
+ %0 = add i64 %i.0, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %0, %umax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
diff --git a/test/CodeGen/X86/optimize-max-2.ll b/test/CodeGen/X86/optimize-max-2.ll
new file mode 100644
index 0000000..8851c5b
--- /dev/null
+++ b/test/CodeGen/X86/optimize-max-2.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep cmov %t | count 2
+; RUN: grep jne %t | count 1
+
+; LSR's OptimizeMax function shouldn't try to eliminate this max, because
+; it has three operands.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define void @foo(double* nocapture %p, i64 %x, i64 %y) nounwind {
+entry:
+ %tmp = icmp eq i64 %y, 0 ; <i1> [#uses=1]
+ %umax = select i1 %tmp, i64 1, i64 %y ; <i64> [#uses=2]
+ %tmp8 = icmp ugt i64 %umax, %x ; <i1> [#uses=1]
+ %umax9 = select i1 %tmp8, i64 %umax, i64 %x ; <i64> [#uses=1]
+ br label %bb4
+
+bb4: ; preds = %bb4, %entry
+ %i.07 = phi i64 [ 0, %entry ], [ %2, %bb4 ] ; <i64> [#uses=2]
+ %scevgep = getelementptr double* %p, i64 %i.07 ; <double*> [#uses=2]
+ %0 = load double* %scevgep, align 8 ; <double> [#uses=1]
+ %1 = fmul double %0, 2.000000e+00 ; <double> [#uses=1]
+ store double %1, double* %scevgep, align 8
+ %2 = add i64 %i.07, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %2, %umax9 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb4
+
+return: ; preds = %bb4
+ ret void
+}
diff --git a/test/CodeGen/X86/or-branch.ll b/test/CodeGen/X86/or-branch.ll
new file mode 100644
index 0000000..9ebf890
--- /dev/null
+++ b/test/CodeGen/X86/or-branch.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 | not grep set
+
+define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind {
+entry:
+ %tmp = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ %tmp.upgrd.1 = icmp eq i32 %X, 0 ; <i1> [#uses=1]
+ %tmp3 = icmp slt i32 %Y, 5 ; <i1> [#uses=1]
+ %tmp4 = or i1 %tmp3, %tmp.upgrd.1 ; <i1> [#uses=1]
+ br i1 %tmp4, label %cond_true, label %UnifiedReturnBlock
+
+cond_true: ; preds = %entry
+ %tmp5 = tail call i32 (...)* @bar( ) ; <i32> [#uses=0]
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/X86/overlap-shift.ll b/test/CodeGen/X86/overlap-shift.ll
new file mode 100644
index 0000000..c1fc041
--- /dev/null
+++ b/test/CodeGen/X86/overlap-shift.ll
@@ -0,0 +1,19 @@
+;; X's live range extends beyond the shift, so the register allocator
+;; cannot coalesce it with Y. Because of this, a copy needs to be
+;; emitted before the shift to save the register value before it is
+;; clobbered. However, this copy is not needed if the register
+;; allocator turns the shift into an LEA. This also occurs for ADD.
+
+; Check that the shift gets turned into an LEA.
+
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: not grep {mov E.X, E.X}
+
+@G = external global i32 ; <i32*> [#uses=1]
+
+define i32 @test1(i32 %X) {
+ %Z = shl i32 %X, 2 ; <i32> [#uses=1]
+ volatile store i32 %Z, i32* @G
+ ret i32 %X
+}
+
diff --git a/test/CodeGen/X86/packed_struct.ll b/test/CodeGen/X86/packed_struct.ll
new file mode 100644
index 0000000..da6e8f8
--- /dev/null
+++ b/test/CodeGen/X86/packed_struct.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep foos+5 %t
+; RUN: grep foos+1 %t
+; RUN: grep foos+9 %t
+; RUN: grep bara+19 %t
+; RUN: grep bara+4 %t
+
+; make sure we compute the correct offset for a packed structure
+
+;Note: codegen for this could change rendering the above checks wrong
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.anon = type <{ i8, i32, i32, i32 }>
+@foos = external global %struct.anon ; <%struct.anon*> [#uses=3]
+@bara = weak global [4 x <{ i32, i8 }>] zeroinitializer ; <[4 x <{ i32, i8 }>]*> [#uses=2]
+
+define i32 @foo() nounwind {
+entry:
+ %tmp = load i32* getelementptr (%struct.anon* @foos, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr (%struct.anon* @foos, i32 0, i32 2) ; <i32> [#uses=1]
+ %tmp6 = load i32* getelementptr (%struct.anon* @foos, i32 0, i32 3) ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp3, %tmp ; <i32> [#uses=1]
+ %tmp7 = add i32 %tmp4, %tmp6 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
+
+define i8 @bar() nounwind {
+entry:
+ %tmp = load i8* getelementptr ([4 x <{ i32, i8 }>]* @bara, i32 0, i32 0, i32 1) ; <i8> [#uses=1]
+ %tmp4 = load i8* getelementptr ([4 x <{ i32, i8 }>]* @bara, i32 0, i32 3, i32 1) ; <i8> [#uses=1]
+ %tmp5 = add i8 %tmp4, %tmp ; <i8> [#uses=1]
+ ret i8 %tmp5
+}
diff --git a/test/CodeGen/X86/palignr-2.ll b/test/CodeGen/X86/palignr-2.ll
new file mode 100644
index 0000000..116d4c7
--- /dev/null
+++ b/test/CodeGen/X86/palignr-2.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86 -mattr=+ssse3 | FileCheck %s
+; rdar://7341330
+
+@a = global [4 x i32] [i32 4, i32 5, i32 6, i32 7], align 16 ; <[4 x i32]*> [#uses=1]
+@c = common global [4 x i32] zeroinitializer, align 16 ; <[4 x i32]*> [#uses=1]
+@b = global [4 x i32] [i32 0, i32 1, i32 2, i32 3], align 16 ; <[4 x i32]*> [#uses=1]
+
+define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp {
+entry:
+; CHECK: t1:
+; palignr $3, %xmm1, %xmm0
+ %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i8 24) nounwind readnone
+ store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16
+ ret void
+}
+
+declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnone
+
+define void @t2() nounwind ssp {
+entry:
+; CHECK: t2:
+; palignr $4, _b, %xmm0
+ %0 = load <2 x i64>* bitcast ([4 x i32]* @b to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1]
+ %1 = load <2 x i64>* bitcast ([4 x i32]* @a to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1]
+ %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 32) nounwind readnone
+ store <2 x i64> %2, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16
+ ret void
+}
diff --git a/test/CodeGen/X86/palignr.ll b/test/CodeGen/X86/palignr.ll
new file mode 100644
index 0000000..3812c72
--- /dev/null
+++ b/test/CodeGen/X86/palignr.ll
@@ -0,0 +1,58 @@
+; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s
+; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck --check-prefix=YONAH %s
+
+define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
+; CHECK: pshufd
+; CHECK-YONAH: pshufd
+ %C = shufflevector <4 x i32> %A, <4 x i32> undef, <4 x i32> < i32 1, i32 2, i32 3, i32 0 >
+ ret <4 x i32> %C
+}
+
+define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) nounwind {
+; CHECK: palignr
+; CHECK-YONAH: shufps
+ %C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 1, i32 2, i32 3, i32 4 >
+ ret <4 x i32> %C
+}
+
+define <4 x i32> @test3(<4 x i32> %A, <4 x i32> %B) nounwind {
+; CHECK: palignr
+ %C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 1, i32 2, i32 undef, i32 4 >
+ ret <4 x i32> %C
+}
+
+define <4 x i32> @test4(<4 x i32> %A, <4 x i32> %B) nounwind {
+; CHECK: palignr
+ %C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 6, i32 7, i32 undef, i32 1 >
+ ret <4 x i32> %C
+}
+
+define <4 x float> @test5(<4 x float> %A, <4 x float> %B) nounwind {
+; CHECK: palignr
+ %C = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 6, i32 7, i32 undef, i32 1 >
+ ret <4 x float> %C
+}
+
+define <8 x i16> @test6(<8 x i16> %A, <8 x i16> %B) nounwind {
+; CHECK: palignr
+ %C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 3, i32 4, i32 undef, i32 6, i32 7, i32 8, i32 9, i32 10 >
+ ret <8 x i16> %C
+}
+
+define <8 x i16> @test7(<8 x i16> %A, <8 x i16> %B) nounwind {
+; CHECK: palignr
+ %C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 undef, i32 6, i32 undef, i32 8, i32 9, i32 10, i32 11, i32 12 >
+ ret <8 x i16> %C
+}
+
+define <8 x i16> @test8(<8 x i16> %A, <8 x i16> %B) nounwind {
+; CHECK: palignr
+ %C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 undef, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0 >
+ ret <8 x i16> %C
+}
+
+define <16 x i8> @test9(<16 x i8> %A, <16 x i8> %B) nounwind {
+; CHECK: palignr
+ %C = shufflevector <16 x i8> %A, <16 x i8> %B, <16 x i32> < i32 5, i32 6, i32 7, i32 undef, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20 >
+ ret <16 x i8> %C
+}
diff --git a/test/CodeGen/X86/peep-test-0.ll b/test/CodeGen/X86/peep-test-0.ll
new file mode 100644
index 0000000..e521d8e
--- /dev/null
+++ b/test/CodeGen/X86/peep-test-0.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: not grep cmp %t
+; RUN: not grep test %t
+
+define void @loop(i64 %n, double* nocapture %d) nounwind {
+entry:
+ br label %bb
+
+bb:
+ %indvar = phi i64 [ %n, %entry ], [ %indvar.next, %bb ]
+ %i.03 = add i64 %indvar, %n
+ %0 = getelementptr double* %d, i64 %i.03
+ %1 = load double* %0, align 8
+ %2 = fmul double %1, 3.000000e+00
+ store double %2, double* %0, align 8
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 0
+ br i1 %exitcond, label %return, label %bb
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/X86/peep-test-1.ll b/test/CodeGen/X86/peep-test-1.ll
new file mode 100644
index 0000000..f83f0f6
--- /dev/null
+++ b/test/CodeGen/X86/peep-test-1.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep dec %t | count 1
+; RUN: not grep test %t
+; RUN: not grep cmp %t
+
+define void @foo(i32 %n, double* nocapture %p) nounwind {
+ br label %bb
+
+bb:
+ %indvar = phi i32 [ 0, %0 ], [ %indvar.next, %bb ]
+ %i.03 = sub i32 %n, %indvar
+ %1 = getelementptr double* %p, i32 %i.03
+ %2 = load double* %1, align 4
+ %3 = fmul double %2, 2.930000e+00
+ store double %3, double* %1, align 4
+ %4 = add i32 %i.03, -1
+ %phitmp = icmp slt i32 %4, 0
+ %indvar.next = add i32 %indvar, 1
+ br i1 %phitmp, label %bb, label %return
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/X86/peep-test-2.ll b/test/CodeGen/X86/peep-test-2.ll
new file mode 100644
index 0000000..2745172
--- /dev/null
+++ b/test/CodeGen/X86/peep-test-2.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 | grep testl
+
+; It's tempting to eliminate the testl instruction here and just use the
+; EFLAGS value from the incl, however it can't be known whether the add
+; will overflow, and if it does the incl would set OF, and the
+; subsequent setg would return true.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+define i32 @f(i32 %j) nounwind readnone {
+entry:
+ %0 = add i32 %j, 1 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 0 ; <i1> [#uses=1]
+ %2 = zext i1 %1 to i32 ; <i32> [#uses=1]
+ ret i32 %2
+}
diff --git a/test/CodeGen/X86/peep-test-3.ll b/test/CodeGen/X86/peep-test-3.ll
new file mode 100644
index 0000000..a34a978
--- /dev/null
+++ b/test/CodeGen/X86/peep-test-3.ll
@@ -0,0 +1,89 @@
+; RUN: llc < %s -march=x86 -post-RA-scheduler=false | FileCheck %s
+; rdar://7226797
+
+; LLVM should omit the testl and use the flags result from the orl.
+
+; CHECK: or:
+define void @or(float* %A, i32 %IA, i32 %N) nounwind {
+entry:
+ %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
+ %1 = and i32 %0, 3 ; <i32> [#uses=1]
+ %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
+; CHECK: orl %ecx, %edx
+; CHECK-NEXT: je
+ %3 = or i32 %2, %1 ; <i32> [#uses=1]
+ %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
+ br i1 %4, label %return, label %bb
+
+bb: ; preds = %entry
+ store float 0.000000e+00, float* %A, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+; CHECK: xor:
+define void @xor(float* %A, i32 %IA, i32 %N) nounwind {
+entry:
+ %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
+ %1 = and i32 %0, 3 ; <i32> [#uses=1]
+; CHECK: xorl $1, %e
+; CHECK-NEXT: je
+ %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
+ %3 = xor i32 %2, %1 ; <i32> [#uses=1]
+ %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
+ br i1 %4, label %return, label %bb
+
+bb: ; preds = %entry
+ store float 0.000000e+00, float* %A, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+; CHECK: and:
+define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
+entry:
+ store i8 0, i8* %p
+ %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
+ %1 = and i32 %0, 3 ; <i32> [#uses=1]
+ %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
+; CHECK: andl $3, %
+; CHECK-NEXT: movb %
+; CHECK-NEXT: je
+ %3 = and i32 %2, %1 ; <i32> [#uses=1]
+ %t = trunc i32 %3 to i8
+ store i8 %t, i8* %p
+ %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
+ br i1 %4, label %return, label %bb
+
+bb: ; preds = %entry
+ store float 0.000000e+00, float* null, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+; Just like @and, but without the trunc+store. This should use a testb
+; instead of an andl.
+; CHECK: test:
+define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
+entry:
+ store i8 0, i8* %p
+ %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
+ %1 = and i32 %0, 3 ; <i32> [#uses=1]
+ %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
+; CHECK: testb $3, %
+; CHECK-NEXT: je
+ %3 = and i32 %2, %1 ; <i32> [#uses=1]
+ %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
+ br i1 %4, label %return, label %bb
+
+bb: ; preds = %entry
+ store float 0.000000e+00, float* null, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/peep-vector-extract-concat.ll b/test/CodeGen/X86/peep-vector-extract-concat.ll
new file mode 100644
index 0000000..e4ab2b5
--- /dev/null
+++ b/test/CodeGen/X86/peep-vector-extract-concat.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep {pshufd \$3, %xmm0, %xmm0}
+
+define float @foo(<8 x float> %a) nounwind {
+ %c = extractelement <8 x float> %a, i32 3
+ ret float %c
+}
diff --git a/test/CodeGen/X86/peep-vector-extract-insert.ll b/test/CodeGen/X86/peep-vector-extract-insert.ll
new file mode 100644
index 0000000..5e18044
--- /dev/null
+++ b/test/CodeGen/X86/peep-vector-extract-insert.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64 | grep {pxor %xmm0, %xmm0} | count 2
+
+define float @foo(<4 x float> %a) {
+ %b = insertelement <4 x float> %a, float 0.0, i32 3
+ %c = extractelement <4 x float> %b, i32 3
+ ret float %c
+}
+define float @bar(float %a) {
+ %b = insertelement <4 x float> <float 0x400B333340000000, float 4.5, float 0.0, float 0x4022666660000000>, float %a, i32 3
+ %c = extractelement <4 x float> %b, i32 2
+ ret float %c
+}
diff --git a/test/CodeGen/X86/personality.ll b/test/CodeGen/X86/personality.ll
new file mode 100644
index 0000000..ce57e8f
--- /dev/null
+++ b/test/CodeGen/X86/personality.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32
+; PR1632
+
+define void @_Z1fv() {
+entry:
+ invoke void @_Z1gv( )
+ to label %return unwind label %unwind
+
+unwind: ; preds = %entry
+ br i1 false, label %eh_then, label %cleanup20
+
+eh_then: ; preds = %unwind
+ invoke void @__cxa_end_catch( )
+ to label %return unwind label %unwind10
+
+unwind10: ; preds = %eh_then
+ %eh_select13 = tail call i64 (i8*, i8*, ...)* @llvm.eh.selector.i64( i8* null, i8* bitcast (void ()* @__gxx_personality_v0 to i8*), i32 1 ) ; <i32> [#uses=2]
+ %tmp18 = icmp slt i64 %eh_select13, 0 ; <i1> [#uses=1]
+ br i1 %tmp18, label %filter, label %cleanup20
+
+filter: ; preds = %unwind10
+ unreachable
+
+cleanup20: ; preds = %unwind10, %unwind
+ %eh_selector.0 = phi i64 [ 0, %unwind ], [ %eh_select13, %unwind10 ] ; <i32> [#uses=0]
+ ret void
+
+return: ; preds = %eh_then, %entry
+ ret void
+}
+
+declare void @_Z1gv()
+
+declare i64 @llvm.eh.selector.i64(i8*, i8*, ...)
+
+declare void @__gxx_personality_v0()
+
+declare void @__cxa_end_catch()
+
+; X64: Leh_frame_common_begin:
+; X64: .long (___gxx_personality_v0@GOTPCREL)+4
+
+; X32: Leh_frame_common_begin:
+; X32: .long L___gxx_personality_v0$non_lazy_ptr-
+; ....
+
+; X32: .section __IMPORT,__pointers,non_lazy_symbol_pointers
+; X32: L___gxx_personality_v0$non_lazy_ptr:
+; X32: .indirect_symbol ___gxx_personality_v0
diff --git a/test/CodeGen/X86/phi-immediate-factoring.ll b/test/CodeGen/X86/phi-immediate-factoring.ll
new file mode 100644
index 0000000..9f9f921
--- /dev/null
+++ b/test/CodeGen/X86/phi-immediate-factoring.ll
@@ -0,0 +1,54 @@
+; PR1296
+; RUN: llc < %s -march=x86 | grep {movl \$1} | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @foo(i32 %A, i32 %B, i32 %C) {
+entry:
+ switch i32 %A, label %out [
+ i32 1, label %bb
+ i32 0, label %bb13
+ i32 2, label %bb35
+ ]
+
+bb: ; preds = %cond_next, %entry
+ %i.144.1 = phi i32 [ 0, %entry ], [ %tmp7, %cond_next ] ; <i32> [#uses=2]
+ %tmp4 = and i32 %i.144.1, %B ; <i32> [#uses=1]
+ icmp eq i32 %tmp4, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %cond_next, label %out
+
+cond_next: ; preds = %bb
+ %tmp7 = add i32 %i.144.1, 1 ; <i32> [#uses=2]
+ icmp slt i32 %tmp7, 1000 ; <i1>:1 [#uses=1]
+ br i1 %1, label %bb, label %out
+
+bb13: ; preds = %cond_next18, %entry
+ %i.248.1 = phi i32 [ 0, %entry ], [ %tmp20, %cond_next18 ] ; <i32> [#uses=2]
+ %tmp16 = and i32 %i.248.1, %C ; <i32> [#uses=1]
+ icmp eq i32 %tmp16, 0 ; <i1>:2 [#uses=1]
+ br i1 %2, label %cond_next18, label %out
+
+cond_next18: ; preds = %bb13
+ %tmp20 = add i32 %i.248.1, 1 ; <i32> [#uses=2]
+ icmp slt i32 %tmp20, 1000 ; <i1>:3 [#uses=1]
+ br i1 %3, label %bb13, label %out
+
+bb27: ; preds = %bb35
+ %tmp30 = and i32 %i.3, %C ; <i32> [#uses=1]
+ icmp eq i32 %tmp30, 0 ; <i1>:4 [#uses=1]
+ br i1 %4, label %cond_next32, label %out
+
+cond_next32: ; preds = %bb27
+ %indvar.next = add i32 %i.3, 1 ; <i32> [#uses=1]
+ br label %bb35
+
+bb35: ; preds = %entry, %cond_next32
+ %i.3 = phi i32 [ %indvar.next, %cond_next32 ], [ 0, %entry ] ; <i32> [#uses=3]
+ icmp slt i32 %i.3, 1000 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb27, label %out
+
+out: ; preds = %bb27, %bb35, %bb13, %cond_next18, %bb, %cond_next, %entry
+ %result.0 = phi i32 [ 0, %entry ], [ 1, %bb ], [ 0, %cond_next ], [ 1, %bb13 ], [ 0, %cond_next18 ], [ 1, %bb27 ], [ 0, %bb35 ] ; <i32> [#uses=1]
+ ret i32 %result.0
+}
diff --git a/test/CodeGen/X86/phys-reg-local-regalloc.ll b/test/CodeGen/X86/phys-reg-local-regalloc.ll
new file mode 100644
index 0000000..045841e
--- /dev/null
+++ b/test/CodeGen/X86/phys-reg-local-regalloc.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=local | FileCheck %s
+; RUN: llc -O0 < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=local | FileCheck %s
+; CHECKed instructions should be the same with or without -O0.
+
[email protected] = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+; CHECK: movl 24(%esp), %eax
+; CHECK-NOT: movl
+; CHECK: movl %eax, 36(%esp)
+; CHECK-NOT: movl
+; CHECK: movl 28(%esp), %ebx
+; CHECK-NOT: movl
+; CHECK: movl %ebx, 40(%esp)
+; CHECK-NOT: movl
+; CHECK: addl %ebx, %eax
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %"%ebx" = alloca i32 ; <i32*> [#uses=1]
+ %"%eax" = alloca i32 ; <i32*> [#uses=2]
+ %result = alloca i32 ; <i32*> [#uses=2]
+ %y = alloca i32 ; <i32*> [#uses=2]
+ %x = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 1, i32* %x, align 4
+ store i32 2, i32* %y, align 4
+ call void asm sideeffect alignstack "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind
+ %asmtmp = call i32 asm sideeffect alignstack "movl $1, $0", "=={eax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32* %x) nounwind ; <i32> [#uses=1]
+ store i32 %asmtmp, i32* %"%eax"
+ %asmtmp1 = call i32 asm sideeffect alignstack "movl $1, $0", "=={ebx},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32* %y) nounwind ; <i32> [#uses=1]
+ store i32 %asmtmp1, i32* %"%ebx"
+ %1 = call i32 asm "", "={bx}"() nounwind ; <i32> [#uses=1]
+ %2 = call i32 asm "", "={ax}"() nounwind ; <i32> [#uses=1]
+ %asmtmp2 = call i32 asm sideeffect alignstack "addl $1, $0", "=={eax},{ebx},{eax},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %1, i32 %2) nounwind ; <i32> [#uses=1]
+ store i32 %asmtmp2, i32* %"%eax"
+ %3 = call i32 asm "", "={ax}"() nounwind ; <i32> [#uses=1]
+ call void asm sideeffect alignstack "movl $0, $1", "{eax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %3, i32* %result) nounwind
+ %4 = load i32* %result, align 4 ; <i32> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 %4) nounwind ; <i32> [#uses=0]
+ store i32 0, i32* %0, align 4
+ %6 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %6, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval3 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval3
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/X86/phys_subreg_coalesce-2.ll b/test/CodeGen/X86/phys_subreg_coalesce-2.ll
new file mode 100644
index 0000000..23c509c
--- /dev/null
+++ b/test/CodeGen/X86/phys_subreg_coalesce-2.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86 | grep mov | count 5
+; PR2659
+
+define i32 @binomial(i32 %n, i32 %k) nounwind {
+entry:
+ %cmp = icmp ugt i32 %k, %n ; <i1> [#uses=1]
+ br i1 %cmp, label %ifthen, label %forcond.preheader
+
+forcond.preheader: ; preds = %entry
+ %cmp44 = icmp eq i32 %k, 0 ; <i1> [#uses=1]
+ br i1 %cmp44, label %afterfor, label %forbody
+
+ifthen: ; preds = %entry
+ ret i32 0
+
+forbody: ; preds = %forbody, %forcond.preheader
+ %indvar = phi i32 [ 0, %forcond.preheader ], [ %divisor.02, %forbody ] ; <i32> [#uses=3]
+ %accumulator.01 = phi i32 [ 1, %forcond.preheader ], [ %div, %forbody ] ; <i32> [#uses=1]
+ %divisor.02 = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %n.addr.03 = sub i32 %n, %indvar ; <i32> [#uses=1]
+ %mul = mul i32 %n.addr.03, %accumulator.01 ; <i32> [#uses=1]
+ %div = udiv i32 %mul, %divisor.02 ; <i32> [#uses=2]
+ %inc = add i32 %indvar, 2 ; <i32> [#uses=1]
+ %cmp4 = icmp ugt i32 %inc, %k ; <i1> [#uses=1]
+ br i1 %cmp4, label %afterfor, label %forbody
+
+afterfor: ; preds = %forbody, %forcond.preheader
+ %accumulator.0.lcssa = phi i32 [ 1, %forcond.preheader ], [ %div, %forbody ] ; <i32> [#uses=1]
+ ret i32 %accumulator.0.lcssa
+}
diff --git a/test/CodeGen/X86/phys_subreg_coalesce.ll b/test/CodeGen/X86/phys_subreg_coalesce.ll
new file mode 100644
index 0000000..2c855ce
--- /dev/null
+++ b/test/CodeGen/X86/phys_subreg_coalesce.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | not grep movl
+
+ %struct.dpoint = type { double, double }
+
+define %struct.dpoint @midpoint(i64 %p1.0, i64 %p2.0) nounwind readnone {
+entry:
+ %0 = trunc i64 %p1.0 to i32 ; <i32> [#uses=1]
+ %1 = sitofp i32 %0 to double ; <double> [#uses=1]
+ %2 = trunc i64 %p2.0 to i32 ; <i32> [#uses=1]
+ %3 = sitofp i32 %2 to double ; <double> [#uses=1]
+ %4 = fadd double %1, %3 ; <double> [#uses=1]
+ %5 = fmul double %4, 5.000000e-01 ; <double> [#uses=1]
+ %6 = lshr i64 %p1.0, 32 ; <i64> [#uses=1]
+ %7 = trunc i64 %6 to i32 ; <i32> [#uses=1]
+ %8 = sitofp i32 %7 to double ; <double> [#uses=1]
+ %9 = lshr i64 %p2.0, 32 ; <i64> [#uses=1]
+ %10 = trunc i64 %9 to i32 ; <i32> [#uses=1]
+ %11 = sitofp i32 %10 to double ; <double> [#uses=1]
+ %12 = fadd double %8, %11 ; <double> [#uses=1]
+ %13 = fmul double %12, 5.000000e-01 ; <double> [#uses=1]
+ %mrv3 = insertvalue %struct.dpoint undef, double %5, 0 ; <%struct.dpoint> [#uses=1]
+ %mrv4 = insertvalue %struct.dpoint %mrv3, double %13, 1 ; <%struct.dpoint> [#uses=1]
+ ret %struct.dpoint %mrv4
+}
diff --git a/test/CodeGen/X86/pic-load-remat.ll b/test/CodeGen/X86/pic-load-remat.ll
new file mode 100644
index 0000000..7729752
--- /dev/null
+++ b/test/CodeGen/X86/pic-load-remat.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | grep psllw | grep pb
+
+define void @f() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %tmp4403 = tail call <8 x i16> @llvm.x86.sse2.psubs.w( <8 x i16> zeroinitializer, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %tmp4443 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> zeroinitializer, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp4609 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 3, i32 5, i32 6, i32 9 > to <8 x i16>) ) ; <<8 x i16>> [#uses=1]
+ %tmp4651 = add <8 x i16> %tmp4609, < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 > ; <<8 x i16>> [#uses=1]
+ %tmp4658 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4651, <8 x i16> bitcast (<4 x i32> < i32 4, i32 1, i32 2, i32 3 > to <8 x i16>) ) ; <<8 x i16>> [#uses=1]
+ %tmp4669 = tail call <8 x i16> @llvm.x86.sse2.pavg.w( <8 x i16> < i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170 >, <8 x i16> %tmp4443 ) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %tmp4679 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4669, <8 x i16> %tmp4669 ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp4689 = add <8 x i16> %tmp4679, %tmp4658 ; <<8 x i16>> [#uses=1]
+ %tmp4700 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4689, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp4708 = bitcast <8 x i16> %tmp4700 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp4772 = add <8 x i16> zeroinitializer, < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 > ; <<8 x i16>> [#uses=1]
+ %tmp4779 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4772, <8 x i16> bitcast (<4 x i32> < i32 3, i32 5, i32 undef, i32 7 > to <8 x i16>) ) ; <<8 x i16>> [#uses=1]
+ %tmp4810 = add <8 x i16> zeroinitializer, %tmp4779 ; <<8 x i16>> [#uses=1]
+ %tmp4821 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4810, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp4829 = bitcast <8 x i16> %tmp4821 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp4900 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 1, i32 1, i32 2, i32 2 > to <8 x i16>) ) ; <<8 x i16>> [#uses=1]
+ %tmp4911 = tail call <8 x i16> @llvm.x86.sse2.pavg.w( <8 x i16> < i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170 >, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=2]
+ %tmp4921 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4911, <8 x i16> %tmp4911 ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp4931 = add <8 x i16> %tmp4921, %tmp4900 ; <<8 x i16>> [#uses=1]
+ %tmp4942 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4931, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp4950 = bitcast <8 x i16> %tmp4942 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp4957 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4403, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp4958 = bitcast <8 x i16> %tmp4957 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp4967 = tail call <8 x i16> @llvm.x86.sse2.psubs.w( <8 x i16> %tmp4403, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp4968 = bitcast <8 x i16> %tmp4967 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ store <2 x i64> %tmp4829, <2 x i64>* null, align 16
+ store <2 x i64> %tmp4958, <2 x i64>* null, align 16
+ store <2 x i64> %tmp4968, <2 x i64>* null, align 16
+ store <2 x i64> %tmp4950, <2 x i64>* null, align 16
+ store <2 x i64> %tmp4708, <2 x i64>* null, align 16
+ br label %bb
+}
+
+declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone
diff --git a/test/CodeGen/X86/pic.ll b/test/CodeGen/X86/pic.ll
new file mode 100644
index 0000000..d3c28a0
--- /dev/null
+++ b/test/CodeGen/X86/pic.ll
@@ -0,0 +1,208 @@
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX
+
+@ptr = external global i32*
+@dst = external global i32
+@src = external global i32
+
+define void @test1() nounwind {
+entry:
+ store i32* @dst, i32** @ptr
+ %tmp.s = load i32* @src
+ store i32 %tmp.s, i32* @dst
+ ret void
+
+; LINUX: test1:
+; LINUX: call .L1$pb
+; LINUX-NEXT: .L1$pb:
+; LINUX-NEXT: popl
+; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref1-.L1$pb),
+; LINUX: movl dst@GOT(%eax),
+; LINUX: movl ptr@GOT(%eax),
+; LINUX: movl src@GOT(%eax),
+; LINUX: ret
+}
+
+@ptr2 = global i32* null
+@dst2 = global i32 0
+@src2 = global i32 0
+
+define void @test2() nounwind {
+entry:
+ store i32* @dst2, i32** @ptr2
+ %tmp.s = load i32* @src2
+ store i32 %tmp.s, i32* @dst2
+ ret void
+
+; LINUX: test2:
+; LINUX: call .L2$pb
+; LINUX-NEXT: .L2$pb:
+; LINUX-NEXT: popl
+; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref2-.L2$pb), %eax
+; LINUX: movl dst2@GOT(%eax),
+; LINUX: movl ptr2@GOT(%eax),
+; LINUX: movl src2@GOT(%eax),
+; LINUX: ret
+
+}
+
+declare i8* @malloc(i32)
+
+define void @test3() nounwind {
+entry:
+ %ptr = call i8* @malloc(i32 40)
+ ret void
+; LINUX: test3:
+; LINUX: pushl %ebx
+; LINUX-NEXT: subl $8, %esp
+; LINUX-NEXT: call .L3$pb
+; LINUX-NEXT: .L3$pb:
+; LINUX-NEXT: popl %ebx
+; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref3-.L3$pb), %ebx
+; LINUX: movl $40, (%esp)
+; LINUX: call malloc@PLT
+; LINUX: addl $8, %esp
+; LINUX: popl %ebx
+; LINUX: ret
+}
+
+@pfoo = external global void(...)*
+
+define void @test4() nounwind {
+entry:
+ %tmp = call void(...)*(...)* @afoo()
+ store void(...)* %tmp, void(...)** @pfoo
+ %tmp1 = load void(...)** @pfoo
+ call void(...)* %tmp1()
+ ret void
+; LINUX: test4:
+; LINUX: call .L4$pb
+; LINUX-NEXT: .L4$pb:
+; LINUX: popl
+; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref4-.L4$pb),
+; LINUX: movl pfoo@GOT(%esi),
+; LINUX: call afoo@PLT
+; LINUX: call *
+}
+
+declare void(...)* @afoo(...)
+
+define void @test5() nounwind {
+entry:
+ call void(...)* @foo()
+ ret void
+; LINUX: test5:
+; LINUX: call .L5$pb
+; LINUX: popl %ebx
+; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref5-.L5$pb), %ebx
+; LINUX: call foo@PLT
+}
+
+declare void @foo(...)
+
+
+@ptr6 = internal global i32* null
+@dst6 = internal global i32 0
+@src6 = internal global i32 0
+
+define void @test6() nounwind {
+entry:
+ store i32* @dst6, i32** @ptr6
+ %tmp.s = load i32* @src6
+ store i32 %tmp.s, i32* @dst6
+ ret void
+
+; LINUX: test6:
+; LINUX: call .L6$pb
+; LINUX-NEXT: .L6$pb:
+; LINUX-NEXT: popl %eax
+; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref6-.L6$pb), %eax
+; LINUX: leal dst6@GOTOFF(%eax), %ecx
+; LINUX: movl %ecx, ptr6@GOTOFF(%eax)
+; LINUX: movl src6@GOTOFF(%eax), %ecx
+; LINUX: movl %ecx, dst6@GOTOFF(%eax)
+; LINUX: ret
+}
+
+
+;; Test constant pool references.
+define double @test7(i32 %a.u) nounwind {
+entry:
+ %tmp = icmp eq i32 %a.u,0
+ %retval = select i1 %tmp, double 4.561230e+02, double 1.234560e+02
+ ret double %retval
+
+; LINUX: .LCPI7_0:
+
+; LINUX: test7:
+; LINUX: call .L7$pb
+; LINUX: .L7$pb:
+; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref7-.L7$pb),
+; LINUX: fldl .LCPI7_0@GOTOFF(
+}
+
+
+;; Test jump table references.
+define void @test8(i32 %n.u) nounwind {
+entry:
+ switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ]
+bb:
+ tail call void(...)* @foo1()
+ ret void
+bb1:
+ tail call void(...)* @foo2()
+ ret void
+bb2:
+ tail call void(...)* @foo6()
+ ret void
+bb3:
+ tail call void(...)* @foo3()
+ ret void
+bb4:
+ tail call void(...)* @foo4()
+ ret void
+bb5:
+ tail call void(...)* @foo5()
+ ret void
+bb6:
+ tail call void(...)* @foo1()
+ ret void
+bb7:
+ tail call void(...)* @foo2()
+ ret void
+bb8:
+ tail call void(...)* @foo6()
+ ret void
+bb9:
+ tail call void(...)* @foo3()
+ ret void
+bb10:
+ tail call void(...)* @foo4()
+ ret void
+bb11:
+ tail call void(...)* @foo5()
+ ret void
+bb12:
+ tail call void(...)* @foo6()
+ ret void
+
+; LINUX: test8:
+; LINUX: call .L8$pb
+; LINUX: .L8$pb:
+; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref8-.L8$pb),
+; LINUX: addl .LJTI8_0@GOTOFF(
+; LINUX: jmpl *
+
+; LINUX: .LJTI8_0:
+; LINUX: .long .LBB8_2@GOTOFF
+; LINUX: .long .LBB8_2@GOTOFF
+; LINUX: .long .LBB8_7@GOTOFF
+; LINUX: .long .LBB8_3@GOTOFF
+; LINUX: .long .LBB8_7@GOTOFF
+}
+
+declare void @foo1(...)
+declare void @foo2(...)
+declare void @foo6(...)
+declare void @foo3(...)
+declare void @foo4(...)
+declare void @foo5(...)
diff --git a/test/CodeGen/X86/pic_jumptable.ll b/test/CodeGen/X86/pic_jumptable.ll
new file mode 100644
index 0000000..b3750c1
--- /dev/null
+++ b/test/CodeGen/X86/pic_jumptable.ll
@@ -0,0 +1,78 @@
+; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text
+; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea
+; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI'
+; rdar://6971437
+
+declare void @_Z3bari(i32)
+
+define linkonce void @_Z3fooILi1EEvi(i32 %Y) nounwind {
+entry:
+ %Y_addr = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %Y, i32* %Y_addr
+ %tmp = load i32* %Y_addr ; <i32> [#uses=1]
+ switch i32 %tmp, label %bb10 [
+ i32 0, label %bb3
+ i32 1, label %bb
+ i32 2, label %bb
+ i32 3, label %bb
+ i32 4, label %bb
+ i32 5, label %bb
+ i32 6, label %bb
+ i32 7, label %bb
+ i32 8, label %bb
+ i32 9, label %bb
+ i32 10, label %bb
+ i32 12, label %bb1
+ i32 13, label %bb5
+ i32 14, label %bb6
+ i32 16, label %bb2
+ i32 17, label %bb4
+ i32 23, label %bb8
+ i32 27, label %bb7
+ i32 34, label %bb9
+ ]
+
+bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ br label %bb2
+
+bb2: ; preds = %bb1, %entry
+ call void @_Z3bari( i32 1 )
+ br label %bb11
+
+bb3: ; preds = %entry
+ br label %bb4
+
+bb4: ; preds = %bb3, %entry
+ br label %bb5
+
+bb5: ; preds = %bb4, %entry
+ br label %bb6
+
+bb6: ; preds = %bb5, %entry
+ call void @_Z3bari( i32 2 )
+ br label %bb11
+
+bb7: ; preds = %entry
+ br label %bb8
+
+bb8: ; preds = %bb7, %entry
+ br label %bb9
+
+bb9: ; preds = %bb8, %entry
+ call void @_Z3bari( i32 3 )
+ br label %bb11
+
+bb10: ; preds = %entry
+ br label %bb11
+
+bb11: ; preds = %bb10, %bb9, %bb6, %bb2
+ br label %return
+
+return: ; preds = %bb11
+ ret void
+}
diff --git a/test/CodeGen/X86/pmul.ll b/test/CodeGen/X86/pmul.ll
new file mode 100644
index 0000000..e2746a8
--- /dev/null
+++ b/test/CodeGen/X86/pmul.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=x86 -mattr=sse41 -stack-alignment=16 > %t
+; RUN: grep pmul %t | count 12
+; RUN: grep mov %t | count 12
+
+define <4 x i32> @a(<4 x i32> %i) nounwind {
+ %A = mul <4 x i32> %i, < i32 117, i32 117, i32 117, i32 117 >
+ ret <4 x i32> %A
+}
+define <2 x i64> @b(<2 x i64> %i) nounwind {
+ %A = mul <2 x i64> %i, < i64 117, i64 117 >
+ ret <2 x i64> %A
+}
+define <4 x i32> @c(<4 x i32> %i, <4 x i32> %j) nounwind {
+ %A = mul <4 x i32> %i, %j
+ ret <4 x i32> %A
+}
+define <2 x i64> @d(<2 x i64> %i, <2 x i64> %j) nounwind {
+ %A = mul <2 x i64> %i, %j
+ ret <2 x i64> %A
+}
+; Use a call to force spills.
+declare void @foo()
+define <4 x i32> @e(<4 x i32> %i, <4 x i32> %j) nounwind {
+ call void @foo()
+ %A = mul <4 x i32> %i, %j
+ ret <4 x i32> %A
+}
+define <2 x i64> @f(<2 x i64> %i, <2 x i64> %j) nounwind {
+ call void @foo()
+ %A = mul <2 x i64> %i, %j
+ ret <2 x i64> %A
+}
diff --git a/test/CodeGen/X86/postalloc-coalescing.ll b/test/CodeGen/X86/postalloc-coalescing.ll
new file mode 100644
index 0000000..a171436
--- /dev/null
+++ b/test/CodeGen/X86/postalloc-coalescing.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -march=x86 | grep mov | count 3
+
+define fastcc i32 @_Z18yy_get_next_bufferv() {
+entry:
+ br label %bb131
+
+bb116: ; preds = %bb131
+ %tmp125126 = trunc i32 %c.1 to i8 ; <i8> [#uses=1]
+ store i8 %tmp125126, i8* null, align 1
+ br label %bb131
+
+bb131: ; preds = %bb116, %entry
+ %c.2 = phi i32 [ %c.1, %bb116 ], [ 42, %entry ] ; <i32> [#uses=1]
+ %c.1 = select i1 false, i32 0, i32 %c.2 ; <i32> [#uses=4]
+ %tmp181 = icmp eq i32 %c.1, -1 ; <i1> [#uses=1]
+ br i1 %tmp181, label %bb158, label %bb116
+
+bb158: ; preds = %bb131
+ br i1 true, label %cond_true163, label %cond_next178
+
+cond_true163: ; preds = %bb158
+ %tmp172173 = trunc i32 %c.1 to i8 ; <i8> [#uses=1]
+ store i8 %tmp172173, i8* null, align 1
+ br label %cond_next178
+
+cond_next178: ; preds = %cond_true163, %bb158
+ %tmp180 = icmp eq i32 %c.1, -1 ; <i1> [#uses=1]
+ br i1 %tmp180, label %cond_next184, label %cond_next199
+
+cond_next184: ; preds = %cond_next178
+ ret i32 0
+
+cond_next199: ; preds = %cond_next178
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/powi.ll b/test/CodeGen/X86/powi.ll
new file mode 100644
index 0000000..c3d6831
--- /dev/null
+++ b/test/CodeGen/X86/powi.ll
@@ -0,0 +1,11 @@
+; RUN: llc %s -march=x86 -mcpu=yonah -o - | grep mulsd | count 6
+; Ideally this would compile to 5 multiplies.
+
+define double @_Z3f10d(double %a) nounwind readonly ssp noredzone {
+entry:
+ %0 = tail call double @llvm.powi.f64(double %a, i32 15) nounwind ; <double> [#uses=1]
+ ret double %0
+}
+
+declare double @llvm.powi.f64(double, i32) nounwind readonly
+
diff --git a/test/CodeGen/X86/pr1462.ll b/test/CodeGen/X86/pr1462.ll
new file mode 100644
index 0000000..62549a5
--- /dev/null
+++ b/test/CodeGen/X86/pr1462.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s
+; PR1462
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-
+v64:64:64-v128:128:128-a0:0:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+define hidden i128 @__addvti3(i128 %a1, i128 %b2) {
+entry:
+ %tmp8 = add i128 %b2, %a1 ; <i128> [#uses=3]
+ %tmp10 = icmp sgt i128 %b2, -1 ; <i1> [#uses=1]
+ %tmp18 = icmp sgt i128 %tmp8, %a1 ; <i1> [#uses=1]
+ %tmp14 = icmp slt i128 %tmp8, %a1 ; <i1> [#uses=1]
+ %iftmp.0.0.in = select i1 %tmp10, i1 %tmp14, i1 %tmp18 ; <i1> [#uses=1]
+ br i1 %iftmp.0.0.in, label %cond_true22, label %cond_next23
+
+cond_true22: ; preds = %entry
+ tail call void @abort( )
+ unreachable
+
+cond_next23: ; preds = %entry
+ ret i128 %tmp8
+}
+
+declare void @abort()
diff --git a/test/CodeGen/X86/pr1489.ll b/test/CodeGen/X86/pr1489.ll
new file mode 100644
index 0000000..c9e24bf
--- /dev/null
+++ b/test/CodeGen/X86/pr1489.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -disable-fp-elim -O0 -mcpu=i486 | grep 1082126238 | count 3
+; RUN: llc < %s -disable-fp-elim -O0 -mcpu=i486 | grep -- -1236950581 | count 1
+;; magic constants are 3.999f and half of 3.999
+; ModuleID = '1489.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
[email protected] = internal constant [13 x i8] c"%d %d %d %d\0A\00" ; <[13 x i8]*> [#uses=1]
+
+define i32 @quux() nounwind {
+entry:
+ %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1]
+ %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1]
+ %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp23
+}
+
+declare i32 @lrintf(float)
+
+define i32 @foo() nounwind {
+entry:
+ %tmp1 = tail call i32 @lrint( double 3.999000e+00 ) ; <i32> [#uses=1]
+ %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1]
+ %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp23
+}
+
+declare i32 @lrint(double)
+
+define i32 @bar() nounwind {
+entry:
+ %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1]
+ %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1]
+ %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp23
+}
+
+define i32 @baz() nounwind {
+entry:
+ %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1]
+ %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1]
+ %tmp23 = zext i1 %tmp2 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp23
+}
+
+define i32 @main() nounwind {
+entry:
+ %tmp = tail call i32 @baz( ) ; <i32> [#uses=1]
+ %tmp1 = tail call i32 @bar( ) ; <i32> [#uses=1]
+ %tmp2 = tail call i32 @foo( ) ; <i32> [#uses=1]
+ %tmp3 = tail call i32 @quux( ) ; <i32> [#uses=1]
+ %tmp5 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 %tmp3, i32 %tmp2, i32 %tmp1, i32 %tmp ) ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/X86/pr1505.ll b/test/CodeGen/X86/pr1505.ll
new file mode 100644
index 0000000..883a806
--- /dev/null
+++ b/test/CodeGen/X86/pr1505.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mcpu=i486 | not grep fldl
+; PR1505
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+@G = weak global float 0.000000e+00 ; <float*> [#uses=1]
+
+define void @t1(float %F) {
+entry:
+ store float %F, float* @G
+ ret void
+}
diff --git a/test/CodeGen/X86/pr1505b.ll b/test/CodeGen/X86/pr1505b.ll
new file mode 100644
index 0000000..12736cd
--- /dev/null
+++ b/test/CodeGen/X86/pr1505b.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s -mcpu=i486 | grep fstpl | count 4
+; RUN: llc < %s -mcpu=i486 | grep fstps | count 3
+; PR1505
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::ctype_base" = type <{ i8 }>
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+@a = global float 0x3FD3333340000000 ; <float*> [#uses=1]
+@b = global double 6.000000e-01, align 8 ; <double*> [#uses=1]
+@_ZSt8__ioinit = internal global %"struct.std::ctype_base" zeroinitializer ; <%"struct.std::ctype_base"*> [#uses=2]
+@__dso_handle = external global i8* ; <i8**> [#uses=1]
+@_ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=2]
[email protected] = internal constant [12 x i8] c"tan float: \00" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [13 x i8] c"tan double: \00" ; <[13 x i8]*> [#uses=1]
+
+declare void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ctype_base"*)
+
+declare void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ctype_base"*)
+
+declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*)
+
+define i32 @main() {
+entry:
+ %tmp6 = volatile load float* @a ; <float> [#uses=1]
+ %tmp9 = tail call float @tanf( float %tmp6 ) ; <float> [#uses=1]
+ %tmp12 = volatile load double* @b ; <double> [#uses=1]
+ %tmp13 = tail call double @tan( double %tmp12 ) ; <double> [#uses=1]
+ %tmp1314 = fptrunc double %tmp13 to float ; <float> [#uses=1]
+ %tmp16 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0) ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+ %tmp1920 = fpext float %tmp9 to double ; <double> [#uses=1]
+ %tmp22 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp16, double %tmp1920 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+ %tmp30 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp22 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+ %tmp34 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([13 x i8]* @.str1, i32 0, i32 0) ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+ %tmp3940 = fpext float %tmp1314 to double ; <double> [#uses=1]
+ %tmp42 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp34, double %tmp3940 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+ %tmp51 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp42 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+ ret i32 0
+}
+
+declare float @tanf(float)
+
+declare double @tan(double)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, double)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(%"struct.std::basic_ostream<char,std::char_traits<char> >"*)
diff --git a/test/CodeGen/X86/pr2177.ll b/test/CodeGen/X86/pr2177.ll
new file mode 100644
index 0000000..e941bf7
--- /dev/null
+++ b/test/CodeGen/X86/pr2177.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s
+; PR2177
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.1.0"
+ %struct.S2259 = type { <4 x i16>, i8, i64 }
+
+define void @check2259va(i32 %z, ...) {
+entry:
+ br i1 false, label %bb5, label %return
+bb5: ; preds = %entry
+ switch i32 0, label %bb155 [
+ i32 16, label %bb10
+ i32 17, label %bb118
+ i32 18, label %bb54
+ i32 32, label %bb118
+ i32 33, label %bb118
+ i32 36, label %bb118
+ ]
+bb10: ; preds = %bb5
+ ret void
+bb54: ; preds = %bb5
+ ret void
+bb118: ; preds = %bb5, %bb5, %bb5, %bb5
+ %tmp125 = load i8** null, align 8 ; <i8*> [#uses=1]
+ %tmp125126 = bitcast i8* %tmp125 to %struct.S2259* ; <%struct.S2259*> [#uses=1]
+ %tmp128 = getelementptr %struct.S2259* %tmp125126, i32 0, i32 0 ; <<4 x i16>*> [#uses=1]
+ %tmp129 = load <4 x i16>* %tmp128, align 8 ; <<4 x i16>> [#uses=1]
+ store <4 x i16> %tmp129, <4 x i16>* null, align 8
+ ret void
+bb155: ; preds = %bb5
+ ret void
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/pr2182.ll b/test/CodeGen/X86/pr2182.ll
new file mode 100644
index 0000000..f97663c
--- /dev/null
+++ b/test/CodeGen/X86/pr2182.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s | grep {addl \$3, (%eax)} | count 4
+; PR2182
+
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@x = weak global i32 0 ; <i32*> [#uses=8]
+
+define void @loop_2() nounwind {
+entry:
+ %tmp = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ %tmp1 = add i32 %tmp, 3 ; <i32> [#uses=1]
+ volatile store i32 %tmp1, i32* @x, align 4
+ %tmp.1 = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ %tmp1.1 = add i32 %tmp.1, 3 ; <i32> [#uses=1]
+ volatile store i32 %tmp1.1, i32* @x, align 4
+ %tmp.2 = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ %tmp1.2 = add i32 %tmp.2, 3 ; <i32> [#uses=1]
+ volatile store i32 %tmp1.2, i32* @x, align 4
+ %tmp.3 = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ %tmp1.3 = add i32 %tmp.3, 3 ; <i32> [#uses=1]
+ volatile store i32 %tmp1.3, i32* @x, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/pr2326.ll b/test/CodeGen/X86/pr2326.ll
new file mode 100644
index 0000000..f82dcb5
--- /dev/null
+++ b/test/CodeGen/X86/pr2326.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 | grep sete
+; PR2326
+
+define i32 @func_59(i32 %p_60) nounwind {
+entry:
+ %l_108 = alloca i32 ; <i32*> [#uses=2]
+ %tmp15 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp16 = load i32* %l_108, align 4 ; <i32> [#uses=1]
+ %tmp17 = icmp eq i32 %tmp15, %tmp16 ; <i1> [#uses=1]
+ %tmp1718 = zext i1 %tmp17 to i8 ; <i8> [#uses=1]
+ %tmp19 = load i32* null, align 4 ; <i32> [#uses=1]
+ %tmp20 = load i32* %l_108, align 4 ; <i32> [#uses=1]
+ %tmp21 = icmp ule i32 %tmp19, %tmp20 ; <i1> [#uses=1]
+ %tmp2122 = zext i1 %tmp21 to i8 ; <i8> [#uses=1]
+ %toBool23 = icmp ne i8 %tmp1718, 0 ; <i1> [#uses=1]
+ %toBool24 = icmp ne i8 %tmp2122, 0 ; <i1> [#uses=1]
+ %tmp25 = and i1 %toBool23, %toBool24 ; <i1> [#uses=1]
+ %tmp2526 = zext i1 %tmp25 to i8 ; <i8> [#uses=1]
+ %tmp252627 = zext i8 %tmp2526 to i32 ; <i32> [#uses=1]
+ %tmp29 = call i32 (...)* @func_15( i32 %tmp252627, i32 0 ) nounwind ; <i32> [#uses=0]
+ unreachable
+}
+
+declare i32 @func_15(...)
diff --git a/test/CodeGen/X86/pr2623.ll b/test/CodeGen/X86/pr2623.ll
new file mode 100644
index 0000000..5d0eb5d
--- /dev/null
+++ b/test/CodeGen/X86/pr2623.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s
+; PR2623
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-unknown-freebsd7.0"
+ %.objc_id = type { %.objc_id }*
+ %.objc_selector = type { i8*, i8* }*
[email protected]_sel_ptr = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr13 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr14 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr15 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr16 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr17 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr18 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr19 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr20 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
[email protected]_sel_ptr21 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1]
+
[email protected]_untyped_selector_alias = alias internal %.objc_selector* @.objc_sel_ptr15 ; <%.objc_selector*> [#uses=0]
[email protected]_untyped_selector_alias1 = alias internal %.objc_selector* @.objc_sel_ptr ; <%.objc_selector*> [#uses=0]
[email protected]_untyped_selector_alias2 = alias internal %.objc_selector* @.objc_sel_ptr17 ; <%.objc_selector*> [#uses=0]
[email protected]_untyped_selector_alias3 = alias internal %.objc_selector* @.objc_sel_ptr16 ; <%.objc_selector*> [#uses=0]
[email protected]_untyped_selector_alias4 = alias internal %.objc_selector* @.objc_sel_ptr13 ; <%.objc_selector*> [#uses=0]
[email protected]_untyped_selector_alias7 = alias internal %.objc_selector* @.objc_sel_ptr14 ; <%.objc_selector*> [#uses=0]
+@getRange = alias internal %.objc_selector* @.objc_sel_ptr18 ; <%.objc_selector*> [#uses=0]
+@"valueWithRange:" = alias internal %.objc_selector* @.objc_sel_ptr21 ; <%.objc_selector*> [#uses=0]
+@rangeValue = alias internal %.objc_selector* @.objc_sel_ptr20 ; <%.objc_selector*> [#uses=0]
+@"printRange:" = alias internal %.objc_selector* @.objc_sel_ptr19 ; <%.objc_selector*> [#uses=0]
+
+define void @"._objc_method_SmalltalkTool()-run"(i8* %self, %.objc_selector %_cmd) {
+entry:
+ br i1 false, label %small_int_messagerangeValue, label %real_object_messagerangeValue
+
+small_int_messagerangeValue: ; preds = %entry
+ br label %Continue
+
+real_object_messagerangeValue: ; preds = %entry
+ br label %Continue
+
+Continue: ; preds = %real_object_messagerangeValue, %small_int_messagerangeValue
+ %rangeValue = phi { i32, i32 } [ undef, %small_int_messagerangeValue ], [ undef, %real_object_messagerangeValue ] ; <{ i32, i32 }> [#uses=1]
+ call void (%.objc_id, %.objc_selector, ...)* null( %.objc_id null, %.objc_selector null, { i32, i32 } %rangeValue )
+ ret void
+}
diff --git a/test/CodeGen/X86/pr2656.ll b/test/CodeGen/X86/pr2656.ll
new file mode 100644
index 0000000..afd7114
--- /dev/null
+++ b/test/CodeGen/X86/pr2656.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {xorps.\*sp} | count 1
+; PR2656
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9.4.0"
+ %struct.anon = type <{ float, float }>
[email protected] = internal constant [17 x i8] c"pt: %.0f, %.0f\0A\00\00" ; <[17 x i8]*> [#uses=1]
+
+define void @foo(%struct.anon* byval %p) nounwind {
+entry:
+ %tmp = getelementptr %struct.anon* %p, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp1 = load float* %tmp ; <float> [#uses=1]
+ %tmp2 = getelementptr %struct.anon* %p, i32 0, i32 1 ; <float*> [#uses=1]
+ %tmp3 = load float* %tmp2 ; <float> [#uses=1]
+ %neg = fsub float -0.000000e+00, %tmp1 ; <float> [#uses=1]
+ %conv = fpext float %neg to double ; <double> [#uses=1]
+ %neg4 = fsub float -0.000000e+00, %tmp3 ; <float> [#uses=1]
+ %conv5 = fpext float %neg4 to double ; <double> [#uses=1]
+ %call = call i32 (...)* @printf( i8* getelementptr ([17 x i8]* @.str, i32 0, i32 0), double %conv, double %conv5 ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(...)
diff --git a/test/CodeGen/X86/pr2659.ll b/test/CodeGen/X86/pr2659.ll
new file mode 100644
index 0000000..0760e4c
--- /dev/null
+++ b/test/CodeGen/X86/pr2659.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 5
+; PR2659
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9.4.0"
+
+define i32 @binomial(i32 %n, i32 %k) nounwind {
+entry:
+ %cmp = icmp ugt i32 %k, %n ; <i1> [#uses=1]
+ br i1 %cmp, label %ifthen, label %forcond.preheader
+
+forcond.preheader: ; preds = %entry
+ %cmp44 = icmp eq i32 %k, 0 ; <i1> [#uses=1]
+ br i1 %cmp44, label %afterfor, label %forbody
+
+ifthen: ; preds = %entry
+ ret i32 0
+
+forbody: ; preds = %forbody, %forcond.preheader
+ %indvar = phi i32 [ 0, %forcond.preheader ], [ %divisor.02, %forbody ] ; <i32> [#uses=3]
+ %accumulator.01 = phi i32 [ 1, %forcond.preheader ], [ %div, %forbody ] ; <i32> [#uses=1]
+ %divisor.02 = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %n.addr.03 = sub i32 %n, %indvar ; <i32> [#uses=1]
+ %mul = mul i32 %n.addr.03, %accumulator.01 ; <i32> [#uses=1]
+ %div = udiv i32 %mul, %divisor.02 ; <i32> [#uses=2]
+ %inc = add i32 %indvar, 2 ; <i32> [#uses=1]
+ %cmp4 = icmp ugt i32 %inc, %k ; <i1> [#uses=1]
+ br i1 %cmp4, label %afterfor, label %forbody
+
+afterfor: ; preds = %forbody, %forcond.preheader
+ %accumulator.0.lcssa = phi i32 [ 1, %forcond.preheader ], [ %div, %forbody ] ; <i32> [#uses=1]
+ ret i32 %accumulator.0.lcssa
+}
diff --git a/test/CodeGen/X86/pr2849.ll b/test/CodeGen/X86/pr2849.ll
new file mode 100644
index 0000000..0fec481
--- /dev/null
+++ b/test/CodeGen/X86/pr2849.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s
+; PR2849
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.BaseBoundPtrs = type { i8*, i8* }
+ %struct.HashEntry = type { %struct.BaseBoundPtrs }
+ %struct.NODE = type { i8, i8, %struct.anon }
+ %struct.anon = type { %struct.xlist }
+ %struct.xlist = type { %struct.NODE*, %struct.NODE* }
+ %struct.xvect = type { %struct.NODE** }
+@hash_table_begin = external global %struct.HashEntry*
+
+define void @obshow() {
+entry:
+ %tmp = load %struct.HashEntry** @hash_table_begin, align 8
+ br i1 false, label %xlygetvalue.exit, label %xlygetvalue.exit
+
+xlygetvalue.exit:
+ %storemerge.in.i = phi %struct.NODE** [ null, %entry ], [ null, %entry ]
+ %storemerge.i = load %struct.NODE** %storemerge.in.i
+ %tmp1 = ptrtoint %struct.NODE** %storemerge.in.i to i64
+ %tmp2 = lshr i64 %tmp1, 3
+ %tmp3 = and i64 %tmp2, 2147483647
+ %tmp4 = getelementptr %struct.HashEntry* %tmp, i64 %tmp3, i32 0, i32 1
+ %tmp7 = load i8** %tmp4, align 8
+ %tmp8 = getelementptr %struct.NODE* %storemerge.i, i64 0, i32 2
+ %tmp9 = bitcast %struct.anon* %tmp8 to %struct.NODE***
+ %tmp11 = load %struct.NODE*** %tmp9, align 8
+ %tmp12 = ptrtoint %struct.NODE** %tmp11 to i64
+ %tmp13 = lshr i64 %tmp12, 3
+ %tmp14 = and i64 %tmp13, 2147483647
+ %tmp15 = getelementptr %struct.HashEntry* %tmp, i64 %tmp14, i32 0, i32 1
+ call fastcc void @xlprint(i8** %tmp4, i8* %tmp7, i8** %tmp15)
+ ret void
+}
+
+declare fastcc void @xlprint(i8**, i8*, i8**)
diff --git a/test/CodeGen/X86/pr2924.ll b/test/CodeGen/X86/pr2924.ll
new file mode 100644
index 0000000..b9e8dc1
--- /dev/null
+++ b/test/CodeGen/X86/pr2924.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s
+; PR2924
+
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define x86_stdcallcc { i32, i8* } @_D3std6string7toupperFAaZAa({ i32, i8* } %s) {
+entry_std.string.toupper:
+ %tmp58 = load i32* null
+ %tmp59 = icmp eq i32 %tmp58, 0
+ %r.val = load { i32, i8* }* null, align 8
+ %condtmp.0 = select i1 %tmp59, { i32, i8* } undef, { i32, i8* } %r.val
+
+ ret { i32, i8* } %condtmp.0
+}
+define { } @empty({ } %s) {
+entry_std.string.toupper:
+ %tmp58 = load i32* null
+ %tmp59 = icmp eq i32 %tmp58, 0
+ %r.val = load { }* null, align 8
+ %condtmp.0 = select i1 %tmp59, { } undef, { } %r.val
+ ret { } %condtmp.0
+}
diff --git a/test/CodeGen/X86/pr2982.ll b/test/CodeGen/X86/pr2982.ll
new file mode 100644
index 0000000..3f9a595
--- /dev/null
+++ b/test/CodeGen/X86/pr2982.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86
+; PR2982
+
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+@g_279 = external global i32 ; <i32*> [#uses=1]
+@g_265 = external global i32 ; <i32*> [#uses=1]
+@g_3 = external global i8 ; <i8*> [#uses=1]
+
+declare i32 @rshift_u_u(...)
+
+define void @bar() nounwind {
+entry:
+ %0 = load i32* @g_279, align 4 ; <i32> [#uses=1]
+ %1 = shl i32 %0, 1 ; <i32> [#uses=1]
+ %2 = and i32 %1, 2 ; <i32> [#uses=1]
+ %3 = load i32* @g_265, align 4 ; <i32> [#uses=1]
+ %4 = load i8* @g_3, align 1 ; <i8> [#uses=1]
+ %5 = sext i8 %4 to i32 ; <i32> [#uses=1]
+ %6 = add i32 %2, %3 ; <i32> [#uses=1]
+ %7 = add i32 %6, %5 ; <i32> [#uses=1]
+ %8 = tail call i32 (...)* @rshift_u_u(i32 %7, i32 0) nounwind
+; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/CodeGen/X86/pr3154.ll b/test/CodeGen/X86/pr3154.ll
new file mode 100644
index 0000000..18df97c
--- /dev/null
+++ b/test/CodeGen/X86/pr3154.ll
@@ -0,0 +1,104 @@
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2 -relocation-model=pic -disable-fp-elim
+; PR3154
+
+define void @ff_flac_compute_autocorr_sse2(i32* %data, i32 %len, i32 %lag, double* %autoc) nounwind {
+entry:
+ %c = alloca double, align 8 ; <double*> [#uses=2]
+ %0 = add i32 %len, 2 ; <i32> [#uses=1]
+ %1 = add i32 %0, %lag ; <i32> [#uses=1]
+ %2 = alloca double, i32 %1 ; <double*> [#uses=2]
+ %3 = getelementptr double* %2, i32 %lag ; <double*> [#uses=2]
+ %4 = ptrtoint double* %3 to i32 ; <i32> [#uses=1]
+ %5 = and i32 %4, 8 ; <i32> [#uses=1]
+ %6 = icmp eq i32 %5, 0 ; <i1> [#uses=1]
+ br i1 %6, label %bb19, label %bb
+
+bb: ; preds = %entry
+ %.sum = add i32 %lag, 1 ; <i32> [#uses=1]
+ %7 = getelementptr double* %2, i32 %.sum ; <double*> [#uses=1]
+ br label %bb19
+
+bb19: ; preds = %bb, %entry
+ %data15.0 = phi double* [ %7, %bb ], [ %3, %entry ] ; <double*> [#uses=5]
+ %8 = sitofp i32 %len to double ; <double> [#uses=1]
+ %9 = fsub double %8, 1.000000e+00 ; <double> [#uses=1]
+ %10 = fdiv double 2.000000e+00, %9 ; <double> [#uses=1]
+ store double %10, double* %c, align 8
+ %11 = ashr i32 %len, 1 ; <i32> [#uses=3]
+ %12 = mul i32 %11, -4 ; <i32> [#uses=2]
+ %13 = shl i32 %len, 1 ; <i32> [#uses=1]
+ %14 = and i32 %13, -4 ; <i32> [#uses=2]
+ call void asm sideeffect "movsd $0, %xmm7 \0A\09movapd ff_pd_1, %xmm6 \0A\09movapd ff_pd_2, %xmm5 \0A\09movlhps %xmm7, %xmm7 \0A\09subpd %xmm5, %xmm7 \0A\09addsd %xmm6, %xmm7 \0A\09", "*m,~{dirflag},~{fpsr},~{flags}"(double* %c) nounwind
+ %15 = and i32 %len, 1 ; <i32> [#uses=1]
+ %toBool = icmp eq i32 %15, 0 ; <i1> [#uses=1]
+ %16 = getelementptr double* %data15.0, i32 %11 ; <double*> [#uses=2]
+ %17 = getelementptr i32* %data, i32 %11 ; <i32*> [#uses=2]
+ br i1 %toBool, label %bb22, label %bb20
+
+bb20: ; preds = %bb19
+ %asmtmp = call { i32, i32 } asm sideeffect "1: \0A\09movapd %xmm7, %xmm1 \0A\09mulpd %xmm1, %xmm1 \0A\09movapd %xmm6, %xmm0 \0A\09subpd %xmm1, %xmm0 \0A\09pshufd $$0x4e, %xmm0, %xmm1 \0A\09cvtpi2pd ($3,$0), %xmm2 \0A\09cvtpi2pd -1*4($3,$1), %xmm3 \0A\09mulpd %xmm0, %xmm2 \0A\09mulpd %xmm1, %xmm3 \0A\09movapd %xmm2, ($2,$0,2) \0A\09movupd %xmm3, -1*8($2,$1,2) \0A\09subpd %xmm5, %xmm7 \0A\09sub $$8, $1 \0A\09add $$8, $0 \0A\09jl 1b \0A\09", "=&r,=&r,r,r,0,1,~{dirflag},~{fpsr},~{flags}"(double* %16, i32* %17, i32 %12, i32 %14) nounwind ; <{ i32, i32 }> [#uses=0]
+ br label %bb28.preheader
+
+bb22: ; preds = %bb19
+ %asmtmp23 = call { i32, i32 } asm sideeffect "1: \0A\09movapd %xmm7, %xmm1 \0A\09mulpd %xmm1, %xmm1 \0A\09movapd %xmm6, %xmm0 \0A\09subpd %xmm1, %xmm0 \0A\09pshufd $$0x4e, %xmm0, %xmm1 \0A\09cvtpi2pd ($3,$0), %xmm2 \0A\09cvtpi2pd -2*4($3,$1), %xmm3 \0A\09mulpd %xmm0, %xmm2 \0A\09mulpd %xmm1, %xmm3 \0A\09movapd %xmm2, ($2,$0,2) \0A\09movapd %xmm3, -2*8($2,$1,2) \0A\09subpd %xmm5, %xmm7 \0A\09sub $$8, $1 \0A\09add $$8, $0 \0A\09jl 1b \0A\09", "=&r,=&r,r,r,0,1,~{dirflag},~{fpsr},~{flags}"(double* %16, i32* %17, i32 %12, i32 %14) nounwind ; <{ i32, i32 }> [#uses=0]
+ br label %bb28.preheader
+
+bb28.preheader: ; preds = %bb22, %bb20
+ %18 = icmp sgt i32 %lag, 0 ; <i1> [#uses=2]
+ br i1 %18, label %bb27, label %bb29
+
+bb27: ; preds = %bb27, %bb28.preheader
+ %j4.042 = phi i32 [ 0, %bb28.preheader ], [ %indvar.next45, %bb27 ] ; <i32> [#uses=2]
+ %19 = sub i32 %j4.042, %lag ; <i32> [#uses=1]
+ %20 = getelementptr double* %data15.0, i32 %19 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %20, align 8
+ %indvar.next45 = add i32 %j4.042, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next45, %lag ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb29, label %bb27
+
+bb29: ; preds = %bb27, %bb28.preheader
+ %21 = getelementptr double* %data15.0, i32 %len ; <double*> [#uses=3]
+ store double 0.000000e+00, double* %21, align 8
+ br i1 %18, label %bb.nph, label %bb37
+
+bb.nph: ; preds = %bb29
+ %22 = mul i32 %len, -8 ; <i32> [#uses=2]
+ %23 = add i32 %lag, -2 ; <i32> [#uses=1]
+ br label %bb30
+
+bb30: ; preds = %bb35, %bb.nph
+ %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb35 ] ; <i32> [#uses=2]
+ %j4.141 = shl i32 %indvar, 1 ; <i32> [#uses=8]
+ %24 = icmp eq i32 %23, %j4.141 ; <i1> [#uses=1]
+ %25 = or i32 %j4.141, 1 ; <i32> [#uses=2]
+ br i1 %24, label %bb31, label %bb33
+
+bb31: ; preds = %bb30
+ %26 = add i32 %j4.141, 2 ; <i32> [#uses=2]
+ %.sum38 = sub i32 %len, %j4.141 ; <i32> [#uses=1]
+ %27 = getelementptr double* %data15.0, i32 %.sum38 ; <double*> [#uses=1]
+ %28 = getelementptr double* %autoc, i32 %j4.141 ; <double*> [#uses=1]
+ %29 = getelementptr double* %autoc, i32 %25 ; <double*> [#uses=1]
+ %30 = getelementptr double* %autoc, i32 %26 ; <double*> [#uses=1]
+ %asmtmp32 = call i32 asm sideeffect "movsd ff_pd_1, %xmm0 \0A\09movsd ff_pd_1, %xmm1 \0A\09movsd ff_pd_1, %xmm2 \0A\091: \0A\09movapd ($4,$0), %xmm3 \0A\09movupd -8($5,$0), %xmm4 \0A\09movapd ($5,$0), %xmm5 \0A\09mulpd %xmm3, %xmm4 \0A\09mulpd %xmm3, %xmm5 \0A\09mulpd -16($5,$0), %xmm3 \0A\09addpd %xmm4, %xmm1 \0A\09addpd %xmm5, %xmm0 \0A\09addpd %xmm3, %xmm2 \0A\09add $$16, $0 \0A\09jl 1b \0A\09movhlps %xmm0, %xmm3 \0A\09movhlps %xmm1, %xmm4 \0A\09movhlps %xmm2, %xmm5 \0A\09addsd %xmm3, %xmm0 \0A\09addsd %xmm4, %xmm1 \0A\09addsd %xmm5, %xmm2 \0A\09movsd %xmm0, $1 \0A\09movsd %xmm1, $2 \0A\09movsd %xmm2, $3 \0A\09", "=&r,=*m,=*m,=*m,r,r,0,~{dirflag},~{fpsr},~{flags}"(double* %28, double* %29, double* %30, double* %21, double* %27, i32 %22) nounwind ; <i32> [#uses=0]
+ br label %bb35
+
+bb33: ; preds = %bb30
+ %.sum39 = sub i32 %len, %j4.141 ; <i32> [#uses=1]
+ %31 = getelementptr double* %data15.0, i32 %.sum39 ; <double*> [#uses=1]
+ %32 = getelementptr double* %autoc, i32 %j4.141 ; <double*> [#uses=1]
+ %33 = getelementptr double* %autoc, i32 %25 ; <double*> [#uses=1]
+ %asmtmp34 = call i32 asm sideeffect "movsd ff_pd_1, %xmm0 \0A\09movsd ff_pd_1, %xmm1 \0A\091: \0A\09movapd ($3,$0), %xmm3 \0A\09movupd -8($4,$0), %xmm4 \0A\09mulpd %xmm3, %xmm4 \0A\09mulpd ($4,$0), %xmm3 \0A\09addpd %xmm4, %xmm1 \0A\09addpd %xmm3, %xmm0 \0A\09add $$16, $0 \0A\09jl 1b \0A\09movhlps %xmm0, %xmm3 \0A\09movhlps %xmm1, %xmm4 \0A\09addsd %xmm3, %xmm0 \0A\09addsd %xmm4, %xmm1 \0A\09movsd %xmm0, $1 \0A\09movsd %xmm1, $2 \0A\09", "=&r,=*m,=*m,r,r,0,~{dirflag},~{fpsr},~{flags}"(double* %32, double* %33, double* %21, double* %31, i32 %22) nounwind ; <i32> [#uses=0]
+ %.pre = add i32 %j4.141, 2 ; <i32> [#uses=1]
+ br label %bb35
+
+bb35: ; preds = %bb33, %bb31
+ %.pre-phi = phi i32 [ %.pre, %bb33 ], [ %26, %bb31 ] ; <i32> [#uses=1]
+ %34 = icmp slt i32 %.pre-phi, %lag ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %34, label %bb30, label %bb37
+
+bb37: ; preds = %bb35, %bb29
+ ret void
+}
diff --git a/test/CodeGen/X86/pr3216.ll b/test/CodeGen/X86/pr3216.ll
new file mode 100644
index 0000000..38c9f32
--- /dev/null
+++ b/test/CodeGen/X86/pr3216.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 | grep {sar. \$5}
+
+@foo = global i8 127
+
+define i32 @main() nounwind {
+entry:
+ %tmp = load i8* @foo
+ %bf.lo = lshr i8 %tmp, 5
+ %bf.lo.cleared = and i8 %bf.lo, 7
+ %0 = shl i8 %bf.lo.cleared, 5
+ %bf.val.sext = ashr i8 %0, 5
+ %conv = sext i8 %bf.val.sext to i32
+ ret i32 %conv
+}
diff --git a/test/CodeGen/X86/pr3241.ll b/test/CodeGen/X86/pr3241.ll
new file mode 100644
index 0000000..2f7917b
--- /dev/null
+++ b/test/CodeGen/X86/pr3241.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86
+; PR3241
+
+@g_620 = external global i32
+
+define void @func_18(i32 %p_21) nounwind {
+entry:
+ %t0 = call i32 @func_31(i32 %p_21) nounwind
+ %t1 = call i32 @safe_add_macro_uint32_t_u_u() nounwind
+ %t2 = icmp sgt i32 %t1, 0
+ %t3 = zext i1 %t2 to i32
+ %t4 = load i32* @g_620, align 4
+ %t5 = icmp eq i32 %t3, %t4
+ %t6 = xor i32 %p_21, 1
+ %t7 = call i32 @func_55(i32 %t6) nounwind
+ br i1 %t5, label %return, label %bb
+
+bb:
+ unreachable
+
+return:
+ unreachable
+}
+
+declare i32 @func_31(i32)
+
+declare i32 @safe_add_macro_uint32_t_u_u()
+
+declare i32 @func_55(i32)
diff --git a/test/CodeGen/X86/pr3243.ll b/test/CodeGen/X86/pr3243.ll
new file mode 100644
index 0000000..483b5bf
--- /dev/null
+++ b/test/CodeGen/X86/pr3243.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86
+; PR3243
+
+declare signext i16 @safe_mul_func_int16_t_s_s(i16 signext, i32) nounwind readnone optsize
+
+define i32 @func_120(i32 %p_121) nounwind optsize {
+entry:
+ %0 = trunc i32 %p_121 to i16 ; <i16> [#uses=1]
+ %1 = urem i16 %0, -15461 ; <i16> [#uses=1]
+ %phitmp1 = trunc i16 %1 to i8 ; <i8> [#uses=1]
+ %phitmp2 = urem i8 %phitmp1, -1 ; <i8> [#uses=1]
+ %phitmp3 = zext i8 %phitmp2 to i16 ; <i16> [#uses=1]
+ %2 = tail call signext i16 @safe_mul_func_int16_t_s_s(i16 signext %phitmp3, i32 1) nounwind ; <i16> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/pr3244.ll b/test/CodeGen/X86/pr3244.ll
new file mode 100644
index 0000000..2598c2f
--- /dev/null
+++ b/test/CodeGen/X86/pr3244.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86
+; PR3244
+
+@g_62 = external global i16 ; <i16*> [#uses=1]
+@g_487 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @func_42(i32 %p_43, i32 %p_44, i32 %p_45, i32 %p_46) nounwind {
+entry:
+ %0 = load i16* @g_62, align 2 ; <i16> [#uses=1]
+ %1 = load i32* @g_487, align 4 ; <i32> [#uses=1]
+ %2 = trunc i16 %0 to i8 ; <i8> [#uses=1]
+ %3 = trunc i32 %1 to i8 ; <i8> [#uses=1]
+ %4 = tail call i32 (...)* @func_7(i64 -4455561449541442965, i32 1)
+nounwind ; <i32> [#uses=1]
+ %5 = trunc i32 %4 to i8 ; <i8> [#uses=1]
+ %6 = mul i8 %3, %2 ; <i8> [#uses=1]
+ %7 = mul i8 %6, %5 ; <i8> [#uses=1]
+ %8 = sext i8 %7 to i16 ; <i16> [#uses=1]
+ %9 = tail call i32 @func_85(i16 signext %8, i32 1, i32 1) nounwind
+ ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @func_7(...)
+
+declare i32 @func_85(i16 signext, i32, i32)
diff --git a/test/CodeGen/X86/pr3250.ll b/test/CodeGen/X86/pr3250.ll
new file mode 100644
index 0000000..cccbf54
--- /dev/null
+++ b/test/CodeGen/X86/pr3250.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86
+; PR3250
+
+declare i32 @safe_sub_func_short_u_u(i16 signext, i16 signext) nounwind
+
+define i32 @func_106(i32 %p_107) nounwind {
+entry:
+ %0 = tail call i32 (...)* @safe_div_(i32 %p_107, i32 1) nounwind
+ ; <i32> [#uses=1]
+ %1 = lshr i32 %0, -9 ; <i32> [#uses=1]
+ %2 = trunc i32 %1 to i16 ; <i16> [#uses=1]
+ %3 = tail call i32 @safe_sub_func_short_u_u(i16 signext 1, i16 signext
+%2) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @safe_div_(...)
diff --git a/test/CodeGen/X86/pr3317.ll b/test/CodeGen/X86/pr3317.ll
new file mode 100644
index 0000000..9d6626b
--- /dev/null
+++ b/test/CodeGen/X86/pr3317.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -march=x86
+; PR3317
+
+ %ArraySInt16 = type { %JavaObject, i8*, [0 x i16] }
+ %ArraySInt8 = type { %JavaObject, i8*, [0 x i8] }
+ %Attribut = type { %ArraySInt16*, i32, i32 }
+ %CacheNode = type { i8*, %JavaCommonClass*, %CacheNode*, %Enveloppe* }
+ %Enveloppe = type { %CacheNode*, %ArraySInt16*, %ArraySInt16*, i8, %JavaClass*, %CacheNode }
+ %JavaArray = type { %JavaObject, i8* }
+ %JavaClass = type { %JavaCommonClass, i32, %VT*, [1 x %TaskClassMirror], i8*, %JavaField*, i16, %JavaField*, i16, %JavaMethod*, i16, %JavaMethod*, i16, i8*, %ArraySInt8*, i8*, %Attribut*, i16, %JavaClass**, i16, %JavaClass*, i16, i8, i32, i32, i8*, void (i8*)* }
+ %JavaCommonClass = type { %JavaCommonClass**, i32, [1 x %JavaObject*], i16, %JavaClass**, i16, %ArraySInt16*, %JavaClass*, i8* }
+ %JavaField = type { i8*, i16, %ArraySInt16*, %ArraySInt16*, %Attribut*, i16, %JavaClass*, i32, i16, i8* }
+ %JavaMethod = type { i8*, i16, %Attribut*, i16, %Enveloppe*, i16, %JavaClass*, %ArraySInt16*, %ArraySInt16*, i8, i8*, i32, i8* }
+ %JavaObject = type { %VT*, %JavaCommonClass*, i8* }
+ %TaskClassMirror = type { i32, i8* }
+ %UTF8 = type { %JavaObject, i8*, [0 x i16] }
+ %VT = type [0 x i32 (...)*]
+
+declare void @jnjvmNullPointerException()
+
+define i32 @JnJVM_java_rmi_activation_ActivationGroupID_hashCode__(%JavaObject* nocapture) nounwind {
+start:
+ %1 = getelementptr %JavaObject* %0, i64 1, i32 1 ; <%JavaCommonClass**> [#uses=1]
+ %2 = load %JavaCommonClass** %1 ; <%JavaCommonClass*> [#uses=4]
+ %3 = icmp eq %JavaCommonClass* %2, null ; <i1> [#uses=1]
+ br i1 %3, label %verifyNullExit1, label %verifyNullCont2
+
+verifyNullExit1: ; preds = %start
+ tail call void @jnjvmNullPointerException()
+ unreachable
+
+verifyNullCont2: ; preds = %start
+ %4 = bitcast %JavaCommonClass* %2 to { %JavaObject, i16, i32, i64 }* ; <{ %JavaObject, i16, i32, i64 }*> [#uses=1]
+ %5 = getelementptr { %JavaObject, i16, i32, i64 }* %4, i64 0, i32 2 ; <i32*> [#uses=1]
+ %6 = load i32* %5 ; <i32> [#uses=1]
+ %7 = getelementptr %JavaCommonClass* %2, i64 0, i32 4 ; <%JavaClass***> [#uses=1]
+ %8 = bitcast %JavaClass*** %7 to i64* ; <i64*> [#uses=1]
+ %9 = load i64* %8 ; <i64> [#uses=1]
+ %10 = trunc i64 %9 to i32 ; <i32> [#uses=1]
+ %11 = getelementptr %JavaCommonClass* %2, i64 0, i32 3 ; <i16*> [#uses=1]
+ %12 = load i16* %11 ; <i16> [#uses=1]
+ %13 = sext i16 %12 to i32 ; <i32> [#uses=1]
+ %14 = xor i32 %10, %6 ; <i32> [#uses=1]
+ %15 = xor i32 %14, %13 ; <i32> [#uses=1]
+ ret i32 %15
+}
diff --git a/test/CodeGen/X86/pr3366.ll b/test/CodeGen/X86/pr3366.ll
new file mode 100644
index 0000000..f813e2e
--- /dev/null
+++ b/test/CodeGen/X86/pr3366.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 | grep movzbl
+; PR3366
+
+define void @_ada_c34002a() nounwind {
+entry:
+ %0 = load i8* null, align 1
+ %1 = sdiv i8 90, %0
+ %2 = icmp ne i8 %1, 3
+ %3 = zext i1 %2 to i8
+ %toBool449 = icmp ne i8 %3, 0
+ %4 = or i1 false, %toBool449
+ %5 = zext i1 %4 to i8
+ %toBool450 = icmp ne i8 %5, 0
+ br i1 %toBool450, label %bb451, label %bb457
+
+bb451:
+ br label %bb457
+
+bb457:
+ unreachable
+}
diff --git a/test/CodeGen/X86/pr3457.ll b/test/CodeGen/X86/pr3457.ll
new file mode 100644
index 0000000..f7af927
--- /dev/null
+++ b/test/CodeGen/X86/pr3457.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin | not grep fstpt
+; PR3457
+; rdar://6548010
+
+define void @foo(double* nocapture %P) nounwind {
+entry:
+ %0 = tail call double (...)* @test() nounwind ; <double> [#uses=2]
+ %1 = tail call double (...)* @test() nounwind ; <double> [#uses=2]
+ %2 = fmul double %0, %0 ; <double> [#uses=1]
+ %3 = fmul double %1, %1 ; <double> [#uses=1]
+ %4 = fadd double %2, %3 ; <double> [#uses=1]
+ store double %4, double* %P, align 8
+ ret void
+}
+
+declare double @test(...)
diff --git a/test/CodeGen/X86/pr3495-2.ll b/test/CodeGen/X86/pr3495-2.ll
new file mode 100644
index 0000000..71aa5a0
--- /dev/null
+++ b/test/CodeGen/X86/pr3495-2.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -march=x86 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of reloads omited}
+
+target datalayout = "e-p:32:32:32"
+target triple = "i386-apple-darwin9.6"
+ %struct.constraintVCGType = type { i32, i32, i32, i32 }
+ %struct.nodeVCGType = type { %struct.constraintVCGType*, i32, i32, i32, %struct.constraintVCGType*, i32, i32, i32 }
+
+define fastcc void @SCC_DFSBelowVCG(%struct.nodeVCGType* %VCG, i32 %net, i32 %label) nounwind {
+entry:
+ %0 = getelementptr %struct.nodeVCGType* %VCG, i32 %net, i32 5 ; <i32*> [#uses=2]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb5, label %bb.nph3
+
+bb.nph3: ; preds = %entry
+ %3 = getelementptr %struct.nodeVCGType* %VCG, i32 %net, i32 4 ; <%struct.constraintVCGType**> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb3, %bb.nph3
+ %s.02 = phi i32 [ 0, %bb.nph3 ], [ %12, %bb3 ] ; <i32> [#uses=2]
+ %4 = load %struct.constraintVCGType** %3, align 4 ; <%struct.constraintVCGType*> [#uses=1]
+ %5 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %5, label %bb1, label %bb3
+
+bb1: ; preds = %bb
+ %6 = getelementptr %struct.constraintVCGType* %4, i32 %s.02, i32 0 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=2]
+ %8 = getelementptr %struct.nodeVCGType* %VCG, i32 %7, i32 7 ; <i32*> [#uses=1]
+ %9 = load i32* %8, align 4 ; <i32> [#uses=1]
+ %10 = icmp eq i32 %9, 0 ; <i1> [#uses=1]
+ br i1 %10, label %bb2, label %bb3
+
+bb2: ; preds = %bb1
+ %11 = getelementptr %struct.nodeVCGType* %VCG, i32 %7, i32 4 ; <%struct.constraintVCGType**> [#uses=0]
+ br label %bb.i
+
+bb.i: ; preds = %bb.i, %bb2
+ br label %bb.i
+
+bb3: ; preds = %bb1, %bb
+ %12 = add i32 %s.02, 1 ; <i32> [#uses=2]
+ %13 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %14 = icmp ugt i32 %13, %12 ; <i1> [#uses=1]
+ br i1 %14, label %bb, label %bb5
+
+bb5: ; preds = %bb3, %entry
+ %15 = getelementptr %struct.nodeVCGType* %VCG, i32 %net, i32 6 ; <i32*> [#uses=1]
+ store i32 %label, i32* %15, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/pr3495.ll b/test/CodeGen/X86/pr3495.ll
new file mode 100644
index 0000000..1795970
--- /dev/null
+++ b/test/CodeGen/X86/pr3495.ll
@@ -0,0 +1,80 @@
+; RUN: llc < %s -march=x86 -stats |& grep {Number of loads added} | grep 2
+; RUN: llc < %s -march=x86 -stats |& grep {Number of register spills} | grep 1
+; RUN: llc < %s -march=x86 -stats |& grep {Number of machine instrs printed} | grep 38
+; PR3495
+; The loop reversal kicks in once here, resulting in one fewer instruction.
+
+target triple = "i386-pc-linux-gnu"
+@x = external global [8 x i32], align 32 ; <[8 x i32]*> [#uses=1]
+@rows = external global [8 x i32], align 32 ; <[8 x i32]*> [#uses=2]
+@up = external global [15 x i32], align 32 ; <[15 x i32]*> [#uses=2]
+@down = external global [15 x i32], align 32 ; <[15 x i32]*> [#uses=1]
+
+define i32 @queens(i32 %c) nounwind {
+entry:
+ %tmp91 = add i32 %c, 1 ; <i32> [#uses=3]
+ %tmp135 = getelementptr [8 x i32]* @x, i32 0, i32 %tmp91 ; <i32*> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb569, %entry
+ %r25.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %indvar.next715, %bb569 ] ; <i32> [#uses=4]
+ %tmp27 = getelementptr [8 x i32]* @rows, i32 0, i32 %r25.0.reg2mem.0 ; <i32*> [#uses=1]
+ %tmp28 = load i32* %tmp27, align 4 ; <i32> [#uses=1]
+ %tmp29 = icmp eq i32 %tmp28, 0 ; <i1> [#uses=1]
+ br i1 %tmp29, label %bb569, label %bb31
+
+bb31: ; preds = %bb
+ %tmp35 = sub i32 %r25.0.reg2mem.0, 0 ; <i32> [#uses=1]
+ %tmp36 = getelementptr [15 x i32]* @up, i32 0, i32 %tmp35 ; <i32*> [#uses=1]
+ %tmp37 = load i32* %tmp36, align 4 ; <i32> [#uses=1]
+ %tmp38 = icmp eq i32 %tmp37, 0 ; <i1> [#uses=1]
+ br i1 %tmp38, label %bb569, label %bb41
+
+bb41: ; preds = %bb31
+ %tmp54 = sub i32 %r25.0.reg2mem.0, %c ; <i32> [#uses=1]
+ %tmp55 = add i32 %tmp54, 7 ; <i32> [#uses=1]
+ %tmp62 = getelementptr [15 x i32]* @up, i32 0, i32 %tmp55 ; <i32*> [#uses=2]
+ store i32 0, i32* %tmp62, align 4
+ br label %bb92
+
+bb92: ; preds = %bb545, %bb41
+ %r20.0.reg2mem.0 = phi i32 [ 0, %bb41 ], [ %indvar.next711, %bb545 ] ; <i32> [#uses=5]
+ %tmp94 = getelementptr [8 x i32]* @rows, i32 0, i32 %r20.0.reg2mem.0 ; <i32*> [#uses=1]
+ %tmp95 = load i32* %tmp94, align 4 ; <i32> [#uses=0]
+ %tmp112 = add i32 %r20.0.reg2mem.0, %tmp91 ; <i32> [#uses=1]
+ %tmp113 = getelementptr [15 x i32]* @down, i32 0, i32 %tmp112 ; <i32*> [#uses=2]
+ %tmp114 = load i32* %tmp113, align 4 ; <i32> [#uses=1]
+ %tmp115 = icmp eq i32 %tmp114, 0 ; <i1> [#uses=1]
+ br i1 %tmp115, label %bb545, label %bb118
+
+bb118: ; preds = %bb92
+ %tmp122 = sub i32 %r20.0.reg2mem.0, %tmp91 ; <i32> [#uses=0]
+ store i32 0, i32* %tmp113, align 4
+ store i32 %r20.0.reg2mem.0, i32* %tmp135, align 4
+ br label %bb142
+
+bb142: ; preds = %bb142, %bb118
+ %k18.0.reg2mem.0 = phi i32 [ 0, %bb118 ], [ %indvar.next709, %bb142 ] ; <i32> [#uses=1]
+ %indvar.next709 = add i32 %k18.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond710 = icmp eq i32 %indvar.next709, 8 ; <i1> [#uses=1]
+ br i1 %exitcond710, label %bb155, label %bb142
+
+bb155: ; preds = %bb142
+ %tmp156 = tail call i32 @putchar(i32 10) nounwind ; <i32> [#uses=0]
+ br label %bb545
+
+bb545: ; preds = %bb155, %bb92
+ %indvar.next711 = add i32 %r20.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond712 = icmp eq i32 %indvar.next711, 8 ; <i1> [#uses=1]
+ br i1 %exitcond712, label %bb553, label %bb92
+
+bb553: ; preds = %bb545
+ store i32 1, i32* %tmp62, align 4
+ br label %bb569
+
+bb569: ; preds = %bb553, %bb31, %bb
+ %indvar.next715 = add i32 %r25.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ br label %bb
+}
+
+declare i32 @putchar(i32)
diff --git a/test/CodeGen/X86/pr3522.ll b/test/CodeGen/X86/pr3522.ll
new file mode 100644
index 0000000..7cdeaa0
--- /dev/null
+++ b/test/CodeGen/X86/pr3522.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86 -stats |& not grep machine-sink
+; PR3522
+
+target triple = "i386-pc-linux-gnu"
[email protected] = external constant [13 x i8] ; <[13 x i8]*> [#uses=1]
+
+define void @_ada_c34018a() {
+entry:
+ %0 = tail call i32 @report__ident_int(i32 90) ; <i32> [#uses=1]
+ %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
+ invoke void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 32) noreturn
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %entry
+ unreachable
+
+bb22: ; preds = %lpad
+ ret void
+
+return: ; preds = %lpad
+ ret void
+
+lpad: ; preds = %entry
+ %2 = icmp eq i8 %1, 90 ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb22
+}
+
+declare void @__gnat_rcheck_12(i8*, i32) noreturn
+
+declare i32 @report__ident_int(i32)
diff --git a/test/CodeGen/X86/pre-split1.ll b/test/CodeGen/X86/pre-split1.ll
new file mode 100644
index 0000000..e89b507
--- /dev/null
+++ b/test/CodeGen/X86/pre-split1.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
+; XFAIL: *
+
+define void @test(double* %P, i32 %cond) nounwind {
+entry:
+ %0 = load double* %P, align 8 ; <double> [#uses=1]
+ %1 = fadd double %0, 4.000000e+00 ; <double> [#uses=2]
+ %2 = icmp eq i32 %cond, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %3 = fadd double %1, 4.000000e+00 ; <double> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %A.0 = phi double [ %3, %bb ], [ %1, %entry ] ; <double> [#uses=1]
+ %4 = fmul double %A.0, 4.000000e+00 ; <double> [#uses=1]
+ %5 = tail call i32 (...)* @bar() nounwind ; <i32> [#uses=0]
+ store double %4, double* %P, align 8
+ ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/X86/pre-split10.ll b/test/CodeGen/X86/pre-split10.ll
new file mode 100644
index 0000000..db039bd
--- /dev/null
+++ b/test/CodeGen/X86/pre-split10.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ br label %bb14.i
+
+bb14.i: ; preds = %bb14.i, %entry
+ %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %0, %bb14.i ] ; <i32> [#uses=1]
+ %0 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %1 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %2 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %3 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %exitcond75.i = icmp eq i32 %0, 32 ; <i1> [#uses=1]
+ br i1 %exitcond75.i, label %bb24.i, label %bb14.i
+
+bb24.i: ; preds = %bb14.i
+ %4 = fdiv double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
+ %5 = fdiv double %1, 0.000000e+00 ; <double> [#uses=1]
+ %6 = fdiv double %2, 0.000000e+00 ; <double> [#uses=1]
+ %7 = fdiv double %3, 0.000000e+00 ; <double> [#uses=1]
+ br label %bb31.i
+
+bb31.i: ; preds = %bb31.i, %bb24.i
+ %tmp.0.reg2mem.0.i = phi i32 [ 0, %bb24.i ], [ %indvar.next64.i, %bb31.i ] ; <i32> [#uses=1]
+ %indvar.next64.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %exitcond65.i = icmp eq i32 %indvar.next64.i, 64 ; <i1> [#uses=1]
+ br i1 %exitcond65.i, label %bb33.i, label %bb31.i
+
+bb33.i: ; preds = %bb31.i
+ br label %bb35.preheader.i
+
+bb5.i.i: ; preds = %bb35.preheader.i
+ %8 = call double @floor(double 0.000000e+00) nounwind readnone ; <double> [#uses=0]
+ br label %bb7.i.i
+
+bb7.i.i: ; preds = %bb35.preheader.i, %bb5.i.i
+ br label %bb35.preheader.i
+
+bb35.preheader.i: ; preds = %bb7.i.i, %bb33.i
+ %9 = fsub double 0.000000e+00, %4 ; <double> [#uses=1]
+ store double %9, double* null, align 8
+ %10 = fsub double 0.000000e+00, %5 ; <double> [#uses=1]
+ store double %10, double* null, align 8
+ %11 = fsub double 0.000000e+00, %6 ; <double> [#uses=1]
+ store double %11, double* null, align 8
+ %12 = fsub double 0.000000e+00, %7 ; <double> [#uses=1]
+ store double %12, double* null, align 8
+ br i1 false, label %bb7.i.i, label %bb5.i.i
+}
+
+declare double @floor(double) nounwind readnone
diff --git a/test/CodeGen/X86/pre-split11.ll b/test/CodeGen/X86/pre-split11.ll
new file mode 100644
index 0000000..0a9f4e3
--- /dev/null
+++ b/test/CodeGen/X86/pre-split11.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 -pre-alloc-split | FileCheck %s
+
[email protected] = private constant [28 x i8] c"\0A\0ADOUBLE D = %f\0A\00", align 1 ; <[28 x i8]*> [#uses=1]
[email protected] = private constant [37 x i8] c"double to long l1 = %ld\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1]
[email protected] = private constant [35 x i8] c"double to uint ui1 = %u\09\09(0x%x)\0A\00", align 8 ; <[35 x i8]*> [#uses=1]
[email protected] = private constant [37 x i8] c"double to ulong ul1 = %lu\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1]
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp {
+; CHECK: movsd %xmm0, (%rsp)
+entry:
+ %0 = icmp sgt i32 %argc, 4 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %bb2
+
+bb: ; preds = %entry
+ %1 = getelementptr inbounds i8** %argv, i64 4 ; <i8**> [#uses=1]
+ %2 = load i8** %1, align 8 ; <i8*> [#uses=1]
+ %3 = tail call double @atof(i8* %2) nounwind ; <double> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb, %entry
+ %storemerge = phi double [ %3, %bb ], [ 2.000000e+00, %entry ] ; <double> [#uses=4]
+ %4 = fptoui double %storemerge to i32 ; <i32> [#uses=2]
+ %5 = fptoui double %storemerge to i64 ; <i64> [#uses=2]
+ %6 = fptosi double %storemerge to i64 ; <i64> [#uses=2]
+ %7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i64 0, i64 0), double %storemerge) nounwind ; <i32> [#uses=0]
+ %8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str1, i64 0, i64 0), i64 %6, i64 %6) nounwind ; <i32> [#uses=0]
+ %9 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([35 x i8]* @.str2, i64 0, i64 0), i32 %4, i32 %4) nounwind ; <i32> [#uses=0]
+ %10 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str3, i64 0, i64 0), i64 %5, i64 %5) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare double @atof(i8* nocapture) nounwind readonly
+
+declare i32 @printf(i8* nocapture, ...) nounwind
diff --git a/test/CodeGen/X86/pre-split2.ll b/test/CodeGen/X86/pre-split2.ll
new file mode 100644
index 0000000..ba902f9
--- /dev/null
+++ b/test/CodeGen/X86/pre-split2.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: grep {pre-alloc-split} | count 2
+
+define i32 @t(i32 %arg) {
+entry:
+ br label %bb6
+
+.noexc6: ; preds = %bb6
+ %0 = and i32 %2, -8 ; <i32> [#uses=1]
+ tail call void @llvm.memmove.i32(i8* %3, i8* null, i32 %0, i32 1) nounwind
+ store double %1, double* null, align 8
+ br label %bb6
+
+bb6: ; preds = %.noexc6, %entry
+ %1 = uitofp i32 %arg to double ; <double> [#uses=1]
+ %2 = sub i32 0, 0 ; <i32> [#uses=1]
+ %3 = invoke i8* @_Znwm(i32 0)
+ to label %.noexc6 unwind label %lpad32 ; <i8*> [#uses=1]
+
+lpad32: ; preds = %bb6
+ unreachable
+}
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32) nounwind
+
+declare i8* @_Znwm(i32)
diff --git a/test/CodeGen/X86/pre-split3.ll b/test/CodeGen/X86/pre-split3.ll
new file mode 100644
index 0000000..2e31420
--- /dev/null
+++ b/test/CodeGen/X86/pre-split3.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
+
+define i32 @t(i32 %arg) {
+entry:
+ br label %bb6
+
+.noexc6: ; preds = %bb6
+ %0 = and i32 %2, -8 ; <i32> [#uses=1]
+ tail call void @llvm.memmove.i32(i8* %3, i8* null, i32 %0, i32 1) nounwind
+ store double %1, double* null, align 8
+ br label %bb6
+
+bb6: ; preds = %.noexc6, %entry
+ %1 = uitofp i32 %arg to double ; <double> [#uses=1]
+ %2 = sub i32 0, 0 ; <i32> [#uses=1]
+ %3 = invoke i8* @_Znwm(i32 0)
+ to label %.noexc6 unwind label %lpad32 ; <i8*> [#uses=1]
+
+lpad32: ; preds = %bb6
+ unreachable
+}
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32) nounwind
+
+declare i8* @_Znwm(i32)
diff --git a/test/CodeGen/X86/pre-split4.ll b/test/CodeGen/X86/pre-split4.ll
new file mode 100644
index 0000000..10cef27
--- /dev/null
+++ b/test/CodeGen/X86/pre-split4.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 2
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %k.0.reg2mem.0 = phi double [ 1.000000e+00, %entry ], [ %6, %bb ] ; <double> [#uses=2]
+ %Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ] ; <double> [#uses=1]
+ %twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=1]
+ %0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00) ; <double> [#uses=1]
+ %1 = fadd double %0, %twoThrd.0.reg2mem.0 ; <double> [#uses=1]
+ %2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly ; <double> [#uses=1]
+ %3 = fmul double 0.000000e+00, %2 ; <double> [#uses=1]
+ %4 = fdiv double 1.000000e+00, %3 ; <double> [#uses=1]
+ store double %Flint.0.reg2mem.0, double* null
+ store double %twoThrd.0.reg2mem.0, double* null
+ %5 = fadd double %4, %Flint.0.reg2mem.0 ; <double> [#uses=1]
+ %6 = fadd double %k.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=1]
+ br label %bb
+}
+
+declare double @llvm.pow.f64(double, double) nounwind readonly
+
+declare double @sin(double) nounwind readonly
diff --git a/test/CodeGen/X86/pre-split5.ll b/test/CodeGen/X86/pre-split5.ll
new file mode 100644
index 0000000..8def460
--- /dev/null
+++ b/test/CodeGen/X86/pre-split5.ll
@@ -0,0 +1,56 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
+
+target triple = "i386-apple-darwin9.5"
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+@"\01LC1" = external constant [48 x i8] ; <[48 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ br label %bb5.us
+
+bb5.us: ; preds = %bb8.split, %bb5.us, %entry
+ %i.0.reg2mem.0.ph = phi i32 [ 0, %entry ], [ %indvar.next53, %bb8.split ], [ %i.0.reg2mem.0.ph, %bb5.us ] ; <i32> [#uses=2]
+ %j.0.reg2mem.0.us = phi i32 [ %indvar.next47, %bb5.us ], [ 0, %bb8.split ], [ 0, %entry ] ; <i32> [#uses=1]
+ %indvar.next47 = add i32 %j.0.reg2mem.0.us, 1 ; <i32> [#uses=2]
+ %exitcond48 = icmp eq i32 %indvar.next47, 256 ; <i1> [#uses=1]
+ br i1 %exitcond48, label %bb8.split, label %bb5.us
+
+bb8.split: ; preds = %bb5.us
+ %indvar.next53 = add i32 %i.0.reg2mem.0.ph, 1 ; <i32> [#uses=2]
+ %exitcond54 = icmp eq i32 %indvar.next53, 256 ; <i1> [#uses=1]
+ br i1 %exitcond54, label %bb11, label %bb5.us
+
+bb11: ; preds = %bb11, %bb8.split
+ %i.1.reg2mem.0 = phi i32 [ %indvar.next44, %bb11 ], [ 0, %bb8.split ] ; <i32> [#uses=1]
+ %indvar.next44 = add i32 %i.1.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond45 = icmp eq i32 %indvar.next44, 63 ; <i1> [#uses=1]
+ br i1 %exitcond45, label %bb14, label %bb11
+
+bb14: ; preds = %bb14, %bb11
+ %indvar = phi i32 [ %indvar.next40, %bb14 ], [ 0, %bb11 ] ; <i32> [#uses=1]
+ %indvar.next40 = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond41 = icmp eq i32 %indvar.next40, 32768 ; <i1> [#uses=1]
+ br i1 %exitcond41, label %bb28, label %bb14
+
+bb28: ; preds = %bb14
+ %0 = fdiv double 2.550000e+02, 0.000000e+00 ; <double> [#uses=1]
+ br label %bb30
+
+bb30: ; preds = %bb36, %bb28
+ %m.1.reg2mem.0 = phi i32 [ %m.0, %bb36 ], [ 0, %bb28 ] ; <i32> [#uses=1]
+ %1 = fmul double 0.000000e+00, %0 ; <double> [#uses=1]
+ %2 = fptosi double %1 to i32 ; <i32> [#uses=1]
+ br i1 false, label %bb36, label %bb35
+
+bb35: ; preds = %bb30
+ %3 = tail call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* null, i8* getelementptr ([48 x i8]* @"\01LC1", i32 0, i32 0), i32 0, i32 0, i32 0, i32 %2) nounwind ; <i32> [#uses=0]
+ br label %bb36
+
+bb36: ; preds = %bb35, %bb30
+ %m.0 = phi i32 [ 0, %bb35 ], [ %m.1.reg2mem.0, %bb30 ] ; <i32> [#uses=1]
+ br label %bb30
+}
+
+declare i32 @fprintf(%struct.FILE*, i8*, ...) nounwind
diff --git a/test/CodeGen/X86/pre-split6.ll b/test/CodeGen/X86/pre-split6.ll
new file mode 100644
index 0000000..d38e630
--- /dev/null
+++ b/test/CodeGen/X86/pre-split6.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split | grep {divsd 8} | count 1
+
+@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
+
+declare double @sin(double) nounwind readonly
+
+declare double @asin(double) nounwind readonly
+
+define fastcc void @trace_line(i32 %line) nounwind {
+entry:
+ %.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
+ br i1 %.b3, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ %0 = load double* null, align 8 ; <double> [#uses=1]
+ %1 = load double* null, align 8 ; <double> [#uses=2]
+ %2 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %2, label %bb9.i, label %bb13.i
+
+bb9.i: ; preds = %bb.nph
+ %3 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
+ %4 = fdiv double 1.000000e+00, %1 ; <double> [#uses=1]
+ %5 = fmul double %4, 0.000000e+00 ; <double> [#uses=1]
+ %6 = tail call double @asin(double %5) nounwind readonly ; <double> [#uses=0]
+ unreachable
+
+bb13.i: ; preds = %bb.nph
+ %7 = fdiv double 1.000000e+00, %1 ; <double> [#uses=1]
+ %8 = tail call double @sin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1]
+ %9 = fmul double %7, %8 ; <double> [#uses=1]
+ %10 = tail call double @asin(double %9) nounwind readonly ; <double> [#uses=0]
+ unreachable
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/pre-split7.ll b/test/CodeGen/X86/pre-split7.ll
new file mode 100644
index 0000000..0b81c0b
--- /dev/null
+++ b/test/CodeGen/X86/pre-split7.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
+
+@object_distance = external global double, align 8 ; <double*> [#uses=1]
+@axis_slope_angle = external global double, align 8 ; <double*> [#uses=1]
+@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
+
+declare double @sin(double) nounwind readonly
+
+declare double @asin(double) nounwind readonly
+
+declare double @tan(double) nounwind readonly
+
+define fastcc void @trace_line(i32 %line) nounwind {
+entry:
+ %.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
+ br i1 %.b3, label %bb, label %return
+
+bb: ; preds = %bb, %entry
+ %0 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1]
+ %1 = fadd double 0.000000e+00, %0 ; <double> [#uses=2]
+ %2 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1]
+ %3 = fsub double %1, %2 ; <double> [#uses=2]
+ store double %3, double* @axis_slope_angle, align 8
+ %4 = fdiv double %1, 2.000000e+00 ; <double> [#uses=1]
+ %5 = tail call double @sin(double %4) nounwind readonly ; <double> [#uses=1]
+ %6 = fmul double 0.000000e+00, %5 ; <double> [#uses=1]
+ %7 = tail call double @tan(double %3) nounwind readonly ; <double> [#uses=0]
+ %8 = fadd double 0.000000e+00, %6 ; <double> [#uses=1]
+ store double %8, double* @object_distance, align 8
+ br label %bb
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/pre-split8.ll b/test/CodeGen/X86/pre-split8.ll
new file mode 100644
index 0000000..ea4b949
--- /dev/null
+++ b/test/CodeGen/X86/pre-split8.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
+
+@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
+
+declare double @asin(double) nounwind readonly
+
+declare double @tan(double) nounwind readonly
+
+define fastcc void @trace_line(i32 %line) nounwind {
+entry:
+ %.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
+ br i1 %.b3, label %bb, label %return
+
+bb: ; preds = %bb9.i, %entry
+ %.rle4 = phi double [ %7, %bb9.i ], [ 0.000000e+00, %entry ] ; <double> [#uses=1]
+ %0 = load double* null, align 8 ; <double> [#uses=3]
+ %1 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %1, label %bb9.i, label %bb13.i
+
+bb9.i: ; preds = %bb
+ %2 = fsub double %.rle4, %0 ; <double> [#uses=0]
+ %3 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
+ %4 = fmul double 0.000000e+00, %0 ; <double> [#uses=1]
+ %5 = tail call double @tan(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
+ %6 = fmul double %4, 0.000000e+00 ; <double> [#uses=1]
+ %7 = fadd double %6, 0.000000e+00 ; <double> [#uses=1]
+ br i1 false, label %return, label %bb
+
+bb13.i: ; preds = %bb
+ unreachable
+
+return: ; preds = %bb9.i, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/pre-split9.ll b/test/CodeGen/X86/pre-split9.ll
new file mode 100644
index 0000000..c27d925
--- /dev/null
+++ b/test/CodeGen/X86/pre-split9.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
+
+@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
+
+declare double @sin(double) nounwind readonly
+
+declare double @asin(double) nounwind readonly
+
+declare double @tan(double) nounwind readonly
+
+define fastcc void @trace_line(i32 %line) nounwind {
+entry:
+ %.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
+ br i1 %.b3, label %bb, label %return
+
+bb: ; preds = %bb9.i, %entry
+ %.rle4 = phi double [ %8, %bb9.i ], [ 0.000000e+00, %entry ] ; <double> [#uses=1]
+ %0 = load double* null, align 8 ; <double> [#uses=3]
+ %1 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %1, label %bb9.i, label %bb13.i
+
+bb9.i: ; preds = %bb
+ %2 = fsub double %.rle4, %0 ; <double> [#uses=0]
+ %3 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
+ %4 = tail call double @sin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1]
+ %5 = fmul double %4, %0 ; <double> [#uses=1]
+ %6 = tail call double @tan(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
+ %7 = fmul double %5, 0.000000e+00 ; <double> [#uses=1]
+ %8 = fadd double %7, 0.000000e+00 ; <double> [#uses=1]
+ br i1 false, label %return, label %bb
+
+bb13.i: ; preds = %bb
+ unreachable
+
+return: ; preds = %bb9.i, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/prefetch.ll b/test/CodeGen/X86/prefetch.ll
new file mode 100644
index 0000000..fac5915
--- /dev/null
+++ b/test/CodeGen/X86/prefetch.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 -mattr=+sse > %t
+; RUN: grep prefetchnta %t
+; RUN: grep prefetcht0 %t
+; RUN: grep prefetcht1 %t
+; RUN: grep prefetcht2 %t
+
+define void @t(i8* %ptr) nounwind {
+entry:
+ tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1 )
+ tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2 )
+ tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 )
+ tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0 )
+ ret void
+}
+
+declare void @llvm.prefetch(i8*, i32, i32) nounwind
diff --git a/test/CodeGen/X86/private-2.ll b/test/CodeGen/X86/private-2.ll
new file mode 100644
index 0000000..8aa744e
--- /dev/null
+++ b/test/CodeGen/X86/private-2.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | grep L__ZZ20
+; Quote should be outside of private prefix.
+; rdar://6855766x
+
+ %struct.A = type { i32*, i32 }
+@"_ZZ20-[Example1 whatever]E4C.91" = private constant %struct.A { i32* null, i32 1 } ; <%struct.A*> [#uses=1]
+
+define internal i32* @"\01-[Example1 whatever]"() nounwind optsize ssp {
+entry:
+ %0 = getelementptr %struct.A* @"_ZZ20-[Example1 whatever]E4C.91", i64 0, i32 0 ; <i32**> [#uses=1]
+ %1 = load i32** %0, align 8 ; <i32*> [#uses=1]
+ ret i32* %1
+}
diff --git a/test/CodeGen/X86/private.ll b/test/CodeGen/X86/private.ll
new file mode 100644
index 0000000..f52f8c7
--- /dev/null
+++ b/test/CodeGen/X86/private.ll
@@ -0,0 +1,20 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llc < %s -mtriple=x86_64-pc-linux | grep .Lfoo:
+; RUN: llc < %s -mtriple=x86_64-pc-linux | grep call.*\.Lfoo
+; RUN: llc < %s -mtriple=x86_64-pc-linux | grep .Lbaz:
+; RUN: llc < %s -mtriple=x86_64-pc-linux | grep movl.*\.Lbaz
+
+declare void @foo()
+
+define private void @foo() {
+ ret void
+}
+
+@baz = private global i32 4
+
+define i32 @bar() {
+ call void @foo()
+ %1 = load i32* @baz, align 4
+ ret i32 %1
+}
diff --git a/test/CodeGen/X86/ptrtoint-constexpr.ll b/test/CodeGen/X86/ptrtoint-constexpr.ll
new file mode 100644
index 0000000..dd97905
--- /dev/null
+++ b/test/CodeGen/X86/ptrtoint-constexpr.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=i386-linux | FileCheck %s
+ %union.x = type { i64 }
+
+; CHECK: .globl r
+; CHECK: r:
+; CHECK: .quad r&4294967295
+
+@r = global %union.x { i64 ptrtoint (%union.x* @r to i64) }, align 4
+
+; CHECK: .globl x
+; CHECK: x:
+; CHECK: .quad 3
+
+@x = global i64 mul (i64 3, i64 ptrtoint (i2* getelementptr (i2* null, i64 1) to i64))
diff --git a/test/CodeGen/X86/rdtsc.ll b/test/CodeGen/X86/rdtsc.ll
new file mode 100644
index 0000000..f21a44c
--- /dev/null
+++ b/test/CodeGen/X86/rdtsc.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | grep rdtsc
+; RUN: llc < %s -march=x86-64 | grep rdtsc
+declare i64 @llvm.readcyclecounter()
+
+define i64 @foo() {
+ %tmp.1 = call i64 @llvm.readcyclecounter( ) ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
diff --git a/test/CodeGen/X86/red-zone.ll b/test/CodeGen/X86/red-zone.ll
new file mode 100644
index 0000000..1ffb4e3
--- /dev/null
+++ b/test/CodeGen/X86/red-zone.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; First without noredzone.
+; CHECK: f0:
+; CHECK: -4(%rsp)
+; CHECK: -4(%rsp)
+; CHECK: ret
+define x86_fp80 @f0(float %f) nounwind readnone {
+entry:
+ %0 = fpext float %f to x86_fp80 ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %0
+}
+
+; Then with noredzone.
+; CHECK: f1:
+; CHECK: subq $4, %rsp
+; CHECK: (%rsp)
+; CHECK: (%rsp)
+; CHECK: addq $4, %rsp
+; CHECK: ret
+define x86_fp80 @f1(float %f) nounwind readnone noredzone {
+entry:
+ %0 = fpext float %f to x86_fp80 ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %0
+}
diff --git a/test/CodeGen/X86/red-zone2.ll b/test/CodeGen/X86/red-zone2.ll
new file mode 100644
index 0000000..9557d17
--- /dev/null
+++ b/test/CodeGen/X86/red-zone2.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep subq %t | count 1
+; RUN: grep addq %t | count 1
+
+define x86_fp80 @f0(float %f) nounwind readnone noredzone {
+entry:
+ %0 = fpext float %f to x86_fp80 ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %0
+}
diff --git a/test/CodeGen/X86/regpressure.ll b/test/CodeGen/X86/regpressure.ll
new file mode 100644
index 0000000..e0b5f7a
--- /dev/null
+++ b/test/CodeGen/X86/regpressure.ll
@@ -0,0 +1,114 @@
+;; Both functions in this testcase should codegen to the same function, and
+;; neither of them should require spilling anything to the stack.
+
+; RUN: llc < %s -march=x86 -stats |& \
+; RUN: not grep {Number of register spills}
+
+;; This can be compiled to use three registers if the loads are not
+;; folded into the multiplies, 2 registers otherwise.
+
+define i32 @regpressure1(i32* %P) {
+ %A = load i32* %P ; <i32> [#uses=1]
+ %Bp = getelementptr i32* %P, i32 1 ; <i32*> [#uses=1]
+ %B = load i32* %Bp ; <i32> [#uses=1]
+ %s1 = mul i32 %A, %B ; <i32> [#uses=1]
+ %Cp = getelementptr i32* %P, i32 2 ; <i32*> [#uses=1]
+ %C = load i32* %Cp ; <i32> [#uses=1]
+ %s2 = mul i32 %s1, %C ; <i32> [#uses=1]
+ %Dp = getelementptr i32* %P, i32 3 ; <i32*> [#uses=1]
+ %D = load i32* %Dp ; <i32> [#uses=1]
+ %s3 = mul i32 %s2, %D ; <i32> [#uses=1]
+ %Ep = getelementptr i32* %P, i32 4 ; <i32*> [#uses=1]
+ %E = load i32* %Ep ; <i32> [#uses=1]
+ %s4 = mul i32 %s3, %E ; <i32> [#uses=1]
+ %Fp = getelementptr i32* %P, i32 5 ; <i32*> [#uses=1]
+ %F = load i32* %Fp ; <i32> [#uses=1]
+ %s5 = mul i32 %s4, %F ; <i32> [#uses=1]
+ %Gp = getelementptr i32* %P, i32 6 ; <i32*> [#uses=1]
+ %G = load i32* %Gp ; <i32> [#uses=1]
+ %s6 = mul i32 %s5, %G ; <i32> [#uses=1]
+ %Hp = getelementptr i32* %P, i32 7 ; <i32*> [#uses=1]
+ %H = load i32* %Hp ; <i32> [#uses=1]
+ %s7 = mul i32 %s6, %H ; <i32> [#uses=1]
+ %Ip = getelementptr i32* %P, i32 8 ; <i32*> [#uses=1]
+ %I = load i32* %Ip ; <i32> [#uses=1]
+ %s8 = mul i32 %s7, %I ; <i32> [#uses=1]
+ %Jp = getelementptr i32* %P, i32 9 ; <i32*> [#uses=1]
+ %J = load i32* %Jp ; <i32> [#uses=1]
+ %s9 = mul i32 %s8, %J ; <i32> [#uses=1]
+ ret i32 %s9
+}
+
+define i32 @regpressure2(i32* %P) {
+ %A = load i32* %P ; <i32> [#uses=1]
+ %Bp = getelementptr i32* %P, i32 1 ; <i32*> [#uses=1]
+ %B = load i32* %Bp ; <i32> [#uses=1]
+ %Cp = getelementptr i32* %P, i32 2 ; <i32*> [#uses=1]
+ %C = load i32* %Cp ; <i32> [#uses=1]
+ %Dp = getelementptr i32* %P, i32 3 ; <i32*> [#uses=1]
+ %D = load i32* %Dp ; <i32> [#uses=1]
+ %Ep = getelementptr i32* %P, i32 4 ; <i32*> [#uses=1]
+ %E = load i32* %Ep ; <i32> [#uses=1]
+ %Fp = getelementptr i32* %P, i32 5 ; <i32*> [#uses=1]
+ %F = load i32* %Fp ; <i32> [#uses=1]
+ %Gp = getelementptr i32* %P, i32 6 ; <i32*> [#uses=1]
+ %G = load i32* %Gp ; <i32> [#uses=1]
+ %Hp = getelementptr i32* %P, i32 7 ; <i32*> [#uses=1]
+ %H = load i32* %Hp ; <i32> [#uses=1]
+ %Ip = getelementptr i32* %P, i32 8 ; <i32*> [#uses=1]
+ %I = load i32* %Ip ; <i32> [#uses=1]
+ %Jp = getelementptr i32* %P, i32 9 ; <i32*> [#uses=1]
+ %J = load i32* %Jp ; <i32> [#uses=1]
+ %s1 = mul i32 %A, %B ; <i32> [#uses=1]
+ %s2 = mul i32 %s1, %C ; <i32> [#uses=1]
+ %s3 = mul i32 %s2, %D ; <i32> [#uses=1]
+ %s4 = mul i32 %s3, %E ; <i32> [#uses=1]
+ %s5 = mul i32 %s4, %F ; <i32> [#uses=1]
+ %s6 = mul i32 %s5, %G ; <i32> [#uses=1]
+ %s7 = mul i32 %s6, %H ; <i32> [#uses=1]
+ %s8 = mul i32 %s7, %I ; <i32> [#uses=1]
+ %s9 = mul i32 %s8, %J ; <i32> [#uses=1]
+ ret i32 %s9
+}
+
+define i32 @regpressure3(i16* %P, i1 %Cond, i32* %Other) {
+ %A = load i16* %P ; <i16> [#uses=1]
+ %Bp = getelementptr i16* %P, i32 1 ; <i16*> [#uses=1]
+ %B = load i16* %Bp ; <i16> [#uses=1]
+ %Cp = getelementptr i16* %P, i32 2 ; <i16*> [#uses=1]
+ %C = load i16* %Cp ; <i16> [#uses=1]
+ %Dp = getelementptr i16* %P, i32 3 ; <i16*> [#uses=1]
+ %D = load i16* %Dp ; <i16> [#uses=1]
+ %Ep = getelementptr i16* %P, i32 4 ; <i16*> [#uses=1]
+ %E = load i16* %Ep ; <i16> [#uses=1]
+ %Fp = getelementptr i16* %P, i32 5 ; <i16*> [#uses=1]
+ %F = load i16* %Fp ; <i16> [#uses=1]
+ %Gp = getelementptr i16* %P, i32 6 ; <i16*> [#uses=1]
+ %G = load i16* %Gp ; <i16> [#uses=1]
+ %Hp = getelementptr i16* %P, i32 7 ; <i16*> [#uses=1]
+ %H = load i16* %Hp ; <i16> [#uses=1]
+ %Ip = getelementptr i16* %P, i32 8 ; <i16*> [#uses=1]
+ %I = load i16* %Ip ; <i16> [#uses=1]
+ %Jp = getelementptr i16* %P, i32 9 ; <i16*> [#uses=1]
+ %J = load i16* %Jp ; <i16> [#uses=1]
+ %A.upgrd.1 = sext i16 %A to i32 ; <i32> [#uses=1]
+ %B.upgrd.2 = sext i16 %B to i32 ; <i32> [#uses=1]
+ %D.upgrd.3 = sext i16 %D to i32 ; <i32> [#uses=1]
+ %C.upgrd.4 = sext i16 %C to i32 ; <i32> [#uses=1]
+ %E.upgrd.5 = sext i16 %E to i32 ; <i32> [#uses=1]
+ %F.upgrd.6 = sext i16 %F to i32 ; <i32> [#uses=1]
+ %G.upgrd.7 = sext i16 %G to i32 ; <i32> [#uses=1]
+ %H.upgrd.8 = sext i16 %H to i32 ; <i32> [#uses=1]
+ %I.upgrd.9 = sext i16 %I to i32 ; <i32> [#uses=1]
+ %J.upgrd.10 = sext i16 %J to i32 ; <i32> [#uses=1]
+ %s1 = add i32 %A.upgrd.1, %B.upgrd.2 ; <i32> [#uses=1]
+ %s2 = add i32 %C.upgrd.4, %s1 ; <i32> [#uses=1]
+ %s3 = add i32 %D.upgrd.3, %s2 ; <i32> [#uses=1]
+ %s4 = add i32 %E.upgrd.5, %s3 ; <i32> [#uses=1]
+ %s5 = add i32 %F.upgrd.6, %s4 ; <i32> [#uses=1]
+ %s6 = add i32 %G.upgrd.7, %s5 ; <i32> [#uses=1]
+ %s7 = add i32 %H.upgrd.8, %s6 ; <i32> [#uses=1]
+ %s8 = add i32 %I.upgrd.9, %s7 ; <i32> [#uses=1]
+ %s9 = add i32 %J.upgrd.10, %s8 ; <i32> [#uses=1]
+ ret i32 %s9
+}
diff --git a/test/CodeGen/X86/rem-2.ll b/test/CodeGen/X86/rem-2.ll
new file mode 100644
index 0000000..1b2af4b
--- /dev/null
+++ b/test/CodeGen/X86/rem-2.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 | not grep cltd
+
+define i32 @test(i32 %X) nounwind readnone {
+entry:
+ %0 = srem i32 41, %X
+ ret i32 %0
+}
diff --git a/test/CodeGen/X86/rem.ll b/test/CodeGen/X86/rem.ll
new file mode 100644
index 0000000..394070e
--- /dev/null
+++ b/test/CodeGen/X86/rem.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86 | not grep div
+
+define i32 @test1(i32 %X) {
+ %tmp1 = srem i32 %X, 255 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @test2(i32 %X) {
+ %tmp1 = srem i32 %X, 256 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @test3(i32 %X) {
+ %tmp1 = urem i32 %X, 255 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32 @test4(i32 %X) {
+ %tmp1 = urem i32 %X, 256 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
diff --git a/test/CodeGen/X86/remat-constant.ll b/test/CodeGen/X86/remat-constant.ll
new file mode 100644
index 0000000..3e81320
--- /dev/null
+++ b/test/CodeGen/X86/remat-constant.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static | grep xmm | count 2
+
+declare void @bar() nounwind
+
+@a = external constant float
+
+declare void @qux(float %f) nounwind
+
+define void @foo() nounwind {
+ %f = load float* @a
+ call void @bar()
+ call void @qux(float %f)
+ call void @qux(float %f)
+ ret void
+}
diff --git a/test/CodeGen/X86/remat-mov-0.ll b/test/CodeGen/X86/remat-mov-0.ll
new file mode 100644
index 0000000..5fb445c
--- /dev/null
+++ b/test/CodeGen/X86/remat-mov-0.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; CodeGen should remat the zero instead of spilling it.
+
+declare void @foo(i64 %p)
+
+; CHECK: bar:
+; CHECK: xorl %edi, %edi
+; CHECK: xorl %edi, %edi
+define void @bar() nounwind {
+ call void @foo(i64 0)
+ call void @foo(i64 0)
+ ret void
+}
+
+; CHECK: bat:
+; CHECK: movq $-1, %rdi
+; CHECK: movq $-1, %rdi
+define void @bat() nounwind {
+ call void @foo(i64 -1)
+ call void @foo(i64 -1)
+ ret void
+}
+
+; CHECK: bau:
+; CHECK: movl $1, %edi
+; CHECK: movl $1, %edi
+define void @bau() nounwind {
+ call void @foo(i64 1)
+ call void @foo(i64 1)
+ ret void
+}
+
diff --git a/test/CodeGen/X86/remat-scalar-zero.ll b/test/CodeGen/X86/remat-scalar-zero.ll
new file mode 100644
index 0000000..2da96ab
--- /dev/null
+++ b/test/CodeGen/X86/remat-scalar-zero.ll
@@ -0,0 +1,95 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t
+; RUN: not grep xor %t
+; RUN: not grep movap %t
+; RUN: grep {\\.quad.*0} %t
+
+; Remat should be able to fold the zero constant into the div instructions
+; as a constant-pool load.
+
+define void @foo(double* nocapture %x, double* nocapture %y) nounwind {
+entry:
+ %tmp1 = load double* %x ; <double> [#uses=1]
+ %arrayidx4 = getelementptr inbounds double* %x, i64 1 ; <double*> [#uses=1]
+ %tmp5 = load double* %arrayidx4 ; <double> [#uses=1]
+ %arrayidx8 = getelementptr inbounds double* %x, i64 2 ; <double*> [#uses=1]
+ %tmp9 = load double* %arrayidx8 ; <double> [#uses=1]
+ %arrayidx12 = getelementptr inbounds double* %x, i64 3 ; <double*> [#uses=1]
+ %tmp13 = load double* %arrayidx12 ; <double> [#uses=1]
+ %arrayidx16 = getelementptr inbounds double* %x, i64 4 ; <double*> [#uses=1]
+ %tmp17 = load double* %arrayidx16 ; <double> [#uses=1]
+ %arrayidx20 = getelementptr inbounds double* %x, i64 5 ; <double*> [#uses=1]
+ %tmp21 = load double* %arrayidx20 ; <double> [#uses=1]
+ %arrayidx24 = getelementptr inbounds double* %x, i64 6 ; <double*> [#uses=1]
+ %tmp25 = load double* %arrayidx24 ; <double> [#uses=1]
+ %arrayidx28 = getelementptr inbounds double* %x, i64 7 ; <double*> [#uses=1]
+ %tmp29 = load double* %arrayidx28 ; <double> [#uses=1]
+ %arrayidx32 = getelementptr inbounds double* %x, i64 8 ; <double*> [#uses=1]
+ %tmp33 = load double* %arrayidx32 ; <double> [#uses=1]
+ %arrayidx36 = getelementptr inbounds double* %x, i64 9 ; <double*> [#uses=1]
+ %tmp37 = load double* %arrayidx36 ; <double> [#uses=1]
+ %arrayidx40 = getelementptr inbounds double* %x, i64 10 ; <double*> [#uses=1]
+ %tmp41 = load double* %arrayidx40 ; <double> [#uses=1]
+ %arrayidx44 = getelementptr inbounds double* %x, i64 11 ; <double*> [#uses=1]
+ %tmp45 = load double* %arrayidx44 ; <double> [#uses=1]
+ %arrayidx48 = getelementptr inbounds double* %x, i64 12 ; <double*> [#uses=1]
+ %tmp49 = load double* %arrayidx48 ; <double> [#uses=1]
+ %arrayidx52 = getelementptr inbounds double* %x, i64 13 ; <double*> [#uses=1]
+ %tmp53 = load double* %arrayidx52 ; <double> [#uses=1]
+ %arrayidx56 = getelementptr inbounds double* %x, i64 14 ; <double*> [#uses=1]
+ %tmp57 = load double* %arrayidx56 ; <double> [#uses=1]
+ %arrayidx60 = getelementptr inbounds double* %x, i64 15 ; <double*> [#uses=1]
+ %tmp61 = load double* %arrayidx60 ; <double> [#uses=1]
+ %arrayidx64 = getelementptr inbounds double* %x, i64 16 ; <double*> [#uses=1]
+ %tmp65 = load double* %arrayidx64 ; <double> [#uses=1]
+ %div = fdiv double %tmp1, 0.000000e+00 ; <double> [#uses=1]
+ store double %div, double* %y
+ %div70 = fdiv double %tmp5, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx72 = getelementptr inbounds double* %y, i64 1 ; <double*> [#uses=1]
+ store double %div70, double* %arrayidx72
+ %div74 = fdiv double %tmp9, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx76 = getelementptr inbounds double* %y, i64 2 ; <double*> [#uses=1]
+ store double %div74, double* %arrayidx76
+ %div78 = fdiv double %tmp13, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx80 = getelementptr inbounds double* %y, i64 3 ; <double*> [#uses=1]
+ store double %div78, double* %arrayidx80
+ %div82 = fdiv double %tmp17, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx84 = getelementptr inbounds double* %y, i64 4 ; <double*> [#uses=1]
+ store double %div82, double* %arrayidx84
+ %div86 = fdiv double %tmp21, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx88 = getelementptr inbounds double* %y, i64 5 ; <double*> [#uses=1]
+ store double %div86, double* %arrayidx88
+ %div90 = fdiv double %tmp25, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx92 = getelementptr inbounds double* %y, i64 6 ; <double*> [#uses=1]
+ store double %div90, double* %arrayidx92
+ %div94 = fdiv double %tmp29, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx96 = getelementptr inbounds double* %y, i64 7 ; <double*> [#uses=1]
+ store double %div94, double* %arrayidx96
+ %div98 = fdiv double %tmp33, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx100 = getelementptr inbounds double* %y, i64 8 ; <double*> [#uses=1]
+ store double %div98, double* %arrayidx100
+ %div102 = fdiv double %tmp37, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx104 = getelementptr inbounds double* %y, i64 9 ; <double*> [#uses=1]
+ store double %div102, double* %arrayidx104
+ %div106 = fdiv double %tmp41, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx108 = getelementptr inbounds double* %y, i64 10 ; <double*> [#uses=1]
+ store double %div106, double* %arrayidx108
+ %div110 = fdiv double %tmp45, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx112 = getelementptr inbounds double* %y, i64 11 ; <double*> [#uses=1]
+ store double %div110, double* %arrayidx112
+ %div114 = fdiv double %tmp49, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx116 = getelementptr inbounds double* %y, i64 12 ; <double*> [#uses=1]
+ store double %div114, double* %arrayidx116
+ %div118 = fdiv double %tmp53, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx120 = getelementptr inbounds double* %y, i64 13 ; <double*> [#uses=1]
+ store double %div118, double* %arrayidx120
+ %div122 = fdiv double %tmp57, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx124 = getelementptr inbounds double* %y, i64 14 ; <double*> [#uses=1]
+ store double %div122, double* %arrayidx124
+ %div126 = fdiv double %tmp61, 2.000000e-01 ; <double> [#uses=1]
+ %arrayidx128 = getelementptr inbounds double* %y, i64 15 ; <double*> [#uses=1]
+ store double %div126, double* %arrayidx128
+ %div130 = fdiv double %tmp65, 0.000000e+00 ; <double> [#uses=1]
+ %arrayidx132 = getelementptr inbounds double* %y, i64 16 ; <double*> [#uses=1]
+ store double %div130, double* %arrayidx132
+ ret void
+}
diff --git a/test/CodeGen/X86/ret-addr.ll b/test/CodeGen/X86/ret-addr.ll
new file mode 100644
index 0000000..b7b57ab
--- /dev/null
+++ b/test/CodeGen/X86/ret-addr.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -disable-fp-elim -march=x86 | not grep xor
+; RUN: llc < %s -disable-fp-elim -march=x86-64 | not grep xor
+
+define i8* @h() nounwind readnone optsize {
+entry:
+ %0 = tail call i8* @llvm.returnaddress(i32 2) ; <i8*> [#uses=1]
+ ret i8* %0
+}
+
+declare i8* @llvm.returnaddress(i32) nounwind readnone
+
+define i8* @g() nounwind readnone optsize {
+entry:
+ %0 = tail call i8* @llvm.returnaddress(i32 1) ; <i8*> [#uses=1]
+ ret i8* %0
+}
+
+define i8* @f() nounwind readnone optsize {
+entry:
+ %0 = tail call i8* @llvm.returnaddress(i32 0) ; <i8*> [#uses=1]
+ ret i8* %0
+}
diff --git a/test/CodeGen/X86/ret-i64-0.ll b/test/CodeGen/X86/ret-i64-0.ll
new file mode 100644
index 0000000..bca0f05
--- /dev/null
+++ b/test/CodeGen/X86/ret-i64-0.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86 | grep xor | count 2
+
+define i64 @foo() nounwind {
+ ret i64 0
+}
diff --git a/test/CodeGen/X86/ret-mmx.ll b/test/CodeGen/X86/ret-mmx.ll
new file mode 100644
index 0000000..04b57dd
--- /dev/null
+++ b/test/CodeGen/X86/ret-mmx.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2
+; rdar://6602459
+
+@g_v1di = external global <1 x i64>
+
+define void @t1() nounwind {
+entry:
+ %call = call <1 x i64> @return_v1di() ; <<1 x i64>> [#uses=0]
+ store <1 x i64> %call, <1 x i64>* @g_v1di
+ ret void
+}
+
+declare <1 x i64> @return_v1di()
+
+define <1 x i64> @t2() nounwind {
+ ret <1 x i64> <i64 1>
+}
+
+define <2 x i32> @t3() nounwind {
+ ret <2 x i32> <i32 1, i32 0>
+}
+
+define double @t4() nounwind {
+ ret double bitcast (<2 x i32> <i32 1, i32 0> to double)
+}
+
diff --git a/test/CodeGen/X86/rip-rel-address.ll b/test/CodeGen/X86/rip-rel-address.ll
new file mode 100644
index 0000000..24ff07b
--- /dev/null
+++ b/test/CodeGen/X86/rip-rel-address.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86-64 -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=STATIC64
+
+; Use %rip-relative addressing even in static mode on x86-64, because
+; it has a smaller encoding.
+
+@a = internal global double 3.4
+define double @foo() nounwind {
+ %a = load double* @a
+ ret double %a
+
+; PIC64: movsd _a(%rip), %xmm0
+; STATIC64: movsd a(%rip), %xmm0
+}
diff --git a/test/CodeGen/X86/rodata-relocs.ll b/test/CodeGen/X86/rodata-relocs.ll
new file mode 100644
index 0000000..276f8bb
--- /dev/null
+++ b/test/CodeGen/X86/rodata-relocs.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -relocation-model=static | grep rodata | count 3
+; RUN: llc < %s -relocation-model=static | grep -F "rodata.cst" | count 2
+; RUN: llc < %s -relocation-model=pic | grep rodata | count 2
+; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.ro" | count 2
+; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.ro.local" | count 1
+; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel" | count 4
+; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.local" | count 1
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+@a = internal constant [2 x i32] [i32 1, i32 2]
+@a1 = constant [2 x i32] [i32 1, i32 2]
+@e = internal constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16
+@e1 = constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16
+@p = constant i8* bitcast ([2 x i32]* @a to i8*)
+@t = constant i8* bitcast ([2 x [2 x i32]]* @e to i8*)
+@p1 = constant i8* bitcast ([2 x i32]* @a1 to i8*)
+@t1 = constant i8* bitcast ([2 x [2 x i32]]* @e1 to i8*)
+@p2 = internal global i8* bitcast([2 x i32]* @a1 to i8*)
+@t2 = internal global i8* bitcast([2 x [2 x i32]]* @e1 to i8*)
+@p3 = internal global i8* bitcast([2 x i32]* @a to i8*)
+@t3 = internal global i8* bitcast([2 x [2 x i32]]* @e to i8*)
+
diff --git a/test/CodeGen/X86/rot16.ll b/test/CodeGen/X86/rot16.ll
new file mode 100644
index 0000000..42ece47
--- /dev/null
+++ b/test/CodeGen/X86/rot16.ll
@@ -0,0 +1,73 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep rol %t | count 3
+; RUN: grep ror %t | count 1
+; RUN: grep shld %t | count 2
+; RUN: grep shrd %t | count 2
+
+define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind readnone {
+entry:
+ %0 = shl i16 %x, %z
+ %1 = sub i16 16, %z
+ %2 = lshr i16 %x, %1
+ %3 = or i16 %2, %0
+ ret i16 %3
+}
+
+define i16 @bar(i16 %x, i16 %y, i16 %z) nounwind readnone {
+entry:
+ %0 = shl i16 %y, %z
+ %1 = sub i16 16, %z
+ %2 = lshr i16 %x, %1
+ %3 = or i16 %2, %0
+ ret i16 %3
+}
+
+define i16 @un(i16 %x, i16 %y, i16 %z) nounwind readnone {
+entry:
+ %0 = lshr i16 %x, %z
+ %1 = sub i16 16, %z
+ %2 = shl i16 %x, %1
+ %3 = or i16 %2, %0
+ ret i16 %3
+}
+
+define i16 @bu(i16 %x, i16 %y, i16 %z) nounwind readnone {
+entry:
+ %0 = lshr i16 %y, %z
+ %1 = sub i16 16, %z
+ %2 = shl i16 %x, %1
+ %3 = or i16 %2, %0
+ ret i16 %3
+}
+
+define i16 @xfoo(i16 %x, i16 %y, i16 %z) nounwind readnone {
+entry:
+ %0 = lshr i16 %x, 11
+ %1 = shl i16 %x, 5
+ %2 = or i16 %0, %1
+ ret i16 %2
+}
+
+define i16 @xbar(i16 %x, i16 %y, i16 %z) nounwind readnone {
+entry:
+ %0 = shl i16 %y, 5
+ %1 = lshr i16 %x, 11
+ %2 = or i16 %0, %1
+ ret i16 %2
+}
+
+define i16 @xun(i16 %x, i16 %y, i16 %z) nounwind readnone {
+entry:
+ %0 = lshr i16 %x, 5
+ %1 = shl i16 %x, 11
+ %2 = or i16 %0, %1
+ ret i16 %2
+}
+
+define i16 @xbu(i16 %x, i16 %y, i16 %z) nounwind readnone {
+entry:
+ %0 = lshr i16 %y, 5
+ %1 = shl i16 %x, 11
+ %2 = or i16 %0, %1
+ ret i16 %2
+}
diff --git a/test/CodeGen/X86/rot32.ll b/test/CodeGen/X86/rot32.ll
new file mode 100644
index 0000000..655ed27
--- /dev/null
+++ b/test/CodeGen/X86/rot32.ll
@@ -0,0 +1,73 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep rol %t | count 3
+; RUN: grep ror %t | count 1
+; RUN: grep shld %t | count 2
+; RUN: grep shrd %t | count 2
+
+define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %0 = shl i32 %x, %z
+ %1 = sub i32 32, %z
+ %2 = lshr i32 %x, %1
+ %3 = or i32 %2, %0
+ ret i32 %3
+}
+
+define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %0 = shl i32 %y, %z
+ %1 = sub i32 32, %z
+ %2 = lshr i32 %x, %1
+ %3 = or i32 %2, %0
+ ret i32 %3
+}
+
+define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %0 = lshr i32 %x, %z
+ %1 = sub i32 32, %z
+ %2 = shl i32 %x, %1
+ %3 = or i32 %2, %0
+ ret i32 %3
+}
+
+define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %0 = lshr i32 %y, %z
+ %1 = sub i32 32, %z
+ %2 = shl i32 %x, %1
+ %3 = or i32 %2, %0
+ ret i32 %3
+}
+
+define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %0 = lshr i32 %x, 25
+ %1 = shl i32 %x, 7
+ %2 = or i32 %0, %1
+ ret i32 %2
+}
+
+define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %0 = shl i32 %y, 7
+ %1 = lshr i32 %x, 25
+ %2 = or i32 %0, %1
+ ret i32 %2
+}
+
+define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %0 = lshr i32 %x, 7
+ %1 = shl i32 %x, 25
+ %2 = or i32 %0, %1
+ ret i32 %2
+}
+
+define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
+entry:
+ %0 = lshr i32 %y, 7
+ %1 = shl i32 %x, 25
+ %2 = or i32 %0, %1
+ ret i32 %2
+}
diff --git a/test/CodeGen/X86/rot64.ll b/test/CodeGen/X86/rot64.ll
new file mode 100644
index 0000000..4e082bb
--- /dev/null
+++ b/test/CodeGen/X86/rot64.ll
@@ -0,0 +1,73 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep rol %t | count 3
+; RUN: grep ror %t | count 1
+; RUN: grep shld %t | count 2
+; RUN: grep shrd %t | count 2
+
+define i64 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone {
+entry:
+ %0 = shl i64 %x, %z
+ %1 = sub i64 64, %z
+ %2 = lshr i64 %x, %1
+ %3 = or i64 %2, %0
+ ret i64 %3
+}
+
+define i64 @bar(i64 %x, i64 %y, i64 %z) nounwind readnone {
+entry:
+ %0 = shl i64 %y, %z
+ %1 = sub i64 64, %z
+ %2 = lshr i64 %x, %1
+ %3 = or i64 %2, %0
+ ret i64 %3
+}
+
+define i64 @un(i64 %x, i64 %y, i64 %z) nounwind readnone {
+entry:
+ %0 = lshr i64 %x, %z
+ %1 = sub i64 64, %z
+ %2 = shl i64 %x, %1
+ %3 = or i64 %2, %0
+ ret i64 %3
+}
+
+define i64 @bu(i64 %x, i64 %y, i64 %z) nounwind readnone {
+entry:
+ %0 = lshr i64 %y, %z
+ %1 = sub i64 64, %z
+ %2 = shl i64 %x, %1
+ %3 = or i64 %2, %0
+ ret i64 %3
+}
+
+define i64 @xfoo(i64 %x, i64 %y, i64 %z) nounwind readnone {
+entry:
+ %0 = lshr i64 %x, 57
+ %1 = shl i64 %x, 7
+ %2 = or i64 %0, %1
+ ret i64 %2
+}
+
+define i64 @xbar(i64 %x, i64 %y, i64 %z) nounwind readnone {
+entry:
+ %0 = shl i64 %y, 7
+ %1 = lshr i64 %x, 57
+ %2 = or i64 %0, %1
+ ret i64 %2
+}
+
+define i64 @xun(i64 %x, i64 %y, i64 %z) nounwind readnone {
+entry:
+ %0 = lshr i64 %x, 7
+ %1 = shl i64 %x, 57
+ %2 = or i64 %0, %1
+ ret i64 %2
+}
+
+define i64 @xbu(i64 %x, i64 %y, i64 %z) nounwind readnone {
+entry:
+ %0 = lshr i64 %y, 7
+ %1 = shl i64 %x, 57
+ %2 = or i64 %0, %1
+ ret i64 %2
+}
diff --git a/test/CodeGen/X86/rotate.ll b/test/CodeGen/X86/rotate.ll
new file mode 100644
index 0000000..1e20273
--- /dev/null
+++ b/test/CodeGen/X86/rotate.ll
@@ -0,0 +1,100 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep {ro\[rl\]} | count 12
+
+define i32 @rotl32(i32 %A, i8 %Amt) {
+ %shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1]
+ %B = shl i32 %A, %shift.upgrd.1 ; <i32> [#uses=1]
+ %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
+ %shift.upgrd.2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
+ %C = lshr i32 %A, %shift.upgrd.2 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotr32(i32 %A, i8 %Amt) {
+ %shift.upgrd.3 = zext i8 %Amt to i32 ; <i32> [#uses=1]
+ %B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1]
+ %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
+ %shift.upgrd.4 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
+ %C = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotli32(i32 %A) {
+ %B = shl i32 %A, 5 ; <i32> [#uses=1]
+ %C = lshr i32 %A, 27 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @rotri32(i32 %A) {
+ %B = lshr i32 %A, 5 ; <i32> [#uses=1]
+ %C = shl i32 %A, 27 ; <i32> [#uses=1]
+ %D = or i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i16 @rotl16(i16 %A, i8 %Amt) {
+ %shift.upgrd.5 = zext i8 %Amt to i16 ; <i16> [#uses=1]
+ %B = shl i16 %A, %shift.upgrd.5 ; <i16> [#uses=1]
+ %Amt2 = sub i8 16, %Amt ; <i8> [#uses=1]
+ %shift.upgrd.6 = zext i8 %Amt2 to i16 ; <i16> [#uses=1]
+ %C = lshr i16 %A, %shift.upgrd.6 ; <i16> [#uses=1]
+ %D = or i16 %B, %C ; <i16> [#uses=1]
+ ret i16 %D
+}
+
+define i16 @rotr16(i16 %A, i8 %Amt) {
+ %shift.upgrd.7 = zext i8 %Amt to i16 ; <i16> [#uses=1]
+ %B = lshr i16 %A, %shift.upgrd.7 ; <i16> [#uses=1]
+ %Amt2 = sub i8 16, %Amt ; <i8> [#uses=1]
+ %shift.upgrd.8 = zext i8 %Amt2 to i16 ; <i16> [#uses=1]
+ %C = shl i16 %A, %shift.upgrd.8 ; <i16> [#uses=1]
+ %D = or i16 %B, %C ; <i16> [#uses=1]
+ ret i16 %D
+}
+
+define i16 @rotli16(i16 %A) {
+ %B = shl i16 %A, 5 ; <i16> [#uses=1]
+ %C = lshr i16 %A, 11 ; <i16> [#uses=1]
+ %D = or i16 %B, %C ; <i16> [#uses=1]
+ ret i16 %D
+}
+
+define i16 @rotri16(i16 %A) {
+ %B = lshr i16 %A, 5 ; <i16> [#uses=1]
+ %C = shl i16 %A, 11 ; <i16> [#uses=1]
+ %D = or i16 %B, %C ; <i16> [#uses=1]
+ ret i16 %D
+}
+
+define i8 @rotl8(i8 %A, i8 %Amt) {
+ %B = shl i8 %A, %Amt ; <i8> [#uses=1]
+ %Amt2 = sub i8 8, %Amt ; <i8> [#uses=1]
+ %C = lshr i8 %A, %Amt2 ; <i8> [#uses=1]
+ %D = or i8 %B, %C ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i8 @rotr8(i8 %A, i8 %Amt) {
+ %B = lshr i8 %A, %Amt ; <i8> [#uses=1]
+ %Amt2 = sub i8 8, %Amt ; <i8> [#uses=1]
+ %C = shl i8 %A, %Amt2 ; <i8> [#uses=1]
+ %D = or i8 %B, %C ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i8 @rotli8(i8 %A) {
+ %B = shl i8 %A, 5 ; <i8> [#uses=1]
+ %C = lshr i8 %A, 3 ; <i8> [#uses=1]
+ %D = or i8 %B, %C ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i8 @rotri8(i8 %A) {
+ %B = lshr i8 %A, 5 ; <i8> [#uses=1]
+ %C = shl i8 %A, 3 ; <i8> [#uses=1]
+ %D = or i8 %B, %C ; <i8> [#uses=1]
+ ret i8 %D
+}
diff --git a/test/CodeGen/X86/rotate2.ll b/test/CodeGen/X86/rotate2.ll
new file mode 100644
index 0000000..2eea399
--- /dev/null
+++ b/test/CodeGen/X86/rotate2.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86-64 | grep rol | count 2
+
+define i64 @test1(i64 %x) nounwind {
+entry:
+ %tmp2 = lshr i64 %x, 55 ; <i64> [#uses=1]
+ %tmp4 = shl i64 %x, 9 ; <i64> [#uses=1]
+ %tmp5 = or i64 %tmp2, %tmp4 ; <i64> [#uses=1]
+ ret i64 %tmp5
+}
+
+define i64 @test2(i32 %x) nounwind {
+entry:
+ %tmp2 = lshr i32 %x, 22 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %x, 10 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp2, %tmp4 ; <i32> [#uses=1]
+ %tmp56 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]
+ ret i64 %tmp56
+}
+
diff --git a/test/CodeGen/X86/scalar-extract.ll b/test/CodeGen/X86/scalar-extract.ll
new file mode 100644
index 0000000..2845838
--- /dev/null
+++ b/test/CodeGen/X86/scalar-extract.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx -o %t
+; RUN: not grep movq %t
+
+; Check that widening doesn't introduce a mmx register in this case when
+; a simple load/store would suffice.
+
+define void @foo(<2 x i16>* %A, <2 x i16>* %B) {
+entry:
+ %tmp1 = load <2 x i16>* %A ; <<2 x i16>> [#uses=1]
+ store <2 x i16> %tmp1, <2 x i16>* %B
+ ret void
+}
+
diff --git a/test/CodeGen/X86/scalar-min-max-fill-operand.ll b/test/CodeGen/X86/scalar-min-max-fill-operand.ll
new file mode 100644
index 0000000..fe40758
--- /dev/null
+++ b/test/CodeGen/X86/scalar-min-max-fill-operand.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86-64 | grep min | count 1
+; RUN: llc < %s -march=x86-64 | grep max | count 1
+; RUN: llc < %s -march=x86-64 | grep mov | count 2
+
+declare float @bar()
+
+define float @foo(float %a) nounwind
+{
+ %s = call float @bar()
+ %t = fcmp olt float %s, %a
+ %u = select i1 %t, float %s, float %a
+ ret float %u
+}
+define float @hem(float %a) nounwind
+{
+ %s = call float @bar()
+ %t = fcmp ogt float %s, %a
+ %u = select i1 %t, float %s, float %a
+ ret float %u
+}
diff --git a/test/CodeGen/X86/scalar_sse_minmax.ll b/test/CodeGen/X86/scalar_sse_minmax.ll
new file mode 100644
index 0000000..bc4ab5d
--- /dev/null
+++ b/test/CodeGen/X86/scalar_sse_minmax.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 | \
+; RUN: grep mins | count 3
+; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 | \
+; RUN: grep maxs | count 2
+
+declare i1 @llvm.isunordered.f64(double, double)
+
+declare i1 @llvm.isunordered.f32(float, float)
+
+define float @min1(float %x, float %y) {
+ %tmp = fcmp olt float %x, %y ; <i1> [#uses=1]
+ %retval = select i1 %tmp, float %x, float %y ; <float> [#uses=1]
+ ret float %retval
+}
+
+define double @min2(double %x, double %y) {
+ %tmp = fcmp olt double %x, %y ; <i1> [#uses=1]
+ %retval = select i1 %tmp, double %x, double %y ; <double> [#uses=1]
+ ret double %retval
+}
+
+define float @max1(float %x, float %y) {
+ %tmp = fcmp oge float %x, %y ; <i1> [#uses=1]
+ %tmp2 = fcmp uno float %x, %y ; <i1> [#uses=1]
+ %tmp3 = or i1 %tmp2, %tmp ; <i1> [#uses=1]
+ %retval = select i1 %tmp3, float %x, float %y ; <float> [#uses=1]
+ ret float %retval
+}
+
+define double @max2(double %x, double %y) {
+ %tmp = fcmp oge double %x, %y ; <i1> [#uses=1]
+ %tmp2 = fcmp uno double %x, %y ; <i1> [#uses=1]
+ %tmp3 = or i1 %tmp2, %tmp ; <i1> [#uses=1]
+ %retval = select i1 %tmp3, double %x, double %y ; <double> [#uses=1]
+ ret double %retval
+}
+
+define <4 x float> @min3(float %tmp37) {
+ %tmp375 = insertelement <4 x float> undef, float %tmp37, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp48
+}
+
+declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
diff --git a/test/CodeGen/X86/scalar_widen_div.ll b/test/CodeGen/X86/scalar_widen_div.ll
new file mode 100644
index 0000000..fc67e44
--- /dev/null
+++ b/test/CodeGen/X86/scalar_widen_div.ll
@@ -0,0 +1,154 @@
+; RUN: llc < %s -disable-mmx -march=x86-64 -mattr=+sse42 | FileCheck %s
+
+; Verify when widening a divide/remainder operation, we only generate a
+; divide/rem per element since divide/remainder can trap.
+
+define void @vectorDiv (<2 x i32> addrspace(1)* %nsource, <2 x i32> addrspace(1)* %dsource, <2 x i32> addrspace(1)* %qdest) nounwind {
+; CHECK: idivl
+; CHECK: idivl
+; CHECK-NOT: idivl
+; CHECK: ret
+entry:
+ %nsource.addr = alloca <2 x i32> addrspace(1)*, align 4
+ %dsource.addr = alloca <2 x i32> addrspace(1)*, align 4
+ %qdest.addr = alloca <2 x i32> addrspace(1)*, align 4
+ %index = alloca i32, align 4
+ store <2 x i32> addrspace(1)* %nsource, <2 x i32> addrspace(1)** %nsource.addr
+ store <2 x i32> addrspace(1)* %dsource, <2 x i32> addrspace(1)** %dsource.addr
+ store <2 x i32> addrspace(1)* %qdest, <2 x i32> addrspace(1)** %qdest.addr
+ %tmp = load <2 x i32> addrspace(1)** %qdest.addr
+ %tmp1 = load i32* %index
+ %arrayidx = getelementptr <2 x i32> addrspace(1)* %tmp, i32 %tmp1
+ %tmp2 = load <2 x i32> addrspace(1)** %nsource.addr
+ %tmp3 = load i32* %index
+ %arrayidx4 = getelementptr <2 x i32> addrspace(1)* %tmp2, i32 %tmp3
+ %tmp5 = load <2 x i32> addrspace(1)* %arrayidx4
+ %tmp6 = load <2 x i32> addrspace(1)** %dsource.addr
+ %tmp7 = load i32* %index
+ %arrayidx8 = getelementptr <2 x i32> addrspace(1)* %tmp6, i32 %tmp7
+ %tmp9 = load <2 x i32> addrspace(1)* %arrayidx8
+ %tmp10 = sdiv <2 x i32> %tmp5, %tmp9
+ store <2 x i32> %tmp10, <2 x i32> addrspace(1)* %arrayidx
+ ret void
+}
+
+define <3 x i8> @test_char_div(<3 x i8> %num, <3 x i8> %div) {
+; CHECK: idivb
+; CHECK: idivb
+; CHECK: idivb
+; CHECK-NOT: idivb
+; CHECK: ret
+ %div.r = sdiv <3 x i8> %num, %div
+ ret <3 x i8> %div.r
+}
+
+define <3 x i8> @test_uchar_div(<3 x i8> %num, <3 x i8> %div) {
+; CHECK: divb
+; CHECK: divb
+; CHECK: divb
+; CHECK-NOT: divb
+; CHECK: ret
+ %div.r = udiv <3 x i8> %num, %div
+ ret <3 x i8> %div.r
+}
+
+define <5 x i16> @test_short_div(<5 x i16> %num, <5 x i16> %div) {
+; CHECK: idivw
+; CHECK: idivw
+; CHECK: idivw
+; CHECK: idivw
+; CHECK: idivw
+; CHECK-NOT: idivw
+; CHECK: ret
+ %div.r = sdiv <5 x i16> %num, %div
+ ret <5 x i16> %div.r
+}
+
+define <4 x i16> @test_ushort_div(<4 x i16> %num, <4 x i16> %div) {
+; CHECK: divw
+; CHECK: divw
+; CHECK: divw
+; CHECK: divw
+; CHECK-NOT: divw
+; CHECK: ret
+ %div.r = udiv <4 x i16> %num, %div
+ ret <4 x i16> %div.r
+}
+
+define <3 x i32> @test_uint_div(<3 x i32> %num, <3 x i32> %div) {
+; CHECK: divl
+; CHECK: divl
+; CHECK: divl
+; CHECK-NOT: divl
+; CHECK: ret
+ %div.r = udiv <3 x i32> %num, %div
+ ret <3 x i32> %div.r
+}
+
+define <3 x i64> @test_long_div(<3 x i64> %num, <3 x i64> %div) {
+; CHECK: idivq
+; CHECK: idivq
+; CHECK: idivq
+; CHECK-NOT: idivq
+; CHECK: ret
+ %div.r = sdiv <3 x i64> %num, %div
+ ret <3 x i64> %div.r
+}
+
+define <3 x i64> @test_ulong_div(<3 x i64> %num, <3 x i64> %div) {
+; CHECK: divq
+; CHECK: divq
+; CHECK: divq
+; CHECK-NOT: divq
+; CHECK: ret
+ %div.r = udiv <3 x i64> %num, %div
+ ret <3 x i64> %div.r
+}
+
+
+define <4 x i8> @test_char_rem(<4 x i8> %num, <4 x i8> %rem) {
+; CHECK: idivb
+; CHECK: idivb
+; CHECK: idivb
+; CHECK: idivb
+; CHECK-NOT: idivb
+; CHECK: ret
+ %rem.r = srem <4 x i8> %num, %rem
+ ret <4 x i8> %rem.r
+}
+
+define <5 x i16> @test_short_rem(<5 x i16> %num, <5 x i16> %rem) {
+; CHECK: idivw
+; CHECK: idivw
+; CHECK: idivw
+; CHECK: idivw
+; CHECK: idivw
+; CHECK-NOT: idivw
+; CHECK: ret
+ %rem.r = srem <5 x i16> %num, %rem
+ ret <5 x i16> %rem.r
+}
+
+define <4 x i32> @test_uint_rem(<4 x i32> %num, <4 x i32> %rem) {
+; CHECK: idivl
+; CHECK: idivl
+; CHECK: idivl
+; CHECK: idivl
+; CHECK-NOT: idivl
+; CHECK: ret
+ %rem.r = srem <4 x i32> %num, %rem
+ ret <4 x i32> %rem.r
+}
+
+
+define <5 x i64> @test_ulong_rem(<5 x i64> %num, <5 x i64> %rem) {
+; CHECK: divq
+; CHECK: divq
+; CHECK: divq
+; CHECK: divq
+; CHECK: divq
+; CHECK-NOT: divq
+; CHECK: ret
+ %rem.r = urem <5 x i64> %num, %rem
+ ret <5 x i64> %rem.r
+}
diff --git a/test/CodeGen/X86/scalarize-bitcast.ll b/test/CodeGen/X86/scalarize-bitcast.ll
new file mode 100644
index 0000000..f6b29ec
--- /dev/null
+++ b/test/CodeGen/X86/scalarize-bitcast.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86-64
+; PR3886
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-pc-linux-gnu"
+
+define void @mmxCombineMaskU(i32* nocapture %src, i32* nocapture %mask) nounwind {
+entry:
+ %tmp1 = load i32* %src ; <i32> [#uses=1]
+ %0 = insertelement <2 x i32> undef, i32 %tmp1, i32 0 ; <<2 x i32>> [#uses=1]
+ %1 = insertelement <2 x i32> %0, i32 0, i32 1 ; <<2 x i32>> [#uses=1]
+ %conv.i.i = bitcast <2 x i32> %1 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ %tmp2.i.i = extractelement <1 x i64> %conv.i.i, i32 0 ; <i64> [#uses=1]
+ %tmp22.i = bitcast i64 %tmp2.i.i to <1 x i64> ; <<1 x i64>> [#uses=1]
+ %tmp15.i = extractelement <1 x i64> %tmp22.i, i32 0 ; <i64> [#uses=1]
+ %conv.i26.i = bitcast i64 %tmp15.i to <8 x i8> ; <<8 x i8>> [#uses=1]
+ %shuffle.i.i = shufflevector <8 x i8> %conv.i26.i, <8 x i8> <i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef>, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> ; <<8 x i8>> [#uses=1]
+ %conv6.i.i = bitcast <8 x i8> %shuffle.i.i to <1 x i64> ; <<1 x i64>> [#uses=1]
+ %tmp12.i.i = extractelement <1 x i64> %conv6.i.i, i32 0 ; <i64> [#uses=1]
+ %tmp10.i = bitcast i64 %tmp12.i.i to <1 x i64> ; <<1 x i64>> [#uses=1]
+ %tmp24.i = extractelement <1 x i64> %tmp10.i, i32 0 ; <i64> [#uses=1]
+ %tmp10 = bitcast i64 %tmp24.i to <1 x i64> ; <<1 x i64>> [#uses=1]
+ %tmp7 = extractelement <1 x i64> %tmp10, i32 0 ; <i64> [#uses=1]
+ %call6 = tail call i32 (...)* @store8888(i64 %tmp7) ; <i32> [#uses=1]
+ store i32 %call6, i32* %src
+ ret void
+}
+
+declare i32 @store8888(...)
diff --git a/test/CodeGen/X86/scev-interchange.ll b/test/CodeGen/X86/scev-interchange.ll
new file mode 100644
index 0000000..81c919f
--- /dev/null
+++ b/test/CodeGen/X86/scev-interchange.ll
@@ -0,0 +1,338 @@
+; RUN: llc < %s -march=x86-64
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+ %"struct.DataOutBase::GmvFlags" = type { i32 }
+ %"struct.FE_DGPNonparametric<3>" = type { [1156 x i8], i32, %"struct.PolynomialSpace<1>" }
+ %"struct.FiniteElementData<1>" = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.Line = type { [2 x i32] }
+ %"struct.PolynomialSpace<1>" = type { %"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >", i32, %"struct.std::vector<int,std::allocator<int> >", %"struct.std::vector<int,std::allocator<int> >" }
+ %"struct.Polynomials::Polynomial<double>" = type { %struct.Subscriptor, %"struct.std::vector<double,std::allocator<double> >" }
+ %struct.Subscriptor = type { i32 (...)**, i32, %"struct.std::type_info"* }
+ %"struct.TableBase<2,double>" = type { %struct.Subscriptor, double*, i32, %"struct.TableIndices<2>" }
+ %"struct.TableIndices<2>" = type { %struct.Line }
+ %"struct.std::_Bit_const_iterator" = type { %"struct.std::_Bit_iterator_base" }
+ %"struct.std::_Bit_iterator_base" = type { i64*, i32 }
+ %"struct.std::_Bvector_base<std::allocator<bool> >" = type { %"struct.std::_Bvector_base<std::allocator<bool> >::_Bvector_impl" }
+ %"struct.std::_Bvector_base<std::allocator<bool> >::_Bvector_impl" = type { %"struct.std::_Bit_const_iterator", %"struct.std::_Bit_const_iterator", i64* }
+ %"struct.std::_Vector_base<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >" = type { %"struct.std::_Vector_base<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >::_Vector_impl" }
+ %"struct.std::_Vector_base<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >::_Vector_impl" = type { %"struct.Polynomials::Polynomial<double>"*, %"struct.Polynomials::Polynomial<double>"*, %"struct.Polynomials::Polynomial<double>"* }
+ %"struct.std::_Vector_base<double,std::allocator<double> >" = type { %"struct.std::_Vector_base<double,std::allocator<double> >::_Vector_impl" }
+ %"struct.std::_Vector_base<double,std::allocator<double> >::_Vector_impl" = type { double*, double*, double* }
+ %"struct.std::_Vector_base<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl" }
+ %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl" = type { i32*, i32*, i32* }
+ %"struct.std::_Vector_base<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >" = type { %"struct.std::_Vector_base<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >::_Vector_impl" }
+ %"struct.std::_Vector_base<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >::_Vector_impl" = type { %"struct.std::vector<bool,std::allocator<bool> >"*, %"struct.std::vector<bool,std::allocator<bool> >"*, %"struct.std::vector<bool,std::allocator<bool> >"* }
+ %"struct.std::type_info" = type { i32 (...)**, i8* }
+ %"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >" = type { %"struct.std::_Vector_base<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >" }
+ %"struct.std::vector<bool,std::allocator<bool> >" = type { %"struct.std::_Bvector_base<std::allocator<bool> >" }
+ %"struct.std::vector<double,std::allocator<double> >" = type { %"struct.std::_Vector_base<double,std::allocator<double> >" }
+ %"struct.std::vector<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >" }
+ %"struct.std::vector<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >" = type { %"struct.std::_Vector_base<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >" }
+
+declare void @_Unwind_Resume(i8*)
+
+declare i8* @_Znwm(i64)
+
+declare fastcc void @_ZNSt6vectorIjSaIjEEaSERKS1_(%"struct.std::vector<int,std::allocator<int> >"*, %"struct.std::vector<int,std::allocator<int> >"*)
+
+declare fastcc void @_ZN9TableBaseILi2EdE6reinitERK12TableIndicesILi2EE(%"struct.TableBase<2,double>"* nocapture, i32, i32)
+
+declare fastcc void @_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_(%"struct.std::vector<bool,std::allocator<bool> >"* nocapture, i64, i8* nocapture)
+
+declare fastcc void @_ZNSt6vectorIS_IbSaIbEESaIS1_EEC2EmRKS1_RKS2_(%"struct.std::vector<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >"* nocapture, i64, %"struct.std::vector<bool,std::allocator<bool> >"* nocapture)
+
+declare fastcc void @_ZNSt6vectorIN11Polynomials10PolynomialIdEESaIS2_EED1Ev(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* nocapture)
+
+declare fastcc void @_ZN24TensorProductPolynomialsILi3EEC2IN11Polynomials10PolynomialIdEEEERKSt6vectorIT_SaIS6_EE(%"struct.PolynomialSpace<1>"* nocapture, %"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* nocapture)
+
+declare fastcc void @_ZN7FE_PolyI24TensorProductPolynomialsILi3EELi3EEC2EjRKS1_RK17FiniteElementDataILi3EERKSt6vectorIbSaIbEERKS9_ISB_SaISB_EE(%"struct.FE_DGPNonparametric<3>"*, i32, %"struct.PolynomialSpace<1>"* nocapture, %"struct.FiniteElementData<1>"* nocapture, %"struct.std::vector<bool,std::allocator<bool> >"* nocapture, %"struct.std::vector<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >"* nocapture)
+
+declare fastcc void @_ZN11FE_Q_Helper12_GLOBAL__N_116invert_numberingERKSt6vectorIjSaIjEE(%"struct.std::vector<int,std::allocator<int> >"* noalias nocapture sret, %"struct.std::vector<int,std::allocator<int> >"* nocapture)
+
+declare fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias nocapture sret, i32)
+
+define fastcc void @_ZN4FE_QILi3EEC1Ej(i32 %degree) {
+entry:
+ invoke fastcc void @_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_(%"struct.std::vector<bool,std::allocator<bool> >"* undef, i64 1, i8* undef)
+ to label %invcont.i unwind label %lpad.i
+
+invcont.i: ; preds = %entry
+ invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, i32 %degree)
+ to label %invcont1.i unwind label %lpad120.i
+
+invcont1.i: ; preds = %invcont.i
+ invoke fastcc void @_ZNSt6vectorIS_IbSaIbEESaIS1_EEC2EmRKS1_RKS2_(%"struct.std::vector<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >"* undef, i64 undef, %"struct.std::vector<bool,std::allocator<bool> >"* undef)
+ to label %invcont3.i unwind label %lpad124.i
+
+invcont3.i: ; preds = %invcont1.i
+ invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, i32 %degree)
+ to label %invcont4.i unwind label %lpad128.i
+
+invcont4.i: ; preds = %invcont3.i
+ invoke fastcc void @_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_(%"struct.std::vector<bool,std::allocator<bool> >"* undef, i64 undef, i8* undef)
+ to label %invcont6.i unwind label %lpad132.i
+
+invcont6.i: ; preds = %invcont4.i
+ invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, i32 %degree)
+ to label %invcont7.i unwind label %lpad136.i
+
+invcont7.i: ; preds = %invcont6.i
+ invoke fastcc void @_ZN11Polynomials19LagrangeEquidistant23generate_complete_basisEj(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* noalias sret undef, i32 %degree)
+ to label %invcont9.i unwind label %lpad140.i
+
+invcont9.i: ; preds = %invcont7.i
+ invoke fastcc void @_ZN24TensorProductPolynomialsILi3EEC2IN11Polynomials10PolynomialIdEEEERKSt6vectorIT_SaIS6_EE(%"struct.PolynomialSpace<1>"* undef, %"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* undef)
+ to label %invcont10.i unwind label %lpad144.i
+
+invcont10.i: ; preds = %invcont9.i
+ invoke fastcc void @_ZN7FE_PolyI24TensorProductPolynomialsILi3EELi3EEC2EjRKS1_RK17FiniteElementDataILi3EERKSt6vectorIbSaIbEERKS9_ISB_SaISB_EE(%"struct.FE_DGPNonparametric<3>"* undef, i32 %degree, %"struct.PolynomialSpace<1>"* undef, %"struct.FiniteElementData<1>"* undef, %"struct.std::vector<bool,std::allocator<bool> >"* undef, %"struct.std::vector<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >"* undef)
+ to label %bb14.i unwind label %lpad148.i
+
+bb14.i: ; preds = %invcont10.i
+ br i1 false, label %bb3.i164.i, label %bb.i.i.i.i160.i
+
+bb.i.i.i.i160.i: ; preds = %bb14.i
+ unreachable
+
+bb3.i164.i: ; preds = %bb14.i
+ br i1 undef, label %bb10.i168.i, label %bb.i.i.i20.i166.i
+
+bb.i.i.i20.i166.i: ; preds = %bb3.i164.i
+ unreachable
+
+bb10.i168.i: ; preds = %bb3.i164.i
+ invoke fastcc void @_ZNSt6vectorIN11Polynomials10PolynomialIdEESaIS2_EED1Ev(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* undef)
+ to label %bb21.i unwind label %lpad144.i
+
+bb21.i: ; preds = %bb10.i168.i
+ invoke fastcc void @_ZNSt6vectorIN11Polynomials10PolynomialIdEESaIS2_EED1Ev(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* undef)
+ to label %bb28.i unwind label %lpad140.i
+
+bb28.i: ; preds = %bb21.i
+ br i1 undef, label %bb35.i, label %bb.i.i.i175.i
+
+bb.i.i.i175.i: ; preds = %bb28.i
+ br label %bb35.i
+
+bb35.i: ; preds = %bb.i.i.i175.i, %bb28.i
+ br i1 undef, label %bb42.i, label %bb.i.i.i205.i
+
+bb.i.i.i205.i: ; preds = %bb35.i
+ unreachable
+
+bb42.i: ; preds = %bb35.i
+ br i1 undef, label %bb47.i, label %bb.i.i.i213.i
+
+bb.i.i.i213.i: ; preds = %bb42.i
+ unreachable
+
+bb47.i: ; preds = %bb42.i
+ br i1 undef, label %bb59.i, label %bb.i.i.i247.i
+
+bb.i.i.i247.i: ; preds = %bb47.i
+ unreachable
+
+bb59.i: ; preds = %bb47.i
+ br i1 undef, label %bb66.i, label %bb.i.i.i255.i
+
+bb.i.i.i255.i: ; preds = %bb59.i
+ unreachable
+
+bb66.i: ; preds = %bb59.i
+ br i1 undef, label %bb71.i, label %bb.i.i.i262.i
+
+bb.i.i.i262.i: ; preds = %bb66.i
+ br label %bb71.i
+
+bb71.i: ; preds = %bb.i.i.i262.i, %bb66.i
+ %tmp11.i.i29.i.i.i.i.i.i = invoke i8* @_Znwm(i64 12)
+ to label %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i.i unwind label %lpad.i.i.i.i.i.i ; <i8*> [#uses=0]
+
+lpad.i.i.i.i.i.i: ; preds = %bb71.i
+ unreachable
+
+_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i.i: ; preds = %bb71.i
+ br i1 undef, label %_ZNSt6vectorIjSaIjEED1Ev.exit.i.i, label %bb.i.i.i.i94.i
+
+bb.i.i.i.i94.i: ; preds = %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i.i
+ unreachable
+
+_ZNSt6vectorIjSaIjEED1Ev.exit.i.i: ; preds = %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i.i
+ %tmp11.i.i29.i.i.i.i5.i.i = invoke i8* @_Znwm(i64 undef)
+ to label %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i12.i.i unwind label %lpad.i.i.i.i8.i.i ; <i8*> [#uses=0]
+
+lpad.i.i.i.i8.i.i: ; preds = %_ZNSt6vectorIjSaIjEED1Ev.exit.i.i
+ invoke void @_Unwind_Resume(i8* undef)
+ to label %.noexc.i9.i.i unwind label %lpad.i19.i.i
+
+.noexc.i9.i.i: ; preds = %lpad.i.i.i.i8.i.i
+ unreachable
+
+_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i12.i.i: ; preds = %_ZNSt6vectorIjSaIjEED1Ev.exit.i.i
+ br i1 undef, label %bb50.i.i.i, label %bb.i.i.i.i.i.i.i.i.i.i
+
+bb.i.i.i.i.i.i.i.i.i.i: ; preds = %bb.i.i.i.i.i.i.i.i.i.i, %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i12.i.i
+ br i1 undef, label %bb50.i.i.i, label %bb.i.i.i.i.i.i.i.i.i.i
+
+bb50.i.i.i: ; preds = %bb.i.i.i.i.i.i.i.i.i.i, %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i12.i.i
+ invoke fastcc void @_ZN11FE_Q_Helper12_GLOBAL__N_116invert_numberingERKSt6vectorIjSaIjEE(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, %"struct.std::vector<int,std::allocator<int> >"* undef)
+ to label %bb83.i unwind label %lpad188.i
+
+lpad.i19.i.i: ; preds = %lpad.i.i.i.i8.i.i
+ unreachable
+
+bb83.i: ; preds = %bb50.i.i.i
+ br i1 undef, label %invcont84.i, label %bb.i.i.i221.i
+
+bb.i.i.i221.i: ; preds = %bb83.i
+ unreachable
+
+invcont84.i: ; preds = %bb83.i
+ %tmp11.i.i29.i.i.i.i.i = invoke i8* @_Znwm(i64 undef)
+ to label %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i unwind label %lpad.i.i.i.i315.i ; <i8*> [#uses=0]
+
+lpad.i.i.i.i315.i: ; preds = %invcont84.i
+ invoke void @_Unwind_Resume(i8* undef)
+ to label %.noexc.i316.i unwind label %lpad.i352.i
+
+.noexc.i316.i: ; preds = %lpad.i.i.i.i315.i
+ unreachable
+
+_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i: ; preds = %invcont84.i
+ br i1 undef, label %bb50.i.i, label %bb.i.i.i.i.i.i.i.i320.i
+
+bb.i.i.i.i.i.i.i.i320.i: ; preds = %bb.i.i.i.i.i.i.i.i320.i, %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i
+ br i1 undef, label %bb50.i.i, label %bb.i.i.i.i.i.i.i.i320.i
+
+bb50.i.i: ; preds = %bb.i.i.i.i.i.i.i.i320.i, %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i
+ invoke fastcc void @_ZN11FE_Q_Helper12_GLOBAL__N_116invert_numberingERKSt6vectorIjSaIjEE(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, %"struct.std::vector<int,std::allocator<int> >"* undef)
+ to label %invcont86.i unwind label %lpad200.i
+
+lpad.i352.i: ; preds = %lpad.i.i.i.i315.i
+ unreachable
+
+invcont86.i: ; preds = %bb50.i.i
+ invoke fastcc void @_ZNSt6vectorIjSaIjEEaSERKS1_(%"struct.std::vector<int,std::allocator<int> >"* undef, %"struct.std::vector<int,std::allocator<int> >"* undef)
+ to label %.noexc380.i unwind label %lpad204.i
+
+.noexc380.i: ; preds = %invcont86.i
+ br i1 undef, label %bb100.i, label %bb.i.i.i198.i
+
+bb.i.i.i198.i: ; preds = %.noexc380.i
+ unreachable
+
+bb100.i: ; preds = %.noexc380.i
+ br i1 undef, label %invcont101.i, label %bb.i.i.i190.i
+
+bb.i.i.i190.i: ; preds = %bb100.i
+ unreachable
+
+invcont101.i: ; preds = %bb100.i
+ invoke fastcc void @_ZN9TableBaseILi2EdE6reinitERK12TableIndicesILi2EE(%"struct.TableBase<2,double>"* undef, i32 undef, i32 undef)
+ to label %_ZN10FullMatrixIdEC1Ejj.exit.i.i unwind label %lpad.i.i.i.i.i
+
+lpad.i.i.i.i.i: ; preds = %invcont101.i
+ unreachable
+
+_ZN10FullMatrixIdEC1Ejj.exit.i.i: ; preds = %invcont101.i
+ invoke fastcc void @_ZN9TableBaseILi2EdE6reinitERK12TableIndicesILi2EE(%"struct.TableBase<2,double>"* undef, i32 undef, i32 undef)
+ to label %_ZN10FullMatrixIdEC1Ejj.exit28.i.i unwind label %lpad.i.i.i27.i.i
+
+lpad.i.i.i27.i.i: ; preds = %_ZN10FullMatrixIdEC1Ejj.exit.i.i
+ invoke void @_Unwind_Resume(i8* undef)
+ to label %.noexc.i.i unwind label %lpad.i.i
+
+.noexc.i.i: ; preds = %lpad.i.i.i27.i.i
+ unreachable
+
+_ZN10FullMatrixIdEC1Ejj.exit28.i.i: ; preds = %_ZN10FullMatrixIdEC1Ejj.exit.i.i
+ br i1 undef, label %bb58.i.i, label %bb.i.i.i304.i.i
+
+bb.i.i.i304.i.i: ; preds = %_ZN10FullMatrixIdEC1Ejj.exit28.i.i
+ unreachable
+
+bb58.i.i: ; preds = %_ZN10FullMatrixIdEC1Ejj.exit28.i.i
+ br i1 false, label %bb.i191.i, label %bb.i.i.i297.i.i
+
+bb.i.i.i297.i.i: ; preds = %bb58.i.i
+ unreachable
+
+lpad.i.i: ; preds = %lpad.i.i.i27.i.i
+ unreachable
+
+bb.i191.i: ; preds = %.noexc232.i, %bb58.i.i
+ invoke fastcc void @_ZN9TableBaseILi2EdE6reinitERK12TableIndicesILi2EE(%"struct.TableBase<2,double>"* undef, i32 undef, i32 undef)
+ to label %.noexc232.i unwind label %lpad196.i
+
+.noexc232.i: ; preds = %bb.i191.i
+ br i1 undef, label %bb29.loopexit.i.i, label %bb.i191.i
+
+bb7.i215.i: ; preds = %bb9.i216.i
+ br i1 undef, label %bb16.preheader.i.i, label %bb8.i.i
+
+bb8.i.i: ; preds = %bb7.i215.i
+ %tmp60.i.i = add i32 %0, 1 ; <i32> [#uses=1]
+ br label %bb9.i216.i
+
+bb9.i216.i: ; preds = %bb29.loopexit.i.i, %bb8.i.i
+ %0 = phi i32 [ 0, %bb29.loopexit.i.i ], [ %tmp60.i.i, %bb8.i.i ] ; <i32> [#uses=2]
+ br i1 undef, label %bb7.i215.i, label %bb16.preheader.i.i
+
+bb15.i.i: ; preds = %bb16.preheader.i.i, %bb15.i.i
+ %j1.0212.i.i = phi i32 [ %1, %bb15.i.i ], [ 0, %bb16.preheader.i.i ] ; <i32> [#uses=2]
+ %tmp6.i.i195.i.i = load i32* undef, align 4 ; <i32> [#uses=1]
+ %tmp231.i.i = mul i32 %0, %tmp6.i.i195.i.i ; <i32> [#uses=1]
+ %tmp13.i197.i.i = add i32 %j1.0212.i.i, %tmp231.i.i ; <i32> [#uses=0]
+ %1 = add i32 %j1.0212.i.i, 1 ; <i32> [#uses=1]
+ br i1 undef, label %bb15.i.i, label %bb17.i.i
+
+bb17.i.i: ; preds = %bb16.preheader.i.i, %bb15.i.i
+ br label %bb16.preheader.i.i
+
+bb16.preheader.i.i: ; preds = %bb17.i.i, %bb9.i216.i, %bb7.i215.i
+ br i1 undef, label %bb17.i.i, label %bb15.i.i
+
+bb29.loopexit.i.i: ; preds = %.noexc232.i
+ br label %bb9.i216.i
+
+lpad.i: ; preds = %entry
+ unreachable
+
+lpad120.i: ; preds = %invcont.i
+ unreachable
+
+lpad124.i: ; preds = %invcont1.i
+ unreachable
+
+lpad128.i: ; preds = %invcont3.i
+ unreachable
+
+lpad132.i: ; preds = %invcont4.i
+ unreachable
+
+lpad136.i: ; preds = %invcont6.i
+ unreachable
+
+lpad140.i: ; preds = %bb21.i, %invcont7.i
+ unreachable
+
+lpad144.i: ; preds = %bb10.i168.i, %invcont9.i
+ unreachable
+
+lpad148.i: ; preds = %invcont10.i
+ unreachable
+
+lpad188.i: ; preds = %bb50.i.i.i
+ unreachable
+
+lpad196.i: ; preds = %bb.i191.i
+ unreachable
+
+lpad200.i: ; preds = %bb50.i.i
+ unreachable
+
+lpad204.i: ; preds = %invcont86.i
+ unreachable
+}
+
+declare fastcc void @_ZN11Polynomials19LagrangeEquidistant23generate_complete_basisEj(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* noalias nocapture sret, i32)
diff --git a/test/CodeGen/X86/select-aggregate.ll b/test/CodeGen/X86/select-aggregate.ll
new file mode 100644
index 0000000..44cafe2
--- /dev/null
+++ b/test/CodeGen/X86/select-aggregate.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+; PR5757
+
+; CHECK: cmovneq %rdi, %rsi
+; CHECK: movl (%rsi), %eax
+
+%0 = type { i64, i32 }
+
+define i32 @foo(%0* %p, %0* %q, i1 %r) nounwind {
+ %t0 = load %0* %p
+ %t1 = load %0* %q
+ %t4 = select i1 %r, %0 %t0, %0 %t1
+ %t5 = extractvalue %0 %t4, 1
+ ret i32 %t5
+}
diff --git a/test/CodeGen/X86/select-zero-one.ll b/test/CodeGen/X86/select-zero-one.ll
new file mode 100644
index 0000000..c38a020
--- /dev/null
+++ b/test/CodeGen/X86/select-zero-one.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep cmov
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movzbl | count 1
+
+@r1 = weak global i32 0
+
+define void @t1(i32 %a, double %b) {
+ %tmp114 = fcmp ugt double %b, 1.000000e-09
+ %tmp120 = icmp eq i32 %a, 0 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp114, %tmp120 ; <i1> [#uses=1]
+ %storemerge = select i1 %bothcond, i32 0, i32 1 ; <i32> [#uses=2]
+ store i32 %storemerge, i32* @r1, align 4
+ ret void
+}
+
+@r2 = weak global i8 0
+
+define void @t2(i32 %a, double %b) {
+ %tmp114 = fcmp ugt double %b, 1.000000e-09
+ %tmp120 = icmp eq i32 %a, 0 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp114, %tmp120 ; <i1> [#uses=1]
+ %storemerge = select i1 %bothcond, i8 0, i8 1 ; <i32> [#uses=2]
+ store i8 %storemerge, i8* @r2, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll
new file mode 100644
index 0000000..95ed9e9
--- /dev/null
+++ b/test/CodeGen/X86/select.ll
@@ -0,0 +1,63 @@
+; RUN: llc < %s -march=x86 -mcpu=pentium
+; RUN: llc < %s -march=x86 -mcpu=yonah
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep set
+
+define i1 @boolSel(i1 %A, i1 %B, i1 %C) nounwind {
+ %X = select i1 %A, i1 %B, i1 %C ; <i1> [#uses=1]
+ ret i1 %X
+}
+
+define i8 @byteSel(i1 %A, i8 %B, i8 %C) nounwind {
+ %X = select i1 %A, i8 %B, i8 %C ; <i8> [#uses=1]
+ ret i8 %X
+}
+
+define i16 @shortSel(i1 %A, i16 %B, i16 %C) nounwind {
+ %X = select i1 %A, i16 %B, i16 %C ; <i16> [#uses=1]
+ ret i16 %X
+}
+
+define i32 @intSel(i1 %A, i32 %B, i32 %C) nounwind {
+ %X = select i1 %A, i32 %B, i32 %C ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i64 @longSel(i1 %A, i64 %B, i64 %C) nounwind {
+ %X = select i1 %A, i64 %B, i64 %C ; <i64> [#uses=1]
+ ret i64 %X
+}
+
+define double @doubleSel(i1 %A, double %B, double %C) nounwind {
+ %X = select i1 %A, double %B, double %C ; <double> [#uses=1]
+ ret double %X
+}
+
+define i8 @foldSel(i1 %A, i8 %B, i8 %C) nounwind {
+ %Cond = icmp slt i8 %B, %C ; <i1> [#uses=1]
+ %X = select i1 %Cond, i8 %B, i8 %C ; <i8> [#uses=1]
+ ret i8 %X
+}
+
+define i32 @foldSel2(i1 %A, i32 %B, i32 %C) nounwind {
+ %Cond = icmp eq i32 %B, %C ; <i1> [#uses=1]
+ %X = select i1 %Cond, i32 %B, i32 %C ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i32 @foldSel2a(i1 %A, i32 %B, i32 %C, double %X, double %Y) nounwind {
+ %Cond = fcmp olt double %X, %Y ; <i1> [#uses=1]
+ %X.upgrd.1 = select i1 %Cond, i32 %B, i32 %C ; <i32> [#uses=1]
+ ret i32 %X.upgrd.1
+}
+
+define float @foldSel3(i1 %A, float %B, float %C, i32 %X, i32 %Y) nounwind {
+ %Cond = icmp ult i32 %X, %Y ; <i1> [#uses=1]
+ %X.upgrd.2 = select i1 %Cond, float %B, float %C ; <float> [#uses=1]
+ ret float %X.upgrd.2
+}
+
+define float @nofoldSel4(i1 %A, float %B, float %C, i32 %X, i32 %Y) nounwind {
+ %Cond = icmp slt i32 %X, %Y ; <i1> [#uses=1]
+ %X.upgrd.3 = select i1 %Cond, float %B, float %C ; <float> [#uses=1]
+ ret float %X.upgrd.3
+}
diff --git a/test/CodeGen/X86/setcc.ll b/test/CodeGen/X86/setcc.ll
new file mode 100644
index 0000000..c37e15d
--- /dev/null
+++ b/test/CodeGen/X86/setcc.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; rdar://7329206
+
+; Use sbb x, x to materialize carry bit in a GPR. The value is either
+; all 1's or all 0's.
+
+define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
+entry:
+; CHECK: t1:
+; CHECK: seta %al
+; CHECK: movzbl %al, %eax
+; CHECK: shll $5, %eax
+ %0 = icmp ugt i16 %x, 26 ; <i1> [#uses=1]
+ %iftmp.1.0 = select i1 %0, i16 32, i16 0 ; <i16> [#uses=1]
+ ret i16 %iftmp.1.0
+}
+
+define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
+entry:
+; CHECK: t2:
+; CHECK: sbbl %eax, %eax
+; CHECK: andl $32, %eax
+ %0 = icmp ult i16 %x, 26 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %0, i16 32, i16 0 ; <i16> [#uses=1]
+ ret i16 %iftmp.0.0
+}
+
+define i64 @t3(i64 %x) nounwind readnone ssp {
+entry:
+; CHECK: t3:
+; CHECK: sbbq %rax, %rax
+; CHECK: andq $64, %rax
+ %0 = icmp ult i64 %x, 18 ; <i1> [#uses=1]
+ %iftmp.2.0 = select i1 %0, i64 64, i64 0 ; <i64> [#uses=1]
+ ret i64 %iftmp.2.0
+}
diff --git a/test/CodeGen/X86/setoeq.ll b/test/CodeGen/X86/setoeq.ll
new file mode 100644
index 0000000..4a9c1ba
--- /dev/null
+++ b/test/CodeGen/X86/setoeq.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 | grep set | count 2
+; RUN: llc < %s -march=x86 | grep and
+
+define zeroext i8 @t(double %x) nounwind readnone {
+entry:
+ %0 = fptosi double %x to i32 ; <i32> [#uses=1]
+ %1 = sitofp i32 %0 to double ; <double> [#uses=1]
+ %2 = fcmp oeq double %1, %x ; <i1> [#uses=1]
+ %retval12 = zext i1 %2 to i8 ; <i8> [#uses=1]
+ ret i8 %retval12
+}
diff --git a/test/CodeGen/X86/setuge.ll b/test/CodeGen/X86/setuge.ll
new file mode 100644
index 0000000..4ca2f18
--- /dev/null
+++ b/test/CodeGen/X86/setuge.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 | not grep set
+
+declare i1 @llvm.isunordered.f32(float, float)
+
+define float @cmp(float %A, float %B, float %C, float %D) nounwind {
+entry:
+ %tmp.1 = fcmp uno float %A, %B ; <i1> [#uses=1]
+ %tmp.2 = fcmp oge float %A, %B ; <i1> [#uses=1]
+ %tmp.3 = or i1 %tmp.1, %tmp.2 ; <i1> [#uses=1]
+ %tmp.4 = select i1 %tmp.3, float %C, float %D ; <float> [#uses=1]
+ ret float %tmp.4
+}
+
diff --git a/test/CodeGen/X86/sext-i1.ll b/test/CodeGen/X86/sext-i1.ll
new file mode 100644
index 0000000..21c418d
--- /dev/null
+++ b/test/CodeGen/X86/sext-i1.ll
@@ -0,0 +1,63 @@
+; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=32
+; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=64
+; rdar://7573216
+; PR6146
+
+define i32 @t1(i32 %x) nounwind readnone ssp {
+entry:
+; 32: t1:
+; 32: cmpl $1
+; 32: sbbl
+
+; 64: t1:
+; 64: cmpl $1
+; 64: sbbl
+ %0 = icmp eq i32 %x, 0
+ %iftmp.0.0 = select i1 %0, i32 -1, i32 0
+ ret i32 %iftmp.0.0
+}
+
+define i32 @t2(i32 %x) nounwind readnone ssp {
+entry:
+; 32: t2:
+; 32: cmpl $1
+; 32: sbbl
+
+; 64: t2:
+; 64: cmpl $1
+; 64: sbbl
+ %0 = icmp eq i32 %x, 0
+ %iftmp.0.0 = sext i1 %0 to i32
+ ret i32 %iftmp.0.0
+}
+
+%struct.zbookmark = type { i64, i64 }
+%struct.zstream = type { }
+
+define i32 @t3() nounwind readonly {
+entry:
+; 32: t3:
+; 32: cmpl $1
+; 32: sbbl
+; 32: cmpl
+; 32: xorl
+
+; 64: t3:
+; 64: cmpl $1
+; 64: sbbq
+; 64: cmpq
+; 64: xorl
+ %not.tobool = icmp eq i32 undef, 0 ; <i1> [#uses=2]
+ %cond = sext i1 %not.tobool to i32 ; <i32> [#uses=1]
+ %conv = sext i1 %not.tobool to i64 ; <i64> [#uses=1]
+ %add13 = add i64 0, %conv ; <i64> [#uses=1]
+ %cmp = icmp ult i64 undef, %add13 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ %xor27 = xor i32 undef, %cond ; <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/sext-load.ll b/test/CodeGen/X86/sext-load.ll
new file mode 100644
index 0000000..c9b39d3
--- /dev/null
+++ b/test/CodeGen/X86/sext-load.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | grep movsbl
+
+define i32 @foo(i32 %X) nounwind {
+entry:
+ %tmp12 = trunc i32 %X to i8 ; <i8> [#uses=1]
+ %tmp123 = sext i8 %tmp12 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp123
+}
+
diff --git a/test/CodeGen/X86/sext-ret-val.ll b/test/CodeGen/X86/sext-ret-val.ll
new file mode 100644
index 0000000..da1a1871
--- /dev/null
+++ b/test/CodeGen/X86/sext-ret-val.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 | grep movzbl | count 1
+; rdar://6699246
+
+define signext i8 @t1(i8* %A) nounwind readnone ssp {
+entry:
+ %0 = icmp ne i8* %A, null
+ %1 = zext i1 %0 to i8
+ ret i8 %1
+}
+
+define i8 @t2(i8* %A) nounwind readnone ssp {
+entry:
+ %0 = icmp ne i8* %A, null
+ %1 = zext i1 %0 to i8
+ ret i8 %1
+}
diff --git a/test/CodeGen/X86/sext-select.ll b/test/CodeGen/X86/sext-select.ll
new file mode 100644
index 0000000..4aca040
--- /dev/null
+++ b/test/CodeGen/X86/sext-select.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 | grep movsw
+; PR2139
+
+declare void @abort()
+
+define i32 @main() {
+entry:
+ %tmp73 = tail call i1 @return_false() ; <i8> [#uses=1]
+ %g.0 = select i1 %tmp73, i16 0, i16 -480 ; <i16> [#uses=2]
+ %tmp7778 = sext i16 %g.0 to i32 ; <i32> [#uses=1]
+ %tmp80 = shl i32 %tmp7778, 3 ; <i32> [#uses=2]
+ %tmp87 = icmp sgt i32 %tmp80, 32767 ; <i1> [#uses=1]
+ br i1 %tmp87, label %bb90, label %bb91
+bb90: ; preds = %bb84, %bb72
+ tail call void @abort()
+ unreachable
+bb91: ; preds = %bb84
+ ret i32 0
+}
+
+define i1 @return_false() {
+ ret i1 0
+}
diff --git a/test/CodeGen/X86/sext-subreg.ll b/test/CodeGen/X86/sext-subreg.ll
new file mode 100644
index 0000000..b2b9f81
--- /dev/null
+++ b/test/CodeGen/X86/sext-subreg.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+; rdar://7529457
+
+define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
+; CHECK: t:
+; CHECK: movslq %e{{.*}}, %rax
+; CHECK: movq %rax
+; CHECK: movl %eax
+ %C = add i64 %A, %B
+ %D = trunc i64 %C to i32
+ volatile store i32 %D, i32* %P
+ %E = shl i64 %C, 32
+ %F = ashr i64 %E, 32
+ volatile store i64 %F, i64 *%P2
+ volatile store i32 %D, i32* %P
+ ret i64 undef
+}
diff --git a/test/CodeGen/X86/sext-trunc.ll b/test/CodeGen/X86/sext-trunc.ll
new file mode 100644
index 0000000..2eaf425
--- /dev/null
+++ b/test/CodeGen/X86/sext-trunc.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep movsbl %t
+; RUN: not grep movz %t
+; RUN: not grep and %t
+
+define i8 @foo(i16 signext %x) signext nounwind {
+ %retval56 = trunc i16 %x to i8
+ ret i8 %retval56
+}
diff --git a/test/CodeGen/X86/sfence.ll b/test/CodeGen/X86/sfence.ll
new file mode 100644
index 0000000..4782879
--- /dev/null
+++ b/test/CodeGen/X86/sfence.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep sfence
+
+declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
+
+define void @test() {
+ call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 true)
+ ret void
+}
diff --git a/test/CodeGen/X86/shift-and.ll b/test/CodeGen/X86/shift-and.ll
new file mode 100644
index 0000000..fd278c2
--- /dev/null
+++ b/test/CodeGen/X86/shift-and.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 | grep and | count 1
+; RUN: llc < %s -march=x86-64 | not grep and
+
+define i32 @t1(i32 %t, i32 %val) nounwind {
+ %shamt = and i32 %t, 31
+ %res = shl i32 %val, %shamt
+ ret i32 %res
+}
+
+@X = internal global i16 0
+
+define void @t2(i16 %t) nounwind {
+ %shamt = and i16 %t, 31
+ %tmp = load i16* @X
+ %tmp1 = ashr i16 %tmp, %shamt
+ store i16 %tmp1, i16* @X
+ ret void
+}
+
+define i64 @t3(i64 %t, i64 %val) nounwind {
+ %shamt = and i64 %t, 63
+ %res = lshr i64 %val, %shamt
+ ret i64 %res
+}
diff --git a/test/CodeGen/X86/shift-coalesce.ll b/test/CodeGen/X86/shift-coalesce.ll
new file mode 100644
index 0000000..d38f9a8
--- /dev/null
+++ b/test/CodeGen/X86/shift-coalesce.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep {shld.*CL}
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: not grep {mov CL, BL}
+
+; PR687
+
+define i64 @foo(i64 %x, i64* %X) {
+ %tmp.1 = load i64* %X ; <i64> [#uses=1]
+ %tmp.3 = trunc i64 %tmp.1 to i8 ; <i8> [#uses=1]
+ %shift.upgrd.1 = zext i8 %tmp.3 to i64 ; <i64> [#uses=1]
+ %tmp.4 = shl i64 %x, %shift.upgrd.1 ; <i64> [#uses=1]
+ ret i64 %tmp.4
+}
+
diff --git a/test/CodeGen/X86/shift-codegen.ll b/test/CodeGen/X86/shift-codegen.ll
new file mode 100644
index 0000000..4cba183
--- /dev/null
+++ b/test/CodeGen/X86/shift-codegen.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -relocation-model=static -march=x86 | \
+; RUN: grep {shll \$3} | count 2
+
+; This should produce two shll instructions, not any lea's.
+
+target triple = "i686-apple-darwin8"
+@Y = weak global i32 0 ; <i32*> [#uses=1]
+@X = weak global i32 0 ; <i32*> [#uses=2]
+
+
+define void @fn1() {
+entry:
+ %tmp = load i32* @Y ; <i32> [#uses=1]
+ %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1]
+ %tmp2 = load i32* @X ; <i32> [#uses=1]
+ %tmp3 = or i32 %tmp1, %tmp2 ; <i32> [#uses=1]
+ store i32 %tmp3, i32* @X
+ ret void
+}
+
+define i32 @fn2(i32 %X, i32 %Y) {
+entry:
+ %tmp2 = shl i32 %Y, 3 ; <i32> [#uses=1]
+ %tmp4 = or i32 %tmp2, %X ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
diff --git a/test/CodeGen/X86/shift-combine.ll b/test/CodeGen/X86/shift-combine.ll
new file mode 100644
index 0000000..e443ac1
--- /dev/null
+++ b/test/CodeGen/X86/shift-combine.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s | not grep shrl
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+@array = weak global [4 x i32] zeroinitializer ; <[4 x i32]*> [#uses=1]
+
+define i32 @foo(i32 %x) {
+entry:
+ %tmp2 = lshr i32 %x, 2 ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp2, 3 ; <i32> [#uses=1]
+ %tmp4 = getelementptr [4 x i32]* @array, i32 0, i32 %tmp3 ; <i32*> [#uses=1]
+ %tmp5 = load i32* %tmp4, align 4 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
diff --git a/test/CodeGen/X86/shift-double.ll b/test/CodeGen/X86/shift-double.ll
new file mode 100644
index 0000000..5adee7c
--- /dev/null
+++ b/test/CodeGen/X86/shift-double.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep {sh\[lr\]d} | count 5
+
+define i64 @test1(i64 %X, i8 %C) {
+ %shift.upgrd.1 = zext i8 %C to i64 ; <i64> [#uses=1]
+ %Y = shl i64 %X, %shift.upgrd.1 ; <i64> [#uses=1]
+ ret i64 %Y
+}
+
+define i64 @test2(i64 %X, i8 %C) {
+ %shift.upgrd.2 = zext i8 %C to i64 ; <i64> [#uses=1]
+ %Y = ashr i64 %X, %shift.upgrd.2 ; <i64> [#uses=1]
+ ret i64 %Y
+}
+
+define i64 @test3(i64 %X, i8 %C) {
+ %shift.upgrd.3 = zext i8 %C to i64 ; <i64> [#uses=1]
+ %Y = lshr i64 %X, %shift.upgrd.3 ; <i64> [#uses=1]
+ ret i64 %Y
+}
+
+define i32 @test4(i32 %A, i32 %B, i8 %C) {
+ %shift.upgrd.4 = zext i8 %C to i32 ; <i32> [#uses=1]
+ %X = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
+ %Cv = sub i8 32, %C ; <i8> [#uses=1]
+ %shift.upgrd.5 = zext i8 %Cv to i32 ; <i32> [#uses=1]
+ %Y = lshr i32 %B, %shift.upgrd.5 ; <i32> [#uses=1]
+ %Z = or i32 %Y, %X ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i16 @test5(i16 %A, i16 %B, i8 %C) {
+ %shift.upgrd.6 = zext i8 %C to i16 ; <i16> [#uses=1]
+ %X = shl i16 %A, %shift.upgrd.6 ; <i16> [#uses=1]
+ %Cv = sub i8 16, %C ; <i8> [#uses=1]
+ %shift.upgrd.7 = zext i8 %Cv to i16 ; <i16> [#uses=1]
+ %Y = lshr i16 %B, %shift.upgrd.7 ; <i16> [#uses=1]
+ %Z = or i16 %Y, %X ; <i16> [#uses=1]
+ ret i16 %Z
+}
+
diff --git a/test/CodeGen/X86/shift-folding.ll b/test/CodeGen/X86/shift-folding.ll
new file mode 100644
index 0000000..872817f
--- /dev/null
+++ b/test/CodeGen/X86/shift-folding.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 | \
+; RUN: grep {s\[ah\]\[rl\]l} | count 1
+
+define i32* @test1(i32* %P, i32 %X) {
+ %Y = lshr i32 %X, 2 ; <i32> [#uses=1]
+ %gep.upgrd.1 = zext i32 %Y to i64 ; <i64> [#uses=1]
+ %P2 = getelementptr i32* %P, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ ret i32* %P2
+}
+
+define i32* @test2(i32* %P, i32 %X) {
+ %Y = shl i32 %X, 2 ; <i32> [#uses=1]
+ %gep.upgrd.2 = zext i32 %Y to i64 ; <i64> [#uses=1]
+ %P2 = getelementptr i32* %P, i64 %gep.upgrd.2 ; <i32*> [#uses=1]
+ ret i32* %P2
+}
+
+define i32* @test3(i32* %P, i32 %X) {
+ %Y = ashr i32 %X, 2 ; <i32> [#uses=1]
+ %P2 = getelementptr i32* %P, i32 %Y ; <i32*> [#uses=1]
+ ret i32* %P2
+}
+
diff --git a/test/CodeGen/X86/shift-i128.ll b/test/CodeGen/X86/shift-i128.ll
new file mode 100644
index 0000000..c4d15ae
--- /dev/null
+++ b/test/CodeGen/X86/shift-i128.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
+
+define void @t(i128 %x, i128 %a, i128* nocapture %r) nounwind {
+entry:
+ %0 = lshr i128 %x, %a
+ store i128 %0, i128* %r, align 16
+ ret void
+}
diff --git a/test/CodeGen/X86/shift-i256.ll b/test/CodeGen/X86/shift-i256.ll
new file mode 100644
index 0000000..d5f65a6
--- /dev/null
+++ b/test/CodeGen/X86/shift-i256.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
+
+define void @t(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone {
+entry:
+ %0 = ashr i256 %x, %a
+ store i256 %0, i256* %r
+ ret void
+}
diff --git a/test/CodeGen/X86/shift-one.ll b/test/CodeGen/X86/shift-one.ll
new file mode 100644
index 0000000..0f80f90
--- /dev/null
+++ b/test/CodeGen/X86/shift-one.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 | not grep leal
+
+@x = external global i32 ; <i32*> [#uses=1]
+
+define i32 @test() {
+ %tmp.0 = load i32* @x ; <i32> [#uses=1]
+ %tmp.1 = shl i32 %tmp.0, 1 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
diff --git a/test/CodeGen/X86/shift-parts.ll b/test/CodeGen/X86/shift-parts.ll
new file mode 100644
index 0000000..ce4f538
--- /dev/null
+++ b/test/CodeGen/X86/shift-parts.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86-64 | grep shrdq
+; PR4736
+
+%0 = type { i32, i8, [35 x i8] }
+
+@g_144 = external global %0, align 8 ; <%0*> [#uses=1]
+
+define i32 @int87(i32 %uint64p_8) nounwind {
+entry:
+ %srcval4 = load i320* bitcast (%0* @g_144 to i320*), align 8 ; <i320> [#uses=1]
+ br label %for.cond
+
+for.cond: ; preds = %for.cond, %entry
+ %call3.in.in.in.v = select i1 undef, i320 192, i320 128 ; <i320> [#uses=1]
+ %call3.in.in.in = lshr i320 %srcval4, %call3.in.in.in.v ; <i320> [#uses=1]
+ %call3.in = trunc i320 %call3.in.in.in to i32 ; <i32> [#uses=1]
+ %tobool = icmp eq i32 %call3.in, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %for.cond, label %if.then
+
+if.then: ; preds = %for.cond
+ ret i32 1
+}
diff --git a/test/CodeGen/X86/shl_elim.ll b/test/CodeGen/X86/shl_elim.ll
new file mode 100644
index 0000000..4458891
--- /dev/null
+++ b/test/CodeGen/X86/shl_elim.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 | grep {movl 8(.esp), %eax}
+; RUN: llc < %s -march=x86 | grep {shrl .eax}
+; RUN: llc < %s -march=x86 | grep {movswl .ax, .eax}
+
+define i32 @test1(i64 %a) {
+ %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1]
+ %tmp23 = trunc i64 %tmp29 to i32 ; <i32> [#uses=1]
+ %tmp410 = lshr i32 %tmp23, 9 ; <i32> [#uses=1]
+ %tmp45 = trunc i32 %tmp410 to i16 ; <i16> [#uses=1]
+ %tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp456
+}
+
diff --git a/test/CodeGen/X86/shrink-fp-const1.ll b/test/CodeGen/X86/shrink-fp-const1.ll
new file mode 100644
index 0000000..49b9fa3
--- /dev/null
+++ b/test/CodeGen/X86/shrink-fp-const1.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | not grep cvtss2sd
+; PR1264
+
+define double @foo(double %x) {
+ %y = fmul double %x, 5.000000e-01
+ ret double %y
+}
diff --git a/test/CodeGen/X86/shrink-fp-const2.ll b/test/CodeGen/X86/shrink-fp-const2.ll
new file mode 100644
index 0000000..3d5203b
--- /dev/null
+++ b/test/CodeGen/X86/shrink-fp-const2.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 | grep flds
+; This should be a flds, not fldt.
+define x86_fp80 @test2() nounwind {
+entry:
+ ret x86_fp80 0xK3FFFC000000000000000
+}
+
diff --git a/test/CodeGen/X86/sincos.ll b/test/CodeGen/X86/sincos.ll
new file mode 100644
index 0000000..13f9329
--- /dev/null
+++ b/test/CodeGen/X86/sincos.ll
@@ -0,0 +1,48 @@
+; Make sure this testcase codegens to the sin and cos instructions, not calls
+; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \
+; RUN: grep sin\$ | count 3
+; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \
+; RUN: grep cos\$ | count 3
+
+declare float @sinf(float) readonly
+
+declare double @sin(double) readonly
+
+declare x86_fp80 @sinl(x86_fp80) readonly
+
+define float @test1(float %X) {
+ %Y = call float @sinf(float %X) readonly
+ ret float %Y
+}
+
+define double @test2(double %X) {
+ %Y = call double @sin(double %X) readonly
+ ret double %Y
+}
+
+define x86_fp80 @test3(x86_fp80 %X) {
+ %Y = call x86_fp80 @sinl(x86_fp80 %X) readonly
+ ret x86_fp80 %Y
+}
+
+declare float @cosf(float) readonly
+
+declare double @cos(double) readonly
+
+declare x86_fp80 @cosl(x86_fp80) readonly
+
+define float @test4(float %X) {
+ %Y = call float @cosf(float %X) readonly
+ ret float %Y
+}
+
+define double @test5(double %X) {
+ %Y = call double @cos(double %X) readonly
+ ret double %Y
+}
+
+define x86_fp80 @test6(x86_fp80 %X) {
+ %Y = call x86_fp80 @cosl(x86_fp80 %X) readonly
+ ret x86_fp80 %Y
+}
+
diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll
new file mode 100644
index 0000000..01d7373
--- /dev/null
+++ b/test/CodeGen/X86/sink-hoist.ll
@@ -0,0 +1,148 @@
+; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -post-RA-scheduler=true | FileCheck %s
+
+; Currently, floating-point selects are lowered to CFG triangles.
+; This means that one side of the select is always unconditionally
+; evaluated, however with MachineSink we can sink the other side so
+; that it's conditionally evaluated.
+
+; CHECK: foo:
+; CHECK: divsd
+; CHECK-NEXT: testb $1, %dil
+; CHECK-NEXT: jne
+; CHECK-NEXT: divsd
+
+define double @foo(double %x, double %y, i1 %c) nounwind {
+ %a = fdiv double %x, 3.2
+ %b = fdiv double %y, 3.3
+ %z = select i1 %c, double %a, double %b
+ ret double %z
+}
+
+; Hoist floating-point constant-pool loads out of loops.
+
+; CHECK: bar:
+; CHECK: movsd
+; CHECK: align
+define void @bar(double* nocapture %p, i64 %n) nounwind {
+entry:
+ %0 = icmp sgt i64 %n, 0
+ br i1 %0, label %bb, label %return
+
+bb:
+ %i.03 = phi i64 [ 0, %entry ], [ %3, %bb ]
+ %scevgep = getelementptr double* %p, i64 %i.03
+ %1 = load double* %scevgep, align 8
+ %2 = fdiv double 3.200000e+00, %1
+ store double %2, double* %scevgep, align 8
+ %3 = add nsw i64 %i.03, 1
+ %exitcond = icmp eq i64 %3, %n
+ br i1 %exitcond, label %return, label %bb
+
+return:
+ ret void
+}
+
+; Sink instructions with dead EFLAGS defs.
+
+; CHECK: zzz:
+; CHECK: je
+; CHECK-NEXT: orb
+
+define zeroext i8 @zzz(i8 zeroext %a, i8 zeroext %b) nounwind readnone {
+entry:
+ %tmp = zext i8 %a to i32 ; <i32> [#uses=1]
+ %tmp2 = icmp eq i8 %a, 0 ; <i1> [#uses=1]
+ %tmp3 = or i8 %b, -128 ; <i8> [#uses=1]
+ %tmp4 = and i8 %b, 127 ; <i8> [#uses=1]
+ %b_addr.0 = select i1 %tmp2, i8 %tmp4, i8 %tmp3 ; <i8> [#uses=1]
+ ret i8 %b_addr.0
+}
+
+; Codegen should hoist and CSE these constants.
+
+; CHECK: vv:
+; CHECK: LCPI4_0(%rip), %xmm0
+; CHECK: LCPI4_1(%rip), %xmm1
+; CHECK: LCPI4_2(%rip), %xmm2
+; CHECK: align
+; CHECK-NOT: LCPI
+; CHECK: ret
+
+@_minusZero.6007 = internal constant <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00> ; <<4 x float>*> [#uses=0]
[email protected] = internal constant <4 x float> <float 8.388608e+06, float 8.388608e+06, float 8.388608e+06, float 8.388608e+06> ; <<4 x float>*> [#uses=0]
+
+define void @vv(float* %y, float* %x, i32* %n) nounwind ssp {
+entry:
+ br label %bb60
+
+bb: ; preds = %bb60
+ %0 = bitcast float* %x_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ %1 = load <4 x float>* %0, align 16 ; <<4 x float>> [#uses=4]
+ %tmp20 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp22 = and <4 x i32> %tmp20, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647> ; <<4 x i32>> [#uses=1]
+ %tmp23 = bitcast <4 x i32> %tmp22 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp25 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp27 = and <4 x i32> %tmp25, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648> ; <<4 x i32>> [#uses=2]
+ %tmp30 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %tmp23, <4 x float> <float 8.388608e+06, float 8.388608e+06, float 8.388608e+06, float 8.388608e+06>, i8 5) ; <<4 x float>> [#uses=1]
+ %tmp34 = bitcast <4 x float> %tmp30 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp36 = xor <4 x i32> %tmp34, <i32 -1, i32 -1, i32 -1, i32 -1> ; <<4 x i32>> [#uses=1]
+ %tmp37 = and <4 x i32> %tmp36, <i32 1258291200, i32 1258291200, i32 1258291200, i32 1258291200> ; <<4 x i32>> [#uses=1]
+ %tmp42 = or <4 x i32> %tmp37, %tmp27 ; <<4 x i32>> [#uses=1]
+ %tmp43 = bitcast <4 x i32> %tmp42 to <4 x float> ; <<4 x float>> [#uses=2]
+ %tmp45 = fadd <4 x float> %1, %tmp43 ; <<4 x float>> [#uses=1]
+ %tmp47 = fsub <4 x float> %tmp45, %tmp43 ; <<4 x float>> [#uses=2]
+ %tmp49 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %1, <4 x float> %tmp47, i8 1) ; <<4 x float>> [#uses=1]
+ %2 = bitcast <4 x float> %tmp49 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %3 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %2) nounwind readnone ; <<4 x float>> [#uses=1]
+ %tmp53 = fadd <4 x float> %tmp47, %3 ; <<4 x float>> [#uses=1]
+ %tmp55 = bitcast <4 x float> %tmp53 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp57 = or <4 x i32> %tmp55, %tmp27 ; <<4 x i32>> [#uses=1]
+ %tmp58 = bitcast <4 x i32> %tmp57 to <4 x float> ; <<4 x float>> [#uses=1]
+ %4 = bitcast float* %y_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ store <4 x float> %tmp58, <4 x float>* %4, align 16
+ %5 = getelementptr float* %x_addr.0, i64 4 ; <float*> [#uses=1]
+ %6 = getelementptr float* %y_addr.0, i64 4 ; <float*> [#uses=1]
+ %7 = add i32 %i.0, 4 ; <i32> [#uses=1]
+ br label %bb60
+
+bb60: ; preds = %bb, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %7, %bb ] ; <i32> [#uses=2]
+ %x_addr.0 = phi float* [ %x, %entry ], [ %5, %bb ] ; <float*> [#uses=2]
+ %y_addr.0 = phi float* [ %y, %entry ], [ %6, %bb ] ; <float*> [#uses=2]
+ %8 = load i32* %n, align 4 ; <i32> [#uses=1]
+ %9 = icmp sgt i32 %8, %i.0 ; <i1> [#uses=1]
+ br i1 %9, label %bb, label %return
+
+return: ; preds = %bb60
+ ret void
+}
+
+declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
+
+; CodeGen should use the correct register class when extracting
+; a load from a zero-extending load for hoisting.
+
+; CHECK: default_get_pch_validity:
+; CHECK: movl cl_options_count(%rip), %ecx
+
+@cl_options_count = external constant i32 ; <i32*> [#uses=2]
+
+define void @default_get_pch_validity() nounwind {
+entry:
+ %tmp4 = load i32* @cl_options_count, align 4 ; <i32> [#uses=1]
+ %tmp5 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1]
+ br i1 %tmp5, label %bb6, label %bb2
+
+bb2: ; preds = %bb2, %entry
+ %i.019 = phi i64 [ 0, %entry ], [ %tmp25, %bb2 ] ; <i64> [#uses=1]
+ %tmp25 = add i64 %i.019, 1 ; <i64> [#uses=2]
+ %tmp11 = load i32* @cl_options_count, align 4 ; <i32> [#uses=1]
+ %tmp12 = zext i32 %tmp11 to i64 ; <i64> [#uses=1]
+ %tmp13 = icmp ugt i64 %tmp12, %tmp25 ; <i1> [#uses=1]
+ br i1 %tmp13, label %bb2, label %bb6
+
+bb6: ; preds = %bb2, %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/small-byval-memcpy.ll b/test/CodeGen/X86/small-byval-memcpy.ll
new file mode 100644
index 0000000..9ec9182e
--- /dev/null
+++ b/test/CodeGen/X86/small-byval-memcpy.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s | not grep movs
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 }* byval align 4 %z) nounwind {
+entry:
+ %iz = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=3]
+ %tmp1 = getelementptr { x86_fp80, x86_fp80 }* %z, i32 0, i32 1 ; <x86_fp80*> [#uses=1]
+ %tmp2 = load x86_fp80* %tmp1, align 16 ; <x86_fp80> [#uses=1]
+ %tmp3 = fsub x86_fp80 0xK80000000000000000000, %tmp2 ; <x86_fp80> [#uses=1]
+ %tmp4 = getelementptr { x86_fp80, x86_fp80 }* %iz, i32 0, i32 1 ; <x86_fp80*> [#uses=1]
+ %real = getelementptr { x86_fp80, x86_fp80 }* %iz, i32 0, i32 0 ; <x86_fp80*> [#uses=1]
+ %tmp6 = getelementptr { x86_fp80, x86_fp80 }* %z, i32 0, i32 0 ; <x86_fp80*> [#uses=1]
+ %tmp7 = load x86_fp80* %tmp6, align 16 ; <x86_fp80> [#uses=1]
+ store x86_fp80 %tmp3, x86_fp80* %real, align 16
+ store x86_fp80 %tmp7, x86_fp80* %tmp4, align 16
+ call void @ccoshl( { x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 }* byval align 4 %iz ) nounwind
+ ret void
+}
+
+declare void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret , { x86_fp80, x86_fp80 }* byval align 4 ) nounwind
diff --git a/test/CodeGen/X86/smul-with-overflow-2.ll b/test/CodeGen/X86/smul-with-overflow-2.ll
new file mode 100644
index 0000000..7c23adb
--- /dev/null
+++ b/test/CodeGen/X86/smul-with-overflow-2.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 | grep mul | count 1
+; RUN: llc < %s -march=x86 | grep add | count 3
+
+define i32 @t1(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %tmp0 = add i32 %b, %a
+ %tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 2)
+ %tmp2 = extractvalue { i32, i1 } %tmp1, 0
+ ret i32 %tmp2
+}
+
+define i32 @t2(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %tmp0 = add i32 %b, %a
+ %tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 4)
+ %tmp2 = extractvalue { i32, i1 } %tmp1, 0
+ ret i32 %tmp2
+}
+
+declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) nounwind
diff --git a/test/CodeGen/X86/smul-with-overflow-3.ll b/test/CodeGen/X86/smul-with-overflow-3.ll
new file mode 100644
index 0000000..49c31f5
--- /dev/null
+++ b/test/CodeGen/X86/smul-with-overflow-3.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 | grep {jno} | count 1
+
+@ok = internal constant [4 x i8] c"%d\0A\00"
+@no = internal constant [4 x i8] c"no\0A\00"
+
+define i1 @func1(i32 %v1, i32 %v2) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %overflow, label %normal
+
+overflow:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ ret i1 true
+}
+
+declare i32 @printf(i8*, ...) nounwind
+declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
diff --git a/test/CodeGen/X86/smul-with-overflow.ll b/test/CodeGen/X86/smul-with-overflow.ll
new file mode 100644
index 0000000..6d125e4
--- /dev/null
+++ b/test/CodeGen/X86/smul-with-overflow.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 | grep {jo} | count 1
+
+@ok = internal constant [4 x i8] c"%d\0A\00"
+@no = internal constant [4 x i8] c"no\0A\00"
+
+define i1 @func1(i32 %v1, i32 %v2) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %overflow, label %normal
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ ret i1 true
+
+overflow:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+}
+
+declare i32 @printf(i8*, ...) nounwind
+declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
diff --git a/test/CodeGen/X86/soft-fp.ll b/test/CodeGen/X86/soft-fp.ll
new file mode 100644
index 0000000..a52135d
--- /dev/null
+++ b/test/CodeGen/X86/soft-fp.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -soft-float | not grep xmm
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 -soft-float | not grep xmm
+
+ %struct.__va_list_tag = type { i32, i32, i8*, i8* }
+
+define i32 @t1(i32 %a, ...) nounwind {
+entry:
+ %va = alloca [1 x %struct.__va_list_tag], align 8 ; <[1 x %struct.__va_list_tag]*> [#uses=2]
+ %va12 = bitcast [1 x %struct.__va_list_tag]* %va to i8* ; <i8*> [#uses=2]
+ call void @llvm.va_start(i8* %va12)
+ %va3 = getelementptr [1 x %struct.__va_list_tag]* %va, i64 0, i64 0 ; <%struct.__va_list_tag*> [#uses=1]
+ call void @bar(%struct.__va_list_tag* %va3) nounwind
+ call void @llvm.va_end(i8* %va12)
+ ret i32 undef
+}
+
+declare void @llvm.va_start(i8*) nounwind
+
+declare void @bar(%struct.__va_list_tag*)
+
+declare void @llvm.va_end(i8*) nounwind
+
+define float @t2(float %a, float %b) nounwind readnone {
+entry:
+ %0 = fadd float %a, %b ; <float> [#uses=1]
+ ret float %0
+}
diff --git a/test/CodeGen/X86/splat-scalar-load.ll b/test/CodeGen/X86/splat-scalar-load.ll
new file mode 100644
index 0000000..2b13029
--- /dev/null
+++ b/test/CodeGen/X86/splat-scalar-load.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 | FileCheck %s
+; rdar://7434544
+
+define <2 x i64> @t2() nounwind ssp {
+entry:
+; CHECK: t2:
+; CHECK: pshufd $85, (%esp), %xmm0
+ %array = alloca [8 x float], align 4
+ %arrayidx = getelementptr inbounds [8 x float]* %array, i32 0, i32 1
+ %tmp2 = load float* %arrayidx
+ %vecinit = insertelement <4 x float> undef, float %tmp2, i32 0
+ %vecinit5 = insertelement <4 x float> %vecinit, float %tmp2, i32 1
+ %vecinit7 = insertelement <4 x float> %vecinit5, float %tmp2, i32 2
+ %vecinit9 = insertelement <4 x float> %vecinit7, float %tmp2, i32 3
+ %0 = bitcast <4 x float> %vecinit9 to <2 x i64>
+ ret <2 x i64> %0
+}
diff --git a/test/CodeGen/X86/split-eh-lpad-edges.ll b/test/CodeGen/X86/split-eh-lpad-edges.ll
new file mode 100644
index 0000000..fd40a7f
--- /dev/null
+++ b/test/CodeGen/X86/split-eh-lpad-edges.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep jmp
+; rdar://6647639
+
+ %struct.FetchPlanHeader = type { i8*, i8*, i32, i8*, i8*, i8*, i8*, i8*, %struct.NSObject* (%struct.NSObject*, %struct.objc_selector*, ...)*, %struct.__attributeDescriptionFlags }
+ %struct.NSArray = type { %struct.NSObject }
+ %struct.NSAutoreleasePool = type { %struct.NSObject, i8*, i8*, i8*, i8* }
+ %struct.NSObject = type { %struct.NSObject* }
+ %struct.__attributeDescriptionFlags = type <{ i32 }>
+ %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* }
+ %struct.objc_selector = type opaque
+@"\01l_objc_msgSend_fixup_alloc" = external global %struct._message_ref_t, align 16 ; <%struct._message_ref_t*> [#uses=2]
+
+define %struct.NSArray* @newFetchedRowsForFetchPlan_MT(%struct.FetchPlanHeader* %fetchPlan, %struct.objc_selector* %selectionMethod, %struct.NSObject* %selectionParameter) ssp {
+entry:
+ %0 = invoke %struct.NSObject* null(%struct.NSObject* null, %struct._message_ref_t* @"\01l_objc_msgSend_fixup_alloc")
+ to label %invcont unwind label %lpad ; <%struct.NSObject*> [#uses=1]
+
+invcont: ; preds = %entry
+ %1 = invoke %struct.NSObject* (%struct.NSObject*, %struct.objc_selector*, ...)* @objc_msgSend(%struct.NSObject* %0, %struct.objc_selector* null)
+ to label %invcont26 unwind label %lpad ; <%struct.NSObject*> [#uses=0]
+
+invcont26: ; preds = %invcont
+ %2 = invoke %struct.NSObject* null(%struct.NSObject* null, %struct._message_ref_t* @"\01l_objc_msgSend_fixup_alloc")
+ to label %invcont27 unwind label %lpad ; <%struct.NSObject*> [#uses=0]
+
+invcont27: ; preds = %invcont26
+ unreachable
+
+lpad: ; preds = %invcont26, %invcont, %entry
+ %pool.1 = phi %struct.NSAutoreleasePool* [ null, %entry ], [ null, %invcont ], [ null, %invcont26 ] ; <%struct.NSAutoreleasePool*> [#uses=0]
+ unreachable
+}
+
+declare %struct.NSObject* @objc_msgSend(%struct.NSObject*, %struct.objc_selector*, ...)
diff --git a/test/CodeGen/X86/split-select.ll b/test/CodeGen/X86/split-select.ll
new file mode 100644
index 0000000..07d4d52
--- /dev/null
+++ b/test/CodeGen/X86/split-select.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86-64 | grep test | count 1
+
+define void @foo(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) {
+ %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
+ store <2 x i16> %x, <2 x i16>* %p
+ ret void
+}
diff --git a/test/CodeGen/X86/split-vector-rem.ll b/test/CodeGen/X86/split-vector-rem.ll
new file mode 100644
index 0000000..681c6b0
--- /dev/null
+++ b/test/CodeGen/X86/split-vector-rem.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 | grep div | count 16
+; RUN: llc < %s -march=x86-64 | grep fmodf | count 8
+
+define <8 x i32> @foo(<8 x i32> %t, <8 x i32> %u) {
+ %m = srem <8 x i32> %t, %u
+ ret <8 x i32> %m
+}
+define <8 x i32> @bar(<8 x i32> %t, <8 x i32> %u) {
+ %m = urem <8 x i32> %t, %u
+ ret <8 x i32> %m
+}
+define <8 x float> @qux(<8 x float> %t, <8 x float> %u) {
+ %m = frem <8 x float> %t, %u
+ ret <8 x float> %m
+}
diff --git a/test/CodeGen/X86/sret.ll b/test/CodeGen/X86/sret.ll
new file mode 100644
index 0000000..b945530
--- /dev/null
+++ b/test/CodeGen/X86/sret.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86 | grep ret | grep 4
+
+ %struct.foo = type { [4 x i32] }
+
+define void @bar(%struct.foo* noalias sret %agg.result) nounwind {
+entry:
+ %tmp1 = getelementptr %struct.foo* %agg.result, i32 0, i32 0
+ %tmp3 = getelementptr [4 x i32]* %tmp1, i32 0, i32 0
+ store i32 1, i32* %tmp3, align 8
+ ret void
+}
+
+@dst = external global i32
+
+define void @foo() nounwind {
+ %memtmp = alloca %struct.foo, align 4
+ call void @bar( %struct.foo* sret %memtmp ) nounwind
+ %tmp4 = getelementptr %struct.foo* %memtmp, i32 0, i32 0
+ %tmp5 = getelementptr [4 x i32]* %tmp4, i32 0, i32 0
+ %tmp6 = load i32* %tmp5
+ store i32 %tmp6, i32* @dst
+ ret void
+}
diff --git a/test/CodeGen/X86/sse-align-0.ll b/test/CodeGen/X86/sse-align-0.ll
new file mode 100644
index 0000000..b12a87d
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-0.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64 | not grep mov
+
+define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind {
+ %t = load <4 x float>* %p
+ %z = fmul <4 x float> %t, %x
+ ret <4 x float> %z
+}
+define <2 x double> @bar(<2 x double>* %p, <2 x double> %x) nounwind {
+ %t = load <2 x double>* %p
+ %z = fmul <2 x double> %t, %x
+ ret <2 x double> %z
+}
diff --git a/test/CodeGen/X86/sse-align-1.ll b/test/CodeGen/X86/sse-align-1.ll
new file mode 100644
index 0000000..c7a5cd5
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-1.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64 | grep movap | count 2
+
+define <4 x float> @foo(<4 x float>* %p) nounwind {
+ %t = load <4 x float>* %p
+ ret <4 x float> %t
+}
+define <2 x double> @bar(<2 x double>* %p) nounwind {
+ %t = load <2 x double>* %p
+ ret <2 x double> %t
+}
diff --git a/test/CodeGen/X86/sse-align-10.ll b/test/CodeGen/X86/sse-align-10.ll
new file mode 100644
index 0000000..0f91697
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-10.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86-64 | grep movups | count 1
+
+define <2 x i64> @bar(<2 x i64>* %p) nounwind {
+ %t = load <2 x i64>* %p, align 8
+ ret <2 x i64> %t
+}
diff --git a/test/CodeGen/X86/sse-align-11.ll b/test/CodeGen/X86/sse-align-11.ll
new file mode 100644
index 0000000..aa1b437
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-11.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps
+; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=linux | grep movups
+
+define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind {
+entry:
+ %tmp6 = insertelement <4 x float> undef, float %a, i32 0
+ %tmp7 = insertelement <4 x float> %tmp6, float %b, i32 1
+ %tmp8 = insertelement <4 x float> %tmp7, float %c, i32 2
+ %tmp9 = insertelement <4 x float> %tmp8, float %d, i32 3
+ ret <4 x float> %tmp9
+}
+
diff --git a/test/CodeGen/X86/sse-align-12.ll b/test/CodeGen/X86/sse-align-12.ll
new file mode 100644
index 0000000..4f025b9
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-12.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep unpck %t | count 2
+; RUN: grep shuf %t | count 2
+; RUN: grep ps %t | count 4
+; RUN: grep pd %t | count 4
+; RUN: grep movup %t | count 4
+
+define <4 x float> @a(<4 x float>* %y) nounwind {
+ %x = load <4 x float>* %y, align 4
+ %a = extractelement <4 x float> %x, i32 0
+ %b = extractelement <4 x float> %x, i32 1
+ %c = extractelement <4 x float> %x, i32 2
+ %d = extractelement <4 x float> %x, i32 3
+ %p = insertelement <4 x float> undef, float %d, i32 0
+ %q = insertelement <4 x float> %p, float %c, i32 1
+ %r = insertelement <4 x float> %q, float %b, i32 2
+ %s = insertelement <4 x float> %r, float %a, i32 3
+ ret <4 x float> %s
+}
+define <4 x float> @b(<4 x float>* %y, <4 x float> %z) nounwind {
+ %x = load <4 x float>* %y, align 4
+ %a = extractelement <4 x float> %x, i32 2
+ %b = extractelement <4 x float> %x, i32 3
+ %c = extractelement <4 x float> %z, i32 2
+ %d = extractelement <4 x float> %z, i32 3
+ %p = insertelement <4 x float> undef, float %c, i32 0
+ %q = insertelement <4 x float> %p, float %a, i32 1
+ %r = insertelement <4 x float> %q, float %d, i32 2
+ %s = insertelement <4 x float> %r, float %b, i32 3
+ ret <4 x float> %s
+}
+define <2 x double> @c(<2 x double>* %y) nounwind {
+ %x = load <2 x double>* %y, align 8
+ %a = extractelement <2 x double> %x, i32 0
+ %c = extractelement <2 x double> %x, i32 1
+ %p = insertelement <2 x double> undef, double %c, i32 0
+ %r = insertelement <2 x double> %p, double %a, i32 1
+ ret <2 x double> %r
+}
+define <2 x double> @d(<2 x double>* %y, <2 x double> %z) nounwind {
+ %x = load <2 x double>* %y, align 8
+ %a = extractelement <2 x double> %x, i32 1
+ %c = extractelement <2 x double> %z, i32 1
+ %p = insertelement <2 x double> undef, double %c, i32 0
+ %r = insertelement <2 x double> %p, double %a, i32 1
+ ret <2 x double> %r
+}
diff --git a/test/CodeGen/X86/sse-align-2.ll b/test/CodeGen/X86/sse-align-2.ll
new file mode 100644
index 0000000..102c3fb
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-2.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64 | grep movup | count 2
+
+define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind {
+ %t = load <4 x float>* %p, align 4
+ %z = fmul <4 x float> %t, %x
+ ret <4 x float> %z
+}
+define <2 x double> @bar(<2 x double>* %p, <2 x double> %x) nounwind {
+ %t = load <2 x double>* %p, align 8
+ %z = fmul <2 x double> %t, %x
+ ret <2 x double> %z
+}
diff --git a/test/CodeGen/X86/sse-align-3.ll b/test/CodeGen/X86/sse-align-3.ll
new file mode 100644
index 0000000..c42f7f0
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-3.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64 | grep movap | count 2
+
+define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {
+ store <4 x float> %x, <4 x float>* %p
+ ret void
+}
+define void @bar(<2 x double>* %p, <2 x double> %x) nounwind {
+ store <2 x double> %x, <2 x double>* %p
+ ret void
+}
diff --git a/test/CodeGen/X86/sse-align-4.ll b/test/CodeGen/X86/sse-align-4.ll
new file mode 100644
index 0000000..4c59934
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-4.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64 | grep movup | count 2
+
+define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {
+ store <4 x float> %x, <4 x float>* %p, align 4
+ ret void
+}
+define void @bar(<2 x double>* %p, <2 x double> %x) nounwind {
+ store <2 x double> %x, <2 x double>* %p, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/sse-align-5.ll b/test/CodeGen/X86/sse-align-5.ll
new file mode 100644
index 0000000..21cd231
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-5.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86-64 | grep movaps | count 1
+
+define <2 x i64> @bar(<2 x i64>* %p) nounwind {
+ %t = load <2 x i64>* %p
+ ret <2 x i64> %t
+}
diff --git a/test/CodeGen/X86/sse-align-6.ll b/test/CodeGen/X86/sse-align-6.ll
new file mode 100644
index 0000000..0bbf4228
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-6.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86-64 | grep movups | count 1
+
+define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
+ %t = load <2 x i64>* %p, align 8
+ %z = mul <2 x i64> %t, %x
+ ret <2 x i64> %z
+}
diff --git a/test/CodeGen/X86/sse-align-7.ll b/test/CodeGen/X86/sse-align-7.ll
new file mode 100644
index 0000000..5784481
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-7.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86-64 | grep movaps | count 1
+
+define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
+ store <2 x i64> %x, <2 x i64>* %p
+ ret void
+}
diff --git a/test/CodeGen/X86/sse-align-8.ll b/test/CodeGen/X86/sse-align-8.ll
new file mode 100644
index 0000000..cfeff81
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-8.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86-64 | grep movups | count 1
+
+define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
+ store <2 x i64> %x, <2 x i64>* %p, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/sse-align-9.ll b/test/CodeGen/X86/sse-align-9.ll
new file mode 100644
index 0000000..cb26b95
--- /dev/null
+++ b/test/CodeGen/X86/sse-align-9.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64 | grep movup | count 2
+
+define <4 x float> @foo(<4 x float>* %p) nounwind {
+ %t = load <4 x float>* %p, align 4
+ ret <4 x float> %t
+}
+define <2 x double> @bar(<2 x double>* %p) nounwind {
+ %t = load <2 x double>* %p, align 8
+ ret <2 x double> %t
+}
diff --git a/test/CodeGen/X86/sse-fcopysign.ll b/test/CodeGen/X86/sse-fcopysign.ll
new file mode 100644
index 0000000..0e0e4a9
--- /dev/null
+++ b/test/CodeGen/X86/sse-fcopysign.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep test
+
+define float @tst1(float %a, float %b) {
+ %tmp = tail call float @copysignf( float %b, float %a )
+ ret float %tmp
+}
+
+define double @tst2(double %a, float %b, float %c) {
+ %tmp1 = fadd float %b, %c
+ %tmp2 = fpext float %tmp1 to double
+ %tmp = tail call double @copysign( double %a, double %tmp2 )
+ ret double %tmp
+}
+
+declare float @copysignf(float, float)
+declare double @copysign(double, double)
diff --git a/test/CodeGen/X86/sse-load-ret.ll b/test/CodeGen/X86/sse-load-ret.ll
new file mode 100644
index 0000000..1ebcb1a
--- /dev/null
+++ b/test/CodeGen/X86/sse-load-ret.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm
+
+define double @test1(double* %P) {
+ %X = load double* %P ; <double> [#uses=1]
+ ret double %X
+}
+
+define double @test2() {
+ ret double 1.234560e+03
+}
+
+
+; FIXME: Todo
+;double %test3(bool %B) {
+; %C = select bool %B, double 123.412, double 523.01123123
+; ret double %C
+;}
+
diff --git a/test/CodeGen/X86/sse-minmax.ll b/test/CodeGen/X86/sse-minmax.ll
new file mode 100644
index 0000000..17ffb5e
--- /dev/null
+++ b/test/CodeGen/X86/sse-minmax.ll
@@ -0,0 +1,392 @@
+; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s
+
+; Some of these patterns can be matched as SSE min or max. Some of
+; then can be matched provided that the operands are swapped.
+; Some of them can't be matched at all and require a comparison
+; and a conditional branch.
+
+; The naming convention is {,x_}{o,u}{gt,lt,ge,le}{,_inverse}
+; x_ : use 0.0 instead of %y
+; _inverse : swap the arms of the select.
+
+; CHECK: ogt:
+; CHECK-NEXT: maxsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @ogt(double %x, double %y) nounwind {
+ %c = fcmp ogt double %x, %y
+ %d = select i1 %c, double %x, double %y
+ ret double %d
+}
+
+; CHECK: olt:
+; CHECK-NEXT: minsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @olt(double %x, double %y) nounwind {
+ %c = fcmp olt double %x, %y
+ %d = select i1 %c, double %x, double %y
+ ret double %d
+}
+
+; CHECK: ogt_inverse:
+; CHECK-NEXT: minsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @ogt_inverse(double %x, double %y) nounwind {
+ %c = fcmp ogt double %x, %y
+ %d = select i1 %c, double %y, double %x
+ ret double %d
+}
+
+; CHECK: olt_inverse:
+; CHECK-NEXT: maxsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @olt_inverse(double %x, double %y) nounwind {
+ %c = fcmp olt double %x, %y
+ %d = select i1 %c, double %y, double %x
+ ret double %d
+}
+
+; CHECK: oge:
+; CHECK-NEXT: ucomisd %xmm1, %xmm0
+define double @oge(double %x, double %y) nounwind {
+ %c = fcmp oge double %x, %y
+ %d = select i1 %c, double %x, double %y
+ ret double %d
+}
+
+; CHECK: ole:
+; CHECK-NEXT: ucomisd %xmm0, %xmm1
+define double @ole(double %x, double %y) nounwind {
+ %c = fcmp ole double %x, %y
+ %d = select i1 %c, double %x, double %y
+ ret double %d
+}
+
+; CHECK: oge_inverse:
+; CHECK-NEXT: ucomisd %xmm1, %xmm0
+define double @oge_inverse(double %x, double %y) nounwind {
+ %c = fcmp oge double %x, %y
+ %d = select i1 %c, double %y, double %x
+ ret double %d
+}
+
+; CHECK: ole_inverse:
+; CHECK-NEXT: ucomisd %xmm0, %xmm1
+define double @ole_inverse(double %x, double %y) nounwind {
+ %c = fcmp ole double %x, %y
+ %d = select i1 %c, double %y, double %x
+ ret double %d
+}
+
+; CHECK: x_ogt:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: maxsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ogt(double %x) nounwind {
+ %c = fcmp ogt double %x, 0.000000e+00
+ %d = select i1 %c, double %x, double 0.000000e+00
+ ret double %d
+}
+
+; CHECK: x_olt:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: minsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_olt(double %x) nounwind {
+ %c = fcmp olt double %x, 0.000000e+00
+ %d = select i1 %c, double %x, double 0.000000e+00
+ ret double %d
+}
+
+; CHECK: x_ogt_inverse:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: minsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ogt_inverse(double %x) nounwind {
+ %c = fcmp ogt double %x, 0.000000e+00
+ %d = select i1 %c, double 0.000000e+00, double %x
+ ret double %d
+}
+
+; CHECK: x_olt_inverse:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: maxsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_olt_inverse(double %x) nounwind {
+ %c = fcmp olt double %x, 0.000000e+00
+ %d = select i1 %c, double 0.000000e+00, double %x
+ ret double %d
+}
+
+; CHECK: x_oge:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: maxsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_oge(double %x) nounwind {
+ %c = fcmp oge double %x, 0.000000e+00
+ %d = select i1 %c, double %x, double 0.000000e+00
+ ret double %d
+}
+
+; CHECK: x_ole:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: minsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ole(double %x) nounwind {
+ %c = fcmp ole double %x, 0.000000e+00
+ %d = select i1 %c, double %x, double 0.000000e+00
+ ret double %d
+}
+
+; CHECK: x_oge_inverse:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: minsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_oge_inverse(double %x) nounwind {
+ %c = fcmp oge double %x, 0.000000e+00
+ %d = select i1 %c, double 0.000000e+00, double %x
+ ret double %d
+}
+
+; CHECK: x_ole_inverse:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: maxsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ole_inverse(double %x) nounwind {
+ %c = fcmp ole double %x, 0.000000e+00
+ %d = select i1 %c, double 0.000000e+00, double %x
+ ret double %d
+}
+
+; CHECK: ugt:
+; CHECK-NEXT: ucomisd %xmm0, %xmm1
+define double @ugt(double %x, double %y) nounwind {
+ %c = fcmp ugt double %x, %y
+ %d = select i1 %c, double %x, double %y
+ ret double %d
+}
+
+; CHECK: ult:
+; CHECK-NEXT: ucomisd %xmm1, %xmm0
+define double @ult(double %x, double %y) nounwind {
+ %c = fcmp ult double %x, %y
+ %d = select i1 %c, double %x, double %y
+ ret double %d
+}
+
+; CHECK: ugt_inverse:
+; CHECK-NEXT: ucomisd %xmm0, %xmm1
+define double @ugt_inverse(double %x, double %y) nounwind {
+ %c = fcmp ugt double %x, %y
+ %d = select i1 %c, double %y, double %x
+ ret double %d
+}
+
+; CHECK: ult_inverse:
+; CHECK-NEXT: ucomisd %xmm1, %xmm0
+define double @ult_inverse(double %x, double %y) nounwind {
+ %c = fcmp ult double %x, %y
+ %d = select i1 %c, double %y, double %x
+ ret double %d
+}
+
+; CHECK: uge:
+; CHECK-NEXT: maxsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @uge(double %x, double %y) nounwind {
+ %c = fcmp uge double %x, %y
+ %d = select i1 %c, double %x, double %y
+ ret double %d
+}
+
+; CHECK: ule:
+; CHECK-NEXT: minsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @ule(double %x, double %y) nounwind {
+ %c = fcmp ule double %x, %y
+ %d = select i1 %c, double %x, double %y
+ ret double %d
+}
+
+; CHECK: uge_inverse:
+; CHECK-NEXT: minsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @uge_inverse(double %x, double %y) nounwind {
+ %c = fcmp uge double %x, %y
+ %d = select i1 %c, double %y, double %x
+ ret double %d
+}
+
+; CHECK: ule_inverse:
+; CHECK-NEXT: maxsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @ule_inverse(double %x, double %y) nounwind {
+ %c = fcmp ule double %x, %y
+ %d = select i1 %c, double %y, double %x
+ ret double %d
+}
+
+; CHECK: x_ugt:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: maxsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ugt(double %x) nounwind {
+ %c = fcmp ugt double %x, 0.000000e+00
+ %d = select i1 %c, double %x, double 0.000000e+00
+ ret double %d
+}
+
+; CHECK: x_ult:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: minsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ult(double %x) nounwind {
+ %c = fcmp ult double %x, 0.000000e+00
+ %d = select i1 %c, double %x, double 0.000000e+00
+ ret double %d
+}
+
+; CHECK: x_ugt_inverse:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: minsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ugt_inverse(double %x) nounwind {
+ %c = fcmp ugt double %x, 0.000000e+00
+ %d = select i1 %c, double 0.000000e+00, double %x
+ ret double %d
+}
+
+; CHECK: x_ult_inverse:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: maxsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ult_inverse(double %x) nounwind {
+ %c = fcmp ult double %x, 0.000000e+00
+ %d = select i1 %c, double 0.000000e+00, double %x
+ ret double %d
+}
+
+; CHECK: x_uge:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: maxsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_uge(double %x) nounwind {
+ %c = fcmp uge double %x, 0.000000e+00
+ %d = select i1 %c, double %x, double 0.000000e+00
+ ret double %d
+}
+
+; CHECK: x_ule:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: minsd %xmm0, %xmm1
+; CHECK-NEXT: movapd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ule(double %x) nounwind {
+ %c = fcmp ule double %x, 0.000000e+00
+ %d = select i1 %c, double %x, double 0.000000e+00
+ ret double %d
+}
+
+; CHECK: x_uge_inverse:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: minsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_uge_inverse(double %x) nounwind {
+ %c = fcmp uge double %x, 0.000000e+00
+ %d = select i1 %c, double 0.000000e+00, double %x
+ ret double %d
+}
+
+; CHECK: x_ule_inverse:
+; CHECK-NEXT: pxor %xmm1, %xmm1
+; CHECK-NEXT: maxsd %xmm1, %xmm0
+; CHECK-NEXT: ret
+define double @x_ule_inverse(double %x) nounwind {
+ %c = fcmp ule double %x, 0.000000e+00
+ %d = select i1 %c, double 0.000000e+00, double %x
+ ret double %d
+}
+
+; Test a few more misc. cases.
+
+; CHECK: clampTo3k_a:
+; CHECK: minsd
+define double @clampTo3k_a(double %x) nounwind readnone {
+entry:
+ %0 = fcmp ogt double %x, 3.000000e+03 ; <i1> [#uses=1]
+ %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1]
+ ret double %x_addr.0
+}
+
+; CHECK: clampTo3k_b:
+; CHECK: minsd
+define double @clampTo3k_b(double %x) nounwind readnone {
+entry:
+ %0 = fcmp uge double %x, 3.000000e+03 ; <i1> [#uses=1]
+ %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1]
+ ret double %x_addr.0
+}
+
+; CHECK: clampTo3k_c:
+; CHECK: maxsd
+define double @clampTo3k_c(double %x) nounwind readnone {
+entry:
+ %0 = fcmp olt double %x, 3.000000e+03 ; <i1> [#uses=1]
+ %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1]
+ ret double %x_addr.0
+}
+
+; CHECK: clampTo3k_d:
+; CHECK: maxsd
+define double @clampTo3k_d(double %x) nounwind readnone {
+entry:
+ %0 = fcmp ule double %x, 3.000000e+03 ; <i1> [#uses=1]
+ %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1]
+ ret double %x_addr.0
+}
+
+; CHECK: clampTo3k_e:
+; CHECK: maxsd
+define double @clampTo3k_e(double %x) nounwind readnone {
+entry:
+ %0 = fcmp olt double %x, 3.000000e+03 ; <i1> [#uses=1]
+ %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1]
+ ret double %x_addr.0
+}
+
+; CHECK: clampTo3k_f:
+; CHECK: maxsd
+define double @clampTo3k_f(double %x) nounwind readnone {
+entry:
+ %0 = fcmp ule double %x, 3.000000e+03 ; <i1> [#uses=1]
+ %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1]
+ ret double %x_addr.0
+}
+
+; CHECK: clampTo3k_g:
+; CHECK: minsd
+define double @clampTo3k_g(double %x) nounwind readnone {
+entry:
+ %0 = fcmp ogt double %x, 3.000000e+03 ; <i1> [#uses=1]
+ %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1]
+ ret double %x_addr.0
+}
+
+; CHECK: clampTo3k_h:
+; CHECK: minsd
+define double @clampTo3k_h(double %x) nounwind readnone {
+entry:
+ %0 = fcmp uge double %x, 3.000000e+03 ; <i1> [#uses=1]
+ %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1]
+ ret double %x_addr.0
+}
diff --git a/test/CodeGen/X86/sse-varargs.ll b/test/CodeGen/X86/sse-varargs.ll
new file mode 100644
index 0000000..da38f0e
--- /dev/null
+++ b/test/CodeGen/X86/sse-varargs.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xmm | grep esp
+
+define i32 @t() nounwind {
+entry:
+ tail call void (i32, ...)* @foo( i32 1, <4 x i32> < i32 10, i32 11, i32 12, i32 13 > ) nounwind
+ ret i32 0
+}
+
+declare void @foo(i32, ...)
diff --git a/test/CodeGen/X86/sse2.ll b/test/CodeGen/X86/sse2.ll
new file mode 100644
index 0000000..f2b8010
--- /dev/null
+++ b/test/CodeGen/X86/sse2.ll
@@ -0,0 +1,34 @@
+; Tests for SSE2 and below, without SSE3+.
+; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=pentium4 -O3 | FileCheck %s
+
+define void @t1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
+ %tmp3 = load <2 x double>* %A, align 16
+ %tmp7 = insertelement <2 x double> undef, double %B, i32 0
+ %tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 2, i32 1 >
+ store <2 x double> %tmp9, <2 x double>* %r, align 16
+ ret void
+
+; CHECK: t1:
+; CHECK: movl 8(%esp), %eax
+; CHECK-NEXT: movl 4(%esp), %ecx
+; CHECK-NEXT: movapd (%eax), %xmm0
+; CHECK-NEXT: movlpd 12(%esp), %xmm0
+; CHECK-NEXT: movapd %xmm0, (%ecx)
+; CHECK-NEXT: ret
+}
+
+define void @t2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
+ %tmp3 = load <2 x double>* %A, align 16
+ %tmp7 = insertelement <2 x double> undef, double %B, i32 0
+ %tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 0, i32 2 >
+ store <2 x double> %tmp9, <2 x double>* %r, align 16
+ ret void
+
+; CHECK: t2:
+; CHECK: movl 8(%esp), %eax
+; CHECK-NEXT: movl 4(%esp), %ecx
+; CHECK-NEXT: movapd (%eax), %xmm0
+; CHECK-NEXT: movhpd 12(%esp), %xmm0
+; CHECK-NEXT: movapd %xmm0, (%ecx)
+; CHECK-NEXT: ret
+}
diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll
new file mode 100644
index 0000000..b2af7c9
--- /dev/null
+++ b/test/CodeGen/X86/sse3.ll
@@ -0,0 +1,263 @@
+; These are tests for SSE3 codegen. Yonah has SSE3 and earlier but not SSSE3+.
+
+; RUN: llc < %s -march=x86-64 -mcpu=yonah -mtriple=i686-apple-darwin9 -O3 \
+; RUN: | FileCheck %s --check-prefix=X64
+
+; Test for v8xi16 lowering where we extract the first element of the vector and
+; placed it in the second element of the result.
+
+define void @t0(<8 x i16>* %dest, <8 x i16>* %old) nounwind {
+entry:
+ %tmp3 = load <8 x i16>* %old
+ %tmp6 = shufflevector <8 x i16> %tmp3,
+ <8 x i16> < i16 0, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef >,
+ <8 x i32> < i32 8, i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef >
+ store <8 x i16> %tmp6, <8 x i16>* %dest
+ ret void
+
+; X64: t0:
+; X64: movddup (%rsi), %xmm0
+; X64: xorl %eax, %eax
+; X64: pshuflw $0, %xmm0, %xmm0
+; X64: pinsrw $0, %eax, %xmm0
+; X64: movaps %xmm0, (%rdi)
+; X64: ret
+}
+
+define <8 x i16> @t1(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
+ ret <8 x i16> %tmp3
+
+; X64: t1:
+; X64: movl (%rsi), %eax
+; X64: movaps (%rdi), %xmm0
+; X64: pinsrw $0, %eax, %xmm0
+; X64: ret
+}
+
+define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind {
+ %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 9, i32 1, i32 2, i32 9, i32 4, i32 5, i32 6, i32 7 >
+ ret <8 x i16> %tmp
+; X64: t2:
+; X64: pextrw $1, %xmm1, %eax
+; X64: pinsrw $0, %eax, %xmm0
+; X64: pinsrw $3, %eax, %xmm0
+; X64: ret
+}
+
+define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind {
+ %tmp = shufflevector <8 x i16> %A, <8 x i16> %A, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 >
+ ret <8 x i16> %tmp
+; X64: t3:
+; X64: pextrw $5, %xmm0, %eax
+; X64: pshuflw $44, %xmm0, %xmm0
+; X64: pshufhw $27, %xmm0, %xmm0
+; X64: pinsrw $3, %eax, %xmm0
+; X64: ret
+}
+
+define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind {
+ %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 >
+ ret <8 x i16> %tmp
+; X64: t4:
+; X64: pextrw $7, %xmm0, %eax
+; X64: pshufhw $100, %xmm0, %xmm2
+; X64: pinsrw $1, %eax, %xmm2
+; X64: pextrw $1, %xmm0, %eax
+; X64: movaps %xmm2, %xmm0
+; X64: pinsrw $4, %eax, %xmm0
+; X64: ret
+}
+
+define <8 x i16> @t5(<8 x i16> %A, <8 x i16> %B) nounwind {
+ %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 0, i32 1, i32 10, i32 11, i32 2, i32 3 >
+ ret <8 x i16> %tmp
+; X64: t5:
+; X64: movlhps %xmm1, %xmm0
+; X64: pshufd $114, %xmm0, %xmm0
+; X64: ret
+}
+
+define <8 x i16> @t6(<8 x i16> %A, <8 x i16> %B) nounwind {
+ %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
+ ret <8 x i16> %tmp
+; X64: t6:
+; X64: movss %xmm1, %xmm0
+; X64: ret
+}
+
+define <8 x i16> @t7(<8 x i16> %A, <8 x i16> %B) nounwind {
+ %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 0, i32 3, i32 2, i32 4, i32 6, i32 4, i32 7 >
+ ret <8 x i16> %tmp
+; X64: t7:
+; X64: pshuflw $-80, %xmm0, %xmm0
+; X64: pshufhw $-56, %xmm0, %xmm0
+; X64: ret
+}
+
+define void @t8(<2 x i64>* %res, <2 x i64>* %A) nounwind {
+ %tmp = load <2 x i64>* %A
+ %tmp.upgrd.1 = bitcast <2 x i64> %tmp to <8 x i16>
+ %tmp0 = extractelement <8 x i16> %tmp.upgrd.1, i32 0
+ %tmp1 = extractelement <8 x i16> %tmp.upgrd.1, i32 1
+ %tmp2 = extractelement <8 x i16> %tmp.upgrd.1, i32 2
+ %tmp3 = extractelement <8 x i16> %tmp.upgrd.1, i32 3
+ %tmp4 = extractelement <8 x i16> %tmp.upgrd.1, i32 4
+ %tmp5 = extractelement <8 x i16> %tmp.upgrd.1, i32 5
+ %tmp6 = extractelement <8 x i16> %tmp.upgrd.1, i32 6
+ %tmp7 = extractelement <8 x i16> %tmp.upgrd.1, i32 7
+ %tmp8 = insertelement <8 x i16> undef, i16 %tmp2, i32 0
+ %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 1
+ %tmp10 = insertelement <8 x i16> %tmp9, i16 %tmp0, i32 2
+ %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 3
+ %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp6, i32 4
+ %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 5
+ %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp4, i32 6
+ %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 7
+ %tmp15.upgrd.2 = bitcast <8 x i16> %tmp15 to <2 x i64>
+ store <2 x i64> %tmp15.upgrd.2, <2 x i64>* %res
+ ret void
+; X64: t8:
+; X64: pshuflw $-58, (%rsi), %xmm0
+; X64: pshufhw $-58, %xmm0, %xmm0
+; X64: movaps %xmm0, (%rdi)
+; X64: ret
+}
+
+define void @t9(<4 x float>* %r, <2 x i32>* %A) nounwind {
+ %tmp = load <4 x float>* %r
+ %tmp.upgrd.3 = bitcast <2 x i32>* %A to double*
+ %tmp.upgrd.4 = load double* %tmp.upgrd.3
+ %tmp.upgrd.5 = insertelement <2 x double> undef, double %tmp.upgrd.4, i32 0
+ %tmp5 = insertelement <2 x double> %tmp.upgrd.5, double undef, i32 1
+ %tmp6 = bitcast <2 x double> %tmp5 to <4 x float>
+ %tmp.upgrd.6 = extractelement <4 x float> %tmp, i32 0
+ %tmp7 = extractelement <4 x float> %tmp, i32 1
+ %tmp8 = extractelement <4 x float> %tmp6, i32 0
+ %tmp9 = extractelement <4 x float> %tmp6, i32 1
+ %tmp10 = insertelement <4 x float> undef, float %tmp.upgrd.6, i32 0
+ %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, i32 1
+ %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, i32 2
+ %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3
+ store <4 x float> %tmp13, <4 x float>* %r
+ ret void
+; X64: t9:
+; X64: movsd (%rsi), %xmm0
+; X64: movaps (%rdi), %xmm1
+; X64: movlhps %xmm0, %xmm1
+; X64: movaps %xmm1, (%rdi)
+; X64: ret
+}
+
+
+
+; FIXME: This testcase produces icky code. It can be made much better!
+; PR2585
+
+@g1 = external constant <4 x i32>
+@g2 = external constant <4 x i16>
+
+define internal void @t10() nounwind {
+ load <4 x i32>* @g1, align 16
+ bitcast <4 x i32> %1 to <8 x i16>
+ shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef >
+ bitcast <8 x i16> %3 to <2 x i64>
+ extractelement <2 x i64> %4, i32 0
+ bitcast i64 %5 to <4 x i16>
+ store <4 x i16> %6, <4 x i16>* @g2, align 8
+ ret void
+; X64: t10:
+; X64: pextrw $4, %xmm0, %eax
+; X64: pextrw $6, %xmm0, %edx
+; X64: movlhps %xmm1, %xmm1
+; X64: pshuflw $8, %xmm1, %xmm1
+; X64: pinsrw $2, %eax, %xmm1
+; X64: pinsrw $3, %edx, %xmm1
+}
+
+
+; Pack various elements via shuffles.
+define <8 x i16> @t11(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp7 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp7
+
+; X64: t11:
+; X64: movlhps %xmm0, %xmm0
+; X64: movd %xmm1, %eax
+; X64: pshuflw $1, %xmm0, %xmm0
+; X64: pinsrw $1, %eax, %xmm0
+; X64: ret
+}
+
+
+define <8 x i16> @t12(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef >
+ ret <8 x i16> %tmp9
+
+; X64: t12:
+; X64: movlhps %xmm0, %xmm0
+; X64: pextrw $3, %xmm1, %eax
+; X64: pshufhw $3, %xmm0, %xmm0
+; X64: pinsrw $5, %eax, %xmm0
+; X64: ret
+}
+
+
+define <8 x i16> @t13(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef >
+ ret <8 x i16> %tmp9
+; X64: t13:
+; X64: punpcklqdq %xmm0, %xmm1
+; X64: pextrw $3, %xmm1, %eax
+; X64: pshufd $52, %xmm1, %xmm0
+; X64: pinsrw $4, %eax, %xmm0
+; X64: ret
+}
+
+
+define <8 x i16> @t14(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef >
+ ret <8 x i16> %tmp9
+; X64: t14:
+; X64: punpcklqdq %xmm0, %xmm1
+; X64: pshufhw $8, %xmm1, %xmm0
+; X64: ret
+}
+
+
+
+define <8 x i16> @t15(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp8
+; X64: t15:
+; X64: pextrw $7, %xmm0, %eax
+; X64: punpcklqdq %xmm1, %xmm0
+; X64: pshuflw $-128, %xmm0, %xmm0
+; X64: pinsrw $2, %eax, %xmm0
+; X64: ret
+}
+
+
+; Test yonah where we convert a shuffle to pextrw and pinrsw
+define <16 x i8> @t16(<16 x i8> %T0) nounwind readnone {
+entry:
+ %tmp8 = shufflevector <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
+ %tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 2, i32 17, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <16 x i8> %tmp9
+; X64: t16:
+; X64: pinsrw $0, %eax, %xmm1
+; X64: pextrw $8, %xmm0, %eax
+; X64: pinsrw $1, %eax, %xmm1
+; X64: pextrw $1, %xmm1, %ecx
+; X64: movd %xmm1, %edx
+; X64: pinsrw $0, %edx, %xmm1
+; X64: pinsrw $1, %eax, %xmm0
+; X64: ret
+}
diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll
new file mode 100644
index 0000000..a734c05
--- /dev/null
+++ b/test/CodeGen/X86/sse41.ll
@@ -0,0 +1,226 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X64
+
+@g16 = external global i16
+
+define <4 x i32> @pinsrd_1(i32 %s, <4 x i32> %tmp) nounwind {
+ %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 1
+ ret <4 x i32> %tmp1
+; X32: pinsrd_1:
+; X32: pinsrd $1, 4(%esp), %xmm0
+
+; X64: pinsrd_1:
+; X64: pinsrd $1, %edi, %xmm0
+}
+
+define <16 x i8> @pinsrb_1(i8 %s, <16 x i8> %tmp) nounwind {
+ %tmp1 = insertelement <16 x i8> %tmp, i8 %s, i32 1
+ ret <16 x i8> %tmp1
+; X32: pinsrb_1:
+; X32: pinsrb $1, 4(%esp), %xmm0
+
+; X64: pinsrb_1:
+; X64: pinsrb $1, %edi, %xmm0
+}
+
+
+define <2 x i64> @pmovsxbd_1(i32* %p) nounwind {
+entry:
+ %0 = load i32* %p, align 4
+ %1 = insertelement <4 x i32> undef, i32 %0, i32 0
+ %2 = insertelement <4 x i32> %1, i32 0, i32 1
+ %3 = insertelement <4 x i32> %2, i32 0, i32 2
+ %4 = insertelement <4 x i32> %3, i32 0, i32 3
+ %5 = bitcast <4 x i32> %4 to <16 x i8>
+ %6 = tail call <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8> %5) nounwind readnone
+ %7 = bitcast <4 x i32> %6 to <2 x i64>
+ ret <2 x i64> %7
+
+; X32: _pmovsxbd_1:
+; X32: movl 4(%esp), %eax
+; X32: pmovsxbd (%eax), %xmm0
+
+; X64: _pmovsxbd_1:
+; X64: pmovsxbd (%rdi), %xmm0
+}
+
+define <2 x i64> @pmovsxwd_1(i64* %p) nounwind readonly {
+entry:
+ %0 = load i64* %p ; <i64> [#uses=1]
+ %tmp2 = insertelement <2 x i64> zeroinitializer, i64 %0, i32 0 ; <<2 x i64>> [#uses=1]
+ %1 = bitcast <2 x i64> %tmp2 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %2 = tail call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %1) nounwind readnone ; <<4 x i32>> [#uses=1]
+ %3 = bitcast <4 x i32> %2 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %3
+
+; X32: _pmovsxwd_1:
+; X32: movl 4(%esp), %eax
+; X32: pmovsxwd (%eax), %xmm0
+
+; X64: _pmovsxwd_1:
+; X64: pmovsxwd (%rdi), %xmm0
+}
+
+
+
+
+define <2 x i64> @pmovzxbq_1() nounwind {
+entry:
+ %0 = load i16* @g16, align 2 ; <i16> [#uses=1]
+ %1 = insertelement <8 x i16> undef, i16 %0, i32 0 ; <<8 x i16>> [#uses=1]
+ %2 = bitcast <8 x i16> %1 to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %3 = tail call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %2) nounwind readnone ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %3
+
+; X32: _pmovzxbq_1:
+; X32: movl L_g16$non_lazy_ptr, %eax
+; X32: pmovzxbq (%eax), %xmm0
+
+; X64: _pmovzxbq_1:
+; X64: movq _g16@GOTPCREL(%rip), %rax
+; X64: pmovzxbq (%rax), %xmm0
+}
+
+declare <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8>) nounwind readnone
+declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnone
+declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>) nounwind readnone
+
+
+
+
+define i32 @extractps_1(<4 x float> %v) nounwind {
+ %s = extractelement <4 x float> %v, i32 3
+ %i = bitcast float %s to i32
+ ret i32 %i
+
+; X32: _extractps_1:
+; X32: extractps $3, %xmm0, %eax
+
+; X64: _extractps_1:
+; X64: extractps $3, %xmm0, %eax
+}
+define i32 @extractps_2(<4 x float> %v) nounwind {
+ %t = bitcast <4 x float> %v to <4 x i32>
+ %s = extractelement <4 x i32> %t, i32 3
+ ret i32 %s
+
+; X32: _extractps_2:
+; X32: extractps $3, %xmm0, %eax
+
+; X64: _extractps_2:
+; X64: extractps $3, %xmm0, %eax
+}
+
+
+; The non-store form of extractps puts its result into a GPR.
+; This makes it suitable for an extract from a <4 x float> that
+; is bitcasted to i32, but unsuitable for much of anything else.
+
+define float @ext_1(<4 x float> %v) nounwind {
+ %s = extractelement <4 x float> %v, i32 3
+ %t = fadd float %s, 1.0
+ ret float %t
+
+; X32: _ext_1:
+; X32: pshufd $3, %xmm0, %xmm0
+; X32: addss LCPI8_0, %xmm0
+
+; X64: _ext_1:
+; X64: pshufd $3, %xmm0, %xmm0
+; X64: addss LCPI8_0(%rip), %xmm0
+}
+define float @ext_2(<4 x float> %v) nounwind {
+ %s = extractelement <4 x float> %v, i32 3
+ ret float %s
+
+; X32: _ext_2:
+; X32: pshufd $3, %xmm0, %xmm0
+
+; X64: _ext_2:
+; X64: pshufd $3, %xmm0, %xmm0
+}
+define i32 @ext_3(<4 x i32> %v) nounwind {
+ %i = extractelement <4 x i32> %v, i32 3
+ ret i32 %i
+
+; X32: _ext_3:
+; X32: pextrd $3, %xmm0, %eax
+
+; X64: _ext_3:
+; X64: pextrd $3, %xmm0, %eax
+}
+
+define <4 x float> @insertps_1(<4 x float> %t1, <4 x float> %t2) nounwind {
+ %tmp1 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %t1, <4 x float> %t2, i32 1) nounwind readnone
+ ret <4 x float> %tmp1
+; X32: _insertps_1:
+; X32: insertps $1, %xmm1, %xmm0
+
+; X64: _insertps_1:
+; X64: insertps $1, %xmm1, %xmm0
+}
+
+declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i32) nounwind readnone
+
+define <4 x float> @insertps_2(<4 x float> %t1, float %t2) nounwind {
+ %tmp1 = insertelement <4 x float> %t1, float %t2, i32 0
+ ret <4 x float> %tmp1
+; X32: _insertps_2:
+; X32: insertps $0, 4(%esp), %xmm0
+
+; X64: _insertps_2:
+; X64: insertps $0, %xmm1, %xmm0
+}
+
+define <4 x float> @insertps_3(<4 x float> %t1, <4 x float> %t2) nounwind {
+ %tmp2 = extractelement <4 x float> %t2, i32 0
+ %tmp1 = insertelement <4 x float> %t1, float %tmp2, i32 0
+ ret <4 x float> %tmp1
+; X32: _insertps_3:
+; X32: insertps $0, %xmm1, %xmm0
+
+; X64: _insertps_3:
+; X64: insertps $0, %xmm1, %xmm0
+}
+
+define i32 @ptestz_1(<4 x float> %t1, <4 x float> %t2) nounwind {
+ %tmp1 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %t1, <4 x float> %t2) nounwind readnone
+ ret i32 %tmp1
+; X32: _ptestz_1:
+; X32: ptest %xmm1, %xmm0
+; X32: sete %al
+
+; X64: _ptestz_1:
+; X64: ptest %xmm1, %xmm0
+; X64: sete %al
+}
+
+define i32 @ptestz_2(<4 x float> %t1, <4 x float> %t2) nounwind {
+ %tmp1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %t1, <4 x float> %t2) nounwind readnone
+ ret i32 %tmp1
+; X32: _ptestz_2:
+; X32: ptest %xmm1, %xmm0
+; X32: setb %al
+
+; X64: _ptestz_2:
+; X64: ptest %xmm1, %xmm0
+; X64: setb %al
+}
+
+define i32 @ptestz_3(<4 x float> %t1, <4 x float> %t2) nounwind {
+ %tmp1 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %t1, <4 x float> %t2) nounwind readnone
+ ret i32 %tmp1
+; X32: _ptestz_3:
+; X32: ptest %xmm1, %xmm0
+; X32: seta %al
+
+; X64: _ptestz_3:
+; X64: ptest %xmm1, %xmm0
+; X64: seta %al
+}
+
+
+declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone
+declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone
+declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone
+
diff --git a/test/CodeGen/X86/sse42.ll b/test/CodeGen/X86/sse42.ll
new file mode 100644
index 0000000..c9c4d01
--- /dev/null
+++ b/test/CodeGen/X86/sse42.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
+
+declare i32 @llvm.x86.sse42.crc32.8(i32, i8) nounwind
+declare i32 @llvm.x86.sse42.crc32.16(i32, i16) nounwind
+declare i32 @llvm.x86.sse42.crc32.32(i32, i32) nounwind
+
+define i32 @crc32_8(i32 %a, i8 %b) nounwind {
+ %tmp = call i32 @llvm.x86.sse42.crc32.8(i32 %a, i8 %b)
+ ret i32 %tmp
+; X32: _crc32_8:
+; X32: crc32 8(%esp), %eax
+
+; X64: _crc32_8:
+; X64: crc32 %sil, %eax
+}
+
+
+define i32 @crc32_16(i32 %a, i16 %b) nounwind {
+ %tmp = call i32 @llvm.x86.sse42.crc32.16(i32 %a, i16 %b)
+ ret i32 %tmp
+; X32: _crc32_16:
+; X32: crc32 8(%esp), %eax
+
+; X64: _crc32_16:
+; X64: crc32 %si, %eax
+}
+
+
+define i32 @crc32_32(i32 %a, i32 %b) nounwind {
+ %tmp = call i32 @llvm.x86.sse42.crc32.32(i32 %a, i32 %b)
+ ret i32 %tmp
+; X32: _crc32_32:
+; X32: crc32 8(%esp), %eax
+
+; X64: _crc32_32:
+; X64: crc32 %esi, %eax
+}
diff --git a/test/CodeGen/X86/sse_reload_fold.ll b/test/CodeGen/X86/sse_reload_fold.ll
new file mode 100644
index 0000000..dc3d6fe
--- /dev/null
+++ b/test/CodeGen/X86/sse_reload_fold.ll
@@ -0,0 +1,124 @@
+; RUN: llc < %s -march=x86-64 -mattr=+64bit,+sse3 -print-failed-fuse-candidates |& \
+; RUN: grep fail | count 1
+
+declare float @test_f(float %f)
+declare double @test_d(double %f)
+declare <4 x float> @test_vf(<4 x float> %f)
+declare <2 x double> @test_vd(<2 x double> %f)
+declare float @llvm.sqrt.f32(float)
+declare double @llvm.sqrt.f64(double)
+
+declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>)
+declare <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float>)
+declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>)
+declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
+declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>)
+declare <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double>)
+declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>)
+declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>)
+declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8)
+declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>)
+declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>)
+declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>)
+
+define float @foo(float %f) {
+ %a = call float @test_f(float %f)
+ %t = call float @llvm.sqrt.f32(float %f)
+ ret float %t
+}
+define double @doo(double %f) {
+ %a = call double @test_d(double %f)
+ %t = call double @llvm.sqrt.f64(double %f)
+ ret double %t
+}
+define <4 x float> @a0(<4 x float> %f) {
+ %a = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %f)
+ ret <4 x float> %t
+}
+define <4 x float> @a1(<4 x float> %f) {
+ %a = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float> %f)
+ ret <4 x float> %t
+}
+define <4 x float> @a2(<4 x float> %f) {
+ %a = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %f)
+ ret <4 x float> %t
+}
+define <4 x float> @b3(<4 x float> %f) {
+ %y = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %y, <4 x float> %f)
+ ret <4 x float> %t
+}
+define <4 x float> @b4(<4 x float> %f) {
+ %y = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %y, <4 x float> %f)
+ ret <4 x float> %t
+}
+define <4 x float> @b5(<4 x float> %f) {
+ %y = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %y, <4 x float> %f, i8 7)
+ ret <4 x float> %t
+}
+define <4 x float> @b6(<4 x float> %f) {
+ %y = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %y, <4 x float> %f)
+ ret <4 x float> %t
+}
+define <4 x float> @b7(<4 x float> %f) {
+ %y = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %y, <4 x float> %f)
+ ret <4 x float> %t
+}
+define <4 x float> @b8(<4 x float> %f) {
+ %y = call <4 x float> @test_vf(<4 x float> %f)
+ %t = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %y, <4 x float> %f)
+ ret <4 x float> %t
+}
+define <2 x double> @c1(<2 x double> %f) {
+ %a = call <2 x double> @test_vd(<2 x double> %f)
+ %t = call <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double> %f)
+ ret <2 x double> %t
+}
+define <2 x double> @d3(<2 x double> %f) {
+ %y = call <2 x double> @test_vd(<2 x double> %f)
+ %t = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %y, <2 x double> %f)
+ ret <2 x double> %t
+}
+define <2 x double> @d4(<2 x double> %f) {
+ %y = call <2 x double> @test_vd(<2 x double> %f)
+ %t = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %y, <2 x double> %f)
+ ret <2 x double> %t
+}
+define <2 x double> @d5(<2 x double> %f) {
+ %y = call <2 x double> @test_vd(<2 x double> %f)
+ %t = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %y, <2 x double> %f, i8 7)
+ ret <2 x double> %t
+}
+define <2 x double> @d6(<2 x double> %f) {
+ %y = call <2 x double> @test_vd(<2 x double> %f)
+ %t = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %y, <2 x double> %f)
+ ret <2 x double> %t
+}
+define <2 x double> @d7(<2 x double> %f) {
+ %y = call <2 x double> @test_vd(<2 x double> %f)
+ %t = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %y, <2 x double> %f)
+ ret <2 x double> %t
+}
+define <2 x double> @d8(<2 x double> %f) {
+ %y = call <2 x double> @test_vd(<2 x double> %f)
+ %t = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %y, <2 x double> %f)
+ ret <2 x double> %t
+}
+
+; This one should fail to fuse.
+define <2 x double> @z0(<2 x double> %f) {
+ %y = call <2 x double> @test_vd(<2 x double> %f)
+ %t = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %f, <2 x double> %y)
+ ret <2 x double> %t
+}
diff --git a/test/CodeGen/X86/stack-align.ll b/test/CodeGen/X86/stack-align.ll
new file mode 100644
index 0000000..cb65e9b
--- /dev/null
+++ b/test/CodeGen/X86/stack-align.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -relocation-model=static -mcpu=yonah | grep {andpd.*4(%esp), %xmm}
+
+; The double argument is at 4(esp) which is 16-byte aligned, allowing us to
+; fold the load into the andpd.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+@G = external global double
+
+define void @test({ double, double }* byval %z, double* %P) {
+entry:
+ %tmp = getelementptr { double, double }* %z, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp1 = load double* %tmp, align 8 ; <double> [#uses=1]
+ %tmp2 = tail call double @fabs( double %tmp1 ) ; <double> [#uses=1]
+ %tmp3 = load double* @G, align 16 ; <double> [#uses=1]
+ %tmp4 = tail call double @fabs( double %tmp3 ) ; <double> [#uses=1]
+ %tmp6 = fadd double %tmp4, %tmp2 ; <double> [#uses=1]
+ store double %tmp6, double* %P, align 8
+ ret void
+}
+
+declare double @fabs(double)
diff --git a/test/CodeGen/X86/stack-color-with-reg-2.ll b/test/CodeGen/X86/stack-color-with-reg-2.ll
new file mode 100644
index 0000000..c1f2672
--- /dev/null
+++ b/test/CodeGen/X86/stack-color-with-reg-2.ll
@@ -0,0 +1,230 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs | grep {movl\[\[:space:\]\]%eax, %ebx}
+
+ %"struct..0$_67" = type { i32, %"struct.llvm::MachineOperand"**, %"struct.llvm::MachineOperand"* }
+ %"struct..1$_69" = type { i32 }
+ %"struct.llvm::AbstractTypeUser" = type { i32 (...)** }
+ %"struct.llvm::AliasAnalysis" = type opaque
+ %"struct.llvm::AnalysisResolver" = type { %"struct.std::vector<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >", %"struct.llvm::PMDataManager"* }
+ %"struct.llvm::Annotable" = type { %"struct.llvm::Annotation"* }
+ %"struct.llvm::Annotation" = type { i32 (...)**, %"struct..1$_69", %"struct.llvm::Annotation"* }
+ %"struct.llvm::Argument" = type { %"struct.llvm::Value", %"struct.llvm::ilist_node<llvm::Argument>", %"struct.llvm::Function"* }
+ %"struct.llvm::AttrListPtr" = type { %"struct.llvm::AttributeListImpl"* }
+ %"struct.llvm::AttributeListImpl" = type opaque
+ %"struct.llvm::BasicBlock" = type { %"struct.llvm::Value", %"struct.llvm::ilist_node<llvm::BasicBlock>", %"struct.llvm::iplist<llvm::Instruction,llvm::ilist_traits<llvm::Instruction> >", %"struct.llvm::Function"* }
+ %"struct.llvm::BitVector" = type { i32*, i32, i32 }
+ %"struct.llvm::BumpPtrAllocator" = type { i8* }
+ %"struct.llvm::CalleeSavedInfo" = type { i32, %"struct.llvm::TargetRegisterClass"*, i32 }
+ %"struct.llvm::Constant" = type { %"struct.llvm::User" }
+ %"struct.llvm::DebugLocTracker" = type { %"struct.std::vector<llvm::DebugLocTuple,std::allocator<llvm::DebugLocTuple> >", %"struct.llvm::DenseMap<llvm::DebugLocTuple,unsigned int,llvm::DenseMapInfo<llvm::DebugLocTuple>,llvm::DenseMapInfo<unsigned int> >" }
+ %"struct.llvm::DebugLocTuple" = type { %"struct.llvm::GlobalVariable"*, i32, i32 }
+ %"struct.llvm::DenseMap<llvm::DebugLocTuple,unsigned int,llvm::DenseMapInfo<llvm::DebugLocTuple>,llvm::DenseMapInfo<unsigned int> >" = type { i32, %"struct.std::pair<llvm::DebugLocTuple,unsigned int>"*, i32, i32 }
+ %"struct.llvm::DenseMap<llvm::MachineInstr*,unsigned int,llvm::DenseMapInfo<llvm::MachineInstr*>,llvm::DenseMapInfo<unsigned int> >" = type { i32, %"struct.std::pair<llvm::MachineInstr*,unsigned int>"*, i32, i32 }
+ %"struct.llvm::DenseMap<unsigned int,char,llvm::DenseMapInfo<unsigned int>,llvm::DenseMapInfo<char> >" = type { i32, %"struct.std::pair<unsigned int,char>"*, i32, i32 }
+ %"struct.llvm::DenseMap<unsigned int,llvm::LiveInterval*,llvm::DenseMapInfo<unsigned int>,llvm::DenseMapInfo<llvm::LiveInterval*> >" = type { i32, %"struct.std::pair<unsigned int,llvm::LiveInterval*>"*, i32, i32 }
+ %"struct.llvm::DenseSet<unsigned int,llvm::DenseMapInfo<unsigned int> >" = type { %"struct.llvm::DenseMap<unsigned int,char,llvm::DenseMapInfo<unsigned int>,llvm::DenseMapInfo<char> >" }
+ %"struct.llvm::Function" = type { %"struct.llvm::GlobalValue", %"struct.llvm::Annotable", %"struct.llvm::ilist_node<llvm::Function>", %"struct.llvm::iplist<llvm::BasicBlock,llvm::ilist_traits<llvm::BasicBlock> >", %"struct.llvm::iplist<llvm::Argument,llvm::ilist_traits<llvm::Argument> >", %"struct.llvm::ValueSymbolTable"*, %"struct.llvm::AttrListPtr" }
+ %"struct.llvm::FunctionPass" = type { %"struct.llvm::Pass" }
+ %"struct.llvm::GlobalValue" = type { %"struct.llvm::Constant", %"struct.llvm::Module"*, i32, %"struct.std::string" }
+ %"struct.llvm::GlobalVariable" = type opaque
+ %"struct.llvm::Instruction" = type { %"struct.llvm::User", %"struct.llvm::ilist_node<llvm::Instruction>", %"struct.llvm::BasicBlock"* }
+ %"struct.llvm::LiveInterval" = type <{ i32, float, i16, [6 x i8], %"struct.llvm::SmallVector<llvm::LiveRange,4u>", %"struct.llvm::SmallVector<llvm::MachineBasicBlock*,4u>" }>
+ %"struct.llvm::LiveIntervals" = type { %"struct.llvm::MachineFunctionPass", %"struct.llvm::MachineFunction"*, %"struct.llvm::MachineRegisterInfo"*, %"struct.llvm::TargetMachine"*, %"struct.llvm::TargetRegisterInfo"*, %"struct.llvm::TargetInstrInfo"*, %"struct.llvm::AliasAnalysis"*, %"struct.llvm::LiveVariables"*, %"struct.llvm::BumpPtrAllocator", %"struct.std::vector<std::pair<unsigned int, unsigned int>,std::allocator<std::pair<unsigned int, unsigned int> > >", %"struct.std::vector<std::pair<unsigned int, llvm::MachineBasicBlock*>,std::allocator<std::pair<unsigned int, llvm::MachineBasicBlock*> > >", i64, %"struct.llvm::DenseMap<llvm::MachineInstr*,unsigned int,llvm::DenseMapInfo<llvm::MachineInstr*>,llvm::DenseMapInfo<unsigned int> >", %"struct.std::vector<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >", %"struct.llvm::DenseMap<unsigned int,llvm::LiveInterval*,llvm::DenseMapInfo<unsigned int>,llvm::DenseMapInfo<llvm::LiveInterval*> >", %"struct.llvm::BitVector", %"struct.std::vector<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >" }
+ %"struct.llvm::LiveVariables" = type opaque
+ %"struct.llvm::MVT" = type { %"struct..1$_69" }
+ %"struct.llvm::MachineBasicBlock" = type { %"struct.llvm::ilist_node<llvm::MachineBasicBlock>", %"struct.llvm::ilist<llvm::MachineInstr>", %"struct.llvm::BasicBlock"*, i32, %"struct.llvm::MachineFunction"*, %"struct.std::vector<llvm::MachineBasicBlock*,std::allocator<llvm::MachineBasicBlock*> >", %"struct.std::vector<llvm::MachineBasicBlock*,std::allocator<llvm::MachineBasicBlock*> >", %"struct.std::vector<int,std::allocator<int> >", i32, i8 }
+ %"struct.llvm::MachineConstantPool" = type opaque
+ %"struct.llvm::MachineFrameInfo" = type { %"struct.std::vector<llvm::MachineFrameInfo::StackObject,std::allocator<llvm::MachineFrameInfo::StackObject> >", i32, i8, i8, i64, i32, i32, i8, i32, i32, %"struct.std::vector<llvm::CalleeSavedInfo,std::allocator<llvm::CalleeSavedInfo> >", %"struct.llvm::MachineModuleInfo"*, %"struct.llvm::TargetFrameInfo"* }
+ %"struct.llvm::MachineFrameInfo::StackObject" = type { i64, i32, i8, i64 }
+ %"struct.llvm::MachineFunction" = type { %"struct.llvm::Annotation", %"struct.llvm::Function"*, %"struct.llvm::TargetMachine"*, %"struct.llvm::MachineRegisterInfo"*, %"struct.llvm::AbstractTypeUser"*, %"struct.llvm::MachineFrameInfo"*, %"struct.llvm::MachineConstantPool"*, %"struct.llvm::MachineJumpTableInfo"*, %"struct.std::vector<llvm::MachineBasicBlock*,std::allocator<llvm::MachineBasicBlock*> >", %"struct.llvm::BumpPtrAllocator", %"struct.llvm::Recycler<llvm::MachineBasicBlock,80ul,4ul>", %"struct.llvm::Recycler<llvm::MachineBasicBlock,80ul,4ul>", %"struct.llvm::ilist<llvm::MachineBasicBlock>", %"struct..1$_69", %"struct.llvm::DebugLocTracker" }
+ %"struct.llvm::MachineFunctionPass" = type { %"struct.llvm::FunctionPass" }
+ %"struct.llvm::MachineInstr" = type { %"struct.llvm::ilist_node<llvm::MachineInstr>", %"struct.llvm::TargetInstrDesc"*, i16, %"struct.std::vector<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >", %"struct.std::list<llvm::MachineMemOperand,std::allocator<llvm::MachineMemOperand> >", %"struct.llvm::MachineBasicBlock"*, %"struct..1$_69" }
+ %"struct.llvm::MachineJumpTableInfo" = type opaque
+ %"struct.llvm::MachineModuleInfo" = type opaque
+ %"struct.llvm::MachineOperand" = type { i8, i8, i8, %"struct.llvm::MachineInstr"*, %"struct.llvm::MachineOperand::$_66" }
+ %"struct.llvm::MachineOperand::$_66" = type { %"struct..0$_67" }
+ %"struct.llvm::MachineRegisterInfo" = type { %"struct.std::vector<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*>,std::allocator<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*> > >", %"struct.std::vector<std::vector<unsigned int, std::allocator<unsigned int> >,std::allocator<std::vector<unsigned int, std::allocator<unsigned int> > > >", %"struct.llvm::MachineOperand"**, %"struct.llvm::BitVector", %"struct.std::vector<std::pair<unsigned int, unsigned int>,std::allocator<std::pair<unsigned int, unsigned int> > >", %"struct.std::vector<int,std::allocator<int> >" }
+ %"struct.llvm::Module" = type opaque
+ %"struct.llvm::PATypeHandle" = type { %"struct.llvm::Type"*, %"struct.llvm::AbstractTypeUser"* }
+ %"struct.llvm::PATypeHolder" = type { %"struct.llvm::Type"* }
+ %"struct.llvm::PMDataManager" = type opaque
+ %"struct.llvm::Pass" = type { i32 (...)**, %"struct.llvm::AnalysisResolver"*, i32 }
+ %"struct.llvm::PassInfo" = type { i8*, i8*, i32, i8, i8, i8, %"struct.std::vector<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >", %"struct.llvm::Pass"* ()* }
+ %"struct.llvm::Recycler<llvm::MachineBasicBlock,80ul,4ul>" = type { %"struct.llvm::iplist<llvm::RecyclerStruct,llvm::ilist_traits<llvm::RecyclerStruct> >" }
+ %"struct.llvm::RecyclerStruct" = type { %"struct.llvm::RecyclerStruct"*, %"struct.llvm::RecyclerStruct"* }
+ %"struct.llvm::SmallVector<llvm::LiveRange,4u>" = type <{ [17 x i8], [47 x i8] }>
+ %"struct.llvm::SmallVector<llvm::MachineBasicBlock*,4u>" = type <{ [17 x i8], [15 x i8] }>
+ %"struct.llvm::TargetAsmInfo" = type opaque
+ %"struct.llvm::TargetFrameInfo" = type opaque
+ %"struct.llvm::TargetInstrDesc" = type { i16, i16, i16, i16, i8*, i32, i32, i32*, i32*, %"struct.llvm::TargetRegisterClass"**, %"struct.llvm::TargetOperandInfo"* }
+ %"struct.llvm::TargetInstrInfo" = type { i32 (...)**, %"struct.llvm::TargetInstrDesc"*, i32 }
+ %"struct.llvm::TargetMachine" = type { i32 (...)**, %"struct.llvm::TargetAsmInfo"* }
+ %"struct.llvm::TargetOperandInfo" = type { i16, i16, i32 }
+ %"struct.llvm::TargetRegisterClass" = type { i32 (...)**, i32, i8*, %"struct.llvm::MVT"*, %"struct.llvm::TargetRegisterClass"**, %"struct.llvm::TargetRegisterClass"**, %"struct.llvm::TargetRegisterClass"**, %"struct.llvm::TargetRegisterClass"**, i32, i32, i32, i32*, i32*, %"struct.llvm::DenseSet<unsigned int,llvm::DenseMapInfo<unsigned int> >" }
+ %"struct.llvm::TargetRegisterDesc" = type { i8*, i8*, i32*, i32*, i32* }
+ %"struct.llvm::TargetRegisterInfo" = type { i32 (...)**, i32*, i32, i32*, i32, i32*, i32, %"struct.llvm::TargetRegisterDesc"*, i32, %"struct.llvm::TargetRegisterClass"**, %"struct.llvm::TargetRegisterClass"**, i32, i32 }
+ %"struct.llvm::Type" = type { %"struct.llvm::AbstractTypeUser", i8, [3 x i8], i32, %"struct.llvm::Type"*, %"struct.std::vector<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >", i32, %"struct.llvm::PATypeHandle"* }
+ %"struct.llvm::Use" = type { %"struct.llvm::Value"*, %"struct.llvm::Use"*, %"struct..1$_69" }
+ %"struct.llvm::User" = type { %"struct.llvm::Value", %"struct.llvm::Use"*, i32 }
+ %"struct.llvm::Value" = type { i32 (...)**, i8, i8, i16, %"struct.llvm::PATypeHolder", %"struct.llvm::Use"*, %"struct.llvm::ValueName"* }
+ %"struct.llvm::ValueName" = type opaque
+ %"struct.llvm::ValueSymbolTable" = type opaque
+ %"struct.llvm::ilist<llvm::MachineBasicBlock>" = type { %"struct.llvm::iplist<llvm::MachineBasicBlock,llvm::ilist_traits<llvm::MachineBasicBlock> >" }
+ %"struct.llvm::ilist<llvm::MachineInstr>" = type { %"struct.llvm::iplist<llvm::MachineInstr,llvm::ilist_traits<llvm::MachineInstr> >" }
+ %"struct.llvm::ilist_node<llvm::Argument>" = type { %"struct.llvm::Argument"*, %"struct.llvm::Argument"* }
+ %"struct.llvm::ilist_node<llvm::BasicBlock>" = type { %"struct.llvm::BasicBlock"*, %"struct.llvm::BasicBlock"* }
+ %"struct.llvm::ilist_node<llvm::Function>" = type { %"struct.llvm::Function"*, %"struct.llvm::Function"* }
+ %"struct.llvm::ilist_node<llvm::Instruction>" = type { %"struct.llvm::Instruction"*, %"struct.llvm::Instruction"* }
+ %"struct.llvm::ilist_node<llvm::MachineBasicBlock>" = type { %"struct.llvm::MachineBasicBlock"*, %"struct.llvm::MachineBasicBlock"* }
+ %"struct.llvm::ilist_node<llvm::MachineInstr>" = type { %"struct.llvm::MachineInstr"*, %"struct.llvm::MachineInstr"* }
+ %"struct.llvm::ilist_traits<llvm::Argument>" = type { %"struct.llvm::ilist_node<llvm::Argument>" }
+ %"struct.llvm::ilist_traits<llvm::BasicBlock>" = type { %"struct.llvm::ilist_node<llvm::BasicBlock>" }
+ %"struct.llvm::ilist_traits<llvm::Instruction>" = type { %"struct.llvm::ilist_node<llvm::Instruction>" }
+ %"struct.llvm::ilist_traits<llvm::MachineBasicBlock>" = type { %"struct.llvm::ilist_node<llvm::MachineBasicBlock>" }
+ %"struct.llvm::ilist_traits<llvm::MachineInstr>" = type { %"struct.llvm::ilist_node<llvm::MachineInstr>", %"struct.llvm::MachineBasicBlock"* }
+ %"struct.llvm::ilist_traits<llvm::RecyclerStruct>" = type { %"struct.llvm::RecyclerStruct" }
+ %"struct.llvm::iplist<llvm::Argument,llvm::ilist_traits<llvm::Argument> >" = type { %"struct.llvm::ilist_traits<llvm::Argument>", %"struct.llvm::Argument"* }
+ %"struct.llvm::iplist<llvm::BasicBlock,llvm::ilist_traits<llvm::BasicBlock> >" = type { %"struct.llvm::ilist_traits<llvm::BasicBlock>", %"struct.llvm::BasicBlock"* }
+ %"struct.llvm::iplist<llvm::Instruction,llvm::ilist_traits<llvm::Instruction> >" = type { %"struct.llvm::ilist_traits<llvm::Instruction>", %"struct.llvm::Instruction"* }
+ %"struct.llvm::iplist<llvm::MachineBasicBlock,llvm::ilist_traits<llvm::MachineBasicBlock> >" = type { %"struct.llvm::ilist_traits<llvm::MachineBasicBlock>", %"struct.llvm::MachineBasicBlock"* }
+ %"struct.llvm::iplist<llvm::MachineInstr,llvm::ilist_traits<llvm::MachineInstr> >" = type { %"struct.llvm::ilist_traits<llvm::MachineInstr>", %"struct.llvm::MachineInstr"* }
+ %"struct.llvm::iplist<llvm::RecyclerStruct,llvm::ilist_traits<llvm::RecyclerStruct> >" = type { %"struct.llvm::ilist_traits<llvm::RecyclerStruct>", %"struct.llvm::RecyclerStruct"* }
+ %"struct.std::IdxMBBPair" = type { i32, %"struct.llvm::MachineBasicBlock"* }
+ %"struct.std::_List_base<llvm::MachineMemOperand,std::allocator<llvm::MachineMemOperand> >" = type { %"struct.llvm::ilist_traits<llvm::RecyclerStruct>" }
+ %"struct.std::_Vector_base<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >" = type { %"struct.std::_Vector_base<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >::_Vector_impl" }
+ %"struct.std::_Vector_base<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >::_Vector_impl" = type { %"struct.llvm::PassInfo"**, %"struct.llvm::PassInfo"**, %"struct.llvm::PassInfo"** }
+ %"struct.std::_Vector_base<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl" }
+ %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl" = type { i32*, i32*, i32* }
+ %"struct.std::_Vector_base<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >" = type { %"struct.std::_Vector_base<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >::_Vector_impl" }
+ %"struct.std::_Vector_base<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >::_Vector_impl" = type { %"struct.llvm::AbstractTypeUser"**, %"struct.llvm::AbstractTypeUser"**, %"struct.llvm::AbstractTypeUser"** }
+ %"struct.std::_Vector_base<llvm::CalleeSavedInfo,std::allocator<llvm::CalleeSavedInfo> >" = type { %"struct.std::_Vector_base<llvm::CalleeSavedInfo,std::allocator<llvm::CalleeSavedInfo> >::_Vector_impl" }
+ %"struct.std::_Vector_base<llvm::CalleeSavedInfo,std::allocator<llvm::CalleeSavedInfo> >::_Vector_impl" = type { %"struct.llvm::CalleeSavedInfo"*, %"struct.llvm::CalleeSavedInfo"*, %"struct.llvm::CalleeSavedInfo"* }
+ %"struct.std::_Vector_base<llvm::DebugLocTuple,std::allocator<llvm::DebugLocTuple> >" = type { %"struct.std::_Vector_base<llvm::DebugLocTuple,std::allocator<llvm::DebugLocTuple> >::_Vector_impl" }
+ %"struct.std::_Vector_base<llvm::DebugLocTuple,std::allocator<llvm::DebugLocTuple> >::_Vector_impl" = type { %"struct.llvm::DebugLocTuple"*, %"struct.llvm::DebugLocTuple"*, %"struct.llvm::DebugLocTuple"* }
+ %"struct.std::_Vector_base<llvm::MachineBasicBlock*,std::allocator<llvm::MachineBasicBlock*> >" = type { %"struct.std::_Vector_base<llvm::MachineBasicBlock*,std::allocator<llvm::MachineBasicBlock*> >::_Vector_impl" }
+ %"struct.std::_Vector_base<llvm::MachineBasicBlock*,std::allocator<llvm::MachineBasicBlock*> >::_Vector_impl" = type { %"struct.llvm::MachineBasicBlock"**, %"struct.llvm::MachineBasicBlock"**, %"struct.llvm::MachineBasicBlock"** }
+ %"struct.std::_Vector_base<llvm::MachineFrameInfo::StackObject,std::allocator<llvm::MachineFrameInfo::StackObject> >" = type { %"struct.std::_Vector_base<llvm::MachineFrameInfo::StackObject,std::allocator<llvm::MachineFrameInfo::StackObject> >::_Vector_impl" }
+ %"struct.std::_Vector_base<llvm::MachineFrameInfo::StackObject,std::allocator<llvm::MachineFrameInfo::StackObject> >::_Vector_impl" = type { %"struct.llvm::MachineFrameInfo::StackObject"*, %"struct.llvm::MachineFrameInfo::StackObject"*, %"struct.llvm::MachineFrameInfo::StackObject"* }
+ %"struct.std::_Vector_base<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >" = type { %"struct.std::_Vector_base<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >::_Vector_impl" }
+ %"struct.std::_Vector_base<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >::_Vector_impl" = type { %"struct.llvm::MachineInstr"**, %"struct.llvm::MachineInstr"**, %"struct.llvm::MachineInstr"** }
+ %"struct.std::_Vector_base<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >" = type { %"struct.std::_Vector_base<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >::_Vector_impl" }
+ %"struct.std::_Vector_base<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >::_Vector_impl" = type { %"struct.llvm::MachineOperand"*, %"struct.llvm::MachineOperand"*, %"struct.llvm::MachineOperand"* }
+ %"struct.std::_Vector_base<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >" = type { %"struct.std::_Vector_base<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >::_Vector_impl" }
+ %"struct.std::_Vector_base<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >::_Vector_impl" = type { %"struct.std::pair<const llvm::PassInfo*,llvm::Pass*>"*, %"struct.std::pair<const llvm::PassInfo*,llvm::Pass*>"*, %"struct.std::pair<const llvm::PassInfo*,llvm::Pass*>"* }
+ %"struct.std::_Vector_base<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*>,std::allocator<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*> > >" = type { %"struct.std::_Vector_base<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*>,std::allocator<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*> > >::_Vector_impl" }
+ %"struct.std::_Vector_base<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*>,std::allocator<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*> > >::_Vector_impl" = type { %"struct.std::pair<const llvm::TargetRegisterClass*,llvm::MachineOperand*>"*, %"struct.std::pair<const llvm::TargetRegisterClass*,llvm::MachineOperand*>"*, %"struct.std::pair<const llvm::TargetRegisterClass*,llvm::MachineOperand*>"* }
+ %"struct.std::_Vector_base<std::pair<unsigned int, llvm::MachineBasicBlock*>,std::allocator<std::pair<unsigned int, llvm::MachineBasicBlock*> > >" = type { %"struct.std::_Vector_base<std::pair<unsigned int, llvm::MachineBasicBlock*>,std::allocator<std::pair<unsigned int, llvm::MachineBasicBlock*> > >::_Vector_impl" }
+ %"struct.std::_Vector_base<std::pair<unsigned int, llvm::MachineBasicBlock*>,std::allocator<std::pair<unsigned int, llvm::MachineBasicBlock*> > >::_Vector_impl" = type { %"struct.std::IdxMBBPair"*, %"struct.std::IdxMBBPair"*, %"struct.std::IdxMBBPair"* }
+ %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>,std::allocator<std::pair<unsigned int, unsigned int> > >" = type { %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>,std::allocator<std::pair<unsigned int, unsigned int> > >::_Vector_impl" }
+ %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>,std::allocator<std::pair<unsigned int, unsigned int> > >::_Vector_impl" = type { %"struct.std::pair<unsigned int,int>"*, %"struct.std::pair<unsigned int,int>"*, %"struct.std::pair<unsigned int,int>"* }
+ %"struct.std::_Vector_base<std::vector<unsigned int, std::allocator<unsigned int> >,std::allocator<std::vector<unsigned int, std::allocator<unsigned int> > > >" = type { %"struct.std::_Vector_base<std::vector<unsigned int, std::allocator<unsigned int> >,std::allocator<std::vector<unsigned int, std::allocator<unsigned int> > > >::_Vector_impl" }
+ %"struct.std::_Vector_base<std::vector<unsigned int, std::allocator<unsigned int> >,std::allocator<std::vector<unsigned int, std::allocator<unsigned int> > > >::_Vector_impl" = type { %"struct.std::vector<int,std::allocator<int> >"*, %"struct.std::vector<int,std::allocator<int> >"*, %"struct.std::vector<int,std::allocator<int> >"* }
+ %"struct.std::list<llvm::MachineMemOperand,std::allocator<llvm::MachineMemOperand> >" = type { %"struct.std::_List_base<llvm::MachineMemOperand,std::allocator<llvm::MachineMemOperand> >" }
+ %"struct.std::pair<const llvm::PassInfo*,llvm::Pass*>" = type { %"struct.llvm::PassInfo"*, %"struct.llvm::Pass"* }
+ %"struct.std::pair<const llvm::TargetRegisterClass*,llvm::MachineOperand*>" = type { %"struct.llvm::TargetRegisterClass"*, %"struct.llvm::MachineOperand"* }
+ %"struct.std::pair<llvm::DebugLocTuple,unsigned int>" = type { %"struct.llvm::DebugLocTuple", i32 }
+ %"struct.std::pair<llvm::MachineInstr*,unsigned int>" = type { %"struct.llvm::MachineInstr"*, i32 }
+ %"struct.std::pair<unsigned int,char>" = type { i32, i8 }
+ %"struct.std::pair<unsigned int,int>" = type { i32, i32 }
+ %"struct.std::pair<unsigned int,llvm::LiveInterval*>" = type { i32, %"struct.llvm::LiveInterval"* }
+ %"struct.std::string" = type { %"struct.llvm::BumpPtrAllocator" }
+ %"struct.std::vector<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >" = type { %"struct.std::_Vector_base<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >" }
+ %"struct.std::vector<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >" }
+ %"struct.std::vector<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >" = type { %"struct.std::_Vector_base<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >" }
+ %"struct.std::vector<llvm::CalleeSavedInfo,std::allocator<llvm::CalleeSavedInfo> >" = type { %"struct.std::_Vector_base<llvm::CalleeSavedInfo,std::allocator<llvm::CalleeSavedInfo> >" }
+ %"struct.std::vector<llvm::DebugLocTuple,std::allocator<llvm::DebugLocTuple> >" = type { %"struct.std::_Vector_base<llvm::DebugLocTuple,std::allocator<llvm::DebugLocTuple> >" }
+ %"struct.std::vector<llvm::MachineBasicBlock*,std::allocator<llvm::MachineBasicBlock*> >" = type { %"struct.std::_Vector_base<llvm::MachineBasicBlock*,std::allocator<llvm::MachineBasicBlock*> >" }
+ %"struct.std::vector<llvm::MachineFrameInfo::StackObject,std::allocator<llvm::MachineFrameInfo::StackObject> >" = type { %"struct.std::_Vector_base<llvm::MachineFrameInfo::StackObject,std::allocator<llvm::MachineFrameInfo::StackObject> >" }
+ %"struct.std::vector<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >" = type { %"struct.std::_Vector_base<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >" }
+ %"struct.std::vector<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >" = type { %"struct.std::_Vector_base<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >" }
+ %"struct.std::vector<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >" = type { %"struct.std::_Vector_base<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >" }
+ %"struct.std::vector<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*>,std::allocator<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*> > >" = type { %"struct.std::_Vector_base<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*>,std::allocator<std::pair<const llvm::TargetRegisterClass*, llvm::MachineOperand*> > >" }
+ %"struct.std::vector<std::pair<unsigned int, llvm::MachineBasicBlock*>,std::allocator<std::pair<unsigned int, llvm::MachineBasicBlock*> > >" = type { %"struct.std::_Vector_base<std::pair<unsigned int, llvm::MachineBasicBlock*>,std::allocator<std::pair<unsigned int, llvm::MachineBasicBlock*> > >" }
+ %"struct.std::vector<std::pair<unsigned int, unsigned int>,std::allocator<std::pair<unsigned int, unsigned int> > >" = type { %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>,std::allocator<std::pair<unsigned int, unsigned int> > >" }
+ %"struct.std::vector<std::vector<unsigned int, std::allocator<unsigned int> >,std::allocator<std::vector<unsigned int, std::allocator<unsigned int> > > >" = type { %"struct.std::_Vector_base<std::vector<unsigned int, std::allocator<unsigned int> >,std::allocator<std::vector<unsigned int, std::allocator<unsigned int> > > >" }
+@_ZZNK4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE15LookupBucketForERKS2_RPSt4pairIS2_jEE8__func__ = external constant [16 x i8] ; <[16 x i8]*> [#uses=1]
+@"\01LC6" = external constant [56 x i8] ; <[56 x i8]*> [#uses=1]
+@"\01LC7" = external constant [134 x i8] ; <[134 x i8]*> [#uses=1]
+@"\01LC8" = external constant [72 x i8] ; <[72 x i8]*> [#uses=1]
+@_ZZN4llvm13LiveIntervals24InsertMachineInstrInMapsEPNS_12MachineInstrEjE8__func__ = external constant [25 x i8] ; <[25 x i8]*> [#uses=1]
+@"\01LC51" = external constant [42 x i8] ; <[42 x i8]*> [#uses=1]
+
+define void @_ZN4llvm13LiveIntervals24InsertMachineInstrInMapsEPNS_12MachineInstrEj(%"struct.llvm::LiveIntervals"* nocapture %this, %"struct.llvm::MachineInstr"* %MI, i32 %Index) nounwind ssp {
+entry:
+ %0 = call i64 @_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE4findERKS2_(%"struct.llvm::DenseMap<llvm::MachineInstr*,unsigned int,llvm::DenseMapInfo<llvm::MachineInstr*>,llvm::DenseMapInfo<unsigned int> >"* null, %"struct.llvm::MachineInstr"** null) nounwind ssp ; <i64> [#uses=1]
+ %1 = trunc i64 %0 to i32 ; <i32> [#uses=1]
+ %tmp11 = inttoptr i32 %1 to %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* ; <%"struct.std::pair<llvm::MachineInstr*,unsigned int>"*> [#uses=1]
+ %2 = load %"struct.std::pair<llvm::MachineInstr*,unsigned int>"** null, align 4 ; <%"struct.std::pair<llvm::MachineInstr*,unsigned int>"*> [#uses=3]
+ %3 = getelementptr %"struct.llvm::LiveIntervals"* %this, i32 0, i32 12, i32 0 ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 4 ; <i32> [#uses=2]
+ %5 = getelementptr %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %2, i32 %4 ; <%"struct.std::pair<llvm::MachineInstr*,unsigned int>"*> [#uses=1]
+ br label %bb1.i.i.i
+
+bb.i.i.i: ; preds = %bb2.i.i.i
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb1.i.i.i
+
+bb1.i.i.i: ; preds = %bb.i.i.i, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb.i.i.i ] ; <i32> [#uses=2]
+ %tmp32 = shl i32 %indvar, 3 ; <i32> [#uses=1]
+ %ctg2.sum = add i32 0, %tmp32 ; <i32> [#uses=1]
+ %ctg237 = getelementptr i8* null, i32 %ctg2.sum ; <i8*> [#uses=1]
+ %.0.0.i = bitcast i8* %ctg237 to %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* ; <%"struct.std::pair<llvm::MachineInstr*,unsigned int>"*> [#uses=2]
+ %6 = icmp eq %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %.0.0.i, %5 ; <i1> [#uses=1]
+ br i1 %6, label %_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE3endEv.exit, label %bb2.i.i.i
+
+bb2.i.i.i: ; preds = %bb1.i.i.i
+ %7 = load %"struct.llvm::MachineInstr"** null, align 4 ; <%"struct.llvm::MachineInstr"*> [#uses=1]
+ %8 = icmp eq %"struct.llvm::MachineInstr"* %7, inttoptr (i32 -8 to %"struct.llvm::MachineInstr"*) ; <i1> [#uses=1]
+ %or.cond.i.i.i21 = or i1 false, %8 ; <i1> [#uses=1]
+ br i1 %or.cond.i.i.i21, label %bb.i.i.i, label %_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE3endEv.exit
+
+_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE3endEv.exit: ; preds = %bb2.i.i.i, %bb1.i.i.i
+ %9 = icmp eq %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %tmp11, %.0.0.i ; <i1> [#uses=1]
+ br i1 %9, label %bb7, label %bb6
+
+bb6: ; preds = %_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE3endEv.exit
+ call void @__assert_rtn(i8* getelementptr ([25 x i8]* @_ZZN4llvm13LiveIntervals24InsertMachineInstrInMapsEPNS_12MachineInstrEjE8__func__, i32 0, i32 0), i8* getelementptr ([72 x i8]* @"\01LC8", i32 0, i32 0), i32 251, i8* getelementptr ([42 x i8]* @"\01LC51", i32 0, i32 0)) noreturn nounwind
+ unreachable
+
+bb7: ; preds = %_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE3endEv.exit
+ %10 = load %"struct.llvm::MachineInstr"** null, align 4 ; <%"struct.llvm::MachineInstr"*> [#uses=2]
+ %11 = icmp eq %"struct.llvm::MachineInstr"* %10, inttoptr (i32 -8 to %"struct.llvm::MachineInstr"*) ; <i1> [#uses=1]
+ %or.cond40.i.i.i = or i1 false, %11 ; <i1> [#uses=1]
+ br i1 %or.cond40.i.i.i, label %bb5.i.i.i, label %bb6.preheader.i.i.i
+
+bb6.preheader.i.i.i: ; preds = %bb7
+ %12 = add i32 %4, -1 ; <i32> [#uses=1]
+ br label %bb6.i.i.i
+
+bb5.i.i.i: ; preds = %bb7
+ call void @__assert_rtn(i8* getelementptr ([16 x i8]* @_ZZNK4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE15LookupBucketForERKS2_RPSt4pairIS2_jEE8__func__, i32 0, i32 0), i8* getelementptr ([56 x i8]* @"\01LC6", i32 0, i32 0), i32 390, i8* getelementptr ([134 x i8]* @"\01LC7", i32 0, i32 0)) noreturn nounwind
+ unreachable
+
+bb6.i.i.i: ; preds = %bb17.i.i.i, %bb6.preheader.i.i.i
+ %FoundTombstone.1.i.i.i = phi %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* [ %FoundTombstone.0.i.i.i, %bb17.i.i.i ], [ null, %bb6.preheader.i.i.i ] ; <%"struct.std::pair<llvm::MachineInstr*,unsigned int>"*> [#uses=2]
+ %ProbeAmt.0.i.i.i = phi i32 [ 0, %bb17.i.i.i ], [ 1, %bb6.preheader.i.i.i ] ; <i32> [#uses=1]
+ %BucketNo.0.i.i.i = phi i32 [ %20, %bb17.i.i.i ], [ 0, %bb6.preheader.i.i.i ] ; <i32> [#uses=2]
+ %13 = and i32 %BucketNo.0.i.i.i, %12 ; <i32> [#uses=2]
+ %14 = getelementptr %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %2, i32 %13 ; <%"struct.std::pair<llvm::MachineInstr*,unsigned int>"*> [#uses=2]
+ %15 = getelementptr %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %2, i32 %13, i32 0 ; <%"struct.llvm::MachineInstr"**> [#uses=1]
+ %16 = load %"struct.llvm::MachineInstr"** %15, align 4 ; <%"struct.llvm::MachineInstr"*> [#uses=2]
+ %17 = icmp eq %"struct.llvm::MachineInstr"* %16, %10 ; <i1> [#uses=1]
+ br i1 %17, label %_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEEixERKS2_.exit, label %bb17.i.i.i
+
+bb17.i.i.i: ; preds = %bb6.i.i.i
+ %18 = icmp eq %"struct.llvm::MachineInstr"* %16, inttoptr (i32 -8 to %"struct.llvm::MachineInstr"*) ; <i1> [#uses=1]
+ %19 = icmp eq %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %FoundTombstone.1.i.i.i, null ; <i1> [#uses=1]
+ %or.cond.i.i.i = and i1 %18, %19 ; <i1> [#uses=1]
+ %FoundTombstone.0.i.i.i = select i1 %or.cond.i.i.i, %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %14, %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %FoundTombstone.1.i.i.i ; <%"struct.std::pair<llvm::MachineInstr*,unsigned int>"*> [#uses=1]
+ %20 = add i32 %BucketNo.0.i.i.i, %ProbeAmt.0.i.i.i ; <i32> [#uses=1]
+ br label %bb6.i.i.i
+
+_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEEixERKS2_.exit: ; preds = %bb6.i.i.i
+ %21 = getelementptr %"struct.std::pair<llvm::MachineInstr*,unsigned int>"* %14, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %Index, i32* %21, align 4
+ ret void
+}
+
+declare void @__assert_rtn(i8*, i8*, i32, i8*) noreturn
+
+declare i64 @_ZN4llvm8DenseMapIPNS_12MachineInstrEjNS_12DenseMapInfoIS2_EENS3_IjEEE4findERKS2_(%"struct.llvm::DenseMap<llvm::MachineInstr*,unsigned int,llvm::DenseMapInfo<llvm::MachineInstr*>,llvm::DenseMapInfo<unsigned int> >"* nocapture, %"struct.llvm::MachineInstr"** nocapture) nounwind ssp
diff --git a/test/CodeGen/X86/stack-color-with-reg.ll b/test/CodeGen/X86/stack-color-with-reg.ll
new file mode 100644
index 0000000..7d85818
--- /dev/null
+++ b/test/CodeGen/X86/stack-color-with-reg.ll
@@ -0,0 +1,360 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t
+; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 14
+
+ type { [62 x %struct.Bitvec*] } ; type %0
+ type { i8* } ; type %1
+ type { double } ; type %2
+ %struct..5sPragmaType = type { i8*, i32 }
+ %struct.AggInfo = type { i8, i8, i32, %struct.ExprList*, i32, %struct.AggInfo_col*, i32, i32, i32, %struct.AggInfo_func*, i32, i32 }
+ %struct.AggInfo_col = type { %struct.Table*, i32, i32, i32, i32, %struct.Expr* }
+ %struct.AggInfo_func = type { %struct.Expr*, %struct.FuncDef*, i32, i32 }
+ %struct.AuxData = type { i8*, void (i8*)* }
+ %struct.Bitvec = type { i32, i32, i32, %0 }
+ %struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* }
+ %struct.BtLock = type { %struct.Btree*, i32, i8, %struct.BtLock* }
+ %struct.BtShared = type { %struct.Pager*, %struct.sqlite3*, %struct.BtCursor*, %struct.MemPage*, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, i8, i32, i8*, void (i8*)*, %struct.sqlite3_mutex*, %struct.BusyHandler, i32, %struct.BtShared*, %struct.BtLock*, %struct.Btree* }
+ %struct.Btree = type { %struct.sqlite3*, %struct.BtShared*, i8, i8, i8, i32, %struct.Btree*, %struct.Btree* }
+ %struct.BtreeMutexArray = type { i32, [11 x %struct.Btree*] }
+ %struct.BusyHandler = type { i32 (i8*, i32)*, i8*, i32 }
+ %struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 }
+ %struct.CollSeq = type { i8*, i8, i8, i8*, i32 (i8*, i32, i8*, i32, i8*)*, void (i8*)* }
+ %struct.Column = type { i8*, %struct.Expr*, i8*, i8*, i8, i8, i8, i8 }
+ %struct.Context = type { i64, i32, %struct.Fifo }
+ %struct.CountCtx = type { i64 }
+ %struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8* }
+ %struct.Db = type { i8*, %struct.Btree*, i8, i8, i8*, void (i8*)*, %struct.Schema* }
+ %struct.DbPage = type { %struct.Pager*, i32, %struct.DbPage*, %struct.DbPage*, %struct.PagerLruLink, %struct.DbPage*, i8, i8, i8, i8, i8, i16, %struct.DbPage*, %struct.DbPage*, i8* }
+ %struct.Expr = type { i8, i8, i16, %struct.CollSeq*, %struct.Expr*, %struct.Expr*, %struct.ExprList*, %struct..5sPragmaType, %struct..5sPragmaType, i32, i32, %struct.AggInfo*, i32, i32, %struct.Select*, %struct.Table*, i32 }
+ %struct.ExprList = type { i32, i32, i32, %struct.ExprList_item* }
+ %struct.ExprList_item = type { %struct.Expr*, i8*, i8, i8, i8 }
+ %struct.FKey = type { %struct.Table*, %struct.FKey*, i8*, %struct.FKey*, i32, %struct.sColMap*, i8, i8, i8, i8 }
+ %struct.Fifo = type { i32, %struct.FifoPage*, %struct.FifoPage* }
+ %struct.FifoPage = type { i32, i32, i32, %struct.FifoPage*, [1 x i64] }
+ %struct.FuncDef = type { i16, i8, i8, i8, i8*, %struct.FuncDef*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*)*, [1 x i8] }
+ %struct.Hash = type { i8, i8, i32, i32, %struct.HashElem*, %struct._ht* }
+ %struct.HashElem = type { %struct.HashElem*, %struct.HashElem*, i8*, i8*, i32 }
+ %struct.IdList = type { %struct..5sPragmaType*, i32, i32 }
+ %struct.Index = type { i8*, i32, i32*, i32*, %struct.Table*, i32, i8, i8, i8*, %struct.Index*, %struct.Schema*, i8*, i8** }
+ %struct.KeyInfo = type { %struct.sqlite3*, i8, i8, i8, i32, i8*, [1 x %struct.CollSeq*] }
+ %struct.Mem = type { %struct.CountCtx, double, %struct.sqlite3*, i8*, i32, i16, i8, i8, void (i8*)* }
+ %struct.MemPage = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, [5 x %struct._OvflCell], %struct.BtShared*, i8*, %struct.DbPage*, i32, %struct.MemPage* }
+ %struct.Module = type { %struct.sqlite3_module*, i8*, i8*, void (i8*)* }
+ %struct.Op = type { i8, i8, i8, i8, i32, i32, i32, %1 }
+ %struct.Pager = type { %struct.sqlite3_vfs*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Bitvec*, %struct.Bitvec*, i8*, i8*, i8*, i8*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.BusyHandler*, %struct.PagerLruList, %struct.DbPage*, %struct.DbPage*, %struct.DbPage*, i64, i64, i64, i64, i64, i32, void (%struct.DbPage*, i32)*, void (%struct.DbPage*, i32)*, i32, %struct.DbPage**, i8*, [16 x i8] }
+ %struct.PagerLruLink = type { %struct.DbPage*, %struct.DbPage* }
+ %struct.PagerLruList = type { %struct.DbPage*, %struct.DbPage*, %struct.DbPage* }
+ %struct.Schema = type { i32, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Table*, i8, i8, i16, i32, %struct.sqlite3* }
+ %struct.Select = type { %struct.ExprList*, i8, i8, i8, i8, i8, i8, i8, %struct.SrcList*, %struct.Expr*, %struct.ExprList*, %struct.Expr*, %struct.ExprList*, %struct.Select*, %struct.Select*, %struct.Select*, %struct.Expr*, %struct.Expr*, i32, i32, [3 x i32] }
+ %struct.SrcList = type { i16, i16, [1 x %struct.SrcList_item] }
+ %struct.SrcList_item = type { i8*, i8*, i8*, %struct.Table*, %struct.Select*, i8, i8, i32, %struct.Expr*, %struct.IdList*, i64 }
+ %struct.Table = type { i8*, i32, %struct.Column*, i32, %struct.Index*, i32, %struct.Select*, i32, %struct.Trigger*, %struct.FKey*, i8*, %struct.Expr*, i32, i8, i8, i8, i8, i8, i8, i8, %struct.Module*, %struct.sqlite3_vtab*, i32, i8**, %struct.Schema* }
+ %struct.Trigger = type { i8*, i8*, i8, i8, %struct.Expr*, %struct.IdList*, %struct..5sPragmaType, %struct.Schema*, %struct.Schema*, %struct.TriggerStep*, %struct.Trigger* }
+ %struct.TriggerStep = type { i32, i32, %struct.Trigger*, %struct.Select*, %struct..5sPragmaType, %struct.Expr*, %struct.ExprList*, %struct.IdList*, %struct.TriggerStep*, %struct.TriggerStep* }
+ %struct.Vdbe = type { %struct.sqlite3*, %struct.Vdbe*, %struct.Vdbe*, i32, i32, %struct.Op*, i32, i32, i32*, %struct.Mem**, %struct.Mem*, i32, %struct.Cursor**, i32, %struct.Mem*, i8**, i32, i32, i32, %struct.Mem*, i32, i32, %struct.Fifo, i32, i32, %struct.Context*, i32, i32, i32, i32, i32, [25 x i32], i32, i32, i8**, i8*, %struct.Mem*, i8, i8, i8, i8, i8, i8, i32, i64, i32, %struct.BtreeMutexArray, i32, i8*, i32 }
+ %struct.VdbeFunc = type { %struct.FuncDef*, i32, [1 x %struct.AuxData] }
+ %struct._OvflCell = type { i8*, i16 }
+ %struct._ht = type { i32, %struct.HashElem* }
+ %struct.sColMap = type { i32, i8* }
+ %struct.sqlite3 = type { %struct.sqlite3_vfs*, i32, %struct.Db*, i32, i32, i32, i32, i8, i8, i8, i8, i32, %struct.CollSeq*, i64, i64, i32, i32, i32, %struct.sqlite3_mutex*, %struct.sqlite3InitInfo, i32, i8**, %struct.Vdbe*, i32, void (i8*, i8*)*, i8*, void (i8*, i8*, i64)*, i8*, i8*, i32 (i8*)*, i8*, void (i8*)*, i8*, void (i8*, i32, i8*, i8*, i64)*, void (i8*, %struct.sqlite3*, i32, i8*)*, void (i8*, %struct.sqlite3*, i32, i8*)*, i8*, %struct.Mem*, i8*, i8*, %2, i32 (i8*, i32, i8*, i8*, i8*, i8*)*, i8*, i32 (i8*)*, i8*, i32, %struct.Hash, %struct.Table*, %struct.sqlite3_vtab**, i32, %struct.Hash, %struct.Hash, %struct.BusyHandler, i32, [2 x %struct.Db], i8 }
+ %struct.sqlite3InitInfo = type { i32, i32, i8 }
+ %struct.sqlite3_context = type { %struct.FuncDef*, %struct.VdbeFunc*, %struct.Mem, %struct.Mem*, i32, %struct.CollSeq* }
+ %struct.sqlite3_file = type { %struct.sqlite3_io_methods* }
+ %struct.sqlite3_index_constraint = type { i32, i8, i8, i32 }
+ %struct.sqlite3_index_constraint_usage = type { i32, i8 }
+ %struct.sqlite3_index_info = type { i32, %struct.sqlite3_index_constraint*, i32, %struct.sqlite3_index_constraint_usage*, %struct.sqlite3_index_constraint_usage*, i32, i8*, i32, i32, double }
+ %struct.sqlite3_io_methods = type { i32, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i64)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i64*)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i32, i8*)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*)* }
+ %struct.sqlite3_module = type { i32, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_index_info*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_vtab_cursor**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, i32, i8*, i32, %struct.Mem**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, %struct.sqlite3_context*, i32)*, i32 (%struct.sqlite3_vtab_cursor*, i64*)*, i32 (%struct.sqlite3_vtab*, i32, %struct.Mem**, i64*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, i32, i8*, void (%struct.sqlite3_context*, i32, %struct.Mem**)**, i8**)*, i32 (%struct.sqlite3_vtab*, i8*)* }
+ %struct.sqlite3_mutex = type opaque
+ %struct.sqlite3_vfs = type { i32, i32, i32, %struct.sqlite3_vfs*, i8*, i8*, i32 (%struct.sqlite3_vfs*, i8*, %struct.sqlite3_file*, i32, i32*)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i8*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*)*, void (%struct.sqlite3_vfs*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*, i8*)*, void (%struct.sqlite3_vfs*, i8*)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i32)*, i32 (%struct.sqlite3_vfs*, double*)* }
+ %struct.sqlite3_vtab = type { %struct.sqlite3_module*, i32, i8* }
+ %struct.sqlite3_vtab_cursor = type { %struct.sqlite3_vtab* }
[email protected] = appending global [1 x i8*] [i8* bitcast (void (%struct.MemPage*, i32, i32)* @dropCell to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define fastcc void @dropCell(%struct.MemPage* nocapture %pPage, i32 %idx, i32 %sz) nounwind ssp {
+entry:
+ %0 = getelementptr %struct.MemPage* %pPage, i64 0, i32 18 ; <i8**> [#uses=1]
+ %1 = load i8** %0, align 8 ; <i8*> [#uses=34]
+ %2 = getelementptr %struct.MemPage* %pPage, i64 0, i32 12 ; <i16*> [#uses=1]
+ %3 = load i16* %2, align 2 ; <i16> [#uses=1]
+ %4 = zext i16 %3 to i32 ; <i32> [#uses=2]
+ %5 = shl i32 %idx, 1 ; <i32> [#uses=2]
+ %6 = add i32 %4, %5 ; <i32> [#uses=1]
+ %7 = sext i32 %6 to i64 ; <i64> [#uses=2]
+ %8 = getelementptr i8* %1, i64 %7 ; <i8*> [#uses=1]
+ %9 = load i8* %8, align 1 ; <i8> [#uses=2]
+ %10 = zext i8 %9 to i32 ; <i32> [#uses=1]
+ %11 = shl i32 %10, 8 ; <i32> [#uses=1]
+ %.sum3 = add i64 %7, 1 ; <i64> [#uses=1]
+ %12 = getelementptr i8* %1, i64 %.sum3 ; <i8*> [#uses=1]
+ %13 = load i8* %12, align 1 ; <i8> [#uses=2]
+ %14 = zext i8 %13 to i32 ; <i32> [#uses=1]
+ %15 = or i32 %11, %14 ; <i32> [#uses=3]
+ %16 = icmp slt i32 %sz, 4 ; <i1> [#uses=1]
+ %size_addr.0.i = select i1 %16, i32 4, i32 %sz ; <i32> [#uses=3]
+ %17 = getelementptr %struct.MemPage* %pPage, i64 0, i32 8 ; <i8*> [#uses=5]
+ %18 = load i8* %17, align 8 ; <i8> [#uses=1]
+ %19 = zext i8 %18 to i32 ; <i32> [#uses=4]
+ %20 = add i32 %19, 1 ; <i32> [#uses=2]
+ br label %bb3.i
+
+bb3.i: ; preds = %bb3.i, %entry
+ %addr.0.i = phi i32 [ %20, %entry ], [ %29, %bb3.i ] ; <i32> [#uses=1]
+ %21 = sext i32 %addr.0.i to i64 ; <i64> [#uses=2]
+ %22 = getelementptr i8* %1, i64 %21 ; <i8*> [#uses=2]
+ %23 = load i8* %22, align 1 ; <i8> [#uses=2]
+ %24 = zext i8 %23 to i32 ; <i32> [#uses=1]
+ %25 = shl i32 %24, 8 ; <i32> [#uses=1]
+ %.sum34.i = add i64 %21, 1 ; <i64> [#uses=1]
+ %26 = getelementptr i8* %1, i64 %.sum34.i ; <i8*> [#uses=2]
+ %27 = load i8* %26, align 1 ; <i8> [#uses=2]
+ %28 = zext i8 %27 to i32 ; <i32> [#uses=1]
+ %29 = or i32 %25, %28 ; <i32> [#uses=3]
+ %.not.i = icmp uge i32 %29, %15 ; <i1> [#uses=1]
+ %30 = icmp eq i32 %29, 0 ; <i1> [#uses=1]
+ %or.cond.i = or i1 %30, %.not.i ; <i1> [#uses=1]
+ br i1 %or.cond.i, label %bb5.i, label %bb3.i
+
+bb5.i: ; preds = %bb3.i
+ store i8 %9, i8* %22, align 1
+ store i8 %13, i8* %26, align 1
+ %31 = zext i32 %15 to i64 ; <i64> [#uses=2]
+ %32 = getelementptr i8* %1, i64 %31 ; <i8*> [#uses=1]
+ store i8 %23, i8* %32, align 1
+ %.sum32.i = add i64 %31, 1 ; <i64> [#uses=1]
+ %33 = getelementptr i8* %1, i64 %.sum32.i ; <i8*> [#uses=1]
+ store i8 %27, i8* %33, align 1
+ %34 = add i32 %15, 2 ; <i32> [#uses=1]
+ %35 = zext i32 %34 to i64 ; <i64> [#uses=2]
+ %36 = getelementptr i8* %1, i64 %35 ; <i8*> [#uses=1]
+ %37 = lshr i32 %size_addr.0.i, 8 ; <i32> [#uses=1]
+ %38 = trunc i32 %37 to i8 ; <i8> [#uses=1]
+ store i8 %38, i8* %36, align 1
+ %39 = trunc i32 %size_addr.0.i to i8 ; <i8> [#uses=1]
+ %.sum31.i = add i64 %35, 1 ; <i64> [#uses=1]
+ %40 = getelementptr i8* %1, i64 %.sum31.i ; <i8*> [#uses=1]
+ store i8 %39, i8* %40, align 1
+ %41 = getelementptr %struct.MemPage* %pPage, i64 0, i32 14 ; <i16*> [#uses=4]
+ %42 = load i16* %41, align 2 ; <i16> [#uses=1]
+ %43 = trunc i32 %size_addr.0.i to i16 ; <i16> [#uses=1]
+ %44 = add i16 %42, %43 ; <i16> [#uses=1]
+ store i16 %44, i16* %41, align 2
+ %45 = load i8* %17, align 8 ; <i8> [#uses=1]
+ %46 = zext i8 %45 to i32 ; <i32> [#uses=1]
+ %47 = add i32 %46, 1 ; <i32> [#uses=1]
+ br label %bb11.outer.i
+
+bb11.outer.i: ; preds = %bb6.i, %bb5.i
+ %addr.1.ph.i = phi i32 [ %47, %bb5.i ], [ %111, %bb6.i ] ; <i32> [#uses=1]
+ %48 = sext i32 %addr.1.ph.i to i64 ; <i64> [#uses=2]
+ %49 = getelementptr i8* %1, i64 %48 ; <i8*> [#uses=1]
+ %.sum30.i = add i64 %48, 1 ; <i64> [#uses=1]
+ %50 = getelementptr i8* %1, i64 %.sum30.i ; <i8*> [#uses=1]
+ br label %bb11.i
+
+bb6.i: ; preds = %bb11.i
+ %51 = zext i32 %111 to i64 ; <i64> [#uses=2]
+ %52 = getelementptr i8* %1, i64 %51 ; <i8*> [#uses=2]
+ %53 = load i8* %52, align 1 ; <i8> [#uses=1]
+ %54 = zext i8 %53 to i32 ; <i32> [#uses=1]
+ %55 = shl i32 %54, 8 ; <i32> [#uses=1]
+ %.sum24.i = add i64 %51, 1 ; <i64> [#uses=1]
+ %56 = getelementptr i8* %1, i64 %.sum24.i ; <i8*> [#uses=2]
+ %57 = load i8* %56, align 1 ; <i8> [#uses=3]
+ %58 = zext i8 %57 to i32 ; <i32> [#uses=1]
+ %59 = or i32 %55, %58 ; <i32> [#uses=5]
+ %60 = add i32 %111, 2 ; <i32> [#uses=1]
+ %61 = zext i32 %60 to i64 ; <i64> [#uses=2]
+ %62 = getelementptr i8* %1, i64 %61 ; <i8*> [#uses=2]
+ %63 = load i8* %62, align 1 ; <i8> [#uses=1]
+ %64 = zext i8 %63 to i32 ; <i32> [#uses=1]
+ %65 = shl i32 %64, 8 ; <i32> [#uses=1]
+ %.sum23.i = add i64 %61, 1 ; <i64> [#uses=1]
+ %66 = getelementptr i8* %1, i64 %.sum23.i ; <i8*> [#uses=2]
+ %67 = load i8* %66, align 1 ; <i8> [#uses=2]
+ %68 = zext i8 %67 to i32 ; <i32> [#uses=1]
+ %69 = or i32 %65, %68 ; <i32> [#uses=1]
+ %70 = add i32 %111, 3 ; <i32> [#uses=1]
+ %71 = add i32 %70, %69 ; <i32> [#uses=1]
+ %72 = icmp sge i32 %71, %59 ; <i1> [#uses=1]
+ %73 = icmp ne i32 %59, 0 ; <i1> [#uses=1]
+ %74 = and i1 %72, %73 ; <i1> [#uses=1]
+ br i1 %74, label %bb9.i, label %bb11.outer.i
+
+bb9.i: ; preds = %bb6.i
+ %75 = load i8* %17, align 8 ; <i8> [#uses=1]
+ %76 = zext i8 %75 to i32 ; <i32> [#uses=1]
+ %77 = add i32 %76, 7 ; <i32> [#uses=1]
+ %78 = zext i32 %77 to i64 ; <i64> [#uses=1]
+ %79 = getelementptr i8* %1, i64 %78 ; <i8*> [#uses=2]
+ %80 = load i8* %79, align 1 ; <i8> [#uses=1]
+ %81 = sub i8 %109, %57 ; <i8> [#uses=1]
+ %82 = add i8 %81, %67 ; <i8> [#uses=1]
+ %83 = add i8 %82, %80 ; <i8> [#uses=1]
+ store i8 %83, i8* %79, align 1
+ %84 = zext i32 %59 to i64 ; <i64> [#uses=2]
+ %85 = getelementptr i8* %1, i64 %84 ; <i8*> [#uses=1]
+ %86 = load i8* %85, align 1 ; <i8> [#uses=1]
+ store i8 %86, i8* %52, align 1
+ %.sum22.i = add i64 %84, 1 ; <i64> [#uses=1]
+ %87 = getelementptr i8* %1, i64 %.sum22.i ; <i8*> [#uses=1]
+ %88 = load i8* %87, align 1 ; <i8> [#uses=1]
+ store i8 %88, i8* %56, align 1
+ %89 = add i32 %59, 2 ; <i32> [#uses=1]
+ %90 = zext i32 %89 to i64 ; <i64> [#uses=2]
+ %91 = getelementptr i8* %1, i64 %90 ; <i8*> [#uses=1]
+ %92 = load i8* %91, align 1 ; <i8> [#uses=1]
+ %93 = zext i8 %92 to i32 ; <i32> [#uses=1]
+ %94 = shl i32 %93, 8 ; <i32> [#uses=1]
+ %.sum20.i = add i64 %90, 1 ; <i64> [#uses=1]
+ %95 = getelementptr i8* %1, i64 %.sum20.i ; <i8*> [#uses=2]
+ %96 = load i8* %95, align 1 ; <i8> [#uses=1]
+ %97 = zext i8 %96 to i32 ; <i32> [#uses=1]
+ %98 = or i32 %94, %97 ; <i32> [#uses=1]
+ %99 = sub i32 %59, %111 ; <i32> [#uses=1]
+ %100 = add i32 %99, %98 ; <i32> [#uses=1]
+ %101 = lshr i32 %100, 8 ; <i32> [#uses=1]
+ %102 = trunc i32 %101 to i8 ; <i8> [#uses=1]
+ store i8 %102, i8* %62, align 1
+ %103 = load i8* %95, align 1 ; <i8> [#uses=1]
+ %104 = sub i8 %57, %109 ; <i8> [#uses=1]
+ %105 = add i8 %104, %103 ; <i8> [#uses=1]
+ store i8 %105, i8* %66, align 1
+ br label %bb11.i
+
+bb11.i: ; preds = %bb9.i, %bb11.outer.i
+ %106 = load i8* %49, align 1 ; <i8> [#uses=1]
+ %107 = zext i8 %106 to i32 ; <i32> [#uses=1]
+ %108 = shl i32 %107, 8 ; <i32> [#uses=1]
+ %109 = load i8* %50, align 1 ; <i8> [#uses=3]
+ %110 = zext i8 %109 to i32 ; <i32> [#uses=1]
+ %111 = or i32 %108, %110 ; <i32> [#uses=6]
+ %112 = icmp eq i32 %111, 0 ; <i1> [#uses=1]
+ br i1 %112, label %bb12.i, label %bb6.i
+
+bb12.i: ; preds = %bb11.i
+ %113 = zext i32 %20 to i64 ; <i64> [#uses=2]
+ %114 = getelementptr i8* %1, i64 %113 ; <i8*> [#uses=2]
+ %115 = load i8* %114, align 1 ; <i8> [#uses=2]
+ %116 = add i32 %19, 5 ; <i32> [#uses=1]
+ %117 = zext i32 %116 to i64 ; <i64> [#uses=2]
+ %118 = getelementptr i8* %1, i64 %117 ; <i8*> [#uses=3]
+ %119 = load i8* %118, align 1 ; <i8> [#uses=1]
+ %120 = icmp eq i8 %115, %119 ; <i1> [#uses=1]
+ br i1 %120, label %bb13.i, label %bb1.preheader
+
+bb13.i: ; preds = %bb12.i
+ %121 = add i32 %19, 2 ; <i32> [#uses=1]
+ %122 = zext i32 %121 to i64 ; <i64> [#uses=1]
+ %123 = getelementptr i8* %1, i64 %122 ; <i8*> [#uses=1]
+ %124 = load i8* %123, align 1 ; <i8> [#uses=1]
+ %125 = add i32 %19, 6 ; <i32> [#uses=1]
+ %126 = zext i32 %125 to i64 ; <i64> [#uses=1]
+ %127 = getelementptr i8* %1, i64 %126 ; <i8*> [#uses=1]
+ %128 = load i8* %127, align 1 ; <i8> [#uses=1]
+ %129 = icmp eq i8 %124, %128 ; <i1> [#uses=1]
+ br i1 %129, label %bb14.i, label %bb1.preheader
+
+bb14.i: ; preds = %bb13.i
+ %130 = zext i8 %115 to i32 ; <i32> [#uses=1]
+ %131 = shl i32 %130, 8 ; <i32> [#uses=1]
+ %.sum29.i = add i64 %113, 1 ; <i64> [#uses=1]
+ %132 = getelementptr i8* %1, i64 %.sum29.i ; <i8*> [#uses=1]
+ %133 = load i8* %132, align 1 ; <i8> [#uses=1]
+ %134 = zext i8 %133 to i32 ; <i32> [#uses=1]
+ %135 = or i32 %134, %131 ; <i32> [#uses=2]
+ %136 = zext i32 %135 to i64 ; <i64> [#uses=1]
+ %137 = getelementptr i8* %1, i64 %136 ; <i8*> [#uses=1]
+ %138 = bitcast i8* %137 to i16* ; <i16*> [#uses=1]
+ %139 = bitcast i8* %114 to i16* ; <i16*> [#uses=1]
+ %tmp.i = load i16* %138, align 1 ; <i16> [#uses=1]
+ store i16 %tmp.i, i16* %139, align 1
+ %140 = load i8* %118, align 1 ; <i8> [#uses=1]
+ %141 = zext i8 %140 to i32 ; <i32> [#uses=1]
+ %142 = shl i32 %141, 8 ; <i32> [#uses=1]
+ %.sum28.i = add i64 %117, 1 ; <i64> [#uses=1]
+ %143 = getelementptr i8* %1, i64 %.sum28.i ; <i8*> [#uses=2]
+ %144 = load i8* %143, align 1 ; <i8> [#uses=2]
+ %145 = zext i8 %144 to i32 ; <i32> [#uses=1]
+ %146 = or i32 %142, %145 ; <i32> [#uses=1]
+ %147 = add i32 %135, 2 ; <i32> [#uses=1]
+ %148 = zext i32 %147 to i64 ; <i64> [#uses=2]
+ %149 = getelementptr i8* %1, i64 %148 ; <i8*> [#uses=1]
+ %150 = load i8* %149, align 1 ; <i8> [#uses=1]
+ %151 = zext i8 %150 to i32 ; <i32> [#uses=1]
+ %152 = shl i32 %151, 8 ; <i32> [#uses=1]
+ %.sum27.i = add i64 %148, 1 ; <i64> [#uses=1]
+ %153 = getelementptr i8* %1, i64 %.sum27.i ; <i8*> [#uses=2]
+ %154 = load i8* %153, align 1 ; <i8> [#uses=1]
+ %155 = zext i8 %154 to i32 ; <i32> [#uses=1]
+ %156 = or i32 %152, %155 ; <i32> [#uses=1]
+ %157 = add i32 %156, %146 ; <i32> [#uses=1]
+ %158 = lshr i32 %157, 8 ; <i32> [#uses=1]
+ %159 = trunc i32 %158 to i8 ; <i8> [#uses=1]
+ store i8 %159, i8* %118, align 1
+ %160 = load i8* %153, align 1 ; <i8> [#uses=1]
+ %161 = add i8 %160, %144 ; <i8> [#uses=1]
+ store i8 %161, i8* %143, align 1
+ br label %bb1.preheader
+
+bb1.preheader: ; preds = %bb14.i, %bb13.i, %bb12.i
+ %i.08 = add i32 %idx, 1 ; <i32> [#uses=2]
+ %162 = getelementptr %struct.MemPage* %pPage, i64 0, i32 15 ; <i16*> [#uses=4]
+ %163 = load i16* %162, align 4 ; <i16> [#uses=2]
+ %164 = zext i16 %163 to i32 ; <i32> [#uses=1]
+ %165 = icmp sgt i32 %164, %i.08 ; <i1> [#uses=1]
+ br i1 %165, label %bb, label %bb2
+
+bb: ; preds = %bb, %bb1.preheader
+ %indvar = phi i64 [ 0, %bb1.preheader ], [ %indvar.next, %bb ] ; <i64> [#uses=3]
+ %tmp16 = add i32 %5, %4 ; <i32> [#uses=1]
+ %tmp.17 = sext i32 %tmp16 to i64 ; <i64> [#uses=1]
+ %tmp19 = shl i64 %indvar, 1 ; <i64> [#uses=1]
+ %ctg2.sum = add i64 %tmp.17, %tmp19 ; <i64> [#uses=4]
+ %ctg229 = getelementptr i8* %1, i64 %ctg2.sum ; <i8*> [#uses=1]
+ %ctg229.sum31 = add i64 %ctg2.sum, 2 ; <i64> [#uses=1]
+ %166 = getelementptr i8* %1, i64 %ctg229.sum31 ; <i8*> [#uses=1]
+ %167 = load i8* %166, align 1 ; <i8> [#uses=1]
+ store i8 %167, i8* %ctg229
+ %ctg229.sum30 = add i64 %ctg2.sum, 3 ; <i64> [#uses=1]
+ %168 = getelementptr i8* %1, i64 %ctg229.sum30 ; <i8*> [#uses=1]
+ %169 = load i8* %168, align 1 ; <i8> [#uses=1]
+ %ctg229.sum = add i64 %ctg2.sum, 1 ; <i64> [#uses=1]
+ %170 = getelementptr i8* %1, i64 %ctg229.sum ; <i8*> [#uses=1]
+ store i8 %169, i8* %170, align 1
+ %indvar15 = trunc i64 %indvar to i32 ; <i32> [#uses=1]
+ %i.09 = add i32 %indvar15, %i.08 ; <i32> [#uses=1]
+ %i.0 = add i32 %i.09, 1 ; <i32> [#uses=1]
+ %171 = load i16* %162, align 4 ; <i16> [#uses=2]
+ %172 = zext i16 %171 to i32 ; <i32> [#uses=1]
+ %173 = icmp sgt i32 %172, %i.0 ; <i1> [#uses=1]
+ %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
+ br i1 %173, label %bb, label %bb2
+
+bb2: ; preds = %bb, %bb1.preheader
+ %174 = phi i16 [ %163, %bb1.preheader ], [ %171, %bb ] ; <i16> [#uses=1]
+ %175 = add i16 %174, -1 ; <i16> [#uses=2]
+ store i16 %175, i16* %162, align 4
+ %176 = load i8* %17, align 8 ; <i8> [#uses=1]
+ %177 = zext i8 %176 to i32 ; <i32> [#uses=1]
+ %178 = add i32 %177, 3 ; <i32> [#uses=1]
+ %179 = zext i32 %178 to i64 ; <i64> [#uses=1]
+ %180 = getelementptr i8* %1, i64 %179 ; <i8*> [#uses=1]
+ %181 = lshr i16 %175, 8 ; <i16> [#uses=1]
+ %182 = trunc i16 %181 to i8 ; <i8> [#uses=1]
+ store i8 %182, i8* %180, align 1
+ %183 = load i8* %17, align 8 ; <i8> [#uses=1]
+ %184 = zext i8 %183 to i32 ; <i32> [#uses=1]
+ %185 = add i32 %184, 3 ; <i32> [#uses=1]
+ %186 = zext i32 %185 to i64 ; <i64> [#uses=1]
+ %187 = load i16* %162, align 4 ; <i16> [#uses=1]
+ %188 = trunc i16 %187 to i8 ; <i8> [#uses=1]
+ %.sum = add i64 %186, 1 ; <i64> [#uses=1]
+ %189 = getelementptr i8* %1, i64 %.sum ; <i8*> [#uses=1]
+ store i8 %188, i8* %189, align 1
+ %190 = load i16* %41, align 2 ; <i16> [#uses=1]
+ %191 = add i16 %190, 2 ; <i16> [#uses=1]
+ store i16 %191, i16* %41, align 2
+ %192 = getelementptr %struct.MemPage* %pPage, i64 0, i32 1 ; <i8*> [#uses=1]
+ store i8 1, i8* %192, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/stdarg.ll b/test/CodeGen/X86/stdarg.ll
new file mode 100644
index 0000000..9778fa1
--- /dev/null
+++ b/test/CodeGen/X86/stdarg.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86-64 | grep {testb \[%\]al, \[%\]al}
+
+%struct.__va_list_tag = type { i32, i32, i8*, i8* }
+
+define void @foo(i32 %x, ...) nounwind {
+entry:
+ %ap = alloca [1 x %struct.__va_list_tag], align 8; <[1 x %struct.__va_list_tag]*> [#uses=2]
+ %ap12 = bitcast [1 x %struct.__va_list_tag]* %ap to i8*; <i8*> [#uses=2]
+ call void @llvm.va_start(i8* %ap12)
+ %ap3 = getelementptr inbounds [1 x %struct.__va_list_tag]* %ap, i64 0, i64 0; <%struct.__va_list_tag*> [#uses=1]
+ call void @bar(%struct.__va_list_tag* %ap3) nounwind
+ call void @llvm.va_end(i8* %ap12)
+ ret void
+}
+
+declare void @llvm.va_start(i8*) nounwind
+
+declare void @bar(%struct.__va_list_tag*)
+
+declare void @llvm.va_end(i8*) nounwind
diff --git a/test/CodeGen/X86/store-empty-member.ll b/test/CodeGen/X86/store-empty-member.ll
new file mode 100644
index 0000000..37f86c6
--- /dev/null
+++ b/test/CodeGen/X86/store-empty-member.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+; Don't crash on an empty struct member.
+
+; CHECK: movl $2, 4(%esp)
+; CHECK: movl $1, (%esp)
+
+%testType = type {i32, [0 x i32], i32}
+
+define void @foo() nounwind {
+ %1 = alloca %testType
+ volatile store %testType {i32 1, [0 x i32] zeroinitializer, i32 2}, %testType* %1
+ ret void
+}
diff --git a/test/CodeGen/X86/store-fp-constant.ll b/test/CodeGen/X86/store-fp-constant.ll
new file mode 100644
index 0000000..206886b
--- /dev/null
+++ b/test/CodeGen/X86/store-fp-constant.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 | not grep rodata
+; RUN: llc < %s -march=x86 | not grep literal
+;
+; Check that no FP constants in this testcase ends up in the
+; constant pool.
+
+@G = external global float ; <float*> [#uses=1]
+
+declare void @extfloat(float)
+
+declare void @extdouble(double)
+
+define void @testfloatstore() {
+ call void @extfloat( float 0x40934999A0000000 )
+ call void @extdouble( double 0x409349A631F8A090 )
+ store float 0x402A064C20000000, float* @G
+ ret void
+}
+
diff --git a/test/CodeGen/X86/store-global-address.ll b/test/CodeGen/X86/store-global-address.ll
new file mode 100644
index 0000000..c8d4cbc
--- /dev/null
+++ b/test/CodeGen/X86/store-global-address.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 | grep movl | count 1
+
+@dst = global i32 0 ; <i32*> [#uses=1]
+@ptr = global i32* null ; <i32**> [#uses=1]
+
+define void @test() {
+ store i32* @dst, i32** @ptr
+ ret void
+}
+
diff --git a/test/CodeGen/X86/store_op_load_fold.ll b/test/CodeGen/X86/store_op_load_fold.ll
new file mode 100644
index 0000000..66d0e47
--- /dev/null
+++ b/test/CodeGen/X86/store_op_load_fold.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 | not grep mov
+;
+; Test the add and load are folded into the store instruction.
+
+@X = internal global i16 0 ; <i16*> [#uses=2]
+
+define void @foo() {
+ %tmp.0 = load i16* @X ; <i16> [#uses=1]
+ %tmp.3 = add i16 %tmp.0, 329 ; <i16> [#uses=1]
+ store i16 %tmp.3, i16* @X
+ ret void
+}
+
diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll
new file mode 100644
index 0000000..0ccfe47
--- /dev/null
+++ b/test/CodeGen/X86/store_op_load_fold2.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: grep {and DWORD PTR} | count 2
+
+target datalayout = "e-p:32:32"
+ %struct.Macroblock = type { i32, i32, i32, i32, i32, [8 x i32], %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+
+define internal fastcc i32 @dct_chroma(i32 %uv, i32 %cr_cbp) {
+entry:
+ br i1 true, label %cond_true2732.preheader, label %cond_true129
+cond_true129: ; preds = %entry
+ ret i32 0
+cond_true2732.preheader: ; preds = %entry
+ %tmp2666 = getelementptr %struct.Macroblock* null, i32 0, i32 13 ; <i64*> [#uses=2]
+ %tmp2674 = trunc i32 0 to i8 ; <i8> [#uses=1]
+ br i1 true, label %cond_true2732.preheader.split.us, label %cond_true2732.preheader.split
+cond_true2732.preheader.split.us: ; preds = %cond_true2732.preheader
+ br i1 true, label %cond_true2732.outer.us.us, label %cond_true2732.outer.us
+cond_true2732.outer.us.us: ; preds = %cond_true2732.preheader.split.us
+ %tmp2667.us.us = load i64* %tmp2666 ; <i64> [#uses=1]
+ %tmp2670.us.us = load i64* null ; <i64> [#uses=1]
+ %shift.upgrd.1 = zext i8 %tmp2674 to i64 ; <i64> [#uses=1]
+ %tmp2675.us.us = shl i64 %tmp2670.us.us, %shift.upgrd.1 ; <i64> [#uses=1]
+ %tmp2675not.us.us = xor i64 %tmp2675.us.us, -1 ; <i64> [#uses=1]
+ %tmp2676.us.us = and i64 %tmp2667.us.us, %tmp2675not.us.us ; <i64> [#uses=1]
+ store i64 %tmp2676.us.us, i64* %tmp2666
+ ret i32 0
+cond_true2732.outer.us: ; preds = %cond_true2732.preheader.split.us
+ ret i32 0
+cond_true2732.preheader.split: ; preds = %cond_true2732.preheader
+ ret i32 0
+cond_next2752: ; No predecessors!
+ ret i32 0
+}
+
diff --git a/test/CodeGen/X86/storetrunc-fp.ll b/test/CodeGen/X86/storetrunc-fp.ll
new file mode 100644
index 0000000..03ad093
--- /dev/null
+++ b/test/CodeGen/X86/storetrunc-fp.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | not grep flds
+
+define void @foo(x86_fp80 %a, x86_fp80 %b, float* %fp) {
+ %c = fadd x86_fp80 %a, %b
+ %d = fptrunc x86_fp80 %c to float
+ store float %d, float* %fp
+ ret void
+}
diff --git a/test/CodeGen/X86/stride-nine-with-base-reg.ll b/test/CodeGen/X86/stride-nine-with-base-reg.ll
new file mode 100644
index 0000000..f4847a3
--- /dev/null
+++ b/test/CodeGen/X86/stride-nine-with-base-reg.ll
@@ -0,0 +1,37 @@
+; RUN: llc < %s -march=x86 -relocation-model=static | not grep lea
+; RUN: llc < %s -march=x86-64 | not grep lea
+
+; P should be sunk into the loop and folded into the address mode. There
+; shouldn't be any lea instructions inside the loop.
+
+@B = external global [1000 x i8], align 32
+@A = external global [1000 x i8], align 32
+@P = external global [1000 x i8], align 32
+@Q = external global [1000 x i8], align 32
+
+define void @foo(i32 %m, i32 %p) nounwind {
+entry:
+ %tmp1 = icmp sgt i32 %m, 0
+ br i1 %tmp1, label %bb, label %return
+
+bb:
+ %i.019.0 = phi i32 [ %indvar.next, %bb ], [ 0, %entry ]
+ %tmp2 = getelementptr [1000 x i8]* @B, i32 0, i32 %i.019.0
+ %tmp3 = load i8* %tmp2, align 4
+ %tmp4 = mul i8 %tmp3, 2
+ %tmp5 = getelementptr [1000 x i8]* @A, i32 0, i32 %i.019.0
+ store i8 %tmp4, i8* %tmp5, align 4
+ %tmp8 = mul i32 %i.019.0, 9
+ %tmp0 = add i32 %tmp8, %p
+ %tmp10 = getelementptr [1000 x i8]* @P, i32 0, i32 %tmp0
+ store i8 17, i8* %tmp10, align 4
+ %tmp11 = getelementptr [1000 x i8]* @Q, i32 0, i32 %tmp0
+ store i8 19, i8* %tmp11, align 4
+ %indvar.next = add i32 %i.019.0, 1
+ %exitcond = icmp eq i32 %indvar.next, %m
+ br i1 %exitcond, label %return, label %bb
+
+return:
+ ret void
+}
+
diff --git a/test/CodeGen/X86/stride-reuse.ll b/test/CodeGen/X86/stride-reuse.ll
new file mode 100644
index 0000000..5cbd895
--- /dev/null
+++ b/test/CodeGen/X86/stride-reuse.ll
@@ -0,0 +1,30 @@
+; RUN: llc < %s -march=x86 | not grep lea
+; RUN: llc < %s -march=x86-64 | not grep lea
+
+@B = external global [1000 x float], align 32
+@A = external global [1000 x float], align 32
+@P = external global [1000 x i32], align 32
+
+define void @foo(i32 %m) nounwind {
+entry:
+ %tmp1 = icmp sgt i32 %m, 0
+ br i1 %tmp1, label %bb, label %return
+
+bb:
+ %i.019.0 = phi i32 [ %indvar.next, %bb ], [ 0, %entry ]
+ %tmp2 = getelementptr [1000 x float]* @B, i32 0, i32 %i.019.0
+ %tmp3 = load float* %tmp2, align 4
+ %tmp4 = fmul float %tmp3, 2.000000e+00
+ %tmp5 = getelementptr [1000 x float]* @A, i32 0, i32 %i.019.0
+ store float %tmp4, float* %tmp5, align 4
+ %tmp8 = shl i32 %i.019.0, 1
+ %tmp9 = add i32 %tmp8, 64
+ %tmp10 = getelementptr [1000 x i32]* @P, i32 0, i32 %i.019.0
+ store i32 %tmp9, i32* %tmp10, align 4
+ %indvar.next = add i32 %i.019.0, 1
+ %exitcond = icmp eq i32 %indvar.next, %m
+ br i1 %exitcond, label %return, label %bb
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/X86/sub-with-overflow.ll b/test/CodeGen/X86/sub-with-overflow.ll
new file mode 100644
index 0000000..19f4079
--- /dev/null
+++ b/test/CodeGen/X86/sub-with-overflow.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=x86 | grep {jo} | count 1
+; RUN: llc < %s -march=x86 | grep {jb} | count 1
+
+@ok = internal constant [4 x i8] c"%d\0A\00"
+@no = internal constant [4 x i8] c"no\0A\00"
+
+define i1 @func1(i32 %v1, i32 %v2) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %overflow, label %normal
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ ret i1 true
+
+overflow:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+}
+
+define i1 @func2(i32 %v1, i32 %v2) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %carry, label %normal
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ ret i1 true
+
+carry:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+}
+
+declare i32 @printf(i8*, ...) nounwind
+declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32)
+declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32)
diff --git a/test/CodeGen/X86/subreg-to-reg-0.ll b/test/CodeGen/X86/subreg-to-reg-0.ll
new file mode 100644
index 0000000..d718c85
--- /dev/null
+++ b/test/CodeGen/X86/subreg-to-reg-0.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86-64 | grep mov | count 1
+
+; Do eliminate the zero-extension instruction and rely on
+; x86-64's implicit zero-extension!
+
+define i64 @foo(i32* %p) nounwind {
+ %t = load i32* %p
+ %n = add i32 %t, 1
+ %z = zext i32 %n to i64
+ ret i64 %z
+}
diff --git a/test/CodeGen/X86/subreg-to-reg-1.ll b/test/CodeGen/X86/subreg-to-reg-1.ll
new file mode 100644
index 0000000..a297728
--- /dev/null
+++ b/test/CodeGen/X86/subreg-to-reg-1.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 | grep {leal .*), %e.\*} | count 1
+
+; Don't eliminate or coalesce away the explicit zero-extension!
+; This is currently using an leal because of a 3-addressification detail,
+; though this isn't necessary; The point of this test is to make sure
+; a 32-bit add is used.
+
+define i64 @foo(i64 %a) nounwind {
+ %b = add i64 %a, 4294967295
+ %c = and i64 %b, 4294967295
+ %d = add i64 %c, 1
+ ret i64 %d
+}
diff --git a/test/CodeGen/X86/subreg-to-reg-2.ll b/test/CodeGen/X86/subreg-to-reg-2.ll
new file mode 100644
index 0000000..49d2e88
--- /dev/null
+++ b/test/CodeGen/X86/subreg-to-reg-2.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl
+; rdar://6707985
+
+ %XXOO = type { %"struct.XXC::XXCC", i8*, %"struct.XXC::XXOO::$_71" }
+ %XXValue = type opaque
+ %"struct.XXC::ArrayStorage" = type { i32, i32, i32, i8*, i8*, [1 x %XXValue*] }
+ %"struct.XXC::XXArray" = type { %XXOO, i32, %"struct.XXC::ArrayStorage"* }
+ %"struct.XXC::XXCC" = type { i32 (...)**, i8* }
+ %"struct.XXC::XXOO::$_71" = type { [2 x %XXValue*] }
+
+define internal fastcc %XXValue* @t(i64* %out, %"struct.XXC::ArrayStorage"* %tmp9) nounwind {
+prologue:
+ %array = load %XXValue** inttoptr (i64 11111111 to %XXValue**) ; <%XXValue*> [#uses=0]
+ %index = load %XXValue** inttoptr (i64 22222222 to %XXValue**) ; <%XXValue*> [#uses=1]
+ %tmp = ptrtoint %XXValue* %index to i64 ; <i64> [#uses=2]
+ store i64 %tmp, i64* %out
+ %tmp6 = trunc i64 %tmp to i32 ; <i32> [#uses=1]
+ br label %bb5
+
+bb5: ; preds = %prologue
+ %tmp10 = zext i32 %tmp6 to i64 ; <i64> [#uses=1]
+ %tmp11 = getelementptr %"struct.XXC::ArrayStorage"* %tmp9, i64 0, i32 5, i64 %tmp10 ; <%XXValue**> [#uses=1]
+ %tmp12 = load %XXValue** %tmp11, align 8 ; <%XXValue*> [#uses=1]
+ ret %XXValue* %tmp12
+}
diff --git a/test/CodeGen/X86/subreg-to-reg-3.ll b/test/CodeGen/X86/subreg-to-reg-3.ll
new file mode 100644
index 0000000..931ae75
--- /dev/null
+++ b/test/CodeGen/X86/subreg-to-reg-3.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64 | grep imull
+
+; Don't eliminate or coalesce away the explicit zero-extension!
+
+define i64 @foo(i64 %a) {
+ %b = mul i64 %a, 7823
+ %c = and i64 %b, 4294967295
+ %d = add i64 %c, 1
+ ret i64 %d
+}
diff --git a/test/CodeGen/X86/subreg-to-reg-4.ll b/test/CodeGen/X86/subreg-to-reg-4.ll
new file mode 100644
index 0000000..0ea5541
--- /dev/null
+++ b/test/CodeGen/X86/subreg-to-reg-4.ll
@@ -0,0 +1,135 @@
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: not grep leaq %t
+; RUN: not grep incq %t
+; RUN: not grep decq %t
+; RUN: not grep negq %t
+; RUN: not grep addq %t
+; RUN: not grep subq %t
+; RUN: not grep {movl %} %t
+
+; Utilize implicit zero-extension on x86-64 to eliminate explicit
+; zero-extensions. Shrink 64-bit adds to 32-bit when the high
+; 32-bits will be zeroed.
+
+define void @bar(i64 %x, i64 %y, i64* %z) nounwind readnone {
+entry:
+ %t0 = add i64 %x, %y
+ %t1 = and i64 %t0, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
+define void @easy(i32 %x, i32 %y, i64* %z) nounwind readnone {
+entry:
+ %t0 = add i32 %x, %y
+ %tn = zext i32 %t0 to i64
+ %t1 = and i64 %tn, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
+define void @cola(i64 *%x, i64 %y, i64* %z, i64 %u) nounwind readnone {
+entry:
+ %p = load i64* %x
+ %t0 = add i64 %p, %y
+ %t1 = and i64 %t0, 4294967295
+ %t2 = xor i64 %t1, %u
+ store i64 %t2, i64* %z
+ ret void
+}
+define void @yaks(i64 *%x, i64 %y, i64* %z, i64 %u) nounwind readnone {
+entry:
+ %p = load i64* %x
+ %t0 = add i64 %p, %y
+ %t1 = xor i64 %t0, %u
+ %t2 = and i64 %t1, 4294967295
+ store i64 %t2, i64* %z
+ ret void
+}
+define void @foo(i64 *%x, i64 *%y, i64* %z) nounwind readnone {
+entry:
+ %a = load i64* %x
+ %b = load i64* %y
+ %t0 = add i64 %a, %b
+ %t1 = and i64 %t0, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
+define void @avo(i64 %x, i64* %z, i64 %u) nounwind readnone {
+entry:
+ %t0 = add i64 %x, 734847
+ %t1 = and i64 %t0, 4294967295
+ %t2 = xor i64 %t1, %u
+ store i64 %t2, i64* %z
+ ret void
+}
+define void @phe(i64 %x, i64* %z, i64 %u) nounwind readnone {
+entry:
+ %t0 = add i64 %x, 734847
+ %t1 = xor i64 %t0, %u
+ %t2 = and i64 %t1, 4294967295
+ store i64 %t2, i64* %z
+ ret void
+}
+define void @oze(i64 %y, i64* %z) nounwind readnone {
+entry:
+ %t0 = add i64 %y, 1
+ %t1 = and i64 %t0, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
+
+define void @sbar(i64 %x, i64 %y, i64* %z) nounwind readnone {
+entry:
+ %t0 = sub i64 %x, %y
+ %t1 = and i64 %t0, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
+define void @seasy(i32 %x, i32 %y, i64* %z) nounwind readnone {
+entry:
+ %t0 = sub i32 %x, %y
+ %tn = zext i32 %t0 to i64
+ %t1 = and i64 %tn, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
+define void @scola(i64 *%x, i64 %y, i64* %z, i64 %u) nounwind readnone {
+entry:
+ %p = load i64* %x
+ %t0 = sub i64 %p, %y
+ %t1 = and i64 %t0, 4294967295
+ %t2 = xor i64 %t1, %u
+ store i64 %t2, i64* %z
+ ret void
+}
+define void @syaks(i64 *%x, i64 %y, i64* %z, i64 %u) nounwind readnone {
+entry:
+ %p = load i64* %x
+ %t0 = sub i64 %p, %y
+ %t1 = xor i64 %t0, %u
+ %t2 = and i64 %t1, 4294967295
+ store i64 %t2, i64* %z
+ ret void
+}
+define void @sfoo(i64 *%x, i64 *%y, i64* %z) nounwind readnone {
+entry:
+ %a = load i64* %x
+ %b = load i64* %y
+ %t0 = sub i64 %a, %b
+ %t1 = and i64 %t0, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
+define void @swya(i64 %y, i64* %z) nounwind readnone {
+entry:
+ %t0 = sub i64 0, %y
+ %t1 = and i64 %t0, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
+define void @soze(i64 %y, i64* %z) nounwind readnone {
+entry:
+ %t0 = sub i64 %y, 1
+ %t1 = and i64 %t0, 4294967295
+ store i64 %t1, i64* %z
+ ret void
+}
diff --git a/test/CodeGen/X86/subreg-to-reg-6.ll b/test/CodeGen/X86/subreg-to-reg-6.ll
new file mode 100644
index 0000000..76430cd
--- /dev/null
+++ b/test/CodeGen/X86/subreg-to-reg-6.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86-64
+
+define i64 @foo() nounwind {
+entry:
+ %t0 = load i32* null, align 8
+ switch i32 %t0, label %bb65 [
+ i32 16, label %bb
+ i32 12, label %bb56
+ ]
+
+bb:
+ br label %bb65
+
+bb56:
+ unreachable
+
+bb65:
+ %a = phi i64 [ 0, %bb ], [ 0, %entry ]
+ tail call void asm "", "{cx}"(i64 %a) nounwind
+ %t15 = and i64 %a, 4294967295
+ ret i64 %t15
+}
+
+define i64 @bar(i64 %t0) nounwind {
+ call void asm "", "{cx}"(i64 0) nounwind
+ %t1 = sub i64 0, %t0
+ %t2 = and i64 %t1, 4294967295
+ ret i64 %t2
+}
diff --git a/test/CodeGen/X86/switch-crit-edge-constant.ll b/test/CodeGen/X86/switch-crit-edge-constant.ll
new file mode 100644
index 0000000..1f2ab0d
--- /dev/null
+++ b/test/CodeGen/X86/switch-crit-edge-constant.ll
@@ -0,0 +1,52 @@
+; PR925
+; RUN: llc < %s -march=x86 | \
+; RUN: grep mov.*str1 | count 1
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8.7.2"
+@str1 = internal constant [5 x i8] c"bonk\00" ; <[5 x i8]*> [#uses=1]
+@str2 = internal constant [5 x i8] c"bork\00" ; <[5 x i8]*> [#uses=1]
+@str = internal constant [8 x i8] c"perfwap\00" ; <[8 x i8]*> [#uses=1]
+
+define void @foo(i32 %C) {
+entry:
+ switch i32 %C, label %bb2 [
+ i32 1, label %blahaha
+ i32 2, label %blahaha
+ i32 3, label %blahaha
+ i32 4, label %blahaha
+ i32 5, label %blahaha
+ i32 6, label %blahaha
+ i32 7, label %blahaha
+ i32 8, label %blahaha
+ i32 9, label %blahaha
+ i32 10, label %blahaha
+ ]
+
+bb2: ; preds = %entry
+ %tmp5 = and i32 %C, 123 ; <i32> [#uses=1]
+ %tmp = icmp eq i32 %tmp5, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %blahaha, label %cond_true
+
+cond_true: ; preds = %bb2
+ br label %blahaha
+
+blahaha: ; preds = %cond_true, %bb2, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
+ %s.0 = phi i8* [ getelementptr ([8 x i8]* @str, i32 0, i64 0), %cond_true ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str1, i32 0, i64 0), %entry ], [ getelementptr ([5 x i8]* @str2, i32 0, i64 0), %bb2 ] ; <i8*> [#uses=13]
+ %tmp8 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp10 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp12 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp14 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp16 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp18 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp20 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp22 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp24 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp26 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp28 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp30 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ %tmp32 = tail call i32 (i8*, ...)* @printf( i8* %s.0 ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/X86/switch-zextload.ll b/test/CodeGen/X86/switch-zextload.ll
new file mode 100644
index 0000000..55425bc
--- /dev/null
+++ b/test/CodeGen/X86/switch-zextload.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=x86 | grep mov | count 1
+
+; Do zextload, instead of a load and a separate zext.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ %struct.move_s = type { i32, i32, i32, i32, i32, i32 }
+ %struct.node_t = type { i8, i8, i8, i8, i32, i32, %struct.node_t**, %struct.node_t*, %struct.move_s }
+
+define fastcc void @set_proof_and_disproof_numbers(%struct.node_t* nocapture %node) nounwind {
+entry:
+ %0 = load i8* null, align 1 ; <i8> [#uses=1]
+ switch i8 %0, label %return [
+ i8 2, label %bb31
+ i8 0, label %bb80
+ i8 1, label %bb82
+ i8 3, label %bb84
+ ]
+
+bb31: ; preds = %entry
+ unreachable
+
+bb80: ; preds = %entry
+ ret void
+
+bb82: ; preds = %entry
+ ret void
+
+bb84: ; preds = %entry
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/CodeGen/X86/swizzle.ll b/test/CodeGen/X86/swizzle.ll
new file mode 100644
index 0000000..23e0c24
--- /dev/null
+++ b/test/CodeGen/X86/swizzle.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movlps
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movups
+; rdar://6523650
+
+ %struct.vector4_t = type { <4 x float> }
+
+define void @swizzle(i8* nocapture %a, %struct.vector4_t* nocapture %b, %struct.vector4_t* nocapture %c) nounwind {
+entry:
+ %0 = getelementptr %struct.vector4_t* %b, i32 0, i32 0 ; <<4 x float>*> [#uses=2]
+ %1 = load <4 x float>* %0, align 4 ; <<4 x float>> [#uses=1]
+ %tmp.i = bitcast i8* %a to double* ; <double*> [#uses=1]
+ %tmp1.i = load double* %tmp.i ; <double> [#uses=1]
+ %2 = insertelement <2 x double> undef, double %tmp1.i, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp2.i = bitcast <2 x double> %2 to <4 x float> ; <<4 x float>> [#uses=1]
+ %3 = shufflevector <4 x float> %1, <4 x float> %tmp2.i, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x float>> [#uses=1]
+ store <4 x float> %3, <4 x float>* %0, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll
new file mode 100644
index 0000000..7b21e1b
--- /dev/null
+++ b/test/CodeGen/X86/tail-opts.ll
@@ -0,0 +1,408 @@
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false -post-RA-scheduler=true | FileCheck %s
+
+declare void @bar(i32)
+declare void @car(i32)
+declare void @dar(i32)
+declare void @ear(i32)
+declare void @far(i32)
+declare i1 @qux()
+
+@GHJK = global i32 0
+@HABC = global i32 0
+
+; BranchFolding should tail-merge the stores since they all precede
+; direct branches to the same place.
+
+; CHECK: tail_merge_me:
+; CHECK-NOT: GHJK
+; CHECK: movl $0, GHJK(%rip)
+; CHECK-NEXT: movl $1, HABC(%rip)
+; CHECK-NOT: GHJK
+
+define void @tail_merge_me() nounwind {
+entry:
+ %a = call i1 @qux()
+ br i1 %a, label %A, label %next
+next:
+ %b = call i1 @qux()
+ br i1 %b, label %B, label %C
+
+A:
+ call void @bar(i32 0)
+ store i32 0, i32* @GHJK
+ br label %M
+
+B:
+ call void @car(i32 1)
+ store i32 0, i32* @GHJK
+ br label %M
+
+C:
+ call void @dar(i32 2)
+ store i32 0, i32* @GHJK
+ br label %M
+
+M:
+ store i32 1, i32* @HABC
+ %c = call i1 @qux()
+ br i1 %c, label %return, label %altret
+
+return:
+ call void @ear(i32 1000)
+ ret void
+altret:
+ call void @far(i32 1001)
+ ret void
+}
+
+declare i8* @choose(i8*, i8*)
+
+; BranchFolding should tail-duplicate the indirect jump to avoid
+; redundant branching.
+
+; CHECK: tail_duplicate_me:
+; CHECK: movl $0, GHJK(%rip)
+; CHECK-NEXT: jmpq *%rbx
+; CHECK: movl $0, GHJK(%rip)
+; CHECK-NEXT: jmpq *%rbx
+; CHECK: movl $0, GHJK(%rip)
+; CHECK-NEXT: jmpq *%rbx
+
+define void @tail_duplicate_me() nounwind {
+entry:
+ %a = call i1 @qux()
+ %c = call i8* @choose(i8* blockaddress(@tail_duplicate_me, %return),
+ i8* blockaddress(@tail_duplicate_me, %altret))
+ br i1 %a, label %A, label %next
+next:
+ %b = call i1 @qux()
+ br i1 %b, label %B, label %C
+
+A:
+ call void @bar(i32 0)
+ store i32 0, i32* @GHJK
+ br label %M
+
+B:
+ call void @car(i32 1)
+ store i32 0, i32* @GHJK
+ br label %M
+
+C:
+ call void @dar(i32 2)
+ store i32 0, i32* @GHJK
+ br label %M
+
+M:
+ indirectbr i8* %c, [label %return, label %altret]
+
+return:
+ call void @ear(i32 1000)
+ ret void
+altret:
+ call void @far(i32 1001)
+ ret void
+}
+
+; BranchFolding shouldn't try to merge the tails of two blocks
+; with only a branch in common, regardless of the fallthrough situation.
+
+; CHECK: dont_merge_oddly:
+; CHECK-NOT: ret
+; CHECK: ucomiss %xmm1, %xmm2
+; CHECK-NEXT: jbe .LBB3_3
+; CHECK-NEXT: ucomiss %xmm0, %xmm1
+; CHECK-NEXT: ja .LBB3_4
+; CHECK-NEXT: .LBB3_2:
+; CHECK-NEXT: movb $1, %al
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB3_3:
+; CHECK-NEXT: ucomiss %xmm0, %xmm2
+; CHECK-NEXT: jbe .LBB3_2
+; CHECK-NEXT: .LBB3_4:
+; CHECK-NEXT: xorb %al, %al
+; CHECK-NEXT: ret
+
+define i1 @dont_merge_oddly(float* %result) nounwind {
+entry:
+ %tmp4 = getelementptr float* %result, i32 2
+ %tmp5 = load float* %tmp4, align 4
+ %tmp7 = getelementptr float* %result, i32 4
+ %tmp8 = load float* %tmp7, align 4
+ %tmp10 = getelementptr float* %result, i32 6
+ %tmp11 = load float* %tmp10, align 4
+ %tmp12 = fcmp olt float %tmp8, %tmp11
+ br i1 %tmp12, label %bb, label %bb21
+
+bb:
+ %tmp23469 = fcmp olt float %tmp5, %tmp8
+ br i1 %tmp23469, label %bb26, label %bb30
+
+bb21:
+ %tmp23 = fcmp olt float %tmp5, %tmp11
+ br i1 %tmp23, label %bb26, label %bb30
+
+bb26:
+ ret i1 0
+
+bb30:
+ ret i1 1
+}
+
+; Do any-size tail-merging when two candidate blocks will both require
+; an unconditional jump to complete a two-way conditional branch.
+
+; CHECK: c_expand_expr_stmt:
+; CHECK: jmp .LBB4_7
+; CHECK-NEXT: .LBB4_12:
+; CHECK-NEXT: movq 8(%rax), %rax
+; CHECK-NEXT: movb 16(%rax), %al
+; CHECK-NEXT: cmpb $16, %al
+; CHECK-NEXT: je .LBB4_6
+; CHECK-NEXT: cmpb $23, %al
+; CHECK-NEXT: je .LBB4_6
+; CHECK-NEXT: jmp .LBB4_15
+; CHECK-NEXT: .LBB4_14:
+; CHECK-NEXT: cmpb $23, %bl
+; CHECK-NEXT: jne .LBB4_15
+; CHECK-NEXT: .LBB4_15:
+
+%0 = type { %struct.rtx_def* }
+%struct.lang_decl = type opaque
+%struct.rtx_def = type { i16, i8, i8, [1 x %union.rtunion] }
+%struct.tree_decl = type { [24 x i8], i8*, i32, %union.tree_node*, i32, i8, i8, i8, i8, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %struct.rtx_def*, %union..2anon, %0, %union.tree_node*, %struct.lang_decl* }
+%union..2anon = type { i32 }
+%union.rtunion = type { i8* }
+%union.tree_node = type { %struct.tree_decl }
+
+define fastcc void @c_expand_expr_stmt(%union.tree_node* %expr) nounwind {
+entry:
+ %tmp4 = load i8* null, align 8 ; <i8> [#uses=3]
+ switch i8 %tmp4, label %bb3 [
+ i8 18, label %bb
+ ]
+
+bb: ; preds = %entry
+ switch i32 undef, label %bb1 [
+ i32 0, label %bb2.i
+ i32 37, label %bb.i
+ ]
+
+bb.i: ; preds = %bb
+ switch i32 undef, label %bb1 [
+ i32 0, label %lvalue_p.exit
+ ]
+
+bb2.i: ; preds = %bb
+ br label %bb3
+
+lvalue_p.exit: ; preds = %bb.i
+ %tmp21 = load %union.tree_node** null, align 8 ; <%union.tree_node*> [#uses=3]
+ %tmp22 = getelementptr inbounds %union.tree_node* %tmp21, i64 0, i32 0, i32 0, i64 0 ; <i8*> [#uses=1]
+ %tmp23 = load i8* %tmp22, align 8 ; <i8> [#uses=1]
+ %tmp24 = zext i8 %tmp23 to i32 ; <i32> [#uses=1]
+ switch i32 %tmp24, label %lvalue_p.exit4 [
+ i32 0, label %bb2.i3
+ i32 2, label %bb.i1
+ ]
+
+bb.i1: ; preds = %lvalue_p.exit
+ %tmp25 = getelementptr inbounds %union.tree_node* %tmp21, i64 0, i32 0, i32 2 ; <i32*> [#uses=1]
+ %tmp26 = bitcast i32* %tmp25 to %union.tree_node** ; <%union.tree_node**> [#uses=1]
+ %tmp27 = load %union.tree_node** %tmp26, align 8 ; <%union.tree_node*> [#uses=2]
+ %tmp28 = getelementptr inbounds %union.tree_node* %tmp27, i64 0, i32 0, i32 0, i64 16 ; <i8*> [#uses=1]
+ %tmp29 = load i8* %tmp28, align 8 ; <i8> [#uses=1]
+ %tmp30 = zext i8 %tmp29 to i32 ; <i32> [#uses=1]
+ switch i32 %tmp30, label %lvalue_p.exit4 [
+ i32 0, label %bb2.i.i2
+ i32 2, label %bb.i.i
+ ]
+
+bb.i.i: ; preds = %bb.i1
+ %tmp34 = tail call fastcc i32 @lvalue_p(%union.tree_node* null) nounwind ; <i32> [#uses=1]
+ %phitmp = icmp ne i32 %tmp34, 0 ; <i1> [#uses=1]
+ br label %lvalue_p.exit4
+
+bb2.i.i2: ; preds = %bb.i1
+ %tmp35 = getelementptr inbounds %union.tree_node* %tmp27, i64 0, i32 0, i32 0, i64 8 ; <i8*> [#uses=1]
+ %tmp36 = bitcast i8* %tmp35 to %union.tree_node** ; <%union.tree_node**> [#uses=1]
+ %tmp37 = load %union.tree_node** %tmp36, align 8 ; <%union.tree_node*> [#uses=1]
+ %tmp38 = getelementptr inbounds %union.tree_node* %tmp37, i64 0, i32 0, i32 0, i64 16 ; <i8*> [#uses=1]
+ %tmp39 = load i8* %tmp38, align 8 ; <i8> [#uses=1]
+ switch i8 %tmp39, label %bb2 [
+ i8 16, label %lvalue_p.exit4
+ i8 23, label %lvalue_p.exit4
+ ]
+
+bb2.i3: ; preds = %lvalue_p.exit
+ %tmp40 = getelementptr inbounds %union.tree_node* %tmp21, i64 0, i32 0, i32 0, i64 8 ; <i8*> [#uses=1]
+ %tmp41 = bitcast i8* %tmp40 to %union.tree_node** ; <%union.tree_node**> [#uses=1]
+ %tmp42 = load %union.tree_node** %tmp41, align 8 ; <%union.tree_node*> [#uses=1]
+ %tmp43 = getelementptr inbounds %union.tree_node* %tmp42, i64 0, i32 0, i32 0, i64 16 ; <i8*> [#uses=1]
+ %tmp44 = load i8* %tmp43, align 8 ; <i8> [#uses=1]
+ switch i8 %tmp44, label %bb2 [
+ i8 16, label %lvalue_p.exit4
+ i8 23, label %lvalue_p.exit4
+ ]
+
+lvalue_p.exit4: ; preds = %bb2.i3, %bb2.i3, %bb2.i.i2, %bb2.i.i2, %bb.i.i, %bb.i1, %lvalue_p.exit
+ %tmp45 = phi i1 [ %phitmp, %bb.i.i ], [ false, %bb2.i.i2 ], [ false, %bb2.i.i2 ], [ false, %bb.i1 ], [ false, %bb2.i3 ], [ false, %bb2.i3 ], [ false, %lvalue_p.exit ] ; <i1> [#uses=1]
+ %tmp46 = icmp eq i8 %tmp4, 0 ; <i1> [#uses=1]
+ %or.cond = or i1 %tmp45, %tmp46 ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb2, label %bb3
+
+bb1: ; preds = %bb2.i.i, %bb.i, %bb
+ %.old = icmp eq i8 %tmp4, 23 ; <i1> [#uses=1]
+ br i1 %.old, label %bb2, label %bb3
+
+bb2: ; preds = %bb1, %lvalue_p.exit4, %bb2.i3, %bb2.i.i2
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb1, %lvalue_p.exit4, %bb2.i, %entry
+ %expr_addr.0 = phi %union.tree_node* [ null, %bb2 ], [ %expr, %bb2.i ], [ %expr, %entry ], [ %expr, %bb1 ], [ %expr, %lvalue_p.exit4 ] ; <%union.tree_node*> [#uses=0]
+ unreachable
+}
+
+declare fastcc i32 @lvalue_p(%union.tree_node* nocapture) nounwind readonly
+
+declare fastcc %union.tree_node* @default_conversion(%union.tree_node*) nounwind
+
+
+; If one tail merging candidate falls through into the other,
+; tail merging is likely profitable regardless of how few
+; instructions are involved. This function should have only
+; one ret instruction.
+
+; CHECK: foo:
+; CHECK: callq func
+; CHECK-NEXT: .LBB5_2:
+; CHECK-NEXT: addq $8, %rsp
+; CHECK-NEXT: ret
+
+define void @foo(i1* %V) nounwind {
+entry:
+ %t0 = icmp eq i1* %V, null
+ br i1 %t0, label %return, label %bb
+
+bb:
+ call void @func()
+ ret void
+
+return:
+ ret void
+}
+
+declare void @func()
+
+; one - One instruction may be tail-duplicated even with optsize.
+
+; CHECK: one:
+; CHECK: movl $0, XYZ(%rip)
+; CHECK: movl $0, XYZ(%rip)
+
+@XYZ = external global i32
+
+define void @one() nounwind optsize {
+entry:
+ %0 = icmp eq i32 undef, 0
+ br i1 %0, label %bbx, label %bby
+
+bby:
+ switch i32 undef, label %bb7 [
+ i32 16, label %return
+ ]
+
+bb7:
+ volatile store i32 0, i32* @XYZ
+ unreachable
+
+bbx:
+ switch i32 undef, label %bb12 [
+ i32 128, label %return
+ ]
+
+bb12:
+ volatile store i32 0, i32* @XYZ
+ unreachable
+
+return:
+ ret void
+}
+
+; two - Same as one, but with two instructions in the common
+; tail instead of one. This is too much to be merged, given
+; the optsize attribute.
+
+; CHECK: two:
+; CHECK-NOT: XYZ
+; CHECK: movl $0, XYZ(%rip)
+; CHECK: movl $1, XYZ(%rip)
+; CHECK-NOT: XYZ
+; CHECK: ret
+
+define void @two() nounwind optsize {
+entry:
+ %0 = icmp eq i32 undef, 0
+ br i1 %0, label %bbx, label %bby
+
+bby:
+ switch i32 undef, label %bb7 [
+ i32 16, label %return
+ ]
+
+bb7:
+ volatile store i32 0, i32* @XYZ
+ volatile store i32 1, i32* @XYZ
+ unreachable
+
+bbx:
+ switch i32 undef, label %bb12 [
+ i32 128, label %return
+ ]
+
+bb12:
+ volatile store i32 0, i32* @XYZ
+ volatile store i32 1, i32* @XYZ
+ unreachable
+
+return:
+ ret void
+}
+
+; two_nosize - Same as two, but without the optsize attribute.
+; Now two instructions are enough to be tail-duplicated.
+
+; CHECK: two_nosize:
+; CHECK: movl $0, XYZ(%rip)
+; CHECK: movl $1, XYZ(%rip)
+; CHECK: movl $0, XYZ(%rip)
+; CHECK: movl $1, XYZ(%rip)
+
+define void @two_nosize() nounwind {
+entry:
+ %0 = icmp eq i32 undef, 0
+ br i1 %0, label %bbx, label %bby
+
+bby:
+ switch i32 undef, label %bb7 [
+ i32 16, label %return
+ ]
+
+bb7:
+ volatile store i32 0, i32* @XYZ
+ volatile store i32 1, i32* @XYZ
+ unreachable
+
+bbx:
+ switch i32 undef, label %bb12 [
+ i32 128, label %return
+ ]
+
+bb12:
+ volatile store i32 0, i32* @XYZ
+ volatile store i32 1, i32* @XYZ
+ unreachable
+
+return:
+ ret void
+}
diff --git a/test/CodeGen/X86/tailcall-fastisel.ll b/test/CodeGen/X86/tailcall-fastisel.ll
new file mode 100644
index 0000000..d54fb41
--- /dev/null
+++ b/test/CodeGen/X86/tailcall-fastisel.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 -tailcallopt -fast-isel | grep TAILCALL
+
+; Fast-isel shouldn't attempt to handle this tail call, and it should
+; cleanly terminate instruction selection in the block after it's
+; done to avoid emitting invalid MachineInstrs.
+
+%0 = type { i64, i32, i8* }
+
+define fastcc i8* @"visit_array_aux<`Reference>"(%0 %arg, i32 %arg1) nounwind {
+fail: ; preds = %entry
+ %tmp20 = tail call fastcc i8* @"visit_array_aux<`Reference>"(%0 %arg, i32 undef) ; <i8*> [#uses=1]
+ ret i8* %tmp20
+}
diff --git a/test/CodeGen/X86/tailcall-i1.ll b/test/CodeGen/X86/tailcall-i1.ll
new file mode 100644
index 0000000..8ef1f11
--- /dev/null
+++ b/test/CodeGen/X86/tailcall-i1.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
+define fastcc i1 @i1test(i32, i32, i32, i32) {
+ entry:
+ %4 = tail call fastcc i1 @i1test( i32 %0, i32 %1, i32 %2, i32 %3)
+ ret i1 %4
+}
diff --git a/test/CodeGen/X86/tailcall-largecode.ll b/test/CodeGen/X86/tailcall-largecode.ll
new file mode 100644
index 0000000..8ddc405
--- /dev/null
+++ b/test/CodeGen/X86/tailcall-largecode.ll
@@ -0,0 +1,71 @@
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -tailcallopt -code-model=large | FileCheck %s
+
+declare fastcc i32 @callee(i32 %arg)
+define fastcc i32 @directcall(i32 %arg) {
+entry:
+; This is the large code model, so &callee may not fit into the jmp
+; instruction. Instead, stick it into a register.
+; CHECK: movabsq $callee, [[REGISTER:%r[a-z0-9]+]]
+; CHECK: jmpq *[[REGISTER]] # TAILCALL
+ %res = tail call fastcc i32 @callee(i32 %arg)
+ ret i32 %res
+}
+
+; Check that the register used for an indirect tail call doesn't
+; clobber any of the arguments.
+define fastcc i32 @indirect_manyargs(i32(i32,i32,i32,i32,i32,i32,i32)* %target) {
+; Adjust the stack to enter the function. (The amount of the
+; adjustment may change in the future, in which case the location of
+; the stack argument and the return adjustment will change too.)
+; CHECK: subq $8, %rsp
+; Put the call target into R11, which won't be clobbered while restoring
+; callee-saved registers and won't be used for passing arguments.
+; CHECK: movq %rdi, %r11
+; Pass the stack argument.
+; CHECK: movl $7, 16(%rsp)
+; Pass the register arguments, in the right registers.
+; CHECK: movl $1, %edi
+; CHECK: movl $2, %esi
+; CHECK: movl $3, %edx
+; CHECK: movl $4, %ecx
+; CHECK: movl $5, %r8d
+; CHECK: movl $6, %r9d
+; Adjust the stack to "return".
+; CHECK: addq $8, %rsp
+; And tail-call to the target.
+; CHECK: jmpq *%r11 # TAILCALL
+ %res = tail call fastcc i32 %target(i32 1, i32 2, i32 3, i32 4, i32 5,
+ i32 6, i32 7)
+ ret i32 %res
+}
+
+; Check that the register used for a direct tail call doesn't clobber
+; any of the arguments.
+declare fastcc i32 @manyargs_callee(i32,i32,i32,i32,i32,i32,i32)
+define fastcc i32 @direct_manyargs() {
+; Adjust the stack to enter the function. (The amount of the
+; adjustment may change in the future, in which case the location of
+; the stack argument and the return adjustment will change too.)
+; CHECK: subq $8, %rsp
+; Pass the stack argument.
+; CHECK: movl $7, 16(%rsp)
+; Pass the register arguments, in the right registers.
+; CHECK: movl $1, %edi
+; CHECK: movl $2, %esi
+; CHECK: movl $3, %edx
+; CHECK: movl $4, %ecx
+; CHECK: movl $5, %r8d
+; CHECK: movl $6, %r9d
+; This is the large code model, so &manyargs_callee may not fit into
+; the jmp instruction. Put it into R11, which won't be clobbered
+; while restoring callee-saved registers and won't be used for passing
+; arguments.
+; CHECK: movabsq $manyargs_callee, %r11
+; Adjust the stack to "return".
+; CHECK: addq $8, %rsp
+; And tail-call to the target.
+; CHECK: jmpq *%r11 # TAILCALL
+ %res = tail call fastcc i32 @manyargs_callee(i32 1, i32 2, i32 3, i32 4,
+ i32 5, i32 6, i32 7)
+ ret i32 %res
+}
diff --git a/test/CodeGen/X86/tailcall-stackalign.ll b/test/CodeGen/X86/tailcall-stackalign.ll
new file mode 100644
index 0000000..0233139
--- /dev/null
+++ b/test/CodeGen/X86/tailcall-stackalign.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s
+; Linux has 8 byte alignment so the params cause stack size 20 when tailcallopt
+; is enabled, ensure that a normal fastcc call has matching stack size
+
+
+define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2, i32 %in3, i32 %in4) {
+ %tmp11 = tail call fastcc i32 @tailcallee(i32 %in1, i32 %in2,
+ i32 %in1, i32 %in2)
+ ret i32 %tmp11
+}
+
+define i32 @main(i32 %argc, i8** %argv) {
+ %tmp1 = call fastcc i32 @tailcaller( i32 1, i32 2, i32 3, i32 4 )
+ ; expect match subl [stacksize] here
+ ret i32 0
+}
+
+; CHECK: call tailcaller
+; CHECK-NEXT: subl $12
diff --git a/test/CodeGen/X86/tailcall-structret.ll b/test/CodeGen/X86/tailcall-structret.ll
new file mode 100644
index 0000000..d8be4b2
--- /dev/null
+++ b/test/CodeGen/X86/tailcall-structret.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
+define fastcc { { i8*, i8* }*, i8*} @init({ { i8*, i8* }*, i8*}, i32) {
+entry:
+ %2 = tail call fastcc { { i8*, i8* }*, i8* } @init({ { i8*, i8*}*, i8*} %0, i32 %1)
+ ret { { i8*, i8* }*, i8*} %2
+}
diff --git a/test/CodeGen/X86/tailcall-void.ll b/test/CodeGen/X86/tailcall-void.ll
new file mode 100644
index 0000000..4e578d1
--- /dev/null
+++ b/test/CodeGen/X86/tailcall-void.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
+define fastcc void @i1test(i32, i32, i32, i32) {
+ entry:
+ tail call fastcc void @i1test( i32 %0, i32 %1, i32 %2, i32 %3)
+ ret void
+}
diff --git a/test/CodeGen/X86/tailcall1.ll b/test/CodeGen/X86/tailcall1.ll
new file mode 100644
index 0000000..f7ff5d5
--- /dev/null
+++ b/test/CodeGen/X86/tailcall1.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL | count 5
+
+; With -tailcallopt, CodeGen guarantees a tail call optimization
+; for all of these.
+
+declare fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) nounwind {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
+ ret i32 %tmp11
+}
+
+declare fastcc i8* @alias_callee()
+
+define fastcc noalias i8* @noalias_caller() nounwind {
+ %p = tail call fastcc i8* @alias_callee()
+ ret i8* %p
+}
+
+declare fastcc noalias i8* @noalias_callee()
+
+define fastcc i8* @alias_caller() nounwind {
+ %p = tail call fastcc noalias i8* @noalias_callee()
+ ret i8* %p
+}
+
+declare fastcc i32 @i32_callee()
+
+define fastcc i32 @ret_undef() nounwind {
+ %p = tail call fastcc i32 @i32_callee()
+ ret i32 undef
+}
+
+declare fastcc void @does_not_return()
+
+define fastcc i32 @noret() nounwind {
+ tail call fastcc void @does_not_return()
+ unreachable
+}
diff --git a/test/CodeGen/X86/tailcall2.ll b/test/CodeGen/X86/tailcall2.ll
new file mode 100644
index 0000000..80bab61
--- /dev/null
+++ b/test/CodeGen/X86/tailcall2.ll
@@ -0,0 +1,197 @@
+; RUN: llc < %s -march=x86 -asm-verbose=false | FileCheck %s -check-prefix=32
+; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s -check-prefix=64
+
+define void @t1(i32 %x) nounwind ssp {
+entry:
+; 32: t1:
+; 32: jmp {{_?}}foo
+
+; 64: t1:
+; 64: jmp {{_?}}foo
+ tail call void @foo() nounwind
+ ret void
+}
+
+declare void @foo()
+
+define void @t2() nounwind ssp {
+entry:
+; 32: t2:
+; 32: jmp {{_?}}foo2
+
+; 64: t2:
+; 64: jmp {{_?}}foo2
+ %0 = tail call i32 @foo2() nounwind
+ ret void
+}
+
+declare i32 @foo2()
+
+define void @t3() nounwind ssp {
+entry:
+; 32: t3:
+; 32: jmp {{_?}}foo3
+
+; 64: t3:
+; 64: jmp {{_?}}foo3
+ %0 = tail call i32 @foo3() nounwind
+ ret void
+}
+
+declare i32 @foo3()
+
+define void @t4(void (i32)* nocapture %x) nounwind ssp {
+entry:
+; 32: t4:
+; 32: call *
+; FIXME: gcc can generate a tailcall for this. But it's tricky.
+
+; 64: t4:
+; 64-NOT: call
+; 64: jmpq *
+ tail call void %x(i32 0) nounwind
+ ret void
+}
+
+define void @t5(void ()* nocapture %x) nounwind ssp {
+entry:
+; 32: t5:
+; 32-NOT: call
+; 32: jmpl *
+
+; 64: t5:
+; 64-NOT: call
+; 64: jmpq *
+ tail call void %x() nounwind
+ ret void
+}
+
+define i32 @t6(i32 %x) nounwind ssp {
+entry:
+; 32: t6:
+; 32: call {{_?}}t6
+; 32: jmp {{_?}}bar
+
+; 64: t6:
+; 64: jmp {{_?}}t6
+; 64: jmp {{_?}}bar
+ %0 = icmp slt i32 %x, 10
+ br i1 %0, label %bb, label %bb1
+
+bb:
+ %1 = add nsw i32 %x, -1
+ %2 = tail call i32 @t6(i32 %1) nounwind ssp
+ ret i32 %2
+
+bb1:
+ %3 = tail call i32 @bar(i32 %x) nounwind
+ ret i32 %3
+}
+
+declare i32 @bar(i32)
+
+define i32 @t7(i32 %a, i32 %b, i32 %c) nounwind ssp {
+entry:
+; 32: t7:
+; 32: jmp {{_?}}bar2
+
+; 64: t7:
+; 64: jmp {{_?}}bar2
+ %0 = tail call i32 @bar2(i32 %a, i32 %b, i32 %c) nounwind
+ ret i32 %0
+}
+
+declare i32 @bar2(i32, i32, i32)
+
+define signext i16 @t8() nounwind ssp {
+entry:
+; 32: t8:
+; 32: call {{_?}}bar3
+
+; 64: t8:
+; 64: callq {{_?}}bar3
+ %0 = tail call signext i16 @bar3() nounwind ; <i16> [#uses=1]
+ ret i16 %0
+}
+
+declare signext i16 @bar3()
+
+define signext i16 @t9(i32 (i32)* nocapture %x) nounwind ssp {
+entry:
+; 32: t9:
+; 32: call *
+
+; 64: t9:
+; 64: callq *
+ %0 = bitcast i32 (i32)* %x to i16 (i32)*
+ %1 = tail call signext i16 %0(i32 0) nounwind
+ ret i16 %1
+}
+
+define void @t10() nounwind ssp {
+entry:
+; 32: t10:
+; 32: call
+
+; 64: t10:
+; 64: callq
+ %0 = tail call i32 @foo4() noreturn nounwind
+ unreachable
+}
+
+declare i32 @foo4()
+
+define i32 @t11(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind ssp {
+; In 32-bit mode, it's emitting a bunch of dead loads that are not being
+; eliminated currently.
+
+; 32: t11:
+; 32-NOT: subl ${{[0-9]+}}, %esp
+; 32: jne
+; 32-NOT: movl
+; 32-NOT: addl ${{[0-9]+}}, %esp
+; 32: jmp {{_?}}foo5
+
+; 64: t11:
+; 64-NOT: subq ${{[0-9]+}}, %esp
+; 64-NOT: addq ${{[0-9]+}}, %esp
+; 64: jmp {{_?}}foo5
+entry:
+ %0 = icmp eq i32 %x, 0
+ br i1 %0, label %bb6, label %bb
+
+bb:
+ %1 = tail call i32 @foo5(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind
+ ret i32 %1
+
+bb6:
+ ret i32 0
+}
+
+declare i32 @foo5(i32, i32, i32, i32, i32)
+
+%struct.t = type { i32, i32, i32, i32, i32 }
+
+define i32 @t12(i32 %x, i32 %y, %struct.t* byval align 4 %z) nounwind ssp {
+; 32: t12:
+; 32-NOT: subl ${{[0-9]+}}, %esp
+; 32-NOT: addl ${{[0-9]+}}, %esp
+; 32: jmp {{_?}}foo6
+
+; 64: t12:
+; 64-NOT: subq ${{[0-9]+}}, %esp
+; 64-NOT: addq ${{[0-9]+}}, %esp
+; 64: jmp {{_?}}foo6
+entry:
+ %0 = icmp eq i32 %x, 0
+ br i1 %0, label %bb2, label %bb
+
+bb:
+ %1 = tail call i32 @foo6(i32 %x, i32 %y, %struct.t* byval align 4 %z) nounwind
+ ret i32 %1
+
+bb2:
+ ret i32 0
+}
+
+declare i32 @foo6(i32, i32, %struct.t* byval align 4)
diff --git a/test/CodeGen/X86/tailcallbyval.ll b/test/CodeGen/X86/tailcallbyval.ll
new file mode 100644
index 0000000..7002560
--- /dev/null
+++ b/test/CodeGen/X86/tailcallbyval.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
+; RUN: llc < %s -march=x86 -tailcallopt | grep {movl\[\[:space:\]\]*4(%esp), %eax} | count 1
+%struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32,
+ i32, i32, i32, i32, i32, i32, i32, i32,
+ i32, i32, i32, i32, i32, i32, i32, i32 }
+
+define fastcc i32 @tailcallee(%struct.s* byval %a) nounwind {
+entry:
+ %tmp2 = getelementptr %struct.s* %a, i32 0, i32 0
+ %tmp3 = load i32* %tmp2
+ ret i32 %tmp3
+}
+
+define fastcc i32 @tailcaller(%struct.s* byval %a) nounwind {
+entry:
+ %tmp4 = tail call fastcc i32 @tailcallee(%struct.s* %a byval)
+ ret i32 %tmp4
+}
diff --git a/test/CodeGen/X86/tailcallbyval64.ll b/test/CodeGen/X86/tailcallbyval64.ll
new file mode 100644
index 0000000..7c685b8
--- /dev/null
+++ b/test/CodeGen/X86/tailcallbyval64.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep TAILCALL
+; Expect 2 rep;movs because of tail call byval lowering.
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2
+; A sequence of copyto/copyfrom virtual registers is used to deal with byval
+; lowering appearing after moving arguments to registers. The following two
+; checks verify that the register allocator changes those sequences to direct
+; moves to argument register where it can (for registers that are not used in
+; byval lowering - not rsi, not rdi, not rcx).
+; Expect argument 4 to be moved directly to register edx.
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {7} | grep edx
+; Expect argument 6 to be moved directly to register r8.
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {17} | grep r8
+
+%struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
+ i64, i64, i64, i64, i64, i64, i64, i64,
+ i64, i64, i64, i64, i64, i64, i64, i64 }
+
+declare fastcc i64 @tailcallee(%struct.s* byval %a, i64 %val, i64 %val2, i64 %val3, i64 %val4, i64 %val5)
+
+
+define fastcc i64 @tailcaller(i64 %b, %struct.s* byval %a) {
+entry:
+ %tmp2 = getelementptr %struct.s* %a, i32 0, i32 1
+ %tmp3 = load i64* %tmp2, align 8
+ %tmp4 = tail call fastcc i64 @tailcallee(%struct.s* %a byval, i64 %tmp3, i64 %b, i64 7, i64 13, i64 17)
+ ret i64 %tmp4
+}
+
+
diff --git a/test/CodeGen/X86/tailcallfp.ll b/test/CodeGen/X86/tailcallfp.ll
new file mode 100644
index 0000000..c0b609a
--- /dev/null
+++ b/test/CodeGen/X86/tailcallfp.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -tailcallopt | not grep call
+define fastcc i32 @bar(i32 %X, i32(double, i32) *%FP) {
+ %Y = tail call fastcc i32 %FP(double 0.0, i32 %X)
+ ret i32 %Y
+}
diff --git a/test/CodeGen/X86/tailcallfp2.ll b/test/CodeGen/X86/tailcallfp2.ll
new file mode 100644
index 0000000..3841f51
--- /dev/null
+++ b/test/CodeGen/X86/tailcallfp2.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax}
+
+declare i32 @putchar(i32)
+
+define fastcc i32 @checktail(i32 %x, i32* %f, i32 %g) nounwind {
+ %tmp1 = icmp sgt i32 %x, 0
+ br i1 %tmp1, label %if-then, label %if-else
+
+if-then:
+ %fun_ptr = bitcast i32* %f to i32(i32, i32*, i32)*
+ %arg1 = add i32 %x, -1
+ call i32 @putchar(i32 90)
+ %res = tail call fastcc i32 %fun_ptr( i32 %arg1, i32 * %f, i32 %g)
+ ret i32 %res
+
+if-else:
+ ret i32 %x
+}
+
+
+define i32 @main() nounwind {
+ %f = bitcast i32 (i32, i32*, i32)* @checktail to i32*
+ %res = tail call fastcc i32 @checktail( i32 10, i32* %f,i32 10)
+ ret i32 %res
+}
diff --git a/test/CodeGen/X86/tailcallpic1.ll b/test/CodeGen/X86/tailcallpic1.ll
new file mode 100644
index 0000000..60e3be5
--- /dev/null
+++ b/test/CodeGen/X86/tailcallpic1.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep TAILCALL
+
+define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}
diff --git a/test/CodeGen/X86/tailcallpic2.ll b/test/CodeGen/X86/tailcallpic2.ll
new file mode 100644
index 0000000..eaa7631
--- /dev/null
+++ b/test/CodeGen/X86/tailcallpic2.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep -v TAILCALL
+
+define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}
diff --git a/test/CodeGen/X86/tailcallstack64.ll b/test/CodeGen/X86/tailcallstack64.ll
new file mode 100644
index 0000000..d05dff8
--- /dev/null
+++ b/test/CodeGen/X86/tailcallstack64.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -tailcallopt -march=x86-64 -post-RA-scheduler=true | FileCheck %s
+
+; Check that lowered arguments on the stack do not overwrite each other.
+; Add %in1 %p1 to a different temporary register (%eax).
+; CHECK: movl %edi, %eax
+; Move param %in1 to temp register (%r10d).
+; CHECK: movl 40(%rsp), %r10d
+; Move param %in2 to stack.
+; CHECK: movl %r10d, 32(%rsp)
+; Move result of addition to stack.
+; CHECK: movl %eax, 40(%rsp)
+; Eventually, do a TAILCALL
+; CHECK: TAILCALL
+
+declare fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %a, i32 %b) nounwind
+
+define fastcc i32 @tailcaller(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %in1, i32 %in2) nounwind {
+entry:
+ %tmp = add i32 %in1, %p1
+ %retval = tail call fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %in2,i32 %tmp)
+ ret i32 %retval
+}
+
diff --git a/test/CodeGen/X86/test-nofold.ll b/test/CodeGen/X86/test-nofold.ll
new file mode 100644
index 0000000..f1063dc
--- /dev/null
+++ b/test/CodeGen/X86/test-nofold.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
+; rdar://5752025
+
+; We want:
+; CHECK: movl 4(%esp), %ecx
+; CHECK-NEXT: andl $15, %ecx
+; CHECK-NEXT: movl $42, %eax
+; CHECK-NEXT: cmovel %ecx, %eax
+; CHECK-NEXT: ret
+;
+; We don't want:
+; movl 4(%esp), %eax
+; movl %eax, %ecx # bad: extra copy
+; andl $15, %ecx
+; testl $15, %eax # bad: peep obstructed
+; movl $42, %eax
+; cmovel %ecx, %eax
+; ret
+;
+; We also don't want:
+; movl $15, %ecx # bad: larger encoding
+; andl 4(%esp), %ecx
+; movl $42, %eax
+; cmovel %ecx, %eax
+; ret
+;
+; We also don't want:
+; movl 4(%esp), %ecx
+; andl $15, %ecx
+; testl %ecx, %ecx # bad: unnecessary test
+; movl $42, %eax
+; cmovel %ecx, %eax
+; ret
+
+define i32 @t1(i32 %X) nounwind {
+entry:
+ %tmp2 = and i32 %X, 15 ; <i32> [#uses=2]
+ %tmp4 = icmp eq i32 %tmp2, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp4, i32 %tmp2, i32 42 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
diff --git a/test/CodeGen/X86/test-shrink-bug.ll b/test/CodeGen/X86/test-shrink-bug.ll
new file mode 100644
index 0000000..64631ea
--- /dev/null
+++ b/test/CodeGen/X86/test-shrink-bug.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s | FileCheck %s
+
+; Codegen shouldn't reduce the comparison down to testb $-1, %al
+; because that changes the result of the signed test.
+; PR5132
+; CHECK: testw $255, %ax
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+
+@g_14 = global i8 -6, align 1 ; <i8*> [#uses=1]
+
+declare i32 @func_16(i8 signext %p_19, i32 %p_20) nounwind
+
+define i32 @func_35(i64 %p_38) nounwind ssp {
+entry:
+ %tmp = load i8* @g_14 ; <i8> [#uses=2]
+ %conv = zext i8 %tmp to i32 ; <i32> [#uses=1]
+ %cmp = icmp sle i32 1, %conv ; <i1> [#uses=1]
+ %conv2 = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ %call = call i32 @func_16(i8 signext %tmp, i32 %conv2) ssp ; <i32> [#uses=1]
+ ret i32 1
+}
diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll
new file mode 100644
index 0000000..1d63693
--- /dev/null
+++ b/test/CodeGen/X86/test-shrink.ll
@@ -0,0 +1,158 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
+
+; CHECK-64: g64xh:
+; CHECK-64: testb $8, %ah
+; CHECK-64: ret
+; CHECK-32: g64xh:
+; CHECK-32: testb $8, %ah
+; CHECK-32: ret
+define void @g64xh(i64 inreg %x) nounwind {
+ %t = and i64 %x, 2048
+ %s = icmp eq i64 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+; CHECK-64: g64xl:
+; CHECK-64: testb $8, %dil
+; CHECK-64: ret
+; CHECK-32: g64xl:
+; CHECK-32: testb $8, %al
+; CHECK-32: ret
+define void @g64xl(i64 inreg %x) nounwind {
+ %t = and i64 %x, 8
+ %s = icmp eq i64 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+; CHECK-64: g32xh:
+; CHECK-64: testb $8, %ah
+; CHECK-64: ret
+; CHECK-32: g32xh:
+; CHECK-32: testb $8, %ah
+; CHECK-32: ret
+define void @g32xh(i32 inreg %x) nounwind {
+ %t = and i32 %x, 2048
+ %s = icmp eq i32 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+; CHECK-64: g32xl:
+; CHECK-64: testb $8, %dil
+; CHECK-64: ret
+; CHECK-32: g32xl:
+; CHECK-32: testb $8, %al
+; CHECK-32: ret
+define void @g32xl(i32 inreg %x) nounwind {
+ %t = and i32 %x, 8
+ %s = icmp eq i32 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+; CHECK-64: g16xh:
+; CHECK-64: testb $8, %ah
+; CHECK-64: ret
+; CHECK-32: g16xh:
+; CHECK-32: testb $8, %ah
+; CHECK-32: ret
+define void @g16xh(i16 inreg %x) nounwind {
+ %t = and i16 %x, 2048
+ %s = icmp eq i16 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+; CHECK-64: g16xl:
+; CHECK-64: testb $8, %dil
+; CHECK-64: ret
+; CHECK-32: g16xl:
+; CHECK-32: testb $8, %al
+; CHECK-32: ret
+define void @g16xl(i16 inreg %x) nounwind {
+ %t = and i16 %x, 8
+ %s = icmp eq i16 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+; CHECK-64: g64x16:
+; CHECK-64: testw $-32640, %di
+; CHECK-64: ret
+; CHECK-32: g64x16:
+; CHECK-32: testw $-32640, %ax
+; CHECK-32: ret
+define void @g64x16(i64 inreg %x) nounwind {
+ %t = and i64 %x, 32896
+ %s = icmp eq i64 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+; CHECK-64: g32x16:
+; CHECK-64: testw $-32640, %di
+; CHECK-64: ret
+; CHECK-32: g32x16:
+; CHECK-32: testw $-32640, %ax
+; CHECK-32: ret
+define void @g32x16(i32 inreg %x) nounwind {
+ %t = and i32 %x, 32896
+ %s = icmp eq i32 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+; CHECK-64: g64x32:
+; CHECK-64: testl $268468352, %edi
+; CHECK-64: ret
+; CHECK-32: g64x32:
+; CHECK-32: testl $268468352, %eax
+; CHECK-32: ret
+define void @g64x32(i64 inreg %x) nounwind {
+ %t = and i64 %x, 268468352
+ %s = icmp eq i64 %t, 0
+ br i1 %s, label %yes, label %no
+
+yes:
+ call void @bar()
+ ret void
+no:
+ ret void
+}
+
+declare void @bar()
diff --git a/test/CodeGen/X86/testl-commute.ll b/test/CodeGen/X86/testl-commute.ll
new file mode 100644
index 0000000..3d5f672
--- /dev/null
+++ b/test/CodeGen/X86/testl-commute.ll
@@ -0,0 +1,56 @@
+; RUN: llc < %s | grep {testl.*\(%r.i\), %} | count 3
+; rdar://5671654
+; The loads should fold into the testl instructions, no matter how
+; the inputs are commuted.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin7"
+
+define i32 @test(i32* %P, i32* %G) nounwind {
+entry:
+ %0 = load i32* %P, align 4 ; <i32> [#uses=3]
+ %1 = load i32* %G, align 4 ; <i32> [#uses=1]
+ %2 = and i32 %1, %0 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %4 = tail call i32 @bar() nounwind ; <i32> [#uses=0]
+ ret i32 %0
+
+bb1: ; preds = %entry
+ ret i32 %0
+}
+
+define i32 @test2(i32* %P, i32* %G) nounwind {
+entry:
+ %0 = load i32* %P, align 4 ; <i32> [#uses=3]
+ %1 = load i32* %G, align 4 ; <i32> [#uses=1]
+ %2 = and i32 %0, %1 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %4 = tail call i32 @bar() nounwind ; <i32> [#uses=0]
+ ret i32 %0
+
+bb1: ; preds = %entry
+ ret i32 %0
+}
+define i32 @test3(i32* %P, i32* %G) nounwind {
+entry:
+ %0 = load i32* %P, align 4 ; <i32> [#uses=3]
+ %1 = load i32* %G, align 4 ; <i32> [#uses=1]
+ %2 = and i32 %0, %1 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %4 = tail call i32 @bar() nounwind ; <i32> [#uses=0]
+ ret i32 %1
+
+bb1: ; preds = %entry
+ ret i32 %1
+}
+
+declare i32 @bar()
diff --git a/test/CodeGen/X86/tls-pic.ll b/test/CodeGen/X86/tls-pic.ll
new file mode 100644
index 0000000..4cad837
--- /dev/null
+++ b/test/CodeGen/X86/tls-pic.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
+
+@i = thread_local global i32 15
+
+define i32 @f1() {
+entry:
+ %tmp1 = load i32* @i
+ ret i32 %tmp1
+}
+
+; X32: f1:
+; X32: leal i@TLSGD(,%ebx), %eax
+; X32: call ___tls_get_addr@PLT
+
+; X64: f1:
+; X64: leaq i@TLSGD(%rip), %rdi
+; X64: call __tls_get_addr@PLT
+
+
+@i2 = external thread_local global i32
+
+define i32* @f2() {
+entry:
+ ret i32* @i
+}
+
+; X32: f2:
+; X32: leal i@TLSGD(,%ebx), %eax
+; X32: call ___tls_get_addr@PLT
+
+; X64: f2:
+; X64: leaq i@TLSGD(%rip), %rdi
+; X64: call __tls_get_addr@PLT
+
+
+
+define i32 @f3() {
+entry:
+ %tmp1 = load i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+; X32: f3:
+; X32: leal i@TLSGD(,%ebx), %eax
+; X32: call ___tls_get_addr@PLT
+
+; X64: f3:
+; X64: leaq i@TLSGD(%rip), %rdi
+; X64: call __tls_get_addr@PLT
+
+
+define i32* @f4() nounwind {
+entry:
+ ret i32* @i
+}
+
+; X32: f4:
+; X32: leal i@TLSGD(,%ebx), %eax
+; X32: call ___tls_get_addr@PLT
+
+; X64: f4:
+; X64: leaq i@TLSGD(%rip), %rdi
+; X64: call __tls_get_addr@PLT
+
+
+
diff --git a/test/CodeGen/X86/tls1.ll b/test/CodeGen/X86/tls1.ll
new file mode 100644
index 0000000..0cae5c4
--- /dev/null
+++ b/test/CodeGen/X86/tls1.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:i@NTPOFF, %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movl %fs:i@TPOFF, %eax} %t2
+
+@i = thread_local global i32 15
+
+define i32 @f() nounwind {
+entry:
+ %tmp1 = load i32* @i
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/tls10.ll b/test/CodeGen/X86/tls10.ll
new file mode 100644
index 0000000..fb61596
--- /dev/null
+++ b/test/CodeGen/X86/tls10.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:0, %eax} %t
+; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movq %fs:0, %rax} %t2
+; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2
+
+@i = external hidden thread_local global i32
+
+define i32* @f() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/X86/tls11.ll b/test/CodeGen/X86/tls11.ll
new file mode 100644
index 0000000..a2c1a1f
--- /dev/null
+++ b/test/CodeGen/X86/tls11.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movw %gs:i@NTPOFF, %ax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movw %fs:i@TPOFF, %ax} %t2
+
+@i = thread_local global i16 15
+
+define i16 @f() {
+entry:
+ %tmp1 = load i16* @i
+ ret i16 %tmp1
+}
diff --git a/test/CodeGen/X86/tls12.ll b/test/CodeGen/X86/tls12.ll
new file mode 100644
index 0000000..c29f6ad
--- /dev/null
+++ b/test/CodeGen/X86/tls12.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movb %gs:i@NTPOFF, %al} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movb %fs:i@TPOFF, %al} %t2
+
+@i = thread_local global i8 15
+
+define i8 @f() {
+entry:
+ %tmp1 = load i8* @i
+ ret i8 %tmp1
+}
diff --git a/test/CodeGen/X86/tls13.ll b/test/CodeGen/X86/tls13.ll
new file mode 100644
index 0000000..08778ec
--- /dev/null
+++ b/test/CodeGen/X86/tls13.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movswl %gs:i@NTPOFF, %eax} %t
+; RUN: grep {movzwl %gs:j@NTPOFF, %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movswl %fs:i@TPOFF, %edi} %t2
+; RUN: grep {movzwl %fs:j@TPOFF, %edi} %t2
+
+@i = thread_local global i16 0
+@j = thread_local global i16 0
+
+define void @f() nounwind optsize {
+entry:
+ %0 = load i16* @i, align 2
+ %1 = sext i16 %0 to i32
+ tail call void @g(i32 %1) nounwind
+ %2 = load i16* @j, align 2
+ %3 = zext i16 %2 to i32
+ tail call void @h(i32 %3) nounwind
+ ret void
+}
+
+declare void @g(i32)
+
+declare void @h(i32)
diff --git a/test/CodeGen/X86/tls14.ll b/test/CodeGen/X86/tls14.ll
new file mode 100644
index 0000000..88426dd
--- /dev/null
+++ b/test/CodeGen/X86/tls14.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movsbl %gs:i@NTPOFF, %eax} %t
+; RUN: grep {movzbl %gs:j@NTPOFF, %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movsbl %fs:i@TPOFF, %edi} %t2
+; RUN: grep {movzbl %fs:j@TPOFF, %edi} %t2
+
+@i = thread_local global i8 0
+@j = thread_local global i8 0
+
+define void @f() nounwind optsize {
+entry:
+ %0 = load i8* @i, align 2
+ %1 = sext i8 %0 to i32
+ tail call void @g(i32 %1) nounwind
+ %2 = load i8* @j, align 2
+ %3 = zext i8 %2 to i32
+ tail call void @h(i32 %3) nounwind
+ ret void
+}
+
+declare void @g(i32)
+
+declare void @h(i32)
diff --git a/test/CodeGen/X86/tls15.ll b/test/CodeGen/X86/tls15.ll
new file mode 100644
index 0000000..7abf070
--- /dev/null
+++ b/test/CodeGen/X86/tls15.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:0, %eax} %t | count 1
+; RUN: grep {leal i@NTPOFF(%eax), %ecx} %t
+; RUN: grep {leal j@NTPOFF(%eax), %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movq %fs:0, %rax} %t2 | count 1
+; RUN: grep {leaq i@TPOFF(%rax), %rcx} %t2
+; RUN: grep {leaq j@TPOFF(%rax), %rax} %t2
+
+@i = thread_local global i32 0
+@j = thread_local global i32 0
+
+define void @f(i32** %a, i32** %b) {
+entry:
+ store i32* @i, i32** %a, align 8
+ store i32* @j, i32** %b, align 8
+ ret void
+}
diff --git a/test/CodeGen/X86/tls2.ll b/test/CodeGen/X86/tls2.ll
new file mode 100644
index 0000000..5a94296
--- /dev/null
+++ b/test/CodeGen/X86/tls2.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:0, %eax} %t
+; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movq %fs:0, %rax} %t2
+; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2
+
+@i = thread_local global i32 15
+
+define i32* @f() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/X86/tls3.ll b/test/CodeGen/X86/tls3.ll
new file mode 100644
index 0000000..7327cc4
--- /dev/null
+++ b/test/CodeGen/X86/tls3.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl i@INDNTPOFF, %eax} %t
+; RUN: grep {movl %gs:(%eax), %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movq i@GOTTPOFF(%rip), %rax} %t2
+; RUN: grep {movl %fs:(%rax), %eax} %t2
+
+@i = external thread_local global i32 ; <i32*> [#uses=2]
+
+define i32 @f() nounwind {
+entry:
+ %tmp1 = load i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/tls4.ll b/test/CodeGen/X86/tls4.ll
new file mode 100644
index 0000000..d2e40e3
--- /dev/null
+++ b/test/CodeGen/X86/tls4.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:0, %eax} %t
+; RUN: grep {addl i@INDNTPOFF, %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movq %fs:0, %rax} %t2
+; RUN: grep {addq i@GOTTPOFF(%rip), %rax} %t2
+
+@i = external thread_local global i32 ; <i32*> [#uses=2]
+
+define i32* @f() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/X86/tls5.ll b/test/CodeGen/X86/tls5.ll
new file mode 100644
index 0000000..4d2cc02
--- /dev/null
+++ b/test/CodeGen/X86/tls5.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:i@NTPOFF, %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movl %fs:i@TPOFF, %eax} %t2
+
+@i = internal thread_local global i32 15
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32* @i
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/tls6.ll b/test/CodeGen/X86/tls6.ll
new file mode 100644
index 0000000..505106e
--- /dev/null
+++ b/test/CodeGen/X86/tls6.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:0, %eax} %t
+; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movq %fs:0, %rax} %t2
+; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2
+
+@i = internal thread_local global i32 15
+
+define i32* @f() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/X86/tls7.ll b/test/CodeGen/X86/tls7.ll
new file mode 100644
index 0000000..e9116e7
--- /dev/null
+++ b/test/CodeGen/X86/tls7.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:i@NTPOFF, %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movl %fs:i@TPOFF, %eax} %t2
+
+@i = hidden thread_local global i32 15
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32* @i
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/tls8.ll b/test/CodeGen/X86/tls8.ll
new file mode 100644
index 0000000..375af94
--- /dev/null
+++ b/test/CodeGen/X86/tls8.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:0, %eax} %t
+; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movq %fs:0, %rax} %t2
+; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2
+
+@i = hidden thread_local global i32 15
+
+define i32* @f() {
+entry:
+ ret i32* @i
+}
diff --git a/test/CodeGen/X86/tls9.ll b/test/CodeGen/X86/tls9.ll
new file mode 100644
index 0000000..214146f
--- /dev/null
+++ b/test/CodeGen/X86/tls9.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movl %gs:i@NTPOFF, %eax} %t
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: grep {movl %fs:i@TPOFF, %eax} %t2
+
+@i = external hidden thread_local global i32
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32* @i
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/trap.ll b/test/CodeGen/X86/trap.ll
new file mode 100644
index 0000000..03ae6bfc
--- /dev/null
+++ b/test/CodeGen/X86/trap.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep ud2
+define i32 @test() noreturn nounwind {
+entry:
+ tail call void @llvm.trap( )
+ unreachable
+}
+
+declare void @llvm.trap() nounwind
+
diff --git a/test/CodeGen/X86/trunc-to-bool.ll b/test/CodeGen/X86/trunc-to-bool.ll
new file mode 100644
index 0000000..bfab1ae
--- /dev/null
+++ b/test/CodeGen/X86/trunc-to-bool.ll
@@ -0,0 +1,54 @@
+; An integer truncation to i1 should be done with an and instruction to make
+; sure only the LSBit survives. Test that this is the case both for a returned
+; value and as the operand of a branch.
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+define i1 @test1(i32 %X) zeroext {
+ %Y = trunc i32 %X to i1
+ ret i1 %Y
+}
+; CHECK: andl $1, %eax
+
+define i1 @test2(i32 %val, i32 %mask) {
+entry:
+ %shifted = ashr i32 %val, %mask
+ %anded = and i32 %shifted, 1
+ %trunced = trunc i32 %anded to i1
+ br i1 %trunced, label %ret_true, label %ret_false
+ret_true:
+ ret i1 true
+ret_false:
+ ret i1 false
+}
+; CHECK: testb $1, %al
+
+define i32 @test3(i8* %ptr) {
+ %val = load i8* %ptr
+ %tmp = trunc i8 %val to i1
+ br i1 %tmp, label %cond_true, label %cond_false
+cond_true:
+ ret i32 21
+cond_false:
+ ret i32 42
+}
+; CHECK: testb $1, %al
+
+define i32 @test4(i8* %ptr) {
+ %tmp = ptrtoint i8* %ptr to i1
+ br i1 %tmp, label %cond_true, label %cond_false
+cond_true:
+ ret i32 21
+cond_false:
+ ret i32 42
+}
+; CHECK: testb $1, %al
+
+define i32 @test6(double %d) {
+ %tmp = fptosi double %d to i1
+ br i1 %tmp, label %cond_true, label %cond_false
+cond_true:
+ ret i32 21
+cond_false:
+ ret i32 42
+}
+; CHECK: testb $1
diff --git a/test/CodeGen/X86/twoaddr-coalesce-2.ll b/test/CodeGen/X86/twoaddr-coalesce-2.ll
new file mode 100644
index 0000000..6f16a25
--- /dev/null
+++ b/test/CodeGen/X86/twoaddr-coalesce-2.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& \
+; RUN: grep {twoaddrinstr} | grep {Number of instructions aggressively commuted}
+; rdar://6480363
+
+target triple = "i386-apple-darwin9.6"
+
+define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
+entry:
+ %tmp.i3 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp2.i = or <2 x i64> %tmp.i3, <i64 4607632778762754458, i64 4607632778762754458> ; <<2 x i64>> [#uses=1]
+ %tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double> ; <<2 x double>> [#uses=1]
+ %tmp.i2 = fadd <2 x double> %tmp3.i, %A ; <<2 x double>> [#uses=1]
+ %tmp.i = fadd <2 x double> %tmp.i2, %C ; <<2 x double>> [#uses=1]
+ ret <2 x double> %tmp.i
+}
diff --git a/test/CodeGen/X86/twoaddr-coalesce.ll b/test/CodeGen/X86/twoaddr-coalesce.ll
new file mode 100644
index 0000000..d0e13f6
--- /dev/null
+++ b/test/CodeGen/X86/twoaddr-coalesce.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 | grep mov | count 5
+; rdar://6523745
+
+@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ] ; <i32> [#uses=2]
+ %0 = trunc i32 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
+ %1 = sdiv i8 %0, 2 ; <i8> [#uses=1]
+ %2 = sext i8 %1 to i32 ; <i32> [#uses=1]
+ %3 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), i32 %2) nounwind ; <i32> [#uses=0]
+ %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 258 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/X86/twoaddr-lea.ll b/test/CodeGen/X86/twoaddr-lea.ll
new file mode 100644
index 0000000..a245ed7
--- /dev/null
+++ b/test/CodeGen/X86/twoaddr-lea.ll
@@ -0,0 +1,24 @@
+;; X's live range extends beyond the shift, so the register allocator
+;; cannot coalesce it with Y. Because of this, a copy needs to be
+;; emitted before the shift to save the register value before it is
+;; clobbered. However, this copy is not needed if the register
+;; allocator turns the shift into an LEA. This also occurs for ADD.
+
+; Check that the shift gets turned into an LEA.
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: not grep {mov E.X, E.X}
+
+@G = external global i32 ; <i32*> [#uses=3]
+
+define i32 @test1(i32 %X, i32 %Y) {
+ %Z = add i32 %X, %Y ; <i32> [#uses=1]
+ volatile store i32 %Y, i32* @G
+ volatile store i32 %Z, i32* @G
+ ret i32 %X
+}
+
+define i32 @test2(i32 %X) {
+ %Z = add i32 %X, 1 ; <i32> [#uses=1]
+ volatile store i32 %Z, i32* @G
+ ret i32 %X
+}
diff --git a/test/CodeGen/X86/twoaddr-pass-sink.ll b/test/CodeGen/X86/twoaddr-pass-sink.ll
new file mode 100644
index 0000000..077fee0
--- /dev/null
+++ b/test/CodeGen/X86/twoaddr-pass-sink.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& grep {Number of 3-address instructions sunk}
+
+define void @t2(<2 x i64>* %vDct, <2 x i64>* %vYp, i8* %skiplist, <2 x i64> %a1) nounwind {
+entry:
+ %tmp25 = bitcast <2 x i64> %a1 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ br label %bb
+bb: ; preds = %bb, %entry
+ %skiplist_addr.0.rec = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %vYp_addr.0.rec = shl i32 %skiplist_addr.0.rec, 3 ; <i32> [#uses=3]
+ %vDct_addr.0 = getelementptr <2 x i64>* %vDct, i32 %vYp_addr.0.rec ; <<2 x i64>*> [#uses=1]
+ %vYp_addr.0 = getelementptr <2 x i64>* %vYp, i32 %vYp_addr.0.rec ; <<2 x i64>*> [#uses=1]
+ %skiplist_addr.0 = getelementptr i8* %skiplist, i32 %skiplist_addr.0.rec ; <i8*> [#uses=1]
+ %vDct_addr.0.sum43 = or i32 %vYp_addr.0.rec, 1 ; <i32> [#uses=1]
+ %tmp7 = getelementptr <2 x i64>* %vDct, i32 %vDct_addr.0.sum43 ; <<2 x i64>*> [#uses=1]
+ %tmp8 = load <2 x i64>* %tmp7, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp11 = load <2 x i64>* %vDct_addr.0, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp13 = bitcast <2 x i64> %tmp8 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp15 = bitcast <2 x i64> %tmp11 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp16 = shufflevector <8 x i16> %tmp15, <8 x i16> %tmp13, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1]
+ %tmp26 = mul <8 x i16> %tmp25, %tmp16 ; <<8 x i16>> [#uses=1]
+ %tmp27 = bitcast <8 x i16> %tmp26 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ store <2 x i64> %tmp27, <2 x i64>* %vYp_addr.0, align 16
+ %tmp37 = load i8* %skiplist_addr.0, align 1 ; <i8> [#uses=1]
+ %tmp38 = icmp eq i8 %tmp37, 0 ; <i1> [#uses=1]
+ %indvar.next = add i32 %skiplist_addr.0.rec, 1 ; <i32> [#uses=1]
+ br i1 %tmp38, label %return, label %bb
+return: ; preds = %bb
+ ret void
+}
diff --git a/test/CodeGen/X86/twoaddr-remat.ll b/test/CodeGen/X86/twoaddr-remat.ll
new file mode 100644
index 0000000..4940c78
--- /dev/null
+++ b/test/CodeGen/X86/twoaddr-remat.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s -march=x86 | grep 59796 | count 3
+
+ %Args = type %Value*
+ %Exec = type opaque*
+ %Identifier = type opaque*
+ %JSFunction = type %Value (%Exec, %Scope, %Value, %Args)
+ %PropertyNameArray = type opaque*
+ %Scope = type opaque*
+ %Value = type opaque*
+
+declare i1 @X1(%Exec) readonly
+
+declare %Value @X2(%Exec)
+
+declare i32 @X3(%Exec, %Value)
+
+declare %Value @X4(i32) readnone
+
+define internal %Value @fast3bitlookup(%Exec %exec, %Scope %scope, %Value %this, %Args %args) nounwind {
+prologue:
+ %eh_check = tail call i1 @X1( %Exec %exec ) readonly ; <i1> [#uses=1]
+ br i1 %eh_check, label %exception, label %no_exception
+
+exception: ; preds = %no_exception, %prologue
+ %rethrow_result = tail call %Value @X2( %Exec %exec ) ; <%Value> [#uses=1]
+ ret %Value %rethrow_result
+
+no_exception: ; preds = %prologue
+ %args_intptr = bitcast %Args %args to i32* ; <i32*> [#uses=1]
+ %argc_val = load i32* %args_intptr ; <i32> [#uses=1]
+ %cmpParamArgc = icmp sgt i32 %argc_val, 0 ; <i1> [#uses=1]
+ %arg_ptr = getelementptr %Args %args, i32 1 ; <%Args> [#uses=1]
+ %arg_val = load %Args %arg_ptr ; <%Value> [#uses=1]
+ %ext_arg_val = select i1 %cmpParamArgc, %Value %arg_val, %Value inttoptr (i32 5 to %Value) ; <%Value> [#uses=1]
+ %toInt325 = tail call i32 @X3( %Exec %exec, %Value %ext_arg_val ) ; <i32> [#uses=3]
+ %eh_check6 = tail call i1 @X1( %Exec %exec ) readonly ; <i1> [#uses=1]
+ br i1 %eh_check6, label %exception, label %no_exception7
+
+no_exception7: ; preds = %no_exception
+ %shl_tmp_result = shl i32 %toInt325, 1 ; <i32> [#uses=1]
+ %rhs_masked13 = and i32 %shl_tmp_result, 14 ; <i32> [#uses=1]
+ %ashr_tmp_result = lshr i32 59796, %rhs_masked13 ; <i32> [#uses=1]
+ %and_tmp_result15 = and i32 %ashr_tmp_result, 3 ; <i32> [#uses=1]
+ %ashr_tmp_result3283 = lshr i32 %toInt325, 2 ; <i32> [#uses=1]
+ %rhs_masked38 = and i32 %ashr_tmp_result3283, 14 ; <i32> [#uses=1]
+ %ashr_tmp_result39 = lshr i32 59796, %rhs_masked38 ; <i32> [#uses=1]
+ %and_tmp_result41 = and i32 %ashr_tmp_result39, 3 ; <i32> [#uses=1]
+ %addconv = add i32 %and_tmp_result15, %and_tmp_result41 ; <i32> [#uses=1]
+ %ashr_tmp_result6181 = lshr i32 %toInt325, 5 ; <i32> [#uses=1]
+ %rhs_masked67 = and i32 %ashr_tmp_result6181, 6 ; <i32> [#uses=1]
+ %ashr_tmp_result68 = lshr i32 59796, %rhs_masked67 ; <i32> [#uses=1]
+ %and_tmp_result70 = and i32 %ashr_tmp_result68, 3 ; <i32> [#uses=1]
+ %addconv82 = add i32 %addconv, %and_tmp_result70 ; <i32> [#uses=3]
+ %rangetmp = add i32 %addconv82, 536870912 ; <i32> [#uses=1]
+ %rangecmp = icmp ult i32 %rangetmp, 1073741824 ; <i1> [#uses=1]
+ br i1 %rangecmp, label %NumberLiteralIntFast, label %NumberLiteralIntSlow
+
+NumberLiteralIntFast: ; preds = %no_exception7
+ %imm_shift = shl i32 %addconv82, 2 ; <i32> [#uses=1]
+ %imm_or = or i32 %imm_shift, 3 ; <i32> [#uses=1]
+ %imm_val = inttoptr i32 %imm_or to %Value ; <%Value> [#uses=1]
+ ret %Value %imm_val
+
+NumberLiteralIntSlow: ; preds = %no_exception7
+ %toVal = call %Value @X4( i32 %addconv82 ) ; <%Value> [#uses=1]
+ ret %Value %toVal
+}
diff --git a/test/CodeGen/X86/uint_to_fp-2.ll b/test/CodeGen/X86/uint_to_fp-2.ll
new file mode 100644
index 0000000..da5105d
--- /dev/null
+++ b/test/CodeGen/X86/uint_to_fp-2.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 1
+; rdar://6504833
+
+define float @f(i32 %x) nounwind readnone {
+entry:
+ %0 = uitofp i32 %x to float
+ ret float %0
+}
diff --git a/test/CodeGen/X86/uint_to_fp.ll b/test/CodeGen/X86/uint_to_fp.ll
new file mode 100644
index 0000000..41ee194
--- /dev/null
+++ b/test/CodeGen/X86/uint_to_fp.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep {sub.*esp}
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep cvtsi2ss
+; rdar://6034396
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @test(i32 %x, float* %y) nounwind {
+entry:
+ lshr i32 %x, 23 ; <i32>:0 [#uses=1]
+ uitofp i32 %0 to float ; <float>:1 [#uses=1]
+ store float %1, float* %y
+ ret void
+}
diff --git a/test/CodeGen/X86/umul-with-carry.ll b/test/CodeGen/X86/umul-with-carry.ll
new file mode 100644
index 0000000..74160516
--- /dev/null
+++ b/test/CodeGen/X86/umul-with-carry.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86 | grep {jc} | count 1
+; XFAIL: *
+
+; FIXME: umul-with-overflow not supported yet.
+
+@ok = internal constant [4 x i8] c"%d\0A\00"
+@no = internal constant [4 x i8] c"no\0A\00"
+
+define i1 @func(i32 %v1, i32 %v2) nounwind {
+entry:
+ %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)
+ %sum = extractvalue {i32, i1} %t, 0
+ %obit = extractvalue {i32, i1} %t, 1
+ br i1 %obit, label %carry, label %normal
+
+normal:
+ %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ ret i1 true
+
+carry:
+ %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+ ret i1 false
+}
+
+declare i32 @printf(i8*, ...) nounwind
+declare {i32, i1} @llvm.umul.with.overflow.i32(i32, i32)
diff --git a/test/CodeGen/X86/umul-with-overflow.ll b/test/CodeGen/X86/umul-with-overflow.ll
new file mode 100644
index 0000000..d522bd8
--- /dev/null
+++ b/test/CodeGen/X86/umul-with-overflow.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 | grep "\\\\\\\<mul"
+
+declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
+define i1 @a(i32 %x) zeroext nounwind {
+ %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3)
+ %obil = extractvalue {i32, i1} %res, 1
+ ret i1 %obil
+}
diff --git a/test/CodeGen/X86/unaligned-load.ll b/test/CodeGen/X86/unaligned-load.ll
new file mode 100644
index 0000000..b61803d
--- /dev/null
+++ b/test/CodeGen/X86/unaligned-load.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=dynamic-no-pic --asm-verbose=0 | FileCheck %s
+
[email protected] = internal constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 8
[email protected] = internal constant [31 x i8] c"DHRYSTONE PROGRAM, 2'ND STRING\00", align 8
+
+define void @func() nounwind ssp {
+entry:
+ %String2Loc = alloca [31 x i8], align 1
+ br label %bb
+
+bb:
+ %String2Loc9 = getelementptr inbounds [31 x i8]* %String2Loc, i64 0, i64 0
+ call void @llvm.memcpy.i64(i8* %String2Loc9, i8* getelementptr inbounds ([31 x i8]* @.str3, i64 0, i64 0), i64 31, i32 1)
+; CHECK: movups _.str3
+ br label %bb
+
+return:
+ ret void
+}
+
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
+
+; CHECK: .align 3
+; CHECK-NEXT: _.str1:
+; CHECK-NEXT: .asciz "DHRYSTONE PROGRAM, SOME STRING"
+; CHECK: .align 3
+; CHECK-NEXT: _.str3:
diff --git a/test/CodeGen/X86/urem-i8-constant.ll b/test/CodeGen/X86/urem-i8-constant.ll
new file mode 100644
index 0000000..e3cb69c
--- /dev/null
+++ b/test/CodeGen/X86/urem-i8-constant.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86 | grep 111
+
+define i8 @foo(i8 %tmp325) {
+ %t546 = urem i8 %tmp325, 37
+ ret i8 %t546
+}
diff --git a/test/CodeGen/X86/use-add-flags.ll b/test/CodeGen/X86/use-add-flags.ll
new file mode 100644
index 0000000..2dd2a4a
--- /dev/null
+++ b/test/CodeGen/X86/use-add-flags.ll
@@ -0,0 +1,56 @@
+; RUN: llc < %s -march=x86-64 -o - | FileCheck %s
+
+; Reuse the flags value from the add instructions instead of emitting separate
+; testl instructions.
+
+; Use the flags on the add.
+
+; CHECK: add_zf:
+; CHECK: addl (%rdi), %esi
+; CHECK-NEXT: movl %edx, %eax
+; CHECK-NEXT: cmovnsl %ecx, %eax
+; CHECK-NEXT: ret
+
+define i32 @add_zf(i32* %x, i32 %y, i32 %a, i32 %b) nounwind {
+ %tmp2 = load i32* %x, align 4 ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp2, %y ; <i32> [#uses=1]
+ %tmp5 = icmp slt i32 %tmp4, 0 ; <i1> [#uses=1]
+ %tmp.0 = select i1 %tmp5, i32 %a, i32 %b ; <i32> [#uses=1]
+ ret i32 %tmp.0
+}
+
+declare void @foo(i32)
+
+; Don't use the flags result of the and here, since the and has no
+; other use. A simple test is better.
+
+; CHECK: bar:
+; CHECK: testb $16, %dil
+
+define void @bar(i32 %x) nounwind {
+ %y = and i32 %x, 16
+ %t = icmp eq i32 %y, 0
+ br i1 %t, label %true, label %false
+true:
+ call void @foo(i32 %x)
+ ret void
+false:
+ ret void
+}
+
+; Do use the flags result of the and here, since the and has another use.
+
+; CHECK: qux:
+; CHECK: andl $16, %edi
+; CHECK-NEXT: jne
+
+define void @qux(i32 %x) nounwind {
+ %y = and i32 %x, 16
+ %t = icmp eq i32 %y, 0
+ br i1 %t, label %true, label %false
+true:
+ call void @foo(i32 %y)
+ ret void
+false:
+ ret void
+}
diff --git a/test/CodeGen/X86/v4f32-immediate.ll b/test/CodeGen/X86/v4f32-immediate.ll
new file mode 100644
index 0000000..b5ebaa7
--- /dev/null
+++ b/test/CodeGen/X86/v4f32-immediate.ll
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=x86 -mattr=+sse | grep movaps
+
+define <4 x float> @foo() {
+ ret <4 x float> <float 0x4009C9D0A0000000, float 0x4002666660000000, float 0x3FF3333340000000, float 0x3FB99999A0000000>
+}
diff --git a/test/CodeGen/X86/variable-sized-darwin-bzero.ll b/test/CodeGen/X86/variable-sized-darwin-bzero.ll
new file mode 100644
index 0000000..4817db2
--- /dev/null
+++ b/test/CodeGen/X86/variable-sized-darwin-bzero.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin10 | grep __bzero
+
+declare void @llvm.memset.i64(i8*, i8, i64, i32)
+
+define void @foo(i8* %p, i64 %n) {
+ call void @llvm.memset.i64(i8* %p, i8 0, i64 %n, i32 4)
+ ret void
+}
diff --git a/test/CodeGen/X86/variadic-node-pic.ll b/test/CodeGen/X86/variadic-node-pic.ll
new file mode 100644
index 0000000..1182a30
--- /dev/null
+++ b/test/CodeGen/X86/variadic-node-pic.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -relocation-model=pic -code-model=large
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+
+declare void @xscanf(i64) nounwind
+
+define void @foo() nounwind {
+ call void (i64)* @xscanf( i64 0 ) nounwind
+ unreachable
+}
diff --git a/test/CodeGen/X86/vec-trunc-store.ll b/test/CodeGen/X86/vec-trunc-store.ll
new file mode 100644
index 0000000..ea1a151
--- /dev/null
+++ b/test/CodeGen/X86/vec-trunc-store.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 -disable-mmx | grep punpcklwd | count 2
+
+define void @foo() nounwind {
+ %cti69 = trunc <8 x i32> undef to <8 x i16> ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %cti69, <8 x i16>* undef
+ ret void
+}
+
+define void @bar() nounwind {
+ %cti44 = trunc <4 x i32> undef to <4 x i16> ; <<4 x i16>> [#uses=1]
+ store <4 x i16> %cti44, <4 x i16>* undef
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_add.ll b/test/CodeGen/X86/vec_add.ll
new file mode 100644
index 0000000..7c77d11
--- /dev/null
+++ b/test/CodeGen/X86/vec_add.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define <2 x i64> @test(<2 x i64> %a, <2 x i64> %b) {
+entry:
+ %tmp9 = add <2 x i64> %b, %a ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp9
+}
diff --git a/test/CodeGen/X86/vec_align.ll b/test/CodeGen/X86/vec_align.ll
new file mode 100644
index 0000000..e273115
--- /dev/null
+++ b/test/CodeGen/X86/vec_align.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -mcpu=yonah -relocation-model=static | grep movaps | count 2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+%f4 = type <4 x float>
+
+@G = external global { float,float,float,float}, align 16
+
+define %f4 @test1(float %W, float %X, float %Y, float %Z) nounwind {
+ %tmp = insertelement %f4 undef, float %W, i32 0
+ %tmp2 = insertelement %f4 %tmp, float %X, i32 1
+ %tmp4 = insertelement %f4 %tmp2, float %Y, i32 2
+ %tmp6 = insertelement %f4 %tmp4, float %Z, i32 3
+ ret %f4 %tmp6
+}
+
+define %f4 @test2() nounwind {
+ %Wp = getelementptr { float,float,float,float}* @G, i32 0, i32 0
+ %Xp = getelementptr { float,float,float,float}* @G, i32 0, i32 1
+ %Yp = getelementptr { float,float,float,float}* @G, i32 0, i32 2
+ %Zp = getelementptr { float,float,float,float}* @G, i32 0, i32 3
+
+ %W = load float* %Wp
+ %X = load float* %Xp
+ %Y = load float* %Yp
+ %Z = load float* %Zp
+
+ %tmp = insertelement %f4 undef, float %W, i32 0
+ %tmp2 = insertelement %f4 %tmp, float %X, i32 1
+ %tmp4 = insertelement %f4 %tmp2, float %Y, i32 2
+ %tmp6 = insertelement %f4 %tmp4, float %Z, i32 3
+ ret %f4 %tmp6
+}
+
diff --git a/test/CodeGen/X86/vec_call.ll b/test/CodeGen/X86/vec_call.ll
new file mode 100644
index 0000000..b3efc7b
--- /dev/null
+++ b/test/CodeGen/X86/vec_call.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
+; RUN: grep {subl.*60}
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
+; RUN: grep {movaps.*32}
+
+
+define void @test() {
+ tail call void @xx( i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, <2 x i64> bitcast (<4 x i32> < i32 4, i32 3, i32 2, i32 1 > to <2 x i64>), <2 x i64> bitcast (<4 x i32> < i32 8, i32 7, i32 6, i32 5 > to <2 x i64>), <2 x i64> bitcast (<4 x i32> < i32 6, i32 4, i32 2, i32 0 > to <2 x i64>), <2 x i64> bitcast (<4 x i32> < i32 8, i32 4, i32 2, i32 1 > to <2 x i64>), <2 x i64> bitcast (<4 x i32> < i32 0, i32 1, i32 3, i32 9 > to <2 x i64>) )
+ ret void
+}
+
+declare void @xx(i32, i32, i32, i32, i32, i32, i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)
+
diff --git a/test/CodeGen/X86/vec_cast.ll b/test/CodeGen/X86/vec_cast.ll
new file mode 100644
index 0000000..1f899b3
--- /dev/null
+++ b/test/CodeGen/X86/vec_cast.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -march=x86-64 -disable-mmx
+
+define <8 x i32> @a(<8 x i16> %a) nounwind {
+ %c = sext <8 x i16> %a to <8 x i32>
+ ret <8 x i32> %c
+}
+
+define <3 x i32> @b(<3 x i16> %a) nounwind {
+ %c = sext <3 x i16> %a to <3 x i32>
+ ret <3 x i32> %c
+}
+
+define <1 x i32> @c(<1 x i16> %a) nounwind {
+ %c = sext <1 x i16> %a to <1 x i32>
+ ret <1 x i32> %c
+}
+
+define <8 x i32> @d(<8 x i16> %a) nounwind {
+ %c = zext <8 x i16> %a to <8 x i32>
+ ret <8 x i32> %c
+}
+
+define <3 x i32> @e(<3 x i16> %a) nounwind {
+ %c = zext <3 x i16> %a to <3 x i32>
+ ret <3 x i32> %c
+}
+
+define <1 x i32> @f(<1 x i16> %a) nounwind {
+ %c = zext <1 x i16> %a to <1 x i32>
+ ret <1 x i32> %c
+}
+
+; TODO: Legalize doesn't yet handle this.
+;define <8 x i16> @g(<8 x i32> %a) nounwind {
+; %c = trunc <8 x i32> %a to <8 x i16>
+; ret <8 x i16> %c
+;}
+
+define <3 x i16> @h(<3 x i32> %a) nounwind {
+ %c = trunc <3 x i32> %a to <3 x i16>
+ ret <3 x i16> %c
+}
+
+define <1 x i16> @i(<1 x i32> %a) nounwind {
+ %c = trunc <1 x i32> %a to <1 x i16>
+ ret <1 x i16> %c
+}
diff --git a/test/CodeGen/X86/vec_clear.ll b/test/CodeGen/X86/vec_clear.ll
new file mode 100644
index 0000000..166d436
--- /dev/null
+++ b/test/CodeGen/X86/vec_clear.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t
+; RUN: not grep and %t
+; RUN: not grep psrldq %t
+; RUN: grep xorps %t
+
+define <4 x float> @test(<4 x float>* %v1) nounwind {
+ %tmp = load <4 x float>* %v1 ; <<4 x float>> [#uses=1]
+ %tmp15 = bitcast <4 x float> %tmp to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp24 = and <2 x i64> %tmp15, bitcast (<4 x i32> < i32 0, i32 0, i32 -1, i32 -1 > to <2 x i64>) ; <<2 x i64>> [#uses=1]
+ %tmp31 = bitcast <2 x i64> %tmp24 to <4 x float> ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp31
+}
+
diff --git a/test/CodeGen/X86/vec_compare-2.ll b/test/CodeGen/X86/vec_compare-2.ll
new file mode 100644
index 0000000..091641b
--- /dev/null
+++ b/test/CodeGen/X86/vec_compare-2.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86 -mcpu=penryn -disable-mmx | FileCheck %s
+
+declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32>, <4 x i32>) nounwind readnone
+
+declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone
+
+define void @blackDespeckle_wrapper(i8** %args_list, i64* %gtid, i64 %xend) {
+entry:
+; CHECK-NOT: set
+; CHECK: pcmpgt
+; CHECK: blendvps
+ %shr.i = ashr <4 x i32> zeroinitializer, <i32 3, i32 3, i32 3, i32 3> ; <<4 x i32>> [#uses=1]
+ %cmp318.i = sext <4 x i1> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %sub322.i = sub <4 x i32> %shr.i, zeroinitializer ; <<4 x i32>> [#uses=1]
+ %cmp323.x = icmp slt <4 x i32> zeroinitializer, %sub322.i ; <<4 x i1>> [#uses=1]
+ %cmp323.i = sext <4 x i1> %cmp323.x to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %or.i = or <4 x i32> %cmp318.i, %cmp323.i ; <<4 x i32>> [#uses=1]
+ %tmp10.i83.i = bitcast <4 x i32> %or.i to <4 x float> ; <<4 x float>> [#uses=1]
+ %0 = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> undef, <4 x float> undef, <4 x float> %tmp10.i83.i) nounwind ; <<4 x float>> [#uses=1]
+ %conv.i.i15.i = bitcast <4 x float> %0 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %swz.i.i28.i = shufflevector <4 x i32> %conv.i.i15.i, <4 x i32> undef, <2 x i32> <i32 0, i32 1> ; <<2 x i32>> [#uses=1]
+ %tmp6.i29.i = bitcast <2 x i32> %swz.i.i28.i to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %swz.i30.i = shufflevector <4 x i16> %tmp6.i29.i, <4 x i16> undef, <2 x i32> <i32 0, i32 1> ; <<2 x i16>> [#uses=1]
+ store <2 x i16> %swz.i30.i, <2 x i16>* undef
+ unreachable
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_compare.ll b/test/CodeGen/X86/vec_compare.ll
new file mode 100644
index 0000000..c8c7257
--- /dev/null
+++ b/test/CodeGen/X86/vec_compare.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
+
+
+define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
+; CHECK: test1:
+; CHECK: pcmpgtd
+; CHECK: ret
+
+ %C = icmp sgt <4 x i32> %A, %B
+ %D = sext <4 x i1> %C to <4 x i32>
+ ret <4 x i32> %D
+}
+
+define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) nounwind {
+; CHECK: test2:
+; CHECK: pcmp
+; CHECK: pcmp
+; CHECK: xorps
+; CHECK: ret
+ %C = icmp sge <4 x i32> %A, %B
+ %D = sext <4 x i1> %C to <4 x i32>
+ ret <4 x i32> %D
+}
+
+define <4 x i32> @test3(<4 x i32> %A, <4 x i32> %B) nounwind {
+; CHECK: test3:
+; CHECK: pcmpgtd
+; CHECK: movaps
+; CHECK: ret
+ %C = icmp slt <4 x i32> %A, %B
+ %D = sext <4 x i1> %C to <4 x i32>
+ ret <4 x i32> %D
+}
+
+define <4 x i32> @test4(<4 x i32> %A, <4 x i32> %B) nounwind {
+; CHECK: test4:
+; CHECK: movaps
+; CHECK: pcmpgtd
+; CHECK: ret
+ %C = icmp ugt <4 x i32> %A, %B
+ %D = sext <4 x i1> %C to <4 x i32>
+ ret <4 x i32> %D
+}
diff --git a/test/CodeGen/X86/vec_ctbits.ll b/test/CodeGen/X86/vec_ctbits.ll
new file mode 100644
index 0000000..f0158d6
--- /dev/null
+++ b/test/CodeGen/X86/vec_ctbits.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86-64
+
+declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
+declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
+declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
+
+define <2 x i64> @footz(<2 x i64> %a) nounwind {
+ %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a)
+ ret <2 x i64> %c
+}
+define <2 x i64> @foolz(<2 x i64> %a) nounwind {
+ %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
+ ret <2 x i64> %c
+}
+define <2 x i64> @foopop(<2 x i64> %a) nounwind {
+ %c = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %a)
+ ret <2 x i64> %c
+}
diff --git a/test/CodeGen/X86/vec_ext_inreg.ll b/test/CodeGen/X86/vec_ext_inreg.ll
new file mode 100644
index 0000000..8d2a3c3
--- /dev/null
+++ b/test/CodeGen/X86/vec_ext_inreg.ll
@@ -0,0 +1,38 @@
+; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -march=x86-64 -disable-mmx
+
+define <8 x i32> @a(<8 x i32> %a) nounwind {
+ %b = trunc <8 x i32> %a to <8 x i16>
+ %c = sext <8 x i16> %b to <8 x i32>
+ ret <8 x i32> %c
+}
+
+define <3 x i32> @b(<3 x i32> %a) nounwind {
+ %b = trunc <3 x i32> %a to <3 x i16>
+ %c = sext <3 x i16> %b to <3 x i32>
+ ret <3 x i32> %c
+}
+
+define <1 x i32> @c(<1 x i32> %a) nounwind {
+ %b = trunc <1 x i32> %a to <1 x i16>
+ %c = sext <1 x i16> %b to <1 x i32>
+ ret <1 x i32> %c
+}
+
+define <8 x i32> @d(<8 x i32> %a) nounwind {
+ %b = trunc <8 x i32> %a to <8 x i16>
+ %c = zext <8 x i16> %b to <8 x i32>
+ ret <8 x i32> %c
+}
+
+define <3 x i32> @e(<3 x i32> %a) nounwind {
+ %b = trunc <3 x i32> %a to <3 x i16>
+ %c = zext <3 x i16> %b to <3 x i32>
+ ret <3 x i32> %c
+}
+
+define <1 x i32> @f(<1 x i32> %a) nounwind {
+ %b = trunc <1 x i32> %a to <1 x i16>
+ %c = zext <1 x i16> %b to <1 x i32>
+ ret <1 x i32> %c
+}
diff --git a/test/CodeGen/X86/vec_extract-sse4.ll b/test/CodeGen/X86/vec_extract-sse4.ll
new file mode 100644
index 0000000..dab5dd1
--- /dev/null
+++ b/test/CodeGen/X86/vec_extract-sse4.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t
+; RUN: grep extractps %t | count 1
+; RUN: grep pextrd %t | count 1
+; RUN: not grep pshufd %t
+; RUN: not grep movss %t
+
+define void @t1(float* %R, <4 x float>* %P1) nounwind {
+ %X = load <4 x float>* %P1
+ %tmp = extractelement <4 x float> %X, i32 3
+ store float %tmp, float* %R
+ ret void
+}
+
+define float @t2(<4 x float>* %P1) nounwind {
+ %X = load <4 x float>* %P1
+ %tmp = extractelement <4 x float> %X, i32 2
+ ret float %tmp
+}
+
+define void @t3(i32* %R, <4 x i32>* %P1) nounwind {
+ %X = load <4 x i32>* %P1
+ %tmp = extractelement <4 x i32> %X, i32 3
+ store i32 %tmp, i32* %R
+ ret void
+}
+
+define i32 @t4(<4 x i32>* %P1) nounwind {
+ %X = load <4 x i32>* %P1
+ %tmp = extractelement <4 x i32> %X, i32 3
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/X86/vec_extract.ll b/test/CodeGen/X86/vec_extract.ll
new file mode 100644
index 0000000..b013730
--- /dev/null
+++ b/test/CodeGen/X86/vec_extract.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 -o %t
+; RUN: grep movss %t | count 3
+; RUN: grep movhlps %t | count 1
+; RUN: grep pshufd %t | count 1
+; RUN: grep unpckhpd %t | count 1
+
+define void @test1(<4 x float>* %F, float* %f) nounwind {
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp7 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ %tmp2 = extractelement <4 x float> %tmp7, i32 0 ; <float> [#uses=1]
+ store float %tmp2, float* %f
+ ret void
+}
+
+define float @test2(<4 x float>* %F, float* %f) nounwind {
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp7 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ %tmp2 = extractelement <4 x float> %tmp7, i32 2 ; <float> [#uses=1]
+ ret float %tmp2
+}
+
+define void @test3(float* %R, <4 x float>* %P1) nounwind {
+ %X = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
+ %tmp = extractelement <4 x float> %X, i32 3 ; <float> [#uses=1]
+ store float %tmp, float* %R
+ ret void
+}
+
+define double @test4(double %A) nounwind {
+ %tmp1 = call <2 x double> @foo( ) ; <<2 x double>> [#uses=1]
+ %tmp2 = extractelement <2 x double> %tmp1, i32 1 ; <double> [#uses=1]
+ %tmp3 = fadd double %tmp2, %A ; <double> [#uses=1]
+ ret double %tmp3
+}
+
+declare <2 x double> @foo()
diff --git a/test/CodeGen/X86/vec_fneg.ll b/test/CodeGen/X86/vec_fneg.ll
new file mode 100644
index 0000000..d49c70e
--- /dev/null
+++ b/test/CodeGen/X86/vec_fneg.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define <4 x float> @t1(<4 x float> %Q) {
+ %tmp15 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q
+ ret <4 x float> %tmp15
+}
+
+define <4 x float> @t2(<4 x float> %Q) {
+ %tmp15 = fsub <4 x float> zeroinitializer, %Q
+ ret <4 x float> %tmp15
+}
diff --git a/test/CodeGen/X86/vec_i64.ll b/test/CodeGen/X86/vec_i64.ll
new file mode 100644
index 0000000..462e16e
--- /dev/null
+++ b/test/CodeGen/X86/vec_i64.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep movq %t | count 2
+
+; Used movq to load i64 into a v2i64 when the top i64 is 0.
+
+define <2 x i64> @foo1(i64* %y) nounwind {
+entry:
+ %tmp1 = load i64* %y, align 8 ; <i64> [#uses=1]
+ %s2v = insertelement <2 x i64> undef, i64 %tmp1, i32 0
+ %loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> <i32 2, i32 1>
+ ret <2 x i64> %loadl
+}
+
+
+define <4 x float> @foo2(i64* %p) nounwind {
+entry:
+ %load = load i64* %p
+ %s2v = insertelement <2 x i64> undef, i64 %load, i32 0
+ %loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> <i32 2, i32 1>
+ %0 = bitcast <2 x i64> %loadl to <4 x float>
+ ret <4 x float> %0
+}
diff --git a/test/CodeGen/X86/vec_ins_extract-1.ll b/test/CodeGen/X86/vec_ins_extract-1.ll
new file mode 100644
index 0000000..2951193
--- /dev/null
+++ b/test/CodeGen/X86/vec_ins_extract-1.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep {(%esp,%eax,4)} | count 4
+
+; Inserts and extracts with variable indices must be lowered
+; to memory accesses.
+
+define i32 @t0(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
+ %t13 = insertelement <4 x i32> %t8, i32 76, i32 %t7
+ %t9 = extractelement <4 x i32> %t13, i32 0
+ ret i32 %t9
+}
+define i32 @t1(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
+ %t13 = insertelement <4 x i32> %t8, i32 76, i32 0
+ %t9 = extractelement <4 x i32> %t13, i32 %t7
+ ret i32 %t9
+}
+define <4 x i32> @t2(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
+ %t9 = extractelement <4 x i32> %t8, i32 %t7
+ %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 0
+ ret <4 x i32> %t13
+}
+define <4 x i32> @t3(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
+ %t9 = extractelement <4 x i32> %t8, i32 0
+ %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7
+ ret <4 x i32> %t13
+}
diff --git a/test/CodeGen/X86/vec_ins_extract.ll b/test/CodeGen/X86/vec_ins_extract.ll
new file mode 100644
index 0000000..daf222e
--- /dev/null
+++ b/test/CodeGen/X86/vec_ins_extract.ll
@@ -0,0 +1,52 @@
+; RUN: opt < %s -scalarrepl -instcombine | \
+; RUN: llc -march=x86 -mcpu=yonah | not grep sub.*esp
+
+; This checks that various insert/extract idiom work without going to the
+; stack.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+
+define void @test(<4 x float>* %F, float %f) {
+entry:
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ %tmp10 = insertelement <4 x float> %tmp3, float %f, i32 0 ; <<4 x float>> [#uses=2]
+ %tmp6 = fadd <4 x float> %tmp10, %tmp10 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp6, <4 x float>* %F
+ ret void
+}
+
+define void @test2(<4 x float>* %F, float %f) {
+entry:
+ %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp3, <4 x float>* %G
+ %tmp.upgrd.1 = getelementptr <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
+ store float %f, float* %tmp.upgrd.1
+ %tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2]
+ %tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp6, <4 x float>* %F
+ ret void
+}
+
+define void @test3(<4 x float>* %F, float* %f) {
+entry:
+ %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp3, <4 x float>* %G
+ %tmp.upgrd.2 = getelementptr <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
+ %tmp.upgrd.3 = load float* %tmp.upgrd.2 ; <float> [#uses=1]
+ store float %tmp.upgrd.3, float* %f
+ ret void
+}
+
+define void @test4(<4 x float>* %F, float* %f) {
+entry:
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp5.lhs = extractelement <4 x float> %tmp, i32 0 ; <float> [#uses=1]
+ %tmp5.rhs = extractelement <4 x float> %tmp, i32 0 ; <float> [#uses=1]
+ %tmp5 = fadd float %tmp5.lhs, %tmp5.rhs ; <float> [#uses=1]
+ store float %tmp5, float* %f
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_insert-2.ll b/test/CodeGen/X86/vec_insert-2.ll
new file mode 100644
index 0000000..b08044b
--- /dev/null
+++ b/test/CodeGen/X86/vec_insert-2.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep {\$36,} | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep shufps | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep pinsrw | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movhpd | count 1
+; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep unpcklpd | count 1
+
+define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind {
+ %tmp1 = insertelement <4 x float> %tmp, float %s, i32 3
+ ret <4 x float> %tmp1
+}
+
+define <4 x i32> @t2(i32 %s, <4 x i32> %tmp) nounwind {
+ %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 3
+ ret <4 x i32> %tmp1
+}
+
+define <2 x double> @t3(double %s, <2 x double> %tmp) nounwind {
+ %tmp1 = insertelement <2 x double> %tmp, double %s, i32 1
+ ret <2 x double> %tmp1
+}
+
+define <8 x i16> @t4(i16 %s, <8 x i16> %tmp) nounwind {
+ %tmp1 = insertelement <8 x i16> %tmp, i16 %s, i32 5
+ ret <8 x i16> %tmp1
+}
diff --git a/test/CodeGen/X86/vec_insert-3.ll b/test/CodeGen/X86/vec_insert-3.ll
new file mode 100644
index 0000000..a18cd864
--- /dev/null
+++ b/test/CodeGen/X86/vec_insert-3.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep punpcklqdq | count 1
+
+define <2 x i64> @t1(i64 %s, <2 x i64> %tmp) nounwind {
+ %tmp1 = insertelement <2 x i64> %tmp, i64 %s, i32 1
+ ret <2 x i64> %tmp1
+}
diff --git a/test/CodeGen/X86/vec_insert-5.ll b/test/CodeGen/X86/vec_insert-5.ll
new file mode 100644
index 0000000..291fc04
--- /dev/null
+++ b/test/CodeGen/X86/vec_insert-5.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
+; RUN: grep psllq %t | grep 32
+; RUN: grep pslldq %t | grep 12
+; RUN: grep psrldq %t | grep 8
+; RUN: grep psrldq %t | grep 12
+
+define void @t1(i32 %a, <1 x i64>* %P) nounwind {
+ %tmp12 = shl i32 %a, 12
+ %tmp21 = insertelement <2 x i32> undef, i32 %tmp12, i32 1
+ %tmp22 = insertelement <2 x i32> %tmp21, i32 0, i32 0
+ %tmp23 = bitcast <2 x i32> %tmp22 to <1 x i64>
+ store <1 x i64> %tmp23, <1 x i64>* %P
+ ret void
+}
+
+define <4 x float> @t2(<4 x float>* %P) nounwind {
+ %tmp1 = load <4 x float>* %P
+ %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
+ ret <4 x float> %tmp2
+}
+
+define <4 x float> @t3(<4 x float>* %P) nounwind {
+ %tmp1 = load <4 x float>* %P
+ %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 >
+ ret <4 x float> %tmp2
+}
+
+define <4 x float> @t4(<4 x float>* %P) nounwind {
+ %tmp1 = load <4 x float>* %P
+ %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 >
+ ret <4 x float> %tmp2
+}
diff --git a/test/CodeGen/X86/vec_insert-6.ll b/test/CodeGen/X86/vec_insert-6.ll
new file mode 100644
index 0000000..54aa43f
--- /dev/null
+++ b/test/CodeGen/X86/vec_insert-6.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pslldq
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 6
+
+define <4 x float> @t3(<4 x float>* %P) nounwind {
+ %tmp1 = load <4 x float>* %P
+ %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
+ ret <4 x float> %tmp2
+}
diff --git a/test/CodeGen/X86/vec_insert-7.ll b/test/CodeGen/X86/vec_insert-7.ll
new file mode 100644
index 0000000..9ede10f
--- /dev/null
+++ b/test/CodeGen/X86/vec_insert-7.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+mmx -mtriple=i686-apple-darwin9 -o - | grep punpckldq
+
+define <2 x i32> @mmx_movzl(<2 x i32> %x) nounwind {
+entry:
+ %tmp3 = insertelement <2 x i32> %x, i32 32, i32 0 ; <<2 x i32>> [#uses=1]
+ %tmp8 = insertelement <2 x i32> %tmp3, i32 0, i32 1 ; <<2 x i32>> [#uses=1]
+ ret <2 x i32> %tmp8
+}
diff --git a/test/CodeGen/X86/vec_insert-8.ll b/test/CodeGen/X86/vec_insert-8.ll
new file mode 100644
index 0000000..650951c
--- /dev/null
+++ b/test/CodeGen/X86/vec_insert-8.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t
+
+; tests variable insert and extract of a 4 x i32
+
+define <4 x i32> @var_insert(<4 x i32> %x, i32 %val, i32 %idx) nounwind {
+entry:
+ %tmp3 = insertelement <4 x i32> %x, i32 %val, i32 %idx ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp3
+}
+
+define i32 @var_extract(<4 x i32> %x, i32 %idx) nounwind {
+entry:
+ %tmp3 = extractelement <4 x i32> %x, i32 %idx ; <<i32>> [#uses=1]
+ ret i32 %tmp3
+}
diff --git a/test/CodeGen/X86/vec_insert.ll b/test/CodeGen/X86/vec_insert.ll
new file mode 100644
index 0000000..a7274a9
--- /dev/null
+++ b/test/CodeGen/X86/vec_insert.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movss | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | not grep pinsrw
+
+define void @test(<4 x float>* %F, i32 %I) {
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=1]
+ %f = sitofp i32 %I to float ; <float> [#uses=1]
+ %tmp1 = insertelement <4 x float> %tmp, float %f, i32 0 ; <<4 x float>> [#uses=2]
+ %tmp18 = fadd <4 x float> %tmp1, %tmp1 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp18, <4 x float>* %F
+ ret void
+}
+
+define void @test2(<4 x float>* %F, i32 %I, float %g) {
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=1]
+ %f = sitofp i32 %I to float ; <float> [#uses=1]
+ %tmp1 = insertelement <4 x float> %tmp, float %f, i32 2 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp1, <4 x float>* %F
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_insert_4.ll b/test/CodeGen/X86/vec_insert_4.ll
new file mode 100644
index 0000000..2c31e56
--- /dev/null
+++ b/test/CodeGen/X86/vec_insert_4.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep 1084227584 | count 1
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9.2.2"
+
+define <8 x float> @f(<8 x float> %a, i32 %b) nounwind {
+entry:
+ %vecins = insertelement <8 x float> %a, float 5.000000e+00, i32 %b ; <<4 x float>> [#uses=1]
+ ret <8 x float> %vecins
+}
diff --git a/test/CodeGen/X86/vec_loadsingles.ll b/test/CodeGen/X86/vec_loadsingles.ll
new file mode 100644
index 0000000..8812c4f
--- /dev/null
+++ b/test/CodeGen/X86/vec_loadsingles.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
+
+define <4 x float> @a(<4 x float> %a, float* nocapture %p) nounwind readonly {
+entry:
+ %tmp1 = load float* %p
+ %vecins = insertelement <4 x float> undef, float %tmp1, i32 0
+ %add.ptr = getelementptr float* %p, i32 1
+ %tmp5 = load float* %add.ptr
+ %vecins7 = insertelement <4 x float> %vecins, float %tmp5, i32 1
+ ret <4 x float> %vecins7
+}
+
diff --git a/test/CodeGen/X86/vec_logical.ll b/test/CodeGen/X86/vec_logical.ll
new file mode 100644
index 0000000..1dc0b16
--- /dev/null
+++ b/test/CodeGen/X86/vec_logical.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
+; RUN: grep xorps %t | count 2
+; RUN: grep andnps %t
+; RUN: grep movaps %t | count 2
+
+define void @t(<4 x float> %A) {
+ %tmp1277 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %A
+ store <4 x float> %tmp1277, <4 x float>* null
+ ret void
+}
+
+define <4 x float> @t1(<4 x float> %a, <4 x float> %b) {
+entry:
+ %tmp9 = bitcast <4 x float> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp10 = bitcast <4 x float> %b to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp11 = xor <4 x i32> %tmp9, %tmp10 ; <<4 x i32>> [#uses=1]
+ %tmp13 = bitcast <4 x i32> %tmp11 to <4 x float> ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp13
+}
+
+define <2 x double> @t2(<2 x double> %a, <2 x double> %b) {
+entry:
+ %tmp9 = bitcast <2 x double> %a to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp10 = bitcast <2 x double> %b to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp11 = and <2 x i64> %tmp9, %tmp10 ; <<2 x i64>> [#uses=1]
+ %tmp13 = bitcast <2 x i64> %tmp11 to <2 x double> ; <<2 x double>> [#uses=1]
+ ret <2 x double> %tmp13
+}
+
+define void @t3(<4 x float> %a, <4 x float> %b, <4 x float>* %c, <4 x float>* %d) {
+entry:
+ %tmp3 = load <4 x float>* %c ; <<4 x float>> [#uses=1]
+ %tmp11 = bitcast <4 x float> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp12 = bitcast <4 x float> %b to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp13 = xor <4 x i32> %tmp11, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %tmp14 = and <4 x i32> %tmp12, %tmp13 ; <<4 x i32>> [#uses=1]
+ %tmp27 = bitcast <4 x float> %tmp3 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp28 = or <4 x i32> %tmp14, %tmp27 ; <<4 x i32>> [#uses=1]
+ %tmp30 = bitcast <4 x i32> %tmp28 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp30, <4 x float>* %d
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_return.ll b/test/CodeGen/X86/vec_return.ll
new file mode 100644
index 0000000..66762b4
--- /dev/null
+++ b/test/CodeGen/X86/vec_return.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
+; RUN: grep xorps %t | count 1
+; RUN: grep movaps %t | count 1
+; RUN: not grep shuf %t
+
+define <2 x double> @test() {
+ ret <2 x double> zeroinitializer
+}
+
+define <4 x i32> @test2() nounwind {
+ ret <4 x i32> < i32 0, i32 0, i32 1, i32 0 >
+}
diff --git a/test/CodeGen/X86/vec_select.ll b/test/CodeGen/X86/vec_select.ll
new file mode 100644
index 0000000..033e9f7
--- /dev/null
+++ b/test/CodeGen/X86/vec_select.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse
+
+define void @test(i32 %C, <4 x float>* %A, <4 x float>* %B) {
+ %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1]
+ %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=2]
+ %tmp9 = fmul <4 x float> %tmp3, %tmp3 ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.1 = icmp eq i32 %C, 0 ; <i1> [#uses=1]
+ %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp ; <<4 x float>> [#uses=1]
+ store <4 x float> %iftmp.38.0, <4 x float>* %A
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vec_set-2.ll b/test/CodeGen/X86/vec_set-2.ll
new file mode 100644
index 0000000..a8f1187
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-2.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1
+
+define <4 x float> @test1(float %a) nounwind {
+ %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp7 = insertelement <4 x float> %tmp6, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp7
+}
+
+define <2 x i64> @test(i32 %a) nounwind {
+ %tmp = insertelement <4 x i32> zeroinitializer, i32 %a, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp6 = insertelement <4 x i32> %tmp, i32 0, i32 1 ; <<8 x i32>> [#uses=1]
+ %tmp8 = insertelement <4 x i32> %tmp6, i32 0, i32 2 ; <<8 x i32>> [#uses=1]
+ %tmp10 = insertelement <4 x i32> %tmp8, i32 0, i32 3 ; <<8 x i32>> [#uses=1]
+ %tmp19 = bitcast <4 x i32> %tmp10 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp19
+}
diff --git a/test/CodeGen/X86/vec_set-3.ll b/test/CodeGen/X86/vec_set-3.ll
new file mode 100644
index 0000000..ada17e0
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-3.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep pshufd %t | count 2
+
+define <4 x float> @test(float %a) nounwind {
+ %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp6
+}
+
+define <2 x i64> @test2(i32 %a) nounwind {
+ %tmp7 = insertelement <4 x i32> zeroinitializer, i32 %a, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp9 = insertelement <4 x i32> %tmp7, i32 0, i32 3 ; <<4 x i32>> [#uses=1]
+ %tmp10 = bitcast <4 x i32> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp10
+}
+
diff --git a/test/CodeGen/X86/vec_set-4.ll b/test/CodeGen/X86/vec_set-4.ll
new file mode 100644
index 0000000..332c8b7
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-4.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pinsrw | count 2
+
+define <2 x i64> @test(i16 %a) nounwind {
+entry:
+ %tmp10 = insertelement <8 x i16> zeroinitializer, i16 %a, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp12 = insertelement <8 x i16> %tmp10, i16 0, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp14 = insertelement <8 x i16> %tmp12, i16 0, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp16 = insertelement <8 x i16> %tmp14, i16 0, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp18 = insertelement <8 x i16> %tmp16, i16 0, i32 7 ; <<8 x i16>> [#uses=1]
+ %tmp19 = bitcast <8 x i16> %tmp18 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp19
+}
+
+define <2 x i64> @test2(i8 %a) nounwind {
+entry:
+ %tmp24 = insertelement <16 x i8> zeroinitializer, i8 %a, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp26 = insertelement <16 x i8> %tmp24, i8 0, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp28 = insertelement <16 x i8> %tmp26, i8 0, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp30 = insertelement <16 x i8> %tmp28, i8 0, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp32 = insertelement <16 x i8> %tmp30, i8 0, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp34 = insertelement <16 x i8> %tmp32, i8 0, i32 15 ; <<16 x i8>> [#uses=1]
+ %tmp35 = bitcast <16 x i8> %tmp34 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp35
+}
diff --git a/test/CodeGen/X86/vec_set-5.ll b/test/CodeGen/X86/vec_set-5.ll
new file mode 100644
index 0000000..f811a74
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-5.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep movlhps %t | count 1
+; RUN: grep movq %t | count 2
+
+define <4 x float> @test1(float %a, float %b) nounwind {
+ %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp6 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp8 = insertelement <4 x float> %tmp6, float %b, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp9 = insertelement <4 x float> %tmp8, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp9
+}
+
+define <4 x float> @test2(float %a, float %b) nounwind {
+ %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp7 = insertelement <4 x float> %tmp, float %b, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp8 = insertelement <4 x float> %tmp7, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp9 = insertelement <4 x float> %tmp8, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp9
+}
+
+define <2 x i64> @test3(i32 %a, i32 %b) nounwind {
+ %tmp = insertelement <4 x i32> zeroinitializer, i32 %a, i32 0 ; <<4 x i32>> [#uses=1]
+ %tmp6 = insertelement <4 x i32> %tmp, i32 %b, i32 1 ; <<4 x i32>> [#uses=1]
+ %tmp8 = insertelement <4 x i32> %tmp6, i32 0, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp10 = insertelement <4 x i32> %tmp8, i32 0, i32 3 ; <<4 x i32>> [#uses=1]
+ %tmp11 = bitcast <4 x i32> %tmp10 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp11
+}
diff --git a/test/CodeGen/X86/vec_set-6.ll b/test/CodeGen/X86/vec_set-6.ll
new file mode 100644
index 0000000..0713d95
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-6.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep movss %t | count 1
+; RUN: grep movq %t | count 1
+; RUN: grep shufps %t | count 1
+
+define <4 x float> @test(float %a, float %b, float %c) nounwind {
+ %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp8 = insertelement <4 x float> %tmp, float %b, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp10 = insertelement <4 x float> %tmp8, float %c, i32 3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp10
+}
+
diff --git a/test/CodeGen/X86/vec_set-7.ll b/test/CodeGen/X86/vec_set-7.ll
new file mode 100644
index 0000000..d993178
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-7.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 1
+
+define <2 x i64> @test(<2 x i64>* %p) nounwind {
+ %tmp = bitcast <2 x i64>* %p to double*
+ %tmp.upgrd.1 = load double* %tmp
+ %tmp.upgrd.2 = insertelement <2 x double> undef, double %tmp.upgrd.1, i32 0
+ %tmp5 = insertelement <2 x double> %tmp.upgrd.2, double 0.0, i32 1
+ %tmp.upgrd.3 = bitcast <2 x double> %tmp5 to <2 x i64>
+ ret <2 x i64> %tmp.upgrd.3
+}
+
diff --git a/test/CodeGen/X86/vec_set-8.ll b/test/CodeGen/X86/vec_set-8.ll
new file mode 100644
index 0000000..9697f11
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-8.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64 | not grep movsd
+; RUN: llc < %s -march=x86-64 | grep {movd.*%rdi,.*%xmm0}
+
+define <2 x i64> @test(i64 %i) nounwind {
+entry:
+ %tmp10 = insertelement <2 x i64> undef, i64 %i, i32 0
+ %tmp11 = insertelement <2 x i64> %tmp10, i64 0, i32 1
+ ret <2 x i64> %tmp11
+}
+
diff --git a/test/CodeGen/X86/vec_set-9.ll b/test/CodeGen/X86/vec_set-9.ll
new file mode 100644
index 0000000..3656e5f
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-9.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86-64 | grep movd | count 1
+; RUN: llc < %s -march=x86-64 | grep {movlhps.*%xmm0, %xmm0}
+
+define <2 x i64> @test3(i64 %A) nounwind {
+entry:
+ %B = insertelement <2 x i64> undef, i64 %A, i32 1
+ ret <2 x i64> %B
+}
+
diff --git a/test/CodeGen/X86/vec_set-A.ll b/test/CodeGen/X86/vec_set-A.ll
new file mode 100644
index 0000000..f05eecf
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-A.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movl.*\$1, %}
+define <2 x i64> @test1() nounwind {
+entry:
+ ret <2 x i64> < i64 1, i64 0 >
+}
+
diff --git a/test/CodeGen/X86/vec_set-B.ll b/test/CodeGen/X86/vec_set-B.ll
new file mode 100644
index 0000000..f5b3e8b
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-B.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movaps
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep esp | count 2
+
+; These should both generate something like this:
+;_test3:
+; movl $1234567, %eax
+; andl 4(%esp), %eax
+; movd %eax, %xmm0
+; ret
+
+define <2 x i64> @test3(i64 %arg) nounwind {
+entry:
+ %A = and i64 %arg, 1234567
+ %B = insertelement <2 x i64> zeroinitializer, i64 %A, i32 0
+ ret <2 x i64> %B
+}
+
+define <2 x i64> @test2(i64 %arg) nounwind {
+entry:
+ %A = and i64 %arg, 1234567
+ %B = insertelement <2 x i64> undef, i64 %A, i32 0
+ ret <2 x i64> %B
+}
+
diff --git a/test/CodeGen/X86/vec_set-C.ll b/test/CodeGen/X86/vec_set-C.ll
new file mode 100644
index 0000000..7636ac3
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-C.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 1
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd
+
+define <2 x i64> @t1(i64 %x) nounwind {
+ %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
+ ret <2 x i64> %tmp8
+}
diff --git a/test/CodeGen/X86/vec_set-D.ll b/test/CodeGen/X86/vec_set-D.ll
new file mode 100644
index 0000000..3d6369e
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-D.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
+
+define <4 x i32> @t(i32 %x, i32 %y) nounwind {
+ %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
+ %tmp2 = insertelement <4 x i32> %tmp1, i32 %y, i32 1
+ ret <4 x i32> %tmp2
+}
diff --git a/test/CodeGen/X86/vec_set-E.ll b/test/CodeGen/X86/vec_set-E.ll
new file mode 100644
index 0000000..d78be66
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-E.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
+
+define <4 x float> @t(float %X) nounwind {
+ %tmp11 = insertelement <4 x float> undef, float %X, i32 0
+ %tmp12 = insertelement <4 x float> %tmp11, float %X, i32 1
+ %tmp27 = insertelement <4 x float> %tmp12, float 0.000000e+00, i32 2
+ %tmp28 = insertelement <4 x float> %tmp27, float 0.000000e+00, i32 3
+ ret <4 x float> %tmp28
+}
diff --git a/test/CodeGen/X86/vec_set-F.ll b/test/CodeGen/X86/vec_set-F.ll
new file mode 100644
index 0000000..4f0acb2
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-F.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 3
+
+define <2 x i64> @t1(<2 x i64>* %ptr) nounwind {
+ %tmp45 = bitcast <2 x i64>* %ptr to <2 x i32>*
+ %tmp615 = load <2 x i32>* %tmp45
+ %tmp7 = bitcast <2 x i32> %tmp615 to i64
+ %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %tmp7, i32 0
+ ret <2 x i64> %tmp8
+}
+
+define <2 x i64> @t2(i64 %x) nounwind {
+ %tmp717 = bitcast i64 %x to double
+ %tmp8 = insertelement <2 x double> undef, double %tmp717, i32 0
+ %tmp9 = insertelement <2 x double> %tmp8, double 0.000000e+00, i32 1
+ %tmp11 = bitcast <2 x double> %tmp9 to <2 x i64>
+ ret <2 x i64> %tmp11
+}
diff --git a/test/CodeGen/X86/vec_set-G.ll b/test/CodeGen/X86/vec_set-G.ll
new file mode 100644
index 0000000..4a542fe
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-G.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss
+
+define fastcc void @t(<4 x float> %A) nounwind {
+ %tmp41896 = extractelement <4 x float> %A, i32 0 ; <float> [#uses=1]
+ %tmp14082 = insertelement <4 x float> < float 0.000000e+00, float undef, float undef, float undef >, float %tmp41896, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp14083 = insertelement <4 x float> %tmp14082, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp14083, <4 x float>* null, align 16
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_set-H.ll b/test/CodeGen/X86/vec_set-H.ll
new file mode 100644
index 0000000..5037e36
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-H.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movz
+
+define <2 x i64> @doload64(i16 signext %x) nounwind {
+entry:
+ %tmp36 = insertelement <8 x i16> undef, i16 %x, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp37 = insertelement <8 x i16> %tmp36, i16 %x, i32 1 ; <<8 x i16>> [#uses=1]
+ %tmp38 = insertelement <8 x i16> %tmp37, i16 %x, i32 2 ; <<8 x i16>> [#uses=1]
+ %tmp39 = insertelement <8 x i16> %tmp38, i16 %x, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp40 = insertelement <8 x i16> %tmp39, i16 %x, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp41 = insertelement <8 x i16> %tmp40, i16 %x, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp42 = insertelement <8 x i16> %tmp41, i16 %x, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp43 = insertelement <8 x i16> %tmp42, i16 %x, i32 7 ; <<8 x i16>> [#uses=1]
+ %tmp46 = bitcast <8 x i16> %tmp43 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp46
+}
diff --git a/test/CodeGen/X86/vec_set-I.ll b/test/CodeGen/X86/vec_set-I.ll
new file mode 100644
index 0000000..64f36f9
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-I.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xorp
+
+define void @t1() nounwind {
+ %tmp298.i.i = load <4 x float>* null, align 16
+ %tmp304.i.i = bitcast <4 x float> %tmp298.i.i to <4 x i32>
+ %tmp305.i.i = and <4 x i32> %tmp304.i.i, < i32 -1, i32 0, i32 0, i32 0 >
+ store <4 x i32> %tmp305.i.i, <4 x i32>* null, align 16
+ unreachable
+}
diff --git a/test/CodeGen/X86/vec_set-J.ll b/test/CodeGen/X86/vec_set-J.ll
new file mode 100644
index 0000000..d90ab85
--- /dev/null
+++ b/test/CodeGen/X86/vec_set-J.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss
+; PR2472
+
+define <4 x i32> @a(<4 x i32> %a) nounwind {
+entry:
+ %vecext = extractelement <4 x i32> %a, i32 0
+ insertelement <4 x i32> zeroinitializer, i32 %vecext, i32 0
+ %add = add <4 x i32> %a, %0
+ ret <4 x i32> %add
+}
diff --git a/test/CodeGen/X86/vec_set.ll b/test/CodeGen/X86/vec_set.ll
new file mode 100644
index 0000000..c316df8
--- /dev/null
+++ b/test/CodeGen/X86/vec_set.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep punpckl | count 7
+
+define void @test(<8 x i16>* %b, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {
+ %tmp = insertelement <8 x i16> zeroinitializer, i16 %a0, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp2 = insertelement <8 x i16> %tmp, i16 %a1, i32 1 ; <<8 x i16>> [#uses=1]
+ %tmp4 = insertelement <8 x i16> %tmp2, i16 %a2, i32 2 ; <<8 x i16>> [#uses=1]
+ %tmp6 = insertelement <8 x i16> %tmp4, i16 %a3, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp8 = insertelement <8 x i16> %tmp6, i16 %a4, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp10 = insertelement <8 x i16> %tmp8, i16 %a5, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp12 = insertelement <8 x i16> %tmp10, i16 %a6, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp14 = insertelement <8 x i16> %tmp12, i16 %a7, i32 7 ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %tmp14, <8 x i16>* %b
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vec_shift.ll b/test/CodeGen/X86/vec_shift.ll
new file mode 100644
index 0000000..ddf0469
--- /dev/null
+++ b/test/CodeGen/X86/vec_shift.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psrlq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
+
+define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind {
+entry:
+ %tmp6 = bitcast <2 x i64> %c to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp8 = bitcast <2 x i64> %b1 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp10
+}
+
+define <2 x i64> @t3(<2 x i64> %b1, i32 %c) nounwind {
+entry:
+ %tmp2 = bitcast <2 x i64> %b1 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp4 = insertelement <4 x i32> undef, i32 %c, i32 0 ; <<4 x i32>> [#uses=1]
+ %tmp8 = bitcast <4 x i32> %tmp4 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 x i16> %tmp8 ) ; <<8 x i16>> [#uses=1]
+ %tmp11 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp11
+}
+
+declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone
+
+define <2 x i64> @t2(<2 x i64> %b1, <2 x i64> %c) nounwind {
+entry:
+ %tmp9 = tail call <2 x i64> @llvm.x86.sse2.psrl.q( <2 x i64> %b1, <2 x i64> %c ) nounwind readnone ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp9
+}
+
+declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone
diff --git a/test/CodeGen/X86/vec_shift2.ll b/test/CodeGen/X86/vec_shift2.ll
new file mode 100644
index 0000000..c5f9dc4
--- /dev/null
+++ b/test/CodeGen/X86/vec_shift2.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep CPI
+
+define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind {
+ %tmp1 = bitcast <2 x i64> %b1 to <8 x i16>
+ %tmp2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp1, <8 x i16> bitcast (<4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > to <8 x i16>) ) nounwind readnone
+ %tmp3 = bitcast <8 x i16> %tmp2 to <2 x i64>
+ ret <2 x i64> %tmp3
+}
+
+define <4 x i32> @t2(<2 x i64> %b1, <2 x i64> %c) nounwind {
+ %tmp1 = bitcast <2 x i64> %b1 to <4 x i32>
+ %tmp2 = tail call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp1, <4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > ) nounwind readnone
+ ret <4 x i32> %tmp2
+}
+
+declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone
diff --git a/test/CodeGen/X86/vec_shift3.ll b/test/CodeGen/X86/vec_shift3.ll
new file mode 100644
index 0000000..1ebf455
--- /dev/null
+++ b/test/CodeGen/X86/vec_shift3.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 2
+
+define <2 x i64> @t1(<2 x i64> %x1, i32 %bits) nounwind {
+entry:
+ %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp3
+}
+
+define <2 x i64> @t2(<2 x i64> %x1) nounwind {
+entry:
+ %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp3
+}
+
+define <2 x i64> @t3(<2 x i64> %x1, i32 %bits) nounwind {
+entry:
+ %tmp2 = bitcast <2 x i64> %x1 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w( <8 x i16> %tmp2, i32 %bits ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp5 = bitcast <8 x i16> %tmp4 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp5
+}
+
+declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone
+declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone
diff --git a/test/CodeGen/X86/vec_shuffle-10.ll b/test/CodeGen/X86/vec_shuffle-10.ll
new file mode 100644
index 0000000..a63e386
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-10.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep unpcklps %t | count 1
+; RUN: grep pshufd %t | count 1
+; RUN: not grep {sub.*esp} %t
+
+define void @test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) {
+ %tmp = load <4 x float>* %B ; <<4 x float>> [#uses=2]
+ %tmp3 = load <4 x float>* %A ; <<4 x float>> [#uses=2]
+ %tmp.upgrd.1 = extractelement <4 x float> %tmp3, i32 0 ; <float> [#uses=1]
+ %tmp7 = extractelement <4 x float> %tmp, i32 0 ; <float> [#uses=1]
+ %tmp8 = extractelement <4 x float> %tmp3, i32 1 ; <float> [#uses=1]
+ %tmp9 = extractelement <4 x float> %tmp, i32 1 ; <float> [#uses=1]
+ %tmp10 = insertelement <4 x float> undef, float %tmp.upgrd.1, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp13, <4 x float>* %res
+ ret void
+}
+
+define void @test2(<4 x float> %X, <4 x float>* %res) {
+ %tmp5 = shufflevector <4 x float> %X, <4 x float> undef, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp5, <4 x float>* %res
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_shuffle-11.ll b/test/CodeGen/X86/vec_shuffle-11.ll
new file mode 100644
index 0000000..640745a
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-11.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep mov
+
+define <4 x i32> @test() nounwind {
+ %tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1]
+ %tmp137 = bitcast <2 x i64> %tmp131 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp138 = and <4 x i32> %tmp137, bitcast (<2 x i64> < i64 -1, i64 -1 > to <4 x i32>) ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp138
+}
+
+declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32)
diff --git a/test/CodeGen/X86/vec_shuffle-14.ll b/test/CodeGen/X86/vec_shuffle-14.ll
new file mode 100644
index 0000000..f0cfc44
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-14.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd | count 2
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movq | count 3
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor
+
+define <4 x i32> @t1(i32 %a) nounwind {
+entry:
+ %tmp = insertelement <4 x i32> undef, i32 %a, i32 0
+ %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp, <4 x i32> < i32 4, i32 1, i32 2, i32 3 > ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp6
+}
+
+define <2 x i64> @t2(i64 %a) nounwind {
+entry:
+ %tmp = insertelement <2 x i64> undef, i64 %a, i32 0
+ %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %tmp, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1]
+ ret <2 x i64> %tmp6
+}
+
+define <2 x i64> @t3(<2 x i64>* %a) nounwind {
+entry:
+ %tmp4 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1]
+ %tmp6 = bitcast <2 x i64> %tmp4 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp7 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp6, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x i32>> [#uses=1]
+ %tmp8 = bitcast <4 x i32> %tmp7 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp8
+}
+
+define <2 x i64> @t4(<2 x i64> %a) nounwind {
+entry:
+ %tmp5 = bitcast <2 x i64> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp5, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x i32>> [#uses=1]
+ %tmp7 = bitcast <4 x i32> %tmp6 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp7
+}
+
+define <2 x i64> @t5(<2 x i64> %a) nounwind {
+entry:
+ %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %a, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1]
+ ret <2 x i64> %tmp6
+}
diff --git a/test/CodeGen/X86/vec_shuffle-15.ll b/test/CodeGen/X86/vec_shuffle-15.ll
new file mode 100644
index 0000000..5a9b8fd
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-15.ll
@@ -0,0 +1,81 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define <2 x i64> @t00(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 0 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t01(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 1 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t02(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 2 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t03(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 3 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t10(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 1, i32 0 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t11(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 1, i32 1 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t12(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 1, i32 2 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t13(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 1, i32 3 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t20(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 2, i32 0 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t21(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 2, i32 1 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t22(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 2, i32 2 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t23(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 2, i32 3 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t30(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 3, i32 0 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t31(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 3, i32 1 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t32(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 3, i32 2 >
+ ret <2 x i64> %tmp
+}
+
+define <2 x i64> @t33(<2 x i64> %a, <2 x i64> %b) nounwind {
+ %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 3, i32 3 >
+ ret <2 x i64> %tmp
+}
diff --git a/test/CodeGen/X86/vec_shuffle-16.ll b/test/CodeGen/X86/vec_shuffle-16.ll
new file mode 100644
index 0000000..470f676
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-16.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin -o %t
+; RUN: grep shufps %t | count 4
+; RUN: grep movaps %t | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t
+; RUN: grep pshufd %t | count 4
+; RUN: not grep shufps %t
+; RUN: not grep mov %t
+
+define <4 x float> @t1(<4 x float> %a, <4 x float> %b) nounwind {
+ %tmp1 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> zeroinitializer
+ ret <4 x float> %tmp1
+}
+
+define <4 x float> @t2(<4 x float> %A, <4 x float> %B) nounwind {
+ %tmp = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 3, i32 3, i32 3, i32 3 >
+ ret <4 x float> %tmp
+}
+
+define <4 x float> @t3(<4 x float> %A, <4 x float> %B) nounwind {
+ %tmp = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 4, i32 4, i32 4, i32 4 >
+ ret <4 x float> %tmp
+}
+
+define <4 x float> @t4(<4 x float> %A, <4 x float> %B) nounwind {
+ %tmp = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 1, i32 3, i32 2, i32 0 >
+ ret <4 x float> %tmp
+}
diff --git a/test/CodeGen/X86/vec_shuffle-17.ll b/test/CodeGen/X86/vec_shuffle-17.ll
new file mode 100644
index 0000000..9c33abb
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-17.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 | grep {movd.*%rdi, %xmm0}
+; RUN: llc < %s -march=x86-64 | not grep xor
+; PR2108
+
+define <2 x i64> @doload64(i64 %x) nounwind {
+entry:
+ %tmp717 = bitcast i64 %x to double ; <double> [#uses=1]
+ %tmp8 = insertelement <2 x double> undef, double %tmp717, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp9 = insertelement <2 x double> %tmp8, double 0.000000e+00, i32 1 ; <<2 x double>> [#uses=1]
+ %tmp11 = bitcast <2 x double> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp11
+}
+
diff --git a/test/CodeGen/X86/vec_shuffle-18.ll b/test/CodeGen/X86/vec_shuffle-18.ll
new file mode 100644
index 0000000..1104a4a8
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-18.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7
+
+ %struct.vector4_t = type { <4 x float> }
+
+define void @swizzle(i8* %a, %struct.vector4_t* %b, %struct.vector4_t* %c) nounwind {
+entry:
+ %tmp9 = getelementptr %struct.vector4_t* %b, i32 0, i32 0 ; <<4 x float>*> [#uses=2]
+ %tmp10 = load <4 x float>* %tmp9, align 16 ; <<4 x float>> [#uses=1]
+ %tmp14 = bitcast i8* %a to double* ; <double*> [#uses=1]
+ %tmp15 = load double* %tmp14 ; <double> [#uses=1]
+ %tmp16 = insertelement <2 x double> undef, double %tmp15, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp18 = bitcast <2 x double> %tmp16 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp19 = shufflevector <4 x float> %tmp10, <4 x float> %tmp18, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp19, <4 x float>* %tmp9, align 16
+ %tmp28 = getelementptr %struct.vector4_t* %c, i32 0, i32 0 ; <<4 x float>*> [#uses=2]
+ %tmp29 = load <4 x float>* %tmp28, align 16 ; <<4 x float>> [#uses=1]
+ %tmp26 = getelementptr i8* %a, i32 8 ; <i8*> [#uses=1]
+ %tmp33 = bitcast i8* %tmp26 to double* ; <double*> [#uses=1]
+ %tmp34 = load double* %tmp33 ; <double> [#uses=1]
+ %tmp35 = insertelement <2 x double> undef, double %tmp34, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp37 = bitcast <2 x double> %tmp35 to <4 x float> ; <<4 x float>> [#uses=1]
+ %tmp38 = shufflevector <4 x float> %tmp29, <4 x float> %tmp37, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp38, <4 x float>* %tmp28, align 16
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_shuffle-19.ll b/test/CodeGen/X86/vec_shuffle-19.ll
new file mode 100644
index 0000000..9fc09df
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-19.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4
+; PR2485
+
+define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind {
+entry:
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> < i32 4, i32 0, i32 0, i32 0 > ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %shuffle
+}
diff --git a/test/CodeGen/X86/vec_shuffle-20.ll b/test/CodeGen/X86/vec_shuffle-20.ll
new file mode 100644
index 0000000..6d1bac0
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-20.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 3
+
+define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) nounwind {
+entry:
+ shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:0 [#uses=1]
+ ret <4 x float> %0
+}
diff --git a/test/CodeGen/X86/vec_shuffle-22.ll b/test/CodeGen/X86/vec_shuffle-22.ll
new file mode 100644
index 0000000..6807e4d
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-22.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mcpu=pentium-m | FileCheck %s
+
+define <4 x float> @t1(<4 x float> %a) nounwind {
+; CHECK: movlhps
+ %tmp1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> < i32 0, i32 1, i32 0, i32 1 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp1
+}
+
+define <4 x i32> @t2(<4 x i32>* %a) nounwind {
+; CHECK: pshufd
+; CHECK: ret
+ %tmp1 = load <4 x i32>* %a
+ %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> < i32 0, i32 1, i32 0, i32 1 > ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp2
+}
diff --git a/test/CodeGen/X86/vec_shuffle-23.ll b/test/CodeGen/X86/vec_shuffle-23.ll
new file mode 100644
index 0000000..05a3a1e
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-23.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep punpck
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd
+
+define i32 @t() nounwind {
+entry:
+ %a = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
+ %b = alloca <4 x i32> ; <<4 x i32>*> [#uses=5]
+ volatile store <4 x i32> < i32 0, i32 1, i32 2, i32 3 >, <4 x i32>* %a
+ %tmp = load <4 x i32>* %a ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp, <4 x i32>* %b
+ %tmp1 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %tmp2 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %punpckldq = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %punpckldq, <4 x i32>* %b
+ %tmp3 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %result = extractelement <4 x i32> %tmp3, i32 0 ; <i32> [#uses=1]
+ ret i32 %result
+}
diff --git a/test/CodeGen/X86/vec_shuffle-24.ll b/test/CodeGen/X86/vec_shuffle-24.ll
new file mode 100644
index 0000000..7562f1d
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-24.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep punpck
+
+define i32 @t() nounwind optsize {
+entry:
+ %a = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
+ %b = alloca <4 x i32> ; <<4 x i32>*> [#uses=5]
+ volatile store <4 x i32> < i32 0, i32 1, i32 2, i32 3 >, <4 x i32>* %a
+ %tmp = load <4 x i32>* %a ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp, <4 x i32>* %b
+ %tmp1 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %tmp2 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %punpckldq = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %punpckldq, <4 x i32>* %b
+ %tmp3 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %result = extractelement <4 x i32> %tmp3, i32 0 ; <i32> [#uses=1]
+ ret i32 %result
+}
diff --git a/test/CodeGen/X86/vec_shuffle-25.ll b/test/CodeGen/X86/vec_shuffle-25.ll
new file mode 100644
index 0000000..d9b2388
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-25.ll
@@ -0,0 +1,34 @@
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
+; RUN: grep unpcklps %t | count 3
+; RUN: grep unpckhps %t | count 1
+
+; Transpose example using the more generic vector shuffle. We return
+; float8 instead of float16 since x86 can return that in register.
+; ModuleID = 'transpose2_opt.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-apple-cl.1.0"
+@r0 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
+@r1 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
+@r2 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
+@r3 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
+
+define <8 x float> @__transpose2(<4 x float> %p0, <4 x float> %p1, <4 x float> %p2, <4 x float> %p3) nounwind {
+entry:
+ %unpcklps = shufflevector <4 x float> %p0, <4 x float> %p2, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2]
+ %unpckhps = shufflevector <4 x float> %p0, <4 x float> %p2, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
+ %unpcklps8 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2]
+ %unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
+ %unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
+ %unpcklps14a = shufflevector <4 x float> %unpcklps14, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ %unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
+ %unpckhps17a = shufflevector <4 x float> %unpckhps17, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ %r1 = shufflevector <16 x float> %unpcklps14a, <16 x float> %unpckhps17a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ %unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
+ %unpcklps20a = shufflevector <4 x float> %unpcklps20, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ %r2 = shufflevector <16 x float> %r1, <16 x float> %unpcklps20a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>
+ %unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
+ %unpckhps23a = shufflevector <4 x float> %unpckhps23, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ %r3 = shufflevector <16 x float> %r2, <16 x float> %unpckhps23a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
+ %r4 = shufflevector <16 x float> %r3, <16 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <8 x float> %r4
+}
diff --git a/test/CodeGen/X86/vec_shuffle-26.ll b/test/CodeGen/X86/vec_shuffle-26.ll
new file mode 100644
index 0000000..086af6b
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-26.ll
@@ -0,0 +1,29 @@
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
+; RUN: grep unpcklps %t | count 1
+; RUN: grep unpckhps %t | count 3
+
+; Transpose example using the more generic vector shuffle. Return float8
+; instead of float16
+; ModuleID = 'transpose2_opt.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-apple-cl.1.0"
+@r0 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
+@r1 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
+@r2 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
+@r3 = common global <4 x float> zeroinitializer, align 16 ; <<4 x float>*> [#uses=1]
+
+define <8 x float> @__transpose2(<4 x float> %p0, <4 x float> %p1, <4 x float> %p2, <4 x float> %p3) nounwind {
+entry:
+ %unpcklps = shufflevector <4 x float> %p0, <4 x float> %p2, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2]
+ %unpckhps = shufflevector <4 x float> %p0, <4 x float> %p2, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
+ %unpcklps8 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2]
+ %unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
+ %unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
+ %unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
+ %r1 = shufflevector <4 x float> %unpcklps14, <4 x float> %unpckhps17, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
+ %unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
+ %unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
+ %r2 = shufflevector <4 x float> %unpcklps20, <4 x float> %unpckhps23, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
+; %r3 = shufflevector <8 x float> %r1, <8 x float> %r2, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15 >;
+ ret <8 x float> %r2
+}
diff --git a/test/CodeGen/X86/vec_shuffle-27.ll b/test/CodeGen/X86/vec_shuffle-27.ll
new file mode 100644
index 0000000..d700ccb
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-27.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
+; RUN: grep addps %t | count 2
+; RUN: grep mulps %t | count 2
+; RUN: grep subps %t | count 2
+
+; ModuleID = 'vec_shuffle-27.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-apple-cl.1.0"
+
+define <8 x float> @my2filter4_1d(<4 x float> %a, <8 x float> %T0, <8 x float> %T1) nounwind readnone {
+entry:
+ %tmp7 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3 > ; <<8 x float>> [#uses=1]
+ %sub = fsub <8 x float> %T1, %T0 ; <<8 x float>> [#uses=1]
+ %mul = fmul <8 x float> %sub, %tmp7 ; <<8 x float>> [#uses=1]
+ %add = fadd <8 x float> %mul, %T0 ; <<8 x float>> [#uses=1]
+ ret <8 x float> %add
+}
diff --git a/test/CodeGen/X86/vec_shuffle-28.ll b/test/CodeGen/X86/vec_shuffle-28.ll
new file mode 100644
index 0000000..343685b
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-28.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mcpu=core2 -o %t
+; RUN: grep pshufb %t | count 1
+
+; FIXME: this test has a superfluous punpcklqdq pre-pshufb currently.
+; Don't XFAIL it because it's still better than the previous code.
+
+; Pack various elements via shuffles.
+define <8 x i16> @shuf1(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp7 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp7
+}
diff --git a/test/CodeGen/X86/vec_shuffle-3.ll b/test/CodeGen/X86/vec_shuffle-3.ll
new file mode 100644
index 0000000..f4930b0
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-3.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep movlhps %t | count 1
+; RUN: grep movhlps %t | count 1
+
+define <4 x float> @test1(<4 x float>* %x, <4 x float>* %y) {
+ %tmp = load <4 x float>* %y ; <<4 x float>> [#uses=2]
+ %tmp5 = load <4 x float>* %x ; <<4 x float>> [#uses=2]
+ %tmp9 = fadd <4 x float> %tmp5, %tmp ; <<4 x float>> [#uses=1]
+ %tmp21 = fsub <4 x float> %tmp5, %tmp ; <<4 x float>> [#uses=1]
+ %tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x i32> < i32 0, i32 1, i32 4, i32 5 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp27
+}
+
+define <4 x float> @movhl(<4 x float>* %x, <4 x float>* %y) {
+entry:
+ %tmp = load <4 x float>* %y ; <<4 x float>> [#uses=1]
+ %tmp3 = load <4 x float>* %x ; <<4 x float>> [#uses=1]
+ %tmp4 = shufflevector <4 x float> %tmp3, <4 x float> %tmp, <4 x i32> < i32 2, i32 3, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp4
+}
diff --git a/test/CodeGen/X86/vec_shuffle-30.ll b/test/CodeGen/X86/vec_shuffle-30.ll
new file mode 100644
index 0000000..3f69150
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-30.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86 -mattr=sse41 -disable-mmx -o %t
+; RUN: grep pshufhw %t | grep -- -95 | count 1
+; RUN: grep shufps %t | count 1
+; RUN: not grep pslldq %t
+
+; Test case when creating pshufhw, we incorrectly set the higher order bit
+; for an undef,
+define void @test(<8 x i16>* %dest, <8 x i16> %in) nounwind {
+entry:
+ %0 = load <8 x i16>* %dest
+ %1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14>
+ store <8 x i16> %1, <8 x i16>* %dest
+ ret void
+}
+
+; A test case where we shouldn't generate a punpckldq but a pshufd and a pslldq
+define void @test2(<4 x i32>* %dest, <4 x i32> %in) nounwind {
+entry:
+ %0 = shufflevector <4 x i32> %in, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> < i32 undef, i32 5, i32 undef, i32 2>
+ store <4 x i32> %0, <4 x i32>* %dest
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_shuffle-31.ll b/test/CodeGen/X86/vec_shuffle-31.ll
new file mode 100644
index 0000000..bb06e15
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-31.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mcpu=core2 -o %t
+; RUN: grep pshufb %t | count 1
+
+define <8 x i16> @shuf3(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef >
+ ret <8 x i16> %tmp9
+}
diff --git a/test/CodeGen/X86/vec_shuffle-34.ll b/test/CodeGen/X86/vec_shuffle-34.ll
new file mode 100644
index 0000000..d057b3f
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-34.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=x86 -mcpu=core2 | grep pshufb | count 2
+
+define <8 x i16> @shuf2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp8
+}
diff --git a/test/CodeGen/X86/vec_shuffle-35.ll b/test/CodeGen/X86/vec_shuffle-35.ll
new file mode 100644
index 0000000..7f0fcb5
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-35.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah -stack-alignment=16 -o %t
+; RUN: grep pextrw %t | count 13
+; RUN: grep pinsrw %t | count 14
+; RUN: grep rolw %t | count 13
+; RUN: not grep esp %t
+; RUN: not grep ebp %t
+; RUN: llc < %s -march=x86 -mcpu=core2 -stack-alignment=16 -o %t
+; RUN: grep pshufb %t | count 3
+
+define <16 x i8> @shuf1(<16 x i8> %T0) nounwind readnone {
+entry:
+ %tmp8 = shufflevector <16 x i8> %T0, <16 x i8> undef, <16 x i32> < i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 12, i32 13, i32 15 , i32 14 >
+ ret <16 x i8> %tmp8
+}
+
+define <16 x i8> @shuf2(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
+entry:
+ %tmp8 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> < i32 undef, i32 undef, i32 3, i32 2, i32 17, i32 16, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 12, i32 13, i32 15 , i32 14 >
+ ret <16 x i8> %tmp8
+}
diff --git a/test/CodeGen/X86/vec_shuffle-36.ll b/test/CodeGen/X86/vec_shuffle-36.ll
new file mode 100644
index 0000000..8a93a7ee
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-36.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
+; RUN: grep pshufb %t | count 1
+
+
+define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 3, i32 2, i32 0, i32 2, i32 1, i32 5, i32 6 , i32 undef >
+ ret <8 x i16> %tmp9
+}
diff --git a/test/CodeGen/X86/vec_shuffle-4.ll b/test/CodeGen/X86/vec_shuffle-4.ll
new file mode 100644
index 0000000..829fedf
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-4.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
+; RUN: grep shuf %t | count 2
+; RUN: not grep unpck %t
+
+define void @test(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B, <4 x float>* %C) {
+ %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=1]
+ %tmp5 = load <4 x float>* %C ; <<4 x float>> [#uses=1]
+ %tmp11 = shufflevector <4 x float> %tmp3, <4 x float> %tmp5, <4 x i32> < i32 1, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp11, <4 x float>* %res
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vec_shuffle-5.ll b/test/CodeGen/X86/vec_shuffle-5.ll
new file mode 100644
index 0000000..c24167a
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-5.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep movhlps %t | count 1
+; RUN: grep shufps %t | count 1
+
+define void @test() nounwind {
+ %tmp1 = load <4 x float>* null ; <<4 x float>> [#uses=2]
+ %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 0, i32 1, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
+ %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
+ %tmp4 = fadd <4 x float> %tmp2, %tmp3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp4, <4 x float>* null
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vec_shuffle-6.ll b/test/CodeGen/X86/vec_shuffle-6.ll
new file mode 100644
index 0000000..f034b0a
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-6.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep movapd %t | count 1
+; RUN: grep movaps %t | count 1
+; RUN: grep movups %t | count 2
+
+target triple = "i686-apple-darwin"
+@x = global [4 x i32] [ i32 1, i32 2, i32 3, i32 4 ] ; <[4 x i32]*> [#uses=4]
+
+define <2 x i64> @test1() {
+ %tmp = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 0) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp5 = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 2) ; <i32> [#uses=1]
+ %tmp7 = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 3) ; <i32> [#uses=1]
+ %tmp.upgrd.1 = insertelement <4 x i32> undef, i32 %tmp, i32 0 ; <<4 x i32>> [#uses=1]
+ %tmp13 = insertelement <4 x i32> %tmp.upgrd.1, i32 %tmp3, i32 1 ; <<4 x i32>> [#uses=1]
+ %tmp14 = insertelement <4 x i32> %tmp13, i32 %tmp5, i32 2 ; <<4 x i32>> [#uses=1]
+ %tmp15 = insertelement <4 x i32> %tmp14, i32 %tmp7, i32 3 ; <<4 x i32>> [#uses=1]
+ %tmp16 = bitcast <4 x i32> %tmp15 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %tmp16
+}
+
+define <4 x float> @test2(i32 %dummy, float %a, float %b, float %c, float %d) {
+ %tmp = insertelement <4 x float> undef, float %a, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp11 = insertelement <4 x float> %tmp, float %b, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp12 = insertelement <4 x float> %tmp11, float %c, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp13 = insertelement <4 x float> %tmp12, float %d, i32 3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp13
+}
+
+define <4 x float> @test3(float %a, float %b, float %c, float %d) {
+ %tmp = insertelement <4 x float> undef, float %a, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp11 = insertelement <4 x float> %tmp, float %b, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp12 = insertelement <4 x float> %tmp11, float %c, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp13 = insertelement <4 x float> %tmp12, float %d, i32 3 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp13
+}
+
+define <2 x double> @test4(double %a, double %b) {
+ %tmp = insertelement <2 x double> undef, double %a, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp7 = insertelement <2 x double> %tmp, double %b, i32 1 ; <<2 x double>> [#uses=1]
+ ret <2 x double> %tmp7
+}
diff --git a/test/CodeGen/X86/vec_shuffle-7.ll b/test/CodeGen/X86/vec_shuffle-7.ll
new file mode 100644
index 0000000..4cdca09
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-7.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
+; RUN: grep xorps %t | count 1
+; RUN: not grep shufps %t
+
+define void @test() {
+ bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:1 [#uses=1]
+ shufflevector <4 x float> %1, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:2 [#uses=1]
+ store <4 x float> %2, <4 x float>* null
+ unreachable
+}
+
diff --git a/test/CodeGen/X86/vec_shuffle-8.ll b/test/CodeGen/X86/vec_shuffle-8.ll
new file mode 100644
index 0000000..964ce7b
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-8.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | \
+; RUN: not grep shufps
+
+define void @test(<4 x float>* %res, <4 x float>* %A) {
+ %tmp1 = load <4 x float>* %A ; <<4 x float>> [#uses=1]
+ %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp2, <4 x float>* %res
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vec_shuffle-9.ll b/test/CodeGen/X86/vec_shuffle-9.ll
new file mode 100644
index 0000000..fc16a26
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-9.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+
+define <4 x i32> @test(i8** %ptr) {
+; CHECK: xorps
+; CHECK: punpcklbw
+; CHECK: punpcklwd
+
+ %tmp = load i8** %ptr ; <i8*> [#uses=1]
+ %tmp.upgrd.1 = bitcast i8* %tmp to float* ; <float*> [#uses=1]
+ %tmp.upgrd.2 = load float* %tmp.upgrd.1 ; <float> [#uses=1]
+ %tmp.upgrd.3 = insertelement <4 x float> undef, float %tmp.upgrd.2, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp9 = insertelement <4 x float> %tmp.upgrd.3, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ %tmp21 = bitcast <4 x float> %tmp11 to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %tmp22 = shufflevector <16 x i8> %tmp21, <16 x i8> zeroinitializer, <16 x i32> < i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23 > ; <<16 x i8>> [#uses=1]
+ %tmp31 = bitcast <16 x i8> %tmp22 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp.upgrd.4 = shufflevector <8 x i16> zeroinitializer, <8 x i16> %tmp31, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1]
+ %tmp36 = bitcast <8 x i16> %tmp.upgrd.4 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp36
+}
diff --git a/test/CodeGen/X86/vec_shuffle.ll b/test/CodeGen/X86/vec_shuffle.ll
new file mode 100644
index 0000000..c05b79a
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle.ll
@@ -0,0 +1,44 @@
+; RUN: llc < %s -march=x86 -mcpu=core2 -o %t
+; RUN: grep shufp %t | count 1
+; RUN: grep movupd %t | count 1
+; RUN: grep pshufhw %t | count 1
+
+define void @test_v4sf(<4 x float>* %P, float %X, float %Y) nounwind {
+ %tmp = insertelement <4 x float> zeroinitializer, float %X, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp2 = insertelement <4 x float> %tmp, float %X, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp4 = insertelement <4 x float> %tmp2, float %Y, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp6 = insertelement <4 x float> %tmp4, float %Y, i32 3 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp6, <4 x float>* %P
+ ret void
+}
+
+define void @test_v2sd(<2 x double>* %P, double %X, double %Y) nounwind {
+ %tmp = insertelement <2 x double> zeroinitializer, double %X, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp2 = insertelement <2 x double> %tmp, double %Y, i32 1 ; <<2 x double>> [#uses=1]
+ store <2 x double> %tmp2, <2 x double>* %P
+ ret void
+}
+
+define void @test_v8i16(<2 x i64>* %res, <2 x i64>* %A) nounwind {
+ %tmp = load <2 x i64>* %A ; <<2 x i64>> [#uses=1]
+ %tmp.upgrd.1 = bitcast <2 x i64> %tmp to <8 x i16> ; <<8 x i16>> [#uses=8]
+ %tmp.upgrd.2 = extractelement <8 x i16> %tmp.upgrd.1, i32 0 ; <i16> [#uses=1]
+ %tmp1 = extractelement <8 x i16> %tmp.upgrd.1, i32 1 ; <i16> [#uses=1]
+ %tmp2 = extractelement <8 x i16> %tmp.upgrd.1, i32 2 ; <i16> [#uses=1]
+ %tmp3 = extractelement <8 x i16> %tmp.upgrd.1, i32 3 ; <i16> [#uses=1]
+ %tmp4 = extractelement <8 x i16> %tmp.upgrd.1, i32 6 ; <i16> [#uses=1]
+ %tmp5 = extractelement <8 x i16> %tmp.upgrd.1, i32 5 ; <i16> [#uses=1]
+ %tmp6 = extractelement <8 x i16> %tmp.upgrd.1, i32 4 ; <i16> [#uses=1]
+ %tmp7 = extractelement <8 x i16> %tmp.upgrd.1, i32 7 ; <i16> [#uses=1]
+ %tmp8 = insertelement <8 x i16> undef, i16 %tmp.upgrd.2, i32 0 ; <<8 x i16>> [#uses=1]
+ %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 1 ; <<8 x i16>> [#uses=1]
+ %tmp10 = insertelement <8 x i16> %tmp9, i16 %tmp2, i32 2 ; <<8 x i16>> [#uses=1]
+ %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 3 ; <<8 x i16>> [#uses=1]
+ %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp4, i32 4 ; <<8 x i16>> [#uses=1]
+ %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 5 ; <<8 x i16>> [#uses=1]
+ %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp6, i32 6 ; <<8 x i16>> [#uses=1]
+ %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 7 ; <<8 x i16>> [#uses=1]
+ %tmp15.upgrd.3 = bitcast <8 x i16> %tmp15 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ store <2 x i64> %tmp15.upgrd.3, <2 x i64>* %res
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_splat-2.ll b/test/CodeGen/X86/vec_splat-2.ll
new file mode 100644
index 0000000..cde5ae9
--- /dev/null
+++ b/test/CodeGen/X86/vec_splat-2.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd | count 1
+
+define void @test(<2 x i64>* %P, i8 %x) nounwind {
+ %tmp = insertelement <16 x i8> zeroinitializer, i8 %x, i32 0 ; <<16 x i8>> [#uses=1]
+ %tmp36 = insertelement <16 x i8> %tmp, i8 %x, i32 1 ; <<16 x i8>> [#uses=1]
+ %tmp38 = insertelement <16 x i8> %tmp36, i8 %x, i32 2 ; <<16 x i8>> [#uses=1]
+ %tmp40 = insertelement <16 x i8> %tmp38, i8 %x, i32 3 ; <<16 x i8>> [#uses=1]
+ %tmp42 = insertelement <16 x i8> %tmp40, i8 %x, i32 4 ; <<16 x i8>> [#uses=1]
+ %tmp44 = insertelement <16 x i8> %tmp42, i8 %x, i32 5 ; <<16 x i8>> [#uses=1]
+ %tmp46 = insertelement <16 x i8> %tmp44, i8 %x, i32 6 ; <<16 x i8>> [#uses=1]
+ %tmp48 = insertelement <16 x i8> %tmp46, i8 %x, i32 7 ; <<16 x i8>> [#uses=1]
+ %tmp50 = insertelement <16 x i8> %tmp48, i8 %x, i32 8 ; <<16 x i8>> [#uses=1]
+ %tmp52 = insertelement <16 x i8> %tmp50, i8 %x, i32 9 ; <<16 x i8>> [#uses=1]
+ %tmp54 = insertelement <16 x i8> %tmp52, i8 %x, i32 10 ; <<16 x i8>> [#uses=1]
+ %tmp56 = insertelement <16 x i8> %tmp54, i8 %x, i32 11 ; <<16 x i8>> [#uses=1]
+ %tmp58 = insertelement <16 x i8> %tmp56, i8 %x, i32 12 ; <<16 x i8>> [#uses=1]
+ %tmp60 = insertelement <16 x i8> %tmp58, i8 %x, i32 13 ; <<16 x i8>> [#uses=1]
+ %tmp62 = insertelement <16 x i8> %tmp60, i8 %x, i32 14 ; <<16 x i8>> [#uses=1]
+ %tmp64 = insertelement <16 x i8> %tmp62, i8 %x, i32 15 ; <<16 x i8>> [#uses=1]
+ %tmp68 = load <2 x i64>* %P ; <<2 x i64>> [#uses=1]
+ %tmp71 = bitcast <2 x i64> %tmp68 to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %tmp73 = add <16 x i8> %tmp71, %tmp64 ; <<16 x i8>> [#uses=1]
+ %tmp73.upgrd.1 = bitcast <16 x i8> %tmp73 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ store <2 x i64> %tmp73.upgrd.1, <2 x i64>* %P
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_splat-3.ll b/test/CodeGen/X86/vec_splat-3.ll
new file mode 100644
index 0000000..649b85c
--- /dev/null
+++ b/test/CodeGen/X86/vec_splat-3.ll
@@ -0,0 +1,55 @@
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
+; RUN: grep punpcklwd %t | count 4
+; RUN: grep punpckhwd %t | count 4
+; RUN: grep "pshufd" %t | count 8
+
+; Splat test for v8i16
+; Should generate with pshufd with masks $0, $85, $170, $255 (each mask is used twice)
+define <8 x i16> @shuf_8i16_0(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp6
+}
+
+define <8 x i16> @shuf_8i16_1(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp6
+}
+
+define <8 x i16> @shuf_8i16_2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 undef , i32 undef >
+ ret <8 x i16> %tmp6
+}
+
+define <8 x i16> @shuf_8i16_3(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 3, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp6
+}
+
+define <8 x i16> @shuf_8i16_4(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 4, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp6
+}
+
+define <8 x i16> @shuf_8i16_5(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 5, i32 undef, i32 undef, i32 5, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp6
+}
+
+define <8 x i16> @shuf_8i16_6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 6, i32 6, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp6
+}
+
+
+define <8 x i16> @shuf_8i16_7(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 7, i32 undef, i32 undef, i32 7, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <8 x i16> %tmp6
+}
diff --git a/test/CodeGen/X86/vec_splat-4.ll b/test/CodeGen/X86/vec_splat-4.ll
new file mode 100644
index 0000000..d9941e6
--- /dev/null
+++ b/test/CodeGen/X86/vec_splat-4.ll
@@ -0,0 +1,104 @@
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
+; RUN: grep punpcklbw %t | count 16
+; RUN: grep punpckhbw %t | count 16
+; RUN: grep "pshufd" %t | count 16
+
+; Should generate with pshufd with masks $0, $85, $170, $255 (each mask is used 4 times)
+
+; Splat test for v16i8
+define <16 x i8 > @shuf_16i8_0(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 0, i32 0 , i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_1(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef, i32 undef, i32 undef, i32 undef >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_2(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 2 , i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_3(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 3, i32 undef, i32 undef, i32 3, i32 undef, i32 3, i32 3 , i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3 >
+ ret <16 x i8 > %tmp6
+}
+
+
+define <16 x i8 > @shuf_16i8_4(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 4, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 undef , i32 undef, i32 undef, i32 undef, i32 undef , i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_5(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 5, i32 undef, i32 undef, i32 5, i32 undef, i32 5, i32 5 , i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_6(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 6, i32 undef, i32 undef, i32 6, i32 undef, i32 6, i32 6 , i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_7(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 7, i32 undef, i32 undef, i32 7, i32 undef, i32 undef, i32 undef , i32 undef, i32 undef, i32 undef, i32 undef , i32 undef , i32 undef, i32 undef, i32 undef , i32 undef >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_8(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 8, i32 undef, i32 undef, i32 8, i32 undef, i32 8, i32 8 , i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_9(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 9, i32 undef, i32 undef, i32 9, i32 undef, i32 9, i32 9 , i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_10(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 10, i32 undef, i32 undef, i32 10, i32 undef, i32 10, i32 10 , i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_11(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 11, i32 undef, i32 undef, i32 11, i32 undef, i32 11, i32 11 , i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_12(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 12, i32 undef, i32 undef, i32 12, i32 undef, i32 12, i32 12 , i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_13(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 13, i32 undef, i32 undef, i32 13, i32 undef, i32 13, i32 13 , i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_14(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 14, i32 undef, i32 undef, i32 14, i32 undef, i32 14, i32 14 , i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14 >
+ ret <16 x i8 > %tmp6
+}
+
+define <16 x i8 > @shuf_16i8_15(<16 x i8 > %T0, <16 x i8 > %T1) nounwind readnone {
+entry:
+ %tmp6 = shufflevector <16 x i8 > %T0, <16 x i8 > %T1, <16 x i32> < i32 15, i32 undef, i32 undef, i32 15, i32 undef, i32 15, i32 15 , i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15 >
+ ret <16 x i8 > %tmp6
+}
diff --git a/test/CodeGen/X86/vec_splat.ll b/test/CodeGen/X86/vec_splat.ll
new file mode 100644
index 0000000..a87fbd0
--- /dev/null
+++ b/test/CodeGen/X86/vec_splat.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd
+; RUN: llc < %s -march=x86 -mattr=+sse3 | grep movddup
+
+define void @test_v4sf(<4 x float>* %P, <4 x float>* %Q, float %X) nounwind {
+ %tmp = insertelement <4 x float> zeroinitializer, float %X, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp2 = insertelement <4 x float> %tmp, float %X, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp4 = insertelement <4 x float> %tmp2, float %X, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp6 = insertelement <4 x float> %tmp4, float %X, i32 3 ; <<4 x float>> [#uses=1]
+ %tmp8 = load <4 x float>* %Q ; <<4 x float>> [#uses=1]
+ %tmp10 = fmul <4 x float> %tmp8, %tmp6 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp10, <4 x float>* %P
+ ret void
+}
+
+define void @test_v2sd(<2 x double>* %P, <2 x double>* %Q, double %X) nounwind {
+ %tmp = insertelement <2 x double> zeroinitializer, double %X, i32 0 ; <<2 x double>> [#uses=1]
+ %tmp2 = insertelement <2 x double> %tmp, double %X, i32 1 ; <<2 x double>> [#uses=1]
+ %tmp4 = load <2 x double>* %Q ; <<2 x double>> [#uses=1]
+ %tmp6 = fmul <2 x double> %tmp4, %tmp2 ; <<2 x double>> [#uses=1]
+ store <2 x double> %tmp6, <2 x double>* %P
+ ret void
+}
diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll
new file mode 100644
index 0000000..b1613fb
--- /dev/null
+++ b/test/CodeGen/X86/vec_ss_load_fold.ll
@@ -0,0 +1,41 @@
+; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 -o %t
+; RUN: grep minss %t | grep CPI | count 2
+; RUN: grep CPI %t | not grep movss
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8.7.2"
+
+define i16 @test1(float %f) nounwind {
+ %tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
+ %tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
+ %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
+ %tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
+ %tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
+ ret i16 %tmp69
+}
+
+define i16 @test2(float %f) nounwind {
+ %tmp28 = fsub float %f, 1.000000e+00 ; <float> [#uses=1]
+ %tmp37 = fmul float %tmp28, 5.000000e-01 ; <float> [#uses=1]
+ %tmp375 = insertelement <4 x float> undef, float %tmp37, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
+ %tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
+ %tmp = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
+ %tmp69 = trunc i32 %tmp to i16 ; <i16> [#uses=1]
+ ret i16 %tmp69
+}
+
+declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
+
+declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
+
+declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
+
+declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
+
+declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
diff --git a/test/CodeGen/X86/vec_zero-2.ll b/test/CodeGen/X86/vec_zero-2.ll
new file mode 100644
index 0000000..cdb030e
--- /dev/null
+++ b/test/CodeGen/X86/vec_zero-2.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+define i32 @t() {
+entry:
+ br i1 true, label %bb4743, label %bb1656
+bb1656: ; preds = %entry
+ ret i32 0
+bb1664: ; preds = %entry
+ br i1 false, label %bb5310, label %bb4743
+bb4743: ; preds = %bb1664
+ %tmp5256 = bitcast <2 x i64> zeroinitializer to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp5257 = sub <8 x i16> %tmp5256, zeroinitializer ; <<8 x i16>> [#uses=1]
+ %tmp5258 = bitcast <8 x i16> %tmp5257 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp5265 = bitcast <2 x i64> %tmp5258 to <8 x i16> ; <<8 x i16>> [#uses=1]
+ %tmp5266 = call <16 x i8> @llvm.x86.sse2.packuswb.128( <8 x i16> %tmp5265, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
+ %tmp5267 = bitcast <16 x i8> %tmp5266 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp5294 = and <2 x i64> zeroinitializer, %tmp5267 ; <<2 x i64>> [#uses=1]
+ br label %bb5310
+bb5310: ; preds = %bb4743, %bb1664
+ %tmp5294.pn = phi <2 x i64> [ %tmp5294, %bb4743 ], [ zeroinitializer, %bb1664 ] ; <<2 x i64>> [#uses=0]
+ ret i32 0
+}
+
+declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) nounwind readnone
diff --git a/test/CodeGen/X86/vec_zero.ll b/test/CodeGen/X86/vec_zero.ll
new file mode 100644
index 0000000..ae5af58
--- /dev/null
+++ b/test/CodeGen/X86/vec_zero.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xorps | count 2
+
+define void @foo(<4 x float>* %P) {
+ %T = load <4 x float>* %P ; <<4 x float>> [#uses=1]
+ %S = fadd <4 x float> zeroinitializer, %T ; <<4 x float>> [#uses=1]
+ store <4 x float> %S, <4 x float>* %P
+ ret void
+}
+
+define void @bar(<4 x i32>* %P) {
+ %T = load <4 x i32>* %P ; <<4 x i32>> [#uses=1]
+ %S = add <4 x i32> zeroinitializer, %T ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %S, <4 x i32>* %P
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vec_zero_cse.ll b/test/CodeGen/X86/vec_zero_cse.ll
new file mode 100644
index 0000000..296378c
--- /dev/null
+++ b/test/CodeGen/X86/vec_zero_cse.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pxor | count 1
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep xorps | count 1
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 2
+
+@M1 = external global <1 x i64>
+@M2 = external global <2 x i32>
+
+@S1 = external global <2 x i64>
+@S2 = external global <4 x i32>
+
+define void @test() {
+ store <1 x i64> zeroinitializer, <1 x i64>* @M1
+ store <2 x i32> zeroinitializer, <2 x i32>* @M2
+ ret void
+}
+
+define void @test2() {
+ store <1 x i64> < i64 -1 >, <1 x i64>* @M1
+ store <2 x i32> < i32 -1, i32 -1 >, <2 x i32>* @M2
+ ret void
+}
+
+define void @test3() {
+ store <2 x i64> zeroinitializer, <2 x i64>* @S1
+ store <4 x i32> zeroinitializer, <4 x i32>* @S2
+ ret void
+}
+
+define void @test4() {
+ store <2 x i64> < i64 -1, i64 -1>, <2 x i64>* @S1
+ store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* @S2
+ ret void
+}
+
+
diff --git a/test/CodeGen/X86/vector-intrinsics.ll b/test/CodeGen/X86/vector-intrinsics.ll
new file mode 100644
index 0000000..edf58b9
--- /dev/null
+++ b/test/CodeGen/X86/vector-intrinsics.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=x86-64 | grep call | count 16
+
+declare <4 x double> @llvm.sin.v4f64(<4 x double> %p)
+declare <4 x double> @llvm.cos.v4f64(<4 x double> %p)
+declare <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q)
+declare <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32)
+
+define <4 x double> @foo(<4 x double> %p)
+{
+ %t = call <4 x double> @llvm.sin.v4f64(<4 x double> %p)
+ ret <4 x double> %t
+}
+define <4 x double> @goo(<4 x double> %p)
+{
+ %t = call <4 x double> @llvm.cos.v4f64(<4 x double> %p)
+ ret <4 x double> %t
+}
+define <4 x double> @moo(<4 x double> %p, <4 x double> %q)
+{
+ %t = call <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q)
+ ret <4 x double> %t
+}
+define <4 x double> @zoo(<4 x double> %p, i32 %q)
+{
+ %t = call <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32 %q)
+ ret <4 x double> %t
+}
diff --git a/test/CodeGen/X86/vector-rem.ll b/test/CodeGen/X86/vector-rem.ll
new file mode 100644
index 0000000..51cd872
--- /dev/null
+++ b/test/CodeGen/X86/vector-rem.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 | grep div | count 8
+; RUN: llc < %s -march=x86-64 | grep fmodf | count 4
+
+define <4 x i32> @foo(<4 x i32> %t, <4 x i32> %u) {
+ %m = srem <4 x i32> %t, %u
+ ret <4 x i32> %m
+}
+define <4 x i32> @bar(<4 x i32> %t, <4 x i32> %u) {
+ %m = urem <4 x i32> %t, %u
+ ret <4 x i32> %m
+}
+define <4 x float> @qux(<4 x float> %t, <4 x float> %u) {
+ %m = frem <4 x float> %t, %u
+ ret <4 x float> %m
+}
diff --git a/test/CodeGen/X86/vector-variable-idx.ll b/test/CodeGen/X86/vector-variable-idx.ll
new file mode 100644
index 0000000..2a4d18c
--- /dev/null
+++ b/test/CodeGen/X86/vector-variable-idx.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86-64 | grep movss | count 2
+; PR2676
+
+define float @foo(<4 x float> %p, i32 %t) {
+ %z = extractelement <4 x float> %p, i32 %t
+ ret float %z
+}
+define <4 x float> @bar(<4 x float> %p, float %f, i32 %t) {
+ %z = insertelement <4 x float> %p, float %f, i32 %t
+ ret <4 x float> %z
+}
diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll
new file mode 100644
index 0000000..3fff8497
--- /dev/null
+++ b/test/CodeGen/X86/vector.ll
@@ -0,0 +1,156 @@
+; Test that vectors are scalarized/lowered correctly.
+; RUN: llc < %s -march=x86 -mcpu=i386 > %t
+; RUN: llc < %s -march=x86 -mcpu=yonah > %t
+
+%d8 = type <8 x double>
+%f1 = type <1 x float>
+%f2 = type <2 x float>
+%f4 = type <4 x float>
+%f8 = type <8 x float>
+%i4 = type <4 x i32>
+
+
+;;; TEST HANDLING OF VARIOUS VECTOR SIZES
+
+define void @test_f1(%f1* %P, %f1* %Q, %f1* %S) {
+ %p = load %f1* %P ; <%f1> [#uses=1]
+ %q = load %f1* %Q ; <%f1> [#uses=1]
+ %R = fadd %f1 %p, %q ; <%f1> [#uses=1]
+ store %f1 %R, %f1* %S
+ ret void
+}
+
+define void @test_f2(%f2* %P, %f2* %Q, %f2* %S) {
+ %p = load %f2* %P ; <%f2> [#uses=1]
+ %q = load %f2* %Q ; <%f2> [#uses=1]
+ %R = fadd %f2 %p, %q ; <%f2> [#uses=1]
+ store %f2 %R, %f2* %S
+ ret void
+}
+
+define void @test_f4(%f4* %P, %f4* %Q, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %q = load %f4* %Q ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, %q ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+define void @test_div(%f8* %P, %f8* %Q, %f8* %S) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %q = load %f8* %Q ; <%f8> [#uses=1]
+ %R = fdiv %f8 %p, %q ; <%f8> [#uses=1]
+ store %f8 %R, %f8* %S
+ ret void
+}
+
+;;; TEST VECTOR CONSTRUCTS
+
+define void @test_cst(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float 2.000000e+00, float 4.500000e+00 > ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_zero(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, zeroinitializer ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_undef(%f4* %P, %f4* %S) {
+ %p = load %f4* %P ; <%f4> [#uses=1]
+ %R = fadd %f4 %p, undef ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_constant_insert(%f4* %S) {
+ %R = insertelement %f4 zeroinitializer, float 1.000000e+01, i32 0 ; <%f4> [#uses
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_variable_buildvector(float %F, %f4* %S) {
+ %R = insertelement %f4 zeroinitializer, float %F, i32 0 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define void @test_scalar_to_vector(float %F, %f4* %S) {
+ %R = insertelement %f4 undef, float %F, i32 0 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %S
+ ret void
+}
+
+define float @test_extract_elt(%f8* %P) {
+ %p = load %f8* %P ; <%f8> [#uses=1]
+ %R = extractelement %f8 %p, i32 3 ; <float> [#uses=1]
+ ret float %R
+}
+
+define double @test_extract_elt2(%d8* %P) {
+ %p = load %d8* %P ; <%d8> [#uses=1]
+ %R = extractelement %d8 %p, i32 3 ; <double> [#uses=1]
+ ret double %R
+}
+
+define void @test_cast_1(%f4* %b, %i4* %a) {
+ %tmp = load %f4* %b ; <%f4> [#uses=1]
+ %tmp2 = fadd %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 > ; <%f4> [#uses=1]
+ %tmp3 = bitcast %f4 %tmp2 to %i4 ; <%i4> [#uses=1]
+ %tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 > ; <%i4> [#uses=1]
+ store %i4 %tmp4, %i4* %a
+ ret void
+}
+
+define void @test_cast_2(%f8* %a, <8 x i32>* %b) {
+ %T = load %f8* %a ; <%f8> [#uses=1]
+ %T2 = bitcast %f8 %T to <8 x i32> ; <<8 x i32>> [#uses=1]
+ store <8 x i32> %T2, <8 x i32>* %b
+ ret void
+}
+
+
+;;; TEST IMPORTANT IDIOMS
+
+define void @splat(%f4* %P, %f4* %Q, float %X) {
+ %tmp = insertelement %f4 undef, float %X, i32 0 ; <%f4> [#uses=1]
+ %tmp2 = insertelement %f4 %tmp, float %X, i32 1 ; <%f4> [#uses=1]
+ %tmp4 = insertelement %f4 %tmp2, float %X, i32 2 ; <%f4> [#uses=1]
+ %tmp6 = insertelement %f4 %tmp4, float %X, i32 3 ; <%f4> [#uses=1]
+ %q = load %f4* %Q ; <%f4> [#uses=1]
+ %R = fadd %f4 %q, %tmp6 ; <%f4> [#uses=1]
+ store %f4 %R, %f4* %P
+ ret void
+}
+
+define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) {
+ %tmp = insertelement %i4 undef, i32 %X, i32 0 ; <%i4> [#uses=1]
+ %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 ; <%i4> [#uses=1]
+ %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 ; <%i4> [#uses=1]
+ %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1]
+ %q = load %i4* %Q ; <%i4> [#uses=1]
+ %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1]
+ store %i4 %R, %i4* %P
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vfcmp.ll b/test/CodeGen/X86/vfcmp.ll
new file mode 100644
index 0000000..f5f5293
--- /dev/null
+++ b/test/CodeGen/X86/vfcmp.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; PR2620
+
+
+define void @t2(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
+ %A = fcmp olt <2 x double> zeroinitializer, zeroinitializer ; <<2 x i64>>:1 [#uses=1]
+ sext <2 x i1> %A to <2 x i64>
+ extractelement <2 x i64> %1, i32 1 ; <i64>:2 [#uses=1]
+ lshr i64 %2, 63 ; <i64>:3 [#uses=1]
+ trunc i64 %3 to i1 ; <i1>:4 [#uses=1]
+ zext i1 %4 to i8 ; <i8>:5 [#uses=1]
+ insertelement <2 x i8> zeroinitializer, i8 %5, i32 1 ; <<2 x i8>>:6 [#uses=1]
+ store <2 x i8> %6, <2 x i8>* null
+ ret void
+}
diff --git a/test/CodeGen/X86/volatile.ll b/test/CodeGen/X86/volatile.ll
new file mode 100644
index 0000000..5e1e0c8
--- /dev/null
+++ b/test/CodeGen/X86/volatile.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -mattr=sse2 | grep movsd | count 5
+; RUN: llc < %s -march=x86 -mattr=sse2 -O0 | grep movsd | count 5
+
+@x = external global double
+
+define void @foo() nounwind {
+ %a = volatile load double* @x
+ volatile store double 0.0, double* @x
+ volatile store double 0.0, double* @x
+ %b = volatile load double* @x
+ ret void
+}
+
+define void @bar() nounwind {
+ %c = volatile load double* @x
+ ret void
+}
diff --git a/test/CodeGen/X86/vortex-bug.ll b/test/CodeGen/X86/vortex-bug.ll
new file mode 100644
index 0000000..40f1117
--- /dev/null
+++ b/test/CodeGen/X86/vortex-bug.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=x86-64
+
+ %struct.blktkntype = type { i32, i32 }
+ %struct.fieldstruc = type { [128 x i8], %struct.blktkntype*, i32, i32 }
+
+define fastcc i32 @Env_GetFieldStruc(i8* %FieldName, i32* %Status, %struct.fieldstruc* %FieldStruc) nounwind {
+entry:
+ br label %bb137.i
+
+bb137.i: ; preds = %bb137.i, %entry
+ %FieldName_addr.0209.rec.i = phi i64 [ %tmp139.rec.i, %bb137.i ], [ 0, %entry ] ; <i64> [#uses=1]
+ %tmp147213.i = phi i32 [ %tmp147.i, %bb137.i ], [ 1, %entry ] ; <i32> [#uses=2]
+ %tmp139.rec.i = add i64 %FieldName_addr.0209.rec.i, 1 ; <i64> [#uses=2]
+ %tmp141142.i = sext i32 %tmp147213.i to i64 ; <i64> [#uses=0]
+ %tmp147.i = add i32 %tmp147213.i, 1 ; <i32> [#uses=1]
+ br i1 false, label %bb137.i, label %bb149.i.loopexit
+
+bb149.i.loopexit: ; preds = %bb137.i
+ %tmp139.i = getelementptr i8* %FieldName, i64 %tmp139.rec.i ; <i8*> [#uses=0]
+ unreachable
+}
diff --git a/test/CodeGen/X86/vshift-1.ll b/test/CodeGen/X86/vshift-1.ll
new file mode 100644
index 0000000..ae845e0
--- /dev/null
+++ b/test/CodeGen/X86/vshift-1.ll
@@ -0,0 +1,79 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+
+; test vector shifts converted to proper SSE2 vector shifts when the shift
+; amounts are the same.
+
+define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
+entry:
+; CHECK: shift1a:
+; CHECK: psllq
+ %shl = shl <2 x i64> %val, < i64 32, i64 32 >
+ store <2 x i64> %shl, <2 x i64>* %dst
+ ret void
+}
+
+define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
+entry:
+; CHECK: shift1b:
+; CHECK: movd
+; CHECK-NEXT: psllq
+ %0 = insertelement <2 x i64> undef, i64 %amt, i32 0
+ %1 = insertelement <2 x i64> %0, i64 %amt, i32 1
+ %shl = shl <2 x i64> %val, %1
+ store <2 x i64> %shl, <2 x i64>* %dst
+ ret void
+}
+
+
+define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
+entry:
+; CHECK: shift2a:
+; CHECK: pslld
+ %shl = shl <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >
+ store <4 x i32> %shl, <4 x i32>* %dst
+ ret void
+}
+
+define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
+entry:
+; CHECK: shift2b:
+; CHECK: movd
+; CHECK-NEXT: pslld
+ %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
+ %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
+ %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
+ %3 = insertelement <4 x i32> %2, i32 %amt, i32 3
+ %shl = shl <4 x i32> %val, %3
+ store <4 x i32> %shl, <4 x i32>* %dst
+ ret void
+}
+
+define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
+entry:
+; CHECK: shift3a:
+; CHECK: psllw
+ %shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
+ store <8 x i16> %shl, <8 x i16>* %dst
+ ret void
+}
+
+; Make sure the shift amount is properly zero extended.
+define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
+entry:
+; CHECK: shift3b:
+; CHECK: movzwl
+; CHECK: movd
+; CHECK-NEXT: psllw
+ %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
+ %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
+ %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
+ %3 = insertelement <8 x i16> %0, i16 %amt, i32 3
+ %4 = insertelement <8 x i16> %0, i16 %amt, i32 4
+ %5 = insertelement <8 x i16> %0, i16 %amt, i32 5
+ %6 = insertelement <8 x i16> %0, i16 %amt, i32 6
+ %7 = insertelement <8 x i16> %0, i16 %amt, i32 7
+ %shl = shl <8 x i16> %val, %7
+ store <8 x i16> %shl, <8 x i16>* %dst
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vshift-2.ll b/test/CodeGen/X86/vshift-2.ll
new file mode 100644
index 0000000..36feb11
--- /dev/null
+++ b/test/CodeGen/X86/vshift-2.ll
@@ -0,0 +1,78 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+
+; test vector shifts converted to proper SSE2 vector shifts when the shift
+; amounts are the same.
+
+define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
+entry:
+; CHECK: shift1a:
+; CHECK: psrlq
+ %lshr = lshr <2 x i64> %val, < i64 32, i64 32 >
+ store <2 x i64> %lshr, <2 x i64>* %dst
+ ret void
+}
+
+define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
+entry:
+; CHECK: shift1b:
+; CHECK: movd
+; CHECK-NEXT: psrlq
+ %0 = insertelement <2 x i64> undef, i64 %amt, i32 0
+ %1 = insertelement <2 x i64> %0, i64 %amt, i32 1
+ %lshr = lshr <2 x i64> %val, %1
+ store <2 x i64> %lshr, <2 x i64>* %dst
+ ret void
+}
+
+define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
+entry:
+; CHECK: shift2a:
+; CHECK: psrld
+ %lshr = lshr <4 x i32> %val, < i32 17, i32 17, i32 17, i32 17 >
+ store <4 x i32> %lshr, <4 x i32>* %dst
+ ret void
+}
+
+define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
+entry:
+; CHECK: shift2b:
+; CHECK: movd
+; CHECK-NEXT: psrld
+ %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
+ %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
+ %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
+ %3 = insertelement <4 x i32> %2, i32 %amt, i32 3
+ %lshr = lshr <4 x i32> %val, %3
+ store <4 x i32> %lshr, <4 x i32>* %dst
+ ret void
+}
+
+
+define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
+entry:
+; CHECK: shift3a:
+; CHECK: psrlw
+ %lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
+ store <8 x i16> %lshr, <8 x i16>* %dst
+ ret void
+}
+
+; properly zero extend the shift amount
+define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
+entry:
+; CHECK: shift3b:
+; CHECK: movzwl
+; CHECK: movd
+; CHECK-NEXT: psrlw
+ %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
+ %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
+ %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
+ %3 = insertelement <8 x i16> %0, i16 %amt, i32 3
+ %4 = insertelement <8 x i16> %0, i16 %amt, i32 4
+ %5 = insertelement <8 x i16> %0, i16 %amt, i32 5
+ %6 = insertelement <8 x i16> %0, i16 %amt, i32 6
+ %7 = insertelement <8 x i16> %0, i16 %amt, i32 7
+ %lshr = lshr <8 x i16> %val, %7
+ store <8 x i16> %lshr, <8 x i16>* %dst
+ ret void
+}
diff --git a/test/CodeGen/X86/vshift-3.ll b/test/CodeGen/X86/vshift-3.ll
new file mode 100644
index 0000000..20d3f48
--- /dev/null
+++ b/test/CodeGen/X86/vshift-3.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+
+; test vector shifts converted to proper SSE2 vector shifts when the shift
+; amounts are the same.
+
+; Note that x86 does have ashr
+
+; shift1a can't use a packed shift
+define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
+entry:
+; CHECK: shift1a:
+; CHECK: sarl
+ %ashr = ashr <2 x i64> %val, < i64 32, i64 32 >
+ store <2 x i64> %ashr, <2 x i64>* %dst
+ ret void
+}
+
+define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
+entry:
+; CHECK: shift2a:
+; CHECK: psrad $5
+ %ashr = ashr <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >
+ store <4 x i32> %ashr, <4 x i32>* %dst
+ ret void
+}
+
+define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
+entry:
+; CHECK: shift2b:
+; CHECK: movd
+; CHECK-NEXT: psrad
+ %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
+ %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
+ %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
+ %3 = insertelement <4 x i32> %2, i32 %amt, i32 3
+ %ashr = ashr <4 x i32> %val, %3
+ store <4 x i32> %ashr, <4 x i32>* %dst
+ ret void
+}
+
+define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
+entry:
+; CHECK: shift3a:
+; CHECK: psraw $5
+ %ashr = ashr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
+ store <8 x i16> %ashr, <8 x i16>* %dst
+ ret void
+}
+
+define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
+entry:
+; CHECK: shift3b:
+; CHECK: movzwl
+; CHECK: movd
+; CHECK-NEXT: psraw
+ %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
+ %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
+ %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
+ %3 = insertelement <8 x i16> %0, i16 %amt, i32 3
+ %4 = insertelement <8 x i16> %0, i16 %amt, i32 4
+ %5 = insertelement <8 x i16> %0, i16 %amt, i32 5
+ %6 = insertelement <8 x i16> %0, i16 %amt, i32 6
+ %7 = insertelement <8 x i16> %0, i16 %amt, i32 7
+ %ashr = ashr <8 x i16> %val, %7
+ store <8 x i16> %ashr, <8 x i16>* %dst
+ ret void
+}
diff --git a/test/CodeGen/X86/vshift-4.ll b/test/CodeGen/X86/vshift-4.ll
new file mode 100644
index 0000000..9773cbe
--- /dev/null
+++ b/test/CodeGen/X86/vshift-4.ll
@@ -0,0 +1,85 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+
+; test vector shifts converted to proper SSE2 vector shifts when the shift
+; amounts are the same when using a shuffle splat.
+
+define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
+entry:
+; CHECK: shift1a:
+; CHECK: psllq
+ %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
+ %shl = shl <2 x i64> %val, %shamt
+ store <2 x i64> %shl, <2 x i64>* %dst
+ ret void
+}
+
+; shift1b can't use a packed shift
+define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
+entry:
+; CHECK: shift1b:
+; CHECK: shll
+ %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1>
+ %shl = shl <2 x i64> %val, %shamt
+ store <2 x i64> %shl, <2 x i64>* %dst
+ ret void
+}
+
+define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
+entry:
+; CHECK: shift2a:
+; CHECK: pslld
+ %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
+ %shl = shl <4 x i32> %val, %shamt
+ store <4 x i32> %shl, <4 x i32>* %dst
+ ret void
+}
+
+define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
+entry:
+; CHECK: shift2b:
+; CHECK: pslld
+ %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1>
+ %shl = shl <4 x i32> %val, %shamt
+ store <4 x i32> %shl, <4 x i32>* %dst
+ ret void
+}
+
+define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
+entry:
+; CHECK: shift2c:
+; CHECK: pslld
+ %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
+ %shl = shl <4 x i32> %val, %shamt
+ store <4 x i32> %shl, <4 x i32>* %dst
+ ret void
+}
+
+define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind {
+entry:
+; CHECK: shift3a:
+; CHECK: movzwl
+; CHECK: psllw
+ %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
+ %shl = shl <8 x i16> %val, %shamt
+ store <8 x i16> %shl, <8 x i16>* %dst
+ ret void
+}
+
+define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
+entry:
+; CHECK: shift3b:
+; CHECK: movzwl
+; CHECK: psllw
+ %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
+ %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
+ %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
+ %3 = insertelement <8 x i16> %0, i16 %amt, i32 3
+ %4 = insertelement <8 x i16> %0, i16 %amt, i32 4
+ %5 = insertelement <8 x i16> %0, i16 %amt, i32 5
+ %6 = insertelement <8 x i16> %0, i16 %amt, i32 6
+ %7 = insertelement <8 x i16> %0, i16 %amt, i32 7
+ %shl = shl <8 x i16> %val, %7
+ store <8 x i16> %shl, <8 x i16>* %dst
+ ret void
+}
+
diff --git a/test/CodeGen/X86/vshift-5.ll b/test/CodeGen/X86/vshift-5.ll
new file mode 100644
index 0000000..a543f38
--- /dev/null
+++ b/test/CodeGen/X86/vshift-5.ll
@@ -0,0 +1,56 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+
+; When loading the shift amount from memory, avoid generating the splat.
+
+define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
+entry:
+; CHECK: shift5a:
+; CHECK: movd
+; CHECK-NEXT: pslld
+ %amt = load i32* %pamt
+ %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
+ %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
+ %shl = shl <4 x i32> %val, %shamt
+ store <4 x i32> %shl, <4 x i32>* %dst
+ ret void
+}
+
+
+define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
+entry:
+; CHECK: shift5b:
+; CHECK: movd
+; CHECK-NEXT: psrad
+ %amt = load i32* %pamt
+ %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
+ %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
+ %shr = ashr <4 x i32> %val, %shamt
+ store <4 x i32> %shr, <4 x i32>* %dst
+ ret void
+}
+
+
+define void @shift5c(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
+entry:
+; CHECK: shift5c:
+; CHECK: movd
+; CHECK-NEXT: pslld
+ %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
+ %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
+ %shl = shl <4 x i32> %val, %shamt
+ store <4 x i32> %shl, <4 x i32>* %dst
+ ret void
+}
+
+
+define void @shift5d(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
+entry:
+; CHECK: shift5d:
+; CHECK: movd
+; CHECK-NEXT: psrad
+ %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
+ %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
+ %shr = ashr <4 x i32> %val, %shamt
+ store <4 x i32> %shr, <4 x i32>* %dst
+ ret void
+}
diff --git a/test/CodeGen/X86/vshift_scalar.ll b/test/CodeGen/X86/vshift_scalar.ll
new file mode 100644
index 0000000..9dd8478
--- /dev/null
+++ b/test/CodeGen/X86/vshift_scalar.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s
+
+; Legalization test that requires scalarizing a vector.
+
+define void @update(<1 x i32> %val, <1 x i32>* %dst) nounwind {
+entry:
+ %shl = shl <1 x i32> %val, < i32 2>
+ %shr = ashr <1 x i32> %val, < i32 4>
+ store <1 x i32> %shr, <1 x i32>* %dst
+ ret void
+}
diff --git a/test/CodeGen/X86/vshift_split.ll b/test/CodeGen/X86/vshift_split.ll
new file mode 100644
index 0000000..359d36d
--- /dev/null
+++ b/test/CodeGen/X86/vshift_split.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2
+
+; Example that requires splitting and expanding a vector shift.
+define <2 x i64> @update(<2 x i64> %val) nounwind readnone {
+entry:
+ %shr = lshr <2 x i64> %val, < i64 2, i64 3 >
+ ret <2 x i64> %shr
+}
diff --git a/test/CodeGen/X86/vshift_split2.ll b/test/CodeGen/X86/vshift_split2.ll
new file mode 100644
index 0000000..0f8c2b8
--- /dev/null
+++ b/test/CodeGen/X86/vshift_split2.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mcpu=yonah
+
+; Legalization example that requires splitting a large vector into smaller pieces.
+
+define void @update(<8 x i32> %val, <8 x i32>* %dst) nounwind {
+entry:
+ %shl = shl <8 x i32> %val, < i32 2, i32 2, i32 2, i32 2, i32 4, i32 4, i32 4, i32 4 >
+ %shr = ashr <8 x i32> %val, < i32 2, i32 2, i32 2, i32 2, i32 4, i32 4, i32 4, i32 4 >
+ store <8 x i32> %shr, <8 x i32>* %dst
+ ret void
+}
diff --git a/test/CodeGen/X86/vsplit-and.ll b/test/CodeGen/X86/vsplit-and.ll
new file mode 100644
index 0000000..a247c6e
--- /dev/null
+++ b/test/CodeGen/X86/vsplit-and.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -march=x86 -disable-mmx | FileCheck %s
+
+
+define void @t(<2 x i64>* %dst, <2 x i64> %src1, <2 x i64> %src2) nounwind readonly {
+; CHECK: andb
+ %cmp1 = icmp ne <2 x i64> %src1, zeroinitializer
+ %cmp2 = icmp ne <2 x i64> %src2, zeroinitializer
+ %t1 = and <2 x i1> %cmp1, %cmp2
+ %t2 = sext <2 x i1> %t1 to <2 x i64>
+ store <2 x i64> %t2, <2 x i64>* %dst
+ ret void
+}
+
+define void @t2(<3 x i64>* %dst, <3 x i64> %src1, <3 x i64> %src2) nounwind readonly {
+; CHECK: andb
+ %cmp1 = icmp ne <3 x i64> %src1, zeroinitializer
+ %cmp2 = icmp ne <3 x i64> %src2, zeroinitializer
+ %t1 = and <3 x i1> %cmp1, %cmp2
+ %t2 = sext <3 x i1> %t1 to <3 x i64>
+ store <3 x i64> %t2, <3 x i64>* %dst
+ ret void
+}
diff --git a/test/CodeGen/X86/weak.ll b/test/CodeGen/X86/weak.ll
new file mode 100644
index 0000000..8590e8d
--- /dev/null
+++ b/test/CodeGen/X86/weak.ll
@@ -0,0 +1,4 @@
+; RUN: llc < %s -march=x86
+@a = extern_weak global i32 ; <i32*> [#uses=1]
+@b = global i32* @a ; <i32**> [#uses=0]
+
diff --git a/test/CodeGen/X86/wide-integer-fold.ll b/test/CodeGen/X86/wide-integer-fold.ll
new file mode 100644
index 0000000..b3b4d24
--- /dev/null
+++ b/test/CodeGen/X86/wide-integer-fold.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+; CHECK: movq $-65535, %rax
+
+; DAGCombiner should fold this to a simple constant.
+
+define i64 @foo(i192 %a) nounwind {
+ %t = or i192 %a, -22300404916163702203072254898040925442801665
+ %s = and i192 %t, -22300404916163702203072254898040929737768960
+ %u = lshr i192 %s, 128
+ %v = trunc i192 %u to i64
+ ret i64 %v
+}
diff --git a/test/CodeGen/X86/widen_arith-1.ll b/test/CodeGen/X86/widen_arith-1.ll
new file mode 100644
index 0000000..f8d0690
--- /dev/null
+++ b/test/CodeGen/X86/widen_arith-1.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+
+; Widen a v3i8 to v16i8 to use a vector add
+
+define void @update(<3 x i8>* %dst, <3 x i8>* %src, i32 %n) nounwind {
+entry:
+; CHECK-NOT: pextrw
+; CHECK: paddb
+; CHECK: pextrb
+ %dst.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2]
+ %src.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2]
+ %n.addr = alloca i32 ; <i32*> [#uses=2]
+ %i = alloca i32, align 4 ; <i32*> [#uses=6]
+ store <3 x i8>* %dst, <3 x i8>** %dst.addr
+ store <3 x i8>* %src, <3 x i8>** %src.addr
+ store i32 %n, i32* %n.addr
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %tmp1 = load i32* %n.addr ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp2 = load i32* %i ; <i32> [#uses=1]
+ %tmp3 = load <3 x i8>** %dst.addr ; <<3 x i8>*> [#uses=1]
+ %arrayidx = getelementptr <3 x i8>* %tmp3, i32 %tmp2 ; <<3 x i8>*> [#uses=1]
+ %tmp4 = load i32* %i ; <i32> [#uses=1]
+ %tmp5 = load <3 x i8>** %src.addr ; <<3 x i8>*> [#uses=1]
+ %arrayidx6 = getelementptr <3 x i8>* %tmp5, i32 %tmp4 ; <<3 x i8>*> [#uses=1]
+ %tmp7 = load <3 x i8>* %arrayidx6 ; <<3 x i8>> [#uses=1]
+ %add = add <3 x i8> %tmp7, < i8 1, i8 1, i8 1 > ; <<3 x i8>> [#uses=1]
+ store <3 x i8> %add, <3 x i8>* %arrayidx
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp8 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_arith-2.ll b/test/CodeGen/X86/widen_arith-2.ll
new file mode 100644
index 0000000..fdecaa3
--- /dev/null
+++ b/test/CodeGen/X86/widen_arith-2.ll
@@ -0,0 +1,59 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: paddb
+; CHECK: pand
+
+; widen v8i8 to v16i8 (checks even power of 2 widening with add & and)
+
+define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind {
+entry:
+ %dst_i.addr = alloca i64* ; <i64**> [#uses=2]
+ %src_i.addr = alloca i64* ; <i64**> [#uses=2]
+ %n.addr = alloca i32 ; <i32*> [#uses=2]
+ %i = alloca i32, align 4 ; <i32*> [#uses=8]
+ %dst = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
+ %src = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
+ store i64* %dst_i, i64** %dst_i.addr
+ store i64* %src_i, i64** %src_i.addr
+ store i32 %n, i32* %n.addr
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %tmp1 = load i32* %n.addr ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp2 = load i32* %i ; <i32> [#uses=1]
+ %tmp3 = load i64** %dst_i.addr ; <i64*> [#uses=1]
+ %arrayidx = getelementptr i64* %tmp3, i32 %tmp2 ; <i64*> [#uses=1]
+ %conv = bitcast i64* %arrayidx to <8 x i8>* ; <<8 x i8>*> [#uses=1]
+ store <8 x i8>* %conv, <8 x i8>** %dst
+ %tmp4 = load i32* %i ; <i32> [#uses=1]
+ %tmp5 = load i64** %src_i.addr ; <i64*> [#uses=1]
+ %arrayidx6 = getelementptr i64* %tmp5, i32 %tmp4 ; <i64*> [#uses=1]
+ %conv7 = bitcast i64* %arrayidx6 to <8 x i8>* ; <<8 x i8>*> [#uses=1]
+ store <8 x i8>* %conv7, <8 x i8>** %src
+ %tmp8 = load i32* %i ; <i32> [#uses=1]
+ %tmp9 = load <8 x i8>** %dst ; <<8 x i8>*> [#uses=1]
+ %arrayidx10 = getelementptr <8 x i8>* %tmp9, i32 %tmp8 ; <<8 x i8>*> [#uses=1]
+ %tmp11 = load i32* %i ; <i32> [#uses=1]
+ %tmp12 = load <8 x i8>** %src ; <<8 x i8>*> [#uses=1]
+ %arrayidx13 = getelementptr <8 x i8>* %tmp12, i32 %tmp11 ; <<8 x i8>*> [#uses=1]
+ %tmp14 = load <8 x i8>* %arrayidx13 ; <<8 x i8>> [#uses=1]
+ %add = add <8 x i8> %tmp14, < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 > ; <<8 x i8>> [#uses=1]
+ %and = and <8 x i8> %add, < i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4 > ; <<8 x i8>> [#uses=1]
+ store <8 x i8> %and, <8 x i8>* %arrayidx10
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp15 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp15, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
+
diff --git a/test/CodeGen/X86/widen_arith-3.ll b/test/CodeGen/X86/widen_arith-3.ll
new file mode 100644
index 0000000..1f2c250
--- /dev/null
+++ b/test/CodeGen/X86/widen_arith-3.ll
@@ -0,0 +1,52 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -post-RA-scheduler=true | FileCheck %s
+; CHECK: paddw
+; CHECK: pextrw
+; CHECK: movd
+
+; Widen a v3i16 to v8i16 to do a vector add
+
[email protected] = internal constant [4 x i8] c"%d \00" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=1]
+
+define void @update(<3 x i16>* %dst, <3 x i16>* %src, i32 %n) nounwind {
+entry:
+ %dst.addr = alloca <3 x i16>* ; <<3 x i16>**> [#uses=2]
+ %src.addr = alloca <3 x i16>* ; <<3 x i16>**> [#uses=2]
+ %n.addr = alloca i32 ; <i32*> [#uses=2]
+ %v = alloca <3 x i16>, align 8 ; <<3 x i16>*> [#uses=1]
+ %i = alloca i32, align 4 ; <i32*> [#uses=6]
+ store <3 x i16>* %dst, <3 x i16>** %dst.addr
+ store <3 x i16>* %src, <3 x i16>** %src.addr
+ store i32 %n, i32* %n.addr
+ store <3 x i16> < i16 1, i16 1, i16 1 >, <3 x i16>* %v
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %tmp1 = load i32* %n.addr ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp2 = load i32* %i ; <i32> [#uses=1]
+ %tmp3 = load <3 x i16>** %dst.addr ; <<3 x i16>*> [#uses=1]
+ %arrayidx = getelementptr <3 x i16>* %tmp3, i32 %tmp2 ; <<3 x i16>*> [#uses=1]
+ %tmp4 = load i32* %i ; <i32> [#uses=1]
+ %tmp5 = load <3 x i16>** %src.addr ; <<3 x i16>*> [#uses=1]
+ %arrayidx6 = getelementptr <3 x i16>* %tmp5, i32 %tmp4 ; <<3 x i16>*> [#uses=1]
+ %tmp7 = load <3 x i16>* %arrayidx6 ; <<3 x i16>> [#uses=1]
+ %add = add <3 x i16> %tmp7, < i16 1, i16 1, i16 1 > ; <<3 x i16>> [#uses=1]
+ store <3 x i16> %add, <3 x i16>* %arrayidx
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp8 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
+
diff --git a/test/CodeGen/X86/widen_arith-4.ll b/test/CodeGen/X86/widen_arith-4.ll
new file mode 100644
index 0000000..f7506ae
--- /dev/null
+++ b/test/CodeGen/X86/widen_arith-4.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: psubw
+; CHECK-NEXT: pmullw
+
+; Widen a v5i16 to v8i16 to do a vector sub and multiple
+
+define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind {
+entry:
+ %dst.addr = alloca <5 x i16>* ; <<5 x i16>**> [#uses=2]
+ %src.addr = alloca <5 x i16>* ; <<5 x i16>**> [#uses=2]
+ %n.addr = alloca i32 ; <i32*> [#uses=2]
+ %v = alloca <5 x i16>, align 16 ; <<5 x i16>*> [#uses=1]
+ %i = alloca i32, align 4 ; <i32*> [#uses=6]
+ store <5 x i16>* %dst, <5 x i16>** %dst.addr
+ store <5 x i16>* %src, <5 x i16>** %src.addr
+ store i32 %n, i32* %n.addr
+ store <5 x i16> < i16 1, i16 1, i16 1, i16 0, i16 0 >, <5 x i16>* %v
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %tmp1 = load i32* %n.addr ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp2 = load i32* %i ; <i32> [#uses=1]
+ %tmp3 = load <5 x i16>** %dst.addr ; <<5 x i16>*> [#uses=1]
+ %arrayidx = getelementptr <5 x i16>* %tmp3, i32 %tmp2 ; <<5 x i16>*> [#uses=1]
+ %tmp4 = load i32* %i ; <i32> [#uses=1]
+ %tmp5 = load <5 x i16>** %src.addr ; <<5 x i16>*> [#uses=1]
+ %arrayidx6 = getelementptr <5 x i16>* %tmp5, i32 %tmp4 ; <<5 x i16>*> [#uses=1]
+ %tmp7 = load <5 x i16>* %arrayidx6 ; <<5 x i16>> [#uses=1]
+ %sub = sub <5 x i16> %tmp7, < i16 271, i16 271, i16 271, i16 271, i16 271 > ; <<5 x i16>> [#uses=1]
+ %mul = mul <5 x i16> %sub, < i16 2, i16 2, i16 2, i16 2, i16 2 > ; <<5 x i16>> [#uses=1]
+ store <5 x i16> %mul, <5 x i16>* %arrayidx
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp8 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
+
diff --git a/test/CodeGen/X86/widen_arith-5.ll b/test/CodeGen/X86/widen_arith-5.ll
new file mode 100644
index 0000000..f7f3408
--- /dev/null
+++ b/test/CodeGen/X86/widen_arith-5.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: movaps
+; CHECK: pmulld
+; CHECK: psubd
+
+; widen a v3i32 to v4i32 to do a vector multiple and a subtraction
+
+define void @update(<3 x i32>* %dst, <3 x i32>* %src, i32 %n) nounwind {
+entry:
+ %dst.addr = alloca <3 x i32>* ; <<3 x i32>**> [#uses=2]
+ %src.addr = alloca <3 x i32>* ; <<3 x i32>**> [#uses=2]
+ %n.addr = alloca i32 ; <i32*> [#uses=2]
+ %v = alloca <3 x i32>, align 16 ; <<3 x i32>*> [#uses=1]
+ %i = alloca i32, align 4 ; <i32*> [#uses=6]
+ store <3 x i32>* %dst, <3 x i32>** %dst.addr
+ store <3 x i32>* %src, <3 x i32>** %src.addr
+ store i32 %n, i32* %n.addr
+ store <3 x i32> < i32 1, i32 1, i32 1 >, <3 x i32>* %v
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %tmp1 = load i32* %n.addr ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp2 = load i32* %i ; <i32> [#uses=1]
+ %tmp3 = load <3 x i32>** %dst.addr ; <<3 x i32>*> [#uses=1]
+ %arrayidx = getelementptr <3 x i32>* %tmp3, i32 %tmp2 ; <<3 x i32>*> [#uses=1]
+ %tmp4 = load i32* %i ; <i32> [#uses=1]
+ %tmp5 = load <3 x i32>** %src.addr ; <<3 x i32>*> [#uses=1]
+ %arrayidx6 = getelementptr <3 x i32>* %tmp5, i32 %tmp4 ; <<3 x i32>*> [#uses=1]
+ %tmp7 = load <3 x i32>* %arrayidx6 ; <<3 x i32>> [#uses=1]
+ %mul = mul <3 x i32> %tmp7, < i32 4, i32 4, i32 4 > ; <<3 x i32>> [#uses=1]
+ %sub = sub <3 x i32> %mul, < i32 3, i32 3, i32 3 > ; <<3 x i32>> [#uses=1]
+ store <3 x i32> %sub, <3 x i32>* %arrayidx
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp8 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
+
diff --git a/test/CodeGen/X86/widen_arith-6.ll b/test/CodeGen/X86/widen_arith-6.ll
new file mode 100644
index 0000000..538123f
--- /dev/null
+++ b/test/CodeGen/X86/widen_arith-6.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: mulps
+; CHECK: addps
+
+; widen a v3f32 to vfi32 to do a vector multiple and an add
+
+define void @update(<3 x float>* %dst, <3 x float>* %src, i32 %n) nounwind {
+entry:
+ %dst.addr = alloca <3 x float>* ; <<3 x float>**> [#uses=2]
+ %src.addr = alloca <3 x float>* ; <<3 x float>**> [#uses=2]
+ %n.addr = alloca i32 ; <i32*> [#uses=2]
+ %v = alloca <3 x float>, align 16 ; <<3 x float>*> [#uses=2]
+ %i = alloca i32, align 4 ; <i32*> [#uses=6]
+ store <3 x float>* %dst, <3 x float>** %dst.addr
+ store <3 x float>* %src, <3 x float>** %src.addr
+ store i32 %n, i32* %n.addr
+ store <3 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00 >, <3 x float>* %v
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %tmp1 = load i32* %n.addr ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp2 = load i32* %i ; <i32> [#uses=1]
+ %tmp3 = load <3 x float>** %dst.addr ; <<3 x float>*> [#uses=1]
+ %arrayidx = getelementptr <3 x float>* %tmp3, i32 %tmp2 ; <<3 x float>*> [#uses=1]
+ %tmp4 = load i32* %i ; <i32> [#uses=1]
+ %tmp5 = load <3 x float>** %src.addr ; <<3 x float>*> [#uses=1]
+ %arrayidx6 = getelementptr <3 x float>* %tmp5, i32 %tmp4 ; <<3 x float>*> [#uses=1]
+ %tmp7 = load <3 x float>* %arrayidx6 ; <<3 x float>> [#uses=1]
+ %tmp8 = load <3 x float>* %v ; <<3 x float>> [#uses=1]
+ %mul = fmul <3 x float> %tmp7, %tmp8 ; <<3 x float>> [#uses=1]
+ %add = fadd <3 x float> %mul, < float 0x409EE02900000000, float 0x409EE02900000000, float 0x409EE02900000000 > ; <<3 x float>> [#uses=1]
+ store <3 x float> %add, <3 x float>* %arrayidx
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp9 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp9, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_cast-1.ll b/test/CodeGen/X86/widen_cast-1.ll
new file mode 100644
index 0000000..d4ab174ae
--- /dev/null
+++ b/test/CodeGen/X86/widen_cast-1.ll
@@ -0,0 +1,44 @@
+; RUN: llc -march=x86 -mattr=+sse42 < %s -disable-mmx | FileCheck %s
+; CHECK: paddw
+; CHECK: pextrd
+; CHECK: movd
+
+; bitcast a v4i16 to v2i32
+
+define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {
+entry:
+ %dst.addr = alloca <2 x i32>* ; <<2 x i32>**> [#uses=2]
+ %src.addr = alloca <4 x i16>* ; <<4 x i16>**> [#uses=2]
+ %i = alloca i32, align 4 ; <i32*> [#uses=6]
+ store <2 x i32>* %dst, <2 x i32>** %dst.addr
+ store <4 x i16>* %src, <4 x i16>** %src.addr
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, 4 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp1 = load i32* %i ; <i32> [#uses=1]
+ %tmp2 = load <2 x i32>** %dst.addr ; <<2 x i32>*> [#uses=1]
+ %arrayidx = getelementptr <2 x i32>* %tmp2, i32 %tmp1 ; <<2 x i32>*> [#uses=1]
+ %tmp3 = load i32* %i ; <i32> [#uses=1]
+ %tmp4 = load <4 x i16>** %src.addr ; <<4 x i16>*> [#uses=1]
+ %arrayidx5 = getelementptr <4 x i16>* %tmp4, i32 %tmp3 ; <<4 x i16>*> [#uses=1]
+ %tmp6 = load <4 x i16>* %arrayidx5 ; <<4 x i16>> [#uses=1]
+ %add = add <4 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1 > ; <<4 x i16>> [#uses=1]
+ %conv = bitcast <4 x i16> %add to <2 x i32> ; <<2 x i32>> [#uses=1]
+ store <2 x i32> %conv, <2 x i32>* %arrayidx
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp7 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp7, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_cast-2.ll b/test/CodeGen/X86/widen_cast-2.ll
new file mode 100644
index 0000000..1e626a2
--- /dev/null
+++ b/test/CodeGen/X86/widen_cast-2.ll
@@ -0,0 +1,46 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: pextrd
+; CHECK: pextrd
+; CHECK: movd
+; CHECK: movaps
+
+
+; bitcast v14i16 to v7i32
+
+define void @convert(<7 x i32>* %dst, <14 x i16>* %src) nounwind {
+entry:
+ %dst.addr = alloca <7 x i32>* ; <<7 x i32>**> [#uses=2]
+ %src.addr = alloca <14 x i16>* ; <<14 x i16>**> [#uses=2]
+ %i = alloca i32, align 4 ; <i32*> [#uses=6]
+ store <7 x i32>* %dst, <7 x i32>** %dst.addr
+ store <14 x i16>* %src, <14 x i16>** %src.addr
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, 4 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp1 = load i32* %i ; <i32> [#uses=1]
+ %tmp2 = load <7 x i32>** %dst.addr ; <<2 x i32>*> [#uses=1]
+ %arrayidx = getelementptr <7 x i32>* %tmp2, i32 %tmp1 ; <<7 x i32>*> [#uses=1]
+ %tmp3 = load i32* %i ; <i32> [#uses=1]
+ %tmp4 = load <14 x i16>** %src.addr ; <<4 x i16>*> [#uses=1]
+ %arrayidx5 = getelementptr <14 x i16>* %tmp4, i32 %tmp3 ; <<4 x i16>*> [#uses=1]
+ %tmp6 = load <14 x i16>* %arrayidx5 ; <<4 x i16>> [#uses=1]
+ %add = add <14 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 > ; <<4 x i16>> [#uses=1]
+ %conv = bitcast <14 x i16> %add to <7 x i32> ; <<7 x i32>> [#uses=1]
+ store <7 x i32> %conv, <7 x i32>* %arrayidx
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp7 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp7, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_cast-3.ll b/test/CodeGen/X86/widen_cast-3.ll
new file mode 100644
index 0000000..02674dd
--- /dev/null
+++ b/test/CodeGen/X86/widen_cast-3.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: paddd
+; CHECK: pextrd
+; CHECK: pextrd
+
+; bitcast v12i8 to v3i32
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin10.0.0d2"
+
+define void @convert(<12 x i8>* %dst.addr, <3 x i32> %src) nounwind {
+entry:
+ %add = add <3 x i32> %src, < i32 1, i32 1, i32 1 > ; <<3 x i32>> [#uses=1]
+ %conv = bitcast <3 x i32> %add to <12 x i8> ; <<12 x i8>> [#uses=1]
+ store <12 x i8> %conv, <12 x i8>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_cast-4.ll b/test/CodeGen/X86/widen_cast-4.ll
new file mode 100644
index 0000000..5f31e56
--- /dev/null
+++ b/test/CodeGen/X86/widen_cast-4.ll
@@ -0,0 +1,67 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: sarb
+; CHECK: sarb
+; CHECK: sarb
+; CHECK: sarb
+; CHECK: sarb
+; CHECK: sarb
+; CHECK: sarb
+; CHECK: sarb
+
+; v8i8 that is widen to v16i8 then split
+; FIXME: This is widen to v16i8 and split to 16 and we then rebuild the vector.
+; Unfortunately, we don't split the store so we don't get the code we want.
+
+define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind {
+entry:
+ %dst_i.addr = alloca i64* ; <i64**> [#uses=2]
+ %src_i.addr = alloca i64* ; <i64**> [#uses=2]
+ %n.addr = alloca i32 ; <i32*> [#uses=2]
+ %i = alloca i32, align 4 ; <i32*> [#uses=8]
+ %dst = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
+ %src = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
+ store i64* %dst_i, i64** %dst_i.addr
+ store i64* %src_i, i64** %src_i.addr
+ store i32 %n, i32* %n.addr
+ store i32 0, i32* %i
+ br label %forcond
+
+forcond: ; preds = %forinc, %entry
+ %tmp = load i32* %i ; <i32> [#uses=1]
+ %tmp1 = load i32* %n.addr ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ %tmp2 = load i32* %i ; <i32> [#uses=1]
+ %tmp3 = load i64** %dst_i.addr ; <i64*> [#uses=1]
+ %arrayidx = getelementptr i64* %tmp3, i32 %tmp2 ; <i64*> [#uses=1]
+ %conv = bitcast i64* %arrayidx to <8 x i8>* ; <<8 x i8>*> [#uses=1]
+ store <8 x i8>* %conv, <8 x i8>** %dst
+ %tmp4 = load i32* %i ; <i32> [#uses=1]
+ %tmp5 = load i64** %src_i.addr ; <i64*> [#uses=1]
+ %arrayidx6 = getelementptr i64* %tmp5, i32 %tmp4 ; <i64*> [#uses=1]
+ %conv7 = bitcast i64* %arrayidx6 to <8 x i8>* ; <<8 x i8>*> [#uses=1]
+ store <8 x i8>* %conv7, <8 x i8>** %src
+ %tmp8 = load i32* %i ; <i32> [#uses=1]
+ %tmp9 = load <8 x i8>** %dst ; <<8 x i8>*> [#uses=1]
+ %arrayidx10 = getelementptr <8 x i8>* %tmp9, i32 %tmp8 ; <<8 x i8>*> [#uses=1]
+ %tmp11 = load i32* %i ; <i32> [#uses=1]
+ %tmp12 = load <8 x i8>** %src ; <<8 x i8>*> [#uses=1]
+ %arrayidx13 = getelementptr <8 x i8>* %tmp12, i32 %tmp11 ; <<8 x i8>*> [#uses=1]
+ %tmp14 = load <8 x i8>* %arrayidx13 ; <<8 x i8>> [#uses=1]
+ %add = add <8 x i8> %tmp14, < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 > ; <<8 x i8>> [#uses=1]
+ %shr = ashr <8 x i8> %add, < i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2 > ; <<8 x i8>> [#uses=1]
+ store <8 x i8> %shr, <8 x i8>* %arrayidx10
+ br label %forinc
+
+forinc: ; preds = %forbody
+ %tmp15 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp15, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %forcond
+
+afterfor: ; preds = %forcond
+ ret void
+}
+
diff --git a/test/CodeGen/X86/widen_cast-5.ll b/test/CodeGen/X86/widen_cast-5.ll
new file mode 100644
index 0000000..d1d7fec
--- /dev/null
+++ b/test/CodeGen/X86/widen_cast-5.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: movl
+; CHECK: movd
+
+; bitcast a i64 to v2i32
+
+define void @convert(<2 x i32>* %dst.addr, i64 %src) nounwind {
+entry:
+ %conv = bitcast i64 %src to <2 x i32>
+ %xor = xor <2 x i32> %conv, < i32 255, i32 32767 >
+ store <2 x i32> %xor, <2 x i32>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_cast-6.ll b/test/CodeGen/X86/widen_cast-6.ll
new file mode 100644
index 0000000..08759bf
--- /dev/null
+++ b/test/CodeGen/X86/widen_cast-6.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx | FileCheck %s
+; CHECK: movd
+
+; Test bit convert that requires widening in the operand.
+
+define i32 @return_v2hi() nounwind {
+entry:
+ %retval12 = bitcast <2 x i16> zeroinitializer to i32 ; <i32> [#uses=1]
+ ret i32 %retval12
+}
diff --git a/test/CodeGen/X86/widen_conv-1.ll b/test/CodeGen/X86/widen_conv-1.ll
new file mode 100644
index 0000000..a2029dd
--- /dev/null
+++ b/test/CodeGen/X86/widen_conv-1.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: pshufd
+; CHECK: paddd
+
+; truncate v2i64 to v2i32
+
+define void @convert(<2 x i32>* %dst.addr, <2 x i64> %src) nounwind {
+entry:
+ %val = trunc <2 x i64> %src to <2 x i32>
+ %add = add <2 x i32> %val, < i32 1, i32 1 >
+ store <2 x i32> %add, <2 x i32>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_conv-2.ll b/test/CodeGen/X86/widen_conv-2.ll
new file mode 100644
index 0000000..b24a9b3
--- /dev/null
+++ b/test/CodeGen/X86/widen_conv-2.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: movswl
+; CHECK: movswl
+
+; sign extension v2i32 to v2i16
+
+define void @convert(<2 x i32>* %dst.addr, <2 x i16> %src) nounwind {
+entry:
+ %signext = sext <2 x i16> %src to <2 x i32> ; <<12 x i8>> [#uses=1]
+ store <2 x i32> %signext, <2 x i32>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_conv-3.ll b/test/CodeGen/X86/widen_conv-3.ll
new file mode 100644
index 0000000..1a40800
--- /dev/null
+++ b/test/CodeGen/X86/widen_conv-3.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: cvtsi2ss
+
+; sign to float v2i16 to v2f32
+
+define void @convert(<2 x float>* %dst.addr, <2 x i16> %src) nounwind {
+entry:
+ %val = sitofp <2 x i16> %src to <2 x float>
+ store <2 x float> %val, <2 x float>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_conv-4.ll b/test/CodeGen/X86/widen_conv-4.ll
new file mode 100644
index 0000000..e505b62
--- /dev/null
+++ b/test/CodeGen/X86/widen_conv-4.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: cvtsi2ss
+
+; unsigned to float v7i16 to v7f32
+
+define void @convert(<7 x float>* %dst.addr, <7 x i16> %src) nounwind {
+entry:
+ %val = sitofp <7 x i16> %src to <7 x float>
+ store <7 x float> %val, <7 x float>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_extract-1.ll b/test/CodeGen/X86/widen_extract-1.ll
new file mode 100644
index 0000000..308e6b8
--- /dev/null
+++ b/test/CodeGen/X86/widen_extract-1.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s
+; widen extract subvector
+
+define void @convert(<2 x double>* %dst.addr, <3 x double> %src) {
+entry:
+; CHECK: convert:
+; CHECK: unpcklpd {{%xmm[0-7]}}, {{%xmm[0-7]}}
+; CHECK-NEXT: movapd
+ %val = shufflevector <3 x double> %src, <3 x double> undef, <2 x i32> < i32 0, i32 1>
+ store <2 x double> %val, <2 x double>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_load-0.ll b/test/CodeGen/X86/widen_load-0.ll
new file mode 100644
index 0000000..f6c4af0
--- /dev/null
+++ b/test/CodeGen/X86/widen_load-0.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -o - -march=x86-64 | FileCheck %s
+; PR4891
+
+; Both loads should happen before either store.
+
+; CHECK: movl (%rdi), %eax
+; CHECK: movl (%rsi), %ecx
+; CHECK: movl %ecx, (%rdi)
+; CHECK: movl %eax, (%rsi)
+
+define void @short2_int_swap(<2 x i16>* nocapture %b, i32* nocapture %c) nounwind {
+entry:
+ %0 = load <2 x i16>* %b, align 2 ; <<2 x i16>> [#uses=1]
+ %1 = load i32* %c, align 4 ; <i32> [#uses=1]
+ %tmp1 = bitcast i32 %1 to <2 x i16> ; <<2 x i16>> [#uses=1]
+ store <2 x i16> %tmp1, <2 x i16>* %b, align 2
+ %tmp5 = bitcast <2 x i16> %0 to <1 x i32> ; <<1 x i32>> [#uses=1]
+ %tmp3 = extractelement <1 x i32> %tmp5, i32 0 ; <i32> [#uses=1]
+ store i32 %tmp3, i32* %c, align 4
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_load-1.ll b/test/CodeGen/X86/widen_load-1.ll
new file mode 100644
index 0000000..d397645
--- /dev/null
+++ b/test/CodeGen/X86/widen_load-1.ll
@@ -0,0 +1,45 @@
+; RUN: llc %s -o - -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -disable-mmx | FileCheck %s
+; PR4891
+
+; This load should be before the call, not after.
+
+; CHECK: movaps compl+128(%rip), %xmm0
+; CHECK: movaps %xmm0, (%rsp)
+; CHECK: callq killcommon
+
+@compl = linkonce global [20 x i64] zeroinitializer, align 64 ; <[20 x i64]*> [#uses=1]
+
+declare void @killcommon(i32* noalias)
+
+define void @reset(<2 x float>* noalias %garbage1) {
+"file complex.c, line 27, bb1":
+ %changed = alloca i32, align 4 ; <i32*> [#uses=3]
+ br label %"file complex.c, line 27, bb13"
+
+"file complex.c, line 27, bb13": ; preds = %"file complex.c, line 27, bb1"
+ store i32 0, i32* %changed, align 4
+ %r2 = getelementptr float* bitcast ([20 x i64]* @compl to float*), i64 32 ; <float*> [#uses=1]
+ %r3 = bitcast float* %r2 to <2 x float>* ; <<2 x float>*> [#uses=1]
+ %r4 = load <2 x float>* %r3, align 4 ; <<2 x float>> [#uses=1]
+ call void @killcommon(i32* %changed)
+ br label %"file complex.c, line 34, bb4"
+
+"file complex.c, line 34, bb4": ; preds = %"file complex.c, line 27, bb13"
+ %r5 = load i32* %changed, align 4 ; <i32> [#uses=1]
+ %r6 = icmp eq i32 %r5, 0 ; <i1> [#uses=1]
+ %r7 = zext i1 %r6 to i32 ; <i32> [#uses=1]
+ %r8 = icmp ne i32 %r7, 0 ; <i1> [#uses=1]
+ br i1 %r8, label %"file complex.c, line 34, bb7", label %"file complex.c, line 27, bb5"
+
+"file complex.c, line 27, bb5": ; preds = %"file complex.c, line 34, bb4"
+ br label %"file complex.c, line 35, bb6"
+
+"file complex.c, line 35, bb6": ; preds = %"file complex.c, line 27, bb5"
+ %r11 = ptrtoint <2 x float>* %garbage1 to i64 ; <i64> [#uses=1]
+ %r12 = inttoptr i64 %r11 to <2 x float>* ; <<2 x float>*> [#uses=1]
+ store <2 x float> %r4, <2 x float>* %r12, align 4
+ br label %"file complex.c, line 34, bb7"
+
+"file complex.c, line 34, bb7": ; preds = %"file complex.c, line 35, bb6", %"file complex.c, line 34, bb4"
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_load-2.ll b/test/CodeGen/X86/widen_load-2.ll
new file mode 100644
index 0000000..11383fa
--- /dev/null
+++ b/test/CodeGen/X86/widen_load-2.ll
@@ -0,0 +1,155 @@
+; RUN: llc < %s -o - -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s
+
+; Test based on pr5626 to load/store
+;
+
+%i32vec3 = type <3 x i32>
+define void @add3i32(%i32vec3* sret %ret, %i32vec3* %ap, %i32vec3* %bp) {
+; CHECK: movaps
+; CHECK: paddd
+; CHECK: pextrd
+; CHECK: movq
+ %a = load %i32vec3* %ap, align 16
+ %b = load %i32vec3* %bp, align 16
+ %x = add %i32vec3 %a, %b
+ store %i32vec3 %x, %i32vec3* %ret, align 16
+ ret void
+}
+
+define void @add3i32_2(%i32vec3* sret %ret, %i32vec3* %ap, %i32vec3* %bp) {
+; CHECK: movq
+; CHECK: pinsrd
+; CHECK: movq
+; CHECK: pinsrd
+; CHECK: paddd
+; CHECK: pextrd
+; CHECK: movq
+ %a = load %i32vec3* %ap
+ %b = load %i32vec3* %bp
+ %x = add %i32vec3 %a, %b
+ store %i32vec3 %x, %i32vec3* %ret
+ ret void
+}
+
+%i32vec7 = type <7 x i32>
+define void @add7i32(%i32vec7* sret %ret, %i32vec7* %ap, %i32vec7* %bp) {
+; CHECK: movaps
+; CHECK: movaps
+; CHECK: paddd
+; CHECK: paddd
+; CHECK: pextrd
+; CHECK: movq
+; CHECK: movaps
+ %a = load %i32vec7* %ap, align 16
+ %b = load %i32vec7* %bp, align 16
+ %x = add %i32vec7 %a, %b
+ store %i32vec7 %x, %i32vec7* %ret, align 16
+ ret void
+}
+
+%i32vec12 = type <12 x i32>
+define void @add12i32(%i32vec12* sret %ret, %i32vec12* %ap, %i32vec12* %bp) {
+; CHECK: movaps
+; CHECK: movaps
+; CHECK: movaps
+; CHECK: paddd
+; CHECK: paddd
+; CHECK: paddd
+; CHECK: movaps
+; CHECK: movaps
+; CHECK: movaps
+ %a = load %i32vec12* %ap, align 16
+ %b = load %i32vec12* %bp, align 16
+ %x = add %i32vec12 %a, %b
+ store %i32vec12 %x, %i32vec12* %ret, align 16
+ ret void
+}
+
+
+%i16vec3 = type <3 x i16>
+define void @add3i16(%i16vec3* nocapture sret %ret, %i16vec3* %ap, %i16vec3* %bp) nounwind {
+; CHECK: movaps
+; CHECK: paddw
+; CHECK: movd
+; CHECK: pextrw
+ %a = load %i16vec3* %ap, align 16
+ %b = load %i16vec3* %bp, align 16
+ %x = add %i16vec3 %a, %b
+ store %i16vec3 %x, %i16vec3* %ret, align 16
+ ret void
+}
+
+%i16vec4 = type <4 x i16>
+define void @add4i16(%i16vec4* nocapture sret %ret, %i16vec4* %ap, %i16vec4* %bp) nounwind {
+; CHECK: movaps
+; CHECK: paddw
+; CHECK: movq
+ %a = load %i16vec4* %ap, align 16
+ %b = load %i16vec4* %bp, align 16
+ %x = add %i16vec4 %a, %b
+ store %i16vec4 %x, %i16vec4* %ret, align 16
+ ret void
+}
+
+%i16vec12 = type <12 x i16>
+define void @add12i16(%i16vec12* nocapture sret %ret, %i16vec12* %ap, %i16vec12* %bp) nounwind {
+; CHECK: movaps
+; CHECK: movaps
+; CHECK: paddw
+; CHECK: paddw
+; CHECK: movq
+; CHECK: movaps
+ %a = load %i16vec12* %ap, align 16
+ %b = load %i16vec12* %bp, align 16
+ %x = add %i16vec12 %a, %b
+ store %i16vec12 %x, %i16vec12* %ret, align 16
+ ret void
+}
+
+%i16vec18 = type <18 x i16>
+define void @add18i16(%i16vec18* nocapture sret %ret, %i16vec18* %ap, %i16vec18* %bp) nounwind {
+; CHECK: movaps
+; CHECK: movaps
+; CHECK: movaps
+; CHECK: paddw
+; CHECK: paddw
+; CHECK: paddw
+; CHECK: movd
+; CHECK: movaps
+; CHECK: movaps
+ %a = load %i16vec18* %ap, align 16
+ %b = load %i16vec18* %bp, align 16
+ %x = add %i16vec18 %a, %b
+ store %i16vec18 %x, %i16vec18* %ret, align 16
+ ret void
+}
+
+
+%i8vec3 = type <3 x i8>
+define void @add3i8(%i8vec3* nocapture sret %ret, %i8vec3* %ap, %i8vec3* %bp) nounwind {
+; CHECK: movaps
+; CHECK: paddb
+; CHECK: pextrb
+; CHECK: movb
+ %a = load %i8vec3* %ap, align 16
+ %b = load %i8vec3* %bp, align 16
+ %x = add %i8vec3 %a, %b
+ store %i8vec3 %x, %i8vec3* %ret, align 16
+ ret void
+}
+
+%i8vec31 = type <31 x i8>
+define void @add31i8(%i8vec31* nocapture sret %ret, %i8vec31* %ap, %i8vec31* %bp) nounwind {
+; CHECK: movaps
+; CHECK: movaps
+; CHECK: paddb
+; CHECK: paddb
+; CHECK: movq
+; CHECK: pextrb
+; CHECK: pextrw
+ %a = load %i8vec31* %ap, align 16
+ %b = load %i8vec31* %bp, align 16
+ %x = add %i8vec31 %a, %b
+ store %i8vec31 %x, %i8vec31* %ret, align 16
+ ret void
+}
\ No newline at end of file
diff --git a/test/CodeGen/X86/widen_select-1.ll b/test/CodeGen/X86/widen_select-1.ll
new file mode 100644
index 0000000..d9de892
--- /dev/null
+++ b/test/CodeGen/X86/widen_select-1.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: jne
+
+; widening select v6i32 and then a sub
+
+define void @select(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
+entry:
+ %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
+ %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
+ store <6 x i32> %val, <6 x i32>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_shuffle-1.ll b/test/CodeGen/X86/widen_shuffle-1.ll
new file mode 100644
index 0000000..47dba4b
--- /dev/null
+++ b/test/CodeGen/X86/widen_shuffle-1.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: insertps
+; CHECK: extractps
+
+; widening shuffle v3float and then a add
+
+define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
+entry:
+ %x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2>
+ %val = fadd <3 x float> %x, %src2
+ store <3 x float> %val, <3 x float>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/widen_shuffle-2.ll b/test/CodeGen/X86/widen_shuffle-2.ll
new file mode 100644
index 0000000..9374a02
--- /dev/null
+++ b/test/CodeGen/X86/widen_shuffle-2.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
+; CHECK: insertps
+; CHECK: extractps
+
+; widening shuffle v3float and then a add
+
+define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
+entry:
+ %x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2>
+ %val = fadd <3 x float> %x, %src2
+ store <3 x float> %val, <3 x float>* %dst.addr
+ ret void
+}
diff --git a/test/CodeGen/X86/x86-64-and-mask.ll b/test/CodeGen/X86/x86-64-and-mask.ll
new file mode 100644
index 0000000..2465f23
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-and-mask.ll
@@ -0,0 +1,49 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+
+; This should be a single mov, not a load of immediate + andq.
+; CHECK: test:
+; CHECK: movl %edi, %eax
+
+define i64 @test(i64 %x) nounwind {
+entry:
+ %tmp123 = and i64 %x, 4294967295 ; <i64> [#uses=1]
+ ret i64 %tmp123
+}
+
+; This copy can't be coalesced away because it needs the implicit zero-extend.
+; CHECK: bbb:
+; CHECK: movl %edi, %edi
+
+define void @bbb(i64 %x) nounwind {
+ %t = and i64 %x, 4294967295
+ call void @foo(i64 %t)
+ ret void
+}
+
+; This should use a 32-bit and with implicit zero-extension, not a 64-bit and
+; with a separate mov to materialize the mask.
+; rdar://7527390
+; CHECK: ccc:
+; CHECK: andl $-1048593, %edi
+
+declare void @foo(i64 %x) nounwind
+
+define void @ccc(i64 %x) nounwind {
+ %t = and i64 %x, 4293918703
+ call void @foo(i64 %t)
+ ret void
+}
+
+; This requires a mov and a 64-bit and.
+; CHECK: ddd:
+; CHECK: movabsq $4294967296, %rax
+; CHECK: andq %rax, %rdi
+
+define void @ddd(i64 %x) nounwind {
+ %t = and i64 %x, 4294967296
+ call void @foo(i64 %t)
+ ret void
+}
diff --git a/test/CodeGen/X86/x86-64-arg.ll b/test/CodeGen/X86/x86-64-arg.ll
new file mode 100644
index 0000000..ec8dd8e
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-arg.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s | grep {movl %edi, %eax}
+; The input value is already sign extended, don't re-extend it.
+; This testcase corresponds to:
+; int test(short X) { return (int)X; }
+
+target datalayout = "e-p:64:64"
+target triple = "x86_64-apple-darwin8"
+
+
+define i32 @test(i16 signext %X) {
+entry:
+ %tmp12 = sext i16 %X to i32 ; <i32> [#uses=1]
+ ret i32 %tmp12
+}
+
diff --git a/test/CodeGen/X86/x86-64-asm.ll b/test/CodeGen/X86/x86-64-asm.ll
new file mode 100644
index 0000000..2640e59
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-asm.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s
+; PR1029
+
+target datalayout = "e-p:64:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @frame_dummy() {
+entry:
+ %tmp1 = tail call void (i8*)* (void (i8*)*)* asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"( void (i8*)* null ) ; <void (i8*)*> [#uses=0]
+ ret void
+}
+
diff --git a/test/CodeGen/X86/x86-64-dead-stack-adjust.ll b/test/CodeGen/X86/x86-64-dead-stack-adjust.ll
new file mode 100644
index 0000000..79316f2
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-dead-stack-adjust.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s | not grep rsp
+; RUN: llc < %s | grep cvttsd2siq
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+
+define double @a(double %b) nounwind {
+entry:
+ %tmp12 = fptoui double %b to i32 ; <i32> [#uses=1]
+ %tmp123 = uitofp i32 %tmp12 to double ; <double> [#uses=1]
+ ret double %tmp123
+}
diff --git a/test/CodeGen/X86/x86-64-disp.ll b/test/CodeGen/X86/x86-64-disp.ll
new file mode 100644
index 0000000..d8059eb
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-disp.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=x86-64 | grep mov | count 2
+
+; Fold an offset into an address even if it's not a 32-bit
+; signed integer.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+@call_used_regs = external global [53 x i8], align 32
+
+define fastcc void @foo() nounwind {
+ %t = getelementptr [53 x i8]* @call_used_regs, i64 0, i64 4294967295
+ store i8 1, i8* %t, align 1
+ ret void
+}
diff --git a/test/CodeGen/X86/x86-64-frameaddr.ll b/test/CodeGen/X86/x86-64-frameaddr.ll
new file mode 100644
index 0000000..57163d3
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-frameaddr.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64 | grep movq | grep rbp
+
+define i64* @stack_end_address() nounwind {
+entry:
+ tail call i8* @llvm.frameaddress( i32 0 )
+ bitcast i8* %0 to i64*
+ ret i64* %1
+}
+
+declare i8* @llvm.frameaddress(i32) nounwind readnone
diff --git a/test/CodeGen/X86/x86-64-gv-offset.ll b/test/CodeGen/X86/x86-64-gv-offset.ll
new file mode 100644
index 0000000..365e4af
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-gv-offset.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep lea
+
+ %struct.x = type { float, double }
+@X = global %struct.x { float 1.000000e+00, double 2.000000e+00 }, align 16 ; <%struct.x*> [#uses=2]
+
+define i32 @main() nounwind {
+entry:
+ %tmp2 = load float* getelementptr (%struct.x* @X, i32 0, i32 0), align 16 ; <float> [#uses=1]
+ %tmp4 = load double* getelementptr (%struct.x* @X, i32 0, i32 1), align 8 ; <double> [#uses=1]
+ tail call void @t( float %tmp2, double %tmp4 ) nounwind
+ ret i32 0
+}
+
+declare void @t(float, double)
diff --git a/test/CodeGen/X86/x86-64-jumps.ll b/test/CodeGen/X86/x86-64-jumps.ll
new file mode 100644
index 0000000..11b40c8
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-jumps.ll
@@ -0,0 +1,45 @@
+; RUN: llc < %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+
+define i8 @test1() nounwind ssp {
+entry:
+ %0 = select i1 undef, i8* blockaddress(@test1, %bb), i8* blockaddress(@test1, %bb6) ; <i8*> [#uses=1]
+ indirectbr i8* %0, [label %bb, label %bb6]
+
+bb: ; preds = %entry
+ ret i8 1
+
+bb6: ; preds = %entry
+ ret i8 2
+}
+
+
+; PR5930 - Trunc of block address differences.
[email protected] = internal constant [3 x i32] [i32 trunc (i64 sub (i64 ptrtoint (i8* blockaddress(@test2, %foo) to i64), i64 ptrtoint (i8* blockaddress(@test2, %foo) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (i8* blockaddress(@test2, %bar) to i64), i64 ptrtoint (i8* blockaddress(@test2, %foo) to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (i8* blockaddress(@test2, %hack) to i64), i64 ptrtoint (i8* blockaddress(@test2, %foo) to i64)) to i32)] ; <[3 x i32]*> [#uses=1]
+
+define void @test2(i32 %i) nounwind ssp {
+entry:
+ %i.addr = alloca i32 ; <i32*> [#uses=2]
+ store i32 %i, i32* %i.addr
+ %tmp = load i32* %i.addr ; <i32> [#uses=1]
+ %idxprom = sext i32 %tmp to i64 ; <i64> [#uses=1]
+ %arrayidx = getelementptr inbounds i32* getelementptr inbounds ([3 x i32]* @test.array, i32 0, i32 0), i64 %idxprom ; <i32*> [#uses=1]
+ %tmp1 = load i32* %arrayidx ; <i32> [#uses=1]
+ %idx.ext = sext i32 %tmp1 to i64 ; <i64> [#uses=1]
+ %add.ptr = getelementptr i8* blockaddress(@test2, %foo), i64 %idx.ext ; <i8*> [#uses=1]
+ br label %indirectgoto
+
+foo: ; preds = %indirectgoto, %indirectgoto, %indirectgoto, %indirectgoto, %indirectgoto
+ br label %bar
+
+bar: ; preds = %foo, %indirectgoto
+ br label %hack
+
+hack: ; preds = %bar, %indirectgoto
+ ret void
+
+indirectgoto: ; preds = %entry
+ %indirect.goto.dest = phi i8* [ %add.ptr, %entry ] ; <i8*> [#uses=1]
+ indirectbr i8* %indirect.goto.dest, [label %foo, label %foo, label %bar, label %foo, label %hack, label %foo, label %foo]
+}
diff --git a/test/CodeGen/X86/x86-64-malloc.ll b/test/CodeGen/X86/x86-64-malloc.ll
new file mode 100644
index 0000000..b4f1fa6
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-malloc.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=x86-64 | grep {shll.*3, %edi}
+; PR3829
+; The generated code should multiply by 3 (sizeof i8*) as an i32,
+; not as an i64!
+
+define i8** @test(i32 %sz) {
+ %sub = add i32 %sz, 536870911 ; <i32> [#uses=1]
+ %call = malloc i8*, i32 %sub ; <i8**> [#uses=1]
+ ret i8** %call
+}
diff --git a/test/CodeGen/X86/x86-64-mem.ll b/test/CodeGen/X86/x86-64-mem.ll
new file mode 100644
index 0000000..d15f516
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-mem.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -o %t1
+; RUN: grep GOTPCREL %t1 | count 4
+; RUN: grep %%rip %t1 | count 6
+; RUN: grep movq %t1 | count 6
+; RUN: grep leaq %t1 | count 1
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=static -o %t2
+; RUN: grep movl %t2 | count 2
+; RUN: grep movq %t2 | count 2
+
+@ptr = external global i32* ; <i32**> [#uses=1]
+@src = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
+@dst = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
+@lptr = internal global i32* null ; <i32**> [#uses=1]
+@ldst = internal global [500 x i32] zeroinitializer, align 32 ; <[500 x i32]*> [#uses=1]
+@lsrc = internal global [500 x i32] zeroinitializer, align 32 ; <[500 x i32]*> [#uses=0]
+@bsrc = internal global [500000 x i32] zeroinitializer, align 32 ; <[500000 x i32]*> [#uses=0]
+@bdst = internal global [500000 x i32] zeroinitializer, align 32 ; <[500000 x i32]*> [#uses=0]
+
+define void @test1() nounwind {
+ %tmp = load i32* getelementptr ([0 x i32]* @src, i32 0, i32 0) ; <i32> [#uses=1]
+ store i32 %tmp, i32* getelementptr ([0 x i32]* @dst, i32 0, i32 0)
+ ret void
+}
+
+define void @test2() nounwind {
+ store i32* getelementptr ([0 x i32]* @dst, i32 0, i32 0), i32** @ptr
+ ret void
+}
+
+define void @test3() nounwind {
+ store i32* getelementptr ([500 x i32]* @ldst, i32 0, i32 0), i32** @lptr
+ br label %return
+
+return: ; preds = %0
+ ret void
+}
diff --git a/test/CodeGen/X86/x86-64-pic-1.ll b/test/CodeGen/X86/x86-64-pic-1.ll
new file mode 100644
index 0000000..46f6d33
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-1.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {callq f@PLT} %t1
+
+define void @g() {
+entry:
+ call void @f( )
+ ret void
+}
+
+declare void @f()
diff --git a/test/CodeGen/X86/x86-64-pic-10.ll b/test/CodeGen/X86/x86-64-pic-10.ll
new file mode 100644
index 0000000..b6f82e2
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-10.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {callq g@PLT} %t1
+
+@g = alias weak i32 ()* @f
+
+define void @h() {
+entry:
+ %tmp31 = call i32 @g()
+ ret void
+}
+
+declare extern_weak i32 @f()
diff --git a/test/CodeGen/X86/x86-64-pic-11.ll b/test/CodeGen/X86/x86-64-pic-11.ll
new file mode 100644
index 0000000..4db331c
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-11.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {callq __fixunsxfti@PLT} %t1
+
+define i128 @f(x86_fp80 %a) nounwind {
+entry:
+ %tmp78 = fptoui x86_fp80 %a to i128
+ ret i128 %tmp78
+}
diff --git a/test/CodeGen/X86/x86-64-pic-2.ll b/test/CodeGen/X86/x86-64-pic-2.ll
new file mode 100644
index 0000000..1ce2de7
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-2.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {callq f} %t1
+; RUN: not grep {callq f@PLT} %t1
+
+define void @g() {
+entry:
+ call void @f( )
+ ret void
+}
+
+declare hidden void @f()
diff --git a/test/CodeGen/X86/x86-64-pic-3.ll b/test/CodeGen/X86/x86-64-pic-3.ll
new file mode 100644
index 0000000..aa3c888
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-3.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {callq f} %t1
+; RUN: not grep {callq f@PLT} %t1
+
+define void @g() {
+entry:
+ call void @f( )
+ ret void
+}
+
+define internal void @f() {
+entry:
+ ret void
+}
diff --git a/test/CodeGen/X86/x86-64-pic-4.ll b/test/CodeGen/X86/x86-64-pic-4.ll
new file mode 100644
index 0000000..90fc119
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-4.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {movq a@GOTPCREL(%rip),} %t1
+
+@a = global i32 0
+
+define i32 @get_a() {
+entry:
+ %tmp1 = load i32* @a, align 4
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/x86-64-pic-5.ll b/test/CodeGen/X86/x86-64-pic-5.ll
new file mode 100644
index 0000000..6369bde
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-5.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {movl a(%rip),} %t1
+; RUN: not grep GOTPCREL %t1
+
+@a = hidden global i32 0
+
+define i32 @get_a() {
+entry:
+ %tmp1 = load i32* @a, align 4
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/x86-64-pic-6.ll b/test/CodeGen/X86/x86-64-pic-6.ll
new file mode 100644
index 0000000..6e19ad3
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-6.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {movl a(%rip),} %t1
+; RUN: not grep GOTPCREL %t1
+
+@a = internal global i32 0
+
+define i32 @get_a() nounwind {
+entry:
+ %tmp1 = load i32* @a, align 4
+ ret i32 %tmp1
+}
diff --git a/test/CodeGen/X86/x86-64-pic-7.ll b/test/CodeGen/X86/x86-64-pic-7.ll
new file mode 100644
index 0000000..4d98ee61
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-7.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {movq f@GOTPCREL(%rip),} %t1
+
+define void ()* @g() nounwind {
+entry:
+ ret void ()* @f
+}
+
+declare void @f()
diff --git a/test/CodeGen/X86/x86-64-pic-8.ll b/test/CodeGen/X86/x86-64-pic-8.ll
new file mode 100644
index 0000000..d3b567c
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-8.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {leaq f(%rip),} %t1
+; RUN: not grep GOTPCREL %t1
+
+define void ()* @g() {
+entry:
+ ret void ()* @f
+}
+
+declare hidden void @f()
diff --git a/test/CodeGen/X86/x86-64-pic-9.ll b/test/CodeGen/X86/x86-64-pic-9.ll
new file mode 100644
index 0000000..07610313
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-pic-9.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
+; RUN: grep {leaq f(%rip),} %t1
+; RUN: not grep GOTPCREL %t1
+
+define void ()* @g() nounwind {
+entry:
+ ret void ()* @f
+}
+
+define internal void @f() nounwind {
+entry:
+ ret void
+}
diff --git a/test/CodeGen/X86/x86-64-ret0.ll b/test/CodeGen/X86/x86-64-ret0.ll
new file mode 100644
index 0000000..c74f6d8
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-ret0.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=x86-64 | grep mov | count 1
+
+define i32 @f() nounwind {
+ tail call void @t( i32 1 ) nounwind
+ ret i32 0
+}
+
+declare void @t(i32)
diff --git a/test/CodeGen/X86/x86-64-shortint.ll b/test/CodeGen/X86/x86-64-shortint.ll
new file mode 100644
index 0000000..7f96543
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-shortint.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s | grep movswl
+
+target datalayout = "e-p:64:64"
+target triple = "x86_64-apple-darwin8"
+
+
+define void @bar(i16 zeroext %A) {
+ tail call void @foo( i16 %A signext )
+ ret void
+}
+declare void @foo(i16 signext )
+
diff --git a/test/CodeGen/X86/x86-64-sret-return.ll b/test/CodeGen/X86/x86-64-sret-return.ll
new file mode 100644
index 0000000..7b5f189
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-sret-return.ll
@@ -0,0 +1,63 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+ %struct.foo = type { [4 x i64] }
+
+; CHECK: bar:
+; CHECK: movq %rdi, %rax
+define void @bar(%struct.foo* noalias sret %agg.result, %struct.foo* %d) nounwind {
+entry:
+ %d_addr = alloca %struct.foo* ; <%struct.foo**> [#uses=2]
+ %memtmp = alloca %struct.foo, align 8 ; <%struct.foo*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store %struct.foo* %d, %struct.foo** %d_addr
+ %tmp = load %struct.foo** %d_addr, align 8 ; <%struct.foo*> [#uses=1]
+ %tmp1 = getelementptr %struct.foo* %agg.result, i32 0, i32 0 ; <[4 x i64]*> [#uses=4]
+ %tmp2 = getelementptr %struct.foo* %tmp, i32 0, i32 0 ; <[4 x i64]*> [#uses=4]
+ %tmp3 = getelementptr [4 x i64]* %tmp1, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp4 = getelementptr [4 x i64]* %tmp2, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp5 = load i64* %tmp4, align 8 ; <i64> [#uses=1]
+ store i64 %tmp5, i64* %tmp3, align 8
+ %tmp6 = getelementptr [4 x i64]* %tmp1, i32 0, i32 1 ; <i64*> [#uses=1]
+ %tmp7 = getelementptr [4 x i64]* %tmp2, i32 0, i32 1 ; <i64*> [#uses=1]
+ %tmp8 = load i64* %tmp7, align 8 ; <i64> [#uses=1]
+ store i64 %tmp8, i64* %tmp6, align 8
+ %tmp9 = getelementptr [4 x i64]* %tmp1, i32 0, i32 2 ; <i64*> [#uses=1]
+ %tmp10 = getelementptr [4 x i64]* %tmp2, i32 0, i32 2 ; <i64*> [#uses=1]
+ %tmp11 = load i64* %tmp10, align 8 ; <i64> [#uses=1]
+ store i64 %tmp11, i64* %tmp9, align 8
+ %tmp12 = getelementptr [4 x i64]* %tmp1, i32 0, i32 3 ; <i64*> [#uses=1]
+ %tmp13 = getelementptr [4 x i64]* %tmp2, i32 0, i32 3 ; <i64*> [#uses=1]
+ %tmp14 = load i64* %tmp13, align 8 ; <i64> [#uses=1]
+ store i64 %tmp14, i64* %tmp12, align 8
+ %tmp15 = getelementptr %struct.foo* %memtmp, i32 0, i32 0 ; <[4 x i64]*> [#uses=4]
+ %tmp16 = getelementptr %struct.foo* %agg.result, i32 0, i32 0 ; <[4 x i64]*> [#uses=4]
+ %tmp17 = getelementptr [4 x i64]* %tmp15, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp18 = getelementptr [4 x i64]* %tmp16, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp19 = load i64* %tmp18, align 8 ; <i64> [#uses=1]
+ store i64 %tmp19, i64* %tmp17, align 8
+ %tmp20 = getelementptr [4 x i64]* %tmp15, i32 0, i32 1 ; <i64*> [#uses=1]
+ %tmp21 = getelementptr [4 x i64]* %tmp16, i32 0, i32 1 ; <i64*> [#uses=1]
+ %tmp22 = load i64* %tmp21, align 8 ; <i64> [#uses=1]
+ store i64 %tmp22, i64* %tmp20, align 8
+ %tmp23 = getelementptr [4 x i64]* %tmp15, i32 0, i32 2 ; <i64*> [#uses=1]
+ %tmp24 = getelementptr [4 x i64]* %tmp16, i32 0, i32 2 ; <i64*> [#uses=1]
+ %tmp25 = load i64* %tmp24, align 8 ; <i64> [#uses=1]
+ store i64 %tmp25, i64* %tmp23, align 8
+ %tmp26 = getelementptr [4 x i64]* %tmp15, i32 0, i32 3 ; <i64*> [#uses=1]
+ %tmp27 = getelementptr [4 x i64]* %tmp16, i32 0, i32 3 ; <i64*> [#uses=1]
+ %tmp28 = load i64* %tmp27, align 8 ; <i64> [#uses=1]
+ store i64 %tmp28, i64* %tmp26, align 8
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+; CHECK: foo:
+; CHECK: movq %rdi, %rax
+define void @foo({ i64 }* noalias nocapture sret %agg.result) nounwind {
+ store { i64 } { i64 0 }, { i64 }* %agg.result
+ ret void
+}
diff --git a/test/CodeGen/X86/x86-64-varargs.ll b/test/CodeGen/X86/x86-64-varargs.ll
new file mode 100644
index 0000000..428f449
--- /dev/null
+++ b/test/CodeGen/X86/x86-64-varargs.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -code-model=large -relocation-model=static | grep call | not grep rax
+
[email protected] = internal constant [26 x i8] c"%d, %f, %d, %lld, %d, %f\0A\00" ; <[26 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...) nounwind
+
+define i32 @main() nounwind {
+entry:
+ %tmp10.i = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([26 x i8]* @.str, i32 0, i64 0), i32 12, double 0x3FF3EB8520000000, i32 120, i64 123456677890, i32 -10, double 4.500000e+15 ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/CodeGen/X86/x86-frameaddr.ll b/test/CodeGen/X86/x86-frameaddr.ll
new file mode 100644
index 0000000..d595874
--- /dev/null
+++ b/test/CodeGen/X86/x86-frameaddr.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | grep mov | grep ebp
+
+define i8* @t() nounwind {
+entry:
+ %0 = tail call i8* @llvm.frameaddress(i32 0)
+ ret i8* %0
+}
+
+declare i8* @llvm.frameaddress(i32) nounwind readnone
diff --git a/test/CodeGen/X86/x86-frameaddr2.ll b/test/CodeGen/X86/x86-frameaddr2.ll
new file mode 100644
index 0000000..c509115
--- /dev/null
+++ b/test/CodeGen/X86/x86-frameaddr2.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 | grep mov | count 3
+
+define i8* @t() nounwind {
+entry:
+ %0 = tail call i8* @llvm.frameaddress(i32 2)
+ ret i8* %0
+}
+
+declare i8* @llvm.frameaddress(i32) nounwind readnone
diff --git a/test/CodeGen/X86/x86-store-gv-addr.ll b/test/CodeGen/X86/x86-store-gv-addr.ll
new file mode 100644
index 0000000..089517a
--- /dev/null
+++ b/test/CodeGen/X86/x86-store-gv-addr.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=static | not grep lea
+; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=static | not grep lea
+
+@v = external global i32, align 8
+@v_addr = external global i32*, align 8
+
+define void @t() nounwind optsize {
+ store i32* @v, i32** @v_addr, align 8
+ unreachable
+}
diff --git a/test/CodeGen/X86/xmm-r64.ll b/test/CodeGen/X86/xmm-r64.ll
new file mode 100644
index 0000000..2a6b5c7
--- /dev/null
+++ b/test/CodeGen/X86/xmm-r64.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64
+
+define <4 x i32> @test() {
+ %tmp1039 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1]
+ %tmp1040 = bitcast <4 x i32> %tmp1039 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %tmp1048 = add <2 x i64> %tmp1040, zeroinitializer ; <<2 x i64>> [#uses=1]
+ %tmp1048.upgrd.1 = bitcast <2 x i64> %tmp1048 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp1048.upgrd.1
+}
+
+declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>)
+
diff --git a/test/CodeGen/X86/xor-icmp.ll b/test/CodeGen/X86/xor-icmp.ll
new file mode 100644
index 0000000..a6bdb13
--- /dev/null
+++ b/test/CodeGen/X86/xor-icmp.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
+
+define i32 @t(i32 %a, i32 %b) nounwind ssp {
+entry:
+; X32: t:
+; X32: xorb
+; X32-NOT: andb
+; X32-NOT: shrb
+; X32: testb $64
+; X32: jne
+
+; X64: t:
+; X64-NOT: setne
+; X64: xorl
+; X64: testb $64
+; X64: jne
+ %0 = and i32 %a, 16384
+ %1 = icmp ne i32 %0, 0
+ %2 = and i32 %b, 16384
+ %3 = icmp ne i32 %2, 0
+ %4 = xor i1 %1, %3
+ br i1 %4, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %5 = tail call i32 (...)* @foo() nounwind ; <i32> [#uses=1]
+ ret i32 %5
+
+bb1: ; preds = %entry
+ %6 = tail call i32 (...)* @bar() nounwind ; <i32> [#uses=1]
+ ret i32 %6
+}
+
+declare i32 @foo(...)
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll
new file mode 100644
index 0000000..9bfff8a0
--- /dev/null
+++ b/test/CodeGen/X86/xor.ll
@@ -0,0 +1,144 @@
+; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
+
+; Though it is undefined, we want xor undef,undef to produce zero.
+define <4 x i32> @test1() nounwind {
+ %tmp = xor <4 x i32> undef, undef
+ ret <4 x i32> %tmp
+
+; X32: test1:
+; X32: xorps %xmm0, %xmm0
+; X32: ret
+}
+
+; Though it is undefined, we want xor undef,undef to produce zero.
+define i32 @test2() nounwind{
+ %tmp = xor i32 undef, undef
+ ret i32 %tmp
+; X32: test2:
+; X32: xorl %eax, %eax
+; X32: ret
+}
+
+define i32 @test3(i32 %a, i32 %b) nounwind {
+entry:
+ %tmp1not = xor i32 %b, -2
+ %tmp3 = and i32 %tmp1not, %a
+ %tmp4 = lshr i32 %tmp3, 1
+ ret i32 %tmp4
+
+; X64: test3:
+; X64: notl %esi
+; X64: andl %edi, %esi
+; X64: movl %esi, %eax
+; X64: shrl %eax
+; X64: ret
+
+; X32: test3:
+; X32: movl 8(%esp), %eax
+; X32: notl %eax
+; X32: andl 4(%esp), %eax
+; X32: shrl %eax
+; X32: ret
+}
+
+define i32 @test4(i32 %a, i32 %b) nounwind {
+entry:
+ br label %bb
+bb:
+ %b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb ]
+ %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp3, %bb ]
+ %tmp3 = xor i32 %a_addr.0, %b_addr.0
+ %tmp4not = xor i32 %tmp3, 2147483647
+ %tmp6 = and i32 %tmp4not, %b_addr.0
+ %tmp8 = shl i32 %tmp6, 1
+ %tmp10 = icmp eq i32 %tmp8, 0
+ br i1 %tmp10, label %bb12, label %bb
+bb12:
+ ret i32 %tmp3
+
+; X64: test4:
+; X64: notl [[REG:%[a-z]+]]
+; X64: andl {{.*}}[[REG]]
+; X32: test4:
+; X32: notl [[REG:%[a-z]+]]
+; X32: andl {{.*}}[[REG]]
+}
+
+define i16 @test5(i16 %a, i16 %b) nounwind {
+entry:
+ br label %bb
+bb:
+ %b_addr.0 = phi i16 [ %b, %entry ], [ %tmp8, %bb ]
+ %a_addr.0 = phi i16 [ %a, %entry ], [ %tmp3, %bb ]
+ %tmp3 = xor i16 %a_addr.0, %b_addr.0
+ %tmp4not = xor i16 %tmp3, 32767
+ %tmp6 = and i16 %tmp4not, %b_addr.0
+ %tmp8 = shl i16 %tmp6, 1
+ %tmp10 = icmp eq i16 %tmp8, 0
+ br i1 %tmp10, label %bb12, label %bb
+bb12:
+ ret i16 %tmp3
+; X64: test5:
+; X64: notw [[REG:%[a-z]+]]
+; X64: andw {{.*}}[[REG]]
+; X32: test5:
+; X32: notw [[REG:%[a-z]+]]
+; X32: andw {{.*}}[[REG]]
+}
+
+define i8 @test6(i8 %a, i8 %b) nounwind {
+entry:
+ br label %bb
+bb:
+ %b_addr.0 = phi i8 [ %b, %entry ], [ %tmp8, %bb ]
+ %a_addr.0 = phi i8 [ %a, %entry ], [ %tmp3, %bb ]
+ %tmp3 = xor i8 %a_addr.0, %b_addr.0
+ %tmp4not = xor i8 %tmp3, 127
+ %tmp6 = and i8 %tmp4not, %b_addr.0
+ %tmp8 = shl i8 %tmp6, 1
+ %tmp10 = icmp eq i8 %tmp8, 0
+ br i1 %tmp10, label %bb12, label %bb
+bb12:
+ ret i8 %tmp3
+; X64: test6:
+; X64: notb [[REG:%[a-z]+]]
+; X64: andb {{.*}}[[REG]]
+; X32: test6:
+; X32: notb [[REG:%[a-z]+]]
+; X32: andb {{.*}}[[REG]]
+}
+
+define i32 @test7(i32 %a, i32 %b) nounwind {
+entry:
+ br label %bb
+bb:
+ %b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb ]
+ %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp3, %bb ]
+ %tmp3 = xor i32 %a_addr.0, %b_addr.0
+ %tmp4not = xor i32 %tmp3, 2147483646
+ %tmp6 = and i32 %tmp4not, %b_addr.0
+ %tmp8 = shl i32 %tmp6, 1
+ %tmp10 = icmp eq i32 %tmp8, 0
+ br i1 %tmp10, label %bb12, label %bb
+bb12:
+ ret i32 %tmp3
+; X64: test7:
+; X64: xorl $2147483646, [[REG:%[a-z]+]]
+; X64: andl {{.*}}[[REG]]
+; X32: test7:
+; X32: xorl $2147483646, [[REG:%[a-z]+]]
+; X32: andl {{.*}}[[REG]]
+}
+
+define i32 @test8(i32 %a) nounwind {
+; rdar://7553032
+entry:
+ %t1 = sub i32 0, %a
+ %t2 = add i32 %t1, -1
+ ret i32 %t2
+; X64: test8:
+; X64: notl %eax
+; X32: test8:
+; X32: notl %eax
+}
diff --git a/test/CodeGen/X86/zero-remat.ll b/test/CodeGen/X86/zero-remat.ll
new file mode 100644
index 0000000..3e3bb95d
--- /dev/null
+++ b/test/CodeGen/X86/zero-remat.ll
@@ -0,0 +1,40 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 12
+; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
+
+declare void @bar(double %x)
+declare void @barf(float %x)
+
+define double @foo() nounwind {
+
+ call void @bar(double 0.0)
+ ret double 0.0
+
+;CHECK-32: foo:
+;CHECK-32: call
+;CHECK-32: fldz
+;CHECK-32: ret
+
+;CHECK-64: foo:
+;CHECK-64: pxor
+;CHECK-64: call
+;CHECK-64: pxor
+;CHECK-64: ret
+}
+
+
+define float @foof() nounwind {
+ call void @barf(float 0.0)
+ ret float 0.0
+
+;CHECK-32: foof:
+;CHECK-32: call
+;CHECK-32: fldz
+;CHECK-32: ret
+
+;CHECK-64: foof:
+;CHECK-64: pxor
+;CHECK-64: call
+;CHECK-64: pxor
+;CHECK-64: ret
+}
diff --git a/test/CodeGen/X86/zext-inreg-0.ll b/test/CodeGen/X86/zext-inreg-0.ll
new file mode 100644
index 0000000..ae6221a
--- /dev/null
+++ b/test/CodeGen/X86/zext-inreg-0.ll
@@ -0,0 +1,66 @@
+; RUN: llc < %s -march=x86 | not grep and
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: not grep and %t
+; RUN: not grep movzbq %t
+; RUN: not grep movzwq %t
+; RUN: not grep movzlq %t
+
+; These should use movzbl instead of 'and 255'.
+; This related to not having a ZERO_EXTEND_REG opcode.
+
+define i32 @a(i32 %d) nounwind {
+ %e = add i32 %d, 1
+ %retval = and i32 %e, 255
+ ret i32 %retval
+}
+define i32 @b(float %d) nounwind {
+ %tmp12 = fptoui float %d to i8
+ %retval = zext i8 %tmp12 to i32
+ ret i32 %retval
+}
+define i32 @c(i32 %d) nounwind {
+ %e = add i32 %d, 1
+ %retval = and i32 %e, 65535
+ ret i32 %retval
+}
+define i64 @d(i64 %d) nounwind {
+ %e = add i64 %d, 1
+ %retval = and i64 %e, 255
+ ret i64 %retval
+}
+define i64 @e(i64 %d) nounwind {
+ %e = add i64 %d, 1
+ %retval = and i64 %e, 65535
+ ret i64 %retval
+}
+define i64 @f(i64 %d) nounwind {
+ %e = add i64 %d, 1
+ %retval = and i64 %e, 4294967295
+ ret i64 %retval
+}
+
+define i32 @g(i8 %d) nounwind {
+ %e = add i8 %d, 1
+ %retval = zext i8 %e to i32
+ ret i32 %retval
+}
+define i32 @h(i16 %d) nounwind {
+ %e = add i16 %d, 1
+ %retval = zext i16 %e to i32
+ ret i32 %retval
+}
+define i64 @i(i8 %d) nounwind {
+ %e = add i8 %d, 1
+ %retval = zext i8 %e to i64
+ ret i64 %retval
+}
+define i64 @j(i16 %d) nounwind {
+ %e = add i16 %d, 1
+ %retval = zext i16 %e to i64
+ ret i64 %retval
+}
+define i64 @k(i32 %d) nounwind {
+ %e = add i32 %d, 1
+ %retval = zext i32 %e to i64
+ ret i64 %retval
+}
diff --git a/test/CodeGen/X86/zext-inreg-1.ll b/test/CodeGen/X86/zext-inreg-1.ll
new file mode 100644
index 0000000..17fe374
--- /dev/null
+++ b/test/CodeGen/X86/zext-inreg-1.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86 | not grep and
+
+; These tests differ from the ones in zext-inreg-0.ll in that
+; on x86-64 they do require and instructions.
+
+; These should use movzbl instead of 'and 255'.
+; This related to not having ZERO_EXTEND_REG node.
+
+define i64 @l(i64 %d) nounwind {
+ %e = add i64 %d, 1
+ %retval = and i64 %e, 1099511627775
+ ret i64 %retval
+}
+define i64 @m(i64 %d) nounwind {
+ %e = add i64 %d, 1
+ %retval = and i64 %e, 281474976710655
+ ret i64 %retval
+}
diff --git a/test/CodeGen/X86/zext-shl.ll b/test/CodeGen/X86/zext-shl.ll
new file mode 100644
index 0000000..928848e
--- /dev/null
+++ b/test/CodeGen/X86/zext-shl.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+define i32 @t1(i8 zeroext %x) nounwind readnone ssp {
+entry:
+; CHECK: t1:
+; CHECK: shll
+; CHECK-NOT: movzwl
+; CHECK: ret
+ %0 = zext i8 %x to i16
+ %1 = shl i16 %0, 5
+ %2 = zext i16 %1 to i32
+ ret i32 %2
+}
+
+define i32 @t2(i8 zeroext %x) nounwind readnone ssp {
+entry:
+; CHECK: t2:
+; CHECK: shrl
+; CHECK-NOT: movzwl
+; CHECK: ret
+ %0 = zext i8 %x to i16
+ %1 = lshr i16 %0, 3
+ %2 = zext i16 %1 to i32
+ ret i32 %2
+}
diff --git a/test/CodeGen/X86/zext-trunc.ll b/test/CodeGen/X86/zext-trunc.ll
new file mode 100644
index 0000000..b9ffbe8
--- /dev/null
+++ b/test/CodeGen/X86/zext-trunc.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+; rdar://7570931
+
+define i64 @foo(i64 %a, i64 %b) nounwind {
+; CHECK: foo:
+; CHECK: leal
+; CHECK-NOT: movl
+; CHECK: ret
+ %c = add i64 %a, %b
+ %d = trunc i64 %c to i32
+ %e = zext i32 %d to i64
+ ret i64 %e
+}
diff --git a/test/CodeGen/XCore/2008-11-17-Shl64.ll b/test/CodeGen/XCore/2008-11-17-Shl64.ll
new file mode 100644
index 0000000..04b1b5a
--- /dev/null
+++ b/test/CodeGen/XCore/2008-11-17-Shl64.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; PR3080
+define i64 @test(i64 %a) {
+ %result = shl i64 %a, 1
+ ret i64 %result
+}
diff --git a/test/CodeGen/XCore/2009-01-08-Crash.ll b/test/CodeGen/XCore/2009-01-08-Crash.ll
new file mode 100644
index 0000000..a31ea1e2
--- /dev/null
+++ b/test/CodeGen/XCore/2009-01-08-Crash.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=xcore > %t1.s
+;; This caused a compilation failure since the
+;; address arithmetic was folded into the LDWSP instruction,
+;; resulting in a negative offset which eliminateFrameIndex was
+;; unable to eliminate.
+define i32 @test(i32 %bar) nounwind readnone {
+entry:
+ %bar_addr = alloca i32
+ %0 = getelementptr i32* %bar_addr, i32 -1
+ %1 = load i32* %0, align 4
+ ret i32 %1
+}
diff --git a/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll b/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
new file mode 100644
index 0000000..b2bbcb1
--- /dev/null
+++ b/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; PR3324
+define double @f1(double %a, double %b, double %c, double %d, double %e, double %f, double %g) nounwind {
+entry:
+ br i1 false, label %bb113, label %bb129
+
+bb113: ; preds = %entry
+ ret double 0.000000e+00
+
+bb129: ; preds = %entry
+ %tmp134 = fsub double %b, %a ; <double> [#uses=1]
+ %tmp136 = fsub double %tmp134, %c ; <double> [#uses=1]
+ %tmp138 = fadd double %tmp136, %d ; <double> [#uses=1]
+ %tmp140 = fsub double %tmp138, %e ; <double> [#uses=1]
+ %tmp142 = fadd double %tmp140, %f ; <double> [#uses=1]
+ %tmp.0 = fmul double %tmp142, 0.000000e+00 ; <double> [#uses=1]
+ ret double %tmp.0
+}
diff --git a/test/CodeGen/XCore/2009-03-27-v2f64-param.ll b/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
new file mode 100644
index 0000000..e35a36a
--- /dev/null
+++ b/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=xcore
+; PR3898
+
+define i32 @vector_param(<2 x double> %x) nounwind {
+ ret i32 1
+}
diff --git a/test/CodeGen/XCore/2009-07-15-store192.ll b/test/CodeGen/XCore/2009-07-15-store192.ll
new file mode 100644
index 0000000..5278af8
--- /dev/null
+++ b/test/CodeGen/XCore/2009-07-15-store192.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=xcore > %t1.s
+define void @store32(i8* %p) nounwind {
+entry:
+ %0 = bitcast i8* %p to i192*
+ store i192 0, i192* %0, align 4
+ ret void
+}
diff --git a/test/CodeGen/XCore/addsub64.ll b/test/CodeGen/XCore/addsub64.ll
new file mode 100644
index 0000000..a1494ad
--- /dev/null
+++ b/test/CodeGen/XCore/addsub64.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=xcore -mcpu=xs1b-generic > %t1.s
+; RUN: grep ladd %t1.s | count 2
+; RUN: grep lsub %t1.s | count 2
+define i64 @add64(i64 %a, i64 %b) {
+ %result = add i64 %a, %b
+ ret i64 %result
+}
+
+define i64 @sub64(i64 %a, i64 %b) {
+ %result = sub i64 %a, %b
+ ret i64 %result
+}
diff --git a/test/CodeGen/XCore/ashr.ll b/test/CodeGen/XCore/ashr.ll
new file mode 100644
index 0000000..d99808f
--- /dev/null
+++ b/test/CodeGen/XCore/ashr.ll
@@ -0,0 +1,76 @@
+; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
+define i32 @ashr(i32 %a, i32 %b) {
+ %1 = ashr i32 %a, %b
+ ret i32 %1
+}
+; CHECK: ashr:
+; CHECK-NEXT: ashr r0, r0, r1
+
+define i32 @ashri1(i32 %a) {
+ %1 = ashr i32 %a, 24
+ ret i32 %1
+}
+; CHECK: ashri1:
+; CHECK-NEXT: ashr r0, r0, 24
+
+define i32 @ashri2(i32 %a) {
+ %1 = ashr i32 %a, 31
+ ret i32 %1
+}
+; CHECK: ashri2:
+; CHECK-NEXT: ashr r0, r0, 32
+
+define i32 @f1(i32 %a) {
+ %1 = icmp slt i32 %a, 0
+ br i1 %1, label %less, label %not_less
+less:
+ ret i32 10
+not_less:
+ ret i32 17
+}
+; CHECK: f1:
+; CHECK-NEXT: ashr r0, r0, 32
+; CHECK-NEXT: bf r0
+
+define i32 @f2(i32 %a) {
+ %1 = icmp sge i32 %a, 0
+ br i1 %1, label %greater, label %not_greater
+greater:
+ ret i32 10
+not_greater:
+ ret i32 17
+}
+; CHECK: f2:
+; CHECK-NEXT: ashr r0, r0, 32
+; CHECK-NEXT: bt r0
+
+define i32 @f3(i32 %a) {
+ %1 = icmp slt i32 %a, 0
+ %2 = select i1 %1, i32 10, i32 17
+ ret i32 %2
+}
+; CHECK: f3:
+; CHECK-NEXT: ashr r1, r0, 32
+; CHECK-NEXT: ldc r0, 10
+; CHECK-NEXT: bt r1
+; CHECK: ldc r0, 17
+
+define i32 @f4(i32 %a) {
+ %1 = icmp sge i32 %a, 0
+ %2 = select i1 %1, i32 10, i32 17
+ ret i32 %2
+}
+; CHECK: f4:
+; CHECK-NEXT: ashr r1, r0, 32
+; CHECK-NEXT: ldc r0, 17
+; CHECK-NEXT: bt r1
+; CHECK: ldc r0, 10
+
+define i32 @f5(i32 %a) {
+ %1 = icmp sge i32 %a, 0
+ %2 = zext i1 %1 to i32
+ ret i32 %2
+}
+; CHECK: f5:
+; CHECK-NEXT: ashr r0, r0, 32
+; CHECK-NEXT: eq r0, r0, 0
diff --git a/test/CodeGen/XCore/basictest.ll b/test/CodeGen/XCore/basictest.ll
new file mode 100644
index 0000000..de5eaff
--- /dev/null
+++ b/test/CodeGen/XCore/basictest.ll
@@ -0,0 +1,6 @@
+; RUN: llc < %s -march=xcore
+
+define i32 @test(i32 %X) {
+ %tmp.1 = add i32 %X, 1
+ ret i32 %tmp.1
+}
diff --git a/test/CodeGen/XCore/bigstructret.ll b/test/CodeGen/XCore/bigstructret.ll
new file mode 100644
index 0000000..56af930
--- /dev/null
+++ b/test/CodeGen/XCore/bigstructret.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s -march=xcore | FileCheck %s
+
+%0 = type { i32, i32, i32, i32 }
+%1 = type { i32, i32, i32, i32, i32 }
+
+; Structs of 4 words can be returned in registers
+define internal fastcc %0 @ReturnBigStruct() nounwind readnone {
+entry:
+ %0 = insertvalue %0 zeroinitializer, i32 12, 0
+ %1 = insertvalue %0 %0, i32 24, 1
+ %2 = insertvalue %0 %1, i32 48, 2
+ %3 = insertvalue %0 %2, i32 24601, 3
+ ret %0 %3
+}
+; CHECK: ReturnBigStruct:
+; CHECK: ldc r0, 12
+; CHECK: ldc r1, 24
+; CHECK: ldc r2, 48
+; CHECK: ldc r3, 24601
+; CHECK: retsp 0
+
+; Structs bigger than 4 words are returned via a hidden hidden sret-parameter
+define internal fastcc %1 @ReturnBigStruct2() nounwind readnone {
+entry:
+ %0 = insertvalue %1 zeroinitializer, i32 12, 0
+ %1 = insertvalue %1 %0, i32 24, 1
+ %2 = insertvalue %1 %1, i32 48, 2
+ %3 = insertvalue %1 %2, i32 24601, 3
+ %4 = insertvalue %1 %3, i32 4321, 4
+ ret %1 %4
+}
+; CHECK: ReturnBigStruct2:
+; CHECK: ldc r1, 4321
+; CHECK: stw r1, r0[4]
+; CHECK: ldc r1, 24601
+; CHECK: stw r1, r0[3]
+; CHECK: ldc r1, 48
+; CHECK: stw r1, r0[2]
+; CHECK: ldc r1, 24
+; CHECK: stw r1, r0[1]
+; CHECK: ldc r1, 12
+; CHECK: stw r1, r0[0]
+; CHECK: retsp 0
diff --git a/test/CodeGen/XCore/bitrev.ll b/test/CodeGen/XCore/bitrev.ll
new file mode 100644
index 0000000..09202d3
--- /dev/null
+++ b/test/CodeGen/XCore/bitrev.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep bitrev %t1.s | count 1
+declare i32 @llvm.xcore.bitrev(i32)
+
+define i32 @test(i32 %val) {
+ %result = call i32 @llvm.xcore.bitrev(i32 %val)
+ ret i32 %result
+}
diff --git a/test/CodeGen/XCore/constants.ll b/test/CodeGen/XCore/constants.ll
new file mode 100644
index 0000000..95fa11e
--- /dev/null
+++ b/test/CodeGen/XCore/constants.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
+
+; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
+; CHECK: .LCPI1_0:
+; CHECK: .long 12345678
+; CHECK: f:
+; CHECK: ldw r0, cp[.LCPI1_0]
+define i32 @f() {
+entry:
+ ret i32 12345678
+}
diff --git a/test/CodeGen/XCore/cos.ll b/test/CodeGen/XCore/cos.ll
new file mode 100644
index 0000000..8211f85
--- /dev/null
+++ b/test/CodeGen/XCore/cos.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl cosf" %t1.s | count 1
+; RUN: grep "bl cos" %t1.s | count 2
+declare double @llvm.cos.f64(double)
+
+define double @test(double %F) {
+ %result = call double @llvm.cos.f64(double %F)
+ ret double %result
+}
+
+declare float @llvm.cos.f32(float)
+
+define float @testf(float %F) {
+ %result = call float @llvm.cos.f32(float %F)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/dg.exp b/test/CodeGen/XCore/dg.exp
new file mode 100644
index 0000000..7110eab
--- /dev/null
+++ b/test/CodeGen/XCore/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target XCore] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/XCore/exp.ll b/test/CodeGen/XCore/exp.ll
new file mode 100644
index 0000000..d23d484
--- /dev/null
+++ b/test/CodeGen/XCore/exp.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl expf" %t1.s | count 1
+; RUN: grep "bl exp" %t1.s | count 2
+declare double @llvm.exp.f64(double)
+
+define double @test(double %F) {
+ %result = call double @llvm.exp.f64(double %F)
+ ret double %result
+}
+
+declare float @llvm.exp.f32(float)
+
+define float @testf(float %F) {
+ %result = call float @llvm.exp.f32(float %F)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/exp2.ll b/test/CodeGen/XCore/exp2.ll
new file mode 100644
index 0000000..4c4d17f
--- /dev/null
+++ b/test/CodeGen/XCore/exp2.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl exp2f" %t1.s | count 1
+; RUN: grep "bl exp2" %t1.s | count 2
+declare double @llvm.exp2.f64(double)
+
+define double @test(double %F) {
+ %result = call double @llvm.exp2.f64(double %F)
+ ret double %result
+}
+
+declare float @llvm.exp2.f32(float)
+
+define float @testf(float %F) {
+ %result = call float @llvm.exp2.f32(float %F)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/fneg.ll b/test/CodeGen/XCore/fneg.ll
new file mode 100644
index 0000000..e3dd3dd
--- /dev/null
+++ b/test/CodeGen/XCore/fneg.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -march=xcore | grep "xor" | count 1
+define i1 @test(double %F) nounwind {
+entry:
+ %0 = fsub double -0.000000e+00, %F
+ %1 = fcmp olt double 0.000000e+00, %0
+ ret i1 %1
+}
diff --git a/test/CodeGen/XCore/getid.ll b/test/CodeGen/XCore/getid.ll
new file mode 100644
index 0000000..ecab65c
--- /dev/null
+++ b/test/CodeGen/XCore/getid.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "get r11, id" %t1.s | count 1
+declare i32 @llvm.xcore.getid()
+
+define i32 @test() {
+ %result = call i32 @llvm.xcore.getid()
+ ret i32 %result
+}
diff --git a/test/CodeGen/XCore/globals.ll b/test/CodeGen/XCore/globals.ll
new file mode 100644
index 0000000..342e5932
--- /dev/null
+++ b/test/CodeGen/XCore/globals.ll
@@ -0,0 +1,92 @@
+; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
+
+define i32 *@addr_G1() {
+entry:
+; CHECK: addr_G1:
+; CHECK: ldaw r0, dp[G1]
+ ret i32* @G1
+}
+
+define i32 *@addr_G2() {
+entry:
+; CHECK: addr_G2:
+; CHECK: ldaw r0, dp[G2]
+ ret i32* @G2
+}
+
+define i32 *@addr_G3() {
+entry:
+; CHECK: addr_G3:
+; CHECK: ldaw r11, cp[G3]
+; CHECK: mov r0, r11
+ ret i32* @G3
+}
+
+define i32 **@addr_G4() {
+entry:
+; CHECK: addr_G4:
+; CHECK: ldaw r0, dp[G4]
+ ret i32** @G4
+}
+
+define i32 **@addr_G5() {
+entry:
+; CHECK: addr_G5:
+; CHECK: ldaw r11, cp[G5]
+; CHECK: mov r0, r11
+ ret i32** @G5
+}
+
+define i32 **@addr_G6() {
+entry:
+; CHECK: addr_G6:
+; CHECK: ldaw r0, dp[G6]
+ ret i32** @G6
+}
+
+define i32 **@addr_G7() {
+entry:
+; CHECK: addr_G7:
+; CHECK: ldaw r11, cp[G7]
+; CHECK: mov r0, r11
+ ret i32** @G7
+}
+
+define i32 *@addr_G8() {
+entry:
+; CHECK: addr_G8:
+; CHECK: ldaw r0, dp[G8]
+ ret i32* @G8
+}
+
+@G1 = global i32 4712
+; CHECK: .section .dp.data,"awd",@progbits
+; CHECK: G1:
+
+@G2 = global i32 0
+; CHECK: .section .dp.bss,"awd",@nobits
+; CHECK: G2:
+
+@G3 = constant i32 9401
+; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
+; CHECK: G3:
+
+@G4 = global i32* @G1
+; CHECK: .section .dp.data,"awd",@progbits
+; CHECK: G4:
+
+@G5 = constant i32* @G1
+; CHECK: .section .cp.rodata,"ac",@progbits
+; CHECK: G5:
+
+@G6 = global i32* @G8
+; CHECK: .section .dp.data,"awd",@progbits
+; CHECK: G6:
+
+@G7 = constant i32* @G8
+; CHECK: .section .cp.rodata,"ac",@progbits
+; CHECK: G7:
+
+@G8 = internal global i32 9312
+; CHECK: .section .dp.data,"awd",@progbits
+; CHECK: G8:
diff --git a/test/CodeGen/XCore/indirectbr.ll b/test/CodeGen/XCore/indirectbr.ll
new file mode 100644
index 0000000..a8f00cc
--- /dev/null
+++ b/test/CodeGen/XCore/indirectbr.ll
@@ -0,0 +1,45 @@
+; RUN: llc < %s -march=xcore | FileCheck %s
+
+@nextaddr = global i8* null ; <i8**> [#uses=2]
[email protected] = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
+
+define internal i32 @foo(i32 %i) nounwind {
+; CHECK: foo:
+entry:
+ %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
+ %1 = icmp eq i8* %0, null ; <i1> [#uses=1]
+ br i1 %1, label %bb3, label %bb2
+
+bb2: ; preds = %entry, %bb3
+ %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
+; CHECK: bau
+ indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
+
+bb3: ; preds = %entry
+ %2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
+ %gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
+ br label %bb2
+
+L5: ; preds = %bb2
+ br label %L4
+
+L4: ; preds = %L5, %bb2
+ %res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1]
+ br label %L3
+
+L3: ; preds = %L4, %bb2
+ %res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1]
+ br label %L2
+
+L2: ; preds = %L3, %bb2
+ %res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
+ %phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
+ br label %L1
+
+L1: ; preds = %L2, %bb2
+ %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
+; CHECK: ldap r11, .LBA3_foo_L5
+; CHECK: stw r11, dp[nextaddr]
+ store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
+ ret i32 %res.3
+}
diff --git a/test/CodeGen/XCore/load.ll b/test/CodeGen/XCore/load.ll
new file mode 100644
index 0000000..adfea21
--- /dev/null
+++ b/test/CodeGen/XCore/load.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: not grep add %t1.s
+; RUN: not grep ldaw %t1.s
+; RUN: not grep lda16 %t1.s
+; RUN: not grep zext %t1.s
+; RUN: not grep sext %t1.s
+; RUN: grep "ldw" %t1.s | count 2
+; RUN: grep "ld16s" %t1.s | count 1
+; RUN: grep "ld8u" %t1.s | count 1
+
+define i32 @load32(i32* %p, i32 %offset) nounwind {
+entry:
+ %0 = getelementptr i32* %p, i32 %offset
+ %1 = load i32* %0, align 4
+ ret i32 %1
+}
+
+define i32 @load32_imm(i32* %p) nounwind {
+entry:
+ %0 = getelementptr i32* %p, i32 11
+ %1 = load i32* %0, align 4
+ ret i32 %1
+}
+
+define i32 @load16(i16* %p, i32 %offset) nounwind {
+entry:
+ %0 = getelementptr i16* %p, i32 %offset
+ %1 = load i16* %0, align 2
+ %2 = sext i16 %1 to i32
+ ret i32 %2
+}
+
+define i32 @load8(i8* %p, i32 %offset) nounwind {
+entry:
+ %0 = getelementptr i8* %p, i32 %offset
+ %1 = load i8* %0, align 1
+ %2 = zext i8 %1 to i32
+ ret i32 %2
+}
diff --git a/test/CodeGen/XCore/log.ll b/test/CodeGen/XCore/log.ll
new file mode 100644
index 0000000..a08471f
--- /dev/null
+++ b/test/CodeGen/XCore/log.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl logf" %t1.s | count 1
+; RUN: grep "bl log" %t1.s | count 2
+declare double @llvm.log.f64(double)
+
+define double @test(double %F) {
+ %result = call double @llvm.log.f64(double %F)
+ ret double %result
+}
+
+declare float @llvm.log.f32(float)
+
+define float @testf(float %F) {
+ %result = call float @llvm.log.f32(float %F)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/log10.ll b/test/CodeGen/XCore/log10.ll
new file mode 100644
index 0000000..a72b8bf
--- /dev/null
+++ b/test/CodeGen/XCore/log10.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl log10f" %t1.s | count 1
+; RUN: grep "bl log10" %t1.s | count 2
+declare double @llvm.log10.f64(double)
+
+define double @test(double %F) {
+ %result = call double @llvm.log10.f64(double %F)
+ ret double %result
+}
+
+declare float @llvm.log10.f32(float)
+
+define float @testf(float %F) {
+ %result = call float @llvm.log10.f32(float %F)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/log2.ll b/test/CodeGen/XCore/log2.ll
new file mode 100644
index 0000000..d257433
--- /dev/null
+++ b/test/CodeGen/XCore/log2.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl log2f" %t1.s | count 1
+; RUN: grep "bl log2" %t1.s | count 2
+declare double @llvm.log2.f64(double)
+
+define double @test(double %F) {
+ %result = call double @llvm.log2.f64(double %F)
+ ret double %result
+}
+
+declare float @llvm.log2.f32(float)
+
+define float @testf(float %F) {
+ %result = call float @llvm.log2.f32(float %F)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/pow.ll b/test/CodeGen/XCore/pow.ll
new file mode 100644
index 0000000..b461185
--- /dev/null
+++ b/test/CodeGen/XCore/pow.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl powf" %t1.s | count 1
+; RUN: grep "bl pow" %t1.s | count 2
+declare double @llvm.pow.f64(double, double)
+
+define double @test(double %F, double %power) {
+ %result = call double @llvm.pow.f64(double %F, double %power)
+ ret double %result
+}
+
+declare float @llvm.pow.f32(float, float)
+
+define float @testf(float %F, float %power) {
+ %result = call float @llvm.pow.f32(float %F, float %power)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/powi.ll b/test/CodeGen/XCore/powi.ll
new file mode 100644
index 0000000..de31cbe
--- /dev/null
+++ b/test/CodeGen/XCore/powi.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl __powidf2" %t1.s | count 1
+; RUN: grep "bl __powisf2" %t1.s | count 1
+declare double @llvm.powi.f64(double, i32)
+
+define double @test(double %F, i32 %power) {
+ %result = call double @llvm.powi.f64(double %F, i32 %power)
+ ret double %result
+}
+
+declare float @llvm.powi.f32(float, i32)
+
+define float @testf(float %F, i32 %power) {
+ %result = call float @llvm.powi.f32(float %F, i32 %power)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/private.ll b/test/CodeGen/XCore/private.ll
new file mode 100644
index 0000000..c595a6df
--- /dev/null
+++ b/test/CodeGen/XCore/private.ll
@@ -0,0 +1,21 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llc < %s -march=xcore > %t
+; RUN: grep .Lfoo: %t
+; RUN: grep bl.*\.Lfoo %t
+; RUN: grep .Lbaz: %t
+; RUN: grep ldw.*\.Lbaz %t
+
+declare void @foo()
+
+define private void @foo() {
+ ret void
+}
+
+@baz = private global i32 4
+
+define i32 @bar() {
+ call void @foo()
+ %1 = load i32* @baz, align 4
+ ret i32 %1
+}
diff --git a/test/CodeGen/XCore/sext.ll b/test/CodeGen/XCore/sext.ll
new file mode 100644
index 0000000..9cd4ad6
--- /dev/null
+++ b/test/CodeGen/XCore/sext.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s -march=xcore | FileCheck %s
+define i32 @sext1(i32 %a) {
+ %1 = trunc i32 %a to i1
+ %2 = sext i1 %1 to i32
+ ret i32 %2
+}
+; CHECK: sext1:
+; CHECK: sext r0, 1
+
+define i32 @sext2(i32 %a) {
+ %1 = trunc i32 %a to i2
+ %2 = sext i2 %1 to i32
+ ret i32 %2
+}
+; CHECK: sext2:
+; CHECK: sext r0, 2
+
+define i32 @sext8(i32 %a) {
+ %1 = trunc i32 %a to i8
+ %2 = sext i8 %1 to i32
+ ret i32 %2
+}
+; CHECK: sext8:
+; CHECK: sext r0, 8
+
+define i32 @sext16(i32 %a) {
+ %1 = trunc i32 %a to i16
+ %2 = sext i16 %1 to i32
+ ret i32 %2
+}
+; CHECK: sext16:
+; CHECK: sext r0, 16
diff --git a/test/CodeGen/XCore/sin.ll b/test/CodeGen/XCore/sin.ll
new file mode 100644
index 0000000..ced026f
--- /dev/null
+++ b/test/CodeGen/XCore/sin.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl sinf" %t1.s | count 1
+; RUN: grep "bl sin" %t1.s | count 2
+declare double @llvm.sin.f64(double)
+
+define double @test(double %F) {
+ %result = call double @llvm.sin.f64(double %F)
+ ret double %result
+}
+
+declare float @llvm.sin.f32(float)
+
+define float @testf(float %F) {
+ %result = call float @llvm.sin.f32(float %F)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/sqrt.ll b/test/CodeGen/XCore/sqrt.ll
new file mode 100644
index 0000000..364d1a1
--- /dev/null
+++ b/test/CodeGen/XCore/sqrt.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl sqrtf" %t1.s | count 1
+; RUN: grep "bl sqrt" %t1.s | count 2
+declare double @llvm.sqrt.f64(double)
+
+define double @test(double %F) {
+ %result = call double @llvm.sqrt.f64(double %F)
+ ret double %result
+}
+
+declare float @llvm.sqrt.f32(float)
+
+define float @testf(float %F) {
+ %result = call float @llvm.sqrt.f32(float %F)
+ ret float %result
+}
diff --git a/test/CodeGen/XCore/store.ll b/test/CodeGen/XCore/store.ll
new file mode 100644
index 0000000..2213743
--- /dev/null
+++ b/test/CodeGen/XCore/store.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: not grep add %t1.s
+; RUN: not grep ldaw %t1.s
+; RUN: not grep lda16 %t1.s
+; RUN: grep "stw" %t1.s | count 2
+; RUN: grep "st16" %t1.s | count 1
+; RUN: grep "st8" %t1.s | count 1
+
+define void @store32(i32* %p, i32 %offset, i32 %val) nounwind {
+entry:
+ %0 = getelementptr i32* %p, i32 %offset
+ store i32 %val, i32* %0, align 4
+ ret void
+}
+
+define void @store32_imm(i32* %p, i32 %val) nounwind {
+entry:
+ %0 = getelementptr i32* %p, i32 11
+ store i32 %val, i32* %0, align 4
+ ret void
+}
+
+define void @store16(i16* %p, i32 %offset, i16 %val) nounwind {
+entry:
+ %0 = getelementptr i16* %p, i32 %offset
+ store i16 %val, i16* %0, align 2
+ ret void
+}
+
+define void @store8(i8* %p, i32 %offset, i8 %val) nounwind {
+entry:
+ %0 = getelementptr i8* %p, i32 %offset
+ store i8 %val, i8* %0, align 1
+ ret void
+}
diff --git a/test/CodeGen/XCore/tls.ll b/test/CodeGen/XCore/tls.ll
new file mode 100644
index 0000000..ed41afa
--- /dev/null
+++ b/test/CodeGen/XCore/tls.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
+
+define i32 *@addr_G() {
+entry:
+; CHECK: addr_G:
+; CHECK: get r11, id
+ ret i32* @G
+}
+
+@G = thread_local global i32 15
+; CHECK: .section .dp.data,"awd",@progbits
+; CHECK: G:
+; CHECK: .long 15
+; CHECK: .long 15
+; CHECK: .long 15
+; CHECK: .long 15
+; CHECK: .long 15
+; CHECK: .long 15
+; CHECK: .long 15
+; CHECK: .long 15
diff --git a/test/CodeGen/XCore/trap.ll b/test/CodeGen/XCore/trap.ll
new file mode 100644
index 0000000..45f886d
--- /dev/null
+++ b/test/CodeGen/XCore/trap.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "ecallf" %t1.s | count 1
+; RUN: grep "ldc" %t1.s | count 1
+define i32 @test() noreturn nounwind {
+entry:
+ tail call void @llvm.trap( )
+ unreachable
+}
+
+declare void @llvm.trap() nounwind
+
diff --git a/test/CodeGen/XCore/unaligned_load.ll b/test/CodeGen/XCore/unaligned_load.ll
new file mode 100644
index 0000000..0ee8e1c
--- /dev/null
+++ b/test/CodeGen/XCore/unaligned_load.ll
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl __misaligned_load" %t1.s | count 1
+; RUN: grep ld16s %t1.s | count 2
+; RUN: grep ldw %t1.s | count 2
+; RUN: grep shl %t1.s | count 2
+; RUN: grep shr %t1.s | count 1
+; RUN: grep zext %t1.s | count 1
+; RUN: grep "or " %t1.s | count 2
+
+; Byte aligned load. Expands to call to __misaligned_load.
+define i32 @align1(i32* %p) nounwind {
+entry:
+ %0 = load i32* %p, align 1 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+; Half word aligned load. Expands to two 16bit loads.
+define i32 @align2(i32* %p) nounwind {
+entry:
+ %0 = load i32* %p, align 2 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+@a = global [5 x i8] zeroinitializer, align 4
+
+; Constant offset from word aligned base. Expands to two 32bit loads.
+define i32 @align3() nounwind {
+entry:
+ %0 = load i32* bitcast (i8* getelementptr ([5 x i8]* @a, i32 0, i32 1) to i32*), align 1
+ ret i32 %0
+}
diff --git a/test/CodeGen/XCore/unaligned_store.ll b/test/CodeGen/XCore/unaligned_store.ll
new file mode 100644
index 0000000..62078e6
--- /dev/null
+++ b/test/CodeGen/XCore/unaligned_store.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl __misaligned_store" %t1.s | count 1
+; RUN: grep st16 %t1.s | count 2
+; RUN: grep shr %t1.s | count 1
+
+; Byte aligned store. Expands to call to __misaligned_store.
+define void @align1(i32* %p, i32 %val) nounwind {
+entry:
+ store i32 %val, i32* %p, align 1
+ ret void
+}
+
+; Half word aligned store. Expands to two 16bit stores.
+define void @align2(i32* %p, i32 %val) nounwind {
+entry:
+ store i32 %val, i32* %p, align 2
+ ret void
+}
diff --git a/test/CodeGen/XCore/unaligned_store_combine.ll b/test/CodeGen/XCore/unaligned_store_combine.ll
new file mode 100644
index 0000000..493ca6a
--- /dev/null
+++ b/test/CodeGen/XCore/unaligned_store_combine.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=xcore > %t1.s
+; RUN: grep "bl memmove" %t1.s | count 1
+; RUN: grep "ldc r., 8" %t1.s | count 1
+
+; Unaligned load / store pair. Should be combined into a memmove
+; of size 8
+define void @f(i64* %dst, i64* %src) nounwind {
+entry:
+ %0 = load i64* %src, align 1
+ store i64 %0, i64* %dst, align 1
+ ret void
+}
diff --git a/test/DebugInfo/2009-01-15-dbg_declare.ll b/test/DebugInfo/2009-01-15-dbg_declare.ll
new file mode 100644
index 0000000..ab404af
--- /dev/null
+++ b/test/DebugInfo/2009-01-15-dbg_declare.ll
@@ -0,0 +1,16 @@
+; RUN: llc %s -o /dev/null
+
+ %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }*, i8*, i8* }
[email protected] = external constant %llvm.dbg.variable.type ; <%llvm.dbg.variable.type*> [#uses=1]
+
+declare void @llvm.dbg.declare({ }*, { }*) nounwind
+
+define i32 @isascii(i32 %_c) nounwind {
+entry:
+ %j = alloca i32
+ %0 = bitcast i32* %j to { }*
+ call void @llvm.dbg.declare({ }* %0, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable24 to { }*))
+ unreachable
+}
+
+
diff --git a/test/DebugInfo/2009-01-15-member.ll b/test/DebugInfo/2009-01-15-member.ll
new file mode 100644
index 0000000..a0fb0db
--- /dev/null
+++ b/test/DebugInfo/2009-01-15-member.ll
@@ -0,0 +1,30 @@
+; RUN: llc %s -o /dev/null
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32, i8*, i8* }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
+ %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }*, i8*, i8* }
+ %llvm.dbg.derivedtype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, i8*, i8* }
+ %llvm.dbg.global_variable.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1, { }*, i8*, i8* }
+ %struct.f = type opaque
+ %struct.s = type { %struct.f*, i32 }
+@s2 = common global %struct.s zeroinitializer ; <%struct.s*> [#uses=1]
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"t.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5628) (LLVM build 2091)\00", section "llvm.metadata" ; <[57 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"s\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant [2 x i8] c"f\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([2 x i8]* @.str4, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 2, i64 0, i64 0, i64 0, i32 60, { }* null, { }* null, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* null, i32 0, i64 32, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite5 to { }*), i8* null, i8* null }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x i8] c"f1\00", section "llvm.metadata" ; <[3 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([3 x i8]* @.str6, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, i64 32, i64 32, i64 0, i32 1, { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to { }*), i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str8, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5, i8* null, i8* null }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"a\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([2 x i8]* @.str9, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 5, i64 32, i64 32, i64 32, i32 1, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x { }*] [ { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype7 to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype10 to { }*) ], section "llvm.metadata" ; <[2 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([2 x i8]* @.str3, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 3, i64 64, i64 32, i64 0, i32 0, { }* null, { }* bitcast ([2 x { }*]* @llvm.dbg.array to { }*), i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected]_variables = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [3 x i8] c"s2\00", section "llvm.metadata" ; <[3 x i8]*> [#uses=1]
[email protected]_variable = internal constant %llvm.dbg.global_variable.type { i32 458804, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.global_variables to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([3 x i8]* @.str12, i32 0, i32 0), i8* getelementptr ([3 x i8]* @.str12, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 6, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite11 to { }*), i1 false, i1 true, { }* bitcast (%struct.s* @s2 to { }*), i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.global_variable.type*> [#uses=0]
diff --git a/test/DebugInfo/2009-02-27-licm.ll b/test/DebugInfo/2009-02-27-licm.ll
new file mode 100644
index 0000000..b490a28
--- /dev/null
+++ b/test/DebugInfo/2009-02-27-licm.ll
@@ -0,0 +1,83 @@
+;RUN: opt < %s -licm -S | grep {load } | count 4
+; ModuleID = '2009-02-27-licm.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }*, i32 }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"mt19937ar.c\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [58 x i8] c"/developer2/home5/youxiangc/work/project/pr965/test-licm/\00", section "llvm.metadata" ; <[58 x i8]*> [#uses=1]
[email protected] = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5641) (LLVM build)\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([58 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+@mti = internal global i32 625 ; <i32*> [#uses=7]
[email protected] = internal constant [18 x i8] c"long unsigned int\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([18 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 7 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [2 x { }*] [{ }* null, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to { }*)], section "llvm.metadata" ; <[2 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([2 x { }*]* @llvm.dbg.array to { }*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"init_genrand\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([13 x i8]* @.str7, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str7, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 13, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite to { }*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+@mt = internal global [624 x i32] zeroinitializer, align 32 ; <[624 x i32]*> [#uses=4]
+
+define void @init_genrand(i32 %s) nounwind {
+entry:
+ tail call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ tail call void @llvm.dbg.stoppoint(i32 14, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ store i32 %s, i32* getelementptr ([624 x i32]* @mt, i32 0, i32 0), align 32
+ tail call void @llvm.dbg.stoppoint(i32 15, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ store i32 1, i32* @mti
+ tail call void @llvm.dbg.stoppoint(i32 15, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %0 = load i32* @mti, align 4 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 623 ; <i1> [#uses=1]
+ br i1 %1, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %storemerge1 = phi i32 [ %16, %bb1 ], [ 1, %bb.nph ] ; <i32> [#uses=0]
+ tail call void @llvm.dbg.stoppoint(i32 16, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %2 = load i32* @mti, align 4 ; <i32> [#uses=3]
+ %3 = add i32 %2, -1 ; <i32> [#uses=1]
+ %4 = getelementptr [624 x i32]* @mt, i32 0, i32 %3 ; <i32*> [#uses=1]
+ %5 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %6 = add i32 %2, -1 ; <i32> [#uses=1]
+ %7 = getelementptr [624 x i32]* @mt, i32 0, i32 %6 ; <i32*> [#uses=1]
+ %8 = load i32* %7, align 4 ; <i32> [#uses=1]
+ %9 = lshr i32 %8, 30 ; <i32> [#uses=1]
+ %10 = xor i32 %9, %5 ; <i32> [#uses=1]
+ %11 = mul i32 %10, 1812433253 ; <i32> [#uses=1]
+ %12 = load i32* @mti, align 4 ; <i32> [#uses=1]
+ %13 = add i32 %11, %12 ; <i32> [#uses=1]
+ %14 = getelementptr [624 x i32]* @mt, i32 0, i32 %2 ; <i32*> [#uses=1]
+ store i32 %13, i32* %14, align 4
+ tail call void @llvm.dbg.stoppoint(i32 15, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %15 = load i32* @mti, align 4 ; <i32> [#uses=1]
+ %16 = add i32 %15, 1 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %storemerge = phi i32 [ %16, %bb ] ; <i32> [#uses=1]
+ store i32 %storemerge, i32* @mti
+ tail call void @llvm.dbg.stoppoint(i32 15, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %17 = load i32* @mti, align 4 ; <i32> [#uses=1]
+ %18 = icmp sgt i32 %17, 623 ; <i1> [#uses=1]
+ br i1 %18, label %bb1.return_crit_edge, label %bb
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ tail call void @llvm.dbg.stoppoint(i32 25, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ tail call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ ret void
+}
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind
diff --git a/test/DebugInfo/2009-03-03-cheapdse.ll b/test/DebugInfo/2009-03-03-cheapdse.ll
new file mode 100644
index 0000000..9f47f16
--- /dev/null
+++ b/test/DebugInfo/2009-03-03-cheapdse.ll
@@ -0,0 +1,80 @@
+; RUN: opt < %s -instcombine -S | grep store | count 5
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ type { } ; type %0
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 }
+ %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* }
+ %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 }
+ %struct.Matrix = type { float*, i32, i32, i32, i32 }
[email protected]_units = internal constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"himenobmtxpa.c\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant [74 x i8] c"/Volumes/MacOS9/gcc/llvm/projects/llvm-test/SingleSource/Benchmarks/Misc/\00", section "llvm.metadata" ; <[74 x i8]*> [#uses=1]
[email protected] = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5641) (LLVM build)\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 1, i8* getelementptr ([15 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([74 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"float\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str3, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 4 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str5, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"Mat\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"m\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([2 x i8]* @.str93, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 46, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype92 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"mnums\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str95, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 47, i64 32, i64 32, i64 32, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"mrows\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str97, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 48, i64 32, i64 32, i64 64, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"mcols\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str99, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 49, i64 32, i64 32, i64 96, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"mdeps\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str101, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 50, i64 32, i64 32, i64 128, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype94 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype96 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype98 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype100 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype102 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str90, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 45, i64 160, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array103 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"Matrix\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str105, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 54, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite104 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype106 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype107 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array108 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"newMat\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str110, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str110, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 195, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite109 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 (%struct.Matrix*, i32, i32, i32, i32)* @newMat to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @newMat(%struct.Matrix* %Mat, i32 %mnums, i32 %mrows, i32 %mcols, i32 %mdeps) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram111 to %0*))
+ call void @llvm.dbg.stoppoint(i32 196, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %struct.Matrix* %Mat, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %mnums, i32* %0, align 4
+ call void @llvm.dbg.stoppoint(i32 197, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %1 = getelementptr %struct.Matrix* %Mat, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %mrows, i32* %1, align 4
+ call void @llvm.dbg.stoppoint(i32 198, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %2 = getelementptr %struct.Matrix* %Mat, i32 0, i32 3 ; <i32*> [#uses=1]
+ store i32 %mcols, i32* %2, align 4
+ call void @llvm.dbg.stoppoint(i32 199, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %3 = getelementptr %struct.Matrix* %Mat, i32 0, i32 4 ; <i32*> [#uses=1]
+ store i32 %mdeps, i32* %3, align 4
+ call void @llvm.dbg.stoppoint(i32 201, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %4 = mul i32 %mnums, %mrows ; <i32> [#uses=1]
+ %5 = mul i32 %4, %mcols ; <i32> [#uses=1]
+ %6 = mul i32 %5, %mdeps ; <i32> [#uses=1]
+ %7 = malloc float, i32 %6 ; <float*> [#uses=2]
+ %8 = getelementptr %struct.Matrix* %Mat, i32 0, i32 0 ; <float**> [#uses=1]
+ store float* %7, float** %8, align 4
+ call void @llvm.dbg.stoppoint(i32 204, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %9 = icmp ne float* %7, null ; <i1> [#uses=1]
+ %10 = zext i1 %9 to i32 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 204, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram111 to %0*))
+ ret i32 %10
+}
+
+declare void @llvm.dbg.func.start(%0*) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind readnone
+
+declare void @llvm.dbg.region.end(%0*) nounwind readnone
diff --git a/test/DebugInfo/2009-03-03-deadstore.ll b/test/DebugInfo/2009-03-03-deadstore.ll
new file mode 100644
index 0000000..0705c15
--- /dev/null
+++ b/test/DebugInfo/2009-03-03-deadstore.ll
@@ -0,0 +1,108 @@
+; RUN: opt < %s -instcombine -S | not grep alloca
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+ type { } ; type %0
+ type <{ i8 }> ; type %1
+ type { i32 (...)**, %3 } ; type %2
+ type { %4, %2*, i8, i8, %10*, %11*, %12*, %12* } ; type %3
+ type { i32 (...)**, i32, i32, i32, i32, i32, %5*, %6, [8 x %6], i32, %6*, %7 } ; type %4
+ type { %5*, void (i32, %4*, i32)*, i32, i32 } ; type %5
+ type { i8*, i32 } ; type %6
+ type { %8* } ; type %7
+ type { i32, %9**, i32, %9**, i8** } ; type %8
+ type { i32 (...)**, i32 } ; type %9
+ type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %7 } ; type %10
+ type { %9, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 } ; type %11
+ type { %9 } ; type %12
+ type { i32, void ()* } ; type %13
+ type { %15 } ; type %14
+ type { %16 } ; type %15
+ type { %17 } ; type %16
+ type { i32*, i32*, i32* } ; type %17
+ type { %19 } ; type %18
+ type { %20 } ; type %19
+ type { %21 } ; type %20
+ type { %14*, %14*, %14* } ; type %21
+ type { i32 } ; type %22
+ type { i8 } ; type %23
+ type { i32* } ; type %24
+ type { %14* } ; type %25
+ type { %27 } ; type %26
+ type { i8* } ; type %27
+ type { %29, %30, %3 } ; type %28
+ type { i32 (...)** } ; type %29
+ type { %10, i32, %26 } ; type %30
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 }
+ %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* }
+ %llvm.dbg.enumerator.type = type { i32, i8*, i64 }
+ %llvm.dbg.global_variable.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1, %0* }
+ %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 }
+ %llvm.dbg.subrange.type = type { i32, i64, i64 }
+ %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
+internal constant [11 x i8] c"bigfib.cpp\00", section "llvm.metadata" ; <[11 x i8]*>:0 [#uses=1]
+internal constant [84 x i8] c"/Volumes/Nanpura/mainline/llvm/projects/llvm-test/SingleSource/Benchmarks/Misc-C++/\00", section "llvm.metadata" ; <[84 x i8]*>:1 [#uses=1]
+internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 2099)\00", section "llvm.metadata" ; <[57 x i8]*>:2 [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @0, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [23 x i8] c"/usr/include/c++/4.0.0\00", section "llvm.metadata" ; <[23 x i8]*>:3 [#uses=1]
+
+
+internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*>:4 [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @4, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
+internal constant [8 x i8] c"iomanip\00", section "llvm.metadata" ; <[8 x i8]*>:5 [#uses=1]
[email protected]_unit1548 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @5, i32 0, i32 0), i8* getelementptr ([23 x i8]* @3, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [6 x i8] c"_Setw\00", section "llvm.metadata" ; <[6 x i8]*>:6 [#uses=1]
+internal constant [5 x i8] c"_M_n\00", section "llvm.metadata" ; <[5 x i8]*>:7 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @7, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 232, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1552 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @6, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 232, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array1553 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1554 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1555 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [5 x i8] c"setw\00", section "llvm.metadata" ; <[5 x i8]*>:8 [#uses=2]
+internal constant [11 x i8] c"_ZSt4setwi\00", section "llvm.metadata" ; <[11 x i8]*>:9 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @8, i32 0, i32 0), i8* getelementptr ([5 x i8]* @8, i32 0, i32 0), i8* getelementptr ([11 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 242, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1556 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+internal constant [4 x i8] c"__x\00", section "llvm.metadata" ; <[4 x i8]*>:10 [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*), i8* getelementptr ([4 x i8]* @10, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 244, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1554 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
+
+define linkonce i32 @_ZSt4setwi(i32) nounwind {
+ %2 = alloca %22 ; <%22*> [#uses=2]
+ %3 = alloca %22 ; <%22*> [#uses=3]
+ %4 = alloca %22 ; <%22*> [#uses=2]
+ %5 = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*))
+ %6 = bitcast %22* %3 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %6, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1563 to %0*))
+ call void @llvm.dbg.stoppoint(i32 245, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*))
+ %7 = getelementptr %22* %3, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %0, i32* %7, align 4
+ call void @llvm.dbg.stoppoint(i32 246, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*))
+ %8 = getelementptr %22* %4, i32 0, i32 0 ; <i32*> [#uses=1]
+ %9 = getelementptr %22* %3, i32 0, i32 0 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 4 ; <i32> [#uses=1]
+ store i32 %10, i32* %8, align 4
+ %11 = getelementptr %22* %2, i32 0, i32 0 ; <i32*> [#uses=1]
+ %12 = getelementptr %22* %4, i32 0, i32 0 ; <i32*> [#uses=1]
+ %13 = load i32* %12, align 4 ; <i32> [#uses=1]
+ store i32 %13, i32* %11, align 4
+ %14 = bitcast %22* %2 to i32* ; <i32*> [#uses=1]
+ %15 = load i32* %14 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 246, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*))
+ ret i32 %15
+}
+
+declare void @llvm.dbg.func.start(%0*) nounwind
+
+declare void @llvm.dbg.declare(%0*, %0*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind
+
+declare void @llvm.dbg.region.end(%0*) nounwind
+
diff --git a/test/DebugInfo/2009-03-03-store-to-load-forward.ll b/test/DebugInfo/2009-03-03-store-to-load-forward.ll
new file mode 100644
index 0000000..75d3a69
--- /dev/null
+++ b/test/DebugInfo/2009-03-03-store-to-load-forward.ll
@@ -0,0 +1,260 @@
+; RUN: opt < %s -instcombine -S | not grep alloca
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ type { } ; type %0
+ type <{ i8 }> ; type %1
+ type { i32* } ; type %2
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 }
+ %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* }
+ %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 }
+ %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* }
[email protected]_units = internal constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
+internal constant [11 x i8] c"bigfib.cpp\00", section "llvm.metadata" ; <[11 x i8]*>:0 [#uses=1]
+internal constant [84 x i8] c"/Volumes/Nanpura/mainline/llvm/projects/llvm-test/SingleSource/Benchmarks/Misc-C++/\00", section "llvm.metadata" ; <[84 x i8]*>:1 [#uses=1]
+internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 2099)\00", section "llvm.metadata" ; <[57 x i8]*>:2 [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @0, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [18 x i8] c"long unsigned int\00", section "llvm.metadata" ; <[18 x i8]*>:3 [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @3, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 7 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
+internal constant [69 x i8] c"/Developer/usr/llvm-gcc-4.2/lib/gcc/i686-apple-darwin9/4.2.1/include\00", section "llvm.metadata" ; <[69 x i8]*>:4 [#uses=1]
[email protected] = internal constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
+internal constant [12 x i8] c"unnamed_arg\00", section "llvm.metadata" ; <[12 x i8]*>:5 [#uses=1]
+internal constant [28 x i8] c"/usr/include/c++/4.0.0/bits\00", section "llvm.metadata" ; <[28 x i8]*>:6 [#uses=1]
+internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*>:7 [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @7, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [11 x i8] c"<built-in>\00", section "llvm.metadata" ; <[11 x i8]*>:8 [#uses=1]
[email protected]_unit112 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @8, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [10 x i8] c"ptrdiff_t\00", section "llvm.metadata" ; <[10 x i8]*>:9 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit112 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype110 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [9 x i8] c"_types.h\00", section "llvm.metadata" ; <[9 x i8]*>:10 [#uses=1]
+internal constant [18 x i8] c"/usr/include/i386\00", section "llvm.metadata" ; <[18 x i8]*>:11 [#uses=1]
[email protected]_unit117 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([18 x i8]* @11, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [10 x i8] c"__int32_t\00", section "llvm.metadata" ; <[10 x i8]*>:12 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @12, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 43, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype114 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [19 x i8] c"__darwin_ct_rune_t\00", section "llvm.metadata" ; <[19 x i8]*>:13 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @13, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 50, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype119 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [19 x i8] c"__darwin_ptrdiff_t\00", section "llvm.metadata" ; <[19 x i8]*>:14 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @14, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 81, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype121 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [17 x i8] c"__darwin_wchar_t\00", section "llvm.metadata" ; <[17 x i8]*>:15 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @15, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 96, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype123 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [16 x i8] c"__darwin_rune_t\00", section "llvm.metadata" ; <[16 x i8]*>:16 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @16, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 102, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype125 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [16 x i8] c"__darwin_wint_t\00", section "llvm.metadata" ; <[16 x i8]*>:17 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @17, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 107, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype127 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [17 x i8] c"/usr/include/sys\00", section "llvm.metadata" ; <[17 x i8]*>:18 [#uses=1]
[email protected]_unit131 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [19 x i8] c"__darwin_blksize_t\00", section "llvm.metadata" ; <[19 x i8]*>:19 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @19, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 94, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype129 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [15 x i8] c"__darwin_dev_t\00", section "llvm.metadata" ; <[15 x i8]*>:20 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @20, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype133 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [15 x i8] c"__darwin_pid_t\00", section "llvm.metadata" ; <[15 x i8]*>:21 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @21, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 110, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype135 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [21 x i8] c"__darwin_suseconds_t\00", section "llvm.metadata" ; <[21 x i8]*>:22 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([21 x i8]* @22, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 131, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype137 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [17 x i8] c"__darwin_nl_item\00", section "llvm.metadata" ; <[17 x i8]*>:23 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @23, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 135, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype139 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [13 x i8] c"/usr/include\00", section "llvm.metadata" ; <[13 x i8]*>:24 [#uses=1]
[email protected]_unit143 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([13 x i8]* @24, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [19 x i8] c"__darwin_wctrans_t\00", section "llvm.metadata" ; <[19 x i8]*>:25 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @25, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit143 to %0*), i32 29, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype141 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [7 x i8] c"wait.h\00", section "llvm.metadata" ; <[7 x i8]*>:26 [#uses=1]
[email protected]_unit147 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([7 x i8]* @26, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [6 x i8] c"pid_t\00", section "llvm.metadata" ; <[6 x i8]*>:27 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @27, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 83, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype145 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [13 x i8] c"sig_atomic_t\00", section "llvm.metadata" ; <[13 x i8]*>:28 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @28, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype149 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [10 x i8] c"ct_rune_t\00", section "llvm.metadata" ; <[10 x i8]*>:29 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @29, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 262, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype151 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [9 x i8] c"stdlib.h\00", section "llvm.metadata" ; <[9 x i8]*>:30 [#uses=1]
[email protected]_unit155 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @30, i32 0, i32 0), i8* getelementptr ([13 x i8]* @24, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [7 x i8] c"rune_t\00", section "llvm.metadata" ; <[7 x i8]*>:31 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @31, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit155 to %0*), i32 81, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype153 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [8 x i8] c"types.h\00", section "llvm.metadata" ; <[8 x i8]*>:32 [#uses=1]
[email protected]_unit159 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @32, i32 0, i32 0), i8* getelementptr ([18 x i8]* @11, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [8 x i8] c"int32_t\00", section "llvm.metadata" ; <[8 x i8]*>:33 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @33, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 85, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype157 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [11 x i8] c"register_t\00", section "llvm.metadata" ; <[11 x i8]*>:34 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @34, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype161 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [6 x i8] c"dev_t\00", section "llvm.metadata" ; <[6 x i8]*>:35 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @35, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 125, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype163 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [11 x i8] c"_structs.h\00", section "llvm.metadata" ; <[11 x i8]*>:36 [#uses=1]
[email protected]_unit167 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @36, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [12 x i8] c"suseconds_t\00", section "llvm.metadata" ; <[12 x i8]*>:37 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @37, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit167 to %0*), i32 191, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype165 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [15 x i8] c"gthr-default.h\00", section "llvm.metadata" ; <[15 x i8]*>:38 [#uses=1]
+internal constant [47 x i8] c"/usr/include/c++/4.0.0/i686-apple-darwin9/bits\00", section "llvm.metadata" ; <[47 x i8]*>:39 [#uses=1]
[email protected]_unit172 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @38, i32 0, i32 0), i8* getelementptr ([47 x i8]* @39, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [7 x i8] c"wint_t\00", section "llvm.metadata" ; <[7 x i8]*>:40 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @40, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit172 to %0*), i32 567, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype169 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [9 x i8] c"stdint.h\00", section "llvm.metadata" ; <[9 x i8]*>:41 [#uses=1]
[email protected]_unit176 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @41, i32 0, i32 0), i8* getelementptr ([69 x i8]* @4, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [14 x i8] c"int_least32_t\00", section "llvm.metadata" ; <[14 x i8]*>:42 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @42, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit176 to %0*), i32 60, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype174 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [13 x i8] c"int_fast32_t\00", section "llvm.metadata" ; <[13 x i8]*>:43 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @43, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit176 to %0*), i32 71, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype178 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [11 x i8] c"postypes.h\00", section "llvm.metadata" ; <[11 x i8]*>:44 [#uses=1]
[email protected]_unit182 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @44, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [11 x i8] c"streamsize\00", section "llvm.metadata" ; <[11 x i8]*>:45 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @45, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit182 to %0*), i32 72, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype180 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit112 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype184 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [15 x i8] c"stl_iterator.h\00", section "llvm.metadata" ; <[15 x i8]*>:46 [#uses=1]
[email protected]_unit709 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @46, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [11 x i8] c"_M_current\00", section "llvm.metadata" ; <[11 x i8]*>:47 [#uses=1]
+internal constant [18 x i8] c"__normal_iterator\00", section "llvm.metadata" ; <[18 x i8]*>:48 [#uses=1]
+internal constant [10 x i8] c"operator*\00", section "llvm.metadata" ; <[10 x i8]*>:49 [#uses=1]
+internal constant [11 x i8] c"operator->\00", section "llvm.metadata" ; <[11 x i8]*>:50 [#uses=1]
+internal constant [11 x i8] c"operator++\00", section "llvm.metadata" ; <[11 x i8]*>:51 [#uses=1]
+internal constant [11 x i8] c"operator--\00", section "llvm.metadata" ; <[11 x i8]*>:52 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype230 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [11 x i8] c"operator[]\00", section "llvm.metadata" ; <[11 x i8]*>:53 [#uses=1]
+internal constant [11 x i8] c"operator+=\00", section "llvm.metadata" ; <[11 x i8]*>:54 [#uses=1]
+internal constant [10 x i8] c"operator+\00", section "llvm.metadata" ; <[10 x i8]*>:55 [#uses=1]
+internal constant [11 x i8] c"operator-=\00", section "llvm.metadata" ; <[11 x i8]*>:56 [#uses=1]
+internal constant [10 x i8] c"operator-\00", section "llvm.metadata" ; <[10 x i8]*>:57 [#uses=1]
+internal constant [5 x i8] c"base\00", section "llvm.metadata" ; <[5 x i8]*>:58 [#uses=1]
+internal constant [18 x i8] c"cpp_type_traits.h\00", section "llvm.metadata" ; <[18 x i8]*>:59 [#uses=1]
[email protected]_unit1192 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([18 x i8]* @59, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [12 x i8] c"__true_type\00", section "llvm.metadata" ; <[12 x i8]*>:60 [#uses=1]
[email protected] = internal constant [0 x %0*] zeroinitializer, section "llvm.metadata" ; <[0 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @60, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1192 to %0*), i32 93, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([0 x %0*]* @llvm.dbg.array1195 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [106 x i8] c"__normal_iterator<long unsigned int*,std::vector<long unsigned int, std::ALLOCATOR<long unsigned int> > >\00", section "llvm.metadata" ; <[106 x i8]*>:61 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @47, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 589, i64 32, i64 32, i64 0, i32 2, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1770 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 600, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1771 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1773 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1774 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1775 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 603, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1776 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 587, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1778 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1779 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1780 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1781 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 608, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1782 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1784 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1633 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1786 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [59 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEdeEv\00", section "llvm.metadata" ; <[59 x i8]*>:62 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @49, i32 0, i32 0), i8* getelementptr ([10 x i8]* @49, i32 0, i32 0), i8* getelementptr ([59 x i8]* @62, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 613, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1787 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1790 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [59 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEptEv\00", section "llvm.metadata" ; <[59 x i8]*>:63 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @50, i32 0, i32 0), i8* getelementptr ([11 x i8]* @50, i32 0, i32 0), i8* getelementptr ([59 x i8]* @63, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 617, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1791 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1794 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1795 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEppEv\00", section "llvm.metadata" ; <[58 x i8]*>:64 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([58 x i8]* @64, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 621, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1796 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1799 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEppEi\00", section "llvm.metadata" ; <[58 x i8]*>:65 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([58 x i8]* @65, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 628, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1800 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmmEv\00", section "llvm.metadata" ; <[58 x i8]*>:66 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([58 x i8]* @66, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 633, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1796 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmmEi\00", section "llvm.metadata" ; <[58 x i8]*>:67 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([58 x i8]* @67, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 640, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1800 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1633 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1807 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEixERKi\00", section "llvm.metadata" ; <[61 x i8]*>:68 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @53, i32 0, i32 0), i8* getelementptr ([11 x i8]* @53, i32 0, i32 0), i8* getelementptr ([61 x i8]* @68, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 645, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1808 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1794 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1811 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [60 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEpLERKi\00", section "llvm.metadata" ; <[60 x i8]*>:69 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @54, i32 0, i32 0), i8* getelementptr ([11 x i8]* @54, i32 0, i32 0), i8* getelementptr ([60 x i8]* @69, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 649, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1812 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1815 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEplERKi\00", section "llvm.metadata" ; <[61 x i8]*>:70 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @55, i32 0, i32 0), i8* getelementptr ([10 x i8]* @55, i32 0, i32 0), i8* getelementptr ([61 x i8]* @70, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 653, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1816 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+internal constant [60 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmIERKi\00", section "llvm.metadata" ; <[60 x i8]*>:71 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @56, i32 0, i32 0), i8* getelementptr ([11 x i8]* @56, i32 0, i32 0), i8* getelementptr ([60 x i8]* @71, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 657, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1812 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmiERKi\00", section "llvm.metadata" ; <[61 x i8]*>:72 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @57, i32 0, i32 0), i8* getelementptr ([10 x i8]* @57, i32 0, i32 0), i8* getelementptr ([61 x i8]* @72, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 661, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1816 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1774 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1823 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [62 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEE4baseEv\00", section "llvm.metadata" ; <[62 x i8]*>:73 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @58, i32 0, i32 0), i8* getelementptr ([5 x i8]* @58, i32 0, i32 0), i8* getelementptr ([62 x i8]* @73, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 665, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1824 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [16 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1768 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1772 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1777 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1783 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1789 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1793 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1798 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1802 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1804 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1806 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1810 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1814 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1818 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1820 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1822 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1826 to %0*)], section "llvm.metadata" ; <[16 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([106 x i8]* @61, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 587, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([16 x %0*]* @llvm.dbg.array1827 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [8 x i8] c"__first\00", section "llvm.metadata" ; <[8 x i8]*>:74 [#uses=1]
+internal constant [7 x i8] c"__last\00", section "llvm.metadata" ; <[7 x i8]*>:75 [#uses=1]
+internal constant [9 x i8] c"__result\00", section "llvm.metadata" ; <[9 x i8]*>:76 [#uses=1]
+internal constant [20 x i8] c"stl_uninitialized.h\00", section "llvm.metadata" ; <[20 x i8]*>:77 [#uses=1]
[email protected]_unit2900 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([20 x i8]* @77, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1196 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array4285 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [264 x i8] c"__uninitialized_copy_aux<__gnu_cxx::__normal_iterator<long unsigned int*, std::vector<long unsigned int, std::ALLOCATOR<long unsigned int> > >, __gnu_cxx::__normal_iterator<long unsigned int*, std::vector<long unsigned int, std::ALLOCATOR<long unsigned int> > > >\00", section "llvm.metadata" ; <[264 x i8]*>:78 [#uses=1]
+internal constant [112 x i8] c"_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type\00", section "llvm.metadata" ; <[112 x i8]*>:79 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([264 x i8]* @78, i32 0, i32 0), i8* getelementptr ([264 x i8]* @78, i32 0, i32 0), i8* getelementptr ([112 x i8]* @79, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite4286 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([8 x i8]* @74, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([7 x i8]* @75, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([9 x i8]* @76, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([12 x i8]* @5, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1196 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = appending global [1 x i8*] [i8* bitcast (i32* (i32*, i32*, i32*, %1*)* @_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32* @_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type(i32*, i32*, i32*, %1* byval align 4) {
+ %5 = alloca %2 ; <%2*> [#uses=3]
+ %6 = alloca %2 ; <%2*> [#uses=3]
+ %7 = alloca %2 ; <%2*> [#uses=3]
+ %8 = alloca %2 ; <%2*> [#uses=2]
+ %9 = alloca %2 ; <%2*> [#uses=2]
+ %10 = alloca %2 ; <%2*> [#uses=2]
+ %11 = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*))
+ %12 = bitcast %2* %5 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %12, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4290 to %0*))
+ %13 = getelementptr %2* %5, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %0, i32** %13
+ %14 = bitcast %2* %6 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %14, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4291 to %0*))
+ %15 = getelementptr %2* %6, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %1, i32** %15
+ %16 = bitcast %2* %7 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %16, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4292 to %0*))
+ %17 = getelementptr %2* %7, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %2, i32** %17
+ %18 = bitcast %1* %3 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %18, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4293 to %0*))
+ call void @llvm.dbg.stoppoint(i32 74, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*))
+ %19 = getelementptr %2* %5, i32 0, i32 0 ; <i32**> [#uses=1]
+ %20 = load i32** %19 ; <i32*> [#uses=1]
+ %21 = getelementptr %2* %6, i32 0, i32 0 ; <i32**> [#uses=1]
+ %22 = load i32** %21 ; <i32*> [#uses=1]
+ %23 = getelementptr %2* %7, i32 0, i32 0 ; <i32**> [#uses=1]
+ %24 = load i32** %23 ; <i32*> [#uses=1]
+ %25 = call i32* @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_(i32* %20, i32* %22, i32* %24) ; <i32*> [#uses=1]
+ %26 = bitcast %2* %9 to i32** ; <i32**> [#uses=1]
+ store i32* %25, i32** %26, align 4
+ %27 = getelementptr %2* %10, i32 0, i32 0 ; <i32**> [#uses=1]
+ %28 = getelementptr %2* %9, i32 0, i32 0 ; <i32**> [#uses=1]
+ %29 = load i32** %28, align 4 ; <i32*> [#uses=1]
+ store i32* %29, i32** %27, align 4
+ %30 = getelementptr %2* %8, i32 0, i32 0 ; <i32**> [#uses=1]
+ %31 = getelementptr %2* %10, i32 0, i32 0 ; <i32**> [#uses=1]
+ %32 = load i32** %31, align 4 ; <i32*> [#uses=1]
+ store i32* %32, i32** %30, align 4
+ %33 = bitcast %2* %8 to i32** ; <i32**> [#uses=1]
+ %34 = load i32** %33 ; <i32*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 74, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*))
+ ret i32* %34
+}
+
+declare void @llvm.dbg.func.start(%0*) nounwind
+
+declare void @llvm.dbg.declare(%0*, %0*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind
+
+declare void @llvm.dbg.region.end(%0*) nounwind
+
+declare i32* @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_(i32*, i32*, i32*)
diff --git a/test/DebugInfo/2009-03-05-gvn.ll b/test/DebugInfo/2009-03-05-gvn.ll
new file mode 100644
index 0000000..f363132
--- /dev/null
+++ b/test/DebugInfo/2009-03-05-gvn.ll
@@ -0,0 +1,125 @@
+; RUN: opt < %s -gvn -S | grep {load } | count 1
+; ModuleID = 'db2-before.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ type { } ; type %0
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 }
+ %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* }
+ %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"mt19937ar.c\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [34 x i8] c"/developer/home2/zsth/test/debug/\00", section "llvm.metadata" ; <[34 x i8]*> [#uses=1]
[email protected] = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5641) (LLVM build)\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 1, i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([34 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+@mti = internal global i32 625 ; <i32*> [#uses=14]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"long unsigned int\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str5, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 7 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"init_genrand\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str7, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str7, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 58, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+@mt = internal global [624 x i32] zeroinitializer, align 32 ; <[624 x i32]*> [#uses=29]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array9 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"init_by_array\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str11, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str11, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 77, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite10 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype6 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array23 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"genrand_int32\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str25, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str25, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 103, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite24 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x i32] [i32 0, i32 -1727483681] ; <[2 x i32]*> [#uses=3]
[email protected] = internal constant [9 x i8] c"long int\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str35, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype36 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array37 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"genrand_int31\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str39, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str39, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 141, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite38 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"double\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str41, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 64, i64 64, i64 0, i32 0, i32 4 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype42 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array43 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"genrand_real1\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str45, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str45, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 147, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite44 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"genrand_real2\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str47, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str47, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 154, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite44 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"genrand_real3\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str49, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str49, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 161, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite44 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"genrand_res53\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str51, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str51, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 168, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite44 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array57 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"main\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str59, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str59, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 175, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite58 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [32 x i8] c"1000 outputs of genrand_int32()\00" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant [7 x i8] c"%10lu \00" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [33 x i8] c"\0A1000 outputs of genrand_real2()\00" ; <[33 x i8]*> [#uses=1]
[email protected] = internal constant [8 x i8] c"%10.8f \00" ; <[8 x i8]*> [#uses=1]
+
+define void @init_genrand(i32 %s) nounwind {
+entry:
+ tail call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %0*))
+ tail call void @llvm.dbg.stoppoint(i32 59, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ store i32 %s, i32* getelementptr ([624 x i32]* @mt, i32 0, i32 0), align 32
+ tail call void @llvm.dbg.stoppoint(i32 60, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ store i32 1, i32* @mti
+ tail call void @llvm.dbg.stoppoint(i32 60, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br i1 false, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %mti.promoted = load i32* @mti ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb1 ] ; <i32> [#uses=2]
+ %mti.tmp.0 = add i32 %indvar, %mti.promoted ; <i32> [#uses=5]
+ tail call void @llvm.dbg.stoppoint(i32 61, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = add i32 %mti.tmp.0, -1 ; <i32> [#uses=1]
+ %1 = getelementptr [624 x i32]* @mt, i32 0, i32 %0 ; <i32*> [#uses=1]
+ %2 = load i32* %1, align 4 ; <i32> [#uses=1]
+ %3 = add i32 %mti.tmp.0, -1 ; <i32> [#uses=1]
+ %4 = getelementptr [624 x i32]* @mt, i32 0, i32 %3 ; <i32*> [#uses=1]
+ %5 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %6 = lshr i32 %5, 30 ; <i32> [#uses=1]
+ %7 = xor i32 %6, %2 ; <i32> [#uses=1]
+ %8 = mul i32 %7, 1812433253 ; <i32> [#uses=1]
+ %9 = add i32 %8, %mti.tmp.0 ; <i32> [#uses=1]
+ %10 = getelementptr [624 x i32]* @mt, i32 0, i32 %mti.tmp.0 ; <i32*> [#uses=1]
+ store i32 %9, i32* %10, align 4
+ tail call void @llvm.dbg.stoppoint(i32 60, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %11 = add i32 %mti.tmp.0, 1 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ tail call void @llvm.dbg.stoppoint(i32 60, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %12 = icmp sgt i32 %11, 623 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %12, label %bb1.return_crit_edge, label %bb
+
+bb1.return_crit_edge: ; preds = %bb1
+ store i32 %11, i32* @mti
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ tail call void @llvm.dbg.stoppoint(i32 70, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ tail call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %0*))
+ ret void
+}
+
+declare void @llvm.dbg.func.start(%0*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind
+
+declare void @llvm.dbg.region.end(%0*) nounwind
+
+declare i32 @puts(i8* nocapture) nounwind
+
+declare i32 @printf(i8* noalias nocapture, ...) nounwind
+
+declare i32 @putchar(i32) nounwind
diff --git a/test/DebugInfo/2009-10-08-DebugInfo-NullGlobalVariable.ll b/test/DebugInfo/2009-10-08-DebugInfo-NullGlobalVariable.ll
new file mode 100644
index 0000000..fc28107
--- /dev/null
+++ b/test/DebugInfo/2009-10-08-DebugInfo-NullGlobalVariable.ll
@@ -0,0 +1,72 @@
+; RUN: llc < %s
+
+%struct.TConstantDictionary = type { %struct.__CFDictionary* }
+%struct.TSharedGlobalSet_AS = type { [52 x i32], [20 x i32], [22 x i32], [8 x i32], [20 x i32], [146 x i32] }
+%struct.__CFDictionary = type opaque
+
[email protected] = appending global [1 x i8*] [i8* bitcast (void ()* @func to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define void @func() ssp {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !13)
+ tail call void @llvm.dbg.stoppoint(i32 1001, i32 0, metadata !1)
+ %0 = tail call %struct.TSharedGlobalSet_AS* @g1() nounwind ; <%struct.TSharedGlobalSet_AS*> [#uses=1]
+ %1 = getelementptr inbounds %struct.TSharedGlobalSet_AS* %0, i32 0, i32 4, i32 4 ; <i32*> [#uses=1]
+ %2 = bitcast i32* %1 to %struct.TConstantDictionary* ; <%struct.TConstantDictionary*> [#uses=1]
+ tail call void @g2(%struct.TConstantDictionary* %2) ssp
+ tail call void @llvm.dbg.stoppoint(i32 1002, i32 0, metadata !1)
+ %3 = tail call %struct.TSharedGlobalSet_AS* @g1() nounwind ; <%struct.TSharedGlobalSet_AS*> [#uses=1]
+ %4 = getelementptr inbounds %struct.TSharedGlobalSet_AS* %3, i32 0, i32 4, i32 3 ; <i32*> [#uses=1]
+ %5 = bitcast i32* %4 to %struct.TConstantDictionary* ; <%struct.TConstantDictionary*> [#uses=1]
+ tail call void @g4(%struct.TConstantDictionary* %5) ssp
+ tail call void @llvm.dbg.stoppoint(i32 1003, i32 0, metadata !1)
+ %6 = tail call %struct.TSharedGlobalSet_AS* @g1() nounwind ; <%struct.TSharedGlobalSet_AS*> [#uses=1]
+ %7 = getelementptr inbounds %struct.TSharedGlobalSet_AS* %6, i32 0, i32 4, i32 2 ; <i32*> [#uses=1]
+ %8 = bitcast i32* %7 to %struct.TConstantDictionary* ; <%struct.TConstantDictionary*> [#uses=1]
+ tail call void @g3(%struct.TConstantDictionary* %8) ssp
+ tail call void @llvm.dbg.stoppoint(i32 1004, i32 0, metadata !1)
+ %9 = tail call %struct.TSharedGlobalSet_AS* @g1() nounwind ; <%struct.TSharedGlobalSet_AS*> [#uses=1]
+ %10 = getelementptr inbounds %struct.TSharedGlobalSet_AS* %9, i32 0, i32 4, i32 1 ; <i32*> [#uses=1]
+ %11 = bitcast i32* %10 to %struct.TConstantDictionary* ; <%struct.TConstantDictionary*> [#uses=1]
+ tail call void @g4(%struct.TConstantDictionary* %11) ssp
+ tail call void @llvm.dbg.stoppoint(i32 1005, i32 0, metadata !1)
+ tail call void @g5()
+ tail call void @llvm.dbg.stoppoint(i32 1006, i32 0, metadata !1)
+ tail call void @llvm.dbg.region.end(metadata !13)
+ ret void
+}
+
+declare void @llvm.dbg.func.start(metadata) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, metadata) nounwind readnone
+
+declare void @llvm.dbg.region.end(metadata) nounwind readnone
+
+declare %struct.TSharedGlobalSet_AS* @g1() nounwind readonly ssp
+
+declare void @g2(%struct.TConstantDictionary* nocapture) ssp align 2
+
+declare void @g3(%struct.TConstantDictionary* nocapture) ssp align 2
+
+declare void @g4(%struct.TConstantDictionary* nocapture) ssp align 2
+
+declare void @g5()
+
+!llvm.dbg.gv = !{!0, !9, !10, !11, !12}
+
+!0 = metadata !{i32 458804, i32 0, metadata !1, metadata !"_ZZ7UASInitmmmmmmmmmE5C.408", metadata !"C.408", metadata !"_ZZ7UASInitmmmmmmmmmE5C.408", metadata !1, i32 874, metadata !2, i1 false, i1 true, null}; [DW_TAG_variable ]
+!1 = metadata !{i32 458769, i32 0, i32 4, metadata !"func.cp", metadata !"/tmp/func", metadata !"4.2.1 (Based on Apple Inc. build 5653) (LLVM build 2311)", i1 false, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!2 = metadata !{i32 458753, metadata !3, metadata !"", metadata !3, i32 0, i64 16, i64 16, i64 0, i32 0, metadata !4, metadata !7, i32 0}; [DW_TAG_array_type ]
+!3 = metadata !{i32 458769, i32 0, i32 4, metadata !"testcase.ii", metadata !"/tmp/", metadata !"4.2.1 (Based on Apple Inc. build 5653) (LLVM build 2311)", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!4 = metadata !{i32 458774, metadata !3, metadata !"UniChar", metadata !5, i32 417, i64 0, i64 0, i64 0, i32 0, metadata !6}; [DW_TAG_typedef ]
+!5 = metadata !{i32 458769, i32 0, i32 4, metadata !"MacTypes.h", metadata !"/System/Library/Frameworks/CoreServices.framework/Headers/../Frameworks/CarbonCore.framework/Headers", metadata !"4.2.1 (Based on Apple Inc. build 5653) (LLVM build 2311)", i1 false, i1 true, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!6 = metadata !{i32 458788, metadata !3, metadata !"short unsigned int", metadata !3, i32 0, i64 16, i64 16, i64 0, i32 0, i32 7}; [DW_TAG_base_type ]
+!7 = metadata !{metadata !8}
+!8 = metadata !{i32 458785, i64 0, i64 0}; [DW_TAG_subrange_type ]
+!9 = metadata !{i32 458804, i32 0, metadata !1, metadata !"_ZZ7UASInitmmmmmmmmmE5C.409", metadata !"C.409", metadata !"_ZZ7UASInitmmmmmmmmmE5C.409", metadata !1, i32 877, metadata !2, i1 false, i1 true, null}; [DW_TAG_variable ]
+!10 = metadata !{i32 458804, i32 0, metadata !1, metadata !"_ZZ7UASInitmmmmmmmmmE5C.410", metadata !"C.410", metadata !"_ZZ7UASInitmmmmmmmmmE5C.410", metadata !1, i32 880, metadata !2, i1 false, i1 true, null}; [DW_TAG_variable ]
+!11 = metadata !{i32 458804, i32 0, metadata !1, metadata !"_ZZ7UASInitmmmmmmmmmE5C.411", metadata !"C.411", metadata !"_ZZ7UASInitmmmmmmmmmE5C.411", metadata !1, i32 924, metadata !2, i1 false, i1 true, null}; [DW_TAG_variable ]
+!12 = metadata !{i32 458804, i32 0, metadata !1, metadata !"_ZZ7UASInitmmmmmmmmmE5C.412", metadata !"C.412", metadata !"_ZZ7UASInitmmmmmmmmmE5C.412", metadata !1, i32 928, metadata !2, i1 false, i1 true, null}; [DW_TAG_variable ]
+!13 = metadata !{i32 458798, i32 0, metadata !3, metadata !"UASShutdown", metadata !"UASShutdown", metadata !"_Z11UASShutdownv", metadata !1, i32 999, metadata !14, i1 false, i1 true}; [DW_TAG_subprogram ]
+!14 = metadata !{i32 458773, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0}; [DW_TAG_subroutine_type ]
+!15 = metadata !{null}
diff --git a/test/DebugInfo/2009-10-16-Phi.ll b/test/DebugInfo/2009-10-16-Phi.ll
new file mode 100644
index 0000000..fc03751
--- /dev/null
+++ b/test/DebugInfo/2009-10-16-Phi.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -disable-output
+
+define i32 @foo() {
+E:
+ br label %B2
+B1:
+ br label %B2
+B2:
+ %0 = phi i32 [ 0, %E ], [ 1, %B1 ], !dbg !0
+ ret i32 %0
+}
+
+!0 = metadata !{i32 42}
\ No newline at end of file
diff --git a/test/DebugInfo/2009-10-16-Scope.ll b/test/DebugInfo/2009-10-16-Scope.ll
new file mode 100644
index 0000000..9f9fa65
--- /dev/null
+++ b/test/DebugInfo/2009-10-16-Scope.ll
@@ -0,0 +1,32 @@
+; RUN: llc %s -O0 -o /dev/null
+; PR 5197
+; There is not any llvm instruction assocated with !5. The code generator
+; should be able to handle this.
+
+define void @bar() nounwind ssp {
+entry:
+ %count_ = alloca i32, align 4 ; <i32*> [#uses=2]
+ br label %do.body, !dbg !0
+
+do.body: ; preds = %entry
+ call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4)
+ %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; <i32> [#uses=1]
+ %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; <i32> [#uses=0]
+ br label %do.end, !dbg !0
+
+do.end: ; preds = %do.body
+ ret void, !dbg !7
+}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+declare i32 @foo(i32) ssp
+
+!0 = metadata !{i32 5, i32 2, metadata !1, null}
+!1 = metadata !{i32 458763, metadata !2}; [DW_TAG_lexical_block ]
+!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"bar", metadata !"bar", metadata !"bar", metadata !3, i32 4, null, i1 false, i1 true}; [DW_TAG_subprogram ]
+!3 = metadata !{i32 458769, i32 0, i32 12, metadata !"genmodes.i", metadata !"/Users/yash/Downloads", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!4 = metadata !{i32 459008, metadata !5, metadata !"count_", metadata !3, i32 5, metadata !6}; [ DW_TAG_auto_variable ]
+!5 = metadata !{i32 458763, metadata !1}; [DW_TAG_lexical_block ]
+!6 = metadata !{i32 458788, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ]
+!7 = metadata !{i32 6, i32 1, metadata !2, null}
diff --git a/test/DebugInfo/2009-11-03-InsertExtractValue.ll b/test/DebugInfo/2009-11-03-InsertExtractValue.ll
new file mode 100644
index 0000000..d9a67d6
--- /dev/null
+++ b/test/DebugInfo/2009-11-03-InsertExtractValue.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+
+!0 = metadata !{i32 42}
+
+define <{i32, i32}> @f1() {
+; CHECK: !dbg !0
+ %r = insertvalue <{ i32, i32 }> zeroinitializer, i32 4, 1, !dbg !0
+; CHECK: !dbg !0
+ %e = extractvalue <{ i32, i32 }> %r, 0, !dbg !0
+ ret <{ i32, i32 }> %r
+}
diff --git a/test/DebugInfo/2009-11-05-DeadGlobalVariable.ll b/test/DebugInfo/2009-11-05-DeadGlobalVariable.ll
new file mode 100644
index 0000000..c7838c5
--- /dev/null
+++ b/test/DebugInfo/2009-11-05-DeadGlobalVariable.ll
@@ -0,0 +1,17 @@
+; RUN: llc %s -o /dev/null
+; Here variable bar is optimzied away. Do not trip over while trying to generate debug info.
+
+define i32 @foo() nounwind readnone optsize ssp {
+entry:
+ ret i32 42, !dbg !6
+}
+
+!llvm.dbg.gv = !{!0}
+
+!0 = metadata !{i32 458804, i32 0, metadata !1, metadata !"foo.bar", metadata !"foo.bar", metadata !"foo.bar", metadata !2, i32 3, metadata !5, i1 true, i1 true, null}; [DW_TAG_variable ]
+!1 = metadata !{i32 458798, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 2, metadata !3, i1 false, i1 true}; [DW_TAG_subprogram ]
+!2 = metadata !{i32 458769, i32 0, i32 12, metadata !"st.c", metadata !"/private/tmp", metadata !"clang 1.1", i1 true, i1 true, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!3 = metadata !{i32 458773, metadata !2, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0}; [DW_TAG_subroutine_type ]
+!4 = metadata !{metadata !5}
+!5 = metadata !{i32 458788, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ]
+!6 = metadata !{i32 5, i32 1, metadata !1, null}
diff --git a/test/DebugInfo/2009-11-06-InvalidDerivedType.ll b/test/DebugInfo/2009-11-06-InvalidDerivedType.ll
new file mode 100644
index 0000000..73211bb
--- /dev/null
+++ b/test/DebugInfo/2009-11-06-InvalidDerivedType.ll
@@ -0,0 +1,13 @@
+; RUN: llc %s -o /dev/null
+%struct._t = type { i32 }
+
+@s1 = common global %struct._t zeroinitializer, align 4 ; <%struct._t*> [#uses=0]
+
+!llvm.dbg.gv = !{!0}
+
+!0 = metadata !{i32 458804, i32 0, metadata !1, metadata !"s1", metadata !"s1", metadata !"s1", metadata !1, i32 3, metadata !2, i1 false, i1 true, %struct._t* @s1}; [DW_TAG_variable ]
+!1 = metadata !{i32 458769, i32 0, i32 12, metadata !"t.c", metadata !"/tmp", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!2 = metadata !{i32 458771, metadata !1, metadata !"_t", metadata !1, i32 1, i64 32, i64 32, i64 0, i32 0, null, metadata !3, i32 0}; [DW_TAG_structure_type ]
+!3 = metadata !{metadata !4}
+!4 = metadata !{i32 458765, metadata !1, metadata !"j", metadata !1, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !5}; [DW_TAG_member ]
+!5 = metadata !{i32 458790, metadata !1, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, null}; [DW_TAG_const_type ]
diff --git a/test/DebugInfo/2009-11-06-NamelessGlobalVariable.ll b/test/DebugInfo/2009-11-06-NamelessGlobalVariable.ll
new file mode 100644
index 0000000..739def8
--- /dev/null
+++ b/test/DebugInfo/2009-11-06-NamelessGlobalVariable.ll
@@ -0,0 +1,8 @@
+; RUN: llc %s -o /dev/null
+@0 = internal constant i32 1 ; <i32*> [#uses=1]
+
+!llvm.dbg.gv = !{!0}
+
+!0 = metadata !{i32 458804, i32 0, metadata !1, metadata !"", metadata !"", metadata !"", metadata !1, i32 378, metadata !2, i1 true, i1 true, i32* @0}; [DW_TAG_variable ]
+!1 = metadata !{i32 458769, i32 0, i32 1, metadata !"cbdsqr.f", metadata !"/home/duncan/LLVM/dragonegg/unsolved/", metadata !"4.5.0 20091030 (experimental)", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!2 = metadata !{i32 458788, metadata !1, metadata !"integer(kind=4)", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ]
diff --git a/test/DebugInfo/2009-11-10-CurrentFn.ll b/test/DebugInfo/2009-11-10-CurrentFn.ll
new file mode 100644
index 0000000..250395c
--- /dev/null
+++ b/test/DebugInfo/2009-11-10-CurrentFn.ll
@@ -0,0 +1,20 @@
+; RUN: llc < %s -o /dev/null
+
+declare void @foo()
+
+define void @bar(i32 %i) nounwind ssp {
+entry:
+ tail call void @foo() nounwind, !dbg !0
+ ret void, !dbg !6
+}
+
+!0 = metadata !{i32 9, i32 0, metadata !1, null}
+!1 = metadata !{i32 458798, i32 0, metadata !2, metadata !"baz", metadata !"baz", metadata !"baz", metadata !2, i32 8, metadata !3, i1 true, i1 true}; [DW_TAG_subprogram ]
+!2 = metadata !{i32 458769, i32 0, i32 1, metadata !"2007-12-VarArrayDebug.c", metadata !"/Volumes/Data/ddunbar/llvm/test/FrontendC", metadata !"4.2.1 (Based on Apple Inc. build 5653) (LLVM build)", i1 true, i1 true, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!3 = metadata !{i32 458773, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0}; [DW_TAG_subroutine_type ]
+!4 = metadata !{null, metadata !5}
+!5 = metadata !{i32 458788, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ]
+!6 = metadata !{i32 18, i32 0, metadata !7, null}
+!7 = metadata !{i32 458798, i32 0, metadata !2, metadata !"bar", metadata !"bar", metadata !"bar", metadata !2, i32 16, metadata !8, i1 false, i1 true}; [DW_TAG_subprogram ]
+!8 = metadata !{i32 458773, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !9, i32 0}; [DW_TAG_subroutine_type ]
+!9 = metadata !{null}
diff --git a/test/DebugInfo/2009-11-10-ParentScope.ll b/test/DebugInfo/2009-11-10-ParentScope.ll
new file mode 100644
index 0000000..df5155f
--- /dev/null
+++ b/test/DebugInfo/2009-11-10-ParentScope.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -o /dev/null
+%struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i64, i64, i64, i32, i32, i8* (i64, i64)*, void (i8*)*, i8*, i8* (i8*, i64, i64)*, void (i8*, i8*)*, i32, [4 x i8] }
+
+define i8* @htab_find_with_hash(%struct.htab* %htab, i8* %element, i32 %hash) nounwind {
+entry:
+ br i1 undef, label %land.lhs.true, label %if.end, !dbg !0
+
+land.lhs.true: ; preds = %entry
+ unreachable
+
+if.end: ; preds = %entry
+ store i8* undef, i8** undef, !dbg !7
+ ret i8* undef, !dbg !10
+}
+
+!0 = metadata !{i32 571, i32 3, metadata !1, null}
+!1 = metadata !{i32 458763, metadata !2}; [DW_TAG_lexical_block ]
+!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"htab_find_with_hash", metadata !"htab_find_with_hash", metadata !"htab_find_with_hash", metadata !3, i32 561, metadata !4, i1 false, i1 true}; [DW_TAG_subprogram ]
+!3 = metadata !{i32 458769, i32 0, i32 12, metadata !"hashtab.c", metadata !"/usr/src/gnu/usr.bin/cc/cc_tools/../../../../contrib/gcclibs/libiberty", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!4 = metadata !{i32 458773, metadata !3, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0}; [DW_TAG_subroutine_type ]
+!5 = metadata !{metadata !6}
+!6 = metadata !{i32 458767, metadata !3, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, null}; [DW_TAG_pointer_type ]
+!7 = metadata !{i32 583, i32 7, metadata !8, null}
+!8 = metadata !{i32 458763, metadata !9}; [DW_TAG_lexical_block ]
+!9 = metadata !{i32 458763, metadata !1}; [DW_TAG_lexical_block ]
+!10 = metadata !{i32 588, i32 1, metadata !2, null}
diff --git a/test/DebugInfo/2010-01-05-DbgScope.ll b/test/DebugInfo/2010-01-05-DbgScope.ll
new file mode 100644
index 0000000..8cf20e3
--- /dev/null
+++ b/test/DebugInfo/2010-01-05-DbgScope.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -o /dev/null
+; PR 5942
+define i8* @foo() nounwind {
+entry:
+ %0 = load i32* undef, align 4, !dbg !0 ; <i32> [#uses=1]
+ %1 = inttoptr i32 %0 to i8*, !dbg !0 ; <i8*> [#uses=1]
+ ret i8* %1, !dbg !10
+
+}
+
+!0 = metadata !{i32 571, i32 3, metadata !1, null}
+!1 = metadata !{i32 458763, metadata !2}; [DW_TAG_lexical_block ]
+!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"foo", metadata !"foo", metadata !"foo", metadata !3, i32 561, metadata !4, i1 false, i1 true}; [DW_TAG_subprogram ]
+!3 = metadata !{i32 458769, i32 0, i32 12, metadata !"hashtab.c", metadata !"/usr/src/gnu/usr.bin/cc/cc_tools/../../../../contrib/gcclibs/libiberty", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ]
+!4 = metadata !{i32 458773, metadata !3, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0}; [DW_TAG_subroutine_type ]
+!5 = metadata !{metadata !6}
+!6 = metadata !{i32 458788, metadata !3, metadata !"char", metadata !3, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ]
+!10 = metadata !{i32 588, i32 1, metadata !2, null}
diff --git a/test/DebugInfo/2010-01-18-DbgValue.ll b/test/DebugInfo/2010-01-18-DbgValue.ll
new file mode 100644
index 0000000..ff97b18
--- /dev/null
+++ b/test/DebugInfo/2010-01-18-DbgValue.ll
@@ -0,0 +1,55 @@
+; RUN: llc -O0 < %s | FileCheck %s
+; ModuleID = 'try.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+target triple = "i386-apple-darwin9.8"
+; Currently, dbg.declare generates a DEBUG_VALUE comment. Eventually it will
+; generate DWARF and this test will need to be modified or removed.
+
+@Y = common global i32 0 ; <i32*> [#uses=1]
+
+define i32 @test() nounwind {
+entry:
+; CHECK: DEBUG_VALUE:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %X = alloca i32 ; <i32*> [#uses=5]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.declare(metadata !{i32* %X}, metadata !3), !dbg !7
+ store i32 4, i32* %X, align 4, !dbg !8
+ %1 = load i32* %X, align 4, !dbg !9 ; <i32> [#uses=1]
+ call void @use(i32 %1) nounwind, !dbg !9
+ %2 = load i32* @Y, align 4, !dbg !10 ; <i32> [#uses=1]
+ %3 = add nsw i32 %2, 2, !dbg !10 ; <i32> [#uses=1]
+ store i32 %3, i32* %X, align 4, !dbg !10
+ %4 = load i32* %X, align 4, !dbg !11 ; <i32> [#uses=1]
+ call void @use(i32 %4) nounwind, !dbg !11
+ %5 = load i32* %X, align 4, !dbg !12 ; <i32> [#uses=1]
+ store i32 %5, i32* %0, align 4, !dbg !12
+ %6 = load i32* %0, align 4, !dbg !12 ; <i32> [#uses=1]
+ store i32 %6, i32* %retval, align 4, !dbg !12
+ br label %return, !dbg !12
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval, !dbg !12 ; <i32> [#uses=1]
+ ret i32 %retval1, !dbg !12
+}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+declare void @use(i32)
+
+!llvm.dbg.gv = !{!0}
+
+!0 = metadata !{i32 458804, i32 0, metadata !1, metadata !"Y", metadata !"Y", metadata !"Y", metadata !1, i32 2, metadata !2, i1 false, i1 true, i32* @Y} ; [ DW_TAG_variable ]
+!1 = metadata !{i32 458769, i32 0, i32 1, metadata !"try.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
+!2 = metadata !{i32 458788, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
+!3 = metadata !{i32 459008, metadata !4, metadata !"X", metadata !1, i32 4, metadata !2} ; [ DW_TAG_auto_variable ]
+!4 = metadata !{i32 458798, i32 0, metadata !1, metadata !"", metadata !"", metadata !"test", metadata !1, i32 3, metadata !5, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ]
+!5 = metadata !{i32 458773, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0} ; [ DW_TAG_subroutine_type ]
+!6 = metadata !{metadata !2}
+!7 = metadata !{i32 3, i32 0, metadata !4, null}
+!8 = metadata !{i32 4, i32 0, metadata !4, null}
+!9 = metadata !{i32 5, i32 0, metadata !4, null}
+!10 = metadata !{i32 6, i32 0, metadata !4, null}
+!11 = metadata !{i32 7, i32 0, metadata !4, null}
+!12 = metadata !{i32 8, i32 0, metadata !4, null}
diff --git a/test/DebugInfo/2010-01-19-DbgScope.ll b/test/DebugInfo/2010-01-19-DbgScope.ll
new file mode 100644
index 0000000..7afb5a5
--- /dev/null
+++ b/test/DebugInfo/2010-01-19-DbgScope.ll
@@ -0,0 +1,28 @@
+; RUN: llc -O0 < %s -o /dev/null
+; Ignore unreachable scopes.
+declare void @foo(i32) noreturn
+
+define i32 @bar() nounwind ssp {
+entry:
+ br i1 undef, label %bb, label %bb11, !dbg !0
+
+bb: ; preds = %entry
+ call void @foo(i32 0) noreturn nounwind, !dbg !7
+ unreachable, !dbg !7
+
+bb11: ; preds = %entry
+ ret i32 1, !dbg !11
+}
+
+!0 = metadata !{i32 8647, i32 0, metadata !1, null}
+!1 = metadata !{i32 458763, metadata !2} ; [ DW_TAG_lexical_block ]
+!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"bar", metadata !"bar", metadata !"bar", metadata !3, i32 8639, metadata !4, i1 true, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ]
+!3 = metadata !{i32 458769, i32 0, i32 1, metadata !"c-parser.c", metadata !"llvmgcc", metadata !"LLVM build 00", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
+!4 = metadata !{i32 458773, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0} ; [ DW_TAG_subroutine_type ]
+!5 = metadata !{metadata !6}
+!6 = metadata !{i32 458788, metadata !3, metadata !"char", metadata !3, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ]
+!7 = metadata !{i32 8648, i32 0, metadata !8, null}
+!8 = metadata !{i32 458763, metadata !9} ; [ DW_TAG_lexical_block ]
+!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ]
+!10 = metadata !{i32 458798, i32 0, metadata !3, metadata !"bar2", metadata !"bar2", metadata !"bar2", metadata !3, i32 8639, metadata !4, i1 true, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ]
+!11 = metadata !{i32 8652, i32 0, metadata !1, null}
diff --git a/test/DebugInfo/2010-02-01-DbgValueCrash.ll b/test/DebugInfo/2010-02-01-DbgValueCrash.ll
new file mode 100644
index 0000000..70103e5
--- /dev/null
+++ b/test/DebugInfo/2010-02-01-DbgValueCrash.ll
@@ -0,0 +1,34 @@
+; RUN: llc -O1 < %s
+; ModuleID = 'pr6157.bc'
+target triple = "x86_64-unknown-linux-gnu"
+; formerly crashed in SelectionDAGBuilder
+
+%tart.reflect.ComplexType = type { double, double }
+
[email protected] = constant %tart.reflect.ComplexType { double 3.0, double 2.0 }
+
+define i32 @"main(tart.core.String[])->int32"(i32 %args) {
+entry:
+ tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8)
+ tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2]
+ ret i32 3
+}
+
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone
+
+!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
+!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ]
+!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ]
+!3 = metadata !{metadata !4, metadata !6, metadata !7}
+!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ]
+!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ]
+!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ]
+!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ]
+!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ]
+!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ]
+!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ]
+!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!12 = metadata !{metadata !13}
+!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
+!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest}
diff --git a/test/DebugInfo/deaddebuglabel.ll b/test/DebugInfo/deaddebuglabel.ll
new file mode 100644
index 0000000..a9af12b
--- /dev/null
+++ b/test/DebugInfo/deaddebuglabel.ll
@@ -0,0 +1,62 @@
+; RUN: llc %s -o - -O0 | grep "label" | count 8
+; PR2614
+; XFAIL: *
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
+ %llvm.dbg.compositetype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }* }
+ %llvm.dbg.derivedtype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }* }
+ %llvm.dbg.global_variable.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1, { }* }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected]_variables = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=0]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"deaddebuglabel.d\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant [50 x i8] c"/home/kamm/eigenes/projekte/llvmdc/llvmdc/mytests\00", section "llvm.metadata" ; <[50 x i8]*> [#uses=1]
[email protected] = internal constant [48 x i8] c"LLVMDC (http://www.dsource.org/projects/llvmdc)\00", section "llvm.metadata" ; <[48 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type {
+ i32 393233,
+ { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*),
+ i32 2,
+ i8* getelementptr ([17 x i8]* @.str, i32 0, i32 0),
+ i8* getelementptr ([50 x i8]* @.str1, i32 0, i32 0),
+ i8* getelementptr ([48 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [20 x i8] c"deaddebuglabel.main\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"main\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type {
+ i32 393262,
+ { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*),
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i8* getelementptr ([20 x i8]* @.str5, i32 0, i32 0),
+ i8* getelementptr ([20 x i8]* @.str5, i32 0, i32 0),
+ i8* getelementptr ([5 x i8]* @.str6, i32 0, i32 0),
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i32 3,
+ { }* null,
+ i1 false,
+ i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind
+
+define fastcc i32 @main() {
+entry.main:
+ call void @llvm.dbg.func.start( { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram7 to { }*) )
+ br i1 true, label %reachable, label %unreachable
+
+reachable: ; preds = %entry.main
+ call void @llvm.dbg.region.end( { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram7 to { }*) )
+ ret i32 1
+
+unreachable: ; preds = %entry.main
+ call void @llvm.dbg.stoppoint( i32 7, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ call void @llvm.dbg.region.end( { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram7 to { }*) )
+ ret i32 0
+}
diff --git a/test/DebugInfo/dg.exp b/test/DebugInfo/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/DebugInfo/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/DebugInfo/funccall.ll b/test/DebugInfo/funccall.ll
new file mode 100644
index 0000000..e44b029
--- /dev/null
+++ b/test/DebugInfo/funccall.ll
@@ -0,0 +1,147 @@
+;; RUN: llc < %s
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
+ %llvm.dbg.global_variable.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1, { }* }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected]_variables = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type {
+ i32 393262,
+ { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*),
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i8* getelementptr ([4 x i8]* @str, i32 0, i32 0),
+ i8* getelementptr ([4 x i8]* @str, i32 0, i32 0),
+ i8* null,
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i32 4,
+ { }* null,
+ i1 false,
+ i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+@str = internal constant [4 x i8] c"foo\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type {
+ i32 393233,
+ { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*),
+ i32 1,
+ i8* getelementptr ([11 x i8]* @str1, i32 0, i32 0),
+ i8* getelementptr ([50 x i8]* @str2, i32 0, i32 0),
+ i8* getelementptr ([45 x i8]* @str3, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+@str1 = internal constant [11 x i8] c"funccall.c\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
+@str2 = internal constant [50 x i8] c"/Volumes/Big2/llvm/llvm/test/Regression/Debugger/\00", section "llvm.metadata" ; <[50 x i8]*> [#uses=1]
+@str3 = internal constant [45 x i8] c"4.0.1 LLVM (Apple Computer, Inc. build 5421)\00", section "llvm.metadata" ; <[45 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type {
+ i32 393472,
+ { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*),
+ i8* getelementptr ([2 x i8]* @str4, i32 0, i32 0),
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i32 5,
+ { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
+@str4 = internal constant [2 x i8] c"t\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type {
+ i32 393252,
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i8* getelementptr ([4 x i8]* @str15, i32 0, i32 0),
+ { }* null,
+ i32 0,
+ i64 32,
+ i64 32,
+ i64 0,
+ i32 0,
+ i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
+@str15 = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type {
+ i32 393262,
+ { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*),
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i8* getelementptr ([5 x i8]* @str6, i32 0, i32 0),
+ i8* getelementptr ([5 x i8]* @str6, i32 0, i32 0),
+ i8* null,
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i32 8,
+ { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*),
+ i1 false,
+ i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+@str6 = internal constant [5 x i8] c"main\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type {
+ i32 393474,
+ { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram2 to { }*),
+ i8* getelementptr ([7 x i8]* @str7, i32 0, i32 0),
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i32 8,
+ { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
+@str7 = internal constant [7 x i8] c"retval\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected]_variable = internal constant %llvm.dbg.global_variable.type {
+ i32 393268,
+ { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.global_variables to { }*),
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i8* getelementptr ([2 x i8]* @str4, i32 0, i32 0),
+ i8* getelementptr ([2 x i8]* @str4, i32 0, i32 0),
+ i8* null,
+ { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*),
+ i32 2,
+ { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*),
+ i1 true,
+ i1 true,
+ { }* bitcast (i32* @q to { }*) }, section "llvm.metadata" ; <%llvm.dbg.global_variable.type*> [#uses=0]
[email protected] = internal constant [2 x i8] c"q\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=0]
+@q = internal global i32 0 ; <i32*> [#uses=7]
+
+declare void @llvm.dbg.func.start({ }*)
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*)
+
+declare void @llvm.dbg.declare({ }*, { }*)
+
+declare void @llvm.dbg.region.start({ }*)
+
+declare void @llvm.dbg.region.end({ }*)
+
+define void @foo() {
+entry:
+ %t = alloca i32, align 4 ; <i32*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start( { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*) )
+ call void @llvm.dbg.stoppoint( i32 4, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ %t.upgrd.2 = bitcast i32* %t to { }* ; <{ }*> [#uses=1]
+ call void @llvm.dbg.declare( { }* %t.upgrd.2, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable to { }*) )
+ call void @llvm.dbg.stoppoint( i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ %tmp = load i32* @q ; <i32> [#uses=1]
+ store i32 %tmp, i32* %t
+ call void @llvm.dbg.stoppoint( i32 6, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ %tmp1 = load i32* %t ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
+ store i32 %tmp2, i32* @q
+ call void @llvm.dbg.stoppoint( i32 7, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ call void @llvm.dbg.region.end( { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*) )
+ ret void
+}
+
+define i32 @main() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=3]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start( { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram2 to { }*) )
+ call void @llvm.dbg.stoppoint( i32 8, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ %retval.upgrd.3 = bitcast i32* %retval to { }* ; <{ }*> [#uses=1]
+ call void @llvm.dbg.declare( { }* %retval.upgrd.3, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable3 to { }*) )
+ call void @llvm.dbg.stoppoint( i32 9, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ store i32 0, i32* @q
+ call void @llvm.dbg.stoppoint( i32 10, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ call void (...)* bitcast (void ()* @foo to void (...)*)( )
+ call void @llvm.dbg.stoppoint( i32 11, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ %tmp.upgrd.4 = load i32* @q ; <i32> [#uses=1]
+ %tmp1 = sub i32 %tmp.upgrd.4, 1 ; <i32> [#uses=1]
+ store i32 %tmp1, i32* @q
+ call void @llvm.dbg.stoppoint( i32 13, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ %tmp2 = load i32* @q ; <i32> [#uses=1]
+ store i32 %tmp2, i32* %tmp
+ %tmp3 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp3, i32* %retval
+ %retval.upgrd.5 = load i32* %retval ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint( i32 14, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*) )
+ call void @llvm.dbg.region.end( { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram2 to { }*) )
+ ret i32 %retval.upgrd.5
+}
diff --git a/test/DebugInfo/globalGetElementPtr.ll b/test/DebugInfo/globalGetElementPtr.ll
new file mode 100644
index 0000000..155deb7
--- /dev/null
+++ b/test/DebugInfo/globalGetElementPtr.ll
@@ -0,0 +1,264 @@
+; RUN: llc < %s
+; ModuleID = 'foo.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, %struct.anon*, i8*, %struct.anon*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, %struct.anon*, i32, i8*, i8*, i8* }
+ %llvm.dbg.compositetype.type = type { i32, %struct.anon*, i8*, %struct.anon*, i32, i64, i64, i64, i32, %struct.anon*, %struct.anon* }
+ %llvm.dbg.derivedtype.type = type { i32, %struct.anon*, i8*, %struct.anon*, i32, i64, i64, i64, i32, %struct.anon* }
+ %llvm.dbg.global_variable.type = type { i32, %struct.anon*, %struct.anon*, i8*, i8*, i8*, %struct.anon*, i32, %struct.anon*, i1, i1, %struct.anon* }
+ %llvm.dbg.subprogram.type = type { i32, %struct.anon*, %struct.anon*, i8*, i8*, i8*, %struct.anon*, i32, %struct.anon*, i1, i1 }
+ %llvm.dbg.subrange.type = type { i32, i64, i64 }
+ %llvm.dbg.variable.type = type { i32, %struct.anon*, i8*, %struct.anon*, i32, %struct.anon* }
+ %struct.S271 = type { [0 x %struct.anon], %struct.anon }
+ %struct.anon = type { }
[email protected] = internal constant %llvm.dbg.subprogram.type {
+ i32 393262,
+ %struct.anon* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %struct.anon*),
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0),
+ i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0),
+ i8* null,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 2,
+ %struct.anon* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to %struct.anon*),
+ i1 false,
+ i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type {
+ i32 393233,
+ %struct.anon* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %struct.anon*),
+ i32 1,
+ i8* getelementptr ([6 x i8]* @.str, i32 0, i32 0),
+ i8* getelementptr ([23 x i8]* @.str1, i32 0, i32 0),
+ i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"foo.c\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [23 x i8] c"/Volumes/MacOS9/tests/\00", section "llvm.metadata" ; <[23 x i8]*> [#uses=1]
[email protected] = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5546) (LLVM build)\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected] = internal constant [4 x i8] c"var\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type {
+ i32 393231,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* null,
+ %struct.anon* null,
+ i32 0,
+ i64 32,
+ i64 32,
+ i64 0,
+ i32 0,
+ %struct.anon* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type {
+ i32 393252,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* getelementptr ([5 x i8]* @.str4, i32 0, i32 0),
+ %struct.anon* null,
+ i32 0,
+ i64 8,
+ i64 8,
+ i64 0,
+ i32 0,
+ i32 6 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"char\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type {
+ i32 393474,
+ %struct.anon* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %struct.anon*),
+ i8* getelementptr ([7 x i8]* @.str5, i32 0, i32 0),
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 2,
+ %struct.anon* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"retval\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
+@a271 = weak global [0 x %struct.S271] zeroinitializer ; <[0 x %struct.S271]*> [#uses=3]
[email protected] = internal constant %llvm.dbg.subprogram.type {
+ i32 393262,
+ %struct.anon* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %struct.anon*),
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* getelementptr ([5 x i8]* @.str7, i32 0, i32 0),
+ i8* getelementptr ([5 x i8]* @.str7, i32 0, i32 0),
+ i8* null,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 3,
+ %struct.anon* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype8 to %struct.anon*),
+ i1 false,
+ i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"main\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type {
+ i32 393252,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* getelementptr ([4 x i8]* @.str9, i32 0, i32 0),
+ %struct.anon* null,
+ i32 0,
+ i64 32,
+ i64 32,
+ i64 0,
+ i32 0,
+ i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type {
+ i32 393474,
+ %struct.anon* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram6 to %struct.anon*),
+ i8* getelementptr ([7 x i8]* @.str5, i32 0, i32 0),
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 3,
+ %struct.anon* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype8 to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected]_variable = internal constant %llvm.dbg.global_variable.type {
+ i32 393268,
+ %struct.anon* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.global_variables to %struct.anon*),
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* getelementptr ([5 x i8]* @.str11, i32 0, i32 0),
+ i8* getelementptr ([5 x i8]* @.str11, i32 0, i32 0),
+ i8* null,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 1,
+ %struct.anon* bitcast (%llvm.dbg.compositetype.type* @llvm.dbg.compositetype to %struct.anon*),
+ i1 false,
+ i1 true,
+ %struct.anon* getelementptr ([0 x %struct.S271]* @a271, i32 0, i32 0, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.global_variable.type*> [#uses=0]
[email protected]_variables = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"a271\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.compositetype.type {
+ i32 393217,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* null,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 0,
+ i64 0,
+ i64 8,
+ i64 0,
+ i32 0,
+ %struct.anon* bitcast (%llvm.dbg.compositetype.type* @llvm.dbg.compositetype12 to %struct.anon*),
+ %struct.anon* bitcast ([1 x %struct.anon*]* @llvm.dbg.array25 to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.compositetype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.compositetype.type {
+ i32 393235,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* getelementptr ([5 x i8]* @.str13, i32 0, i32 0),
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 1,
+ i64 0,
+ i64 8,
+ i64 0,
+ i32 0,
+ %struct.anon* null,
+ %struct.anon* bitcast ([2 x %struct.anon*]* @llvm.dbg.array23 to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.compositetype.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"S271\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type {
+ i32 393229,
+ %struct.anon* null,
+ i8* getelementptr ([2 x i8]* @.str15, i32 0, i32 0),
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 1,
+ i64 0,
+ i64 8,
+ i64 0,
+ i32 0,
+ %struct.anon* bitcast (%llvm.dbg.compositetype.type* @llvm.dbg.compositetype16 to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"a\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.compositetype.type {
+ i32 393217,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* null,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 0,
+ i64 0,
+ i64 8,
+ i64 0,
+ i32 0,
+ %struct.anon* bitcast (%llvm.dbg.compositetype.type* @llvm.dbg.compositetype17 to %struct.anon*),
+ %struct.anon* bitcast ([1 x %struct.anon*]* @llvm.dbg.array18 to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.compositetype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.compositetype.type {
+ i32 393235,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* null,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 1,
+ i64 0,
+ i64 8,
+ i64 0,
+ i32 0,
+ %struct.anon* null,
+ %struct.anon* bitcast ([0 x %struct.anon*]* @llvm.dbg.array to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.compositetype.type*> [#uses=1]
[email protected] = internal constant [0 x %struct.anon*] zeroinitializer, section "llvm.metadata" ; <[0 x %struct.anon*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subrange.type {
+ i32 393249,
+ i64 0,
+ i64 4 }, section "llvm.metadata" ; <%llvm.dbg.subrange.type*> [#uses=1]
[email protected] = internal constant [1 x %struct.anon*] [ %struct.anon* bitcast (%llvm.dbg.subrange.type* @llvm.dbg.subrange to %struct.anon*) ], section "llvm.metadata" ; <[1 x %struct.anon*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type {
+ i32 393229,
+ %struct.anon* null,
+ i8* getelementptr ([2 x i8]* @.str20, i32 0, i32 0),
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 1,
+ i64 0,
+ i64 8,
+ i64 0,
+ i32 0,
+ %struct.anon* bitcast (%llvm.dbg.compositetype.type* @llvm.dbg.compositetype21 to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"b\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.compositetype.type {
+ i32 393235,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i8* null,
+ %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*),
+ i32 1,
+ i64 0,
+ i64 8,
+ i64 0,
+ i32 0,
+ %struct.anon* null,
+ %struct.anon* bitcast ([0 x %struct.anon*]* @llvm.dbg.array22 to %struct.anon*) }, section "llvm.metadata" ; <%llvm.dbg.compositetype.type*> [#uses=1]
[email protected] = internal constant [0 x %struct.anon*] zeroinitializer, section "llvm.metadata" ; <[0 x %struct.anon*]*> [#uses=1]
[email protected] = internal constant [2 x %struct.anon*] [ %struct.anon* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype14 to %struct.anon*), %struct.anon* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype19 to %struct.anon*) ], section "llvm.metadata" ; <[2 x %struct.anon*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subrange.type {
+ i32 393249,
+ i64 0,
+ i64 4 }, section "llvm.metadata" ; <%llvm.dbg.subrange.type*> [#uses=1]
[email protected] = internal constant [1 x %struct.anon*] [ %struct.anon* bitcast (%llvm.dbg.subrange.type* @llvm.dbg.subrange24 to %struct.anon*) ], section "llvm.metadata" ; <[1 x %struct.anon*]*> [#uses=1]
+
+define i8* @var() {
+entry:
+ %retval = alloca i8* ; <i8**> [#uses=3]
+ %tmp = alloca i8* ; <i8**> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start( %struct.anon* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %struct.anon*) )
+ call void @llvm.dbg.stoppoint( i32 2, i32 0, %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*) )
+ %retval1 = bitcast i8** %retval to %struct.anon* ; <%struct.anon*> [#uses=1]
+ call void @llvm.dbg.declare( %struct.anon* %retval1, %struct.anon* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable to %struct.anon*) )
+ bitcast %struct.S271* getelementptr ([0 x %struct.S271]* @a271, i32 0, i32 0) to i8* ; <i8*>:0 [#uses=0]
+ store i8* bitcast ([0 x %struct.S271]* @a271 to i8*), i8** %tmp, align 4
+ %tmp2 = load i8** %tmp, align 4 ; <i8*> [#uses=1]
+ store i8* %tmp2, i8** %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval3 = load i8** %retval ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint( i32 2, i32 0, %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*) )
+ call void @llvm.dbg.region.end( %struct.anon* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %struct.anon*) )
+ ret i8* %retval3
+}
+
+declare void @llvm.dbg.func.start(%struct.anon*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, %struct.anon*) nounwind
+
+declare void @llvm.dbg.declare(%struct.anon*, %struct.anon*) nounwind
+
+declare void @llvm.dbg.region.end(%struct.anon*) nounwind
+
+define i32 @main() {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start( %struct.anon* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram6 to %struct.anon*) )
+ call void @llvm.dbg.stoppoint( i32 3, i32 0, %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*) )
+ %retval1 = bitcast i32* %retval to %struct.anon* ; <%struct.anon*> [#uses=1]
+ call void @llvm.dbg.declare( %struct.anon* %retval1, %struct.anon* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable10 to %struct.anon*) )
+ br label %return
+
+return: ; preds = %entry
+ %retval2 = load i32* %retval ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint( i32 3, i32 0, %struct.anon* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %struct.anon*) )
+ call void @llvm.dbg.region.end( %struct.anon* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram6 to %struct.anon*) )
+ ret i32 %retval2
+}
diff --git a/test/DebugInfo/printdbginfo2.ll b/test/DebugInfo/printdbginfo2.ll
new file mode 100644
index 0000000..e19395b
--- /dev/null
+++ b/test/DebugInfo/printdbginfo2.ll
@@ -0,0 +1,66 @@
+; RUN: opt < %s -print-dbginfo -disable-output | FileCheck %s
+; grep {%b is variable b of type x declared at x.c:7} %t1
+; grep {%2 is variable b of type x declared at x.c:7} %t1
+; grep {@c.1442 is variable c of type int declared at x.c:4} %t1
+
+%struct.foo = type { i32 }
+
[email protected] = internal global i32 5 ; <i32*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=3]
+ %b = alloca %struct.foo, align 4 ; <%struct.foo*> [#uses=2]
+; CHECK:; %b is variable b of type foo declared at x.c:7
+ %a = alloca [4 x i32], align 4 ; <[4 x i32]*> [#uses=1]
+; CHECK:; %a is variable a of type declared at x.c:8
+ call void @llvm.dbg.func.start(metadata !3)
+ store i32 0, i32* %retval
+ call void @llvm.dbg.stoppoint(i32 6, i32 3, metadata !1)
+ call void @llvm.dbg.stoppoint(i32 7, i32 3, metadata !1)
+ %0 = bitcast %struct.foo* %b to { }* ; <{ }*> [#uses=1]
+ call void @llvm.dbg.declare(metadata !{%struct.foo* %b}, metadata !4)
+; CHECK:; %0 is variable b of type foo declared at x.c:7
+ call void @llvm.dbg.stoppoint(i32 8, i32 3, metadata !1)
+ %1 = bitcast [4 x i32]* %a to { }* ; <{ }*> [#uses=1]
+ call void @llvm.dbg.declare(metadata !{[4 x i32]* %a}, metadata !8)
+; CHECK:; %1 is variable a of type declared at x.c:8
+ call void @llvm.dbg.stoppoint(i32 9, i32 3, metadata !1)
+ %tmp = getelementptr inbounds %struct.foo* %b, i32 0, i32 0 ; <i32*> [#uses=1]
+; CHECK:; %tmp is variable b of type foo declared at x.c:7
+ store i32 5, i32* %tmp
+ call void @llvm.dbg.stoppoint(i32 10, i32 3, metadata !1)
+ %tmp1 = load i32* @main.c ; <i32> [#uses=1]
+; CHECK:; @main.c is variable c of type int declared at x.c:6
+ store i32 %tmp1, i32* %retval
+ br label %2
+
+; <label>:2 ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 11, i32 1, metadata !1)
+ call void @llvm.dbg.region.end(metadata !3)
+ %3 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %3
+}
+
+declare void @llvm.dbg.func.start(metadata) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, metadata) nounwind readnone
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+declare void @llvm.dbg.region.end(metadata) nounwind readnone
+
+!llvm.dbg.gv = !{!0}
+
+!0 = metadata !{i32 458804, i32 0, metadata !1, metadata !"c", metadata !"c", metadata !"", metadata !1, i32 6, metadata !2, i1 true, i1 true, i32* @main.c}
+!1 = metadata !{i32 458769, i32 0, i32 12, metadata !"x.c", metadata !"/home/edwin/llvm-git/llvm/test/DebugInfo", metadata !"clang 1.0", i1 true, i1 false, metadata !"", i32 0}
+!2 = metadata !{i32 458788, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}
+!3 = metadata !{i32 458798, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 5, metadata !2, i1 false, i1 true}
+!4 = metadata !{i32 459008, metadata !3, metadata !"b", metadata !1, i32 7, metadata !5}
+!5 = metadata !{i32 458771, metadata !1, metadata !"foo", metadata !1, i32 1, i64 32, i64 32, i64 0, i32 0, null, metadata !6, i32 0}
+!6 = metadata !{metadata !7}
+!7 = metadata !{i32 458765, metadata !1, metadata !"a", metadata !1, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !2}
+!8 = metadata !{i32 459008, metadata !3, metadata !"a", metadata !1, i32 8, metadata !9}
+!9 = metadata !{i32 458753, metadata !1, metadata !"", null, i32 0, i64 128, i64 32, i64 0, i32 0, metadata !2, metadata !10, i32 0}
+!10 = metadata !{metadata !11}
+!11 = metadata !{i32 458785, i64 0, i64 3}
diff --git a/test/ExecutionEngine/2002-12-16-ArgTest.ll b/test/ExecutionEngine/2002-12-16-ArgTest.ll
new file mode 100644
index 0000000..4551969
--- /dev/null
+++ b/test/ExecutionEngine/2002-12-16-ArgTest.ll
@@ -0,0 +1,38 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
[email protected] = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1]
+
+declare i32 @puts(i8*)
+
+define void @getoptions(i32* %argc) {
+bb0:
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main(i32 %argc, i8** %argv) {
+bb0:
+ call i32 (i8*, ...)* @printf( i8* getelementptr ([10 x i8]* @.LC0, i64 0, i64 0), i32 %argc ) ; <i32>:0 [#uses=0]
+ %cast224 = bitcast i8** %argv to i8* ; <i8*> [#uses=1]
+ %local = alloca i8* ; <i8**> [#uses=3]
+ store i8* %cast224, i8** %local
+ %cond226 = icmp sle i32 %argc, 0 ; <i1> [#uses=1]
+ br i1 %cond226, label %bb3, label %bb2
+bb2: ; preds = %bb2, %bb0
+ %cann-indvar = phi i32 [ 0, %bb0 ], [ %add1-indvar, %bb2 ] ; <i32> [#uses=2]
+ %add1-indvar = add i32 %cann-indvar, 1 ; <i32> [#uses=2]
+ %cann-indvar-idxcast = sext i32 %cann-indvar to i64 ; <i64> [#uses=1]
+ %CT = bitcast i8** %local to i8*** ; <i8***> [#uses=1]
+ %reg115 = load i8*** %CT ; <i8**> [#uses=1]
+ %cast235 = getelementptr i8** %reg115, i64 %cann-indvar-idxcast ; <i8**> [#uses=1]
+ %reg117 = load i8** %cast235 ; <i8*> [#uses=1]
+ %reg236 = call i32 @puts( i8* %reg117 ) ; <i32> [#uses=0]
+ %cond239 = icmp slt i32 %add1-indvar, %argc ; <i1> [#uses=1]
+ br i1 %cond239, label %bb2, label %bb3
+bb3: ; preds = %bb2, %bb0
+ %cast243 = bitcast i8** %local to i32* ; <i32*> [#uses=1]
+ call void @getoptions( i32* %cast243 )
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/2003-01-04-ArgumentBug.ll b/test/ExecutionEngine/2003-01-04-ArgumentBug.ll
new file mode 100644
index 0000000..5d37e96
--- /dev/null
+++ b/test/ExecutionEngine/2003-01-04-ArgumentBug.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @foo(i32 %X, i32 %Y, double %A) {
+ %cond212 = fcmp une double %A, 1.000000e+00 ; <i1> [#uses=1]
+ %cast110 = zext i1 %cond212 to i32 ; <i32> [#uses=1]
+ ret i32 %cast110
+}
+
+define i32 @main() {
+ %reg212 = call i32 @foo( i32 0, i32 1, double 1.000000e+00 ) ; <i32> [#uses=1]
+ ret i32 %reg212
+}
+
diff --git a/test/ExecutionEngine/2003-01-04-LoopTest.ll b/test/ExecutionEngine/2003-01-04-LoopTest.ll
new file mode 100644
index 0000000..653cf79
--- /dev/null
+++ b/test/ExecutionEngine/2003-01-04-LoopTest.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+ call i32 @mylog( i32 4 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
+define internal i32 @mylog(i32 %num) {
+bb0:
+ br label %bb2
+bb2: ; preds = %bb2, %bb0
+ %reg112 = phi i32 [ 10, %bb2 ], [ 1, %bb0 ] ; <i32> [#uses=1]
+ %cann-indvar = phi i32 [ %cann-indvar, %bb2 ], [ 0, %bb0 ] ; <i32> [#uses=1]
+ %reg114 = add i32 %reg112, 1 ; <i32> [#uses=2]
+ %cond222 = icmp slt i32 %reg114, %num ; <i1> [#uses=1]
+ br i1 %cond222, label %bb2, label %bb3
+bb3: ; preds = %bb2
+ ret i32 %reg114
+}
+
diff --git a/test/ExecutionEngine/2003-01-04-PhiTest.ll b/test/ExecutionEngine/2003-01-04-PhiTest.ll
new file mode 100644
index 0000000..b5c9d81
--- /dev/null
+++ b/test/ExecutionEngine/2003-01-04-PhiTest.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %X = phi i32 [ 0, %0 ], [ 1, %Loop ] ; <i32> [#uses=1]
+ br i1 true, label %Out, label %Loop
+Out: ; preds = %Loop
+ ret i32 %X
+}
+
diff --git a/test/ExecutionEngine/2003-01-09-SARTest.ll b/test/ExecutionEngine/2003-01-09-SARTest.ll
new file mode 100644
index 0000000..8147897
--- /dev/null
+++ b/test/ExecutionEngine/2003-01-09-SARTest.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; We were accidentally inverting the signedness of right shifts. Whoops.
+
+define i32 @main() {
+ %X = ashr i32 -1, 16 ; <i32> [#uses=1]
+ %Y = ashr i32 %X, 16 ; <i32> [#uses=1]
+ %Z = add i32 %Y, 1 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/ExecutionEngine/2003-01-10-FUCOM.ll b/test/ExecutionEngine/2003-01-10-FUCOM.ll
new file mode 100644
index 0000000..d996fa5
--- /dev/null
+++ b/test/ExecutionEngine/2003-01-10-FUCOM.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+ %X = fadd double 0.000000e+00, 1.000000e+00 ; <double> [#uses=1]
+ %Y = fsub double 0.000000e+00, 1.000000e+00 ; <double> [#uses=2]
+ %Z = fcmp oeq double %X, %Y ; <i1> [#uses=0]
+ fadd double %Y, 0.000000e+00 ; <double>:1 [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/2003-01-15-AlignmentTest.ll b/test/ExecutionEngine/2003-01-15-AlignmentTest.ll
new file mode 100644
index 0000000..a55d74d
--- /dev/null
+++ b/test/ExecutionEngine/2003-01-15-AlignmentTest.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @bar(i8* %X) {
+ ; pointer should be 4 byte aligned!
+ %P = alloca double ; <double*> [#uses=1]
+ %R = ptrtoint double* %P to i32 ; <i32> [#uses=1]
+ %A = and i32 %R, 3 ; <i32> [#uses=1]
+ ret i32 %A
+}
+
+define i32 @main() {
+ %SP = alloca i8 ; <i8*> [#uses=1]
+ %X = add i32 0, 0 ; <i32> [#uses=1]
+ alloca i8, i32 %X ; <i8*>:1 [#uses=0]
+ call i32 @bar( i8* %SP ) ; <i32>:2 [#uses=1]
+ ret i32 %2
+}
diff --git a/test/ExecutionEngine/2003-05-06-LivenessClobber.ll b/test/ExecutionEngine/2003-05-06-LivenessClobber.ll
new file mode 100644
index 0000000..57fe95b
--- /dev/null
+++ b/test/ExecutionEngine/2003-05-06-LivenessClobber.ll
@@ -0,0 +1,19 @@
+; This testcase shoudl return with an exit code of 1.
+;
+; RUN: llvm-as < %s | not lli
+
+@test = global i64 0 ; <i64*> [#uses=1]
+
+define internal i64 @test.upgrd.1() {
+ %tmp.0 = load i64* @test ; <i64> [#uses=1]
+ %tmp.1 = add i64 %tmp.0, 1 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i32 @main() {
+ %L = call i64 @test.upgrd.1( ) ; <i64> [#uses=1]
+ %I = trunc i64 %L to i32 ; <i32> [#uses=1]
+ ret i32 %I
+}
+
+
diff --git a/test/ExecutionEngine/2003-05-07-ArgumentTest.ll b/test/ExecutionEngine/2003-05-07-ArgumentTest.ll
new file mode 100644
index 0000000..fa15d71
--- /dev/null
+++ b/test/ExecutionEngine/2003-05-07-ArgumentTest.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | lli - test
+
+declare i32 @puts(i8*)
+
+define i32 @main(i32 %argc.1, i8** %argv.1) {
+ %tmp.5 = getelementptr i8** %argv.1, i64 1 ; <i8**> [#uses=1]
+ %tmp.6 = load i8** %tmp.5 ; <i8*> [#uses=1]
+ %tmp.0 = call i32 @puts( i8* %tmp.6 ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/2003-05-11-PHIRegAllocBug.ll b/test/ExecutionEngine/2003-05-11-PHIRegAllocBug.ll
new file mode 100644
index 0000000..5a13b21
--- /dev/null
+++ b/test/ExecutionEngine/2003-05-11-PHIRegAllocBug.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+target datalayout = "e-p:32:32"
+
+define i32 @main() {
+entry:
+ br label %endif
+then: ; No predecessors!
+ br label %endif
+endif: ; preds = %then, %entry
+ %x = phi i32 [ 4, %entry ], [ 27, %then ] ; <i32> [#uses=0]
+ %result = phi i32 [ 32, %then ], [ 0, %entry ] ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/2003-06-04-bzip2-bug.ll b/test/ExecutionEngine/2003-06-04-bzip2-bug.ll
new file mode 100644
index 0000000..6e2da70
--- /dev/null
+++ b/test/ExecutionEngine/2003-06-04-bzip2-bug.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; Testcase distilled from 256.bzip2.
+
+target datalayout = "e-p:32:32"
+
+define i32 @main() {
+entry:
+ br label %loopentry.0
+loopentry.0: ; preds = %loopentry.0, %entry
+ %h.0 = phi i32 [ %tmp.2, %loopentry.0 ], [ -1, %entry ] ; <i32> [#uses=1]
+ %tmp.2 = add i32 %h.0, 1 ; <i32> [#uses=3]
+ %tmp.4 = icmp ne i32 %tmp.2, 0 ; <i1> [#uses=1]
+ br i1 %tmp.4, label %loopentry.0, label %loopentry.1
+loopentry.1: ; preds = %loopentry.0
+ %h.1 = phi i32 [ %tmp.2, %loopentry.0 ] ; <i32> [#uses=1]
+ ret i32 %h.1
+}
+
diff --git a/test/ExecutionEngine/2003-06-05-PHIBug.ll b/test/ExecutionEngine/2003-06-05-PHIBug.ll
new file mode 100644
index 0000000..50b48da4
--- /dev/null
+++ b/test/ExecutionEngine/2003-06-05-PHIBug.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; Testcase distilled from 256.bzip2.
+
+target datalayout = "e-p:32:32"
+
+define i32 @main() {
+entry:
+ %X = add i32 1, -1 ; <i32> [#uses=3]
+ br label %Next
+Next: ; preds = %entry
+ %A = phi i32 [ %X, %entry ] ; <i32> [#uses=0]
+ %B = phi i32 [ %X, %entry ] ; <i32> [#uses=0]
+ %C = phi i32 [ %X, %entry ] ; <i32> [#uses=1]
+ ret i32 %C
+}
+
diff --git a/test/ExecutionEngine/2003-08-15-AllocaAssertion.ll b/test/ExecutionEngine/2003-08-15-AllocaAssertion.ll
new file mode 100644
index 0000000..6c90b33
--- /dev/null
+++ b/test/ExecutionEngine/2003-08-15-AllocaAssertion.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; This testcase failed to work because two variable sized allocas confused the
+; local register allocator.
+
+define i32 @main(i32 %X) {
+ %A = alloca i32, i32 %X ; <i32*> [#uses=0]
+ %B = alloca float, i32 %X ; <float*> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll b/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll
new file mode 100644
index 0000000..3a4a4e4
--- /dev/null
+++ b/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+;
+; Regression Test: EnvironmentTest.ll
+;
+; Description:
+; This is a regression test that verifies that the JIT passes the
+; environment to the main() function.
+;
+
+
+declare i32 @strlen(i8*)
+
+define i32 @main(i32 %argc.1, i8** %argv.1, i8** %envp.1) {
+ %tmp.2 = load i8** %envp.1 ; <i8*> [#uses=1]
+ %tmp.3 = call i32 @strlen( i8* %tmp.2 ) ; <i32> [#uses=1]
+ %T = icmp eq i32 %tmp.3, 0 ; <i1> [#uses=1]
+ %R = zext i1 %T to i32 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
diff --git a/test/ExecutionEngine/2003-08-23-RegisterAllocatePhysReg.ll b/test/ExecutionEngine/2003-08-23-RegisterAllocatePhysReg.ll
new file mode 100644
index 0000000..b165a1c
--- /dev/null
+++ b/test/ExecutionEngine/2003-08-23-RegisterAllocatePhysReg.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; This testcase exposes a bug in the local register allocator where it runs out
+; of registers (due to too many overlapping live ranges), but then attempts to
+; use the ESP register (which is not allocatable) to hold a value.
+
+define i32 @main(i32 %A) {
+ ; ESP gets used again...
+ %Ap2 = alloca i32, i32 %A ; <i32*> [#uses=11]
+ ; Produce lots of overlapping live ranges
+ %B = add i32 %A, 1 ; <i32> [#uses=1]
+ %C = add i32 %A, 2 ; <i32> [#uses=1]
+ %D = add i32 %A, 3 ; <i32> [#uses=1]
+ %E = add i32 %A, 4 ; <i32> [#uses=1]
+ %F = add i32 %A, 5 ; <i32> [#uses=1]
+ %G = add i32 %A, 6 ; <i32> [#uses=1]
+ %H = add i32 %A, 7 ; <i32> [#uses=1]
+ %I = add i32 %A, 8 ; <i32> [#uses=1]
+ %J = add i32 %A, 9 ; <i32> [#uses=1]
+ %K = add i32 %A, 10 ; <i32> [#uses=1]
+ ; Uses of all of the values
+ store i32 %A, i32* %Ap2
+ store i32 %B, i32* %Ap2
+ store i32 %C, i32* %Ap2
+ store i32 %D, i32* %Ap2
+ store i32 %E, i32* %Ap2
+ store i32 %F, i32* %Ap2
+ store i32 %G, i32* %Ap2
+ store i32 %H, i32* %Ap2
+ store i32 %I, i32* %Ap2
+ store i32 %J, i32* %Ap2
+ store i32 %K, i32* %Ap2
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll b/test/ExecutionEngine/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll
new file mode 100644
index 0000000..aa9d7e7
--- /dev/null
+++ b/test/ExecutionEngine/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+@A = global i32 0 ; <i32*> [#uses=1]
+
+define i32 @main() {
+ %Ret = call i32 @test( i1 true, i32 0 ) ; <i32> [#uses=1]
+ ret i32 %Ret
+}
+
+define i32 @test(i1 %c, i32 %A) {
+ br i1 %c, label %Taken1, label %NotTaken
+Cont: ; preds = %Taken1, %NotTaken
+ %V = phi i32 [ 0, %NotTaken ], [ sub (i32 ptrtoint (i32* @A to i32), i32 1234), %Taken1 ] ; <i32> [#uses=0]
+ ret i32 0
+NotTaken: ; preds = %0
+ br label %Cont
+Taken1: ; preds = %0
+ %B = icmp eq i32 %A, 0 ; <i1> [#uses=1]
+ br i1 %B, label %Cont, label %ExitError
+ExitError: ; preds = %Taken1
+ ret i32 12
+}
+
diff --git a/test/ExecutionEngine/2005-12-02-TailCallBug.ll b/test/ExecutionEngine/2005-12-02-TailCallBug.ll
new file mode 100644
index 0000000..59a40ae
--- /dev/null
+++ b/test/ExecutionEngine/2005-12-02-TailCallBug.ll
@@ -0,0 +1,21 @@
+; PR672
+; RUN: llvm-as < %s | lli
+
+define i32 @main() {
+ %f = bitcast i32 (i32, i32*, i32)* @check_tail to i32* ; <i32*> [#uses=1]
+ %res = tail call fastcc i32 @check_tail( i32 10, i32* %f, i32 10 ) ; <i32> [#uses=1]
+ ret i32 %res
+}
+
+define fastcc i32 @check_tail(i32 %x, i32* %f, i32 %g) {
+ %tmp1 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %tmp1, label %if-then, label %if-else
+if-then: ; preds = %0
+ %fun_ptr = bitcast i32* %f to i32 (i32, i32*, i32)* ; <i32 (i32, i32*, i32)*> [#uses=1]
+ %arg1 = add i32 %x, -1 ; <i32> [#uses=1]
+ %res = tail call fastcc i32 %fun_ptr( i32 %arg1, i32* %f, i32 %g ) ; <i32> [#uses=1]
+ ret i32 %res
+if-else: ; preds = %0
+ ret i32 %x
+}
+
diff --git a/test/ExecutionEngine/2007-12-10-APIntLoadStore.ll b/test/ExecutionEngine/2007-12-10-APIntLoadStore.ll
new file mode 100644
index 0000000..f347f5d
--- /dev/null
+++ b/test/ExecutionEngine/2007-12-10-APIntLoadStore.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as %s -o - | lli -force-interpreter
+; PR1836
+
+define i32 @main() {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %tmp = alloca i32 ; <i32*> [#uses=2]
+ %x = alloca i75, align 16 ; <i75*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i75 999, i75* %x, align 16
+ store i32 0, i32* %tmp, align 4
+ %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ store i32 %tmp1, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval2 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval2
+}
diff --git a/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll b/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll
new file mode 100644
index 0000000..e7e434f
--- /dev/null
+++ b/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll
@@ -0,0 +1,60 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli -force-interpreter=true %t.bc | grep 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
[email protected] = internal constant [10 x i8] c"MSB = %d\0A\00" ; <[10 x i8]*> [#uses=1]
+
+define i65 @foo(i65 %x) {
+entry:
+ %x_addr = alloca i65 ; <i65*> [#uses=2]
+ %retval = alloca i65 ; <i65*> [#uses=2]
+ %tmp = alloca i65 ; <i65*> [#uses=2]
+ %"alloca point" = bitcast i65 0 to i65 ; <i65> [#uses=0]
+ store i65 %x, i65* %x_addr
+ %tmp1 = load i65* %x_addr, align 4 ; <i65> [#uses=1]
+ %tmp2 = ashr i65 %tmp1, 65 ; <i65> [#uses=1]
+ store i65 %tmp2, i65* %tmp, align 4
+ %tmp3 = load i65* %tmp, align 4 ; <i65> [#uses=1]
+ store i65 %tmp3, i65* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval4 = load i65* %retval ; <i65> [#uses=1]
+ ret i65 %retval4
+}
+
+define i32 @main() {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=1]
+ %iftmp.0 = alloca i32 ; <i32*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = call i65 @foo( i65 -9 ) ; <i65> [#uses=1]
+ %tmp1 = lshr i65 %tmp, 64 ; <i65> [#uses=1]
+ %tmp2 = xor i65 %tmp1, 1 ; <i65> [#uses=1]
+ %tmp3 = and i65 %tmp2, 1 ; <i65> [#uses=1]
+ %tmp34 = trunc i65 %tmp3 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ store i32 0, i32* %iftmp.0, align 4
+ br label %cond_next
+
+cond_false: ; preds = %entry
+ store i32 1, i32* %iftmp.0, align 4
+ br label %cond_next
+
+cond_next: ; preds = %cond_false, %cond_true
+ %tmp5 = getelementptr [10 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp6 = load i32* %iftmp.0, align 4 ; <i32> [#uses=1]
+ %tmp7 = call i32 (i8*, ...)* @printf( i8* noalias %tmp5, i32 %tmp6 ) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next
+ store i32 0, i32* %retval, align 4
+ %retval8 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval8
+}
+
+declare i32 @printf(i8* noalias , ...) nounwind
diff --git a/test/ExecutionEngine/2010-01-15-UndefValue.ll b/test/ExecutionEngine/2010-01-15-UndefValue.ll
new file mode 100644
index 0000000..7d646eb
--- /dev/null
+++ b/test/ExecutionEngine/2010-01-15-UndefValue.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli -force-interpreter=true %t.bc
+
+define i32 @main() {
+ %a = add i32 0, undef
+ %b = add float 0.0, undef
+ %c = add double 0.0, undef
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/dg.exp b/test/ExecutionEngine/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/ExecutionEngine/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/ExecutionEngine/fpbitcast.ll b/test/ExecutionEngine/fpbitcast.ll
new file mode 100644
index 0000000..34ca129
--- /dev/null
+++ b/test/ExecutionEngine/fpbitcast.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: lli -force-interpreter=true %t.bc | grep 40091eb8
+;
+define i32 @test(double %x) {
+entry:
+ %x46.i = bitcast double %x to i64
+ %tmp343.i = lshr i64 %x46.i, 32
+ %tmp344.i = trunc i64 %tmp343.i to i32
+ ret i32 %tmp344.i
+}
+
+define i32 @main()
+{
+ %res = call i32 @test(double 3.14)
+ %ptr = getelementptr [4 x i8]* @format, i32 0, i32 0
+ call i32 (i8*,...)* @printf(i8* %ptr, i32 %res)
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
+@format = internal constant [4 x i8] c"%x\0A\00"
diff --git a/test/ExecutionEngine/hello.ll b/test/ExecutionEngine/hello.ll
new file mode 100644
index 0000000..fad36ed
--- /dev/null
+++ b/test/ExecutionEngine/hello.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
[email protected] = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1]
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %reg210 = call i32 @puts( i8* getelementptr ([12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/hello2.ll b/test/ExecutionEngine/hello2.ll
new file mode 100644
index 0000000..7ca0d882
--- /dev/null
+++ b/test/ExecutionEngine/hello2.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+@X = global i32 7 ; <i32*> [#uses=0]
+@msg = internal global [13 x i8] c"Hello World\0A\00" ; <[13 x i8]*> [#uses=1]
+
+declare void @printf([13 x i8]*, ...)
+
+define void @bar() {
+ call void ([13 x i8]*, ...)* @printf( [13 x i8]* @msg )
+ ret void
+}
+
+define i32 @main() {
+ call void @bar( )
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/simplesttest.ll b/test/ExecutionEngine/simplesttest.ll
new file mode 100644
index 0000000..5d9cf76
--- /dev/null
+++ b/test/ExecutionEngine/simplesttest.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/simpletest.ll b/test/ExecutionEngine/simpletest.ll
new file mode 100644
index 0000000..53fb79c
--- /dev/null
+++ b/test/ExecutionEngine/simpletest.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @bar() {
+ ret i32 0
+}
+
+define i32 @main() {
+ %r = call i32 @bar( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
diff --git a/test/ExecutionEngine/stubs.ll b/test/ExecutionEngine/stubs.ll
new file mode 100644
index 0000000..525d135
--- /dev/null
+++ b/test/ExecutionEngine/stubs.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as < %s | lli -disable-lazy-compilation=false
+
+define i32 @main() nounwind {
+entry:
+ call void @lazily_compiled_address_is_consistent()
+ ret i32 0
+}
+
+; Test PR3043: @test should have the same address before and after
+; it's JIT-compiled.
+@funcPtr = common global i1 ()* null, align 4
+@lcaic_failure = internal constant [46 x i8] c"@lazily_compiled_address_is_consistent failed\00"
+
+define void @lazily_compiled_address_is_consistent() nounwind {
+entry:
+ store i1 ()* @test, i1 ()** @funcPtr
+ %pass = tail call i1 @test() ; <i32> [#uses=1]
+ br i1 %pass, label %pass_block, label %fail_block
+pass_block:
+ ret void
+fail_block:
+ call i32 @puts(i8* getelementptr([46 x i8]* @lcaic_failure, i32 0, i32 0))
+ call void @exit(i32 1)
+ unreachable
+}
+
+define i1 @test() nounwind {
+entry:
+ %tmp = load i1 ()** @funcPtr
+ %eq = icmp eq i1 ()* %tmp, @test
+ ret i1 %eq
+}
+
+declare i32 @puts(i8*) noreturn
+declare void @exit(i32) noreturn
diff --git a/test/ExecutionEngine/test-arith.ll b/test/ExecutionEngine/test-arith.ll
new file mode 100644
index 0000000..8c51e6b
--- /dev/null
+++ b/test/ExecutionEngine/test-arith.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+ %A = add i8 0, 12 ; <i8> [#uses=1]
+ %B = sub i8 %A, 1 ; <i8> [#uses=2]
+ %C = mul i8 %B, %B ; <i8> [#uses=2]
+ %D = sdiv i8 %C, %C ; <i8> [#uses=2]
+ %E = srem i8 %D, %D ; <i8> [#uses=0]
+ %F = udiv i8 5, 6 ; <i8> [#uses=0]
+ %G = urem i8 6, 5 ; <i8> [#uses=0]
+ %A.upgrd.1 = add i16 0, 12 ; <i16> [#uses=1]
+ %B.upgrd.2 = sub i16 %A.upgrd.1, 1 ; <i16> [#uses=2]
+ %C.upgrd.3 = mul i16 %B.upgrd.2, %B.upgrd.2 ; <i16> [#uses=2]
+ %D.upgrd.4 = sdiv i16 %C.upgrd.3, %C.upgrd.3 ; <i16> [#uses=2]
+ %E.upgrd.5 = srem i16 %D.upgrd.4, %D.upgrd.4 ; <i16> [#uses=0]
+ %F.upgrd.6 = udiv i16 5, 6 ; <i16> [#uses=0]
+ %G.upgrd.7 = urem i32 6, 5 ; <i32> [#uses=0]
+ %A.upgrd.8 = add i32 0, 12 ; <i32> [#uses=1]
+ %B.upgrd.9 = sub i32 %A.upgrd.8, 1 ; <i32> [#uses=2]
+ %C.upgrd.10 = mul i32 %B.upgrd.9, %B.upgrd.9 ; <i32> [#uses=2]
+ %D.upgrd.11 = sdiv i32 %C.upgrd.10, %C.upgrd.10 ; <i32> [#uses=2]
+ %E.upgrd.12 = srem i32 %D.upgrd.11, %D.upgrd.11 ; <i32> [#uses=0]
+ %F.upgrd.13 = udiv i32 5, 6 ; <i32> [#uses=0]
+ %G1 = urem i32 6, 5 ; <i32> [#uses=0]
+ %A.upgrd.14 = add i64 0, 12 ; <i64> [#uses=1]
+ %B.upgrd.15 = sub i64 %A.upgrd.14, 1 ; <i64> [#uses=2]
+ %C.upgrd.16 = mul i64 %B.upgrd.15, %B.upgrd.15 ; <i64> [#uses=2]
+ %D.upgrd.17 = sdiv i64 %C.upgrd.16, %C.upgrd.16 ; <i64> [#uses=2]
+ %E.upgrd.18 = srem i64 %D.upgrd.17, %D.upgrd.17 ; <i64> [#uses=0]
+ %F.upgrd.19 = udiv i64 5, 6 ; <i64> [#uses=0]
+ %G.upgrd.20 = urem i64 6, 5 ; <i64> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/test-branch.ll b/test/ExecutionEngine/test-branch.ll
new file mode 100644
index 0000000..dd8db54
--- /dev/null
+++ b/test/ExecutionEngine/test-branch.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; test unconditional branch
+define i32 @main() {
+ br label %Test
+Test: ; preds = %Test, %0
+ %X = icmp eq i32 0, 4 ; <i1> [#uses=1]
+ br i1 %X, label %Test, label %Label
+Label: ; preds = %Test
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/test-call.ll b/test/ExecutionEngine/test-call.ll
new file mode 100644
index 0000000..4464ebd
--- /dev/null
+++ b/test/ExecutionEngine/test-call.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+declare void @exit(i32)
+
+define i32 @test(i8 %C, i16 %S) {
+ %X = trunc i16 %S to i8 ; <i8> [#uses=1]
+ %Y = zext i8 %X to i32 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+define void @FP(void (i32)* %F) {
+ %X = call i32 @test( i8 123, i16 1024 ) ; <i32> [#uses=1]
+ call void %F( i32 %X )
+ ret void
+}
+
+define i32 @main() {
+ call void @FP( void (i32)* @exit )
+ ret i32 1
+}
+
diff --git a/test/ExecutionEngine/test-cast.ll b/test/ExecutionEngine/test-cast.ll
new file mode 100644
index 0000000..82d4949
--- /dev/null
+++ b/test/ExecutionEngine/test-cast.ll
@@ -0,0 +1,110 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @foo() {
+ ret i32 0
+}
+
+define i32 @main() {
+ icmp ne i1 true, false ; <i1>:1 [#uses=0]
+ zext i1 true to i8 ; <i8>:2 [#uses=0]
+ zext i1 true to i8 ; <i8>:3 [#uses=0]
+ zext i1 true to i16 ; <i16>:4 [#uses=0]
+ zext i1 true to i16 ; <i16>:5 [#uses=0]
+ zext i1 true to i32 ; <i32>:6 [#uses=0]
+ zext i1 true to i32 ; <i32>:7 [#uses=0]
+ zext i1 true to i64 ; <i64>:8 [#uses=0]
+ zext i1 true to i64 ; <i64>:9 [#uses=0]
+ uitofp i1 true to float ; <float>:10 [#uses=0]
+ uitofp i1 true to double ; <double>:11 [#uses=0]
+ icmp ne i8 0, 0 ; <i1>:12 [#uses=0]
+ icmp ne i8 1, 0 ; <i1>:13 [#uses=0]
+ bitcast i8 0 to i8 ; <i8>:14 [#uses=0]
+ bitcast i8 -1 to i8 ; <i8>:15 [#uses=0]
+ sext i8 4 to i16 ; <i16>:16 [#uses=0]
+ sext i8 4 to i16 ; <i16>:17 [#uses=0]
+ sext i8 4 to i64 ; <i64>:18 [#uses=0]
+ sext i8 4 to i64 ; <i64>:19 [#uses=0]
+ sitofp i8 4 to float ; <float>:20 [#uses=0]
+ sitofp i8 4 to double ; <double>:21 [#uses=0]
+ icmp ne i8 0, 0 ; <i1>:22 [#uses=0]
+ icmp ne i8 1, 0 ; <i1>:23 [#uses=0]
+ bitcast i8 0 to i8 ; <i8>:24 [#uses=0]
+ bitcast i8 1 to i8 ; <i8>:25 [#uses=0]
+ zext i8 4 to i16 ; <i16>:26 [#uses=0]
+ zext i8 4 to i16 ; <i16>:27 [#uses=0]
+ zext i8 4 to i64 ; <i64>:28 [#uses=0]
+ zext i8 4 to i64 ; <i64>:29 [#uses=0]
+ uitofp i8 0 to float ; <float>:30 [#uses=0]
+ uitofp i8 0 to double ; <double>:31 [#uses=0]
+ icmp ne i16 1, 0 ; <i1>:32 [#uses=0]
+ trunc i16 -1 to i8 ; <i8>:33 [#uses=0]
+ trunc i16 255 to i8 ; <i8>:34 [#uses=0]
+ bitcast i16 0 to i16 ; <i16>:35 [#uses=0]
+ bitcast i16 0 to i16 ; <i16>:36 [#uses=0]
+ sext i16 0 to i64 ; <i64>:37 [#uses=0]
+ sext i16 0 to i64 ; <i64>:38 [#uses=0]
+ sitofp i16 0 to float ; <float>:39 [#uses=0]
+ sitofp i16 0 to double ; <double>:40 [#uses=0]
+ icmp ne i16 1, 0 ; <i1>:41 [#uses=0]
+ trunc i16 1 to i8 ; <i8>:42 [#uses=0]
+ trunc i16 255 to i8 ; <i8>:43 [#uses=0]
+ bitcast i16 0 to i16 ; <i16>:44 [#uses=0]
+ bitcast i16 0 to i16 ; <i16>:45 [#uses=0]
+ zext i16 0 to i64 ; <i64>:46 [#uses=0]
+ zext i16 0 to i64 ; <i64>:47 [#uses=0]
+ uitofp i16 0 to float ; <float>:48 [#uses=0]
+ uitofp i16 0 to double ; <double>:49 [#uses=0]
+ icmp ne i32 6, 0 ; <i1>:50 [#uses=0]
+ trunc i32 -6 to i8 ; <i8>:51 [#uses=0]
+ trunc i32 6 to i8 ; <i8>:52 [#uses=0]
+ trunc i32 6 to i16 ; <i16>:53 [#uses=0]
+ bitcast i32 0 to i32 ; <i32>:54 [#uses=0]
+ sext i32 0 to i64 ; <i64>:55 [#uses=0]
+ sext i32 0 to i64 ; <i64>:56 [#uses=0]
+ sitofp i32 0 to float ; <float>:57 [#uses=0]
+ sitofp i32 0 to double ; <double>:58 [#uses=0]
+ icmp ne i32 6, 0 ; <i1>:59 [#uses=0]
+ trunc i32 7 to i8 ; <i8>:60 [#uses=0]
+ trunc i32 8 to i8 ; <i8>:61 [#uses=0]
+ trunc i32 9 to i16 ; <i16>:62 [#uses=0]
+ bitcast i32 10 to i32 ; <i32>:63 [#uses=0]
+ zext i32 0 to i64 ; <i64>:64 [#uses=0]
+ zext i32 0 to i64 ; <i64>:65 [#uses=0]
+ uitofp i32 0 to float ; <float>:66 [#uses=0]
+ uitofp i32 0 to double ; <double>:67 [#uses=0]
+ icmp ne i64 0, 0 ; <i1>:68 [#uses=0]
+ trunc i64 0 to i8 ; <i8>:69 [#uses=0]
+ trunc i64 0 to i8 ; <i8>:70 [#uses=0]
+ trunc i64 0 to i16 ; <i16>:71 [#uses=0]
+ trunc i64 0 to i16 ; <i16>:72 [#uses=0]
+ trunc i64 0 to i32 ; <i32>:73 [#uses=0]
+ trunc i64 0 to i32 ; <i32>:74 [#uses=0]
+ bitcast i64 0 to i64 ; <i64>:75 [#uses=0]
+ bitcast i64 0 to i64 ; <i64>:76 [#uses=0]
+ sitofp i64 0 to float ; <float>:77 [#uses=0]
+ sitofp i64 0 to double ; <double>:78 [#uses=0]
+ icmp ne i64 1, 0 ; <i1>:79 [#uses=0]
+ trunc i64 1 to i8 ; <i8>:80 [#uses=0]
+ trunc i64 1 to i8 ; <i8>:81 [#uses=0]
+ trunc i64 1 to i16 ; <i16>:82 [#uses=0]
+ trunc i64 1 to i16 ; <i16>:83 [#uses=0]
+ trunc i64 1 to i32 ; <i32>:84 [#uses=0]
+ trunc i64 1 to i32 ; <i32>:85 [#uses=0]
+ bitcast i64 1 to i64 ; <i64>:86 [#uses=0]
+ bitcast i64 1 to i64 ; <i64>:87 [#uses=0]
+ uitofp i64 1 to float ; <float>:88 [#uses=0]
+ uitofp i64 0 to double ; <double>:89 [#uses=0]
+ bitcast float 0.000000e+00 to float ; <float>:90 [#uses=0]
+ fpext float 0.000000e+00 to double ; <double>:91 [#uses=0]
+ fptosi double 0.000000e+00 to i8 ; <i8>:92 [#uses=0]
+ fptoui double 0.000000e+00 to i8 ; <i8>:93 [#uses=0]
+ fptosi double 0.000000e+00 to i16 ; <i16>:94 [#uses=0]
+ fptoui double 0.000000e+00 to i16 ; <i16>:95 [#uses=0]
+ fptosi double 0.000000e+00 to i32 ; <i32>:96 [#uses=0]
+ fptoui double 0.000000e+00 to i32 ; <i32>:97 [#uses=0]
+ fptosi double 0.000000e+00 to i64 ; <i64>:98 [#uses=0]
+ fptrunc double 0.000000e+00 to float ; <float>:99 [#uses=0]
+ bitcast double 0.000000e+00 to double ; <double>:100 [#uses=0]
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/test-constantexpr.ll b/test/ExecutionEngine/test-constantexpr.ll
new file mode 100644
index 0000000..cd5c635
--- /dev/null
+++ b/test/ExecutionEngine/test-constantexpr.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; This tests to make sure that we can evaluate weird constant expressions
+
+@A = global i32 5 ; <i32*> [#uses=1]
+@B = global i32 6 ; <i32*> [#uses=1]
+
+define i32 @main() {
+ %A = or i1 false, icmp slt (i32* @A, i32* @B) ; <i1> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/test-fp.ll b/test/ExecutionEngine/test-fp.ll
new file mode 100644
index 0000000..4ebcf6f
--- /dev/null
+++ b/test/ExecutionEngine/test-fp.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define double @test(double* %DP, double %Arg) {
+ %D = load double* %DP ; <double> [#uses=1]
+ %V = fadd double %D, 1.000000e+00 ; <double> [#uses=2]
+ %W = fsub double %V, %V ; <double> [#uses=3]
+ %X = fmul double %W, %W ; <double> [#uses=2]
+ %Y = fdiv double %X, %X ; <double> [#uses=2]
+ %Z = frem double %Y, %Y ; <double> [#uses=3]
+ %Z1 = fdiv double %Z, %W ; <double> [#uses=0]
+ %Q = fadd double %Z, %Arg ; <double> [#uses=1]
+ %R = bitcast double %Q to double ; <double> [#uses=1]
+ store double %R, double* %DP
+ ret double %Z
+}
+
+define i32 @main() {
+ %X = alloca double ; <double*> [#uses=2]
+ store double 0.000000e+00, double* %X
+ call double @test( double* %X, double 2.000000e+00 ) ; <double>:1 [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/test-loadstore.ll b/test/ExecutionEngine/test-loadstore.ll
new file mode 100644
index 0000000..ba0f0ba
--- /dev/null
+++ b/test/ExecutionEngine/test-loadstore.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define void @test(i8* %P, i16* %P.upgrd.1, i32* %P.upgrd.2, i64* %P.upgrd.3) {
+ %V = load i8* %P ; <i8> [#uses=1]
+ store i8 %V, i8* %P
+ %V.upgrd.4 = load i16* %P.upgrd.1 ; <i16> [#uses=1]
+ store i16 %V.upgrd.4, i16* %P.upgrd.1
+ %V.upgrd.5 = load i32* %P.upgrd.2 ; <i32> [#uses=1]
+ store i32 %V.upgrd.5, i32* %P.upgrd.2
+ %V.upgrd.6 = load i64* %P.upgrd.3 ; <i64> [#uses=1]
+ store i64 %V.upgrd.6, i64* %P.upgrd.3
+ ret void
+}
+
+define i32 @varalloca(i32 %Size) {
+ ;; Variable sized alloca
+ %X = alloca i32, i32 %Size ; <i32*> [#uses=2]
+ store i32 %Size, i32* %X
+ %Y = load i32* %X ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+define i32 @main() {
+ %A = alloca i8 ; <i8*> [#uses=1]
+ %B = alloca i16 ; <i16*> [#uses=1]
+ %C = alloca i32 ; <i32*> [#uses=1]
+ %D = alloca i64 ; <i64*> [#uses=1]
+ call void @test( i8* %A, i16* %B, i32* %C, i64* %D )
+ call i32 @varalloca( i32 7 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/test-logical.ll b/test/ExecutionEngine/test-logical.ll
new file mode 100644
index 0000000..e560e52
--- /dev/null
+++ b/test/ExecutionEngine/test-logical.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+ %A = and i8 4, 8 ; <i8> [#uses=2]
+ %B = or i8 %A, 7 ; <i8> [#uses=1]
+ %C = xor i8 %B, %A ; <i8> [#uses=0]
+ %A.upgrd.1 = and i16 4, 8 ; <i16> [#uses=2]
+ %B.upgrd.2 = or i16 %A.upgrd.1, 7 ; <i16> [#uses=1]
+ %C.upgrd.3 = xor i16 %B.upgrd.2, %A.upgrd.1 ; <i16> [#uses=0]
+ %A.upgrd.4 = and i32 4, 8 ; <i32> [#uses=2]
+ %B.upgrd.5 = or i32 %A.upgrd.4, 7 ; <i32> [#uses=1]
+ %C.upgrd.6 = xor i32 %B.upgrd.5, %A.upgrd.4 ; <i32> [#uses=0]
+ %A.upgrd.7 = and i64 4, 8 ; <i64> [#uses=2]
+ %B.upgrd.8 = or i64 %A.upgrd.7, 7 ; <i64> [#uses=1]
+ %C.upgrd.9 = xor i64 %B.upgrd.8, %A.upgrd.7 ; <i64> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/test-loop.ll b/test/ExecutionEngine/test-loop.ll
new file mode 100644
index 0000000..7cd69e2
--- /dev/null
+++ b/test/ExecutionEngine/test-loop.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %I = phi i32 [ 0, %0 ], [ %i2, %Loop ] ; <i32> [#uses=1]
+ %i2 = add i32 %I, 1 ; <i32> [#uses=2]
+ %C = icmp eq i32 %i2, 10 ; <i1> [#uses=1]
+ br i1 %C, label %Out, label %Loop
+Out: ; preds = %Loop
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/test-malloc.ll b/test/ExecutionEngine/test-malloc.ll
new file mode 100644
index 0000000..8f79d97
--- /dev/null
+++ b/test/ExecutionEngine/test-malloc.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+ %X = malloc i32 ; <i32*> [#uses=1]
+ %Y = malloc i32, i32 100 ; <i32*> [#uses=1]
+ %u = add i32 1, 2 ; <i32> [#uses=1]
+ %Z = malloc i32, i32 %u ; <i32*> [#uses=1]
+ free i32* %X
+ free i32* %Y
+ free i32* %Z
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/test-phi.ll b/test/ExecutionEngine/test-phi.ll
new file mode 100644
index 0000000..f1aaefa
--- /dev/null
+++ b/test/ExecutionEngine/test-phi.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; test phi node
+@Y = global i32 6 ; <i32*> [#uses=1]
+
+define void @blah(i32* %X) {
+; <label>:0
+ br label %T
+T: ; preds = %Dead, %0
+ phi i32* [ %X, %0 ], [ @Y, %Dead ] ; <i32*>:1 [#uses=0]
+ ret void
+Dead: ; No predecessors!
+ br label %T
+}
+
+define i32 @test(i1 %C) {
+; <label>:0
+ br i1 %C, label %T, label %T
+T: ; preds = %0, %0
+ %X = phi i32 [ 123, %0 ], [ 123, %0 ] ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i32 @main() {
+; <label>:0
+ br label %Test
+Test: ; preds = %Dead, %0
+ %X = phi i32 [ 0, %0 ], [ %Y, %Dead ] ; <i32> [#uses=1]
+ ret i32 %X
+Dead: ; No predecessors!
+ %Y = ashr i32 12, 4 ; <i32> [#uses=1]
+ br label %Test
+}
+
diff --git a/test/ExecutionEngine/test-ret.ll b/test/ExecutionEngine/test-ret.ll
new file mode 100644
index 0000000..eae91f5
--- /dev/null
+++ b/test/ExecutionEngine/test-ret.ll
@@ -0,0 +1,47 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+; test return instructions
+define void @test1() {
+ ret void
+}
+
+define i8 @test2() {
+ ret i8 1
+}
+
+define i8 @test3() {
+ ret i8 1
+}
+
+define i16 @test4() {
+ ret i16 -1
+}
+
+define i16 @test5() {
+ ret i16 -1
+}
+
+define i32 @main() {
+ ret i32 0
+}
+
+define i32 @test6() {
+ ret i32 4
+}
+
+define i64 @test7() {
+ ret i64 0
+}
+
+define i64 @test8() {
+ ret i64 0
+}
+
+define float @test9() {
+ ret float 1.000000e+00
+}
+
+define double @test10() {
+ ret double 2.000000e+00
+}
diff --git a/test/ExecutionEngine/test-setcond-fp.ll b/test/ExecutionEngine/test-setcond-fp.ll
new file mode 100644
index 0000000..4264e2c
--- /dev/null
+++ b/test/ExecutionEngine/test-setcond-fp.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+
+define i32 @main() {
+ %double1 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=6]
+ %double2 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=6]
+ %float1 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=6]
+ %float2 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=6]
+ %test49 = fcmp oeq float %float1, %float2 ; <i1> [#uses=0]
+ %test50 = fcmp oge float %float1, %float2 ; <i1> [#uses=0]
+ %test51 = fcmp ogt float %float1, %float2 ; <i1> [#uses=0]
+ %test52 = fcmp ole float %float1, %float2 ; <i1> [#uses=0]
+ %test53 = fcmp olt float %float1, %float2 ; <i1> [#uses=0]
+ %test54 = fcmp une float %float1, %float2 ; <i1> [#uses=0]
+ %test55 = fcmp oeq double %double1, %double2 ; <i1> [#uses=0]
+ %test56 = fcmp oge double %double1, %double2 ; <i1> [#uses=0]
+ %test57 = fcmp ogt double %double1, %double2 ; <i1> [#uses=0]
+ %test58 = fcmp ole double %double1, %double2 ; <i1> [#uses=0]
+ %test59 = fcmp olt double %double1, %double2 ; <i1> [#uses=0]
+ %test60 = fcmp une double %double1, %double2 ; <i1> [#uses=0]
+ ret i32 0
+}
+
+
diff --git a/test/ExecutionEngine/test-setcond-int.ll b/test/ExecutionEngine/test-setcond-int.ll
new file mode 100644
index 0000000..772f4fa
--- /dev/null
+++ b/test/ExecutionEngine/test-setcond-int.ll
@@ -0,0 +1,70 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+ %int1 = add i32 0, 0 ; <i32> [#uses=6]
+ %int2 = add i32 0, 0 ; <i32> [#uses=6]
+ %long1 = add i64 0, 0 ; <i64> [#uses=6]
+ %long2 = add i64 0, 0 ; <i64> [#uses=6]
+ %sbyte1 = add i8 0, 0 ; <i8> [#uses=6]
+ %sbyte2 = add i8 0, 0 ; <i8> [#uses=6]
+ %short1 = add i16 0, 0 ; <i16> [#uses=6]
+ %short2 = add i16 0, 0 ; <i16> [#uses=6]
+ %ubyte1 = add i8 0, 0 ; <i8> [#uses=6]
+ %ubyte2 = add i8 0, 0 ; <i8> [#uses=6]
+ %uint1 = add i32 0, 0 ; <i32> [#uses=6]
+ %uint2 = add i32 0, 0 ; <i32> [#uses=6]
+ %ulong1 = add i64 0, 0 ; <i64> [#uses=6]
+ %ulong2 = add i64 0, 0 ; <i64> [#uses=6]
+ %ushort1 = add i16 0, 0 ; <i16> [#uses=6]
+ %ushort2 = add i16 0, 0 ; <i16> [#uses=6]
+ %test1 = icmp eq i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test2 = icmp uge i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test3 = icmp ugt i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test4 = icmp ule i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test5 = icmp ult i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test6 = icmp ne i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test7 = icmp eq i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test8 = icmp uge i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test9 = icmp ugt i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test10 = icmp ule i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test11 = icmp ult i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test12 = icmp ne i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test13 = icmp eq i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test14 = icmp uge i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test15 = icmp ugt i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test16 = icmp ule i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test17 = icmp ult i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test18 = icmp ne i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test19 = icmp eq i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test20 = icmp uge i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test21 = icmp ugt i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test22 = icmp ule i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test23 = icmp ult i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test24 = icmp ne i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test25 = icmp eq i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test26 = icmp sge i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test27 = icmp sgt i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test28 = icmp sle i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test29 = icmp slt i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test30 = icmp ne i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test31 = icmp eq i16 %short1, %short2 ; <i1> [#uses=0]
+ %test32 = icmp sge i16 %short1, %short2 ; <i1> [#uses=0]
+ %test33 = icmp sgt i16 %short1, %short2 ; <i1> [#uses=0]
+ %test34 = icmp sle i16 %short1, %short2 ; <i1> [#uses=0]
+ %test35 = icmp slt i16 %short1, %short2 ; <i1> [#uses=0]
+ %test36 = icmp ne i16 %short1, %short2 ; <i1> [#uses=0]
+ %test37 = icmp eq i32 %int1, %int2 ; <i1> [#uses=0]
+ %test38 = icmp sge i32 %int1, %int2 ; <i1> [#uses=0]
+ %test39 = icmp sgt i32 %int1, %int2 ; <i1> [#uses=0]
+ %test40 = icmp sle i32 %int1, %int2 ; <i1> [#uses=0]
+ %test41 = icmp slt i32 %int1, %int2 ; <i1> [#uses=0]
+ %test42 = icmp ne i32 %int1, %int2 ; <i1> [#uses=0]
+ %test43 = icmp eq i64 %long1, %long2 ; <i1> [#uses=0]
+ %test44 = icmp sge i64 %long1, %long2 ; <i1> [#uses=0]
+ %test45 = icmp sgt i64 %long1, %long2 ; <i1> [#uses=0]
+ %test46 = icmp sle i64 %long1, %long2 ; <i1> [#uses=0]
+ %test47 = icmp slt i64 %long1, %long2 ; <i1> [#uses=0]
+ %test48 = icmp ne i64 %long1, %long2 ; <i1> [#uses=0]
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/test-shift.ll b/test/ExecutionEngine/test-shift.ll
new file mode 100644
index 0000000..2791b85
--- /dev/null
+++ b/test/ExecutionEngine/test-shift.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+ %shamt = add i8 0, 1 ; <i8> [#uses=8]
+ %shift.upgrd.1 = zext i8 %shamt to i32 ; <i32> [#uses=1]
+ %t1.s = shl i32 1, %shift.upgrd.1 ; <i32> [#uses=0]
+ %t2.s = shl i32 1, 4 ; <i32> [#uses=0]
+ %shift.upgrd.2 = zext i8 %shamt to i32 ; <i32> [#uses=1]
+ %t1 = shl i32 1, %shift.upgrd.2 ; <i32> [#uses=0]
+ %t2 = shl i32 1, 5 ; <i32> [#uses=0]
+ %t2.s.upgrd.3 = shl i64 1, 4 ; <i64> [#uses=0]
+ %t2.upgrd.4 = shl i64 1, 5 ; <i64> [#uses=0]
+ %shift.upgrd.5 = zext i8 %shamt to i32 ; <i32> [#uses=1]
+ %tr1.s = ashr i32 1, %shift.upgrd.5 ; <i32> [#uses=0]
+ %tr2.s = ashr i32 1, 4 ; <i32> [#uses=0]
+ %shift.upgrd.6 = zext i8 %shamt to i32 ; <i32> [#uses=1]
+ %tr1 = lshr i32 1, %shift.upgrd.6 ; <i32> [#uses=0]
+ %tr2 = lshr i32 1, 5 ; <i32> [#uses=0]
+ %tr1.l = ashr i64 1, 4 ; <i64> [#uses=0]
+ %shift.upgrd.7 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr2.l = ashr i64 1, %shift.upgrd.7 ; <i64> [#uses=0]
+ %tr3.l = shl i64 1, 4 ; <i64> [#uses=0]
+ %shift.upgrd.8 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr4.l = shl i64 1, %shift.upgrd.8 ; <i64> [#uses=0]
+ %tr1.u = lshr i64 1, 5 ; <i64> [#uses=0]
+ %shift.upgrd.9 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr2.u = lshr i64 1, %shift.upgrd.9 ; <i64> [#uses=0]
+ %tr3.u = shl i64 1, 5 ; <i64> [#uses=0]
+ %shift.upgrd.10 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr4.u = shl i64 1, %shift.upgrd.10 ; <i64> [#uses=0]
+ ret i32 0
+}
diff --git a/test/Feature/NamedMDNode.ll b/test/Feature/NamedMDNode.ll
new file mode 100644
index 0000000..02a79f8
--- /dev/null
+++ b/test/Feature/NamedMDNode.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llvm-dis | grep "llvm.stuff = "
+
+;; Simple NamedMDNode
+!0 = metadata !{i32 42}
+!1 = metadata !{metadata !"foo"}
+!llvm.stuff = !{!0, !1, null}
+
+!samename = !{!0, !1}
+declare void @samename()
diff --git a/test/Feature/NamedMDNode2.ll b/test/Feature/NamedMDNode2.ll
new file mode 100644
index 0000000..0524dd2
--- /dev/null
+++ b/test/Feature/NamedMDNode2.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s -o /dev/null
+; PR4654
+
+
+@foo = constant i1 false
+!0 = metadata !{i1 false}
+!a = !{!0}
diff --git a/test/Feature/README.txt b/test/Feature/README.txt
new file mode 100644
index 0000000..5947bb2
--- /dev/null
+++ b/test/Feature/README.txt
@@ -0,0 +1,6 @@
+This directory contains test cases for individual source features of LLVM.
+It is designed to make sure that the major components of LLVM support all of the
+features of LLVM, for very small examples. Entire programs should not go here.
+
+Regression tests for individual bug fixes should go into the test/Regression dir.
+
diff --git a/test/Feature/aliases.ll b/test/Feature/aliases.ll
new file mode 100644
index 0000000..d44dff4
--- /dev/null
+++ b/test/Feature/aliases.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@bar = external global i32
+@foo1 = alias i32* @bar
+@foo2 = alias i32* @bar
+@foo3 = alias i32* @foo2
+
+%FunTy = type i32()
+
+declare i32 @foo_f()
+@bar_f = alias weak %FunTy* @foo_f
+@bar_ff = alias i32()* @bar_f
+
+@bar_i = alias internal i32* @bar
+
+@A = alias bitcast (i32* @bar to i64*)
+
+define i32 @test() {
+entry:
+ %tmp = load i32* @foo1
+ %tmp1 = load i32* @foo2
+ %tmp0 = load i32* @bar_i
+ %tmp2 = call i32 @foo_f()
+ %tmp3 = add i32 %tmp, %tmp2
+ %tmp4 = call %FunTy* @bar_f()
+ %tmp5 = add i32 %tmp3, %tmp4
+ %tmp6 = add i32 %tmp1, %tmp5
+ %tmp7 = add i32 %tmp6, %tmp0
+ ret i32 %tmp7
+}
diff --git a/test/Feature/alignment.ll b/test/Feature/alignment.ll
new file mode 100644
index 0000000..409efeb
--- /dev/null
+++ b/test/Feature/alignment.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@X = global i32 4, align 16 ; <i32*> [#uses=0]
+
+define i32* @test() align 32 {
+ %X = alloca i32, align 4 ; <i32*> [#uses=1]
+ %Y = alloca i32, i32 42, align 16 ; <i32*> [#uses=0]
+ %Z = alloca i32 ; <i32*> [#uses=0]
+ ret i32* %X
+}
+
+define i32* @test2() {
+ %X = malloc i32, align 4 ; <i32*> [#uses=1]
+ %Y = malloc i32, i32 42, align 16 ; <i32*> [#uses=0]
+ %Z = malloc i32 ; <i32*> [#uses=0]
+ %T = malloc i32, align 256 ; <i32*> [#uses=0]
+ ret i32* %X
+}
+
diff --git a/test/Feature/basictest.ll b/test/Feature/basictest.ll
new file mode 100644
index 0000000..2303b59
--- /dev/null
+++ b/test/Feature/basictest.ll
@@ -0,0 +1,31 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; Test "stripped" format where nothing is symbolic... this is how the bytecode
+; format looks anyways (except for negative vs positive offsets)...
+;
+
+define void @void(i32, i32) {
+ add i32 0, 0 ; <i32>:3 [#uses=2]
+ sub i32 0, 4 ; <i32>:4 [#uses=2]
+ br label %5
+
+; <label>:5 ; preds = %5, %2
+ add i32 %0, %1 ; <i32>:6 [#uses=2]
+ sub i32 %6, %4 ; <i32>:7 [#uses=1]
+ icmp sle i32 %7, %3 ; <i1>:8 [#uses=1]
+ br i1 %8, label %9, label %5
+
+; <label>:9 ; preds = %5
+ add i32 %0, %1 ; <i32>:10 [#uses=0]
+ sub i32 %6, %4 ; <i32>:11 [#uses=1]
+ icmp sle i32 %11, %3 ; <i1>:12 [#uses=0]
+ ret void
+}
+
+; This function always returns zero
+define i32 @zarro() {
+Startup:
+ ret i32 0
+}
diff --git a/test/Feature/callingconventions.ll b/test/Feature/callingconventions.ll
new file mode 100644
index 0000000..d2e9de4
--- /dev/null
+++ b/test/Feature/callingconventions.ll
@@ -0,0 +1,50 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+define fastcc void @foo() {
+ ret void
+}
+
+define coldcc void @bar() {
+ call fastcc void @foo( )
+ ret void
+}
+
+define void @structret({ i8 }* sret %P) {
+ call void @structret( { i8 }* sret %P )
+ ret void
+}
+
+define void @foo2() {
+ ret void
+}
+
+define coldcc void @bar2() {
+ call fastcc void @foo( )
+ ret void
+}
+
+define cc42 void @bar3() {
+ invoke fastcc void @foo( )
+ to label %Ok unwind label %U
+
+Ok: ; preds = %0
+ ret void
+
+U: ; preds = %0
+ unwind
+}
+
+define void @bar4() {
+ call cc42 void @bar( )
+ invoke cc42 void @bar3( )
+ to label %Ok unwind label %U
+
+Ok: ; preds = %0
+ ret void
+
+U: ; preds = %0
+ unwind
+}
+
diff --git a/test/Feature/calltest.ll b/test/Feature/calltest.ll
new file mode 100644
index 0000000..feafd3c
--- /dev/null
+++ b/test/Feature/calltest.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+%FunTy = type i32 (i32)
+
+declare i32 @test(i32) ; Test forward declaration merging
+
+define void @invoke(%FunTy* %x) {
+ %foo = call i32 %x( i32 123 ) ; <i32> [#uses=0]
+ %foo2 = tail call i32 %x( i32 123 ) ; <i32> [#uses=0]
+ ret void
+}
+
+define i32 @main(i32 %argc) {
+ %retval = call i32 @test( i32 %argc ) ; <i32> [#uses=2]
+ %two = add i32 %retval, %retval ; <i32> [#uses=1]
+ %retval2 = invoke i32 @test( i32 %argc )
+ to label %Next unwind label %Error ; <i32> [#uses=1]
+
+Next: ; preds = %0
+ %two2 = add i32 %two, %retval2 ; <i32> [#uses=1]
+ call void @invoke( %FunTy* @test )
+ ret i32 %two2
+
+Error: ; preds = %0
+ ret i32 -1
+}
+
+define i32 @test(i32 %i0) {
+ ret i32 %i0
+}
diff --git a/test/Feature/casttest.ll b/test/Feature/casttest.ll
new file mode 100644
index 0000000..d9c22ff
--- /dev/null
+++ b/test/Feature/casttest.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+define i16 @FunFunc(i64 %x, i8 %z) {
+bb0:
+ %cast110 = sext i8 %z to i16 ; <i16> [#uses=1]
+ %cast10 = trunc i64 %x to i16 ; <i16> [#uses=1]
+ %reg109 = add i16 %cast110, %cast10 ; <i16> [#uses=1]
+ ret i16 %reg109
+}
+
diff --git a/test/Feature/cfgstructures.ll b/test/Feature/cfgstructures.ll
new file mode 100644
index 0000000..e667f6d
--- /dev/null
+++ b/test/Feature/cfgstructures.ll
@@ -0,0 +1,53 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+;; This is an irreducible flow graph
+define void @irreducible(i1 %cond) {
+ br i1 %cond, label %X, label %Y
+
+X: ; preds = %Y, %0
+ br label %Y
+
+Y: ; preds = %X, %0
+ br label %X
+}
+
+;; This is a pair of loops that share the same header
+define void @sharedheader(i1 %cond) {
+ br label %A
+
+A: ; preds = %Y, %X, %0
+ br i1 %cond, label %X, label %Y
+
+X: ; preds = %A
+ br label %A
+
+Y: ; preds = %A
+ br label %A
+}
+
+
+;; This is a simple nested loop
+define void @nested(i1 %cond1, i1 %cond2, i1 %cond3) {
+ br label %Loop1
+
+Loop1: ; preds = %L2Exit, %0
+ br label %Loop2
+
+Loop2: ; preds = %L3Exit, %Loop1
+ br label %Loop3
+
+Loop3: ; preds = %Loop3, %Loop2
+ br i1 %cond3, label %Loop3, label %L3Exit
+
+L3Exit: ; preds = %Loop3
+ br i1 %cond2, label %Loop2, label %L2Exit
+
+L2Exit: ; preds = %L3Exit
+ br i1 %cond1, label %Loop1, label %L1Exit
+
+L1Exit: ; preds = %L2Exit
+ ret void
+}
+
diff --git a/test/Feature/constexpr.ll b/test/Feature/constexpr.ll
new file mode 100644
index 0000000..13e6f36
--- /dev/null
+++ b/test/Feature/constexpr.ll
@@ -0,0 +1,80 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; This testcase is for testing expressions constructed from
+; constant values, including constant pointers to globals.
+;
+
+;;-------------------------------
+;; Test constant cast expressions
+;;-------------------------------
+
+global i64 u0x00001 ; hexadecimal unsigned integer constants
+global i64 s0x0012312 ; hexadecimal signed integer constants
+
+@t2 = global i32* @t1 ;; Forward reference without cast
+@t3 = global i32* bitcast (i32* @t1 to i32*) ;; Forward reference with cast
+@t1 = global i32 4 ;; i32* @0
+@t4 = global i32** bitcast (i32** @t3 to i32**) ;; Cast of a previous cast
+@t5 = global i32** @t3 ;; Reference to a previous cast
+@t6 = global i32*** @t4 ;; Different ref. to a previous cast
+@t7 = global float* inttoptr (i32 12345678 to float*) ;; Cast ordinary value to ptr
+@t9 = global i32 bitcast (float bitcast (i32 8 to float) to i32) ;; Nested cast expression
+
+global i32* bitcast (float* @4 to i32*) ;; Forward numeric reference
+global float* @4 ;; Duplicate forward numeric reference
+global float 0.0
+
+
+;;---------------------------------------------------
+;; Test constant getelementpr expressions for arrays
+;;---------------------------------------------------
+
+@array = constant [2 x i32] [ i32 12, i32 52 ]
+@arrayPtr = global i32* getelementptr ([2 x i32]* @array, i64 0, i64 0) ;; i32* &@array[0][0]
+@arrayPtr5 = global i32** getelementptr (i32** @arrayPtr, i64 5) ;; i32* &@arrayPtr[5]
+
+@somestr = constant [11x i8] c"hello world"
+@char5 = global i8* getelementptr([11x i8]* @somestr, i64 0, i64 5)
+
+;; cast of getelementptr
+@char8a = global i32* bitcast (i8* getelementptr([11x i8]* @somestr, i64 0, i64 8) to i32*)
+
+;; getelementptr containing casts
+@char8b = global i8* getelementptr([11x i8]* @somestr, i64 sext (i8 0 to i64), i64 sext (i8 8 to i64))
+
+;;-------------------------------------------------------
+;; TODO: Test constant getelementpr expressions for structures
+;;-------------------------------------------------------
+
+%SType = type { i32 , {float, {i8} }, i64 } ;; struct containing struct
+%SAType = type { i32 , {[2x float], i64} } ;; struct containing array
+
+@S1 = global %SType* null ;; Global initialized to NULL
+@S2c = constant %SType { i32 1, {float,{i8}} {float 2.0, {i8} {i8 3}}, i64 4}
+
+@S3c = constant %SAType { i32 1, {[2x float], i64} {[2x float] [float 2.0, float 3.0], i64 4} }
+
+@S1ptr = global %SType** @S1 ;; Ref. to global S1
+@S2 = global %SType* @S2c ;; Ref. to constant S2
+@S3 = global %SAType* @S3c ;; Ref. to constant S3
+
+ ;; Pointer to float (**@S1).1.0
+@S1fld1a = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0)
+ ;; Another ptr to the same!
+@S1fld1b = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0)
+
+@S1fld1bptr = global float** @S1fld1b ;; Ref. to previous pointer
+
+ ;; Pointer to i8 (**@S2).1.1.0
+@S2fld3 = global i8* getelementptr (%SType* @S2c, i64 0, i32 1, i32 1, i32 0)
+
+ ;; Pointer to float (**@S2).1.0[0]
+;@S3fld3 = global float* getelementptr (%SAType** @S3, i64 0, i64 0, i32 1, i32 0, i64 0)
+
+;;---------------------------------------------------------
+;; TODO: Test constant expressions for unary and binary operators
+;;---------------------------------------------------------
+
+;;---------------------------------------------------
diff --git a/test/Feature/constpointer.ll b/test/Feature/constpointer.ll
new file mode 100644
index 0000000..5c1bed19
--- /dev/null
+++ b/test/Feature/constpointer.ll
@@ -0,0 +1,31 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; This testcase is primarily used for testing that global values can be used as
+; constant pointer initializers. This is tricky because they can be forward
+; declared and involves an icky bytecode encoding. There is no meaningful
+; optimization that can be performed on this file, it is just here to test
+; assembly and disassembly.
+;
+
+
+@t3 = global i32* @t1 ;; Forward reference
+@t1 = global i32 4
+@t4 = global i32** @t3 ;; reference to reference
+
+@t2 = global i32* @t1
+
+global float * @2 ;; Forward numeric reference
+global float * @2 ;; Duplicate forward numeric reference
+global float 0.0
+global float * @2 ;; Numeric reference
+
+
+@fptr = global void() * @f ;; Forward ref method defn
+declare void @f() ;; External method
+
+@sptr1 = global [11x i8]* @somestr ;; Forward ref to a constant
+@somestr = constant [11x i8] c"hello world"
+@sptr2 = global [11x i8]* @somestr
+
diff --git a/test/Feature/dg.exp b/test/Feature/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Feature/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Feature/escaped_label.ll b/test/Feature/escaped_label.ll
new file mode 100644
index 0000000..7f5f619
--- /dev/null
+++ b/test/Feature/escaped_label.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+define i32 @foo() {
+ br label %"foo`~!@#$%^&*()-_=+{}[]\\\\|;:',<.>/?"
+
+"foo`~!@#$%^&*()-_=+{}[]\\\\|;:',<.>/?": ; preds = %0
+ ret i32 17
+}
+
diff --git a/test/Feature/float.ll b/test/Feature/float.ll
new file mode 100644
index 0000000..6c6c5dd
--- /dev/null
+++ b/test/Feature/float.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@F1 = global float 0x4010000000000000
+@D1 = global double 0x4010000000000000
diff --git a/test/Feature/fold-fpcast.ll b/test/Feature/fold-fpcast.ll
new file mode 100644
index 0000000..cdf8da6
--- /dev/null
+++ b/test/Feature/fold-fpcast.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llvm-dis | not grep bitcast
+
+define i32 @test1() {
+ ret i32 bitcast(float 0x400D9999A0000000 to i32)
+}
+
+define float @test2() {
+ ret float bitcast(i32 17 to float)
+}
+
+define i64 @test3() {
+ ret i64 bitcast (double 0x400921FB4D12D84A to i64)
+}
+
+define double @test4() {
+ ret double bitcast (i64 42 to double)
+}
+
diff --git a/test/Feature/forwardreftest.ll b/test/Feature/forwardreftest.ll
new file mode 100644
index 0000000..26d214a
--- /dev/null
+++ b/test/Feature/forwardreftest.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+%myty = type i32
+%myfn = type float (i32,double,i32,i16)
+type i32(%myfn*)
+type i32(i32)
+type i32(i32(i32)*)
+
+ %thisfuncty = type i32 (i32) *
+
+declare void @F(%thisfuncty, %thisfuncty, %thisfuncty)
+
+define i32 @zarro(i32 %Func) {
+Startup:
+ add i32 0, 10 ; <i32>:0 [#uses=0]
+ ret i32 0
+}
+
+define i32 @test(i32) {
+ call void @F( %thisfuncty @zarro, %thisfuncty @test, %thisfuncty @foozball )
+ ret i32 0
+}
+
+define i32 @foozball(i32) {
+ ret i32 0
+}
+
diff --git a/test/Feature/global_section.ll b/test/Feature/global_section.ll
new file mode 100644
index 0000000..b8f5eb1
--- /dev/null
+++ b/test/Feature/global_section.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@X = global i32 4, section "foo", align 16 ; <i32*> [#uses=0]
+
+define void @test() section "bar" {
+ ret void
+}
+
diff --git a/test/Feature/globalredefinition.ll b/test/Feature/globalredefinition.ll
new file mode 100644
index 0000000..42e2d1a
--- /dev/null
+++ b/test/Feature/globalredefinition.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; Test forward references and redefinitions of globals
+
+@A = global i32* @B ; <i32**> [#uses=0]
+@B = global i32 7 ; <i32*> [#uses=1]
+
+declare void @X()
+
+declare void @X()
+
+define void @X() {
+ ret void
+}
+
+declare void @X()
diff --git a/test/Feature/globalredefinition3.ll b/test/Feature/globalredefinition3.ll
new file mode 100644
index 0000000..5a5b3f1
--- /dev/null
+++ b/test/Feature/globalredefinition3.ll
@@ -0,0 +1,4 @@
+; RUN: not llvm-as %s -o /dev/null |& grep {redefinition of global '@B'}
+
+@B = global i32 7
+@B = global i32 7
diff --git a/test/Feature/globalvars.ll b/test/Feature/globalvars.ll
new file mode 100644
index 0000000..9a23775
--- /dev/null
+++ b/test/Feature/globalvars.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@MyVar = external global i32 ; <i32*> [#uses=1]
+@MyIntList = external global { \2*, i32 } ; <{ \2*, i32 }*> [#uses=1]
+external global i32 ; <i32*>:0 [#uses=0]
+@AConst = constant i32 123 ; <i32*> [#uses=0]
+@AString = constant [4 x i8] c"test" ; <[4 x i8]*> [#uses=0]
+@ZeroInit = global { [100 x i32], [40 x float] } zeroinitializer ; <{ [100 x i32], [40 x float] }*> [#uses=0]
+
+define i32 @foo(i32 %blah) {
+ store i32 5, i32* @MyVar
+ %idx = getelementptr { \2*, i32 }* @MyIntList, i64 0, i32 1 ; <i32*> [#uses=1]
+ store i32 12, i32* %idx
+ ret i32 %blah
+}
+
diff --git a/test/Feature/indirectcall.ll b/test/Feature/indirectcall.ll
new file mode 100644
index 0000000..c1cf39f
--- /dev/null
+++ b/test/Feature/indirectcall.ll
@@ -0,0 +1,49 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+declare i32 @atoi(i8*)
+
+define i64 @fib(i64 %n) {
+ icmp ult i64 %n, 2 ; <i1>:1 [#uses=1]
+ br i1 %1, label %BaseCase, label %RecurseCase
+
+BaseCase: ; preds = %0
+ ret i64 1
+
+RecurseCase: ; preds = %0
+ %n2 = sub i64 %n, 2 ; <i64> [#uses=1]
+ %n1 = sub i64 %n, 1 ; <i64> [#uses=1]
+ %f2 = call i64 @fib( i64 %n2 ) ; <i64> [#uses=1]
+ %f1 = call i64 @fib( i64 %n1 ) ; <i64> [#uses=1]
+ %result = add i64 %f2, %f1 ; <i64> [#uses=1]
+ ret i64 %result
+}
+
+define i64 @realmain(i32 %argc, i8** %argv) {
+; <label>:0
+ icmp eq i32 %argc, 2 ; <i1>:1 [#uses=1]
+ br i1 %1, label %HasArg, label %Continue
+
+HasArg: ; preds = %0
+ %n1 = add i32 1, 1 ; <i32> [#uses=1]
+ br label %Continue
+
+Continue: ; preds = %HasArg, %0
+ %n = phi i32 [ %n1, %HasArg ], [ 1, %0 ] ; <i32> [#uses=1]
+ %N = sext i32 %n to i64 ; <i64> [#uses=1]
+ %F = call i64 @fib( i64 %N ) ; <i64> [#uses=1]
+ ret i64 %F
+}
+
+define i64 @trampoline(i64 %n, i64 (i64)* %fibfunc) {
+ %F = call i64 %fibfunc( i64 %n ) ; <i64> [#uses=1]
+ ret i64 %F
+}
+
+define i32 @main() {
+ %Result = call i64 @trampoline( i64 10, i64 (i64)* @fib ) ; <i64> [#uses=1]
+ %Result.upgrd.1 = trunc i64 %Result to i32 ; <i32> [#uses=1]
+ ret i32 %Result.upgrd.1
+}
+
diff --git a/test/Feature/indirectcall2.ll b/test/Feature/indirectcall2.ll
new file mode 100644
index 0000000..1b949fc
--- /dev/null
+++ b/test/Feature/indirectcall2.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+define i64 @test(i64 %X) {
+ ret i64 %X
+}
+
+define i64 @fib(i64 %n) {
+; <label>:0
+ %T = icmp ult i64 %n, 2 ; <i1> [#uses=1]
+ br i1 %T, label %BaseCase, label %RecurseCase
+
+RecurseCase: ; preds = %0
+ %result = call i64 @test( i64 %n ) ; <i64> [#uses=0]
+ br label %BaseCase
+
+BaseCase: ; preds = %RecurseCase, %0
+ %X = phi i64 [ 1, %0 ], [ 2, %RecurseCase ] ; <i64> [#uses=1]
+ ret i64 %X
+}
+
diff --git a/test/Feature/inlineasm.ll b/test/Feature/inlineasm.ll
new file mode 100644
index 0000000..6be5722
--- /dev/null
+++ b/test/Feature/inlineasm.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+module asm "this is an inline asm block"
+module asm "this is another inline asm block"
+
+define i32 @test() {
+ %X = call i32 asm "tricky here $0, $1", "=r,r"( i32 4 ) ; <i32> [#uses=1]
+ call void asm sideeffect "eieio", ""( )
+ ret i32 %X
+}
+
diff --git a/test/Feature/instructions.ll b/test/Feature/instructions.ll
new file mode 100644
index 0000000..d0c303d
--- /dev/null
+++ b/test/Feature/instructions.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+define i32 @test_extractelement(<4 x i32> %V) {
+ %R = extractelement <4 x i32> %V, i32 1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define <4 x i32> @test_insertelement(<4 x i32> %V) {
+ %R = insertelement <4 x i32> %V, i32 0, i32 0 ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %R
+}
+
+define <4 x i32> @test_shufflevector_u(<4 x i32> %V) {
+ %R = shufflevector <4 x i32> %V, <4 x i32> %V, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %R
+}
+
+define <4 x float> @test_shufflevector_f(<4 x float> %V) {
+ %R = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %R
+}
+
diff --git a/test/Feature/intrinsics.ll b/test/Feature/intrinsics.ll
new file mode 100644
index 0000000..2dd6b53
--- /dev/null
+++ b/test/Feature/intrinsics.ll
@@ -0,0 +1,62 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+declare i1 @llvm.isunordered.f32(float, float)
+
+declare i1 @llvm.isunordered.f64(double, double)
+
+declare void @llvm.prefetch(i8*, i32, i32)
+
+declare i8 @llvm.ctpop.i8(i8)
+
+declare i16 @llvm.ctpop.i16(i16)
+
+declare i32 @llvm.ctpop.i32(i32)
+
+declare i64 @llvm.ctpop.i64(i64)
+
+declare i8 @llvm.cttz.i8(i8)
+
+declare i16 @llvm.cttz.i16(i16)
+
+declare i32 @llvm.cttz.i32(i32)
+
+declare i64 @llvm.cttz.i64(i64)
+
+declare i8 @llvm.ctlz.i8(i8)
+
+declare i16 @llvm.ctlz.i16(i16)
+
+declare i32 @llvm.ctlz.i32(i32)
+
+declare i64 @llvm.ctlz.i64(i64)
+
+declare float @llvm.sqrt.f32(float)
+
+declare double @llvm.sqrt.f64(double)
+
+; Test llvm intrinsics
+;
+define void @libm() {
+ fcmp uno float 1.000000e+00, 2.000000e+00 ; <i1>:1 [#uses=0]
+ fcmp uno double 3.000000e+00, 4.000000e+00 ; <i1>:2 [#uses=0]
+ call void @llvm.prefetch( i8* null, i32 1, i32 3 )
+ call float @llvm.sqrt.f32( float 5.000000e+00 ) ; <float>:3 [#uses=0]
+ call double @llvm.sqrt.f64( double 6.000000e+00 ) ; <double>:4 [#uses=0]
+ call i8 @llvm.ctpop.i8( i8 10 ) ; <i32>:5 [#uses=0]
+ call i16 @llvm.ctpop.i16( i16 11 ) ; <i32>:6 [#uses=0]
+ call i32 @llvm.ctpop.i32( i32 12 ) ; <i32>:7 [#uses=0]
+ call i64 @llvm.ctpop.i64( i64 13 ) ; <i32>:8 [#uses=0]
+ call i8 @llvm.ctlz.i8( i8 14 ) ; <i32>:9 [#uses=0]
+ call i16 @llvm.ctlz.i16( i16 15 ) ; <i32>:10 [#uses=0]
+ call i32 @llvm.ctlz.i32( i32 16 ) ; <i32>:11 [#uses=0]
+ call i64 @llvm.ctlz.i64( i64 17 ) ; <i32>:12 [#uses=0]
+ call i8 @llvm.cttz.i8( i8 18 ) ; <i32>:13 [#uses=0]
+ call i16 @llvm.cttz.i16( i16 19 ) ; <i32>:14 [#uses=0]
+ call i32 @llvm.cttz.i32( i32 20 ) ; <i32>:15 [#uses=0]
+ call i64 @llvm.cttz.i64( i64 21 ) ; <i32>:16 [#uses=0]
+ ret void
+}
+
+; FIXME: test ALL the intrinsics in this file.
diff --git a/test/Feature/llvm2cpp.exp b/test/Feature/llvm2cpp.exp
new file mode 100644
index 0000000..de0126c
--- /dev/null
+++ b/test/Feature/llvm2cpp.exp
@@ -0,0 +1,3 @@
+load_lib llvm2cpp.exp
+
+llvm2cpp-test [lsort [glob -nocomplain $srcdir/$subdir/*.ll]]
diff --git a/test/Feature/load_module.ll b/test/Feature/load_module.ll
new file mode 100644
index 0000000..e2e222f
--- /dev/null
+++ b/test/Feature/load_module.ll
@@ -0,0 +1,10 @@
+; PR1318
+; RUN: opt < %s -load=%llvmlibsdir/LLVMHello%shlibext -hello \
+; RUN: -disable-output |& grep Hello
+
+@junk = global i32 0
+
+define i32* @somefunk() {
+ ret i32* @junk
+}
+
diff --git a/test/Feature/md_on_instruction.ll b/test/Feature/md_on_instruction.ll
new file mode 100644
index 0000000..da9e49e
--- /dev/null
+++ b/test/Feature/md_on_instruction.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis | grep " !dbg " | count 4
+define i32 @foo() nounwind ssp {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ call void @llvm.dbg.func.start(metadata !0)
+ store i32 42, i32* %retval, !dbg !3
+ br label %0, !dbg !3
+
+; <label>:0 ; preds = %entry
+ call void @llvm.dbg.region.end(metadata !0)
+ %1 = load i32* %retval, !dbg !3 ; <i32> [#uses=1]
+ ret i32 %1, !dbg !3
+}
+
+declare void @llvm.dbg.func.start(metadata) nounwind readnone
+
+declare void @llvm.dbg.region.end(metadata) nounwind readnone
+
+!0 = metadata !{i32 458798, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 1, metadata !2, i1 false, i1 true}
+!1 = metadata !{i32 458769, i32 0, i32 12, metadata !"foo.c", metadata !"/tmp", metadata !"clang 1.0", i1 true, i1 false, metadata !"", i32 0}
+!2 = metadata !{i32 458788, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}
+!3 = metadata !{i32 1, i32 13, metadata !1, metadata !1}
diff --git a/test/Feature/memorymarkers.ll b/test/Feature/memorymarkers.ll
new file mode 100644
index 0000000..06b8376
--- /dev/null
+++ b/test/Feature/memorymarkers.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as -disable-output < %s
+
+%"struct.std::pair<int,int>" = type { i32, i32 }
+
+declare void @_Z3barRKi(i32*)
+
+declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
+declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
+declare {}* @llvm.invariant.start(i64, i8* nocapture) readonly nounwind
+declare void @llvm.invariant.end({}*, i64, i8* nocapture) nounwind
+
+define i32 @_Z4foo2v() nounwind {
+entry:
+ %x = alloca %"struct.std::pair<int,int>"
+ %y = bitcast %"struct.std::pair<int,int>"* %x to i8*
+
+ ;; Constructor starts here (this isn't needed since it is immediately
+ ;; preceded by an alloca, but shown for completeness).
+ call void @llvm.lifetime.start(i64 8, i8* %y)
+
+ %0 = getelementptr %"struct.std::pair<int,int>"* %x, i32 0, i32 0
+ store i32 4, i32* %0, align 8
+ %1 = getelementptr %"struct.std::pair<int,int>"* %x, i32 0, i32 1
+ store i32 5, i32* %1, align 4
+
+ ;; Constructor has finished here.
+ %inv = call {}* @llvm.invariant.start(i64 8, i8* %y)
+ call void @_Z3barRKi(i32* %0) nounwind
+ %2 = load i32* %0, align 8
+
+ ;; Destructor is run here.
+ call void @llvm.invariant.end({}* %inv, i64 8, i8* %y)
+ ;; Destructor is done here.
+ call void @llvm.lifetime.end(i64 8, i8* %y)
+ ret i32 %2
+}
diff --git a/test/Feature/newcasts.ll b/test/Feature/newcasts.ll
new file mode 100644
index 0000000..4cfc8bc
--- /dev/null
+++ b/test/Feature/newcasts.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+define void @"NewCasts" (i16 %x) {
+ %a = zext i16 %x to i32
+ %b = sext i16 %x to i32
+ %c = trunc i16 %x to i8
+ %d = uitofp i16 %x to float
+ %e = sitofp i16 %x to double
+ %f = fptoui float %d to i16
+ %g = fptosi double %e to i16
+ %i = fpext float %d to double
+ %j = fptrunc double %i to float
+ %k = bitcast i32 %a to float
+ %l = inttoptr i16 %x to i32*
+ %m = ptrtoint i32* %l to i64
+ %n = insertelement <4 x i32> undef, i32 %a, i32 0
+ %o = sitofp <4 x i32> %n to <4 x float>
+ %p = uitofp <4 x i32> %n to <4 x float>
+ %q = fptosi <4 x float> %p to <4 x i32>
+ %r = fptoui <4 x float> %p to <4 x i32>
+ ret void
+}
+
+
+define i16 @"ZExtConst" () {
+ ret i16 trunc ( i32 zext ( i16 42 to i32) to i16 )
+}
+
+define i16 @"SExtConst" () {
+ ret i16 trunc (i32 sext (i16 42 to i32) to i16 )
+}
diff --git a/test/Feature/noalias-ret.ll b/test/Feature/noalias-ret.ll
new file mode 100644
index 0000000..d88452b
--- /dev/null
+++ b/test/Feature/noalias-ret.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s
+
+define noalias i8* @_Znwj(i32 %x) nounwind {
+ %A = malloc i8, i32 %x
+ ret i8* %A
+}
diff --git a/test/Feature/opaquetypes.ll b/test/Feature/opaquetypes.ll
new file mode 100644
index 0000000..6539c1a
--- /dev/null
+++ b/test/Feature/opaquetypes.ll
@@ -0,0 +1,55 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; This test case is used to test opaque type processing, forward references,
+; and recursive types. Oh my.
+;
+
+%SQ1 = type { i32 }
+%SQ2 = type { %ITy }
+%ITy = type i32
+
+
+%CCC = type { \2* }
+%BBB = type { \2*, \2 * }
+%AAA = type { \2*, {\2*}, [12x{\2*}], {[1x{\2*}]} }
+
+; Test numbered types
+type %CCC
+type %BBB
+%Composite = type { %0, %1 }
+
+; Test simple opaque type resolution...
+%intty = type i32
+
+; Perform a simple forward reference...
+%ty1 = type { %ty2, i32 }
+%ty2 = type float
+
+; Do a recursive type...
+%list = type { %list * }
+%listp = type { %listp } *
+
+; Do two mutually recursive types...
+%TyA = type { %ty2, %TyB * }
+%TyB = type { double, %TyA * }
+
+; A complex recursive type...
+%Y = type { {%Y*}, %Y* }
+%Z = type { { %Z * }, [12x%Z] *, {{{ %Z * }}} }
+
+; More ridiculous test cases...
+%A = type [ 123x %A*]
+%M = type %M (%M, %M) *
+%P = type %P*
+
+; Recursive ptrs
+%u = type %v*
+%v = type %u*
+
+; Test the parser for unnamed recursive types...
+%P1 = type \1 *
+%Y1 = type { { \3 * }, \2 * }
+%Z1 = type { { \3 * }, [12x\3] *, { { { \5 * } } } }
+
diff --git a/test/Feature/packed.ll b/test/Feature/packed.ll
new file mode 100644
index 0000000..b86a227
--- /dev/null
+++ b/test/Feature/packed.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@foo1 = external global <4 x float> ; <<4 x float>*> [#uses=2]
+@foo2 = external global <2 x i32> ; <<2 x i32>*> [#uses=2]
+
+define void @main() {
+ store <4 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >, <4 x float>* @foo1
+ store <2 x i32> < i32 4, i32 4 >, <2 x i32>* @foo2
+ %l1 = load <4 x float>* @foo1 ; <<4 x float>> [#uses=0]
+ %l2 = load <2 x i32>* @foo2 ; <<2 x i32>> [#uses=0]
+ ret void
+}
+
diff --git a/test/Feature/packed_struct.ll b/test/Feature/packed_struct.ll
new file mode 100644
index 0000000..4d4ace9
--- /dev/null
+++ b/test/Feature/packed_struct.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+; RUN: not grep cast %t2.ll
+; RUN: grep {\\}>} %t2.ll
+; END.
+
+%struct.anon = type <{ i8, i32, i32, i32 }>
+@foos = external global %struct.anon
+@bara = external global [2 x <{ i32, i8 }>]
+
+;initializers should work for packed and non-packed the same way
+@E1 = global <{i8, i32, i32}> <{i8 1, i32 2, i32 3}>
+@E2 = global {i8, i32, i32} {i8 4, i32 5, i32 6}
+
+
+define i32 @main()
+{
+ %tmp = load i32* getelementptr (%struct.anon* @foos, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp3 = load i32* getelementptr (%struct.anon* @foos, i32 0, i32 2) ; <i32> [#uses=1]
+ %tmp6 = load i32* getelementptr (%struct.anon* @foos, i32 0, i32 3) ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp3, %tmp ; <i32> [#uses=1]
+ %tmp7 = add i32 %tmp4, %tmp6 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
+
+define i32 @bar() {
+entry:
+ %tmp = load i32* getelementptr([2 x <{ i32, i8 }>]* @bara, i32 0, i32 0, i32 0 ) ; <i32> [#uses=1]
+ %tmp4 = load i32* getelementptr ([2 x <{ i32, i8 }>]* @bara, i32 0, i32 1, i32 0) ; <i32> [#uses=1]
+ %tmp5 = add i32 %tmp4, %tmp ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
diff --git a/test/Feature/paramattrs.ll b/test/Feature/paramattrs.ll
new file mode 100644
index 0000000..3bee617
--- /dev/null
+++ b/test/Feature/paramattrs.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+%ZFunTy = type i32(i8 zeroext)
+%SFunTy = type i32(i8 signext)
+
+declare i16 @"test"(i16 signext %arg) signext
+declare i8 @"test2" (i16 zeroext %a2) zeroext
+
+declare i32 @"test3"(i32* noalias %p)
+
+declare void @exit(i32) noreturn nounwind
+
+define i32 @main(i32 inreg %argc, i8 ** inreg %argv) nounwind {
+ %val = trunc i32 %argc to i16
+ %res1 = call i16 (i16 signext) signext *@test(i16 signext %val) signext
+ %two = add i16 %res1, %res1
+ %res2 = call i8 @test2(i16 %two zeroext) zeroext
+ %retVal = sext i16 %two to i32
+ ret i32 %retVal
+}
diff --git a/test/Feature/ppcld.ll b/test/Feature/ppcld.ll
new file mode 100644
index 0000000..393a491
--- /dev/null
+++ b/test/Feature/ppcld.ll
@@ -0,0 +1,26 @@
+; RUN: llvm-as < %s | llvm-dis > %t
+; RUN: llvm-as < %t | llvm-dis > %t2
+; RUN: diff %t %t2
+; ModuleID = '<stdin>'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "powerpc-apple-darwin8"
+@ld = external global ppc_fp128 ; <ppc_fp128*> [#uses=1]
+@d = global double 4.050000e+00, align 8 ; <double*> [#uses=1]
+@f = global float 0x4010333340000000 ; <float*> [#uses=1]
+
+define i32 @foo() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = load float* @f ; <float> [#uses=1]
+ %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
+ %tmp2 = load double* @d ; <double> [#uses=1]
+ %tmp3 = fmul double %tmp1, %tmp2 ; <double> [#uses=1]
+ %tmp4 = fpext double %tmp3 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ store ppc_fp128 %tmp4, ppc_fp128* @ld
+ br label %return
+
+return: ; preds = %entry
+ %retval4 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval4
+}
diff --git a/test/Feature/properties.ll b/test/Feature/properties.ll
new file mode 100644
index 0000000..c688d68
--- /dev/null
+++ b/test/Feature/properties.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+target datalayout = "e-p:32:32"
+target triple = "proc-vend-sys"
+deplibs = [ "m", "c" ]
diff --git a/test/Feature/prototype.ll b/test/Feature/prototype.ll
new file mode 100644
index 0000000..3754a1d
--- /dev/null
+++ b/test/Feature/prototype.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+declare i32 @bar(i32)
+
+define i32 @foo(i32 %blah) {
+ %xx = call i32 @bar( i32 %blah ) ; <i32> [#uses=1]
+ ret i32 %xx
+}
+
diff --git a/test/Feature/recursivetype.ll b/test/Feature/recursivetype.ll
new file mode 100644
index 0000000..43db5f0
--- /dev/null
+++ b/test/Feature/recursivetype.ll
@@ -0,0 +1,103 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; This file contains the output from the following compiled C code:
+; typedef struct list {
+; struct list *Next;
+; int Data;
+; } list;
+;
+; // Iterative insert fn
+; void InsertIntoListTail(list **L, int Data) {
+; while (*L)
+; L = &(*L)->Next;
+; *L = (list*)malloc(sizeof(list));
+; (*L)->Data = Data;
+; (*L)->Next = 0;
+; }
+;
+; // Recursive list search fn
+; list *FindData(list *L, int Data) {
+; if (L == 0) return 0;
+; if (L->Data == Data) return L;
+; return FindData(L->Next, Data);
+; }
+;
+; void DoListStuff() {
+; list *MyList = 0;
+; InsertIntoListTail(&MyList, 100);
+; InsertIntoListTail(&MyList, 12);
+; InsertIntoListTail(&MyList, 42);
+; InsertIntoListTail(&MyList, 1123);
+; InsertIntoListTail(&MyList, 1213);
+;
+; if (FindData(MyList, 75)) foundIt();
+; if (FindData(MyList, 42)) foundIt();
+; if (FindData(MyList, 700)) foundIt();
+; }
+
+%list = type { %list*, i32 }
+
+declare i8* @malloc(i32)
+
+define void @InsertIntoListTail(%list** %L, i32 %Data) {
+bb1:
+ %reg116 = load %list** %L ; <%list*> [#uses=1]
+ %cast1004 = inttoptr i64 0 to %list* ; <%list*> [#uses=1]
+ %cond1000 = icmp eq %list* %reg116, %cast1004 ; <i1> [#uses=1]
+ br i1 %cond1000, label %bb3, label %bb2
+
+bb2: ; preds = %bb2, %bb1
+ %reg117 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ] ; <%list**> [#uses=1]
+ %cast1010 = bitcast %list** %reg117 to %list*** ; <%list***> [#uses=1]
+ %reg118 = load %list*** %cast1010 ; <%list**> [#uses=3]
+ %reg109 = load %list** %reg118 ; <%list*> [#uses=1]
+ %cast1005 = inttoptr i64 0 to %list* ; <%list*> [#uses=1]
+ %cond1001 = icmp ne %list* %reg109, %cast1005 ; <i1> [#uses=1]
+ br i1 %cond1001, label %bb2, label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %reg119 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ] ; <%list**> [#uses=1]
+ %cast1006 = bitcast %list** %reg119 to i8** ; <i8**> [#uses=1]
+ %reg111 = call i8* @malloc( i32 16 ) ; <i8*> [#uses=3]
+ store i8* %reg111, i8** %cast1006
+ %reg111.upgrd.1 = ptrtoint i8* %reg111 to i64 ; <i64> [#uses=1]
+ %reg1002 = add i64 %reg111.upgrd.1, 8 ; <i64> [#uses=1]
+ %reg1002.upgrd.2 = inttoptr i64 %reg1002 to i8* ; <i8*> [#uses=1]
+ %cast1008 = bitcast i8* %reg1002.upgrd.2 to i32* ; <i32*> [#uses=1]
+ store i32 %Data, i32* %cast1008
+ %cast1003 = inttoptr i64 0 to i64* ; <i64*> [#uses=1]
+ %cast1009 = bitcast i8* %reg111 to i64** ; <i64**> [#uses=1]
+ store i64* %cast1003, i64** %cast1009
+ ret void
+}
+
+define %list* @FindData(%list* %L, i32 %Data) {
+bb1:
+ br label %bb2
+
+bb2: ; preds = %bb6, %bb1
+ %reg115 = phi %list* [ %reg116, %bb6 ], [ %L, %bb1 ] ; <%list*> [#uses=4]
+ %cast1014 = inttoptr i64 0 to %list* ; <%list*> [#uses=1]
+ %cond1011 = icmp ne %list* %reg115, %cast1014 ; <i1> [#uses=1]
+ br i1 %cond1011, label %bb4, label %bb3
+
+bb3: ; preds = %bb2
+ ret %list* null
+
+bb4: ; preds = %bb2
+ %idx = getelementptr %list* %reg115, i64 0, i32 1 ; <i32*> [#uses=1]
+ %reg111 = load i32* %idx ; <i32> [#uses=1]
+ %cond1013 = icmp ne i32 %reg111, %Data ; <i1> [#uses=1]
+ br i1 %cond1013, label %bb6, label %bb5
+
+bb5: ; preds = %bb4
+ ret %list* %reg115
+
+bb6: ; preds = %bb4
+ %idx2 = getelementptr %list* %reg115, i64 0, i32 0 ; <%list**> [#uses=1]
+ %reg116 = load %list** %idx2 ; <%list*> [#uses=1]
+ br label %bb2
+}
+
diff --git a/test/Feature/simplecalltest.ll b/test/Feature/simplecalltest.ll
new file mode 100644
index 0000000..6452286
--- /dev/null
+++ b/test/Feature/simplecalltest.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+ %FunTy = type i32 (i32)
+
+define void @invoke(%FunTy* %x) {
+ %foo = call i32 %x( i32 123 ) ; <i32> [#uses=0]
+ ret void
+}
+
+define i32 @main(i32 %argc, i8** %argv, i8** %envp) {
+ %retval = call i32 @test( i32 %argc ) ; <i32> [#uses=2]
+ %two = add i32 %retval, %retval ; <i32> [#uses=1]
+ %retval2 = call i32 @test( i32 %argc ) ; <i32> [#uses=1]
+ %two2 = add i32 %two, %retval2 ; <i32> [#uses=1]
+ call void @invoke( %FunTy* @test )
+ ret i32 %two2
+}
+
+define i32 @test(i32 %i0) {
+ ret i32 %i0
+}
+
diff --git a/test/Feature/small.ll b/test/Feature/small.ll
new file mode 100644
index 0000000..4644f64
--- /dev/null
+++ b/test/Feature/small.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+%x = type i32
+
+define i32 @foo(i32 %in) {
+label:
+ ret i32 2
+}
+
diff --git a/test/Feature/smallest.ll b/test/Feature/smallest.ll
new file mode 100644
index 0000000..5dd023c
--- /dev/null
+++ b/test/Feature/smallest.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
diff --git a/test/Feature/sparcld.ll b/test/Feature/sparcld.ll
new file mode 100644
index 0000000..095f6f6
--- /dev/null
+++ b/test/Feature/sparcld.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llvm-dis > %t
+; RUN: llvm-as < %t | llvm-dis > %t2
+; RUN: diff %t %t2
+; ModuleID = '<stdin>'
+@ld = external global fp128 ; <fp128*> [#uses=1]
+@d = global double 4.050000e+00, align 8 ; <double*> [#uses=1]
+@f = global float 0x4010333340000000 ; <float*> [#uses=1]
+
+define i32 @foo() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = load float* @f ; <float> [#uses=1]
+ %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
+ %tmp2 = load double* @d ; <double> [#uses=1]
+ %tmp3 = fmul double %tmp1, %tmp2 ; <double> [#uses=1]
+ %tmp4 = fpext double %tmp3 to fp128 ; <fp128> [#uses=1]
+ store fp128 %tmp4, fp128* @ld
+ br label %return
+
+return: ; preds = %entry
+ %retval4 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval4
+}
diff --git a/test/Feature/terminators.ll b/test/Feature/terminators.ll
new file mode 100644
index 0000000..1bca2a8
--- /dev/null
+++ b/test/Feature/terminators.ll
@@ -0,0 +1,43 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+ %int = type i32
+
+define i32 @squared(i32 %i0) {
+ switch i32 %i0, label %Default [
+ i32 1, label %Case1
+ i32 2, label %Case2
+ i32 4, label %Case4
+ ]
+
+Default: ; preds = %0
+ ret i32 -1
+
+Case1: ; preds = %0
+ ret i32 1
+
+Case2: ; preds = %0
+ ret i32 4
+
+Case4: ; preds = %0
+ ret i32 16
+}
+
+
+@Addr = global i8* blockaddress(@indbrtest, %BB1)
+@Addr3 = global i8* blockaddress(@squared, %Case1)
+
+
+define i32 @indbrtest(i8* %P, i32* %Q) {
+ indirectbr i8* %P, [label %BB1, label %BB2, label %BB3]
+BB1:
+ indirectbr i32* %Q, []
+BB2:
+ %R = bitcast i8* blockaddress(@indbrtest, %BB3) to i8*
+ indirectbr i8* %R, [label %BB1, label %BB2, label %BB3]
+BB3:
+ ret i32 2
+}
+
+
diff --git a/test/Feature/testalloca.ll b/test/Feature/testalloca.ll
new file mode 100644
index 0000000..230b5a9
--- /dev/null
+++ b/test/Feature/testalloca.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+ %inners = type { float, { i8 } }
+ %struct = type { i32, %inners, i64 }
+
+define i32 @testfunction(i32 %i0, i32 %j0) {
+ alloca i8, i32 5 ; <i8*>:1 [#uses=0]
+ %ptr = alloca i32 ; <i32*> [#uses=2]
+ store i32 3, i32* %ptr
+ %val = load i32* %ptr ; <i32> [#uses=0]
+ %sptr = alloca %struct ; <%struct*> [#uses=2]
+ %nsptr = getelementptr %struct* %sptr, i64 0, i32 1 ; <%inners*> [#uses=1]
+ %ubsptr = getelementptr %inners* %nsptr, i64 0, i32 1 ; <{ i8 }*> [#uses=1]
+ %idx = getelementptr { i8 }* %ubsptr, i64 0, i32 0 ; <i8*> [#uses=1]
+ store i8 4, i8* %idx
+ %fptr = getelementptr %struct* %sptr, i64 0, i32 1, i32 0 ; <float*> [#uses=1]
+ store float 4.000000e+00, float* %fptr
+ ret i32 3
+}
+
diff --git a/test/Feature/testconstants.ll b/test/Feature/testconstants.ll
new file mode 100644
index 0000000..6810f3d
--- /dev/null
+++ b/test/Feature/testconstants.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@somestr = constant [11 x i8] c"hello world" ; <[11 x i8]*> [#uses=1]
+@array = constant [2 x i32] [ i32 12, i32 52 ] ; <[2 x i32]*> [#uses=1]
+constant { i32, i32 } { i32 4, i32 3 } ; <{ i32, i32 }*>:0 [#uses=0]
+
+define [2 x i32]* @testfunction(i32 %i0, i32 %j0) {
+ ret [2 x i32]* @array
+}
+
+define i8* @otherfunc(i32, double) {
+ %somestr = getelementptr [11 x i8]* @somestr, i64 0, i64 0 ; <i8*> [#uses=1]
+ ret i8* %somestr
+}
+
+define i8* @yetanotherfunc(i32, double) {
+ ret i8* null
+}
+
+define i32 @negativeUnsigned() {
+ ret i32 -1
+}
+
+define i32 @largeSigned() {
+ ret i32 -394967296
+}
+
diff --git a/test/Feature/testlogical.ll b/test/Feature/testlogical.ll
new file mode 100644
index 0000000..a064869
--- /dev/null
+++ b/test/Feature/testlogical.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+define i32 @simpleAdd(i32 %i0, i32 %j0) {
+ %t1 = xor i32 %i0, %j0 ; <i32> [#uses=1]
+ %t2 = or i32 %i0, %j0 ; <i32> [#uses=1]
+ %t3 = and i32 %t1, %t2 ; <i32> [#uses=1]
+ ret i32 %t3
+}
+
diff --git a/test/Feature/testmemory.ll b/test/Feature/testmemory.ll
new file mode 100644
index 0000000..a9019f0
--- /dev/null
+++ b/test/Feature/testmemory.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+ %complexty = type { i32, { [4 x i8*], float }, double }
+ %struct = type { i32, { float, { i8 } }, i64 }
+
+define i32 @main() {
+ call i32 @testfunction( i64 0, i64 1 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
+define i32 @testfunction(i64 %i0, i64 %j0) {
+ %array0 = malloc [4 x i8] ; <[4 x i8]*> [#uses=2]
+ %size = add i32 2, 2 ; <i32> [#uses=1]
+ %array1 = malloc i8, i32 4 ; <i8*> [#uses=1]
+ %array2 = malloc i8, i32 %size ; <i8*> [#uses=1]
+ %idx = getelementptr [4 x i8]* %array0, i64 0, i64 2 ; <i8*> [#uses=1]
+ store i8 123, i8* %idx
+ free [4 x i8]* %array0
+ free i8* %array1
+ free i8* %array2
+ %aa = alloca %complexty, i32 5 ; <%complexty*> [#uses=1]
+ %idx2 = getelementptr %complexty* %aa, i64 %i0, i32 1, i32 0, i64 %j0 ; <i8**> [#uses=1]
+ store i8* null, i8** %idx2
+ %ptr = alloca i32 ; <i32*> [#uses=2]
+ store i32 3, i32* %ptr
+ %val = load i32* %ptr ; <i32> [#uses=0]
+ %sptr = alloca %struct ; <%struct*> [#uses=1]
+ %ubsptr = getelementptr %struct* %sptr, i64 0, i32 1, i32 1 ; <{ i8 }*> [#uses=1]
+ %idx3 = getelementptr { i8 }* %ubsptr, i64 0, i32 0 ; <i8*> [#uses=1]
+ store i8 4, i8* %idx3
+ ret i32 3
+}
+
diff --git a/test/Feature/testtype.ll b/test/Feature/testtype.ll
new file mode 100644
index 0000000..124aa09
--- /dev/null
+++ b/test/Feature/testtype.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+%X = type i32* addrspace(4)*
+
+ %inners = type { float, { i8 } }
+ %struct = type { i32, %inners, i64 }
+
+%fwdref = type { %fwd* }
+%fwd = type %fwdref*
+
+; same as above with unnamed types
+type { %1* }
+type %0*
+%test = type %1
+
+%test2 = type [2 x i32]
+;%x = type %undefined*
+
+%test3 = type i32 (i32()*, float(...)*, ...)*
diff --git a/test/Feature/testvarargs.ll b/test/Feature/testvarargs.ll
new file mode 100644
index 0000000..a73b7ec
--- /dev/null
+++ b/test/Feature/testvarargs.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+declare i32 @printf(i8*, ...) ;; Prototype for: int __builtin_printf(const char*, ...)
+
+define i32 @testvarar() {
+ call i32 (i8*, ...)* @printf( i8* null, i32 12, i8 42 ) ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
+
diff --git a/test/Feature/undefined.ll b/test/Feature/undefined.ll
new file mode 100644
index 0000000..e63ce41
--- /dev/null
+++ b/test/Feature/undefined.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@X = global i32 undef ; <i32*> [#uses=0]
+
+declare i32 @atoi(i8*)
+
+define i32 @test() {
+ ret i32 undef
+}
+
+define i32 @test2() {
+ %X = add i32 undef, 1 ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Feature/unreachable.ll b/test/Feature/unreachable.ll
new file mode 100644
index 0000000..8bffb4c
--- /dev/null
+++ b/test/Feature/unreachable.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+declare void @bar()
+
+define i32 @foo() {
+ unreachable
+}
+
+define double @xyz() {
+ call void @bar( )
+ unreachable
+}
+
diff --git a/test/Feature/varargs.ll b/test/Feature/varargs.ll
new file mode 100644
index 0000000..b9317df
--- /dev/null
+++ b/test/Feature/varargs.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; Demonstrate all of the variable argument handling intrinsic functions plus
+; the va_arg instruction.
+
+declare void @llvm.va_start(i8*)
+
+declare void @llvm.va_copy(i8*, i8*)
+
+declare void @llvm.va_end(i8*)
+
+define i32 @test(i32 %X, ...) {
+ %ap = alloca i8* ; <i8**> [#uses=4]
+ %va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %va.upgrd.1 )
+ %tmp = va_arg i8** %ap, i32 ; <i32> [#uses=1]
+ %aq = alloca i8* ; <i8**> [#uses=2]
+ %va0.upgrd.2 = bitcast i8** %aq to i8* ; <i8*> [#uses=1]
+ %va1.upgrd.3 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_copy( i8* %va0.upgrd.2, i8* %va1.upgrd.3 )
+ %va.upgrd.4 = bitcast i8** %aq to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.4 )
+ %va.upgrd.5 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.5 )
+ ret i32 %tmp
+}
+
diff --git a/test/Feature/varargs_new.ll b/test/Feature/varargs_new.ll
new file mode 100644
index 0000000..a46f270
--- /dev/null
+++ b/test/Feature/varargs_new.ll
@@ -0,0 +1,38 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; Demonstrate all of the variable argument handling intrinsic functions plus
+; the va_arg instruction.
+
+declare void @llvm.va_start(i8*)
+
+declare void @llvm.va_copy(i8*, i8*)
+
+declare void @llvm.va_end(i8*)
+
+define i32 @test(i32 %X, ...) {
+ ; Allocate two va_list items. On this target, va_list is of type sbyte*
+ %ap = alloca i8* ; <i8**> [#uses=4]
+ %aq = alloca i8* ; <i8**> [#uses=2]
+
+ ; Initialize variable argument processing
+ %va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %va.upgrd.1 )
+
+ ; Read a single integer argument
+ %tmp = va_arg i8** %ap, i32 ; <i32> [#uses=1]
+
+ ; Demonstrate usage of llvm.va_copy and llvm_va_end
+ %apv = load i8** %ap ; <i8*> [#uses=1]
+ %va0.upgrd.2 = bitcast i8** %aq to i8* ; <i8*> [#uses=1]
+ %va1.upgrd.3 = bitcast i8* %apv to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_copy( i8* %va0.upgrd.2, i8* %va1.upgrd.3 )
+ %va.upgrd.4 = bitcast i8** %aq to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.4 )
+
+ ; Stop processing of arguments.
+ %va.upgrd.5 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %va.upgrd.5 )
+ ret i32 %tmp
+}
diff --git a/test/Feature/vector-cast-constant-exprs.ll b/test/Feature/vector-cast-constant-exprs.ll
new file mode 100644
index 0000000..ffdc0f0
--- /dev/null
+++ b/test/Feature/vector-cast-constant-exprs.ll
@@ -0,0 +1,37 @@
+; RUN: llvm-as < %s | llvm-dis | not grep {ret.*(}
+
+; All of these constant expressions should fold.
+
+define <2 x float> @ga() {
+ ret <2 x float> fptrunc (<2 x double><double 4.3, double 3.2> to <2 x float>)
+}
+define <2 x double> @gb() {
+ ret <2 x double> fpext (<2 x float><float 2.0, float 8.0> to <2 x double>)
+}
+define <2 x i64> @gd() {
+ ret <2 x i64> zext (<2 x i32><i32 3, i32 4> to <2 x i64>)
+}
+define <2 x i64> @ge() {
+ ret <2 x i64> sext (<2 x i32><i32 3, i32 4> to <2 x i64>)
+}
+define <2 x i32> @gf() {
+ ret <2 x i32> trunc (<2 x i64><i64 3, i64 4> to <2 x i32>)
+}
+define <2 x i32> @gh() {
+ ret <2 x i32> fptoui (<2 x float><float 8.0, float 7.0> to <2 x i32>)
+}
+define <2 x i32> @gi() {
+ ret <2 x i32> fptosi (<2 x float><float 8.0, float 7.0> to <2 x i32>)
+}
+define <2 x float> @gj() {
+ ret <2 x float> uitofp (<2 x i32><i32 8, i32 7> to <2 x float>)
+}
+define <2 x float> @gk() {
+ ret <2 x float> sitofp (<2 x i32><i32 8, i32 7> to <2 x float>)
+}
+define <2 x double> @gl() {
+ ret <2 x double> bitcast (<2 x double><double 4.0, double 3.0> to <2 x double>)
+}
+define <2 x double> @gm() {
+ ret <2 x double> bitcast (<2 x i64><i64 4, i64 3> to <2 x double>)
+}
diff --git a/test/Feature/weak_constant.ll b/test/Feature/weak_constant.ll
new file mode 100644
index 0000000..9025aaa
--- /dev/null
+++ b/test/Feature/weak_constant.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -std-compile-opts -S > %t
+; RUN: grep undef %t | count 1
+; RUN: grep 5 %t | count 1
+; RUN: grep 7 %t | count 1
+; RUN: grep 9 %t | count 1
+
+ type { i32, i32 } ; type %0
+@a = weak constant i32 undef ; <i32*> [#uses=1]
+@b = weak constant i32 5 ; <i32*> [#uses=1]
+@c = weak constant %0 { i32 7, i32 9 } ; <%0*> [#uses=1]
+
+define i32 @la() {
+ %v = load i32* @a ; <i32> [#uses=1]
+ ret i32 %v
+}
+
+define i32 @lb() {
+ %v = load i32* @b ; <i32> [#uses=1]
+ ret i32 %v
+}
+
+define i32 @lc() {
+ %g = getelementptr %0* @c, i32 0, i32 0 ; <i32*> [#uses=1]
+ %u = load i32* %g ; <i32> [#uses=1]
+ %h = getelementptr %0* @c, i32 0, i32 1 ; <i32*> [#uses=1]
+ %v = load i32* %h ; <i32> [#uses=1]
+ %r = add i32 %u, %v
+ ret i32 %r
+}
+
+define i32 @f() {
+ %u = call i32 @la() ; <i32> [#uses=1]
+ %v = call i32 @lb() ; <i32> [#uses=1]
+ %w = call i32 @lc() ; <i32> [#uses=1]
+ %r = add i32 %u, %v ; <i32> [#uses=1]
+ %s = add i32 %r, %w ; <i32> [#uses=1]
+ ret i32 %s
+}
diff --git a/test/Feature/weirdnames.ll b/test/Feature/weirdnames.ll
new file mode 100644
index 0000000..cc773cd
--- /dev/null
+++ b/test/Feature/weirdnames.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; Test using double quotes to form names that are not legal in the % form
+%"&^ " = type { i32 }
+@"%.*+ foo" = global %"&^ " { i32 5 }
+@"0" = global float 0.000000e+00 ; This CANNOT be %0
+@"\\03foo" = global float 0x3FB99999A0000000 ; Make sure funny char gets round trip
diff --git a/test/Feature/x86ld.ll b/test/Feature/x86ld.ll
new file mode 100644
index 0000000..32005ae
--- /dev/null
+++ b/test/Feature/x86ld.ll
@@ -0,0 +1,26 @@
+; RUN: llvm-as < %s | llvm-dis > %t
+; RUN: llvm-as < %t | llvm-dis > %t2
+; RUN: diff %t %t2
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+@ld = external global x86_fp80 ; <x86_fp80*> [#uses=1]
+@d = global double 4.050000e+00, align 8 ; <double*> [#uses=1]
+@f = global float 0x4010333340000000 ; <float*> [#uses=1]
+
+define i32 @foo() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = load float* @f ; <float> [#uses=1]
+ %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
+ %tmp2 = load double* @d ; <double> [#uses=1]
+ %tmp3 = fmul double %tmp1, %tmp2 ; <double> [#uses=1]
+ %tmp4 = fpext double %tmp3 to x86_fp80 ; <x86_fp80> [#uses=1]
+ store x86_fp80 %tmp4, x86_fp80* @ld
+ br label %return
+
+return: ; preds = %entry
+ %retval4 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval4
+}
diff --git a/test/FrontendAda/Support/element_copy.ads b/test/FrontendAda/Support/element_copy.ads
new file mode 100644
index 0000000..52c6e49
--- /dev/null
+++ b/test/FrontendAda/Support/element_copy.ads
@@ -0,0 +1,8 @@
+package Element_Copy is
+ type SmallInt is range 1 .. 4;
+ type SmallStr is array (SmallInt range <>) of Character;
+ type VariableSizedField (D : SmallInt := 2) is record
+ S : SmallStr (1 .. D) := "Hi";
+ end record;
+ function F return VariableSizedField;
+end;
diff --git a/test/FrontendAda/Support/fat_fields.ads b/test/FrontendAda/Support/fat_fields.ads
new file mode 100644
index 0000000..d3eab3e
--- /dev/null
+++ b/test/FrontendAda/Support/fat_fields.ads
@@ -0,0 +1,6 @@
+package Fat_Fields is
+ pragma Elaborate_Body;
+ type A is array (Positive range <>) of Boolean;
+ type A_Ptr is access A;
+ P : A_Ptr := null;
+end;
diff --git a/test/FrontendAda/Support/global_constant.ads b/test/FrontendAda/Support/global_constant.ads
new file mode 100644
index 0000000..cef4b11
--- /dev/null
+++ b/test/FrontendAda/Support/global_constant.ads
@@ -0,0 +1,4 @@
+package Global_Constant is
+ pragma Elaborate_Body;
+ An_Error : exception;
+end;
diff --git a/test/FrontendAda/Support/non_lvalue.ads b/test/FrontendAda/Support/non_lvalue.ads
new file mode 100644
index 0000000..7d4eeed
--- /dev/null
+++ b/test/FrontendAda/Support/non_lvalue.ads
@@ -0,0 +1,11 @@
+package Non_LValue is
+ type T (Length : Natural) is record
+ A : String (1 .. Length);
+ B : String (1 .. Length);
+ end record;
+ type T_Ptr is access all T;
+ type U is record
+ X : T_Ptr;
+ end record;
+ function A (Y : U) return String;
+end;
diff --git a/test/FrontendAda/Support/unc_constructor.ads b/test/FrontendAda/Support/unc_constructor.ads
new file mode 100644
index 0000000..d6f8db5
--- /dev/null
+++ b/test/FrontendAda/Support/unc_constructor.ads
@@ -0,0 +1,8 @@
+package Unc_Constructor is
+ type C is null record;
+ type A is array (Positive range <>) of C;
+ A0 : constant A;
+ procedure P (X : A);
+private
+ A0 : aliased constant A := (1 .. 0 => (null record));
+end;
diff --git a/test/FrontendAda/Support/var_offset.ads b/test/FrontendAda/Support/var_offset.ads
new file mode 100644
index 0000000..55d0eb2
--- /dev/null
+++ b/test/FrontendAda/Support/var_offset.ads
@@ -0,0 +1,9 @@
+package Var_Offset is
+ pragma Elaborate_Body;
+ type T (L : Natural) is record
+ Var_Len : String (1 .. L);
+ Space : Integer;
+ Small : Character;
+ Bad_Field : Character;
+ end record;
+end;
diff --git a/test/FrontendAda/Support/var_size.ads b/test/FrontendAda/Support/var_size.ads
new file mode 100644
index 0000000..6a570cb
--- /dev/null
+++ b/test/FrontendAda/Support/var_size.ads
@@ -0,0 +1,7 @@
+package Var_Size is
+ type T (Length : Natural) is record
+ A : String (1 .. Length);
+ B : String (1 .. Length);
+ end record;
+ function A (X : T) return String;
+end;
diff --git a/test/FrontendAda/array_constructor.adb b/test/FrontendAda/array_constructor.adb
new file mode 100644
index 0000000..de64b45
--- /dev/null
+++ b/test/FrontendAda/array_constructor.adb
@@ -0,0 +1,6 @@
+-- RUN: %llvmgcc -c %s
+procedure Array_Constructor is
+ A : array (Integer range <>) of Boolean := (True, False);
+begin
+ null;
+end;
diff --git a/test/FrontendAda/array_range_ref.adb b/test/FrontendAda/array_range_ref.adb
new file mode 100644
index 0000000..ae9bdc6
--- /dev/null
+++ b/test/FrontendAda/array_range_ref.adb
@@ -0,0 +1,7 @@
+-- RUN: %llvmgcc -c %s
+procedure Array_Range_Ref is
+ A : String (1 .. 3);
+ B : String := A (A'RANGE)(1 .. 3);
+begin
+ null;
+end;
diff --git a/test/FrontendAda/array_ref.adb b/test/FrontendAda/array_ref.adb
new file mode 100644
index 0000000..9577e21
--- /dev/null
+++ b/test/FrontendAda/array_ref.adb
@@ -0,0 +1,11 @@
+-- RUN: %llvmgcc -c %s
+procedure Array_Ref is
+ type A is array (Natural range <>, Natural range <>) of Boolean;
+ type A_Access is access A;
+ function Get (X : A_Access) return Boolean is
+ begin
+ return X (0, 0);
+ end;
+begin
+ null;
+end;
diff --git a/test/FrontendAda/array_size.adb b/test/FrontendAda/array_size.adb
new file mode 100644
index 0000000..2f07d06
--- /dev/null
+++ b/test/FrontendAda/array_size.adb
@@ -0,0 +1,10 @@
+-- RUN: %llvmgcc -c %s
+procedure Array_Size is
+ subtype S is String (1 .. 2);
+ type R is record
+ A : S;
+ end record;
+ X : R;
+begin
+ null;
+end;
diff --git a/test/FrontendAda/asm.adb b/test/FrontendAda/asm.adb
new file mode 100644
index 0000000..575617c
--- /dev/null
+++ b/test/FrontendAda/asm.adb
@@ -0,0 +1,6 @@
+-- RUN: %llvmgcc -c %s
+with System.Machine_Code;
+procedure Asm is
+begin
+ System.Machine_Code.Asm ("");
+end;
diff --git a/test/FrontendAda/constant_fold.ads b/test/FrontendAda/constant_fold.ads
new file mode 100644
index 0000000..6223e7cb
--- /dev/null
+++ b/test/FrontendAda/constant_fold.ads
@@ -0,0 +1,4 @@
+-- RUN: %llvmgcc -S -emit-llvm %s -o - | not grep ptrtoint
+package Constant_Fold is
+ Error : exception;
+end;
diff --git a/test/FrontendAda/debug_var_size.ads b/test/FrontendAda/debug_var_size.ads
new file mode 100644
index 0000000..ea966fb
--- /dev/null
+++ b/test/FrontendAda/debug_var_size.ads
@@ -0,0 +1,8 @@
+-- RUN: %llvmgcc -c -g %s
+package Debug_Var_Size is
+ subtype Length_Type is Positive range 1 .. 64;
+ type T (Length : Length_Type := 1) is record
+ Varying_Length : String (1 .. Length);
+ Fixed_Length : Boolean;
+ end record;
+end;
diff --git a/test/FrontendAda/dg.exp b/test/FrontendAda/dg.exp
new file mode 100644
index 0000000..2307c3f
--- /dev/null
+++ b/test/FrontendAda/dg.exp
@@ -0,0 +1,6 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports ada ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{adb,ads}]]
+}
+
diff --git a/test/FrontendAda/element_copy.adb b/test/FrontendAda/element_copy.adb
new file mode 100644
index 0000000..bffcb97
--- /dev/null
+++ b/test/FrontendAda/element_copy.adb
@@ -0,0 +1,8 @@
+-- RUN: %llvmgcc -S -O2 %s -I%p/Support -o - | grep 6899714
+package body Element_Copy is
+ function F return VariableSizedField is
+ X : VariableSizedField;
+ begin
+ return X;
+ end;
+end;
diff --git a/test/FrontendAda/emit_var.ads b/test/FrontendAda/emit_var.ads
new file mode 100644
index 0000000..35d4544
--- /dev/null
+++ b/test/FrontendAda/emit_var.ads
@@ -0,0 +1,5 @@
+-- RUN: %llvmgcc -c %s
+with Ada.Finalization;
+package Emit_Var is
+ type Search_Type is new Ada.Finalization.Controlled with null record;
+end;
diff --git a/test/FrontendAda/fat_fields.adb b/test/FrontendAda/fat_fields.adb
new file mode 100644
index 0000000..510105f
--- /dev/null
+++ b/test/FrontendAda/fat_fields.adb
@@ -0,0 +1,10 @@
+-- RUN: %llvmgcc -c %s -I%p/Support
+-- RUN: %llvmgcc -c %s -I%p/Support -O2
+package body Fat_Fields is
+ procedure Proc is
+ begin
+ if P = null then
+ null;
+ end if;
+ end;
+end;
diff --git a/test/FrontendAda/field_order.ads b/test/FrontendAda/field_order.ads
new file mode 100644
index 0000000..b49185d6
--- /dev/null
+++ b/test/FrontendAda/field_order.ads
@@ -0,0 +1,7 @@
+-- RUN: %llvmgcc -c %s
+package Field_Order is
+ type Tagged_Type is abstract tagged null record;
+ type With_Discriminant (L : Positive) is new Tagged_Type with record
+ S : String (1 .. L);
+ end record;
+end;
diff --git a/test/FrontendAda/global_constant.adb b/test/FrontendAda/global_constant.adb
new file mode 100644
index 0000000..ce9f406
--- /dev/null
+++ b/test/FrontendAda/global_constant.adb
@@ -0,0 +1,5 @@
+-- RUN: %llvmgcc -c %s -I%p/Support
+package body Global_Constant is
+begin
+ raise An_Error;
+end;
diff --git a/test/FrontendAda/init_size.ads b/test/FrontendAda/init_size.ads
new file mode 100644
index 0000000..1d76ba2
--- /dev/null
+++ b/test/FrontendAda/init_size.ads
@@ -0,0 +1,12 @@
+-- RUN: %llvmgcc -c %s
+package Init_Size is
+ type T (B : Boolean := False) is record
+ case B is
+ when False =>
+ I : Integer;
+ when True =>
+ J : Long_Long_Integer; -- Bigger than I
+ end case;
+ end record;
+ A_T : constant T := (False, 0);
+end;
diff --git a/test/FrontendAda/negative_field_offset.adb b/test/FrontendAda/negative_field_offset.adb
new file mode 100644
index 0000000..f8b8510
--- /dev/null
+++ b/test/FrontendAda/negative_field_offset.adb
@@ -0,0 +1,16 @@
+-- RUN: %llvmgcc -c %s
+with System;
+procedure Negative_Field_Offset (N : Integer) is
+ type String_Pointer is access String;
+ -- Force use of a thin pointer.
+ for String_Pointer'Size use System.Word_Size;
+ P : String_Pointer;
+
+ procedure Q (P : String_Pointer) is
+ begin
+ P (1) := 'Z';
+ end;
+begin
+ P := new String (1 .. N);
+ Q (P);
+end;
diff --git a/test/FrontendAda/non_bitfield.ads b/test/FrontendAda/non_bitfield.ads
new file mode 100644
index 0000000..8f5845a
--- /dev/null
+++ b/test/FrontendAda/non_bitfield.ads
@@ -0,0 +1,12 @@
+-- RUN: %llvmgcc -c %s
+package Non_Bitfield is
+ type SP is access String;
+ type E is (A, B, C);
+ type T (D : E) is record
+ case D is
+ when A => X : Boolean;
+ when B => Y : SP;
+ when C => Z : String (1 .. 2);
+ end case;
+ end record;
+end;
diff --git a/test/FrontendAda/non_lvalue.adb b/test/FrontendAda/non_lvalue.adb
new file mode 100644
index 0000000..157f3dd
--- /dev/null
+++ b/test/FrontendAda/non_lvalue.adb
@@ -0,0 +1,7 @@
+-- RUN: %llvmgcc -c %s -I%p/Support
+package body Non_LValue is
+ function A (Y : U) return String is
+ begin
+ return Y.X.B;
+ end;
+end;
diff --git a/test/FrontendAda/placeholder.adb b/test/FrontendAda/placeholder.adb
new file mode 100644
index 0000000..f33c9a5
--- /dev/null
+++ b/test/FrontendAda/placeholder.adb
@@ -0,0 +1,12 @@
+-- RUN: %llvmgcc -c %s
+procedure Placeholder is
+ subtype Bounded is Integer range 1 .. 5;
+ type Vector is array (Bounded range <>) of Integer;
+ type Interval (Length : Bounded := 1) is record
+ Points : Vector (1 .. Length);
+ end record;
+ An_Interval : Interval := (Length => 1, Points => (1 => 1));
+ generic The_Interval : Interval; package R is end;
+ package body R is end;
+ package S is new R (An_Interval);
+begin null; end;
diff --git a/test/FrontendAda/switch.adb b/test/FrontendAda/switch.adb
new file mode 100644
index 0000000..f214bca
--- /dev/null
+++ b/test/FrontendAda/switch.adb
@@ -0,0 +1,12 @@
+-- RUN: %llvmgcc -c %s
+function Switch (N : Integer) return Integer is
+begin
+ case N is
+ when Integer'First .. -1 =>
+ return -1;
+ when 0 =>
+ return 0;
+ when others =>
+ return 1;
+ end case;
+end;
diff --git a/test/FrontendAda/unc_constructor.adb b/test/FrontendAda/unc_constructor.adb
new file mode 100644
index 0000000..bc3002c
--- /dev/null
+++ b/test/FrontendAda/unc_constructor.adb
@@ -0,0 +1,9 @@
+-- RUN: %llvmgcc -c %s -I%p/Support
+package body Unc_Constructor is
+ procedure P (X : A) is
+ begin
+ if X = A0 then
+ null;
+ end if;
+ end;
+end;
diff --git a/test/FrontendAda/var_offset.adb b/test/FrontendAda/var_offset.adb
new file mode 100644
index 0000000..09f1c15
--- /dev/null
+++ b/test/FrontendAda/var_offset.adb
@@ -0,0 +1,7 @@
+-- RUN: %llvmgcc -c %s -I%p/Support
+package body Var_Offset is
+ function F (X : T) return Character is
+ begin
+ return X.Bad_Field;
+ end;
+end;
diff --git a/test/FrontendAda/var_size.adb b/test/FrontendAda/var_size.adb
new file mode 100644
index 0000000..b3db9a3
--- /dev/null
+++ b/test/FrontendAda/var_size.adb
@@ -0,0 +1,7 @@
+-- RUN: %llvmgcc -c %s -I%p/Support
+package body Var_Size is
+ function A (X : T) return String is
+ begin
+ return X.A;
+ end;
+end;
diff --git a/test/FrontendAda/vce.adb b/test/FrontendAda/vce.adb
new file mode 100644
index 0000000..f24045c
--- /dev/null
+++ b/test/FrontendAda/vce.adb
@@ -0,0 +1,7 @@
+-- RUN: %llvmgcc -c %s
+procedure VCE is
+ S : String (1 .. 2);
+ B : Character := 'B';
+begin
+ S := 'A' & B;
+end;
diff --git a/test/FrontendAda/vce_lv.adb b/test/FrontendAda/vce_lv.adb
new file mode 100644
index 0000000..4ca4d5c
--- /dev/null
+++ b/test/FrontendAda/vce_lv.adb
@@ -0,0 +1,9 @@
+-- RUN: %llvmgcc -c %s
+procedure VCE_LV is
+ type P is access String ;
+ type T is new P (5 .. 7);
+ subtype U is String (5 .. 7);
+ X : T := new U'(others => 'A');
+begin
+ null;
+end;
diff --git a/test/FrontendC++/2003-08-20-ExceptionFail.cpp b/test/FrontendC++/2003-08-20-ExceptionFail.cpp
new file mode 100644
index 0000000..f071c3c
--- /dev/null
+++ b/test/FrontendC++/2003-08-20-ExceptionFail.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+void foo();
+
+void bar() {
+ struct local {
+ ~local() { foo(); }
+ } local_obj;
+
+ foo();
+}
+
diff --git a/test/FrontendC++/2003-08-21-EmptyClass.cpp b/test/FrontendC++/2003-08-21-EmptyClass.cpp
new file mode 100644
index 0000000..5dbfa33
--- /dev/null
+++ b/test/FrontendC++/2003-08-21-EmptyClass.cpp
@@ -0,0 +1,9 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+// This tests compilation of EMPTY_CLASS_EXPR's
+
+struct empty {};
+
+void foo(empty) {}
+
+void bar() { foo(empty()); }
diff --git a/test/FrontendC++/2003-08-24-Cleanup.cpp b/test/FrontendC++/2003-08-24-Cleanup.cpp
new file mode 100644
index 0000000..ab0d1a0d
--- /dev/null
+++ b/test/FrontendC++/2003-08-24-Cleanup.cpp
@@ -0,0 +1,10 @@
+// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep unwind
+
+struct S { ~S(); };
+
+int mightthrow();
+
+int test() {
+ S s;
+ mightthrow();
+}
diff --git a/test/FrontendC++/2003-08-27-TypeNamespaces.cpp b/test/FrontendC++/2003-08-27-TypeNamespaces.cpp
new file mode 100644
index 0000000..dec9718
--- /dev/null
+++ b/test/FrontendC++/2003-08-27-TypeNamespaces.cpp
@@ -0,0 +1,16 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+namespace foo {
+ namespace bar {
+ struct X { X(); };
+
+ X::X() {}
+ }
+}
+
+
+namespace {
+ struct Y { Y(); };
+ Y::Y() {}
+}
diff --git a/test/FrontendC++/2003-08-28-ForwardType.cpp b/test/FrontendC++/2003-08-28-ForwardType.cpp
new file mode 100644
index 0000000..9330e94
--- /dev/null
+++ b/test/FrontendC++/2003-08-28-ForwardType.cpp
@@ -0,0 +1,23 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+// Default placement versions of operator new.
+#include <new>
+
+void* operator new(size_t, void* __p) throw();
+
+
+template<typename _CharT>
+struct stdio_filebuf
+{ stdio_filebuf();
+
+};
+
+extern stdio_filebuf<char> buf_cout;
+
+void foo() {
+ // Create stream buffers for the standard streams and use
+ // those buffers without destroying and recreating the
+ // streams.
+ new (&buf_cout) stdio_filebuf<char>();
+
+}
diff --git a/test/FrontendC++/2003-08-28-SaveExprBug.cpp b/test/FrontendC++/2003-08-28-SaveExprBug.cpp
new file mode 100644
index 0000000..98c5f5d
--- /dev/null
+++ b/test/FrontendC++/2003-08-28-SaveExprBug.cpp
@@ -0,0 +1,24 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+char* eback();
+
+template<typename foo>
+struct basic_filebuf {
+ char *instancevar;
+
+ void callee() {
+ instancevar += eback() != eback();
+ }
+
+ void caller();
+};
+
+
+template<typename _CharT>
+void basic_filebuf<_CharT>::caller() {
+ callee();
+}
+
+
+template class basic_filebuf<char>;
diff --git a/test/FrontendC++/2003-08-29-ArgPassingBug.cpp b/test/FrontendC++/2003-08-29-ArgPassingBug.cpp
new file mode 100644
index 0000000..d4cddff
--- /dev/null
+++ b/test/FrontendC++/2003-08-29-ArgPassingBug.cpp
@@ -0,0 +1,13 @@
+
+// RUN: %llvmgcc -xc++ -c -o /dev/null %s |& not grep WARNING
+
+struct iterator {
+ iterator();
+ iterator(const iterator &I);
+};
+
+iterator foo(const iterator &I) { return I; }
+
+void test() {
+ foo(iterator());
+}
diff --git a/test/FrontendC++/2003-08-31-StructLayout.cpp b/test/FrontendC++/2003-08-31-StructLayout.cpp
new file mode 100644
index 0000000..a45ad03
--- /dev/null
+++ b/test/FrontendC++/2003-08-31-StructLayout.cpp
@@ -0,0 +1,16 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+// There is a HOLE in the derived2 object due to not wanting to place the two
+// baseclass instances at the same offset!
+
+struct baseclass {};
+
+class derived1 : public baseclass {
+ void * NodePtr;
+};
+
+class derived2 : public baseclass {
+ derived1 current;
+};
+
+derived2 RI;
diff --git a/test/FrontendC++/2003-09-22-CompositeExprValue.cpp b/test/FrontendC++/2003-09-22-CompositeExprValue.cpp
new file mode 100644
index 0000000..3bd707e
--- /dev/null
+++ b/test/FrontendC++/2003-09-22-CompositeExprValue.cpp
@@ -0,0 +1,11 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+struct duration {
+ duration operator/=(int c) {
+ return *this;
+ }
+};
+
+void a000090() {
+ duration() /= 1;
+}
diff --git a/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp b/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp
new file mode 100644
index 0000000..72997c5
--- /dev/null
+++ b/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp
@@ -0,0 +1,17 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+// Non-POD classes cannot be passed into a function by component, because their
+// dtors must be run. Instead, pass them in by reference. The C++ front-end
+// was mistakenly "thinking" that 'foo' took a structure by component.
+
+struct C {
+ int A, B;
+ ~C() {}
+};
+
+void foo(C b);
+
+void test(C *P) {
+ foo(*P);
+}
+
diff --git a/test/FrontendC++/2003-09-30-CommaExprBug.cpp b/test/FrontendC++/2003-09-30-CommaExprBug.cpp
new file mode 100644
index 0000000..365795d
--- /dev/null
+++ b/test/FrontendC++/2003-09-30-CommaExprBug.cpp
@@ -0,0 +1,10 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+class Empty {};
+
+void foo(Empty E);
+
+void bar() {
+ foo(Empty());
+}
+
diff --git a/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp b/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp
new file mode 100644
index 0000000..63f62f2
--- /dev/null
+++ b/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp
@@ -0,0 +1,10 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+struct C {};
+
+C &foo();
+
+void foox() {
+ for (; ; foo());
+}
+
diff --git a/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp b/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp
new file mode 100644
index 0000000..a1eee71
--- /dev/null
+++ b/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+// Test with an opaque type
+
+struct C;
+
+C &foo();
+
+void foox() {
+ for (; ; foo());
+}
+
diff --git a/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp b/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp
new file mode 100644
index 0000000..94c1199
--- /dev/null
+++ b/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+// The C++ front-end thinks the two foo's are different, the LLVM emitter
+// thinks they are the same. The disconnect causes problems.
+
+void foo() { }
+
+void bar() {
+ void foo();
+
+ foo();
+}
diff --git a/test/FrontendC++/2003-10-17-BoolBitfields.cpp b/test/FrontendC++/2003-10-17-BoolBitfields.cpp
new file mode 100644
index 0000000..103945d
--- /dev/null
+++ b/test/FrontendC++/2003-10-17-BoolBitfields.cpp
@@ -0,0 +1,11 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+struct test {
+ bool A : 1;
+ bool B : 1;
+};
+
+void foo(test *T) {
+ T->B = true;
+}
+
diff --git a/test/FrontendC++/2003-10-21-InnerClass.cpp b/test/FrontendC++/2003-10-21-InnerClass.cpp
new file mode 100644
index 0000000..fadd51d
--- /dev/null
+++ b/test/FrontendC++/2003-10-21-InnerClass.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -xc++ -S -o - %s | grep {struct.X::Y}
+struct X {
+
+ struct Y {
+ Y();
+ };
+
+};
+
+X::Y::Y() {
+
+}
diff --git a/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp b/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp
new file mode 100644
index 0000000..abda017a
--- /dev/null
+++ b/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp
@@ -0,0 +1,17 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+template<class T>
+struct super {
+ int Y;
+ void foo();
+};
+
+template <class T>
+struct test : virtual super<int> {};
+
+extern test<int> X;
+
+void foo() {
+ X.foo();
+}
diff --git a/test/FrontendC++/2003-11-02-WeakLinkage.cpp b/test/FrontendC++/2003-11-02-WeakLinkage.cpp
new file mode 100644
index 0000000..748ca63
--- /dev/null
+++ b/test/FrontendC++/2003-11-02-WeakLinkage.cpp
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -xc++ -S -o - %s | not grep weak
+// The template should compile to linkonce linkage, not weak linkage.
+
+template<class T>
+void thefunc();
+
+template<class T>
+inline void thefunc() {}
+
+void test() {
+ thefunc<int>();
+}
+
diff --git a/test/FrontendC++/2003-11-04-ArrayConstructors.cpp b/test/FrontendC++/2003-11-04-ArrayConstructors.cpp
new file mode 100644
index 0000000..4ab3398
--- /dev/null
+++ b/test/FrontendC++/2003-11-04-ArrayConstructors.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+struct Foo {
+ Foo(int);
+ ~Foo();
+};
+void foo() {
+ struct {
+ Foo name;
+ } Int[] = { 1 };
+}
diff --git a/test/FrontendC++/2003-11-04-CatchLabelName.cpp b/test/FrontendC++/2003-11-04-CatchLabelName.cpp
new file mode 100644
index 0000000..7dbe788
--- /dev/null
+++ b/test/FrontendC++/2003-11-04-CatchLabelName.cpp
@@ -0,0 +1,11 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+#include <string>
+
+void bar();
+
+void test() {
+ try {
+ bar();
+ } catch (std::string) {}
+}
diff --git a/test/FrontendC++/2003-11-08-ArrayAddress.cpp b/test/FrontendC++/2003-11-08-ArrayAddress.cpp
new file mode 100644
index 0000000..9ad1b8f
--- /dev/null
+++ b/test/FrontendC++/2003-11-08-ArrayAddress.cpp
@@ -0,0 +1,10 @@
+// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep getelementptr
+
+struct foo {
+ int array[100];
+ void *getAddr(unsigned i);
+};
+
+void *foo::getAddr(unsigned i) {
+ return &array[i];
+}
diff --git a/test/FrontendC++/2003-11-18-EnumArray.cpp b/test/FrontendC++/2003-11-18-EnumArray.cpp
new file mode 100644
index 0000000..bb1b3bf
--- /dev/null
+++ b/test/FrontendC++/2003-11-18-EnumArray.cpp
@@ -0,0 +1,14 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+enum TchkType {
+ tchkNum, tchkString, tchkSCN, tchkNone
+};
+
+struct Operator {
+ enum TchkType tchk[8];
+};
+
+struct Operator opTab[] = {
+ {{tchkNum, tchkNum, tchkString} }
+};
+
diff --git a/test/FrontendC++/2003-11-18-PtrMemConstantInitializer.cpp b/test/FrontendC++/2003-11-18-PtrMemConstantInitializer.cpp
new file mode 100644
index 0000000..72609e7
--- /dev/null
+++ b/test/FrontendC++/2003-11-18-PtrMemConstantInitializer.cpp
@@ -0,0 +1,14 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+struct Gfx {
+ void opMoveSetShowText();
+};
+
+struct Operator {
+ void (Gfx::*func)();
+};
+
+Operator opTab[] = {
+ {&Gfx::opMoveSetShowText},
+};
+
diff --git a/test/FrontendC++/2003-11-25-ReturningOpaqueByValue.cpp b/test/FrontendC++/2003-11-25-ReturningOpaqueByValue.cpp
new file mode 100644
index 0000000..5ea0a2c
--- /dev/null
+++ b/test/FrontendC++/2003-11-25-ReturningOpaqueByValue.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+#include <vector>
+std::vector<int> my_method ();
+
+int
+main ()
+{
+ my_method ();
+ return 0;
+}
+
diff --git a/test/FrontendC++/2003-11-27-MultipleInheritanceThunk.cpp b/test/FrontendC++/2003-11-27-MultipleInheritanceThunk.cpp
new file mode 100644
index 0000000..99cfc8d
--- /dev/null
+++ b/test/FrontendC++/2003-11-27-MultipleInheritanceThunk.cpp
@@ -0,0 +1,28 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+struct CallSite {
+ int X;
+
+ CallSite(const CallSite &CS);
+};
+
+struct AliasAnalysis {
+ int TD;
+
+ virtual int getModRefInfo(CallSite CS);
+};
+
+
+struct Pass {
+ int X;
+ virtual int foo();
+};
+
+struct AliasAnalysisCounter : public Pass, public AliasAnalysis {
+ int getModRefInfo(CallSite CS) {
+ return 0;
+ }
+};
+
+AliasAnalysisCounter AAC;
diff --git a/test/FrontendC++/2003-11-29-DuplicatedCleanupTest.cpp b/test/FrontendC++/2003-11-29-DuplicatedCleanupTest.cpp
new file mode 100644
index 0000000..8df95cb
--- /dev/null
+++ b/test/FrontendC++/2003-11-29-DuplicatedCleanupTest.cpp
@@ -0,0 +1,41 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+void doesntThrow() throw();
+struct F {
+ ~F() { doesntThrow(); }
+};
+
+void atest() {
+ F A;
+lab:
+ F B;
+ goto lab;
+}
+
+void test(int val) {
+label: {
+ F A;
+ F B;
+ if (val == 0) goto label;
+ if (val == 1) goto label;
+}
+}
+
+void test3(int val) {
+label: {
+ F A;
+ F B;
+ if (val == 0) { doesntThrow(); goto label; }
+ if (val == 1) { doesntThrow(); goto label; }
+}
+}
+
+void test4(int val) {
+label: {
+ F A;
+ F B;
+ if (val == 0) { F C; goto label; }
+ if (val == 1) { F D; goto label; }
+}
+}
diff --git a/test/FrontendC++/2003-12-08-ArrayOfPtrToMemberFunc.cpp b/test/FrontendC++/2003-12-08-ArrayOfPtrToMemberFunc.cpp
new file mode 100644
index 0000000..b87e786
--- /dev/null
+++ b/test/FrontendC++/2003-12-08-ArrayOfPtrToMemberFunc.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+struct Evil {
+ void fun ();
+};
+int foo();
+typedef void (Evil::*memfunptr) ();
+static memfunptr jumpTable[] = { &Evil::fun };
+
+void Evil::fun() {
+ (this->*jumpTable[foo()]) ();
+}
diff --git a/test/FrontendC++/2004-01-11-DynamicInitializedConstant.cpp b/test/FrontendC++/2004-01-11-DynamicInitializedConstant.cpp
new file mode 100644
index 0000000..8ae15c9
--- /dev/null
+++ b/test/FrontendC++/2004-01-11-DynamicInitializedConstant.cpp
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -xc++ -S -o - %s | not grep { constant }
+
+extern int X;
+const int Y = X;
+const int* foo() { return &Y; }
+
diff --git a/test/FrontendC++/2004-03-08-ReinterpretCastCopy.cpp b/test/FrontendC++/2004-03-08-ReinterpretCastCopy.cpp
new file mode 100644
index 0000000..35880ab
--- /dev/null
+++ b/test/FrontendC++/2004-03-08-ReinterpretCastCopy.cpp
@@ -0,0 +1,21 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+struct A {
+ virtual void Method() = 0;
+};
+
+struct B : public A {
+ virtual void Method() { }
+};
+
+typedef void (A::*fn_type_a)(void);
+typedef void (B::*fn_type_b)(void);
+
+int main(int argc, char **argv)
+{
+ fn_type_a f = reinterpret_cast<fn_type_a>(&B::Method);
+ fn_type_b g = reinterpret_cast<fn_type_b>(f);
+ B b;
+ (b.*g)();
+ return 0;
+}
diff --git a/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp b/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp
new file mode 100644
index 0000000..b019e0c
--- /dev/null
+++ b/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -xc++ -c -o - %s | llvm-dis | grep _ZN11AccessFlags6strlenEv
+
+struct AccessFlags {
+ void strlen();
+};
+
+void AccessFlags::strlen() { }
+
diff --git a/test/FrontendC++/2004-03-15-CleanupsAndGotos.cpp b/test/FrontendC++/2004-03-15-CleanupsAndGotos.cpp
new file mode 100644
index 0000000..c2e52f6
--- /dev/null
+++ b/test/FrontendC++/2004-03-15-CleanupsAndGotos.cpp
@@ -0,0 +1,14 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+// Testcase from Bug 291
+
+struct X {
+ ~X();
+};
+
+void foo() {
+ X v;
+
+TryAgain:
+ goto TryAgain;
+}
diff --git a/test/FrontendC++/2004-06-08-LateTemplateInstantiation.cpp b/test/FrontendC++/2004-06-08-LateTemplateInstantiation.cpp
new file mode 100644
index 0000000..4ad4c7d
--- /dev/null
+++ b/test/FrontendC++/2004-06-08-LateTemplateInstantiation.cpp
@@ -0,0 +1,19 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+
+template<typename Ty>
+struct normal_iterator {
+ int FIELD;
+};
+
+void foo(normal_iterator<int>);
+normal_iterator<int> baz();
+
+void bar() {
+ foo(baz());
+}
+
+void *bar2() {
+ return (void*)foo;
+}
diff --git a/test/FrontendC++/2004-09-27-CompilerCrash.cpp b/test/FrontendC++/2004-09-27-CompilerCrash.cpp
new file mode 100644
index 0000000..f52baaf
--- /dev/null
+++ b/test/FrontendC++/2004-09-27-CompilerCrash.cpp
@@ -0,0 +1,13 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+struct Pass {} ;
+template<typename PassName>
+Pass *callDefaultCtor() { return new PassName(); }
+
+void foo(Pass *(*C)());
+
+#include <string>
+
+bool foo(std::string &X) {
+ return X.empty();
+}
diff --git a/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp b/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp
new file mode 100644
index 0000000..706d541
--- /dev/null
+++ b/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp
@@ -0,0 +1,23 @@
+// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep callDefaultCtor | \
+// RUN: not grep declare
+
+// This is a testcase for LLVM PR445, which was a problem where the
+// instantiation of callDefaultCtor was not being emitted correctly.
+
+struct Pass {};
+
+template<typename PassName>
+Pass *callDefaultCtor() { return new Pass(); }
+
+void foo(Pass *(*C)());
+
+struct basic_string {
+ bool empty() const { return true; }
+};
+
+
+bool foo2(basic_string &X) {
+ return X.empty();
+}
+void baz() { foo(callDefaultCtor<Pass>); }
+
diff --git a/test/FrontendC++/2004-11-27-EmitsUnusedInlineFunctions.cpp b/test/FrontendC++/2004-11-27-EmitsUnusedInlineFunctions.cpp
new file mode 100644
index 0000000..794b7d7
--- /dev/null
+++ b/test/FrontendC++/2004-11-27-EmitsUnusedInlineFunctions.cpp
@@ -0,0 +1,7 @@
+// The C++ front-end was emitting WAY too many inline functions. This test
+// verifies that it does not emit the body of getchar, because it is not used.
+// This corresponds to PR459
+
+// RUN: %llvmgxx %s -S -o - | not grep {^i32 .getchar}
+
+#include <stdio.h>
diff --git a/test/FrontendC++/2004-11-27-ExceptionCleanupAssertion.cpp b/test/FrontendC++/2004-11-27-ExceptionCleanupAssertion.cpp
new file mode 100644
index 0000000..f3d225e
--- /dev/null
+++ b/test/FrontendC++/2004-11-27-ExceptionCleanupAssertion.cpp
@@ -0,0 +1,14 @@
+// RUN: %llvmgxx %s -S -o /dev/null
+
+// This is PR421
+
+struct Strongbad {
+ Strongbad(const char *str );
+ ~Strongbad();
+ operator const char *() const;
+};
+
+void TheCheat () {
+ Strongbad foo(0);
+ Strongbad dirs[] = { Strongbad(0) + 1};
+}
diff --git a/test/FrontendC++/2004-11-27-FriendDefaultArgCrash.cpp b/test/FrontendC++/2004-11-27-FriendDefaultArgCrash.cpp
new file mode 100644
index 0000000..731e726
--- /dev/null
+++ b/test/FrontendC++/2004-11-27-FriendDefaultArgCrash.cpp
@@ -0,0 +1,9 @@
+// RUN: %llvmgxx %s -o /dev/null -S
+
+// PR447
+
+namespace nm {
+ struct str {
+ friend int foo(int arg = 0);
+ };
+}
diff --git a/test/FrontendC++/2004-11-27-InlineAsmFunctionRedefinition.cpp b/test/FrontendC++/2004-11-27-InlineAsmFunctionRedefinition.cpp
new file mode 100644
index 0000000..42b223b
--- /dev/null
+++ b/test/FrontendC++/2004-11-27-InlineAsmFunctionRedefinition.cpp
@@ -0,0 +1,26 @@
+// RUN: %llvmgxx %s -S -o /dev/null
+
+// PR397
+
+struct stat { };
+struct stat64 { };
+
+extern "C" {
+
+extern int lstat(const char *, struct stat *) __asm__("lstat64");
+extern int lstat64(const char *, struct stat64 *);
+
+extern int __lxstat(int, const char *, struct stat *) __asm__("__lxstat64");
+extern int __lxstat64(int, const char *, struct stat64 *);
+
+extern __inline__ int lstat(const char *path, struct stat *statbuf) {
+ return __lxstat(3, path, statbuf);
+}
+extern __inline__ int lstat64(const char *path, struct stat64 *statbuf) {
+ return __lxstat64(3, path, statbuf);
+}
+}
+
+int do_one_file(void) {
+ return lstat(0, 0) + lstat64(0,0);
+}
diff --git a/test/FrontendC++/2005-01-03-StaticInitializers.cpp b/test/FrontendC++/2005-01-03-StaticInitializers.cpp
new file mode 100644
index 0000000..da1b005
--- /dev/null
+++ b/test/FrontendC++/2005-01-03-StaticInitializers.cpp
@@ -0,0 +1,8 @@
+// RUN: %llvmgxx %s -S -o - | not grep llvm.global_ctor
+
+struct S {
+ int A[2];
+};
+
+int XX = (int)(long)&(((struct S*)0)->A[1]);
+
diff --git a/test/FrontendC++/2005-02-11-AnonymousUnion.cpp b/test/FrontendC++/2005-02-11-AnonymousUnion.cpp
new file mode 100644
index 0000000..87ababc
--- /dev/null
+++ b/test/FrontendC++/2005-02-11-AnonymousUnion.cpp
@@ -0,0 +1,32 @@
+// RUN: %llvmgxx %s -S -o -
+
+// Test anonymous union with members of the same size.
+int test1(float F) {
+ union {
+ float G;
+ int i;
+ };
+ G = F;
+ return i;
+}
+
+// test anonymous union with members of differing size.
+int test2(short F) {
+ volatile union {
+ short G;
+ int i;
+ };
+ G = F;
+ return i;
+}
+
+// Make sure that normal unions work. duh :)
+volatile union U_t {
+ short S;
+ int i;
+} U;
+
+int test3(short s) {
+ U.S = s;
+ return U.i;
+}
diff --git a/test/FrontendC++/2005-02-13-BadDynamicInit.cpp b/test/FrontendC++/2005-02-13-BadDynamicInit.cpp
new file mode 100644
index 0000000..84fa565
--- /dev/null
+++ b/test/FrontendC++/2005-02-13-BadDynamicInit.cpp
@@ -0,0 +1,9 @@
+// RUN: %llvmgxx %s -S -o - | not grep llvm.global_ctors
+// This testcase corresponds to PR509
+struct Data {
+ unsigned *data;
+ unsigned array[1];
+};
+
+Data shared_null = { shared_null.array };
+
diff --git a/test/FrontendC++/2005-02-14-BitFieldOffset.cpp b/test/FrontendC++/2005-02-14-BitFieldOffset.cpp
new file mode 100644
index 0000000..522e20a
--- /dev/null
+++ b/test/FrontendC++/2005-02-14-BitFieldOffset.cpp
@@ -0,0 +1,11 @@
+// RUN: %llvmgxx %s -S -o - | not grep {i32 6}
+
+struct QVectorTypedData {
+ int size;
+ unsigned int sharable : 1;
+ unsigned short array[1];
+};
+
+void foo(QVectorTypedData *X) {
+ X->array[0] = 123;
+}
diff --git a/test/FrontendC++/2005-02-19-BitfieldStructCrash.cpp b/test/FrontendC++/2005-02-19-BitfieldStructCrash.cpp
new file mode 100644
index 0000000..8f571e0
--- /dev/null
+++ b/test/FrontendC++/2005-02-19-BitfieldStructCrash.cpp
@@ -0,0 +1,14 @@
+// RUN: %llvmgxx -S %s -o -
+
+struct QChar {unsigned short X; QChar(unsigned short); } ;
+
+struct Command {
+ Command(QChar c) : c(c) {}
+ unsigned int type : 4;
+ QChar c;
+ };
+
+Command X(QChar('c'));
+
+void Foo(QChar );
+void bar() { Foo(X.c); }
diff --git a/test/FrontendC++/2005-02-19-UnnamedVirtualThunkArgument.cpp b/test/FrontendC++/2005-02-19-UnnamedVirtualThunkArgument.cpp
new file mode 100644
index 0000000..853fee7
--- /dev/null
+++ b/test/FrontendC++/2005-02-19-UnnamedVirtualThunkArgument.cpp
@@ -0,0 +1,22 @@
+// RUN: %llvmgxx -S %s -o /dev/null
+
+struct Foo {
+ Foo();
+ virtual ~Foo();
+};
+
+struct Bar {
+ Bar();
+ virtual ~Bar();
+ virtual bool test(bool) const;
+};
+
+struct Baz : public Foo, public Bar {
+ Baz();
+ virtual ~Baz();
+ virtual bool test(bool) const;
+};
+
+bool Baz::test(bool) const {
+ return true;
+}
diff --git a/test/FrontendC++/2005-02-20-BrokenReferenceTest.cpp b/test/FrontendC++/2005-02-20-BrokenReferenceTest.cpp
new file mode 100644
index 0000000..31026d3
--- /dev/null
+++ b/test/FrontendC++/2005-02-20-BrokenReferenceTest.cpp
@@ -0,0 +1,11 @@
+// RUN: %llvmgxx %s -S -o /dev/null
+
+void test(unsigned char *b, int rb) {
+ typedef unsigned char imgfoo[10][rb];
+ imgfoo &br = *(imgfoo *)b;
+
+ br[0][0] = 1;
+
+ rb = br[0][0];
+}
+
diff --git a/test/FrontendC++/2005-02-27-PlacementArrayNewCrash.cpp b/test/FrontendC++/2005-02-27-PlacementArrayNewCrash.cpp
new file mode 100644
index 0000000..a8fc668
--- /dev/null
+++ b/test/FrontendC++/2005-02-27-PlacementArrayNewCrash.cpp
@@ -0,0 +1,8 @@
+// RUN: %llvmgxx -S %s -o -
+
+#include <new>
+typedef double Ty[4];
+
+void foo(Ty *XX) {
+ new(XX) Ty();
+}
diff --git a/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp b/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp
new file mode 100644
index 0000000..7711cff
--- /dev/null
+++ b/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp
@@ -0,0 +1,14 @@
+// RUN: %llvmgxx -xc++ %s -c -o - | opt -die | llvm-dis | not grep cast
+
+void foo(int*);
+
+struct FOO {
+ int X;
+};
+
+struct BAR : virtual FOO { BAR(); };
+
+int testfn() {
+ BAR B;
+ foo(&B.X);
+}
diff --git a/test/FrontendC++/2006-03-01-GimplifyCrash.cpp b/test/FrontendC++/2006-03-01-GimplifyCrash.cpp
new file mode 100644
index 0000000..b0d00fe
--- /dev/null
+++ b/test/FrontendC++/2006-03-01-GimplifyCrash.cpp
@@ -0,0 +1,14 @@
+// RUN: %llvmgxx -S %s -o -
+
+struct PrefMapElem {
+ virtual ~PrefMapElem();
+ unsigned int fPrefId;
+};
+
+int foo() {
+ PrefMapElem* fMap;
+ if (fMap[0].fPrefId == 1)
+ return 1;
+
+ return 0;
+}
diff --git a/test/FrontendC++/2006-03-06-C++RecurseCrash.cpp b/test/FrontendC++/2006-03-06-C++RecurseCrash.cpp
new file mode 100644
index 0000000..2fb3fb7
--- /dev/null
+++ b/test/FrontendC++/2006-03-06-C++RecurseCrash.cpp
@@ -0,0 +1,24 @@
+// RUN: %llvmgcc %s -S -o -
+namespace std {
+ class exception { };
+
+ class type_info {
+ public:
+ virtual ~type_info();
+ };
+
+}
+
+namespace __cxxabiv1 {
+ class __si_class_type_info : public std::type_info {
+ ~__si_class_type_info();
+ };
+}
+
+class recursive_init: public std::exception {
+public:
+ virtual ~recursive_init() throw ();
+};
+
+recursive_init::~recursive_init() throw() { }
+
diff --git a/test/FrontendC++/2006-09-08-powi.cpp b/test/FrontendC++/2006-09-08-powi.cpp
new file mode 100644
index 0000000..75cbfda
--- /dev/null
+++ b/test/FrontendC++/2006-09-08-powi.cpp
@@ -0,0 +1,7 @@
+// RUN: %llvmgxx -O3 -S -o - %s
+
+#include <cmath>
+
+double foo(double X, int Y) {
+ return std::pow(X, Y);
+}
diff --git a/test/FrontendC++/2006-09-12-OpaqueStructCrash.cpp b/test/FrontendC++/2006-09-12-OpaqueStructCrash.cpp
new file mode 100644
index 0000000..f3160e8
--- /dev/null
+++ b/test/FrontendC++/2006-09-12-OpaqueStructCrash.cpp
@@ -0,0 +1,28 @@
+// RUN: %llvmgxx -O3 -S -o - %s
+
+struct A {
+ virtual ~A();
+};
+
+template <typename Ty>
+struct B : public A {
+ ~B () { delete [] val; }
+private:
+ Ty* val;
+};
+
+template <typename Ty>
+struct C : public A {
+ C ();
+ ~C ();
+};
+
+template <typename Ty>
+struct D : public A {
+ D () {}
+ private:
+ B<C<Ty> > blocks;
+};
+
+template class D<double>;
+
diff --git a/test/FrontendC++/2006-09-27-Debug-Protection.cpp b/test/FrontendC++/2006-09-27-Debug-Protection.cpp
new file mode 100644
index 0000000..cb09bd0
--- /dev/null
+++ b/test/FrontendC++/2006-09-27-Debug-Protection.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 1,}
+// RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 2,}
+class A {
+public:
+ int x;
+protected:
+ int y;
+private:
+ int z;
+};
+
+A a;
diff --git a/test/FrontendC++/2006-10-30-ClassBitfield.cpp b/test/FrontendC++/2006-10-30-ClassBitfield.cpp
new file mode 100644
index 0000000..bd3b173
--- /dev/null
+++ b/test/FrontendC++/2006-10-30-ClassBitfield.cpp
@@ -0,0 +1,16 @@
+// RUN: %llvmgxx %s -emit-llvm -S -o -
+// PR954
+
+struct _Refcount_Base {
+ unsigned long _M_ref_count;
+ int _M_ref_count_lock;
+ _Refcount_Base() : _M_ref_count(0) {}
+};
+
+struct _Rope_RopeRep : public _Refcount_Base
+{
+public:
+ int _M_tag:8;
+};
+
+int foo(_Rope_RopeRep* r) { return r->_M_tag; }
diff --git a/test/FrontendC++/2006-11-06-StackTrace.cpp b/test/FrontendC++/2006-11-06-StackTrace.cpp
new file mode 100644
index 0000000..b79c0bf
--- /dev/null
+++ b/test/FrontendC++/2006-11-06-StackTrace.cpp
@@ -0,0 +1,38 @@
+// This is a regression test on debug info to make sure that we can get a
+// meaningful stack trace from a C++ program.
+// RUN: %llvmgcc -S -O0 -g %s -o - | \
+// RUN: llc --disable-fp-elim -o %t.s -O0 -relocation-model=pic
+// RUN: %compile_c %t.s -o %t.o
+// RUN: %link %t.o -o %t.exe
+// RUN: echo {break DeepStack::deepest\nrun 17\nwhere\n} > %t.in
+// RN: gdb -q -batch -n -x %t.in %t.exe | tee %t.out | \
+// RN: grep {#0 DeepStack::deepest.*(this=.*,.*x=33)}
+// RN: gdb -q -batch -n -x %t.in %t.exe | \
+// RN: grep {#7 0x.* in main.*(argc=\[12\],.*argv=.*)}
+
+// Only works on ppc (but not apple-darwin9), x86 and x86_64. Should
+// generalize?
+// XAIL: alpha,arm,powerpc-apple-darwin9
+
+#include <stdlib.h>
+
+class DeepStack {
+ int seedVal;
+public:
+ DeepStack(int seed) : seedVal(seed) {}
+
+ int shallowest( int x ) { return shallower(x + 1); }
+ int shallower ( int x ) { return shallow(x + 2); }
+ int shallow ( int x ) { return deep(x + 3); }
+ int deep ( int x ) { return deeper(x + 4); }
+ int deeper ( int x ) { return deepest(x + 6); }
+ int deepest ( int x ) { return x + 7; }
+
+ int runit() { return shallowest(seedVal); }
+};
+
+int main ( int argc, char** argv) {
+
+ DeepStack DS9( (argc > 1 ? atoi(argv[1]) : 0) );
+ return DS9.runit();
+}
diff --git a/test/FrontendC++/2006-11-20-GlobalSymbols.cpp b/test/FrontendC++/2006-11-20-GlobalSymbols.cpp
new file mode 100644
index 0000000..fc896b3
--- /dev/null
+++ b/test/FrontendC++/2006-11-20-GlobalSymbols.cpp
@@ -0,0 +1,10 @@
+// PR1013
+// Check to make sure debug symbols use the correct name for globals and
+// functions. Will not assemble if it fails to.
+// RUN: %llvmgcc -O0 -g -c %s
+
+int foo __asm__("f\001oo");
+
+int bar() {
+ return foo;
+}
diff --git a/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp b/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp
new file mode 100644
index 0000000..365c8e8
--- /dev/null
+++ b/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp
@@ -0,0 +1,27 @@
+// RUN: %llvmgxx %s -emit-llvm -S -o -
+// PR1027
+
+struct sys_var {
+ unsigned name_length;
+
+ bool no_support_one_shot;
+ sys_var() {}
+};
+
+
+struct sys_var_thd : public sys_var {
+};
+
+extern sys_var_thd sys_auto_is_null;
+
+sys_var *getsys_variables() {
+ return &sys_auto_is_null;
+}
+
+sys_var *sys_variables = &sys_auto_is_null;
+
+
+
+
+
+
diff --git a/test/FrontendC++/2006-11-30-NoCompileUnit.cpp b/test/FrontendC++/2006-11-30-NoCompileUnit.cpp
new file mode 100644
index 0000000..242a37e
--- /dev/null
+++ b/test/FrontendC++/2006-11-30-NoCompileUnit.cpp
@@ -0,0 +1,60 @@
+// This is a regression test on debug info to make sure we don't hit a compile
+// unit size issue with gdb.
+// RUN: %llvmgcc -S -O0 -g %s -o - | \
+// RUN: llc --disable-fp-elim -o NoCompileUnit.s
+// RUN: %compile_c NoCompileUnit.s -o NoCompileUnit.o
+// RUN: %link NoCompileUnit.o -o NoCompileUnit.exe
+// RUN: echo {break main\nrun\np NoCompileUnit::pubname} > %t2
+// RUN: gdb -q -batch -n -x %t2 NoCompileUnit.exe | \
+// RUN: tee NoCompileUnit.out | not grep {"low == high"}
+// XFAIL: alpha,arm
+// XFAIL: *
+// See PR2454
+
+
+class MamaDebugTest {
+private:
+ int N;
+
+protected:
+ MamaDebugTest(int n) : N(n) {}
+
+ int getN() const { return N; }
+
+};
+
+class BabyDebugTest : public MamaDebugTest {
+private:
+
+public:
+ BabyDebugTest(int n) : MamaDebugTest(n) {}
+
+ static int doh;
+
+ int doit() {
+ int N = getN();
+ int Table[N];
+
+ int sum = 0;
+
+ for (int i = 0; i < N; ++i) {
+ int j = i;
+ Table[i] = j;
+ }
+ for (int i = 0; i < N; ++i) {
+ int j = Table[i];
+ sum += j;
+ }
+
+ return sum;
+ }
+
+};
+
+int BabyDebugTest::doh;
+
+
+int main(int argc, const char *argv[]) {
+ BabyDebugTest BDT(20);
+ return BDT.doit();
+}
diff --git a/test/FrontendC++/2006-11-30-Pubnames.cpp b/test/FrontendC++/2006-11-30-Pubnames.cpp
new file mode 100644
index 0000000..239d3f5
--- /dev/null
+++ b/test/FrontendC++/2006-11-30-Pubnames.cpp
@@ -0,0 +1,22 @@
+// This is a regression test on debug info to make sure that we can access
+// qualified global names.
+// RUN: %llvmgcc -S -O0 -g %s -o - | \
+// RUN: llc --disable-fp-elim -o %t.s -O0
+// RUN: %compile_c %t.s -o %t.o
+// RUN: %link %t.o -o %t.exe
+// RUN: %llvmdsymutil %t.exe
+// RUN: echo {break main\nrun\np Pubnames::pubname} > %t.in
+// RUN: gdb -q -batch -n -x %t.in %t.exe | tee %t.out | grep {\$1 = 10}
+//
+// XFAIL: alpha,arm
+
+struct Pubnames {
+ static int pubname;
+};
+
+int Pubnames::pubname = 10;
+
+int main (int argc, char** argv) {
+ Pubnames p;
+ return 0;
+}
diff --git a/test/FrontendC++/2007-01-02-UnboundedArray.cpp b/test/FrontendC++/2007-01-02-UnboundedArray.cpp
new file mode 100644
index 0000000..648d19b
--- /dev/null
+++ b/test/FrontendC++/2007-01-02-UnboundedArray.cpp
@@ -0,0 +1,14 @@
+// Make sure unbounded arrays compile with debug information.
+//
+// RUN: %llvmgcc -O0 -c -g %s
+
+// PR1068
+
+struct Object {
+ char buffer[];
+};
+
+int main(int argc, char** argv) {
+ new Object;
+ return 0;
+}
diff --git a/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp b/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp
new file mode 100644
index 0000000..654e11b
--- /dev/null
+++ b/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp
@@ -0,0 +1,49 @@
+// RUN: %llvmgxx %s -emit-llvm -S -o - | not grep gnu.linkonce.
+// PR1085
+
+class
+__attribute__((visibility("default"))) QGenericArgument
+{
+ public:inline QGenericArgument(const char *aName = 0, const void *aData = 0):_data(aData), _name(aName) {
+ }
+ private:const void *_data;
+ const char *_name;
+};
+struct __attribute__ ((
+ visibility("default"))) QMetaObject
+{
+ struct {
+ }
+ d;
+};
+class
+__attribute__((visibility("default"))) QObject
+{
+ virtual const QMetaObject *metaObject() const;
+};
+class
+__attribute__((visibility("default"))) QPaintDevice
+{
+ public:enum PaintDeviceMetric {
+ PdmWidth = 1, PdmHeight, PdmWidthMM, PdmHeightMM, PdmNumColors, PdmDepth, PdmDpiX, PdmDpiY, PdmPhysicalDpiX, PdmPhysicalDpiY
+ };
+ virtual ~ QPaintDevice();
+ union {
+ }
+ ct;
+};
+class
+__attribute__((visibility("default"))) QWidget:public QObject, public QPaintDevice
+{
+};
+class
+__attribute__((visibility("default"))) QDialog:public QWidget
+{
+};
+class TopicChooser:public QDialog {
+ virtual const QMetaObject *metaObject() const;
+};
+const QMetaObject *TopicChooser::
+metaObject() const
+{
+}
diff --git a/test/FrontendC++/2007-01-06-PtrMethodInit.cpp b/test/FrontendC++/2007-01-06-PtrMethodInit.cpp
new file mode 100644
index 0000000..f87c8d8
--- /dev/null
+++ b/test/FrontendC++/2007-01-06-PtrMethodInit.cpp
@@ -0,0 +1,75 @@
+// RUN: %llvmgxx %s -emit-llvm -S -o -
+// PR1084
+
+extern "C"
+{
+ typedef unsigned char PRUint8;
+ typedef unsigned int PRUint32;
+}
+typedef PRUint32 nsresult;
+struct nsID
+{
+};
+typedef nsID nsIID;
+class nsISupports
+{
+};
+extern "C++"
+{
+ template < class T > struct nsCOMTypeInfo
+ {
+ static const nsIID & GetIID ()
+ {
+ }
+ };
+}
+
+class nsIDOMEvent:public nsISupports
+{
+};
+class nsIDOMEventListener:public nsISupports
+{
+public:static const nsIID & GetIID ()
+ {
+ }
+ virtual nsresult
+ __attribute__ ((regparm (0), cdecl)) HandleEvent (nsIDOMEvent * event) =
+ 0;
+};
+class nsIDOMMouseListener:public nsIDOMEventListener
+{
+public:static const nsIID & GetIID ()
+ {
+ static const nsIID iid = {
+ };
+ }
+ virtual nsresult
+ __attribute__ ((regparm (0),
+ cdecl)) MouseDown (nsIDOMEvent * aMouseEvent) = 0;
+};
+typedef
+typeof (&nsIDOMEventListener::HandleEvent)
+ GenericHandler;
+ struct EventDispatchData
+ {
+ PRUint32 message;
+ GenericHandler method;
+ PRUint8 bits;
+ };
+ struct EventTypeData
+ {
+ const EventDispatchData *events;
+ int numEvents;
+ const nsIID *iid;
+ };
+ static const EventDispatchData sMouseEvents[] = {
+ {
+ (300 + 2),
+ reinterpret_cast < GenericHandler > (&nsIDOMMouseListener::MouseDown),
+ 0x01}
+ };
+static const EventTypeData sEventTypes[] = {
+ {
+ sMouseEvents, (sizeof (sMouseEvents) / sizeof (sMouseEvents[0])),
+ &nsCOMTypeInfo < nsIDOMMouseListener >::GetIID ()}
+};
diff --git a/test/FrontendC++/2007-03-27-FunctionVarRename.cpp b/test/FrontendC++/2007-03-27-FunctionVarRename.cpp
new file mode 100644
index 0000000..538d6df
--- /dev/null
+++ b/test/FrontendC++/2007-03-27-FunctionVarRename.cpp
@@ -0,0 +1,17 @@
+// RUN: %llvmgxx %s -emit-llvm -S -o - | not grep eprintf1
+// RUN: %llvmgxx %s -emit-llvm -S -o - | grep eprintf
+
+// Only one eprintf should exist in the output
+
+extern "C"
+void __eprintf();
+
+void foo() {
+
+ __eprintf();
+}
+
+void *bar() {
+ extern void *__eprintf;
+ return &__eprintf;
+}
diff --git a/test/FrontendC++/2007-04-05-PackedBitFields-1.cpp b/test/FrontendC++/2007-04-05-PackedBitFields-1.cpp
new file mode 100644
index 0000000..174dddf
--- /dev/null
+++ b/test/FrontendC++/2007-04-05-PackedBitFields-1.cpp
@@ -0,0 +1,23 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+#ifdef PACKED
+#define P __attribute__((packed))
+#else
+#define P
+#endif
+
+struct P M_Packed {
+ unsigned int l_Packed;
+ unsigned short k_Packed : 6,
+ i_Packed : 15,
+ j_Packed : 11;
+
+};
+
+struct M_Packed sM_Packed;
+
+int testM_Packed (void) {
+ struct M_Packed x;
+ return (x.i_Packed != 0);
+}
+
diff --git a/test/FrontendC++/2007-04-05-PackedBitFieldsOverlap-2.cpp b/test/FrontendC++/2007-04-05-PackedBitFieldsOverlap-2.cpp
new file mode 100644
index 0000000..55da1a6
--- /dev/null
+++ b/test/FrontendC++/2007-04-05-PackedBitFieldsOverlap-2.cpp
@@ -0,0 +1,24 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+#ifdef PACKED
+#define P __attribute__((packed))
+#else
+#define P
+#endif
+
+struct P M_Packed {
+ unsigned long sorted : 1;
+ unsigned long from_array : 1;
+ unsigned long mixed_encoding : 1;
+ unsigned long encoding : 8;
+ unsigned long count : 21;
+
+};
+
+struct M_Packed sM_Packed;
+
+int testM_Packed (void) {
+ struct M_Packed x;
+ return (x.count != 0);
+}
+
diff --git a/test/FrontendC++/2007-04-05-PackedBitFieldsOverlap.cpp b/test/FrontendC++/2007-04-05-PackedBitFieldsOverlap.cpp
new file mode 100644
index 0000000..46a8949
--- /dev/null
+++ b/test/FrontendC++/2007-04-05-PackedBitFieldsOverlap.cpp
@@ -0,0 +1,24 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+#ifdef PACKED
+#define P __attribute__((packed))
+#else
+#define P
+#endif
+
+struct P M_Packed {
+ unsigned int l_Packed;
+ unsigned short k_Packed : 6,
+ i_Packed : 15;
+ char c;
+
+};
+
+struct M_Packed sM_Packed;
+
+int testM_Packed (void) {
+ struct M_Packed x;
+ return (x.i_Packed != 0);
+}
+
diff --git a/test/FrontendC++/2007-04-05-PackedBitFieldsSmall.cpp b/test/FrontendC++/2007-04-05-PackedBitFieldsSmall.cpp
new file mode 100644
index 0000000..7377b82
--- /dev/null
+++ b/test/FrontendC++/2007-04-05-PackedBitFieldsSmall.cpp
@@ -0,0 +1,27 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+
+#ifdef PACKED
+// This is an example where size of Packed struct is smaller then
+// the size of bit field type.
+#define P __attribute__((packed))
+#else
+#define P
+#endif
+
+struct P M_Packed {
+ unsigned long long X:50;
+ unsigned Y:2;
+};
+
+struct M_Packed sM_Packed;
+
+int testM_Packed (void) {
+ struct M_Packed x;
+ return (0 != x.Y);
+}
+
+int testM_Packed2 (void) {
+ struct M_Packed x;
+ return (0 != x.X);
+}
diff --git a/test/FrontendC++/2007-04-05-StructPackedFieldUnpacked.cpp b/test/FrontendC++/2007-04-05-StructPackedFieldUnpacked.cpp
new file mode 100644
index 0000000..b550b5f
--- /dev/null
+++ b/test/FrontendC++/2007-04-05-StructPackedFieldUnpacked.cpp
@@ -0,0 +1,25 @@
+// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null
+
+#ifdef PACKED
+#define P __attribute__((packed))
+#else
+#define P
+#endif
+
+struct UnPacked {
+ int X;
+ int Y;
+};
+
+struct P M_Packed {
+ unsigned char A;
+ struct UnPacked B;
+};
+
+struct M_Packed sM_Packed;
+
+int testM_Packed (void) {
+ struct M_Packed x;
+ return (x.B.Y != 0);
+}
+
diff --git a/test/FrontendC++/2007-04-10-PackedUnion.cpp b/test/FrontendC++/2007-04-10-PackedUnion.cpp
new file mode 100644
index 0000000..b4b8894
--- /dev/null
+++ b/test/FrontendC++/2007-04-10-PackedUnion.cpp
@@ -0,0 +1,41 @@
+// RUN: %llvmgxx -S %s -o /dev/null
+extern "C" {
+
+#pragma pack(push, 2)
+ typedef struct ABC* abc;
+
+ struct ABCS {
+ float red;
+ float green;
+ float blue;
+ float alpha;
+ };
+
+ typedef void (*XYZ)();
+#pragma pack(pop)
+}
+
+
+union ABCU {
+ ABCS color;
+ XYZ bg;
+};
+
+struct AData {
+ ABCU data;
+};
+
+class L {
+ public:
+ L() {}
+ L(const L& other);
+
+ private:
+ AData fdata;
+};
+
+
+L::L(const L& other)
+{
+ fdata = other.fdata;
+}
diff --git a/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp b/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp
new file mode 100644
index 0000000..eabcd57
--- /dev/null
+++ b/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp
@@ -0,0 +1,44 @@
+// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xglobWeak | grep linkonce | count 1
+// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xextWeak | grep linkonce | count 1
+// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xWeaknoinline | grep weak | count 1
+// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xWeakextnoinline | grep weak | count 1
+// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xglobnoWeak | grep linkonce | count 1
+// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xstatnoWeak | grep internal | count 1
+// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xextnoWeak | grep linkonce | count 1
+inline int xglobWeak(int) __attribute__((weak));
+inline int xglobWeak (int i) {
+ return i*2;
+}
+inline int xextWeak(int) __attribute__((weak));
+extern inline int xextWeak (int i) {
+ return i*4;
+}
+int xWeaknoinline(int) __attribute__((weak));
+int xWeaknoinline(int i) {
+ return i*8;
+}
+int xWeakextnoinline(int) __attribute__((weak));
+extern int xWeakextnoinline(int i) {
+ return i*16;
+}
+inline int xglobnoWeak (int i) {
+ return i*32;
+}
+static inline int xstatnoWeak (int i) {
+ return i*64;
+}
+extern inline int xextnoWeak (int i) {
+ return i*128;
+}
+int j(int y) {
+ return xglobnoWeak(y)+xstatnoWeak(y)+xextnoWeak(y)+
+ xglobWeak(y)+xextWeak(y)+
+ xWeakextnoinline(y)+xWeaknoinline(y);
+}
diff --git a/test/FrontendC++/2007-04-14-FNoBuiltin.cpp b/test/FrontendC++/2007-04-14-FNoBuiltin.cpp
new file mode 100644
index 0000000..31e4528
--- /dev/null
+++ b/test/FrontendC++/2007-04-14-FNoBuiltin.cpp
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -O2 -fno-builtin -o - | grep call.*printf
+// Check that -fno-builtin is honored.
+
+extern "C" int printf(const char*, ...);
+void foo(const char *msg) {
+ printf("%s\n",msg);
+}
diff --git a/test/FrontendC++/2007-04-31-TryCatch.cpp b/test/FrontendC++/2007-04-31-TryCatch.cpp
new file mode 100644
index 0000000..8b8254d
--- /dev/null
+++ b/test/FrontendC++/2007-04-31-TryCatch.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -S %s -o /dev/null
+
+#include <locale>
+
+namespace std
+{
+ codecvt<char, char, mbstate_t>::
+ codecvt(size_t __refs)
+ : __codecvt_abstract_base<char, char, mbstate_t>(__refs),
+ _M_c_locale_codecvt(_S_get_c_locale())
+ { }
+}
diff --git a/test/FrontendC++/2007-05-03-VectorInit.cpp b/test/FrontendC++/2007-05-03-VectorInit.cpp
new file mode 100644
index 0000000..b87f4d4
--- /dev/null
+++ b/test/FrontendC++/2007-05-03-VectorInit.cpp
@@ -0,0 +1,17 @@
+// RUN: %llvmgxx %s -S -emit-llvm -O0 -o -
+// PR1378
+
+typedef float v4sf __attribute__((vector_size(16)));
+
+typedef v4sf float4;
+
+static float4 splat4(float a)
+{
+ float4 tmp = {a,a,a,a};
+ return tmp;
+}
+
+float4 foo(float a)
+{
+ return splat4(a);
+}
diff --git a/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp b/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp
new file mode 100644
index 0000000..8392c0b
--- /dev/null
+++ b/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp
@@ -0,0 +1,24 @@
+// RUN: %llvmgxx %s -emit-llvm -S -o -
+
+#pragma reverse_bitfields on
+typedef unsigned long UINT32;
+
+extern void abort(void);
+
+typedef struct TestStruct
+{
+ long first: 15,
+ second: 17;
+} TestStruct;
+
+int main (int argc, char * const argv[]) {
+
+ TestStruct testStruct = {1, 0};
+
+ UINT32 dw = *(UINT32 *)(&testStruct);
+
+ if(!(dw & 0xFFFF))
+ abort ();
+
+ return 0;
+}
diff --git a/test/FrontendC++/2007-05-23-TryFinally.cpp b/test/FrontendC++/2007-05-23-TryFinally.cpp
new file mode 100644
index 0000000..38f0b02
--- /dev/null
+++ b/test/FrontendC++/2007-05-23-TryFinally.cpp
@@ -0,0 +1,16 @@
+// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | ignore grep _Unwind_Resume | \
+// RUN: wc -l | grep {\[23\]}
+
+struct One { };
+struct Two { };
+
+void handle_unexpected () {
+ try
+ {
+ throw;
+ }
+ catch (One &)
+ {
+ throw Two ();
+ }
+}
diff --git a/test/FrontendC++/2007-07-04-NestedCatches.cpp b/test/FrontendC++/2007-07-04-NestedCatches.cpp
new file mode 100644
index 0000000..b10a5db
--- /dev/null
+++ b/test/FrontendC++/2007-07-04-NestedCatches.cpp
@@ -0,0 +1,32 @@
+// RUN: %llvmgxx %s -S -O2 -o - | \
+// RUN: ignore grep {eh\.selector.*One.*Two.*Three.*Four.*Five.*Six.*null} | \
+// RUN: wc -l | grep {\[01\]}
+
+extern void X(void);
+
+struct One {};
+struct Two {};
+struct Three {};
+struct Four {};
+struct Five {};
+struct Six {};
+
+static void A(void) throw ()
+{
+ X();
+}
+
+static void B(void) throw (Two)
+{
+ try { A(); } catch (One) {}
+}
+
+static void C(void) throw (Six, Five)
+{
+ try { B(); } catch (Three) {} catch (Four) {}
+}
+
+int main ()
+{
+ try { C(); } catch (...) {}
+}
diff --git a/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp b/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp
new file mode 100644
index 0000000..d54dfbe
--- /dev/null
+++ b/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp
@@ -0,0 +1,6 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias
+
+void foo(int * __restrict myptr1, int * myptr2) {
+ myptr1[0] = 0;
+ myptr2[0] = 0;
+}
diff --git a/test/FrontendC++/2007-07-29-RestrictRefArg.cpp b/test/FrontendC++/2007-07-29-RestrictRefArg.cpp
new file mode 100644
index 0000000..0c28e4d
--- /dev/null
+++ b/test/FrontendC++/2007-07-29-RestrictRefArg.cpp
@@ -0,0 +1,6 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias
+
+void foo(int & __restrict myptr1, int & myptr2) {
+ myptr1 = 0;
+ myptr2 = 0;
+}
diff --git a/test/FrontendC++/2007-08-01-RestrictMethod.cpp b/test/FrontendC++/2007-08-01-RestrictMethod.cpp
new file mode 100644
index 0000000..b4922be
--- /dev/null
+++ b/test/FrontendC++/2007-08-01-RestrictMethod.cpp
@@ -0,0 +1,13 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias
+
+
+class foo {
+ int member[4];
+
+ void bar(int * a);
+
+};
+
+void foo::bar(int * a) __restrict {
+ member[3] = *a;
+}
diff --git a/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp b/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp
new file mode 100644
index 0000000..f813944
--- /dev/null
+++ b/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp
@@ -0,0 +1,88 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o -
+// PR1634
+
+namespace Manta
+{
+ class CallbackHandle
+ {
+ protected:virtual ~ CallbackHandle (void)
+ {
+ }
+ };
+template < typename Data1 > class CallbackBase_1Data:public CallbackHandle
+ {
+ };
+}
+
+namespace __gnu_cxx
+{
+ template < typename _Iterator, typename _Container >
+ class __normal_iterator
+ {
+ _Iterator _M_current;
+ };
+}
+
+namespace std
+{
+ template < typename _Tp > struct allocator
+ {
+ typedef _Tp *pointer;
+ };
+ template < typename _InputIterator,
+ typename _Tp > inline void find (_InputIterator __last,
+ const _Tp & __val)
+ {
+ };
+}
+
+namespace Manta
+{
+ template < typename _Tp, typename _Alloc> struct _Vector_base
+ {
+ struct _Vector_impl
+ {
+ _Tp *_M_start;
+ };
+ public:
+ _Vector_impl _M_impl;
+ };
+ template < typename _Tp, typename _Alloc = std::allocator < _Tp > >
+ class vector:protected _Vector_base < _Tp,_Alloc >
+ {
+ public:
+ typedef __gnu_cxx::__normal_iterator < typename _Alloc::pointer,
+ vector < _Tp, _Alloc > > iterator;
+ iterator end ()
+ {
+ }
+ };
+ class MantaInterface
+ {
+ };
+ class RTRT
+ {
+ virtual CallbackHandle *registerTerminationCallback (CallbackBase_1Data <
+ MantaInterface * >*);
+ virtual void unregisterCallback (CallbackHandle *);
+ typedef vector < CallbackBase_1Data < int >*>PRCallbackMapType;
+ PRCallbackMapType parallelPreRenderCallbacks;
+ };
+}
+using namespace Manta;
+CallbackHandle *
+RTRT::registerTerminationCallback (CallbackBase_1Data < MantaInterface * >*cb)
+{
+ return cb;
+}
+
+void
+RTRT::unregisterCallback (CallbackHandle * callback)
+{
+ {
+ typedef CallbackBase_1Data < int > callback_t;
+ callback_t *cb = static_cast < callback_t * >(callback);
+ find (parallelPreRenderCallbacks.end (), cb);
+ }
+}
+
diff --git a/test/FrontendC++/2007-10-01-StructResize.cpp b/test/FrontendC++/2007-10-01-StructResize.cpp
new file mode 100644
index 0000000..d37057a
--- /dev/null
+++ b/test/FrontendC++/2007-10-01-StructResize.cpp
@@ -0,0 +1,14 @@
+// RUN: %llvmgxx -c %s -o /dev/null
+
+#pragma pack(4)
+
+struct Bork {
+ unsigned int f1 : 3;
+ unsigned int f2 : 30;
+};
+
+int Foo(Bork *hdr) {
+ hdr->f1 = 7;
+ hdr->f2 = 927;
+}
+
diff --git a/test/FrontendC++/2008-01-11-BadWarning.cpp b/test/FrontendC++/2008-01-11-BadWarning.cpp
new file mode 100644
index 0000000..43f6a71
--- /dev/null
+++ b/test/FrontendC++/2008-01-11-BadWarning.cpp
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -xc++ %s -S -o /dev/null |& not grep warning
+// rdar://5683899
+void** f(void **Buckets, unsigned NumBuckets) {
+ return Buckets + NumBuckets;
+}
+
diff --git a/test/FrontendC++/2008-01-12-VecInit.cpp b/test/FrontendC++/2008-01-12-VecInit.cpp
new file mode 100644
index 0000000..e21bbb9
--- /dev/null
+++ b/test/FrontendC++/2008-01-12-VecInit.cpp
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -xc++ %s -S -o -
+// rdar://5685492
+
+typedef int __attribute__((vector_size(16))) v;
+v vt = {1, 2, 3, 4};
+
diff --git a/test/FrontendC++/2008-05-07-CrazyOffsetOf.cpp b/test/FrontendC++/2008-05-07-CrazyOffsetOf.cpp
new file mode 100644
index 0000000..f183197
--- /dev/null
+++ b/test/FrontendC++/2008-05-07-CrazyOffsetOf.cpp
@@ -0,0 +1,8 @@
+// RUN: %llvmgxx -S %s -o -
+// rdar://5914926
+
+struct bork {
+ struct bork *next_local;
+ char * query;
+};
+int offset = (char *) &(((struct bork *) 0x10)->query) - (char *) 0x10;
diff --git a/test/FrontendC++/2008-10-29-WrongOffset.cpp b/test/FrontendC++/2008-10-29-WrongOffset.cpp
new file mode 100644
index 0000000..1b3be21
--- /dev/null
+++ b/test/FrontendC++/2008-10-29-WrongOffset.cpp
@@ -0,0 +1,489 @@
+// RUN: %llvmgxx %s -c -o /dev/null
+// PR2917
+
+#include <complex>
+template < int Dim, class T, class EngineTag > class Engine;
+template < class Subject, class Sub1, bool SV > struct View1Implementation;
+template < class LayoutTag, class PatchTag > struct MultiPatch;
+template < class LayoutTag, class PatchTag, int Dim2 > struct MultiPatchView;
+template < class Engine, class SubDomain > struct NewEngine
+{
+};
+template < class T > class DomainTraits;
+template < class DomT, class T, int Dim > struct DomainTraitsDomain
+{
+ typedef DomT NewDomain1_t;
+};
+template < int Dim > class Interval;
+template < int Dim > class Loc;
+template < class DT > class DomainBase
+{
+};
+
+template < int Dim, class DT > class Domain:public DomainBase < DT >
+{
+};
+template < int Dim > struct DomainTraits <Interval < Dim >
+ >:public DomainTraitsDomain < Interval < Dim >, int, Dim >
+{
+ enum
+ {
+ singleValued = false
+ };
+};
+template < class T1 > struct NewDomain1
+{
+ typedef typename DomainTraits < T1 >::NewDomain1_t SliceType_t;
+};
+template < class Domain, class Sub > struct TemporaryNewDomain1
+{
+ typedef typename NewDomain1 < Sub >::SliceType_t SliceType_t;
+};
+template < int Dim > class Interval:public Domain < Dim,
+ DomainTraits < Interval < Dim > > >
+{
+};
+template < int Dim > class GuardLayers
+{
+};
+template < class T > class Observer
+{
+};
+
+template < class T > class Observable
+{
+private:T & observed_m;
+ int count_m;
+};
+
+class RefCounted
+{
+};
+template < class T > class RefCountedPtr
+{
+public:typedef RefCountedPtr < T > This_t;
+ RefCountedPtr (T * const pT):ptr_m (pT)
+ {
+ }
+ inline T *operator-> () const
+ {
+ }
+ T *ptr_m;
+};
+
+template < class Dom, class T > class DomainMap
+{
+};
+
+template < class LayoutTag, int Dim > struct MultiPatchLayoutTraits
+{
+};
+template < int Dim > class LayoutBaseData
+{
+public:typedef Interval < Dim > Domain_t;
+ Domain_t domain_m;
+};
+template < int Dim, class LBD > class LayoutBase
+{
+public:typedef LayoutBaseData < Dim > LayoutData_t;
+ typedef typename LayoutData_t::Domain_t Domain_t;
+ typedef GuardLayers < Dim > GuardLayers_t;
+ inline const Domain_t & domain () const
+ {
+ return pdata_m->domain_m;
+ }
+ inline const Domain_t & innerDomain () const
+ {
+ }
+ inline GuardLayers_t externalGuards () const
+ {
+ }
+ RefCountedPtr < LBD > pdata_m;
+};
+template < class Tag > struct Remote;
+struct Brick
+{
+};
+template < class Thing, class Sub > struct View1
+{
+};
+template < int Dim, class T, class LayoutTag,
+ class PatchTag > struct NewEngine <Engine < Dim, T, MultiPatch < LayoutTag,
+ PatchTag > >, Interval < Dim > >
+{
+ typedef Engine < Dim, T, MultiPatchView < LayoutTag, PatchTag,
+ Dim > >Type_t;
+};
+template < int Dim, class T, class LayoutTag, class PatchTag,
+ int Dim2 > struct NewEngine <Engine < Dim, T, MultiPatchView < LayoutTag,
+ PatchTag, Dim2 > >, Interval < Dim > >
+{
+ typedef Engine < Dim, T, MultiPatchView < LayoutTag, PatchTag,
+ Dim2 > >Type_t;
+};
+template < int Dim, class T, class LayoutTag,
+ class PatchTag > class Engine < Dim, T, MultiPatch < LayoutTag,
+ PatchTag > >:public Observer < typename MultiPatchLayoutTraits < LayoutTag,
+ Dim >::Layout_t >
+{
+public:typedef MultiPatch < LayoutTag, PatchTag > Tag_t;
+ typedef Interval < Dim > Domain_t;
+};
+template < int Dim, class T, class LayoutTag, class PatchTag,
+ int Dim2 > class Engine < Dim, T, MultiPatchView < LayoutTag, PatchTag,
+ Dim2 > >
+{
+public:typedef MultiPatchView < LayoutTag, PatchTag, Dim2 > Tag_t;
+ typedef Interval < Dim > Domain_t;
+ typedef T Element_t;
+ enum
+ {
+ dimensions = Dim
+ };
+};
+class Full;
+template < int Dim, class T = double, class EngineTag = Full > class Vector {
+};
+
+template < int Dim > inline Interval < Dim >
+shrinkRight (const Interval < Dim > &dom, int s)
+{
+}
+
+template < int Dim > class GridLayout;
+struct GridTag
+{
+};
+template < int Dim > struct MultiPatchLayoutTraits <GridTag, Dim >
+{
+ typedef GridLayout < Dim > Layout_t;
+};
+template < int Dim > class GridLayoutData:public LayoutBaseData < Dim >,
+ public RefCounted, public Observable < GridLayoutData < Dim > >
+{
+ typedef int AxisIndex_t;
+ mutable DomainMap < Interval < 1 >, AxisIndex_t > mapAloc_m[Dim];
+};
+template < int Dim > class GridLayout:public LayoutBase < Dim,
+ GridLayoutData < Dim > >, public Observable < GridLayout < Dim > >,
+ public Observer < GridLayoutData < Dim > >
+{
+public:typedef GridLayout < Dim > This_t;
+ GridLayout ();
+};
+template < class MeshTag, class T, class EngineTag > class Field;
+enum CenteringType
+{
+ VertexType, EdgeType, FaceType, CellType
+};
+enum ContinuityType
+{
+ Continuous = 0, Discontinuous
+};
+template < int Dim > class Centering
+{
+public:typedef Loc < Dim > Orientation;
+ inline int size () const
+ {
+ }
+};
+template < int Dim > const Centering < Dim >
+canonicalCentering (const enum CenteringType type,
+ const enum ContinuityType discontinuous,
+ const int dimension = 0);
+template < class Mesh, class T, class EngineTag > class FieldEngine
+{
+public:enum
+ {
+ dimensions = Mesh::dimensions
+ };
+ enum
+ {
+ Dim = dimensions
+ };
+ typedef Engine < Dim, T, EngineTag > Engine_t;
+ typedef typename Engine_t::Domain_t Domain_t;
+ typedef GuardLayers < Dim > GuardLayers_t;
+template < class Layout2 > FieldEngine (const Centering < Dim > ¢ering, const Layout2 & layout, const Mesh & mesh, int materials = 1):num_materials_m (materials), centering_m (centering),
+ stride_m (centering.size ()), physicalCellDomain_m (layout.domain ()),
+ guards_m (layout.externalGuards ()), mesh_m (mesh)
+ {
+ }
+ unsigned int num_materials_m;
+ Centering < Dim > centering_m;
+ int stride_m;
+ Domain_t physicalCellDomain_m;
+ GuardLayers_t guards_m;
+ Mesh mesh_m;
+};
+
+template < class Subject > class SubFieldView;
+template < class Mesh, class T,
+ class EngineTag > class SubFieldView < Field < Mesh, T, EngineTag > >
+{
+public:typedef Field < Mesh, T, EngineTag > Type_t;
+};
+
+template < int Dim, class Mesh, class Domain > struct NewMeshTag
+{
+ typedef Mesh Type_t;
+};
+template < class Mesh, class T, class EngineTag,
+ class Domain > struct View1Implementation <Field < Mesh, T, EngineTag >,
+ Domain, false >
+{
+ typedef Field < Mesh, T, EngineTag > Subject_t;
+ typedef typename Subject_t::Engine_t Engine_t;
+ typedef typename NewEngine < Engine_t, Domain >::Type_t NewEngine_t;
+ typedef typename NewEngine_t::Element_t NewT_t;
+ typedef typename NewEngine_t::Tag_t NewEngineTag_t;
+ typedef typename NewMeshTag < NewEngine_t::dimensions, Mesh,
+ Domain >::Type_t NewMeshTag_t;
+ typedef Field < NewMeshTag_t, NewT_t, NewEngineTag_t > Type_t;
+};
+template < class Mesh, class T, class EngineTag,
+ class Sub1 > struct View1 <Field < Mesh, T, EngineTag >, Sub1 >
+{
+ typedef Field < Mesh, T, EngineTag > Subject_t;
+ typedef typename Subject_t::Domain_t Domain_t;
+ typedef TemporaryNewDomain1 < Domain_t, Sub1 > NewDomain_t;
+ typedef typename NewDomain_t::SliceType_t SDomain_t;
+ enum
+ {
+ sv = DomainTraits < SDomain_t >::singleValued
+ };
+ typedef View1Implementation < Subject_t, SDomain_t, sv > Dispatch_t;
+ typedef typename Dispatch_t::Type_t Type_t;
+};
+template < class Mesh, class T = double, class EngineTag = Brick > class Field {
+public:typedef Mesh MeshTag_t;
+ typedef Mesh Mesh_t;
+ typedef Field < Mesh, T, EngineTag > This_t;
+ typedef FieldEngine < Mesh, T, EngineTag > FieldEngine_t;
+ enum
+ {
+ dimensions = FieldEngine_t::dimensions
+ };
+ typedef Engine < dimensions, T, EngineTag > Engine_t;
+ typedef typename Engine_t::Domain_t Domain_t;
+ typedef Centering < dimensions > Centering_t;
+ template < class Layout2 > Field (const Centering_t & centering,
+ const Layout2 & layout,
+ const Mesh_t &
+ mesh):fieldEngine_m (centering, layout,
+ mesh)
+ {
+ }
+ inline typename SubFieldView < This_t >::Type_t center (int c) const
+ {
+ }
+ inline typename View1 < This_t, Domain_t >::Type_t all () const
+ {
+ }
+ template < class T1 > const This_t & operator= (const T1 & rhs) const
+ {
+ }
+private: FieldEngine_t fieldEngine_m;
+};
+
+struct UniformRectilinearTag
+{
+};
+struct CartesianTag
+{
+};
+template < class MeshTraits > struct CartesianURM;
+template < class MeshTraits > class UniformRectilinearMeshData;
+template < class MeshTraits > class UniformRectilinearMesh;
+template < int Dim, typename T = double, class MeshTag =
+ UniformRectilinearTag, class CoordinateSystemTag = CartesianTag, int CDim =
+ Dim > struct MeshTraits;
+template < int Dim, typename T, class MeshTag, class CoordinateSystemTag,
+ int CDim > struct MeshTraitsBase
+{
+ typedef MeshTraits < Dim, T, MeshTag, CoordinateSystemTag,
+ CDim > MeshTraits_t;
+ enum
+ {
+ dimensions = Dim
+ };
+ typedef Vector < CDim, T > PointType_t;
+};
+template < int Dim, typename T, int CDim > struct MeshTraits <Dim, T,
+ UniformRectilinearTag, CartesianTag, CDim >:public MeshTraitsBase < Dim, T,
+ UniformRectilinearTag, CartesianTag, CDim >
+{
+ typedef typename MeshTraitsBase < Dim, T, UniformRectilinearTag,
+ CartesianTag, CDim >::MeshTraits_t MeshTraits_t;
+ typedef CartesianURM < MeshTraits_t > CoordinateSystem_t;
+ typedef UniformRectilinearMeshData < MeshTraits_t > MeshData_t;
+ typedef UniformRectilinearMesh < MeshTraits_t > Mesh_t;
+ typedef Vector < CDim, T > SpacingsType_t;
+};
+template < int Dim > class NoMeshData:public RefCounted
+{
+public:NoMeshData ()
+ {
+ }
+ template < class Layout >
+ explicit NoMeshData (const Layout &
+ layout):physicalVertexDomain_m (layout.
+ innerDomain ()),
+ physicalCellDomain_m (shrinkRight (physicalVertexDomain_m, 1)),
+ totalVertexDomain_m (layout.domain ()),
+ totalCellDomain_m (shrinkRight (totalVertexDomain_m, 1))
+ {
+ }
+private:Interval < Dim > physicalVertexDomain_m, physicalCellDomain_m;
+ Interval < Dim > totalVertexDomain_m, totalCellDomain_m;
+};
+
+template < class MeshTraits > class UniformRectilinearMeshData:public NoMeshData <
+ MeshTraits::
+ dimensions >
+{
+public:typedef typename
+ MeshTraits::MeshData_t
+ MeshData_t;
+ typedef typename
+ MeshTraits::PointType_t
+ PointType_t;
+ typedef typename
+ MeshTraits::SpacingsType_t
+ SpacingsType_t;
+ enum
+ {
+ dimensions = MeshTraits::dimensions
+ };
+ template < class Layout > UniformRectilinearMeshData (const Layout & layout,
+ const PointType_t &
+ origin,
+ const SpacingsType_t &
+ spacings):
+ NoMeshData <
+ dimensions > (layout),
+ origin_m (origin),
+ spacings_m (spacings)
+ {
+ }
+private:PointType_t origin_m;
+ SpacingsType_t
+ spacings_m;
+};
+
+template < class MeshTraits > class UniformRectilinearMesh:public MeshTraits::
+ CoordinateSystem_t
+{
+public:typedef MeshTraits
+ MeshTraits_t;
+ typedef typename
+ MeshTraits::MeshData_t
+ MeshData_t;
+ typedef typename
+ MeshTraits::PointType_t
+ PointType_t;
+ typedef typename
+ MeshTraits::SpacingsType_t
+ SpacingsType_t;
+ enum
+ {
+ dimensions = MeshTraits::dimensions
+ };
+ template < class Layout >
+ inline UniformRectilinearMesh (const Layout & layout,
+ const PointType_t & origin,
+ const SpacingsType_t & spacings):
+ data_m (new MeshData_t (layout, origin, spacings))
+ {
+ }
+private:RefCountedPtr < MeshData_t > data_m;
+};
+
+template < class MeshTraits > struct GenericURM
+{
+};
+template < class MeshTraits > struct CartesianURM:
+ public
+ GenericURM <
+ MeshTraits >
+{
+};
+template < int
+ dim,
+ class
+ MeshTag = UniformRectilinearTag, class CoordinateSystemTag = CartesianTag > struct ParallelTraits {
+ enum
+ {
+ Dim = dim
+ };
+ typedef
+ GridLayout <
+ dim >
+ Layout_t;
+ typedef
+ MeshTraits <
+ dim, double,
+ MeshTag,
+ CoordinateSystemTag >
+ MeshTraits_t;
+ typedef typename
+ MeshTraits_t::Mesh_t
+ Mesh_t;
+ typedef
+ MultiPatch <
+ GridTag,
+ Remote <
+ Brick > >
+ Engine_t;
+};
+template < class ComputeTraits > struct RhalkTraits:
+ public
+ ComputeTraits
+{
+ typedef typename
+ ComputeTraits::Mesh_t
+ Mesh_t;
+ typedef typename
+ ComputeTraits::Engine_t
+ Engine_t;
+ enum
+ {
+ Dim = ComputeTraits::Dim
+ };
+ typedef
+ Centering <
+ Dim >
+ Centering_t;
+ typedef typename
+ Mesh_t::SpacingsType_t
+ Spacings_t;
+ typedef
+ Field <
+ Mesh_t, double,
+ Engine_t >
+ Scalar_t;
+};
+enum
+{
+ Dim = 3
+};
+typedef
+ RhalkTraits <
+ ParallelTraits <
+ Dim,
+ UniformRectilinearTag,
+CartesianTag > >
+ Traits_t;
+Vector < Dim > origin;
+Traits_t::Spacings_t spacings;
+int
+main (int argc, char **argv)
+{
+ Traits_t::Layout_t layout;
+ Traits_t::Mesh_t mesh (layout, origin, spacings);
+ Traits_t::Centering_t face =
+ canonicalCentering < Traits_t::Dim > (FaceType, Continuous);
+ Traits_t::Scalar_t v (face, layout, mesh);
+ for (int i = 0; i < Dim; ++i)
+ v.center (i).all () = std::numeric_limits < double >::signaling_NaN ();
+}
diff --git a/test/FrontendC++/2009-02-07-VolatileArrayRefHack.cpp b/test/FrontendC++/2009-02-07-VolatileArrayRefHack.cpp
new file mode 100644
index 0000000..b8589b0
--- /dev/null
+++ b/test/FrontendC++/2009-02-07-VolatileArrayRefHack.cpp
@@ -0,0 +1,7 @@
+// RUN: %llvmgxx -S %s -o - | grep {volatile load}
+// PR3320
+
+void test(volatile int *a) {
+ // should be a volatile load.
+ a[0];
+}
diff --git a/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp b/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp
new file mode 100644
index 0000000..8f1b598
--- /dev/null
+++ b/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S -g --emit-llvm %s -o - | grep "\~A"
+class A {
+ int i;
+public:
+ A() { i = 0; }
+ ~A() { i = 42; }
+};
+
+A a;
+
diff --git a/test/FrontendC++/2009-03-17-dbg.cpp b/test/FrontendC++/2009-03-17-dbg.cpp
new file mode 100644
index 0000000..93da618
--- /dev/null
+++ b/test/FrontendC++/2009-03-17-dbg.cpp
@@ -0,0 +1,16 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null -g
+// XTARGET: darwin,linux
+// XFAIL: *
+template <typename T1,typename T2>
+inline void f(const T1&,const T2&) { }
+
+template <typename T1,typename T2,void F(const T1&,const T2&)>
+struct A {
+ template <typename T> void g(T& i) { }
+};
+
+int main() {
+ int i;
+ A<int,int,f> a;
+ a.g(i);
+}
diff --git a/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp b/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp
new file mode 100644
index 0000000..997c3f7
--- /dev/null
+++ b/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp
@@ -0,0 +1,32 @@
+// RUN: %llvmgcc -c -g %s -o - | llc -O0 -o %t.s
+// RUN: %compile_c %t.s -o %t.o
+// PR4025
+
+template <typename _Tp> class vector
+{
+public:
+ ~vector ()
+ {
+ }
+};
+
+class Foo
+{
+ ~Foo();
+ class FooImpl *impl_;
+};
+
+namespace {
+ class Bar;
+}
+
+class FooImpl
+{
+ vector<Bar*> thing;
+};
+
+Foo::~Foo()
+{
+ delete impl_;
+}
+
diff --git a/test/FrontendC++/2009-04-23-bool2.cpp b/test/FrontendC++/2009-04-23-bool2.cpp
new file mode 100644
index 0000000..8614a37
--- /dev/null
+++ b/test/FrontendC++/2009-04-23-bool2.cpp
@@ -0,0 +1,15 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null
+// g++.old-deja/g++.jason/bool2.C from gcc testsuite.
+// Crashed before 67975 went in.
+struct F {
+ bool b1 : 1;
+ bool b2 : 7;
+};
+
+int main()
+{
+ F f = { true, true };
+
+ if (int (f.b1) != 1)
+ return 1;
+}
diff --git a/test/FrontendC++/2009-05-04-PureConstNounwind.cpp b/test/FrontendC++/2009-05-04-PureConstNounwind.cpp
new file mode 100644
index 0000000..a4b4653
--- /dev/null
+++ b/test/FrontendC++/2009-05-04-PureConstNounwind.cpp
@@ -0,0 +1,8 @@
+// RUN: %llvmgxx -S -emit-llvm %s -o - | grep nounwind | count 4
+int c(void) __attribute__((const));
+int p(void) __attribute__((pure));
+int t(void);
+
+int f(void) {
+ return c() + p() + t();
+}
diff --git a/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp b/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp
new file mode 100644
index 0000000..b3758d2
--- /dev/null
+++ b/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp
@@ -0,0 +1,10 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null -g
+// This crashes if we try to emit debug info for TEMPLATE_DECL members.
+template <class T> class K2PtrVectorBase {};
+template <class T> class K2Vector {};
+template <class U > class K2Vector<U*> : public K2PtrVectorBase<U*> {};
+class ScriptInfoManager {
+ void PostRegister() ;
+ template <class SI> short ReplaceExistingElement(K2Vector<SI*>& v);
+};
+void ScriptInfoManager::PostRegister() {}
diff --git a/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp b/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp
new file mode 100644
index 0000000..dcb2f16
--- /dev/null
+++ b/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp
@@ -0,0 +1,32 @@
+// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep baz | grep global | grep {struct.bar}
+// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep ccc | grep global | grep {struct.CC}
+// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep quux | grep global | grep {struct.bar}
+// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep foo | grep global | grep {struct.SRCFilter::FilterEntry}
+// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.bar} | grep {1 x i32}
+// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.CC} | grep {struct.payre<KBFP,float*} | grep {.base.32} | grep {1 x i32}
+// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.SRCFilter::FilterEntry} | not grep {1 x i32}
+// XFAIL: *
+// XTARGET: powerpc-apple-darwin
+
+template<class _T1, class _T2> struct payre {
+ _T1 first;
+ _T2 second;
+ payre() : first(), second() { }
+};
+struct KBFP {
+ double mCutoffFrequency;
+};
+class SRCFilter {
+ struct FilterEntry: public payre<KBFP, float*>{};
+ static FilterEntry foo;
+};
+SRCFilter::FilterEntry SRCFilter::foo; // 12 bytes
+payre<KBFP, float*> baz; // 16 bytes
+class CC { // 16 bytes
+ public: payre<KBFP, float*> x;
+};
+class CC ccc;
+
+struct bar { KBFP x; float* y;}; // 16 bytes
+struct bar quux;
+
diff --git a/test/FrontendC++/2009-06-30-ByrefBlock.cpp b/test/FrontendC++/2009-06-30-ByrefBlock.cpp
new file mode 100644
index 0000000..be9c94f
--- /dev/null
+++ b/test/FrontendC++/2009-06-30-ByrefBlock.cpp
@@ -0,0 +1,11 @@
+// Insure __block_holder_tmp is allocated on the stack. Darwin only.
+// RUN: %llvmgxx %s -S -O2 -o - | egrep {__block_holder_tmp.*alloca}
+// XFAIL: *
+// XTARGET: darwin
+// <rdar://problem/5865221>
+// END.
+extern void fubar_dispatch_sync(void (^PP)(void));
+void fubar() {
+ __block void *voodoo;
+ fubar_dispatch_sync(^(void){voodoo=0;});
+}
diff --git a/test/FrontendC++/2009-07-15-LineNumbers.cpp b/test/FrontendC++/2009-07-15-LineNumbers.cpp
new file mode 100644
index 0000000..a8eda77
--- /dev/null
+++ b/test/FrontendC++/2009-07-15-LineNumbers.cpp
@@ -0,0 +1,27 @@
+// This is a regression test on debug info to make sure that we can
+// print line numbers in asm.
+// RUN: %llvmgcc -S -O0 -g %s -o - | \
+// RUN: llc --disable-fp-elim -O0 -relocation-model=pic | grep { 2009-07-15-LineNumbers.cpp:25$}
+
+#include <stdlib.h>
+
+class DeepStack {
+ int seedVal;
+public:
+ DeepStack(int seed) : seedVal(seed) {}
+
+ int shallowest( int x ) { return shallower(x + 1); }
+ int shallower ( int x ) { return shallow(x + 2); }
+ int shallow ( int x ) { return deep(x + 3); }
+ int deep ( int x ) { return deeper(x + 4); }
+ int deeper ( int x ) { return deepest(x + 6); }
+ int deepest ( int x ) { return x + 7; }
+
+ int runit() { return shallowest(seedVal); }
+};
+
+int main ( int argc, char** argv) {
+
+ DeepStack DS9( (argc > 1 ? atoi(argv[1]) : 0) );
+ return DS9.runit();
+}
diff --git a/test/FrontendC++/2009-07-16-PrivateCopyConstructor.cpp b/test/FrontendC++/2009-07-16-PrivateCopyConstructor.cpp
new file mode 100644
index 0000000..96e85b2
--- /dev/null
+++ b/test/FrontendC++/2009-07-16-PrivateCopyConstructor.cpp
@@ -0,0 +1,15 @@
+// RUN: %llvmgxx %s -S
+// XFAIL: darwin
+
+#include <set>
+
+class A {
+public:
+ A();
+private:
+ A(const A&);
+};
+void B()
+{
+ std::set<void *, A> foo;
+}
diff --git a/test/FrontendC++/2009-07-16-Using.cpp b/test/FrontendC++/2009-07-16-Using.cpp
new file mode 100644
index 0000000..1acadf6
--- /dev/null
+++ b/test/FrontendC++/2009-07-16-Using.cpp
@@ -0,0 +1,8 @@
+// RUN: %llvmgxx %s -S
+
+namespace A {
+ typedef int B;
+}
+struct B {
+};
+using ::A::B;
diff --git a/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp b/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp
new file mode 100644
index 0000000..bc862e7
--- /dev/null
+++ b/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp
@@ -0,0 +1,12 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o -
+// rdar://7114564
+struct A {
+ unsigned long long : (sizeof(unsigned long long) * 8) - 16;
+};
+struct B {
+ A a;
+};
+struct B b = {
+ {}
+};
+
diff --git a/test/FrontendC++/2009-08-11-VectorRetTy.cpp b/test/FrontendC++/2009-08-11-VectorRetTy.cpp
new file mode 100644
index 0000000..b2c3ba18
--- /dev/null
+++ b/test/FrontendC++/2009-08-11-VectorRetTy.cpp
@@ -0,0 +1,13 @@
+// RUN: %llvmgxx %s -c -o /dev/null
+// <rdar://problem/7096460>
+typedef void (*Func) ();
+typedef long long m64 __attribute__((__vector_size__(8), __may_alias__));
+static inline m64 __attribute__((__always_inline__, __nodebug__)) _mm_set1_pi16() {}
+template <class MM>
+static void Bork() {
+ const m64 mmx_0x00ff = _mm_set1_pi16();
+}
+struct A {};
+Func arr[] = {
+ Bork<A>
+};
diff --git a/test/FrontendC++/2009-09-04-modify-crash.cpp b/test/FrontendC++/2009-09-04-modify-crash.cpp
new file mode 100644
index 0000000..ac16f8c
--- /dev/null
+++ b/test/FrontendC++/2009-09-04-modify-crash.cpp
@@ -0,0 +1,7 @@
+// RUN: %llvmgxx %s -emit-llvm -fapple-kext -S -o -
+// The extra check in 71555 caused this to crash on Darwin X86
+// in an assert build.
+class foo {
+ virtual ~foo ();
+};
+foo::~foo(){}
diff --git a/test/FrontendC++/2009-09-09-packed-layout.cpp b/test/FrontendC++/2009-09-09-packed-layout.cpp
new file mode 100644
index 0000000..a569f9f
--- /dev/null
+++ b/test/FrontendC++/2009-09-09-packed-layout.cpp
@@ -0,0 +1,18 @@
+// RUN: %llvmgxx -S -m32 -emit-llvm %s -o /dev/null
+class X {
+ public:
+ virtual ~X();
+ short y;
+};
+#pragma pack(push, 1)
+class Z : public X {
+ public: enum { foo = ('x') };
+ virtual int y() const;
+};
+#pragma pack(pop)
+class Y : public X {
+public: enum { foo = ('y'), bar = 0 };
+};
+X x;
+Y y;
+Z z;
diff --git a/test/FrontendC++/2009-10-27-crash.cpp b/test/FrontendC++/2009-10-27-crash.cpp
new file mode 100644
index 0000000..5641aa4
--- /dev/null
+++ b/test/FrontendC++/2009-10-27-crash.cpp
@@ -0,0 +1,43 @@
+// RUN: %llvmgxx -emit-llvm -S %s
+// Radar 7328944
+
+typedef struct
+{
+ unsigned short a : 1;
+ unsigned short b : 2;
+ unsigned short c : 1;
+ unsigned short d : 1;
+ unsigned short e : 1;
+ unsigned short f : 1;
+ unsigned short g : 2;
+ unsigned short : 7;
+ union
+ {
+ struct
+ {
+ unsigned char h : 1;
+ unsigned char i : 1;
+ unsigned char j : 1;
+ unsigned char : 5;
+ };
+ struct
+ {
+ unsigned char k : 3;
+ unsigned char : 5;
+ };
+ };
+ unsigned char : 8;
+} tt;
+
+typedef struct
+{
+ unsigned char s;
+ tt t;
+ unsigned int u;
+} ttt;
+
+ttt X = {
+ 4,
+ { 0 },
+ 55,
+};
diff --git a/test/FrontendC++/2009-12-23-MissingSext.cpp b/test/FrontendC++/2009-12-23-MissingSext.cpp
new file mode 100644
index 0000000..ee97881
--- /dev/null
+++ b/test/FrontendC++/2009-12-23-MissingSext.cpp
@@ -0,0 +1,16 @@
+// RUN: %llvmgxx %s -S -o - | FileCheck %s
+// The store of p.y into the temporary was not
+// getting extended to 32 bits, so uninitialized
+// bits of the temporary were used. 7366161.
+struct foo {
+ char x:8;
+ signed int y:24;
+};
+int bar(struct foo p, int x) {
+// CHECK: bar
+// CHECK: sext
+// CHECK: sext
+ x = (p.y > x ? x : p.y);
+ return x;
+// CHECK: return
+}
diff --git a/test/FrontendC++/2010-02-08-NamespaceVar.cpp b/test/FrontendC++/2010-02-08-NamespaceVar.cpp
new file mode 100644
index 0000000..cd8247a
--- /dev/null
+++ b/test/FrontendC++/2010-02-08-NamespaceVar.cpp
@@ -0,0 +1,16 @@
+// RUN: %llvmgxx -S %s -o - | grep cX
+
+namespace C {
+ int c = 1;
+ namespace {
+ int cX = 6;
+ void marker2() {
+ cX;
+ }
+ }
+}
+
+int main() {
+ C::marker2();
+ return 0;
+}
diff --git a/test/FrontendC++/alignstack.cpp b/test/FrontendC++/alignstack.cpp
new file mode 100644
index 0000000..4f993d6
--- /dev/null
+++ b/test/FrontendC++/alignstack.cpp
@@ -0,0 +1,23 @@
+// RUN: %llvmgxx %s -fasm-blocks -S -o - | FileCheck %s
+// Complicated expression as jump target
+// XFAIL: *
+// XTARGET: x86,i386,i686,darwin
+
+void Method3()
+{
+// CHECK: Method3
+// CHECK-NOT: alignstack
+ asm("foo:");
+// CHECK: return
+}
+
+void Method4()
+{
+// CHECK: Method4
+// CHECK: alignstack
+ asm {
+ bar:
+ }
+// CHECK: return
+}
+
diff --git a/test/FrontendC++/dg.exp b/test/FrontendC++/dg.exp
new file mode 100644
index 0000000..fc852e3
--- /dev/null
+++ b/test/FrontendC++/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports c++ ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/FrontendC++/integration-O2.cpp b/test/FrontendC++/integration-O2.cpp
new file mode 100644
index 0000000..bb65ac2
--- /dev/null
+++ b/test/FrontendC++/integration-O2.cpp
@@ -0,0 +1,19 @@
+// RUN: %llvmgxx %s -O2 -S -o - | FileCheck %s
+
+// This test verifies that we get expected codegen out of the -O2 optimization
+// level from the full optimizer.
+
+
+
+// Verify that ipsccp is running and can eliminate globals.
+static int test1g = 42;
+void test1f1() {
+ if (test1g == 0) test1g = 0;
+}
+int test1f2() {
+ return test1g;
+}
+
+// CHECK: @_Z7test1f2v()
+// CHECK: entry:
+// CHECK-NEXT: ret i32 42
diff --git a/test/FrontendC++/m64-ptr.cpp b/test/FrontendC++/m64-ptr.cpp
new file mode 100644
index 0000000..f91e2f4
--- /dev/null
+++ b/test/FrontendC++/m64-ptr.cpp
@@ -0,0 +1,19 @@
+// RUN: %llvmgxx %s -S -o - | FileCheck %s
+// XFAIL: powerpc-apple-darwin
+
+// Make sure pointers are passed as pointers, not converted to int.
+// The first load should be of type i8** in either 32 or 64 bit mode.
+// This formerly happened on x86-64, 7375899.
+
+class StringRef {
+public:
+ const char *Data;
+ long Len;
+};
+void foo(StringRef X);
+void bar(StringRef &A) {
+// CHECK: @_Z3barR9StringRef
+// CHECK: load i8**
+ foo(A);
+// CHECK: ret void
+}
diff --git a/test/FrontendC++/member-alignment.cpp b/test/FrontendC++/member-alignment.cpp
new file mode 100644
index 0000000..6afc0aa
--- /dev/null
+++ b/test/FrontendC++/member-alignment.cpp
@@ -0,0 +1,20 @@
+// RUN: %llvmgxx -S -emit-llvm %s -o - | FileCheck %s
+// XFAIL: arm,powerpc
+
+// rdar://7268289
+
+class t {
+public:
+ virtual void foo(void);
+ void bar(void);
+};
+
+void
+t::bar(void) {
+// CHECK: _ZN1t3barEv{{.*}} align 2
+}
+
+void
+t::foo(void) {
+// CHECK: _ZN1t3fooEv{{.*}} align 2
+}
diff --git a/test/FrontendC++/ptr-to-method-devirt.cpp b/test/FrontendC++/ptr-to-method-devirt.cpp
new file mode 100644
index 0000000..358b801
--- /dev/null
+++ b/test/FrontendC++/ptr-to-method-devirt.cpp
@@ -0,0 +1,14 @@
+// PR1602
+// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | not grep ptrtoint
+// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | grep getelementptr | count 1
+
+
+struct S { virtual void f(); };
+
+typedef void (S::*P)(void);
+
+const P p = &S::f;
+
+void g(S s) {
+ (s.*p)();
+ }
diff --git a/test/FrontendC++/varargs.cpp b/test/FrontendC++/varargs.cpp
new file mode 100644
index 0000000..1c07aed
--- /dev/null
+++ b/test/FrontendC++/varargs.cpp
@@ -0,0 +1,19 @@
+// RUN: %llvmgxx -S -emit-llvm %s -o - | FileCheck %s
+// rdar://7309675
+// PR4678
+
+// test1 should be compmiled to be a varargs function in the IR even
+// though there is no way to do a va_begin. Otherwise, the optimizer
+// will warn about 'dropped arguments' at the call site.
+
+// CHECK: define i32 @_Z5test1z(...)
+int test1(...) {
+ return -1;
+}
+
+// CHECK: call i32 (...)* @_Z5test1z(i32 0)
+void test() {
+ test1(0);
+}
+
+
diff --git a/test/FrontendC++/weak-external.cpp b/test/FrontendC++/weak-external.cpp
new file mode 100644
index 0000000..94360c2
--- /dev/null
+++ b/test/FrontendC++/weak-external.cpp
@@ -0,0 +1,17 @@
+// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | not grep {_ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag}
+// PR4262
+
+// The "basic_string" extern template instantiation declaration is supposed to
+// suppress the implicit instantiation of non-inline member functions. Make sure
+// that we suppress the implicit instantiation of non-inline member functions
+// defined out-of-line. That we aren't instantiating the basic_string
+// constructor when we shouldn't be. Such an instantiation forces the implicit
+// instantiation of _S_construct<const char*>. Since _S_construct is a member
+// template, it's instantiation is *not* suppressed (despite being in
+// basic_string<char>), so we would emit it as a weak definition.
+
+#include <stdexcept>
+
+void dummysymbol() {
+ throw(std::runtime_error("string"));
+}
diff --git a/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp b/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp
new file mode 100644
index 0000000..ec69afc
--- /dev/null
+++ b/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp
@@ -0,0 +1,27 @@
+// RUN: %llvmgxx -S -emit-llvm %s -o - | grep byval | count 2
+// XTARGET: x86
+// PR4242
+// (PR 4242 bug is on 64-bit only, test passes on x86-32 as well)
+
+struct S {
+ void* data[3];
+};
+
+struct T {
+ void* data[2];
+};
+
+extern "C" S fail(int, int, int, int, T t, void* p) {
+ S s;
+ s.data[0] = t.data[0];
+ s.data[1] = t.data[1];
+ s.data[2] = p;
+ return s;
+}
+
+extern "C" S* succeed(S* sret, int, int, int, int, T t, void* p) {
+ sret->data[0] = t.data[0];
+ sret->data[1] = t.data[1];
+ sret->data[2] = p;
+ return sret;
+}
diff --git a/test/FrontendC/2002-01-23-LoadQISIReloadFailure.c b/test/FrontendC/2002-01-23-LoadQISIReloadFailure.c
new file mode 100644
index 0000000..1779a99
--- /dev/null
+++ b/test/FrontendC/2002-01-23-LoadQISIReloadFailure.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* Regression test. Just compile .c -> .ll to test */
+int foo(void) {
+ unsigned char *pp;
+ unsigned w_cnt;
+
+ w_cnt += *pp;
+
+ return w_cnt;
+}
diff --git a/test/FrontendC/2002-01-24-ComplexSpaceInType.c b/test/FrontendC/2002-01-24-ComplexSpaceInType.c
new file mode 100644
index 0000000..13d92c7
--- /dev/null
+++ b/test/FrontendC/2002-01-24-ComplexSpaceInType.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+// This caused generation of the following type name:
+// %Array = uninitialized global [10 x %complex int]
+//
+// which caused problems because of the space int the complex int type
+//
+
+struct { int X, Y; } Array[10];
+
+void foo() {}
diff --git a/test/FrontendC/2002-01-24-HandleCallInsnSEGV.c b/test/FrontendC/2002-01-24-HandleCallInsnSEGV.c
new file mode 100644
index 0000000..e619cf4
--- /dev/null
+++ b/test/FrontendC/2002-01-24-HandleCallInsnSEGV.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+void *dlclose(void*);
+
+void ap_os_dso_unload(void *handle)
+{
+ dlclose(handle);
+ return; /* This return triggers the bug: Weird */
+}
diff --git a/test/FrontendC/2002-02-13-ConditionalInCall.c b/test/FrontendC/2002-02-13-ConditionalInCall.c
new file mode 100644
index 0000000..f361088
--- /dev/null
+++ b/test/FrontendC/2002-02-13-ConditionalInCall.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* Test problem where bad code was generated with a ?: statement was
+ in a function call argument */
+
+void foo(int, double, float);
+
+void bar(int x) {
+ foo(x, x ? 1.0 : 12.5, 1.0f);
+}
+
diff --git a/test/FrontendC/2002-02-13-ReloadProblem.c b/test/FrontendC/2002-02-13-ReloadProblem.c
new file mode 100644
index 0000000..2ae97b7
--- /dev/null
+++ b/test/FrontendC/2002-02-13-ReloadProblem.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* This triggered a problem in reload, fixed by disabling most of the
+ * steps of compilation in GCC. Before this change, the code went through
+ * the entire backend of GCC, even though it was unnecessary for LLVM output
+ * now it is skipped entirely, and since reload doesn't run, it can't cause
+ * a problem.
+ */
+
+extern int tolower(int);
+
+const char *rangematch(const char *pattern, int test, int c) {
+
+ if ((c <= test) | (tolower(c) <= tolower((unsigned char)test)))
+ return 0;
+
+ return pattern;
+}
diff --git a/test/FrontendC/2002-02-13-TypeVarNameCollision.c b/test/FrontendC/2002-02-13-TypeVarNameCollision.c
new file mode 100644
index 0000000..2dede68
--- /dev/null
+++ b/test/FrontendC/2002-02-13-TypeVarNameCollision.c
@@ -0,0 +1,16 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* This testcase causes a symbol table collision. Type names and variable
+ * names should be in distinct namespaces
+ */
+
+typedef struct foo {
+ int X, Y;
+} FOO;
+
+static FOO foo[100];
+
+int test() {
+ return foo[4].Y;
+}
+
diff --git a/test/FrontendC/2002-02-13-UnnamedLocal.c b/test/FrontendC/2002-02-13-UnnamedLocal.c
new file mode 100644
index 0000000..85aa615
--- /dev/null
+++ b/test/FrontendC/2002-02-13-UnnamedLocal.c
@@ -0,0 +1,21 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* Testcase for a problem where GCC allocated xqic to a register,
+ * and did not have a VAR_DECL that explained the stack slot to LLVM.
+ * Now the LLVM code synthesizes a stack slot if one is presented that
+ * has not been previously recognized. This is where alloca's named
+ * 'local' come from now.
+ */
+
+typedef struct {
+ short x;
+} foostruct;
+
+int foo(foostruct ic);
+
+void test() {
+ foostruct xqic;
+ foo(xqic);
+}
+
+
diff --git a/test/FrontendC/2002-02-14-EntryNodePreds.c b/test/FrontendC/2002-02-14-EntryNodePreds.c
new file mode 100644
index 0000000..851af91
--- /dev/null
+++ b/test/FrontendC/2002-02-14-EntryNodePreds.c
@@ -0,0 +1,37 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* GCC Used to generate code that contained a branch to the entry node of
+ * the do_merge function. This is illegal LLVM code. To fix this, GCC now
+ * inserts an entry node regardless of whether or not it has to insert allocas.
+ */
+
+struct edge_rec
+{
+ struct VERTEX *v;
+ struct edge_rec *next;
+ int wasseen;
+ int more_data;
+};
+
+typedef struct edge_rec *QUAD_EDGE;
+
+typedef struct {
+ QUAD_EDGE left, right;
+} EDGE_PAIR;
+
+struct EDGE_STACK {
+ int ptr;
+ QUAD_EDGE *elts;
+ int stack_size;
+};
+
+int do_merge(QUAD_EDGE ldo, QUAD_EDGE rdo) {
+ int lvalid;
+ QUAD_EDGE basel,rcand;
+ while (1) {
+ if (!lvalid) {
+ return (int)basel->next;
+ }
+ }
+}
+
diff --git a/test/FrontendC/2002-02-16-RenamingTest.c b/test/FrontendC/2002-02-16-RenamingTest.c
new file mode 100644
index 0000000..6042b67
--- /dev/null
+++ b/test/FrontendC/2002-02-16-RenamingTest.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* test that locals are renamed with . notation */
+
+void abc(void *);
+
+void Test5(double X) {
+ abc(&X);
+ {
+ int X;
+ abc(&X);
+ {
+ float X;
+ abc(&X);
+ }
+ }
+}
+
diff --git a/test/FrontendC/2002-02-17-ArgumentAddress.c b/test/FrontendC/2002-02-17-ArgumentAddress.c
new file mode 100644
index 0000000..acd7e37
--- /dev/null
+++ b/test/FrontendC/2002-02-17-ArgumentAddress.c
@@ -0,0 +1,39 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+int test(int X) {
+ return X;
+}
+
+void abc(int *X);
+int def(int Y, int Z) {
+ abc(&Z);
+ return Y;
+}
+
+struct Test { short X, x; int Y, Z; };
+
+int Testing(struct Test *A) {
+ return A->X+A->Y;
+}
+
+int Test2(int X, struct Test A, int Y) {
+ return X+Y+A.X+A.Y;
+}
+int Test3(struct Test A, struct Test B) {
+ return A.X+A.Y+B.Y+B.Z;
+}
+
+struct Test Test4(struct Test A) {
+ return A;
+}
+
+int Test6() {
+ int B[200];
+ return B[4];
+}
+
+struct STest2 { int X; short Y[4]; double Z; };
+
+struct STest2 Test7(struct STest2 X) {
+ return X;
+}
diff --git a/test/FrontendC/2002-02-18-64bitConstant.c b/test/FrontendC/2002-02-18-64bitConstant.c
new file mode 100644
index 0000000..a88587a
--- /dev/null
+++ b/test/FrontendC/2002-02-18-64bitConstant.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* GCC wasn't handling 64 bit constants right fixed */
+
+#include <stdio.h>
+
+int main() {
+ long long Var = 123455678902ll;
+ printf("%lld\n", Var);
+}
diff --git a/test/FrontendC/2002-02-18-StaticData.c b/test/FrontendC/2002-02-18-StaticData.c
new file mode 100644
index 0000000..76cb0e6
--- /dev/null
+++ b/test/FrontendC/2002-02-18-StaticData.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+double FOO = 17;
+double BAR = 12.0;
+float XX = 12.0f;
+
+static char *procnames[] = {
+ "EXIT"
+};
+
+void *Data[] = { &FOO, &BAR, &XX };
+
diff --git a/test/FrontendC/2002-03-11-LargeCharInString.c b/test/FrontendC/2002-03-11-LargeCharInString.c
new file mode 100644
index 0000000..b383d03
--- /dev/null
+++ b/test/FrontendC/2002-03-11-LargeCharInString.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+#include <string.h>
+
+int test(char *X) {
+ /* LLVM-GCC used to emit:
+ %.LC0 = internal global [3 x sbyte] c"\1F\FFFFFF8B\00"
+ */
+ return strcmp(X, "\037\213");
+}
diff --git a/test/FrontendC/2002-03-12-ArrayInitialization.c b/test/FrontendC/2002-03-12-ArrayInitialization.c
new file mode 100644
index 0000000..1997a3c
--- /dev/null
+++ b/test/FrontendC/2002-03-12-ArrayInitialization.c
@@ -0,0 +1,19 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* GCC would generate bad code if not enough initializers are
+ specified for an array.
+ */
+
+int a[10] = { 0, 2};
+
+char str[10] = "x";
+
+void *Arr[5] = { 0, 0 };
+
+float F[12] = { 1.23f, 34.7f };
+
+struct Test { int X; double Y; };
+
+struct Test Array[10] = { { 2, 12.0 }, { 3, 24.0 } };
+
+int B[4][4] = { { 1, 2, 3, 4}, { 5, 6, 7 }, { 8, 9 } };
diff --git a/test/FrontendC/2002-03-12-StructInitialize.c b/test/FrontendC/2002-03-12-StructInitialize.c
new file mode 100644
index 0000000..9eb11e1
--- /dev/null
+++ b/test/FrontendC/2002-03-12-StructInitialize.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+typedef struct Connection_Type {
+ long to;
+ char type[10];
+ long length;
+} Connection;
+
+Connection link[3]
+= { {1, "link1", 10},
+ {2, "link2", 20},
+ {3, "link3", 30} };
+
diff --git a/test/FrontendC/2002-03-12-StructInitializer.c b/test/FrontendC/2002-03-12-StructInitializer.c
new file mode 100644
index 0000000..fa333b7
--- /dev/null
+++ b/test/FrontendC/2002-03-12-StructInitializer.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* GCC was not emitting string constants of the correct length when
+ * embedded into a structure field like this. It thought the strlength
+ * was -1.
+ */
+
+typedef struct Connection_Type {
+ long to;
+ char type[10];
+ long length;
+} Connection;
+
+Connection link[3]
+= { {1, "link1", 10},
+ {2, "link2", 20},
+ {3, "link3", 30} };
+
diff --git a/test/FrontendC/2002-03-14-BrokenPHINode.c b/test/FrontendC/2002-03-14-BrokenPHINode.c
new file mode 100644
index 0000000..48d9ab7
--- /dev/null
+++ b/test/FrontendC/2002-03-14-BrokenPHINode.c
@@ -0,0 +1,19 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* GCC was generating PHI nodes with an arity < #pred of the basic block the
+ * PHI node lived in. This was breaking LLVM because the number of entries
+ * in a PHI node must equal the number of predecessors for a basic block.
+ */
+
+int trys(char *s, int x)
+{
+ int asa;
+ double Val;
+ int LLS;
+ if (x) {
+ asa = LLS + asa;
+ } else {
+ }
+ return asa+(int)Val;
+}
+
diff --git a/test/FrontendC/2002-03-14-BrokenSSA.c b/test/FrontendC/2002-03-14-BrokenSSA.c
new file mode 100644
index 0000000..9dc674a
--- /dev/null
+++ b/test/FrontendC/2002-03-14-BrokenSSA.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* This code used to break GCC's SSA computation code. It would create
+ uses of B & C that are not dominated by their definitions. See:
+ http://gcc.gnu.org/ml/gcc/2002-03/msg00697.html
+ */
+int bar();
+int foo()
+{
+ int a,b,c;
+
+ a = b + c;
+ b = bar();
+ c = bar();
+ return a + b + c;
+}
+
diff --git a/test/FrontendC/2002-03-14-QuotesInStrConst.c b/test/FrontendC/2002-03-14-QuotesInStrConst.c
new file mode 100644
index 0000000..63eaeef
--- /dev/null
+++ b/test/FrontendC/2002-03-14-QuotesInStrConst.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* GCC was not escaping quotes in string constants correctly, so this would
+ * get emitted:
+ * %.LC1 = internal global [32 x sbyte] c"*** Word "%s" on line %d is not\00"
+ */
+
+const char *Foo() {
+ return "*** Word \"%s\" on line %d is not";
+}
diff --git a/test/FrontendC/2002-04-07-SwitchStmt.c b/test/FrontendC/2002-04-07-SwitchStmt.c
new file mode 100644
index 0000000..33e9c3d
--- /dev/null
+++ b/test/FrontendC/2002-04-07-SwitchStmt.c
@@ -0,0 +1,22 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+int printf(const char *, ...);
+int foo();
+
+int main() {
+ while (foo()) {
+ switch (foo()) {
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ printf("3");
+ case 4: printf("4");
+ case 5:
+ case 6:
+ default:
+ break;
+ }
+ }
+ return 0;
+}
diff --git a/test/FrontendC/2002-04-08-LocalArray.c b/test/FrontendC/2002-04-08-LocalArray.c
new file mode 100644
index 0000000..1dc51a0
--- /dev/null
+++ b/test/FrontendC/2002-04-08-LocalArray.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* GCC is not outputting the static array to the LLVM backend, so bad things
+ * happen. Note that if this is defined static, everything seems fine.
+ */
+double test(unsigned X) {
+ double student_t[30]={0.0 , 12.706 , 4.303 , 3.182 , 2.776 , 2.571 ,
+ 2.447 , 2.365 , 2.306 , 2.262 , 2.228 ,
+ 2.201 , 2.179 , 2.160 , 2.145 , 2.131 ,
+ 2.120 , 2.110 , 2.101 , 2.093 , 2.086 ,
+ 2.080 , 2.074 , 2.069 , 2.064 , 2.060 ,
+ 2.056 , 2.052 , 2.048 , 2.045 };
+ return student_t[X];
+}
diff --git a/test/FrontendC/2002-04-09-StructRetVal.c b/test/FrontendC/2002-04-09-StructRetVal.c
new file mode 100644
index 0000000..de3b6fc
--- /dev/null
+++ b/test/FrontendC/2002-04-09-StructRetVal.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct S {
+ int i;
+ short s1, s2;
+};
+
+struct S func_returning_struct(void);
+
+void loop(void) {
+ func_returning_struct();
+}
diff --git a/test/FrontendC/2002-04-10-StructParameters.c b/test/FrontendC/2002-04-10-StructParameters.c
new file mode 100644
index 0000000..aaaba2a
--- /dev/null
+++ b/test/FrontendC/2002-04-10-StructParameters.c
@@ -0,0 +1,25 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+typedef struct {
+ char p;
+ short q;
+ char r;
+ int X;
+ short Y, Z;
+ int Q;
+} foo;
+
+int test(foo X, float);
+int testE(char,short,char,int,int,float);
+void test3(foo *X) {
+ X->q = 1;
+}
+
+void test2(foo Y) {
+ testE(Y.p, Y.q, Y.r, Y.X, Y.Y, 0.1f);
+ test(Y, 0.1f);
+ test2(Y);
+ test3(&Y);
+}
+
diff --git a/test/FrontendC/2002-05-23-StaticValues.c b/test/FrontendC/2002-05-23-StaticValues.c
new file mode 100644
index 0000000..a5753b9
--- /dev/null
+++ b/test/FrontendC/2002-05-23-StaticValues.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* Make sure the frontend is correctly marking static stuff as internal! */
+
+int X;
+static int Y = 12;
+
+static void foo(int Z) {
+ Y = Z;
+}
+
+void *test() {
+ foo(12);
+ return &Y;
+}
diff --git a/test/FrontendC/2002-05-23-TypeNameCollision.c b/test/FrontendC/2002-05-23-TypeNameCollision.c
new file mode 100644
index 0000000..25d1149
--- /dev/null
+++ b/test/FrontendC/2002-05-23-TypeNameCollision.c
@@ -0,0 +1,19 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* Testcase for when struct tag conflicts with typedef name... grr */
+
+typedef struct foo {
+ struct foo *X;
+ int Y;
+} * foo;
+
+foo F1;
+struct foo *F2;
+
+enum bar { test1, test2 };
+
+typedef float bar;
+
+enum bar B1;
+bar B2;
+
diff --git a/test/FrontendC/2002-05-24-Alloca.c b/test/FrontendC/2002-05-24-Alloca.c
new file mode 100644
index 0000000..128bc8b
--- /dev/null
+++ b/test/FrontendC/2002-05-24-Alloca.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int main(int argc, char **argv) {
+ char *C = (char*)alloca(argc);
+ strcpy(C, argv[0]);
+ puts(C);
+}
diff --git a/test/FrontendC/2002-06-25-FWriteInterfaceFailure.c b/test/FrontendC/2002-06-25-FWriteInterfaceFailure.c
new file mode 100644
index 0000000..4380dc7
--- /dev/null
+++ b/test/FrontendC/2002-06-25-FWriteInterfaceFailure.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+#include <stdio.h>
+
+void test() {
+ fprintf(stderr, "testing\n");
+}
diff --git a/test/FrontendC/2002-07-14-MiscListTests.c b/test/FrontendC/2002-07-14-MiscListTests.c
new file mode 100644
index 0000000..4a5459a
--- /dev/null
+++ b/test/FrontendC/2002-07-14-MiscListTests.c
@@ -0,0 +1,71 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+// Test list stuff
+
+void *malloc(unsigned);
+
+// Test opaque structure support. the list type is defined later
+struct list;
+
+struct list *PassThroughList(struct list *L) {
+ return L;
+}
+
+
+// Recursive data structure tests...
+
+typedef struct list {
+ int Data;
+ struct list *Next;
+} list;
+
+list *Data;
+
+void foo() {
+ static int Foo = 0; // Test static local variable
+ Foo += 1; // Increment static variable
+
+ Data = (list*)malloc(12); // This is not a proper list allocation
+}
+
+extern list ListNode1;
+list ListNode3 = { 4, 0 };
+list ListNode2 = { 3, &ListNode3 };
+list ListNode0 = { 1, &ListNode1 };
+list ListNode1 = { 2, &ListNode2 };
+
+
+list ListArray[10];
+
+// Iterative insert fn
+void InsertIntoListTail(list **L, int Data) {
+ while (*L)
+ L = &(*L)->Next;
+ *L = (list*)malloc(sizeof(list));
+ (*L)->Data = Data;
+ (*L)->Next = 0;
+}
+
+// Recursive list search fn
+list *FindData(list *L, int Data) {
+ if (L == 0) return 0;
+ if (L->Data == Data) return L;
+ return FindData(L->Next, Data);
+}
+
+void foundIt(void);
+
+// Driver fn...
+void DoListStuff() {
+ list *MyList = 0;
+ InsertIntoListTail(&MyList, 100);
+ InsertIntoListTail(&MyList, 12);
+ InsertIntoListTail(&MyList, 42);
+ InsertIntoListTail(&MyList, 1123);
+ InsertIntoListTail(&MyList, 1213);
+
+ if (FindData(MyList, 75)) foundIt();
+ if (FindData(MyList, 42)) foundIt();
+ if (FindData(MyList, 700)) foundIt();
+}
+
diff --git a/test/FrontendC/2002-07-14-MiscTests.c b/test/FrontendC/2002-07-14-MiscTests.c
new file mode 100644
index 0000000..57c4120
--- /dev/null
+++ b/test/FrontendC/2002-07-14-MiscTests.c
@@ -0,0 +1,57 @@
+// RUN: %llvmgcc -w -S %s -o - | llvm-as -o /dev/null
+
+/* These are random tests that I used when working on the GCC frontend
+ originally. */
+
+// test floating point comparison!
+int floatcomptest(double *X, double *Y, float *x, float *y) {
+ return *X < *Y || *x < *y;
+}
+
+extern void *malloc(unsigned);
+
+// Exposed a bug
+void *memset_impl(void *dstpp, int c, unsigned len) {
+ long long int dstp = (long long int) dstpp;
+
+ while (dstp % 4 != 0)
+ {
+ ((unsigned char *) dstp)[0] = c;
+ dstp += 1;
+ len -= 1;
+ }
+ return dstpp;
+}
+
+// TEST problem with signed/unsigned versions of the same constants being shared
+// incorrectly!
+//
+static char *temp;
+static int remaining;
+static char *localmalloc(int size) {
+ char *blah;
+
+ if (size>remaining)
+ {
+ temp = (char *) malloc(32768);
+ remaining = 32768;
+ return temp;
+ }
+ return 0;
+}
+
+typedef struct { double X; double Y; int Z; } PBVTest;
+
+PBVTest testRetStruct(float X, double Y, int Z) {
+ PBVTest T = { X, Y, Z };
+ return T;
+}
+PBVTest testRetStruct2(void); // external func no inlining
+
+
+double CallRetStruct(float X, double Y, int Z) {
+ PBVTest T = testRetStruct2();
+ return T.X+X+Y+Z;
+}
+
+
diff --git a/test/FrontendC/2002-07-14-MiscTests2.c b/test/FrontendC/2002-07-14-MiscTests2.c
new file mode 100644
index 0000000..f2c7c81
--- /dev/null
+++ b/test/FrontendC/2002-07-14-MiscTests2.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+// Test ?: in function calls
+extern fp(int, char*);
+char *Ext;
+void
+__bb_exit_func (void)
+{
+ fp (12, Ext ? Ext : "<none>");
+}
+
+
diff --git a/test/FrontendC/2002-07-14-MiscTests3.c b/test/FrontendC/2002-07-14-MiscTests3.c
new file mode 100644
index 0000000..7ef7e23
--- /dev/null
+++ b/test/FrontendC/2002-07-14-MiscTests3.c
@@ -0,0 +1,187 @@
+// RUN: %llvmgcc -w -S %s -o - | llvm-as -o /dev/null
+
+
+
+void *malloc(unsigned);
+
+//#include <stdio.h>
+int puts(const char *s);
+
+struct FunStructTest {
+ int Test1;
+ char *Pointer;
+ int Array[12];
+};
+
+struct SubStruct {
+ short X, Y;
+};
+
+struct Quad {
+ int w;
+ struct SubStruct SS;
+ struct SubStruct *SSP;
+ char c;
+ int y;
+};
+
+struct Quad GlobalQuad = { 4, {1, 2}, 0, 3, 156 };
+
+typedef int (*FuncPtr)(int);
+
+unsigned PtrFunc(int (*Func)(int), int X) {
+ return Func(X);
+}
+
+char PtrFunc2(FuncPtr FuncTab[30], int Num) {
+ return FuncTab[Num]('b');
+}
+
+extern char SmallArgs2(char w, char x, long long Zrrk, char y, char z);
+extern int SomeFunc(void);
+char SmallArgs(char w, char x, char y, char z) {
+ SomeFunc();
+ return SmallArgs2(w-1, x+1, y, z, w);
+}
+
+static int F0(struct Quad Q, int i) { /* Pass Q by value */
+ struct Quad R;
+ if (i) R.SS = Q.SS;
+ Q.SSP = &R.SS;
+ Q.w = Q.y = Q.c = 1;
+ return Q.SS.Y + i + R.y - Q.c;
+}
+
+int F1(struct Quad *Q, int i) { /* Pass Q by address */
+ struct Quad R;
+#if 0
+ if (i) R.SS = Q->SS;
+#else
+ if (i) R = *Q;
+#endif
+ Q->w = Q->y = Q->c = 1;
+ return Q->SS.Y+i+R.y-Q->c;
+}
+
+
+int BadFunc(float Val) {
+ int Result;
+ if (Val > 12.345) Result = 4;
+ return Result; /* Test use of undefined value */
+}
+
+int RealFunc(void) {
+ return SomeUndefinedFunction(1, 4, 5);
+}
+
+extern int EF1(int *, char *, int *);
+
+int Func(int Param, long long Param2) {
+ int Result = Param;
+
+ {{{{
+ char c; int X;
+ EF1(&Result, &c, &X);
+ }}}
+
+ { // c & X are duplicate names!
+ char c; int X;
+ EF1(&Result, &c, &X);
+ }
+
+ }
+ return Result;
+}
+
+
+short FunFunc(long long x, char z) {
+ return x+z;
+}
+
+unsigned castTest(int X) { return X; }
+
+double TestAdd(double X, float Y) {
+ return X+Y+.5;
+}
+
+int func(int i, int j) {
+ while (i != 20)
+ i += 2;
+
+ j += func(2, i);
+ return (i * 3 + j*2)*j;
+}
+
+int SumArray(int Array[], int Num) {
+ int i, Result = 0;
+ for (i = 0; i < Num; ++i)
+ Result += Array[i];
+
+ return Result;
+}
+
+int ArrayParam(int Values[100]) {
+ return EF1((int*)Values[50], (char*)1, &Values[50]);
+}
+
+int ArrayToSum(void) {
+ int A[100], i;
+ for (i = 0; i < 100; ++i)
+ A[i] = i*4;
+
+ return A[A[0]]; //SumArray(A, 100);
+}
+
+
+int ExternFunc(long long, unsigned*, short, unsigned char);
+
+int main(int argc, char *argv[]) {
+ unsigned i;
+ puts("Hello world!\n");
+
+ ExternFunc(-1, 0, (short)argc, 2);
+ //func(argc, argc);
+
+ for (i = 0; i < 10; i++)
+ puts(argv[3]);
+ return 0;
+}
+
+double MathFunc(double X, double Y, double Z,
+ double AA, double BB, double CC, double DD,
+ double EE, double FF, double GG, double HH,
+ double aAA, double aBB, double aCC, double aDD,
+ double aEE, double aFF) {
+ return X + Y + Z + AA + BB + CC + DD + EE + FF + GG + HH
+ + aAA + aBB + aCC + aDD + aEE + aFF;
+}
+
+
+
+void strcpy(char *s1, char *s2) {
+ while (*s1++ = *s2++);
+}
+
+void strcat(char *s1, char *s2) {
+ while (*s1++);
+ s1--;
+ while (*s1++ = *s2++);
+}
+
+int strcmp(char *s1, char *s2) {
+ while (*s1++ == *s2++);
+ if (*s1 == 0) {
+ if (*s2 == 0) {
+ return 0;
+ } else {
+ return -1;
+ }
+ } else {
+ if (*s2 == 0) {
+ return 1;
+ } else {
+ return (*(--s1) - *(--s2));
+ }
+ }
+}
+
diff --git a/test/FrontendC/2002-07-16-HardStringInit.c b/test/FrontendC/2002-07-16-HardStringInit.c
new file mode 100644
index 0000000..2785e51
--- /dev/null
+++ b/test/FrontendC/2002-07-16-HardStringInit.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+ char auto_kibitz_list[100][20] = {
+ {"diepx"},
+ {"ferret"},
+ {"knightc"},
+ {"knightcap"}};
+
diff --git a/test/FrontendC/2002-07-17-StringConstant.c b/test/FrontendC/2002-07-17-StringConstant.c
new file mode 100644
index 0000000..9ba0c25
--- /dev/null
+++ b/test/FrontendC/2002-07-17-StringConstant.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+char * foo() { return "\\begin{"; }
diff --git a/test/FrontendC/2002-07-29-Casts.c b/test/FrontendC/2002-07-29-Casts.c
new file mode 100644
index 0000000..44bb610
--- /dev/null
+++ b/test/FrontendC/2002-07-29-Casts.c
@@ -0,0 +1,86 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <sys/types.h>
+
+int
+main(int argc, char** argv)
+{
+ char c1;
+ short s1, ssf1, ssd1;
+ unsigned char ubs0;
+ signed char bs0;
+ unsigned char ubc0, uc2;
+ unsigned short us2, usf1, usd1;
+ int ic3, is3, sif1, sid1;
+ unsigned int uic4, uis4, uif1, uid1;
+ long slf1, sld1;
+ unsigned long ulf1, uld1;
+ float f1;
+ double d1;
+
+ /* Test integer to integer conversions */
+
+ c1 = (char) (argc >= 2)? atoi(argv[1]) : 0xff64; /* 100 = 'd' */
+ s1 = (short) (argc >= 3)? atoi(argv[2]) : -769; /* 0xf7ff = -769 */
+
+ ubc0 = (unsigned char) c1; /* 100 = 'd' */
+ ubs0 = (unsigned char) s1; /* 0xff = 255 */
+ bs0 = (signed char) s1; /* 0xff = -1 */
+
+ uc2 = (unsigned char) c1; /* 100 = 'd' */
+ us2 = (unsigned short) s1; /* 0xf7ff = 64767 */
+
+ ic3 = (int) c1; /* 100 = 'd' */
+ is3 = (int) s1; /* 0xfffff7ff = -769 */
+
+ uic4 = (unsigned int) c1; /* 100 = 'd' */
+ uis4 = (unsigned int) s1; /* 0xfffff7ff = 4294966527 */
+
+ printf("ubc0 = '%c'\n", ubc0);
+ printf("ubs0 = %u\n", ubs0);
+ printf("bs0 = %d\n", bs0);
+ printf("c1 = '%c'\n", c1);
+ printf("s1 = %d\n", s1);
+ printf("uc2 = '%c'\n", uc2);
+ printf("us2 = %u\n", us2);
+ printf("ic3 = '%c'\n", ic3);
+ printf("is3 = %d\n", is3);
+ printf("uic4 = '%c'\n", uic4);
+ printf("uis4 = %u\n", uis4);
+
+ /* Test floating-point to integer conversions */
+ f1 = (float) (argc >= 4)? atof(argv[3]) : 1.0;
+ d1 = (argc >= 5)? atof(argv[4]) : 2.0;
+
+ usf1 = (unsigned short) f1;
+ usd1 = (unsigned short) d1;
+ uif1 = (unsigned int) f1;
+ uid1 = (unsigned int) d1;
+ ulf1 = (unsigned long) f1;
+ uld1 = (unsigned long) d1;
+
+ ssf1 = (short) f1;
+ ssd1 = (short) d1;
+ sif1 = (int) f1;
+ sid1 = (int) d1;
+ slf1 = (long) f1;
+ sld1 = (long) d1;
+
+ printf("usf1 = %u\n", usf1);
+ printf("usd1 = %u\n", usd1);
+ printf("uif1 = %u\n", uif1);
+ printf("uid1 = %u\n", uid1);
+ printf("ulf1 = %u\n", ulf1);
+ printf("uld1 = %u\n", uld1);
+
+ printf("ssf1 = %d\n", ssf1);
+ printf("ssd1 = %d\n", ssd1);
+ printf("sif1 = %d\n", sif1);
+ printf("sid1 = %d\n", sid1);
+ printf("slf1 = %d\n", slf1);
+ printf("sld1 = %d\n", sld1);
+
+ return 0;
+}
diff --git a/test/FrontendC/2002-07-30-SubregSetAssertion.c b/test/FrontendC/2002-07-30-SubregSetAssertion.c
new file mode 100644
index 0000000..af72eda
--- /dev/null
+++ b/test/FrontendC/2002-07-30-SubregSetAssertion.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+union X {
+ void *B;
+};
+
+union X foo() {
+ union X A;
+ A.B = (void*)123;
+ return A;
+}
diff --git a/test/FrontendC/2002-07-30-UnionTest.c b/test/FrontendC/2002-07-30-UnionTest.c
new file mode 100644
index 0000000..c931b80
--- /dev/null
+++ b/test/FrontendC/2002-07-30-UnionTest.c
@@ -0,0 +1,22 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+union X;
+struct Empty {};
+union F {};
+union Q { union Q *X; };
+union X {
+ char C;
+ int A, Z;
+ long long B;
+ void *b1;
+ struct { int A; long long Z; } Q;
+};
+
+union X foo(union X A) {
+ A.C = 123;
+ A.A = 39249;
+ //A.B = (void*)123040123321;
+ A.B = 12301230123123LL;
+ A.Z = 1;
+ return A;
+}
diff --git a/test/FrontendC/2002-07-30-VarArgsCallFailure.c b/test/FrontendC/2002-07-30-VarArgsCallFailure.c
new file mode 100644
index 0000000..5d93947
--- /dev/null
+++ b/test/FrontendC/2002-07-30-VarArgsCallFailure.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+int tcount;
+void test(char *, const char*, int);
+void foo() {
+ char Buf[10];
+ test(Buf, "n%%%d", tcount++);
+}
diff --git a/test/FrontendC/2002-07-31-BadAssert.c b/test/FrontendC/2002-07-31-BadAssert.c
new file mode 100644
index 0000000..5c3d74c
--- /dev/null
+++ b/test/FrontendC/2002-07-31-BadAssert.c
@@ -0,0 +1,16 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+typedef struct
+{
+ unsigned char type; /* Indicates, NORMAL, SUBNORMAL, etc. */
+} InternalFPF;
+
+
+static void SetInternalFPFZero(InternalFPF *dest) {
+ dest->type=0;
+}
+
+void denormalize(InternalFPF *ptr) {
+ SetInternalFPFZero(ptr);
+}
+
diff --git a/test/FrontendC/2002-07-31-SubregFailure.c b/test/FrontendC/2002-07-31-SubregFailure.c
new file mode 100644
index 0000000..72fcb49
--- /dev/null
+++ b/test/FrontendC/2002-07-31-SubregFailure.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+typedef union {
+ long (*ap)[4];
+} ptrs;
+
+void DoAssignIteration() {
+ ptrs abase;
+ abase.ap+=27;
+ Assignment(*abase.ap);
+}
+
+
diff --git a/test/FrontendC/2002-08-02-UnionTest.c b/test/FrontendC/2002-08-02-UnionTest.c
new file mode 100644
index 0000000..e2b8c3d
--- /dev/null
+++ b/test/FrontendC/2002-08-02-UnionTest.c
@@ -0,0 +1,19 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* In this testcase, the return value of foo() is being promotedto a register
+ * which breaks stuff
+ */
+#include <stdio.h>
+
+union X { char X; void *B; int a, b, c, d;};
+
+union X foo() {
+ union X Global;
+ Global.B = (void*)123; /* Interesting part */
+ return Global;
+}
+
+int main() {
+ union X test = foo();
+ printf("0x%p", test.B);
+}
diff --git a/test/FrontendC/2002-08-19-RecursiveLocals.c b/test/FrontendC/2002-08-19-RecursiveLocals.c
new file mode 100644
index 0000000..59220ac
--- /dev/null
+++ b/test/FrontendC/2002-08-19-RecursiveLocals.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* This testcase doesn't actually test a bug, it's just the result of me
+ * figuring out the syntax for forward declaring a static variable. */
+struct list {
+ int x;
+ struct list *Next;
+};
+
+static struct list B; /* Forward declare static */
+static struct list A = { 7, &B };
+static struct list B = { 8, &A };
+
+extern struct list D; /* forward declare normal var */
+
+struct list C = { 7, &D };
+struct list D = { 8, &C };
+
diff --git a/test/FrontendC/2002-09-08-PointerShifts.c b/test/FrontendC/2002-09-08-PointerShifts.c
new file mode 100644
index 0000000..86ff2f9
--- /dev/null
+++ b/test/FrontendC/2002-09-08-PointerShifts.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+int foo(int *A, unsigned X) {
+ return A[X];
+}
diff --git a/test/FrontendC/2002-09-18-UnionProblem.c b/test/FrontendC/2002-09-18-UnionProblem.c
new file mode 100644
index 0000000..54588f1
--- /dev/null
+++ b/test/FrontendC/2002-09-18-UnionProblem.c
@@ -0,0 +1,26 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+struct DWstruct {
+ char high, low;
+};
+
+typedef union {
+ struct DWstruct s;
+ short ll;
+} DWunion;
+
+short __udivmodhi4 (char n1, char bm) {
+ DWunion rr;
+
+ if (bm == 0)
+ {
+ rr.s.high = n1;
+ }
+ else
+ {
+ rr.s.high = bm;
+ }
+
+ return rr.ll;
+}
diff --git a/test/FrontendC/2002-09-19-StarInLabel.c b/test/FrontendC/2002-09-19-StarInLabel.c
new file mode 100644
index 0000000..171acca
--- /dev/null
+++ b/test/FrontendC/2002-09-19-StarInLabel.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+extern void start() __asm__("start");
+extern void _start() __asm__("_start");
+extern void __start() __asm__("__start");
+void start() {}
+void _start() {}
+void __start() {}
+
diff --git a/test/FrontendC/2002-10-12-TooManyArguments.c b/test/FrontendC/2002-10-12-TooManyArguments.c
new file mode 100644
index 0000000..73c267a
--- /dev/null
+++ b/test/FrontendC/2002-10-12-TooManyArguments.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+void foo() {}
+
+void bar() {
+ foo(1, 2, 3); /* Too many arguments passed */
+}
diff --git a/test/FrontendC/2002-12-15-GlobalBoolTest.c b/test/FrontendC/2002-12-15-GlobalBoolTest.c
new file mode 100644
index 0000000..c27a23a
--- /dev/null
+++ b/test/FrontendC/2002-12-15-GlobalBoolTest.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+_Bool X = 0;
+
diff --git a/test/FrontendC/2002-12-15-GlobalConstantTest.c b/test/FrontendC/2002-12-15-GlobalConstantTest.c
new file mode 100644
index 0000000..26de48f
--- /dev/null
+++ b/test/FrontendC/2002-12-15-GlobalConstantTest.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+const char *W = "foo";
+const int X = 7;
+int Y = 8;
+const char * const Z = "bar";
+
diff --git a/test/FrontendC/2002-12-15-GlobalRedefinition.c b/test/FrontendC/2002-12-15-GlobalRedefinition.c
new file mode 100644
index 0000000..3b76953
--- /dev/null
+++ b/test/FrontendC/2002-12-15-GlobalRedefinition.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+extern char algbrfile[9];
+char algbrfile[9] = "abcdefgh";
+
diff --git a/test/FrontendC/2002-12-15-StructParameters.c b/test/FrontendC/2002-12-15-StructParameters.c
new file mode 100644
index 0000000..90ab1ff
--- /dev/null
+++ b/test/FrontendC/2002-12-15-StructParameters.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+typedef struct
+{
+ void *stack;
+ unsigned size;
+ unsigned avail;
+} compile_stack_type;
+
+void foo(void*);
+void bar(compile_stack_type T, unsigned);
+
+void test() {
+ compile_stack_type CST;
+ foo(&CST);
+
+ bar(CST, 12);
+}
diff --git a/test/FrontendC/2003-01-30-UnionInit.c b/test/FrontendC/2003-01-30-UnionInit.c
new file mode 100644
index 0000000..5769584
--- /dev/null
+++ b/test/FrontendC/2003-01-30-UnionInit.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o /dev/null
+
+union foo {
+ struct { char A, B; } X;
+ int C;
+};
+
+union foo V = { {1, 2} };
diff --git a/test/FrontendC/2003-03-03-DeferredType.c b/test/FrontendC/2003-03-03-DeferredType.c
new file mode 100644
index 0000000..9e60df6
--- /dev/null
+++ b/test/FrontendC/2003-03-03-DeferredType.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+
+
+struct foo A;
+
+struct foo {
+ int x;
+double D;
+};
+
diff --git a/test/FrontendC/2003-06-22-UnionCrash.c b/test/FrontendC/2003-06-22-UnionCrash.c
new file mode 100644
index 0000000..54d8dc6
--- /dev/null
+++ b/test/FrontendC/2003-06-22-UnionCrash.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct Blend_Map_Entry {
+ union {
+ float Colour[5];
+ double Point_Slope[2];
+ } Vals;
+};
+
+void test(struct Blend_Map_Entry* Foo)
+{
+}
+
diff --git a/test/FrontendC/2003-06-23-GCC-fold-infinite-recursion.c b/test/FrontendC/2003-06-23-GCC-fold-infinite-recursion.c
new file mode 100644
index 0000000..80562c8
--- /dev/null
+++ b/test/FrontendC/2003-06-23-GCC-fold-infinite-recursion.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+double Test(double A, double B, double C, double D) {
+ return -(A-B) - (C-D);
+}
+
diff --git a/test/FrontendC/2003-06-26-CFECrash.c b/test/FrontendC/2003-06-26-CFECrash.c
new file mode 100644
index 0000000..10a7ed4
--- /dev/null
+++ b/test/FrontendC/2003-06-26-CFECrash.c
@@ -0,0 +1,19 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+typedef struct min_info {
+ long offset;
+ unsigned file_attr;
+} min_info;
+
+typedef struct Globals {
+ char answerbuf;
+ min_info info[1];
+ min_info *pInfo;
+} Uz_Globs;
+
+extern Uz_Globs G;
+
+int extract_or_test_files() {
+ G.pInfo = G.info;
+}
+
diff --git a/test/FrontendC/2003-06-29-MultipleFunctionDefinition.c b/test/FrontendC/2003-06-29-MultipleFunctionDefinition.c
new file mode 100644
index 0000000..be042ce
--- /dev/null
+++ b/test/FrontendC/2003-06-29-MultipleFunctionDefinition.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+/* This is apparently legal C.
+ */
+extern __inline__ void test() { }
+
+void test() {
+}
diff --git a/test/FrontendC/2003-07-22-ArrayAccessTypeSafety.c b/test/FrontendC/2003-07-22-ArrayAccessTypeSafety.c
new file mode 100644
index 0000000..51e66c9
--- /dev/null
+++ b/test/FrontendC/2003-07-22-ArrayAccessTypeSafety.c
@@ -0,0 +1,7 @@
+/* RUN: %llvmgcc -xc %s -S -o - | grep -v alloca | not grep bitcast
+ */
+
+void test(int* array, long long N) {
+ array[N] = N[array] = 33;
+}
+
diff --git a/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c b/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c
new file mode 100644
index 0000000..39412e5
--- /dev/null
+++ b/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c
@@ -0,0 +1,14 @@
+/* RUN: %llvmgcc -xc %s -c -o - | llvm-dis | not grep __builtin_
+ *
+ * __builtin_longjmp/setjmp should get transformed into llvm.setjmp/longjmp
+ * just like explicit setjmp/longjmp calls are.
+ */
+
+void jumpaway(int *ptr) {
+ __builtin_longjmp(ptr,1);
+}
+
+int main(void) {
+ __builtin_setjmp(0);
+ jumpaway(0);
+}
diff --git a/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c b/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c
new file mode 100644
index 0000000..c275fee
--- /dev/null
+++ b/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -xc %s -c -o %t.o
+
+int test(_Bool pos, _Bool color) {
+ return 0;
+ return (pos && color);
+}
+
diff --git a/test/FrontendC/2003-08-18-SigSetJmp.c b/test/FrontendC/2003-08-18-SigSetJmp.c
new file mode 100644
index 0000000..fc0d765
--- /dev/null
+++ b/test/FrontendC/2003-08-18-SigSetJmp.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+#include <setjmp.h>
+
+sigjmp_buf B;
+int foo() {
+ sigsetjmp(B, 1);
+ bar();
+}
diff --git a/test/FrontendC/2003-08-18-StructAsValue.c b/test/FrontendC/2003-08-18-StructAsValue.c
new file mode 100644
index 0000000..26cb78a
--- /dev/null
+++ b/test/FrontendC/2003-08-18-StructAsValue.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+typedef struct {
+ int op;
+} event_t;
+
+event_t test(int X) {
+ event_t foo = { 1 }, bar = { 2 };
+ return X ? foo : bar;
+}
diff --git a/test/FrontendC/2003-08-20-BadBitfieldRef.c b/test/FrontendC/2003-08-20-BadBitfieldRef.c
new file mode 100644
index 0000000..ef54d8a
--- /dev/null
+++ b/test/FrontendC/2003-08-20-BadBitfieldRef.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+void foo()
+{
+ char *ap;
+ ap[1] == '-' && ap[2] == 0;
+}
+
diff --git a/test/FrontendC/2003-08-20-PrototypeMismatch.c b/test/FrontendC/2003-08-20-PrototypeMismatch.c
new file mode 100644
index 0000000..85c89f6
--- /dev/null
+++ b/test/FrontendC/2003-08-20-PrototypeMismatch.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+
+static int foo(int);
+
+static int foo(C)
+char C;
+{
+ return C;
+}
+
+void test() {
+ foo(7);
+}
diff --git a/test/FrontendC/2003-08-20-vfork-bug.c b/test/FrontendC/2003-08-20-vfork-bug.c
new file mode 100644
index 0000000..cfe3161
--- /dev/null
+++ b/test/FrontendC/2003-08-20-vfork-bug.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+extern int vfork(void);
+test() {
+ vfork();
+}
diff --git a/test/FrontendC/2003-08-21-BinOp-Type-Mismatch.c b/test/FrontendC/2003-08-21-BinOp-Type-Mismatch.c
new file mode 100644
index 0000000..a1d4574
--- /dev/null
+++ b/test/FrontendC/2003-08-21-BinOp-Type-Mismatch.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct bar;
+
+void foo()
+{
+ unsigned int frame, focus;
+ (struct bar *) focus == (focus ? ((struct bar *) frame) : 0);
+}
+
diff --git a/test/FrontendC/2003-08-21-StmtExpr.c b/test/FrontendC/2003-08-21-StmtExpr.c
new file mode 100644
index 0000000..7f7d22e
--- /dev/null
+++ b/test/FrontendC/2003-08-21-StmtExpr.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+typedef struct {
+ unsigned long val;
+} structty;
+
+void bar(structty new_mask);
+static void foo() {
+ bar(({ structty mask; mask; }));
+}
+
diff --git a/test/FrontendC/2003-08-21-WideString.c b/test/FrontendC/2003-08-21-WideString.c
new file mode 100644
index 0000000..bf67a21
--- /dev/null
+++ b/test/FrontendC/2003-08-21-WideString.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+#include <wchar.h>
+
+struct {
+ wchar_t *name;
+} syms = { L"NUL" };
diff --git a/test/FrontendC/2003-08-23-LocalUnionTest.c b/test/FrontendC/2003-08-23-LocalUnionTest.c
new file mode 100644
index 0000000..987accc
--- /dev/null
+++ b/test/FrontendC/2003-08-23-LocalUnionTest.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+
+union foo { int X; };
+
+int test(union foo* F) {
+ {
+ union foo { float X; } A;
+ }
+}
diff --git a/test/FrontendC/2003-08-29-BitFieldStruct.c b/test/FrontendC/2003-08-29-BitFieldStruct.c
new file mode 100644
index 0000000..57273cd
--- /dev/null
+++ b/test/FrontendC/2003-08-29-BitFieldStruct.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct Word {
+ short bar;
+ short baz;
+ int final:1;
+ short quux;
+} *word_limit;
+
+void foo ()
+{
+ word_limit->final = (word_limit->final && word_limit->final);
+}
diff --git a/test/FrontendC/2003-08-29-HugeCharConst.c b/test/FrontendC/2003-08-29-HugeCharConst.c
new file mode 100644
index 0000000..236eb2e
--- /dev/null
+++ b/test/FrontendC/2003-08-29-HugeCharConst.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+void foo() {
+ unsigned char int_latin1[] = "f\200\372b\200\343\200\340";
+}
diff --git a/test/FrontendC/2003-08-29-StructLayoutBug.c b/test/FrontendC/2003-08-29-StructLayoutBug.c
new file mode 100644
index 0000000..1673194
--- /dev/null
+++ b/test/FrontendC/2003-08-29-StructLayoutBug.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct foo {
+ unsigned int I:1;
+ unsigned char J[1];
+ unsigned int K:1;
+ };
+
+void test(struct foo *X) {}
+
diff --git a/test/FrontendC/2003-08-30-AggregateInitializer.c b/test/FrontendC/2003-08-30-AggregateInitializer.c
new file mode 100644
index 0000000..58c77b6
--- /dev/null
+++ b/test/FrontendC/2003-08-30-AggregateInitializer.c
@@ -0,0 +1,16 @@
+// RUN: %llvmgcc -S %s -o /dev/null
+
+struct istruct {
+ unsigned char C;
+};
+
+struct foo {
+ unsigned int I:1;
+ struct istruct J;
+ unsigned char L[1];
+ unsigned int K:1;
+};
+
+struct foo F = { 1, { 7 }, { 123 } , 1 };
+
+
diff --git a/test/FrontendC/2003-08-30-LargeIntegerBitfieldMember.c b/test/FrontendC/2003-08-30-LargeIntegerBitfieldMember.c
new file mode 100644
index 0000000..e1ca88c
--- /dev/null
+++ b/test/FrontendC/2003-08-30-LargeIntegerBitfieldMember.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct foo {
+ unsigned int I:1;
+ unsigned char J[1][123];
+ unsigned int K:1;
+ };
+
+struct foo F;
diff --git a/test/FrontendC/2003-09-18-BitfieldTests.c b/test/FrontendC/2003-09-18-BitfieldTests.c
new file mode 100644
index 0000000..2d74cb4
--- /dev/null
+++ b/test/FrontendC/2003-09-18-BitfieldTests.c
@@ -0,0 +1,30 @@
+// RUN: %llvmgcc -w -S %s -o - | llvm-as -o /dev/null
+
+
+typedef struct BF {
+ int A : 1;
+ char B;
+ int C : 13;
+} BF;
+
+char *test1(BF *b) {
+ return &b->B; // Must be able to address non-bitfield
+}
+
+void test2(BF *b) { // Increment and decrement operators
+ b->A++;
+ --b->C;
+}
+
+void test3(BF *b) {
+ b->C = 12345; // Store
+}
+
+int test4(BF *b) {
+ return b->C; // Load
+}
+
+void test5(BF *b, int i) { // array ref
+ b[i].C = 12345;
+}
+
diff --git a/test/FrontendC/2003-09-30-StructLayout.c b/test/FrontendC/2003-09-30-StructLayout.c
new file mode 100644
index 0000000..177d1f4
--- /dev/null
+++ b/test/FrontendC/2003-09-30-StructLayout.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+enum En {
+ ENUM_VAL
+};
+
+struct St {
+ unsigned char A;
+ enum En B;
+ unsigned char C;
+ enum En D;
+ float E;
+};
+
+
+void func(struct St* A) {
+ A->D = ENUM_VAL;
+}
diff --git a/test/FrontendC/2003-10-02-UnionLValueError.c b/test/FrontendC/2003-10-02-UnionLValueError.c
new file mode 100644
index 0000000..a4d17a4
--- /dev/null
+++ b/test/FrontendC/2003-10-02-UnionLValueError.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+#include <stdio.h>
+
+union U{
+ int i[8];
+ char s[80];
+};
+
+void format_message(char *buffer, union U *u) {
+ sprintf(buffer, u->s);
+}
+
diff --git a/test/FrontendC/2003-10-06-NegateExprType.c b/test/FrontendC/2003-10-06-NegateExprType.c
new file mode 100644
index 0000000..fb8329b
--- /dev/null
+++ b/test/FrontendC/2003-10-06-NegateExprType.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+extern int A[10];
+void Func(int *B) {
+ B - &A[5];
+}
+
diff --git a/test/FrontendC/2003-10-09-UnionInitializerBug.c b/test/FrontendC/2003-10-09-UnionInitializerBug.c
new file mode 100644
index 0000000..57e113a
--- /dev/null
+++ b/test/FrontendC/2003-10-09-UnionInitializerBug.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct Foo {
+ unsigned a;
+ unsigned b;
+ unsigned c;
+};
+
+struct Bar {
+ union {
+ void **a;
+ struct Foo b;
+ }u;
+};
+
+struct Bar test = {0};
+
diff --git a/test/FrontendC/2003-10-28-ident.c b/test/FrontendC/2003-10-28-ident.c
new file mode 100644
index 0000000..06cacf8
--- /dev/null
+++ b/test/FrontendC/2003-10-28-ident.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+#ident "foo"
diff --git a/test/FrontendC/2003-10-29-AsmRename.c b/test/FrontendC/2003-10-29-AsmRename.c
new file mode 100644
index 0000000..d07ccf7
--- /dev/null
+++ b/test/FrontendC/2003-10-29-AsmRename.c
@@ -0,0 +1,22 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+struct foo { int X; };
+struct bar { int Y; };
+
+extern int Func(struct foo*) __asm__("Func64");
+extern int Func64(struct bar*);
+
+int Func(struct foo *F) {
+ return 1;
+}
+
+int Func64(struct bar* B) {
+ return 0;
+}
+
+
+int test() {
+ Func(0); /* should be renamed to call Func64 */
+ Func64(0);
+}
diff --git a/test/FrontendC/2003-11-01-C99-CompoundLiteral.c b/test/FrontendC/2003-11-01-C99-CompoundLiteral.c
new file mode 100644
index 0000000..2912c97
--- /dev/null
+++ b/test/FrontendC/2003-11-01-C99-CompoundLiteral.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+typedef struct { int foo; } spinlock_t;
+typedef struct wait_queue_head_t { spinlock_t lock; } wait_queue_head_t;
+void call_usermodehelper(void) {
+ struct wait_queue_head_t work = { lock: (spinlock_t) { 0 }, };
+}
+
diff --git a/test/FrontendC/2003-11-01-EmptyStructCrash.c b/test/FrontendC/2003-11-01-EmptyStructCrash.c
new file mode 100644
index 0000000..c116119
--- /dev/null
+++ b/test/FrontendC/2003-11-01-EmptyStructCrash.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+typedef struct { } the_coolest_struct_in_the_world;
+extern the_coolest_struct_in_the_world xyzzy;
+void *foo() { return &xyzzy; }
+
diff --git a/test/FrontendC/2003-11-01-GlobalUnionInit.c b/test/FrontendC/2003-11-01-GlobalUnionInit.c
new file mode 100644
index 0000000..7cd7073
--- /dev/null
+++ b/test/FrontendC/2003-11-01-GlobalUnionInit.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+union bdflush_param {
+ struct { int x; } b_un;
+ int y[1];
+} bdf_prm = {{30}};
+
diff --git a/test/FrontendC/2003-11-03-AddrArrayElement.c b/test/FrontendC/2003-11-03-AddrArrayElement.c
new file mode 100644
index 0000000..ed3fc1a
--- /dev/null
+++ b/test/FrontendC/2003-11-03-AddrArrayElement.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr
+
+// This should be turned into a tasty getelementptr instruction, not a nasty
+// series of casts and address arithmetic.
+
+char Global[100];
+
+char *test1(unsigned i) {
+ return &Global[i];
+}
+
diff --git a/test/FrontendC/2003-11-04-EmptyStruct.c b/test/FrontendC/2003-11-04-EmptyStruct.c
new file mode 100644
index 0000000..b4f37be
--- /dev/null
+++ b/test/FrontendC/2003-11-04-EmptyStruct.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+typedef struct { } rwlock_t;
+struct fs_struct { rwlock_t lock; int umask; };
+void __copy_fs_struct(struct fs_struct *fs) { fs->lock = (rwlock_t) { }; }
+
diff --git a/test/FrontendC/2003-11-04-OutOfMemory.c b/test/FrontendC/2003-11-04-OutOfMemory.c
new file mode 100644
index 0000000..40cb6c2
--- /dev/null
+++ b/test/FrontendC/2003-11-04-OutOfMemory.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+void schedule_timeout(signed long timeout)
+{
+ switch (timeout)
+ {
+ case ((long)(~0UL>>1)): break;
+ }
+}
diff --git a/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c b/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c
new file mode 100644
index 0000000..443dfbd
--- /dev/null
+++ b/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr
+
+char *test(char* C) {
+ return C-1; // Should turn into a GEP
+}
+
+int *test2(int* I) {
+ return I-1;
+}
diff --git a/test/FrontendC/2003-11-12-VoidString.c b/test/FrontendC/2003-11-12-VoidString.c
new file mode 100644
index 0000000..5770b36
--- /dev/null
+++ b/test/FrontendC/2003-11-12-VoidString.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+void query_newnamebuf(void) { ((void)"query_newnamebuf"); }
+
diff --git a/test/FrontendC/2003-11-13-TypeSafety.c b/test/FrontendC/2003-11-13-TypeSafety.c
new file mode 100644
index 0000000..128b767
--- /dev/null
+++ b/test/FrontendC/2003-11-13-TypeSafety.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr
+
+int *test(int *X, int Y) {
+ return X + Y;
+}
diff --git a/test/FrontendC/2003-11-16-StaticArrayInit.c b/test/FrontendC/2003-11-16-StaticArrayInit.c
new file mode 100644
index 0000000..eb83b3a
--- /dev/null
+++ b/test/FrontendC/2003-11-16-StaticArrayInit.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+void bar () {
+ static char x[10];
+ static char *xend = x + 10;
+}
+
+
diff --git a/test/FrontendC/2003-11-18-CondExprLValue.c b/test/FrontendC/2003-11-18-CondExprLValue.c
new file mode 100644
index 0000000..68ee622
--- /dev/null
+++ b/test/FrontendC/2003-11-18-CondExprLValue.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+typedef struct { unsigned long pgprot; } pgprot_t;
+
+void split_large_page(unsigned long addr, pgprot_t prot)
+{
+ (addr ? prot : ((pgprot_t) { 0x001 } )).pgprot;
+}
+
diff --git a/test/FrontendC/2003-11-19-AddressOfRegister.c b/test/FrontendC/2003-11-19-AddressOfRegister.c
new file mode 100644
index 0000000..69dc54d
--- /dev/null
+++ b/test/FrontendC/2003-11-19-AddressOfRegister.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -xc %s -S -o /dev/null |& not grep warning
+
+struct item {
+ short delta[4];
+};
+
+int TEST(int nt) {
+ register struct item *aa;
+ aa[nt].delta;
+ return 1;
+}
+
diff --git a/test/FrontendC/2003-11-19-BitFieldArray.c b/test/FrontendC/2003-11-19-BitFieldArray.c
new file mode 100644
index 0000000..250268a
--- /dev/null
+++ b/test/FrontendC/2003-11-19-BitFieldArray.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct _GIOChannel {
+ int write_buf;
+ char partial_write_buf[6];
+ int d :1;
+};
+
+void g_io_channel_init (struct _GIOChannel *channel) {
+ channel->partial_write_buf[0];
+}
+
diff --git a/test/FrontendC/2003-11-20-Bitfields.c b/test/FrontendC/2003-11-20-Bitfields.c
new file mode 100644
index 0000000..4be9942
--- /dev/null
+++ b/test/FrontendC/2003-11-20-Bitfields.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct face_cachel {
+ unsigned int reverse :1;
+ unsigned char font_specified[1];
+};
+
+void
+ensure_face_cachel_contains_charset (struct face_cachel *cachel) {
+ cachel->font_specified[0] = 0;
+}
+
diff --git a/test/FrontendC/2003-11-20-ComplexDivision.c b/test/FrontendC/2003-11-20-ComplexDivision.c
new file mode 100644
index 0000000..172de8c
--- /dev/null
+++ b/test/FrontendC/2003-11-20-ComplexDivision.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+int test() {
+ __complex__ double C;
+ double D;
+ C / D;
+}
diff --git a/test/FrontendC/2003-11-20-UnionBitfield.c b/test/FrontendC/2003-11-20-UnionBitfield.c
new file mode 100644
index 0000000..f999c20
--- /dev/null
+++ b/test/FrontendC/2003-11-20-UnionBitfield.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct printf_spec {
+ unsigned int minus_flag:1;
+ char converter;
+};
+
+void parse_doprnt_spec () {
+ struct printf_spec spec;
+ spec.minus_flag = 1;
+}
+
diff --git a/test/FrontendC/2003-11-26-PointerShift.c b/test/FrontendC/2003-11-26-PointerShift.c
new file mode 100644
index 0000000..6b5205a
--- /dev/null
+++ b/test/FrontendC/2003-11-26-PointerShift.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+unsigned long do_csum(const unsigned char *buff, int len, unsigned long result) {
+ if (2 & (unsigned long) buff) result += 1;
+ return result;
+}
diff --git a/test/FrontendC/2003-11-27-ConstructorCast.c b/test/FrontendC/2003-11-27-ConstructorCast.c
new file mode 100644
index 0000000..15eb769
--- /dev/null
+++ b/test/FrontendC/2003-11-27-ConstructorCast.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct i387_soft_struct {
+ long cwd;
+};
+union i387_union {
+ struct i387_soft_struct soft;
+};
+struct thread_struct {
+ union i387_union i387;
+};
+void _init_task_union(void) {
+ struct thread_struct thread = (struct thread_struct) { {{0}} };
+}
diff --git a/test/FrontendC/2003-11-27-UnionCtorInitialization.c b/test/FrontendC/2003-11-27-UnionCtorInitialization.c
new file mode 100644
index 0000000..e3ae1e9
--- /dev/null
+++ b/test/FrontendC/2003-11-27-UnionCtorInitialization.c
@@ -0,0 +1,16 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+struct i387_soft_struct {
+ long cwd;
+ long twd;
+ long fip;
+};
+union i387_union {
+ struct i387_soft_struct soft;
+};
+struct thread_struct {
+ union i387_union i387;
+};
+void _init_task_union(void) {
+ struct thread_struct thread = (struct thread_struct) { {{0}} };
+}
diff --git a/test/FrontendC/2003-12-14-ExternInlineSupport.c b/test/FrontendC/2003-12-14-ExternInlineSupport.c
new file mode 100644
index 0000000..510d1f8
--- /dev/null
+++ b/test/FrontendC/2003-12-14-ExternInlineSupport.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc -Os -xc %s -c -o - | llvm-dis | not grep dead_function
+
+extern __inline__ void dead_function() {}
diff --git a/test/FrontendC/2004-01-01-UnknownInitSize.c b/test/FrontendC/2004-01-01-UnknownInitSize.c
new file mode 100644
index 0000000..b26b6cd
--- /dev/null
+++ b/test/FrontendC/2004-01-01-UnknownInitSize.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S %s -o /dev/null
+
+/*
+ * This regression test ensures that the C front end can compile initializers
+ * even when it cannot determine the size (as below).
+*/
+struct one
+{
+ int a;
+ int values [];
+};
+
+struct one hobbit = {5, {1, 2, 3}};
+
diff --git a/test/FrontendC/2004-01-08-ExternInlineRedefine.c b/test/FrontendC/2004-01-08-ExternInlineRedefine.c
new file mode 100644
index 0000000..4366b9b
--- /dev/null
+++ b/test/FrontendC/2004-01-08-ExternInlineRedefine.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+extern __inline long int
+__strtol_l (int a)
+{
+ return 0;
+}
+
+long int
+__strtol_l (int a)
+{
+ return 0;
+}
diff --git a/test/FrontendC/2004-02-12-LargeAggregateCopy.c b/test/FrontendC/2004-02-12-LargeAggregateCopy.c
new file mode 100644
index 0000000..b3c9bcf
--- /dev/null
+++ b/test/FrontendC/2004-02-12-LargeAggregateCopy.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memcpy
+
+struct X { int V[10000]; };
+struct X Global1, Global2;
+void test() {
+ Global2 = Global1;
+}
+
diff --git a/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c b/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c
new file mode 100644
index 0000000..162d32a
--- /dev/null
+++ b/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.*address | count 4
+
+void *test1() {
+ return __builtin_return_address(1);
+}
+void *test2() {
+ return __builtin_frame_address(0);
+}
diff --git a/test/FrontendC/2004-02-13-IllegalVararg.c b/test/FrontendC/2004-02-13-IllegalVararg.c
new file mode 100644
index 0000000..21039c6
--- /dev/null
+++ b/test/FrontendC/2004-02-13-IllegalVararg.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -xc %s -w -c -o - | llc
+// XFAIL: *
+// See PR2452
+
+#include <stdarg.h>
+
+float test(int X, ...) {
+ va_list ap;
+ float F;
+ va_start(ap, X);
+ F = va_arg(ap, float);
+ return F;
+}
diff --git a/test/FrontendC/2004-02-13-Memset.c b/test/FrontendC/2004-02-13-Memset.c
new file mode 100644
index 0000000..fc26051
--- /dev/null
+++ b/test/FrontendC/2004-02-13-Memset.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memset | count 3
+
+void *memset(void*, int, long);
+void bzero(void*, long);
+
+void test(int* X, char *Y) {
+ memset(X, 4, 1000);
+ bzero(Y, 100);
+}
diff --git a/test/FrontendC/2004-02-14-ZeroInitializer.c b/test/FrontendC/2004-02-14-ZeroInitializer.c
new file mode 100644
index 0000000..bede907
--- /dev/null
+++ b/test/FrontendC/2004-02-14-ZeroInitializer.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -xc %s -S -o - | grep zeroinitializer
+
+int X[1000];
+
diff --git a/test/FrontendC/2004-02-20-Builtins.c b/test/FrontendC/2004-02-20-Builtins.c
new file mode 100644
index 0000000..0c9ac7c
--- /dev/null
+++ b/test/FrontendC/2004-02-20-Builtins.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -O3 -xc %s -c -o - | llvm-dis | not grep builtin
+
+#include <math.h>
+
+void zsqrtxxx(float num) {
+ num = sqrt(num);
+}
+
diff --git a/test/FrontendC/2004-03-07-ComplexDivEquals.c b/test/FrontendC/2004-03-07-ComplexDivEquals.c
new file mode 100644
index 0000000..c6c805a
--- /dev/null
+++ b/test/FrontendC/2004-03-07-ComplexDivEquals.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+void test(__complex__ double D, double X) {
+ D /= X;
+}
diff --git a/test/FrontendC/2004-03-07-ExternalConstant.c b/test/FrontendC/2004-03-07-ExternalConstant.c
new file mode 100644
index 0000000..b8e13a3
--- /dev/null
+++ b/test/FrontendC/2004-03-07-ExternalConstant.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep constant
+
+extern const int a[]; // 'a' should be marked constant even though it's external!
+int foo () {
+ return a[0];
+}
+
diff --git a/test/FrontendC/2004-03-09-LargeArrayInitializers.c b/test/FrontendC/2004-03-09-LargeArrayInitializers.c
new file mode 100644
index 0000000..265206f
--- /dev/null
+++ b/test/FrontendC/2004-03-09-LargeArrayInitializers.c
@@ -0,0 +1,32 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+// Test that these initializers are handled efficiently
+
+int test(int x) {
+ const int XX[1000] = { 0, 0 };
+ const char S [1000] = "foo";
+
+ const int array[] = {
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ 17, 23, 123, 123, 49, 17, 23, 123, 123, 49, 17, 23, 123, 123, 49,
+ };
+ return array[x];
+}
diff --git a/test/FrontendC/2004-03-15-SimpleIndirectGoto.c b/test/FrontendC/2004-03-15-SimpleIndirectGoto.c
new file mode 100644
index 0000000..a3f27b2
--- /dev/null
+++ b/test/FrontendC/2004-03-15-SimpleIndirectGoto.c
@@ -0,0 +1,23 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+int code[]={0,0,0,0,1};
+void foo(int x) {
+ volatile int b;
+ b = 0xffffffff;
+}
+void bar(int *pc) {
+ static const void *l[] = {&&lab0, &&end};
+
+ foo(0);
+ goto *l[*pc];
+ lab0:
+ foo(0);
+ pc++;
+ goto *l[*pc];
+ end:
+ return;
+}
+int main() {
+ bar(code);
+ return 0;
+}
diff --git a/test/FrontendC/2004-03-16-AsmRegisterCrash.c b/test/FrontendC/2004-03-16-AsmRegisterCrash.c
new file mode 100644
index 0000000..f13368c
--- /dev/null
+++ b/test/FrontendC/2004-03-16-AsmRegisterCrash.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+int foo() {
+#ifdef __ppc__
+ register int X __asm__("r1");
+#else
+ register int X __asm__("ebx");
+#endif
+ return X;
+}
diff --git a/test/FrontendC/2004-05-07-VarArrays.c b/test/FrontendC/2004-05-07-VarArrays.c
new file mode 100644
index 0000000..3a39c4f
--- /dev/null
+++ b/test/FrontendC/2004-05-07-VarArrays.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+int foo(int len, char arr[][len], int X) {
+ return arr[X][0];
+}
diff --git a/test/FrontendC/2004-05-21-IncompleteEnum.c b/test/FrontendC/2004-05-21-IncompleteEnum.c
new file mode 100644
index 0000000..958a8d1
--- /dev/null
+++ b/test/FrontendC/2004-05-21-IncompleteEnum.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc -w -S %s -o - | llvm-as -o /dev/null
+
+void test(enum foo *X) {
+}
+
diff --git a/test/FrontendC/2004-06-08-OpaqueStructArg.c b/test/FrontendC/2004-06-08-OpaqueStructArg.c
new file mode 100644
index 0000000..5dfdd83
--- /dev/null
+++ b/test/FrontendC/2004-06-08-OpaqueStructArg.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+ struct fu;
+ void foo(struct fu);
+ void bar() {
+ foo;
+ }
diff --git a/test/FrontendC/2004-06-17-UnorderedBuiltins.c b/test/FrontendC/2004-06-17-UnorderedBuiltins.c
new file mode 100644
index 0000000..02780f0
--- /dev/null
+++ b/test/FrontendC/2004-06-17-UnorderedBuiltins.c
@@ -0,0 +1,24 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+_Bool A, B, C, D, E, F, G, H;
+void TestF(float X, float Y) {
+ A = __builtin_isgreater(X, Y);
+ B = __builtin_isgreaterequal(X, Y);
+ C = __builtin_isless(X, Y);
+ D = __builtin_islessequal(X, Y);
+ E = __builtin_islessgreater(X, Y);
+ F = __builtin_isunordered(X, Y);
+ //G = __builtin_isordered(X, Y); // Our current snapshot of GCC doesn't include this builtin
+ H = __builtin_isunordered(X, Y);
+}
+void TestD(double X, double Y) {
+ A = __builtin_isgreater(X, Y);
+ B = __builtin_isgreaterequal(X, Y);
+ C = __builtin_isless(X, Y);
+ D = __builtin_islessequal(X, Y);
+ E = __builtin_islessgreater(X, Y);
+ F = __builtin_isunordered(X, Y);
+ //G = __builtin_isordered(X, Y); // Our current snapshot doesn't include this builtin. FIXME
+ H = __builtin_isunordered(X, Y);
+}
diff --git a/test/FrontendC/2004-06-17-UnorderedCompares.c b/test/FrontendC/2004-06-17-UnorderedCompares.c
new file mode 100644
index 0000000..f91ed66
--- /dev/null
+++ b/test/FrontendC/2004-06-17-UnorderedCompares.c
@@ -0,0 +1,21 @@
+// RUN: %llvmgcc -xc -std=c99 %s -c -o - | llvm-dis | grep -v llvm.isunordered | not grep call
+
+#include <math.h>
+
+_Bool A, B, C, D, E, F;
+void TestF(float X, float Y) {
+ A = __builtin_isgreater(X, Y);
+ B = __builtin_isgreaterequal(X, Y);
+ C = __builtin_isless(X, Y);
+ D = __builtin_islessequal(X, Y);
+ E = __builtin_islessgreater(X, Y);
+ F = __builtin_isunordered(X, Y);
+}
+void TestD(double X, double Y) {
+ A = __builtin_isgreater(X, Y);
+ B = __builtin_isgreaterequal(X, Y);
+ C = __builtin_isless(X, Y);
+ D = __builtin_islessequal(X, Y);
+ E = __builtin_islessgreater(X, Y);
+ F = __builtin_isunordered(X, Y);
+}
diff --git a/test/FrontendC/2004-06-18-VariableLengthArrayOfStructures.c b/test/FrontendC/2004-06-18-VariableLengthArrayOfStructures.c
new file mode 100644
index 0000000..3e450a4
--- /dev/null
+++ b/test/FrontendC/2004-06-18-VariableLengthArrayOfStructures.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+struct S { };
+
+int xxxx(int a) {
+ struct S comps[a];
+ comps[0];
+}
+
diff --git a/test/FrontendC/2004-07-06-FunctionCast.c b/test/FrontendC/2004-07-06-FunctionCast.c
new file mode 100644
index 0000000..6d80f86
--- /dev/null
+++ b/test/FrontendC/2004-07-06-FunctionCast.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+static int unused_func(void) {
+ return 1;
+}
+
+int foo(void) {
+ (void)unused_func; /* avoid compiler warning */
+ return 2;
+}
diff --git a/test/FrontendC/2004-08-06-LargeStructTest.c b/test/FrontendC/2004-08-06-LargeStructTest.c
new file mode 100644
index 0000000..8fbb7f8
--- /dev/null
+++ b/test/FrontendC/2004-08-06-LargeStructTest.c
@@ -0,0 +1,19 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+
+#define A(X) int X;
+#define B(X) A(X##0) A(X##1) A(X##2) A(X##3) A(X##4) A(X##5) A(X##6) A(X##7) \
+ A(X##8) A(X##9) A(X##A) A(X##B) A(X##C) A(X##D) A(X##E) A(X##F)
+#define C(X) B(X##0) B(X##1) B(X##2) B(X##3) B(X##4) B(X##5) B(X##6) B(X##7) \
+ B(X##8) B(X##9) B(X##A) B(X##B) B(X##C) B(X##D) B(X##E) B(X##F)
+
+struct foo {
+ C(x); // 256
+ C(y); // 256
+ C(z);
+};
+
+
+int test(struct foo *F) {
+ return F->xA1 + F->yFF + F->zC4;
+}
diff --git a/test/FrontendC/2004-11-25-UnnamedBitfieldPadding.c b/test/FrontendC/2004-11-25-UnnamedBitfieldPadding.c
new file mode 100644
index 0000000..b3f4a82
--- /dev/null
+++ b/test/FrontendC/2004-11-25-UnnamedBitfieldPadding.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o /dev/null
+// This is a testcase for PR461
+typedef struct {
+ unsigned min_align: 1;
+ unsigned : 1;
+} addr_diff_vec_flags;
+
+addr_diff_vec_flags X;
diff --git a/test/FrontendC/2004-11-27-InvalidConstantExpr.c b/test/FrontendC/2004-11-27-InvalidConstantExpr.c
new file mode 100644
index 0000000..ee8642f
--- /dev/null
+++ b/test/FrontendC/2004-11-27-InvalidConstantExpr.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc %s -S -o - | not grep {foo\\* sub}
+// This should not produce a subtrace constantexpr of a pointer
+struct foo {
+ int Y;
+ char X[100];
+} F;
+
+int test(char *Y) {
+ return Y - F.X;
+}
diff --git a/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c b/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c
new file mode 100644
index 0000000..b1e1421
--- /dev/null
+++ b/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc -c -emit-llvm %s -o - | \
+// RUN: opt -std-compile-opts | llvm-dis | not grep {declare i32.*func}
+
+// There should not be an unresolved reference to func here. Believe it or not,
+// the "expected result" is a function named 'func' which is internal and
+// referenced by bar().
+
+// This is PR244
+
+static int func();
+void bar() {
+ int func();
+ foo(func);
+}
+static int func(char** A, char ** B) {}
diff --git a/test/FrontendC/2004-11-27-VariableSizeInStructure.c b/test/FrontendC/2004-11-27-VariableSizeInStructure.c
new file mode 100644
index 0000000..bd63ae3
--- /dev/null
+++ b/test/FrontendC/2004-11-27-VariableSizeInStructure.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc %s -S -o /dev/null
+
+// GCC allows variable sized arrays in structures, crazy!
+
+// This is PR360.
+
+int sub1(int i, char *pi) {
+ typedef int foo[i];
+ struct bar {foo f1; int f2;} *p = (struct bar *) pi;
+ return p->f2;
+}
diff --git a/test/FrontendC/2005-01-02-ConstantInits.c b/test/FrontendC/2005-01-02-ConstantInits.c
new file mode 100644
index 0000000..735278e
--- /dev/null
+++ b/test/FrontendC/2005-01-02-ConstantInits.c
@@ -0,0 +1,24 @@
+// RUN: %llvmgcc %s -S -o -
+
+// This tests all kinds of hard cases with initializers and
+// array subscripts. This corresponds to PR487.
+
+struct X { int a[2]; };
+
+int test() {
+ static int i23 = (int) &(((struct X *)0)->a[1]);
+ return i23;
+}
+
+int i = (int) &( ((struct X *)0) -> a[1]);
+
+int Arr[100];
+
+int foo(int i) { return bar(&Arr[49])+bar(&Arr[i]); }
+int foo2(int i) {
+ static const int *X = &Arr[49];
+ static int i23 = (int) &( ((struct X *)0) -> a[0]);
+ int *P = Arr;
+ ++P;
+ return bar(Arr+i);
+}
diff --git a/test/FrontendC/2005-01-02-PointerDifference.c b/test/FrontendC/2005-01-02-PointerDifference.c
new file mode 100644
index 0000000..a351da2
--- /dev/null
+++ b/test/FrontendC/2005-01-02-PointerDifference.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep -v div
+
+int Diff(int *P, int *Q) { return P-Q; }
diff --git a/test/FrontendC/2005-01-02-VAArgError-ICE.c b/test/FrontendC/2005-01-02-VAArgError-ICE.c
new file mode 100644
index 0000000..db82558
--- /dev/null
+++ b/test/FrontendC/2005-01-02-VAArgError-ICE.c
@@ -0,0 +1,10 @@
+// This file is erroneous, but should not cause the compiler to ICE.
+// PR481
+// RUN: %llvmgcc %s -S -o /dev/null |& not grep {internal compiler error}
+
+#include <stdarg.h>
+int flags(int a, int b, ...) {
+ va_list args;
+ va_start(args,a); // not the last named arg
+ foo(args);
+}
diff --git a/test/FrontendC/2005-02-20-AggregateSAVEEXPR.c b/test/FrontendC/2005-02-20-AggregateSAVEEXPR.c
new file mode 100644
index 0000000..7a95533
--- /dev/null
+++ b/test/FrontendC/2005-02-20-AggregateSAVEEXPR.c
@@ -0,0 +1,19 @@
+// RUN: %llvmgcc %s -o /dev/null -S
+// Note:
+// We fail this on Sparc because the C library seems to be missing complex.h
+// and the corresponding C99 complex support.
+//
+// We could modify the test to use only GCC extensions, but I don't know if
+// that would change the nature of the test.
+//
+// XFAIL: sparc
+
+#ifdef __CYGWIN__
+ #include <mingw/complex.h>
+#else
+ #include <complex.h>
+#endif
+
+int foo(complex float c) {
+ return creal(c);
+}
diff --git a/test/FrontendC/2005-02-27-MarkGlobalConstant.c b/test/FrontendC/2005-02-27-MarkGlobalConstant.c
new file mode 100644
index 0000000..b9fbbb6
--- /dev/null
+++ b/test/FrontendC/2005-02-27-MarkGlobalConstant.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -xc %s -S -o - | grep {private constant }
+
+// The synthetic global made by the CFE for big initializer should be marked
+// constant.
+
+void bar();
+void foo() {
+ char Blah[] = "asdlfkajsdlfkajsd;lfkajds;lfkjasd;flkajsd;lkfja;sdlkfjasd";
+ bar(Blah);
+}
diff --git a/test/FrontendC/2005-03-05-OffsetOfHack.c b/test/FrontendC/2005-03-05-OffsetOfHack.c
new file mode 100644
index 0000000..8df7231
--- /dev/null
+++ b/test/FrontendC/2005-03-05-OffsetOfHack.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc %s -S -o -
+
+struct s {
+ unsigned long int field[0];
+};
+
+#define OFFS \
+ (((char *) &((struct s *) 0)->field[0]) - (char *) 0)
+
+int foo[OFFS];
+
+
diff --git a/test/FrontendC/2005-03-06-OffsetOfStructCrash.c b/test/FrontendC/2005-03-06-OffsetOfStructCrash.c
new file mode 100644
index 0000000..91e6862
--- /dev/null
+++ b/test/FrontendC/2005-03-06-OffsetOfStructCrash.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc %s -S -o -
+
+struct Y {};
+struct XXX {
+ struct Y F;
+};
+
+void test1() {
+ (int)&((struct XXX*)(((void *)0)))->F;
+}
+
+void test2() {
+ &((struct XXX*)(((void *)0)))->F;
+}
diff --git a/test/FrontendC/2005-03-11-Prefetch.c b/test/FrontendC/2005-03-11-Prefetch.c
new file mode 100644
index 0000000..bf79653
--- /dev/null
+++ b/test/FrontendC/2005-03-11-Prefetch.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc %s -S -o - | llvm-as | llvm-dis | grep llvm.prefetch
+
+void foo(int *P) {
+ __builtin_prefetch(P);
+ __builtin_prefetch(P, 1);
+}
diff --git a/test/FrontendC/2005-04-09-ComplexOps.c b/test/FrontendC/2005-04-09-ComplexOps.c
new file mode 100644
index 0000000..2962b74
--- /dev/null
+++ b/test/FrontendC/2005-04-09-ComplexOps.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -S -o -
+
+#include <math.h>
+#define I 1.0iF
+
+double __complex test(double X) { return ~-(X*I); }
+
+_Bool EQ(double __complex A, double __complex B) { return A == B; }
+_Bool NE(double __complex A, double __complex B) { return A != B; }
diff --git a/test/FrontendC/2005-05-06-CountBuiltins.c b/test/FrontendC/2005-05-06-CountBuiltins.c
new file mode 100644
index 0000000..da40a14
--- /dev/null
+++ b/test/FrontendC/2005-05-06-CountBuiltins.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc %s -S -o - | llvm-as | llvm-dis | not grep call.*__builtin
+
+int G, H, I;
+void foo(int P) {
+ G = __builtin_clz(P);
+ H = __builtin_ctz(P);
+ I = __builtin_popcount(P);
+}
+
+long long g, h, i;
+void fooll(float P) {
+ g = __builtin_clzll(P);
+ g = __builtin_clzll(P);
+ h = __builtin_ctzll(P);
+ i = __builtin_popcountll(P);
+}
+
diff --git a/test/FrontendC/2005-05-10-GlobalUnionInit.c b/test/FrontendC/2005-05-10-GlobalUnionInit.c
new file mode 100644
index 0000000..443064c
--- /dev/null
+++ b/test/FrontendC/2005-05-10-GlobalUnionInit.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc %s -S -o -
+
+union A { // { uint }
+ union B { double *C; } D;
+} E = { { (double*)12312 } };
+
diff --git a/test/FrontendC/2005-06-15-ExpandGotoInternalProblem.c b/test/FrontendC/2005-06-15-ExpandGotoInternalProblem.c
new file mode 100644
index 0000000..0f076c9
--- /dev/null
+++ b/test/FrontendC/2005-06-15-ExpandGotoInternalProblem.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -std=c99 %s -S -o - | \
+// RUN: opt -std-compile-opts -disable-output
+// PR580
+
+int X, Y;
+int foo() {
+ int i;
+ for (i=0; i<100; i++ )
+ {
+ break;
+ i = ( X || Y ) ;
+ }
+}
+
diff --git a/test/FrontendC/2005-07-20-SqrtNoErrno.c b/test/FrontendC/2005-07-20-SqrtNoErrno.c
new file mode 100644
index 0000000..a321a38
--- /dev/null
+++ b/test/FrontendC/2005-07-20-SqrtNoErrno.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc %s -S -o - -fno-math-errno | FileCheck %s
+// llvm.sqrt has undefined behavior on negative inputs, so it is
+// inappropriate to translate C/C++ sqrt to this.
+#include <math.h>
+
+float foo(float X) {
+// CHECK: foo
+// CHECK: sqrtf(float %1) nounwind readonly
+ // Check that this is marked readonly when errno is ignored.
+ return sqrtf(X);
+}
diff --git a/test/FrontendC/2005-07-26-UnionInitCrash.c b/test/FrontendC/2005-07-26-UnionInitCrash.c
new file mode 100644
index 0000000..563278a
--- /dev/null
+++ b/test/FrontendC/2005-07-26-UnionInitCrash.c
@@ -0,0 +1,3 @@
+// PR607
+// RUN: %llvmgcc %s -S -o -
+union { char bytes[8]; double alignment; }EQ1 = {0,0,0,0,0,0,0,0};
diff --git a/test/FrontendC/2005-07-28-IncorrectWeakGlobal.c b/test/FrontendC/2005-07-28-IncorrectWeakGlobal.c
new file mode 100644
index 0000000..1a8c409
--- /dev/null
+++ b/test/FrontendC/2005-07-28-IncorrectWeakGlobal.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc %s -S -o - | grep TheGlobal | not grep weak
+
+extern int TheGlobal;
+int foo() { return TheGlobal; }
+int TheGlobal = 1;
diff --git a/test/FrontendC/2005-09-20-ComplexConstants.c b/test/FrontendC/2005-09-20-ComplexConstants.c
new file mode 100644
index 0000000..209adc5
--- /dev/null
+++ b/test/FrontendC/2005-09-20-ComplexConstants.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc %s -S -o - | llvm-as -o /dev/null
+
+const double _Complex x[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};
+
diff --git a/test/FrontendC/2005-09-24-AsmUserPrefix.c b/test/FrontendC/2005-09-24-AsmUserPrefix.c
new file mode 100644
index 0000000..952c7b3
--- /dev/null
+++ b/test/FrontendC/2005-09-24-AsmUserPrefix.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc %s -S -o - | opt -std-compile-opts | llc | \
+// RUN: not grep _foo2
+
+void foo() __asm__("foo2");
+
+void bar() {
+ foo();
+}
diff --git a/test/FrontendC/2005-09-24-BitFieldCrash.c b/test/FrontendC/2005-09-24-BitFieldCrash.c
new file mode 100644
index 0000000..b4c85ff
--- /dev/null
+++ b/test/FrontendC/2005-09-24-BitFieldCrash.c
@@ -0,0 +1,33 @@
+// RUN: %llvmgcc %s -S -o -
+
+struct tree_common {};
+
+struct tree_int_cst {
+ struct tree_common common;
+ struct tree_int_cst_lowhi {
+ unsigned long long low;
+ long long high;
+ } int_cst;
+};
+
+enum XXX { yyy };
+
+struct tree_function_decl {
+ struct tree_common common;
+ long long locus, y;
+ __extension__ enum XXX built_in_class : 2;
+
+};
+
+
+union tree_node {
+ struct tree_int_cst int_cst;
+ struct tree_function_decl function_decl;
+};
+
+
+void foo (union tree_node * decl) {
+ decl->function_decl.built_in_class != 0;
+}
+
+
diff --git a/test/FrontendC/2005-10-18-VariableSizedElementCrash.c b/test/FrontendC/2005-10-18-VariableSizedElementCrash.c
new file mode 100644
index 0000000..b916662
--- /dev/null
+++ b/test/FrontendC/2005-10-18-VariableSizedElementCrash.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -S -o -
+
+int sub1(int i, char *pi) {
+ typedef int foo[i];
+ struct bar {foo f1; int f2:3; int f3:4;} *p = (struct bar *) pi;
+ xxx(p->f1);
+ return p->f3;
+}
+
diff --git a/test/FrontendC/2005-12-04-AttributeUsed.c b/test/FrontendC/2005-12-04-AttributeUsed.c
new file mode 100644
index 0000000..33e27e89
--- /dev/null
+++ b/test/FrontendC/2005-12-04-AttributeUsed.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | llvm-as | llvm-dis | \
+// RUN: grep llvm.used | grep foo | grep X
+
+int X __attribute__((used));
+int Y;
+
+__attribute__((used)) void foo() {}
+
diff --git a/test/FrontendC/2005-12-04-DeclarationLineNumbers.c b/test/FrontendC/2005-12-04-DeclarationLineNumbers.c
new file mode 100644
index 0000000..f3f69dd
--- /dev/null
+++ b/test/FrontendC/2005-12-04-DeclarationLineNumbers.c
@@ -0,0 +1,23 @@
+// RUN: %llvmgcc %s -S -g -o - | grep DW_TAG_compile_unit | count 1
+// PR664: ensure that line #'s are emitted for declarations
+
+
+short test(short br_data_0,
+short br_data_1,
+short br_data_2,
+short br_data_3,
+short br_data_4,
+short br_data_5,
+short br_data_6,
+short br_data_7) {
+
+short sm07 = br_data_0 + br_data_7;
+short sm16 = br_data_1 + br_data_6;
+short sm25 = br_data_2 + br_data_5;
+short sm34 = br_data_3 + br_data_4;
+short s0734 = sm07 + sm34;
+short s1625 = sm16 + sm25;
+
+return s0734 + s1625;
+}
+
diff --git a/test/FrontendC/2006-01-13-Includes.c b/test/FrontendC/2006-01-13-Includes.c
new file mode 100644
index 0000000..7fa0b3b
--- /dev/null
+++ b/test/FrontendC/2006-01-13-Includes.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc %s -g -S -o - | grep {test/FrontendC}
+// PR676
+
+#include <stdio.h>
+
+void test() {
+ printf("Hello World\n");
+}
diff --git a/test/FrontendC/2006-01-13-StackSave.c b/test/FrontendC/2006-01-13-StackSave.c
new file mode 100644
index 0000000..ae8d908
--- /dev/null
+++ b/test/FrontendC/2006-01-13-StackSave.c
@@ -0,0 +1,11 @@
+// PR691
+// RUN: %llvmgcc %s -S -o - | opt -std-compile-opts | \
+// RUN: llvm-dis | grep llvm.stacksave
+
+void test(int N) {
+ int i;
+ for (i = 0; i < N; ++i) {
+ int VLA[i];
+ external(VLA);
+ }
+}
diff --git a/test/FrontendC/2006-01-16-BitCountIntrinsicsUnsigned.c b/test/FrontendC/2006-01-16-BitCountIntrinsicsUnsigned.c
new file mode 100644
index 0000000..eafcb62
--- /dev/null
+++ b/test/FrontendC/2006-01-16-BitCountIntrinsicsUnsigned.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S %s -o - | grep {llvm.ctlz.i32(i32} | count 3
+// RUN: %llvmgcc -S %s -o - | grep {llvm.ctlz.i32(i32} | grep declare | count 1
+
+unsigned t2(unsigned X) {
+ return __builtin_clz(X);
+}
+int t1(int X) {
+ return __builtin_clz(X);
+}
diff --git a/test/FrontendC/2006-01-23-FileScopeAsm.c b/test/FrontendC/2006-01-23-FileScopeAsm.c
new file mode 100644
index 0000000..80e7195
--- /dev/null
+++ b/test/FrontendC/2006-01-23-FileScopeAsm.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc %s -S -o - | opt -std-compile-opts | \
+// RUN: llvm-dis | grep {foo\[12345\]} | count 5
+
+__asm__ ("foo1");
+__asm__ ("foo2");
+__asm__ ("foo3");
+__asm__ ("foo4");
+__asm__ ("foo5");
diff --git a/test/FrontendC/2006-03-03-MissingInitializer.c b/test/FrontendC/2006-03-03-MissingInitializer.c
new file mode 100644
index 0000000..19d4bc7
--- /dev/null
+++ b/test/FrontendC/2006-03-03-MissingInitializer.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc %s -S -o - | opt -std-compile-opts | \
+// RUN: llvm-dis | grep {@nate.*internal global i32 0}
+
+struct X { int *XX; int Y;};
+
+void foo() {
+ static int nate = 0;
+ struct X bob = { &nate, 14 };
+ bar(&bob);
+}
+
diff --git a/test/FrontendC/2006-03-16-VectorCtor.c b/test/FrontendC/2006-03-16-VectorCtor.c
new file mode 100644
index 0000000..b95593b
--- /dev/null
+++ b/test/FrontendC/2006-03-16-VectorCtor.c
@@ -0,0 +1,10 @@
+// Test that basic generic vector support works
+// RUN: %llvmgcc %s -S -o -
+
+typedef int v4si __attribute__ ((__vector_size__ (16)));
+void test(v4si *P, v4si *Q, float X) {
+ *P = (v4si){ X, X, X, X } * *Q;
+}
+
+v4si G = (v4si){ 0.1, 1.2, 4.2, 17.2 };
+
diff --git a/test/FrontendC/2006-03-17-KnRMismatch.c b/test/FrontendC/2006-03-17-KnRMismatch.c
new file mode 100644
index 0000000..1939112
--- /dev/null
+++ b/test/FrontendC/2006-03-17-KnRMismatch.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc %s -S -o -
+
+void regnode(int op);
+
+void regnode(op)
+char op;
+{
+}
diff --git a/test/FrontendC/2006-05-01-AppleAlignmentPragma.c b/test/FrontendC/2006-05-01-AppleAlignmentPragma.c
new file mode 100644
index 0000000..c9050aa
--- /dev/null
+++ b/test/FrontendC/2006-05-01-AppleAlignmentPragma.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc %s -S -o -
+
+#ifdef __APPLE__
+/* test that X is layed out correctly when this pragma is used. */
+#pragma options align=mac68k
+#endif
+
+struct S {
+ unsigned A;
+ unsigned short B;
+} X;
+
diff --git a/test/FrontendC/2006-05-19-SingleEltReturn.c b/test/FrontendC/2006-05-19-SingleEltReturn.c
new file mode 100644
index 0000000..70c94c6
--- /dev/null
+++ b/test/FrontendC/2006-05-19-SingleEltReturn.c
@@ -0,0 +1,23 @@
+// Test returning a single element aggregate value containing a double.
+// RUN: %llvmgcc %s -S -o -
+
+struct X {
+ double D;
+};
+
+struct Y {
+ struct X x;
+};
+
+struct Y bar();
+
+void foo(struct Y *P) {
+ *P = bar();
+}
+
+struct Y bar() {
+ struct Y a;
+ a.x.D = 0;
+ return a;
+}
+
diff --git a/test/FrontendC/2006-07-31-PR854.c b/test/FrontendC/2006-07-31-PR854.c
new file mode 100644
index 0000000..3802de8
--- /dev/null
+++ b/test/FrontendC/2006-07-31-PR854.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -w %s -S -o -
+// PR854
+ struct kernel_symbol {
+ unsigned long value;
+ };
+ unsigned long loops_per_jiffy = (1<<12);
+ static const char __kstrtab_loops_per_jiffy[]
+__attribute__((section("__ksymtab_strings"))) = "loops_per_jiffy";
+ static const struct kernel_symbol __ksymtab_loops_per_jiffy
+__attribute__((__used__)) __attribute__((section("__ksymtab"))) = { (unsigned
+long)&loops_per_jiffy, __kstrtab_loops_per_jiffy };
diff --git a/test/FrontendC/2006-09-11-BitfieldRefCrash.c b/test/FrontendC/2006-09-11-BitfieldRefCrash.c
new file mode 100644
index 0000000..d06cc3a
--- /dev/null
+++ b/test/FrontendC/2006-09-11-BitfieldRefCrash.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc %s -S -o -
+// PR906
+
+struct state_struct {
+ unsigned long long phys_frame: 50;
+ unsigned valid : 2;
+} s;
+
+int mem_access(struct state_struct *p) {
+ return p->valid;
+}
+
diff --git a/test/FrontendC/2006-09-18-fwrite-cast-crash.c b/test/FrontendC/2006-09-18-fwrite-cast-crash.c
new file mode 100644
index 0000000..a693c56
--- /dev/null
+++ b/test/FrontendC/2006-09-18-fwrite-cast-crash.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc %s -S -o /dev/null
+// PR910
+// XFAIL: *
+// See PR2452
+
+struct l_struct_2E_FILE { char x; };
+unsigned fwrite(signed char *, unsigned , unsigned , signed char *);
+static signed char str301[39];
+static void Usage(signed char *ltmp_611_6) {
+ struct l_struct_2E_FILE *ltmp_6202_16;
+ unsigned ltmp_6203_92;
+ ltmp_6203_92 = /*tail*/ ((unsigned (*) (signed char *, unsigned , unsigned ,
+struct l_struct_2E_FILE *))(void*)fwrite)((&(str301[0u])), 38u, 1u, ltmp_6202_16);
+}
+
diff --git a/test/FrontendC/2006-09-21-IncompleteElementType.c b/test/FrontendC/2006-09-21-IncompleteElementType.c
new file mode 100644
index 0000000..a509182
--- /dev/null
+++ b/test/FrontendC/2006-09-21-IncompleteElementType.c
@@ -0,0 +1,3 @@
+// RUN: not %llvmgcc %s -S -o /dev/null |& not grep {internal compiler error}
+
+struct A X[(927 - 37) / sizeof(struct A)];
diff --git a/test/FrontendC/2006-09-25-DebugFilename.c b/test/FrontendC/2006-09-25-DebugFilename.c
new file mode 100644
index 0000000..eea52ba
--- /dev/null
+++ b/test/FrontendC/2006-09-25-DebugFilename.c
@@ -0,0 +1,6 @@
+// RUN: not %llvmgcc -xc %s -S -o /dev/null |& \
+// RUN: grep fluffy | grep 2006-09-25-DebugFilename.c
+#include "2006-09-25-DebugFilename.h"
+int func1() { return hfunc1(); }
+int func2() { fluffy; return hfunc1(); }
+
diff --git a/test/FrontendC/2006-09-25-DebugFilename.h b/test/FrontendC/2006-09-25-DebugFilename.h
new file mode 100644
index 0000000..9b03666
--- /dev/null
+++ b/test/FrontendC/2006-09-25-DebugFilename.h
@@ -0,0 +1,6 @@
+extern int exfunc(int a);
+
+static inline int hfunc1()
+{
+ return exfunc(1);
+}
diff --git a/test/FrontendC/2006-09-28-SimpleAsm.c b/test/FrontendC/2006-09-28-SimpleAsm.c
new file mode 100644
index 0000000..e3040200
--- /dev/null
+++ b/test/FrontendC/2006-09-28-SimpleAsm.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc %s -S -o - | grep {ext: xorl %eax, eax; movl}
+// RUN: %llvmgcc %s -S -o - | grep {nonext: xorl %eax, %eax; mov}
+// PR924
+
+void bar() {
+ // Extended asm
+ asm volatile ("ext: xorl %%eax, eax; movl eax, fs; movl eax, gs %%blah %= %% " : : "r"(1));
+ // Non-extended asm.
+ asm volatile ("nonext: xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs %%blah %= %% ");
+}
diff --git a/test/FrontendC/2006-10-30-ArrayCrash.c b/test/FrontendC/2006-10-30-ArrayCrash.c
new file mode 100644
index 0000000..09464dd
--- /dev/null
+++ b/test/FrontendC/2006-10-30-ArrayCrash.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -O3 -S -o - %s
+// PR954, PR911
+
+extern void foo();
+
+struct S {
+ short f1[3];
+ unsigned int f2 : 1;
+};
+
+void bar()
+{
+ struct S *A;
+
+ if (A->f2)
+ foo();
+}
diff --git a/test/FrontendC/2006-12-14-ordered_expr.c b/test/FrontendC/2006-12-14-ordered_expr.c
new file mode 100644
index 0000000..8ff2eb6
--- /dev/null
+++ b/test/FrontendC/2006-12-14-ordered_expr.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -O3 -S %s -o - | grep {fcmp ord float %X, %Y}
+
+int test2(float X, float Y) {
+ return !__builtin_isunordered(X, Y);
+}
+
diff --git a/test/FrontendC/2007-01-06-KNR-Proto.c b/test/FrontendC/2007-01-06-KNR-Proto.c
new file mode 100644
index 0000000..eb2f254
--- /dev/null
+++ b/test/FrontendC/2007-01-06-KNR-Proto.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S -o - -emit-llvm %s
+// PR1083
+
+int svc_register (void (*dispatch) (int));
+
+int svc_register (dispatch)
+ void (*dispatch) ();
+{
+}
+
diff --git a/test/FrontendC/2007-01-20-VectorICE.c b/test/FrontendC/2007-01-20-VectorICE.c
new file mode 100644
index 0000000..c2dcdef
--- /dev/null
+++ b/test/FrontendC/2007-01-20-VectorICE.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc %s -S -o -
+
+typedef float __m128 __attribute__((__vector_size__(16)));
+typedef long long __v2di __attribute__((__vector_size__(16)));
+typedef int __v4si __attribute__((__vector_size__(16)));
+
+__v2di bar(void);
+void foo(int X, __v4si *P) {
+ *P = X == 2 ? bar() : bar();
+}
+
diff --git a/test/FrontendC/2007-01-24-InlineAsmCModifier.c b/test/FrontendC/2007-01-24-InlineAsmCModifier.c
new file mode 100644
index 0000000..c601ccf
--- /dev/null
+++ b/test/FrontendC/2007-01-24-InlineAsmCModifier.c
@@ -0,0 +1,10 @@
+// Verify that the %c modifier works and strips off any prefixes from
+// immediates.
+// RUN: %llvmgcc -S %s -o - | llc | grep {pickANumber: 789514}
+
+void foo() {
+ __asm__ volatile("/* " "pickANumber" ": %c0 */"::"i"(0xC0C0A));
+
+ // Check that non-c modifiers work also (not greped for above).
+ __asm__ volatile("/* " "pickANumber2 " ": %0 */"::"i"(123));
+}
diff --git a/test/FrontendC/2007-02-04-AddrLValue-2.c b/test/FrontendC/2007-02-04-AddrLValue-2.c
new file mode 100644
index 0000000..90251e6
--- /dev/null
+++ b/test/FrontendC/2007-02-04-AddrLValue-2.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm
+// PR1173
+
+struct S { char s; };
+struct T { struct S t; };
+
+struct S *const p = &((struct T * const) (0x4000))->t;
+
+void
+foo (void)
+{
+ p->s = 0;
+}
diff --git a/test/FrontendC/2007-02-04-AddrLValue.c b/test/FrontendC/2007-02-04-AddrLValue.c
new file mode 100644
index 0000000..c8b65a9
--- /dev/null
+++ b/test/FrontendC/2007-02-04-AddrLValue.c
@@ -0,0 +1,23 @@
+// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm
+// PR1176
+
+typedef struct
+{
+ char *key;
+ char *value;
+} T1;
+
+typedef struct
+{
+ long type;
+ char *value;
+} T3;
+
+T1 a[] =
+{
+ {
+ "",
+ ((char *)&((T3) {1, (char *) 1}))
+ }
+};
+
diff --git a/test/FrontendC/2007-02-04-EmptyStruct.c b/test/FrontendC/2007-02-04-EmptyStruct.c
new file mode 100644
index 0000000..48ad31f
--- /dev/null
+++ b/test/FrontendC/2007-02-04-EmptyStruct.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm
+// PR1175
+
+struct empty { };
+
+void foo(struct empty *p) {
+ p++;
+}
+
diff --git a/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c b/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c
new file mode 100644
index 0000000..f02a44b
--- /dev/null
+++ b/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c
@@ -0,0 +1,21 @@
+// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm
+// PR1174
+
+void zzz (char *s1, char *s2, int len, int *q)
+{
+ int z = 5;
+ unsigned int i, b;
+ struct { char a[z]; } x;
+
+ for (i = 0; i < len; i++)
+ s1[i] = s2[i];
+
+ b = z & 0x3;
+
+ len += (b == 0 ? 0 : 1) + z;
+
+ *q = len;
+
+ foo (x, x);
+}
+
diff --git a/test/FrontendC/2007-02-05-nested.c b/test/FrontendC/2007-02-05-nested.c
new file mode 100644
index 0000000..be23f17
--- /dev/null
+++ b/test/FrontendC/2007-02-05-nested.c
@@ -0,0 +1,54 @@
+// RUN: %llvmgcc -S -fnested-functions -O0 -o - -emit-llvm %s
+// PR915
+
+extern void abort(void);
+
+void nest(int n)
+{
+ int a = 0;
+ int b = 5;
+ int c = 0;
+ int d = 7;
+
+ void o(int i, int j)
+ {
+ if (i!=j)
+ abort();
+ }
+
+ void f(x)
+ int x; /* K&R style */
+ {
+ int e = 0;
+ int f = 2;
+ int g = 0;
+
+ void y(void)
+ {
+ c = n;
+ e = 1;
+ g = x;
+ }
+
+ void z(void)
+ {
+ a = 4;
+ g = 3;
+ }
+
+ a = 5;
+ y();
+ c = x;
+ z();
+ o(1,e);
+ o(2,f);
+ o(3,g);
+ }
+
+ c = 2;
+ f(6);
+ o(4,a);
+ o(5,b);
+ o(6,c);
+ o(7,d);
+}
diff --git a/test/FrontendC/2007-02-07-AddrLabel.c b/test/FrontendC/2007-02-07-AddrLabel.c
new file mode 100644
index 0000000..144f62d
--- /dev/null
+++ b/test/FrontendC/2007-02-07-AddrLabel.c
@@ -0,0 +1,10 @@
+// PR947
+// RUN: %llvmgcc %s -c -o -
+
+void foo() {
+ void *ptr;
+ label:
+ ptr = &&label;
+
+ goto *ptr;
+ }
diff --git a/test/FrontendC/2007-02-16-VariableSizeStructArg.c b/test/FrontendC/2007-02-16-VariableSizeStructArg.c
new file mode 100644
index 0000000..ec6971a
--- /dev/null
+++ b/test/FrontendC/2007-02-16-VariableSizeStructArg.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S -w %s -o -
+// PR1170
+int f(int a, struct {int b[a];} c) { return c.b[0]; }
+
+int g(struct {int b[1];} c) {
+ return c.b[0];
+}
diff --git a/test/FrontendC/2007-02-16-VoidPtrDiff.c b/test/FrontendC/2007-02-16-VoidPtrDiff.c
new file mode 100644
index 0000000..713b9b2
--- /dev/null
+++ b/test/FrontendC/2007-02-16-VoidPtrDiff.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc %s -S -o - -emit-llvm
+
+void foo(void *ptr, int test) {
+ (ptr - ((void *) test + 0x2000));
+}
diff --git a/test/FrontendC/2007-02-16-WritableStrings.c b/test/FrontendC/2007-02-16-WritableStrings.c
new file mode 100644
index 0000000..811e330
--- /dev/null
+++ b/test/FrontendC/2007-02-16-WritableStrings.c
@@ -0,0 +1,7 @@
+// Test the -fwritable-strings option.
+
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm -fwritable-strings %s | \
+// RUN: grep {private global}
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {private constant}
+
+char *X = "foo";
diff --git a/test/FrontendC/2007-02-25-C-DotDotDot.c b/test/FrontendC/2007-02-25-C-DotDotDot.c
new file mode 100644
index 0000000..9696022
--- /dev/null
+++ b/test/FrontendC/2007-02-25-C-DotDotDot.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -O0 -S -o - -emit-llvm -fno-inline -fno-unit-at-a-time %s | \
+// RUN: grep {call float @foo}
+
+// Make sure the call to foo is compiled as:
+// call float @foo()
+// not
+// call float (...)* bitcast (float ()* @foo to float (...)*)( )
+
+static float foo() { return 0.0; }
+float bar() { return foo()*10.0;}
+
+
diff --git a/test/FrontendC/2007-03-01-VarSizeArrayIdx.c b/test/FrontendC/2007-03-01-VarSizeArrayIdx.c
new file mode 100644
index 0000000..a3d480c
--- /dev/null
+++ b/test/FrontendC/2007-03-01-VarSizeArrayIdx.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm | grep mul
+// PR1233
+
+float foo(int w, float A[][w], int g, int h) {
+ return A[g][0];
+}
+
diff --git a/test/FrontendC/2007-03-05-DataLayout.c b/test/FrontendC/2007-03-05-DataLayout.c
new file mode 100644
index 0000000..18819f1
--- /dev/null
+++ b/test/FrontendC/2007-03-05-DataLayout.c
@@ -0,0 +1,53 @@
+// Testcase for PR1242
+// RUN: %llvmgcc -S %s -o - | grep datalayout | \
+// RUN: not grep {"\[Ee\]-p:\[36\]\[24\]:\[36\]\[24\]"}
+// END.
+#include <stdlib.h>
+#define NDIM 3
+#define BODY 01
+typedef double vector[NDIM];
+typedef struct bnode* bodyptr;
+// { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x
+// double], double, \2 *, \2 * }
+struct bnode {
+ short int type;
+ double mass;
+ vector pos;
+ int proc;
+ int new_proc;
+ vector vel;
+ vector acc;
+ vector new_acc;
+ double phi;
+ bodyptr next;
+ bodyptr proc_next;
+} body;
+
+#define Type(x) ((x)->type)
+#define Mass(x) ((x)->mass)
+#define Pos(x) ((x)->pos)
+#define Proc(x) ((x)->proc)
+#define New_Proc(x) ((x)->new_proc)
+#define Vel(x) ((x)->vel)
+#define Acc(x) ((x)->acc)
+#define New_Acc(x) ((x)->new_acc)
+#define Phi(x) ((x)->phi)
+#define Next(x) ((x)->next)
+#define Proc_Next(x) ((x)->proc_next)
+
+bodyptr ubody_alloc(int p)
+{
+ register bodyptr tmp;
+ tmp = (bodyptr)malloc(sizeof(body));
+
+ Type(tmp) = BODY;
+ Proc(tmp) = p;
+ Proc_Next(tmp) = NULL;
+ New_Proc(tmp) = p;
+ return tmp;
+}
+
+int main(int argc, char** argv) {
+ bodyptr b = ubody_alloc(17);
+ return 0;
+}
diff --git a/test/FrontendC/2007-03-06-VarSizeInStruct1.c b/test/FrontendC/2007-03-06-VarSizeInStruct1.c
new file mode 100644
index 0000000..b4ae565
--- /dev/null
+++ b/test/FrontendC/2007-03-06-VarSizeInStruct1.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc %s -w -S -o -
+void* p (int n) {
+ struct f {
+ char w; char x[n]; char z[];
+ } F;
+ F.x[0]='x';
+ return &F;
+}
diff --git a/test/FrontendC/2007-03-06-VarSizeInStruct2.c b/test/FrontendC/2007-03-06-VarSizeInStruct2.c
new file mode 100644
index 0000000..13bc3aa
--- /dev/null
+++ b/test/FrontendC/2007-03-06-VarSizeInStruct2.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc %s -S -o -
+char p (int n) {
+ struct f {
+ char w; char x[n]; char y[n];
+ } F;
+
+ return F.x[0];
+}
diff --git a/test/FrontendC/2007-03-26-BitfieldAfterZeroWidth.c b/test/FrontendC/2007-03-26-BitfieldAfterZeroWidth.c
new file mode 100644
index 0000000..9b6a869
--- /dev/null
+++ b/test/FrontendC/2007-03-26-BitfieldAfterZeroWidth.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc %s -S -o -
+struct W {};
+struct Y {
+ struct W w;
+ int i:1;
+} __attribute__ ((packed)) y;
diff --git a/test/FrontendC/2007-03-26-ZeroWidthBitfield.c b/test/FrontendC/2007-03-26-ZeroWidthBitfield.c
new file mode 100644
index 0000000..89bfb8e
--- /dev/null
+++ b/test/FrontendC/2007-03-26-ZeroWidthBitfield.c
@@ -0,0 +1,2 @@
+// RUN: %llvmgcc %s -S -o -
+struct Z { int :0; } z;
diff --git a/test/FrontendC/2007-03-27-ArrayCompatible.c b/test/FrontendC/2007-03-27-ArrayCompatible.c
new file mode 100644
index 0000000..fa3d2db
--- /dev/null
+++ b/test/FrontendC/2007-03-27-ArrayCompatible.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -S %s -O2 -o - | grep {ret i8 0}
+static char c(int n) {
+ char x[2][n];
+ x[1][0]=0;
+ return *(n+(char *)x);
+}
+
+char d(void) {
+ return c(2);
+}
diff --git a/test/FrontendC/2007-03-27-VarLengthArray.c b/test/FrontendC/2007-03-27-VarLengthArray.c
new file mode 100644
index 0000000..b555690
--- /dev/null
+++ b/test/FrontendC/2007-03-27-VarLengthArray.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | grep {getelementptr inbounds \\\[0 x i32\\\]}
+extern void f(int *);
+int e(int m, int n) {
+ int x[n];
+ f(x);
+ return x[m];
+}
diff --git a/test/FrontendC/2007-04-05-PackedBitFields-2.c b/test/FrontendC/2007-04-05-PackedBitFields-2.c
new file mode 100644
index 0000000..d9db420
--- /dev/null
+++ b/test/FrontendC/2007-04-05-PackedBitFields-2.c
@@ -0,0 +1,16 @@
+// RUN: %llvmgcc %s -S -o -
+
+# define pck __attribute__((packed))
+
+
+struct pck F {
+ unsigned long long i : 12,
+ j : 23,
+ k : 27,
+ l;
+};
+struct F f1;
+
+void foo() {
+ f1.l = 5;
+}
diff --git a/test/FrontendC/2007-04-05-PackedBitFields.c b/test/FrontendC/2007-04-05-PackedBitFields.c
new file mode 100644
index 0000000..f9de356
--- /dev/null
+++ b/test/FrontendC/2007-04-05-PackedBitFields.c
@@ -0,0 +1,16 @@
+// RUN: %llvmgcc %s -S -o -
+
+# define pck __attribute__((packed))
+
+
+struct pck E {
+ unsigned long long l,
+ i : 12,
+ j : 23,
+ k : 29; };
+
+struct E e1;
+
+void foo() {
+ e1.k = 5;
+}
diff --git a/test/FrontendC/2007-04-05-PackedStruct.c b/test/FrontendC/2007-04-05-PackedStruct.c
new file mode 100644
index 0000000..0d524c4
--- /dev/null
+++ b/test/FrontendC/2007-04-05-PackedStruct.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc %s -S -o -
+
+#pragma pack(push, 2)
+
+enum {
+ tA = 0,
+ tB = 1
+};
+
+struct MyStruct {
+ unsigned long A;
+ char C;
+ void * B;
+};
+
+void bar(){
+struct MyStruct MS = { tB, 0 };
+}
diff --git a/test/FrontendC/2007-04-05-PadBeforeZeroLengthField.c b/test/FrontendC/2007-04-05-PadBeforeZeroLengthField.c
new file mode 100644
index 0000000..acc3821
--- /dev/null
+++ b/test/FrontendC/2007-04-05-PadBeforeZeroLengthField.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -S -o -
+struct c__ { unsigned int type:4; };
+union A { struct c__ c; } __attribute__((aligned(8)));
+struct B {
+ unsigned int retainCount;
+ union A objects[];
+};
+void foo(union A * objects, struct B *array, unsigned long k)
+{ array->objects[k] = objects[k]; }
diff --git a/test/FrontendC/2007-04-05-UnPackedStruct.c b/test/FrontendC/2007-04-05-UnPackedStruct.c
new file mode 100644
index 0000000..9e168ed
--- /dev/null
+++ b/test/FrontendC/2007-04-05-UnPackedStruct.c
@@ -0,0 +1,16 @@
+// RUN: %llvmgcc %s -S -o -
+
+
+enum {
+ tA = 0,
+ tB = 1
+};
+
+struct MyStruct {
+ unsigned long A;
+ void * B;
+};
+
+void bar(){
+struct MyStruct MS = { tB, 0 };
+}
diff --git a/test/FrontendC/2007-04-11-InlineAsmStruct.c b/test/FrontendC/2007-04-11-InlineAsmStruct.c
new file mode 100644
index 0000000..49741c6
--- /dev/null
+++ b/test/FrontendC/2007-04-11-InlineAsmStruct.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | llc
+
+struct V { short X, Y; };
+int bar() {
+ struct V bar;
+ __asm__ volatile("foo %0\n" : "=r"(bar));
+ return bar.X;
+}
+
diff --git a/test/FrontendC/2007-04-11-InlineAsmUnion.c b/test/FrontendC/2007-04-11-InlineAsmUnion.c
new file mode 100644
index 0000000..83fe7db
--- /dev/null
+++ b/test/FrontendC/2007-04-11-InlineAsmUnion.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | llc
+
+union U { int x; float p; };
+void foo() {
+ union U bar;
+ __asm__ volatile("foo %0\n" : "=r"(bar));
+}
diff --git a/test/FrontendC/2007-04-11-InlineStorageClassC89.c b/test/FrontendC/2007-04-11-InlineStorageClassC89.c
new file mode 100644
index 0000000..ab1f556
--- /dev/null
+++ b/test/FrontendC/2007-04-11-InlineStorageClassC89.c
@@ -0,0 +1,46 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xglobWeak | \
+// RUN: grep weak | count 1
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xextWeak | \
+// RUN: grep weak | count 1
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xWeaknoinline | grep weak | count 1
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xWeakextnoinline | grep weak | count 1
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xglobnoWeak | grep -v internal | grep -v weak | \
+// RUN: grep -v linkonce | count 1
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xstatnoWeak | grep internal | count 1
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep declare | \
+// RUN: grep xextnoWeak | grep -v internal | grep -v weak | \
+// RUN: grep -v linkonce | count 1
+inline int xglobWeak(int) __attribute__((weak));
+inline int xglobWeak (int i) {
+ return i*2;
+}
+inline int xextWeak(int) __attribute__((weak));
+extern inline int xextWeak (int i) {
+ return i*4;
+}
+int xWeaknoinline(int) __attribute__((weak));
+int xWeaknoinline(int i) {
+ return i*8;
+}
+int xWeakextnoinline(int) __attribute__((weak));
+extern int xWeakextnoinline(int i) {
+ return i*16;
+}
+inline int xglobnoWeak (int i) {
+ return i*32;
+}
+static inline int xstatnoWeak (int i) {
+ return i*64;
+}
+extern inline int xextnoWeak (int i) {
+ return i*128;
+}
+int j(int y) {
+ return xglobnoWeak(y)+xstatnoWeak(y)+xextnoWeak(y)+
+ xglobWeak(y)+xextWeak(y)+
+ xWeakextnoinline(y)+xWeaknoinline(y);
+}
diff --git a/test/FrontendC/2007-04-11-InlineStorageClassC99.c b/test/FrontendC/2007-04-11-InlineStorageClassC99.c
new file mode 100644
index 0000000..f6193aa
--- /dev/null
+++ b/test/FrontendC/2007-04-11-InlineStorageClassC99.c
@@ -0,0 +1,46 @@
+// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep declare | \
+// RUN: grep xglobWeak | grep extern_weak | count 1
+// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xextWeak | grep weak | count 1
+// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xWeaknoinline | grep weak | count 1
+// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xWeakextnoinline | grep weak | count 1
+// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep declare | \
+// RUN: grep xglobnoWeak | grep -v internal | grep -v weak | \
+// RUN: grep -v linkonce | count 1
+// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xstatnoWeak | grep internal | count 1
+// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \
+// RUN: grep xextnoWeak | grep -v internal | grep -v weak | \
+// RUN: grep -v linkonce | count 1
+inline int xglobWeak(int) __attribute__((weak));
+inline int xglobWeak (int i) {
+ return i*2;
+}
+inline int xextWeak(int) __attribute__((weak));
+extern inline int xextWeak (int i) {
+ return i*4;
+}
+int xWeaknoinline(int) __attribute__((weak));
+int xWeaknoinline(int i) {
+ return i*8;
+}
+int xWeakextnoinline(int) __attribute__((weak));
+extern int xWeakextnoinline(int i) {
+ return i*16;
+}
+inline int xglobnoWeak (int i) {
+ return i*32;
+}
+static inline int xstatnoWeak (int i) {
+ return i*64;
+}
+extern inline int xextnoWeak (int i) {
+ return i*128;
+}
+int j(int y) {
+ return xglobnoWeak(y)+xstatnoWeak(y)+xextnoWeak(y)+
+ xglobWeak(y)+xextWeak(y)+
+ xWeakextnoinline(y)+xWeaknoinline(y);
+}
diff --git a/test/FrontendC/2007-04-11-PR1321.c b/test/FrontendC/2007-04-11-PR1321.c
new file mode 100644
index 0000000..f391329
--- /dev/null
+++ b/test/FrontendC/2007-04-11-PR1321.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc %s -S -o /dev/null
+
+struct X {
+ unsigned int e0 : 17;
+ unsigned int e1 : 17;
+ unsigned int e2 : 17;
+ unsigned int e3 : 17;
+ unsigned int e4 : 17;
+ unsigned int e5 : 17;
+ unsigned int e6 : 17;
+ unsigned int e7 : 17;
+} __attribute__((packed)) x;
diff --git a/test/FrontendC/2007-04-13-InlineAsmStruct2.c b/test/FrontendC/2007-04-13-InlineAsmStruct2.c
new file mode 100644
index 0000000..e4870e7
--- /dev/null
+++ b/test/FrontendC/2007-04-13-InlineAsmStruct2.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | grep {call void asm}
+
+struct V { short X, Y; };
+int bar() {
+ struct V bar;
+ __asm__ volatile("foo %0\n" :: "r"(bar));
+ return bar.X;
+}
+
diff --git a/test/FrontendC/2007-04-13-InlineAsmUnion2.c b/test/FrontendC/2007-04-13-InlineAsmUnion2.c
new file mode 100644
index 0000000..284654d
--- /dev/null
+++ b/test/FrontendC/2007-04-13-InlineAsmUnion2.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | grep {call void asm}
+
+union U { int x; char* p; };
+void foo() {
+ union U bar;
+ __asm__ volatile("foo %0\n" :: "r"(bar));
+}
diff --git a/test/FrontendC/2007-04-14-FNoBuiltin.c b/test/FrontendC/2007-04-14-FNoBuiltin.c
new file mode 100644
index 0000000..88bf0e0
--- /dev/null
+++ b/test/FrontendC/2007-04-14-FNoBuiltin.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -O2 -fno-builtin -o - | grep call.*printf
+// Check that -fno-builtin is honored.
+
+extern int printf(const char*, ...);
+void foo(const char *msg) {
+ printf("%s\n",msg);
+}
diff --git a/test/FrontendC/2007-04-17-ZeroSizeBitFields.c b/test/FrontendC/2007-04-17-ZeroSizeBitFields.c
new file mode 100644
index 0000000..ec7b7ea
--- /dev/null
+++ b/test/FrontendC/2007-04-17-ZeroSizeBitFields.c
@@ -0,0 +1,4 @@
+// PR 1332
+// RUN: %llvmgcc %s -S -o /dev/null
+
+struct Z { int a:1; int :0; int c:1; } z;
diff --git a/test/FrontendC/2007-04-24-VolatileStructCopy.c b/test/FrontendC/2007-04-24-VolatileStructCopy.c
new file mode 100644
index 0000000..4765921
--- /dev/null
+++ b/test/FrontendC/2007-04-24-VolatileStructCopy.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {volatile store}
+// PR1352
+
+struct foo {
+ int x;
+};
+
+void copy(volatile struct foo *p, struct foo *q) {
+ *p = *q;
+}
diff --git a/test/FrontendC/2007-04-24-bit-not-expr.c b/test/FrontendC/2007-04-24-bit-not-expr.c
new file mode 100644
index 0000000..1c27f181
--- /dev/null
+++ b/test/FrontendC/2007-04-24-bit-not-expr.c
@@ -0,0 +1,7 @@
+// PR 1346
+// RUN: %llvmgcc -c %s -o /dev/null
+extern bar(void *);
+
+void f(void *cd) {
+ bar(((void *)((unsigned long)(cd) ^ -1)));
+}
diff --git a/test/FrontendC/2007-04-24-str-const.c b/test/FrontendC/2007-04-24-str-const.c
new file mode 100644
index 0000000..4c109c4
--- /dev/null
+++ b/test/FrontendC/2007-04-24-str-const.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -c %s -o /dev/null
+static char *str;
+
+static const struct {
+ const char *name;
+ unsigned type;
+} scan_special[] = {
+ {"shift", 1},
+ {0, 0}
+};
+
+static void
+sb(void)
+{
+ while (*str == ' ' || *str == '\t')
+ str++;
+}
diff --git a/test/FrontendC/2007-05-07-NestedStructReturn.c b/test/FrontendC/2007-05-07-NestedStructReturn.c
new file mode 100644
index 0000000..aea58e3
--- /dev/null
+++ b/test/FrontendC/2007-05-07-NestedStructReturn.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc %s -S -fnested-functions -o - | grep {sret *%agg.result}
+
+struct X { long m, n, o, p; };
+
+struct X p(int n) {
+ struct X c(int m) {
+ struct X x;
+ x.m = m;
+ x.n = n;
+ return x;
+ }
+ return c(n);
+}
diff --git a/test/FrontendC/2007-05-07-PaddingElements.c b/test/FrontendC/2007-05-07-PaddingElements.c
new file mode 100644
index 0000000..9be8850
--- /dev/null
+++ b/test/FrontendC/2007-05-07-PaddingElements.c
@@ -0,0 +1,12 @@
+// PR 1278
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep {struct.s} | not grep "4 x i8] zeroinitializer"
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | not grep "i32 0, i32 2"
+struct s {
+ double d1;
+ int s1;
+};
+
+struct s foo(void) {
+ struct s S = {1.1, 2};
+ return S;
+}
diff --git a/test/FrontendC/2007-05-08-PCH.c b/test/FrontendC/2007-05-08-PCH.c
new file mode 100644
index 0000000..aa277ec
--- /dev/null
+++ b/test/FrontendC/2007-05-08-PCH.c
@@ -0,0 +1,7 @@
+// PR 1400
+// RUN: %llvmgcc -x c-header %s -o /dev/null
+
+int main() {
+ return 0;
+}
+
diff --git a/test/FrontendC/2007-05-11-str-const.c b/test/FrontendC/2007-05-11-str-const.c
new file mode 100644
index 0000000..48deddb
--- /dev/null
+++ b/test/FrontendC/2007-05-11-str-const.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc -c -g %s -o /dev/null
+
+static unsigned char out[]={0,1};
+static const unsigned char str1[]="1";
+
diff --git a/test/FrontendC/2007-05-15-PaddingElement.c b/test/FrontendC/2007-05-15-PaddingElement.c
new file mode 100644
index 0000000..a218b35
--- /dev/null
+++ b/test/FrontendC/2007-05-15-PaddingElement.c
@@ -0,0 +1,23 @@
+// PR 1419
+
+// RUN: %llvmgcc -xc -O2 %s -c -o - | llvm-dis | grep "ret i32 1"
+struct A {
+ short x;
+ long long :0;
+};
+
+struct B {
+ char a;
+ char b;
+ unsigned char i;
+};
+
+union X { struct A a; struct B b; };
+
+int check(void) {
+ union X x, y;
+
+ y.b.i = 0xff;
+ x = y;
+ return (x.b.i == 0xff);
+}
diff --git a/test/FrontendC/2007-05-16-EmptyStruct.c b/test/FrontendC/2007-05-16-EmptyStruct.c
new file mode 100644
index 0000000..748aa98
--- /dev/null
+++ b/test/FrontendC/2007-05-16-EmptyStruct.c
@@ -0,0 +1,5 @@
+// PR 1417
+
+// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep "struct.anon = type \{ \}"
+
+struct { } *X;
diff --git a/test/FrontendC/2007-05-29-UnionCopy.c b/test/FrontendC/2007-05-29-UnionCopy.c
new file mode 100644
index 0000000..ded67d4
--- /dev/null
+++ b/test/FrontendC/2007-05-29-UnionCopy.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S -o - -emit-llvm %s | grep memcpy
+// PR1421
+
+struct A {
+ char c;
+ int i;
+};
+
+struct B {
+ int c;
+ unsigned char x;
+};
+
+union U { struct A a; struct B b; };
+
+void check(union U *u, union U *v) {
+ *u = *v;
+}
diff --git a/test/FrontendC/2007-06-05-NoInlineAttribute.c b/test/FrontendC/2007-06-05-NoInlineAttribute.c
new file mode 100644
index 0000000..b11b3c7
--- /dev/null
+++ b/test/FrontendC/2007-06-05-NoInlineAttribute.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -O2 -c -emit-llvm %s -o - | llvm-dis | grep call
+
+static int bar(int x, int y) __attribute__((noinline));
+
+static int bar(int x, int y)
+{
+ return x + y;
+}
+
+int foo(int a, int b) {
+ return bar(b, a);
+}
+
diff --git a/test/FrontendC/2007-06-15-AnnotateAttribute.c b/test/FrontendC/2007-06-15-AnnotateAttribute.c
new file mode 100644
index 0000000..0099117
--- /dev/null
+++ b/test/FrontendC/2007-06-15-AnnotateAttribute.c
@@ -0,0 +1,24 @@
+// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.global.annotations
+// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.var.annotation | count 3
+
+#include <stdio.h>
+
+/* Global variable with attribute */
+int X __attribute__((annotate("GlobalValAnnotation")));
+
+/* Function with attribute */
+int foo(int y) __attribute__((annotate("GlobalValAnnotation")))
+ __attribute__((noinline));
+
+int foo(int y __attribute__((annotate("LocalValAnnotation")))) {
+ int x __attribute__((annotate("LocalValAnnotation")));
+ x = 34;
+ return y + x;
+}
+
+int main() {
+ static int a __attribute__((annotate("GlobalValAnnotation")));
+ a = foo(2);
+ printf("hello world%d\n", a);
+ return 0;
+}
diff --git a/test/FrontendC/2007-06-18-SextAttrAggregate.c b/test/FrontendC/2007-06-18-SextAttrAggregate.c
new file mode 100644
index 0000000..2fcd726
--- /dev/null
+++ b/test/FrontendC/2007-06-18-SextAttrAggregate.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc %s -o - -S -emit-llvm -O3 | grep {i8 signext}
+// PR1513
+
+struct s{
+long a;
+long b;
+};
+
+void f(struct s a, char *b, signed char C) {
+
+}
diff --git a/test/FrontendC/2007-07-29-RestrictPtrArg.c b/test/FrontendC/2007-07-29-RestrictPtrArg.c
new file mode 100644
index 0000000..99eae39
--- /dev/null
+++ b/test/FrontendC/2007-07-29-RestrictPtrArg.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep noalias
+
+void foo(int * __restrict myptr1, int * myptr2) {
+ myptr1[0] = 0;
+ myptr2[0] = 0;
+}
diff --git a/test/FrontendC/2007-08-01-LoadStoreAlign.c b/test/FrontendC/2007-08-01-LoadStoreAlign.c
new file mode 100644
index 0000000..75a82c1
--- /dev/null
+++ b/test/FrontendC/2007-08-01-LoadStoreAlign.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {align 1} | count 2
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llc
+
+struct p {
+ char a;
+ int b;
+} __attribute__ ((packed));
+
+struct p t = { 1, 10 };
+struct p u;
+
+int main () {
+ int tmp = t.b;
+ u.b = tmp;
+ return tmp;
+
+}
diff --git a/test/FrontendC/2007-08-21-ComplexCst.c b/test/FrontendC/2007-08-21-ComplexCst.c
new file mode 100644
index 0000000..7ddd87c
--- /dev/null
+++ b/test/FrontendC/2007-08-21-ComplexCst.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc -O2 -c %s -o /dev/null
+void f(_Complex float z);
+void g() { f(1.0i); }
diff --git a/test/FrontendC/2007-08-22-CTTZ.c b/test/FrontendC/2007-08-22-CTTZ.c
new file mode 100644
index 0000000..9e74f24
--- /dev/null
+++ b/test/FrontendC/2007-08-22-CTTZ.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -O2 -S -o - %s | grep {llvm.cttz.i64} | count 2
+// RUN: %llvmgcc -O2 -S -o - %s | not grep {lshr}
+
+int bork(unsigned long long x) {
+ return __builtin_ctzll(x);
+}
diff --git a/test/FrontendC/2007-09-05-ConstCtor.c b/test/FrontendC/2007-09-05-ConstCtor.c
new file mode 100644
index 0000000..8e0e994
--- /dev/null
+++ b/test/FrontendC/2007-09-05-ConstCtor.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -xc -Os -c %s -o /dev/null
+// PR1641
+
+struct A {
+ unsigned long l;
+};
+
+void bar(struct A *a);
+
+void bork() {
+ const unsigned long vcgt = 1234;
+ struct A a = { vcgt };
+ bar(&a);
+}
diff --git a/test/FrontendC/2007-09-12-PragmaPack.c b/test/FrontendC/2007-09-12-PragmaPack.c
new file mode 100644
index 0000000..4fc7f48
--- /dev/null
+++ b/test/FrontendC/2007-09-12-PragmaPack.c
@@ -0,0 +1,30 @@
+// RUN: %llvmgcc -O3 -S -o - %s | grep {18}
+
+#include <stdint.h>
+
+#pragma pack(push, 1)
+typedef struct
+{
+ uint32_t a;
+} foo;
+
+typedef struct {
+ uint8_t major;
+ uint8_t minor;
+ uint16_t build;
+} VERSION;
+
+typedef struct {
+ uint8_t a[5];
+ VERSION version;
+ uint8_t b;
+ foo d;
+ uint32_t guard;
+} bar;
+#pragma pack(pop)
+
+
+unsigned barsize(void) {
+ return sizeof(bar);
+}
+
diff --git a/test/FrontendC/2007-09-14-NegatePointer.c b/test/FrontendC/2007-09-14-NegatePointer.c
new file mode 100644
index 0000000..cb49e46
--- /dev/null
+++ b/test/FrontendC/2007-09-14-NegatePointer.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o -
+// PR1662
+
+int foo(unsigned char *test) {
+ return 0U - (unsigned int )test;
+}
+
diff --git a/test/FrontendC/2007-09-17-WeakRef.c b/test/FrontendC/2007-09-17-WeakRef.c
new file mode 100644
index 0000000..3cdd47e
--- /dev/null
+++ b/test/FrontendC/2007-09-17-WeakRef.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -O1 -S %s -o - | grep icmp
+// PR1678
+// XFAIL: llvmgcc4.0.1
+extern void B (void);
+static __typeof(B) A __attribute__ ((__weakref__("B")));
+int active (void)
+{
+ static void *const p = __extension__ (void *) &A;
+ return p != 0;
+}
diff --git a/test/FrontendC/2007-09-20-GcrootAttribute.c b/test/FrontendC/2007-09-20-GcrootAttribute.c
new file mode 100644
index 0000000..23cd37f
--- /dev/null
+++ b/test/FrontendC/2007-09-20-GcrootAttribute.c
@@ -0,0 +1,29 @@
+// RUN: %llvmgcc -S -emit-llvm %s -o - | grep llvm.gcroot
+// RUN: %llvmgcc -S -emit-llvm %s -o - | grep llvm.gcroot | count 6
+// RUN: %llvmgcc -S -emit-llvm %s -o - | llvm-as
+
+typedef struct foo_s
+{
+ int a;
+} foo, __attribute__ ((gcroot)) *foo_p;
+
+foo my_foo;
+
+int alpha ()
+{
+ foo my_foo2 = my_foo;
+
+ return my_foo2.a;
+}
+
+int bar (foo a)
+{
+ foo_p b;
+ return b->a;
+}
+
+foo_p baz (foo_p a, foo_p b, foo_p *c)
+{
+ a = b = *c;
+ return a;
+}
diff --git a/test/FrontendC/2007-09-26-Alignment.c b/test/FrontendC/2007-09-26-Alignment.c
new file mode 100644
index 0000000..1638fed
--- /dev/null
+++ b/test/FrontendC/2007-09-26-Alignment.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | grep {align 16}
+extern p(int *);
+int q(void) {
+ int x __attribute__ ((aligned (16)));
+ p(&x);
+ return x;
+}
diff --git a/test/FrontendC/2007-09-27-ComplexIntCompare.c b/test/FrontendC/2007-09-27-ComplexIntCompare.c
new file mode 100644
index 0000000..50626e5
--- /dev/null
+++ b/test/FrontendC/2007-09-27-ComplexIntCompare.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -S %s -o -
+// PR1708
+
+#include <stdlib.h>
+
+struct s { _Complex unsigned short x; };
+struct s gs = { 100 + 200i };
+struct s __attribute__((noinline)) foo (void) { return gs; }
+
+int main ()
+{
+ if (foo ().x != gs.x)
+ abort ();
+ exit (0);
+}
+
+
diff --git a/test/FrontendC/2007-09-28-PackedUnionMember.c b/test/FrontendC/2007-09-28-PackedUnionMember.c
new file mode 100644
index 0000000..79f48ce
--- /dev/null
+++ b/test/FrontendC/2007-09-28-PackedUnionMember.c
@@ -0,0 +1,38 @@
+// RUN: %llvmgcc %s -S -o -
+
+#pragma pack(push, 2)
+struct H {
+ unsigned long f1;
+ unsigned long f2;
+ union {
+ struct opaque1 *f3;
+ struct opaque2 *f4;
+ struct {
+ struct opaque3 *f5;
+ unsigned short f6;
+ } f7;
+ } f8;
+};
+#pragma pack(pop)
+
+struct E {
+ unsigned long f1;
+ unsigned long f2;
+};
+
+typedef long (*FuncPtr) ();
+
+extern long bork(FuncPtr handler, const struct E *list);
+
+static long hndlr()
+{
+ struct H cmd = { 4, 412 };
+ return 0;
+}
+void foo(void *inWindow) {
+ static const struct E events[] = {
+ { 123124, 1 }
+ };
+ bork(hndlr, events);
+}
+
diff --git a/test/FrontendC/2007-10-01-BuildArrayRef.c b/test/FrontendC/2007-10-01-BuildArrayRef.c
new file mode 100644
index 0000000..e9037552
--- /dev/null
+++ b/test/FrontendC/2007-10-01-BuildArrayRef.c
@@ -0,0 +1,8 @@
+// RUN: not %llvmgcc -S %s -o /dev/null |& grep "error: assignment of read-only location"
+// PR 1603
+int func()
+{
+ const int *arr;
+ arr[0] = 1;
+}
+
diff --git a/test/FrontendC/2007-10-02-VolatileArray.c b/test/FrontendC/2007-10-02-VolatileArray.c
new file mode 100644
index 0000000..7e8bf24
--- /dev/null
+++ b/test/FrontendC/2007-10-02-VolatileArray.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | grep volatile
+// PR1647
+
+void foo(volatile int *p)
+{
+p[0] = 0;
+}
diff --git a/test/FrontendC/2007-10-15-VoidPtr.c b/test/FrontendC/2007-10-15-VoidPtr.c
new file mode 100644
index 0000000..c5948b9
--- /dev/null
+++ b/test/FrontendC/2007-10-15-VoidPtr.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -S %s -o /dev/null
+void bork(void **data) {
+ (*(unsigned short *) (&(data[37])[927]) = 0);
+}
diff --git a/test/FrontendC/2007-10-30-Volatile.c b/test/FrontendC/2007-10-30-Volatile.c
new file mode 100644
index 0000000..7a75b05
--- /dev/null
+++ b/test/FrontendC/2007-10-30-Volatile.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o /dev/null -Wall -Werror
+void bork() {
+ char * volatile p;
+ volatile int cc;
+ p += cc;
+}
diff --git a/test/FrontendC/2007-11-07-AlignedMemcpy.c b/test/FrontendC/2007-11-07-AlignedMemcpy.c
new file mode 100644
index 0000000..f1900bb
--- /dev/null
+++ b/test/FrontendC/2007-11-07-AlignedMemcpy.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -c %s -o /dev/null
+void bork() {
+ int Qux[33] = {0};
+}
diff --git a/test/FrontendC/2007-11-07-CopyAggregateAlign.c b/test/FrontendC/2007-11-07-CopyAggregateAlign.c
new file mode 100644
index 0000000..8bd94b0
--- /dev/null
+++ b/test/FrontendC/2007-11-07-CopyAggregateAlign.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc -S %s -o - | grep "align 2" | count 6
+struct A { char s, t, u, v; short a; };
+void q() { struct A a, b; a = b; }
diff --git a/test/FrontendC/2007-11-07-ZeroAggregateAlign.c b/test/FrontendC/2007-11-07-ZeroAggregateAlign.c
new file mode 100644
index 0000000..424120d
--- /dev/null
+++ b/test/FrontendC/2007-11-07-ZeroAggregateAlign.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc -S %s -o - | grep "align 2"
+struct A { short s; short t; int i; };
+void q() { struct A a = {0}; }
diff --git a/test/FrontendC/2007-11-27-SExtZExt.c b/test/FrontendC/2007-11-27-SExtZExt.c
new file mode 100644
index 0000000..2b6cd62
--- /dev/null
+++ b/test/FrontendC/2007-11-27-SExtZExt.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -emit-llvm -o - | grep "signext" | count 4
+
+signed char foo1() { return 1; }
+
+void foo2(signed short a) { }
+
+signed char foo3(void) { return 1; }
+
+void foo4(a) signed short a; { }
+
+
+
diff --git a/test/FrontendC/2007-11-28-GlobalInitializer.c b/test/FrontendC/2007-11-28-GlobalInitializer.c
new file mode 100644
index 0000000..c8c7a59
--- /dev/null
+++ b/test/FrontendC/2007-11-28-GlobalInitializer.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc -S %s -o -
+// PR1744
+typedef struct foo { int x; char *p; } FOO;
+extern FOO yy[];
+
+int *y = &((yy + 1)->x);
+void *z = &((yy + 1)->x);
+
diff --git a/test/FrontendC/2007-12-16-AsmNoUnwind.c b/test/FrontendC/2007-12-16-AsmNoUnwind.c
new file mode 100644
index 0000000..b080e6a
--- /dev/null
+++ b/test/FrontendC/2007-12-16-AsmNoUnwind.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc %s -S -o - | grep nounwind
+
+void bar() { asm (""); }
diff --git a/test/FrontendC/2007-12-VarArrayDebug.c b/test/FrontendC/2007-12-VarArrayDebug.c
new file mode 100644
index 0000000..966789e
--- /dev/null
+++ b/test/FrontendC/2007-12-VarArrayDebug.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S -g -O %s -o - | llc
+// RUN: %llvmgcc -S -g %s -o - | llc
+
+extern void foo (void);
+
+static
+void baz (int i)
+{
+ foo ();
+ typedef char A[i];
+ struct { A b; } *x = 0;
+}
+
+void
+bar (i)
+{
+ baz (i);
+}
diff --git a/test/FrontendC/2008-01-04-WideBitfield.c b/test/FrontendC/2008-01-04-WideBitfield.c
new file mode 100644
index 0000000..a0045a4
--- /dev/null
+++ b/test/FrontendC/2008-01-04-WideBitfield.c
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -S -o - %s
+// PR1386
+#include <stdint.h>
+
+struct X {
+ unsigned char pad : 4;
+ uint64_t a : 64;
+} __attribute__((packed)) x;
+
+uint64_t f(void)
+{
+ return x.a;
+}
diff --git a/test/FrontendC/2008-01-07-UnusualIntSize.c b/test/FrontendC/2008-01-07-UnusualIntSize.c
new file mode 100644
index 0000000..91beaf3
--- /dev/null
+++ b/test/FrontendC/2008-01-07-UnusualIntSize.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc %s -S -o - -O | grep i33
+// PR1721
+
+struct s {
+ unsigned long long u33: 33;
+} a, b;
+
+// This should turn into a real 33-bit add, not a 64-bit add.
+_Bool test(void) {
+ return a.u33 + b.u33 != 0;
+}
diff --git a/test/FrontendC/2008-01-11-ChainConsistency.c b/test/FrontendC/2008-01-11-ChainConsistency.c
new file mode 100644
index 0000000..13e48a3
--- /dev/null
+++ b/test/FrontendC/2008-01-11-ChainConsistency.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc -S %s -o - -fnested-functions | not grep nest
+
+void n1(void) { void a(void) { a(); } a(); }
diff --git a/test/FrontendC/2008-01-21-PackedBitFields.c b/test/FrontendC/2008-01-21-PackedBitFields.c
new file mode 100644
index 0000000..4c38dee
--- /dev/null
+++ b/test/FrontendC/2008-01-21-PackedBitFields.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc %s -S -o -
+
+typedef double Al1Double __attribute__((aligned(1)));
+struct x { int a:23; Al1Double v; };
+struct x X = { 5, 3.0 };
+double foo() { return X.v; }
+
diff --git a/test/FrontendC/2008-01-21-PackedStructField.c b/test/FrontendC/2008-01-21-PackedStructField.c
new file mode 100644
index 0000000..9cc1731
--- /dev/null
+++ b/test/FrontendC/2008-01-21-PackedStructField.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc %s -S -o -
+
+struct X { long double b; unsigned char c; double __attribute__((packed)) d; };
+struct X x = { 3.0L, 5, 3.0 };
+
+
+struct S2504 {
+ int e:17;
+ __attribute__((packed)) unsigned long long int f;
+} ;
+int fails;
+ extern struct S2504 s2504;
+void check2504va (int z) {
+ struct S2504 arg, *p;
+ long long int i = 0;
+ arg.f = i;
+}
+
diff --git a/test/FrontendC/2008-01-24-StructAlignAndBitFields.c b/test/FrontendC/2008-01-24-StructAlignAndBitFields.c
new file mode 100644
index 0000000..380a7ef
--- /dev/null
+++ b/test/FrontendC/2008-01-24-StructAlignAndBitFields.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc %s -S -o -
+
+struct U { char a; short b; int c:25; char d; } u;
+
diff --git a/test/FrontendC/2008-01-25-ByValReadNone.c b/test/FrontendC/2008-01-25-ByValReadNone.c
new file mode 100644
index 0000000..42e9c36
--- /dev/null
+++ b/test/FrontendC/2008-01-25-ByValReadNone.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | not grep readonly
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | not grep readnone
+
+
+// The struct being passed byval means that we cannot mark the
+// function readnone. Readnone would allow stores to the arg to
+// be deleted in the caller. We also don't allow readonly since
+// the callee might write to the byval parameter. The inliner
+// would have to assume the worse and introduce an explicit
+// temporary when inlining such a function, which is costly for
+// the common case in which the byval argument is not written.
+struct S { int A[1000]; };
+int __attribute__ ((const)) f(struct S x) { x.A[1] = 0; return x.A[0]; }
+int g(struct S x) __attribute__ ((pure));
+int h(struct S x) { return g(x); }
diff --git a/test/FrontendC/2008-01-25-ZeroSizedAggregate.c b/test/FrontendC/2008-01-25-ZeroSizedAggregate.c
new file mode 100644
index 0000000..643caff
--- /dev/null
+++ b/test/FrontendC/2008-01-25-ZeroSizedAggregate.c
@@ -0,0 +1,39 @@
+// RUN: %llvmgcc %s -S -o -
+
+// Aggregates of size zero should be dropped from argument list.
+typedef long int Tlong;
+struct S2411 {
+ __attribute__((aligned)) Tlong:0;
+};
+
+extern struct S2411 a2411[5];
+extern void checkx2411(struct S2411);
+void test2411(void) {
+ checkx2411(a2411[0]);
+}
+
+// Proper handling of zero sized fields during type conversion.
+typedef unsigned long long int Tal2ullong __attribute__((aligned(2)));
+struct S2525 {
+ Tal2ullong: 0;
+ struct {
+ } e;
+};
+struct S2525 s2525;
+
+struct {
+ signed char f;
+ char :0;
+ struct{}h;
+ char * i[5];
+} data;
+
+// Taking address of a zero sized field.
+struct Z {};
+struct Y {
+ int i;
+ struct Z z;
+};
+void *f(struct Y *y) {
+ return &y->z;
+}
diff --git a/test/FrontendC/2008-01-28-PragmaMark.c b/test/FrontendC/2008-01-28-PragmaMark.c
new file mode 100644
index 0000000..0b3ac17
--- /dev/null
+++ b/test/FrontendC/2008-01-28-PragmaMark.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -Werror -c %s -o /dev/null
+#pragma mark LLVM's world
+#ifdef DO_ERROR
+#error LLVM's world
+#endif
+int i;
diff --git a/test/FrontendC/2008-01-28-UnionSize.c b/test/FrontendC/2008-01-28-UnionSize.c
new file mode 100644
index 0000000..ea2c863
--- /dev/null
+++ b/test/FrontendC/2008-01-28-UnionSize.c
@@ -0,0 +1,24 @@
+// RUN: %llvmgcc %s -S -o -
+// PR 1861
+
+typedef unsigned char __u8;
+typedef unsigned int __u32;
+typedef unsigned short u16;
+typedef __u32 __le32;
+struct bcm43xx_plcp_hdr6 {
+ union {
+ __le32 data;
+ __u8 raw[6];
+ }
+ __attribute__((__packed__));
+}
+ __attribute__((__packed__));
+struct bcm43xx_txhdr {
+ union {
+ struct {
+ struct bcm43xx_plcp_hdr6 plcp;
+ };
+ };
+}
+ __attribute__((__packed__));
+static void bcm43xx_generate_rts(struct bcm43xx_txhdr *txhdr ) { }
diff --git a/test/FrontendC/2008-02-11-AnnotateBuiltin.c b/test/FrontendC/2008-02-11-AnnotateBuiltin.c
new file mode 100644
index 0000000..32bc7a8
--- /dev/null
+++ b/test/FrontendC/2008-02-11-AnnotateBuiltin.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc %s -S -o - | llvm-as | llvm-dis | grep llvm.annotation
+
+int main() {
+ int x = 0;
+ return __builtin_annotation(x, "annotate");
+}
+
diff --git a/test/FrontendC/2008-03-03-CtorAttrType.c b/test/FrontendC/2008-03-03-CtorAttrType.c
new file mode 100644
index 0000000..dc0e47d
--- /dev/null
+++ b/test/FrontendC/2008-03-03-CtorAttrType.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.global_ctors
+int __attribute__((constructor)) foo(void) {
+ return 0;
+}
+void __attribute__((constructor)) bar(void) {}
+
diff --git a/test/FrontendC/2008-03-05-syncPtr.c b/test/FrontendC/2008-03-05-syncPtr.c
new file mode 100644
index 0000000..43e4671
--- /dev/null
+++ b/test/FrontendC/2008-03-05-syncPtr.c
@@ -0,0 +1,27 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.atomic
+// XFAIL: sparc-sun-solaris2|arm
+// Feature currently implemented only for x86, alpha, powerpc.
+
+int* foo(int** a, int* b, int* c) {
+return __sync_val_compare_and_swap (a, b, c);
+}
+
+int foo2(int** a, int* b, int* c) {
+return __sync_bool_compare_and_swap (a, b, c);
+}
+
+int* foo3(int** a, int b) {
+ return __sync_fetch_and_add (a, b);
+}
+
+int* foo4(int** a, int b) {
+ return __sync_fetch_and_sub (a, b);
+}
+
+int* foo5(int** a, int* b) {
+ return __sync_lock_test_and_set (a, b);
+}
+
+int* foo6(int** a, int*** b) {
+ return __sync_lock_test_and_set (a, b);
+}
diff --git a/test/FrontendC/2008-03-24-BitField-And-Alloca.c b/test/FrontendC/2008-03-24-BitField-And-Alloca.c
new file mode 100644
index 0000000..291f036
--- /dev/null
+++ b/test/FrontendC/2008-03-24-BitField-And-Alloca.c
@@ -0,0 +1,89 @@
+// RUN: %llvmgcc -O2 -S %s -o - | not grep alloca
+// RUN: %llvmgcc -m32 -O2 -S %s -o - | not grep store
+
+enum {
+ PP_C,
+ PP_D,
+ PP_R,
+ PP_2D,
+ PP_1D,
+ PP_SR,
+ PP_S2D,
+ PP_S1D,
+ PP_SC
+};
+
+enum {
+ G_VP,
+ G_FP,
+ G_VS,
+ G_GS,
+ G_FS
+};
+
+enum {
+ G_NONE,
+ G_B,
+ G_R
+};
+
+typedef union _Key {
+ struct {
+ unsigned int count : 2;
+ unsigned int Aconst : 1;
+ unsigned int Bconst : 1;
+ unsigned int Cconst : 1;
+ unsigned int Xused : 1;
+ unsigned int Yused : 1;
+ unsigned int Zused : 1;
+ unsigned int Wused : 1;
+ unsigned int ttype : 3;
+ unsigned int scalar : 1;
+ unsigned int AType : 4;
+ unsigned int BType : 4;
+ unsigned int CType : 4;
+ unsigned int RType : 4;
+ unsigned int Size : 2;
+ unsigned int prec : 1;
+
+ unsigned int ASize : 2;
+ unsigned int BSize : 2;
+ unsigned int CSize : 2;
+ unsigned int tTex : 4;
+ unsigned int proj : 1;
+ unsigned int lod : 2;
+ unsigned int dvts : 1;
+ unsigned int uipad : 18;
+ } key_io;
+ struct {
+ unsigned int key0;
+ unsigned int key1;
+ } key;
+ unsigned long long lkey;
+} Key;
+
+static void foo(const Key iospec, int* ret)
+{
+ *ret=0;
+ if(((iospec.key_io.lod == G_B) &&
+ (iospec.key_io.ttype != G_VS) &&
+ (iospec.key_io.ttype != G_GS) &&
+ (iospec.key_io.ttype != G_FS)) ||
+
+ (((iospec.key_io.tTex == PP_C) ||
+ (iospec.key_io.tTex == PP_SC)) &&
+ ((iospec.key_io.tTex == PP_SR) ||
+ (iospec.key_io.tTex == PP_S2D) ||
+ (iospec.key_io.tTex == PP_S1D) ||
+ (iospec.key_io.tTex == PP_SC))))
+ *ret=1;
+}
+
+
+extern int bar(unsigned long long key_token2)
+{
+ int ret;
+ __attribute__ ((unused)) Key iospec = (Key) key_token2;
+ foo(iospec, &ret);
+ return ret;
+}
diff --git a/test/FrontendC/2008-03-26-PackedBitFields.c b/test/FrontendC/2008-03-26-PackedBitFields.c
new file mode 100644
index 0000000..7214281
--- /dev/null
+++ b/test/FrontendC/2008-03-26-PackedBitFields.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc %s -S -o -
+
+
+struct S1757 {
+ long double c;
+ long int __attribute__((packed)) e:28;
+} x;
diff --git a/test/FrontendC/2008-04-08-NoExceptions.c b/test/FrontendC/2008-04-08-NoExceptions.c
new file mode 100644
index 0000000..257fee2
--- /dev/null
+++ b/test/FrontendC/2008-04-08-NoExceptions.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S -o - %s | grep nounwind | count 2
+// RUN: %llvmgcc -S -o - %s | not grep {declare.*nounwind}
+
+void f(void);
+void g(void) {
+ f();
+}
diff --git a/test/FrontendC/2008-05-06-CFECrash.c b/test/FrontendC/2008-05-06-CFECrash.c
new file mode 100644
index 0000000..94d556c
--- /dev/null
+++ b/test/FrontendC/2008-05-06-CFECrash.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -S -O2 %s -o /dev/null
+// PR2292.
+__inline__ __attribute__ ((__pure__)) int g (void) {}
+void f (int k) { k = g (); }
diff --git a/test/FrontendC/2008-05-12-TempUsedBeforeDef.c b/test/FrontendC/2008-05-12-TempUsedBeforeDef.c
new file mode 100644
index 0000000..21724c1
--- /dev/null
+++ b/test/FrontendC/2008-05-12-TempUsedBeforeDef.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc -w -S -o /dev/null %s
+// PR2264.
+unsigned foo = 8L;
+unsigned bar = 0L;
+volatile unsigned char baz = 6L;
+int test() {
+ char qux = 1L;
+ for (; baz >= -29; baz--)
+ bork(bar && foo, qux);
+}
diff --git a/test/FrontendC/2008-05-19-AlwaysInline.c b/test/FrontendC/2008-05-19-AlwaysInline.c
new file mode 100644
index 0000000..506f6cf
--- /dev/null
+++ b/test/FrontendC/2008-05-19-AlwaysInline.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc %s -S -fno-unit-at-a-time -emit-llvm -O0 -o - | not grep sabrina
+// RUN: %llvmgcc %s -S -funit-at-a-time -emit-llvm -O0 -o - | not grep sabrina
+
+static inline int sabrina (void) __attribute__((always_inline));
+static inline int sabrina (void)
+{
+ return 13;
+}
+int bar (void)
+{
+ return sabrina () + 68;
+}
diff --git a/test/FrontendC/2008-07-08-FAbsAttributes.c b/test/FrontendC/2008-07-08-FAbsAttributes.c
new file mode 100644
index 0000000..1eb01dc
--- /dev/null
+++ b/test/FrontendC/2008-07-08-FAbsAttributes.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -S %s -o - | grep readnone
+// PR2520
+#include <math.h>
+double f(double *x, double *y) { return fabs(*x + *y); }
diff --git a/test/FrontendC/2008-07-29-EHLabel.ll b/test/FrontendC/2008-07-29-EHLabel.ll
new file mode 100644
index 0000000..7577bc9
--- /dev/null
+++ b/test/FrontendC/2008-07-29-EHLabel.ll
@@ -0,0 +1,282 @@
+; RUN: llc %s -o - | %llvmgcc -xassembler -c -o /dev/null -
+; PR2609
+ %struct..0._11 = type { i32 }
+ %struct..1__pthread_mutex_s = type { i32, i32, i32, i32, i32, %struct..0._11 }
+ %struct.pthread_attr_t = type { i32, [32 x i8] }
+ %struct.pthread_mutex_t = type { %struct..1__pthread_mutex_s }
+ %"struct.std::__ctype_abstract_base<wchar_t>" = type { %"struct.std::locale::facet" }
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::__ctype_abstract_base<wchar_t>"*, %"struct.std::__ctype_abstract_base<wchar_t>"* }
+ %"struct.std::basic_istream<char,std::char_traits<char> >" = type { i32 (...)**, i32, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_istream<char,std::char_traits<char> >::sentry" = type { i8 }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+
+@_ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+@_ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
+@_ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_cancelm = alias weak i32 (i32)* @pthread_cancel ; <i32 (i32)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._11*)* @pthread_mutex_init ; <i32 (%struct.pthread_mutex_t*, %struct..0._11*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
+@_ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%struct..0._11*)* @pthread_mutexattr_init ; <i32 (%struct..0._11*)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%struct..0._11*, i32)* @pthread_mutexattr_settype ; <i32 (%struct..0._11*, i32)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%struct..0._11*)* @pthread_mutexattr_destroy ; <i32 (%struct..0._11*)*> [#uses=0]
+
+define %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSi7getlineEPcic(%"struct.std::basic_istream<char,std::char_traits<char> >"* %this, i8* %__s, i32 %__n, i8 signext %__delim) {
+entry:
+ %__cerb = alloca %"struct.std::basic_istream<char,std::char_traits<char> >::sentry" ; <%"struct.std::basic_istream<char,std::char_traits<char> >::sentry"*> [#uses=2]
+ getelementptr %"struct.std::basic_istream<char,std::char_traits<char> >"* %this, i32 0, i32 1 ; <i32*>:0 [#uses=7]
+ store i32 0, i32* %0, align 4
+ call void @_ZNSi6sentryC1ERSib( %"struct.std::basic_istream<char,std::char_traits<char> >::sentry"* %__cerb, %"struct.std::basic_istream<char,std::char_traits<char> >"* %this, i8 zeroext 1 )
+ getelementptr %"struct.std::basic_istream<char,std::char_traits<char> >::sentry"* %__cerb, i32 0, i32 0 ; <i8*>:1 [#uses=1]
+ load i8* %1, align 8 ; <i8>:2 [#uses=1]
+ %toBool = icmp eq i8 %2, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb162, label %bb
+
+bb: ; preds = %entry
+ zext i8 %__delim to i32 ; <i32>:3 [#uses=1]
+ getelementptr %"struct.std::basic_istream<char,std::char_traits<char> >"* %this, i32 0, i32 0 ; <i32 (...)***>:4 [#uses=1]
+ load i32 (...)*** %4, align 4 ; <i32 (...)**>:5 [#uses=1]
+ getelementptr i32 (...)** %5, i32 -3 ; <i32 (...)**>:6 [#uses=1]
+ bitcast i32 (...)** %6 to i32* ; <i32*>:7 [#uses=1]
+ load i32* %7, align 4 ; <i32>:8 [#uses=1]
+ bitcast %"struct.std::basic_istream<char,std::char_traits<char> >"* %this to i8* ; <i8*>:9 [#uses=1]
+ %ctg2186 = getelementptr i8* %9, i32 %8 ; <i8*> [#uses=1]
+ bitcast i8* %ctg2186 to %"struct.std::basic_ios<char,std::char_traits<char> >"* ; <%"struct.std::basic_ios<char,std::char_traits<char> >"*>:10 [#uses=1]
+ getelementptr %"struct.std::basic_ios<char,std::char_traits<char> >"* %10, i32 0, i32 4 ; <%"struct.std::basic_streambuf<char,std::char_traits<char> >"**>:11 [#uses=1]
+ load %"struct.std::basic_streambuf<char,std::char_traits<char> >"** %11, align 4 ; <%"struct.std::basic_streambuf<char,std::char_traits<char> >"*>:12 [#uses=9]
+ getelementptr %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12, i32 0, i32 2 ; <i8**>:13 [#uses=10]
+ load i8** %13, align 4 ; <i8*>:14 [#uses=2]
+ getelementptr %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12, i32 0, i32 3 ; <i8**>:15 [#uses=6]
+ load i8** %15, align 4 ; <i8*>:16 [#uses=1]
+ icmp ult i8* %14, %16 ; <i1>:17 [#uses=1]
+ br i1 %17, label %bb81, label %bb82
+
+bb81: ; preds = %bb
+ load i8* %14, align 1 ; <i8>:18 [#uses=1]
+ zext i8 %18 to i32 ; <i32>:19 [#uses=1]
+ %.pre = getelementptr %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ br label %bb119.preheader
+
+bb82: ; preds = %bb
+ getelementptr %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12, i32 0, i32 0 ; <i32 (...)***>:20 [#uses=2]
+ load i32 (...)*** %20, align 4 ; <i32 (...)**>:21 [#uses=1]
+ getelementptr i32 (...)** %21, i32 9 ; <i32 (...)**>:22 [#uses=1]
+ load i32 (...)** %22, align 4 ; <i32 (...)*>:23 [#uses=1]
+ bitcast i32 (...)* %23 to i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)* ; <i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)*>:24 [#uses=1]
+ invoke i32 %24( %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12 )
+ to label %bb119.preheader unwind label %lpad ; <i32>:25 [#uses=1]
+
+bb119.preheader: ; preds = %bb82, %bb81
+ %.pre-phi = phi i32 (...)*** [ %.pre, %bb81 ], [ %20, %bb82 ] ; <i32 (...)***> [#uses=4]
+ %__c79.0.ph = phi i32 [ %19, %bb81 ], [ %25, %bb82 ] ; <i32> [#uses=1]
+ sext i8 %__delim to i32 ; <i32>:26 [#uses=1]
+ br label %bb119
+
+bb84: ; preds = %bb119
+ sub i32 %__n, %82 ; <i32>:27 [#uses=1]
+ add i32 %27, -1 ; <i32>:28 [#uses=2]
+ load i8** %15, align 4 ; <i8*>:29 [#uses=1]
+ ptrtoint i8* %29 to i32 ; <i32>:30 [#uses=1]
+ load i8** %13, align 4 ; <i8*>:31 [#uses=3]
+ ptrtoint i8* %31 to i32 ; <i32>:32 [#uses=2]
+ sub i32 %30, %32 ; <i32>:33 [#uses=2]
+ icmp slt i32 %28, %33 ; <i1>:34 [#uses=1]
+ select i1 %34, i32 %28, i32 %33 ; <i32>:35 [#uses=3]
+ icmp sgt i32 %35, 1 ; <i1>:36 [#uses=1]
+ br i1 %36, label %bb90, label %bb99
+
+bb90: ; preds = %bb84
+ call i8* @memchr( i8* %31, i32 %26, i32 %35 ) nounwind readonly ; <i8*>:37 [#uses=2]
+ icmp eq i8* %37, null ; <i1>:38 [#uses=1]
+ br i1 %38, label %bb93, label %bb92
+
+bb92: ; preds = %bb90
+ ptrtoint i8* %37 to i32 ; <i32>:39 [#uses=1]
+ sub i32 %39, %32 ; <i32>:40 [#uses=1]
+ br label %bb93
+
+bb93: ; preds = %bb92, %bb90
+ %__size.0 = phi i32 [ %40, %bb92 ], [ %35, %bb90 ] ; <i32> [#uses=4]
+ call void @llvm.memcpy.i32( i8* %__s_addr.0, i8* %31, i32 %__size.0, i32 1 )
+ getelementptr i8* %__s_addr.0, i32 %__size.0 ; <i8*>:41 [#uses=3]
+ load i8** %13, align 4 ; <i8*>:42 [#uses=1]
+ getelementptr i8* %42, i32 %__size.0 ; <i8*>:43 [#uses=1]
+ store i8* %43, i8** %13, align 4
+ load i32* %0, align 4 ; <i32>:44 [#uses=1]
+ add i32 %44, %__size.0 ; <i32>:45 [#uses=1]
+ store i32 %45, i32* %0, align 4
+ load i8** %13, align 4 ; <i8*>:46 [#uses=2]
+ load i8** %15, align 4 ; <i8*>:47 [#uses=1]
+ icmp ult i8* %46, %47 ; <i1>:48 [#uses=1]
+ br i1 %48, label %bb95, label %bb96
+
+bb95: ; preds = %bb93
+ load i8* %46, align 1 ; <i8>:49 [#uses=1]
+ zext i8 %49 to i32 ; <i32>:50 [#uses=1]
+ br label %bb119
+
+bb96: ; preds = %bb93
+ load i32 (...)*** %.pre-phi, align 4 ; <i32 (...)**>:51 [#uses=1]
+ getelementptr i32 (...)** %51, i32 9 ; <i32 (...)**>:52 [#uses=1]
+ load i32 (...)** %52, align 4 ; <i32 (...)*>:53 [#uses=1]
+ bitcast i32 (...)* %53 to i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)* ; <i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)*>:54 [#uses=1]
+ invoke i32 %54( %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12 )
+ to label %bb119 unwind label %lpad ; <i32>:55 [#uses=1]
+
+bb99: ; preds = %bb84
+ trunc i32 %__c79.0 to i8 ; <i8>:56 [#uses=1]
+ store i8 %56, i8* %__s_addr.0, align 1
+ getelementptr i8* %__s_addr.0, i32 1 ; <i8*>:57 [#uses=5]
+ load i32* %0, align 4 ; <i32>:58 [#uses=1]
+ add i32 %58, 1 ; <i32>:59 [#uses=1]
+ store i32 %59, i32* %0, align 4
+ load i8** %13, align 4 ; <i8*>:60 [#uses=3]
+ load i8** %15, align 4 ; <i8*>:61 [#uses=1]
+ icmp ult i8* %60, %61 ; <i1>:62 [#uses=1]
+ br i1 %62, label %bb101, label %bb102
+
+bb101: ; preds = %bb99
+ load i8* %60, align 1 ; <i8>:63 [#uses=1]
+ zext i8 %63 to i32 ; <i32>:64 [#uses=1]
+ getelementptr i8* %60, i32 1 ; <i8*>:65 [#uses=1]
+ store i8* %65, i8** %13, align 4
+ br label %bb104
+
+bb102: ; preds = %bb99
+ load i32 (...)*** %.pre-phi, align 4 ; <i32 (...)**>:66 [#uses=1]
+ getelementptr i32 (...)** %66, i32 10 ; <i32 (...)**>:67 [#uses=1]
+ load i32 (...)** %67, align 4 ; <i32 (...)*>:68 [#uses=1]
+ bitcast i32 (...)* %68 to i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)* ; <i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)*>:69 [#uses=1]
+ invoke i32 %69( %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12 )
+ to label %bb104 unwind label %lpad ; <i32>:70 [#uses=1]
+
+bb104: ; preds = %bb102, %bb101
+ %__ret44.0 = phi i32 [ %64, %bb101 ], [ %70, %bb102 ] ; <i32> [#uses=1]
+ icmp eq i32 %__ret44.0, -1 ; <i1>:71 [#uses=1]
+ br i1 %71, label %bb119, label %bb112
+
+bb112: ; preds = %bb104
+ load i8** %13, align 4 ; <i8*>:72 [#uses=2]
+ load i8** %15, align 4 ; <i8*>:73 [#uses=1]
+ icmp ult i8* %72, %73 ; <i1>:74 [#uses=1]
+ br i1 %74, label %bb114, label %bb115
+
+bb114: ; preds = %bb112
+ load i8* %72, align 1 ; <i8>:75 [#uses=1]
+ zext i8 %75 to i32 ; <i32>:76 [#uses=1]
+ br label %bb119
+
+bb115: ; preds = %bb112
+ load i32 (...)*** %.pre-phi, align 4 ; <i32 (...)**>:77 [#uses=1]
+ getelementptr i32 (...)** %77, i32 9 ; <i32 (...)**>:78 [#uses=1]
+ load i32 (...)** %78, align 4 ; <i32 (...)*>:79 [#uses=1]
+ bitcast i32 (...)* %79 to i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)* ; <i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)*>:80 [#uses=1]
+ invoke i32 %80( %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12 )
+ to label %bb119 unwind label %lpad ; <i32>:81 [#uses=1]
+
+bb119: ; preds = %bb115, %bb114, %bb104, %bb96, %bb95, %bb119.preheader
+ %__c79.0 = phi i32 [ %__c79.0.ph, %bb119.preheader ], [ %50, %bb95 ], [ %76, %bb114 ], [ %55, %bb96 ], [ -1, %bb104 ], [ %81, %bb115 ] ; <i32> [#uses=3]
+ %__s_addr.0 = phi i8* [ %__s, %bb119.preheader ], [ %41, %bb95 ], [ %57, %bb114 ], [ %41, %bb96 ], [ %57, %bb104 ], [ %57, %bb115 ] ; <i8*> [#uses=5]
+ load i32* %0, align 4 ; <i32>:82 [#uses=2]
+ add i32 %82, 1 ; <i32>:83 [#uses=2]
+ %.not = icmp sge i32 %83, %__n ; <i1> [#uses=1]
+ icmp eq i32 %__c79.0, -1 ; <i1>:84 [#uses=3]
+ icmp eq i32 %__c79.0, %3 ; <i1>:85 [#uses=2]
+ %or.cond = or i1 %84, %85 ; <i1> [#uses=1]
+ %or.cond188 = or i1 %or.cond, %.not ; <i1> [#uses=1]
+ br i1 %or.cond188, label %bb141, label %bb84
+
+bb141: ; preds = %bb119
+ %.not194 = xor i1 %85, true ; <i1> [#uses=1]
+ %brmerge = or i1 %84, %.not194 ; <i1> [#uses=1]
+ %.mux = select i1 %84, i32 2, i32 4 ; <i32> [#uses=0]
+ br i1 %brmerge, label %bb162, label %bb146
+
+bb146: ; preds = %bb141
+ store i32 %83, i32* %0, align 4
+ load i8** %13, align 4 ; <i8*>:86 [#uses=2]
+ load i8** %15, align 4 ; <i8*>:87 [#uses=1]
+ icmp ult i8* %86, %87 ; <i1>:88 [#uses=1]
+ br i1 %88, label %bb148, label %bb149
+
+bb148: ; preds = %bb146
+ getelementptr i8* %86, i32 1 ; <i8*>:89 [#uses=1]
+ store i8* %89, i8** %13, align 4
+ ret %"struct.std::basic_istream<char,std::char_traits<char> >"* %this
+
+bb149: ; preds = %bb146
+ load i32 (...)*** %.pre-phi, align 4 ; <i32 (...)**>:90 [#uses=1]
+ getelementptr i32 (...)** %90, i32 10 ; <i32 (...)**>:91 [#uses=1]
+ load i32 (...)** %91, align 4 ; <i32 (...)*>:92 [#uses=1]
+ bitcast i32 (...)* %92 to i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)* ; <i32 (%"struct.std::basic_streambuf<char,std::char_traits<char> >"*)*>:93 [#uses=1]
+ invoke i32 %93( %"struct.std::basic_streambuf<char,std::char_traits<char> >"* %12 )
+ to label %bb162 unwind label %lpad ; <i32>:94 [#uses=0]
+
+bb162: ; preds = %bb149, %bb141, %entry
+ ret %"struct.std::basic_istream<char,std::char_traits<char> >"* %this
+
+lpad: ; preds = %bb149, %bb115, %bb102, %bb96, %bb82
+ %__s_addr.1 = phi i8* [ %__s, %bb82 ], [ %__s_addr.0, %bb149 ], [ %41, %bb96 ], [ %57, %bb102 ], [ %57, %bb115 ] ; <i8*> [#uses=0]
+ call void @__cxa_rethrow( ) noreturn
+ unreachable
+}
+
+declare i8* @__cxa_begin_catch(i8*) nounwind
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
+
+declare void @__cxa_rethrow() noreturn
+
+declare void @__cxa_end_catch()
+
+declare i32 @__gxx_personality_v0(...)
+
+declare void @_ZNSi6sentryC1ERSib(%"struct.std::basic_istream<char,std::char_traits<char> >::sentry"*, %"struct.std::basic_istream<char,std::char_traits<char> >"*, i8 zeroext )
+
+declare i8* @memchr(i8*, i32, i32) nounwind readonly
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+declare void @_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate(%"struct.std::basic_ios<char,std::char_traits<char> >"*, i32)
+
+declare extern_weak i32 @pthread_once(i32*, void ()*)
+
+declare extern_weak i8* @pthread_getspecific(i32)
+
+declare extern_weak i32 @pthread_setspecific(i32, i8*)
+
+declare extern_weak i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare extern_weak i32 @pthread_cancel(i32)
+
+declare extern_weak i32 @pthread_mutex_lock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %struct..0._11*)
+
+declare extern_weak i32 @pthread_key_create(i32*, void (i8*)*)
+
+declare extern_weak i32 @pthread_key_delete(i32)
+
+declare extern_weak i32 @pthread_mutexattr_init(%struct..0._11*)
+
+declare extern_weak i32 @pthread_mutexattr_settype(%struct..0._11*, i32)
+
+declare extern_weak i32 @pthread_mutexattr_destroy(%struct..0._11*)
diff --git a/test/FrontendC/2008-08-07-AlignPadding1.c b/test/FrontendC/2008-08-07-AlignPadding1.c
new file mode 100644
index 0000000..776b105
--- /dev/null
+++ b/test/FrontendC/2008-08-07-AlignPadding1.c
@@ -0,0 +1,29 @@
+/* RUN: %llvmgcc %s -S -o - -emit-llvm -O0 | grep {zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer}
+
+The FE must generate padding here both at the end of each PyG_Head and
+between array elements. Reduced from Python. */
+
+typedef union _gc_head {
+ struct {
+ union _gc_head *gc_next;
+ union _gc_head *gc_prev;
+ long gc_refs;
+ } gc;
+ int dummy __attribute__((aligned(16)));
+} PyGC_Head;
+
+struct gc_generation {
+ PyGC_Head head;
+ int threshold;
+ int count;
+};
+
+#define GEN_HEAD(n) (&generations[n].head)
+
+/* linked lists of container objects */
+static struct gc_generation generations[3] = {
+ /* PyGC_Head, threshold, count */
+ {{{GEN_HEAD(0), GEN_HEAD(0), 0}}, 700, 0},
+ {{{GEN_HEAD(1), GEN_HEAD(1), 0}}, 10, 0},
+ {{{GEN_HEAD(2), GEN_HEAD(2), 0}}, 10, 0},
+};
diff --git a/test/FrontendC/2008-08-07-AlignPadding2.c b/test/FrontendC/2008-08-07-AlignPadding2.c
new file mode 100644
index 0000000..ea13a0a
--- /dev/null
+++ b/test/FrontendC/2008-08-07-AlignPadding2.c
@@ -0,0 +1,18 @@
+/* RUN: %llvmgcc %s -S -o - -emit-llvm -O0 | grep zeroinitializer | count 1
+
+The FE must not generate padding here between array elements. PR 2533. */
+
+typedef struct {
+ const char *name;
+ int flags;
+ union {
+ int x;
+ } u;
+} OptionDef;
+
+const OptionDef options[] = {
+ /* main options */
+ { "a", 0, {3} },
+ { "b", 0, {4} },
+ { 0, },
+};
diff --git a/test/FrontendC/2008-08-07-GEPIntToPtr.c b/test/FrontendC/2008-08-07-GEPIntToPtr.c
new file mode 100644
index 0000000..3ef3b66
--- /dev/null
+++ b/test/FrontendC/2008-08-07-GEPIntToPtr.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S %s -o - | grep {i8 1}
+// PR2603
+
+struct A {
+ char num_fields;
+};
+
+struct B {
+ char a, b[1];
+};
+
+const struct A Foo = {
+ (char *)(&( (struct B *)(16) )->b[0]) - (char *)(16)
+};
diff --git a/test/FrontendC/2008-09-03-WeakAlias.c b/test/FrontendC/2008-09-03-WeakAlias.c
new file mode 100644
index 0000000..2e5f3da
--- /dev/null
+++ b/test/FrontendC/2008-09-03-WeakAlias.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S -O1 -o - %s | grep icmp
+// PR1678
+extern void B (void);
+static __typeof(B) A __attribute__ ((__weakref__("B")));
+int active (void)
+{
+ static void *const p = __extension__ (void *) &A;
+ return p != 0;
+}
diff --git a/test/FrontendC/2008-10-13-FrontendCrash.c b/test/FrontendC/2008-10-13-FrontendCrash.c
new file mode 100644
index 0000000..c9731e3
--- /dev/null
+++ b/test/FrontendC/2008-10-13-FrontendCrash.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -S -o -
+// PR2797
+
+unsigned int
+func_48 (signed char p_49)
+{
+ signed char l_340;
+ func_44 (1&((1 ^ 1 == (lshift_u_s (1)) != (l_340 < 1)) & 1L));
+}
diff --git a/test/FrontendC/2008-10-30-ZeroPlacement.c b/test/FrontendC/2008-10-30-ZeroPlacement.c
new file mode 100644
index 0000000..ec4ea94
--- /dev/null
+++ b/test/FrontendC/2008-10-30-ZeroPlacement.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -c %s
+// PR2987
+struct S2045
+{
+ unsigned short int a;
+ union { } b;
+ union __attribute__ ((aligned (4))) { } c[0];
+};
+struct S2045 s2045;
diff --git a/test/FrontendC/2008-11-02-WeakAlias.c b/test/FrontendC/2008-11-02-WeakAlias.c
new file mode 100644
index 0000000..4bdc5c7
--- /dev/null
+++ b/test/FrontendC/2008-11-02-WeakAlias.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc -S -emit-llvm -o - %s | grep weak
+// PR2691
+
+void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
+void native_init_IRQ(void) {}
\ No newline at end of file
diff --git a/test/FrontendC/2008-11-08-InstCombineSelect.c b/test/FrontendC/2008-11-08-InstCombineSelect.c
new file mode 100644
index 0000000..70c8d3a
--- /dev/null
+++ b/test/FrontendC/2008-11-08-InstCombineSelect.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O2 -o -
+// PR3028
+
+int g_187;
+int g_204;
+int g_434;
+
+int func_89 (void)
+{
+ return 1;
+}
+
+void func_20 (int p_22)
+{
+ if (1 & p_22 | g_204 & (1 < g_187) - func_89 ())
+ g_434 = 1;
+}
diff --git a/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c b/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c
new file mode 100644
index 0000000..fa5713e
--- /dev/null
+++ b/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.ptr.annotation | count 3
+
+#include <stdio.h>
+
+/* Struct with element X being annotated */
+struct foo {
+ int X __attribute__((annotate("StructAnnotation")));
+ int Y;
+ int Z;
+};
+
+
+void test(struct foo *F) {
+ F->X = 42;
+ F->Z = 1;
+ F->Y = F->X;
+}
+
diff --git a/test/FrontendC/2008-12-23-AsmIntPointerTie.c b/test/FrontendC/2008-12-23-AsmIntPointerTie.c
new file mode 100644
index 0000000..da2eda6
--- /dev/null
+++ b/test/FrontendC/2008-12-23-AsmIntPointerTie.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O1 -o -
+
+#include <stdint.h>
+
+int test(void *b) {
+ intptr_t a;
+ __asm__ __volatile__ ("%0 %1 " : "=r" (a): "0" (b));
+ return a;
+}
diff --git a/test/FrontendC/2009-01-05-BlockInlining.c b/test/FrontendC/2009-01-05-BlockInlining.c
new file mode 100644
index 0000000..9692d8f
--- /dev/null
+++ b/test/FrontendC/2009-01-05-BlockInlining.c
@@ -0,0 +1,28 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O2 -o %t.s
+// RUN: grep {call i32 .*printf.*argc} %t.s | count 3
+// RUN: not grep __block_holder_tmp %t.s
+// rdar://5865221
+
+// All of these should be inlined equivalently into a single printf call.
+
+static int fun(int x) {
+ return x+1;
+}
+
+static int block(int x) {
+ return (^(int x){return x+1;})(x);
+}
+
+static void print(int result) {
+ printf("%d\n", result);
+}
+
+int main (int argc, const char * argv[]) {
+ int x = argc-1;
+ print(fun(x));
+ print(block(x));
+ int (^block_inline)(int) = ^(int x){return x+1;};
+ print(block_inline(x));
+ return 0;
+}
+
diff --git a/test/FrontendC/2009-01-20-k8.c b/test/FrontendC/2009-01-20-k8.c
new file mode 100644
index 0000000..d28302b
--- /dev/null
+++ b/test/FrontendC/2009-01-20-k8.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc %s -S -march=k8
+// XFAIL: *
+// XTARGET: x86,i386,i686
+long double x;
diff --git a/test/FrontendC/2009-01-21-InvalidIterator.c b/test/FrontendC/2009-01-21-InvalidIterator.c
new file mode 100644
index 0000000..310ea3b
--- /dev/null
+++ b/test/FrontendC/2009-01-21-InvalidIterator.c
@@ -0,0 +1,74 @@
+// RUN: %llvmgcc %s -S -g
+
+typedef long unsigned int size_t;
+typedef unsigned short int uint16_t;
+typedef unsigned int uint32_t;
+typedef unsigned long int uint64_t;
+typedef uint16_t Elf64_Half;
+typedef uint32_t Elf64_Word;
+typedef uint64_t Elf64_Xword;
+typedef uint64_t Elf64_Addr;
+typedef uint64_t Elf64_Off;
+typedef struct
+{
+ Elf64_Word p_type;
+ Elf64_Off p_offset;
+ Elf64_Addr p_vaddr;
+ Elf64_Xword p_align;
+}
+Elf64_Phdr;
+struct dl_phdr_info
+{
+ const char *dlpi_name;
+ const Elf64_Phdr *dlpi_phdr;
+ Elf64_Half dlpi_phnum;
+ unsigned long long int dlpi_adds;
+};
+typedef unsigned _Unwind_Ptr;
+struct object
+{
+ union
+ {
+ const struct dwarf_fde *single;
+ struct dwarf_fde **array;
+ struct fde_vector *sort;
+ }
+ u;
+ union
+ {
+ struct
+ {
+ }
+ b;
+ }
+ s;
+ struct object *next;
+};
+typedef int sword;
+typedef unsigned int uword;
+struct dwarf_fde
+{
+ uword length;
+ sword CIE_delta;
+ unsigned char pc_begin[];
+};
+typedef struct dwarf_fde fde;
+struct unw_eh_callback_data
+{
+ const fde *ret;
+ struct frame_hdr_cache_element *link;
+}
+frame_hdr_cache[8];
+
+_Unwind_Ptr
+base_from_cb_data (struct unw_eh_callback_data *data)
+{
+}
+
+void
+_Unwind_IteratePhdrCallback (struct dl_phdr_info *info, size_t size, void *ptr)
+{
+ const unsigned char *p;
+ const struct unw_eh_frame_hdr *hdr;
+ struct object ob;
+}
diff --git a/test/FrontendC/2009-02-13-zerosize-union-field-ppc.c b/test/FrontendC/2009-02-13-zerosize-union-field-ppc.c
new file mode 100644
index 0000000..947166d
--- /dev/null
+++ b/test/FrontendC/2009-02-13-zerosize-union-field-ppc.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc %s -m32 -S -o - | grep {i32 32} | count 3
+// XFAIL: *
+// XTARGET: powerpc
+// Every printf has 'i32 0' for the GEP of the string; no point counting those.
+typedef unsigned int Foo __attribute__((aligned(32)));
+typedef union{Foo:0;}a;
+typedef union{int x; Foo:0;}b;
+extern int printf(const char*, ...);
+main() {
+ printf("%ld\n", sizeof(a));
+ printf("%ld\n", __alignof__(a));
+ printf("%ld\n", sizeof(b));
+ printf("%ld\n", __alignof__(b));
+}
diff --git a/test/FrontendC/2009-02-13-zerosize-union-field.c b/test/FrontendC/2009-02-13-zerosize-union-field.c
new file mode 100644
index 0000000..ad33558
--- /dev/null
+++ b/test/FrontendC/2009-02-13-zerosize-union-field.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc %s -m32 -S -o - | grep {i32 1} | count 1
+// RUN: %llvmgcc %s -m32 -S -o - | grep {i32 4} | count 2
+// XFAIL: powerpc
+// Every printf has 'i32 0' for the GEP of the string; no point counting those.
+typedef unsigned int Foo __attribute__((aligned(32)));
+typedef union{Foo:0;}a;
+typedef union{int x; Foo:0;}b;
+extern int printf(const char*, ...);
+main() {
+ printf("%ld\n", sizeof(a));
+ printf("%ld\n", __alignof__(a));
+ printf("%ld\n", sizeof(b));
+ printf("%ld\n", __alignof__(b));
+}
diff --git a/test/FrontendC/2009-02-17-BitField-dbg.c b/test/FrontendC/2009-02-17-BitField-dbg.c
new file mode 100644
index 0000000..80ccc4a
--- /dev/null
+++ b/test/FrontendC/2009-02-17-BitField-dbg.c
@@ -0,0 +1,14 @@
+// Check bitfields.
+// RUN: %llvmgcc -S -O0 -g %s -o - | \
+// RUN: llc --disable-fp-elim -o 2009-02-17-BitField-dbg.s
+// RUN: %compile_c 2009-02-17-BitField-dbg.s -o 2009-02-17-BitField-dbg.o
+// RUN: echo {ptype mystruct} > %t2
+// RUN: gdb -q -batch -n -x %t2 2009-02-17-BitField-dbg.o | \
+// RUN: tee 2009-02-17-BitField-dbg.out | grep "int a : 4"
+//
+
+struct {
+ int a:4;
+ int b:2;
+} mystruct;
+
diff --git a/test/FrontendC/2009-03-01-MallocNoAlias.c b/test/FrontendC/2009-03-01-MallocNoAlias.c
new file mode 100644
index 0000000..22ff6cb
--- /dev/null
+++ b/test/FrontendC/2009-03-01-MallocNoAlias.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc %s -S -o - | grep noalias
+
+void * __attribute__ ((malloc)) foo (void) { return 0; }
diff --git a/test/FrontendC/2009-03-08-ZeroEltStructCrash.c b/test/FrontendC/2009-03-08-ZeroEltStructCrash.c
new file mode 100644
index 0000000..454e0fb
--- /dev/null
+++ b/test/FrontendC/2009-03-08-ZeroEltStructCrash.c
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S %s -o -
+// PR3744
+struct Empty {};
+struct Union {
+ union {
+ int zero_arr[0];
+ } contents;
+};
+static inline void Foo(struct Union *u) {
+ int *array = u->contents.zero_arr;
+}
+static void Bar(struct Union *u) {
+ Foo(u);
+}
diff --git a/test/FrontendC/2009-03-09-WeakDeclarations-1.c b/test/FrontendC/2009-03-09-WeakDeclarations-1.c
new file mode 100644
index 0000000..13ea84f
--- /dev/null
+++ b/test/FrontendC/2009-03-09-WeakDeclarations-1.c
@@ -0,0 +1,22 @@
+// RUN: %llvmgcc_only %s -c -o /dev/null |& \
+// RUN: egrep {(14|15|22): warning:} | \
+// RUN: wc -l | grep --quiet 3
+// XTARGET: darwin,linux
+// XFAIL: *
+// END.
+// Insist upon warnings for inappropriate weak attributes.
+// Note the line numbers (14|15|22) embedded in the check.
+
+// O.K.
+extern int ext_weak_import __attribute__ ((__weak_import__));
+
+// These are inappropriate, and should generate warnings:
+int decl_weak_import __attribute__ ((__weak_import__));
+int decl_initialized_weak_import __attribute__ ((__weak_import__)) = 13;
+
+// O.K.
+extern int ext_f(void) __attribute__ ((__weak_import__));
+
+// These are inappropriate, and should generate warnings:
+int def_f(void) __attribute__ ((__weak_import__));
+int __attribute__ ((__weak_import__)) decl_f(void) {return 0;};
diff --git a/test/FrontendC/2009-03-13-dbg.c b/test/FrontendC/2009-03-13-dbg.c
new file mode 100644
index 0000000..aa13af4
--- /dev/null
+++ b/test/FrontendC/2009-03-13-dbg.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc %s -c -g -o /dev/null
+// XTARGET: darwin,linux
+// XFAIL: *
+void foo() {}
+
diff --git a/test/FrontendC/2009-04-22-UnknownSize.c b/test/FrontendC/2009-04-22-UnknownSize.c
new file mode 100644
index 0000000..2b90c91
--- /dev/null
+++ b/test/FrontendC/2009-04-22-UnknownSize.c
@@ -0,0 +1,4 @@
+// RUN: not %llvmgcc -O1 %s -S |& grep {error: storage size}
+// PR2958
+static struct foo s;
+struct foo *p = &s;
diff --git a/test/FrontendC/2009-04-28-UnionArrayCrash.c b/test/FrontendC/2009-04-28-UnionArrayCrash.c
new file mode 100644
index 0000000..75851d0
--- /dev/null
+++ b/test/FrontendC/2009-04-28-UnionArrayCrash.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -S %s -o -
+// PR4082
+union U {
+ int I;
+ double F;
+};
+
+union U arr[] = { { .I = 4 }, { .F = 123.} };
+union U *P = &arr[0];
+
+
diff --git a/test/FrontendC/2009-05-04-EnumInreg.c b/test/FrontendC/2009-05-04-EnumInreg.c
new file mode 100644
index 0000000..6dbdb54
--- /dev/null
+++ b/test/FrontendC/2009-05-04-EnumInreg.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S -m32 -mregparm=3 %s -emit-llvm -o - | grep {inreg %action}
+// XFAIL: *
+// XTARGET: x86,i386,i686
+// PR3967
+
+enum kobject_action {
+ KOBJ_ADD,
+ KOBJ_REMOVE,
+ KOBJ_CHANGE,
+ KOBJ_MOVE,
+ KOBJ_ONLINE,
+ KOBJ_OFFLINE,
+ KOBJ_MAX
+};
+
+struct kobject;
+
+int kobject_uevent(struct kobject *kobj, enum kobject_action action) {}
diff --git a/test/FrontendC/2009-05-17-AlwaysInline.c b/test/FrontendC/2009-05-17-AlwaysInline.c
new file mode 100644
index 0000000..a93fabe
--- /dev/null
+++ b/test/FrontendC/2009-05-17-AlwaysInline.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -S %s -O0 -o - -mllvm -disable-llvm-optzns | grep bar
+// Check that the gcc inliner is turned off.
+
+#include <stdio.h>
+static __inline__ __attribute__ ((always_inline))
+ int bar (int x)
+{
+ return 4;
+}
+
+void
+foo ()
+{
+ long long b = 1;
+ int Y = bar (4);
+ printf ("%d\n", Y);
+}
diff --git a/test/FrontendC/2009-06-14-HighlyAligned.c b/test/FrontendC/2009-06-14-HighlyAligned.c
new file mode 100644
index 0000000..4678b75
--- /dev/null
+++ b/test/FrontendC/2009-06-14-HighlyAligned.c
@@ -0,0 +1,8 @@
+// RUN: %llvmgcc %s -S
+// PR4332
+
+static int highly_aligned __attribute__((aligned(4096)));
+
+int f() {
+ return highly_aligned;
+}
diff --git a/test/FrontendC/2009-06-18-StaticInitTailPadPack.c b/test/FrontendC/2009-06-18-StaticInitTailPadPack.c
new file mode 100644
index 0000000..17f35c0
--- /dev/null
+++ b/test/FrontendC/2009-06-18-StaticInitTailPadPack.c
@@ -0,0 +1,26 @@
+// RUN: %llvmgcc %s -S -o -
+// rdar://6983634
+
+ typedef struct A *Foo;
+#pragma pack(push, 2)
+ struct Bar {
+ Foo f1;
+ unsigned short f2;
+ float f3;
+ };
+ struct Baz {
+ struct Bar f1;
+ struct Bar f2;
+ };
+ struct Qux {
+ unsigned long f1;
+ struct Baz f2;
+ };
+extern const struct Qux Bork;
+const struct Qux Bork = {
+ 0,
+ {
+ {0},
+ {0}
+ }
+};
diff --git a/test/FrontendC/2009-07-14-VoidPtr.c b/test/FrontendC/2009-07-14-VoidPtr.c
new file mode 100644
index 0000000..8001c56
--- /dev/null
+++ b/test/FrontendC/2009-07-14-VoidPtr.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o -
+// PR4556
+
+extern void foo;
+void *bar = &foo;
+
diff --git a/test/FrontendC/2009-07-15-pad-wchar_t-array.c b/test/FrontendC/2009-07-15-pad-wchar_t-array.c
new file mode 100644
index 0000000..41bdef2
--- /dev/null
+++ b/test/FrontendC/2009-07-15-pad-wchar_t-array.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null
+
+#include <stddef.h>
+signed short _iodbcdm_sqlerror( )
+{
+ wchar_t _sqlState[6] = { L"\0" };
+}
diff --git a/test/FrontendC/2009-07-17-VoidParameter.c b/test/FrontendC/2009-07-17-VoidParameter.c
new file mode 100644
index 0000000..d576952
--- /dev/null
+++ b/test/FrontendC/2009-07-17-VoidParameter.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -S %s -o -
+// PR4214
+typedef void vt;
+void (*func_ptr)(vt my_vt);
diff --git a/test/FrontendC/2009-07-22-StructLayout.c b/test/FrontendC/2009-07-22-StructLayout.c
new file mode 100644
index 0000000..74904da
--- /dev/null
+++ b/test/FrontendC/2009-07-22-StructLayout.c
@@ -0,0 +1,34 @@
+// RUN: %llvmgcc %s -S -o /dev/null
+// PR4590
+
+typedef unsigned char __u8;
+typedef unsigned int __le32;
+typedef unsigned int __u32;
+typedef unsigned short __le16;
+typedef unsigned short __u16;
+
+struct usb_cdc_ether_desc {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+
+ __u8 iMACAddress;
+ __le32 bmEthernetStatistics;
+ __le16 wMaxSegmentSize;
+ __le16 wNumberMCFilters;
+ __u8 bNumberPowerFilters;
+} __attribute__ ((packed));
+
+
+static struct usb_cdc_ether_desc ecm_desc __attribute__ ((__section__(".init.data"))) = {
+ .bLength = sizeof ecm_desc,
+ .bDescriptorType = ((0x01 << 5) | 0x04),
+ .bDescriptorSubType = 0x0f,
+
+
+
+ .bmEthernetStatistics = (( __le32)(__u32)(0)),
+ .wMaxSegmentSize = (( __le16)(__u16)(1514)),
+ .wNumberMCFilters = (( __le16)(__u16)(0)),
+ .bNumberPowerFilters = 0,
+};
diff --git a/test/FrontendC/2009-08-11-AsmBlocksComplexJumpTarget.c b/test/FrontendC/2009-08-11-AsmBlocksComplexJumpTarget.c
new file mode 100644
index 0000000..e141c9a
--- /dev/null
+++ b/test/FrontendC/2009-08-11-AsmBlocksComplexJumpTarget.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc %s -fasm-blocks -S -o - | grep {\\\*1192}
+// Complicated expression as jump target
+// XFAIL: *
+// XTARGET: x86,i386,i686
+
+asm void Method3()
+{
+ mov eax,[esp+4]
+ jmp [eax+(299-1)*4]
+}
diff --git a/test/FrontendC/2009-09-24-SqrtErrno.c b/test/FrontendC/2009-09-24-SqrtErrno.c
new file mode 100644
index 0000000..09fc876
--- /dev/null
+++ b/test/FrontendC/2009-09-24-SqrtErrno.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc %s -S -o - -fmath-errno | FileCheck %s
+// llvm.sqrt has undefined behavior on negative inputs, so it is
+// inappropriate to translate C/C++ sqrt to this.
+#include <math.h>
+
+float foo(float X) {
+// CHECK: foo
+// CHECK-NOT: readonly
+// CHECK: return
+ // Check that this is not marked readonly when errno is used.
+ return sqrtf(X);
+}
diff --git a/test/FrontendC/2009-12-07-BitFieldAlignment.c b/test/FrontendC/2009-12-07-BitFieldAlignment.c
new file mode 100644
index 0000000..a8312a5
--- /dev/null
+++ b/test/FrontendC/2009-12-07-BitFieldAlignment.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc -m32 %s -S -o - | FileCheck %s
+// Set alignment on bitfield accesses.
+
+struct S {
+ int a, b;
+ void *c;
+ unsigned d : 8;
+ unsigned e : 8;
+};
+
+void f0(struct S *a) {
+// CHECK: %3 = load i32* %2, align 4
+// CHECK: store i32 %4, i32* %2, align 4
+ a->e = 0;
+}
diff --git a/test/FrontendC/2010-01-05-LinkageName.c b/test/FrontendC/2010-01-05-LinkageName.c
new file mode 100644
index 0000000..9c1a215
--- /dev/null
+++ b/test/FrontendC/2010-01-05-LinkageName.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc -O2 -S -g %s -o - | llc -o 2010-01-05-LinkageName.s -O0
+// RUN: %compile_c 2010-01-05-LinkageName.s -o 2010-01-05-LinkageName.s
+
+struct tm {};
+long mktime(struct tm *) __asm("_mktime$UNIX2003");
+tzload(name, sp, doextend){}
+long mktime(tmp)
+ struct tm *const tmp;
+{
+ tzset();
+}
+timelocal(tmp) {
+ return mktime(tmp);
+}
+
diff --git a/test/FrontendC/2010-01-13-MemBarrier.c b/test/FrontendC/2010-01-13-MemBarrier.c
new file mode 100644
index 0000000..8fcd522
--- /dev/null
+++ b/test/FrontendC/2010-01-13-MemBarrier.c
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s
+// XFAIL: sparc
+// rdar://7536390
+
+unsigned t(unsigned *ptr, unsigned val) {
+ // CHECK: @t
+ // CHECK: call void @llvm.memory.barrier
+ // CHECK-NEXT: call i32 @llvm.atomic.swap.i32
+ // CHECK-NEXT: call void @llvm.memory.barrier
+ return __sync_lock_test_and_set(ptr, val);
+}
diff --git a/test/FrontendC/2010-01-14-FnType-DebugInfo.c b/test/FrontendC/2010-01-14-FnType-DebugInfo.c
new file mode 100644
index 0000000..beaad91
--- /dev/null
+++ b/test/FrontendC/2010-01-14-FnType-DebugInfo.c
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc %s -S -g -o /dev/null
+typedef void (*sigcatch_t)( struct sigcontext *);
+sigcatch_t sigcatch[50] = {(sigcatch_t) 0};
+
diff --git a/test/FrontendC/2010-01-14-StaticVariable.c b/test/FrontendC/2010-01-14-StaticVariable.c
new file mode 100644
index 0000000..80dd4d4
--- /dev/null
+++ b/test/FrontendC/2010-01-14-StaticVariable.c
@@ -0,0 +1,12 @@
+// This is a regression test on debug info to make sure that llvm emitted
+// debug info does not crash gdb.
+// RUN: %llvmgcc -S -O0 -g %s -o - | \
+// RUN: llc --disable-fp-elim -o %t.s -O0 -relocation-model=pic
+// RUN: %compile_c %t.s -o %t.o
+// RUN: echo {quit\n} > %t.in
+// RUN: gdb -q -batch -n -x %t.in %t.o > /dev/null
+
+int foo() {
+ static int i = 42;
+ return i;
+}
diff --git a/test/FrontendC/2010-01-18-Inlined-Debug.c b/test/FrontendC/2010-01-18-Inlined-Debug.c
new file mode 100644
index 0000000..4aec7b2
--- /dev/null
+++ b/test/FrontendC/2010-01-18-Inlined-Debug.c
@@ -0,0 +1,12 @@
+// PR: 6058
+// RUN: %llvmgcc -g -S %s -o - | llc -O0 -o /dev/null
+
+static inline int foo(double) __attribute__ ((always_inline));
+static inline int foo(double __x) { return __x; }
+
+void bar(double x) {
+ foo(x);
+}
+
+
+
diff --git a/test/FrontendC/Atomics-no64bit.c b/test/FrontendC/Atomics-no64bit.c
new file mode 100644
index 0000000..6fb6109
--- /dev/null
+++ b/test/FrontendC/Atomics-no64bit.c
@@ -0,0 +1,190 @@
+// Test frontend handling of __sync builtins.
+// Modified from a gcc testcase.
+// RUN: %llvmgcc -S %s -o - | grep atomic | count 150
+// RUN: %llvmgcc -S %s -o - | grep p0i8 | count 50
+// RUN: %llvmgcc -S %s -o - | grep p0i16 | count 50
+// RUN: %llvmgcc -S %s -o - | grep p0i32 | count 50
+// RUN: %llvmgcc -S %s -o - | grep volatile | count 6
+
+// Currently this is implemented only for Alpha, X86, PowerPC.
+// Add your target here if it doesn't work.
+// This version of the test does not include long long.
+// XFAIL: sparc,arm
+
+signed char sc;
+unsigned char uc;
+signed short ss;
+unsigned short us;
+signed int si;
+unsigned int ui;
+
+void test_op_ignore (void)
+{
+ (void) __sync_fetch_and_add (&sc, 1);
+ (void) __sync_fetch_and_add (&uc, 1);
+ (void) __sync_fetch_and_add (&ss, 1);
+ (void) __sync_fetch_and_add (&us, 1);
+ (void) __sync_fetch_and_add (&si, 1);
+ (void) __sync_fetch_and_add (&ui, 1);
+
+ (void) __sync_fetch_and_sub (&sc, 1);
+ (void) __sync_fetch_and_sub (&uc, 1);
+ (void) __sync_fetch_and_sub (&ss, 1);
+ (void) __sync_fetch_and_sub (&us, 1);
+ (void) __sync_fetch_and_sub (&si, 1);
+ (void) __sync_fetch_and_sub (&ui, 1);
+
+ (void) __sync_fetch_and_or (&sc, 1);
+ (void) __sync_fetch_and_or (&uc, 1);
+ (void) __sync_fetch_and_or (&ss, 1);
+ (void) __sync_fetch_and_or (&us, 1);
+ (void) __sync_fetch_and_or (&si, 1);
+ (void) __sync_fetch_and_or (&ui, 1);
+
+ (void) __sync_fetch_and_xor (&sc, 1);
+ (void) __sync_fetch_and_xor (&uc, 1);
+ (void) __sync_fetch_and_xor (&ss, 1);
+ (void) __sync_fetch_and_xor (&us, 1);
+ (void) __sync_fetch_and_xor (&si, 1);
+ (void) __sync_fetch_and_xor (&ui, 1);
+
+ (void) __sync_fetch_and_and (&sc, 1);
+ (void) __sync_fetch_and_and (&uc, 1);
+ (void) __sync_fetch_and_and (&ss, 1);
+ (void) __sync_fetch_and_and (&us, 1);
+ (void) __sync_fetch_and_and (&si, 1);
+ (void) __sync_fetch_and_and (&ui, 1);
+
+ (void) __sync_fetch_and_nand (&sc, 1);
+ (void) __sync_fetch_and_nand (&uc, 1);
+ (void) __sync_fetch_and_nand (&ss, 1);
+ (void) __sync_fetch_and_nand (&us, 1);
+ (void) __sync_fetch_and_nand (&si, 1);
+ (void) __sync_fetch_and_nand (&ui, 1);
+}
+
+void test_fetch_and_op (void)
+{
+ sc = __sync_fetch_and_add (&sc, 11);
+ uc = __sync_fetch_and_add (&uc, 11);
+ ss = __sync_fetch_and_add (&ss, 11);
+ us = __sync_fetch_and_add (&us, 11);
+ si = __sync_fetch_and_add (&si, 11);
+ ui = __sync_fetch_and_add (&ui, 11);
+
+ sc = __sync_fetch_and_sub (&sc, 11);
+ uc = __sync_fetch_and_sub (&uc, 11);
+ ss = __sync_fetch_and_sub (&ss, 11);
+ us = __sync_fetch_and_sub (&us, 11);
+ si = __sync_fetch_and_sub (&si, 11);
+ ui = __sync_fetch_and_sub (&ui, 11);
+
+ sc = __sync_fetch_and_or (&sc, 11);
+ uc = __sync_fetch_and_or (&uc, 11);
+ ss = __sync_fetch_and_or (&ss, 11);
+ us = __sync_fetch_and_or (&us, 11);
+ si = __sync_fetch_and_or (&si, 11);
+ ui = __sync_fetch_and_or (&ui, 11);
+
+ sc = __sync_fetch_and_xor (&sc, 11);
+ uc = __sync_fetch_and_xor (&uc, 11);
+ ss = __sync_fetch_and_xor (&ss, 11);
+ us = __sync_fetch_and_xor (&us, 11);
+ si = __sync_fetch_and_xor (&si, 11);
+ ui = __sync_fetch_and_xor (&ui, 11);
+
+ sc = __sync_fetch_and_and (&sc, 11);
+ uc = __sync_fetch_and_and (&uc, 11);
+ ss = __sync_fetch_and_and (&ss, 11);
+ us = __sync_fetch_and_and (&us, 11);
+ si = __sync_fetch_and_and (&si, 11);
+ ui = __sync_fetch_and_and (&ui, 11);
+
+ sc = __sync_fetch_and_nand (&sc, 11);
+ uc = __sync_fetch_and_nand (&uc, 11);
+ ss = __sync_fetch_and_nand (&ss, 11);
+ us = __sync_fetch_and_nand (&us, 11);
+ si = __sync_fetch_and_nand (&si, 11);
+ ui = __sync_fetch_and_nand (&ui, 11);
+}
+
+void test_op_and_fetch (void)
+{
+ sc = __sync_add_and_fetch (&sc, uc);
+ uc = __sync_add_and_fetch (&uc, uc);
+ ss = __sync_add_and_fetch (&ss, uc);
+ us = __sync_add_and_fetch (&us, uc);
+ si = __sync_add_and_fetch (&si, uc);
+ ui = __sync_add_and_fetch (&ui, uc);
+
+ sc = __sync_sub_and_fetch (&sc, uc);
+ uc = __sync_sub_and_fetch (&uc, uc);
+ ss = __sync_sub_and_fetch (&ss, uc);
+ us = __sync_sub_and_fetch (&us, uc);
+ si = __sync_sub_and_fetch (&si, uc);
+ ui = __sync_sub_and_fetch (&ui, uc);
+
+ sc = __sync_or_and_fetch (&sc, uc);
+ uc = __sync_or_and_fetch (&uc, uc);
+ ss = __sync_or_and_fetch (&ss, uc);
+ us = __sync_or_and_fetch (&us, uc);
+ si = __sync_or_and_fetch (&si, uc);
+ ui = __sync_or_and_fetch (&ui, uc);
+
+ sc = __sync_xor_and_fetch (&sc, uc);
+ uc = __sync_xor_and_fetch (&uc, uc);
+ ss = __sync_xor_and_fetch (&ss, uc);
+ us = __sync_xor_and_fetch (&us, uc);
+ si = __sync_xor_and_fetch (&si, uc);
+ ui = __sync_xor_and_fetch (&ui, uc);
+
+ sc = __sync_and_and_fetch (&sc, uc);
+ uc = __sync_and_and_fetch (&uc, uc);
+ ss = __sync_and_and_fetch (&ss, uc);
+ us = __sync_and_and_fetch (&us, uc);
+ si = __sync_and_and_fetch (&si, uc);
+ ui = __sync_and_and_fetch (&ui, uc);
+
+ sc = __sync_nand_and_fetch (&sc, uc);
+ uc = __sync_nand_and_fetch (&uc, uc);
+ ss = __sync_nand_and_fetch (&ss, uc);
+ us = __sync_nand_and_fetch (&us, uc);
+ si = __sync_nand_and_fetch (&si, uc);
+ ui = __sync_nand_and_fetch (&ui, uc);
+}
+
+void test_compare_and_swap (void)
+{
+ sc = __sync_val_compare_and_swap (&sc, uc, sc);
+ uc = __sync_val_compare_and_swap (&uc, uc, sc);
+ ss = __sync_val_compare_and_swap (&ss, uc, sc);
+ us = __sync_val_compare_and_swap (&us, uc, sc);
+ si = __sync_val_compare_and_swap (&si, uc, sc);
+ ui = __sync_val_compare_and_swap (&ui, uc, sc);
+
+ ui = __sync_bool_compare_and_swap (&sc, uc, sc);
+ ui = __sync_bool_compare_and_swap (&uc, uc, sc);
+ ui = __sync_bool_compare_and_swap (&ss, uc, sc);
+ ui = __sync_bool_compare_and_swap (&us, uc, sc);
+ ui = __sync_bool_compare_and_swap (&si, uc, sc);
+ ui = __sync_bool_compare_and_swap (&ui, uc, sc);
+}
+
+void test_lock (void)
+{
+ sc = __sync_lock_test_and_set (&sc, 1);
+ uc = __sync_lock_test_and_set (&uc, 1);
+ ss = __sync_lock_test_and_set (&ss, 1);
+ us = __sync_lock_test_and_set (&us, 1);
+ si = __sync_lock_test_and_set (&si, 1);
+ ui = __sync_lock_test_and_set (&ui, 1);
+
+ __sync_synchronize ();
+
+ __sync_lock_release (&sc);
+ __sync_lock_release (&uc);
+ __sync_lock_release (&ss);
+ __sync_lock_release (&us);
+ __sync_lock_release (&si);
+ __sync_lock_release (&ui);
+}
diff --git a/test/FrontendC/Atomics.c b/test/FrontendC/Atomics.c
new file mode 100644
index 0000000..2b96ae0
--- /dev/null
+++ b/test/FrontendC/Atomics.c
@@ -0,0 +1,236 @@
+// Test frontend handling of __sync builtins.
+// Modified from a gcc testcase.
+// RUN: %llvmgcc -S %s -o - | grep atomic | count 200
+// RUN: %llvmgcc -S %s -o - | grep p0i8 | count 50
+// RUN: %llvmgcc -S %s -o - | grep p0i16 | count 50
+// RUN: %llvmgcc -S %s -o - | grep p0i32 | count 50
+// RUN: %llvmgcc -S %s -o - | grep volatile | count 8
+
+// Currently this is implemented only for Alpha, X86, PowerPC.
+// Add your target here if it doesn't work.
+// PPC32 does not translate the long long variants, so fails this test.
+// XFAIL: sparc,arm,powerpc
+
+signed char sc;
+unsigned char uc;
+signed short ss;
+unsigned short us;
+signed int si;
+unsigned int ui;
+signed long long sll;
+unsigned long long ull;
+
+void test_op_ignore (void)
+{
+ (void) __sync_fetch_and_add (&sc, 1);
+ (void) __sync_fetch_and_add (&uc, 1);
+ (void) __sync_fetch_and_add (&ss, 1);
+ (void) __sync_fetch_and_add (&us, 1);
+ (void) __sync_fetch_and_add (&si, 1);
+ (void) __sync_fetch_and_add (&ui, 1);
+ (void) __sync_fetch_and_add (&sll, 1);
+ (void) __sync_fetch_and_add (&ull, 1);
+
+ (void) __sync_fetch_and_sub (&sc, 1);
+ (void) __sync_fetch_and_sub (&uc, 1);
+ (void) __sync_fetch_and_sub (&ss, 1);
+ (void) __sync_fetch_and_sub (&us, 1);
+ (void) __sync_fetch_and_sub (&si, 1);
+ (void) __sync_fetch_and_sub (&ui, 1);
+ (void) __sync_fetch_and_sub (&sll, 1);
+ (void) __sync_fetch_and_sub (&ull, 1);
+
+ (void) __sync_fetch_and_or (&sc, 1);
+ (void) __sync_fetch_and_or (&uc, 1);
+ (void) __sync_fetch_and_or (&ss, 1);
+ (void) __sync_fetch_and_or (&us, 1);
+ (void) __sync_fetch_and_or (&si, 1);
+ (void) __sync_fetch_and_or (&ui, 1);
+ (void) __sync_fetch_and_or (&sll, 1);
+ (void) __sync_fetch_and_or (&ull, 1);
+
+ (void) __sync_fetch_and_xor (&sc, 1);
+ (void) __sync_fetch_and_xor (&uc, 1);
+ (void) __sync_fetch_and_xor (&ss, 1);
+ (void) __sync_fetch_and_xor (&us, 1);
+ (void) __sync_fetch_and_xor (&si, 1);
+ (void) __sync_fetch_and_xor (&ui, 1);
+ (void) __sync_fetch_and_xor (&sll, 1);
+ (void) __sync_fetch_and_xor (&ull, 1);
+
+ (void) __sync_fetch_and_and (&sc, 1);
+ (void) __sync_fetch_and_and (&uc, 1);
+ (void) __sync_fetch_and_and (&ss, 1);
+ (void) __sync_fetch_and_and (&us, 1);
+ (void) __sync_fetch_and_and (&si, 1);
+ (void) __sync_fetch_and_and (&ui, 1);
+ (void) __sync_fetch_and_and (&sll, 1);
+ (void) __sync_fetch_and_and (&ull, 1);
+
+ (void) __sync_fetch_and_nand (&sc, 1);
+ (void) __sync_fetch_and_nand (&uc, 1);
+ (void) __sync_fetch_and_nand (&ss, 1);
+ (void) __sync_fetch_and_nand (&us, 1);
+ (void) __sync_fetch_and_nand (&si, 1);
+ (void) __sync_fetch_and_nand (&ui, 1);
+ (void) __sync_fetch_and_nand (&sll, 1);
+ (void) __sync_fetch_and_nand (&ull, 1);
+}
+
+void test_fetch_and_op (void)
+{
+ sc = __sync_fetch_and_add (&sc, 11);
+ uc = __sync_fetch_and_add (&uc, 11);
+ ss = __sync_fetch_and_add (&ss, 11);
+ us = __sync_fetch_and_add (&us, 11);
+ si = __sync_fetch_and_add (&si, 11);
+ ui = __sync_fetch_and_add (&ui, 11);
+ sll = __sync_fetch_and_add (&sll, 11);
+ ull = __sync_fetch_and_add (&ull, 11);
+
+ sc = __sync_fetch_and_sub (&sc, 11);
+ uc = __sync_fetch_and_sub (&uc, 11);
+ ss = __sync_fetch_and_sub (&ss, 11);
+ us = __sync_fetch_and_sub (&us, 11);
+ si = __sync_fetch_and_sub (&si, 11);
+ ui = __sync_fetch_and_sub (&ui, 11);
+ sll = __sync_fetch_and_sub (&sll, 11);
+ ull = __sync_fetch_and_sub (&ull, 11);
+
+ sc = __sync_fetch_and_or (&sc, 11);
+ uc = __sync_fetch_and_or (&uc, 11);
+ ss = __sync_fetch_and_or (&ss, 11);
+ us = __sync_fetch_and_or (&us, 11);
+ si = __sync_fetch_and_or (&si, 11);
+ ui = __sync_fetch_and_or (&ui, 11);
+ sll = __sync_fetch_and_or (&sll, 11);
+ ull = __sync_fetch_and_or (&ull, 11);
+
+ sc = __sync_fetch_and_xor (&sc, 11);
+ uc = __sync_fetch_and_xor (&uc, 11);
+ ss = __sync_fetch_and_xor (&ss, 11);
+ us = __sync_fetch_and_xor (&us, 11);
+ si = __sync_fetch_and_xor (&si, 11);
+ ui = __sync_fetch_and_xor (&ui, 11);
+ sll = __sync_fetch_and_xor (&sll, 11);
+ ull = __sync_fetch_and_xor (&ull, 11);
+
+ sc = __sync_fetch_and_and (&sc, 11);
+ uc = __sync_fetch_and_and (&uc, 11);
+ ss = __sync_fetch_and_and (&ss, 11);
+ us = __sync_fetch_and_and (&us, 11);
+ si = __sync_fetch_and_and (&si, 11);
+ ui = __sync_fetch_and_and (&ui, 11);
+ sll = __sync_fetch_and_and (&sll, 11);
+ ull = __sync_fetch_and_and (&ull, 11);
+
+ sc = __sync_fetch_and_nand (&sc, 11);
+ uc = __sync_fetch_and_nand (&uc, 11);
+ ss = __sync_fetch_and_nand (&ss, 11);
+ us = __sync_fetch_and_nand (&us, 11);
+ si = __sync_fetch_and_nand (&si, 11);
+ ui = __sync_fetch_and_nand (&ui, 11);
+ sll = __sync_fetch_and_nand (&sll, 11);
+ ull = __sync_fetch_and_nand (&ull, 11);
+}
+
+void test_op_and_fetch (void)
+{
+ sc = __sync_add_and_fetch (&sc, uc);
+ uc = __sync_add_and_fetch (&uc, uc);
+ ss = __sync_add_and_fetch (&ss, uc);
+ us = __sync_add_and_fetch (&us, uc);
+ si = __sync_add_and_fetch (&si, uc);
+ ui = __sync_add_and_fetch (&ui, uc);
+ sll = __sync_add_and_fetch (&sll, uc);
+ ull = __sync_add_and_fetch (&ull, uc);
+
+ sc = __sync_sub_and_fetch (&sc, uc);
+ uc = __sync_sub_and_fetch (&uc, uc);
+ ss = __sync_sub_and_fetch (&ss, uc);
+ us = __sync_sub_and_fetch (&us, uc);
+ si = __sync_sub_and_fetch (&si, uc);
+ ui = __sync_sub_and_fetch (&ui, uc);
+ sll = __sync_sub_and_fetch (&sll, uc);
+ ull = __sync_sub_and_fetch (&ull, uc);
+
+ sc = __sync_or_and_fetch (&sc, uc);
+ uc = __sync_or_and_fetch (&uc, uc);
+ ss = __sync_or_and_fetch (&ss, uc);
+ us = __sync_or_and_fetch (&us, uc);
+ si = __sync_or_and_fetch (&si, uc);
+ ui = __sync_or_and_fetch (&ui, uc);
+ sll = __sync_or_and_fetch (&sll, uc);
+ ull = __sync_or_and_fetch (&ull, uc);
+
+ sc = __sync_xor_and_fetch (&sc, uc);
+ uc = __sync_xor_and_fetch (&uc, uc);
+ ss = __sync_xor_and_fetch (&ss, uc);
+ us = __sync_xor_and_fetch (&us, uc);
+ si = __sync_xor_and_fetch (&si, uc);
+ ui = __sync_xor_and_fetch (&ui, uc);
+ sll = __sync_xor_and_fetch (&sll, uc);
+ ull = __sync_xor_and_fetch (&ull, uc);
+
+ sc = __sync_and_and_fetch (&sc, uc);
+ uc = __sync_and_and_fetch (&uc, uc);
+ ss = __sync_and_and_fetch (&ss, uc);
+ us = __sync_and_and_fetch (&us, uc);
+ si = __sync_and_and_fetch (&si, uc);
+ ui = __sync_and_and_fetch (&ui, uc);
+ sll = __sync_and_and_fetch (&sll, uc);
+ ull = __sync_and_and_fetch (&ull, uc);
+
+ sc = __sync_nand_and_fetch (&sc, uc);
+ uc = __sync_nand_and_fetch (&uc, uc);
+ ss = __sync_nand_and_fetch (&ss, uc);
+ us = __sync_nand_and_fetch (&us, uc);
+ si = __sync_nand_and_fetch (&si, uc);
+ ui = __sync_nand_and_fetch (&ui, uc);
+ sll = __sync_nand_and_fetch (&sll, uc);
+ ull = __sync_nand_and_fetch (&ull, uc);
+}
+
+void test_compare_and_swap (void)
+{
+ sc = __sync_val_compare_and_swap (&sc, uc, sc);
+ uc = __sync_val_compare_and_swap (&uc, uc, sc);
+ ss = __sync_val_compare_and_swap (&ss, uc, sc);
+ us = __sync_val_compare_and_swap (&us, uc, sc);
+ si = __sync_val_compare_and_swap (&si, uc, sc);
+ ui = __sync_val_compare_and_swap (&ui, uc, sc);
+ sll = __sync_val_compare_and_swap (&sll, uc, sc);
+ ull = __sync_val_compare_and_swap (&ull, uc, sc);
+
+ ui = __sync_bool_compare_and_swap (&sc, uc, sc);
+ ui = __sync_bool_compare_and_swap (&uc, uc, sc);
+ ui = __sync_bool_compare_and_swap (&ss, uc, sc);
+ ui = __sync_bool_compare_and_swap (&us, uc, sc);
+ ui = __sync_bool_compare_and_swap (&si, uc, sc);
+ ui = __sync_bool_compare_and_swap (&ui, uc, sc);
+ ui = __sync_bool_compare_and_swap (&sll, uc, sc);
+ ui = __sync_bool_compare_and_swap (&ull, uc, sc);
+}
+
+void test_lock (void)
+{
+ sc = __sync_lock_test_and_set (&sc, 1);
+ uc = __sync_lock_test_and_set (&uc, 1);
+ ss = __sync_lock_test_and_set (&ss, 1);
+ us = __sync_lock_test_and_set (&us, 1);
+ si = __sync_lock_test_and_set (&si, 1);
+ ui = __sync_lock_test_and_set (&ui, 1);
+ sll = __sync_lock_test_and_set (&sll, 1);
+ ull = __sync_lock_test_and_set (&ull, 1);
+
+ __sync_synchronize ();
+
+ __sync_lock_release (&sc);
+ __sync_lock_release (&uc);
+ __sync_lock_release (&ss);
+ __sync_lock_release (&us);
+ __sync_lock_release (&si);
+ __sync_lock_release (&ui);
+ __sync_lock_release (&sll);
+ __sync_lock_release (&ull);
+}
diff --git a/test/FrontendC/BasicInstrs.c b/test/FrontendC/BasicInstrs.c
new file mode 100644
index 0000000..ceed17c
--- /dev/null
+++ b/test/FrontendC/BasicInstrs.c
@@ -0,0 +1,26 @@
+// This file can be used to see what a native C compiler is generating for a
+// variety of interesting operations.
+//
+// RUN: %llvmgcc -S %s -o - | llc
+
+unsigned int udiv(unsigned int X, unsigned int Y) {
+ return X/Y;
+}
+int sdiv(int X, int Y) {
+ return X/Y;
+}
+unsigned int urem(unsigned int X, unsigned int Y) {
+ return X%Y;
+}
+int srem(int X, int Y) {
+ return X%Y;
+}
+
+_Bool setlt(int X, int Y) {
+ return X < Y;
+}
+
+_Bool setgt(int X, int Y) {
+ return X > Y;
+}
+
diff --git a/test/FrontendC/alignstack.c b/test/FrontendC/alignstack.c
new file mode 100644
index 0000000..30c00ff8
--- /dev/null
+++ b/test/FrontendC/alignstack.c
@@ -0,0 +1,23 @@
+// RUN: %llvmgcc %s -fasm-blocks -S -o - | FileCheck %s
+// Complicated expression as jump target
+// XFAIL: *
+// XTARGET: x86,i386,i686,darwin
+
+void Method3()
+{
+// CHECK: Method3
+// CHECK-NOT: alignstack
+ asm("foo:");
+// CHECK: return
+}
+
+void Method4()
+{
+// CHECK: Method4
+// CHECK: alignstack
+ asm {
+ bar:
+ }
+// CHECK: return
+}
+
diff --git a/test/FrontendC/always-inline.c b/test/FrontendC/always-inline.c
new file mode 100644
index 0000000..22f6c7a
--- /dev/null
+++ b/test/FrontendC/always-inline.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - | grep call | not grep foo
+
+void bar() {
+}
+
+inline void __attribute__((__always_inline__)) foo() {
+ bar();
+}
+
+void i_want_bar() {
+ foo();
+}
diff --git a/test/FrontendC/attribute_constructor.c b/test/FrontendC/attribute_constructor.c
new file mode 100644
index 0000000..b2f7c9b
--- /dev/null
+++ b/test/FrontendC/attribute_constructor.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc %s -c -o - | llvm-dis | grep llvm.global_ctors
+
+void foo() __attribute__((constructor));
+void foo() {
+ bar();
+}
diff --git a/test/FrontendC/block-copy.c b/test/FrontendC/block-copy.c
new file mode 100644
index 0000000..a53732e
--- /dev/null
+++ b/test/FrontendC/block-copy.c
@@ -0,0 +1,20 @@
+/* RUN: %llvmgcc %s -S -o - -emit-llvm -O3 | grep {call.*memcpy}
+
+ This should compile into a memcpy from a global, not 128 stores. */
+
+
+
+void foo();
+
+float bar() {
+ float lookupTable[] = {-1,-1,-1,0, -1,-1,0,-1, -1,-1,0,1, -1,-1,1,0,
+ -1,0,-1,-1, -1,0,-1,1, -1,0,1,-1, -1,0,1,1,
+ -1,1,-1,0, -1,1,0,-1, -1,1,0,1, -1,1,1,0,
+ 0,-1,-1,-1, 0,-1,-1,1, 0,-1,1,-1, 0,-1,1,1,
+ 1,-1,-1,0, 1,-1,0,-1, 1,-1,0,1, 1,-1,1,0,
+ 1,0,-1,-1, 1,0,-1,1, 1,0,1,-1, 1,0,1,1,
+ 1,1,-1,0, 1,1,0,-1, 1,1,0,1, 1,1,1,0,
+ 0,1,-1,-1, 0,1,-1,1, 0,1,1,-1, 0,1,1,1};
+ foo(lookupTable);
+}
+
diff --git a/test/FrontendC/cstring-align.c b/test/FrontendC/cstring-align.c
new file mode 100644
index 0000000..715d0f3
--- /dev/null
+++ b/test/FrontendC/cstring-align.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc %s -c -Os -m32 -emit-llvm -o - | llc -march=x86 -mtriple=i386-apple-darwin10 | FileCheck %s -check-prefix=DARWIN32
+// RUN: %llvmgcc %s -c -Os -m64 -emit-llvm -o - | llc -march=x86-64 -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=DARWIN64
+// XFAIL: *
+// XTARGET: darwin
+
+extern void func(const char *, const char *);
+
+void long_function_name() {
+ func("%s: the function name", __func__);
+}
+
+// DARWIN64: .align 3
+// DARWIN64: ___func__.
+// DARWIN64: .asciz "long_function_name"
+
+// DARWIN32: .align 2
+// DARWIN32: ___func__.
+// DARWIN32: .asciz "long_function_name"
diff --git a/test/FrontendC/dg.exp b/test/FrontendC/dg.exp
new file mode 100644
index 0000000..a9be28a
--- /dev/null
+++ b/test/FrontendC/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports c ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/FrontendC/exact-div-expr.c b/test/FrontendC/exact-div-expr.c
new file mode 100644
index 0000000..9dce922
--- /dev/null
+++ b/test/FrontendC/exact-div-expr.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o - -O1 | grep ashr
+// RUN: %llvmgcc -S %s -o - -O1 | not grep sdiv
+
+long long test(int *A, int *B) {
+ return A-B;
+}
diff --git a/test/FrontendC/extern-weak.c b/test/FrontendC/extern-weak.c
new file mode 100644
index 0000000..4729b048
--- /dev/null
+++ b/test/FrontendC/extern-weak.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep extern_weak
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llc
+
+#if !defined(__linux__) && !defined(__FreeBSD__) && \
+ !defined(__OpenBSD__) && !defined(__CYGWIN__) && !defined(__DragonFly__)
+void foo() __attribute__((weak_import));
+#else
+void foo() __attribute__((weak));
+#endif
+
+void bar() { foo(); }
+
diff --git a/test/FrontendC/fp-logical.c b/test/FrontendC/fp-logical.c
new file mode 100644
index 0000000..60404f6
--- /dev/null
+++ b/test/FrontendC/fp-logical.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc %s -S -o - | grep bitcast | count 14
+
+typedef float vFloat __attribute__ ((__vector_size__ (16)));
+typedef unsigned int vUInt32 __attribute__ ((__vector_size__ (16)));
+void foo(vFloat *X) {
+ vFloat NoSignBit = (vFloat) ~ (vUInt32) (vFloat) { -0.f, -0.f, -0.f, -0.f };
+ vFloat ExtremeValue = *X & NoSignBit;
+ *X = ExtremeValue;
+}
+
+void bar(vFloat *X) {
+ vFloat NoSignBit = (vFloat) ~ (vUInt32) (vFloat) { -0.f, -0.f, -0.f, -0.f };
+ vFloat ExtremeValue = *X & ~NoSignBit;
+ *X = ExtremeValue;
+}
diff --git a/test/FrontendC/func-aligned.c b/test/FrontendC/func-aligned.c
new file mode 100644
index 0000000..40149f4
--- /dev/null
+++ b/test/FrontendC/func-aligned.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s
+
+// rdar://7270273
+void foo() __attribute__((aligned (64)));
+void foo() {
+// CHECK: define void @foo() {{.*}} align 64
+}
diff --git a/test/FrontendC/funccall.c b/test/FrontendC/funccall.c
new file mode 100644
index 0000000..9735e34
--- /dev/null
+++ b/test/FrontendC/funccall.c
@@ -0,0 +1,17 @@
+
+static int q;
+
+void foo() {
+ int t = q;
+ q = t + 1;
+}
+int main() {
+ q = 0;
+ foo();
+ q = q - 1;
+
+ return q;
+}
+
+// This is the source that corresponds to funccall.ll
+// RUN: echo foo
diff --git a/test/FrontendC/hidden-visibility.c b/test/FrontendC/hidden-visibility.c
new file mode 100644
index 0000000..fc2ae44
--- /dev/null
+++ b/test/FrontendC/hidden-visibility.c
@@ -0,0 +1,3 @@
+// RUN: %llvmgcc %s -emit-llvm -S -o - | grep {hidden global}
+
+int X __attribute__ ((__visibility__ ("hidden"))) = 123;
diff --git a/test/FrontendC/implicit-arg.c b/test/FrontendC/implicit-arg.c
new file mode 100644
index 0000000..971245f
--- /dev/null
+++ b/test/FrontendC/implicit-arg.c
@@ -0,0 +1,10 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o -
+// RUN: %llvmgcc %s -S -emit-llvm -O1 -o -
+// rdar://6518089
+
+static int bar();
+void foo() {
+ int a = bar();
+}
+int bar(unsigned a) {
+}
diff --git a/test/FrontendC/inline-asm-mrv.c b/test/FrontendC/inline-asm-mrv.c
new file mode 100644
index 0000000..6d1df67
--- /dev/null
+++ b/test/FrontendC/inline-asm-mrv.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -o - -O | not grep alloca
+// PR2094
+
+int sad16_sse2(void *v, unsigned char *blk2, unsigned char *blk1,
+ int stride, int h) {
+ int ret;
+ asm volatile( "%0 %1 %2 %3"
+ : "+r" (h), "+r" (blk1), "+r" (blk2)
+ : "r" ((long)stride));
+ asm volatile("set %0 %1" : "=r"(ret) : "r"(blk1));
+ return ret;
+}
diff --git a/test/FrontendC/libcalls-d.c b/test/FrontendC/libcalls-d.c
new file mode 100644
index 0000000..126866a
--- /dev/null
+++ b/test/FrontendC/libcalls-d.c
@@ -0,0 +1,14 @@
+// llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't
+// and -fno-builtins shouldn't.
+// -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not.
+// RUN: %llvmgcc %s -S -fno-math-errno -emit-llvm -O0 -o - | grep {call.*exp2\\.f64}
+// RUN: %llvmgcc %s -S -fmath-errno -emit-llvm -O0 -o - | grep {call.*exp2}
+// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp}
+// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2}
+
+double exp2(double);
+
+double t4(unsigned char x) {
+ return exp2(x);
+}
+
diff --git a/test/FrontendC/libcalls-ld.c b/test/FrontendC/libcalls-ld.c
new file mode 100644
index 0000000..6533eb8
--- /dev/null
+++ b/test/FrontendC/libcalls-ld.c
@@ -0,0 +1,17 @@
+// llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't
+// and -fno-builtins shouldn't.
+// -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not.
+// RUN: %llvmgcc %s -S -fno-math-errno -emit-llvm -O0 -o - | grep {call.*exp2\\..*f}
+// RUN: %llvmgcc %s -S -fmath-errno -emit-llvm -O0 -o - | grep {call.*exp2l}
+// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp}
+// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2l}
+
+// If this fails for you because your target doesn't support long double,
+// please xfail the test.
+
+long double exp2l(long double);
+
+long double t4(unsigned char x) {
+ return exp2l(x);
+}
+
diff --git a/test/FrontendC/libcalls.c b/test/FrontendC/libcalls.c
new file mode 100644
index 0000000..a2761dd
--- /dev/null
+++ b/test/FrontendC/libcalls.c
@@ -0,0 +1,14 @@
+// llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't
+// and -fno-builtins shouldn't.
+// -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not.
+// RUN: %llvmgcc %s -S -emit-llvm -fno-math-errno -O0 -o - | grep {call.*exp2\\.f32}
+// RUN: %llvmgcc %s -S -emit-llvm -fmath-errno -O0 -o - | grep {call.*exp2f}
+// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp}
+// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2f}
+
+float exp2f(float);
+
+float t4(unsigned char x) {
+ return exp2f(x);
+}
+
diff --git a/test/FrontendC/nested-functions.c b/test/FrontendC/nested-functions.c
new file mode 100644
index 0000000..bccbef3
--- /dev/null
+++ b/test/FrontendC/nested-functions.c
@@ -0,0 +1,18 @@
+// RUN: %llvmgcc -S %s -o - -fnested-functions
+// PR1274
+
+void Bork() {
+ void Fork(const int *src, int size) {
+ int i = 1;
+ int x;
+
+ while (i < size)
+ x = src[i];
+ }
+}
+
+void foo(void *a){
+ inline void foo_bar() {
+ a += 1;
+ }
+}
diff --git a/test/FrontendC/pr3518.c b/test/FrontendC/pr3518.c
new file mode 100644
index 0000000..4c193c7
--- /dev/null
+++ b/test/FrontendC/pr3518.c
@@ -0,0 +1,24 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep {= internal global} | count 4
+// PR 3518
+// Some of the objects were coming out as unintialized (external) before 3518
+// was fixed. Internal names are different between llvm-gcc and clang so they
+// are not tested.
+
+extern void abort (void);
+
+struct A { int i; int j; };
+struct B { struct A *a; struct A *b; };
+struct C { struct B *c; struct A *d; };
+struct C e = { &(struct B) { &(struct A) { 1, 2 }, &(struct A) { 3, 4 } }, &(struct A) { 5, 6 } };
+
+int
+main (void)
+{
+ if (e.c->a->i != 1 || e.c->a->j != 2)
+ abort ();
+ if (e.c->b->i != 3 || e.c->b->j != 4)
+ abort ();
+ if (e.d->i != 5 || e.d->j != 6)
+ abort ();
+ return 0;
+}
diff --git a/test/FrontendC/pr4349.c b/test/FrontendC/pr4349.c
new file mode 100644
index 0000000..fbd7e56
--- /dev/null
+++ b/test/FrontendC/pr4349.c
@@ -0,0 +1,38 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | FileCheck %s
+// PR 4349
+
+union reg
+{
+ unsigned char b[2][2];
+ unsigned short w[2];
+ unsigned int d;
+};
+struct cpu
+{
+ union reg pc;
+};
+extern struct cpu cpu;
+struct svar
+{
+ void *ptr;
+};
+// CHECK: @svars1 = global [1 x %struct.svar] [%struct.svar { i8* bitcast (%struct.cpu* @cpu to i8*) }]
+struct svar svars1[] =
+{
+ { &((cpu.pc).w[0]) }
+};
+// CHECK: @svars2 = global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x i8]* bitcast (%struct.cpu* @cpu to [2 x i8]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) }]
+struct svar svars2[] =
+{
+ { &((cpu.pc).b[0][1]) }
+};
+// CHECK: @svars3 = global [1 x %struct.svar] [%struct.svar { i8* bitcast (i16* getelementptr ([2 x i16]* bitcast (%struct.cpu* @cpu to [2 x i16]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) to i8*) }]
+struct svar svars3[] =
+{
+ { &((cpu.pc).w[1]) }
+};
+// CHECK: @svars4 = global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x [2 x i8]]* bitcast (%struct.cpu* @cpu to [2 x [2 x i8]]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1, i{{[0-9]+}} 1) }]
+struct svar svars4[] =
+{
+ { &((cpu.pc).b[1][1]) }
+};
diff --git a/test/FrontendC/pr5406.c b/test/FrontendC/pr5406.c
new file mode 100644
index 0000000..c873e51
--- /dev/null
+++ b/test/FrontendC/pr5406.c
@@ -0,0 +1,20 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | FileCheck %s
+// PR 5406
+
+// XFAIL: *
+// XTARGET: arm
+
+typedef struct { char x[3]; } A0;
+void foo (int i, ...);
+
+
+// CHECK: call arm_aapcscc void (i32, ...)* @foo(i32 1, i32 {{.*}}) nounwind
+int main (void)
+{
+ A0 a3;
+ a3.x[0] = 0;
+ a3.x[0] = 0;
+ a3.x[2] = 26;
+ foo (1, a3 );
+ return 0;
+}
diff --git a/test/FrontendC/ptr-rotate.c b/test/FrontendC/ptr-rotate.c
new file mode 100644
index 0000000..56c21f4
--- /dev/null
+++ b/test/FrontendC/ptr-rotate.c
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc %s -c -m32 -o /dev/null
+// RUN: %llvmgcc %s -c -O1 -m32 -emit-llvm -o - | llc -march=x86 -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN
+
+unsigned int func(void *A) {
+ // DARWIN: roll $27
+ return ((((unsigned long long) A) >> 5) | (((unsigned long long) A) << 27));
+}
diff --git a/test/FrontendC/redef-ext-inline.c b/test/FrontendC/redef-ext-inline.c
new file mode 100644
index 0000000..240beb1
--- /dev/null
+++ b/test/FrontendC/redef-ext-inline.c
@@ -0,0 +1,6 @@
+// RUN: %llvmgcc -S %s -o -
+// rdar://7208839
+
+extern inline int f1 (void) {return 1;}
+int f3 (void) {return f1();}
+int f1 (void) {return 0;}
diff --git a/test/FrontendC/sret.c b/test/FrontendC/sret.c
new file mode 100644
index 0000000..11ac5d6
--- /dev/null
+++ b/test/FrontendC/sret.c
@@ -0,0 +1,15 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 5
+
+struct abc {
+ long a;
+ long b;
+ long c;
+};
+
+struct abc foo1(void);
+struct abc foo2();
+
+void bar() {
+ struct abc dummy1 = foo1();
+ struct abc dummy2 = foo2();
+}
diff --git a/test/FrontendC/sret2.c b/test/FrontendC/sret2.c
new file mode 100644
index 0000000..7b621f9
--- /dev/null
+++ b/test/FrontendC/sret2.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 2
+
+struct abc {
+ long a;
+ long b;
+ long c;
+};
+
+struct abc foo2(){}
diff --git a/test/FrontendC/unaligned-memcpy.c b/test/FrontendC/unaligned-memcpy.c
new file mode 100644
index 0000000..9e6ce07
--- /dev/null
+++ b/test/FrontendC/unaligned-memcpy.c
@@ -0,0 +1,5 @@
+// RUN: %llvmgcc %s -S -emit-llvm -o - | llc
+
+void bork() {
+ char Qux[33] = {0};
+}
diff --git a/test/FrontendC/union-align.c b/test/FrontendC/union-align.c
new file mode 100644
index 0000000..f99a760
--- /dev/null
+++ b/test/FrontendC/union-align.c
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -S %s -o - | grep load | grep "4 x float" | not grep "align 4"
+// RUN: %llvmgcc -S %s -o - | grep load | grep "4 x float" | grep "align 16"
+// PR3432
+// rdar://6536377
+
+typedef float __m128 __attribute__ ((__vector_size__ (16)));
+
+typedef union
+{
+ int i[4];
+ float f[4];
+ __m128 v;
+} u_t;
+
+__m128 t(u_t *a) {
+ return a->v;
+}
diff --git a/test/FrontendC/wchar-const.c b/test/FrontendC/wchar-const.c
new file mode 100644
index 0000000..7cf3322
--- /dev/null
+++ b/test/FrontendC/wchar-const.c
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S %s -o - | grep {constant \\\[18 x} | grep { 84, }
+// This should pass for any endianness combination of host and target.
+#include <wchar.h>
+extern void foo(const wchar_t* p);
+int main (int argc, const char * argv[])
+{
+ foo(L"This is some text");
+ return 0;
+}
diff --git a/test/FrontendC/weak_constant.c b/test/FrontendC/weak_constant.c
new file mode 100644
index 0000000..5337948
--- /dev/null
+++ b/test/FrontendC/weak_constant.c
@@ -0,0 +1,12 @@
+// RUN: %llvmgcc -S %s -O1 -o - | grep {ret.*123}
+// Check for bug compatibility with gcc.
+
+const int x __attribute((weak)) = 123;
+
+int* f(void) {
+ return &x;
+}
+
+int g(void) {
+ return *f();
+}
diff --git a/test/FrontendFortran/2008-11-03-OptionOverride.f90 b/test/FrontendFortran/2008-11-03-OptionOverride.f90
new file mode 100644
index 0000000..316e722
--- /dev/null
+++ b/test/FrontendFortran/2008-11-03-OptionOverride.f90
@@ -0,0 +1,4 @@
+! RUN: %llvmgcc -c %s -march=k8
+! XTARGET: x86
+! Note: this file intentionally left blank, the problem itself is in
+! frontend initialization routines and march flag!
diff --git a/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 b/test/FrontendFortran/2009-02-09-FloorDivExpr.f90
new file mode 100644
index 0000000..870e99b
--- /dev/null
+++ b/test/FrontendFortran/2009-02-09-FloorDivExpr.f90
@@ -0,0 +1,32 @@
+! RUN: %llvmgcc -c %s
+! PR2437
+program main
+ implicit none
+ call build (77)
+contains
+ subroutine build (order)
+ integer :: order, i, j
+
+
+ call test (1, order, 3, (/ (i, i = 1, order, 3) /))
+ call test (order, 1, -3, (/ (i, i = order, 1, -3) /))
+
+ do j = -10, 10
+ call test (order + j, order, 5, (/ (i, i = order + j, order, 5) /))
+ call test (order + j, order, -5, (/ (i, i = order + j, order, -5) /))
+ end do
+
+ end subroutine build
+
+ subroutine test (from, to, step, values)
+ integer, dimension (:) :: values
+ integer :: from, to, step, last, i
+
+ last = 0
+ do i = from, to, step
+ last = last + 1
+ if (values (last) .ne. i) call abort
+ end do
+ if (size (values, dim = 1) .ne. last) call abort
+ end subroutine test
+end program main
diff --git a/test/FrontendFortran/cpow.f90 b/test/FrontendFortran/cpow.f90
new file mode 100644
index 0000000..19ae378
--- /dev/null
+++ b/test/FrontendFortran/cpow.f90
@@ -0,0 +1,18 @@
+! RUN: %llvmgcc -c %s
+! PR2443
+
+! Program to test the power (**) operator
+program testpow
+ implicit none
+ real(kind=4) r, s, two
+ real(kind=8) :: q
+ complex(kind=4) :: c, z
+ real, parameter :: del = 0.0001
+ integer i, j
+
+ two = 2.0
+
+ c = (2.0, 3.0)
+ c = c ** two
+ if (abs(c - (-5.0, 12.0)) .gt. del) call abort
+end program
diff --git a/test/FrontendFortran/dg.exp b/test/FrontendFortran/dg.exp
new file mode 100644
index 0000000..45bffc6
--- /dev/null
+++ b/test/FrontendFortran/dg.exp
@@ -0,0 +1,6 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports fortran ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{f,f90}]]
+}
+
diff --git a/test/FrontendObjC++/2007-10-03-MetadataPointers.mm b/test/FrontendObjC++/2007-10-03-MetadataPointers.mm
new file mode 100644
index 0000000..5975e38
--- /dev/null
+++ b/test/FrontendObjC++/2007-10-03-MetadataPointers.mm
@@ -0,0 +1,7 @@
+// RUN: %llvmgcc -w -x objective-c++ -c %s -o /dev/null
+
+@class NSImage;
+void bork() {
+ NSImage *nsimage;
+ [nsimage release];
+}
diff --git a/test/FrontendObjC++/dg.exp b/test/FrontendObjC++/dg.exp
new file mode 100644
index 0000000..41c3db2
--- /dev/null
+++ b/test/FrontendObjC++/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports obj-c++ ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{mm}]]
+}
diff --git a/test/FrontendObjC/2007-04-03-ObjcEH.m b/test/FrontendObjC/2007-04-03-ObjcEH.m
new file mode 100644
index 0000000..353323d
--- /dev/null
+++ b/test/FrontendObjC/2007-04-03-ObjcEH.m
@@ -0,0 +1,29 @@
+// RUN: %llvmgcc -c %s -o /dev/null
+
+@interface B
+-(int)bar;
+@end
+
+@interface A
+-(void) Foo:(int) state;
+@end
+
+@implementation A
+- (void) Foo:(int) state {
+
+ int wasResponded = 0;
+ @try {
+ if (state) {
+ B * b = 0;
+ @try { }
+ @finally {
+ wasResponded = ![b bar];
+ }
+ }
+ }
+ @finally {
+ }
+}
+@end
+
+
diff --git a/test/FrontendObjC/2007-05-02-Strong.m b/test/FrontendObjC/2007-05-02-Strong.m
new file mode 100644
index 0000000..3778fd2
--- /dev/null
+++ b/test/FrontendObjC/2007-05-02-Strong.m
@@ -0,0 +1,23 @@
+// RUN: %llvmgcc -c %s -fobjc-gc -o /dev/null
+typedef int NSInteger;
+typedef struct _NSRect {
+ int origin;
+ int size;
+} NSRect;
+
+__attribute__((objc_gc(strong))) NSRect *_cachedRectArray;
+extern const NSRect NSZeroRect;
+@interface A{
+}
+-(void)bar:(NSInteger *)rectCount;
+@end
+
+@implementation A
+
+-(void)bar:(NSInteger *)rectCount {
+ NSRect appendRect = NSZeroRect;
+
+ _cachedRectArray[*rectCount - 1] = NSZeroRect;
+}
+
+@end
diff --git a/test/FrontendObjC/2007-09-25-EH.m b/test/FrontendObjC/2007-09-25-EH.m
new file mode 100644
index 0000000..5fa9cbb
--- /dev/null
+++ b/test/FrontendObjC/2007-09-25-EH.m
@@ -0,0 +1,27 @@
+// RUN: %llvmgcc -c -w -m64 -mmacosx-version-min=10.5 %s -o /dev/null
+// XFAIL: *
+// XTARGET: darwin
+@class NSDictionary, DSoBuffer, DSoDirectory, NSMutableArray;
+@interface NSException {}
+@end
+@interface DSoNode {
+ DSoDirectory *mDirectory;
+}
+@end
+@implementation DSoNode
+- (void) _findRecordsOfTypes {
+ DSoBuffer *dbData;
+ void *recInfo;
+ NSMutableArray *results;
+ @try {
+ dsGetRecordEntry([dbData dsDataBuffer], (void**)&recInfo);
+ @try {
+ [results addObject:37];
+ } @finally {
+ dsDeallocRecordEntry([mDirectory dsDirRef], recInfo);
+ }
+ } @catch(NSException * exception) {
+ }
+}
+
+
diff --git a/test/FrontendObjC/2007-10-17-SJLJExceptions.m b/test/FrontendObjC/2007-10-17-SJLJExceptions.m
new file mode 100644
index 0000000..970207e
--- /dev/null
+++ b/test/FrontendObjC/2007-10-17-SJLJExceptions.m
@@ -0,0 +1,24 @@
+// RUN: %llvmgcc -m32 -x objective-c %s -pipe -std=gnu99 -O2 -fexceptions -S -o - | not grep Unwind_Resume
+#import <stdio.h>
+
+@interface Foo {
+ char c;
+ short s;
+ int i;
+ long l;
+ float f;
+ double d;
+}
+-(Foo*)retain;
+@end
+
+struct Foo *bork(Foo *FooArray) {
+ struct Foo *result = 0;
+ @try {
+ result = [FooArray retain];
+ } @catch(id any) {
+ printf("hello world\n");
+ }
+
+ return result;
+}
diff --git a/test/FrontendObjC/2007-10-18-ProDescriptor.m b/test/FrontendObjC/2007-10-18-ProDescriptor.m
new file mode 100644
index 0000000..e87a43f
--- /dev/null
+++ b/test/FrontendObjC/2007-10-18-ProDescriptor.m
@@ -0,0 +1,19 @@
+// RUN: %llvmgcc -x objective-c -c %s -o /dev/null
+@protocol O
+@end
+@interface O < O > {
+}
+@end
+struct A {
+};
+@protocol AB
+- (unsigned) ver;
+@end
+@interface AGy:O < AB > {
+}
+@end
+@implementation AGy
+- (unsigned) ver {
+}
+@end
+
diff --git a/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m b/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m
new file mode 100644
index 0000000..866c330
--- /dev/null
+++ b/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -x objective-c -c %s -o /dev/null -fobjc-gc
+// rdar://5541393
+
+typedef unsigned int NSUInteger;
+__attribute__((objc_gc(strong))) float *_scores;
+
+void foo(int i, float f) {
+ _scores[i] = f;
+}
diff --git a/test/FrontendObjC/2008-10-3-EhValue.m b/test/FrontendObjC/2008-10-3-EhValue.m
new file mode 100644
index 0000000..a4c0cae
--- /dev/null
+++ b/test/FrontendObjC/2008-10-3-EhValue.m
@@ -0,0 +1,50 @@
+// RUN: %llvmgcc -w -x objective-c -c %s -o /dev/null
+
+@interface Object {
+@public
+ Class isa;
+}
++initialize;
++alloc;
++new;
++free;
+-free;
++(Class)class;
+-(Class)class;
+-init;
+-superclass;
+-(const char *)name;
+@end
+
+@interface Frob: Object
+@end
+
+@implementation Frob: Object
+@end
+
+static Frob* _connection = ((void *)0);
+
+extern void abort(void);
+
+void test (Object* sendPort)
+{
+ int cleanupPorts = 1;
+ Frob* receivePort = ((void *)0);
+
+ @try {
+ receivePort = (Frob *) -1;
+ _connection = (Frob *) -1;
+ receivePort = ((void *)0);
+ sendPort = ((void *)0);
+ cleanupPorts = 0;
+ @throw [Object new];
+ }
+ @catch(Frob *obj) {
+ if(!(0)) abort();
+ }
+ @catch(id exc) {
+ if(!(!receivePort)) abort();
+ if(!(!sendPort)) abort();
+ if(!(!cleanupPorts)) abort();
+ }
+}
diff --git a/test/FrontendObjC/2008-11-12-Metadata.m b/test/FrontendObjC/2008-11-12-Metadata.m
new file mode 100644
index 0000000..7e9f028
--- /dev/null
+++ b/test/FrontendObjC/2008-11-12-Metadata.m
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -x objective-c -m64 -c %s -o /dev/null
+
+@interface A
+@end
+@protocol P
+@end
+@interface B : A <P>
+{
+}
+@end
+@implementation B
+- (void)test {
+}
+@end
diff --git a/test/FrontendObjC/2008-11-24-ConstCFStrings.m b/test/FrontendObjC/2008-11-24-ConstCFStrings.m
new file mode 100644
index 0000000..976adc4
--- /dev/null
+++ b/test/FrontendObjC/2008-11-24-ConstCFStrings.m
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc -x objective-c -m64 -S %s -o - | grep {L_unnamed_cfstring_}
+
+@class NSString;
+
+@interface A
+- (void)bork:(NSString*)msg;
+@end
+
+void func(A *a) {
+ [a bork:@"Hello world!"];
+}
diff --git a/test/FrontendObjC/2008-11-25-Blocks.m b/test/FrontendObjC/2008-11-25-Blocks.m
new file mode 100644
index 0000000..258d70a
--- /dev/null
+++ b/test/FrontendObjC/2008-11-25-Blocks.m
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -c %s -o /dev/null
+// rdar://6394879
+
+@interface bork
+- (id)B:(void (^)())blk;
+- (void)C;
+@end
+@implementation bork
+- (id)B:(void (^)())blk {
+ __attribute__((__blocks__(byref))) bork* new = ((void *)0);
+ blk();
+}
+- (void)C {
+ __attribute__((__blocks__(byref))) id var;
+ [self B:^() {}];
+}
+@end
diff --git a/test/FrontendObjC/2009-01-26-WriteBarrier-2.m b/test/FrontendObjC/2009-01-26-WriteBarrier-2.m
new file mode 100644
index 0000000..32833a8
--- /dev/null
+++ b/test/FrontendObjC/2009-01-26-WriteBarrier-2.m
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -x objective-c -S %s -fobjc-gc -o - | grep objc_assign_strongCast
+// rdar://5541393
+
+typedef struct {
+ void (^ivarBlock)(void);
+} StructWithBlock_t;
+
+int main(char *argc, char *argv[]) {
+ StructWithBlock_t *swbp = (StructWithBlock_t *)malloc(sizeof(StructWithBlock_t*));
+ __block int i = 10;
+ // assigning a Block into an struct slot should elicit a write-barrier under GC
+ swbp->ivarBlock = ^ { ++i; };
+ return 0;
+}
diff --git a/test/FrontendObjC/2009-02-05-VolatileProp.m b/test/FrontendObjC/2009-02-05-VolatileProp.m
new file mode 100644
index 0000000..461f92b
--- /dev/null
+++ b/test/FrontendObjC/2009-02-05-VolatileProp.m
@@ -0,0 +1,11 @@
+/* RUN: %llvmgcc -w -x objective-c -c %s -o /dev/null -pedantic-errors
+ rdar://6551276 */
+
+void foo(const unsigned short *);
+void bar() {
+ unsigned short *s[3];
+ int i;
+ @try { } @catch (id anException) { }
+ foo(2+s[i]);
+}
+
diff --git a/test/FrontendObjC/2009-04-14-AsmSection.m b/test/FrontendObjC/2009-04-14-AsmSection.m
new file mode 100644
index 0000000..de2cef0
--- /dev/null
+++ b/test/FrontendObjC/2009-04-14-AsmSection.m
@@ -0,0 +1,9 @@
+// RUN: %llvmgcc -S %s -fobjc-abi-version=2 -emit-llvm -o %t
+// RUN: grep {OBJC_CLASS_\\\$_A.*section.*__DATA, __objc_data.*align} %t
+// XTARGET: darwin
+
+@interface A
+@end
+
+@implementation A
+@end
diff --git a/test/FrontendObjC/2009-04-27-bitfield-vs-ivar.m b/test/FrontendObjC/2009-04-27-bitfield-vs-ivar.m
new file mode 100644
index 0000000..cada843
--- /dev/null
+++ b/test/FrontendObjC/2009-04-27-bitfield-vs-ivar.m
@@ -0,0 +1,44 @@
+// RUN: %llvmgcc -S -x objective-c -m64 -fobjc-abi-version=2 %s -o %t
+// RUN: grep {OBJC_CLASS_RO_\\\$_I4} %t | grep {i32 0, i32 1, i32 2, i32 0}
+// RUN: grep {OBJC_CLASS_RO_\\\$_I2} %t | grep {i32 0, i32 1, i32 1, i32 0}
+// RUN: grep {OBJC_CLASS_RO_\\\$_I5} %t | grep {i32 0, i32 0, i32 0, i32 0}
+// XTARGET: darwin
+
+// Test instance variable sizing when base class ends in bitfield
+@interface I3 {
+ unsigned int _iv2 :1;
+}
+@end
+
+@interface I4 : I3 {
+ char _iv4;
+}
+@end
+
+// Test case with no instance variables in derived class
+@interface I1 {
+ unsigned int _iv2 :1;
+}
+@end
+
+@interface I2 : I1 {
+}
+@end
+
+// Test case with no instance variables anywhere
+@interface I6 {
+}
+@end
+
+@interface I5 : I6 {
+}
+@end
+
+@implementation I4
+@end
+
+@implementation I2
+@end
+
+@implementation I5
+@end
diff --git a/test/FrontendObjC/2009-04-28-bitfield-vs-vbc.m b/test/FrontendObjC/2009-04-28-bitfield-vs-vbc.m
new file mode 100644
index 0000000..8306fcc
--- /dev/null
+++ b/test/FrontendObjC/2009-04-28-bitfield-vs-vbc.m
@@ -0,0 +1,127 @@
+// RUN: %llvmgcc -S -x objective-c -m32 %s -o %t
+// This used to crash, 6831493.
+#include <stdlib.h>
+
+struct s0 {
+ double x;
+};
+
+@interface I2 {
+ struct s0 _iv1;
+}
+@end
+
+@interface I3 : I2 {
+ unsigned int _iv2 :1;
+ unsigned : 0;
+ unsigned int _iv3 : 3;
+}
+@end
+
+@interface I4 : I3 {
+ char _iv4;
+}
+@end
+
+@interface I5 : I4 {
+ char _iv5;
+ int _iv6;
+ int _iv7;
+}
+
+@property int P1;
+@end
+
+@implementation I2
+@end
+
+@implementation I3
+@end
+
+@implementation I4
+@end
+
+@interface I5 ()
+@property int P2;
+@end
+
+#if 0
+int g2 = sizeof(I2);
+int g3 = sizeof(I3);
+int g4 = sizeof(I4);
+int g5_0 = sizeof(I5);
+#endif
+
+@implementation I5
+#ifdef __x86_64
+@synthesize P1 = _MadeUpName;
+@synthesize P2 = _AnotherMadeUpName;
+#else
+@synthesize P1 = _iv6;
+@synthesize P2 = _iv7;
+#endif
+@end
+
+#if 0
+int g5_1 = sizeof(I5);
+#endif
+
+@interface T0_I0 {
+ double iv_A_0;
+ char iv_A_1;
+}
+@end
+
+@interface T0_I1 : T0_I0 {
+ char iv_B_0;
+}
+@end
+
+@interface T0_I2 : T0_I1 {
+ char iv_C_0;
+}
+@end
+
+#if 0
+int g6 = sizeof(T0_I0);
+int g7 = sizeof(T0_I1);
+int g8 = sizeof(T0_I2);
+#endif
+
+@implementation T0_I0 @end
+@implementation T0_I1 @end
+@implementation T0_I2 @end
+
+void f0(I2*i2,I3*i3,I4*i4,I5*i5,T0_I0*t0_i0,T0_I1*t0_i1,T0_I2*t0_i2) {
+}
+
+// Thomas Wang's ui32 hash.
+unsigned hash_ui32_to_ui32(unsigned a) {
+ a = (a ^ 61) ^ (a >> 16);
+ a = a + (a << 3);
+ a = a ^ (a >> 4);
+ a = a * 0x27d4eb2d;
+ a = a ^ (a >> 15);
+ return a;
+}
+
+unsigned char hash_ui32_to_ui8(unsigned ui) {
+ ui = hash_ui32_to_ui32(ui);
+ ui ^= ui>>8;
+ ui ^= ui>>8;
+ ui ^= ui>>8;
+ return (unsigned char) ui;
+}
+
+void *init() {
+ unsigned i, N = 1024;
+ unsigned char *p = malloc(N);
+ for (i=0; i != N; ++i)
+ p[i] = hash_ui32_to_ui8(i);
+ return p;
+}
+
+int main(){
+ void *p = init();
+ f0(p,p,p,p,p,p,p);
+}
diff --git a/test/FrontendObjC/2009-08-05-utf16.m b/test/FrontendObjC/2009-08-05-utf16.m
new file mode 100644
index 0000000..2964ecf
--- /dev/null
+++ b/test/FrontendObjC/2009-08-05-utf16.m
@@ -0,0 +1,5 @@
+/* RUN: %llvmgcc -w -x objective-c -S %s -o - | grep {__utf16_string_1} | grep {internal constant} | grep {12 x i8}
+ rdar://7095855 rdar://7115749 */
+
+void *P = @"iPod™";
+
diff --git a/test/FrontendObjC/2009-08-17-DebugInfo.m b/test/FrontendObjC/2009-08-17-DebugInfo.m
new file mode 100644
index 0000000..2c72e95
--- /dev/null
+++ b/test/FrontendObjC/2009-08-17-DebugInfo.m
@@ -0,0 +1,28 @@
+// This is a regression test on debug info to make sure that we can set a
+// breakpoint on a objective message.
+// RUN: %llvmgcc -S -O0 -g %s -o - | llc -o %t.s -O0
+// RUN: %compile_c %t.s -o %t.o
+// RUN: %link %t.o -o %t.exe -framework Foundation
+// RUN: echo {break randomFunc\n} > %t.in
+// RUN: gdb -q -batch -n -x %t.in %t.exe | tee %t.out | \
+// RUN: grep {Breakpoint 1 at 0x.*: file 2009-08-17-DebugInfo.m, line 21}
+// XTARGET: darwin
+@interface MyClass
+{
+ int my;
+}
++ init;
+- randomFunc;
+@end
+
+@implementation MyClass
++ init {
+}
+- randomFunc { my = 42; }
+@end
+
+int main() {
+ id o = [MyClass init];
+ [o randomFunc];
+ return 0;
+}
diff --git a/test/FrontendObjC/2009-11-30-Objc-ID.m b/test/FrontendObjC/2009-11-30-Objc-ID.m
new file mode 100644
index 0000000..787bf72
--- /dev/null
+++ b/test/FrontendObjC/2009-11-30-Objc-ID.m
@@ -0,0 +1,14 @@
+// RUN: %llvmgcc -S -O0 -g %s -o - | \
+// RUN: llc --disable-fp-elim -o %t.s -O0
+// RUN: grep id %t.s | grep DW_AT_name
+@interface A
+-(id) blah;
+@end
+
+@implementation A
+-(id)blah {
+ int i = 1;
+ i++;
+ return i;
+}
+@end
diff --git a/test/FrontendObjC/2010-02-01-utf16-with-null.m b/test/FrontendObjC/2010-02-01-utf16-with-null.m
new file mode 100644
index 0000000..86e4637
--- /dev/null
+++ b/test/FrontendObjC/2010-02-01-utf16-with-null.m
@@ -0,0 +1,5 @@
+/* RUN: %llvmgcc -w -x objective-c -S %s -o - | not grep {__ustring}
+ rdar://7589850 */
+
+void *P = @"good\0bye";
+
diff --git a/test/FrontendObjC/dg.exp b/test/FrontendObjC/dg.exp
new file mode 100644
index 0000000..18f73a79
--- /dev/null
+++ b/test/FrontendObjC/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports objc ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{m}]]
+}
diff --git a/test/Integer/2007-01-19-TruncSext.ll b/test/Integer/2007-01-19-TruncSext.ll
new file mode 100644
index 0000000..3fee6bc
--- /dev/null
+++ b/test/Integer/2007-01-19-TruncSext.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+; RUN: llvm-as < %s | lli --force-interpreter=true | grep -- -255
+
+@ARRAY = global [ 20 x i17 ] zeroinitializer
+@FORMAT = constant [ 4 x i8 ] c"%d\0A\00"
+
+declare i32 @printf(i8* %format, ...)
+
+define void @multiply(i32 %index, i32 %X, i32 %Y) {
+ %Z = mul i32 %X, %Y
+ %P = getelementptr [20 x i17]* @ARRAY, i32 0, i32 %index
+ %Result = trunc i32 %Z to i17
+ store i17 %Result, i17* %P
+ ret void
+}
+
+define i32 @main(i32 %argc, i8** %argv) {
+ %i = bitcast i32 0 to i32
+ call void @multiply(i32 %i, i32 -1, i32 255)
+ %P = getelementptr [20 x i17]* @ARRAY, i32 0, i32 0
+ %X = load i17* %P
+ %result = sext i17 %X to i32
+ %fmt = getelementptr [4 x i8]* @FORMAT, i32 0, i32 0
+ call i32 (i8*,...)* @printf(i8* %fmt, i32 %result)
+ ret i32 0
+}
+
diff --git a/test/Integer/BitArith.ll b/test/Integer/BitArith.ll
new file mode 100644
index 0000000..350a984
--- /dev/null
+++ b/test/Integer/BitArith.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+declare void @"foo"(i31 %i, i63 %j, i10 %k)
+
+
+; foo test basic arith operations
+define void @"foo"(i31 %i, i63 %j, i10 %k)
+begin
+ %t1 = trunc i63 %j to i31
+ %t2 = add i31 %t1, %i
+ %t20 = add i31 3, %t1
+ %t3 = zext i31 %i to i63
+ %t4 = sub i63 %t3, %j
+ %t40 = sub i63 %j, -100
+ %t5 = mul i10 %k, 7
+ %t6 = sdiv i63 %j, -2
+ %t7 = udiv i63 %j, %t3
+ %t8 = urem i10 %k, 10
+ %t9 = srem i10 %k, -10
+ ret void
+end
+
diff --git a/test/Integer/BitBit.ll b/test/Integer/BitBit.ll
new file mode 100644
index 0000000..420bbe5
--- /dev/null
+++ b/test/Integer/BitBit.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+declare void @"foo"(i31 %i, i33 %j)
+
+
+; foo test basic bitwise operations
+define void @"foo"(i31 %i, i33 %j)
+begin
+ %t1 = trunc i33 %j to i31
+ %t2 = and i31 %t1, %i
+ %t3 = sext i31 %i to i33
+ %t4 = or i33 %t3, %j
+ %t5 = xor i31 %t2, 7
+ %t6 = shl i31 %i, 2
+ %t7 = trunc i31 %i to i8
+ %t8 = shl i8 %t7, 3
+ %t9 = lshr i33 %j, 31
+ %t7z = zext i8 %t7 to i33
+ %t10 = ashr i33 %j, %t7z
+ ret void
+end
+
diff --git a/test/Integer/BitCast.ll b/test/Integer/BitCast.ll
new file mode 100644
index 0000000..0bef023
--- /dev/null
+++ b/test/Integer/BitCast.ll
@@ -0,0 +1,26 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+declare void @"foo"(i31 %i, i1280 %j, i1 %k, float %f)
+
+
+; foo test basic arith operations
+define void @"foo"(i31 %i, i1280 %j, i1 %k, float %f)
+begin
+ %t1 = trunc i1280 %j to i31
+ %t2 = trunc i31 %t1 to i1
+
+ %t3 = zext i31 %i to i1280
+ %t4 = sext i31 %i to i1280
+
+ %t5 = fptoui float 0x400921FA00000000 to i31
+ %t6 = uitofp i31 %t5 to double
+
+ %t7 = fptosi double 0xC0934A456D5CFAAD to i28
+ %t8 = sitofp i8 -1 to double
+ %t9 = uitofp i8 255 to double
+
+ ret void
+end
+
diff --git a/test/Integer/BitIcmp.ll b/test/Integer/BitIcmp.ll
new file mode 100644
index 0000000..c224612
--- /dev/null
+++ b/test/Integer/BitIcmp.ll
@@ -0,0 +1,43 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+define i55 @"simpleIcmp"(i55 %i0, i55 %j0)
+begin
+ %t1 = icmp eq i55 %i0, %j0
+ %t2 = icmp ne i55 %i0, %j0
+ %t3 = icmp ult i55 %i0, %j0
+ %t4 = icmp sgt i55 %i0, %j0
+ %t5 = icmp ule i55 %i0, %j0
+ %t6 = icmp sge i55 %i0, %j0
+
+ %t7 = icmp eq i55 %i0, 1098765432
+ %t8 = icmp ne i55 %i0, -31415926
+
+ %t9 = icmp ult i55 10000, %j0
+ %t10 = icmp sgt i55 -10000, %j0
+
+ ret i55 %i0
+end
+
+define i31 @"phitest"(i12 %i)
+begin
+
+HasArg:
+ %n1 = add i12 1, %i
+ br label %Continue
+
+Continue:
+ %n = phi i12 [%n1, %HasArg], [%next, %Continue]
+ %next = add i12 1, %n
+ br label %Continue
+end
+
+define i18 @"select"(i18 %i)
+begin
+ %t = icmp sgt i18 %i, 100
+ %k = select i1 %t, i18 %i, i18 999
+ ret i18 %k
+end
+
diff --git a/test/Integer/BitMem.ll b/test/Integer/BitMem.ll
new file mode 100644
index 0000000..2c093bc
--- /dev/null
+++ b/test/Integer/BitMem.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+declare void @"foo"()
+
+
+; foo test basic arith operations
+define void @"foo"() {
+ %t1 = malloc i31, i32 4
+ %t2 = malloc i31, i32 7, align 1024
+ %t3 = malloc [4 x i15]
+
+ %idx = getelementptr [4 x i15]* %t3, i64 0, i64 2
+ store i15 -123, i15* %idx
+
+ free [4 x i15]* %t3
+ free i31* %t2
+ free i31* %t1
+
+ %t4 = alloca i12, i32 100
+ free i12* %t4
+
+ %t5 = alloca i31
+ store i31 -123, i31* %t5
+
+ free i31* %t5
+ ret void
+}
diff --git a/test/Integer/BitMisc.ll b/test/Integer/BitMisc.ll
new file mode 100644
index 0000000..8ce4d4a
--- /dev/null
+++ b/test/Integer/BitMisc.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+@MyVar = external global i19
+@MyIntList = external global { i39 *, i19 }
+ external global i19 ; i19*:0
+
+@AConst = constant i19 -123
+
+@AString = constant [4 x i8] c"test"
+
+@ZeroInit = global { [100 x i19 ], [40 x float ] } { [100 x i19] zeroinitializer,
+ [40 x float] zeroinitializer }
+
+
+define i19 @"foo"(i19 %blah)
+begin
+ store i19 5, i19* @MyVar
+ %idx = getelementptr { i39 *, i19 } * @MyIntList, i64 0, i32 1
+ store i19 12, i19* %idx
+ ret i19 %blah
+end
diff --git a/test/Integer/BitPacked.ll b/test/Integer/BitPacked.ll
new file mode 100644
index 0000000..e6e453a
--- /dev/null
+++ b/test/Integer/BitPacked.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@foo1 = external global <4 x float>
+@foo2 = external global <2 x i10>
+
+
+define void @main()
+{
+ store <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, <4 x float>* @foo1
+ store <2 x i10> <i10 4, i10 4>, <2 x i10>* @foo2
+ %l1 = load <4 x float>* @foo1
+ %l2 = load <2 x i10>* @foo2
+ %r1 = extractelement <2 x i10> %l2, i32 1
+ %r2 = extractelement <2 x i10> %l2, i32 0
+ %t = mul i10 %r1, %r2
+ %r3 = insertelement <2 x i10> %l2, i10 %t, i32 0
+ store <2 x i10> %r3, <2 x i10>* @foo2
+ ret void
+}
diff --git a/test/Integer/a15.ll b/test/Integer/a15.ll
new file mode 100644
index 0000000..5c9dc3b
--- /dev/null
+++ b/test/Integer/a15.ll
@@ -0,0 +1,27 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t.ll
+; RUN: diff %t.ll %s.out
+
+; test 15 bits
+;
+@b = constant i15 add(i15 32767, i15 1)
+@c = constant i15 add(i15 32767, i15 32767)
+@d = constant i15 add(i15 32760, i15 8)
+@e = constant i15 sub(i15 0 , i15 1)
+@f = constant i15 sub(i15 0 , i15 32767)
+@g = constant i15 sub(i15 2 , i15 32767)
+
+@h = constant i15 shl(i15 1 , i15 15)
+@i = constant i15 shl(i15 1 , i15 14)
+@j = constant i15 lshr(i15 32767 , i15 14)
+@l = constant i15 ashr(i15 32767 , i15 14)
+
+@n = constant i15 mul(i15 32767, i15 2)
+@q = constant i15 mul(i15 -16383,i15 -3)
+@r = constant i15 sdiv(i15 -1, i15 16383)
+@s = constant i15 udiv(i15 -1, i15 16383)
+@t = constant i15 srem(i15 1, i15 32766)
+@u = constant i15 urem(i15 32767,i15 -1)
+@o = constant i15 trunc( i16 32768 to i15 )
+@p = constant i15 trunc( i16 32767 to i15 )
+@v = constant i15 srem(i15 -1, i15 768)
+
diff --git a/test/Integer/a15.ll.out b/test/Integer/a15.ll.out
new file mode 100644
index 0000000..5195cdf
--- /dev/null
+++ b/test/Integer/a15.ll.out
@@ -0,0 +1,21 @@
+; ModuleID = '<stdin>'
+
+@b = constant i15 0 ; <i15*> [#uses=0]
+@c = constant i15 -2 ; <i15*> [#uses=0]
+@d = constant i15 0 ; <i15*> [#uses=0]
+@e = constant i15 -1 ; <i15*> [#uses=0]
+@f = constant i15 1 ; <i15*> [#uses=0]
+@g = constant i15 3 ; <i15*> [#uses=0]
+@h = constant i15 undef ; <i15*> [#uses=0]
+@i = constant i15 -16384 ; <i15*> [#uses=0]
+@j = constant i15 1 ; <i15*> [#uses=0]
+@l = constant i15 -1 ; <i15*> [#uses=0]
+@n = constant i15 -2 ; <i15*> [#uses=0]
+@q = constant i15 16381 ; <i15*> [#uses=0]
+@r = constant i15 0 ; <i15*> [#uses=0]
+@s = constant i15 2 ; <i15*> [#uses=0]
+@t = constant i15 1 ; <i15*> [#uses=0]
+@u = constant i15 0 ; <i15*> [#uses=0]
+@o = constant i15 0 ; <i15*> [#uses=0]
+@p = constant i15 -1 ; <i15*> [#uses=0]
+@v = constant i15 -1 ; <i15*> [#uses=0]
diff --git a/test/Integer/a17.ll b/test/Integer/a17.ll
new file mode 100644
index 0000000..db03e7c
--- /dev/null
+++ b/test/Integer/a17.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t.ll
+; RUN: diff %t.ll %s.out
+
+; test 17 bits
+;
+@b = constant i17 add(i17 131071, i17 1)
+@c = constant i17 add(i17 131071, i17 131071)
+@d = constant i17 add(i17 131064, i17 8)
+@e = constant i17 sub(i17 0 , i17 1)
+@f = constant i17 sub(i17 0 , i17 131071)
+@g = constant i17 sub(i17 2 , i17 131071)
+
+@h = constant i17 shl(i17 1 , i17 17)
+@i = constant i17 shl(i17 1 , i17 16)
+@j = constant i17 lshr(i17 131071 , i17 16)
+@l = constant i17 ashr(i17 131071 , i17 16)
+
+@n = constant i17 mul(i17 131071, i17 2)
+@q = constant i17 sdiv(i17 -1, i17 65535)
+@r = constant i17 udiv(i17 -1, i17 65535)
+@s = constant i17 srem(i17 1, i17 131070)
+@t = constant i17 urem(i17 131071,i17 -1)
+@o = constant i17 trunc( i18 131072 to i17 )
+@p = constant i17 trunc( i18 131071 to i17 )
+@v = constant i17 srem(i17 -1, i17 15)
diff --git a/test/Integer/a17.ll.out b/test/Integer/a17.ll.out
new file mode 100644
index 0000000..ba66412
--- /dev/null
+++ b/test/Integer/a17.ll.out
@@ -0,0 +1,20 @@
+; ModuleID = '<stdin>'
+
+@b = constant i17 0 ; <i17*> [#uses=0]
+@c = constant i17 -2 ; <i17*> [#uses=0]
+@d = constant i17 0 ; <i17*> [#uses=0]
+@e = constant i17 -1 ; <i17*> [#uses=0]
+@f = constant i17 1 ; <i17*> [#uses=0]
+@g = constant i17 3 ; <i17*> [#uses=0]
+@h = constant i17 undef ; <i17*> [#uses=0]
+@i = constant i17 -65536 ; <i17*> [#uses=0]
+@j = constant i17 1 ; <i17*> [#uses=0]
+@l = constant i17 -1 ; <i17*> [#uses=0]
+@n = constant i17 -2 ; <i17*> [#uses=0]
+@q = constant i17 0 ; <i17*> [#uses=0]
+@r = constant i17 2 ; <i17*> [#uses=0]
+@s = constant i17 1 ; <i17*> [#uses=0]
+@t = constant i17 0 ; <i17*> [#uses=0]
+@o = constant i17 0 ; <i17*> [#uses=0]
+@p = constant i17 -1 ; <i17*> [#uses=0]
+@v = constant i17 -1 ; <i17*> [#uses=0]
diff --git a/test/Integer/a31.ll b/test/Integer/a31.ll
new file mode 100644
index 0000000..c0c571f
--- /dev/null
+++ b/test/Integer/a31.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t.ll
+; RUN: diff %t.ll %s.out
+
+; test 31 bits
+;
+@b = constant i31 add(i31 2147483647, i31 1)
+@c = constant i31 add(i31 2147483647, i31 2147483647)
+@d = constant i31 add(i31 2147483640, i31 8)
+@e = constant i31 sub(i31 0 , i31 1)
+@f = constant i31 sub(i31 0 , i31 2147483647)
+@g = constant i31 sub(i31 2 , i31 2147483647)
+
+@h = constant i31 shl(i31 1 , i31 31)
+@i = constant i31 shl(i31 1 , i31 30)
+@j = constant i31 lshr(i31 2147483647 , i31 30)
+@l = constant i31 ashr(i31 2147483647 , i31 30)
+
+@n = constant i31 mul(i31 2147483647, i31 2)
+@q = constant i31 sdiv(i31 -1, i31 1073741823)
+@r = constant i31 udiv(i31 -1, i31 1073741823)
+@s = constant i31 srem(i31 1, i31 2147483646)
+@t = constant i31 urem(i31 2147483647,i31 -1)
+@o = constant i31 trunc( i32 2147483648 to i31 )
+@p = constant i31 trunc( i32 2147483647 to i31 )
+@u = constant i31 srem(i31 -3, i31 17)
diff --git a/test/Integer/a31.ll.out b/test/Integer/a31.ll.out
new file mode 100644
index 0000000..7407a74
--- /dev/null
+++ b/test/Integer/a31.ll.out
@@ -0,0 +1,20 @@
+; ModuleID = '<stdin>'
+
+@b = constant i31 0 ; <i31*> [#uses=0]
+@c = constant i31 -2 ; <i31*> [#uses=0]
+@d = constant i31 0 ; <i31*> [#uses=0]
+@e = constant i31 -1 ; <i31*> [#uses=0]
+@f = constant i31 1 ; <i31*> [#uses=0]
+@g = constant i31 3 ; <i31*> [#uses=0]
+@h = constant i31 undef ; <i31*> [#uses=0]
+@i = constant i31 -1073741824 ; <i31*> [#uses=0]
+@j = constant i31 1 ; <i31*> [#uses=0]
+@l = constant i31 -1 ; <i31*> [#uses=0]
+@n = constant i31 -2 ; <i31*> [#uses=0]
+@q = constant i31 0 ; <i31*> [#uses=0]
+@r = constant i31 2 ; <i31*> [#uses=0]
+@s = constant i31 1 ; <i31*> [#uses=0]
+@t = constant i31 0 ; <i31*> [#uses=0]
+@o = constant i31 0 ; <i31*> [#uses=0]
+@p = constant i31 -1 ; <i31*> [#uses=0]
+@u = constant i31 -3 ; <i31*> [#uses=0]
diff --git a/test/Integer/a33.ll b/test/Integer/a33.ll
new file mode 100644
index 0000000..f328907
--- /dev/null
+++ b/test/Integer/a33.ll
@@ -0,0 +1,26 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t.ll
+; RUN: diff %t.ll %s.out
+
+; test 33 bits
+;
+@b = constant i33 add(i33 8589934591, i33 1)
+@c = constant i33 add(i33 8589934591, i33 8589934591)
+@d = constant i33 add(i33 8589934584, i33 8)
+@e = constant i33 sub(i33 0 , i33 1)
+@f = constant i33 sub(i33 0 , i33 8589934591)
+@g = constant i33 sub(i33 2 , i33 8589934591)
+
+@h = constant i33 shl(i33 1 , i33 33)
+@i = constant i33 shl(i33 1 , i33 32)
+@j = constant i33 lshr(i33 8589934591 , i33 32)
+@l = constant i33 ashr(i33 8589934591 , i33 32)
+
+@n = constant i33 mul(i33 8589934591, i33 2)
+@q = constant i33 sdiv(i33 -1, i33 4294967295)
+@r = constant i33 udiv(i33 -1, i33 4294967295)
+@s = constant i33 srem(i33 1, i33 8589934590)
+@t = constant i33 urem(i33 8589934591,i33 -1)
+@o = constant i33 trunc( i34 8589934592 to i33 )
+@p = constant i33 trunc( i34 8589934591 to i33 )
+@u = constant i33 srem(i33 -1, i33 17)
+
diff --git a/test/Integer/a33.ll.out b/test/Integer/a33.ll.out
new file mode 100644
index 0000000..6cd61ee
--- /dev/null
+++ b/test/Integer/a33.ll.out
@@ -0,0 +1,20 @@
+; ModuleID = '<stdin>'
+
+@b = constant i33 0 ; <i33*> [#uses=0]
+@c = constant i33 -2 ; <i33*> [#uses=0]
+@d = constant i33 0 ; <i33*> [#uses=0]
+@e = constant i33 -1 ; <i33*> [#uses=0]
+@f = constant i33 1 ; <i33*> [#uses=0]
+@g = constant i33 3 ; <i33*> [#uses=0]
+@h = constant i33 undef ; <i33*> [#uses=0]
+@i = constant i33 -4294967296 ; <i33*> [#uses=0]
+@j = constant i33 1 ; <i33*> [#uses=0]
+@l = constant i33 -1 ; <i33*> [#uses=0]
+@n = constant i33 -2 ; <i33*> [#uses=0]
+@q = constant i33 0 ; <i33*> [#uses=0]
+@r = constant i33 2 ; <i33*> [#uses=0]
+@s = constant i33 1 ; <i33*> [#uses=0]
+@t = constant i33 0 ; <i33*> [#uses=0]
+@o = constant i33 0 ; <i33*> [#uses=0]
+@p = constant i33 -1 ; <i33*> [#uses=0]
+@u = constant i33 -1 ; <i33*> [#uses=0]
diff --git a/test/Integer/a63.ll b/test/Integer/a63.ll
new file mode 100644
index 0000000..052ecd5
--- /dev/null
+++ b/test/Integer/a63.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t.ll
+; RUN: diff %t.ll %s.out
+
+; test 63 bits
+;
+@b = constant i63 add(i63 9223372036854775807, i63 1)
+@c = constant i63 add(i63 9223372036854775807, i63 9223372036854775807)
+@d = constant i63 add(i63 9223372036854775800, i63 8)
+@e = constant i63 sub(i63 0 , i63 1)
+@f = constant i63 sub(i63 0 , i63 9223372036854775807)
+@g = constant i63 sub(i63 2 , i63 9223372036854775807)
+
+@h = constant i63 shl(i63 1 , i63 63)
+@i = constant i63 shl(i63 1 , i63 62)
+@j = constant i63 lshr(i63 9223372036854775807 , i63 62)
+@l = constant i63 ashr(i63 9223372036854775807 , i63 62)
+
+@n = constant i63 mul(i63 9223372036854775807, i63 2)
+@q = constant i63 sdiv(i63 -1, i63 4611686018427387903)
+@u = constant i63 sdiv(i63 -1, i63 1)
+@r = constant i63 udiv(i63 -1, i63 4611686018427387903)
+@s = constant i63 srem(i63 3, i63 9223372036854775806)
+@t = constant i63 urem(i63 9223372036854775807,i63 -1)
+@o = constant i63 trunc( i64 9223372036854775808 to i63 )
+@p = constant i63 trunc( i64 9223372036854775807 to i63 )
diff --git a/test/Integer/a63.ll.out b/test/Integer/a63.ll.out
new file mode 100644
index 0000000..18dff5a
--- /dev/null
+++ b/test/Integer/a63.ll.out
@@ -0,0 +1,20 @@
+; ModuleID = '<stdin>'
+
+@b = constant i63 0 ; <i63*> [#uses=0]
+@c = constant i63 -2 ; <i63*> [#uses=0]
+@d = constant i63 0 ; <i63*> [#uses=0]
+@e = constant i63 -1 ; <i63*> [#uses=0]
+@f = constant i63 1 ; <i63*> [#uses=0]
+@g = constant i63 3 ; <i63*> [#uses=0]
+@h = constant i63 undef ; <i63*> [#uses=0]
+@i = constant i63 -4611686018427387904 ; <i63*> [#uses=0]
+@j = constant i63 1 ; <i63*> [#uses=0]
+@l = constant i63 -1 ; <i63*> [#uses=0]
+@n = constant i63 -2 ; <i63*> [#uses=0]
+@q = constant i63 0 ; <i63*> [#uses=0]
+@u = constant i63 -1 ; <i63*> [#uses=0]
+@r = constant i63 2 ; <i63*> [#uses=0]
+@s = constant i63 1 ; <i63*> [#uses=0]
+@t = constant i63 0 ; <i63*> [#uses=0]
+@o = constant i63 0 ; <i63*> [#uses=0]
+@p = constant i63 -1 ; <i63*> [#uses=0]
diff --git a/test/Integer/a7.ll b/test/Integer/a7.ll
new file mode 100644
index 0000000..1edb35f
--- /dev/null
+++ b/test/Integer/a7.ll
@@ -0,0 +1,31 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t.ll
+; RUN: diff %t.ll %s.out
+
+; test 7 bits
+;
+@b = constant i7 add(i7 127, i7 1)
+@q = constant i7 add(i7 -64, i7 -1)
+@c = constant i7 add(i7 127, i7 127)
+@d = constant i7 add(i7 120, i7 8)
+@e = constant i7 sub(i7 0 , i7 1)
+@f = constant i7 sub(i7 0 , i7 127)
+@g = constant i7 sub(i7 2 , i7 127)
+@r = constant i7 sub(i7 -3, i7 120)
+@s = constant i7 sub(i7 -3, i7 -8)
+
+@h = constant i7 shl(i7 1 , i7 7)
+@i = constant i7 shl(i7 1 , i7 6)
+@j = constant i7 lshr(i7 127 , i7 6)
+@l = constant i7 ashr(i7 127 , i7 6)
+@m2= constant i7 ashr(i7 -1 , i7 3)
+
+@n = constant i7 mul(i7 127, i7 2)
+@t = constant i7 mul(i7 -63, i7 -2)
+@u = constant i7 mul(i7 -32, i7 2)
+@v = constant i7 sdiv(i7 -1, i7 63)
+@w = constant i7 udiv(i7 -1, i7 63)
+@x = constant i7 srem(i7 1 , i7 126)
+@y = constant i7 urem(i7 127, i7 -1)
+@o = constant i7 trunc( i8 128 to i7 )
+@p = constant i7 trunc( i8 255 to i7 )
+
diff --git a/test/Integer/a7.ll.out b/test/Integer/a7.ll.out
new file mode 100644
index 0000000..250925d
--- /dev/null
+++ b/test/Integer/a7.ll.out
@@ -0,0 +1,25 @@
+; ModuleID = '<stdin>'
+
+@b = constant i7 0 ; <i7*> [#uses=0]
+@q = constant i7 63 ; <i7*> [#uses=0]
+@c = constant i7 -2 ; <i7*> [#uses=0]
+@d = constant i7 0 ; <i7*> [#uses=0]
+@e = constant i7 -1 ; <i7*> [#uses=0]
+@f = constant i7 1 ; <i7*> [#uses=0]
+@g = constant i7 3 ; <i7*> [#uses=0]
+@r = constant i7 5 ; <i7*> [#uses=0]
+@s = constant i7 5 ; <i7*> [#uses=0]
+@h = constant i7 undef ; <i7*> [#uses=0]
+@i = constant i7 -64 ; <i7*> [#uses=0]
+@j = constant i7 1 ; <i7*> [#uses=0]
+@l = constant i7 -1 ; <i7*> [#uses=0]
+@m2 = constant i7 -1 ; <i7*> [#uses=0]
+@n = constant i7 -2 ; <i7*> [#uses=0]
+@t = constant i7 -2 ; <i7*> [#uses=0]
+@u = constant i7 -64 ; <i7*> [#uses=0]
+@v = constant i7 0 ; <i7*> [#uses=0]
+@w = constant i7 2 ; <i7*> [#uses=0]
+@x = constant i7 1 ; <i7*> [#uses=0]
+@y = constant i7 0 ; <i7*> [#uses=0]
+@o = constant i7 0 ; <i7*> [#uses=0]
+@p = constant i7 -1 ; <i7*> [#uses=0]
diff --git a/test/Integer/a9.ll b/test/Integer/a9.ll
new file mode 100644
index 0000000..711ec82
--- /dev/null
+++ b/test/Integer/a9.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t.ll
+; RUN: diff %t.ll %s.out
+
+; test 9 bits
+;
+@b = constant i9 add(i9 511, i9 1)
+@c = constant i9 add(i9 511, i9 511)
+@d = constant i9 add(i9 504, i9 8)
+@e = constant i9 sub(i9 0 , i9 1)
+@f = constant i9 sub(i9 0 , i9 511)
+@g = constant i9 sub(i9 2 , i9 511)
+
+@h = constant i9 shl(i9 1 , i9 9)
+@i = constant i9 shl(i9 1 , i9 8)
+@j = constant i9 lshr(i9 511 , i9 8)
+@l = constant i9 ashr(i9 511 , i9 8)
+
+@n = constant i9 mul(i9 511, i9 2)
+@q = constant i9 sdiv(i9 511, i9 2)
+@r = constant i9 udiv(i9 511, i9 2)
+@s = constant i9 urem(i9 511, i9 -1)
+@t = constant i9 srem(i9 1, i9 510)
+@o = constant i9 trunc( i10 512 to i9 )
+@p = constant i9 trunc( i10 511 to i9 )
+
diff --git a/test/Integer/a9.ll.out b/test/Integer/a9.ll.out
new file mode 100644
index 0000000..6e38062
--- /dev/null
+++ b/test/Integer/a9.ll.out
@@ -0,0 +1,19 @@
+; ModuleID = '<stdin>'
+
+@b = constant i9 0 ; <i9*> [#uses=0]
+@c = constant i9 -2 ; <i9*> [#uses=0]
+@d = constant i9 0 ; <i9*> [#uses=0]
+@e = constant i9 -1 ; <i9*> [#uses=0]
+@f = constant i9 1 ; <i9*> [#uses=0]
+@g = constant i9 3 ; <i9*> [#uses=0]
+@h = constant i9 undef ; <i9*> [#uses=0]
+@i = constant i9 -256 ; <i9*> [#uses=0]
+@j = constant i9 1 ; <i9*> [#uses=0]
+@l = constant i9 -1 ; <i9*> [#uses=0]
+@n = constant i9 -2 ; <i9*> [#uses=0]
+@q = constant i9 0 ; <i9*> [#uses=0]
+@r = constant i9 255 ; <i9*> [#uses=0]
+@s = constant i9 0 ; <i9*> [#uses=0]
+@t = constant i9 1 ; <i9*> [#uses=0]
+@o = constant i9 0 ; <i9*> [#uses=0]
+@p = constant i9 -1 ; <i9*> [#uses=0]
diff --git a/test/Integer/alignment_bt.ll b/test/Integer/alignment_bt.ll
new file mode 100644
index 0000000..3a9d051
--- /dev/null
+++ b/test/Integer/alignment_bt.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@X = global i19 4, align 16
+
+define i19 *@test() align 32 {
+ %X = alloca i19, align 4
+ %Y = alloca i51, i32 42, align 16
+ %Z = alloca i32, align 1
+ ret i19 *%X
+}
+
+define i19 *@test2() {
+ %X = malloc i19, align 4
+ %Y = malloc i51, i32 42, align 16
+ %Z = malloc i32, align 1
+ ret i19 *%X
+}
+
+
diff --git a/test/Integer/basictest_bt.ll b/test/Integer/basictest_bt.ll
new file mode 100644
index 0000000..5c98856
--- /dev/null
+++ b/test/Integer/basictest_bt.ll
@@ -0,0 +1,31 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+; Test "stripped" format where nothing is symbolic... this is how the bytecode
+; format looks anyways (except for negative vs positive offsets)...
+;
+define void @void(i39, i39) {
+ add i39 0, 0 ; <i39>:3 [#uses=2]
+ sub i39 0, 4 ; <i39>:4 [#uses=2]
+ br label %5
+
+; <label>:5 ; preds = %5, %2
+ add i39 %0, %1 ; <i39>:6 [#uses=2]
+ sub i39 %6, %4 ; <i39>:7 [#uses=1]
+ icmp sle i39 %7, %3 ; <i1>:8 [#uses=1]
+ br i1 %8, label %9, label %5
+
+; <label>:9 ; preds = %5
+ add i39 %0, %1 ; <i39>:10 [#uses=0]
+ sub i39 %6, %4 ; <i39>:11 [#uses=1]
+ icmp sle i39 %11, %3 ; <i1>:12 [#uses=0]
+ ret void
+}
+
+; This function always returns zero
+define i39 @zarro() {
+Startup:
+ ret i39 0
+}
diff --git a/test/Integer/cfgstructures_bt.ll b/test/Integer/cfgstructures_bt.ll
new file mode 100644
index 0000000..09aec1f
--- /dev/null
+++ b/test/Integer/cfgstructures_bt.ll
@@ -0,0 +1,56 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+;; This is an irreducible flow graph
+
+
+define void @"irreducible"(i1 %cond)
+begin
+ br i1 %cond, label %X, label %Y
+
+X:
+ br label %Y
+Y:
+ br label %X
+end
+
+;; This is a pair of loops that share the same header
+
+define void @"sharedheader"(i1 %cond)
+begin
+ br label %A
+A:
+ br i1 %cond, label %X, label %Y
+
+X:
+ br label %A
+Y:
+ br label %A
+end
+
+;; This is a simple nested loop
+define void @"nested"(i1 %cond1, i1 %cond2, i1 %cond3)
+begin
+ br label %Loop1
+
+Loop1:
+ br label %Loop2
+
+Loop2:
+ br label %Loop3
+
+Loop3:
+ br i1 %cond3, label %Loop3, label %L3Exit
+
+L3Exit:
+ br i1 %cond2, label %Loop2, label %L2Exit
+
+L2Exit:
+ br i1 %cond1, label %Loop1, label %L1Exit
+
+L1Exit:
+ ret void
+end
+
diff --git a/test/Integer/constexpr_bt.ll b/test/Integer/constexpr_bt.ll
new file mode 100644
index 0000000..fc8b06d
--- /dev/null
+++ b/test/Integer/constexpr_bt.ll
@@ -0,0 +1,84 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+; This testcase is for testing expressions constructed from
+; constant values, including constant pointers to globals.
+;
+
+;;-------------------------------
+;; Test constant cast expressions
+;;-------------------------------
+
+global i63 u0x00001 ; hexadecimal unsigned integer constants
+global i63 s0x012312 ; hexadecimal signed integer constants
+
+@t2 = global i33* @t1 ;; Forward reference without cast
+@t3 = global i33* bitcast (i33* @t1 to i33*) ;; Forward reference with cast
+@t1 = global i33 4 ;; i32* @0
+@t4 = global i33** bitcast (i33** @t3 to i33**) ;; Cast of a previous cast
+@t5 = global i33** @t3 ;; Reference to a previous cast
+@t6 = global i33*** @t4
+@t7 = global float* inttoptr (i32 12345678 to float*) ;; Cast ordinary value to ptr
+@t9 = global i33 fptosi (float sitofp (i33 8 to float) to i33) ;; Nested cast expression
+
+
+global i32* bitcast (float* @4 to i32*) ;; Forward numeric reference
+global float* @4 ;; Duplicate forward numeric reference
+global float 0.0
+
+
+;;---------------------------------------------------
+;; Test constant getelementpr expressions for arrays
+;;---------------------------------------------------
+
+@array = constant [2 x i33] [ i33 12, i33 52 ]
+@arrayPtr = global i33* getelementptr ([2 x i33]* @array, i64 0, i64 0) ;; i33* &@array[0][0]
+@arrayPtr5 = global i33** getelementptr (i33** @arrayPtr, i64 5) ;; i33* &@arrayPtr[5]
+
+@somestr = constant [11x i8] c"hello world"
+@char5 = global i8* getelementptr([11x i8]* @somestr, i64 0, i64 5)
+
+;; cast of getelementptr
+@char8a = global i33* bitcast (i8* getelementptr([11x i8]* @somestr, i64 0, i64 8) to i33*)
+
+;; getelementptr containing casts
+@char8b = global i8* getelementptr([11x i8]* @somestr, i64 sext (i8 0 to i64), i64 sext (i8 8 to i64))
+
+;;-------------------------------------------------------
+;; TODO: Test constant getelementpr expressions for structures
+;;-------------------------------------------------------
+
+%SType = type { i33 , {float, {i8} }, i64 } ;; struct containing struct
+%SAType = type { i33 , {[2x float], i64} } ;; struct containing array
+
+@S1 = global %SType* null ;; Global initialized to NULL
+@S2c = constant %SType { i33 1, {float,{i8}} {float 2.0, {i8} {i8 3}}, i64 4}
+
+@S3c = constant %SAType { i33 1, {[2x float], i64} {[2x float] [float 2.0, float 3.0], i64 4} }
+
+@S1ptr = global %SType** @S1 ;; Ref. to global S1
+@S2 = global %SType* @S2c ;; Ref. to constant S2
+@S3 = global %SAType* @S3c ;; Ref. to constant S3
+
+ ;; Pointer to float (**@S1).1.0
+@S1fld1a = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0)
+ ;; Another ptr to the same!
+@S1fld1b = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0)
+
+@S1fld1bptr = global float** @S1fld1b ;; Ref. to previous pointer
+
+ ;; Pointer to i8 (**@S2).1.1.0
+@S2fld3 = global i8* getelementptr (%SType* @S2c, i64 0, i32 1, i32 1, i32 0)
+
+ ;; Pointer to float (**@S2).1.0[0]
+;@S3fld3 = global float* getelementptr (%SAType** @S3, i64 0, i64 0, i32 1, i32 0, i64 0)
+
+;;---------------------------------------------------------
+;; TODO: Test constant expressions for unary and binary operators
+;;---------------------------------------------------------
+
+;;---------------------------------------------------
+
+
diff --git a/test/Integer/constpointer_bt.ll b/test/Integer/constpointer_bt.ll
new file mode 100644
index 0000000..6be9ec3
--- /dev/null
+++ b/test/Integer/constpointer_bt.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; This testcase is primarily used for testing that global values can be used as
+; constant pointer initializers. This is tricky because they can be forward
+; declared and involves an icky bytecode encoding. There is no meaningful
+; optimization that can be performed on this file, it is just here to test
+; assembly and disassembly.
+;
+
+
+@t3 = global i40 * @t1 ;; Forward reference
+@t1 = global i40 4
+@t4 = global i40 ** @t3 ;; reference to reference
+
+@t2 = global i40 * @t1
+
+global float * @2 ;; Forward numeric reference
+global float * @2 ;; Duplicate forward numeric reference
+global float 0.0
+global float * @2 ;; Numeric reference
+
+
+@fptr = global void() * @f ;; Forward ref method defn
+declare void @"f"() ;; External method
+
+@sptr1 = global [11x i8]* @somestr ;; Forward ref to a constant
+@somestr = constant [11x i8] c"hello world"
+@sptr2 = global [11x i8]* @somestr
+
+
diff --git a/test/Integer/dg.exp b/test/Integer/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Integer/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Integer/fold-fpcast_bt.ll b/test/Integer/fold-fpcast_bt.ll
new file mode 100644
index 0000000..8e5f838
--- /dev/null
+++ b/test/Integer/fold-fpcast_bt.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as < %s | llvm-dis | not grep bitcast
+
+define i60 @test1() {
+ ret i60 fptoui(float 0x400D9999A0000000 to i60)
+}
+
+define float @test2() {
+ ret float uitofp(i60 17 to float)
+}
+
+define i64 @test3() {
+ ret i64 bitcast (double 0x400921FB4D12D84A to i64)
+}
+
+define double @test4() {
+ ret double bitcast (i64 42 to double)
+}
+
+define i30 @test5() {
+ ret i30 fptoui(float 0x400D9999A0000000 to i30)
+}
+
+define float @test6() {
+ ret float uitofp(i30 17 to float)
+}
+
+define i64 @test7() {
+ ret i64 bitcast (double 0x400921FB4D12D84A to i64)
+}
+
+define double @test8() {
+ ret double bitcast (i64 42 to double)
+}
diff --git a/test/Integer/forwardreftest_bt.ll b/test/Integer/forwardreftest_bt.ll
new file mode 100644
index 0000000..5d73eff
--- /dev/null
+++ b/test/Integer/forwardreftest_bt.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+ %myty = type i55
+ %myfn = type float (i55,double,i55,i16)
+ type i55(%myfn*)
+ type i55(i55)
+ type i55(i55(i55)*)
+
+ %thisfuncty = type i55 (i55) *
+
+declare void @F(%thisfuncty, %thisfuncty, %thisfuncty)
+
+; This function always returns zero
+define i55 @zarro(i55 %Func)
+begin
+Startup:
+ add i55 0, 10
+ ret i55 0
+end
+
+define i55 @test(i55)
+begin
+ call void @F(%thisfuncty @zarro, %thisfuncty @test, %thisfuncty @foozball)
+ ret i55 0
+end
+
+define i55 @foozball(i55)
+begin
+ ret i55 0
+end
+
diff --git a/test/Integer/globalredefinition_bt.ll b/test/Integer/globalredefinition_bt.ll
new file mode 100644
index 0000000..b369b2a
--- /dev/null
+++ b/test/Integer/globalredefinition_bt.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; Test forward references and redefinitions of globals
+
+@A = global i17* @B
+@B = global i17 7
+
+declare void @X()
+
+declare void @X()
+
+define void @X() {
+ ret void
+}
+
+declare void @X()
diff --git a/test/Integer/globalvars_bt.ll b/test/Integer/globalvars_bt.ll
new file mode 100644
index 0000000..5c43185
--- /dev/null
+++ b/test/Integer/globalvars_bt.ll
@@ -0,0 +1,26 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+
+@MyVar = external global i27
+@MyIntList = external global { \2 *, i27 }
+ external global i27 ; i27*:0
+
+@AConst = constant i27 123
+
+@AString = constant [4 x i8] c"test"
+
+@ZeroInit = global { [100 x i27 ], [40 x float ] } { [100 x i27] zeroinitializer,
+ [40 x float] zeroinitializer }
+
+
+define i27 @"foo"(i27 %blah)
+begin
+ store i27 5, i27 *@MyVar
+ %idx = getelementptr { \2 *, i27 } * @MyIntList, i64 0, i32 1
+ store i27 12, i27* %idx
+ ret i27 %blah
+end
+
diff --git a/test/Integer/indirectcall2_bt.ll b/test/Integer/indirectcall2_bt.ll
new file mode 100644
index 0000000..5b7c68d
--- /dev/null
+++ b/test/Integer/indirectcall2_bt.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+define i63 @"test"(i63 %X)
+begin
+ ret i63 %X
+end
+
+define i63 @"fib"(i63 %n)
+begin
+ %T = icmp ult i63 %n, 2 ; {i1}:0
+ br i1 %T, label %BaseCase, label %RecurseCase
+
+RecurseCase:
+ %result = call i63 @test(i63 %n)
+ br label %BaseCase
+
+BaseCase:
+ %X = phi i63 [1, %0], [2, %RecurseCase]
+ ret i63 %X
+end
+
diff --git a/test/Integer/indirectcall_bt.ll b/test/Integer/indirectcall_bt.ll
new file mode 100644
index 0000000..d586fca
--- /dev/null
+++ b/test/Integer/indirectcall_bt.ll
@@ -0,0 +1,52 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+declare i32 @"atoi"(i8 *)
+
+define i63 @"fib"(i63 %n)
+begin
+ icmp ult i63 %n, 2 ; {i1}:1
+ br i1 %1, label %BaseCase, label %RecurseCase
+
+BaseCase:
+ ret i63 1
+
+RecurseCase:
+ %n2 = sub i63 %n, 2
+ %n1 = sub i63 %n, 1
+ %f2 = call i63(i63) * @fib(i63 %n2)
+ %f1 = call i63(i63) * @fib(i63 %n1)
+ %result = add i63 %f2, %f1
+ ret i63 %result
+end
+
+define i63 @"realmain"(i32 %argc, i8 ** %argv)
+begin
+ icmp eq i32 %argc, 2 ; {i1}:1
+ br i1 %1, label %HasArg, label %Continue
+HasArg:
+ ; %n1 = atoi(argv[1])
+ %n1 = add i32 1, 1
+ br label %Continue
+
+Continue:
+ %n = phi i32 [%n1, %HasArg], [1, %0]
+ %N = sext i32 %n to i63
+ %F = call i63(i63) *@fib(i63 %N)
+ ret i63 %F
+end
+
+define i63 @"trampoline"(i63 %n, i63(i63)* %fibfunc)
+begin
+ %F = call i63(i63) *%fibfunc(i63 %n)
+ ret i63 %F
+end
+
+define i32 @"main"()
+begin
+ %Result = call i63 @trampoline(i63 10, i63(i63) *@fib)
+ %Result2 = trunc i63 %Result to i32
+ ret i32 %Result2
+end
diff --git a/test/Integer/instructions_bt.ll b/test/Integer/instructions_bt.ll
new file mode 100644
index 0000000..7ca5890
--- /dev/null
+++ b/test/Integer/instructions_bt.ll
@@ -0,0 +1,26 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+define i39 @test_extractelement(<4 x i39> %V) {
+ %R = extractelement <4 x i39> %V, i32 1
+ ret i39 %R
+}
+
+define <4 x i39> @test_insertelement(<4 x i39> %V) {
+ %R = insertelement <4 x i39> %V, i39 0, i32 0
+ ret <4 x i39> %R
+}
+
+define <4 x i39> @test_shufflevector_u(<4 x i39> %V) {
+ %R = shufflevector <4 x i39> %V, <4 x i39> %V,
+ <4 x i32> < i32 1, i32 undef, i32 7, i32 2>
+ ret <4 x i39> %R
+}
+
+define <4 x float> @test_shufflevector_f(<4 x float> %V) {
+ %R = shufflevector <4 x float> %V, <4 x float> undef,
+ <4 x i32> < i32 1, i32 undef, i32 7, i32 2>
+ ret <4 x float> %R
+}
diff --git a/test/Integer/newcasts_bt.ll b/test/Integer/newcasts_bt.ll
new file mode 100644
index 0000000..e2eee4f
--- /dev/null
+++ b/test/Integer/newcasts_bt.ll
@@ -0,0 +1,28 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+define void @"NewCasts" (i17 %x) {
+ %a = zext i17 %x to i32
+ %b = sext i17 %x to i32
+ %c = trunc i17 %x to i8
+ %d = uitofp i17 %x to float
+ %e = sitofp i17 %x to double
+ %f = fptoui float %d to i17
+ %g = fptosi double %e to i17
+ %i = fpext float %d to double
+ %j = fptrunc double %i to float
+ %k = bitcast i32 %a to float
+ %l = inttoptr i17 %x to i32*
+ %m = ptrtoint i32* %l to i64
+ ret void
+}
+
+
+define i17 @"ZExtConst" () {
+ ret i17 trunc ( i32 zext ( i17 42 to i32) to i17 )
+}
+
+define i17 @"SExtConst" () {
+ ret i17 trunc (i32 sext (i17 42 to i32) to i17 )
+}
diff --git a/test/Integer/opaquetypes_bt.ll b/test/Integer/opaquetypes_bt.ll
new file mode 100644
index 0000000..5771342
--- /dev/null
+++ b/test/Integer/opaquetypes_bt.ll
@@ -0,0 +1,58 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; This test case is used to test opaque type processing, forward references,
+; and recursive types. Oh my.
+;
+
+%SQ1 = type { i31 }
+%SQ2 = type { %ITy }
+%ITy = type i31
+
+
+%CCC = type { \2* }
+%BBB = type { \2*, \2 * }
+%AAA = type { \2*, {\2*}, [12x{\2*}], {[1x{\2*}]} }
+
+; Test numbered types
+type %CCC
+type %BBB
+%Composite = type { %0, %1 }
+
+; Test simple opaque type resolution...
+%i31ty = type i31
+
+; Perform a simple forward reference...
+%ty1 = type { %ty2, i31 }
+%ty2 = type float
+
+; Do a recursive type...
+%list = type { %list * }
+%listp = type { %listp } *
+
+; Do two mutually recursive types...
+%TyA = type { %ty2, %TyB * }
+%TyB = type { double, %TyA * }
+
+; A complex recursive type...
+%Y = type { {%Y*}, %Y* }
+%Z = type { { %Z * }, [12x%Z] *, {{{ %Z * }}} }
+
+; More ridiculous test cases...
+%A = type [ 123x %A*]
+%M = type %M (%M, %M) *
+%P = type %P*
+
+; Recursive ptrs
+%u = type %v*
+%v = type %u*
+
+; Test the parser for unnamed recursive types...
+%P1 = type \1 *
+%Y1 = type { { \3 * }, \2 * }
+%Z1 = type { { \3 * }, [12x\3] *, { { { \5 * } } } }
+
+
+
+
diff --git a/test/Integer/packed_bt.ll b/test/Integer/packed_bt.ll
new file mode 100644
index 0000000..f6ea87c
--- /dev/null
+++ b/test/Integer/packed_bt.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@foo1 = external global <4 x float>
+@foo2 = external global <2 x i10>
+
+
+define void @main()
+{
+ store <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, <4 x float>* @foo1
+ store <2 x i10> <i10 4, i10 4>, <2 x i10>* @foo2
+ %l1 = load <4 x float>* @foo1
+ %l2 = load <2 x i10>* @foo2
+ ret void
+}
diff --git a/test/Integer/packed_struct_bt.ll b/test/Integer/packed_struct_bt.ll
new file mode 100644
index 0000000..a4d01e7
--- /dev/null
+++ b/test/Integer/packed_struct_bt.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+; RUN: not grep cast %t2.ll
+; RUN: grep {\\}>} %t2.ll
+; END.
+
+%struct.anon = type <{ i8, i35, i35, i35 }>
+@foos = external global %struct.anon
+@bara = external global [2 x <{ i35, i8 }>]
+
+;initializers should work for packed and non-packed the same way
+@E1 = global <{i8, i35, i35}> <{i8 1, i35 2, i35 3}>
+@E2 = global {i8, i35, i35} {i8 4, i35 5, i35 6}
+
+
+define i35 @main()
+{
+ %tmp = load i35* getelementptr (%struct.anon* @foos, i32 0, i32 1) ; <i35> [#uses=1]
+ %tmp3 = load i35* getelementptr (%struct.anon* @foos, i32 0, i32 2) ; <i35> [#uses=1]
+ %tmp6 = load i35* getelementptr (%struct.anon* @foos, i32 0, i32 3) ; <i35> [#uses=1]
+ %tmp4 = add i35 %tmp3, %tmp ; <i35> [#uses=1]
+ %tmp7 = add i35 %tmp4, %tmp6 ; <i35> [#uses=1]
+ ret i35 %tmp7
+}
+
+define i35 @bar() {
+entry:
+ %tmp = load i35* getelementptr([2 x <{ i35, i8 }>]* @bara, i32 0, i32 0, i32 0 ) ; <i35> [#uses=1]
+ %tmp4 = load i35* getelementptr ([2 x <{ i35, i8 }>]* @bara, i32 0, i32 1, i32 0) ; <i35> [#uses=1]
+ %tmp5 = add i35 %tmp4, %tmp ; <i35> [#uses=1]
+ ret i35 %tmp5
+}
diff --git a/test/Integer/paramattrs_bt.ll b/test/Integer/paramattrs_bt.ll
new file mode 100644
index 0000000..47ef753
--- /dev/null
+++ b/test/Integer/paramattrs_bt.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+%ZFunTy = type i33(i8 zeroext)
+%SFunTy = type i33(i8 signext)
+
+declare i16 @"test"(i16 signext %arg) signext
+declare i8 @"test2" (i16 zeroext %a2) zeroext
+
+
+define i33 @main(i33 %argc, i8 **%argv) {
+ %val = trunc i33 %argc to i16
+ %res = call i16 (i16 signext) signext *@test(i16 signext %val) signext
+ %two = add i16 %res, %res
+ %res2 = call i8 @test2(i16 %two zeroext) zeroext
+ %retVal = sext i16 %two to i33
+ ret i33 %retVal
+}
diff --git a/test/Integer/properties_bt.ll b/test/Integer/properties_bt.ll
new file mode 100644
index 0000000..f24ddc2
--- /dev/null
+++ b/test/Integer/properties_bt.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+target datalayout = "e-p:32:32"
+target triple = "proc-vend-sys"
+deplibs = [ "m", "c" ]
+
diff --git a/test/Integer/prototype_bt.ll b/test/Integer/prototype_bt.ll
new file mode 100644
index 0000000..2236e8b
--- /dev/null
+++ b/test/Integer/prototype_bt.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+declare i31 @"bar"(i31 %in)
+
+define i31 @"foo"(i31 %blah)
+begin
+ %xx = call i31 @bar(i31 %blah)
+ ret i31 %xx
+end
+
diff --git a/test/Integer/recursivetype_bt.ll b/test/Integer/recursivetype_bt.ll
new file mode 100644
index 0000000..d5ce3f5
--- /dev/null
+++ b/test/Integer/recursivetype_bt.ll
@@ -0,0 +1,108 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+; This file contains the output from the following compiled C code:
+; typedef struct list {
+; struct list *Next;
+; i32 Data;
+; } list;
+;
+; // Iterative insert fn
+; void InsertIntoListTail(list **L, i32 Data) {
+; while (*L)
+; L = &(*L)->Next;
+; *L = (list*)malloc(sizeof(list));
+; (*L)->Data = Data;
+; (*L)->Next = 0;
+; }
+;
+; // Recursive list search fn
+; list *FindData(list *L, i32 Data) {
+; if (L == 0) return 0;
+; if (L->Data == Data) return L;
+; return FindData(L->Next, Data);
+; }
+;
+; void DoListStuff() {
+; list *MyList = 0;
+; InsertIntoListTail(&MyList, 100);
+; InsertIntoListTail(&MyList, 12);
+; InsertIntoListTail(&MyList, 42);
+; InsertIntoListTail(&MyList, 1123);
+; InsertIntoListTail(&MyList, 1213);
+;
+; if (FindData(MyList, 75)) foundIt();
+; if (FindData(MyList, 42)) foundIt();
+; if (FindData(MyList, 700)) foundIt();
+; }
+
+%list = type { %list*, i36 }
+
+declare i8 *@"malloc"(i32)
+
+;;**********************
+;;**********************
+
+define void @"InsertIntoListTail"(%list** %L, i36 %Data)
+begin
+bb1:
+ %reg116 = load %list** %L ;;<%list*>
+ %cast1004 = inttoptr i64 0 to %list* ;;<%list*>
+ %cond1000 = icmp eq %list* %reg116, %cast1004 ;;<i1>
+ br i1 %cond1000, label %bb3, label %bb2
+
+bb2:
+ %reg117 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ] ;;<%list**>
+ %cast1010 = bitcast %list** %reg117 to %list*** ;;<%list***>
+ %reg118 = load %list*** %cast1010 ;;<%list**>
+ %reg109 = load %list** %reg118 ;;<%list*>
+ %cast1005 = inttoptr i64 0 to %list* ;;<%list*>
+ %cond1001 = icmp ne %list* %reg109, %cast1005 ;;<i1>
+ br i1 %cond1001, label %bb2, label %bb3
+
+bb3:
+ %reg119 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ] ;;<%list**>
+ %cast1006 = bitcast %list** %reg119 to i8** ;;<i8**>
+ %reg111 = call i8* @malloc(i32 16) ;;<i8*>
+ store i8* %reg111, i8** %cast1006 ;;<void>
+ %reg112 = ptrtoint i8* %reg111 to i64
+ %reg1002 = add i64 %reg112, 8
+ %reg1005 = inttoptr i64 %reg1002 to i8* ;;<i8*>
+ %cast1008 = bitcast i8* %reg1005 to i36* ;;<i36*>
+ store i36 %Data, i36* %cast1008 ;;<void>
+ %cast1003 = inttoptr i64 0 to i64* ;;<i64*>
+ %cast1009 = bitcast i8* %reg111 to i64** ;;<i64**>
+ store i64* %cast1003, i64** %cast1009 ;;<void>
+ ret void
+end
+
+define %list* @"FindData"(%list* %L, i36 %Data)
+begin
+bb1:
+ br label %bb2
+
+bb2:
+ %reg115 = phi %list* [ %reg116, %bb6 ], [ %L, %bb1 ] ;;<%list*>
+ %cast1014 = inttoptr i64 0 to %list* ;;<%list*>
+ %cond1011 = icmp ne %list* %reg115, %cast1014 ;;<i1>
+ br i1 %cond1011, label %bb4, label %bb3
+
+bb3:
+ ret %list* null
+
+bb4:
+ %idx = getelementptr %list* %reg115, i64 0, i32 1 ;;<i36>
+ %reg111 = load i36* %idx
+ %cond1013 = icmp ne i36 %reg111, %Data ;;<i1>
+ br i1 %cond1013, label %bb6, label %bb5
+
+bb5:
+ ret %list* %reg115
+
+bb6:
+ %idx2 = getelementptr %list* %reg115, i64 0, i32 0 ;;<%list*>
+ %reg116 = load %list** %idx2
+ br label %bb2
+end
diff --git a/test/Integer/simplecalltest_bt.ll b/test/Integer/simplecalltest_bt.ll
new file mode 100644
index 0000000..45dc0f1
--- /dev/null
+++ b/test/Integer/simplecalltest_bt.ll
@@ -0,0 +1,28 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+%FunTy = type i31(i31)
+
+
+define void @"invoke"(%FunTy *%x)
+begin
+ %foo = call %FunTy* %x(i31 123)
+ ret void
+end
+
+define i31 @"main"(i31 %argc, i8 **%argv, i8 **%envp)
+begin
+ %retval = call i31 (i31) *@test(i31 %argc)
+ %two = add i31 %retval, %retval
+ %retval2 = call i31 @test(i31 %argc)
+
+ %two2 = add i31 %two, %retval2
+ call void @invoke (%FunTy* @test)
+ ret i31 %two2
+end
+
+define i31 @"test"(i31 %i0)
+begin
+ ret i31 %i0
+end
diff --git a/test/Integer/small_bt.ll b/test/Integer/small_bt.ll
new file mode 100644
index 0000000..00fcace
--- /dev/null
+++ b/test/Integer/small_bt.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+%x = type i19
+
+
+define i19 @"foo"(i19 %in)
+begin
+label:
+ ret i19 2
+end
+
diff --git a/test/Integer/testalloca_bt.ll b/test/Integer/testalloca_bt.ll
new file mode 100644
index 0000000..e8e73c5
--- /dev/null
+++ b/test/Integer/testalloca_bt.ll
@@ -0,0 +1,28 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+%inners = type {float, {i8 } }
+%struct = type { i33 , {float, {i8 } } , i64 }
+
+
+define i33 @testfunction(i33 %i0, i33 %j0)
+begin
+ alloca i8, i32 5
+ %ptr = alloca i33 ; yields {i33*}:ptr
+ store i33 3, i33* %ptr ; yields {void}
+ %val = load i33* %ptr ; yields {i33}:val = i33 %3
+
+ %sptr = alloca %struct ; yields {%struct*}:sptr
+ %nsptr = getelementptr %struct * %sptr, i64 0, i32 1 ; yields {inners*}:nsptr
+ %ubsptr = getelementptr %inners * %nsptr, i64 0, i32 1 ; yields {{i8}*}:ubsptr
+ %idx = getelementptr {i8} * %ubsptr, i64 0, i32 0
+ store i8 4, i8* %idx
+
+ %fptr = getelementptr %struct * %sptr, i64 0, i32 1, i32 0 ; yields {float*}:fptr
+ store float 4.0, float * %fptr
+
+ ret i33 3
+end
+
diff --git a/test/Integer/testarith_bt.ll b/test/Integer/testarith_bt.ll
new file mode 100644
index 0000000..0820399
--- /dev/null
+++ b/test/Integer/testarith_bt.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+define i31 @"simpleArith"(i31 %i0, i31 %j0)
+begin
+ %t1 = add i31 %i0, %j0
+ %t2 = sub i31 %i0, %j0
+ %t3 = mul i31 %t1, %t2
+ %t4 = udiv i31 %t1, %t2
+ %t5 = sdiv i31 %t1, %t2
+ %t6 = urem i31 %t1, %t2
+ %t7 = srem i31 %t1, %t2
+ %t8 = shl i31 %t1, 9
+ %t9 = lshr i31 %t1, 9
+ %t10= ashr i31 %t1, 9
+ %f1 = sitofp i31 %t1 to float
+ %f2 = fdiv float 4.0, %f1
+ ret i31 %t3
+end
diff --git a/test/Integer/testconstants_bt.ll b/test/Integer/testconstants_bt.ll
new file mode 100644
index 0000000..8ca49cf
--- /dev/null
+++ b/test/Integer/testconstants_bt.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+@somestr = constant [11x i8] c"hello world"
+@array = constant [2 x i55] [ i55 12, i55 52 ]
+ constant { i55, i55 } { i55 4, i55 3 }
+
+
+define [2 x i55]* @testfunction(i55 %i0, i55 %j0)
+begin
+ ret [2x i55]* @array
+end
+
+define i8* @otherfunc(i55, double)
+begin
+ %somestr = getelementptr [11x i8]* @somestr, i64 0, i64 0
+ ret i8* %somestr
+end
+
+define i8* @yetanotherfunc(i55, double)
+begin
+ ret i8* null ; Test null
+end
+
+define i55 @negativeUnsigned() {
+ ret i55 -1
+}
+
+define i55 @largeSigned() {
+ ret i55 3900000000
+}
diff --git a/test/Integer/testicmp_bt.ll b/test/Integer/testicmp_bt.ll
new file mode 100644
index 0000000..40a2465
--- /dev/null
+++ b/test/Integer/testicmp_bt.ll
@@ -0,0 +1,23 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+define i31 @"simpleIcmp"(i31 %i0, i31 %j0)
+begin
+ %t1 = icmp eq i31 %i0, %j0
+ %t2 = icmp ne i31 %i0, %j0
+ %t3 = icmp ult i31 %i0, %j0
+ %t4 = icmp sgt i31 %i0, %j0
+ %t5 = icmp ule i31 %i0, %j0
+ %t6 = icmp sge i31 %i0, %j0
+
+ %t7 = icmp eq i31 %i0, 1098765432
+ %t8 = icmp ne i31 %i0, -31415926
+
+ %t9 = icmp ult i31 10000, %j0
+ %t10 = icmp sgt i31 -10000, %j0
+
+
+ ret i31 %i0
+end
diff --git a/test/Integer/testlogical_bt.ll b/test/Integer/testlogical_bt.ll
new file mode 100644
index 0000000..a2c927d
--- /dev/null
+++ b/test/Integer/testlogical_bt.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+define i31 @"simpleAdd"(i31 %i0, i31 %j0)
+begin
+ %t1 = xor i31 %i0, %j0
+ %t2 = or i31 %i0, %j0
+ %t3 = and i31 %t1, %t2
+ ret i31 %t3
+end
+
diff --git a/test/Integer/testlogical_new_bt.ll b/test/Integer/testlogical_new_bt.ll
new file mode 100644
index 0000000..49a26dc
--- /dev/null
+++ b/test/Integer/testlogical_new_bt.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+define i31 @"simpleAdd"(i31 %i0, i31 %j0)
+begin
+ %t1 = xor i31 %i0, %j0
+ %t2 = or i31 %i0, %j0
+ %t3 = and i31 %t1, %t2
+ %t4 = shl i31 %i0, 2
+ %t5 = ashr i31 %i0, 2
+ %t6 = lshr i31 %j0, 22
+ ret i31 %t3
+end
diff --git a/test/Integer/testmemory_bt.ll b/test/Integer/testmemory_bt.ll
new file mode 100644
index 0000000..e503c56a
--- /dev/null
+++ b/test/Integer/testmemory_bt.ll
@@ -0,0 +1,45 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+%struct = type { i31 , {float, {i9 } } , i64 }
+%complexty = type {i31, {[4 x i9 *], float}, double}
+
+
+define i31 @"main"()
+begin
+ call i31 @testfunction(i64 0, i64 1)
+ ret i31 0
+end
+
+define i31 @"testfunction"(i64 %i0, i64 %j0)
+begin
+ %array0 = malloc [4 x i9] ; yields {[4 x i9]*}:array0
+ %size = add i32 2, 2 ; yields {i31}:size = i31 %4
+ %array1 = malloc i9, i32 4 ; yields {i9*}:array1
+ %array2 = malloc i9, i32 %size ; yields {i9*}:array2
+
+ %idx = getelementptr [4 x i9]* %array0, i64 0, i64 2
+ store i9 123, i9* %idx
+ free [4x i9]* %array0
+ free i9* %array1
+ free i9* %array2
+
+
+ %aa = alloca %complexty, i32 5
+ %idx2 = getelementptr %complexty* %aa, i64 %i0, i32 1, i32 0, i64 %j0
+ store i9 *null, i9** %idx2
+
+ %ptr = alloca i31 ; yields {i31*}:ptr
+ store i31 3, i31* %ptr ; yields {void}
+ %val = load i31* %ptr ; yields {i31}:val = i31 %3
+
+ %sptr = alloca %struct ; yields {%struct*}:sptr
+ %ubsptr = getelementptr %struct * %sptr, i64 0, i32 1, i32 1 ; yields {{i9}*}:ubsptr
+ %idx3 = getelementptr {i9} * %ubsptr, i64 0, i32 0
+ store i9 4, i9* %idx3
+
+ ret i31 3
+end
+
diff --git a/test/Integer/testswitch_bt.ll b/test/Integer/testswitch_bt.ll
new file mode 100644
index 0000000..bf7cdc5
--- /dev/null
+++ b/test/Integer/testswitch_bt.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+ %i35 = type i35
+
+
+define i35 @"squared"(%i35 %i0)
+begin
+ switch i35 %i0, label %Default [
+ i35 1, label %Case1
+ i35 2, label %Case2
+ i35 4, label %Case4 ]
+
+Default:
+ ret i35 -1 ; Unrecognized input value
+
+Case1:
+ ret i35 1
+Case2:
+ ret i35 4
+Case4:
+ ret i35 16
+end
diff --git a/test/Integer/testvarargs_bt.ll b/test/Integer/testvarargs_bt.ll
new file mode 100644
index 0000000..3227d14
--- /dev/null
+++ b/test/Integer/testvarargs_bt.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+declare i31 @"printf"(i8*, ...) ;; Prototype for: i32 __builtin_printf(const char*, ...)
+
+define i31 @"testvarar"()
+begin
+ call i31(i8*, ...) *@printf(i8 * null, i31 12, i8 42)
+ ret i31 %1
+end
+
+
diff --git a/test/Integer/undefined_bt.ll b/test/Integer/undefined_bt.ll
new file mode 100644
index 0000000..7eba590
--- /dev/null
+++ b/test/Integer/undefined_bt.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+@X = global i31 undef
+
+
+declare i32 @"atoi"(i8 *)
+
+define i63 @test() {
+ ret i63 undef
+}
+
+define i31 @test2() {
+ %X = add i31 undef, 1
+ ret i31 %X
+}
diff --git a/test/Integer/unreachable_bt.ll b/test/Integer/unreachable_bt.ll
new file mode 100644
index 0000000..cb65d4b
--- /dev/null
+++ b/test/Integer/unreachable_bt.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+
+
+declare void @bar()
+
+define i9 @foo() { ;; Calling this function has undefined behavior
+ unreachable
+}
+
+define double @xyz() {
+ call void @bar()
+ unreachable ;; Bar must not return.
+}
diff --git a/test/Integer/varargs_bt.ll b/test/Integer/varargs_bt.ll
new file mode 100644
index 0000000..25ad58a
--- /dev/null
+++ b/test/Integer/varargs_bt.ll
@@ -0,0 +1,23 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; Demonstrate all of the variable argument handling intrinsic functions plus
+; the va_arg instruction.
+
+declare void @llvm.va_start(i8** %ap)
+declare void @llvm.va_copy(i8** %aq, i8** %ap)
+declare void @llvm.va_end(i8** %ap)
+
+define i33 @test(i33 %X, ...) {
+ %ap = alloca i8*
+ call void @llvm.va_start(i8** %ap)
+ %tmp = va_arg i8** %ap, i33
+
+ %aq = alloca i8*
+ call void @llvm.va_copy(i8** %aq, i8** %ap)
+ call void @llvm.va_end(i8** %aq)
+
+ call void @llvm.va_end(i8** %ap)
+ ret i33 %tmp
+}
diff --git a/test/Integer/varargs_new_bt.ll b/test/Integer/varargs_new_bt.ll
new file mode 100644
index 0000000..59bb3f2
--- /dev/null
+++ b/test/Integer/varargs_new_bt.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as %s -o - | llvm-dis > %t1.ll
+; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
+; RUN: diff %t1.ll %t2.ll
+
+; Demonstrate all of the variable argument handling intrinsic functions plus
+; the va_arg instruction.
+
+declare void @llvm.va_start(i8**)
+declare void @llvm.va_copy(i8**, i8*)
+declare void @llvm.va_end(i8**)
+
+define i31 @test(i31 %X, ...) {
+ ; Allocate two va_list items. On this target, va_list is of type i8*
+ %ap = alloca i8* ; <i8**> [#uses=4]
+ %aq = alloca i8* ; <i8**> [#uses=2]
+
+ ; Initialize variable argument processing
+ call void @llvm.va_start(i8** %ap)
+
+ ; Read a single integer argument
+ %tmp = va_arg i8** %ap, i31 ; <i31> [#uses=1]
+
+ ; Demonstrate usage of llvm.va_copy and llvm_va_end
+ %apv = load i8** %ap ; <i8*> [#uses=1]
+ call void @llvm.va_copy(i8** %aq, i8* %apv)
+ call void @llvm.va_end(i8** %aq)
+
+ ; Stop processing of arguments.
+ call void @llvm.va_end(i8** %ap)
+ ret i31 %tmp
+
+}
diff --git a/test/LLVMC/AppendCmdHook.td b/test/LLVMC/AppendCmdHook.td
new file mode 100644
index 0000000..4a9d391
--- /dev/null
+++ b/test/LLVMC/AppendCmdHook.td
@@ -0,0 +1,28 @@
+// Check that hooks can be invoked from 'append_cmd'.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+// CHECK: std::string MyHook()
+
+def OptList : OptionList<[
+(switch_option "dummy1", (help "none")),
+(switch_option "dummy2", (help "none"))
+]>;
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy_lang"),
+(out_language "dummy_lang"),
+(actions (case
+ // CHECK: push_back("-arg1")
+ // CHECK: push_back("-arg2")
+ (switch_on "dummy1"), (append_cmd "-arg1 -arg2"),
+ // CHECK: push_back("-arg3")
+ // CHECK: hooks::MyHook()
+ (switch_on "dummy2"), (append_cmd "-arg3 $CALL(MyHook)")))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/C++/dash-x.cpp b/test/LLVMC/C++/dash-x.cpp
new file mode 100644
index 0000000..b32400e
--- /dev/null
+++ b/test/LLVMC/C++/dash-x.cpp
@@ -0,0 +1,9 @@
+// Test that we can compile .c files as C++ and vice versa
+// RUN: llvmc %s -x c++ %p/../test_data/false.c -x c %p/../test_data/false.cpp -x lisp -x whatnot -x none %p/../test_data/false2.cpp -o %t
+// RUN: %abs_tmp | grep hello
+
+extern int test_main();
+
+int main() {
+ test_main();
+}
diff --git a/test/LLVMC/C++/dg.exp b/test/LLVMC/C++/dg.exp
new file mode 100644
index 0000000..fc852e3
--- /dev/null
+++ b/test/LLVMC/C++/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports c++ ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/LLVMC/C++/hello.cpp b/test/LLVMC/C++/hello.cpp
new file mode 100644
index 0000000..b9c6399
--- /dev/null
+++ b/test/LLVMC/C++/hello.cpp
@@ -0,0 +1,8 @@
+// Test that we can compile C++ code.
+// RUN: llvmc %s -o %t
+// RUN: %abs_tmp | grep hello
+#include <iostream>
+
+int main() {
+ std::cout << "hello" << '\n';
+}
diff --git a/test/LLVMC/C++/together.cpp b/test/LLVMC/C++/together.cpp
new file mode 100644
index 0000000..e02f69a
--- /dev/null
+++ b/test/LLVMC/C++/together.cpp
@@ -0,0 +1,9 @@
+// Check that we can compile files of different types together.
+// RUN: llvmc %s %p/../test_data/together.c -o %t
+// RUN: %abs_tmp | grep hello
+
+extern "C" void test();
+
+int main() {
+ test();
+}
diff --git a/test/LLVMC/C/dg.exp b/test/LLVMC/C/dg.exp
new file mode 100644
index 0000000..a9be28a
--- /dev/null
+++ b/test/LLVMC/C/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports c ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/LLVMC/C/emit-llvm.c b/test/LLVMC/C/emit-llvm.c
new file mode 100644
index 0000000..38bbba6
--- /dev/null
+++ b/test/LLVMC/C/emit-llvm.c
@@ -0,0 +1,4 @@
+// RUN: llvmc -c -emit-llvm -o - %s | llvm-dis | grep "@f0()" | count 1
+
+int f0(void) {
+}
diff --git a/test/LLVMC/C/hello.c b/test/LLVMC/C/hello.c
new file mode 100644
index 0000000..b2d903f
--- /dev/null
+++ b/test/LLVMC/C/hello.c
@@ -0,0 +1,12 @@
+/*
+ * Check that we can compile helloworld
+ * RUN: llvmc %s -o %t
+ * RUN: %abs_tmp | grep hello
+ */
+
+#include <stdio.h>
+
+int main() {
+ printf("hello\n");
+ return 0;
+}
diff --git a/test/LLVMC/C/include.c b/test/LLVMC/C/include.c
new file mode 100644
index 0000000..07ae761
--- /dev/null
+++ b/test/LLVMC/C/include.c
@@ -0,0 +1,9 @@
+/*
+ * Check that the 'include' options work.
+ * RUN: echo "int x;\n" > %t1.inc
+ * RUN: llvmc -include %t1.inc -fsyntax-only %s
+ */
+
+int f0(void) {
+ return x;
+}
diff --git a/test/LLVMC/C/opt-test.c b/test/LLVMC/C/opt-test.c
new file mode 100644
index 0000000..d69dc9b
--- /dev/null
+++ b/test/LLVMC/C/opt-test.c
@@ -0,0 +1,12 @@
+/*
+ * Check that the -opt switch works.
+ * RUN: llvmc %s -opt -o %t
+ * RUN: %abs_tmp | grep hello
+ */
+
+#include <stdio.h>
+
+int main() {
+ printf("hello\n");
+ return 0;
+}
diff --git a/test/LLVMC/C/sink.c b/test/LLVMC/C/sink.c
new file mode 100644
index 0000000..bdff340
--- /dev/null
+++ b/test/LLVMC/C/sink.c
@@ -0,0 +1,12 @@
+/*
+ * Check that the 'sink' options work.
+ * RUN: llvmc -v -Wall %s -o %t |& grep "Wall"
+ * RUN: %abs_tmp | grep hello
+ */
+
+#include <stdio.h>
+
+int main() {
+ printf("hello\n");
+ return 0;
+}
diff --git a/test/LLVMC/C/wall.c b/test/LLVMC/C/wall.c
new file mode 100644
index 0000000..f676099
--- /dev/null
+++ b/test/LLVMC/C/wall.c
@@ -0,0 +1,12 @@
+/*
+ * Check that -Wall works as intended
+ * RUN: llvmc -Wall %s -o %t
+ * RUN: %abs_tmp | grep hello
+ */
+
+#include <stdio.h>
+
+int main() {
+ printf("hello\n");
+ return 0;
+}
diff --git a/test/LLVMC/EmptyCompilationGraph.td b/test/LLVMC/EmptyCompilationGraph.td
new file mode 100644
index 0000000..934905b
--- /dev/null
+++ b/test/LLVMC/EmptyCompilationGraph.td
@@ -0,0 +1,7 @@
+// Check that the compilation graph can be empty.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def Graph : CompilationGraph<[]>;
diff --git a/test/LLVMC/EnvParentheses.td b/test/LLVMC/EnvParentheses.td
new file mode 100644
index 0000000..77aab95
--- /dev/null
+++ b/test/LLVMC/EnvParentheses.td
@@ -0,0 +1,17 @@
+// Check the fix for PR4157.
+// http://llvm.org/bugs/show_bug.cgi?id=4157
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: not grep {)));} %t
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def dummy_tool : Tool<[
+(cmd_line "gcc -o $OUTFILE $INFILE $ENV(FOO)/bar"),
+(in_language "dummy"),
+(out_language "dummy")
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
+
+def Graph : CompilationGraph<[]>;
diff --git a/test/LLVMC/ExternOptions.td b/test/LLVMC/ExternOptions.td
new file mode 100644
index 0000000..a05f2ca
--- /dev/null
+++ b/test/LLVMC/ExternOptions.td
@@ -0,0 +1,25 @@
+// Check that extern options work.
+// The dummy tool and graph are required to silence warnings.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+// CHECK: extern cl::opt<bool> AutoGeneratedSwitch_Wall
+
+def OptList : OptionList<[(switch_option "Wall", (extern)),
+ (parameter_option "std", (extern)),
+ (prefix_list_option "L", (extern))]>;
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy"),
+(out_language "dummy"),
+(actions (case
+ (switch_on "Wall"), (stop_compilation),
+ (not_empty "std"), (stop_compilation),
+ (not_empty "L"), (stop_compilation)))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/ForwardAs.td b/test/LLVMC/ForwardAs.td
new file mode 100644
index 0000000..ce6fbb0
--- /dev/null
+++ b/test/LLVMC/ForwardAs.td
@@ -0,0 +1,20 @@
+// Check the fix for PR4159.
+// http://llvm.org/bugs/show_bug.cgi?id=4159
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def OptList : OptionList<[(parameter_option "dummy", (extern))]>;
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy"),
+(out_language "dummy"),
+(actions (case
+ // CHECK: vec.push_back("unique_name")
+ (not_empty "dummy"), (forward_as "dummy", "unique_name")))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/ForwardTransformedValue.td b/test/LLVMC/ForwardTransformedValue.td
new file mode 100644
index 0000000..e263453
--- /dev/null
+++ b/test/LLVMC/ForwardTransformedValue.td
@@ -0,0 +1,26 @@
+// Check that forward_transformed_value works.
+// The dummy tool and graph are required to silence warnings.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def OptList : OptionList<[(parameter_option "a", (extern)),
+ (prefix_list_option "b", (extern))]>;
+
+// CHECK: std::string HookA
+// CHECK: std::string HookB
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy"),
+(out_language "dummy"),
+(actions (case
+ // CHECK: HookA(AutoGeneratedParameter_a
+ (not_empty "a"), (forward_transformed_value "a", "HookA"),
+ // CHECK: HookB(AutoGeneratedList_b
+ (not_empty "b"), (forward_transformed_value "b", "HookB")))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/ForwardValue.td b/test/LLVMC/ForwardValue.td
new file mode 100644
index 0000000..31e395e
--- /dev/null
+++ b/test/LLVMC/ForwardValue.td
@@ -0,0 +1,23 @@
+// Check that forward_value works.
+// The dummy tool and graph are required to silence warnings.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def OptList : OptionList<[(parameter_option "a", (extern)),
+ (prefix_list_option "b", (extern))]>;
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy"),
+(out_language "dummy"),
+(actions (case
+ // CHECK: vec.push_back(AutoGeneratedParameter_a)
+ (not_empty "a"), (forward_value "a"),
+ // CHECK: std::copy(AutoGeneratedList_b.begin()
+ (not_empty "b"), (forward_value "b")))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/HookWithArguments.td b/test/LLVMC/HookWithArguments.td
new file mode 100644
index 0000000..ba0bbe1
--- /dev/null
+++ b/test/LLVMC/HookWithArguments.td
@@ -0,0 +1,19 @@
+// Check that hooks with arguments work.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+// CHECK: Hook(const char* Arg0, const char* Arg1, const char* Arg2);
+// CHECK: std::getenv("VARIABLE")
+// CHECK: "/2path"
+// CHECK: "/path"
+
+def dummy_tool : Tool<[
+(cmd_line "$CALL(Hook, 'Arg1', 'Arg2', 'Arg3 Arg3Cont')/path arg1 $ENV(VARIABLE)/2path arg2 $INFILE"),
+(in_language "dummy"),
+(out_language "dummy")
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/HookWithInFile.td b/test/LLVMC/HookWithInFile.td
new file mode 100644
index 0000000..e15e43cd
--- /dev/null
+++ b/test/LLVMC/HookWithInFile.td
@@ -0,0 +1,15 @@
+// Check that a hook can be given $INFILE as an argument.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def dummy_tool : Tool<[
+// CHECK: Hook(inFile.c_str())
+(cmd_line "$CALL(Hook, '$INFILE')/path $INFILE"),
+(in_language "dummy"),
+(out_language "dummy")
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/Init.td b/test/LLVMC/Init.td
new file mode 100644
index 0000000..355d83f
--- /dev/null
+++ b/test/LLVMC/Init.td
@@ -0,0 +1,24 @@
+// Check that (init true/false) and (init "str") work.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def OptList : OptionList<[
+// CHECK: cl::init(true)
+(switch_option "dummy1", (help "none"), (init true)),
+// CHECK: cl::init("some-string")
+(parameter_option "dummy2", (help "none"), (init "some-string"))
+]>;
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy_lang"),
+(out_language "dummy_lang"),
+(actions (case
+ (switch_on "dummy1"), (forward "dummy1"),
+ (not_empty "dummy2"), (forward "dummy2")))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/MultiValuedOption.td b/test/LLVMC/MultiValuedOption.td
new file mode 100644
index 0000000..8cb1878
--- /dev/null
+++ b/test/LLVMC/MultiValuedOption.td
@@ -0,0 +1,23 @@
+// Check that multivalued options work.
+// The dummy tool and graph are required to silence warnings.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def OptList : OptionList<[
+ // CHECK: cl::multi_val(2)
+ (prefix_list_option "foo", (multi_val 2)),
+ (parameter_list_option "baz", (multi_val 2), (extern))]>;
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy"),
+(out_language "dummy"),
+(actions (case
+ (not_empty "foo"), (forward_as "foo", "bar"),
+ (not_empty "baz"), (forward "baz")))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/MultipleCompilationGraphs.td b/test/LLVMC/MultipleCompilationGraphs.td
new file mode 100644
index 0000000..9702248
--- /dev/null
+++ b/test/LLVMC/MultipleCompilationGraphs.td
@@ -0,0 +1,9 @@
+// Check that multiple compilation graphs are allowed.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def Graph1 : CompilationGraph<[]>;
+def Graph2 : CompilationGraph<[]>;
+def Graph3 : CompilationGraph<[]>;
diff --git a/test/LLVMC/MultiplePluginPriorities.td b/test/LLVMC/MultiplePluginPriorities.td
new file mode 100644
index 0000000..f108641
--- /dev/null
+++ b/test/LLVMC/MultiplePluginPriorities.td
@@ -0,0 +1,13 @@
+// Check that multiple plugin priorities are not allowed.
+// RUN: ignore tblgen -I %p/../../include --gen-llvmc %s |& grep "More than one 'PluginPriority' instance found"
+
+// Disable for Darwin PPC: <rdar://problem/7598390>
+// XFAIL: powerpc-apple-darwin
+
+include "llvm/CompilerDriver/Common.td"
+
+def Graph : CompilationGraph<[]>;
+
+def Priority1 : PluginPriority<1>;
+
+def Priority2 : PluginPriority<2>;
diff --git a/test/LLVMC/NoActions.td b/test/LLVMC/NoActions.td
new file mode 100644
index 0000000..9c2d45a
--- /dev/null
+++ b/test/LLVMC/NoActions.td
@@ -0,0 +1,15 @@
+// Check that tools without associated actions are accepted.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+// CHECK: class dummy_tool : public Tool {
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy"),
+(out_language "dummy")
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/NoCompilationGraph.td b/test/LLVMC/NoCompilationGraph.td
new file mode 100644
index 0000000..96c1f17
--- /dev/null
+++ b/test/LLVMC/NoCompilationGraph.td
@@ -0,0 +1,5 @@
+// Check that the compilation graph is not required.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
diff --git a/test/LLVMC/ObjC++/dg.exp b/test/LLVMC/ObjC++/dg.exp
new file mode 100644
index 0000000..41c3db2
--- /dev/null
+++ b/test/LLVMC/ObjC++/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports obj-c++ ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{mm}]]
+}
diff --git a/test/LLVMC/ObjC++/hello.mm b/test/LLVMC/ObjC++/hello.mm
new file mode 100644
index 0000000..2125dc7
--- /dev/null
+++ b/test/LLVMC/ObjC++/hello.mm
@@ -0,0 +1,8 @@
+// Test that we can compile Objective-C++ code.
+// RUN: llvmc %s -o %t
+// RUN: %abs_tmp | grep hello
+#include <iostream>
+
+int main() {
+ std::cout << "hello" << '\n';
+}
diff --git a/test/LLVMC/ObjC/dg.exp b/test/LLVMC/ObjC/dg.exp
new file mode 100644
index 0000000..18f73a79
--- /dev/null
+++ b/test/LLVMC/ObjC/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if [ llvm_gcc_supports objc ] then {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{m}]]
+}
diff --git a/test/LLVMC/ObjC/hello.m b/test/LLVMC/ObjC/hello.m
new file mode 100644
index 0000000..b2d903f
--- /dev/null
+++ b/test/LLVMC/ObjC/hello.m
@@ -0,0 +1,12 @@
+/*
+ * Check that we can compile helloworld
+ * RUN: llvmc %s -o %t
+ * RUN: %abs_tmp | grep hello
+ */
+
+#include <stdio.h>
+
+int main() {
+ printf("hello\n");
+ return 0;
+}
diff --git a/test/LLVMC/OneOrMore.td b/test/LLVMC/OneOrMore.td
new file mode 100644
index 0000000..ddf7cd1
--- /dev/null
+++ b/test/LLVMC/OneOrMore.td
@@ -0,0 +1,24 @@
+// Check that (one_or_more) and (zero_or_one) properties work.
+// The dummy tool and graph are required to silence warnings.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def OptList : OptionList<[
+ // CHECK: cl::OneOrMore
+ (prefix_list_option "foo", (one_or_more)),
+ // CHECK: cl::Optional
+ (parameter_list_option "baz", (optional))]>;
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy"),
+(out_language "dummy"),
+(actions (case
+ (not_empty "foo"), (forward_as "foo", "bar"),
+ (not_empty "baz"), (forward "baz")))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/OptionPreprocessor.td b/test/LLVMC/OptionPreprocessor.td
new file mode 100644
index 0000000..8d748ee
--- /dev/null
+++ b/test/LLVMC/OptionPreprocessor.td
@@ -0,0 +1,66 @@
+// Test for the OptionPreprocessor and related functionality.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+
+include "llvm/CompilerDriver/Common.td"
+
+def OptList : OptionList<[
+(switch_option "foo", (help "dummy")),
+(switch_option "bar", (help "dummy")),
+(switch_option "baz", (help "dummy")),
+(parameter_option "foo_p", (help "dummy")),
+(parameter_option "bar_p", (help "dummy")),
+(parameter_option "baz_p", (help "dummy")),
+(parameter_list_option "foo_l", (help "dummy"))
+]>;
+
+def Preprocess : OptionPreprocessor<
+(case
+ // CHECK: W1
+ // CHECK: foo = false;
+ // CHECK: foo_p = "";
+ // CHECK: foo_l.clear();
+ (and (switch_on "foo"), (any_switch_on ["bar", "baz"])),
+ [(warning "W1"), (unset_option "foo"),
+ (unset_option "foo_p"), (unset_option "foo_l")],
+ // CHECK: W2
+ // CHECK: foo = true;
+ // CHECK: bar = true;
+ // CHECK: baz = false;
+ // CHECK: foo_p = "asdf";
+ // CHECK: foo_l.clear();
+ // CHECK: foo_l.push_back("qwert");
+ // CHECK: foo_l.push_back("yuiop");
+ // CHECK: foo_l.push_back("asdf");
+ (and (switch_on ["foo", "bar"]), (any_empty ["foo_p", "bar_p"])),
+ [(warning "W2"), (set_option "foo"),
+ (set_option "bar", true),
+ (set_option "baz", false),
+ (set_option "foo_p", "asdf"),
+ (set_option "foo_l", ["qwert", "yuiop", "asdf"])],
+ // CHECK: W3
+ // CHECK: foo = true;
+ // CHECK: bar = true;
+ // CHECK: baz = true;
+ (and (empty ["foo_p", "bar_p"]), (any_not_empty ["baz_p"])),
+ [(warning "W3"), (set_option ["foo", "bar", "baz"])])
+>;
+
+// Shut up warnings...
+def dummy : Tool<
+[(in_language "dummy"),
+ (out_language "dummy"),
+ (output_suffix "d"),
+ (cmd_line "dummy $INFILE -o $OUTFILE"),
+ (actions (case (switch_on "foo"), (error),
+ (switch_on "bar"), (error),
+ (switch_on "baz"), (error),
+ (not_empty "foo_p"), (error),
+ (not_empty "bar_p"), (error),
+ (not_empty "baz_p"), (error),
+ (not_empty "foo_l"), (error)))
+]>;
+
+def Graph : CompilationGraph<[Edge<"root", "dummy">]>;
+
diff --git a/test/LLVMC/OutputSuffixHook.td b/test/LLVMC/OutputSuffixHook.td
new file mode 100644
index 0000000..4ecad23
--- /dev/null
+++ b/test/LLVMC/OutputSuffixHook.td
@@ -0,0 +1,24 @@
+// Check that hooks can be invoked from 'output_suffix'.
+// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t
+// RUN: FileCheck -input-file %t %s
+// RUN: %compile_cxx -fexceptions -x c++ %t
+// XFAIL: *
+
+include "llvm/CompilerDriver/Common.td"
+
+// CHECK: std::string MyHook()
+
+def OptList : OptionList<[
+(switch_option "dummy1", (help "none"))
+]>;
+
+def dummy_tool : Tool<[
+(cmd_line "dummy_cmd $INFILE"),
+(in_language "dummy_lang"),
+(out_language "dummy_lang"),
+(actions (case
+ // CHECK: hooks::MyHook()
+ (switch_on "dummy1"), (output_suffix "$CALL(MyHook)")))
+]>;
+
+def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>;
diff --git a/test/LLVMC/TestWarnings.td b/test/LLVMC/TestWarnings.td
new file mode 100644
index 0000000..9523e24
--- /dev/null
+++ b/test/LLVMC/TestWarnings.td
@@ -0,0 +1,7 @@
+// Check that warnings about unused options are really emitted.
+// This should fail because the output is printed on stderr.
+// RUN: ignore tblgen -I %p/../../include --gen-llvmc %s |& grep "option '-Wall' has no effect!"
+
+include "llvm/CompilerDriver/Common.td"
+
+def OptList : OptionList<[(switch_option "Wall", (extern))]>;
diff --git a/test/LLVMC/dg.exp b/test/LLVMC/dg.exp
new file mode 100644
index 0000000..f7d275a
--- /dev/null
+++ b/test/LLVMC/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{td}]]
diff --git a/test/LLVMC/test_data/false.c b/test/LLVMC/test_data/false.c
new file mode 100644
index 0000000..3e4e8a7
--- /dev/null
+++ b/test/LLVMC/test_data/false.c
@@ -0,0 +1,10 @@
+#include <iostream>
+
+extern "C" void test();
+extern std::string test2();
+
+int test_main() {
+ std::cout << "h";
+ test();
+ std::cout << test2() << '\n';
+}
diff --git a/test/LLVMC/test_data/false.cpp b/test/LLVMC/test_data/false.cpp
new file mode 100644
index 0000000..593fcd5
--- /dev/null
+++ b/test/LLVMC/test_data/false.cpp
@@ -0,0 +1,16 @@
+#include <stdio.h>
+
+/* Make this invalid C++ */
+typedef struct {
+ int i;
+ char c;
+} a;
+
+static a b = { .i = 65, .c = 'r'};
+
+void test() {
+ b.i = 9;
+ fflush(stdout);
+ printf("el");
+}
+
diff --git a/test/LLVMC/test_data/false2.cpp b/test/LLVMC/test_data/false2.cpp
new file mode 100644
index 0000000..bba064c
--- /dev/null
+++ b/test/LLVMC/test_data/false2.cpp
@@ -0,0 +1,5 @@
+#include <string>
+
+std::string test2() {
+ return "lo";
+}
diff --git a/test/LLVMC/test_data/together.c b/test/LLVMC/test_data/together.c
new file mode 100644
index 0000000..a828c47
--- /dev/null
+++ b/test/LLVMC/test_data/together.c
@@ -0,0 +1,5 @@
+#include <stdio.h>
+
+void test() {
+ printf("hello\n");
+}
diff --git a/test/Linker/2002-07-17-GlobalFail.ll b/test/Linker/2002-07-17-GlobalFail.ll
new file mode 100644
index 0000000..d328310
--- /dev/null
+++ b/test/Linker/2002-07-17-GlobalFail.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: echo | llvm-as > %t.tmp.bc
+; RUN: llvm-link %t.tmp.bc %t.bc
+
+@X = constant i32 5 ; <i32*> [#uses=2]
+@Y = internal global [2 x i32*] [ i32* @X, i32* @X ] ; <[2 x i32*]*> [#uses=0]
+
+
diff --git a/test/Linker/2002-07-17-LinkTest2.ll b/test/Linker/2002-07-17-LinkTest2.ll
new file mode 100644
index 0000000..fa986f1
--- /dev/null
+++ b/test/Linker/2002-07-17-LinkTest2.ll
@@ -0,0 +1,10 @@
+; This fails linking when it is linked with an empty file as the first object file
+
+; RUN: llvm-as > %t1.bc < /dev/null
+; RUN: llvm-as < %s > %t2.bc
+; RUN: llvm-link %t1.bc %t2.bc
+
+@work = global i32 (i32, i32)* @zip ; <i32 (i32, i32)**> [#uses=0]
+
+declare i32 @zip(i32, i32)
+
diff --git a/test/Linker/2002-08-20-ConstantExpr.ll b/test/Linker/2002-08-20-ConstantExpr.ll
new file mode 100644
index 0000000..5672014
--- /dev/null
+++ b/test/Linker/2002-08-20-ConstantExpr.ll
@@ -0,0 +1,9 @@
+; This fails linking when it is linked with an empty file as the first object file
+
+; RUN: llvm-as > %t.LinkTest.bc < /dev/null
+; RUN: llvm-as < %s > %t.bc
+; RUN: llvm-link %t.LinkTest.bc %t.bc
+
+@work = global i32 4 ; <i32*> [#uses=1]
+@test = global i32* getelementptr (i32* @work, i64 1) ; <i32**> [#uses=0]
+
diff --git a/test/Linker/2003-01-30-LinkerRename.ll b/test/Linker/2003-01-30-LinkerRename.ll
new file mode 100644
index 0000000..af0e643
--- /dev/null
+++ b/test/Linker/2003-01-30-LinkerRename.ll
@@ -0,0 +1,9 @@
+; This fails because the linker renames the external symbol not the internal
+; one...
+
+; RUN: echo {define internal i32 @foo() \{ ret i32 7 \} } | llvm-as > %t.1.bc
+; RUN: llvm-as %s -o %t.2.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep @foo() | grep -v internal
+
+define i32 @foo() { ret i32 0 }
+
diff --git a/test/Linker/2003-01-30-LinkerTypeRename.ll b/test/Linker/2003-01-30-LinkerTypeRename.ll
new file mode 100644
index 0000000..67a0626
--- /dev/null
+++ b/test/Linker/2003-01-30-LinkerTypeRename.ll
@@ -0,0 +1,9 @@
+; This fails because the linker renames the non-opaque type not the opaque
+; one...
+
+; RUN: echo {%Ty = type opaque @GV = external global %Ty*} | llvm-as > %t.1.bc
+; RUN: llvm-as < %s > %t.2.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep {%Ty } | not grep opaque
+
+%Ty = type i32
+
diff --git a/test/Linker/2003-04-21-Linkage.ll b/test/Linker/2003-04-21-Linkage.ll
new file mode 100644
index 0000000..f6d4c4b
--- /dev/null
+++ b/test/Linker/2003-04-21-Linkage.ll
@@ -0,0 +1,14 @@
+; RUN: echo {@X = linkonce global i32 5 \
+; RUN: define linkonce i32 @foo() \{ ret i32 7 \} } | llvm-as > %t.1.bc
+; RUN: llvm-as %s -o %t.2.bc
+; RUN: llvm-link %t.1.bc %t.2.bc
+@X = external global i32
+
+declare i32 @foo()
+
+define void @bar() {
+ load i32* @X
+ call i32 @foo()
+ ret void
+}
+
diff --git a/test/Linker/2003-04-23-LinkOnceLost.ll b/test/Linker/2003-04-23-LinkOnceLost.ll
new file mode 100644
index 0000000..beaf6ec
--- /dev/null
+++ b/test/Linker/2003-04-23-LinkOnceLost.ll
@@ -0,0 +1,10 @@
+; This fails because the linker renames the non-opaque type not the opaque
+; one...
+
+; RUN: echo { define linkonce void @foo() \{ ret void \} } | \
+; RUN: llvm-as -o %t.2.bc
+; RUN: llvm-as %s -o %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep foo | grep linkonce
+
+declare void @foo()
+
diff --git a/test/Linker/2003-04-26-NullPtrLinkProblem.ll b/test/Linker/2003-04-26-NullPtrLinkProblem.ll
new file mode 100644
index 0000000..54ba051
--- /dev/null
+++ b/test/Linker/2003-04-26-NullPtrLinkProblem.ll
@@ -0,0 +1,17 @@
+; This one fails because the LLVM runtime is allowing two null pointers of
+; the same type to be created!
+
+; RUN: echo {%T = type i32} | llvm-as > %t.2.bc
+; RUN: llvm-as %s -o %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc
+
+%T = type opaque
+
+declare %T* @create()
+
+define void @test() {
+ %X = call %T* @create( ) ; <%T*> [#uses=1]
+ %v = icmp eq %T* %X, null ; <i1> [#uses=0]
+ ret void
+}
+
diff --git a/test/Linker/2003-05-15-TypeProblem.ll b/test/Linker/2003-05-15-TypeProblem.ll
new file mode 100644
index 0000000..18fcea0
--- /dev/null
+++ b/test/Linker/2003-05-15-TypeProblem.ll
@@ -0,0 +1,10 @@
+; This one fails because the LLVM runtime is allowing two null pointers of
+; the same type to be created!
+
+; RUN: echo {%M = type \{ %N*\} %N = type opaque} | llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc
+
+%M = type { i32* }
+%N = type i32
+
diff --git a/test/Linker/2003-05-31-LinkerRename.ll b/test/Linker/2003-05-31-LinkerRename.ll
new file mode 100644
index 0000000..498fc14
--- /dev/null
+++ b/test/Linker/2003-05-31-LinkerRename.ll
@@ -0,0 +1,17 @@
+; The funcresolve pass will (intentionally) llvm-link an _internal_ function
+; body with an external declaration. Because of this, if we LINK an internal
+; function body into a program that already has an external declaration for
+; the function name, we must rename the internal function to something that
+; does not conflict.
+
+; RUN: echo { define internal i32 @foo() \{ ret i32 7 \} } | llvm-as > %t.1.bc
+; RUN: llvm-as < %s > %t.2.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep internal | not grep @foo(
+
+declare i32 @foo()
+
+define i32 @test() {
+ %X = call i32 @foo()
+ ret i32 %X
+}
+
diff --git a/test/Linker/2003-06-02-TypeResolveProblem.ll b/test/Linker/2003-06-02-TypeResolveProblem.ll
new file mode 100644
index 0000000..86979f6
--- /dev/null
+++ b/test/Linker/2003-06-02-TypeResolveProblem.ll
@@ -0,0 +1,7 @@
+; RUN: echo {%T = type opaque} | llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc
+
+%T = type opaque
+@a = constant { %T* } zeroinitializer ; <{ %T* }*> [#uses=0]
+
diff --git a/test/Linker/2003-06-02-TypeResolveProblem2.ll b/test/Linker/2003-06-02-TypeResolveProblem2.ll
new file mode 100644
index 0000000..42cc040
--- /dev/null
+++ b/test/Linker/2003-06-02-TypeResolveProblem2.ll
@@ -0,0 +1,7 @@
+; RUN: echo {%T = type i32} | llvm-as > %t.1.bc
+; RUN: llvm-as < %s > %t.2.bc
+; RUN: llvm-link %t.1.bc %t.2.bc
+
+%T = type opaque
+@X = constant { %T* } zeroinitializer ; <{ %T* }*> [#uses=0]
+
diff --git a/test/Linker/2003-08-20-OpaqueTypeResolve.ll b/test/Linker/2003-08-20-OpaqueTypeResolve.ll
new file mode 100644
index 0000000..c0fc620
--- /dev/null
+++ b/test/Linker/2003-08-20-OpaqueTypeResolve.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: echo {%M = type \{ i32, i32* \} } | llvm-as > %t.out2.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc
+
+%M = type { i32, %N* }
+%N = type opaque
+
+;%X = global { int, %N* } { int 5, %N* null }
diff --git a/test/Linker/2003-08-23-GlobalVarLinking.ll b/test/Linker/2003-08-23-GlobalVarLinking.ll
new file mode 100644
index 0000000..c3f61f8
--- /dev/null
+++ b/test/Linker/2003-08-23-GlobalVarLinking.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: echo {@S = external global \{ i32, opaque* \} declare void @F(opaque*)}\
+; RUN: | llvm-as > %t.out2.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc -S | not grep opaque
+
+; After linking this testcase, there should be no opaque types left. The two
+; S's should cause the opaque type to be resolved to 'int'.
+@S = global { i32, i32* } { i32 5, i32* null } ; <{ i32, i32* }*> [#uses=0]
+
+declare void @F(i32*)
diff --git a/test/Linker/2003-08-23-RecursiveOpaqueTypeResolve.ll b/test/Linker/2003-08-23-RecursiveOpaqueTypeResolve.ll
new file mode 100644
index 0000000..ea82075
--- /dev/null
+++ b/test/Linker/2003-08-23-RecursiveOpaqueTypeResolve.ll
@@ -0,0 +1,9 @@
+; It's a bad idea to go recursively traipsing through types without a safety
+; net.
+
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: echo "%M = type { %M*, i32* }" | llvm-as > %t.out2.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc
+
+%M = type { %M*, opaque* }
+
diff --git a/test/Linker/2003-08-24-InheritPtrSize.ll b/test/Linker/2003-08-24-InheritPtrSize.ll
new file mode 100644
index 0000000..f93c054
--- /dev/null
+++ b/test/Linker/2003-08-24-InheritPtrSize.ll
@@ -0,0 +1,9 @@
+; Linking a module with a specified pointer size to one without a
+; specified pointer size should not cause a warning!
+
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: echo {} | llvm-as > %t.out2.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc |& not grep warning
+
+target datalayout = "e-p:64:64"
+
diff --git a/test/Linker/2003-08-28-TypeResolvesGlobal.ll b/test/Linker/2003-08-28-TypeResolvesGlobal.ll
new file mode 100644
index 0000000..80b6162
--- /dev/null
+++ b/test/Linker/2003-08-28-TypeResolvesGlobal.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: echo "%M = type i32" | llvm-as > %t.out2.bc
+; RUN: llvm-link %t.out2.bc %t.out1.bc
+
+%M = type opaque
+
+define void @foo(i32* %V) {
+ ret void
+}
+
+declare void @foo.upgrd.1(%M*)
+
diff --git a/test/Linker/2003-08-28-TypeResolvesGlobal2.ll b/test/Linker/2003-08-28-TypeResolvesGlobal2.ll
new file mode 100644
index 0000000..601b917
--- /dev/null
+++ b/test/Linker/2003-08-28-TypeResolvesGlobal2.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: echo "%M = type i32" | llvm-as > %t.out2.bc
+; RUN: llvm-link %t.out2.bc %t.out1.bc
+
+%M = type opaque
+
+define void @foo(i32* %V) {
+ ret void
+}
+
+declare void @foo.upgrd.1(%M*)
+
+define void @other() {
+ call void @foo.upgrd.1( %M* null )
+ call void @foo( i32* null )
+ ret void
+}
+
diff --git a/test/Linker/2003-08-28-TypeResolvesGlobal3.ll b/test/Linker/2003-08-28-TypeResolvesGlobal3.ll
new file mode 100644
index 0000000..f77d9e6
--- /dev/null
+++ b/test/Linker/2003-08-28-TypeResolvesGlobal3.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: echo "%M = type i32" | llvm-as > %t.out2.bc
+; RUN: llvm-link %t.out2.bc %t.out1.bc
+
+%M = type opaque
+
+; GLobal using the resolved function prototype
+global void (%M*)* @foo ; <void (%M*)**>:0 [#uses=0]
+
+define void @foo.upgrd.1(i32* %V) {
+ ret void
+}
+
+declare void @foo(%M*)
+
diff --git a/test/Linker/2003-10-21-ConflictingTypesTolerance.ll b/test/Linker/2003-10-21-ConflictingTypesTolerance.ll
new file mode 100644
index 0000000..7cdf7ad
--- /dev/null
+++ b/test/Linker/2003-10-21-ConflictingTypesTolerance.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: echo { %M = type \[8 x i32\] external global %M } | llvm-as > %t.out2.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc -S | grep %M | grep \\{
+%M = type { i32 }
+
+
diff --git a/test/Linker/2003-10-27-LinkOncePromote.ll b/test/Linker/2003-10-27-LinkOncePromote.ll
new file mode 100644
index 0000000..f2d465e
--- /dev/null
+++ b/test/Linker/2003-10-27-LinkOncePromote.ll
@@ -0,0 +1,8 @@
+; The linker should merge link-once globals into strong external globals,
+; just like it does for weak symbols!
+
+; RUN: echo "@X = global i32 7" | llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc
+
+@X = linkonce global i32 7
diff --git a/test/Linker/2003-11-18-TypeResolution.ll b/test/Linker/2003-11-18-TypeResolution.ll
new file mode 100644
index 0000000..d3152ed
--- /dev/null
+++ b/test/Linker/2003-11-18-TypeResolution.ll
@@ -0,0 +1,20 @@
+; Linking these two translation units causes there to be two LLVM values in the
+; symbol table with the same name and same type. When this occurs, the symbol
+; table class is DROPPING one of the values, instead of renaming it like a nice
+; little symbol table. This is causing llvm-link to die, at no fault of its
+; own.
+
+; RUN: llvm-as < %s > %t.out2.bc
+; RUN: echo "%T1 = type opaque @GVar = external global %T1*" | llvm-as > %t.out1.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc
+
+%T1 = type opaque
+%T2 = type i32
+@GVar = global i32* null ; <i32**> [#uses=0]
+
+define void @foo(i32* %X) {
+ %X.upgrd.1 = bitcast i32* %X to %T1* ; <%T1*> [#uses=0]
+ ret void
+}
+
+
diff --git a/test/Linker/2004-02-17-WeakStrongLinkage.ll b/test/Linker/2004-02-17-WeakStrongLinkage.ll
new file mode 100644
index 0000000..2244639
--- /dev/null
+++ b/test/Linker/2004-02-17-WeakStrongLinkage.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s > %t.out2.bc
+; RUN: echo "@me = global i32* null" | llvm-as > %t.out1.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc -o /dev/null
+
+@me = weak global i32* null ; <i32**> [#uses=0]
+
+
diff --git a/test/Linker/2004-05-07-TypeResolution1.ll b/test/Linker/2004-05-07-TypeResolution1.ll
new file mode 100644
index 0000000..f0ade33
--- /dev/null
+++ b/test/Linker/2004-05-07-TypeResolution1.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as %s -o %t1.bc
+; RUN: llvm-as < %p/2004-05-07-TypeResolution2.ll -o %t2.bc
+; RUN: llvm-link -o %t3.bc %t1.bc %t2.bc
+
+target datalayout = "e-p:32:32"
+ %myint = type opaque
+ %struct1 = type { i32, void (%struct2*)*, %myint*, i32 (i32*)* }
+ %struct2 = type { %struct1 }
+@driver1 = global %struct1 zeroinitializer ; <%struct1*> [#uses=1]
+@m1 = external global [1 x i8]* ; <[1 x i8]**> [#uses=0]
+@str1 = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=0]
+@str2 = constant [2 x i8] zeroinitializer ; <[2 x i8]*> [#uses=0]
+@str3 = constant [3 x i8] zeroinitializer ; <[3 x i8]*> [#uses=0]
+@str4 = constant [4 x i8] zeroinitializer ; <[4 x i8]*> [#uses=0]
+@str5 = constant [5 x i8] zeroinitializer ; <[5 x i8]*> [#uses=0]
+@str6 = constant [6 x i8] zeroinitializer ; <[6 x i8]*> [#uses=0]
+@str7 = constant [7 x i8] zeroinitializer ; <[7 x i8]*> [#uses=0]
+@str8 = constant [8 x i8] zeroinitializer ; <[8 x i8]*> [#uses=0]
+@str9 = constant [9 x i8] zeroinitializer ; <[9 x i8]*> [#uses=0]
+@stra = constant [10 x i8] zeroinitializer ; <[10 x i8]*> [#uses=0]
+@strb = constant [11 x i8] zeroinitializer ; <[11 x i8]*> [#uses=0]
+@strc = constant [12 x i8] zeroinitializer ; <[12 x i8]*> [#uses=0]
+@strd = constant [13 x i8] zeroinitializer ; <[13 x i8]*> [#uses=0]
+@stre = constant [14 x i8] zeroinitializer ; <[14 x i8]*> [#uses=0]
+@strf = constant [15 x i8] zeroinitializer ; <[15 x i8]*> [#uses=0]
+@strg = constant [16 x i8] zeroinitializer ; <[16 x i8]*> [#uses=0]
+@strh = constant [17 x i8] zeroinitializer ; <[17 x i8]*> [#uses=0]
+
+declare void @func(%struct2*)
+
+define void @tty_init() {
+entry:
+ volatile store void (%struct2*)* @func, void (%struct2*)** getelementptr (%struct1* @driver1, i64 0, i32 1)
+ ret void
+}
diff --git a/test/Linker/2004-05-07-TypeResolution2.ll b/test/Linker/2004-05-07-TypeResolution2.ll
new file mode 100644
index 0000000..74fe39f
--- /dev/null
+++ b/test/Linker/2004-05-07-TypeResolution2.ll
@@ -0,0 +1,15 @@
+; This file is used by testlink1.ll, so it doesn't actually do anything itself
+;
+; RUN: echo
+target datalayout = "e-p:32:32"
+ %myint = type i16
+ %struct1 = type { i32, void (%struct2*)*, i16*, i32 (i32*)* }
+ %struct2 = type { %struct1 }
+
+define internal void @f1(%struct1* %tty) {
+loopentry.preheader:
+ %tmp.2.i.i = getelementptr %struct1* %tty, i64 0, i32 1 ; <void (%struct2*)**> [#uses=1]
+ %tmp.3.i.i = volatile load void (%struct2*)** %tmp.2.i.i ; <void (%struct2*)*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Linker/2004-12-03-DisagreeingType.ll b/test/Linker/2004-12-03-DisagreeingType.ll
new file mode 100644
index 0000000..570bda8
--- /dev/null
+++ b/test/Linker/2004-12-03-DisagreeingType.ll
@@ -0,0 +1,9 @@
+; RUN: echo {@G = weak global \{\{\{\{double\}\}\}\} zeroinitializer } | \
+; RUN: llvm-as > %t.out2.bc
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc -S | not grep {\\}}
+
+; When linked, the global above should be eliminated, being merged with the
+; global below.
+
+@G = global double 1.0
diff --git a/test/Linker/2005-02-12-ConstantGlobals-2.ll b/test/Linker/2005-02-12-ConstantGlobals-2.ll
new file mode 100644
index 0000000..2ceae31
--- /dev/null
+++ b/test/Linker/2005-02-12-ConstantGlobals-2.ll
@@ -0,0 +1,8 @@
+; Test that a prototype can be marked const, and the definition is allowed
+; to be nonconst.
+
+; RUN: echo {@X = external constant i32} | llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep {global i32 7}
+
+@X = global i32 7
diff --git a/test/Linker/2005-02-12-ConstantGlobals.ll b/test/Linker/2005-02-12-ConstantGlobals.ll
new file mode 100644
index 0000000..60f176b
--- /dev/null
+++ b/test/Linker/2005-02-12-ConstantGlobals.ll
@@ -0,0 +1,8 @@
+; Test that a prototype can be marked const, and the definition is allowed
+; to be nonconst.
+
+; RUN: echo {@X = global i32 7} | llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep {global i32 7}
+
+@X = external constant i32 ; <i32*> [#uses=0]
diff --git a/test/Linker/2005-12-06-AppendingZeroLengthArrays.ll b/test/Linker/2005-12-06-AppendingZeroLengthArrays.ll
new file mode 100644
index 0000000..7d1020d
--- /dev/null
+++ b/test/Linker/2005-12-06-AppendingZeroLengthArrays.ll
@@ -0,0 +1,10 @@
+; RUN: echo { @G = appending global \[0 x i32\] zeroinitializer } | \
+; RUN: llvm-as > %t.out2.bc
+; RUN: llvm-as < %s > %t.out1.bc
+; RUN: llvm-link %t.out1.bc %t.out2.bc -S | grep {@G =}
+
+; When linked, the globals should be merged, and the result should still
+; be named '@G'.
+
+@G = appending global [1 x i32] zeroinitializer ; <[1 x i32]*> [#uses=0]
+
diff --git a/test/Linker/2006-01-19-ConstantPacked.ll b/test/Linker/2006-01-19-ConstantPacked.ll
new file mode 100644
index 0000000..d2409e2
--- /dev/null
+++ b/test/Linker/2006-01-19-ConstantPacked.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -o %t1.bc
+; RUN: llvm-link -o %t2.bc %t1.bc
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin7.7.0"
+deplibs = [ "c", "crtend" ]
+@source = global <4 x i32> < i32 0, i32 1, i32 2, i32 3 > ; <<4 x i32>*> [#uses=0]
+
+define i32 @main() {
+entry:
+ ret i32 0
+}
+
diff --git a/test/Linker/2006-06-15-GlobalVarAlignment.ll b/test/Linker/2006-06-15-GlobalVarAlignment.ll
new file mode 100644
index 0000000..df3284b
--- /dev/null
+++ b/test/Linker/2006-06-15-GlobalVarAlignment.ll
@@ -0,0 +1,7 @@
+; The linker should choose the largest alignment when linking.
+
+; RUN: echo {@X = global i32 7, align 8} | llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep {align 8}
+
+@X = weak global i32 7, align 4
diff --git a/test/Linker/2008-03-05-AliasReference.ll b/test/Linker/2008-03-05-AliasReference.ll
new file mode 100644
index 0000000..7c19dfa
--- /dev/null
+++ b/test/Linker/2008-03-05-AliasReference.ll
@@ -0,0 +1,17 @@
+; PR2054
+; RUN: llvm-as %s -o %t1.bc
+; RUN: llvm-as %p/2008-03-05-AliasReference2.ll -o %t2.bc
+; RUN: llvm-link %t2.bc %t1.bc -o %t3.bc
+
+; ModuleID = 'bug.o'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+@foo = weak global i32 0 ; <i32*> [#uses=1]
+
+@bar = alias weak i32* @foo ; <i32*> [#uses=1]
+
+define i32 @baz() nounwind {
+entry:
+ %tmp1 = load i32* @bar, align 4 ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
diff --git a/test/Linker/2008-03-05-AliasReference2.ll b/test/Linker/2008-03-05-AliasReference2.ll
new file mode 100644
index 0000000..05c0a25
--- /dev/null
+++ b/test/Linker/2008-03-05-AliasReference2.ll
@@ -0,0 +1,11 @@
+; This file is used by 2008-03-05-AliasReference.ll
+; RUN: true
+
+; ModuleID = 'bug.o'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define i32 @baz1() nounwind {
+entry:
+ ret i32 0
+}
diff --git a/test/Linker/2008-03-07-DroppedSection_a.ll b/test/Linker/2008-03-07-DroppedSection_a.ll
new file mode 100644
index 0000000..4458971
--- /dev/null
+++ b/test/Linker/2008-03-07-DroppedSection_a.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: llvm-as < %p/2008-03-07-DroppedSection_b.ll > %t2.bc
+; RUN: llvm-ld -r -disable-opt %t.bc %t2.bc -o %t3.bc
+; RUN: llvm-dis < %t3.bc | grep ".data.init_task"
+
+; ModuleID = 't.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+@init_task_union = global i32 1, section ".data.init_task", align 32
+
diff --git a/test/Linker/2008-03-07-DroppedSection_b.ll b/test/Linker/2008-03-07-DroppedSection_b.ll
new file mode 100644
index 0000000..884bf0a
--- /dev/null
+++ b/test/Linker/2008-03-07-DroppedSection_b.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: llvm-as < %p/2008-03-07-DroppedSection_a.ll > %t2.bc
+; RUN: llvm-ld -r -disable-opt %t.bc %t2.bc -o %t3.bc
+; RUN: llvm-dis < %t3.bc | grep ".data.init_task"
+
+; ModuleID = 'u.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+@init_task_union = external global i32
+
diff --git a/test/Linker/2008-06-13-LinkOnceRedefinition.ll b/test/Linker/2008-06-13-LinkOnceRedefinition.ll
new file mode 100644
index 0000000..49da96a
--- /dev/null
+++ b/test/Linker/2008-06-13-LinkOnceRedefinition.ll
@@ -0,0 +1,8 @@
+; Test linking two functions with different prototypes and two globals
+; in different modules.
+; RUN: llvm-as %s -o %t.foo1.bc
+; RUN: llvm-as %s -o %t.foo2.bc
+; RUN: echo {define linkonce void @foo(i32 %x) { ret void }} | llvm-as -o %t.foo3.bc
+; RUN: llvm-link %t.foo1.bc %t.foo2.bc -S
+; RUN: llvm-link %t.foo1.bc %t.foo3.bc -S
+define linkonce void @foo() { ret void }
diff --git a/test/Linker/2008-06-26-AddressSpace.ll b/test/Linker/2008-06-26-AddressSpace.ll
new file mode 100644
index 0000000..e3ed385
--- /dev/null
+++ b/test/Linker/2008-06-26-AddressSpace.ll
@@ -0,0 +1,9 @@
+; Test linking two functions with different prototypes and two globals
+; in different modules.
+; RUN: llvm-as %s -o %t.foo1.bc
+; RUN: echo | llvm-as -o %t.foo2.bc
+; RUN: llvm-link %t.foo2.bc %t.foo1.bc -S | grep {addrspace(2)}
+; RUN: llvm-link %t.foo1.bc %t.foo2.bc -S | grep {addrspace(2)}
+; rdar://6038021
+
+@G = addrspace(2) global i32 256
diff --git a/test/Linker/2008-07-06-AliasFnDecl.ll b/test/Linker/2008-07-06-AliasFnDecl.ll
new file mode 100644
index 0000000..8e8c845
--- /dev/null
+++ b/test/Linker/2008-07-06-AliasFnDecl.ll
@@ -0,0 +1,14 @@
+; PR2146
+; RUN: llvm-as %s -o %t1.bc
+; RUN: llvm-as %p/2008-07-06-AliasFnDecl2.ll -o %t2.bc
+; RUN: llvm-link %t1.bc %t2.bc -o %t3.bc
+
+@b = alias void ()* @a
+
+define void @a() nounwind {
+entry:
+ br label %return
+
+return:
+ ret void
+}
diff --git a/test/Linker/2008-07-06-AliasFnDecl2.ll b/test/Linker/2008-07-06-AliasFnDecl2.ll
new file mode 100644
index 0000000..2380dff
--- /dev/null
+++ b/test/Linker/2008-07-06-AliasFnDecl2.ll
@@ -0,0 +1,13 @@
+; This file is used by 2008-07-06-AliasFnDecl2.ll
+; RUN: true
+
+define void @c() nounwind {
+entry:
+ call void @b( ) nounwind
+ br label %return
+
+return:
+ ret void
+}
+
+declare void @b()
diff --git a/test/Linker/2008-07-06-AliasWeakDest.ll b/test/Linker/2008-07-06-AliasWeakDest.ll
new file mode 100644
index 0000000..e631175
--- /dev/null
+++ b/test/Linker/2008-07-06-AliasWeakDest.ll
@@ -0,0 +1,18 @@
+; PR2463
+; RUN: llvm-as %s -o %t1.bc
+; RUN: llvm-as %p/2008-07-06-AliasWeakDest2.ll -o %t2.bc
+; RUN: llvm-link %t1.bc %t2.bc -o %t3.bc
+; RUN: llvm-link %t2.bc %t1.bc -o %t4.bc
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+@sched_clock = alias i64 ()* @native_sched_clock
+
+@foo = alias i32* @realfoo
+@realfoo = global i32 0
+
+define i64 @native_sched_clock() nounwind {
+entry:
+ ret i64 0
+}
diff --git a/test/Linker/2008-07-06-AliasWeakDest2.ll b/test/Linker/2008-07-06-AliasWeakDest2.ll
new file mode 100644
index 0000000..e4e2bf3
--- /dev/null
+++ b/test/Linker/2008-07-06-AliasWeakDest2.ll
@@ -0,0 +1,18 @@
+; This file is used by 2008-07-06-AliasWeakDest2.ll
+; RUN: true
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+@foo = weak global i32 2
+
+define i64 @sched_clock_cpu(i32 inreg %cpu) nounwind {
+entry:
+ %tmp = call i64 @sched_clock( ) nounwind ; <i64>
+ ret i64 %tmp
+}
+
+define weak i64 @sched_clock() {
+entry:
+ ret i64 1
+}
diff --git a/test/Linker/2009-09-03-mdnode.ll b/test/Linker/2009-09-03-mdnode.ll
new file mode 100644
index 0000000..11862f7
--- /dev/null
+++ b/test/Linker/2009-09-03-mdnode.ll
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: llvm-as < %p/2009-09-03-mdnode2.ll > %t2.bc
+; RUN: llvm-link %t.bc %t2.bc
+
+declare void @f() nounwind
+
+define i32 @main(...) nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ call void @llvm.dbg.func.start(metadata !0)
+ store i32 0, i32* %retval
+ call void @llvm.dbg.stoppoint(i32 4, i32 5, metadata !1)
+ call void @f()
+ br label %return
+
+return: ; preds = %entry
+ %0 = load i32* %retval ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 5, i32 1, metadata !1)
+ call void @llvm.dbg.region.end(metadata !0)
+ ret i32 %0
+}
+
+declare void @llvm.dbg.func.start(metadata) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, metadata) nounwind readnone
+
+declare void @llvm.dbg.region.end(metadata) nounwind readnone
+
+!0 = metadata !{i32 458798, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 2, null, i1 false, i1 true}
+!1 = metadata !{i32 458769, i32 0, i32 12, metadata !"a.c", metadata !"/home/rich/ellcc/test/source", metadata !"ellcc 0.1.0", i1 true, i1 true, metadata !"", i32 0}
diff --git a/test/Linker/2009-09-03-mdnode2.ll b/test/Linker/2009-09-03-mdnode2.ll
new file mode 100644
index 0000000..21589a4
--- /dev/null
+++ b/test/Linker/2009-09-03-mdnode2.ll
@@ -0,0 +1,25 @@
+; This file is used by 2009-09-03-mdnode.ll, so it doesn't actually do anything itself
+;
+; RUN: true
+
+define i32 @f(...) nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=1]
+ call void @llvm.dbg.func.start(metadata !0)
+ br label %return
+
+return: ; preds = %entry
+ %0 = load i32* %retval ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 3, i32 1, metadata !1)
+ call void @llvm.dbg.region.end(metadata !0)
+ ret i32 %0
+}
+
+declare void @llvm.dbg.func.start(metadata) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, metadata) nounwind readnone
+
+declare void @llvm.dbg.region.end(metadata) nounwind readnone
+
+!0 = metadata !{i32 458798, i32 0, metadata !1, metadata !"f", metadata !"f", metadata !"f", metadata !1, i32 1, null, i1 false, i1 true}
+!1 = metadata !{i32 458769, i32 0, i32 12, metadata !"b.c", metadata !"/home/rich/ellcc/test/source", metadata !"ellcc 0.1.0", i1 true, i1 true, metadata !"", i32 0}
diff --git a/test/Linker/AppendingLinkage.ll b/test/Linker/AppendingLinkage.ll
new file mode 100644
index 0000000..134a42e
--- /dev/null
+++ b/test/Linker/AppendingLinkage.ll
@@ -0,0 +1,15 @@
+; Test that appending linkage works correctly.
+
+; RUN: echo {@X = appending global \[1 x i32\] \[i32 8\] } | \
+; RUN: llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep 7 | grep 4 | grep 8
+
+@X = appending global [2 x i32] [ i32 7, i32 4 ] ; <[2 x i32]*> [#uses=2]
+@Y = global i32* getelementptr ([2 x i32]* @X, i64 0, i64 0) ; <i32**> [#uses=0]
+
+define void @foo(i64 %V) {
+ %Y = getelementptr [2 x i32]* @X, i64 0, i64 %V ; <i32*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Linker/AppendingLinkage2.ll b/test/Linker/AppendingLinkage2.ll
new file mode 100644
index 0000000..2c1302f
--- /dev/null
+++ b/test/Linker/AppendingLinkage2.ll
@@ -0,0 +1,8 @@
+; Test that appending linkage works correctly when arrays are the same size.
+
+; RUN: echo {@X = appending global \[1 x i32\] \[i32 8\] } | \
+; RUN: llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep 7 | grep 8
+
+@X = appending global [1 x i32] [ i32 7 ] ; <[1 x i32]*> [#uses=0]
diff --git a/test/Linker/ConstantGlobals1.ll b/test/Linker/ConstantGlobals1.ll
new file mode 100644
index 0000000..8fdbe50
--- /dev/null
+++ b/test/Linker/ConstantGlobals1.ll
@@ -0,0 +1,9 @@
+; Test that appending linkage works correctly when arrays are the same size.
+
+; RUN: echo {@X = constant \[1 x i32\] \[i32 8\] } | \
+; RUN: llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep constant
+
+@X = external global [1 x i32] ; <[1 x i32]*> [#uses=0]
+
diff --git a/test/Linker/ConstantGlobals2.ll b/test/Linker/ConstantGlobals2.ll
new file mode 100644
index 0000000..ad4428b9
--- /dev/null
+++ b/test/Linker/ConstantGlobals2.ll
@@ -0,0 +1,9 @@
+; Test that appending linkage works correctly when arrays are the same size.
+
+; RUN: echo {@X = external global \[1 x i32\] } | \
+; RUN: llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep constant
+
+@X = constant [1 x i32] [ i32 12 ] ; <[1 x i32]*> [#uses=0]
+
diff --git a/test/Linker/ConstantGlobals3.ll b/test/Linker/ConstantGlobals3.ll
new file mode 100644
index 0000000..e25529a
--- /dev/null
+++ b/test/Linker/ConstantGlobals3.ll
@@ -0,0 +1,8 @@
+; Test that appending linkage works correctly when arrays are the same size.
+
+; RUN: echo {@X = external constant \[1 x i32\] } | \
+; RUN: llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S | grep constant
+
+@X = external global [1 x i32] ; <[1 x i32]*> [#uses=0]
diff --git a/test/Linker/LinkOnce.ll b/test/Linker/LinkOnce.ll
new file mode 100644
index 0000000..56633fb
--- /dev/null
+++ b/test/Linker/LinkOnce.ll
@@ -0,0 +1,8 @@
+; This fails because the linker renames the non-opaque type not the opaque
+; one...
+
+; RUN: echo "@X = linkonce global i32 8" | llvm-as > %t.2.bc
+; RUN: llvm-as < %s > %t.1.bc
+; RUN: llvm-link %t.1.bc %t.2.bc -S
+
+@X = linkonce global i32 7 ; <i32*> [#uses=0]
diff --git a/test/Linker/basiclink.ll b/test/Linker/basiclink.ll
new file mode 100644
index 0000000..afe0320
--- /dev/null
+++ b/test/Linker/basiclink.ll
@@ -0,0 +1,13 @@
+; Test linking two functions with different prototypes and two globals
+; in different modules. This is for PR411
+; RUN: llvm-as %s -o %t.bar.bc
+; RUN: echo {define i32* @foo(i32 %x) \{ ret i32* @baz \} \
+; RUN: @baz = external global i32 } | llvm-as -o %t.foo.bc
+; RUN: llvm-link %t.bar.bc %t.foo.bc -o %t.bc
+; RUN: llvm-link %t.foo.bc %t.bar.bc -o %t.bc
+declare i32* @foo(...)
+define i32* @bar() {
+ %ret = call i32* (...)* @foo( i32 123 )
+ ret i32* %ret
+}
+@baz = global i32 0
diff --git a/test/Linker/dg.exp b/test/Linker/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Linker/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Linker/link-archive.ll b/test/Linker/link-archive.ll
new file mode 100644
index 0000000..6696fcc
--- /dev/null
+++ b/test/Linker/link-archive.ll
@@ -0,0 +1,15 @@
+; Test linking of a bc file to an archive via llvm-ld.
+; PR1434
+; RUN: llvm-as %s -o %t.bar.bc
+; RUN: echo {define i32* @foo(i32 %x) \{ ret i32* @baz \} \
+; RUN: @baz = external global i32 } | llvm-as -o %t.foo.bc
+; RUN: llvm-ar rcf %t.foo.a %t.foo.bc
+; RUN: llvm-ar rcf %t.bar.a %t.bar.bc
+; RUN: llvm-ld -disable-opt %t.bar.bc %t.foo.a -o %t.bc
+; RUN: llvm-ld -disable-opt %t.foo.bc %t.bar.a -o %t.bc
+declare i32* @foo(...)
+define i32* @bar() {
+ %ret = call i32* (...)* @foo( i32 123 )
+ ret i32* %ret
+}
+@baz = global i32 0
diff --git a/test/Linker/link-global-to-func.ll b/test/Linker/link-global-to-func.ll
new file mode 100644
index 0000000..2fc501d
--- /dev/null
+++ b/test/Linker/link-global-to-func.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as %s -o %t1.bc
+; RUN: echo {declare void @__eprintf(i8*, i8*, i32, i8*) noreturn define void @foo() { tail call void @__eprintf( i8* undef, i8* undef, i32 4, i8* null ) noreturn nounwind unreachable }} | llvm-as -o %t2.bc
+; RUN: llvm-link %t2.bc %t1.bc -S | grep __eprintf
+; RUN: llvm-link %t1.bc %t2.bc -S | grep __eprintf
+
+; rdar://6072702
+
+@__eprintf = external global i8* ; <i8**> [#uses=1]
+
+define i8* @test() {
+ %A = load i8** @__eprintf ; <i8*> [#uses=1]
+ ret i8* %A
+}
diff --git a/test/Linker/link-messages.ll b/test/Linker/link-messages.ll
new file mode 100644
index 0000000..920782d
--- /dev/null
+++ b/test/Linker/link-messages.ll
@@ -0,0 +1,11 @@
+; Test that linking two files with the same definition causes an error and
+; that error is printed out.
+; RUN: llvm-as %s -o %t.one.bc
+; RUN: llvm-as %s -o %t.two.bc
+; RUN: not llvm-ld -disable-opt -link-as-library %t.one.bc %t.two.bc \
+; RUN: -o %t.bc 2>%t.err
+; RUN: grep "symbol multiply defined" %t.err
+
+define i32 @bar() {
+ ret i32 0
+}
diff --git a/test/Linker/linkmdnode.ll b/test/Linker/linkmdnode.ll
new file mode 100644
index 0000000..be74550
--- /dev/null
+++ b/test/Linker/linkmdnode.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: llvm-as < %p/linkmdnode2.ll > %t2.bc
+; RUN: llvm-link %t.bc %t2.bc
+
+
+!21 = metadata !{i32 42, metadata !"foobar"}
+
+declare i8 @llvm.something(metadata %a)
+define void @foo() {
+ %x = call i8 @llvm.something(metadata !21)
+ ret void
+}
diff --git a/test/Linker/linkmdnode2.ll b/test/Linker/linkmdnode2.ll
new file mode 100644
index 0000000..54a5a57
--- /dev/null
+++ b/test/Linker/linkmdnode2.ll
@@ -0,0 +1,12 @@
+; This file is used by linkmdnode.ll, so it doesn't actually do anything itself
+;
+; RUN: true
+
+!22 = metadata !{i32 42, metadata !"foobar"}
+
+declare i8 @llvm.something(metadata %a)
+define void @foo1() {
+ ;; Intrinsic using MDNode and MDString
+ %x = call i8 @llvm.something(metadata !22)
+ ret void
+}
diff --git a/test/Linker/linknamedmdnode.ll b/test/Linker/linknamedmdnode.ll
new file mode 100644
index 0000000..e6b779f
--- /dev/null
+++ b/test/Linker/linknamedmdnode.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: llvm-as < %p/linknamedmdnode2.ll > %t2.bc
+; RUN: llvm-link %t.bc %t2.bc -S | grep "!llvm.stuff = !{!0, !1}"
+
+!0 = metadata !{i32 42}
+!llvm.stuff = !{!0}
diff --git a/test/Linker/linknamedmdnode2.ll b/test/Linker/linknamedmdnode2.ll
new file mode 100644
index 0000000..d16f62a
--- /dev/null
+++ b/test/Linker/linknamedmdnode2.ll
@@ -0,0 +1,6 @@
+; This file is used by linknamedmdnode.ll, so it doesn't actually do anything itself
+;
+; RUN: true
+
+!0 = metadata !{i32 41}
+!llvm.stuff = !{!0}
diff --git a/test/Linker/partial-type-refinement-link.ll b/test/Linker/partial-type-refinement-link.ll
new file mode 100644
index 0000000..320ef96
--- /dev/null
+++ b/test/Linker/partial-type-refinement-link.ll
@@ -0,0 +1,20 @@
+; This file is used by first.ll, so it doesn't actually do anything itself
+; RUN: true
+
+%AnalysisResolver = type { i8, %PMDataManager* }
+%"DenseMap<P*,AU*>" = type { i64, %"pair<P*,AU*>"*, i64, i64 }
+%PMDataManager = type { i8, %PMTopLevelManager*, i8, i8, i8, i8, i8, i64, i8 }
+%PMTopLevelManager = type { i8, i8, i8, i8, i8, i8, i8, i8, %"DenseMap<P*,AU*>" }
+%P = type { i8, %AnalysisResolver*, i64 }
+%PI = type { i8, i8, i8, i8, i8, i8, %"vector<const PI*>", %P* }
+%"SmallVImpl<const PI*>" = type { i8, %PI* }
+%"_V_base<const PI*>" = type { %"_V_base<const PI*>::_V_impl" }
+%"_V_base<const PI*>::_V_impl" = type { %PI*, i8, i8 }
+%"pair<P*,AU*>" = type opaque
+%"vector<const PI*>" = type { %"_V_base<const PI*>" }
+
+define void @f(%"SmallVImpl<const PI*>"* %this) {
+entry:
+ %x = getelementptr inbounds %"SmallVImpl<const PI*>"* %this, i64 0, i32 1
+ ret void
+}
diff --git a/test/Linker/partial-type-refinement.ll b/test/Linker/partial-type-refinement.ll
new file mode 100644
index 0000000..b995f11
--- /dev/null
+++ b/test/Linker/partial-type-refinement.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-link %s %p/partial-type-refinement-link.ll -S | FileCheck %s
+; PR4954
+
+; CHECK: load %PI** getelementptr inbounds (%"RegisterP<LowerArrayLength>"* @_ZN3mvmL1XE, i64 0, i32 0, i32 6, i32 0, i32 0, i32 0), align 16
+
+%AnalysisResolver = type { i8, %PMDataManager* }
+%"DenseMap<P*,AU*>" = type { i64, %"pair<P*,AU*>"*, i64, i64 }
+%PMDataManager = type { i8, %PMTopLevelManager*, i8, i8, i8, i8, i8, i64, i8 }
+%PMTopLevelManager = type { i8, i8, i8, i8, i8, i8, i8, i8, %"DenseMap<P*,AU*>" }
+%P = type { i8, %AnalysisResolver*, i64 }
+%PI = type { i8, i8, i8, i8, i8, i8, %"vector<const PI*>", %P* }
+%"RegisterP<LowerArrayLength>" = type { %PI }
+%"_V_base<const PI*>" = type { %"_V_base<const PI*>::_V_impl" }
+%"_V_base<const PI*>::_V_impl" = type { %PI*, i8, i8 }
+%"pair<P*,AU*>" = type opaque
+%"vector<const PI*>" = type { %"_V_base<const PI*>" }
+
+@_ZN3mvmL1XE = external global %"RegisterP<LowerArrayLength>"
+
+define void @__tcf_0() nounwind {
+entry:
+ %0 = load %PI** getelementptr inbounds (%"RegisterP<LowerArrayLength>"* @_ZN3mvmL1XE, i64 0, i32 0, i32 6, i32 0, i32 0, i32 0), align 16
+ ret void
+}
diff --git a/test/Linker/redefinition.ll b/test/Linker/redefinition.ll
new file mode 100644
index 0000000..0d05689
--- /dev/null
+++ b/test/Linker/redefinition.ll
@@ -0,0 +1,10 @@
+; Test linking two functions with different prototypes and two globals
+; in different modules.
+; RUN: llvm-as %s -o %t.foo1.bc
+; RUN: llvm-as %s -o %t.foo2.bc
+; RUN: echo {define void @foo(i32 %x) { ret void }} | llvm-as -o %t.foo3.bc
+; RUN: not llvm-link %t.foo1.bc %t.foo2.bc -o %t.bc |& \
+; RUN: grep {symbol multiply defined}
+; RUN: not llvm-link %t.foo1.bc %t.foo3.bc -o %t.bc |& \
+; RUN: grep {symbol multiply defined}
+define void @foo() { ret void }
diff --git a/test/Linker/testlink1.ll b/test/Linker/testlink1.ll
new file mode 100644
index 0000000..4a94025
--- /dev/null
+++ b/test/Linker/testlink1.ll
@@ -0,0 +1,42 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: llvm-as < %p/testlink2.ll > %t2.bc
+; RUN: llvm-link %t.bc %t2.bc
+
+@MyVar = external global i32 ; <i32*> [#uses=3]
+@MyIntList = global { \2*, i32 } { { \2*, i32 }* null, i32 17 } ; <{ \2*, i32 }*> [#uses=1]
+external global i32 ; <i32*>:0 [#uses=0]
+@Inte = global i32 1 ; <i32*> [#uses=0]
+@AConst = linkonce constant i32 123 ; <i32*> [#uses=0]
+@Intern1 = internal constant i32 42 ; <i32*> [#uses=0]
+@Intern2 = internal constant i32 792 ; <i32*> [#uses=0]
+@MyVarPtr = linkonce global { i32* } { i32* @MyVar } ; <{ i32* }*> [#uses=0]
+
+declare i32 @foo(i32)
+
+declare void @print(i32)
+
+define void @main() {
+ %v1 = load i32* @MyVar ; <i32> [#uses=1]
+ call void @print( i32 %v1 )
+ %idx = getelementptr { \2*, i32 }* @MyIntList, i64 0, i32 1 ; <i32*> [#uses=2]
+ %v2 = load i32* %idx ; <i32> [#uses=1]
+ call void @print( i32 %v2 )
+ call i32 @foo( i32 5 ) ; <i32>:1 [#uses=0]
+ %v3 = load i32* @MyVar ; <i32> [#uses=1]
+ call void @print( i32 %v3 )
+ %v4 = load i32* %idx ; <i32> [#uses=1]
+ call void @print( i32 %v4 )
+ ret void
+}
+
+define internal void @testintern() {
+ ret void
+}
+
+define internal void @Testintern() {
+ ret void
+}
+
+define void @testIntern() {
+ ret void
+}
diff --git a/test/Linker/testlink2.ll b/test/Linker/testlink2.ll
new file mode 100644
index 0000000..d243e3c
--- /dev/null
+++ b/test/Linker/testlink2.ll
@@ -0,0 +1,41 @@
+; This file is used by testlink1.ll, so it doesn't actually do anything itself
+;
+; RUN: true
+
+@MyVar = global i32 4 ; <i32*> [#uses=2]
+@MyIntList = external global { \2*, i32 } ; <{ \2*, i32 }*> [#uses=2]
+@AConst = constant i32 123 ; <i32*> [#uses=0]
+
+;; Intern in both testlink[12].ll
+@Intern1 = internal constant i32 52 ; <i32*> [#uses=0]
+
+;; Intern in one but not in other
+@Intern2 = constant i32 12345 ; <i32*> [#uses=0]
+
+@MyIntListPtr = constant { { \2*, i32 }* } { { \2*, i32 }* @MyIntList } ; <{ { \2*, i32 }* }*> [#uses=0]
+@MyVarPtr = linkonce global { i32* } { i32* @MyVar } ; <{ i32* }*> [#uses=0]
+constant i32 412 ; <i32*>:0 [#uses=1]
+
+define i32 @foo(i32 %blah) {
+ store i32 %blah, i32* @MyVar
+ %idx = getelementptr { \2*, i32 }* @MyIntList, i64 0, i32 1 ; <i32*> [#uses=1]
+ store i32 12, i32* %idx
+ %ack = load i32* @0 ; <i32> [#uses=1]
+ %fzo = add i32 %ack, %blah ; <i32> [#uses=1]
+ ret i32 %fzo
+}
+
+declare void @unimp(float, double)
+
+define internal void @testintern() {
+ ret void
+}
+
+define void @Testintern() {
+ ret void
+}
+
+define internal void @testIntern() {
+ ret void
+}
+
diff --git a/test/Linker/weakextern.ll b/test/Linker/weakextern.ll
new file mode 100644
index 0000000..aa38b12
--- /dev/null
+++ b/test/Linker/weakextern.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s > %t.bc
+; RUN: llvm-as < %p/testlink1.ll > %t2.bc
+; RUN: llvm-link %t.bc %t.bc %t2.bc -o %t1.bc
+; RUN: llvm-dis < %t1.bc | grep {kallsyms_names = extern_weak}
+; RUN: llvm-dis < %t1.bc | grep {MyVar = external global i32}
+; RUN: llvm-dis < %t1.bc | grep {Inte = global i32}
+
+@kallsyms_names = extern_weak global [0 x i8] ; <[0 x i8]*> [#uses=0]
+@MyVar = extern_weak global i32 ; <i32*> [#uses=0]
+@Inte = extern_weak global i32 ; <i32*> [#uses=0]
+
diff --git a/test/MC/AsmParser/ARM/arm_word_directive.s b/test/MC/AsmParser/ARM/arm_word_directive.s
new file mode 100644
index 0000000..7833691
--- /dev/null
+++ b/test/MC/AsmParser/ARM/arm_word_directive.s
@@ -0,0 +1,6 @@
+@ RUN: llvm-mc -triple arm-unknown-unknown %s | FileCheck %s
+
+@ CHECK: TEST0:
+@ CHECK: .long 3
+TEST0:
+ .word 3
diff --git a/test/MC/AsmParser/ARM/dg.exp b/test/MC/AsmParser/ARM/dg.exp
new file mode 100644
index 0000000..3ff359a
--- /dev/null
+++ b/test/MC/AsmParser/ARM/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target ARM] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/MC/AsmParser/X86/dg.exp b/test/MC/AsmParser/X86/dg.exp
new file mode 100644
index 0000000..ec87b69
--- /dev/null
+++ b/test/MC/AsmParser/X86/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target X86] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]]
+}
diff --git a/test/MC/AsmParser/X86/x86_32-bit.s b/test/MC/AsmParser/X86/x86_32-bit.s
new file mode 100644
index 0000000..90e97be
--- /dev/null
+++ b/test/MC/AsmParser/X86/x86_32-bit.s
@@ -0,0 +1,1630 @@
+// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+// CHECK: movb $127, 3735928559(%ebx,%ecx,8)
+ movb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movw $31438, 3735928559(%ebx,%ecx,8)
+ movw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movl $2063514302, 3735928559(%ebx,%ecx,8)
+ movl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movl $324478056, 3735928559(%ebx,%ecx,8)
+ movl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movsbl 3735928559(%ebx,%ecx,8), %ecx
+ movsbl 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: movswl 3735928559(%ebx,%ecx,8), %ecx
+ movswl 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: movzbl 3735928559(%ebx,%ecx,8), %ecx # NOREX
+ movzbl 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: movzwl 3735928559(%ebx,%ecx,8), %ecx
+ movzwl 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: pushl 3735928559(%ebx,%ecx,8)
+ pushl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: popl 3735928559(%ebx,%ecx,8)
+ popl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: lahf
+ lahf
+
+// CHECK: sahf
+ sahf
+
+// CHECK: addb $254, 3735928559(%ebx,%ecx,8)
+ addb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addb $127, 3735928559(%ebx,%ecx,8)
+ addb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addw $31438, 3735928559(%ebx,%ecx,8)
+ addw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addl $2063514302, 3735928559(%ebx,%ecx,8)
+ addl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addl $324478056, 3735928559(%ebx,%ecx,8)
+ addl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: incl 3735928559(%ebx,%ecx,8)
+ incl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subb $254, 3735928559(%ebx,%ecx,8)
+ subb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subb $127, 3735928559(%ebx,%ecx,8)
+ subb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subw $31438, 3735928559(%ebx,%ecx,8)
+ subw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subl $2063514302, 3735928559(%ebx,%ecx,8)
+ subl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subl $324478056, 3735928559(%ebx,%ecx,8)
+ subl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: decl 3735928559(%ebx,%ecx,8)
+ decl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sbbw $31438, 3735928559(%ebx,%ecx,8)
+ sbbw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sbbl $2063514302, 3735928559(%ebx,%ecx,8)
+ sbbl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sbbl $324478056, 3735928559(%ebx,%ecx,8)
+ sbbl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpb $254, 3735928559(%ebx,%ecx,8)
+ cmpb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpb $127, 3735928559(%ebx,%ecx,8)
+ cmpb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpw $31438, 3735928559(%ebx,%ecx,8)
+ cmpw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpl $2063514302, 3735928559(%ebx,%ecx,8)
+ cmpl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpl $324478056, 3735928559(%ebx,%ecx,8)
+ cmpl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: testb $127, 3735928559(%ebx,%ecx,8)
+ testb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: testw $31438, 3735928559(%ebx,%ecx,8)
+ testw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: testl $2063514302, 3735928559(%ebx,%ecx,8)
+ testl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: testl $324478056, 3735928559(%ebx,%ecx,8)
+ testl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andb $254, 3735928559(%ebx,%ecx,8)
+ andb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andb $127, 3735928559(%ebx,%ecx,8)
+ andb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andw $31438, 3735928559(%ebx,%ecx,8)
+ andw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andl $2063514302, 3735928559(%ebx,%ecx,8)
+ andl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andl $324478056, 3735928559(%ebx,%ecx,8)
+ andl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orb $254, 3735928559(%ebx,%ecx,8)
+ orb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orb $127, 3735928559(%ebx,%ecx,8)
+ orb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orw $31438, 3735928559(%ebx,%ecx,8)
+ orw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orl $2063514302, 3735928559(%ebx,%ecx,8)
+ orl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orl $324478056, 3735928559(%ebx,%ecx,8)
+ orl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorb $254, 3735928559(%ebx,%ecx,8)
+ xorb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorb $127, 3735928559(%ebx,%ecx,8)
+ xorb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorw $31438, 3735928559(%ebx,%ecx,8)
+ xorw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorl $2063514302, 3735928559(%ebx,%ecx,8)
+ xorl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorl $324478056, 3735928559(%ebx,%ecx,8)
+ xorl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcb $254, 3735928559(%ebx,%ecx,8)
+ adcb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcb $127, 3735928559(%ebx,%ecx,8)
+ adcb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcw $31438, 3735928559(%ebx,%ecx,8)
+ adcw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcl $2063514302, 3735928559(%ebx,%ecx,8)
+ adcl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcl $324478056, 3735928559(%ebx,%ecx,8)
+ adcl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: negl 3735928559(%ebx,%ecx,8)
+ negl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: notl 3735928559(%ebx,%ecx,8)
+ notl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cbtw
+ cbtw
+
+// CHECK: cwtl
+ cwtl
+
+// CHECK: cwtd
+ cwtd
+
+// CHECK: cltd
+ cltd
+
+// CHECK: mull 3735928559(%ebx,%ecx,8)
+ mull 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: imull 3735928559(%ebx,%ecx,8)
+ imull 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: divl 3735928559(%ebx,%ecx,8)
+ divl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: idivl 3735928559(%ebx,%ecx,8)
+ idivl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: roll $0, 3735928559(%ebx,%ecx,8)
+ roll $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rolb $127, 3735928559(%ebx,%ecx,8)
+ rolb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: roll 3735928559(%ebx,%ecx,8)
+ roll 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rorl $0, 3735928559(%ebx,%ecx,8)
+ rorl $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rorb $127, 3735928559(%ebx,%ecx,8)
+ rorb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rorl 3735928559(%ebx,%ecx,8)
+ rorl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shll $0, 3735928559(%ebx,%ecx,8)
+ shll $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shlb $127, 3735928559(%ebx,%ecx,8)
+ shlb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shll 3735928559(%ebx,%ecx,8)
+ shll 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shrl $0, 3735928559(%ebx,%ecx,8)
+ shrl $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shrb $127, 3735928559(%ebx,%ecx,8)
+ shrb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shrl 3735928559(%ebx,%ecx,8)
+ shrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sarl $0, 3735928559(%ebx,%ecx,8)
+ sarl $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sarb $127, 3735928559(%ebx,%ecx,8)
+ sarb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sarl 3735928559(%ebx,%ecx,8)
+ sarl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: call *%ecx
+ call *%ecx
+
+// CHECK: call *3735928559(%ebx,%ecx,8)
+ call *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: call *3735928559(%ebx,%ecx,8)
+ call *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: jmp *3735928559(%ebx,%ecx,8) # TAILCALL
+ jmp *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: jmp *3735928559(%ebx,%ecx,8) # TAILCALL
+ jmp *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: ljmpl *3735928559(%ebx,%ecx,8)
+ ljmpl *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: lret
+ lret
+
+// CHECK: leave
+ leave
+
+// CHECK: seto %bl
+ seto %bl
+
+// CHECK: seto 3735928559(%ebx,%ecx,8)
+ seto 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setno %bl
+ setno %bl
+
+// CHECK: setno 3735928559(%ebx,%ecx,8)
+ setno 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setb %bl
+ setb %bl
+
+// CHECK: setb 3735928559(%ebx,%ecx,8)
+ setb 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setae %bl
+ setae %bl
+
+// CHECK: setae 3735928559(%ebx,%ecx,8)
+ setae 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sete %bl
+ sete %bl
+
+// CHECK: sete 3735928559(%ebx,%ecx,8)
+ sete 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setne %bl
+ setne %bl
+
+// CHECK: setne 3735928559(%ebx,%ecx,8)
+ setne 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setbe %bl
+ setbe %bl
+
+// CHECK: setbe 3735928559(%ebx,%ecx,8)
+ setbe 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: seta %bl
+ seta %bl
+
+// CHECK: seta 3735928559(%ebx,%ecx,8)
+ seta 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sets %bl
+ sets %bl
+
+// CHECK: sets 3735928559(%ebx,%ecx,8)
+ sets 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setns %bl
+ setns %bl
+
+// CHECK: setns 3735928559(%ebx,%ecx,8)
+ setns 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setp %bl
+ setp %bl
+
+// CHECK: setp 3735928559(%ebx,%ecx,8)
+ setp 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setnp %bl
+ setnp %bl
+
+// CHECK: setnp 3735928559(%ebx,%ecx,8)
+ setnp 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setl %bl
+ setl %bl
+
+// CHECK: setl 3735928559(%ebx,%ecx,8)
+ setl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setge %bl
+ setge %bl
+
+// CHECK: setge 3735928559(%ebx,%ecx,8)
+ setge 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setle %bl
+ setle %bl
+
+// CHECK: setle 3735928559(%ebx,%ecx,8)
+ setle 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setg %bl
+ setg %bl
+
+// CHECK: setg 3735928559(%ebx,%ecx,8)
+ setg 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: nopl 3735928559(%ebx,%ecx,8)
+ nopl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: nop
+ nop
+
+// CHECK: fldl 3735928559(%ebx,%ecx,8)
+ fldl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fildl 3735928559(%ebx,%ecx,8)
+ fildl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fildll 3735928559(%ebx,%ecx,8)
+ fildll 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fldt 3735928559(%ebx,%ecx,8)
+ fldt 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fbld 3735928559(%ebx,%ecx,8)
+ fbld 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fstl 3735928559(%ebx,%ecx,8)
+ fstl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fistl 3735928559(%ebx,%ecx,8)
+ fistl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fstpl 3735928559(%ebx,%ecx,8)
+ fstpl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fistpl 3735928559(%ebx,%ecx,8)
+ fistpl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fistpll 3735928559(%ebx,%ecx,8)
+ fistpll 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fstpt 3735928559(%ebx,%ecx,8)
+ fstpt 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fbstp 3735928559(%ebx,%ecx,8)
+ fbstp 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: ficoml 3735928559(%ebx,%ecx,8)
+ ficoml 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: ficompl 3735928559(%ebx,%ecx,8)
+ ficompl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fucompp
+ fucompp
+
+// CHECK: ftst
+ ftst
+
+// CHECK: fld1
+ fld1
+
+// CHECK: fldz
+ fldz
+
+// CHECK: faddl 3735928559(%ebx,%ecx,8)
+ faddl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fiaddl 3735928559(%ebx,%ecx,8)
+ fiaddl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fsubl 3735928559(%ebx,%ecx,8)
+ fsubl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fisubl 3735928559(%ebx,%ecx,8)
+ fisubl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fsubrl 3735928559(%ebx,%ecx,8)
+ fsubrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fisubrl 3735928559(%ebx,%ecx,8)
+ fisubrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fmull 3735928559(%ebx,%ecx,8)
+ fmull 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fimull 3735928559(%ebx,%ecx,8)
+ fimull 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fdivl 3735928559(%ebx,%ecx,8)
+ fdivl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fidivl 3735928559(%ebx,%ecx,8)
+ fidivl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fdivrl 3735928559(%ebx,%ecx,8)
+ fdivrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fidivrl 3735928559(%ebx,%ecx,8)
+ fidivrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fsqrt
+ fsqrt
+
+// CHECK: fsin
+ fsin
+
+// CHECK: fcos
+ fcos
+
+// CHECK: fchs
+ fchs
+
+// CHECK: fabs
+ fabs
+
+// CHECK: fldcw 3735928559(%ebx,%ecx,8)
+ fldcw 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fnstcw 3735928559(%ebx,%ecx,8)
+ fnstcw 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rdtsc
+ rdtsc
+
+// CHECK: sysenter
+ sysenter
+
+// CHECK: sysexit
+ sysexit
+
+// CHECK: ud2
+ ud2
+
+// CHECK: movnti %ecx, 3735928559(%ebx,%ecx,8)
+ movnti %ecx,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: clflush 3735928559(%ebx,%ecx,8)
+ clflush 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: emms
+ emms
+
+// CHECK: movd %ecx, %mm3
+ movd %ecx,%mm3
+
+// CHECK: movd 3735928559(%ebx,%ecx,8), %mm3
+ movd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: movd %ecx, %xmm5
+ movd %ecx,%xmm5
+
+// CHECK: movd 3735928559(%ebx,%ecx,8), %xmm5
+ movd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movd %xmm5, %ecx
+ movd %xmm5,%ecx
+
+// CHECK: movd %xmm5, 3735928559(%ebx,%ecx,8)
+ movd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movq 3735928559(%ebx,%ecx,8), %mm3
+ movq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: movq %mm3, %mm3
+ movq %mm3,%mm3
+
+// CHECK: movq %mm3, %mm3
+ movq %mm3,%mm3
+
+// CHECK: movq %xmm5, %xmm5
+ movq %xmm5,%xmm5
+
+// CHECK: movq %xmm5, %xmm5
+ movq %xmm5,%xmm5
+
+// CHECK: packssdw %mm3, %mm3
+ packssdw %mm3,%mm3
+
+// CHECK: packssdw %xmm5, %xmm5
+ packssdw %xmm5,%xmm5
+
+// CHECK: packsswb %mm3, %mm3
+ packsswb %mm3,%mm3
+
+// CHECK: packsswb %xmm5, %xmm5
+ packsswb %xmm5,%xmm5
+
+// CHECK: packuswb %mm3, %mm3
+ packuswb %mm3,%mm3
+
+// CHECK: packuswb %xmm5, %xmm5
+ packuswb %xmm5,%xmm5
+
+// CHECK: paddb %mm3, %mm3
+ paddb %mm3,%mm3
+
+// CHECK: paddb %xmm5, %xmm5
+ paddb %xmm5,%xmm5
+
+// CHECK: paddw %mm3, %mm3
+ paddw %mm3,%mm3
+
+// CHECK: paddw %xmm5, %xmm5
+ paddw %xmm5,%xmm5
+
+// CHECK: paddd %mm3, %mm3
+ paddd %mm3,%mm3
+
+// CHECK: paddd %xmm5, %xmm5
+ paddd %xmm5,%xmm5
+
+// CHECK: paddq %mm3, %mm3
+ paddq %mm3,%mm3
+
+// CHECK: paddq %xmm5, %xmm5
+ paddq %xmm5,%xmm5
+
+// CHECK: paddsb %mm3, %mm3
+ paddsb %mm3,%mm3
+
+// CHECK: paddsb %xmm5, %xmm5
+ paddsb %xmm5,%xmm5
+
+// CHECK: paddsw %mm3, %mm3
+ paddsw %mm3,%mm3
+
+// CHECK: paddsw %xmm5, %xmm5
+ paddsw %xmm5,%xmm5
+
+// CHECK: paddusb %mm3, %mm3
+ paddusb %mm3,%mm3
+
+// CHECK: paddusb %xmm5, %xmm5
+ paddusb %xmm5,%xmm5
+
+// CHECK: paddusw %mm3, %mm3
+ paddusw %mm3,%mm3
+
+// CHECK: paddusw %xmm5, %xmm5
+ paddusw %xmm5,%xmm5
+
+// CHECK: pand %mm3, %mm3
+ pand %mm3,%mm3
+
+// CHECK: pand %xmm5, %xmm5
+ pand %xmm5,%xmm5
+
+// CHECK: pandn %mm3, %mm3
+ pandn %mm3,%mm3
+
+// CHECK: pandn %xmm5, %xmm5
+ pandn %xmm5,%xmm5
+
+// CHECK: pcmpeqb %mm3, %mm3
+ pcmpeqb %mm3,%mm3
+
+// CHECK: pcmpeqb %xmm5, %xmm5
+ pcmpeqb %xmm5,%xmm5
+
+// CHECK: pcmpeqw %mm3, %mm3
+ pcmpeqw %mm3,%mm3
+
+// CHECK: pcmpeqw %xmm5, %xmm5
+ pcmpeqw %xmm5,%xmm5
+
+// CHECK: pcmpeqd %mm3, %mm3
+ pcmpeqd %mm3,%mm3
+
+// CHECK: pcmpeqd %xmm5, %xmm5
+ pcmpeqd %xmm5,%xmm5
+
+// CHECK: pcmpgtb %mm3, %mm3
+ pcmpgtb %mm3,%mm3
+
+// CHECK: pcmpgtb %xmm5, %xmm5
+ pcmpgtb %xmm5,%xmm5
+
+// CHECK: pcmpgtw %mm3, %mm3
+ pcmpgtw %mm3,%mm3
+
+// CHECK: pcmpgtw %xmm5, %xmm5
+ pcmpgtw %xmm5,%xmm5
+
+// CHECK: pcmpgtd %mm3, %mm3
+ pcmpgtd %mm3,%mm3
+
+// CHECK: pcmpgtd %xmm5, %xmm5
+ pcmpgtd %xmm5,%xmm5
+
+// CHECK: pmaddwd %mm3, %mm3
+ pmaddwd %mm3,%mm3
+
+// CHECK: pmaddwd %xmm5, %xmm5
+ pmaddwd %xmm5,%xmm5
+
+// CHECK: pmulhw %mm3, %mm3
+ pmulhw %mm3,%mm3
+
+// CHECK: pmulhw %xmm5, %xmm5
+ pmulhw %xmm5,%xmm5
+
+// CHECK: pmullw %mm3, %mm3
+ pmullw %mm3,%mm3
+
+// CHECK: pmullw %xmm5, %xmm5
+ pmullw %xmm5,%xmm5
+
+// CHECK: por %mm3, %mm3
+ por %mm3,%mm3
+
+// CHECK: por %xmm5, %xmm5
+ por %xmm5,%xmm5
+
+// CHECK: psllw %mm3, %mm3
+ psllw %mm3,%mm3
+
+// CHECK: psllw %xmm5, %xmm5
+ psllw %xmm5,%xmm5
+
+// CHECK: psllw $127, %mm3
+ psllw $0x7f,%mm3
+
+// CHECK: psllw $127, %xmm5
+ psllw $0x7f,%xmm5
+
+// CHECK: pslld %mm3, %mm3
+ pslld %mm3,%mm3
+
+// CHECK: pslld %xmm5, %xmm5
+ pslld %xmm5,%xmm5
+
+// CHECK: pslld $127, %mm3
+ pslld $0x7f,%mm3
+
+// CHECK: pslld $127, %xmm5
+ pslld $0x7f,%xmm5
+
+// CHECK: psllq %mm3, %mm3
+ psllq %mm3,%mm3
+
+// CHECK: psllq %xmm5, %xmm5
+ psllq %xmm5,%xmm5
+
+// CHECK: psllq $127, %mm3
+ psllq $0x7f,%mm3
+
+// CHECK: psllq $127, %xmm5
+ psllq $0x7f,%xmm5
+
+// CHECK: psraw %mm3, %mm3
+ psraw %mm3,%mm3
+
+// CHECK: psraw %xmm5, %xmm5
+ psraw %xmm5,%xmm5
+
+// CHECK: psraw $127, %mm3
+ psraw $0x7f,%mm3
+
+// CHECK: psraw $127, %xmm5
+ psraw $0x7f,%xmm5
+
+// CHECK: psrad %mm3, %mm3
+ psrad %mm3,%mm3
+
+// CHECK: psrad %xmm5, %xmm5
+ psrad %xmm5,%xmm5
+
+// CHECK: psrad $127, %mm3
+ psrad $0x7f,%mm3
+
+// CHECK: psrad $127, %xmm5
+ psrad $0x7f,%xmm5
+
+// CHECK: psrlw %mm3, %mm3
+ psrlw %mm3,%mm3
+
+// CHECK: psrlw %xmm5, %xmm5
+ psrlw %xmm5,%xmm5
+
+// CHECK: psrlw $127, %mm3
+ psrlw $0x7f,%mm3
+
+// CHECK: psrlw $127, %xmm5
+ psrlw $0x7f,%xmm5
+
+// CHECK: psrld %mm3, %mm3
+ psrld %mm3,%mm3
+
+// CHECK: psrld %xmm5, %xmm5
+ psrld %xmm5,%xmm5
+
+// CHECK: psrld $127, %mm3
+ psrld $0x7f,%mm3
+
+// CHECK: psrld $127, %xmm5
+ psrld $0x7f,%xmm5
+
+// CHECK: psrlq %mm3, %mm3
+ psrlq %mm3,%mm3
+
+// CHECK: psrlq %xmm5, %xmm5
+ psrlq %xmm5,%xmm5
+
+// CHECK: psrlq $127, %mm3
+ psrlq $0x7f,%mm3
+
+// CHECK: psrlq $127, %xmm5
+ psrlq $0x7f,%xmm5
+
+// CHECK: psubb %mm3, %mm3
+ psubb %mm3,%mm3
+
+// CHECK: psubb %xmm5, %xmm5
+ psubb %xmm5,%xmm5
+
+// CHECK: psubw %mm3, %mm3
+ psubw %mm3,%mm3
+
+// CHECK: psubw %xmm5, %xmm5
+ psubw %xmm5,%xmm5
+
+// CHECK: psubd %mm3, %mm3
+ psubd %mm3,%mm3
+
+// CHECK: psubd %xmm5, %xmm5
+ psubd %xmm5,%xmm5
+
+// CHECK: psubq %mm3, %mm3
+ psubq %mm3,%mm3
+
+// CHECK: psubq %xmm5, %xmm5
+ psubq %xmm5,%xmm5
+
+// CHECK: psubsb %mm3, %mm3
+ psubsb %mm3,%mm3
+
+// CHECK: psubsb %xmm5, %xmm5
+ psubsb %xmm5,%xmm5
+
+// CHECK: psubsw %mm3, %mm3
+ psubsw %mm3,%mm3
+
+// CHECK: psubsw %xmm5, %xmm5
+ psubsw %xmm5,%xmm5
+
+// CHECK: psubusb %mm3, %mm3
+ psubusb %mm3,%mm3
+
+// CHECK: psubusb %xmm5, %xmm5
+ psubusb %xmm5,%xmm5
+
+// CHECK: psubusw %mm3, %mm3
+ psubusw %mm3,%mm3
+
+// CHECK: psubusw %xmm5, %xmm5
+ psubusw %xmm5,%xmm5
+
+// CHECK: punpckhbw %mm3, %mm3
+ punpckhbw %mm3,%mm3
+
+// CHECK: punpckhbw %xmm5, %xmm5
+ punpckhbw %xmm5,%xmm5
+
+// CHECK: punpckhwd %mm3, %mm3
+ punpckhwd %mm3,%mm3
+
+// CHECK: punpckhwd %xmm5, %xmm5
+ punpckhwd %xmm5,%xmm5
+
+// CHECK: punpckhdq %mm3, %mm3
+ punpckhdq %mm3,%mm3
+
+// CHECK: punpckhdq %xmm5, %xmm5
+ punpckhdq %xmm5,%xmm5
+
+// CHECK: punpcklbw %mm3, %mm3
+ punpcklbw %mm3,%mm3
+
+// CHECK: punpcklbw %xmm5, %xmm5
+ punpcklbw %xmm5,%xmm5
+
+// CHECK: punpcklwd %mm3, %mm3
+ punpcklwd %mm3,%mm3
+
+// CHECK: punpcklwd %xmm5, %xmm5
+ punpcklwd %xmm5,%xmm5
+
+// CHECK: punpckldq %mm3, %mm3
+ punpckldq %mm3,%mm3
+
+// CHECK: punpckldq %xmm5, %xmm5
+ punpckldq %xmm5,%xmm5
+
+// CHECK: pxor %mm3, %mm3
+ pxor %mm3,%mm3
+
+// CHECK: pxor %xmm5, %xmm5
+ pxor %xmm5,%xmm5
+
+// CHECK: addps %xmm5, %xmm5
+ addps %xmm5,%xmm5
+
+// CHECK: addss %xmm5, %xmm5
+ addss %xmm5,%xmm5
+
+// CHECK: andnps %xmm5, %xmm5
+ andnps %xmm5,%xmm5
+
+// CHECK: andps %xmm5, %xmm5
+ andps %xmm5,%xmm5
+
+// CHECK: cvtpi2ps 3735928559(%ebx,%ecx,8), %xmm5
+ cvtpi2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtpi2ps %mm3, %xmm5
+ cvtpi2ps %mm3,%xmm5
+
+// CHECK: cvtps2pi 3735928559(%ebx,%ecx,8), %mm3
+ cvtps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: cvtps2pi %xmm5, %mm3
+ cvtps2pi %xmm5,%mm3
+
+// CHECK: cvtsi2ss %ecx, %xmm5
+ cvtsi2ss %ecx,%xmm5
+
+// CHECK: cvtsi2ss 3735928559(%ebx,%ecx,8), %xmm5
+ cvtsi2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvttps2pi 3735928559(%ebx,%ecx,8), %mm3
+ cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: cvttps2pi %xmm5, %mm3
+ cvttps2pi %xmm5,%mm3
+
+// CHECK: cvttss2si 3735928559(%ebx,%ecx,8), %ecx
+ cvttss2si 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: cvttss2si %xmm5, %ecx
+ cvttss2si %xmm5,%ecx
+
+// CHECK: divps %xmm5, %xmm5
+ divps %xmm5,%xmm5
+
+// CHECK: divss %xmm5, %xmm5
+ divss %xmm5,%xmm5
+
+// CHECK: ldmxcsr 3735928559(%ebx,%ecx,8)
+ ldmxcsr 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: maskmovq %mm3, %mm3
+ maskmovq %mm3,%mm3
+
+// CHECK: maxps %xmm5, %xmm5
+ maxps %xmm5,%xmm5
+
+// CHECK: maxss %xmm5, %xmm5
+ maxss %xmm5,%xmm5
+
+// CHECK: minps %xmm5, %xmm5
+ minps %xmm5,%xmm5
+
+// CHECK: minss %xmm5, %xmm5
+ minss %xmm5,%xmm5
+
+// CHECK: movaps 3735928559(%ebx,%ecx,8), %xmm5
+ movaps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movaps %xmm5, %xmm5
+ movaps %xmm5,%xmm5
+
+// CHECK: movaps %xmm5, 3735928559(%ebx,%ecx,8)
+ movaps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movaps %xmm5, %xmm5
+ movaps %xmm5,%xmm5
+
+// CHECK: movhlps %xmm5, %xmm5
+ movhlps %xmm5,%xmm5
+
+// CHECK: movhps %xmm5, 3735928559(%ebx,%ecx,8)
+ movhps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movlhps %xmm5, %xmm5
+ movlhps %xmm5,%xmm5
+
+// CHECK: movlps %xmm5, 3735928559(%ebx,%ecx,8)
+ movlps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movmskps %xmm5, %ecx
+ movmskps %xmm5,%ecx
+
+// CHECK: movntps %xmm5, 3735928559(%ebx,%ecx,8)
+ movntps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movntq %mm3, 3735928559(%ebx,%ecx,8)
+ movntq %mm3,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movntdq %xmm5, 3735928559(%ebx,%ecx,8)
+ movntdq %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movss 3735928559(%ebx,%ecx,8), %xmm5
+ movss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movss %xmm5, %xmm5
+ movss %xmm5,%xmm5
+
+// CHECK: movss %xmm5, 3735928559(%ebx,%ecx,8)
+ movss %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movss %xmm5, %xmm5
+ movss %xmm5,%xmm5
+
+// CHECK: movups 3735928559(%ebx,%ecx,8), %xmm5
+ movups 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movups %xmm5, %xmm5
+ movups %xmm5,%xmm5
+
+// CHECK: movups %xmm5, 3735928559(%ebx,%ecx,8)
+ movups %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movups %xmm5, %xmm5
+ movups %xmm5,%xmm5
+
+// CHECK: mulps %xmm5, %xmm5
+ mulps %xmm5,%xmm5
+
+// CHECK: mulss %xmm5, %xmm5
+ mulss %xmm5,%xmm5
+
+// CHECK: orps %xmm5, %xmm5
+ orps %xmm5,%xmm5
+
+// CHECK: pavgb %mm3, %mm3
+ pavgb %mm3,%mm3
+
+// CHECK: pavgb %xmm5, %xmm5
+ pavgb %xmm5,%xmm5
+
+// CHECK: pavgw %mm3, %mm3
+ pavgw %mm3,%mm3
+
+// CHECK: pavgw %xmm5, %xmm5
+ pavgw %xmm5,%xmm5
+
+// CHECK: pmaxsw %mm3, %mm3
+ pmaxsw %mm3,%mm3
+
+// CHECK: pmaxsw %xmm5, %xmm5
+ pmaxsw %xmm5,%xmm5
+
+// CHECK: pmaxub %mm3, %mm3
+ pmaxub %mm3,%mm3
+
+// CHECK: pmaxub %xmm5, %xmm5
+ pmaxub %xmm5,%xmm5
+
+// CHECK: pminsw %mm3, %mm3
+ pminsw %mm3,%mm3
+
+// CHECK: pminsw %xmm5, %xmm5
+ pminsw %xmm5,%xmm5
+
+// CHECK: pminub %mm3, %mm3
+ pminub %mm3,%mm3
+
+// CHECK: pminub %xmm5, %xmm5
+ pminub %xmm5,%xmm5
+
+// CHECK: pmovmskb %mm3, %ecx
+ pmovmskb %mm3,%ecx
+
+// CHECK: pmovmskb %xmm5, %ecx
+ pmovmskb %xmm5,%ecx
+
+// CHECK: pmulhuw %mm3, %mm3
+ pmulhuw %mm3,%mm3
+
+// CHECK: pmulhuw %xmm5, %xmm5
+ pmulhuw %xmm5,%xmm5
+
+// CHECK: prefetchnta 3735928559(%ebx,%ecx,8)
+ prefetchnta 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: prefetcht0 3735928559(%ebx,%ecx,8)
+ prefetcht0 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: prefetcht1 3735928559(%ebx,%ecx,8)
+ prefetcht1 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: prefetcht2 3735928559(%ebx,%ecx,8)
+ prefetcht2 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: psadbw %mm3, %mm3
+ psadbw %mm3,%mm3
+
+// CHECK: psadbw %xmm5, %xmm5
+ psadbw %xmm5,%xmm5
+
+// CHECK: rcpps 3735928559(%ebx,%ecx,8), %xmm5
+ rcpps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: rcpps %xmm5, %xmm5
+ rcpps %xmm5,%xmm5
+
+// CHECK: rcpss 3735928559(%ebx,%ecx,8), %xmm5
+ rcpss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: rcpss %xmm5, %xmm5
+ rcpss %xmm5,%xmm5
+
+// CHECK: rsqrtps 3735928559(%ebx,%ecx,8), %xmm5
+ rsqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: rsqrtps %xmm5, %xmm5
+ rsqrtps %xmm5,%xmm5
+
+// CHECK: rsqrtss 3735928559(%ebx,%ecx,8), %xmm5
+ rsqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: rsqrtss %xmm5, %xmm5
+ rsqrtss %xmm5,%xmm5
+
+// CHECK: sqrtps 3735928559(%ebx,%ecx,8), %xmm5
+ sqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: sqrtps %xmm5, %xmm5
+ sqrtps %xmm5,%xmm5
+
+// CHECK: sqrtss 3735928559(%ebx,%ecx,8), %xmm5
+ sqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: sqrtss %xmm5, %xmm5
+ sqrtss %xmm5,%xmm5
+
+// CHECK: stmxcsr 3735928559(%ebx,%ecx,8)
+ stmxcsr 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subps %xmm5, %xmm5
+ subps %xmm5,%xmm5
+
+// CHECK: subss %xmm5, %xmm5
+ subss %xmm5,%xmm5
+
+// CHECK: ucomiss 3735928559(%ebx,%ecx,8), %xmm5
+ ucomiss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: ucomiss %xmm5, %xmm5
+ ucomiss %xmm5,%xmm5
+
+// CHECK: unpckhps %xmm5, %xmm5
+ unpckhps %xmm5,%xmm5
+
+// CHECK: unpcklps %xmm5, %xmm5
+ unpcklps %xmm5,%xmm5
+
+// CHECK: xorps %xmm5, %xmm5
+ xorps %xmm5,%xmm5
+
+// CHECK: addpd %xmm5, %xmm5
+ addpd %xmm5,%xmm5
+
+// CHECK: addsd %xmm5, %xmm5
+ addsd %xmm5,%xmm5
+
+// CHECK: andnpd %xmm5, %xmm5
+ andnpd %xmm5,%xmm5
+
+// CHECK: andpd %xmm5, %xmm5
+ andpd %xmm5,%xmm5
+
+// CHECK: comisd 3735928559(%ebx,%ecx,8), %xmm5
+ comisd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: comisd %xmm5, %xmm5
+ comisd %xmm5,%xmm5
+
+// CHECK: cvtpi2pd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtpi2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtpi2pd %mm3, %xmm5
+ cvtpi2pd %mm3,%xmm5
+
+// CHECK: cvtsi2sd %ecx, %xmm5
+ cvtsi2sd %ecx,%xmm5
+
+// CHECK: cvtsi2sd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtsi2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: divpd %xmm5, %xmm5
+ divpd %xmm5,%xmm5
+
+// CHECK: divsd %xmm5, %xmm5
+ divsd %xmm5,%xmm5
+
+// CHECK: maxpd %xmm5, %xmm5
+ maxpd %xmm5,%xmm5
+
+// CHECK: maxsd %xmm5, %xmm5
+ maxsd %xmm5,%xmm5
+
+// CHECK: minpd %xmm5, %xmm5
+ minpd %xmm5,%xmm5
+
+// CHECK: minsd %xmm5, %xmm5
+ minsd %xmm5,%xmm5
+
+// CHECK: movapd 3735928559(%ebx,%ecx,8), %xmm5
+ movapd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movapd %xmm5, %xmm5
+ movapd %xmm5,%xmm5
+
+// CHECK: movapd %xmm5, 3735928559(%ebx,%ecx,8)
+ movapd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movapd %xmm5, %xmm5
+ movapd %xmm5,%xmm5
+
+// CHECK: movhpd %xmm5, 3735928559(%ebx,%ecx,8)
+ movhpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movlpd %xmm5, 3735928559(%ebx,%ecx,8)
+ movlpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movmskpd %xmm5, %ecx
+ movmskpd %xmm5,%ecx
+
+// CHECK: movntpd %xmm5, 3735928559(%ebx,%ecx,8)
+ movntpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movsd 3735928559(%ebx,%ecx,8), %xmm5
+ movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movsd %xmm5, %xmm5
+ movsd %xmm5,%xmm5
+
+// CHECK: movsd %xmm5, 3735928559(%ebx,%ecx,8)
+ movsd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movsd %xmm5, %xmm5
+ movsd %xmm5,%xmm5
+
+// CHECK: movupd 3735928559(%ebx,%ecx,8), %xmm5
+ movupd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movupd %xmm5, %xmm5
+ movupd %xmm5,%xmm5
+
+// CHECK: movupd %xmm5, 3735928559(%ebx,%ecx,8)
+ movupd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movupd %xmm5, %xmm5
+ movupd %xmm5,%xmm5
+
+// CHECK: mulpd %xmm5, %xmm5
+ mulpd %xmm5,%xmm5
+
+// CHECK: mulsd %xmm5, %xmm5
+ mulsd %xmm5,%xmm5
+
+// CHECK: orpd %xmm5, %xmm5
+ orpd %xmm5,%xmm5
+
+// CHECK: sqrtpd 3735928559(%ebx,%ecx,8), %xmm5
+ sqrtpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: sqrtpd %xmm5, %xmm5
+ sqrtpd %xmm5,%xmm5
+
+// CHECK: sqrtsd 3735928559(%ebx,%ecx,8), %xmm5
+ sqrtsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: sqrtsd %xmm5, %xmm5
+ sqrtsd %xmm5,%xmm5
+
+// CHECK: subpd %xmm5, %xmm5
+ subpd %xmm5,%xmm5
+
+// CHECK: subsd %xmm5, %xmm5
+ subsd %xmm5,%xmm5
+
+// CHECK: ucomisd 3735928559(%ebx,%ecx,8), %xmm5
+ ucomisd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: ucomisd %xmm5, %xmm5
+ ucomisd %xmm5,%xmm5
+
+// CHECK: unpckhpd %xmm5, %xmm5
+ unpckhpd %xmm5,%xmm5
+
+// CHECK: unpcklpd %xmm5, %xmm5
+ unpcklpd %xmm5,%xmm5
+
+// CHECK: xorpd %xmm5, %xmm5
+ xorpd %xmm5,%xmm5
+
+// CHECK: cvtdq2pd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtdq2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtdq2pd %xmm5, %xmm5
+ cvtdq2pd %xmm5,%xmm5
+
+// CHECK: cvtpd2dq 3735928559(%ebx,%ecx,8), %xmm5
+ cvtpd2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtpd2dq %xmm5, %xmm5
+ cvtpd2dq %xmm5,%xmm5
+
+// CHECK: cvtdq2ps 3735928559(%ebx,%ecx,8), %xmm5
+ cvtdq2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtdq2ps %xmm5, %xmm5
+ cvtdq2ps %xmm5,%xmm5
+
+// CHECK: cvtpd2pi 3735928559(%ebx,%ecx,8), %mm3
+ cvtpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: cvtpd2pi %xmm5, %mm3
+ cvtpd2pi %xmm5,%mm3
+
+// CHECK: cvtps2dq 3735928559(%ebx,%ecx,8), %xmm5
+ cvtps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtps2dq %xmm5, %xmm5
+ cvtps2dq %xmm5,%xmm5
+
+// CHECK: cvtsd2ss 3735928559(%ebx,%ecx,8), %xmm5
+ cvtsd2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtsd2ss %xmm5, %xmm5
+ cvtsd2ss %xmm5,%xmm5
+
+// CHECK: cvtss2sd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtss2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtss2sd %xmm5, %xmm5
+ cvtss2sd %xmm5,%xmm5
+
+// CHECK: cvttpd2pi 3735928559(%ebx,%ecx,8), %mm3
+ cvttpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: cvttpd2pi %xmm5, %mm3
+ cvttpd2pi %xmm5,%mm3
+
+// CHECK: cvttsd2si 3735928559(%ebx,%ecx,8), %ecx
+ cvttsd2si 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: cvttsd2si %xmm5, %ecx
+ cvttsd2si %xmm5,%ecx
+
+// CHECK: maskmovdqu %xmm5, %xmm5
+ maskmovdqu %xmm5,%xmm5
+
+// CHECK: movdqa 3735928559(%ebx,%ecx,8), %xmm5
+ movdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movdqa %xmm5, %xmm5
+ movdqa %xmm5,%xmm5
+
+// CHECK: movdqa %xmm5, 3735928559(%ebx,%ecx,8)
+ movdqa %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movdqa %xmm5, %xmm5
+ movdqa %xmm5,%xmm5
+
+// CHECK: movdqu 3735928559(%ebx,%ecx,8), %xmm5
+ movdqu 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movdqu %xmm5, 3735928559(%ebx,%ecx,8)
+ movdqu %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movdq2q %xmm5, %mm3
+ movdq2q %xmm5,%mm3
+
+// CHECK: movq2dq %mm3, %xmm5
+ movq2dq %mm3,%xmm5
+
+// CHECK: pmuludq %mm3, %mm3
+ pmuludq %mm3,%mm3
+
+// CHECK: pmuludq %xmm5, %xmm5
+ pmuludq %xmm5,%xmm5
+
+// CHECK: pslldq $127, %xmm5
+ pslldq $0x7f,%xmm5
+
+// CHECK: psrldq $127, %xmm5
+ psrldq $0x7f,%xmm5
+
+// CHECK: punpckhqdq %xmm5, %xmm5
+ punpckhqdq %xmm5,%xmm5
+
+// CHECK: punpcklqdq %xmm5, %xmm5
+ punpcklqdq %xmm5,%xmm5
+
+// CHECK: addsubpd %xmm5, %xmm5
+ addsubpd %xmm5,%xmm5
+
+// CHECK: addsubps %xmm5, %xmm5
+ addsubps %xmm5,%xmm5
+
+// CHECK: haddpd %xmm5, %xmm5
+ haddpd %xmm5,%xmm5
+
+// CHECK: haddps %xmm5, %xmm5
+ haddps %xmm5,%xmm5
+
+// CHECK: hsubpd %xmm5, %xmm5
+ hsubpd %xmm5,%xmm5
+
+// CHECK: hsubps %xmm5, %xmm5
+ hsubps %xmm5,%xmm5
+
+// CHECK: lddqu 3735928559(%ebx,%ecx,8), %xmm5
+ lddqu 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movddup 3735928559(%ebx,%ecx,8), %xmm5
+ movddup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movddup %xmm5, %xmm5
+ movddup %xmm5,%xmm5
+
+// CHECK: movshdup 3735928559(%ebx,%ecx,8), %xmm5
+ movshdup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movshdup %xmm5, %xmm5
+ movshdup %xmm5,%xmm5
+
+// CHECK: movsldup 3735928559(%ebx,%ecx,8), %xmm5
+ movsldup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movsldup %xmm5, %xmm5
+ movsldup %xmm5,%xmm5
+
+// CHECK: phaddw %mm3, %mm3
+ phaddw %mm3,%mm3
+
+// CHECK: phaddw %xmm5, %xmm5
+ phaddw %xmm5,%xmm5
+
+// CHECK: phaddd %mm3, %mm3
+ phaddd %mm3,%mm3
+
+// CHECK: phaddd %xmm5, %xmm5
+ phaddd %xmm5,%xmm5
+
+// CHECK: phaddsw %mm3, %mm3
+ phaddsw %mm3,%mm3
+
+// CHECK: phaddsw %xmm5, %xmm5
+ phaddsw %xmm5,%xmm5
+
+// CHECK: phsubw %mm3, %mm3
+ phsubw %mm3,%mm3
+
+// CHECK: phsubw %xmm5, %xmm5
+ phsubw %xmm5,%xmm5
+
+// CHECK: phsubd %mm3, %mm3
+ phsubd %mm3,%mm3
+
+// CHECK: phsubd %xmm5, %xmm5
+ phsubd %xmm5,%xmm5
+
+// CHECK: phsubsw %mm3, %mm3
+ phsubsw %mm3,%mm3
+
+// CHECK: phsubsw %xmm5, %xmm5
+ phsubsw %xmm5,%xmm5
+
+// CHECK: pmaddubsw %mm3, %mm3
+ pmaddubsw %mm3,%mm3
+
+// CHECK: pmaddubsw %xmm5, %xmm5
+ pmaddubsw %xmm5,%xmm5
+
+// CHECK: pmulhrsw %mm3, %mm3
+ pmulhrsw %mm3,%mm3
+
+// CHECK: pmulhrsw %xmm5, %xmm5
+ pmulhrsw %xmm5,%xmm5
+
+// CHECK: pshufb %mm3, %mm3
+ pshufb %mm3,%mm3
+
+// CHECK: pshufb %xmm5, %xmm5
+ pshufb %xmm5,%xmm5
+
+// CHECK: psignb %mm3, %mm3
+ psignb %mm3,%mm3
+
+// CHECK: psignb %xmm5, %xmm5
+ psignb %xmm5,%xmm5
+
+// CHECK: psignw %mm3, %mm3
+ psignw %mm3,%mm3
+
+// CHECK: psignw %xmm5, %xmm5
+ psignw %xmm5,%xmm5
+
+// CHECK: psignd %mm3, %mm3
+ psignd %mm3,%mm3
+
+// CHECK: psignd %xmm5, %xmm5
+ psignd %xmm5,%xmm5
+
+// CHECK: pabsb 3735928559(%ebx,%ecx,8), %mm3
+ pabsb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pabsb %mm3, %mm3
+ pabsb %mm3,%mm3
+
+// CHECK: pabsb 3735928559(%ebx,%ecx,8), %xmm5
+ pabsb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pabsb %xmm5, %xmm5
+ pabsb %xmm5,%xmm5
+
+// CHECK: pabsw 3735928559(%ebx,%ecx,8), %mm3
+ pabsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pabsw %mm3, %mm3
+ pabsw %mm3,%mm3
+
+// CHECK: pabsw 3735928559(%ebx,%ecx,8), %xmm5
+ pabsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pabsw %xmm5, %xmm5
+ pabsw %xmm5,%xmm5
+
+// CHECK: pabsd 3735928559(%ebx,%ecx,8), %mm3
+ pabsd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pabsd %mm3, %mm3
+ pabsd %mm3,%mm3
+
+// CHECK: pabsd 3735928559(%ebx,%ecx,8), %xmm5
+ pabsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pabsd %xmm5, %xmm5
+ pabsd %xmm5,%xmm5
+
+// CHECK: femms
+ femms
+
+// CHECK: packusdw %xmm5, %xmm5
+ packusdw %xmm5,%xmm5
+
+// CHECK: pcmpeqq %xmm5, %xmm5
+ pcmpeqq %xmm5,%xmm5
+
+// CHECK: phminposuw 3735928559(%ebx,%ecx,8), %xmm5
+ phminposuw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: phminposuw %xmm5, %xmm5
+ phminposuw %xmm5,%xmm5
+
+// CHECK: pmaxsb %xmm5, %xmm5
+ pmaxsb %xmm5,%xmm5
+
+// CHECK: pmaxsd %xmm5, %xmm5
+ pmaxsd %xmm5,%xmm5
+
+// CHECK: pmaxud %xmm5, %xmm5
+ pmaxud %xmm5,%xmm5
+
+// CHECK: pmaxuw %xmm5, %xmm5
+ pmaxuw %xmm5,%xmm5
+
+// CHECK: pminsb %xmm5, %xmm5
+ pminsb %xmm5,%xmm5
+
+// CHECK: pminsd %xmm5, %xmm5
+ pminsd %xmm5,%xmm5
+
+// CHECK: pminud %xmm5, %xmm5
+ pminud %xmm5,%xmm5
+
+// CHECK: pminuw %xmm5, %xmm5
+ pminuw %xmm5,%xmm5
+
+// CHECK: pmovsxbw 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxbw %xmm5, %xmm5
+ pmovsxbw %xmm5,%xmm5
+
+// CHECK: pmovsxbd 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxbd %xmm5, %xmm5
+ pmovsxbd %xmm5,%xmm5
+
+// CHECK: pmovsxbq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxbq %xmm5, %xmm5
+ pmovsxbq %xmm5,%xmm5
+
+// CHECK: pmovsxwd 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxwd %xmm5, %xmm5
+ pmovsxwd %xmm5,%xmm5
+
+// CHECK: pmovsxwq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxwq %xmm5, %xmm5
+ pmovsxwq %xmm5,%xmm5
+
+// CHECK: pmovsxdq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxdq %xmm5, %xmm5
+ pmovsxdq %xmm5,%xmm5
+
+// CHECK: pmovzxbw 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxbw %xmm5, %xmm5
+ pmovzxbw %xmm5,%xmm5
+
+// CHECK: pmovzxbd 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxbd %xmm5, %xmm5
+ pmovzxbd %xmm5,%xmm5
+
+// CHECK: pmovzxbq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxbq %xmm5, %xmm5
+ pmovzxbq %xmm5,%xmm5
+
+// CHECK: pmovzxwd 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxwd %xmm5, %xmm5
+ pmovzxwd %xmm5,%xmm5
+
+// CHECK: pmovzxwq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxwq %xmm5, %xmm5
+ pmovzxwq %xmm5,%xmm5
+
+// CHECK: pmovzxdq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxdq %xmm5, %xmm5
+ pmovzxdq %xmm5,%xmm5
+
+// CHECK: pmuldq %xmm5, %xmm5
+ pmuldq %xmm5,%xmm5
+
+// CHECK: pmulld %xmm5, %xmm5
+ pmulld %xmm5,%xmm5
+
+// CHECK: ptest 3735928559(%ebx,%ecx,8), %xmm5
+ ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: ptest %xmm5, %xmm5
+ ptest %xmm5,%xmm5
+
+// CHECK: pcmpgtq %xmm5, %xmm5
+ pcmpgtq %xmm5,%xmm5
diff --git a/test/MC/AsmParser/X86/x86_32-bit_cat.s b/test/MC/AsmParser/X86/x86_32-bit_cat.s
new file mode 100644
index 0000000..f610b13
--- /dev/null
+++ b/test/MC/AsmParser/X86/x86_32-bit_cat.s
@@ -0,0 +1,7653 @@
+// This is the current set of tests that can pass though llvm-mc as it were a
+// logical cat(1) and then reassemble to the same instruction. All of these
+// will not yet encode correctly. The subset that will encode correctly are in
+// the file x86_32-bit.s .
+
+// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+// CHECK: movb $127, 3735928559(%ebx,%ecx,8)
+ movb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movb $127, 69
+ movb $0x7f,0x45
+
+// CHECK: movb $127, 32493
+ movb $0x7f,0x7eed
+
+// CHECK: movb $127, 3133065982
+ movb $0x7f,0xbabecafe
+
+// CHECK: movb $127, 305419896
+ movb $0x7f,0x12345678
+
+// CHECK: movw $31438, 3735928559(%ebx,%ecx,8)
+ movw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movw $31438, 69
+ movw $0x7ace,0x45
+
+// CHECK: movw $31438, 32493
+ movw $0x7ace,0x7eed
+
+// CHECK: movw $31438, 3133065982
+ movw $0x7ace,0xbabecafe
+
+// CHECK: movw $31438, 305419896
+ movw $0x7ace,0x12345678
+
+// CHECK: movl $2063514302, 3735928559(%ebx,%ecx,8)
+ movl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movl $2063514302, 69
+ movl $0x7afebabe,0x45
+
+// CHECK: movl $2063514302, 32493
+ movl $0x7afebabe,0x7eed
+
+// CHECK: movl $2063514302, 3133065982
+ movl $0x7afebabe,0xbabecafe
+
+// CHECK: movl $2063514302, 305419896
+ movl $0x7afebabe,0x12345678
+
+// CHECK: movl $324478056, 3735928559(%ebx,%ecx,8)
+ movl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movl $324478056, 69
+ movl $0x13572468,0x45
+
+// CHECK: movl $324478056, 32493
+ movl $0x13572468,0x7eed
+
+// CHECK: movl $324478056, 3133065982
+ movl $0x13572468,0xbabecafe
+
+// CHECK: movl $324478056, 305419896
+ movl $0x13572468,0x12345678
+
+// CHECK: movsbl 3735928559(%ebx,%ecx,8), %ecx
+ movsbl 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: movsbl 69, %ecx
+ movsbl 0x45,%ecx
+
+// CHECK: movsbl 32493, %ecx
+ movsbl 0x7eed,%ecx
+
+// CHECK: movsbl 3133065982, %ecx
+ movsbl 0xbabecafe,%ecx
+
+// CHECK: movsbl 305419896, %ecx
+ movsbl 0x12345678,%ecx
+
+// CHECK: movsbw 3735928559(%ebx,%ecx,8), %bx
+ movsbw 0xdeadbeef(%ebx,%ecx,8),%bx
+
+// CHECK: movsbw 69, %bx
+ movsbw 0x45,%bx
+
+// CHECK: movsbw 32493, %bx
+ movsbw 0x7eed,%bx
+
+// CHECK: movsbw 3133065982, %bx
+ movsbw 0xbabecafe,%bx
+
+// CHECK: movsbw 305419896, %bx
+ movsbw 0x12345678,%bx
+
+// CHECK: movswl 3735928559(%ebx,%ecx,8), %ecx
+ movswl 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: movswl 69, %ecx
+ movswl 0x45,%ecx
+
+// CHECK: movswl 32493, %ecx
+ movswl 0x7eed,%ecx
+
+// CHECK: movswl 3133065982, %ecx
+ movswl 0xbabecafe,%ecx
+
+// CHECK: movswl 305419896, %ecx
+ movswl 0x12345678,%ecx
+
+// CHECK: movzbl 3735928559(%ebx,%ecx,8), %ecx # NOREX
+ movzbl 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: movzbl 69, %ecx # NOREX
+ movzbl 0x45,%ecx
+
+// CHECK: movzbl 32493, %ecx # NOREX
+ movzbl 0x7eed,%ecx
+
+// CHECK: movzbl 3133065982, %ecx # NOREX
+ movzbl 0xbabecafe,%ecx
+
+// CHECK: movzbl 305419896, %ecx # NOREX
+ movzbl 0x12345678,%ecx
+
+// CHECK: movzbw 3735928559(%ebx,%ecx,8), %bx
+ movzbw 0xdeadbeef(%ebx,%ecx,8),%bx
+
+// CHECK: movzbw 69, %bx
+ movzbw 0x45,%bx
+
+// CHECK: movzbw 32493, %bx
+ movzbw 0x7eed,%bx
+
+// CHECK: movzbw 3133065982, %bx
+ movzbw 0xbabecafe,%bx
+
+// CHECK: movzbw 305419896, %bx
+ movzbw 0x12345678,%bx
+
+// CHECK: movzwl 3735928559(%ebx,%ecx,8), %ecx
+ movzwl 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: movzwl 69, %ecx
+ movzwl 0x45,%ecx
+
+// CHECK: movzwl 32493, %ecx
+ movzwl 0x7eed,%ecx
+
+// CHECK: movzwl 3133065982, %ecx
+ movzwl 0xbabecafe,%ecx
+
+// CHECK: movzwl 305419896, %ecx
+ movzwl 0x12345678,%ecx
+
+// CHECK: pushw 32493
+ pushw 0x7eed
+
+// CHECK: popw 32493
+ popw 0x7eed
+
+// CHECK: clc
+ clc
+
+// CHECK: cld
+ cld
+
+// CHECK: cli
+ cli
+
+// CHECK: clts
+ clts
+
+// CHECK: cmc
+ cmc
+
+// CHECK: lahf
+ lahf
+
+// CHECK: sahf
+ sahf
+
+// CHECK: stc
+ stc
+
+// CHECK: std
+ std
+
+// CHECK: sti
+ sti
+
+// CHECK: addb $254, 3735928559(%ebx,%ecx,8)
+ addb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addb $254, 69
+ addb $0xfe,0x45
+
+// CHECK: addb $254, 32493
+ addb $0xfe,0x7eed
+
+// CHECK: addb $254, 3133065982
+ addb $0xfe,0xbabecafe
+
+// CHECK: addb $254, 305419896
+ addb $0xfe,0x12345678
+
+// CHECK: addb $127, 3735928559(%ebx,%ecx,8)
+ addb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addb $127, 69
+ addb $0x7f,0x45
+
+// CHECK: addb $127, 32493
+ addb $0x7f,0x7eed
+
+// CHECK: addb $127, 3133065982
+ addb $0x7f,0xbabecafe
+
+// CHECK: addb $127, 305419896
+ addb $0x7f,0x12345678
+
+// CHECK: addw $31438, 3735928559(%ebx,%ecx,8)
+ addw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addw $31438, 69
+ addw $0x7ace,0x45
+
+// CHECK: addw $31438, 32493
+ addw $0x7ace,0x7eed
+
+// CHECK: addw $31438, 3133065982
+ addw $0x7ace,0xbabecafe
+
+// CHECK: addw $31438, 305419896
+ addw $0x7ace,0x12345678
+
+// CHECK: addl $2063514302, 3735928559(%ebx,%ecx,8)
+ addl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addl $2063514302, 69
+ addl $0x7afebabe,0x45
+
+// CHECK: addl $2063514302, 32493
+ addl $0x7afebabe,0x7eed
+
+// CHECK: addl $2063514302, 3133065982
+ addl $0x7afebabe,0xbabecafe
+
+// CHECK: addl $2063514302, 305419896
+ addl $0x7afebabe,0x12345678
+
+// CHECK: addl $324478056, 3735928559(%ebx,%ecx,8)
+ addl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: addl $324478056, 69
+ addl $0x13572468,0x45
+
+// CHECK: addl $324478056, 32493
+ addl $0x13572468,0x7eed
+
+// CHECK: addl $324478056, 3133065982
+ addl $0x13572468,0xbabecafe
+
+// CHECK: addl $324478056, 305419896
+ addl $0x13572468,0x12345678
+
+// CHECK: incl 3735928559(%ebx,%ecx,8)
+ incl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: incw 32493
+ incw 0x7eed
+
+// CHECK: incl 3133065982
+ incl 0xbabecafe
+
+// CHECK: incl 305419896
+ incl 0x12345678
+
+// CHECK: subb $254, 3735928559(%ebx,%ecx,8)
+ subb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subb $254, 69
+ subb $0xfe,0x45
+
+// CHECK: subb $254, 32493
+ subb $0xfe,0x7eed
+
+// CHECK: subb $254, 3133065982
+ subb $0xfe,0xbabecafe
+
+// CHECK: subb $254, 305419896
+ subb $0xfe,0x12345678
+
+// CHECK: subb $127, 3735928559(%ebx,%ecx,8)
+ subb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subb $127, 69
+ subb $0x7f,0x45
+
+// CHECK: subb $127, 32493
+ subb $0x7f,0x7eed
+
+// CHECK: subb $127, 3133065982
+ subb $0x7f,0xbabecafe
+
+// CHECK: subb $127, 305419896
+ subb $0x7f,0x12345678
+
+// CHECK: subw $31438, 3735928559(%ebx,%ecx,8)
+ subw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subw $31438, 69
+ subw $0x7ace,0x45
+
+// CHECK: subw $31438, 32493
+ subw $0x7ace,0x7eed
+
+// CHECK: subw $31438, 3133065982
+ subw $0x7ace,0xbabecafe
+
+// CHECK: subw $31438, 305419896
+ subw $0x7ace,0x12345678
+
+// CHECK: subl $2063514302, 3735928559(%ebx,%ecx,8)
+ subl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subl $2063514302, 69
+ subl $0x7afebabe,0x45
+
+// CHECK: subl $2063514302, 32493
+ subl $0x7afebabe,0x7eed
+
+// CHECK: subl $2063514302, 3133065982
+ subl $0x7afebabe,0xbabecafe
+
+// CHECK: subl $2063514302, 305419896
+ subl $0x7afebabe,0x12345678
+
+// CHECK: subl $324478056, 3735928559(%ebx,%ecx,8)
+ subl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: subl $324478056, 69
+ subl $0x13572468,0x45
+
+// CHECK: subl $324478056, 32493
+ subl $0x13572468,0x7eed
+
+// CHECK: subl $324478056, 3133065982
+ subl $0x13572468,0xbabecafe
+
+// CHECK: subl $324478056, 305419896
+ subl $0x13572468,0x12345678
+
+// CHECK: decl 3735928559(%ebx,%ecx,8)
+ decl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: decw 32493
+ decw 0x7eed
+
+// CHECK: decl 3133065982
+ decl 0xbabecafe
+
+// CHECK: decl 305419896
+ decl 0x12345678
+
+// CHECK: sbbb $254, 3735928559(%ebx,%ecx,8)
+ sbbb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sbbb $254, 69
+ sbbb $0xfe,0x45
+
+// CHECK: sbbb $254, 32493
+ sbbb $0xfe,0x7eed
+
+// CHECK: sbbb $254, 3133065982
+ sbbb $0xfe,0xbabecafe
+
+// CHECK: sbbb $254, 305419896
+ sbbb $0xfe,0x12345678
+
+// CHECK: sbbb $127, 3735928559(%ebx,%ecx,8)
+ sbbb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sbbb $127, 69
+ sbbb $0x7f,0x45
+
+// CHECK: sbbb $127, 32493
+ sbbb $0x7f,0x7eed
+
+// CHECK: sbbb $127, 3133065982
+ sbbb $0x7f,0xbabecafe
+
+// CHECK: sbbb $127, 305419896
+ sbbb $0x7f,0x12345678
+
+// CHECK: sbbw $31438, 3735928559(%ebx,%ecx,8)
+ sbbw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sbbw $31438, 69
+ sbbw $0x7ace,0x45
+
+// CHECK: sbbw $31438, 32493
+ sbbw $0x7ace,0x7eed
+
+// CHECK: sbbw $31438, 3133065982
+ sbbw $0x7ace,0xbabecafe
+
+// CHECK: sbbw $31438, 305419896
+ sbbw $0x7ace,0x12345678
+
+// CHECK: sbbl $2063514302, 3735928559(%ebx,%ecx,8)
+ sbbl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sbbl $2063514302, 69
+ sbbl $0x7afebabe,0x45
+
+// CHECK: sbbl $2063514302, 32493
+ sbbl $0x7afebabe,0x7eed
+
+// CHECK: sbbl $2063514302, 3133065982
+ sbbl $0x7afebabe,0xbabecafe
+
+// CHECK: sbbl $2063514302, 305419896
+ sbbl $0x7afebabe,0x12345678
+
+// CHECK: sbbl $324478056, 3735928559(%ebx,%ecx,8)
+ sbbl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sbbl $324478056, 69
+ sbbl $0x13572468,0x45
+
+// CHECK: sbbl $324478056, 32493
+ sbbl $0x13572468,0x7eed
+
+// CHECK: sbbl $324478056, 3133065982
+ sbbl $0x13572468,0xbabecafe
+
+// CHECK: sbbl $324478056, 305419896
+ sbbl $0x13572468,0x12345678
+
+// CHECK: cmpb $254, 3735928559(%ebx,%ecx,8)
+ cmpb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpb $254, 69
+ cmpb $0xfe,0x45
+
+// CHECK: cmpb $254, 32493
+ cmpb $0xfe,0x7eed
+
+// CHECK: cmpb $254, 3133065982
+ cmpb $0xfe,0xbabecafe
+
+// CHECK: cmpb $254, 305419896
+ cmpb $0xfe,0x12345678
+
+// CHECK: cmpb $127, 3735928559(%ebx,%ecx,8)
+ cmpb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpb $127, 69
+ cmpb $0x7f,0x45
+
+// CHECK: cmpb $127, 32493
+ cmpb $0x7f,0x7eed
+
+// CHECK: cmpb $127, 3133065982
+ cmpb $0x7f,0xbabecafe
+
+// CHECK: cmpb $127, 305419896
+ cmpb $0x7f,0x12345678
+
+// CHECK: cmpw $31438, 3735928559(%ebx,%ecx,8)
+ cmpw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpw $31438, 69
+ cmpw $0x7ace,0x45
+
+// CHECK: cmpw $31438, 32493
+ cmpw $0x7ace,0x7eed
+
+// CHECK: cmpw $31438, 3133065982
+ cmpw $0x7ace,0xbabecafe
+
+// CHECK: cmpw $31438, 305419896
+ cmpw $0x7ace,0x12345678
+
+// CHECK: cmpl $2063514302, 3735928559(%ebx,%ecx,8)
+ cmpl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpl $2063514302, 69
+ cmpl $0x7afebabe,0x45
+
+// CHECK: cmpl $2063514302, 32493
+ cmpl $0x7afebabe,0x7eed
+
+// CHECK: cmpl $2063514302, 3133065982
+ cmpl $0x7afebabe,0xbabecafe
+
+// CHECK: cmpl $2063514302, 305419896
+ cmpl $0x7afebabe,0x12345678
+
+// CHECK: cmpl $324478056, 3735928559(%ebx,%ecx,8)
+ cmpl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpl $324478056, 69
+ cmpl $0x13572468,0x45
+
+// CHECK: cmpl $324478056, 32493
+ cmpl $0x13572468,0x7eed
+
+// CHECK: cmpl $324478056, 3133065982
+ cmpl $0x13572468,0xbabecafe
+
+// CHECK: cmpl $324478056, 305419896
+ cmpl $0x13572468,0x12345678
+
+// CHECK: testb $127, 3735928559(%ebx,%ecx,8)
+ testb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: testb $127, 69
+ testb $0x7f,0x45
+
+// CHECK: testb $127, 32493
+ testb $0x7f,0x7eed
+
+// CHECK: testb $127, 3133065982
+ testb $0x7f,0xbabecafe
+
+// CHECK: testb $127, 305419896
+ testb $0x7f,0x12345678
+
+// CHECK: testw $31438, 3735928559(%ebx,%ecx,8)
+ testw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: testw $31438, 69
+ testw $0x7ace,0x45
+
+// CHECK: testw $31438, 32493
+ testw $0x7ace,0x7eed
+
+// CHECK: testw $31438, 3133065982
+ testw $0x7ace,0xbabecafe
+
+// CHECK: testw $31438, 305419896
+ testw $0x7ace,0x12345678
+
+// CHECK: testl $2063514302, 3735928559(%ebx,%ecx,8)
+ testl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: testl $2063514302, 69
+ testl $0x7afebabe,0x45
+
+// CHECK: testl $2063514302, 32493
+ testl $0x7afebabe,0x7eed
+
+// CHECK: testl $2063514302, 3133065982
+ testl $0x7afebabe,0xbabecafe
+
+// CHECK: testl $2063514302, 305419896
+ testl $0x7afebabe,0x12345678
+
+// CHECK: testl $324478056, 3735928559(%ebx,%ecx,8)
+ testl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: testl $324478056, 69
+ testl $0x13572468,0x45
+
+// CHECK: testl $324478056, 32493
+ testl $0x13572468,0x7eed
+
+// CHECK: testl $324478056, 3133065982
+ testl $0x13572468,0xbabecafe
+
+// CHECK: testl $324478056, 305419896
+ testl $0x13572468,0x12345678
+
+// CHECK: andb $254, 3735928559(%ebx,%ecx,8)
+ andb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andb $254, 69
+ andb $0xfe,0x45
+
+// CHECK: andb $254, 32493
+ andb $0xfe,0x7eed
+
+// CHECK: andb $254, 3133065982
+ andb $0xfe,0xbabecafe
+
+// CHECK: andb $254, 305419896
+ andb $0xfe,0x12345678
+
+// CHECK: andb $127, 3735928559(%ebx,%ecx,8)
+ andb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andb $127, 69
+ andb $0x7f,0x45
+
+// CHECK: andb $127, 32493
+ andb $0x7f,0x7eed
+
+// CHECK: andb $127, 3133065982
+ andb $0x7f,0xbabecafe
+
+// CHECK: andb $127, 305419896
+ andb $0x7f,0x12345678
+
+// CHECK: andw $31438, 3735928559(%ebx,%ecx,8)
+ andw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andw $31438, 69
+ andw $0x7ace,0x45
+
+// CHECK: andw $31438, 32493
+ andw $0x7ace,0x7eed
+
+// CHECK: andw $31438, 3133065982
+ andw $0x7ace,0xbabecafe
+
+// CHECK: andw $31438, 305419896
+ andw $0x7ace,0x12345678
+
+// CHECK: andl $2063514302, 3735928559(%ebx,%ecx,8)
+ andl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andl $2063514302, 69
+ andl $0x7afebabe,0x45
+
+// CHECK: andl $2063514302, 32493
+ andl $0x7afebabe,0x7eed
+
+// CHECK: andl $2063514302, 3133065982
+ andl $0x7afebabe,0xbabecafe
+
+// CHECK: andl $2063514302, 305419896
+ andl $0x7afebabe,0x12345678
+
+// CHECK: andl $324478056, 3735928559(%ebx,%ecx,8)
+ andl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: andl $324478056, 69
+ andl $0x13572468,0x45
+
+// CHECK: andl $324478056, 32493
+ andl $0x13572468,0x7eed
+
+// CHECK: andl $324478056, 3133065982
+ andl $0x13572468,0xbabecafe
+
+// CHECK: andl $324478056, 305419896
+ andl $0x13572468,0x12345678
+
+// CHECK: orb $254, 3735928559(%ebx,%ecx,8)
+ orb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orb $254, 69
+ orb $0xfe,0x45
+
+// CHECK: orb $254, 32493
+ orb $0xfe,0x7eed
+
+// CHECK: orb $254, 3133065982
+ orb $0xfe,0xbabecafe
+
+// CHECK: orb $254, 305419896
+ orb $0xfe,0x12345678
+
+// CHECK: orb $127, 3735928559(%ebx,%ecx,8)
+ orb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orb $127, 69
+ orb $0x7f,0x45
+
+// CHECK: orb $127, 32493
+ orb $0x7f,0x7eed
+
+// CHECK: orb $127, 3133065982
+ orb $0x7f,0xbabecafe
+
+// CHECK: orb $127, 305419896
+ orb $0x7f,0x12345678
+
+// CHECK: orw $31438, 3735928559(%ebx,%ecx,8)
+ orw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orw $31438, 69
+ orw $0x7ace,0x45
+
+// CHECK: orw $31438, 32493
+ orw $0x7ace,0x7eed
+
+// CHECK: orw $31438, 3133065982
+ orw $0x7ace,0xbabecafe
+
+// CHECK: orw $31438, 305419896
+ orw $0x7ace,0x12345678
+
+// CHECK: orl $2063514302, 3735928559(%ebx,%ecx,8)
+ orl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orl $2063514302, 69
+ orl $0x7afebabe,0x45
+
+// CHECK: orl $2063514302, 32493
+ orl $0x7afebabe,0x7eed
+
+// CHECK: orl $2063514302, 3133065982
+ orl $0x7afebabe,0xbabecafe
+
+// CHECK: orl $2063514302, 305419896
+ orl $0x7afebabe,0x12345678
+
+// CHECK: orl $324478056, 3735928559(%ebx,%ecx,8)
+ orl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: orl $324478056, 69
+ orl $0x13572468,0x45
+
+// CHECK: orl $324478056, 32493
+ orl $0x13572468,0x7eed
+
+// CHECK: orl $324478056, 3133065982
+ orl $0x13572468,0xbabecafe
+
+// CHECK: orl $324478056, 305419896
+ orl $0x13572468,0x12345678
+
+// CHECK: xorb $254, 3735928559(%ebx,%ecx,8)
+ xorb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorb $254, 69
+ xorb $0xfe,0x45
+
+// CHECK: xorb $254, 32493
+ xorb $0xfe,0x7eed
+
+// CHECK: xorb $254, 3133065982
+ xorb $0xfe,0xbabecafe
+
+// CHECK: xorb $254, 305419896
+ xorb $0xfe,0x12345678
+
+// CHECK: xorb $127, 3735928559(%ebx,%ecx,8)
+ xorb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorb $127, 69
+ xorb $0x7f,0x45
+
+// CHECK: xorb $127, 32493
+ xorb $0x7f,0x7eed
+
+// CHECK: xorb $127, 3133065982
+ xorb $0x7f,0xbabecafe
+
+// CHECK: xorb $127, 305419896
+ xorb $0x7f,0x12345678
+
+// CHECK: xorw $31438, 3735928559(%ebx,%ecx,8)
+ xorw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorw $31438, 69
+ xorw $0x7ace,0x45
+
+// CHECK: xorw $31438, 32493
+ xorw $0x7ace,0x7eed
+
+// CHECK: xorw $31438, 3133065982
+ xorw $0x7ace,0xbabecafe
+
+// CHECK: xorw $31438, 305419896
+ xorw $0x7ace,0x12345678
+
+// CHECK: xorl $2063514302, 3735928559(%ebx,%ecx,8)
+ xorl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorl $2063514302, 69
+ xorl $0x7afebabe,0x45
+
+// CHECK: xorl $2063514302, 32493
+ xorl $0x7afebabe,0x7eed
+
+// CHECK: xorl $2063514302, 3133065982
+ xorl $0x7afebabe,0xbabecafe
+
+// CHECK: xorl $2063514302, 305419896
+ xorl $0x7afebabe,0x12345678
+
+// CHECK: xorl $324478056, 3735928559(%ebx,%ecx,8)
+ xorl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: xorl $324478056, 69
+ xorl $0x13572468,0x45
+
+// CHECK: xorl $324478056, 32493
+ xorl $0x13572468,0x7eed
+
+// CHECK: xorl $324478056, 3133065982
+ xorl $0x13572468,0xbabecafe
+
+// CHECK: xorl $324478056, 305419896
+ xorl $0x13572468,0x12345678
+
+// CHECK: adcb $254, 3735928559(%ebx,%ecx,8)
+ adcb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcb $254, 69
+ adcb $0xfe,0x45
+
+// CHECK: adcb $254, 32493
+ adcb $0xfe,0x7eed
+
+// CHECK: adcb $254, 3133065982
+ adcb $0xfe,0xbabecafe
+
+// CHECK: adcb $254, 305419896
+ adcb $0xfe,0x12345678
+
+// CHECK: adcb $127, 3735928559(%ebx,%ecx,8)
+ adcb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcb $127, 69
+ adcb $0x7f,0x45
+
+// CHECK: adcb $127, 32493
+ adcb $0x7f,0x7eed
+
+// CHECK: adcb $127, 3133065982
+ adcb $0x7f,0xbabecafe
+
+// CHECK: adcb $127, 305419896
+ adcb $0x7f,0x12345678
+
+// CHECK: adcw $31438, 3735928559(%ebx,%ecx,8)
+ adcw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcw $31438, 69
+ adcw $0x7ace,0x45
+
+// CHECK: adcw $31438, 32493
+ adcw $0x7ace,0x7eed
+
+// CHECK: adcw $31438, 3133065982
+ adcw $0x7ace,0xbabecafe
+
+// CHECK: adcw $31438, 305419896
+ adcw $0x7ace,0x12345678
+
+// CHECK: adcl $2063514302, 3735928559(%ebx,%ecx,8)
+ adcl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcl $2063514302, 69
+ adcl $0x7afebabe,0x45
+
+// CHECK: adcl $2063514302, 32493
+ adcl $0x7afebabe,0x7eed
+
+// CHECK: adcl $2063514302, 3133065982
+ adcl $0x7afebabe,0xbabecafe
+
+// CHECK: adcl $2063514302, 305419896
+ adcl $0x7afebabe,0x12345678
+
+// CHECK: adcl $324478056, 3735928559(%ebx,%ecx,8)
+ adcl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: adcl $324478056, 69
+ adcl $0x13572468,0x45
+
+// CHECK: adcl $324478056, 32493
+ adcl $0x13572468,0x7eed
+
+// CHECK: adcl $324478056, 3133065982
+ adcl $0x13572468,0xbabecafe
+
+// CHECK: adcl $324478056, 305419896
+ adcl $0x13572468,0x12345678
+
+// CHECK: negl 3735928559(%ebx,%ecx,8)
+ negl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: negw 32493
+ negw 0x7eed
+
+// CHECK: negl 3133065982
+ negl 0xbabecafe
+
+// CHECK: negl 305419896
+ negl 0x12345678
+
+// CHECK: notl 3735928559(%ebx,%ecx,8)
+ notl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: notw 32493
+ notw 0x7eed
+
+// CHECK: notl 3133065982
+ notl 0xbabecafe
+
+// CHECK: notl 305419896
+ notl 0x12345678
+
+// CHECK: cbtw
+ cbtw
+
+// CHECK: cwtl
+ cwtl
+
+// CHECK: cwtd
+ cwtd
+
+// CHECK: cltd
+ cltd
+
+// CHECK: mull 3735928559(%ebx,%ecx,8)
+ mull 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: mulw 32493
+ mulw 0x7eed
+
+// CHECK: mull 3133065982
+ mull 0xbabecafe
+
+// CHECK: mull 305419896
+ mull 0x12345678
+
+// CHECK: imull 3735928559(%ebx,%ecx,8)
+ imull 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: imulw 32493
+ imulw 0x7eed
+
+// CHECK: imull 3133065982
+ imull 0xbabecafe
+
+// CHECK: imull 305419896
+ imull 0x12345678
+
+// CHECK: divl 3735928559(%ebx,%ecx,8)
+ divl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: divw 32493
+ divw 0x7eed
+
+// CHECK: divl 3133065982
+ divl 0xbabecafe
+
+// CHECK: divl 305419896
+ divl 0x12345678
+
+// CHECK: idivl 3735928559(%ebx,%ecx,8)
+ idivl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: idivw 32493
+ idivw 0x7eed
+
+// CHECK: idivl 3133065982
+ idivl 0xbabecafe
+
+// CHECK: idivl 305419896
+ idivl 0x12345678
+
+// CHECK: roll $0, 3735928559(%ebx,%ecx,8)
+ roll $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: roll $0, 69
+ roll $0,0x45
+
+// CHECK: roll $0, 32493
+ roll $0,0x7eed
+
+// CHECK: roll $0, 3133065982
+ roll $0,0xbabecafe
+
+// CHECK: roll $0, 305419896
+ roll $0,0x12345678
+
+// CHECK: rolb $127, 3735928559(%ebx,%ecx,8)
+ rolb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rolb $127, 69
+ rolb $0x7f,0x45
+
+// CHECK: rolb $127, 32493
+ rolb $0x7f,0x7eed
+
+// CHECK: rolb $127, 3133065982
+ rolb $0x7f,0xbabecafe
+
+// CHECK: rolb $127, 305419896
+ rolb $0x7f,0x12345678
+
+// CHECK: roll 3735928559(%ebx,%ecx,8)
+ roll 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rolw 32493
+ rolw 0x7eed
+
+// CHECK: roll 3133065982
+ roll 0xbabecafe
+
+// CHECK: roll 305419896
+ roll 0x12345678
+
+// CHECK: rorl $0, 3735928559(%ebx,%ecx,8)
+ rorl $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rorl $0, 69
+ rorl $0,0x45
+
+// CHECK: rorl $0, 32493
+ rorl $0,0x7eed
+
+// CHECK: rorl $0, 3133065982
+ rorl $0,0xbabecafe
+
+// CHECK: rorl $0, 305419896
+ rorl $0,0x12345678
+
+// CHECK: rorb $127, 3735928559(%ebx,%ecx,8)
+ rorb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rorb $127, 69
+ rorb $0x7f,0x45
+
+// CHECK: rorb $127, 32493
+ rorb $0x7f,0x7eed
+
+// CHECK: rorb $127, 3133065982
+ rorb $0x7f,0xbabecafe
+
+// CHECK: rorb $127, 305419896
+ rorb $0x7f,0x12345678
+
+// CHECK: rorl 3735928559(%ebx,%ecx,8)
+ rorl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rorw 32493
+ rorw 0x7eed
+
+// CHECK: rorl 3133065982
+ rorl 0xbabecafe
+
+// CHECK: rorl 305419896
+ rorl 0x12345678
+
+// CHECK: rcll $0, 3735928559(%ebx,%ecx,8)
+ rcll $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rcll $0, 69
+ rcll $0,0x45
+
+// CHECK: rcll $0, 32493
+ rcll $0,0x7eed
+
+// CHECK: rcll $0, 3133065982
+ rcll $0,0xbabecafe
+
+// CHECK: rcll $0, 305419896
+ rcll $0,0x12345678
+
+// CHECK: rclb $127, 3735928559(%ebx,%ecx,8)
+ rclb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rclb $127, 69
+ rclb $0x7f,0x45
+
+// CHECK: rclb $127, 32493
+ rclb $0x7f,0x7eed
+
+// CHECK: rclb $127, 3133065982
+ rclb $0x7f,0xbabecafe
+
+// CHECK: rclb $127, 305419896
+ rclb $0x7f,0x12345678
+
+// CHECK: rcrl $0, 3735928559(%ebx,%ecx,8)
+ rcrl $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rcrl $0, 69
+ rcrl $0,0x45
+
+// CHECK: rcrl $0, 32493
+ rcrl $0,0x7eed
+
+// CHECK: rcrl $0, 3133065982
+ rcrl $0,0xbabecafe
+
+// CHECK: rcrl $0, 305419896
+ rcrl $0,0x12345678
+
+// CHECK: rcrb $127, 3735928559(%ebx,%ecx,8)
+ rcrb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: rcrb $127, 69
+ rcrb $0x7f,0x45
+
+// CHECK: rcrb $127, 32493
+ rcrb $0x7f,0x7eed
+
+// CHECK: rcrb $127, 3133065982
+ rcrb $0x7f,0xbabecafe
+
+// CHECK: rcrb $127, 305419896
+ rcrb $0x7f,0x12345678
+
+// CHECK: shll $0, 3735928559(%ebx,%ecx,8)
+ shll $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shll $0, 69
+ shll $0,0x45
+
+// CHECK: shll $0, 32493
+ shll $0,0x7eed
+
+// CHECK: shll $0, 3133065982
+ shll $0,0xbabecafe
+
+// CHECK: shll $0, 305419896
+ shll $0,0x12345678
+
+// CHECK: shlb $127, 3735928559(%ebx,%ecx,8)
+ shlb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shlb $127, 69
+ shlb $0x7f,0x45
+
+// CHECK: shlb $127, 32493
+ shlb $0x7f,0x7eed
+
+// CHECK: shlb $127, 3133065982
+ shlb $0x7f,0xbabecafe
+
+// CHECK: shlb $127, 305419896
+ shlb $0x7f,0x12345678
+
+// CHECK: shll 3735928559(%ebx,%ecx,8)
+ shll 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shlw 32493
+ shlw 0x7eed
+
+// CHECK: shll 3133065982
+ shll 0xbabecafe
+
+// CHECK: shll 305419896
+ shll 0x12345678
+
+// CHECK: shrl $0, 3735928559(%ebx,%ecx,8)
+ shrl $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shrl $0, 69
+ shrl $0,0x45
+
+// CHECK: shrl $0, 32493
+ shrl $0,0x7eed
+
+// CHECK: shrl $0, 3133065982
+ shrl $0,0xbabecafe
+
+// CHECK: shrl $0, 305419896
+ shrl $0,0x12345678
+
+// CHECK: shrb $127, 3735928559(%ebx,%ecx,8)
+ shrb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shrb $127, 69
+ shrb $0x7f,0x45
+
+// CHECK: shrb $127, 32493
+ shrb $0x7f,0x7eed
+
+// CHECK: shrb $127, 3133065982
+ shrb $0x7f,0xbabecafe
+
+// CHECK: shrb $127, 305419896
+ shrb $0x7f,0x12345678
+
+// CHECK: shrl 3735928559(%ebx,%ecx,8)
+ shrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: shrw 32493
+ shrw 0x7eed
+
+// CHECK: shrl 3133065982
+ shrl 0xbabecafe
+
+// CHECK: shrl 305419896
+ shrl 0x12345678
+
+// CHECK: sarl $0, 3735928559(%ebx,%ecx,8)
+ sarl $0,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sarl $0, 69
+ sarl $0,0x45
+
+// CHECK: sarl $0, 32493
+ sarl $0,0x7eed
+
+// CHECK: sarl $0, 3133065982
+ sarl $0,0xbabecafe
+
+// CHECK: sarl $0, 305419896
+ sarl $0,0x12345678
+
+// CHECK: sarb $127, 3735928559(%ebx,%ecx,8)
+ sarb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sarb $127, 69
+ sarb $0x7f,0x45
+
+// CHECK: sarb $127, 32493
+ sarb $0x7f,0x7eed
+
+// CHECK: sarb $127, 3133065982
+ sarb $0x7f,0xbabecafe
+
+// CHECK: sarb $127, 305419896
+ sarb $0x7f,0x12345678
+
+// CHECK: sarl 3735928559(%ebx,%ecx,8)
+ sarl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sarw 32493
+ sarw 0x7eed
+
+// CHECK: sarl 3133065982
+ sarl 0xbabecafe
+
+// CHECK: sarl 305419896
+ sarl 0x12345678
+
+// CHECK: call 3133065982
+ call 0xbabecafe
+
+// CHECK: call *3735928559(%ebx,%ecx,8)
+ call *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: call 3133065982
+ call 0xbabecafe
+
+// CHECK: call 305419896
+ call 0x12345678
+
+// CHECK: call *3135175374
+ call *0xbadeface
+
+// CHECK: call *3735928559(%ebx,%ecx,8)
+ call *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: call 32493
+ call 0x7eed
+
+// CHECK: call 3133065982
+ call 0xbabecafe
+
+// CHECK: call 305419896
+ call 0x12345678
+
+// CHECK: call *3135175374
+ call *0xbadeface
+
+// CHECK: lcallw *32493
+ lcallw *0x7eed
+
+// CHECK: jmp 32493
+ jmp 0x7eed
+
+// CHECK: jmp 3133065982
+ jmp 0xbabecafe
+
+// CHECK: jmp 305419896
+ jmp 0x12345678
+
+// CHECK: jmp -77129852792157442
+ jmp 0xfeedfacebabecafe
+
+// CHECK: jmp *3735928559(%ebx,%ecx,8)
+ jmp *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: jmp 32493
+ jmp 0x7eed
+
+// CHECK: jmp 3133065982
+ jmp 0xbabecafe
+
+// CHECK: jmp 305419896
+ jmp 0x12345678
+
+// CHECK: jmp *3135175374
+ jmp *0xbadeface
+
+// CHECK: jmp *3735928559(%ebx,%ecx,8)
+ jmp *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: jmp 32493
+ jmp 0x7eed
+
+// CHECK: jmp 3133065982
+ jmp 0xbabecafe
+
+// CHECK: jmp 305419896
+ jmp 0x12345678
+
+// CHECK: jmp *3135175374
+ jmp *0xbadeface
+
+// CHECK: ljmpl *3735928559(%ebx,%ecx,8)
+ ljmpl *0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: ljmpw *32493
+ ljmpw *0x7eed
+
+// CHECK: ljmpl *3133065982
+ ljmpl *0xbabecafe
+
+// CHECK: ljmpl *305419896
+ ljmpl *0x12345678
+
+// CHECK: ret
+ ret
+
+// CHECK: lret
+ lret
+
+// CHECK: enter $31438, $127
+ enter $0x7ace,$0x7f
+
+// CHECK: leave
+ leave
+
+// CHECK: jo 32493
+ jo 0x7eed
+
+// CHECK: jo 3133065982
+ jo 0xbabecafe
+
+// CHECK: jo 305419896
+ jo 0x12345678
+
+// CHECK: jo -77129852792157442
+ jo 0xfeedfacebabecafe
+
+// CHECK: jno 32493
+ jno 0x7eed
+
+// CHECK: jno 3133065982
+ jno 0xbabecafe
+
+// CHECK: jno 305419896
+ jno 0x12345678
+
+// CHECK: jno -77129852792157442
+ jno 0xfeedfacebabecafe
+
+// CHECK: jb 32493
+ jb 0x7eed
+
+// CHECK: jb 3133065982
+ jb 0xbabecafe
+
+// CHECK: jb 305419896
+ jb 0x12345678
+
+// CHECK: jb -77129852792157442
+ jb 0xfeedfacebabecafe
+
+// CHECK: jae 32493
+ jae 0x7eed
+
+// CHECK: jae 3133065982
+ jae 0xbabecafe
+
+// CHECK: jae 305419896
+ jae 0x12345678
+
+// CHECK: jae -77129852792157442
+ jae 0xfeedfacebabecafe
+
+// CHECK: je 32493
+ je 0x7eed
+
+// CHECK: je 3133065982
+ je 0xbabecafe
+
+// CHECK: je 305419896
+ je 0x12345678
+
+// CHECK: je -77129852792157442
+ je 0xfeedfacebabecafe
+
+// CHECK: jne 32493
+ jne 0x7eed
+
+// CHECK: jne 3133065982
+ jne 0xbabecafe
+
+// CHECK: jne 305419896
+ jne 0x12345678
+
+// CHECK: jne -77129852792157442
+ jne 0xfeedfacebabecafe
+
+// CHECK: jbe 32493
+ jbe 0x7eed
+
+// CHECK: jbe 3133065982
+ jbe 0xbabecafe
+
+// CHECK: jbe 305419896
+ jbe 0x12345678
+
+// CHECK: jbe -77129852792157442
+ jbe 0xfeedfacebabecafe
+
+// CHECK: ja 32493
+ ja 0x7eed
+
+// CHECK: ja 3133065982
+ ja 0xbabecafe
+
+// CHECK: ja 305419896
+ ja 0x12345678
+
+// CHECK: ja -77129852792157442
+ ja 0xfeedfacebabecafe
+
+// CHECK: js 32493
+ js 0x7eed
+
+// CHECK: js 3133065982
+ js 0xbabecafe
+
+// CHECK: js 305419896
+ js 0x12345678
+
+// CHECK: js -77129852792157442
+ js 0xfeedfacebabecafe
+
+// CHECK: jns 32493
+ jns 0x7eed
+
+// CHECK: jns 3133065982
+ jns 0xbabecafe
+
+// CHECK: jns 305419896
+ jns 0x12345678
+
+// CHECK: jns -77129852792157442
+ jns 0xfeedfacebabecafe
+
+// CHECK: jp 32493
+ jp 0x7eed
+
+// CHECK: jp 3133065982
+ jp 0xbabecafe
+
+// CHECK: jp 305419896
+ jp 0x12345678
+
+// CHECK: jp -77129852792157442
+ jp 0xfeedfacebabecafe
+
+// CHECK: jnp 32493
+ jnp 0x7eed
+
+// CHECK: jnp 3133065982
+ jnp 0xbabecafe
+
+// CHECK: jnp 305419896
+ jnp 0x12345678
+
+// CHECK: jnp -77129852792157442
+ jnp 0xfeedfacebabecafe
+
+// CHECK: jl 32493
+ jl 0x7eed
+
+// CHECK: jl 3133065982
+ jl 0xbabecafe
+
+// CHECK: jl 305419896
+ jl 0x12345678
+
+// CHECK: jl -77129852792157442
+ jl 0xfeedfacebabecafe
+
+// CHECK: jge 32493
+ jge 0x7eed
+
+// CHECK: jge 3133065982
+ jge 0xbabecafe
+
+// CHECK: jge 305419896
+ jge 0x12345678
+
+// CHECK: jge -77129852792157442
+ jge 0xfeedfacebabecafe
+
+// CHECK: jle 32493
+ jle 0x7eed
+
+// CHECK: jle 3133065982
+ jle 0xbabecafe
+
+// CHECK: jle 305419896
+ jle 0x12345678
+
+// CHECK: jle -77129852792157442
+ jle 0xfeedfacebabecafe
+
+// CHECK: jg 32493
+ jg 0x7eed
+
+// CHECK: jg 3133065982
+ jg 0xbabecafe
+
+// CHECK: jg 305419896
+ jg 0x12345678
+
+// CHECK: jg -77129852792157442
+ jg 0xfeedfacebabecafe
+
+// CHECK: seto %bl
+ seto %bl
+
+// CHECK: seto 3735928559(%ebx,%ecx,8)
+ seto 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: seto 32493
+ seto 0x7eed
+
+// CHECK: seto 3133065982
+ seto 0xbabecafe
+
+// CHECK: seto 305419896
+ seto 0x12345678
+
+// CHECK: setno %bl
+ setno %bl
+
+// CHECK: setno 3735928559(%ebx,%ecx,8)
+ setno 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setno 32493
+ setno 0x7eed
+
+// CHECK: setno 3133065982
+ setno 0xbabecafe
+
+// CHECK: setno 305419896
+ setno 0x12345678
+
+// CHECK: setb %bl
+ setb %bl
+
+// CHECK: setb 3735928559(%ebx,%ecx,8)
+ setb 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setb 32493
+ setb 0x7eed
+
+// CHECK: setb 3133065982
+ setb 0xbabecafe
+
+// CHECK: setb 305419896
+ setb 0x12345678
+
+// CHECK: setae %bl
+ setae %bl
+
+// CHECK: setae 3735928559(%ebx,%ecx,8)
+ setae 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setae 32493
+ setae 0x7eed
+
+// CHECK: setae 3133065982
+ setae 0xbabecafe
+
+// CHECK: setae 305419896
+ setae 0x12345678
+
+// CHECK: sete %bl
+ sete %bl
+
+// CHECK: sete 3735928559(%ebx,%ecx,8)
+ sete 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sete 32493
+ sete 0x7eed
+
+// CHECK: sete 3133065982
+ sete 0xbabecafe
+
+// CHECK: sete 305419896
+ sete 0x12345678
+
+// CHECK: setne %bl
+ setne %bl
+
+// CHECK: setne 3735928559(%ebx,%ecx,8)
+ setne 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setne 32493
+ setne 0x7eed
+
+// CHECK: setne 3133065982
+ setne 0xbabecafe
+
+// CHECK: setne 305419896
+ setne 0x12345678
+
+// CHECK: setbe %bl
+ setbe %bl
+
+// CHECK: setbe 3735928559(%ebx,%ecx,8)
+ setbe 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setbe 32493
+ setbe 0x7eed
+
+// CHECK: setbe 3133065982
+ setbe 0xbabecafe
+
+// CHECK: setbe 305419896
+ setbe 0x12345678
+
+// CHECK: seta %bl
+ seta %bl
+
+// CHECK: seta 3735928559(%ebx,%ecx,8)
+ seta 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: seta 32493
+ seta 0x7eed
+
+// CHECK: seta 3133065982
+ seta 0xbabecafe
+
+// CHECK: seta 305419896
+ seta 0x12345678
+
+// CHECK: sets %bl
+ sets %bl
+
+// CHECK: sets 3735928559(%ebx,%ecx,8)
+ sets 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: sets 32493
+ sets 0x7eed
+
+// CHECK: sets 3133065982
+ sets 0xbabecafe
+
+// CHECK: sets 305419896
+ sets 0x12345678
+
+// CHECK: setns %bl
+ setns %bl
+
+// CHECK: setns 3735928559(%ebx,%ecx,8)
+ setns 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setns 32493
+ setns 0x7eed
+
+// CHECK: setns 3133065982
+ setns 0xbabecafe
+
+// CHECK: setns 305419896
+ setns 0x12345678
+
+// CHECK: setp %bl
+ setp %bl
+
+// CHECK: setp 3735928559(%ebx,%ecx,8)
+ setp 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setp 32493
+ setp 0x7eed
+
+// CHECK: setp 3133065982
+ setp 0xbabecafe
+
+// CHECK: setp 305419896
+ setp 0x12345678
+
+// CHECK: setnp %bl
+ setnp %bl
+
+// CHECK: setnp 3735928559(%ebx,%ecx,8)
+ setnp 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setnp 32493
+ setnp 0x7eed
+
+// CHECK: setnp 3133065982
+ setnp 0xbabecafe
+
+// CHECK: setnp 305419896
+ setnp 0x12345678
+
+// CHECK: setl %bl
+ setl %bl
+
+// CHECK: setl 3735928559(%ebx,%ecx,8)
+ setl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setl 32493
+ setl 0x7eed
+
+// CHECK: setl 3133065982
+ setl 0xbabecafe
+
+// CHECK: setl 305419896
+ setl 0x12345678
+
+// CHECK: setge %bl
+ setge %bl
+
+// CHECK: setge 3735928559(%ebx,%ecx,8)
+ setge 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setge 32493
+ setge 0x7eed
+
+// CHECK: setge 3133065982
+ setge 0xbabecafe
+
+// CHECK: setge 305419896
+ setge 0x12345678
+
+// CHECK: setle %bl
+ setle %bl
+
+// CHECK: setle 3735928559(%ebx,%ecx,8)
+ setle 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setle 32493
+ setle 0x7eed
+
+// CHECK: setle 3133065982
+ setle 0xbabecafe
+
+// CHECK: setle 305419896
+ setle 0x12345678
+
+// CHECK: setg %bl
+ setg %bl
+
+// CHECK: setg 3735928559(%ebx,%ecx,8)
+ setg 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: setg 32493
+ setg 0x7eed
+
+// CHECK: setg 3133065982
+ setg 0xbabecafe
+
+// CHECK: setg 305419896
+ setg 0x12345678
+
+// CHECK: int $127
+ int $0x7f
+
+// CHECK: rsm
+ rsm
+
+// CHECK: hlt
+ hlt
+
+// CHECK: nopl 3735928559(%ebx,%ecx,8)
+ nopl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: nopw 32493
+ nopw 0x7eed
+
+// CHECK: nopl 3133065982
+ nopl 0xbabecafe
+
+// CHECK: nopl 305419896
+ nopl 0x12345678
+
+// CHECK: nop
+ nop
+
+// CHECK: lldtw 32493
+ lldtw 0x7eed
+
+// CHECK: lmsww 32493
+ lmsww 0x7eed
+
+// CHECK: ltrw 32493
+ ltrw 0x7eed
+
+// CHECK: sldtw 32493
+ sldtw 0x7eed
+
+// CHECK: smsww 32493
+ smsww 0x7eed
+
+// CHECK: strw 32493
+ strw 0x7eed
+
+// CHECK: verr %bx
+ verr %bx
+
+// CHECK: verr 3735928559(%ebx,%ecx,8)
+ verr 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: verr 3133065982
+ verr 0xbabecafe
+
+// CHECK: verr 305419896
+ verr 0x12345678
+
+// CHECK: verw %bx
+ verw %bx
+
+// CHECK: verw 3735928559(%ebx,%ecx,8)
+ verw 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: verw 3133065982
+ verw 0xbabecafe
+
+// CHECK: verw 305419896
+ verw 0x12345678
+
+// CHECK: fldl 3735928559(%ebx,%ecx,8)
+ fldl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fldl 3133065982
+ fldl 0xbabecafe
+
+// CHECK: fldl 305419896
+ fldl 0x12345678
+
+// CHECK: fildl 3735928559(%ebx,%ecx,8)
+ fildl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fildl 3133065982
+ fildl 0xbabecafe
+
+// CHECK: fildl 305419896
+ fildl 0x12345678
+
+// CHECK: fildll 3735928559(%ebx,%ecx,8)
+ fildll 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fildll 32493
+ fildll 0x7eed
+
+// CHECK: fildll 3133065982
+ fildll 0xbabecafe
+
+// CHECK: fildll 305419896
+ fildll 0x12345678
+
+// CHECK: fldt 3735928559(%ebx,%ecx,8)
+ fldt 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fldt 32493
+ fldt 0x7eed
+
+// CHECK: fldt 3133065982
+ fldt 0xbabecafe
+
+// CHECK: fldt 305419896
+ fldt 0x12345678
+
+// CHECK: fbld 3735928559(%ebx,%ecx,8)
+ fbld 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fbld 32493
+ fbld 0x7eed
+
+// CHECK: fbld 3133065982
+ fbld 0xbabecafe
+
+// CHECK: fbld 305419896
+ fbld 0x12345678
+
+// CHECK: fstl 3735928559(%ebx,%ecx,8)
+ fstl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fstl 3133065982
+ fstl 0xbabecafe
+
+// CHECK: fstl 305419896
+ fstl 0x12345678
+
+// CHECK: fistl 3735928559(%ebx,%ecx,8)
+ fistl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fistl 3133065982
+ fistl 0xbabecafe
+
+// CHECK: fistl 305419896
+ fistl 0x12345678
+
+// CHECK: fstpl 3735928559(%ebx,%ecx,8)
+ fstpl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fstpl 3133065982
+ fstpl 0xbabecafe
+
+// CHECK: fstpl 305419896
+ fstpl 0x12345678
+
+// CHECK: fistpl 3735928559(%ebx,%ecx,8)
+ fistpl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fistpl 3133065982
+ fistpl 0xbabecafe
+
+// CHECK: fistpl 305419896
+ fistpl 0x12345678
+
+// CHECK: fistpll 3735928559(%ebx,%ecx,8)
+ fistpll 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fistpll 32493
+ fistpll 0x7eed
+
+// CHECK: fistpll 3133065982
+ fistpll 0xbabecafe
+
+// CHECK: fistpll 305419896
+ fistpll 0x12345678
+
+// CHECK: fstpt 3735928559(%ebx,%ecx,8)
+ fstpt 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fstpt 32493
+ fstpt 0x7eed
+
+// CHECK: fstpt 3133065982
+ fstpt 0xbabecafe
+
+// CHECK: fstpt 305419896
+ fstpt 0x12345678
+
+// CHECK: fbstp 3735928559(%ebx,%ecx,8)
+ fbstp 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fbstp 32493
+ fbstp 0x7eed
+
+// CHECK: fbstp 3133065982
+ fbstp 0xbabecafe
+
+// CHECK: fbstp 305419896
+ fbstp 0x12345678
+
+// CHECK: fcoml 3735928559(%ebx,%ecx,8)
+ fcoml 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fcoml 3133065982
+ fcoml 0xbabecafe
+
+// CHECK: fcoml 305419896
+ fcoml 0x12345678
+
+// CHECK: ficoml 3735928559(%ebx,%ecx,8)
+ ficoml 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: ficoml 3133065982
+ ficoml 0xbabecafe
+
+// CHECK: ficoml 305419896
+ ficoml 0x12345678
+
+// CHECK: fcompl 3735928559(%ebx,%ecx,8)
+ fcompl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fcompl 3133065982
+ fcompl 0xbabecafe
+
+// CHECK: fcompl 305419896
+ fcompl 0x12345678
+
+// CHECK: ficompl 3735928559(%ebx,%ecx,8)
+ ficompl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: ficompl 3133065982
+ ficompl 0xbabecafe
+
+// CHECK: ficompl 305419896
+ ficompl 0x12345678
+
+// CHECK: fcompp
+ fcompp
+
+// CHECK: fucompp
+ fucompp
+
+// CHECK: ftst
+ ftst
+
+// CHECK: fxam
+ fxam
+
+// CHECK: fld1
+ fld1
+
+// CHECK: fldl2t
+ fldl2t
+
+// CHECK: fldl2e
+ fldl2e
+
+// CHECK: fldpi
+ fldpi
+
+// CHECK: fldlg2
+ fldlg2
+
+// CHECK: fldln2
+ fldln2
+
+// CHECK: fldz
+ fldz
+
+// CHECK: faddl 3735928559(%ebx,%ecx,8)
+ faddl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: faddl 3133065982
+ faddl 0xbabecafe
+
+// CHECK: faddl 305419896
+ faddl 0x12345678
+
+// CHECK: fiaddl 3735928559(%ebx,%ecx,8)
+ fiaddl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fiaddl 3133065982
+ fiaddl 0xbabecafe
+
+// CHECK: fiaddl 305419896
+ fiaddl 0x12345678
+
+// CHECK: fsubl 3735928559(%ebx,%ecx,8)
+ fsubl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fsubl 3133065982
+ fsubl 0xbabecafe
+
+// CHECK: fsubl 305419896
+ fsubl 0x12345678
+
+// CHECK: fisubl 3735928559(%ebx,%ecx,8)
+ fisubl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fisubl 3133065982
+ fisubl 0xbabecafe
+
+// CHECK: fisubl 305419896
+ fisubl 0x12345678
+
+// CHECK: fsubrl 3735928559(%ebx,%ecx,8)
+ fsubrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fsubrl 3133065982
+ fsubrl 0xbabecafe
+
+// CHECK: fsubrl 305419896
+ fsubrl 0x12345678
+
+// CHECK: fisubrl 3735928559(%ebx,%ecx,8)
+ fisubrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fisubrl 3133065982
+ fisubrl 0xbabecafe
+
+// CHECK: fisubrl 305419896
+ fisubrl 0x12345678
+
+// CHECK: fmull 3735928559(%ebx,%ecx,8)
+ fmull 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fmull 3133065982
+ fmull 0xbabecafe
+
+// CHECK: fmull 305419896
+ fmull 0x12345678
+
+// CHECK: fimull 3735928559(%ebx,%ecx,8)
+ fimull 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fimull 3133065982
+ fimull 0xbabecafe
+
+// CHECK: fimull 305419896
+ fimull 0x12345678
+
+// CHECK: fdivl 3735928559(%ebx,%ecx,8)
+ fdivl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fdivl 3133065982
+ fdivl 0xbabecafe
+
+// CHECK: fdivl 305419896
+ fdivl 0x12345678
+
+// CHECK: fidivl 3735928559(%ebx,%ecx,8)
+ fidivl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fidivl 3133065982
+ fidivl 0xbabecafe
+
+// CHECK: fidivl 305419896
+ fidivl 0x12345678
+
+// CHECK: fdivrl 3735928559(%ebx,%ecx,8)
+ fdivrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fdivrl 3133065982
+ fdivrl 0xbabecafe
+
+// CHECK: fdivrl 305419896
+ fdivrl 0x12345678
+
+// CHECK: fidivrl 3735928559(%ebx,%ecx,8)
+ fidivrl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fidivrl 3133065982
+ fidivrl 0xbabecafe
+
+// CHECK: fidivrl 305419896
+ fidivrl 0x12345678
+
+// CHECK: f2xm1
+ f2xm1
+
+// CHECK: fyl2x
+ fyl2x
+
+// CHECK: fptan
+ fptan
+
+// CHECK: fpatan
+ fpatan
+
+// CHECK: fxtract
+ fxtract
+
+// CHECK: fprem1
+ fprem1
+
+// CHECK: fdecstp
+ fdecstp
+
+// CHECK: fincstp
+ fincstp
+
+// CHECK: fprem
+ fprem
+
+// CHECK: fyl2xp1
+ fyl2xp1
+
+// CHECK: fsqrt
+ fsqrt
+
+// CHECK: fsincos
+ fsincos
+
+// CHECK: frndint
+ frndint
+
+// CHECK: fscale
+ fscale
+
+// CHECK: fsin
+ fsin
+
+// CHECK: fcos
+ fcos
+
+// CHECK: fchs
+ fchs
+
+// CHECK: fabs
+ fabs
+
+// CHECK: fninit
+ fninit
+
+// CHECK: fldcw 3735928559(%ebx,%ecx,8)
+ fldcw 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fldcw 3133065982
+ fldcw 0xbabecafe
+
+// CHECK: fldcw 305419896
+ fldcw 0x12345678
+
+// CHECK: fnstcw 3735928559(%ebx,%ecx,8)
+ fnstcw 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fnstcw 3133065982
+ fnstcw 0xbabecafe
+
+// CHECK: fnstcw 305419896
+ fnstcw 0x12345678
+
+// CHECK: fnstsw 3735928559(%ebx,%ecx,8)
+ fnstsw 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fnstsw 3133065982
+ fnstsw 0xbabecafe
+
+// CHECK: fnstsw 305419896
+ fnstsw 0x12345678
+
+// CHECK: fnclex
+ fnclex
+
+// CHECK: fnstenv 32493
+ fnstenv 0x7eed
+
+// CHECK: fldenv 32493
+ fldenv 0x7eed
+
+// CHECK: fnsave 32493
+ fnsave 0x7eed
+
+// CHECK: frstor 32493
+ frstor 0x7eed
+
+// CHECK: fnop
+ fnop
+
+// CHECK: invd
+ invd
+
+// CHECK: wbinvd
+ wbinvd
+
+// CHECK: cpuid
+ cpuid
+
+// CHECK: wrmsr
+ wrmsr
+
+// CHECK: rdtsc
+ rdtsc
+
+// CHECK: rdmsr
+ rdmsr
+
+// CHECK: cmpxchg8b 3735928559(%ebx,%ecx,8)
+ cmpxchg8b 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: cmpxchg8b 32493
+ cmpxchg8b 0x7eed
+
+// CHECK: cmpxchg8b 3133065982
+ cmpxchg8b 0xbabecafe
+
+// CHECK: cmpxchg8b 305419896
+ cmpxchg8b 0x12345678
+
+// CHECK: sysenter
+ sysenter
+
+// CHECK: sysexit
+ sysexit
+
+// CHECK: fxsave 3735928559(%ebx,%ecx,8)
+ fxsave 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fxsave 32493
+ fxsave 0x7eed
+
+// CHECK: fxsave 3133065982
+ fxsave 0xbabecafe
+
+// CHECK: fxsave 305419896
+ fxsave 0x12345678
+
+// CHECK: fxrstor 3735928559(%ebx,%ecx,8)
+ fxrstor 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fxrstor 32493
+ fxrstor 0x7eed
+
+// CHECK: fxrstor 3133065982
+ fxrstor 0xbabecafe
+
+// CHECK: fxrstor 305419896
+ fxrstor 0x12345678
+
+// CHECK: rdpmc
+ rdpmc
+
+// CHECK: ud2
+ ud2
+
+// CHECK: movnti %ecx, 3735928559(%ebx,%ecx,8)
+ movnti %ecx,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movnti %ecx, 69
+ movnti %ecx,0x45
+
+// CHECK: movnti %ecx, 32493
+ movnti %ecx,0x7eed
+
+// CHECK: movnti %ecx, 3133065982
+ movnti %ecx,0xbabecafe
+
+// CHECK: movnti %ecx, 305419896
+ movnti %ecx,0x12345678
+
+// CHECK: clflush 3735928559(%ebx,%ecx,8)
+ clflush 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: clflush 32493
+ clflush 0x7eed
+
+// CHECK: clflush 3133065982
+ clflush 0xbabecafe
+
+// CHECK: clflush 305419896
+ clflush 0x12345678
+
+// CHECK: lfence
+ lfence
+
+// CHECK: mfence
+ mfence
+
+// CHECK: emms
+ emms
+
+// CHECK: movd %ecx, %mm3
+ movd %ecx,%mm3
+
+// CHECK: movd 3735928559(%ebx,%ecx,8), %mm3
+ movd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: movd 69, %mm3
+ movd 0x45,%mm3
+
+// CHECK: movd 32493, %mm3
+ movd 0x7eed,%mm3
+
+// CHECK: movd 3133065982, %mm3
+ movd 0xbabecafe,%mm3
+
+// CHECK: movd 305419896, %mm3
+ movd 0x12345678,%mm3
+
+// CHECK: movd %mm3, %ecx
+ movd %mm3,%ecx
+
+// CHECK: movd %mm3, 3735928559(%ebx,%ecx,8)
+ movd %mm3,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movd %mm3, 69
+ movd %mm3,0x45
+
+// CHECK: movd %mm3, 32493
+ movd %mm3,0x7eed
+
+// CHECK: movd %mm3, 3133065982
+ movd %mm3,0xbabecafe
+
+// CHECK: movd %mm3, 305419896
+ movd %mm3,0x12345678
+
+// CHECK: movd %ecx, %xmm5
+ movd %ecx,%xmm5
+
+// CHECK: movd 3735928559(%ebx,%ecx,8), %xmm5
+ movd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movd 69, %xmm5
+ movd 0x45,%xmm5
+
+// CHECK: movd 32493, %xmm5
+ movd 0x7eed,%xmm5
+
+// CHECK: movd 3133065982, %xmm5
+ movd 0xbabecafe,%xmm5
+
+// CHECK: movd 305419896, %xmm5
+ movd 0x12345678,%xmm5
+
+// CHECK: movd %xmm5, %ecx
+ movd %xmm5,%ecx
+
+// CHECK: movd %xmm5, 3735928559(%ebx,%ecx,8)
+ movd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movd %xmm5, 69
+ movd %xmm5,0x45
+
+// CHECK: movd %xmm5, 32493
+ movd %xmm5,0x7eed
+
+// CHECK: movd %xmm5, 3133065982
+ movd %xmm5,0xbabecafe
+
+// CHECK: movd %xmm5, 305419896
+ movd %xmm5,0x12345678
+
+// CHECK: movq 3735928559(%ebx,%ecx,8), %mm3
+ movq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: movq 69, %mm3
+ movq 0x45,%mm3
+
+// CHECK: movq 32493, %mm3
+ movq 0x7eed,%mm3
+
+// CHECK: movq 3133065982, %mm3
+ movq 0xbabecafe,%mm3
+
+// CHECK: movq 305419896, %mm3
+ movq 0x12345678,%mm3
+
+// CHECK: movq %mm3, %mm3
+ movq %mm3,%mm3
+
+// CHECK: movq %mm3, 3735928559(%ebx,%ecx,8)
+ movq %mm3,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movq %mm3, 69
+ movq %mm3,0x45
+
+// CHECK: movq %mm3, 32493
+ movq %mm3,0x7eed
+
+// CHECK: movq %mm3, 3133065982
+ movq %mm3,0xbabecafe
+
+// CHECK: movq %mm3, 305419896
+ movq %mm3,0x12345678
+
+// CHECK: movq %mm3, %mm3
+ movq %mm3,%mm3
+
+// CHECK: movq 3735928559(%ebx,%ecx,8), %xmm5
+ movq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movq 69, %xmm5
+ movq 0x45,%xmm5
+
+// CHECK: movq 32493, %xmm5
+ movq 0x7eed,%xmm5
+
+// CHECK: movq 3133065982, %xmm5
+ movq 0xbabecafe,%xmm5
+
+// CHECK: movq 305419896, %xmm5
+ movq 0x12345678,%xmm5
+
+// CHECK: movq %xmm5, %xmm5
+ movq %xmm5,%xmm5
+
+// CHECK: movq %xmm5, 3735928559(%ebx,%ecx,8)
+ movq %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movq %xmm5, 69
+ movq %xmm5,0x45
+
+// CHECK: movq %xmm5, 32493
+ movq %xmm5,0x7eed
+
+// CHECK: movq %xmm5, 3133065982
+ movq %xmm5,0xbabecafe
+
+// CHECK: movq %xmm5, 305419896
+ movq %xmm5,0x12345678
+
+// CHECK: movq %xmm5, %xmm5
+ movq %xmm5,%xmm5
+
+// CHECK: packssdw 3735928559(%ebx,%ecx,8), %mm3
+ packssdw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: packssdw 69, %mm3
+ packssdw 0x45,%mm3
+
+// CHECK: packssdw 32493, %mm3
+ packssdw 0x7eed,%mm3
+
+// CHECK: packssdw 3133065982, %mm3
+ packssdw 0xbabecafe,%mm3
+
+// CHECK: packssdw 305419896, %mm3
+ packssdw 0x12345678,%mm3
+
+// CHECK: packssdw %mm3, %mm3
+ packssdw %mm3,%mm3
+
+// CHECK: packssdw 3735928559(%ebx,%ecx,8), %xmm5
+ packssdw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: packssdw 69, %xmm5
+ packssdw 0x45,%xmm5
+
+// CHECK: packssdw 32493, %xmm5
+ packssdw 0x7eed,%xmm5
+
+// CHECK: packssdw 3133065982, %xmm5
+ packssdw 0xbabecafe,%xmm5
+
+// CHECK: packssdw 305419896, %xmm5
+ packssdw 0x12345678,%xmm5
+
+// CHECK: packssdw %xmm5, %xmm5
+ packssdw %xmm5,%xmm5
+
+// CHECK: packsswb 3735928559(%ebx,%ecx,8), %mm3
+ packsswb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: packsswb 69, %mm3
+ packsswb 0x45,%mm3
+
+// CHECK: packsswb 32493, %mm3
+ packsswb 0x7eed,%mm3
+
+// CHECK: packsswb 3133065982, %mm3
+ packsswb 0xbabecafe,%mm3
+
+// CHECK: packsswb 305419896, %mm3
+ packsswb 0x12345678,%mm3
+
+// CHECK: packsswb %mm3, %mm3
+ packsswb %mm3,%mm3
+
+// CHECK: packsswb 3735928559(%ebx,%ecx,8), %xmm5
+ packsswb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: packsswb 69, %xmm5
+ packsswb 0x45,%xmm5
+
+// CHECK: packsswb 32493, %xmm5
+ packsswb 0x7eed,%xmm5
+
+// CHECK: packsswb 3133065982, %xmm5
+ packsswb 0xbabecafe,%xmm5
+
+// CHECK: packsswb 305419896, %xmm5
+ packsswb 0x12345678,%xmm5
+
+// CHECK: packsswb %xmm5, %xmm5
+ packsswb %xmm5,%xmm5
+
+// CHECK: packuswb 3735928559(%ebx,%ecx,8), %mm3
+ packuswb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: packuswb 69, %mm3
+ packuswb 0x45,%mm3
+
+// CHECK: packuswb 32493, %mm3
+ packuswb 0x7eed,%mm3
+
+// CHECK: packuswb 3133065982, %mm3
+ packuswb 0xbabecafe,%mm3
+
+// CHECK: packuswb 305419896, %mm3
+ packuswb 0x12345678,%mm3
+
+// CHECK: packuswb %mm3, %mm3
+ packuswb %mm3,%mm3
+
+// CHECK: packuswb 3735928559(%ebx,%ecx,8), %xmm5
+ packuswb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: packuswb 69, %xmm5
+ packuswb 0x45,%xmm5
+
+// CHECK: packuswb 32493, %xmm5
+ packuswb 0x7eed,%xmm5
+
+// CHECK: packuswb 3133065982, %xmm5
+ packuswb 0xbabecafe,%xmm5
+
+// CHECK: packuswb 305419896, %xmm5
+ packuswb 0x12345678,%xmm5
+
+// CHECK: packuswb %xmm5, %xmm5
+ packuswb %xmm5,%xmm5
+
+// CHECK: paddb 3735928559(%ebx,%ecx,8), %mm3
+ paddb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: paddb 69, %mm3
+ paddb 0x45,%mm3
+
+// CHECK: paddb 32493, %mm3
+ paddb 0x7eed,%mm3
+
+// CHECK: paddb 3133065982, %mm3
+ paddb 0xbabecafe,%mm3
+
+// CHECK: paddb 305419896, %mm3
+ paddb 0x12345678,%mm3
+
+// CHECK: paddb %mm3, %mm3
+ paddb %mm3,%mm3
+
+// CHECK: paddb 3735928559(%ebx,%ecx,8), %xmm5
+ paddb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: paddb 69, %xmm5
+ paddb 0x45,%xmm5
+
+// CHECK: paddb 32493, %xmm5
+ paddb 0x7eed,%xmm5
+
+// CHECK: paddb 3133065982, %xmm5
+ paddb 0xbabecafe,%xmm5
+
+// CHECK: paddb 305419896, %xmm5
+ paddb 0x12345678,%xmm5
+
+// CHECK: paddb %xmm5, %xmm5
+ paddb %xmm5,%xmm5
+
+// CHECK: paddw 3735928559(%ebx,%ecx,8), %mm3
+ paddw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: paddw 69, %mm3
+ paddw 0x45,%mm3
+
+// CHECK: paddw 32493, %mm3
+ paddw 0x7eed,%mm3
+
+// CHECK: paddw 3133065982, %mm3
+ paddw 0xbabecafe,%mm3
+
+// CHECK: paddw 305419896, %mm3
+ paddw 0x12345678,%mm3
+
+// CHECK: paddw %mm3, %mm3
+ paddw %mm3,%mm3
+
+// CHECK: paddw 3735928559(%ebx,%ecx,8), %xmm5
+ paddw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: paddw 69, %xmm5
+ paddw 0x45,%xmm5
+
+// CHECK: paddw 32493, %xmm5
+ paddw 0x7eed,%xmm5
+
+// CHECK: paddw 3133065982, %xmm5
+ paddw 0xbabecafe,%xmm5
+
+// CHECK: paddw 305419896, %xmm5
+ paddw 0x12345678,%xmm5
+
+// CHECK: paddw %xmm5, %xmm5
+ paddw %xmm5,%xmm5
+
+// CHECK: paddd 3735928559(%ebx,%ecx,8), %mm3
+ paddd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: paddd 69, %mm3
+ paddd 0x45,%mm3
+
+// CHECK: paddd 32493, %mm3
+ paddd 0x7eed,%mm3
+
+// CHECK: paddd 3133065982, %mm3
+ paddd 0xbabecafe,%mm3
+
+// CHECK: paddd 305419896, %mm3
+ paddd 0x12345678,%mm3
+
+// CHECK: paddd %mm3, %mm3
+ paddd %mm3,%mm3
+
+// CHECK: paddd 3735928559(%ebx,%ecx,8), %xmm5
+ paddd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: paddd 69, %xmm5
+ paddd 0x45,%xmm5
+
+// CHECK: paddd 32493, %xmm5
+ paddd 0x7eed,%xmm5
+
+// CHECK: paddd 3133065982, %xmm5
+ paddd 0xbabecafe,%xmm5
+
+// CHECK: paddd 305419896, %xmm5
+ paddd 0x12345678,%xmm5
+
+// CHECK: paddd %xmm5, %xmm5
+ paddd %xmm5,%xmm5
+
+// CHECK: paddq 3735928559(%ebx,%ecx,8), %mm3
+ paddq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: paddq 69, %mm3
+ paddq 0x45,%mm3
+
+// CHECK: paddq 32493, %mm3
+ paddq 0x7eed,%mm3
+
+// CHECK: paddq 3133065982, %mm3
+ paddq 0xbabecafe,%mm3
+
+// CHECK: paddq 305419896, %mm3
+ paddq 0x12345678,%mm3
+
+// CHECK: paddq %mm3, %mm3
+ paddq %mm3,%mm3
+
+// CHECK: paddq 3735928559(%ebx,%ecx,8), %xmm5
+ paddq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: paddq 69, %xmm5
+ paddq 0x45,%xmm5
+
+// CHECK: paddq 32493, %xmm5
+ paddq 0x7eed,%xmm5
+
+// CHECK: paddq 3133065982, %xmm5
+ paddq 0xbabecafe,%xmm5
+
+// CHECK: paddq 305419896, %xmm5
+ paddq 0x12345678,%xmm5
+
+// CHECK: paddq %xmm5, %xmm5
+ paddq %xmm5,%xmm5
+
+// CHECK: paddsb 3735928559(%ebx,%ecx,8), %mm3
+ paddsb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: paddsb 69, %mm3
+ paddsb 0x45,%mm3
+
+// CHECK: paddsb 32493, %mm3
+ paddsb 0x7eed,%mm3
+
+// CHECK: paddsb 3133065982, %mm3
+ paddsb 0xbabecafe,%mm3
+
+// CHECK: paddsb 305419896, %mm3
+ paddsb 0x12345678,%mm3
+
+// CHECK: paddsb %mm3, %mm3
+ paddsb %mm3,%mm3
+
+// CHECK: paddsb 3735928559(%ebx,%ecx,8), %xmm5
+ paddsb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: paddsb 69, %xmm5
+ paddsb 0x45,%xmm5
+
+// CHECK: paddsb 32493, %xmm5
+ paddsb 0x7eed,%xmm5
+
+// CHECK: paddsb 3133065982, %xmm5
+ paddsb 0xbabecafe,%xmm5
+
+// CHECK: paddsb 305419896, %xmm5
+ paddsb 0x12345678,%xmm5
+
+// CHECK: paddsb %xmm5, %xmm5
+ paddsb %xmm5,%xmm5
+
+// CHECK: paddsw 3735928559(%ebx,%ecx,8), %mm3
+ paddsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: paddsw 69, %mm3
+ paddsw 0x45,%mm3
+
+// CHECK: paddsw 32493, %mm3
+ paddsw 0x7eed,%mm3
+
+// CHECK: paddsw 3133065982, %mm3
+ paddsw 0xbabecafe,%mm3
+
+// CHECK: paddsw 305419896, %mm3
+ paddsw 0x12345678,%mm3
+
+// CHECK: paddsw %mm3, %mm3
+ paddsw %mm3,%mm3
+
+// CHECK: paddsw 3735928559(%ebx,%ecx,8), %xmm5
+ paddsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: paddsw 69, %xmm5
+ paddsw 0x45,%xmm5
+
+// CHECK: paddsw 32493, %xmm5
+ paddsw 0x7eed,%xmm5
+
+// CHECK: paddsw 3133065982, %xmm5
+ paddsw 0xbabecafe,%xmm5
+
+// CHECK: paddsw 305419896, %xmm5
+ paddsw 0x12345678,%xmm5
+
+// CHECK: paddsw %xmm5, %xmm5
+ paddsw %xmm5,%xmm5
+
+// CHECK: paddusb 3735928559(%ebx,%ecx,8), %mm3
+ paddusb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: paddusb 69, %mm3
+ paddusb 0x45,%mm3
+
+// CHECK: paddusb 32493, %mm3
+ paddusb 0x7eed,%mm3
+
+// CHECK: paddusb 3133065982, %mm3
+ paddusb 0xbabecafe,%mm3
+
+// CHECK: paddusb 305419896, %mm3
+ paddusb 0x12345678,%mm3
+
+// CHECK: paddusb %mm3, %mm3
+ paddusb %mm3,%mm3
+
+// CHECK: paddusb 3735928559(%ebx,%ecx,8), %xmm5
+ paddusb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: paddusb 69, %xmm5
+ paddusb 0x45,%xmm5
+
+// CHECK: paddusb 32493, %xmm5
+ paddusb 0x7eed,%xmm5
+
+// CHECK: paddusb 3133065982, %xmm5
+ paddusb 0xbabecafe,%xmm5
+
+// CHECK: paddusb 305419896, %xmm5
+ paddusb 0x12345678,%xmm5
+
+// CHECK: paddusb %xmm5, %xmm5
+ paddusb %xmm5,%xmm5
+
+// CHECK: paddusw 3735928559(%ebx,%ecx,8), %mm3
+ paddusw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: paddusw 69, %mm3
+ paddusw 0x45,%mm3
+
+// CHECK: paddusw 32493, %mm3
+ paddusw 0x7eed,%mm3
+
+// CHECK: paddusw 3133065982, %mm3
+ paddusw 0xbabecafe,%mm3
+
+// CHECK: paddusw 305419896, %mm3
+ paddusw 0x12345678,%mm3
+
+// CHECK: paddusw %mm3, %mm3
+ paddusw %mm3,%mm3
+
+// CHECK: paddusw 3735928559(%ebx,%ecx,8), %xmm5
+ paddusw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: paddusw 69, %xmm5
+ paddusw 0x45,%xmm5
+
+// CHECK: paddusw 32493, %xmm5
+ paddusw 0x7eed,%xmm5
+
+// CHECK: paddusw 3133065982, %xmm5
+ paddusw 0xbabecafe,%xmm5
+
+// CHECK: paddusw 305419896, %xmm5
+ paddusw 0x12345678,%xmm5
+
+// CHECK: paddusw %xmm5, %xmm5
+ paddusw %xmm5,%xmm5
+
+// CHECK: pand 3735928559(%ebx,%ecx,8), %mm3
+ pand 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pand 69, %mm3
+ pand 0x45,%mm3
+
+// CHECK: pand 32493, %mm3
+ pand 0x7eed,%mm3
+
+// CHECK: pand 3133065982, %mm3
+ pand 0xbabecafe,%mm3
+
+// CHECK: pand 305419896, %mm3
+ pand 0x12345678,%mm3
+
+// CHECK: pand %mm3, %mm3
+ pand %mm3,%mm3
+
+// CHECK: pand 3735928559(%ebx,%ecx,8), %xmm5
+ pand 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pand 69, %xmm5
+ pand 0x45,%xmm5
+
+// CHECK: pand 32493, %xmm5
+ pand 0x7eed,%xmm5
+
+// CHECK: pand 3133065982, %xmm5
+ pand 0xbabecafe,%xmm5
+
+// CHECK: pand 305419896, %xmm5
+ pand 0x12345678,%xmm5
+
+// CHECK: pand %xmm5, %xmm5
+ pand %xmm5,%xmm5
+
+// CHECK: pandn 3735928559(%ebx,%ecx,8), %mm3
+ pandn 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pandn 69, %mm3
+ pandn 0x45,%mm3
+
+// CHECK: pandn 32493, %mm3
+ pandn 0x7eed,%mm3
+
+// CHECK: pandn 3133065982, %mm3
+ pandn 0xbabecafe,%mm3
+
+// CHECK: pandn 305419896, %mm3
+ pandn 0x12345678,%mm3
+
+// CHECK: pandn %mm3, %mm3
+ pandn %mm3,%mm3
+
+// CHECK: pandn 3735928559(%ebx,%ecx,8), %xmm5
+ pandn 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pandn 69, %xmm5
+ pandn 0x45,%xmm5
+
+// CHECK: pandn 32493, %xmm5
+ pandn 0x7eed,%xmm5
+
+// CHECK: pandn 3133065982, %xmm5
+ pandn 0xbabecafe,%xmm5
+
+// CHECK: pandn 305419896, %xmm5
+ pandn 0x12345678,%xmm5
+
+// CHECK: pandn %xmm5, %xmm5
+ pandn %xmm5,%xmm5
+
+// CHECK: pcmpeqb 3735928559(%ebx,%ecx,8), %mm3
+ pcmpeqb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pcmpeqb 69, %mm3
+ pcmpeqb 0x45,%mm3
+
+// CHECK: pcmpeqb 32493, %mm3
+ pcmpeqb 0x7eed,%mm3
+
+// CHECK: pcmpeqb 3133065982, %mm3
+ pcmpeqb 0xbabecafe,%mm3
+
+// CHECK: pcmpeqb 305419896, %mm3
+ pcmpeqb 0x12345678,%mm3
+
+// CHECK: pcmpeqb %mm3, %mm3
+ pcmpeqb %mm3,%mm3
+
+// CHECK: pcmpeqb 3735928559(%ebx,%ecx,8), %xmm5
+ pcmpeqb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pcmpeqb 69, %xmm5
+ pcmpeqb 0x45,%xmm5
+
+// CHECK: pcmpeqb 32493, %xmm5
+ pcmpeqb 0x7eed,%xmm5
+
+// CHECK: pcmpeqb 3133065982, %xmm5
+ pcmpeqb 0xbabecafe,%xmm5
+
+// CHECK: pcmpeqb 305419896, %xmm5
+ pcmpeqb 0x12345678,%xmm5
+
+// CHECK: pcmpeqb %xmm5, %xmm5
+ pcmpeqb %xmm5,%xmm5
+
+// CHECK: pcmpeqw 3735928559(%ebx,%ecx,8), %mm3
+ pcmpeqw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pcmpeqw 69, %mm3
+ pcmpeqw 0x45,%mm3
+
+// CHECK: pcmpeqw 32493, %mm3
+ pcmpeqw 0x7eed,%mm3
+
+// CHECK: pcmpeqw 3133065982, %mm3
+ pcmpeqw 0xbabecafe,%mm3
+
+// CHECK: pcmpeqw 305419896, %mm3
+ pcmpeqw 0x12345678,%mm3
+
+// CHECK: pcmpeqw %mm3, %mm3
+ pcmpeqw %mm3,%mm3
+
+// CHECK: pcmpeqw 3735928559(%ebx,%ecx,8), %xmm5
+ pcmpeqw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pcmpeqw 69, %xmm5
+ pcmpeqw 0x45,%xmm5
+
+// CHECK: pcmpeqw 32493, %xmm5
+ pcmpeqw 0x7eed,%xmm5
+
+// CHECK: pcmpeqw 3133065982, %xmm5
+ pcmpeqw 0xbabecafe,%xmm5
+
+// CHECK: pcmpeqw 305419896, %xmm5
+ pcmpeqw 0x12345678,%xmm5
+
+// CHECK: pcmpeqw %xmm5, %xmm5
+ pcmpeqw %xmm5,%xmm5
+
+// CHECK: pcmpeqd 3735928559(%ebx,%ecx,8), %mm3
+ pcmpeqd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pcmpeqd 69, %mm3
+ pcmpeqd 0x45,%mm3
+
+// CHECK: pcmpeqd 32493, %mm3
+ pcmpeqd 0x7eed,%mm3
+
+// CHECK: pcmpeqd 3133065982, %mm3
+ pcmpeqd 0xbabecafe,%mm3
+
+// CHECK: pcmpeqd 305419896, %mm3
+ pcmpeqd 0x12345678,%mm3
+
+// CHECK: pcmpeqd %mm3, %mm3
+ pcmpeqd %mm3,%mm3
+
+// CHECK: pcmpeqd 3735928559(%ebx,%ecx,8), %xmm5
+ pcmpeqd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pcmpeqd 69, %xmm5
+ pcmpeqd 0x45,%xmm5
+
+// CHECK: pcmpeqd 32493, %xmm5
+ pcmpeqd 0x7eed,%xmm5
+
+// CHECK: pcmpeqd 3133065982, %xmm5
+ pcmpeqd 0xbabecafe,%xmm5
+
+// CHECK: pcmpeqd 305419896, %xmm5
+ pcmpeqd 0x12345678,%xmm5
+
+// CHECK: pcmpeqd %xmm5, %xmm5
+ pcmpeqd %xmm5,%xmm5
+
+// CHECK: pcmpgtb 3735928559(%ebx,%ecx,8), %mm3
+ pcmpgtb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pcmpgtb 69, %mm3
+ pcmpgtb 0x45,%mm3
+
+// CHECK: pcmpgtb 32493, %mm3
+ pcmpgtb 0x7eed,%mm3
+
+// CHECK: pcmpgtb 3133065982, %mm3
+ pcmpgtb 0xbabecafe,%mm3
+
+// CHECK: pcmpgtb 305419896, %mm3
+ pcmpgtb 0x12345678,%mm3
+
+// CHECK: pcmpgtb %mm3, %mm3
+ pcmpgtb %mm3,%mm3
+
+// CHECK: pcmpgtb 3735928559(%ebx,%ecx,8), %xmm5
+ pcmpgtb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pcmpgtb 69, %xmm5
+ pcmpgtb 0x45,%xmm5
+
+// CHECK: pcmpgtb 32493, %xmm5
+ pcmpgtb 0x7eed,%xmm5
+
+// CHECK: pcmpgtb 3133065982, %xmm5
+ pcmpgtb 0xbabecafe,%xmm5
+
+// CHECK: pcmpgtb 305419896, %xmm5
+ pcmpgtb 0x12345678,%xmm5
+
+// CHECK: pcmpgtb %xmm5, %xmm5
+ pcmpgtb %xmm5,%xmm5
+
+// CHECK: pcmpgtw 3735928559(%ebx,%ecx,8), %mm3
+ pcmpgtw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pcmpgtw 69, %mm3
+ pcmpgtw 0x45,%mm3
+
+// CHECK: pcmpgtw 32493, %mm3
+ pcmpgtw 0x7eed,%mm3
+
+// CHECK: pcmpgtw 3133065982, %mm3
+ pcmpgtw 0xbabecafe,%mm3
+
+// CHECK: pcmpgtw 305419896, %mm3
+ pcmpgtw 0x12345678,%mm3
+
+// CHECK: pcmpgtw %mm3, %mm3
+ pcmpgtw %mm3,%mm3
+
+// CHECK: pcmpgtw 3735928559(%ebx,%ecx,8), %xmm5
+ pcmpgtw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pcmpgtw 69, %xmm5
+ pcmpgtw 0x45,%xmm5
+
+// CHECK: pcmpgtw 32493, %xmm5
+ pcmpgtw 0x7eed,%xmm5
+
+// CHECK: pcmpgtw 3133065982, %xmm5
+ pcmpgtw 0xbabecafe,%xmm5
+
+// CHECK: pcmpgtw 305419896, %xmm5
+ pcmpgtw 0x12345678,%xmm5
+
+// CHECK: pcmpgtw %xmm5, %xmm5
+ pcmpgtw %xmm5,%xmm5
+
+// CHECK: pcmpgtd 3735928559(%ebx,%ecx,8), %mm3
+ pcmpgtd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pcmpgtd 69, %mm3
+ pcmpgtd 0x45,%mm3
+
+// CHECK: pcmpgtd 32493, %mm3
+ pcmpgtd 0x7eed,%mm3
+
+// CHECK: pcmpgtd 3133065982, %mm3
+ pcmpgtd 0xbabecafe,%mm3
+
+// CHECK: pcmpgtd 305419896, %mm3
+ pcmpgtd 0x12345678,%mm3
+
+// CHECK: pcmpgtd %mm3, %mm3
+ pcmpgtd %mm3,%mm3
+
+// CHECK: pcmpgtd 3735928559(%ebx,%ecx,8), %xmm5
+ pcmpgtd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pcmpgtd 69, %xmm5
+ pcmpgtd 0x45,%xmm5
+
+// CHECK: pcmpgtd 32493, %xmm5
+ pcmpgtd 0x7eed,%xmm5
+
+// CHECK: pcmpgtd 3133065982, %xmm5
+ pcmpgtd 0xbabecafe,%xmm5
+
+// CHECK: pcmpgtd 305419896, %xmm5
+ pcmpgtd 0x12345678,%xmm5
+
+// CHECK: pcmpgtd %xmm5, %xmm5
+ pcmpgtd %xmm5,%xmm5
+
+// CHECK: pmaddwd 3735928559(%ebx,%ecx,8), %mm3
+ pmaddwd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmaddwd 69, %mm3
+ pmaddwd 0x45,%mm3
+
+// CHECK: pmaddwd 32493, %mm3
+ pmaddwd 0x7eed,%mm3
+
+// CHECK: pmaddwd 3133065982, %mm3
+ pmaddwd 0xbabecafe,%mm3
+
+// CHECK: pmaddwd 305419896, %mm3
+ pmaddwd 0x12345678,%mm3
+
+// CHECK: pmaddwd %mm3, %mm3
+ pmaddwd %mm3,%mm3
+
+// CHECK: pmaddwd 3735928559(%ebx,%ecx,8), %xmm5
+ pmaddwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmaddwd 69, %xmm5
+ pmaddwd 0x45,%xmm5
+
+// CHECK: pmaddwd 32493, %xmm5
+ pmaddwd 0x7eed,%xmm5
+
+// CHECK: pmaddwd 3133065982, %xmm5
+ pmaddwd 0xbabecafe,%xmm5
+
+// CHECK: pmaddwd 305419896, %xmm5
+ pmaddwd 0x12345678,%xmm5
+
+// CHECK: pmaddwd %xmm5, %xmm5
+ pmaddwd %xmm5,%xmm5
+
+// CHECK: pmulhw 3735928559(%ebx,%ecx,8), %mm3
+ pmulhw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmulhw 69, %mm3
+ pmulhw 0x45,%mm3
+
+// CHECK: pmulhw 32493, %mm3
+ pmulhw 0x7eed,%mm3
+
+// CHECK: pmulhw 3133065982, %mm3
+ pmulhw 0xbabecafe,%mm3
+
+// CHECK: pmulhw 305419896, %mm3
+ pmulhw 0x12345678,%mm3
+
+// CHECK: pmulhw %mm3, %mm3
+ pmulhw %mm3,%mm3
+
+// CHECK: pmulhw 3735928559(%ebx,%ecx,8), %xmm5
+ pmulhw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmulhw 69, %xmm5
+ pmulhw 0x45,%xmm5
+
+// CHECK: pmulhw 32493, %xmm5
+ pmulhw 0x7eed,%xmm5
+
+// CHECK: pmulhw 3133065982, %xmm5
+ pmulhw 0xbabecafe,%xmm5
+
+// CHECK: pmulhw 305419896, %xmm5
+ pmulhw 0x12345678,%xmm5
+
+// CHECK: pmulhw %xmm5, %xmm5
+ pmulhw %xmm5,%xmm5
+
+// CHECK: pmullw 3735928559(%ebx,%ecx,8), %mm3
+ pmullw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmullw 69, %mm3
+ pmullw 0x45,%mm3
+
+// CHECK: pmullw 32493, %mm3
+ pmullw 0x7eed,%mm3
+
+// CHECK: pmullw 3133065982, %mm3
+ pmullw 0xbabecafe,%mm3
+
+// CHECK: pmullw 305419896, %mm3
+ pmullw 0x12345678,%mm3
+
+// CHECK: pmullw %mm3, %mm3
+ pmullw %mm3,%mm3
+
+// CHECK: pmullw 3735928559(%ebx,%ecx,8), %xmm5
+ pmullw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmullw 69, %xmm5
+ pmullw 0x45,%xmm5
+
+// CHECK: pmullw 32493, %xmm5
+ pmullw 0x7eed,%xmm5
+
+// CHECK: pmullw 3133065982, %xmm5
+ pmullw 0xbabecafe,%xmm5
+
+// CHECK: pmullw 305419896, %xmm5
+ pmullw 0x12345678,%xmm5
+
+// CHECK: pmullw %xmm5, %xmm5
+ pmullw %xmm5,%xmm5
+
+// CHECK: por 3735928559(%ebx,%ecx,8), %mm3
+ por 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: por 69, %mm3
+ por 0x45,%mm3
+
+// CHECK: por 32493, %mm3
+ por 0x7eed,%mm3
+
+// CHECK: por 3133065982, %mm3
+ por 0xbabecafe,%mm3
+
+// CHECK: por 305419896, %mm3
+ por 0x12345678,%mm3
+
+// CHECK: por %mm3, %mm3
+ por %mm3,%mm3
+
+// CHECK: por 3735928559(%ebx,%ecx,8), %xmm5
+ por 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: por 69, %xmm5
+ por 0x45,%xmm5
+
+// CHECK: por 32493, %xmm5
+ por 0x7eed,%xmm5
+
+// CHECK: por 3133065982, %xmm5
+ por 0xbabecafe,%xmm5
+
+// CHECK: por 305419896, %xmm5
+ por 0x12345678,%xmm5
+
+// CHECK: por %xmm5, %xmm5
+ por %xmm5,%xmm5
+
+// CHECK: psllw 3735928559(%ebx,%ecx,8), %mm3
+ psllw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psllw 69, %mm3
+ psllw 0x45,%mm3
+
+// CHECK: psllw 32493, %mm3
+ psllw 0x7eed,%mm3
+
+// CHECK: psllw 3133065982, %mm3
+ psllw 0xbabecafe,%mm3
+
+// CHECK: psllw 305419896, %mm3
+ psllw 0x12345678,%mm3
+
+// CHECK: psllw %mm3, %mm3
+ psllw %mm3,%mm3
+
+// CHECK: psllw 3735928559(%ebx,%ecx,8), %xmm5
+ psllw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psllw 69, %xmm5
+ psllw 0x45,%xmm5
+
+// CHECK: psllw 32493, %xmm5
+ psllw 0x7eed,%xmm5
+
+// CHECK: psllw 3133065982, %xmm5
+ psllw 0xbabecafe,%xmm5
+
+// CHECK: psllw 305419896, %xmm5
+ psllw 0x12345678,%xmm5
+
+// CHECK: psllw %xmm5, %xmm5
+ psllw %xmm5,%xmm5
+
+// CHECK: psllw $127, %mm3
+ psllw $0x7f,%mm3
+
+// CHECK: psllw $127, %xmm5
+ psllw $0x7f,%xmm5
+
+// CHECK: pslld 3735928559(%ebx,%ecx,8), %mm3
+ pslld 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pslld 69, %mm3
+ pslld 0x45,%mm3
+
+// CHECK: pslld 32493, %mm3
+ pslld 0x7eed,%mm3
+
+// CHECK: pslld 3133065982, %mm3
+ pslld 0xbabecafe,%mm3
+
+// CHECK: pslld 305419896, %mm3
+ pslld 0x12345678,%mm3
+
+// CHECK: pslld %mm3, %mm3
+ pslld %mm3,%mm3
+
+// CHECK: pslld 3735928559(%ebx,%ecx,8), %xmm5
+ pslld 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pslld 69, %xmm5
+ pslld 0x45,%xmm5
+
+// CHECK: pslld 32493, %xmm5
+ pslld 0x7eed,%xmm5
+
+// CHECK: pslld 3133065982, %xmm5
+ pslld 0xbabecafe,%xmm5
+
+// CHECK: pslld 305419896, %xmm5
+ pslld 0x12345678,%xmm5
+
+// CHECK: pslld %xmm5, %xmm5
+ pslld %xmm5,%xmm5
+
+// CHECK: pslld $127, %mm3
+ pslld $0x7f,%mm3
+
+// CHECK: pslld $127, %xmm5
+ pslld $0x7f,%xmm5
+
+// CHECK: psllq 3735928559(%ebx,%ecx,8), %mm3
+ psllq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psllq 69, %mm3
+ psllq 0x45,%mm3
+
+// CHECK: psllq 32493, %mm3
+ psllq 0x7eed,%mm3
+
+// CHECK: psllq 3133065982, %mm3
+ psllq 0xbabecafe,%mm3
+
+// CHECK: psllq 305419896, %mm3
+ psllq 0x12345678,%mm3
+
+// CHECK: psllq %mm3, %mm3
+ psllq %mm3,%mm3
+
+// CHECK: psllq 3735928559(%ebx,%ecx,8), %xmm5
+ psllq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psllq 69, %xmm5
+ psllq 0x45,%xmm5
+
+// CHECK: psllq 32493, %xmm5
+ psllq 0x7eed,%xmm5
+
+// CHECK: psllq 3133065982, %xmm5
+ psllq 0xbabecafe,%xmm5
+
+// CHECK: psllq 305419896, %xmm5
+ psllq 0x12345678,%xmm5
+
+// CHECK: psllq %xmm5, %xmm5
+ psllq %xmm5,%xmm5
+
+// CHECK: psllq $127, %mm3
+ psllq $0x7f,%mm3
+
+// CHECK: psllq $127, %xmm5
+ psllq $0x7f,%xmm5
+
+// CHECK: psraw 3735928559(%ebx,%ecx,8), %mm3
+ psraw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psraw 69, %mm3
+ psraw 0x45,%mm3
+
+// CHECK: psraw 32493, %mm3
+ psraw 0x7eed,%mm3
+
+// CHECK: psraw 3133065982, %mm3
+ psraw 0xbabecafe,%mm3
+
+// CHECK: psraw 305419896, %mm3
+ psraw 0x12345678,%mm3
+
+// CHECK: psraw %mm3, %mm3
+ psraw %mm3,%mm3
+
+// CHECK: psraw 3735928559(%ebx,%ecx,8), %xmm5
+ psraw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psraw 69, %xmm5
+ psraw 0x45,%xmm5
+
+// CHECK: psraw 32493, %xmm5
+ psraw 0x7eed,%xmm5
+
+// CHECK: psraw 3133065982, %xmm5
+ psraw 0xbabecafe,%xmm5
+
+// CHECK: psraw 305419896, %xmm5
+ psraw 0x12345678,%xmm5
+
+// CHECK: psraw %xmm5, %xmm5
+ psraw %xmm5,%xmm5
+
+// CHECK: psraw $127, %mm3
+ psraw $0x7f,%mm3
+
+// CHECK: psraw $127, %xmm5
+ psraw $0x7f,%xmm5
+
+// CHECK: psrad 3735928559(%ebx,%ecx,8), %mm3
+ psrad 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psrad 69, %mm3
+ psrad 0x45,%mm3
+
+// CHECK: psrad 32493, %mm3
+ psrad 0x7eed,%mm3
+
+// CHECK: psrad 3133065982, %mm3
+ psrad 0xbabecafe,%mm3
+
+// CHECK: psrad 305419896, %mm3
+ psrad 0x12345678,%mm3
+
+// CHECK: psrad %mm3, %mm3
+ psrad %mm3,%mm3
+
+// CHECK: psrad 3735928559(%ebx,%ecx,8), %xmm5
+ psrad 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psrad 69, %xmm5
+ psrad 0x45,%xmm5
+
+// CHECK: psrad 32493, %xmm5
+ psrad 0x7eed,%xmm5
+
+// CHECK: psrad 3133065982, %xmm5
+ psrad 0xbabecafe,%xmm5
+
+// CHECK: psrad 305419896, %xmm5
+ psrad 0x12345678,%xmm5
+
+// CHECK: psrad %xmm5, %xmm5
+ psrad %xmm5,%xmm5
+
+// CHECK: psrad $127, %mm3
+ psrad $0x7f,%mm3
+
+// CHECK: psrad $127, %xmm5
+ psrad $0x7f,%xmm5
+
+// CHECK: psrlw 3735928559(%ebx,%ecx,8), %mm3
+ psrlw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psrlw 69, %mm3
+ psrlw 0x45,%mm3
+
+// CHECK: psrlw 32493, %mm3
+ psrlw 0x7eed,%mm3
+
+// CHECK: psrlw 3133065982, %mm3
+ psrlw 0xbabecafe,%mm3
+
+// CHECK: psrlw 305419896, %mm3
+ psrlw 0x12345678,%mm3
+
+// CHECK: psrlw %mm3, %mm3
+ psrlw %mm3,%mm3
+
+// CHECK: psrlw 3735928559(%ebx,%ecx,8), %xmm5
+ psrlw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psrlw 69, %xmm5
+ psrlw 0x45,%xmm5
+
+// CHECK: psrlw 32493, %xmm5
+ psrlw 0x7eed,%xmm5
+
+// CHECK: psrlw 3133065982, %xmm5
+ psrlw 0xbabecafe,%xmm5
+
+// CHECK: psrlw 305419896, %xmm5
+ psrlw 0x12345678,%xmm5
+
+// CHECK: psrlw %xmm5, %xmm5
+ psrlw %xmm5,%xmm5
+
+// CHECK: psrlw $127, %mm3
+ psrlw $0x7f,%mm3
+
+// CHECK: psrlw $127, %xmm5
+ psrlw $0x7f,%xmm5
+
+// CHECK: psrld 3735928559(%ebx,%ecx,8), %mm3
+ psrld 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psrld 69, %mm3
+ psrld 0x45,%mm3
+
+// CHECK: psrld 32493, %mm3
+ psrld 0x7eed,%mm3
+
+// CHECK: psrld 3133065982, %mm3
+ psrld 0xbabecafe,%mm3
+
+// CHECK: psrld 305419896, %mm3
+ psrld 0x12345678,%mm3
+
+// CHECK: psrld %mm3, %mm3
+ psrld %mm3,%mm3
+
+// CHECK: psrld 3735928559(%ebx,%ecx,8), %xmm5
+ psrld 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psrld 69, %xmm5
+ psrld 0x45,%xmm5
+
+// CHECK: psrld 32493, %xmm5
+ psrld 0x7eed,%xmm5
+
+// CHECK: psrld 3133065982, %xmm5
+ psrld 0xbabecafe,%xmm5
+
+// CHECK: psrld 305419896, %xmm5
+ psrld 0x12345678,%xmm5
+
+// CHECK: psrld %xmm5, %xmm5
+ psrld %xmm5,%xmm5
+
+// CHECK: psrld $127, %mm3
+ psrld $0x7f,%mm3
+
+// CHECK: psrld $127, %xmm5
+ psrld $0x7f,%xmm5
+
+// CHECK: psrlq 3735928559(%ebx,%ecx,8), %mm3
+ psrlq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psrlq 69, %mm3
+ psrlq 0x45,%mm3
+
+// CHECK: psrlq 32493, %mm3
+ psrlq 0x7eed,%mm3
+
+// CHECK: psrlq 3133065982, %mm3
+ psrlq 0xbabecafe,%mm3
+
+// CHECK: psrlq 305419896, %mm3
+ psrlq 0x12345678,%mm3
+
+// CHECK: psrlq %mm3, %mm3
+ psrlq %mm3,%mm3
+
+// CHECK: psrlq 3735928559(%ebx,%ecx,8), %xmm5
+ psrlq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psrlq 69, %xmm5
+ psrlq 0x45,%xmm5
+
+// CHECK: psrlq 32493, %xmm5
+ psrlq 0x7eed,%xmm5
+
+// CHECK: psrlq 3133065982, %xmm5
+ psrlq 0xbabecafe,%xmm5
+
+// CHECK: psrlq 305419896, %xmm5
+ psrlq 0x12345678,%xmm5
+
+// CHECK: psrlq %xmm5, %xmm5
+ psrlq %xmm5,%xmm5
+
+// CHECK: psrlq $127, %mm3
+ psrlq $0x7f,%mm3
+
+// CHECK: psrlq $127, %xmm5
+ psrlq $0x7f,%xmm5
+
+// CHECK: psubb 3735928559(%ebx,%ecx,8), %mm3
+ psubb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psubb 69, %mm3
+ psubb 0x45,%mm3
+
+// CHECK: psubb 32493, %mm3
+ psubb 0x7eed,%mm3
+
+// CHECK: psubb 3133065982, %mm3
+ psubb 0xbabecafe,%mm3
+
+// CHECK: psubb 305419896, %mm3
+ psubb 0x12345678,%mm3
+
+// CHECK: psubb %mm3, %mm3
+ psubb %mm3,%mm3
+
+// CHECK: psubb 3735928559(%ebx,%ecx,8), %xmm5
+ psubb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psubb 69, %xmm5
+ psubb 0x45,%xmm5
+
+// CHECK: psubb 32493, %xmm5
+ psubb 0x7eed,%xmm5
+
+// CHECK: psubb 3133065982, %xmm5
+ psubb 0xbabecafe,%xmm5
+
+// CHECK: psubb 305419896, %xmm5
+ psubb 0x12345678,%xmm5
+
+// CHECK: psubb %xmm5, %xmm5
+ psubb %xmm5,%xmm5
+
+// CHECK: psubw 3735928559(%ebx,%ecx,8), %mm3
+ psubw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psubw 69, %mm3
+ psubw 0x45,%mm3
+
+// CHECK: psubw 32493, %mm3
+ psubw 0x7eed,%mm3
+
+// CHECK: psubw 3133065982, %mm3
+ psubw 0xbabecafe,%mm3
+
+// CHECK: psubw 305419896, %mm3
+ psubw 0x12345678,%mm3
+
+// CHECK: psubw %mm3, %mm3
+ psubw %mm3,%mm3
+
+// CHECK: psubw 3735928559(%ebx,%ecx,8), %xmm5
+ psubw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psubw 69, %xmm5
+ psubw 0x45,%xmm5
+
+// CHECK: psubw 32493, %xmm5
+ psubw 0x7eed,%xmm5
+
+// CHECK: psubw 3133065982, %xmm5
+ psubw 0xbabecafe,%xmm5
+
+// CHECK: psubw 305419896, %xmm5
+ psubw 0x12345678,%xmm5
+
+// CHECK: psubw %xmm5, %xmm5
+ psubw %xmm5,%xmm5
+
+// CHECK: psubd 3735928559(%ebx,%ecx,8), %mm3
+ psubd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psubd 69, %mm3
+ psubd 0x45,%mm3
+
+// CHECK: psubd 32493, %mm3
+ psubd 0x7eed,%mm3
+
+// CHECK: psubd 3133065982, %mm3
+ psubd 0xbabecafe,%mm3
+
+// CHECK: psubd 305419896, %mm3
+ psubd 0x12345678,%mm3
+
+// CHECK: psubd %mm3, %mm3
+ psubd %mm3,%mm3
+
+// CHECK: psubd 3735928559(%ebx,%ecx,8), %xmm5
+ psubd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psubd 69, %xmm5
+ psubd 0x45,%xmm5
+
+// CHECK: psubd 32493, %xmm5
+ psubd 0x7eed,%xmm5
+
+// CHECK: psubd 3133065982, %xmm5
+ psubd 0xbabecafe,%xmm5
+
+// CHECK: psubd 305419896, %xmm5
+ psubd 0x12345678,%xmm5
+
+// CHECK: psubd %xmm5, %xmm5
+ psubd %xmm5,%xmm5
+
+// CHECK: psubq 3735928559(%ebx,%ecx,8), %mm3
+ psubq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psubq 69, %mm3
+ psubq 0x45,%mm3
+
+// CHECK: psubq 32493, %mm3
+ psubq 0x7eed,%mm3
+
+// CHECK: psubq 3133065982, %mm3
+ psubq 0xbabecafe,%mm3
+
+// CHECK: psubq 305419896, %mm3
+ psubq 0x12345678,%mm3
+
+// CHECK: psubq %mm3, %mm3
+ psubq %mm3,%mm3
+
+// CHECK: psubq 3735928559(%ebx,%ecx,8), %xmm5
+ psubq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psubq 69, %xmm5
+ psubq 0x45,%xmm5
+
+// CHECK: psubq 32493, %xmm5
+ psubq 0x7eed,%xmm5
+
+// CHECK: psubq 3133065982, %xmm5
+ psubq 0xbabecafe,%xmm5
+
+// CHECK: psubq 305419896, %xmm5
+ psubq 0x12345678,%xmm5
+
+// CHECK: psubq %xmm5, %xmm5
+ psubq %xmm5,%xmm5
+
+// CHECK: psubsb 3735928559(%ebx,%ecx,8), %mm3
+ psubsb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psubsb 69, %mm3
+ psubsb 0x45,%mm3
+
+// CHECK: psubsb 32493, %mm3
+ psubsb 0x7eed,%mm3
+
+// CHECK: psubsb 3133065982, %mm3
+ psubsb 0xbabecafe,%mm3
+
+// CHECK: psubsb 305419896, %mm3
+ psubsb 0x12345678,%mm3
+
+// CHECK: psubsb %mm3, %mm3
+ psubsb %mm3,%mm3
+
+// CHECK: psubsb 3735928559(%ebx,%ecx,8), %xmm5
+ psubsb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psubsb 69, %xmm5
+ psubsb 0x45,%xmm5
+
+// CHECK: psubsb 32493, %xmm5
+ psubsb 0x7eed,%xmm5
+
+// CHECK: psubsb 3133065982, %xmm5
+ psubsb 0xbabecafe,%xmm5
+
+// CHECK: psubsb 305419896, %xmm5
+ psubsb 0x12345678,%xmm5
+
+// CHECK: psubsb %xmm5, %xmm5
+ psubsb %xmm5,%xmm5
+
+// CHECK: psubsw 3735928559(%ebx,%ecx,8), %mm3
+ psubsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psubsw 69, %mm3
+ psubsw 0x45,%mm3
+
+// CHECK: psubsw 32493, %mm3
+ psubsw 0x7eed,%mm3
+
+// CHECK: psubsw 3133065982, %mm3
+ psubsw 0xbabecafe,%mm3
+
+// CHECK: psubsw 305419896, %mm3
+ psubsw 0x12345678,%mm3
+
+// CHECK: psubsw %mm3, %mm3
+ psubsw %mm3,%mm3
+
+// CHECK: psubsw 3735928559(%ebx,%ecx,8), %xmm5
+ psubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psubsw 69, %xmm5
+ psubsw 0x45,%xmm5
+
+// CHECK: psubsw 32493, %xmm5
+ psubsw 0x7eed,%xmm5
+
+// CHECK: psubsw 3133065982, %xmm5
+ psubsw 0xbabecafe,%xmm5
+
+// CHECK: psubsw 305419896, %xmm5
+ psubsw 0x12345678,%xmm5
+
+// CHECK: psubsw %xmm5, %xmm5
+ psubsw %xmm5,%xmm5
+
+// CHECK: psubusb 3735928559(%ebx,%ecx,8), %mm3
+ psubusb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psubusb 69, %mm3
+ psubusb 0x45,%mm3
+
+// CHECK: psubusb 32493, %mm3
+ psubusb 0x7eed,%mm3
+
+// CHECK: psubusb 3133065982, %mm3
+ psubusb 0xbabecafe,%mm3
+
+// CHECK: psubusb 305419896, %mm3
+ psubusb 0x12345678,%mm3
+
+// CHECK: psubusb %mm3, %mm3
+ psubusb %mm3,%mm3
+
+// CHECK: psubusb 3735928559(%ebx,%ecx,8), %xmm5
+ psubusb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psubusb 69, %xmm5
+ psubusb 0x45,%xmm5
+
+// CHECK: psubusb 32493, %xmm5
+ psubusb 0x7eed,%xmm5
+
+// CHECK: psubusb 3133065982, %xmm5
+ psubusb 0xbabecafe,%xmm5
+
+// CHECK: psubusb 305419896, %xmm5
+ psubusb 0x12345678,%xmm5
+
+// CHECK: psubusb %xmm5, %xmm5
+ psubusb %xmm5,%xmm5
+
+// CHECK: psubusw 3735928559(%ebx,%ecx,8), %mm3
+ psubusw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psubusw 69, %mm3
+ psubusw 0x45,%mm3
+
+// CHECK: psubusw 32493, %mm3
+ psubusw 0x7eed,%mm3
+
+// CHECK: psubusw 3133065982, %mm3
+ psubusw 0xbabecafe,%mm3
+
+// CHECK: psubusw 305419896, %mm3
+ psubusw 0x12345678,%mm3
+
+// CHECK: psubusw %mm3, %mm3
+ psubusw %mm3,%mm3
+
+// CHECK: psubusw 3735928559(%ebx,%ecx,8), %xmm5
+ psubusw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psubusw 69, %xmm5
+ psubusw 0x45,%xmm5
+
+// CHECK: psubusw 32493, %xmm5
+ psubusw 0x7eed,%xmm5
+
+// CHECK: psubusw 3133065982, %xmm5
+ psubusw 0xbabecafe,%xmm5
+
+// CHECK: psubusw 305419896, %xmm5
+ psubusw 0x12345678,%xmm5
+
+// CHECK: psubusw %xmm5, %xmm5
+ psubusw %xmm5,%xmm5
+
+// CHECK: punpckhbw 3735928559(%ebx,%ecx,8), %mm3
+ punpckhbw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: punpckhbw 69, %mm3
+ punpckhbw 0x45,%mm3
+
+// CHECK: punpckhbw 32493, %mm3
+ punpckhbw 0x7eed,%mm3
+
+// CHECK: punpckhbw 3133065982, %mm3
+ punpckhbw 0xbabecafe,%mm3
+
+// CHECK: punpckhbw 305419896, %mm3
+ punpckhbw 0x12345678,%mm3
+
+// CHECK: punpckhbw %mm3, %mm3
+ punpckhbw %mm3,%mm3
+
+// CHECK: punpckhbw 3735928559(%ebx,%ecx,8), %xmm5
+ punpckhbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: punpckhbw 69, %xmm5
+ punpckhbw 0x45,%xmm5
+
+// CHECK: punpckhbw 32493, %xmm5
+ punpckhbw 0x7eed,%xmm5
+
+// CHECK: punpckhbw 3133065982, %xmm5
+ punpckhbw 0xbabecafe,%xmm5
+
+// CHECK: punpckhbw 305419896, %xmm5
+ punpckhbw 0x12345678,%xmm5
+
+// CHECK: punpckhbw %xmm5, %xmm5
+ punpckhbw %xmm5,%xmm5
+
+// CHECK: punpckhwd 3735928559(%ebx,%ecx,8), %mm3
+ punpckhwd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: punpckhwd 69, %mm3
+ punpckhwd 0x45,%mm3
+
+// CHECK: punpckhwd 32493, %mm3
+ punpckhwd 0x7eed,%mm3
+
+// CHECK: punpckhwd 3133065982, %mm3
+ punpckhwd 0xbabecafe,%mm3
+
+// CHECK: punpckhwd 305419896, %mm3
+ punpckhwd 0x12345678,%mm3
+
+// CHECK: punpckhwd %mm3, %mm3
+ punpckhwd %mm3,%mm3
+
+// CHECK: punpckhwd 3735928559(%ebx,%ecx,8), %xmm5
+ punpckhwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: punpckhwd 69, %xmm5
+ punpckhwd 0x45,%xmm5
+
+// CHECK: punpckhwd 32493, %xmm5
+ punpckhwd 0x7eed,%xmm5
+
+// CHECK: punpckhwd 3133065982, %xmm5
+ punpckhwd 0xbabecafe,%xmm5
+
+// CHECK: punpckhwd 305419896, %xmm5
+ punpckhwd 0x12345678,%xmm5
+
+// CHECK: punpckhwd %xmm5, %xmm5
+ punpckhwd %xmm5,%xmm5
+
+// CHECK: punpckhdq 3735928559(%ebx,%ecx,8), %mm3
+ punpckhdq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: punpckhdq 69, %mm3
+ punpckhdq 0x45,%mm3
+
+// CHECK: punpckhdq 32493, %mm3
+ punpckhdq 0x7eed,%mm3
+
+// CHECK: punpckhdq 3133065982, %mm3
+ punpckhdq 0xbabecafe,%mm3
+
+// CHECK: punpckhdq 305419896, %mm3
+ punpckhdq 0x12345678,%mm3
+
+// CHECK: punpckhdq %mm3, %mm3
+ punpckhdq %mm3,%mm3
+
+// CHECK: punpckhdq 3735928559(%ebx,%ecx,8), %xmm5
+ punpckhdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: punpckhdq 69, %xmm5
+ punpckhdq 0x45,%xmm5
+
+// CHECK: punpckhdq 32493, %xmm5
+ punpckhdq 0x7eed,%xmm5
+
+// CHECK: punpckhdq 3133065982, %xmm5
+ punpckhdq 0xbabecafe,%xmm5
+
+// CHECK: punpckhdq 305419896, %xmm5
+ punpckhdq 0x12345678,%xmm5
+
+// CHECK: punpckhdq %xmm5, %xmm5
+ punpckhdq %xmm5,%xmm5
+
+// CHECK: punpcklbw 3735928559(%ebx,%ecx,8), %mm3
+ punpcklbw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: punpcklbw 69, %mm3
+ punpcklbw 0x45,%mm3
+
+// CHECK: punpcklbw 32493, %mm3
+ punpcklbw 0x7eed,%mm3
+
+// CHECK: punpcklbw 3133065982, %mm3
+ punpcklbw 0xbabecafe,%mm3
+
+// CHECK: punpcklbw 305419896, %mm3
+ punpcklbw 0x12345678,%mm3
+
+// CHECK: punpcklbw %mm3, %mm3
+ punpcklbw %mm3,%mm3
+
+// CHECK: punpcklbw 3735928559(%ebx,%ecx,8), %xmm5
+ punpcklbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: punpcklbw 69, %xmm5
+ punpcklbw 0x45,%xmm5
+
+// CHECK: punpcklbw 32493, %xmm5
+ punpcklbw 0x7eed,%xmm5
+
+// CHECK: punpcklbw 3133065982, %xmm5
+ punpcklbw 0xbabecafe,%xmm5
+
+// CHECK: punpcklbw 305419896, %xmm5
+ punpcklbw 0x12345678,%xmm5
+
+// CHECK: punpcklbw %xmm5, %xmm5
+ punpcklbw %xmm5,%xmm5
+
+// CHECK: punpcklwd 3735928559(%ebx,%ecx,8), %mm3
+ punpcklwd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: punpcklwd 69, %mm3
+ punpcklwd 0x45,%mm3
+
+// CHECK: punpcklwd 32493, %mm3
+ punpcklwd 0x7eed,%mm3
+
+// CHECK: punpcklwd 3133065982, %mm3
+ punpcklwd 0xbabecafe,%mm3
+
+// CHECK: punpcklwd 305419896, %mm3
+ punpcklwd 0x12345678,%mm3
+
+// CHECK: punpcklwd %mm3, %mm3
+ punpcklwd %mm3,%mm3
+
+// CHECK: punpcklwd 3735928559(%ebx,%ecx,8), %xmm5
+ punpcklwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: punpcklwd 69, %xmm5
+ punpcklwd 0x45,%xmm5
+
+// CHECK: punpcklwd 32493, %xmm5
+ punpcklwd 0x7eed,%xmm5
+
+// CHECK: punpcklwd 3133065982, %xmm5
+ punpcklwd 0xbabecafe,%xmm5
+
+// CHECK: punpcklwd 305419896, %xmm5
+ punpcklwd 0x12345678,%xmm5
+
+// CHECK: punpcklwd %xmm5, %xmm5
+ punpcklwd %xmm5,%xmm5
+
+// CHECK: punpckldq 3735928559(%ebx,%ecx,8), %mm3
+ punpckldq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: punpckldq 69, %mm3
+ punpckldq 0x45,%mm3
+
+// CHECK: punpckldq 32493, %mm3
+ punpckldq 0x7eed,%mm3
+
+// CHECK: punpckldq 3133065982, %mm3
+ punpckldq 0xbabecafe,%mm3
+
+// CHECK: punpckldq 305419896, %mm3
+ punpckldq 0x12345678,%mm3
+
+// CHECK: punpckldq %mm3, %mm3
+ punpckldq %mm3,%mm3
+
+// CHECK: punpckldq 3735928559(%ebx,%ecx,8), %xmm5
+ punpckldq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: punpckldq 69, %xmm5
+ punpckldq 0x45,%xmm5
+
+// CHECK: punpckldq 32493, %xmm5
+ punpckldq 0x7eed,%xmm5
+
+// CHECK: punpckldq 3133065982, %xmm5
+ punpckldq 0xbabecafe,%xmm5
+
+// CHECK: punpckldq 305419896, %xmm5
+ punpckldq 0x12345678,%xmm5
+
+// CHECK: punpckldq %xmm5, %xmm5
+ punpckldq %xmm5,%xmm5
+
+// CHECK: pxor 3735928559(%ebx,%ecx,8), %mm3
+ pxor 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pxor 69, %mm3
+ pxor 0x45,%mm3
+
+// CHECK: pxor 32493, %mm3
+ pxor 0x7eed,%mm3
+
+// CHECK: pxor 3133065982, %mm3
+ pxor 0xbabecafe,%mm3
+
+// CHECK: pxor 305419896, %mm3
+ pxor 0x12345678,%mm3
+
+// CHECK: pxor %mm3, %mm3
+ pxor %mm3,%mm3
+
+// CHECK: pxor 3735928559(%ebx,%ecx,8), %xmm5
+ pxor 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pxor 69, %xmm5
+ pxor 0x45,%xmm5
+
+// CHECK: pxor 32493, %xmm5
+ pxor 0x7eed,%xmm5
+
+// CHECK: pxor 3133065982, %xmm5
+ pxor 0xbabecafe,%xmm5
+
+// CHECK: pxor 305419896, %xmm5
+ pxor 0x12345678,%xmm5
+
+// CHECK: pxor %xmm5, %xmm5
+ pxor %xmm5,%xmm5
+
+// CHECK: addps 3735928559(%ebx,%ecx,8), %xmm5
+ addps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: addps 69, %xmm5
+ addps 0x45,%xmm5
+
+// CHECK: addps 32493, %xmm5
+ addps 0x7eed,%xmm5
+
+// CHECK: addps 3133065982, %xmm5
+ addps 0xbabecafe,%xmm5
+
+// CHECK: addps 305419896, %xmm5
+ addps 0x12345678,%xmm5
+
+// CHECK: addps %xmm5, %xmm5
+ addps %xmm5,%xmm5
+
+// CHECK: addss 3735928559(%ebx,%ecx,8), %xmm5
+ addss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: addss 69, %xmm5
+ addss 0x45,%xmm5
+
+// CHECK: addss 32493, %xmm5
+ addss 0x7eed,%xmm5
+
+// CHECK: addss 3133065982, %xmm5
+ addss 0xbabecafe,%xmm5
+
+// CHECK: addss 305419896, %xmm5
+ addss 0x12345678,%xmm5
+
+// CHECK: addss %xmm5, %xmm5
+ addss %xmm5,%xmm5
+
+// CHECK: andnps 3735928559(%ebx,%ecx,8), %xmm5
+ andnps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: andnps 69, %xmm5
+ andnps 0x45,%xmm5
+
+// CHECK: andnps 32493, %xmm5
+ andnps 0x7eed,%xmm5
+
+// CHECK: andnps 3133065982, %xmm5
+ andnps 0xbabecafe,%xmm5
+
+// CHECK: andnps 305419896, %xmm5
+ andnps 0x12345678,%xmm5
+
+// CHECK: andnps %xmm5, %xmm5
+ andnps %xmm5,%xmm5
+
+// CHECK: andps 3735928559(%ebx,%ecx,8), %xmm5
+ andps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: andps 69, %xmm5
+ andps 0x45,%xmm5
+
+// CHECK: andps 32493, %xmm5
+ andps 0x7eed,%xmm5
+
+// CHECK: andps 3133065982, %xmm5
+ andps 0xbabecafe,%xmm5
+
+// CHECK: andps 305419896, %xmm5
+ andps 0x12345678,%xmm5
+
+// CHECK: andps %xmm5, %xmm5
+ andps %xmm5,%xmm5
+
+// CHECK: comiss 3735928559(%ebx,%ecx,8), %xmm5
+ comiss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: comiss 69, %xmm5
+ comiss 0x45,%xmm5
+
+// CHECK: comiss 32493, %xmm5
+ comiss 0x7eed,%xmm5
+
+// CHECK: comiss 3133065982, %xmm5
+ comiss 0xbabecafe,%xmm5
+
+// CHECK: comiss 305419896, %xmm5
+ comiss 0x12345678,%xmm5
+
+// CHECK: comiss %xmm5, %xmm5
+ comiss %xmm5,%xmm5
+
+// CHECK: cvtpi2ps 3735928559(%ebx,%ecx,8), %xmm5
+ cvtpi2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtpi2ps 69, %xmm5
+ cvtpi2ps 0x45,%xmm5
+
+// CHECK: cvtpi2ps 32493, %xmm5
+ cvtpi2ps 0x7eed,%xmm5
+
+// CHECK: cvtpi2ps 3133065982, %xmm5
+ cvtpi2ps 0xbabecafe,%xmm5
+
+// CHECK: cvtpi2ps 305419896, %xmm5
+ cvtpi2ps 0x12345678,%xmm5
+
+// CHECK: cvtpi2ps %mm3, %xmm5
+ cvtpi2ps %mm3,%xmm5
+
+// CHECK: cvtps2pi 3735928559(%ebx,%ecx,8), %mm3
+ cvtps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: cvtps2pi 69, %mm3
+ cvtps2pi 0x45,%mm3
+
+// CHECK: cvtps2pi 32493, %mm3
+ cvtps2pi 0x7eed,%mm3
+
+// CHECK: cvtps2pi 3133065982, %mm3
+ cvtps2pi 0xbabecafe,%mm3
+
+// CHECK: cvtps2pi 305419896, %mm3
+ cvtps2pi 0x12345678,%mm3
+
+// CHECK: cvtps2pi %xmm5, %mm3
+ cvtps2pi %xmm5,%mm3
+
+// CHECK: cvtsi2ss %ecx, %xmm5
+ cvtsi2ss %ecx,%xmm5
+
+// CHECK: cvtsi2ss 3735928559(%ebx,%ecx,8), %xmm5
+ cvtsi2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtsi2ss 69, %xmm5
+ cvtsi2ss 0x45,%xmm5
+
+// CHECK: cvtsi2ss 32493, %xmm5
+ cvtsi2ss 0x7eed,%xmm5
+
+// CHECK: cvtsi2ss 3133065982, %xmm5
+ cvtsi2ss 0xbabecafe,%xmm5
+
+// CHECK: cvtsi2ss 305419896, %xmm5
+ cvtsi2ss 0x12345678,%xmm5
+
+// CHECK: cvttps2pi 3735928559(%ebx,%ecx,8), %mm3
+ cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: cvttps2pi 69, %mm3
+ cvttps2pi 0x45,%mm3
+
+// CHECK: cvttps2pi 32493, %mm3
+ cvttps2pi 0x7eed,%mm3
+
+// CHECK: cvttps2pi 3133065982, %mm3
+ cvttps2pi 0xbabecafe,%mm3
+
+// CHECK: cvttps2pi 305419896, %mm3
+ cvttps2pi 0x12345678,%mm3
+
+// CHECK: cvttps2pi %xmm5, %mm3
+ cvttps2pi %xmm5,%mm3
+
+// CHECK: cvttss2si 3735928559(%ebx,%ecx,8), %ecx
+ cvttss2si 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: cvttss2si 69, %ecx
+ cvttss2si 0x45,%ecx
+
+// CHECK: cvttss2si 32493, %ecx
+ cvttss2si 0x7eed,%ecx
+
+// CHECK: cvttss2si 3133065982, %ecx
+ cvttss2si 0xbabecafe,%ecx
+
+// CHECK: cvttss2si 305419896, %ecx
+ cvttss2si 0x12345678,%ecx
+
+// CHECK: cvttss2si %xmm5, %ecx
+ cvttss2si %xmm5,%ecx
+
+// CHECK: divps 3735928559(%ebx,%ecx,8), %xmm5
+ divps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: divps 69, %xmm5
+ divps 0x45,%xmm5
+
+// CHECK: divps 32493, %xmm5
+ divps 0x7eed,%xmm5
+
+// CHECK: divps 3133065982, %xmm5
+ divps 0xbabecafe,%xmm5
+
+// CHECK: divps 305419896, %xmm5
+ divps 0x12345678,%xmm5
+
+// CHECK: divps %xmm5, %xmm5
+ divps %xmm5,%xmm5
+
+// CHECK: divss 3735928559(%ebx,%ecx,8), %xmm5
+ divss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: divss 69, %xmm5
+ divss 0x45,%xmm5
+
+// CHECK: divss 32493, %xmm5
+ divss 0x7eed,%xmm5
+
+// CHECK: divss 3133065982, %xmm5
+ divss 0xbabecafe,%xmm5
+
+// CHECK: divss 305419896, %xmm5
+ divss 0x12345678,%xmm5
+
+// CHECK: divss %xmm5, %xmm5
+ divss %xmm5,%xmm5
+
+// CHECK: ldmxcsr 3735928559(%ebx,%ecx,8)
+ ldmxcsr 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: ldmxcsr 32493
+ ldmxcsr 0x7eed
+
+// CHECK: ldmxcsr 3133065982
+ ldmxcsr 0xbabecafe
+
+// CHECK: ldmxcsr 305419896
+ ldmxcsr 0x12345678
+
+// CHECK: maskmovq %mm3, %mm3
+ maskmovq %mm3,%mm3
+
+// CHECK: maxps 3735928559(%ebx,%ecx,8), %xmm5
+ maxps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: maxps 69, %xmm5
+ maxps 0x45,%xmm5
+
+// CHECK: maxps 32493, %xmm5
+ maxps 0x7eed,%xmm5
+
+// CHECK: maxps 3133065982, %xmm5
+ maxps 0xbabecafe,%xmm5
+
+// CHECK: maxps 305419896, %xmm5
+ maxps 0x12345678,%xmm5
+
+// CHECK: maxps %xmm5, %xmm5
+ maxps %xmm5,%xmm5
+
+// CHECK: maxss 3735928559(%ebx,%ecx,8), %xmm5
+ maxss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: maxss 69, %xmm5
+ maxss 0x45,%xmm5
+
+// CHECK: maxss 32493, %xmm5
+ maxss 0x7eed,%xmm5
+
+// CHECK: maxss 3133065982, %xmm5
+ maxss 0xbabecafe,%xmm5
+
+// CHECK: maxss 305419896, %xmm5
+ maxss 0x12345678,%xmm5
+
+// CHECK: maxss %xmm5, %xmm5
+ maxss %xmm5,%xmm5
+
+// CHECK: minps 3735928559(%ebx,%ecx,8), %xmm5
+ minps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: minps 69, %xmm5
+ minps 0x45,%xmm5
+
+// CHECK: minps 32493, %xmm5
+ minps 0x7eed,%xmm5
+
+// CHECK: minps 3133065982, %xmm5
+ minps 0xbabecafe,%xmm5
+
+// CHECK: minps 305419896, %xmm5
+ minps 0x12345678,%xmm5
+
+// CHECK: minps %xmm5, %xmm5
+ minps %xmm5,%xmm5
+
+// CHECK: minss 3735928559(%ebx,%ecx,8), %xmm5
+ minss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: minss 69, %xmm5
+ minss 0x45,%xmm5
+
+// CHECK: minss 32493, %xmm5
+ minss 0x7eed,%xmm5
+
+// CHECK: minss 3133065982, %xmm5
+ minss 0xbabecafe,%xmm5
+
+// CHECK: minss 305419896, %xmm5
+ minss 0x12345678,%xmm5
+
+// CHECK: minss %xmm5, %xmm5
+ minss %xmm5,%xmm5
+
+// CHECK: movaps 3735928559(%ebx,%ecx,8), %xmm5
+ movaps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movaps 69, %xmm5
+ movaps 0x45,%xmm5
+
+// CHECK: movaps 32493, %xmm5
+ movaps 0x7eed,%xmm5
+
+// CHECK: movaps 3133065982, %xmm5
+ movaps 0xbabecafe,%xmm5
+
+// CHECK: movaps 305419896, %xmm5
+ movaps 0x12345678,%xmm5
+
+// CHECK: movaps %xmm5, %xmm5
+ movaps %xmm5,%xmm5
+
+// CHECK: movaps %xmm5, 3735928559(%ebx,%ecx,8)
+ movaps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movaps %xmm5, 69
+ movaps %xmm5,0x45
+
+// CHECK: movaps %xmm5, 32493
+ movaps %xmm5,0x7eed
+
+// CHECK: movaps %xmm5, 3133065982
+ movaps %xmm5,0xbabecafe
+
+// CHECK: movaps %xmm5, 305419896
+ movaps %xmm5,0x12345678
+
+// CHECK: movaps %xmm5, %xmm5
+ movaps %xmm5,%xmm5
+
+// CHECK: movhlps %xmm5, %xmm5
+ movhlps %xmm5,%xmm5
+
+// CHECK: movhps 3735928559(%ebx,%ecx,8), %xmm5
+ movhps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movhps 69, %xmm5
+ movhps 0x45,%xmm5
+
+// CHECK: movhps 32493, %xmm5
+ movhps 0x7eed,%xmm5
+
+// CHECK: movhps 3133065982, %xmm5
+ movhps 0xbabecafe,%xmm5
+
+// CHECK: movhps 305419896, %xmm5
+ movhps 0x12345678,%xmm5
+
+// CHECK: movhps %xmm5, 3735928559(%ebx,%ecx,8)
+ movhps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movhps %xmm5, 69
+ movhps %xmm5,0x45
+
+// CHECK: movhps %xmm5, 32493
+ movhps %xmm5,0x7eed
+
+// CHECK: movhps %xmm5, 3133065982
+ movhps %xmm5,0xbabecafe
+
+// CHECK: movhps %xmm5, 305419896
+ movhps %xmm5,0x12345678
+
+// CHECK: movlhps %xmm5, %xmm5
+ movlhps %xmm5,%xmm5
+
+// CHECK: movlps 3735928559(%ebx,%ecx,8), %xmm5
+ movlps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movlps 69, %xmm5
+ movlps 0x45,%xmm5
+
+// CHECK: movlps 32493, %xmm5
+ movlps 0x7eed,%xmm5
+
+// CHECK: movlps 3133065982, %xmm5
+ movlps 0xbabecafe,%xmm5
+
+// CHECK: movlps 305419896, %xmm5
+ movlps 0x12345678,%xmm5
+
+// CHECK: movlps %xmm5, 3735928559(%ebx,%ecx,8)
+ movlps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movlps %xmm5, 69
+ movlps %xmm5,0x45
+
+// CHECK: movlps %xmm5, 32493
+ movlps %xmm5,0x7eed
+
+// CHECK: movlps %xmm5, 3133065982
+ movlps %xmm5,0xbabecafe
+
+// CHECK: movlps %xmm5, 305419896
+ movlps %xmm5,0x12345678
+
+// CHECK: movmskps %xmm5, %ecx
+ movmskps %xmm5,%ecx
+
+// CHECK: movntps %xmm5, 3735928559(%ebx,%ecx,8)
+ movntps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movntps %xmm5, 69
+ movntps %xmm5,0x45
+
+// CHECK: movntps %xmm5, 32493
+ movntps %xmm5,0x7eed
+
+// CHECK: movntps %xmm5, 3133065982
+ movntps %xmm5,0xbabecafe
+
+// CHECK: movntps %xmm5, 305419896
+ movntps %xmm5,0x12345678
+
+// CHECK: movntq %mm3, 3735928559(%ebx,%ecx,8)
+ movntq %mm3,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movntq %mm3, 69
+ movntq %mm3,0x45
+
+// CHECK: movntq %mm3, 32493
+ movntq %mm3,0x7eed
+
+// CHECK: movntq %mm3, 3133065982
+ movntq %mm3,0xbabecafe
+
+// CHECK: movntq %mm3, 305419896
+ movntq %mm3,0x12345678
+
+// CHECK: movntdq %xmm5, 3735928559(%ebx,%ecx,8)
+ movntdq %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movntdq %xmm5, 69
+ movntdq %xmm5,0x45
+
+// CHECK: movntdq %xmm5, 32493
+ movntdq %xmm5,0x7eed
+
+// CHECK: movntdq %xmm5, 3133065982
+ movntdq %xmm5,0xbabecafe
+
+// CHECK: movntdq %xmm5, 305419896
+ movntdq %xmm5,0x12345678
+
+// CHECK: movss 3735928559(%ebx,%ecx,8), %xmm5
+ movss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movss 69, %xmm5
+ movss 0x45,%xmm5
+
+// CHECK: movss 32493, %xmm5
+ movss 0x7eed,%xmm5
+
+// CHECK: movss 3133065982, %xmm5
+ movss 0xbabecafe,%xmm5
+
+// CHECK: movss 305419896, %xmm5
+ movss 0x12345678,%xmm5
+
+// CHECK: movss %xmm5, %xmm5
+ movss %xmm5,%xmm5
+
+// CHECK: movss %xmm5, 3735928559(%ebx,%ecx,8)
+ movss %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movss %xmm5, 69
+ movss %xmm5,0x45
+
+// CHECK: movss %xmm5, 32493
+ movss %xmm5,0x7eed
+
+// CHECK: movss %xmm5, 3133065982
+ movss %xmm5,0xbabecafe
+
+// CHECK: movss %xmm5, 305419896
+ movss %xmm5,0x12345678
+
+// CHECK: movss %xmm5, %xmm5
+ movss %xmm5,%xmm5
+
+// CHECK: movups 3735928559(%ebx,%ecx,8), %xmm5
+ movups 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movups 69, %xmm5
+ movups 0x45,%xmm5
+
+// CHECK: movups 32493, %xmm5
+ movups 0x7eed,%xmm5
+
+// CHECK: movups 3133065982, %xmm5
+ movups 0xbabecafe,%xmm5
+
+// CHECK: movups 305419896, %xmm5
+ movups 0x12345678,%xmm5
+
+// CHECK: movups %xmm5, %xmm5
+ movups %xmm5,%xmm5
+
+// CHECK: movups %xmm5, 3735928559(%ebx,%ecx,8)
+ movups %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movups %xmm5, 69
+ movups %xmm5,0x45
+
+// CHECK: movups %xmm5, 32493
+ movups %xmm5,0x7eed
+
+// CHECK: movups %xmm5, 3133065982
+ movups %xmm5,0xbabecafe
+
+// CHECK: movups %xmm5, 305419896
+ movups %xmm5,0x12345678
+
+// CHECK: movups %xmm5, %xmm5
+ movups %xmm5,%xmm5
+
+// CHECK: mulps 3735928559(%ebx,%ecx,8), %xmm5
+ mulps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: mulps 69, %xmm5
+ mulps 0x45,%xmm5
+
+// CHECK: mulps 32493, %xmm5
+ mulps 0x7eed,%xmm5
+
+// CHECK: mulps 3133065982, %xmm5
+ mulps 0xbabecafe,%xmm5
+
+// CHECK: mulps 305419896, %xmm5
+ mulps 0x12345678,%xmm5
+
+// CHECK: mulps %xmm5, %xmm5
+ mulps %xmm5,%xmm5
+
+// CHECK: mulss 3735928559(%ebx,%ecx,8), %xmm5
+ mulss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: mulss 69, %xmm5
+ mulss 0x45,%xmm5
+
+// CHECK: mulss 32493, %xmm5
+ mulss 0x7eed,%xmm5
+
+// CHECK: mulss 3133065982, %xmm5
+ mulss 0xbabecafe,%xmm5
+
+// CHECK: mulss 305419896, %xmm5
+ mulss 0x12345678,%xmm5
+
+// CHECK: mulss %xmm5, %xmm5
+ mulss %xmm5,%xmm5
+
+// CHECK: orps 3735928559(%ebx,%ecx,8), %xmm5
+ orps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: orps 69, %xmm5
+ orps 0x45,%xmm5
+
+// CHECK: orps 32493, %xmm5
+ orps 0x7eed,%xmm5
+
+// CHECK: orps 3133065982, %xmm5
+ orps 0xbabecafe,%xmm5
+
+// CHECK: orps 305419896, %xmm5
+ orps 0x12345678,%xmm5
+
+// CHECK: orps %xmm5, %xmm5
+ orps %xmm5,%xmm5
+
+// CHECK: pavgb 3735928559(%ebx,%ecx,8), %mm3
+ pavgb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pavgb 69, %mm3
+ pavgb 0x45,%mm3
+
+// CHECK: pavgb 32493, %mm3
+ pavgb 0x7eed,%mm3
+
+// CHECK: pavgb 3133065982, %mm3
+ pavgb 0xbabecafe,%mm3
+
+// CHECK: pavgb 305419896, %mm3
+ pavgb 0x12345678,%mm3
+
+// CHECK: pavgb %mm3, %mm3
+ pavgb %mm3,%mm3
+
+// CHECK: pavgb 3735928559(%ebx,%ecx,8), %xmm5
+ pavgb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pavgb 69, %xmm5
+ pavgb 0x45,%xmm5
+
+// CHECK: pavgb 32493, %xmm5
+ pavgb 0x7eed,%xmm5
+
+// CHECK: pavgb 3133065982, %xmm5
+ pavgb 0xbabecafe,%xmm5
+
+// CHECK: pavgb 305419896, %xmm5
+ pavgb 0x12345678,%xmm5
+
+// CHECK: pavgb %xmm5, %xmm5
+ pavgb %xmm5,%xmm5
+
+// CHECK: pavgw 3735928559(%ebx,%ecx,8), %mm3
+ pavgw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pavgw 69, %mm3
+ pavgw 0x45,%mm3
+
+// CHECK: pavgw 32493, %mm3
+ pavgw 0x7eed,%mm3
+
+// CHECK: pavgw 3133065982, %mm3
+ pavgw 0xbabecafe,%mm3
+
+// CHECK: pavgw 305419896, %mm3
+ pavgw 0x12345678,%mm3
+
+// CHECK: pavgw %mm3, %mm3
+ pavgw %mm3,%mm3
+
+// CHECK: pavgw 3735928559(%ebx,%ecx,8), %xmm5
+ pavgw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pavgw 69, %xmm5
+ pavgw 0x45,%xmm5
+
+// CHECK: pavgw 32493, %xmm5
+ pavgw 0x7eed,%xmm5
+
+// CHECK: pavgw 3133065982, %xmm5
+ pavgw 0xbabecafe,%xmm5
+
+// CHECK: pavgw 305419896, %xmm5
+ pavgw 0x12345678,%xmm5
+
+// CHECK: pavgw %xmm5, %xmm5
+ pavgw %xmm5,%xmm5
+
+// CHECK: pmaxsw 3735928559(%ebx,%ecx,8), %mm3
+ pmaxsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmaxsw 69, %mm3
+ pmaxsw 0x45,%mm3
+
+// CHECK: pmaxsw 32493, %mm3
+ pmaxsw 0x7eed,%mm3
+
+// CHECK: pmaxsw 3133065982, %mm3
+ pmaxsw 0xbabecafe,%mm3
+
+// CHECK: pmaxsw 305419896, %mm3
+ pmaxsw 0x12345678,%mm3
+
+// CHECK: pmaxsw %mm3, %mm3
+ pmaxsw %mm3,%mm3
+
+// CHECK: pmaxsw 3735928559(%ebx,%ecx,8), %xmm5
+ pmaxsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmaxsw 69, %xmm5
+ pmaxsw 0x45,%xmm5
+
+// CHECK: pmaxsw 32493, %xmm5
+ pmaxsw 0x7eed,%xmm5
+
+// CHECK: pmaxsw 3133065982, %xmm5
+ pmaxsw 0xbabecafe,%xmm5
+
+// CHECK: pmaxsw 305419896, %xmm5
+ pmaxsw 0x12345678,%xmm5
+
+// CHECK: pmaxsw %xmm5, %xmm5
+ pmaxsw %xmm5,%xmm5
+
+// CHECK: pmaxub 3735928559(%ebx,%ecx,8), %mm3
+ pmaxub 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmaxub 69, %mm3
+ pmaxub 0x45,%mm3
+
+// CHECK: pmaxub 32493, %mm3
+ pmaxub 0x7eed,%mm3
+
+// CHECK: pmaxub 3133065982, %mm3
+ pmaxub 0xbabecafe,%mm3
+
+// CHECK: pmaxub 305419896, %mm3
+ pmaxub 0x12345678,%mm3
+
+// CHECK: pmaxub %mm3, %mm3
+ pmaxub %mm3,%mm3
+
+// CHECK: pmaxub 3735928559(%ebx,%ecx,8), %xmm5
+ pmaxub 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmaxub 69, %xmm5
+ pmaxub 0x45,%xmm5
+
+// CHECK: pmaxub 32493, %xmm5
+ pmaxub 0x7eed,%xmm5
+
+// CHECK: pmaxub 3133065982, %xmm5
+ pmaxub 0xbabecafe,%xmm5
+
+// CHECK: pmaxub 305419896, %xmm5
+ pmaxub 0x12345678,%xmm5
+
+// CHECK: pmaxub %xmm5, %xmm5
+ pmaxub %xmm5,%xmm5
+
+// CHECK: pminsw 3735928559(%ebx,%ecx,8), %mm3
+ pminsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pminsw 69, %mm3
+ pminsw 0x45,%mm3
+
+// CHECK: pminsw 32493, %mm3
+ pminsw 0x7eed,%mm3
+
+// CHECK: pminsw 3133065982, %mm3
+ pminsw 0xbabecafe,%mm3
+
+// CHECK: pminsw 305419896, %mm3
+ pminsw 0x12345678,%mm3
+
+// CHECK: pminsw %mm3, %mm3
+ pminsw %mm3,%mm3
+
+// CHECK: pminsw 3735928559(%ebx,%ecx,8), %xmm5
+ pminsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pminsw 69, %xmm5
+ pminsw 0x45,%xmm5
+
+// CHECK: pminsw 32493, %xmm5
+ pminsw 0x7eed,%xmm5
+
+// CHECK: pminsw 3133065982, %xmm5
+ pminsw 0xbabecafe,%xmm5
+
+// CHECK: pminsw 305419896, %xmm5
+ pminsw 0x12345678,%xmm5
+
+// CHECK: pminsw %xmm5, %xmm5
+ pminsw %xmm5,%xmm5
+
+// CHECK: pminub 3735928559(%ebx,%ecx,8), %mm3
+ pminub 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pminub 69, %mm3
+ pminub 0x45,%mm3
+
+// CHECK: pminub 32493, %mm3
+ pminub 0x7eed,%mm3
+
+// CHECK: pminub 3133065982, %mm3
+ pminub 0xbabecafe,%mm3
+
+// CHECK: pminub 305419896, %mm3
+ pminub 0x12345678,%mm3
+
+// CHECK: pminub %mm3, %mm3
+ pminub %mm3,%mm3
+
+// CHECK: pminub 3735928559(%ebx,%ecx,8), %xmm5
+ pminub 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pminub 69, %xmm5
+ pminub 0x45,%xmm5
+
+// CHECK: pminub 32493, %xmm5
+ pminub 0x7eed,%xmm5
+
+// CHECK: pminub 3133065982, %xmm5
+ pminub 0xbabecafe,%xmm5
+
+// CHECK: pminub 305419896, %xmm5
+ pminub 0x12345678,%xmm5
+
+// CHECK: pminub %xmm5, %xmm5
+ pminub %xmm5,%xmm5
+
+// CHECK: pmovmskb %mm3, %ecx
+ pmovmskb %mm3,%ecx
+
+// CHECK: pmovmskb %xmm5, %ecx
+ pmovmskb %xmm5,%ecx
+
+// CHECK: pmulhuw 3735928559(%ebx,%ecx,8), %mm3
+ pmulhuw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmulhuw 69, %mm3
+ pmulhuw 0x45,%mm3
+
+// CHECK: pmulhuw 32493, %mm3
+ pmulhuw 0x7eed,%mm3
+
+// CHECK: pmulhuw 3133065982, %mm3
+ pmulhuw 0xbabecafe,%mm3
+
+// CHECK: pmulhuw 305419896, %mm3
+ pmulhuw 0x12345678,%mm3
+
+// CHECK: pmulhuw %mm3, %mm3
+ pmulhuw %mm3,%mm3
+
+// CHECK: pmulhuw 3735928559(%ebx,%ecx,8), %xmm5
+ pmulhuw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmulhuw 69, %xmm5
+ pmulhuw 0x45,%xmm5
+
+// CHECK: pmulhuw 32493, %xmm5
+ pmulhuw 0x7eed,%xmm5
+
+// CHECK: pmulhuw 3133065982, %xmm5
+ pmulhuw 0xbabecafe,%xmm5
+
+// CHECK: pmulhuw 305419896, %xmm5
+ pmulhuw 0x12345678,%xmm5
+
+// CHECK: pmulhuw %xmm5, %xmm5
+ pmulhuw %xmm5,%xmm5
+
+// CHECK: prefetchnta 3735928559(%ebx,%ecx,8)
+ prefetchnta 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: prefetchnta 32493
+ prefetchnta 0x7eed
+
+// CHECK: prefetchnta 3133065982
+ prefetchnta 0xbabecafe
+
+// CHECK: prefetchnta 305419896
+ prefetchnta 0x12345678
+
+// CHECK: prefetcht0 3735928559(%ebx,%ecx,8)
+ prefetcht0 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: prefetcht0 32493
+ prefetcht0 0x7eed
+
+// CHECK: prefetcht0 3133065982
+ prefetcht0 0xbabecafe
+
+// CHECK: prefetcht0 305419896
+ prefetcht0 0x12345678
+
+// CHECK: prefetcht1 3735928559(%ebx,%ecx,8)
+ prefetcht1 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: prefetcht1 32493
+ prefetcht1 0x7eed
+
+// CHECK: prefetcht1 3133065982
+ prefetcht1 0xbabecafe
+
+// CHECK: prefetcht1 305419896
+ prefetcht1 0x12345678
+
+// CHECK: prefetcht2 3735928559(%ebx,%ecx,8)
+ prefetcht2 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: prefetcht2 32493
+ prefetcht2 0x7eed
+
+// CHECK: prefetcht2 3133065982
+ prefetcht2 0xbabecafe
+
+// CHECK: prefetcht2 305419896
+ prefetcht2 0x12345678
+
+// CHECK: psadbw 3735928559(%ebx,%ecx,8), %mm3
+ psadbw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psadbw 69, %mm3
+ psadbw 0x45,%mm3
+
+// CHECK: psadbw 32493, %mm3
+ psadbw 0x7eed,%mm3
+
+// CHECK: psadbw 3133065982, %mm3
+ psadbw 0xbabecafe,%mm3
+
+// CHECK: psadbw 305419896, %mm3
+ psadbw 0x12345678,%mm3
+
+// CHECK: psadbw %mm3, %mm3
+ psadbw %mm3,%mm3
+
+// CHECK: psadbw 3735928559(%ebx,%ecx,8), %xmm5
+ psadbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psadbw 69, %xmm5
+ psadbw 0x45,%xmm5
+
+// CHECK: psadbw 32493, %xmm5
+ psadbw 0x7eed,%xmm5
+
+// CHECK: psadbw 3133065982, %xmm5
+ psadbw 0xbabecafe,%xmm5
+
+// CHECK: psadbw 305419896, %xmm5
+ psadbw 0x12345678,%xmm5
+
+// CHECK: psadbw %xmm5, %xmm5
+ psadbw %xmm5,%xmm5
+
+// CHECK: rcpps 3735928559(%ebx,%ecx,8), %xmm5
+ rcpps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: rcpps 69, %xmm5
+ rcpps 0x45,%xmm5
+
+// CHECK: rcpps 32493, %xmm5
+ rcpps 0x7eed,%xmm5
+
+// CHECK: rcpps 3133065982, %xmm5
+ rcpps 0xbabecafe,%xmm5
+
+// CHECK: rcpps 305419896, %xmm5
+ rcpps 0x12345678,%xmm5
+
+// CHECK: rcpps %xmm5, %xmm5
+ rcpps %xmm5,%xmm5
+
+// CHECK: rcpss 3735928559(%ebx,%ecx,8), %xmm5
+ rcpss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: rcpss 69, %xmm5
+ rcpss 0x45,%xmm5
+
+// CHECK: rcpss 32493, %xmm5
+ rcpss 0x7eed,%xmm5
+
+// CHECK: rcpss 3133065982, %xmm5
+ rcpss 0xbabecafe,%xmm5
+
+// CHECK: rcpss 305419896, %xmm5
+ rcpss 0x12345678,%xmm5
+
+// CHECK: rcpss %xmm5, %xmm5
+ rcpss %xmm5,%xmm5
+
+// CHECK: rsqrtps 3735928559(%ebx,%ecx,8), %xmm5
+ rsqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: rsqrtps 69, %xmm5
+ rsqrtps 0x45,%xmm5
+
+// CHECK: rsqrtps 32493, %xmm5
+ rsqrtps 0x7eed,%xmm5
+
+// CHECK: rsqrtps 3133065982, %xmm5
+ rsqrtps 0xbabecafe,%xmm5
+
+// CHECK: rsqrtps 305419896, %xmm5
+ rsqrtps 0x12345678,%xmm5
+
+// CHECK: rsqrtps %xmm5, %xmm5
+ rsqrtps %xmm5,%xmm5
+
+// CHECK: rsqrtss 3735928559(%ebx,%ecx,8), %xmm5
+ rsqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: rsqrtss 69, %xmm5
+ rsqrtss 0x45,%xmm5
+
+// CHECK: rsqrtss 32493, %xmm5
+ rsqrtss 0x7eed,%xmm5
+
+// CHECK: rsqrtss 3133065982, %xmm5
+ rsqrtss 0xbabecafe,%xmm5
+
+// CHECK: rsqrtss 305419896, %xmm5
+ rsqrtss 0x12345678,%xmm5
+
+// CHECK: rsqrtss %xmm5, %xmm5
+ rsqrtss %xmm5,%xmm5
+
+// CHECK: sfence
+ sfence
+
+// CHECK: sqrtps 3735928559(%ebx,%ecx,8), %xmm5
+ sqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: sqrtps 69, %xmm5
+ sqrtps 0x45,%xmm5
+
+// CHECK: sqrtps 32493, %xmm5
+ sqrtps 0x7eed,%xmm5
+
+// CHECK: sqrtps 3133065982, %xmm5
+ sqrtps 0xbabecafe,%xmm5
+
+// CHECK: sqrtps 305419896, %xmm5
+ sqrtps 0x12345678,%xmm5
+
+// CHECK: sqrtps %xmm5, %xmm5
+ sqrtps %xmm5,%xmm5
+
+// CHECK: sqrtss 3735928559(%ebx,%ecx,8), %xmm5
+ sqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: sqrtss 69, %xmm5
+ sqrtss 0x45,%xmm5
+
+// CHECK: sqrtss 32493, %xmm5
+ sqrtss 0x7eed,%xmm5
+
+// CHECK: sqrtss 3133065982, %xmm5
+ sqrtss 0xbabecafe,%xmm5
+
+// CHECK: sqrtss 305419896, %xmm5
+ sqrtss 0x12345678,%xmm5
+
+// CHECK: sqrtss %xmm5, %xmm5
+ sqrtss %xmm5,%xmm5
+
+// CHECK: stmxcsr 3735928559(%ebx,%ecx,8)
+ stmxcsr 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: stmxcsr 32493
+ stmxcsr 0x7eed
+
+// CHECK: stmxcsr 3133065982
+ stmxcsr 0xbabecafe
+
+// CHECK: stmxcsr 305419896
+ stmxcsr 0x12345678
+
+// CHECK: subps 3735928559(%ebx,%ecx,8), %xmm5
+ subps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: subps 69, %xmm5
+ subps 0x45,%xmm5
+
+// CHECK: subps 32493, %xmm5
+ subps 0x7eed,%xmm5
+
+// CHECK: subps 3133065982, %xmm5
+ subps 0xbabecafe,%xmm5
+
+// CHECK: subps 305419896, %xmm5
+ subps 0x12345678,%xmm5
+
+// CHECK: subps %xmm5, %xmm5
+ subps %xmm5,%xmm5
+
+// CHECK: subss 3735928559(%ebx,%ecx,8), %xmm5
+ subss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: subss 69, %xmm5
+ subss 0x45,%xmm5
+
+// CHECK: subss 32493, %xmm5
+ subss 0x7eed,%xmm5
+
+// CHECK: subss 3133065982, %xmm5
+ subss 0xbabecafe,%xmm5
+
+// CHECK: subss 305419896, %xmm5
+ subss 0x12345678,%xmm5
+
+// CHECK: subss %xmm5, %xmm5
+ subss %xmm5,%xmm5
+
+// CHECK: ucomiss 3735928559(%ebx,%ecx,8), %xmm5
+ ucomiss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: ucomiss 69, %xmm5
+ ucomiss 0x45,%xmm5
+
+// CHECK: ucomiss 32493, %xmm5
+ ucomiss 0x7eed,%xmm5
+
+// CHECK: ucomiss 3133065982, %xmm5
+ ucomiss 0xbabecafe,%xmm5
+
+// CHECK: ucomiss 305419896, %xmm5
+ ucomiss 0x12345678,%xmm5
+
+// CHECK: ucomiss %xmm5, %xmm5
+ ucomiss %xmm5,%xmm5
+
+// CHECK: unpckhps 3735928559(%ebx,%ecx,8), %xmm5
+ unpckhps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: unpckhps 69, %xmm5
+ unpckhps 0x45,%xmm5
+
+// CHECK: unpckhps 32493, %xmm5
+ unpckhps 0x7eed,%xmm5
+
+// CHECK: unpckhps 3133065982, %xmm5
+ unpckhps 0xbabecafe,%xmm5
+
+// CHECK: unpckhps 305419896, %xmm5
+ unpckhps 0x12345678,%xmm5
+
+// CHECK: unpckhps %xmm5, %xmm5
+ unpckhps %xmm5,%xmm5
+
+// CHECK: unpcklps 3735928559(%ebx,%ecx,8), %xmm5
+ unpcklps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: unpcklps 69, %xmm5
+ unpcklps 0x45,%xmm5
+
+// CHECK: unpcklps 32493, %xmm5
+ unpcklps 0x7eed,%xmm5
+
+// CHECK: unpcklps 3133065982, %xmm5
+ unpcklps 0xbabecafe,%xmm5
+
+// CHECK: unpcklps 305419896, %xmm5
+ unpcklps 0x12345678,%xmm5
+
+// CHECK: unpcklps %xmm5, %xmm5
+ unpcklps %xmm5,%xmm5
+
+// CHECK: xorps 3735928559(%ebx,%ecx,8), %xmm5
+ xorps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: xorps 69, %xmm5
+ xorps 0x45,%xmm5
+
+// CHECK: xorps 32493, %xmm5
+ xorps 0x7eed,%xmm5
+
+// CHECK: xorps 3133065982, %xmm5
+ xorps 0xbabecafe,%xmm5
+
+// CHECK: xorps 305419896, %xmm5
+ xorps 0x12345678,%xmm5
+
+// CHECK: xorps %xmm5, %xmm5
+ xorps %xmm5,%xmm5
+
+// CHECK: addpd 3735928559(%ebx,%ecx,8), %xmm5
+ addpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: addpd 69, %xmm5
+ addpd 0x45,%xmm5
+
+// CHECK: addpd 32493, %xmm5
+ addpd 0x7eed,%xmm5
+
+// CHECK: addpd 3133065982, %xmm5
+ addpd 0xbabecafe,%xmm5
+
+// CHECK: addpd 305419896, %xmm5
+ addpd 0x12345678,%xmm5
+
+// CHECK: addpd %xmm5, %xmm5
+ addpd %xmm5,%xmm5
+
+// CHECK: addsd 3735928559(%ebx,%ecx,8), %xmm5
+ addsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: addsd 69, %xmm5
+ addsd 0x45,%xmm5
+
+// CHECK: addsd 32493, %xmm5
+ addsd 0x7eed,%xmm5
+
+// CHECK: addsd 3133065982, %xmm5
+ addsd 0xbabecafe,%xmm5
+
+// CHECK: addsd 305419896, %xmm5
+ addsd 0x12345678,%xmm5
+
+// CHECK: addsd %xmm5, %xmm5
+ addsd %xmm5,%xmm5
+
+// CHECK: andnpd 3735928559(%ebx,%ecx,8), %xmm5
+ andnpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: andnpd 69, %xmm5
+ andnpd 0x45,%xmm5
+
+// CHECK: andnpd 32493, %xmm5
+ andnpd 0x7eed,%xmm5
+
+// CHECK: andnpd 3133065982, %xmm5
+ andnpd 0xbabecafe,%xmm5
+
+// CHECK: andnpd 305419896, %xmm5
+ andnpd 0x12345678,%xmm5
+
+// CHECK: andnpd %xmm5, %xmm5
+ andnpd %xmm5,%xmm5
+
+// CHECK: andpd 3735928559(%ebx,%ecx,8), %xmm5
+ andpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: andpd 69, %xmm5
+ andpd 0x45,%xmm5
+
+// CHECK: andpd 32493, %xmm5
+ andpd 0x7eed,%xmm5
+
+// CHECK: andpd 3133065982, %xmm5
+ andpd 0xbabecafe,%xmm5
+
+// CHECK: andpd 305419896, %xmm5
+ andpd 0x12345678,%xmm5
+
+// CHECK: andpd %xmm5, %xmm5
+ andpd %xmm5,%xmm5
+
+// CHECK: comisd 3735928559(%ebx,%ecx,8), %xmm5
+ comisd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: comisd 69, %xmm5
+ comisd 0x45,%xmm5
+
+// CHECK: comisd 32493, %xmm5
+ comisd 0x7eed,%xmm5
+
+// CHECK: comisd 3133065982, %xmm5
+ comisd 0xbabecafe,%xmm5
+
+// CHECK: comisd 305419896, %xmm5
+ comisd 0x12345678,%xmm5
+
+// CHECK: comisd %xmm5, %xmm5
+ comisd %xmm5,%xmm5
+
+// CHECK: cvtpi2pd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtpi2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtpi2pd 69, %xmm5
+ cvtpi2pd 0x45,%xmm5
+
+// CHECK: cvtpi2pd 32493, %xmm5
+ cvtpi2pd 0x7eed,%xmm5
+
+// CHECK: cvtpi2pd 3133065982, %xmm5
+ cvtpi2pd 0xbabecafe,%xmm5
+
+// CHECK: cvtpi2pd 305419896, %xmm5
+ cvtpi2pd 0x12345678,%xmm5
+
+// CHECK: cvtpi2pd %mm3, %xmm5
+ cvtpi2pd %mm3,%xmm5
+
+// CHECK: cvtsi2sd %ecx, %xmm5
+ cvtsi2sd %ecx,%xmm5
+
+// CHECK: cvtsi2sd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtsi2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtsi2sd 69, %xmm5
+ cvtsi2sd 0x45,%xmm5
+
+// CHECK: cvtsi2sd 32493, %xmm5
+ cvtsi2sd 0x7eed,%xmm5
+
+// CHECK: cvtsi2sd 3133065982, %xmm5
+ cvtsi2sd 0xbabecafe,%xmm5
+
+// CHECK: cvtsi2sd 305419896, %xmm5
+ cvtsi2sd 0x12345678,%xmm5
+
+// CHECK: divpd 3735928559(%ebx,%ecx,8), %xmm5
+ divpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: divpd 69, %xmm5
+ divpd 0x45,%xmm5
+
+// CHECK: divpd 32493, %xmm5
+ divpd 0x7eed,%xmm5
+
+// CHECK: divpd 3133065982, %xmm5
+ divpd 0xbabecafe,%xmm5
+
+// CHECK: divpd 305419896, %xmm5
+ divpd 0x12345678,%xmm5
+
+// CHECK: divpd %xmm5, %xmm5
+ divpd %xmm5,%xmm5
+
+// CHECK: divsd 3735928559(%ebx,%ecx,8), %xmm5
+ divsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: divsd 69, %xmm5
+ divsd 0x45,%xmm5
+
+// CHECK: divsd 32493, %xmm5
+ divsd 0x7eed,%xmm5
+
+// CHECK: divsd 3133065982, %xmm5
+ divsd 0xbabecafe,%xmm5
+
+// CHECK: divsd 305419896, %xmm5
+ divsd 0x12345678,%xmm5
+
+// CHECK: divsd %xmm5, %xmm5
+ divsd %xmm5,%xmm5
+
+// CHECK: maxpd 3735928559(%ebx,%ecx,8), %xmm5
+ maxpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: maxpd 69, %xmm5
+ maxpd 0x45,%xmm5
+
+// CHECK: maxpd 32493, %xmm5
+ maxpd 0x7eed,%xmm5
+
+// CHECK: maxpd 3133065982, %xmm5
+ maxpd 0xbabecafe,%xmm5
+
+// CHECK: maxpd 305419896, %xmm5
+ maxpd 0x12345678,%xmm5
+
+// CHECK: maxpd %xmm5, %xmm5
+ maxpd %xmm5,%xmm5
+
+// CHECK: maxsd 3735928559(%ebx,%ecx,8), %xmm5
+ maxsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: maxsd 69, %xmm5
+ maxsd 0x45,%xmm5
+
+// CHECK: maxsd 32493, %xmm5
+ maxsd 0x7eed,%xmm5
+
+// CHECK: maxsd 3133065982, %xmm5
+ maxsd 0xbabecafe,%xmm5
+
+// CHECK: maxsd 305419896, %xmm5
+ maxsd 0x12345678,%xmm5
+
+// CHECK: maxsd %xmm5, %xmm5
+ maxsd %xmm5,%xmm5
+
+// CHECK: minpd 3735928559(%ebx,%ecx,8), %xmm5
+ minpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: minpd 69, %xmm5
+ minpd 0x45,%xmm5
+
+// CHECK: minpd 32493, %xmm5
+ minpd 0x7eed,%xmm5
+
+// CHECK: minpd 3133065982, %xmm5
+ minpd 0xbabecafe,%xmm5
+
+// CHECK: minpd 305419896, %xmm5
+ minpd 0x12345678,%xmm5
+
+// CHECK: minpd %xmm5, %xmm5
+ minpd %xmm5,%xmm5
+
+// CHECK: minsd 3735928559(%ebx,%ecx,8), %xmm5
+ minsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: minsd 69, %xmm5
+ minsd 0x45,%xmm5
+
+// CHECK: minsd 32493, %xmm5
+ minsd 0x7eed,%xmm5
+
+// CHECK: minsd 3133065982, %xmm5
+ minsd 0xbabecafe,%xmm5
+
+// CHECK: minsd 305419896, %xmm5
+ minsd 0x12345678,%xmm5
+
+// CHECK: minsd %xmm5, %xmm5
+ minsd %xmm5,%xmm5
+
+// CHECK: movapd 3735928559(%ebx,%ecx,8), %xmm5
+ movapd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movapd 69, %xmm5
+ movapd 0x45,%xmm5
+
+// CHECK: movapd 32493, %xmm5
+ movapd 0x7eed,%xmm5
+
+// CHECK: movapd 3133065982, %xmm5
+ movapd 0xbabecafe,%xmm5
+
+// CHECK: movapd 305419896, %xmm5
+ movapd 0x12345678,%xmm5
+
+// CHECK: movapd %xmm5, %xmm5
+ movapd %xmm5,%xmm5
+
+// CHECK: movapd %xmm5, 3735928559(%ebx,%ecx,8)
+ movapd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movapd %xmm5, 69
+ movapd %xmm5,0x45
+
+// CHECK: movapd %xmm5, 32493
+ movapd %xmm5,0x7eed
+
+// CHECK: movapd %xmm5, 3133065982
+ movapd %xmm5,0xbabecafe
+
+// CHECK: movapd %xmm5, 305419896
+ movapd %xmm5,0x12345678
+
+// CHECK: movapd %xmm5, %xmm5
+ movapd %xmm5,%xmm5
+
+// CHECK: movhpd 3735928559(%ebx,%ecx,8), %xmm5
+ movhpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movhpd 69, %xmm5
+ movhpd 0x45,%xmm5
+
+// CHECK: movhpd 32493, %xmm5
+ movhpd 0x7eed,%xmm5
+
+// CHECK: movhpd 3133065982, %xmm5
+ movhpd 0xbabecafe,%xmm5
+
+// CHECK: movhpd 305419896, %xmm5
+ movhpd 0x12345678,%xmm5
+
+// CHECK: movhpd %xmm5, 3735928559(%ebx,%ecx,8)
+ movhpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movhpd %xmm5, 69
+ movhpd %xmm5,0x45
+
+// CHECK: movhpd %xmm5, 32493
+ movhpd %xmm5,0x7eed
+
+// CHECK: movhpd %xmm5, 3133065982
+ movhpd %xmm5,0xbabecafe
+
+// CHECK: movhpd %xmm5, 305419896
+ movhpd %xmm5,0x12345678
+
+// CHECK: movlpd 3735928559(%ebx,%ecx,8), %xmm5
+ movlpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movlpd 69, %xmm5
+ movlpd 0x45,%xmm5
+
+// CHECK: movlpd 32493, %xmm5
+ movlpd 0x7eed,%xmm5
+
+// CHECK: movlpd 3133065982, %xmm5
+ movlpd 0xbabecafe,%xmm5
+
+// CHECK: movlpd 305419896, %xmm5
+ movlpd 0x12345678,%xmm5
+
+// CHECK: movlpd %xmm5, 3735928559(%ebx,%ecx,8)
+ movlpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movlpd %xmm5, 69
+ movlpd %xmm5,0x45
+
+// CHECK: movlpd %xmm5, 32493
+ movlpd %xmm5,0x7eed
+
+// CHECK: movlpd %xmm5, 3133065982
+ movlpd %xmm5,0xbabecafe
+
+// CHECK: movlpd %xmm5, 305419896
+ movlpd %xmm5,0x12345678
+
+// CHECK: movmskpd %xmm5, %ecx
+ movmskpd %xmm5,%ecx
+
+// CHECK: movntpd %xmm5, 3735928559(%ebx,%ecx,8)
+ movntpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movntpd %xmm5, 69
+ movntpd %xmm5,0x45
+
+// CHECK: movntpd %xmm5, 32493
+ movntpd %xmm5,0x7eed
+
+// CHECK: movntpd %xmm5, 3133065982
+ movntpd %xmm5,0xbabecafe
+
+// CHECK: movntpd %xmm5, 305419896
+ movntpd %xmm5,0x12345678
+
+// CHECK: movsd 3735928559(%ebx,%ecx,8), %xmm5
+ movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movsd 69, %xmm5
+ movsd 0x45,%xmm5
+
+// CHECK: movsd 32493, %xmm5
+ movsd 0x7eed,%xmm5
+
+// CHECK: movsd 3133065982, %xmm5
+ movsd 0xbabecafe,%xmm5
+
+// CHECK: movsd 305419896, %xmm5
+ movsd 0x12345678,%xmm5
+
+// CHECK: movsd %xmm5, %xmm5
+ movsd %xmm5,%xmm5
+
+// CHECK: movsd %xmm5, 3735928559(%ebx,%ecx,8)
+ movsd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movsd %xmm5, 69
+ movsd %xmm5,0x45
+
+// CHECK: movsd %xmm5, 32493
+ movsd %xmm5,0x7eed
+
+// CHECK: movsd %xmm5, 3133065982
+ movsd %xmm5,0xbabecafe
+
+// CHECK: movsd %xmm5, 305419896
+ movsd %xmm5,0x12345678
+
+// CHECK: movsd %xmm5, %xmm5
+ movsd %xmm5,%xmm5
+
+// CHECK: movupd 3735928559(%ebx,%ecx,8), %xmm5
+ movupd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movupd 69, %xmm5
+ movupd 0x45,%xmm5
+
+// CHECK: movupd 32493, %xmm5
+ movupd 0x7eed,%xmm5
+
+// CHECK: movupd 3133065982, %xmm5
+ movupd 0xbabecafe,%xmm5
+
+// CHECK: movupd 305419896, %xmm5
+ movupd 0x12345678,%xmm5
+
+// CHECK: movupd %xmm5, %xmm5
+ movupd %xmm5,%xmm5
+
+// CHECK: movupd %xmm5, 3735928559(%ebx,%ecx,8)
+ movupd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movupd %xmm5, 69
+ movupd %xmm5,0x45
+
+// CHECK: movupd %xmm5, 32493
+ movupd %xmm5,0x7eed
+
+// CHECK: movupd %xmm5, 3133065982
+ movupd %xmm5,0xbabecafe
+
+// CHECK: movupd %xmm5, 305419896
+ movupd %xmm5,0x12345678
+
+// CHECK: movupd %xmm5, %xmm5
+ movupd %xmm5,%xmm5
+
+// CHECK: mulpd 3735928559(%ebx,%ecx,8), %xmm5
+ mulpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: mulpd 69, %xmm5
+ mulpd 0x45,%xmm5
+
+// CHECK: mulpd 32493, %xmm5
+ mulpd 0x7eed,%xmm5
+
+// CHECK: mulpd 3133065982, %xmm5
+ mulpd 0xbabecafe,%xmm5
+
+// CHECK: mulpd 305419896, %xmm5
+ mulpd 0x12345678,%xmm5
+
+// CHECK: mulpd %xmm5, %xmm5
+ mulpd %xmm5,%xmm5
+
+// CHECK: mulsd 3735928559(%ebx,%ecx,8), %xmm5
+ mulsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: mulsd 69, %xmm5
+ mulsd 0x45,%xmm5
+
+// CHECK: mulsd 32493, %xmm5
+ mulsd 0x7eed,%xmm5
+
+// CHECK: mulsd 3133065982, %xmm5
+ mulsd 0xbabecafe,%xmm5
+
+// CHECK: mulsd 305419896, %xmm5
+ mulsd 0x12345678,%xmm5
+
+// CHECK: mulsd %xmm5, %xmm5
+ mulsd %xmm5,%xmm5
+
+// CHECK: orpd 3735928559(%ebx,%ecx,8), %xmm5
+ orpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: orpd 69, %xmm5
+ orpd 0x45,%xmm5
+
+// CHECK: orpd 32493, %xmm5
+ orpd 0x7eed,%xmm5
+
+// CHECK: orpd 3133065982, %xmm5
+ orpd 0xbabecafe,%xmm5
+
+// CHECK: orpd 305419896, %xmm5
+ orpd 0x12345678,%xmm5
+
+// CHECK: orpd %xmm5, %xmm5
+ orpd %xmm5,%xmm5
+
+// CHECK: sqrtpd 3735928559(%ebx,%ecx,8), %xmm5
+ sqrtpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: sqrtpd 69, %xmm5
+ sqrtpd 0x45,%xmm5
+
+// CHECK: sqrtpd 32493, %xmm5
+ sqrtpd 0x7eed,%xmm5
+
+// CHECK: sqrtpd 3133065982, %xmm5
+ sqrtpd 0xbabecafe,%xmm5
+
+// CHECK: sqrtpd 305419896, %xmm5
+ sqrtpd 0x12345678,%xmm5
+
+// CHECK: sqrtpd %xmm5, %xmm5
+ sqrtpd %xmm5,%xmm5
+
+// CHECK: sqrtsd 3735928559(%ebx,%ecx,8), %xmm5
+ sqrtsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: sqrtsd 69, %xmm5
+ sqrtsd 0x45,%xmm5
+
+// CHECK: sqrtsd 32493, %xmm5
+ sqrtsd 0x7eed,%xmm5
+
+// CHECK: sqrtsd 3133065982, %xmm5
+ sqrtsd 0xbabecafe,%xmm5
+
+// CHECK: sqrtsd 305419896, %xmm5
+ sqrtsd 0x12345678,%xmm5
+
+// CHECK: sqrtsd %xmm5, %xmm5
+ sqrtsd %xmm5,%xmm5
+
+// CHECK: subpd 3735928559(%ebx,%ecx,8), %xmm5
+ subpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: subpd 69, %xmm5
+ subpd 0x45,%xmm5
+
+// CHECK: subpd 32493, %xmm5
+ subpd 0x7eed,%xmm5
+
+// CHECK: subpd 3133065982, %xmm5
+ subpd 0xbabecafe,%xmm5
+
+// CHECK: subpd 305419896, %xmm5
+ subpd 0x12345678,%xmm5
+
+// CHECK: subpd %xmm5, %xmm5
+ subpd %xmm5,%xmm5
+
+// CHECK: subsd 3735928559(%ebx,%ecx,8), %xmm5
+ subsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: subsd 69, %xmm5
+ subsd 0x45,%xmm5
+
+// CHECK: subsd 32493, %xmm5
+ subsd 0x7eed,%xmm5
+
+// CHECK: subsd 3133065982, %xmm5
+ subsd 0xbabecafe,%xmm5
+
+// CHECK: subsd 305419896, %xmm5
+ subsd 0x12345678,%xmm5
+
+// CHECK: subsd %xmm5, %xmm5
+ subsd %xmm5,%xmm5
+
+// CHECK: ucomisd 3735928559(%ebx,%ecx,8), %xmm5
+ ucomisd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: ucomisd 69, %xmm5
+ ucomisd 0x45,%xmm5
+
+// CHECK: ucomisd 32493, %xmm5
+ ucomisd 0x7eed,%xmm5
+
+// CHECK: ucomisd 3133065982, %xmm5
+ ucomisd 0xbabecafe,%xmm5
+
+// CHECK: ucomisd 305419896, %xmm5
+ ucomisd 0x12345678,%xmm5
+
+// CHECK: ucomisd %xmm5, %xmm5
+ ucomisd %xmm5,%xmm5
+
+// CHECK: unpckhpd 3735928559(%ebx,%ecx,8), %xmm5
+ unpckhpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: unpckhpd 69, %xmm5
+ unpckhpd 0x45,%xmm5
+
+// CHECK: unpckhpd 32493, %xmm5
+ unpckhpd 0x7eed,%xmm5
+
+// CHECK: unpckhpd 3133065982, %xmm5
+ unpckhpd 0xbabecafe,%xmm5
+
+// CHECK: unpckhpd 305419896, %xmm5
+ unpckhpd 0x12345678,%xmm5
+
+// CHECK: unpckhpd %xmm5, %xmm5
+ unpckhpd %xmm5,%xmm5
+
+// CHECK: unpcklpd 3735928559(%ebx,%ecx,8), %xmm5
+ unpcklpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: unpcklpd 69, %xmm5
+ unpcklpd 0x45,%xmm5
+
+// CHECK: unpcklpd 32493, %xmm5
+ unpcklpd 0x7eed,%xmm5
+
+// CHECK: unpcklpd 3133065982, %xmm5
+ unpcklpd 0xbabecafe,%xmm5
+
+// CHECK: unpcklpd 305419896, %xmm5
+ unpcklpd 0x12345678,%xmm5
+
+// CHECK: unpcklpd %xmm5, %xmm5
+ unpcklpd %xmm5,%xmm5
+
+// CHECK: xorpd 3735928559(%ebx,%ecx,8), %xmm5
+ xorpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: xorpd 69, %xmm5
+ xorpd 0x45,%xmm5
+
+// CHECK: xorpd 32493, %xmm5
+ xorpd 0x7eed,%xmm5
+
+// CHECK: xorpd 3133065982, %xmm5
+ xorpd 0xbabecafe,%xmm5
+
+// CHECK: xorpd 305419896, %xmm5
+ xorpd 0x12345678,%xmm5
+
+// CHECK: xorpd %xmm5, %xmm5
+ xorpd %xmm5,%xmm5
+
+// CHECK: cvtdq2pd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtdq2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtdq2pd 69, %xmm5
+ cvtdq2pd 0x45,%xmm5
+
+// CHECK: cvtdq2pd 32493, %xmm5
+ cvtdq2pd 0x7eed,%xmm5
+
+// CHECK: cvtdq2pd 3133065982, %xmm5
+ cvtdq2pd 0xbabecafe,%xmm5
+
+// CHECK: cvtdq2pd 305419896, %xmm5
+ cvtdq2pd 0x12345678,%xmm5
+
+// CHECK: cvtdq2pd %xmm5, %xmm5
+ cvtdq2pd %xmm5,%xmm5
+
+// CHECK: cvtpd2dq 3735928559(%ebx,%ecx,8), %xmm5
+ cvtpd2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtpd2dq 69, %xmm5
+ cvtpd2dq 0x45,%xmm5
+
+// CHECK: cvtpd2dq 32493, %xmm5
+ cvtpd2dq 0x7eed,%xmm5
+
+// CHECK: cvtpd2dq 3133065982, %xmm5
+ cvtpd2dq 0xbabecafe,%xmm5
+
+// CHECK: cvtpd2dq 305419896, %xmm5
+ cvtpd2dq 0x12345678,%xmm5
+
+// CHECK: cvtpd2dq %xmm5, %xmm5
+ cvtpd2dq %xmm5,%xmm5
+
+// CHECK: cvtdq2ps 3735928559(%ebx,%ecx,8), %xmm5
+ cvtdq2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtdq2ps 69, %xmm5
+ cvtdq2ps 0x45,%xmm5
+
+// CHECK: cvtdq2ps 32493, %xmm5
+ cvtdq2ps 0x7eed,%xmm5
+
+// CHECK: cvtdq2ps 3133065982, %xmm5
+ cvtdq2ps 0xbabecafe,%xmm5
+
+// CHECK: cvtdq2ps 305419896, %xmm5
+ cvtdq2ps 0x12345678,%xmm5
+
+// CHECK: cvtdq2ps %xmm5, %xmm5
+ cvtdq2ps %xmm5,%xmm5
+
+// CHECK: cvtpd2pi 3735928559(%ebx,%ecx,8), %mm3
+ cvtpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: cvtpd2pi 69, %mm3
+ cvtpd2pi 0x45,%mm3
+
+// CHECK: cvtpd2pi 32493, %mm3
+ cvtpd2pi 0x7eed,%mm3
+
+// CHECK: cvtpd2pi 3133065982, %mm3
+ cvtpd2pi 0xbabecafe,%mm3
+
+// CHECK: cvtpd2pi 305419896, %mm3
+ cvtpd2pi 0x12345678,%mm3
+
+// CHECK: cvtpd2pi %xmm5, %mm3
+ cvtpd2pi %xmm5,%mm3
+
+// CHECK: cvtpd2ps 3735928559(%ebx,%ecx,8), %xmm5
+ cvtpd2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtpd2ps 69, %xmm5
+ cvtpd2ps 0x45,%xmm5
+
+// CHECK: cvtpd2ps 32493, %xmm5
+ cvtpd2ps 0x7eed,%xmm5
+
+// CHECK: cvtpd2ps 3133065982, %xmm5
+ cvtpd2ps 0xbabecafe,%xmm5
+
+// CHECK: cvtpd2ps 305419896, %xmm5
+ cvtpd2ps 0x12345678,%xmm5
+
+// CHECK: cvtpd2ps %xmm5, %xmm5
+ cvtpd2ps %xmm5,%xmm5
+
+// CHECK: cvtps2pd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtps2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtps2pd 69, %xmm5
+ cvtps2pd 0x45,%xmm5
+
+// CHECK: cvtps2pd 32493, %xmm5
+ cvtps2pd 0x7eed,%xmm5
+
+// CHECK: cvtps2pd 3133065982, %xmm5
+ cvtps2pd 0xbabecafe,%xmm5
+
+// CHECK: cvtps2pd 305419896, %xmm5
+ cvtps2pd 0x12345678,%xmm5
+
+// CHECK: cvtps2pd %xmm5, %xmm5
+ cvtps2pd %xmm5,%xmm5
+
+// CHECK: cvtps2dq 3735928559(%ebx,%ecx,8), %xmm5
+ cvtps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtps2dq 69, %xmm5
+ cvtps2dq 0x45,%xmm5
+
+// CHECK: cvtps2dq 32493, %xmm5
+ cvtps2dq 0x7eed,%xmm5
+
+// CHECK: cvtps2dq 3133065982, %xmm5
+ cvtps2dq 0xbabecafe,%xmm5
+
+// CHECK: cvtps2dq 305419896, %xmm5
+ cvtps2dq 0x12345678,%xmm5
+
+// CHECK: cvtps2dq %xmm5, %xmm5
+ cvtps2dq %xmm5,%xmm5
+
+// CHECK: cvtsd2ss 3735928559(%ebx,%ecx,8), %xmm5
+ cvtsd2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtsd2ss 69, %xmm5
+ cvtsd2ss 0x45,%xmm5
+
+// CHECK: cvtsd2ss 32493, %xmm5
+ cvtsd2ss 0x7eed,%xmm5
+
+// CHECK: cvtsd2ss 3133065982, %xmm5
+ cvtsd2ss 0xbabecafe,%xmm5
+
+// CHECK: cvtsd2ss 305419896, %xmm5
+ cvtsd2ss 0x12345678,%xmm5
+
+// CHECK: cvtsd2ss %xmm5, %xmm5
+ cvtsd2ss %xmm5,%xmm5
+
+// CHECK: cvtss2sd 3735928559(%ebx,%ecx,8), %xmm5
+ cvtss2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvtss2sd 69, %xmm5
+ cvtss2sd 0x45,%xmm5
+
+// CHECK: cvtss2sd 32493, %xmm5
+ cvtss2sd 0x7eed,%xmm5
+
+// CHECK: cvtss2sd 3133065982, %xmm5
+ cvtss2sd 0xbabecafe,%xmm5
+
+// CHECK: cvtss2sd 305419896, %xmm5
+ cvtss2sd 0x12345678,%xmm5
+
+// CHECK: cvtss2sd %xmm5, %xmm5
+ cvtss2sd %xmm5,%xmm5
+
+// CHECK: cvttpd2pi 3735928559(%ebx,%ecx,8), %mm3
+ cvttpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: cvttpd2pi 69, %mm3
+ cvttpd2pi 0x45,%mm3
+
+// CHECK: cvttpd2pi 32493, %mm3
+ cvttpd2pi 0x7eed,%mm3
+
+// CHECK: cvttpd2pi 3133065982, %mm3
+ cvttpd2pi 0xbabecafe,%mm3
+
+// CHECK: cvttpd2pi 305419896, %mm3
+ cvttpd2pi 0x12345678,%mm3
+
+// CHECK: cvttpd2pi %xmm5, %mm3
+ cvttpd2pi %xmm5,%mm3
+
+// CHECK: cvttsd2si 3735928559(%ebx,%ecx,8), %ecx
+ cvttsd2si 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: cvttsd2si 69, %ecx
+ cvttsd2si 0x45,%ecx
+
+// CHECK: cvttsd2si 32493, %ecx
+ cvttsd2si 0x7eed,%ecx
+
+// CHECK: cvttsd2si 3133065982, %ecx
+ cvttsd2si 0xbabecafe,%ecx
+
+// CHECK: cvttsd2si 305419896, %ecx
+ cvttsd2si 0x12345678,%ecx
+
+// CHECK: cvttsd2si %xmm5, %ecx
+ cvttsd2si %xmm5,%ecx
+
+// CHECK: cvttps2dq 3735928559(%ebx,%ecx,8), %xmm5
+ cvttps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: cvttps2dq 69, %xmm5
+ cvttps2dq 0x45,%xmm5
+
+// CHECK: cvttps2dq 32493, %xmm5
+ cvttps2dq 0x7eed,%xmm5
+
+// CHECK: cvttps2dq 3133065982, %xmm5
+ cvttps2dq 0xbabecafe,%xmm5
+
+// CHECK: cvttps2dq 305419896, %xmm5
+ cvttps2dq 0x12345678,%xmm5
+
+// CHECK: cvttps2dq %xmm5, %xmm5
+ cvttps2dq %xmm5,%xmm5
+
+// CHECK: maskmovdqu %xmm5, %xmm5
+ maskmovdqu %xmm5,%xmm5
+
+// CHECK: movdqa 3735928559(%ebx,%ecx,8), %xmm5
+ movdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movdqa 69, %xmm5
+ movdqa 0x45,%xmm5
+
+// CHECK: movdqa 32493, %xmm5
+ movdqa 0x7eed,%xmm5
+
+// CHECK: movdqa 3133065982, %xmm5
+ movdqa 0xbabecafe,%xmm5
+
+// CHECK: movdqa 305419896, %xmm5
+ movdqa 0x12345678,%xmm5
+
+// CHECK: movdqa %xmm5, %xmm5
+ movdqa %xmm5,%xmm5
+
+// CHECK: movdqa %xmm5, 3735928559(%ebx,%ecx,8)
+ movdqa %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movdqa %xmm5, 69
+ movdqa %xmm5,0x45
+
+// CHECK: movdqa %xmm5, 32493
+ movdqa %xmm5,0x7eed
+
+// CHECK: movdqa %xmm5, 3133065982
+ movdqa %xmm5,0xbabecafe
+
+// CHECK: movdqa %xmm5, 305419896
+ movdqa %xmm5,0x12345678
+
+// CHECK: movdqa %xmm5, %xmm5
+ movdqa %xmm5,%xmm5
+
+// CHECK: movdqu 3735928559(%ebx,%ecx,8), %xmm5
+ movdqu 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movdqu 69, %xmm5
+ movdqu 0x45,%xmm5
+
+// CHECK: movdqu 32493, %xmm5
+ movdqu 0x7eed,%xmm5
+
+// CHECK: movdqu 3133065982, %xmm5
+ movdqu 0xbabecafe,%xmm5
+
+// CHECK: movdqu 305419896, %xmm5
+ movdqu 0x12345678,%xmm5
+
+// CHECK: movdqu %xmm5, 3735928559(%ebx,%ecx,8)
+ movdqu %xmm5,0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: movdqu %xmm5, 69
+ movdqu %xmm5,0x45
+
+// CHECK: movdqu %xmm5, 32493
+ movdqu %xmm5,0x7eed
+
+// CHECK: movdqu %xmm5, 3133065982
+ movdqu %xmm5,0xbabecafe
+
+// CHECK: movdqu %xmm5, 305419896
+ movdqu %xmm5,0x12345678
+
+// CHECK: movdq2q %xmm5, %mm3
+ movdq2q %xmm5,%mm3
+
+// CHECK: movq2dq %mm3, %xmm5
+ movq2dq %mm3,%xmm5
+
+// CHECK: pmuludq 3735928559(%ebx,%ecx,8), %mm3
+ pmuludq 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmuludq 69, %mm3
+ pmuludq 0x45,%mm3
+
+// CHECK: pmuludq 32493, %mm3
+ pmuludq 0x7eed,%mm3
+
+// CHECK: pmuludq 3133065982, %mm3
+ pmuludq 0xbabecafe,%mm3
+
+// CHECK: pmuludq 305419896, %mm3
+ pmuludq 0x12345678,%mm3
+
+// CHECK: pmuludq %mm3, %mm3
+ pmuludq %mm3,%mm3
+
+// CHECK: pmuludq 3735928559(%ebx,%ecx,8), %xmm5
+ pmuludq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmuludq 69, %xmm5
+ pmuludq 0x45,%xmm5
+
+// CHECK: pmuludq 32493, %xmm5
+ pmuludq 0x7eed,%xmm5
+
+// CHECK: pmuludq 3133065982, %xmm5
+ pmuludq 0xbabecafe,%xmm5
+
+// CHECK: pmuludq 305419896, %xmm5
+ pmuludq 0x12345678,%xmm5
+
+// CHECK: pmuludq %xmm5, %xmm5
+ pmuludq %xmm5,%xmm5
+
+// CHECK: pslldq $127, %xmm5
+ pslldq $0x7f,%xmm5
+
+// CHECK: psrldq $127, %xmm5
+ psrldq $0x7f,%xmm5
+
+// CHECK: punpckhqdq 3735928559(%ebx,%ecx,8), %xmm5
+ punpckhqdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: punpckhqdq 69, %xmm5
+ punpckhqdq 0x45,%xmm5
+
+// CHECK: punpckhqdq 32493, %xmm5
+ punpckhqdq 0x7eed,%xmm5
+
+// CHECK: punpckhqdq 3133065982, %xmm5
+ punpckhqdq 0xbabecafe,%xmm5
+
+// CHECK: punpckhqdq 305419896, %xmm5
+ punpckhqdq 0x12345678,%xmm5
+
+// CHECK: punpckhqdq %xmm5, %xmm5
+ punpckhqdq %xmm5,%xmm5
+
+// CHECK: punpcklqdq 3735928559(%ebx,%ecx,8), %xmm5
+ punpcklqdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: punpcklqdq 69, %xmm5
+ punpcklqdq 0x45,%xmm5
+
+// CHECK: punpcklqdq 32493, %xmm5
+ punpcklqdq 0x7eed,%xmm5
+
+// CHECK: punpcklqdq 3133065982, %xmm5
+ punpcklqdq 0xbabecafe,%xmm5
+
+// CHECK: punpcklqdq 305419896, %xmm5
+ punpcklqdq 0x12345678,%xmm5
+
+// CHECK: punpcklqdq %xmm5, %xmm5
+ punpcklqdq %xmm5,%xmm5
+
+// CHECK: addsubpd 3735928559(%ebx,%ecx,8), %xmm5
+ addsubpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: addsubpd 69, %xmm5
+ addsubpd 0x45,%xmm5
+
+// CHECK: addsubpd 32493, %xmm5
+ addsubpd 0x7eed,%xmm5
+
+// CHECK: addsubpd 3133065982, %xmm5
+ addsubpd 0xbabecafe,%xmm5
+
+// CHECK: addsubpd 305419896, %xmm5
+ addsubpd 0x12345678,%xmm5
+
+// CHECK: addsubpd %xmm5, %xmm5
+ addsubpd %xmm5,%xmm5
+
+// CHECK: addsubps 3735928559(%ebx,%ecx,8), %xmm5
+ addsubps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: addsubps 69, %xmm5
+ addsubps 0x45,%xmm5
+
+// CHECK: addsubps 32493, %xmm5
+ addsubps 0x7eed,%xmm5
+
+// CHECK: addsubps 3133065982, %xmm5
+ addsubps 0xbabecafe,%xmm5
+
+// CHECK: addsubps 305419896, %xmm5
+ addsubps 0x12345678,%xmm5
+
+// CHECK: addsubps %xmm5, %xmm5
+ addsubps %xmm5,%xmm5
+
+// CHECK: fisttpl 3735928559(%ebx,%ecx,8)
+ fisttpl 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: fisttpl 3133065982
+ fisttpl 0xbabecafe
+
+// CHECK: fisttpl 305419896
+ fisttpl 0x12345678
+
+// CHECK: haddpd 3735928559(%ebx,%ecx,8), %xmm5
+ haddpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: haddpd 69, %xmm5
+ haddpd 0x45,%xmm5
+
+// CHECK: haddpd 32493, %xmm5
+ haddpd 0x7eed,%xmm5
+
+// CHECK: haddpd 3133065982, %xmm5
+ haddpd 0xbabecafe,%xmm5
+
+// CHECK: haddpd 305419896, %xmm5
+ haddpd 0x12345678,%xmm5
+
+// CHECK: haddpd %xmm5, %xmm5
+ haddpd %xmm5,%xmm5
+
+// CHECK: haddps 3735928559(%ebx,%ecx,8), %xmm5
+ haddps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: haddps 69, %xmm5
+ haddps 0x45,%xmm5
+
+// CHECK: haddps 32493, %xmm5
+ haddps 0x7eed,%xmm5
+
+// CHECK: haddps 3133065982, %xmm5
+ haddps 0xbabecafe,%xmm5
+
+// CHECK: haddps 305419896, %xmm5
+ haddps 0x12345678,%xmm5
+
+// CHECK: haddps %xmm5, %xmm5
+ haddps %xmm5,%xmm5
+
+// CHECK: hsubpd 3735928559(%ebx,%ecx,8), %xmm5
+ hsubpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: hsubpd 69, %xmm5
+ hsubpd 0x45,%xmm5
+
+// CHECK: hsubpd 32493, %xmm5
+ hsubpd 0x7eed,%xmm5
+
+// CHECK: hsubpd 3133065982, %xmm5
+ hsubpd 0xbabecafe,%xmm5
+
+// CHECK: hsubpd 305419896, %xmm5
+ hsubpd 0x12345678,%xmm5
+
+// CHECK: hsubpd %xmm5, %xmm5
+ hsubpd %xmm5,%xmm5
+
+// CHECK: hsubps 3735928559(%ebx,%ecx,8), %xmm5
+ hsubps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: hsubps 69, %xmm5
+ hsubps 0x45,%xmm5
+
+// CHECK: hsubps 32493, %xmm5
+ hsubps 0x7eed,%xmm5
+
+// CHECK: hsubps 3133065982, %xmm5
+ hsubps 0xbabecafe,%xmm5
+
+// CHECK: hsubps 305419896, %xmm5
+ hsubps 0x12345678,%xmm5
+
+// CHECK: hsubps %xmm5, %xmm5
+ hsubps %xmm5,%xmm5
+
+// CHECK: lddqu 3735928559(%ebx,%ecx,8), %xmm5
+ lddqu 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: lddqu 69, %xmm5
+ lddqu 0x45,%xmm5
+
+// CHECK: lddqu 32493, %xmm5
+ lddqu 0x7eed,%xmm5
+
+// CHECK: lddqu 3133065982, %xmm5
+ lddqu 0xbabecafe,%xmm5
+
+// CHECK: lddqu 305419896, %xmm5
+ lddqu 0x12345678,%xmm5
+
+// CHECK: monitor
+ monitor
+
+// CHECK: movddup 3735928559(%ebx,%ecx,8), %xmm5
+ movddup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movddup 69, %xmm5
+ movddup 0x45,%xmm5
+
+// CHECK: movddup 32493, %xmm5
+ movddup 0x7eed,%xmm5
+
+// CHECK: movddup 3133065982, %xmm5
+ movddup 0xbabecafe,%xmm5
+
+// CHECK: movddup 305419896, %xmm5
+ movddup 0x12345678,%xmm5
+
+// CHECK: movddup %xmm5, %xmm5
+ movddup %xmm5,%xmm5
+
+// CHECK: movshdup 3735928559(%ebx,%ecx,8), %xmm5
+ movshdup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movshdup 69, %xmm5
+ movshdup 0x45,%xmm5
+
+// CHECK: movshdup 32493, %xmm5
+ movshdup 0x7eed,%xmm5
+
+// CHECK: movshdup 3133065982, %xmm5
+ movshdup 0xbabecafe,%xmm5
+
+// CHECK: movshdup 305419896, %xmm5
+ movshdup 0x12345678,%xmm5
+
+// CHECK: movshdup %xmm5, %xmm5
+ movshdup %xmm5,%xmm5
+
+// CHECK: movsldup 3735928559(%ebx,%ecx,8), %xmm5
+ movsldup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movsldup 69, %xmm5
+ movsldup 0x45,%xmm5
+
+// CHECK: movsldup 32493, %xmm5
+ movsldup 0x7eed,%xmm5
+
+// CHECK: movsldup 3133065982, %xmm5
+ movsldup 0xbabecafe,%xmm5
+
+// CHECK: movsldup 305419896, %xmm5
+ movsldup 0x12345678,%xmm5
+
+// CHECK: movsldup %xmm5, %xmm5
+ movsldup %xmm5,%xmm5
+
+// CHECK: mwait
+ mwait
+
+// CHECK: vmcall
+ vmcall
+
+// CHECK: vmclear 3735928559(%ebx,%ecx,8)
+ vmclear 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: vmclear 32493
+ vmclear 0x7eed
+
+// CHECK: vmclear 3133065982
+ vmclear 0xbabecafe
+
+// CHECK: vmclear 305419896
+ vmclear 0x12345678
+
+// CHECK: vmlaunch
+ vmlaunch
+
+// CHECK: vmresume
+ vmresume
+
+// CHECK: vmptrld 3735928559(%ebx,%ecx,8)
+ vmptrld 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: vmptrld 32493
+ vmptrld 0x7eed
+
+// CHECK: vmptrld 3133065982
+ vmptrld 0xbabecafe
+
+// CHECK: vmptrld 305419896
+ vmptrld 0x12345678
+
+// CHECK: vmptrst 3735928559(%ebx,%ecx,8)
+ vmptrst 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: vmptrst 32493
+ vmptrst 0x7eed
+
+// CHECK: vmptrst 3133065982
+ vmptrst 0xbabecafe
+
+// CHECK: vmptrst 305419896
+ vmptrst 0x12345678
+
+// CHECK: vmxoff
+ vmxoff
+
+// CHECK: vmxon 3735928559(%ebx,%ecx,8)
+ vmxon 0xdeadbeef(%ebx,%ecx,8)
+
+// CHECK: vmxon 32493
+ vmxon 0x7eed
+
+// CHECK: vmxon 3133065982
+ vmxon 0xbabecafe
+
+// CHECK: vmxon 305419896
+ vmxon 0x12345678
+
+// CHECK: phaddw 3735928559(%ebx,%ecx,8), %mm3
+ phaddw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: phaddw 69, %mm3
+ phaddw 0x45,%mm3
+
+// CHECK: phaddw 32493, %mm3
+ phaddw 0x7eed,%mm3
+
+// CHECK: phaddw 3133065982, %mm3
+ phaddw 0xbabecafe,%mm3
+
+// CHECK: phaddw 305419896, %mm3
+ phaddw 0x12345678,%mm3
+
+// CHECK: phaddw %mm3, %mm3
+ phaddw %mm3,%mm3
+
+// CHECK: phaddw 3735928559(%ebx,%ecx,8), %xmm5
+ phaddw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: phaddw 69, %xmm5
+ phaddw 0x45,%xmm5
+
+// CHECK: phaddw 32493, %xmm5
+ phaddw 0x7eed,%xmm5
+
+// CHECK: phaddw 3133065982, %xmm5
+ phaddw 0xbabecafe,%xmm5
+
+// CHECK: phaddw 305419896, %xmm5
+ phaddw 0x12345678,%xmm5
+
+// CHECK: phaddw %xmm5, %xmm5
+ phaddw %xmm5,%xmm5
+
+// CHECK: phaddd 3735928559(%ebx,%ecx,8), %mm3
+ phaddd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: phaddd 69, %mm3
+ phaddd 0x45,%mm3
+
+// CHECK: phaddd 32493, %mm3
+ phaddd 0x7eed,%mm3
+
+// CHECK: phaddd 3133065982, %mm3
+ phaddd 0xbabecafe,%mm3
+
+// CHECK: phaddd 305419896, %mm3
+ phaddd 0x12345678,%mm3
+
+// CHECK: phaddd %mm3, %mm3
+ phaddd %mm3,%mm3
+
+// CHECK: phaddd 3735928559(%ebx,%ecx,8), %xmm5
+ phaddd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: phaddd 69, %xmm5
+ phaddd 0x45,%xmm5
+
+// CHECK: phaddd 32493, %xmm5
+ phaddd 0x7eed,%xmm5
+
+// CHECK: phaddd 3133065982, %xmm5
+ phaddd 0xbabecafe,%xmm5
+
+// CHECK: phaddd 305419896, %xmm5
+ phaddd 0x12345678,%xmm5
+
+// CHECK: phaddd %xmm5, %xmm5
+ phaddd %xmm5,%xmm5
+
+// CHECK: phaddsw 3735928559(%ebx,%ecx,8), %mm3
+ phaddsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: phaddsw 69, %mm3
+ phaddsw 0x45,%mm3
+
+// CHECK: phaddsw 32493, %mm3
+ phaddsw 0x7eed,%mm3
+
+// CHECK: phaddsw 3133065982, %mm3
+ phaddsw 0xbabecafe,%mm3
+
+// CHECK: phaddsw 305419896, %mm3
+ phaddsw 0x12345678,%mm3
+
+// CHECK: phaddsw %mm3, %mm3
+ phaddsw %mm3,%mm3
+
+// CHECK: phaddsw 3735928559(%ebx,%ecx,8), %xmm5
+ phaddsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: phaddsw 69, %xmm5
+ phaddsw 0x45,%xmm5
+
+// CHECK: phaddsw 32493, %xmm5
+ phaddsw 0x7eed,%xmm5
+
+// CHECK: phaddsw 3133065982, %xmm5
+ phaddsw 0xbabecafe,%xmm5
+
+// CHECK: phaddsw 305419896, %xmm5
+ phaddsw 0x12345678,%xmm5
+
+// CHECK: phaddsw %xmm5, %xmm5
+ phaddsw %xmm5,%xmm5
+
+// CHECK: phsubw 3735928559(%ebx,%ecx,8), %mm3
+ phsubw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: phsubw 69, %mm3
+ phsubw 0x45,%mm3
+
+// CHECK: phsubw 32493, %mm3
+ phsubw 0x7eed,%mm3
+
+// CHECK: phsubw 3133065982, %mm3
+ phsubw 0xbabecafe,%mm3
+
+// CHECK: phsubw 305419896, %mm3
+ phsubw 0x12345678,%mm3
+
+// CHECK: phsubw %mm3, %mm3
+ phsubw %mm3,%mm3
+
+// CHECK: phsubw 3735928559(%ebx,%ecx,8), %xmm5
+ phsubw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: phsubw 69, %xmm5
+ phsubw 0x45,%xmm5
+
+// CHECK: phsubw 32493, %xmm5
+ phsubw 0x7eed,%xmm5
+
+// CHECK: phsubw 3133065982, %xmm5
+ phsubw 0xbabecafe,%xmm5
+
+// CHECK: phsubw 305419896, %xmm5
+ phsubw 0x12345678,%xmm5
+
+// CHECK: phsubw %xmm5, %xmm5
+ phsubw %xmm5,%xmm5
+
+// CHECK: phsubd 3735928559(%ebx,%ecx,8), %mm3
+ phsubd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: phsubd 69, %mm3
+ phsubd 0x45,%mm3
+
+// CHECK: phsubd 32493, %mm3
+ phsubd 0x7eed,%mm3
+
+// CHECK: phsubd 3133065982, %mm3
+ phsubd 0xbabecafe,%mm3
+
+// CHECK: phsubd 305419896, %mm3
+ phsubd 0x12345678,%mm3
+
+// CHECK: phsubd %mm3, %mm3
+ phsubd %mm3,%mm3
+
+// CHECK: phsubd 3735928559(%ebx,%ecx,8), %xmm5
+ phsubd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: phsubd 69, %xmm5
+ phsubd 0x45,%xmm5
+
+// CHECK: phsubd 32493, %xmm5
+ phsubd 0x7eed,%xmm5
+
+// CHECK: phsubd 3133065982, %xmm5
+ phsubd 0xbabecafe,%xmm5
+
+// CHECK: phsubd 305419896, %xmm5
+ phsubd 0x12345678,%xmm5
+
+// CHECK: phsubd %xmm5, %xmm5
+ phsubd %xmm5,%xmm5
+
+// CHECK: phsubsw 3735928559(%ebx,%ecx,8), %mm3
+ phsubsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: phsubsw 69, %mm3
+ phsubsw 0x45,%mm3
+
+// CHECK: phsubsw 32493, %mm3
+ phsubsw 0x7eed,%mm3
+
+// CHECK: phsubsw 3133065982, %mm3
+ phsubsw 0xbabecafe,%mm3
+
+// CHECK: phsubsw 305419896, %mm3
+ phsubsw 0x12345678,%mm3
+
+// CHECK: phsubsw %mm3, %mm3
+ phsubsw %mm3,%mm3
+
+// CHECK: phsubsw 3735928559(%ebx,%ecx,8), %xmm5
+ phsubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: phsubsw 69, %xmm5
+ phsubsw 0x45,%xmm5
+
+// CHECK: phsubsw 32493, %xmm5
+ phsubsw 0x7eed,%xmm5
+
+// CHECK: phsubsw 3133065982, %xmm5
+ phsubsw 0xbabecafe,%xmm5
+
+// CHECK: phsubsw 305419896, %xmm5
+ phsubsw 0x12345678,%xmm5
+
+// CHECK: phsubsw %xmm5, %xmm5
+ phsubsw %xmm5,%xmm5
+
+// CHECK: pmaddubsw 3735928559(%ebx,%ecx,8), %mm3
+ pmaddubsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmaddubsw 69, %mm3
+ pmaddubsw 0x45,%mm3
+
+// CHECK: pmaddubsw 32493, %mm3
+ pmaddubsw 0x7eed,%mm3
+
+// CHECK: pmaddubsw 3133065982, %mm3
+ pmaddubsw 0xbabecafe,%mm3
+
+// CHECK: pmaddubsw 305419896, %mm3
+ pmaddubsw 0x12345678,%mm3
+
+// CHECK: pmaddubsw %mm3, %mm3
+ pmaddubsw %mm3,%mm3
+
+// CHECK: pmaddubsw 3735928559(%ebx,%ecx,8), %xmm5
+ pmaddubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmaddubsw 69, %xmm5
+ pmaddubsw 0x45,%xmm5
+
+// CHECK: pmaddubsw 32493, %xmm5
+ pmaddubsw 0x7eed,%xmm5
+
+// CHECK: pmaddubsw 3133065982, %xmm5
+ pmaddubsw 0xbabecafe,%xmm5
+
+// CHECK: pmaddubsw 305419896, %xmm5
+ pmaddubsw 0x12345678,%xmm5
+
+// CHECK: pmaddubsw %xmm5, %xmm5
+ pmaddubsw %xmm5,%xmm5
+
+// CHECK: pmulhrsw 3735928559(%ebx,%ecx,8), %mm3
+ pmulhrsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pmulhrsw 69, %mm3
+ pmulhrsw 0x45,%mm3
+
+// CHECK: pmulhrsw 32493, %mm3
+ pmulhrsw 0x7eed,%mm3
+
+// CHECK: pmulhrsw 3133065982, %mm3
+ pmulhrsw 0xbabecafe,%mm3
+
+// CHECK: pmulhrsw 305419896, %mm3
+ pmulhrsw 0x12345678,%mm3
+
+// CHECK: pmulhrsw %mm3, %mm3
+ pmulhrsw %mm3,%mm3
+
+// CHECK: pmulhrsw 3735928559(%ebx,%ecx,8), %xmm5
+ pmulhrsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmulhrsw 69, %xmm5
+ pmulhrsw 0x45,%xmm5
+
+// CHECK: pmulhrsw 32493, %xmm5
+ pmulhrsw 0x7eed,%xmm5
+
+// CHECK: pmulhrsw 3133065982, %xmm5
+ pmulhrsw 0xbabecafe,%xmm5
+
+// CHECK: pmulhrsw 305419896, %xmm5
+ pmulhrsw 0x12345678,%xmm5
+
+// CHECK: pmulhrsw %xmm5, %xmm5
+ pmulhrsw %xmm5,%xmm5
+
+// CHECK: pshufb 3735928559(%ebx,%ecx,8), %mm3
+ pshufb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pshufb 69, %mm3
+ pshufb 0x45,%mm3
+
+// CHECK: pshufb 32493, %mm3
+ pshufb 0x7eed,%mm3
+
+// CHECK: pshufb 3133065982, %mm3
+ pshufb 0xbabecafe,%mm3
+
+// CHECK: pshufb 305419896, %mm3
+ pshufb 0x12345678,%mm3
+
+// CHECK: pshufb %mm3, %mm3
+ pshufb %mm3,%mm3
+
+// CHECK: pshufb 3735928559(%ebx,%ecx,8), %xmm5
+ pshufb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pshufb 69, %xmm5
+ pshufb 0x45,%xmm5
+
+// CHECK: pshufb 32493, %xmm5
+ pshufb 0x7eed,%xmm5
+
+// CHECK: pshufb 3133065982, %xmm5
+ pshufb 0xbabecafe,%xmm5
+
+// CHECK: pshufb 305419896, %xmm5
+ pshufb 0x12345678,%xmm5
+
+// CHECK: pshufb %xmm5, %xmm5
+ pshufb %xmm5,%xmm5
+
+// CHECK: psignb 3735928559(%ebx,%ecx,8), %mm3
+ psignb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psignb 69, %mm3
+ psignb 0x45,%mm3
+
+// CHECK: psignb 32493, %mm3
+ psignb 0x7eed,%mm3
+
+// CHECK: psignb 3133065982, %mm3
+ psignb 0xbabecafe,%mm3
+
+// CHECK: psignb 305419896, %mm3
+ psignb 0x12345678,%mm3
+
+// CHECK: psignb %mm3, %mm3
+ psignb %mm3,%mm3
+
+// CHECK: psignb 3735928559(%ebx,%ecx,8), %xmm5
+ psignb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psignb 69, %xmm5
+ psignb 0x45,%xmm5
+
+// CHECK: psignb 32493, %xmm5
+ psignb 0x7eed,%xmm5
+
+// CHECK: psignb 3133065982, %xmm5
+ psignb 0xbabecafe,%xmm5
+
+// CHECK: psignb 305419896, %xmm5
+ psignb 0x12345678,%xmm5
+
+// CHECK: psignb %xmm5, %xmm5
+ psignb %xmm5,%xmm5
+
+// CHECK: psignw 3735928559(%ebx,%ecx,8), %mm3
+ psignw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psignw 69, %mm3
+ psignw 0x45,%mm3
+
+// CHECK: psignw 32493, %mm3
+ psignw 0x7eed,%mm3
+
+// CHECK: psignw 3133065982, %mm3
+ psignw 0xbabecafe,%mm3
+
+// CHECK: psignw 305419896, %mm3
+ psignw 0x12345678,%mm3
+
+// CHECK: psignw %mm3, %mm3
+ psignw %mm3,%mm3
+
+// CHECK: psignw 3735928559(%ebx,%ecx,8), %xmm5
+ psignw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psignw 69, %xmm5
+ psignw 0x45,%xmm5
+
+// CHECK: psignw 32493, %xmm5
+ psignw 0x7eed,%xmm5
+
+// CHECK: psignw 3133065982, %xmm5
+ psignw 0xbabecafe,%xmm5
+
+// CHECK: psignw 305419896, %xmm5
+ psignw 0x12345678,%xmm5
+
+// CHECK: psignw %xmm5, %xmm5
+ psignw %xmm5,%xmm5
+
+// CHECK: psignd 3735928559(%ebx,%ecx,8), %mm3
+ psignd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: psignd 69, %mm3
+ psignd 0x45,%mm3
+
+// CHECK: psignd 32493, %mm3
+ psignd 0x7eed,%mm3
+
+// CHECK: psignd 3133065982, %mm3
+ psignd 0xbabecafe,%mm3
+
+// CHECK: psignd 305419896, %mm3
+ psignd 0x12345678,%mm3
+
+// CHECK: psignd %mm3, %mm3
+ psignd %mm3,%mm3
+
+// CHECK: psignd 3735928559(%ebx,%ecx,8), %xmm5
+ psignd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: psignd 69, %xmm5
+ psignd 0x45,%xmm5
+
+// CHECK: psignd 32493, %xmm5
+ psignd 0x7eed,%xmm5
+
+// CHECK: psignd 3133065982, %xmm5
+ psignd 0xbabecafe,%xmm5
+
+// CHECK: psignd 305419896, %xmm5
+ psignd 0x12345678,%xmm5
+
+// CHECK: psignd %xmm5, %xmm5
+ psignd %xmm5,%xmm5
+
+// CHECK: pabsb 3735928559(%ebx,%ecx,8), %mm3
+ pabsb 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pabsb 69, %mm3
+ pabsb 0x45,%mm3
+
+// CHECK: pabsb 32493, %mm3
+ pabsb 0x7eed,%mm3
+
+// CHECK: pabsb 3133065982, %mm3
+ pabsb 0xbabecafe,%mm3
+
+// CHECK: pabsb 305419896, %mm3
+ pabsb 0x12345678,%mm3
+
+// CHECK: pabsb %mm3, %mm3
+ pabsb %mm3,%mm3
+
+// CHECK: pabsb 3735928559(%ebx,%ecx,8), %xmm5
+ pabsb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pabsb 69, %xmm5
+ pabsb 0x45,%xmm5
+
+// CHECK: pabsb 32493, %xmm5
+ pabsb 0x7eed,%xmm5
+
+// CHECK: pabsb 3133065982, %xmm5
+ pabsb 0xbabecafe,%xmm5
+
+// CHECK: pabsb 305419896, %xmm5
+ pabsb 0x12345678,%xmm5
+
+// CHECK: pabsb %xmm5, %xmm5
+ pabsb %xmm5,%xmm5
+
+// CHECK: pabsw 3735928559(%ebx,%ecx,8), %mm3
+ pabsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pabsw 69, %mm3
+ pabsw 0x45,%mm3
+
+// CHECK: pabsw 32493, %mm3
+ pabsw 0x7eed,%mm3
+
+// CHECK: pabsw 3133065982, %mm3
+ pabsw 0xbabecafe,%mm3
+
+// CHECK: pabsw 305419896, %mm3
+ pabsw 0x12345678,%mm3
+
+// CHECK: pabsw %mm3, %mm3
+ pabsw %mm3,%mm3
+
+// CHECK: pabsw 3735928559(%ebx,%ecx,8), %xmm5
+ pabsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pabsw 69, %xmm5
+ pabsw 0x45,%xmm5
+
+// CHECK: pabsw 32493, %xmm5
+ pabsw 0x7eed,%xmm5
+
+// CHECK: pabsw 3133065982, %xmm5
+ pabsw 0xbabecafe,%xmm5
+
+// CHECK: pabsw 305419896, %xmm5
+ pabsw 0x12345678,%xmm5
+
+// CHECK: pabsw %xmm5, %xmm5
+ pabsw %xmm5,%xmm5
+
+// CHECK: pabsd 3735928559(%ebx,%ecx,8), %mm3
+ pabsd 0xdeadbeef(%ebx,%ecx,8),%mm3
+
+// CHECK: pabsd 69, %mm3
+ pabsd 0x45,%mm3
+
+// CHECK: pabsd 32493, %mm3
+ pabsd 0x7eed,%mm3
+
+// CHECK: pabsd 3133065982, %mm3
+ pabsd 0xbabecafe,%mm3
+
+// CHECK: pabsd 305419896, %mm3
+ pabsd 0x12345678,%mm3
+
+// CHECK: pabsd %mm3, %mm3
+ pabsd %mm3,%mm3
+
+// CHECK: pabsd 3735928559(%ebx,%ecx,8), %xmm5
+ pabsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pabsd 69, %xmm5
+ pabsd 0x45,%xmm5
+
+// CHECK: pabsd 32493, %xmm5
+ pabsd 0x7eed,%xmm5
+
+// CHECK: pabsd 3133065982, %xmm5
+ pabsd 0xbabecafe,%xmm5
+
+// CHECK: pabsd 305419896, %xmm5
+ pabsd 0x12345678,%xmm5
+
+// CHECK: pabsd %xmm5, %xmm5
+ pabsd %xmm5,%xmm5
+
+// CHECK: femms
+ femms
+
+// CHECK: movntdqa 3735928559(%ebx,%ecx,8), %xmm5
+ movntdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: movntdqa 69, %xmm5
+ movntdqa 0x45,%xmm5
+
+// CHECK: movntdqa 32493, %xmm5
+ movntdqa 0x7eed,%xmm5
+
+// CHECK: movntdqa 3133065982, %xmm5
+ movntdqa 0xbabecafe,%xmm5
+
+// CHECK: movntdqa 305419896, %xmm5
+ movntdqa 0x12345678,%xmm5
+
+// CHECK: packusdw 3735928559(%ebx,%ecx,8), %xmm5
+ packusdw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: packusdw 69, %xmm5
+ packusdw 0x45,%xmm5
+
+// CHECK: packusdw 32493, %xmm5
+ packusdw 0x7eed,%xmm5
+
+// CHECK: packusdw 3133065982, %xmm5
+ packusdw 0xbabecafe,%xmm5
+
+// CHECK: packusdw 305419896, %xmm5
+ packusdw 0x12345678,%xmm5
+
+// CHECK: packusdw %xmm5, %xmm5
+ packusdw %xmm5,%xmm5
+
+// CHECK: pcmpeqq 3735928559(%ebx,%ecx,8), %xmm5
+ pcmpeqq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pcmpeqq 69, %xmm5
+ pcmpeqq 0x45,%xmm5
+
+// CHECK: pcmpeqq 32493, %xmm5
+ pcmpeqq 0x7eed,%xmm5
+
+// CHECK: pcmpeqq 3133065982, %xmm5
+ pcmpeqq 0xbabecafe,%xmm5
+
+// CHECK: pcmpeqq 305419896, %xmm5
+ pcmpeqq 0x12345678,%xmm5
+
+// CHECK: pcmpeqq %xmm5, %xmm5
+ pcmpeqq %xmm5,%xmm5
+
+// CHECK: phminposuw 3735928559(%ebx,%ecx,8), %xmm5
+ phminposuw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: phminposuw 69, %xmm5
+ phminposuw 0x45,%xmm5
+
+// CHECK: phminposuw 32493, %xmm5
+ phminposuw 0x7eed,%xmm5
+
+// CHECK: phminposuw 3133065982, %xmm5
+ phminposuw 0xbabecafe,%xmm5
+
+// CHECK: phminposuw 305419896, %xmm5
+ phminposuw 0x12345678,%xmm5
+
+// CHECK: phminposuw %xmm5, %xmm5
+ phminposuw %xmm5,%xmm5
+
+// CHECK: pmaxsb 3735928559(%ebx,%ecx,8), %xmm5
+ pmaxsb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmaxsb 69, %xmm5
+ pmaxsb 0x45,%xmm5
+
+// CHECK: pmaxsb 32493, %xmm5
+ pmaxsb 0x7eed,%xmm5
+
+// CHECK: pmaxsb 3133065982, %xmm5
+ pmaxsb 0xbabecafe,%xmm5
+
+// CHECK: pmaxsb 305419896, %xmm5
+ pmaxsb 0x12345678,%xmm5
+
+// CHECK: pmaxsb %xmm5, %xmm5
+ pmaxsb %xmm5,%xmm5
+
+// CHECK: pmaxsd 3735928559(%ebx,%ecx,8), %xmm5
+ pmaxsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmaxsd 69, %xmm5
+ pmaxsd 0x45,%xmm5
+
+// CHECK: pmaxsd 32493, %xmm5
+ pmaxsd 0x7eed,%xmm5
+
+// CHECK: pmaxsd 3133065982, %xmm5
+ pmaxsd 0xbabecafe,%xmm5
+
+// CHECK: pmaxsd 305419896, %xmm5
+ pmaxsd 0x12345678,%xmm5
+
+// CHECK: pmaxsd %xmm5, %xmm5
+ pmaxsd %xmm5,%xmm5
+
+// CHECK: pmaxud 3735928559(%ebx,%ecx,8), %xmm5
+ pmaxud 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmaxud 69, %xmm5
+ pmaxud 0x45,%xmm5
+
+// CHECK: pmaxud 32493, %xmm5
+ pmaxud 0x7eed,%xmm5
+
+// CHECK: pmaxud 3133065982, %xmm5
+ pmaxud 0xbabecafe,%xmm5
+
+// CHECK: pmaxud 305419896, %xmm5
+ pmaxud 0x12345678,%xmm5
+
+// CHECK: pmaxud %xmm5, %xmm5
+ pmaxud %xmm5,%xmm5
+
+// CHECK: pmaxuw 3735928559(%ebx,%ecx,8), %xmm5
+ pmaxuw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmaxuw 69, %xmm5
+ pmaxuw 0x45,%xmm5
+
+// CHECK: pmaxuw 32493, %xmm5
+ pmaxuw 0x7eed,%xmm5
+
+// CHECK: pmaxuw 3133065982, %xmm5
+ pmaxuw 0xbabecafe,%xmm5
+
+// CHECK: pmaxuw 305419896, %xmm5
+ pmaxuw 0x12345678,%xmm5
+
+// CHECK: pmaxuw %xmm5, %xmm5
+ pmaxuw %xmm5,%xmm5
+
+// CHECK: pminsb 3735928559(%ebx,%ecx,8), %xmm5
+ pminsb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pminsb 69, %xmm5
+ pminsb 0x45,%xmm5
+
+// CHECK: pminsb 32493, %xmm5
+ pminsb 0x7eed,%xmm5
+
+// CHECK: pminsb 3133065982, %xmm5
+ pminsb 0xbabecafe,%xmm5
+
+// CHECK: pminsb 305419896, %xmm5
+ pminsb 0x12345678,%xmm5
+
+// CHECK: pminsb %xmm5, %xmm5
+ pminsb %xmm5,%xmm5
+
+// CHECK: pminsd 3735928559(%ebx,%ecx,8), %xmm5
+ pminsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pminsd 69, %xmm5
+ pminsd 0x45,%xmm5
+
+// CHECK: pminsd 32493, %xmm5
+ pminsd 0x7eed,%xmm5
+
+// CHECK: pminsd 3133065982, %xmm5
+ pminsd 0xbabecafe,%xmm5
+
+// CHECK: pminsd 305419896, %xmm5
+ pminsd 0x12345678,%xmm5
+
+// CHECK: pminsd %xmm5, %xmm5
+ pminsd %xmm5,%xmm5
+
+// CHECK: pminud 3735928559(%ebx,%ecx,8), %xmm5
+ pminud 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pminud 69, %xmm5
+ pminud 0x45,%xmm5
+
+// CHECK: pminud 32493, %xmm5
+ pminud 0x7eed,%xmm5
+
+// CHECK: pminud 3133065982, %xmm5
+ pminud 0xbabecafe,%xmm5
+
+// CHECK: pminud 305419896, %xmm5
+ pminud 0x12345678,%xmm5
+
+// CHECK: pminud %xmm5, %xmm5
+ pminud %xmm5,%xmm5
+
+// CHECK: pminuw 3735928559(%ebx,%ecx,8), %xmm5
+ pminuw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pminuw 69, %xmm5
+ pminuw 0x45,%xmm5
+
+// CHECK: pminuw 32493, %xmm5
+ pminuw 0x7eed,%xmm5
+
+// CHECK: pminuw 3133065982, %xmm5
+ pminuw 0xbabecafe,%xmm5
+
+// CHECK: pminuw 305419896, %xmm5
+ pminuw 0x12345678,%xmm5
+
+// CHECK: pminuw %xmm5, %xmm5
+ pminuw %xmm5,%xmm5
+
+// CHECK: pmovsxbw 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxbw 69, %xmm5
+ pmovsxbw 0x45,%xmm5
+
+// CHECK: pmovsxbw 32493, %xmm5
+ pmovsxbw 0x7eed,%xmm5
+
+// CHECK: pmovsxbw 3133065982, %xmm5
+ pmovsxbw 0xbabecafe,%xmm5
+
+// CHECK: pmovsxbw 305419896, %xmm5
+ pmovsxbw 0x12345678,%xmm5
+
+// CHECK: pmovsxbw %xmm5, %xmm5
+ pmovsxbw %xmm5,%xmm5
+
+// CHECK: pmovsxbd 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxbd 69, %xmm5
+ pmovsxbd 0x45,%xmm5
+
+// CHECK: pmovsxbd 32493, %xmm5
+ pmovsxbd 0x7eed,%xmm5
+
+// CHECK: pmovsxbd 3133065982, %xmm5
+ pmovsxbd 0xbabecafe,%xmm5
+
+// CHECK: pmovsxbd 305419896, %xmm5
+ pmovsxbd 0x12345678,%xmm5
+
+// CHECK: pmovsxbd %xmm5, %xmm5
+ pmovsxbd %xmm5,%xmm5
+
+// CHECK: pmovsxbq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxbq 69, %xmm5
+ pmovsxbq 0x45,%xmm5
+
+// CHECK: pmovsxbq 32493, %xmm5
+ pmovsxbq 0x7eed,%xmm5
+
+// CHECK: pmovsxbq 3133065982, %xmm5
+ pmovsxbq 0xbabecafe,%xmm5
+
+// CHECK: pmovsxbq 305419896, %xmm5
+ pmovsxbq 0x12345678,%xmm5
+
+// CHECK: pmovsxbq %xmm5, %xmm5
+ pmovsxbq %xmm5,%xmm5
+
+// CHECK: pmovsxwd 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxwd 69, %xmm5
+ pmovsxwd 0x45,%xmm5
+
+// CHECK: pmovsxwd 32493, %xmm5
+ pmovsxwd 0x7eed,%xmm5
+
+// CHECK: pmovsxwd 3133065982, %xmm5
+ pmovsxwd 0xbabecafe,%xmm5
+
+// CHECK: pmovsxwd 305419896, %xmm5
+ pmovsxwd 0x12345678,%xmm5
+
+// CHECK: pmovsxwd %xmm5, %xmm5
+ pmovsxwd %xmm5,%xmm5
+
+// CHECK: pmovsxwq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxwq 69, %xmm5
+ pmovsxwq 0x45,%xmm5
+
+// CHECK: pmovsxwq 32493, %xmm5
+ pmovsxwq 0x7eed,%xmm5
+
+// CHECK: pmovsxwq 3133065982, %xmm5
+ pmovsxwq 0xbabecafe,%xmm5
+
+// CHECK: pmovsxwq 305419896, %xmm5
+ pmovsxwq 0x12345678,%xmm5
+
+// CHECK: pmovsxwq %xmm5, %xmm5
+ pmovsxwq %xmm5,%xmm5
+
+// CHECK: pmovsxdq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovsxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovsxdq 69, %xmm5
+ pmovsxdq 0x45,%xmm5
+
+// CHECK: pmovsxdq 32493, %xmm5
+ pmovsxdq 0x7eed,%xmm5
+
+// CHECK: pmovsxdq 3133065982, %xmm5
+ pmovsxdq 0xbabecafe,%xmm5
+
+// CHECK: pmovsxdq 305419896, %xmm5
+ pmovsxdq 0x12345678,%xmm5
+
+// CHECK: pmovsxdq %xmm5, %xmm5
+ pmovsxdq %xmm5,%xmm5
+
+// CHECK: pmovzxbw 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxbw 69, %xmm5
+ pmovzxbw 0x45,%xmm5
+
+// CHECK: pmovzxbw 32493, %xmm5
+ pmovzxbw 0x7eed,%xmm5
+
+// CHECK: pmovzxbw 3133065982, %xmm5
+ pmovzxbw 0xbabecafe,%xmm5
+
+// CHECK: pmovzxbw 305419896, %xmm5
+ pmovzxbw 0x12345678,%xmm5
+
+// CHECK: pmovzxbw %xmm5, %xmm5
+ pmovzxbw %xmm5,%xmm5
+
+// CHECK: pmovzxbd 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxbd 69, %xmm5
+ pmovzxbd 0x45,%xmm5
+
+// CHECK: pmovzxbd 32493, %xmm5
+ pmovzxbd 0x7eed,%xmm5
+
+// CHECK: pmovzxbd 3133065982, %xmm5
+ pmovzxbd 0xbabecafe,%xmm5
+
+// CHECK: pmovzxbd 305419896, %xmm5
+ pmovzxbd 0x12345678,%xmm5
+
+// CHECK: pmovzxbd %xmm5, %xmm5
+ pmovzxbd %xmm5,%xmm5
+
+// CHECK: pmovzxbq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxbq 69, %xmm5
+ pmovzxbq 0x45,%xmm5
+
+// CHECK: pmovzxbq 32493, %xmm5
+ pmovzxbq 0x7eed,%xmm5
+
+// CHECK: pmovzxbq 3133065982, %xmm5
+ pmovzxbq 0xbabecafe,%xmm5
+
+// CHECK: pmovzxbq 305419896, %xmm5
+ pmovzxbq 0x12345678,%xmm5
+
+// CHECK: pmovzxbq %xmm5, %xmm5
+ pmovzxbq %xmm5,%xmm5
+
+// CHECK: pmovzxwd 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxwd 69, %xmm5
+ pmovzxwd 0x45,%xmm5
+
+// CHECK: pmovzxwd 32493, %xmm5
+ pmovzxwd 0x7eed,%xmm5
+
+// CHECK: pmovzxwd 3133065982, %xmm5
+ pmovzxwd 0xbabecafe,%xmm5
+
+// CHECK: pmovzxwd 305419896, %xmm5
+ pmovzxwd 0x12345678,%xmm5
+
+// CHECK: pmovzxwd %xmm5, %xmm5
+ pmovzxwd %xmm5,%xmm5
+
+// CHECK: pmovzxwq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxwq 69, %xmm5
+ pmovzxwq 0x45,%xmm5
+
+// CHECK: pmovzxwq 32493, %xmm5
+ pmovzxwq 0x7eed,%xmm5
+
+// CHECK: pmovzxwq 3133065982, %xmm5
+ pmovzxwq 0xbabecafe,%xmm5
+
+// CHECK: pmovzxwq 305419896, %xmm5
+ pmovzxwq 0x12345678,%xmm5
+
+// CHECK: pmovzxwq %xmm5, %xmm5
+ pmovzxwq %xmm5,%xmm5
+
+// CHECK: pmovzxdq 3735928559(%ebx,%ecx,8), %xmm5
+ pmovzxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmovzxdq 69, %xmm5
+ pmovzxdq 0x45,%xmm5
+
+// CHECK: pmovzxdq 32493, %xmm5
+ pmovzxdq 0x7eed,%xmm5
+
+// CHECK: pmovzxdq 3133065982, %xmm5
+ pmovzxdq 0xbabecafe,%xmm5
+
+// CHECK: pmovzxdq 305419896, %xmm5
+ pmovzxdq 0x12345678,%xmm5
+
+// CHECK: pmovzxdq %xmm5, %xmm5
+ pmovzxdq %xmm5,%xmm5
+
+// CHECK: pmuldq 3735928559(%ebx,%ecx,8), %xmm5
+ pmuldq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmuldq 69, %xmm5
+ pmuldq 0x45,%xmm5
+
+// CHECK: pmuldq 32493, %xmm5
+ pmuldq 0x7eed,%xmm5
+
+// CHECK: pmuldq 3133065982, %xmm5
+ pmuldq 0xbabecafe,%xmm5
+
+// CHECK: pmuldq 305419896, %xmm5
+ pmuldq 0x12345678,%xmm5
+
+// CHECK: pmuldq %xmm5, %xmm5
+ pmuldq %xmm5,%xmm5
+
+// CHECK: pmulld 3735928559(%ebx,%ecx,8), %xmm5
+ pmulld 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pmulld 69, %xmm5
+ pmulld 0x45,%xmm5
+
+// CHECK: pmulld 32493, %xmm5
+ pmulld 0x7eed,%xmm5
+
+// CHECK: pmulld 3133065982, %xmm5
+ pmulld 0xbabecafe,%xmm5
+
+// CHECK: pmulld 305419896, %xmm5
+ pmulld 0x12345678,%xmm5
+
+// CHECK: pmulld %xmm5, %xmm5
+ pmulld %xmm5,%xmm5
+
+// CHECK: ptest 3735928559(%ebx,%ecx,8), %xmm5
+ ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: ptest 69, %xmm5
+ ptest 0x45,%xmm5
+
+// CHECK: ptest 32493, %xmm5
+ ptest 0x7eed,%xmm5
+
+// CHECK: ptest 3133065982, %xmm5
+ ptest 0xbabecafe,%xmm5
+
+// CHECK: ptest 305419896, %xmm5
+ ptest 0x12345678,%xmm5
+
+// CHECK: ptest %xmm5, %xmm5
+ ptest %xmm5,%xmm5
+
+// CHECK: crc32 3735928559(%ebx,%ecx,8), %ecx
+ crc32 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: crc32 69, %ecx
+ crc32 0x45,%ecx
+
+// CHECK: crc32 32493, %ecx
+ crc32 0x7eed,%ecx
+
+// CHECK: crc32 3133065982, %ecx
+ crc32 0xbabecafe,%ecx
+
+// CHECK: crc32 305419896, %ecx
+ crc32 0x12345678,%ecx
+
+// CHECK: crc32 %ecx, %ecx
+ crc32 %ecx,%ecx
+
+// CHECK: crc32 %ecx, %ecx
+ crc32 %ecx,%ecx
+
+// CHECK: crc32 3735928559(%ebx,%ecx,8), %ecx
+ crc32 0xdeadbeef(%ebx,%ecx,8),%ecx
+
+// CHECK: crc32 69, %ecx
+ crc32 0x45,%ecx
+
+// CHECK: crc32 32493, %ecx
+ crc32 0x7eed,%ecx
+
+// CHECK: crc32 3133065982, %ecx
+ crc32 0xbabecafe,%ecx
+
+// CHECK: crc32 305419896, %ecx
+ crc32 0x12345678,%ecx
+
+// CHECK: pcmpgtq 3735928559(%ebx,%ecx,8), %xmm5
+ pcmpgtq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+
+// CHECK: pcmpgtq 69, %xmm5
+ pcmpgtq 0x45,%xmm5
+
+// CHECK: pcmpgtq 32493, %xmm5
+ pcmpgtq 0x7eed,%xmm5
+
+// CHECK: pcmpgtq 3133065982, %xmm5
+ pcmpgtq 0xbabecafe,%xmm5
+
+// CHECK: pcmpgtq 305419896, %xmm5
+ pcmpgtq 0x12345678,%xmm5
+
+// CHECK: pcmpgtq %xmm5, %xmm5
+ pcmpgtq %xmm5,%xmm5
diff --git a/test/MC/AsmParser/X86/x86_32-encoding.s b/test/MC/AsmParser/X86/x86_32-encoding.s
new file mode 100644
index 0000000..e029ded
--- /dev/null
+++ b/test/MC/AsmParser/X86/x86_32-encoding.s
@@ -0,0 +1,13 @@
+// RUN: llvm-mc -triple i386-unknown-unknown %s -show-encoding | FileCheck %s
+
+fisttpl 3735928559(%ebx,%ecx,8)
+# CHECK: encoding: [0xdb,0x8c,0xcb,0xef,0xbe,0xad,0xde]
+
+sbbb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+# CHECK: encoding: [0x80,0x9c,0xcb,0xef,0xbe,0xad,0xde,0xfe]
+
+psllw 69, %mm3
+# CHECK: encoding: [0x0f,0xf1,0x1d,0x45,0x00,0x00,0x00]
+
+movntdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5
+# CHECK: encoding: [0x66,0x0f,0x38,0x2a,0xac,0xcb,0xef,0xbe,0xad,0xde]
diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
new file mode 100644
index 0000000..a74dcd2
--- /dev/null
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -0,0 +1,145 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown %s | FileCheck %s
+
+// CHECK: subb %al, %al
+ subb %al, %al
+
+// CHECK: addl $24, %eax
+ addl $24, %eax
+
+// CHECK: movl %eax, 10(%ebp)
+ movl %eax, 10(%ebp)
+// CHECK: movl %eax, 10(%ebp,%ebx)
+ movl %eax, 10(%ebp, %ebx)
+// CHECK: movl %eax, 10(%ebp,%ebx,4)
+ movl %eax, 10(%ebp, %ebx, 4)
+// CHECK: movl %eax, 10(,%ebx,4)
+ movl %eax, 10(, %ebx, 4)
+
+// CHECK: movl 0, %eax
+ movl 0, %eax
+// CHECK: movl $0, %eax
+ movl $0, %eax
+
+// CHECK: ret
+ ret
+
+// FIXME: Check that this matches SUB32ri8
+// CHECK: subl $1, %eax
+ subl $1, %eax
+
+// FIXME: Check that this matches SUB32ri8
+// CHECK: subl $-1, %eax
+ subl $-1, %eax
+
+// FIXME: Check that this matches SUB32ri
+// CHECK: subl $256, %eax
+ subl $256, %eax
+
+// FIXME: Check that this matches XOR64ri8
+// CHECK: xorq $1, %rax
+ xorq $1, %rax
+
+// FIXME: Check that this matches XOR64ri32
+// CHECK: xorq $256, %rax
+ xorq $256, %rax
+
+// FIXME: Check that this matches SUB8rr
+// CHECK: subb %al, %bl
+ subb %al, %bl
+
+// FIXME: Check that this matches SUB16rr
+// CHECK: subw %ax, %bx
+ subw %ax, %bx
+
+// FIXME: Check that this matches SUB32rr
+// CHECK: subl %eax, %ebx
+ subl %eax, %ebx
+
+// FIXME: Check that this matches the correct instruction.
+// CHECK: call *%rax
+ call *%rax
+
+// FIXME: Check that this matches the correct instruction.
+// CHECK: shldl %cl, %eax, %ebx
+ shldl %cl, %eax, %ebx
+
+// CHECK: shll $2, %eax
+ shll $2, %eax
+
+// CHECK: shll $2, %eax
+ sall $2, %eax
+
+// CHECK: rep
+// CHECK: insb
+ rep;insb
+
+// CHECK: rep
+// CHECK: outsb
+ rep;outsb
+
+// CHECK: rep
+// CHECK: movsb
+ rep;movsb
+
+// CHECK: rep
+// CHECK: lodsb
+ rep;lodsb
+
+// CHECK: rep
+// CHECK: stosb
+ rep;stosb
+
+// NOTE: repz and repe have the same opcode as rep
+// CHECK: rep
+// CHECK: cmpsb
+ repz;cmpsb
+
+// NOTE: repnz has the same opcode as repne
+// CHECK: repne
+// CHECK: cmpsb
+ repnz;cmpsb
+
+// NOTE: repe and repz have the same opcode as rep
+// CHECK: rep
+// CHECK: scasb
+ repe;scasb
+
+// CHECK: repne
+// CHECK: scasb
+ repne;scasb
+
+// CHECK: lock
+// CHECK: cmpxchgb %al, 0(%ebx)
+ lock;cmpxchgb %al, 0(%ebx)
+
+// CHECK: cs
+// CHECK: movb 0(%eax), %al
+ cs;movb 0(%eax), %al
+
+// CHECK: ss
+// CHECK: movb 0(%eax), %al
+ ss;movb 0(%eax), %al
+
+// CHECK: ds
+// CHECK: movb 0(%eax), %al
+ ds;movb 0(%eax), %al
+
+// CHECK: es
+// CHECK: movb 0(%eax), %al
+ es;movb 0(%eax), %al
+
+// CHECK: fs
+// CHECK: movb 0(%eax), %al
+ fs;movb 0(%eax), %al
+
+// CHECK: gs
+// CHECK: movb 0(%eax), %al
+ gs;movb 0(%eax), %al
+
+// CHECK: fadd %st(0)
+// CHECK: fadd %st(1)
+// CHECK: fadd %st(7)
+
+fadd %st(0)
+fadd %st(1)
+fadd %st(7)
diff --git a/test/MC/AsmParser/X86/x86_operands.s b/test/MC/AsmParser/X86/x86_operands.s
new file mode 100644
index 0000000..433c9bf
--- /dev/null
+++ b/test/MC/AsmParser/X86/x86_operands.s
@@ -0,0 +1,58 @@
+// FIXME: Actually test that we get the expected results.
+
+// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# Immediates
+# CHECK: addl $1, %eax
+ addl $1, %eax
+# CHECK: addl $1+2, %eax
+ addl $(1+2), %eax
+# CHECK: addl $a, %eax
+ addl $a, %eax
+# CHECK: addl $1+2, %eax
+ addl $1 + 2, %eax
+
+# Disambiguation
+
+ # FIXME: Add back when we can match this.
+ #addl $1, 4+4
+ # FIXME: Add back when we can match this.
+ #addl $1, (4+4)
+# CHECK: addl $1, 4+4(%eax)
+ addl $1, 4+4(%eax)
+# CHECK: addl $1, 4+4(%eax)
+ addl $1, (4+4)(%eax)
+# CHECK: addl $1, 8(%eax)
+ addl $1, 8(%eax)
+# CHECK: addl $1, 0(%eax)
+ addl $1, (%eax)
+# CHECK: addl $1, 4+4(,%eax)
+ addl $1, (4+4)(,%eax)
+
+# Indirect Memory Operands
+# CHECK: addl $1, 1(%eax)
+ addl $1, 1(%eax)
+# CHECK: addl $1, 1(%eax,%ebx)
+ addl $1, 1(%eax,%ebx)
+# CHECK: addl $1, 1(%eax,%ebx)
+ addl $1, 1(%eax,%ebx,)
+# CHECK: addl $1, 1(%eax,%ebx,4)
+ addl $1, 1(%eax,%ebx,4)
+# CHECK: addl $1, 1(,%ebx)
+ addl $1, 1(,%ebx)
+# CHECK: addl $1, 1(,%ebx)
+ addl $1, 1(,%ebx,)
+# CHECK: addl $1, 1(,%ebx,4)
+ addl $1, 1(,%ebx,4)
+# CHECK: addl $1, 1(,%ebx,4)
+ addl $1, 1(,%ebx,(2+2))
+
+# '*'
+# CHECK: call a
+ call a
+# CHECK: call *%eax
+ call *%eax
+# CHECK: call *4(%eax)
+ call *4(%eax)
+
+
diff --git a/test/MC/AsmParser/X86/x86_word_directive.s b/test/MC/AsmParser/X86/x86_word_directive.s
new file mode 100644
index 0000000..2950c8c
--- /dev/null
+++ b/test/MC/AsmParser/X86/x86_word_directive.s
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .short 3
+TEST0:
+ .word 3
diff --git a/test/MC/AsmParser/assignment.s b/test/MC/AsmParser/assignment.s
new file mode 100644
index 0000000..882fae8ba
--- /dev/null
+++ b/test/MC/AsmParser/assignment.s
@@ -0,0 +1,7 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: a = 0
+TEST0:
+ a = 0
+
diff --git a/test/MC/AsmParser/conditional_asm.s b/test/MC/AsmParser/conditional_asm.s
new file mode 100644
index 0000000..b8a514f
--- /dev/null
+++ b/test/MC/AsmParser/conditional_asm.s
@@ -0,0 +1,12 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s -I %p | FileCheck %s
+
+# CHECK: .byte 1+1
+.if 1+2
+ .if 1-1
+ .byte 1
+ .elseif 2+2
+ .byte 1+1
+ .else
+ .byte 0
+ .endif
+.endif
diff --git a/test/MC/AsmParser/dg.exp b/test/MC/AsmParser/dg.exp
new file mode 100644
index 0000000..64cb75b
--- /dev/null
+++ b/test/MC/AsmParser/dg.exp
@@ -0,0 +1,4 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{s}]]
+
diff --git a/test/MC/AsmParser/directive_abort.s b/test/MC/AsmParser/directive_abort.s
new file mode 100644
index 0000000..3eb8e96f
--- /dev/null
+++ b/test/MC/AsmParser/directive_abort.s
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s 2> %t
+# RUN: FileCheck -input-file %t %s
+
+# CHECK: .abort "please stop assembing"
+TEST0:
+ .abort "please stop assembing"
diff --git a/test/MC/AsmParser/directive_align.s b/test/MC/AsmParser/directive_align.s
new file mode 100644
index 0000000..15eb430
--- /dev/null
+++ b/test/MC/AsmParser/directive_align.s
@@ -0,0 +1,16 @@
+# RUN: llvm-mc -triple i386-apple-darwin9 %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .align 1
+TEST0:
+ .align 1
+
+# CHECK: TEST1:
+# CHECK: .p2alignl 3, 0x0, 2
+TEST1:
+ .align32 3,,2
+
+# CHECK: TEST2:
+# CHECK: .balign 3, 10
+TEST2:
+ .balign 3,10
diff --git a/test/MC/AsmParser/directive_ascii.s b/test/MC/AsmParser/directive_ascii.s
new file mode 100644
index 0000000..5bfc1e9
--- /dev/null
+++ b/test/MC/AsmParser/directive_ascii.s
@@ -0,0 +1,34 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+ .data
+# CHECK: TEST0:
+TEST0:
+ .ascii
+
+# CHECK: TEST1:
+TEST1:
+ .asciz
+
+# CHECK: TEST2:
+# CHECK: .byte 65
+TEST2:
+ .ascii "A"
+
+# CHECK: TEST3:
+# CHECK: .byte 66
+# CHECK: .byte 0
+# CHECK: .byte 67
+# CHECK: .byte 0
+TEST3:
+ .asciz "B", "C"
+
+# CHECK: TEST4:
+# CHECK: .asciz "\001\001\007\0008\001\0001\200"
+TEST4:
+ .ascii "\1\01\07\08\001\0001\200\0"
+
+# CHECK: TEST5:
+# CHECK: .ascii "\b\f\n\r\t\\\""
+TEST5:
+ .ascii "\b\f\n\r\t\\\""
+
diff --git a/test/MC/AsmParser/directive_comm.s b/test/MC/AsmParser/directive_comm.s
new file mode 100644
index 0000000..6cc7937
--- /dev/null
+++ b/test/MC/AsmParser/directive_comm.s
@@ -0,0 +1,8 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .comm a,6,2
+# CHECK: .comm b,8
+TEST0:
+ .comm a, 4+2, 2
+ .comm b,8
diff --git a/test/MC/AsmParser/directive_darwin_section.s b/test/MC/AsmParser/directive_darwin_section.s
new file mode 100644
index 0000000..4fea2ea
--- /dev/null
+++ b/test/MC/AsmParser/directive_darwin_section.s
@@ -0,0 +1,4 @@
+# RUN: llvm-mc -triple i386-apple-darwin9 %s | FileCheck %s
+
+# CHECK: .section __DWARF,__debug_frame,regular,debug
+ .section __DWARF,__debug_frame,regular,debug
diff --git a/test/MC/AsmParser/directive_desc.s b/test/MC/AsmParser/directive_desc.s
new file mode 100644
index 0000000..992455c
--- /dev/null
+++ b/test/MC/AsmParser/directive_desc.s
@@ -0,0 +1,8 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .desc foo,16
+# CHECK: .desc bar,4
+TEST0:
+ .desc foo,0x10
+ .desc bar, 1 +3
diff --git a/test/MC/AsmParser/directive_file.s b/test/MC/AsmParser/directive_file.s
new file mode 100644
index 0000000..3160d5c
--- /dev/null
+++ b/test/MC/AsmParser/directive_file.s
@@ -0,0 +1,8 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+ .file "hello"
+ .file 1 "world"
+
+# CHECK: .file "hello"
+# CHECK: .file 1 "world"
+
diff --git a/test/MC/AsmParser/directive_fill.s b/test/MC/AsmParser/directive_fill.s
new file mode 100644
index 0000000..60bd468
--- /dev/null
+++ b/test/MC/AsmParser/directive_fill.s
@@ -0,0 +1,17 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .byte 10
+TEST0:
+ .fill 1, 1, 10
+
+# CHECK: TEST1:
+# CHECK: .short 3
+# CHECK: .short 3
+TEST1:
+ .fill 2, 2, 3
+
+# CHECK: TEST2:
+# CHECK: .quad 4
+TEST2:
+ .fill 1, 8, 4
diff --git a/test/MC/AsmParser/directive_include.s b/test/MC/AsmParser/directive_include.s
new file mode 100644
index 0000000..fabd941
--- /dev/null
+++ b/test/MC/AsmParser/directive_include.s
@@ -0,0 +1,9 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s -I %p | FileCheck %s
+
+# CHECK: TESTA:
+# CHECK: TEST0:
+# CHECK: a = 0
+# CHECK: TESTB:
+TESTA:
+ .include "directive_set.s"
+TESTB:
diff --git a/test/MC/AsmParser/directive_lcomm.s b/test/MC/AsmParser/directive_lcomm.s
new file mode 100644
index 0000000..0a0add5
--- /dev/null
+++ b/test/MC/AsmParser/directive_lcomm.s
@@ -0,0 +1,10 @@
+# RUN: llvm-mc -triple i386-apple-darwin10 %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .zerofill __DATA,__bss,a,7,4
+# CHECK: .zerofill __DATA,__bss,b,8
+# CHECK: .zerofill __DATA,__bss,c,0
+TEST0:
+ .lcomm a, 8-1, 4
+ .lcomm b,8
+ .lcomm c, 0
diff --git a/test/MC/AsmParser/directive_line.s b/test/MC/AsmParser/directive_line.s
new file mode 100644
index 0000000..94ce446
--- /dev/null
+++ b/test/MC/AsmParser/directive_line.s
@@ -0,0 +1,5 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s
+# FIXME: Actually test the output.
+
+ .line
+ .line 1
diff --git a/test/MC/AsmParser/directive_loc.s b/test/MC/AsmParser/directive_loc.s
new file mode 100644
index 0000000..b122fdc
--- /dev/null
+++ b/test/MC/AsmParser/directive_loc.s
@@ -0,0 +1,8 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s
+# FIXME: Actually test the output.
+
+ .file 1 "hello"
+ .loc 1
+ .loc 1 2
+ .loc 1 2 3
+
diff --git a/test/MC/AsmParser/directive_lsym.s b/test/MC/AsmParser/directive_lsym.s
new file mode 100644
index 0000000..7b70cac
--- /dev/null
+++ b/test/MC/AsmParser/directive_lsym.s
@@ -0,0 +1,13 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# FIXME: This is currently unsupported. If it turns out no one uses it, we
+# should just rip it out.
+
+# XFAIL: *
+
+# CHECK: TEST0:
+# CHECK: .lsym bar,foo
+# CHECK: .lsym baz,3
+TEST0:
+ .lsym bar, foo
+ .lsym baz, 2+1
diff --git a/test/MC/AsmParser/directive_org.s b/test/MC/AsmParser/directive_org.s
new file mode 100644
index 0000000..f4414c3
--- /dev/null
+++ b/test/MC/AsmParser/directive_org.s
@@ -0,0 +1,11 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .org 1, 0
+TEST0:
+ .org 1
+
+# CHECK: TEST1:
+# CHECK: .org 1, 3
+TEST1:
+ .org 1, 3
diff --git a/test/MC/AsmParser/directive_set.s b/test/MC/AsmParser/directive_set.s
new file mode 100644
index 0000000..f1fc30a
--- /dev/null
+++ b/test/MC/AsmParser/directive_set.s
@@ -0,0 +1,7 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: a = 0
+TEST0:
+ .set a, 0
+
diff --git a/test/MC/AsmParser/directive_space.s b/test/MC/AsmParser/directive_space.s
new file mode 100644
index 0000000..e6353a4
--- /dev/null
+++ b/test/MC/AsmParser/directive_space.s
@@ -0,0 +1,11 @@
+# RUN: llvm-mc -triple i386-apple-darwin %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .space 1
+TEST0:
+ .space 1
+
+# CHECK: TEST1:
+# CHECK: .space 2,3
+TEST1:
+ .space 2, 3
diff --git a/test/MC/AsmParser/directive_subsections_via_symbols.s b/test/MC/AsmParser/directive_subsections_via_symbols.s
new file mode 100644
index 0000000..38d69c9
--- /dev/null
+++ b/test/MC/AsmParser/directive_subsections_via_symbols.s
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .subsections_via_symbols
+TEST0:
+ .subsections_via_symbols
diff --git a/test/MC/AsmParser/directive_symbol_attrs.s b/test/MC/AsmParser/directive_symbol_attrs.s
new file mode 100644
index 0000000..99ef3b8
--- /dev/null
+++ b/test/MC/AsmParser/directive_symbol_attrs.s
@@ -0,0 +1,7 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .globl a
+# CHECK: .globl b
+TEST0:
+ .globl a, b
diff --git a/test/MC/AsmParser/directive_values.s b/test/MC/AsmParser/directive_values.s
new file mode 100644
index 0000000..beac69a
--- /dev/null
+++ b/test/MC/AsmParser/directive_values.s
@@ -0,0 +1,21 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .byte 0
+TEST0:
+ .byte 0
+
+# CHECK: TEST1:
+# CHECK: .short 3
+TEST1:
+ .short 3
+
+# CHECK: TEST2:
+# CHECK: .long 8
+TEST2:
+ .long 8
+
+# CHECK: TEST3:
+# CHECK: .quad 9
+TEST3:
+ .quad 9
diff --git a/test/MC/AsmParser/directive_zerofill.s b/test/MC/AsmParser/directive_zerofill.s
new file mode 100644
index 0000000..4b26f9b
--- /dev/null
+++ b/test/MC/AsmParser/directive_zerofill.s
@@ -0,0 +1,10 @@
+# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
+
+# CHECK: TEST0:
+# CHECK: .zerofill __FOO,__bar,x,1
+# CHECK: .zerofill __FOO,__bar,y,8,2
+# CHECK: .zerofill __EMPTY,__NoSymbol
+TEST0:
+ .zerofill __FOO, __bar, x, 2-1
+ .zerofill __FOO, __bar, y , 8 , 1+1
+ .zerofill __EMPTY,__NoSymbol
diff --git a/test/MC/AsmParser/exprs-invalid.s b/test/MC/AsmParser/exprs-invalid.s
new file mode 100644
index 0000000..5358fc5
--- /dev/null
+++ b/test/MC/AsmParser/exprs-invalid.s
@@ -0,0 +1,13 @@
+// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t
+// RUN: FileCheck -input-file %t %s
+
+// Currently XFAIL'ed, since the front-end isn't validating this. Figure out the
+// right resolution.
+//
+// XFAIL: *
+
+ .text
+a:
+ .data
+// CHECK: expected relocatable expression
+ .long -(0 + a)
diff --git a/test/MC/AsmParser/exprs.s b/test/MC/AsmParser/exprs.s
new file mode 100644
index 0000000..62b11c2
--- /dev/null
+++ b/test/MC/AsmParser/exprs.s
@@ -0,0 +1,63 @@
+// FIXME: For now this test just checks that llvm-mc -triple i386-unknown-unknown works. Once we have .macro,
+// .if, and .abort we can write a better test (without resorting to miles of
+// greps).
+
+// RUN: llvm-mc -triple i386-unknown-unknown %s > %t
+
+ .text
+g:
+h:
+j:
+k:
+ .data
+ .byte !1 + 2
+ .byte !0
+ .byte ~0
+ .byte -1
+ .byte +1
+ .byte 1 + 2
+ .byte 1 & 3
+ .byte 4 / 2
+ .byte 4 / -2
+ .byte 1 == 1
+ .byte 1 == 0
+ .byte 1 > 0
+ .byte 1 >= 1
+ .byte 1 < 2
+ .byte 1 <= 1
+ .byte 4 % 3
+ .byte 2 * 2
+ .byte 2 != 2
+ .byte 2 <> 2
+ .byte 1 | 2
+ .byte 1 << 1
+ .byte 2 >> 1
+ .byte ~0 >> 1
+ .byte 3 - 2
+ .byte 1 ^ 3
+ .byte 1 && 2
+ .byte 3 && 0
+ .byte 1 || 2
+ .byte 0 || 0
+
+ .set c, 10
+ .byte c + 1
+
+ d = e + 10
+ .long d
+
+ f = g - h + 5
+ .long f
+
+ i = (j + 10) - (k + 2)
+ .long i
+
+ l = m - n + 4
+
+ .text
+m:
+n:
+ nop
+
+
+ movw $8, (42)+66(%eax)
diff --git a/test/MC/AsmParser/hello.s b/test/MC/AsmParser/hello.s
new file mode 100644
index 0000000..01e3b4d
--- /dev/null
+++ b/test/MC/AsmParser/hello.s
@@ -0,0 +1,28 @@
+// RUN: llvm-mc -triple i386-unknown-unknown %s -o -
+// RUN: llvm-mc -triple i386-unknown-unknown %s -o - -output-asm-variant=1
+
+ .text
+ .align 4,0x90
+ .globl _main
+_main:
+ pushl %ebp
+ movl %esp, %ebp
+ subl $8, %esp
+ call "L1$pb"
+"L1$pb":
+ popl %eax
+ movl $0, -4(%ebp)
+ movl %esp, %ecx
+ leal L_.str-"L1$pb"(%eax), %eax
+ movl %eax, (%ecx)
+ call _printf
+ movl $0, -4(%ebp)
+ movl -4(%ebp), %eax
+ addl $8, %esp
+ popl %ebp
+ //ret
+ .subsections_via_symbols
+ .cstring
+L_.str:
+ .asciz "hello world!\n"
+
diff --git a/test/MC/AsmParser/labels.s b/test/MC/AsmParser/labels.s
new file mode 100644
index 0000000..3bc7e63
--- /dev/null
+++ b/test/MC/AsmParser/labels.s
@@ -0,0 +1,59 @@
+// RUN: llvm-mc -triple i686-apple-darwin10 %s | FileCheck %s
+
+ .data
+// CHECK: a:
+a:
+ .long 0
+// CHECK: b:
+"b":
+ .long 0
+// CHECK: a$b:
+"a$b":
+ .long 0
+
+ .text
+foo:
+// CHECK: addl $24, a$b(%eax)
+ addl $24, "a$b"(%eax)
+// CHECK: addl $24, a$b+10(%eax)
+ addl $24, ("a$b" + 10)(%eax)
+
+// CHECK: b$c = 10
+"b$c" = 10
+// CHECK: addl $10, %eax
+ addl $"b$c", %eax
+
+// CHECK: "a 0" = 11
+ .set "a 0", 11
+
+// CHECK: .long 11
+ .long "a 0"
+
+// XXCHCK: .section "a 1,a 2"
+//.section "a 1", "a 2"
+
+// CHECK: .globl "a 3"
+ .globl "a 3"
+
+// CHECK: .weak "a 4"
+ .weak "a 4"
+
+// CHECK: .desc "a 5",1
+ .desc "a 5", 1
+
+// CHECK: .comm "a 6",1
+ .comm "a 6", 1
+
+// CHECK: .zerofill __DATA,__bss,"a 7",1,0
+ .lcomm "a 7", 1
+
+// FIXME: We don't bother to support .lsym.
+
+// CHECX: .lsym "a 8",1
+// .lsym "a 8", 1
+
+// CHECK: "a 9" = a-b
+ .set "a 9", a - b
+
+// CHECK: .long "a 9"
+ .long "a 9"
diff --git a/test/MC/AsmParser/variables-invalid.s b/test/MC/AsmParser/variables-invalid.s
new file mode 100644
index 0000000..9656889
--- /dev/null
+++ b/test/MC/AsmParser/variables-invalid.s
@@ -0,0 +1,17 @@
+// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t
+// RUN: FileCheck --input-file %t %s
+
+ .data
+// CHECK: invalid assignment to 't0_v0'
+ t0_v0 = t0_v0 + 1
+
+ t1_v1 = 1
+ t1_v1 = 2
+
+t2_s0:
+// CHECK: redefinition of 't2_s0'
+ t2_s0 = 2
+
+ t3_s0 = t2_s0 + 1
+// CHECK: invalid reassignment of non-absolute variable 't3_s0'
+ t3_s0 = 1
diff --git a/test/MC/AsmParser/variables.s b/test/MC/AsmParser/variables.s
new file mode 100644
index 0000000..cb004d7
--- /dev/null
+++ b/test/MC/AsmParser/variables.s
@@ -0,0 +1,15 @@
+// RUN: llvm-mc -triple i386-unknown-unknown %s
+
+ .data
+ t0_v0 = 1
+ t0_v1 = t0_v0
+ .if t0_v1 != 1
+ .abort "invalid value"
+ .endif
+
+ t1_v0 = 1
+ t1_v1 = t0_v0
+ t1_v0 = 2
+ .if t0_v1 != 1
+ .abort "invalid value"
+ .endif
diff --git a/test/MC/Disassembler/dg.exp b/test/MC/Disassembler/dg.exp
new file mode 100644
index 0000000..68d5f1d
--- /dev/null
+++ b/test/MC/Disassembler/dg.exp
@@ -0,0 +1,4 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]]
+
diff --git a/test/MC/Disassembler/simple-tests.txt b/test/MC/Disassembler/simple-tests.txt
new file mode 100644
index 0000000..1e3249f
--- /dev/null
+++ b/test/MC/Disassembler/simple-tests.txt
@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
+
+# CHECK: int $33
+0xCD 0x21
+
+# CHECK: int $33
+0xCD 0x21
+
+
+# CHECK: addb %al, (%rax)
+0 0
+
+# CHECK: callq -1234
+0xe8 0x2e 0xfb 0xff 0xff
+
diff --git a/test/MC/MachO/Darwin/dg.exp b/test/MC/MachO/Darwin/dg.exp
new file mode 100644
index 0000000..0f34b63
--- /dev/null
+++ b/test/MC/MachO/Darwin/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_darwin_and_target X86] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{s}]]
+}
diff --git a/test/MC/MachO/Darwin/x86_32_diff_as.s b/test/MC/MachO/Darwin/x86_32_diff_as.s
new file mode 100644
index 0000000..dd5fb55
--- /dev/null
+++ b/test/MC/MachO/Darwin/x86_32_diff_as.s
@@ -0,0 +1,550 @@
+// Validate that we can assemble this file exactly like the platform
+// assembler.
+//
+// RUN: llvm-mc -filetype=obj -triple i386-unknown-unknown -o %t.mc.o %s
+// RUN: as -arch i386 -o %t.as.o %s
+// RUN: diff %t.mc.o %t.as.o
+
+ movb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ movw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ movl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ movl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ movsbl 0xdeadbeef(%ebx,%ecx,8),%ecx
+ movswl 0xdeadbeef(%ebx,%ecx,8),%ecx
+ movzbl 0xdeadbeef(%ebx,%ecx,8),%ecx
+ movzwl 0xdeadbeef(%ebx,%ecx,8),%ecx
+ pushl 0xdeadbeef(%ebx,%ecx,8)
+ popl 0xdeadbeef(%ebx,%ecx,8)
+ lahf
+ sahf
+ addb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+ addb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ addw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ addl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ addl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ incl 0xdeadbeef(%ebx,%ecx,8)
+ subb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+ subb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ subw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ subl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ subl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ decl 0xdeadbeef(%ebx,%ecx,8)
+ sbbw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ sbbl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ sbbl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ cmpb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+ cmpb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ cmpw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ cmpl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ cmpl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ testb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ testw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ testl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ testl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ andb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+ andb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ andw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ andl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ andl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ orb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+ orb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ orw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ orl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ orl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ xorb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+ xorb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ xorw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ xorl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ xorl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ adcb $0xfe,0xdeadbeef(%ebx,%ecx,8)
+ adcb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ adcw $0x7ace,0xdeadbeef(%ebx,%ecx,8)
+ adcl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8)
+ adcl $0x13572468,0xdeadbeef(%ebx,%ecx,8)
+ negl 0xdeadbeef(%ebx,%ecx,8)
+ notl 0xdeadbeef(%ebx,%ecx,8)
+ cbtw
+ cwtl
+ cwtd
+ cltd
+ mull 0xdeadbeef(%ebx,%ecx,8)
+ imull 0xdeadbeef(%ebx,%ecx,8)
+ divl 0xdeadbeef(%ebx,%ecx,8)
+ idivl 0xdeadbeef(%ebx,%ecx,8)
+ roll $0,0xdeadbeef(%ebx,%ecx,8)
+ rolb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ roll 0xdeadbeef(%ebx,%ecx,8)
+ rorl $0,0xdeadbeef(%ebx,%ecx,8)
+ rorb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ rorl 0xdeadbeef(%ebx,%ecx,8)
+ shll $0,0xdeadbeef(%ebx,%ecx,8)
+ shlb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ shll 0xdeadbeef(%ebx,%ecx,8)
+ shrl $0,0xdeadbeef(%ebx,%ecx,8)
+ shrb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ shrl 0xdeadbeef(%ebx,%ecx,8)
+ sarl $0,0xdeadbeef(%ebx,%ecx,8)
+ sarb $0x7f,0xdeadbeef(%ebx,%ecx,8)
+ sarl 0xdeadbeef(%ebx,%ecx,8)
+ call *%ecx
+ call *0xdeadbeef(%ebx,%ecx,8)
+ call *0xdeadbeef(%ebx,%ecx,8)
+ jmp *0xdeadbeef(%ebx,%ecx,8)
+ jmp *0xdeadbeef(%ebx,%ecx,8)
+ ljmpl *0xdeadbeef(%ebx,%ecx,8)
+ lret
+ leave
+ seto %bl
+ seto 0xdeadbeef(%ebx,%ecx,8)
+ setno %bl
+ setno 0xdeadbeef(%ebx,%ecx,8)
+ setb %bl
+ setb 0xdeadbeef(%ebx,%ecx,8)
+ setae %bl
+ setae 0xdeadbeef(%ebx,%ecx,8)
+ sete %bl
+ sete 0xdeadbeef(%ebx,%ecx,8)
+ setne %bl
+ setne 0xdeadbeef(%ebx,%ecx,8)
+ setbe %bl
+ setbe 0xdeadbeef(%ebx,%ecx,8)
+ seta %bl
+ seta 0xdeadbeef(%ebx,%ecx,8)
+ sets %bl
+ sets 0xdeadbeef(%ebx,%ecx,8)
+ setns %bl
+ setns 0xdeadbeef(%ebx,%ecx,8)
+ setp %bl
+ setp 0xdeadbeef(%ebx,%ecx,8)
+ setnp %bl
+ setnp 0xdeadbeef(%ebx,%ecx,8)
+ setl %bl
+ setl 0xdeadbeef(%ebx,%ecx,8)
+ setge %bl
+ setge 0xdeadbeef(%ebx,%ecx,8)
+ setle %bl
+ setle 0xdeadbeef(%ebx,%ecx,8)
+ setg %bl
+ setg 0xdeadbeef(%ebx,%ecx,8)
+ nopl 0xdeadbeef(%ebx,%ecx,8)
+ nop
+ fldl 0xdeadbeef(%ebx,%ecx,8)
+ fildl 0xdeadbeef(%ebx,%ecx,8)
+ fildll 0xdeadbeef(%ebx,%ecx,8)
+ fldt 0xdeadbeef(%ebx,%ecx,8)
+ fbld 0xdeadbeef(%ebx,%ecx,8)
+ fstl 0xdeadbeef(%ebx,%ecx,8)
+ fistl 0xdeadbeef(%ebx,%ecx,8)
+ fstpl 0xdeadbeef(%ebx,%ecx,8)
+ fistpl 0xdeadbeef(%ebx,%ecx,8)
+ fistpll 0xdeadbeef(%ebx,%ecx,8)
+ fstpt 0xdeadbeef(%ebx,%ecx,8)
+ fbstp 0xdeadbeef(%ebx,%ecx,8)
+ ficoml 0xdeadbeef(%ebx,%ecx,8)
+ ficompl 0xdeadbeef(%ebx,%ecx,8)
+ fucompp
+ ftst
+ fld1
+ fldz
+ faddl 0xdeadbeef(%ebx,%ecx,8)
+ fiaddl 0xdeadbeef(%ebx,%ecx,8)
+ fsubl 0xdeadbeef(%ebx,%ecx,8)
+ fisubl 0xdeadbeef(%ebx,%ecx,8)
+ fsubrl 0xdeadbeef(%ebx,%ecx,8)
+ fisubrl 0xdeadbeef(%ebx,%ecx,8)
+ fmull 0xdeadbeef(%ebx,%ecx,8)
+ fimull 0xdeadbeef(%ebx,%ecx,8)
+ fdivl 0xdeadbeef(%ebx,%ecx,8)
+ fidivl 0xdeadbeef(%ebx,%ecx,8)
+ fdivrl 0xdeadbeef(%ebx,%ecx,8)
+ fidivrl 0xdeadbeef(%ebx,%ecx,8)
+ fsqrt
+ fsin
+ fcos
+ fchs
+ fabs
+ fldcw 0xdeadbeef(%ebx,%ecx,8)
+ fnstcw 0xdeadbeef(%ebx,%ecx,8)
+ rdtsc
+ sysenter
+ sysexit
+ ud2
+ movnti %ecx,0xdeadbeef(%ebx,%ecx,8)
+ clflush 0xdeadbeef(%ebx,%ecx,8)
+ emms
+ movd %ecx,%mm3
+ movd 0xdeadbeef(%ebx,%ecx,8),%mm3
+ movd %ecx,%xmm5
+ movd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movd %xmm5,%ecx
+ movd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movq 0xdeadbeef(%ebx,%ecx,8),%mm3
+ movq %mm3,%mm3
+ movq %mm3,%mm3
+ movq %xmm5,%xmm5
+ movq %xmm5,%xmm5
+ packssdw %mm3,%mm3
+ packssdw %xmm5,%xmm5
+ packsswb %mm3,%mm3
+ packsswb %xmm5,%xmm5
+ packuswb %mm3,%mm3
+ packuswb %xmm5,%xmm5
+ paddb %mm3,%mm3
+ paddb %xmm5,%xmm5
+ paddw %mm3,%mm3
+ paddw %xmm5,%xmm5
+ paddd %mm3,%mm3
+ paddd %xmm5,%xmm5
+ paddq %mm3,%mm3
+ paddq %xmm5,%xmm5
+ paddsb %mm3,%mm3
+ paddsb %xmm5,%xmm5
+ paddsw %mm3,%mm3
+ paddsw %xmm5,%xmm5
+ paddusb %mm3,%mm3
+ paddusb %xmm5,%xmm5
+ paddusw %mm3,%mm3
+ paddusw %xmm5,%xmm5
+ pand %mm3,%mm3
+ pand %xmm5,%xmm5
+ pandn %mm3,%mm3
+ pandn %xmm5,%xmm5
+ pcmpeqb %mm3,%mm3
+ pcmpeqb %xmm5,%xmm5
+ pcmpeqw %mm3,%mm3
+ pcmpeqw %xmm5,%xmm5
+ pcmpeqd %mm3,%mm3
+ pcmpeqd %xmm5,%xmm5
+ pcmpgtb %mm3,%mm3
+ pcmpgtb %xmm5,%xmm5
+ pcmpgtw %mm3,%mm3
+ pcmpgtw %xmm5,%xmm5
+ pcmpgtd %mm3,%mm3
+ pcmpgtd %xmm5,%xmm5
+ pmaddwd %mm3,%mm3
+ pmaddwd %xmm5,%xmm5
+ pmulhw %mm3,%mm3
+ pmulhw %xmm5,%xmm5
+ pmullw %mm3,%mm3
+ pmullw %xmm5,%xmm5
+ por %mm3,%mm3
+ por %xmm5,%xmm5
+ psllw %mm3,%mm3
+ psllw %xmm5,%xmm5
+ psllw $0x7f,%mm3
+ psllw $0x7f,%xmm5
+ pslld %mm3,%mm3
+ pslld %xmm5,%xmm5
+ pslld $0x7f,%mm3
+ pslld $0x7f,%xmm5
+ psllq %mm3,%mm3
+ psllq %xmm5,%xmm5
+ psllq $0x7f,%mm3
+ psllq $0x7f,%xmm5
+ psraw %mm3,%mm3
+ psraw %xmm5,%xmm5
+ psraw $0x7f,%mm3
+ psraw $0x7f,%xmm5
+ psrad %mm3,%mm3
+ psrad %xmm5,%xmm5
+ psrad $0x7f,%mm3
+ psrad $0x7f,%xmm5
+ psrlw %mm3,%mm3
+ psrlw %xmm5,%xmm5
+ psrlw $0x7f,%mm3
+ psrlw $0x7f,%xmm5
+ psrld %mm3,%mm3
+ psrld %xmm5,%xmm5
+ psrld $0x7f,%mm3
+ psrld $0x7f,%xmm5
+ psrlq %mm3,%mm3
+ psrlq %xmm5,%xmm5
+ psrlq $0x7f,%mm3
+ psrlq $0x7f,%xmm5
+ psubb %mm3,%mm3
+ psubb %xmm5,%xmm5
+ psubw %mm3,%mm3
+ psubw %xmm5,%xmm5
+ psubd %mm3,%mm3
+ psubd %xmm5,%xmm5
+ psubq %mm3,%mm3
+ psubq %xmm5,%xmm5
+ psubsb %mm3,%mm3
+ psubsb %xmm5,%xmm5
+ psubsw %mm3,%mm3
+ psubsw %xmm5,%xmm5
+ psubusb %mm3,%mm3
+ psubusb %xmm5,%xmm5
+ psubusw %mm3,%mm3
+ psubusw %xmm5,%xmm5
+ punpckhbw %mm3,%mm3
+ punpckhbw %xmm5,%xmm5
+ punpckhwd %mm3,%mm3
+ punpckhwd %xmm5,%xmm5
+ punpckhdq %mm3,%mm3
+ punpckhdq %xmm5,%xmm5
+ punpcklbw %mm3,%mm3
+ punpcklbw %xmm5,%xmm5
+ punpcklwd %mm3,%mm3
+ punpcklwd %xmm5,%xmm5
+ punpckldq %mm3,%mm3
+ punpckldq %xmm5,%xmm5
+ pxor %mm3,%mm3
+ pxor %xmm5,%xmm5
+ addps %xmm5,%xmm5
+ addss %xmm5,%xmm5
+ andnps %xmm5,%xmm5
+ andps %xmm5,%xmm5
+ cvtpi2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvtpi2ps %mm3,%xmm5
+ cvtps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+ cvtps2pi %xmm5,%mm3
+ cvtsi2ss %ecx,%xmm5
+ cvtsi2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+ cvttps2pi %xmm5,%mm3
+ cvttss2si 0xdeadbeef(%ebx,%ecx,8),%ecx
+ cvttss2si %xmm5,%ecx
+ divps %xmm5,%xmm5
+ divss %xmm5,%xmm5
+ ldmxcsr 0xdeadbeef(%ebx,%ecx,8)
+ maskmovq %mm3,%mm3
+ maxps %xmm5,%xmm5
+ maxss %xmm5,%xmm5
+ minps %xmm5,%xmm5
+ minss %xmm5,%xmm5
+ movaps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movaps %xmm5,%xmm5
+ movaps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movaps %xmm5,%xmm5
+ movhlps %xmm5,%xmm5
+ movhps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movlhps %xmm5,%xmm5
+ movlps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movmskps %xmm5,%ecx
+ movntps %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movntq %mm3,0xdeadbeef(%ebx,%ecx,8)
+ movntdq %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movss %xmm5,%xmm5
+ movss %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movss %xmm5,%xmm5
+ movups 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movups %xmm5,%xmm5
+ movups %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movups %xmm5,%xmm5
+ mulps %xmm5,%xmm5
+ mulss %xmm5,%xmm5
+ orps %xmm5,%xmm5
+ pavgb %mm3,%mm3
+ pavgb %xmm5,%xmm5
+ pavgw %mm3,%mm3
+ pavgw %xmm5,%xmm5
+ pmaxsw %mm3,%mm3
+ pmaxsw %xmm5,%xmm5
+ pmaxub %mm3,%mm3
+ pmaxub %xmm5,%xmm5
+ pminsw %mm3,%mm3
+ pminsw %xmm5,%xmm5
+ pminub %mm3,%mm3
+ pminub %xmm5,%xmm5
+ pmovmskb %mm3,%ecx
+ pmovmskb %xmm5,%ecx
+ pmulhuw %mm3,%mm3
+ pmulhuw %xmm5,%xmm5
+ prefetchnta 0xdeadbeef(%ebx,%ecx,8)
+ prefetcht0 0xdeadbeef(%ebx,%ecx,8)
+ prefetcht1 0xdeadbeef(%ebx,%ecx,8)
+ prefetcht2 0xdeadbeef(%ebx,%ecx,8)
+ psadbw %mm3,%mm3
+ psadbw %xmm5,%xmm5
+ rcpps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ rcpps %xmm5,%xmm5
+ rcpss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ rcpss %xmm5,%xmm5
+ rsqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ rsqrtps %xmm5,%xmm5
+ rsqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ rsqrtss %xmm5,%xmm5
+ sqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ sqrtps %xmm5,%xmm5
+ sqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ sqrtss %xmm5,%xmm5
+ stmxcsr 0xdeadbeef(%ebx,%ecx,8)
+ subps %xmm5,%xmm5
+ subss %xmm5,%xmm5
+ ucomiss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ ucomiss %xmm5,%xmm5
+ unpckhps %xmm5,%xmm5
+ unpcklps %xmm5,%xmm5
+ xorps %xmm5,%xmm5
+ addpd %xmm5,%xmm5
+ addsd %xmm5,%xmm5
+ andnpd %xmm5,%xmm5
+ andpd %xmm5,%xmm5
+ comisd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ comisd %xmm5,%xmm5
+ cvtpi2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvtpi2pd %mm3,%xmm5
+ cvtsi2sd %ecx,%xmm5
+ cvtsi2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ divpd %xmm5,%xmm5
+ divsd %xmm5,%xmm5
+ maxpd %xmm5,%xmm5
+ maxsd %xmm5,%xmm5
+ minpd %xmm5,%xmm5
+ minsd %xmm5,%xmm5
+ movapd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movapd %xmm5,%xmm5
+ movapd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movapd %xmm5,%xmm5
+ movhpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movlpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movmskpd %xmm5,%ecx
+ movntpd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movsd %xmm5,%xmm5
+ movsd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movsd %xmm5,%xmm5
+ movupd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movupd %xmm5,%xmm5
+ movupd %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movupd %xmm5,%xmm5
+ mulpd %xmm5,%xmm5
+ mulsd %xmm5,%xmm5
+ orpd %xmm5,%xmm5
+ sqrtpd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ sqrtpd %xmm5,%xmm5
+ sqrtsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ sqrtsd %xmm5,%xmm5
+ subpd %xmm5,%xmm5
+ subsd %xmm5,%xmm5
+ ucomisd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ ucomisd %xmm5,%xmm5
+ unpckhpd %xmm5,%xmm5
+ unpcklpd %xmm5,%xmm5
+ xorpd %xmm5,%xmm5
+ cvtdq2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvtdq2pd %xmm5,%xmm5
+ cvtpd2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvtpd2dq %xmm5,%xmm5
+ cvtdq2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvtdq2ps %xmm5,%xmm5
+ cvtpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+ cvtpd2pi %xmm5,%mm3
+ cvtps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvtps2dq %xmm5,%xmm5
+ cvtsd2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvtsd2ss %xmm5,%xmm5
+ cvtss2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ cvtss2sd %xmm5,%xmm5
+ cvttpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3
+ cvttpd2pi %xmm5,%mm3
+ cvttsd2si 0xdeadbeef(%ebx,%ecx,8),%ecx
+ cvttsd2si %xmm5,%ecx
+ maskmovdqu %xmm5,%xmm5
+ movdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movdqa %xmm5,%xmm5
+ movdqa %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movdqa %xmm5,%xmm5
+ movdqu 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movdqu %xmm5,0xdeadbeef(%ebx,%ecx,8)
+ movdq2q %xmm5,%mm3
+ movq2dq %mm3,%xmm5
+ pmuludq %mm3,%mm3
+ pmuludq %xmm5,%xmm5
+ pslldq $0x7f,%xmm5
+ psrldq $0x7f,%xmm5
+ punpckhqdq %xmm5,%xmm5
+ punpcklqdq %xmm5,%xmm5
+ addsubpd %xmm5,%xmm5
+ addsubps %xmm5,%xmm5
+ haddpd %xmm5,%xmm5
+ haddps %xmm5,%xmm5
+ hsubpd %xmm5,%xmm5
+ hsubps %xmm5,%xmm5
+ lddqu 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movddup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movddup %xmm5,%xmm5
+ movshdup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movshdup %xmm5,%xmm5
+ movsldup 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ movsldup %xmm5,%xmm5
+ phaddw %mm3,%mm3
+ phaddw %xmm5,%xmm5
+ phaddd %mm3,%mm3
+ phaddd %xmm5,%xmm5
+ phaddsw %mm3,%mm3
+ phaddsw %xmm5,%xmm5
+ phsubw %mm3,%mm3
+ phsubw %xmm5,%xmm5
+ phsubd %mm3,%mm3
+ phsubd %xmm5,%xmm5
+ phsubsw %mm3,%mm3
+ phsubsw %xmm5,%xmm5
+ pmaddubsw %mm3,%mm3
+ pmaddubsw %xmm5,%xmm5
+ pmulhrsw %mm3,%mm3
+ pmulhrsw %xmm5,%xmm5
+ pshufb %mm3,%mm3
+ pshufb %xmm5,%xmm5
+ psignb %mm3,%mm3
+ psignb %xmm5,%xmm5
+ psignw %mm3,%mm3
+ psignw %xmm5,%xmm5
+ psignd %mm3,%mm3
+ psignd %xmm5,%xmm5
+ pabsb 0xdeadbeef(%ebx,%ecx,8),%mm3
+ pabsb %mm3,%mm3
+ pabsb 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pabsb %xmm5,%xmm5
+ pabsw 0xdeadbeef(%ebx,%ecx,8),%mm3
+ pabsw %mm3,%mm3
+ pabsw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pabsw %xmm5,%xmm5
+ pabsd 0xdeadbeef(%ebx,%ecx,8),%mm3
+ pabsd %mm3,%mm3
+ pabsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pabsd %xmm5,%xmm5
+ femms
+ packusdw %xmm5,%xmm5
+ pcmpeqq %xmm5,%xmm5
+ phminposuw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ phminposuw %xmm5,%xmm5
+ pmaxsb %xmm5,%xmm5
+ pmaxsd %xmm5,%xmm5
+ pmaxud %xmm5,%xmm5
+ pmaxuw %xmm5,%xmm5
+ pminsb %xmm5,%xmm5
+ pminsd %xmm5,%xmm5
+ pminud %xmm5,%xmm5
+ pminuw %xmm5,%xmm5
+ pmovsxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovsxbw %xmm5,%xmm5
+ pmovsxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovsxbd %xmm5,%xmm5
+ pmovsxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovsxbq %xmm5,%xmm5
+ pmovsxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovsxwd %xmm5,%xmm5
+ pmovsxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovsxwq %xmm5,%xmm5
+ pmovsxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovsxdq %xmm5,%xmm5
+ pmovzxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovzxbw %xmm5,%xmm5
+ pmovzxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovzxbd %xmm5,%xmm5
+ pmovzxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovzxbq %xmm5,%xmm5
+ pmovzxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovzxwd %xmm5,%xmm5
+ pmovzxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovzxwq %xmm5,%xmm5
+ pmovzxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ pmovzxdq %xmm5,%xmm5
+ pmuldq %xmm5,%xmm5
+ pmulld %xmm5,%xmm5
+ ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5
+ ptest %xmm5,%xmm5
+ pcmpgtq %xmm5,%xmm5
diff --git a/test/MC/MachO/comm-1.s b/test/MC/MachO/comm-1.s
new file mode 100644
index 0000000..e979fb1
--- /dev/null
+++ b/test/MC/MachO/comm-1.s
@@ -0,0 +1,114 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+ .comm sym_comm_B, 2
+ .comm sym_comm_A, 4
+ .comm sym_comm_C, 8, 2
+ .comm sym_comm_D, 2, 3
+
+ .no_dead_strip sym_comm_C
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 228)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 124)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 0)
+// CHECK: ('file_offset', 256)
+// CHECK: ('file_size', 0)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 1)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 256)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 256)
+// CHECK: ('nsyms', 4)
+// CHECK: ('stroff', 304)
+// CHECK: ('strsize', 48)
+// CHECK: ('_string_data', '\x00sym_comm_B\x00sym_comm_A\x00sym_comm_C\x00sym_comm_D\x00\x00\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 12)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 4)
+// CHECK: ('_string', 'sym_comm_A')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 2)
+// CHECK: ('_string', 'sym_comm_B')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 23)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 544)
+// CHECK: ('n_value', 8)
+// CHECK: ('_string', 'sym_comm_C')
+// CHECK: ),
+// CHECK: # Symbol 3
+// CHECK: (('n_strx', 34)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 768)
+// CHECK: ('n_value', 2)
+// CHECK: ('_string', 'sym_comm_D')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 0)
+// CHECK: ('iextdefsym', 0)
+// CHECK: ('nextdefsym', 0)
+// CHECK: ('iundefsym', 0)
+// CHECK: ('nundefsym', 4)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/data.s b/test/MC/MachO/data.s
new file mode 100644
index 0000000..0ff2854
--- /dev/null
+++ b/test/MC/MachO/data.s
@@ -0,0 +1,67 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+ .data
+ .ascii "hello"
+ .byte 0xAB
+ .short 0xABCD
+ .long 0xABCDABCD
+ .quad 0xABCDABCDABCDABCD
+.org 30
+ .long 0xF000 // 34
+ .p2align 3, 0xAB // 40 (0xAB * 6)
+ .short 0 // 42
+ .p2alignw 3, 0xABCD // 48 (0xABCD * 2)
+ .short 0 // 50
+ .p2alignw 3, 0xABCD, 5 // 50
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 192)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 192)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 50)
+// CHECK: ('file_offset', 220)
+// CHECK: ('file_size', 50)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 2)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 220)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 1
+// CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 50)
+// CHECK: ('offset', 220)
+// CHECK: ('alignment', 3)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
+
+// FIXME: Dump contents, so we can check those too.
diff --git a/test/MC/MachO/dg.exp b/test/MC/MachO/dg.exp
new file mode 100644
index 0000000..ca6aefe
--- /dev/null
+++ b/test/MC/MachO/dg.exp
@@ -0,0 +1,6 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target X86] } {
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{s}]]
+}
+
diff --git a/test/MC/MachO/lcomm-attributes.s b/test/MC/MachO/lcomm-attributes.s
new file mode 100644
index 0000000..2685395
--- /dev/null
+++ b/test/MC/MachO/lcomm-attributes.s
@@ -0,0 +1,136 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+ // Note, this test intentionally mismatches Darwin 'as', which loses the
+ // following global marker.
+ //
+ // FIXME: We should probably warn about our interpretation of this.
+ .globl sym_lcomm_ext_A
+ .lcomm sym_lcomm_ext_A, 4
+ .lcomm sym_lcomm_ext_B, 4
+ .globl sym_lcomm_ext_B
+
+ .globl sym_zfill_ext_A
+ .zerofill __DATA, __bss, sym_zfill_ext_A, 4
+ .zerofill __DATA, __bss, sym_zfill_ext_B, 4
+ .globl sym_zfill_ext_B
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 296)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 192)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 16)
+// CHECK: ('file_offset', 324)
+// CHECK: ('file_size', 0)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 2)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 324)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: # Section 1
+// CHECK: (('section_name', '__bss\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 16)
+// CHECK: ('offset', 0)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x1)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 324)
+// CHECK: ('nsyms', 4)
+// CHECK: ('stroff', 372)
+// CHECK: ('strsize', 68)
+// CHECK: ('_string_data', '\x00sym_lcomm_ext_A\x00sym_lcomm_ext_B\x00sym_zfill_ext_A\x00sym_zfill_ext_B\x00\x00\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_lcomm_ext_A')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 17)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 4)
+// CHECK: ('_string', 'sym_lcomm_ext_B')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 33)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 8)
+// CHECK: ('_string', 'sym_zfill_ext_A')
+// CHECK: ),
+// CHECK: # Symbol 3
+// CHECK: (('n_strx', 49)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 12)
+// CHECK: ('_string', 'sym_zfill_ext_B')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 0)
+// CHECK: ('iextdefsym', 0)
+// CHECK: ('nextdefsym', 4)
+// CHECK: ('iundefsym', 4)
+// CHECK: ('nundefsym', 0)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/reloc.s b/test/MC/MachO/reloc.s
new file mode 100644
index 0000000..e86ed8c
--- /dev/null
+++ b/test/MC/MachO/reloc.s
@@ -0,0 +1,227 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s
+
+ .data
+ .long undef
+ .long (undef + 4)
+
+ .globl local_a_ext
+local_a_ext:
+ .long local_a_ext
+
+local_a:
+ .long 0
+local_a_elt:
+ .long 0
+local_b:
+ .long local_b - local_c + 245
+ .long 0
+local_c:
+ .long 0
+
+
+ .long local_a_elt + 1
+ .long local_a_elt + 10
+ .short local_a_elt + 20
+ .byte local_a_elt + 89
+
+ .const
+
+ .long
+bar:
+ .long local_a_elt - bar + 33
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 364)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 260)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 47)
+// CHECK: ('file_offset', 392)
+// CHECK: ('file_size', 47)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 3)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 392)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: ('_section_data', '')
+// CHECK: # Section 1
+// CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 43)
+// CHECK: ('offset', 392)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 440)
+// CHECK: ('num_reloc', 9)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: # Relocation 0
+// CHECK: (('word-0', 0x8000002a),
+// CHECK: ('word-1', 0x10)),
+// CHECK: # Relocation 1
+// CHECK: (('word-0', 0x90000028),
+// CHECK: ('word-1', 0x10)),
+// CHECK: # Relocation 2
+// CHECK: (('word-0', 0xa0000024),
+// CHECK: ('word-1', 0x10)),
+// CHECK: # Relocation 3
+// CHECK: (('word-0', 0xa0000020),
+// CHECK: ('word-1', 0x10)),
+// CHECK: # Relocation 4
+// CHECK: (('word-0', 0xa4000014),
+// CHECK: ('word-1', 0x14)),
+// CHECK: # Relocation 5
+// CHECK: (('word-0', 0xa1000000),
+// CHECK: ('word-1', 0x1c)),
+// CHECK: # Relocation 6
+// CHECK: (('word-0', 0x8),
+// CHECK: ('word-1', 0x4000002)),
+// CHECK: # Relocation 7
+// CHECK: (('word-0', 0x4),
+// CHECK: ('word-1', 0xc000006)),
+// CHECK: # Relocation 8
+// CHECK: (('word-0', 0x0),
+// CHECK: ('word-1', 0xc000006)),
+// CHECK: ])
+// CHECK: ('_section_data', '\x00\x00\x00\x00\x04\x00\x00\x00\x08\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xed\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x11\x00\x00\x00\x1a\x00\x00\x00$\x00i')
+// CHECK: # Section 2
+// CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 43)
+// CHECK: ('size', 4)
+// CHECK: ('offset', 435)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 512)
+// CHECK: ('num_reloc', 2)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: # Relocation 0
+// CHECK: (('word-0', 0xa4000000),
+// CHECK: ('word-1', 0x10)),
+// CHECK: # Relocation 1
+// CHECK: (('word-0', 0xa1000000),
+// CHECK: ('word-1', 0x2b)),
+// CHECK: ])
+// CHECK: ('_section_data', '\x06\x00\x00\x00')
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 528)
+// CHECK: ('nsyms', 7)
+// CHECK: ('stroff', 612)
+// CHECK: ('strsize', 60)
+// CHECK: ('_string_data', '\x00undef\x00local_a_ext\x00local_a\x00local_a_elt\x00local_b\x00local_c\x00bar\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 19)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 12)
+// CHECK: ('_string', 'local_a')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 27)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 16)
+// CHECK: ('_string', 'local_a_elt')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 39)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 20)
+// CHECK: ('_string', 'local_b')
+// CHECK: ),
+// CHECK: # Symbol 3
+// CHECK: (('n_strx', 47)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 28)
+// CHECK: ('_string', 'local_c')
+// CHECK: ),
+// CHECK: # Symbol 4
+// CHECK: (('n_strx', 55)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 3)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 43)
+// CHECK: ('_string', 'bar')
+// CHECK: ),
+// CHECK: # Symbol 5
+// CHECK: (('n_strx', 7)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 8)
+// CHECK: ('_string', 'local_a_ext')
+// CHECK: ),
+// CHECK: # Symbol 6
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'undef')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 5)
+// CHECK: ('iextdefsym', 5)
+// CHECK: ('nextdefsym', 1)
+// CHECK: ('iundefsym', 6)
+// CHECK: ('nundefsym', 1)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/section-align-1.s b/test/MC/MachO/section-align-1.s
new file mode 100644
index 0000000..6a5e247
--- /dev/null
+++ b/test/MC/MachO/section-align-1.s
@@ -0,0 +1,87 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+name:
+ .byte 0
+
+ // Check that symbol table is aligned to 4 bytes.
+
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 228)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 124)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 1)
+// CHECK: ('file_offset', 256)
+// CHECK: ('file_size', 1)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 1)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 1)
+// CHECK: ('offset', 256)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 260)
+// CHECK: ('nsyms', 1)
+// CHECK: ('stroff', 272)
+// CHECK: ('strsize', 8)
+// CHECK: ('_string_data', '\x00name\x00\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'name')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 1)
+// CHECK: ('iextdefsym', 1)
+// CHECK: ('nextdefsym', 0)
+// CHECK: ('iundefsym', 1)
+// CHECK: ('nundefsym', 0)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/section-align-2.s b/test/MC/MachO/section-align-2.s
new file mode 100644
index 0000000..e070473
--- /dev/null
+++ b/test/MC/MachO/section-align-2.s
@@ -0,0 +1,137 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+ .byte 0
+
+ // There should be 3 padding bytes here.
+
+ .data
+ .align 2
+foo:
+ .org 8
+bar:
+ .byte 0
+
+ .const
+baz:
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 364)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 260)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 13)
+// CHECK: ('file_offset', 392)
+// CHECK: ('file_size', 13)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 3)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 1)
+// CHECK: ('offset', 392)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 1
+// CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 4)
+// CHECK: ('size', 9)
+// CHECK: ('offset', 396)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 2
+// CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 13)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 405)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 408)
+// CHECK: ('nsyms', 3)
+// CHECK: ('stroff', 444)
+// CHECK: ('strsize', 16)
+// CHECK: ('_string_data', '\x00foo\x00bar\x00baz\x00\x00\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 4)
+// CHECK: ('_string', 'foo')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 5)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 12)
+// CHECK: ('_string', 'bar')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 9)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 3)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 13)
+// CHECK: ('_string', 'baz')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 3)
+// CHECK: ('iextdefsym', 3)
+// CHECK: ('nextdefsym', 0)
+// CHECK: ('iundefsym', 3)
+// CHECK: ('nundefsym', 0)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/section-flags.s b/test/MC/MachO/section-flags.s
new file mode 100644
index 0000000..8ac1bbf
--- /dev/null
+++ b/test/MC/MachO/section-flags.s
@@ -0,0 +1,14 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+//
+// CHECK: # Section 0
+// CHECK: 'section_name', '__text
+// CHECK: 'flags', 0x80000000
+// CHECK: # Section 1
+// CHECK: 'section_name', '__data
+// CHECK: 'flags', 0x400
+
+ .text
+
+ .data
+f0:
+ movl $0, %eax
diff --git a/test/MC/MachO/sections.s b/test/MC/MachO/sections.s
new file mode 100644
index 0000000..a7bcd21
--- /dev/null
+++ b/test/MC/MachO/sections.s
@@ -0,0 +1,540 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+ .text
+ .section __TEXT,__text,regular,pure_instructions
+
+ .const
+ .static_const
+ .cstring
+ .literal4
+ .literal8
+ .literal16
+ .constructor
+ .destructor
+ .symbol_stub
+ .picsymbol_stub
+ .data
+ .static_data
+ .non_lazy_symbol_pointer
+ .lazy_symbol_pointer
+ .dyld
+ .mod_init_func
+ .mod_term_func
+ .const_data
+ .objc_class
+ .objc_meta_class
+ .objc_cat_cls_meth
+ .objc_cat_inst_meth
+ .objc_protocol
+ .objc_string_object
+ .objc_cls_meth
+ .objc_inst_meth
+ .objc_cls_refs
+ .objc_message_refs
+ .objc_symbols
+ .objc_category
+ .objc_class_vars
+ .objc_instance_vars
+ .objc_module_info
+
+// FIXME: These are aliases for __TEXT, __cstring which we don't properly unique
+// yet.
+// .objc_class_names
+// .objc_meth_var_types
+// .objc_meth_var_names
+
+ .objc_selector_strs
+ .section __TEXT,__picsymbolstub4,symbol_stubs,none,16
+
+ .subsections_via_symbols
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 2504)
+// CHECK: ('flag', 8192)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 2504)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 0)
+// CHECK: ('file_offset', 2532)
+// CHECK: ('file_size', 0)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 36)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 1
+// CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 2
+// CHECK: (('section_name', '__static_const\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 3
+// CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x2)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 4
+// CHECK: (('section_name', '__literal4\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x3)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 5
+// CHECK: (('section_name', '__literal8\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 3)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x4)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 6
+// CHECK: (('section_name', '__literal16\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 4)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0xe)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 7
+// CHECK: (('section_name', '__constructor\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 8
+// CHECK: (('section_name', '__destructor\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 9
+// CHECK: (('section_name', '__symbol_stub\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000008)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 16)
+// CHECK: ),
+// CHECK: # Section 10
+// CHECK: (('section_name', '__picsymbol_stub')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000008)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 26)
+// CHECK: ),
+// CHECK: # Section 11
+// CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 12
+// CHECK: (('section_name', '__static_data\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 13
+// CHECK: (('section_name', '__nl_symbol_ptr\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x6)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 14
+// CHECK: (('section_name', '__la_symbol_ptr\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x7)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 15
+// CHECK: (('section_name', '__dyld\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 16
+// CHECK: (('section_name', '__mod_init_func\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x9)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 17
+// CHECK: (('section_name', '__mod_term_func\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0xa)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 18
+// CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 19
+// CHECK: (('section_name', '__class\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 20
+// CHECK: (('section_name', '__meta_class\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 21
+// CHECK: (('section_name', '__cat_cls_meth\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 22
+// CHECK: (('section_name', '__cat_inst_meth\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 23
+// CHECK: (('section_name', '__protocol\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 24
+// CHECK: (('section_name', '__string_object\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 25
+// CHECK: (('section_name', '__cls_meth\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 26
+// CHECK: (('section_name', '__inst_meth\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 27
+// CHECK: (('section_name', '__cls_refs\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000005)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 28
+// CHECK: (('section_name', '__message_refs\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000005)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 29
+// CHECK: (('section_name', '__symbols\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 30
+// CHECK: (('section_name', '__category\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 31
+// CHECK: (('section_name', '__class_vars\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 32
+// CHECK: (('section_name', '__instance_vars\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 33
+// CHECK: (('section_name', '__module_info\x00\x00\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x10000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 34
+// CHECK: (('section_name', '__selector_strs\x00')
+// CHECK: ('segment_name', '__OBJC\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x2)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: # Section 35
+// CHECK: (('section_name', '__picsymbolstub4')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 2532)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x8)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 16)
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/symbol-flags.s b/test/MC/MachO/symbol-flags.s
new file mode 100644
index 0000000..e82b0a0
--- /dev/null
+++ b/test/MC/MachO/symbol-flags.s
@@ -0,0 +1,254 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+ .reference sym_ref_A
+ .reference sym_ref_def_A
+sym_ref_def_A:
+sym_ref_def_C:
+ .reference sym_ref_def_C
+
+ .weak_reference sym_weak_ref_A
+ .weak_reference sym_weak_ref_def_A
+sym_weak_ref_def_A:
+sym_weak_ref_def_B:
+ .weak_reference sym_weak_ref_def_B
+
+ .data
+ .globl sym_weak_def_A
+ .weak_definition sym_weak_def_A
+sym_weak_def_A:
+
+ .lazy_reference sym_lazy_ref_A
+ .lazy_reference sym_lazy_ref_B
+sym_lazy_ref_B:
+sym_lazy_ref_C:
+ .lazy_reference sym_lazy_ref_C
+
+ .private_extern sym_private_ext_A
+ .private_extern sym_private_ext_B
+sym_private_ext_B:
+sym_private_ext_C:
+ .private_extern sym_private_ext_C
+ .private_extern sym_private_ext_D
+ .globl sym_private_ext_D
+
+ .no_dead_strip sym_no_dead_strip_A
+
+ .reference sym_ref_A
+ .desc sym_ref_A, 1
+ .desc sym_ref_A, 0x1234
+
+ .desc sym_desc_flags,0x47
+sym_desc_flags:
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 296)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 192)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 0)
+// CHECK: ('file_offset', 324)
+// CHECK: ('file_size', 0)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 2)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 324)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 1
+// CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 324)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 324)
+// CHECK: ('nsyms', 16)
+// CHECK: ('stroff', 516)
+// CHECK: ('strsize', 260)
+// CHECK: ('_string_data', '\x00sym_ref_A\x00sym_weak_ref_A\x00sym_weak_def_A\x00sym_lazy_ref_A\x00sym_private_ext_A\x00sym_private_ext_B\x00sym_private_ext_C\x00sym_private_ext_D\x00sym_no_dead_strip_A\x00sym_ref_def_A\x00sym_ref_def_C\x00sym_weak_ref_def_A\x00sym_weak_ref_def_B\x00sym_lazy_ref_B\x00sym_lazy_ref_C\x00sym_desc_flags\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 148)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 32)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_ref_def_A')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 162)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 32)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_ref_def_C')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 176)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_weak_ref_def_A')
+// CHECK: ),
+// CHECK: # Symbol 3
+// CHECK: (('n_strx', 195)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_weak_ref_def_B')
+// CHECK: ),
+// CHECK: # Symbol 4
+// CHECK: (('n_strx', 214)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 32)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_lazy_ref_B')
+// CHECK: ),
+// CHECK: # Symbol 5
+// CHECK: (('n_strx', 229)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 32)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_lazy_ref_C')
+// CHECK: ),
+// CHECK: # Symbol 6
+// CHECK: (('n_strx', 244)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_desc_flags')
+// CHECK: ),
+// CHECK: # Symbol 7
+// CHECK: (('n_strx', 74)
+// CHECK: ('n_type', 0x1f)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_private_ext_B')
+// CHECK: ),
+// CHECK: # Symbol 8
+// CHECK: (('n_strx', 92)
+// CHECK: ('n_type', 0x1f)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_private_ext_C')
+// CHECK: ),
+// CHECK: # Symbol 9
+// CHECK: (('n_strx', 26)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 128)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_weak_def_A')
+// CHECK: ),
+// CHECK: # Symbol 10
+// CHECK: (('n_strx', 41)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 33)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_lazy_ref_A')
+// CHECK: ),
+// CHECK: # Symbol 11
+// CHECK: (('n_strx', 128)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 32)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_no_dead_strip_A')
+// CHECK: ),
+// CHECK: # Symbol 12
+// CHECK: (('n_strx', 56)
+// CHECK: ('n_type', 0x11)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_private_ext_A')
+// CHECK: ),
+// CHECK: # Symbol 13
+// CHECK: (('n_strx', 110)
+// CHECK: ('n_type', 0x11)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_private_ext_D')
+// CHECK: ),
+// CHECK: # Symbol 14
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 4660)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_ref_A')
+// CHECK: ),
+// CHECK: # Symbol 15
+// CHECK: (('n_strx', 11)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 64)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_weak_ref_A')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 7)
+// CHECK: ('iextdefsym', 7)
+// CHECK: ('nextdefsym', 3)
+// CHECK: ('iundefsym', 10)
+// CHECK: ('nundefsym', 6)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/symbol-indirect.s b/test/MC/MachO/symbol-indirect.s
new file mode 100644
index 0000000..461291a
--- /dev/null
+++ b/test/MC/MachO/symbol-indirect.s
@@ -0,0 +1,268 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+// FIXME: We are missing a lot of diagnostics on this kind of stuff which the
+// assembler has.
+
+ .lazy_symbol_pointer
+ .indirect_symbol sym_lsp_B
+ .long 0
+
+ .globl sym_lsp_A
+ .indirect_symbol sym_lsp_A
+ .long 0
+
+sym_lsp_C:
+ .indirect_symbol sym_lsp_C
+ .long 0
+
+// FIXME: Enable this test once missing llvm-mc support is in place.
+.if 0
+ .indirect_symbol sym_lsp_D
+ .long sym_lsp_D
+.endif
+
+ .indirect_symbol sym_lsp_E
+ .long 0xFA
+
+// FIXME: Enable this test once missing llvm-mc support is in place.
+.if 0
+sym_lsp_F = 10
+ .indirect_symbol sym_lsp_F
+ .long 0
+.endif
+
+ .globl sym_lsp_G
+sym_lsp_G:
+ .indirect_symbol sym_lsp_G
+ .long 0
+
+ .non_lazy_symbol_pointer
+ .indirect_symbol sym_nlp_B
+ .long 0
+
+ .globl sym_nlp_A
+ .indirect_symbol sym_nlp_A
+ .long 0
+
+sym_nlp_C:
+ .indirect_symbol sym_nlp_C
+ .long 0
+
+// FIXME: Enable this test once missing llvm-mc support is in place.
+.if 0
+ .indirect_symbol sym_nlp_D
+ .long sym_nlp_D
+.endif
+
+ .indirect_symbol sym_nlp_E
+ .long 0xAF
+
+// FIXME: Enable this test once missing llvm-mc support is in place.
+.if 0
+sym_nlp_F = 10
+ .indirect_symbol sym_nlp_F
+ .long 0
+.endif
+
+ .globl sym_nlp_G
+sym_nlp_G:
+ .indirect_symbol sym_nlp_G
+ .long 0
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 364)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 260)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 40)
+// CHECK: ('file_offset', 392)
+// CHECK: ('file_size', 40)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 3)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 392)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 1
+// CHECK: (('section_name', '__la_symbol_ptr\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 20)
+// CHECK: ('offset', 392)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x7)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 2
+// CHECK: (('section_name', '__nl_symbol_ptr\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 20)
+// CHECK: ('size', 20)
+// CHECK: ('offset', 412)
+// CHECK: ('alignment', 2)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x6)
+ // FIXME: Enable this when fixed!
+// CHECX: ('reserved1', 5)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 472)
+// CHECK: ('nsyms', 10)
+// CHECK: ('stroff', 592)
+// CHECK: ('strsize', 104)
+// CHECK: ('_string_data', '\x00sym_lsp_A\x00sym_lsp_G\x00sym_nlp_A\x00sym_nlp_G\x00sym_nlp_B\x00sym_nlp_E\x00sym_lsp_B\x00sym_lsp_E\x00sym_lsp_C\x00sym_nlp_C\x00\x00\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 81)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 8)
+// CHECK: ('_string', 'sym_lsp_C')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 91)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 3)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 28)
+// CHECK: ('_string', 'sym_nlp_C')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 11)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 16)
+// CHECK: ('_string', 'sym_lsp_G')
+// CHECK: ),
+// CHECK: # Symbol 3
+// CHECK: (('n_strx', 31)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 3)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 36)
+// CHECK: ('_string', 'sym_nlp_G')
+// CHECK: ),
+// CHECK: # Symbol 4
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_lsp_A')
+// CHECK: ),
+// CHECK: # Symbol 5
+// CHECK: (('n_strx', 61)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 1)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_lsp_B')
+// CHECK: ),
+// CHECK: # Symbol 6
+// CHECK: (('n_strx', 71)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 1)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_lsp_E')
+// CHECK: ),
+// CHECK: # Symbol 7
+// CHECK: (('n_strx', 21)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_nlp_A')
+// CHECK: ),
+// CHECK: # Symbol 8
+// CHECK: (('n_strx', 41)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_nlp_B')
+// CHECK: ),
+// CHECK: # Symbol 9
+// CHECK: (('n_strx', 51)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_nlp_E')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 2)
+// CHECK: ('iextdefsym', 2)
+// CHECK: ('nextdefsym', 2)
+// CHECK: ('iundefsym', 4)
+// CHECK: ('nundefsym', 6)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 432)
+// CHECK: ('nindirectsyms', 10)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: # Indirect Symbol 0
+// CHECK: (('symbol_index', 0x5),),
+// CHECK: # Indirect Symbol 1
+// CHECK: (('symbol_index', 0x4),),
+// CHECK: # Indirect Symbol 2
+// CHECK: (('symbol_index', 0x0),),
+// CHECK: # Indirect Symbol 3
+// CHECK: (('symbol_index', 0x6),),
+// CHECK: # Indirect Symbol 4
+// CHECK: (('symbol_index', 0x2),),
+// CHECK: # Indirect Symbol 5
+// CHECK: (('symbol_index', 0x8),),
+// CHECK: # Indirect Symbol 6
+// CHECK: (('symbol_index', 0x7),),
+// CHECK: # Indirect Symbol 7
+// CHECK: (('symbol_index', 0x80000000),),
+// CHECK: # Indirect Symbol 8
+// CHECK: (('symbol_index', 0x9),),
+// CHECK: # Indirect Symbol 9
+// CHECK: (('symbol_index', 0x3),),
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/symbols-1.s b/test/MC/MachO/symbols-1.s
new file mode 100644
index 0000000..4c72fb3
--- /dev/null
+++ b/test/MC/MachO/symbols-1.s
@@ -0,0 +1,161 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+sym_local_B:
+.globl sym_globl_def_B
+.globl sym_globl_undef_B
+sym_local_A:
+.globl sym_globl_def_A
+.globl sym_globl_undef_A
+sym_local_C:
+.globl sym_globl_def_C
+.globl sym_globl_undef_C
+
+sym_globl_def_A:
+sym_globl_def_B:
+sym_globl_def_C:
+Lsym_asm_temp:
+ .long 0
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 228)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 124)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 4)
+// CHECK: ('file_offset', 256)
+// CHECK: ('file_size', 4)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 1)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 4)
+// CHECK: ('offset', 256)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 260)
+// CHECK: ('nsyms', 9)
+// CHECK: ('stroff', 368)
+// CHECK: ('strsize', 140)
+// CHECK: ('_string_data', '\x00sym_globl_def_B\x00sym_globl_undef_B\x00sym_globl_def_A\x00sym_globl_undef_A\x00sym_globl_def_C\x00sym_globl_undef_C\x00sym_local_B\x00sym_local_A\x00sym_local_C\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 103)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_local_B')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 115)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_local_A')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 127)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_local_C')
+// CHECK: ),
+// CHECK: # Symbol 3
+// CHECK: (('n_strx', 35)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_globl_def_A')
+// CHECK: ),
+// CHECK: # Symbol 4
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_globl_def_B')
+// CHECK: ),
+// CHECK: # Symbol 5
+// CHECK: (('n_strx', 69)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_globl_def_C')
+// CHECK: ),
+// CHECK: # Symbol 6
+// CHECK: (('n_strx', 51)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_globl_undef_A')
+// CHECK: ),
+// CHECK: # Symbol 7
+// CHECK: (('n_strx', 17)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_globl_undef_B')
+// CHECK: ),
+// CHECK: # Symbol 8
+// CHECK: (('n_strx', 85)
+// CHECK: ('n_type', 0x1)
+// CHECK: ('n_sect', 0)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_globl_undef_C')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 3)
+// CHECK: ('iextdefsym', 3)
+// CHECK: ('nextdefsym', 3)
+// CHECK: ('iundefsym', 6)
+// CHECK: ('nundefsym', 3)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/values.s b/test/MC/MachO/values.s
new file mode 100644
index 0000000..2a472ab
--- /dev/null
+++ b/test/MC/MachO/values.s
@@ -0,0 +1,135 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s
+
+ .long 0
+text_def_int:
+ .long 0
+
+ .globl text_def_ext
+text_def_ext:
+ .long 0
+
+ .data
+ .long 0
+data_def_int:
+ .long 0
+
+ .globl data_def_ext
+data_def_ext:
+ .long 0
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 296)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 192)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 24)
+// CHECK: ('file_offset', 324)
+// CHECK: ('file_size', 24)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 2)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 12)
+// CHECK: ('offset', 324)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: # Section 1
+// CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 12)
+// CHECK: ('size', 12)
+// CHECK: ('offset', 336)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 348)
+// CHECK: ('nsyms', 4)
+// CHECK: ('stroff', 396)
+// CHECK: ('strsize', 56)
+// CHECK: ('_string_data', '\x00text_def_ext\x00data_def_ext\x00text_def_int\x00data_def_int\x00\x00\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 27)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 4)
+// CHECK: ('_string', 'text_def_int')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 40)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 16)
+// CHECK: ('_string', 'data_def_int')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 14)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 20)
+// CHECK: ('_string', 'data_def_ext')
+// CHECK: ),
+// CHECK: # Symbol 3
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 1)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 8)
+// CHECK: ('_string', 'text_def_ext')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 2)
+// CHECK: ('iextdefsym', 2)
+// CHECK: ('nextdefsym', 2)
+// CHECK: ('iundefsym', 4)
+// CHECK: ('nundefsym', 0)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/zerofill-1.s b/test/MC/MachO/zerofill-1.s
new file mode 100644
index 0000000..a175d4c
--- /dev/null
+++ b/test/MC/MachO/zerofill-1.s
@@ -0,0 +1,121 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s
+
+ .text
+ .byte 0 // Align to 2**3 bytes, not 2**1
+
+ .zerofill __DATA, __common, zfill, 2, 1
+
+ .data
+ .align 3
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 364)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 260)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 10)
+// CHECK: ('file_offset', 392)
+// CHECK: ('file_size', 8)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 3)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 1)
+// CHECK: ('offset', 392)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: # Section 1
+// CHECK: (('section_name', '__common\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 8)
+// CHECK: ('size', 2)
+// CHECK: ('offset', 0)
+// CHECK: ('alignment', 1)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x1)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: # Section 2
+// CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 8)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 400)
+// CHECK: ('alignment', 3)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x0)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 400)
+// CHECK: ('nsyms', 1)
+// CHECK: ('stroff', 412)
+// CHECK: ('strsize', 8)
+// CHECK: ('_string_data', '\x00zfill\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 8)
+// CHECK: ('_string', 'zfill')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 1)
+// CHECK: ('iextdefsym', 1)
+// CHECK: ('nextdefsym', 0)
+// CHECK: ('iundefsym', 1)
+// CHECK: ('nundefsym', 0)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/zerofill-2.s b/test/MC/MachO/zerofill-2.s
new file mode 100644
index 0000000..e76de84
--- /dev/null
+++ b/test/MC/MachO/zerofill-2.s
@@ -0,0 +1,103 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s
+
+ .byte 0
+
+ // This file has size 2, the tail padding doesn't count.
+ .zerofill __DATA, __bss, sym_a, 1
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 296)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 192)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 2)
+// CHECK: ('file_offset', 324)
+// CHECK: ('file_size', 1)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 2)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 1)
+// CHECK: ('offset', 324)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: # Section 1
+// CHECK: (('section_name', '__bss\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 1)
+// CHECK: ('size', 1)
+// CHECK: ('offset', 0)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x1)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 328)
+// CHECK: ('nsyms', 1)
+// CHECK: ('stroff', 340)
+// CHECK: ('strsize', 8)
+// CHECK: ('_string_data', '\x00sym_a\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 1)
+// CHECK: ('_string', 'sym_a')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 1)
+// CHECK: ('iextdefsym', 1)
+// CHECK: ('nextdefsym', 0)
+// CHECK: ('iundefsym', 1)
+// CHECK: ('nundefsym', 0)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/MC/MachO/zerofill-3.s b/test/MC/MachO/zerofill-3.s
new file mode 100644
index 0000000..e7f4c7b
--- /dev/null
+++ b/test/MC/MachO/zerofill-3.s
@@ -0,0 +1,141 @@
+// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s
+
+ // FIXME: We don't get the order right currently, the assembler first
+ // orders the symbols, then assigns addresses. :(
+.if 0
+ .lcomm sym_lcomm_B, 4
+ .lcomm sym_lcomm_C, 4, 4
+ .lcomm sym_lcomm_A, 4, 3
+ .lcomm sym_lcomm_D, 4
+ .globl sym_lcomm_D
+ .globl sym_lcomm_C
+.else
+ .lcomm sym_lcomm_C, 4, 4
+ .lcomm sym_lcomm_D, 4
+ .globl sym_lcomm_D
+ .globl sym_lcomm_C
+
+ .lcomm sym_lcomm_A, 4, 3
+ .lcomm sym_lcomm_B, 4
+.endif
+
+// CHECK: ('cputype', 7)
+// CHECK: ('cpusubtype', 3)
+// CHECK: ('filetype', 1)
+// CHECK: ('num_load_commands', 1)
+// CHECK: ('load_commands_size', 296)
+// CHECK: ('flag', 0)
+// CHECK: ('load_commands', [
+// CHECK: # Load Command 0
+// CHECK: (('command', 1)
+// CHECK: ('size', 192)
+// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('vm_addr', 0)
+// CHECK: ('vm_size', 16)
+// CHECK: ('file_offset', 324)
+// CHECK: ('file_size', 0)
+// CHECK: ('maxprot', 7)
+// CHECK: ('initprot', 7)
+// CHECK: ('num_sections', 2)
+// CHECK: ('flags', 0)
+// CHECK: ('sections', [
+// CHECK: # Section 0
+// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 0)
+// CHECK: ('offset', 324)
+// CHECK: ('alignment', 0)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x80000000)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: # Section 1
+// CHECK: (('section_name', '__bss\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
+// CHECK: ('address', 0)
+// CHECK: ('size', 16)
+// CHECK: ('offset', 0)
+// CHECK: ('alignment', 4)
+// CHECK: ('reloc_offset', 0)
+// CHECK: ('num_reloc', 0)
+// CHECK: ('flags', 0x1)
+// CHECK: ('reserved1', 0)
+// CHECK: ('reserved2', 0)
+// CHECK: ),
+// CHECK: ('_relocations', [
+// CHECK: ])
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 1
+// CHECK: (('command', 2)
+// CHECK: ('size', 24)
+// CHECK: ('symoff', 324)
+// CHECK: ('nsyms', 4)
+// CHECK: ('stroff', 372)
+// CHECK: ('strsize', 52)
+// CHECK: ('_string_data', '\x00sym_lcomm_C\x00sym_lcomm_D\x00sym_lcomm_A\x00sym_lcomm_B\x00\x00\x00\x00')
+// CHECK: ('_symbols', [
+// CHECK: # Symbol 0
+// CHECK: (('n_strx', 25)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 8)
+// CHECK: ('_string', 'sym_lcomm_A')
+// CHECK: ),
+// CHECK: # Symbol 1
+// CHECK: (('n_strx', 37)
+// CHECK: ('n_type', 0xe)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 12)
+// CHECK: ('_string', 'sym_lcomm_B')
+// CHECK: ),
+// CHECK: # Symbol 2
+// CHECK: (('n_strx', 1)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 0)
+// CHECK: ('_string', 'sym_lcomm_C')
+// CHECK: ),
+// CHECK: # Symbol 3
+// CHECK: (('n_strx', 13)
+// CHECK: ('n_type', 0xf)
+// CHECK: ('n_sect', 2)
+// CHECK: ('n_desc', 0)
+// CHECK: ('n_value', 4)
+// CHECK: ('_string', 'sym_lcomm_D')
+// CHECK: ),
+// CHECK: ])
+// CHECK: ),
+// CHECK: # Load Command 2
+// CHECK: (('command', 11)
+// CHECK: ('size', 80)
+// CHECK: ('ilocalsym', 0)
+// CHECK: ('nlocalsym', 2)
+// CHECK: ('iextdefsym', 2)
+// CHECK: ('nextdefsym', 2)
+// CHECK: ('iundefsym', 4)
+// CHECK: ('nundefsym', 0)
+// CHECK: ('tocoff', 0)
+// CHECK: ('ntoc', 0)
+// CHECK: ('modtaboff', 0)
+// CHECK: ('nmodtab', 0)
+// CHECK: ('extrefsymoff', 0)
+// CHECK: ('nextrefsyms', 0)
+// CHECK: ('indirectsymoff', 0)
+// CHECK: ('nindirectsyms', 0)
+// CHECK: ('extreloff', 0)
+// CHECK: ('nextrel', 0)
+// CHECK: ('locreloff', 0)
+// CHECK: ('nlocrel', 0)
+// CHECK: ('_indirect_symbols', [
+// CHECK: ])
+// CHECK: ),
+// CHECK: ])
diff --git a/test/Makefile b/test/Makefile
new file mode 100644
index 0000000..e7776f8
--- /dev/null
+++ b/test/Makefile
@@ -0,0 +1,203 @@
+#===- test/Makefile ----------------------------------------*- Makefile -*--===#
+#
+# The LLVM Compiler Infrastructure
+#
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
+#===------------------------------------------------------------------------===#
+
+LEVEL = ..
+DIRS =
+
+#
+# Make Dejagnu the default for testing
+#
+all:: check-local
+
+# Include other test rules
+include Makefile.tests
+
+#===------------------------------------------------------------------------===#
+# DejaGNU testing support
+#===------------------------------------------------------------------------===#
+
+ifneq ($(GREP_OPTIONS),)
+$(warning GREP_OPTIONS environment variable may interfere with test results)
+endif
+
+ifdef VERBOSE
+RUNTESTFLAGS := $(VERBOSE)
+LIT_ARGS := -v
+else
+LIT_ARGS := -s -v
+endif
+
+ifdef TESTSUITE
+LIT_TESTSUITE := $(TESTSUITE)
+CLEANED_TESTSUITE := $(patsubst %/,%,$(TESTSUITE))
+CLEANED_TESTSUITE := $(patsubst test/%,%,$(CLEANED_TESTSUITE))
+RUNTESTFLAGS += --tool $(CLEANED_TESTSUITE)
+else
+LIT_TESTSUITE := .
+endif
+
+ifdef VG
+VALGRIND := valgrind --tool=memcheck --quiet --trace-children=yes --error-exitcode=3 --leak-check=full $(VALGRIND_EXTRA_ARGS)
+endif
+
+# Check what to run for -all.
+LIT_ALL_TESTSUITES := $(LIT_TESTSUITE)
+
+extra-lit-site-cfgs::
+.PHONY: extra-lit-site-cfgs
+
+ifneq ($(strip $(filter check-local-all,$(MAKECMDGOALS))),)
+ifndef TESTSUITE
+ifeq ($(shell test -d $(PROJ_SRC_DIR)/../tools/clang && echo OK), OK)
+LIT_ALL_TESTSUITES += $(PROJ_OBJ_DIR)/../tools/clang/test
+
+# Force creation of Clang's lit.site.cfg.
+clang-lit-site-cfg: FORCE
+ $(MAKE) -C $(PROJ_OBJ_DIR)/../tools/clang/test lit.site.cfg
+extra-lit-site-cfgs:: clang-lit-site-cfg
+endif
+endif
+endif
+
+IGNORE_TESTS :=
+
+ifndef RUNLLVM2CPP
+IGNORE_TESTS += llvm2cpp.exp
+endif
+
+ifdef IGNORE_TESTS
+RUNTESTFLAGS += --ignore "$(strip $(IGNORE_TESTS))"
+endif
+
+# ulimits like these are redundantly enforced by the buildbots, so
+# just removing them here won't work.
+# Both AuroraUX & Solaris do not have the -m flag for ulimit
+ifeq ($(HOST_OS),SunOS)
+ULIMIT=ulimit -t 600 ; ulimit -d 512000 ; ulimit -v 512000 ;
+else # !SunOS
+ifeq ($(HOST_OS),AuroraUX)
+ULIMIT=ulimit -t 600 ; ulimit -d 512000 ; ulimit -v 512000 ;
+else # !AuroraUX
+ULIMIT=ulimit -t 600 ; ulimit -d 512000 ; ulimit -m 512000 ; ulimit -v 512000 ;
+endif # AuroraUX
+endif # SunOS
+
+ifneq ($(RUNTEST),)
+check-local:: site.exp
+ ( $(ULIMIT) \
+ PATH="$(LLVMToolDir):$(LLVM_SRC_ROOT)/test/Scripts:$(LLVMGCCDIR)/bin:$(PATH)" \
+ $(RUNTEST) $(RUNTESTFLAGS) )
+else
+check-local:: site.exp
+ @echo "*** dejagnu not found. Make sure 'runtest' is in your PATH, then reconfigure LLVM."
+endif
+
+check-local-lit:: lit.site.cfg Unit/lit.site.cfg
+ ( $(ULIMIT) \
+ $(LLVM_SRC_ROOT)/utils/lit/lit.py $(LIT_ARGS) $(LIT_TESTSUITE) )
+
+check-local-all:: lit.site.cfg Unit/lit.site.cfg extra-lit-site-cfgs
+ ( $(ULIMIT) \
+ $(LLVM_SRC_ROOT)/utils/lit/lit.py $(LIT_ARGS) $(LIT_ALL_TESTSUITES) )
+
+ifdef TESTONE
+CLEANED_TESTONE := $(patsubst %/,%,$(TESTONE))
+CLEANED_TESTONE := $(patsubst test/%,%,$(CLEANED_TESTONE))
+SUBDIR := $(shell dirname $(CLEANED_TESTONE))
+TESTPATH := $(LLVM_SRC_ROOT)/test/$(CLEANED_TESTONE)
+check-one: site.exp $(TCLSH)
+ $(Verb)( echo "source $(LLVM_OBJ_ROOT)/test/site.exp" ; \
+ echo "set subdir $(SUBDIR)" ; \
+ echo "proc pass { msg } { puts \"PASS: \$$msg\" } "; \
+ echo "proc fail { msg } { puts \"FAIL: \$$msg\" }" ; \
+ echo "proc xfail { msg } { puts \"XFAIL: \$$msg\" }" ; \
+ echo "proc xpass { msg } { puts \"XPASS: \$$msg\" }" ; \
+ echo "proc verbose args { }" ; \
+ echo "source $(LLVM_SRC_ROOT)/test/lib/llvm.exp" ; \
+ echo "RunLLVMTests $(TESTPATH)" ) | \
+ ( $(ULIMIT) \
+ PATH="$(LLVMToolDir):$(LLVM_SRC_ROOT)/test/Scripts:$(PATH)" \
+ $(TCLSH) )
+endif
+
+clean::
+ $(RM) -rf `find $(LLVM_OBJ_ROOT)/test -name Output -type d -print`
+
+# dsymutil is used on the Darwin to manipulate DWARF debugging information.
+ifeq ($(TARGET_OS),Darwin)
+DSYMUTIL=dsymutil
+else
+DSYMUTIL=true
+endif
+ifdef TargetCommonOpts
+BUGPOINT_TOPTS="-gcc-tool-args $(TargetCommonOpts)"
+else
+BUGPOINT_TOPTS=""
+endif
+
+ifneq ($(OCAMLOPT),)
+CC_FOR_OCAMLOPT := $(shell $(OCAMLOPT) -config | grep native_c_compiler | sed -e 's/native_c_compiler: //')
+CXX_FOR_OCAMLOPT := $(subst gcc,g++,$(CC_FOR_OCAMLOPT))
+endif
+
+FORCE:
+
+site.exp: FORCE
+ @echo 'Making a new site.exp file...'
+ @echo '## Autogenerated by LLVM configuration.' > site.tmp
+ @echo '# Do not edit!' >> site.tmp
+ @echo 'set target_triplet "$(TARGET_TRIPLE)"' >> site.tmp
+ @echo 'set TARGETS_TO_BUILD "$(TARGETS_TO_BUILD)"' >> site.tmp
+ @echo 'set llvmgcc_langs "$(LLVMGCC_LANGS)"' >> site.tmp
+ @echo 'set llvmgcc_version "$(LLVMGCC_VERSION)"' >> site.tmp
+ @echo 'set llvmtoolsdir "$(ToolDir)"' >>site.tmp
+ @echo 'set llvmlibsdir "$(LibDir)"' >>site.tmp
+ @echo 'set llvm_bindings "$(BINDINGS_TO_BUILD)"' >> site.tmp
+ @echo 'set srcroot "$(LLVM_SRC_ROOT)"' >>site.tmp
+ @echo 'set objroot "$(LLVM_OBJ_ROOT)"' >>site.tmp
+ @echo 'set srcdir "$(LLVM_SRC_ROOT)/test"' >>site.tmp
+ @echo 'set objdir "$(LLVM_OBJ_ROOT)/test"' >>site.tmp
+ @echo 'set gccpath "$(CC)"' >>site.tmp
+ @echo 'set gxxpath "$(CXX)"' >>site.tmp
+ @echo 'set compile_c "' $(CC) $(CPP.Flags) $(TargetCommonOpts) $(CompileCommonOpts) -c '"' >>site.tmp
+ @echo 'set compile_cxx "' $(CXX) $(CPP.Flags) $(CXX.Flags) $(TargetCommonOpts) $(CompileCommonOpts) -c '"' >> site.tmp
+ @echo 'set link "' $(CXX) $(CPP.Flags) $(CXX.Flags) $(TargetCommonOpts) $(CompileCommonOpts) $(LD.Flags) '"' >>site.tmp
+ @echo 'set llvmgcc "$(LLVMGCC) $(TargetCommonOpts) $(EXTRA_OPTIONS)"' >> site.tmp
+ @echo 'set llvmgxx "$(LLVMGCC) $(TargetCommonOpts) $(EXTRA_OPTIONS)"' >> site.tmp
+ @echo 'set llvmgccmajvers "$(LLVMGCC_MAJVERS)"' >> site.tmp
+ @echo 'set bugpoint_topts $(BUGPOINT_TOPTS)' >> site.tmp
+ @echo 'set shlibext "$(SHLIBEXT)"' >> site.tmp
+ @echo 'set ocamlopt "$(OCAMLOPT) -cc \"$(CXX_FOR_OCAMLOPT)\" -I $(LibDir)/ocaml"' >> site.tmp
+ @echo 'set valgrind "$(VALGRIND)"' >> site.tmp
+ @echo 'set grep "$(GREP)"' >>site.tmp
+ @echo 'set gas "$(GAS)"' >>site.tmp
+ @echo 'set llvmdsymutil "$(DSYMUTIL)"' >>site.tmp
+ @echo '## All variables above are generated by configure. Do Not Edit ## ' >>site.tmp
+ @test ! -f site.exp || \
+ sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp
+ @-rm -f site.bak
+ @test ! -f site.exp || mv site.exp site.bak
+ @mv site.tmp site.exp
+
+lit.site.cfg: site.exp
+ @echo "Making LLVM 'lit.site.cfg' file..."
+ @sed -e "s#@LLVM_SOURCE_DIR@#$(LLVM_SRC_ROOT)#g" \
+ -e "s#@LLVM_BINARY_DIR@#$(LLVM_OBJ_ROOT)#g" \
+ -e "s#@LLVM_TOOLS_DIR@#$(ToolDir)#g" \
+ -e "s#@LLVMGCCDIR@#$(LLVMGCCDIR)#g" \
+ $(PROJ_SRC_DIR)/lit.site.cfg.in > $@
+
+Unit/lit.site.cfg: $(PROJ_OBJ_DIR)/Unit/.dir FORCE
+ @echo "Making LLVM unittest 'lit.site.cfg' file..."
+ @sed -e "s#@LLVM_SOURCE_DIR@#$(LLVM_SRC_ROOT)#g" \
+ -e "s#@LLVM_BINARY_DIR@#$(LLVM_OBJ_ROOT)#g" \
+ -e "s#@LLVM_TOOLS_DIR@#$(ToolDir)#g" \
+ -e "s#@LLVMGCCDIR@#$(LLVMGCCDIR)#g" \
+ -e "s#@LLVM_BUILD_MODE@#$(BuildMode)#g" \
+ $(PROJ_SRC_DIR)/Unit/lit.site.cfg.in > $@
diff --git a/test/Makefile.tests b/test/Makefile.tests
new file mode 100644
index 0000000..90e9f2c
--- /dev/null
+++ b/test/Makefile.tests
@@ -0,0 +1,80 @@
+##----------------------------------------------------------*- Makefile -*-===##
+##
+## Common rules for generating, linking, and compiling via LLVM. This is
+## used to implement a robust testing framework for LLVM
+##
+##-------------------------------------------------------------------------===##
+
+# If the user specified a TEST= option on the command line, we do not want to do
+# the default testing type. Instead, we change the default target to be the
+# test:: target.
+#
+ifdef TEST
+test::
+endif
+
+# We do not want to make .d files for tests!
+DISABLE_AUTO_DEPENDENCIES=1
+
+include ${LEVEL}/Makefile.common
+
+# Specify ENABLE_STATS on the command line to enable -stats and -time-passes
+# output from gccas and gccld.
+ifdef ENABLE_STATS
+STATS = -stats -time-passes
+endif
+
+.PHONY: clean default
+
+# These files, which might be intermediate results, should not be deleted by
+# make
+.PRECIOUS: Output/%.bc Output/%.ll
+.PRECIOUS: Output/%.tbc Output/%.tll
+.PRECIOUS: Output/.dir
+.PRECIOUS: Output/%.llvm.bc
+.PRECIOUS: Output/%.llvm
+
+LCCFLAGS += -O2 -Wall
+LCXXFLAGS += -O2 -Wall
+LLCFLAGS =
+TESTRUNR = @echo Running test: $<; \
+ PATH="$(LLVMTOOLCURRENT):$(LLVM_SRC_ROOT)/test/Scripts:$(PATH)" \
+ $(LLVM_SRC_ROOT)/test/TestRunner.sh
+
+LLCLIBS := $(LLCLIBS) -lm
+
+clean::
+ $(RM) -f a.out core
+ $(RM) -rf Output/
+
+# Compile from X.c to Output/X.ll
+Output/%.ll: %.c $(LCC1) Output/.dir $(INCLUDES)
+ -$(LLVMGCCWITHPATH) $(CPPFLAGS) $(LCCFLAGS) -S $< -o $@
+
+# Compile from X.cpp to Output/X.ll
+Output/%.ll: %.cpp $(LCC1XX) Output/.dir $(INCLUDES)
+ -$(LLVMGXXWITHPATH) $(CPPFLAGS) $(LCXXFLAGS) -S $< -o $@
+
+# Compile from X.cc to Output/X.ll
+Output/%.ll: %.cc $(LCC1XX) Output/.dir $(INCLUDES)
+ -$(LLVMGXXWITHPATH) $(CPPFLAGS) $(LCXXFLAGS) -S $< -o $@
+
+# LLVM Assemble from Output/X.ll to Output/X.bc. Output/X.ll must have come
+# from GCC output, so use GCCAS.
+#
+Output/%.bc: Output/%.ll $(LGCCAS)
+ -$(LGCCAS) $(STATS) $< -o $@
+
+# LLVM Assemble from X.ll to Output/X.bc. Because we are coming directly from
+# LLVM source, use the non-transforming assembler.
+#
+Output/%.bc: %.ll $(LLVMAS) Output/.dir
+ -$(LLVMAS) $< -o $@
+
+## Cancel built-in implicit rules that override above rules
+%: %.s
+
+%: %.c
+
+%.o: %.c
+
diff --git a/test/Other/2002-01-31-CallGraph.ll b/test/Other/2002-01-31-CallGraph.ll
new file mode 100644
index 0000000..0e4c877
--- /dev/null
+++ b/test/Other/2002-01-31-CallGraph.ll
@@ -0,0 +1,13 @@
+; Call graph construction crash: Not handling indirect calls right
+;
+; RUN: opt < %s -analyze -print-callgraph >& /dev/null
+;
+
+ %FunTy = type i32 (i32)
+
+define void @invoke(%FunTy* %x) {
+ %foo = call i32 %x( i32 123 ) ; <i32> [#uses=0]
+ ret void
+}
+
+
diff --git a/test/Other/2002-02-24-InlineBrokePHINodes.ll b/test/Other/2002-02-24-InlineBrokePHINodes.ll
new file mode 100644
index 0000000..db26942
--- /dev/null
+++ b/test/Other/2002-02-24-InlineBrokePHINodes.ll
@@ -0,0 +1,23 @@
+; Inlining used to break PHI nodes. This tests that they are correctly updated
+; when a node is split around the call instruction. The verifier caught the error.
+;
+; RUN: opt < %s -inline
+;
+
+define i64 @test(i64 %X) {
+ ret i64 %X
+}
+
+define i64 @fib(i64 %n) {
+; <label>:0
+ %T = icmp ult i64 %n, 2 ; <i1> [#uses=1]
+ br i1 %T, label %BaseCase, label %RecurseCase
+
+RecurseCase: ; preds = %0
+ %result = call i64 @test( i64 %n ) ; <i64> [#uses=0]
+ br label %BaseCase
+
+BaseCase: ; preds = %RecurseCase, %0
+ %X = phi i64 [ 1, %0 ], [ 2, %RecurseCase ] ; <i64> [#uses=1]
+ ret i64 %X
+}
diff --git a/test/Other/2002-03-11-ConstPropCrash.ll b/test/Other/2002-03-11-ConstPropCrash.ll
new file mode 100644
index 0000000..a6d4f5b
--- /dev/null
+++ b/test/Other/2002-03-11-ConstPropCrash.ll
@@ -0,0 +1,24 @@
+; When constant propogating terminator instructions, the basic block iterator
+; was not updated to refer to the final position of the new terminator. This
+; can be bad, f.e. because constproping a terminator can lead to the
+; destruction of PHI nodes, which invalidates the iterator!
+;
+; Fixed by adding new arguments to ConstantFoldTerminator
+;
+; RUN: opt < %s -constprop
+
+define void @build_tree(i32 %ml) {
+; <label>:0
+ br label %bb2
+
+bb2: ; preds = %bb2, %0
+ %reg137 = phi i32 [ %reg140, %bb2 ], [ 12, %0 ] ; <i32> [#uses=1]
+ %reg138 = phi i32 [ %reg139, %bb2 ], [ 0, %0 ] ; <i32> [#uses=1]
+ %reg139 = add i32 %reg138, 1 ; <i32> [#uses=1]
+ %reg140 = add i32 %reg137, -1 ; <i32> [#uses=1]
+ br i1 false, label %bb2, label %bb3
+
+bb3: ; preds = %bb2
+ ret void
+}
+
diff --git a/test/Other/2003-02-19-LoopInfoNestingBug.ll b/test/Other/2003-02-19-LoopInfoNestingBug.ll
new file mode 100644
index 0000000..13f8351
--- /dev/null
+++ b/test/Other/2003-02-19-LoopInfoNestingBug.ll
@@ -0,0 +1,29 @@
+; LoopInfo is incorrectly calculating loop nesting! In this case it doesn't
+; figure out that loop "Inner" should be nested inside of leep "LoopHeader",
+; and instead nests it just inside loop "Top"
+;
+; RUN: opt < %s -analyze -loops | \
+; RUN: grep { Loop at depth 3 containing: %Inner<header><latch><exiting>}
+;
+define void @test() {
+ br label %Top
+
+Top: ; preds = %Out, %0
+ br label %LoopHeader
+
+Next: ; preds = %LoopHeader
+ br i1 false, label %Inner, label %Out
+
+Inner: ; preds = %Inner, %Next
+ br i1 false, label %Inner, label %LoopHeader
+
+LoopHeader: ; preds = %Inner, %Top
+ br label %Next
+
+Out: ; preds = %Next
+ br i1 false, label %Top, label %Done
+
+Done: ; preds = %Out
+ ret void
+}
+
diff --git a/test/Other/2004-08-16-PackedConstantInlineStore.ll b/test/Other/2004-08-16-PackedConstantInlineStore.ll
new file mode 100644
index 0000000..36ac4fd
--- /dev/null
+++ b/test/Other/2004-08-16-PackedConstantInlineStore.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llvm-dis
+@bar = external global <2 x i32> ; <<2 x i32>*> [#uses=1]
+
+define void @main() {
+ store <2 x i32> < i32 0, i32 1 >, <2 x i32>* @bar
+ ret void
+}
+
diff --git a/test/Other/2004-08-16-PackedGlobalConstant.ll b/test/Other/2004-08-16-PackedGlobalConstant.ll
new file mode 100644
index 0000000..9130ccb
--- /dev/null
+++ b/test/Other/2004-08-16-PackedGlobalConstant.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis
+
+@foo = global <2 x i32> < i32 0, i32 1 > ; <<2 x i32>*> [#uses=1]
+@bar = external global <2 x i32> ; <<2 x i32>*> [#uses=1]
+
+define void @main() {
+ %t0 = load <2 x i32>* @foo ; <<2 x i32>> [#uses=1]
+ store <2 x i32> %t0, <2 x i32>* @bar
+ ret void
+}
+
diff --git a/test/Other/2004-08-16-PackedSelect.ll b/test/Other/2004-08-16-PackedSelect.ll
new file mode 100644
index 0000000..c1d6214
--- /dev/null
+++ b/test/Other/2004-08-16-PackedSelect.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llvm-dis
+
+@foo = external global <4 x float> ; <<4 x float>*> [#uses=1]
+@bar = external global <4 x float> ; <<4 x float>*> [#uses=1]
+
+define void @main() {
+ %t0 = load <4 x float>* @foo ; <<4 x float>> [#uses=3]
+ %t1 = fadd <4 x float> %t0, %t0 ; <<4 x float>> [#uses=1]
+ %t2 = select i1 true, <4 x float> %t0, <4 x float> %t1 ; <<4 x float>> [#uses=1]
+ store <4 x float> %t2, <4 x float>* @bar
+ ret void
+}
+
diff --git a/test/Other/2004-08-16-PackedSimple.ll b/test/Other/2004-08-16-PackedSimple.ll
new file mode 100644
index 0000000..81cecd4
--- /dev/null
+++ b/test/Other/2004-08-16-PackedSimple.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llvm-dis
+
+@foo = external global <4 x float> ; <<4 x float>*> [#uses=1]
+@bar = external global <4 x float> ; <<4 x float>*> [#uses=1]
+
+define void @main() {
+ %t0 = load <4 x float>* @foo ; <<4 x float>> [#uses=3]
+ %t2 = fadd <4 x float> %t0, %t0 ; <<4 x float>> [#uses=1]
+ %t3 = select i1 false, <4 x float> %t0, <4 x float> %t2 ; <<4 x float>> [#uses=1]
+ store <4 x float> %t3, <4 x float>* @bar
+ ret void
+}
+
diff --git a/test/Other/2004-08-20-PackedControlFlow.ll b/test/Other/2004-08-20-PackedControlFlow.ll
new file mode 100644
index 0000000..3943570
--- /dev/null
+++ b/test/Other/2004-08-20-PackedControlFlow.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis | llvm-as > /dev/null
+
+ %v4f = type <4 x float>
+@foo = external global %v4f ; <%v4f*> [#uses=1]
+@bar = external global %v4f ; <%v4f*> [#uses=1]
+
+define void @main() {
+ br label %A
+
+C: ; preds = %B
+ store %v4f %t2, %v4f* @bar
+ ret void
+
+B: ; preds = %A
+ %t2 = fadd %v4f %t0, %t0 ; <%v4f> [#uses=1]
+ br label %C
+
+A: ; preds = %0
+ %t0 = load %v4f* @foo ; <%v4f> [#uses=2]
+ br label %B
+}
+
diff --git a/test/Other/2006-02-05-PassManager.ll b/test/Other/2006-02-05-PassManager.ll
new file mode 100644
index 0000000..0ab5411
--- /dev/null
+++ b/test/Other/2006-02-05-PassManager.ll
@@ -0,0 +1,5 @@
+; RUN: opt < %s -domtree -gvn -domtree -constmerge -disable-output
+
+define i32 @test1() {
+ unreachable
+}
diff --git a/test/Other/2007-04-24-eliminate-mostly-empty-blocks.ll b/test/Other/2007-04-24-eliminate-mostly-empty-blocks.ll
new file mode 100644
index 0000000..c436e07
--- /dev/null
+++ b/test/Other/2007-04-24-eliminate-mostly-empty-blocks.ll
@@ -0,0 +1,309 @@
+;RUN: opt < %s -codegenprepare -disable-output
+
+define void @foo() {
+entry:
+ br i1 false, label %cond_next31, label %cond_true
+
+cond_true: ; preds = %entry
+ br i1 false, label %cond_true19, label %cond_next31
+
+cond_true19: ; preds = %cond_true
+ br i1 false, label %bb510, label %cond_next31
+
+cond_next31: ; preds = %cond_true19, %cond_true, %entry
+ br i1 false, label %cond_true61, label %cond_next78
+
+cond_true61: ; preds = %cond_next31
+ br label %cond_next78
+
+cond_next78: ; preds = %cond_true61, %cond_next31
+ br i1 false, label %cond_true93, label %bb.preheader
+
+cond_true93: ; preds = %cond_next78
+ br label %bb.preheader
+
+bb.preheader: ; preds = %cond_true93, %cond_next78
+ %iftmp.11.0.ph.ph = phi i16 [ 0, %cond_true93 ], [ 0, %cond_next78 ] ; <i16> [#uses=1]
+ br label %bb
+
+bb: ; preds = %cond_next499, %bb.preheader
+ %n.1 = phi i16 [ %iftmp.11.0.ph.ph, %cond_next499 ], [ 0, %bb.preheader ] ; <i16> [#uses=0]
+ br i1 false, label %bb148.preheader, label %bb493
+
+bb148.preheader: ; preds = %bb
+ br label %bb148
+
+bb148: ; preds = %cond_next475, %bb148.preheader
+ br i1 false, label %cond_next175, label %bb184
+
+cond_next175: ; preds = %bb148
+ br i1 false, label %bb184, label %bb185
+
+bb184: ; preds = %cond_next175, %bb148
+ br label %bb185
+
+bb185: ; preds = %bb184, %cond_next175
+ br i1 false, label %bb420.preheader, label %cond_true198
+
+bb420.preheader: ; preds = %bb185
+ br label %bb420
+
+cond_true198: ; preds = %bb185
+ br i1 false, label %bb294, label %cond_next208
+
+cond_next208: ; preds = %cond_true198
+ br i1 false, label %cond_next249, label %cond_true214
+
+cond_true214: ; preds = %cond_next208
+ br i1 false, label %bb294, label %cond_next262
+
+cond_next249: ; preds = %cond_next208
+ br i1 false, label %bb294, label %cond_next262
+
+cond_next262: ; preds = %cond_next249, %cond_true214
+ br label %bb269
+
+bb269: ; preds = %cond_next285, %cond_next262
+ br i1 false, label %cond_next285, label %cond_true279
+
+cond_true279: ; preds = %bb269
+ br label %cond_next285
+
+cond_next285: ; preds = %cond_true279, %bb269
+ br i1 false, label %bb269, label %cond_next446.loopexit
+
+bb294: ; preds = %cond_next249, %cond_true214, %cond_true198
+ br i1 false, label %cond_next336, label %cond_true301
+
+cond_true301: ; preds = %bb294
+ br i1 false, label %cond_false398, label %cond_true344
+
+cond_next336: ; preds = %bb294
+ br i1 false, label %cond_false398, label %cond_true344
+
+cond_true344: ; preds = %cond_next336, %cond_true301
+ br i1 false, label %cond_false381, label %cond_true351
+
+cond_true351: ; preds = %cond_true344
+ br label %cond_next387
+
+cond_false381: ; preds = %cond_true344
+ br label %cond_next387
+
+cond_next387: ; preds = %cond_false381, %cond_true351
+ br label %cond_next401
+
+cond_false398: ; preds = %cond_next336, %cond_true301
+ br label %cond_next401
+
+cond_next401: ; preds = %cond_false398, %cond_next387
+ br i1 false, label %cond_next475, label %cond_true453
+
+bb420: ; preds = %cond_next434, %bb420.preheader
+ br i1 false, label %cond_next434, label %cond_true428
+
+cond_true428: ; preds = %bb420
+ br label %cond_next434
+
+cond_next434: ; preds = %cond_true428, %bb420
+ br i1 false, label %bb420, label %cond_next446.loopexit1
+
+cond_next446.loopexit: ; preds = %cond_next285
+ br label %cond_next446
+
+cond_next446.loopexit1: ; preds = %cond_next434
+ br label %cond_next446
+
+cond_next446: ; preds = %cond_next446.loopexit1, %cond_next446.loopexit
+ br i1 false, label %cond_next475, label %cond_true453
+
+cond_true453: ; preds = %cond_next446, %cond_next401
+ br i1 false, label %cond_true458, label %cond_next475
+
+cond_true458: ; preds = %cond_true453
+ br label %cond_next475
+
+cond_next475: ; preds = %cond_true458, %cond_true453, %cond_next446, %cond_next401
+ br i1 false, label %bb493.loopexit, label %bb148
+
+bb493.loopexit: ; preds = %cond_next475
+ br label %bb493
+
+bb493: ; preds = %bb493.loopexit, %bb
+ br i1 false, label %cond_next499, label %bb510.loopexit
+
+cond_next499: ; preds = %bb493
+ br label %bb
+
+bb510.loopexit: ; preds = %bb493
+ br label %bb510
+
+bb510: ; preds = %bb510.loopexit, %cond_true19
+ br i1 false, label %cond_next524, label %cond_true517
+
+cond_true517: ; preds = %bb510
+ br label %cond_next524
+
+cond_next524: ; preds = %cond_true517, %bb510
+ br i1 false, label %cond_next540, label %cond_true533
+
+cond_true533: ; preds = %cond_next524
+ br label %cond_next540
+
+cond_next540: ; preds = %cond_true533, %cond_next524
+ br i1 false, label %cond_true554, label %cond_next560
+
+cond_true554: ; preds = %cond_next540
+ br label %cond_next560
+
+cond_next560: ; preds = %cond_true554, %cond_next540
+ br i1 false, label %cond_true566, label %cond_next572
+
+cond_true566: ; preds = %cond_next560
+ br label %cond_next572
+
+cond_next572: ; preds = %cond_true566, %cond_next560
+ br i1 false, label %bb608.preheader, label %bb791.preheader
+
+bb608.preheader: ; preds = %cond_next797.us, %cond_next572
+ br label %bb608
+
+bb608: ; preds = %cond_next771, %bb608.preheader
+ br i1 false, label %cond_false627, label %cond_true613
+
+cond_true613: ; preds = %bb608
+ br label %cond_next640
+
+cond_false627: ; preds = %bb608
+ br label %cond_next640
+
+cond_next640: ; preds = %cond_false627, %cond_true613
+ br i1 false, label %cond_true653, label %cond_next671
+
+cond_true653: ; preds = %cond_next640
+ br label %cond_next671
+
+cond_next671: ; preds = %cond_true653, %cond_next640
+ br i1 false, label %cond_true683, label %cond_next724
+
+cond_true683: ; preds = %cond_next671
+ br i1 false, label %cond_next724, label %L1
+
+cond_next724: ; preds = %cond_true683, %cond_next671
+ br i1 false, label %cond_true735, label %L1
+
+cond_true735: ; preds = %cond_next724
+ br label %L1
+
+L1: ; preds = %cond_true735, %cond_next724, %cond_true683
+ br i1 false, label %cond_true745, label %cond_next771
+
+cond_true745: ; preds = %L1
+ br label %cond_next771
+
+cond_next771: ; preds = %cond_true745, %L1
+ br i1 false, label %bb608, label %bb791.preheader.loopexit
+
+bb791.preheader.loopexit: ; preds = %cond_next771
+ br label %bb791.preheader
+
+bb791.preheader: ; preds = %bb791.preheader.loopexit, %cond_next572
+ br i1 false, label %cond_next797.us, label %bb809.split
+
+cond_next797.us: ; preds = %bb791.preheader
+ br label %bb608.preheader
+
+bb809.split: ; preds = %bb791.preheader
+ br i1 false, label %cond_next827, label %cond_true820
+
+cond_true820: ; preds = %bb809.split
+ br label %cond_next827
+
+cond_next827: ; preds = %cond_true820, %bb809.split
+ br i1 false, label %cond_true833, label %cond_next840
+
+cond_true833: ; preds = %cond_next827
+ br label %cond_next840
+
+cond_next840: ; preds = %cond_true833, %cond_next827
+ br i1 false, label %bb866, label %bb1245
+
+bb866: ; preds = %bb1239, %cond_next840
+ br i1 false, label %cond_true875, label %bb911
+
+cond_true875: ; preds = %bb866
+ br label %cond_next1180
+
+bb911: ; preds = %bb866
+ switch i32 0, label %bb1165 [
+ i32 0, label %bb915
+ i32 1, label %bb932
+ i32 2, label %bb941
+ i32 3, label %bb1029
+ i32 4, label %bb1036
+ i32 5, label %bb1069
+ i32 6, label %L3
+ ]
+
+bb915: ; preds = %cond_next1171, %bb911
+ br i1 false, label %cond_next1171, label %cond_next1180
+
+bb932: ; preds = %cond_next1171, %bb911
+ br label %L1970
+
+bb941: ; preds = %cond_next1171, %bb911
+ br label %L1970
+
+L1970: ; preds = %bb941, %bb932
+ br label %bb1165
+
+bb1029: ; preds = %cond_next1171, %bb911
+ br label %L4
+
+bb1036: ; preds = %cond_next1171, %bb911
+ br label %L4
+
+bb1069: ; preds = %cond_next1171, %bb911
+ br i1 false, label %cond_next1121, label %cond_true1108
+
+L3: ; preds = %cond_next1171, %bb911
+ br i1 false, label %cond_next1121, label %cond_true1108
+
+cond_true1108: ; preds = %L3, %bb1069
+ br label %L4
+
+cond_next1121: ; preds = %L3, %bb1069
+ br label %L4
+
+L4: ; preds = %cond_next1121, %cond_true1108, %bb1036, %bb1029
+ br label %bb1165
+
+bb1165: ; preds = %cond_next1171, %L4, %L1970, %bb911
+ br i1 false, label %cond_next1171, label %cond_next1180
+
+cond_next1171: ; preds = %bb1165, %bb915
+ switch i32 0, label %bb1165 [
+ i32 0, label %bb915
+ i32 1, label %bb932
+ i32 2, label %bb941
+ i32 3, label %bb1029
+ i32 4, label %bb1036
+ i32 5, label %bb1069
+ i32 6, label %L3
+ ]
+
+cond_next1180: ; preds = %bb1165, %bb915, %cond_true875
+ br label %bb1239
+
+bb1239: ; preds = %cond_next1251, %cond_next1180
+ br i1 false, label %bb866, label %bb1245
+
+bb1245: ; preds = %bb1239, %cond_next840
+ br i1 false, label %cond_next1251, label %bb1257
+
+cond_next1251: ; preds = %bb1245
+ br label %bb1239
+
+bb1257: ; preds = %bb1245
+ ret void
+}
diff --git a/test/Other/2007-06-05-PassID.ll b/test/Other/2007-06-05-PassID.ll
new file mode 100644
index 0000000..2554b8b
--- /dev/null
+++ b/test/Other/2007-06-05-PassID.ll
@@ -0,0 +1,11 @@
+;RUN: opt < %s -analyze -dot-cfg-only 2>/dev/null
+;PR 1497
+
+define void @foo() {
+entry:
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
diff --git a/test/Other/2007-06-28-PassManager.ll b/test/Other/2007-06-28-PassManager.ll
new file mode 100644
index 0000000..0ed2759
--- /dev/null
+++ b/test/Other/2007-06-28-PassManager.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -analyze -inline
+; PR1526
+; RUN: opt < %s -analyze -indvars
+; PR1539
+define i32 @test1() {
+ ret i32 0
+}
diff --git a/test/Other/2007-09-10-PassManager.ll b/test/Other/2007-09-10-PassManager.ll
new file mode 100644
index 0000000..ded15e5
--- /dev/null
+++ b/test/Other/2007-09-10-PassManager.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -loop-unswitch -indvars -disable-output
+; Require SCEV before LCSSA.
+define void @foo() {
+entry:
+ %i = alloca i32, align 4 ; <i32*> [#uses=5]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 0, i32* %i, align 4
+ br label %bb3
+
+bb: ; preds = %bb3
+ %tmp = load i32* %i, align 4 ; <i32> [#uses=1]
+ call void @bar( i32 %tmp )
+ %tmp1 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
+ store i32 %tmp2, i32* %i, align 4
+ br label %bb3
+
+bb3: ; preds = %bb, %entry
+ %tmp4 = load i32* %i, align 4 ; <i32> [#uses=1]
+ %tmp5 = icmp sle i32 %tmp4, 9 ; <i1> [#uses=1]
+ %tmp56 = zext i1 %tmp5 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp56, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb7
+
+bb7: ; preds = %bb3
+ br label %return
+
+return: ; preds = %bb7
+ ret void
+}
+
+declare void @bar(i32)
diff --git a/test/Other/2008-02-14-PassManager.ll b/test/Other/2008-02-14-PassManager.ll
new file mode 100644
index 0000000..bdaf933
--- /dev/null
+++ b/test/Other/2008-02-14-PassManager.ll
@@ -0,0 +1,5 @@
+; RUN: opt < %s -loop-unroll -loop-rotate -simplifycfg -disable-output
+; PR2028
+define i32 @test1() {
+ ret i32 0
+}
diff --git a/test/Other/2008-03-19-PassManager.ll b/test/Other/2008-03-19-PassManager.ll
new file mode 100644
index 0000000..e208222
--- /dev/null
+++ b/test/Other/2008-03-19-PassManager.ll
@@ -0,0 +1,58 @@
+; PR 2034
+; RUN: opt < %s -anders-aa -instcombine -gvn -disable-output
+ %struct.FULL = type { i32, i32, [1000 x float*] }
+
+define i32 @sgesl(%struct.FULL* %a, i32* %ipvt, float* %b, i32 %job) {
+entry:
+ %a_addr = alloca %struct.FULL* ; <%struct.FULL**> [#uses=1]
+ %ipvt_addr = alloca i32* ; <i32**> [#uses=1]
+ %b_addr = alloca float* ; <float**> [#uses=1]
+ %job_addr = alloca i32 ; <i32*> [#uses=1]
+ %akk = alloca float* ; <float**> [#uses=2]
+ %k = alloca i32 ; <i32*> [#uses=1]
+ %l = alloca i32 ; <i32*> [#uses=1]
+ %n = alloca i32 ; <i32*> [#uses=1]
+ %nm1 = alloca i32 ; <i32*> [#uses=1]
+ %tmp5 = load i32* %job_addr, align 4 ; <i32> [#uses=1]
+ %tmp6 = icmp eq i32 %tmp5, 0 ; <i1> [#uses=1]
+ %tmp67 = zext i1 %tmp6 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp67, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_next137
+
+cond_true: ; preds = %entry
+ %tmp732 = load i32* %nm1, align 4 ; <i32> [#uses=1]
+ %tmp743 = icmp slt i32 0, %tmp732 ; <i1> [#uses=1]
+ %tmp74754 = zext i1 %tmp743 to i8 ; <i8> [#uses=1]
+ %toBool765 = icmp ne i8 %tmp74754, 0 ; <i1> [#uses=1]
+ br i1 %toBool765, label %bb, label %bb77
+
+bb: ; preds = %cond_true
+ %tmp9 = load %struct.FULL** %a_addr, align 4 ; <%struct.FULL*> [#uses=1]
+ %tmp10 = getelementptr %struct.FULL* %tmp9, i32 0, i32 2 ; <[1000 x float*]*> [#uses=1]
+ %tmp11 = getelementptr [1000 x float*]* %tmp10, i32 0, i32 0 ; <float**> [#uses=1]
+ %tmp12 = load float** %tmp11, align 4 ; <float*> [#uses=1]
+ %tmp13 = load i32* %k, align 4 ; <i32> [#uses=1]
+ %tmp14 = getelementptr float* %tmp12, i32 %tmp13 ; <float*> [#uses=1]
+ store float* %tmp14, float** %akk, align 4
+ %tmp17 = load float** %b_addr, align 4 ; <float*> [#uses=0]
+ %tmp18 = load i32* %l, align 4 ; <i32> [#uses=0]
+ ret i32 0
+
+bb77: ; preds = %cond_true
+ ret i32 0
+
+cond_next137: ; preds = %entry
+ %tmp18922 = load i32* %n, align 4 ; <i32> [#uses=1]
+ %tmp19023 = icmp slt i32 0, %tmp18922 ; <i1> [#uses=1]
+ %tmp19019124 = zext i1 %tmp19023 to i8 ; <i8> [#uses=1]
+ %toBool19225 = icmp ne i8 %tmp19019124, 0 ; <i1> [#uses=1]
+ br i1 %toBool19225, label %bb138, label %bb193
+
+bb138: ; preds = %cond_next137
+ store float* null, float** %akk, align 4
+ ret i32 0
+
+bb193: ; preds = %cond_next137
+ %tmp196 = load i32** %ipvt_addr, align 4 ; <i32*> [#uses=0]
+ ret i32 0
+}
diff --git a/test/Other/2008-06-04-FieldSizeInPacked.ll b/test/Other/2008-06-04-FieldSizeInPacked.ll
new file mode 100644
index 0000000..d90209f
--- /dev/null
+++ b/test/Other/2008-06-04-FieldSizeInPacked.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep true
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %packed = type <{ x86_fp80, i8 }>
+ %unpacked = type { x86_fp80, i8 }
+
+define i1 @q() nounwind {
+entry:
+ %char_p = getelementptr %packed* null, i32 0, i32 1 ; <i8*> [#uses=1]
+ %char_u = getelementptr %unpacked* null, i32 0, i32 1 ; <i8*> [#uses=1]
+ %res = icmp eq i8* %char_p, %char_u ; <i1> [#uses=1]
+ ret i1 %res
+}
diff --git a/test/Other/2008-08-14-PassManager.ll b/test/Other/2008-08-14-PassManager.ll
new file mode 100644
index 0000000..8d6a6d8
--- /dev/null
+++ b/test/Other/2008-08-14-PassManager.ll
@@ -0,0 +1,5 @@
+; RUN: opt < %s -loop-deletion -loop-index-split -disable-output
+; PR2640
+define i32 @test1() {
+ ret i32 0
+}
diff --git a/test/Other/2008-10-06-RemoveDeadPass.ll b/test/Other/2008-10-06-RemoveDeadPass.ll
new file mode 100644
index 0000000..7cec2c5
--- /dev/null
+++ b/test/Other/2008-10-06-RemoveDeadPass.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -inline -internalize -disable-output
+define void @foo() nounwind {
+ ret void
+}
+
+define void @main(...) nounwind {
+ call void @foo()
+ ret void
+}
+
+
diff --git a/test/Other/2008-10-15-MissingSpace.ll b/test/Other/2008-10-15-MissingSpace.ll
new file mode 100644
index 0000000..a61fa61
--- /dev/null
+++ b/test/Other/2008-10-15-MissingSpace.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llvm-dis | not grep {void@}
+; PR2894
+declare void @g()
+define void @f() {
+ invoke void @g() to label %c unwind label %c
+ c: ret void
+}
diff --git a/test/Other/2009-03-31-CallGraph.ll b/test/Other/2009-03-31-CallGraph.ll
new file mode 100644
index 0000000..d6653ec
--- /dev/null
+++ b/test/Other/2009-03-31-CallGraph.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -inline -prune-eh -disable-output
+define void @f2() {
+ invoke void @f6()
+ to label %ok1 unwind label %lpad1
+
+ok1:
+ ret void
+
+lpad1:
+ invoke void @f4()
+ to label %ok2 unwind label %lpad2
+
+ok2:
+ call void @f8()
+ unreachable
+
+lpad2:
+ unreachable
+}
+
+declare void @f3()
+
+define void @f4() {
+ call void @f3()
+ ret void
+}
+
+declare void @f6() nounwind
+
+declare void @f8()
+
diff --git a/test/Other/2009-06-05-no-implicit-float.ll b/test/Other/2009-06-05-no-implicit-float.ll
new file mode 100644
index 0000000..3f07170
--- /dev/null
+++ b/test/Other/2009-06-05-no-implicit-float.ll
@@ -0,0 +1,4 @@
+
+; RUN: opt < %s -verify -S | grep noimplicitfloat
+declare void @f() noimplicitfloat
+
diff --git a/test/Other/2009-09-14-function-elements.ll b/test/Other/2009-09-14-function-elements.ll
new file mode 100644
index 0000000..883d76d
--- /dev/null
+++ b/test/Other/2009-09-14-function-elements.ll
@@ -0,0 +1,6 @@
+; RUN: not llvm-as %s -disable-output 2>/dev/null
+
+; Arrays and structures with function types (not function pointers) are illegal.
+
+@foo = external global [4 x i32 (i32)]
+@bar = external global { i32 (i32) }
diff --git a/test/Other/constant-fold-gep.ll b/test/Other/constant-fold-gep.ll
new file mode 100644
index 0000000..2888b3d
--- /dev/null
+++ b/test/Other/constant-fold-gep.ll
@@ -0,0 +1,428 @@
+; "PLAIN" - No optimizations. This tests the target-independent
+; constant folder.
+; RUN: opt -S -o - < %s | FileCheck --check-prefix=PLAIN %s
+
+; "OPT" - Optimizations but no targetdata. This tests target-independent
+; folding in the optimizers.
+; RUN: opt -S -o - -instcombine -globalopt < %s | FileCheck --check-prefix=OPT %s
+
+; "TO" - Optimizations and targetdata. This tests target-dependent
+; folding in the optimizers.
+; RUN: opt -S -o - -instcombine -globalopt -default-data-layout="e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64" < %s | FileCheck --check-prefix=TO %s
+
+; "SCEV" - ScalarEvolution but no targetdata.
+; RUN: opt -analyze -scalar-evolution < %s | FileCheck --check-prefix=SCEV %s
+
+; ScalarEvolution with targetdata isn't interesting on these testcases
+; because ScalarEvolution doesn't attempt to duplicate all of instcombine's
+; and the constant folders' folding.
+
+; PLAIN: %0 = type { i1, double }
+; PLAIN: %1 = type { double, float, double, double }
+; PLAIN: %2 = type { i1, i1* }
+; PLAIN: %3 = type { i64, i64 }
+; OPT: %0 = type { i1, double }
+; OPT: %1 = type { double, float, double, double }
+; OPT: %2 = type { i1, i1* }
+; OPT: %3 = type { i64, i64 }
+
+; The automatic constant folder in opt does not have targetdata access, so
+; it can't fold gep arithmetic, in general. However, the constant folder run
+; from instcombine and global opt can use targetdata.
+
+; PLAIN: @G8 = global i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -1)
+; PLAIN: @G1 = global i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -1)
+; PLAIN: @F8 = global i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -2)
+; PLAIN: @F1 = global i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -2)
+; PLAIN: @H8 = global i8* getelementptr (i8* null, i32 -1)
+; PLAIN: @H1 = global i1* getelementptr (i1* null, i32 -1)
+; OPT: @G8 = global i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -1)
+; OPT: @G1 = global i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -1)
+; OPT: @F8 = global i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -2)
+; OPT: @F1 = global i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -2)
+; OPT: @H8 = global i8* getelementptr (i8* null, i32 -1)
+; OPT: @H1 = global i1* getelementptr (i1* null, i32 -1)
+; TO: @G8 = global i8* null
+; TO: @G1 = global i1* null
+; TO: @F8 = global i8* inttoptr (i64 -1 to i8*)
+; TO: @F1 = global i1* inttoptr (i64 -1 to i1*)
+; TO: @H8 = global i8* inttoptr (i64 -1 to i8*)
+; TO: @H1 = global i1* inttoptr (i64 -1 to i1*)
+
+@G8 = global i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -1)
+@G1 = global i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -1)
+@F8 = global i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -2)
+@F1 = global i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -2)
+@H8 = global i8* getelementptr (i8* inttoptr (i32 0 to i8*), i32 -1)
+@H1 = global i1* getelementptr (i1* inttoptr (i32 0 to i1*), i32 -1)
+
+; The target-independent folder should be able to do some clever
+; simplifications on sizeof, alignof, and offsetof expressions. The
+; target-dependent folder should fold these down to constants.
+
+; PLAIN: @a = constant i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2310)
+; PLAIN: @b = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
+; PLAIN: @c = constant i64 mul nuw (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2)
+; PLAIN: @d = constant i64 mul nuw (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 11)
+; PLAIN: @e = constant i64 ptrtoint (double* getelementptr (%1* null, i64 0, i32 2) to i64)
+; PLAIN: @f = constant i64 1
+; PLAIN: @g = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
+; PLAIN: @h = constant i64 ptrtoint (i1** getelementptr (i1** null, i32 1) to i64)
+; PLAIN: @i = constant i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64)
+; OPT: @a = constant i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2310)
+; OPT: @b = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
+; OPT: @c = constant i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2)
+; OPT: @d = constant i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 11)
+; OPT: @e = constant i64 ptrtoint (double* getelementptr (%1* null, i64 0, i32 2) to i64)
+; OPT: @f = constant i64 1
+; OPT: @g = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
+; OPT: @h = constant i64 ptrtoint (i1** getelementptr (i1** null, i32 1) to i64)
+; OPT: @i = constant i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64)
+; TO: @a = constant i64 18480
+; TO: @b = constant i64 8
+; TO: @c = constant i64 16
+; TO: @d = constant i64 88
+; TO: @e = constant i64 16
+; TO: @f = constant i64 1
+; TO: @g = constant i64 8
+; TO: @h = constant i64 8
+; TO: @i = constant i64 8
+
+@a = constant i64 mul (i64 3, i64 mul (i64 ptrtoint ({[7 x double], [7 x double]}* getelementptr ({[7 x double], [7 x double]}* null, i64 11) to i64), i64 5))
+@b = constant i64 ptrtoint ([13 x double]* getelementptr ({i1, [13 x double]}* null, i64 0, i32 1) to i64)
+@c = constant i64 ptrtoint (double* getelementptr ({double, double, double, double}* null, i64 0, i32 2) to i64)
+@d = constant i64 ptrtoint (double* getelementptr ([13 x double]* null, i64 0, i32 11) to i64)
+@e = constant i64 ptrtoint (double* getelementptr ({double, float, double, double}* null, i64 0, i32 2) to i64)
+@f = constant i64 ptrtoint (<{ i16, i128 }>* getelementptr ({i1, <{ i16, i128 }>}* null, i64 0, i32 1) to i64)
+@g = constant i64 ptrtoint ({double, double}* getelementptr ({i1, {double, double}}* null, i64 0, i32 1) to i64)
+@h = constant i64 ptrtoint (double** getelementptr (double** null, i64 1) to i64)
+@i = constant i64 ptrtoint (double** getelementptr ({i1, double*}* null, i64 0, i32 1) to i64)
+
+; The target-dependent folder should cast GEP indices to integer-sized pointers.
+
+; PLAIN: @M = constant i64* getelementptr (i64* null, i32 1)
+; PLAIN: @N = constant i64* getelementptr (%3* null, i32 0, i32 1)
+; PLAIN: @O = constant i64* getelementptr ([2 x i64]* null, i32 0, i32 1)
+; OPT: @M = constant i64* getelementptr (i64* null, i32 1)
+; OPT: @N = constant i64* getelementptr (%3* null, i32 0, i32 1)
+; OPT: @O = constant i64* getelementptr ([2 x i64]* null, i32 0, i32 1)
+; TO: @M = constant i64* inttoptr (i64 8 to i64*)
+; TO: @N = constant i64* inttoptr (i64 8 to i64*)
+; TO: @O = constant i64* inttoptr (i64 8 to i64*)
+
+@M = constant i64* getelementptr (i64 *null, i32 1)
+@N = constant i64* getelementptr ({ i64, i64 } *null, i32 0, i32 1)
+@O = constant i64* getelementptr ([2 x i64] *null, i32 0, i32 1)
+
+; Duplicate all of the above as function return values rather than
+; global initializers.
+
+; PLAIN: define i8* @goo8() nounwind {
+; PLAIN: %t = bitcast i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -1) to i8*
+; PLAIN: ret i8* %t
+; PLAIN: }
+; PLAIN: define i1* @goo1() nounwind {
+; PLAIN: %t = bitcast i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -1) to i1*
+; PLAIN: ret i1* %t
+; PLAIN: }
+; PLAIN: define i8* @foo8() nounwind {
+; PLAIN: %t = bitcast i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -2) to i8*
+; PLAIN: ret i8* %t
+; PLAIN: }
+; PLAIN: define i1* @foo1() nounwind {
+; PLAIN: %t = bitcast i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -2) to i1*
+; PLAIN: ret i1* %t
+; PLAIN: }
+; PLAIN: define i8* @hoo8() nounwind {
+; PLAIN: %t = bitcast i8* getelementptr (i8* null, i32 -1) to i8*
+; PLAIN: ret i8* %t
+; PLAIN: }
+; PLAIN: define i1* @hoo1() nounwind {
+; PLAIN: %t = bitcast i1* getelementptr (i1* null, i32 -1) to i1*
+; PLAIN: ret i1* %t
+; PLAIN: }
+; OPT: define i8* @goo8() nounwind {
+; OPT: ret i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -1)
+; OPT: }
+; OPT: define i1* @goo1() nounwind {
+; OPT: ret i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -1)
+; OPT: }
+; OPT: define i8* @foo8() nounwind {
+; OPT: ret i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -2)
+; OPT: }
+; OPT: define i1* @foo1() nounwind {
+; OPT: ret i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -2)
+; OPT: }
+; OPT: define i8* @hoo8() nounwind {
+; OPT: ret i8* getelementptr (i8* null, i32 -1)
+; OPT: }
+; OPT: define i1* @hoo1() nounwind {
+; OPT: ret i1* getelementptr (i1* null, i32 -1)
+; OPT: }
+; TO: define i8* @goo8() nounwind {
+; TO: ret i8* null
+; TO: }
+; TO: define i1* @goo1() nounwind {
+; TO: ret i1* null
+; TO: }
+; TO: define i8* @foo8() nounwind {
+; TO: ret i8* inttoptr (i64 -1 to i8*)
+; TO: }
+; TO: define i1* @foo1() nounwind {
+; TO: ret i1* inttoptr (i64 -1 to i1*)
+; TO: }
+; TO: define i8* @hoo8() nounwind {
+; TO: ret i8* inttoptr (i64 -1 to i8*)
+; TO: }
+; TO: define i1* @hoo1() nounwind {
+; TO: ret i1* inttoptr (i64 -1 to i1*)
+; TO: }
+; SCEV: Classifying expressions for: @goo8
+; SCEV: %t = bitcast i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -1) to i8*
+; SCEV: --> ((-1 * sizeof(i8)) + inttoptr (i32 1 to i8*))
+; SCEV: Classifying expressions for: @goo1
+; SCEV: %t = bitcast i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -1) to i1*
+; SCEV: --> ((-1 * sizeof(i1)) + inttoptr (i32 1 to i1*))
+; SCEV: Classifying expressions for: @foo8
+; SCEV: %t = bitcast i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -2) to i8*
+; SCEV: --> ((-2 * sizeof(i8)) + inttoptr (i32 1 to i8*))
+; SCEV: Classifying expressions for: @foo1
+; SCEV: %t = bitcast i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -2) to i1*
+; SCEV: --> ((-2 * sizeof(i1)) + inttoptr (i32 1 to i1*))
+; SCEV: Classifying expressions for: @hoo8
+; SCEV: --> (-1 * sizeof(i8))
+; SCEV: Classifying expressions for: @hoo1
+; SCEV: --> (-1 * sizeof(i1))
+
+define i8* @goo8() nounwind {
+ %t = bitcast i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -1) to i8*
+ ret i8* %t
+}
+define i1* @goo1() nounwind {
+ %t = bitcast i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -1) to i1*
+ ret i1* %t
+}
+define i8* @foo8() nounwind {
+ %t = bitcast i8* getelementptr (i8* inttoptr (i32 1 to i8*), i32 -2) to i8*
+ ret i8* %t
+}
+define i1* @foo1() nounwind {
+ %t = bitcast i1* getelementptr (i1* inttoptr (i32 1 to i1*), i32 -2) to i1*
+ ret i1* %t
+}
+define i8* @hoo8() nounwind {
+ %t = bitcast i8* getelementptr (i8* inttoptr (i32 0 to i8*), i32 -1) to i8*
+ ret i8* %t
+}
+define i1* @hoo1() nounwind {
+ %t = bitcast i1* getelementptr (i1* inttoptr (i32 0 to i1*), i32 -1) to i1*
+ ret i1* %t
+}
+
+; PLAIN: define i64 @fa() nounwind {
+; PLAIN: %t = bitcast i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2310) to i64
+; PLAIN: ret i64 %t
+; PLAIN: }
+; PLAIN: define i64 @fb() nounwind {
+; PLAIN: %t = bitcast i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64) to i64
+; PLAIN: ret i64 %t
+; PLAIN: }
+; PLAIN: define i64 @fc() nounwind {
+; PLAIN: %t = bitcast i64 mul nuw (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2) to i64
+; PLAIN: ret i64 %t
+; PLAIN: }
+; PLAIN: define i64 @fd() nounwind {
+; PLAIN: %t = bitcast i64 mul nuw (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 11) to i64
+; PLAIN: ret i64 %t
+; PLAIN: }
+; PLAIN: define i64 @fe() nounwind {
+; PLAIN: %t = bitcast i64 ptrtoint (double* getelementptr (%1* null, i64 0, i32 2) to i64) to i64
+; PLAIN: ret i64 %t
+; PLAIN: }
+; PLAIN: define i64 @ff() nounwind {
+; PLAIN: %t = bitcast i64 1 to i64
+; PLAIN: ret i64 %t
+; PLAIN: }
+; PLAIN: define i64 @fg() nounwind {
+; PLAIN: %t = bitcast i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
+; PLAIN: ret i64 %t
+; PLAIN: }
+; PLAIN: define i64 @fh() nounwind {
+; PLAIN: %t = bitcast i64 ptrtoint (i1** getelementptr (i1** null, i32 1) to i64)
+; PLAIN: ret i64 %t
+; PLAIN: }
+; PLAIN: define i64 @fi() nounwind {
+; PLAIN: %t = bitcast i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64)
+; PLAIN: ret i64 %t
+; PLAIN: }
+; OPT: define i64 @fa() nounwind {
+; OPT: ret i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2310)
+; OPT: }
+; OPT: define i64 @fb() nounwind {
+; OPT: ret i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
+; OPT: }
+; OPT: define i64 @fc() nounwind {
+; OPT: ret i64 mul nuw (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2)
+; OPT: }
+; OPT: define i64 @fd() nounwind {
+; OPT: ret i64 mul nuw (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 11)
+; OPT: }
+; OPT: define i64 @fe() nounwind {
+; OPT: ret i64 ptrtoint (double* getelementptr (%1* null, i64 0, i32 2) to i64)
+; OPT: }
+; OPT: define i64 @ff() nounwind {
+; OPT: ret i64 1
+; OPT: }
+; OPT: define i64 @fg() nounwind {
+; OPT: ret i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
+; OPT: }
+; OPT: define i64 @fh() nounwind {
+; OPT: ret i64 ptrtoint (i1** getelementptr (i1** null, i32 1) to i64)
+; OPT: }
+; OPT: define i64 @fi() nounwind {
+; OPT: ret i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64)
+; OPT: }
+; TO: define i64 @fa() nounwind {
+; TO: ret i64 18480
+; TO: }
+; TO: define i64 @fb() nounwind {
+; TO: ret i64 8
+; TO: }
+; TO: define i64 @fc() nounwind {
+; TO: ret i64 16
+; TO: }
+; TO: define i64 @fd() nounwind {
+; TO: ret i64 88
+; TO: }
+; TO: define i64 @fe() nounwind {
+; TO: ret i64 16
+; TO: }
+; TO: define i64 @ff() nounwind {
+; TO: ret i64 1
+; TO: }
+; TO: define i64 @fg() nounwind {
+; TO: ret i64 8
+; TO: }
+; TO: define i64 @fh() nounwind {
+; TO: ret i64 8
+; TO: }
+; TO: define i64 @fi() nounwind {
+; TO: ret i64 8
+; TO: }
+; SCEV: Classifying expressions for: @fa
+; SCEV: %t = bitcast i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2310) to i64
+; SCEV: --> (2310 * sizeof(double))
+; SCEV: Classifying expressions for: @fb
+; SCEV: %t = bitcast i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64) to i64
+; SCEV: --> alignof(double)
+; SCEV: Classifying expressions for: @fc
+; SCEV: %t = bitcast i64 mul nuw (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2) to i64
+; SCEV: --> (2 * sizeof(double))
+; SCEV: Classifying expressions for: @fd
+; SCEV: %t = bitcast i64 mul nuw (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 11) to i64
+; SCEV: --> (11 * sizeof(double))
+; SCEV: Classifying expressions for: @fe
+; SCEV: %t = bitcast i64 ptrtoint (double* getelementptr (%1* null, i64 0, i32 2) to i64) to i64
+; SCEV: --> offsetof({ double, float, double, double }, 2)
+; SCEV: Classifying expressions for: @ff
+; SCEV: %t = bitcast i64 1 to i64
+; SCEV: --> 1
+; SCEV: Classifying expressions for: @fg
+; SCEV: %t = bitcast i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
+; SCEV: --> alignof(double)
+; SCEV: Classifying expressions for: @fh
+; SCEV: %t = bitcast i64 ptrtoint (i1** getelementptr (i1** null, i32 1) to i64)
+; SCEV: --> sizeof(i1*)
+; SCEV: Classifying expressions for: @fi
+; SCEV: %t = bitcast i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64)
+; SCEV: --> alignof(i1*)
+
+define i64 @fa() nounwind {
+ %t = bitcast i64 mul (i64 3, i64 mul (i64 ptrtoint ({[7 x double], [7 x double]}* getelementptr ({[7 x double], [7 x double]}* null, i64 11) to i64), i64 5)) to i64
+ ret i64 %t
+}
+define i64 @fb() nounwind {
+ %t = bitcast i64 ptrtoint ([13 x double]* getelementptr ({i1, [13 x double]}* null, i64 0, i32 1) to i64) to i64
+ ret i64 %t
+}
+define i64 @fc() nounwind {
+ %t = bitcast i64 ptrtoint (double* getelementptr ({double, double, double, double}* null, i64 0, i32 2) to i64) to i64
+ ret i64 %t
+}
+define i64 @fd() nounwind {
+ %t = bitcast i64 ptrtoint (double* getelementptr ([13 x double]* null, i64 0, i32 11) to i64) to i64
+ ret i64 %t
+}
+define i64 @fe() nounwind {
+ %t = bitcast i64 ptrtoint (double* getelementptr ({double, float, double, double}* null, i64 0, i32 2) to i64) to i64
+ ret i64 %t
+}
+define i64 @ff() nounwind {
+ %t = bitcast i64 ptrtoint (<{ i16, i128 }>* getelementptr ({i1, <{ i16, i128 }>}* null, i64 0, i32 1) to i64) to i64
+ ret i64 %t
+}
+define i64 @fg() nounwind {
+ %t = bitcast i64 ptrtoint ({double, double}* getelementptr ({i1, {double, double}}* null, i64 0, i32 1) to i64) to i64
+ ret i64 %t
+}
+define i64 @fh() nounwind {
+ %t = bitcast i64 ptrtoint (double** getelementptr (double** null, i32 1) to i64) to i64
+ ret i64 %t
+}
+define i64 @fi() nounwind {
+ %t = bitcast i64 ptrtoint (double** getelementptr ({i1, double*}* null, i64 0, i32 1) to i64) to i64
+ ret i64 %t
+}
+
+; PLAIN: define i64* @fM() nounwind {
+; PLAIN: %t = bitcast i64* getelementptr (i64* null, i32 1) to i64*
+; PLAIN: ret i64* %t
+; PLAIN: }
+; PLAIN: define i64* @fN() nounwind {
+; PLAIN: %t = bitcast i64* getelementptr (%3* null, i32 0, i32 1) to i64*
+; PLAIN: ret i64* %t
+; PLAIN: }
+; PLAIN: define i64* @fO() nounwind {
+; PLAIN: %t = bitcast i64* getelementptr ([2 x i64]* null, i32 0, i32 1) to i64*
+; PLAIN: ret i64* %t
+; PLAIN: }
+; OPT: define i64* @fM() nounwind {
+; OPT: ret i64* getelementptr (i64* null, i32 1)
+; OPT: }
+; OPT: define i64* @fN() nounwind {
+; OPT: ret i64* getelementptr (%3* null, i32 0, i32 1)
+; OPT: }
+; OPT: define i64* @fO() nounwind {
+; OPT: ret i64* getelementptr ([2 x i64]* null, i32 0, i32 1)
+; OPT: }
+; TO: define i64* @fM() nounwind {
+; TO: ret i64* inttoptr (i64 8 to i64*)
+; TO: }
+; TO: define i64* @fN() nounwind {
+; TO: ret i64* inttoptr (i64 8 to i64*)
+; TO: }
+; TO: define i64* @fO() nounwind {
+; TO: ret i64* inttoptr (i64 8 to i64*)
+; TO: }
+; SCEV: Classifying expressions for: @fM
+; SCEV: %t = bitcast i64* getelementptr (i64* null, i32 1) to i64*
+; SCEV: --> sizeof(i64)
+; SCEV: Classifying expressions for: @fN
+; SCEV: %t = bitcast i64* getelementptr (%3* null, i32 0, i32 1) to i64*
+; SCEV: --> sizeof(i64)
+; SCEV: Classifying expressions for: @fO
+; SCEV: %t = bitcast i64* getelementptr ([2 x i64]* null, i32 0, i32 1) to i64*
+; SCEV: --> sizeof(i64)
+
+define i64* @fM() nounwind {
+ %t = bitcast i64* getelementptr (i64 *null, i32 1) to i64*
+ ret i64* %t
+}
+define i64* @fN() nounwind {
+ %t = bitcast i64* getelementptr ({ i64, i64 } *null, i32 0, i32 1) to i64*
+ ret i64* %t
+}
+define i64* @fO() nounwind {
+ %t = bitcast i64* getelementptr ([2 x i64] *null, i32 0, i32 1) to i64*
+ ret i64* %t
+}
diff --git a/test/Other/dg.exp b/test/Other/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Other/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Other/invalid-commandline-option.ll b/test/Other/invalid-commandline-option.ll
new file mode 100644
index 0000000..60840fa
--- /dev/null
+++ b/test/Other/invalid-commandline-option.ll
@@ -0,0 +1,3 @@
+; RUN: not opt --foo |& grep {Unknown command line argument}
+
+; there is no --foo
diff --git a/test/Scripts/README.txt b/test/Scripts/README.txt
new file mode 100644
index 0000000..b0b1105
--- /dev/null
+++ b/test/Scripts/README.txt
@@ -0,0 +1,2 @@
+This directory contains scripts which are used by the TestRunner style
+tests, which allows them to be simpler and more direct.
diff --git a/test/Scripts/ignore b/test/Scripts/ignore
new file mode 100755
index 0000000..865ae4d
--- /dev/null
+++ b/test/Scripts/ignore
@@ -0,0 +1,10 @@
+#!/bin/sh
+#
+# Program: ignore
+#
+# Synopsis: Ignore the result code of the command and always return 0
+#
+# Syntax: ignore command <arguments>
+
+"$@" || exit 0 && exit 0
+exit 0
diff --git a/test/Scripts/macho-dump b/test/Scripts/macho-dump
new file mode 100755
index 0000000..5b9943a
--- /dev/null
+++ b/test/Scripts/macho-dump
@@ -0,0 +1,259 @@
+#!/usr/bin/env python
+
+import struct
+import sys
+import StringIO
+
+class Reader:
+ def __init__(self, path):
+ if path == '-':
+ # Snarf all the data so we can seek.
+ self.file = StringIO.StringIO(sys.stdin.read())
+ else:
+ self.file = open(path,'rb')
+ self.isLSB = None
+
+ self.string_table = None
+
+ def setLSB(self, isLSB):
+ self.isLSB = bool(isLSB)
+
+ def tell(self):
+ return self.file.tell()
+
+ def seek(self, pos):
+ self.file.seek(pos)
+
+ def read(self, N):
+ data = self.file.read(N)
+ if len(data) != N:
+ raise ValueError,"Out of data!"
+ return data
+
+ def read8(self):
+ return ord(self.read(1))
+
+ def read16(self):
+ return struct.unpack('><'[self.isLSB] + 'H', self.read(2))[0]
+
+ def read32(self):
+ # Force to 32-bit, if possible; otherwise these might be long ints on a
+ # big-endian platform. FIXME: Why???
+ Value = struct.unpack('><'[self.isLSB] + 'I', self.read(4))[0]
+ return int(Value)
+
+ def registerStringTable(self, strings):
+ if self.string_table is not None:
+ raise ValueError,"%s: warning: multiple string tables" % sys.argv[0]
+
+ self.string_table = strings
+
+ def getString(self, index):
+ if self.string_table is None:
+ raise ValueError,"%s: warning: no string table registered" % sys.argv[0]
+
+ end = self.string_table.index('\x00', index)
+ return self.string_table[index:end]
+
+def dumpmacho(path, opts):
+ f = Reader(path)
+
+ magic = f.read(4)
+ if magic == '\xFE\xED\xFA\xCE':
+ f.setLSB(False)
+ elif magic == '\xCE\xFA\xED\xFE':
+ f.setLSB(True)
+ else:
+ raise ValueError,"Not a Mach-O object file: %r (bad magic)" % path
+
+ print "('cputype', %r)" % f.read32()
+ print "('cpusubtype', %r)" % f.read32()
+ filetype = f.read32()
+ print "('filetype', %r)" % filetype
+
+ numLoadCommands = f.read32()
+ print "('num_load_commands', %r)" % filetype
+
+ loadCommandsSize = f.read32()
+ print "('load_commands_size', %r)" % loadCommandsSize
+
+ print "('flag', %r)" % f.read32()
+
+ start = f.tell()
+
+ print "('load_commands', ["
+ for i in range(numLoadCommands):
+ dumpLoadCommand(f, i, opts)
+ print "])"
+
+ if f.tell() - start != loadCommandsSize:
+ raise ValueError,"%s: warning: invalid load commands size: %r" % (sys.argv[0], loadCommandsSize)
+
+def dumpLoadCommand(f, i, opts):
+ start = f.tell()
+
+ print " # Load Command %r" % i
+ cmd = f.read32()
+ print " (('command', %r)" % cmd
+ cmdSize = f.read32()
+ print " ('size', %r)" % cmdSize
+
+ if cmd == 1:
+ dumpSegmentLoadCommand32(f, opts)
+ elif cmd == 2:
+ dumpSymtabCommand(f, opts)
+ elif cmd == 11:
+ dumpDysymtabCommand(f, opts)
+ elif cmd == 27:
+ import uuid
+ print " ('uuid', %s)" % uuid.UUID(bytes=f.read(16))
+ else:
+ print >>sys.stderr,"%s: warning: unknown load command: %r" % (sys.argv[0], cmd)
+ f.read(cmdSize - 8)
+ print " ),"
+
+ if f.tell() - start != cmdSize:
+ raise ValueError,"%s: warning: invalid load command size: %r" % (sys.argv[0], cmdSize)
+
+def dumpSegmentLoadCommand32(f, opts):
+ print " ('segment_name', %r)" % f.read(16)
+ print " ('vm_addr', %r)" % f.read32()
+ print " ('vm_size', %r)" % f.read32()
+ print " ('file_offset', %r)" % f.read32()
+ print " ('file_size', %r)" % f.read32()
+ print " ('maxprot', %r)" % f.read32()
+ print " ('initprot', %r)" % f.read32()
+ numSections = f.read32()
+ print " ('num_sections', %r)" % numSections
+ print " ('flags', %r)" % f.read32()
+
+ print " ('sections', ["
+ for i in range(numSections):
+ dumpSection32(f, i, opts)
+ print " ])"
+
+def dumpSymtabCommand(f, opts):
+ symoff = f.read32()
+ print " ('symoff', %r)" % symoff
+ nsyms = f.read32()
+ print " ('nsyms', %r)" % nsyms
+ stroff = f.read32()
+ print " ('stroff', %r)" % stroff
+ strsize = f.read32()
+ print " ('strsize', %r)" % strsize
+
+ prev_pos = f.tell()
+
+ f.seek(stroff)
+ string_data = f.read(strsize)
+ print " ('_string_data', %r)" % string_data
+
+ f.registerStringTable(string_data)
+
+ f.seek(symoff)
+ print " ('_symbols', ["
+ for i in range(nsyms):
+ dumpNlist32(f, i, opts)
+ print " ])"
+
+ f.seek(prev_pos)
+
+def dumpNlist32(f, i, opts):
+ print " # Symbol %r" % i
+ n_strx = f.read32()
+ print " (('n_strx', %r)" % n_strx
+ n_type = f.read8()
+ print " ('n_type', %#x)" % n_type
+ n_sect = f.read8()
+ print " ('n_sect', %r)" % n_sect
+ n_desc = f.read16()
+ print " ('n_desc', %r)" % n_desc
+ n_value = f.read32()
+ print " ('n_value', %r)" % n_value
+ print " ('_string', %r)" % f.getString(n_strx)
+ print " ),"
+
+def dumpDysymtabCommand(f, opts):
+ print " ('ilocalsym', %r)" % f.read32()
+ print " ('nlocalsym', %r)" % f.read32()
+ print " ('iextdefsym', %r)" % f.read32()
+ print " ('nextdefsym', %r)" % f.read32()
+ print " ('iundefsym', %r)" % f.read32()
+ print " ('nundefsym', %r)" % f.read32()
+ print " ('tocoff', %r)" % f.read32()
+ print " ('ntoc', %r)" % f.read32()
+ print " ('modtaboff', %r)" % f.read32()
+ print " ('nmodtab', %r)" % f.read32()
+ print " ('extrefsymoff', %r)" % f.read32()
+ print " ('nextrefsyms', %r)" % f.read32()
+ indirectsymoff = f.read32()
+ print " ('indirectsymoff', %r)" % indirectsymoff
+ nindirectsyms = f.read32()
+ print " ('nindirectsyms', %r)" % nindirectsyms
+ print " ('extreloff', %r)" % f.read32()
+ print " ('nextrel', %r)" % f.read32()
+ print " ('locreloff', %r)" % f.read32()
+ print " ('nlocrel', %r)" % f.read32()
+
+ prev_pos = f.tell()
+
+ f.seek(indirectsymoff)
+ print " ('_indirect_symbols', ["
+ for i in range(nindirectsyms):
+ print " # Indirect Symbol %r" % i
+ print " (('symbol_index', %#x),)," % f.read32()
+ print " ])"
+
+ f.seek(prev_pos)
+
+def dumpSection32(f, i, opts):
+ print " # Section %r" % i
+ print " (('section_name', %r)" % f.read(16)
+ print " ('segment_name', %r)" % f.read(16)
+ print " ('address', %r)" % f.read32()
+ size = f.read32()
+ print " ('size', %r)" % size
+ offset = f.read32()
+ print " ('offset', %r)" % offset
+ print " ('alignment', %r)" % f.read32()
+ reloc_offset = f.read32()
+ print " ('reloc_offset', %r)" % reloc_offset
+ num_reloc = f.read32()
+ print " ('num_reloc', %r)" % num_reloc
+ print " ('flags', %#x)" % f.read32()
+ print " ('reserved1', %r)" % f.read32()
+ print " ('reserved2', %r)" % f.read32()
+ print " ),"
+
+ prev_pos = f.tell()
+
+ f.seek(reloc_offset)
+ print " ('_relocations', ["
+ for i in range(num_reloc):
+ print " # Relocation %r" % i
+ print " (('word-0', %#x)," % f.read32()
+ print " ('word-1', %#x))," % f.read32()
+ print " ])"
+
+ if opts.dumpSectionData:
+ f.seek(offset)
+ print " ('_section_data', %r)" % f.read(size)
+
+ f.seek(prev_pos)
+
+def main():
+ from optparse import OptionParser, OptionGroup
+ parser = OptionParser("usage: %prog [options] {files}")
+ parser.add_option("", "--dump-section-data", dest="dumpSectionData",
+ help="Dump the contents of sections",
+ action="store_true", default=False)
+ (opts, args) = parser.parse_args()
+
+ if not args:
+ args.append('-')
+
+ for arg in args:
+ dumpmacho(arg, opts)
+
+if __name__ == '__main__':
+ main()
diff --git a/test/TableGen/2003-08-03-PassCode.td b/test/TableGen/2003-08-03-PassCode.td
new file mode 100644
index 0000000..7142186
--- /dev/null
+++ b/test/TableGen/2003-08-03-PassCode.td
@@ -0,0 +1,7 @@
+// RUN: tblgen %s
+
+class test<code C> {
+ code Code = C;
+}
+
+def foo : test<[{ hello world! }]>;
diff --git a/test/TableGen/2006-09-18-LargeInt.td b/test/TableGen/2006-09-18-LargeInt.td
new file mode 100644
index 0000000..afd813f
--- /dev/null
+++ b/test/TableGen/2006-09-18-LargeInt.td
@@ -0,0 +1,5 @@
+// RUN: tblgen %s | grep -- 4294901760
+
+def X {
+ int Y = 0xFFFF0000;
+}
diff --git a/test/TableGen/AnonDefinitionOnDemand.td b/test/TableGen/AnonDefinitionOnDemand.td
new file mode 100644
index 0000000..d567fc8
--- /dev/null
+++ b/test/TableGen/AnonDefinitionOnDemand.td
@@ -0,0 +1,12 @@
+// RUN: tblgen < %s
+
+class foo<int X> { int THEVAL = X; }
+def foo_imp : foo<1>;
+
+def x {
+ foo Y = foo_imp; // This works.
+}
+
+def X {
+ foo Y = foo<1>; // This should work too, synthesizing a new foo<1>.
+}
diff --git a/test/TableGen/BitsInitOverflow.td b/test/TableGen/BitsInitOverflow.td
new file mode 100644
index 0000000..076b3f6f
--- /dev/null
+++ b/test/TableGen/BitsInitOverflow.td
@@ -0,0 +1,5 @@
+// RUN: not tblgen %s 2> /dev/null
+
+def {
+ bits<2> X = 5; // bitfield is too small, reject
+}
diff --git a/test/TableGen/CStyleComment.td b/test/TableGen/CStyleComment.td
new file mode 100644
index 0000000..703ae68
--- /dev/null
+++ b/test/TableGen/CStyleComment.td
@@ -0,0 +1,14 @@
+// Test that multiline, nested, comments work correctly.
+//
+// RUN: tblgen < %s
+
+/* Foo
+ bar
+ /*
+ blah
+ */
+
+ stuff
+ */
+
+def x;
diff --git a/test/TableGen/DagDefSubst.td b/test/TableGen/DagDefSubst.td
new file mode 100644
index 0000000..e5eebe99
--- /dev/null
+++ b/test/TableGen/DagDefSubst.td
@@ -0,0 +1,15 @@
+// RUN: tblgen %s | grep {dag d = (X Y)}
+// RUN: tblgen %s | grep {dag e = (Y X)}
+def X;
+
+class yclass;
+def Y : yclass;
+
+class C<yclass N> {
+ dag d = (X N);
+ dag e = (N X);
+}
+
+def VAL : C<Y>;
+
+
diff --git a/test/TableGen/DagIntSubst.td b/test/TableGen/DagIntSubst.td
new file mode 100644
index 0000000..3c1291c
--- /dev/null
+++ b/test/TableGen/DagIntSubst.td
@@ -0,0 +1,10 @@
+// RUN: tblgen %s | grep {dag d = (X 13)}
+def X;
+
+class C<int N> {
+ dag d = (X N);
+}
+
+def VAL : C<13>;
+
+
diff --git a/test/TableGen/DefmInherit.td b/test/TableGen/DefmInherit.td
new file mode 100644
index 0000000..4f37edf
--- /dev/null
+++ b/test/TableGen/DefmInherit.td
@@ -0,0 +1,32 @@
+// RUN: tblgen %s | grep {zing = 4} | count 4
+
+class C1<int A, string B> {
+ int bar = A;
+ string thestr = B;
+ int zing;
+}
+
+def T : C1<4, "blah">;
+
+multiclass t<int a> {
+ def S1 : C1<a, "foo"> {
+ int foo = 4;
+ let bar = 1;
+ }
+ def S2 : C1<a, "bar">;
+}
+
+multiclass s<int a> {
+ def S3 : C1<a, "moo"> {
+ int moo = 3;
+ let bar = 1;
+ }
+ def S4 : C1<a, "baz">;
+}
+
+defm FOO : t<42>, s<24>;
+
+def T4 : C1<6, "foo">;
+
+let zing = 4 in
+ defm BAZ : t<3>, s<4>;
diff --git a/test/TableGen/ForwardRef.td b/test/TableGen/ForwardRef.td
new file mode 100644
index 0000000..2056b1f
--- /dev/null
+++ b/test/TableGen/ForwardRef.td
@@ -0,0 +1,15 @@
+// RUN: tblgen %s -o -
+
+class bar {
+ list<bar> x;
+}
+
+class foo;
+class foo;
+
+class baz { list<foo> y; }
+
+class foo {
+
+}
+
diff --git a/test/TableGen/GeneralList.td b/test/TableGen/GeneralList.td
new file mode 100644
index 0000000..7f099f2
--- /dev/null
+++ b/test/TableGen/GeneralList.td
@@ -0,0 +1,8 @@
+// RUN: tblgen %s
+//
+// Test to make sure that lists work with any data-type
+
+class foo {
+ list<int> Test = [1, 2, 3];
+ list<string> Test2 = ["abc", "xyz", "gtq"];
+}
diff --git a/test/TableGen/Include.inc b/test/TableGen/Include.inc
new file mode 100644
index 0000000..876bf47
--- /dev/null
+++ b/test/TableGen/Include.inc
@@ -0,0 +1,4 @@
+// This is used by the Include.td test
+def InInclude;
+
+
diff --git a/test/TableGen/Include.td b/test/TableGen/Include.td
new file mode 100644
index 0000000..29ed515
--- /dev/null
+++ b/test/TableGen/Include.td
@@ -0,0 +1,7 @@
+// RUN: tblgen -I %p %s
+def BeforeInclude;
+
+include "Include.inc"
+
+def AfterInclude;
+
diff --git a/test/TableGen/IntBitInit.td b/test/TableGen/IntBitInit.td
new file mode 100644
index 0000000..b949bfe
--- /dev/null
+++ b/test/TableGen/IntBitInit.td
@@ -0,0 +1,5 @@
+// RUN: tblgen %s
+def {
+ bit A = 1;
+ int B = A;
+}
diff --git a/test/TableGen/LazyChange.td b/test/TableGen/LazyChange.td
new file mode 100644
index 0000000..145fd0b
--- /dev/null
+++ b/test/TableGen/LazyChange.td
@@ -0,0 +1,11 @@
+// RUN: tblgen %s | grep {int Y = 3}
+
+
+class C {
+ int X = 4;
+ int Y = X;
+}
+
+let X = 3 in
+def D : C; // Y should be 3 too!
+
diff --git a/test/TableGen/ListArgs.td b/test/TableGen/ListArgs.td
new file mode 100644
index 0000000..daa0de6
--- /dev/null
+++ b/test/TableGen/ListArgs.td
@@ -0,0 +1,11 @@
+// RUN: tblgen %s
+
+class B<list<int> v> {
+ list<int> vals = v;
+}
+
+class BB<list<list<int>> vals> : B<vals[0]>;
+class BBB<list<list<int>> vals> : BB<vals>;
+
+def OneB : BBB<[[1,2,3]]>;
+def TwoB : BBB<[[1,2,3],[4,5,6]]>;
diff --git a/test/TableGen/ListArgsSimple.td b/test/TableGen/ListArgsSimple.td
new file mode 100644
index 0000000..b3b2078
--- /dev/null
+++ b/test/TableGen/ListArgsSimple.td
@@ -0,0 +1,8 @@
+// RUN: tblgen %s
+
+class B<int v> {
+ int val = v;
+}
+
+class BB<list<int> vals> : B<vals[0]>;
+class BBB<list<int> vals> : BB<vals>;
diff --git a/test/TableGen/ListConversion.td b/test/TableGen/ListConversion.td
new file mode 100644
index 0000000..773ed6e
--- /dev/null
+++ b/test/TableGen/ListConversion.td
@@ -0,0 +1,10 @@
+// RUN: tblgen %s
+class A;
+class B : A;
+
+def b : B;
+
+def {
+ list<B> X = [b];
+ list<A> Y = X;
+}
diff --git a/test/TableGen/ListSlices.td b/test/TableGen/ListSlices.td
new file mode 100644
index 0000000..be794cf
--- /dev/null
+++ b/test/TableGen/ListSlices.td
@@ -0,0 +1,18 @@
+// RUN: tblgen %s
+
+def A {
+ list<int> B = [10, 20, 30, 4, 1, 1231, 20];
+}
+
+def B {
+ list<int> X = [10, 20, 30, 4, 1, 1231, 20] [2-4,2,2,0-6];
+
+ list<int> Y = X[4,5];
+ int Z = X[4];
+
+ list<int> C = A.B[1-4];
+
+ list<list<int>> AA = [X, Y];
+
+ int BB = AA[0][1];
+}
diff --git a/test/TableGen/MultiClass.td b/test/TableGen/MultiClass.td
new file mode 100644
index 0000000..52ba59c
--- /dev/null
+++ b/test/TableGen/MultiClass.td
@@ -0,0 +1,25 @@
+// RUN: tblgen %s | grep {zing = 4} | count 2
+
+class C1<int A, string B> {
+ int bar = A;
+ string thestr = B;
+ int zing;
+}
+
+def T : C1<4, "blah">;
+
+multiclass t<int a> {
+ def S1 : C1<a, "foo"> {
+ int foo = 4;
+ let bar = 1;
+ }
+ def S2 : C1<a, "bar">;
+}
+
+defm FOO : t<42>;
+
+def T4 : C1<6, "foo">;
+
+let zing = 4 in
+ defm BAZ : t<3>;
+
diff --git a/test/TableGen/MultiClassDefName.td b/test/TableGen/MultiClassDefName.td
new file mode 100644
index 0000000..2e71f7d
--- /dev/null
+++ b/test/TableGen/MultiClassDefName.td
@@ -0,0 +1,12 @@
+// RUN: tblgen %s | grep WorldHelloCC | count 1
+
+class C<string n> {
+ string name = n;
+}
+
+multiclass Names<string n, string m> {
+ def CC : C<n>;
+ def World#NAME#CC : C<m>;
+}
+
+defm Hello : Names<"hello", "world">;
diff --git a/test/TableGen/MultiClassInherit.td b/test/TableGen/MultiClassInherit.td
new file mode 100644
index 0000000..d4c4ce5
--- /dev/null
+++ b/test/TableGen/MultiClassInherit.td
@@ -0,0 +1,64 @@
+// RUN: tblgen %s | grep {zing = 4} | count 28
+
+class C1<int A, string B> {
+ int bar = A;
+ string thestr = B;
+ int zing;
+}
+
+def T : C1<4, "blah">;
+
+multiclass t1<int a1> {
+ def S1 : C1<a1, "foo"> {
+ int foo = 4;
+ let bar = 1;
+ }
+ def S2 : C1<a1, "bar">;
+}
+
+multiclass t2<int a2> {
+ def S3 : C1<a2, "foo"> {
+ int foo = 4;
+ let bar = 1;
+ }
+ def S4 : C1<a2, "bar">;
+}
+
+multiclass s1<int as1, int bs1> : t1<as1> {
+ def S5 : C1<bs1, "moo"> {
+ int moo = 3;
+ let bar = 1;
+ }
+ def S6 : C1<bs1, "baz">;
+}
+
+multiclass s2<int as2> : t1<as2>, t2<as2>;
+
+multiclass s3<int as3, int bs3> : t1<as3>, t2<as3> {
+ def S7 : C1<bs3, "moo"> {
+ int moo = 3;
+ let bar = 1;
+ }
+ def S8 : C1<bs3, "baz">;
+}
+
+let zing = 4 in
+defm FOO1 : s1<42, 24>;
+
+let zing = 4 in
+defm FOO2 : s2<99>;
+
+let zing = 4 in
+defm FOO3 : s3<84, 48>;
+
+def T4 : C1<6, "foo">;
+
+let zing = 4 in
+ defm BAZ1 : s1<3, 4>;
+
+let zing = 4 in
+ defm BAZ2 : s2<5>;
+
+let zing = 4 in
+ defm BAZ3 : s3<6, 7>;
+
diff --git a/test/TableGen/Slice.td b/test/TableGen/Slice.td
new file mode 100644
index 0000000..cd9c6da
--- /dev/null
+++ b/test/TableGen/Slice.td
@@ -0,0 +1,87 @@
+// RUN: tblgen %s | grep {\\\[(set} | count 2
+// RUN: tblgen %s | grep {\\\[\\\]} | count 2
+
+class ValueType<int size, int value> {
+ int Size = size;
+ int Value = value;
+}
+
+def f32 : ValueType<32, 1>; // 2 x i64 vector value
+
+class Intrinsic<string name> {
+ string Name = name;
+}
+
+class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
+ list<dag> pattern> {
+ bits<8> Opcode = opcode;
+ dag OutOperands = oopnds;
+ dag InOperands = iopnds;
+ string AssemblyString = asmstr;
+ list<dag> Pattern = pattern;
+}
+
+def ops;
+def outs;
+def ins;
+
+def set;
+
+// Define registers
+class Register<string n> {
+ string Name = n;
+}
+
+class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
+ list<ValueType> RegTypes = regTypes;
+ list<Register> MemberList = regList;
+}
+
+def XMM0: Register<"xmm0">;
+def XMM1: Register<"xmm1">;
+def XMM2: Register<"xmm2">;
+def XMM3: Register<"xmm3">;
+def XMM4: Register<"xmm4">;
+def XMM5: Register<"xmm5">;
+def XMM6: Register<"xmm6">;
+def XMM7: Register<"xmm7">;
+def XMM8: Register<"xmm8">;
+def XMM9: Register<"xmm9">;
+def XMM10: Register<"xmm10">;
+def XMM11: Register<"xmm11">;
+def XMM12: Register<"xmm12">;
+def XMM13: Register<"xmm13">;
+def XMM14: Register<"xmm14">;
+def XMM15: Register<"xmm15">;
+
+def FR32 : RegisterClass<[f32],
+ [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
+ XMM8, XMM9, XMM10, XMM11,
+ XMM12, XMM13, XMM14, XMM15]>;
+
+class SDNode {}
+def not : SDNode;
+
+multiclass scalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> {
+ def SSrr : Inst<opcode, (outs FR32:$dst), (ins FR32:$src),
+ !strconcat(asmstr, "\t$dst, $src"),
+ !if(!null(patterns),[]<dag>,patterns[0])>;
+ def SSrm : Inst<opcode, (outs FR32:$dst), (ins FR32:$src),
+ !strconcat(asmstr, "\t$dst, $src"),
+ !if(!null(patterns),[]<dag>,!if(!null(!cdr(patterns)),patterns[0],patterns[1]))>;
+}
+
+multiclass vscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> {
+ def V#NAME#SSrr : Inst<opcode, (outs FR32:$dst), (ins FR32:$src),
+ !strconcat(asmstr, "\t$dst, $src"),
+ !if(!null(patterns),[]<dag>,patterns[0])>;
+ def V#NAME#SSrm : Inst<opcode, (outs FR32:$dst), (ins FR32:$src),
+ !strconcat(asmstr, "\t$dst, $src"),
+ !if(!null(patterns),[]<dag>,!if(!null(!cdr(patterns)),patterns[0],patterns[1]))>;
+}
+
+multiclass myscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> :
+ scalar<opcode, asmstr, patterns>,
+ vscalar<opcode, asmstr, patterns>;
+
+defm NOT : myscalar<0x10, "not", [[], [(set FR32:$dst, (f32 (not FR32:$src)))]]>;
diff --git a/test/TableGen/String.td b/test/TableGen/String.td
new file mode 100644
index 0000000..d2ae451
--- /dev/null
+++ b/test/TableGen/String.td
@@ -0,0 +1,5 @@
+// RUN: tblgen %s
+class x {
+ string y = "missing terminating '\"' character";
+}
+
diff --git a/test/TableGen/SuperSubclassSameName.td b/test/TableGen/SuperSubclassSameName.td
new file mode 100644
index 0000000..087df87
--- /dev/null
+++ b/test/TableGen/SuperSubclassSameName.td
@@ -0,0 +1,20 @@
+// RUN: tblgen < %s
+// Test for template arguments that have the same name as superclass template
+// arguments.
+
+
+class Arg { int a; }
+def TheArg : Arg { let a = 1; }
+
+
+class Super<Arg F> {
+ int X = F.a;
+}
+class Sub<Arg F> : Super<F>;
+def inst : Sub<TheArg>;
+
+
+class Super2<int F> {
+ int X = F;
+}
+class Sub2<int F> : Super2<F>;
diff --git a/test/TableGen/TargetInstrInfo.td b/test/TableGen/TargetInstrInfo.td
new file mode 100644
index 0000000..8299541
--- /dev/null
+++ b/test/TableGen/TargetInstrInfo.td
@@ -0,0 +1,148 @@
+// This test describes how we eventually want to describe instructions in
+// the target independent code generators.
+// RUN: tblgen %s
+
+// Target indep stuff.
+class Instruction { // Would have other stuff eventually
+ bit isTwoAddress = 0;
+ string AssemblyString;
+}
+class RegisterClass;
+
+class RTLNode;
+
+def ops; // Marker for operand list.
+
+// Various expressions used in RTL descriptions.
+def imm8 : RTLNode;
+def imm32 : RTLNode;
+def addr : RTLNode;
+
+def set : RTLNode;
+def signext : RTLNode;
+def zeroext : RTLNode;
+def plus : RTLNode;
+def and : RTLNode;
+def xor : RTLNode;
+def shl : RTLNode;
+def load : RTLNode;
+def store : RTLNode;
+def unspec : RTLNode;
+
+// Start of X86 specific stuff.
+
+def R8 : RegisterClass;
+def R16 : RegisterClass;
+def R32 : RegisterClass;
+
+def CL; // As are currently defined
+def AL;
+def AX;
+def EDX;
+
+class Format<bits<5> val> {
+ bits<5> Value = val;
+}
+
+def Pseudo : Format<0>; def RawFrm : Format<1>;
+def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
+def MRMDestMem : Format<4>; def MRMSrcReg : Format<5>;
+def MRMSrcMem : Format<6>;
+def MRM0r : Format<16>; def MRM1r : Format<17>; def MRM2r : Format<18>;
+def MRM3r : Format<19>; def MRM4r : Format<20>; def MRM5r : Format<21>;
+def MRM6r : Format<22>; def MRM7r : Format<23>;
+def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
+def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
+def MRM6m : Format<30>; def MRM7m : Format<31>;
+
+
+class Inst<dag opnds, string asmstr, bits<8> opcode,
+ Format f, list<dag> rtl> : Instruction {
+ dag Operands = opnds;
+ string AssemblyString = asmstr;
+ bits<8> Opcode = opcode;
+ Format Format = f;
+ list<dag> RTL = rtl;
+}
+
+
+// Start of instruction definitions, the real point of this file.
+//
+// Note that these patterns show a couple of important things:
+// 1. The order and contents of the operands of the MachineInstr are
+// described here. Eventually we can do away with this when everything
+// is generated from the description.
+// 2. The asm string is captured here, which makes it possible to get rid of
+// a ton of hacks in the various printers and a bunch of flags.
+// 3. Target specific properties (e.g. Format) can still be captured as
+// needed.
+// 4. We capture the behavior of the instruction with a simplified RTL-like
+// expression.
+// 5. The use/def properties for each operand are automatically inferred from
+// the pattern.
+// 6. Address expressions should become first-class entities.
+
+// Simple copy instruction. isMoveInstr could easily be inferred from this,
+// as could TargetRegisterInfo::copyRegToReg.
+def MOV8rr : Inst<(ops R8:$dst, R8:$src),
+ "mov $dst, $src", 0x88, MRMDestReg,
+ [(set R8:$dst, R8:$src)]>;
+
+// Simple immediate initialization.
+def MOV8ri : Inst<(ops R8:$dst, imm8:$src),
+ "mov $dst, $src", 0xB0, AddRegFrm,
+ [(set R8:$dst, imm8:$src)]>;
+
+// Two address instructions are described as three-addr instructions, with
+// the special target-independent isTwoAddress flag set. The asm pattern
+// should not refer to the $src1, this would be enforced by the
+// TargetInstrInfo tablegen backend.
+let isTwoAddress = 1 in
+def AND8rr : Inst<(ops R8:$dst, R8:$src1, R8:$src2),
+ "and $dst, $src2", 0x20, MRMDestReg,
+ [(set R8:$dst, (and R8:$src1, R8:$src2))]>;
+
+// Instructions that have explicit uses/defs make them explicit in the RTL.
+// Instructions that need extra stuff emitted in the assembly can, trivially.
+let isTwoAddress = 1 in
+def SHL32rCL : Inst<(ops R32:$dst, R32:$src),
+ "shl $dst, CL", 0xD2, MRM4r,
+ [(set R32:$dst, (shl R32:$src, CL))]>;
+
+// The RTL list is a list, allowing complex instructions to be defined easily.
+// Temporary 'internal' registers can be used to break instructions appart.
+let isTwoAddress = 1 in
+def XOR32mi : Inst<(ops addr:$addr, imm32:$imm),
+ "xor $dst, $src2", 0x81, MRM6m,
+ [(set R32:$tmp1, (load addr:$addr)),
+ (set R32:$tmp2, (xor R32:$tmp1, imm32:$imm)),
+ (store addr:$addr, R32:$tmp2)]>;
+
+// Alternatively, if each tmporary register is only used once, the instruction
+// can just be described in nested form. This would be the canonical
+// representation the target generator would convert the above into. Pick your
+// favorite indentation scheme.
+let isTwoAddress = 1 in
+def AND32mr : Inst<(ops addr:$addr, R32:$src),
+ "xor $dst, $src2", 0x81, MRM6m,
+ [(store addr:$addr,
+ (and
+ (load addr:$addr),
+ R32:$src)
+ )
+ ]>;
+
+// Describing complex instructions is not too hard! Note how implicit uses/defs
+// become explicit here.
+def CBW : Inst<(ops),
+ "cbw", 0x98, RawFrm,
+ [(set AX, (signext AL))]>;
+
+// Noop, does nothing.
+def NOOP : Inst<(ops), "nop", 0x90, RawFrm, []>;
+
+
+// Instructions that don't expect optimization can use unspec.
+def IN8rr : Inst<(ops), "in AL, EDX", 0xEC, RawFrm,
+ [(set AL, (unspec EDX))]>;
+
diff --git a/test/TableGen/TargetInstrSpec.td b/test/TableGen/TargetInstrSpec.td
new file mode 100644
index 0000000..7c3dd57
--- /dev/null
+++ b/test/TableGen/TargetInstrSpec.td
@@ -0,0 +1,97 @@
+// RUN: tblgen %s | grep {\\\[(set VR128:\$dst, (int_x86_sse2_add_pd VR128:\$src1, VR128:\$src2))\\\]} | count 1
+// RUN: tblgen %s | grep {\\\[(set VR128:\$dst, (int_x86_sse2_add_ps VR128:\$src1, VR128:\$src2))\\\]} | count 1
+
+class ValueType<int size, int value> {
+ int Size = size;
+ int Value = value;
+}
+
+def v2i64 : ValueType<128, 22>; // 2 x i64 vector value
+def v2f64 : ValueType<128, 28>; // 2 x f64 vector value
+
+class Intrinsic<string name> {
+ string Name = name;
+}
+
+class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
+ list<dag> pattern> {
+ bits<8> Opcode = opcode;
+ dag OutOperands = oopnds;
+ dag InOperands = iopnds;
+ string AssemblyString = asmstr;
+ list<dag> Pattern = pattern;
+}
+
+def ops;
+def outs;
+def ins;
+
+def set;
+
+// Define registers
+class Register<string n> {
+ string Name = n;
+}
+
+class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
+ list<ValueType> RegTypes = regTypes;
+ list<Register> MemberList = regList;
+}
+
+def XMM0: Register<"xmm0">;
+def XMM1: Register<"xmm1">;
+def XMM2: Register<"xmm2">;
+def XMM3: Register<"xmm3">;
+def XMM4: Register<"xmm4">;
+def XMM5: Register<"xmm5">;
+def XMM6: Register<"xmm6">;
+def XMM7: Register<"xmm7">;
+def XMM8: Register<"xmm8">;
+def XMM9: Register<"xmm9">;
+def XMM10: Register<"xmm10">;
+def XMM11: Register<"xmm11">;
+def XMM12: Register<"xmm12">;
+def XMM13: Register<"xmm13">;
+def XMM14: Register<"xmm14">;
+def XMM15: Register<"xmm15">;
+
+def VR128 : RegisterClass<[v2i64, v2f64],
+ [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
+ XMM8, XMM9, XMM10, XMM11,
+ XMM12, XMM13, XMM14, XMM15]>;
+
+// Dummy for subst
+def REGCLASS : RegisterClass<[], []>;
+
+class decls {
+ // Dummy for foreach
+ dag pattern;
+ int operand;
+}
+
+def Decls : decls;
+
+// Define intrinsics
+def int_x86_sse2_add_ps : Intrinsic<"addps">;
+def int_x86_sse2_add_pd : Intrinsic<"addpd">;
+def INTRINSIC : Intrinsic<"Dummy">;
+
+multiclass arith<bits<8> opcode, string asmstr, string intr, list<dag> patterns> {
+ def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
+ !strconcat(asmstr, "\t$dst, $src1, $src2"),
+ !foreach(Decls.pattern, patterns,
+ !foreach(Decls.operand, Decls.pattern,
+ !subst(INTRINSIC, !cast<Intrinsic>(!subst("SUFFIX", "_ps", intr)),
+ !subst(REGCLASS, VR128, Decls.operand))))>;
+
+ def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
+ !strconcat(asmstr, "\t$dst, $src1, $src2"),
+ !foreach(Decls.pattern, patterns,
+ !foreach(Decls.operand, Decls.pattern,
+ !subst(INTRINSIC, !cast<Intrinsic>(!subst("SUFFIX", "_pd", intr)),
+ !subst(REGCLASS, VR128, Decls.operand))))>;
+}
+
+defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX",
+ [(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))]>;
+
diff --git a/test/TableGen/TemplateArgRename.td b/test/TableGen/TemplateArgRename.td
new file mode 100644
index 0000000..535c2e4
--- /dev/null
+++ b/test/TableGen/TemplateArgRename.td
@@ -0,0 +1,17 @@
+// RUN: tblgen %s
+
+// Make sure there is no collision between XX and XX.
+def S;
+
+class Before<int XX>;
+class After : Before<4> {
+ dag XX = (S);
+}
+
+
+
+class C1<int X> {
+ int Y = X;
+}
+class C2<int Y, dag X> : C1<Y>;
+
diff --git a/test/TableGen/Tree.td b/test/TableGen/Tree.td
new file mode 100644
index 0000000..f9f1f15
--- /dev/null
+++ b/test/TableGen/Tree.td
@@ -0,0 +1,18 @@
+// This tests to make sure we can parse tree patterns.
+// RUN: tblgen %s
+
+class TreeNode;
+class RegisterClass;
+
+def set : TreeNode;
+def plus : TreeNode;
+def imm : TreeNode;
+def R32 : RegisterClass;
+
+class Inst<dag T> {
+ dag Pattern = T;
+}
+
+def ADDrr32 : Inst<(set R32, (plus R32, R32))>; // a = b + c
+def ADDri32 : Inst<(set R32, (plus R32, imm))>; // a = b + imm
+
diff --git a/test/TableGen/TreeNames.td b/test/TableGen/TreeNames.td
new file mode 100644
index 0000000..05a3298
--- /dev/null
+++ b/test/TableGen/TreeNames.td
@@ -0,0 +1,17 @@
+// This tests to make sure we can parse tree patterns with names.
+// RUN: tblgen %s
+
+class TreeNode;
+class RegisterClass;
+
+def set : TreeNode;
+def plus : TreeNode;
+def imm : TreeNode;
+def R32 : RegisterClass;
+
+class Inst<dag T> {
+ dag Pattern = T;
+}
+
+def ADDrr32 : Inst<(set R32, (plus R32:$A, R32:$def))>;
+
diff --git a/test/TableGen/UnsetBitInit.td b/test/TableGen/UnsetBitInit.td
new file mode 100644
index 0000000..91342ec
--- /dev/null
+++ b/test/TableGen/UnsetBitInit.td
@@ -0,0 +1,10 @@
+// RUN: tblgen %s
+class x {
+ field bits<32> A;
+}
+
+class y<bits<2> B> : x {
+ let A{21-20} = B;
+}
+
+def z : y<{0,?}>;
diff --git a/test/TableGen/UnterminatedComment.td b/test/TableGen/UnterminatedComment.td
new file mode 100644
index 0000000..158cede
--- /dev/null
+++ b/test/TableGen/UnterminatedComment.td
@@ -0,0 +1,6 @@
+// RUN: not tblgen < %s >& /dev/null
+
+def x;
+
+/* /* /* */
+
diff --git a/test/TableGen/cast.td b/test/TableGen/cast.td
new file mode 100644
index 0000000..4a771ae
--- /dev/null
+++ b/test/TableGen/cast.td
@@ -0,0 +1,90 @@
+// RUN: tblgen %s | grep {add_ps} | count 3
+
+class ValueType<int size, int value> {
+ int Size = size;
+ int Value = value;
+}
+
+def v2i64 : ValueType<128, 22>; // 2 x i64 vector value
+def v2f64 : ValueType<128, 28>; // 2 x f64 vector value
+
+class Intrinsic<string name> {
+ string Name = name;
+}
+
+class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
+ list<dag> pattern> {
+ bits<8> Opcode = opcode;
+ dag OutOperands = oopnds;
+ dag InOperands = iopnds;
+ string AssemblyString = asmstr;
+ list<dag> Pattern = pattern;
+}
+
+def ops;
+def outs;
+def ins;
+
+def set;
+
+// Define registers
+class Register<string n> {
+ string Name = n;
+}
+
+class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
+ list<ValueType> RegTypes = regTypes;
+ list<Register> MemberList = regList;
+}
+
+def XMM0: Register<"xmm0">;
+def XMM1: Register<"xmm1">;
+def XMM2: Register<"xmm2">;
+def XMM3: Register<"xmm3">;
+def XMM4: Register<"xmm4">;
+def XMM5: Register<"xmm5">;
+def XMM6: Register<"xmm6">;
+def XMM7: Register<"xmm7">;
+def XMM8: Register<"xmm8">;
+def XMM9: Register<"xmm9">;
+def XMM10: Register<"xmm10">;
+def XMM11: Register<"xmm11">;
+def XMM12: Register<"xmm12">;
+def XMM13: Register<"xmm13">;
+def XMM14: Register<"xmm14">;
+def XMM15: Register<"xmm15">;
+
+def VR128 : RegisterClass<[v2i64, v2f64],
+ [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
+ XMM8, XMM9, XMM10, XMM11,
+ XMM12, XMM13, XMM14, XMM15]>;
+
+// Define intrinsics
+def int_x86_sse2_add_ps : Intrinsic<"addps">;
+def int_x86_sse2_add_pd : Intrinsic<"addpd">;
+
+multiclass arith<bits<8> opcode, string asmstr, string Intr> {
+ def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
+ !strconcat(asmstr, "\t$dst, $src1, $src2"),
+ [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_ps")) VR128:$src1, VR128:$src2))]>;
+
+ def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
+ !strconcat(asmstr, "\t$dst, $src1, $src2"),
+ [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_pd")) VR128:$src1, VR128:$src2))]>;
+}
+
+defm ADD : arith<0x58, "add", "int_x86_sse2_add">;
+
+class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> :
+ Inst<opcode,(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
+ !strconcat(asmstr, "\t$dst, $src1, $src2"),
+ [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>;
+
+
+multiclass arith_int<bits<8> opcode, string asmstr, string Intr> {
+ def PS_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_ps"))>;
+
+ def PD_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_pd"))>;
+}
+
+defm ADD : arith_int<0x58, "add", "int_x86_sse2_add">;
diff --git a/test/TableGen/dg.exp b/test/TableGen/dg.exp
new file mode 100644
index 0000000..f7d275a
--- /dev/null
+++ b/test/TableGen/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{td}]]
diff --git a/test/TableGen/eq.td b/test/TableGen/eq.td
new file mode 100644
index 0000000..8ba6d7e
--- /dev/null
+++ b/test/TableGen/eq.td
@@ -0,0 +1,13 @@
+// RUN: tblgen %s | FileCheck %s
+// CHECK: Value = 0
+// CHECK: Value = 1
+
+class Base<int V> {
+ int Value = V;
+}
+
+class Derived<string Truth> :
+ Base<!if(!eq(Truth, "true"), 1, 0)>;
+
+def TRUE : Derived<"true">;
+def FALSE : Derived<"false">;
diff --git a/test/TableGen/foreach.td b/test/TableGen/foreach.td
new file mode 100644
index 0000000..acce449
--- /dev/null
+++ b/test/TableGen/foreach.td
@@ -0,0 +1,31 @@
+// RUN: tblgen %s | grep {Jr} | count 2
+// RUN: tblgen %s | grep {Sr} | count 2
+// RUN: tblgen %s | grep {NAME} | count 1
+
+// Variables for foreach
+class decls {
+ string name;
+}
+
+def Decls : decls;
+
+class A<list<string> names> {
+ list<string> Names = names;
+}
+
+class B<list<string> names> : A<!foreach(Decls.name, names, !strconcat(Decls.name, ", Sr."))>;
+
+class C<list<string> names> : A<!foreach(Decls.name, names, !strconcat(Decls.name, ", Jr."))>;
+
+class D<list<string> names> : A<!foreach(Decls.name, names, !subst("NAME", "John Smith", Decls.name))>;
+
+class Names {
+ list<string> values = ["Ken Griffey", "Seymour Cray"];
+}
+
+def People : Names;
+
+def Seniors : B<People.values>;
+def Juniors : C<People.values>;
+def Smiths : D<["NAME", "Jane Smith"]>;
+def Unprocessed : D<People.values>;
diff --git a/test/TableGen/if.td b/test/TableGen/if.td
new file mode 100644
index 0000000..9b24382
--- /dev/null
+++ b/test/TableGen/if.td
@@ -0,0 +1,20 @@
+// RUN: tblgen %s | grep {\\\[1, 2, 3\\\]} | count 4
+// RUN: tblgen %s | grep {\\\[4, 5, 6\\\]} | count 2
+
+class A<list<list<int>> vals> {
+ list<int> first = vals[0];
+ list<int> rest = !if(!null(!cdr(vals)), vals[0], vals[1]);
+}
+
+def One : A<[[1,2,3]]>;
+def Two : A<[[1,2,3],[4,5,6]]>;
+
+class B<list<int> v> {
+ list<int> vals = v;
+}
+
+class BB<list<list<int>> vals> : B<!if(!null(!cdr(vals)), vals[0], vals[1])>;
+class BBB<list<list<int>> vals> : BB<vals>;
+
+def OneB : BBB<[[1,2,3]]>;
+def TwoB : BBB<[[1,2,3],[4,5,6]]>;
diff --git a/test/TableGen/lisp.td b/test/TableGen/lisp.td
new file mode 100644
index 0000000..3e392fd
--- /dev/null
+++ b/test/TableGen/lisp.td
@@ -0,0 +1,21 @@
+// RUN: tblgen %s | grep {}
+
+class List<list<string> n> {
+ list<string> names = n;
+}
+
+class CAR<string e> {
+ string element = e;
+}
+
+class CDR<list<string> r, int n> {
+ list<string> rest = r;
+ int null = n;
+}
+
+class NameList<list<string> Names> :
+ List<Names>, CAR<!car(Names)>, CDR<!cdr(Names), !null(!cdr(Names))>;
+
+def Three : NameList<["Tom", "Dick", "Harry"]>;
+
+def One : NameList<["Jeffrey Sinclair"]>;
diff --git a/test/TableGen/nameconcat.td b/test/TableGen/nameconcat.td
new file mode 100644
index 0000000..fc865f9
--- /dev/null
+++ b/test/TableGen/nameconcat.td
@@ -0,0 +1,90 @@
+// RUN: tblgen %s | grep {add_ps} | count 3
+
+class ValueType<int size, int value> {
+ int Size = size;
+ int Value = value;
+}
+
+def v2i64 : ValueType<128, 22>; // 2 x i64 vector value
+def v2f64 : ValueType<128, 28>; // 2 x f64 vector value
+
+class Intrinsic<string name> {
+ string Name = name;
+}
+
+class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
+ list<dag> pattern> {
+ bits<8> Opcode = opcode;
+ dag OutOperands = oopnds;
+ dag InOperands = iopnds;
+ string AssemblyString = asmstr;
+ list<dag> Pattern = pattern;
+}
+
+def ops;
+def outs;
+def ins;
+
+def set;
+
+// Define registers
+class Register<string n> {
+ string Name = n;
+}
+
+class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
+ list<ValueType> RegTypes = regTypes;
+ list<Register> MemberList = regList;
+}
+
+def XMM0: Register<"xmm0">;
+def XMM1: Register<"xmm1">;
+def XMM2: Register<"xmm2">;
+def XMM3: Register<"xmm3">;
+def XMM4: Register<"xmm4">;
+def XMM5: Register<"xmm5">;
+def XMM6: Register<"xmm6">;
+def XMM7: Register<"xmm7">;
+def XMM8: Register<"xmm8">;
+def XMM9: Register<"xmm9">;
+def XMM10: Register<"xmm10">;
+def XMM11: Register<"xmm11">;
+def XMM12: Register<"xmm12">;
+def XMM13: Register<"xmm13">;
+def XMM14: Register<"xmm14">;
+def XMM15: Register<"xmm15">;
+
+def VR128 : RegisterClass<[v2i64, v2f64],
+ [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
+ XMM8, XMM9, XMM10, XMM11,
+ XMM12, XMM13, XMM14, XMM15]>;
+
+// Define intrinsics
+def int_x86_sse2_add_ps : Intrinsic<"addps">;
+def int_x86_sse2_add_pd : Intrinsic<"addpd">;
+
+multiclass arith<bits<8> opcode, string asmstr, string Intr> {
+ def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
+ !strconcat(asmstr, "\t$dst, $src1, $src2"),
+ [(set VR128:$dst, (!nameconcat<Intrinsic>(Intr, "_ps") VR128:$src1, VR128:$src2))]>;
+
+ def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
+ !strconcat(asmstr, "\t$dst, $src1, $src2"),
+ [(set VR128:$dst, (!nameconcat<Intrinsic>(Intr, "_pd") VR128:$src1, VR128:$src2))]>;
+}
+
+defm ADD : arith<0x58, "add", "int_x86_sse2_add">;
+
+class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> :
+ Inst<opcode,(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
+ !strconcat(asmstr, "\t$dst, $src1, $src2"),
+ [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>;
+
+
+multiclass arith_int<bits<8> opcode, string asmstr, string Intr> {
+ def PS_Int : IntInst<opcode, asmstr, !nameconcat<Intrinsic>(Intr, "_ps")>;
+
+ def PD_Int : IntInst<opcode, asmstr, !nameconcat<Intrinsic>(Intr, "_pd")>;
+}
+
+defm ADD : arith_int<0x58, "add", "int_x86_sse2_add">;
diff --git a/test/TableGen/nested-comment.td b/test/TableGen/nested-comment.td
new file mode 100644
index 0000000..68e2958
--- /dev/null
+++ b/test/TableGen/nested-comment.td
@@ -0,0 +1,12 @@
+// RUN: tblgen < %s
+
+/* foo
+
+/ foo
+
+ /*NoReg*/, baz
+
+
+ */
+
+def X;
diff --git a/test/TableGen/strconcat.td b/test/TableGen/strconcat.td
new file mode 100644
index 0000000..fc0d8059
--- /dev/null
+++ b/test/TableGen/strconcat.td
@@ -0,0 +1,10 @@
+// RUN: tblgen %s | grep fufoo
+
+class Y<string S> {
+ string T = !strconcat(S, "foo");
+
+ // String values concatenate lexically, as in C.
+ string S = "foo" "bar";
+}
+
+def Z : Y<"fu">;
diff --git a/test/TableGen/subst.td b/test/TableGen/subst.td
new file mode 100644
index 0000000..ce9f45d
--- /dev/null
+++ b/test/TableGen/subst.td
@@ -0,0 +1,29 @@
+// RUN: tblgen %s | grep {Smith} | count 7
+// RUN: tblgen %s | grep {Johnson} | count 2
+// RUN: tblgen %s | grep {FIRST} | count 1
+// RUN: tblgen %s | grep {LAST} | count 1
+// RUN: tblgen %s | grep {TVAR} | count 2
+// RUN: tblgen %s | grep {Bogus} | count 1
+
+class Honorific<string t> {
+ string honorific = t;
+}
+
+def Mr : Honorific<"Mr.">;
+def Ms : Honorific<"Ms.">;
+def Mrs : Honorific<"Mrs.">;
+def TVAR : Honorific<"Bogus">;
+
+class Name<string n, Honorific t> {
+ string name = n;
+ Honorific honorific = t;
+}
+
+class AName<string name, Honorific honorific> :
+ Name<!subst("FIRST", "John", !subst("LAST", "Smith", name)),
+ !subst(TVAR, Mr, honorific)>;
+
+def JohnSmith : AName<"FIRST LAST", TVAR>;
+def JaneSmith : AName<"Jane LAST", Ms>;
+def JohnSmithJones : AName<"FIRST LAST-Jones", Mr>;
+def JimmyJohnson : AName<"Jimmy Johnson", Mr>;
diff --git a/test/TableGen/subst2.td b/test/TableGen/subst2.td
new file mode 100644
index 0000000..3366c9d
--- /dev/null
+++ b/test/TableGen/subst2.td
@@ -0,0 +1,15 @@
+// RUN: tblgen %s | FileCheck %s
+// CHECK: No subst
+// CHECK: No foo
+// CHECK: RECURSE foo
+
+class Recurse<string t> {
+ string Text = t;
+}
+
+class Text<string text> :
+ Recurse<!subst("RECURSE", "RECURSE", !subst("NORECURSE", "foo", text))>;
+
+def Ok1 : Text<"No subst">;
+def Ok2 : Text<"No NORECURSE">;
+def Trouble : Text<"RECURSE NORECURSE">;
diff --git a/test/TestRunner.sh b/test/TestRunner.sh
new file mode 100755
index 0000000..4f04d81
--- /dev/null
+++ b/test/TestRunner.sh
@@ -0,0 +1,36 @@
+#!/bin/sh
+#
+# TestRunner.sh - This script is used to run the deja-gnu tests exactly like
+# deja-gnu does, by executing the Tcl script specified in the test case's
+# RUN: lines. This is made possible by a simple make target supported by the
+# test/Makefile. All this script does is invoke that make target.
+#
+# Usage:
+# TestRunner.sh {script_names}
+#
+# This script is typically used by cd'ing to a test directory and then
+# running TestRunner.sh with a list of test file names you want to run.
+#
+TESTPATH=`pwd`
+SUBDIR=""
+if test `dirname $1` = "." ; then
+ while test `basename $TESTPATH` != "test" -a ! -z "$TESTPATH" ; do
+ tmp=`basename $TESTPATH`
+ SUBDIR="$tmp/$SUBDIR"
+ TESTPATH=`dirname $TESTPATH`
+ done
+fi
+
+for TESTFILE in "$@" ; do
+ if test `dirname $TESTFILE` = . ; then
+ if test -d "$TESTPATH" ; then
+ cd $TESTPATH
+ make check-one TESTONE="$SUBDIR$TESTFILE"
+ cd $PWD
+ else
+ echo "Can't find llvm/test directory in " `pwd`
+ fi
+ else
+ make check-one TESTONE=$TESTFILE
+ fi
+done
diff --git a/test/Transforms/ABCD/basic.ll b/test/Transforms/ABCD/basic.ll
new file mode 100644
index 0000000..f2ce1b9
--- /dev/null
+++ b/test/Transforms/ABCD/basic.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -abcd -S | FileCheck %s
+
+define void @test() {
+; CHECK: @test
+; CHECK-NOT: br i1 %tmp95
+; CHECK: ret void
+entry:
+ br label %bb19
+
+bb:
+ br label %bb1
+
+bb1:
+ %tmp7 = icmp sgt i32 %tmp94, 1
+ br i1 %tmp7, label %bb.i.i, label %return
+
+bb.i.i:
+ br label %return
+
+bb19:
+ %tmp94 = ashr i32 undef, 3
+ %tmp95 = icmp sgt i32 %tmp94, 16
+ br i1 %tmp95, label %bb, label %return
+
+return:
+ ret void
+}
diff --git a/test/Transforms/ABCD/dg.exp b/test/Transforms/ABCD/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/ABCD/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/ADCE/2002-01-31-UseStuckAround.ll b/test/Transforms/ADCE/2002-01-31-UseStuckAround.ll
new file mode 100644
index 0000000..43462fa
--- /dev/null
+++ b/test/Transforms/ADCE/2002-01-31-UseStuckAround.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -adce
+
+define i32 @"main"(i32 %argc)
+begin
+ br label %2
+
+ %retval = phi i32 [ %argc, %2 ] ; <i32> [#uses=2]
+ %two = add i32 %retval, %retval ; <i32> [#uses=1]
+ ret i32 %two
+
+ br label %1
+end
+
diff --git a/test/Transforms/ADCE/2002-05-22-PHITest.ll b/test/Transforms/ADCE/2002-05-22-PHITest.ll
new file mode 100644
index 0000000..0095be1
--- /dev/null
+++ b/test/Transforms/ADCE/2002-05-22-PHITest.ll
@@ -0,0 +1,16 @@
+; It is illegal to remove BB1 because it will mess up the PHI node!
+;
+; RUN: opt < %s -adce -S | grep BB1
+
+define i32 @test(i1 %C, i32 %A, i32 %B) {
+; <label>:0
+ br i1 %C, label %BB1, label %BB2
+
+BB1: ; preds = %0
+ br label %BB2
+
+BB2: ; preds = %BB1, %0
+ %R = phi i32 [ %A, %0 ], [ %B, %BB1 ] ; <i32> [#uses=1]
+ ret i32 %R
+}
+
diff --git a/test/Transforms/ADCE/2002-05-23-ZeroArgPHITest.ll b/test/Transforms/ADCE/2002-05-23-ZeroArgPHITest.ll
new file mode 100644
index 0000000..9407b5a
--- /dev/null
+++ b/test/Transforms/ADCE/2002-05-23-ZeroArgPHITest.ll
@@ -0,0 +1,32 @@
+; This testcase contains a entire loop that should be removed. The only thing
+; left is the store instruction in BB0. The problem this testcase was running
+; into was that when the reg109 PHI was getting zero predecessors, it was
+; removed even though there were uses still around. Now the uses are filled
+; in with a dummy value before the PHI is deleted.
+;
+; RUN: opt < %s -adce
+
+ %node_t = type { double*, %node_t*, %node_t**, double**, double*, i32, i32 }
+
+define void @localize_local(%node_t* %nodelist) {
+bb0:
+ %nodelist.upgrd.1 = alloca %node_t* ; <%node_t**> [#uses=2]
+ store %node_t* %nodelist, %node_t** %nodelist.upgrd.1
+ br label %bb1
+
+bb1: ; preds = %bb0
+ %reg107 = load %node_t** %nodelist.upgrd.1 ; <%node_t*> [#uses=2]
+ %cond211 = icmp eq %node_t* %reg107, null ; <i1> [#uses=1]
+ br i1 %cond211, label %bb3, label %bb2
+
+bb2: ; preds = %bb2, %bb1
+ %reg109 = phi %node_t* [ %reg110, %bb2 ], [ %reg107, %bb1 ] ; <%node_t*> [#uses=1]
+ %reg212 = getelementptr %node_t* %reg109, i64 0, i32 1 ; <%node_t**> [#uses=1]
+ %reg110 = load %node_t** %reg212 ; <%node_t*> [#uses=2]
+ %cond213 = icmp ne %node_t* %reg110, null ; <i1> [#uses=1]
+ br i1 %cond213, label %bb2, label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ ret void
+}
+
diff --git a/test/Transforms/ADCE/2002-05-28-Crash-distilled.ll b/test/Transforms/ADCE/2002-05-28-Crash-distilled.ll
new file mode 100644
index 0000000..337be9f
--- /dev/null
+++ b/test/Transforms/ADCE/2002-05-28-Crash-distilled.ll
@@ -0,0 +1,17 @@
+; This testcase is a distilled form of: 2002-05-28-Crash.ll
+
+; RUN: opt < %s -adce
+
+define float @test(i32 %i) {
+ %F = sitofp i32 %i to float ; <float> [#uses=1]
+ %I = bitcast i32 %i to i32 ; <i32> [#uses=1]
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %B = icmp ne i32 %I, 0 ; <i1> [#uses=1]
+ br i1 %B, label %Out, label %Loop
+
+Out: ; preds = %Loop
+ ret float %F
+}
+
diff --git a/test/Transforms/ADCE/2002-05-28-Crash.ll b/test/Transforms/ADCE/2002-05-28-Crash.ll
new file mode 100644
index 0000000..9bbbd05
--- /dev/null
+++ b/test/Transforms/ADCE/2002-05-28-Crash.ll
@@ -0,0 +1,54 @@
+; This testcase is distilled from the GNU rx package. The loop should be
+; removed but causes a problem when ADCE does. The source function is:
+; int rx_bitset_empty (int size, rx_Bitset set) {
+; int x;
+; RX_subset s;
+; s = set[0];
+; set[0] = 1;
+; for (x = rx_bitset_numb_subsets(size) - 1; !set[x]; --x)
+; ;
+; set[0] = s;
+; return !s;
+;}
+;
+; RUN: opt < %s -adce
+
+define i32 @rx_bitset_empty(i32 %size, i32* %set) {
+bb1:
+ %reg110 = load i32* %set ; <i32> [#uses=2]
+ store i32 1, i32* %set
+ %cast112 = sext i32 %size to i64 ; <i64> [#uses=1]
+ %reg113 = add i64 %cast112, 31 ; <i64> [#uses=1]
+ %reg114 = lshr i64 %reg113, 5 ; <i64> [#uses=2]
+ %cast109 = trunc i64 %reg114 to i32 ; <i32> [#uses=1]
+ %reg129 = add i32 %cast109, -1 ; <i32> [#uses=1]
+ %reg114-idxcast = trunc i64 %reg114 to i32 ; <i32> [#uses=1]
+ %reg114-idxcast-offset = add i32 %reg114-idxcast, 1073741823 ; <i32> [#uses=1]
+ %reg114-idxcast-offset.upgrd.1 = zext i32 %reg114-idxcast-offset to i64 ; <i64> [#uses=1]
+ %reg124 = getelementptr i32* %set, i64 %reg114-idxcast-offset.upgrd.1 ; <i32*> [#uses=1]
+ %reg125 = load i32* %reg124 ; <i32> [#uses=1]
+ %cond232 = icmp ne i32 %reg125, 0 ; <i1> [#uses=1]
+ br i1 %cond232, label %bb3, label %bb2
+
+bb2: ; preds = %bb2, %bb1
+ %cann-indvar = phi i32 [ 0, %bb1 ], [ %add1-indvar, %bb2 ] ; <i32> [#uses=2]
+ %reg130-scale = mul i32 %cann-indvar, -1 ; <i32> [#uses=1]
+ %reg130 = add i32 %reg130-scale, %reg129 ; <i32> [#uses=1]
+ %add1-indvar = add i32 %cann-indvar, 1 ; <i32> [#uses=1]
+ %reg130-idxcast = bitcast i32 %reg130 to i32 ; <i32> [#uses=1]
+ %reg130-idxcast-offset = add i32 %reg130-idxcast, 1073741823 ; <i32> [#uses=1]
+ %reg130-idxcast-offset.upgrd.2 = zext i32 %reg130-idxcast-offset to i64 ; <i64> [#uses=1]
+ %reg118 = getelementptr i32* %set, i64 %reg130-idxcast-offset.upgrd.2 ; <i32*> [#uses=1]
+ %reg119 = load i32* %reg118 ; <i32> [#uses=1]
+ %cond233 = icmp eq i32 %reg119, 0 ; <i1> [#uses=1]
+ br i1 %cond233, label %bb2, label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ store i32 %reg110, i32* %set
+ %cast126 = zext i32 %reg110 to i64 ; <i64> [#uses=1]
+ %reg127 = add i64 %cast126, -1 ; <i64> [#uses=1]
+ %reg128 = lshr i64 %reg127, 63 ; <i64> [#uses=1]
+ %cast120 = trunc i64 %reg128 to i32 ; <i32> [#uses=1]
+ ret i32 %cast120
+}
+
diff --git a/test/Transforms/ADCE/2002-07-17-AssertionFailure.ll b/test/Transforms/ADCE/2002-07-17-AssertionFailure.ll
new file mode 100644
index 0000000..8f8dadf
--- /dev/null
+++ b/test/Transforms/ADCE/2002-07-17-AssertionFailure.ll
@@ -0,0 +1,13 @@
+; This testcase fails because ADCE does not correctly delete the chain of
+; three instructions that are dead here. Ironically there were a dead basic
+; block in this function, it would work fine, but that would be the part we
+; have to fix now, wouldn't it....
+;
+; RUN: opt < %s -adce
+
+define void @foo(i8* %reg5481) {
+ %cast611 = bitcast i8* %reg5481 to i8** ; <i8**> [#uses=1]
+ %reg162 = load i8** %cast611 ; <i8*> [#uses=1]
+ ptrtoint i8* %reg162 to i32 ; <i32>:1 [#uses=0]
+ ret void
+}
diff --git a/test/Transforms/ADCE/2002-07-17-PHIAssertion.ll b/test/Transforms/ADCE/2002-07-17-PHIAssertion.ll
new file mode 100644
index 0000000..2f0df67
--- /dev/null
+++ b/test/Transforms/ADCE/2002-07-17-PHIAssertion.ll
@@ -0,0 +1,48 @@
+; This testcase was extracted from the gzip SPEC benchmark
+;
+; RUN: opt < %s -adce
+
+@bk = external global i32 ; <i32*> [#uses=2]
+@hufts = external global i32 ; <i32*> [#uses=1]
+
+define i32 @inflate() {
+bb0:
+ br label %bb2
+
+bb2: ; preds = %bb6, %bb0
+ %reg128 = phi i32 [ %reg130, %bb6 ], [ 0, %bb0 ] ; <i32> [#uses=2]
+ br i1 true, label %bb4, label %bb3
+
+bb3: ; preds = %bb2
+ br label %UnifiedExitNode
+
+bb4: ; preds = %bb2
+ %reg117 = load i32* @hufts ; <i32> [#uses=2]
+ %cond241 = icmp ule i32 %reg117, %reg128 ; <i1> [#uses=1]
+ br i1 %cond241, label %bb6, label %bb5
+
+bb5: ; preds = %bb4
+ br label %bb6
+
+bb6: ; preds = %bb5, %bb4
+ %reg130 = phi i32 [ %reg117, %bb5 ], [ %reg128, %bb4 ] ; <i32> [#uses=1]
+ br i1 false, label %bb2, label %bb7
+
+bb7: ; preds = %bb6
+ %reg126 = load i32* @bk ; <i32> [#uses=1]
+ %cond247 = icmp ule i32 %reg126, 7 ; <i1> [#uses=1]
+ br i1 %cond247, label %bb9, label %bb8
+
+bb8: ; preds = %bb8, %bb7
+ %reg119 = load i32* @bk ; <i32> [#uses=1]
+ %cond256 = icmp ugt i32 %reg119, 7 ; <i1> [#uses=1]
+ br i1 %cond256, label %bb8, label %bb9
+
+bb9: ; preds = %bb8, %bb7
+ br label %UnifiedExitNode
+
+UnifiedExitNode: ; preds = %bb9, %bb3
+ %UnifiedRetVal = phi i32 [ 7, %bb3 ], [ 0, %bb9 ] ; <i32> [#uses=1]
+ ret i32 %UnifiedRetVal
+}
+
diff --git a/test/Transforms/ADCE/2002-07-29-Segfault.ll b/test/Transforms/ADCE/2002-07-29-Segfault.ll
new file mode 100644
index 0000000..1c8e6e8
--- /dev/null
+++ b/test/Transforms/ADCE/2002-07-29-Segfault.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -adce -disable-output
+
+define void @test() {
+ br label %BB3
+
+BB3: ; preds = %BB3, %0
+ br label %BB3
+}
+
diff --git a/test/Transforms/ADCE/2003-01-22-PredecessorProblem.ll b/test/Transforms/ADCE/2003-01-22-PredecessorProblem.ll
new file mode 100644
index 0000000..17003be
--- /dev/null
+++ b/test/Transforms/ADCE/2003-01-22-PredecessorProblem.ll
@@ -0,0 +1,25 @@
+; Testcase reduced from 197.parser by bugpoint
+; RUN: opt < %s -adce
+
+define void @conjunction_prune() {
+; <label>:0
+ br label %bb19
+
+bb19: ; preds = %bb23, %bb22, %0
+ %reg205 = phi i8* [ null, %bb22 ], [ null, %bb23 ], [ null, %0 ] ; <i8*> [#uses=1]
+ br i1 false, label %bb21, label %bb22
+
+bb21: ; preds = %bb19
+ %cast455 = bitcast i8* %reg205 to i8** ; <i8**> [#uses=0]
+ br label %bb22
+
+bb22: ; preds = %bb21, %bb19
+ br i1 false, label %bb19, label %bb23
+
+bb23: ; preds = %bb22
+ br i1 false, label %bb19, label %bb28
+
+bb28: ; preds = %bb23
+ ret void
+}
+
diff --git a/test/Transforms/ADCE/2003-04-25-PHIPostDominateProblem.ll b/test/Transforms/ADCE/2003-04-25-PHIPostDominateProblem.ll
new file mode 100644
index 0000000..d30df19
--- /dev/null
+++ b/test/Transforms/ADCE/2003-04-25-PHIPostDominateProblem.ll
@@ -0,0 +1,35 @@
+; THis testcase caused an assertion failure because a PHI node did not have
+; entries for it's postdominator. But I think this can only happen when the
+; PHI node is dead, so we just avoid patching up dead PHI nodes.
+
+; RUN: opt < %s -adce
+
+target datalayout = "e-p:32:32"
+
+define void @dead_test8() {
+entry:
+ br label %loopentry
+
+loopentry: ; preds = %endif, %entry
+ %k.1 = phi i32 [ %k.0, %endif ], [ 0, %entry ] ; <i32> [#uses=1]
+ br i1 false, label %no_exit, label %return
+
+no_exit: ; preds = %loopentry
+ br i1 false, label %then, label %else
+
+then: ; preds = %no_exit
+ br label %endif
+
+else: ; preds = %no_exit
+ %dec = add i32 %k.1, -1 ; <i32> [#uses=1]
+ br label %endif
+
+endif: ; preds = %else, %then
+ %k.0 = phi i32 [ %dec, %else ], [ 0, %then ] ; <i32> [#uses=1]
+ store i32 2, i32* null
+ br label %loopentry
+
+return: ; preds = %loopentry
+ ret void
+}
+
diff --git a/test/Transforms/ADCE/2003-06-11-InvalidCFG.ll b/test/Transforms/ADCE/2003-06-11-InvalidCFG.ll
new file mode 100644
index 0000000..5206b24
--- /dev/null
+++ b/test/Transforms/ADCE/2003-06-11-InvalidCFG.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -adce -disable-output
+
+@G = external global i32* ; <i32**> [#uses=1]
+
+declare void @Fn(i32*)
+
+define i32 @main(i32 %argc.1, i8** %argv.1) {
+entry:
+ br label %endif.42
+
+endif.42: ; preds = %shortcirc_done.12, %then.66, %endif.42, %entry
+ br i1 false, label %endif.65, label %endif.42
+
+then.66: ; preds = %shortcirc_done.12
+ call void @Fn( i32* %tmp.2846 )
+ br label %endif.42
+
+endif.65: ; preds = %endif.42
+ %tmp.2846 = load i32** @G ; <i32*> [#uses=1]
+ br i1 false, label %shortcirc_next.12, label %shortcirc_done.12
+
+shortcirc_next.12: ; preds = %endif.65
+ br label %shortcirc_done.12
+
+shortcirc_done.12: ; preds = %shortcirc_next.12, %endif.65
+ br i1 false, label %then.66, label %endif.42
+}
+
diff --git a/test/Transforms/ADCE/2003-06-24-BadSuccessor.ll b/test/Transforms/ADCE/2003-06-24-BadSuccessor.ll
new file mode 100644
index 0000000..eb3ef1e
--- /dev/null
+++ b/test/Transforms/ADCE/2003-06-24-BadSuccessor.ll
@@ -0,0 +1,91 @@
+; RUN: opt < %s -adce -disable-output
+target datalayout = "e-p:32:32"
+ %struct..CppObjTypeDesc = type { i32, i16, i16 }
+ %struct..TypeToken = type { i32, i16, i16 }
+
+define i32 @C_ReFaxToDb() {
+entry:
+ br i1 false, label %endif.0, label %then.0
+
+then.0: ; preds = %entry
+ ret i32 0
+
+endif.0: ; preds = %entry
+ br i1 false, label %then.11, label %then.4
+
+then.4: ; preds = %endif.0
+ ret i32 0
+
+then.11: ; preds = %endif.0
+ br i1 false, label %loopentry.0, label %else.2
+
+loopentry.0: ; preds = %loopentry.1, %endif.14, %then.11
+ br i1 false, label %endif.14, label %loopexit.0
+
+endif.14: ; preds = %loopentry.0
+ br i1 false, label %loopentry.1, label %loopentry.0
+
+loopentry.1: ; preds = %then.53, %endif.14
+ %SubArrays.10 = phi i32* [ %SubArrays.8, %then.53 ], [ null, %endif.14 ] ; <i32*> [#uses=3]
+ br i1 false, label %no_exit.1, label %loopentry.0
+
+no_exit.1: ; preds = %loopentry.1
+ switch i32 0, label %label.17 [
+ i32 2, label %label.11
+ i32 19, label %label.10
+ ]
+
+label.10: ; preds = %no_exit.1
+ br i1 false, label %then.43, label %endif.43
+
+then.43: ; preds = %label.10
+ br i1 false, label %then.44, label %endif.44
+
+then.44: ; preds = %then.43
+ br i1 false, label %shortcirc_next.4, label %endif.45
+
+shortcirc_next.4: ; preds = %then.44
+ br i1 false, label %no_exit.2, label %loopexit.2
+
+no_exit.2: ; preds = %shortcirc_next.4
+ %tmp.897 = getelementptr i32* %SubArrays.10, i64 0 ; <i32*> [#uses=1]
+ %tmp.899 = load i32* %tmp.897 ; <i32> [#uses=1]
+ store i32 %tmp.899, i32* null
+ ret i32 0
+
+loopexit.2: ; preds = %shortcirc_next.4
+ ret i32 0
+
+endif.45: ; preds = %then.44
+ ret i32 0
+
+endif.44: ; preds = %then.43
+ ret i32 0
+
+endif.43: ; preds = %label.10
+ ret i32 0
+
+label.11: ; preds = %no_exit.1
+ ret i32 0
+
+label.17: ; preds = %no_exit.1
+ br i1 false, label %then.53, label %shortcirc_next.7
+
+shortcirc_next.7: ; preds = %label.17
+ br i1 false, label %then.53, label %shortcirc_next.8
+
+shortcirc_next.8: ; preds = %shortcirc_next.7
+ ret i32 0
+
+then.53: ; preds = %shortcirc_next.7, %label.17
+ %SubArrays.8 = phi i32* [ %SubArrays.10, %shortcirc_next.7 ], [ %SubArrays.10, %label.17 ] ; <i32*> [#uses=1]
+ %tmp.1023 = load i32* null ; <i32> [#uses=1]
+ switch i32 %tmp.1023, label %loopentry.1 [
+ ]
+
+loopexit.0: ; preds = %loopentry.0
+ ret i32 0
+
+else.2: ; preds = %then.11
+ ret i32 0
+}
diff --git a/test/Transforms/ADCE/2003-06-24-BasicFunctionality.ll b/test/Transforms/ADCE/2003-06-24-BasicFunctionality.ll
new file mode 100644
index 0000000..82fa5b2
--- /dev/null
+++ b/test/Transforms/ADCE/2003-06-24-BasicFunctionality.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -adce -simplifycfg -S | not grep then:
+
+define void @dead_test8(i32* %data.1, i32 %idx.1) {
+entry:
+ %tmp.1 = load i32* %data.1 ; <i32> [#uses=2]
+ %tmp.41 = icmp sgt i32 %tmp.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.41, label %no_exit.preheader, label %return
+
+no_exit.preheader: ; preds = %entry
+ %tmp.11 = getelementptr i32* %data.1, i64 1 ; <i32*> [#uses=1]
+ %tmp.22-idxcast = sext i32 %idx.1 to i64 ; <i64> [#uses=1]
+ %tmp.28 = getelementptr i32* %data.1, i64 %tmp.22-idxcast ; <i32*> [#uses=1]
+ br label %no_exit
+
+no_exit: ; preds = %endif, %no_exit.preheader
+ %k.1 = phi i32 [ %k.0, %endif ], [ 0, %no_exit.preheader ] ; <i32> [#uses=3]
+ %i.0 = phi i32 [ %inc.1, %endif ], [ 0, %no_exit.preheader ] ; <i32> [#uses=1]
+ %tmp.12 = load i32* %tmp.11 ; <i32> [#uses=1]
+ %tmp.14 = sub i32 0, %tmp.12 ; <i32> [#uses=1]
+ %tmp.161 = icmp ne i32 %k.1, %tmp.14 ; <i1> [#uses=1]
+ br i1 %tmp.161, label %then, label %else
+
+then: ; preds = %no_exit
+ %inc.0 = add i32 %k.1, 1 ; <i32> [#uses=1]
+ br label %endif
+
+else: ; preds = %no_exit
+ %dec = add i32 %k.1, -1 ; <i32> [#uses=1]
+ br label %endif
+
+endif: ; preds = %else, %then
+ %k.0 = phi i32 [ %dec, %else ], [ %inc.0, %then ] ; <i32> [#uses=1]
+ store i32 2, i32* %tmp.28
+ %inc.1 = add i32 %i.0, 1 ; <i32> [#uses=2]
+ %tmp.4 = icmp slt i32 %inc.1, %tmp.1 ; <i1> [#uses=1]
+ br i1 %tmp.4, label %no_exit, label %return
+
+return: ; preds = %endif, %entry
+ ret void
+}
+
diff --git a/test/Transforms/ADCE/2003-09-10-UnwindInstFail.ll b/test/Transforms/ADCE/2003-09-10-UnwindInstFail.ll
new file mode 100644
index 0000000..444ca8e
--- /dev/null
+++ b/test/Transforms/ADCE/2003-09-10-UnwindInstFail.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -adce -disable-output
+
+define void @test() {
+ br i1 false, label %then, label %endif
+
+then: ; preds = %0
+ invoke void null( i8* null )
+ to label %invoke_cont unwind label %invoke_catch
+
+invoke_catch: ; preds = %then
+ unwind
+
+invoke_cont: ; preds = %then
+ ret void
+
+endif: ; preds = %0
+ ret void
+}
+
diff --git a/test/Transforms/ADCE/2003-09-15-InfLoopCrash.ll b/test/Transforms/ADCE/2003-09-15-InfLoopCrash.ll
new file mode 100644
index 0000000..499ac51
--- /dev/null
+++ b/test/Transforms/ADCE/2003-09-15-InfLoopCrash.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -adce -disable-output
+
+define i32 @main() {
+ br label %loop
+
+loop: ; preds = %loop, %0
+ br label %loop
+}
+
diff --git a/test/Transforms/ADCE/2003-11-16-MissingPostDominanceInfo.ll b/test/Transforms/ADCE/2003-11-16-MissingPostDominanceInfo.ll
new file mode 100644
index 0000000..5ba1a2e
--- /dev/null
+++ b/test/Transforms/ADCE/2003-11-16-MissingPostDominanceInfo.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -adce -simplifycfg -S | grep call
+declare void @exit(i32)
+
+define i32 @main(i32 %argc) {
+ %C = icmp eq i32 %argc, 1 ; <i1> [#uses=2]
+ br i1 %C, label %Cond, label %Done
+
+Cond: ; preds = %0
+ br i1 %C, label %Loop, label %Done
+
+Loop: ; preds = %Loop, %Cond
+ call void @exit( i32 0 )
+ br label %Loop
+
+Done: ; preds = %Cond, %0
+ ret i32 1
+}
+
diff --git a/test/Transforms/ADCE/2004-05-04-UnreachableBlock.ll b/test/Transforms/ADCE/2004-05-04-UnreachableBlock.ll
new file mode 100644
index 0000000..a6a41fd
--- /dev/null
+++ b/test/Transforms/ADCE/2004-05-04-UnreachableBlock.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -adce -disable-output
+
+define void @test() {
+entry:
+ br label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %invoke_catch.0, %entry
+ ret void
+
+invoke_catch.0: ; No predecessors!
+ br i1 false, label %UnifiedUnwindBlock, label %UnifiedReturnBlock
+
+UnifiedUnwindBlock: ; preds = %invoke_catch.0
+ unwind
+}
+
diff --git a/test/Transforms/ADCE/2005-02-17-PHI-Invoke-Crash.ll b/test/Transforms/ADCE/2005-02-17-PHI-Invoke-Crash.ll
new file mode 100644
index 0000000..991e876
--- /dev/null
+++ b/test/Transforms/ADCE/2005-02-17-PHI-Invoke-Crash.ll
@@ -0,0 +1,45 @@
+; RUN: opt < %s -adce -disable-output
+
+declare void @strlen()
+
+declare void @_ZN10QByteArray6resizeEi()
+
+declare void @q_atomic_decrement()
+
+define void @_ZNK10QByteArray13leftJustifiedEicb() {
+entry:
+ invoke void @strlen( )
+ to label %tmp.3.i.noexc unwind label %invoke_catch.0
+
+tmp.3.i.noexc: ; preds = %entry
+ br i1 false, label %then.0, label %else.0
+
+invoke_catch.0: ; preds = %entry
+ invoke void @q_atomic_decrement( )
+ to label %tmp.1.i.i183.noexc unwind label %terminate
+
+tmp.1.i.i183.noexc: ; preds = %invoke_catch.0
+ unwind
+
+then.0: ; preds = %tmp.3.i.noexc
+ invoke void @_ZN10QByteArray6resizeEi( )
+ to label %invoke_cont.1 unwind label %invoke_catch.1
+
+invoke_catch.1: ; preds = %then.0
+ invoke void @q_atomic_decrement( )
+ to label %tmp.1.i.i162.noexc unwind label %terminate
+
+tmp.1.i.i162.noexc: ; preds = %invoke_catch.1
+ ret void
+
+invoke_cont.1: ; preds = %then.0
+ ret void
+
+else.0: ; preds = %tmp.3.i.noexc
+ ret void
+
+terminate: ; preds = %invoke_catch.1, %invoke_catch.0
+ %dbg.0.1 = phi { }* [ null, %invoke_catch.1 ], [ null, %invoke_catch.0 ] ; <{ }*> [#uses=0]
+ unreachable
+}
+
diff --git a/test/Transforms/ADCE/basictest.ll b/test/Transforms/ADCE/basictest.ll
new file mode 100644
index 0000000..378d702
--- /dev/null
+++ b/test/Transforms/ADCE/basictest.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -adce -simplifycfg | llvm-dis
+
+define i32 @Test(i32 %A, i32 %B) {
+BB1:
+ br label %BB4
+
+BB2: ; No predecessors!
+ br label %BB3
+
+BB3: ; preds = %BB4, %BB2
+ %ret = phi i32 [ %X, %BB4 ], [ %B, %BB2 ] ; <i32> [#uses=1]
+ ret i32 %ret
+
+BB4: ; preds = %BB1
+ %X = phi i32 [ %A, %BB1 ] ; <i32> [#uses=1]
+ br label %BB3
+}
+
+
diff --git a/test/Transforms/ADCE/basictest1.ll b/test/Transforms/ADCE/basictest1.ll
new file mode 100644
index 0000000..bbb8878
--- /dev/null
+++ b/test/Transforms/ADCE/basictest1.ll
@@ -0,0 +1,97 @@
+; RUN: opt < %s -adce -simplifycfg | llvm-dis
+%FILE = type { i32, i8*, i8*, i8, i8, i32, i32, i32 }
+ %spec_fd_t = type { i32, i32, i32, i8* }
+@__iob = external global [20 x %FILE] ; <[20 x %FILE]*> [#uses=1]
+@dbglvl = global i32 4 ; <i32*> [#uses=3]
+@spec_fd = external global [3 x %spec_fd_t] ; <[3 x %spec_fd_t]*> [#uses=4]
[email protected] = internal global [34 x i8] c"spec_read: fd=%d, > MAX_SPEC_FD!\0A\00" ; <[34 x i8]*> [#uses=1]
[email protected] = internal global [4 x i8] c"EOF\00" ; <[4 x i8]*> [#uses=1]
[email protected] = internal global [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
[email protected] = internal global [17 x i8] c"spec_getc: %d = \00" ; <[17 x i8]*> [#uses=1]
+
+declare i32 @fprintf(%FILE*, i8*, ...)
+
+declare void @exit(i32)
+
+declare i32 @remove(i8*)
+
+declare i32 @fputc(i32, %FILE*)
+
+declare i32 @fwrite(i8*, i32, i32, %FILE*)
+
+declare void @perror(i8*)
+
+define i32 @spec_getc(i32 %fd) {
+ %reg109 = load i32* @dbglvl ; <i32> [#uses=1]
+ %cond266 = icmp sle i32 %reg109, 4 ; <i1> [#uses=1]
+ br i1 %cond266, label %bb3, label %bb2
+
+bb2: ; preds = %0
+ %cast273 = getelementptr [17 x i8]* @.LC12, i64 0, i64 0 ; <i8*> [#uses=0]
+ br label %bb3
+
+bb3: ; preds = %bb2, %0
+ %cond267 = icmp sle i32 %fd, 3 ; <i1> [#uses=1]
+ br i1 %cond267, label %bb5, label %bb4
+
+bb4: ; preds = %bb3
+ %reg111 = getelementptr [20 x %FILE]* @__iob, i64 0, i64 1, i32 3 ; <i8*> [#uses=1]
+ %cast274 = getelementptr [34 x i8]* @.LC9, i64 0, i64 0 ; <i8*> [#uses=0]
+ %cast282 = bitcast i8* %reg111 to %FILE* ; <%FILE*> [#uses=0]
+ call void @exit( i32 1 )
+ br label %UnifiedExitNode
+
+bb5: ; preds = %bb3
+ %reg107-idxcast1 = sext i32 %fd to i64 ; <i64> [#uses=2]
+ %reg107-idxcast2 = sext i32 %fd to i64 ; <i64> [#uses=1]
+ %reg1311 = getelementptr [3 x %spec_fd_t]* @spec_fd, i64 0, i64 %reg107-idxcast2 ; <%spec_fd_t*> [#uses=1]
+ %idx1 = getelementptr [3 x %spec_fd_t]* @spec_fd, i64 0, i64 %reg107-idxcast1, i32 2 ; <i32*> [#uses=1]
+ %reg1321 = load i32* %idx1 ; <i32> [#uses=3]
+ %idx2 = getelementptr %spec_fd_t* %reg1311, i64 0, i32 1 ; <i32*> [#uses=1]
+ %reg1331 = load i32* %idx2 ; <i32> [#uses=1]
+ %cond270 = icmp slt i32 %reg1321, %reg1331 ; <i1> [#uses=1]
+ br i1 %cond270, label %bb9, label %bb6
+
+bb6: ; preds = %bb5
+ %reg134 = load i32* @dbglvl ; <i32> [#uses=1]
+ %cond271 = icmp sle i32 %reg134, 4 ; <i1> [#uses=1]
+ br i1 %cond271, label %bb8, label %bb7
+
+bb7: ; preds = %bb6
+ %cast277 = getelementptr [4 x i8]* @.LC10, i64 0, i64 0 ; <i8*> [#uses=0]
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb6
+ br label %UnifiedExitNode
+
+bb9: ; preds = %bb5
+ %reg107-idxcast3 = sext i32 %fd to i64 ; <i64> [#uses=1]
+ %idx3 = getelementptr [3 x %spec_fd_t]* @spec_fd, i64 0, i64 %reg107-idxcast3, i32 3 ; <i8**> [#uses=1]
+ %reg1601 = load i8** %idx3 ; <i8*> [#uses=1]
+ %reg132-idxcast1 = sext i32 %reg1321 to i64 ; <i64> [#uses=1]
+ %idx4 = getelementptr i8* %reg1601, i64 %reg132-idxcast1 ; <i8*> [#uses=1]
+ %reg1621 = load i8* %idx4 ; <i8> [#uses=2]
+ %cast108 = zext i8 %reg1621 to i64 ; <i64> [#uses=0]
+ %reg157 = add i32 %reg1321, 1 ; <i32> [#uses=1]
+ %idx5 = getelementptr [3 x %spec_fd_t]* @spec_fd, i64 0, i64 %reg107-idxcast1, i32 2 ; <i32*> [#uses=1]
+ store i32 %reg157, i32* %idx5
+ %reg163 = load i32* @dbglvl ; <i32> [#uses=1]
+ %cond272 = icmp sle i32 %reg163, 4 ; <i1> [#uses=1]
+ br i1 %cond272, label %bb11, label %bb10
+
+bb10: ; preds = %bb9
+ %cast279 = getelementptr [4 x i8]* @.LC11, i64 0, i64 0 ; <i8*> [#uses=0]
+ br label %bb11
+
+bb11: ; preds = %bb10, %bb9
+ %cast291 = zext i8 %reg1621 to i32 ; <i32> [#uses=1]
+ br label %UnifiedExitNode
+
+UnifiedExitNode: ; preds = %bb11, %bb8, %bb4
+ %UnifiedRetVal = phi i32 [ 42, %bb4 ], [ -1, %bb8 ], [ %cast291, %bb11 ] ; <i32> [#uses=1]
+ ret i32 %UnifiedRetVal
+}
+
+declare i32 @puts(i8*)
+
+declare i32 @printf(i8*, ...)
diff --git a/test/Transforms/ADCE/basictest2.ll b/test/Transforms/ADCE/basictest2.ll
new file mode 100644
index 0000000..a17795f
--- /dev/null
+++ b/test/Transforms/ADCE/basictest2.ll
@@ -0,0 +1,97 @@
+; RUN: opt < %s -adce -simplifycfg | llvm-dis
+ %FILE = type { i32, i8*, i8*, i8, i8, i32, i32, i32 }
+ %spec_fd_t = type { i32, i32, i32, i8* }
+@__iob = external global [20 x %FILE] ; <[20 x %FILE]*> [#uses=1]
+@dbglvl = global i32 4 ; <i32*> [#uses=3]
+@spec_fd = external global [3 x %spec_fd_t] ; <[3 x %spec_fd_t]*> [#uses=4]
[email protected] = internal global [34 x i8] c"spec_read: fd=%d, > MAX_SPEC_FD!\0A\00" ; <[34 x i8]*> [#uses=1]
[email protected] = internal global [4 x i8] c"EOF\00" ; <[4 x i8]*> [#uses=1]
[email protected] = internal global [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
[email protected] = internal global [17 x i8] c"spec_getc: %d = \00" ; <[17 x i8]*> [#uses=1]
+
+declare i32 @fprintf(%FILE*, i8*, ...)
+
+declare void @exit(i32)
+
+declare i32 @remove(i8*)
+
+declare i32 @fputc(i32, %FILE*)
+
+declare i32 @fwrite(i8*, i32, i32, %FILE*)
+
+declare void @perror(i8*)
+
+define i32 @spec_getc(i32 %fd) {
+ %reg109 = load i32* @dbglvl ; <i32> [#uses=1]
+ %cond266 = icmp sle i32 %reg109, 4 ; <i1> [#uses=1]
+ br i1 %cond266, label %bb3, label %bb2
+
+bb2: ; preds = %0
+ %cast273 = getelementptr [17 x i8]* @.LC12, i64 0, i64 0 ; <i8*> [#uses=0]
+ br label %bb3
+
+bb3: ; preds = %bb2, %0
+ %cond267 = icmp sle i32 %fd, 3 ; <i1> [#uses=0]
+ br label %bb5
+
+bb4: ; No predecessors!
+ %reg111 = getelementptr [20 x %FILE]* @__iob, i64 0, i64 1, i32 3 ; <i8*> [#uses=1]
+ %cast274 = getelementptr [34 x i8]* @.LC9, i64 0, i64 0 ; <i8*> [#uses=0]
+ %cast282 = bitcast i8* %reg111 to %FILE* ; <%FILE*> [#uses=0]
+ call void @exit( i32 1 )
+ br label %UnifiedExitNode
+
+bb5: ; preds = %bb3
+ %reg107-idxcast1 = sext i32 %fd to i64 ; <i64> [#uses=2]
+ %reg107-idxcast2 = sext i32 %fd to i64 ; <i64> [#uses=1]
+ %reg1311 = getelementptr [3 x %spec_fd_t]* @spec_fd, i64 0, i64 %reg107-idxcast2 ; <%spec_fd_t*> [#uses=1]
+ %idx1 = getelementptr [3 x %spec_fd_t]* @spec_fd, i64 0, i64 %reg107-idxcast1, i32 2 ; <i32*> [#uses=1]
+ %reg1321 = load i32* %idx1 ; <i32> [#uses=3]
+ %idx2 = getelementptr %spec_fd_t* %reg1311, i64 0, i32 1 ; <i32*> [#uses=1]
+ %reg1331 = load i32* %idx2 ; <i32> [#uses=1]
+ %cond270 = icmp slt i32 %reg1321, %reg1331 ; <i1> [#uses=1]
+ br i1 %cond270, label %bb9, label %bb6
+
+bb6: ; preds = %bb5
+ %reg134 = load i32* @dbglvl ; <i32> [#uses=1]
+ %cond271 = icmp sle i32 %reg134, 4 ; <i1> [#uses=1]
+ br i1 %cond271, label %bb8, label %bb7
+
+bb7: ; preds = %bb6
+ %cast277 = getelementptr [4 x i8]* @.LC10, i64 0, i64 0 ; <i8*> [#uses=0]
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb6
+ br label %UnifiedExitNode
+
+bb9: ; preds = %bb5
+ %reg107-idxcast3 = sext i32 %fd to i64 ; <i64> [#uses=1]
+ %idx3 = getelementptr [3 x %spec_fd_t]* @spec_fd, i64 0, i64 %reg107-idxcast3, i32 3 ; <i8**> [#uses=1]
+ %reg1601 = load i8** %idx3 ; <i8*> [#uses=1]
+ %reg132-idxcast1 = sext i32 %reg1321 to i64 ; <i64> [#uses=1]
+ %idx4 = getelementptr i8* %reg1601, i64 %reg132-idxcast1 ; <i8*> [#uses=1]
+ %reg1621 = load i8* %idx4 ; <i8> [#uses=2]
+ %cast108 = zext i8 %reg1621 to i64 ; <i64> [#uses=0]
+ %reg157 = add i32 %reg1321, 1 ; <i32> [#uses=1]
+ %idx5 = getelementptr [3 x %spec_fd_t]* @spec_fd, i64 0, i64 %reg107-idxcast1, i32 2 ; <i32*> [#uses=1]
+ store i32 %reg157, i32* %idx5
+ %reg163 = load i32* @dbglvl ; <i32> [#uses=1]
+ %cond272 = icmp sle i32 %reg163, 4 ; <i1> [#uses=1]
+ br i1 %cond272, label %bb11, label %bb10
+
+bb10: ; preds = %bb9
+ %cast279 = getelementptr [4 x i8]* @.LC11, i64 0, i64 0 ; <i8*> [#uses=0]
+ br label %bb11
+
+bb11: ; preds = %bb10, %bb9
+ %cast291 = zext i8 %reg1621 to i32 ; <i32> [#uses=1]
+ br label %UnifiedExitNode
+
+UnifiedExitNode: ; preds = %bb11, %bb8, %bb4
+ %UnifiedRetVal = phi i32 [ 42, %bb4 ], [ -1, %bb8 ], [ %cast291, %bb11 ] ; <i32> [#uses=1]
+ ret i32 %UnifiedRetVal
+}
+
+declare i32 @puts(i8*)
+
+declare i32 @printf(i8*, ...)
diff --git a/test/Transforms/ADCE/dce_pure_call.ll b/test/Transforms/ADCE/dce_pure_call.ll
new file mode 100644
index 0000000..66483ab
--- /dev/null
+++ b/test/Transforms/ADCE/dce_pure_call.ll
@@ -0,0 +1,8 @@
+; RUN: opt -adce -S < %s | not grep call
+
+declare i32 @strlen(i8*) readonly nounwind
+
+define void @test() {
+ call i32 @strlen( i8* null ) ; <i32>:1 [#uses=0]
+ ret void
+}
diff --git a/test/Transforms/ADCE/dce_pure_invoke.ll b/test/Transforms/ADCE/dce_pure_invoke.ll
new file mode 100644
index 0000000..c16d45c
--- /dev/null
+++ b/test/Transforms/ADCE/dce_pure_invoke.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -adce -S | grep null
+
+declare i32 @strlen(i8*) readnone
+
+define i32 @test() {
+ ; invoke of pure function should not be deleted!
+ invoke i32 @strlen( i8* null ) readnone
+ to label %Cont unwind label %Other ; <i32>:1 [#uses=0]
+
+Cont: ; preds = %0
+ ret i32 0
+
+Other: ; preds = %0
+ ret i32 1
+}
diff --git a/test/Transforms/ADCE/dg.exp b/test/Transforms/ADCE/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/ADCE/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/ADCE/unreachable-function.ll b/test/Transforms/ADCE/unreachable-function.ll
new file mode 100644
index 0000000..7c6a30e
--- /dev/null
+++ b/test/Transforms/ADCE/unreachable-function.ll
@@ -0,0 +1,5 @@
+; RUN: opt < %s -adce -disable-output
+
+define void @test() {
+ unreachable
+}
diff --git a/test/Transforms/ArgumentPromotion/2008-02-01-ReturnAttrs.ll b/test/Transforms/ArgumentPromotion/2008-02-01-ReturnAttrs.ll
new file mode 100644
index 0000000..e740b29
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/2008-02-01-ReturnAttrs.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -argpromotion -S | grep nounwind | count 2
+
+define internal i32 @deref(i32* %x) nounwind {
+entry:
+ %tmp2 = load i32* %x, align 4 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @f(i32 %x) {
+entry:
+ %x_addr = alloca i32 ; <i32*> [#uses=2]
+ store i32 %x, i32* %x_addr, align 4
+ %tmp1 = call i32 @deref( i32* %x_addr ) nounwind ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
diff --git a/test/Transforms/ArgumentPromotion/2008-07-02-array-indexing.ll b/test/Transforms/ArgumentPromotion/2008-07-02-array-indexing.ll
new file mode 100644
index 0000000..d7d5eb5
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/2008-07-02-array-indexing.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -argpromotion -S > %t
+; RUN: cat %t | grep {define.*@callee(.*i32\\*}
+; PR2498
+
+; This test tries to convince argpromotion about promoting the load from %A + 2,
+; because there is a load of %A in the entry block
+define internal i32 @callee(i1 %C, i32* %A) {
+entry:
+ ; Unconditonally load the element at %A
+ %A.0 = load i32* %A
+ br i1 %C, label %T, label %F
+T:
+ ret i32 %A.0
+F:
+ ; Load the element at offset two from %A. This should not be promoted!
+ %A.2 = getelementptr i32* %A, i32 2
+ %R = load i32* %A.2
+ ret i32 %R
+}
+
+define i32 @foo() {
+ %X = call i32 @callee(i1 false, i32* null) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/ArgumentPromotion/2008-09-07-CGUpdate.ll b/test/Transforms/ArgumentPromotion/2008-09-07-CGUpdate.ll
new file mode 100644
index 0000000..7ee6654
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/2008-09-07-CGUpdate.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -inline -argpromotion -disable-output
+
+define internal fastcc i32 @hash(i32* %ts, i32 %mod) nounwind {
+entry:
+ unreachable
+}
+
+define void @encode(i32* %m, i32* %ts, i32* %new) nounwind {
+entry:
+ %0 = call fastcc i32 @hash( i32* %ts, i32 0 ) nounwind ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/ArgumentPromotion/2008-09-08-CGUpdateSelfEdge.ll b/test/Transforms/ArgumentPromotion/2008-09-08-CGUpdateSelfEdge.ll
new file mode 100644
index 0000000..aff917c
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/2008-09-08-CGUpdateSelfEdge.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -argpromotion -disable-output
+
+define internal fastcc i32 @term_SharingList(i32* %Term, i32* %List) nounwind {
+entry:
+ br i1 false, label %bb, label %bb5
+
+bb: ; preds = %entry
+ %0 = call fastcc i32 @term_SharingList( i32* null, i32* %List ) nounwind ; <i32> [#uses=0]
+ unreachable
+
+bb5: ; preds = %entry
+ ret i32 0
+}
+
+define i32 @term_Sharing(i32* %Term) nounwind {
+entry:
+ br i1 false, label %bb.i, label %bb14
+
+bb.i: ; preds = %entry
+ %0 = call fastcc i32 @term_SharingList( i32* null, i32* null ) nounwind ; <i32> [#uses=0]
+ ret i32 1
+
+bb14: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/Transforms/ArgumentPromotion/aggregate-promote.ll b/test/Transforms/ArgumentPromotion/aggregate-promote.ll
new file mode 100644
index 0000000..12de511
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/aggregate-promote.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -argpromotion -instcombine -S | not grep load
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+%QuadTy = type { i32, i32, i32, i32 }
+@G = constant %QuadTy {
+ i32 0,
+ i32 0,
+ i32 17,
+ i32 25 } ; <%QuadTy*> [#uses=1]
+
+define internal i32 @test(%QuadTy* %P) {
+ %A = getelementptr %QuadTy* %P, i64 0, i32 3 ; <i32*> [#uses=1]
+ %B = getelementptr %QuadTy* %P, i64 0, i32 2 ; <i32*> [#uses=1]
+ %a = load i32* %A ; <i32> [#uses=1]
+ %b = load i32* %B ; <i32> [#uses=1]
+ %V = add i32 %a, %b ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define i32 @caller() {
+ %V = call i32 @test( %QuadTy* @G ) ; <i32> [#uses=1]
+ ret i32 %V
+}
+
diff --git a/test/Transforms/ArgumentPromotion/attrs.ll b/test/Transforms/ArgumentPromotion/attrs.ll
new file mode 100644
index 0000000..49c0750
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/attrs.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -argpromotion -S | grep zeroext
+
+ %struct.ss = type { i32, i64 }
+
+define internal void @f(%struct.ss* byval %b, i32* byval %X, i32 %i) nounwind {
+entry:
+ %tmp = getelementptr %struct.ss* %b, i32 0, i32 0
+ %tmp1 = load i32* %tmp, align 4
+ %tmp2 = add i32 %tmp1, 1
+ store i32 %tmp2, i32* %tmp, align 4
+
+ store i32 0, i32* %X
+ ret void
+}
+
+define i32 @test(i32* %X) {
+entry:
+ %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
+ %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp1, align 8
+ %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
+ store i64 2, i64* %tmp4, align 4
+ call void @f( %struct.ss* byval %S, i32* byval %X, i32 zeroext 0)
+ ret i32 0
+}
diff --git a/test/Transforms/ArgumentPromotion/basictest.ll b/test/Transforms/ArgumentPromotion/basictest.ll
new file mode 100644
index 0000000..ac9d7bf
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/basictest.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -argpromotion -mem2reg -S | not grep alloca
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+define internal i32 @test(i32* %X, i32* %Y) {
+ %A = load i32* %X ; <i32> [#uses=1]
+ %B = load i32* %Y ; <i32> [#uses=1]
+ %C = add i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define internal i32 @caller(i32* %B) {
+ %A = alloca i32 ; <i32*> [#uses=2]
+ store i32 1, i32* %A
+ %C = call i32 @test( i32* %A, i32* %B ) ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @callercaller() {
+ %B = alloca i32 ; <i32*> [#uses=2]
+ store i32 2, i32* %B
+ %X = call i32 @caller( i32* %B ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/ArgumentPromotion/byval-2.ll b/test/Transforms/ArgumentPromotion/byval-2.ll
new file mode 100644
index 0000000..bd62c68
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/byval-2.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -argpromotion -S | grep -F {i32* byval} | count 2
+; Argpromote + scalarrepl should change this to passing the two integers by value.
+
+ %struct.ss = type { i32, i64 }
+
+define internal void @f(%struct.ss* byval %b, i32* byval %X) nounwind {
+entry:
+ %tmp = getelementptr %struct.ss* %b, i32 0, i32 0
+ %tmp1 = load i32* %tmp, align 4
+ %tmp2 = add i32 %tmp1, 1
+ store i32 %tmp2, i32* %tmp, align 4
+
+ store i32 0, i32* %X
+ ret void
+}
+
+define i32 @test(i32* %X) {
+entry:
+ %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
+ %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp1, align 8
+ %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
+ store i64 2, i64* %tmp4, align 4
+ call void @f( %struct.ss* byval %S, i32* byval %X)
+ ret i32 0
+}
diff --git a/test/Transforms/ArgumentPromotion/byval.ll b/test/Transforms/ArgumentPromotion/byval.ll
new file mode 100644
index 0000000..44b26fc
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/byval.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -argpromotion -scalarrepl -S | not grep load
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+; Argpromote + scalarrepl should change this to passing the two integers by value.
+
+ %struct.ss = type { i32, i64 }
+
+define internal void @f(%struct.ss* byval %b) nounwind {
+entry:
+ %tmp = getelementptr %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2]
+ %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
+ store i32 %tmp2, i32* %tmp, align 4
+ ret void
+}
+
+define i32 @main() nounwind {
+entry:
+ %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
+ %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp1, align 8
+ %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
+ store i64 2, i64* %tmp4, align 4
+ call void @f( %struct.ss* byval %S ) nounwind
+ ret i32 0
+}
diff --git a/test/Transforms/ArgumentPromotion/callgraph-update.ll b/test/Transforms/ArgumentPromotion/callgraph-update.ll
new file mode 100644
index 0000000..989043d
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/callgraph-update.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -argpromotion -simplifycfg -constmerge | llvm-dis
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+
+%struct.VEC2 = type { double, double, double }
+%struct.VERTEX = type { %struct.VEC2, %struct.VERTEX*, %struct.VERTEX* }
+%struct.edge_rec = type { %struct.VERTEX*, %struct.edge_rec*, i32, i8* }
+
+declare %struct.edge_rec* @alloc_edge() nounwind ssp
+
+define i64 @build_delaunay(%struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind ssp {
+entry:
+ br i1 undef, label %bb11, label %bb12
+
+bb11: ; preds = %bb10
+ %a = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=0]
+ ret i64 123
+
+bb12: ; preds = %bb10
+ %b = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=1]
+ %c = ptrtoint %struct.edge_rec* %b to i64
+ ret i64 %c
+}
diff --git a/test/Transforms/ArgumentPromotion/chained.ll b/test/Transforms/ArgumentPromotion/chained.ll
new file mode 100644
index 0000000..c9a4538
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/chained.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -argpromotion -instcombine -S | not grep load
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@G1 = constant i32 0 ; <i32*> [#uses=1]
+@G2 = constant i32* @G1 ; <i32**> [#uses=1]
+
+define internal i32 @test(i32** %X) {
+ %Y = load i32** %X ; <i32*> [#uses=1]
+ %X.upgrd.1 = load i32* %Y ; <i32> [#uses=1]
+ ret i32 %X.upgrd.1
+}
+
+define i32 @caller(i32** %P) {
+ %X = call i32 @test( i32** @G2 ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/ArgumentPromotion/control-flow.ll b/test/Transforms/ArgumentPromotion/control-flow.ll
new file mode 100644
index 0000000..08ca6bc
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/control-flow.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -argpromotion -S | \
+; RUN: not grep {load i32\* null}
+
+define internal i32 @callee(i1 %C, i32* %P) {
+ br i1 %C, label %T, label %F
+
+T: ; preds = %0
+ ret i32 17
+
+F: ; preds = %0
+ %X = load i32* %P ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i32 @foo() {
+ %X = call i32 @callee( i1 true, i32* null ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/ArgumentPromotion/control-flow2.ll b/test/Transforms/ArgumentPromotion/control-flow2.ll
new file mode 100644
index 0000000..9a8afc3
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/control-flow2.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -argpromotion -S | \
+; RUN: grep {load i32\\* %A}
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+define internal i32 @callee(i1 %C, i32* %P) {
+ br i1 %C, label %T, label %F
+
+T: ; preds = %0
+ ret i32 17
+
+F: ; preds = %0
+ %X = load i32* %P ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i32 @foo() {
+ %A = alloca i32 ; <i32*> [#uses=2]
+ store i32 17, i32* %A
+ %X = call i32 @callee( i1 false, i32* %A ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/ArgumentPromotion/dg.exp b/test/Transforms/ArgumentPromotion/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/ArgumentPromotion/pr3085.ll b/test/Transforms/ArgumentPromotion/pr3085.ll
new file mode 100644
index 0000000..3048c60
--- /dev/null
+++ b/test/Transforms/ArgumentPromotion/pr3085.ll
@@ -0,0 +1,1944 @@
+; RUN: opt < %s -disable-output -loop-extract-single -loop-rotate -loop-reduce -argpromotion
+; PR 3085
+
+ %struct.Lit = type { i8 }
+
+define fastcc %struct.Lit* @import_lit(i32 %lit) nounwind {
+entry:
+ br i1 false, label %bb, label %bb1
+
+bb: ; preds = %entry
+ unreachable
+
+bb1: ; preds = %entry
+ br label %bb3
+
+bb2: ; preds = %bb3
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ br i1 false, label %bb2, label %bb6
+
+bb6: ; preds = %bb3
+ br i1 false, label %bb.i.i, label %bb1.i.i
+
+bb.i.i: ; preds = %bb6
+ br label %int2lit.exit
+
+bb1.i.i: ; preds = %bb6
+ br label %int2lit.exit
+
+int2lit.exit: ; preds = %bb1.i.i, %bb.i.i
+ ret %struct.Lit* null
+}
+
+define fastcc i32 @picosat_main(i32 %argc, i8** %argv) nounwind {
+entry:
+ br i1 false, label %bb.i, label %picosat_time_stamp.exit
+
+bb.i: ; preds = %entry
+ br label %picosat_time_stamp.exit
+
+picosat_time_stamp.exit: ; preds = %bb.i, %entry
+ br label %bb108
+
+bb: ; preds = %bb108
+ br i1 false, label %bb1, label %bb2
+
+bb1: ; preds = %bb
+ br label %bb106
+
+bb2: ; preds = %bb
+ br i1 false, label %bb3, label %bb4
+
+bb3: ; preds = %bb2
+ br label %bb106
+
+bb4: ; preds = %bb2
+ br i1 false, label %bb5, label %bb6
+
+bb5: ; preds = %bb4
+ br label %bb106
+
+bb6: ; preds = %bb4
+ br i1 false, label %bb7, label %bb8
+
+bb7: ; preds = %bb6
+ br label %bb106
+
+bb8: ; preds = %bb6
+ br i1 false, label %bb106, label %bb10
+
+bb10: ; preds = %bb8
+ br i1 false, label %bb106, label %bb12
+
+bb12: ; preds = %bb10
+ br i1 false, label %bb106, label %bb14
+
+bb14: ; preds = %bb12
+ br i1 false, label %bb15, label %bb19
+
+bb15: ; preds = %bb14
+ br i1 false, label %bb16, label %bb17
+
+bb16: ; preds = %bb15
+ br label %bb106
+
+bb17: ; preds = %bb15
+ br label %bb106
+
+bb19: ; preds = %bb14
+ br i1 false, label %bb20, label %bb28
+
+bb20: ; preds = %bb19
+ br i1 false, label %bb21, label %bb22
+
+bb21: ; preds = %bb20
+ br label %bb106
+
+bb22: ; preds = %bb20
+ br i1 false, label %bb106, label %bb24
+
+bb24: ; preds = %bb22
+ br i1 false, label %bb106, label %bb26
+
+bb26: ; preds = %bb24
+ br label %bb106
+
+bb28: ; preds = %bb19
+ br i1 false, label %bb29, label %bb35
+
+bb29: ; preds = %bb28
+ br i1 false, label %bb30, label %bb31
+
+bb30: ; preds = %bb29
+ br label %bb106
+
+bb31: ; preds = %bb29
+ br i1 false, label %bb32, label %bb33
+
+bb32: ; preds = %bb31
+ br label %bb106
+
+bb33: ; preds = %bb31
+ br label %bb106
+
+bb35: ; preds = %bb28
+ br i1 false, label %bb36, label %bb40
+
+bb36: ; preds = %bb35
+ br i1 false, label %bb37, label %bb38
+
+bb37: ; preds = %bb36
+ br label %bb106
+
+bb38: ; preds = %bb36
+ br label %bb106
+
+bb40: ; preds = %bb35
+ br i1 false, label %bb41, label %bb49
+
+bb41: ; preds = %bb40
+ br i1 false, label %bb43, label %bb42
+
+bb42: ; preds = %bb41
+ br label %bb106
+
+bb43: ; preds = %bb41
+ br i1 false, label %bb44, label %bb45
+
+bb44: ; preds = %bb43
+ br label %bb106
+
+bb45: ; preds = %bb43
+ br i1 false, label %bb46, label %bb47
+
+bb46: ; preds = %bb45
+ br label %bb106
+
+bb47: ; preds = %bb45
+ br label %bb106
+
+bb49: ; preds = %bb40
+ br i1 false, label %bb50, label %bb56
+
+bb50: ; preds = %bb49
+ br i1 false, label %bb52, label %bb51
+
+bb51: ; preds = %bb50
+ br label %bb106
+
+bb52: ; preds = %bb50
+ br i1 false, label %bb53, label %bb54
+
+bb53: ; preds = %bb52
+ br label %bb106
+
+bb54: ; preds = %bb52
+ br label %bb106
+
+bb56: ; preds = %bb49
+ br i1 false, label %bb57, label %bb63
+
+bb57: ; preds = %bb56
+ br i1 false, label %bb59, label %bb58
+
+bb58: ; preds = %bb57
+ br label %bb106
+
+bb59: ; preds = %bb57
+ br i1 false, label %bb60, label %bb61
+
+bb60: ; preds = %bb59
+ br label %bb106
+
+bb61: ; preds = %bb59
+ br label %bb106
+
+bb63: ; preds = %bb56
+ br i1 false, label %bb64, label %bb70
+
+bb64: ; preds = %bb63
+ br i1 false, label %bb66, label %bb65
+
+bb65: ; preds = %bb64
+ br label %bb106
+
+bb66: ; preds = %bb64
+ br i1 false, label %bb67, label %bb68
+
+bb67: ; preds = %bb66
+ br label %bb106
+
+bb68: ; preds = %bb66
+ br label %bb106
+
+bb70: ; preds = %bb63
+ br i1 false, label %bb71, label %bb79
+
+bb71: ; preds = %bb70
+ br i1 false, label %bb73, label %bb72
+
+bb72: ; preds = %bb71
+ br label %bb106
+
+bb73: ; preds = %bb71
+ br i1 false, label %bb74, label %bb75
+
+bb74: ; preds = %bb73
+ br label %bb106
+
+bb75: ; preds = %bb73
+ br i1 false, label %bb76, label %bb77
+
+bb76: ; preds = %bb75
+ br label %bb106
+
+bb77: ; preds = %bb75
+ br label %bb106
+
+bb79: ; preds = %bb70
+ br i1 false, label %bb80, label %bb86
+
+bb80: ; preds = %bb79
+ br i1 false, label %bb82, label %bb81
+
+bb81: ; preds = %bb80
+ br label %bb106
+
+bb82: ; preds = %bb80
+ br i1 false, label %bb83, label %bb84
+
+bb83: ; preds = %bb82
+ br label %bb106
+
+bb84: ; preds = %bb82
+ br label %bb106
+
+bb86: ; preds = %bb79
+ br i1 false, label %bb87, label %bb93
+
+bb87: ; preds = %bb86
+ br i1 false, label %bb89, label %bb88
+
+bb88: ; preds = %bb87
+ br label %bb106
+
+bb89: ; preds = %bb87
+ br i1 false, label %bb90, label %bb91
+
+bb90: ; preds = %bb89
+ br label %bb106
+
+bb91: ; preds = %bb89
+ br label %bb106
+
+bb93: ; preds = %bb86
+ br i1 false, label %bb94, label %bb95
+
+bb94: ; preds = %bb93
+ br label %bb106
+
+bb95: ; preds = %bb93
+ br i1 false, label %bb98, label %bb97
+
+bb97: ; preds = %bb95
+ br label %bb106
+
+bb98: ; preds = %bb95
+ br i1 false, label %bb103, label %bb1.i24
+
+bb1.i24: ; preds = %bb98
+ br i1 false, label %bb99, label %bb103
+
+bb99: ; preds = %bb1.i24
+ br i1 false, label %bb101, label %bb100
+
+bb100: ; preds = %bb99
+ br label %bb102
+
+bb101: ; preds = %bb99
+ br label %bb102
+
+bb102: ; preds = %bb101, %bb100
+ br label %bb106
+
+bb103: ; preds = %bb1.i24, %bb98
+ br i1 false, label %bb104, label %bb105
+
+bb104: ; preds = %bb103
+ br label %bb106
+
+bb105: ; preds = %bb103
+ br label %bb106
+
+bb106: ; preds = %bb105, %bb104, %bb102, %bb97, %bb94, %bb91, %bb90, %bb88, %bb84, %bb83, %bb81, %bb77, %bb76, %bb74, %bb72, %bb68, %bb67, %bb65, %bb61, %bb60, %bb58, %bb54, %bb53, %bb51, %bb47, %bb46, %bb44, %bb42, %bb38, %bb37, %bb33, %bb32, %bb30, %bb26, %bb24, %bb22, %bb21, %bb17, %bb16, %bb12, %bb10, %bb8, %bb7, %bb5, %bb3, %bb1
+ br i1 false, label %bb108, label %bb110
+
+bb108: ; preds = %bb106, %picosat_time_stamp.exit
+ br i1 false, label %bb, label %bb110
+
+bb110: ; preds = %bb108, %bb106
+ br i1 false, label %bb112, label %bb171
+
+bb112: ; preds = %bb110
+ br i1 false, label %bb114, label %bb113
+
+bb113: ; preds = %bb112
+ br label %bb114
+
+bb114: ; preds = %bb113, %bb112
+ br i1 false, label %bb.i.i35, label %bb1.i.i36
+
+bb.i.i35: ; preds = %bb114
+ unreachable
+
+bb1.i.i36: ; preds = %bb114
+ br i1 false, label %bb5.i.i.i41, label %bb6.i.i.i42
+
+bb5.i.i.i41: ; preds = %bb1.i.i36
+ unreachable
+
+bb6.i.i.i42: ; preds = %bb1.i.i36
+ br i1 false, label %bb7.i.i.i43, label %bb8.i.i.i44
+
+bb7.i.i.i43: ; preds = %bb6.i.i.i42
+ br label %bb8.i.i.i44
+
+bb8.i.i.i44: ; preds = %bb7.i.i.i43, %bb6.i.i.i42
+ br i1 false, label %picosat_init.exit, label %bb14.i.i
+
+bb14.i.i: ; preds = %bb8.i.i.i44
+ br label %picosat_init.exit
+
+picosat_init.exit: ; preds = %bb14.i.i, %bb8.i.i.i44
+ br i1 false, label %bb116, label %bb115
+
+bb115: ; preds = %picosat_init.exit
+ br label %bb116
+
+bb116: ; preds = %bb115, %picosat_init.exit
+ br i1 false, label %bb119, label %bb118
+
+bb118: ; preds = %bb116
+ br label %bb119
+
+bb119: ; preds = %bb118, %bb116
+ br i1 false, label %bb121, label %bb120
+
+bb120: ; preds = %bb119
+ br label %bb121
+
+bb121: ; preds = %bb120, %bb119
+ br i1 false, label %bb126, label %bb122
+
+bb122: ; preds = %bb121
+ br label %bb126
+
+bb126: ; preds = %bb122, %bb121
+ br i1 false, label %bb128, label %bb127
+
+bb127: ; preds = %bb126
+ br label %bb128
+
+bb128: ; preds = %bb127, %bb126
+ br label %SKIP_COMMENTS.i
+
+SKIP_COMMENTS.i.loopexit: ; preds = %bb.i149, %bb.i149
+ br label %SKIP_COMMENTS.i.backedge
+
+SKIP_COMMENTS.i: ; preds = %SKIP_COMMENTS.i.backedge, %bb128
+ br i1 false, label %bb.i149.preheader, label %bb3.i152
+
+bb.i149.preheader: ; preds = %SKIP_COMMENTS.i
+ br label %bb.i149
+
+bb.i149: ; preds = %bb.i149, %bb.i149.preheader
+ switch i32 0, label %bb.i149 [
+ i32 -1, label %SKIP_COMMENTS.i.loopexit
+ i32 10, label %SKIP_COMMENTS.i.loopexit
+ ]
+
+bb3.i152: ; preds = %SKIP_COMMENTS.i
+ br i1 false, label %bb4.i153, label %SKIP_COMMENTS.i.backedge
+
+SKIP_COMMENTS.i.backedge: ; preds = %bb3.i152, %SKIP_COMMENTS.i.loopexit
+ br label %SKIP_COMMENTS.i
+
+bb4.i153: ; preds = %bb3.i152
+ br i1 false, label %bb5.i154, label %bb129
+
+bb5.i154: ; preds = %bb4.i153
+ br i1 false, label %bb129, label %bb6.i155.preheader
+
+bb6.i155.preheader: ; preds = %bb5.i154
+ br label %bb6.i155
+
+bb6.i155: ; preds = %bb6.i155, %bb6.i155.preheader
+ br i1 false, label %bb7.i156, label %bb6.i155
+
+bb7.i156: ; preds = %bb6.i155
+ br i1 false, label %bb8.i157, label %bb129
+
+bb8.i157: ; preds = %bb7.i156
+ br i1 false, label %bb9.i158, label %bb129
+
+bb9.i158: ; preds = %bb8.i157
+ br i1 false, label %bb10.i159, label %bb129
+
+bb10.i159: ; preds = %bb9.i158
+ br i1 false, label %bb129, label %bb11.i160.preheader
+
+bb11.i160.preheader: ; preds = %bb10.i159
+ br label %bb11.i160
+
+bb11.i160: ; preds = %bb11.i160, %bb11.i160.preheader
+ br i1 false, label %bb12.i161, label %bb11.i160
+
+bb12.i161: ; preds = %bb11.i160
+ br i1 false, label %bb129, label %bb15.i165.preheader
+
+bb15.i165.preheader: ; preds = %bb12.i161
+ br label %bb15.i165
+
+bb14.i163: ; preds = %bb15.i165
+ br label %bb15.i165
+
+bb15.i165: ; preds = %bb14.i163, %bb15.i165.preheader
+ br i1 false, label %bb16.i166, label %bb14.i163
+
+bb16.i166: ; preds = %bb15.i165
+ br i1 false, label %bb129, label %bb17.i167.preheader
+
+bb17.i167.preheader: ; preds = %bb16.i166
+ br label %bb17.i167
+
+bb17.i167: ; preds = %bb17.i167, %bb17.i167.preheader
+ br i1 false, label %bb18.i168, label %bb17.i167
+
+bb18.i168: ; preds = %bb17.i167
+ br i1 false, label %bb129, label %bb21.i172.preheader
+
+bb21.i172.preheader: ; preds = %bb18.i168
+ br label %bb21.i172
+
+bb20.i170: ; preds = %bb21.i172
+ br label %bb21.i172
+
+bb21.i172: ; preds = %bb20.i170, %bb21.i172.preheader
+ br i1 false, label %bb22.i173, label %bb20.i170
+
+bb22.i173: ; preds = %bb21.i172
+ br i1 false, label %bb24.i175, label %bb129
+
+bb24.i175: ; preds = %bb22.i173
+ br i1 false, label %bb26.i180, label %bb25.i176
+
+bb25.i176: ; preds = %bb24.i175
+ br label %bb26.i180
+
+bb26.i180: ; preds = %bb25.i176, %bb24.i175
+ br i1 false, label %bb.i.i181, label %bb3.i.i184.preheader
+
+bb.i.i181: ; preds = %bb26.i180
+ br label %bb3.i.i184.preheader
+
+bb3.i.i184.preheader: ; preds = %bb.i.i181, %bb26.i180
+ br label %bb3.i.i184
+
+bb2.i.i183: ; preds = %bb3.i.i184
+ br label %bb3.i.i184
+
+bb3.i.i184: ; preds = %bb2.i.i183, %bb3.i.i184.preheader
+ br i1 false, label %bb2.i.i183, label %bb4.i.i185
+
+bb4.i.i185: ; preds = %bb3.i.i184
+ br i1 false, label %bb.i.i.i186, label %picosat_adjust.exit.i
+
+bb.i.i.i186: ; preds = %bb4.i.i185
+ br label %picosat_adjust.exit.i
+
+picosat_adjust.exit.i: ; preds = %bb.i.i.i186, %bb4.i.i185
+ br i1 false, label %bb28.i188, label %bb27.i187
+
+bb27.i187: ; preds = %picosat_adjust.exit.i
+ br label %bb28.i188
+
+bb28.i188: ; preds = %bb27.i187, %picosat_adjust.exit.i
+ br label %READ_LITERAL.i.outer
+
+READ_LITERAL.i.outer: ; preds = %READ_LITERAL.i.outer.backedge, %bb28.i188
+ br label %READ_LITERAL.i
+
+READ_LITERAL.i.loopexit: ; preds = %bb29.i189, %bb29.i189
+ br label %READ_LITERAL.i.backedge
+
+READ_LITERAL.i: ; preds = %READ_LITERAL.i.backedge, %READ_LITERAL.i.outer
+ switch i32 0, label %bb39.i199 [
+ i32 99, label %bb29.i189.preheader
+ i32 -1, label %bb33.i193
+ ]
+
+bb29.i189.preheader: ; preds = %READ_LITERAL.i
+ br label %bb29.i189
+
+bb29.i189: ; preds = %bb29.i189, %bb29.i189.preheader
+ switch i32 0, label %bb29.i189 [
+ i32 -1, label %READ_LITERAL.i.loopexit
+ i32 10, label %READ_LITERAL.i.loopexit
+ ]
+
+bb33.i193: ; preds = %READ_LITERAL.i
+ br i1 false, label %bb35.i195, label %parse.exit
+
+bb35.i195: ; preds = %bb33.i193
+ br i1 false, label %bb38.i198, label %parse.exit
+
+bb38.i198: ; preds = %bb35.i195
+ br label %parse.exit
+
+bb39.i199: ; preds = %READ_LITERAL.i
+ br i1 false, label %bb40.i200, label %READ_LITERAL.i.backedge
+
+READ_LITERAL.i.backedge: ; preds = %bb39.i199, %READ_LITERAL.i.loopexit
+ br label %READ_LITERAL.i
+
+bb40.i200: ; preds = %bb39.i199
+ br i1 false, label %bb41.i201, label %bb42.i202
+
+bb41.i201: ; preds = %bb40.i200
+ br label %bb42.i202
+
+bb42.i202: ; preds = %bb41.i201, %bb40.i200
+ br i1 false, label %parse.exit.loopexit, label %bb46.i.preheader
+
+bb46.i.preheader: ; preds = %bb42.i202
+ br label %bb46.i
+
+bb45.i: ; preds = %bb46.i
+ br label %bb46.i
+
+bb46.i: ; preds = %bb45.i, %bb46.i.preheader
+ br i1 false, label %bb47.i, label %bb45.i
+
+bb47.i: ; preds = %bb46.i
+ br i1 false, label %parse.exit.loopexit, label %bb50.i
+
+bb50.i: ; preds = %bb47.i
+ br i1 false, label %bb55.i, label %bb51.i
+
+bb51.i: ; preds = %bb50.i
+ br i1 false, label %parse.exit.loopexit, label %bb54.i
+
+bb54.i: ; preds = %bb51.i
+ br label %bb56.i
+
+bb55.i: ; preds = %bb50.i
+ br label %bb56.i
+
+bb56.i: ; preds = %bb55.i, %bb54.i
+ br i1 false, label %bb3.i11.i, label %bb.i8.i
+
+bb.i8.i: ; preds = %bb56.i
+ br i1 false, label %bb1.i9.i, label %bb3.i11.i
+
+bb1.i9.i: ; preds = %bb.i8.i
+ br i1 false, label %bb3.i11.i, label %bb2.i10.i
+
+bb2.i10.i: ; preds = %bb1.i9.i
+ unreachable
+
+bb3.i11.i: ; preds = %bb1.i9.i, %bb.i8.i, %bb56.i
+ br i1 false, label %bb7.i.i208, label %bb6.i.i207
+
+bb6.i.i207: ; preds = %bb3.i11.i
+ br label %READ_LITERAL.i.outer.backedge
+
+bb7.i.i208: ; preds = %bb3.i11.i
+ br i1 false, label %bb53.i.i.i.i.preheader, label %bb.i.i.i.i210.preheader
+
+bb.i.i.i.i210.preheader: ; preds = %bb7.i.i208
+ br label %bb.i.i.i.i210
+
+bb.i.i.i.i210: ; preds = %bb.i.i.i.i210.backedge, %bb.i.i.i.i210.preheader
+ br i1 false, label %bb17.i.i.i.i, label %bb18.i.i.i.i
+
+bb17.i.i.i.i: ; preds = %bb.i.i.i.i210
+ br label %bb18.i.i.i.i
+
+bb18.i.i.i.i: ; preds = %bb17.i.i.i.i, %bb.i.i.i.i210
+ br i1 false, label %bb19.i.i.i.i, label %bb20.i.i.i.i
+
+bb19.i.i.i.i: ; preds = %bb18.i.i.i.i
+ br label %bb20.i.i.i.i
+
+bb20.i.i.i.i: ; preds = %bb19.i.i.i.i, %bb18.i.i.i.i
+ br i1 false, label %bb21.i.i.i.i, label %bb22.i.i.i.i
+
+bb21.i.i.i.i: ; preds = %bb20.i.i.i.i
+ br label %bb22.i.i.i.i
+
+bb22.i.i.i.i: ; preds = %bb21.i.i.i.i, %bb20.i.i.i.i
+ br label %bb23.i.i.i.i.outer
+
+bb23.i.i.i.i.outer: ; preds = %bb28.i.i.i.i, %bb22.i.i.i.i
+ br label %bb23.i.i.i.i
+
+bb23.i.i.i.i: ; preds = %bb23.i.i.i.i, %bb23.i.i.i.i.outer
+ br i1 false, label %bb23.i.i.i.i, label %bb26.i.i.i.i.preheader
+
+bb26.i.i.i.i.preheader: ; preds = %bb23.i.i.i.i
+ br label %bb26.i.i.i.i
+
+bb26.i.i.i.i: ; preds = %bb26.i.i.i.i, %bb26.i.i.i.i.preheader
+ br i1 false, label %bb27.i.i.i.i, label %bb26.i.i.i.i
+
+bb27.i.i.i.i: ; preds = %bb26.i.i.i.i
+ br i1 false, label %bb28.i.i.i.i, label %bb29.i.i.i.i
+
+bb28.i.i.i.i: ; preds = %bb27.i.i.i.i
+ br label %bb23.i.i.i.i.outer
+
+bb29.i.i.i.i: ; preds = %bb27.i.i.i.i
+ br i1 false, label %bb33.i.i.i.i, label %bb44.i.i.i.i
+
+bb33.i.i.i.i: ; preds = %bb29.i.i.i.i
+ br i1 false, label %bb34.i.i.i.i, label %bb38.i.i.i.i
+
+bb34.i.i.i.i: ; preds = %bb33.i.i.i.i
+ br i1 false, label %bb37.i.i.i.i, label %bb35.i.i.i.i
+
+bb35.i.i.i.i: ; preds = %bb34.i.i.i.i
+ br label %bb37.i.i.i.i
+
+bb37.i.i.i.i: ; preds = %bb35.i.i.i.i, %bb34.i.i.i.i
+ br label %bb38.i.i.i.i
+
+bb38.i.i.i.i: ; preds = %bb37.i.i.i.i, %bb33.i.i.i.i
+ br i1 false, label %bb39.i.i.i.i, label %bb43.i.i.i.i
+
+bb39.i.i.i.i: ; preds = %bb38.i.i.i.i
+ br i1 false, label %bb42.i.i.i.i, label %bb40.i.i.i.i
+
+bb40.i.i.i.i: ; preds = %bb39.i.i.i.i
+ br label %bb42.i.i.i.i
+
+bb42.i.i.i.i: ; preds = %bb40.i.i.i.i, %bb39.i.i.i.i
+ br label %bb43.i.i.i.i
+
+bb43.i.i.i.i: ; preds = %bb42.i.i.i.i, %bb38.i.i.i.i
+ br label %bb.i.i.i.i210.backedge
+
+bb.i.i.i.i210.backedge: ; preds = %bb47.i.i.i.i, %bb44.i.i.i.i, %bb43.i.i.i.i
+ br label %bb.i.i.i.i210
+
+bb44.i.i.i.i: ; preds = %bb29.i.i.i.i
+ br i1 false, label %bb.i.i.i.i210.backedge, label %bb46.i.i.i.i
+
+bb46.i.i.i.i: ; preds = %bb44.i.i.i.i
+ br i1 false, label %bb47.i.i.i.i, label %bb53.i.i.i.i.preheader.loopexit
+
+bb53.i.i.i.i.preheader.loopexit: ; preds = %bb46.i.i.i.i
+ br label %bb53.i.i.i.i.preheader
+
+bb53.i.i.i.i.preheader: ; preds = %bb53.i.i.i.i.preheader.loopexit, %bb7.i.i208
+ br label %bb53.i.i.i.i
+
+bb47.i.i.i.i: ; preds = %bb46.i.i.i.i
+ br label %bb.i.i.i.i210.backedge
+
+bb50.i.i.i.i: ; preds = %bb53.i.i.i.i
+ br i1 false, label %bb51.i.i.i.i, label %bb52.i.i.i.i
+
+bb51.i.i.i.i: ; preds = %bb50.i.i.i.i
+ br label %bb52.i.i.i.i
+
+bb52.i.i.i.i: ; preds = %bb51.i.i.i.i, %bb50.i.i.i.i
+ br label %bb53.i.i.i.i
+
+bb53.i.i.i.i: ; preds = %bb52.i.i.i.i, %bb53.i.i.i.i.preheader
+ br i1 false, label %bb50.i.i.i.i, label %bb59.i.i.i.i.preheader
+
+bb59.i.i.i.i.preheader: ; preds = %bb53.i.i.i.i
+ br label %bb59.i.i.i.i
+
+bb55.i.i.i.i: ; preds = %bb59.i.i.i.i
+ br label %bb57.i.i.i.i
+
+bb56.i.i.i.i: ; preds = %bb57.i.i.i.i
+ br label %bb57.i.i.i.i
+
+bb57.i.i.i.i: ; preds = %bb56.i.i.i.i, %bb55.i.i.i.i
+ br i1 false, label %bb56.i.i.i.i, label %bb58.i.i.i.i
+
+bb58.i.i.i.i: ; preds = %bb57.i.i.i.i
+ br label %bb59.i.i.i.i
+
+bb59.i.i.i.i: ; preds = %bb58.i.i.i.i, %bb59.i.i.i.i.preheader
+ br i1 false, label %bb60.i.i.i.i, label %bb55.i.i.i.i
+
+bb60.i.i.i.i: ; preds = %bb59.i.i.i.i
+ br label %bb69.i.i.i.i
+
+bb61.i.i.i.i: ; preds = %bb69.i.i.i.i
+ br i1 false, label %bb68.i.i.i.i, label %bb62.i.i.i.i
+
+bb62.i.i.i.i: ; preds = %bb61.i.i.i.i
+ br i1 false, label %bb63.i.i.i.i, label %bb65.i.i.i.i
+
+bb63.i.i.i.i: ; preds = %bb62.i.i.i.i
+ br i1 false, label %bb.i.i12.i, label %bb65.i.i.i.i
+
+bb65.i.i.i.i: ; preds = %bb63.i.i.i.i, %bb62.i.i.i.i
+ br i1 false, label %bb.i.i12.i, label %bb67.i.i.i.i
+
+bb67.i.i.i.i: ; preds = %bb65.i.i.i.i
+ br label %bb68.i.i.i.i
+
+bb68.i.i.i.i: ; preds = %bb67.i.i.i.i, %bb61.i.i.i.i
+ br label %bb69.i.i.i.i
+
+bb69.i.i.i.i: ; preds = %bb68.i.i.i.i, %bb60.i.i.i.i
+ br i1 false, label %bb61.i.i.i.i, label %bb70.i.i.i.i
+
+bb70.i.i.i.i: ; preds = %bb69.i.i.i.i
+ br label %READ_LITERAL.i.outer.backedge
+
+bb.i.i12.i: ; preds = %bb65.i.i.i.i, %bb63.i.i.i.i
+ br i1 false, label %bb1.i.i.i213, label %bb5.i.i.i218
+
+bb1.i.i.i213: ; preds = %bb.i.i12.i
+ br i1 false, label %bb4.i.i.i217, label %bb2.i.i.i214
+
+bb2.i.i.i214: ; preds = %bb1.i.i.i213
+ br label %bb4.i.i.i217
+
+bb4.i.i.i217: ; preds = %bb2.i.i.i214, %bb1.i.i.i213
+ br label %bb5.i.i.i218
+
+bb5.i.i.i218: ; preds = %bb4.i.i.i217, %bb.i.i12.i
+ br label %READ_LITERAL.i.outer.backedge
+
+READ_LITERAL.i.outer.backedge: ; preds = %bb5.i.i.i218, %bb70.i.i.i.i, %bb6.i.i207
+ br label %READ_LITERAL.i.outer
+
+parse.exit.loopexit: ; preds = %bb51.i, %bb47.i, %bb42.i202
+ br label %parse.exit
+
+parse.exit: ; preds = %parse.exit.loopexit, %bb38.i198, %bb35.i195, %bb33.i193
+ br i1 false, label %bb130, label %bb129
+
+bb129: ; preds = %parse.exit, %bb22.i173, %bb18.i168, %bb16.i166, %bb12.i161, %bb10.i159, %bb9.i158, %bb8.i157, %bb7.i156, %bb5.i154, %bb4.i153
+ br label %bb170
+
+bb130: ; preds = %parse.exit
+ br i1 false, label %bb143, label %bb142.preheader
+
+bb142.preheader: ; preds = %bb130
+ br label %bb142
+
+bb132: ; preds = %bb142
+ br i1 false, label %bb137, label %bb133
+
+bb133: ; preds = %bb132
+ br i1 false, label %bb137, label %bb134
+
+bb134: ; preds = %bb133
+ br i1 false, label %bb137, label %bb135
+
+bb135: ; preds = %bb134
+ br i1 false, label %bb137, label %bb136
+
+bb136: ; preds = %bb135
+ br i1 false, label %bb137, label %bb138
+
+bb137: ; preds = %bb136, %bb135, %bb134, %bb133, %bb132
+ br label %bb141
+
+bb138: ; preds = %bb136
+ br i1 false, label %bb139, label %bb141
+
+bb139: ; preds = %bb138
+ br i1 false, label %bb2.i126, label %picosat_assume.exit
+
+bb2.i126: ; preds = %bb139
+ br i1 false, label %bb5.i130, label %bb3.i127
+
+bb3.i127: ; preds = %bb2.i126
+ br label %bb5.i130
+
+bb5.i130: ; preds = %bb3.i127, %bb2.i126
+ br label %picosat_assume.exit
+
+picosat_assume.exit: ; preds = %bb5.i130, %bb139
+ br i1 false, label %bb141, label %bb140
+
+bb140: ; preds = %picosat_assume.exit
+ br label %bb141
+
+bb141: ; preds = %bb140, %picosat_assume.exit, %bb138, %bb137
+ br label %bb142
+
+bb142: ; preds = %bb141, %bb142.preheader
+ br i1 false, label %bb132, label %bb143.loopexit
+
+bb143.loopexit: ; preds = %bb142
+ br label %bb143
+
+bb143: ; preds = %bb143.loopexit, %bb130
+ br i1 false, label %bb145, label %bb144
+
+bb144: ; preds = %bb143
+ br label %bb11.i
+
+bb5.i114: ; preds = %bb11.i
+ br label %bb11.i
+
+bb11.i: ; preds = %bb5.i114, %bb144
+ br i1 false, label %bb12.i, label %bb5.i114
+
+bb12.i: ; preds = %bb11.i
+ br i1 false, label %bb.i.i.i118, label %bb1.i.i.i119
+
+bb.i.i.i118: ; preds = %bb12.i
+ br label %int2lit.exit.i
+
+bb1.i.i.i119: ; preds = %bb12.i
+ br label %int2lit.exit.i
+
+int2lit.exit.i: ; preds = %bb1.i.i.i119, %bb.i.i.i118
+ br label %bb19.i
+
+bb13.i: ; preds = %bb19.i
+ br label %bb17.i
+
+bb14.i: ; preds = %bb17.i
+ br label %bb17.i
+
+bb17.i: ; preds = %bb14.i, %bb13.i
+ br i1 false, label %bb14.i, label %bb18.i
+
+bb18.i: ; preds = %bb17.i
+ br label %bb19.i
+
+bb19.i: ; preds = %bb18.i, %int2lit.exit.i
+ br i1 false, label %bb20.i, label %bb13.i
+
+bb20.i: ; preds = %bb19.i
+ br label %bb33.i
+
+bb24.i: ; preds = %bb33.i
+ br i1 false, label %bb29.i, label %bb25.i
+
+bb25.i: ; preds = %bb24.i
+ br label %bb27.i
+
+bb26.i: ; preds = %bb27.i
+ br label %bb27.i
+
+bb27.i: ; preds = %bb26.i, %bb25.i
+ br i1 false, label %bb26.i, label %bb28.i
+
+bb28.i: ; preds = %bb27.i
+ br label %bb29.i
+
+bb29.i: ; preds = %bb28.i, %bb24.i
+ br label %bb33.i
+
+bb33.i: ; preds = %bb29.i, %bb20.i
+ br i1 false, label %bb34.i, label %bb24.i
+
+bb34.i: ; preds = %bb33.i
+ br i1 false, label %bb.i.i58.i, label %bb1.i.i59.i
+
+bb.i.i58.i: ; preds = %bb34.i
+ br label %int2lit.exit63.i
+
+bb1.i.i59.i: ; preds = %bb34.i
+ br label %int2lit.exit63.i
+
+int2lit.exit63.i: ; preds = %bb1.i.i59.i, %bb.i.i58.i
+ br label %bb41.i
+
+bb35.i: ; preds = %bb41.i
+ br label %bb39.i
+
+bb36.i: ; preds = %bb39.i
+ br i1 false, label %bb38.i, label %bb37.i
+
+bb37.i: ; preds = %bb36.i
+ br label %bb38.i
+
+bb38.i: ; preds = %bb37.i, %bb36.i
+ br label %bb39.i
+
+bb39.i: ; preds = %bb38.i, %bb35.i
+ br i1 false, label %bb36.i, label %bb40.i
+
+bb40.i: ; preds = %bb39.i
+ br label %bb41.i
+
+bb41.i: ; preds = %bb40.i, %int2lit.exit63.i
+ br i1 false, label %bb42.i, label %bb35.i
+
+bb42.i: ; preds = %bb41.i
+ br label %bb44.i
+
+bb43.i: ; preds = %bb44.i
+ br label %bb44.i
+
+bb44.i: ; preds = %bb43.i, %bb42.i
+ br i1 false, label %bb43.i, label %picosat_print.exit
+
+picosat_print.exit: ; preds = %bb44.i
+ br label %bb167
+
+bb145: ; preds = %bb143
+ br i1 false, label %bb147, label %bb146
+
+bb146: ; preds = %bb145
+ br label %bb147
+
+bb147: ; preds = %bb146, %bb145
+ br i1 false, label %bb149, label %bb148
+
+bb148: ; preds = %bb147
+ br label %bb149
+
+bb149: ; preds = %bb148, %bb147
+ br i1 false, label %bb.i54, label %bb1.i55
+
+bb.i54: ; preds = %bb149
+ unreachable
+
+bb1.i55: ; preds = %bb149
+ br i1 false, label %bb.i.i56, label %bb1.i.i57
+
+bb.i.i56: ; preds = %bb1.i55
+ br label %bb1.i.i57
+
+bb1.i.i57: ; preds = %bb.i.i56, %bb1.i55
+ br i1 false, label %bb3.i.i59, label %bb2.i.i58
+
+bb2.i.i58: ; preds = %bb1.i.i57
+ br label %bb3.i.i59
+
+bb3.i.i59: ; preds = %bb2.i.i58, %bb1.i.i57
+ br i1 false, label %bb5.i.i61, label %sat.exit.i
+
+bb5.i.i61: ; preds = %bb3.i.i59
+ br i1 false, label %bb6.i.i65, label %bb1.i.i.i63
+
+bb1.i.i.i63: ; preds = %bb5.i.i61
+ br i1 false, label %sat.exit.i, label %bb6.i.i65
+
+bb6.i.i65: ; preds = %bb1.i.i.i63, %bb5.i.i61
+ br i1 false, label %bb8.i.i67, label %bb7.i.i66
+
+bb7.i.i66: ; preds = %bb6.i.i65
+ br label %bb8.i.i67
+
+bb8.i.i67: ; preds = %bb7.i.i66, %bb6.i.i65
+ br i1 false, label %bb10.i.i69, label %sat.exit.i
+
+bb10.i.i69: ; preds = %bb8.i.i67
+ br i1 false, label %bb11.i.i70, label %bb1.i61.i.i
+
+bb1.i61.i.i: ; preds = %bb10.i.i69
+ br i1 false, label %sat.exit.i, label %bb11.i.i70
+
+bb11.i.i70: ; preds = %bb1.i61.i.i, %bb10.i.i69
+ br label %bb13.i.i71.outer
+
+bb13.i.i71.outer: ; preds = %bb42.i.i, %bb11.i.i70
+ br label %bb13.i.i71
+
+bb13.i.i71: ; preds = %bb13.i.i71.backedge, %bb13.i.i71.outer
+ br i1 false, label %bb14.i.i72, label %bb15.i.i73
+
+bb14.i.i72: ; preds = %bb13.i.i71
+ br label %bb15.i.i73
+
+bb15.i.i73: ; preds = %bb14.i.i72, %bb13.i.i71
+ br i1 false, label %bb19.i.i, label %bb16.i.i
+
+bb16.i.i: ; preds = %bb15.i.i73
+ br i1 false, label %bb.i.i79.i.i, label %incincs.exit.i.i
+
+bb.i.i79.i.i: ; preds = %bb16.i.i
+ br label %bb4.i.i.i85.i.i
+
+bb.i.i.i80.i.i: ; preds = %bb4.i.i.i85.i.i
+ br i1 false, label %bb3.i.i.i83.i.i, label %bb1.i.i.i81.i.i
+
+bb1.i.i.i81.i.i: ; preds = %bb.i.i.i80.i.i
+ br i1 false, label %bb2.i.i.i82.i.i, label %bb3.i.i.i83.i.i
+
+bb2.i.i.i82.i.i: ; preds = %bb1.i.i.i81.i.i
+ br label %bb3.i.i.i83.i.i
+
+bb3.i.i.i83.i.i: ; preds = %bb2.i.i.i82.i.i, %bb1.i.i.i81.i.i, %bb.i.i.i80.i.i
+ br label %bb4.i.i.i85.i.i
+
+bb4.i.i.i85.i.i: ; preds = %bb3.i.i.i83.i.i, %bb.i.i79.i.i
+ br i1 false, label %crescore.exit.i.i.i.i, label %bb.i.i.i80.i.i
+
+crescore.exit.i.i.i.i: ; preds = %bb4.i.i.i85.i.i
+ br label %incincs.exit.i.i
+
+incincs.exit.i.i: ; preds = %crescore.exit.i.i.i.i, %bb16.i.i
+ br i1 false, label %bb13.i.i71.backedge, label %sat.exit.i.loopexit.loopexit
+
+bb13.i.i71.backedge: ; preds = %bb1.i55.i.i, %bb28.i.i, %incincs.exit.i.i
+ br label %bb13.i.i71
+
+bb19.i.i: ; preds = %bb15.i.i73
+ br i1 false, label %bb20.i.i, label %bb1.i68.i.i
+
+bb1.i68.i.i: ; preds = %bb19.i.i
+ br i1 false, label %sat.exit.i.loopexit.loopexit, label %bb20.i.i
+
+bb20.i.i: ; preds = %bb1.i68.i.i, %bb19.i.i
+ br i1 false, label %bb24.i.i, label %bb21.i.i
+
+bb21.i.i: ; preds = %bb20.i.i
+ br i1 false, label %bb22.i.i, label %bb24.i.i
+
+bb22.i.i: ; preds = %bb21.i.i
+ br i1 false, label %bb23.i.i, label %bb24.i.i
+
+bb23.i.i: ; preds = %bb22.i.i
+ br label %bb24.i.i
+
+bb24.i.i: ; preds = %bb23.i.i, %bb22.i.i, %bb21.i.i, %bb20.i.i
+ br i1 false, label %bb26.i.i, label %sat.exit.i.loopexit.loopexit
+
+bb26.i.i: ; preds = %bb24.i.i
+ br i1 false, label %bb27.i.i, label %bb33.i.i.loopexit
+
+bb27.i.i: ; preds = %bb26.i.i
+ br i1 false, label %bb33.i.i.loopexit, label %bb28.i.i
+
+bb28.i.i: ; preds = %bb27.i.i
+ br i1 false, label %bb1.i55.i.i, label %bb13.i.i71.backedge
+
+bb1.i55.i.i: ; preds = %bb28.i.i
+ br i1 false, label %bb29.i.i, label %bb13.i.i71.backedge
+
+bb29.i.i: ; preds = %bb1.i55.i.i
+ br i1 false, label %bb31.i.i, label %sat.exit.i.loopexit.loopexit2
+
+bb31.i.i: ; preds = %bb29.i.i
+ br i1 false, label %bb33.i.i, label %bb1.i48.i.i
+
+bb1.i48.i.i: ; preds = %bb31.i.i
+ br i1 false, label %sat.exit.i.loopexit.loopexit2, label %bb33.i.i
+
+bb33.i.i.loopexit: ; preds = %bb27.i.i, %bb26.i.i
+ br label %bb33.i.i
+
+bb33.i.i: ; preds = %bb33.i.i.loopexit, %bb1.i48.i.i, %bb31.i.i
+ br i1 false, label %bb34.i.i, label %bb35.i.i
+
+bb34.i.i: ; preds = %bb33.i.i
+ br i1 false, label %bb35.i.i, label %bb2.i44.i.i76
+
+bb2.i44.i.i76: ; preds = %bb34.i.i
+ br label %bb35.i.i
+
+bb35.i.i: ; preds = %bb2.i44.i.i76, %bb34.i.i, %bb33.i.i
+ br i1 false, label %bb1.i37.i.i, label %bb.i35.i.i
+
+bb.i35.i.i: ; preds = %bb35.i.i
+ br label %bb36.i.i
+
+bb1.i37.i.i: ; preds = %bb35.i.i
+ br i1 false, label %bb37.i.i, label %bb36.i.i
+
+bb36.i.i: ; preds = %bb1.i37.i.i, %bb.i35.i.i
+ br label %bb25.i23.i.i
+
+bb.i18.i.i: ; preds = %bb25.i23.i.i
+ br i1 false, label %bb24.i22.i.i, label %bb22.i19.i.i
+
+bb22.i19.i.i: ; preds = %bb.i18.i.i
+ br label %bb24.i22.i.i
+
+bb24.i22.i.i: ; preds = %bb22.i19.i.i, %bb.i18.i.i
+ br label %bb25.i23.i.i
+
+bb25.i23.i.i: ; preds = %bb24.i22.i.i, %bb36.i.i
+ br i1 false, label %bb.i18.i.i, label %bb26.i24.i.i
+
+bb26.i24.i.i: ; preds = %bb25.i23.i.i
+ br i1 false, label %bb27.i25.i.i, label %bb32.i.i.i
+
+bb27.i25.i.i: ; preds = %bb26.i24.i.i
+ br label %bb32.i.i.i
+
+bb32.i.i.i: ; preds = %bb27.i25.i.i, %bb26.i24.i.i
+ br label %bb64.i.i.i
+
+bb33.i.i.i: ; preds = %bb64.i.i.i
+ br i1 false, label %bb60.i.i.i, label %bb34.i.i.i
+
+bb34.i.i.i: ; preds = %bb33.i.i.i
+ br i1 false, label %bb38.i.i.i, label %bb60.i.i.i
+
+bb38.i.i.i: ; preds = %bb34.i.i.i
+ br i1 false, label %bb39.i.i.i, label %bb48.i.i.i
+
+bb39.i.i.i: ; preds = %bb38.i.i.i
+ br i1 false, label %bb48.i.i.i, label %bb40.i.i.i
+
+bb40.i.i.i: ; preds = %bb39.i.i.i
+ br i1 false, label %bb60.i.i.i, label %bb45.i.i.i
+
+bb45.i.i.i: ; preds = %bb40.i.i.i
+ br label %bb60.i.i.i
+
+bb48.i.i.i: ; preds = %bb39.i.i.i, %bb38.i.i.i
+ br i1 false, label %bb53.i.i.i, label %bb60.i.i.i
+
+bb53.i.i.i: ; preds = %bb48.i.i.i
+ br i1 false, label %bb60.i.i.i, label %bb58.i.i.i
+
+bb58.i.i.i: ; preds = %bb53.i.i.i
+ br i1 false, label %bb59.i.i.i, label %bb60.i.i.i
+
+bb59.i.i.i: ; preds = %bb58.i.i.i
+ br label %bb60.i.i.i
+
+bb60.i.i.i: ; preds = %bb59.i.i.i, %bb58.i.i.i, %bb53.i.i.i, %bb48.i.i.i, %bb45.i.i.i, %bb40.i.i.i, %bb34.i.i.i, %bb33.i.i.i
+ %lcollect.i.i.i.1 = phi i32 [ %lcollect.i.i.i.2, %bb34.i.i.i ], [ %lcollect.i.i.i.2, %bb48.i.i.i ], [ %lcollect.i.i.i.2, %bb58.i.i.i ], [ %lcollect.i.i.i.2, %bb59.i.i.i ], [ %lcollect.i.i.i.2, %bb53.i.i.i ], [ %lcollect.i.i.i.2, %bb33.i.i.i ], [ %lcollect.i.i.i.2, %bb40.i.i.i ], [ 0, %bb45.i.i.i ] ; <i32> [#uses=1]
+ br label %bb64.i.i.i
+
+bb64.i.i.i: ; preds = %bb60.i.i.i, %bb32.i.i.i
+ %lcollect.i.i.i.2 = phi i32 [ 0, %bb32.i.i.i ], [ %lcollect.i.i.i.1, %bb60.i.i.i ] ; <i32> [#uses=8]
+ br i1 false, label %bb65.i.i.i, label %bb33.i.i.i
+
+bb65.i.i.i: ; preds = %bb64.i.i.i
+ br i1 false, label %bb103.i.i.i.preheader, label %bb66.i.i.i.preheader
+
+bb66.i.i.i.preheader: ; preds = %bb65.i.i.i
+ br label %bb66.i.i.i
+
+bb66.i.i.i: ; preds = %bb66.i.i.i.backedge, %bb66.i.i.i.preheader
+ br i1 false, label %bb67.i.i.i, label %bb68.i.i.i
+
+bb67.i.i.i: ; preds = %bb66.i.i.i
+ br label %bb68.i.i.i
+
+bb68.i.i.i: ; preds = %bb67.i.i.i, %bb66.i.i.i
+ br i1 false, label %bb69.i.i.i, label %bb70.i.i.i
+
+bb69.i.i.i: ; preds = %bb68.i.i.i
+ br label %bb70.i.i.i
+
+bb70.i.i.i: ; preds = %bb69.i.i.i, %bb68.i.i.i
+ br i1 false, label %bb71.i.i.i, label %bb72.i.i.i
+
+bb71.i.i.i: ; preds = %bb70.i.i.i
+ br label %bb72.i.i.i
+
+bb72.i.i.i: ; preds = %bb71.i.i.i, %bb70.i.i.i
+ br label %bb73.i.i.i.outer
+
+bb73.i.i.i.outer: ; preds = %bb78.i.i.i, %bb72.i.i.i
+ br label %bb73.i.i.i
+
+bb73.i.i.i: ; preds = %bb73.i.i.i, %bb73.i.i.i.outer
+ br i1 false, label %bb73.i.i.i, label %bb76.i.i.i.preheader
+
+bb76.i.i.i.preheader: ; preds = %bb73.i.i.i
+ br label %bb76.i.i.i
+
+bb76.i.i.i: ; preds = %bb76.i.i.i, %bb76.i.i.i.preheader
+ br i1 false, label %bb77.i.i.i, label %bb76.i.i.i
+
+bb77.i.i.i: ; preds = %bb76.i.i.i
+ br i1 false, label %bb78.i.i.i, label %bb79.i.i.i
+
+bb78.i.i.i: ; preds = %bb77.i.i.i
+ br label %bb73.i.i.i.outer
+
+bb79.i.i.i: ; preds = %bb77.i.i.i
+ br i1 false, label %bb83.i.i.i, label %bb94.i.i.i
+
+bb83.i.i.i: ; preds = %bb79.i.i.i
+ br i1 false, label %bb84.i.i.i, label %bb88.i.i.i
+
+bb84.i.i.i: ; preds = %bb83.i.i.i
+ br i1 false, label %bb87.i.i.i, label %bb85.i.i.i
+
+bb85.i.i.i: ; preds = %bb84.i.i.i
+ br label %bb87.i.i.i
+
+bb87.i.i.i: ; preds = %bb85.i.i.i, %bb84.i.i.i
+ br label %bb88.i.i.i
+
+bb88.i.i.i: ; preds = %bb87.i.i.i, %bb83.i.i.i
+ br i1 false, label %bb89.i.i.i, label %bb93.i.i.i
+
+bb89.i.i.i: ; preds = %bb88.i.i.i
+ br i1 false, label %bb92.i.i.i, label %bb90.i.i.i
+
+bb90.i.i.i: ; preds = %bb89.i.i.i
+ br label %bb92.i.i.i
+
+bb92.i.i.i: ; preds = %bb90.i.i.i, %bb89.i.i.i
+ br label %bb93.i.i.i
+
+bb93.i.i.i: ; preds = %bb92.i.i.i, %bb88.i.i.i
+ br label %bb66.i.i.i.backedge
+
+bb66.i.i.i.backedge: ; preds = %bb97.i.i.i, %bb94.i.i.i, %bb93.i.i.i
+ br label %bb66.i.i.i
+
+bb94.i.i.i: ; preds = %bb79.i.i.i
+ br i1 false, label %bb66.i.i.i.backedge, label %bb96.i.i.i
+
+bb96.i.i.i: ; preds = %bb94.i.i.i
+ br i1 false, label %bb97.i.i.i, label %bb103.i.i.i.preheader.loopexit
+
+bb103.i.i.i.preheader.loopexit: ; preds = %bb96.i.i.i
+ br label %bb103.i.i.i.preheader
+
+bb103.i.i.i.preheader: ; preds = %bb103.i.i.i.preheader.loopexit, %bb65.i.i.i
+ br label %bb103.i.i.i
+
+bb97.i.i.i: ; preds = %bb96.i.i.i
+ br label %bb66.i.i.i.backedge
+
+bb100.i.i.i: ; preds = %bb103.i.i.i
+ br i1 false, label %bb101.i.i.i, label %bb102.i.i.i
+
+bb101.i.i.i: ; preds = %bb100.i.i.i
+ br label %bb102.i.i.i
+
+bb102.i.i.i: ; preds = %bb101.i.i.i, %bb100.i.i.i
+ br label %bb103.i.i.i
+
+bb103.i.i.i: ; preds = %bb102.i.i.i, %bb103.i.i.i.preheader
+ br i1 false, label %bb100.i.i.i, label %bb109.i.i.i.preheader
+
+bb109.i.i.i.preheader: ; preds = %bb103.i.i.i
+ br label %bb109.i.i.i
+
+bb105.i.i.i: ; preds = %bb109.i.i.i
+ br label %bb107.i.i.i
+
+bb106.i.i.i: ; preds = %bb107.i.i.i
+ br label %bb107.i.i.i
+
+bb107.i.i.i: ; preds = %bb106.i.i.i, %bb105.i.i.i
+ br i1 false, label %bb106.i.i.i, label %bb108.i.i.i
+
+bb108.i.i.i: ; preds = %bb107.i.i.i
+ br label %bb109.i.i.i
+
+bb109.i.i.i: ; preds = %bb108.i.i.i, %bb109.i.i.i.preheader
+ br i1 false, label %bb110.i.i.i, label %bb105.i.i.i
+
+bb110.i.i.i: ; preds = %bb109.i.i.i
+ %0 = sub i32 0, %lcollect.i.i.i.2 ; <i32> [#uses=1]
+ %1 = add i32 %0, 1 ; <i32> [#uses=1]
+ br label %bb113.i.i.i
+
+bb111.i.i.i: ; preds = %bb113.i.i.i
+ br i1 false, label %bb114.i.i.i, label %bb113.i.i.i
+
+bb113.i.i.i: ; preds = %bb111.i.i.i, %bb110.i.i.i
+ br i1 false, label %bb111.i.i.i, label %bb114.i.i.i
+
+bb114.i.i.i: ; preds = %bb113.i.i.i, %bb111.i.i.i
+ %2 = lshr i32 %1, 1 ; <i32> [#uses=2]
+ br i1 false, label %bb116.i.i.i, label %bb124.i.i.i
+
+bb116.i.i.i: ; preds = %bb114.i.i.i
+ br i1 false, label %bb117.i.i.i.preheader, label %bb122.i.i.i.preheader
+
+bb122.i.i.i.preheader: ; preds = %bb116.i.i.i
+ br label %bb122.i.i.i
+
+bb117.i.i.i.preheader: ; preds = %bb116.i.i.i
+ br label %bb117.i.i.i
+
+bb117.i.i.i: ; preds = %bb118.i.i.i, %bb117.i.i.i.preheader
+ %target.i.i.i.1 = phi i32 [ %3, %bb118.i.i.i ], [ %2, %bb117.i.i.i.preheader ] ; <i32> [#uses=1]
+ %3 = add i32 %target.i.i.i.1, 1 ; <i32> [#uses=2]
+ br i1 false, label %bb118.i.i.i, label %bb124.i.i.i.loopexit
+
+bb118.i.i.i: ; preds = %bb117.i.i.i
+ br i1 false, label %bb117.i.i.i, label %bb124.i.i.i.loopexit
+
+bb122.i.i.i: ; preds = %bb123.i.i.i, %bb122.i.i.i.preheader
+ %target.i.i.i.2 = phi i32 [ %4, %bb123.i.i.i ], [ %2, %bb122.i.i.i.preheader ] ; <i32> [#uses=2]
+ br i1 false, label %bb124.i.i.i.loopexit1, label %bb123.i.i.i
+
+bb123.i.i.i: ; preds = %bb122.i.i.i
+ %4 = add i32 %target.i.i.i.2, -1 ; <i32> [#uses=1]
+ br i1 false, label %bb122.i.i.i, label %bb124.i.i.i.loopexit1
+
+bb124.i.i.i.loopexit: ; preds = %bb118.i.i.i, %bb117.i.i.i
+ br label %bb124.i.i.i
+
+bb124.i.i.i.loopexit1: ; preds = %bb123.i.i.i, %bb122.i.i.i
+ br label %bb124.i.i.i
+
+bb124.i.i.i: ; preds = %bb124.i.i.i.loopexit1, %bb124.i.i.i.loopexit, %bb114.i.i.i
+ %target.i.i.i.0 = phi i32 [ 0, %bb114.i.i.i ], [ %3, %bb124.i.i.i.loopexit ], [ %target.i.i.i.2, %bb124.i.i.i.loopexit1 ] ; <i32> [#uses=0]
+ br label %bb132.i.i.i.outer
+
+bb125.i.i.i: ; preds = %bb132.i.i.i
+ br i1 false, label %bb132.i.i.i, label %bb130.i.i.i
+
+bb130.i.i.i: ; preds = %bb125.i.i.i
+ br label %bb132.i.i.i.outer
+
+bb132.i.i.i.outer: ; preds = %bb130.i.i.i, %bb124.i.i.i
+ br label %bb132.i.i.i
+
+bb132.i.i.i: ; preds = %bb132.i.i.i.outer, %bb125.i.i.i
+ br i1 false, label %bb125.i.i.i, label %bb133.i.i.i
+
+bb133.i.i.i: ; preds = %bb132.i.i.i
+ br i1 false, label %bb136.i.i.i, label %bb134.i.i.i
+
+bb134.i.i.i: ; preds = %bb133.i.i.i
+ br i1 false, label %bb136.i.i.i, label %bb135.i.i.i
+
+bb135.i.i.i: ; preds = %bb134.i.i.i
+ br label %bb136.i.i.i
+
+bb136.i.i.i: ; preds = %bb135.i.i.i, %bb134.i.i.i, %bb133.i.i.i
+ br i1 false, label %bb137.i.i.i, label %bb37.i.i
+
+bb137.i.i.i: ; preds = %bb136.i.i.i
+ br label %bb37.i.i
+
+bb37.i.i: ; preds = %bb137.i.i.i, %bb136.i.i.i, %bb1.i37.i.i
+ br i1 false, label %bb40.i.i, label %bb38.i.i
+
+bb38.i.i: ; preds = %bb37.i.i
+ br i1 false, label %bb39.i.i, label %bb40.i.i
+
+bb39.i.i: ; preds = %bb38.i.i
+ br i1 false, label %bb17.i.i.i, label %bb3.i12.i.i
+
+bb3.i12.i.i: ; preds = %bb39.i.i
+ br label %bb5.i14.i.i
+
+bb5.i14.i.i: ; preds = %bb8.i.i.i79, %bb3.i12.i.i
+ br i1 false, label %bb6.i15.i.i, label %bb9.i.i.i80
+
+bb6.i15.i.i: ; preds = %bb5.i14.i.i
+ br i1 false, label %bb7.i.i.i78, label %bb9.i.i.i80
+
+bb7.i.i.i78: ; preds = %bb6.i15.i.i
+ br i1 false, label %bb9.i.i.i80, label %bb8.i.i.i79
+
+bb8.i.i.i79: ; preds = %bb7.i.i.i78
+ br i1 false, label %bb9.i.i.i80, label %bb5.i14.i.i
+
+bb9.i.i.i80: ; preds = %bb8.i.i.i79, %bb7.i.i.i78, %bb6.i15.i.i, %bb5.i14.i.i
+ br i1 false, label %bb16.i.i.i, label %bb10.i.i.i81
+
+bb10.i.i.i81: ; preds = %bb9.i.i.i80
+ br i1 false, label %bb11.i.i.i, label %bb15.i.i.i
+
+bb11.i.i.i: ; preds = %bb10.i.i.i81
+ br i1 false, label %bb16.i.i.i, label %bb15.i.i.i
+
+bb15.i.i.i: ; preds = %bb11.i.i.i, %bb10.i.i.i81
+ br label %bb16.i.i.i
+
+bb16.i.i.i: ; preds = %bb15.i.i.i, %bb11.i.i.i, %bb9.i.i.i80
+ br label %bb17.i.i.i
+
+bb17.i.i.i: ; preds = %bb16.i.i.i, %bb39.i.i
+ br i1 false, label %bb18.i.i.i, label %bb25.i.i.i
+
+bb18.i.i.i: ; preds = %bb17.i.i.i
+ br i1 false, label %bb24.i.i.i, label %bb23.i.i.i
+
+bb23.i.i.i: ; preds = %bb18.i.i.i
+ br label %bb24.i.i.i
+
+bb24.i.i.i: ; preds = %bb23.i.i.i, %bb18.i.i.i
+ br label %bb29.i.i.i
+
+bb25.i.i.i: ; preds = %bb17.i.i.i
+ br i1 false, label %bb29.i.i.i, label %bb27.i.i.i
+
+bb27.i.i.i: ; preds = %bb25.i.i.i
+ br i1 false, label %bb29.i.i.i, label %bb28.i.i.i
+
+bb28.i.i.i: ; preds = %bb27.i.i.i
+ br i1 false, label %bb29.i.i.i, label %bb.i4.i.i.i
+
+bb.i4.i.i.i: ; preds = %bb28.i.i.i
+ br i1 false, label %bb4.i.i16.i.i, label %bb29.i.i.i
+
+bb4.i.i16.i.i: ; preds = %bb.i4.i.i.i
+ br label %bb29.i.i.i
+
+bb29.i.i.i: ; preds = %bb4.i.i16.i.i, %bb.i4.i.i.i, %bb28.i.i.i, %bb27.i.i.i, %bb25.i.i.i, %bb24.i.i.i
+ br label %bb40.i.i
+
+bb40.i.i: ; preds = %bb29.i.i.i, %bb38.i.i, %bb37.i.i
+ br i1 false, label %bb9.i.i.i.i.preheader, label %bb2.i.i.i87
+
+bb9.i.i.i.i.preheader: ; preds = %bb40.i.i
+ br label %bb9.i.i.i.i
+
+bb.i.i.i.i84: ; preds = %bb9.i.i.i.i
+ switch i8 0, label %bb8.i.i.i.i [
+ i8 -1, label %bb1.i.i.i.i85
+ i8 1, label %bb9.i.i.i.i
+ ]
+
+bb1.i.i.i.i85: ; preds = %bb.i.i.i.i84
+ br i1 false, label %bb5.i.i.i.i, label %bb2.i.i.i87
+
+bb5.i.i.i.i: ; preds = %bb1.i.i.i.i85
+ br label %bb2.i.i.i87
+
+bb8.i.i.i.i: ; preds = %bb.i.i.i.i84
+ br i1 false, label %bb2.i.i.i87, label %bb6.i.i.i95
+
+bb9.i.i.i.i: ; preds = %bb.i.i.i.i84, %bb9.i.i.i.i.preheader
+ br i1 false, label %bb.i.i.i.i84, label %bb10.i.i.i.i
+
+bb10.i.i.i.i: ; preds = %bb9.i.i.i.i
+ br label %bb2.i.i.i87
+
+bb2.i.i.i87: ; preds = %bb10.i.i.i.i, %bb8.i.i.i.i, %bb5.i.i.i.i, %bb1.i.i.i.i85, %bb40.i.i
+ br i1 false, label %bb3.i.i.i88, label %decide.exit.i.i
+
+bb3.i.i.i88: ; preds = %bb2.i.i.i87
+ br i1 false, label %bb4.i.i.i90, label %bb1.i23.i.i.i
+
+bb1.i23.i.i.i: ; preds = %bb3.i.i.i88
+ br i1 false, label %decide.exit.i.i, label %bb4.i.i.i90
+
+bb4.i.i.i90: ; preds = %bb1.i23.i.i.i, %bb3.i.i.i88
+ br i1 false, label %bb1.i9.i.i.i, label %bb5.i.i.i94
+
+bb1.i9.i.i.i: ; preds = %bb4.i.i.i90
+ br i1 false, label %bb.i.i27.i.i.i.i, label %bb1.i.i28.i.i.i.i
+
+bb.i.i27.i.i.i.i: ; preds = %bb1.i9.i.i.i
+ br label %int2lit.exit32.i.i.i.i
+
+bb1.i.i28.i.i.i.i: ; preds = %bb1.i9.i.i.i
+ br label %int2lit.exit32.i.i.i.i
+
+int2lit.exit32.i.i.i.i: ; preds = %bb1.i.i28.i.i.i.i, %bb.i.i27.i.i.i.i
+ br i1 false, label %bb8.i19.i.i.i, label %bb2.i.i.i.i91
+
+bb2.i.i.i.i91: ; preds = %int2lit.exit32.i.i.i.i
+ br label %bb4.i.i.i.i
+
+bb3.i.i.i.i92: ; preds = %gcd.exit.i.i.i.i
+ br label %bb4.i.i.i.i
+
+bb4.i.i.i.i: ; preds = %bb3.i.i.i.i92, %bb2.i.i.i.i91
+ br label %bb3.i.i13.i.i.i
+
+bb2.i.i12.i.i.i: ; preds = %bb3.i.i13.i.i.i
+ br label %bb3.i.i13.i.i.i
+
+bb3.i.i13.i.i.i: ; preds = %bb2.i.i12.i.i.i, %bb4.i.i.i.i
+ br i1 false, label %gcd.exit.i.i.i.i, label %bb2.i.i12.i.i.i
+
+gcd.exit.i.i.i.i: ; preds = %bb3.i.i13.i.i.i
+ br i1 false, label %bb5.i14.i.i.i.preheader, label %bb3.i.i.i.i92
+
+bb5.i14.i.i.i.preheader: ; preds = %gcd.exit.i.i.i.i
+ br label %bb5.i14.i.i.i
+
+bb5.i14.i.i.i: ; preds = %int2lit.exit.i.i.i.i, %bb5.i14.i.i.i.preheader
+ br i1 false, label %bb.i.i.i17.i.i.i, label %bb1.i.i.i18.i.i.i
+
+bb.i.i.i17.i.i.i: ; preds = %bb5.i14.i.i.i
+ br label %int2lit.exit.i.i.i.i
+
+bb1.i.i.i18.i.i.i: ; preds = %bb5.i14.i.i.i
+ br label %int2lit.exit.i.i.i.i
+
+int2lit.exit.i.i.i.i: ; preds = %bb1.i.i.i18.i.i.i, %bb.i.i.i17.i.i.i
+ br i1 false, label %bb8.i19.i.i.i.loopexit, label %bb5.i14.i.i.i
+
+bb8.i19.i.i.i.loopexit: ; preds = %int2lit.exit.i.i.i.i
+ br label %bb8.i19.i.i.i
+
+bb8.i19.i.i.i: ; preds = %bb8.i19.i.i.i.loopexit, %int2lit.exit32.i.i.i.i
+ br i1 false, label %bb5.i.i.i94, label %bb6.i.i.i95
+
+bb5.i.i.i94: ; preds = %bb8.i19.i.i.i, %bb4.i.i.i90
+ br label %bb.i2.i.i.i
+
+bb.i2.i.i.i: ; preds = %hpop.exit.i.i.i.i, %bb5.i.i.i94
+ br i1 false, label %hpop.exit.i.i.i.i, label %bb1.i.i.i.i.i
+
+bb1.i.i.i.i.i: ; preds = %bb.i2.i.i.i
+ br label %bb2.i.i.i.i.i
+
+bb2.i.i.i.i.i: ; preds = %bb11.i.i.i.i.i, %bb1.i.i.i.i.i
+ br i1 false, label %bb3.i.i.i.i.i, label %bb12.i.i.i.i.i
+
+bb3.i.i.i.i.i: ; preds = %bb2.i.i.i.i.i
+ br i1 false, label %bb4.i.i.i.i.i, label %bb1.i.i.i.i.i.i
+
+bb1.i.i.i.i.i.i: ; preds = %bb3.i.i.i.i.i
+ br i1 false, label %bb8.i.i.i.i.i, label %bb3.i.i.i.i.i.i
+
+bb3.i.i.i.i.i.i: ; preds = %bb1.i.i.i.i.i.i
+ br i1 false, label %bb4.i.i.i.i.i, label %bb8.i.i.i.i.i
+
+bb4.i.i.i.i.i: ; preds = %bb3.i.i.i.i.i.i, %bb3.i.i.i.i.i
+ br i1 false, label %bb5.i.i.i.i.i, label %bb11.i.i.i.i.i
+
+bb5.i.i.i.i.i: ; preds = %bb4.i.i.i.i.i
+ br i1 false, label %bb6.i.i.i.i.i, label %bb1.i21.i.i.i.i.i
+
+bb1.i21.i.i.i.i.i: ; preds = %bb5.i.i.i.i.i
+ br i1 false, label %bb11.i.i.i.i.i, label %bb3.i24.i.i.i.i.i
+
+bb3.i24.i.i.i.i.i: ; preds = %bb1.i21.i.i.i.i.i
+ br i1 false, label %bb6.i.i.i.i.i, label %bb11.i.i.i.i.i
+
+bb6.i.i.i.i.i: ; preds = %bb3.i24.i.i.i.i.i, %bb5.i.i.i.i.i
+ br label %bb11.i.i.i.i.i
+
+bb8.i.i.i.i.i: ; preds = %bb3.i.i.i.i.i.i, %bb1.i.i.i.i.i.i
+ br i1 false, label %bb9.i.i.i.i.i, label %bb12.i.i.i.i.i
+
+bb9.i.i.i.i.i: ; preds = %bb8.i.i.i.i.i
+ br i1 false, label %bb11.i.i.i.i.i, label %bb1.i8.i.i.i.i.i
+
+bb1.i8.i.i.i.i.i: ; preds = %bb9.i.i.i.i.i
+ br i1 false, label %bb12.i.i.i.i.i, label %bb3.i11.i.i.i.i.i
+
+bb3.i11.i.i.i.i.i: ; preds = %bb1.i8.i.i.i.i.i
+ br i1 false, label %bb11.i.i.i.i.i, label %bb12.i.i.i.i.i
+
+bb11.i.i.i.i.i: ; preds = %bb3.i11.i.i.i.i.i, %bb9.i.i.i.i.i, %bb6.i.i.i.i.i, %bb3.i24.i.i.i.i.i, %bb1.i21.i.i.i.i.i, %bb4.i.i.i.i.i
+ br label %bb2.i.i.i.i.i
+
+bb12.i.i.i.i.i: ; preds = %bb3.i11.i.i.i.i.i, %bb1.i8.i.i.i.i.i, %bb8.i.i.i.i.i, %bb2.i.i.i.i.i
+ br label %hpop.exit.i.i.i.i
+
+hpop.exit.i.i.i.i: ; preds = %bb12.i.i.i.i.i, %bb.i2.i.i.i
+ br i1 false, label %sdecide.exit.i.i.i, label %bb.i2.i.i.i
+
+sdecide.exit.i.i.i: ; preds = %hpop.exit.i.i.i.i
+ br label %bb6.i.i.i95
+
+bb6.i.i.i95: ; preds = %sdecide.exit.i.i.i, %bb8.i19.i.i.i, %bb8.i.i.i.i
+ br label %decide.exit.i.i
+
+decide.exit.i.i: ; preds = %bb6.i.i.i95, %bb1.i23.i.i.i, %bb2.i.i.i87
+ br i1 false, label %bb42.i.i, label %sat.exit.i.loopexit.loopexit2
+
+bb42.i.i: ; preds = %decide.exit.i.i
+ br label %bb13.i.i71.outer
+
+sat.exit.i.loopexit.loopexit: ; preds = %bb24.i.i, %bb1.i68.i.i, %incincs.exit.i.i
+ br label %sat.exit.i.loopexit
+
+sat.exit.i.loopexit.loopexit2: ; preds = %decide.exit.i.i, %bb1.i48.i.i, %bb29.i.i
+ br label %sat.exit.i.loopexit
+
+sat.exit.i.loopexit: ; preds = %sat.exit.i.loopexit.loopexit2, %sat.exit.i.loopexit.loopexit
+ br label %sat.exit.i
+
+sat.exit.i: ; preds = %sat.exit.i.loopexit, %bb1.i61.i.i, %bb8.i.i67, %bb1.i.i.i63, %bb3.i.i59
+ br i1 false, label %bb7.i, label %bb2.i96
+
+bb2.i96: ; preds = %sat.exit.i
+ switch i32 0, label %bb5.i99 [
+ i32 10, label %bb4.i98
+ i32 20, label %bb6.i100
+ ]
+
+bb4.i98: ; preds = %bb2.i96
+ br label %bb6.i100
+
+bb5.i99: ; preds = %bb2.i96
+ br label %bb6.i100
+
+bb6.i100: ; preds = %bb5.i99, %bb4.i98, %bb2.i96
+ br label %bb7.i
+
+bb7.i: ; preds = %bb6.i100, %sat.exit.i
+ br i1 false, label %bb.i1.i, label %picosat_sat.exit
+
+bb.i1.i: ; preds = %bb7.i
+ br label %picosat_sat.exit
+
+picosat_sat.exit: ; preds = %bb.i1.i, %bb7.i
+ switch i32 0, label %bb166 [
+ i32 20, label %bb150
+ i32 10, label %bb163
+ ]
+
+bb150: ; preds = %picosat_sat.exit
+ br i1 false, label %bb152, label %bb151
+
+bb151: ; preds = %bb150
+ br label %bb152
+
+bb152: ; preds = %bb151, %bb150
+ br i1 false, label %bb154, label %bb153
+
+bb153: ; preds = %bb152
+ br label %bb154
+
+bb154: ; preds = %bb153, %bb152
+ br i1 false, label %bb157, label %bb156
+
+bb156: ; preds = %bb154
+ br label %bb157
+
+bb157: ; preds = %bb156, %bb154
+ br i1 false, label %bb159, label %bb158
+
+bb158: ; preds = %bb157
+ br label %bb159
+
+bb159: ; preds = %bb158, %bb157
+ br i1 false, label %bb167, label %bb160
+
+bb160: ; preds = %bb159
+ br label %bb167
+
+bb163: ; preds = %picosat_sat.exit
+ br i1 false, label %bb167, label %bb164
+
+bb164: ; preds = %bb163
+ br label %bb4.i
+
+bb.i11: ; preds = %bb4.i
+ br i1 false, label %bb.i.i12, label %bb1.i.i14
+
+bb.i.i12: ; preds = %bb.i11
+ unreachable
+
+bb1.i.i14: ; preds = %bb.i11
+ br i1 false, label %bb3.i.i16, label %bb2.i.i15
+
+bb2.i.i15: ; preds = %bb1.i.i14
+ unreachable
+
+bb3.i.i16: ; preds = %bb1.i.i14
+ br i1 false, label %bb3.i, label %bb7.i.i
+
+bb7.i.i: ; preds = %bb3.i.i16
+ br i1 false, label %bb.i.i.i.i17, label %bb1.i.i.i.i18
+
+bb.i.i.i.i17: ; preds = %bb7.i.i
+ br label %int2lit.exit.i.i
+
+bb1.i.i.i.i18: ; preds = %bb7.i.i
+ br label %int2lit.exit.i.i
+
+int2lit.exit.i.i: ; preds = %bb1.i.i.i.i18, %bb.i.i.i.i17
+ br i1 false, label %bb3.i, label %bb9.i.i
+
+bb9.i.i: ; preds = %int2lit.exit.i.i
+ br label %bb3.i
+
+bb3.i: ; preds = %bb9.i.i, %int2lit.exit.i.i, %bb3.i.i16
+ br label %bb4.i
+
+bb4.i: ; preds = %bb3.i, %bb164
+ br i1 false, label %bb5.i, label %bb.i11
+
+bb5.i: ; preds = %bb4.i
+ br i1 false, label %bb6.i, label %bb167
+
+bb6.i: ; preds = %bb5.i
+ br label %bb167
+
+bb166: ; preds = %picosat_sat.exit
+ br label %bb167
+
+bb167: ; preds = %bb166, %bb6.i, %bb5.i, %bb163, %bb160, %bb159, %picosat_print.exit
+ br i1 false, label %bb168, label %bb170
+
+bb168: ; preds = %bb167
+ br i1 false, label %bb170, label %bb169
+
+bb169: ; preds = %bb168
+ br i1 false, label %bb.i7, label %picosat_time_stamp.exit9
+
+bb.i7: ; preds = %bb169
+ br label %picosat_time_stamp.exit9
+
+picosat_time_stamp.exit9: ; preds = %bb.i7, %bb169
+ br label %bb170
+
+bb170: ; preds = %picosat_time_stamp.exit9, %bb168, %bb167, %bb129
+ br i1 false, label %bb.i.i3, label %picosat_leave.exit
+
+bb.i.i3: ; preds = %bb170
+ br label %picosat_leave.exit
+
+picosat_leave.exit: ; preds = %bb.i.i3, %bb170
+ br i1 false, label %bb1.i.i, label %bb.i.i
+
+bb.i.i: ; preds = %picosat_leave.exit
+ unreachable
+
+bb1.i.i: ; preds = %picosat_leave.exit
+ br label %bb9.i.i.i
+
+bb3.i.i.i: ; preds = %bb9.i.i.i
+ br i1 false, label %bb5.i.i.i, label %bb4.i.i.i
+
+bb4.i.i.i: ; preds = %bb3.i.i.i
+ br label %bb5.i.i.i
+
+bb5.i.i.i: ; preds = %bb4.i.i.i, %bb3.i.i.i
+ br label %bb9.i.i.i
+
+bb9.i.i.i: ; preds = %bb5.i.i.i, %bb1.i.i
+ br i1 false, label %bb10.i.i.i, label %bb3.i.i.i
+
+bb10.i.i.i: ; preds = %bb9.i.i.i
+ br i1 false, label %delete.exit.i.i.i, label %bb1.i.i.i.i
+
+bb1.i.i.i.i: ; preds = %bb10.i.i.i
+ br label %delete.exit.i.i.i
+
+delete.exit.i.i.i: ; preds = %bb1.i.i.i.i, %bb10.i.i.i
+ br i1 false, label %delete_clauses.exit.i.i, label %bb1.i7.i.i.i
+
+bb1.i7.i.i.i: ; preds = %delete.exit.i.i.i
+ br label %delete_clauses.exit.i.i
+
+delete_clauses.exit.i.i: ; preds = %bb1.i7.i.i.i, %delete.exit.i.i.i
+ br label %bb3.i.i
+
+bb2.i.i: ; preds = %bb3.i.i
+ br i1 false, label %lrelease.exit.i.i, label %bb1.i.i23.i.i
+
+bb1.i.i23.i.i: ; preds = %bb2.i.i
+ br label %lrelease.exit.i.i
+
+lrelease.exit.i.i: ; preds = %bb1.i.i23.i.i, %bb2.i.i
+ br label %bb3.i.i
+
+bb3.i.i: ; preds = %lrelease.exit.i.i, %delete_clauses.exit.i.i
+ br i1 false, label %bb4.i.i, label %bb2.i.i
+
+bb4.i.i: ; preds = %bb3.i.i
+ br i1 false, label %delete.exit214.i.i, label %bb1.i208.i.i
+
+bb1.i208.i.i: ; preds = %bb4.i.i
+ br label %delete.exit214.i.i
+
+delete.exit214.i.i: ; preds = %bb1.i208.i.i, %bb4.i.i
+ br i1 false, label %delete.exit203.i.i, label %bb1.i197.i.i
+
+bb1.i197.i.i: ; preds = %delete.exit214.i.i
+ br label %delete.exit203.i.i
+
+delete.exit203.i.i: ; preds = %bb1.i197.i.i, %delete.exit214.i.i
+ br i1 false, label %delete.exit192.i.i, label %bb1.i186.i.i
+
+bb1.i186.i.i: ; preds = %delete.exit203.i.i
+ br label %delete.exit192.i.i
+
+delete.exit192.i.i: ; preds = %bb1.i186.i.i, %delete.exit203.i.i
+ br i1 false, label %delete.exit181.i.i, label %bb1.i175.i.i
+
+bb1.i175.i.i: ; preds = %delete.exit192.i.i
+ br label %delete.exit181.i.i
+
+delete.exit181.i.i: ; preds = %bb1.i175.i.i, %delete.exit192.i.i
+ br i1 false, label %delete.exit170.i.i, label %bb1.i164.i.i
+
+bb1.i164.i.i: ; preds = %delete.exit181.i.i
+ br label %delete.exit170.i.i
+
+delete.exit170.i.i: ; preds = %bb1.i164.i.i, %delete.exit181.i.i
+ br i1 false, label %delete.exit159.i.i, label %bb1.i153.i.i
+
+bb1.i153.i.i: ; preds = %delete.exit170.i.i
+ br label %delete.exit159.i.i
+
+delete.exit159.i.i: ; preds = %bb1.i153.i.i, %delete.exit170.i.i
+ br i1 false, label %delete.exit148.i.i, label %bb1.i142.i.i
+
+bb1.i142.i.i: ; preds = %delete.exit159.i.i
+ br label %delete.exit148.i.i
+
+delete.exit148.i.i: ; preds = %bb1.i142.i.i, %delete.exit159.i.i
+ br i1 false, label %delete.exit137.i.i, label %bb1.i131.i.i
+
+bb1.i131.i.i: ; preds = %delete.exit148.i.i
+ br label %delete.exit137.i.i
+
+delete.exit137.i.i: ; preds = %bb1.i131.i.i, %delete.exit148.i.i
+ br i1 false, label %delete.exit126.i.i, label %bb1.i120.i.i
+
+bb1.i120.i.i: ; preds = %delete.exit137.i.i
+ br label %delete.exit126.i.i
+
+delete.exit126.i.i: ; preds = %bb1.i120.i.i, %delete.exit137.i.i
+ br i1 false, label %delete.exit115.i.i, label %bb1.i109.i.i
+
+bb1.i109.i.i: ; preds = %delete.exit126.i.i
+ br label %delete.exit115.i.i
+
+delete.exit115.i.i: ; preds = %bb1.i109.i.i, %delete.exit126.i.i
+ br i1 false, label %delete.exit104.i.i, label %bb1.i98.i.i
+
+bb1.i98.i.i: ; preds = %delete.exit115.i.i
+ br label %delete.exit104.i.i
+
+delete.exit104.i.i: ; preds = %bb1.i98.i.i, %delete.exit115.i.i
+ br i1 false, label %delete.exit93.i.i, label %bb1.i87.i.i
+
+bb1.i87.i.i: ; preds = %delete.exit104.i.i
+ br label %delete.exit93.i.i
+
+delete.exit93.i.i: ; preds = %bb1.i87.i.i, %delete.exit104.i.i
+ br i1 false, label %delete.exit82.i.i, label %bb1.i76.i.i
+
+bb1.i76.i.i: ; preds = %delete.exit93.i.i
+ br label %delete.exit82.i.i
+
+delete.exit82.i.i: ; preds = %bb1.i76.i.i, %delete.exit93.i.i
+ br i1 false, label %delete.exit71.i.i, label %bb1.i65.i.i
+
+bb1.i65.i.i: ; preds = %delete.exit82.i.i
+ br label %delete.exit71.i.i
+
+delete.exit71.i.i: ; preds = %bb1.i65.i.i, %delete.exit82.i.i
+ br i1 false, label %delete.exit60.i.i, label %bb1.i54.i.i
+
+bb1.i54.i.i: ; preds = %delete.exit71.i.i
+ br label %delete.exit60.i.i
+
+delete.exit60.i.i: ; preds = %bb1.i54.i.i, %delete.exit71.i.i
+ br i1 false, label %delete.exit38.i.i, label %bb1.i32.i.i
+
+bb1.i32.i.i: ; preds = %delete.exit60.i.i
+ br label %delete.exit38.i.i
+
+delete.exit38.i.i: ; preds = %bb1.i32.i.i, %delete.exit60.i.i
+ br i1 false, label %delete.exit18.i.i, label %bb1.i12.i.i
+
+bb1.i12.i.i: ; preds = %delete.exit38.i.i
+ br label %delete.exit18.i.i
+
+delete.exit18.i.i: ; preds = %bb1.i12.i.i, %delete.exit38.i.i
+ br i1 false, label %picosat_reset.exit, label %bb1.i2.i.i
+
+bb1.i2.i.i: ; preds = %delete.exit18.i.i
+ br label %picosat_reset.exit
+
+picosat_reset.exit: ; preds = %bb1.i2.i.i, %delete.exit18.i.i
+ br label %bb171
+
+bb171: ; preds = %picosat_reset.exit, %bb110
+ br i1 false, label %bb173, label %bb172
+
+bb172: ; preds = %bb171
+ br label %bb173
+
+bb173: ; preds = %bb172, %bb171
+ br i1 false, label %bb175, label %bb174
+
+bb174: ; preds = %bb173
+ br label %bb175
+
+bb175: ; preds = %bb174, %bb173
+ br i1 false, label %bb177, label %bb176
+
+bb176: ; preds = %bb175
+ br label %bb177
+
+bb177: ; preds = %bb176, %bb175
+ br i1 false, label %bb179, label %bb178
+
+bb178: ; preds = %bb177
+ ret i32 0
+
+bb179: ; preds = %bb177
+ ret i32 0
+}
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ br label %bb2
+
+bb: ; preds = %bb2
+ br i1 false, label %bb3, label %bb2
+
+bb2: ; preds = %bb, %entry
+ br i1 false, label %bb5.loopexit, label %bb
+
+bb3: ; preds = %bb
+ br i1 false, label %bb5, label %bb4
+
+bb4: ; preds = %bb3
+ br label %bb5
+
+bb5.loopexit: ; preds = %bb2
+ br label %bb5
+
+bb5: ; preds = %bb5.loopexit, %bb4, %bb3
+ %0 = call fastcc i32 @picosat_main(i32 %argc, i8** %argv) nounwind ; <i32> [#uses=2]
+ br i1 false, label %bb7, label %bb6
+
+bb6: ; preds = %bb5
+ ret i32 %0
+
+bb7: ; preds = %bb5
+ ret i32 %0
+}
diff --git a/test/Transforms/BlockPlacement/basictest.ll b/test/Transforms/BlockPlacement/basictest.ll
new file mode 100644
index 0000000..47b5079
--- /dev/null
+++ b/test/Transforms/BlockPlacement/basictest.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -block-placement -disable-output -print-function 2> /dev/null
+
+define i32 @test() {
+ br i1 true, label %X, label %Y
+
+A: ; preds = %Y, %X
+ ret i32 0
+
+X: ; preds = %0
+ br label %A
+
+Y: ; preds = %0
+ br label %A
+}
+
diff --git a/test/Transforms/BlockPlacement/dg.exp b/test/Transforms/BlockPlacement/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/BlockPlacement/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll b/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll
new file mode 100644
index 0000000..9d82819
--- /dev/null
+++ b/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -std-compile-opts -o - | llc -o - | grep bork_directive | wc -l | grep 2
+
+;; We don't want branch folding to fold asm directives.
+
+define void @bork(i32 %param) {
+entry:
+ %tmp = icmp eq i32 %param, 0
+ br i1 %tmp, label %cond_true, label %cond_false
+
+cond_true:
+ call void asm sideeffect ".bork_directive /* ${0:c}:${1:c} */", "i,i,~{dirflag},~{fpsr},~{flags}"( i32 37, i32 927 )
+ ret void
+
+cond_false:
+ call void asm sideeffect ".foo_directive ${0:c}:${1:c}", "i,i,~{dirflag},~{fpsr},~{flags}"( i32 37, i32 927 )
+ call void asm sideeffect ".bork_directive /* ${0:c}:${1:c} */", "i,i,~{dirflag},~{fpsr},~{flags}"( i32 37, i32 927 )
+ ret void
+}
diff --git a/test/Transforms/CodeExtractor/2004-03-13-LoopExtractorCrash.ll b/test/Transforms/CodeExtractor/2004-03-13-LoopExtractorCrash.ll
new file mode 100644
index 0000000..3d0339b
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-03-13-LoopExtractorCrash.ll
@@ -0,0 +1,75 @@
+; RUN: opt < %s -loop-extract -disable-output
+
+define void @solve() {
+entry:
+ br label %loopentry.0
+
+loopentry.0: ; preds = %endif.0, %entry
+ br i1 false, label %no_exit.0, label %loopexit.0
+
+no_exit.0: ; preds = %loopentry.0
+ br i1 false, label %then.0, label %endif.0
+
+then.0: ; preds = %no_exit.0
+ br i1 false, label %shortcirc_done, label %shortcirc_next
+
+shortcirc_next: ; preds = %then.0
+ br label %shortcirc_done
+
+shortcirc_done: ; preds = %shortcirc_next, %then.0
+ br i1 false, label %then.1, label %endif.1
+
+then.1: ; preds = %shortcirc_done
+ br i1 false, label %cond_true, label %cond_false
+
+cond_true: ; preds = %then.1
+ br label %cond_continue
+
+cond_false: ; preds = %then.1
+ br label %cond_continue
+
+cond_continue: ; preds = %cond_false, %cond_true
+ br label %return
+
+after_ret.0: ; No predecessors!
+ br label %endif.1
+
+endif.1: ; preds = %after_ret.0, %shortcirc_done
+ br label %endif.0
+
+endif.0: ; preds = %endif.1, %no_exit.0
+ br label %loopentry.0
+
+loopexit.0: ; preds = %loopentry.0
+ br i1 false, label %then.2, label %endif.2
+
+then.2: ; preds = %loopexit.0
+ br i1 false, label %then.3, label %endif.3
+
+then.3: ; preds = %then.2
+ br label %return
+
+after_ret.1: ; No predecessors!
+ br label %endif.3
+
+endif.3: ; preds = %after_ret.1, %then.2
+ br label %endif.2
+
+endif.2: ; preds = %endif.3, %loopexit.0
+ br label %loopentry.1
+
+loopentry.1: ; preds = %no_exit.1, %endif.2
+ br i1 false, label %no_exit.1, label %loopexit.1
+
+no_exit.1: ; preds = %loopentry.1
+ br label %loopentry.1
+
+loopexit.1: ; preds = %loopentry.1
+ br label %return
+
+after_ret.2: ; No predecessors!
+ br label %return
+
+return: ; preds = %after_ret.2, %loopexit.1, %then.3, %cond_continue
+ ret void
+}
diff --git a/test/Transforms/CodeExtractor/2004-03-14-DominanceProblem.ll b/test/Transforms/CodeExtractor/2004-03-14-DominanceProblem.ll
new file mode 100644
index 0000000..a6ee63e
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-03-14-DominanceProblem.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -loop-extract -disable-output
+; This testcase is failing the loop extractor because not all exit blocks
+; are dominated by all of the live-outs.
+
+define i32 @ab(i32 %alpha, i32 %beta) {
+entry:
+ br label %loopentry.1.preheader
+
+loopentry.1.preheader: ; preds = %entry
+ br label %loopentry.1
+
+loopentry.1: ; preds = %no_exit.1, %loopentry.1.preheader
+ br i1 false, label %no_exit.1, label %loopexit.0.loopexit1
+
+no_exit.1: ; preds = %loopentry.1
+ %tmp.53 = load i32* null ; <i32> [#uses=1]
+ br i1 false, label %shortcirc_next.2, label %loopentry.1
+
+shortcirc_next.2: ; preds = %no_exit.1
+ %tmp.563 = call i32 @wins( i32 0, i32 %tmp.53, i32 3 ) ; <i32> [#uses=0]
+ ret i32 0
+
+loopexit.0.loopexit1: ; preds = %loopentry.1
+ br label %loopexit.0
+
+loopexit.0: ; preds = %loopexit.0.loopexit1
+ ret i32 0
+}
+
+declare i32 @wins(i32, i32, i32)
+
+declare i16 @ab_code()
+
diff --git a/test/Transforms/CodeExtractor/2004-03-14-NoSwitchSupport.ll b/test/Transforms/CodeExtractor/2004-03-14-NoSwitchSupport.ll
new file mode 100644
index 0000000..7cd7279
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-03-14-NoSwitchSupport.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -loop-extract-single -disable-output
+
+define void @ab() {
+entry:
+ br label %codeReplTail
+
+then.1: ; preds = %codeReplTail
+ br label %loopentry.1
+
+loopentry.1: ; preds = %no_exit.1, %then.1
+ br i1 false, label %no_exit.1, label %loopexit.0.loopexit1
+
+no_exit.1: ; preds = %loopentry.1
+ br label %loopentry.1
+
+loopexit.0.loopexit: ; preds = %codeReplTail
+ ret void
+
+loopexit.0.loopexit1: ; preds = %loopentry.1
+ ret void
+
+codeReplTail: ; preds = %codeReplTail, %entry
+ switch i16 0, label %codeReplTail [
+ i16 0, label %loopexit.0.loopexit
+ i16 1, label %then.1
+ ]
+}
+
diff --git a/test/Transforms/CodeExtractor/2004-03-17-MissedLiveIns.ll b/test/Transforms/CodeExtractor/2004-03-17-MissedLiveIns.ll
new file mode 100644
index 0000000..01fe54b
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-03-17-MissedLiveIns.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -loop-extract -disable-output
+
+define void @sendMTFValues() {
+entry:
+ br i1 false, label %then.1, label %endif.1
+
+then.1: ; preds = %entry
+ br i1 false, label %loopentry.6.preheader, label %else.0
+
+endif.1: ; preds = %entry
+ ret void
+
+else.0: ; preds = %then.1
+ ret void
+
+loopentry.6.preheader: ; preds = %then.1
+ br i1 false, label %endif.7.preheader, label %loopexit.9
+
+endif.7.preheader: ; preds = %loopentry.6.preheader
+ %tmp.183 = add i32 0, -1 ; <i32> [#uses=1]
+ br label %endif.7
+
+endif.7: ; preds = %loopexit.15, %endif.7.preheader
+ br i1 false, label %loopentry.10, label %loopentry.12
+
+loopentry.10: ; preds = %endif.7
+ br label %loopentry.12
+
+loopentry.12: ; preds = %loopentry.10, %endif.7
+ %ge.2.1 = phi i32 [ 0, %loopentry.10 ], [ %tmp.183, %endif.7 ] ; <i32> [#uses=0]
+ br i1 false, label %loopexit.14, label %no_exit.11
+
+no_exit.11: ; preds = %loopentry.12
+ ret void
+
+loopexit.14: ; preds = %loopentry.12
+ br i1 false, label %loopexit.15, label %no_exit.14
+
+no_exit.14: ; preds = %loopexit.14
+ ret void
+
+loopexit.15: ; preds = %loopexit.14
+ br i1 false, label %endif.7, label %loopexit.9
+
+loopexit.9: ; preds = %loopexit.15, %loopentry.6.preheader
+ ret void
+}
diff --git a/test/Transforms/CodeExtractor/2004-03-17-OutputMismatch.ll b/test/Transforms/CodeExtractor/2004-03-17-OutputMismatch.ll
new file mode 100644
index 0000000..0fbd330
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-03-17-OutputMismatch.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -loop-extract -disable-output
+
+%struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, i32, i32 }
+%struct.table_t = type { [1 x %struct.node_t**], [1 x %struct.node_t**] }
+
+define void @make_tables() {
+entry:
+ %tmp.0.i = malloc %struct.node_t ; <%struct.node_t*> [#uses=1]
+ br i1 false, label %no_exit.i, label %loopexit.i
+
+no_exit.i: ; preds = %no_exit.i, %entry
+ %prev_node.0.i.1 = phi %struct.node_t* [ %tmp.16.i, %no_exit.i ], [ %tmp.0.i, %entry ] ; <%struct.node_t*> [#uses=0]
+ %tmp.16.i = malloc %struct.node_t ; <%struct.node_t*> [#uses=2]
+ br i1 false, label %no_exit.i, label %loopexit.i
+
+loopexit.i: ; preds = %no_exit.i, %entry
+ %cur_node.0.i.0 = phi %struct.node_t* [ null, %entry ], [ %tmp.16.i, %no_exit.i ] ; <%struct.node_t*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/CodeExtractor/2004-03-17-UpdatePHIsOutsideRegion.ll b/test/Transforms/CodeExtractor/2004-03-17-UpdatePHIsOutsideRegion.ll
new file mode 100644
index 0000000..6b306d2
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-03-17-UpdatePHIsOutsideRegion.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -loop-extract -disable-output
+
+define void @maketree() {
+entry:
+ br i1 false, label %no_exit.1, label %loopexit.0
+
+no_exit.1: ; preds = %endif, %expandbox.entry, %entry
+ br i1 false, label %endif, label %expandbox.entry
+
+expandbox.entry: ; preds = %no_exit.1
+ br i1 false, label %loopexit.1, label %no_exit.1
+
+endif: ; preds = %no_exit.1
+ br i1 false, label %loopexit.1, label %no_exit.1
+
+loopexit.1: ; preds = %endif, %expandbox.entry
+ %ic.i.0.0.4 = phi i32 [ 0, %expandbox.entry ], [ 0, %endif ] ; <i32> [#uses=0]
+ ret void
+
+loopexit.0: ; preds = %entry
+ ret void
+}
+
diff --git a/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll b/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll
new file mode 100644
index 0000000..91e9799
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-03-18-InvokeHandling.ll
@@ -0,0 +1,194 @@
+; RUN: opt < %s -loop-extract -disable-output
+
+declare i32 @_IO_getc()
+
+declare void @__errno_location()
+
+define void @yylex() {
+entry:
+ switch i32 0, label %label.126 [
+ i32 0, label %return
+ i32 61, label %combine
+ i32 33, label %combine
+ i32 94, label %combine
+ i32 37, label %combine
+ i32 47, label %combine
+ i32 42, label %combine
+ i32 62, label %combine
+ i32 60, label %combine
+ i32 58, label %combine
+ i32 124, label %combine
+ i32 38, label %combine
+ i32 45, label %combine
+ i32 43, label %combine
+ i32 34, label %string_constant
+ i32 39, label %char_constant
+ i32 46, label %loopexit.2
+ i32 57, label %loopexit.2
+ i32 56, label %loopexit.2
+ i32 55, label %loopexit.2
+ i32 54, label %loopexit.2
+ i32 53, label %loopexit.2
+ i32 52, label %loopexit.2
+ i32 51, label %loopexit.2
+ i32 50, label %loopexit.2
+ i32 49, label %loopexit.2
+ i32 48, label %loopexit.2
+ i32 95, label %letter
+ i32 122, label %letter
+ i32 121, label %letter
+ i32 120, label %letter
+ i32 119, label %letter
+ i32 118, label %letter
+ i32 117, label %letter
+ i32 116, label %letter
+ i32 115, label %letter
+ i32 114, label %letter
+ i32 113, label %letter
+ i32 112, label %letter
+ i32 111, label %letter
+ i32 110, label %letter
+ i32 109, label %letter
+ i32 108, label %letter
+ i32 107, label %letter
+ i32 106, label %letter
+ i32 105, label %letter
+ i32 104, label %letter
+ i32 103, label %letter
+ i32 102, label %letter
+ i32 101, label %letter
+ i32 100, label %letter
+ i32 99, label %letter
+ i32 98, label %letter
+ i32 97, label %letter
+ i32 90, label %letter
+ i32 89, label %letter
+ i32 88, label %letter
+ i32 87, label %letter
+ i32 86, label %letter
+ i32 85, label %letter
+ i32 84, label %letter
+ i32 83, label %letter
+ i32 82, label %letter
+ i32 81, label %letter
+ i32 80, label %letter
+ i32 79, label %letter
+ i32 78, label %letter
+ i32 77, label %letter
+ i32 75, label %letter
+ i32 74, label %letter
+ i32 73, label %letter
+ i32 72, label %letter
+ i32 71, label %letter
+ i32 70, label %letter
+ i32 69, label %letter
+ i32 68, label %letter
+ i32 67, label %letter
+ i32 66, label %letter
+ i32 65, label %letter
+ i32 64, label %label.13
+ i32 76, label %label.12
+ i32 36, label %label.11
+ i32 -1, label %label.10
+ ]
+
+label.10: ; preds = %entry
+ ret void
+
+label.11: ; preds = %entry
+ ret void
+
+label.12: ; preds = %entry
+ ret void
+
+label.13: ; preds = %entry
+ ret void
+
+letter: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
+ ret void
+
+loopexit.2: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
+ switch i32 0, label %shortcirc_next.14 [
+ i32 48, label %then.20
+ i32 46, label %endif.38
+ ]
+
+then.20: ; preds = %loopexit.2
+ switch i32 0, label %else.4 [
+ i32 120, label %then.21
+ i32 88, label %then.21
+ ]
+
+then.21: ; preds = %then.20, %then.20
+ ret void
+
+else.4: ; preds = %then.20
+ ret void
+
+shortcirc_next.14: ; preds = %loopexit.2
+ ret void
+
+endif.38: ; preds = %loopexit.2
+ br i1 false, label %then.40, label %then.39
+
+then.39: ; preds = %endif.38
+ ret void
+
+then.40: ; preds = %endif.38
+ invoke void @__errno_location( )
+ to label %switchexit.2 unwind label %LongJmpBlkPre
+
+loopentry.6: ; preds = %endif.52
+ switch i32 0, label %switchexit.2 [
+ i32 73, label %label.82
+ i32 105, label %label.82
+ i32 76, label %label.80
+ i32 108, label %label.80
+ i32 70, label %label.78
+ i32 102, label %label.78
+ ]
+
+label.78: ; preds = %loopentry.6, %loopentry.6
+ ret void
+
+label.80: ; preds = %loopentry.6, %loopentry.6
+ ret void
+
+label.82: ; preds = %loopentry.6, %loopentry.6
+ %c.0.15.5 = phi i32 [ %tmp.79417, %loopentry.6 ], [ %tmp.79417, %loopentry.6 ] ; <i32> [#uses=0]
+ ret void
+
+switchexit.2: ; preds = %loopentry.6, %then.40
+ br i1 false, label %endif.51, label %loopexit.6
+
+endif.51: ; preds = %switchexit.2
+ br i1 false, label %endif.52, label %then.52
+
+then.52: ; preds = %endif.51
+ ret void
+
+endif.52: ; preds = %endif.51
+ %tmp.79417 = invoke i32 @_IO_getc( )
+ to label %loopentry.6 unwind label %LongJmpBlkPre ; <i32> [#uses=2]
+
+loopexit.6: ; preds = %switchexit.2
+ ret void
+
+char_constant: ; preds = %entry
+ ret void
+
+string_constant: ; preds = %entry
+ ret void
+
+combine: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
+ ret void
+
+label.126: ; preds = %entry
+ ret void
+
+return: ; preds = %entry
+ ret void
+
+LongJmpBlkPre: ; preds = %endif.52, %then.40
+ ret void
+}
diff --git a/test/Transforms/CodeExtractor/2004-08-12-BlockExtractPHI.ll b/test/Transforms/CodeExtractor/2004-08-12-BlockExtractPHI.ll
new file mode 100644
index 0000000..9f70bdc
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-08-12-BlockExtractPHI.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -extract-blocks -disable-output
+
+define void @test1() {
+no_exit.0.i:
+ br i1 false, label %yylex.entry, label %yylex.entry
+
+yylex.entry: ; preds = %no_exit.0.i, %no_exit.0.i
+ %tmp.1027 = phi i32 [ 0, %no_exit.0.i ], [ 0, %no_exit.0.i ] ; <i32> [#uses=0]
+ ret void
+}
+
+define void @test2() {
+no_exit.0.i:
+ switch i32 0, label %yylex.entry [
+ i32 0, label %yylex.entry
+ i32 1, label %foo
+ ]
+
+yylex.entry: ; preds = %no_exit.0.i, %no_exit.0.i
+ %tmp.1027 = phi i32 [ 0, %no_exit.0.i ], [ 0, %no_exit.0.i ] ; <i32> [#uses=0]
+ ret void
+
+foo: ; preds = %no_exit.0.i
+ ret void
+}
+
diff --git a/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll b/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll
new file mode 100644
index 0000000..fc58577
--- /dev/null
+++ b/test/Transforms/CodeExtractor/2004-11-12-InvokeExtract.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -extract-blocks -disable-output
+define i32 @foo() {
+ br label %EB
+
+EB: ; preds = %0
+ %V = invoke i32 @foo( )
+ to label %Cont unwind label %Unw ; <i32> [#uses=1]
+
+Cont: ; preds = %EB
+ ret i32 %V
+
+Unw: ; preds = %EB
+ unwind
+}
+
diff --git a/test/Transforms/CodeExtractor/dg.exp b/test/Transforms/CodeExtractor/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/CodeExtractor/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/CodeGenPrepare/2008-11-24-RAUW-Self.ll b/test/Transforms/CodeGenPrepare/2008-11-24-RAUW-Self.ll
new file mode 100644
index 0000000..1995c7f
--- /dev/null
+++ b/test/Transforms/CodeGenPrepare/2008-11-24-RAUW-Self.ll
@@ -0,0 +1,511 @@
+; RUN: opt < %s -codegenprepare | llvm-dis
+; PR3113
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define fastcc i32 @ascii2flt(i8* %str) nounwind {
+entry:
+ br label %bb2.i
+
+bb2.i: ; preds = %bb4.i.bb2.i_crit_edge, %entry
+ br i1 false, label %bb4.i, label %base2flt.exit
+
+bb4.i: ; preds = %bb2.i
+ br i1 false, label %bb11.i, label %bb4.i.bb2.i_crit_edge
+
+bb4.i.bb2.i_crit_edge: ; preds = %bb4.i
+ br label %bb2.i
+
+bb11.i: ; preds = %bb4.i
+ br label %bb11.i.base2flt.exit204_crit_edge
+
+bb11.i.base2flt.exit204_crit_edge: ; preds = %bb11.i
+ br label %base2flt.exit204
+
+bb11.i.bb7.i197_crit_edge: ; No predecessors!
+ br label %bb7.i197
+
+base2flt.exit: ; preds = %bb2.i
+ br label %base2flt.exit.base2flt.exit204_crit_edge
+
+base2flt.exit.base2flt.exit204_crit_edge: ; preds = %base2flt.exit
+ br label %base2flt.exit204
+
+base2flt.exit.bb7.i197_crit_edge: ; No predecessors!
+ br label %bb7.i197
+
+bb10.i196: ; preds = %bb7.i197
+ br label %bb10.i196.base2flt.exit204_crit_edge
+
+bb10.i196.base2flt.exit204_crit_edge: ; preds = %bb7.i197, %bb10.i196
+ br label %base2flt.exit204
+
+bb10.i196.bb7.i197_crit_edge: ; No predecessors!
+ br label %bb7.i197
+
+bb7.i197: ; preds = %bb10.i196.bb7.i197_crit_edge, %base2flt.exit.bb7.i197_crit_edge, %bb11.i.bb7.i197_crit_edge
+ %.reg2mem.0 = phi i32 [ 0, %base2flt.exit.bb7.i197_crit_edge ], [ %.reg2mem.0, %bb10.i196.bb7.i197_crit_edge ], [ 0, %bb11.i.bb7.i197_crit_edge ] ; <i32> [#uses=1]
+ br i1 undef, label %bb10.i196.base2flt.exit204_crit_edge, label %bb10.i196
+
+base2flt.exit204: ; preds = %bb10.i196.base2flt.exit204_crit_edge, %base2flt.exit.base2flt.exit204_crit_edge, %bb11.i.base2flt.exit204_crit_edge
+ br i1 false, label %base2flt.exit204.bb8_crit_edge, label %bb
+
+base2flt.exit204.bb8_crit_edge: ; preds = %base2flt.exit204
+ br label %bb8
+
+bb: ; preds = %base2flt.exit204
+ br i1 false, label %bb.bb18_crit_edge, label %bb1.i
+
+bb.bb18_crit_edge: ; preds = %bb9, %bb
+ br label %bb18
+
+bb1.i: ; preds = %bb
+ br i1 false, label %bb1.i.bb7_crit_edge, label %bb1.i158
+
+bb1.i.bb7_crit_edge.loopexit: ; preds = %bb2.i164
+ br label %bb1.i.bb7_crit_edge
+
+bb1.i.bb7_crit_edge: ; preds = %bb1.i.bb7_crit_edge.loopexit, %bb1.i
+ br label %bb7.preheader
+
+bb1.i158: ; preds = %bb1.i
+ br i1 false, label %bb1.i158.bb10.i179_crit_edge, label %bb1.i158.bb2.i164_crit_edge
+
+bb1.i158.bb2.i164_crit_edge: ; preds = %bb1.i158
+ br label %bb2.i164
+
+bb1.i158.bb10.i179_crit_edge: ; preds = %bb1.i158
+ br label %bb10.i179
+
+bb2.i164: ; preds = %bb4.i166.bb2.i164_crit_edge, %bb1.i158.bb2.i164_crit_edge
+ br i1 false, label %bb4.i166, label %bb1.i.bb7_crit_edge.loopexit
+
+bb4.i166: ; preds = %bb2.i164
+ br i1 false, label %bb4.i166.bb11.i172_crit_edge, label %bb4.i166.bb2.i164_crit_edge
+
+bb4.i166.bb2.i164_crit_edge: ; preds = %bb4.i166
+ br label %bb2.i164
+
+bb4.i166.bb11.i172_crit_edge: ; preds = %bb4.i166
+ br label %bb11.i172
+
+bb11.i172: ; preds = %bb10.i179.bb11.i172_crit_edge, %bb4.i166.bb11.i172_crit_edge
+ br label %bb7.preheader
+
+bb10.i179: ; preds = %bb9.i182, %bb1.i158.bb10.i179_crit_edge
+ br i1 false, label %bb7.i180, label %bb10.i179.bb11.i172_crit_edge
+
+bb10.i179.bb11.i172_crit_edge: ; preds = %bb10.i179
+ br label %bb11.i172
+
+bb7.i180: ; preds = %bb10.i179
+ br i1 false, label %bb7.i180.bb7_crit_edge, label %bb9.i182
+
+bb7.i180.bb7_crit_edge: ; preds = %bb7.i180
+ br label %bb7.preheader
+
+bb7.preheader: ; preds = %bb7.i180.bb7_crit_edge, %bb11.i172, %bb1.i.bb7_crit_edge
+ br label %bb7
+
+bb9.i182: ; preds = %bb7.i180
+ br label %bb10.i179
+
+bb7: ; preds = %addflt.exit114, %bb7.preheader
+ switch i8 0, label %bb4 [
+ i8 0, label %bb7.bb8_crit_edge
+ i8 46, label %bb7.bb8_crit_edge
+ ]
+
+bb7.bb8_crit_edge: ; preds = %bb7, %bb7
+ br label %bb8
+
+bb4: ; preds = %bb7
+ br i1 false, label %bb18.loopexit1, label %bb1.i5
+
+bb1.i5: ; preds = %bb4
+ br i1 false, label %bb1.i5.mulflt.exit157_crit_edge, label %bb3.i147
+
+bb1.i5.mulflt.exit157_crit_edge: ; preds = %bb5.i148, %bb1.i5
+ br label %mulflt.exit157
+
+bb3.i147: ; preds = %bb1.i5
+ br i1 false, label %bb3.i147.mulflt.exit157_crit_edge, label %bb5.i148
+
+bb3.i147.mulflt.exit157_crit_edge: ; preds = %bb8.i150, %bb3.i147
+ br label %mulflt.exit157
+
+bb5.i148: ; preds = %bb3.i147
+ br i1 false, label %bb1.i5.mulflt.exit157_crit_edge, label %bb7.i149
+
+bb7.i149: ; preds = %bb5.i148
+ br i1 false, label %bb8.i150, label %bb7.i149.bb12.i154_crit_edge
+
+bb7.i149.bb12.i154_crit_edge: ; preds = %bb7.i149
+ br label %bb12.i154
+
+bb8.i150: ; preds = %bb7.i149
+ br i1 false, label %bb3.i147.mulflt.exit157_crit_edge, label %bb10.i151
+
+bb10.i151: ; preds = %bb8.i150
+ br label %bb12.i154
+
+bb12.i154: ; preds = %bb10.i151, %bb7.i149.bb12.i154_crit_edge
+ br label %mulflt.exit157
+
+mulflt.exit157: ; preds = %bb12.i154, %bb3.i147.mulflt.exit157_crit_edge, %bb1.i5.mulflt.exit157_crit_edge
+ br i1 false, label %mulflt.exit157.base2flt.exit144_crit_edge, label %bb1.i115
+
+mulflt.exit157.base2flt.exit144_crit_edge.loopexit: ; preds = %bb2.i121
+ br label %mulflt.exit157.base2flt.exit144_crit_edge
+
+mulflt.exit157.base2flt.exit144_crit_edge: ; preds = %mulflt.exit157.base2flt.exit144_crit_edge.loopexit, %mulflt.exit157
+ br label %base2flt.exit144
+
+bb1.i115: ; preds = %mulflt.exit157
+ br i1 false, label %bb1.i115.bb10.i136_crit_edge, label %bb1.i115.bb2.i121_crit_edge
+
+bb1.i115.bb2.i121_crit_edge: ; preds = %bb1.i115
+ br label %bb2.i121
+
+bb1.i115.bb10.i136_crit_edge: ; preds = %bb1.i115
+ br label %bb10.i136
+
+bb2.i121: ; preds = %bb4.i123.bb2.i121_crit_edge, %bb1.i115.bb2.i121_crit_edge
+ br i1 false, label %bb4.i123, label %mulflt.exit157.base2flt.exit144_crit_edge.loopexit
+
+bb4.i123: ; preds = %bb2.i121
+ br i1 false, label %bb4.i123.bb11.i129_crit_edge, label %bb4.i123.bb2.i121_crit_edge
+
+bb4.i123.bb2.i121_crit_edge: ; preds = %bb4.i123
+ br label %bb2.i121
+
+bb4.i123.bb11.i129_crit_edge: ; preds = %bb4.i123
+ br label %bb11.i129
+
+bb11.i129: ; preds = %bb10.i136.bb11.i129_crit_edge, %bb4.i123.bb11.i129_crit_edge
+ br label %base2flt.exit144
+
+bb10.i136: ; preds = %bb9.i139, %bb1.i115.bb10.i136_crit_edge
+ br i1 false, label %bb7.i137, label %bb10.i136.bb11.i129_crit_edge
+
+bb10.i136.bb11.i129_crit_edge: ; preds = %bb10.i136
+ br label %bb11.i129
+
+bb7.i137: ; preds = %bb10.i136
+ br i1 false, label %bb7.i137.base2flt.exit144_crit_edge, label %bb9.i139
+
+bb7.i137.base2flt.exit144_crit_edge: ; preds = %bb7.i137
+ br label %base2flt.exit144
+
+bb9.i139: ; preds = %bb7.i137
+ br label %bb10.i136
+
+base2flt.exit144: ; preds = %bb7.i137.base2flt.exit144_crit_edge, %bb11.i129, %mulflt.exit157.base2flt.exit144_crit_edge
+ br i1 false, label %base2flt.exit144.addflt.exit114_crit_edge, label %bb3.i105
+
+base2flt.exit144.addflt.exit114_crit_edge: ; preds = %bb3.i105, %base2flt.exit144
+ br label %addflt.exit114
+
+bb3.i105: ; preds = %base2flt.exit144
+ br i1 false, label %base2flt.exit144.addflt.exit114_crit_edge, label %bb5.i106
+
+bb5.i106: ; preds = %bb3.i105
+ br i1 false, label %bb5.i106.bb9.i111_crit_edge, label %bb6.i107
+
+bb5.i106.bb9.i111_crit_edge: ; preds = %bb5.i106
+ br label %bb9.i111
+
+bb6.i107: ; preds = %bb5.i106
+ br i1 false, label %bb6.i107.addflt.exit114_crit_edge, label %bb8.i108
+
+bb6.i107.addflt.exit114_crit_edge: ; preds = %bb6.i107
+ br label %addflt.exit114
+
+bb8.i108: ; preds = %bb6.i107
+ br label %bb9.i111
+
+bb9.i111: ; preds = %bb8.i108, %bb5.i106.bb9.i111_crit_edge
+ br label %addflt.exit114
+
+addflt.exit114: ; preds = %bb9.i111, %bb6.i107.addflt.exit114_crit_edge, %base2flt.exit144.addflt.exit114_crit_edge
+ br label %bb7
+
+bb18.loopexit1: ; preds = %bb4
+ ret i32 -1
+
+bb18: ; preds = %bb8.bb18_crit_edge, %bb.bb18_crit_edge
+ ret i32 0
+
+bb8: ; preds = %bb7.bb8_crit_edge, %base2flt.exit204.bb8_crit_edge
+ br i1 false, label %bb9, label %bb8.bb18_crit_edge
+
+bb8.bb18_crit_edge: ; preds = %bb8
+ br label %bb18
+
+bb9: ; preds = %bb8
+ br i1 false, label %bb.bb18_crit_edge, label %bb1.i13
+
+bb1.i13: ; preds = %bb9
+ br i1 false, label %bb1.i13.base2flt.exit102_crit_edge, label %bb1.i73
+
+bb1.i13.base2flt.exit102_crit_edge.loopexit: ; preds = %bb2.i79
+ br label %bb1.i13.base2flt.exit102_crit_edge
+
+bb1.i13.base2flt.exit102_crit_edge: ; preds = %bb1.i13.base2flt.exit102_crit_edge.loopexit, %bb1.i13
+ br label %base2flt.exit102
+
+bb1.i73: ; preds = %bb1.i13
+ br i1 false, label %bb1.i73.bb10.i94_crit_edge, label %bb1.i73.bb2.i79_crit_edge
+
+bb1.i73.bb2.i79_crit_edge: ; preds = %bb1.i73
+ br label %bb2.i79
+
+bb1.i73.bb10.i94_crit_edge: ; preds = %bb1.i73
+ br label %bb10.i94
+
+bb2.i79: ; preds = %bb4.i81.bb2.i79_crit_edge, %bb1.i73.bb2.i79_crit_edge
+ br i1 false, label %bb4.i81, label %bb1.i13.base2flt.exit102_crit_edge.loopexit
+
+bb4.i81: ; preds = %bb2.i79
+ br i1 false, label %bb4.i81.bb11.i87_crit_edge, label %bb4.i81.bb2.i79_crit_edge
+
+bb4.i81.bb2.i79_crit_edge: ; preds = %bb4.i81
+ br label %bb2.i79
+
+bb4.i81.bb11.i87_crit_edge: ; preds = %bb4.i81
+ br label %bb11.i87
+
+bb11.i87: ; preds = %bb10.i94.bb11.i87_crit_edge, %bb4.i81.bb11.i87_crit_edge
+ br label %base2flt.exit102
+
+bb10.i94: ; preds = %bb9.i97, %bb1.i73.bb10.i94_crit_edge
+ br i1 false, label %bb7.i95, label %bb10.i94.bb11.i87_crit_edge
+
+bb10.i94.bb11.i87_crit_edge: ; preds = %bb10.i94
+ br label %bb11.i87
+
+bb7.i95: ; preds = %bb10.i94
+ br i1 false, label %bb7.i95.base2flt.exit102_crit_edge, label %bb9.i97
+
+bb7.i95.base2flt.exit102_crit_edge: ; preds = %bb7.i95
+ br label %base2flt.exit102
+
+bb9.i97: ; preds = %bb7.i95
+ br label %bb10.i94
+
+base2flt.exit102: ; preds = %bb7.i95.base2flt.exit102_crit_edge, %bb11.i87, %bb1.i13.base2flt.exit102_crit_edge
+ br i1 false, label %base2flt.exit102.mulflt.exit72_crit_edge, label %bb3.i62
+
+base2flt.exit102.mulflt.exit72_crit_edge: ; preds = %bb5.i63, %base2flt.exit102
+ br label %mulflt.exit72
+
+bb3.i62: ; preds = %base2flt.exit102
+ br i1 false, label %bb3.i62.mulflt.exit72_crit_edge, label %bb5.i63
+
+bb3.i62.mulflt.exit72_crit_edge: ; preds = %bb8.i65, %bb3.i62
+ br label %mulflt.exit72
+
+bb5.i63: ; preds = %bb3.i62
+ br i1 false, label %base2flt.exit102.mulflt.exit72_crit_edge, label %bb7.i64
+
+bb7.i64: ; preds = %bb5.i63
+ br i1 false, label %bb8.i65, label %bb7.i64.bb12.i69_crit_edge
+
+bb7.i64.bb12.i69_crit_edge: ; preds = %bb7.i64
+ br label %bb12.i69
+
+bb8.i65: ; preds = %bb7.i64
+ br i1 false, label %bb3.i62.mulflt.exit72_crit_edge, label %bb10.i66
+
+bb10.i66: ; preds = %bb8.i65
+ br label %bb12.i69
+
+bb12.i69: ; preds = %bb10.i66, %bb7.i64.bb12.i69_crit_edge
+ br label %mulflt.exit72
+
+mulflt.exit72: ; preds = %bb12.i69, %bb3.i62.mulflt.exit72_crit_edge, %base2flt.exit102.mulflt.exit72_crit_edge
+ br i1 false, label %mulflt.exit72.bb10.i58_crit_edge, label %bb3.i50
+
+mulflt.exit72.bb10.i58_crit_edge: ; preds = %bb3.i50, %mulflt.exit72
+ br label %bb10.i58
+
+bb3.i50: ; preds = %mulflt.exit72
+ br i1 false, label %mulflt.exit72.bb10.i58_crit_edge, label %bb5.i51
+
+bb5.i51: ; preds = %bb3.i50
+ br i1 false, label %bb5.i51.bb9.i56_crit_edge, label %bb6.i52
+
+bb5.i51.bb9.i56_crit_edge: ; preds = %bb5.i51
+ br label %bb9.i56
+
+bb6.i52: ; preds = %bb5.i51
+ br i1 false, label %bb6.i52.bb10.i58_crit_edge, label %bb8.i53
+
+bb6.i52.bb10.i58_crit_edge: ; preds = %bb6.i52
+ br label %bb10.i58
+
+bb8.i53: ; preds = %bb6.i52
+ br label %bb9.i56
+
+bb9.i56: ; preds = %bb8.i53, %bb5.i51.bb9.i56_crit_edge
+ br label %bb15.preheader
+
+bb10.i58: ; preds = %bb6.i52.bb10.i58_crit_edge, %mulflt.exit72.bb10.i58_crit_edge
+ br label %bb15.preheader
+
+bb15.preheader: ; preds = %bb10.i58, %bb9.i56
+ br label %bb15
+
+bb15: ; preds = %addflt.exit, %bb15.preheader
+ br i1 false, label %bb15.bb18.loopexit_crit_edge, label %bb12
+
+bb15.bb18.loopexit_crit_edge: ; preds = %bb15
+ br label %bb18.loopexit
+
+bb12: ; preds = %bb15
+ br i1 false, label %bb12.bb18.loopexit_crit_edge, label %bb1.i21
+
+bb12.bb18.loopexit_crit_edge: ; preds = %bb12
+ br label %bb18.loopexit
+
+bb1.i21: ; preds = %bb12
+ br i1 false, label %bb1.i21.mulflt.exit47_crit_edge, label %bb3.i37
+
+bb1.i21.mulflt.exit47_crit_edge: ; preds = %bb5.i38, %bb1.i21
+ br label %mulflt.exit47
+
+bb3.i37: ; preds = %bb1.i21
+ br i1 false, label %bb3.i37.mulflt.exit47_crit_edge, label %bb5.i38
+
+bb3.i37.mulflt.exit47_crit_edge: ; preds = %bb8.i40, %bb3.i37
+ br label %mulflt.exit47
+
+bb5.i38: ; preds = %bb3.i37
+ br i1 false, label %bb1.i21.mulflt.exit47_crit_edge, label %bb7.i39
+
+bb7.i39: ; preds = %bb5.i38
+ br i1 false, label %bb8.i40, label %bb7.i39.bb12.i44_crit_edge
+
+bb7.i39.bb12.i44_crit_edge: ; preds = %bb7.i39
+ br label %bb12.i44
+
+bb8.i40: ; preds = %bb7.i39
+ br i1 false, label %bb3.i37.mulflt.exit47_crit_edge, label %bb10.i41
+
+bb10.i41: ; preds = %bb8.i40
+ br label %bb12.i44
+
+bb12.i44: ; preds = %bb10.i41, %bb7.i39.bb12.i44_crit_edge
+ br label %mulflt.exit47
+
+mulflt.exit47: ; preds = %bb12.i44, %bb3.i37.mulflt.exit47_crit_edge, %bb1.i21.mulflt.exit47_crit_edge
+ br i1 false, label %mulflt.exit47.base2flt.exit34_crit_edge, label %bb1.i15
+
+mulflt.exit47.base2flt.exit34_crit_edge.loopexit: ; preds = %bb2.i20
+ br label %mulflt.exit47.base2flt.exit34_crit_edge
+
+mulflt.exit47.base2flt.exit34_crit_edge: ; preds = %mulflt.exit47.base2flt.exit34_crit_edge.loopexit, %mulflt.exit47
+ br label %base2flt.exit34
+
+bb1.i15: ; preds = %mulflt.exit47
+ br i1 false, label %bb1.i15.bb10.i31_crit_edge, label %bb1.i15.bb2.i20_crit_edge
+
+bb1.i15.bb2.i20_crit_edge: ; preds = %bb1.i15
+ br label %bb2.i20
+
+bb1.i15.bb10.i31_crit_edge: ; preds = %bb1.i15
+ br label %bb10.i31
+
+bb2.i20: ; preds = %bb4.i22.bb2.i20_crit_edge, %bb1.i15.bb2.i20_crit_edge
+ br i1 false, label %bb4.i22, label %mulflt.exit47.base2flt.exit34_crit_edge.loopexit
+
+bb4.i22: ; preds = %bb2.i20
+ br i1 false, label %bb4.i22.bb11.i28_crit_edge, label %bb4.i22.bb2.i20_crit_edge
+
+bb4.i22.bb2.i20_crit_edge: ; preds = %bb4.i22
+ br label %bb2.i20
+
+bb4.i22.bb11.i28_crit_edge: ; preds = %bb4.i22
+ br label %bb11.i28
+
+bb11.i28: ; preds = %bb10.i31.bb11.i28_crit_edge, %bb4.i22.bb11.i28_crit_edge
+ br label %base2flt.exit34
+
+bb10.i31: ; preds = %bb9.i33, %bb1.i15.bb10.i31_crit_edge
+ br i1 false, label %bb7.i32, label %bb10.i31.bb11.i28_crit_edge
+
+bb10.i31.bb11.i28_crit_edge: ; preds = %bb10.i31
+ br label %bb11.i28
+
+bb7.i32: ; preds = %bb10.i31
+ br i1 false, label %bb7.i32.base2flt.exit34_crit_edge, label %bb9.i33
+
+bb7.i32.base2flt.exit34_crit_edge: ; preds = %bb7.i32
+ br label %base2flt.exit34
+
+bb9.i33: ; preds = %bb7.i32
+ br label %bb10.i31
+
+base2flt.exit34: ; preds = %bb7.i32.base2flt.exit34_crit_edge, %bb11.i28, %mulflt.exit47.base2flt.exit34_crit_edge
+ br i1 false, label %base2flt.exit34.mulflt.exit_crit_edge, label %bb3.i9
+
+base2flt.exit34.mulflt.exit_crit_edge: ; preds = %bb5.i10, %base2flt.exit34
+ br label %mulflt.exit
+
+bb3.i9: ; preds = %base2flt.exit34
+ br i1 false, label %bb3.i9.mulflt.exit_crit_edge, label %bb5.i10
+
+bb3.i9.mulflt.exit_crit_edge: ; preds = %bb8.i11, %bb3.i9
+ br label %mulflt.exit
+
+bb5.i10: ; preds = %bb3.i9
+ br i1 false, label %base2flt.exit34.mulflt.exit_crit_edge, label %bb7.i
+
+bb7.i: ; preds = %bb5.i10
+ br i1 false, label %bb8.i11, label %bb7.i.bb12.i_crit_edge
+
+bb7.i.bb12.i_crit_edge: ; preds = %bb7.i
+ br label %bb12.i
+
+bb8.i11: ; preds = %bb7.i
+ br i1 false, label %bb3.i9.mulflt.exit_crit_edge, label %bb10.i12
+
+bb10.i12: ; preds = %bb8.i11
+ br label %bb12.i
+
+bb12.i: ; preds = %bb10.i12, %bb7.i.bb12.i_crit_edge
+ br label %mulflt.exit
+
+mulflt.exit: ; preds = %bb12.i, %bb3.i9.mulflt.exit_crit_edge, %base2flt.exit34.mulflt.exit_crit_edge
+ br i1 false, label %mulflt.exit.addflt.exit_crit_edge, label %bb3.i
+
+mulflt.exit.addflt.exit_crit_edge: ; preds = %bb3.i, %mulflt.exit
+ br label %addflt.exit
+
+bb3.i: ; preds = %mulflt.exit
+ br i1 false, label %mulflt.exit.addflt.exit_crit_edge, label %bb5.i
+
+bb5.i: ; preds = %bb3.i
+ br i1 false, label %bb5.i.bb9.i_crit_edge, label %bb6.i
+
+bb5.i.bb9.i_crit_edge: ; preds = %bb5.i
+ br label %bb9.i
+
+bb6.i: ; preds = %bb5.i
+ br i1 false, label %bb6.i.addflt.exit_crit_edge, label %bb8.i
+
+bb6.i.addflt.exit_crit_edge: ; preds = %bb6.i
+ br label %addflt.exit
+
+bb8.i: ; preds = %bb6.i
+ br label %bb9.i
+
+bb9.i: ; preds = %bb8.i, %bb5.i.bb9.i_crit_edge
+ br label %addflt.exit
+
+addflt.exit: ; preds = %bb9.i, %bb6.i.addflt.exit_crit_edge, %mulflt.exit.addflt.exit_crit_edge
+ br label %bb15
+
+bb18.loopexit: ; preds = %bb12.bb18.loopexit_crit_edge, %bb15.bb18.loopexit_crit_edge
+ ret i32 0
+}
diff --git a/test/Transforms/CodeGenPrepare/dg.exp b/test/Transforms/CodeGenPrepare/dg.exp
new file mode 100644
index 0000000..de42dad
--- /dev/null
+++ b/test/Transforms/CodeGenPrepare/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.ll]]
diff --git a/test/Transforms/ConstProp/2002-05-03-DivideByZeroException.ll b/test/Transforms/ConstProp/2002-05-03-DivideByZeroException.ll
new file mode 100644
index 0000000..15a6211
--- /dev/null
+++ b/test/Transforms/ConstProp/2002-05-03-DivideByZeroException.ll
@@ -0,0 +1,15 @@
+; Make sure that the constant propogator doesn't divide by zero!
+;
+; RUN: opt < %s -constprop
+;
+
+define i32 @test() {
+ %R = sdiv i32 12, 0 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @test2() {
+ %R = srem i32 12, 0 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
diff --git a/test/Transforms/ConstProp/2002-05-03-NotOperator.ll b/test/Transforms/ConstProp/2002-05-03-NotOperator.ll
new file mode 100644
index 0000000..d9cd674
--- /dev/null
+++ b/test/Transforms/ConstProp/2002-05-03-NotOperator.ll
@@ -0,0 +1,19 @@
+; This bug has to do with the fact that constant propogation was implemented in
+; terms of _logical_ not (! in C) instead of _bitwise_ not (~ in C). This was
+; due to a spec change.
+
+; Fix #2: The unary not instruction now no longer exists. Change to xor.
+
+; RUN: opt < %s -constprop -S | \
+; RUN: not grep {i32 0}
+
+define i32 @test1() {
+ %R = xor i32 123, -1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @test2() {
+ %R = xor i32 -123, -1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
diff --git a/test/Transforms/ConstProp/2002-09-03-SetCC-Bools.ll b/test/Transforms/ConstProp/2002-09-03-SetCC-Bools.ll
new file mode 100644
index 0000000..dd24d96
--- /dev/null
+++ b/test/Transforms/ConstProp/2002-09-03-SetCC-Bools.ll
@@ -0,0 +1,20 @@
+; SetCC on boolean values was not implemented!
+
+; RUN: opt < %s -constprop -die -S | \
+; RUN: not grep set
+
+define i1 @test1() {
+ %A = icmp ule i1 true, false ; <i1> [#uses=1]
+ %B = icmp uge i1 true, false ; <i1> [#uses=1]
+ %C = icmp ult i1 false, true ; <i1> [#uses=1]
+ %D = icmp ugt i1 true, false ; <i1> [#uses=1]
+ %E = icmp eq i1 false, false ; <i1> [#uses=1]
+ %F = icmp ne i1 false, true ; <i1> [#uses=1]
+ %G = and i1 %A, %B ; <i1> [#uses=1]
+ %H = and i1 %C, %D ; <i1> [#uses=1]
+ %I = and i1 %E, %F ; <i1> [#uses=1]
+ %J = and i1 %G, %H ; <i1> [#uses=1]
+ %K = and i1 %I, %J ; <i1> [#uses=1]
+ ret i1 %K
+}
+
diff --git a/test/Transforms/ConstProp/2003-05-12-DivideError.ll b/test/Transforms/ConstProp/2003-05-12-DivideError.ll
new file mode 100644
index 0000000..2708dce
--- /dev/null
+++ b/test/Transforms/ConstProp/2003-05-12-DivideError.ll
@@ -0,0 +1,15 @@
+; Make sure that the constant propagator doesn't cause a sigfpe
+;
+; RUN: opt < %s -constprop
+;
+
+define i32 @test() {
+ %R = sdiv i32 -2147483648, -1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @test2() {
+ %R = srem i32 -2147483648, -1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
diff --git a/test/Transforms/ConstProp/2005-01-28-SetCCGEP.ll b/test/Transforms/ConstProp/2005-01-28-SetCCGEP.ll
new file mode 100644
index 0000000..0b44b99
--- /dev/null
+++ b/test/Transforms/ConstProp/2005-01-28-SetCCGEP.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -constprop -S | \
+; RUN: not grep {ret i1 false}
+
+@b = external global [2 x { }] ; <[2 x { }]*> [#uses=2]
+
+define i1 @f() {
+ %tmp.2 = icmp eq { }* getelementptr ([2 x { }]* @b, i32 0, i32 0), getelementptr ([2 x { }]* @b, i32 0, i32 1) ; <i1> [#uses=1]
+ ret i1 %tmp.2
+}
+
diff --git a/test/Transforms/ConstProp/2006-11-30-vector-cast.ll b/test/Transforms/ConstProp/2006-11-30-vector-cast.ll
new file mode 100644
index 0000000..be76783
--- /dev/null
+++ b/test/Transforms/ConstProp/2006-11-30-vector-cast.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -constprop -S | \
+; RUN: grep {i32 -1}
+; RUN: opt < %s -constprop -S | \
+; RUN: not grep zeroinitializer
+
+define <4 x i32> @test() {
+ %tmp40 = bitcast <2 x i64> bitcast (<4 x i32> < i32 0, i32 0, i32 -1, i32 0 > to <2 x i64>) to <4 x i32>; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp40
+}
+
diff --git a/test/Transforms/ConstProp/2006-12-01-TruncBoolBug.ll b/test/Transforms/ConstProp/2006-12-01-TruncBoolBug.ll
new file mode 100644
index 0000000..e46a875
--- /dev/null
+++ b/test/Transforms/ConstProp/2006-12-01-TruncBoolBug.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {ret i1 false}
+define i1 @test() {
+ %X = trunc i32 320 to i1 ; <i1> [#uses=1]
+ ret i1 %X
+}
+
diff --git a/test/Transforms/ConstProp/2006-12-01-bool-casts.ll b/test/Transforms/ConstProp/2006-12-01-bool-casts.ll
new file mode 100644
index 0000000..3c06693
--- /dev/null
+++ b/test/Transforms/ConstProp/2006-12-01-bool-casts.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -constprop -S | \
+; RUN: grep {ret i32 -1}
+; RUN: opt < %s -constprop -S | \
+; RUN: grep {ret i32 1}
+
+define i32 @test1() {
+ %A = sext i1 true to i32 ; <i32> [#uses=1]
+ ret i32 %A
+}
+
+define i32 @test2() {
+ %A = zext i1 true to i32 ; <i32> [#uses=1]
+ ret i32 %A
+}
+
diff --git a/test/Transforms/ConstProp/2007-02-05-BitCast.ll b/test/Transforms/ConstProp/2007-02-05-BitCast.ll
new file mode 100644
index 0000000..ebe3d21
--- /dev/null
+++ b/test/Transforms/ConstProp/2007-02-05-BitCast.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -constprop -S | grep 1065353216
+
+define i32 @test() {
+ %A = bitcast float 1.000000e+00 to i32 ; <i32> [#uses=1]
+ ret i32 %A
+}
+
diff --git a/test/Transforms/ConstProp/2007-02-23-sdiv.ll b/test/Transforms/ConstProp/2007-02-23-sdiv.ll
new file mode 100644
index 0000000..721199f
--- /dev/null
+++ b/test/Transforms/ConstProp/2007-02-23-sdiv.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llvm-dis | grep {global i32 0}
+; PR1215
+
+@G = global i32 sdiv (i32 0, i32 -1)
+
diff --git a/test/Transforms/ConstProp/2007-11-23-cttz.ll b/test/Transforms/ConstProp/2007-11-23-cttz.ll
new file mode 100644
index 0000000..37cda30
--- /dev/null
+++ b/test/Transforms/ConstProp/2007-11-23-cttz.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -constprop -S | grep {ret i13 13}
+; PR1816
+declare i13 @llvm.cttz.i13(i13)
+
+define i13 @test() {
+ %X = call i13 @llvm.cttz.i13(i13 0)
+ ret i13 %X
+}
diff --git a/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll b/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
new file mode 100644
index 0000000..fd54954
--- /dev/null
+++ b/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -constprop -disable-output
+; PR2529
+define <4 x i1> @test1(i32 %argc, i8** %argv) {
+entry:
+ %foo = icmp slt <4 x i32> undef, <i32 14, i32 undef, i32 undef, i32 undef>
+ ret <4 x i1> %foo
+}
+
+define <4 x i1> @test2(i32 %argc, i8** %argv) {
+entry:
+ %foo = icmp slt <4 x i32> <i32 undef, i32 undef, i32 undef, i32
+undef>, <i32 undef, i32 undef, i32 undef, i32 undef>
+ ret <4 x i1> %foo
+}
+
+
+define <4 x i1> @test3() {
+ %foo = fcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float
+undef>, <float 1.0, float 1.0, float 1.0, float undef>
+ ret <4 x i1> %foo
+}
+
+define <4 x i1> @test4() {
+ %foo = fcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, <float 1.0, float 1.0, float 1.0, float 0.0>
+
+ ret <4 x i1> %foo
+}
+
diff --git a/test/Transforms/ConstProp/2009-06-20-constexpr-zero-lhs.ll b/test/Transforms/ConstProp/2009-06-20-constexpr-zero-lhs.ll
new file mode 100644
index 0000000..3322605
--- /dev/null
+++ b/test/Transforms/ConstProp/2009-06-20-constexpr-zero-lhs.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llvm-dis | not grep ptrtoint
+; PR4424
+@G = external global i32
+@test1 = constant i32 sdiv (i32 0, i32 ptrtoint (i32* @G to i32))
+@test2 = constant i32 udiv (i32 0, i32 ptrtoint (i32* @G to i32))
+@test3 = constant i32 srem (i32 0, i32 ptrtoint (i32* @G to i32))
+@test4 = constant i32 urem (i32 0, i32 ptrtoint (i32* @G to i32))
+@test5 = constant i32 lshr (i32 0, i32 ptrtoint (i32* @G to i32))
+@test6 = constant i32 ashr (i32 0, i32 ptrtoint (i32* @G to i32))
+@test7 = constant i32 shl (i32 0, i32 ptrtoint (i32* @G to i32))
+
diff --git a/test/Transforms/ConstProp/2009-09-01-GEP-Crash.ll b/test/Transforms/ConstProp/2009-09-01-GEP-Crash.ll
new file mode 100644
index 0000000..fc7ff90
--- /dev/null
+++ b/test/Transforms/ConstProp/2009-09-01-GEP-Crash.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -constprop | llvm-dis
+; PR4848
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+%0 = type { %struct.anon }
+%1 = type { %0, %2, [24 x i8] }
+%2 = type <{ %3, %3 }>
+%3 = type { %struct.hrtimer_cpu_base*, i32, %struct.rb_root, %struct.rb_node*, %struct.pgprot, i64 ()*, [16 x i8] }
+%struct.anon = type { }
+%struct.hrtimer_clock_base = type { %struct.hrtimer_cpu_base*, i32, %struct.rb_root, %struct.rb_node*, %struct.pgprot, i64 ()*, %struct.pgprot, %struct.pgprot }
+%struct.hrtimer_cpu_base = type { %0, [2 x %struct.hrtimer_clock_base], %struct.pgprot, i32, i64 }
+%struct.pgprot = type { i64 }
+%struct.rb_node = type { i64, %struct.rb_node*, %struct.rb_node* }
+%struct.rb_root = type { %struct.rb_node* }
+
+@per_cpu__hrtimer_bases = external global %1, align 8 ; <%1*> [#uses=1]
+
+define void @init_hrtimers_cpu(i32 %cpu) nounwind noredzone section ".cpuinit.text" {
+entry:
+ %tmp3 = getelementptr %struct.hrtimer_cpu_base* bitcast (%1* @per_cpu__hrtimer_bases to %struct.hrtimer_cpu_base*), i32 0, i32 0 ; <%0*> [#uses=1]
+ %tmp5 = bitcast %0* %tmp3 to i8* ; <i8*> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/ConstProp/basictest.ll b/test/Transforms/ConstProp/basictest.ll
new file mode 100644
index 0000000..14580c1
--- /dev/null
+++ b/test/Transforms/ConstProp/basictest.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -constprop -die -S | FileCheck %s
+
+; This is a basic sanity check for constant propogation. The add instruction
+; should be eliminated.
+define i32 @test1(i1 %B) {
+ br i1 %B, label %BB1, label %BB2
+
+BB1:
+ %Val = add i32 0, 0
+ br label %BB3
+
+BB2:
+ br label %BB3
+
+BB3:
+; CHECK: @test1
+; CHECK: %Ret = phi i32 [ 0, %BB1 ], [ 1, %BB2 ]
+ %Ret = phi i32 [ %Val, %BB1 ], [ 1, %BB2 ]
+ ret i32 %Ret
+}
+
+
+; PR6197
+define i1 @test2(i8* %f) nounwind {
+entry:
+ %V = icmp ne i8* blockaddress(@test2, %bb), null
+ br label %bb
+bb:
+ ret i1 %V
+
+; CHECK: @test2
+; CHECK: ret i1 true
+}
diff --git a/test/Transforms/ConstProp/bitcast.ll b/test/Transforms/ConstProp/bitcast.ll
new file mode 100644
index 0000000..bf943c9
--- /dev/null
+++ b/test/Transforms/ConstProp/bitcast.ll
@@ -0,0 +1,2 @@
+; RUN: llvm-as < %s | llvm-dis | grep 0x36A0000000000000
+@A = global float 0x36A0000000000000 ; <float*> [#uses=0]
diff --git a/test/Transforms/ConstProp/bitcast2.ll b/test/Transforms/ConstProp/bitcast2.ll
new file mode 100644
index 0000000..5c5eab1
--- /dev/null
+++ b/test/Transforms/ConstProp/bitcast2.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | not grep bitcast
+; PR2165
+
+define <1 x i64> @test() {
+ %A = bitcast i64 63 to <1 x i64>
+ ret <1 x i64> %A
+}
+
diff --git a/test/Transforms/ConstProp/bswap.ll b/test/Transforms/ConstProp/bswap.ll
new file mode 100644
index 0000000..9fce309
--- /dev/null
+++ b/test/Transforms/ConstProp/bswap.ll
@@ -0,0 +1,25 @@
+; bswap should be constant folded when it is passed a constant argument
+
+; RUN: opt < %s -constprop -S | not grep call
+
+declare i16 @llvm.bswap.i16(i16)
+
+declare i32 @llvm.bswap.i32(i32)
+
+declare i64 @llvm.bswap.i64(i64)
+
+define i16 @W() {
+ %Z = call i16 @llvm.bswap.i16( i16 1 ) ; <i16> [#uses=1]
+ ret i16 %Z
+}
+
+define i32 @X() {
+ %Z = call i32 @llvm.bswap.i32( i32 1 ) ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i64 @Y() {
+ %Z = call i64 @llvm.bswap.i64( i64 1 ) ; <i64> [#uses=1]
+ ret i64 %Z
+}
+
diff --git a/test/Transforms/ConstProp/calls.ll b/test/Transforms/ConstProp/calls.ll
new file mode 100644
index 0000000..3c266fe
--- /dev/null
+++ b/test/Transforms/ConstProp/calls.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -constprop -S | not grep call
+
+declare double @cos(double)
+
+declare double @sin(double)
+
+declare double @tan(double)
+
+declare double @sqrt(double)
+
+declare i1 @llvm.isunordered.f64(double, double)
+
+define double @T() {
+ %A = call double @cos( double 0.000000e+00 ) ; <double> [#uses=1]
+ %B = call double @sin( double 0.000000e+00 ) ; <double> [#uses=1]
+ %a = fadd double %A, %B ; <double> [#uses=1]
+ %C = call double @tan( double 0.000000e+00 ) ; <double> [#uses=1]
+ %b = fadd double %a, %C ; <double> [#uses=1]
+ %D = call double @sqrt( double 4.000000e+00 ) ; <double> [#uses=1]
+ %c = fadd double %b, %D ; <double> [#uses=1]
+ ret double %c
+}
+
+define i1 @TNAN() {
+ %A = fcmp uno double 0x7FF8000000000000, 1.000000e+00 ; <i1> [#uses=1]
+ %B = fcmp uno double 1.230000e+02, 1.000000e+00 ; <i1> [#uses=1]
+ %C = or i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %C
+}
+
diff --git a/test/Transforms/ConstProp/constant-expr.ll b/test/Transforms/ConstProp/constant-expr.ll
new file mode 100644
index 0000000..9963032
--- /dev/null
+++ b/test/Transforms/ConstProp/constant-expr.ll
@@ -0,0 +1,67 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+
+@X = external global i8
+@Y = external global i8
+@Z = external global i8
+
+@A = global i1 add (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+; CHECK: @A = global i1 xor (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+@B = global i1 sub (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z)), align 2
+; CHECK: @B = global i1 xor (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+@C = global i1 mul (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+; CHECK: @C = global i1 and (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+
+@D = global i1 sdiv (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+; CHECK: @D = global i1 icmp ult (i8* @X, i8* @Y)
+@E = global i1 udiv (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+; CHECK: @E = global i1 icmp ult (i8* @X, i8* @Y)
+@F = global i1 srem (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+; CHECK: @F = global i1 false ; <i1*> [#uses=0]
+@G = global i1 urem (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
+; CHECK: @G = global i1 false ; <i1*> [#uses=0]
+
+@H = global i1 icmp ule (i32* bitcast (i8* @X to i32*), i32* bitcast (i8* @Y to i32*))
+; CHECK: @H = global i1 icmp ule (i8* @X, i8* @Y)
+
+@I = global i1 xor (i1 icmp ult (i8* @X, i8* @Y), i1 false)
+; CHECK: @I = global i1 icmp ult (i8* @X, i8* @Y)
+@J = global i1 xor (i1 icmp ult (i8* @X, i8* @Y), i1 true)
+; CHECK: @J = global i1 icmp uge (i8* @X, i8* @Y)
+
+@K = global i1 icmp eq (i1 icmp ult (i8* @X, i8* @Y), i1 false)
+; CHECK: @K = global i1 icmp uge (i8* @X, i8* @Y)
+@L = global i1 icmp eq (i1 icmp ult (i8* @X, i8* @Y), i1 true)
+; CHECK: @L = global i1 icmp ult (i8* @X, i8* @Y)
+@M = global i1 icmp ne (i1 icmp ult (i8* @X, i8* @Y), i1 true)
+; CHECK: @M = global i1 icmp uge (i8* @X, i8* @Y)
+@N = global i1 icmp ne (i1 icmp ult (i8* @X, i8* @Y), i1 false)
+; CHECK: @N = global i1 icmp ult (i8* @X, i8* @Y)
+
+@O = global i1 icmp eq (i32 zext (i1 icmp ult (i8* @X, i8* @Y) to i32), i32 0)
+; CHECK: @O = global i1 icmp uge (i8* @X, i8* @Y)
+
+
+
+; PR5176
+
+; CHECK: @T1 = global i1 true
+@T1 = global i1 icmp eq (i64 and (i64 trunc (i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256), i256 64), i256 -6277101735386680763495507056286727952638980837032266301441), i256 6277101735386680763835789423207666416102355444464034512895), i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256), i256 192)), i256 64) to i64), i64 1), i64 0)
+
+; CHECK: @T2 = global i1* @B
+@T2 = global i1* inttoptr (i64 add (i64 trunc (i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256), i256 64), i256 -6277101735386680763495507056286727952638980837032266301441), i256 6277101735386680763835789423207666416102355444464034512895), i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256), i256 192)), i256 192) to i64), i64 trunc (i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256), i256 64), i256 -6277101735386680763495507056286727952638980837032266301441), i256 6277101735386680763835789423207666416102355444464034512895), i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256), i256 192)), i256 128) to i64)) to i1*)
+
+; CHECK: @T3 = global i64 add (i64 ptrtoint (i1* @B to i64), i64 -1)
+@T3 = global i64 add (i64 trunc (i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256), i256 64), i256 -6277101735386680763495507056286727952638980837032266301441), i256 6277101735386680763835789423207666416102355444464034512895), i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256), i256 192)), i256 64) to i64), i64 -1)
+
+; CHECK: @T4 = global i1* @B
+@T4 = global i1* inttoptr (i64 trunc (i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256), i256 64), i256 -6277101735386680763495507056286727952638980837032266301441), i256 6277101735386680763835789423207666416102355444464034512895), i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256), i256 192)), i256 64) to i64) to i1*)
+
+; CHECK: @T5 = global i1* @A
+@T5 = global i1* inttoptr (i64 add (i64 trunc (i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256), i256 64), i256 -6277101735386680763495507056286727952638980837032266301441), i256 6277101735386680763835789423207666416102355444464034512895), i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256), i256 192)), i256 192) to i64), i64 trunc (i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256), i256 64), i256 -6277101735386680763495507056286727952638980837032266301441), i256 6277101735386680763835789423207666416102355444464034512895), i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256), i256 192)), i256 128) to i64)) to i1*)
+
+
+
+; PR6096
+
+; No check line. This used to crash llvm-as.
+@T6 = global <2 x i1> fcmp ole (<2 x float> fdiv (<2 x float> undef, <2 x float> <float 1.000000e+00, float 1.000000e+00>), <2 x float> zeroinitializer)
diff --git a/test/Transforms/ConstProp/dg.exp b/test/Transforms/ConstProp/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/ConstProp/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/ConstProp/div-zero.ll b/test/Transforms/ConstProp/div-zero.ll
new file mode 100644
index 0000000..f78a34f
--- /dev/null
+++ b/test/Transforms/ConstProp/div-zero.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | grep {ret i32 0}
+; PR4424
+declare void @ext()
+
+define i32 @foo(i32 %ptr) {
+entry:
+ %zero = sub i32 %ptr, %ptr ; <i32> [#uses=1]
+ %div_zero = sdiv i32 %zero, ptrtoint (i32* getelementptr (i32* null,
+i32 1) to i32) ; <i32> [#uses=1]
+ ret i32 %div_zero
+}
+
diff --git a/test/Transforms/ConstProp/float-to-ptr-cast.ll b/test/Transforms/ConstProp/float-to-ptr-cast.ll
new file mode 100644
index 0000000..937f606
--- /dev/null
+++ b/test/Transforms/ConstProp/float-to-ptr-cast.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -constprop -S | FileCheck %s
+
+define i32* @test1() {
+ %X = inttoptr i64 0 to i32* ; <i32*> [#uses=1]
+ ret i32* %X
+}
+
+; CHECK: ret i32* null
+
+define i32* @test2() {
+ ret i32* null
+}
+
+; CHECK: ret i32* null
+
diff --git a/test/Transforms/ConstProp/loads.ll b/test/Transforms/ConstProp/loads.ll
new file mode 100644
index 0000000..9fbba2b
--- /dev/null
+++ b/test/Transforms/ConstProp/loads.ll
@@ -0,0 +1,122 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+@g1 = constant {{i32,i8},i32} {{i32,i8} { i32 -559038737, i8 186 }, i32 -889275714 }
+@g2 = constant double 1.0
+@g3 = constant {i64, i64} { i64 123, i64 112312312 }
+
+; Simple load
+define i32 @test1() {
+ %r = load i32* getelementptr ({{i32,i8},i32}* @g1, i32 0, i32 0, i32 0)
+ ret i32 %r
+; CHECK: @test1
+; CHECK: ret i32 -559038737
+}
+
+; PR3152
+; Load of first 16 bits of 32-bit value.
+define i16 @test2() {
+ %r = load i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @g1, i32 0, i32 0, i32 0) to i16*)
+ ret i16 %r
+
+; CHECK: @test2
+; CHECK: ret i16 -16657
+}
+
+; Load of second 16 bits of 32-bit value.
+define i16 @test3() {
+ %r = load i16* getelementptr(i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @g1, i32 0, i32 0, i32 0) to i16*), i32 1)
+ ret i16 %r
+
+; CHECK: @test3
+; CHECK: ret i16 -8531
+}
+
+; Load of 8 bit field + tail padding.
+define i16 @test4() {
+ %r = load i16* getelementptr(i16* bitcast(i32* getelementptr ({{i32,i8},i32}* @g1, i32 0, i32 0, i32 0) to i16*), i32 2)
+ ret i16 %r
+; CHECK: @test4
+; CHECK: ret i16 186
+}
+
+; Load of double bits.
+define i64 @test6() {
+ %r = load i64* bitcast(double* @g2 to i64*)
+ ret i64 %r
+
+; CHECK: @test6
+; CHECK: ret i64 4607182418800017408
+}
+
+; Load of double bits.
+define i16 @test7() {
+ %r = load i16* bitcast(double* @g2 to i16*)
+ ret i16 %r
+
+; CHECK: @test7
+; CHECK: ret i16 0
+}
+
+; Double load.
+define double @test8() {
+ %r = load double* bitcast({{i32,i8},i32}* @g1 to double*)
+ ret double %r
+
+; CHECK: @test8
+; CHECK: ret double 0xBADEADBEEF
+}
+
+
+; i128 load.
+define i128 @test9() {
+ %r = load i128* bitcast({i64, i64}* @g3 to i128*)
+ ret i128 %r
+
+; CHECK: @test9
+; CHECK: ret i128 2071796475790618158476296315
+}
+
+; vector load.
+define <2 x i64> @test10() {
+ %r = load <2 x i64>* bitcast({i64, i64}* @g3 to <2 x i64>*)
+ ret <2 x i64> %r
+
+; CHECK: @test10
+; CHECK: ret <2 x i64> <i64 123, i64 112312312>
+}
+
+
+; PR5287
+@g4 = internal constant { i8, i8 } { i8 -95, i8 8 }
+
+define i16 @test11() nounwind {
+entry:
+ %a = load i16* bitcast ({ i8, i8 }* @g4 to i16*)
+ ret i16 %a
+
+; CHECK: @test11
+; CHECK: ret i16 2209
+}
+
+
+; PR5551
+@test12g = private constant [6 x i8] c"a\00b\00\00\00"
+
+define i16 @test12() {
+ %a = load i16* getelementptr inbounds ([3 x i16]* bitcast ([6 x i8]* @test12g to [3 x i16]*), i32 0, i64 1)
+ ret i16 %a
+; CHECK: @test12
+; CHECK: ret i16 98
+}
+
+
+; PR5978
+@g5 = constant i8 4
+define i1 @test13() {
+ %A = load i1* bitcast (i8* @g5 to i1*)
+ ret i1 %A
+; CHECK: @test13
+; CHECK: ret i1 false
+}
diff --git a/test/Transforms/ConstProp/logicaltest.ll b/test/Transforms/ConstProp/logicaltest.ll
new file mode 100644
index 0000000..7a90a71
--- /dev/null
+++ b/test/Transforms/ConstProp/logicaltest.ll
@@ -0,0 +1,35 @@
+; Ensure constant propogation of logical instructions is working correctly.
+
+; RUN: opt < %s -constprop -die -S | \
+; RUN: not egrep {and|or|xor}
+
+define i32 @test1() {
+ %R = and i32 4, 1234 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i1 @test1.upgrd.1() {
+ %R = and i1 true, false ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i32 @test2() {
+ %R = or i32 4, 1234 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i1 @test2.upgrd.2() {
+ %R = or i1 true, false ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i32 @test3() {
+ %R = xor i32 4, 1234 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i1 @test3.upgrd.3() {
+ %R = xor i1 true, false ; <i1> [#uses=1]
+ ret i1 %R
+}
+
diff --git a/test/Transforms/ConstProp/nottest.ll b/test/Transforms/ConstProp/nottest.ll
new file mode 100644
index 0000000..799ceca
--- /dev/null
+++ b/test/Transforms/ConstProp/nottest.ll
@@ -0,0 +1,19 @@
+; Ensure constant propogation of 'not' instructions is working correctly.
+
+; RUN: opt < %s -constprop -die -S | not grep xor
+
+define i32 @test1() {
+ %R = xor i32 4, -1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @test2() {
+ %R = xor i32 -23, -1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i1 @test3() {
+ %R = xor i1 true, true ; <i1> [#uses=1]
+ ret i1 %R
+}
+
diff --git a/test/Transforms/ConstProp/overflow-ops.ll b/test/Transforms/ConstProp/overflow-ops.ll
new file mode 100644
index 0000000..1547a4d
--- /dev/null
+++ b/test/Transforms/ConstProp/overflow-ops.ll
@@ -0,0 +1,172 @@
+; RUN: opt < %s -constprop -S | FileCheck %s
+
+%i8i1 = type {i8, i1}
+
+;;-----------------------------
+;; uadd
+;;-----------------------------
+
+define {i8, i1} @uadd_1() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 42, i8 100)
+ ret {i8, i1} %t
+
+; CHECK: @uadd_1
+; CHECK: ret %i8i1 { i8 -114, i1 false }
+}
+
+define {i8, i1} @uadd_2() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 142, i8 120)
+ ret {i8, i1} %t
+
+; CHECK: @uadd_2
+; CHECK: ret %i8i1 { i8 6, i1 true }
+}
+
+;;-----------------------------
+;; usub
+;;-----------------------------
+
+define {i8, i1} @usub_1() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.usub.with.overflow.i8(i8 4, i8 2)
+ ret {i8, i1} %t
+
+; CHECK: @usub_1
+; CHECK: ret %i8i1 { i8 2, i1 false }
+}
+
+define {i8, i1} @usub_2() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.usub.with.overflow.i8(i8 4, i8 6)
+ ret {i8, i1} %t
+
+; CHECK: @usub_2
+; CHECK: ret %i8i1 { i8 -2, i1 true }
+}
+
+;;-----------------------------
+;; sadd
+;;-----------------------------
+
+define {i8, i1} @sadd_1() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 42, i8 2)
+ ret {i8, i1} %t
+
+; CHECK: @sadd_1
+; CHECK: ret %i8i1 { i8 44, i1 false }
+}
+
+define {i8, i1} @sadd_2() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 120, i8 10)
+ ret {i8, i1} %t
+
+; CHECK: @sadd_2
+; CHECK: ret %i8i1 { i8 -126, i1 true }
+}
+
+define {i8, i1} @sadd_3() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 -120, i8 10)
+ ret {i8, i1} %t
+
+; CHECK: @sadd_3
+; CHECK: ret %i8i1 { i8 -110, i1 false }
+}
+
+define {i8, i1} @sadd_4() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 -120, i8 -10)
+ ret {i8, i1} %t
+
+; CHECK: @sadd_4
+; CHECK: ret %i8i1 { i8 126, i1 true }
+}
+
+define {i8, i1} @sadd_5() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 2, i8 -10)
+ ret {i8, i1} %t
+
+; CHECK: @sadd_5
+; CHECK: ret %i8i1 { i8 -8, i1 false }
+}
+
+
+;;-----------------------------
+;; ssub
+;;-----------------------------
+
+define {i8, i1} @ssub_1() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.ssub.with.overflow.i8(i8 4, i8 2)
+ ret {i8, i1} %t
+
+; CHECK: @ssub_1
+; CHECK: ret %i8i1 { i8 2, i1 false }
+}
+
+define {i8, i1} @ssub_2() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.ssub.with.overflow.i8(i8 4, i8 6)
+ ret {i8, i1} %t
+
+; CHECK: @ssub_2
+; CHECK: ret %i8i1 { i8 -2, i1 false }
+}
+
+define {i8, i1} @ssub_3() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.ssub.with.overflow.i8(i8 -10, i8 120)
+ ret {i8, i1} %t
+
+; CHECK: @ssub_3
+; CHECK: ret %i8i1 { i8 126, i1 true }
+}
+
+define {i8, i1} @ssub_3b() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.ssub.with.overflow.i8(i8 -10, i8 10)
+ ret {i8, i1} %t
+
+; CHECK: @ssub_3b
+; CHECK: ret %i8i1 { i8 -20, i1 false }
+}
+
+define {i8, i1} @ssub_4() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.ssub.with.overflow.i8(i8 120, i8 -10)
+ ret {i8, i1} %t
+
+; CHECK: @ssub_4
+; CHECK: ret %i8i1 { i8 -126, i1 true }
+}
+
+define {i8, i1} @ssub_4b() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.ssub.with.overflow.i8(i8 20, i8 -10)
+ ret {i8, i1} %t
+
+; CHECK: @ssub_4b
+; CHECK: ret %i8i1 { i8 30, i1 false }
+}
+
+define {i8, i1} @ssub_5() nounwind {
+entry:
+ %t = call {i8, i1} @llvm.ssub.with.overflow.i8(i8 -20, i8 -10)
+ ret {i8, i1} %t
+
+; CHECK: @ssub_5
+; CHECK: ret %i8i1 { i8 -10, i1 false }
+}
+
+
+
+declare {i8, i1} @llvm.uadd.with.overflow.i8(i8, i8)
+declare {i8, i1} @llvm.usub.with.overflow.i8(i8, i8)
+
+declare {i8, i1} @llvm.sadd.with.overflow.i8(i8, i8)
+declare {i8, i1} @llvm.ssub.with.overflow.i8(i8, i8)
diff --git a/test/Transforms/ConstProp/phi.ll b/test/Transforms/ConstProp/phi.ll
new file mode 100644
index 0000000..3d9e284
--- /dev/null
+++ b/test/Transforms/ConstProp/phi.ll
@@ -0,0 +1,17 @@
+; This is a basic sanity check for constant propogation. The add instruction
+; should be eliminated.
+
+; RUN: opt < %s -constprop -die -S | not grep phi
+
+define i32 @test(i1 %B) {
+BB0:
+ br i1 %B, label %BB1, label %BB3
+
+BB1: ; preds = %BB0
+ br label %BB3
+
+BB3: ; preds = %BB1, %BB0
+ %Ret = phi i32 [ 1, %BB0 ], [ 1, %BB1 ] ; <i32> [#uses=1]
+ ret i32 %Ret
+}
+
diff --git a/test/Transforms/ConstProp/remtest.ll b/test/Transforms/ConstProp/remtest.ll
new file mode 100644
index 0000000..efd2d48
--- /dev/null
+++ b/test/Transforms/ConstProp/remtest.ll
@@ -0,0 +1,24 @@
+; Ensure constant propagation of remainder instructions is working correctly.
+
+; RUN: opt < %s -constprop -die -S | not grep rem
+
+define i32 @test1() {
+ %R = srem i32 4, 3 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @test2() {
+ %R = srem i32 123, -23 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define float @test3() {
+ %R = frem float 0x4028E66660000000, 0x405ECDA1C0000000 ; <float> [#uses=1]
+ ret float %R
+}
+
+define double @test4() {
+ %R = frem double 0x4073833BEE07AFF8, 0x4028AAABB2A0D19C ; <double> [#uses=1]
+ ret double %R
+}
+
diff --git a/test/Transforms/ConstantMerge/2002-09-23-CPR-Update.ll b/test/Transforms/ConstantMerge/2002-09-23-CPR-Update.ll
new file mode 100644
index 0000000..b7b05cf
--- /dev/null
+++ b/test/Transforms/ConstantMerge/2002-09-23-CPR-Update.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -constmerge > /dev/null
+
[email protected] = internal constant { i32 } { i32 7 } ; <{ i32 }*> [#uses=1]
+@bar = internal constant { i32 } { i32 7 } ; <{ i32 }*> [#uses=1]
+
+declare i32 @test(i32*)
+
+define void @foo() {
+ call i32 @test( i32* getelementptr ({ i32 }* @foo.upgrd.1, i64 0, i32 0) ) ; <i32>:1 [#uses=0]
+ call i32 @test( i32* getelementptr ({ i32 }* @bar, i64 0, i32 0) ) ; <i32>:2 [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/ConstantMerge/2003-10-28-MergeExternalConstants.ll b/test/Transforms/ConstantMerge/2003-10-28-MergeExternalConstants.ll
new file mode 100644
index 0000000..ce79e3b
--- /dev/null
+++ b/test/Transforms/ConstantMerge/2003-10-28-MergeExternalConstants.ll
@@ -0,0 +1,7 @@
+; RUN: opt -S -constmerge %s | FileCheck %s
+
+; CHECK: @foo = constant i32 6
+; CHECK: @bar = constant i32 6
+@foo = constant i32 6 ; <i32*> [#uses=0]
+@bar = constant i32 6 ; <i32*> [#uses=0]
+
diff --git a/test/Transforms/ConstantMerge/2006-03-07-DontMergeDiffSections.ll b/test/Transforms/ConstantMerge/2006-03-07-DontMergeDiffSections.ll
new file mode 100644
index 0000000..cea18a0
--- /dev/null
+++ b/test/Transforms/ConstantMerge/2006-03-07-DontMergeDiffSections.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -constmerge -S | grep foo
+; RUN: opt < %s -constmerge -S | grep bar
+
+; Don't merge constants in different sections.
+
+@G1 = internal constant i32 1, section "foo" ; <i32*> [#uses=1]
+@G2 = internal constant i32 1, section "bar" ; <i32*> [#uses=1]
+@G3 = internal constant i32 1, section "bar" ; <i32*> [#uses=1]
+
+define void @test(i32** %P1, i32** %P2, i32** %P3) {
+ store i32* @G1, i32** %P1
+ store i32* @G2, i32** %P2
+ store i32* @G3, i32** %P3
+ ret void
+}
+
diff --git a/test/Transforms/ConstantMerge/dg.exp b/test/Transforms/ConstantMerge/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/ConstantMerge/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/DeadArgElim/2006-06-27-struct-ret.ll b/test/Transforms/DeadArgElim/2006-06-27-struct-ret.ll
new file mode 100644
index 0000000..fac6dd2
--- /dev/null
+++ b/test/Transforms/DeadArgElim/2006-06-27-struct-ret.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -deadargelim -disable-output
+
+define internal void @build_delaunay({ i32 }* sret %agg.result) {
+ ret void
+}
+
+define void @test() {
+ call void @build_delaunay( { i32 }* sret null )
+ ret void
+}
+
diff --git a/test/Transforms/DeadArgElim/2007-02-07-FuncRename.ll b/test/Transforms/DeadArgElim/2007-02-07-FuncRename.ll
new file mode 100644
index 0000000..d5bd6c4
--- /dev/null
+++ b/test/Transforms/DeadArgElim/2007-02-07-FuncRename.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -deadargelim -S | grep {@test(}
+; RUN: opt < %s -deadargelim -S | not grep dead
+
+define internal i32 @test(i32 %X, i32 %dead) {
+ ret i32 %X
+}
+
+define i32 @caller() {
+ %A = call i32 @test(i32 123, i32 456)
+ ret i32 %A
+}
diff --git a/test/Transforms/DeadArgElim/2007-10-18-VarargsReturn.ll b/test/Transforms/DeadArgElim/2007-10-18-VarargsReturn.ll
new file mode 100644
index 0000000..d4edce9
--- /dev/null
+++ b/test/Transforms/DeadArgElim/2007-10-18-VarargsReturn.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -deadargelim -S | not grep {ret i32 0}
+; PR1735
+
+define internal i32 @test(i32 %A, ...) {
+ ret i32 %A
+}
+
+define i32 @foo() {
+ %A = call i32(i32, ...)* @test(i32 1)
+ ret i32 %A
+}
+
diff --git a/test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll b/test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll
new file mode 100644
index 0000000..0e9c4f7
--- /dev/null
+++ b/test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -deadargelim -S > %t
+; RUN: cat %t | grep nounwind | count 2
+; RUN: cat %t | grep signext | count 2
+; RUN: cat %t | not grep inreg
+; RUN: cat %t | not grep zeroext
+; RUN: cat %t | not grep byval
+
+ %struct = type { }
+
+@g = global i8 0
+
+define internal i8 @foo(i8* inreg %p, i8 signext %y, ... ) zeroext nounwind {
+ store i8 %y, i8* @g
+ ret i8 0
+}
+
+define i32 @bar() {
+ %A = call i8(i8*, i8, ...)* @foo(i8* inreg null, i8 signext 1, %struct* byval null ) zeroext nounwind
+ ret i32 0
+}
diff --git a/test/Transforms/DeadArgElim/2008-01-16-VarargsParamAttrs.ll b/test/Transforms/DeadArgElim/2008-01-16-VarargsParamAttrs.ll
new file mode 100644
index 0000000..93282f7
--- /dev/null
+++ b/test/Transforms/DeadArgElim/2008-01-16-VarargsParamAttrs.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -deadargelim -S | grep byval
+
+ %struct.point = type { double, double }
+@pts = global [4 x %struct.point] [ %struct.point { double 1.000000e+00, double 2.000000e+00 }, %struct.point { double 3.000000e+00, double 4.000000e+00 }, %struct.point { double 5.000000e+00, double 6.000000e+00 }, %struct.point { double 7.000000e+00, double 8.000000e+00 } ], align 32 ; <[4 x %struct.point]*> [#uses=1]
+
+define internal i32 @va1(i32 %nargs, ...) {
+entry:
+ %pi = alloca %struct.point ; <%struct.point*> [#uses=0]
+ %args = alloca i8* ; <i8**> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %args1 = bitcast i8** %args to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_start( i8* %args1 )
+ %args41 = bitcast i8** %args to i8* ; <i8*> [#uses=1]
+ call void @llvm.va_end( i8* %args41 )
+ ret i32 undef
+}
+
+declare void @llvm.va_start(i8*) nounwind
+
+declare void @llvm.va_end(i8*) nounwind
+
+define i32 @main() {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = getelementptr [4 x %struct.point]* @pts, i32 0, i32 0 ; <%struct.point*> [#uses=1]
+ %tmp1 = call i32 (i32, ...)* @va1( i32 1, %struct.point* byval %tmp ) nounwind ; <i32> [#uses=0]
+ call void @exit( i32 0 ) noreturn nounwind
+ unreachable
+}
+
+declare void @exit(i32) noreturn nounwind
diff --git a/test/Transforms/DeadArgElim/2008-06-23-DeadAfterLive.ll b/test/Transforms/DeadArgElim/2008-06-23-DeadAfterLive.ll
new file mode 100644
index 0000000..adfd019
--- /dev/null
+++ b/test/Transforms/DeadArgElim/2008-06-23-DeadAfterLive.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -deadargelim -die -S > %t
+; RUN: cat %t | grep 123
+
+; This test tries to catch wrongful removal of return values for a specific case
+; that was break llvm-gcc builds.
+
+; This function has a live return value, it is used by @alive.
+define internal i32 @test5() {
+ ret i32 123
+}
+
+; This function doesn't use the return value @test5 and tries to lure DAE into
+; marking @test5's return value dead because only this call is unused.
+define i32 @dead() {
+ %DEAD = call i32 @test5()
+ ret i32 0
+}
+
+; This function ensures the retval of @test5 is live.
+define i32 @alive() {
+ %LIVE = call i32 @test5()
+ ret i32 %LIVE
+}
diff --git a/test/Transforms/DeadArgElim/2009-03-17-MRE-Invoke.ll b/test/Transforms/DeadArgElim/2009-03-17-MRE-Invoke.ll
new file mode 100644
index 0000000..f251d6c
--- /dev/null
+++ b/test/Transforms/DeadArgElim/2009-03-17-MRE-Invoke.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -deadargelim | llvm-dis
+; PR3807
+
+define internal { i32, i32 } @foo() {
+ ret {i32,i32} {i32 42, i32 4}
+}
+
+define i32 @bar() {
+ %x = invoke {i32,i32} @foo() to label %T unwind label %T2
+T:
+ %y = extractvalue {i32,i32} %x, 1
+ ret i32 %y
+T2:
+ unreachable
+}
+
+define i32 @bar2() {
+entry:
+ %x = invoke {i32,i32} @foo() to label %T unwind label %T2
+T:
+ %PN = phi i32 [0, %entry]
+ %y = extractvalue {i32,i32} %x, 1
+ ret i32 %y
+T2:
+ unreachable
+}
\ No newline at end of file
diff --git a/test/Transforms/DeadArgElim/basictest.ll b/test/Transforms/DeadArgElim/basictest.ll
new file mode 100644
index 0000000..9ac2222
--- /dev/null
+++ b/test/Transforms/DeadArgElim/basictest.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -deadargelim -S | not grep DEADARG
+
+; test - an obviously dead argument
+define internal i32 @test(i32 %v, i32 %DEADARG1, i32* %p) {
+ store i32 %v, i32* %p
+ ret i32 %v
+}
+
+; hardertest - an argument which is only used by a call of a function with a
+; dead argument.
+define internal i32 @hardertest(i32 %DEADARG2) {
+ %p = alloca i32 ; <i32*> [#uses=1]
+ %V = call i32 @test( i32 5, i32 %DEADARG2, i32* %p ) ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+; evenhardertest - recursive dead argument...
+define internal void @evenhardertest(i32 %DEADARG3) {
+ call void @evenhardertest( i32 %DEADARG3 )
+ ret void
+}
+
+define internal void @needarg(i32 %TEST) {
+ call i32 @needarg2( i32 %TEST ) ; <i32>:1 [#uses=0]
+ ret void
+}
+
+define internal i32 @needarg2(i32 %TEST) {
+ ret i32 %TEST
+}
+
+define internal void @needarg3(i32 %TEST3) {
+ call void @needarg( i32 %TEST3 )
+ ret void
+}
+
diff --git a/test/Transforms/DeadArgElim/canon.ll b/test/Transforms/DeadArgElim/canon.ll
new file mode 100644
index 0000000..11cd482
--- /dev/null
+++ b/test/Transforms/DeadArgElim/canon.ll
@@ -0,0 +1,24 @@
+; This test shows a few canonicalizations made by deadargelim
+; RUN: opt < %s -deadargelim -S > %t
+; This test should remove {} and replace it with void
+; RUN: cat %t | grep {define internal void @test}
+; This test shouls replace the {i32} return value with just i32
+; RUN: cat %t | grep {define internal i32 @test2}
+
+define internal {} @test() {
+ ret {} undef
+}
+
+define internal {i32} @test2() {
+ ret {i32} undef
+}
+
+define void @caller() {
+ call {} @test()
+ %X = call {i32} @test2()
+ %Y = extractvalue {i32} %X, 0
+ call void @user(i32 %Y, {i32} %X)
+ ret void
+}
+
+declare void @user(i32, {i32})
diff --git a/test/Transforms/DeadArgElim/dead_vaargs.ll b/test/Transforms/DeadArgElim/dead_vaargs.ll
new file mode 100644
index 0000000..db3135c
--- /dev/null
+++ b/test/Transforms/DeadArgElim/dead_vaargs.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -deadargelim -S | not grep 47
+; RUN: opt < %s -deadargelim -S | not grep 1.0
+
+define i32 @bar(i32 %A) {
+ %tmp4 = tail call i32 (i32, ...)* @foo( i32 %A, i32 %A, i32 %A, i32 %A, i64 47, double 1.000000e+00 ) ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define internal i32 @foo(i32 %X, ...) {
+ ret i32 %X
+}
+
diff --git a/test/Transforms/DeadArgElim/deadretval.ll b/test/Transforms/DeadArgElim/deadretval.ll
new file mode 100644
index 0000000..5f3817c
--- /dev/null
+++ b/test/Transforms/DeadArgElim/deadretval.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -deadargelim -S | not grep DEAD
+
+; Dead arg only used by dead retval
+define internal i32 @test(i32 %DEADARG) {
+ ret i32 %DEADARG
+}
+
+define i32 @test2(i32 %A) {
+ %DEAD = call i32 @test( i32 %A ) ; <i32> [#uses=0]
+ ret i32 123
+}
+
+define i32 @test3() {
+ %X = call i32 @test2( i32 3232 ) ; <i32> [#uses=1]
+ %Y = add i32 %X, -123 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/DeadArgElim/deadretval2.ll b/test/Transforms/DeadArgElim/deadretval2.ll
new file mode 100644
index 0000000..dcdc36e
--- /dev/null
+++ b/test/Transforms/DeadArgElim/deadretval2.ll
@@ -0,0 +1,59 @@
+; RUN: opt < %s -deadargelim -die -S > %t
+; RUN: cat %t | not grep DEAD
+; RUN: cat %t | grep LIVE | count 4
+
+@P = external global i32 ; <i32*> [#uses=1]
+
+; Dead arg only used by dead retval
+define internal i32 @test(i32 %DEADARG) {
+ ret i32 %DEADARG
+}
+
+define internal i32 @test2(i32 %DEADARG) {
+ %DEADRETVAL = call i32 @test( i32 %DEADARG ) ; <i32> [#uses=1]
+ ret i32 %DEADRETVAL
+}
+
+define void @test3(i32 %X) {
+ %DEADRETVAL = call i32 @test2( i32 %X ) ; <i32> [#uses=0]
+ ret void
+}
+
+define internal i32 @foo() {
+ %DEAD = load i32* @P ; <i32> [#uses=1]
+ ret i32 %DEAD
+}
+
+define internal i32 @id(i32 %X) {
+ ret i32 %X
+}
+
+define void @test4() {
+ %DEAD = call i32 @foo( ) ; <i32> [#uses=1]
+ %DEAD2 = call i32 @id( i32 %DEAD ) ; <i32> [#uses=0]
+ ret void
+}
+
+; These test if returning another functions return value properly marks that
+; other function's return value as live. We do this twice, with the functions in
+; different orders (ie, first the caller, than the callee and first the callee
+; and then the caller) since DAE processes functions one by one and handles
+; these cases slightly different.
+
+define internal i32 @test5() {
+ ret i32 123
+}
+
+define i32 @test6() {
+ %LIVE = call i32 @test5()
+ ret i32 %LIVE
+}
+
+define i32 @test7() {
+ %LIVE = call i32 @test8()
+ ret i32 %LIVE
+}
+
+define internal i32 @test8() {
+ ret i32 124
+}
diff --git a/test/Transforms/DeadArgElim/dg.exp b/test/Transforms/DeadArgElim/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/DeadArgElim/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/DeadArgElim/keepalive.ll b/test/Transforms/DeadArgElim/keepalive.ll
new file mode 100644
index 0000000..b0b9bf3
--- /dev/null
+++ b/test/Transforms/DeadArgElim/keepalive.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -deadargelim -S > %t
+; RUN: grep {define internal zeroext i32 @test1() nounwind} %t
+; RUN: grep {define internal %Ty @test2} %t
+
+%Ty = type <{ i32, i32 }>
+
+; Check if the pass doesn't modify anything that doesn't need changing. We feed
+; an unused argument to each function to lure it into changing _something_ about
+; the function and then changing too much.
+
+; This checks if the return value attributes are not removed
+define internal zeroext i32 @test1(i32 %DEADARG1) nounwind {
+ ret i32 1
+}
+
+; This checks if the struct doesn't get non-packed
+define internal <{ i32, i32 }> @test2(i32 %DEADARG1) {
+ ret <{ i32, i32 }> <{ i32 1, i32 2 }>
+}
+
+; We use this external function to make sure the return values don't become dead
+declare void @user(i32, <{ i32, i32 }>)
+
+define void @caller() {
+ %B = call i32 @test1(i32 1)
+ %C = call <{ i32, i32 }> @test2(i32 2)
+ call void @user(i32 %B, <{ i32, i32 }> %C)
+ ret void
+}
+
diff --git a/test/Transforms/DeadArgElim/multdeadretval.ll b/test/Transforms/DeadArgElim/multdeadretval.ll
new file mode 100644
index 0000000..68d96ee
--- /dev/null
+++ b/test/Transforms/DeadArgElim/multdeadretval.ll
@@ -0,0 +1,68 @@
+; This test sees if return values (and arguments) are properly removed when they
+; are unused. All unused values are typed i16, so we can easily check. We also
+; run instcombine to fold insert/extractvalue chains and we run dce to clean up
+; any remaining dead stuff.
+; RUN: opt < %s -deadargelim -instcombine -dce -S | not grep i16
+
+define internal {i16, i32} @test(i16 %DEADARG) {
+ %A = insertvalue {i16,i32} undef, i16 1, 0
+ %B = insertvalue {i16,i32} %A, i32 1001, 1
+ ret {i16,i32} %B
+}
+
+define internal {i32, i16} @test2() {
+ %DEAD = call i16 @test4()
+ %A = insertvalue {i32,i16} undef, i32 1, 0
+ %B = insertvalue {i32,i16} %A, i16 %DEAD, 1
+ ret {i32,i16} %B
+}
+
+; Dead argument, used to check if the second result of test2 is dead even when
+; it's used as a dead argument
+define internal i32 @test3(i16 %A) {
+ %ret = call {i16, i32} @test( i16 %A ) ; <i32> [#uses=0]
+ %DEAD = extractvalue {i16, i32} %ret, 0
+ %LIVE = extractvalue {i16, i32} %ret, 1
+ ret i32 %LIVE
+}
+
+define internal i16 @test4() {
+ ret i16 0
+}
+
+; Multiple return values, multiple live return values
+define internal {i32, i32, i16} @test5() {
+ %A = insertvalue {i32,i32,i16} undef, i32 1, 0
+ %B = insertvalue {i32,i32,i16} %A, i32 2, 1
+ %C = insertvalue {i32,i32,i16} %B, i16 3, 2
+ ret {i32, i32, i16} %C
+}
+
+; Nested return values
+define internal {{i32}, {i16, i16}} @test6() {
+ %A = insertvalue {{i32}, {i16, i16}} undef, i32 1, 0, 0
+ %B = insertvalue {{i32}, {i16, i16}} %A, i16 2, 1, 0
+ %C = insertvalue {{i32}, {i16, i16}} %B, i16 3, 1, 1
+ ret {{i32}, {i16, i16}} %C
+}
+
+define i32 @main() {
+ %ret = call {i32, i16} @test2() ; <i32> [#uses=1]
+ %LIVE = extractvalue {i32, i16} %ret, 0
+ %DEAD = extractvalue {i32, i16} %ret, 1
+ %Y = add i32 %LIVE, -123 ; <i32> [#uses=1]
+ %LIVE2 = call i32 @test3(i16 %DEAD) ; <i32> [#uses=1]
+ %Z = add i32 %LIVE2, %Y ; <i32> [#uses=1]
+ %ret1 = call { i32, i32, i16 } @test5 ()
+ %LIVE3 = extractvalue { i32, i32, i16} %ret1, 0
+ %LIVE4 = extractvalue { i32, i32, i16} %ret1, 1
+ %DEAD2 = extractvalue { i32, i32, i16} %ret1, 2
+ %V = add i32 %LIVE3, %LIVE4
+ %W = add i32 %Z, %V
+ %ret2 = call { { i32 }, { i16, i16 } } @test6 ()
+ %LIVE5 = extractvalue { { i32 }, { i16, i16 } } %ret2, 0, 0
+ %DEAD3 = extractvalue { { i32 }, { i16, i16 } } %ret2, 1, 0
+ %DEAD4 = extractvalue { { i32 }, { i16, i16 } } %ret2, 1, 1
+ %Q = add i32 %W, %LIVE5
+ ret i32 %Q
+}
diff --git a/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll b/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll
new file mode 100644
index 0000000..d1a9dd8
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -dse -scalarrepl -instcombine | \
+; RUN: llvm-dis | not grep {ret i32 undef}
+
+define i32 @test(double %__x) {
+ %__u = alloca { [3 x i32] } ; <{ [3 x i32] }*> [#uses=2]
+ %tmp.1 = bitcast { [3 x i32] }* %__u to double* ; <double*> [#uses=1]
+ store double %__x, double* %tmp.1
+ %tmp.4 = getelementptr { [3 x i32] }* %__u, i32 0, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp.5 = load i32* %tmp.4 ; <i32> [#uses=1]
+ %tmp.6 = icmp slt i32 %tmp.5, 0 ; <i1> [#uses=1]
+ %tmp.7 = zext i1 %tmp.6 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.7
+}
+
diff --git a/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll b/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll
new file mode 100644
index 0000000..cae2a6f
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -dse -S | \
+; RUN: grep {store i32 1234567}
+
+; Do not delete stores that are only partially killed.
+
+define i32 @test() {
+ %V = alloca i32 ; <i32*> [#uses=3]
+ store i32 1234567, i32* %V
+ %V2 = bitcast i32* %V to i8* ; <i8*> [#uses=1]
+ store i8 0, i8* %V2
+ %X = load i32* %V ; <i32> [#uses=1]
+ ret i32 %X
+}
diff --git a/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll b/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll
new file mode 100644
index 0000000..147ec84
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -dse -S | grep store
+
+define double @foo(i8* %X) {
+ %X_addr = alloca i8* ; <i8**> [#uses=2]
+ store i8* %X, i8** %X_addr
+ %tmp.0 = va_arg i8** %X_addr, double ; <double> [#uses=1]
+ ret double %tmp.0
+}
+
diff --git a/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll b/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll
new file mode 100644
index 0000000..0b08306
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll
@@ -0,0 +1,1113 @@
+; RUN: opt < %s -globalsmodref-aa -dse -disable-output
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8"
+ %struct.ECacheType = type { i32, i32, i32 }
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.QTType = type { i8, i8, i16, i32, i32, i32 }
+ %struct.TType = type { i8, i8, i8, i8, i16, i32, i32, i32 }
+ %struct._RuneEntry = type { i32, i32, i32, i32* }
+ %struct._RuneLocale = type { [8 x i8], [32 x i8], i32 (i8*, i32, i8**)*, i32 (i32, i8*, i32, i8**)*, i32, [256 x i32], [256 x i32], [256 x i32], %struct._RuneRange, %struct._RuneRange, %struct._RuneRange, i8*, i32 }
+ %struct._RuneRange = type { i32, %struct._RuneEntry* }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.move_s = type { i32, i32, i32, i32, i32, i32 }
+ %struct.move_x = type { i32, i32, i32, i32 }
+ %struct.node_t = type { i8, i8, i8, i8, i32, i32, %struct.node_t**, %struct.node_t*, %struct.move_s }
+ %struct.see_data = type { i32, i32 }
+@rook_o.2925 = internal global [4 x i32] [ i32 12, i32 -12, i32 1, i32 -1 ] ; <[4 x i32]*> [#uses=0]
+@bishop_o.2926 = internal global [4 x i32] [ i32 11, i32 -11, i32 13, i32 -13 ] ; <[4 x i32]*> [#uses=0]
+@knight_o.2927 = internal global [8 x i32] [ i32 10, i32 -10, i32 14, i32 -14, i32 23, i32 -23, i32 25, i32 -25 ] ; <[8 x i32]*> [#uses=0]
+@board = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0]
+@holding = internal global [2 x [16 x i32]] zeroinitializer ; <[2 x [16 x i32]]*> [#uses=0]
+@hold_hash = internal global i32 0 ; <i32*> [#uses=0]
+@white_hand_eval = internal global i32 0 ; <i32*> [#uses=0]
+@black_hand_eval = internal global i32 0 ; <i32*> [#uses=0]
+@num_holding = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0]
+@zobrist = internal global [14 x [144 x i32]] zeroinitializer ; <[14 x [144 x i32]]*> [#uses=0]
+@Variant = internal global i32 0 ; <i32*> [#uses=7]
[email protected] = internal global i1 false ; <i1*> [#uses=1]
+@realholdings = internal global [255 x i8] zeroinitializer ; <[255 x i8]*> [#uses=0]
+@comp_color = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [13 x i32] [ i32 0, i32 2, i32 1, i32 4, i32 3, i32 0, i32 0, i32 8, i32 7, i32 10, i32 9, i32 12, i32 11 ] ; <[13 x i32]*> [#uses=0]
+@str = internal global [30 x i8] c"%s:%u: failed assertion `%s'\0A\00" ; <[30 x i8]*> [#uses=0]
[email protected] = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/crazy.c\00" ; <[81 x i8]*> [#uses=0]
[email protected] = internal global [32 x i8] c"piece > frame && piece < npiece\00" ; <[32 x i8]*> [#uses=0]
[email protected] = internal global [13 x i32] [ i32 0, i32 2, i32 1, i32 2, i32 1, i32 0, i32 0, i32 2, i32 1, i32 2, i32 1, i32 2, i32 1 ] ; <[13 x i32]*> [#uses=0]
+@hand_value = internal global [13 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 0, i32 0, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230 ] ; <[13 x i32]*> [#uses=0]
+@material = internal global [14 x i32] zeroinitializer ; <[14 x i32]*> [#uses=0]
+@Material = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [23 x i8] c"holding[who][what] > 0\00" ; <[23 x i8]*> [#uses=0]
[email protected] = internal global [24 x i8] c"holding[who][what] < 20\00" ; <[24 x i8]*> [#uses=0]
+@fifty = internal global i32 0 ; <i32*> [#uses=0]
+@move_number = internal global i32 0 ; <i32*> [#uses=1]
+@ply = internal global i32 0 ; <i32*> [#uses=2]
+@hash_history = internal global [600 x i32] zeroinitializer ; <[600 x i32]*> [#uses=1]
+@hash = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global i1 false ; <i1*> [#uses=1]
+@ECache = internal global %struct.ECacheType* null ; <%struct.ECacheType**> [#uses=1]
+@ECacheProbes = internal global i32 0 ; <i32*> [#uses=1]
+@ECacheHits = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global [34 x i8] c"Out of memory allocating ECache.\0A\00" ; <[34 x i8]*> [#uses=0]
[email protected] = internal global [8 x i32] [ i32 110, i32 98, i32 86, i32 74, i32 62, i32 50, i32 38, i32 26 ] ; <[8 x i32]*> [#uses=0]
+@white_castled = internal global i32 0 ; <i32*> [#uses=0]
+@black_castled = internal global i32 0 ; <i32*> [#uses=0]
+@book_ply = internal global i32 0 ; <i32*> [#uses=0]
+@bking_loc = internal global i32 0 ; <i32*> [#uses=1]
+@wking_loc = internal global i32 0 ; <i32*> [#uses=1]
+@white_to_move = internal global i32 0 ; <i32*> [#uses=3]
+@moved = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0]
+@ep_square = internal global i32 0 ; <i32*> [#uses=0]
+@_DefaultRuneLocale = external global %struct._RuneLocale ; <%struct._RuneLocale*> [#uses=0]
[email protected] = internal global [3 x i8] c"bm\00" ; <[3 x i8]*> [#uses=0]
+@str1 = internal global [3 x i8] c"am\00" ; <[3 x i8]*> [#uses=0]
[email protected] = internal global [34 x i8] c"No best-move or avoid-move found!\00" ; <[34 x i8]*> [#uses=0]
[email protected] = internal global [25 x i8] c"\0AName of EPD testsuite: \00" ; <[25 x i8]*> [#uses=0]
+@__sF = external global [0 x %struct.FILE] ; <[0 x %struct.FILE]*> [#uses=0]
[email protected] = internal global [21 x i8] c"\0ATime per move (s): \00" ; <[21 x i8]*> [#uses=0]
[email protected] = internal global [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=0]
+@str2 = internal global [2 x i8] c"r\00" ; <[2 x i8]*> [#uses=0]
+@root_to_move = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global i1 false ; <i1*> [#uses=2]
+@fixed_time = internal global i32 0 ; <i32*> [#uses=1]
+@nodes = internal global i32 0 ; <i32*> [#uses=1]
+@qnodes = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global [29 x i8] c"\0ANodes: %i (%0.2f%% qnodes)\0A\00" ; <[29 x i8]*> [#uses=0]
[email protected] = internal global [54 x i8] c"ECacheProbes : %u ECacheHits : %u HitRate : %f%%\0A\00" ; <[54 x i8]*> [#uses=0]
+@TTStores = internal global i32 0 ; <i32*> [#uses=1]
+@TTProbes = internal global i32 0 ; <i32*> [#uses=1]
+@TTHits = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global [60 x i8] c"TTStores : %u TTProbes : %u TTHits : %u HitRate : %f%%\0A\00" ; <[60 x i8]*> [#uses=0]
+@NTries = internal global i32 0 ; <i32*> [#uses=1]
+@NCuts = internal global i32 0 ; <i32*> [#uses=1]
+@TExt = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global [51 x i8] c"NTries : %u NCuts : %u CutRate : %f%% TExt: %u\0A\00" ; <[51 x i8]*> [#uses=0]
+@ext_check = internal global i32 0 ; <i32*> [#uses=1]
+@razor_drop = internal global i32 0 ; <i32*> [#uses=1]
+@razor_material = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global [61 x i8] c"Check extensions: %u Razor drops : %u Razor Material : %u\0A\00" ; <[61 x i8]*> [#uses=0]
+@FHF = internal global i32 0 ; <i32*> [#uses=1]
+@FH = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global [22 x i8] c"Move ordering : %f%%\0A\00" ; <[22 x i8]*> [#uses=0]
+@maxposdiff = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global [47 x i8] c"Material score: %d Eval : %d MaxPosDiff: %d\0A\00" ; <[47 x i8]*> [#uses=0]
[email protected] = internal global [17 x i8] c"Solution found.\0A\00" ; <[17 x i8]*> [#uses=0]
+@str3 = internal global [21 x i8] c"Solution not found.\0A\00" ; <[21 x i8]*> [#uses=0]
[email protected] = internal global [15 x i8] c"Solved: %d/%d\0A\00" ; <[15 x i8]*> [#uses=0]
[email protected] = internal global [9 x i8] c"EPD: %s\0A\00" ; <[9 x i8]*> [#uses=0]
+@str4 = internal global [21 x i8] c"Searching to %d ply\0A\00" ; <[21 x i8]*> [#uses=0]
+@maxdepth = internal global i32 0 ; <i32*> [#uses=0]
+@std_material = internal global [14 x i32] [ i32 0, i32 100, i32 -100, i32 310, i32 -310, i32 4000, i32 -4000, i32 500, i32 -500, i32 900, i32 -900, i32 325, i32 -325, i32 0 ] ; <[14 x i32]*> [#uses=0]
+@zh_material = internal global [14 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 4000, i32 -4000, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230, i32 0 ] ; <[14 x i32]*> [#uses=0]
+@suicide_material = internal global [14 x i32] [ i32 0, i32 15, i32 -15, i32 150, i32 -150, i32 500, i32 -500, i32 150, i32 -150, i32 50, i32 -50, i32 0, i32 0, i32 0 ] ; <[14 x i32]*> [#uses=0]
+@losers_material = internal global [14 x i32] [ i32 0, i32 80, i32 -80, i32 320, i32 -320, i32 1000, i32 -1000, i32 350, i32 -350, i32 400, i32 -400, i32 270, i32 -270, i32 0 ] ; <[14 x i32]*> [#uses=0]
+@Xfile = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@Xrank = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 0, i32 0, i32 0, i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@Xdiagl = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 0, i32 0, i32 0, i32 0, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 0, i32 0, i32 0, i32 0, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 0, i32 0, i32 0, i32 0, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@Xdiagr = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 0, i32 0, i32 0, i32 0, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 0, i32 0, i32 0, i32 0, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 0, i32 0, i32 0, i32 0, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 0, i32 0, i32 0, i32 0, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@sqcolor = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@pcsqbishop = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 10, i32 5, i32 10, i32 10, i32 5, i32 10, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 5, i32 6, i32 15, i32 15, i32 6, i32 5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 3, i32 15, i32 10, i32 10, i32 15, i32 3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 3, i32 15, i32 10, i32 10, i32 15, i32 3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 5, i32 6, i32 15, i32 15, i32 6, i32 5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 10, i32 5, i32 10, i32 10, i32 5, i32 10, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@black_knight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 25, i32 25, i32 25, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 35, i32 35, i32 35, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 10, i32 25, i32 20, i32 25, i32 25, i32 10, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 20, i32 20, i32 20, i32 20, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -35, i32 -10, i32 -10, i32 -10, i32 -10, i32 -35, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@white_knight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -35, i32 -10, i32 -10, i32 -10, i32 -10, i32 -35, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 20, i32 20, i32 20, i32 20, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 10, i32 25, i32 20, i32 25, i32 25, i32 10, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 35, i32 35, i32 35, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 25, i32 25, i32 25, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@white_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 25, i32 35, i32 5, i32 5, i32 50, i32 45, i32 30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 14, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 20, i32 20, i32 10, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 12, i32 18, i32 18, i32 27, i32 27, i32 18, i32 18, i32 18, i32 0, i32 0, i32 0, i32 0, i32 25, i32 30, i32 30, i32 35, i32 35, i32 35, i32 30, i32 25, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@black_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 30, i32 30, i32 30, i32 35, i32 35, i32 35, i32 30, i32 25, i32 0, i32 0, i32 0, i32 0, i32 12, i32 18, i32 18, i32 27, i32 27, i32 18, i32 18, i32 18, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 20, i32 20, i32 10, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 14, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 25, i32 35, i32 5, i32 5, i32 50, i32 45, i32 30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@white_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -100, i32 7, i32 4, i32 0, i32 10, i32 4, i32 7, i32 -100, i32 0, i32 0, i32 0, i32 0, i32 -250, i32 -200, i32 -150, i32 -100, i32 -100, i32 -150, i32 -200, i32 -250, i32 0, i32 0, i32 0, i32 0, i32 -350, i32 -300, i32 -300, i32 -250, i32 -250, i32 -300, i32 -300, i32 -350, i32 0, i32 0, i32 0, i32 0, i32 -400, i32 -400, i32 -400, i32 -350, i32 -350, i32 -400, i32 -400, i32 -400, i32 0, i32 0, i32 0, i32 0, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@black_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 0, i32 0, i32 0, i32 0, i32 -400, i32 -400, i32 -400, i32 -350, i32 -350, i32 -400, i32 -400, i32 -400, i32 0, i32 0, i32 0, i32 0, i32 -350, i32 -300, i32 -300, i32 -250, i32 -250, i32 -300, i32 -300, i32 -350, i32 0, i32 0, i32 0, i32 0, i32 -250, i32 -200, i32 -150, i32 -100, i32 -100, i32 -150, i32 -200, i32 -250, i32 0, i32 0, i32 0, i32 0, i32 -100, i32 7, i32 4, i32 0, i32 10, i32 4, i32 7, i32 -100, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@black_queen = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 10, i32 10, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 0, i32 0, i32 0, i32 0, i32 -60, i32 -40, i32 -40, i32 -60, i32 -60, i32 -40, i32 -40, i32 -60, i32 0, i32 0, i32 0, i32 0, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@white_queen = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 0, i32 0, i32 0, i32 0, i32 -60, i32 -40, i32 -40, i32 -60, i32 -60, i32 -40, i32 -40, i32 -60, i32 0, i32 0, i32 0, i32 0, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 10, i32 10, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@black_rook = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 25, i32 25, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -30, i32 -30, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@white_rook = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -30, i32 -30, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 25, i32 25, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@upscale = internal global [64 x i32] [ i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117 ] ; <[64 x i32]*> [#uses=0]
+@pre_p_tropism = internal global [9 x i32] [ i32 9999, i32 40, i32 20, i32 10, i32 3, i32 1, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0]
+@pre_r_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 40, i32 15, i32 5, i32 1, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0]
+@pre_n_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 70, i32 35, i32 10, i32 2, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0]
+@pre_q_tropism = internal global [9 x i32] [ i32 9999, i32 100, i32 60, i32 20, i32 5, i32 2, i32 0, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0]
+@pre_b_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 25, i32 15, i32 5, i32 2, i32 2, i32 2, i32 9999 ] ; <[9 x i32]*> [#uses=0]
+@rookdistance = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0]
+@distance = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0]
+@p_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0]
+@b_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0]
+@n_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0]
+@r_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0]
+@q_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0]
+@cfg_devscale.b = internal global i1 false ; <i1*> [#uses=0]
+@pieces = internal global [62 x i32] zeroinitializer ; <[62 x i32]*> [#uses=0]
+@piece_count = internal global i32 0 ; <i32*> [#uses=1]
+@cfg_smarteval.b = internal global i1 false ; <i1*> [#uses=0]
+@lcentral = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 30, i32 30, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 30, i32 30, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
[email protected] = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/leval.c\00" ; <[81 x i8]*> [#uses=0]
+@str5 = internal global [21 x i8] c"(i > 0) && (i < 145)\00" ; <[21 x i8]*> [#uses=0]
[email protected] = internal global i1 false ; <i1*> [#uses=0]
+@numb_moves = internal global i32 0 ; <i32*> [#uses=2]
+@genfor = internal global %struct.move_s* null ; <%struct.move_s**> [#uses=0]
+@captures = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global i1 false ; <i1*> [#uses=0]
+@gfrom = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global i1 false ; <i1*> [#uses=0]
+@path_x = internal global [300 x %struct.move_x] zeroinitializer ; <[300 x %struct.move_x]*> [#uses=0]
+@str7 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/moves.c\00" ; <[81 x i8]*> [#uses=0]
+@str8 = internal global [15 x i8] c"find_slot < 63\00" ; <[15 x i8]*> [#uses=0]
+@is_promoted = internal global [62 x i32] zeroinitializer ; <[62 x i32]*> [#uses=0]
+@squares = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0]
[email protected] = internal global [38 x i8] c"promoted > frame && promoted < npiece\00" ; <[38 x i8]*> [#uses=0]
[email protected] = internal global [38 x i8] c"promoted < npiece && promoted > frame\00" ; <[38 x i8]*> [#uses=0]
+@evalRoutines = internal global [7 x i32 (i32, i32)*] [ i32 (i32, i32)* @ErrorIt, i32 (i32, i32)* @Pawn, i32 (i32, i32)* @Knight, i32 (i32, i32)* @King, i32 (i32, i32)* @Rook, i32 (i32, i32)* @Queen, i32 (i32, i32)* @Bishop ] ; <[7 x i32 (i32, i32)*]*> [#uses=0]
+@sbishop = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 8, i32 5, i32 5, i32 5, i32 5, i32 8, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 3, i32 3, i32 5, i32 5, i32 3, i32 3, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 2, i32 5, i32 4, i32 4, i32 5, i32 2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 2, i32 5, i32 4, i32 4, i32 5, i32 2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 3, i32 3, i32 5, i32 5, i32 3, i32 3, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 8, i32 5, i32 5, i32 5, i32 5, i32 8, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@sknight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 5, i32 5, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 10, i32 10, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 10, i32 10, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 5, i32 5, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@swhite_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 10, i32 10, i32 3, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 2, i32 4, i32 6, i32 12, i32 12, i32 6, i32 4, i32 2, i32 0, i32 0, i32 0, i32 0, i32 3, i32 6, i32 9, i32 14, i32 14, i32 9, i32 6, i32 3, i32 0, i32 0, i32 0, i32 0, i32 10, i32 12, i32 14, i32 16, i32 16, i32 14, i32 12, i32 10, i32 0, i32 0, i32 0, i32 0, i32 20, i32 22, i32 24, i32 26, i32 26, i32 24, i32 22, i32 20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@sblack_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 22, i32 24, i32 26, i32 26, i32 24, i32 22, i32 20, i32 0, i32 0, i32 0, i32 0, i32 10, i32 12, i32 14, i32 16, i32 16, i32 14, i32 12, i32 10, i32 0, i32 0, i32 0, i32 0, i32 3, i32 6, i32 9, i32 14, i32 14, i32 9, i32 6, i32 3, i32 0, i32 0, i32 0, i32 0, i32 2, i32 4, i32 6, i32 12, i32 12, i32 6, i32 4, i32 2, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 10, i32 10, i32 3, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@swhite_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 14, i32 0, i32 0, i32 0, i32 9, i32 14, i32 2, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 -5, i32 -6, i32 -6, i32 -6, i32 -6, i32 -5, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -8, i32 -8, i32 -8, i32 -8, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -8, i32 -8, i32 -13, i32 -13, i32 -13, i32 -13, i32 -8, i32 -8, i32 0, i32 0, i32 0, i32 0, i32 -13, i32 -13, i32 -21, i32 -21, i32 -21, i32 -21, i32 -13, i32 -13, i32 0, i32 0, i32 0, i32 0, i32 -21, i32 -21, i32 -34, i32 -34, i32 -34, i32 -34, i32 -21, i32 -21, i32 0, i32 0, i32 0, i32 0, i32 -34, i32 -34, i32 -55, i32 -55, i32 -55, i32 -55, i32 -34, i32 -34, i32 0, i32 0, i32 0, i32 0, i32 -55, i32 -55, i32 -89, i32 -89, i32 -89, i32 -89, i32 -55, i32 -55, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@sblack_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -55, i32 -55, i32 -89, i32 -89, i32 -89, i32 -89, i32 -55, i32 -55, i32 0, i32 0, i32 0, i32 0, i32 -34, i32 -34, i32 -55, i32 -55, i32 -55, i32 -55, i32 -34, i32 -34, i32 0, i32 0, i32 0, i32 0, i32 -21, i32 -21, i32 -34, i32 -34, i32 -34, i32 -34, i32 -21, i32 -21, i32 0, i32 0, i32 0, i32 0, i32 -13, i32 -13, i32 -21, i32 -21, i32 -21, i32 -21, i32 -13, i32 -13, i32 0, i32 0, i32 0, i32 0, i32 -8, i32 -8, i32 -13, i32 -13, i32 -13, i32 -13, i32 -8, i32 -8, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -8, i32 -8, i32 -8, i32 -8, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 -5, i32 -6, i32 -6, i32 -6, i32 -6, i32 -5, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 2, i32 14, i32 0, i32 0, i32 0, i32 9, i32 14, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@send_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -3, i32 -1, i32 0, i32 0, i32 -1, i32 -3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -1, i32 10, i32 25, i32 25, i32 25, i32 25, i32 10, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 25, i32 50, i32 50, i32 25, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 25, i32 50, i32 50, i32 25, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -1, i32 10, i32 25, i32 25, i32 25, i32 25, i32 10, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -3, i32 -1, i32 0, i32 0, i32 -1, i32 -3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@srev_rank = internal global [9 x i32] [ i32 0, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1 ] ; <[9 x i32]*> [#uses=0]
+@std_p_tropism = internal global [8 x i32] [ i32 9999, i32 15, i32 10, i32 7, i32 2, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0]
+@std_own_p_tropism = internal global [8 x i32] [ i32 9999, i32 30, i32 10, i32 2, i32 0, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0]
+@std_r_tropism = internal global [16 x i32] [ i32 9999, i32 0, i32 15, i32 5, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[16 x i32]*> [#uses=0]
+@std_n_tropism = internal global [8 x i32] [ i32 9999, i32 14, i32 9, i32 6, i32 1, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0]
+@std_q_tropism = internal global [8 x i32] [ i32 9999, i32 200, i32 50, i32 15, i32 3, i32 2, i32 1, i32 0 ] ; <[8 x i32]*> [#uses=0]
+@std_b_tropism = internal global [8 x i32] [ i32 9999, i32 12, i32 7, i32 5, i32 0, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0]
+@phase = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global [4 x i32] [ i32 -13, i32 -11, i32 11, i32 13 ] ; <[4 x i32]*> [#uses=0]
[email protected] = internal global [4 x i32] [ i32 -1, i32 1, i32 12, i32 -12 ] ; <[4 x i32]*> [#uses=0]
+@king_locs = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0]
+@square_d1.3081 = internal global [2 x i32] [ i32 29, i32 113 ] ; <[2 x i32]*> [#uses=0]
+@wmat = internal global i32 0 ; <i32*> [#uses=0]
+@bmat = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [35 x i8] c"Illegal piece detected sq=%i c=%i\0A\00" ; <[35 x i8]*> [#uses=0]
+@str10 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/neval.c\00" ; <[81 x i8]*> [#uses=0]
+@std_hand_value = internal global [13 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 0, i32 0, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230 ] ; <[13 x i32]*> [#uses=0]
+@xb_mode = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [69 x i8] c"tellics ptell Hello! I am Sjeng and hope you enjoy playing with me.\0A\00" ; <[69 x i8]*> [#uses=0]
[email protected] = internal global [76 x i8] c"tellics ptell For help on some commands that I understand, ptell me 'help'\0A\00" ; <[76 x i8]*> [#uses=0]
+@str12 = internal global [3 x i8] c"%s\00" ; <[3 x i8]*> [#uses=0]
+@my_partner = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0]
+@str13 = internal global [25 x i8] c"tellics set f5 bughouse\0A\00" ; <[25 x i8]*> [#uses=0]
[email protected] = internal global [16 x i8] c"tellics unseek\0A\00" ; <[16 x i8]*> [#uses=0]
[email protected] = internal global [20 x i8] c"tellics set f5 1=1\0A\00" ; <[20 x i8]*> [#uses=0]
[email protected] = internal global [80 x i8] c"is...uh...what did you say?\0A\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" ; <[80 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"help\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [147 x i8] c"tellics ptell Commands that I understand are : sit, go, fast, slow, abort, flag, +/++/+++/-/--/---{p,n,b,r,q,d,h,trades}, x, dead, formula, help.\0A\00" ; <[147 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"sorry\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [59 x i8] c"tellics ptell Sorry, but I'm not playing a bughouse game.\0A\00" ; <[59 x i8]*> [#uses=0]
[email protected] = internal global [4 x i8] c"sit\00" ; <[4 x i8]*> [#uses=0]
[email protected] = internal global [56 x i8] c"tellics ptell Ok, I sit next move. Tell me when to go.\0A\00" ; <[56 x i8]*> [#uses=0]
+@must_sit.b = internal global i1 false ; <i1*> [#uses=0]
+@str114 = internal global [3 x i8] c"go\00" ; <[3 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"move\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [31 x i8] c"tellics ptell Ok, I'm moving.\0A\00" ; <[31 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"fast\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"time\00" ; <[5 x i8]*> [#uses=0]
+@str15 = internal global [35 x i8] c"tellics ptell Ok, I'm going FAST!\0A\00" ; <[35 x i8]*> [#uses=0]
+@go_fast.b = internal global i1 false ; <i1*> [#uses=0]
[email protected] = internal global [5 x i8] c"slow\00" ; <[5 x i8]*> [#uses=0]
+@str16 = internal global [36 x i8] c"tellics ptell Ok, moving normally.\0A\00" ; <[36 x i8]*> [#uses=0]
+@str6 = internal global [6 x i8] c"abort\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [35 x i8] c"tellics ptell Requesting abort...\0A\00" ; <[35 x i8]*> [#uses=0]
+@str17 = internal global [15 x i8] c"tellics abort\0A\00" ; <[15 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"flag\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [27 x i8] c"tellics ptell Flagging...\0A\00" ; <[27 x i8]*> [#uses=0]
[email protected] = internal global [14 x i8] c"tellics flag\0A\00" ; <[14 x i8]*> [#uses=0]
+@str18 = internal global [2 x i8] c"+\00" ; <[2 x i8]*> [#uses=0]
+@str9 = internal global [6 x i8] c"trade\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [35 x i8] c"tellics ptell Ok, trading is GOOD\0A\00" ; <[35 x i8]*> [#uses=0]
+@str11 = internal global [4 x i8] c"+++\00" ; <[4 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"mates\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [3 x i8] c"++\00" ; <[3 x i8]*> [#uses=0]
[email protected] = internal global [49 x i8] c"is VERY good (ptell me 'x' to play normal again)\00" ; <[49 x i8]*> [#uses=0]
[email protected] = internal global [44 x i8] c"is good (ptell me 'x' to play normal again)\00" ; <[44 x i8]*> [#uses=0]
+@str19 = internal global [29 x i8] c"tellics ptell Ok, Knight %s\0A\00" ; <[29 x i8]*> [#uses=0]
+@str14 = internal global [29 x i8] c"tellics ptell Ok, Bishop %s\0A\00" ; <[29 x i8]*> [#uses=0]
[email protected] = internal global [27 x i8] c"tellics ptell Ok, Rook %s\0A\00" ; <[27 x i8]*> [#uses=0]
[email protected] = internal global [28 x i8] c"tellics ptell Ok, Queen %s\0A\00" ; <[28 x i8]*> [#uses=0]
[email protected] = internal global [27 x i8] c"tellics ptell Ok, Pawn %s\0A\00" ; <[27 x i8]*> [#uses=0]
[email protected] = internal global [31 x i8] c"tellics ptell Ok, Diagonal %s\0A\00" ; <[31 x i8]*> [#uses=0]
[email protected] = internal global [28 x i8] c"tellics ptell Ok, Heavy %s\0A\00" ; <[28 x i8]*> [#uses=0]
+@str20 = internal global [34 x i8] c"tellics ptell Ok, trading is BAD\0A\00" ; <[34 x i8]*> [#uses=0]
[email protected] = internal global [4 x i8] c"---\00" ; <[4 x i8]*> [#uses=0]
[email protected] = internal global [53 x i8] c"mates you (ptell me 'x' when it no longer mates you)\00" ; <[53 x i8]*> [#uses=0]
+@str21 = internal global [3 x i8] c"--\00" ; <[3 x i8]*> [#uses=0]
[email protected] = internal global [52 x i8] c"is VERY bad (ptell me 'x' when it is no longer bad)\00" ; <[52 x i8]*> [#uses=0]
[email protected] = internal global [47 x i8] c"is bad (ptell me 'x' when it is no longer bad)\00" ; <[47 x i8]*> [#uses=0]
+@str23 = internal global [16 x i8] c"mate me anymore\00" ; <[16 x i8]*> [#uses=0]
+@str24 = internal global [6 x i8] c"never\00" ; <[6 x i8]*> [#uses=0]
+@str25 = internal global [5 x i8] c"mind\00" ; <[5 x i8]*> [#uses=0]
+@str22 = internal global [9 x i8] c"ptell me\00" ; <[9 x i8]*> [#uses=0]
[email protected] = internal global [55 x i8] c"tellics ptell Ok, reverting to STANDARD piece values!\0A\00" ; <[55 x i8]*> [#uses=0]
[email protected] = internal global i1 false ; <i1*> [#uses=0]
[email protected] = internal global i1 false ; <i1*> [#uses=0]
[email protected] = internal global [26 x i8] c"i'll have to sit...(dead)\00" ; <[26 x i8]*> [#uses=0]
+@str27 = internal global [5 x i8] c"dead\00" ; <[5 x i8]*> [#uses=0]
+@str28 = internal global [27 x i8] c"i'll have to sit...(piece)\00" ; <[27 x i8]*> [#uses=0]
+@str29 = internal global [3 x i8] c"ok\00" ; <[3 x i8]*> [#uses=0]
+@str30 = internal global [3 x i8] c"hi\00" ; <[3 x i8]*> [#uses=0]
+@str31 = internal global [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=0]
+@str32 = internal global [26 x i8] c"tellics ptell Greetings.\0A\00" ; <[26 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"formula\00" ; <[8 x i8]*> [#uses=0]
[email protected] = internal global [87 x i8] c"tellics ptell Setting formula, if you are still interrupted, complain to my operator.\0A\00" ; <[87 x i8]*> [#uses=0]
+@str33 = internal global [59 x i8] c"tellics ptell Sorry, but I don't understand that command.\0A\00" ; <[59 x i8]*> [#uses=0]
[email protected] = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [41 x i8] c"tellics ptell p doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0]
+@str34 = internal global [41 x i8] c"tellics ptell n doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0]
+@str35 = internal global [41 x i8] c"tellics ptell b doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0]
+@str36 = internal global [41 x i8] c"tellics ptell r doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0]
+@str37 = internal global [41 x i8] c"tellics ptell q doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0]
+@str38 = internal global [20 x i8] c"tellics ptell ---p\0A\00" ; <[20 x i8]*> [#uses=0]
+@str39 = internal global [20 x i8] c"tellics ptell ---n\0A\00" ; <[20 x i8]*> [#uses=0]
+@str40 = internal global [20 x i8] c"tellics ptell ---b\0A\00" ; <[20 x i8]*> [#uses=0]
+@str41 = internal global [20 x i8] c"tellics ptell ---r\0A\00" ; <[20 x i8]*> [#uses=0]
+@str42 = internal global [20 x i8] c"tellics ptell ---q\0A\00" ; <[20 x i8]*> [#uses=0]
[email protected] = internal global [17 x i8] c"tellics ptell x\0A\00" ; <[17 x i8]*> [#uses=0]
[email protected] = internal global [18 x i8] c"tellics ptell go\0A\00" ; <[18 x i8]*> [#uses=0]
+@bufftop = internal global i32 0 ; <i32*> [#uses=2]
+@membuff = internal global i8* null ; <i8**> [#uses=3]
+@maxply = internal global i32 0 ; <i32*> [#uses=1]
+@forwards = internal global i32 0 ; <i32*> [#uses=1]
+@nodecount = internal global i32 0 ; <i32*> [#uses=1]
+@frees = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global i1 false ; <i1*> [#uses=1]
[email protected] = internal global i1 false ; <i1*> [#uses=1]
+@rootlosers = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=1]
+@pn_move = internal global %struct.move_s zeroinitializer ; <%struct.move_s*> [#uses=7]
+@iters = internal global i32 0 ; <i32*> [#uses=1]
[email protected] = internal global i1 false ; <i1*> [#uses=0]
[email protected] = internal global [28 x i8] c"tellics kibitz Forced win!\0A\00" ; <[28 x i8]*> [#uses=0]
[email protected] = internal global [34 x i8] c"tellics kibitz Forced win! (alt)\0A\00" ; <[34 x i8]*> [#uses=0]
+@pn_time = internal global i32 0 ; <i32*> [#uses=1]
+@post = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [94 x i8] c"tellics whisper proof %d, disproof %d, %d losers, highest depth %d, primary %d, secondary %d\0A\00" ; <[94 x i8]*> [#uses=0]
+@str26 = internal global [30 x i8] c"tellics whisper Forced reply\0A\00" ; <[30 x i8]*> [#uses=0]
[email protected] = internal global [60 x i8] c"P: %d D: %d N: %d S: %d Mem: %2.2fM Iters: %d MaxDepth: %d\0A\00" ; <[60 x i8]*> [#uses=0]
[email protected] = internal global [90 x i8] c"tellics whisper proof %d, disproof %d, %d nodes, %d forwards, %d iters, highest depth %d\0A\00" ; <[90 x i8]*> [#uses=0]
[email protected] = internal global [11 x i8] c"Time : %f\0A\00" ; <[11 x i8]*> [#uses=0]
[email protected] = internal global [23 x i8] c"This position is WON.\0A\00" ; <[23 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"PV: \00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [4 x i8] c"%s \00" ; <[4 x i8]*> [#uses=0]
[email protected] = internal global [2 x i8] c" \00" ; <[2 x i8]*> [#uses=0]
[email protected] = internal global [41 x i8] c"\0Atellics kibitz Forced win in %d moves.\0A\00" ; <[41 x i8]*> [#uses=0]
[email protected] = internal global [20 x i8] c"\0A1-0 {White mates}\0A\00" ; <[20 x i8]*> [#uses=0]
+@result = internal global i32 0 ; <i32*> [#uses=4]
[email protected] = internal global [20 x i8] c"\0A0-1 {Black mates}\0A\00" ; <[20 x i8]*> [#uses=0]
[email protected] = internal global [24 x i8] c"This position is LOST.\0A\00" ; <[24 x i8]*> [#uses=0]
[email protected] = internal global [27 x i8] c"This position is UNKNOWN.\0A\00" ; <[27 x i8]*> [#uses=0]
[email protected] = internal global [47 x i8] c"P: %d D: %d N: %d S: %d Mem: %2.2fM Iters: %d\0A\00" ; <[47 x i8]*> [#uses=0]
+@s_threat.b = internal global i1 false ; <i1*> [#uses=0]
[email protected] = internal global i1 false ; <i1*> [#uses=3]
+@cfg_razordrop.b = internal global i1 false ; <i1*> [#uses=0]
+@cfg_futprune.b = internal global i1 false ; <i1*> [#uses=0]
+@cfg_onerep.b = internal global i1 false ; <i1*> [#uses=0]
+@setcode = internal global [30 x i8] zeroinitializer ; <[30 x i8]*> [#uses=0]
[email protected] = internal global [3 x i8] c"%u\00" ; <[3 x i8]*> [#uses=0]
+@searching_pv.b = internal global i1 false ; <i1*> [#uses=0]
+@pv = internal global [300 x [300 x %struct.move_s]] zeroinitializer ; <[300 x [300 x %struct.move_s]]*> [#uses=0]
+@i_depth = internal global i32 0 ; <i32*> [#uses=0]
+@history_h = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0]
+@killer1 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0]
+@killer2 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0]
+@killer3 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0]
+@rootnodecount = internal global [512 x i32] zeroinitializer ; <[512 x i32]*> [#uses=0]
+@raw_nodes = internal global i32 0 ; <i32*> [#uses=0]
+@pv_length = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0]
+@time_exit.b = internal global i1 false ; <i1*> [#uses=0]
+@time_for_move = internal global i32 0 ; <i32*> [#uses=3]
+@failed = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global i1 false ; <i1*> [#uses=1]
+@time_left = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [38 x i8] c"Extended from %d to %d, time left %d\0A\00" ; <[38 x i8]*> [#uses=0]
+@checks = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0]
+@singular = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0]
+@recaps = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0]
+@ext_onerep = internal global i32 0 ; <i32*> [#uses=1]
+@FULL = internal global i32 0 ; <i32*> [#uses=1]
+@PVS = internal global i32 0 ; <i32*> [#uses=1]
+@PVSF = internal global i32 0 ; <i32*> [#uses=1]
+@killer_scores = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0]
+@killer_scores2 = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0]
+@killer_scores3 = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0]
+@time_failure.b = internal global i1 false ; <i1*> [#uses=0]
+@cur_score = internal global i32 0 ; <i32*> [#uses=0]
+@legals = internal global i32 0 ; <i32*> [#uses=3]
+@movetotal = internal global i32 0 ; <i32*> [#uses=0]
+@searching_move = internal global [20 x i8] zeroinitializer ; <[20 x i8]*> [#uses=0]
+@is_pondering.b = internal global i1 false ; <i1*> [#uses=6]
+@true_i_depth = internal global i8 0 ; <i8*> [#uses=1]
+@is_analyzing.b = internal global i1 false ; <i1*> [#uses=0]
+@inc = internal global i32 0 ; <i32*> [#uses=1]
+@time_cushion = internal global i32 0 ; <i32*> [#uses=2]
[email protected] = internal global [16 x i8] c"Opening phase.\0A\00" ; <[16 x i8]*> [#uses=1]
[email protected] = internal global [19 x i8] c"Middlegame phase.\0A\00" ; <[19 x i8]*> [#uses=1]
[email protected] = internal global [16 x i8] c"Endgame phase.\0A\00" ; <[16 x i8]*> [#uses=1]
+@str43 = internal global [20 x i8] c"Time for move : %d\0A\00" ; <[20 x i8]*> [#uses=1]
+@postpv = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0]
+@str44 = internal global [49 x i8] c"tellics whisper %d restart(s), ended up with %s\0A\00" ; <[49 x i8]*> [#uses=0]
+@moves_to_tc = internal global i32 0 ; <i32*> [#uses=0]
+@str45 = internal global [27 x i8] c"tellics kibitz Mate in %d\0A\00" ; <[27 x i8]*> [#uses=0]
+@str46 = internal global [52 x i8] c"tellics ptell Mate in %d, give him no more pieces.\0A\00" ; <[52 x i8]*> [#uses=0]
[email protected] = internal global i1 false ; <i1*> [#uses=0]
[email protected] = internal global [37 x i8] c"tellics ptell You can trade freely.\0A\00" ; <[37 x i8]*> [#uses=0]
+@str47 = internal global [25 x i8] c"tellics ptell ---trades\0A\00" ; <[25 x i8]*> [#uses=0]
[email protected] = internal global [49 x i8] c"tellics kibitz Both players dead...resigning...\0A\00" ; <[49 x i8]*> [#uses=0]
[email protected] = internal global [16 x i8] c"tellics resign\0A\00" ; <[16 x i8]*> [#uses=0]
+@str48 = internal global [81 x i8] c"tellics ptell I am forcedly mated (dead). Tell me 'go' to start moving into it.\0A\00" ; <[81 x i8]*> [#uses=0]
[email protected] = internal global [62 x i8] c"tellics ptell I'll have to sit...(lose piece that mates you)\0A\00" ; <[62 x i8]*> [#uses=0]
+@see_num_attackers = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0]
+@see_attackers = internal global [2 x [16 x %struct.see_data]] zeroinitializer ; <[2 x [16 x %struct.see_data]]*> [#uses=0]
+@scentral = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 2, i32 15, i32 15, i32 15, i32 15, i32 2, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 7, i32 15, i32 25, i32 25, i32 15, i32 7, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 7, i32 15, i32 25, i32 25, i32 15, i32 7, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 2, i32 15, i32 15, i32 15, i32 15, i32 2, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0]
+@str51 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/seval.c\00" ; <[81 x i8]*> [#uses=0]
+@divider = internal global [50 x i8] c"-------------------------------------------------\00" ; <[50 x i8]*> [#uses=0]
+@min_per_game = internal global i32 0 ; <i32*> [#uses=0]
+@opp_rating = internal global i32 0 ; <i32*> [#uses=0]
+@my_rating = internal global i32 0 ; <i32*> [#uses=0]
+@str53 = internal global [15 x i8] c"SPEC Workload\0A\00" ; <[15 x i8]*> [#uses=0]
+@opening_history = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0]
+@str60 = internal global [81 x i8] c"Material score: %d Eval : %d MaxPosDiff: %d White hand: %d Black hand : %d\0A\00" ; <[81 x i8]*> [#uses=0]
+@str61 = internal global [26 x i8] c"Hash : %X HoldHash : %X\0A\00" ; <[26 x i8]*> [#uses=0]
+@str62 = internal global [9 x i8] c"move %s\0A\00" ; <[9 x i8]*> [#uses=0]
+@str63 = internal global [5 x i8] c"\0A%s\0A\00" ; <[5 x i8]*> [#uses=0]
+@str64 = internal global [19 x i8] c"0-1 {Black Mates}\0A\00" ; <[19 x i8]*> [#uses=0]
[email protected] = internal global [19 x i8] c"1-0 {White Mates}\0A\00" ; <[19 x i8]*> [#uses=0]
+@str65 = internal global [27 x i8] c"1/2-1/2 {Fifty move rule}\0A\00" ; <[27 x i8]*> [#uses=0]
[email protected] = internal global [29 x i8] c"1/2-1/2 {3 fold repetition}\0A\00" ; <[29 x i8]*> [#uses=0]
+@str66 = internal global [16 x i8] c"1/2-1/2 {Draw}\0A\00" ; <[16 x i8]*> [#uses=0]
+@str68 = internal global [8 x i8] c"Sjeng: \00" ; <[8 x i8]*> [#uses=0]
+@str69 = internal global [18 x i8] c"Illegal move: %s\0A\00" ; <[18 x i8]*> [#uses=0]
[email protected] = internal global [9 x i8] c"setboard\00" ; <[9 x i8]*> [#uses=0]
+@str470 = internal global [5 x i8] c"quit\00" ; <[5 x i8]*> [#uses=0]
+@str571 = internal global [5 x i8] c"exit\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"diagram\00" ; <[8 x i8]*> [#uses=0]
[email protected] = internal global [2 x i8] c"d\00" ; <[2 x i8]*> [#uses=0]
+@str72 = internal global [6 x i8] c"perft\00" ; <[6 x i8]*> [#uses=0]
+@str73 = internal global [3 x i8] c"%d\00" ; <[3 x i8]*> [#uses=0]
+@str74 = internal global [28 x i8] c"Raw nodes for depth %d: %i\0A\00" ; <[28 x i8]*> [#uses=0]
[email protected] = internal global [13 x i8] c"Time : %.2f\0A\00" ; <[13 x i8]*> [#uses=0]
+@str75 = internal global [4 x i8] c"new\00" ; <[4 x i8]*> [#uses=0]
[email protected] = internal global [40 x i8] c"tellics set 1 Sjeng SPEC 1.0 (SPEC/%s)\0A\00" ; <[40 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"xboard\00" ; <[7 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"nodes\00" ; <[6 x i8]*> [#uses=0]
+@str77 = internal global [38 x i8] c"Number of nodes: %i (%0.2f%% qnodes)\0A\00" ; <[38 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"post\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"nopost\00" ; <[7 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"random\00" ; <[7 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"hard\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"easy\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [2 x i8] c"?\00" ; <[2 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"white\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"black\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"force\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"eval\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [10 x i8] c"Eval: %d\0A\00" ; <[10 x i8]*> [#uses=0]
+@str2178 = internal global [3 x i8] c"%i\00" ; <[3 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"otim\00" ; <[5 x i8]*> [#uses=0]
+@opp_time = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [6 x i8] c"level\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [12 x i8] c"%i %i:%i %i\00" ; <[12 x i8]*> [#uses=0]
+@sec_per_game = internal global i32 0 ; <i32*> [#uses=0]
[email protected] = internal global [9 x i8] c"%i %i %i\00" ; <[9 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"rating\00" ; <[7 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"%i %i\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"holding\00" ; <[8 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"variant\00" ; <[8 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"normal\00" ; <[7 x i8]*> [#uses=0]
+@str79 = internal global [11 x i8] c"crazyhouse\00" ; <[11 x i8]*> [#uses=0]
[email protected] = internal global [9 x i8] c"bughouse\00" ; <[9 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"suicide\00" ; <[8 x i8]*> [#uses=0]
[email protected] = internal global [9 x i8] c"giveaway\00" ; <[9 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"losers\00" ; <[7 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"analyze\00" ; <[8 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"undo\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [18 x i8] c"Move number : %d\0A\00" ; <[18 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"remove\00" ; <[7 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"edit\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [2 x i8] c"#\00" ; <[2 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"partner\00" ; <[8 x i8]*> [#uses=0]
[email protected] = internal global [9 x i8] c"$partner\00" ; <[9 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"ptell\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"test\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [3 x i8] c"st\00" ; <[3 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"result\00" ; <[7 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"prove\00" ; <[6 x i8]*> [#uses=0]
+@str49 = internal global [26 x i8] c"\0AMax time to search (s): \00" ; <[26 x i8]*> [#uses=0]
+@str50 = internal global [5 x i8] c"ping\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [9 x i8] c"pong %d\0A\00" ; <[9 x i8]*> [#uses=0]
+@str52 = internal global [6 x i8] c"fritz\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"reset\00" ; <[6 x i8]*> [#uses=0]
+@str54 = internal global [3 x i8] c"sd\00" ; <[3 x i8]*> [#uses=0]
+@str55 = internal global [26 x i8] c"New max depth set to: %d\0A\00" ; <[26 x i8]*> [#uses=0]
+@str56 = internal global [5 x i8] c"auto\00" ; <[5 x i8]*> [#uses=0]
+@str57 = internal global [9 x i8] c"protover\00" ; <[9 x i8]*> [#uses=0]
[email protected] = internal global [63 x i8] c"feature ping=0 setboard=1 playother=0 san=0 usermove=0 time=1\0A\00" ; <[63 x i8]*> [#uses=0]
+@str80 = internal global [53 x i8] c"feature draw=0 sigint=0 sigterm=0 reuse=1 analyze=0\0A\00" ; <[53 x i8]*> [#uses=0]
[email protected] = internal global [33 x i8] c"feature myname=\22Sjeng SPEC 1.0\22\0A\00" ; <[33 x i8]*> [#uses=0]
[email protected] = internal global [71 x i8] c"feature variants=\22normal,bughouse,crazyhouse,suicide,giveaway,losers\22\0A\00" ; <[71 x i8]*> [#uses=0]
[email protected] = internal global [46 x i8] c"feature colors=1 ics=0 name=0 pause=0 done=1\0A\00" ; <[46 x i8]*> [#uses=0]
+@str58 = internal global [9 x i8] c"accepted\00" ; <[9 x i8]*> [#uses=0]
+@str59 = internal global [9 x i8] c"rejected\00" ; <[9 x i8]*> [#uses=0]
[email protected] = internal global [65 x i8] c"Interface does not support a required feature...expect trouble.\0A\00" ; <[65 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"\0A%s\0A\0A\00" ; <[6 x i8]*> [#uses=0]
+@str81 = internal global [41 x i8] c"diagram/d: toggle diagram display\0A\00" ; <[41 x i8]*> [#uses=0]
+@str82 = internal global [34 x i8] c"exit/quit: terminate Sjeng\0A\00" ; <[34 x i8]*> [#uses=0]
[email protected] = internal global [51 x i8] c"go: make Sjeng play the side to move\0A\00" ; <[51 x i8]*> [#uses=0]
+@str83 = internal global [35 x i8] c"new: start a new game\0A\00" ; <[35 x i8]*> [#uses=0]
+@str84 = internal global [55 x i8] c"level <x>: the xboard style command to set time\0A\00" ; <[55 x i8]*> [#uses=0]
+@str85 = internal global [49 x i8] c" <x> should be in the form: <a> <b> <c> where:\0A\00" ; <[49 x i8]*> [#uses=0]
[email protected] = internal global [49 x i8] c" a -> moves to TC (0 if using an ICS style TC)\0A\00" ; <[49 x i8]*> [#uses=0]
+@str86 = internal global [25 x i8] c" b -> minutes per game\0A\00" ; <[25 x i8]*> [#uses=0]
[email protected] = internal global [29 x i8] c" c -> increment in seconds\0A\00" ; <[29 x i8]*> [#uses=0]
[email protected] = internal global [55 x i8] c"nodes: outputs the number of nodes searched\0A\00" ; <[55 x i8]*> [#uses=0]
+@str87 = internal global [47 x i8] c"perft <x>: compute raw nodes to depth x\0A\00" ; <[47 x i8]*> [#uses=0]
[email protected] = internal global [42 x i8] c"post: toggles thinking output\0A\00" ; <[42 x i8]*> [#uses=0]
[email protected] = internal global [45 x i8] c"xboard: put Sjeng into xboard mode\0A\00" ; <[45 x i8]*> [#uses=0]
[email protected] = internal global [39 x i8] c"test: run an EPD testsuite\0A\00" ; <[39 x i8]*> [#uses=0]
+@str88 = internal global [52 x i8] c"speed: test movegen and evaluation speed\0A\00" ; <[52 x i8]*> [#uses=0]
+@str89 = internal global [59 x i8] c"proof: try to prove or disprove the current pos\0A\00" ; <[59 x i8]*> [#uses=0]
+@str90 = internal global [44 x i8] c"sd <x>: limit thinking to depth x\0A\00" ; <[44 x i8]*> [#uses=0]
[email protected] = internal global [51 x i8] c"st <x>: limit thinking to x centiseconds\0A\00" ; <[51 x i8]*> [#uses=0]
+@str67 = internal global [54 x i8] c"setboard <FEN>: set board to a specified FEN string\0A\00" ; <[54 x i8]*> [#uses=0]
[email protected] = internal global [38 x i8] c"undo: back up a half move\0A\00" ; <[38 x i8]*> [#uses=0]
[email protected] = internal global [38 x i8] c"remove: back up a full move\0A\00" ; <[38 x i8]*> [#uses=0]
+@str70 = internal global [42 x i8] c"force: disable computer moving\0A\00" ; <[42 x i8]*> [#uses=0]
+@str71 = internal global [44 x i8] c"auto: computer plays both sides\0A\00" ; <[44 x i8]*> [#uses=0]
+@DP_TTable = internal global %struct.TType* null ; <%struct.TType**> [#uses=1]
+@AS_TTable = internal global %struct.TType* null ; <%struct.TType**> [#uses=1]
+@QS_TTable = internal global %struct.QTType* null ; <%struct.QTType**> [#uses=1]
+@str93 = internal global [38 x i8] c"Out of memory allocating hashtables.\0A\00" ; <[38 x i8]*> [#uses=0]
+@type_to_char.3058 = internal global [14 x i32] [ i32 70, i32 80, i32 80, i32 78, i32 78, i32 75, i32 75, i32 82, i32 82, i32 81, i32 81, i32 66, i32 66, i32 69 ] ; <[14 x i32]*> [#uses=0]
+@str94 = internal global [8 x i8] c"%c@%c%d\00" ; <[8 x i8]*> [#uses=0]
+@str95 = internal global [5 x i8] c"%c%d\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"%c%d=%c\00" ; <[8 x i8]*> [#uses=0]
[email protected] = internal global [8 x i8] c"%cx%c%d\00" ; <[8 x i8]*> [#uses=0]
+@str96 = internal global [11 x i8] c"%cx%c%d=%c\00" ; <[11 x i8]*> [#uses=0]
+@str97 = internal global [4 x i8] c"O-O\00" ; <[4 x i8]*> [#uses=0]
+@str98 = internal global [6 x i8] c"O-O-O\00" ; <[6 x i8]*> [#uses=0]
+@str99 = internal global [9 x i8] c"%c%c%c%d\00" ; <[9 x i8]*> [#uses=0]
+@str3100 = internal global [9 x i8] c"%c%d%c%d\00" ; <[9 x i8]*> [#uses=0]
+@str101 = internal global [10 x i8] c"%c%cx%c%d\00" ; <[10 x i8]*> [#uses=0]
[email protected] = internal global [10 x i8] c"%c%dx%c%d\00" ; <[10 x i8]*> [#uses=0]
+@str102 = internal global [7 x i8] c"%c%c%d\00" ; <[7 x i8]*> [#uses=0]
+@str5103 = internal global [5 x i8] c"illg\00" ; <[5 x i8]*> [#uses=0]
+@type_to_char.3190 = internal global [14 x i32] [ i32 70, i32 80, i32 112, i32 78, i32 110, i32 75, i32 107, i32 82, i32 114, i32 81, i32 113, i32 66, i32 98, i32 69 ] ; <[14 x i32]*> [#uses=0]
[email protected] = internal global [10 x i8] c"%c%d%c%dn\00" ; <[10 x i8]*> [#uses=0]
[email protected] = internal global [10 x i8] c"%c%d%c%dr\00" ; <[10 x i8]*> [#uses=0]
[email protected] = internal global [10 x i8] c"%c%d%c%db\00" ; <[10 x i8]*> [#uses=0]
[email protected] = internal global [10 x i8] c"%c%d%c%dk\00" ; <[10 x i8]*> [#uses=0]
[email protected] = internal global [10 x i8] c"%c%d%c%dq\00" ; <[10 x i8]*> [#uses=0]
[email protected] = internal global [14 x i8*] [ i8* getelementptr ([3 x i8]* @str105, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str12106, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str13107, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str141, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str152, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str163, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str174, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str185, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str19108, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str206, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str21109, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str227, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str238, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str249, i32 0, i32 0) ] ; <[14 x i8*]*> [#uses=0]
+@str105 = internal global [3 x i8] c"!!\00" ; <[3 x i8]*> [#uses=1]
+@str12106 = internal global [3 x i8] c" P\00" ; <[3 x i8]*> [#uses=1]
+@str13107 = internal global [3 x i8] c"*P\00" ; <[3 x i8]*> [#uses=1]
+@str141 = internal global [3 x i8] c" N\00" ; <[3 x i8]*> [#uses=1]
+@str152 = internal global [3 x i8] c"*N\00" ; <[3 x i8]*> [#uses=1]
+@str163 = internal global [3 x i8] c" K\00" ; <[3 x i8]*> [#uses=1]
+@str174 = internal global [3 x i8] c"*K\00" ; <[3 x i8]*> [#uses=1]
+@str185 = internal global [3 x i8] c" R\00" ; <[3 x i8]*> [#uses=1]
+@str19108 = internal global [3 x i8] c"*R\00" ; <[3 x i8]*> [#uses=1]
+@str206 = internal global [3 x i8] c" Q\00" ; <[3 x i8]*> [#uses=1]
+@str21109 = internal global [3 x i8] c"*Q\00" ; <[3 x i8]*> [#uses=1]
+@str227 = internal global [3 x i8] c" B\00" ; <[3 x i8]*> [#uses=1]
+@str238 = internal global [3 x i8] c"*B\00" ; <[3 x i8]*> [#uses=1]
+@str249 = internal global [3 x i8] c" \00" ; <[3 x i8]*> [#uses=1]
+@str110 = internal global [42 x i8] c"+----+----+----+----+----+----+----+----+\00" ; <[42 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c" %s\0A\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"%d |\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c" %s |\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [7 x i8] c"\0A %s\0A\00" ; <[7 x i8]*> [#uses=0]
+@str111 = internal global [45 x i8] c"\0A a b c d e f g h\0A\0A\00" ; <[45 x i8]*> [#uses=0]
[email protected] = internal global [45 x i8] c"\0A h g f e d c b a\0A\0A\00" ; <[45 x i8]*> [#uses=0]
[email protected] = internal global [2 x i8] c"<\00" ; <[2 x i8]*> [#uses=0]
[email protected] = internal global [3 x i8] c"> \00" ; <[3 x i8]*> [#uses=0]
[email protected] = internal global [18 x i8] c"%2i %7i %5i %8i \00" ; <[18 x i8]*> [#uses=0]
+@str115 = internal global [20 x i8] c"%2i %c%1i.%02i %9i \00" ; <[20 x i8]*> [#uses=0]
[email protected] = internal global [5 x i8] c"%s !\00" ; <[5 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"%s !!\00" ; <[6 x i8]*> [#uses=0]
[email protected] = internal global [6 x i8] c"%s ??\00" ; <[6 x i8]*> [#uses=0]
+@str124 = internal global [71 x i8] c"\0ASjeng version SPEC 1.0, Copyright (C) 2000-2005 Gian-Carlo Pascutto\0A\0A\00" ; <[71 x i8]*> [#uses=0]
+@state = internal global [625 x i32] zeroinitializer ; <[625 x i32]*> [#uses=0]
+
+declare fastcc i32 @calc_attackers(i32, i32)
+
+declare fastcc i32 @is_attacked(i32, i32)
+
+declare fastcc void @ProcessHoldings(i8*)
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
+declare i8* @strncpy(i8*, i8*, i32)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare void @__eprintf(i8*, i8*, i32, i8*)
+
+declare fastcc void @addHolding(i32, i32)
+
+declare fastcc void @removeHolding(i32, i32)
+
+declare fastcc void @DropremoveHolding(i32, i32)
+
+declare i32 @printf(i8*, ...)
+
+declare fastcc i32 @is_draw()
+
+declare void @exit(i32)
+
+declare fastcc void @setup_epd_line(i8*)
+
+declare i32 @atoi(i8*)
+
+declare fastcc void @reset_piece_square()
+
+declare fastcc void @initialize_hash()
+
+declare i32 @__maskrune(i32, i32)
+
+declare fastcc void @comp_to_san(i64, i64, i64, i8*)
+
+declare i8* @strstr(i8*, i8*)
+
+declare i32 @atol(i8*)
+
+declare %struct.FILE* @fopen(i8*, i8*)
+
+declare fastcc void @display_board(i32)
+
+define internal void @think(%struct.move_s* sret %agg.result) {
+entry:
+ %output.i = alloca [8 x i8], align 8 ; <[8 x i8]*> [#uses=0]
+ %comp_move = alloca %struct.move_s, align 16 ; <%struct.move_s*> [#uses=7]
+ %temp_move = alloca %struct.move_s, align 16 ; <%struct.move_s*> [#uses=6]
+ %moves = alloca [512 x %struct.move_s], align 16 ; <[512 x %struct.move_s]*> [#uses=7]
+ %output = alloca [8 x i8], align 8 ; <[8 x i8]*> [#uses=1]
+ store i1 false, i1* @userealholdings.b
+ %tmp = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0 ; <%struct.move_s*> [#uses=3]
+ %tmp362 = getelementptr %struct.move_s* %comp_move, i32 0, i32 0 ; <i32*> [#uses=0]
+ %tmp365 = getelementptr %struct.move_s* %comp_move, i32 0, i32 1 ; <i32*> [#uses=0]
+ %tmp368 = getelementptr %struct.move_s* %comp_move, i32 0, i32 2 ; <i32*> [#uses=0]
+ %tmp371 = getelementptr %struct.move_s* %comp_move, i32 0, i32 3 ; <i32*> [#uses=0]
+ %tmp374 = getelementptr %struct.move_s* %comp_move, i32 0, i32 4 ; <i32*> [#uses=0]
+ %tmp377 = getelementptr %struct.move_s* %comp_move, i32 0, i32 5 ; <i32*> [#uses=0]
+ %tmp.upgrd.174 = bitcast %struct.move_s* %comp_move to { i64, i64, i64 }* ; <{ i64, i64, i64 }*> [#uses=3]
+ %tmp.upgrd.175 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 0 ; <i64*> [#uses=0]
+ %tmp829 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 1 ; <i64*> [#uses=0]
+ %tmp832 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 2 ; <i64*> [#uses=0]
+ %output.upgrd.176 = getelementptr [8 x i8]* %output, i32 0, i32 0 ; <i8*> [#uses=0]
+ %tmp573 = getelementptr %struct.move_s* %temp_move, i32 0, i32 0 ; <i32*> [#uses=0]
+ %tmp576 = getelementptr %struct.move_s* %temp_move, i32 0, i32 1 ; <i32*> [#uses=0]
+ %tmp579 = getelementptr %struct.move_s* %temp_move, i32 0, i32 2 ; <i32*> [#uses=0]
+ %tmp582 = getelementptr %struct.move_s* %temp_move, i32 0, i32 3 ; <i32*> [#uses=0]
+ %tmp585 = getelementptr %struct.move_s* %temp_move, i32 0, i32 4 ; <i32*> [#uses=0]
+ %tmp588 = getelementptr %struct.move_s* %temp_move, i32 0, i32 5 ; <i32*> [#uses=0]
+ %pn_restart.0.ph = bitcast i32 0 to i32 ; <i32> [#uses=2]
+ %tmp21362 = icmp eq i32 0, 0 ; <i1> [#uses=2]
+ %tmp216 = sitofp i32 %pn_restart.0.ph to float ; <float> [#uses=1]
+ %tmp216.upgrd.177 = fpext float %tmp216 to double ; <double> [#uses=1]
+ %tmp217 = fadd double %tmp216.upgrd.177, 1.000000e+00 ; <double> [#uses=1]
+ %tmp835 = icmp sgt i32 %pn_restart.0.ph, 9 ; <i1> [#uses=0]
+ store i32 0, i32* @nodes
+ store i32 0, i32* @qnodes
+ store i32 1, i32* @ply
+ store i32 0, i32* @ECacheProbes
+ store i32 0, i32* @ECacheHits
+ store i32 0, i32* @TTProbes
+ store i32 0, i32* @TTHits
+ store i32 0, i32* @TTStores
+ store i32 0, i32* @NCuts
+ store i32 0, i32* @NTries
+ store i32 0, i32* @TExt
+ store i32 0, i32* @FH
+ store i32 0, i32* @FHF
+ store i32 0, i32* @PVS
+ store i32 0, i32* @FULL
+ store i32 0, i32* @PVSF
+ store i32 0, i32* @ext_check
+ store i32 0, i32* @ext_onerep
+ store i32 0, i32* @razor_drop
+ store i32 0, i32* @razor_material
+ store i1 false, i1* @extendedtime.b
+ store i1 false, i1* @forcedwin.b
+ store i32 200, i32* @maxposdiff
+ store i8 0, i8* @true_i_depth
+ store i32 0, i32* @legals
+ %tmp48 = load i32* @Variant ; <i32> [#uses=1]
+ %tmp49 = icmp eq i32 %tmp48, 4 ; <i1> [#uses=1]
+ %storemerge = zext i1 %tmp49 to i32 ; <i32> [#uses=1]
+ store i32 %storemerge, i32* @captures
+ call fastcc void @gen( %struct.move_s* %tmp )
+ %tmp53 = load i32* @numb_moves ; <i32> [#uses=1]
+ %tmp.i = load i32* @Variant ; <i32> [#uses=1]
+ %tmp.i.upgrd.178 = icmp eq i32 %tmp.i, 3 ; <i1> [#uses=1]
+ br i1 %tmp.i.upgrd.178, label %in_check.exit, label %cond_next.i
+
+cond_next.i: ; preds = %entry
+ %tmp2.i5 = load i32* @white_to_move ; <i32> [#uses=1]
+ %tmp3.i = icmp eq i32 %tmp2.i5, 1 ; <i1> [#uses=0]
+ ret void
+
+in_check.exit: ; preds = %entry
+ %tmp7637 = icmp sgt i32 %tmp53, 0 ; <i1> [#uses=1]
+ br i1 %tmp7637, label %cond_true77, label %bb80
+
+cond_true77: ; preds = %in_check.exit
+ %l.1.0 = bitcast i32 0 to i32 ; <i32> [#uses=2]
+ call fastcc void @make( %struct.move_s* %tmp, i32 %l.1.0 )
+ %tmp61 = call fastcc i32 @check_legal( %struct.move_s* %tmp, i32 %l.1.0, i32 0 ) ; <i32> [#uses=1]
+ %tmp62 = icmp eq i32 %tmp61, 0 ; <i1> [#uses=0]
+ ret void
+
+bb80: ; preds = %in_check.exit
+ %tmp81 = load i32* @Variant ; <i32> [#uses=1]
+ %tmp82 = icmp eq i32 %tmp81, 4 ; <i1> [#uses=1]
+ br i1 %tmp82, label %cond_true83, label %cond_next118
+
+cond_true83: ; preds = %bb80
+ %tmp84 = load i32* @legals ; <i32> [#uses=1]
+ %tmp85 = icmp eq i32 %tmp84, 0 ; <i1> [#uses=0]
+ ret void
+
+cond_next118: ; preds = %bb80
+ %tmp119 = load i32* @Variant ; <i32> [#uses=1]
+ %tmp120 = icmp eq i32 %tmp119, 1 ; <i1> [#uses=1]
+ br i1 %tmp120, label %cond_next176, label %cond_true121
+
+cond_true121: ; preds = %cond_next118
+ %tmp122.b = load i1* @is_pondering.b ; <i1> [#uses=1]
+ br i1 %tmp122.b, label %cond_next176, label %cond_true124
+
+cond_true124: ; preds = %cond_true121
+ %tmp125 = load i32* @legals ; <i32> [#uses=1]
+ %tmp126 = icmp eq i32 %tmp125, 1 ; <i1> [#uses=1]
+ br i1 %tmp126, label %cond_true127, label %cond_next176
+
+cond_true127: ; preds = %cond_true124
+ %tmp128 = load i32* @inc ; <i32> [#uses=1]
+ %tmp129 = mul i32 %tmp128, 100 ; <i32> [#uses=1]
+ %tmp130 = load i32* @time_cushion ; <i32> [#uses=1]
+ %tmp131 = add i32 %tmp129, %tmp130 ; <i32> [#uses=1]
+ store i32 %tmp131, i32* @time_cushion
+ %tmp134 = getelementptr %struct.move_s* %agg.result, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp135 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp136 = load i32* %tmp135 ; <i32> [#uses=1]
+ store i32 %tmp136, i32* %tmp134
+ %tmp137 = getelementptr %struct.move_s* %agg.result, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp138 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp139 = load i32* %tmp138 ; <i32> [#uses=1]
+ store i32 %tmp139, i32* %tmp137
+ %tmp140 = getelementptr %struct.move_s* %agg.result, i32 0, i32 2 ; <i32*> [#uses=1]
+ %tmp141 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 2 ; <i32*> [#uses=1]
+ %tmp142 = load i32* %tmp141 ; <i32> [#uses=1]
+ store i32 %tmp142, i32* %tmp140
+ %tmp143 = getelementptr %struct.move_s* %agg.result, i32 0, i32 3 ; <i32*> [#uses=1]
+ %tmp144 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 3 ; <i32*> [#uses=1]
+ %tmp145 = load i32* %tmp144 ; <i32> [#uses=1]
+ store i32 %tmp145, i32* %tmp143
+ %tmp146 = getelementptr %struct.move_s* %agg.result, i32 0, i32 4 ; <i32*> [#uses=1]
+ %tmp147 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 4 ; <i32*> [#uses=1]
+ %tmp148 = load i32* %tmp147 ; <i32> [#uses=1]
+ store i32 %tmp148, i32* %tmp146
+ %tmp149 = getelementptr %struct.move_s* %agg.result, i32 0, i32 5 ; <i32*> [#uses=1]
+ %tmp150 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 5 ; <i32*> [#uses=1]
+ %tmp151 = load i32* %tmp150 ; <i32> [#uses=1]
+ store i32 %tmp151, i32* %tmp149
+ ret void
+
+cond_next176: ; preds = %cond_true124, %cond_true121, %cond_next118
+ call fastcc void @check_phase( )
+ %tmp177 = load i32* @phase ; <i32> [#uses=1]
+ switch i32 %tmp177, label %bb187 [
+ i32 0, label %bb178
+ i32 1, label %bb180
+ i32 2, label %bb183
+ ]
+
+bb178: ; preds = %cond_next176
+ %tmp179 = call i32 (i8*, ...)* @printf( i8* getelementptr ([16 x i8]* @str40.upgrd.84, i32 0, i64 0) ) ; <i32> [#uses=0]
+ %tmp18854.b = load i1* @is_pondering.b ; <i1> [#uses=1]
+ br i1 %tmp18854.b, label %cond_false210, label %cond_true190
+
+bb180: ; preds = %cond_next176
+ %tmp182 = call i32 (i8*, ...)* @printf( i8* getelementptr ([19 x i8]* @str.upgrd.85, i32 0, i64 0) ) ; <i32> [#uses=0]
+ %tmp18856.b = load i1* @is_pondering.b ; <i1> [#uses=0]
+ ret void
+
+bb183: ; preds = %cond_next176
+ %tmp185 = call i32 (i8*, ...)* @printf( i8* getelementptr ([16 x i8]* @str1.upgrd.86, i32 0, i64 0) ) ; <i32> [#uses=0]
+ %tmp18858.b = load i1* @is_pondering.b ; <i1> [#uses=0]
+ ret void
+
+bb187: ; preds = %cond_next176
+ %tmp188.b = load i1* @is_pondering.b ; <i1> [#uses=0]
+ ret void
+
+cond_true190: ; preds = %bb178
+ %tmp191 = load i32* @fixed_time ; <i32> [#uses=1]
+ %tmp192 = icmp eq i32 %tmp191, 0 ; <i1> [#uses=0]
+ ret void
+
+cond_false210: ; preds = %bb178
+ store i32 999999, i32* @time_for_move
+ br i1 %tmp21362, label %cond_true226.critedge, label %bb287.critedge
+
+cond_true226.critedge: ; preds = %cond_false210
+ %tmp223.c = call i32 (i8*, ...)* @printf( i8* getelementptr ([20 x i8]* @str43, i32 0, i64 0), i32 999999 ) ; <i32> [#uses=0]
+ %tmp.i.upgrd.179 = load %struct.TType** @DP_TTable ; <%struct.TType*> [#uses=1]
+ %tmp.i7.b = load i1* @TTSize.b ; <i1> [#uses=1]
+ %tmp1.i = select i1 %tmp.i7.b, i32 60000000, i32 0 ; <i32> [#uses=1]
+ %tmp.i.sb = getelementptr %struct.TType* %tmp.i.upgrd.179, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memset.i32( i8* %tmp.i.sb, i8 0, i32 %tmp1.i, i32 4 )
+ %tmp2.i = load %struct.TType** @AS_TTable ; <%struct.TType*> [#uses=1]
+ %tmp3.i8.b = load i1* @TTSize.b ; <i1> [#uses=1]
+ %tmp4.i = select i1 %tmp3.i8.b, i32 60000000, i32 0 ; <i32> [#uses=1]
+ %tmp2.i.upgrd.180 = getelementptr %struct.TType* %tmp2.i, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memset.i32( i8* %tmp2.i.upgrd.180, i8 0, i32 %tmp4.i, i32 4 )
+ %tmp.i.QTT = load %struct.QTType** @QS_TTable ; <%struct.QTType*> [#uses=1]
+ %tmp5.i9.b = load i1* @TTSize.b ; <i1> [#uses=1]
+ %tmp6.i10 = select i1 %tmp5.i9.b, i32 48000000, i32 0 ; <i32> [#uses=1]
+ %tmp7.i = getelementptr %struct.QTType* %tmp.i.QTT, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memset.i32( i8* %tmp7.i, i8 0, i32 %tmp6.i10, i32 4 )
+ %tmp.i.ECache = load %struct.ECacheType** @ECache ; <%struct.ECacheType*> [#uses=1]
+ %tmp.i14.b = load i1* @ECacheSize.b ; <i1> [#uses=1]
+ %tmp1.i16 = select i1 %tmp.i14.b, i32 12000000, i32 0 ; <i32> [#uses=1]
+ %tmp.i17 = bitcast %struct.ECacheType* %tmp.i.ECache to i8* ; <i8*> [#uses=1]
+ call void @llvm.memset.i32( i8* %tmp.i17, i8 0, i32 %tmp1.i16, i32 4 )
+ call void @llvm.memset.i32( i8* bitcast ([300 x i32]* @rootlosers to i8*), i8 0, i32 1200, i32 4 )
+ %tmp234.b = load i1* @is_pondering.b ; <i1> [#uses=1]
+ br i1 %tmp234.b, label %bb263, label %cond_next238
+
+cond_next238: ; preds = %cond_true226.critedge
+ %tmp239 = load i32* @Variant ; <i32> [#uses=2]
+ switch i32 %tmp239, label %bb263 [
+ i32 3, label %bb249
+ i32 4, label %bb249
+ ]
+
+bb249: ; preds = %cond_next238, %cond_next238
+ %tmp250 = load i32* @piece_count ; <i32> [#uses=1]
+ %tmp251 = icmp sgt i32 %tmp250, 3 ; <i1> [#uses=1]
+ %tmp240.not = icmp ne i32 %tmp239, 3 ; <i1> [#uses=1]
+ %brmerge = or i1 %tmp251, %tmp240.not ; <i1> [#uses=1]
+ br i1 %brmerge, label %bb260, label %bb263
+
+bb260: ; preds = %bb249
+ %tmp261 = load i32* @time_for_move ; <i32> [#uses=1]
+ %tmp261.upgrd.181 = sitofp i32 %tmp261 to float ; <float> [#uses=1]
+ %tmp261.upgrd.182 = fpext float %tmp261.upgrd.181 to double ; <double> [#uses=1]
+ %tmp262 = fdiv double %tmp261.upgrd.182, 3.000000e+00 ; <double> [#uses=1]
+ %tmp262.upgrd.183 = fptosi double %tmp262 to i32 ; <i32> [#uses=1]
+ store i32 %tmp262.upgrd.183, i32* @pn_time
+ %tmp1.b.i = load i1* @PBSize.b ; <i1> [#uses=1]
+ %tmp1.i1 = select i1 %tmp1.b.i, i32 200000, i32 0 ; <i32> [#uses=1]
+ %tmp.i2 = call i8* @calloc( i32 %tmp1.i1, i32 44 ) ; <i8*> [#uses=1]
+ %tmp.i.ub = bitcast i8* %tmp.i2 to i8* ; <i8*> [#uses=1]
+ store i8* %tmp.i.ub, i8** @membuff
+ %tmp2.i3 = call i8* @calloc( i32 1, i32 44 ) ; <i8*> [#uses=3]
+ %tmp2.i.upgrd.184 = bitcast i8* %tmp2.i3 to %struct.node_t* ; <%struct.node_t*> [#uses=6]
+ %tmp.i.move_s = getelementptr [512 x %struct.move_s]* null, i32 0, i32 0 ; <%struct.move_s*> [#uses=3]
+ call fastcc void @gen( %struct.move_s* %tmp.i.move_s )
+ %tmp3.i4 = load i32* @numb_moves ; <i32> [#uses=4]
+ %tmp3.i5 = bitcast i32 %tmp3.i4 to i32 ; <i32> [#uses=0]
+ store i1 false, i1* @alllosers.b
+ call void @llvm.memset.i32( i8* bitcast ([300 x i32]* @rootlosers to i8*), i8 0, i32 1200, i32 4 )
+ %nodesspent.i = bitcast [512 x i32]* null to i8* ; <i8*> [#uses=1]
+ call void @llvm.memset.i32( i8* %nodesspent.i, i8 0, i32 2048, i32 16 )
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5)
+ %tmp.i.i = load i32* @Variant ; <i32> [#uses=1]
+ %tmp.i.i.upgrd.185 = icmp eq i32 %tmp.i.i, 3 ; <i1> [#uses=1]
+ br i1 %tmp.i.i.upgrd.185, label %in_check.exit.i, label %cond_next.i.i
+
+cond_next.i.i: ; preds = %bb260
+ %tmp2.i.i = load i32* @white_to_move ; <i32> [#uses=1]
+ %tmp3.i.i = icmp eq i32 %tmp2.i.i, 1 ; <i1> [#uses=1]
+ br i1 %tmp3.i.i, label %cond_true4.i.i, label %cond_false12.i.i
+
+cond_true4.i.i: ; preds = %cond_next.i.i
+ %tmp5.i.i = load i32* @wking_loc ; <i32> [#uses=1]
+ %tmp6.i.i = call fastcc i32 @is_attacked( i32 %tmp5.i.i, i32 0 ) ; <i32> [#uses=1]
+ %not.tmp7.i.i = icmp ne i32 %tmp6.i.i, 0 ; <i1> [#uses=1]
+ %tmp217.i = zext i1 %not.tmp7.i.i to i32 ; <i32> [#uses=1]
+ %tmp4219.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=1]
+ br i1 %tmp4219.i, label %cond_true43.i, label %bb46.i
+
+cond_false12.i.i: ; preds = %cond_next.i.i
+ %tmp13.i.i = load i32* @bking_loc ; <i32> [#uses=1]
+ %tmp14.i.i = call fastcc i32 @is_attacked( i32 %tmp13.i.i, i32 1 ) ; <i32> [#uses=1]
+ %not.tmp15.i.i = icmp ne i32 %tmp14.i.i, 0 ; <i1> [#uses=1]
+ %tmp2120.i = zext i1 %not.tmp15.i.i to i32 ; <i32> [#uses=1]
+ %tmp4222.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=1]
+ br i1 %tmp4222.i, label %cond_true43.i, label %bb46.i
+
+in_check.exit.i: ; preds = %bb260
+ %tmp4224.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=0]
+ ret void
+
+cond_true43.i: ; preds = %cond_false12.i.i, %cond_true4.i.i
+ %tmp21.0.ph.i = phi i32 [ %tmp217.i, %cond_true4.i.i ], [ %tmp2120.i, %cond_false12.i.i ] ; <i32> [#uses=1]
+ %i.0.0.i = bitcast i32 0 to i32 ; <i32> [#uses=2]
+ call fastcc void @make( %struct.move_s* %tmp.i.move_s, i32 %i.0.0.i )
+ %tmp27.i = call fastcc i32 @check_legal( %struct.move_s* %tmp.i.move_s, i32 %i.0.0.i, i32 %tmp21.0.ph.i ) ; <i32> [#uses=1]
+ %tmp.i6 = icmp eq i32 %tmp27.i, 0 ; <i1> [#uses=0]
+ ret void
+
+bb46.i: ; preds = %cond_false12.i.i, %cond_true4.i.i
+ %tmp48.i = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp48.i, label %cond_true49.i, label %cond_next53.i
+
+cond_true49.i: ; preds = %bb46.i
+ store i32 0, i32* @bufftop
+ %tmp50.i = load i8** @membuff ; <i8*> [#uses=1]
+ free i8* %tmp50.i
+ free i8* %tmp2.i3
+ ret void
+
+cond_next53.i: ; preds = %bb46.i
+ store i32 1, i32* @nodecount
+ store i32 0, i32* @iters
+ store i32 0, i32* @maxply
+ store i32 0, i32* @forwards
+ %tmp54.i = load i32* @move_number ; <i32> [#uses=1]
+ %tmp55.i = load i32* @ply ; <i32> [#uses=1]
+ %tmp56.i = add i32 %tmp54.i, -1 ; <i32> [#uses=1]
+ %tmp57.i = add i32 %tmp56.i, %tmp55.i ; <i32> [#uses=1]
+ %tmp58.i = load i32* @hash ; <i32> [#uses=1]
+ %tmp.i.upgrd.186 = getelementptr [600 x i32]* @hash_history, i32 0, i32 %tmp57.i ; <i32*> [#uses=1]
+ store i32 %tmp58.i, i32* %tmp.i.upgrd.186
+ %tmp59.i = load i32* @white_to_move ; <i32> [#uses=1]
+ %tmp60.i = icmp eq i32 %tmp59.i, 0 ; <i1> [#uses=1]
+ %tmp60.i.upgrd.187 = zext i1 %tmp60.i to i32 ; <i32> [#uses=1]
+ store i32 %tmp60.i.upgrd.187, i32* @root_to_move
+ %tmp.i4.i = load i32* @Variant ; <i32> [#uses=2]
+ %tmp.i5.i = icmp eq i32 %tmp.i4.i, 3 ; <i1> [#uses=1]
+ br i1 %tmp.i5.i, label %cond_true.i.i, label %cond_false.i.i
+
+cond_true.i.i: ; preds = %cond_next53.i
+ call fastcc void @suicide_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 )
+ %tmp6328.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp29.i = load i8* %tmp6328.i ; <i8> [#uses=1]
+ %tmp6430.i = icmp eq i8 %tmp29.i, 1 ; <i1> [#uses=0]
+ ret void
+
+cond_false.i.i: ; preds = %cond_next53.i
+ %tmp2.i.i.upgrd.188 = icmp eq i32 %tmp.i4.i, 4 ; <i1> [#uses=1]
+ %tmp63.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=2]
+ br i1 %tmp2.i.i.upgrd.188, label %cond_true3.i.i, label %cond_false5.i.i
+
+cond_true3.i.i: ; preds = %cond_false.i.i
+ call fastcc void @losers_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 )
+ %tmp31.i = load i8* %tmp63.i ; <i8> [#uses=1]
+ %tmp6432.i = icmp eq i8 %tmp31.i, 1 ; <i1> [#uses=1]
+ br i1 %tmp6432.i, label %bb75.i, label %cond_next67.i
+
+cond_false5.i.i: ; preds = %cond_false.i.i
+ call fastcc void @std_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 )
+ %tmp.i.upgrd.189 = load i8* %tmp63.i ; <i8> [#uses=1]
+ %tmp64.i = icmp eq i8 %tmp.i.upgrd.189, 1 ; <i1> [#uses=0]
+ ret void
+
+cond_next67.i: ; preds = %cond_true3.i.i
+ %tmp69.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp70.i = load i8* %tmp69.i ; <i8> [#uses=1]
+ %tmp71.i = icmp eq i8 %tmp70.i, 0 ; <i1> [#uses=0]
+ ret void
+
+bb75.i: ; preds = %cond_true3.i.i
+ store i32 0, i32* @bufftop
+ %tmp76.i = load i8** @membuff ; <i8*> [#uses=1]
+ free i8* %tmp76.i
+ free i8* %tmp2.i3
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5)
+ %tmp28869 = load i32* @result ; <i32> [#uses=1]
+ %tmp28970 = icmp eq i32 %tmp28869, 0 ; <i1> [#uses=1]
+ br i1 %tmp28970, label %cond_next337, label %cond_true290
+
+bb263: ; preds = %bb249, %cond_next238, %cond_true226.critedge
+ br i1 %tmp21362, label %cond_true266, label %bb287
+
+cond_true266: ; preds = %bb263
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4)
+ store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5)
+ %tmp28871 = load i32* @result ; <i32> [#uses=1]
+ %tmp28972 = icmp eq i32 %tmp28871, 0 ; <i1> [#uses=0]
+ ret void
+
+bb287.critedge: ; preds = %cond_false210
+ %tmp218.c = fdiv double 1.999998e+06, %tmp217 ; <double> [#uses=1]
+ %tmp218.c.upgrd.190 = fptosi double %tmp218.c to i32 ; <i32> [#uses=2]
+ store i32 %tmp218.c.upgrd.190, i32* @time_for_move
+ %tmp22367.c = call i32 (i8*, ...)* @printf( i8* getelementptr ([20 x i8]* @str43, i32 0, i64 0), i32 %tmp218.c.upgrd.190 ) ; <i32> [#uses=0]
+ ret void
+
+bb287: ; preds = %bb263
+ %tmp288 = load i32* @result ; <i32> [#uses=1]
+ %tmp289 = icmp eq i32 %tmp288, 0 ; <i1> [#uses=0]
+ ret void
+
+cond_true290: ; preds = %bb75.i
+ %tmp292 = load i32* getelementptr (%struct.move_s* @pn_move, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp295 = icmp eq i32 %tmp292, 0 ; <i1> [#uses=0]
+ ret void
+
+cond_next337: ; preds = %bb75.i
+ %tmp338.b = load i1* @forcedwin.b ; <i1> [#uses=1]
+ br i1 %tmp338.b, label %bb348, label %cond_next342
+
+cond_next342: ; preds = %cond_next337
+ %tmp343 = load i32* @result ; <i32> [#uses=1]
+ %tmp344 = icmp eq i32 %tmp343, 0 ; <i1> [#uses=0]
+ ret void
+
+bb348: ; preds = %cond_next337
+ %tmp350 = load i32* getelementptr (%struct.move_s* @pn_move, i32 0, i32 1) ; <i32> [#uses=1]
+ %tmp353 = icmp eq i32 %tmp350, 0 ; <i1> [#uses=0]
+ ret void
+}
+
+declare fastcc i32 @eval(i32, i32)
+
+declare i8* @fgets(i8*, i32, %struct.FILE*)
+
+declare i32 @fclose(%struct.FILE*)
+
+declare fastcc i32 @losers_eval()
+
+declare fastcc i32 @l_bishop_mobility(i32)
+
+declare fastcc i32 @l_rook_mobility(i32)
+
+declare fastcc i32 @check_legal(%struct.move_s*, i32, i32)
+
+declare fastcc void @gen(%struct.move_s*)
+
+declare fastcc void @push_pawn(i32, i32)
+
+declare fastcc void @push_knighT(i32)
+
+declare fastcc void @push_slidE(i32)
+
+declare fastcc void @push_king(i32)
+
+declare fastcc i32 @f_in_check(%struct.move_s*, i32)
+
+declare fastcc void @make(%struct.move_s*, i32)
+
+declare fastcc void @add_capture(i32, i32, i32)
+
+declare fastcc void @unmake(%struct.move_s*, i32)
+
+declare i32 @ErrorIt(i32, i32)
+
+declare i32 @Pawn(i32, i32)
+
+declare i32 @Knight(i32, i32)
+
+declare i32 @King(i32, i32)
+
+declare i32 @Rook(i32, i32)
+
+declare i32 @Queen(i32, i32)
+
+declare i32 @Bishop(i32, i32)
+
+declare fastcc void @check_phase()
+
+declare fastcc i32 @bishop_mobility(i32)
+
+declare fastcc i32 @rook_mobility(i32)
+
+declare i32 @sscanf(i8*, i8*, ...)
+
+declare i32 @strncmp(i8*, i8*, i32)
+
+declare i8* @strchr(i8*, i32)
+
+declare fastcc void @CheckBadFlow(i32)
+
+declare fastcc void @suicide_pn_eval(%struct.node_t*)
+
+declare fastcc void @losers_pn_eval(%struct.node_t*)
+
+declare fastcc void @std_pn_eval(%struct.node_t*)
+
+declare fastcc %struct.node_t* @select_most_proving(%struct.node_t*)
+
+declare fastcc void @set_proof_and_disproof_numbers(%struct.node_t*)
+
+declare fastcc void @StoreTT(i32, i32, i32, i32, i32, i32)
+
+declare fastcc void @develop_node(%struct.node_t*)
+
+declare fastcc void @update_ancestors(%struct.node_t*)
+
+declare i8* @calloc(i32, i32)
+
+declare fastcc void @comp_to_coord(i64, i64, i64, i8*)
+
+declare i8* @strcat(i8*, i8*)
+
+declare i32 @sprintf(i8*, i8*, ...)
+
+declare fastcc void @order_moves(%struct.move_s*, i32*, i32*, i32, i32)
+
+declare fastcc i32 @see(i32, i32, i32)
+
+declare fastcc void @perft(i32)
+
+declare fastcc i32 @qsearch(i32, i32, i32)
+
+declare fastcc i32 @allocate_time()
+
+declare fastcc void @QStoreTT(i32, i32, i32, i32)
+
+declare fastcc i32 @search(i32, i32, i32, i32)
+
+declare fastcc i32 @ProbeTT(i32*, i32, i32*, i32*, i32*, i32)
+
+declare void @search_root(%struct.move_s* sret , i32, i32, i32)
+
+declare fastcc void @post_fh_thinking(i32, %struct.move_s*)
+
+declare fastcc void @post_thinking(i32)
+
+declare i32 @fprintf(%struct.FILE*, i8*, ...)
+
+declare fastcc i32 @s_bishop_mobility(i32)
+
+declare fastcc i32 @s_rook_mobility(i32)
+
+declare fastcc i32 @suicide_mid_eval()
+
+declare i32 @main(i32, i8**)
+
+declare fastcc void @init_game()
+
+declare void @setbuf(%struct.FILE*, i8*)
+
+declare i8* @strcpy(i8*, i8*)
+
+declare i32 @__tolower(i32)
+
+declare i32 @strcmp(i8*, i8*)
+
+declare void (i32)* @signal(i32, void (i32)*)
+
+declare fastcc void @hash_extract_pv(i32, i8*)
+
+declare double @difftime(i32, i32)
+
+declare i32 @getc(%struct.FILE*)
+
+declare i32 @strlen(i8*)
+
+declare i32 @fwrite(i8*, i32, i32, %struct.FILE*)
diff --git a/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll b/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll
new file mode 100644
index 0000000..9fcbf07
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -dse -S | not grep tmp5
+; PR2599
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+define void @foo({ i32, i32 }* %x) nounwind {
+entry:
+ %tmp4 = getelementptr { i32, i32 }* %x, i32 0, i32 0 ; <i32*> [#uses=2]
+ %tmp5 = load i32* %tmp4, align 4 ; <i32> [#uses=1]
+ %tmp7 = getelementptr { i32, i32 }* %x, i32 0, i32 1 ; <i32*> [#uses=2]
+ %tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1]
+ %tmp17 = sub i32 0, %tmp8 ; <i32> [#uses=1]
+ store i32 %tmp5, i32* %tmp4, align 4
+ store i32 %tmp17, i32* %tmp7, align 4
+ ret void
+}
diff --git a/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll b/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll
new file mode 100644
index 0000000..5958c6c
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -dse | llvm-dis
+; PR3141
+ %struct.ada__tags__dispatch_table = type { [1 x i32] }
+ %struct.f393a00_1__object = type { %struct.ada__tags__dispatch_table*, i8 }
+ %struct.f393a00_2__windmill = type { %struct.f393a00_1__object, i16 }
+
+define void @f393a00_2__swap(%struct.f393a00_2__windmill* %a, %struct.f393a00_2__windmill* %b) {
+entry:
+ %t = alloca %struct.f393a00_2__windmill ; <%struct.f393a00_2__windmill*> [#uses=1]
+ %0 = getelementptr %struct.f393a00_2__windmill* %t, i32 0, i32 0, i32 0 ; <%struct.ada__tags__dispatch_table**> [#uses=1]
+ %1 = load %struct.ada__tags__dispatch_table** null, align 4 ; <%struct.ada__tags__dispatch_table*> [#uses=1]
+ %2 = load %struct.ada__tags__dispatch_table** %0, align 8 ; <%struct.ada__tags__dispatch_table*> [#uses=1]
+ store %struct.ada__tags__dispatch_table* %2, %struct.ada__tags__dispatch_table** null, align 4
+ store %struct.ada__tags__dispatch_table* %1, %struct.ada__tags__dispatch_table** null, align 4
+ ret void
+}
diff --git a/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll b/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll
new file mode 100644
index 0000000..c320a3e
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -dse | llvm-dis
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ %struct.cab_archive = type { i32, i16, i16, i16, i16, i8, %struct.cab_folder*, %struct.cab_file* }
+ %struct.cab_file = type { i32, i16, i64, i8*, i32, i32, i32, %struct.cab_folder*, %struct.cab_file*, %struct.cab_archive*, %struct.cab_state* }
+ %struct.cab_folder = type { i16, i16, %struct.cab_archive*, i64, %struct.cab_folder* }
+ %struct.cab_state = type { i8*, i8*, [38912 x i8], i16, i16, i8*, i16 }
+ %struct.lzx_stream = type { i32, i32, i8, i64, i64, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, [84 x i8], [720 x i8], [314 x i8], [72 x i8], [104 x i16], [5408 x i16], [4596 x i16], [144 x i16], [51 x i32], [51 x i8], [32768 x i8], %struct.cab_file*, i32 (%struct.cab_file*, i8*, i32)* }
+
+declare fastcc i32 @lzx_read_lens(%struct.lzx_stream*, i8*, i32, i32) nounwind
+
+define i32 @lzx_decompress(%struct.lzx_stream* %lzx, i64 %out_bytes) nounwind {
+bb13: ; preds = %entry
+ %0 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 25 ; <i8**> [#uses=2]
+ %1 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 26 ; <i8**> [#uses=2]
+ %2 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 29 ; <i32*> [#uses=0]
+ br label %bb14
+
+bb14: ; preds = %bb13
+ %3 = load i8** %0, align 4 ; <i8*> [#uses=1]
+ %4 = load i8** %1, align 4 ; <i8*> [#uses=1]
+ store i8* %3, i8** %0, align 4
+ store i8* %4, i8** %1, align 4
+ %5 = call fastcc i32 @lzx_read_lens(%struct.lzx_stream* %lzx, i8* null, i32 256, i32 0) nounwind ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll b/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll
new file mode 100644
index 0000000..9a943b4
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll
@@ -0,0 +1,16 @@
+; RUN: opt -S -dse < %s | FileCheck %s
+
+declare i8* @llvm.init.trampoline(i8*, i8*, i8*)
+
+declare void @f()
+
+define void @unused_trampoline() {
+; CHECK: @unused_trampoline
+ %storage = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1]
+; CHECK-NOT: alloca
+ %cast = getelementptr [10 x i8]* %storage, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tramp = call i8* @llvm.init.trampoline( i8* %cast, i8* bitcast (void ()* @f to i8*), i8* null ) ; <i8*> [#uses=1]
+; CHECK-NOT: trampoline
+ ret void
+; CHECK: ret void
+}
diff --git a/test/Transforms/DeadStoreElimination/PartialStore.ll b/test/Transforms/DeadStoreElimination/PartialStore.ll
new file mode 100644
index 0000000..ab1edf5b4
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/PartialStore.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -dse -S | \
+; RUN: not grep {store i8}
+; Ensure that the dead store is deleted in this case. It is wholely
+; overwritten by the second store.
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+define i32 @test() {
+ %V = alloca i32 ; <i32*> [#uses=3]
+ %V2 = bitcast i32* %V to i8* ; <i8*> [#uses=1]
+ store i8 0, i8* %V2
+ store i32 1234567, i32* %V
+ %X = load i32* %V ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/DeadStoreElimination/alloca.ll b/test/Transforms/DeadStoreElimination/alloca.ll
new file mode 100644
index 0000000..b6818eb
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/alloca.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -dse -S | not grep DEAD
+
+define void @test(i32* %Q) {
+ %P = alloca i32 ; <i32*> [#uses=1]
+ %DEAD = load i32* %Q ; <i32> [#uses=1]
+ store i32 %DEAD, i32* %P
+ ret void
+}
+
diff --git a/test/Transforms/DeadStoreElimination/byval.ll b/test/Transforms/DeadStoreElimination/byval.ll
new file mode 100644
index 0000000..fa651b1
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/byval.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -dse -S | not grep store
+
+%struct.x = type { i32, i32, i32, i32 }
+
+define i32 @foo(%struct.x* byval %a) nounwind {
+entry:
+ %tmp2 = getelementptr %struct.x* %a, i32 0, i32 0
+ store i32 1, i32* %tmp2, align 4
+ ret i32 1
+}
diff --git a/test/Transforms/DeadStoreElimination/const-pointers.ll b/test/Transforms/DeadStoreElimination/const-pointers.ll
new file mode 100644
index 0000000..728a118
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/const-pointers.ll
@@ -0,0 +1,39 @@
+; RUN: opt %s -dse -S | FileCheck %s
+
+%t = type { i32 }
+
+@g = global i32 42
+
+define void @test1(%t* noalias %pp) {
+ %p = getelementptr inbounds %t* %pp, i32 0, i32 0
+
+ store i32 1, i32* %p; <-- This is dead
+ %x = load i32* inttoptr (i32 12345 to i32*)
+ store i32 %x, i32* %p
+ ret void
+; CHECK: define void @test1
+; CHECK: store
+; CHECK-NOT: store
+; CHECK: ret void
+}
+
+define void @test3() {
+ store i32 1, i32* @g; <-- This is dead.
+ store i32 42, i32* @g
+ ret void
+; CHECK: define void @test3
+; CHECK: store
+; CHECK-NOT: store
+; CHECK: ret void
+}
+
+define void @test4(i32* %p) {
+ store i32 1, i32* %p
+ %x = load i32* @g; <-- %p and @g could alias
+ store i32 %x, i32* %p
+ ret void
+; CHECK: define void @test4
+; CHECK: store
+; CHECK: store
+; CHECK: ret void
+}
diff --git a/test/Transforms/DeadStoreElimination/context-sensitive.ll b/test/Transforms/DeadStoreElimination/context-sensitive.ll
new file mode 100644
index 0000000..7954310
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/context-sensitive.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -dse -S | not grep DEAD
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+declare void @ext()
+
+define i32* @caller() {
+ %P = malloc i32 ; <i32*> [#uses=4]
+ %DEAD = load i32* %P ; <i32> [#uses=1]
+ %DEAD2 = add i32 %DEAD, 1 ; <i32> [#uses=1]
+ store i32 %DEAD2, i32* %P
+ call void @ext( )
+ store i32 0, i32* %P
+ ret i32* %P
+}
+
diff --git a/test/Transforms/DeadStoreElimination/crash.ll b/test/Transforms/DeadStoreElimination/crash.ll
new file mode 100644
index 0000000..f89f8f5
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/crash.ll
@@ -0,0 +1,43 @@
+; RUN: opt < %s -dse -S
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+
+@g80 = external global i8 ; <i8*> [#uses=3]
+
+declare signext i8 @foo(i8 signext, i8 signext) nounwind readnone ssp
+
+declare i32 @func68(i32) nounwind readonly ssp
+
+; PR4815
+define void @test1(i32 %int32p54) noreturn nounwind ssp {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %storemerge = phi i8 [ %2, %bb ], [ 1, %entry ] ; <i8> [#uses=1]
+ store i8 %storemerge, i8* @g80
+ %0 = tail call i32 @func68(i32 1) nounwind ssp ; <i32> [#uses=1]
+ %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
+ store i8 %1, i8* @g80, align 1
+ store i8 undef, i8* @g80, align 1
+ %2 = tail call signext i8 @foo(i8 signext undef, i8 signext 1) nounwind ; <i8> [#uses=1]
+ br label %bb
+}
+
+define fastcc i32 @test2() nounwind ssp {
+bb14: ; preds = %bb4
+ %0 = bitcast i8* undef to i8** ; <i8**> [#uses=1]
+ %1 = getelementptr inbounds i8** %0, i64 undef ; <i8**> [#uses=1]
+ %2 = bitcast i8** %1 to i16* ; <i16*> [#uses=2]
+ %3 = getelementptr inbounds i16* %2, i64 undef ; <i16*> [#uses=1]
+ %4 = bitcast i16* %3 to i8* ; <i8*> [#uses=1]
+ %5 = getelementptr inbounds i8* %4, i64 undef ; <i8*> [#uses=1]
+ %6 = getelementptr inbounds i16* %2, i64 undef ; <i16*> [#uses=1]
+ store i16 undef, i16* %6, align 2
+ %7 = getelementptr inbounds i8* %5, i64 undef ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i64(i8* %7, i8* undef, i64 undef, i32 1) nounwind
+ unreachable
+}
+
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
diff --git a/test/Transforms/DeadStoreElimination/dg.exp b/test/Transforms/DeadStoreElimination/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/DeadStoreElimination/free.ll b/test/Transforms/DeadStoreElimination/free.ll
new file mode 100644
index 0000000..8b81ee3
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/free.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -dse -S | not grep DEAD
+
+define void @test(i32* %Q, i32* %P) {
+ %DEAD = load i32* %Q ; <i32> [#uses=1]
+ store i32 %DEAD, i32* %P
+ free i32* %P
+ ret void
+}
+
+define void @test2({i32, i32}* %P) {
+ %Q = getelementptr {i32, i32} *%P, i32 0, i32 1
+ store i32 4, i32* %Q
+ free {i32,i32}* %P
+ ret void
+}
diff --git a/test/Transforms/DeadStoreElimination/lifetime.ll b/test/Transforms/DeadStoreElimination/lifetime.ll
new file mode 100644
index 0000000..fd127d9
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/lifetime.ll
@@ -0,0 +1,37 @@
+; RUN: opt -S -dse < %s | FileCheck %s
+
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
+declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
+declare void @llvm.memset.i8(i8*, i8, i8, i32)
+
+define void @test1() {
+; CHECK: @test1
+ %A = alloca i8
+
+ store i8 0, i8* %A ;; Written to by memset
+ call void @llvm.lifetime.end(i64 1, i8* %A)
+; CHECK: lifetime.end
+
+ call void @llvm.memset.i8(i8* %A, i8 0, i8 -1, i32 0)
+; CHECK-NOT: memset
+
+ ret void
+; CHECK: ret void
+}
+
+define void @test2(i32* %P) {
+; CHECK: test2
+ %Q = getelementptr i32* %P, i32 1
+ %R = bitcast i32* %Q to i8*
+ call void @llvm.lifetime.start(i64 4, i8* %R)
+; CHECK: lifetime.start
+ store i32 0, i32* %Q ;; This store is dead.
+; CHECK-NOT: store
+ call void @llvm.lifetime.end(i64 4, i8* %R)
+; CHECK: lifetime.end
+ ret void
+}
+
+
diff --git a/test/Transforms/DeadStoreElimination/memcpy.ll b/test/Transforms/DeadStoreElimination/memcpy.ll
new file mode 100644
index 0000000..8d99631
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/memcpy.ll
@@ -0,0 +1,52 @@
+; RUN: opt < %s -dse -S | not grep alloca
+; ModuleID = 'placeholder.adb'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.placeholder__T5b = type { i32, [1 x i32] }
+ %struct.placeholder__an_interval___PAD = type { %struct.placeholder__interval, [4 x i32] }
+ %struct.placeholder__interval = type { i32, i32 }
+ %struct.placeholder__s__s__the_interval___PAD = type { %struct.placeholder__interval }
+
+define void @_ada_placeholder() nounwind {
+entry:
+ %an_interval = alloca %struct.placeholder__an_interval___PAD ; <%struct.placeholder__an_interval___PAD*> [#uses=3]
+ %tmp34 = bitcast %struct.placeholder__an_interval___PAD* %an_interval to %struct.placeholder__T5b* ; <%struct.placeholder__T5b*> [#uses=1]
+ %tmp5 = getelementptr %struct.placeholder__an_interval___PAD* %an_interval, i32 0, i32 0, i32 0 ; <i32*> [#uses=2]
+ store i32 1, i32* %tmp5, align 8
+ %tmp10 = getelementptr %struct.placeholder__T5b* %tmp34, i32 0, i32 1, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp10, align 4
+ %tmp82 = load i32* %tmp5, align 8 ; <i32> [#uses=5]
+ %tmp83 = icmp slt i32 %tmp82, 6 ; <i1> [#uses=1]
+ %min84 = select i1 %tmp83, i32 %tmp82, i32 5 ; <i32> [#uses=3]
+ %tmp85 = icmp sgt i32 %min84, -1 ; <i1> [#uses=2]
+ %min84.cast193 = zext i32 %min84 to i64 ; <i64> [#uses=1]
+ %min84.cast193.op = shl i64 %min84.cast193, 33 ; <i64> [#uses=1]
+ %tmp104 = icmp sgt i32 %tmp82, -1 ; <i1> [#uses=2]
+ %tmp103.cast192 = zext i32 %tmp82 to i64 ; <i64> [#uses=1]
+ %tmp103.cast192.op = shl i64 %tmp103.cast192, 33 ; <i64> [#uses=1]
+ %min84.cast193.op.op = ashr i64 %min84.cast193.op, 28 ; <i64> [#uses=1]
+ %sextr121 = select i1 %tmp85, i64 %min84.cast193.op.op, i64 0 ; <i64> [#uses=2]
+ %tmp103.cast192.op.op = ashr i64 %tmp103.cast192.op, 28 ; <i64> [#uses=1]
+ %sextr123 = select i1 %tmp104, i64 %tmp103.cast192.op.op, i64 0 ; <i64> [#uses=2]
+ %tmp124 = icmp sle i64 %sextr121, %sextr123 ; <i1> [#uses=1]
+ %min125 = select i1 %tmp124, i64 %sextr121, i64 %sextr123 ; <i64> [#uses=1]
+ %sextr131194 = and i64 %min125, 34359738336 ; <i64> [#uses=1]
+ %tmp134 = add i64 %sextr131194, 63 ; <i64> [#uses=1]
+ lshr i64 %tmp134, 3 ; <i64>:0 [#uses=1]
+ %tmp150188.shrunk = trunc i64 %0 to i32 ; <i32> [#uses=1]
+ %tmp159 = and i32 %tmp150188.shrunk, -4 ; <i32> [#uses=1]
+ %tmp161 = alloca i8, i32 %tmp159 ; <i8*> [#uses=1]
+ %min167.op = shl i32 %min84, 2 ; <i32> [#uses=1]
+ %tmp170 = select i1 %tmp85, i32 %min167.op, i32 0 ; <i32> [#uses=2]
+ %tmp173.op = shl i32 %tmp82, 2 ; <i32> [#uses=1]
+ %tmp176 = select i1 %tmp104, i32 %tmp173.op, i32 0 ; <i32> [#uses=2]
+ %tmp177 = icmp sle i32 %tmp170, %tmp176 ; <i1> [#uses=1]
+ %min178 = select i1 %tmp177, i32 %tmp170, i32 %tmp176 ; <i32> [#uses=1]
+ %tmp179 = add i32 %min178, 7 ; <i32> [#uses=1]
+ %tmp180 = and i32 %tmp179, -4 ; <i32> [#uses=1]
+ %tmp183185 = bitcast %struct.placeholder__an_interval___PAD* %an_interval to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp161, i8* %tmp183185, i32 %tmp180, i32 4 )
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/DeadStoreElimination/memintrinsics.ll b/test/Transforms/DeadStoreElimination/memintrinsics.ll
new file mode 100644
index 0000000..e31e9fa
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/memintrinsics.ll
@@ -0,0 +1,47 @@
+; RUN: opt -S -dse < %s | FileCheck %s
+
+declare void @llvm.memcpy.i8(i8*, i8*, i8, i32)
+declare void @llvm.memmove.i8(i8*, i8*, i8, i32)
+declare void @llvm.memset.i8(i8*, i8, i8, i32)
+
+define void @test1() {
+; CHECK: @test1
+ %A = alloca i8
+ %B = alloca i8
+
+ store i8 0, i8* %A ;; Written to by memcpy
+; CHECK-NOT: store
+
+ call void @llvm.memcpy.i8(i8* %A, i8* %B, i8 -1, i32 0)
+
+ ret void
+; CHECK: ret void
+}
+
+define void @test2() {
+; CHECK: @test2
+ %A = alloca i8
+ %B = alloca i8
+
+ store i8 0, i8* %A ;; Written to by memmove
+; CHECK-NOT: store
+
+ call void @llvm.memmove.i8(i8* %A, i8* %B, i8 -1, i32 0)
+
+ ret void
+; CHECK: ret void
+}
+
+define void @test3() {
+; CHECK: @test3
+ %A = alloca i8
+ %B = alloca i8
+
+ store i8 0, i8* %A ;; Written to by memset
+; CHECK-NOT: store
+
+ call void @llvm.memset.i8(i8* %A, i8 0, i8 -1, i32 0)
+
+ ret void
+; CHECK: ret void
+}
diff --git a/test/Transforms/DeadStoreElimination/no-targetdata.ll b/test/Transforms/DeadStoreElimination/no-targetdata.ll
new file mode 100644
index 0000000..7e8f52a
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/no-targetdata.ll
@@ -0,0 +1,15 @@
+; RUN: opt %s -dse -S | FileCheck %s
+
+declare void @test1f()
+
+define void @test1(i32* noalias %p) {
+ store i32 1, i32* %p
+ call void @test1f()
+ store i32 2, i32 *%p
+ ret void
+; CHECK: define void @test1
+; CHECK-NOT: store
+; CHECK-NEXT: call void
+; CHECK-NEXT: store i32 2
+; CHECK-NEXT: ret void
+}
diff --git a/test/Transforms/DeadStoreElimination/partial-overwrite.ll b/test/Transforms/DeadStoreElimination/partial-overwrite.ll
new file mode 100644
index 0000000..048d464
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/partial-overwrite.ll
@@ -0,0 +1,14 @@
+; RUN: opt -dse -S %s | FileCheck %s
+; Note that we could do better by merging the two stores into one.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @test(i32* %P) {
+ store i32 0, i32* %P
+; CHECK: store i32
+ %Q = bitcast i32* %P to i16*
+ store i16 1, i16* %Q
+; CHECK: store i16
+ ret void
+}
diff --git a/test/Transforms/DeadStoreElimination/simple.ll b/test/Transforms/DeadStoreElimination/simple.ll
new file mode 100644
index 0000000..d859640
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/simple.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -dse -S | not grep DEAD
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+define void @test(i32* %Q, i32* %P) {
+ %DEAD = load i32* %Q ; <i32> [#uses=1]
+ store i32 %DEAD, i32* %P
+ store i32 0, i32* %P
+ ret void
+}
+
diff --git a/test/Transforms/DeadStoreElimination/volatile-load.ll b/test/Transforms/DeadStoreElimination/volatile-load.ll
new file mode 100644
index 0000000..59a1129
--- /dev/null
+++ b/test/Transforms/DeadStoreElimination/volatile-load.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -dse -S | grep {volatile load}
+
+@g_1 = global i32 0
+
+define void @foo() nounwind {
+ %t = volatile load i32* @g_1
+ ret void
+}
diff --git a/test/Transforms/FunctionAttrs/2008-09-03-Mutual.ll b/test/Transforms/FunctionAttrs/2008-09-03-Mutual.ll
new file mode 100644
index 0000000..b0aecfa
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2008-09-03-Mutual.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -functionattrs -S | grep readnone
+
+define i32 @a() {
+ %tmp = call i32 @b( ) ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @b() {
+ %tmp = call i32 @a( ) ; <i32> [#uses=1]
+ ret i32 %tmp
+}
diff --git a/test/Transforms/FunctionAttrs/2008-09-03-ReadNone.ll b/test/Transforms/FunctionAttrs/2008-09-03-ReadNone.ll
new file mode 100644
index 0000000..535a1d0
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2008-09-03-ReadNone.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -functionattrs -S | grep readnone | count 4
+@x = global i32 0
+
+declare i32 @e() readnone
+
+define i32 @f() {
+ %tmp = call i32 @e( ) ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @g() readonly {
+ ret i32 0
+}
+
+define i32 @h() readnone {
+ %tmp = load i32* @x ; <i32> [#uses=1]
+ ret i32 %tmp
+}
diff --git a/test/Transforms/FunctionAttrs/2008-09-03-ReadOnly.ll b/test/Transforms/FunctionAttrs/2008-09-03-ReadOnly.ll
new file mode 100644
index 0000000..b455fdd
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2008-09-03-ReadOnly.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -functionattrs -S | grep readonly | count 2
+
+define i32 @f() {
+entry:
+ %tmp = call i32 @e( ) ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+declare i32 @e() readonly
diff --git a/test/Transforms/FunctionAttrs/2008-09-13-VolatileRead.ll b/test/Transforms/FunctionAttrs/2008-09-13-VolatileRead.ll
new file mode 100644
index 0000000..85df09e
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2008-09-13-VolatileRead.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -functionattrs -S | not grep read
+; PR2792
+
+@g = global i32 0 ; <i32*> [#uses=1]
+
+define i32 @f() {
+ %t = volatile load i32* @g ; <i32> [#uses=1]
+ ret i32 %t
+}
diff --git a/test/Transforms/FunctionAttrs/2008-10-04-LocalMemory.ll b/test/Transforms/FunctionAttrs/2008-10-04-LocalMemory.ll
new file mode 100644
index 0000000..c6c2e13
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2008-10-04-LocalMemory.ll
@@ -0,0 +1,64 @@
+; RUN: opt < %s -functionattrs -S | FileCheck %s
+
+%struct.X = type { i32*, i32* }
+
+declare i32 @g(i32*) readnone
+
+define i32 @f() {
+; CHECK: @f() readnone
+ %x = alloca i32 ; <i32*> [#uses=2]
+ store i32 0, i32* %x
+ %y = call i32 @g(i32* %x) ; <i32> [#uses=1]
+ ret i32 %y
+}
+
+define i32 @foo() nounwind {
+; CHECK: @foo() nounwind readonly
+entry:
+ %y = alloca %struct.X ; <%struct.X*> [#uses=2]
+ %x = alloca %struct.X ; <%struct.X*> [#uses=2]
+ %j = alloca i32 ; <i32*> [#uses=2]
+ %i = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 0, i32* %i, align 4
+ store i32 1, i32* %j, align 4
+ %0 = getelementptr inbounds %struct.X* %y, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %i, i32** %0, align 8
+ %1 = getelementptr inbounds %struct.X* %x, i32 0, i32 1 ; <i32**> [#uses=1]
+ store i32* %j, i32** %1, align 8
+ %x1 = bitcast %struct.X* %x to i8* ; <i8*> [#uses=2]
+ %y2 = bitcast %struct.X* %y to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i64(i8* %x1, i8* %y2, i64 8, i32 1)
+ %2 = bitcast i8* %x1 to i32** ; <i32**> [#uses=1]
+ %3 = load i32** %2, align 8 ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 4 ; <i32> [#uses=1]
+ br label %return
+
+return: ; preds = %entry
+ ret i32 %4
+}
+
+define i32 @t(i32 %a, i32 %b, i32 %c) nounwind {
+; CHECK: @t(i32 %a, i32 %b, i32 %c) nounwind readnone
+entry:
+ %a.addr = alloca i32 ; <i32*> [#uses=3]
+ %c.addr = alloca i32 ; <i32*> [#uses=2]
+ store i32 %a, i32* %a.addr
+ store i32 %c, i32* %c.addr
+ %tmp = load i32* %a.addr ; <i32> [#uses=1]
+ %tobool = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %if.then, label %if.else
+
+if.then: ; preds = %entry
+ br label %if.end
+
+if.else: ; preds = %entry
+ br label %if.end
+
+if.end: ; preds = %if.else, %if.then
+ %p.0 = phi i32* [ %a.addr, %if.then ], [ %c.addr, %if.else ] ; <i32*> [#uses=1]
+ %tmp2 = load i32* %p.0 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
diff --git a/test/Transforms/FunctionAttrs/2008-12-29-Constant.ll b/test/Transforms/FunctionAttrs/2008-12-29-Constant.ll
new file mode 100644
index 0000000..672b5e1
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2008-12-29-Constant.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -functionattrs -S | grep readnone
+
+@s = external constant i8 ; <i8*> [#uses=1]
+
+define i8 @f() {
+ %tmp = load i8* @s ; <i8> [#uses=1]
+ ret i8 %tmp
+}
diff --git a/test/Transforms/FunctionAttrs/2008-12-31-NoCapture.ll b/test/Transforms/FunctionAttrs/2008-12-31-NoCapture.ll
new file mode 100644
index 0000000..53857f6
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2008-12-31-NoCapture.ll
@@ -0,0 +1,101 @@
+; RUN: opt < %s -functionattrs -S | not grep {nocapture *%%q}
+; RUN: opt < %s -functionattrs -S | grep {nocapture *%%p} | count 6
+@g = global i32* null ; <i32**> [#uses=1]
+
+define i32* @c1(i32* %q) {
+ ret i32* %q
+}
+
+define void @c2(i32* %q) {
+ store i32* %q, i32** @g
+ ret void
+}
+
+define void @c3(i32* %q) {
+ call void @c2(i32* %q)
+ ret void
+}
+
+define i1 @c4(i32* %q, i32 %bitno) {
+ %tmp = ptrtoint i32* %q to i32
+ %tmp2 = lshr i32 %tmp, %bitno
+ %bit = trunc i32 %tmp2 to i1
+ br i1 %bit, label %l1, label %l0
+l0:
+ ret i1 0 ; escaping value not caught by def-use chaining.
+l1:
+ ret i1 1 ; escaping value not caught by def-use chaining.
+}
+
+@lookup_table = global [2 x i1] [ i1 0, i1 1 ]
+
+define i1 @c5(i32* %q, i32 %bitno) {
+ %tmp = ptrtoint i32* %q to i32
+ %tmp2 = lshr i32 %tmp, %bitno
+ %bit = and i32 %tmp2, 1
+ ; subtle escape mechanism follows
+ %lookup = getelementptr [2 x i1]* @lookup_table, i32 0, i32 %bit
+ %val = load i1* %lookup
+ ret i1 %val
+}
+
+declare void @throw_if_bit_set(i8*, i8) readonly
+define i1 @c6(i8* %q, i8 %bit) {
+ invoke void @throw_if_bit_set(i8* %q, i8 %bit)
+ to label %ret0 unwind label %ret1
+ret0:
+ ret i1 0
+ret1:
+ ret i1 1
+}
+
+define i1* @lookup_bit(i32* %q, i32 %bitno) readnone nounwind {
+ %tmp = ptrtoint i32* %q to i32
+ %tmp2 = lshr i32 %tmp, %bitno
+ %bit = and i32 %tmp2, 1
+ %lookup = getelementptr [2 x i1]* @lookup_table, i32 0, i32 %bit
+ ret i1* %lookup
+}
+
+define i1 @c7(i32* %q, i32 %bitno) {
+ %ptr = call i1* @lookup_bit(i32* %q, i32 %bitno)
+ %val = load i1* %ptr
+ ret i1 %val
+}
+
+
+define i32 @nc1(i32* %q, i32* %p, i1 %b) {
+e:
+ br label %l
+l:
+ %x = phi i32* [ %p, %e ]
+ %y = phi i32* [ %q, %e ]
+ %tmp = bitcast i32* %x to i32* ; <i32*> [#uses=2]
+ %tmp2 = select i1 %b, i32* %tmp, i32* %y
+ %val = load i32* %tmp2 ; <i32> [#uses=1]
+ store i32 0, i32* %tmp
+ store i32* %y, i32** @g
+ ret i32 %val
+}
+
+define void @nc2(i32* %p, i32* %q) {
+ %1 = call i32 @nc1(i32* %q, i32* %p, i1 0) ; <i32> [#uses=0]
+ ret void
+}
+
+define void @nc3(void ()* %p) {
+ call void %p()
+ ret void
+}
+
+declare void @external(i8*) readonly nounwind
+define void @nc4(i8* %p) {
+ call void @external(i8* %p)
+ ret void
+}
+
+define void @nc5(void (i8*)* %f, i8* %p) {
+ call void %f(i8* %p) readonly nounwind
+ call void %f(i8* nocapture %p)
+ ret void
+}
diff --git a/test/Transforms/FunctionAttrs/2009-01-02-LocalStores.ll b/test/Transforms/FunctionAttrs/2009-01-02-LocalStores.ll
new file mode 100644
index 0000000..7ef5f06f
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2009-01-02-LocalStores.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -functionattrs -S | not grep {nocapture *%%q}
+; RUN: opt < %s -functionattrs -S | grep {nocapture *%%p}
+
+define i32* @a(i32** %p) {
+ %tmp = load i32** %p
+ ret i32* %tmp
+}
+
+define i32* @b(i32 *%q) {
+ %mem = alloca i32*
+ store i32* %q, i32** %mem
+ %tmp = call i32* @a(i32** %mem)
+ ret i32* %tmp
+}
diff --git a/test/Transforms/FunctionAttrs/2009-05-06-Malloc.ll b/test/Transforms/FunctionAttrs/2009-05-06-Malloc.ll
new file mode 100644
index 0000000..488e6a9
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/2009-05-06-Malloc.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -functionattrs -S | not grep read
+; PR3754
+
+define i8* @m(i32 %size) {
+ %tmp = malloc i8, i32 %size ; <i8*> [#uses=1]
+ ret i8* %tmp
+}
diff --git a/test/Transforms/FunctionAttrs/dg.exp b/test/Transforms/FunctionAttrs/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/FunctionAttrs/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/GVN/2007-07-25-DominatedLoop.ll b/test/Transforms/GVN/2007-07-25-DominatedLoop.ll
new file mode 100644
index 0000000..ad580ce
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-25-DominatedLoop.ll
@@ -0,0 +1,86 @@
+; RUN: opt < %s -gvn | llvm-dis
+
+ %struct.PerlInterpreter = type { i8 }
+@PL_sv_count = external global i32 ; <i32*> [#uses=2]
+
+define void @perl_destruct(%struct.PerlInterpreter* %sv_interp) {
+entry:
+ br i1 false, label %cond_next25, label %cond_true16
+
+cond_true16: ; preds = %entry
+ ret void
+
+cond_next25: ; preds = %entry
+ br i1 false, label %cond_next33, label %cond_true32
+
+cond_true32: ; preds = %cond_next25
+ ret void
+
+cond_next33: ; preds = %cond_next25
+ br i1 false, label %cond_next61, label %cond_true.i46
+
+cond_true.i46: ; preds = %cond_next33
+ ret void
+
+cond_next61: ; preds = %cond_next33
+ br i1 false, label %cond_next69, label %cond_true66
+
+cond_true66: ; preds = %cond_next61
+ ret void
+
+cond_next69: ; preds = %cond_next61
+ br i1 false, label %Perl_safefree.exit52, label %cond_true.i50
+
+cond_true.i50: ; preds = %cond_next69
+ ret void
+
+Perl_safefree.exit52: ; preds = %cond_next69
+ br i1 false, label %cond_next80, label %cond_true77
+
+cond_true77: ; preds = %Perl_safefree.exit52
+ ret void
+
+cond_next80: ; preds = %Perl_safefree.exit52
+ br i1 false, label %Perl_safefree.exit56, label %cond_true.i54
+
+cond_true.i54: ; preds = %cond_next80
+ ret void
+
+Perl_safefree.exit56: ; preds = %cond_next80
+ br i1 false, label %Perl_safefree.exit60, label %cond_true.i58
+
+cond_true.i58: ; preds = %Perl_safefree.exit56
+ ret void
+
+Perl_safefree.exit60: ; preds = %Perl_safefree.exit56
+ br i1 false, label %Perl_safefree.exit64, label %cond_true.i62
+
+cond_true.i62: ; preds = %Perl_safefree.exit60
+ ret void
+
+Perl_safefree.exit64: ; preds = %Perl_safefree.exit60
+ br i1 false, label %Perl_safefree.exit68, label %cond_true.i66
+
+cond_true.i66: ; preds = %Perl_safefree.exit64
+ ret void
+
+Perl_safefree.exit68: ; preds = %Perl_safefree.exit64
+ br i1 false, label %cond_next150, label %cond_true23.i
+
+cond_true23.i: ; preds = %Perl_safefree.exit68
+ ret void
+
+cond_next150: ; preds = %Perl_safefree.exit68
+ %tmp16092 = load i32* @PL_sv_count, align 4 ; <i32> [#uses=0]
+ br label %cond_next165
+
+bb157: ; preds = %cond_next165
+ %tmp158 = load i32* @PL_sv_count, align 4 ; <i32> [#uses=0]
+ br label %cond_next165
+
+cond_next165: ; preds = %bb157, %cond_next150
+ br i1 false, label %bb171, label %bb157
+
+bb171: ; preds = %cond_next165
+ ret void
+}
diff --git a/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll b/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll
new file mode 100644
index 0000000..2e0a101
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -gvn -S | not grep {tmp10 =}
+
+ %struct.INT2 = type { i32, i32 }
+@blkshifts = external global %struct.INT2* ; <%struct.INT2**> [#uses=2]
+
+define i32 @xcompact() {
+entry:
+ store %struct.INT2* null, %struct.INT2** @blkshifts, align 4
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %tmp10 = load %struct.INT2** @blkshifts, align 4 ; <%struct.INT2*> [#uses=0]
+ br label %bb
+}
diff --git a/test/Transforms/GVN/2007-07-25-Loop.ll b/test/Transforms/GVN/2007-07-25-Loop.ll
new file mode 100644
index 0000000..6a9f58e
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-25-Loop.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -gvn | llvm-dis
+
+ %struct.s_segment_inf = type { float, i32, i16, i16, float, float, i32, float, float }
+
+define void @print_arch(i8* %arch_file, i32 %route_type, i64 %det_routing_arch.0.0, i64 %det_routing_arch.0.1, i64 %det_routing_arch.0.2, i64 %det_routing_arch.0.3, i64 %det_routing_arch.0.4, %struct.s_segment_inf* %segment_inf, i64 %timing_inf.0.0, i64 %timing_inf.0.1, i64 %timing_inf.0.2, i64 %timing_inf.0.3, i64 %timing_inf.0.4, i32 %timing_inf.1) {
+entry:
+ br i1 false, label %bb278, label %bb344
+
+bb278: ; preds = %bb278, %entry
+ br i1 false, label %bb278, label %bb344
+
+bb344: ; preds = %bb278, %entry
+ %tmp38758 = load i16* null, align 2 ; <i16> [#uses=0]
+ ret void
+}
diff --git a/test/Transforms/GVN/2007-07-25-NestedLoop.ll b/test/Transforms/GVN/2007-07-25-NestedLoop.ll
new file mode 100644
index 0000000..c6d7750
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-25-NestedLoop.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -gvn | llvm-dis
+
+ %struct.TypHeader = type { i32, %struct.TypHeader**, [3 x i8], i8 }
+
+define %struct.TypHeader* @LtRec(%struct.TypHeader* %hdL, %struct.TypHeader* %hdR) {
+entry:
+ br i1 false, label %bb556.preheader, label %bb534.preheader
+
+bb534.preheader: ; preds = %entry
+ ret %struct.TypHeader* null
+
+bb556.preheader: ; preds = %entry
+ %tmp56119 = getelementptr %struct.TypHeader* %hdR, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp56220 = load i32* %tmp56119 ; <i32> [#uses=0]
+ br i1 false, label %bb.nph23, label %bb675.preheader
+
+bb.nph23: ; preds = %bb556.preheader
+ ret %struct.TypHeader* null
+
+bb656: ; preds = %bb675.outer, %bb656
+ %tmp678 = load i32* %tmp677 ; <i32> [#uses=0]
+ br i1 false, label %bb684, label %bb656
+
+bb684: ; preds = %bb675.outer, %bb656
+ br i1 false, label %bb924.preheader, label %bb675.outer
+
+bb675.outer: ; preds = %bb675.preheader, %bb684
+ %tmp67812 = load i32* %tmp67711 ; <i32> [#uses=0]
+ br i1 false, label %bb684, label %bb656
+
+bb675.preheader: ; preds = %bb556.preheader
+ %tmp67711 = getelementptr %struct.TypHeader* %hdR, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp677 = getelementptr %struct.TypHeader* %hdR, i32 0, i32 0 ; <i32*> [#uses=1]
+ br label %bb675.outer
+
+bb924.preheader: ; preds = %bb684
+ ret %struct.TypHeader* null
+}
diff --git a/test/Transforms/GVN/2007-07-25-SinglePredecessor.ll b/test/Transforms/GVN/2007-07-25-SinglePredecessor.ll
new file mode 100644
index 0000000..ecff657
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-25-SinglePredecessor.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -gvn | llvm-dis
+
+ %struct.ggBRDF = type { i32 (...)** }
+ %struct.ggBox3 = type { %struct.ggPoint3, %struct.ggPoint3 }
+ %struct.ggMaterialRecord = type { %struct.ggPoint2, %struct.ggBox3, %struct.ggBox3, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggBRDF*, i32, i32, i32, i32 }
+ %struct.ggONB3 = type { %struct.ggPoint3, %struct.ggPoint3, %struct.ggPoint3 }
+ %struct.ggPoint2 = type { [2 x double] }
+ %struct.ggPoint3 = type { [3 x double] }
+ %struct.ggSpectrum = type { [8 x float] }
+ %struct.mrViewingHitRecord = type { double, %struct.ggPoint3, %struct.ggONB3, %struct.ggPoint2, double, %struct.ggSpectrum, %struct.ggSpectrum, i32, i32, i32, i32 }
+ %struct.mrXEllipticalCylinder = type { %struct.ggBRDF, float, float, float, float, float, float }
+
+define i32 @_ZNK21mrZEllipticalCylinder10viewingHitERK6ggRay3dddR18mrViewingHitRecordR16ggMaterialRecord(%struct.mrXEllipticalCylinder* %this, %struct.ggBox3* %ray, double %unnamed_arg, double %tmin, double %tmax, %struct.mrViewingHitRecord* %VHR, %struct.ggMaterialRecord* %unnamed_arg2) {
+entry:
+ %tmp80.i = getelementptr %struct.mrViewingHitRecord* %VHR, i32 0, i32 1, i32 0, i32 0 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %tmp80.i
+ br i1 false, label %return, label %cond_next.i
+
+cond_next.i: ; preds = %entry
+ br i1 false, label %return, label %cond_true
+
+cond_true: ; preds = %cond_next.i
+ %tmp3.i8 = getelementptr %struct.mrViewingHitRecord* %VHR, i32 0, i32 1, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp46 = load double* %tmp3.i8 ; <double> [#uses=0]
+ ret i32 1
+
+return: ; preds = %cond_next.i, %entry
+ ret i32 0
+}
diff --git a/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll b/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
new file mode 100644
index 0000000..0be3379
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -gvn -S | grep {tmp17625.* = phi i32. }
+; RUN: opt < %s -gvn -S | grep {tmp17631.* = phi i32. }
+
+@last = external global [65 x i32*] ; <[65 x i32*]*> [#uses=1]
+
+define i32 @NextRootMove(i32 %wtm) {
+cond_next95: ; preds = %cond_true85, %cond_true79, %cond_true73, %bb68
+ %tmp17618 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 ; <i32*> [#uses=0]
+ br label %cond_true116
+
+cond_true116: ; preds = %cond_true111
+ br i1 false, label %cond_true128, label %cond_true145
+
+cond_true128: ; preds = %cond_true121
+ %tmp17625 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 ; <i32*> [#uses=0]
+ br i1 false, label %bb98.backedge, label %return.loopexit
+
+bb98.backedge: ; preds = %bb171, %cond_true145, %cond_true128
+ br label %cond_true116
+
+cond_true145: ; preds = %cond_false
+ %tmp17631 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 ; <i32*> [#uses=0]
+ br i1 false, label %bb98.backedge, label %return.loopexit
+
+return.loopexit: ; preds = %bb171, %cond_true145, %cond_true128
+ br label %return
+
+return: ; preds = %return.loopexit, %cond_next95, %cond_true85
+ ret i32 0
+}
diff --git a/test/Transforms/GVN/2007-07-26-NonRedundant.ll b/test/Transforms/GVN/2007-07-26-NonRedundant.ll
new file mode 100644
index 0000000..7579e8a
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-26-NonRedundant.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -gvn | llvm-dis
+
+@bsLive = external global i32 ; <i32*> [#uses=2]
+
+define i32 @bsR(i32 %n) {
+entry:
+ br i1 false, label %cond_next, label %bb19
+
+cond_next: ; preds = %entry
+ store i32 0, i32* @bsLive, align 4
+ br label %bb19
+
+bb19: ; preds = %cond_next, %entry
+ %tmp29 = load i32* @bsLive, align 4 ; <i32> [#uses=0]
+ ret i32 0
+}
diff --git a/test/Transforms/GVN/2007-07-26-PhiErasure.ll b/test/Transforms/GVN/2007-07-26-PhiErasure.ll
new file mode 100644
index 0000000..d898ab8
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-26-PhiErasure.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -gvn -S | not grep phi
+
+ %struct..0anon = type { i32 }
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] }
+@n_spills = external global i32 ; <i32*> [#uses=2]
+
+define i32 @reload(%struct.rtx_def* %first, i32 %global, %struct.FILE* %dumpfile) {
+cond_next2835.1: ; preds = %cond_next2861
+ %tmp2922 = load i32* @n_spills, align 4 ; <i32> [#uses=0]
+ br label %bb2928
+
+bb2928: ; preds = %cond_next2835.1, %cond_next2943
+ br i1 false, label %cond_next2943, label %cond_true2935
+
+cond_true2935: ; preds = %bb2928
+ br label %cond_next2943
+
+cond_next2943: ; preds = %cond_true2935, %bb2928
+ br i1 false, label %bb2982.preheader, label %bb2928
+
+bb2982.preheader: ; preds = %cond_next2943
+ %tmp298316 = load i32* @n_spills, align 4 ; <i32> [#uses=0]
+ ret i32 %tmp298316
+
+}
diff --git a/test/Transforms/GVN/2007-07-30-PredIDom.ll b/test/Transforms/GVN/2007-07-30-PredIDom.ll
new file mode 100644
index 0000000..5cb6bb3
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-30-PredIDom.ll
@@ -0,0 +1,274 @@
+; RUN: opt < %s -gvn | llvm-dis
+
+ %"struct.Block::$_16" = type { i32 }
+ %struct.Exp = type { %struct.Exp_*, i32, i32, i32, %struct.Exp*, %struct.Exp*, %"struct.Exp::$_10", %"struct.Block::$_16", %"struct.Exp::$_12" }
+ %"struct.Exp::$_10" = type { %struct.Exp* }
+ %"struct.Exp::$_12" = type { %struct.Exp** }
+ %struct.Exp_ = type { i32, i32, i32, i32, %struct.Id* }
+ %struct.Id = type { i8*, i32, i32, i32, %"struct.Id::$_13" }
+ %"struct.Id::$_13" = type { double }
+
+define i8* @_ZN3Exp8toStringEj(%struct.Exp* %this, i32 %nextpc) {
+entry:
+ switch i32 0, label %bb970 [
+ i32 1, label %bb
+ i32 2, label %bb39
+ i32 3, label %bb195
+ i32 4, label %bb270
+ i32 5, label %bb418
+ i32 6, label %bb633
+ i32 7, label %bb810
+ i32 8, label %bb882
+ i32 9, label %bb925
+ ]
+
+bb: ; preds = %entry
+ store i8* null, i8** null
+ br label %return
+
+bb39: ; preds = %entry
+ br i1 false, label %cond_true, label %cond_false132
+
+cond_true: ; preds = %bb39
+ br i1 false, label %cond_true73, label %cond_false
+
+cond_true73: ; preds = %cond_true
+ br i1 false, label %cond_true108, label %cond_next
+
+cond_true108: ; preds = %cond_true73
+ br label %cond_next
+
+cond_next: ; preds = %cond_true108, %cond_true73
+ br label %cond_next131
+
+cond_false: ; preds = %cond_true
+ br label %cond_next131
+
+cond_next131: ; preds = %cond_false, %cond_next
+ br label %cond_next141
+
+cond_false132: ; preds = %bb39
+ br label %cond_next141
+
+cond_next141: ; preds = %cond_false132, %cond_next131
+ br i1 false, label %cond_true169, label %cond_false175
+
+cond_true169: ; preds = %cond_next141
+ br label %cond_next181
+
+cond_false175: ; preds = %cond_next141
+ br label %cond_next181
+
+cond_next181: ; preds = %cond_false175, %cond_true169
+ br i1 false, label %cond_true189, label %cond_next191
+
+cond_true189: ; preds = %cond_next181
+ br label %cond_next191
+
+cond_next191: ; preds = %cond_true189, %cond_next181
+ store i8* null, i8** null
+ br label %return
+
+bb195: ; preds = %entry
+ br i1 false, label %cond_true248, label %cond_false250
+
+cond_true248: ; preds = %bb195
+ br label %cond_next252
+
+cond_false250: ; preds = %bb195
+ br label %cond_next252
+
+cond_next252: ; preds = %cond_false250, %cond_true248
+ br i1 false, label %cond_true265, label %cond_next267
+
+cond_true265: ; preds = %cond_next252
+ br label %cond_next267
+
+cond_next267: ; preds = %cond_true265, %cond_next252
+ store i8* null, i8** null
+ br label %return
+
+bb270: ; preds = %entry
+ br i1 false, label %cond_true338, label %cond_false340
+
+cond_true338: ; preds = %bb270
+ br label %cond_next342
+
+cond_false340: ; preds = %bb270
+ br label %cond_next342
+
+cond_next342: ; preds = %cond_false340, %cond_true338
+ br i1 false, label %cond_true362, label %cond_false364
+
+cond_true362: ; preds = %cond_next342
+ br label %cond_next366
+
+cond_false364: ; preds = %cond_next342
+ br label %cond_next366
+
+cond_next366: ; preds = %cond_false364, %cond_true362
+ br i1 false, label %cond_true393, label %cond_next395
+
+cond_true393: ; preds = %cond_next366
+ br label %cond_next395
+
+cond_next395: ; preds = %cond_true393, %cond_next366
+ br i1 false, label %cond_true406, label %cond_next408
+
+cond_true406: ; preds = %cond_next395
+ br label %cond_next408
+
+cond_next408: ; preds = %cond_true406, %cond_next395
+ br i1 false, label %cond_true413, label %cond_next415
+
+cond_true413: ; preds = %cond_next408
+ br label %cond_next415
+
+cond_next415: ; preds = %cond_true413, %cond_next408
+ store i8* null, i8** null
+ br label %return
+
+bb418: ; preds = %entry
+ br i1 false, label %cond_true512, label %cond_false514
+
+cond_true512: ; preds = %bb418
+ br label %cond_next516
+
+cond_false514: ; preds = %bb418
+ br label %cond_next516
+
+cond_next516: ; preds = %cond_false514, %cond_true512
+ br i1 false, label %cond_true536, label %cond_false538
+
+cond_true536: ; preds = %cond_next516
+ br label %cond_next540
+
+cond_false538: ; preds = %cond_next516
+ br label %cond_next540
+
+cond_next540: ; preds = %cond_false538, %cond_true536
+ br i1 false, label %cond_true560, label %cond_false562
+
+cond_true560: ; preds = %cond_next540
+ br label %cond_next564
+
+cond_false562: ; preds = %cond_next540
+ br label %cond_next564
+
+cond_next564: ; preds = %cond_false562, %cond_true560
+ br i1 false, label %cond_true597, label %cond_next599
+
+cond_true597: ; preds = %cond_next564
+ br label %cond_next599
+
+cond_next599: ; preds = %cond_true597, %cond_next564
+ br i1 false, label %cond_true614, label %cond_next616
+
+cond_true614: ; preds = %cond_next599
+ br label %cond_next616
+
+cond_next616: ; preds = %cond_true614, %cond_next599
+ br i1 false, label %cond_true621, label %cond_next623
+
+cond_true621: ; preds = %cond_next616
+ br label %cond_next623
+
+cond_next623: ; preds = %cond_true621, %cond_next616
+ br i1 false, label %cond_true628, label %cond_next630
+
+cond_true628: ; preds = %cond_next623
+ br label %cond_next630
+
+cond_next630: ; preds = %cond_true628, %cond_next623
+ store i8* null, i8** null
+ br label %return
+
+bb633: ; preds = %entry
+ br i1 false, label %cond_true667, label %cond_next669
+
+cond_true667: ; preds = %bb633
+ br label %cond_next669
+
+cond_next669: ; preds = %cond_true667, %bb633
+ br i1 false, label %cond_true678, label %cond_next791
+
+cond_true678: ; preds = %cond_next669
+ br label %bb735
+
+bb679: ; preds = %bb735
+ br i1 false, label %cond_true729, label %cond_next731
+
+cond_true729: ; preds = %bb679
+ br label %cond_next731
+
+cond_next731: ; preds = %cond_true729, %bb679
+ br label %bb735
+
+bb735: ; preds = %cond_next731, %cond_true678
+ br i1 false, label %bb679, label %bb743
+
+bb743: ; preds = %bb735
+ br i1 false, label %cond_true788, label %cond_next790
+
+cond_true788: ; preds = %bb743
+ br label %cond_next790
+
+cond_next790: ; preds = %cond_true788, %bb743
+ br label %cond_next791
+
+cond_next791: ; preds = %cond_next790, %cond_next669
+ br i1 false, label %cond_true805, label %cond_next807
+
+cond_true805: ; preds = %cond_next791
+ br label %cond_next807
+
+cond_next807: ; preds = %cond_true805, %cond_next791
+ store i8* null, i8** null
+ br label %return
+
+bb810: ; preds = %entry
+ br i1 false, label %cond_true870, label %cond_next872
+
+cond_true870: ; preds = %bb810
+ br label %cond_next872
+
+cond_next872: ; preds = %cond_true870, %bb810
+ br i1 false, label %cond_true877, label %cond_next879
+
+cond_true877: ; preds = %cond_next872
+ br label %cond_next879
+
+cond_next879: ; preds = %cond_true877, %cond_next872
+ store i8* null, i8** null
+ br label %return
+
+bb882: ; preds = %entry
+ br i1 false, label %cond_true920, label %cond_next922
+
+cond_true920: ; preds = %bb882
+ br label %cond_next922
+
+cond_next922: ; preds = %cond_true920, %bb882
+ store i8* null, i8** null
+ br label %return
+
+bb925: ; preds = %entry
+ br i1 false, label %cond_true965, label %cond_next967
+
+cond_true965: ; preds = %bb925
+ br label %cond_next967
+
+cond_next967: ; preds = %cond_true965, %bb925
+ store i8* null, i8** null
+ br label %return
+
+bb970: ; preds = %entry
+ unreachable
+ ; No predecessors!
+ store i8* null, i8** null
+ br label %return
+
+return: ; preds = %0, %cond_next967, %cond_next922, %cond_next879, %cond_next807, %cond_next630, %cond_next415, %cond_next267, %cond_next191, %bb
+ %retval980 = load i8** null ; <i8*> [#uses=1]
+ ret i8* %retval980
+}
diff --git a/test/Transforms/GVN/2007-07-31-NoDomInherit.ll b/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
new file mode 100644
index 0000000..faa1157
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
@@ -0,0 +1,313 @@
+; RUN: opt < %s -gvn -S | grep {tmp47 = phi i32 }
+
+ %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
+@debug = external constant i32 ; <i32*> [#uses=0]
+@counters = external constant i32 ; <i32*> [#uses=1]
+@trialx = external global [17 x i32] ; <[17 x i32]*> [#uses=1]
+@dummy1 = external global [7 x i32] ; <[7 x i32]*> [#uses=0]
+@dummy2 = external global [4 x i32] ; <[4 x i32]*> [#uses=0]
+@unacceptable = external global i32 ; <i32*> [#uses=0]
+@isa = external global [13 x %struct.anon] ; <[13 x %struct.anon]*> [#uses=3]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [1 x i8] ; <[1 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
+@r = external global [17 x i32] ; <[17 x i32]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
+@pgm = external global [5 x { i32, [3 x i32] }] ; <[5 x { i32, [3 x i32] }]*> [#uses=4]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [13 x i8] ; <[13 x i8]*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
[email protected] = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
+@numi = external global i32 ; <i32*> [#uses=7]
[email protected] = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
+@counter = external global [5 x i32] ; <[5 x i32]*> [#uses=2]
[email protected] = external global i32 ; <i32*> [#uses=0]
[email protected] = external constant [43 x i8] ; <[43 x i8]*> [#uses=0]
[email protected] = external constant [42 x i8] ; <[42 x i8]*> [#uses=0]
+@corr_result = external global i32 ; <i32*> [#uses=0]
[email protected] = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
[email protected] = external constant [47 x i8] ; <[47 x i8]*> [#uses=0]
+@correct_result = external global [17 x i32] ; <[17 x i32]*> [#uses=1]
[email protected] = external constant [46 x i8] ; <[46 x i8]*> [#uses=0]
[email protected] = external constant [32 x i8] ; <[32 x i8]*> [#uses=0]
[email protected] = external constant [44 x i8] ; <[44 x i8]*> [#uses=1]
[email protected] = external constant [21 x i8] ; <[21 x i8]*> [#uses=1]
[email protected] = external constant [12 x i8] ; <[12 x i8]*> [#uses=1]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=1]
[email protected] = external constant [12 x i8] ; <[12 x i8]*> [#uses=1]
+
+declare i32 @neg(i32, i32, i32)
+
+declare i32 @Not(i32, i32, i32)
+
+declare i32 @pop(i32, i32, i32)
+
+declare i32 @nlz(i32, i32, i32)
+
+declare i32 @rev(i32, i32, i32)
+
+declare i32 @add(i32, i32, i32)
+
+declare i32 @sub(i32, i32, i32)
+
+declare i32 @mul(i32, i32, i32)
+
+declare i32 @divide(i32, i32, i32)
+
+declare i32 @divu(i32, i32, i32)
+
+declare i32 @And(i32, i32, i32)
+
+declare i32 @Or(i32, i32, i32)
+
+declare i32 @Xor(i32, i32, i32)
+
+declare i32 @rotl(i32, i32, i32)
+
+declare i32 @shl(i32, i32, i32)
+
+declare i32 @shr(i32, i32, i32)
+
+declare i32 @shrs(i32, i32, i32)
+
+declare i32 @cmpeq(i32, i32, i32)
+
+declare i32 @cmplt(i32, i32, i32)
+
+declare i32 @cmpltu(i32, i32, i32)
+
+declare i32 @seleq(i32, i32, i32)
+
+declare i32 @sellt(i32, i32, i32)
+
+declare i32 @selle(i32, i32, i32)
+
+declare void @print_expr(i32)
+
+declare i32 @printf(i8*, ...)
+
+declare i32 @putchar(i32)
+
+declare void @print_pgm()
+
+declare void @simulate_one_instruction(i32)
+
+declare i32 @check(i32)
+
+declare i32 @puts(i8*)
+
+declare void @fix_operands(i32)
+
+declare void @abort()
+
+declare i32 @increment()
+
+declare i32 @search()
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ %argc_addr = alloca i32 ; <i32*> [#uses=1]
+ %argv_addr = alloca i8** ; <i8***> [#uses=1]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %i = alloca i32, align 4 ; <i32*> [#uses=21]
+ %num_sol = alloca i32, align 4 ; <i32*> [#uses=4]
+ %total = alloca i32, align 4 ; <i32*> [#uses=4]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %argc, i32* %argc_addr
+ store i8** %argv, i8*** %argv_addr
+ store i32 0, i32* %num_sol
+ store i32 1, i32* @numi
+ br label %bb91
+
+bb: ; preds = %cond_next97
+ %tmp1 = load i32* @numi ; <i32> [#uses=1]
+ %tmp2 = getelementptr [44 x i8]* @.str43, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp3 = call i32 (i8*, ...)* @printf( i8* %tmp2, i32 %tmp1 ) ; <i32> [#uses=0]
+ store i32 0, i32* %i
+ br label %bb13
+
+bb4: ; preds = %bb13
+ %tmp5 = load i32* %i ; <i32> [#uses=1]
+ %tmp6 = load i32* %i ; <i32> [#uses=1]
+ %tmp7 = getelementptr [17 x i32]* @trialx, i32 0, i32 %tmp6 ; <i32*> [#uses=1]
+ %tmp8 = load i32* %tmp7 ; <i32> [#uses=1]
+ %tmp9 = call i32 @userfun( i32 %tmp8 ) ; <i32> [#uses=1]
+ %tmp10 = getelementptr [17 x i32]* @correct_result, i32 0, i32 %tmp5 ; <i32*> [#uses=1]
+ store i32 %tmp9, i32* %tmp10
+ %tmp11 = load i32* %i ; <i32> [#uses=1]
+ %tmp12 = add i32 %tmp11, 1 ; <i32> [#uses=1]
+ store i32 %tmp12, i32* %i
+ br label %bb13
+
+bb13: ; preds = %bb4, %bb
+ %tmp14 = load i32* %i ; <i32> [#uses=1]
+ %tmp15 = icmp sle i32 %tmp14, 16 ; <i1> [#uses=1]
+ %tmp1516 = zext i1 %tmp15 to i32 ; <i32> [#uses=1]
+ %toBool = icmp ne i32 %tmp1516, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb4, label %bb17
+
+bb17: ; preds = %bb13
+ store i32 0, i32* %i
+ br label %bb49
+
+bb18: ; preds = %bb49
+ %tmp19 = load i32* %i ; <i32> [#uses=1]
+ %tmp20 = getelementptr [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp19 ; <{ i32, [3 x i32] }*> [#uses=1]
+ %tmp21 = getelementptr { i32, [3 x i32] }* %tmp20, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp21
+ %tmp22 = load i32* %i ; <i32> [#uses=1]
+ %tmp23 = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1]
+ %tmp24 = getelementptr %struct.anon* %tmp23, i32 0, i32 3 ; <[3 x i32]*> [#uses=1]
+ %tmp25 = getelementptr [3 x i32]* %tmp24, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp26 = load i32* %tmp25 ; <i32> [#uses=1]
+ %tmp27 = getelementptr [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp22 ; <{ i32, [3 x i32] }*> [#uses=1]
+ %tmp28 = getelementptr { i32, [3 x i32] }* %tmp27, i32 0, i32 1 ; <[3 x i32]*> [#uses=1]
+ %tmp29 = getelementptr [3 x i32]* %tmp28, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %tmp26, i32* %tmp29
+ %tmp30 = load i32* %i ; <i32> [#uses=1]
+ %tmp31 = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1]
+ %tmp32 = getelementptr %struct.anon* %tmp31, i32 0, i32 3 ; <[3 x i32]*> [#uses=1]
+ %tmp33 = getelementptr [3 x i32]* %tmp32, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp34 = load i32* %tmp33 ; <i32> [#uses=1]
+ %tmp35 = getelementptr [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp30 ; <{ i32, [3 x i32] }*> [#uses=1]
+ %tmp36 = getelementptr { i32, [3 x i32] }* %tmp35, i32 0, i32 1 ; <[3 x i32]*> [#uses=1]
+ %tmp37 = getelementptr [3 x i32]* %tmp36, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %tmp34, i32* %tmp37
+ %tmp38 = load i32* %i ; <i32> [#uses=1]
+ %tmp39 = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1]
+ %tmp40 = getelementptr %struct.anon* %tmp39, i32 0, i32 3 ; <[3 x i32]*> [#uses=1]
+ %tmp41 = getelementptr [3 x i32]* %tmp40, i32 0, i32 2 ; <i32*> [#uses=1]
+ %tmp42 = load i32* %tmp41 ; <i32> [#uses=1]
+ %tmp43 = getelementptr [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp38 ; <{ i32, [3 x i32] }*> [#uses=1]
+ %tmp44 = getelementptr { i32, [3 x i32] }* %tmp43, i32 0, i32 1 ; <[3 x i32]*> [#uses=1]
+ %tmp45 = getelementptr [3 x i32]* %tmp44, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %tmp42, i32* %tmp45
+ %tmp46 = load i32* %i ; <i32> [#uses=1]
+ call void @fix_operands( i32 %tmp46 )
+ %tmp47 = load i32* %i ; <i32> [#uses=1]
+ %tmp48 = add i32 %tmp47, 1 ; <i32> [#uses=1]
+ store i32 %tmp48, i32* %i
+ br label %bb49
+
+bb49: ; preds = %bb18, %bb17
+ %tmp50 = load i32* @numi ; <i32> [#uses=1]
+ %tmp51 = load i32* %i ; <i32> [#uses=1]
+ %tmp52 = icmp slt i32 %tmp51, %tmp50 ; <i1> [#uses=1]
+ %tmp5253 = zext i1 %tmp52 to i32 ; <i32> [#uses=1]
+ %toBool54 = icmp ne i32 %tmp5253, 0 ; <i1> [#uses=1]
+ br i1 %toBool54, label %bb18, label %bb55
+
+bb55: ; preds = %bb49
+ %tmp56 = call i32 @search( ) ; <i32> [#uses=1]
+ store i32 %tmp56, i32* %num_sol
+ %tmp57 = getelementptr [21 x i8]* @.str44, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp58 = load i32* %num_sol ; <i32> [#uses=1]
+ %tmp59 = call i32 (i8*, ...)* @printf( i8* %tmp57, i32 %tmp58 ) ; <i32> [#uses=0]
+ %tmp60 = load i32* @counters ; <i32> [#uses=1]
+ %tmp61 = icmp ne i32 %tmp60, 0 ; <i1> [#uses=1]
+ %tmp6162 = zext i1 %tmp61 to i32 ; <i32> [#uses=1]
+ %toBool63 = icmp ne i32 %tmp6162, 0 ; <i1> [#uses=1]
+ br i1 %toBool63, label %cond_true, label %cond_next
+
+cond_true: ; preds = %bb55
+ store i32 0, i32* %total
+ %tmp64 = getelementptr [12 x i8]* @.str45, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp65 = call i32 (i8*, ...)* @printf( i8* %tmp64 ) ; <i32> [#uses=0]
+ store i32 0, i32* %i
+ br label %bb79
+
+bb66: ; preds = %bb79
+ %tmp67 = load i32* %i ; <i32> [#uses=1]
+ %tmp68 = getelementptr [5 x i32]* @counter, i32 0, i32 %tmp67 ; <i32*> [#uses=1]
+ %tmp69 = load i32* %tmp68 ; <i32> [#uses=1]
+ %tmp70 = getelementptr [5 x i8]* @.str46, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp71 = call i32 (i8*, ...)* @printf( i8* %tmp70, i32 %tmp69 ) ; <i32> [#uses=0]
+ %tmp72 = load i32* %i ; <i32> [#uses=1]
+ %tmp73 = getelementptr [5 x i32]* @counter, i32 0, i32 %tmp72 ; <i32*> [#uses=1]
+ %tmp74 = load i32* %tmp73 ; <i32> [#uses=1]
+ %tmp75 = load i32* %total ; <i32> [#uses=1]
+ %tmp76 = add i32 %tmp74, %tmp75 ; <i32> [#uses=1]
+ store i32 %tmp76, i32* %total
+ %tmp77 = load i32* %i ; <i32> [#uses=1]
+ %tmp78 = add i32 %tmp77, 1 ; <i32> [#uses=1]
+ store i32 %tmp78, i32* %i
+ br label %bb79
+
+bb79: ; preds = %bb66, %cond_true
+ %tmp80 = load i32* @numi ; <i32> [#uses=1]
+ %tmp81 = load i32* %i ; <i32> [#uses=1]
+ %tmp82 = icmp slt i32 %tmp81, %tmp80 ; <i1> [#uses=1]
+ %tmp8283 = zext i1 %tmp82 to i32 ; <i32> [#uses=1]
+ %toBool84 = icmp ne i32 %tmp8283, 0 ; <i1> [#uses=1]
+ br i1 %toBool84, label %bb66, label %bb85
+
+bb85: ; preds = %bb79
+ %tmp86 = getelementptr [12 x i8]* @.str47, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp87 = load i32* %total ; <i32> [#uses=1]
+ %tmp88 = call i32 (i8*, ...)* @printf( i8* %tmp86, i32 %tmp87 ) ; <i32> [#uses=0]
+ br label %cond_next
+
+cond_next: ; preds = %bb85, %bb55
+ %tmp89 = load i32* @numi ; <i32> [#uses=1]
+ %tmp90 = add i32 %tmp89, 1 ; <i32> [#uses=1]
+ store i32 %tmp90, i32* @numi
+ br label %bb91
+
+bb91: ; preds = %cond_next, %entry
+ %tmp92 = load i32* @numi ; <i32> [#uses=1]
+ %tmp93 = icmp sgt i32 %tmp92, 5 ; <i1> [#uses=1]
+ %tmp9394 = zext i1 %tmp93 to i32 ; <i32> [#uses=1]
+ %toBool95 = icmp ne i32 %tmp9394, 0 ; <i1> [#uses=1]
+ br i1 %toBool95, label %cond_true96, label %cond_next97
+
+cond_true96: ; preds = %bb91
+ br label %bb102
+
+cond_next97: ; preds = %bb91
+ %tmp98 = load i32* %num_sol ; <i32> [#uses=1]
+ %tmp99 = icmp eq i32 %tmp98, 0 ; <i1> [#uses=1]
+ %tmp99100 = zext i1 %tmp99 to i32 ; <i32> [#uses=1]
+ %toBool101 = icmp ne i32 %tmp99100, 0 ; <i1> [#uses=1]
+ br i1 %toBool101, label %bb, label %bb102
+
+bb102: ; preds = %cond_next97, %cond_true96
+ store i32 0, i32* %tmp
+ %tmp103 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp103, i32* %retval
+ br label %return
+
+return: ; preds = %bb102
+ %retval104 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval104
+}
+
+declare i32 @userfun(i32)
diff --git a/test/Transforms/GVN/2007-07-31-RedundantPhi.ll b/test/Transforms/GVN/2007-07-31-RedundantPhi.ll
new file mode 100644
index 0000000..0d1d8bc
--- /dev/null
+++ b/test/Transforms/GVN/2007-07-31-RedundantPhi.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -gvn -S | not grep {tmp701 =}
+
+@img_width = external global i16 ; <i16*> [#uses=2]
+
+define i32 @smpUMHEXBipredIntegerPelBlockMotionSearch(i16* %cur_pic, i16 signext %ref, i32 %list, i32 %pic_pix_x, i32 %pic_pix_y, i32 %blocktype, i16 signext %pred_mv_x1, i16 signext %pred_mv_y1, i16 signext %pred_mv_x2, i16 signext %pred_mv_y2, i16* %mv_x, i16* %mv_y, i16* %s_mv_x, i16* %s_mv_y, i32 %search_range, i32 %min_mcost, i32 %lambda_factor) {
+cond_next143: ; preds = %entry
+ store i16 0, i16* @img_width, align 2
+ br i1 false, label %cond_next449, label %cond_false434
+
+cond_false434: ; preds = %cond_true415
+ br label %cond_next449
+
+cond_next449: ; preds = %cond_false434, %cond_true415
+ br i1 false, label %cond_next698, label %cond_false470
+
+cond_false470: ; preds = %cond_next449
+ br label %cond_next698
+
+cond_next698: ; preds = %cond_true492
+ %tmp701 = load i16* @img_width, align 2 ; <i16> [#uses=0]
+ ret i32 0
+}
diff --git a/test/Transforms/GVN/2008-02-12-UndefLoad.ll b/test/Transforms/GVN/2008-02-12-UndefLoad.ll
new file mode 100644
index 0000000..de2aa61
--- /dev/null
+++ b/test/Transforms/GVN/2008-02-12-UndefLoad.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -gvn -S | not grep load
+; PR1996
+
+%struct.anon = type { i32, i8, i8, i8, i8 }
+
+define i32 @a() {
+entry:
+ %c = alloca %struct.anon ; <%struct.anon*> [#uses=2]
+ %tmp = getelementptr %struct.anon* %c, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp1 = getelementptr i32* %tmp, i32 1 ; <i32*> [#uses=2]
+ %tmp2 = load i32* %tmp1, align 4 ; <i32> [#uses=1]
+ %tmp3 = or i32 %tmp2, 11 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp3, -21 ; <i32> [#uses=1]
+ store i32 %tmp4, i32* %tmp1, align 4
+ %call = call i32 (...)* @x( %struct.anon* %c ) ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+
+declare i32 @x(...)
diff --git a/test/Transforms/GVN/2008-02-13-NewPHI.ll b/test/Transforms/GVN/2008-02-13-NewPHI.ll
new file mode 100644
index 0000000..54998db
--- /dev/null
+++ b/test/Transforms/GVN/2008-02-13-NewPHI.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -anders-aa -gvn
+; PR2032
+
+define i32 @sscal(i32 %n, double %sa1, float* %sx, i32 %incx) {
+entry:
+ %sx_addr = alloca float* ; <float**> [#uses=3]
+ store float* %sx, float** %sx_addr, align 4
+ br label %bb33
+
+bb: ; preds = %bb33
+ %tmp27 = load float** %sx_addr, align 4 ; <float*> [#uses=1]
+ store float 0.000000e+00, float* %tmp27, align 4
+ store float* null, float** %sx_addr, align 4
+ br label %bb33
+
+bb33: ; preds = %bb, %entry
+ br i1 false, label %bb, label %return
+
+return: ; preds = %bb33
+ %retval59 = load i32* null, align 4 ; <i32> [#uses=1]
+ ret i32 %retval59
+}
diff --git a/test/Transforms/GVN/2008-02-24-NonDominatedMemcpy.ll b/test/Transforms/GVN/2008-02-24-NonDominatedMemcpy.ll
new file mode 100644
index 0000000..9a75e1a
--- /dev/null
+++ b/test/Transforms/GVN/2008-02-24-NonDominatedMemcpy.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -gvn -dse -S | grep {call.*memcpy} | count 1
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+ %struct.ggFrame3 = type { %struct.ggPoint3, %struct.ggONB3 }
+ %struct.ggHMatrix3 = type { [4 x [4 x double]] }
+ %struct.ggONB3 = type { %struct.ggPoint3, %struct.ggPoint3, %struct.ggPoint3 }
+ %struct.ggPoint3 = type { [3 x double] }
+ %struct.ggQuaternion = type { [4 x double], i32, %struct.ggHMatrix3 }
+
+declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) nounwind
+
+define void @_Z10ggCRSplineRK8ggFrame3S1_S1_S1_d(%struct.ggFrame3* noalias sret %agg.result, %struct.ggFrame3* %f0, %struct.ggFrame3* %f1, %struct.ggFrame3* %f2, %struct.ggFrame3* %f3, double %t) nounwind {
+entry:
+ %qresult = alloca %struct.ggQuaternion ; <%struct.ggQuaternion*> [#uses=1]
+ %tmp = alloca %struct.ggONB3 ; <%struct.ggONB3*> [#uses=2]
+ call void @_ZN12ggQuaternion7getONB3Ev( %struct.ggONB3* noalias sret %tmp, %struct.ggQuaternion* %qresult ) nounwind
+ %tmp1.i = getelementptr %struct.ggFrame3* %agg.result, i32 0, i32 1 ; <%struct.ggONB3*> [#uses=1]
+ %tmp13.i = bitcast %struct.ggONB3* %tmp1.i to i8* ; <i8*> [#uses=1]
+ %tmp24.i = bitcast %struct.ggONB3* %tmp to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i64( i8* %tmp13.i, i8* %tmp24.i, i64 72, i32 8 ) nounwind
+ ret void
+}
+
+declare void @_ZN12ggQuaternion7getONB3Ev(%struct.ggONB3* noalias sret , %struct.ggQuaternion*) nounwind
diff --git a/test/Transforms/GVN/2008-02-26-MemCpySize.ll b/test/Transforms/GVN/2008-02-26-MemCpySize.ll
new file mode 100644
index 0000000..6ed8a76
--- /dev/null
+++ b/test/Transforms/GVN/2008-02-26-MemCpySize.ll
@@ -0,0 +1,46 @@
+; RUN: opt < %s -gvn -dse -S | grep {call.*memcpy.*cell} | count 2
+; PR2099
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9"
+ %struct.s = type { [11 x i8], i32 }
[email protected] = internal constant [11 x i8] c"0123456789\00" ; <[11 x i8]*> [#uses=1]
+@cell = weak global %struct.s zeroinitializer ; <%struct.s*> [#uses=2]
+
+declare i32 @check(%struct.s* byval %p) nounwind
+
+declare i32 @strcmp(i8*, i8*) nounwind readonly
+
+define i32 @main() noreturn nounwind {
+entry:
+ %p = alloca %struct.s, align 8 ; <%struct.s*> [#uses=2]
+ store i32 99, i32* getelementptr (%struct.s* @cell, i32 0, i32 1), align 4
+ call void @llvm.memcpy.i32( i8* getelementptr (%struct.s* @cell, i32 0, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0), i32 11, i32 1 )
+ %tmp = getelementptr %struct.s* %p, i32 0, i32 0, i32 0 ; <i8*> [#uses=2]
+ call void @llvm.memcpy.i64( i8* %tmp, i8* getelementptr (%struct.s* @cell, i32 0, i32 0, i32 0), i64 16, i32 8 )
+ %tmp1.i = getelementptr %struct.s* %p, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp2.i = load i32* %tmp1.i, align 4 ; <i32> [#uses=1]
+ %tmp3.i = icmp eq i32 %tmp2.i, 99 ; <i1> [#uses=1]
+ br i1 %tmp3.i, label %bb5.i, label %bb
+
+bb5.i: ; preds = %entry
+ %tmp91.i = call i32 @strcmp( i8* %tmp, i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0) ) nounwind readonly ; <i32> [#uses=1]
+ %tmp53 = icmp eq i32 %tmp91.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp53, label %bb7, label %bb
+
+bb: ; preds = %bb5.i, %entry
+ call void @abort( ) noreturn nounwind
+ unreachable
+
+bb7: ; preds = %bb5.i
+ call void @exit( i32 0 ) noreturn nounwind
+ unreachable
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+declare void @abort() noreturn nounwind
+
+declare void @exit(i32) noreturn nounwind
+
+declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) nounwind
diff --git a/test/Transforms/GVN/2008-07-02-Unreachable.ll b/test/Transforms/GVN/2008-07-02-Unreachable.ll
new file mode 100644
index 0000000..361c155
--- /dev/null
+++ b/test/Transforms/GVN/2008-07-02-Unreachable.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -gvn -S | grep {ret i8 \[%\]tmp3}
+; PR2503
+
+@g_3 = external global i8 ; <i8*> [#uses=2]
+
+define i8 @func_1() nounwind {
+entry:
+ br i1 false, label %ifelse, label %ifthen
+
+ifthen: ; preds = %entry
+ br label %ifend
+
+ifelse: ; preds = %entry
+ %tmp3 = load i8* @g_3 ; <i8> [#uses=0]
+ br label %forcond.thread
+
+forcond.thread: ; preds = %ifelse
+ br label %afterfor
+
+forcond: ; preds = %forinc
+ br i1 false, label %afterfor, label %forbody
+
+forbody: ; preds = %forcond
+ br label %forinc
+
+forinc: ; preds = %forbody
+ br label %forcond
+
+afterfor: ; preds = %forcond, %forcond.thread
+ %tmp10 = load i8* @g_3 ; <i8> [#uses=0]
+ ret i8 %tmp10
+
+ifend: ; preds = %afterfor, %ifthen
+ ret i8 0
+}
diff --git a/test/Transforms/GVN/2008-12-09-SelfRemove.ll b/test/Transforms/GVN/2008-12-09-SelfRemove.ll
new file mode 100644
index 0000000..c6833e3
--- /dev/null
+++ b/test/Transforms/GVN/2008-12-09-SelfRemove.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -gvn -S | grep getelementptr | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+ %struct.anon = type { i8*, i32 }
+ %struct.d_print_info = type { i32, i8*, i32, i32, %struct.d_print_template*, %struct.d_print_mod*, i32 }
+ %struct.d_print_mod = type { %struct.d_print_mod*, %struct.demangle_component*, i32, %struct.d_print_template* }
+ %struct.d_print_template = type { %struct.d_print_template*, %struct.demangle_component* }
+ %struct.demangle_component = type { i32, { %struct.anon } }
+
+define void @d_print_mod_list(%struct.d_print_info* %dpi, %struct.d_print_mod* %mods, i32 %suffix) nounwind {
+entry:
+ %0 = getelementptr %struct.d_print_info* %dpi, i32 0, i32 1 ; <i8**> [#uses=1]
+ br i1 false, label %return, label %bb
+
+bb: ; preds = %entry
+ %1 = load i8** %0, align 4 ; <i8*> [#uses=0]
+ %2 = getelementptr %struct.d_print_info* %dpi, i32 0, i32 1 ; <i8**> [#uses=0]
+ br label %bb21
+
+bb21: ; preds = %bb21, %bb
+ br label %bb21
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/GVN/2008-12-12-RLE-Crash.ll b/test/Transforms/GVN/2008-12-12-RLE-Crash.ll
new file mode 100644
index 0000000..da67ee7
--- /dev/null
+++ b/test/Transforms/GVN/2008-12-12-RLE-Crash.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -gvn | llvm-dis
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ br label %bb84
+
+bb41: ; preds = %bb82
+ %tmp = load i8* %opt.0, align 1 ; <i8> [#uses=0]
+ %tmp1 = getelementptr i8* %opt.0, i32 1 ; <i8*> [#uses=2]
+ switch i32 0, label %bb81 [
+ i32 102, label %bb82
+ i32 110, label %bb79
+ i32 118, label %bb80
+ ]
+
+bb79: ; preds = %bb41
+ br label %bb82
+
+bb80: ; preds = %bb41
+ ret i32 0
+
+bb81: ; preds = %bb41
+ ret i32 1
+
+bb82: ; preds = %bb84, %bb79, %bb41
+ %opt.0 = phi i8* [ %tmp3, %bb84 ], [ %tmp1, %bb79 ], [ %tmp1, %bb41 ] ; <i8*> [#uses=3]
+ %tmp2 = load i8* %opt.0, align 1 ; <i8> [#uses=0]
+ br i1 false, label %bb84, label %bb41
+
+bb84: ; preds = %bb82, %entry
+ %tmp3 = getelementptr i8* null, i32 1 ; <i8*> [#uses=1]
+ br label %bb82
+}
diff --git a/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll b/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll
new file mode 100644
index 0000000..41f76c8
--- /dev/null
+++ b/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -gvn | llvm-dis
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+@sort_value = external global [256 x i32], align 32 ; <[256 x i32]*> [#uses=2]
+
+define i32 @Quiesce(i32 %alpha, i32 %beta, i32 %wtm, i32 %ply) nounwind {
+entry:
+ br label %bb22
+
+bb22: ; preds = %bb23, %bb22, %entry
+ br i1 false, label %bb23, label %bb22
+
+bb23: ; preds = %bb23, %bb22
+ %sortv.233 = phi i32* [ getelementptr ([256 x i32]* @sort_value, i32 0, i32 0), %bb22 ], [ %sortv.2, %bb23 ] ; <i32*> [#uses=1]
+ %0 = load i32* %sortv.233, align 4 ; <i32> [#uses=0]
+ %sortv.2 = getelementptr [256 x i32]* @sort_value, i32 0, i32 0 ; <i32*> [#uses=1]
+ br i1 false, label %bb23, label %bb22
+}
diff --git a/test/Transforms/GVN/2008-12-15-CacheVisited.ll b/test/Transforms/GVN/2008-12-15-CacheVisited.ll
new file mode 100644
index 0000000..0a63f3f
--- /dev/null
+++ b/test/Transforms/GVN/2008-12-15-CacheVisited.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -gvn | llvm-dis
+; Cached results must be added to and verified against the visited sets.
+; PR3217
+
+define fastcc void @gen_field_die(i32* %decl) nounwind {
+entry:
+ br i1 false, label %bb203, label %bb202
+
+bb202: ; preds = %entry
+ unreachable
+
+bb203: ; preds = %entry
+ %tmp = getelementptr i32* %decl, i32 1 ; <i32*> [#uses=1]
+ %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=0]
+ br i1 false, label %bb207, label %bb204
+
+bb204: ; preds = %bb203
+ %tmp2 = getelementptr i32* %decl, i32 1 ; <i32*> [#uses=1]
+ br label %bb208
+
+bb207: ; preds = %bb203
+ br label %bb208
+
+bb208: ; preds = %bb207, %bb204
+ %iftmp.1374.0.in = phi i32* [ null, %bb207 ], [ %tmp2, %bb204 ] ; <i32*> [#uses=1]
+ %iftmp.1374.0 = load i32* %iftmp.1374.0.in ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/GVN/2009-01-21-SortInvalidation.ll b/test/Transforms/GVN/2009-01-21-SortInvalidation.ll
new file mode 100644
index 0000000..3677593
--- /dev/null
+++ b/test/Transforms/GVN/2009-01-21-SortInvalidation.ll
@@ -0,0 +1,55 @@
+; RUN: opt < %s -gvn | llvm-dis
+; PR3358
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.re_pattern_buffer = type { i8*, i64, i64, i64, i8*, i8*, i64, i8 }
+ %struct.re_registers = type { i32, i32*, i32* }
+
+define fastcc i32 @byte_re_match_2_internal(%struct.re_pattern_buffer* nocapture %bufp, i8* %string1, i32 %size1, i8* %string2, i32 %size2, i32 %pos, %struct.re_registers* %regs, i32 %stop) nounwind {
+entry:
+ br label %bb159
+
+succeed_label: ; preds = %bb159
+ ret i32 0
+
+bb159: ; preds = %bb664, %bb554, %bb159, %bb159, %bb159, %entry
+ %d.0 = phi i8* [ null, %entry ], [ %d.0, %bb159 ], [ %d.0, %bb554 ], [ %d.0, %bb159 ], [ %d.0, %bb159 ], [ %d.12, %bb664 ] ; <i8*> [#uses=5]
+ switch i32 0, label %bb661 [
+ i32 0, label %bb159
+ i32 1, label %succeed_label
+ i32 13, label %bb159
+ i32 14, label %bb159
+ i32 16, label %bb411
+ i32 24, label %bb622
+ i32 28, label %bb543
+ ]
+
+bb411: ; preds = %bb411, %bb159
+ br label %bb411
+
+bb543: ; preds = %bb159
+ br i1 false, label %bb549, label %bb550
+
+bb549: ; preds = %bb543
+ br label %bb554
+
+bb550: ; preds = %bb543
+ br i1 false, label %bb554, label %bb552
+
+bb552: ; preds = %bb550
+ %0 = load i8* %d.0, align 8 ; <i8> [#uses=0]
+ br label %bb554
+
+bb554: ; preds = %bb552, %bb550, %bb549
+ br i1 false, label %bb159, label %bb661
+
+bb622: ; preds = %bb622, %bb159
+ br label %bb622
+
+bb661: ; preds = %bb554, %bb159
+ %d.12 = select i1 false, i8* null, i8* null ; <i8*> [#uses=1]
+ br label %bb664
+
+bb664: ; preds = %bb664, %bb661
+ br i1 false, label %bb159, label %bb664
+}
diff --git a/test/Transforms/GVN/2009-01-22-SortInvalidation.ll b/test/Transforms/GVN/2009-01-22-SortInvalidation.ll
new file mode 100644
index 0000000..95690a5
--- /dev/null
+++ b/test/Transforms/GVN/2009-01-22-SortInvalidation.ll
@@ -0,0 +1,100 @@
+; RUN: opt < %s -gvn | llvm-dis
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ %struct..4sPragmaType = type { i8*, i32 }
+ %struct.AggInfo = type { i8, i8, i32, %struct.ExprList*, i32, %struct.AggInfo_col*, i32, i32, i32, %struct.AggInfo_func*, i32, i32 }
+ %struct.AggInfo_col = type { %struct.Table*, i32, i32, i32, i32, %struct.Expr* }
+ %struct.AggInfo_func = type { %struct.Expr*, %struct.FuncDef*, i32, i32 }
+ %struct.AuxData = type { i8*, void (i8*)* }
+ %struct.Bitvec = type { i32, i32, i32, { [125 x i32] } }
+ %struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* }
+ %struct.BtLock = type { %struct.Btree*, i32, i8, %struct.BtLock* }
+ %struct.BtShared = type { %struct.Pager*, %struct.sqlite3*, %struct.BtCursor*, %struct.MemPage*, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, i8, i32, i8*, void (i8*)*, %struct.sqlite3_mutex*, %struct.BusyHandler, i32, %struct.BtShared*, %struct.BtLock*, %struct.Btree* }
+ %struct.Btree = type { %struct.sqlite3*, %struct.BtShared*, i8, i8, i8, i32, %struct.Btree*, %struct.Btree* }
+ %struct.BtreeMutexArray = type { i32, [11 x %struct.Btree*] }
+ %struct.BusyHandler = type { i32 (i8*, i32)*, i8*, i32 }
+ %struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 }
+ %struct.CollSeq = type { i8*, i8, i8, i8*, i32 (i8*, i32, i8*, i32, i8*)*, void (i8*)* }
+ %struct.Column = type { i8*, %struct.Expr*, i8*, i8*, i8, i8, i8, i8 }
+ %struct.Context = type { i64, i32, %struct.Fifo }
+ %struct.CountCtx = type { i64 }
+ %struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8* }
+ %struct.Db = type { i8*, %struct.Btree*, i8, i8, i8*, void (i8*)*, %struct.Schema* }
+ %struct.Expr = type { i8, i8, i16, %struct.CollSeq*, %struct.Expr*, %struct.Expr*, %struct.ExprList*, %struct..4sPragmaType, %struct..4sPragmaType, i32, i32, %struct.AggInfo*, i32, i32, %struct.Select*, %struct.Table*, i32 }
+ %struct.ExprList = type { i32, i32, i32, %struct.ExprList_item* }
+ %struct.ExprList_item = type { %struct.Expr*, i8*, i8, i8, i8 }
+ %struct.FKey = type { %struct.Table*, %struct.FKey*, i8*, %struct.FKey*, i32, %struct.sColMap*, i8, i8, i8, i8 }
+ %struct.Fifo = type { i32, %struct.FifoPage*, %struct.FifoPage* }
+ %struct.FifoPage = type { i32, i32, i32, %struct.FifoPage*, [1 x i64] }
+ %struct.FuncDef = type { i16, i8, i8, i8, i8*, %struct.FuncDef*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*)*, [1 x i8] }
+ %struct.Hash = type { i8, i8, i32, i32, %struct.HashElem*, %struct._ht* }
+ %struct.HashElem = type { %struct.HashElem*, %struct.HashElem*, i8*, i8*, i32 }
+ %struct.IdList = type { %struct..4sPragmaType*, i32, i32 }
+ %struct.Index = type { i8*, i32, i32*, i32*, %struct.Table*, i32, i8, i8, i8*, %struct.Index*, %struct.Schema*, i8*, i8** }
+ %struct.KeyInfo = type { %struct.sqlite3*, i8, i8, i8, i32, i8*, [1 x %struct.CollSeq*] }
+ %struct.Mem = type { %struct.CountCtx, double, %struct.sqlite3*, i8*, i32, i16, i8, i8, void (i8*)* }
+ %struct.MemPage = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, [5 x %struct._OvflCell], %struct.BtShared*, i8*, %struct.PgHdr*, i32, %struct.MemPage* }
+ %struct.Module = type { %struct.sqlite3_module*, i8*, i8*, void (i8*)* }
+ %struct.Op = type { i8, i8, i8, i8, i32, i32, i32, { i32 } }
+ %struct.Pager = type { %struct.sqlite3_vfs*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Bitvec*, %struct.Bitvec*, i8*, i8*, i8*, i8*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.BusyHandler*, %struct.PagerLruList, %struct.PgHdr*, %struct.PgHdr*, %struct.PgHdr*, i64, i64, i64, i64, i64, i32, void (%struct.PgHdr*, i32)*, void (%struct.PgHdr*, i32)*, i32, %struct.PgHdr**, i8*, [16 x i8] }
+ %struct.PagerLruLink = type { %struct.PgHdr*, %struct.PgHdr* }
+ %struct.PagerLruList = type { %struct.PgHdr*, %struct.PgHdr*, %struct.PgHdr* }
+ %struct.Parse = type { %struct.sqlite3*, i32, i8*, %struct.Vdbe*, i8, i8, i8, i8, i8, i8, i8, [8 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x i32], i32, %struct.TableLock*, i32, i32, i32, i32, i32, %struct.Expr**, i8, %struct..4sPragmaType, %struct..4sPragmaType, %struct..4sPragmaType, i8*, i8*, %struct.Table*, %struct.Trigger*, %struct.TriggerStack*, i8*, %struct..4sPragmaType, i8, %struct.Table*, i32 }
+ %struct.PgHdr = type { %struct.Pager*, i32, %struct.PgHdr*, %struct.PgHdr*, %struct.PagerLruLink, %struct.PgHdr*, i8, i8, i8, i8, i8, i16, %struct.PgHdr*, %struct.PgHdr*, i8* }
+ %struct.Schema = type { i32, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Table*, i8, i8, i16, i32, %struct.sqlite3* }
+ %struct.Select = type { %struct.ExprList*, i8, i8, i8, i8, i8, i8, i8, %struct.SrcList*, %struct.Expr*, %struct.ExprList*, %struct.Expr*, %struct.ExprList*, %struct.Select*, %struct.Select*, %struct.Select*, %struct.Expr*, %struct.Expr*, i32, i32, [3 x i32] }
+ %struct.SrcList = type { i16, i16, [1 x %struct.SrcList_item] }
+ %struct.SrcList_item = type { i8*, i8*, i8*, %struct.Table*, %struct.Select*, i8, i8, i32, %struct.Expr*, %struct.IdList*, i64 }
+ %struct.Table = type { i8*, i32, %struct.Column*, i32, %struct.Index*, i32, %struct.Select*, i32, %struct.Trigger*, %struct.FKey*, i8*, %struct.Expr*, i32, i8, i8, i8, i8, i8, i8, i8, %struct.Module*, %struct.sqlite3_vtab*, i32, i8**, %struct.Schema* }
+ %struct.TableLock = type { i32, i32, i8, i8* }
+ %struct.Trigger = type { i8*, i8*, i8, i8, %struct.Expr*, %struct.IdList*, %struct..4sPragmaType, %struct.Schema*, %struct.Schema*, %struct.TriggerStep*, %struct.Trigger* }
+ %struct.TriggerStack = type { %struct.Table*, i32, i32, i32, i32, i32, i32, %struct.Trigger*, %struct.TriggerStack* }
+ %struct.TriggerStep = type { i32, i32, %struct.Trigger*, %struct.Select*, %struct..4sPragmaType, %struct.Expr*, %struct.ExprList*, %struct.IdList*, %struct.TriggerStep*, %struct.TriggerStep* }
+ %struct.Vdbe = type { %struct.sqlite3*, %struct.Vdbe*, %struct.Vdbe*, i32, i32, %struct.Op*, i32, i32, i32*, %struct.Mem**, %struct.Mem*, i32, %struct.Cursor**, i32, %struct.Mem*, i8**, i32, i32, i32, %struct.Mem*, i32, i32, %struct.Fifo, i32, i32, %struct.Context*, i32, i32, i32, i32, i32, [25 x i32], i32, i32, i8**, i8*, %struct.Mem*, i8, i8, i8, i8, i8, i8, i32, i64, i32, %struct.BtreeMutexArray, i32, i8*, i32 }
+ %struct.VdbeFunc = type { %struct.FuncDef*, i32, [1 x %struct.AuxData] }
+ %struct._OvflCell = type { i8*, i16 }
+ %struct._ht = type { i32, %struct.HashElem* }
+ %struct.anon = type { double }
+ %struct.sColMap = type { i32, i8* }
+ %struct.sqlite3 = type { %struct.sqlite3_vfs*, i32, %struct.Db*, i32, i32, i32, i32, i8, i8, i8, i8, i32, %struct.CollSeq*, i64, i64, i32, i32, i32, %struct.sqlite3_mutex*, %struct.sqlite3InitInfo, i32, i8**, %struct.Vdbe*, i32, void (i8*, i8*)*, i8*, void (i8*, i8*, i64)*, i8*, i8*, i32 (i8*)*, i8*, void (i8*)*, i8*, void (i8*, i32, i8*, i8*, i64)*, void (i8*, %struct.sqlite3*, i32, i8*)*, void (i8*, %struct.sqlite3*, i32, i8*)*, i8*, %struct.Mem*, i8*, i8*, %struct.anon, i32 (i8*, i32, i8*, i8*, i8*, i8*)*, i8*, i32 (i8*)*, i8*, i32, %struct.Hash, %struct.Table*, %struct.sqlite3_vtab**, i32, %struct.Hash, %struct.Hash, %struct.BusyHandler, i32, [2 x %struct.Db], i8 }
+ %struct.sqlite3InitInfo = type { i32, i32, i8 }
+ %struct.sqlite3_context = type { %struct.FuncDef*, %struct.VdbeFunc*, %struct.Mem, %struct.Mem*, i32, %struct.CollSeq* }
+ %struct.sqlite3_file = type { %struct.sqlite3_io_methods* }
+ %struct.sqlite3_index_constraint = type { i32, i8, i8, i32 }
+ %struct.sqlite3_index_constraint_usage = type { i32, i8 }
+ %struct.sqlite3_index_info = type { i32, %struct.sqlite3_index_constraint*, i32, %struct.sqlite3_index_constraint_usage*, %struct.sqlite3_index_constraint_usage*, i32, i8*, i32, i32, double }
+ %struct.sqlite3_io_methods = type { i32, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i64)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i64*)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i32, i8*)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*)* }
+ %struct.sqlite3_module = type { i32, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_index_info*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_vtab_cursor**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, i32, i8*, i32, %struct.Mem**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, %struct.sqlite3_context*, i32)*, i32 (%struct.sqlite3_vtab_cursor*, i64*)*, i32 (%struct.sqlite3_vtab*, i32, %struct.Mem**, i64*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, i32, i8*, void (%struct.sqlite3_context*, i32, %struct.Mem**)**, i8**)*, i32 (%struct.sqlite3_vtab*, i8*)* }
+ %struct.sqlite3_mutex = type opaque
+ %struct.sqlite3_vfs = type { i32, i32, i32, %struct.sqlite3_vfs*, i8*, i8*, i32 (%struct.sqlite3_vfs*, i8*, %struct.sqlite3_file*, i32, i32*)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i8*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*)*, void (%struct.sqlite3_vfs*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*, i8*)*, void (%struct.sqlite3_vfs*, i8*)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i32)*, i32 (%struct.sqlite3_vfs*, double*)* }
+ %struct.sqlite3_vtab = type { %struct.sqlite3_module*, i32, i8* }
+ %struct.sqlite3_vtab_cursor = type { %struct.sqlite3_vtab* }
+
+define fastcc void @sqlite3Insert(%struct.Parse* %pParse, %struct.SrcList* %pTabList, %struct.ExprList* %pList, %struct.Select* %pSelect, %struct.IdList* %pColumn, i32 %onError) nounwind {
+entry:
+ br i1 false, label %bb54, label %bb69.loopexit
+
+bb54: ; preds = %entry
+ br label %bb69.loopexit
+
+bb59: ; preds = %bb63.preheader
+ %0 = load %struct..4sPragmaType** %3, align 4 ; <%struct..4sPragmaType*> [#uses=0]
+ br label %bb65
+
+bb65: ; preds = %bb63.preheader, %bb59
+ %1 = load %struct..4sPragmaType** %4, align 4 ; <%struct..4sPragmaType*> [#uses=0]
+ br i1 false, label %bb67, label %bb63.preheader
+
+bb67: ; preds = %bb65
+ %2 = getelementptr %struct.IdList* %pColumn, i32 0, i32 0 ; <%struct..4sPragmaType**> [#uses=0]
+ unreachable
+
+bb69.loopexit: ; preds = %bb54, %entry
+ %3 = getelementptr %struct.IdList* %pColumn, i32 0, i32 0 ; <%struct..4sPragmaType**> [#uses=1]
+ %4 = getelementptr %struct.IdList* %pColumn, i32 0, i32 0 ; <%struct..4sPragmaType**> [#uses=1]
+ br label %bb63.preheader
+
+bb63.preheader: ; preds = %bb69.loopexit, %bb65
+ br i1 false, label %bb59, label %bb65
+}
diff --git a/test/Transforms/GVN/2009-02-17-LoadPRECrash.ll b/test/Transforms/GVN/2009-02-17-LoadPRECrash.ll
new file mode 100644
index 0000000..c2d57a1
--- /dev/null
+++ b/test/Transforms/GVN/2009-02-17-LoadPRECrash.ll
@@ -0,0 +1,193 @@
+; RUN: opt < %s -gvn -enable-load-pre -disable-output
+
+ %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] }
+ %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base }
+ %struct.block_symbol = type { [3 x %struct.cgraph_rtl_info], %struct.object_block*, i64 }
+ %struct.cgraph_rtl_info = type { i32 }
+ %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.section = type { %struct.unnamed_section }
+ %struct.u = type { %struct.block_symbol }
+ %struct.unnamed_section = type { %struct.cgraph_rtl_info, void (i8*)*, i8*, %struct.section* }
+
+declare %struct.rtvec_def* @gen_rtvec(i32, ...)
+
+declare %struct.rtx_def* @plus_constant(%struct.rtx_def*, i64)
+
+declare %struct.rtx_def* @gen_rtx_fmt_Ei(i32, i32, %struct.rtvec_def*, i32)
+
+declare i32 @local_symbolic_operand(%struct.rtx_def*, i32)
+
+define %struct.rtx_def* @legitimize_pic_address(%struct.rtx_def* %orig, %struct.rtx_def* %reg) nounwind {
+entry:
+ %addr = alloca %struct.rtx_def* ; <%struct.rtx_def**> [#uses=5]
+ %iftmp.1532 = alloca %struct.rtx_def* ; <%struct.rtx_def**> [#uses=3]
+ store %struct.rtx_def* %orig, %struct.rtx_def** null
+ %0 = load %struct.rtx_def** null, align 4 ; <%struct.rtx_def*> [#uses=0]
+ br i1 false, label %bb96, label %bb59
+
+bb59: ; preds = %entry
+ %1 = load %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=1]
+ %2 = call i32 @local_symbolic_operand(%struct.rtx_def* %1, i32 0) nounwind ; <i32> [#uses=0]
+ br i1 false, label %bb96, label %bb63
+
+bb63: ; preds = %bb59
+ br i1 false, label %bb64, label %bb74
+
+bb64: ; preds = %bb63
+ br i1 false, label %bb72, label %bb65
+
+bb65: ; preds = %bb64
+ br label %bb72
+
+bb72: ; preds = %bb65, %bb64
+ br label %bb74
+
+bb74: ; preds = %bb72, %bb63
+ br i1 false, label %bb75, label %bb76
+
+bb75: ; preds = %bb74
+ br label %bb76
+
+bb76: ; preds = %bb75, %bb74
+ br i1 false, label %bb77, label %bb84
+
+bb77: ; preds = %bb76
+ %3 = getelementptr [1 x %struct.cgraph_rtl_info]* null, i32 0, i32 0 ; <%struct.cgraph_rtl_info*> [#uses=0]
+ unreachable
+
+bb84: ; preds = %bb76
+ br i1 false, label %bb85, label %bb86
+
+bb85: ; preds = %bb84
+ br label %bb87
+
+bb86: ; preds = %bb84
+ br label %bb87
+
+bb87: ; preds = %bb86, %bb85
+ %4 = call %struct.rtx_def* @gen_rtx_fmt_Ei(i32 16, i32 0, %struct.rtvec_def* null, i32 1) nounwind ; <%struct.rtx_def*> [#uses=0]
+ br i1 false, label %bb89, label %bb90
+
+bb89: ; preds = %bb87
+ br label %bb91
+
+bb90: ; preds = %bb87
+ br label %bb91
+
+bb91: ; preds = %bb90, %bb89
+ br i1 false, label %bb92, label %bb93
+
+bb92: ; preds = %bb91
+ br label %bb94
+
+bb93: ; preds = %bb91
+ br label %bb94
+
+bb94: ; preds = %bb93, %bb92
+ unreachable
+
+bb96: ; preds = %bb59, %entry
+ %5 = load %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=1]
+ %6 = getelementptr %struct.rtx_def* %5, i32 0, i32 0 ; <i16*> [#uses=1]
+ %7 = load i16* %6, align 2 ; <i16> [#uses=0]
+ br i1 false, label %bb147, label %bb97
+
+bb97: ; preds = %bb96
+ %8 = load %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=0]
+ br i1 false, label %bb147, label %bb99
+
+bb99: ; preds = %bb97
+ unreachable
+
+bb147: ; preds = %bb97, %bb96
+ %9 = load %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=1]
+ %10 = getelementptr %struct.rtx_def* %9, i32 0, i32 0 ; <i16*> [#uses=1]
+ %11 = load i16* %10, align 2 ; <i16> [#uses=0]
+ br i1 false, label %bb164, label %bb148
+
+bb148: ; preds = %bb147
+ br i1 false, label %bb164, label %bb149
+
+bb149: ; preds = %bb148
+ br i1 false, label %bb150, label %bb152
+
+bb150: ; preds = %bb149
+ unreachable
+
+bb152: ; preds = %bb149
+ br label %bb164
+
+bb164: ; preds = %bb152, %bb148, %bb147
+ %12 = getelementptr [1 x %struct.cgraph_rtl_info]* null, i32 0, i32 1 ; <%struct.cgraph_rtl_info*> [#uses=0]
+ br i1 false, label %bb165, label %bb166
+
+bb165: ; preds = %bb164
+ br label %bb167
+
+bb166: ; preds = %bb164
+ br label %bb167
+
+bb167: ; preds = %bb166, %bb165
+ br i1 false, label %bb211, label %bb168
+
+bb168: ; preds = %bb167
+ br i1 false, label %bb211, label %bb170
+
+bb170: ; preds = %bb168
+ br i1 false, label %bb172, label %bb181
+
+bb172: ; preds = %bb170
+ br i1 false, label %bb179, label %bb174
+
+bb174: ; preds = %bb172
+ br i1 false, label %bb177, label %bb175
+
+bb175: ; preds = %bb174
+ br i1 false, label %bb177, label %bb176
+
+bb176: ; preds = %bb175
+ br label %bb178
+
+bb177: ; preds = %bb175, %bb174
+ br label %bb178
+
+bb178: ; preds = %bb177, %bb176
+ br label %bb180
+
+bb179: ; preds = %bb172
+ br label %bb180
+
+bb180: ; preds = %bb179, %bb178
+ br label %bb181
+
+bb181: ; preds = %bb180, %bb170
+ %13 = call %struct.rtvec_def* (i32, ...)* @gen_rtvec(i32 1, %struct.rtx_def* null) nounwind ; <%struct.rtvec_def*> [#uses=0]
+ unreachable
+
+bb211: ; preds = %bb168, %bb167
+ %14 = load %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=0]
+ %15 = getelementptr [1 x %struct.cgraph_rtl_info]* null, i32 0, i32 0 ; <%struct.cgraph_rtl_info*> [#uses=0]
+ store %struct.rtx_def* null, %struct.rtx_def** null, align 4
+ br i1 false, label %bb212, label %bb213
+
+bb212: ; preds = %bb211
+ store %struct.rtx_def* null, %struct.rtx_def** %iftmp.1532, align 4
+ br label %bb214
+
+bb213: ; preds = %bb211
+ store %struct.rtx_def* null, %struct.rtx_def** %iftmp.1532, align 4
+ br label %bb214
+
+bb214: ; preds = %bb213, %bb212
+ %16 = bitcast %struct.block_symbol* null to [1 x %struct.cgraph_rtl_info]* ; <[1 x %struct.cgraph_rtl_info]*> [#uses=1]
+ %17 = getelementptr [1 x %struct.cgraph_rtl_info]* %16, i32 0, i32 1 ; <%struct.cgraph_rtl_info*> [#uses=0]
+ %18 = load %struct.rtx_def** %iftmp.1532, align 4 ; <%struct.rtx_def*> [#uses=0]
+ %19 = getelementptr %struct.rtx_def* null, i32 0, i32 3 ; <%struct.u*> [#uses=1]
+ %20 = getelementptr %struct.u* %19, i32 0, i32 0 ; <%struct.block_symbol*> [#uses=1]
+ %21 = bitcast %struct.block_symbol* %20 to [1 x i64]* ; <[1 x i64]*> [#uses=1]
+ %22 = getelementptr [1 x i64]* %21, i32 0, i32 0 ; <i64*> [#uses=0]
+ %23 = call %struct.rtx_def* @plus_constant(%struct.rtx_def* null, i64 0) nounwind ; <%struct.rtx_def*> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/GVN/2009-03-05-dbg.ll b/test/Transforms/GVN/2009-03-05-dbg.ll
new file mode 100644
index 0000000..cad3312
--- /dev/null
+++ b/test/Transforms/GVN/2009-03-05-dbg.ll
@@ -0,0 +1,66 @@
+; RUN: opt < %s -gvn -disable-output
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
[email protected]_unit298 = external constant %llvm.dbg.compile_unit.type ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+define i8* @__deregister_frame_info_bases(i8* %begin) {
+entry:
+ br i1 false, label %bb17, label %bb
+
+bb: ; preds = %entry
+ br i1 false, label %bb17, label %bb6.preheader
+
+bb6.preheader: ; preds = %bb
+ br label %bb6
+
+bb3: ; preds = %bb6
+ br i1 false, label %bb4, label %bb6
+
+bb4: ; preds = %bb3
+ br label %out
+
+bb6: ; preds = %bb3, %bb6.preheader
+ br i1 false, label %bb14.loopexit, label %bb3
+
+bb8: ; preds = %bb14
+ br i1 false, label %bb9, label %bb11
+
+bb9: ; preds = %bb8
+ br i1 false, label %bb10, label %bb13
+
+bb10: ; preds = %bb9
+ br label %out
+
+bb11: ; preds = %bb8
+ br i1 false, label %bb12, label %bb13
+
+bb12: ; preds = %bb11
+ br label %out
+
+bb13: ; preds = %bb11, %bb9
+ br label %bb14
+
+bb14.loopexit: ; preds = %bb6
+ br label %bb14
+
+bb14: ; preds = %bb14.loopexit, %bb13
+ br i1 false, label %bb15.loopexit, label %bb8
+
+out: ; preds = %bb12, %bb10, %bb4
+ tail call void @llvm.dbg.stoppoint(i32 217, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit298 to { }*))
+ br i1 false, label %bb15, label %bb16
+
+bb15.loopexit: ; preds = %bb14
+ br label %bb15
+
+bb15: ; preds = %bb15.loopexit, %out
+ tail call void @llvm.dbg.stoppoint(i32 217, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit298 to { }*))
+ unreachable
+
+bb16: ; preds = %out
+ ret i8* null
+
+bb17: ; preds = %bb, %entry
+ ret i8* null
+}
diff --git a/test/Transforms/GVN/2009-03-10-PREOnVoid.ll b/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
new file mode 100644
index 0000000..89d6a5f
--- /dev/null
+++ b/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
@@ -0,0 +1,82 @@
+; RUN: opt < %s -gvn -disable-output
+; PR3775
+
+; ModuleID = 'bugpoint-reduced-simplified.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %"struct.__gnu_cxx::hash<void*>" = type <{ i8 }>
+ %struct.__sched_param = type { i32 }
+ %struct._pthread_descr_struct = type opaque
+ %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 }
+ %struct.pthread_mutex_t = type { i32, i32, %struct._pthread_descr_struct*, i32, %llvm.dbg.anchor.type }
+ %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >" = type { %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >::_Rb_tree_impl<std::less<void*>,false>" }
+ %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >::_Rb_tree_impl<std::less<void*>,false>" = type { %"struct.__gnu_cxx::hash<void*>", %"struct.std::_Rb_tree_node_base", i32 }
+ %"struct.std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >" = type { %"struct.std::_Rb_tree_node_base"* }
+ %"struct.std::_Rb_tree_node_base" = type { i32, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"* }
+ %"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>" = type { %"struct.std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >", i8 }
+ %"struct.std::pair<void* const,void*>" = type { i8*, i8* }
+
+@_ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+@_ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
+@_ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_createPmPK16__pthread_attr_sPFPvS3_ES3_ = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_cancelm = alias weak i32 (i32)* @pthread_cancel ; <i32 (i32)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%struct.pthread_mutex_t*, %struct.__sched_param*)* @pthread_mutex_init ; <i32 (%struct.pthread_mutex_t*, %struct.__sched_param*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
+@_ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%struct.__sched_param*)* @pthread_mutexattr_init ; <i32 (%struct.__sched_param*)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%struct.__sched_param*, i32)* @pthread_mutexattr_settype ; <i32 (%struct.__sched_param*, i32)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%struct.__sched_param*)* @pthread_mutexattr_destroy ; <i32 (%struct.__sched_param*)*> [#uses=0]
+
+declare fastcc void @_ZNSt10_Select1stISt4pairIKPvS1_EEC1Ev() nounwind readnone
+
+define fastcc void @_ZNSt8_Rb_treeIPvSt4pairIKS0_S0_ESt10_Select1stIS3_ESt4lessIS0_ESaIS3_EE16_M_insert_uniqueERKS3_(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>"* noalias nocapture sret %agg.result, %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >"* %this, %"struct.std::pair<void* const,void*>"* %__v) nounwind {
+entry:
+ br i1 false, label %bb7, label %bb
+
+bb: ; preds = %bb, %entry
+ br i1 false, label %bb5, label %bb
+
+bb5: ; preds = %bb
+ call fastcc void @_ZNSt10_Select1stISt4pairIKPvS1_EEC1Ev() nounwind
+ br i1 false, label %bb11, label %bb7
+
+bb7: ; preds = %bb5, %entry
+ br label %bb11
+
+bb11: ; preds = %bb7, %bb5
+ call fastcc void @_ZNSt10_Select1stISt4pairIKPvS1_EEC1Ev() nounwind
+ unreachable
+}
+
+declare i32 @pthread_once(i32*, void ()*)
+
+declare i8* @pthread_getspecific(i32)
+
+declare i32 @pthread_setspecific(i32, i8*)
+
+declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare i32 @pthread_cancel(i32)
+
+declare i32 @pthread_mutex_lock(%struct.pthread_mutex_t*)
+
+declare i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*)
+
+declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*)
+
+declare i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %struct.__sched_param*)
+
+declare i32 @pthread_key_create(i32*, void (i8*)*)
+
+declare i32 @pthread_key_delete(i32)
+
+declare i32 @pthread_mutexattr_init(%struct.__sched_param*)
+
+declare i32 @pthread_mutexattr_settype(%struct.__sched_param*, i32)
+
+declare i32 @pthread_mutexattr_destroy(%struct.__sched_param*)
diff --git a/test/Transforms/GVN/2009-06-17-InvalidPRE.ll b/test/Transforms/GVN/2009-06-17-InvalidPRE.ll
new file mode 100644
index 0000000..6ac6072
--- /dev/null
+++ b/test/Transforms/GVN/2009-06-17-InvalidPRE.ll
@@ -0,0 +1,72 @@
+; RUN: opt < %s -gvn -enable-load-pre -S | not grep pre1
+; GVN load pre was hoisting the loads at %13 and %16 up to bb4.outer.
+; This is invalid as it bypasses the check for %m.0.ph==null in bb4.
+; ModuleID = 'mbuf.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ %struct.mbuf = type { %struct.mbuf*, %struct.mbuf*, i32, i8*, i16, i16, i32 }
+
+define void @m_adj(%struct.mbuf* %mp, i32 %req_len) nounwind optsize {
+entry:
+ %0 = icmp eq %struct.mbuf* %mp, null ; <i1> [#uses=1]
+ %1 = icmp slt i32 %req_len, 0 ; <i1> [#uses=1]
+ %or.cond = or i1 %1, %0 ; <i1> [#uses=1]
+ br i1 %or.cond, label %return, label %bb4.preheader
+
+bb4.preheader: ; preds = %entry
+ br label %bb4.outer
+
+bb2: ; preds = %bb1
+ %2 = sub i32 %len.0, %13 ; <i32> [#uses=1]
+ %3 = getelementptr %struct.mbuf* %m.0.ph, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 0, i32* %3, align 4
+ %4 = getelementptr %struct.mbuf* %m.0.ph, i32 0, i32 0 ; <%struct.mbuf**> [#uses=1]
+ %5 = load %struct.mbuf** %4, align 4 ; <%struct.mbuf*> [#uses=1]
+ br label %bb4.outer
+
+bb4.outer: ; preds = %bb4.preheader, %bb2
+ %m.0.ph = phi %struct.mbuf* [ %5, %bb2 ], [ %mp, %bb4.preheader ] ; <%struct.mbuf*> [#uses=7]
+ %len.0.ph = phi i32 [ %2, %bb2 ], [ %req_len, %bb4.preheader ] ; <i32> [#uses=1]
+ %6 = icmp ne %struct.mbuf* %m.0.ph, null ; <i1> [#uses=1]
+ %7 = getelementptr %struct.mbuf* %m.0.ph, i32 0, i32 2 ; <i32*> [#uses=1]
+ %8 = getelementptr %struct.mbuf* %m.0.ph, i32 0, i32 2 ; <i32*> [#uses=1]
+ %9 = getelementptr %struct.mbuf* %m.0.ph, i32 0, i32 3 ; <i8**> [#uses=1]
+ %10 = getelementptr %struct.mbuf* %m.0.ph, i32 0, i32 3 ; <i8**> [#uses=1]
+ br label %bb4
+
+bb4: ; preds = %bb4.outer, %bb3
+ %len.0 = phi i32 [ 0, %bb3 ], [ %len.0.ph, %bb4.outer ] ; <i32> [#uses=6]
+ %11 = icmp sgt i32 %len.0, 0 ; <i1> [#uses=1]
+ %12 = and i1 %11, %6 ; <i1> [#uses=1]
+ br i1 %12, label %bb1, label %bb7
+
+bb1: ; preds = %bb4
+ %13 = load i32* %7, align 4 ; <i32> [#uses=3]
+ %14 = icmp sgt i32 %13, %len.0 ; <i1> [#uses=1]
+ br i1 %14, label %bb3, label %bb2
+
+bb3: ; preds = %bb1
+ %15 = sub i32 %13, %len.0 ; <i32> [#uses=1]
+ store i32 %15, i32* %8, align 4
+ %16 = load i8** %9, align 4 ; <i8*> [#uses=1]
+ %17 = getelementptr i8* %16, i32 %len.0 ; <i8*> [#uses=1]
+ store i8* %17, i8** %10, align 4
+ br label %bb4
+
+bb7: ; preds = %bb4
+ %18 = getelementptr %struct.mbuf* %mp, i32 0, i32 5 ; <i16*> [#uses=1]
+ %19 = load i16* %18, align 2 ; <i16> [#uses=1]
+ %20 = zext i16 %19 to i32 ; <i32> [#uses=1]
+ %21 = and i32 %20, 2 ; <i32> [#uses=1]
+ %22 = icmp eq i32 %21, 0 ; <i1> [#uses=1]
+ br i1 %22, label %return, label %bb8
+
+bb8: ; preds = %bb7
+ %23 = sub i32 %req_len, %len.0 ; <i32> [#uses=1]
+ %24 = getelementptr %struct.mbuf* %mp, i32 0, i32 6 ; <i32*> [#uses=1]
+ store i32 %23, i32* %24, align 4
+ ret void
+
+return: ; preds = %bb7, %entry
+ ret void
+}
diff --git a/test/Transforms/GVN/2009-07-13-MemDepSortFail.ll b/test/Transforms/GVN/2009-07-13-MemDepSortFail.ll
new file mode 100644
index 0000000..641e920
--- /dev/null
+++ b/test/Transforms/GVN/2009-07-13-MemDepSortFail.ll
@@ -0,0 +1,67 @@
+; RUN: opt < %s -gvn | llvm-dis
+; PR4256
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-linux-gnu"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %struct.cset = type { i8*, i8, i8, i32, i8* }
+ %struct.lmat = type { %struct.re_guts*, i32, %llvm.dbg.anchor.type*, i8*, i8*, i8*, i8*, i8**, i32, i8*, i8*, i8*, i8*, i8* }
+ %struct.re_guts = type { i32*, %struct.cset*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, [1 x i8] }
+
+define i8* @lbackref(%struct.lmat* %m, i8* %start, i8* %stop, i32 %startst, i32 %stopst, i32 %lev, i32 %rec) nounwind {
+entry:
+ br label %bb63
+
+bb: ; preds = %bb63
+ switch i32 0, label %bb62 [
+ i32 268435456, label %bb2
+ i32 805306368, label %bb9
+ i32 -1610612736, label %bb51
+ ]
+
+bb2: ; preds = %bb
+ br label %bb62
+
+bb9: ; preds = %bb
+ %0 = load i8* %sp.1, align 1 ; <i8> [#uses=0]
+ br label %bb62
+
+bb51: ; preds = %bb
+ %1 = load i8* %sp.1, align 1 ; <i8> [#uses=0]
+ ret i8* null
+
+bb62: ; preds = %bb9, %bb2, %bb
+ br label %bb63
+
+bb63: ; preds = %bb84, %bb69, %bb62, %entry
+ %sp.1 = phi i8* [ null, %bb62 ], [ %sp.1.lcssa, %bb84 ], [ %start, %entry ], [ %sp.1.lcssa, %bb69 ] ; <i8*> [#uses=3]
+ br i1 false, label %bb, label %bb65
+
+bb65: ; preds = %bb63
+ %sp.1.lcssa = phi i8* [ %sp.1, %bb63 ] ; <i8*> [#uses=4]
+ br i1 false, label %bb66, label %bb69
+
+bb66: ; preds = %bb65
+ ret i8* null
+
+bb69: ; preds = %bb65
+ switch i32 0, label %bb108.loopexit2.loopexit.loopexit [
+ i32 1342177280, label %bb63
+ i32 1476395008, label %bb84
+ i32 1879048192, label %bb104
+ i32 2013265920, label %bb93
+ ]
+
+bb84: ; preds = %bb69
+ %2 = tail call i8* @lbackref(%struct.lmat* %m, i8* %sp.1.lcssa, i8* %stop, i32 0, i32 %stopst, i32 0, i32 0) nounwind ; <i8*> [#uses=0]
+ br label %bb63
+
+bb93: ; preds = %bb69
+ ret i8* null
+
+bb104: ; preds = %bb69
+ %sp.1.lcssa.lcssa33 = phi i8* [ %sp.1.lcssa, %bb69 ] ; <i8*> [#uses=0]
+ unreachable
+
+bb108.loopexit2.loopexit.loopexit: ; preds = %bb69
+ ret i8* null
+}
diff --git a/test/Transforms/GVN/2009-11-12-MemDepMallocBitCast.ll b/test/Transforms/GVN/2009-11-12-MemDepMallocBitCast.ll
new file mode 100644
index 0000000..b433297
--- /dev/null
+++ b/test/Transforms/GVN/2009-11-12-MemDepMallocBitCast.ll
@@ -0,0 +1,15 @@
+; Test to make sure malloc's bitcast does not block detection of a store
+; to aliased memory; GVN should not optimize away the load in this program.
+; RUN: opt < %s -gvn -S | FileCheck %s
+
+define i64 @test() {
+ %1 = tail call i8* @malloc(i64 mul (i64 4, i64 ptrtoint (i64* getelementptr (i64* null, i64 1) to i64))) ; <i8*> [#uses=2]
+ store i8 42, i8* %1
+ %X = bitcast i8* %1 to i64* ; <i64*> [#uses=1]
+ %Y = load i64* %X ; <i64> [#uses=1]
+ ret i64 %Y
+; CHECK: %Y = load i64* %X
+; CHECK: ret i64 %Y
+}
+
+declare noalias i8* @malloc(i64)
diff --git a/test/Transforms/GVN/basic.ll b/test/Transforms/GVN/basic.ll
new file mode 100644
index 0000000..1decafa
--- /dev/null
+++ b/test/Transforms/GVN/basic.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -gvn -S | not grep {%z2 =}
+
+define i32 @main() {
+block1:
+ %z1 = bitcast i32 0 to i32
+ br label %block2
+block2:
+ %z2 = bitcast i32 0 to i32
+ ret i32 %z2
+}
diff --git a/test/Transforms/GVN/bitcast-of-call.ll b/test/Transforms/GVN/bitcast-of-call.ll
new file mode 100644
index 0000000..55b4b6e
--- /dev/null
+++ b/test/Transforms/GVN/bitcast-of-call.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -gvn -S | not grep tmp2
+; PR2213
+
+define i32* @f(i8* %x) {
+entry:
+ %tmp = call i8* @m( i32 12 ) ; <i8*> [#uses=2]
+ %tmp1 = bitcast i8* %tmp to i32* ; <i32*> [#uses=0]
+ %tmp2 = bitcast i8* %tmp to i32* ; <i32*> [#uses=0]
+ ret i32* %tmp2
+}
+
+declare i8* @m(i32)
diff --git a/test/Transforms/GVN/calls-nonlocal.ll b/test/Transforms/GVN/calls-nonlocal.ll
new file mode 100644
index 0000000..f0edf09
--- /dev/null
+++ b/test/Transforms/GVN/calls-nonlocal.ll
@@ -0,0 +1,49 @@
+; RUN: opt < %s -gvn -S | grep strlen | count 2
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+
+define i32 @test(i32 %g, i8* %P) nounwind {
+entry:
+ %tmp2 = call i32 @strlen( i8* %P ) nounwind readonly ; <i32> [#uses=1]
+ %tmp3 = icmp eq i32 %tmp2, 100 ; <i1> [#uses=1]
+ %tmp34 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb6
+
+bb: ; preds = %entry
+ br label %bb27
+
+bb6: ; preds = %entry
+ %tmp8 = add i32 %g, 42 ; <i32> [#uses=2]
+ %tmp10 = call i32 @strlen( i8* %P ) nounwind readonly ; <i32> [#uses=1]
+ %tmp11 = icmp eq i32 %tmp10, 100 ; <i1> [#uses=1]
+ %tmp1112 = zext i1 %tmp11 to i8 ; <i8> [#uses=1]
+ %toBool13 = icmp ne i8 %tmp1112, 0 ; <i1> [#uses=1]
+ br i1 %toBool13, label %bb14, label %bb16
+
+bb14: ; preds = %bb6
+ br label %bb27
+
+bb16: ; preds = %bb6
+ %tmp18 = mul i32 %tmp8, 2 ; <i32> [#uses=1]
+ %tmp20 = call i32 @strlen( i8* %P ) nounwind readonly ; <i32> [#uses=1]
+ %tmp21 = icmp eq i32 %tmp20, 100 ; <i1> [#uses=1]
+ %tmp2122 = zext i1 %tmp21 to i8 ; <i8> [#uses=1]
+ %toBool23 = icmp ne i8 %tmp2122, 0 ; <i1> [#uses=1]
+ br i1 %toBool23, label %bb24, label %bb26
+
+bb24: ; preds = %bb16
+ br label %bb27
+
+bb26: ; preds = %bb16
+ br label %bb27
+
+bb27: ; preds = %bb26, %bb24, %bb14, %bb
+ %tmp.0 = phi i32 [ 11, %bb26 ], [ %tmp18, %bb24 ], [ %tmp8, %bb14 ], [ %g, %bb ] ; <i32> [#uses=1]
+ br label %return
+
+return: ; preds = %bb27
+ ret i32 %tmp.0
+}
+
+declare i32 @strlen(i8*) nounwind readonly
diff --git a/test/Transforms/GVN/calls-readonly.ll b/test/Transforms/GVN/calls-readonly.ll
new file mode 100644
index 0000000..97ec915
--- /dev/null
+++ b/test/Transforms/GVN/calls-readonly.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -basicaa -gvn -S | grep {call.*strlen} | count 1
+; Should delete the second call to strlen even though the intervening strchr call exists.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i8* @test(i8* %P, i8* %Q, i32 %x, i32 %y) nounwind readonly {
+entry:
+ %0 = tail call i32 @strlen(i8* %P) ; <i32> [#uses=2]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb, label %bb1
+
+bb: ; preds = %entry
+ %2 = sdiv i32 %x, %y ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %x_addr.0 = phi i32 [ %2, %bb ], [ %x, %entry ] ; <i32> [#uses=1]
+ %3 = tail call i8* @strchr(i8* %Q, i32 97) ; <i8*> [#uses=1]
+ %4 = tail call i32 @strlen(i8* %P) ; <i32> [#uses=1]
+ %5 = add i32 %x_addr.0, %0 ; <i32> [#uses=1]
+ %.sum = sub i32 %5, %4 ; <i32> [#uses=1]
+ %6 = getelementptr i8* %3, i32 %.sum ; <i8*> [#uses=1]
+ ret i8* %6
+}
+
+declare i32 @strlen(i8*) nounwind readonly
+
+declare i8* @strchr(i8*, i32) nounwind readonly
diff --git a/test/Transforms/GVN/condprop.ll b/test/Transforms/GVN/condprop.ll
new file mode 100644
index 0000000..e212d79
--- /dev/null
+++ b/test/Transforms/GVN/condprop.ll
@@ -0,0 +1,52 @@
+; RUN: opt < %s -gvn -S | grep {br i1 false}
+
+@a = external global i32 ; <i32*> [#uses=7]
+
+define i32 @foo() nounwind {
+entry:
+ %0 = load i32* @a, align 4 ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 4 ; <i1> [#uses=1]
+ br i1 %1, label %bb, label %bb1
+
+bb: ; preds = %entry
+ br label %bb8
+
+bb1: ; preds = %entry
+ %2 = load i32* @a, align 4 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 5 ; <i1> [#uses=1]
+ br i1 %3, label %bb2, label %bb3
+
+bb2: ; preds = %bb1
+ br label %bb8
+
+bb3: ; preds = %bb1
+ %4 = load i32* @a, align 4 ; <i32> [#uses=1]
+ %5 = icmp eq i32 %4, 4 ; <i1> [#uses=1]
+ br i1 %5, label %bb4, label %bb5
+
+bb4: ; preds = %bb3
+ %6 = load i32* @a, align 4 ; <i32> [#uses=1]
+ %7 = add i32 %6, 5 ; <i32> [#uses=1]
+ br label %bb8
+
+bb5: ; preds = %bb3
+ %8 = load i32* @a, align 4 ; <i32> [#uses=1]
+ %9 = icmp eq i32 %8, 5 ; <i1> [#uses=1]
+ br i1 %9, label %bb6, label %bb7
+
+bb6: ; preds = %bb5
+ %10 = load i32* @a, align 4 ; <i32> [#uses=1]
+ %11 = add i32 %10, 4 ; <i32> [#uses=1]
+ br label %bb8
+
+bb7: ; preds = %bb5
+ %12 = load i32* @a, align 4 ; <i32> [#uses=1]
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb
+ %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] ; <i32> [#uses=1]
+ br label %return
+
+return: ; preds = %bb8
+ ret i32 %.0
+}
diff --git a/test/Transforms/GVN/crash-no-aa.ll b/test/Transforms/GVN/crash-no-aa.ll
new file mode 100644
index 0000000..dae65dd
--- /dev/null
+++ b/test/Transforms/GVN/crash-no-aa.ll
@@ -0,0 +1,16 @@
+; RUN: opt -no-aa -gvn -S %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v1
+28:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-freebsd8.0"
+
+; PR5744
+define i32 @test1({i16, i32} *%P) {
+ %P2 = getelementptr {i16, i32} *%P, i32 0, i32 0
+ store i16 42, i16* %P2
+
+ %P3 = getelementptr {i16, i32} *%P, i32 0, i32 1
+ %V = load i32* %P3
+ ret i32 %V
+}
+
diff --git a/test/Transforms/GVN/crash.ll b/test/Transforms/GVN/crash.ll
new file mode 100644
index 0000000..9167b6e
--- /dev/null
+++ b/test/Transforms/GVN/crash.ll
@@ -0,0 +1,137 @@
+; RUN: opt -gvn %s -disable-output
+
+; PR5631
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0"
+
+define i32* @peel_to_type(i8* %name, i32 %namelen, i32* %o, i32 %expected_type) nounwind ssp {
+entry:
+ br i1 undef, label %if.end13, label %while.body.preheader
+
+
+if.end13: ; preds = %if.then6
+ br label %while.body.preheader
+
+while.body.preheader: ; preds = %if.end13, %if.end
+ br label %while.body
+
+while.body: ; preds = %while.body.backedge, %while.body.preheader
+ %o.addr.0 = phi i32* [ undef, %while.body.preheader ], [ %o.addr.0.be, %while.body.backedge ] ; <i32*> [#uses=2]
+ br i1 false, label %return.loopexit, label %lor.lhs.false
+
+lor.lhs.false: ; preds = %while.body
+ %tmp20 = bitcast i32* %o.addr.0 to i32* ; <i32*> [#uses=1]
+ %tmp22 = load i32* %tmp20 ; <i32> [#uses=0]
+ br i1 undef, label %land.lhs.true24, label %if.end31
+
+land.lhs.true24: ; preds = %lor.lhs.false
+ %call28 = call i32* @parse_object(i8* undef) nounwind ; <i32*> [#uses=0]
+ br i1 undef, label %return.loopexit, label %if.end31
+
+if.end31: ; preds = %land.lhs.true24, %lor.lhs.false
+ br i1 undef, label %return.loopexit, label %if.end41
+
+if.end41: ; preds = %if.end31
+ %tmp43 = bitcast i32* %o.addr.0 to i32* ; <i32*> [#uses=1]
+ %tmp45 = load i32* %tmp43 ; <i32> [#uses=0]
+ br i1 undef, label %if.then50, label %if.else
+
+if.then50: ; preds = %if.end41
+ %tmp53 = load i32** undef ; <i32*> [#uses=1]
+ br label %while.body.backedge
+
+if.else: ; preds = %if.end41
+ br i1 undef, label %if.then62, label %if.else67
+
+if.then62: ; preds = %if.else
+ br label %while.body.backedge
+
+while.body.backedge: ; preds = %if.then62, %if.then50
+ %o.addr.0.be = phi i32* [ %tmp53, %if.then50 ], [ undef, %if.then62 ] ; <i32*> [#uses=1]
+ br label %while.body
+
+if.else67: ; preds = %if.else
+ ret i32* null
+
+return.loopexit: ; preds = %if.end31, %land.lhs.true24, %while.body
+ ret i32* undef
+}
+
+declare i32* @parse_object(i8*)
+
+
+
+
+
+
+%struct.attribute_spec = type { i8*, i32, i32, i8, i8, i8 }
+
+@attribute_tables = external global [4 x %struct.attribute_spec*] ; <[4 x %struct.attribute_spec*]*> [#uses=2]
+
+define void @decl_attributes() nounwind {
+entry:
+ br label %bb69.i
+
+bb69.i: ; preds = %bb57.i.preheader
+ %tmp4 = getelementptr inbounds [4 x %struct.attribute_spec*]* @attribute_tables, i32 0, i32 undef ; <%struct.attribute_spec**> [#uses=1]
+ %tmp3 = load %struct.attribute_spec** %tmp4, align 4 ; <%struct.attribute_spec*> [#uses=1]
+ br label %bb65.i
+
+bb65.i: ; preds = %bb65.i.preheader, %bb64.i
+ %storemerge6.i = phi i32 [ 1, %bb64.i ], [ 0, %bb69.i ] ; <i32> [#uses=3]
+ %scevgep14 = getelementptr inbounds %struct.attribute_spec* %tmp3, i32 %storemerge6.i, i32 0 ; <i8**> [#uses=1]
+ %tmp2 = load i8** %scevgep14, align 4 ; <i8*> [#uses=0]
+ %tmp = load %struct.attribute_spec** %tmp4, align 4 ; <%struct.attribute_spec*> [#uses=1]
+ %scevgep1516 = getelementptr inbounds %struct.attribute_spec* %tmp, i32 %storemerge6.i, i32 0 ; <i8**> [#uses=0]
+ unreachable
+
+bb64.i: ; Unreachable
+ br label %bb65.i
+
+bb66.i: ; Unreachable
+ br label %bb69.i
+}
+
+
+
+; rdar://7438974
+
+@g = external global i64, align 8
+
+define i32* @foo() {
+do.end17.i:
+ %tmp18.i = load i7** undef
+ %tmp1 = bitcast i7* %tmp18.i to i8*
+ br i1 undef, label %do.body36.i, label %if.then21.i
+
+if.then21.i:
+ %tmp2 = bitcast i7* %tmp18.i to i8*
+ ret i32* undef
+
+do.body36.i:
+ %ivar38.i = load i64* @g
+ %tmp3 = bitcast i7* %tmp18.i to i8*
+ %add.ptr39.sum.i = add i64 %ivar38.i, 8
+ %tmp40.i = getelementptr inbounds i8* %tmp3, i64 %add.ptr39.sum.i
+ %tmp4 = bitcast i8* %tmp40.i to i64*
+ %tmp41.i = load i64* %tmp4
+ br i1 undef, label %if.then48.i, label %do.body57.i
+
+if.then48.i:
+ %call54.i = call i32 @foo2()
+ br label %do.body57.i
+
+do.body57.i:
+ %tmp58.i = load i7** undef
+ %ivar59.i = load i64* @g
+ %tmp5 = bitcast i7* %tmp58.i to i8*
+ %add.ptr65.sum.i = add i64 %ivar59.i, 8
+ %tmp66.i = getelementptr inbounds i8* %tmp5, i64 %add.ptr65.sum.i
+ %tmp6 = bitcast i8* %tmp66.i to i64*
+ %tmp67.i = load i64* %tmp6
+ ret i32* undef
+}
+
+declare i32 @foo2()
+
diff --git a/test/Transforms/GVN/dg.exp b/test/Transforms/GVN/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/GVN/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/GVN/invariant-simple.ll b/test/Transforms/GVN/invariant-simple.ll
new file mode 100644
index 0000000..6de75f1
--- /dev/null
+++ b/test/Transforms/GVN/invariant-simple.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -gvn -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i8 @test(i8* %P) nounwind {
+; CHECK: @test
+; CHECK-NOT: load
+; CHECK: ret i8
+entry:
+ store i8 1, i8* %P
+ %0 = call {}* @llvm.invariant.start(i64 32, i8* %P)
+ %1 = tail call i32 @foo(i8* %P)
+ call void @llvm.invariant.end({}* %0, i64 32, i8* %P)
+ %2 = load i8* %P
+ ret i8 %2
+}
+
+define i8 @test2(i8* %P) nounwind {
+; CHECK: @test2
+; CHECK: store i8 1
+; CHECK: store i8 2
+; CHECK: ret i8 0
+entry:
+ store i8 1, i8* %P
+ %0 = call {}* @llvm.invariant.start(i64 32, i8* %P)
+ %1 = tail call i32 @bar(i8* %P)
+ call void @llvm.invariant.end({}* %0, i64 32, i8* %P)
+ store i8 2, i8* %P
+ ret i8 0
+}
+
+declare i32 @foo(i8*) nounwind
+declare i32 @bar(i8*) nounwind readonly
+declare {}* @llvm.invariant.start(i64 %S, i8* nocapture %P) readonly
+declare void @llvm.invariant.end({}* %S, i64 %SS, i8* nocapture %P)
\ No newline at end of file
diff --git a/test/Transforms/GVN/lifetime-simple.ll b/test/Transforms/GVN/lifetime-simple.ll
new file mode 100644
index 0000000..8139246
--- /dev/null
+++ b/test/Transforms/GVN/lifetime-simple.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -gvn -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i8 @test(i8* %P) nounwind {
+; CHECK: lifetime.start
+; CHECK-NOT: load
+; CHECK: lifetime.end
+entry:
+ call void @llvm.lifetime.start(i64 32, i8* %P)
+ %0 = load i8* %P
+ store i8 1, i8* %P
+ call void @llvm.lifetime.end(i64 32, i8* %P)
+ %1 = load i8* %P
+ ret i8 %1
+}
+
+declare {}* @llvm.lifetime.start(i64 %S, i8* nocapture %P) readonly
+declare void @llvm.lifetime.end(i64 %S, i8* nocapture %P)
\ No newline at end of file
diff --git a/test/Transforms/GVN/load-constant-mem.ll b/test/Transforms/GVN/load-constant-mem.ll
new file mode 100644
index 0000000..87f33ea
--- /dev/null
+++ b/test/Transforms/GVN/load-constant-mem.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -gvn -instcombine -S | grep {ret i32 0}
+; PR4189
+@G = external constant [4 x i32]
+
+define i32 @test(i8* %p, i32 %i) nounwind {
+entry:
+ %P = getelementptr [4 x i32]* @G, i32 0, i32 %i
+ %A = load i32* %P
+ store i8 4, i8* %p
+ %B = load i32* %P
+ %C = sub i32 %A, %B
+ ret i32 %C
+}
diff --git a/test/Transforms/GVN/load-pre-align.ll b/test/Transforms/GVN/load-pre-align.ll
new file mode 100644
index 0000000..3a66c0b
--- /dev/null
+++ b/test/Transforms/GVN/load-pre-align.ll
@@ -0,0 +1,44 @@
+; RUN: opt < %s -gvn -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+
+@p = external global i32
+
+define arm_apcscc i32 @test(i32 %n) nounwind {
+; CHECK: @test
+entry:
+ br label %for.cond
+
+; loads aligned greater than the memory should not be moved past conditionals
+; CHECK-NOT: load
+; CHECK: br i1
+
+for.cond:
+ %i.0 = phi i32 [ 0, %entry ], [ %indvar.next, %for.inc ]
+ %cmp = icmp slt i32 %i.0, %n
+ br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
+
+for.cond.for.end_crit_edge:
+; ...but PRE can still move the load out of for.end to here.
+; CHECK: for.cond.for.end_crit_edge:
+; CHECK-NEXT: load
+ br label %for.end
+
+for.body:
+ %tmp3 = load i32* @p, align 8
+ %dec = add i32 %tmp3, -1
+ store i32 %dec, i32* @p
+ %cmp6 = icmp slt i32 %dec, 0
+ br i1 %cmp6, label %for.body.for.end_crit_edge, label %for.inc
+
+for.body.for.end_crit_edge:
+ br label %for.end
+
+for.inc:
+ %indvar.next = add i32 %i.0, 1
+ br label %for.cond
+
+for.end:
+ %tmp9 = load i32* @p, align 8
+ ret i32 %tmp9
+}
diff --git a/test/Transforms/GVN/local-pre.ll b/test/Transforms/GVN/local-pre.ll
new file mode 100644
index 0000000..5f03984
--- /dev/null
+++ b/test/Transforms/GVN/local-pre.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -gvn -enable-pre -S | grep {b.pre}
+
+define i32 @main(i32 %p) {
+block1:
+
+ br i1 true, label %block2, label %block3
+
+block2:
+ %a = add i32 %p, 1
+ br label %block4
+
+block3:
+ br label %block4
+
+block4:
+ %b = add i32 %p, 1
+ ret i32 %b
+}
diff --git a/test/Transforms/GVN/lpre-call-wrap-2.ll b/test/Transforms/GVN/lpre-call-wrap-2.ll
new file mode 100644
index 0000000..79512a3
--- /dev/null
+++ b/test/Transforms/GVN/lpre-call-wrap-2.ll
@@ -0,0 +1,40 @@
+; RUN: opt -S -gvn -enable-load-pre %s | FileCheck %s
+;
+; The partially redundant load in bb1 should be hoisted to "bb". This comes
+; from this C code (GCC PR 23455):
+; unsigned outcnt; extern void flush_outbuf(void);
+; void bi_windup(unsigned char *outbuf, unsigned char bi_buf) {
+; outbuf[outcnt] = bi_buf;
+; if (outcnt == 16384)
+; flush_outbuf();
+; outbuf[outcnt] = bi_buf;
+; }
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+@outcnt = common global i32 0 ; <i32*> [#uses=3]
+
+define void @bi_windup(i8* %outbuf, i8 zeroext %bi_buf) nounwind {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = load i32* @outcnt, align 4 ; <i32> [#uses=1]
+ %1 = getelementptr i8* %outbuf, i32 %0 ; <i8*> [#uses=1]
+ store i8 %bi_buf, i8* %1, align 1
+ %2 = load i32* @outcnt, align 4 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 16384 ; <i1> [#uses=1]
+ br i1 %3, label %bb, label %bb1
+
+bb: ; preds = %entry
+ call void @flush_outbuf() nounwind
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+; CHECK: bb1:
+; CHECK-NEXT: phi
+; CHECK-NEXT: getelementptr
+ %4 = load i32* @outcnt, align 4 ; <i32> [#uses=1]
+ %5 = getelementptr i8* %outbuf, i32 %4 ; <i8*> [#uses=1]
+ store i8 %bi_buf, i8* %5, align 1
+ ret void
+}
+
+declare void @flush_outbuf()
diff --git a/test/Transforms/GVN/lpre-call-wrap.ll b/test/Transforms/GVN/lpre-call-wrap.ll
new file mode 100644
index 0000000..4046279
--- /dev/null
+++ b/test/Transforms/GVN/lpre-call-wrap.ll
@@ -0,0 +1,55 @@
+; RUN: opt -S -gvn -enable-load-pre %s | FileCheck %s
+;
+; Make sure the load in bb3.backedge is removed and moved into bb1 after the
+; call. This makes the non-call case faster.
+;
+; This test is derived from this C++ code (GCC PR 37810):
+; void g();
+; struct A {
+; int n; int m;
+; A& operator++(void) { ++n; if (n == m) g(); return *this; }
+; A() : n(0), m(0) { }
+; friend bool operator!=(A const& a1, A const& a2) { return a1.n != a2.n; }
+; };
+; void testfunction(A& iter) { A const end; while (iter != end) ++iter; }
+;
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ %struct.A = type { i32, i32 }
+
+define void @_Z12testfunctionR1A(%struct.A* %iter) {
+entry:
+ %0 = getelementptr %struct.A* %iter, i32 0, i32 0 ; <i32*> [#uses=3]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=2]
+ %2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %3 = getelementptr %struct.A* %iter, i32 0, i32 1 ; <i32*> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb3.backedge, %bb.nph
+ %.rle = phi i32 [ %1, %bb.nph ], [ %7, %bb3.backedge ] ; <i32> [#uses=1]
+ %4 = add i32 %.rle, 1 ; <i32> [#uses=2]
+ store i32 %4, i32* %0, align 4
+ %5 = load i32* %3, align 4 ; <i32> [#uses=1]
+ %6 = icmp eq i32 %4, %5 ; <i1> [#uses=1]
+ br i1 %6, label %bb1, label %bb3.backedge
+
+bb1: ; preds = %bb
+ tail call void @_Z1gv()
+ br label %bb3.backedge
+
+bb3.backedge: ; preds = %bb, %bb1
+; CHECK: bb3.backedge:
+; CHECK-NEXT: phi
+; CHECK-NEXT: icmp
+ %7 = load i32* %0, align 4 ; <i32> [#uses=2]
+ %8 = icmp eq i32 %7, 0 ; <i1> [#uses=1]
+ br i1 %8, label %return, label %bb
+
+return: ; preds = %bb3.backedge, %entry
+ ret void
+}
+
+declare void @_Z1gv()
diff --git a/test/Transforms/GVN/mixed.ll b/test/Transforms/GVN/mixed.ll
new file mode 100644
index 0000000..5152f68
--- /dev/null
+++ b/test/Transforms/GVN/mixed.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -gvn -S | not grep DEADLOAD
+; RUN: opt < %s -gvn -S | not grep DEADGEP
+
+define i32 @main(i32** %p) {
+block1:
+ %z1 = load i32** %p
+ %z2 = getelementptr i32* %z1, i32 0
+ %z3 = load i32* %z2
+ %DEADLOAD = load i32** %p
+ %DEADGEP = getelementptr i32* %DEADLOAD, i32 0
+ %DEADLOAD2 = load i32* %DEADGEP
+ ret i32 %DEADLOAD2
+}
diff --git a/test/Transforms/GVN/nonescaping-malloc.ll b/test/Transforms/GVN/nonescaping-malloc.ll
new file mode 100644
index 0000000..5a42d95
--- /dev/null
+++ b/test/Transforms/GVN/nonescaping-malloc.ll
@@ -0,0 +1,108 @@
+; RUN: opt < %s -gvn -stats -disable-output |& grep {Number of loads deleted}
+; rdar://7363102
+
+; GVN should be able to eliminate load %tmp22.i, because it is redundant with
+; load %tmp8.i. This requires being able to prove that %tmp7.i doesn't
+; alias the malloc'd value %tmp.i20.i.i, which it can do since %tmp7.i
+; is derived from %tmp5.i which is computed from a load, and %tmp.i20.i.i
+; is never stored and does not escape.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+
+%"struct.llvm::MallocAllocator" = type <{ i8 }>
+%"struct.llvm::StringMap<void*,llvm::MallocAllocator>" = type { %"struct.llvm::StringMapImpl", %"struct.llvm::MallocAllocator" }
+%"struct.llvm::StringMapEntry<void*>" = type { %"struct.llvm::StringMapEntryBase", i8* }
+%"struct.llvm::StringMapEntryBase" = type { i32 }
+%"struct.llvm::StringMapImpl" = type { %"struct.llvm::StringMapImpl::ItemBucket"*, i32, i32, i32, i32 }
+%"struct.llvm::StringMapImpl::ItemBucket" = type { i32, %"struct.llvm::StringMapEntryBase"* }
+%"struct.llvm::StringRef" = type { i8*, i64 }
+
+define %"struct.llvm::StringMapEntry<void*>"* @_Z3fooRN4llvm9StringMapIPvNS_15MallocAllocatorEEEPKc(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %X, i8* %P) ssp {
+entry:
+ %tmp = alloca %"struct.llvm::StringRef", align 8 ; <%"struct.llvm::StringRef"*> [#uses=3]
+ %tmp.i = getelementptr inbounds %"struct.llvm::StringRef"* %tmp, i64 0, i32 0 ; <i8**> [#uses=1]
+ store i8* %P, i8** %tmp.i, align 8
+ %tmp1.i = call i64 @strlen(i8* %P) nounwind readonly ; <i64> [#uses=1]
+ %tmp2.i = getelementptr inbounds %"struct.llvm::StringRef"* %tmp, i64 0, i32 1 ; <i64*> [#uses=1]
+ store i64 %tmp1.i, i64* %tmp2.i, align 8
+ %tmp1 = call %"struct.llvm::StringMapEntry<void*>"* @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %X, %"struct.llvm::StringRef"* %tmp) ssp ; <%"struct.llvm::StringMapEntry<void*>"*> [#uses=1]
+ ret %"struct.llvm::StringMapEntry<void*>"* %tmp1
+}
+
+declare i64 @strlen(i8* nocapture) nounwind readonly
+
+declare noalias i8* @malloc(i64) nounwind
+
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
+
+declare i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(%"struct.llvm::StringMapImpl"*, i64, i64)
+
+define linkonce_odr %"struct.llvm::StringMapEntry<void*>"* @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, %"struct.llvm::StringRef"* nocapture %Key) ssp align 2 {
+entry:
+ %elt = bitcast %"struct.llvm::StringRef"* %Key to i64* ; <i64*> [#uses=1]
+ %val = load i64* %elt ; <i64> [#uses=3]
+ %tmp = getelementptr inbounds %"struct.llvm::StringRef"* %Key, i64 0, i32 1 ; <i64*> [#uses=1]
+ %val2 = load i64* %tmp ; <i64> [#uses=2]
+ %tmp2.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0 ; <%"struct.llvm::StringMapImpl"*> [#uses=1]
+ %tmp3.i = tail call i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(%"struct.llvm::StringMapImpl"* %tmp2.i, i64 %val, i64 %val2) ; <i32> [#uses=1]
+ %tmp4.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0, i32 0 ; <%"struct.llvm::StringMapImpl::ItemBucket"**> [#uses=1]
+ %tmp5.i = load %"struct.llvm::StringMapImpl::ItemBucket"** %tmp4.i, align 8 ; <%"struct.llvm::StringMapImpl::ItemBucket"*> [#uses=1]
+ %tmp6.i = zext i32 %tmp3.i to i64 ; <i64> [#uses=1]
+ %tmp7.i = getelementptr inbounds %"struct.llvm::StringMapImpl::ItemBucket"* %tmp5.i, i64 %tmp6.i, i32 1 ; <%"struct.llvm::StringMapEntryBase"**> [#uses=2]
+ %tmp8.i = load %"struct.llvm::StringMapEntryBase"** %tmp7.i, align 8 ; <%"struct.llvm::StringMapEntryBase"*> [#uses=3]
+ %tmp9.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp8.i, null ; <i1> [#uses=1]
+ %tmp13.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp8.i, inttoptr (i64 -1 to %"struct.llvm::StringMapEntryBase"*) ; <i1> [#uses=1]
+ %or.cond.i = or i1 %tmp9.i, %tmp13.i ; <i1> [#uses=1]
+ br i1 %or.cond.i, label %bb4.i, label %bb6.i
+
+bb4.i: ; preds = %entry
+ %tmp41.i = inttoptr i64 %val to i8* ; <i8*> [#uses=2]
+ %tmp4.i35.i = getelementptr inbounds i8* %tmp41.i, i64 %val2 ; <i8*> [#uses=1]
+ %tmp.i.i = ptrtoint i8* %tmp4.i35.i to i64 ; <i64> [#uses=1]
+ %tmp1.i.i = trunc i64 %tmp.i.i to i32 ; <i32> [#uses=1]
+ %tmp3.i.i = trunc i64 %val to i32 ; <i32> [#uses=1]
+ %tmp4.i.i = sub i32 %tmp1.i.i, %tmp3.i.i ; <i32> [#uses=3]
+ %tmp5.i.i = add i32 %tmp4.i.i, 17 ; <i32> [#uses=1]
+ %tmp8.i.i = zext i32 %tmp5.i.i to i64 ; <i64> [#uses=1]
+ %tmp.i20.i.i = tail call noalias i8* @malloc(i64 %tmp8.i.i) nounwind ; <i8*> [#uses=7]
+ %tmp10.i.i = bitcast i8* %tmp.i20.i.i to %"struct.llvm::StringMapEntry<void*>"* ; <%"struct.llvm::StringMapEntry<void*>"*> [#uses=2]
+ %tmp12.i.i = icmp eq i8* %tmp.i20.i.i, null ; <i1> [#uses=1]
+ br i1 %tmp12.i.i, label %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i, label %bb.i.i
+
+bb.i.i: ; preds = %bb4.i
+ %tmp.i.i.i.i = bitcast i8* %tmp.i20.i.i to i32* ; <i32*> [#uses=1]
+ store i32 %tmp4.i.i, i32* %tmp.i.i.i.i, align 4
+ %tmp1.i19.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 8 ; <i8*> [#uses=1]
+ %0 = bitcast i8* %tmp1.i19.i.i to i8** ; <i8**> [#uses=1]
+ store i8* null, i8** %0, align 8
+ br label %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
+
+_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i: ; preds = %bb4.i, %bb.i.i
+ %tmp.i18.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 16 ; <i8*> [#uses=1]
+ %tmp15.i.i = zext i32 %tmp4.i.i to i64 ; <i64> [#uses=2]
+ tail call void @llvm.memcpy.i64(i8* %tmp.i18.i.i, i8* %tmp41.i, i64 %tmp15.i.i, i32 1) nounwind
+ %tmp.i18.sum.i.i = add i64 %tmp15.i.i, 16 ; <i64> [#uses=1]
+ %tmp17.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 %tmp.i18.sum.i.i ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp17.i.i, align 1
+ %tmp.i.i.i = getelementptr inbounds i8* %tmp.i20.i.i, i64 8 ; <i8*> [#uses=1]
+ %1 = bitcast i8* %tmp.i.i.i to i8** ; <i8**> [#uses=1]
+ store i8* null, i8** %1, align 8
+ %tmp22.i = load %"struct.llvm::StringMapEntryBase"** %tmp7.i, align 8 ; <%"struct.llvm::StringMapEntryBase"*> [#uses=1]
+ %tmp24.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp22.i, inttoptr (i64 -1 to %"struct.llvm::StringMapEntryBase"*) ; <i1> [#uses=1]
+ br i1 %tmp24.i, label %bb9.i, label %_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit
+
+bb6.i: ; preds = %entry
+ %tmp16.i = bitcast %"struct.llvm::StringMapEntryBase"* %tmp8.i to %"struct.llvm::StringMapEntry<void*>"* ; <%"struct.llvm::StringMapEntry<void*>"*> [#uses=1]
+ ret %"struct.llvm::StringMapEntry<void*>"* %tmp16.i
+
+bb9.i: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
+ %tmp25.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0, i32 3 ; <i32*> [#uses=2]
+ %tmp26.i = load i32* %tmp25.i, align 8 ; <i32> [#uses=1]
+ %tmp27.i = add i32 %tmp26.i, -1 ; <i32> [#uses=1]
+ store i32 %tmp27.i, i32* %tmp25.i, align 8
+ ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
+
+_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
+ ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
+}
diff --git a/test/Transforms/GVN/null-aliases-nothing.ll b/test/Transforms/GVN/null-aliases-nothing.ll
new file mode 100644
index 0000000..4d533bb
--- /dev/null
+++ b/test/Transforms/GVN/null-aliases-nothing.ll
@@ -0,0 +1,20 @@
+; RUN: opt %s -gvn -S | FileCheck %s
+
+%t = type { i32 }
+declare void @test1f(i8*)
+
+define void @test1(%t* noalias %stuff ) {
+ %p = getelementptr inbounds %t* %stuff, i32 0, i32 0
+ %before = load i32* %p
+
+ call void @test1f(i8* null)
+
+ %after = load i32* %p ; <--- This should be a dead load
+ %sum = add i32 %before, %after
+
+ store i32 %sum, i32* %p
+ ret void
+; CHECK: load
+; CHECK-NOT: load
+; CHECK: ret void
+}
diff --git a/test/Transforms/GVN/pre-basic-add.ll b/test/Transforms/GVN/pre-basic-add.ll
new file mode 100644
index 0000000..c13099f
--- /dev/null
+++ b/test/Transforms/GVN/pre-basic-add.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -gvn -enable-pre -S | grep {.pre}
+
+@H = common global i32 0 ; <i32*> [#uses=2]
+@G = common global i32 0 ; <i32*> [#uses=1]
+
+define i32 @test() nounwind {
+entry:
+ %0 = load i32* @H, align 4 ; <i32> [#uses=2]
+ %1 = call i32 (...)* @foo() nounwind ; <i32> [#uses=1]
+ %2 = icmp ne i32 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %bb1
+
+bb: ; preds = %entry
+ %3 = add i32 %0, 42 ; <i32> [#uses=1]
+ store i32 %3, i32* @G, align 4
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %4 = add i32 %0, 42 ; <i32> [#uses=1]
+ store i32 %4, i32* @H, align 4
+ br label %return
+
+return: ; preds = %bb1
+ ret i32 0
+}
+
+declare i32 @foo(...)
diff --git a/test/Transforms/GVN/pre-load.ll b/test/Transforms/GVN/pre-load.ll
new file mode 100644
index 0000000..7047d4e
--- /dev/null
+++ b/test/Transforms/GVN/pre-load.ll
@@ -0,0 +1,364 @@
+; RUN: opt < %s -gvn -enable-load-pre -S | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+
+define i32 @test1(i32* %p, i1 %C) {
+; CHECK: @test1
+block1:
+ br i1 %C, label %block2, label %block3
+
+block2:
+ br label %block4
+; CHECK: block2:
+; CHECK-NEXT: load i32* %p
+
+block3:
+ store i32 0, i32* %p
+ br label %block4
+
+block4:
+ %PRE = load i32* %p
+ ret i32 %PRE
+; CHECK: block4:
+; CHECK-NEXT: phi i32
+; CHECK-NEXT: ret i32
+}
+
+; This is a simple phi translation case.
+define i32 @test2(i32* %p, i32* %q, i1 %C) {
+; CHECK: @test2
+block1:
+ br i1 %C, label %block2, label %block3
+
+block2:
+ br label %block4
+; CHECK: block2:
+; CHECK-NEXT: load i32* %q
+
+block3:
+ store i32 0, i32* %p
+ br label %block4
+
+block4:
+ %P2 = phi i32* [%p, %block3], [%q, %block2]
+ %PRE = load i32* %P2
+ ret i32 %PRE
+; CHECK: block4:
+; CHECK-NEXT: phi i32 [
+; CHECK-NOT: load
+; CHECK: ret i32
+}
+
+; This is a PRE case that requires phi translation through a GEP.
+define i32 @test3(i32* %p, i32* %q, i32** %Hack, i1 %C) {
+; CHECK: @test3
+block1:
+ %B = getelementptr i32* %q, i32 1
+ store i32* %B, i32** %Hack
+ br i1 %C, label %block2, label %block3
+
+block2:
+ br label %block4
+; CHECK: block2:
+; CHECK-NEXT: load i32* %B
+
+block3:
+ %A = getelementptr i32* %p, i32 1
+ store i32 0, i32* %A
+ br label %block4
+
+block4:
+ %P2 = phi i32* [%p, %block3], [%q, %block2]
+ %P3 = getelementptr i32* %P2, i32 1
+ %PRE = load i32* %P3
+ ret i32 %PRE
+; CHECK: block4:
+; CHECK-NEXT: phi i32 [
+; CHECK-NOT: load
+; CHECK: ret i32
+}
+
+;; Here the loaded address is available, but the computation is in 'block3'
+;; which does not dominate 'block2'.
+define i32 @test4(i32* %p, i32* %q, i32** %Hack, i1 %C) {
+; CHECK: @test4
+block1:
+ br i1 %C, label %block2, label %block3
+
+block2:
+ br label %block4
+; CHECK: block2:
+; CHECK: load i32*
+; CHECK: br label %block4
+
+block3:
+ %B = getelementptr i32* %q, i32 1
+ store i32* %B, i32** %Hack
+
+ %A = getelementptr i32* %p, i32 1
+ store i32 0, i32* %A
+ br label %block4
+
+block4:
+ %P2 = phi i32* [%p, %block3], [%q, %block2]
+ %P3 = getelementptr i32* %P2, i32 1
+ %PRE = load i32* %P3
+ ret i32 %PRE
+; CHECK: block4:
+; CHECK-NEXT: phi i32 [
+; CHECK-NOT: load
+; CHECK: ret i32
+}
+
+;void test5(int N, double *G) {
+; int j;
+; for (j = 0; j < N - 1; j++)
+; G[j] = G[j] + G[j+1];
+;}
+
+define void @test5(i32 %N, double* nocapture %G) nounwind ssp {
+; CHECK: @test5
+entry:
+ %0 = add i32 %N, -1
+ %1 = icmp sgt i32 %0, 0
+ br i1 %1, label %bb.nph, label %return
+
+bb.nph:
+ %tmp = zext i32 %0 to i64
+ br label %bb
+
+; CHECK: bb.nph:
+; CHECK: load double*
+; CHECK: br label %bb
+
+bb:
+ %indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ]
+ %tmp6 = add i64 %indvar, 1
+ %scevgep = getelementptr double* %G, i64 %tmp6
+ %scevgep7 = getelementptr double* %G, i64 %indvar
+ %2 = load double* %scevgep7, align 8
+ %3 = load double* %scevgep, align 8
+ %4 = fadd double %2, %3
+ store double %4, double* %scevgep7, align 8
+ %exitcond = icmp eq i64 %tmp6, %tmp
+ br i1 %exitcond, label %return, label %bb
+
+; Should only be one load in the loop.
+; CHECK: bb:
+; CHECK: load double*
+; CHECK-NOT: load double*
+; CHECK: br i1 %exitcond
+
+return:
+ ret void
+}
+
+;void test6(int N, double *G) {
+; int j;
+; for (j = 0; j < N - 1; j++)
+; G[j+1] = G[j] + G[j+1];
+;}
+
+define void @test6(i32 %N, double* nocapture %G) nounwind ssp {
+; CHECK: @test6
+entry:
+ %0 = add i32 %N, -1
+ %1 = icmp sgt i32 %0, 0
+ br i1 %1, label %bb.nph, label %return
+
+bb.nph:
+ %tmp = zext i32 %0 to i64
+ br label %bb
+
+; CHECK: bb.nph:
+; CHECK: load double*
+; CHECK: br label %bb
+
+bb:
+ %indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ]
+ %tmp6 = add i64 %indvar, 1
+ %scevgep = getelementptr double* %G, i64 %tmp6
+ %scevgep7 = getelementptr double* %G, i64 %indvar
+ %2 = load double* %scevgep7, align 8
+ %3 = load double* %scevgep, align 8
+ %4 = fadd double %2, %3
+ store double %4, double* %scevgep, align 8
+ %exitcond = icmp eq i64 %tmp6, %tmp
+ br i1 %exitcond, label %return, label %bb
+
+; Should only be one load in the loop.
+; CHECK: bb:
+; CHECK: load double*
+; CHECK-NOT: load double*
+; CHECK: br i1 %exitcond
+
+return:
+ ret void
+}
+
+;void test7(int N, double* G) {
+; long j;
+; G[1] = 1;
+; for (j = 1; j < N - 1; j++)
+; G[j+1] = G[j] + G[j+1];
+;}
+
+; This requires phi translation of the adds.
+define void @test7(i32 %N, double* nocapture %G) nounwind ssp {
+entry:
+ %0 = getelementptr inbounds double* %G, i64 1
+ store double 1.000000e+00, double* %0, align 8
+ %1 = add i32 %N, -1
+ %2 = icmp sgt i32 %1, 1
+ br i1 %2, label %bb.nph, label %return
+
+bb.nph:
+ %tmp = sext i32 %1 to i64
+ %tmp7 = add i64 %tmp, -1
+ br label %bb
+
+bb:
+ %indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
+ %tmp8 = add i64 %indvar, 2
+ %scevgep = getelementptr double* %G, i64 %tmp8
+ %tmp9 = add i64 %indvar, 1
+ %scevgep10 = getelementptr double* %G, i64 %tmp9
+ %3 = load double* %scevgep10, align 8
+ %4 = load double* %scevgep, align 8
+ %5 = fadd double %3, %4
+ store double %5, double* %scevgep, align 8
+ %exitcond = icmp eq i64 %tmp9, %tmp7
+ br i1 %exitcond, label %return, label %bb
+
+; Should only be one load in the loop.
+; CHECK: bb:
+; CHECK: load double*
+; CHECK-NOT: load double*
+; CHECK: br i1 %exitcond
+
+return:
+ ret void
+}
+
+;; Here the loaded address isn't available in 'block2' at all, requiring a new
+;; GEP to be inserted into it.
+define i32 @test8(i32* %p, i32* %q, i32** %Hack, i1 %C) {
+; CHECK: @test8
+block1:
+ br i1 %C, label %block2, label %block3
+
+block2:
+ br label %block4
+; CHECK: block2:
+; CHECK: load i32*
+; CHECK: br label %block4
+
+block3:
+ %A = getelementptr i32* %p, i32 1
+ store i32 0, i32* %A
+ br label %block4
+
+block4:
+ %P2 = phi i32* [%p, %block3], [%q, %block2]
+ %P3 = getelementptr i32* %P2, i32 1
+ %PRE = load i32* %P3
+ ret i32 %PRE
+; CHECK: block4:
+; CHECK-NEXT: phi i32 [
+; CHECK-NOT: load
+; CHECK: ret i32
+}
+
+;void test9(int N, double* G) {
+; long j;
+; for (j = 1; j < N - 1; j++)
+; G[j+1] = G[j] + G[j+1];
+;}
+
+; This requires phi translation of the adds.
+define void @test9(i32 %N, double* nocapture %G) nounwind ssp {
+entry:
+ add i32 0, 0
+ %1 = add i32 %N, -1
+ %2 = icmp sgt i32 %1, 1
+ br i1 %2, label %bb.nph, label %return
+
+bb.nph:
+ %tmp = sext i32 %1 to i64
+ %tmp7 = add i64 %tmp, -1
+ br label %bb
+
+; CHECK: bb.nph:
+; CHECK: load double*
+; CHECK: br label %bb
+
+bb:
+ %indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
+ %tmp8 = add i64 %indvar, 2
+ %scevgep = getelementptr double* %G, i64 %tmp8
+ %tmp9 = add i64 %indvar, 1
+ %scevgep10 = getelementptr double* %G, i64 %tmp9
+ %3 = load double* %scevgep10, align 8
+ %4 = load double* %scevgep, align 8
+ %5 = fadd double %3, %4
+ store double %5, double* %scevgep, align 8
+ %exitcond = icmp eq i64 %tmp9, %tmp7
+ br i1 %exitcond, label %return, label %bb
+
+; Should only be one load in the loop.
+; CHECK: bb:
+; CHECK: load double*
+; CHECK-NOT: load double*
+; CHECK: br i1 %exitcond
+
+return:
+ ret void
+}
+
+;void test10(int N, double* G) {
+; long j;
+; for (j = 1; j < N - 1; j++)
+; G[j] = G[j] + G[j+1] + G[j-1];
+;}
+
+; PR5501
+define void @test10(i32 %N, double* nocapture %G) nounwind ssp {
+entry:
+ %0 = add i32 %N, -1
+ %1 = icmp sgt i32 %0, 1
+ br i1 %1, label %bb.nph, label %return
+
+bb.nph:
+ %tmp = sext i32 %0 to i64
+ %tmp8 = add i64 %tmp, -1
+ br label %bb
+; CHECK: bb.nph:
+; CHECK: load double*
+; CHECK: load double*
+; CHECK: br label %bb
+
+
+bb:
+ %indvar = phi i64 [ 0, %bb.nph ], [ %tmp11, %bb ]
+ %scevgep = getelementptr double* %G, i64 %indvar
+ %tmp9 = add i64 %indvar, 2
+ %scevgep10 = getelementptr double* %G, i64 %tmp9
+ %tmp11 = add i64 %indvar, 1
+ %scevgep12 = getelementptr double* %G, i64 %tmp11
+ %2 = load double* %scevgep12, align 8
+ %3 = load double* %scevgep10, align 8
+ %4 = fadd double %2, %3
+ %5 = load double* %scevgep, align 8
+ %6 = fadd double %4, %5
+ store double %6, double* %scevgep12, align 8
+ %exitcond = icmp eq i64 %tmp11, %tmp8
+ br i1 %exitcond, label %return, label %bb
+
+; Should only be one load in the loop.
+; CHECK: bb:
+; CHECK: load double*
+; CHECK-NOT: load double*
+; CHECK: br i1 %exitcond
+
+return:
+ ret void
+}
diff --git a/test/Transforms/GVN/pre-single-pred.ll b/test/Transforms/GVN/pre-single-pred.ll
new file mode 100644
index 0000000..706a16b
--- /dev/null
+++ b/test/Transforms/GVN/pre-single-pred.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -gvn -enable-load-pre -S | not grep {tmp3 = load}
+
+@p = external global i32
+define i32 @f(i32 %n) nounwind {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %indvar.next, %for.inc ] ; <i32> [#uses=2]
+ %cmp = icmp slt i32 %i.0, %n ; <i1> [#uses=1]
+ br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
+
+for.cond.for.end_crit_edge: ; preds = %for.cond
+ br label %for.end
+
+for.body: ; preds = %for.cond
+ %tmp3 = load i32* @p ; <i32> [#uses=1]
+ %dec = add i32 %tmp3, -1 ; <i32> [#uses=2]
+ store i32 %dec, i32* @p
+ %cmp6 = icmp slt i32 %dec, 0 ; <i1> [#uses=1]
+ br i1 %cmp6, label %for.body.for.end_crit_edge, label %for.inc
+
+for.body.for.end_crit_edge: ; preds = %for.body
+ br label %for.end
+
+for.inc: ; preds = %for.body
+ %indvar.next = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %for.cond
+
+for.end: ; preds = %for.body.for.end_crit_edge, %for.cond.for.end_crit_edge
+ %tmp9 = load i32* @p ; <i32> [#uses=1]
+ ret i32 %tmp9
+}
diff --git a/test/Transforms/GVN/rle-must-alias.ll b/test/Transforms/GVN/rle-must-alias.ll
new file mode 100644
index 0000000..d61eb81
--- /dev/null
+++ b/test/Transforms/GVN/rle-must-alias.ll
@@ -0,0 +1,46 @@
+; RUN: opt < %s -gvn -S | grep {DEAD = phi i32 }
+
+; GVN should eliminate the fully redundant %9 GEP which
+; allows DEAD to be removed. This is PR3198.
+
+; The %7 and %4 loads combine to make %DEAD unneeded.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+@H = common global [100 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=3]
+@G = common global i32 0 ; <i32*> [#uses=2]
+
+define i32 @test(i32 %i) nounwind {
+entry:
+ %0 = tail call i32 (...)* @foo() nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb1, label %bb
+
+bb: ; preds = %entry
+ %2 = tail call i32 (...)* @bar() nounwind ; <i32> [#uses=0]
+ %3 = getelementptr [100 x i32]* @H, i32 0, i32 %i ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 4 ; <i32> [#uses=1]
+ store i32 %4, i32* @G, align 4
+ br label %bb3
+
+bb1: ; preds = %entry
+ %5 = tail call i32 (...)* @baz() nounwind ; <i32> [#uses=0]
+ %6 = getelementptr [100 x i32]* @H, i32 0, i32 %i ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=2]
+ store i32 %7, i32* @G, align 4
+ %8 = icmp eq i32 %7, 0 ; <i1> [#uses=1]
+ br i1 %8, label %bb3, label %bb4
+
+bb3: ; preds = %bb1, %bb
+ %9 = getelementptr [100 x i32]* @H, i32 0, i32 %i ; <i32*> [#uses=1]
+ %DEAD = load i32* %9, align 4 ; <i32> [#uses=1]
+ ret i32 %DEAD
+
+bb4: ; preds = %bb1
+ ret i32 0
+}
+
+declare i32 @foo(...)
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
diff --git a/test/Transforms/GVN/rle-no-phi-translate.ll b/test/Transforms/GVN/rle-no-phi-translate.ll
new file mode 100644
index 0000000..96dbf48
--- /dev/null
+++ b/test/Transforms/GVN/rle-no-phi-translate.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -gvn -S | FileCheck %s
+; XFAIL: *
+; FIXME: This should be promotable, but memdep/gvn don't track values
+; path/edge sensitively enough.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i32 @g(i32* %b, i32* %c) nounwind {
+entry:
+ store i32 1, i32* %b
+ store i32 2, i32* %c
+
+ %t1 = icmp eq i32* %b, null ; <i1> [#uses=1]
+ br i1 %t1, label %bb, label %bb2
+
+bb: ; preds = %entry
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %c_addr.0 = phi i32* [ %b, %entry ], [ %c, %bb ] ; <i32*> [#uses=1]
+ %cv = load i32* %c_addr.0, align 4 ; <i32> [#uses=1]
+ ret i32 %cv
+; CHECK: bb2:
+; CHECK-NOT: load i32
+; CHECK: ret i32
+}
+
diff --git a/test/Transforms/GVN/rle-nonlocal.ll b/test/Transforms/GVN/rle-nonlocal.ll
new file mode 100644
index 0000000..5c73dad
--- /dev/null
+++ b/test/Transforms/GVN/rle-nonlocal.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -gvn -S | FileCheck %s
+
+define i32 @main(i32** %p) {
+block1:
+ br i1 true, label %block2, label %block3
+
+block2:
+ %a = load i32** %p
+ br label %block4
+
+block3:
+ %b = load i32** %p
+ br label %block4
+
+block4:
+; CHECK-NOT: %existingPHI = phi
+; CHECK: %DEAD = phi
+ %existingPHI = phi i32* [ %a, %block2 ], [ %b, %block3 ]
+ %DEAD = load i32** %p
+ %c = load i32* %DEAD
+ %d = load i32* %existingPHI
+ %e = add i32 %c, %d
+ ret i32 %e
+}
diff --git a/test/Transforms/GVN/rle-phi-translate.ll b/test/Transforms/GVN/rle-phi-translate.ll
new file mode 100644
index 0000000..6731f43
--- /dev/null
+++ b/test/Transforms/GVN/rle-phi-translate.ll
@@ -0,0 +1,146 @@
+; RUN: opt < %s -gvn -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i32 @test1(i32* %b, i32* %c) nounwind {
+; CHECK: @test1
+entry:
+ %g = alloca i32
+ %t1 = icmp eq i32* %b, null
+ br i1 %t1, label %bb, label %bb1
+
+bb:
+ %t2 = load i32* %c, align 4
+ %t3 = add i32 %t2, 1
+ store i32 %t3, i32* %g, align 4
+ br label %bb2
+
+bb1: ; preds = %entry
+ %t5 = load i32* %b, align 4
+ %t6 = add i32 %t5, 1
+ store i32 %t6, i32* %g, align 4
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %c_addr.0 = phi i32* [ %g, %bb1 ], [ %c, %bb ]
+ %b_addr.0 = phi i32* [ %b, %bb1 ], [ %g, %bb ]
+ %cv = load i32* %c_addr.0, align 4
+ %bv = load i32* %b_addr.0, align 4
+; CHECK: %bv = phi i32
+; CHECK: %cv = phi i32
+; CHECK-NOT: load
+; CHECK: ret i32
+ %ret = add i32 %cv, %bv
+ ret i32 %ret
+}
+
+define i8 @test2(i1 %cond, i32* %b, i32* %c) nounwind {
+; CHECK: @test2
+entry:
+ br i1 %cond, label %bb, label %bb1
+
+bb:
+ %b1 = bitcast i32* %b to i8*
+ store i8 4, i8* %b1
+ br label %bb2
+
+bb1:
+ %c1 = bitcast i32* %c to i8*
+ store i8 92, i8* %c1
+ br label %bb2
+
+bb2:
+ %d = phi i32* [ %c, %bb1 ], [ %b, %bb ]
+ %d1 = bitcast i32* %d to i8*
+ %dv = load i8* %d1
+; CHECK: %dv = phi i8 [ 92, %bb1 ], [ 4, %bb ]
+; CHECK-NOT: load
+; CHECK: ret i8 %dv
+ ret i8 %dv
+}
+
+define i32 @test3(i1 %cond, i32* %b, i32* %c) nounwind {
+; CHECK: @test3
+entry:
+ br i1 %cond, label %bb, label %bb1
+
+bb:
+ %b1 = getelementptr i32* %b, i32 17
+ store i32 4, i32* %b1
+ br label %bb2
+
+bb1:
+ %c1 = getelementptr i32* %c, i32 7
+ store i32 82, i32* %c1
+ br label %bb2
+
+bb2:
+ %d = phi i32* [ %c, %bb1 ], [ %b, %bb ]
+ %i = phi i32 [ 7, %bb1 ], [ 17, %bb ]
+ %d1 = getelementptr i32* %d, i32 %i
+ %dv = load i32* %d1
+; CHECK: %dv = phi i32 [ 82, %bb1 ], [ 4, %bb ]
+; CHECK-NOT: load
+; CHECK: ret i32 %dv
+ ret i32 %dv
+}
+
+; PR5313
+define i32 @test4(i1 %cond, i32* %b, i32* %c) nounwind {
+; CHECK: @test4
+entry:
+ br i1 %cond, label %bb, label %bb1
+
+bb:
+ store i32 4, i32* %b
+ br label %bb2
+
+bb1:
+ %c1 = getelementptr i32* %c, i32 7
+ store i32 82, i32* %c1
+ br label %bb2
+
+bb2:
+ %d = phi i32* [ %c, %bb1 ], [ %b, %bb ]
+ %i = phi i32 [ 7, %bb1 ], [ 0, %bb ]
+ %d1 = getelementptr i32* %d, i32 %i
+ %dv = load i32* %d1
+; CHECK: %dv = phi i32 [ 82, %bb1 ], [ 4, %bb ]
+; CHECK-NOT: load
+; CHECK: ret i32 %dv
+ ret i32 %dv
+}
+
+
+
+; void test5(int N, double* G) {
+; for (long j = 1; j < 1000; j++)
+; G[j] = G[j] + G[j-1];
+; }
+;
+; Should compile into one load in the loop.
+define void @test5(i32 %N, double* nocapture %G) nounwind ssp {
+; CHECK: @test5
+bb.nph:
+ br label %for.body
+
+for.body:
+ %indvar = phi i64 [ 0, %bb.nph ], [ %tmp, %for.body ]
+ %arrayidx6 = getelementptr double* %G, i64 %indvar
+ %tmp = add i64 %indvar, 1
+ %arrayidx = getelementptr double* %G, i64 %tmp
+ %tmp3 = load double* %arrayidx
+ %tmp7 = load double* %arrayidx6
+ %add = fadd double %tmp3, %tmp7
+ store double %add, double* %arrayidx
+ %exitcond = icmp eq i64 %tmp, 999
+ br i1 %exitcond, label %for.end, label %for.body
+; CHECK: for.body:
+; CHECK: phi double
+; CHECK: load double
+; CHECK-NOT: load double
+; CHECK: br i1
+for.end:
+ ret void
+}
diff --git a/test/Transforms/GVN/rle-semidominated.ll b/test/Transforms/GVN/rle-semidominated.ll
new file mode 100644
index 0000000..04e8c38
--- /dev/null
+++ b/test/Transforms/GVN/rle-semidominated.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -gvn -S | grep {DEAD = phi i32 }
+
+define i32 @main(i32* %p) {
+block1:
+ %z = load i32* %p
+ br i1 true, label %block2, label %block3
+
+block2:
+ br label %block4
+
+block3:
+ %b = bitcast i32 0 to i32
+ store i32 %b, i32* %p
+ br label %block4
+
+block4:
+ %DEAD = load i32* %p
+ ret i32 %DEAD
+}
diff --git a/test/Transforms/GVN/rle.ll b/test/Transforms/GVN/rle.ll
new file mode 100644
index 0000000..d419fd2
--- /dev/null
+++ b/test/Transforms/GVN/rle.ll
@@ -0,0 +1,534 @@
+; RUN: opt < %s -gvn -S | FileCheck %s
+
+; 32-bit little endian target.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+;; Trivial RLE test.
+define i32 @test0(i32 %V, i32* %P) {
+ store i32 %V, i32* %P
+
+ %A = load i32* %P
+ ret i32 %A
+; CHECK: @test0
+; CHECK: ret i32 %V
+}
+
+
+;;===----------------------------------------------------------------------===;;
+;; Tests for crashers
+;;===----------------------------------------------------------------------===;;
+
+;; PR5016
+define i8 @crash0({i32, i32} %A, {i32, i32}* %P) {
+ store {i32, i32} %A, {i32, i32}* %P
+ %X = bitcast {i32, i32}* %P to i8*
+ %Y = load i8* %X
+ ret i8 %Y
+}
+
+
+;;===----------------------------------------------------------------------===;;
+;; Store -> Load and Load -> Load forwarding where src and dst are different
+;; types, but where the base pointer is a must alias.
+;;===----------------------------------------------------------------------===;;
+
+;; i32 -> f32 forwarding.
+define float @coerce_mustalias1(i32 %V, i32* %P) {
+ store i32 %V, i32* %P
+
+ %P2 = bitcast i32* %P to float*
+
+ %A = load float* %P2
+ ret float %A
+; CHECK: @coerce_mustalias1
+; CHECK-NOT: load
+; CHECK: ret float
+}
+
+;; i32* -> float forwarding.
+define float @coerce_mustalias2(i32* %V, i32** %P) {
+ store i32* %V, i32** %P
+
+ %P2 = bitcast i32** %P to float*
+
+ %A = load float* %P2
+ ret float %A
+; CHECK: @coerce_mustalias2
+; CHECK-NOT: load
+; CHECK: ret float
+}
+
+;; float -> i32* forwarding.
+define i32* @coerce_mustalias3(float %V, float* %P) {
+ store float %V, float* %P
+
+ %P2 = bitcast float* %P to i32**
+
+ %A = load i32** %P2
+ ret i32* %A
+; CHECK: @coerce_mustalias3
+; CHECK-NOT: load
+; CHECK: ret i32*
+}
+
+;; i32 -> f32 load forwarding.
+define float @coerce_mustalias4(i32* %P, i1 %cond) {
+ %A = load i32* %P
+
+ %P2 = bitcast i32* %P to float*
+ %B = load float* %P2
+ br i1 %cond, label %T, label %F
+T:
+ ret float %B
+
+F:
+ %X = bitcast i32 %A to float
+ ret float %X
+
+; CHECK: @coerce_mustalias4
+; CHECK: %A = load i32* %P
+; CHECK-NOT: load
+; CHECK: ret float
+; CHECK: F:
+}
+
+;; i32 -> i8 forwarding
+define i8 @coerce_mustalias5(i32 %V, i32* %P) {
+ store i32 %V, i32* %P
+
+ %P2 = bitcast i32* %P to i8*
+
+ %A = load i8* %P2
+ ret i8 %A
+; CHECK: @coerce_mustalias5
+; CHECK-NOT: load
+; CHECK: ret i8
+}
+
+;; i64 -> float forwarding
+define float @coerce_mustalias6(i64 %V, i64* %P) {
+ store i64 %V, i64* %P
+
+ %P2 = bitcast i64* %P to float*
+
+ %A = load float* %P2
+ ret float %A
+; CHECK: @coerce_mustalias6
+; CHECK-NOT: load
+; CHECK: ret float
+}
+
+;; i64 -> i8* (32-bit) forwarding
+define i8* @coerce_mustalias7(i64 %V, i64* %P) {
+ store i64 %V, i64* %P
+
+ %P2 = bitcast i64* %P to i8**
+
+ %A = load i8** %P2
+ ret i8* %A
+; CHECK: @coerce_mustalias7
+; CHECK-NOT: load
+; CHECK: ret i8*
+}
+
+; memset -> i16 forwarding.
+define signext i16 @memset_to_i16_local(i16* %A) nounwind ssp {
+entry:
+ %conv = bitcast i16* %A to i8*
+ tail call void @llvm.memset.i64(i8* %conv, i8 1, i64 200, i32 1)
+ %arrayidx = getelementptr inbounds i16* %A, i64 42
+ %tmp2 = load i16* %arrayidx
+ ret i16 %tmp2
+; CHECK: @memset_to_i16_local
+; CHECK-NOT: load
+; CHECK: ret i16 257
+}
+
+; memset -> float forwarding.
+define float @memset_to_float_local(float* %A, i8 %Val) nounwind ssp {
+entry:
+ %conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
+ tail call void @llvm.memset.i64(i8* %conv, i8 %Val, i64 400, i32 1)
+ %arrayidx = getelementptr inbounds float* %A, i64 42 ; <float*> [#uses=1]
+ %tmp2 = load float* %arrayidx ; <float> [#uses=1]
+ ret float %tmp2
+; CHECK: @memset_to_float_local
+; CHECK-NOT: load
+; CHECK: zext
+; CHECK-NEXT: shl
+; CHECK-NEXT: or
+; CHECK-NEXT: shl
+; CHECK-NEXT: or
+; CHECK-NEXT: bitcast
+; CHECK-NEXT: ret float
+}
+
+;; non-local memset -> i16 load forwarding.
+define i16 @memset_to_i16_nonlocal0(i16* %P, i1 %cond) {
+ %P3 = bitcast i16* %P to i8*
+ br i1 %cond, label %T, label %F
+T:
+ tail call void @llvm.memset.i64(i8* %P3, i8 1, i64 400, i32 1)
+ br label %Cont
+
+F:
+ tail call void @llvm.memset.i64(i8* %P3, i8 2, i64 400, i32 1)
+ br label %Cont
+
+Cont:
+ %P2 = getelementptr i16* %P, i32 4
+ %A = load i16* %P2
+ ret i16 %A
+
+; CHECK: @memset_to_i16_nonlocal0
+; CHECK: Cont:
+; CHECK-NEXT: %A = phi i16 [ 514, %F ], [ 257, %T ]
+; CHECK-NOT: load
+; CHECK: ret i16 %A
+}
+
+@GCst = constant {i32, float, i32 } { i32 42, float 14., i32 97 }
+
+; memset -> float forwarding.
+define float @memcpy_to_float_local(float* %A) nounwind ssp {
+entry:
+ %conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.i64(i8* %conv, i8* bitcast ({i32, float, i32 }* @GCst to i8*), i64 12, i32 1)
+ %arrayidx = getelementptr inbounds float* %A, i64 1 ; <float*> [#uses=1]
+ %tmp2 = load float* %arrayidx ; <float> [#uses=1]
+ ret float %tmp2
+; CHECK: @memcpy_to_float_local
+; CHECK-NOT: load
+; CHECK: ret float 1.400000e+01
+}
+
+
+declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
+
+
+
+
+;; non-local i32/float -> i8 load forwarding.
+define i8 @coerce_mustalias_nonlocal0(i32* %P, i1 %cond) {
+ %P2 = bitcast i32* %P to float*
+ %P3 = bitcast i32* %P to i8*
+ br i1 %cond, label %T, label %F
+T:
+ store i32 42, i32* %P
+ br label %Cont
+
+F:
+ store float 1.0, float* %P2
+ br label %Cont
+
+Cont:
+ %A = load i8* %P3
+ ret i8 %A
+
+; CHECK: @coerce_mustalias_nonlocal0
+; CHECK: Cont:
+; CHECK: %A = phi i8 [
+; CHECK-NOT: load
+; CHECK: ret i8 %A
+}
+
+
+;; non-local i32/float -> i8 load forwarding. This also tests that the "P3"
+;; bitcast equivalence can be properly phi translated.
+define i8 @coerce_mustalias_nonlocal1(i32* %P, i1 %cond) {
+ %P2 = bitcast i32* %P to float*
+ br i1 %cond, label %T, label %F
+T:
+ store i32 42, i32* %P
+ br label %Cont
+
+F:
+ store float 1.0, float* %P2
+ br label %Cont
+
+Cont:
+ %P3 = bitcast i32* %P to i8*
+ %A = load i8* %P3
+ ret i8 %A
+
+;; FIXME: This is disabled because this caused a miscompile in the llvm-gcc
+;; bootstrap, see r82411
+;
+; HECK: @coerce_mustalias_nonlocal1
+; HECK: Cont:
+; HECK: %A = phi i8 [
+; HECK-NOT: load
+; HECK: ret i8 %A
+}
+
+
+;; non-local i32 -> i8 partial redundancy load forwarding.
+define i8 @coerce_mustalias_pre0(i32* %P, i1 %cond) {
+ %P3 = bitcast i32* %P to i8*
+ br i1 %cond, label %T, label %F
+T:
+ store i32 42, i32* %P
+ br label %Cont
+
+F:
+ br label %Cont
+
+Cont:
+ %A = load i8* %P3
+ ret i8 %A
+
+; CHECK: @coerce_mustalias_pre0
+; CHECK: F:
+; CHECK: load i8* %P3
+; CHECK: Cont:
+; CHECK: %A = phi i8 [
+; CHECK-NOT: load
+; CHECK: ret i8 %A
+}
+
+;;===----------------------------------------------------------------------===;;
+;; Store -> Load and Load -> Load forwarding where src and dst are different
+;; types, and the reload is an offset from the store pointer.
+;;===----------------------------------------------------------------------===;;
+
+;; i32 -> i8 forwarding.
+;; PR4216
+define i8 @coerce_offset0(i32 %V, i32* %P) {
+ store i32 %V, i32* %P
+
+ %P2 = bitcast i32* %P to i8*
+ %P3 = getelementptr i8* %P2, i32 2
+
+ %A = load i8* %P3
+ ret i8 %A
+; CHECK: @coerce_offset0
+; CHECK-NOT: load
+; CHECK: ret i8
+}
+
+;; non-local i32/float -> i8 load forwarding.
+define i8 @coerce_offset_nonlocal0(i32* %P, i1 %cond) {
+ %P2 = bitcast i32* %P to float*
+ %P3 = bitcast i32* %P to i8*
+ %P4 = getelementptr i8* %P3, i32 2
+ br i1 %cond, label %T, label %F
+T:
+ store i32 42, i32* %P
+ br label %Cont
+
+F:
+ store float 1.0, float* %P2
+ br label %Cont
+
+Cont:
+ %A = load i8* %P4
+ ret i8 %A
+
+; CHECK: @coerce_offset_nonlocal0
+; CHECK: Cont:
+; CHECK: %A = phi i8 [
+; CHECK-NOT: load
+; CHECK: ret i8 %A
+}
+
+
+;; non-local i32 -> i8 partial redundancy load forwarding.
+define i8 @coerce_offset_pre0(i32* %P, i1 %cond) {
+ %P3 = bitcast i32* %P to i8*
+ %P4 = getelementptr i8* %P3, i32 2
+ br i1 %cond, label %T, label %F
+T:
+ store i32 42, i32* %P
+ br label %Cont
+
+F:
+ br label %Cont
+
+Cont:
+ %A = load i8* %P4
+ ret i8 %A
+
+; CHECK: @coerce_offset_pre0
+; CHECK: F:
+; CHECK: load i8* %P4
+; CHECK: Cont:
+; CHECK: %A = phi i8 [
+; CHECK-NOT: load
+; CHECK: ret i8 %A
+}
+
+define i32 @chained_load(i32** %p) {
+block1:
+ %z = load i32** %p
+ br i1 true, label %block2, label %block3
+
+block2:
+ %a = load i32** %p
+ br label %block4
+
+block3:
+ %b = load i32** %p
+ br label %block4
+
+block4:
+ %c = load i32** %p
+ %d = load i32* %c
+ ret i32 %d
+
+; CHECK: @chained_load
+; CHECK: %z = load i32** %p
+; CHECK-NOT: load
+; CHECK: %d = load i32* %z
+; CHECK-NEXT: ret i32 %d
+}
+
+
+declare i1 @cond() readonly
+declare i1 @cond2() readonly
+
+define i32 @phi_trans2() {
+; CHECK: @phi_trans2
+entry:
+ %P = alloca i32, i32 400
+ br label %F1
+
+F1:
+ %A = phi i32 [1, %entry], [2, %F]
+ %cond2 = call i1 @cond()
+ br i1 %cond2, label %T1, label %TY
+
+T1:
+ %P2 = getelementptr i32* %P, i32 %A
+ %x = load i32* %P2
+ %cond = call i1 @cond2()
+ br i1 %cond, label %TX, label %F
+
+F:
+ %P3 = getelementptr i32* %P, i32 2
+ store i32 17, i32* %P3
+
+ store i32 42, i32* %P2 ; Provides "P[A]".
+ br label %F1
+
+TX:
+ ; This load should not be compiled to 'ret i32 42'. An overly clever
+ ; implementation of GVN would see that we're returning 17 if the loop
+ ; executes once or 42 if it executes more than that, but we'd have to do
+ ; loop restructuring to expose this, and GVN shouldn't do this sort of CFG
+ ; transformation.
+
+; CHECK: TX:
+; CHECK: ret i32 %x
+ ret i32 %x
+TY:
+ ret i32 0
+}
+
+define i32 @phi_trans3(i32* %p) {
+; CHECK: @phi_trans3
+block1:
+ br i1 true, label %block2, label %block3
+
+block2:
+ store i32 87, i32* %p
+ br label %block4
+
+block3:
+ %p2 = getelementptr i32* %p, i32 43
+ store i32 97, i32* %p2
+ br label %block4
+
+block4:
+ %A = phi i32 [-1, %block2], [42, %block3]
+ br i1 true, label %block5, label %exit
+
+; CHECK: block4:
+; CHECK-NEXT: %D = phi i32 [ 87, %block2 ], [ 97, %block3 ]
+; CHECK-NOT: load
+
+block5:
+ %B = add i32 %A, 1
+ br i1 true, label %block6, label %exit
+
+block6:
+ %C = getelementptr i32* %p, i32 %B
+ br i1 true, label %block7, label %exit
+
+block7:
+ %D = load i32* %C
+ ret i32 %D
+
+; CHECK: block7:
+; CHECK-NEXT: ret i32 %D
+
+exit:
+ ret i32 -1
+}
+
+define i8 @phi_trans4(i8* %p) {
+; CHECK: @phi_trans4
+entry:
+ %X3 = getelementptr i8* %p, i32 192
+ store i8 192, i8* %X3
+
+ %X = getelementptr i8* %p, i32 4
+ %Y = load i8* %X
+ br label %loop
+
+loop:
+ %i = phi i32 [4, %entry], [192, %loop]
+ %X2 = getelementptr i8* %p, i32 %i
+ %Y2 = load i8* %X2
+
+; CHECK: loop:
+; CHECK-NEXT: %Y2 = phi i8 [ %Y, %entry ], [ 0, %loop ]
+; CHECK-NOT: load i8
+
+ %cond = call i1 @cond2()
+
+ %Z = bitcast i8 *%X3 to i32*
+ store i32 0, i32* %Z
+ br i1 %cond, label %loop, label %out
+
+out:
+ %R = add i8 %Y, %Y2
+ ret i8 %R
+}
+
+define i8 @phi_trans5(i8* %p) {
+; CHECK: @phi_trans5
+entry:
+
+ %X4 = getelementptr i8* %p, i32 2
+ store i8 19, i8* %X4
+
+ %X = getelementptr i8* %p, i32 4
+ %Y = load i8* %X
+ br label %loop
+
+loop:
+ %i = phi i32 [4, %entry], [3, %cont]
+ %X2 = getelementptr i8* %p, i32 %i
+ %Y2 = load i8* %X2 ; Ensure this load is not being incorrectly replaced.
+ %cond = call i1 @cond2()
+ br i1 %cond, label %cont, label %out
+
+cont:
+ %Z = getelementptr i8* %X2, i32 -1
+ %Z2 = bitcast i8 *%Z to i32*
+ store i32 50462976, i32* %Z2 ;; (1 << 8) | (2 << 16) | (3 << 24)
+
+
+; CHECK: store i32
+; CHECK-NEXT: getelementptr i8* %p, i32 3
+; CHECK-NEXT: load i8*
+ br label %loop
+
+out:
+ %R = add i8 %Y, %Y2
+ ret i8 %R
+}
+
+
+
diff --git a/test/Transforms/GlobalDCE/2002-07-17-CastRef.ll b/test/Transforms/GlobalDCE/2002-07-17-CastRef.ll
new file mode 100644
index 0000000..37356f2
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2002-07-17-CastRef.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -globaldce
+;
+define internal void @func() {
+ ret void
+}
+
+define void @main() {
+ %X = bitcast void ()* @func to i32* ; <i32*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/GlobalDCE/2002-07-17-ConstantRef.ll b/test/Transforms/GlobalDCE/2002-07-17-ConstantRef.ll
new file mode 100644
index 0000000..740f720
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2002-07-17-ConstantRef.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -globaldce
+;
+
+@X = global void ()* @func ; <void ()**> [#uses=0]
+
+; Not dead, can be reachable via X
+define internal void @func() {
+ ret void
+}
+
+define void @main() {
+ ret void
+}
diff --git a/test/Transforms/GlobalDCE/2002-08-17-FunctionDGE.ll b/test/Transforms/GlobalDCE/2002-08-17-FunctionDGE.ll
new file mode 100644
index 0000000..766c227
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2002-08-17-FunctionDGE.ll
@@ -0,0 +1,17 @@
+; Make sure that functions are removed successfully if they are referred to by
+; a global that is dead. Make sure any globals they refer to die as well.
+
+; RUN: opt < %s -globaldce -S | not grep foo
+
+;; Unused, kills %foo
+@b = internal global i32 ()* @foo ; <i32 ()**> [#uses=0]
+
+;; Should die when function %foo is killed
[email protected] = internal global i32 7 ; <i32*> [#uses=1]
+
+ ;; dies when %b dies.
+define internal i32 @foo() {
+ %ret = load i32* @foo.upgrd.1 ; <i32> [#uses=1]
+ ret i32 %ret
+}
+
diff --git a/test/Transforms/GlobalDCE/2002-08-17-WorkListTest.ll b/test/Transforms/GlobalDCE/2002-08-17-WorkListTest.ll
new file mode 100644
index 0000000..42fcb1e
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2002-08-17-WorkListTest.ll
@@ -0,0 +1,12 @@
+; This testcase tests that a worklist is being used, and that globals can be
+; removed if they are the subject of a constexpr and ConstantPointerRef
+
+; RUN: opt < %s -globaldce -S | not grep global
+
+@t0 = internal global [4 x i8] c"foo\00" ; <[4 x i8]*> [#uses=1]
+@t1 = internal global [4 x i8] c"bar\00" ; <[4 x i8]*> [#uses=1]
+@s1 = internal global [1 x i8*] [ i8* getelementptr ([4 x i8]* @t0, i32 0, i32 0) ] ; <[1 x i8*]*> [#uses=0]
+@s2 = internal global [1 x i8*] [ i8* getelementptr ([4 x i8]* @t1, i64 0, i64 0) ] ; <[1 x i8*]*> [#uses=0]
+@b = internal global i32* @a ; <i32**> [#uses=0]
+@a = internal global i32 7 ; <i32*> [#uses=1]
+
diff --git a/test/Transforms/GlobalDCE/2002-09-12-Redeletion.ll b/test/Transforms/GlobalDCE/2002-09-12-Redeletion.ll
new file mode 100644
index 0000000..6221fa3
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2002-09-12-Redeletion.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -globaldce
+
+;; Should die when function %foo is killed
[email protected] = internal global i32 7 ; <i32*> [#uses=3]
+@bar = internal global [2 x { i32*, i32 }] [ { i32*, i32 } { i32* @foo.upgrd.1, i32 7 }, { i32*, i32 } { i32* @foo.upgrd.1, i32 1 } ] ; <[2 x { i32*, i32 }]*> [#uses=0]
+
+define internal i32 @foo() {
+ %ret = load i32* @foo.upgrd.1 ; <i32> [#uses=1]
+ ret i32 %ret
+}
+
diff --git a/test/Transforms/GlobalDCE/2003-07-01-SelfReference.ll b/test/Transforms/GlobalDCE/2003-07-01-SelfReference.ll
new file mode 100644
index 0000000..738ec43
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2003-07-01-SelfReference.ll
@@ -0,0 +1,11 @@
+; distilled from 255.vortex
+; RUN: opt < %s -globaldce -S | not grep testfunc
+
+declare i1 ()* @getfunc()
+
+define internal i1 @testfunc() {
+ %F = call i1 ()* ()* @getfunc( ) ; <i1 ()*> [#uses=1]
+ %c = icmp eq i1 ()* %F, @testfunc ; <i1> [#uses=1]
+ ret i1 %c
+}
+
diff --git a/test/Transforms/GlobalDCE/2003-10-09-PreserveWeakGlobals.ll b/test/Transforms/GlobalDCE/2003-10-09-PreserveWeakGlobals.ll
new file mode 100644
index 0000000..5b2c97f
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2003-10-09-PreserveWeakGlobals.ll
@@ -0,0 +1,6 @@
+; Weak variables should be preserved by global DCE!
+
+; RUN: opt < %s -globaldce -S | grep @A
+
+
+@A = weak global i32 54
diff --git a/test/Transforms/GlobalDCE/2009-01-05-DeadAliases.ll b/test/Transforms/GlobalDCE/2009-01-05-DeadAliases.ll
new file mode 100644
index 0000000..6658cee
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2009-01-05-DeadAliases.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -globaldce -S | not grep @D
+; RUN: opt < %s -globaldce -S | grep @L | count 3
+
+@A = global i32 0
+@D = alias internal i32* @A
+@L1 = alias i32* @A
+@L2 = alias internal i32* @L1
+@L3 = alias i32* @L2
diff --git a/test/Transforms/GlobalDCE/2009-02-17-AliasUsesAliasee.ll b/test/Transforms/GlobalDCE/2009-02-17-AliasUsesAliasee.ll
new file mode 100644
index 0000000..68933c6
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2009-02-17-AliasUsesAliasee.ll
@@ -0,0 +1,4 @@
+; RUN: opt < %s -globaldce
+
+@A = alias internal void ()* @F
+define internal void @F() { ret void }
diff --git a/test/Transforms/GlobalDCE/2009-09-03-MDNode.ll b/test/Transforms/GlobalDCE/2009-09-03-MDNode.ll
new file mode 100644
index 0000000..29864f8
--- /dev/null
+++ b/test/Transforms/GlobalDCE/2009-09-03-MDNode.ll
@@ -0,0 +1,264 @@
+; RUN: opt < %s -globaldce | llc -O0 -o /dev/null
+
+%struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t }
+%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>" = type { i32 }
+%struct.__pthread_list_t = type { %struct.__pthread_list_t*, %struct.__pthread_list_t* }
+%struct.pthread_attr_t = type { i64, [48 x i8] }
+%struct.pthread_mutex_t = type { %struct..0__pthread_mutex_s }
+
+@_ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+@_ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
+@_ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; <i32 (i64)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%struct.pthread_mutex_t*, %"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)* @pthread_mutex_init ; <i32 (%struct.pthread_mutex_t*, %"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
+@_ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)* @pthread_mutexattr_init ; <i32 (%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*, i32)* @pthread_mutexattr_settype ; <i32 (%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*, i32)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)* @pthread_mutexattr_destroy ; <i32 (%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)*> [#uses=0]
+
+define weak void @_ZN9__gnu_cxx26__aux_require_boolean_exprIbEEvRKT_(i8* %__t) {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !0)
+ tail call void @llvm.dbg.stoppoint(i32 240, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !0)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_19_ConvertibleConceptIjjEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !8)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !8)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_21_InputIteratorConceptIPcEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !11)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !11)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_21_InputIteratorConceptIPKcEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !12)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !12)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_21_InputIteratorConceptIPwEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !13)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !13)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_21_InputIteratorConceptIPKwEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !14)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !14)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIPwEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !15)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !15)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIPcEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !16)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !16)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIiEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !17)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !17)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIlEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !18)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !18)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIxEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !19)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !19)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIjEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !20)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !20)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_22_OutputIteratorConceptISt19ostreambuf_iteratorIcSt11char_traitsIcEEcEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !21)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !21)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_22_OutputIteratorConceptISt19ostreambuf_iteratorIwSt11char_traitsIwEEwEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !22)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !22)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptIPcEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !23)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !23)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptIPKcEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !24)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !24)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptINS_17__normal_iteratorIPKcSsEEEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !25)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !25)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptINS_17__normal_iteratorIPcSsEEEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !26)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !26)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptINS_17__normal_iteratorIPKwSbIwSt11char_traitsIwESaIwEEEEEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !27)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !27)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptINS_17__normal_iteratorIPwSbIwSt11char_traitsIwESaIwEEEEEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !28)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !28)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptIPwEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !29)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !29)
+ ret void
+}
+
+define weak void @_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptIPKwEEEEvv() {
+entry:
+ tail call void @llvm.dbg.func.start(metadata !30)
+ tail call void @llvm.dbg.stoppoint(i32 63, i32 0, metadata !2)
+ tail call void @llvm.dbg.region.end(metadata !30)
+ ret void
+}
+
+declare void @llvm.dbg.func.start(metadata) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, metadata) nounwind readnone
+
+declare void @llvm.dbg.region.end(metadata) nounwind readnone
+
+declare extern_weak i32 @pthread_once(i32*, void ()*)
+
+declare extern_weak i8* @pthread_getspecific(i32)
+
+declare extern_weak i32 @pthread_setspecific(i32, i8*)
+
+declare extern_weak i32 @pthread_create(i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare extern_weak i32 @pthread_cancel(i64)
+
+declare extern_weak i32 @pthread_mutex_lock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)
+
+declare extern_weak i32 @pthread_key_create(i32*, void (i8*)*)
+
+declare extern_weak i32 @pthread_key_delete(i32)
+
+declare extern_weak i32 @pthread_mutexattr_init(%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)
+
+declare extern_weak i32 @pthread_mutexattr_settype(%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*, i32)
+
+declare extern_weak i32 @pthread_mutexattr_destroy(%"struct.__gnu_cxx::_ConvertibleConcept<unsigned int,unsigned int>"*)
+
+!0 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__aux_require_boolean_expr<bool>", metadata !"__aux_require_boolean_expr<bool>", metadata !"_ZN9__gnu_cxx26__aux_require_boolean_exprIbEEvRKT_", metadata !2, i32 239, metadata !3, i1 false, i1 true}
+!1 = metadata !{i32 458769, i32 0, i32 4, metadata !"concept-inst.cc", metadata !"/home/buildbot/buildslave/llvm-x86_64-linux-selfhost/llvm-gcc.obj/x86_64-unknown-linux-gnu/libstdc++-v3/src/../../../../llvm-gcc.src/libstdc++-v3/src", metadata !"4.2.1 (Based on Apple Inc. build 5649) (LLVM build)", i1 true, i1 true, metadata !"", i32 0}
+!2 = metadata !{i32 458769, i32 0, i32 4, metadata !"boost_concept_check.h", metadata !"/home/buildbot/buildslave/llvm-x86_64-linux-selfhost/llvm-gcc.obj/x86_64-unknown-linux-gnu/libstdc++-v3/include/bits", metadata !"4.2.1 (Based on Apple Inc. build 5649) (LLVM build)", i1 false, i1 true, metadata !"", i32 0}
+!3 = metadata !{i32 458773, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0}
+!4 = metadata !{null, metadata !5}
+!5 = metadata !{i32 458768, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !6}
+!6 = metadata !{i32 458790, metadata !1, metadata !"", metadata !1, i32 0, i64 8, i64 8, i64 0, i32 0, metadata !7}
+!7 = metadata !{i32 458788, metadata !1, metadata !"bool", metadata !1, i32 0, i64 8, i64 8, i64 0, i32 0, i32 2}
+!8 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_ConvertibleConcept<unsigned int, unsigned int> >", metadata !"__function_requires<__gnu_cxx::_ConvertibleConcept<unsigned int, unsigned int> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_19_ConvertibleConceptIjjEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!9 = metadata !{i32 458773, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !10, i32 0}
+!10 = metadata !{null}
+!11 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_InputIteratorConcept<char*> >", metadata !"__function_requires<__gnu_cxx::_InputIteratorConcept<char*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_21_InputIteratorConceptIPcEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!12 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_InputIteratorConcept<const char*> >", metadata !"__function_requires<__gnu_cxx::_InputIteratorConcept<const char*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_21_InputIteratorConceptIPKcEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!13 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_InputIteratorConcept<wchar_t*> >", metadata !"__function_requires<__gnu_cxx::_InputIteratorConcept<wchar_t*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_21_InputIteratorConceptIPwEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!14 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_InputIteratorConcept<const wchar_t*> >", metadata !"__function_requires<__gnu_cxx::_InputIteratorConcept<const wchar_t*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_21_InputIteratorConceptIPKwEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!15 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<wchar_t*> >", metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<wchar_t*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIPwEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!16 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<char*> >", metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<char*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIPcEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!17 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<int> >", metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<int> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIiEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!18 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<long int> >", metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<long int> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIlEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!19 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<long long int> >", metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<long long int> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIxEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!20 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<unsigned int> >", metadata !"__function_requires<__gnu_cxx::_LessThanComparableConcept<unsigned int> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_26_LessThanComparableConceptIjEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!21 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_OutputIteratorConcept<std::ostreambuf_iterator<char, std::char_traits<char> >, char> >", metadata !"__function_requires<__gnu_cxx::_OutputIteratorConcept<std::ostreambuf_iterator<char, std::char_traits<char> >, char> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_22_OutputIteratorConceptISt19ostreambuf_iteratorIcSt11char_traitsIcEEcEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!22 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_OutputIteratorConcept<std::ostreambuf_iterator<wchar_t, std::char_traits<wchar_t> >, wchar_t> >", metadata !"__function_requires<__gnu_cxx::_OutputIteratorConcept<std::ostreambuf_iterator<wchar_t, std::char_traits<wchar_t> >, wchar_t> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_22_OutputIteratorConceptISt19ostreambuf_iteratorIwSt11char_traitsIwEEwEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!23 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<char*> >", metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<char*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptIPcEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!24 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<const char*> >", metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<const char*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptIPKcEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!25 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<__gnu_cxx::__normal_iterator<const char*, std::basic_string<char, std::char_traits<char>, std::allocator<char> > > > >", metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<__gnu_cxx::__normal_iterator<const char*, std::basic_string<char, std::char_traits<char>, std::allocator<char> > > > >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptINS_17__normal_iteratorIPKcSsEEEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!26 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<__gnu_cxx::__normal_iterator<char*, std::basic_string<char, std::char_traits<char>, std::allocator<char> > > > >", metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<__gnu_cxx::__normal_iterator<char*, std::basic_string<char, std::char_traits<char>, std::allocator<char> > > > >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptINS_17__normal_iteratorIPcSsEEEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!27 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<__gnu_cxx::__normal_iterator<const wchar_t*, std::basic_string<wchar_t, std::char_traits<wchar_t>, std::allocator<wchar_t> > > > >", metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<__gnu_cxx::__normal_iterator<const wchar_t*, std::basic_string<wchar_t, std::char_traits<wchar_t>, std::allocator<wchar_t> > > > >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptINS_17__normal_iteratorIPKwSbIwSt11char_traitsIwESaIwEEEEEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!28 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<__gnu_cxx::__normal_iterator<wchar_t*, std::basic_string<wchar_t, std::char_traits<wchar_t>, std::allocator<wchar_t> > > > >", metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<__gnu_cxx::__normal_iterator<wchar_t*, std::basic_string<wchar_t, std::char_traits<wchar_t>, std::allocator<wchar_t> > > > >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptINS_17__normal_iteratorIPwSbIwSt11char_traitsIwESaIwEEEEEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!29 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<wchar_t*> >", metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<wchar_t*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptIPwEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
+!30 = metadata !{i32 458798, i32 0, metadata !1, metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<const wchar_t*> >", metadata !"__function_requires<__gnu_cxx::_RandomAccessIteratorConcept<const wchar_t*> >", metadata !"_ZN9__gnu_cxx19__function_requiresINS_28_RandomAccessIteratorConceptIPKwEEEEvv", metadata !2, i32 61, metadata !9, i1 false, i1 true}
diff --git a/test/Transforms/GlobalDCE/basicvariabletest.ll b/test/Transforms/GlobalDCE/basicvariabletest.ll
new file mode 100644
index 0000000..a97b66d
--- /dev/null
+++ b/test/Transforms/GlobalDCE/basicvariabletest.ll
@@ -0,0 +1,5 @@
+; RUN: opt < %s -globaldce -S | not grep global
+
+@X = external global i32
+@Y = internal global i32 7
+
diff --git a/test/Transforms/GlobalDCE/dg.exp b/test/Transforms/GlobalDCE/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/GlobalDCE/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/GlobalDCE/externally_available.ll b/test/Transforms/GlobalDCE/externally_available.ll
new file mode 100644
index 0000000..cc88cb1
--- /dev/null
+++ b/test/Transforms/GlobalDCE/externally_available.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -globaldce -S | not grep test_
+
+; test_function should not be emitted to the .s file.
+define available_externally i32 @test_function() {
+ ret i32 4
+}
+
+; test_global should not be emitted to the .s file.
+@test_global = available_externally global i32 4
+
diff --git a/test/Transforms/GlobalOpt/2004-10-10-CastStoreOnce.ll b/test/Transforms/GlobalOpt/2004-10-10-CastStoreOnce.ll
new file mode 100644
index 0000000..bdcf1fa
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2004-10-10-CastStoreOnce.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -globalopt
+
+@V = global float 1.200000e+01 ; <float*> [#uses=1]
+@G = internal global i32* null ; <i32**> [#uses=2]
+
+define i32 @user() {
+ %P = load i32** @G ; <i32*> [#uses=1]
+ %Q = load i32* %P ; <i32> [#uses=1]
+ ret i32 %Q
+}
+
+define void @setter() {
+ %Vi = bitcast float* @V to i32* ; <i32*> [#uses=1]
+ store i32* %Vi, i32** @G
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/2005-06-15-LocalizeConstExprCrash.ll b/test/Transforms/GlobalOpt/2005-06-15-LocalizeConstExprCrash.ll
new file mode 100644
index 0000000..7bcb1d4
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2005-06-15-LocalizeConstExprCrash.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -globalopt -disable-output
+; PR579
+
+@g_40507551 = internal global i16 31038 ; <i16*> [#uses=1]
+
+define void @main() {
+ %tmp.4.i.1 = load i8* getelementptr (i8* bitcast (i16* @g_40507551 to i8*), i32 1) ; <i8> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/2005-09-27-Crash.ll b/test/Transforms/GlobalOpt/2005-09-27-Crash.ll
new file mode 100644
index 0000000..ab2077a
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2005-09-27-Crash.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -globalopt -disable-output
+ %RPyString = type { i32, %arraytype.Char }
+ %arraytype.Char = type { i32, [0 x i8] }
+ %arraytype.Signed = type { i32, [0 x i32] }
+ %functiontype.1 = type %RPyString* (i32)
+ %structtype.test = type { i32, %arraytype.Signed }
[email protected] = internal global { i32, { i32, [2 x i32] } } { i32 41, { i32, [2 x i32] } { i32 2, [2 x i32] [ i32 100, i32 101 ] } } ; <{ i32, { i32, [2 x i32] } }*> [#uses=1]
+
+define fastcc void @pypy_array_constant() {
+block0:
+ %tmp.9 = getelementptr %structtype.test* bitcast ({ i32, { i32, [2 x i32] } }* @structinstance.test to %structtype.test*), i32 0, i32 0 ; <i32*> [#uses=0]
+ ret void
+}
+
+define fastcc void @new.varsizestruct.rpy_string() {
+ unreachable
+}
+
+define void @__entrypoint__pypy_array_constant() {
+ call fastcc void @pypy_array_constant( )
+ ret void
+}
+
+define void @__entrypoint__raised_LLVMException() {
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/2006-07-07-InlineAsmCrash.ll b/test/Transforms/GlobalOpt/2006-07-07-InlineAsmCrash.ll
new file mode 100644
index 0000000..c971219
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2006-07-07-InlineAsmCrash.ll
@@ -0,0 +1,135 @@
+; RUN: opt < %s -globalopt -disable-output
+; PR820
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct..0FileDescriptor = type { i32 }
+ %"struct.FlagDescription<int32>" = type { i8*, i32*, i1, i1, i32, i8* }
+ %"struct.FlagRegisterer<bool>" = type { i8 }
+ %struct.MutexLock = type { %struct..0FileDescriptor* }
+ %"struct.std::DisabledRangeMap" = type { %"struct.std::_Rb_tree<const char*,std::pair<const char* const, FlagDescription<bool> >,std::_Select1st<std::pair<const char* const, FlagDescription<bool> > >,StringCmp,std::allocator<std::pair<const char* const, FlagDescription<bool> > > >" }
+ %"struct.std::_Rb_tree<const char*,std::pair<const char* const, FlagDescription<bool> >,std::_Select1st<std::pair<const char* const, FlagDescription<bool> > >,StringCmp,std::allocator<std::pair<const char* const, FlagDescription<bool> > > >" = type { %"struct.std::_Rb_tree<const char*,std::pair<const char* const, FlagDescription<bool> >,std::_Select1st<std::pair<const char* const, FlagDescription<bool> > >,StringCmp,std::allocator<std::pair<const char* const, FlagDescription<bool> > > >::_Rb_tree_impl<StringCmp,false>" }
+ %"struct.std::_Rb_tree<const char*,std::pair<const char* const, FlagDescription<bool> >,std::_Select1st<std::pair<const char* const, FlagDescription<bool> > >,StringCmp,std::allocator<std::pair<const char* const, FlagDescription<bool> > > >::_Rb_tree_impl<StringCmp,false>" = type { %"struct.FlagRegisterer<bool>", %"struct.std::_Rb_tree_node_base", i32 }
+ %"struct.std::_Rb_tree_const_iterator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" = type { %"struct.std::_Rb_tree_node_base"* }
+ %"struct.std::_Rb_tree_node_base" = type { i32, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"* }
+ %"struct.std::_Vector_base<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl" }
+ %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl" = type { i32*, i32*, i32* }
+ %"struct.std::vector<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >" }
+@registry_lock = external global %struct..0FileDescriptor ; <%struct..0FileDescriptor*> [#uses=0]
+@_ZN61FLAG__foo_int32_44FLAGS_E = external global %"struct.FlagRegisterer<bool>" ; <%"struct.FlagRegisterer<bool>"*> [#uses=0]
[email protected]_ctors = appending global [20 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN62FLAG__foo_string_10FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN60FLAG__foo_bool_19FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZNK5Bzh4Enum13is_contiguousEv }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN62FLAG__foo_string_17FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN61FLAG__foo_int32_21FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN7ScannerC2Ev }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__Z11StripStringPSsPKcc }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZNK9__gnu_cxx4hashI11StringPieceEclERKS1_ }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN8Hasher325ResetEj }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__Z25ACLRv }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN61FLAG__foo_int64_25FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN61FLAG__foo_int32_7FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN62FLAG__foo_string_18FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN62FLAG__foo_string_17FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN61FLAG__foo_int32_25FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I_eventbuf }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN61FLAG__foo_int32_26FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN62FLAG__foo_string_16FLAGS_E }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__ZN17InitializerC2EPKcS1_PFvvE }, { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__checker_bcad_variable } ] ; <[20 x { i32, void ()* }]*> [#uses=0]
+
+declare void @_GLOBAL__I__ZN62FLAG__foo_string_10FLAGS_E()
+
+declare void @_GLOBAL__I__ZN60FLAG__foo_bool_19FLAGS_E()
+
+declare void @_GLOBAL__I__ZNK5Bzh4Enum13is_contiguousEv()
+
+declare void @_GLOBAL__I__ZN62FLAG__foo_string_17FLAGS_E()
+
+declare void @_GLOBAL__I__ZN61FLAG__foo_int32_21FLAGS_E()
+
+define void @_ZN14FlagRegistererIiEC1EPKcRK15FlagDescriptionIiE() {
+entry:
+ call void @_Z12RegisterFlagIiEvPKcRK15FlagDescriptionIT_E( )
+ ret void
+}
+
+define void @_Z12RegisterFlagIiEvPKcRK15FlagDescriptionIT_E() {
+entry:
+ call void @_ZN9MutexLockC1EP5Mutex( )
+ ret void
+}
+
+declare void @_GLOBAL__I__ZN7ScannerC2Ev()
+
+declare void @_GLOBAL__I__Z11StripStringPSsPKcc()
+
+define void @_ZNSt6vectorIiSaIiEEC1ERKS0_() {
+entry:
+ unreachable
+}
+
+declare void @_GLOBAL__I__ZNK9__gnu_cxx4hashI11StringPieceEclERKS1_()
+
+declare void @_GLOBAL__I__ZN8Hasher325ResetEj()
+
+declare void @_GLOBAL__I__Z25ACLRv()
+
+define void @_ZN9MutexLockC1EP5Mutex() {
+entry:
+ call void @_ZN5Mutex4LockEv( )
+ ret void
+}
+
+define void @_ZN5Mutex4LockEv() {
+entry:
+ call void @_Z22Acquire_CASPViii( )
+ ret void
+}
+
+define void @_ZNSt3mapIPKc15FlagDescriptionIiE9StringCmpSaISt4pairIKS1_S3_EEE3endEv(%"struct.std::_Rb_tree_const_iterator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > >"* sret %agg.result) {
+entry:
+ unreachable
+}
+
+declare void @_GLOBAL__I__ZN61FLAG__foo_int64_25FLAGS_E()
+
+define void @_Z14CASPViii() {
+entry:
+ %tmp3 = call i32 asm sideeffect "lock; cmpxchg $1,$2", "={ax},q,m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( i32 0, i32* null, i32 0 ) ; <i32> [#uses=0]
+ unreachable
+}
+
+declare void @_GLOBAL__I__ZN61FLAG__foo_int32_7FLAGS_E()
+
+declare void @_GLOBAL__I__ZN62FLAG__foo_string_18FLAGS_E()
+
+define void @_Z22Acquire_CASPViii() {
+entry:
+ call void @_Z14CASPViii( )
+ unreachable
+}
+
+declare void @_GLOBAL__I__ZN61FLAG__foo_int32_25FLAGS_E()
+
+declare void @_GLOBAL__I_eventbuf()
+
+define void @_GLOBAL__I__ZN61FLAG__foo_int32_26FLAGS_E() {
+entry:
+ call void @_Z41__static_initialization_and_destruction_0ii1662( i32 1, i32 65535 )
+ ret void
+}
+
+define void @_Z41__static_initialization_and_destruction_0ii1662(i32 %__initialize_p, i32 %__priority) {
+entry:
+ %__initialize_p_addr = alloca i32 ; <i32*> [#uses=2]
+ %__priority_addr = alloca i32 ; <i32*> [#uses=2]
+ store i32 %__initialize_p, i32* %__initialize_p_addr
+ store i32 %__priority, i32* %__priority_addr
+ %tmp = load i32* %__priority_addr ; <i32> [#uses=1]
+ %tmp.upgrd.1 = icmp eq i32 %tmp, 65535 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.1, label %cond_true, label %cond_next14
+
+cond_true: ; preds = %entry
+ %tmp8 = load i32* %__initialize_p_addr ; <i32> [#uses=1]
+ %tmp9 = icmp eq i32 %tmp8, 1 ; <i1> [#uses=1]
+ br i1 %tmp9, label %cond_true10, label %cond_next14
+
+cond_true10: ; preds = %cond_true
+ call void @_ZN14FlagRegistererIiEC1EPKcRK15FlagDescriptionIiE( )
+ ret void
+
+cond_next14: ; preds = %cond_true, %entry
+ ret void
+}
+
+declare void @_GLOBAL__I__ZN62FLAG__foo_string_16FLAGS_E()
+
+define void @_ZN9__gnu_cxx13new_allocatorIPNS_15_Hashtable_nodeIjEEEC2Ev() {
+entry:
+ unreachable
+}
+
+declare void @_GLOBAL__I__ZN17InitializerC2EPKcS1_PFvvE()
+
+declare void @_GLOBAL__I__checker_bcad_variable()
diff --git a/test/Transforms/GlobalOpt/2006-11-01-ShrinkGlobalPhiCrash.ll b/test/Transforms/GlobalOpt/2006-11-01-ShrinkGlobalPhiCrash.ll
new file mode 100644
index 0000000..352639a
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2006-11-01-ShrinkGlobalPhiCrash.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -globalopt -disable-output
+
+ %struct._list = type { i32*, %struct._list* }
+ %struct._play = type { i32, i32*, %struct._list*, %struct._play* }
+@nrow = internal global i32 0 ; <i32*> [#uses=2]
+
+define void @make_play() {
+entry:
+ br label %cond_true16.i
+
+cond_true16.i: ; preds = %cond_true16.i, %entry
+ %low.0.in.i.0 = phi i32* [ @nrow, %entry ], [ null, %cond_true16.i ] ; <i32*> [#uses=1]
+ %low.0.i = load i32* %low.0.in.i.0 ; <i32> [#uses=0]
+ br label %cond_true16.i
+}
+
+define void @make_wanted() {
+entry:
+ unreachable
+}
+
+define void @get_good_move() {
+entry:
+ ret void
+}
+
+define void @main() {
+entry:
+ store i32 8, i32* @nrow
+ tail call void @make_play( )
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/2007-04-05-Crash.ll b/test/Transforms/GlobalOpt/2007-04-05-Crash.ll
new file mode 100644
index 0000000..d306d14
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2007-04-05-Crash.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -globalopt -disable-output
+
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
+target triple = "thumb-apple-darwin8"
+@replacementUnichar = internal global i16 -3 ; <i16*> [#uses=2]
+@"L_OBJC_IMAGE_INFO" = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast ([2 x i32]* @"L_OBJC_IMAGE_INFO" to i8*) ] ; <[1 x i8*]*> [#uses=0]
+
+define i16 @__NSCharToUnicharCFWrapper(i8 zeroext %ch) zeroext {
+entry:
+ %iftmp.0.0.in.in = select i1 false, i16* @replacementUnichar, i16* null ; <i16*> [#uses=1]
+ %iftmp.0.0.in = load i16* %iftmp.0.0.in.in ; <i16> [#uses=1]
+ ret i16 %iftmp.0.0.in
+}
+
+define void @__NSASCIICharToUnichar() {
+entry:
+ ret void
+}
+
+define void @_NSDefaultCStringEncoding() {
+entry:
+ call void @__NSSetCStringCharToUnichar( )
+ br i1 false, label %cond_true6, label %cond_next8
+
+cond_true6: ; preds = %entry
+ store i16 -2, i16* @replacementUnichar
+ ret void
+
+cond_next8: ; preds = %entry
+ ret void
+}
+
+declare void @__NSSetCStringCharToUnichar()
diff --git a/test/Transforms/GlobalOpt/2007-05-13-Crash.ll b/test/Transforms/GlobalOpt/2007-05-13-Crash.ll
new file mode 100644
index 0000000..5703909
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2007-05-13-Crash.ll
@@ -0,0 +1,74 @@
+; RUN: opt < %s -globalopt -disable-output
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+ %struct.SFLMutableListItem = type { i16 }
+ %struct.__CFDictionary = type opaque
+ %struct.__CFString = type opaque
+ %struct.__builtin_CFString = type { i32*, i32, i8*, i32 }
+@_ZZ19SFLGetVisibilityKeyvE19_kSFLLVisibilityKey = internal global %struct.__CFString* null ; <%struct.__CFString**> [#uses=2]
+@_ZZ22SFLGetAlwaysVisibleKeyvE22_kSFLLAlwaysVisibleKey = internal global %struct.__CFString* null ; <%struct.__CFString**> [#uses=7]
+internal constant %struct.__builtin_CFString {
+ i32* getelementptr ([0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0),
+ i32 1992,
+ i8* getelementptr ([14 x i8]* @.str, i32 0, i32 0),
+ i32 13 }, section "__DATA,__cfstring" ; <%struct.__builtin_CFString*>:0 [#uses=1]
+@__CFConstantStringClassReference = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"AlwaysVisible\00" ; <[14 x i8]*> [#uses=1]
+@_ZZ21SFLGetNeverVisibleKeyvE21_kSFLLNeverVisibleKey = internal global %struct.__CFString* null ; <%struct.__CFString**> [#uses=2]
+
+define %struct.__CFString* @_Z19SFLGetVisibilityKeyv() {
+entry:
+ %tmp1 = load %struct.__CFString** @_ZZ19SFLGetVisibilityKeyvE19_kSFLLVisibilityKey ; <%struct.__CFString*> [#uses=1]
+ ret %struct.__CFString* %tmp1
+}
+
+define %struct.__CFString* @_Z22SFLGetAlwaysVisibleKeyv() {
+entry:
+ %tmp1 = load %struct.__CFString** @_ZZ22SFLGetAlwaysVisibleKeyvE22_kSFLLAlwaysVisibleKey ; <%struct.__CFString*> [#uses=1]
+ %tmp2 = icmp eq %struct.__CFString* %tmp1, null ; <i1> [#uses=1]
+ br i1 %tmp2, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ store %struct.__CFString* bitcast (%struct.__builtin_CFString* @0 to %struct.__CFString*), %struct.__CFString** @_ZZ22SFLGetAlwaysVisibleKeyvE22_kSFLLAlwaysVisibleKey
+ br label %cond_next
+
+cond_next: ; preds = %entry, %cond_true
+ %tmp4 = load %struct.__CFString** @_ZZ22SFLGetAlwaysVisibleKeyvE22_kSFLLAlwaysVisibleKey ; <%struct.__CFString*> [#uses=1]
+ ret %struct.__CFString* %tmp4
+}
+
+define %struct.__CFString* @_Z21SFLGetNeverVisibleKeyv() {
+entry:
+ %tmp1 = load %struct.__CFString** @_ZZ21SFLGetNeverVisibleKeyvE21_kSFLLNeverVisibleKey ; <%struct.__CFString*> [#uses=1]
+ ret %struct.__CFString* %tmp1
+}
+
+define %struct.__CFDictionary* @_ZN18SFLMutableListItem18GetPrefsDictionaryEv(%struct.SFLMutableListItem* %this) {
+entry:
+ %tmp4 = getelementptr %struct.SFLMutableListItem* %this, i32 0, i32 0 ; <i16*> [#uses=1]
+ %tmp5 = load i16* %tmp4 ; <i16> [#uses=1]
+ %tmp6 = icmp eq i16 %tmp5, 0 ; <i1> [#uses=1]
+ br i1 %tmp6, label %cond_next22, label %cond_true
+
+cond_true: ; preds = %entry
+ %tmp9 = load %struct.__CFString** @_ZZ22SFLGetAlwaysVisibleKeyvE22_kSFLLAlwaysVisibleKey ; <%struct.__CFString*> [#uses=1]
+ %tmp10 = icmp eq %struct.__CFString* %tmp9, null ; <i1> [#uses=1]
+ br i1 %tmp10, label %cond_true13, label %cond_next22
+
+cond_true13: ; preds = %cond_true
+ store %struct.__CFString* bitcast (%struct.__builtin_CFString* @0 to %struct.__CFString*), %struct.__CFString** @_ZZ22SFLGetAlwaysVisibleKeyvE22_kSFLLAlwaysVisibleKey
+ br label %cond_next22
+
+cond_next22: ; preds = %entry, %cond_true13, %cond_true
+ %iftmp.1.0.in = phi %struct.__CFString** [ @_ZZ22SFLGetAlwaysVisibleKeyvE22_kSFLLAlwaysVisibleKey, %cond_true ], [ @_ZZ22SFLGetAlwaysVisibleKeyvE22_kSFLLAlwaysVisibleKey, %cond_true13 ], [ @_ZZ21SFLGetNeverVisibleKeyvE21_kSFLLNeverVisibleKey, %entry ] ; <%struct.__CFString**> [#uses=1]
+ %iftmp.1.0 = load %struct.__CFString** %iftmp.1.0.in ; <%struct.__CFString*> [#uses=1]
+ %tmp24 = load %struct.__CFString** @_ZZ19SFLGetVisibilityKeyvE19_kSFLLVisibilityKey ; <%struct.__CFString*> [#uses=1]
+ %tmp2728 = bitcast %struct.__CFString* %tmp24 to i8* ; <i8*> [#uses=1]
+ %tmp2930 = bitcast %struct.__CFString* %iftmp.1.0 to i8* ; <i8*> [#uses=1]
+ call void @_Z20CFDictionaryAddValuePKvS0_( i8* %tmp2728, i8* %tmp2930 )
+ ret %struct.__CFDictionary* undef
+}
+
+declare void @_Z20CFDictionaryAddValuePKvS0_(i8*, i8*)
+
diff --git a/test/Transforms/GlobalOpt/2007-06-04-PackedStruct.ll b/test/Transforms/GlobalOpt/2007-06-04-PackedStruct.ll
new file mode 100644
index 0000000..7036c15
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2007-06-04-PackedStruct.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -globalopt -disable-output
+; PR1491
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+ %"struct.__gnu_cxx::new_allocator<std::_Rb_tree_node<std::pair<const int, int> > >" = type <{ i8 }>
+ %"struct.std::_Rb_tree<int,std::pair<const int, int>,std::_Select1st<std::pair<const int, int> >,std::less<int>,std::allocator<std::pair<const int, int> > >" = type { %"struct.std::_Rb_tree<int,std::pair<const int, int>,std::_Select1st<std::pair<const int, int> >,std::less<int>,std::allocator<std::pair<const int, int> > >::_Rb_tree_impl<std::less<int>,false>" }
+ %"struct.std::_Rb_tree<int,std::pair<const int, int>,std::_Select1st<std::pair<const int, int> >,std::less<int>,std::allocator<std::pair<const int, int> > >::_Rb_tree_impl<std::less<int>,false>" = type { %"struct.__gnu_cxx::new_allocator<std::_Rb_tree_node<std::pair<const int, int> > >", %"struct.std::_Rb_tree_node_base", i32 }
+ %"struct.std::_Rb_tree_node_base" = type { i32, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"* }
+ %"struct.std::map<int,int,std::less<int>,std::allocator<std::pair<const int, int> > >" = type { %"struct.std::_Rb_tree<int,std::pair<const int, int>,std::_Select1st<std::pair<const int, int> >,std::less<int>,std::allocator<std::pair<const int, int> > >" }
+@someMap = global %"struct.std::map<int,int,std::less<int>,std::allocator<std::pair<const int, int> > >" zeroinitializer ; <%"struct.std::map<int,int,std::less<int>,std::allocator<std::pair<const int, int> > >"*> [#uses=1]
[email protected]_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I_someMap } ] ; <[1 x { i32, void ()* }]*> [#uses=0]
[email protected]_dtors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__D_someMap } ] ; <[1 x { i32, void ()* }]*> [#uses=0]
+
+define void @_GLOBAL__I_someMap() {
+entry:
+ call void @_Z41__static_initialization_and_destruction_0ii( i32 1, i32 65535 )
+ ret void
+}
+
+declare void @_GLOBAL__D_someMap()
+
+define void @_Z41__static_initialization_and_destruction_0ii(i32 %__initialize_p, i32 %__priority) {
+entry:
+ %tmp1 = icmp eq i32 %__priority, 65535 ; <i1> [#uses=1]
+ %tmp4 = icmp eq i32 %__initialize_p, 1 ; <i1> [#uses=1]
+ %tmp7 = and i1 %tmp1, %tmp4 ; <i1> [#uses=1]
+ br i1 %tmp7, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ store i8 0, i8* getelementptr (%"struct.std::map<int,int,std::less<int>,std::allocator<std::pair<const int, int> > >"* @someMap, i32 0, i32 0, i32 0, i32 0, i32 0)
+ ret void
+
+cond_next: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/GlobalOpt/2007-11-09-GEP-GEP-Crash.ll b/test/Transforms/GlobalOpt/2007-11-09-GEP-GEP-Crash.ll
new file mode 100644
index 0000000..442cb92
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2007-11-09-GEP-GEP-Crash.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -globalopt -disable-output
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin8"
+ %struct.empty0 = type { }
+ %struct.es = type { %struct.empty0 }
+ %struct.es1 = type { %struct.empty0 }
+@aaui1 = internal global [6 x [2 x i32]] [ [2 x i32] [ i32 1, i32 1 ], [2 x i32] [ i32 1, i32 1 ], [2 x i32] [ i32 1, i32 1 ], [2 x i32] [ i32 1, i32 1 ], [2 x i32] [ i32 1, i32 1 ], [2 x i32] [ i32 1, i32 1 ] ] ; <[6 x [2 x i32]]*> [#uses=1]
+@aaui0 = internal global [0 x [2 x i32]] zeroinitializer ; <[0 x [2 x i32]]*> [#uses=1]
+
+define i8 @func() {
+entry:
+ %tmp10 = getelementptr [2 x i32]* getelementptr ([6 x [2 x i32]]* @aaui1, i32 0, i32 0), i32 5, i32 1 ; <i32*> [#uses=1]
+ %tmp11 = load i32* %tmp10, align 4 ; <i32> [#uses=1]
+ %tmp12 = call i32 (...)* @func3( i32* null, i32 0, i32 %tmp11 ) ; <i32> [#uses=0]
+ ret i8 undef
+}
+
+declare i32 @func3(...)
+
diff --git a/test/Transforms/GlobalOpt/2008-01-03-Crash.ll b/test/Transforms/GlobalOpt/2008-01-03-Crash.ll
new file mode 100644
index 0000000..4105ab1
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2008-01-03-Crash.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -globalopt | llvm-dis
+; PR1896
+
+@indirect1 = internal global void (i32)* null ; <void (i32)**> [#uses=2]
+
+declare void @indirectmarked(i32)
+
+define i32 @main() {
+entry:
+ br i1 false, label %cond_next20.i, label %cond_true.i9
+
+cond_true.i9: ; preds = %entry
+ ret i32 0
+
+cond_next20.i: ; preds = %entry
+ store void (i32)* @indirectmarked, void (i32)** @indirect1, align 4
+ br i1 false, label %cond_next21.i.i23.i, label %stack_restore
+
+stack_restore: ; preds = %cond_next20.i
+ ret i32 0
+
+cond_next21.i.i23.i: ; preds = %cond_next20.i
+ %tmp6.i4.i = load i32* bitcast (void (i32)** @indirect1 to i32*), align 4 ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/Transforms/GlobalOpt/2008-01-13-OutOfRangeSROA.ll b/test/Transforms/GlobalOpt/2008-01-13-OutOfRangeSROA.ll
new file mode 100644
index 0000000..82abc8f
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2008-01-13-OutOfRangeSROA.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -globalopt -S | grep {16 x .31 x double.. zeroinitializer}
+
+; The 'X' indices could be larger than 31. Do not SROA the outer indices of this array.
+@mm = internal global [16 x [31 x double]] zeroinitializer, align 32
+
+define void @test(i32 %X) {
+ %P = getelementptr [16 x [31 x double]]* @mm, i32 0, i32 0, i32 %X
+ store double 1.0, double* %P
+ ret void
+}
+
+define double @get(i32 %X) {
+ %P = getelementptr [16 x [31 x double]]* @mm, i32 0, i32 0, i32 %X
+ %V = load double* %P
+ ret double %V
+}
diff --git a/test/Transforms/GlobalOpt/2008-01-29-VolatileGlobal.ll b/test/Transforms/GlobalOpt/2008-01-29-VolatileGlobal.ll
new file mode 100644
index 0000000..0c81700
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2008-01-29-VolatileGlobal.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -globalopt -S | grep {volatile load}
[email protected] = internal global double 0x3FD5555555555555, align 8 ; <double*> [#uses=1]
+
+define double @foo() nounwind {
+entry:
+ %tmp1 = volatile load double* @t0.1441, align 8 ; <double> [#uses=2]
+ %tmp4 = fmul double %tmp1, %tmp1 ; <double> [#uses=1]
+ ret double %tmp4
+}
diff --git a/test/Transforms/GlobalOpt/2008-02-16-NestAttr.ll b/test/Transforms/GlobalOpt/2008-02-16-NestAttr.ll
new file mode 100644
index 0000000..0e70c49
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2008-02-16-NestAttr.ll
@@ -0,0 +1,57 @@
+; RUN: opt < %s -globalopt -S | grep { nest } | count 1
+ %struct.FRAME.nest = type { i32, i32 (i32)* }
+ %struct.__builtin_trampoline = type { [10 x i8] }
[email protected] = internal constant [7 x i8] c"%d %d\0A\00" ; <[7 x i8]*> [#uses=1]
+
+define i32 @process(i32 (i32)* %func) nounwind {
+entry:
+ %tmp2 = tail call i32 %func( i32 1 ) nounwind ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define internal fastcc i32 @g.1478(%struct.FRAME.nest* nest %CHAIN.1, i32 %m) nounwind {
+entry:
+ %tmp3 = getelementptr %struct.FRAME.nest* %CHAIN.1, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp4 = load i32* %tmp3, align 4 ; <i32> [#uses=1]
+ %tmp7 = icmp eq i32 %tmp4, %m ; <i1> [#uses=1]
+ %tmp78 = zext i1 %tmp7 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp78
+}
+
+define internal i32 @f.1481(%struct.FRAME.nest* nest %CHAIN.2, i32 %m) nounwind {
+entry:
+ %tmp4 = tail call fastcc i32 @g.1478( %struct.FRAME.nest* nest %CHAIN.2, i32 %m ) nounwind ; <i32> [#uses=1]
+ %tmp6 = getelementptr %struct.FRAME.nest* %CHAIN.2, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp7 = load i32* %tmp6, align 4 ; <i32> [#uses=1]
+ %tmp9 = icmp eq i32 %tmp4, %tmp7 ; <i1> [#uses=1]
+ %tmp910 = zext i1 %tmp9 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp910
+}
+
+define i32 @nest(i32 %n) nounwind {
+entry:
+ %TRAMP.316 = alloca [10 x i8] ; <[10 x i8]*> [#uses=1]
+ %FRAME.0 = alloca %struct.FRAME.nest ; <%struct.FRAME.nest*> [#uses=3]
+ %TRAMP.316.sub = getelementptr [10 x i8]* %TRAMP.316, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp3 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %n, i32* %tmp3, align 8
+ %FRAME.06 = bitcast %struct.FRAME.nest* %FRAME.0 to i8* ; <i8*> [#uses=1]
+ %tramp = call i8* @llvm.init.trampoline( i8* %TRAMP.316.sub, i8* bitcast (i32 (%struct.FRAME.nest*, i32)* @f.1481 to i8*), i8* %FRAME.06 ) ; <i8*> [#uses=1]
+ %tmp7 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 1 ; <i32 (i32)**> [#uses=1]
+ %tmp89 = bitcast i8* %tramp to i32 (i32)* ; <i32 (i32)*> [#uses=2]
+ store i32 (i32)* %tmp89, i32 (i32)** %tmp7, align 4
+ %tmp13 = call i32 @process( i32 (i32)* %tmp89 ) nounwind ; <i32> [#uses=1]
+ ret i32 %tmp13
+}
+
+declare i8* @llvm.init.trampoline(i8*, i8*, i8*) nounwind
+
+define i32 @main() nounwind {
+entry:
+ %tmp = tail call i32 @nest( i32 2 ) nounwind ; <i32> [#uses=1]
+ %tmp1 = tail call i32 @nest( i32 1 ) nounwind ; <i32> [#uses=1]
+ %tmp3 = tail call i32 (i8*, ...)* @printf( i8* noalias getelementptr ([7 x i8]* @.str, i32 0, i32 0), i32 %tmp1, i32 %tmp ) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll b/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll
new file mode 100644
index 0000000..cfc9f30
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll
@@ -0,0 +1,32 @@
+; Verify that when @G is SROA'd that the new globals have correct
+; alignments. Elements 0 and 2 must be 16-byte aligned, and element
+; 1 must be at least 8 byte aligned (but could be more).
+
+; RUN: opt < %s -globalopt -S | grep {@G.0 = internal global .*align 16}
+; RUN: opt < %s -globalopt -S | grep {@G.1 = internal global .*align 8}
+; RUN: opt < %s -globalopt -S | grep {@G.2 = internal global .*align 16}
+; rdar://5891920
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+
+%T = type { double, double, double }
+
+@G = internal global %T zeroinitializer, align 16
+
+
+define void @test() {
+ store double 1.0, double* getelementptr (%T* @G, i32 0, i32 0), align 16
+ store double 2.0, double* getelementptr (%T* @G, i32 0, i32 1), align 8
+ store double 3.0, double* getelementptr (%T* @G, i32 0, i32 2), align 16
+ ret void
+}
+
+define double @test2() {
+ %V1 = load double* getelementptr (%T* @G, i32 0, i32 0), align 16
+ %V2 = load double* getelementptr (%T* @G, i32 0, i32 1), align 8
+ %V3 = load double* getelementptr (%T* @G, i32 0, i32 2), align 16
+ %R = fadd double %V1, %V2
+ %R2 = fadd double %R, %V3
+ ret double %R2
+}
diff --git a/test/Transforms/GlobalOpt/2008-07-17-addrspace.ll b/test/Transforms/GlobalOpt/2008-07-17-addrspace.ll
new file mode 100644
index 0000000..5e64f80
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2008-07-17-addrspace.ll
@@ -0,0 +1,28 @@
+; This test lets globalopt split the global struct and array into different
+; values. This used to crash, because globalopt forgot to put the new var in the
+; same address space as the old one.
+
+; RUN: opt < %s -globalopt -S > %t
+; Check that the new global values still have their address space
+; RUN: cat %t | grep global.*addrspace
+
+@struct = internal addrspace(1) global { i32, i32 } zeroinitializer
+@array = internal addrspace(1) global [ 2 x i32 ] zeroinitializer
+
+define i32 @foo() {
+ %A = load i32 addrspace(1) * getelementptr ({ i32, i32 } addrspace(1) * @struct, i32 0, i32 0)
+ %B = load i32 addrspace(1) * getelementptr ([ 2 x i32 ] addrspace(1) * @array, i32 0, i32 0)
+ ; Use the loaded values, so they won't get removed completely
+ %R = add i32 %A, %B
+ ret i32 %R
+}
+
+; We put stores in a different function, so that the global variables won't get
+; optimized away completely.
+define void @bar(i32 %R) {
+ store i32 %R, i32 addrspace(1) * getelementptr ([ 2 x i32 ] addrspace(1) * @array, i32 0, i32 0)
+ store i32 %R, i32 addrspace(1) * getelementptr ({ i32, i32 } addrspace(1) * @struct, i32 0, i32 0)
+ ret void
+}
+
+
diff --git a/test/Transforms/GlobalOpt/2008-12-16-HeapSRACrash-2.ll b/test/Transforms/GlobalOpt/2008-12-16-HeapSRACrash-2.ll
new file mode 100644
index 0000000..3242e1e
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2008-12-16-HeapSRACrash-2.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -globalopt | llvm-dis
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ %struct.foo = type { i32, i32 }
+@X = internal global %struct.foo* null ; <%struct.foo**> [#uses=2]
+
+define void @bar(i32 %Size) nounwind noinline {
+entry:
+ %tmp = malloc [1000000 x %struct.foo] ; <[1000000 x %struct.foo]*> [#uses=1]
+ %.sub = getelementptr [1000000 x %struct.foo]* %tmp, i32 0, i32 0 ; <%struct.foo*> [#uses=1]
+ store %struct.foo* %.sub, %struct.foo** @X, align 4
+ ret void
+}
+
+define i32 @baz() nounwind readonly noinline {
+bb1.thread:
+ %tmpLD1 = load %struct.foo** @X, align 4 ; <%struct.foo*> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %tmp = phi %struct.foo* [ %tmpLD1, %bb1.thread ], [ %tmpLD1, %bb1 ] ; <%struct.foo*> [#uses=1]
+ %0 = getelementptr %struct.foo* %tmp, i32 1 ; <%struct.foo*> [#uses=0]
+ br label %bb1
+}
diff --git a/test/Transforms/GlobalOpt/2008-12-16-HeapSRACrash.ll b/test/Transforms/GlobalOpt/2008-12-16-HeapSRACrash.ll
new file mode 100644
index 0000000..51dcac1
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2008-12-16-HeapSRACrash.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -globalopt | llvm-dis
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ %struct.foo = type { i32, i32 }
+@X = internal global %struct.foo* null ; <%struct.foo**> [#uses=2]
+
+define void @bar(i32 %Size) nounwind noinline {
+entry:
+ %tmp = malloc [1000000 x %struct.foo] ; <[1000000 x %struct.foo]*> [#uses=1]
+ %.sub = getelementptr [1000000 x %struct.foo]* %tmp, i32 0, i32 0 ; <%struct.foo*> [#uses=1]
+ store %struct.foo* %.sub, %struct.foo** @X, align 4
+ ret void
+}
+
+define i32 @baz() nounwind readonly noinline {
+bb1.thread:
+ %tmpLD1 = load %struct.foo** @X, align 4 ; <%struct.foo*> [#uses=3]
+ store %struct.foo* %tmpLD1, %struct.foo** null
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %tmp = phi %struct.foo* [ %tmpLD1, %bb1.thread ], [ %tmpLD1, %bb1 ] ; <%struct.foo*> [#uses=0]
+ br i1 false, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ ret i32 0
+}
diff --git a/test/Transforms/GlobalOpt/2009-01-13-phi-user.ll b/test/Transforms/GlobalOpt/2009-01-13-phi-user.ll
new file mode 100644
index 0000000..c4b6e52
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-01-13-phi-user.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -globalopt -S | grep {phi.*@head}
+; PR3321
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.node = type { %struct.node*, i32 }
+@head = internal global %struct.node* null ; <%struct.node**> [#uses=2]
+@node = internal global %struct.node { %struct.node* null, i32 42 }, align 16 ; <%struct.node*> [#uses=1]
+
+define i32 @f() nounwind {
+entry:
+ store %struct.node* @node, %struct.node** @head, align 8
+ br label %bb1
+
+bb: ; preds = %bb1
+ %0 = getelementptr %struct.node* %t.0, i64 0, i32 1 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %2 = getelementptr %struct.node* %t.0, i64 0, i32 0 ; <%struct.node**> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %value.0 = phi i32 [ undef, %entry ], [ %1, %bb ] ; <i32> [#uses=1]
+ %t.0.in = phi %struct.node** [ @head, %entry ], [ %2, %bb ] ; <%struct.node**> [#uses=1]
+ %t.0 = load %struct.node** %t.0.in ; <%struct.node*> [#uses=3]
+ %3 = icmp eq %struct.node* %t.0, null ; <i1> [#uses=1]
+ br i1 %3, label %bb2, label %bb
+
+bb2: ; preds = %bb1
+ ret i32 %value.0
+}
+
+define i32 @main() nounwind {
+entry:
+ %0 = call i32 @f() nounwind ; <i32> [#uses=1]
+ ret i32 %0
+}
diff --git a/test/Transforms/GlobalOpt/2009-02-15-BitcastAlias.ll b/test/Transforms/GlobalOpt/2009-02-15-BitcastAlias.ll
new file mode 100644
index 0000000..a1b69ef
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-02-15-BitcastAlias.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -globalopt
+
+@g = external global i32
+
+@a = alias bitcast (i32* @g to i8*)
+
+define void @f() {
+ %tmp = load i8* @a
+ ret void
+}
diff --git a/test/Transforms/GlobalOpt/2009-02-15-ResolveAlias.ll b/test/Transforms/GlobalOpt/2009-02-15-ResolveAlias.ll
new file mode 100644
index 0000000..a5be2b1
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-02-15-ResolveAlias.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+
+define internal void @f() {
+; CHECK-NOT: @f
+; CHECK: define void @a
+ ret void
+}
+
+@a = alias void ()* @f
+
+define void @g() {
+ call void()* @a()
+ ret void
+}
+
+@b = alias internal void ()* @g
+; CHECK-NOT: @b
+
+define void @h() {
+ call void()* @b()
+; CHECK: call void @g
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/2009-03-03-dbg.ll b/test/Transforms/GlobalOpt/2009-03-03-dbg.ll
new file mode 100644
index 0000000..070f89f
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-03-03-dbg.ll
@@ -0,0 +1,54 @@
+; RUN: opt < %s -globalopt -S | not grep global_variable42
+; XFAIL: *
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }*, i32 }
+ %llvm.dbg.derivedtype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }* }
+ %llvm.dbg.global_variable.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1, { }* }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.subrange.type = type { i32, i64, i64 }
+ %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"/tmp\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 2099)\00", section "llvm.metadata" ; <[57 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [1 x { }*] [ { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) ], section "llvm.metadata" ; <[1 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([1 x { }*]* @llvm.dbg.array to { }*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"main\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([5 x i8]* @.str4, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str4, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 3, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite to { }*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"i_ptr\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), i8* getelementptr ([6 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 5, { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=0]
[email protected] = internal global [8 x i32] [ i32 2, i32 3, i32 5, i32 7, i32 11, i32 13, i32 17, i32 19 ] ; <[8 x i32]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subrange.type { i32 458785, i64 0, i64 7 }, section "llvm.metadata" ; <%llvm.dbg.subrange.type*> [#uses=1]
[email protected] = internal constant [1 x { }*] [ { }* bitcast (%llvm.dbg.subrange.type* @llvm.dbg.subrange to { }*) ], section "llvm.metadata" ; <[1 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458753, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 256, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast ([1 x { }*]* @llvm.dbg.array6 to { }*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected]_variables = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"sillyArray.1433\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [11 x i8] c"sillyArray\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected]_variable42 = internal constant %llvm.dbg.global_variable.type { i32 458804, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.global_variables to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([16 x i8]* @.str8, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str9, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite7 to { }*), i1 true, i1 true, { }* bitcast ([8 x i32]* @sillyArray.1433 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.global_variable.type*> [#uses=0]
+
+define i32 @main() nounwind {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ ret i32 0
+}
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.declare({ }*, { }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind
diff --git a/test/Transforms/GlobalOpt/2009-03-05-dbg.ll b/test/Transforms/GlobalOpt/2009-03-05-dbg.ll
new file mode 100644
index 0000000..a5f9ed3
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-03-05-dbg.ll
@@ -0,0 +1,67 @@
+; RUN: opt < %s -globalopt -stats -disable-output |& grep "1 globalopt - Number of global vars shrunk to booleans"
+; XFAIL: *
+
+ type { } ; type %0
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 }
+ %llvm.dbg.global_variable.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1, %0* }
+ %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 }
+ %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"gs.c\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5641) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 1, i8* getelementptr ([5 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"foo\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 4, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"i\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %0*), i8* getelementptr ([2 x i8]* @.str5, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 4, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
+@Stop = internal global i32 0 ; <i32*> [#uses=4]
[email protected]_variables = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 52 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"Stop\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected]_variable = internal constant %llvm.dbg.global_variable.type { i32 458804, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.global_variables to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str6, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str6, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 2, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*), i1 true, i1 true, %0* bitcast (i32* @Stop to %0*) }, section "llvm.metadata" ; <%llvm.dbg.global_variable.type*> [#uses=0]
+
+define i32 @foo(i32 %i) nounwind {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %0*))
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = load i32* @Stop, align 4 ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 1 ; <i1> [#uses=1]
+ br i1 %1, label %bb, label %bb1
+
+bb: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ store i32 0, i32* @Stop, align 4
+ call void @llvm.dbg.stoppoint(i32 7, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %2 = mul i32 %i, 42 ; <i32> [#uses=1]
+ br label %bb2
+
+bb1: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 9, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ store i32 1, i32* @Stop, align 4
+ call void @llvm.dbg.stoppoint(i32 10, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %.0 = phi i32 [ %i, %bb1 ], [ %2, %bb ] ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 10, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.stoppoint(i32 10, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %0*))
+ ret i32 %.0
+}
+
+declare void @llvm.dbg.func.start(%0*) nounwind readnone
+
+declare void @llvm.dbg.declare(%0*, %0*) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind readnone
+
+declare void @llvm.dbg.region.end(%0*) nounwind readnone
diff --git a/test/Transforms/GlobalOpt/2009-03-06-Anonymous.ll b/test/Transforms/GlobalOpt/2009-03-06-Anonymous.ll
new file mode 100644
index 0000000..62f75e1
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-03-06-Anonymous.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -globalopt -S | grep internal | count 2
+
+global i32 0
+define i32* @1() {
+ ret i32* @0
+}
+define i32* @f() {
+entry:
+ call i32* @1()
+ ret i32* %0
+}
diff --git a/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll b/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll
new file mode 100644
index 0000000..e024fc2
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -globalopt -S | grep {@X = internal global i32}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+@X = internal global i32* null ; <i32**> [#uses=2]
+@Y = internal global i32 0 ; <i32*> [#uses=1]
+
+define void @foo() nounwind {
+entry:
+ store i32* @Y, i32** @X, align 4
+ ret void
+}
+
+define i32* @get() nounwind {
+entry:
+ %0 = load i32** @X, align 4 ; <i32*> [#uses=1]
+ ret i32* %0
+}
diff --git a/test/Transforms/GlobalOpt/2009-06-01-RecursivePHI.ll b/test/Transforms/GlobalOpt/2009-06-01-RecursivePHI.ll
new file mode 100644
index 0000000..d3c3ff5
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-06-01-RecursivePHI.ll
@@ -0,0 +1,122 @@
+; RUN: opt < %s -globalopt
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+ %struct.s_annealing_sched = type { i32, float, float, float, float }
+ %struct.s_bb = type { i32, i32, i32, i32 }
+ %struct.s_net = type { i8*, i32, i32*, float, float }
+ %struct.s_placer_opts = type { i32, float, i32, i32, i8*, i32, i32 }
+@net = internal global %struct.s_net* null ; <%struct.s_net**> [#uses=4]
+
+define fastcc void @alloc_and_load_placement_structs(i32 %place_cost_type, i32 %num_regions, float %place_cost_exp, float*** nocapture %old_region_occ_x, float*** nocapture %old_region_occ_y) nounwind ssp {
+entry:
+ br i1 undef, label %bb.i, label %my_malloc.exit
+
+bb.i: ; preds = %entry
+ unreachable
+
+my_malloc.exit: ; preds = %entry
+ br i1 undef, label %bb.i81, label %my_malloc.exit83
+
+bb.i81: ; preds = %my_malloc.exit
+ unreachable
+
+my_malloc.exit83: ; preds = %my_malloc.exit
+ br i1 undef, label %bb.i.i57, label %my_calloc.exit.i
+
+bb.i.i57: ; preds = %my_malloc.exit83
+ unreachable
+
+my_calloc.exit.i: ; preds = %my_malloc.exit83
+ br i1 undef, label %bb.i4.i, label %my_calloc.exit5.i
+
+bb.i4.i: ; preds = %my_calloc.exit.i
+ unreachable
+
+my_calloc.exit5.i: ; preds = %my_calloc.exit.i
+ %.pre.i58 = load %struct.s_net** @net, align 4 ; <%struct.s_net*> [#uses=1]
+ br label %bb17.i78
+
+bb1.i61: ; preds = %bb4.preheader.i, %bb1.i61
+ br i1 undef, label %bb1.i61, label %bb5.i62
+
+bb5.i62: ; preds = %bb1.i61
+ br i1 undef, label %bb6.i64, label %bb15.preheader.i
+
+bb15.preheader.i: ; preds = %bb4.preheader.i, %bb5.i62
+ br label %bb16.i77
+
+bb6.i64: ; preds = %bb5.i62
+ br i1 undef, label %bb7.i65, label %bb8.i67
+
+bb7.i65: ; preds = %bb6.i64
+ unreachable
+
+bb8.i67: ; preds = %bb6.i64
+ br i1 undef, label %bb.i1.i68, label %my_malloc.exit.i70
+
+bb.i1.i68: ; preds = %bb8.i67
+ unreachable
+
+my_malloc.exit.i70: ; preds = %bb8.i67
+ %0 = load %struct.s_net** @net, align 4 ; <%struct.s_net*> [#uses=1]
+ br i1 undef, label %bb9.i71, label %bb16.i77
+
+bb9.i71: ; preds = %bb9.i71, %my_malloc.exit.i70
+ %1 = load %struct.s_net** @net, align 4 ; <%struct.s_net*> [#uses=1]
+ br i1 undef, label %bb9.i71, label %bb16.i77
+
+bb16.i77: ; preds = %bb9.i71, %my_malloc.exit.i70, %bb15.preheader.i
+ %.pre41.i.rle244 = phi %struct.s_net* [ %.pre41.i, %bb15.preheader.i ], [ %0, %my_malloc.exit.i70 ], [ %1, %bb9.i71 ] ; <%struct.s_net*> [#uses=1]
+ br label %bb17.i78
+
+bb17.i78: ; preds = %bb16.i77, %my_calloc.exit5.i
+ %.pre41.i = phi %struct.s_net* [ %.pre41.i.rle244, %bb16.i77 ], [ %.pre.i58, %my_calloc.exit5.i ] ; <%struct.s_net*> [#uses=1]
+ br i1 undef, label %bb4.preheader.i, label %alloc_and_load_unique_pin_list.exit
+
+bb4.preheader.i: ; preds = %bb17.i78
+ br i1 undef, label %bb1.i61, label %bb15.preheader.i
+
+alloc_and_load_unique_pin_list.exit: ; preds = %bb17.i78
+ ret void
+}
+
+define void @read_net(i8* %net_file) nounwind ssp {
+entry:
+ br i1 undef, label %bb3.us.us.i, label %bb6.preheader
+
+bb6.preheader: ; preds = %entry
+ br i1 undef, label %bb7, label %bb
+
+bb3.us.us.i: ; preds = %entry
+ unreachable
+
+bb: ; preds = %bb6.preheader
+ br i1 undef, label %bb.i34, label %bb1.i38
+
+bb.i34: ; preds = %bb
+ unreachable
+
+bb1.i38: ; preds = %bb
+ %mallocsize = mul i64 28, undef ; <i64> [#uses=1]
+ %malloccall = tail call i8* @malloc(i64 %mallocsize) ; <i8*> [#uses=1]
+ %0 = bitcast i8* %malloccall to %struct.s_net* ; <%struct.s_net*> [#uses=1]
+ br i1 undef, label %bb.i1.i39, label %my_malloc.exit2.i
+
+bb.i1.i39: ; preds = %bb1.i38
+ unreachable
+
+my_malloc.exit2.i: ; preds = %bb1.i38
+ store %struct.s_net* %0, %struct.s_net** @net, align 4
+ br i1 undef, label %bb.i7.i40, label %my_malloc.exit8.i
+
+bb.i7.i40: ; preds = %my_malloc.exit2.i
+ unreachable
+
+my_malloc.exit8.i: ; preds = %my_malloc.exit2.i
+ unreachable
+
+bb7: ; preds = %bb6.preheader
+ unreachable
+}
+
+declare noalias i8* @malloc(i64)
diff --git a/test/Transforms/GlobalOpt/2009-11-16-BrokenPerformHeapAllocSRoA.ll b/test/Transforms/GlobalOpt/2009-11-16-BrokenPerformHeapAllocSRoA.ll
new file mode 100644
index 0000000..54e8f90
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-11-16-BrokenPerformHeapAllocSRoA.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+
+%struct.hashheader = type { i16, i16, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i8], [13 x i8], i8, i8, i8, [228 x i16], [228 x i8], [228 x i8], [228 x i8], [228 x i8], [228 x i8], [228 x i8], [128 x i8], [100 x [11 x i8]], [100 x i32], [100 x i32], i16 }
+%struct.strchartype = type { i8*, i8*, i8* }
+
+@hashheader = internal global %struct.hashheader zeroinitializer, align 32 ; <%struct.hashheader*> [#uses=1]
+@chartypes = internal global %struct.strchartype* null ; <%struct.strchartype**> [#uses=1]
+; CHECK-NOT: @hashheader
+; CHECK-NOT: @chartypes
+
+; based on linit in office-ispell
+define void @test() nounwind ssp {
+ %1 = load i32* getelementptr inbounds (%struct.hashheader* @hashheader, i64 0, i32 13), align 8 ; <i32> [#uses=1]
+ %2 = sext i32 %1 to i64 ; <i64> [#uses=1]
+ %3 = mul i64 %2, ptrtoint (%struct.strchartype* getelementptr (%struct.strchartype* null, i64 1) to i64) ; <i64> [#uses=1]
+ %4 = tail call i8* @malloc(i64 %3) ; <i8*> [#uses=1]
+; CHECK: call i8* @malloc(i64
+ %5 = bitcast i8* %4 to %struct.strchartype* ; <%struct.strchartype*> [#uses=1]
+ store %struct.strchartype* %5, %struct.strchartype** @chartypes, align 8
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
diff --git a/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll b/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll
new file mode 100644
index 0000000..c43565a
--- /dev/null
+++ b/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll
@@ -0,0 +1,30 @@
+; Test ensures that non-optimizable array mallocs are not optimized; specifically
+; GlobalOpt was treating a non-optimizable array malloc as a non-array malloc
+; and optimizing the global object that the malloc was stored to as a single
+; element global. The global object @TOP in this test should not be optimized.
+; RUN: opt < %s -globalopt -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+
+@TOP = internal global i64* null ; <i64**> [#uses=2]
+; CHECK: @TOP = internal global i64* null
+@channelColumns = internal global i64 0 ; <i64*> [#uses=2]
+
+; Derived from @DescribeChannel() in yacr2
+define void @test() nounwind ssp {
+ store i64 2335, i64* @channelColumns, align 8
+ %1 = load i64* @channelColumns, align 8 ; <i64> [#uses=1]
+ %2 = shl i64 %1, 3 ; <i64> [#uses=1]
+ %3 = add i64 %2, 8 ; <i64> [#uses=1]
+ %4 = call noalias i8* @malloc(i64 %3) nounwind ; <i8*> [#uses=1]
+; CHECK: call noalias i8* @malloc
+ %5 = bitcast i8* %4 to i64* ; <i64*> [#uses=1]
+ store i64* %5, i64** @TOP, align 8
+ %6 = load i64** @TOP, align 8 ; <i64*> [#uses=1]
+ %7 = getelementptr inbounds i64* %6, i64 13 ; <i64*> [#uses=1]
+ store i64 0, i64* %7, align 8
+ ret void
+}
+
+declare noalias i8* @malloc(i64) nounwind
diff --git a/test/Transforms/GlobalOpt/alias-resolve.ll b/test/Transforms/GlobalOpt/alias-resolve.ll
new file mode 100644
index 0000000..8451179
--- /dev/null
+++ b/test/Transforms/GlobalOpt/alias-resolve.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -globalopt -S > %t
+; RUN: cat %t | grep foo1 | count 1
+; RUN: cat %t | grep foo2 | count 4
+; RUN: cat %t | grep bar1 | count 1
+; RUN: cat %t | grep bar2 | count 4
+
+@foo1 = alias void ()* @foo2
+@foo2 = alias weak void()* @bar1
+@bar1 = alias void ()* @bar2
+
+declare void @bar2()
+
+define void @baz() {
+entry:
+ call void @foo1()
+ call void @foo2()
+ call void @bar1()
+ ret void
+}
diff --git a/test/Transforms/GlobalOpt/basictest.ll b/test/Transforms/GlobalOpt/basictest.ll
new file mode 100644
index 0000000..4332d3d
--- /dev/null
+++ b/test/Transforms/GlobalOpt/basictest.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -globalopt -S | not grep global
+
+@X = internal global i32 4 ; <i32*> [#uses=1]
+
+define i32 @foo() {
+ %V = load i32* @X ; <i32> [#uses=1]
+ ret i32 %V
+}
+
diff --git a/test/Transforms/GlobalOpt/constantexpr-dangle.ll b/test/Transforms/GlobalOpt/constantexpr-dangle.ll
new file mode 100644
index 0000000..099c607
--- /dev/null
+++ b/test/Transforms/GlobalOpt/constantexpr-dangle.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -instcombine -globalopt -S | \
+; RUN: grep {internal fastcc float @foo}
+
+define internal float @foo() {
+ ret float 0.000000e+00
+}
+
+define float @bar() {
+ %tmp1 = call float (...)* bitcast (float ()* @foo to float (...)*)( )
+ %tmp2 = fmul float %tmp1, 1.000000e+01 ; <float> [#uses=1]
+ ret float %tmp2
+}
+
diff --git a/test/Transforms/GlobalOpt/constantfold-initializers.ll b/test/Transforms/GlobalOpt/constantfold-initializers.ll
new file mode 100644
index 0000000..834bd00
--- /dev/null
+++ b/test/Transforms/GlobalOpt/constantfold-initializers.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -S -globalopt | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
[email protected] = global [3 x i8] zeroinitializer
+
+; CHECK: @A = global i1 false
+@A = global i1 icmp ne (i64 sub nsw (i64 ptrtoint (i8* getelementptr inbounds ([3 x i8]* @.str91250, i64 0, i64 1) to i64), i64 ptrtoint ([3 x i8]* @.str91250 to i64)), i64 1)
diff --git a/test/Transforms/GlobalOpt/crash.ll b/test/Transforms/GlobalOpt/crash.ll
new file mode 100644
index 0000000..a45cbe9
--- /dev/null
+++ b/test/Transforms/GlobalOpt/crash.ll
@@ -0,0 +1,16 @@
+; RUN: opt -globalopt -disable-output %s
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+target triple = "i386-apple-darwin9.8"
+
+%0 = type { i32, void ()* }
+%struct.btSimdScalar = type { %"union.btSimdScalar::$_14" }
+%"union.btSimdScalar::$_14" = type { <4 x float> }
+
+@_ZL6vTwist = global %struct.btSimdScalar zeroinitializer ; <%struct.btSimdScalar*> [#uses=1]
[email protected]_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I__ZN21btConeTwistConstraintC2Ev }] ; <[12 x %0]*> [#uses=0]
+
+define internal void @_GLOBAL__I__ZN21btConeTwistConstraintC2Ev() nounwind section "__TEXT,__StaticInit,regular,pure_instructions" {
+entry:
+ store float 1.0, float* getelementptr inbounds (%struct.btSimdScalar* @_ZL6vTwist, i32 0, i32 0, i32 0, i32 3), align 4
+ ret void
+}
diff --git a/test/Transforms/GlobalOpt/ctor-list-opt-dbg.ll b/test/Transforms/GlobalOpt/ctor-list-opt-dbg.ll
new file mode 100644
index 0000000..f794e9f
--- /dev/null
+++ b/test/Transforms/GlobalOpt/ctor-list-opt-dbg.ll
@@ -0,0 +1,98 @@
+; RUN: opt < %s -globalopt -S | not grep CTOR
[email protected]_ctors = appending global [10 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR2 }, { i32, void ()* } { i32 65535, void ()* @CTOR3 }, { i32, void ()* } { i32 65535, void ()* @CTOR4 }, { i32, void ()* } { i32 65535, void ()* @CTOR5 }, { i32, void ()* } { i32 65535, void ()* @CTOR6 }, { i32, void ()* } { i32 65535, void ()* @CTOR7 }, { i32, void ()* } { i32 65535, void ()* @CTOR8 }, { i32, void ()* } { i32 2147483647, void ()* null } ] ; <[10 x { i32, void ()* }]*> [#uses=0]
+@G = global i32 0 ; <i32*> [#uses=1]
+@G2 = global i32 0 ; <i32*> [#uses=1]
+@G3 = global i32 -123 ; <i32*> [#uses=2]
+@X = global { i32, [2 x i32] } { i32 0, [2 x i32] [ i32 17, i32 21 ] } ; <{ i32, [2 x i32] }*> [#uses=2]
+@Y = global i32 -1 ; <i32*> [#uses=2]
+@Z = global i32 123 ; <i32*> [#uses=1]
+@D = global double 0.000000e+00 ; <double*> [#uses=1]
+@CTORGV = internal global i1 false ; <i1*> [#uses=2]
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
+
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+define internal void @CTOR1() {
+ ret void
+}
+
+define internal void @CTOR2() {
+ %A = add i32 1, 23 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ store i32 %A, i32* @G
+ store i1 true, i1* @CTORGV
+ ret void
+}
+
+define internal void @CTOR3() {
+ %X = or i1 true, false ; <i1> [#uses=1]
+ br label %Cont
+
+Cont: ; preds = %0
+ br i1 %X, label %S, label %T
+
+S: ; preds = %Cont
+ store i32 24, i32* @G2
+ ret void
+
+T: ; preds = %Cont
+ ret void
+}
+
+define internal void @CTOR4() {
+ %X = load i32* @G3 ; <i32> [#uses=1]
+ %Y = add i32 %X, 123 ; <i32> [#uses=1]
+ store i32 %Y, i32* @G3
+ ret void
+}
+
+define internal void @CTOR5() {
+ %X.2p = getelementptr inbounds { i32, [2 x i32] }* @X, i32 0, i32 1, i32 0 ; <i32*> [#uses=2]
+ %X.2 = load i32* %X.2p ; <i32> [#uses=1]
+ %X.1p = getelementptr inbounds { i32, [2 x i32] }* @X, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %X.2, i32* %X.1p
+ store i32 42, i32* %X.2p
+ ret void
+}
+
+define internal void @CTOR6() {
+ %A = alloca i32 ; <i32*> [#uses=2]
+ %y = load i32* @Y ; <i32> [#uses=1]
+ store i32 %y, i32* %A
+ %Av = load i32* %A ; <i32> [#uses=1]
+ %Av1 = add i32 %Av, 1 ; <i32> [#uses=1]
+ store i32 %Av1, i32* @Y
+ ret void
+}
+
+define internal void @CTOR7() {
+ call void @setto( i32* @Z, i32 0 )
+ ret void
+}
+
+define void @setto(i32* %P, i32 %V) {
+ store i32 %V, i32* %P
+ ret void
+}
+
+declare double @cos(double)
+
+define internal void @CTOR8() {
+ %X = call double @cos( double 1.000000e+00 ) ; <double> [#uses=1]
+ store double %X, double* @D
+ ret void
+}
+
+define i1 @accessor() {
+ %V = load i1* @CTORGV ; <i1> [#uses=1]
+ ret i1 %V
+}
diff --git a/test/Transforms/GlobalOpt/ctor-list-opt-inbounds.ll b/test/Transforms/GlobalOpt/ctor-list-opt-inbounds.ll
new file mode 100644
index 0000000..9b11985
--- /dev/null
+++ b/test/Transforms/GlobalOpt/ctor-list-opt-inbounds.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+
+; Don't get fooled by the inbounds keyword; it doesn't change
+; the computed address.
+
+; CHECK: @H = global i32 2
+; CHECK: @I = global i32 2
+
[email protected]_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR } ]
+@addr = external global i32
+@G = internal global [6 x [5 x i32]] zeroinitializer
+@H = global i32 80
+@I = global i32 90
+
+define internal void @CTOR() {
+ store i32 1, i32* getelementptr ([6 x [5 x i32]]* @G, i64 0, i64 0, i64 0)
+ store i32 2, i32* getelementptr inbounds ([6 x [5 x i32]]* @G, i64 0, i64 0, i64 0)
+ %t = load i32* getelementptr ([6 x [5 x i32]]* @G, i64 0, i64 0, i64 0)
+ store i32 %t, i32* @H
+ %s = load i32* getelementptr inbounds ([6 x [5 x i32]]* @G, i64 0, i64 0, i64 0)
+ store i32 %s, i32* @I
+ ret void
+}
diff --git a/test/Transforms/GlobalOpt/ctor-list-opt.ll b/test/Transforms/GlobalOpt/ctor-list-opt.ll
new file mode 100644
index 0000000..887e7ee
--- /dev/null
+++ b/test/Transforms/GlobalOpt/ctor-list-opt.ll
@@ -0,0 +1,85 @@
+; RUN: opt < %s -globalopt -S | not grep CTOR
[email protected]_ctors = appending global [10 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR2 }, { i32, void ()* } { i32 65535, void ()* @CTOR3 }, { i32, void ()* } { i32 65535, void ()* @CTOR4 }, { i32, void ()* } { i32 65535, void ()* @CTOR5 }, { i32, void ()* } { i32 65535, void ()* @CTOR6 }, { i32, void ()* } { i32 65535, void ()* @CTOR7 }, { i32, void ()* } { i32 65535, void ()* @CTOR8 }, { i32, void ()* } { i32 2147483647, void ()* null } ] ; <[10 x { i32, void ()* }]*> [#uses=0]
+@G = global i32 0 ; <i32*> [#uses=1]
+@G2 = global i32 0 ; <i32*> [#uses=1]
+@G3 = global i32 -123 ; <i32*> [#uses=2]
+@X = global { i32, [2 x i32] } { i32 0, [2 x i32] [ i32 17, i32 21 ] } ; <{ i32, [2 x i32] }*> [#uses=2]
+@Y = global i32 -1 ; <i32*> [#uses=2]
+@Z = global i32 123 ; <i32*> [#uses=1]
+@D = global double 0.000000e+00 ; <double*> [#uses=1]
+@CTORGV = internal global i1 false ; <i1*> [#uses=2]
+
+define internal void @CTOR1() {
+ ret void
+}
+
+define internal void @CTOR2() {
+ %A = add i32 1, 23 ; <i32> [#uses=1]
+ store i32 %A, i32* @G
+ store i1 true, i1* @CTORGV
+ ret void
+}
+
+define internal void @CTOR3() {
+ %X = or i1 true, false ; <i1> [#uses=1]
+ br label %Cont
+
+Cont: ; preds = %0
+ br i1 %X, label %S, label %T
+
+S: ; preds = %Cont
+ store i32 24, i32* @G2
+ ret void
+
+T: ; preds = %Cont
+ ret void
+}
+
+define internal void @CTOR4() {
+ %X = load i32* @G3 ; <i32> [#uses=1]
+ %Y = add i32 %X, 123 ; <i32> [#uses=1]
+ store i32 %Y, i32* @G3
+ ret void
+}
+
+define internal void @CTOR5() {
+ %X.2p = getelementptr inbounds { i32, [2 x i32] }* @X, i32 0, i32 1, i32 0 ; <i32*> [#uses=2]
+ %X.2 = load i32* %X.2p ; <i32> [#uses=1]
+ %X.1p = getelementptr inbounds { i32, [2 x i32] }* @X, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %X.2, i32* %X.1p
+ store i32 42, i32* %X.2p
+ ret void
+}
+
+define internal void @CTOR6() {
+ %A = alloca i32 ; <i32*> [#uses=2]
+ %y = load i32* @Y ; <i32> [#uses=1]
+ store i32 %y, i32* %A
+ %Av = load i32* %A ; <i32> [#uses=1]
+ %Av1 = add i32 %Av, 1 ; <i32> [#uses=1]
+ store i32 %Av1, i32* @Y
+ ret void
+}
+
+define internal void @CTOR7() {
+ call void @setto( i32* @Z, i32 0 )
+ ret void
+}
+
+define void @setto(i32* %P, i32 %V) {
+ store i32 %V, i32* %P
+ ret void
+}
+
+declare double @cos(double)
+
+define internal void @CTOR8() {
+ %X = call double @cos( double 1.000000e+00 ) ; <double> [#uses=1]
+ store double %X, double* @D
+ ret void
+}
+
+define i1 @accessor() {
+ %V = load i1* @CTORGV ; <i1> [#uses=1]
+ ret i1 %V
+}
diff --git a/test/Transforms/GlobalOpt/deadglobal-2.ll b/test/Transforms/GlobalOpt/deadglobal-2.ll
new file mode 100644
index 0000000..4f81819
--- /dev/null
+++ b/test/Transforms/GlobalOpt/deadglobal-2.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -globalopt -S | not grep internal
+
+; This is a harder case to delete as the GEP has a variable index.
+
+@G = internal global [4 x i32] zeroinitializer
+
+define void @foo(i32 %X) {
+ %Ptr = getelementptr [4 x i32]* @G, i32 0, i32 %X
+ store i32 1, i32* %Ptr
+ ret void
+}
diff --git a/test/Transforms/GlobalOpt/deadglobal.ll b/test/Transforms/GlobalOpt/deadglobal.ll
new file mode 100644
index 0000000..c8d8e76
--- /dev/null
+++ b/test/Transforms/GlobalOpt/deadglobal.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -globalopt -S | not grep internal
+
+@G = internal global i32 123 ; <i32*> [#uses=1]
+
+define void @foo() {
+ store i32 1, i32* @G
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/dg.exp b/test/Transforms/GlobalOpt/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/GlobalOpt/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/GlobalOpt/globalsra-partial.ll b/test/Transforms/GlobalOpt/globalsra-partial.ll
new file mode 100644
index 0000000..06485b5
--- /dev/null
+++ b/test/Transforms/GlobalOpt/globalsra-partial.ll
@@ -0,0 +1,24 @@
+; In this case, the global can only be broken up by one level.
+
+; RUN: opt < %s -globalopt -S | not grep 12345
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@G = internal global { i32, [4 x float] } zeroinitializer ; <{ i32, [4 x float] }*> [#uses=3]
+
+define void @onlystore() {
+ store i32 12345, i32* getelementptr ({ i32, [4 x float] }* @G, i32 0, i32 0)
+ ret void
+}
+
+define void @storeinit(i32 %i) {
+ %Ptr = getelementptr { i32, [4 x float] }* @G, i32 0, i32 1, i32 %i ; <float*> [#uses=1]
+ store float 1.000000e+00, float* %Ptr
+ ret void
+}
+
+define float @readval(i32 %i) {
+ %Ptr = getelementptr { i32, [4 x float] }* @G, i32 0, i32 1, i32 %i ; <float*> [#uses=1]
+ %V = load float* %Ptr ; <float> [#uses=1]
+ ret float %V
+}
+
diff --git a/test/Transforms/GlobalOpt/globalsra-unknown-index.ll b/test/Transforms/GlobalOpt/globalsra-unknown-index.ll
new file mode 100644
index 0000000..9397a12
--- /dev/null
+++ b/test/Transforms/GlobalOpt/globalsra-unknown-index.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -globalopt -S > %t
+; RUN: grep {@Y = internal global \\\[3 x \[%\]struct.X\\\] zeroinitializer} %t
+; RUN: grep load %t | count 6
+; RUN: grep {add i32 \[%\]a, \[%\]b} %t | count 3
+
+; globalopt should not sra the global, because it can't see the index.
+
+%struct.X = type { [3 x i32], [3 x i32] }
+
+@Y = internal global [3 x %struct.X] zeroinitializer
+
+@addr = external global i8
+
+define void @frob() {
+ store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 ptrtoint (i8* @addr to i64)), align 4
+ ret void
+}
+define i32 @borf(i64 %i, i64 %j) {
+ %p = getelementptr inbounds [3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 0
+ %a = load i32* %p
+ %q = getelementptr inbounds [3 x %struct.X]* @Y, i64 0, i64 0, i32 1, i64 0
+ %b = load i32* %q
+ %c = add i32 %a, %b
+ ret i32 %c
+}
+define i32 @borg(i64 %i, i64 %j) {
+ %p = getelementptr inbounds [3 x %struct.X]* @Y, i64 0, i64 1, i32 0, i64 1
+ %a = load i32* %p
+ %q = getelementptr inbounds [3 x %struct.X]* @Y, i64 0, i64 1, i32 1, i64 1
+ %b = load i32* %q
+ %c = add i32 %a, %b
+ ret i32 %c
+}
+define i32 @borh(i64 %i, i64 %j) {
+ %p = getelementptr inbounds [3 x %struct.X]* @Y, i64 0, i64 2, i32 0, i64 2
+ %a = load i32* %p
+ %q = getelementptr inbounds [3 x %struct.X]* @Y, i64 0, i64 2, i32 1, i64 2
+ %b = load i32* %q
+ %c = add i32 %a, %b
+ ret i32 %c
+}
diff --git a/test/Transforms/GlobalOpt/globalsra.ll b/test/Transforms/GlobalOpt/globalsra.ll
new file mode 100644
index 0000000..6d8f220
--- /dev/null
+++ b/test/Transforms/GlobalOpt/globalsra.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -globalopt -S | not grep global
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@G = internal global { i32, float, { double } } {
+ i32 1,
+ float 1.000000e+00,
+ { double } { double 1.727000e+01 } } ; <{ i32, float, { double } }*> [#uses=3]
+
+define void @onlystore() {
+ store i32 123, i32* getelementptr ({ i32, float, { double } }* @G, i32 0, i32 0)
+ ret void
+}
+
+define float @storeinit() {
+ store float 1.000000e+00, float* getelementptr ({ i32, float, { double } }* @G, i32 0, i32 1)
+ %X = load float* getelementptr ({ i32, float, { double } }* @G, i32 0, i32 1) ; <float> [#uses=1]
+ ret float %X
+}
+
+define double @constantize() {
+ %X = load double* getelementptr ({ i32, float, { double } }* @G, i32 0, i32 2, i32 0) ; <double> [#uses=1]
+ ret double %X
+}
+
diff --git a/test/Transforms/GlobalOpt/heap-sra-1.ll b/test/Transforms/GlobalOpt/heap-sra-1.ll
new file mode 100644
index 0000000..9d5148f
--- /dev/null
+++ b/test/Transforms/GlobalOpt/heap-sra-1.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+ %struct.foo = type { i32, i32 }
+@X = internal global %struct.foo* null
+; CHECK: @X.f0
+; CHECK: @X.f1
+
+define void @bar(i64 %Size) nounwind noinline {
+entry:
+ %mallocsize = mul i64 %Size, 8 ; <i64> [#uses=1]
+ %malloccall = tail call i8* @malloc(i64 %mallocsize) ; <i8*> [#uses=1]
+ %.sub = bitcast i8* %malloccall to %struct.foo* ; <%struct.foo*> [#uses=1]
+ store %struct.foo* %.sub, %struct.foo** @X, align 4
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
+
+define i32 @baz() nounwind readonly noinline {
+bb1.thread:
+ %0 = load %struct.foo** @X, align 4
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ]
+ %sum.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %3, %bb1 ]
+ %1 = getelementptr %struct.foo* %0, i32 %i.0.reg2mem.0, i32 0
+ %2 = load i32* %1, align 4
+ %3 = add i32 %2, %sum.0.reg2mem.0
+ %indvar.next = add i32 %i.0.reg2mem.0, 1
+ %exitcond = icmp eq i32 %indvar.next, 1200
+ br i1 %exitcond, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ ret i32 %3
+}
+
diff --git a/test/Transforms/GlobalOpt/heap-sra-2.ll b/test/Transforms/GlobalOpt/heap-sra-2.ll
new file mode 100644
index 0000000..fa8c3628
--- /dev/null
+++ b/test/Transforms/GlobalOpt/heap-sra-2.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+ %struct.foo = type { i32, i32 }
+@X = internal global %struct.foo* null ; <%struct.foo**> [#uses=2]
+; CHECK: @X.f0
+; CHECK: @X.f1
+
+define void @bar(i32 %Size) nounwind noinline {
+entry:
+ %malloccall = tail call i8* @malloc(i64 8000000) ; <i8*> [#uses=1]
+ %0 = bitcast i8* %malloccall to [1000000 x %struct.foo]* ; <[1000000 x %struct.foo]*> [#uses=1]
+ %.sub = getelementptr [1000000 x %struct.foo]* %0, i32 0, i32 0 ; <%struct.foo*> [#uses=1]
+ store %struct.foo* %.sub, %struct.foo** @X, align 4
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
+
+define i32 @baz() nounwind readonly noinline {
+bb1.thread:
+ %0 = load %struct.foo** @X, align 4 ; <%struct.foo*> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ] ; <i32> [#uses=2]
+ %sum.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %3, %bb1 ] ; <i32> [#uses=1]
+ %1 = getelementptr %struct.foo* %0, i32 %i.0.reg2mem.0, i32 0 ; <i32*> [#uses=1]
+ %2 = load i32* %1, align 4 ; <i32> [#uses=1]
+ %3 = add i32 %2, %sum.0.reg2mem.0 ; <i32> [#uses=2]
+ %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 1200 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ ret i32 %3
+}
+
diff --git a/test/Transforms/GlobalOpt/heap-sra-3.ll b/test/Transforms/GlobalOpt/heap-sra-3.ll
new file mode 100644
index 0000000..e7a877c
--- /dev/null
+++ b/test/Transforms/GlobalOpt/heap-sra-3.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+ %struct.foo = type { i32, i32 }
+@X = internal global %struct.foo* null
+; CHECK: @X.f0
+; CHECK: @X.f1
+
+define void @bar(i64 %Size) nounwind noinline {
+entry:
+ %mallocsize = mul i64 8, %Size ; <i64> [#uses=1]
+; CHECK: mul i64 %Size, 4
+ %malloccall = tail call i8* @malloc(i64 %mallocsize) ; <i8*> [#uses=1]
+ %.sub = bitcast i8* %malloccall to %struct.foo* ; <%struct.foo*> [#uses=1]
+ store %struct.foo* %.sub, %struct.foo** @X, align 4
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
+
+define i32 @baz() nounwind readonly noinline {
+bb1.thread:
+ %0 = load %struct.foo** @X, align 4
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ]
+ %sum.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %3, %bb1 ]
+ %1 = getelementptr %struct.foo* %0, i32 %i.0.reg2mem.0, i32 0
+ %2 = load i32* %1, align 4
+ %3 = add i32 %2, %sum.0.reg2mem.0
+ %indvar.next = add i32 %i.0.reg2mem.0, 1
+ %exitcond = icmp eq i32 %indvar.next, 1200
+ br i1 %exitcond, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ ret i32 %3
+}
+
diff --git a/test/Transforms/GlobalOpt/heap-sra-4.ll b/test/Transforms/GlobalOpt/heap-sra-4.ll
new file mode 100644
index 0000000..d5a5828
--- /dev/null
+++ b/test/Transforms/GlobalOpt/heap-sra-4.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+ %struct.foo = type { i32, i32 }
+@X = internal global %struct.foo* null
+; CHECK: @X.f0
+; CHECK: @X.f1
+
+define void @bar(i64 %Size) nounwind noinline {
+entry:
+ %mallocsize = shl i64 %Size, 3 ; <i64> [#uses=1]
+ %malloccall = tail call i8* @malloc(i64 %mallocsize) ; <i8*> [#uses=1]
+; CHECK: mul i64 %Size, 4
+ %.sub = bitcast i8* %malloccall to %struct.foo* ; <%struct.foo*> [#uses=1]
+ store %struct.foo* %.sub, %struct.foo** @X, align 4
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
+
+define i32 @baz() nounwind readonly noinline {
+bb1.thread:
+ %0 = load %struct.foo** @X, align 4
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ]
+ %sum.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %3, %bb1 ]
+ %1 = getelementptr %struct.foo* %0, i32 %i.0.reg2mem.0, i32 0
+ %2 = load i32* %1, align 4
+ %3 = add i32 %2, %sum.0.reg2mem.0
+ %indvar.next = add i32 %i.0.reg2mem.0, 1
+ %exitcond = icmp eq i32 %indvar.next, 1200
+ br i1 %exitcond, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ ret i32 %3
+}
+
diff --git a/test/Transforms/GlobalOpt/heap-sra-phi.ll b/test/Transforms/GlobalOpt/heap-sra-phi.ll
new file mode 100644
index 0000000..6188e5a
--- /dev/null
+++ b/test/Transforms/GlobalOpt/heap-sra-phi.ll
@@ -0,0 +1,43 @@
+; RUN: opt < %s -globalopt -S | grep {tmp.f1 = phi i32. }
+; RUN: opt < %s -globalopt -S | grep {tmp.f0 = phi i32. }
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+ %struct.foo = type { i32, i32 }
+@X = internal global %struct.foo* null ; <%struct.foo**> [#uses=2]
+
+define void @bar(i32 %Size) nounwind noinline {
+entry:
+ %malloccall = tail call i8* @malloc(i64 8000000) ; <i8*> [#uses=1]
+ %tmp = bitcast i8* %malloccall to [1000000 x %struct.foo]* ; <[1000000 x %struct.foo]*> [#uses=1]
+ %.sub = getelementptr [1000000 x %struct.foo]* %tmp, i32 0, i32 0 ; <%struct.foo*> [#uses=1]
+ store %struct.foo* %.sub, %struct.foo** @X, align 4
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
+
+define i32 @baz() nounwind readonly noinline {
+bb1.thread:
+ %tmpLD1 = load %struct.foo** @X, align 4 ; <%struct.foo*> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %tmp = phi %struct.foo* [%tmpLD1, %bb1.thread ], [ %tmpLD2, %bb1 ] ; <i32> [#uses=2]
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ] ; <i32> [#uses=2]
+ %sum.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %tmp3, %bb1 ] ; <i32> [#uses=1]
+ %tmp1 = getelementptr %struct.foo* %tmp, i32 %i.0.reg2mem.0, i32 0 ; <i32*> [#uses=1]
+ %tmp2 = load i32* %tmp1, align 4 ; <i32> [#uses=1]
+ %tmp6 = add i32 %tmp2, %sum.0.reg2mem.0 ; <i32> [#uses=2]
+ %tmp4 = getelementptr %struct.foo* %tmp, i32 %i.0.reg2mem.0, i32 1 ; <i32*> [#uses=1]
+ %tmp5 = load i32 * %tmp4
+ %tmp3 = add i32 %tmp5, %tmp6
+ %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+
+ %tmpLD2 = load %struct.foo** @X, align 4 ; <%struct.foo*> [#uses=1]
+
+ %exitcond = icmp eq i32 %indvar.next, 1200 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb2, label %bb1
+
+bb2: ; preds = %bb1
+ ret i32 %tmp3
+}
diff --git a/test/Transforms/GlobalOpt/integer-bool.ll b/test/Transforms/GlobalOpt/integer-bool.ll
new file mode 100644
index 0000000..59403b1
--- /dev/null
+++ b/test/Transforms/GlobalOpt/integer-bool.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -globalopt -instcombine | \
+; RUN: llvm-dis | grep {ret i1 true}
+
+;; check that global opt turns integers that only hold 0 or 1 into bools.
+
+@G = internal global i32 0 ; <i32*> [#uses=3]
+
+define void @set1() {
+ store i32 0, i32* @G
+ ret void
+}
+
+define void @set2() {
+ store i32 1, i32* @G
+ ret void
+}
+
+define i1 @get() {
+ %A = load i32* @G ; <i32> [#uses=1]
+ %C = icmp slt i32 %A, 2 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
diff --git a/test/Transforms/GlobalOpt/iterate.ll b/test/Transforms/GlobalOpt/iterate.ll
new file mode 100644
index 0000000..7466874
--- /dev/null
+++ b/test/Transforms/GlobalOpt/iterate.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -globalopt -S | not grep %G
+
+@G = internal global i32 0 ; <i32*> [#uses=1]
+@H = internal global { i32* } { i32* @G } ; <{ i32* }*> [#uses=1]
+
+define i32 @loadg() {
+ %G = load i32** getelementptr ({ i32* }* @H, i32 0, i32 0) ; <i32*> [#uses=1]
+ %GV = load i32* %G ; <i32> [#uses=1]
+ ret i32 %GV
+}
+
diff --git a/test/Transforms/GlobalOpt/load-store-global.ll b/test/Transforms/GlobalOpt/load-store-global.ll
new file mode 100644
index 0000000..f824b2c1
--- /dev/null
+++ b/test/Transforms/GlobalOpt/load-store-global.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -globalopt -S | not grep G
+
+@G = internal global i32 17 ; <i32*> [#uses=3]
+
+define void @foo() {
+ %V = load i32* @G ; <i32> [#uses=1]
+ store i32 %V, i32* @G
+ ret void
+}
+
+define i32 @bar() {
+ %X = load i32* @G ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/GlobalOpt/malloc-promote-1.ll b/test/Transforms/GlobalOpt/malloc-promote-1.ll
new file mode 100644
index 0000000..51ccbbd
--- /dev/null
+++ b/test/Transforms/GlobalOpt/malloc-promote-1.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@G = internal global i32* null ; <i32**> [#uses=3]
+; CHECK-NOT: global
+
+define void @init() {
+ %malloccall = tail call i8* @malloc(i64 4) ; <i8*> [#uses=1]
+ %P = bitcast i8* %malloccall to i32* ; <i32*> [#uses=1]
+ store i32* %P, i32** @G
+ %GV = load i32** @G ; <i32*> [#uses=1]
+ store i32 0, i32* %GV
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
+
+define i32 @get() {
+ %GV = load i32** @G ; <i32*> [#uses=1]
+ %V = load i32* %GV ; <i32> [#uses=1]
+ ret i32 %V
+; CHECK: ret i32 0
+}
+
diff --git a/test/Transforms/GlobalOpt/malloc-promote-2.ll b/test/Transforms/GlobalOpt/malloc-promote-2.ll
new file mode 100644
index 0000000..f989b79
--- /dev/null
+++ b/test/Transforms/GlobalOpt/malloc-promote-2.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -globalopt -globaldce -S | not grep malloc
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@G = internal global i32* null ; <i32**> [#uses=3]
+
+define void @init() {
+ %malloccall = tail call i8* @malloc(i64 mul (i64 100, i64 4)) ; <i8*> [#uses=1]
+ %P = bitcast i8* %malloccall to i32* ; <i32*> [#uses=1]
+ store i32* %P, i32** @G
+ %GV = load i32** @G ; <i32*> [#uses=1]
+ %GVe = getelementptr i32* %GV, i32 40 ; <i32*> [#uses=1]
+ store i32 20, i32* %GVe
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
+
+define i32 @get() {
+ %GV = load i32** @G ; <i32*> [#uses=1]
+ %GVe = getelementptr i32* %GV, i32 40 ; <i32*> [#uses=1]
+ %V = load i32* %GVe ; <i32> [#uses=1]
+ ret i32 %V
+}
+
diff --git a/test/Transforms/GlobalOpt/malloc-promote-3.ll b/test/Transforms/GlobalOpt/malloc-promote-3.ll
new file mode 100644
index 0000000..57f937d
--- /dev/null
+++ b/test/Transforms/GlobalOpt/malloc-promote-3.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -globalopt -globaldce -S | not grep malloc
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@G = internal global i32* null ; <i32**> [#uses=4]
+
+define void @init() {
+ %malloccall = tail call i8* @malloc(i64 mul (i64 100, i64 4)) ; <i8*> [#uses=1]
+ %P = bitcast i8* %malloccall to i32* ; <i32*> [#uses=1]
+ store i32* %P, i32** @G
+ %GV = load i32** @G ; <i32*> [#uses=1]
+ %GVe = getelementptr i32* %GV, i32 40 ; <i32*> [#uses=1]
+ store i32 20, i32* %GVe
+ ret void
+}
+
+declare noalias i8* @malloc(i64)
+
+define i32 @get() {
+ %GV = load i32** @G ; <i32*> [#uses=1]
+ %GVe = getelementptr i32* %GV, i32 40 ; <i32*> [#uses=1]
+ %V = load i32* %GVe ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define i1 @check() {
+ %GV = load i32** @G ; <i32*> [#uses=1]
+ %V = icmp eq i32* %GV, null ; <i1> [#uses=1]
+ ret i1 %V
+}
+
diff --git a/test/Transforms/GlobalOpt/memcpy.ll b/test/Transforms/GlobalOpt/memcpy.ll
new file mode 100644
index 0000000..335f5ec
--- /dev/null
+++ b/test/Transforms/GlobalOpt/memcpy.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -globalopt -S | \
+; RUN: grep {G1 = internal constant}
+
+@G1 = internal global [58 x i8] c"asdlfkajsdlfkajsd;lfkajds;lfkjasd;flkajsd;lkfja;sdlkfjasd\00" ; <[58 x i8]*> [#uses=1]
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+define void @foo() {
+ %Blah = alloca [58 x i8] ; <[58 x i8]*> [#uses=1]
+ %tmp.0 = getelementptr [58 x i8]* %Blah, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp.0, i8* getelementptr ([58 x i8]* @G1, i32 0, i32 0), i32 58, i32 1 )
+ ret void
+}
+
+
diff --git a/test/Transforms/GlobalOpt/memset.ll b/test/Transforms/GlobalOpt/memset.ll
new file mode 100644
index 0000000..a9b9d5e
--- /dev/null
+++ b/test/Transforms/GlobalOpt/memset.ll
@@ -0,0 +1,21 @@
+; both globals are write only, delete them.
+
+; RUN: opt < %s -globalopt -S | \
+; RUN: not grep internal
+
+@G0 = internal global [58 x i8] c"asdlfkajsdlfkajsd;lfkajds;lfkjasd;flkajsd;lkfja;sdlkfjasd\00" ; <[58 x i8]*> [#uses=1]
+@G1 = internal global [4 x i32] [ i32 1, i32 2, i32 3, i32 4 ] ; <[4 x i32]*> [#uses=1]
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
+define void @foo() {
+ %Blah = alloca [58 x i8] ; <[58 x i8]*> [#uses=1]
+ %tmp3 = bitcast [58 x i8]* %Blah to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* bitcast ([4 x i32]* @G1 to i8*), i8* %tmp3, i32 16, i32 1 )
+ call void @llvm.memset.i32( i8* getelementptr ([58 x i8]* @G0, i32 0, i32 0), i8 17, i32 58, i32 1 )
+ ret void
+}
+
+
diff --git a/test/Transforms/GlobalOpt/phi-select.ll b/test/Transforms/GlobalOpt/phi-select.ll
new file mode 100644
index 0000000..cd8a7dc
--- /dev/null
+++ b/test/Transforms/GlobalOpt/phi-select.ll
@@ -0,0 +1,31 @@
+; Test that PHI nodes and select instructions do not necessarily make stuff
+; non-constant.
+
+; RUN: opt < %s -globalopt -S | not grep global
+
+@X = internal global i32 4 ; <i32*> [#uses=2]
+@Y = internal global i32 5 ; <i32*> [#uses=2]
+
+define i32 @test1(i1 %C) {
+ %P = select i1 %C, i32* @X, i32* @Y ; <i32*> [#uses=1]
+ %V = load i32* %P ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define i32 @test2(i1 %C) {
+; <label>:0
+ br i1 %C, label %T, label %Cont
+
+T: ; preds = %0
+ br label %Cont
+
+Cont: ; preds = %T, %0
+ %P = phi i32* [ @X, %0 ], [ @Y, %T ] ; <i32*> [#uses=1]
+ %V = load i32* %P ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+
+
+
+
diff --git a/test/Transforms/GlobalOpt/storepointer-compare.ll b/test/Transforms/GlobalOpt/storepointer-compare.ll
new file mode 100644
index 0000000..2f5ae86
--- /dev/null
+++ b/test/Transforms/GlobalOpt/storepointer-compare.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -globalopt -S | \
+; RUN: grep {call void @Actual}
+
+; Check that a comparison does not prevent an indirect call from being made
+; direct. The global will still remain, but indirect call elim is still good.
+
+@G = internal global void ()* null ; <void ()**> [#uses=2]
+
+define internal void @Actual() {
+ ret void
+}
+
+define void @init() {
+ store void ()* @Actual, void ()** @G
+ ret void
+}
+
+define void @doit() {
+ %FP = load void ()** @G ; <void ()*> [#uses=2]
+ %CC = icmp eq void ()* %FP, null ; <i1> [#uses=1]
+ br i1 %CC, label %isNull, label %DoCall
+
+DoCall: ; preds = %0
+ call void %FP( )
+ ret void
+
+isNull: ; preds = %0
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/storepointer.ll b/test/Transforms/GlobalOpt/storepointer.ll
new file mode 100644
index 0000000..8019076
--- /dev/null
+++ b/test/Transforms/GlobalOpt/storepointer.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -globalopt -S | not grep global
+
+@G = internal global void ()* null ; <void ()**> [#uses=2]
+
+define internal void @Actual() {
+ ret void
+}
+
+define void @init() {
+ store void ()* @Actual, void ()** @G
+ ret void
+}
+
+define void @doit() {
+ %FP = load void ()** @G ; <void ()*> [#uses=1]
+ call void %FP( )
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/trivialstore.ll b/test/Transforms/GlobalOpt/trivialstore.ll
new file mode 100644
index 0000000..21437f3
--- /dev/null
+++ b/test/Transforms/GlobalOpt/trivialstore.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -globalopt -S | not grep G
+
+@G = internal global i32 17 ; <i32*> [#uses=3]
+
+define void @foo() {
+ store i32 17, i32* @G
+ ret void
+}
+
+define i32 @bar() {
+ %X = load i32* @G ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define internal void @dead() {
+ store i32 123, i32* @G
+ ret void
+}
+
diff --git a/test/Transforms/GlobalOpt/undef-init.ll b/test/Transforms/GlobalOpt/undef-init.ll
new file mode 100644
index 0000000..c149497
--- /dev/null
+++ b/test/Transforms/GlobalOpt/undef-init.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -globalopt -S | not grep store
+
[email protected]_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I__Z3foov } ] ; <[1 x { i32, void ()* }]*> [#uses=0]
[email protected] = internal global i32 undef ; <i32*> [#uses=2]
+
+define i32 @_Z3foov() {
+entry:
+ %tmp.1 = load i32* @X.0 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
+
+define internal void @_GLOBAL__I__Z3foov() {
+entry:
+ store i32 1, i32* @X.0
+ ret void
+}
+
diff --git a/test/Transforms/IPConstantProp/2008-06-09-WeakProp.ll b/test/Transforms/IPConstantProp/2008-06-09-WeakProp.ll
new file mode 100644
index 0000000..6640336
--- /dev/null
+++ b/test/Transforms/IPConstantProp/2008-06-09-WeakProp.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -ipconstprop -S | grep {ret i32 %r}
+; Should not propagate the result of a weak function.
+; PR2411
+
+define weak i32 @foo() nounwind {
+entry:
+ ret i32 1
+}
+
+define i32 @main() nounwind {
+entry:
+ %r = call i32 @foo( ) nounwind
+ ret i32 %r
+}
+
diff --git a/test/Transforms/IPConstantProp/2009-09-24-byval-ptr.ll b/test/Transforms/IPConstantProp/2009-09-24-byval-ptr.ll
new file mode 100644
index 0000000..f4bab35
--- /dev/null
+++ b/test/Transforms/IPConstantProp/2009-09-24-byval-ptr.ll
@@ -0,0 +1,40 @@
+; RUN: llvm-as <%s | opt -ipsccp | llvm-dis | FileCheck %s
+; Don't constant-propagate byval pointers, since they are not pointers!
+; PR5038
+%struct.MYstr = type { i8, i32 }
+@mystr = internal global %struct.MYstr zeroinitializer ; <%struct.MYstr*> [#uses=3]
+define internal void @vfu1(%struct.MYstr* byval align 4 %u) nounwind {
+entry:
+ %0 = getelementptr %struct.MYstr* %u, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 99, i32* %0, align 4
+; CHECK: %struct.MYstr* %u
+ %1 = getelementptr %struct.MYstr* %u, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 97, i8* %1, align 4
+; CHECK: %struct.MYstr* %u
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define internal i32 @vfu2(%struct.MYstr* byval align 4 %u) nounwind readonly {
+entry:
+ %0 = getelementptr %struct.MYstr* %u, i32 0, i32 1 ; <i32*> [#uses=1]
+ %1 = load i32* %0
+; CHECK: load i32* getelementptr inbounds (%struct.MYstr* @mystr, i32 0, i32 1) ; <i32> [#uses=1]
+ %2 = getelementptr %struct.MYstr* %u, i32 0, i32 0 ; <i8*> [#uses=1]
+ %3 = load i8* %2
+; CHECK: load i8* getelementptr inbounds (%struct.MYstr* @mystr, i32 0, i32 0) ; <i8> [#uses=1]
+ %4 = zext i8 %3 to i32
+ %5 = add i32 %4, %1
+ ret i32 %5
+}
+
+define i32 @unions() nounwind {
+entry:
+ call void @vfu1(%struct.MYstr* byval align 4 @mystr) nounwind
+ %result = call i32 @vfu2(%struct.MYstr* byval align 4 @mystr) nounwind
+
+ ret i32 %result
+}
+
diff --git a/test/Transforms/IPConstantProp/dangling-block-address.ll b/test/Transforms/IPConstantProp/dangling-block-address.ll
new file mode 100644
index 0000000..0489dfa
--- /dev/null
+++ b/test/Transforms/IPConstantProp/dangling-block-address.ll
@@ -0,0 +1,42 @@
+; RUN: opt < %s -internalize -ipsccp -S | FileCheck %s
+; PR5569
+
+; IPSCCP should prove that the blocks are dead and delete them, and
+; properly handle the dangling blockaddress constants.
+
+; CHECK: @bar.l = internal constant [2 x i8*] [i8* inttoptr (i32 1 to i8*), i8* inttoptr (i32 1 to i8*)]
+
+@code = global [5 x i32] [i32 0, i32 0, i32 0, i32 0, i32 1], align 4 ; <[5 x i32]*> [#uses=0]
[email protected] = internal constant [2 x i8*] [i8* blockaddress(@bar, %lab0), i8* blockaddress(@bar, %end)] ; <[2 x i8*]*> [#uses=1]
+
+define void @foo(i32 %x) nounwind readnone {
+entry:
+ %b = alloca i32, align 4 ; <i32*> [#uses=1]
+ volatile store i32 -1, i32* %b
+ ret void
+}
+
+define void @bar(i32* nocapture %pc) nounwind readonly {
+entry:
+ br label %indirectgoto
+
+lab0: ; preds = %indirectgoto
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %indirectgoto
+
+end: ; preds = %indirectgoto
+ ret void
+
+indirectgoto: ; preds = %lab0, %entry
+ %indvar = phi i32 [ %indvar.next, %lab0 ], [ 0, %entry ] ; <i32> [#uses=2]
+ %pc.addr.0 = getelementptr i32* %pc, i32 %indvar ; <i32*> [#uses=1]
+ %tmp1.pn = load i32* %pc.addr.0 ; <i32> [#uses=1]
+ %indirect.goto.dest.in = getelementptr inbounds [2 x i8*]* @bar.l, i32 0, i32 %tmp1.pn ; <i8**> [#uses=1]
+ %indirect.goto.dest = load i8** %indirect.goto.dest.in ; <i8*> [#uses=1]
+ indirectbr i8* %indirect.goto.dest, [label %lab0, label %end]
+}
+
+define i32 @main() nounwind readnone {
+entry:
+ ret i32 0
+}
diff --git a/test/Transforms/IPConstantProp/deadarg.ll b/test/Transforms/IPConstantProp/deadarg.ll
new file mode 100644
index 0000000..4b9938e
--- /dev/null
+++ b/test/Transforms/IPConstantProp/deadarg.ll
@@ -0,0 +1,6 @@
+; RUN: opt < %s -ipconstprop -disable-output
+define internal void @foo(i32 %X) {
+ call void @foo( i32 %X )
+ ret void
+}
+
diff --git a/test/Transforms/IPConstantProp/dg.exp b/test/Transforms/IPConstantProp/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/IPConstantProp/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/IPConstantProp/recursion.ll b/test/Transforms/IPConstantProp/recursion.ll
new file mode 100644
index 0000000..b25a6c0
--- /dev/null
+++ b/test/Transforms/IPConstantProp/recursion.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -ipconstprop -deadargelim -S | not grep %X
+define internal i32 @foo(i32 %X) {
+ %Y = call i32 @foo( i32 %X ) ; <i32> [#uses=1]
+ %Z = add i32 %Y, 1 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define void @bar() {
+ call i32 @foo( i32 17 ) ; <i32>:1 [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/IPConstantProp/return-argument.ll b/test/Transforms/IPConstantProp/return-argument.ll
new file mode 100644
index 0000000..6d6eb24
--- /dev/null
+++ b/test/Transforms/IPConstantProp/return-argument.ll
@@ -0,0 +1,49 @@
+; RUN: opt < %s -ipconstprop -S > %t
+; RUN: cat %t | grep {store i32 %Z, i32\\* %Q}
+; RUN: cat %t | grep {add i32 1, 3}
+
+;; This function returns its second argument on all return statements
+define internal i32* @incdec(i1 %C, i32* %V) {
+ %X = load i32* %V
+ br i1 %C, label %T, label %F
+
+T: ; preds = %0
+ %X1 = add i32 %X, 1
+ store i32 %X1, i32* %V
+ ret i32* %V
+
+F: ; preds = %0
+ %X2 = sub i32 %X, 1
+ store i32 %X2, i32* %V
+ ret i32* %V
+}
+
+;; This function returns its first argument as a part of a multiple return
+;; value
+define internal { i32, i32 } @foo(i32 %A, i32 %B) {
+ %X = add i32 %A, %B
+ %Y = insertvalue { i32, i32 } undef, i32 %A, 0
+ %Z = insertvalue { i32, i32 } %Y, i32 %X, 1
+ ret { i32, i32 } %Z
+}
+
+define void @caller(i1 %C) {
+ %Q = alloca i32
+ ;; Call incdec to see if %W is properly replaced by %Q
+ %W = call i32* @incdec(i1 %C, i32* %Q ) ; <i32> [#uses=1]
+ ;; Call @foo twice, to prevent the arguments from propagating into the
+ ;; function (so we can check the returned argument is properly
+ ;; propagated per-caller).
+ %S1 = call { i32, i32 } @foo(i32 1, i32 2)
+ %X1 = extractvalue { i32, i32 } %S1, 0
+ %S2 = invoke { i32, i32 } @foo(i32 3, i32 4) to label %OK unwind label %RET
+OK:
+ %X2 = extractvalue { i32, i32 } %S2, 0
+ ;; Do some stuff with the returned values which we can grep for
+ %Z = add i32 %X1, %X2
+ store i32 %Z, i32* %W
+ br label %RET
+RET:
+ ret void
+}
+
diff --git a/test/Transforms/IPConstantProp/return-constant.ll b/test/Transforms/IPConstantProp/return-constant.ll
new file mode 100644
index 0000000..b255859
--- /dev/null
+++ b/test/Transforms/IPConstantProp/return-constant.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -ipconstprop -instcombine | \
+; RUN: llvm-dis | grep {ret i1 true} | count 2
+define internal i32 @foo(i1 %C) {
+ br i1 %C, label %T, label %F
+
+T: ; preds = %0
+ ret i32 52
+
+F: ; preds = %0
+ ret i32 52
+}
+
+define i1 @caller(i1 %C) {
+ %X = call i32 @foo( i1 %C ) ; <i32> [#uses=1]
+ %Y = icmp ne i32 %X, 0 ; <i1> [#uses=1]
+ ret i1 %Y
+}
+
+define i1 @invokecaller(i1 %C) {
+ %X = invoke i32 @foo( i1 %C ) to label %OK unwind label %FAIL ; <i32> [#uses=1]
+OK:
+ %Y = icmp ne i32 %X, 0 ; <i1> [#uses=1]
+ ret i1 %Y
+FAIL:
+ ret i1 false
+}
diff --git a/test/Transforms/IPConstantProp/return-constants.ll b/test/Transforms/IPConstantProp/return-constants.ll
new file mode 100644
index 0000000..79220dd
--- /dev/null
+++ b/test/Transforms/IPConstantProp/return-constants.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -ipconstprop -S > %t
+;; Check that the 21 constants got propagated properly
+; RUN: cat %t | grep {%M = add i32 21, 21}
+;; Check that the second return values didn't get propagated
+; RUN: cat %t | grep {%N = add i32 %B, %D}
+
+define internal {i32, i32} @foo(i1 %Q) {
+ br i1 %Q, label %T, label %F
+
+T: ; preds = %0
+ ret i32 21, i32 22
+
+F: ; preds = %0
+ ret i32 21, i32 23
+}
+
+define internal {i32, i32} @bar(i1 %Q) {
+ %A = insertvalue { i32, i32 } undef, i32 21, 0
+ br i1 %Q, label %T, label %F
+
+T: ; preds = %0
+ %B = insertvalue { i32, i32 } %A, i32 22, 1
+ ret { i32, i32 } %B
+
+F: ; preds = %0
+ %C = insertvalue { i32, i32 } %A, i32 23, 1
+ ret { i32, i32 } %C
+}
+
+define { i32, i32 } @caller(i1 %Q) {
+ %X = call {i32, i32} @foo( i1 %Q )
+ %A = getresult {i32, i32} %X, 0
+ %B = getresult {i32, i32} %X, 1
+ %Y = call {i32, i32} @bar( i1 %Q )
+ %C = extractvalue {i32, i32} %Y, 0
+ %D = extractvalue {i32, i32} %Y, 1
+ %M = add i32 %A, %C
+ %N = add i32 %B, %D
+ ret { i32, i32 } %X
+}
+
diff --git a/test/Transforms/IPConstantProp/user-with-multiple-uses.ll b/test/Transforms/IPConstantProp/user-with-multiple-uses.ll
new file mode 100644
index 0000000..402ea41
--- /dev/null
+++ b/test/Transforms/IPConstantProp/user-with-multiple-uses.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -S -ipsccp | FileCheck %s
+; PR5596
+
+; IPSCCP should propagate the 0 argument, eliminate the switch, and propagate
+; the result.
+
+; CHECK: define i32 @main() noreturn nounwind {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %call2 = tail call i32 @wwrite(i64 0) nounwind
+; CHECK-NEXT: ret i32 123
+
+define i32 @main() noreturn nounwind {
+entry:
+ %call2 = tail call i32 @wwrite(i64 0) nounwind
+ ret i32 %call2
+}
+
+define internal i32 @wwrite(i64 %i) nounwind readnone {
+entry:
+ switch i64 %i, label %sw.default [
+ i64 3, label %return
+ i64 10, label %return
+ ]
+
+sw.default:
+ ret i32 123
+
+return:
+ ret i32 0
+}
diff --git a/test/Transforms/IndVarSimplify/2002-09-09-PointerIndVar.ll b/test/Transforms/IndVarSimplify/2002-09-09-PointerIndVar.ll
new file mode 100644
index 0000000..92911ae
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2002-09-09-PointerIndVar.ll
@@ -0,0 +1,17 @@
+; Induction variable pass is doing bad things with pointer induction vars,
+; trying to do arithmetic on them directly.
+;
+; RUN: opt < %s -indvars
+;
+define void @test(i32 %A, i32 %S, i8* %S.upgrd.1) {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %PIV = phi i8* [ %S.upgrd.1, %0 ], [ %PIVNext.upgrd.3, %Loop ] ; <i8*> [#uses=1]
+ %PIV.upgrd.2 = ptrtoint i8* %PIV to i64 ; <i64> [#uses=1]
+ %PIVNext = add i64 %PIV.upgrd.2, 8 ; <i64> [#uses=1]
+ %PIVNext.upgrd.3 = inttoptr i64 %PIVNext to i8* ; <i8*> [#uses=1]
+ br label %Loop
+}
+
diff --git a/test/Transforms/IndVarSimplify/2003-04-16-ExprAnalysis.ll b/test/Transforms/IndVarSimplify/2003-04-16-ExprAnalysis.ll
new file mode 100644
index 0000000..38fa112
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2003-04-16-ExprAnalysis.ll
@@ -0,0 +1,17 @@
+; This is a test case for the expression analysis code, not really indvars.
+; It was assuming any constant of int type was a ConstantInteger.
+;
+; RUN: opt < %s -indvars
+
+@X = global i32 7 ; <i32*> [#uses=1]
+
+define void @test(i32 %A) {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %IV = phi i32 [ %A, %0 ], [ %IVNext, %Loop ] ; <i32> [#uses=1]
+ %IVNext = add i32 %IV, ptrtoint (i32* @X to i32) ; <i32> [#uses=1]
+ br label %Loop
+}
+
diff --git a/test/Transforms/IndVarSimplify/2003-09-12-MultiplePred.ll b/test/Transforms/IndVarSimplify/2003-09-12-MultiplePred.ll
new file mode 100644
index 0000000..36d5006
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2003-09-12-MultiplePred.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -indvars -S | grep indvar
+
+define i32 @test() {
+; <label>:0
+ br i1 true, label %LoopHead, label %LoopHead
+
+LoopHead: ; preds = %LoopHead, %0, %0
+ %A = phi i32 [ 7, %0 ], [ 7, %0 ], [ %B, %LoopHead ] ; <i32> [#uses=1]
+ %B = add i32 %A, 1 ; <i32> [#uses=2]
+ br i1 false, label %LoopHead, label %Out
+
+Out: ; preds = %LoopHead
+ ret i32 %B
+}
+
diff --git a/test/Transforms/IndVarSimplify/2003-09-23-NotAtTop.ll b/test/Transforms/IndVarSimplify/2003-09-23-NotAtTop.ll
new file mode 100644
index 0000000..150ae70
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2003-09-23-NotAtTop.ll
@@ -0,0 +1,20 @@
+; RUN: opt -S -indvars %s | FileCheck %s
+
+; The indvar simplification code should ensure that the first PHI in the block
+; is the canonical one!
+
+define i32 @test() {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+; CHECK: Loop:
+; CHECK-NEXT: Canonical
+ %NonIndvar = phi i32 [ 200, %0 ], [ %NonIndvarNext, %Loop ] ; <i32> [#uses=1]
+ %Canonical = phi i32 [ 0, %0 ], [ %CanonicalNext, %Loop ] ; <i32> [#uses=2]
+ store i32 %Canonical, i32* null
+ %NonIndvarNext = sdiv i32 %NonIndvar, 2 ; <i32> [#uses=1]
+ %CanonicalNext = add i32 %Canonical, 1 ; <i32> [#uses=1]
+ br label %Loop
+}
+
diff --git a/test/Transforms/IndVarSimplify/2003-12-10-IndVarDeadCode.ll b/test/Transforms/IndVarSimplify/2003-12-10-IndVarDeadCode.ll
new file mode 100644
index 0000000..c8f97e3
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2003-12-10-IndVarDeadCode.ll
@@ -0,0 +1,25 @@
+; The induction variable canonicalization pass shouldn't leave dead
+; instructions laying around!
+;
+; RUN: opt < %s -indvars -S | \
+; RUN: not grep {#uses=0}
+
+define i32 @mul(i32 %x, i32 %y) {
+entry:
+ br label %tailrecurse
+
+tailrecurse: ; preds = %endif, %entry
+ %accumulator.tr = phi i32 [ %x, %entry ], [ %tmp.9, %endif ] ; <i32> [#uses=2]
+ %y.tr = phi i32 [ %y, %entry ], [ %tmp.8, %endif ] ; <i32> [#uses=2]
+ %tmp.1 = icmp eq i32 %y.tr, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %return, label %endif
+
+endif: ; preds = %tailrecurse
+ %tmp.8 = add i32 %y.tr, -1 ; <i32> [#uses=1]
+ %tmp.9 = add i32 %accumulator.tr, %x ; <i32> [#uses=1]
+ br label %tailrecurse
+
+return: ; preds = %tailrecurse
+ ret i32 %accumulator.tr
+}
+
diff --git a/test/Transforms/IndVarSimplify/2003-12-10-RemoveInstrCrash.ll b/test/Transforms/IndVarSimplify/2003-12-10-RemoveInstrCrash.ll
new file mode 100644
index 0000000..70ea11e
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2003-12-10-RemoveInstrCrash.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -indvars -disable-output
+
+define void @test() {
+entry:
+ %inc.2 = add i32 1, 1 ; <i32> [#uses=1]
+ br i1 false, label %no_exit, label %loopexit
+
+no_exit: ; preds = %no_exit, %entry
+ %j.0.pn = phi i32 [ %inc.3, %no_exit ], [ %inc.2, %entry ] ; <i32> [#uses=1]
+ %k.0.pn = phi i32 [ %inc.4, %no_exit ], [ 1, %entry ] ; <i32> [#uses=1]
+ %inc.3 = add i32 %j.0.pn, 1 ; <i32> [#uses=1]
+ %inc.4 = add i32 %k.0.pn, 1 ; <i32> [#uses=1]
+ br i1 false, label %no_exit, label %loopexit
+
+loopexit: ; preds = %no_exit, %entry
+ ret void
+}
+
diff --git a/test/Transforms/IndVarSimplify/2003-12-15-Crash.ll b/test/Transforms/IndVarSimplify/2003-12-15-Crash.ll
new file mode 100644
index 0000000..5aa2d90
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2003-12-15-Crash.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -indvars -disable-output
+define void @_ZN17CoinFactorization7cleanupEv() {
+entry:
+ br i1 false, label %loopexit.14, label %cond_continue.3
+
+cond_continue.3: ; preds = %entry
+ ret void
+
+loopexit.14: ; preds = %entry
+ %tmp.738 = sub i32 0, 0 ; <i32> [#uses=1]
+ br i1 false, label %no_exit.15.preheader, label %loopexit.15
+
+no_exit.15.preheader: ; preds = %loopexit.14
+ br label %no_exit.15
+
+no_exit.15: ; preds = %no_exit.15, %no_exit.15.preheader
+ %highC.0 = phi i32 [ %tmp.738, %no_exit.15.preheader ], [ %dec.0, %no_exit.15 ] ; <i32> [#uses=1]
+ %dec.0 = add i32 %highC.0, -1 ; <i32> [#uses=1]
+ br i1 false, label %no_exit.15, label %loopexit.15
+
+loopexit.15: ; preds = %no_exit.15, %loopexit.14
+ ret void
+}
+
diff --git a/test/Transforms/IndVarSimplify/2003-12-21-IndVarSize.ll b/test/Transforms/IndVarSimplify/2003-12-21-IndVarSize.ll
new file mode 100644
index 0000000..0fc9c85
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2003-12-21-IndVarSize.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -indvars -S | grep indvar | not grep i32
+
+@G = global i64 0 ; <i64*> [#uses=1]
+
+define void @test() {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %X = phi i64 [ 1, %0 ], [ %X.next, %Loop ] ; <i64> [#uses=2]
+ %X.next = add i64 %X, 1 ; <i64> [#uses=1]
+ store i64 %X, i64* @G
+ br label %Loop
+}
+
diff --git a/test/Transforms/IndVarSimplify/2004-03-10-PHIInsertionBug.ll b/test/Transforms/IndVarSimplify/2004-03-10-PHIInsertionBug.ll
new file mode 100644
index 0000000..c49819e
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2004-03-10-PHIInsertionBug.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -indvars -disable-output
+
+define void @test() {
+ br label %endif.0.i
+
+endif.0.i: ; preds = %0
+ br i1 false, label %then.3.i, label %endif.3.i
+
+then.3.i: ; preds = %endif.0.i
+ br label %endif.3.i
+
+endif.3.i: ; preds = %then.3.i, %endif.0.i
+ %inxm.0.i = phi i32 [ 8, %then.3.i ], [ 0, %endif.0.i ] ; <i32> [#uses=1]
+ %doinner.1.i = phi i32 [ 0, %then.3.i ], [ 0, %endif.0.i ] ; <i32> [#uses=0]
+ br label %loopentry.2.i
+
+loopentry.2.i: ; preds = %no_exit.2.i, %endif.3.i
+ %inxk.0.i = phi i32 [ %tmp.210.i, %no_exit.2.i ], [ 0, %endif.3.i ] ; <i32> [#uses=1]
+ br label %no_exit.2.i
+
+no_exit.2.i: ; preds = %loopentry.2.i
+ %tmp.210.i = sub i32 %inxk.0.i, %inxm.0.i ; <i32> [#uses=2]
+ %tmp.213.i = add i32 %tmp.210.i, 0 ; <i32> [#uses=0]
+ br label %loopentry.2.i
+}
+
diff --git a/test/Transforms/IndVarSimplify/2004-04-05-InvokeCastCrash.ll b/test/Transforms/IndVarSimplify/2004-04-05-InvokeCastCrash.ll
new file mode 100644
index 0000000..1ed4c44
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2004-04-05-InvokeCastCrash.ll
@@ -0,0 +1,283 @@
+; RUN: opt < %s -indvars -disable-output
+; ModuleID = '2004-04-05-InvokeCastCrash.ll'
+ %struct.__false_type = type { i8 }
+ %"struct.__gnu_cxx::_Hashtable_node<const llvm::Constant*>" = type { %"struct.__gnu_cxx::_Hashtable_node<const llvm::Constant*>"*, %"struct.llvm::Constant"* }
+ %"struct.__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >" = type { %"struct.__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >"*, %"struct.std::pair<const llvm::Value* const,int>" }
+ %"struct.__gnu_cxx::hash_map<const llvm::Value*,int,__gnu_cxx::hash<const llvm::Value*>,std::equal_to<const llvm::Value*>,std::allocator<int> >" = type { %"struct.__gnu_cxx::hashtable<std::pair<const llvm::Value* const, int>,const llvm::Value*,__gnu_cxx::hash<const llvm::Value*>,std::_Select1st<std::pair<const llvm::Value* const, int> >,std::equal_to<const llvm::Value*>,std::allocator<int> >" }
+ %"struct.__gnu_cxx::hash_set<const llvm::Constant*,__gnu_cxx::hash<const llvm::Constant*>,std::equal_to<const llvm::Constant*>,std::allocator<const llvm::Constant*> >" = type { %"struct.__gnu_cxx::hashtable<const llvm::Constant*,const llvm::Constant*,__gnu_cxx::hash<const llvm::Constant*>,std::_Identity<const llvm::Constant*>,std::equal_to<const llvm::Constant*>,std::allocator<const llvm::Constant*> >" }
+ %"struct.__gnu_cxx::hashtable<const llvm::Constant*,const llvm::Constant*,__gnu_cxx::hash<const llvm::Constant*>,std::_Identity<const llvm::Constant*>,std::equal_to<const llvm::Constant*>,std::allocator<const llvm::Constant*> >" = type { %struct.__false_type, %struct.__false_type, %struct.__false_type, %struct.__false_type, %"struct.std::vector<__gnu_cxx::_Hashtable_node<const llvm::Constant*>*,std::allocator<const llvm::Constant*> >", i32 }
+ %"struct.__gnu_cxx::hashtable<std::pair<const llvm::Value* const, int>,const llvm::Value*,__gnu_cxx::hash<const llvm::Value*>,std::_Select1st<std::pair<const llvm::Value* const, int> >,std::equal_to<const llvm::Value*>,std::allocator<int> >" = type { %struct.__false_type, %struct.__false_type, %struct.__false_type, %struct.__false_type, %"struct.std::vector<__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >*,std::allocator<int> >", i32 }
+ %"struct.llvm::AbstractTypeUser" = type { i32 (...)** }
+ %"struct.llvm::Annotable" = type { i32 (...)**, %"struct.llvm::Annotation"* }
+ %"struct.llvm::Annotation" = type { i32 (...)**, %"struct.llvm::AnnotationID", %"struct.llvm::Annotation"* }
+ %"struct.llvm::AnnotationID" = type { i32 }
+ %"struct.llvm::Argument" = type { %"struct.llvm::Value", %"struct.llvm::Function"*, %"struct.llvm::Argument"*, %"struct.llvm::Argument"* }
+ %"struct.llvm::BasicBlock" = type { %"struct.llvm::Value", %"struct.llvm::iplist<llvm::Instruction,llvm::ilist_traits<llvm::Instruction> >", %"struct.llvm::BasicBlock"*, %"struct.llvm::BasicBlock"* }
+ %"struct.llvm::Constant" = type opaque
+ %"struct.llvm::DerivedType" = type { %"struct.llvm::Type", %"struct.llvm::AbstractTypeUser", %"struct.std::vector<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >" }
+ %"struct.llvm::Function" = type { %"struct.llvm::GlobalValue", %"struct.llvm::Annotable", %"struct.llvm::iplist<llvm::BasicBlock,llvm::ilist_traits<llvm::BasicBlock> >", %"struct.llvm::iplist<llvm::Argument,llvm::ilist_traits<llvm::Argument> >", %"struct.llvm::SymbolTable"*, %"struct.llvm::Function"*, %"struct.llvm::Function"* }
+ %"struct.llvm::FunctionPass" = type { %"struct.llvm::Pass" }
+ %"struct.llvm::FunctionType" = type { %"struct.llvm::DerivedType", i1 }
+ %"struct.llvm::GlobalValue" = type { %"struct.llvm::User", i32, %"struct.llvm::Module"* }
+ %"struct.llvm::Instruction" = type { %"struct.llvm::User", %"struct.llvm::Annotable", %"struct.llvm::BasicBlock"*, %"struct.llvm::Instruction"*, %"struct.llvm::Instruction"*, i32 }
+ %"struct.llvm::IntrinsicLowering" = type opaque
+ %"struct.llvm::MachineBasicBlock" = type { %"struct.llvm::ilist<llvm::MachineInstr>", %"struct.llvm::MachineBasicBlock"*, %"struct.llvm::MachineBasicBlock"*, %"struct.llvm::BasicBlock"* }
+ %"struct.llvm::MachineConstantPool" = type opaque
+ %"struct.llvm::MachineFrameInfo" = type opaque
+ %"struct.llvm::MachineFunction" = type { %"struct.llvm::Annotation", %"struct.llvm::Function"*, %"struct.llvm::TargetMachine"*, %"struct.llvm::iplist<llvm::MachineBasicBlock,llvm::ilist_traits<llvm::MachineBasicBlock> >", %"struct.llvm::SSARegMap"*, %"struct.llvm::MachineFunctionInfo"*, %"struct.llvm::MachineFrameInfo"*, %"struct.llvm::MachineConstantPool"* }
+ %"struct.llvm::MachineFunctionInfo" = type { %"struct.__gnu_cxx::hash_set<const llvm::Constant*,__gnu_cxx::hash<const llvm::Constant*>,std::equal_to<const llvm::Constant*>,std::allocator<const llvm::Constant*> >", %"struct.__gnu_cxx::hash_map<const llvm::Value*,int,__gnu_cxx::hash<const llvm::Value*>,std::equal_to<const llvm::Value*>,std::allocator<int> >", i32, i32, i32, i32, i32, i32, i32, i1, i1, i1, %"struct.llvm::MachineFunction"* }
+ %"struct.llvm::MachineFunctionPass" = type { %"struct.llvm::FunctionPass" }
+ %"struct.llvm::MachineInstr" = type { i16, i8, %"struct.std::vector<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >", %"struct.llvm::MachineInstr"*, %"struct.llvm::MachineInstr"*, %"struct.llvm::MachineBasicBlock"* }
+ %"struct.llvm::MachineInstrBuilder" = type { %"struct.llvm::MachineInstr"* }
+ %"struct.llvm::MachineOperand" = type { %"union.llvm::MachineOperand::._65", i32, i32 }
+ %"struct.llvm::Module" = type opaque
+ %"struct.llvm::PATypeHandle" = type { %"struct.llvm::Type"*, %"struct.llvm::AbstractTypeUser"* }
+ %"struct.llvm::PATypeHolder" = type { %"struct.llvm::Type"* }
+ %"struct.llvm::Pass" = type { i32 (...)**, %"struct.llvm::AbstractTypeUser"*, %"struct.llvm::PassInfo"*, %"struct.std::vector<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >" }
+ %"struct.llvm::PassInfo" = type { i8*, i8*, %"struct.std::type_info"*, i8, %"struct.std::vector<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >", %"struct.llvm::Pass"* ()*, %"struct.llvm::Pass"* (%"struct.llvm::TargetMachine"*)* }
+ %"struct.llvm::SSARegMap" = type opaque
+ %"struct.llvm::SymbolTable" = type opaque
+ %"struct.llvm::SymbolTableListTraits<llvm::Argument,llvm::Function,llvm::Function,llvm::ilist_traits<llvm::Argument> >" = type { %"struct.llvm::Function"*, %"struct.llvm::Function"* }
+ %"struct.llvm::SymbolTableListTraits<llvm::Instruction,llvm::BasicBlock,llvm::Function,llvm::ilist_traits<llvm::Instruction> >" = type { %"struct.llvm::Function"*, %"struct.llvm::BasicBlock"* }
+ %"struct.llvm::TargetData" = type { %"struct.llvm::FunctionPass", i1, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %"struct.llvm::TargetFrameInfo" = type { i32 (...)**, i32, i32, i32 }
+ %"struct.llvm::TargetInstrDescriptor" = type { i8*, i32, i32, i32, i1, i32, i32, i32, i32, i32, i32*, i32* }
+ %"struct.llvm::TargetInstrInfo" = type { i32 (...)**, %"struct.llvm::TargetInstrDescriptor"*, i32, i32 }
+ %"struct.llvm::TargetMachine" = type { i32 (...)**, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >", %"struct.llvm::TargetData", %"struct.llvm::IntrinsicLowering"* }
+ %"struct.llvm::TargetRegClassInfo" = type { i32 (...)**, i32, i32, i32 }
+ %"struct.llvm::TargetRegInfo" = type { i32 (...)**, %"struct.std::vector<const llvm::TargetRegClassInfo*,std::allocator<const llvm::TargetRegClassInfo*> >", %"struct.llvm::TargetMachine"* }
+ %"struct.llvm::Type" = type { %"struct.llvm::Value", i32, i32, i1, i32, %"struct.llvm::Type"*, %"struct.std::vector<llvm::PATypeHandle,std::allocator<llvm::PATypeHandle> >" }
+ %"struct.llvm::Use" = type { %"struct.llvm::Value"*, %"struct.llvm::User"*, %"struct.llvm::Use"*, %"struct.llvm::Use"* }
+ %"struct.llvm::User" = type { %"struct.llvm::Value", %"struct.std::vector<llvm::Use,std::allocator<llvm::Use> >" }
+ %"struct.llvm::Value" = type { i32 (...)**, %"struct.llvm::iplist<llvm::Use,llvm::ilist_traits<llvm::Use> >", %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >", %"struct.llvm::PATypeHolder", i32 }
+ %"struct.llvm::_GLOBAL__N_::InsertPrologEpilogCode" = type { %"struct.llvm::MachineFunctionPass" }
+ %"struct.llvm::ilist<llvm::MachineInstr>" = type { %"struct.llvm::iplist<llvm::MachineInstr,llvm::ilist_traits<llvm::MachineInstr> >" }
+ %"struct.llvm::ilist_iterator<const llvm::MachineBasicBlock>" = type { %"struct.llvm::MachineBasicBlock"* }
+ %"struct.llvm::ilist_traits<llvm::Argument>" = type { %"struct.llvm::SymbolTableListTraits<llvm::Argument,llvm::Function,llvm::Function,llvm::ilist_traits<llvm::Argument> >" }
+ %"struct.llvm::ilist_traits<llvm::Instruction>" = type { %"struct.llvm::SymbolTableListTraits<llvm::Instruction,llvm::BasicBlock,llvm::Function,llvm::ilist_traits<llvm::Instruction> >" }
+ %"struct.llvm::iplist<llvm::Argument,llvm::ilist_traits<llvm::Argument> >" = type { %"struct.llvm::ilist_traits<llvm::Argument>", %"struct.llvm::Argument"*, %"struct.llvm::Argument"* }
+ %"struct.llvm::iplist<llvm::BasicBlock,llvm::ilist_traits<llvm::BasicBlock> >" = type { %"struct.llvm::ilist_traits<llvm::Argument>", %"struct.llvm::BasicBlock"*, %"struct.llvm::BasicBlock"* }
+ %"struct.llvm::iplist<llvm::Instruction,llvm::ilist_traits<llvm::Instruction> >" = type { %"struct.llvm::ilist_traits<llvm::Instruction>", %"struct.llvm::Instruction"*, %"struct.llvm::Instruction"* }
+ %"struct.llvm::iplist<llvm::MachineBasicBlock,llvm::ilist_traits<llvm::MachineBasicBlock> >" = type { %"struct.llvm::MachineBasicBlock"*, %"struct.llvm::MachineBasicBlock"* }
+ %"struct.llvm::iplist<llvm::MachineInstr,llvm::ilist_traits<llvm::MachineInstr> >" = type { %"struct.llvm::ilist_iterator<const llvm::MachineBasicBlock>", %"struct.llvm::MachineInstr"*, %"struct.llvm::MachineInstr"* }
+ %"struct.llvm::iplist<llvm::Use,llvm::ilist_traits<llvm::Use> >" = type { %"struct.llvm::Use"*, %"struct.llvm::Use"* }
+ %"struct.std::_Vector_alloc_base<__gnu_cxx::_Hashtable_node<const llvm::Constant*>*,std::allocator<const llvm::Constant*>, true>" = type { %"struct.__gnu_cxx::_Hashtable_node<const llvm::Constant*>"**, %"struct.__gnu_cxx::_Hashtable_node<const llvm::Constant*>"**, %"struct.__gnu_cxx::_Hashtable_node<const llvm::Constant*>"** }
+ %"struct.std::_Vector_alloc_base<__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >*,std::allocator<int>, true>" = type { %"struct.__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >"**, %"struct.__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >"**, %"struct.__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >"** }
+ %"struct.std::_Vector_alloc_base<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*>, true>" = type { %"struct.llvm::PassInfo"**, %"struct.llvm::PassInfo"**, %"struct.llvm::PassInfo"** }
+ %"struct.std::_Vector_alloc_base<const llvm::TargetRegClassInfo*,std::allocator<const llvm::TargetRegClassInfo*>, true>" = type { %"struct.llvm::TargetFrameInfo"**, %"struct.llvm::TargetFrameInfo"**, %"struct.llvm::TargetFrameInfo"** }
+ %"struct.std::_Vector_alloc_base<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*>, true>" = type { %"struct.llvm::AbstractTypeUser"**, %"struct.llvm::AbstractTypeUser"**, %"struct.llvm::AbstractTypeUser"** }
+ %"struct.std::_Vector_alloc_base<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*>, true>" = type { %"struct.llvm::MachineInstr"**, %"struct.llvm::MachineInstr"**, %"struct.llvm::MachineInstr"** }
+ %"struct.std::_Vector_alloc_base<llvm::MachineOperand,std::allocator<llvm::MachineOperand>, true>" = type { %"struct.llvm::MachineOperand"*, %"struct.llvm::MachineOperand"*, %"struct.llvm::MachineOperand"* }
+ %"struct.std::_Vector_alloc_base<llvm::PATypeHandle,std::allocator<llvm::PATypeHandle>, true>" = type { %"struct.llvm::PATypeHandle"*, %"struct.llvm::PATypeHandle"*, %"struct.llvm::PATypeHandle"* }
+ %"struct.std::_Vector_alloc_base<llvm::Use,std::allocator<llvm::Use>, true>" = type { %"struct.llvm::Use"*, %"struct.llvm::Use"*, %"struct.llvm::Use"* }
+ %"struct.std::_Vector_alloc_base<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> >, true>" = type { %"struct.std::pair<const llvm::PassInfo*,llvm::Pass*>"*, %"struct.std::pair<const llvm::PassInfo*,llvm::Pass*>"*, %"struct.std::pair<const llvm::PassInfo*,llvm::Pass*>"* }
+ %"struct.std::_Vector_base<__gnu_cxx::_Hashtable_node<const llvm::Constant*>*,std::allocator<const llvm::Constant*> >" = type { %"struct.std::_Vector_alloc_base<__gnu_cxx::_Hashtable_node<const llvm::Constant*>*,std::allocator<const llvm::Constant*>, true>" }
+ %"struct.std::_Vector_base<__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >*,std::allocator<int> >" = type { %"struct.std::_Vector_alloc_base<__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >*,std::allocator<int>, true>" }
+ %"struct.std::_Vector_base<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >" = type { %"struct.std::_Vector_alloc_base<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*>, true>" }
+ %"struct.std::_Vector_base<const llvm::TargetRegClassInfo*,std::allocator<const llvm::TargetRegClassInfo*> >" = type { %"struct.std::_Vector_alloc_base<const llvm::TargetRegClassInfo*,std::allocator<const llvm::TargetRegClassInfo*>, true>" }
+ %"struct.std::_Vector_base<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >" = type { %"struct.std::_Vector_alloc_base<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*>, true>" }
+ %"struct.std::_Vector_base<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >" = type { %"struct.std::_Vector_alloc_base<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*>, true>" }
+ %"struct.std::_Vector_base<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >" = type { %"struct.std::_Vector_alloc_base<llvm::MachineOperand,std::allocator<llvm::MachineOperand>, true>" }
+ %"struct.std::_Vector_base<llvm::PATypeHandle,std::allocator<llvm::PATypeHandle> >" = type { %"struct.std::_Vector_alloc_base<llvm::PATypeHandle,std::allocator<llvm::PATypeHandle>, true>" }
+ %"struct.std::_Vector_base<llvm::Use,std::allocator<llvm::Use> >" = type { %"struct.std::_Vector_alloc_base<llvm::Use,std::allocator<llvm::Use>, true>" }
+ %"struct.std::_Vector_base<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >" = type { %"struct.std::_Vector_alloc_base<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> >, true>" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* }
+ %"struct.std::pair<const llvm::PassInfo*,llvm::Pass*>" = type { %"struct.llvm::PassInfo"*, %"struct.llvm::Pass"* }
+ %"struct.std::pair<const llvm::Value* const,int>" = type { %"struct.llvm::Value"*, i32 }
+ %"struct.std::type_info" = type { i32 (...)**, i8* }
+ %"struct.std::vector<__gnu_cxx::_Hashtable_node<const llvm::Constant*>*,std::allocator<const llvm::Constant*> >" = type { %"struct.std::_Vector_base<__gnu_cxx::_Hashtable_node<const llvm::Constant*>*,std::allocator<const llvm::Constant*> >" }
+ %"struct.std::vector<__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >*,std::allocator<int> >" = type { %"struct.std::_Vector_base<__gnu_cxx::_Hashtable_node<std::pair<const llvm::Value* const, int> >*,std::allocator<int> >" }
+ %"struct.std::vector<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >" = type { %"struct.std::_Vector_base<const llvm::PassInfo*,std::allocator<const llvm::PassInfo*> >" }
+ %"struct.std::vector<const llvm::TargetRegClassInfo*,std::allocator<const llvm::TargetRegClassInfo*> >" = type { %"struct.std::_Vector_base<const llvm::TargetRegClassInfo*,std::allocator<const llvm::TargetRegClassInfo*> >" }
+ %"struct.std::vector<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >" = type { %"struct.std::_Vector_base<llvm::AbstractTypeUser*,std::allocator<llvm::AbstractTypeUser*> >" }
+ %"struct.std::vector<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >" = type { %"struct.std::_Vector_base<llvm::MachineInstr*,std::allocator<llvm::MachineInstr*> >" }
+ %"struct.std::vector<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >" = type { %"struct.std::_Vector_base<llvm::MachineOperand,std::allocator<llvm::MachineOperand> >" }
+ %"struct.std::vector<llvm::PATypeHandle,std::allocator<llvm::PATypeHandle> >" = type { %"struct.std::_Vector_base<llvm::PATypeHandle,std::allocator<llvm::PATypeHandle> >" }
+ %"struct.std::vector<llvm::Use,std::allocator<llvm::Use> >" = type { %"struct.std::_Vector_base<llvm::Use,std::allocator<llvm::Use> >" }
+ %"struct.std::vector<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >" = type { %"struct.std::_Vector_base<std::pair<const llvm::PassInfo*, llvm::Pass*>,std::allocator<std::pair<const llvm::PassInfo*, llvm::Pass*> > >" }
+ %"union.llvm::MachineOperand::._65" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* }
+
+declare void @_Znwj()
+
+declare void @_ZN4llvm12MachineInstrC1Esjbb()
+
+declare void @_ZNSt6vectorIPN4llvm12MachineInstrESaIS2_EE9push_backERKS2_()
+
+declare void @_ZNK4llvm8Function15getFunctionTypeEv()
+
+declare void @_ZNK4llvm19MachineInstrBuilder7addMRegEiNS_14MachineOperand7UseTypeE()
+
+declare void @_ZNK4llvm19MachineInstrBuilder7addSImmEi()
+
+define void @_ZN4llvm11_GLOBAL__N_22InsertPrologEpilogCode20runOnMachineFunctionERNS_15MachineFunctionE(%"struct.llvm::MachineFunction"* %F) {
+entry:
+ %tmp.8.i = invoke %"struct.llvm::TargetFrameInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.0.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetFrameInfo"*> [#uses=0]
+
+invoke_catch.0.i: ; preds = %invoke_cont.49.i, %invoke_cont.48.i, %invoke_cont.47.i, %invoke_cont.i53.i, %no_exit.i, %invoke_cont.44.i, %invoke_cont.43.i, %invoke_cont.42.i, %invoke_cont.41.i, %invoke_cont.40.i, %invoke_cont.39.i, %invoke_cont.38.i, %invoke_cont.37.i, %then.2.i, %invoke_cont.35.i, %invoke_cont.34.i, %then.1.i, %endif.0.i, %invoke_cont.9.i, %invoke_cont.8.i, %invoke_cont.7.i, %invoke_cont.i.i, %then.0.i, %invoke_cont.4.i, %invoke_cont.3.i, %invoke_cont.2.i, %invoke_cont.1.i, %endif.0.i.i, %tmp.7.i.noexc.i, %invoke_cont.0.i, %entry
+ ret void
+
+invoke_cont.0.i: ; preds = %entry
+ %tmp.7.i1.i = invoke %"struct.llvm::TargetFrameInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %tmp.7.i.noexc.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetFrameInfo"*> [#uses=2]
+
+tmp.7.i.noexc.i: ; preds = %invoke_cont.0.i
+ %tmp.17.i2.i = invoke i32 null( %"struct.llvm::TargetFrameInfo"* %tmp.7.i1.i )
+ to label %endif.0.i.i unwind label %invoke_catch.0.i ; <i32> [#uses=0]
+
+endif.0.i.i: ; preds = %tmp.7.i.noexc.i
+ %tmp.38.i4.i = invoke i32 null( %"struct.llvm::TargetFrameInfo"* %tmp.7.i1.i )
+ to label %tmp.38.i.noexc.i unwind label %invoke_catch.0.i ; <i32> [#uses=0]
+
+tmp.38.i.noexc.i: ; preds = %endif.0.i.i
+ br i1 false, label %invoke_cont.1.i, label %then.1.i.i
+
+then.1.i.i: ; preds = %tmp.38.i.noexc.i
+ ret void
+
+invoke_cont.1.i: ; preds = %tmp.38.i.noexc.i
+ %tmp.21.i = invoke %"struct.llvm::TargetRegInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.2.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetRegInfo"*> [#uses=1]
+
+invoke_cont.2.i: ; preds = %invoke_cont.1.i
+ %tmp.28.i = invoke i32 null( %"struct.llvm::TargetRegInfo"* %tmp.21.i )
+ to label %invoke_cont.3.i unwind label %invoke_catch.0.i ; <i32> [#uses=0]
+
+invoke_cont.3.i: ; preds = %invoke_cont.2.i
+ %tmp.36.i = invoke %"struct.llvm::TargetInstrInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.4.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetInstrInfo"*> [#uses=1]
+
+invoke_cont.4.i: ; preds = %invoke_cont.3.i
+ %tmp.43.i = invoke i1 null( %"struct.llvm::TargetInstrInfo"* %tmp.36.i, i16 383, i64 0 )
+ to label %invoke_cont.5.i unwind label %invoke_catch.0.i ; <i1> [#uses=1]
+
+invoke_cont.5.i: ; preds = %invoke_cont.4.i
+ br i1 %tmp.43.i, label %then.0.i, label %else.i
+
+then.0.i: ; preds = %invoke_cont.5.i
+ invoke void @_Znwj( )
+ to label %tmp.0.i.noexc.i unwind label %invoke_catch.0.i
+
+tmp.0.i.noexc.i: ; preds = %then.0.i
+ invoke void @_ZN4llvm12MachineInstrC1Esjbb( )
+ to label %invoke_cont.i.i unwind label %cond_true.i.i
+
+cond_true.i.i: ; preds = %tmp.0.i.noexc.i
+ ret void
+
+invoke_cont.i.i: ; preds = %tmp.0.i.noexc.i
+ invoke void @_ZNK4llvm19MachineInstrBuilder7addMRegEiNS_14MachineOperand7UseTypeE( )
+ to label %invoke_cont.7.i unwind label %invoke_catch.0.i
+
+invoke_cont.7.i: ; preds = %invoke_cont.i.i
+ invoke void @_ZNK4llvm19MachineInstrBuilder7addSImmEi( )
+ to label %invoke_cont.8.i unwind label %invoke_catch.0.i
+
+invoke_cont.8.i: ; preds = %invoke_cont.7.i
+ invoke void @_ZNK4llvm19MachineInstrBuilder7addMRegEiNS_14MachineOperand7UseTypeE( )
+ to label %invoke_cont.9.i unwind label %invoke_catch.0.i
+
+invoke_cont.9.i: ; preds = %invoke_cont.8.i
+ invoke void @_ZNSt6vectorIPN4llvm12MachineInstrESaIS2_EE9push_backERKS2_( )
+ to label %endif.0.i unwind label %invoke_catch.0.i
+
+else.i: ; preds = %invoke_cont.5.i
+ ret void
+
+endif.0.i: ; preds = %invoke_cont.9.i
+ invoke void @_ZNK4llvm8Function15getFunctionTypeEv( )
+ to label %invoke_cont.33.i unwind label %invoke_catch.0.i
+
+invoke_cont.33.i: ; preds = %endif.0.i
+ br i1 false, label %then.1.i, label %endif.1.i
+
+then.1.i: ; preds = %invoke_cont.33.i
+ invoke void @_ZNK4llvm8Function15getFunctionTypeEv( )
+ to label %invoke_cont.34.i unwind label %invoke_catch.0.i
+
+invoke_cont.34.i: ; preds = %then.1.i
+ %tmp.121.i = invoke %"struct.llvm::TargetRegInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.35.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetRegInfo"*> [#uses=1]
+
+invoke_cont.35.i: ; preds = %invoke_cont.34.i
+ %tmp.128.i = invoke i32 null( %"struct.llvm::TargetRegInfo"* %tmp.121.i )
+ to label %invoke_cont.36.i unwind label %invoke_catch.0.i ; <i32> [#uses=0]
+
+invoke_cont.36.i: ; preds = %invoke_cont.35.i
+ br i1 false, label %then.2.i, label %endif.1.i
+
+then.2.i: ; preds = %invoke_cont.36.i
+ %tmp.140.i = invoke %"struct.llvm::TargetRegInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.37.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetRegInfo"*> [#uses=0]
+
+invoke_cont.37.i: ; preds = %then.2.i
+ %tmp.148.i = invoke %"struct.llvm::TargetRegInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.38.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetRegInfo"*> [#uses=1]
+
+invoke_cont.38.i: ; preds = %invoke_cont.37.i
+ %tmp.155.i = invoke i32 null( %"struct.llvm::TargetRegInfo"* %tmp.148.i, %"struct.llvm::Type"* null, i1 false )
+ to label %invoke_cont.39.i unwind label %invoke_catch.0.i ; <i32> [#uses=0]
+
+invoke_cont.39.i: ; preds = %invoke_cont.38.i
+ %tmp.163.i = invoke %"struct.llvm::TargetFrameInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.40.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetFrameInfo"*> [#uses=1]
+
+invoke_cont.40.i: ; preds = %invoke_cont.39.i
+ %tmp.170.i = invoke i32 null( %"struct.llvm::TargetFrameInfo"* %tmp.163.i )
+ to label %invoke_cont.41.i unwind label %invoke_catch.0.i ; <i32> [#uses=0]
+
+invoke_cont.41.i: ; preds = %invoke_cont.40.i
+ %tmp.177.i = invoke %"struct.llvm::TargetFrameInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.42.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetFrameInfo"*> [#uses=1]
+
+invoke_cont.42.i: ; preds = %invoke_cont.41.i
+ %tmp.184.i = invoke i32 null( %"struct.llvm::TargetFrameInfo"* %tmp.177.i )
+ to label %invoke_cont.43.i unwind label %invoke_catch.0.i ; <i32> [#uses=1]
+
+invoke_cont.43.i: ; preds = %invoke_cont.42.i
+ %tmp.191.i = invoke %"struct.llvm::TargetFrameInfo"* null( %"struct.llvm::TargetMachine"* null )
+ to label %invoke_cont.44.i unwind label %invoke_catch.0.i ; <%"struct.llvm::TargetFrameInfo"*> [#uses=1]
+
+invoke_cont.44.i: ; preds = %invoke_cont.43.i
+ %tmp.198.i = invoke i32 null( %"struct.llvm::TargetFrameInfo"* %tmp.191.i, %"struct.llvm::MachineFunction"* %F, i1* null )
+ to label %invoke_cont.45.i unwind label %invoke_catch.0.i ; <i32> [#uses=0]
+
+invoke_cont.45.i: ; preds = %invoke_cont.44.i
+ br i1 false, label %no_exit.i, label %endif.1.i
+
+no_exit.i: ; preds = %invoke_cont.50.i, %invoke_cont.45.i
+ %nextArgOffset.0.i.1 = phi i32 [ %tmp.221.i, %invoke_cont.50.i ], [ 0, %invoke_cont.45.i ] ; <i32> [#uses=1]
+ invoke void @_Znwj( )
+ to label %tmp.0.i.noexc55.i unwind label %invoke_catch.0.i
+
+tmp.0.i.noexc55.i: ; preds = %no_exit.i
+ invoke void @_ZN4llvm12MachineInstrC1Esjbb( )
+ to label %invoke_cont.i53.i unwind label %cond_true.i52.i
+
+cond_true.i52.i: ; preds = %tmp.0.i.noexc55.i
+ ret void
+
+invoke_cont.i53.i: ; preds = %tmp.0.i.noexc55.i
+ invoke void @_ZNK4llvm19MachineInstrBuilder7addMRegEiNS_14MachineOperand7UseTypeE( )
+ to label %invoke_cont.47.i unwind label %invoke_catch.0.i
+
+invoke_cont.47.i: ; preds = %invoke_cont.i53.i
+ invoke void @_ZNK4llvm19MachineInstrBuilder7addMRegEiNS_14MachineOperand7UseTypeE( )
+ to label %invoke_cont.48.i unwind label %invoke_catch.0.i
+
+invoke_cont.48.i: ; preds = %invoke_cont.47.i
+ invoke void @_ZNK4llvm19MachineInstrBuilder7addSImmEi( )
+ to label %invoke_cont.49.i unwind label %invoke_catch.0.i
+
+invoke_cont.49.i: ; preds = %invoke_cont.48.i
+ invoke void @_ZNSt6vectorIPN4llvm12MachineInstrESaIS2_EE9push_backERKS2_( )
+ to label %invoke_cont.50.i unwind label %invoke_catch.0.i
+
+invoke_cont.50.i: ; preds = %invoke_cont.49.i
+ %tmp.221.i = add i32 %nextArgOffset.0.i.1, %tmp.184.i ; <i32> [#uses=1]
+ br i1 false, label %no_exit.i, label %endif.1.i
+
+endif.1.i: ; preds = %invoke_cont.50.i, %invoke_cont.45.i, %invoke_cont.36.i, %invoke_cont.33.i
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/2004-04-07-ScalarEvolutionCrash.ll b/test/Transforms/IndVarSimplify/2004-04-07-ScalarEvolutionCrash.ll
new file mode 100644
index 0000000..ec1218b
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2004-04-07-ScalarEvolutionCrash.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -indvars -disable-output
+
+define void @.outPlank_21() {
+entry:
+ br i1 false, label %loopexit.0, label %no_exit.0
+
+no_exit.0: ; preds = %entry
+ ret void
+
+loopexit.0: ; preds = %entry
+ br i1 false, label %no_exit.1, label %loopexit.1
+
+no_exit.1: ; preds = %loopexit.2, %loopexit.0
+ %i.0.0 = phi i32 [ %inc, %loopexit.2 ], [ 0, %loopexit.0 ] ; <i32> [#uses=1]
+ br i1 false, label %loopexit.2, label %no_exit.2
+
+no_exit.2: ; preds = %no_exit.1
+ ret void
+
+loopexit.2: ; preds = %no_exit.1
+ %inc = add i32 %i.0.0, 1 ; <i32> [#uses=1]
+ br i1 false, label %no_exit.1, label %loopexit.1
+
+loopexit.1: ; preds = %loopexit.2, %loopexit.0
+ ret void
+}
+
diff --git a/test/Transforms/IndVarSimplify/2005-02-11-InvokeCrash.ll b/test/Transforms/IndVarSimplify/2005-02-11-InvokeCrash.ll
new file mode 100644
index 0000000..aee67cc
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2005-02-11-InvokeCrash.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -indvars -disable-output
+
+define void @_ZN5ArrayISt7complexIdEEC2ERK10dim_vector() {
+entry:
+ %tmp.7 = invoke i32 @_ZN5ArrayISt7complexIdEE8get_sizeERK10dim_vector( )
+ to label %invoke_cont.0 unwind label %cond_true.1 ; <i32> [#uses=2]
+
+cond_true.1: ; preds = %entry
+ unwind
+
+invoke_cont.0: ; preds = %entry
+ %tmp.4.i = bitcast i32 %tmp.7 to i32 ; <i32> [#uses=0]
+ %tmp.14.0.i5 = add i32 %tmp.7, -1 ; <i32> [#uses=1]
+ br label %no_exit.i
+
+no_exit.i: ; preds = %no_exit.i, %invoke_cont.0
+ %tmp.14.0.i.0 = phi i32 [ %tmp.14.0.i, %no_exit.i ], [ %tmp.14.0.i5, %invoke_cont.0 ] ; <i32> [#uses=1]
+ %tmp.14.0.i = add i32 %tmp.14.0.i.0, -1 ; <i32> [#uses=1]
+ br label %no_exit.i
+}
+
+declare i32 @_ZN5ArrayISt7complexIdEE8get_sizeERK10dim_vector()
+
diff --git a/test/Transforms/IndVarSimplify/2005-02-17-TruncateExprCrash.ll b/test/Transforms/IndVarSimplify/2005-02-17-TruncateExprCrash.ll
new file mode 100644
index 0000000..70a7a9d
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2005-02-17-TruncateExprCrash.ll
@@ -0,0 +1,61 @@
+; RUN: opt < %s -indvars -disable-output
+
+declare void @q_atomic_increment()
+
+declare void @_Z9qt_assertPKcS0_i()
+
+define void @_ZN13QMetaResourceC1EPKh() {
+entry:
+ invoke void @_Z9qt_assertPKcS0_i( )
+ to label %endif.1 unwind label %then.i.i551
+
+then.i.i551: ; preds = %entry
+ ret void
+
+endif.1: ; preds = %entry
+ br i1 false, label %then.2, label %then.i.i
+
+then.2: ; preds = %endif.1
+ invoke void @q_atomic_increment( )
+ to label %loopentry.0 unwind label %invoke_catch.6
+
+invoke_catch.6: ; preds = %then.2
+ ret void
+
+loopentry.0: ; preds = %then.2
+ br i1 false, label %shortcirc_next.i, label %endif.3
+
+endif.3: ; preds = %loopentry.0
+ ret void
+
+shortcirc_next.i: ; preds = %loopentry.0
+ br i1 false, label %_ZNK7QString2atEi.exit, label %then.i
+
+then.i: ; preds = %shortcirc_next.i
+ ret void
+
+_ZNK7QString2atEi.exit: ; preds = %shortcirc_next.i
+ br i1 false, label %endif.4, label %then.4
+
+then.4: ; preds = %_ZNK7QString2atEi.exit
+ ret void
+
+endif.4: ; preds = %_ZNK7QString2atEi.exit
+ %tmp.115 = load i8* null ; <i8> [#uses=1]
+ br i1 false, label %loopexit.1, label %no_exit.0
+
+no_exit.0: ; preds = %no_exit.0, %endif.4
+ %bytes_in_len.4.5 = phi i8 [ %dec, %no_exit.0 ], [ %tmp.115, %endif.4 ] ; <i8> [#uses=1]
+ %off.5.5.in = phi i32 [ %off.5.5, %no_exit.0 ], [ 0, %endif.4 ] ; <i32> [#uses=1]
+ %off.5.5 = add i32 %off.5.5.in, 1 ; <i32> [#uses=2]
+ %dec = add i8 %bytes_in_len.4.5, -1 ; <i8> [#uses=2]
+ %tmp.123631 = icmp eq i8 %dec, 0 ; <i1> [#uses=1]
+ br i1 %tmp.123631, label %loopexit.1, label %no_exit.0
+
+loopexit.1: ; preds = %no_exit.0, %endif.4
+ %off.5.in.6 = phi i32 [ 0, %endif.4 ], [ %off.5.5, %no_exit.0 ] ; <i32> [#uses=0]
+ ret void
+
+then.i.i: ; preds = %endif.1
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/2005-02-26-ExitValueCompute.ll b/test/Transforms/IndVarSimplify/2005-02-26-ExitValueCompute.ll
new file mode 100644
index 0000000..1ba6982
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2005-02-26-ExitValueCompute.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -indvars -S | \
+; RUN: grep {ret i32 152}
+
+define i32 @main() {
+entry:
+ br label %no_exit
+
+no_exit: ; preds = %no_exit, %entry
+ %i.1.0 = phi i32 [ 0, %entry ], [ %inc, %no_exit ] ; <i32> [#uses=2]
+ %tmp.4 = icmp sgt i32 %i.1.0, 50 ; <i1> [#uses=1]
+ %tmp.7 = select i1 %tmp.4, i32 100, i32 0 ; <i32> [#uses=1]
+ %i.0 = add i32 %i.1.0, 1 ; <i32> [#uses=1]
+ %inc = add i32 %i.0, %tmp.7 ; <i32> [#uses=3]
+ %tmp.1 = icmp slt i32 %inc, 100 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %no_exit, label %loopexit
+
+loopexit: ; preds = %no_exit
+ ret i32 %inc
+}
+
diff --git a/test/Transforms/IndVarSimplify/2005-06-15-InstMoveCrash.ll b/test/Transforms/IndVarSimplify/2005-06-15-InstMoveCrash.ll
new file mode 100644
index 0000000..0862f11
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2005-06-15-InstMoveCrash.ll
@@ -0,0 +1,37 @@
+; RUN: opt < %s -indvars -disable-output
+
+define void @main() {
+entry:
+ br label %no_exit.1.outer
+
+no_exit.1.outer: ; preds = %endif.0, %entry
+ %l_14237116.1.0.ph = phi i8 [ -46, %entry ], [ 0, %endif.0 ] ; <i8> [#uses=1]
+ %i.0.0.0.ph = phi i32 [ 0, %entry ], [ %inc.1, %endif.0 ] ; <i32> [#uses=1]
+ br label %no_exit.1
+
+no_exit.1: ; preds = %_Z13func_47880058cc.exit, %no_exit.1.outer
+ br i1 false, label %_Z13func_47880058cc.exit, label %then.i
+
+then.i: ; preds = %no_exit.1
+ br label %_Z13func_47880058cc.exit
+
+_Z13func_47880058cc.exit: ; preds = %then.i, %no_exit.1
+ br i1 false, label %then.0, label %no_exit.1
+
+then.0: ; preds = %_Z13func_47880058cc.exit
+ %tmp.6 = bitcast i8 %l_14237116.1.0.ph to i8 ; <i8> [#uses=1]
+ br i1 false, label %endif.0, label %then.1
+
+then.1: ; preds = %then.0
+ br label %endif.0
+
+endif.0: ; preds = %then.1, %then.0
+ %inc.1 = add i32 %i.0.0.0.ph, 1 ; <i32> [#uses=2]
+ %tmp.2 = icmp sgt i32 %inc.1, 99 ; <i1> [#uses=1]
+ br i1 %tmp.2, label %loopexit.0, label %no_exit.1.outer
+
+loopexit.0: ; preds = %endif.0
+ %tmp.28 = zext i8 %tmp.6 to i32 ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/IndVarSimplify/2005-11-18-Crash.ll b/test/Transforms/IndVarSimplify/2005-11-18-Crash.ll
new file mode 100644
index 0000000..f9a3fe6
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2005-11-18-Crash.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -indvars -disable-output
+
+@fixtab = external global [29 x [29 x [2 x i32]]] ; <[29 x [29 x [2 x i32]]]*> [#uses=1]
+
+define void @init_optabs() {
+entry:
+ br label %no_exit.0
+
+no_exit.0: ; preds = %no_exit.0, %entry
+ %p.0.0 = phi i32* [ getelementptr ([29 x [29 x [2 x i32]]]* @fixtab, i32 0, i32 0, i32 0, i32 0), %entry ], [ %inc.0, %no_exit.0 ] ; <i32*> [#uses=1]
+ %inc.0 = getelementptr i32* %p.0.0, i32 1 ; <i32*> [#uses=1]
+ br i1 false, label %no_exit.0, label %no_exit.1
+
+no_exit.1: ; preds = %no_exit.0
+ ret void
+}
+
diff --git a/test/Transforms/IndVarSimplify/2006-03-31-NegativeStride.ll b/test/Transforms/IndVarSimplify/2006-03-31-NegativeStride.ll
new file mode 100644
index 0000000..1bbc631
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2006-03-31-NegativeStride.ll
@@ -0,0 +1,22 @@
+; PR726
+; RUN: opt < %s -indvars -S | \
+; RUN: grep {ret i32 27}
+
+; Make sure to compute the right exit value based on negative strides.
+
+define i32 @test() {
+entry:
+ br label %cond_true
+
+cond_true: ; preds = %cond_true, %entry
+ %a.0.0 = phi i32 [ 10, %entry ], [ %tmp4, %cond_true ] ; <i32> [#uses=2]
+ %b.0.0 = phi i32 [ 0, %entry ], [ %tmp2, %cond_true ] ; <i32> [#uses=1]
+ %tmp2 = add i32 %b.0.0, %a.0.0 ; <i32> [#uses=2]
+ %tmp4 = add i32 %a.0.0, -1 ; <i32> [#uses=2]
+ %tmp = icmp sgt i32 %tmp4, 7 ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true, label %bb7
+
+bb7: ; preds = %cond_true
+ ret i32 %tmp2
+}
+
diff --git a/test/Transforms/IndVarSimplify/2006-06-16-Indvar-LCSSA-Crash.ll b/test/Transforms/IndVarSimplify/2006-06-16-Indvar-LCSSA-Crash.ll
new file mode 100644
index 0000000..36ec2b8
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2006-06-16-Indvar-LCSSA-Crash.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -indvars -disable-output
+
+define void @get_block() {
+endif.0:
+ br label %no_exit.30
+
+no_exit.30: ; preds = %no_exit.30, %endif.0
+ %x.12.0 = phi i32 [ %inc.28, %no_exit.30 ], [ -2, %endif.0 ] ; <i32> [#uses=1]
+ %tmp.583 = load i16* null ; <i16> [#uses=1]
+ %tmp.584 = zext i16 %tmp.583 to i32 ; <i32> [#uses=1]
+ %tmp.588 = load i32* null ; <i32> [#uses=1]
+ %tmp.589 = mul i32 %tmp.584, %tmp.588 ; <i32> [#uses=1]
+ %tmp.591 = add i32 %tmp.589, 0 ; <i32> [#uses=1]
+ %inc.28 = add i32 %x.12.0, 1 ; <i32> [#uses=2]
+ %tmp.565 = icmp sgt i32 %inc.28, 3 ; <i1> [#uses=1]
+ br i1 %tmp.565, label %loopexit.30, label %no_exit.30
+
+loopexit.30: ; preds = %no_exit.30
+ %tmp.591.lcssa = phi i32 [ %tmp.591, %no_exit.30 ] ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/IndVarSimplify/2006-09-20-LFTR-Crash.ll b/test/Transforms/IndVarSimplify/2006-09-20-LFTR-Crash.ll
new file mode 100644
index 0000000..787c9b0
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2006-09-20-LFTR-Crash.ll
@@ -0,0 +1,44 @@
+; RUN: opt < %s -indvars -disable-output
+; ModuleID = '2006-09-20-LFTR-Crash.ll'
+ %struct.p7prior_s = type { i32, i32, [200 x float], [200 x [7 x float]], i32, [200 x float], [200 x [20 x float]], i32, [200 x float], [200 x [20 x float]] }
+
+define void @P7DefaultPrior() {
+entry:
+ switch i32 0, label %UnifiedReturnBlock [
+ i32 2, label %bb160
+ i32 3, label %bb
+ ]
+
+bb: ; preds = %entry
+ br i1 false, label %cond_true.i, label %sre_malloc.exit
+
+cond_true.i: ; preds = %bb
+ unreachable
+
+sre_malloc.exit: ; preds = %bb
+ br label %cond_true
+
+cond_true: ; preds = %cond_true66, %cond_true, %sre_malloc.exit
+ %tmp59 = phi i32 [ 1, %sre_malloc.exit ], [ %phitmp, %cond_true66 ], [ %tmp59, %cond_true ] ; <i32> [#uses=2]
+ %indvar245.0.ph = phi i32 [ 0, %sre_malloc.exit ], [ %indvar.next246, %cond_true66 ], [ %indvar245.0.ph, %cond_true ] ; <i32> [#uses=2]
+ br i1 false, label %bb57, label %cond_true
+
+bb57: ; preds = %cond_true
+ %tmp65 = icmp sgt i32 0, %tmp59 ; <i1> [#uses=1]
+ %indvar.next246 = add i32 %indvar245.0.ph, 1 ; <i32> [#uses=2]
+ br i1 %tmp65, label %cond_true66, label %bb69
+
+cond_true66: ; preds = %bb57
+ %q.1.0 = bitcast i32 %indvar.next246 to i32 ; <i32> [#uses=1]
+ %phitmp = add i32 %q.1.0, 1 ; <i32> [#uses=1]
+ br label %cond_true
+
+bb69: ; preds = %bb57
+ ret void
+
+bb160: ; preds = %entry
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll b/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
new file mode 100644
index 0000000..79ac1f0
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -indvars -disable-output
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8"
+ %struct.vorbis_dsp_state = type { i32, %struct.vorbis_info*, float**, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
+ %struct.vorbis_info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
+
+define void @_ve_envelope_search() {
+entry:
+ br i1 false, label %cond_true27, label %bb137
+
+cond_true27: ; preds = %entry
+ br i1 false, label %cond_true52, label %bb80
+
+cond_true52: ; preds = %cond_true27
+ %tmp152.i = bitcast float 0.000000e+00 to i32 ; <i32> [#uses=1]
+ br label %cond_next182.i
+
+cond_next182.i: ; preds = %cond_next182.i, %cond_true52
+ %decay.i.0 = phi i32 [ %tmp195.i.upgrd.1, %cond_next182.i ], [ %tmp152.i, %cond_true52 ] ; <i32> [#uses=1]
+ %tmp194.i53 = bitcast i32 %decay.i.0 to float ; <float> [#uses=1]
+ %tmp195.i = fsub float %tmp194.i53, 8.000000e+00 ; <float> [#uses=1]
+ %tmp195.i.upgrd.1 = bitcast float %tmp195.i to i32 ; <i32> [#uses=1]
+ br i1 false, label %cond_next182.i, label %bb418.i.preheader
+
+bb418.i.preheader: ; preds = %cond_next182.i
+ ret void
+
+bb80: ; preds = %cond_true27
+ ret void
+
+bb137: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/2007-01-06-TripCount.ll b/test/Transforms/IndVarSimplify/2007-01-06-TripCount.ll
new file mode 100644
index 0000000..268b8d1
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2007-01-06-TripCount.ll
@@ -0,0 +1,38 @@
+; PR1015
+; RUN: opt < %s -indvars -S | not grep {ret i32 0}
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8"
+@foo = internal constant [5 x i8] c"\00abc\00" ; <[5 x i8]*> [#uses=1]
+@str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+
+define i32 @test(i32 %J) {
+entry:
+ br label %bb2
+
+bb: ; preds = %cond_next, %cond_true
+ %tmp1 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %tmp1, %bb ] ; <i32> [#uses=4]
+ %tmp = icmp eq i32 %i.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true, label %cond_next
+
+cond_true: ; preds = %bb2
+ br label %bb
+
+cond_next: ; preds = %bb2
+ %tmp2 = getelementptr [5 x i8]* @foo, i32 0, i32 %i.0 ; <i8*> [#uses=1]
+ %tmp3 = load i8* %tmp2 ; <i8> [#uses=1]
+ %tmp5 = icmp eq i8 %tmp3, 0 ; <i1> [#uses=1]
+ br i1 %tmp5, label %bb6, label %bb
+
+bb6: ; preds = %cond_next
+ br label %return
+
+return: ; preds = %bb6
+ ret i32 %i.0
+}
+
diff --git a/test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll b/test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll
new file mode 100644
index 0000000..fc7d633
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll
@@ -0,0 +1,117 @@
+; RUN: opt < %s -indvars -disable-output
+; PR1487
+
+ %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+ %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVCodecTag*, i32* }
+ %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVCodecTag, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVCodecTag, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
+ %struct.AVCodecTag = type { i32, i32 }
+ %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+ %struct.AVOption = type { i8*, i8*, i32, i32, double, double, double, i32, i8* }
+ %struct.AVPaletteControl = type { i32, [256 x i32] }
+ %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+ %struct.RcOverride = type { i32, i32, i32, float }
+
+define i32 @smc_decode_frame(%struct.AVCodecContext* %avctx, i8* %data, i32* %data_size, i8* %buf, i32 %buf_size) {
+entry:
+ br i1 false, label %cond_next, label %cond_true
+
+cond_true: ; preds = %entry
+ ret i32 -1
+
+cond_next: ; preds = %entry
+ br i1 false, label %bb.outer5.split.split.split.us, label %cond_true194.split
+
+bb.outer5.split.split.split.us: ; preds = %cond_next
+ br i1 false, label %cond_next188.us503.us, label %bb.us481
+
+bb275.us493.us: ; preds = %cond_next188.us503.us, %cond_next188.us503.us
+ ret i32 0
+
+cond_next188.us503.us: ; preds = %bb.outer5.split.split.split.us
+ switch i32 0, label %bb1401 [
+ i32 0, label %cond_next202.bb215_crit_edge.split
+ i32 16, label %bb215
+ i32 32, label %bb275.us493.us
+ i32 48, label %bb275.us493.us
+ i32 64, label %cond_next202.bb417_crit_edge.split
+ i32 80, label %bb417
+ i32 96, label %cond_next202.bb615_crit_edge.split
+ i32 112, label %bb615
+ i32 128, label %cond_next202.bb716_crit_edge.split
+ i32 144, label %bb716
+ i32 160, label %cond_next202.bb882_crit_edge.split
+ i32 176, label %bb882
+ i32 192, label %cond_next202.bb1062_crit_edge.split
+ i32 208, label %bb1062
+ i32 224, label %bb1326.us.outer.outer
+ ]
+
+bb.us481: ; preds = %bb.outer5.split.split.split.us
+ ret i32 0
+
+cond_true194.split: ; preds = %cond_next
+ ret i32 %buf_size
+
+cond_next202.bb1062_crit_edge.split: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+cond_next202.bb882_crit_edge.split: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+cond_next202.bb716_crit_edge.split: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+cond_next202.bb615_crit_edge.split: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+cond_next202.bb417_crit_edge.split: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+cond_next202.bb215_crit_edge.split: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+bb215: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+bb417: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+bb615: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+bb716: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+bb882: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+bb1062: ; preds = %cond_next188.us503.us
+ ret i32 0
+
+bb1326.us: ; preds = %bb1326.us.outer.outer, %bb1347.loopexit.us, %bb1326.us
+ %pixel_y.162036.us.ph = phi i32 [ %tmp1352.us, %bb1347.loopexit.us ], [ 0, %bb1326.us.outer.outer ], [ %pixel_y.162036.us.ph, %bb1326.us ] ; <i32> [#uses=2]
+ %stream_ptr.142038.us.ph = phi i32 [ %tmp1339.us, %bb1347.loopexit.us ], [ %stream_ptr.142038.us.ph.ph, %bb1326.us.outer.outer ], [ %stream_ptr.142038.us.ph, %bb1326.us ] ; <i32> [#uses=2]
+ %pixel_x.232031.us = phi i32 [ %tmp1341.us, %bb1326.us ], [ 0, %bb1326.us.outer.outer ], [ 0, %bb1347.loopexit.us ] ; <i32> [#uses=3]
+ %block_ptr.222030.us = add i32 0, %pixel_x.232031.us ; <i32> [#uses=1]
+ %stream_ptr.132032.us = add i32 %pixel_x.232031.us, %stream_ptr.142038.us.ph ; <i32> [#uses=1]
+ %tmp1341.us = add i32 %pixel_x.232031.us, 1 ; <i32> [#uses=2]
+ %tmp1344.us = icmp slt i32 %tmp1341.us, 4 ; <i1> [#uses=1]
+ br i1 %tmp1344.us, label %bb1326.us, label %bb1347.loopexit.us
+
+bb1347.loopexit.us: ; preds = %bb1326.us
+ %tmp1339.us = add i32 %stream_ptr.132032.us, 1 ; <i32> [#uses=2]
+ %tmp1337.us = add i32 %block_ptr.222030.us, 1 ; <i32> [#uses=0]
+ %tmp1352.us = add i32 %pixel_y.162036.us.ph, 1 ; <i32> [#uses=2]
+ %tmp1355.us = icmp slt i32 %tmp1352.us, 4 ; <i1> [#uses=1]
+ br i1 %tmp1355.us, label %bb1326.us, label %bb1358
+
+bb1358: ; preds = %bb1347.loopexit.us
+ br label %bb1326.us.outer.outer
+
+bb1326.us.outer.outer: ; preds = %bb1358, %cond_next188.us503.us
+ %stream_ptr.142038.us.ph.ph = phi i32 [ %tmp1339.us, %bb1358 ], [ 0, %cond_next188.us503.us ] ; <i32> [#uses=1]
+ br label %bb1326.us
+
+bb1401: ; preds = %cond_next188.us503.us
+ ret i32 0
+}
diff --git a/test/Transforms/IndVarSimplify/2007-11-23-BitcastCrash.ll b/test/Transforms/IndVarSimplify/2007-11-23-BitcastCrash.ll
new file mode 100644
index 0000000..cad4eb1
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2007-11-23-BitcastCrash.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -indvars -disable-output
+; PR1814
+target datalayout = "e-p:32:32-f64:32:64-i64:32:64-f80:32:32"
+
+define void @FuncAt1938470480(i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i1, i1, i1, i1, i1, i1) {
+EntryBlock:
+ br label %asmBlockAt738ab7f3
+
+asmBlockAt738ab9b0: ; preds = %asmBlockAt738ab7f3
+ %.lcssa6 = phi i64 [ %23, %asmBlockAt738ab7f3 ] ; <i64> [#uses=0]
+ ret void
+
+asmBlockAt738ab7f3: ; preds = %asmBlockAt738ab7f3, %EntryBlock
+ %ebp95 = phi i32 [ 128, %EntryBlock ], [ %24, %asmBlockAt738ab7f3 ] ; <i32> [#uses=2]
+ sub <4 x i16> zeroinitializer, zeroinitializer ; <<4 x i16>>:22 [#uses=1]
+ bitcast <4 x i16> %22 to i64 ; <i64>:23 [#uses=1]
+ add i32 %ebp95, -64 ; <i32>:24 [#uses=1]
+ icmp ult i32 %ebp95, 64 ; <i1>:25 [#uses=1]
+ br i1 %25, label %asmBlockAt738ab9b0, label %asmBlockAt738ab7f3
+}
diff --git a/test/Transforms/IndVarSimplify/2008-06-15-SCEVExpanderBug.ll b/test/Transforms/IndVarSimplify/2008-06-15-SCEVExpanderBug.ll
new file mode 100644
index 0000000..77235d2
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2008-06-15-SCEVExpanderBug.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -indvars -disable-output
+; PR2434
+
+define fastcc void @regcppop() nounwind {
+entry:
+ %tmp61 = add i32 0, -5 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %PL_savestack_ix.tmp.0 = phi i32 [ %tmp61, %entry ], [ %tmp127, %bb ] ; <i32> [#uses=2]
+ %indvar10 = phi i32 [ 0, %entry ], [ %indvar.next11, %bb ] ; <i32> [#uses=2]
+ %tmp13 = mul i32 %indvar10, -4 ; <i32> [#uses=0]
+ %tmp111 = add i32 %PL_savestack_ix.tmp.0, -3 ; <i32> [#uses=0]
+ %tmp127 = add i32 %PL_savestack_ix.tmp.0, -4 ; <i32> [#uses=1]
+ %indvar.next11 = add i32 %indvar10, 1 ; <i32> [#uses=1]
+ br label %bb
+}
diff --git a/test/Transforms/IndVarSimplify/2008-09-02-IVType.ll b/test/Transforms/IndVarSimplify/2008-09-02-IVType.ll
new file mode 100644
index 0000000..288431a
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2008-09-02-IVType.ll
@@ -0,0 +1,58 @@
+; RUN: opt < %s -indvars -S | grep sext | count 1
+; ModuleID = '<stdin>'
+
+ %struct.App1Marker = type <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }>
+ %struct.ComponentInstanceRecord = type <{ [1 x i32] }>
+ %struct.DCPredictors = type { [5 x i16] }
+ %struct.DecodeTable = type { i16, i16, i16, i16, i8**, i8** }
+ %struct.ICMDataProcRecord = type <{ i16 (i8**, i32, i32)*, i32 }>
+ %struct.JPEGBitStream = type { i8*, i32, i32, i32, i32, i32, %struct.App1Marker*, i8*, i32, i16, i16, i32 }
+ %struct.JPEGGlobals = type { [2048 x i8], %struct.JPEGBitStream, i8*, i32, i32, %struct.ComponentInstanceRecord*, %struct.ComponentInstanceRecord*, i32, %struct.OpaqueQTMLMutex*, %struct.Rect, i32, i32, %struct.SharedGlobals, %struct.DCPredictors, i8, i8, void (i8*, i16**, i32, %struct.YUVGeneralParams*)*, %struct.YUVGeneralParams, i16, i16, i32, [5 x i16*], [5 x %struct.DecodeTable*], [5 x %struct.DecodeTable*], [5 x i8], [5 x i8], [4 x [65 x i16]], [4 x %struct.DecodeTable], [4 x %struct.DecodeTable], [4 x i8*], [4 x i8*], i16, i16, i32, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, [18 x i8], [18 x i8], [18 x i8], [18 x i8], i32, i32, i8**, i8**, i8, i8, i8, i8, i16, i16, %struct.App1Marker*, i8, i8, i8, i8, i32**, i8*, i16*, i8*, i16*, i8, [3 x i8], i32, [3 x i32], [3 x i32], [3 x i32], [3 x i32], [3 x i32], [3 x i16*], [3 x i16*], [3 x i8**], [3 x %struct.DecodeTable*], [3 x %struct.DecodeTable*], [3 x i32], i32, [3 x i16*], i32, i32, i32, [3 x i32], i8, i8, i8, i8, %struct.ICMDataProcRecord*, i32, i32, i8**, i8**, i8**, i8**, i32, i32, i8*, i32, i32, i16*, i16*, i8*, i32, i32, i32, i32, i32, i32, i32, [16 x <2 x i64>], [1280 x i8], i8 }
+ %struct.OpaqueQTMLMutex = type opaque
+ %struct.Rect = type { i16, i16, i16, i16 }
+ %struct.SharedDGlobals = type { %struct.DecodeTable, %struct.DecodeTable, %struct.DecodeTable, %struct.DecodeTable }
+ %struct.SharedEGlobals = type { i8**, i8**, i8**, i8** }
+ %struct.SharedGlobals = type { %struct.SharedEGlobals*, %struct.SharedDGlobals* }
+ %struct.YUVGeneralParams = type { i16*, i8*, i8*, i8*, i8*, i8*, void (i8*, i16**, i32, %struct.YUVGeneralParams*)*, i16, i16, i16, [6 x i8], void (i8*, i16**, i32, %struct.YUVGeneralParams*)*, i16, i16 }
[email protected] = appending global [1 x i8*] [ i8* bitcast (i16 (%struct.JPEGGlobals*)* @ExtractBufferedBlocksIgnored to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i16 @ExtractBufferedBlocksIgnored(%struct.JPEGGlobals* %globp) signext nounwind {
+entry:
+ %tmp4311 = getelementptr %struct.JPEGGlobals* %globp, i32 0, i32 70 ; <i32*> [#uses=1]
+ %tmp4412 = load i32* %tmp4311, align 16 ; <i32> [#uses=2]
+ %tmp4613 = icmp sgt i32 %tmp4412, 0 ; <i1> [#uses=1]
+ br i1 %tmp4613, label %bb, label %bb49
+
+bb: ; preds = %bb28, %entry
+ %component.09 = phi i16 [ 0, %entry ], [ %tmp37, %bb28 ] ; <i16> [#uses=2]
+ %tmp12 = sext i16 %component.09 to i32 ; <i32> [#uses=2]
+ %tmp6 = getelementptr %struct.JPEGGlobals* %globp, i32 0, i32 77, i32 %tmp12 ; <i16**> [#uses=2]
+ %tmp7 = load i16** %tmp6, align 4 ; <i16*> [#uses=2]
+ %tmp235 = getelementptr %struct.JPEGGlobals* %globp, i32 0, i32 71, i32 %tmp12 ; <i32*> [#uses=1]
+ %tmp246 = load i32* %tmp235, align 4 ; <i32> [#uses=2]
+ %tmp267 = icmp sgt i32 %tmp246, 0 ; <i1> [#uses=1]
+ br i1 %tmp267, label %bb8, label %bb28
+
+bb8: ; preds = %bb8, %bb
+ %indvar = phi i32 [ 0, %bb ], [ %indvar.next2, %bb8 ] ; <i32> [#uses=3]
+ %theDCTBufferIter.01.rec = shl i32 %indvar, 6 ; <i32> [#uses=1]
+ %tmp10.rec = add i32 %theDCTBufferIter.01.rec, 64 ; <i32> [#uses=1]
+ %tmp10 = getelementptr i16* %tmp7, i32 %tmp10.rec ; <i16*> [#uses=1]
+ %i.02 = trunc i32 %indvar to i16 ; <i16> [#uses=1]
+ %tmp13 = add i16 %i.02, 1 ; <i16> [#uses=1]
+ %phitmp = sext i16 %tmp13 to i32 ; <i32> [#uses=1]
+ %tmp26 = icmp slt i32 %phitmp, %tmp246 ; <i1> [#uses=1]
+ %indvar.next2 = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp26, label %bb8, label %bb28
+
+bb28: ; preds = %bb8, %bb
+ %theDCTBufferIter.0.lcssa = phi i16* [ %tmp7, %bb ], [ %tmp10, %bb8 ] ; <i16*> [#uses=1]
+ store i16* %theDCTBufferIter.0.lcssa, i16** %tmp6, align 4
+ %tmp37 = add i16 %component.09, 1 ; <i16> [#uses=2]
+ %phitmp15 = sext i16 %tmp37 to i32 ; <i32> [#uses=1]
+ %tmp46 = icmp slt i32 %phitmp15, 42 ; <i1> [#uses=1]
+ br i1 %tmp46, label %bb, label %bb49
+
+bb49: ; preds = %bb28, %entry
+ ret i16 0
+}
diff --git a/test/Transforms/IndVarSimplify/2008-10-03-CouldNotCompute.ll b/test/Transforms/IndVarSimplify/2008-10-03-CouldNotCompute.ll
new file mode 100644
index 0000000..23e7884
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2008-10-03-CouldNotCompute.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -indvars
+; PR2857
+
+@foo = external global i32 ; <i32*> [#uses=1]
+
+define void @test(i32 %n, i32 %arg) {
+entry:
+ br i1 false, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ %0 = load i32* @foo, align 4 ; <i32> [#uses=1]
+ %1 = sext i32 %0 to i64 ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %.in = phi i32 [ %2, %bb ], [ %n, %bb.nph ] ; <i32> [#uses=1]
+ %val.02 = phi i64 [ %5, %bb ], [ 0, %bb.nph ] ; <i64> [#uses=2]
+ %result.01 = phi i64 [ %4, %bb ], [ 0, %bb.nph ] ; <i64> [#uses=1]
+ %2 = add i32 %.in, -1 ; <i32> [#uses=2]
+ %3 = mul i64 %1, %val.02 ; <i64> [#uses=1]
+ %4 = add i64 %3, %result.01 ; <i64> [#uses=2]
+ %5 = add i64 %val.02, 1 ; <i64> [#uses=1]
+ %6 = icmp sgt i32 %2, 0 ; <i1> [#uses=1]
+ br i1 %6, label %bb, label %bb3.bb4_crit_edge
+
+bb3.bb4_crit_edge: ; preds = %bb
+ %.lcssa = phi i64 [ %4, %bb ] ; <i64> [#uses=0]
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll b/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll
new file mode 100644
index 0000000..7b4032b
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll
@@ -0,0 +1,65 @@
+; RUN: opt < %s -indvars -S | grep icmp | count 4
+define void @bar() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
+ %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
+ %1 = fadd double %x.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=2]
+ %2 = fcmp olt double %1, 1.000000e+04 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
+
+declare i32 @foo(double)
+
+define void @bar2() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %x.0.reg2mem.0 = phi double [ -10.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
+ %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
+ %1 = fadd double %x.0.reg2mem.0, 2.000000e+00 ; <double> [#uses=2]
+ %2 = fcmp olt double %1, -1.000000e+00 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
+
+
+define void @bar3() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
+ %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
+ %1 = fadd double %x.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=2]
+ %2 = fcmp olt double %1, -1.000000e+00 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @bar4() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %x.0.reg2mem.0 = phi double [ 40.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
+ %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
+ %1 = fadd double %x.0.reg2mem.0, -1.000000e+00 ; <double> [#uses=2]
+ %2 = fcmp olt double %1, 1.000000e+00 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
+
+
diff --git a/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll b/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll
new file mode 100644
index 0000000..311d3da
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -indvars -S | grep icmp | count 2
+; RUN: opt < %s -indvars -S | grep sitofp | count 1
+; RUN: opt < %s -indvars -S | grep uitofp | count 1
+
+define void @bar() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
+ %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
+ %1 = fadd double %x.0.reg2mem.0, 1.0e+0 ; <double> [#uses=2]
+ %2 = fcmp olt double %1, 2147483646.0e+0 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @bar1() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
+ %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
+ %1 = fadd double %x.0.reg2mem.0, 1.0e+0 ; <double> [#uses=2]
+ %2 = fcmp olt double %1, 2147483647.0e+0 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
+
+declare i32 @foo(double)
diff --git a/test/Transforms/IndVarSimplify/2008-11-25-APFloatAssert.ll b/test/Transforms/IndVarSimplify/2008-11-25-APFloatAssert.ll
new file mode 100644
index 0000000..39b97af
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2008-11-25-APFloatAssert.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -indvars
+
+define void @t() nounwind {
+entry:
+ br label %bb23.i91
+
+bb23.i91: ; preds = %bb23.i91, %entry
+ %result.0.i89 = phi ppc_fp128 [ 0xM00000000000000000000000000000000, %entry ], [ %0, %bb23.i91 ] ; <ppc_fp128> [#uses=2]
+ %0 = fmul ppc_fp128 %result.0.i89, %result.0.i89 ; <ppc_fp128> [#uses=1]
+ br label %bb23.i91
+}
diff --git a/test/Transforms/IndVarSimplify/2009-04-14-shorten_iv_vars.ll b/test/Transforms/IndVarSimplify/2009-04-14-shorten_iv_vars.ll
new file mode 100644
index 0000000..37ad63a
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2009-04-14-shorten_iv_vars.ll
@@ -0,0 +1,114 @@
+; RUN: opt < %s -indvars -S | not grep {sext}
+; ModuleID = '<stdin>'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.6"
+@a = external global i32* ; <i32**> [#uses=3]
+@b = external global i32* ; <i32**> [#uses=3]
+@c = external global i32* ; <i32**> [#uses=3]
+@d = external global i32* ; <i32**> [#uses=3]
+@e = external global i32* ; <i32**> [#uses=3]
+@f = external global i32* ; <i32**> [#uses=3]
+
+define void @foo() nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %84, %bb1 ] ; <i32> [#uses=19]
+ %0 = load i32** @a, align 8 ; <i32*> [#uses=1]
+ %1 = load i32** @b, align 8 ; <i32*> [#uses=1]
+ %2 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr i32* %1, i64 %2 ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 1 ; <i32> [#uses=1]
+ %5 = load i32** @c, align 8 ; <i32*> [#uses=1]
+ %6 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
+ %7 = getelementptr i32* %5, i64 %6 ; <i32*> [#uses=1]
+ %8 = load i32* %7, align 1 ; <i32> [#uses=1]
+ %9 = add i32 %8, %4 ; <i32> [#uses=1]
+ %10 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
+ %11 = getelementptr i32* %0, i64 %10 ; <i32*> [#uses=1]
+ store i32 %9, i32* %11, align 1
+ %12 = load i32** @a, align 8 ; <i32*> [#uses=1]
+ %13 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %14 = load i32** @b, align 8 ; <i32*> [#uses=1]
+ %15 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %16 = sext i32 %15 to i64 ; <i64> [#uses=1]
+ %17 = getelementptr i32* %14, i64 %16 ; <i32*> [#uses=1]
+ %18 = load i32* %17, align 1 ; <i32> [#uses=1]
+ %19 = load i32** @c, align 8 ; <i32*> [#uses=1]
+ %20 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %21 = sext i32 %20 to i64 ; <i64> [#uses=1]
+ %22 = getelementptr i32* %19, i64 %21 ; <i32*> [#uses=1]
+ %23 = load i32* %22, align 1 ; <i32> [#uses=1]
+ %24 = add i32 %23, %18 ; <i32> [#uses=1]
+ %25 = sext i32 %13 to i64 ; <i64> [#uses=1]
+ %26 = getelementptr i32* %12, i64 %25 ; <i32*> [#uses=1]
+ store i32 %24, i32* %26, align 1
+ %27 = load i32** @a, align 8 ; <i32*> [#uses=1]
+ %28 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %29 = load i32** @b, align 8 ; <i32*> [#uses=1]
+ %30 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %31 = sext i32 %30 to i64 ; <i64> [#uses=1]
+ %32 = getelementptr i32* %29, i64 %31 ; <i32*> [#uses=1]
+ %33 = load i32* %32, align 1 ; <i32> [#uses=1]
+ %34 = load i32** @c, align 8 ; <i32*> [#uses=1]
+ %35 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %36 = sext i32 %35 to i64 ; <i64> [#uses=1]
+ %37 = getelementptr i32* %34, i64 %36 ; <i32*> [#uses=1]
+ %38 = load i32* %37, align 1 ; <i32> [#uses=1]
+ %39 = add i32 %38, %33 ; <i32> [#uses=1]
+ %40 = sext i32 %28 to i64 ; <i64> [#uses=1]
+ %41 = getelementptr i32* %27, i64 %40 ; <i32*> [#uses=1]
+ store i32 %39, i32* %41, align 1
+ %42 = load i32** @d, align 8 ; <i32*> [#uses=1]
+ %43 = load i32** @e, align 8 ; <i32*> [#uses=1]
+ %44 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
+ %45 = getelementptr i32* %43, i64 %44 ; <i32*> [#uses=1]
+ %46 = load i32* %45, align 1 ; <i32> [#uses=1]
+ %47 = load i32** @f, align 8 ; <i32*> [#uses=1]
+ %48 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
+ %49 = getelementptr i32* %47, i64 %48 ; <i32*> [#uses=1]
+ %50 = load i32* %49, align 1 ; <i32> [#uses=1]
+ %51 = add i32 %50, %46 ; <i32> [#uses=1]
+ %52 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
+ %53 = getelementptr i32* %42, i64 %52 ; <i32*> [#uses=1]
+ store i32 %51, i32* %53, align 1
+ %54 = load i32** @d, align 8 ; <i32*> [#uses=1]
+ %55 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %56 = load i32** @e, align 8 ; <i32*> [#uses=1]
+ %57 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %58 = sext i32 %57 to i64 ; <i64> [#uses=1]
+ %59 = getelementptr i32* %56, i64 %58 ; <i32*> [#uses=1]
+ %60 = load i32* %59, align 1 ; <i32> [#uses=1]
+ %61 = load i32** @f, align 8 ; <i32*> [#uses=1]
+ %62 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %63 = sext i32 %62 to i64 ; <i64> [#uses=1]
+ %64 = getelementptr i32* %61, i64 %63 ; <i32*> [#uses=1]
+ %65 = load i32* %64, align 1 ; <i32> [#uses=1]
+ %66 = add i32 %65, %60 ; <i32> [#uses=1]
+ %67 = sext i32 %55 to i64 ; <i64> [#uses=1]
+ %68 = getelementptr i32* %54, i64 %67 ; <i32*> [#uses=1]
+ store i32 %66, i32* %68, align 1
+ %69 = load i32** @d, align 8 ; <i32*> [#uses=1]
+ %70 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %71 = load i32** @e, align 8 ; <i32*> [#uses=1]
+ %72 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %73 = sext i32 %72 to i64 ; <i64> [#uses=1]
+ %74 = getelementptr i32* %71, i64 %73 ; <i32*> [#uses=1]
+ %75 = load i32* %74, align 1 ; <i32> [#uses=1]
+ %76 = load i32** @f, align 8 ; <i32*> [#uses=1]
+ %77 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %78 = sext i32 %77 to i64 ; <i64> [#uses=1]
+ %79 = getelementptr i32* %76, i64 %78 ; <i32*> [#uses=1]
+ %80 = load i32* %79, align 1 ; <i32> [#uses=1]
+ %81 = add i32 %80, %75 ; <i32> [#uses=1]
+ %82 = sext i32 %70 to i64 ; <i64> [#uses=1]
+ %83 = getelementptr i32* %69, i64 %82 ; <i32*> [#uses=1]
+ store i32 %81, i32* %83, align 1
+ %84 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %85 = icmp sgt i32 %84, 23646 ; <i1> [#uses=1]
+ br i1 %85, label %return, label %bb1
+
+return: ; preds = %bb1
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/2009-04-15-shorten-iv-vars-2.ll b/test/Transforms/IndVarSimplify/2009-04-15-shorten-iv-vars-2.ll
new file mode 100644
index 0000000..803b540
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2009-04-15-shorten-iv-vars-2.ll
@@ -0,0 +1,160 @@
+; RUN: opt < %s -indvars -instcombine -S | not grep {\[sz\]ext}
+; ModuleID = '<stdin>'
+;extern int *a, *b, *c, *d, *e, *f; /* 64 bit */
+;extern int K[256];
+;void foo () {
+; int i;
+; for (i=0; i<23647; i++) {
+; a[(i&15)] = b[i&15]+c[i&15];
+; a[(i+1)&15] = b[(i+1)&15]+c[(i+1)&15];
+; a[(i+2)&15] = b[(i+2)&15]+c[(i+2)&15];
+; d[i&15] = e[i&15]+f[i&15] +K[i];
+; d[(i+1)&15] = e[(i+1)&15]+f[(i+1)&15]+K[i+1];
+; d[(i+2)&15] = e[(i+2)&15]+f[(i+2)&15]+K[i+2];
+; }
+;}
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.6"
+@a = external global i32* ; <i32**> [#uses=3]
+@b = external global i32* ; <i32**> [#uses=3]
+@c = external global i32* ; <i32**> [#uses=3]
+@d = external global i32* ; <i32**> [#uses=3]
+@e = external global i32* ; <i32**> [#uses=3]
+@f = external global i32* ; <i32**> [#uses=3]
+@K = external global [256 x i32] ; <[256 x i32]*> [#uses=3]
+
+define void @foo() nounwind {
+bb1.thread:
+ br label %bb1
+
+bb1: ; preds = %bb1, %bb1.thread
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %116, %bb1 ] ; <i32> [#uses=22]
+ %0 = load i32** @a, align 8 ; <i32*> [#uses=1]
+ %1 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
+ %2 = load i32** @b, align 8 ; <i32*> [#uses=1]
+ %3 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
+ %4 = zext i32 %3 to i64 ; <i64> [#uses=1]
+ %5 = getelementptr i32* %2, i64 %4 ; <i32*> [#uses=1]
+ %6 = load i32* %5, align 1 ; <i32> [#uses=1]
+ %7 = load i32** @c, align 8 ; <i32*> [#uses=1]
+ %8 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
+ %9 = zext i32 %8 to i64 ; <i64> [#uses=1]
+ %10 = getelementptr i32* %7, i64 %9 ; <i32*> [#uses=1]
+ %11 = load i32* %10, align 1 ; <i32> [#uses=1]
+ %12 = add i32 %11, %6 ; <i32> [#uses=1]
+ %13 = zext i32 %1 to i64 ; <i64> [#uses=1]
+ %14 = getelementptr i32* %0, i64 %13 ; <i32*> [#uses=1]
+ store i32 %12, i32* %14, align 1
+ %15 = load i32** @a, align 8 ; <i32*> [#uses=1]
+ %16 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %17 = and i32 %16, 15 ; <i32> [#uses=1]
+ %18 = load i32** @b, align 8 ; <i32*> [#uses=1]
+ %19 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %20 = and i32 %19, 15 ; <i32> [#uses=1]
+ %21 = zext i32 %20 to i64 ; <i64> [#uses=1]
+ %22 = getelementptr i32* %18, i64 %21 ; <i32*> [#uses=1]
+ %23 = load i32* %22, align 1 ; <i32> [#uses=1]
+ %24 = load i32** @c, align 8 ; <i32*> [#uses=1]
+ %25 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %26 = and i32 %25, 15 ; <i32> [#uses=1]
+ %27 = zext i32 %26 to i64 ; <i64> [#uses=1]
+ %28 = getelementptr i32* %24, i64 %27 ; <i32*> [#uses=1]
+ %29 = load i32* %28, align 1 ; <i32> [#uses=1]
+ %30 = add i32 %29, %23 ; <i32> [#uses=1]
+ %31 = zext i32 %17 to i64 ; <i64> [#uses=1]
+ %32 = getelementptr i32* %15, i64 %31 ; <i32*> [#uses=1]
+ store i32 %30, i32* %32, align 1
+ %33 = load i32** @a, align 8 ; <i32*> [#uses=1]
+ %34 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %35 = and i32 %34, 15 ; <i32> [#uses=1]
+ %36 = load i32** @b, align 8 ; <i32*> [#uses=1]
+ %37 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %38 = and i32 %37, 15 ; <i32> [#uses=1]
+ %39 = zext i32 %38 to i64 ; <i64> [#uses=1]
+ %40 = getelementptr i32* %36, i64 %39 ; <i32*> [#uses=1]
+ %41 = load i32* %40, align 1 ; <i32> [#uses=1]
+ %42 = load i32** @c, align 8 ; <i32*> [#uses=1]
+ %43 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %44 = and i32 %43, 15 ; <i32> [#uses=1]
+ %45 = zext i32 %44 to i64 ; <i64> [#uses=1]
+ %46 = getelementptr i32* %42, i64 %45 ; <i32*> [#uses=1]
+ %47 = load i32* %46, align 1 ; <i32> [#uses=1]
+ %48 = add i32 %47, %41 ; <i32> [#uses=1]
+ %49 = zext i32 %35 to i64 ; <i64> [#uses=1]
+ %50 = getelementptr i32* %33, i64 %49 ; <i32*> [#uses=1]
+ store i32 %48, i32* %50, align 1
+ %51 = load i32** @d, align 8 ; <i32*> [#uses=1]
+ %52 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
+ %53 = load i32** @e, align 8 ; <i32*> [#uses=1]
+ %54 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
+ %55 = zext i32 %54 to i64 ; <i64> [#uses=1]
+ %56 = getelementptr i32* %53, i64 %55 ; <i32*> [#uses=1]
+ %57 = load i32* %56, align 1 ; <i32> [#uses=1]
+ %58 = load i32** @f, align 8 ; <i32*> [#uses=1]
+ %59 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
+ %60 = zext i32 %59 to i64 ; <i64> [#uses=1]
+ %61 = getelementptr i32* %58, i64 %60 ; <i32*> [#uses=1]
+ %62 = load i32* %61, align 1 ; <i32> [#uses=1]
+ %63 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
+ %64 = getelementptr [256 x i32]* @K, i64 0, i64 %63 ; <i32*> [#uses=1]
+ %65 = load i32* %64, align 4 ; <i32> [#uses=1]
+ %66 = add i32 %62, %57 ; <i32> [#uses=1]
+ %67 = add i32 %66, %65 ; <i32> [#uses=1]
+ %68 = zext i32 %52 to i64 ; <i64> [#uses=1]
+ %69 = getelementptr i32* %51, i64 %68 ; <i32*> [#uses=1]
+ store i32 %67, i32* %69, align 1
+ %70 = load i32** @d, align 8 ; <i32*> [#uses=1]
+ %71 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %72 = and i32 %71, 15 ; <i32> [#uses=1]
+ %73 = load i32** @e, align 8 ; <i32*> [#uses=1]
+ %74 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %75 = and i32 %74, 15 ; <i32> [#uses=1]
+ %76 = zext i32 %75 to i64 ; <i64> [#uses=1]
+ %77 = getelementptr i32* %73, i64 %76 ; <i32*> [#uses=1]
+ %78 = load i32* %77, align 1 ; <i32> [#uses=1]
+ %79 = load i32** @f, align 8 ; <i32*> [#uses=1]
+ %80 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %81 = and i32 %80, 15 ; <i32> [#uses=1]
+ %82 = zext i32 %81 to i64 ; <i64> [#uses=1]
+ %83 = getelementptr i32* %79, i64 %82 ; <i32*> [#uses=1]
+ %84 = load i32* %83, align 1 ; <i32> [#uses=1]
+ %85 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
+ %86 = sext i32 %85 to i64 ; <i64> [#uses=1]
+ %87 = getelementptr [256 x i32]* @K, i64 0, i64 %86 ; <i32*> [#uses=1]
+ %88 = load i32* %87, align 4 ; <i32> [#uses=1]
+ %89 = add i32 %84, %78 ; <i32> [#uses=1]
+ %90 = add i32 %89, %88 ; <i32> [#uses=1]
+ %91 = zext i32 %72 to i64 ; <i64> [#uses=1]
+ %92 = getelementptr i32* %70, i64 %91 ; <i32*> [#uses=1]
+ store i32 %90, i32* %92, align 1
+ %93 = load i32** @d, align 8 ; <i32*> [#uses=1]
+ %94 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %95 = and i32 %94, 15 ; <i32> [#uses=1]
+ %96 = load i32** @e, align 8 ; <i32*> [#uses=1]
+ %97 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %98 = and i32 %97, 15 ; <i32> [#uses=1]
+ %99 = zext i32 %98 to i64 ; <i64> [#uses=1]
+ %100 = getelementptr i32* %96, i64 %99 ; <i32*> [#uses=1]
+ %101 = load i32* %100, align 1 ; <i32> [#uses=1]
+ %102 = load i32** @f, align 8 ; <i32*> [#uses=1]
+ %103 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %104 = and i32 %103, 15 ; <i32> [#uses=1]
+ %105 = zext i32 %104 to i64 ; <i64> [#uses=1]
+ %106 = getelementptr i32* %102, i64 %105 ; <i32*> [#uses=1]
+ %107 = load i32* %106, align 1 ; <i32> [#uses=1]
+ %108 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %109 = sext i32 %108 to i64 ; <i64> [#uses=1]
+ %110 = getelementptr [256 x i32]* @K, i64 0, i64 %109 ; <i32*> [#uses=1]
+ %111 = load i32* %110, align 4 ; <i32> [#uses=1]
+ %112 = add i32 %107, %101 ; <i32> [#uses=1]
+ %113 = add i32 %112, %111 ; <i32> [#uses=1]
+ %114 = zext i32 %95 to i64 ; <i64> [#uses=1]
+ %115 = getelementptr i32* %93, i64 %114 ; <i32*> [#uses=1]
+ store i32 %113, i32* %115, align 1
+ %116 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %117 = icmp sgt i32 %116, 23646 ; <i1> [#uses=1]
+ br i1 %117, label %return, label %bb1
+
+return: ; preds = %bb1
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/2009-04-22-IndvarCrash.ll b/test/Transforms/IndVarSimplify/2009-04-22-IndvarCrash.ll
new file mode 100644
index 0000000..24074bf
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2009-04-22-IndvarCrash.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -indvars
+; rdar://6817574
+
+define i32 @t1() nounwind ssp {
+entry:
+ br label %bb32
+
+bb32: ; preds = %bb32, %entry
+ %mbPartIdx.0.reg2mem.0 = phi i8 [ %2, %bb32 ], [ 0, %entry ] ; <i8> [#uses=3]
+ %0 = and i8 %mbPartIdx.0.reg2mem.0, 1 ; <i8> [#uses=0]
+ %1 = zext i8 %mbPartIdx.0.reg2mem.0 to i64 ; <i64> [#uses=0]
+ %2 = add i8 %mbPartIdx.0.reg2mem.0, 1 ; <i8> [#uses=2]
+ %3 = icmp ugt i8 %2, 3 ; <i1> [#uses=1]
+ br i1 %3, label %bb41, label %bb32
+
+bb41: ; preds = %bb32
+ ret i32 0
+}
+
+define i32 @t2() nounwind ssp {
+entry:
+ br label %bb116
+
+bb116: ; preds = %bb116, %entry
+ %mbPartIdx.1.reg2mem.0 = phi i8 [ %3, %bb116 ], [ 0, %entry ] ; <i8> [#uses=3]
+ %0 = and i8 %mbPartIdx.1.reg2mem.0, 1 ; <i8> [#uses=1]
+ %1 = zext i8 %mbPartIdx.1.reg2mem.0 to i64 ; <i64> [#uses=0]
+ %2 = zext i8 %0 to i32 ; <i32> [#uses=0]
+ %3 = add i8 %mbPartIdx.1.reg2mem.0, 1 ; <i8> [#uses=2]
+ %4 = icmp ugt i8 %3, 3 ; <i1> [#uses=1]
+ br i1 %4, label %bb131, label %bb116
+
+bb131: ; preds = %bb116
+ unreachable
+}
diff --git a/test/Transforms/IndVarSimplify/2009-04-27-Floating.ll b/test/Transforms/IndVarSimplify/2009-04-27-Floating.ll
new file mode 100644
index 0000000..9fd2d2f
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2009-04-27-Floating.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -indvars -S | grep icmp | grep next
+; PR4086
+declare void @foo()
+
+define void @test() {
+entry:
+ br label %loop_body
+
+loop_body:
+ %i = phi float [ %nexti, %loop_body ], [ 0.0, %entry ]
+ tail call void @foo()
+ %nexti = fadd float %i, 1.0
+ %less = fcmp olt float %nexti, 2.0
+ br i1 %less, label %loop_body, label %done
+
+done:
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/2009-05-24-useafterfree.ll b/test/Transforms/IndVarSimplify/2009-05-24-useafterfree.ll
new file mode 100644
index 0000000..9ad8691
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/2009-05-24-useafterfree.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -indvars
+; PR4258
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-linux-gnu"
+
+define void @0(i32*, i32*, i32, i32) nounwind {
+ br i1 false, label %bb.nph1.preheader, label %.outer._crit_edge
+
+bb.nph1.preheader: ; preds = %4
+ %smax = select i1 false, i32 -1, i32 0 ; <i32> [#uses=1]
+ %tmp12 = sub i32 0, %smax ; <i32> [#uses=1]
+ br label %bb.nph1
+
+bb.nph1: ; preds = %.outer, %bb.nph1.preheader
+ br i1 false, label %bb.nph3.preheader, label %.outer
+
+bb.nph3.preheader: ; preds = %bb.nph1
+ br label %bb.nph3
+
+bb.nph3: ; preds = %bb.nph3, %bb.nph3.preheader
+ %indvar7 = phi i32 [ %indvar.next8, %bb.nph3 ], [ 0, %bb.nph3.preheader ] ; <i32> [#uses=3]
+ %tmp9 = mul i32 %indvar7, -1 ; <i32> [#uses=1]
+ %tmp13 = add i32 %tmp9, %tmp12 ; <i32> [#uses=1]
+ %tmp14 = add i32 %tmp13, -2 ; <i32> [#uses=1]
+ %5 = icmp sgt i32 %tmp14, 0 ; <i1> [#uses=1]
+ %indvar.next8 = add i32 %indvar7, 1 ; <i32> [#uses=1]
+ br i1 %5, label %bb.nph3, label %.outer.loopexit
+
+.outer.loopexit: ; preds = %bb.nph3
+ %indvar7.lcssa = phi i32 [ %indvar7, %bb.nph3 ] ; <i32> [#uses=0]
+ br label %.outer
+
+.outer: ; preds = %.outer.loopexit, %bb.nph1
+ br i1 false, label %bb.nph1, label %.outer._crit_edge.loopexit
+
+.outer._crit_edge.loopexit: ; preds = %.outer
+ br label %.outer._crit_edge
+
+.outer._crit_edge: ; preds = %.outer._crit_edge.loopexit, %4
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/ada-loops.ll b/test/Transforms/IndVarSimplify/ada-loops.ll
new file mode 100644
index 0000000..436840a
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/ada-loops.ll
@@ -0,0 +1,90 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep phi %t | count 4
+; RUN: grep {= phi i32} %t | count 4
+; RUN: not grep {sext i} %t
+; RUN: not grep {zext i} %t
+; RUN: not grep {trunc i} %t
+; RUN: not grep {add i8} %t
+; PR1301
+
+; Do a bunch of analysis and prove that the loops can use an i32 trip
+; count without casting.
+
+; ModuleID = 'ada.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+
+define void @kinds__sbytezero([256 x i32]* nocapture %a) nounwind {
+bb.thread:
+ %tmp46 = getelementptr [256 x i32]* %a, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp46
+ br label %bb
+
+bb: ; preds = %bb, %bb.thread
+ %i.0.reg2mem.0 = phi i8 [ -128, %bb.thread ], [ %tmp8, %bb ] ; <i8> [#uses=1]
+ %tmp8 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3]
+ %tmp1 = sext i8 %tmp8 to i32 ; <i32> [#uses=1]
+ %tmp3 = add i32 %tmp1, 128 ; <i32> [#uses=1]
+ %tmp4 = getelementptr [256 x i32]* %a, i32 0, i32 %tmp3 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp4
+ %0 = icmp eq i8 %tmp8, 127 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @kinds__ubytezero([256 x i32]* nocapture %a) nounwind {
+bb.thread:
+ %tmp35 = getelementptr [256 x i32]* %a, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp35
+ br label %bb
+
+bb: ; preds = %bb, %bb.thread
+ %i.0.reg2mem.0 = phi i8 [ 0, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=1]
+ %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3]
+ %tmp1 = zext i8 %tmp7 to i32 ; <i32> [#uses=1]
+ %tmp3 = getelementptr [256 x i32]* %a, i32 0, i32 %tmp1 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp3
+ %0 = icmp eq i8 %tmp7, -1 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @kinds__srangezero([21 x i32]* nocapture %a) nounwind {
+bb.thread:
+ br label %bb
+
+bb: ; preds = %bb, %bb.thread
+ %i.0.reg2mem.0 = phi i8 [ -10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
+ %tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp12, 10 ; <i32> [#uses=1]
+ %tmp5 = getelementptr [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp5
+ %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
+ %0 = icmp sgt i8 %tmp7, 10 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @kinds__urangezero([21 x i32]* nocapture %a) nounwind {
+bb.thread:
+ br label %bb
+
+bb: ; preds = %bb, %bb.thread
+ %i.0.reg2mem.0 = phi i8 [ 10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
+ %tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp12, -10 ; <i32> [#uses=1]
+ %tmp5 = getelementptr [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp5
+ %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
+ %0 = icmp sgt i8 %tmp7, 30 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/addrec-gep.ll b/test/Transforms/IndVarSimplify/addrec-gep.ll
new file mode 100644
index 0000000..9e42734
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/addrec-gep.ll
@@ -0,0 +1,78 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep getelementptr %t | count 1
+; RUN: grep {mul .*, 37} %t | count 1
+; RUN: grep {add .*, 5203} %t | count 1
+; RUN: not grep cast %t
+
+; This test tests several things. The load and store should use the
+; same address instead of having it computed twice, and SCEVExpander should
+; be able to reconstruct the full getelementptr, despite it having a few
+; obstacles set in its way.
+
+target datalayout = "e-p:64:64:64"
+
+define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind {
+entry:
+ %tmp = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %bb.nph3, label %return
+
+bb.nph: ; preds = %bb2.preheader
+ %tmp1 = mul i64 %tmp16, %i.02 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp19, %i.02 ; <i64> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb2, %bb.nph
+ %j.01 = phi i64 [ %tmp9, %bb2 ], [ 0, %bb.nph ] ; <i64> [#uses=3]
+ %tmp3 = add i64 %j.01, %tmp1 ; <i64> [#uses=1]
+ %tmp4 = add i64 %j.01, %tmp2 ; <i64> [#uses=1]
+ %z0 = add i64 %tmp4, 5203
+ %tmp5 = getelementptr double* %p, i64 %z0 ; <double*> [#uses=1]
+ %tmp6 = load double* %tmp5, align 8 ; <double> [#uses=1]
+ %tmp7 = fdiv double %tmp6, 2.100000e+00 ; <double> [#uses=1]
+ %z1 = add i64 %tmp4, 5203
+ %tmp8 = getelementptr double* %p, i64 %z1 ; <double*> [#uses=1]
+ store double %tmp7, double* %tmp8, align 8
+ %tmp9 = add i64 %j.01, 1 ; <i64> [#uses=2]
+ br label %bb2
+
+bb2: ; preds = %bb1
+ %tmp10 = icmp slt i64 %tmp9, %m ; <i1> [#uses=1]
+ br i1 %tmp10, label %bb1, label %bb2.bb3_crit_edge
+
+bb2.bb3_crit_edge: ; preds = %bb2
+ br label %bb3
+
+bb3: ; preds = %bb2.preheader, %bb2.bb3_crit_edge
+ %tmp11 = add i64 %i.02, 1 ; <i64> [#uses=2]
+ br label %bb4
+
+bb4: ; preds = %bb3
+ %tmp12 = icmp slt i64 %tmp11, %n ; <i1> [#uses=1]
+ br i1 %tmp12, label %bb2.preheader, label %bb4.return_crit_edge
+
+bb4.return_crit_edge: ; preds = %bb4
+ br label %bb4.return_crit_edge.split
+
+bb4.return_crit_edge.split: ; preds = %bb.nph3, %bb4.return_crit_edge
+ br label %return
+
+bb.nph3: ; preds = %entry
+ %tmp13 = icmp sgt i64 %m, 0 ; <i1> [#uses=1]
+ %tmp14 = mul i64 %n, 37 ; <i64> [#uses=1]
+ %tmp15 = mul i64 %tmp14, %o ; <i64> [#uses=1]
+ %tmp16 = mul i64 %tmp15, %q ; <i64> [#uses=1]
+ %tmp17 = mul i64 %n, 37 ; <i64> [#uses=1]
+ %tmp18 = mul i64 %tmp17, %o ; <i64> [#uses=1]
+ %tmp19 = mul i64 %tmp18, %q ; <i64> [#uses=1]
+ br i1 %tmp13, label %bb.nph3.split, label %bb4.return_crit_edge.split
+
+bb.nph3.split: ; preds = %bb.nph3
+ br label %bb2.preheader
+
+bb2.preheader: ; preds = %bb.nph3.split, %bb4
+ %i.02 = phi i64 [ %tmp11, %bb4 ], [ 0, %bb.nph3.split ] ; <i64> [#uses=3]
+ br i1 true, label %bb.nph, label %bb3
+
+return: ; preds = %bb4.return_crit_edge.split, %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/ashr-tripcount.ll b/test/Transforms/IndVarSimplify/ashr-tripcount.ll
new file mode 100644
index 0000000..baaefdc
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/ashr-tripcount.ll
@@ -0,0 +1,107 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep sext %t | count 1
+
+; Indvars should be able to eliminate all of the sign extensions
+; inside the loop.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+@pow_2_tab = external constant [0 x float] ; <[0 x float]*> [#uses=1]
+@pow_2_025_tab = external constant [0 x float] ; <[0 x float]*> [#uses=1]
+@i_pow_2_tab = external constant [0 x float] ; <[0 x float]*> [#uses=1]
+@i_pow_2_025_tab = external constant [0 x float] ; <[0 x float]*> [#uses=1]
+
+define void @foo(i32 %gain, i32 %noOfLines, i32* %quaSpectrum, float* %iquaSpectrum, float* %pow4_3_tab_ptr) nounwind {
+entry:
+ %t0 = icmp slt i32 %gain, 0 ; <i1> [#uses=1]
+ br i1 %t0, label %bb1, label %bb2
+
+bb1: ; preds = %entry
+ %t1 = sub i32 0, %gain ; <i32> [#uses=1]
+ %t2 = sub i32 0, %gain ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1, %entry
+ %pow_2_tab.pn = phi [0 x float]* [ @i_pow_2_tab, %bb1 ], [ @pow_2_tab, %entry ] ; <[0 x float]*> [#uses=1]
+ %.pn3.in.in = phi i32 [ %t1, %bb1 ], [ %gain, %entry ] ; <i32> [#uses=1]
+ %pow_2_025_tab.pn = phi [0 x float]* [ @i_pow_2_025_tab, %bb1 ], [ @pow_2_025_tab, %entry ] ; <[0 x float]*> [#uses=1]
+ %.pn2.in.in = phi i32 [ %t2, %bb1 ], [ %gain, %entry ] ; <i32> [#uses=1]
+ %.pn3.in = ashr i32 %.pn3.in.in, 2 ; <i32> [#uses=1]
+ %.pn2.in = and i32 %.pn2.in.in, 3 ; <i32> [#uses=1]
+ %.pn3 = sext i32 %.pn3.in to i64 ; <i64> [#uses=1]
+ %.pn2 = zext i32 %.pn2.in to i64 ; <i64> [#uses=1]
+ %.pn.in = getelementptr [0 x float]* %pow_2_tab.pn, i64 0, i64 %.pn3 ; <float*> [#uses=1]
+ %.pn1.in = getelementptr [0 x float]* %pow_2_025_tab.pn, i64 0, i64 %.pn2 ; <float*> [#uses=1]
+ %.pn = load float* %.pn.in ; <float> [#uses=1]
+ %.pn1 = load float* %.pn1.in ; <float> [#uses=1]
+ %invQuantizer.0 = fmul float %.pn, %.pn1 ; <float> [#uses=4]
+ %t3 = ashr i32 %noOfLines, 2 ; <i32> [#uses=1]
+ %t4 = icmp sgt i32 %t3, 0 ; <i1> [#uses=1]
+ br i1 %t4, label %bb.nph, label %return
+
+bb.nph: ; preds = %bb2
+ %t5 = ashr i32 %noOfLines, 2 ; <i32> [#uses=1]
+ br label %bb3
+
+bb3: ; preds = %bb4, %bb.nph
+ %i.05 = phi i32 [ %t49, %bb4 ], [ 0, %bb.nph ] ; <i32> [#uses=9]
+ %k.04 = phi i32 [ %t48, %bb4 ], [ 0, %bb.nph ] ; <i32> [#uses=1]
+ %t6 = sext i32 %i.05 to i64 ; <i64> [#uses=1]
+ %t7 = getelementptr i32* %quaSpectrum, i64 %t6 ; <i32*> [#uses=1]
+ %t8 = load i32* %t7, align 4 ; <i32> [#uses=1]
+ %t9 = zext i32 %t8 to i64 ; <i64> [#uses=1]
+ %t10 = getelementptr float* %pow4_3_tab_ptr, i64 %t9 ; <float*> [#uses=1]
+ %t11 = load float* %t10, align 4 ; <float> [#uses=1]
+ %t12 = or i32 %i.05, 1 ; <i32> [#uses=1]
+ %t13 = sext i32 %t12 to i64 ; <i64> [#uses=1]
+ %t14 = getelementptr i32* %quaSpectrum, i64 %t13 ; <i32*> [#uses=1]
+ %t15 = load i32* %t14, align 4 ; <i32> [#uses=1]
+ %t16 = zext i32 %t15 to i64 ; <i64> [#uses=1]
+ %t17 = getelementptr float* %pow4_3_tab_ptr, i64 %t16 ; <float*> [#uses=1]
+ %t18 = load float* %t17, align 4 ; <float> [#uses=1]
+ %t19 = or i32 %i.05, 2 ; <i32> [#uses=1]
+ %t20 = sext i32 %t19 to i64 ; <i64> [#uses=1]
+ %t21 = getelementptr i32* %quaSpectrum, i64 %t20 ; <i32*> [#uses=1]
+ %t22 = load i32* %t21, align 4 ; <i32> [#uses=1]
+ %t23 = zext i32 %t22 to i64 ; <i64> [#uses=1]
+ %t24 = getelementptr float* %pow4_3_tab_ptr, i64 %t23 ; <float*> [#uses=1]
+ %t25 = load float* %t24, align 4 ; <float> [#uses=1]
+ %t26 = or i32 %i.05, 3 ; <i32> [#uses=1]
+ %t27 = sext i32 %t26 to i64 ; <i64> [#uses=1]
+ %t28 = getelementptr i32* %quaSpectrum, i64 %t27 ; <i32*> [#uses=1]
+ %t29 = load i32* %t28, align 4 ; <i32> [#uses=1]
+ %t30 = zext i32 %t29 to i64 ; <i64> [#uses=1]
+ %t31 = getelementptr float* %pow4_3_tab_ptr, i64 %t30 ; <float*> [#uses=1]
+ %t32 = load float* %t31, align 4 ; <float> [#uses=1]
+ %t33 = fmul float %t11, %invQuantizer.0 ; <float> [#uses=1]
+ %t34 = sext i32 %i.05 to i64 ; <i64> [#uses=1]
+ %t35 = getelementptr float* %iquaSpectrum, i64 %t34 ; <float*> [#uses=1]
+ store float %t33, float* %t35, align 4
+ %t36 = or i32 %i.05, 1 ; <i32> [#uses=1]
+ %t37 = fmul float %t18, %invQuantizer.0 ; <float> [#uses=1]
+ %t38 = sext i32 %t36 to i64 ; <i64> [#uses=1]
+ %t39 = getelementptr float* %iquaSpectrum, i64 %t38 ; <float*> [#uses=1]
+ store float %t37, float* %t39, align 4
+ %t40 = or i32 %i.05, 2 ; <i32> [#uses=1]
+ %t41 = fmul float %t25, %invQuantizer.0 ; <float> [#uses=1]
+ %t42 = sext i32 %t40 to i64 ; <i64> [#uses=1]
+ %t43 = getelementptr float* %iquaSpectrum, i64 %t42 ; <float*> [#uses=1]
+ store float %t41, float* %t43, align 4
+ %t44 = or i32 %i.05, 3 ; <i32> [#uses=1]
+ %t45 = fmul float %t32, %invQuantizer.0 ; <float> [#uses=1]
+ %t46 = sext i32 %t44 to i64 ; <i64> [#uses=1]
+ %t47 = getelementptr float* %iquaSpectrum, i64 %t46 ; <float*> [#uses=1]
+ store float %t45, float* %t47, align 4
+ %t48 = add i32 %k.04, 1 ; <i32> [#uses=2]
+ %t49 = add i32 %i.05, 4 ; <i32> [#uses=1]
+ br label %bb4
+
+bb4: ; preds = %bb3
+ %t50 = icmp sgt i32 %t5, %t48 ; <i1> [#uses=1]
+ br i1 %t50, label %bb3, label %bb4.return_crit_edge
+
+bb4.return_crit_edge: ; preds = %bb4
+ br label %return
+
+return: ; preds = %bb4.return_crit_edge, %bb2
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/avoid-i0.ll b/test/Transforms/IndVarSimplify/avoid-i0.ll
new file mode 100644
index 0000000..d110a8a
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/avoid-i0.ll
@@ -0,0 +1,126 @@
+; RUN: opt < %s -indvars
+; PR4052
+; PR4054
+
+; Don't treat an and with 0 as a mask (trunc+zext).
+
+define i32 @int80(i8 signext %p_71) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb6, %entry
+ %p_71_addr.0 = phi i8 [ %p_71, %entry ], [ %0, %bb6 ] ; <i8> [#uses=0]
+ br i1 false, label %bb4, label %bb1
+
+bb1: ; preds = %bb
+ ret i32 0
+
+bb4: ; preds = %bb4, %bb
+ br i1 false, label %bb6, label %bb4
+
+bb6: ; preds = %bb4
+ %0 = and i8 0, 0 ; <i8> [#uses=1]
+ br label %bb
+}
+
+@x = common global i32 0 ; <i32*> [#uses=1]
+
+define signext i8 @safe_sub_func_int32_t_s_s(i32 %_si1, i8 signext %_si2) nounwind {
+entry:
+ %_si1_addr = alloca i32 ; <i32*> [#uses=3]
+ %_si2_addr = alloca i8 ; <i8*> [#uses=3]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %_si1, i32* %_si1_addr
+ store i8 %_si2, i8* %_si2_addr
+ %1 = load i8* %_si2_addr, align 1 ; <i8> [#uses=1]
+ %2 = sext i8 %1 to i32 ; <i32> [#uses=1]
+ %3 = load i32* %_si1_addr, align 4 ; <i32> [#uses=1]
+ %4 = xor i32 %2, %3 ; <i32> [#uses=1]
+ %5 = load i8* %_si2_addr, align 1 ; <i8> [#uses=1]
+ %6 = sext i8 %5 to i32 ; <i32> [#uses=1]
+ %7 = sub i32 7, %6 ; <i32> [#uses=1]
+ %8 = load i32* %_si1_addr, align 4 ; <i32> [#uses=1]
+ %9 = shl i32 %8, %7 ; <i32> [#uses=1]
+ %10 = and i32 %4, %9 ; <i32> [#uses=1]
+ %11 = icmp slt i32 %10, 0 ; <i1> [#uses=1]
+ %12 = zext i1 %11 to i32 ; <i32> [#uses=1]
+ store i32 %12, i32* %0, align 4
+ %13 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %13, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ %retval12 = trunc i32 %retval1 to i8 ; <i8> [#uses=1]
+ ret i8 %retval12
+}
+
+define i32 @safe_sub_func_uint64_t_u_u(i32 %_ui1, i32 %_ui2) nounwind {
+entry:
+ %_ui1_addr = alloca i32 ; <i32*> [#uses=2]
+ %_ui2_addr = alloca i32 ; <i32*> [#uses=1]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %_ui1, i32* %_ui1_addr
+ store i32 %_ui2, i32* %_ui2_addr
+ %1 = load i32* %_ui1_addr, align 4 ; <i32> [#uses=1]
+ %2 = sub i32 %1, 1 ; <i32> [#uses=1]
+ store i32 %2, i32* %0, align 4
+ %3 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %3, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
+
+define void @int87(i8 signext %p_48, i8 signext %p_49) nounwind {
+entry:
+ %p_48_addr = alloca i8 ; <i8*> [#uses=1]
+ %p_49_addr = alloca i8 ; <i8*> [#uses=1]
+ %l_52 = alloca i32 ; <i32*> [#uses=7]
+ %vol.0 = alloca i32 ; <i32*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i8 %p_48, i8* %p_48_addr
+ store i8 %p_49, i8* %p_49_addr
+ br label %bb4
+
+bb: ; preds = %bb4
+ %0 = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ store i32 %0, i32* %vol.0, align 4
+ store i32 0, i32* %l_52, align 4
+ br label %bb2
+
+bb1: ; preds = %bb2
+ %1 = load i32* %l_52, align 4 ; <i32> [#uses=1]
+ %2 = call i32 @safe_sub_func_uint64_t_u_u(i32 %1, i32 1) nounwind ; <i32> [#uses=1]
+ store i32 %2, i32* %l_52, align 4
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %3 = load i32* %l_52, align 4 ; <i32> [#uses=1]
+ %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
+ br i1 %4, label %bb1, label %bb3
+
+bb3: ; preds = %bb2
+ %5 = load i32* %l_52, align 4 ; <i32> [#uses=1]
+ %6 = call signext i8 @safe_sub_func_int32_t_s_s(i32 %5, i8 signext 1) nounwind ; <i8> [#uses=1]
+ %7 = sext i8 %6 to i32 ; <i32> [#uses=1]
+ store i32 %7, i32* %l_52, align 4
+ br label %bb4
+
+bb4: ; preds = %bb3, %entry
+ %8 = load i32* %l_52, align 4 ; <i32> [#uses=1]
+ %9 = icmp ne i32 %8, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb, label %bb5
+
+bb5: ; preds = %bb4
+ br label %return
+
+return: ; preds = %bb5
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/casted-argument.ll b/test/Transforms/IndVarSimplify/casted-argument.ll
new file mode 100644
index 0000000..dfefe1d
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/casted-argument.ll
@@ -0,0 +1,50 @@
+; RUN: opt < %s -indvars -disable-output
+; PR4009
+; PR4038
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define void @safe_bcopy(i8* %to) nounwind {
+entry:
+ %cmp11 = icmp ult i8* %to, null ; <i1> [#uses=1]
+ br i1 %cmp11, label %loop, label %return
+
+return: ; preds = %entry
+ ret void
+
+loop: ; preds = %loop, %if.else
+ %pn = phi i8* [ %ge, %loop ], [ null, %entry ] ; <i8*> [#uses=1]
+ %cp = ptrtoint i8* %to to i32 ; <i32> [#uses=1]
+ %su = sub i32 0, %cp ; <i32> [#uses=1]
+ %ge = getelementptr i8* %pn, i32 %su ; <i8*> [#uses=2]
+ tail call void @bcopy(i8* %ge) nounwind
+ br label %loop
+}
+
+define void @safe_bcopy_4038(i8* %from, i8* %to, i32 %size) nounwind {
+entry:
+ br i1 false, label %if.else, label %if.then12
+
+if.then12: ; preds = %entry
+ ret void
+
+if.else: ; preds = %entry
+ %sub.ptr.rhs.cast40 = ptrtoint i8* %from to i32 ; <i32> [#uses=1]
+ br label %if.end54
+
+if.end54: ; preds = %if.end54, %if.else
+ %sub.ptr4912.pn = phi i8* [ %sub.ptr4912, %if.end54 ], [ null, %if.else ] ; <i8*> [#uses=1]
+ %sub.ptr7 = phi i8* [ %sub.ptr, %if.end54 ], [ null, %if.else ] ; <i8*> [#uses=2]
+ %sub.ptr.rhs.cast46.pn = ptrtoint i8* %from to i32 ; <i32> [#uses=1]
+ %sub.ptr.lhs.cast45.pn = ptrtoint i8* %to to i32 ; <i32> [#uses=1]
+ %sub.ptr.sub47.pn = sub i32 %sub.ptr.rhs.cast46.pn, %sub.ptr.lhs.cast45.pn ; <i32> [#uses=1]
+ %sub.ptr4912 = getelementptr i8* %sub.ptr4912.pn, i32 %sub.ptr.sub47.pn ; <i8*> [#uses=2]
+ tail call void @bcopy_4038(i8* %sub.ptr4912, i8* %sub.ptr7, i32 0) nounwind
+ %sub.ptr = getelementptr i8* %sub.ptr7, i32 %sub.ptr.rhs.cast40 ; <i8*> [#uses=1]
+ br label %if.end54
+}
+
+declare void @bcopy(i8* nocapture) nounwind
+
+declare void @bcopy_4038(i8*, i32) nounwind
diff --git a/test/Transforms/IndVarSimplify/complex-scev.ll b/test/Transforms/IndVarSimplify/complex-scev.ll
new file mode 100644
index 0000000..434c4ec
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/complex-scev.ll
@@ -0,0 +1,29 @@
+; The i induction variable looks like a wrap-around, but it really is just
+; a simple affine IV. Make sure that indvars eliminates it.
+
+; RUN: opt < %s -indvars -S | grep phi | count 1
+
+define void @foo() {
+entry:
+ br label %bb6
+
+bb6: ; preds = %cond_true, %entry
+ %j.0 = phi i32 [ 1, %entry ], [ %tmp5, %cond_true ] ; <i32> [#uses=3]
+ %i.0 = phi i32 [ 0, %entry ], [ %j.0, %cond_true ] ; <i32> [#uses=1]
+ %tmp7 = call i32 (...)* @foo2( ) ; <i32> [#uses=1]
+ %tmp = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true, label %return
+
+cond_true: ; preds = %bb6
+ %tmp2 = call i32 (...)* @bar( i32 %i.0, i32 %j.0 ) ; <i32> [#uses=0]
+ %tmp5 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ br label %bb6
+
+return: ; preds = %bb6
+ ret void
+}
+
+declare i32 @bar(...)
+
+declare i32 @foo2(...)
+
diff --git a/test/Transforms/IndVarSimplify/dg.exp b/test/Transforms/IndVarSimplify/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/IndVarSimplify/divide-pointer.ll b/test/Transforms/IndVarSimplify/divide-pointer.ll
new file mode 100644
index 0000000..16608ee
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/divide-pointer.ll
@@ -0,0 +1,95 @@
+; RUN: opt < %s -indvars
+; PR4271
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+ %struct.xyz = type <{ i64, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, [8 x i8], i64, i64, i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, [76 x i32], i32, [2 x %struct.uvw] }>
+ %struct.uvw = type <{ i64, i64 }>
+
+define i32 @foo(%struct.xyz* %header, i8* %p2, i8* %p3, i8* nocapture %p4) nounwind {
+entry:
+ br label %while.body.i
+
+while.body.i: ; preds = %while.body.i, %entry
+ br i1 undef, label %while.body.i, label %bcopy_internal.exit
+
+bcopy_internal.exit: ; preds = %while.body.i
+ %conv135 = ptrtoint %struct.xyz* %header to i32 ; <i32> [#uses=1]
+ %shr136 = lshr i32 %conv135, 12 ; <i32> [#uses=1]
+ br label %for.body
+
+for.body: ; preds = %for.body, %bcopy_internal.exit
+ %ppnum.052 = phi i32 [ %inc, %for.body ], [ %shr136, %bcopy_internal.exit ] ; <i32> [#uses=1]
+ %inc = add i32 %ppnum.052, 1 ; <i32> [#uses=2]
+ %cmp = icmp ugt i32 %inc, undef ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then199, label %for.body
+
+if.then199: ; preds = %if.then199, %for.body
+ br label %if.then199
+}
+
+define i32 @same_thing_but_signed(%struct.xyz* %header, i8* %p2, i8* %p3, i8* nocapture %p4) nounwind {
+entry:
+ br label %while.body.i
+
+while.body.i: ; preds = %while.body.i, %entry
+ br i1 undef, label %while.body.i, label %bcopy_internal.exit
+
+bcopy_internal.exit: ; preds = %while.body.i
+ %conv135 = ptrtoint %struct.xyz* %header to i32 ; <i32> [#uses=1]
+ %shr136 = ashr i32 %conv135, 12 ; <i32> [#uses=1]
+ br label %for.body
+
+for.body: ; preds = %for.body, %bcopy_internal.exit
+ %ppnum.052 = phi i32 [ %inc, %for.body ], [ %shr136, %bcopy_internal.exit ] ; <i32> [#uses=1]
+ %inc = add i32 %ppnum.052, 1 ; <i32> [#uses=2]
+ %cmp = icmp ugt i32 %inc, undef ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then199, label %for.body
+
+if.then199: ; preds = %if.then199, %for.body
+ br label %if.then199
+}
+
+define i32 @same_thing_but_multiplied(%struct.xyz* %header, i8* %p2, i8* %p3, i8* nocapture %p4) nounwind {
+entry:
+ br label %while.body.i
+
+while.body.i: ; preds = %while.body.i, %entry
+ br i1 undef, label %while.body.i, label %bcopy_internal.exit
+
+bcopy_internal.exit: ; preds = %while.body.i
+ %conv135 = ptrtoint %struct.xyz* %header to i32 ; <i32> [#uses=1]
+ %shr136 = shl i32 %conv135, 12 ; <i32> [#uses=1]
+ br label %for.body
+
+for.body: ; preds = %for.body, %bcopy_internal.exit
+ %ppnum.052 = phi i32 [ %inc, %for.body ], [ %shr136, %bcopy_internal.exit ] ; <i32> [#uses=1]
+ %inc = add i32 %ppnum.052, 1 ; <i32> [#uses=2]
+ %cmp = icmp ugt i32 %inc, undef ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then199, label %for.body
+
+if.then199: ; preds = %if.then199, %for.body
+ br label %if.then199
+}
+
+define i32 @same_thing_but_xored(%struct.xyz* %header, i8* %p2, i8* %p3, i8* nocapture %p4) nounwind {
+entry:
+ br label %while.body.i
+
+while.body.i: ; preds = %while.body.i, %entry
+ br i1 undef, label %while.body.i, label %bcopy_internal.exit
+
+bcopy_internal.exit: ; preds = %while.body.i
+ %conv135 = ptrtoint %struct.xyz* %header to i32 ; <i32> [#uses=1]
+ %shr136 = xor i32 %conv135, 12 ; <i32> [#uses=1]
+ br label %for.body
+
+for.body: ; preds = %for.body, %bcopy_internal.exit
+ %ppnum.052 = phi i32 [ %inc, %for.body ], [ %shr136, %bcopy_internal.exit ] ; <i32> [#uses=1]
+ %inc = add i32 %ppnum.052, 1 ; <i32> [#uses=2]
+ %cmp = icmp ugt i32 %inc, undef ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then199, label %for.body
+
+if.then199: ; preds = %if.then199, %for.body
+ br label %if.then199
+}
diff --git a/test/Transforms/IndVarSimplify/exit_value_tests.ll b/test/Transforms/IndVarSimplify/exit_value_tests.ll
new file mode 100644
index 0000000..737e733
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/exit_value_tests.ll
@@ -0,0 +1,114 @@
+; Test that we can evaluate the exit values of various expression types. Since
+; these loops all have predictable exit values we can replace the use outside
+; of the loop with a closed-form computation, making the loop dead.
+;
+; RUN: opt < %s -indvars -loop-deletion -simplifycfg | \
+; RUN: llvm-dis | not grep br
+
+define i32 @polynomial_constant() {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %A1 = phi i32 [ 0, %0 ], [ %A2, %Loop ] ; <i32> [#uses=3]
+ %B1 = phi i32 [ 0, %0 ], [ %B2, %Loop ] ; <i32> [#uses=1]
+ %A2 = add i32 %A1, 1 ; <i32> [#uses=1]
+ %B2 = add i32 %B1, %A1 ; <i32> [#uses=2]
+ %C = icmp eq i32 %A1, 1000 ; <i1> [#uses=1]
+ br i1 %C, label %Out, label %Loop
+
+Out: ; preds = %Loop
+ ret i32 %B2
+}
+
+define i32 @NSquare(i32 %N) {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %X = phi i32 [ 0, %0 ], [ %X2, %Loop ] ; <i32> [#uses=4]
+ %X2 = add i32 %X, 1 ; <i32> [#uses=1]
+ %c = icmp eq i32 %X, %N ; <i1> [#uses=1]
+ br i1 %c, label %Out, label %Loop
+
+Out: ; preds = %Loop
+ %Y = mul i32 %X, %X ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+define i32 @NSquareOver2(i32 %N) {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %X = phi i32 [ 0, %0 ], [ %X2, %Loop ] ; <i32> [#uses=3]
+ %Y = phi i32 [ 15, %0 ], [ %Y2, %Loop ] ; <i32> [#uses=1]
+ %Y2 = add i32 %Y, %X ; <i32> [#uses=2]
+ %X2 = add i32 %X, 1 ; <i32> [#uses=1]
+ %c = icmp eq i32 %X, %N ; <i1> [#uses=1]
+ br i1 %c, label %Out, label %Loop
+
+Out: ; preds = %Loop
+ ret i32 %Y2
+}
+
+define i32 @strength_reduced() {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %A1 = phi i32 [ 0, %0 ], [ %A2, %Loop ] ; <i32> [#uses=3]
+ %B1 = phi i32 [ 0, %0 ], [ %B2, %Loop ] ; <i32> [#uses=1]
+ %A2 = add i32 %A1, 1 ; <i32> [#uses=1]
+ %B2 = add i32 %B1, %A1 ; <i32> [#uses=2]
+ %C = icmp eq i32 %A1, 1000 ; <i1> [#uses=1]
+ br i1 %C, label %Out, label %Loop
+
+Out: ; preds = %Loop
+ ret i32 %B2
+}
+
+define i32 @chrec_equals() {
+entry:
+ br label %no_exit
+
+no_exit: ; preds = %no_exit, %entry
+ %i0 = phi i32 [ 0, %entry ], [ %i1, %no_exit ] ; <i32> [#uses=3]
+ %ISq = mul i32 %i0, %i0 ; <i32> [#uses=1]
+ %i1 = add i32 %i0, 1 ; <i32> [#uses=2]
+ %tmp.1 = icmp ne i32 %ISq, 10000 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %no_exit, label %loopexit
+
+loopexit: ; preds = %no_exit
+ ret i32 %i1
+}
+
+define i16 @cast_chrec_test() {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %A1 = phi i32 [ 0, %0 ], [ %A2, %Loop ] ; <i32> [#uses=2]
+ %B1 = trunc i32 %A1 to i16 ; <i16> [#uses=2]
+ %A2 = add i32 %A1, 1 ; <i32> [#uses=1]
+ %C = icmp eq i16 %B1, 1000 ; <i1> [#uses=1]
+ br i1 %C, label %Out, label %Loop
+
+Out: ; preds = %Loop
+ ret i16 %B1
+}
+
+define i32 @linear_div_fold() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 4, %entry ], [ %i.next, %loop ] ; <i32> [#uses=3]
+ %i.next = add i32 %i, 8 ; <i32> [#uses=1]
+ %RV = udiv i32 %i, 2 ; <i32> [#uses=1]
+ %c = icmp ne i32 %i, 68 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %RV
+}
diff --git a/test/Transforms/IndVarSimplify/gep-with-mul-base.ll b/test/Transforms/IndVarSimplify/gep-with-mul-base.ll
new file mode 100644
index 0000000..19d54ff
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/gep-with-mul-base.ll
@@ -0,0 +1,59 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep add %t | count 6
+; RUN: grep sub %t | count 2
+; RUN: grep mul %t | count 6
+
+define void @foo(i64 %n, i64 %m, i64 %o, double* nocapture %p) nounwind {
+entry:
+ %tmp = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ %tmp1 = mul i64 %n, 37 ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %m ; <i64> [#uses=1]
+ %tmp3 = mul i64 %tmp2, %o ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %i.01 = phi i64 [ %tmp3, %bb.nph ], [ %tmp13, %bb ] ; <i64> [#uses=3]
+ %tmp9 = getelementptr double* %p, i64 %i.01 ; <double*> [#uses=1]
+ %tmp10 = load double* %tmp9, align 8 ; <double> [#uses=1]
+ %tmp11 = fdiv double %tmp10, 2.100000e+00 ; <double> [#uses=1]
+ store double %tmp11, double* %tmp9, align 8
+ %tmp13 = add i64 %i.01, 1 ; <i64> [#uses=2]
+ %tmp14 = icmp slt i64 %tmp13, %n ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb, label %return.loopexit
+
+return.loopexit: ; preds = %bb
+ br label %return
+
+return: ; preds = %return.loopexit, %entry
+ ret void
+}
+define void @bar(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind {
+entry:
+ %tmp = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
+ br i1 %tmp, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ %tmp1 = mul i64 %n, %q ; <i64> [#uses=1]
+ %tmp2 = mul i64 %tmp1, %m ; <i64> [#uses=1]
+ %tmp3 = mul i64 %tmp2, %o ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %i.01 = phi i64 [ %tmp3, %bb.nph ], [ %tmp13, %bb ] ; <i64> [#uses=3]
+ %tmp9 = getelementptr double* %p, i64 %i.01 ; <double*> [#uses=1]
+ %tmp10 = load double* %tmp9, align 8 ; <double> [#uses=1]
+ %tmp11 = fdiv double %tmp10, 2.100000e+00 ; <double> [#uses=1]
+ store double %tmp11, double* %tmp9, align 8
+ %tmp13 = add i64 %i.01, 1 ; <i64> [#uses=2]
+ %tmp14 = icmp slt i64 %tmp13, %n ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb, label %return.loopexit
+
+return.loopexit: ; preds = %bb
+ br label %return
+
+return: ; preds = %return.loopexit, %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/indirectbr.ll b/test/Transforms/IndVarSimplify/indirectbr.ll
new file mode 100644
index 0000000..b4ce153
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/indirectbr.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -indvars -S -disable-output
+; PR5758
+
+define zeroext i1 @foo() nounwind {
+entry:
+ indirectbr i8* undef, [label %"202", label %"133"]
+
+"132": ; preds = %"133"
+ %0 = add i32 %1, 1 ; <i32> [#uses=1]
+ br label %"133"
+
+"133": ; preds = %"132", %entry
+ %1 = phi i32 [ %0, %"132" ], [ 0, %entry ] ; <i32> [#uses=2]
+ %2 = icmp eq i32 %1, 4 ; <i1> [#uses=1]
+ br i1 %2, label %"134", label %"132"
+
+"134": ; preds = %"133"
+ ret i1 true
+
+"202": ; preds = %entry
+ ret i1 false
+}
diff --git a/test/Transforms/IndVarSimplify/interesting-invoke-use.ll b/test/Transforms/IndVarSimplify/interesting-invoke-use.ll
new file mode 100644
index 0000000..8adc0e5
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/interesting-invoke-use.ll
@@ -0,0 +1,57 @@
+; RUN: opt < %s -indvars
+
+; An invoke has a result value which is used in an "Interesting"
+; expression inside the loop. IndVars should be able to rewrite
+; the expression in the correct place.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %struct.string___XUB = type { i32, i32 }
+ %struct.string___XUP = type { [0 x i8]*, %struct.string___XUB* }
[email protected] = external constant [24 x i8] ; <[24 x i8]*> [#uses=1]
[email protected] = external constant %struct.string___XUB ; <%struct.string___XUB*> [#uses=1]
+
+define void @_ada_c35503g() {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ br i1 false, label %bb65.loopexit, label %bb
+
+bb65.loopexit: ; preds = %bb
+ br label %bb123
+
+bb123: ; preds = %bb178, %bb65.loopexit
+ %i.0 = phi i32 [ %3, %bb178 ], [ 0, %bb65.loopexit ] ; <i32> [#uses=3]
+ %0 = invoke i32 @report__ident_int(i32 1)
+ to label %invcont127 unwind label %lpad266 ; <i32> [#uses=1]
+
+invcont127: ; preds = %bb123
+ %1 = sub i32 %i.0, %0 ; <i32> [#uses=1]
+ %2 = icmp eq i32 0, %1 ; <i1> [#uses=1]
+ br i1 %2, label %bb178, label %bb128
+
+bb128: ; preds = %invcont127
+ invoke void @system__img_int__image_integer(%struct.string___XUP* noalias sret null, i32 %i.0)
+ to label %invcont129 unwind label %lpad266
+
+invcont129: ; preds = %bb128
+ invoke void @system__string_ops__str_concat(%struct.string___XUP* noalias sret null, [0 x i8]* bitcast ([24 x i8]* @.str7 to [0 x i8]*), %struct.string___XUB* @C.17.316, [0 x i8]* null, %struct.string___XUB* null)
+ to label %invcont138 unwind label %lpad266
+
+invcont138: ; preds = %invcont129
+ unreachable
+
+bb178: ; preds = %invcont127
+ %3 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %bb123
+
+lpad266: ; preds = %invcont129, %bb128, %bb123
+ unreachable
+}
+
+declare void @system__img_int__image_integer(%struct.string___XUP* noalias sret, i32)
+
+declare void @system__string_ops__str_concat(%struct.string___XUP* noalias sret, [0 x i8]*, %struct.string___XUB*, [0 x i8]*, %struct.string___XUB*)
+
+declare i32 @report__ident_int(i32)
diff --git a/test/Transforms/IndVarSimplify/iterationCount_zext_or_trunc.ll b/test/Transforms/IndVarSimplify/iterationCount_zext_or_trunc.ll
new file mode 100644
index 0000000..02145d1c
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/iterationCount_zext_or_trunc.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -indvars -disable-output
+
+; ModuleID = 'testcase.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+
+define i32 @testcase(i5 zeroext %k) {
+entry:
+ br label %bb2
+
+bb: ; preds = %bb2
+ %tmp1 = add i32 %tmp2, %result ; <i32> [#uses=1]
+ %indvar_next1 = add i5 %k_0, 1 ; <i5> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb, %entry
+ %k_0 = phi i5 [ 0, %entry ], [ %indvar_next1, %bb ] ; <i5> [#uses=2]
+ %result = phi i32 [ 0, %entry ], [ %tmp1, %bb ] ; <i32> [#uses=2]
+ %tmp2 = zext i5 %k_0 to i32 ; <i32> [#uses=1]
+ %exitcond = icmp eq i32 %tmp2, 16 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb3, label %bb
+
+bb3: ; preds = %bb2
+ ret i32 %result
+}
diff --git a/test/Transforms/IndVarSimplify/iv-sext.ll b/test/Transforms/IndVarSimplify/iv-sext.ll
new file mode 100644
index 0000000..5516502
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/iv-sext.ll
@@ -0,0 +1,143 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep {= sext} %t | count 4
+; RUN: grep {phi i64} %t | count 2
+
+; Indvars should be able to promote the hiPart induction variable in the
+; inner loop to i64.
+; TODO: it should promote hiPart to i64 in the outer loop too.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define void @t(float* %pTmp1, float* %peakWeight, float* %nrgReducePeakrate, i32 %bandEdgeIndex, float %tmp1) nounwind {
+entry:
+ %tmp = load float* %peakWeight, align 4 ; <float> [#uses=1]
+ %tmp2 = icmp sgt i32 %bandEdgeIndex, 0 ; <i1> [#uses=1]
+ br i1 %tmp2, label %bb.nph22, label %return
+
+bb.nph22: ; preds = %entry
+ %tmp3 = add i32 %bandEdgeIndex, -1 ; <i32> [#uses=2]
+ br label %bb
+
+bb: ; preds = %bb8, %bb.nph22
+ %distERBhi.121 = phi float [ %distERBhi.2.lcssa, %bb8 ], [ 0.000000e+00, %bb.nph22 ] ; <float> [#uses=2]
+ %distERBlo.120 = phi float [ %distERBlo.0.lcssa, %bb8 ], [ 0.000000e+00, %bb.nph22 ] ; <float> [#uses=2]
+ %hiPart.119 = phi i32 [ %hiPart.0.lcssa, %bb8 ], [ 0, %bb.nph22 ] ; <i32> [#uses=3]
+ %loPart.118 = phi i32 [ %loPart.0.lcssa, %bb8 ], [ 0, %bb.nph22 ] ; <i32> [#uses=2]
+ %peakCount.117 = phi float [ %peakCount.2.lcssa, %bb8 ], [ %tmp, %bb.nph22 ] ; <float> [#uses=2]
+ %part.016 = phi i32 [ %tmp46, %bb8 ], [ 0, %bb.nph22 ] ; <i32> [#uses=5]
+ %tmp4 = icmp sgt i32 %part.016, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb1, label %bb3.preheader
+
+bb1: ; preds = %bb
+ %tmp5 = add i32 %part.016, -1 ; <i32> [#uses=1]
+ %tmp6 = sext i32 %tmp5 to i64 ; <i64> [#uses=1]
+ %tmp7 = getelementptr float* %pTmp1, i64 %tmp6 ; <float*> [#uses=1]
+ %tmp8 = load float* %tmp7, align 4 ; <float> [#uses=1]
+ %tmp9 = fadd float %tmp8, %distERBlo.120 ; <float> [#uses=1]
+ %tmp10 = add i32 %part.016, -1 ; <i32> [#uses=1]
+ %tmp11 = sext i32 %tmp10 to i64 ; <i64> [#uses=1]
+ %tmp12 = getelementptr float* %pTmp1, i64 %tmp11 ; <float*> [#uses=1]
+ %tmp13 = load float* %tmp12, align 4 ; <float> [#uses=1]
+ %tmp14 = fsub float %distERBhi.121, %tmp13 ; <float> [#uses=1]
+ br label %bb3.preheader
+
+bb3.preheader: ; preds = %bb1, %bb
+ %distERBlo.0.ph = phi float [ %distERBlo.120, %bb ], [ %tmp9, %bb1 ] ; <float> [#uses=3]
+ %distERBhi.0.ph = phi float [ %distERBhi.121, %bb ], [ %tmp14, %bb1 ] ; <float> [#uses=3]
+ %tmp15 = fcmp ogt float %distERBlo.0.ph, 2.500000e+00 ; <i1> [#uses=1]
+ br i1 %tmp15, label %bb.nph, label %bb5.preheader
+
+bb.nph: ; preds = %bb3.preheader
+ br label %bb2
+
+bb2: ; preds = %bb3, %bb.nph
+ %distERBlo.03 = phi float [ %tmp19, %bb3 ], [ %distERBlo.0.ph, %bb.nph ] ; <float> [#uses=1]
+ %loPart.02 = phi i32 [ %tmp24, %bb3 ], [ %loPart.118, %bb.nph ] ; <i32> [#uses=3]
+ %peakCount.01 = phi float [ %tmp23, %bb3 ], [ %peakCount.117, %bb.nph ] ; <float> [#uses=1]
+ %tmp16 = sext i32 %loPart.02 to i64 ; <i64> [#uses=1]
+ %tmp17 = getelementptr float* %pTmp1, i64 %tmp16 ; <float*> [#uses=1]
+ %tmp18 = load float* %tmp17, align 4 ; <float> [#uses=1]
+ %tmp19 = fsub float %distERBlo.03, %tmp18 ; <float> [#uses=3]
+ %tmp20 = sext i32 %loPart.02 to i64 ; <i64> [#uses=1]
+ %tmp21 = getelementptr float* %peakWeight, i64 %tmp20 ; <float*> [#uses=1]
+ %tmp22 = load float* %tmp21, align 4 ; <float> [#uses=1]
+ %tmp23 = fsub float %peakCount.01, %tmp22 ; <float> [#uses=2]
+ %tmp24 = add i32 %loPart.02, 1 ; <i32> [#uses=2]
+ br label %bb3
+
+bb3: ; preds = %bb2
+ %tmp25 = fcmp ogt float %tmp19, 2.500000e+00 ; <i1> [#uses=1]
+ br i1 %tmp25, label %bb2, label %bb3.bb5.preheader_crit_edge
+
+bb3.bb5.preheader_crit_edge: ; preds = %bb3
+ %tmp24.lcssa = phi i32 [ %tmp24, %bb3 ] ; <i32> [#uses=1]
+ %tmp23.lcssa = phi float [ %tmp23, %bb3 ] ; <float> [#uses=1]
+ %tmp19.lcssa = phi float [ %tmp19, %bb3 ] ; <float> [#uses=1]
+ br label %bb5.preheader
+
+bb5.preheader: ; preds = %bb3.bb5.preheader_crit_edge, %bb3.preheader
+ %distERBlo.0.lcssa = phi float [ %tmp19.lcssa, %bb3.bb5.preheader_crit_edge ], [ %distERBlo.0.ph, %bb3.preheader ] ; <float> [#uses=2]
+ %loPart.0.lcssa = phi i32 [ %tmp24.lcssa, %bb3.bb5.preheader_crit_edge ], [ %loPart.118, %bb3.preheader ] ; <i32> [#uses=1]
+ %peakCount.0.lcssa = phi float [ %tmp23.lcssa, %bb3.bb5.preheader_crit_edge ], [ %peakCount.117, %bb3.preheader ] ; <float> [#uses=2]
+ %.not10 = fcmp olt float %distERBhi.0.ph, 2.500000e+00 ; <i1> [#uses=1]
+ %tmp26 = icmp sgt i32 %tmp3, %hiPart.119 ; <i1> [#uses=1]
+ %or.cond11 = and i1 %tmp26, %.not10 ; <i1> [#uses=1]
+ br i1 %or.cond11, label %bb.nph12, label %bb7
+
+bb.nph12: ; preds = %bb5.preheader
+ br label %bb4
+
+bb4: ; preds = %bb5, %bb.nph12
+ %distERBhi.29 = phi float [ %tmp30, %bb5 ], [ %distERBhi.0.ph, %bb.nph12 ] ; <float> [#uses=1]
+ %hiPart.08 = phi i32 [ %tmp31, %bb5 ], [ %hiPart.119, %bb.nph12 ] ; <i32> [#uses=2]
+ %peakCount.27 = phi float [ %tmp35, %bb5 ], [ %peakCount.0.lcssa, %bb.nph12 ] ; <float> [#uses=1]
+ %tmp27 = sext i32 %hiPart.08 to i64 ; <i64> [#uses=1]
+ %tmp28 = getelementptr float* %pTmp1, i64 %tmp27 ; <float*> [#uses=1]
+ %tmp29 = load float* %tmp28, align 4 ; <float> [#uses=1]
+ %tmp30 = fadd float %tmp29, %distERBhi.29 ; <float> [#uses=3]
+ %tmp31 = add i32 %hiPart.08, 1 ; <i32> [#uses=4]
+ %tmp32 = sext i32 %tmp31 to i64 ; <i64> [#uses=1]
+ %tmp33 = getelementptr float* %peakWeight, i64 %tmp32 ; <float*> [#uses=1]
+ %tmp34 = load float* %tmp33, align 4 ; <float> [#uses=1]
+ %tmp35 = fadd float %tmp34, %peakCount.27 ; <float> [#uses=2]
+ br label %bb5
+
+bb5: ; preds = %bb4
+ %.not = fcmp olt float %tmp30, 2.500000e+00 ; <i1> [#uses=1]
+ %tmp36 = icmp sgt i32 %tmp3, %tmp31 ; <i1> [#uses=1]
+ %or.cond = and i1 %tmp36, %.not ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb4, label %bb5.bb7_crit_edge
+
+bb5.bb7_crit_edge: ; preds = %bb5
+ %tmp35.lcssa = phi float [ %tmp35, %bb5 ] ; <float> [#uses=1]
+ %tmp31.lcssa = phi i32 [ %tmp31, %bb5 ] ; <i32> [#uses=1]
+ %tmp30.lcssa = phi float [ %tmp30, %bb5 ] ; <float> [#uses=1]
+ br label %bb7
+
+bb7: ; preds = %bb5.bb7_crit_edge, %bb5.preheader
+ %distERBhi.2.lcssa = phi float [ %tmp30.lcssa, %bb5.bb7_crit_edge ], [ %distERBhi.0.ph, %bb5.preheader ] ; <float> [#uses=2]
+ %hiPart.0.lcssa = phi i32 [ %tmp31.lcssa, %bb5.bb7_crit_edge ], [ %hiPart.119, %bb5.preheader ] ; <i32> [#uses=1]
+ %peakCount.2.lcssa = phi float [ %tmp35.lcssa, %bb5.bb7_crit_edge ], [ %peakCount.0.lcssa, %bb5.preheader ] ; <float> [#uses=2]
+ %tmp37 = fadd float %distERBlo.0.lcssa, %distERBhi.2.lcssa ; <float> [#uses=1]
+ %tmp38 = fdiv float %peakCount.2.lcssa, %tmp37 ; <float> [#uses=1]
+ %tmp39 = fmul float %tmp38, %tmp1 ; <float> [#uses=2]
+ %tmp40 = fmul float %tmp39, %tmp39 ; <float> [#uses=2]
+ %tmp41 = fmul float %tmp40, %tmp40 ; <float> [#uses=1]
+ %tmp42 = fadd float %tmp41, 1.000000e+00 ; <float> [#uses=1]
+ %tmp43 = fdiv float 1.000000e+00, %tmp42 ; <float> [#uses=1]
+ %tmp44 = sext i32 %part.016 to i64 ; <i64> [#uses=1]
+ %tmp45 = getelementptr float* %nrgReducePeakrate, i64 %tmp44 ; <float*> [#uses=1]
+ store float %tmp43, float* %tmp45, align 4
+ %tmp46 = add i32 %part.016, 1 ; <i32> [#uses=2]
+ br label %bb8
+
+bb8: ; preds = %bb7
+ %tmp47 = icmp slt i32 %tmp46, %bandEdgeIndex ; <i1> [#uses=1]
+ br i1 %tmp47, label %bb, label %bb8.return_crit_edge
+
+bb8.return_crit_edge: ; preds = %bb8
+ br label %return
+
+return: ; preds = %bb8.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/iv-zext.ll b/test/Transforms/IndVarSimplify/iv-zext.ll
new file mode 100644
index 0000000..1cc559f
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/iv-zext.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: not grep and %t
+; RUN: not grep zext %t
+
+target datalayout = "-p:64:64:64"
+
+define void @foo(double* %d, i64 %n) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %indvar.i8 = and i64 %indvar, 255
+ %t0 = getelementptr double* %d, i64 %indvar.i8
+ %t1 = load double* %t0
+ %t2 = fmul double %t1, 0.1
+ store double %t2, double* %t0
+ %indvar.i24 = and i64 %indvar, 16777215
+ %t3 = getelementptr double* %d, i64 %indvar.i24
+ %t4 = load double* %t3
+ %t5 = fmul double %t4, 2.3
+ store double %t5, double* %t3
+ %t6 = getelementptr double* %d, i64 %indvar
+ %t7 = load double* %t6
+ %t8 = fmul double %t7, 4.5
+ store double %t8, double* %t6
+ %indvar.next = add i64 %indvar, 1
+ %exitcond = icmp eq i64 %indvar.next, 10
+ br i1 %exitcond, label %return, label %loop
+
+return:
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/lftr-other-uses.ll b/test/Transforms/IndVarSimplify/lftr-other-uses.ll
new file mode 100644
index 0000000..09ec237
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/lftr-other-uses.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -indvars -disable-output
+
+; Don't RAUW the loop's original comparison instruction if it has
+; other uses which aren't dominated by the new comparison instruction.
+
+ %struct.DecRefPicMarking_s = type { i32, i32, i32, i32, i32, %struct.DecRefPicMarking_s* }
+ %struct.datapartition = type { %typedef.Bitstream*, %typedef.DecodingEnvironment, i32 (%struct.syntaxelement*, %struct.img_par*, %struct.inp_par*, %struct.datapartition*)* }
+ %struct.img_par = type { i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [16 x [16 x i16]], [6 x [32 x i32]], [16 x [16 x i32]], [4 x [12 x [4 x [4 x i32]]]], [16 x i32], i32**, i32*, i32***, i32**, i32, i32, i32, i32, %typedef.Slice*, %struct.macroblock*, i32, i32, i32, i32, i32, i32, i32**, %struct.DecRefPicMarking_s*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32***, i32***, i32****, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.timeb, %struct.timeb, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.inp_par = type { [100 x i8], [100 x i8], [100 x i8], i32, i32, i32, i32, i32, i32, i32 }
+ %struct.macroblock = type { i32, i32, i32, %struct.macroblock*, %struct.macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], i32, i64, i64, i32, i32, [4 x i32], [4 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.syntaxelement = type { i32, i32, i32, i32, i32, i32, i32, i32, void (i32, i32, i32*, i32*)*, void (%struct.syntaxelement*, %struct.inp_par*, %struct.img_par*, %typedef.DecodingEnvironment*)* }
+ %struct.timeb = type { i32, i16, i16, i16 }
+ %typedef.BiContextType = type { i16, i8 }
+ %typedef.Bitstream = type { i32, i32, i32, i32, i8*, i32 }
+ %typedef.DecodingEnvironment = type { i32, i32, i32, i32, i32, i8*, i32* }
+ %typedef.MotionInfoContexts = type { [4 x [11 x %typedef.BiContextType]], [2 x [9 x %typedef.BiContextType]], [2 x [10 x %typedef.BiContextType]], [2 x [6 x %typedef.BiContextType]], [4 x %typedef.BiContextType], [4 x %typedef.BiContextType], [3 x %typedef.BiContextType] }
+ %typedef.Slice = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.datapartition*, %typedef.MotionInfoContexts*, %typedef.TextureInfoContexts*, i32, i32*, i32*, i32*, i32, i32*, i32*, i32*, i32 (%struct.img_par*, %struct.inp_par*)*, i32, i32, i32, i32 }
+ %typedef.TextureInfoContexts = type { [2 x %typedef.BiContextType], [4 x %typedef.BiContextType], [3 x [4 x %typedef.BiContextType]], [10 x [4 x %typedef.BiContextType]], [10 x [15 x %typedef.BiContextType]], [10 x [15 x %typedef.BiContextType]], [10 x [5 x %typedef.BiContextType]], [10 x [5 x %typedef.BiContextType]], [10 x [15 x %typedef.BiContextType]], [10 x [15 x %typedef.BiContextType]] }
+
+define void @readCBP_CABAC(%struct.syntaxelement* %se, %struct.inp_par* %inp, %struct.img_par* %img.1, %typedef.DecodingEnvironment* %dep_dp) {
+entry:
+ br label %loopentry.0
+
+loopentry.0: ; preds = %loopentry.1, %entry
+ %mb_y.0 = phi i32 [ 0, %entry ], [ %tmp.152, %loopentry.1 ] ; <i32> [#uses=2]
+ %tmp.14 = icmp sle i32 %mb_y.0, 3 ; <i1> [#uses=2]
+ %tmp.15 = zext i1 %tmp.14 to i32 ; <i32> [#uses=0]
+ br i1 %tmp.14, label %loopentry.1, label %loopexit.0
+
+loopentry.1: ; preds = %loopentry.0
+ %tmp.152 = add i32 %mb_y.0, 2 ; <i32> [#uses=1]
+ br label %loopentry.0
+
+loopexit.0: ; preds = %loopentry.0
+ unreachable
+}
diff --git a/test/Transforms/IndVarSimplify/lftr-promote.ll b/test/Transforms/IndVarSimplify/lftr-promote.ll
new file mode 100644
index 0000000..c4ecc84
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/lftr-promote.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -indvars -S | grep add | count 1
+
+; Indvars should be able to compute the exit value of this loop
+; without any additional arithmetic. The only add needed should
+; be the canonical IV increment.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define void @foo(double* %p, i32 %n) nounwind {
+entry:
+ %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ br label %bb2
+
+bb2: ; preds = %bb3, %bb.nph
+ %i.01 = phi i32 [ %7, %bb3 ], [ 0, %bb.nph ] ; <i32> [#uses=3]
+ %1 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
+ %2 = getelementptr double* %p, i64 %1 ; <double*> [#uses=1]
+ %3 = load double* %2, align 8 ; <double> [#uses=1]
+ %4 = fmul double %3, 1.100000e+00 ; <double> [#uses=1]
+ %5 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
+ %6 = getelementptr double* %p, i64 %5 ; <double*> [#uses=1]
+ store double %4, double* %6, align 8
+ %7 = add i32 %i.01, 1 ; <i32> [#uses=2]
+ br label %bb3
+
+bb3: ; preds = %bb2
+ %8 = icmp slt i32 %7, %n ; <i1> [#uses=1]
+ br i1 %8, label %bb2, label %bb3.return_crit_edge
+
+bb3.return_crit_edge: ; preds = %bb3
+ br label %return
+
+return: ; preds = %bb3.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/lftr_simple.ll b/test/Transforms/IndVarSimplify/lftr_simple.ll
new file mode 100644
index 0000000..e373013
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/lftr_simple.ll
@@ -0,0 +1,22 @@
+; LFTR should eliminate the need for the computation of i*i completely. It
+; is only used to compute the exit value.
+; RUN: opt < %s -indvars -dce -S | not grep mul
+
+@A = external global i32 ; <i32*> [#uses=1]
+
+define i32 @quadratic_setlt() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 7, %entry ], [ %i.next, %loop ] ; <i32> [#uses=5]
+ %i.next = add i32 %i, 1 ; <i32> [#uses=1]
+ store i32 %i, i32* @A
+ %i2 = mul i32 %i, %i ; <i32> [#uses=1]
+ %c = icmp slt i32 %i2, 1000 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %i
+}
+
diff --git a/test/Transforms/IndVarSimplify/loop-invariant-step.ll b/test/Transforms/IndVarSimplify/loop-invariant-step.ll
new file mode 100644
index 0000000..2d2d1fe
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop-invariant-step.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -loop-index-split -instcombine -indvars -disable-output
+; PR4455
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+declare i8* @fast_memcpy(i8*, i8*, i64)
+
+define void @dvdsub_decode() nounwind {
+entry: ; preds = %bb1
+ br label %LoopA
+
+LoopA: ; preds = %LoopA, %entry
+ %x1.0.i17 = phi i32 [ %t0, %LoopA ], [ 0, %entry ] ; <i32> [#uses=2]
+ %t0 = add i32 %x1.0.i17, 1 ; <i32> [#uses=1]
+ br i1 undef, label %LoopA, label %middle
+
+middle: ; preds = %LoopA
+ %t1 = sub i32 0, %x1.0.i17 ; <i32> [#uses=1]
+ %t2 = add i32 %t1, 1 ; <i32> [#uses=1]
+ br label %LoopB
+
+LoopB: ; preds = %LoopB, %bb.nph.i27
+ %y.029.i = phi i32 [ 0, %middle ], [ %t7, %LoopB ] ; <i32> [#uses=2]
+ %t3 = mul i32 %y.029.i, %t2 ; <i32> [#uses=1]
+ %t4 = sext i32 %t3 to i64 ; <i64> [#uses=1]
+ %t5 = getelementptr i8* null, i64 %t4 ; <i8*> [#uses=1]
+ %t6 = call i8* @fast_memcpy(i8* %t5, i8* undef, i64 undef) nounwind ; <i8*> [#uses=0]
+ %t7 = add i32 %y.029.i, 1 ; <i32> [#uses=1]
+ br i1 undef, label %LoopB, label %exit
+
+exit:
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate10.ll b/test/Transforms/IndVarSimplify/loop_evaluate10.ll
new file mode 100644
index 0000000..4ec4aca
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate10.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -indvars -S \
+; RUN: | grep {%b.1 = phi i32 \\\[ 2, %bb \\\], \\\[ 1, %bb2 \\\]}
+
+; This loop has multiple exits, and the value of %b1 depends on which
+; exit is taken. Indvars should correctly compute the exit values.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-linux-gnu"
+ %struct..0anon = type <{ i8, [3 x i8] }>
+
+define i32 @main() nounwind {
+entry:
+ br label %bb2
+
+bb2: ; preds = %bb, %entry
+ %sdata.0 = phi i32 [ 1, %entry ], [ %ins10, %bb ] ; <i32> [#uses=2]
+ %b.0 = phi i32 [ 0, %entry ], [ %t0, %bb ] ; <i32> [#uses=2]
+ %tmp6 = trunc i32 %sdata.0 to i8 ; <i8> [#uses=2]
+ %t2 = and i8 %tmp6, 1 ; <i8> [#uses=1]
+ %t3 = icmp eq i8 %t2, 0 ; <i1> [#uses=1]
+ %t4 = xor i8 %tmp6, 1 ; <i8> [#uses=1]
+ %tmp8 = zext i8 %t4 to i32 ; <i32> [#uses=1]
+ %mask9 = and i32 %sdata.0, -256 ; <i32> [#uses=1]
+ %ins10 = or i32 %tmp8, %mask9 ; <i32> [#uses=1]
+ br i1 %t3, label %bb3, label %bb
+
+bb: ; preds = %bb2
+ %t0 = add i32 %b.0, 1 ; <i32> [#uses=3]
+ %t1 = icmp sgt i32 %t0, 100 ; <i1> [#uses=1]
+ br i1 %t1, label %bb3, label %bb2
+
+bb3: ; preds = %bb, %bb2
+ %b.1 = phi i32 [ %t0, %bb ], [ %b.0, %bb2 ] ; <i32> [#uses=1]
+ %t5 = icmp eq i32 %b.1, 1 ; <i1> [#uses=1]
+ br i1 %t5, label %bb5, label %bb4
+
+bb4: ; preds = %bb3
+ tail call void @abort() noreturn nounwind
+ unreachable
+
+bb5: ; preds = %bb3
+ ret i32 0
+}
+
+declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
+
+declare void @abort() noreturn nounwind
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate11.ll b/test/Transforms/IndVarSimplify/loop_evaluate11.ll
new file mode 100644
index 0000000..40b785e
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate11.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -domfrontier -indvars -loop-deletion
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+define void @slap_sl_mem_create() nounwind {
+entry:
+ br label %bb15
+
+bb15: ; preds = %bb15, %entry
+ %order_end.0 = phi i32 [ 0, %entry ], [ %tmp, %bb15 ] ; <i32> [#uses=1]
+ %tmp = add i32 %order_end.0, 1 ; <i32> [#uses=2]
+ br i1 undef, label %bb17, label %bb15
+
+bb17: ; preds = %bb17, %bb15
+ %order_start.0 = phi i32 [ %tmp1, %bb17 ], [ 0, %bb15 ] ; <i32> [#uses=2]
+ %tmp1 = add i32 %order_start.0, 1 ; <i32> [#uses=2]
+ %tmp2 = icmp eq i32 undef, 0 ; <i1> [#uses=1]
+ br i1 %tmp2, label %bb18, label %bb17
+
+bb18: ; preds = %bb17
+ %tmp3 = sub i32 %tmp, %tmp1 ; <i32> [#uses=0]
+ br label %bb59
+
+bb51: ; preds = %bb59
+ %tmp4 = add i32 %order_start.0, 2 ; <i32> [#uses=1]
+ %tmp5 = add i32 %tmp4, undef ; <i32> [#uses=1]
+ %tmp6 = lshr i32 undef, %tmp5 ; <i32> [#uses=1]
+ %tmp7 = icmp eq i32 %tmp6, 0 ; <i1> [#uses=1]
+ br i1 %tmp7, label %bb52, label %bb59
+
+bb59: ; preds = %bb51, %bb18
+ br label %bb51
+
+bb52: ; preds = %bb51
+ unreachable
+}
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate7.ll b/test/Transforms/IndVarSimplify/loop_evaluate7.ll
new file mode 100644
index 0000000..b9c0b12
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate7.ll
@@ -0,0 +1,61 @@
+; RUN: opt < %s -indvars
+; PR4436
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define i8* @string_expandtabs(i32 %n, i8* %m) nounwind {
+entry:
+ br i1 undef, label %bb33, label %bb1
+
+bb1: ; preds = %entry
+ br i1 undef, label %overflow1, label %bb15
+
+bb15: ; preds = %bb1
+ br i1 undef, label %bb33, label %bb17
+
+bb17: ; preds = %bb15
+ br label %bb30
+
+bb19: ; preds = %bb30
+ br i1 undef, label %bb20, label %bb29
+
+bb20: ; preds = %bb19
+ %0 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %1 = sub i32 %0, %n ; <i32> [#uses=1]
+ br label %bb23
+
+bb21: ; preds = %bb23
+ %2 = icmp ult i8* %q.0, %m ; <i1> [#uses=1]
+ br i1 %2, label %bb22, label %overflow2
+
+bb22: ; preds = %bb21
+ %3 = getelementptr i8* %q.0, i32 1 ; <i8*> [#uses=1]
+ br label %bb23
+
+bb23: ; preds = %bb22, %bb20
+ %i.2 = phi i32 [ %1, %bb20 ], [ %4, %bb22 ] ; <i32> [#uses=1]
+ %q.0 = phi i8* [ undef, %bb20 ], [ %3, %bb22 ] ; <i8*> [#uses=3]
+ %4 = add i32 %i.2, -1 ; <i32> [#uses=2]
+ %5 = icmp eq i32 %4, -1 ; <i1> [#uses=1]
+ br i1 %5, label %bb29, label %bb21
+
+bb29: ; preds = %bb23, %bb19
+ %q.1 = phi i8* [ undef, %bb19 ], [ %q.0, %bb23 ] ; <i8*> [#uses=0]
+ br label %bb30
+
+bb30: ; preds = %bb29, %bb17
+ br i1 undef, label %bb19, label %bb33
+
+overflow2: ; preds = %bb21
+ br i1 undef, label %bb32, label %overflow1
+
+bb32: ; preds = %overflow2
+ br label %overflow1
+
+overflow1: ; preds = %bb32, %overflow2, %bb1
+ ret i8* null
+
+bb33: ; preds = %bb30, %bb15, %entry
+ ret i8* undef
+}
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate8.ll b/test/Transforms/IndVarSimplify/loop_evaluate8.ll
new file mode 100644
index 0000000..2a9d205
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate8.ll
@@ -0,0 +1,63 @@
+; RUN: opt < %s -indvars -S | not grep select
+
+; This loop has backedge-taken-count zero. Indvars shouldn't expand any
+; instructions to compute a trip count.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define i8* @string_expandtabs() nounwind {
+entry:
+ br i1 undef, label %bb33, label %bb1
+
+bb1: ; preds = %entry
+ br i1 undef, label %overflow1, label %bb15
+
+bb15: ; preds = %bb1
+ br i1 undef, label %bb33, label %bb17
+
+bb17: ; preds = %bb15
+ br label %bb30
+
+bb19: ; preds = %bb30
+ br i1 undef, label %bb20, label %bb29
+
+bb20: ; preds = %bb19
+ %0 = load i32* undef, align 4 ; <i32> [#uses=1]
+ %1 = sub i32 %0, undef ; <i32> [#uses=1]
+ br label %bb23
+
+bb21: ; preds = %bb23
+ %2 = icmp ult i8* %q.0, undef ; <i1> [#uses=1]
+ br i1 %2, label %bb22, label %overflow2
+
+bb22: ; preds = %bb21
+ %3 = getelementptr i8* %q.0, i32 1 ; <i8*> [#uses=1]
+ br label %bb23
+
+bb23: ; preds = %bb22, %bb20
+ %i.2 = phi i32 [ %1, %bb20 ], [ %4, %bb22 ] ; <i32> [#uses=1]
+ %q.0 = phi i8* [ undef, %bb20 ], [ %3, %bb22 ] ; <i8*> [#uses=3]
+ %4 = add i32 %i.2, -1 ; <i32> [#uses=2]
+ %5 = icmp eq i32 %4, -1 ; <i1> [#uses=1]
+ br i1 %5, label %bb29, label %bb21
+
+bb29: ; preds = %bb23, %bb19
+ %q.1 = phi i8* [ undef, %bb19 ], [ %q.0, %bb23 ] ; <i8*> [#uses=0]
+ br label %bb30
+
+bb30: ; preds = %bb29, %bb17
+ br i1 undef, label %bb19, label %bb33
+
+overflow2: ; preds = %bb21
+ br i1 undef, label %bb32, label %overflow1
+
+bb32: ; preds = %overflow2
+ br label %overflow1
+
+overflow1: ; preds = %bb32, %overflow2, %bb1
+ ret i8* null
+
+bb33: ; preds = %bb30, %bb15, %entry
+ ret i8* undef
+}
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate9.ll b/test/Transforms/IndVarSimplify/loop_evaluate9.ll
new file mode 100644
index 0000000..8184a73
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate9.ll
@@ -0,0 +1,78 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep {\[%\]tmp7 = icmp eq i8 -28, -28} %t
+; RUN: grep {\[%\]tmp8 = icmp eq i8 63, 63} %t
+; PR4477
+
+; Indvars should compute the exit values in loop.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %struct.cc70a02__complex_integers__complex_type = type { i8, i8 }
[email protected] = internal constant [13 x i8] c"fc70a00.adb\00\00", align 1 ; <[13 x i8]*> [#uses=1]
+
+define void @_ada_cc70a02() {
+entry:
+ br label %bb1.i
+
+bb1.i: ; preds = %bb2.i, %entry
+ %indvar.i = phi i32 [ 0, %entry ], [ %indvar.next.i, %bb2.i ] ; <i32> [#uses=2]
+ %result.0.i = phi i16 [ 0, %entry ], [ %ins36.i, %bb2.i ] ; <i16> [#uses=2]
+ %tmp38.i = trunc i16 %result.0.i to i8 ; <i8> [#uses=2]
+ %tmp = add i8 %tmp38.i, 96 ; <i8> [#uses=1]
+ %tmp1 = icmp ugt i8 %tmp, -56 ; <i1> [#uses=1]
+ br i1 %tmp1, label %bb.i.i, label %bb1.i.i
+
+bb.i.i: ; preds = %bb1.i
+ tail call void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 24) noreturn
+ unreachable
+
+bb1.i.i: ; preds = %bb1.i
+ %tmp41.i = lshr i16 %result.0.i, 8 ; <i16> [#uses=1]
+ %tmp42.i = trunc i16 %tmp41.i to i8 ; <i8> [#uses=2]
+ %tmp2 = add i8 %tmp42.i, 109 ; <i8> [#uses=1]
+ %tmp3 = icmp ugt i8 %tmp2, -56 ; <i1> [#uses=1]
+ br i1 %tmp3, label %bb2.i.i, label %cc70a02__complex_integers__Oadd.153.exit.i
+
+bb2.i.i: ; preds = %bb1.i.i
+ tail call void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 24) noreturn
+ unreachable
+
+cc70a02__complex_integers__Oadd.153.exit.i: ; preds = %bb1.i.i
+ %tmp4 = add i8 %tmp38.i, -4 ; <i8> [#uses=2]
+ %tmp5 = add i8 %tmp42.i, 9 ; <i8> [#uses=2]
+ %tmp25.i = zext i8 %tmp4 to i16 ; <i16> [#uses=1]
+ %tmp33.i = zext i8 %tmp5 to i16 ; <i16> [#uses=1]
+ %tmp34.i = shl i16 %tmp33.i, 8 ; <i16> [#uses=1]
+ %ins36.i = or i16 %tmp34.i, %tmp25.i ; <i16> [#uses=1]
+ %tmp6 = icmp eq i32 %indvar.i, 6 ; <i1> [#uses=1]
+ br i1 %tmp6, label %cc70a02__complex_multiplication.170.exit, label %bb2.i
+
+bb2.i: ; preds = %cc70a02__complex_integers__Oadd.153.exit.i
+ %indvar.next.i = add i32 %indvar.i, 1 ; <i32> [#uses=1]
+ br label %bb1.i
+
+cc70a02__complex_multiplication.170.exit: ; preds = %cc70a02__complex_integers__Oadd.153.exit.i
+ %tmp7 = icmp eq i8 %tmp4, -28 ; <i1> [#uses=1]
+ %tmp8 = icmp eq i8 %tmp5, 63 ; <i1> [#uses=1]
+ %or.cond = and i1 %tmp8, %tmp7 ; <i1> [#uses=1]
+ br i1 %or.cond, label %return, label %bb1
+
+bb1: ; preds = %cc70a02__complex_multiplication.170.exit
+ tail call void @exit(i32 1)
+ ret void
+
+return: ; preds = %cc70a02__complex_multiplication.170.exit
+ ret void
+}
+
+declare fastcc void @cc70a02__complex_integers__complex.164(%struct.cc70a02__complex_integers__complex_type* noalias nocapture sret, i8 signext, i8 signext) nounwind
+
+declare fastcc void @cc70a02__complex_integers__Osubtract.149(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4)
+
+declare fastcc void @cc70a02__complex_integers__Oadd.153(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4, %struct.cc70a02__complex_integers__complex_type* byval align 4)
+
+declare fastcc void @cc70a02__complex_multiplication.170(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4)
+
+declare void @__gnat_rcheck_12(i8*, i32) noreturn
+
+declare void @exit(i32)
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate_1.ll b/test/Transforms/IndVarSimplify/loop_evaluate_1.ll
new file mode 100644
index 0000000..abf1bc3
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate_1.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -indvars -loop-deletion -simplifycfg -S | not grep br
+;
+; Testcase distilled from 256.bzip2
+
+define i32 @main() {
+entry:
+ br label %loopentry
+
+loopentry: ; preds = %loopentry, %entry
+ %indvar1 = phi i32 [ 0, %entry ], [ %indvar.next2, %loopentry ] ; <i32> [#uses=1]
+ %h.0 = phi i32 [ %tmp.2, %loopentry ], [ 4, %entry ] ; <i32> [#uses=1]
+ %tmp.1 = mul i32 %h.0, 3 ; <i32> [#uses=1]
+ %tmp.2 = add i32 %tmp.1, 1 ; <i32> [#uses=2]
+ %indvar.next2 = add i32 %indvar1, 1 ; <i32> [#uses=2]
+ %exitcond3 = icmp ne i32 %indvar.next2, 4 ; <i1> [#uses=1]
+ br i1 %exitcond3, label %loopentry, label %loopexit
+
+loopexit: ; preds = %loopentry
+ ret i32 %tmp.2
+}
+
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate_2.ll b/test/Transforms/IndVarSimplify/loop_evaluate_2.ll
new file mode 100644
index 0000000..c0099a8
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate_2.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -indvars -loop-deletion -simplifycfg | opt \
+; RUN: -analyze -loops | not grep "^Loop Containing"
+; PR1179
+
+define i32 @ltst(i32 %x) {
+entry:
+ icmp sgt i32 %x, 0 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb.preheader, label %bb8
+
+bb.preheader: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb, %bb.preheader
+ %i.01.0 = phi i32 [ %tmp4, %bb ], [ 0, %bb.preheader ] ; <i32> [#uses=1]
+ %j.03.0 = phi i32 [ %tmp2, %bb ], [ 0, %bb.preheader ] ; <i32> [#uses=1]
+ %tmp4 = add i32 %i.01.0, 1 ; <i32> [#uses=2]
+ %tmp2 = add i32 %j.03.0, 1 ; <i32> [#uses=2]
+ icmp slt i32 %tmp4, %x ; <i1>:1 [#uses=1]
+ br i1 %1, label %bb, label %bb8.loopexit
+
+bb8.loopexit: ; preds = %bb
+ br label %bb8
+
+bb8: ; preds = %bb8.loopexit, %entry
+ %j.03.1 = phi i32 [ 0, %entry ], [ %tmp2, %bb8.loopexit ] ; <i32> [#uses=1]
+ ret i32 %j.03.1
+}
+
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate_3.ll b/test/Transforms/IndVarSimplify/loop_evaluate_3.ll
new file mode 100644
index 0000000..65c66f7
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate_3.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -indvars -S | grep {ret i32 600000}
+; PR1179
+
+define i32 @foo() {
+entry:
+ br label %bb5
+
+bb5: ; preds = %bb5, %entry
+ %i.01.0 = phi i32 [ 0, %entry ], [ %tmp2, %bb5 ] ; <i32> [#uses=1]
+ %x.03.0 = phi i32 [ 0, %entry ], [ %tmp4, %bb5 ] ; <i32> [#uses=1]
+ %tmp2 = add i32 %i.01.0, 3 ; <i32> [#uses=2]
+ %tmp4 = add i32 %x.03.0, 1 ; <i32> [#uses=2]
+ icmp slt i32 %tmp4, 200000 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb5, label %bb7
+
+bb7: ; preds = %bb5
+ ret i32 %tmp2
+}
+
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate_4.ll b/test/Transforms/IndVarSimplify/loop_evaluate_4.ll
new file mode 100644
index 0000000..e4b642c
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate_4.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -indvars -S | grep {ret i32 9900}
+; PR1179
+
+define i32 @test4() {
+entry:
+ br label %bb7
+
+bb7: ; preds = %bb7, %entry
+ %v.01.0 = phi i32 [ 0, %entry ], [ %tmp4, %bb7 ] ; <i32> [#uses=1]
+ %i.03.0 = phi i32 [ 0, %entry ], [ %tmp6, %bb7 ] ; <i32> [#uses=2]
+ %tmp2 = shl i32 %i.03.0, 1 ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp2, %v.01.0 ; <i32> [#uses=2]
+ %tmp6 = add i32 %i.03.0, 1 ; <i32> [#uses=2]
+ icmp slt i32 %tmp6, 100 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb7, label %bb9
+
+bb9: ; preds = %bb7
+ ret i32 %tmp4
+}
+
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate_5.ll b/test/Transforms/IndVarSimplify/loop_evaluate_5.ll
new file mode 100644
index 0000000..80b961a
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate_5.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -indvars -S | grep {120, %bb2.bb3_crit_edge}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+
+; Indvars should be able to compute an exit value for %tmp1.
+
+define i32 @testcase(i5 zeroext %k) nounwind readnone {
+entry:
+ br i1 false, label %bb3, label %bb.nph
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb2, %bb.nph
+ %result2 = phi i32 [ %tmp1, %bb2 ], [ 0, %bb.nph ] ; <i32> [#uses=1]
+ %k_01 = phi i5 [ %indvar_next1, %bb2 ], [ 0, %bb.nph ] ; <i5> [#uses=2]
+ %tmp2 = zext i5 %k_01 to i32 ; <i32> [#uses=1]
+ %tmp1 = add i32 %tmp2, %result2 ; <i32> [#uses=2]
+ %indvar_next1 = add i5 %k_01, 1 ; <i5> [#uses=2]
+ br label %bb2
+
+bb2: ; preds = %bb
+ %phitmp = icmp eq i5 %indvar_next1, -16 ; <i1> [#uses=1]
+ br i1 %phitmp, label %bb2.bb3_crit_edge, label %bb
+
+bb2.bb3_crit_edge: ; preds = %bb2
+ br label %bb3
+
+bb3: ; preds = %bb2.bb3_crit_edge, %entry
+ %result.lcssa = phi i32 [ %tmp1, %bb2.bb3_crit_edge ], [ 0, %entry ] ; <i32> [#uses=1]
+ ret i32 %result.lcssa
+}
diff --git a/test/Transforms/IndVarSimplify/loop_evaluate_6.ll b/test/Transforms/IndVarSimplify/loop_evaluate_6.ll
new file mode 100644
index 0000000..da38de5
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/loop_evaluate_6.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -indvars -loop-deletion -S | grep phi | count 1
+; XFAIL: *
+
+; Indvars can't evaluate this loop, because ScalarEvolution can't compute
+; an exact trip count, because it doesn't know if dividing by the stride will
+; have a remainder. It could be done with more aggressive VRP though.
+
+define i32 @test(i32 %x_offs) nounwind readnone {
+entry:
+ %0 = icmp sgt i32 %x_offs, 4 ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %bb2
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %x_offs_addr.01 = phi i32 [ %1, %bb1 ], [ %x_offs, %bb.nph ] ; <i32> [#uses=1]
+ %1 = add i32 %x_offs_addr.01, -4 ; <i32> [#uses=3]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %2 = icmp sgt i32 %1, 4 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %bb1.bb2_crit_edge
+
+bb1.bb2_crit_edge: ; preds = %bb1
+ br label %bb2
+
+bb2: ; preds = %bb1.bb2_crit_edge, %entry
+ %x_offs_addr.0.lcssa = phi i32 [ %1, %bb1.bb2_crit_edge ], [ %x_offs, %entry ] ; <i32> [#uses=1]
+ ret i32 %x_offs_addr.0.lcssa
+}
diff --git a/test/Transforms/IndVarSimplify/masked-iv.ll b/test/Transforms/IndVarSimplify/masked-iv.ll
new file mode 100644
index 0000000..f1f5af9
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/masked-iv.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: not grep trunc %t
+; RUN: grep and %t | count 1
+
+; Indvars should do the IV arithmetic in the canonical IV type (i64),
+; and only use one truncation.
+
+define void @foo(i64* %A, i64* %B, i64 %n, i64 %a, i64 %s) nounwind {
+entry:
+ %t0 = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
+ br i1 %t0, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb, %bb.preheader
+ %i.01 = phi i64 [ %t6, %bb ], [ %a, %bb.preheader ] ; <i64> [#uses=3]
+ %t1 = and i64 %i.01, 255 ; <i64> [#uses=1]
+ %t2 = getelementptr i64* %A, i64 %t1 ; <i64*> [#uses=1]
+ store i64 %i.01, i64* %t2, align 8
+ %t6 = add i64 %i.01, %s ; <i64> [#uses=1]
+ br label %bb
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/max-pointer.ll b/test/Transforms/IndVarSimplify/max-pointer.ll
new file mode 100644
index 0000000..71bc720
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/max-pointer.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep {icmp ugt i8\\\*} %t | count 1
+; RUN: grep {icmp sgt i8\\\*} %t | count 1
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+ %struct.CKenCodeCodec = type <{ i8 }>
+
+define void @foo(i8* %str1Ptr, i8* %str2Ptr, i8* %inLastBytePtr) nounwind {
+entry:
+ %0 = icmp ult i8* %str2Ptr, %str1Ptr ; <i1> [#uses=1]
+ %str2Ptr_addr.0 = select i1 %0, i8* %str1Ptr, i8* %str2Ptr ; <i8*> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb2, %entry
+ %str2Ptr_addr.1 = phi i8* [ %str2Ptr_addr.0, %entry ], [ %1, %bb2 ] ; <i8*> [#uses=1]
+ %1 = getelementptr i8* %str2Ptr_addr.1, i64 1 ; <i8*> [#uses=2]
+ %2 = icmp ult i8* %1, %inLastBytePtr ; <i1> [#uses=0]
+ br i1 false, label %bb2, label %return
+
+return: ; preds = %bb2
+ ret void
+}
+
+define void @sfoo(i8* %str1Ptr, i8* %str2Ptr, i8* %inLastBytePtr) nounwind {
+entry:
+ %0 = icmp slt i8* %str2Ptr, %str1Ptr ; <i1> [#uses=1]
+ %str2Ptr_addr.0 = select i1 %0, i8* %str1Ptr, i8* %str2Ptr ; <i8*> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb2, %entry
+ %str2Ptr_addr.1 = phi i8* [ %str2Ptr_addr.0, %entry ], [ %1, %bb2 ] ; <i8*> [#uses=1]
+ %1 = getelementptr i8* %str2Ptr_addr.1, i64 1 ; <i8*> [#uses=2]
+ %2 = icmp slt i8* %1, %inLastBytePtr ; <i1> [#uses=0]
+ br i1 false, label %bb2, label %return
+
+return: ; preds = %bb2
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/phi-uses-value-multiple-times.ll b/test/Transforms/IndVarSimplify/phi-uses-value-multiple-times.ll
new file mode 100644
index 0000000..34d432b4
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/phi-uses-value-multiple-times.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -indvars
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+@ue = external global i64
+
+define i32 @foo() nounwind {
+entry:
+ br label %bb38.i
+
+bb14.i27:
+ %t0 = load i64* @ue, align 8
+ %t1 = sub i64 %t0, %i.0.i35
+ %t2 = add i64 %t1, 1
+ br i1 undef, label %bb15.i28, label %bb19.i31
+
+bb15.i28:
+ br label %bb19.i31
+
+bb19.i31:
+ %y.0.i = phi i64 [ %t2, %bb15.i28 ], [ %t2, %bb14.i27 ]
+ br label %bb35.i
+
+bb35.i:
+ br i1 undef, label %bb37.i, label %bb14.i27
+
+bb37.i:
+ %t3 = add i64 %i.0.i35, 1
+ br label %bb38.i
+
+bb38.i:
+ %i.0.i35 = phi i64 [ 1, %entry ], [ %t3, %bb37.i ]
+ br label %bb35.i
+}
diff --git a/test/Transforms/IndVarSimplify/pointer-indvars.ll b/test/Transforms/IndVarSimplify/pointer-indvars.ll
new file mode 100644
index 0000000..6d25f90
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/pointer-indvars.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -indvars -S | grep indvar
+@G = global i32* null ; <i32**> [#uses=1]
+@Array = external global [40 x i32] ; <[40 x i32]*> [#uses=1]
+
+define void @test() {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %X = phi i32* [ getelementptr ([40 x i32]* @Array, i64 0, i64 0), %0 ], [ %X.next, %Loop ] ; <i32*> [#uses=2]
+ %X.next = getelementptr i32* %X, i64 1 ; <i32*> [#uses=1]
+ store i32* %X, i32** @G
+ br label %Loop
+}
+
diff --git a/test/Transforms/IndVarSimplify/pointer.ll b/test/Transforms/IndVarSimplify/pointer.ll
new file mode 100644
index 0000000..5eee655
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/pointer.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep {%exitcond = icmp eq i64 %indvar.next, %n} %t
+; RUN: grep {getelementptr i8\\* %A, i64 %indvar} %t
+; RUN: grep getelementptr %t | count 1
+; RUN: grep add %t | count 1
+; RUN: not grep scevgep %t
+; RUN: not grep ptrtoint %t
+
+; Indvars should be able to expand the pointer-arithmetic
+; IV into an integer IV indexing into a simple getelementptr.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
+
+define void @foo(i8* %A, i64 %n) nounwind {
+entry:
+ %0 = icmp eq i64 %n, 0 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %1 = getelementptr i8* %A, i64 %n ; <i8*> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %q.01 = phi i8* [ %2, %bb1 ], [ %A, %bb.nph ] ; <i8*> [#uses=2]
+ store i8 0, i8* %q.01, align 1
+ %2 = getelementptr i8* %q.01, i64 1 ; <i8*> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %3 = icmp eq i8* %1, %2 ; <i1> [#uses=1]
+ br i1 %3, label %bb1.return_crit_edge, label %bb
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/polynomial-expand.ll b/test/Transforms/IndVarSimplify/polynomial-expand.ll
new file mode 100644
index 0000000..2087f6a6
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/polynomial-expand.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -indvars -disable-output
+; PR5073
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @ctpmv_(float* noalias nocapture %tmp4, i32 %tmp21) nounwind {
+bb20: ; preds = %bb19
+ br label %bb24
+
+bb24: ; preds = %bb40, %bb23
+ %tmp25 = phi i32 [ %tmp43, %bb40 ], [ %tmp21, %bb20 ] ; <i32> [#uses=4]
+ %tmp26 = phi i32 [ %tmp41, %bb40 ], [ undef, %bb20 ] ; <i32> [#uses=2]
+ %tmp27 = add nsw i32 %tmp26, -1 ; <i32> [#uses=1]
+ %tmp28 = add nsw i32 %tmp25, -1 ; <i32> [#uses=2]
+ %tmp29 = icmp sgt i32 %tmp28, 0 ; <i1> [#uses=1]
+ br i1 %tmp29, label %bb30, label %bb40
+
+bb30: ; preds = %bb30, %bb24
+ %tmp31 = phi i32 [ %tmp39, %bb30 ], [ %tmp28, %bb24 ] ; <i32> [#uses=2]
+ %tmp32 = phi i32 [ %tmp37, %bb30 ], [ %tmp27, %bb24 ] ; <i32> [#uses=2]
+ %tmp33 = sext i32 %tmp32 to i64 ; <i64> [#uses=1]
+ %tmp35 = getelementptr float* %tmp4, i64 %tmp33 ; <%0*> [#uses=1]
+ %tmp36 = load float* %tmp35, align 4 ; <%0> [#uses=0]
+ %tmp37 = add nsw i32 %tmp32, -1 ; <i32> [#uses=1]
+ %tmp39 = add nsw i32 %tmp31, -1 ; <i32> [#uses=1]
+ %tmp38 = icmp eq i32 %tmp31, 1 ; <i1> [#uses=1]
+ br i1 %tmp38, label %bb40, label %bb30
+
+bb40: ; preds = %bb30, %bb24
+ %tmp41 = sub i32 %tmp26, %tmp25 ; <i32> [#uses=1]
+ %tmp43 = add nsw i32 %tmp25, -1 ; <i32> [#uses=1]
+ %tmp42 = icmp eq i32 %tmp25, 1 ; <i1> [#uses=1]
+ br i1 %tmp42, label %bb46, label %bb24
+
+bb46: ; preds = %bb40, %bb23, %bb19
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll b/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll
new file mode 100644
index 0000000..3a5c0b6
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll
@@ -0,0 +1,42 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: not grep inttoptr %t
+; RUN: not grep ptrtoint %t
+; RUN: grep scevgep %t
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+; Indvars shouldn't need inttoptr/ptrtoint to expand an address here.
+
+define void @foo(i8* %p) nounwind {
+entry:
+ br i1 true, label %bb.nph, label %for.end
+
+for.cond:
+ %phitmp = icmp slt i64 %inc, 20
+ br i1 %phitmp, label %for.body, label %for.cond.for.end_crit_edge
+
+for.cond.for.end_crit_edge:
+ br label %for.end
+
+bb.nph:
+ br label %for.body
+
+for.body:
+ %storemerge1 = phi i64 [ %inc, %for.cond ], [ 0, %bb.nph ]
+ %call = tail call i64 @bar() nounwind
+ %call2 = tail call i64 @car() nounwind
+ %conv = trunc i64 %call2 to i8
+ %conv3 = sext i8 %conv to i64
+ %add = add nsw i64 %call, %storemerge1
+ %add4 = add nsw i64 %add, %conv3
+ %arrayidx = getelementptr inbounds i8* %p, i64 %add4
+ store i8 0, i8* %arrayidx
+ %inc = add nsw i64 %storemerge1, 1
+ br label %for.cond
+
+for.end:
+ ret void
+}
+
+declare i64 @bar()
+
+declare i64 @car()
diff --git a/test/Transforms/IndVarSimplify/preserve-gep-nested.ll b/test/Transforms/IndVarSimplify/preserve-gep-nested.ll
new file mode 100644
index 0000000..bb0993c
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/preserve-gep-nested.ll
@@ -0,0 +1,75 @@
+; RUN: opt < %s -indvars -S > %t
+; Exactly one getelementptr for each load+store.
+; RUN: grep getelementptr %t | count 6
+; Each getelementptr using %struct.Q* %s as a base and not i8*.
+; RUN: grep {getelementptr \[%\]struct\\.Q\\* \[%\]s,} %t | count 6
+; No explicit integer multiplications!
+; RUN: not grep {= mul} %t
+; No i8* arithmetic or pointer casting anywhere!
+; RUN: not grep {i8\\*} %t
+; RUN: not grep bitcast %t
+; RUN: not grep inttoptr %t
+; RUN: not grep ptrtoint %t
+
+; FIXME: This test should pass with or without TargetData. Until opt
+; supports running tests without targetdata, just hardware this in.
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+%struct.Q = type { [10 x %struct.N] }
+%struct.N = type { %struct.S }
+%struct.S = type { [100 x double], [100 x double] }
+
+define void @foo(%struct.Q* %s, i64 %n) nounwind {
+entry:
+ br label %bb1
+
+bb1:
+ %i = phi i64 [ 2, %entry ], [ %i.next, %bb ]
+ %j = phi i64 [ 0, %entry ], [ %j.next, %bb ]
+ %t5 = icmp slt i64 %i, %n
+ br i1 %t5, label %bb, label %return
+
+bb:
+ %t0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %i
+ %t1 = load double* %t0, align 8
+ %t2 = fmul double %t1, 3.200000e+00
+ %t3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %i
+ store double %t2, double* %t3, align 8
+
+ %s0 = getelementptr inbounds %struct.Q* %s, i64 13, i32 0, i64 7, i32 0, i32 1, i64 %i
+ %s1 = load double* %s0, align 8
+ %s2 = fmul double %s1, 3.200000e+00
+ %s3 = getelementptr inbounds %struct.Q* %s, i64 13, i32 0, i64 7, i32 0, i32 1, i64 %i
+ store double %s2, double* %s3, align 8
+
+ %u0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 7, i32 0, i32 1, i64 %j
+ %u1 = load double* %u0, align 8
+ %u2 = fmul double %u1, 3.200000e+00
+ %u3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 7, i32 0, i32 1, i64 %j
+ store double %u2, double* %u3, align 8
+
+ %v0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 1, i64 %i
+ %v1 = load double* %v0, align 8
+ %v2 = fmul double %v1, 3.200000e+00
+ %v3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 1, i64 %i
+ store double %v2, double* %v3, align 8
+
+ %w0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %j
+ %w1 = load double* %w0, align 8
+ %w2 = fmul double %w1, 3.200000e+00
+ %w3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %j
+ store double %w2, double* %w3, align 8
+
+ %x0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 3, i32 0, i32 0, i64 %i
+ %x1 = load double* %x0, align 8
+ %x2 = fmul double %x1, 3.200000e+00
+ %x3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 3, i32 0, i32 0, i64 %i
+ store double %x2, double* %x3, align 8
+
+ %i.next = add i64 %i, 1
+ %j.next = add i64 %j, 1
+ br label %bb1
+
+return:
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll b/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll
new file mode 100644
index 0000000..e17368b
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -indvars -S \
+; RUN: | grep {\[%\]p.2.ip.1 = getelementptr \\\[3 x \\\[3 x double\\\]\\\]\\* \[%\]p, i64 2, i64 \[%\]tmp, i64 1}
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+; Indvars shouldn't expand this to
+; %p.2.ip.1 = getelementptr [3 x [3 x double]]* %p, i64 0, i64 %tmp, i64 19
+; or something. That's valid, but more obscure.
+
+define void @foo([3 x [3 x double]]* noalias %p) nounwind {
+entry:
+ br label %loop
+
+loop:
+ %i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
+ %ip = add i64 %i, 1
+ %p.2.ip.1 = getelementptr [3 x [3 x double]]* %p, i64 2, i64 %ip, i64 1
+ volatile store double 0.0, double* %p.2.ip.1
+ %i.next = add i64 %i, 1
+ br label %loop
+}
diff --git a/test/Transforms/IndVarSimplify/preserve-gep.ll b/test/Transforms/IndVarSimplify/preserve-gep.ll
new file mode 100644
index 0000000..a27d20d
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/preserve-gep.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: not grep ptrtoint %t
+; RUN: not grep inttoptr %t
+; RUN: grep getelementptr %t | count 1
+
+; Indvars shouldn't leave getelementptrs expanded out as
+; inttoptr+ptrtoint in its output in common cases.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.Foo = type { i32, i32, [10 x i32], i32 }
+
+define void @me(%struct.Foo* nocapture %Bar) nounwind {
+entry:
+ br i1 false, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %i.01 = phi i64 [ %4, %bb1 ], [ 0, %bb.nph ] ; <i64> [#uses=3]
+ %0 = getelementptr %struct.Foo* %Bar, i64 %i.01, i32 2, i64 3 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %2 = mul i32 %1, 113 ; <i32> [#uses=1]
+ %3 = getelementptr %struct.Foo* %Bar, i64 %i.01, i32 2, i64 3 ; <i32*> [#uses=1]
+ store i32 %2, i32* %3, align 4
+ %4 = add i64 %i.01, 1 ; <i64> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %phitmp = icmp sgt i64 %4, 19999 ; <i1> [#uses=1]
+ br i1 %phitmp, label %bb1.return_crit_edge, label %bb
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/preserve-signed-wrap.ll b/test/Transforms/IndVarSimplify/preserve-signed-wrap.ll
new file mode 100644
index 0000000..9e46a78
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/preserve-signed-wrap.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: grep sext %t | count 1
+; RUN: grep phi %t | count 1
+; RUN: grep {phi i64} %t
+
+; Indvars should insert a 64-bit induction variable to eliminate the
+; sext for the addressing, however it shouldn't eliminate the sext
+; on the other phi, since that value undergoes signed wrapping.
+
+define void @foo(i32* nocapture %d, i32 %n) nounwind {
+entry:
+ %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %i.02 = phi i32 [ %5, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=2]
+ %p.01 = phi i8 [ %4, %bb1 ], [ -1, %bb.nph ] ; <i8> [#uses=2]
+ %1 = sext i8 %p.01 to i32 ; <i32> [#uses=1]
+ %2 = sext i32 %i.02 to i64 ; <i64> [#uses=1]
+ %3 = getelementptr i32* %d, i64 %2 ; <i32*> [#uses=1]
+ store i32 %1, i32* %3, align 4
+ %4 = add i8 %p.01, 1 ; <i8> [#uses=1]
+ %5 = add i32 %i.02, 1 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %6 = icmp slt i32 %5, %n ; <i1> [#uses=1]
+ br i1 %6, label %bb, label %bb1.return_crit_edge
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll b/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll
new file mode 100644
index 0000000..a007ca6
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll
@@ -0,0 +1,99 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: not grep sext %t
+
+define i64 @test(i64* nocapture %first, i32 %count) nounwind readonly {
+entry:
+ %t0 = icmp sgt i32 %count, 0 ; <i1> [#uses=1]
+ br i1 %t0, label %bb.nph, label %bb2
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %result.02 = phi i64 [ %t5, %bb1 ], [ 0, %bb.nph ] ; <i64> [#uses=1]
+ %n.01 = phi i32 [ %t6, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=2]
+ %t1 = sext i32 %n.01 to i64 ; <i64> [#uses=1]
+ %t2 = getelementptr i64* %first, i64 %t1 ; <i64*> [#uses=1]
+ %t3 = load i64* %t2, align 8 ; <i64> [#uses=1]
+ %t4 = lshr i64 %t3, 4 ; <i64> [#uses=1]
+ %t5 = add i64 %t4, %result.02 ; <i64> [#uses=2]
+ %t6 = add i32 %n.01, 1 ; <i32> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %t7 = icmp slt i32 %t6, %count ; <i1> [#uses=1]
+ br i1 %t7, label %bb, label %bb1.bb2_crit_edge
+
+bb1.bb2_crit_edge: ; preds = %bb1
+ %.lcssa = phi i64 [ %t5, %bb1 ] ; <i64> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1.bb2_crit_edge, %entry
+ %result.0.lcssa = phi i64 [ %.lcssa, %bb1.bb2_crit_edge ], [ 0, %entry ] ; <i64> [#uses=1]
+ ret i64 %result.0.lcssa
+}
+
+define void @foo(i16 signext %N, i32* nocapture %P) nounwind {
+entry:
+ %t0 = icmp sgt i16 %N, 0 ; <i1> [#uses=1]
+ br i1 %t0, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb1, %bb.nph
+ %i.01 = phi i16 [ %t3, %bb1 ], [ 0, %bb.nph ] ; <i16> [#uses=2]
+ %t1 = sext i16 %i.01 to i64 ; <i64> [#uses=1]
+ %t2 = getelementptr i32* %P, i64 %t1 ; <i32*> [#uses=1]
+ store i32 123, i32* %t2, align 4
+ %t3 = add i16 %i.01, 1 ; <i16> [#uses=2]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %t4 = icmp slt i16 %t3, %N ; <i1> [#uses=1]
+ br i1 %t4, label %bb, label %bb1.return_crit_edge
+
+bb1.return_crit_edge: ; preds = %bb1
+ br label %return
+
+return: ; preds = %bb1.return_crit_edge, %entry
+ ret void
+}
+
+; Test cases from PR1301:
+
+define void @kinds__srangezero([21 x i32]* nocapture %a) nounwind {
+bb.thread:
+ br label %bb
+
+bb: ; preds = %bb, %bb.thread
+ %i.0.reg2mem.0 = phi i8 [ -10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
+ %tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp12, 10 ; <i32> [#uses=1]
+ %tmp5 = getelementptr [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp5
+ %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
+ %0 = icmp sgt i8 %tmp7, 10 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define void @kinds__urangezero([21 x i32]* nocapture %a) nounwind {
+bb.thread:
+ br label %bb
+
+bb: ; preds = %bb, %bb.thread
+ %i.0.reg2mem.0 = phi i8 [ 10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
+ %tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp12, -10 ; <i32> [#uses=1]
+ %tmp5 = getelementptr [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp5
+ %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
+ %0 = icmp sgt i8 %tmp7, 30 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/shrunk-constant.ll b/test/Transforms/IndVarSimplify/shrunk-constant.ll
new file mode 100644
index 0000000..271f8ed
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/shrunk-constant.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -scalar-evolution -analyze \
+; RUN: | grep {\\--> (zext i4 {-7,+,-8}<%loop> to i32)}
+
+define fastcc void @foo() nounwind {
+entry:
+ br label %loop
+
+loop:
+ %i = phi i32 [ 0, %entry ], [ %t2, %loop ]
+ %t0 = add i32 %i, 9
+ %t1 = and i32 %t0, 9
+ store i32 %t1, i32* null
+ %t2 = add i32 %i, 8
+ br label %loop
+}
diff --git a/test/Transforms/IndVarSimplify/signed-trip-count.ll b/test/Transforms/IndVarSimplify/signed-trip-count.ll
new file mode 100644
index 0000000..1a5e64d
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/signed-trip-count.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -indvars -S > %t
+; RUN: not grep sext %t
+; RUN: grep phi %t | count 1
+
+define void @foo(i64* nocapture %x, i32 %n) nounwind {
+entry:
+ %tmp102 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
+ br i1 %tmp102, label %bb.nph, label %return
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb7, %bb.nph
+ %i.01 = phi i32 [ %tmp6, %bb7 ], [ 0, %bb.nph ] ; <i32> [#uses=3]
+ %tmp1 = sext i32 %i.01 to i64 ; <i64> [#uses=1]
+ %tmp4 = getelementptr i64* %x, i32 %i.01 ; <i64*> [#uses=1]
+ store i64 %tmp1, i64* %tmp4, align 8
+ %tmp6 = add i32 %i.01, 1 ; <i32> [#uses=2]
+ br label %bb7
+
+bb7: ; preds = %bb
+ %tmp10 = icmp slt i32 %tmp6, %n ; <i1> [#uses=1]
+ br i1 %tmp10, label %bb, label %bb7.return_crit_edge
+
+bb7.return_crit_edge: ; preds = %bb7
+ br label %return
+
+return: ; preds = %bb7.return_crit_edge, %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/single-element-range.ll b/test/Transforms/IndVarSimplify/single-element-range.ll
new file mode 100644
index 0000000..60a9eef
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/single-element-range.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -indvars
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv6-apple-darwin10"
+
+define arm_apcscc void @sqlite3_free_table(i8** %azResult) nounwind {
+entry:
+ br i1 undef, label %return, label %bb
+
+bb: ; preds = %entry
+ %0 = load i8** undef, align 4 ; <i8*> [#uses=2]
+ %1 = ptrtoint i8* %0 to i32 ; <i32> [#uses=1]
+ %2 = icmp sgt i8* %0, inttoptr (i32 1 to i8*) ; <i1> [#uses=1]
+ br i1 %2, label %bb1, label %bb5
+
+bb1: ; preds = %bb1, %bb
+ %i.01 = phi i32 [ %3, %bb1 ], [ 1, %bb ] ; <i32> [#uses=1]
+ %3 = add i32 %i.01, 1 ; <i32> [#uses=2]
+ %4 = icmp slt i32 %3, %1 ; <i1> [#uses=1]
+ br i1 %4, label %bb1, label %bb5
+
+bb5: ; preds = %bb1, %bb
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/IndVarSimplify/sink-alloca.ll b/test/Transforms/IndVarSimplify/sink-alloca.ll
new file mode 100644
index 0000000..3a6c683
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/sink-alloca.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -indvars -S | FileCheck %s
+; PR4775
+
+; Indvars shouldn't sink the alloca out of the entry block, even though
+; it's not used until after the loop.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+
[email protected] = appending global [1 x i8*] [i8* bitcast (i32 ()* @main to i8*)],
+section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @main() nounwind {
+; CHECK: entry:
+; CHECK-NEXT: %result.i = alloca i32, align 4
+entry:
+ %result.i = alloca i32, align 4 ; <i32*> [#uses=2]
+ br label %while.cond
+
+while.cond: ; preds = %while.cond, %entry
+ %call = call i32 @bar() nounwind ; <i32> [#uses=1]
+ %tobool = icmp eq i32 %call, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %while.end, label %while.cond
+
+while.end: ; preds = %while.cond
+ volatile store i32 0, i32* %result.i
+ %tmp.i = volatile load i32* %result.i ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @bar()
diff --git a/test/Transforms/IndVarSimplify/sink-trapping.ll b/test/Transforms/IndVarSimplify/sink-trapping.ll
new file mode 100644
index 0000000..a18000c
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/sink-trapping.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -indvars -S | FileCheck %s --check-prefix=CHECK
+
+declare i1 @b()
+
+define i32 @a(i32 %x) nounwind {
+for.body.preheader:
+ %y = sdiv i32 10, %x
+ br label %for.body
+
+for.body:
+ %cmp = call i1 @b()
+ br i1 %cmp, label %for.body, label %for.end.loopexit
+
+for.end.loopexit:
+ ret i32 %y
+}
+; CHECK: for.end.loopexit:
+; CHECK: sdiv
+; CHECK: ret
diff --git a/test/Transforms/IndVarSimplify/subtract.ll b/test/Transforms/IndVarSimplify/subtract.ll
new file mode 100644
index 0000000..f45bdab
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/subtract.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -indvars -S | grep indvar
+
+@G = global i64 0 ; <i64*> [#uses=1]
+
+define void @test(i64 %V) {
+; <label>:0
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %X = phi i64 [ 1, %0 ], [ %X.next, %Loop ] ; <i64> [#uses=2]
+ %X.next = sub i64 %X, %V ; <i64> [#uses=1]
+ store i64 %X, i64* @G
+ br label %Loop
+}
+
diff --git a/test/Transforms/IndVarSimplify/tripcount_compute.ll b/test/Transforms/IndVarSimplify/tripcount_compute.ll
new file mode 100644
index 0000000..6eaa4c5
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/tripcount_compute.ll
@@ -0,0 +1,100 @@
+; These tests ensure that we can compute the trip count of various forms of
+; loops. If the trip count of the loop is computable, then we will know what
+; the exit value of the loop will be for some value, allowing us to substitute
+; it directly into users outside of the loop, making the loop dead.
+;
+; RUN: opt < %s -indvars -loop-deletion -simplifycfg -S | not grep br
+
+define i32 @linear_setne() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] ; <i32> [#uses=3]
+ %i.next = add i32 %i, 1 ; <i32> [#uses=1]
+ %c = icmp ne i32 %i, 100 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %i
+}
+
+define i32 @linear_setne_2() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] ; <i32> [#uses=3]
+ %i.next = add i32 %i, 2 ; <i32> [#uses=1]
+ %c = icmp ne i32 %i, 100 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %i
+}
+
+define i32 @linear_setne_overflow() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 1024, %entry ], [ %i.next, %loop ] ; <i32> [#uses=3]
+ %i.next = add i32 %i, 1024 ; <i32> [#uses=1]
+ %c = icmp ne i32 %i, 0 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %i
+}
+
+define i32 @linear_setlt() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] ; <i32> [#uses=3]
+ %i.next = add i32 %i, 1 ; <i32> [#uses=1]
+ %c = icmp slt i32 %i, 100 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %i
+}
+
+define i32 @quadratic_setlt() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 7, %entry ], [ %i.next, %loop ] ; <i32> [#uses=4]
+ %i.next = add i32 %i, 3 ; <i32> [#uses=1]
+ %i2 = mul i32 %i, %i ; <i32> [#uses=1]
+ %c = icmp slt i32 %i2, 1000 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %i
+}
+
+define i32 @chained() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] ; <i32> [#uses=3]
+ %i.next = add i32 %i, 1 ; <i32> [#uses=1]
+ %c = icmp ne i32 %i, 100 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ br label %loop2
+
+loop2: ; preds = %loop2, %loopexit
+ %j = phi i32 [ %i, %loopexit ], [ %j.next, %loop2 ] ; <i32> [#uses=3]
+ %j.next = add i32 %j, 1 ; <i32> [#uses=1]
+ %c2 = icmp ne i32 %j, 200 ; <i1> [#uses=1]
+ br i1 %c2, label %loop2, label %loopexit2
+
+loopexit2: ; preds = %loop2
+ ret i32 %j
+}
diff --git a/test/Transforms/IndVarSimplify/tripcount_infinite.ll b/test/Transforms/IndVarSimplify/tripcount_infinite.ll
new file mode 100644
index 0000000..0495b50
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/tripcount_infinite.ll
@@ -0,0 +1,38 @@
+; These tests have an infinite trip count. We obviously shouldn't remove the
+; loops! :)
+;
+; RUN: opt < %s -indvars -adce -simplifycfg -S | grep icmp | wc -l > %t2
+; RUN: llvm-as < %s | llvm-dis | grep icmp | wc -l > %t1
+; RUN: diff %t1 %t2
+
+;; test for (i = 1; i != 100; i += 2)
+define i32 @infinite_linear() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 1, %entry ], [ %i.next, %loop ] ; <i32> [#uses=3]
+ %i.next = add i32 %i, 2 ; <i32> [#uses=1]
+ %c = icmp ne i32 %i, 100 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %i
+}
+
+;; test for (i = 1; i*i != 63; ++i)
+define i32 @infinite_quadratic() {
+entry:
+ br label %loop
+
+loop: ; preds = %loop, %entry
+ %i = phi i32 [ 1, %entry ], [ %i.next, %loop ] ; <i32> [#uses=4]
+ %isquare = mul i32 %i, %i ; <i32> [#uses=1]
+ %i.next = add i32 %i, 1 ; <i32> [#uses=1]
+ %c = icmp ne i32 %isquare, 63 ; <i1> [#uses=1]
+ br i1 %c, label %loop, label %loopexit
+
+loopexit: ; preds = %loop
+ ret i32 %i
+}
+
diff --git a/test/Transforms/IndVarSimplify/variable-stride-ivs-0.ll b/test/Transforms/IndVarSimplify/variable-stride-ivs-0.ll
new file mode 100644
index 0000000..0c8857f
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/variable-stride-ivs-0.ll
@@ -0,0 +1,43 @@
+; RUN: opt < %s -indvars -instcombine -S | \
+; RUN: grep {store i32 0}
+; Test that -indvars can reduce variable stride IVs. If it can reduce variable
+; stride iv's, it will make %iv. and %m.0.0 isomorphic to each other without
+; cycles, allowing the tmp.21 subtraction to be eliminated.
+; END.
+
+define void @vnum_test8(i32* %data) {
+entry:
+ %tmp.1 = getelementptr i32* %data, i32 3 ; <i32*> [#uses=1]
+ %tmp.2 = load i32* %tmp.1 ; <i32> [#uses=2]
+ %tmp.4 = getelementptr i32* %data, i32 4 ; <i32*> [#uses=1]
+ %tmp.5 = load i32* %tmp.4 ; <i32> [#uses=2]
+ %tmp.8 = getelementptr i32* %data, i32 2 ; <i32*> [#uses=1]
+ %tmp.9 = load i32* %tmp.8 ; <i32> [#uses=3]
+ %tmp.125 = icmp sgt i32 %tmp.2, 0 ; <i1> [#uses=1]
+ br i1 %tmp.125, label %no_exit.preheader, label %return
+
+no_exit.preheader: ; preds = %entry
+ %tmp.16 = getelementptr i32* %data, i32 %tmp.9 ; <i32*> [#uses=1]
+ br label %no_exit
+
+no_exit: ; preds = %no_exit, %no_exit.preheader
+ %iv.ui = phi i32 [ 0, %no_exit.preheader ], [ %iv..inc.ui, %no_exit ] ; <i32> [#uses=1]
+ %iv. = phi i32 [ %tmp.5, %no_exit.preheader ], [ %iv..inc, %no_exit ] ; <i32> [#uses=2]
+ %m.0.0 = phi i32 [ %tmp.5, %no_exit.preheader ], [ %tmp.24, %no_exit ] ; <i32> [#uses=2]
+ store i32 2, i32* %tmp.16
+ %tmp.21 = sub i32 %m.0.0, %iv. ; <i32> [#uses=1]
+ store i32 %tmp.21, i32* %data
+ %tmp.24 = add i32 %m.0.0, %tmp.9 ; <i32> [#uses=1]
+ %iv..inc = add i32 %tmp.9, %iv. ; <i32> [#uses=1]
+ %iv..inc.ui = add i32 %iv.ui, 1 ; <i32> [#uses=2]
+ %iv..inc1 = bitcast i32 %iv..inc.ui to i32 ; <i32> [#uses=1]
+ %tmp.12 = icmp slt i32 %iv..inc1, %tmp.2 ; <i1> [#uses=1]
+ br i1 %tmp.12, label %no_exit, label %return.loopexit
+
+return.loopexit: ; preds = %no_exit
+ br label %return
+
+return: ; preds = %return.loopexit, %entry
+ ret void
+}
+
diff --git a/test/Transforms/IndVarSimplify/variable-stride-ivs-1.ll b/test/Transforms/IndVarSimplify/variable-stride-ivs-1.ll
new file mode 100644
index 0000000..98cfa34
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/variable-stride-ivs-1.ll
@@ -0,0 +1,43 @@
+; RUN: opt < %s -indvars
+; PR4315
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-undermydesk-freebsd8.0"
+ %struct.mbuf = type <{ %struct.mbuf*, i8*, i32, i8, i8, i8, i8 }>
+
+define i32 @crash(%struct.mbuf* %m) nounwind {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %if.end, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %inc, %if.end ] ; <i32> [#uses=3]
+ %chksum.0 = phi i8 [ 0, %entry ], [ %conv3, %if.end ] ; <i8> [#uses=3]
+ %cmp = icmp slt i32 %i.0, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %for.body, label %do.body
+
+for.body: ; preds = %for.cond
+ br i1 undef, label %if.end, label %do.body
+
+if.end: ; preds = %for.body
+ %i.02 = trunc i32 %i.0 to i8 ; <i8> [#uses=1]
+ %conv3 = add i8 %chksum.0, %i.02 ; <i8> [#uses=1]
+ %inc = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %for.cond
+
+do.body: ; preds = %do.cond, %for.body, %for.cond
+ %chksum.2 = phi i8 [ undef, %do.cond ], [ %chksum.0, %for.body ], [ %chksum.0, %for.cond ] ; <i8> [#uses=1]
+ br i1 undef, label %do.cond, label %bb.nph
+
+bb.nph: ; preds = %do.body
+ br label %while.body
+
+while.body: ; preds = %while.body, %bb.nph
+ %chksum.13 = phi i8 [ undef, %while.body ], [ %chksum.2, %bb.nph ] ; <i8> [#uses=0]
+ br i1 undef, label %do.cond, label %while.body
+
+do.cond: ; preds = %while.body, %do.body
+ br i1 false, label %do.end, label %do.body
+
+do.end: ; preds = %do.cond
+ ret i32 0
+}
diff --git a/test/Transforms/Inline/2003-09-14-InlineValue.ll b/test/Transforms/Inline/2003-09-14-InlineValue.ll
new file mode 100644
index 0000000..49a27e1
--- /dev/null
+++ b/test/Transforms/Inline/2003-09-14-InlineValue.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -inline -disable-output
+
+declare i32 @External()
+
+define internal i32 @Callee() {
+ %I = call i32 @External( ) ; <i32> [#uses=2]
+ %J = add i32 %I, %I ; <i32> [#uses=1]
+ ret i32 %J
+}
+
+define i32 @Caller() {
+ %V = invoke i32 @Callee( )
+ to label %Ok unwind label %Bad ; <i32> [#uses=1]
+
+Ok: ; preds = %0
+ ret i32 %V
+
+Bad: ; preds = %0
+ ret i32 0
+}
+
diff --git a/test/Transforms/Inline/2003-09-22-PHINodeInlineFail.ll b/test/Transforms/Inline/2003-09-22-PHINodeInlineFail.ll
new file mode 100644
index 0000000..5ced3b8
--- /dev/null
+++ b/test/Transforms/Inline/2003-09-22-PHINodeInlineFail.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -inline -disable-output
+
+define i32 @main() {
+entry:
+ invoke void @__main( )
+ to label %LongJmpBlkPre unwind label %LongJmpBlkPre
+
+LongJmpBlkPre: ; preds = %entry, %entry
+ %i.3 = phi i32 [ 0, %entry ], [ 0, %entry ] ; <i32> [#uses=0]
+ ret i32 0
+}
+
+define void @__main() {
+ ret void
+}
+
diff --git a/test/Transforms/Inline/2003-09-22-PHINodesInExceptionDest.ll b/test/Transforms/Inline/2003-09-22-PHINodesInExceptionDest.ll
new file mode 100644
index 0000000..4418f77c
--- /dev/null
+++ b/test/Transforms/Inline/2003-09-22-PHINodesInExceptionDest.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -inline -disable-output
+
+define i32 @main() {
+entry:
+ invoke void @__main( )
+ to label %Call2Invoke unwind label %LongJmpBlkPre
+
+Call2Invoke: ; preds = %entry
+ br label %LongJmpBlkPre
+
+LongJmpBlkPre: ; preds = %Call2Invoke, %entry
+ %i.3 = phi i32 [ 0, %entry ], [ 0, %Call2Invoke ] ; <i32> [#uses=0]
+ ret i32 0
+}
+
+define void @__main() {
+ call void @__llvm_getGlobalCtors( )
+ call void @__llvm_getGlobalDtors( )
+ ret void
+}
+
+declare void @__llvm_getGlobalCtors()
+
+declare void @__llvm_getGlobalDtors()
+
diff --git a/test/Transforms/Inline/2003-09-22-PHINodesInNormalInvokeDest.ll b/test/Transforms/Inline/2003-09-22-PHINodesInNormalInvokeDest.ll
new file mode 100644
index 0000000..1bd5529
--- /dev/null
+++ b/test/Transforms/Inline/2003-09-22-PHINodesInNormalInvokeDest.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -inline -disable-output
+
+define i32 @main() {
+entry:
+ invoke void @__main( )
+ to label %else unwind label %RethrowExcept
+
+else: ; preds = %LJDecisionBB, %entry
+ %i.2 = phi i32 [ 36, %entry ], [ %i.2, %LJDecisionBB ] ; <i32> [#uses=1]
+ br label %LJDecisionBB
+
+LJDecisionBB: ; preds = %else
+ br label %else
+
+RethrowExcept: ; preds = %entry
+ ret i32 0
+}
+
+define void @__main() {
+ ret void
+}
+
+
diff --git a/test/Transforms/Inline/2003-10-13-AllocaDominanceProblem.ll b/test/Transforms/Inline/2003-10-13-AllocaDominanceProblem.ll
new file mode 100644
index 0000000..4a80d37
--- /dev/null
+++ b/test/Transforms/Inline/2003-10-13-AllocaDominanceProblem.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -inline -disable-output
+
+define i32 @reload() {
+reloadentry:
+ br label %A
+
+A: ; preds = %reloadentry
+ call void @callee( )
+ ret i32 0
+}
+
+define internal void @callee() {
+entry:
+ %X = alloca i8, i32 0 ; <i8*> [#uses=0]
+ %Y = bitcast i32 0 to i32 ; <i32> [#uses=1]
+ %Z = alloca i8, i32 %Y ; <i8*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll b/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll
new file mode 100644
index 0000000..9afd450
--- /dev/null
+++ b/test/Transforms/Inline/2003-10-26-InlineInvokeExceptionDestPhi.ll
@@ -0,0 +1,20 @@
+; The inliner is breaking inlining invoke instructions where there is a PHI
+; node in the exception destination, and the inlined function contains an
+; unwind instruction.
+
+; RUN: opt < %s -inline -disable-output
+
+define linkonce void @foo() {
+ unwind
+}
+
+define i32 @test() {
+BB1:
+ invoke void @foo( )
+ to label %Cont unwind label %Cont
+
+Cont: ; preds = %BB1, %BB1
+ %A = phi i32 [ 0, %BB1 ], [ 0, %BB1 ] ; <i32> [#uses=1]
+ ret i32 %A
+}
+
diff --git a/test/Transforms/Inline/2004-04-15-InlineDeletesCall.ll b/test/Transforms/Inline/2004-04-15-InlineDeletesCall.ll
new file mode 100644
index 0000000..3899451
--- /dev/null
+++ b/test/Transforms/Inline/2004-04-15-InlineDeletesCall.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -inline -disable-output
+
+; Inlining the first call caused the inliner function to delete the second
+; call. Then the inliner tries to inline the second call, which no longer
+; exists.
+
+define internal void @Callee1() {
+ unwind
+}
+
+define void @Callee2() {
+ ret void
+}
+
+define void @caller() {
+ call void @Callee1( )
+ call void @Callee2( )
+ ret void
+}
+
diff --git a/test/Transforms/Inline/2004-04-20-InlineLinkOnce.ll b/test/Transforms/Inline/2004-04-20-InlineLinkOnce.ll
new file mode 100644
index 0000000..fabad30
--- /dev/null
+++ b/test/Transforms/Inline/2004-04-20-InlineLinkOnce.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -inline -prune-eh -disable-output
+
+define linkonce void @caller() {
+ call void @callee( )
+ ret void
+}
+
+define linkonce void @callee() {
+ ret void
+}
+
diff --git a/test/Transforms/Inline/2004-10-17-InlineFunctionWithoutReturn.ll b/test/Transforms/Inline/2004-10-17-InlineFunctionWithoutReturn.ll
new file mode 100644
index 0000000..733cbb9
--- /dev/null
+++ b/test/Transforms/Inline/2004-10-17-InlineFunctionWithoutReturn.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -inline -disable-output
+
+define i32 @test() {
+ unwind
+}
+
+define i32 @caller() {
+ %X = call i32 @test( ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/Inline/2006-01-14-CallGraphUpdate.ll b/test/Transforms/Inline/2006-01-14-CallGraphUpdate.ll
new file mode 100644
index 0000000..415495e
--- /dev/null
+++ b/test/Transforms/Inline/2006-01-14-CallGraphUpdate.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -inline -prune-eh -disable-output
+
+ %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>" = type { %"struct.std::locale::facet" }
+ %"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >" = type { i32 (...)**, i32*, i32*, i32*, i32*, i32*, i32*, %"struct.std::locale" }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::ostreambuf_iterator<wchar_t,std::char_traits<wchar_t> >" = type { %"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >"*, i32 }
+
+define void @_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewl(%"struct.std::ostreambuf_iterator<wchar_t,std::char_traits<wchar_t> >"* %agg.result, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"* %this, %"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >"* %__s.0__, i32 %__s.1__, %"struct.std::ios_base"* %__io, i32 %__fill, i32 %__v) {
+entry:
+ tail call fastcc void @_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES3_S3_RSt8ios_basewT_( )
+ ret void
+}
+
+define fastcc void @_ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES3_S3_RSt8ios_basewT_() {
+entry:
+ %tmp.38 = shl i32 0, 3 ; <i32> [#uses=1]
+ %tmp.39 = alloca i8, i32 %tmp.38 ; <i8*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/Inline/2006-07-12-InlinePruneCGUpdate.ll b/test/Transforms/Inline/2006-07-12-InlinePruneCGUpdate.ll
new file mode 100644
index 0000000..6934562
--- /dev/null
+++ b/test/Transforms/Inline/2006-07-12-InlinePruneCGUpdate.ll
@@ -0,0 +1,840 @@
+; RUN: opt < %s -inline -prune-eh -disable-output
+; PR827
+@_ZTV8CRjii = internal global [1 x i32 (...)*] [ i32 (...)* @_ZN8CRjii12NlFeeEPN5Jr7sE ] ; <[1 x i32 (...)*]*> [#uses=0]
+
+define internal i32 @_ZN8CRjii12NlFeeEPN5Jr7sE(...) {
+entry:
+ br i1 false, label %cond_true, label %cond_false179
+
+cond_true: ; preds = %entry
+ br label %bb9
+
+bb: ; preds = %cond_true14
+ br label %bb9
+
+bb9: ; preds = %bb, %cond_true
+ br i1 false, label %cond_true14, label %cond_false
+
+cond_true14: ; preds = %bb9
+ br label %bb
+
+cond_false: ; preds = %bb9
+ br label %bb15
+
+cond_next: ; No predecessors!
+ br label %bb15
+
+bb15: ; preds = %cond_next, %cond_false
+ br label %bb24
+
+bb17: ; preds = %cond_true29
+ br label %bb24
+
+bb24: ; preds = %bb17, %bb15
+ br i1 false, label %cond_true29, label %cond_false30
+
+cond_true29: ; preds = %bb24
+ br label %bb17
+
+cond_false30: ; preds = %bb24
+ br label %bb32
+
+cond_next31: ; No predecessors!
+ br label %bb32
+
+bb32: ; preds = %cond_next31, %cond_false30
+ br label %bb41
+
+bb34: ; preds = %cond_true46
+ br label %bb41
+
+bb41: ; preds = %bb34, %bb32
+ br i1 false, label %cond_true46, label %cond_false47
+
+cond_true46: ; preds = %bb41
+ br label %bb34
+
+cond_false47: ; preds = %bb41
+ br label %bb49
+
+cond_next48: ; No predecessors!
+ br label %bb49
+
+bb49: ; preds = %cond_next48, %cond_false47
+ br label %bb58
+
+bb51: ; preds = %cond_true63
+ br label %bb58
+
+bb58: ; preds = %bb51, %bb49
+ br i1 false, label %cond_true63, label %cond_false64
+
+cond_true63: ; preds = %bb58
+ br label %bb51
+
+cond_false64: ; preds = %bb58
+ br label %bb66
+
+cond_next65: ; No predecessors!
+ br label %bb66
+
+bb66: ; preds = %cond_next65, %cond_false64
+ br label %bb76
+
+bb68: ; preds = %cond_true81
+ br label %bb76
+
+bb76: ; preds = %bb68, %bb66
+ br i1 false, label %cond_true81, label %cond_false82
+
+cond_true81: ; preds = %bb76
+ br label %bb68
+
+cond_false82: ; preds = %bb76
+ br label %bb84
+
+cond_next83: ; No predecessors!
+ br label %bb84
+
+bb84: ; preds = %cond_next83, %cond_false82
+ br label %bb94
+
+bb86: ; preds = %cond_true99
+ br label %bb94
+
+bb94: ; preds = %bb86, %bb84
+ br i1 false, label %cond_true99, label %cond_false100
+
+cond_true99: ; preds = %bb94
+ br label %bb86
+
+cond_false100: ; preds = %bb94
+ br label %bb102
+
+cond_next101: ; No predecessors!
+ br label %bb102
+
+bb102: ; preds = %cond_next101, %cond_false100
+ br label %bb112
+
+bb104: ; preds = %cond_true117
+ br label %bb112
+
+bb112: ; preds = %bb104, %bb102
+ br i1 false, label %cond_true117, label %cond_false118
+
+cond_true117: ; preds = %bb112
+ br label %bb104
+
+cond_false118: ; preds = %bb112
+ br label %bb120
+
+cond_next119: ; No predecessors!
+ br label %bb120
+
+bb120: ; preds = %cond_next119, %cond_false118
+ br label %bb130
+
+bb122: ; preds = %cond_true135
+ br label %bb130
+
+bb130: ; preds = %bb122, %bb120
+ br i1 false, label %cond_true135, label %cond_false136
+
+cond_true135: ; preds = %bb130
+ br label %bb122
+
+cond_false136: ; preds = %bb130
+ br label %bb138
+
+cond_next137: ; No predecessors!
+ br label %bb138
+
+bb138: ; preds = %cond_next137, %cond_false136
+ br label %bb148
+
+bb140: ; preds = %cond_true153
+ call fastcc void @_Zjrf1( )
+ br label %bb148
+
+bb148: ; preds = %bb140, %bb138
+ br i1 false, label %cond_true153, label %cond_false154
+
+cond_true153: ; preds = %bb148
+ br label %bb140
+
+cond_false154: ; preds = %bb148
+ br label %bb156
+
+cond_next155: ; No predecessors!
+ br label %bb156
+
+bb156: ; preds = %cond_next155, %cond_false154
+ br label %bb166
+
+bb158: ; preds = %cond_true171
+ br label %bb166
+
+bb166: ; preds = %bb158, %bb156
+ br i1 false, label %cond_true171, label %cond_false172
+
+cond_true171: ; preds = %bb166
+ br label %bb158
+
+cond_false172: ; preds = %bb166
+ br label %bb174
+
+cond_next173: ; No predecessors!
+ br label %bb174
+
+bb174: ; preds = %cond_next173, %cond_false172
+ br label %cleanup
+
+cleanup: ; preds = %bb174
+ br label %finally
+
+finally: ; preds = %cleanup
+ br label %cond_next180
+
+cond_false179: ; preds = %entry
+ br label %cond_next180
+
+cond_next180: ; preds = %cond_false179, %finally
+ br label %return
+
+return: ; preds = %cond_next180
+ ret i32 0
+}
+
+define internal fastcc void @_Zjrf2() {
+entry:
+ br label %bb3
+
+bb: ; preds = %cond_true
+ br label %bb3
+
+bb3: ; preds = %bb, %entry
+ %tmp5 = load i8** null ; <i8*> [#uses=1]
+ %tmp = icmp ne i8* null, %tmp5 ; <i1> [#uses=1]
+ br i1 %tmp, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb3
+ br label %bb
+
+cond_false: ; preds = %bb3
+ br label %bb6
+
+cond_next: ; No predecessors!
+ br label %bb6
+
+bb6: ; preds = %cond_next, %cond_false
+ br label %return
+
+return: ; preds = %bb6
+ ret void
+}
+
+define internal fastcc void @_Zjrf3() {
+entry:
+ call fastcc void @_Zjrf2( )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define internal fastcc void @_Zjrf4() {
+entry:
+ br label %bb6
+
+bb: ; preds = %cond_true
+ br label %bb6
+
+bb6: ; preds = %bb, %entry
+ br i1 false, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb6
+ br label %bb
+
+cond_false: ; preds = %bb6
+ br label %bb8
+
+cond_next: ; No predecessors!
+ br label %bb8
+
+bb8: ; preds = %cond_next, %cond_false
+ br i1 false, label %cond_true9, label %cond_false12
+
+cond_true9: ; preds = %bb8
+ call fastcc void @_Zjrf3( )
+ br label %cond_next13
+
+cond_false12: ; preds = %bb8
+ br label %cond_next13
+
+cond_next13: ; preds = %cond_false12, %cond_true9
+ br label %return
+
+return: ; preds = %cond_next13
+ ret void
+}
+
+define internal fastcc void @_Zjrf5() {
+entry:
+ call fastcc void @_Zjrf4( )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define internal fastcc void @_Zjrf6() {
+entry:
+ call fastcc void @_Zjrf5( )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define internal fastcc void @_Zjrf7() {
+entry:
+ br label %cleanup
+
+cleanup: ; preds = %entry
+ br label %finally
+
+finally: ; preds = %cleanup
+ call fastcc void @_Zjrf6( )
+ br label %cleanup9
+
+cleanup9: ; preds = %finally
+ br label %finally8
+
+finally8: ; preds = %cleanup9
+ br label %cleanup11
+
+cleanup11: ; preds = %finally8
+ br label %finally10
+
+finally10: ; preds = %cleanup11
+ br label %finally23
+
+finally23: ; preds = %finally10
+ br label %return
+
+return: ; preds = %finally23
+ ret void
+}
+
+define internal fastcc void @_Zjrf11() {
+entry:
+ br label %bb7
+
+bb: ; preds = %cond_true
+ br label %bb7
+
+bb7: ; preds = %bb, %entry
+ br i1 false, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb7
+ br label %bb
+
+cond_false: ; preds = %bb7
+ br label %bb9
+
+cond_next: ; No predecessors!
+ br label %bb9
+
+bb9: ; preds = %cond_next, %cond_false
+ br label %return
+ ; No predecessors!
+ br i1 false, label %cond_true12, label %cond_false15
+
+cond_true12: ; preds = %0
+ call fastcc void @_Zjrf3( )
+ br label %cond_next16
+
+cond_false15: ; preds = %0
+ br label %cond_next16
+
+cond_next16: ; preds = %cond_false15, %cond_true12
+ br label %return
+
+return: ; preds = %cond_next16, %bb9
+ ret void
+}
+
+define internal fastcc void @_Zjrf9() {
+entry:
+ call fastcc void @_Zjrf11( )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define internal fastcc void @_Zjrf10() {
+entry:
+ call fastcc void @_Zjrf9( )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define internal fastcc void @_Zjrf8() {
+entry:
+ br i1 false, label %cond_true, label %cond_false201
+
+cond_true: ; preds = %entry
+ br i1 false, label %cond_true36, label %cond_false
+
+cond_true36: ; preds = %cond_true
+ br label %cleanup
+
+cleanup: ; preds = %cond_true36
+ br label %finally
+
+finally: ; preds = %cleanup
+ br label %cond_next189
+
+cond_false: ; preds = %cond_true
+ br i1 false, label %cond_true99, label %cond_false137
+
+cond_true99: ; preds = %cond_false
+ br label %cleanup136
+
+cleanup136: ; preds = %cond_true99
+ br label %finally135
+
+finally135: ; preds = %cleanup136
+ br label %cond_next
+
+cond_false137: ; preds = %cond_false
+ call fastcc void @_Zjrf10( )
+ br label %cleanup188
+
+cleanup188: ; preds = %cond_false137
+ br label %finally187
+
+finally187: ; preds = %cleanup188
+ br label %cond_next
+
+cond_next: ; preds = %finally187, %finally135
+ br label %cond_next189
+
+cond_next189: ; preds = %cond_next, %finally
+ br label %cond_next202
+
+cond_false201: ; preds = %entry
+ br label %cond_next202
+
+cond_next202: ; preds = %cond_false201, %cond_next189
+ br label %return
+
+return: ; preds = %cond_next202
+ ret void
+}
+
+define internal fastcc void @_Zjrf1() {
+entry:
+ br label %bb492
+
+bb: ; preds = %cond_true499
+ br label %cleanup
+
+cleanup: ; preds = %bb
+ br label %finally
+
+finally: ; preds = %cleanup
+ br label %cleanup11
+
+cleanup11: ; preds = %finally
+ br label %finally10
+
+finally10: ; preds = %cleanup11
+ br i1 false, label %cond_true, label %cond_false286
+
+cond_true: ; preds = %finally10
+ br label %cleanup26
+
+cleanup26: ; preds = %cond_true
+ br label %finally25
+
+finally25: ; preds = %cleanup26
+ br label %bb30
+
+bb27: ; preds = %cond_true37
+ br label %bb30
+
+bb30: ; preds = %bb27, %finally25
+ br i1 false, label %cond_true37, label %cond_false
+
+cond_true37: ; preds = %bb30
+ br label %bb27
+
+cond_false: ; preds = %bb30
+ br label %bb38
+
+cond_next: ; No predecessors!
+ br label %bb38
+
+bb38: ; preds = %cond_next, %cond_false
+ br label %bb148
+
+bb40: ; preds = %cond_true156
+ br label %bb139
+
+bb41: ; preds = %cond_true142
+ call fastcc void @_Zjrf7( )
+ br label %bb105
+
+bb44: ; preds = %cond_true112
+ br label %bb74
+
+bb66: ; preds = %cond_true80
+ br label %bb74
+
+bb74: ; preds = %bb66, %bb44
+ br i1 false, label %cond_true80, label %cond_false81
+
+cond_true80: ; preds = %bb74
+ br label %bb66
+
+cond_false81: ; preds = %bb74
+ br label %bb83
+
+cond_next82: ; No predecessors!
+ br label %bb83
+
+bb83: ; preds = %cond_next82, %cond_false81
+ br label %cleanup97
+
+cleanup97: ; preds = %bb83
+ br label %finally96
+
+finally96: ; preds = %cleanup97
+ br label %cleanup99
+
+cleanup99: ; preds = %finally96
+ br label %finally98
+
+finally98: ; preds = %cleanup99
+ br label %bb105
+
+bb105: ; preds = %finally98, %bb41
+ br i1 false, label %cond_true112, label %cond_false113
+
+cond_true112: ; preds = %bb105
+ br label %bb44
+
+cond_false113: ; preds = %bb105
+ br label %bb115
+
+cond_next114: ; No predecessors!
+ br label %bb115
+
+bb115: ; preds = %cond_next114, %cond_false113
+ br i1 false, label %cond_true119, label %cond_false123
+
+cond_true119: ; preds = %bb115
+ call fastcc void @_Zjrf8( )
+ br label %cond_next124
+
+cond_false123: ; preds = %bb115
+ br label %cond_next124
+
+cond_next124: ; preds = %cond_false123, %cond_true119
+ br i1 false, label %cond_true131, label %cond_false132
+
+cond_true131: ; preds = %cond_next124
+ br label %cleanup135
+
+cond_false132: ; preds = %cond_next124
+ br label %cond_next133
+
+cond_next133: ; preds = %cond_false132
+ br label %cleanup136
+
+cleanup135: ; preds = %cond_true131
+ br label %done
+
+cleanup136: ; preds = %cond_next133
+ br label %finally134
+
+finally134: ; preds = %cleanup136
+ br label %bb139
+
+bb139: ; preds = %finally134, %bb40
+ br i1 false, label %cond_true142, label %cond_false143
+
+cond_true142: ; preds = %bb139
+ br label %bb41
+
+cond_false143: ; preds = %bb139
+ br label %bb145
+
+cond_next144: ; No predecessors!
+ br label %bb145
+
+bb145: ; preds = %cond_next144, %cond_false143
+ br label %bb148
+
+bb148: ; preds = %bb145, %bb38
+ br i1 false, label %cond_true156, label %cond_false157
+
+cond_true156: ; preds = %bb148
+ br label %bb40
+
+cond_false157: ; preds = %bb148
+ br label %bb159
+
+cond_next158: ; No predecessors!
+ br label %bb159
+
+bb159: ; preds = %cond_next158, %cond_false157
+ br label %done
+
+done: ; preds = %bb159, %cleanup135
+ br label %bb214
+
+bb185: ; preds = %cond_true218
+ br i1 false, label %cond_true193, label %cond_false206
+
+cond_true193: ; preds = %bb185
+ br label %cond_next211
+
+cond_false206: ; preds = %bb185
+ br label %cond_next211
+
+cond_next211: ; preds = %cond_false206, %cond_true193
+ br label %bb214
+
+bb214: ; preds = %cond_next211, %done
+ br i1 false, label %cond_true218, label %cond_false219
+
+cond_true218: ; preds = %bb214
+ br label %bb185
+
+cond_false219: ; preds = %bb214
+ br label %bb221
+
+cond_next220: ; No predecessors!
+ br label %bb221
+
+bb221: ; preds = %cond_next220, %cond_false219
+ br i1 false, label %cond_true236, label %cond_false245
+
+cond_true236: ; preds = %bb221
+ br label %cond_next249
+
+cond_false245: ; preds = %bb221
+ br label %cond_next249
+
+cond_next249: ; preds = %cond_false245, %cond_true236
+ br i1 false, label %cond_true272, label %cond_false277
+
+cond_true272: ; preds = %cond_next249
+ br label %cond_next278
+
+cond_false277: ; preds = %cond_next249
+ br label %cond_next278
+
+cond_next278: ; preds = %cond_false277, %cond_true272
+ br label %cleanup285
+
+cleanup285: ; preds = %cond_next278
+ br label %finally284
+
+finally284: ; preds = %cleanup285
+ br label %cond_next287
+
+cond_false286: ; preds = %finally10
+ br label %cond_next287
+
+cond_next287: ; preds = %cond_false286, %finally284
+ br i1 false, label %cond_true317, label %cond_false319
+
+cond_true317: ; preds = %cond_next287
+ br label %cond_next321
+
+cond_false319: ; preds = %cond_next287
+ br label %cond_next321
+
+cond_next321: ; preds = %cond_false319, %cond_true317
+ br label %bb348
+
+bb335: ; preds = %cond_true355
+ br label %bb348
+
+bb348: ; preds = %bb335, %cond_next321
+ br i1 false, label %cond_true355, label %cond_false356
+
+cond_true355: ; preds = %bb348
+ br label %bb335
+
+cond_false356: ; preds = %bb348
+ br label %bb358
+
+cond_next357: ; No predecessors!
+ br label %bb358
+
+bb358: ; preds = %cond_next357, %cond_false356
+ br i1 false, label %cond_true363, label %cond_false364
+
+cond_true363: ; preds = %bb358
+ br label %bb388
+
+cond_false364: ; preds = %bb358
+ br label %cond_next365
+
+cond_next365: ; preds = %cond_false364
+ br i1 false, label %cond_true370, label %cond_false371
+
+cond_true370: ; preds = %cond_next365
+ br label %bb388
+
+cond_false371: ; preds = %cond_next365
+ br label %cond_next372
+
+cond_next372: ; preds = %cond_false371
+ br i1 false, label %cond_true385, label %cond_false386
+
+cond_true385: ; preds = %cond_next372
+ br label %bb388
+
+cond_false386: ; preds = %cond_next372
+ br label %cond_next387
+
+cond_next387: ; preds = %cond_false386
+ br label %bb389
+
+bb388: ; preds = %cond_true385, %cond_true370, %cond_true363
+ br label %bb389
+
+bb389: ; preds = %bb388, %cond_next387
+ br i1 false, label %cond_true392, label %cond_false443
+
+cond_true392: ; preds = %bb389
+ br label %bb419
+
+bb402: ; preds = %cond_true425
+ br i1 false, label %cond_true406, label %cond_false412
+
+cond_true406: ; preds = %bb402
+ br label %cond_next416
+
+cond_false412: ; preds = %bb402
+ br label %cond_next416
+
+cond_next416: ; preds = %cond_false412, %cond_true406
+ br label %bb419
+
+bb419: ; preds = %cond_next416, %cond_true392
+ br i1 false, label %cond_true425, label %cond_false426
+
+cond_true425: ; preds = %bb419
+ br label %bb402
+
+cond_false426: ; preds = %bb419
+ br label %bb428
+
+cond_next427: ; No predecessors!
+ br label %bb428
+
+bb428: ; preds = %cond_next427, %cond_false426
+ br label %cond_next478
+
+cond_false443: ; preds = %bb389
+ br label %bb460
+
+bb450: ; preds = %cond_true466
+ br label %bb460
+
+bb460: ; preds = %bb450, %cond_false443
+ br i1 false, label %cond_true466, label %cond_false467
+
+cond_true466: ; preds = %bb460
+ br label %bb450
+
+cond_false467: ; preds = %bb460
+ br label %bb469
+
+cond_next468: ; No predecessors!
+ br label %bb469
+
+bb469: ; preds = %cond_next468, %cond_false467
+ br label %cond_next478
+
+cond_next478: ; preds = %bb469, %bb428
+ br label %cleanup485
+
+cleanup485: ; preds = %cond_next478
+ br label %finally484
+
+finally484: ; preds = %cleanup485
+ br label %cleanup487
+
+cleanup487: ; preds = %finally484
+ br label %finally486
+
+finally486: ; preds = %cleanup487
+ br label %cleanup489
+
+cleanup489: ; preds = %finally486
+ br label %finally488
+
+finally488: ; preds = %cleanup489
+ br label %bb492
+
+bb492: ; preds = %finally488, %entry
+ br i1 false, label %cond_true499, label %cond_false500
+
+cond_true499: ; preds = %bb492
+ br label %bb
+
+cond_false500: ; preds = %bb492
+ br label %bb502
+
+cond_next501: ; No predecessors!
+ br label %bb502
+
+bb502: ; preds = %cond_next501, %cond_false500
+ br label %return
+
+return: ; preds = %bb502
+ ret void
+}
+
+define internal fastcc void @_ZSt26__unguarded_insertion_sortIN9__gnu_cxx17__normal_iteratorIPSsSt6vectorISsSaISsEEEEEvT_S7_() {
+entry:
+ br label %bb12
+
+bb: ; preds = %cond_true
+ br label %cleanup
+
+cleanup: ; preds = %bb
+ br label %finally
+
+finally: ; preds = %cleanup
+ br label %bb12
+
+bb12: ; preds = %finally, %entry
+ br i1 false, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb12
+ br label %bb
+
+cond_false: ; preds = %bb12
+ br label %bb14
+
+cond_next: ; No predecessors!
+ br label %bb14
+
+bb14: ; preds = %cond_next, %cond_false
+ br label %return
+
+return: ; preds = %bb14
+ ret void
+}
diff --git a/test/Transforms/Inline/2006-11-09-InlineCGUpdate-2.ll b/test/Transforms/Inline/2006-11-09-InlineCGUpdate-2.ll
new file mode 100644
index 0000000..37cba98
--- /dev/null
+++ b/test/Transforms/Inline/2006-11-09-InlineCGUpdate-2.ll
@@ -0,0 +1,245 @@
+; RUN: opt < %s -inline -prune-eh -disable-output
+; PR993
+target datalayout = "e-p:32:32"
+target triple = "i386-unknown-openbsd3.9"
+deplibs = [ "stdc++", "c", "crtend" ]
+ %"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" = type { i8* }
+ %"struct.__gnu_cxx::char_producer<char>" = type { i32 (...)** }
+ %struct.__sFILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, i8*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__sbuf = type { i8*, i32 }
+ %"struct.std::__basic_file<char>" = type { %struct.__sFILE*, i1 }
+ %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>" = type { %"struct.std::locale::facet" }
+ %"struct.std::bad_alloc" = type { %"struct.__gnu_cxx::char_producer<char>" }
+ %"struct.std::basic_filebuf<char,std::char_traits<char> >" = type { %"struct.std::basic_streambuf<char,std::char_traits<char> >", i32, %"struct.std::__basic_file<char>", i32, %union.__mbstate_t, %union.__mbstate_t, i8*, i32, i1, i1, i1, i1, i8, i8*, i8*, i1, %"struct.std::codecvt<char,char,__mbstate_t>"*, i8*, i32, i8*, i8* }
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i1, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"* }
+ %"struct.std::basic_iostream<char,std::char_traits<char> >" = type { %"struct.std::locale::facet", %"struct.__gnu_cxx::char_producer<char>", %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_ofstream<char,std::char_traits<char> >" = type { %"struct.__gnu_cxx::char_producer<char>", %"struct.std::basic_filebuf<char,std::char_traits<char> >", %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" = type { %"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" = type { i32, i32, i32 }
+ %"struct.std::codecvt<char,char,__mbstate_t>" = type { %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>", i32* }
+ %"struct.std::ctype<char>" = type { %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>", i32*, i1, i32*, i32*, i32* }
+ %"struct.std::domain_error" = type { %"struct.std::logic_error" }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %struct.__sbuf, [8 x %struct.__sbuf], i32, %struct.__sbuf*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::logic_error" = type { %"struct.__gnu_cxx::char_producer<char>", %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" }
+ %union.__mbstate_t = type { i64, [120 x i8] }
[email protected]_1 = external global [17 x i8] ; <[17 x i8]*> [#uses=0]
[email protected]_9 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
+
+define void @main() {
+entry:
+ call fastcc void @_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode( )
+ ret void
+}
+
+define fastcc void @_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode() {
+entry:
+ %tmp.6 = icmp eq %"struct.std::basic_filebuf<char,std::char_traits<char> >"* null, null ; <i1> [#uses=1]
+ br i1 %tmp.6, label %then, label %UnifiedReturnBlock
+
+then: ; preds = %entry
+ tail call fastcc void @_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate( )
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+
+define fastcc void @_ZN10__cxxabiv111__terminateEPFvvE() {
+entry:
+ unreachable
+}
+
+define void @_ZNSdD0Ev() {
+entry:
+ unreachable
+}
+
+define void @_ZThn8_NSdD1Ev() {
+entry:
+ ret void
+}
+
+define void @_ZNSt13basic_filebufIcSt11char_traitsIcEED0Ev() {
+entry:
+ ret void
+}
+
+define void @_ZNSt13basic_filebufIcSt11char_traitsIcEE9pbackfailEi() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSoD2Ev() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSt9basic_iosIcSt11char_traitsIcEED2Ev() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate() {
+entry:
+ tail call fastcc void @_ZSt19__throw_ios_failurePKc( )
+ ret void
+}
+
+declare fastcc void @_ZNSaIcED1Ev()
+
+define fastcc void @_ZNSsC1EPKcRKSaIcE() {
+entry:
+ tail call fastcc void @_ZNSs16_S_construct_auxIPKcEEPcT_S3_RKSaIcE12__false_type( )
+ unreachable
+}
+
+define fastcc void @_ZSt14__convert_to_vIyEvPKcRT_RSt12_Ios_IostateRKPii() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZSt19__throw_ios_failurePKc() {
+entry:
+ call fastcc void @_ZNSsC1EPKcRKSaIcE( )
+ unwind
+}
+
+define void @_GLOBAL__D__ZSt23lexicographical_compareIPKaS1_EbT_S2_T0_S3_() {
+entry:
+ ret void
+}
+
+define void @_ZNSt9bad_allocD1Ev() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZSt19__throw_logic_errorPKc() {
+entry:
+ invoke fastcc void @_ZNSt11logic_errorC1ERKSs( )
+ to label %try_exit.0 unwind label %try_catch.0
+
+try_catch.0: ; preds = %entry
+ unreachable
+
+try_exit.0: ; preds = %entry
+ unwind
+}
+
+define fastcc void @_ZNSt11logic_errorC1ERKSs() {
+entry:
+ call fastcc void @_ZNSsC1ERKSs( )
+ ret void
+}
+
+define void @_ZNSt12domain_errorD1Ev() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZSt20__throw_length_errorPKc() {
+entry:
+ call fastcc void @_ZNSt12length_errorC1ERKSs( )
+ unwind
+}
+
+define fastcc void @_ZNSt12length_errorC1ERKSs() {
+entry:
+ invoke fastcc void @_ZNSsC1ERKSs( )
+ to label %_ZNSt11logic_errorC2ERKSs.exit unwind label %invoke_catch.i
+
+invoke_catch.i: ; preds = %entry
+ unwind
+
+_ZNSt11logic_errorC2ERKSs.exit: ; preds = %entry
+ ret void
+}
+
+define fastcc void @_ZNSs4_Rep9_S_createEjRKSaIcE() {
+entry:
+ call fastcc void @_ZSt20__throw_length_errorPKc( )
+ unreachable
+}
+
+define fastcc void @_ZNSs12_S_constructIN9__gnu_cxx17__normal_iteratorIPcSsEEEES2_T_S4_RKSaIcESt20forward_iterator_tag() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSs16_S_construct_auxIPKcEEPcT_S3_RKSaIcE12__false_type() {
+entry:
+ br i1 false, label %then.1.i, label %endif.1.i
+
+then.1.i: ; preds = %entry
+ call fastcc void @_ZSt19__throw_logic_errorPKc( )
+ br label %endif.1.i
+
+endif.1.i: ; preds = %then.1.i, %entry
+ call fastcc void @_ZNSs4_Rep9_S_createEjRKSaIcE( )
+ unreachable
+}
+
+define fastcc void @_ZNSsC1ERKSs() {
+entry:
+ call fastcc void @_ZNSs4_Rep7_M_grabERKSaIcES2_( )
+ invoke fastcc void @_ZNSaIcEC1ERKS_( )
+ to label %invoke_cont.1 unwind label %invoke_catch.1
+
+invoke_catch.1: ; preds = %entry
+ call fastcc void @_ZNSaIcED1Ev( )
+ unwind
+
+invoke_cont.1: ; preds = %entry
+ call fastcc void @_ZNSaIcEC2ERKS_( )
+ ret void
+}
+
+define fastcc void @_ZNSaIcEC1ERKS_() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_jc() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSs4_Rep7_M_grabERKSaIcES2_() {
+entry:
+ br i1 false, label %else.i, label %cond_true
+
+cond_true: ; preds = %entry
+ ret void
+
+else.i: ; preds = %entry
+ tail call fastcc void @_ZNSs4_Rep9_S_createEjRKSaIcE( )
+ unreachable
+}
+
+define fastcc void @_ZNSaIcEC2ERKS_() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZN9__gnu_cxx12__pool_allocILb1ELi0EE8allocateEj() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZN9__gnu_cxx12__pool_allocILb1ELi0EE9_S_refillEj() {
+entry:
+ unreachable
+}
diff --git a/test/Transforms/Inline/2006-11-09-InlineCGUpdate.ll b/test/Transforms/Inline/2006-11-09-InlineCGUpdate.ll
new file mode 100644
index 0000000..279823a
--- /dev/null
+++ b/test/Transforms/Inline/2006-11-09-InlineCGUpdate.ll
@@ -0,0 +1,338 @@
+; RUN: opt < %s -inline -prune-eh -disable-output
+; PR992
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+deplibs = [ "stdc++", "c", "crtend" ]
+ %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
+ %"struct.__cxxabiv1::__array_type_info" = type { %"struct.std::type_info" }
+ %"struct.__cxxabiv1::__si_class_type_info" = type { %"struct.__cxxabiv1::__array_type_info", %"struct.__cxxabiv1::__array_type_info"* }
+ %"struct.__gnu_cxx::_Rope_rep_alloc_base<char,std::allocator<char>, true>" = type { i32 }
+ %"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" = type { i8* }
+ %"struct.__gnu_cxx::__normal_iterator<const wchar_t*,std::basic_string<wchar_t, std::char_traits<wchar_t>, std::allocator<wchar_t> > >" = type { i32* }
+ %"struct.__gnu_cxx::char_producer<char>" = type { i32 (...)** }
+ %"struct.__gnu_cxx::stdio_sync_filebuf<char,std::char_traits<char> >" = type { %"struct.std::basic_streambuf<char,std::char_traits<char> >", %struct._IO_FILE*, i32 }
+ %"struct.__gnu_cxx::stdio_sync_filebuf<wchar_t,std::char_traits<wchar_t> >" = type { %"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >", %struct._IO_FILE*, i32 }
+ %struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] }
+ %struct.__mbstate_t = type { i32, %"struct.__gnu_cxx::_Rope_rep_alloc_base<char,std::allocator<char>, true>" }
+ %struct.locale_data = type opaque
+ %"struct.std::__basic_file<char>" = type { %struct._IO_FILE*, i1 }
+ %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>" = type { %"struct.std::locale::facet" }
+ %"struct.std::basic_filebuf<char,std::char_traits<char> >" = type { %"struct.std::basic_streambuf<char,std::char_traits<char> >", i32, %"struct.std::__basic_file<char>", i32, %struct.__mbstate_t, %struct.__mbstate_t, i8*, i32, i1, i1, i1, i1, i8, i8*, i8*, i1, %"struct.std::codecvt<char,char,__mbstate_t>"*, i8*, i32, i8*, i8* }
+ %"struct.std::basic_filebuf<wchar_t,std::char_traits<wchar_t> >" = type { %"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >", i32, %"struct.std::__basic_file<char>", i32, %struct.__mbstate_t, %struct.__mbstate_t, i32*, i32, i1, i1, i1, i1, i32, i32*, i32*, i1, %"struct.std::codecvt<char,char,__mbstate_t>"*, i8*, i32, i8*, i8* }
+ %"struct.std::basic_fstream<char,std::char_traits<char> >" = type { { %"struct.std::locale::facet", %"struct.__gnu_cxx::char_producer<char>" }, %"struct.std::basic_filebuf<char,std::char_traits<char> >", %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_fstream<wchar_t,std::char_traits<wchar_t> >" = type { { %"struct.std::locale::facet", %"struct.__gnu_cxx::char_producer<char>" }, %"struct.std::basic_filebuf<wchar_t,std::char_traits<wchar_t> >", %"struct.std::basic_ios<wchar_t,std::char_traits<wchar_t> >" }
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i1, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"* }
+ %"struct.std::basic_ios<wchar_t,std::char_traits<wchar_t> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<wchar_t,std::char_traits<wchar_t> >"*, i32, i1, %"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >"*, %"struct.std::codecvt<char,char,__mbstate_t>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"* }
+ %"struct.std::basic_iostream<wchar_t,std::char_traits<wchar_t> >" = type { %"struct.std::locale::facet", %"struct.__gnu_cxx::char_producer<char>", %"struct.std::basic_ios<wchar_t,std::char_traits<wchar_t> >" }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_ostream<wchar_t,std::char_traits<wchar_t> >" = type { i32 (...)**, %"struct.std::basic_ios<wchar_t,std::char_traits<wchar_t> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >" = type { i32 (...)**, i32*, i32*, i32*, i32*, i32*, i32*, %"struct.std::locale" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" = type { %"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" = type { i32, i32, i32 }
+ %"struct.std::basic_string<wchar_t,std::char_traits<wchar_t>,std::allocator<wchar_t> >" = type { %"struct.__gnu_cxx::__normal_iterator<const wchar_t*,std::basic_string<wchar_t, std::char_traits<wchar_t>, std::allocator<wchar_t> > >" }
+ %"struct.std::codecvt<char,char,__mbstate_t>" = type { %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>", %struct.__locale_struct* }
+ %"struct.std::collate<char>" = type { %"struct.std::locale::facet", %struct.__locale_struct* }
+ %"struct.std::collate_byname<char>" = type { %"struct.std::collate<char>" }
+ %"struct.std::ctype<char>" = type { %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>", %struct.__locale_struct*, i1, i32*, i32*, i16* }
+ %"struct.std::ctype_byname<char>" = type { %"struct.std::ctype<char>" }
+ %"struct.std::domain_error" = type { %"struct.std::logic_error" }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::istreambuf_iterator<char,std::char_traits<char> >" = type { %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, i32 }
+ %"struct.std::istreambuf_iterator<wchar_t,std::char_traits<wchar_t> >" = type { %"struct.std::basic_streambuf<wchar_t,std::char_traits<wchar_t> >"*, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::logic_error" = type { %"struct.__gnu_cxx::char_producer<char>", %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" }
+ %"struct.std::type_info" = type { i32 (...)**, i8* }
[email protected]_11 = external global [42 x i8] ; <[42 x i8]*> [#uses=0]
[email protected]_9 = external global [24 x i8] ; <[24 x i8]*> [#uses=0]
[email protected]_1 = external global [17 x i8] ; <[17 x i8]*> [#uses=0]
+
+define void @main() {
+entry:
+ tail call fastcc void @_ZNSolsEi( )
+ ret void
+}
+
+define fastcc void @_ZNSolsEi() {
+entry:
+ %tmp.22 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.22, label %else, label %then
+
+then: ; preds = %entry
+ ret void
+
+else: ; preds = %entry
+ tail call fastcc void @_ZNSolsEl( )
+ ret void
+}
+
+define void @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate() {
+entry:
+ tail call fastcc void @_ZSt19__throw_ios_failurePKc( )
+ ret void
+}
+
+define fastcc void @_ZNSo3putEc() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSolsEl() {
+entry:
+ %tmp.21.i = icmp eq %"struct.std::basic_ostream<char,std::char_traits<char> >"* null, null ; <i1> [#uses=1]
+ br i1 %tmp.21.i, label %endif.0.i, label %shortcirc_next.i
+
+shortcirc_next.i: ; preds = %entry
+ ret void
+
+endif.0.i: ; preds = %entry
+ call fastcc void @_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate( )
+ ret void
+}
+
+define fastcc void @_ZSt19__throw_ios_failurePKc() {
+entry:
+ call fastcc void @_ZNSsC1EPKcRKSaIcE( )
+ ret void
+}
+
+define fastcc void @_ZNSt8ios_baseD2Ev() {
+entry:
+ unreachable
+}
+
+define void @_ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE5uflowEv() {
+entry:
+ unreachable
+}
+
+define void @_ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEED1Ev() {
+entry:
+ unreachable
+}
+
+define void @_ZNSt15basic_streambufIcSt11char_traitsIcEE6setbufEPci() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZSt9use_facetISt5ctypeIcEERKT_RKSt6locale() {
+entry:
+ ret void
+}
+
+declare fastcc void @_ZNSaIcED1Ev()
+
+define fastcc void @_ZSt19__throw_logic_errorPKc() {
+entry:
+ call fastcc void @_ZNSt11logic_errorC1ERKSs( )
+ ret void
+}
+
+define fastcc void @_ZNSs4_Rep9_S_createEjRKSaIcE() {
+entry:
+ br i1 false, label %then.0, label %endif.0
+
+then.0: ; preds = %entry
+ call fastcc void @_ZSt20__throw_length_errorPKc( )
+ ret void
+
+endif.0: ; preds = %entry
+ ret void
+}
+
+define fastcc void @_ZSt20__throw_length_errorPKc() {
+entry:
+ call fastcc void @_ZNSt12length_errorC1ERKSs( )
+ unwind
+}
+
+define fastcc void @_ZNSs16_S_construct_auxIPKcEEPcT_S3_RKSaIcE12__false_type() {
+entry:
+ br i1 false, label %then.1.i, label %endif.1.i
+
+then.1.i: ; preds = %entry
+ call fastcc void @_ZSt19__throw_logic_errorPKc( )
+ ret void
+
+endif.1.i: ; preds = %entry
+ call fastcc void @_ZNSs4_Rep9_S_createEjRKSaIcE( )
+ unreachable
+}
+
+define fastcc void @_ZNSsC1ERKSs() {
+entry:
+ call fastcc void @_ZNSs4_Rep7_M_grabERKSaIcES2_( )
+ invoke fastcc void @_ZNSaIcEC1ERKS_( )
+ to label %invoke_cont.1 unwind label %invoke_catch.1
+
+invoke_catch.1: ; preds = %entry
+ call fastcc void @_ZNSaIcED1Ev( )
+ unwind
+
+invoke_cont.1: ; preds = %entry
+ call fastcc void @_ZNSaIcEC2ERKS_( )
+ ret void
+}
+
+define fastcc void @_ZNSs7reserveEj() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSaIcEC1ERKS_() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSs4_Rep7_M_grabERKSaIcES2_() {
+entry:
+ br i1 false, label %else.i, label %cond_true
+
+cond_true: ; preds = %entry
+ ret void
+
+else.i: ; preds = %entry
+ tail call fastcc void @_ZNSs4_Rep9_S_createEjRKSaIcE( )
+ ret void
+}
+
+define fastcc void @_ZNSsC1EPKcRKSaIcE() {
+entry:
+ tail call fastcc void @_ZNSs16_S_construct_auxIPKcEEPcT_S3_RKSaIcE12__false_type( )
+ unreachable
+}
+
+define fastcc void @_ZNSaIcEC2ERKS_() {
+entry:
+ ret void
+}
+
+define void @_ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev() {
+entry:
+ unreachable
+}
+
+define void @_ZNSt14collate_bynameIcED1Ev() {
+entry:
+ unreachable
+}
+
+define void @_ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy() {
+entry:
+ ret void
+}
+
+define void @_ZNSt23__codecvt_abstract_baseIcc11__mbstate_tED1Ev() {
+entry:
+ unreachable
+}
+
+define void @_ZNSt12ctype_bynameIcED0Ev() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSt8messagesIwEC1Ej() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZSt14__convert_to_vIlEvPKcRT_RSt12_Ios_IostateRKP15__locale_structi() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16_M_extract_floatES3_S3_RSt8ios_baseRSt12_Ios_IostateRSs() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSbIwSt11char_traitsIwESaIwEE4swapERS2_() {
+entry:
+ ret void
+}
+
+define void @_ZNSt14basic_iostreamIwSt11char_traitsIwEED0Ev() {
+entry:
+ unreachable
+}
+
+define void @_ZNSt15basic_streambufIcSt11char_traitsIcEE9showmanycEv() {
+entry:
+ ret void
+}
+
+define void @_ZNSt9exceptionD0Ev() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSt11logic_errorC1ERKSs() {
+entry:
+ call fastcc void @_ZNSsC1ERKSs( )
+ ret void
+}
+
+define fastcc void @_ZNSt11logic_errorD2Ev() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSt12length_errorC1ERKSs() {
+entry:
+ invoke fastcc void @_ZNSsC1ERKSs( )
+ to label %_ZNSt11logic_errorC2ERKSs.exit unwind label %invoke_catch.i
+
+invoke_catch.i: ; preds = %entry
+ unwind
+
+_ZNSt11logic_errorC2ERKSs.exit: ; preds = %entry
+ ret void
+}
+
+define void @_ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_() {
+entry:
+ ret void
+}
+
+define fastcc void @_ZNSbIwSt11char_traitsIwESaIwEE16_S_construct_auxIPKwEEPwT_S7_RKS1_12__false_type() {
+entry:
+ ret void
+}
+
+define void @_ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev() {
+entry:
+ ret void
+}
+
+define void @_ZNSt13basic_fstreamIcSt11char_traitsIcEED1Ev() {
+entry:
+ unreachable
+}
+
+define fastcc void @_ZNSt5ctypeIcEC1EPKtbj() {
+entry:
+ ret void
+}
diff --git a/test/Transforms/Inline/2007-04-15-InlineEH.ll b/test/Transforms/Inline/2007-04-15-InlineEH.ll
new file mode 100644
index 0000000..635f93e
--- /dev/null
+++ b/test/Transforms/Inline/2007-04-15-InlineEH.ll
@@ -0,0 +1,49 @@
+; RUN: opt < %s -inline -S | not grep {invoke void asm}
+; PR1335
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+ %struct.gnat__strings__string_access = type { i8*, %struct.string___XUB* }
+ %struct.string___XUB = type { i32, i32 }
+
+define void @bc__support__high_resolution_time__clock() {
+entry:
+ call void asm "rdtsc\0A\09movl %eax, $0\0A\09movl %edx, $1", "=*imr,=*imr,~{dirflag},~{fpsr},~{flags},~{dx},~{ax}"( i32* null, i32* null ) nounwind
+ unreachable
+}
+
+define fastcc void @bc__support__high_resolution_time__initialize_clock_rate() {
+entry:
+ invoke void @gnat__os_lib__getenv( %struct.gnat__strings__string_access* null )
+ to label %invcont unwind label %cleanup144
+
+invcont: ; preds = %entry
+ invoke void @ada__calendar__delays__delay_for( )
+ to label %invcont64 unwind label %cleanup144
+
+invcont64: ; preds = %invcont
+ invoke void @ada__calendar__clock( )
+ to label %invcont65 unwind label %cleanup144
+
+invcont65: ; preds = %invcont64
+ invoke void @bc__support__high_resolution_time__clock( )
+ to label %invcont67 unwind label %cleanup144
+
+invcont67: ; preds = %invcont65
+ ret void
+
+cleanup144: ; preds = %invcont65, %invcont64, %invcont, %entry
+ unwind
+}
+
+declare void @gnat__os_lib__getenv(%struct.gnat__strings__string_access*)
+
+declare void @ada__calendar__delays__delay_for()
+
+declare void @ada__calendar__clock()
+
+define void @bc__support__high_resolution_time___elabb() {
+entry:
+ call fastcc void @bc__support__high_resolution_time__initialize_clock_rate( )
+ ret void
+}
diff --git a/test/Transforms/Inline/2007-06-06-NoInline.ll b/test/Transforms/Inline/2007-06-06-NoInline.ll
new file mode 100644
index 0000000..d5a7953
--- /dev/null
+++ b/test/Transforms/Inline/2007-06-06-NoInline.ll
@@ -0,0 +1,46 @@
+; RUN: opt < %s -inline -S | grep "define internal i32 @bar"
[email protected] = appending global [1 x i8*] [ i8* bitcast (i32 (i32, i32)* @bar to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define internal i32 @bar(i32 %x, i32 %y) {
+entry:
+ %x_addr = alloca i32 ; <i32*> [#uses=2]
+ %y_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %x, i32* %x_addr
+ store i32 %y, i32* %y_addr
+ %tmp1 = load i32* %x_addr ; <i32> [#uses=1]
+ %tmp2 = load i32* %y_addr ; <i32> [#uses=1]
+ %tmp3 = add i32 %tmp1, %tmp2 ; <i32> [#uses=1]
+ store i32 %tmp3, i32* %tmp
+ %tmp4 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp4, i32* %retval
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval5
+}
+
+define i32 @foo(i32 %a, i32 %b) {
+entry:
+ %a_addr = alloca i32 ; <i32*> [#uses=2]
+ %b_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %a, i32* %a_addr
+ store i32 %b, i32* %b_addr
+ %tmp1 = load i32* %b_addr ; <i32> [#uses=1]
+ %tmp2 = load i32* %a_addr ; <i32> [#uses=1]
+ %tmp3 = call i32 @bar( i32 %tmp1, i32 %tmp2 ) ; <i32> [#uses=1]
+ store i32 %tmp3, i32* %tmp
+ %tmp4 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp4, i32* %retval
+ br label %return
+
+return: ; preds = %entry
+ %retval5 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval5
+}
diff --git a/test/Transforms/Inline/2007-06-25-WeakInline.ll b/test/Transforms/Inline/2007-06-25-WeakInline.ll
new file mode 100644
index 0000000..929891a
--- /dev/null
+++ b/test/Transforms/Inline/2007-06-25-WeakInline.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -inline -S | grep call
+
+; 'bar' can be overridden at link-time, don't inline it.
+
+define void @foo() {
+entry:
+ tail call void @bar( ) ; <i32> [#uses=0]
+ ret void
+}
+
+define weak void @bar() {
+ ret void
+}
+
diff --git a/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll b/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll
new file mode 100644
index 0000000..979157e
--- /dev/null
+++ b/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -inline -S | grep nounwind
+; RUN: opt < %s -inline -S | grep unreachable
+
+declare i1 @extern()
+
+define internal i32 @test() {
+entry:
+ %n = call i1 @extern( )
+ br i1 %n, label %r, label %u
+r:
+ ret i32 0
+u:
+ unwind
+}
+
+define i32 @caller() {
+ %X = call i32 @test( ) nounwind
+ ret i32 %X
+}
diff --git a/test/Transforms/Inline/2008-03-04-StructRet.ll b/test/Transforms/Inline/2008-03-04-StructRet.ll
new file mode 100644
index 0000000..3311d56
--- /dev/null
+++ b/test/Transforms/Inline/2008-03-04-StructRet.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -inline -disable-output
+ %struct.Benchmark = type { i32 (...)** }
+ %struct.Complex = type { double, double }
+ %struct.ComplexBenchmark = type { %struct.Benchmark }
+
+define %struct.Complex @_Zml7ComplexS_1(double %a.0, double %a.1, double %b.0, double %b.1) nounwind {
+entry:
+ %mrv = alloca %struct.Complex ; <%struct.Complex*> [#uses=2]
+ %mrv.gep = getelementptr %struct.Complex* %mrv, i32 0, i32 0 ; <double*> [#uses=1]
+ %mrv.ld = load double* %mrv.gep ; <double> [#uses=1]
+ %mrv.gep1 = getelementptr %struct.Complex* %mrv, i32 0, i32 1 ; <double*> [#uses=1]
+ %mrv.ld2 = load double* %mrv.gep1 ; <double> [#uses=1]
+ ret double %mrv.ld, double %mrv.ld2
+}
+
+define void @_ZNK16ComplexBenchmark9oop_styleEv(%struct.ComplexBenchmark* %this) nounwind {
+entry:
+ %tmp = alloca %struct.Complex ; <%struct.Complex*> [#uses=0]
+ br label %bb31
+bb: ; preds = %bb31
+ call %struct.Complex @_Zml7ComplexS_1( double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) nounwind ; <%struct.Complex>:0 [#uses=1]
+ %gr = getresult %struct.Complex %0, 1 ; <double> [#uses=0]
+ br label %bb31
+bb31: ; preds = %bb, %entry
+ br i1 false, label %bb, label %return
+return: ; preds = %bb31
+ ret void
+}
diff --git a/test/Transforms/Inline/2008-03-07-Inline-2.ll b/test/Transforms/Inline/2008-03-07-Inline-2.ll
new file mode 100644
index 0000000..0c968e6
--- /dev/null
+++ b/test/Transforms/Inline/2008-03-07-Inline-2.ll
@@ -0,0 +1,53 @@
+; RUN: opt < %s -inline -disable-output
+ %struct.Demand = type { double, double }
+ %struct.branch = type { %struct.Demand, double, double, double, double, %struct.branch*, [12 x %struct.leaf*] }
+ %struct.leaf = type { %struct.Demand, double, double }
+@P = external global double ; <double*> [#uses=1]
+
+define %struct.leaf* @build_leaf() nounwind {
+entry:
+ unreachable
+}
+
+define %struct.Demand @Compute_Branch2(%struct.branch* %br, double %theta_R, double %theta_I, double %pi_R, double %pi_I) nounwind {
+entry:
+ %mrv = alloca %struct.Demand ; <%struct.Demand*> [#uses=4]
+ %a2 = alloca %struct.Demand ; <%struct.Demand*> [#uses=0]
+ br i1 false, label %bb46, label %bb
+bb: ; preds = %entry
+ %mrv.gep = getelementptr %struct.Demand* %mrv, i32 0, i32 0 ; <double*> [#uses=1]
+ %mrv.ld = load double* %mrv.gep ; <double> [#uses=1]
+ %mrv.gep1 = getelementptr %struct.Demand* %mrv, i32 0, i32 1 ; <double*> [#uses=1]
+ %mrv.ld2 = load double* %mrv.gep1 ; <double> [#uses=1]
+ ret double %mrv.ld, double %mrv.ld2
+bb46: ; preds = %entry
+ br label %bb72
+bb49: ; preds = %bb72
+ call %struct.Demand @Compute_Leaf1( %struct.leaf* null, double 0.000000e+00, double 0.000000e+00 ) nounwind ; <%struct.Demand>:0 [#uses=1]
+ %gr = getresult %struct.Demand %0, 1 ; <double> [#uses=0]
+ br label %bb72
+bb72: ; preds = %bb49, %bb46
+ br i1 false, label %bb49, label %bb77
+bb77: ; preds = %bb72
+ %mrv.gep3 = getelementptr %struct.Demand* %mrv, i32 0, i32 0 ; <double*> [#uses=1]
+ %mrv.ld4 = load double* %mrv.gep3 ; <double> [#uses=1]
+ %mrv.gep5 = getelementptr %struct.Demand* %mrv, i32 0, i32 1 ; <double*> [#uses=1]
+ %mrv.ld6 = load double* %mrv.gep5 ; <double> [#uses=1]
+ ret double %mrv.ld4, double %mrv.ld6
+}
+
+define %struct.Demand @Compute_Leaf1(%struct.leaf* %l, double %pi_R, double %pi_I) nounwind {
+entry:
+ %mrv = alloca %struct.Demand ; <%struct.Demand*> [#uses=2]
+ %tmp10 = load double* @P, align 8 ; <double> [#uses=1]
+ %tmp11 = fcmp olt double %tmp10, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp11, label %bb, label %bb13
+bb: ; preds = %entry
+ br label %bb13
+bb13: ; preds = %bb, %entry
+ %mrv.gep = getelementptr %struct.Demand* %mrv, i32 0, i32 0 ; <double*> [#uses=1]
+ %mrv.ld = load double* %mrv.gep ; <double> [#uses=1]
+ %mrv.gep1 = getelementptr %struct.Demand* %mrv, i32 0, i32 1 ; <double*> [#uses=1]
+ %mrv.ld2 = load double* %mrv.gep1 ; <double> [#uses=1]
+ ret double %mrv.ld, double %mrv.ld2
+}
diff --git a/test/Transforms/Inline/2008-03-07-Inline.ll b/test/Transforms/Inline/2008-03-07-Inline.ll
new file mode 100644
index 0000000..86afb2d
--- /dev/null
+++ b/test/Transforms/Inline/2008-03-07-Inline.ll
@@ -0,0 +1,57 @@
+; RUN: opt < %s -inline -disable-output
+ %struct.Demand = type { double, double }
+ %struct.branch = type { %struct.Demand, double, double, double, double, %struct.branch*, [12 x %struct.leaf*] }
+ %struct.leaf = type { %struct.Demand, double, double }
+@P = external global double ; <double*> [#uses=1]
+
+define %struct.leaf* @build_leaf() nounwind {
+entry:
+ unreachable
+}
+
+define %struct.Demand @Compute_Branch2(%struct.branch* %br, double %theta_R, double %theta_I, double %pi_R, double %pi_I) nounwind {
+entry:
+ %mrv = alloca %struct.Demand ; <%struct.Demand*> [#uses=4]
+ %a2 = alloca %struct.Demand ; <%struct.Demand*> [#uses=0]
+ br i1 false, label %bb46, label %bb
+bb: ; preds = %entry
+ %mrv.gep = getelementptr %struct.Demand* %mrv, i32 0, i32 0 ; <double*> [#uses=1]
+ %mrv.ld = load double* %mrv.gep ; <double> [#uses=1]
+ %mrv.gep1 = getelementptr %struct.Demand* %mrv, i32 0, i32 1 ; <double*> [#uses=1]
+ %mrv.ld2 = load double* %mrv.gep1 ; <double> [#uses=1]
+ ret double %mrv.ld, double %mrv.ld2
+bb46: ; preds = %entry
+ br label %bb72
+bb49: ; preds = %bb72
+ call %struct.Demand @Compute_Leaf1( %struct.leaf* null, double 0.000000e+00, double 0.000000e+00 ) nounwind ; <%struct.Demand>:0 [#uses=1]
+ %gr = getresult %struct.Demand %0, 1 ; <double> [#uses=0]
+ br label %bb72
+bb72: ; preds = %bb49, %bb46
+ br i1 false, label %bb49, label %bb77
+bb77: ; preds = %bb72
+ %mrv.gep3 = getelementptr %struct.Demand* %mrv, i32 0, i32 0 ; <double*> [#uses=1]
+ %mrv.ld4 = load double* %mrv.gep3 ; <double> [#uses=1]
+ %mrv.gep5 = getelementptr %struct.Demand* %mrv, i32 0, i32 1 ; <double*> [#uses=1]
+ %mrv.ld6 = load double* %mrv.gep5 ; <double> [#uses=1]
+ ret double %mrv.ld4, double %mrv.ld6
+}
+
+define %struct.Demand @Compute_Leaf1(%struct.leaf* %l, double %pi_R, double %pi_I) nounwind {
+entry:
+ %mrv = alloca %struct.Demand ; <%struct.Demand*> [#uses=4]
+ %tmp10 = load double* @P, align 8 ; <double> [#uses=1]
+ %tmp11 = fcmp olt double %tmp10, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp11, label %bb, label %bb13
+bb: ; preds = %entry
+ %mrv.gep = getelementptr %struct.Demand* %mrv, i32 0, i32 0 ; <double*> [#uses=1]
+ %mrv.ld = load double* %mrv.gep ; <double> [#uses=1]
+ %mrv.gep1 = getelementptr %struct.Demand* %mrv, i32 0, i32 1 ; <double*> [#uses=1]
+ %mrv.ld2 = load double* %mrv.gep1 ; <double> [#uses=1]
+ ret double %mrv.ld, double %mrv.ld2
+bb13: ; preds = %entry
+ %mrv.gep3 = getelementptr %struct.Demand* %mrv, i32 0, i32 0 ; <double*> [#uses=1]
+ %mrv.ld4 = load double* %mrv.gep3 ; <double> [#uses=1]
+ %mrv.gep5 = getelementptr %struct.Demand* %mrv, i32 0, i32 1 ; <double*> [#uses=1]
+ %mrv.ld6 = load double* %mrv.gep5 ; <double> [#uses=1]
+ ret double %mrv.ld4, double %mrv.ld6
+}
diff --git a/test/Transforms/Inline/2008-09-02-AlwaysInline.ll b/test/Transforms/Inline/2008-09-02-AlwaysInline.ll
new file mode 100644
index 0000000..39095c4
--- /dev/null
+++ b/test/Transforms/Inline/2008-09-02-AlwaysInline.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -inline-threshold=0 -inline -S | not grep call
+
+define i32 @fn2() alwaysinline {
+ ret i32 1
+}
+
+define i32 @fn3() {
+ %r = call i32 @fn2()
+ ret i32 %r
+}
diff --git a/test/Transforms/Inline/2008-09-02-NoInline.ll b/test/Transforms/Inline/2008-09-02-NoInline.ll
new file mode 100644
index 0000000..33c8949
--- /dev/null
+++ b/test/Transforms/Inline/2008-09-02-NoInline.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -inline -S | grep call | count 1
+
+define i32 @fn2() noinline {
+ ret i32 1
+}
+
+define i32 @fn3() {
+ %r = call i32 @fn2()
+ ret i32 %r
+}
diff --git a/test/Transforms/Inline/2008-10-30-AlwaysInline.ll b/test/Transforms/Inline/2008-10-30-AlwaysInline.ll
new file mode 100644
index 0000000..11e5012
--- /dev/null
+++ b/test/Transforms/Inline/2008-10-30-AlwaysInline.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -always-inline -S | not grep call
+
+; Ensure that threshold doesn't disrupt always inline.
+; RUN: opt < %s -inline-threshold=-2000000001 -always-inline -S | not grep call
+
+
+define internal i32 @if0() alwaysinline {
+ ret i32 1
+}
+
+define i32 @f0() {
+ %r = call i32 @if0()
+ ret i32 %r
+}
diff --git a/test/Transforms/Inline/2008-11-04-AlwaysInline.ll b/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
new file mode 100644
index 0000000..bc9787b
--- /dev/null
+++ b/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -always-inline -S | grep {@foo}
+; Ensure that foo is not removed by always inliner
+; PR 2945
+
+define internal i32 @foo() nounwind {
+ ret i32 0
+}
diff --git a/test/Transforms/Inline/2009-01-08-NoInlineDynamicAlloca.ll b/test/Transforms/Inline/2009-01-08-NoInlineDynamicAlloca.ll
new file mode 100644
index 0000000..db2a799
--- /dev/null
+++ b/test/Transforms/Inline/2009-01-08-NoInlineDynamicAlloca.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -inline -S | grep call
+; Do not inline calls to variable-sized alloca.
+
+@q = common global i8* null ; <i8**> [#uses=1]
+
+define i8* @a(i32 %i) nounwind {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i8* ; <i8**> [#uses=1]
+ %p = alloca i8* ; <i8**> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ %0 = load i32* %i_addr, align 4 ; <i32> [#uses=1]
+ %1 = alloca i8, i32 %0 ; <i8*> [#uses=1]
+ store i8* %1, i8** %p, align 4
+ %2 = load i8** %p, align 4 ; <i8*> [#uses=1]
+ store i8* %2, i8** @q, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i8** %retval ; <i8*> [#uses=1]
+ ret i8* %retval1
+}
+
+define void @b(i32 %i) nounwind {
+entry:
+ %i_addr = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %i, i32* %i_addr
+ %0 = load i32* %i_addr, align 4 ; <i32> [#uses=1]
+ %1 = call i8* @a(i32 %0) nounwind ; <i8*> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/Inline/2009-01-12-RecursiveInline.ll b/test/Transforms/Inline/2009-01-12-RecursiveInline.ll
new file mode 100644
index 0000000..1a3325a
--- /dev/null
+++ b/test/Transforms/Inline/2009-01-12-RecursiveInline.ll
@@ -0,0 +1,92 @@
+; RUN: opt < %s -inline -S | grep {call.*fib} | count 4
+; First call to fib from fib is inlined, producing 2 instead of 1, total 3.
+; Second call to fib from fib is not inlined because new body of fib exceeds
+; inlining limit of 200. Plus call in main = 4 total.
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+@"\01LC" = internal constant [5 x i8] c"%ld\0A\00" ; <[5 x i8]*> [#uses=1]
+
+define i32 @fib(i32 %n) nounwind {
+entry:
+ %n_addr = alloca i32 ; <i32*> [#uses=4]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %n, i32* %n_addr
+ %1 = load i32* %n_addr, align 4 ; <i32> [#uses=1]
+ %2 = icmp ule i32 %1, 1 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %bb1
+
+bb: ; preds = %entry
+ store i32 1, i32* %0, align 4
+ br label %bb2
+
+bb1: ; preds = %entry
+ %3 = load i32* %n_addr, align 4 ; <i32> [#uses=1]
+ %4 = sub i32 %3, 2 ; <i32> [#uses=1]
+ %5 = call i32 @fib(i32 %4) nounwind ; <i32> [#uses=1]
+ %6 = load i32* %n_addr, align 4 ; <i32> [#uses=1]
+ %7 = sub i32 %6, 1 ; <i32> [#uses=1]
+ %8 = call i32 @fib(i32 %7) nounwind ; <i32> [#uses=1]
+ %9 = add i32 %5, %8 ; <i32> [#uses=1]
+ store i32 %9, i32* %0, align 4
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %10 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %10, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %bb2
+ %retval3 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval3
+}
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ %argc_addr = alloca i32 ; <i32*> [#uses=2]
+ %argv_addr = alloca i8** ; <i8***> [#uses=2]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %N = alloca i32 ; <i32*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %iftmp.0 = alloca i32 ; <i32*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %argc, i32* %argc_addr
+ store i8** %argv, i8*** %argv_addr
+ %1 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
+ %2 = icmp eq i32 %1, 2 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %bb1
+
+bb: ; preds = %entry
+ %3 = load i8*** %argv_addr, align 4 ; <i8**> [#uses=1]
+ %4 = getelementptr i8** %3, i32 1 ; <i8**> [#uses=1]
+ %5 = load i8** %4, align 4 ; <i8*> [#uses=1]
+ %6 = call i32 @atoi(i8* %5) nounwind ; <i32> [#uses=1]
+ store i32 %6, i32* %iftmp.0, align 4
+ br label %bb2
+
+bb1: ; preds = %entry
+ store i32 43, i32* %iftmp.0, align 4
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %7 = load i32* %iftmp.0, align 4 ; <i32> [#uses=1]
+ store i32 %7, i32* %N, align 4
+ %8 = load i32* %N, align 4 ; <i32> [#uses=1]
+ %9 = call i32 @fib(i32 %8) nounwind ; <i32> [#uses=1]
+ %10 = call i32 (i8*, ...)* @printf(i8* getelementptr ([5 x i8]* @"\01LC", i32 0, i32 0), i32 %9) nounwind ; <i32> [#uses=0]
+ store i32 0, i32* %0, align 4
+ %11 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %11, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %bb2
+ %retval3 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval3
+}
+
+declare i32 @atoi(i8*)
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/Transforms/Inline/2009-01-13-RecursiveInlineCrash.ll b/test/Transforms/Inline/2009-01-13-RecursiveInlineCrash.ll
new file mode 100644
index 0000000..7d8d16b
--- /dev/null
+++ b/test/Transforms/Inline/2009-01-13-RecursiveInlineCrash.ll
@@ -0,0 +1,293 @@
+; RUN: opt < %s -inline -argpromotion -disable-output
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
+@NumNodes = external global i32 ; <i32*> [#uses=0]
+@"\01LC" = external constant [43 x i8] ; <[43 x i8]*> [#uses=0]
+@"\01LC1" = external constant [19 x i8] ; <[19 x i8]*> [#uses=0]
+@"\01LC2" = external constant [17 x i8] ; <[17 x i8]*> [#uses=0]
+
+declare i32 @dealwithargs(i32, i8** nocapture) nounwind
+
+declare i32 @atoi(i8*)
+
+define internal fastcc i32 @adj(i32 %d, i32 %ct) nounwind readnone {
+entry:
+ switch i32 %d, label %return [
+ i32 0, label %bb
+ i32 1, label %bb10
+ i32 2, label %bb5
+ i32 3, label %bb15
+ ]
+
+bb: ; preds = %entry
+ switch i32 %ct, label %bb3 [
+ i32 1, label %return
+ i32 0, label %return
+ ]
+
+bb3: ; preds = %bb
+ ret i32 0
+
+bb5: ; preds = %entry
+ switch i32 %ct, label %bb8 [
+ i32 3, label %return
+ i32 2, label %return
+ ]
+
+bb8: ; preds = %bb5
+ ret i32 0
+
+bb10: ; preds = %entry
+ switch i32 %ct, label %bb13 [
+ i32 1, label %return
+ i32 3, label %return
+ ]
+
+bb13: ; preds = %bb10
+ ret i32 0
+
+bb15: ; preds = %entry
+ switch i32 %ct, label %bb18 [
+ i32 2, label %return
+ i32 0, label %return
+ ]
+
+bb18: ; preds = %bb15
+ ret i32 0
+
+return: ; preds = %bb15, %bb15, %bb10, %bb10, %bb5, %bb5, %bb, %bb, %entry
+ ret i32 1
+}
+
+declare fastcc i32 @reflect(i32, i32) nounwind readnone
+
+declare i32 @CountTree(%struct.quad_struct* nocapture) nounwind readonly
+
+define internal fastcc %struct.quad_struct* @child(%struct.quad_struct* nocapture %tree, i32 %ct) nounwind readonly {
+entry:
+ switch i32 %ct, label %bb5 [
+ i32 0, label %bb1
+ i32 1, label %bb
+ i32 2, label %bb3
+ i32 3, label %bb2
+ ]
+
+bb: ; preds = %entry
+ %0 = getelementptr %struct.quad_struct* %tree, i32 0, i32 3 ; <%struct.quad_struct**> [#uses=1]
+ %1 = load %struct.quad_struct** %0, align 4 ; <%struct.quad_struct*> [#uses=1]
+ ret %struct.quad_struct* %1
+
+bb1: ; preds = %entry
+ %2 = getelementptr %struct.quad_struct* %tree, i32 0, i32 2 ; <%struct.quad_struct**> [#uses=1]
+ %3 = load %struct.quad_struct** %2, align 4 ; <%struct.quad_struct*> [#uses=1]
+ ret %struct.quad_struct* %3
+
+bb2: ; preds = %entry
+ %4 = getelementptr %struct.quad_struct* %tree, i32 0, i32 5 ; <%struct.quad_struct**> [#uses=1]
+ %5 = load %struct.quad_struct** %4, align 4 ; <%struct.quad_struct*> [#uses=1]
+ ret %struct.quad_struct* %5
+
+bb3: ; preds = %entry
+ %6 = getelementptr %struct.quad_struct* %tree, i32 0, i32 4 ; <%struct.quad_struct**> [#uses=1]
+ %7 = load %struct.quad_struct** %6, align 4 ; <%struct.quad_struct*> [#uses=1]
+ ret %struct.quad_struct* %7
+
+bb5: ; preds = %entry
+ ret %struct.quad_struct* null
+}
+
+define internal fastcc %struct.quad_struct* @gtequal_adj_neighbor(%struct.quad_struct* nocapture %tree, i32 %d) nounwind readonly {
+entry:
+ %0 = getelementptr %struct.quad_struct* %tree, i32 0, i32 6 ; <%struct.quad_struct**> [#uses=1]
+ %1 = load %struct.quad_struct** %0, align 4 ; <%struct.quad_struct*> [#uses=4]
+ %2 = getelementptr %struct.quad_struct* %tree, i32 0, i32 1 ; <i32*> [#uses=1]
+ %3 = load i32* %2, align 4 ; <i32> [#uses=2]
+ %4 = icmp eq %struct.quad_struct* %1, null ; <i1> [#uses=1]
+ br i1 %4, label %bb3, label %bb
+
+bb: ; preds = %entry
+ %5 = call fastcc i32 @adj(i32 %d, i32 %3) nounwind ; <i32> [#uses=1]
+ %6 = icmp eq i32 %5, 0 ; <i1> [#uses=1]
+ br i1 %6, label %bb3, label %bb1
+
+bb1: ; preds = %bb
+ %7 = call fastcc %struct.quad_struct* @gtequal_adj_neighbor(%struct.quad_struct* %1, i32 %d) nounwind ; <%struct.quad_struct*> [#uses=1]
+ br label %bb3
+
+bb3: ; preds = %bb1, %bb, %entry
+ %q.0 = phi %struct.quad_struct* [ %7, %bb1 ], [ %1, %bb ], [ %1, %entry ] ; <%struct.quad_struct*> [#uses=4]
+ %8 = icmp eq %struct.quad_struct* %q.0, null ; <i1> [#uses=1]
+ br i1 %8, label %bb7, label %bb4
+
+bb4: ; preds = %bb3
+ %9 = getelementptr %struct.quad_struct* %q.0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 4 ; <i32> [#uses=1]
+ %11 = icmp eq i32 %10, 2 ; <i1> [#uses=1]
+ br i1 %11, label %bb5, label %bb7
+
+bb5: ; preds = %bb4
+ %12 = call fastcc i32 @reflect(i32 %d, i32 %3) nounwind ; <i32> [#uses=1]
+ %13 = call fastcc %struct.quad_struct* @child(%struct.quad_struct* %q.0, i32 %12) nounwind ; <%struct.quad_struct*> [#uses=1]
+ ret %struct.quad_struct* %13
+
+bb7: ; preds = %bb4, %bb3
+ ret %struct.quad_struct* %q.0
+}
+
+declare fastcc i32 @sum_adjacent(%struct.quad_struct* nocapture, i32, i32, i32) nounwind readonly
+
+define i32 @perimeter(%struct.quad_struct* nocapture %tree, i32 %size) nounwind readonly {
+entry:
+ %0 = getelementptr %struct.quad_struct* %tree, i32 0, i32 0 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %2 = icmp eq i32 %1, 2 ; <i1> [#uses=1]
+ br i1 %2, label %bb, label %bb2
+
+bb: ; preds = %entry
+ %3 = getelementptr %struct.quad_struct* %tree, i32 0, i32 4 ; <%struct.quad_struct**> [#uses=1]
+ %4 = load %struct.quad_struct** %3, align 4 ; <%struct.quad_struct*> [#uses=1]
+ %5 = sdiv i32 %size, 2 ; <i32> [#uses=1]
+ %6 = call i32 @perimeter(%struct.quad_struct* %4, i32 %5) nounwind ; <i32> [#uses=1]
+ %7 = getelementptr %struct.quad_struct* %tree, i32 0, i32 5 ; <%struct.quad_struct**> [#uses=1]
+ %8 = load %struct.quad_struct** %7, align 4 ; <%struct.quad_struct*> [#uses=1]
+ %9 = sdiv i32 %size, 2 ; <i32> [#uses=1]
+ %10 = call i32 @perimeter(%struct.quad_struct* %8, i32 %9) nounwind ; <i32> [#uses=1]
+ %11 = add i32 %10, %6 ; <i32> [#uses=1]
+ %12 = getelementptr %struct.quad_struct* %tree, i32 0, i32 3 ; <%struct.quad_struct**> [#uses=1]
+ %13 = load %struct.quad_struct** %12, align 4 ; <%struct.quad_struct*> [#uses=1]
+ %14 = sdiv i32 %size, 2 ; <i32> [#uses=1]
+ %15 = call i32 @perimeter(%struct.quad_struct* %13, i32 %14) nounwind ; <i32> [#uses=1]
+ %16 = add i32 %15, %11 ; <i32> [#uses=1]
+ %17 = getelementptr %struct.quad_struct* %tree, i32 0, i32 2 ; <%struct.quad_struct**> [#uses=1]
+ %18 = load %struct.quad_struct** %17, align 4 ; <%struct.quad_struct*> [#uses=1]
+ %19 = sdiv i32 %size, 2 ; <i32> [#uses=1]
+ %20 = call i32 @perimeter(%struct.quad_struct* %18, i32 %19) nounwind ; <i32> [#uses=1]
+ %21 = add i32 %20, %16 ; <i32> [#uses=1]
+ ret i32 %21
+
+bb2: ; preds = %entry
+ %22 = getelementptr %struct.quad_struct* %tree, i32 0, i32 0 ; <i32*> [#uses=1]
+ %23 = load i32* %22, align 4 ; <i32> [#uses=1]
+ %24 = icmp eq i32 %23, 0 ; <i1> [#uses=1]
+ br i1 %24, label %bb3, label %bb23
+
+bb3: ; preds = %bb2
+ %25 = call fastcc %struct.quad_struct* @gtequal_adj_neighbor(%struct.quad_struct* %tree, i32 0) nounwind ; <%struct.quad_struct*> [#uses=4]
+ %26 = icmp eq %struct.quad_struct* %25, null ; <i1> [#uses=1]
+ br i1 %26, label %bb8, label %bb4
+
+bb4: ; preds = %bb3
+ %27 = getelementptr %struct.quad_struct* %25, i32 0, i32 0 ; <i32*> [#uses=1]
+ %28 = load i32* %27, align 4 ; <i32> [#uses=1]
+ %29 = icmp eq i32 %28, 1 ; <i1> [#uses=1]
+ br i1 %29, label %bb8, label %bb6
+
+bb6: ; preds = %bb4
+ %30 = getelementptr %struct.quad_struct* %25, i32 0, i32 0 ; <i32*> [#uses=1]
+ %31 = load i32* %30, align 4 ; <i32> [#uses=1]
+ %32 = icmp eq i32 %31, 2 ; <i1> [#uses=1]
+ br i1 %32, label %bb7, label %bb8
+
+bb7: ; preds = %bb6
+ %33 = call fastcc i32 @sum_adjacent(%struct.quad_struct* %25, i32 3, i32 2, i32 %size) nounwind ; <i32> [#uses=1]
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb6, %bb4, %bb3
+ %retval1.1 = phi i32 [ 0, %bb6 ], [ %33, %bb7 ], [ %size, %bb4 ], [ %size, %bb3 ] ; <i32> [#uses=3]
+ %34 = call fastcc %struct.quad_struct* @gtequal_adj_neighbor(%struct.quad_struct* %tree, i32 1) nounwind ; <%struct.quad_struct*> [#uses=4]
+ %35 = icmp eq %struct.quad_struct* %34, null ; <i1> [#uses=1]
+ br i1 %35, label %bb10, label %bb9
+
+bb9: ; preds = %bb8
+ %36 = getelementptr %struct.quad_struct* %34, i32 0, i32 0 ; <i32*> [#uses=1]
+ %37 = load i32* %36, align 4 ; <i32> [#uses=1]
+ %38 = icmp eq i32 %37, 1 ; <i1> [#uses=1]
+ br i1 %38, label %bb10, label %bb11
+
+bb10: ; preds = %bb9, %bb8
+ %39 = add i32 %retval1.1, %size ; <i32> [#uses=1]
+ br label %bb13
+
+bb11: ; preds = %bb9
+ %40 = getelementptr %struct.quad_struct* %34, i32 0, i32 0 ; <i32*> [#uses=1]
+ %41 = load i32* %40, align 4 ; <i32> [#uses=1]
+ %42 = icmp eq i32 %41, 2 ; <i1> [#uses=1]
+ br i1 %42, label %bb12, label %bb13
+
+bb12: ; preds = %bb11
+ %43 = call fastcc i32 @sum_adjacent(%struct.quad_struct* %34, i32 2, i32 0, i32 %size) nounwind ; <i32> [#uses=1]
+ %44 = add i32 %43, %retval1.1 ; <i32> [#uses=1]
+ br label %bb13
+
+bb13: ; preds = %bb12, %bb11, %bb10
+ %retval1.2 = phi i32 [ %retval1.1, %bb11 ], [ %44, %bb12 ], [ %39, %bb10 ] ; <i32> [#uses=3]
+ %45 = call fastcc %struct.quad_struct* @gtequal_adj_neighbor(%struct.quad_struct* %tree, i32 2) nounwind ; <%struct.quad_struct*> [#uses=4]
+ %46 = icmp eq %struct.quad_struct* %45, null ; <i1> [#uses=1]
+ br i1 %46, label %bb15, label %bb14
+
+bb14: ; preds = %bb13
+ %47 = getelementptr %struct.quad_struct* %45, i32 0, i32 0 ; <i32*> [#uses=1]
+ %48 = load i32* %47, align 4 ; <i32> [#uses=1]
+ %49 = icmp eq i32 %48, 1 ; <i1> [#uses=1]
+ br i1 %49, label %bb15, label %bb16
+
+bb15: ; preds = %bb14, %bb13
+ %50 = add i32 %retval1.2, %size ; <i32> [#uses=1]
+ br label %bb18
+
+bb16: ; preds = %bb14
+ %51 = getelementptr %struct.quad_struct* %45, i32 0, i32 0 ; <i32*> [#uses=1]
+ %52 = load i32* %51, align 4 ; <i32> [#uses=1]
+ %53 = icmp eq i32 %52, 2 ; <i1> [#uses=1]
+ br i1 %53, label %bb17, label %bb18
+
+bb17: ; preds = %bb16
+ %54 = call fastcc i32 @sum_adjacent(%struct.quad_struct* %45, i32 0, i32 1, i32 %size) nounwind ; <i32> [#uses=1]
+ %55 = add i32 %54, %retval1.2 ; <i32> [#uses=1]
+ br label %bb18
+
+bb18: ; preds = %bb17, %bb16, %bb15
+ %retval1.3 = phi i32 [ %retval1.2, %bb16 ], [ %55, %bb17 ], [ %50, %bb15 ] ; <i32> [#uses=3]
+ %56 = call fastcc %struct.quad_struct* @gtequal_adj_neighbor(%struct.quad_struct* %tree, i32 3) nounwind ; <%struct.quad_struct*> [#uses=4]
+ %57 = icmp eq %struct.quad_struct* %56, null ; <i1> [#uses=1]
+ br i1 %57, label %bb20, label %bb19
+
+bb19: ; preds = %bb18
+ %58 = getelementptr %struct.quad_struct* %56, i32 0, i32 0 ; <i32*> [#uses=1]
+ %59 = load i32* %58, align 4 ; <i32> [#uses=1]
+ %60 = icmp eq i32 %59, 1 ; <i1> [#uses=1]
+ br i1 %60, label %bb20, label %bb21
+
+bb20: ; preds = %bb19, %bb18
+ %61 = add i32 %retval1.3, %size ; <i32> [#uses=1]
+ ret i32 %61
+
+bb21: ; preds = %bb19
+ %62 = getelementptr %struct.quad_struct* %56, i32 0, i32 0 ; <i32*> [#uses=1]
+ %63 = load i32* %62, align 4 ; <i32> [#uses=1]
+ %64 = icmp eq i32 %63, 2 ; <i1> [#uses=1]
+ br i1 %64, label %bb22, label %bb23
+
+bb22: ; preds = %bb21
+ %65 = call fastcc i32 @sum_adjacent(%struct.quad_struct* %56, i32 1, i32 3, i32 %size) nounwind ; <i32> [#uses=1]
+ %66 = add i32 %65, %retval1.3 ; <i32> [#uses=1]
+ ret i32 %66
+
+bb23: ; preds = %bb21, %bb2
+ %retval1.0 = phi i32 [ 0, %bb2 ], [ %retval1.3, %bb21 ] ; <i32> [#uses=1]
+ ret i32 %retval1.0
+}
+
+declare i32 @main(i32, i8** nocapture) noreturn nounwind
+
+declare i32 @printf(i8*, ...) nounwind
+
+declare void @exit(i32) noreturn nounwind
+
+declare fastcc i32 @CheckOutside(i32, i32) nounwind readnone
+
+declare fastcc i32 @CheckIntersect(i32, i32, i32) nounwind readnone
+
+declare %struct.quad_struct* @MakeTree(i32, i32, i32, i32, i32, %struct.quad_struct*, i32, i32) nounwind
diff --git a/test/Transforms/Inline/2009-05-07-CallUsingSelfCrash.ll b/test/Transforms/Inline/2009-05-07-CallUsingSelfCrash.ll
new file mode 100644
index 0000000..c8629ea2
--- /dev/null
+++ b/test/Transforms/Inline/2009-05-07-CallUsingSelfCrash.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -inline -disable-output
+; PR4123
+ %struct.S0 = type <{ i32 }>
+ %struct.S1 = type <{ i8, i8, i8, i8, %struct.S0 }>
+ %struct.S2 = type <{ %struct.S1, i32 }>
+
+define void @func_113(%struct.S1* noalias nocapture sret %agg.result, i8 signext %p_114) noreturn nounwind {
+entry:
+ unreachable
+
+for.inc: ; preds = %for.inc
+ %call48 = call fastcc signext i8 @safe_sub_func_uint8_t_u_u(i8 signext %call48) ; <i8> [#uses=1]
+ br label %for.inc
+}
+
+define fastcc signext i8 @safe_sub_func_uint8_t_u_u(i8 signext %_ui1) nounwind readnone {
+entry:
+ ret i8 %_ui1
+}
+
diff --git a/test/Transforms/Inline/PR4909.ll b/test/Transforms/Inline/PR4909.ll
new file mode 100644
index 0000000..24545f9
--- /dev/null
+++ b/test/Transforms/Inline/PR4909.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -partial-inliner -disable-output
+
+define i32 @f() {
+entry:
+ br label %return
+
+return: ; preds = %entry
+ ret i32 undef
+}
+
+define i32 @g() {
+entry:
+ %0 = call i32 @f()
+ ret i32 %0
+}
diff --git a/test/Transforms/Inline/alloca-in-scc.ll b/test/Transforms/Inline/alloca-in-scc.ll
new file mode 100644
index 0000000..d539255
--- /dev/null
+++ b/test/Transforms/Inline/alloca-in-scc.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -inline | llvm-dis
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+
+define i32 @main(i32 %argc, i8** %argv) nounwind ssp {
+entry:
+ call fastcc void @c() nounwind
+ unreachable
+}
+
+define internal fastcc void @a() nounwind ssp {
+entry:
+ %al = alloca [3 x i32], align 4
+ %0 = getelementptr inbounds [3 x i32]* %al, i32 0, i32 2
+
+ call fastcc void @c() nounwind
+ unreachable
+}
+
+define internal fastcc void @b() nounwind ssp {
+entry:
+ tail call fastcc void @a() nounwind ssp
+ unreachable
+}
+
+define internal fastcc void @c() nounwind ssp {
+entry:
+ call fastcc void @b() nounwind
+ unreachable
+}
diff --git a/test/Transforms/Inline/alloca_test.ll b/test/Transforms/Inline/alloca_test.ll
new file mode 100644
index 0000000..e5791d5
--- /dev/null
+++ b/test/Transforms/Inline/alloca_test.ll
@@ -0,0 +1,23 @@
+; This test ensures that alloca instructions in the entry block for an inlined
+; function are moved to the top of the function they are inlined into.
+;
+; RUN: opt -S -inline %s | FileCheck %s
+
+define i32 @func(i32 %i) {
+ %X = alloca i32 ; <i32*> [#uses=1]
+ store i32 %i, i32* %X
+ ret i32 %i
+}
+
+declare void @bar()
+
+define i32 @main(i32 %argc) {
+Entry:
+; CHECK: Entry
+; CHECK-NEXT: alloca
+ call void @bar( )
+ %X = call i32 @func( i32 7 ) ; <i32> [#uses=1]
+ %Y = add i32 %X, %argc ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/Inline/always_inline_dyn_alloca.ll b/test/Transforms/Inline/always_inline_dyn_alloca.ll
new file mode 100644
index 0000000..25cfc49
--- /dev/null
+++ b/test/Transforms/Inline/always_inline_dyn_alloca.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -inline -S | not grep callee
+; rdar://6655932
+
+; If callee is marked alwaysinline, inline it! Even if callee has dynamic
+; alloca and caller does not,
+
+define internal void @callee(i32 %N) alwaysinline {
+ %P = alloca i32, i32 %N
+ ret void
+}
+
+define void @foo(i32 %N) {
+ call void @callee( i32 %N )
+ ret void
+}
diff --git a/test/Transforms/Inline/array_merge.ll b/test/Transforms/Inline/array_merge.ll
new file mode 100644
index 0000000..0d176b8
--- /dev/null
+++ b/test/Transforms/Inline/array_merge.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -inline -S | FileCheck %s
+; rdar://7173846
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+
+define internal void @foo() nounwind ssp {
+entry:
+ %A = alloca [100 x i32]
+ %B = alloca [100 x i32]
+ call void @bar([100 x i32]* %A, [100 x i32]* %B) nounwind
+ ret void
+}
+
+declare void @bar([100 x i32]*, [100 x i32]*)
+
+define void @test() nounwind ssp {
+entry:
+; CHECK: @test()
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %A.i = alloca
+; CHECK-NEXT: %B.i = alloca
+; CHECK-NEXT: call void
+ call void @foo() nounwind
+ call void @foo() nounwind
+ ret void
+}
diff --git a/test/Transforms/Inline/basictest.ll b/test/Transforms/Inline/basictest.ll
new file mode 100644
index 0000000..6531b9e
--- /dev/null
+++ b/test/Transforms/Inline/basictest.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -inline -scalarrepl -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+define i32 @test1f(i32 %i) {
+ ret i32 %i
+}
+
+define i32 @test1(i32 %W) {
+ %X = call i32 @test1f(i32 7)
+ %Y = add i32 %X, %W
+ ret i32 %Y
+; CHECK: @test1(
+; CHECK-NEXT: %Y = add i32 7, %W
+; CHECK-NEXT: ret i32 %Y
+}
+
+
+
+; rdar://7339069
+
+%T = type { i32, i32 }
+
+; CHECK-NOT: @test2f
+define internal %T* @test2f(i1 %cond, %T* %P) {
+ br i1 %cond, label %T, label %F
+
+T:
+ %A = getelementptr %T* %P, i32 0, i32 0
+ store i32 42, i32* %A
+ ret %T* %P
+
+F:
+ ret %T* %P
+}
+
+define i32 @test2(i1 %cond) {
+ %A = alloca %T
+
+ %B = call %T* @test2f(i1 %cond, %T* %A)
+ %C = getelementptr %T* %B, i32 0, i32 0
+ %D = load i32* %C
+ ret i32 %D
+
+; CHECK: @test2(
+; CHECK-NOT: = alloca
+; CHECK: ret i32 42
+}
diff --git a/test/Transforms/Inline/byval.ll b/test/Transforms/Inline/byval.ll
new file mode 100644
index 0000000..c3552f6
--- /dev/null
+++ b/test/Transforms/Inline/byval.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -inline -S | grep {llvm.memcpy}
+
+; Inlining a byval struct should cause an explicit copy into an alloca.
+
+ %struct.ss = type { i32, i64 }
[email protected] = internal constant [10 x i8] c"%d, %lld\0A\00" ; <[10 x i8]*> [#uses=1]
+
+define internal void @f(%struct.ss* byval %b) nounwind {
+entry:
+ %tmp = getelementptr %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2]
+ %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
+ store i32 %tmp2, i32* %tmp, align 4
+ ret void
+}
+
+declare i32 @printf(i8*, ...) nounwind
+
+define i32 @main() nounwind {
+entry:
+ %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
+ %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp1, align 8
+ %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
+ store i64 2, i64* %tmp4, align 4
+ call void @f( %struct.ss* byval %S ) nounwind
+ ret i32 0
+}
diff --git a/test/Transforms/Inline/byval2.ll b/test/Transforms/Inline/byval2.ll
new file mode 100644
index 0000000..a7ab77c
--- /dev/null
+++ b/test/Transforms/Inline/byval2.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -inline -S | not grep {llvm.memcpy}
+
+; Inlining a byval struct should NOT cause an explicit copy
+; into an alloca if the function is readonly
+
+ %struct.ss = type { i32, i64 }
[email protected] = internal constant [10 x i8] c"%d, %lld\0A\00" ; <[10 x i8]*> [#uses=1]
+
+define internal i32 @f(%struct.ss* byval %b) nounwind readonly {
+entry:
+ %tmp = getelementptr %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2]
+ %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+declare i32 @printf(i8*, ...) nounwind
+
+define i32 @main() nounwind {
+entry:
+ %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
+ %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp1, align 8
+ %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
+ store i64 2, i64* %tmp4, align 4
+ %X = call i32 @f( %struct.ss* byval %S ) nounwind
+ ret i32 %X
+}
diff --git a/test/Transforms/Inline/callgraph-update.ll b/test/Transforms/Inline/callgraph-update.ll
new file mode 100644
index 0000000..ff0120b
--- /dev/null
+++ b/test/Transforms/Inline/callgraph-update.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -inline -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+; PR3601
+declare void @solve()
+
+define internal fastcc void @read() {
+ br label %bb4
+
+bb3:
+ br label %bb4
+
+bb4:
+ call void @solve()
+ br i1 false, label %bb5, label %bb3
+
+bb5:
+ unreachable
+}
+
+define internal fastcc void @parse() {
+ call fastcc void @read()
+ ret void
+}
+
+define void @main() {
+ invoke fastcc void @parse()
+ to label %invcont unwind label %lpad
+
+invcont:
+ unreachable
+
+lpad:
+ unreachable
+}
diff --git a/test/Transforms/Inline/casts.ll b/test/Transforms/Inline/casts.ll
new file mode 100644
index 0000000..166185a
--- /dev/null
+++ b/test/Transforms/Inline/casts.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -inline -S | grep {ret i32 1}
+; ModuleID = 'short.opt.bc'
+
+define i32 @testBool(i1 %X) {
+ %tmp = zext i1 %X to i32 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i32 @testByte(i8 %X) {
+ %tmp = icmp ne i8 %X, 0 ; <i1> [#uses=1]
+ %tmp.i = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.i
+}
+
+define i32 @main() {
+ %rslt = call i32 @testByte( i8 123 ) ; <i32> [#uses=1]
+ ret i32 %rslt
+}
+
diff --git a/test/Transforms/Inline/cfg_preserve_test.ll b/test/Transforms/Inline/cfg_preserve_test.ll
new file mode 100644
index 0000000..9597109
--- /dev/null
+++ b/test/Transforms/Inline/cfg_preserve_test.ll
@@ -0,0 +1,16 @@
+; This test ensures that inlining an "empty" function does not destroy the CFG
+;
+; RUN: opt < %s -inline -S | not grep br
+
+define i32 @func(i32 %i) {
+ ret i32 %i
+}
+
+declare void @bar()
+
+define i32 @main(i32 %argc) {
+Entry:
+ %X = call i32 @func( i32 7 ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/Inline/crash.ll b/test/Transforms/Inline/crash.ll
new file mode 100644
index 0000000..f34b44c
--- /dev/null
+++ b/test/Transforms/Inline/crash.ll
@@ -0,0 +1,88 @@
+; RUN: opt < %s -inline -argpromotion -instcombine -disable-output
+
+; This test was failing because the inliner would inline @list_DeleteElement
+; into @list_DeleteDuplicates and then into @inf_GetBackwardPartnerLits,
+; turning the indirect call into a direct one. This allowed instcombine to see
+; the bitcast and eliminate it, deleting the original call and introducing
+; another one. This crashed the inliner because the new call was not in the
+; callgraph.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+
+
+define void @list_DeleteElement(i32 (i8*, i8*)* nocapture %Test) nounwind ssp {
+entry:
+ %0 = call i32 %Test(i8* null, i8* undef) nounwind
+ ret void
+}
+
+
+define void @list_DeleteDuplicates(i32 (i8*, i8*)* nocapture %Test) nounwind ssp {
+foo:
+ call void @list_DeleteElement(i32 (i8*, i8*)* %Test) nounwind ssp
+ call fastcc void @list_Rplacd1284() nounwind ssp
+ unreachable
+
+}
+
+define internal i32 @inf_LiteralsHaveSameSubtermAndAreFromSameClause(i32* nocapture %L1, i32* nocapture %L2) nounwind readonly ssp {
+entry:
+ unreachable
+}
+
+
+define internal fastcc void @inf_GetBackwardPartnerLits(i32* nocapture %Flags) nounwind ssp {
+test:
+ call void @list_DeleteDuplicates(i32 (i8*, i8*)* bitcast (i32 (i32*, i32*)* @inf_LiteralsHaveSameSubtermAndAreFromSameClause to i32 (i8*, i8*)*)) nounwind
+ ret void
+}
+
+
+define void @inf_BackwardEmptySortPlusPlus() nounwind ssp {
+entry:
+ call fastcc void @inf_GetBackwardPartnerLits(i32* null) nounwind ssp
+ unreachable
+}
+
+define void @inf_BackwardWeakening() nounwind ssp {
+entry:
+ call fastcc void @inf_GetBackwardPartnerLits(i32* null) nounwind ssp
+ unreachable
+}
+
+declare fastcc void @list_Rplacd1284() nounwind ssp
+
+
+
+
+;============================
+; PR5208
+
+define void @AAA() {
+entry:
+ %A = alloca i8, i32 undef, align 1
+ invoke fastcc void @XXX()
+ to label %invcont98 unwind label %lpad156
+
+invcont98:
+ unreachable
+
+lpad156:
+ unreachable
+}
+
+declare fastcc void @YYY()
+
+define internal fastcc void @XXX() {
+entry:
+ %B = alloca i8, i32 undef, align 1
+ invoke fastcc void @YYY()
+ to label %bb260 unwind label %lpad
+
+bb260:
+ ret void
+
+lpad:
+ unwind
+}
diff --git a/test/Transforms/Inline/delete-call.ll b/test/Transforms/Inline/delete-call.ll
new file mode 100644
index 0000000..3505608
--- /dev/null
+++ b/test/Transforms/Inline/delete-call.ll
@@ -0,0 +1,22 @@
+; RUN: opt %s -S -inline -functionattrs -stats |& grep {Number of call sites deleted, not inlined}
+; RUN: opt %s -S -inline -stats |& grep {Number of functions inlined}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+target triple = "i386-apple-darwin9.8"
+
+define internal i32 @test(i32 %x, i32 %y, i32 %z) nounwind {
+entry:
+ %0 = add nsw i32 %y, %z ; <i32> [#uses=1]
+ %1 = mul i32 %0, %x ; <i32> [#uses=1]
+ %2 = mul i32 %y, %z ; <i32> [#uses=1]
+ %3 = add nsw i32 %1, %2 ; <i32> [#uses=1]
+ ret i32 %3
+}
+
+define i32 @test2() nounwind {
+entry:
+ %0 = call i32 @test(i32 1, i32 2, i32 4) nounwind ; <i32> [#uses=1]
+ ret i32 14
+}
+
+
diff --git a/test/Transforms/Inline/dg.exp b/test/Transforms/Inline/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/Inline/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/Inline/dynamic_alloca_test.ll b/test/Transforms/Inline/dynamic_alloca_test.ll
new file mode 100644
index 0000000..0286535
--- /dev/null
+++ b/test/Transforms/Inline/dynamic_alloca_test.ll
@@ -0,0 +1,35 @@
+; Test that functions with dynamic allocas get inlined in a case where
+; naively inlining it would result in a miscompilation.
+; Functions with dynamic allocas can only be inlined into functions that
+; already have dynamic allocas.
+
+; RUN: opt < %s -inline -S | \
+; RUN: grep llvm.stacksave
+; RUN: opt < %s -inline -S | not grep callee
+
+
+declare void @ext(i32*)
+
+define internal void @callee(i32 %N) {
+ %P = alloca i32, i32 %N ; <i32*> [#uses=1]
+ call void @ext( i32* %P )
+ ret void
+}
+
+define void @foo(i32 %N) {
+; <label>:0
+ %P = alloca i32, i32 %N ; <i32*> [#uses=1]
+ call void @ext( i32* %P )
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %count = phi i32 [ 0, %0 ], [ %next, %Loop ] ; <i32> [#uses=2]
+ %next = add i32 %count, 1 ; <i32> [#uses=1]
+ call void @callee( i32 %N )
+ %cond = icmp eq i32 %count, 100000 ; <i1> [#uses=1]
+ br i1 %cond, label %out, label %Loop
+
+out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/Inline/externally_available.ll b/test/Transforms/Inline/externally_available.ll
new file mode 100644
index 0000000..43fe5d37
--- /dev/null
+++ b/test/Transforms/Inline/externally_available.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -inline -constprop -S > %t
+; RUN: not grep test_function %t
+; RUN: grep {ret i32 5} %t
+
+
+; test_function should not be emitted to the .s file.
+define available_externally i32 @test_function() {
+ ret i32 4
+}
+
+
+define i32 @result() {
+ %A = call i32 @test_function()
+ %B = add i32 %A, 1
+ ret i32 %B
+}
\ No newline at end of file
diff --git a/test/Transforms/Inline/indirect_resolve.ll b/test/Transforms/Inline/indirect_resolve.ll
new file mode 100644
index 0000000..76182e2
--- /dev/null
+++ b/test/Transforms/Inline/indirect_resolve.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -inline | llvm-dis
+; PR4834
+
+define i32 @main() {
+ %funcall1_ = call fastcc i32 ()* ()* @f1()
+ %executecommandptr1_ = call i32 %funcall1_()
+ ret i32 %executecommandptr1_
+}
+
+define internal fastcc i32 ()* @f1() nounwind readnone {
+ ret i32 ()* @f2
+}
+
+define internal i32 @f2() nounwind readnone {
+ ret i32 1
+}
diff --git a/test/Transforms/Inline/inline-invoke-tail.ll b/test/Transforms/Inline/inline-invoke-tail.ll
new file mode 100644
index 0000000..961f678
--- /dev/null
+++ b/test/Transforms/Inline/inline-invoke-tail.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -inline -S | not grep {tail call void @llvm.memcpy.i32}
+; PR3550
+
+define internal void @foo(i32* %p, i32* %q) {
+ %pp = bitcast i32* %p to i8*
+ %qq = bitcast i32* %q to i8*
+ tail call void @llvm.memcpy.i32(i8* %pp, i8* %qq, i32 4, i32 1)
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
+
+define i32 @main() {
+ %a = alloca i32 ; <i32*> [#uses=3]
+ %b = alloca i32 ; <i32*> [#uses=2]
+ store i32 1, i32* %a, align 4
+ store i32 0, i32* %b, align 4
+ invoke void @foo(i32* %a, i32* %b)
+ to label %invcont unwind label %lpad
+
+invcont:
+ %retval = load i32* %a, align 4
+ ret i32 %retval
+
+lpad:
+ %eh_ptr = call i8* @llvm.eh.exception()
+ %eh_select = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null)
+ unreachable
+}
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
+
+declare i32 @__gxx_personality_v0(...)
diff --git a/test/Transforms/Inline/inline-tail.ll b/test/Transforms/Inline/inline-tail.ll
new file mode 100644
index 0000000..8bb059d
--- /dev/null
+++ b/test/Transforms/Inline/inline-tail.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -inline -S | not grep tail
+
+declare void @bar(i32*)
+
+define internal void @foo(i32* %P) {
+ tail call void @bar( i32* %P )
+ ret void
+}
+
+define void @caller() {
+ %A = alloca i32 ; <i32*> [#uses=1]
+ call void @foo( i32* %A )
+ ret void
+}
+
diff --git a/test/Transforms/Inline/inline_cleanup.ll b/test/Transforms/Inline/inline_cleanup.ll
new file mode 100644
index 0000000..4c64721
--- /dev/null
+++ b/test/Transforms/Inline/inline_cleanup.ll
@@ -0,0 +1,63 @@
+; Test that the inliner doesn't leave around dead allocas, and that it folds
+; uncond branches away after it is done specializing.
+
+; RUN: opt < %s -inline -S | \
+; RUN: not grep {alloca.*uses=0}
+; RUN: opt < %s -inline -S | \
+; RUN: not grep {br label}
+@A = weak global i32 0 ; <i32*> [#uses=1]
+@B = weak global i32 0 ; <i32*> [#uses=1]
+@C = weak global i32 0 ; <i32*> [#uses=1]
+
+define internal fastcc void @foo(i32 %X) {
+entry:
+ %ALL = alloca i32, align 4 ; <i32*> [#uses=1]
+ %tmp1 = and i32 %X, 1 ; <i32> [#uses=1]
+ %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tmp1.upgrd.1, label %cond_next, label %cond_true
+
+cond_true: ; preds = %entry
+ store i32 1, i32* @A
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp4 = and i32 %X, 2 ; <i32> [#uses=1]
+ %tmp4.upgrd.2 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1]
+ br i1 %tmp4.upgrd.2, label %cond_next7, label %cond_true5
+
+cond_true5: ; preds = %cond_next
+ store i32 1, i32* @B
+ br label %cond_next7
+
+cond_next7: ; preds = %cond_true5, %cond_next
+ %tmp10 = and i32 %X, 4 ; <i32> [#uses=1]
+ %tmp10.upgrd.3 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1]
+ br i1 %tmp10.upgrd.3, label %cond_next13, label %cond_true11
+
+cond_true11: ; preds = %cond_next7
+ store i32 1, i32* @C
+ br label %cond_next13
+
+cond_next13: ; preds = %cond_true11, %cond_next7
+ %tmp16 = and i32 %X, 8 ; <i32> [#uses=1]
+ %tmp16.upgrd.4 = icmp eq i32 %tmp16, 0 ; <i1> [#uses=1]
+ br i1 %tmp16.upgrd.4, label %UnifiedReturnBlock, label %cond_true17
+
+cond_true17: ; preds = %cond_next13
+ call void @ext( i32* %ALL )
+ ret void
+
+UnifiedReturnBlock: ; preds = %cond_next13
+ ret void
+}
+
+declare void @ext(i32*)
+
+define void @test() {
+entry:
+ tail call fastcc void @foo( i32 1 )
+ tail call fastcc void @foo( i32 2 )
+ tail call fastcc void @foo( i32 3 )
+ tail call fastcc void @foo( i32 8 )
+ ret void
+}
diff --git a/test/Transforms/Inline/inline_constprop.ll b/test/Transforms/Inline/inline_constprop.ll
new file mode 100644
index 0000000..537c69b
--- /dev/null
+++ b/test/Transforms/Inline/inline_constprop.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -inline -S | not grep callee
+; RUN: opt < %s -inline -S | not grep div
+
+
+define internal i32 @callee(i32 %A, i32 %B) {
+ %C = sdiv i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test() {
+ %X = call i32 @callee( i32 10, i32 3 ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/Inline/inline_dce.ll b/test/Transforms/Inline/inline_dce.ll
new file mode 100644
index 0000000..5143d02
--- /dev/null
+++ b/test/Transforms/Inline/inline_dce.ll
@@ -0,0 +1,25 @@
+; This checks to ensure that the inline pass deletes functions if they get
+; inlined into all of their callers.
+
+; RUN: opt < %s -inline -S | \
+; RUN: not grep @reallysmall
+
+define internal i32 @reallysmall(i32 %A) {
+ ret i32 %A
+}
+
+define void @caller1() {
+ call i32 @reallysmall( i32 5 ) ; <i32>:1 [#uses=0]
+ ret void
+}
+
+define void @caller2(i32 %A) {
+ call i32 @reallysmall( i32 %A ) ; <i32>:1 [#uses=0]
+ ret void
+}
+
+define i32 @caller3(i32 %A) {
+ %B = call i32 @reallysmall( i32 %A ) ; <i32> [#uses=1]
+ ret i32 %B
+}
+
diff --git a/test/Transforms/Inline/inline_prune.ll b/test/Transforms/Inline/inline_prune.ll
new file mode 100644
index 0000000..658a422
--- /dev/null
+++ b/test/Transforms/Inline/inline_prune.ll
@@ -0,0 +1,45 @@
+; RUN: opt < %s -inline -S | \
+; RUN: not grep {callee\[12\](}
+; RUN: opt < %s -inline -S | not grep mul
+
+define internal i32 @callee1(i32 %A, i32 %B) {
+ %cond = icmp eq i32 %A, 123 ; <i1> [#uses=1]
+ br i1 %cond, label %T, label %F
+
+T: ; preds = %0
+ %C = mul i32 %B, %B ; <i32> [#uses=1]
+ ret i32 %C
+
+F: ; preds = %0
+ ret i32 0
+}
+
+define internal i32 @callee2(i32 %A, i32 %B) {
+ switch i32 %A, label %T [
+ i32 10, label %F
+ i32 1234, label %G
+ ]
+ ; No predecessors!
+ %cond = icmp eq i32 %A, 123 ; <i1> [#uses=1]
+ br i1 %cond, label %T, label %F
+
+T: ; preds = %1, %0
+ %C = mul i32 %B, %B ; <i32> [#uses=1]
+ ret i32 %C
+
+F: ; preds = %1, %0
+ ret i32 0
+
+G: ; preds = %0
+ %D = mul i32 %B, %B ; <i32> [#uses=1]
+ %E = mul i32 %D, %B ; <i32> [#uses=1]
+ ret i32 %E
+}
+
+define i32 @test(i32 %A) {
+ %X = call i32 @callee1( i32 10, i32 %A ) ; <i32> [#uses=1]
+ %Y = call i32 @callee2( i32 10, i32 %A ) ; <i32> [#uses=1]
+ %Z = add i32 %X, %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/Inline/invoke_test-1.ll b/test/Transforms/Inline/invoke_test-1.ll
new file mode 100644
index 0000000..0d27e2a
--- /dev/null
+++ b/test/Transforms/Inline/invoke_test-1.ll
@@ -0,0 +1,24 @@
+; Test that we can inline a simple function, turning the calls in it into invoke
+; instructions
+
+; RUN: opt < %s -inline -S | \
+; RUN: not grep {call\[^e\]}
+
+declare void @might_throw()
+
+define internal void @callee() {
+ call void @might_throw( )
+ ret void
+}
+
+; caller returns true if might_throw throws an exception...
+define i32 @caller() {
+ invoke void @callee( )
+ to label %cont unwind label %exc
+
+cont: ; preds = %0
+ ret i32 0
+
+exc: ; preds = %0
+ ret i32 1
+}
diff --git a/test/Transforms/Inline/invoke_test-2.ll b/test/Transforms/Inline/invoke_test-2.ll
new file mode 100644
index 0000000..bbb9ab0
--- /dev/null
+++ b/test/Transforms/Inline/invoke_test-2.ll
@@ -0,0 +1,30 @@
+; Test that if an invoked function is inlined, and if that function cannot
+; throw, that the dead handler is now unreachable.
+
+; RUN: opt < %s -inline -simplifycfg -S | \
+; RUN: not grep UnreachableExceptionHandler
+
+declare void @might_throw()
+
+define internal i32 @callee() {
+ invoke void @might_throw( )
+ to label %cont unwind label %exc
+
+cont: ; preds = %0
+ ret i32 0
+
+exc: ; preds = %0
+ ret i32 1
+}
+
+; caller returns true if might_throw throws an exception... callee cannot throw.
+define i32 @caller() {
+ %X = invoke i32 @callee( )
+ to label %cont unwind label %UnreachableExceptionHandler ; <i32> [#uses=1]
+
+cont: ; preds = %0
+ ret i32 %X
+
+UnreachableExceptionHandler: ; preds = %0
+ ret i32 -1
+}
diff --git a/test/Transforms/Inline/invoke_test-3.ll b/test/Transforms/Inline/invoke_test-3.ll
new file mode 100644
index 0000000..b360526
--- /dev/null
+++ b/test/Transforms/Inline/invoke_test-3.ll
@@ -0,0 +1,32 @@
+; Test that any rethrown exceptions in an inlined function are automatically
+; turned into branches to the invoke destination.
+
+; RUN: opt < %s -inline -S | not grep unwind$
+
+declare void @might_throw()
+
+define internal i32 @callee() {
+ invoke void @might_throw( )
+ to label %cont unwind label %exc
+
+cont: ; preds = %0
+ ret i32 0
+
+exc: ; preds = %0a
+ ; This just rethrows the exception!
+ unwind
+}
+
+; caller returns true if might_throw throws an exception... which gets
+; propagated by callee.
+define i32 @caller() {
+ %X = invoke i32 @callee( )
+ to label %cont unwind label %Handler ; <i32> [#uses=1]
+
+cont: ; preds = %0
+ ret i32 %X
+
+Handler: ; preds = %0
+; This consumes an exception thrown by might_throw
+ ret i32 1
+}
diff --git a/test/Transforms/Inline/nested-inline.ll b/test/Transforms/Inline/nested-inline.ll
new file mode 100644
index 0000000..1292667
--- /dev/null
+++ b/test/Transforms/Inline/nested-inline.ll
@@ -0,0 +1,111 @@
+; RUN: opt < %s -inline -S | FileCheck %s
+; Test that bar and bar2 are both inlined throughout and removed.
+@A = weak global i32 0 ; <i32*> [#uses=1]
+@B = weak global i32 0 ; <i32*> [#uses=1]
+@C = weak global i32 0 ; <i32*> [#uses=1]
+
+define fastcc void @foo(i32 %X) {
+entry:
+; CHECK: @foo
+ %ALL = alloca i32, align 4 ; <i32*> [#uses=1]
+ %tmp1 = and i32 %X, 1 ; <i32> [#uses=1]
+ %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tmp1.upgrd.1, label %cond_next, label %cond_true
+
+cond_true: ; preds = %entry
+ store i32 1, i32* @A
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp4 = and i32 %X, 2 ; <i32> [#uses=1]
+ %tmp4.upgrd.2 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1]
+ br i1 %tmp4.upgrd.2, label %cond_next7, label %cond_true5
+
+cond_true5: ; preds = %cond_next
+ store i32 1, i32* @B
+ br label %cond_next7
+
+cond_next7: ; preds = %cond_true5, %cond_next
+ %tmp10 = and i32 %X, 4 ; <i32> [#uses=1]
+ %tmp10.upgrd.3 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1]
+ br i1 %tmp10.upgrd.3, label %cond_next13, label %cond_true11
+
+cond_true11: ; preds = %cond_next7
+ store i32 1, i32* @C
+ br label %cond_next13
+
+cond_next13: ; preds = %cond_true11, %cond_next7
+ %tmp16 = and i32 %X, 8 ; <i32> [#uses=1]
+ %tmp16.upgrd.4 = icmp eq i32 %tmp16, 0 ; <i1> [#uses=1]
+ br i1 %tmp16.upgrd.4, label %UnifiedReturnBlock, label %cond_true17
+
+cond_true17: ; preds = %cond_next13
+ call void @ext( i32* %ALL )
+ ret void
+
+UnifiedReturnBlock: ; preds = %cond_next13
+ ret void
+}
+
+; CHECK-NOT: @bar
+define internal fastcc void @bar(i32 %X) {
+entry:
+ %ALL = alloca i32, align 4 ; <i32*> [#uses=1]
+ %tmp1 = and i32 %X, 1 ; <i32> [#uses=1]
+ %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tmp1.upgrd.1, label %cond_next, label %cond_true
+
+cond_true: ; preds = %entry
+ store i32 1, i32* @A
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp4 = and i32 %X, 2 ; <i32> [#uses=1]
+ %tmp4.upgrd.2 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1]
+ br i1 %tmp4.upgrd.2, label %cond_next7, label %cond_true5
+
+cond_true5: ; preds = %cond_next
+ store i32 1, i32* @B
+ br label %cond_next7
+
+cond_next7: ; preds = %cond_true5, %cond_next
+ %tmp10 = and i32 %X, 4 ; <i32> [#uses=1]
+ %tmp10.upgrd.3 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1]
+ br i1 %tmp10.upgrd.3, label %cond_next13, label %cond_true11
+
+cond_true11: ; preds = %cond_next7
+ store i32 1, i32* @C
+ br label %cond_next13
+
+cond_next13: ; preds = %cond_true11, %cond_next7
+ %tmp16 = and i32 %X, 8 ; <i32> [#uses=1]
+ %tmp16.upgrd.4 = icmp eq i32 %tmp16, 0 ; <i1> [#uses=1]
+ br i1 %tmp16.upgrd.4, label %UnifiedReturnBlock, label %cond_true17
+
+cond_true17: ; preds = %cond_next13
+ call void @foo( i32 %X )
+ ret void
+
+UnifiedReturnBlock: ; preds = %cond_next13
+ ret void
+}
+
+define internal fastcc void @bar2(i32 %X) {
+entry:
+ call void @foo( i32 %X )
+ ret void
+}
+
+declare void @ext(i32*)
+
+define void @test(i32 %X) {
+entry:
+; CHECK: test
+; CHECK-NOT: @bar
+ tail call fastcc void @bar( i32 %X )
+ tail call fastcc void @bar( i32 %X )
+ tail call fastcc void @bar2( i32 %X )
+ tail call fastcc void @bar2( i32 %X )
+ ret void
+; CHECK: ret
+}
diff --git a/test/Transforms/InstCombine/2002-03-11-InstCombineHang.ll b/test/Transforms/InstCombine/2002-03-11-InstCombineHang.ll
new file mode 100644
index 0000000..5d027a7
--- /dev/null
+++ b/test/Transforms/InstCombine/2002-03-11-InstCombineHang.ll
@@ -0,0 +1,9 @@
+; This testcase causes instcombine to hang.
+;
+; RUN: opt < %s -instcombine
+
+define void @test(i32 %X) {
+ %reg117 = add i32 %X, 0 ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/2002-05-14-SubFailure.ll b/test/Transforms/InstCombine/2002-05-14-SubFailure.ll
new file mode 100644
index 0000000..d2b2b00
--- /dev/null
+++ b/test/Transforms/InstCombine/2002-05-14-SubFailure.ll
@@ -0,0 +1,10 @@
+; Instcombine was missing a test that caused it to make illegal transformations
+; sometimes. In this case, it transforms the sub into an add:
+; RUN: opt < %s -instcombine -S | grep sub
+;
+define i32 @test(i32 %i, i32 %j) {
+ %A = mul i32 %i, %j
+ %B = sub i32 2, %A
+ ret i32 %B
+}
+
diff --git a/test/Transforms/InstCombine/2002-08-02-CastTest.ll b/test/Transforms/InstCombine/2002-08-02-CastTest.ll
new file mode 100644
index 0000000..363cb21
--- /dev/null
+++ b/test/Transforms/InstCombine/2002-08-02-CastTest.ll
@@ -0,0 +1,11 @@
+; This testcase is incorrectly getting completely eliminated. There should be
+; SOME instruction named %c here, even if it's a bitwise and.
+;
+; RUN: opt < %s -instcombine -S | grep %c
+;
+define i64 @test3(i64 %A) {
+ %c1 = trunc i64 %A to i8 ; <i8> [#uses=1]
+ %c2 = zext i8 %c1 to i64 ; <i64> [#uses=1]
+ ret i64 %c2
+}
+
diff --git a/test/Transforms/InstCombine/2002-12-05-MissedConstProp.ll b/test/Transforms/InstCombine/2002-12-05-MissedConstProp.ll
new file mode 100644
index 0000000..22574f7
--- /dev/null
+++ b/test/Transforms/InstCombine/2002-12-05-MissedConstProp.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | not grep add
+
+define i32 @test(i32 %A) {
+ %A.neg = sub i32 0, %A ; <i32> [#uses=1]
+ %.neg = sub i32 0, 1 ; <i32> [#uses=1]
+ %X = add i32 %.neg, 1 ; <i32> [#uses=1]
+ %Y.neg.ra = add i32 %A, %X ; <i32> [#uses=1]
+ %r = add i32 %A.neg, %Y.neg.ra ; <i32> [#uses=1]
+ ret i32 %r
+}
+
diff --git a/test/Transforms/InstCombine/2003-05-26-CastMiscompile.ll b/test/Transforms/InstCombine/2003-05-26-CastMiscompile.ll
new file mode 100644
index 0000000..19010d2
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-05-26-CastMiscompile.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep 4294967295
+
+define i64 @test(i64 %Val) {
+ %tmp.3 = trunc i64 %Val to i32 ; <i32> [#uses=1]
+ %tmp.8 = zext i32 %tmp.3 to i64 ; <i64> [#uses=1]
+ ret i64 %tmp.8
+}
+
diff --git a/test/Transforms/InstCombine/2003-05-27-ConstExprCrash.ll b/test/Transforms/InstCombine/2003-05-27-ConstExprCrash.ll
new file mode 100644
index 0000000..8645249
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-05-27-ConstExprCrash.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -disable-output
+
+@X = global i32 5 ; <i32*> [#uses=1]
+
+define i64 @test() {
+ %C = add i64 1, 2 ; <i64> [#uses=1]
+ %V = add i64 ptrtoint (i32* @X to i64), %C ; <i64> [#uses=1]
+ ret i64 %V
+}
+
diff --git a/test/Transforms/InstCombine/2003-06-05-BranchInvertInfLoop.ll b/test/Transforms/InstCombine/2003-06-05-BranchInvertInfLoop.ll
new file mode 100644
index 0000000..154f3ba
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-06-05-BranchInvertInfLoop.ll
@@ -0,0 +1,16 @@
+; This testcase causes an infinite loop in the instruction combiner,
+; because it things that the constant value is a not expression... and
+; constantly inverts the branch back and forth.
+;
+; RUN: opt < %s -instcombine -disable-output
+
+define i8 @test19(i1 %c) {
+ br i1 true, label %True, label %False
+
+True: ; preds = %0
+ ret i8 1
+
+False: ; preds = %0
+ ret i8 3
+}
+
diff --git a/test/Transforms/InstCombine/2003-07-21-ExternalConstant.ll b/test/Transforms/InstCombine/2003-07-21-ExternalConstant.ll
new file mode 100644
index 0000000..f550c83
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-07-21-ExternalConstant.ll
@@ -0,0 +1,44 @@
+;
+; Test: ExternalConstant
+;
+; Description:
+; This regression test helps check whether the instruction combining
+; optimization pass correctly handles global variables which are marked
+; as external and constant.
+;
+; If a problem occurs, we should die on an assert(). Otherwise, we
+; should pass through the optimizer without failure.
+;
+; Extra code:
+; RUN: opt < %s -instcombine
+; END.
+
+target datalayout = "e-p:32:32"
+@silly = external constant i32 ; <i32*> [#uses=1]
+
+declare void @bzero(i8*, i32)
+
+declare void @bcopy(i8*, i8*, i32)
+
+declare i32 @bcmp(i8*, i8*, i32)
+
+declare i32 @fputs(i8*, i8*)
+
+declare i32 @fputs_unlocked(i8*, i8*)
+
+define i32 @function(i32 %a.1) {
+entry:
+ %a.0 = alloca i32 ; <i32*> [#uses=2]
+ %result = alloca i32 ; <i32*> [#uses=2]
+ store i32 %a.1, i32* %a.0
+ %tmp.0 = load i32* %a.0 ; <i32> [#uses=1]
+ %tmp.1 = load i32* @silly ; <i32> [#uses=1]
+ %tmp.2 = add i32 %tmp.0, %tmp.1 ; <i32> [#uses=1]
+ store i32 %tmp.2, i32* %result
+ br label %return
+
+return: ; preds = %entry
+ %tmp.3 = load i32* %result ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
+
diff --git a/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll b/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll
new file mode 100644
index 0000000..6d22754
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll
@@ -0,0 +1,21 @@
+; This testcase can be simplified by "realizing" that alloca can never return
+; null.
+; RUN: opt < %s -instcombine -simplifycfg | \
+; RUN: llvm-dis | not grep br
+
+declare i32 @bitmap_clear(...)
+
+define i32 @oof() {
+entry:
+ %live_head = alloca i32 ; <i32*> [#uses=2]
+ %tmp.1 = icmp ne i32* %live_head, null ; <i1> [#uses=1]
+ br i1 %tmp.1, label %then, label %UnifiedExitNode
+
+then: ; preds = %entry
+ %tmp.4 = call i32 (...)* @bitmap_clear( i32* %live_head ) ; <i32> [#uses=0]
+ br label %UnifiedExitNode
+
+UnifiedExitNode: ; preds = %then, %entry
+ ret i32 0
+}
+
diff --git a/test/Transforms/InstCombine/2003-09-09-VolatileLoadElim.ll b/test/Transforms/InstCombine/2003-09-09-VolatileLoadElim.ll
new file mode 100644
index 0000000..3297919
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-09-09-VolatileLoadElim.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -S | grep load
+
+define void @test(i32* %P) {
+ ; Dead but not deletable!
+ %X = volatile load i32* %P ; <i32> [#uses=0]
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2003-10-29-CallSiteResolve.ll b/test/Transforms/InstCombine/2003-10-29-CallSiteResolve.ll
new file mode 100644
index 0000000..cfe5df6
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-10-29-CallSiteResolve.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -instcombine -disable-output
+
+declare i32* @bar()
+
+define float* @foo() {
+ %tmp.11 = invoke float* bitcast (i32* ()* @bar to float* ()*)( )
+ to label %invoke_cont unwind label %X ; <float*> [#uses=1]
+
+invoke_cont: ; preds = %0
+ ret float* %tmp.11
+
+X: ; preds = %0
+ ret float* null
+}
+
diff --git a/test/Transforms/InstCombine/2003-11-03-VarargsCallBug.ll b/test/Transforms/InstCombine/2003-11-03-VarargsCallBug.ll
new file mode 100644
index 0000000..c1692f7
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-11-03-VarargsCallBug.ll
@@ -0,0 +1,13 @@
+; The cast in this testcase is not eliminable on a 32-bit target!
+; RUN: opt < %s -instcombine -S | grep inttoptr
+
+target datalayout = "e-p:32:32"
+
+declare void @foo(...)
+
+define void @test(i64 %X) {
+ %Y = inttoptr i64 %X to i32* ; <i32*> [#uses=1]
+ call void (...)* @foo( i32* %Y )
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll b/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll
new file mode 100644
index 0000000..fdb8fd9
--- /dev/null
+++ b/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+declare void @free(i8*)
+
+define void @test(i32* %X) {
+ call void (...)* bitcast (void (i8*)* @free to void (...)*)( i32* %X ) ; <i32>:1 [#uses=0]
+; CHECK: %tmp = bitcast i32* %X to i8*
+; CHECK: call void @free(i8* %tmp)
+ ret void
+; CHECK: ret void
+}
diff --git a/test/Transforms/InstCombine/2004-01-13-InstCombineInvokePHI.ll b/test/Transforms/InstCombine/2004-01-13-InstCombineInvokePHI.ll
new file mode 100644
index 0000000..bec0b9e
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-01-13-InstCombineInvokePHI.ll
@@ -0,0 +1,28 @@
+; Test for a problem afflicting several C++ programs in the testsuite. The
+; instcombine pass is trying to get rid of the cast in the invoke instruction,
+; inserting a cast of the return value after the PHI instruction, but which is
+; used by the PHI instruction. This is bad: because of the semantics of the
+; invoke instruction, we really cannot perform this transformation at all at
+; least without splitting the critical edge.
+;
+; RUN: opt < %s -instcombine -disable-output
+
+declare i8* @test()
+
+define i32 @foo() {
+entry:
+ br i1 true, label %cont, label %call
+
+call: ; preds = %entry
+ %P = invoke i32* bitcast (i8* ()* @test to i32* ()*)( )
+ to label %cont unwind label %N ; <i32*> [#uses=1]
+
+cont: ; preds = %call, %entry
+ %P2 = phi i32* [ %P, %call ], [ null, %entry ] ; <i32*> [#uses=1]
+ %V = load i32* %P2 ; <i32> [#uses=1]
+ ret i32 %V
+
+N: ; preds = %call
+ ret i32 0
+}
+
diff --git a/test/Transforms/InstCombine/2004-02-23-ShiftShiftOverflow.ll b/test/Transforms/InstCombine/2004-02-23-ShiftShiftOverflow.ll
new file mode 100644
index 0000000..a08e3a8
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-02-23-ShiftShiftOverflow.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -instcombine -S | not grep 34
+
+define i32 @test(i32 %X) {
+ ; Do not fold into shr X, 34, as this uses undefined behavior!
+ %Y = ashr i32 %X, 17 ; <i32> [#uses=1]
+ %Z = ashr i32 %Y, 17 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test2(i32 %X) {
+ ; Do not fold into shl X, 34, as this uses undefined behavior!
+ %Y = shl i32 %X, 17 ; <i32> [#uses=1]
+ %Z = shl i32 %Y, 17 ; <i32> [#uses=1]
+ ret i32 %Z
+}
diff --git a/test/Transforms/InstCombine/2004-03-13-InstCombineInfLoop.ll b/test/Transforms/InstCombine/2004-03-13-InstCombineInfLoop.ll
new file mode 100644
index 0000000..ff20d7d
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-03-13-InstCombineInfLoop.ll
@@ -0,0 +1,13 @@
+; This testcase caused the combiner to go into an infinite loop, moving the
+; cast back and forth, changing the seteq to operate on int vs uint and back.
+
+; RUN: opt < %s -instcombine -disable-output
+
+define i1 @test(i32 %A, i32 %B) {
+ %C = sub i32 0, %A ; <i32> [#uses=1]
+ %Cc = bitcast i32 %C to i32 ; <i32> [#uses=1]
+ %D = sub i32 0, %B ; <i32> [#uses=1]
+ %E = icmp eq i32 %Cc, %D ; <i1> [#uses=1]
+ ret i1 %E
+}
+
diff --git a/test/Transforms/InstCombine/2004-04-04-InstCombineReplaceAllUsesWith.ll b/test/Transforms/InstCombine/2004-04-04-InstCombineReplaceAllUsesWith.ll
new file mode 100644
index 0000000..84f9bad
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-04-04-InstCombineReplaceAllUsesWith.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -disable-output
+
+define i32 @test() {
+ ret i32 0
+
+Loop: ; preds = %Loop
+ %X = add i32 %X, 1 ; <i32> [#uses=1]
+ br label %Loop
+}
+
diff --git a/test/Transforms/InstCombine/2004-05-07-UnsizedCastLoad.ll b/test/Transforms/InstCombine/2004-05-07-UnsizedCastLoad.ll
new file mode 100644
index 0000000..8b54937
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-05-07-UnsizedCastLoad.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -disable-output
+
+%Ty = type opaque
+
+define i32 @test(%Ty* %X) {
+ %Y = bitcast %Ty* %X to i32* ; <i32*> [#uses=1]
+ %Z = load i32* %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/InstCombine/2004-07-27-ConstantExprMul.ll b/test/Transforms/InstCombine/2004-07-27-ConstantExprMul.ll
new file mode 100644
index 0000000..819260b
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-07-27-ConstantExprMul.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -disable-output
+
+@p = weak global i32 0 ; <i32*> [#uses=1]
+
+define i32 @test(i32 %x) {
+ %y = mul i32 %x, ptrtoint (i32* @p to i32) ; <i32> [#uses=1]
+ ret i32 %y
+}
+
diff --git a/test/Transforms/InstCombine/2004-08-09-RemInfLoop.ll b/test/Transforms/InstCombine/2004-08-09-RemInfLoop.ll
new file mode 100644
index 0000000..f3e5d77
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-08-09-RemInfLoop.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine
+
+; This testcase should not send the instcombiner into an infinite loop!
+
+define i32 @test(i32 %X) {
+ %Y = srem i32 %X, 0 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/InstCombine/2004-08-10-BoolSetCC.ll b/test/Transforms/InstCombine/2004-08-10-BoolSetCC.ll
new file mode 100644
index 0000000..1154bb4
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-08-10-BoolSetCC.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {ret i1 false}
+
+define i1 @test(i1 %V) {
+ %Y = icmp ult i1 %V, false ; <i1> [#uses=1]
+ ret i1 %Y
+}
+
diff --git a/test/Transforms/InstCombine/2004-09-20-BadLoadCombine.ll b/test/Transforms/InstCombine/2004-09-20-BadLoadCombine.ll
new file mode 100644
index 0000000..8169d21
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-09-20-BadLoadCombine.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine -mem2reg -S | \
+; RUN: not grep {i32 1}
+
+; When propagating the load through the select, make sure that the load is
+; inserted where the original load was, not where the select is. Not doing
+; so could produce incorrect results!
+
+define i32 @test(i1 %C) {
+ %X = alloca i32 ; <i32*> [#uses=3]
+ %X2 = alloca i32 ; <i32*> [#uses=2]
+ store i32 1, i32* %X
+ store i32 2, i32* %X2
+ %Y = select i1 %C, i32* %X, i32* %X2 ; <i32*> [#uses=1]
+ store i32 3, i32* %X
+ %Z = load i32* %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/InstCombine/2004-09-20-BadLoadCombine2.ll b/test/Transforms/InstCombine/2004-09-20-BadLoadCombine2.ll
new file mode 100644
index 0000000..e646edf
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-09-20-BadLoadCombine2.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -instcombine -mem2reg -simplifycfg | \
+; RUN: llvm-dis | grep -v store | not grep {i32 1}
+
+; Test to make sure that instcombine does not accidentally propagate the load
+; into the PHI, which would break the program.
+
+define i32 @test(i1 %C) {
+entry:
+ %X = alloca i32 ; <i32*> [#uses=3]
+ %X2 = alloca i32 ; <i32*> [#uses=2]
+ store i32 1, i32* %X
+ store i32 2, i32* %X2
+ br i1 %C, label %cond_true.i, label %cond_continue.i
+
+cond_true.i: ; preds = %entry
+ br label %cond_continue.i
+
+cond_continue.i: ; preds = %cond_true.i, %entry
+ %mem_tmp.i.0 = phi i32* [ %X, %cond_true.i ], [ %X2, %entry ] ; <i32*> [#uses=1]
+ store i32 3, i32* %X
+ %tmp.3 = load i32* %mem_tmp.i.0 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
+
+
diff --git a/test/Transforms/InstCombine/2004-09-28-BadShiftAndSetCC.ll b/test/Transforms/InstCombine/2004-09-28-BadShiftAndSetCC.ll
new file mode 100644
index 0000000..27c823b
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-09-28-BadShiftAndSetCC.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | not grep -- -65536
+
+define i1 @test(i32 %tmp.124) {
+ %tmp.125 = shl i32 %tmp.124, 8 ; <i32> [#uses=1]
+ %tmp.126.mask = and i32 %tmp.125, -16777216 ; <i32> [#uses=1]
+ %tmp.128 = icmp eq i32 %tmp.126.mask, 167772160 ; <i1> [#uses=1]
+ ret i1 %tmp.128
+}
+
diff --git a/test/Transforms/InstCombine/2004-11-22-Missed-and-fold.ll b/test/Transforms/InstCombine/2004-11-22-Missed-and-fold.ll
new file mode 100644
index 0000000..730fdc2
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-11-22-Missed-and-fold.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | not grep and
+
+define i8 @test21(i8 %A) {
+ ;; sign extend
+ %C = ashr i8 %A, 7 ; <i8> [#uses=1]
+ ;; chop off sign
+ %D = and i8 %C, 1 ; <i8> [#uses=1]
+ ret i8 %D
+}
+
diff --git a/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll b/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
new file mode 100644
index 0000000..6672b6c
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
@@ -0,0 +1,192 @@
+; This test case tests the InstructionCombining optimization that
+; reduces things like:
+; %Y = sext i8 %X to i32
+; %C = icmp ult i32 %Y, 1024
+; to
+; %C = i1 true
+; It includes test cases for different constant values, signedness of the
+; cast operands, and types of setCC operators. In all cases, the cast should
+; be eliminated. In many cases the setCC is also eliminated based on the
+; constant value and the range of the casted value.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; END.
+define i1 @lt_signed_to_large_unsigned(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp ult i32 %Y, 1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C1 = icmp sgt i8 %SB, -1
+; CHECK: ret i1 %C1
+}
+
+define i1 @lt_signed_to_large_signed(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp slt i32 %Y, 1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 true
+}
+
+define i1 @lt_signed_to_large_negative(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp slt i32 %Y, -1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 false
+}
+
+define i1 @lt_signed_to_small_unsigned(i8 %SB) {
+ %Y = sext i8 %SB to i32
+ %C = icmp ult i32 %Y, 17
+ ret i1 %C
+; CHECK: %C = icmp ult i8 %SB, 17
+; CHECK: ret i1 %C
+}
+
+define i1 @lt_signed_to_small_signed(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp slt i32 %Y, 17 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C = icmp slt i8 %SB, 17
+; CHECK: ret i1 %C
+}
+define i1 @lt_signed_to_small_negative(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp slt i32 %Y, -17 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C = icmp slt i8 %SB, -17
+; CHECK: ret i1 %C
+}
+
+define i1 @lt_unsigned_to_large_unsigned(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp ult i32 %Y, 1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 true
+}
+
+define i1 @lt_unsigned_to_large_signed(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp slt i32 %Y, 1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 true
+}
+
+define i1 @lt_unsigned_to_large_negative(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp slt i32 %Y, -1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 false
+}
+
+define i1 @lt_unsigned_to_small_unsigned(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp ult i32 %Y, 17 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C = icmp ult i8 %SB, 17
+; CHECK: ret i1 %C
+}
+
+define i1 @lt_unsigned_to_small_signed(i8 %SB) {
+ %Y = zext i8 %SB to i32
+ %C = icmp slt i32 %Y, 17
+ ret i1 %C
+; CHECK: %C = icmp ult i8 %SB, 17
+; CHECK: ret i1 %C
+}
+
+define i1 @lt_unsigned_to_small_negative(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp slt i32 %Y, -17 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 false
+}
+
+define i1 @gt_signed_to_large_unsigned(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp ugt i32 %Y, 1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C = icmp slt i8 %SB, 0
+; CHECK: ret i1 %C
+}
+
+define i1 @gt_signed_to_large_signed(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp sgt i32 %Y, 1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 false
+}
+
+define i1 @gt_signed_to_large_negative(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp sgt i32 %Y, -1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 true
+}
+
+define i1 @gt_signed_to_small_unsigned(i8 %SB) {
+ %Y = sext i8 %SB to i32
+ %C = icmp ugt i32 %Y, 17
+ ret i1 %C
+; CHECK: %C = icmp ugt i8 %SB, 17
+; CHECK: ret i1 %C
+}
+
+define i1 @gt_signed_to_small_signed(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp sgt i32 %Y, 17 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C = icmp sgt i8 %SB, 17
+; CHECK: ret i1 %C
+}
+
+define i1 @gt_signed_to_small_negative(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp sgt i32 %Y, -17 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C = icmp sgt i8 %SB, -17
+; CHECK: ret i1 %C
+}
+
+define i1 @gt_unsigned_to_large_unsigned(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp ugt i32 %Y, 1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 false
+}
+
+define i1 @gt_unsigned_to_large_signed(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp sgt i32 %Y, 1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 false
+}
+
+define i1 @gt_unsigned_to_large_negative(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp sgt i32 %Y, -1024 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 true
+}
+
+define i1 @gt_unsigned_to_small_unsigned(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp ugt i32 %Y, 17 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C = icmp ugt i8 %SB, 17
+; CHECK: ret i1 %C
+}
+
+define i1 @gt_unsigned_to_small_signed(i8 %SB) {
+ %Y = zext i8 %SB to i32
+ %C = icmp sgt i32 %Y, 17
+ ret i1 %C
+; CHECK: %C = icmp ugt i8 %SB, 17
+; CHECK: ret i1 %C
+}
+
+define i1 @gt_unsigned_to_small_negative(i8 %SB) {
+ %Y = zext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp sgt i32 %Y, -17 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 true
+}
+
diff --git a/test/Transforms/InstCombine/2004-12-08-RemInfiniteLoop.ll b/test/Transforms/InstCombine/2004-12-08-RemInfiniteLoop.ll
new file mode 100644
index 0000000..008afa8
--- /dev/null
+++ b/test/Transforms/InstCombine/2004-12-08-RemInfiniteLoop.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine
+
+define i32 @test(i32 %X) {
+ %Y = srem i32 %X, undef ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/InstCombine/2005-03-04-ShiftOverflow.ll b/test/Transforms/InstCombine/2005-03-04-ShiftOverflow.ll
new file mode 100644
index 0000000..38553d7
--- /dev/null
+++ b/test/Transforms/InstCombine/2005-03-04-ShiftOverflow.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep {ret i1 false}
+
+define i1 @test(i64 %tmp.169) {
+ %tmp.1710 = lshr i64 %tmp.169, 1 ; <i64> [#uses=1]
+ %tmp.1912 = icmp ugt i64 %tmp.1710, 0 ; <i1> [#uses=1]
+ ret i1 %tmp.1912
+}
+
diff --git a/test/Transforms/InstCombine/2005-04-07-UDivSelectCrash.ll b/test/Transforms/InstCombine/2005-04-07-UDivSelectCrash.ll
new file mode 100644
index 0000000..1ec1180
--- /dev/null
+++ b/test/Transforms/InstCombine/2005-04-07-UDivSelectCrash.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -disable-output
+
+define i32 @test(i1 %C, i32 %tmp.15) {
+ %tmp.16 = select i1 %C, i32 8, i32 1 ; <i32> [#uses=1]
+ %tmp.18 = udiv i32 %tmp.15, %tmp.16 ; <i32> [#uses=1]
+ ret i32 %tmp.18
+}
+
diff --git a/test/Transforms/InstCombine/2005-06-15-DivSelectCrash.ll b/test/Transforms/InstCombine/2005-06-15-DivSelectCrash.ll
new file mode 100644
index 0000000..9846ee7
--- /dev/null
+++ b/test/Transforms/InstCombine/2005-06-15-DivSelectCrash.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -disable-output
+
+define i32 @_Z13func_31585107li(i32 %l_39521025, i32 %l_59244666) {
+ %shortcirc_val = select i1 false, i32 1, i32 0 ; <i32> [#uses=1]
+ %tmp.8 = udiv i32 0, %shortcirc_val ; <i32> [#uses=1]
+ %tmp.9 = icmp eq i32 %tmp.8, 0 ; <i1> [#uses=1]
+ %retval = select i1 %tmp.9, i32 %l_59244666, i32 -1621308501 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
diff --git a/test/Transforms/InstCombine/2005-06-15-ShiftSetCCCrash.ll b/test/Transforms/InstCombine/2005-06-15-ShiftSetCCCrash.ll
new file mode 100644
index 0000000..e2d0618
--- /dev/null
+++ b/test/Transforms/InstCombine/2005-06-15-ShiftSetCCCrash.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR577
+
+define i1 @test() {
+ %tmp.3 = shl i32 0, 41 ; <i32> [#uses=1]
+ %tmp.4 = icmp ne i32 %tmp.3, 0 ; <i1> [#uses=1]
+ ret i1 %tmp.4
+}
+
diff --git a/test/Transforms/InstCombine/2005-06-16-RangeCrash.ll b/test/Transforms/InstCombine/2005-06-16-RangeCrash.ll
new file mode 100644
index 0000000..f0e60ac
--- /dev/null
+++ b/test/Transforms/InstCombine/2005-06-16-RangeCrash.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR585
+
+define i1 @test() {
+ %tmp.26 = sdiv i32 0, -2147483648 ; <i32> [#uses=1]
+ %tmp.27 = icmp eq i32 %tmp.26, 0 ; <i1> [#uses=1]
+ ret i1 %tmp.27
+}
+
diff --git a/test/Transforms/InstCombine/2005-06-16-SetCCOrSetCCMiscompile.ll b/test/Transforms/InstCombine/2005-06-16-SetCCOrSetCCMiscompile.ll
new file mode 100644
index 0000000..3d887dd
--- /dev/null
+++ b/test/Transforms/InstCombine/2005-06-16-SetCCOrSetCCMiscompile.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {ret i1 true}
+; PR586
+
+@g_07918478 = external global i32 ; <i32*> [#uses=1]
+
+define i1 @test() {
+ %tmp.0 = load i32* @g_07918478 ; <i32> [#uses=2]
+ %tmp.1 = icmp ne i32 %tmp.0, 0 ; <i1> [#uses=1]
+ %tmp.4 = icmp ult i32 %tmp.0, 4111 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp.1, %tmp.4 ; <i1> [#uses=1]
+ ret i1 %bothcond
+}
+
diff --git a/test/Transforms/InstCombine/2005-07-07-DeadPHILoop.ll b/test/Transforms/InstCombine/2005-07-07-DeadPHILoop.ll
new file mode 100644
index 0000000..caee951
--- /dev/null
+++ b/test/Transforms/InstCombine/2005-07-07-DeadPHILoop.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -disable-output
+
+; This example caused instcombine to spin into an infinite loop.
+
+define void @test(i32* %P) {
+ ret void
+
+Dead: ; preds = %Dead
+ %X = phi i32 [ %Y, %Dead ] ; <i32> [#uses=1]
+ %Y = sdiv i32 %X, 10 ; <i32> [#uses=2]
+ store i32 %Y, i32* %P
+ br label %Dead
+}
+
diff --git a/test/Transforms/InstCombine/2006-02-13-DemandedMiscompile.ll b/test/Transforms/InstCombine/2006-02-13-DemandedMiscompile.ll
new file mode 100644
index 0000000..10541ef
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-02-13-DemandedMiscompile.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep undef
+
+define i32 @test(i8 %A) {
+ %B = sext i8 %A to i32 ; <i32> [#uses=1]
+ %C = ashr i32 %B, 8 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+
diff --git a/test/Transforms/InstCombine/2006-02-28-Crash.ll b/test/Transforms/InstCombine/2006-02-28-Crash.ll
new file mode 100644
index 0000000..9bea14c
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-02-28-Crash.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -disable-output
+
+define i32 @test() {
+ %tmp203 = icmp eq i32 1, 2 ; <i1> [#uses=1]
+ %tmp203.upgrd.1 = zext i1 %tmp203 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp203.upgrd.1
+}
+
diff --git a/test/Transforms/InstCombine/2006-03-30-ExtractElement.ll b/test/Transforms/InstCombine/2006-03-30-ExtractElement.ll
new file mode 100644
index 0000000..aa7d587
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-03-30-ExtractElement.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -disable-output
+
+define float @test(<4 x float> %V) {
+ %V2 = insertelement <4 x float> %V, float 1.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ %R = extractelement <4 x float> %V2, i32 2 ; <float> [#uses=1]
+ ret float %R
+}
+
diff --git a/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll b/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll
new file mode 100644
index 0000000..c337ea7
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; This cannot be turned into a sign extending cast!
+
+define i64 @test(i64 %X) {
+ %Y = shl i64 %X, 16 ; <i64> [#uses=1]
+; CHECK: %Y = shl i64 %X, 16
+ %Z = ashr i64 %Y, 16 ; <i64> [#uses=1]
+; CHECK: %Z = ashr i64 %Y, 16
+ ret i64 %Z
+; CHECK: ret i64 %Z
+}
+
diff --git a/test/Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll b/test/Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll
new file mode 100644
index 0000000..e22395f
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll
@@ -0,0 +1,51 @@
+; RUN: opt < %s -instcombine -disable-output
+; END.
+
+define void @test() {
+bb38.i:
+ %varspec.0.i1014 = bitcast i64 123814269237067777 to i64 ; <i64> [#uses=1]
+ %locspec.0.i1015 = bitcast i32 1 to i32 ; <i32> [#uses=2]
+ %tmp51391.i1018 = lshr i64 %varspec.0.i1014, 16 ; <i64> [#uses=1]
+ %tmp51392.i1019 = trunc i64 %tmp51391.i1018 to i32 ; <i32> [#uses=2]
+ %tmp51392.mask.i1020 = lshr i32 %tmp51392.i1019, 29 ; <i32> [#uses=1]
+ %tmp7.i1021 = and i32 %tmp51392.mask.i1020, 1 ; <i32> [#uses=2]
+ %tmp18.i1026 = lshr i32 %tmp51392.i1019, 31 ; <i32> [#uses=2]
+ %tmp18.i1027 = trunc i32 %tmp18.i1026 to i8 ; <i8> [#uses=1]
+ br i1 false, label %cond_false1148.i1653, label %bb377.i1259
+
+bb377.i1259: ; preds = %bb38.i
+ br i1 false, label %cond_true541.i1317, label %cond_false1148.i1653
+
+cond_true541.i1317: ; preds = %bb377.i1259
+ %tmp545.i1318 = lshr i32 %locspec.0.i1015, 10 ; <i32> [#uses=1]
+ %tmp550.i1319 = lshr i32 %locspec.0.i1015, 4 ; <i32> [#uses=1]
+ %tmp550551.i1320 = and i32 %tmp550.i1319, 63 ; <i32> [#uses=1]
+ %tmp553.i1321 = icmp ult i32 %tmp550551.i1320, 4 ; <i1> [#uses=1]
+ %tmp558.i1322 = icmp eq i32 %tmp7.i1021, 0 ; <i1> [#uses=1]
+ %bothcond.i1326 = or i1 %tmp553.i1321, false ; <i1> [#uses=1]
+ %bothcond1.i1327 = or i1 %bothcond.i1326, false ; <i1> [#uses=1]
+ %bothcond2.not.i1328 = or i1 %bothcond1.i1327, false ; <i1> [#uses=1]
+ %bothcond3.i1329 = or i1 %bothcond2.not.i1328, %tmp558.i1322 ; <i1> [#uses=0]
+ br i1 false, label %cond_true583.i1333, label %cond_next592.i1337
+
+cond_true583.i1333: ; preds = %cond_true541.i1317
+ br i1 false, label %cond_true586.i1335, label %cond_next592.i1337
+
+cond_true586.i1335: ; preds = %cond_true583.i1333
+ br label %cond_true.i
+
+cond_next592.i1337: ; preds = %cond_true583.i1333, %cond_true541.i1317
+ %mask_z.0.i1339 = phi i32 [ %tmp18.i1026, %cond_true541.i1317 ], [ 0, %cond_true583.i1333 ] ; <i32> [#uses=0]
+ %tmp594.i1340 = and i32 %tmp545.i1318, 15 ; <i32> [#uses=0]
+ br label %cond_true.i
+
+cond_false1148.i1653: ; preds = %bb377.i1259, %bb38.i
+ %tmp1150.i1654 = icmp eq i32 %tmp7.i1021, 0 ; <i1> [#uses=1]
+ %tmp1160.i1656 = icmp eq i8 %tmp18.i1027, 0 ; <i1> [#uses=1]
+ %bothcond8.i1658 = or i1 %tmp1150.i1654, %tmp1160.i1656 ; <i1> [#uses=1]
+ %bothcond9.i1659 = or i1 %bothcond8.i1658, false ; <i1> [#uses=0]
+ br label %cond_true.i
+
+cond_true.i: ; preds = %cond_false1148.i1653, %cond_next592.i1337, %cond_true586.i1335
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2006-09-15-CastToBool.ll b/test/Transforms/InstCombine/2006-09-15-CastToBool.ll
new file mode 100644
index 0000000..ee261ced
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-09-15-CastToBool.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep and
+; PR913
+
+define i32 @test(i32* %tmp1) {
+ %tmp.i = load i32* %tmp1 ; <i32> [#uses=1]
+ %tmp = bitcast i32 %tmp.i to i32 ; <i32> [#uses=1]
+ %tmp2.ui = lshr i32 %tmp, 5 ; <i32> [#uses=1]
+ %tmp2 = bitcast i32 %tmp2.ui to i32 ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp2, 1 ; <i32> [#uses=1]
+ %tmp3.upgrd.1 = icmp ne i32 %tmp3, 0 ; <i1> [#uses=1]
+ %tmp34 = zext i1 %tmp3.upgrd.1 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp34
+}
+
diff --git a/test/Transforms/InstCombine/2006-10-19-SignedToUnsignedCastAndConst-2.ll b/test/Transforms/InstCombine/2006-10-19-SignedToUnsignedCastAndConst-2.ll
new file mode 100644
index 0000000..889bbcf
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-10-19-SignedToUnsignedCastAndConst-2.ll
@@ -0,0 +1,10 @@
+; The optimizer should be able to remove cast operation here.
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep sext.*i32
+
+define i1 @eq_signed_to_small_unsigned(i8 %SB) {
+ %Y = sext i8 %SB to i32 ; <i32> [#uses=1]
+ %C = icmp eq i32 %Y, 17 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
diff --git a/test/Transforms/InstCombine/2006-10-20-mask.ll b/test/Transforms/InstCombine/2006-10-20-mask.ll
new file mode 100644
index 0000000..0aaa5e8
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-10-20-mask.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep and
+
+define i64 @foo(i64 %tmp, i64 %tmp2) {
+ %tmp.upgrd.1 = trunc i64 %tmp to i32 ; <i32> [#uses=1]
+ %tmp2.upgrd.2 = trunc i64 %tmp2 to i32 ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp.upgrd.1, %tmp2.upgrd.2 ; <i32> [#uses=1]
+ %tmp4 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
+ ret i64 %tmp4
+}
+
diff --git a/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll b/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll
new file mode 100644
index 0000000..d3ba1e2
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep mul | count 2
+
+define <4 x float> @test(<4 x float> %V) {
+ %Y = fmul <4 x float> %V, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 > ; <<4 x float>> [#uses=1]
+ %Z = fmul <4 x float> %Y, < float 1.000000e+00, float 2.000000e+05, float -3.000000e+00, float 4.000000e+00 > ; <<4 x float>> [#uses=1]
+ ret <4 x float> %Z
+}
+
diff --git a/test/Transforms/InstCombine/2006-11-03-Memmove64.ll b/test/Transforms/InstCombine/2006-11-03-Memmove64.ll
new file mode 100644
index 0000000..35bb45e
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-11-03-Memmove64.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep memmove.i32
+; Instcombine was trying to turn this into a memmove.i32
+
+target datalayout = "e-p:64:64"
+target triple = "alphaev67-unknown-linux-gnu"
+@str10 = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+
+define void @do_join(i8* %b) {
+entry:
+ call void @llvm.memmove.i64( i8* %b, i8* getelementptr ([1 x i8]* @str10, i32 0, i64 0), i64 1, i32 1 )
+ ret void
+}
+
+declare void @llvm.memmove.i64(i8*, i8*, i64, i32)
+
diff --git a/test/Transforms/InstCombine/2006-11-10-ashr-miscompile.ll b/test/Transforms/InstCombine/2006-11-10-ashr-miscompile.ll
new file mode 100644
index 0000000..7799423
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-11-10-ashr-miscompile.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep lshr
+; Verify this is not turned into -1.
+
+define i32 @test(i8 %amt) {
+ %shift.upgrd.1 = zext i8 %amt to i32 ; <i32> [#uses=1]
+ %B = lshr i32 -1, %shift.upgrd.1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
diff --git a/test/Transforms/InstCombine/2006-12-01-BadFPVectorXform.ll b/test/Transforms/InstCombine/2006-12-01-BadFPVectorXform.ll
new file mode 100644
index 0000000..7adeb9f
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-12-01-BadFPVectorXform.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep sub
+; RUN: opt < %s -instcombine -S | grep add
+
+define <4 x float> @test(<4 x float> %tmp26, <4 x float> %tmp53) {
+ ; (X+Y)-Y != X for fp vectors.
+ %tmp64 = fadd <4 x float> %tmp26, %tmp53 ; <<4 x float>> [#uses=1]
+ %tmp75 = fsub <4 x float> %tmp64, %tmp53 ; <<4 x float>> [#uses=1]
+ ret <4 x float> %tmp75
+}
diff --git a/test/Transforms/InstCombine/2006-12-05-fp-to-int-ext.ll b/test/Transforms/InstCombine/2006-12-05-fp-to-int-ext.ll
new file mode 100644
index 0000000..74483c1
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-12-05-fp-to-int-ext.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | grep zext
+
+; Never merge these two conversions, even though it's possible: this is
+; significantly more expensive than the two conversions on some targets
+; and it causes libgcc to be compile __fixunsdfdi into a recursive
+; function.
+define i64 @test(double %D) {
+ %A = fptoui double %D to i32 ; <i32> [#uses=1]
+ %B = zext i32 %A to i64 ; <i64> [#uses=1]
+ ret i64 %B
+}
+
diff --git a/test/Transforms/InstCombine/2006-12-08-ICmp-Combining.ll b/test/Transforms/InstCombine/2006-12-08-ICmp-Combining.ll
new file mode 100644
index 0000000..80ee3e2
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-12-08-ICmp-Combining.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {%bothcond =}
+
+define i1 @Doit_bb(i32 %i.0) {
+bb:
+ %tmp = icmp sgt i32 %i.0, 0 ; <i1> [#uses=1]
+ %tmp.not = xor i1 %tmp, true ; <i1> [#uses=1]
+ %tmp2 = icmp sgt i32 %i.0, 8 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp.not, %tmp2 ; <i1> [#uses=1]
+ br i1 %bothcond, label %exitTrue, label %exitFalse
+
+exitTrue: ; preds = %bb
+ ret i1 true
+
+exitFalse: ; preds = %bb
+ ret i1 false
+}
+
diff --git a/test/Transforms/InstCombine/2006-12-08-Phi-ICmp-Op-Fold.ll b/test/Transforms/InstCombine/2006-12-08-Phi-ICmp-Op-Fold.ll
new file mode 100644
index 0000000..5a74bd2
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-12-08-Phi-ICmp-Op-Fold.ll
@@ -0,0 +1,51 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {icmp sgt}
+; END.
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.point = type { i32, i32 }
+
+define i32 @visible(i32 %direction, i64 %p1.0, i64 %p2.0, i64 %p3.0) {
+entry:
+ %p1_addr = alloca %struct.point ; <%struct.point*> [#uses=2]
+ %p2_addr = alloca %struct.point ; <%struct.point*> [#uses=2]
+ %p3_addr = alloca %struct.point ; <%struct.point*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = bitcast %struct.point* %p1_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp.upgrd.1 = getelementptr { i64 }* %tmp, i64 0, i32 0 ; <i64*> [#uses=1]
+ store i64 %p1.0, i64* %tmp.upgrd.1
+ %tmp1 = bitcast %struct.point* %p2_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp2 = getelementptr { i64 }* %tmp1, i64 0, i32 0 ; <i64*> [#uses=1]
+ store i64 %p2.0, i64* %tmp2
+ %tmp3 = bitcast %struct.point* %p3_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp4 = getelementptr { i64 }* %tmp3, i64 0, i32 0 ; <i64*> [#uses=1]
+ store i64 %p3.0, i64* %tmp4
+ %tmp.upgrd.2 = icmp eq i32 %direction, 0 ; <i1> [#uses=1]
+ %tmp5 = bitcast %struct.point* %p1_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp6 = getelementptr { i64 }* %tmp5, i64 0, i32 0 ; <i64*> [#uses=1]
+ %tmp.upgrd.3 = load i64* %tmp6 ; <i64> [#uses=1]
+ %tmp7 = bitcast %struct.point* %p2_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp8 = getelementptr { i64 }* %tmp7, i64 0, i32 0 ; <i64*> [#uses=1]
+ %tmp9 = load i64* %tmp8 ; <i64> [#uses=1]
+ %tmp10 = bitcast %struct.point* %p3_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp11 = getelementptr { i64 }* %tmp10, i64 0, i32 0 ; <i64*> [#uses=1]
+ %tmp12 = load i64* %tmp11 ; <i64> [#uses=1]
+ %tmp13 = call i32 @determinant( i64 %tmp.upgrd.3, i64 %tmp9, i64 %tmp12 ) ; <i32> [#uses=2]
+ br i1 %tmp.upgrd.2, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ %tmp14 = icmp slt i32 %tmp13, 0 ; <i1> [#uses=1]
+ %tmp14.upgrd.4 = zext i1 %tmp14 to i32 ; <i32> [#uses=1]
+ br label %return
+
+cond_false: ; preds = %entry
+ %tmp26 = icmp sgt i32 %tmp13, 0 ; <i1> [#uses=1]
+ %tmp26.upgrd.5 = zext i1 %tmp26 to i32 ; <i32> [#uses=1]
+ br label %return
+
+return: ; preds = %cond_false, %cond_true
+ %retval.0 = phi i32 [ %tmp14.upgrd.4, %cond_true ], [ %tmp26.upgrd.5, %cond_false ] ; <i32> [#uses=1]
+ ret i32 %retval.0
+}
+
+declare i32 @determinant(i64, i64, i64)
diff --git a/test/Transforms/InstCombine/2006-12-08-Select-ICmp.ll b/test/Transforms/InstCombine/2006-12-08-Select-ICmp.ll
new file mode 100644
index 0000000..2665791
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-12-08-Select-ICmp.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -instcombine -S | grep select
+; END.
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.point = type { i32, i32 }
+
+define i32 @visible(i32 %direction, i64 %p1.0, i64 %p2.0, i64 %p3.0) {
+entry:
+ %p1_addr = alloca %struct.point ; <%struct.point*> [#uses=2]
+ %p2_addr = alloca %struct.point ; <%struct.point*> [#uses=2]
+ %p3_addr = alloca %struct.point ; <%struct.point*> [#uses=2]
+ %tmp = bitcast %struct.point* %p1_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp.upgrd.1 = getelementptr { i64 }* %tmp, i32 0, i32 0 ; <i64*> [#uses=1]
+ store i64 %p1.0, i64* %tmp.upgrd.1
+ %tmp1 = bitcast %struct.point* %p2_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp2 = getelementptr { i64 }* %tmp1, i32 0, i32 0 ; <i64*> [#uses=1]
+ store i64 %p2.0, i64* %tmp2
+ %tmp3 = bitcast %struct.point* %p3_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp4 = getelementptr { i64 }* %tmp3, i32 0, i32 0 ; <i64*> [#uses=1]
+ store i64 %p3.0, i64* %tmp4
+ %tmp.upgrd.2 = icmp eq i32 %direction, 0 ; <i1> [#uses=1]
+ %tmp5 = bitcast %struct.point* %p1_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp6 = getelementptr { i64 }* %tmp5, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp.upgrd.3 = load i64* %tmp6 ; <i64> [#uses=1]
+ %tmp7 = bitcast %struct.point* %p2_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp8 = getelementptr { i64 }* %tmp7, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp9 = load i64* %tmp8 ; <i64> [#uses=1]
+ %tmp10 = bitcast %struct.point* %p3_addr to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp11 = getelementptr { i64 }* %tmp10, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp12 = load i64* %tmp11 ; <i64> [#uses=1]
+ %tmp13 = call i32 @determinant( i64 %tmp.upgrd.3, i64 %tmp9, i64 %tmp12 ) ; <i32> [#uses=2]
+ %tmp14 = icmp slt i32 %tmp13, 0 ; <i1> [#uses=1]
+ %tmp26 = icmp sgt i32 %tmp13, 0 ; <i1> [#uses=1]
+ %retval.0.in = select i1 %tmp.upgrd.2, i1 %tmp14, i1 %tmp26 ; <i1> [#uses=1]
+ %retval.0 = zext i1 %retval.0.in to i32 ; <i32> [#uses=1]
+ ret i32 %retval.0
+}
+
+declare i32 @determinant(i64, i64, i64)
+
diff --git a/test/Transforms/InstCombine/2006-12-15-Range-Test.ll b/test/Transforms/InstCombine/2006-12-15-Range-Test.ll
new file mode 100644
index 0000000..c3700a0
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-12-15-Range-Test.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep icmp | count 1
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {icmp ugt} | count 1
+; END.
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+@r = external global [17 x i32] ; <[17 x i32]*> [#uses=1]
+
+define i1 @print_pgm_cond_true(i32 %tmp12.reload, i32* %tmp16.out) {
+newFuncRoot:
+ br label %cond_true
+
+bb27.exitStub: ; preds = %cond_true
+ store i32 %tmp16, i32* %tmp16.out
+ ret i1 true
+
+cond_next23.exitStub: ; preds = %cond_true
+ store i32 %tmp16, i32* %tmp16.out
+ ret i1 false
+
+cond_true: ; preds = %newFuncRoot
+ %tmp15 = getelementptr [17 x i32]* @r, i32 0, i32 %tmp12.reload ; <i32*> [#uses=1]
+ %tmp16 = load i32* %tmp15 ; <i32> [#uses=4]
+ %tmp18 = icmp slt i32 %tmp16, -31 ; <i1> [#uses=1]
+ %tmp21 = icmp sgt i32 %tmp16, 31 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp18, %tmp21 ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb27.exitStub, label %cond_next23.exitStub
+}
+
diff --git a/test/Transforms/InstCombine/2006-12-23-Select-Cmp-Cmp.ll b/test/Transforms/InstCombine/2006-12-23-Select-Cmp-Cmp.ll
new file mode 100644
index 0000000..eba1ac1
--- /dev/null
+++ b/test/Transforms/InstCombine/2006-12-23-Select-Cmp-Cmp.ll
@@ -0,0 +1,30 @@
+; For PR1065. This causes an assertion in instcombine if a select with two cmp
+; operands is encountered.
+; RUN: opt < %s -instcombine -disable-output
+; END.
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.internal_state = type { i32 }
+ %struct.mng_data = type { i32, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i32, i32, i32, i32, i16, i16, i16, i8, i8, double, double, double, i8, i8, i8, i8, i32, i32, i32, i32, i32, i8, i32, i32, i8*, i8* (i32)*, void (i8*, i32)*, void (i8*, i8*, i32)*, i8 (%struct.mng_data*)*, i8 (%struct.mng_data*)*, i8 (%struct.mng_data*, i8*, i32, i32*)*, i8 (%struct.mng_data*, i8*, i32, i32*)*, i8 (%struct.mng_data*, i32, i8, i32, i32, i32, i32, i8*)*, i8 (%struct.mng_data*, i32, i32, i8*)*, i8 (%struct.mng_data*, i32, i32)*, i8 (%struct.mng_data*, i8, i8*, i8*, i8*, i8*)*, i8 (%struct.mng_data*)*, i8 (%struct.mng_data*, i8*)*, i8 (%struct.mng_data*, i8*)*, i8 (%struct.mng_data*, i32, i32)*, i8 (%struct.mng_data*, i32, i32, i8*)*, i8 (%struct.mng_data*, i8, i8, i32, i32)*, i8* (%struct.mng_data*, i32)*, i8* (%struct.mng_data*, i32)*, i8* (%struct.mng_data*, i32)*, i8 (%struct.mng_data*, i32, i32, i32, i32)*, i32 (%struct.mng_data*)*, i8 (%struct.mng_data*, i32)*, i8 (%struct.mng_data*, i32)*, i8 (%struct.mng_data*, i32, i32, i32, i32, i32, i32, i32, i32)*, i8 (%struct.mng_data*, i8)*, i8 (%struct.mng_data*, i32, i8*)*, i8 (%struct.mng_data*, i32, i8, i8*)*, i8, i32, i32, i8*, i8*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i8, i8, i8, i8, i8, i32, i8, i8, i8, i32, i8*, i32, i8*, i32, i8, i8, i8, i32, i8*, i8*, i32, i32, i8*, i8*, %struct.mng_pushdata*, %struct.mng_pushdata*, %struct.mng_pushdata*, %struct.mng_pushdata*, i8, i8, i32, i32, i8*, i8, i8, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i32, i32, i8*, i32, i32, i32, i8, i8, i32, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i8*, i8*, i8*, i32, i8*, i8*, i8*, i8*, i8*, %struct.mng_savedata*, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [256 x i8], double, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, i16, i8, i8, i8, i8, i8, i32, i32, i8, i32, i32, i32, i32, i16, i16, i16, i8, i16, i8, i32, i32, i32, i32, i8, i32, i32, i8, i32, i32, i32, i32, i8, i32, i32, i8, i32, i32, i32, i32, i32, i8, i32, i8, i16, i16, i16, i16, i32, [256 x %struct.mng_palette8e], i32, [256 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i8*, i16, i16, i16, i8*, i8, i8, i32, i32, i32, i32, i8, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, i8*, i8, i8, i8, i32, i8*, i8*, i16, i16, i16, i16, i32, i32, i8*, %struct.z_stream, i32, i32, i32, i32, i32, i32, i8, i8, [256 x i32], i8 }
+ %struct.mng_palette8e = type { i8, i8, i8 }
+ %struct.mng_pushdata = type { i8*, i8*, i32, i8, i8*, i32 }
+ %struct.mng_savedata = type { i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i8, i16, i8, i8, i32, i32, i8, i32, i32, i32, i32, i32, [256 x %struct.mng_palette8e], i32, [256 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i8*, i16, i16, i16 }
+ %struct.z_stream = type { i8*, i32, i32, i8*, i32, i32, i8*, %struct.internal_state*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i8*, i32, i32, i32 }
+
+define void @mng_write_basi() {
+entry:
+ %tmp = load i8* null ; <i8> [#uses=1]
+ %tmp.upgrd.1 = icmp ugt i8 %tmp, 8 ; <i1> [#uses=1]
+ %tmp.upgrd.2 = load i16* null ; <i16> [#uses=2]
+ %tmp3 = icmp eq i16 %tmp.upgrd.2, 255 ; <i1> [#uses=1]
+ %tmp7 = icmp eq i16 %tmp.upgrd.2, -1 ; <i1> [#uses=1]
+ %bOpaque.0.in = select i1 %tmp.upgrd.1, i1 %tmp7, i1 %tmp3 ; <i1> [#uses=1]
+ br i1 %bOpaque.0.in, label %cond_next90, label %bb95
+
+cond_next90: ; preds = %entry
+ ret void
+
+bb95: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2007-01-13-ExtCompareMiscompile.ll b/test/Transforms/InstCombine/2007-01-13-ExtCompareMiscompile.ll
new file mode 100644
index 0000000..e5238a5
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-01-13-ExtCompareMiscompile.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep {icmp ugt}
+; PR1107
+; PR1940
+
+define i1 @test(i8 %A, i8 %B) {
+ %a = zext i8 %A to i32
+ %b = zext i8 %B to i32
+ %c = icmp sgt i32 %a, %b
+ ret i1 %c
+}
diff --git a/test/Transforms/InstCombine/2007-01-14-FcmpSelf.ll b/test/Transforms/InstCombine/2007-01-14-FcmpSelf.ll
new file mode 100644
index 0000000..d2d215f
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-01-14-FcmpSelf.ll
@@ -0,0 +1,6 @@
+; RUN: opt < %s -instcombine -S | grep {fcmp uno.*0.0}
+; PR1111
+define i1 @test(double %X) {
+ %tmp = fcmp une double %X, %X
+ ret i1 %tmp
+}
diff --git a/test/Transforms/InstCombine/2007-01-18-VectorInfLoop.ll b/test/Transforms/InstCombine/2007-01-18-VectorInfLoop.ll
new file mode 100644
index 0000000..fed2255
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-01-18-VectorInfLoop.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -disable-output
+
+define <4 x i32> @test(<4 x i32> %A) {
+ %B = xor <4 x i32> %A, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ %C = and <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 >
+ ret <4 x i32> %C
+}
diff --git a/test/Transforms/InstCombine/2007-01-27-AndICmp.ll b/test/Transforms/InstCombine/2007-01-27-AndICmp.ll
new file mode 100644
index 0000000..bd15dce
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-01-27-AndICmp.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep {ugt.*, 1}
+
+define i1 @test(i32 %tmp1030) {
+ %tmp1037 = icmp ne i32 %tmp1030, 40 ; <i1> [#uses=1]
+ %tmp1039 = icmp ne i32 %tmp1030, 41 ; <i1> [#uses=1]
+ %tmp1042 = and i1 %tmp1037, %tmp1039 ; <i1> [#uses=1]
+ ret i1 %tmp1042
+}
diff --git a/test/Transforms/InstCombine/2007-02-01-LoadSinkAlloca.ll b/test/Transforms/InstCombine/2007-02-01-LoadSinkAlloca.ll
new file mode 100644
index 0000000..05891a2
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-02-01-LoadSinkAlloca.ll
@@ -0,0 +1,45 @@
+; RUN: opt < %s -instcombine -mem2reg -S | grep {%A = alloca}
+; RUN: opt < %s -instcombine -mem2reg -S | \
+; RUN: not grep {%B = alloca}
+; END.
+
+; Ensure that instcombine doesn't sink the loads in entry/cond_true into
+; cond_next. Doing so prevents mem2reg from promoting the B alloca.
+
+define i32 @test2(i32 %C) {
+entry:
+ %A = alloca i32
+ %B = alloca i32
+ %tmp = call i32 (...)* @bar( i32* %A ) ; <i32> [#uses=0]
+ %T = load i32* %A ; <i32> [#uses=1]
+ %tmp2 = icmp eq i32 %C, 0 ; <i1> [#uses=1]
+ br i1 %tmp2, label %cond_next, label %cond_true
+
+cond_true: ; preds = %entry
+ store i32 123, i32* %B
+ call i32 @test2( i32 123 ) ; <i32>:0 [#uses=0]
+ %T1 = load i32* %B ; <i32> [#uses=1]
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %tmp1.0 = phi i32 [ %T1, %cond_true ], [ %T, %entry ] ; <i32> [#uses=1]
+ %tmp7 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp8 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp9 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp10 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp11 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp12 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp13 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp14 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp15 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp16 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp17 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp18 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp19 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ %tmp20 = call i32 (...)* @baq( ) ; <i32> [#uses=0]
+ ret i32 %tmp1.0
+}
+
+declare i32 @bar(...)
+
+declare i32 @baq(...)
diff --git a/test/Transforms/InstCombine/2007-02-07-PointerCast.ll b/test/Transforms/InstCombine/2007-02-07-PointerCast.ll
new file mode 100644
index 0000000..bf60991
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-02-07-PointerCast.ll
@@ -0,0 +1,22 @@
+;RUN: opt < %s -instcombine -S | grep zext
+
+; Make sure the uint isn't removed. Instcombine in llvm 1.9 was dropping the
+; uint cast which was causing a sign extend. This only affected code with
+; pointers in the high half of memory, so it wasn't noticed much
+; compile a kernel though...
+
+target datalayout = "e-p:32:32"
+@str = internal constant [6 x i8] c"%llx\0A\00" ; <[6 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main(i32 %x, i8** %a) {
+entry:
+ %tmp = getelementptr [6 x i8]* @str, i32 0, i64 0 ; <i8*> [#uses=1]
+ %tmp1 = load i8** %a ; <i8*> [#uses=1]
+ %tmp2 = ptrtoint i8* %tmp1 to i32 ; <i32> [#uses=1]
+ %tmp3 = zext i32 %tmp2 to i64 ; <i64> [#uses=1]
+ %tmp.upgrd.1 = call i32 (i8*, ...)* @printf( i8* %tmp, i64 %tmp3 ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/Transforms/InstCombine/2007-02-23-PhiFoldInfLoop.ll b/test/Transforms/InstCombine/2007-02-23-PhiFoldInfLoop.ll
new file mode 100644
index 0000000..f31c280
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-02-23-PhiFoldInfLoop.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -instcombine -S | grep ret
+; PR1217
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.termbox = type { %struct.termbox*, i32, i32, i32, i32, i32 }
+
+
+define void @ggenorien() {
+entry:
+ %tmp68 = icmp eq %struct.termbox* null, null ; <i1> [#uses=1]
+ br i1 %tmp68, label %cond_next448, label %bb80
+
+bb80: ; preds = %entry
+ ret void
+
+cond_next448: ; preds = %entry
+ br i1 false, label %bb756, label %bb595
+
+bb595: ; preds = %cond_next448
+ br label %bb609
+
+bb609: ; preds = %bb756, %bb595
+ %termnum.6240.0 = phi i32 [ 2, %bb595 ], [ %termnum.6, %bb756 ] ; <i32> [#uses=1]
+ %tmp755 = add i32 %termnum.6240.0, 1 ; <i32> [#uses=1]
+ br label %bb756
+
+bb756: ; preds = %bb609, %cond_next448
+ %termnum.6 = phi i32 [ %tmp755, %bb609 ], [ 2, %cond_next448 ] ; <i32> [#uses=1]
+ br label %bb609
+}
diff --git a/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll b/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
new file mode 100644
index 0000000..109e4a2
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep {icmp sle}
+; PR1244
+
+define i1 @test(i32 %c.3.i, i32 %d.292.2.i) {
+ %tmp266.i = icmp slt i32 %c.3.i, %d.292.2.i
+ %tmp276.i = icmp eq i32 %c.3.i, %d.292.2.i
+ %sel_tmp80 = or i1 %tmp266.i, %tmp276.i
+ ret i1 %sel_tmp80
+}
diff --git a/test/Transforms/InstCombine/2007-03-19-BadTruncChangePR1261.ll b/test/Transforms/InstCombine/2007-03-19-BadTruncChangePR1261.ll
new file mode 100644
index 0000000..589bd80
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-03-19-BadTruncChangePR1261.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep zext
+; PR1261.
+
+define i16 @test(i31 %zzz) {
+ %A = sext i31 %zzz to i32
+ %B = add i32 %A, 16384
+ %C = lshr i32 %B, 15
+ %D = trunc i32 %C to i16
+ ret i16 %D
+}
diff --git a/test/Transforms/InstCombine/2007-03-21-SignedRangeTest.ll b/test/Transforms/InstCombine/2007-03-21-SignedRangeTest.ll
new file mode 100644
index 0000000..ca93af3
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-03-21-SignedRangeTest.ll
@@ -0,0 +1,7 @@
+; For PR1248
+; RUN: opt < %s -instcombine -S | grep {ugt i32 .*, 11}
+define i1 @test(i32 %tmp6) {
+ %tmp7 = sdiv i32 %tmp6, 12 ; <i32> [#uses=1]
+ icmp ne i32 %tmp7, -6 ; <i1>:1 [#uses=1]
+ ret i1 %1
+}
diff --git a/test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll b/test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll
new file mode 100644
index 0000000..c794004
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll
@@ -0,0 +1,29 @@
+; PR1271
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {icmp eq i32 .tmp.*, 2146435072}
+%struct..0anon = type { i32, i32 }
+%struct..1anon = type { double }
+
+define i32 @main() {
+entry:
+ %u = alloca %struct..1anon, align 8 ; <%struct..1anon*> [#uses=4]
+ %tmp1 = getelementptr %struct..1anon* %u, i32 0, i32 0 ; <double*> [#uses=1]
+ store double 0x7FF0000000000000, double* %tmp1
+ %tmp3 = getelementptr %struct..1anon* %u, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp34 = bitcast double* %tmp3 to %struct..0anon* ; <%struct..0anon*> [#uses=1]
+ %tmp5 = getelementptr %struct..0anon* %tmp34, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp6 = load i32* %tmp5 ; <i32> [#uses=1]
+ %tmp7 = shl i32 %tmp6, 1 ; <i32> [#uses=1]
+ %tmp8 = lshr i32 %tmp7, 21 ; <i32> [#uses=1]
+ %tmp89 = trunc i32 %tmp8 to i16 ; <i16> [#uses=1]
+ icmp ne i16 %tmp89, 2047 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i8 ; <i8>:1 [#uses=1]
+ icmp ne i8 %1, 0 ; <i1>:2 [#uses=1]
+ br i1 %2, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ ret i32 0
+
+cond_false: ; preds = %entry
+ ret i32 1
+}
diff --git a/test/Transforms/InstCombine/2007-03-25-DoubleShift.ll b/test/Transforms/InstCombine/2007-03-25-DoubleShift.ll
new file mode 100644
index 0000000..0d4aac2
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-03-25-DoubleShift.ll
@@ -0,0 +1,9 @@
+; PR1271
+; RUN: opt < %s -instcombine -S | grep and
+define i1 @test(i32 %tmp13) {
+entry:
+ %tmp14 = shl i32 %tmp13, 12 ; <i32> [#uses=1]
+ %tmp15 = lshr i32 %tmp14, 12 ; <i32> [#uses=1]
+ %res = icmp ne i32 %tmp15, 0 ; <i1>:3 [#uses=1]
+ ret i1 %res
+}
diff --git a/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll b/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll
new file mode 100644
index 0000000..5bcb543
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll
@@ -0,0 +1,36 @@
+; PR1271
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {ashr i32 %.mp137, 2}
+; END.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+
+
+define i1 @test(i32* %tmp141, i32* %tmp145,
+ i32 %b8, i32 %iftmp.430.0, i32* %tmp134.out, i32* %tmp137.out)
+{
+newFuncRoot:
+ %tmp133 = and i32 %b8, 1 ; <i32> [#uses=1]
+ %tmp134 = shl i32 %tmp133, 3 ; <i32> [#uses=3]
+ %tmp136 = ashr i32 %b8, 1 ; <i32> [#uses=1]
+ %tmp137 = shl i32 %tmp136, 3 ; <i32> [#uses=3]
+ %tmp139 = ashr i32 %tmp134, 2 ; <i32> [#uses=1]
+ store i32 %tmp139, i32* %tmp141
+ %tmp143 = ashr i32 %tmp137, 2 ; <i32> [#uses=1]
+ store i32 %tmp143, i32* %tmp145
+ icmp eq i32 %iftmp.430.0, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i8 ; <i8>:1 [#uses=1]
+ icmp ne i8 %1, 0 ; <i1>:2 [#uses=1]
+ br i1 %2, label %cond_true147.exitStub, label %cond_false252.exitStub
+
+cond_true147.exitStub: ; preds = %newFuncRoot
+ store i32 %tmp134, i32* %tmp134.out
+ store i32 %tmp137, i32* %tmp137.out
+ ret i1 true
+
+cond_false252.exitStub: ; preds = %newFuncRoot
+ store i32 %tmp134, i32* %tmp134.out
+ store i32 %tmp137, i32* %tmp137.out
+ ret i1 false
+}
diff --git a/test/Transforms/InstCombine/2007-04-04-BadFoldBitcastIntoMalloc.ll b/test/Transforms/InstCombine/2007-04-04-BadFoldBitcastIntoMalloc.ll
new file mode 100644
index 0000000..b59d3c8
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-04-04-BadFoldBitcastIntoMalloc.ll
@@ -0,0 +1,19 @@
+; In the presence of a negative offset (the -8 below), a fold of a bitcast into
+; a malloc messes up the element count, causing an extra 4GB to be allocated on
+; 64-bit targets.
+;
+; RUN: opt < %s -instcombine -S | not grep {= add }
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "x86_64-unknown-freebsd6.2"
+
+define i1 @test(i32 %tmp141, double** %tmp145)
+{
+ %tmp133 = add i32 %tmp141, 1
+ %tmp134 = shl i32 %tmp133, 3
+ %tmp135 = add i32 %tmp134, -8
+ %tmp136 = malloc i8, i32 %tmp135
+ %tmp137 = bitcast i8* %tmp136 to double*
+ store double* %tmp137, double** %tmp145
+ ret i1 false
+}
diff --git a/test/Transforms/InstCombine/2007-04-08-SingleEltVectorCrash.ll b/test/Transforms/InstCombine/2007-04-08-SingleEltVectorCrash.ll
new file mode 100644
index 0000000..22eb2c2
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-04-08-SingleEltVectorCrash.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR1304
+
+define i64 @bork(<1 x i64> %vec) {
+ %tmp = extractelement <1 x i64> %vec, i32 0
+ ret i64 %tmp
+}
diff --git a/test/Transforms/InstCombine/2007-05-04-Crash.ll b/test/Transforms/InstCombine/2007-05-04-Crash.ll
new file mode 100644
index 0000000..9f50d8a
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-05-04-Crash.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR1384
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+ %struct.CFRuntimeBase = type { i32, [4 x i8] }
+ %struct.CGColor = type opaque
+ %struct.CGColorSpace = type { %struct.CFRuntimeBase, i8, i8, i8, i32, i32, i32, %struct.CGColor*, float*, %struct.CGMD5Signature, %struct.CGMD5Signature*, [0 x %struct.CGColorSpaceDescriptor] }
+ %struct.CGColorSpaceCalibratedRGBData = type { [3 x float], [3 x float], [3 x float], [9 x float] }
+ %struct.CGColorSpaceDescriptor = type { %struct.CGColorSpaceCalibratedRGBData }
+ %struct.CGColorSpaceLabData = type { [3 x float], [3 x float], [4 x float] }
+ %struct.CGMD5Signature = type { [16 x i8], i8 }
+
+declare fastcc %struct.CGColorSpace* @CGColorSpaceCreate(i32, i32)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+define %struct.CGColorSpace* @CGColorSpaceCreateLab(float* %whitePoint, float* %blackPoint, float* %range) {
+entry:
+ %tmp17 = call fastcc %struct.CGColorSpace* @CGColorSpaceCreate( i32 5, i32 3 ) ; <%struct.CGColorSpace*> [#uses=2]
+ %tmp28 = getelementptr %struct.CGColorSpace* %tmp17, i32 0, i32 11 ; <[0 x %struct.CGColorSpaceDescriptor]*> [#uses=1]
+ %tmp29 = getelementptr [0 x %struct.CGColorSpaceDescriptor]* %tmp28, i32 0, i32 0 ; <%struct.CGColorSpaceDescriptor*> [#uses=1]
+ %tmp30 = getelementptr %struct.CGColorSpaceDescriptor* %tmp29, i32 0, i32 0 ; <%struct.CGColorSpaceCalibratedRGBData*> [#uses=1]
+ %tmp3031 = bitcast %struct.CGColorSpaceCalibratedRGBData* %tmp30 to %struct.CGColorSpaceLabData* ; <%struct.CGColorSpaceLabData*> [#uses=1]
+ %tmp45 = getelementptr %struct.CGColorSpaceLabData* %tmp3031, i32 0, i32 2 ; <[4 x float]*> [#uses=1]
+ %tmp46 = getelementptr [4 x float]* %tmp45, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp4648 = bitcast float* %tmp46 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp4648, i8* null, i32 16, i32 4 )
+ ret %struct.CGColorSpace* %tmp17
+}
diff --git a/test/Transforms/InstCombine/2007-05-10-icmp-or.ll b/test/Transforms/InstCombine/2007-05-10-icmp-or.ll
new file mode 100644
index 0000000..4af5dfe
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-05-10-icmp-or.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -disable-output
+define i1 @test(i32 %tmp9) {
+ %tmp20 = icmp ugt i32 %tmp9, 255 ; <i1> [#uses=1]
+ %tmp11.not = icmp sgt i32 %tmp9, 255 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp20, %tmp11.not ; <i1> [#uses=1]
+ ret i1 %bothcond
+}
+
diff --git a/test/Transforms/InstCombine/2007-05-14-Crash.ll b/test/Transforms/InstCombine/2007-05-14-Crash.ll
new file mode 100644
index 0000000..a3c010d
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-05-14-Crash.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine -disable-output
+
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "powerpc-apple-darwin8.8.0"
+
+%struct.abc = type { i32, [32 x i8] }
+%struct.def = type { i8**, %struct.abc }
+ %struct.anon = type <{ }>
+
+define i8* @foo(%struct.anon* %deviceRef, %struct.abc* %pCap) {
+entry:
+ %tmp1 = bitcast %struct.anon* %deviceRef to %struct.def*
+ %tmp3 = getelementptr %struct.def* %tmp1, i32 0, i32 1
+ %tmp35 = bitcast %struct.abc* %tmp3 to i8*
+ ret i8* %tmp35
+}
+
+
diff --git a/test/Transforms/InstCombine/2007-05-18-CastFoldBug.ll b/test/Transforms/InstCombine/2007-05-18-CastFoldBug.ll
new file mode 100644
index 0000000..40818d4
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-05-18-CastFoldBug.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep {call.*sret}
+; Make sure instcombine doesn't drop the sret attribute.
+
+define void @blah(i16* %tmp10) {
+entry:
+ call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend_stret to void (i16* sret )*)( i16* %tmp10 sret )
+ ret void
+}
+
+declare i8* @objc_msgSend_stret(i8*, i8*, ...)
diff --git a/test/Transforms/InstCombine/2007-06-06-AshrSignBit.ll b/test/Transforms/InstCombine/2007-06-06-AshrSignBit.ll
new file mode 100644
index 0000000..62b9351
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-06-06-AshrSignBit.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine -S | grep {ashr}
+; PR1499
+
+define void @av_cmp_q_cond_true(i32* %retval, i32* %tmp9, i64* %tmp10) {
+newFuncRoot:
+ br label %cond_true
+
+return.exitStub: ; preds = %cond_true
+ ret void
+
+cond_true: ; preds = %newFuncRoot
+ %tmp30 = load i64* %tmp10 ; <i64> [#uses=1]
+ %.cast = zext i32 63 to i64 ; <i64> [#uses=1]
+ %tmp31 = ashr i64 %tmp30, %.cast ; <i64> [#uses=1]
+ %tmp3132 = trunc i64 %tmp31 to i32 ; <i32> [#uses=1]
+ %tmp33 = or i32 %tmp3132, 1 ; <i32> [#uses=1]
+ store i32 %tmp33, i32* %tmp9
+ %tmp34 = load i32* %tmp9 ; <i32> [#uses=1]
+ store i32 %tmp34, i32* %retval
+ br label %return.exitStub
+}
+
diff --git a/test/Transforms/InstCombine/2007-06-21-DivCompareMiscomp.ll b/test/Transforms/InstCombine/2007-06-21-DivCompareMiscomp.ll
new file mode 100644
index 0000000..af539c1
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-06-21-DivCompareMiscomp.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep {ret i1 true}
+; rdar://5278853
+
+define i1 @test(i32 %tmp468) {
+ %tmp470 = udiv i32 %tmp468, 4 ; <i32> [#uses=2]
+ %tmp475 = icmp ult i32 %tmp470, 1073741824 ; <i1> [#uses=1]
+ ret i1 %tmp475
+}
+
diff --git a/test/Transforms/InstCombine/2007-08-02-InfiniteLoop.ll b/test/Transforms/InstCombine/2007-08-02-InfiniteLoop.ll
new file mode 100644
index 0000000..3f76187
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-08-02-InfiniteLoop.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR1594
+
+define i64 @test(i16 %tmp510, i16 %tmp512) {
+ %W = sext i16 %tmp510 to i32 ; <i32> [#uses=1]
+ %X = sext i16 %tmp512 to i32 ; <i32> [#uses=1]
+ %Y = add i32 %W, %X ; <i32> [#uses=1]
+ %Z = sext i32 %Y to i64 ; <i64> [#uses=1]
+ ret i64 %Z
+}
diff --git a/test/Transforms/InstCombine/2007-09-10-AliasConstFold.ll b/test/Transforms/InstCombine/2007-09-10-AliasConstFold.ll
new file mode 100644
index 0000000..c27fe0a
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-09-10-AliasConstFold.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -instcombine -S | grep icmp
+; PR1646
+
+@__gthrw_pthread_cancel = alias weak i32 (i32)* @pthread_cancel ; <i32 (i32)*> [#uses=1]
+@__gthread_active_ptr.5335 = internal constant i8* bitcast (i32 (i32)* @__gthrw_pthread_cancel to i8*) ; <i8**> [#uses=1]
+declare extern_weak i32 @pthread_cancel(i32)
+
+define i1 @__gthread_active_p() {
+entry:
+ %tmp1 = load i8** @__gthread_active_ptr.5335, align 4 ; <i8*> [#uses=1]
+ %tmp2 = icmp ne i8* %tmp1, null ; <i1> [#uses=1]
+ ret i1 %tmp2
+}
diff --git a/test/Transforms/InstCombine/2007-09-11-Trampoline.ll b/test/Transforms/InstCombine/2007-09-11-Trampoline.ll
new file mode 100644
index 0000000..d8f3d97
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-09-11-Trampoline.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -instcombine -S | grep {call i32 @f}
+
+ %struct.FRAME.nest = type { i32, i32 (i32)* }
+ %struct.__builtin_trampoline = type { [10 x i8] }
+
+declare i8* @llvm.init.trampoline(i8*, i8*, i8*)
+
+declare i32 @f(%struct.FRAME.nest* nest , i32 )
+
+define i32 @nest(i32 %n) {
+entry:
+ %FRAME.0 = alloca %struct.FRAME.nest, align 8 ; <%struct.FRAME.nest*> [#uses=3]
+ %TRAMP.216 = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1]
+ %TRAMP.216.sub = getelementptr [10 x i8]* %TRAMP.216, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp3 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %n, i32* %tmp3, align 8
+ %FRAME.06 = bitcast %struct.FRAME.nest* %FRAME.0 to i8* ; <i8*> [#uses=1]
+ %tramp = call i8* @llvm.init.trampoline( i8* %TRAMP.216.sub, i8* bitcast (i32 (%struct.FRAME.nest* nest , i32)* @f to i8*), i8* %FRAME.06 ) ; <i8*> [#uses=1]
+ %tmp7 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 1 ; <i32 (i32)**> [#uses=1]
+ %tmp89 = bitcast i8* %tramp to i32 (i32)* ; <i32 (i32)*> [#uses=2]
+ store i32 (i32)* %tmp89, i32 (i32)** %tmp7, align 8
+ %tmp2.i = call i32 %tmp89( i32 1 ) ; <i32> [#uses=1]
+ ret i32 %tmp2.i
+}
diff --git a/test/Transforms/InstCombine/2007-09-17-AliasConstFold2.ll b/test/Transforms/InstCombine/2007-09-17-AliasConstFold2.ll
new file mode 100644
index 0000000..23ee12b
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-09-17-AliasConstFold2.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep icmp
+; PR1678
+
+@A = alias weak void ()* @B ; <void ()*> [#uses=1]
+
+declare extern_weak void @B()
+
+define i32 @active() {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp1 = icmp ne void ()* @A, null ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp12
+}
diff --git a/test/Transforms/InstCombine/2007-10-10-EliminateMemCpy.ll b/test/Transforms/InstCombine/2007-10-10-EliminateMemCpy.ll
new file mode 100644
index 0000000..710aff2
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-10-10-EliminateMemCpy.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -instcombine -S | not grep call
+; RUN: opt < %s -std-compile-opts -S | not grep xyz
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
[email protected] = internal constant [4 x i8] c"xyz\00" ; <[4 x i8]*> [#uses=1]
+
+define void @foo(i8* %P) {
+entry:
+ %P_addr = alloca i8* ; <i8**> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i8* %P, i8** %P_addr
+ %tmp = load i8** %P_addr, align 4 ; <i8*> [#uses=1]
+ %tmp1 = getelementptr [4 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp, i8* %tmp1, i32 4, i32 1 )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/Transforms/InstCombine/2007-10-12-Crash.ll b/test/Transforms/InstCombine/2007-10-12-Crash.ll
new file mode 100644
index 0000000..b3d9f02
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-10-12-Crash.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -instcombine -disable-output
+
+ %struct.Ray = type { %struct.Vec, %struct.Vec }
+ %struct.Scene = type { i32 (...)** }
+ %struct.Vec = type { double, double, double }
+
+declare double @_Z9ray_traceRK3VecRK3RayRK5Scene(%struct.Vec*, %struct.Ray*, %struct.Scene*)
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ %tmp3 = alloca %struct.Ray, align 4 ; <%struct.Ray*> [#uses=2]
+ %tmp97 = icmp slt i32 0, 512 ; <i1> [#uses=1]
+ br i1 %tmp97, label %bb71, label %bb108
+
+bb29: ; preds = %bb62
+ %tmp322 = bitcast %struct.Ray* %tmp3 to %struct.Vec* ; <%struct.Vec*> [#uses=1]
+ %tmp322.0 = getelementptr %struct.Vec* %tmp322, i32 0, i32 0 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %tmp322.0
+ %tmp57 = call double @_Z9ray_traceRK3VecRK3RayRK5Scene( %struct.Vec* null, %struct.Ray* %tmp3, %struct.Scene* null ) ; <double> [#uses=0]
+ br label %bb62
+
+bb62: ; preds = %bb71, %bb29
+ %tmp65 = icmp slt i32 0, 4 ; <i1> [#uses=1]
+ br i1 %tmp65, label %bb29, label %bb68
+
+bb68: ; preds = %bb62
+ ret i32 0
+
+bb71: ; preds = %entry
+ %tmp74 = icmp slt i32 0, 4 ; <i1> [#uses=1]
+ br i1 %tmp74, label %bb62, label %bb77
+
+bb77: ; preds = %bb71
+ ret i32 0
+
+bb108: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/Transforms/InstCombine/2007-10-28-stacksave.ll b/test/Transforms/InstCombine/2007-10-28-stacksave.ll
new file mode 100644
index 0000000..76bceb6
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-10-28-stacksave.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -instcombine -S | grep {call.*stacksave}
+; PR1745
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+@p = weak global i8* null ; <i8**> [#uses=1]
+
+define i32 @main() {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ br label %lab
+
+lab: ; preds = %cleanup31, %entry
+ %n.0 = phi i32 [ 0, %entry ], [ %tmp25, %cleanup31 ] ; <i32> [#uses=2]
+ %tmp2 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=2]
+ %tmp4 = srem i32 %n.0, 47 ; <i32> [#uses=1]
+ %tmp5 = add i32 %tmp4, 1 ; <i32> [#uses=5]
+ %tmp7 = sub i32 %tmp5, 1 ; <i32> [#uses=0]
+ %tmp89 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]
+ %tmp10 = mul i64 %tmp89, 32 ; <i64> [#uses=0]
+ %tmp12 = mul i32 %tmp5, 4 ; <i32> [#uses=0]
+ %tmp1314 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]
+ %tmp15 = mul i64 %tmp1314, 32 ; <i64> [#uses=0]
+ %tmp17 = mul i32 %tmp5, 4 ; <i32> [#uses=1]
+ %tmp18 = alloca i8, i32 %tmp17 ; <i8*> [#uses=1]
+ %tmp1819 = bitcast i8* %tmp18 to i32* ; <i32*> [#uses=2]
+ %tmp21 = getelementptr i32* %tmp1819, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp21, align 4
+ %tmp2223 = bitcast i32* %tmp1819 to i8* ; <i8*> [#uses=1]
+ volatile store i8* %tmp2223, i8** @p, align 4
+ %tmp25 = add i32 %n.0, 1 ; <i32> [#uses=2]
+ %tmp27 = icmp sle i32 %tmp25, 999999 ; <i1> [#uses=1]
+ %tmp2728 = zext i1 %tmp27 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp2728, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cleanup31, label %cond_next
+
+cond_next: ; preds = %lab
+ call void @llvm.stackrestore( i8* %tmp2 )
+ ret i32 0
+
+cleanup31: ; preds = %lab
+ call void @llvm.stackrestore( i8* %tmp2 )
+ br label %lab
+}
+
+declare i8* @llvm.stacksave()
+
+declare void @llvm.stackrestore(i8*)
diff --git a/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll b/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
new file mode 100644
index 0000000..8105b4b
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -instcombine -disable-output
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
+target triple = "powerpc-apple-darwin8"
+
+define i32 @test() {
+entry:
+ %tmp50.i17 = icmp slt i32 0, 4 ; <i1> [#uses=1]
+ br i1 %tmp50.i17, label %bb.i, label %calculateColorSpecificBlackLevel.exit
+
+bb.i: ; preds = %entry
+ br label %bb51.i.i
+
+bb27.i.i: ; preds = %bb51.i.i
+ %tmp31.i.i = load i16* null, align 2 ; <i16> [#uses=2]
+ %tmp35.i.i = icmp ult i16 %tmp31.i.i, 1 ; <i1> [#uses=1]
+ %tmp41.i.i = icmp ugt i16 %tmp31.i.i, -1 ; <i1> [#uses=1]
+ %bothcond.i.i = or i1 %tmp35.i.i, %tmp41.i.i ; <i1> [#uses=1]
+ %bothcond1.i.i = zext i1 %bothcond.i.i to i32 ; <i32> [#uses=1]
+ %tmp46.i.i = xor i32 %bothcond1.i.i, 1 ; <i32> [#uses=1]
+ %count.0.i.i = add i32 %count.1.i.i, %tmp46.i.i ; <i32> [#uses=1]
+ %tmp50.i.i = add i32 %x.0.i.i, 2 ; <i32> [#uses=1]
+ br label %bb51.i.i
+
+bb51.i.i: ; preds = %bb27.i.i, %bb.i
+ %count.1.i.i = phi i32 [ %count.0.i.i, %bb27.i.i ], [ 0, %bb.i ] ; <i32> [#uses=1]
+ %x.0.i.i = phi i32 [ %tmp50.i.i, %bb27.i.i ], [ 0, %bb.i ] ; <i32> [#uses=2]
+ %tmp54.i.i = icmp slt i32 %x.0.i.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp54.i.i, label %bb27.i.i, label %bb57.i.i
+
+bb57.i.i: ; preds = %bb51.i.i
+ ret i32 0
+
+calculateColorSpecificBlackLevel.exit: ; preds = %entry
+ ret i32 undef
+}
diff --git a/test/Transforms/InstCombine/2007-10-31-StringCrash.ll b/test/Transforms/InstCombine/2007-10-31-StringCrash.ll
new file mode 100644
index 0000000..220f3e2
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-10-31-StringCrash.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -instcombine -disable-output
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+declare void @__darwin_gcc3_preregister_frame_info()
+
+define void @_start(i32 %argc, i8** %argv, i8** %envp) {
+entry:
+ %tmp1 = bitcast void ()* @__darwin_gcc3_preregister_frame_info to i32* ; <i32*> [#uses=1]
+ %tmp2 = load i32* %tmp1, align 4 ; <i32> [#uses=1]
+ %tmp3 = icmp ne i32 %tmp2, 0 ; <i1> [#uses=1]
+ %tmp34 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %return
+
+cond_true: ; preds = %entry
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2007-11-07-OpaqueAlignCrash.ll b/test/Transforms/InstCombine/2007-11-07-OpaqueAlignCrash.ll
new file mode 100644
index 0000000..e1549a0
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-11-07-OpaqueAlignCrash.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR1780
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+%opaque_t = type opaque
+
+%op_ts = type {opaque, i32}
+
+@g = external global %opaque_t
+@h = external global %op_ts
+
+define i32 @foo() {
+entry:
+ %x = load i8* bitcast (%opaque_t* @g to i8*)
+ %y = load i32* bitcast (%op_ts* @h to i32*)
+ %z = zext i8 %x to i32
+ %r = add i32 %y, %z
+ ret i32 %r
+}
+
diff --git a/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll b/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll
new file mode 100644
index 0000000..5282739
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep {icmp eq i32 %In, 1}
+; PR1800
+
+define i1 @test(i32 %In) {
+ %c1 = icmp sgt i32 %In, -1
+ %c2 = icmp eq i32 %In, 1
+ %V = and i1 %c1, %c2
+ ret i1 %V
+}
+
diff --git a/test/Transforms/InstCombine/2007-11-22-IcmpCrash.ll b/test/Transforms/InstCombine/2007-11-22-IcmpCrash.ll
new file mode 100644
index 0000000..f71b99c
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-11-22-IcmpCrash.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR1817
+
+define i1 @test1(i32 %X) {
+ %A = icmp slt i32 %X, 10
+ %B = icmp ult i32 %X, 10
+ %C = and i1 %A, %B
+ ret i1 %C
+}
+
+define i1 @test2(i32 %X) {
+ %A = icmp slt i32 %X, 10
+ %B = icmp ult i32 %X, 10
+ %C = or i1 %A, %B
+ ret i1 %C
+}
diff --git a/test/Transforms/InstCombine/2007-11-25-CompatibleAttributes.ll b/test/Transforms/InstCombine/2007-11-25-CompatibleAttributes.ll
new file mode 100644
index 0000000..24394c6
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-11-25-CompatibleAttributes.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | not grep bitcast
+; PR1716
+
[email protected] = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ %tmp32 = tail call i32 (i8* noalias , ...) nounwind * bitcast (i32 (i8*, ...) nounwind * @printf to i32 (i8* noalias , ...) nounwind *)( i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0) noalias , i32 0 ) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/Transforms/InstCombine/2007-12-10-ConstFoldCompare.ll b/test/Transforms/InstCombine/2007-12-10-ConstFoldCompare.ll
new file mode 100644
index 0000000..6420537
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-12-10-ConstFoldCompare.ll
@@ -0,0 +1,9 @@
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+; RUN: opt < %s -instcombine -S | not grep {ret i1 0}
+; PR1850
+
+define i1 @test() {
+ %cond = icmp ule i8* inttoptr (i64 4294967297 to i8*), inttoptr (i64 5 to i8*)
+ ret i1 %cond
+}
diff --git a/test/Transforms/InstCombine/2007-12-12-GEPScale.ll b/test/Transforms/InstCombine/2007-12-12-GEPScale.ll
new file mode 100644
index 0000000..cea87f2
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-12-12-GEPScale.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | not grep 1431655764
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+
+define i8* @foo([100 x {i8,i8,i8}]* %x) {
+entry:
+ %p = bitcast [100 x {i8,i8,i8}]* %x to i8*
+ %q = getelementptr i8* %p, i32 -4
+ ret i8* %q
+}
diff --git a/test/Transforms/InstCombine/2007-12-16-AsmNoUnwind.ll b/test/Transforms/InstCombine/2007-12-16-AsmNoUnwind.ll
new file mode 100644
index 0000000..85cf9b6
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-12-16-AsmNoUnwind.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -S | grep nounwind
+
+define void @bar() {
+entry:
+ call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"( )
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll b/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll
new file mode 100644
index 0000000..cc89f6d
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -instcombine -S | grep {add} | count 1
+
+define i32 @foo(i32 %a) {
+entry:
+ %tmp15 = sub i32 99, %a ; <i32> [#uses=2]
+ %tmp16 = icmp slt i32 %tmp15, 0 ; <i1> [#uses=1]
+ %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; <i32> [#uses=1]
+ %tmp12 = add i32 %smax, %a ; <i32> [#uses=1]
+ %tmp13 = add i32 %tmp12, 1 ; <i32> [#uses=1]
+ ret i32 %tmp13
+}
+
+define i32 @bar(i32 %a) {
+entry:
+ %tmp15 = sub i32 99, %a ; <i32> [#uses=2]
+ %tmp16 = icmp slt i32 %tmp15, 0 ; <i1> [#uses=1]
+ %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; <i32> [#uses=1]
+ %tmp12 = add i32 %smax, %a ; <i32> [#uses=1]
+ ret i32 %tmp12
+}
+
+define i32 @fun(i32 %a) {
+entry:
+ %tmp15 = sub i32 99, %a ; <i32> [#uses=1]
+ %tmp16 = icmp slt i32 %a, 0 ; <i1> [#uses=1]
+ %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; <i32> [#uses=1]
+ %tmp12 = add i32 %smax, %a ; <i32> [#uses=1]
+ ret i32 %tmp12
+}
diff --git a/test/Transforms/InstCombine/2007-12-28-IcmpSub2.ll b/test/Transforms/InstCombine/2007-12-28-IcmpSub2.ll
new file mode 100644
index 0000000..b59548f
--- /dev/null
+++ b/test/Transforms/InstCombine/2007-12-28-IcmpSub2.ll
@@ -0,0 +1,89 @@
+; RUN: opt < %s -mem2reg -instcombine -S | grep "ret i32 1" | count 8
+
+define i32 @test1() {
+entry:
+ %z = alloca i32
+ store i32 0, i32* %z
+ %tmp = load i32* %z
+ %sub = sub i32 %tmp, 1
+ %cmp = icmp ule i32 %sub, 0
+ %retval = select i1 %cmp, i32 0, i32 1
+ ret i32 %retval
+}
+
+define i32 @test2() {
+entry:
+ %z = alloca i32
+ store i32 0, i32* %z
+ %tmp = load i32* %z
+ %sub = sub i32 %tmp, 1
+ %cmp = icmp ugt i32 %sub, 0
+ %retval = select i1 %cmp, i32 1, i32 0
+ ret i32 %retval
+}
+
+define i32 @test3() {
+entry:
+ %z = alloca i32
+ store i32 0, i32* %z
+ %tmp = load i32* %z
+ %sub = sub i32 %tmp, 1
+ %cmp = icmp slt i32 %sub, 0
+ %retval = select i1 %cmp, i32 1, i32 0
+ ret i32 %retval
+}
+
+define i32 @test4() {
+entry:
+ %z = alloca i32
+ store i32 0, i32* %z
+ %tmp = load i32* %z
+ %sub = sub i32 %tmp, 1
+ %cmp = icmp sle i32 %sub, 0
+ %retval = select i1 %cmp, i32 1, i32 0
+ ret i32 %retval
+}
+
+define i32 @test5() {
+entry:
+ %z = alloca i32
+ store i32 0, i32* %z
+ %tmp = load i32* %z
+ %sub = sub i32 %tmp, 1
+ %cmp = icmp sge i32 %sub, 0
+ %retval = select i1 %cmp, i32 0, i32 1
+ ret i32 %retval
+}
+
+define i32 @test6() {
+entry:
+ %z = alloca i32
+ store i32 0, i32* %z
+ %tmp = load i32* %z
+ %sub = sub i32 %tmp, 1
+ %cmp = icmp sgt i32 %sub, 0
+ %retval = select i1 %cmp, i32 0, i32 1
+ ret i32 %retval
+}
+
+define i32 @test7() {
+entry:
+ %z = alloca i32
+ store i32 0, i32* %z
+ %tmp = load i32* %z
+ %sub = sub i32 %tmp, 1
+ %cmp = icmp eq i32 %sub, 0
+ %retval = select i1 %cmp, i32 0, i32 1
+ ret i32 %retval
+}
+
+define i32 @test8() {
+entry:
+ %z = alloca i32
+ store i32 0, i32* %z
+ %tmp = load i32* %z
+ %sub = sub i32 %tmp, 1
+ %cmp = icmp ne i32 %sub, 0
+ %retval = select i1 %cmp, i32 1, i32 0
+ ret i32 %retval
+}
\ No newline at end of file
diff --git a/test/Transforms/InstCombine/2008-01-06-BitCastAttributes.ll b/test/Transforms/InstCombine/2008-01-06-BitCastAttributes.ll
new file mode 100644
index 0000000..5f4fa47
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-06-BitCastAttributes.ll
@@ -0,0 +1,23 @@
+; Ignore stderr, we expect warnings there
+; RUN: opt < %s -instcombine 2> /dev/null -S | not grep bitcast
+
+define void @a() {
+ ret void
+}
+
+define i32 @b(i32* inreg %x) signext {
+ ret i32 0
+}
+
+define void @c(...) {
+ ret void
+}
+
+define void @g(i32* %y) {
+ call void bitcast (void ()* @a to void (i32*)*)( i32* noalias %y )
+ call <2 x i32> bitcast (i32 (i32*)* @b to <2 x i32> (i32*)*)( i32* inreg null ) ; <<2 x i32>>:1 [#uses=0]
+ %x = call i64 bitcast (i32 (i32*)* @b to i64 (i32)*)( i32 0 ) ; <i64> [#uses=0]
+ call void bitcast (void (...)* @c to void (i32)*)( i32 0 )
+ call void bitcast (void (...)* @c to void (i32)*)( i32 zeroext 0 )
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2008-01-06-CastCrash.ll b/test/Transforms/InstCombine/2008-01-06-CastCrash.ll
new file mode 100644
index 0000000..097a0ce
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-06-CastCrash.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -disable-output
+
+define <2 x i32> @f() {
+ ret <2 x i32> undef
+}
+
+define i32 @g() {
+ %x = call i32 bitcast (<2 x i32> ()* @f to i32 ()*)( ) ; <i32> [#uses=1]
+ ret i32 %x
+}
diff --git a/test/Transforms/InstCombine/2008-01-06-VoidCast.ll b/test/Transforms/InstCombine/2008-01-06-VoidCast.ll
new file mode 100644
index 0000000..407ff4d
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-06-VoidCast.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | not grep bitcast
+
+define void @f(i16 %y) {
+ ret void
+}
+
+define i32 @g(i32 %y) {
+ %x = call i32 bitcast (void (i16)* @f to i32 (i32)*)( i32 %y ) ; <i32> [#uses=1]
+ ret i32 %x
+}
diff --git a/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll b/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll
new file mode 100644
index 0000000..fbc8ba9
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep and
+; PR1907
+
+define i1 @test(i32 %c84.17) {
+ %tmp2696 = icmp ne i32 %c84.17, 34 ; <i1> [#uses=2]
+ %tmp2699 = icmp sgt i32 %c84.17, -1 ; <i1> [#uses=1]
+ %tmp2703 = and i1 %tmp2696, %tmp2699 ; <i1> [#uses=1]
+ ret i1 %tmp2703
+}
diff --git a/test/Transforms/InstCombine/2008-01-13-NoBitCastAttributes.ll b/test/Transforms/InstCombine/2008-01-13-NoBitCastAttributes.ll
new file mode 100644
index 0000000..7b3281f
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-13-NoBitCastAttributes.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -instcombine -S | grep bitcast | count 2
+
+define i32 @b(i32* inreg %x) signext {
+ ret i32 0
+}
+
+define void @c(...) {
+ ret void
+}
+
+define void @g(i32* %y) {
+ call i32 bitcast (i32 (i32*)* @b to i32 (i32)*)( i32 zeroext 0 ) ; <i32>:2 [#uses=0]
+ call void bitcast (void (...)* @c to void (i32*)*)( i32* sret null )
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2008-01-14-DoubleNest.ll b/test/Transforms/InstCombine/2008-01-14-DoubleNest.ll
new file mode 100644
index 0000000..6401dfd
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-14-DoubleNest.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -instcombine -disable-output
+
+ %struct.FRAME.nest = type { i32, i32 (i32*)* }
+ %struct.__builtin_trampoline = type { [10 x i8] }
+
+declare i8* @llvm.init.trampoline(i8*, i8*, i8*) nounwind
+
+declare i32 @f(%struct.FRAME.nest* nest , i32*)
+
+define i32 @nest(i32 %n) {
+entry:
+ %FRAME.0 = alloca %struct.FRAME.nest, align 8 ; <%struct.FRAME.nest*> [#uses=3]
+ %TRAMP.216 = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1]
+ %TRAMP.216.sub = getelementptr [10 x i8]* %TRAMP.216, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp3 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %n, i32* %tmp3, align 8
+ %FRAME.06 = bitcast %struct.FRAME.nest* %FRAME.0 to i8* ; <i8*> [#uses=1]
+ %tramp = call i8* @llvm.init.trampoline( i8* %TRAMP.216.sub, i8* bitcast (i32 (%struct.FRAME.nest*, i32*)* @f to i8*), i8* %FRAME.06 ) ; <i8*> [#uses=1]
+ %tmp7 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 1 ; <i32 (i32*)**> [#uses=1]
+ %tmp89 = bitcast i8* %tramp to i32 (i32*)* ; <i32 (i32*)*> [#uses=2]
+ store i32 (i32*)* %tmp89, i32 (i32*)** %tmp7, align 8
+ %tmp2.i = call i32 %tmp89( i32* nest null ) ; <i32> [#uses=1]
+ ret i32 %tmp2.i
+}
diff --git a/test/Transforms/InstCombine/2008-01-14-VarArgTrampoline.ll b/test/Transforms/InstCombine/2008-01-14-VarArgTrampoline.ll
new file mode 100644
index 0000000..9bb9408
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-14-VarArgTrampoline.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -instcombine -S | grep zeroext
+
+ %struct.FRAME.nest = type { i32, i32 (...)* }
+ %struct.__builtin_trampoline = type { [10 x i8] }
+
+declare i8* @llvm.init.trampoline(i8*, i8*, i8*) nounwind
+
+declare i32 @f(%struct.FRAME.nest* nest , ...)
+
+define i32 @nest(i32 %n) {
+entry:
+ %FRAME.0 = alloca %struct.FRAME.nest, align 8 ; <%struct.FRAME.nest*> [#uses=3]
+ %TRAMP.216 = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1]
+ %TRAMP.216.sub = getelementptr [10 x i8]* %TRAMP.216, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp3 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %n, i32* %tmp3, align 8
+ %FRAME.06 = bitcast %struct.FRAME.nest* %FRAME.0 to i8* ; <i8*> [#uses=1]
+ %tramp = call i8* @llvm.init.trampoline( i8* %TRAMP.216.sub, i8* bitcast (i32 (%struct.FRAME.nest*, ...)* @f to i8*), i8* %FRAME.06 ) ; <i8*> [#uses=1]
+ %tmp7 = getelementptr %struct.FRAME.nest* %FRAME.0, i32 0, i32 1 ; <i32 (...)**> [#uses=1]
+ %tmp89 = bitcast i8* %tramp to i32 (...)* ; <i32 (...)*> [#uses=2]
+ store i32 (...)* %tmp89, i32 (...)** %tmp7, align 8
+ %tmp2.i = call i32 (...)* %tmp89( i32 zeroext 0 ) ; <i32> [#uses=1]
+ ret i32 %tmp2.i
+}
diff --git a/test/Transforms/InstCombine/2008-01-21-MismatchedCastAndCompare.ll b/test/Transforms/InstCombine/2008-01-21-MismatchedCastAndCompare.ll
new file mode 100644
index 0000000..5ff23a3
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-21-MismatchedCastAndCompare.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; PR1940
+
+define i1 @test1(i8 %A, i8 %B) {
+ %a = zext i8 %A to i32
+ %b = zext i8 %B to i32
+ %c = icmp sgt i32 %a, %b
+ ret i1 %c
+; CHECK: %c = icmp ugt i8 %A, %B
+; CHECK: ret i1 %c
+}
+
+define i1 @test2(i8 %A, i8 %B) {
+ %a = sext i8 %A to i32
+ %b = sext i8 %B to i32
+ %c = icmp ugt i32 %a, %b
+ ret i1 %c
+; CHECK: %c = icmp ugt i8 %A, %B
+; CHECK: ret i1 %c
+}
diff --git a/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll b/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll
new file mode 100644
index 0000000..87c2b75
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define i16 @test1(i16 %a) {
+ %tmp = zext i16 %a to i32 ; <i32> [#uses=2]
+ %tmp21 = lshr i32 %tmp, 8 ; <i32> [#uses=1]
+; CHECK: %tmp21 = lshr i16 %a, 8
+ %tmp5 = mul i32 %tmp, 5 ; <i32> [#uses=1]
+; CHECK: %tmp5 = mul i16 %a, 5
+ %tmp.upgrd.32 = or i32 %tmp21, %tmp5 ; <i32> [#uses=1]
+; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
+ %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16 ; <i16> [#uses=1]
+ ret i16 %tmp.upgrd.3
+; CHECK: ret i16 %tmp.upgrd.32
+}
+
diff --git a/test/Transforms/InstCombine/2008-01-27-FloatSelect.ll b/test/Transforms/InstCombine/2008-01-27-FloatSelect.ll
new file mode 100644
index 0000000..c161bcc
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-27-FloatSelect.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -S | grep select
+
+define double @fold(i1 %a, double %b) {
+%s = select i1 %a, double 0., double 1.
+%c = fdiv double %b, %s
+ret double %c
+}
diff --git a/test/Transforms/InstCombine/2008-01-29-AddICmp.ll b/test/Transforms/InstCombine/2008-01-29-AddICmp.ll
new file mode 100644
index 0000000..28a94ce
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-01-29-AddICmp.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -instcombine -S | not grep {a.off}
+; PR1949
+
+define i1 @test1(i32 %a) {
+ %a.off = add i32 %a, 4 ; <i32> [#uses=1]
+ %C = icmp ult i32 %a.off, 4 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test2(i32 %a) {
+ %a.off = sub i32 %a, 4 ; <i32> [#uses=1]
+ %C = icmp ugt i32 %a.off, -5 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test3(i32 %a) {
+ %a.off = add i32 %a, 4 ; <i32> [#uses=1]
+ %C = icmp slt i32 %a.off, 2147483652 ; <i1> [#uses=1]
+ ret i1 %C
+}
diff --git a/test/Transforms/InstCombine/2008-02-13-MulURem.ll b/test/Transforms/InstCombine/2008-02-13-MulURem.ll
new file mode 100644
index 0000000..a88c510
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-02-13-MulURem.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep rem
+; PR1933
+
+define i32 @fold(i32 %a) {
+ %s = mul i32 %a, 3
+ %c = urem i32 %s, 3
+ ret i32 %c
+}
diff --git a/test/Transforms/InstCombine/2008-02-16-SDivOverflow.ll b/test/Transforms/InstCombine/2008-02-16-SDivOverflow.ll
new file mode 100644
index 0000000..af61c15
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-02-16-SDivOverflow.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep {ret i.* 0} | count 2
+; PR2048
+
+define i32 @i(i32 %a) {
+ %tmp1 = sdiv i32 %a, -1431655765
+ %tmp2 = sdiv i32 %tmp1, 3
+ ret i32 %tmp2
+}
+
+define i8 @j(i8 %a) {
+ %tmp1 = sdiv i8 %a, 64
+ %tmp2 = sdiv i8 %tmp1, 3
+ ret i8 %tmp2
+}
diff --git a/test/Transforms/InstCombine/2008-02-16-SDivOverflow2.ll b/test/Transforms/InstCombine/2008-02-16-SDivOverflow2.ll
new file mode 100644
index 0000000..d26dec1
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-02-16-SDivOverflow2.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep {sdiv i8 \%a, 9}
+; PR2048
+
+define i8 @i(i8 %a) {
+ %tmp1 = sdiv i8 %a, -3
+ %tmp2 = sdiv i8 %tmp1, -3
+ ret i8 %tmp2
+}
+
diff --git a/test/Transforms/InstCombine/2008-02-23-MulSub.ll b/test/Transforms/InstCombine/2008-02-23-MulSub.ll
new file mode 100644
index 0000000..bb21c4b0
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-02-23-MulSub.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | not grep mul
+
+define i26 @test(i26 %a) nounwind {
+entry:
+ %_add = mul i26 %a, 2885 ; <i26> [#uses=1]
+ %_shl2 = mul i26 %a, 2884 ; <i26> [#uses=1]
+ %_sub = sub i26 %_add, %_shl2 ; <i26> [#uses=1]
+ ret i26 %_sub
+}
diff --git a/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll b/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
new file mode 100644
index 0000000..7f8bd4fb
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine | llvm-dis
+; rdar://5771353
+
+define float @test(float %x, x86_fp80 %y) nounwind readonly {
+entry:
+ %tmp67 = fcmp uno x86_fp80 %y, 0xK00000000000000000000 ; <i1> [#uses=1]
+ %tmp71 = fcmp uno float %x, 0.000000e+00 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp67, %tmp71 ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb74, label %bb80
+
+bb74: ; preds = %entry
+ ret float 0.000000e+00
+
+bb80: ; preds = %entry
+ ret float 0.000000e+00
+}
diff --git a/test/Transforms/InstCombine/2008-03-13-IntToPtr.ll b/test/Transforms/InstCombine/2008-03-13-IntToPtr.ll
new file mode 100644
index 0000000..da7e49e
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-03-13-IntToPtr.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep {16} | count 1
+
+define i8* @bork(i8** %qux) {
+ %tmp275 = load i8** %qux, align 1
+ %tmp275276 = ptrtoint i8* %tmp275 to i32
+ %tmp277 = add i32 %tmp275276, 16
+ %tmp277278 = inttoptr i32 %tmp277 to i8*
+ ret i8* %tmp277278
+}
diff --git a/test/Transforms/InstCombine/2008-04-22-ByValBitcast.ll b/test/Transforms/InstCombine/2008-04-22-ByValBitcast.ll
new file mode 100644
index 0000000..aa38065
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-04-22-ByValBitcast.ll
@@ -0,0 +1,15 @@
+;; The bitcast cannot be eliminated because byval arguments need
+;; the correct type, or at least a type of the correct size.
+; RUN: opt < %s -instcombine -S | grep bitcast
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+ %struct.NSRect = type { [4 x float] }
+
+define void @foo(i8* %context) nounwind {
+entry:
+ %tmp1 = bitcast i8* %context to %struct.NSRect* ; <%struct.NSRect*> [#uses=1]
+ call void (i32, ...)* @bar( i32 3, %struct.NSRect* byval align 4 %tmp1 ) nounwind
+ ret void
+}
+
+declare void @bar(i32, ...)
diff --git a/test/Transforms/InstCombine/2008-04-28-VolatileStore.ll b/test/Transforms/InstCombine/2008-04-28-VolatileStore.ll
new file mode 100644
index 0000000..626564d
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-04-28-VolatileStore.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep {volatile store}
+
+define void @test() {
+ %votf = alloca <4 x float> ; <<4 x float>*> [#uses=1]
+ volatile store <4 x float> zeroinitializer, <4 x float>* %votf, align 16
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/2008-04-29-VolatileLoadDontMerge.ll b/test/Transforms/InstCombine/2008-04-29-VolatileLoadDontMerge.ll
new file mode 100644
index 0000000..f2cc725
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-04-29-VolatileLoadDontMerge.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -instcombine -S | grep {volatile load} | count 2
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@g_1 = internal global i32 0 ; <i32*> [#uses=3]
+
+define i32 @main() nounwind {
+entry:
+ %tmp93 = icmp slt i32 0, 10 ; <i1> [#uses=0]
+ %tmp34 = volatile load i32* @g_1, align 4 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %b.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp6, %bb ] ; <i32> [#uses=1]
+ %tmp3.reg2mem.0 = phi i32 [ %tmp34, %entry ], [ %tmp3, %bb ] ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp3.reg2mem.0, 5 ; <i32> [#uses=1]
+ volatile store i32 %tmp4, i32* @g_1, align 4
+ %tmp6 = add i32 %b.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp9 = icmp slt i32 %tmp6, 10 ; <i1> [#uses=1]
+ %tmp3 = volatile load i32* @g_1, align 4 ; <i32> [#uses=1]
+ br i1 %tmp9, label %bb, label %bb11
+
+bb11: ; preds = %bb
+ ret i32 0
+}
+
diff --git a/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll b/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll
new file mode 100644
index 0000000..176162d
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -instcombine -S | grep {volatile load} | count 2
+; PR2262
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@g_1 = internal global i32 0 ; <i32*> [#uses=3]
+
+define i32 @main(i32 %i) nounwind {
+entry:
+ %tmp93 = icmp slt i32 %i, 10 ; <i1> [#uses=0]
+ %tmp34 = volatile load i32* @g_1, align 4 ; <i32> [#uses=1]
+ br i1 %tmp93, label %bb11, label %bb
+
+bb: ; preds = %bb, %entry
+ %tmp3 = volatile load i32* @g_1, align 4 ; <i32> [#uses=1]
+ br label %bb11
+
+bb11: ; preds = %bb
+ %tmp4 = phi i32 [ %tmp34, %entry ], [ %tmp3, %bb ] ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
diff --git a/test/Transforms/InstCombine/2008-05-08-LiveStoreDelete.ll b/test/Transforms/InstCombine/2008-05-08-LiveStoreDelete.ll
new file mode 100644
index 0000000..bbd0042
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-08-LiveStoreDelete.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -instcombine -S | grep {store i8} | count 3
+; PR2297
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define i32 @a() nounwind {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp1 = call i8* @malloc( i32 10 ) nounwind ; <i8*> [#uses=5]
+ %tmp3 = getelementptr i8* %tmp1, i32 1 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp3, align 1
+ %tmp5 = getelementptr i8* %tmp1, i32 0 ; <i8*> [#uses=1]
+ store i8 1, i8* %tmp5, align 1
+ %tmp7 = call i32 @strlen( i8* %tmp1 ) nounwind readonly ; <i32> [#uses=1]
+ %tmp9 = getelementptr i8* %tmp1, i32 0 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp9, align 1
+ %tmp11 = call i32 (...)* @b( i8* %tmp1 ) nounwind ; <i32> [#uses=0]
+ ret i32 %tmp7
+}
+
+declare i8* @malloc(i32) nounwind
+
+declare i32 @strlen(i8*) nounwind readonly
+
+declare i32 @b(...)
diff --git a/test/Transforms/InstCombine/2008-05-08-StrLenSink.ll b/test/Transforms/InstCombine/2008-05-08-StrLenSink.ll
new file mode 100644
index 0000000..1da2856
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-08-StrLenSink.ll
@@ -0,0 +1,32 @@
+; RUN: opt -S -instcombine %s | FileCheck %s
+; PR2297
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define i32 @a() nounwind {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp1 = call i8* @malloc( i32 10 ) nounwind ; <i8*> [#uses=5]
+ %tmp3 = getelementptr i8* %tmp1, i32 1 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp3, align 1
+ %tmp5 = getelementptr i8* %tmp1, i32 0 ; <i8*> [#uses=1]
+ store i8 1, i8* %tmp5, align 1
+; CHECK: store
+; CHECK: store
+; CHECK-NEXT: strlen
+; CHECK-NEXT: store
+ %tmp7 = call i32 @strlen( i8* %tmp1 ) nounwind readonly ; <i32> [#uses=1]
+ %tmp9 = getelementptr i8* %tmp1, i32 0 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp9, align 1
+ %tmp11 = call i32 (...)* @b( i8* %tmp1 ) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret i32 %tmp7
+}
+
+declare i8* @malloc(i32) nounwind
+
+declare i32 @strlen(i8*) nounwind readonly
+
+declare i32 @b(...)
diff --git a/test/Transforms/InstCombine/2008-05-09-SinkOfInvoke.ll b/test/Transforms/InstCombine/2008-05-09-SinkOfInvoke.ll
new file mode 100644
index 0000000..d56a1a0
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-09-SinkOfInvoke.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR2303
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+
+declare i32* @_ZNSt6locale5facet15_S_get_c_localeEv()
+
+declare i32** @__ctype_toupper_loc() readnone
+
+declare i32** @__ctype_tolower_loc() readnone
+
+define void @_ZNSt5ctypeIcEC2EPiPKtbm(%"struct.std::ctype<char>"* %this, i32* %unnamed_arg, i16* %__table, i8 zeroext %__del, i64 %__refs) {
+entry:
+ %tmp8 = invoke i32* @_ZNSt6locale5facet15_S_get_c_localeEv( )
+ to label %invcont unwind label %lpad ; <i32*> [#uses=0]
+
+invcont: ; preds = %entry
+ %tmp32 = invoke i32** @__ctype_toupper_loc( ) readnone
+ to label %invcont31 unwind label %lpad ; <i32**> [#uses=0]
+
+invcont31: ; preds = %invcont
+ %tmp38 = invoke i32** @__ctype_tolower_loc( ) readnone
+ to label %invcont37 unwind label %lpad ; <i32**> [#uses=1]
+
+invcont37: ; preds = %invcont31
+ %tmp39 = load i32** %tmp38, align 8 ; <i32*> [#uses=1]
+ %tmp41 = getelementptr %"struct.std::ctype<char>"* %this, i32 0, i32 4 ; <i32**> [#uses=1]
+ store i32* %tmp39, i32** %tmp41, align 8
+ ret void
+
+lpad: ; preds = %invcont31, %invcont, %entry
+ unreachable
+}
diff --git a/test/Transforms/InstCombine/2008-05-17-InfLoop.ll b/test/Transforms/InstCombine/2008-05-17-InfLoop.ll
new file mode 100644
index 0000000..2939a48
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-17-InfLoop.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR2339
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+declare void @BZALLOC(i32)
+
+define void @f(i32) {
+entry:
+ %blockSize100k = alloca i32 ; <i32*> [#uses=2]
+ store i32 %0, i32* %blockSize100k
+ %n = alloca i32 ; <i32*> [#uses=2]
+ load i32* %blockSize100k ; <i32>:1 [#uses=1]
+ store i32 %1, i32* %n
+ load i32* %n ; <i32>:2 [#uses=1]
+ add i32 %2, 2 ; <i32>:3 [#uses=1]
+ mul i32 %3, ptrtoint (i32* getelementptr (i32* null, i32 1) to i32) ; <i32>:4 [#uses=1]
+ call void @BZALLOC( i32 %4 )
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2008-05-18-FoldIntToPtr.ll b/test/Transforms/InstCombine/2008-05-18-FoldIntToPtr.ll
new file mode 100644
index 0000000..b34fc1e
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-18-FoldIntToPtr.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -instcombine -S | grep {ret i1 false} | count 2
+; PR2329
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define i1 @f1() {
+ ret i1 icmp eq (i8* inttoptr (i32 1 to i8*), i8* inttoptr (i32 2 to i8*))
+}
+
+define i1 @f2() {
+ ret i1 icmp eq (i8* inttoptr (i16 1 to i8*), i8* inttoptr (i16 2 to i8*))
+}
diff --git a/test/Transforms/InstCombine/2008-05-22-IDivVector.ll b/test/Transforms/InstCombine/2008-05-22-IDivVector.ll
new file mode 100644
index 0000000..f7ba99c
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-22-IDivVector.ll
@@ -0,0 +1,6 @@
+; RUN: opt < %s -instcombine -disable-output
+
+define <3 x i8> @f(<3 x i8> %i) {
+ %A = sdiv <3 x i8> %i, %i
+ ret <3 x i8> %A
+}
diff --git a/test/Transforms/InstCombine/2008-05-22-NegValVector.ll b/test/Transforms/InstCombine/2008-05-22-NegValVector.ll
new file mode 100644
index 0000000..bf92faf
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-22-NegValVector.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | not grep sub
+
+define <3 x i8> @f(<3 x i8> %a) {
+ %A = sub <3 x i8> zeroinitializer, %a
+ %B = mul <3 x i8> %A, <i8 5, i8 5, i8 5>
+ ret <3 x i8> %B
+}
+
diff --git a/test/Transforms/InstCombine/2008-05-23-CompareFold.ll b/test/Transforms/InstCombine/2008-05-23-CompareFold.ll
new file mode 100644
index 0000000..2de5af7
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-23-CompareFold.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | grep {ret i1 false}
+; PR2359
+define i1 @f(i8* %x) {
+entry:
+ %tmp462 = load i8* %x, align 1 ; <i8> [#uses=1]
+ %tmp462463 = sitofp i8 %tmp462 to float ; <float> [#uses=1]
+ %tmp464 = fcmp ugt float %tmp462463, 0x47EFFFFFE0000000 ; <i1>
+ ret i1 %tmp464
+}
+
+
diff --git a/test/Transforms/InstCombine/2008-05-31-AddBool.ll b/test/Transforms/InstCombine/2008-05-31-AddBool.ll
new file mode 100644
index 0000000..5416693
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-31-AddBool.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -S | grep {xor}
+; PR2389
+
+define i1 @test(i1 %a, i1 %b) {
+ %A = add i1 %a, %b
+ ret i1 %A
+}
diff --git a/test/Transforms/InstCombine/2008-05-31-Bools.ll b/test/Transforms/InstCombine/2008-05-31-Bools.ll
new file mode 100644
index 0000000..a0fe47a
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-05-31-Bools.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -instcombine -S > %t
+; RUN: grep {xor} %t
+; RUN: grep {and} %t
+; RUN: not grep {div} %t
+
+define i1 @foo1(i1 %a, i1 %b) {
+ %A = sub i1 %a, %b
+ ret i1 %A
+}
+
+define i1 @foo2(i1 %a, i1 %b) {
+ %A = mul i1 %a, %b
+ ret i1 %A
+}
+
+define i1 @foo3(i1 %a, i1 %b) {
+ %A = udiv i1 %a, %b
+ ret i1 %A
+}
+
+define i1 @foo4(i1 %a, i1 %b) {
+ %A = sdiv i1 %a, %b
+ ret i1 %A
+}
diff --git a/test/Transforms/InstCombine/2008-06-05-ashr-crash.ll b/test/Transforms/InstCombine/2008-06-05-ashr-crash.ll
new file mode 100644
index 0000000..5e4a9d0
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-06-05-ashr-crash.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine
+
+define i65 @foo(i65 %x) nounwind {
+entry:
+ %tmp2 = ashr i65 %x, 65 ; <i65> [#uses=1]
+ ret i65 %tmp2
+}
diff --git a/test/Transforms/InstCombine/2008-06-08-ICmpPHI.ll b/test/Transforms/InstCombine/2008-06-08-ICmpPHI.ll
new file mode 100644
index 0000000..917d3ae
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-06-08-ICmpPHI.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -instcombine -S | grep {phi i32} | count 2
+
+define void @test() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb16, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %indvar.next, %somebb ] ; <i32> [#uses=1]
+ %x.0 = phi i32 [ 37, %entry ], [ %tmp17, %somebb ] ; <i32> [#uses=1]
+ %tmp = tail call i32 (...)* @bork( ) nounwind ; <i32> [#uses=0]
+ %tmp1 = tail call i32 (...)* @bork( ) nounwind ; <i32> [#uses=0]
+ %tmp2 = tail call i32 (...)* @bork( ) nounwind ; <i32> [#uses=1]
+ %tmp3 = icmp eq i32 %tmp2, 0 ; <i1> [#uses=1]
+ br i1 %tmp3, label %bb7, label %bb5
+
+bb5: ; preds = %bb
+ %tmp6 = tail call i32 (...)* @bork( ) nounwind ; <i32> [#uses=0]
+ br label %bb7
+
+bb7: ; preds = %bb5, %bb
+ %tmp8 = tail call i32 (...)* @bork( ) nounwind ; <i32> [#uses=0]
+ %tmp9 = tail call i32 (...)* @bork( ) nounwind ; <i32> [#uses=0]
+ %tmp11 = icmp eq i32 %x.0, 37 ; <i1> [#uses=1]
+ br i1 %tmp11, label %bb14, label %bb16
+
+bb14: ; preds = %bb7
+ %tmp15 = tail call i32 (...)* @bar( ) nounwind ; <i32> [#uses=0]
+ br label %bb16
+
+bb16: ; preds = %bb14, %bb7
+ %tmp17 = tail call i32 (...)* @zap( ) nounwind ; <i32> [#uses=1]
+ %indvar.next = add i32 %i.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 42 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %somebb
+
+somebb:
+ br label %bb
+
+return: ; preds = %bb16
+ ret void
+}
+
+declare i32 @bork(...)
+
+declare i32 @bar(...)
+
+declare i32 @zap(...)
diff --git a/test/Transforms/InstCombine/2008-06-13-InfiniteLoopStore.ll b/test/Transforms/InstCombine/2008-06-13-InfiniteLoopStore.ll
new file mode 100644
index 0000000..08959c9
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-06-13-InfiniteLoopStore.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -instcombine -S | grep {store i32} | count 2
+
+@g_139 = global i32 0 ; <i32*> [#uses=2]
+
+define void @func_56(i32 %p_60) nounwind {
+entry:
+ store i32 1, i32* @g_139, align 4
+ %tmp1 = icmp ne i32 %p_60, 0 ; <i1> [#uses=1]
+ %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %return
+
+bb: ; preds = %bb, %entry
+ store i32 1, i32* @g_139, align 4
+ br label %bb
+
+return: ; preds = %entry
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/2008-06-13-ReadOnlyCallStore.ll b/test/Transforms/InstCombine/2008-06-13-ReadOnlyCallStore.ll
new file mode 100644
index 0000000..aed1b14
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-06-13-ReadOnlyCallStore.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -instcombine -S | grep {store i8} | count 2
+
+define i32 @a(i8* %s) nounwind {
+entry:
+ store i8 0, i8* %s, align 1 ; This store cannot be eliminated!
+ %tmp3 = call i32 @strlen( i8* %s ) nounwind readonly
+ %tmp5 = icmp ne i32 %tmp3, 0
+ br i1 %tmp5, label %bb, label %bb8
+
+bb: ; preds = %entry
+ store i8 0, i8* %s, align 1
+ br label %bb8
+
+bb8:
+ ret i32 %tmp3
+}
+
+declare i32 @strlen(i8*) nounwind readonly
+
diff --git a/test/Transforms/InstCombine/2008-06-19-UncondLoad.ll b/test/Transforms/InstCombine/2008-06-19-UncondLoad.ll
new file mode 100644
index 0000000..05f1c52
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-06-19-UncondLoad.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -S | grep load | count 3
+; PR2471
+
+declare i32 @x(i32*)
+define i32 @b(i32* %a, i32* %b) {
+entry:
+ %tmp1 = load i32* %a
+ %tmp3 = load i32* %b
+ %add = add i32 %tmp1, %tmp3
+ %call = call i32 @x( i32* %a )
+ %tobool = icmp ne i32 %add, 0
+ ; not safe to turn into an uncond load
+ %cond = select i1 %tobool, i32* %b, i32* %a
+ %tmp8 = load i32* %cond
+ ret i32 %tmp8
+}
diff --git a/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll b/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll
new file mode 100644
index 0000000..c3371c6
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | grep {icmp eq i32 %In, 15}
+; PR2479
+; (See also PR1800.)
+
+define i1 @test(i32 %In) {
+ %c1 = icmp ugt i32 %In, 13
+ %c2 = icmp eq i32 %In, 15
+ %V = and i1 %c1, %c2
+ ret i1 %V
+}
+
diff --git a/test/Transforms/InstCombine/2008-06-24-StackRestore.ll b/test/Transforms/InstCombine/2008-06-24-StackRestore.ll
new file mode 100644
index 0000000..8307834
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-06-24-StackRestore.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -instcombine -S | grep {call.*llvm.stackrestore}
+; PR2488
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+@p = weak global i8* null ; <i8**> [#uses=2]
+
+define i32 @main() nounwind {
+entry:
+ %tmp248 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %tmp2752 = alloca i32 ; <i32*> [#uses=2]
+ %tmpcast53 = bitcast i32* %tmp2752 to i8* ; <i8*> [#uses=1]
+ store i32 2, i32* %tmp2752, align 4
+ volatile store i8* %tmpcast53, i8** @p, align 4
+ br label %bb44
+
+bb: ; preds = %bb44
+ ret i32 0
+
+bb44: ; preds = %bb44, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %tmp3857, %bb44 ] ; <i32> [#uses=1]
+ %tmp249 = phi i8* [ %tmp248, %entry ], [ %tmp2, %bb44 ] ; <i8*> [#uses=1]
+ %tmp3857 = add i32 %indvar, 1 ; <i32> [#uses=3]
+ call void @llvm.stackrestore( i8* %tmp249 )
+ %tmp2 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %tmp4 = srem i32 %tmp3857, 1000 ; <i32> [#uses=2]
+ %tmp5 = add i32 %tmp4, 1 ; <i32> [#uses=1]
+ %tmp27 = alloca i32, i32 %tmp5 ; <i32*> [#uses=3]
+ %tmpcast = bitcast i32* %tmp27 to i8* ; <i8*> [#uses=1]
+ store i32 1, i32* %tmp27, align 4
+ %tmp34 = getelementptr i32* %tmp27, i32 %tmp4 ; <i32*> [#uses=1]
+ store i32 2, i32* %tmp34, align 4
+ volatile store i8* %tmpcast, i8** @p, align 4
+ %exitcond = icmp eq i32 %tmp3857, 999999 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb, label %bb44
+}
+
+declare i8* @llvm.stacksave() nounwind
+
+declare void @llvm.stackrestore(i8*) nounwind
diff --git a/test/Transforms/InstCombine/2008-07-08-AndICmp.ll b/test/Transforms/InstCombine/2008-07-08-AndICmp.ll
new file mode 100644
index 0000000..a12f4bd
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-08-AndICmp.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep icmp | count 1
+; PR2330
+
+define i1 @foo(i32 %a, i32 %b) nounwind {
+entry:
+ icmp ult i32 %a, 8 ; <i1>:0 [#uses=1]
+ icmp ult i32 %b, 8 ; <i1>:1 [#uses=1]
+ and i1 %1, %0 ; <i1>:2 [#uses=1]
+ ret i1 %2
+}
diff --git a/test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll b/test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll
new file mode 100644
index 0000000..8245b4d
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep {icmp ne i32 \%a}
+; PR2330
+
+define i1 @foo(i32 %a) nounwind {
+entry:
+ %tmp15 = shl i32 1, %a ; <i32> [#uses=1]
+ %tmp237 = and i32 %tmp15, 1 ; <i32> [#uses=1]
+ %toBool = icmp eq i32 %tmp237, 0 ; <i1> [#uses=1]
+ ret i1 %toBool
+}
diff --git a/test/Transforms/InstCombine/2008-07-08-SubAnd.ll b/test/Transforms/InstCombine/2008-07-08-SubAnd.ll
new file mode 100644
index 0000000..0091159
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-08-SubAnd.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep -v {i32 8}
+; PR2330
+
+define i32 @a(i32 %a) nounwind {
+entry:
+ %tmp2 = sub i32 8, %a ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp2, 7 ; <i32> [#uses=1]
+ ret i32 %tmp3
+}
diff --git a/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll b/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll
new file mode 100644
index 0000000..ccfb118
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -instcombine -S | grep {volatile load} | count 2
+; PR2496
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@g_1 = internal global i32 0 ; <i32*> [#uses=3]
+
+define i32 @main() nounwind {
+entry:
+ %tmp93 = icmp slt i32 0, 10 ; <i1> [#uses=0]
+ %tmp34 = volatile load i32* @g_1, align 4 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %b.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp6, %bb ] ; <i32> [#uses=1]
+ %tmp3.reg2mem.0 = phi i32 [ %tmp3, %bb ], [ %tmp34, %entry ]
+ %tmp4 = add i32 %tmp3.reg2mem.0, 5 ; <i32> [#uses=1]
+ volatile store i32 %tmp4, i32* @g_1, align 4
+ %tmp6 = add i32 %b.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp9 = icmp slt i32 %tmp6, 10 ; <i1> [#uses=1]
+ %tmp3 = volatile load i32* @g_1, align 4 ; <i32> [#uses=1]
+ br i1 %tmp9, label %bb, label %bb11
+
+bb11: ; preds = %bb
+ ret i32 0
+}
+
diff --git a/test/Transforms/InstCombine/2008-07-09-SubAndError.ll b/test/Transforms/InstCombine/2008-07-09-SubAndError.ll
new file mode 100644
index 0000000..47a7590
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-09-SubAndError.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | not grep {sub i32 0}
+; PR2330
+
+define i32 @foo(i32 %a) nounwind {
+entry:
+ %A = sub i32 5, %a
+ %B = and i32 %A, 2
+ ret i32 %B
+}
diff --git a/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll b/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll
new file mode 100644
index 0000000..e911532
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -instcombine -S | grep {%C = xor i1 %A, true}
+; RUN: opt < %s -instcombine -S | grep {ret i1 false}
+; PR2539
+
+define i1 @test1(i1 %A) {
+ %B = zext i1 %A to i32
+ %C = icmp slt i32 %B, 1
+ ret i1 %C
+}
+
+
+define i1 @test2(i1 zeroext %b) {
+entry:
+ %cmptmp = icmp slt i1 %b, true ; <i1> [#uses=1]
+ ret i1 %cmptmp
+}
+
diff --git a/test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll b/test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll
new file mode 100644
index 0000000..76e3039
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -instcombine -S | not grep add
+; RUN: opt < %s -instcombine -S | not grep mul
+; PR2330
+
+define i1 @f(i32 %x, i32 %y) nounwind {
+entry:
+ %A = add i32 %x, 5
+ %B = add i32 %y, 5
+ %C = icmp eq i32 %A, %B
+ ret i1 %C
+}
+
+define i1 @g(i32 %x, i32 %y) nounwind {
+entry:
+ %A = mul i32 %x, 5
+ %B = mul i32 %y, 5
+ %C = icmp eq i32 %A, %B
+ ret i1 %C
+}
diff --git a/test/Transforms/InstCombine/2008-07-11-RemAnd.ll b/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
new file mode 100644
index 0000000..bf53451
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | not grep rem
+; PR2330
+
+define i32 @a(i32 %b) nounwind {
+entry:
+ srem i32 %b, 8 ; <i32>:0 [#uses=1]
+ and i32 %0, 1 ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
diff --git a/test/Transforms/InstCombine/2008-07-13-DivZero.ll b/test/Transforms/InstCombine/2008-07-13-DivZero.ll
new file mode 100644
index 0000000..be1f8c2
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-13-DivZero.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -S | grep {lshr.*3}
+; RUN: opt < %s -instcombine -S | grep {call .*%cond}
+; PR2506
+
+; We can simplify the operand of udiv to '8', but not the operand to the
+; call. If the callee never returns, we can't assume the div is reachable.
+define i32 @a(i32 %x, i32 %y) {
+entry:
+ %tobool = icmp ne i32 %y, 0 ; <i1> [#uses=1]
+ %cond = select i1 %tobool, i32 8, i32 0 ; <i32> [#uses=2]
+ %call = call i32 @b( i32 %cond ) ; <i32> [#uses=0]
+ %div = udiv i32 %x, %cond ; <i32> [#uses=1]
+ ret i32 %div
+}
+
+declare i32 @b(i32)
diff --git a/test/Transforms/InstCombine/2008-07-16-fsub.ll b/test/Transforms/InstCombine/2008-07-16-fsub.ll
new file mode 100644
index 0000000..672b4e9
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-16-fsub.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep sub
+; PR2553
+
+define double @test(double %X) nounwind {
+ ; fsub of self can't be optimized away.
+ %Y = fsub double %X, %X
+ ret double %Y
+}
diff --git a/test/Transforms/InstCombine/2008-07-16-sse2_storel_dq.ll b/test/Transforms/InstCombine/2008-07-16-sse2_storel_dq.ll
new file mode 100644
index 0000000..501d8a6
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-07-16-sse2_storel_dq.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -instcombine -S | not grep {store }
+; PR2296
+
+@G = common global double 0.000000e+00, align 16
+
+define void @x(<2 x i64> %y) nounwind {
+entry:
+ bitcast <2 x i64> %y to <4 x i32>
+ call void @llvm.x86.sse2.storel.dq( i8* bitcast (double* @G to i8*), <4 x i32> %0 ) nounwind
+ ret void
+}
+
+declare void @llvm.x86.sse2.storel.dq(i8*, <4 x i32>) nounwind
diff --git a/test/Transforms/InstCombine/2008-08-05-And.ll b/test/Transforms/InstCombine/2008-08-05-And.ll
new file mode 100644
index 0000000..9773c2d
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-08-05-And.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -instcombine -S | not grep or
+; PR2629
+
+define void @f(i8* %x) nounwind {
+entry:
+ br label %bb
+
+bb:
+ %g1 = getelementptr i8* %x, i32 0
+ %l1 = load i8* %g1, align 1
+ %s1 = sub i8 %l1, 6
+ %c1 = icmp ugt i8 %s1, 2
+ %s2 = sub i8 %l1, 10
+ %c2 = icmp ugt i8 %s2, 2
+ %a1 = and i1 %c1, %c2
+ br i1 %a1, label %incompatible, label %okay
+
+okay:
+ ret void
+
+incompatible:
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll b/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
new file mode 100644
index 0000000..e9081f0
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -instcombine -S | not grep xor
+
+define i1 @test1(i8 %x, i8 %y) {
+ %X = xor i8 %x, 128
+ %Y = xor i8 %y, 128
+ %tmp = icmp slt i8 %X, %Y
+ ret i1 %tmp
+}
+
+define i1 @test2(i8 %x, i8 %y) {
+ %X = xor i8 %x, 128
+ %Y = xor i8 %y, 128
+ %tmp = icmp ult i8 %X, %Y
+ ret i1 %tmp
+}
+
+define i1 @test3(i8 %x) {
+ %X = xor i8 %x, 128
+ %tmp = icmp uge i8 %X, 15
+ ret i1 %tmp
+}
+
+define i1 @test4(i8 %x, i8 %y) {
+ %X = xor i8 %x, 127
+ %Y = xor i8 %y, 127
+ %tmp = icmp slt i8 %X, %Y
+ ret i1 %tmp
+}
+
+define i1 @test5(i8 %x, i8 %y) {
+ %X = xor i8 %x, 127
+ %Y = xor i8 %y, 127
+ %tmp = icmp ult i8 %X, %Y
+ ret i1 %tmp
+}
+
+define i1 @test6(i8 %x) {
+ %X = xor i8 %x, 127
+ %tmp = icmp uge i8 %X, 15
+ ret i1 %tmp
+}
diff --git a/test/Transforms/InstCombine/2008-09-02-VectorCrash.ll b/test/Transforms/InstCombine/2008-09-02-VectorCrash.ll
new file mode 100644
index 0000000..7c50141
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-09-02-VectorCrash.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -instcombine
+
+define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x, i32 %start_y, i32 %end_y) {
+ br label %1
+
+; <label>:1 ; preds = %4, %0
+ %2 = icmp slt i32 0, %end_y ; <i1> [#uses=1]
+ br i1 %2, label %4, label %3
+
+; <label>:3 ; preds = %1
+ ret void
+
+; <label>:4 ; preds = %6, %1
+ %5 = icmp slt i32 0, %end_x ; <i1> [#uses=1]
+ br i1 %5, label %6, label %1
+
+; <label>:6 ; preds = %4
+ %7 = srem <2 x i32> zeroinitializer, zeroinitializer ; <<2 x i32>> [#uses=1]
+ %8 = extractelement <2 x i32> %7, i32 1 ; <i32> [#uses=1]
+ %9 = select i1 false, i32 0, i32 %8 ; <i32> [#uses=1]
+ %10 = insertelement <2 x i32> zeroinitializer, i32 %9, i32 1 ; <<2 x i32>> [#uses=1]
+ %11 = extractelement <2 x i32> %10, i32 1 ; <i32> [#uses=1]
+ %12 = insertelement <4 x i32> zeroinitializer, i32 %11, i32 3 ; <<4 x i32>> [#uses=1]
+ %13 = sitofp <4 x i32> %12 to <4 x float> ; <<4 x float>> [#uses=1]
+ store <4 x float> %13, <4 x float>* null
+ br label %4
+}
diff --git a/test/Transforms/InstCombine/2008-09-29-FoldingOr.ll b/test/Transforms/InstCombine/2008-09-29-FoldingOr.ll
new file mode 100644
index 0000000..31ea94a
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-09-29-FoldingOr.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep {or i1}
+; PR2844
+
+define i32 @test(i32 %p_74) {
+ %A = icmp eq i32 %p_74, 0 ; <i1> [#uses=1]
+ %B = icmp slt i32 %p_74, -638208501 ; <i1> [#uses=1]
+ %or.cond = or i1 %A, %B ; <i1> [#uses=1]
+ %iftmp.10.0 = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1]
+ ret i32 %iftmp.10.0
+}
diff --git a/test/Transforms/InstCombine/2008-10-11-DivCompareFold.ll b/test/Transforms/InstCombine/2008-10-11-DivCompareFold.ll
new file mode 100644
index 0000000..fd36d86
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-10-11-DivCompareFold.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep {ret i1 false}
+; PR2697
+
+define i1 @x(i32 %x) nounwind {
+ %div = sdiv i32 %x, 65536 ; <i32> [#uses=1]
+ %cmp = icmp slt i32 %div, -65536
+ ret i1 %cmp
+}
diff --git a/test/Transforms/InstCombine/2008-10-23-ConstFoldWithoutMask.ll b/test/Transforms/InstCombine/2008-10-23-ConstFoldWithoutMask.ll
new file mode 100644
index 0000000..d70d052
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-10-23-ConstFoldWithoutMask.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine
+; PR2940
+
+define i32 @tstid() {
+ %var0 = inttoptr i32 1 to i8* ; <i8*> [#uses=1]
+ %var2 = ptrtoint i8* %var0 to i32 ; <i32> [#uses=1]
+ ret i32 %var2
+}
diff --git a/test/Transforms/InstCombine/2008-11-01-SRemDemandedBits.ll b/test/Transforms/InstCombine/2008-11-01-SRemDemandedBits.ll
new file mode 100644
index 0000000..aa077e2
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-11-01-SRemDemandedBits.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep {ret i1 true}
+; PR2993
+
+define i1 @foo(i32 %x) {
+ %1 = srem i32 %x, -1
+ %2 = icmp eq i32 %1, 0
+ ret i1 %2
+}
diff --git a/test/Transforms/InstCombine/2008-11-08-FCmp.ll b/test/Transforms/InstCombine/2008-11-08-FCmp.ll
new file mode 100644
index 0000000..c636288
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-11-08-FCmp.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; PR3021
+
+; When inst combining an FCMP with the LHS coming from a uitofp instruction, we
+; can't lower it to signed ICMP instructions.
+
+define i1 @test1(i32 %val) {
+ %1 = uitofp i32 %val to double
+ %2 = fcmp ole double %1, 0.000000e+00
+; CHECK: icmp eq i32 %val, 0
+ ret i1 %2
+}
+
+define i1 @test2(i32 %val) {
+ %1 = uitofp i32 %val to double
+ %2 = fcmp olt double %1, 0.000000e+00
+ ret i1 %2
+; CHECK: ret i1 false
+}
+
+define i1 @test3(i32 %val) {
+ %1 = uitofp i32 %val to double
+ %2 = fcmp oge double %1, 0.000000e+00
+ ret i1 %2
+; CHECK: ret i1 true
+}
+
+define i1 @test4(i32 %val) {
+ %1 = uitofp i32 %val to double
+ %2 = fcmp ogt double %1, 0.000000e+00
+; CHECK: icmp ne i32 %val, 0
+ ret i1 %2
+}
+
+define i1 @test5(i32 %val) {
+ %1 = uitofp i32 %val to double
+ %2 = fcmp ogt double %1, -4.400000e+00
+ ret i1 %2
+; CHECK: ret i1 true
+}
+
+define i1 @test6(i32 %val) {
+ %1 = uitofp i32 %val to double
+ %2 = fcmp olt double %1, -4.400000e+00
+ ret i1 %2
+; CHECK: ret i1 false
+}
diff --git a/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll b/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll
new file mode 100644
index 0000000..b2774d6
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -instcombine -S > %t
+; RUN: grep urem %t | count 3
+; RUN: grep srem %t | count 1
+; RUN: grep sub %t | count 2
+; RUN: grep add %t | count 1
+; PR3103
+
+define i8 @test1(i8 %x, i8 %y) {
+ %A = udiv i8 %x, %y
+ %B = mul i8 %A, %y
+ %C = sub i8 %x, %B
+ ret i8 %C
+}
+
+define i8 @test2(i8 %x, i8 %y) {
+ %A = sdiv i8 %x, %y
+ %B = mul i8 %A, %y
+ %C = sub i8 %x, %B
+ ret i8 %C
+}
+
+define i8 @test3(i8 %x, i8 %y) {
+ %A = udiv i8 %x, %y
+ %B = mul i8 %A, %y
+ %C = sub i8 %B, %x
+ ret i8 %C
+}
+
+define i8 @test4(i8 %x) {
+ %A = udiv i8 %x, 3
+ %B = mul i8 %A, -3
+ %C = sub i8 %x, %B
+ ret i8 %C
+}
diff --git a/test/Transforms/InstCombine/2008-11-27-IDivVector.ll b/test/Transforms/InstCombine/2008-11-27-IDivVector.ll
new file mode 100644
index 0000000..318a80c
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-11-27-IDivVector.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | not grep div
+
+define <2 x i8> @f(<2 x i8> %x) {
+ %A = udiv <2 x i8> %x, <i8 1, i8 1>
+ ret <2 x i8> %A
+}
+
+define <2 x i8> @g(<2 x i8> %x) {
+ %A = sdiv <2 x i8> %x, <i8 1, i8 1>
+ ret <2 x i8> %A
+}
diff --git a/test/Transforms/InstCombine/2008-11-27-MultiplyIntVec.ll b/test/Transforms/InstCombine/2008-11-27-MultiplyIntVec.ll
new file mode 100644
index 0000000..d8c53fa
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-11-27-MultiplyIntVec.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | not grep mul
+
+define <2 x i8> @f(<2 x i8> %x) {
+ %A = mul <2 x i8> %x, <i8 1, i8 1>
+ ret <2 x i8> %A
+}
+
+define <2 x i8> @g(<2 x i8> %x) {
+ %A = mul <2 x i8> %x, <i8 -1, i8 -1>
+ ret <2 x i8> %A
+}
diff --git a/test/Transforms/InstCombine/2008-11-27-UDivNegative.ll b/test/Transforms/InstCombine/2008-11-27-UDivNegative.ll
new file mode 100644
index 0000000..fc90bba
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-11-27-UDivNegative.ll
@@ -0,0 +1,6 @@
+; RUN: opt < %s -instcombine -S | not grep div
+
+define i8 @test(i8 %x) readnone nounwind {
+ %A = udiv i8 %x, 250
+ ret i8 %A
+}
diff --git a/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll b/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll
new file mode 100644
index 0000000..e4c7ebc
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -S | grep {i8 2, i8 2}
+; PR2756
+
+define <2 x i8> @foo(<2 x i8> %x) {
+ %A = srem <2 x i8> %x, <i8 2, i8 -2>
+ ret <2 x i8> %A
+}
diff --git a/test/Transforms/InstCombine/2009-01-05-i128-crash.ll b/test/Transforms/InstCombine/2009-01-05-i128-crash.ll
new file mode 100644
index 0000000..d355e0a
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-01-05-i128-crash.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -instcombine | llvm-dis
+; PR3235
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define hidden i128 @"\01_gfortrani_max_value"(i32 %length, i32 %signed_flag) nounwind {
+entry:
+ switch i32 %length, label %bb13 [
+ i32 1, label %bb17
+ i32 4, label %bb9
+ i32 8, label %bb5
+ ]
+
+bb5: ; preds = %entry
+ %0 = icmp eq i32 %signed_flag, 0 ; <i1> [#uses=1]
+ %iftmp.28.0 = select i1 %0, i128 18446744073709551615, i128 9223372036854775807 ; <i128> [#uses=1]
+ ret i128 %iftmp.28.0
+
+bb9: ; preds = %entry
+ ret i128 0
+
+bb13: ; preds = %entry
+ ret i128 0
+
+bb17: ; preds = %entry
+ ret i128 0
+}
diff --git a/test/Transforms/InstCombine/2009-01-08-AlignAlloca.ll b/test/Transforms/InstCombine/2009-01-08-AlignAlloca.ll
new file mode 100644
index 0000000..a61a94e
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-01-08-AlignAlloca.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -instcombine -S > %t
+; RUN: grep {, align 4} %t | count 3
+; RUN: grep {, align 8} %t | count 3
+; rdar://6480438
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ %struct.Key = type { { i32, i32 } }
+ %struct.anon = type <{ i8, [3 x i8], i32 }>
+
+define i32 @bar(i64 %key_token2) nounwind {
+entry:
+ %iospec = alloca %struct.Key ; <%struct.Key*> [#uses=3]
+ %ret = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %0 = getelementptr %struct.Key* %iospec, i32 0, i32 0 ; <{ i32, i32 }*> [#uses=2]
+ %1 = getelementptr { i32, i32 }* %0, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %1, align 4
+ %2 = getelementptr { i32, i32 }* %0, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 0, i32* %2, align 4
+ %3 = getelementptr %struct.Key* %iospec, i32 0, i32 0 ; <{ i32, i32 }*> [#uses=1]
+ %4 = bitcast { i32, i32 }* %3 to i64* ; <i64*> [#uses=1]
+ store i64 %key_token2, i64* %4, align 4
+ %5 = call i32 (...)* @foo(%struct.Key* byval align 4 %iospec, i32* %ret) nounwind ; <i32> [#uses=0]
+ %6 = load i32* %ret, align 4 ; <i32> [#uses=1]
+ ret i32 %6
+}
+
+declare i32 @foo(...)
diff --git a/test/Transforms/InstCombine/2009-01-16-PointerAddrSpace.ll b/test/Transforms/InstCombine/2009-01-16-PointerAddrSpace.ll
new file mode 100644
index 0000000..ce62f35
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-01-16-PointerAddrSpace.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | grep {store.*addrspace(1)}
+; PR3335
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+define i32 @test(i32* %P) nounwind {
+entry:
+ %Q = bitcast i32* %P to i32 addrspace(1)*
+ store i32 0, i32 addrspace(1)* %Q, align 4
+ ret i32 0
+}
diff --git a/test/Transforms/InstCombine/2009-01-19-fmod-constant-float-specials.ll b/test/Transforms/InstCombine/2009-01-19-fmod-constant-float-specials.ll
new file mode 100644
index 0000000..79a2f1f
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-01-19-fmod-constant-float-specials.ll
@@ -0,0 +1,316 @@
+; RUN: opt < %s -simplifycfg -instcombine -S | grep 0x7FF8000000000000 | count 7
+; RUN: opt < %s -simplifycfg -instcombine -S | grep 0x7FF00000FFFFFFFF | count 5
+; RUN: opt < %s -simplifycfg -instcombine -S | grep {0\\.0} | count 3
+; RUN: opt < %s -simplifycfg -instcombine -S | grep {3\\.5} | count 1
+;
+
+; ModuleID = 'apf.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+@"\01LC" = internal constant [4 x i8] c"%f\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define void @foo1() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0x7FF0000000000000, float* %x, align 4
+ store float 0x7FF8000000000000, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+declare i32 @printf(i8*, ...) nounwind
+
+define void @foo2() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0x7FF0000000000000, float* %x, align 4
+ store float 0.000000e+00, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo3() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0x7FF0000000000000, float* %x, align 4
+ store float 3.500000e+00, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo4() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0x7FF0000000000000, float* %x, align 4
+ store float 0x7FF0000000000000, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo5() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0x7FF8000000000000, float* %x, align 4
+ store float 0x7FF0000000000000, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo6() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0x7FF8000000000000, float* %x, align 4
+ store float 0.000000e+00, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo7() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0x7FF8000000000000, float* %x, align 4
+ store float 3.500000e+00, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo8() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0x7FF8000000000000, float* %x, align 4
+ store float 0x7FF8000000000000, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo9() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0.000000e+00, float* %x, align 4
+ store float 0x7FF8000000000000, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo10() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0.000000e+00, float* %x, align 4
+ store float 0x7FF0000000000000, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo11() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0.000000e+00, float* %x, align 4
+ store float 0.000000e+00, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo12() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 0.000000e+00, float* %x, align 4
+ store float 3.500000e+00, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo13() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 3.500000e+00, float* %x, align 4
+ store float 0x7FF8000000000000, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo14() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 3.500000e+00, float* %x, align 4
+ store float 0x7FF0000000000000, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo15() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 3.500000e+00, float* %x, align 4
+ store float 0.000000e+00, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
+
+define void @foo16() nounwind {
+entry:
+ %y = alloca float ; <float*> [#uses=2]
+ %x = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store float 3.500000e+00, float* %x, align 4
+ store float 3.500000e+00, float* %y, align 4
+ %0 = load float* %y, align 4 ; <float> [#uses=1]
+ %1 = fpext float %0 to double ; <double> [#uses=1]
+ %2 = load float* %x, align 4 ; <float> [#uses=1]
+ %3 = fpext float %2 to double ; <double> [#uses=1]
+ %4 = frem double %3, %1 ; <double> [#uses=1]
+ %5 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), double %4) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2009-01-19-fmod-constant-float.ll b/test/Transforms/InstCombine/2009-01-19-fmod-constant-float.ll
new file mode 100644
index 0000000..6bc7ce3
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-01-19-fmod-constant-float.ll
@@ -0,0 +1,75 @@
+; RUN: opt < %s -simplifycfg -instcombine -S | grep 0x3FB99999A0000000 | count 2
+; RUN: opt < %s -simplifycfg -instcombine -S | grep 0xBFB99999A0000000 | count 2
+; check constant folding for 'frem'. PR 3316.
+
+; ModuleID = 'tt.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+define float @test1() nounwind {
+entry:
+ %retval = alloca float ; <float*> [#uses=2]
+ %0 = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = frem double 1.000000e-01, 1.000000e+00 ; <double> [#uses=1]
+ %2 = fptrunc double %1 to float ; <float> [#uses=1]
+ store float %2, float* %0, align 4
+ %3 = load float* %0, align 4 ; <float> [#uses=1]
+ store float %3, float* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load float* %retval ; <float> [#uses=1]
+ ret float %retval1
+}
+
+define float @test2() nounwind {
+entry:
+ %retval = alloca float ; <float*> [#uses=2]
+ %0 = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = frem double -1.000000e-01, 1.000000e+00 ; <double> [#uses=1]
+ %2 = fptrunc double %1 to float ; <float> [#uses=1]
+ store float %2, float* %0, align 4
+ %3 = load float* %0, align 4 ; <float> [#uses=1]
+ store float %3, float* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load float* %retval ; <float> [#uses=1]
+ ret float %retval1
+}
+
+define float @test3() nounwind {
+entry:
+ %retval = alloca float ; <float*> [#uses=2]
+ %0 = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = frem double 1.000000e-01, -1.000000e+00 ; <double> [#uses=1]
+ %2 = fptrunc double %1 to float ; <float> [#uses=1]
+ store float %2, float* %0, align 4
+ %3 = load float* %0, align 4 ; <float> [#uses=1]
+ store float %3, float* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load float* %retval ; <float> [#uses=1]
+ ret float %retval1
+}
+
+define float @test4() nounwind {
+entry:
+ %retval = alloca float ; <float*> [#uses=2]
+ %0 = alloca float ; <float*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = frem double -1.000000e-01, -1.000000e+00 ; <double> [#uses=1]
+ %2 = fptrunc double %1 to float ; <float> [#uses=1]
+ store float %2, float* %0, align 4
+ %3 = load float* %0, align 4 ; <float> [#uses=1]
+ store float %3, float* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load float* %retval ; <float> [#uses=1]
+ ret float %retval1
+}
diff --git a/test/Transforms/InstCombine/2009-01-24-EmptyStruct.ll b/test/Transforms/InstCombine/2009-01-24-EmptyStruct.ll
new file mode 100644
index 0000000..4b64b48
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-01-24-EmptyStruct.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine
+; PR3381
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.atomic_t = type { i32 }
+ %struct.inode = type { i32, %struct.mutex }
+ %struct.list_head = type { %struct.list_head*, %struct.list_head* }
+ %struct.lock_class_key = type { }
+ %struct.mutex = type { %struct.atomic_t, %struct.rwlock_t, %struct.list_head }
+ %struct.rwlock_t = type { %struct.lock_class_key }
+
+define void @handle_event(%struct.inode* %bar) nounwind {
+entry:
+ %0 = getelementptr %struct.inode* %bar, i64 -1, i32 1, i32 1 ; <%struct.rwlock_t*> [#uses=1]
+ %1 = bitcast %struct.rwlock_t* %0 to i32* ; <i32*> [#uses=1]
+ store i32 1, i32* %1, align 4
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2009-01-31-InfIterate.ll b/test/Transforms/InstCombine/2009-01-31-InfIterate.ll
new file mode 100644
index 0000000..815c1a9
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-01-31-InfIterate.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine | llvm-dis
+; PR3452
+define i128 @test(i64 %A, i64 %B, i1 %C, i128 %Z, i128 %Y, i64* %P, i64* %Q) {
+entry:
+ %tmp2 = trunc i128 %Z to i64
+ %tmp4 = trunc i128 %Y to i64
+ store i64 %tmp2, i64* %P
+ store i64 %tmp4, i64* %Q
+ %x = sub i64 %tmp2, %tmp4
+ %c = sub i64 %tmp2, %tmp4
+ %tmp137 = zext i1 %C to i64
+ %tmp138 = sub i64 %c, %tmp137
+ br label %T
+
+T:
+ %G = phi i64 [%tmp138, %entry], [%tmp2, %Fal]
+ %F = zext i64 %G to i128
+ ret i128 %F
+
+Fal:
+ br label %T
+}
diff --git a/test/Transforms/InstCombine/2009-01-31-Pressure.ll b/test/Transforms/InstCombine/2009-01-31-Pressure.ll
new file mode 100644
index 0000000..c3ee9a3
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-01-31-Pressure.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine -S | grep {%B = add i8 %b, %x}
+; PR2698
+
+declare void @use1(i1)
+declare void @use8(i8)
+
+define void @test1(i8 %a, i8 %b, i8 %x) {
+ %A = add i8 %a, %x
+ %B = add i8 %b, %x
+ %C = icmp eq i8 %A, %B
+ call void @use1(i1 %C)
+ ret void
+}
+
+define void @test2(i8 %a, i8 %b, i8 %x) {
+ %A = add i8 %a, %x
+ %B = add i8 %b, %x
+ %C = icmp eq i8 %A, %B
+ call void @use1(i1 %C)
+ call void @use8(i8 %A)
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2009-02-04-FPBitcast.ll b/test/Transforms/InstCombine/2009-02-04-FPBitcast.ll
new file mode 100644
index 0000000..bc6a204
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-02-04-FPBitcast.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine
+; PR3468
+
+define x86_fp80 @cast() {
+ %tmp = bitcast i80 0 to x86_fp80 ; <x86_fp80> [#uses=1]
+ ret x86_fp80 %tmp
+}
+
+define i80 @invcast() {
+ %tmp = bitcast x86_fp80 0xK00000000000000000000 to i80 ; <i80> [#uses=1]
+ ret i80 %tmp
+}
diff --git a/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll b/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
new file mode 100644
index 0000000..b29d8d2
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
@@ -0,0 +1,278 @@
+; RUN: opt < %s -instcombine -scalarrepl -S | not grep { = alloca}
+; rdar://6417724
+; Instcombine shouldn't do anything to this function that prevents promoting the allocas inside it.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >" = type { i32* }
+ %"struct.std::_Vector_base<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl" }
+ %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl" = type { i32*, i32*, i32* }
+ %"struct.std::bidirectional_iterator_tag" = type <{ i8 }>
+ %"struct.std::forward_iterator_tag" = type <{ i8 }>
+ %"struct.std::input_iterator_tag" = type <{ i8 }>
+ %"struct.std::random_access_iterator_tag" = type <{ i8 }>
+ %"struct.std::vector<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >" }
+
+define i32* @_Z3fooRSt6vectorIiSaIiEE(%"struct.std::vector<int,std::allocator<int> >"* %X) {
+entry:
+ %0 = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >" ; <%"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"*> [#uses=2]
+ %__first_addr.i.i = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >" ; <%"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"*> [#uses=31]
+ %__last_addr.i.i = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >" ; <%"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"*> [#uses=4]
+ %unnamed_arg.i = alloca %"struct.std::bidirectional_iterator_tag", align 8 ; <%"struct.std::bidirectional_iterator_tag"*> [#uses=1]
+ %1 = alloca %"struct.std::bidirectional_iterator_tag" ; <%"struct.std::bidirectional_iterator_tag"*> [#uses=1]
+ %__first_addr.i = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >" ; <%"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"*> [#uses=2]
+ %2 = alloca %"struct.std::bidirectional_iterator_tag" ; <%"struct.std::bidirectional_iterator_tag"*> [#uses=2]
+ %3 = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >" ; <%"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"*> [#uses=2]
+ %4 = alloca i32 ; <i32*> [#uses=8]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 42, i32* %4, align 4
+ %5 = getelementptr %"struct.std::vector<int,std::allocator<int> >"* %X, i32 0, i32 0 ; <%"struct.std::_Vector_base<int,std::allocator<int> >"*> [#uses=1]
+ %6 = getelementptr %"struct.std::_Vector_base<int,std::allocator<int> >"* %5, i32 0, i32 0 ; <%"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl"*> [#uses=1]
+ %7 = getelementptr %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl"* %6, i32 0, i32 1 ; <i32**> [#uses=1]
+ %8 = load i32** %7, align 4 ; <i32*> [#uses=1]
+ %9 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %3, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %8, i32** %9, align 4
+ %10 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %3, i32 0, i32 0 ; <i32**> [#uses=1]
+ %11 = load i32** %10, align 4 ; <i32*> [#uses=1]
+ %tmp2.i = ptrtoint i32* %11 to i32 ; <i32> [#uses=1]
+ %tmp1.i = inttoptr i32 %tmp2.i to i32* ; <i32*> [#uses=1]
+ %tmp3 = ptrtoint i32* %tmp1.i to i32 ; <i32> [#uses=1]
+ %tmp2 = inttoptr i32 %tmp3 to i32* ; <i32*> [#uses=1]
+ %12 = getelementptr %"struct.std::vector<int,std::allocator<int> >"* %X, i32 0, i32 0 ; <%"struct.std::_Vector_base<int,std::allocator<int> >"*> [#uses=1]
+ %13 = getelementptr %"struct.std::_Vector_base<int,std::allocator<int> >"* %12, i32 0, i32 0 ; <%"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl"*> [#uses=1]
+ %14 = getelementptr %"struct.std::_Vector_base<int,std::allocator<int> >::_Vector_impl"* %13, i32 0, i32 0 ; <i32**> [#uses=1]
+ %15 = load i32** %14, align 4 ; <i32*> [#uses=1]
+ %16 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %0, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %15, i32** %16, align 4
+ %17 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %0, i32 0, i32 0 ; <i32**> [#uses=1]
+ %18 = load i32** %17, align 4 ; <i32*> [#uses=1]
+ %tmp2.i17 = ptrtoint i32* %18 to i32 ; <i32> [#uses=1]
+ %tmp1.i18 = inttoptr i32 %tmp2.i17 to i32* ; <i32*> [#uses=1]
+ %tmp8 = ptrtoint i32* %tmp1.i18 to i32 ; <i32> [#uses=1]
+ %tmp6 = inttoptr i32 %tmp8 to i32* ; <i32*> [#uses=1]
+ %19 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %tmp6, i32** %19
+ %20 = getelementptr %"struct.std::bidirectional_iterator_tag"* %1, i32 0, i32 0 ; <i8*> [#uses=1]
+ %21 = load i8* %20, align 1 ; <i8> [#uses=1]
+ %22 = or i8 %21, 0 ; <i8> [#uses=1]
+ %23 = or i8 %22, 0 ; <i8> [#uses=1]
+ %24 = or i8 %23, 0 ; <i8> [#uses=0]
+ %25 = getelementptr %"struct.std::bidirectional_iterator_tag"* %2, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 0, i8* %25, align 1
+ %elt.i = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %val.i = load i32** %elt.i ; <i32*> [#uses=1]
+ %tmp.i = bitcast %"struct.std::bidirectional_iterator_tag"* %unnamed_arg.i to i8* ; <i8*> [#uses=1]
+ %tmp9.i = bitcast %"struct.std::bidirectional_iterator_tag"* %2 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i64(i8* %tmp.i, i8* %tmp9.i, i64 1, i32 1)
+ %26 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %val.i, i32** %26
+ %27 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__last_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %tmp2, i32** %27
+ %28 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__last_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %29 = load i32** %28, align 4 ; <i32*> [#uses=1]
+ %30 = ptrtoint i32* %29 to i32 ; <i32> [#uses=1]
+ %31 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %32 = load i32** %31, align 4 ; <i32*> [#uses=1]
+ %33 = ptrtoint i32* %32 to i32 ; <i32> [#uses=1]
+ %34 = sub i32 %30, %33 ; <i32> [#uses=1]
+ %35 = ashr i32 %34, 2 ; <i32> [#uses=1]
+ %36 = ashr i32 %35, 2 ; <i32> [#uses=1]
+ br label %bb12.i.i
+
+bb.i.i: ; preds = %bb12.i.i
+ %37 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %38 = load i32** %37, align 4 ; <i32*> [#uses=1]
+ %39 = load i32* %38, align 4 ; <i32> [#uses=1]
+ %40 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %41 = icmp eq i32 %39, %40 ; <i1> [#uses=1]
+ %42 = zext i1 %41 to i8 ; <i8> [#uses=1]
+ %toBool.i.i = icmp ne i8 %42, 0 ; <i1> [#uses=1]
+ br i1 %toBool.i.i, label %bb1.i.i, label %bb2.i.i
+
+bb1.i.i: ; preds = %bb.i.i
+ %43 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %44 = load i32** %43, align 4 ; <i32*> [#uses=1]
+ br label %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+
+bb2.i.i: ; preds = %bb.i.i
+ %45 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %46 = load i32** %45, align 4 ; <i32*> [#uses=1]
+ %47 = getelementptr i32* %46, i64 1 ; <i32*> [#uses=1]
+ %48 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %47, i32** %48, align 4
+ %49 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %50 = load i32** %49, align 4 ; <i32*> [#uses=1]
+ %51 = load i32* %50, align 4 ; <i32> [#uses=1]
+ %52 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %53 = icmp eq i32 %51, %52 ; <i1> [#uses=1]
+ %54 = zext i1 %53 to i8 ; <i8> [#uses=1]
+ %toBool3.i.i = icmp ne i8 %54, 0 ; <i1> [#uses=1]
+ br i1 %toBool3.i.i, label %bb4.i.i, label %bb5.i.i
+
+bb4.i.i: ; preds = %bb2.i.i
+ %55 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %56 = load i32** %55, align 4 ; <i32*> [#uses=1]
+ br label %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+
+bb5.i.i: ; preds = %bb2.i.i
+ %57 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %58 = load i32** %57, align 4 ; <i32*> [#uses=1]
+ %59 = getelementptr i32* %58, i64 1 ; <i32*> [#uses=1]
+ %60 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %59, i32** %60, align 4
+ %61 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %62 = load i32** %61, align 4 ; <i32*> [#uses=1]
+ %63 = load i32* %62, align 4 ; <i32> [#uses=1]
+ %64 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %65 = icmp eq i32 %63, %64 ; <i1> [#uses=1]
+ %66 = zext i1 %65 to i8 ; <i8> [#uses=1]
+ %toBool6.i.i = icmp ne i8 %66, 0 ; <i1> [#uses=1]
+ br i1 %toBool6.i.i, label %bb7.i.i, label %bb8.i.i
+
+bb7.i.i: ; preds = %bb5.i.i
+ %67 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %68 = load i32** %67, align 4 ; <i32*> [#uses=1]
+ br label %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+
+bb8.i.i: ; preds = %bb5.i.i
+ %69 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %70 = load i32** %69, align 4 ; <i32*> [#uses=1]
+ %71 = getelementptr i32* %70, i64 1 ; <i32*> [#uses=1]
+ %72 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %71, i32** %72, align 4
+ %73 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %74 = load i32** %73, align 4 ; <i32*> [#uses=1]
+ %75 = load i32* %74, align 4 ; <i32> [#uses=1]
+ %76 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %77 = icmp eq i32 %75, %76 ; <i1> [#uses=1]
+ %78 = zext i1 %77 to i8 ; <i8> [#uses=1]
+ %toBool9.i.i = icmp ne i8 %78, 0 ; <i1> [#uses=1]
+ br i1 %toBool9.i.i, label %bb10.i.i, label %bb11.i.i
+
+bb10.i.i: ; preds = %bb8.i.i
+ %79 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %80 = load i32** %79, align 4 ; <i32*> [#uses=1]
+ br label %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+
+bb11.i.i: ; preds = %bb8.i.i
+ %81 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %82 = load i32** %81, align 4 ; <i32*> [#uses=1]
+ %83 = getelementptr i32* %82, i64 1 ; <i32*> [#uses=1]
+ %84 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %83, i32** %84, align 4
+ %85 = sub i32 %__trip_count.0.i.i, 1 ; <i32> [#uses=1]
+ br label %bb12.i.i
+
+bb12.i.i: ; preds = %bb11.i.i, %entry
+ %__trip_count.0.i.i = phi i32 [ %36, %entry ], [ %85, %bb11.i.i ] ; <i32> [#uses=2]
+ %86 = icmp sgt i32 %__trip_count.0.i.i, 0 ; <i1> [#uses=1]
+ br i1 %86, label %bb.i.i, label %bb13.i.i
+
+bb13.i.i: ; preds = %bb12.i.i
+ %87 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__last_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %88 = load i32** %87, align 4 ; <i32*> [#uses=1]
+ %89 = ptrtoint i32* %88 to i32 ; <i32> [#uses=1]
+ %90 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %91 = load i32** %90, align 4 ; <i32*> [#uses=1]
+ %92 = ptrtoint i32* %91 to i32 ; <i32> [#uses=1]
+ %93 = sub i32 %89, %92 ; <i32> [#uses=1]
+ %94 = ashr i32 %93, 2 ; <i32> [#uses=1]
+ switch i32 %94, label %bb26.i.i [
+ i32 1, label %bb22.i.i
+ i32 2, label %bb18.i.i
+ i32 3, label %bb14.i.i
+ ]
+
+bb14.i.i: ; preds = %bb13.i.i
+ %95 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %96 = load i32** %95, align 4 ; <i32*> [#uses=1]
+ %97 = load i32* %96, align 4 ; <i32> [#uses=1]
+ %98 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %99 = icmp eq i32 %97, %98 ; <i1> [#uses=1]
+ %100 = zext i1 %99 to i8 ; <i8> [#uses=1]
+ %toBool15.i.i = icmp ne i8 %100, 0 ; <i1> [#uses=1]
+ br i1 %toBool15.i.i, label %bb16.i.i, label %bb17.i.i
+
+bb16.i.i: ; preds = %bb14.i.i
+ %101 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %102 = load i32** %101, align 4 ; <i32*> [#uses=1]
+ br label %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+
+bb17.i.i: ; preds = %bb14.i.i
+ %103 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %104 = load i32** %103, align 4 ; <i32*> [#uses=1]
+ %105 = getelementptr i32* %104, i64 1 ; <i32*> [#uses=1]
+ %106 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %105, i32** %106, align 4
+ br label %bb18.i.i
+
+bb18.i.i: ; preds = %bb17.i.i, %bb13.i.i
+ %107 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %108 = load i32** %107, align 4 ; <i32*> [#uses=1]
+ %109 = load i32* %108, align 4 ; <i32> [#uses=1]
+ %110 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %111 = icmp eq i32 %109, %110 ; <i1> [#uses=1]
+ %112 = zext i1 %111 to i8 ; <i8> [#uses=1]
+ %toBool19.i.i = icmp ne i8 %112, 0 ; <i1> [#uses=1]
+ br i1 %toBool19.i.i, label %bb20.i.i, label %bb21.i.i
+
+bb20.i.i: ; preds = %bb18.i.i
+ %113 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %114 = load i32** %113, align 4 ; <i32*> [#uses=1]
+ br label %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+
+bb21.i.i: ; preds = %bb18.i.i
+ %115 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %116 = load i32** %115, align 4 ; <i32*> [#uses=1]
+ %117 = getelementptr i32* %116, i64 1 ; <i32*> [#uses=1]
+ %118 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %117, i32** %118, align 4
+ br label %bb22.i.i
+
+bb22.i.i: ; preds = %bb21.i.i, %bb13.i.i
+ %119 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %120 = load i32** %119, align 4 ; <i32*> [#uses=1]
+ %121 = load i32* %120, align 4 ; <i32> [#uses=1]
+ %122 = load i32* %4, align 4 ; <i32> [#uses=1]
+ %123 = icmp eq i32 %121, %122 ; <i1> [#uses=1]
+ %124 = zext i1 %123 to i8 ; <i8> [#uses=1]
+ %toBool23.i.i = icmp ne i8 %124, 0 ; <i1> [#uses=1]
+ br i1 %toBool23.i.i, label %bb24.i.i, label %bb25.i.i
+
+bb24.i.i: ; preds = %bb22.i.i
+ %125 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %126 = load i32** %125, align 4 ; <i32*> [#uses=1]
+ br label %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+
+bb25.i.i: ; preds = %bb22.i.i
+ %127 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %128 = load i32** %127, align 4 ; <i32*> [#uses=1]
+ %129 = getelementptr i32* %128, i64 1 ; <i32*> [#uses=1]
+ %130 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__first_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ store i32* %129, i32** %130, align 4
+ br label %bb26.i.i
+
+bb26.i.i: ; preds = %bb25.i.i, %bb13.i.i
+ %131 = getelementptr %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* %__last_addr.i.i, i32 0, i32 0 ; <i32**> [#uses=1]
+ %132 = load i32** %131, align 4 ; <i32*> [#uses=1]
+ br label %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+
+_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit: ; preds = %bb26.i.i, %bb24.i.i, %bb20.i.i, %bb16.i.i, %bb10.i.i, %bb7.i.i, %bb4.i.i, %bb1.i.i
+ %.0.0.i.i = phi i32* [ %132, %bb26.i.i ], [ %126, %bb24.i.i ], [ %114, %bb20.i.i ], [ %102, %bb16.i.i ], [ %80, %bb10.i.i ], [ %68, %bb7.i.i ], [ %56, %bb4.i.i ], [ %44, %bb1.i.i ] ; <i32*> [#uses=1]
+ %tmp2.i.i = ptrtoint i32* %.0.0.i.i to i32 ; <i32> [#uses=1]
+ %tmp1.i.i = inttoptr i32 %tmp2.i.i to i32* ; <i32*> [#uses=1]
+ %tmp4.i = ptrtoint i32* %tmp1.i.i to i32 ; <i32> [#uses=1]
+ %tmp3.i = inttoptr i32 %tmp4.i to i32* ; <i32*> [#uses=1]
+ %tmp8.i = ptrtoint i32* %tmp3.i to i32 ; <i32> [#uses=1]
+ %tmp6.i = inttoptr i32 %tmp8.i to i32* ; <i32*> [#uses=1]
+ %tmp12 = ptrtoint i32* %tmp6.i to i32 ; <i32> [#uses=1]
+ %tmp10 = inttoptr i32 %tmp12 to i32* ; <i32*> [#uses=1]
+ %tmp16 = ptrtoint i32* %tmp10 to i32 ; <i32> [#uses=1]
+ br label %return
+
+return: ; preds = %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
+ %tmp14 = inttoptr i32 %tmp16 to i32* ; <i32*> [#uses=1]
+ ret i32* %tmp14
+}
+
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
diff --git a/test/Transforms/InstCombine/2009-02-21-LoadCST.ll b/test/Transforms/InstCombine/2009-02-21-LoadCST.ll
new file mode 100644
index 0000000..f56fc38
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-02-21-LoadCST.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | grep {ret i32 3679669}
+; PR3595
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
[email protected] = internal constant [4 x i8] c"\B5%8\00"
+
+define i32 @test() {
+ %rhsv = load i32* bitcast ([4 x i8]* @.str1 to i32*), align 1
+ ret i32 %rhsv
+}
diff --git a/test/Transforms/InstCombine/2009-02-25-CrashZeroSizeArray.ll b/test/Transforms/InstCombine/2009-02-25-CrashZeroSizeArray.ll
new file mode 100644
index 0000000..a8349f0
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-02-25-CrashZeroSizeArray.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -instcombine | llvm-dis
+; PR3667
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define void @_ada_c32001b(i32 %tmp5) {
+entry:
+ %max289 = select i1 false, i32 %tmp5, i32 0 ; <i32> [#uses=1]
+ %tmp6 = mul i32 %max289, 4 ; <i32> [#uses=1]
+ %tmp7 = alloca i8, i32 0 ; <i8*> [#uses=1]
+ %tmp8 = bitcast i8* %tmp7 to [0 x [0 x i32]]* ; <[0 x [0 x i32]]*> [#uses=1]
+ %tmp11 = load i32* null, align 1 ; <i32> [#uses=1]
+ %tmp12 = icmp eq i32 %tmp11, 3 ; <i1> [#uses=1]
+ %tmp13 = zext i1 %tmp12 to i8 ; <i8> [#uses=1]
+ %tmp14 = ashr i32 %tmp6, 2 ; <i32> [#uses=1]
+ %tmp15 = bitcast [0 x [0 x i32]]* %tmp8 to i8* ; <i8*> [#uses=1]
+ %tmp16 = mul i32 %tmp14, 4 ; <i32> [#uses=1]
+ %tmp17 = mul i32 1, %tmp16 ; <i32> [#uses=1]
+ %tmp18 = getelementptr i8* %tmp15, i32 %tmp17 ; <i8*> [#uses=1]
+ %tmp19 = bitcast i8* %tmp18 to [0 x i32]* ; <[0 x i32]*> [#uses=1]
+ %tmp20 = bitcast [0 x i32]* %tmp19 to i32* ; <i32*> [#uses=1]
+ %tmp21 = getelementptr i32* %tmp20, i32 0 ; <i32*> [#uses=1]
+ %tmp22 = load i32* %tmp21, align 1 ; <i32> [#uses=1]
+ %tmp23 = icmp eq i32 %tmp22, 4 ; <i1> [#uses=1]
+ %tmp24 = zext i1 %tmp23 to i8 ; <i8> [#uses=1]
+ %toBool709 = icmp ne i8 %tmp13, 0 ; <i1> [#uses=1]
+ %toBool710 = icmp ne i8 %tmp24, 0 ; <i1> [#uses=1]
+ %tmp25 = and i1 %toBool709, %toBool710 ; <i1> [#uses=1]
+ %tmp26 = zext i1 %tmp25 to i8 ; <i8> [#uses=1]
+ %toBool711 = icmp ne i8 %tmp26, 0 ; <i1> [#uses=1]
+ br i1 %toBool711, label %a, label %b
+
+a: ; preds = %entry
+ ret void
+
+b: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2009-03-18-vector-ashr-crash.ll b/test/Transforms/InstCombine/2009-03-18-vector-ashr-crash.ll
new file mode 100644
index 0000000..c617ca4
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-03-18-vector-ashr-crash.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine | llvm-dis
+; PR3826
+
+define void @0(<4 x i16>*, <4 x i16>*) {
+ %3 = alloca <4 x i16>* ; <<4 x i16>**> [#uses=1]
+ %4 = load <4 x i16>* null, align 1 ; <<4 x i16>> [#uses=1]
+ %5 = ashr <4 x i16> %4, <i16 5, i16 5, i16 5, i16 5> ; <<4 x i16>> [#uses=1]
+ %6 = load <4 x i16>** %3 ; <<4 x i16>*> [#uses=1]
+ store <4 x i16> %5, <4 x i16>* %6, align 1
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2009-03-20-AShrOverShift.ll b/test/Transforms/InstCombine/2009-03-20-AShrOverShift.ll
new file mode 100644
index 0000000..0a07bf3
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-03-20-AShrOverShift.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep {ashr i32 %val, 31}
+; PR3851
+
+define i32 @foo2(i32 %val) nounwind {
+entry:
+ %shr = ashr i32 %val, 15 ; <i32> [#uses=3]
+ %shr4 = ashr i32 %shr, 17 ; <i32> [#uses=1]
+ ret i32 %shr4
+ }
diff --git a/test/Transforms/InstCombine/2009-03-24-InfLoop.ll b/test/Transforms/InstCombine/2009-03-24-InfLoop.ll
new file mode 100644
index 0000000..4ce04a1
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-03-24-InfLoop.ll
@@ -0,0 +1,9 @@
+; PR3874
+; RUN: opt < %s -instcombine | llvm-dis
+ define i1 @test(i32 %x) {
+ %A = lshr i32 3968, %x
+ %B = and i32 %A, 1
+ %C = icmp eq i32 %B, 0
+ ret i1 %C
+ }
+
diff --git a/test/Transforms/InstCombine/2009-04-07-MulPromoteToI96.ll b/test/Transforms/InstCombine/2009-04-07-MulPromoteToI96.ll
new file mode 100644
index 0000000..244b22a
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-04-07-MulPromoteToI96.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -instcombine -S | grep {mul i64}
+; rdar://6762288
+
+; Instcombine should not promote the mul to i96 because it is definitely
+; not a legal type for the target, and we don't want a libcall.
+
+define i96 @test(i96 %a.4, i96 %b.2) {
+ %tmp1086 = trunc i96 %a.4 to i64 ; <i64> [#uses=1]
+ %tmp836 = trunc i96 %b.2 to i64 ; <i64> [#uses=1]
+ %mul185 = mul i64 %tmp1086, %tmp836 ; <i64> [#uses=1]
+ %tmp544 = zext i64 %mul185 to i96 ; <i96> [#uses=1]
+ ret i96 %tmp544
+}
diff --git a/test/Transforms/InstCombine/2009-05-23-FCmpToICmp.ll b/test/Transforms/InstCombine/2009-05-23-FCmpToICmp.ll
new file mode 100644
index 0000000..dd14c6b
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-05-23-FCmpToICmp.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | not grep cmp
+; rdar://6903175
+
+define i1 @f0(i32 *%a) nounwind {
+ %b = load i32* %a, align 4
+ %c = uitofp i32 %b to double
+ %d = fcmp ogt double %c, 0x41EFFFFFFFE00000
+ ret i1 %d
+}
diff --git a/test/Transforms/InstCombine/2009-06-11-StoreAddrSpace.ll b/test/Transforms/InstCombine/2009-06-11-StoreAddrSpace.ll
new file mode 100644
index 0000000..e5355b8
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-06-11-StoreAddrSpace.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -S | grep {store i32 0,}
+; PR4366
+
+define void @a() {
+ store i32 0, i32 addrspace(1)* null
+ ret void
+}
diff --git a/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll b/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll
new file mode 100644
index 0000000..6beedf8
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep srem
+; PR3439
+
+define i32 @a(i32 %x) nounwind {
+entry:
+ %rem = srem i32 %x, 2
+ %and = and i32 %rem, 2
+ ret i32 %and
+}
diff --git a/test/Transforms/InstCombine/2009-07-02-MaskedIntVector.ll b/test/Transforms/InstCombine/2009-07-02-MaskedIntVector.ll
new file mode 100644
index 0000000..41940fe
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-07-02-MaskedIntVector.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -instcombine | llvm-dis
+; PR4495
+
+define i32 @test(i64 %test) {
+entry:
+ %0 = bitcast <4 x i32> undef to <16 x i8> ; <<16 x i8>> [#uses=1]
+ %t12 = shufflevector <16 x i8> %0, <16 x i8> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> ; <<16 x i8>> [#uses=1]
+ %t11 = bitcast <16 x i8> %t12 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %t9 = extractelement <2 x i64> %t11, i32 0 ; <i64> [#uses=1]
+ %t10 = bitcast i64 %t9 to <2 x i32> ; <<2 x i32>> [#uses=1]
+ %t7 = bitcast i64 %test to <2 x i32> ; <<2 x i32>> [#uses=1]
+ %t6 = xor <2 x i32> %t10, %t7 ; <<2 x i32>> [#uses=1]
+ %t1 = extractelement <2 x i32> %t6, i32 0 ; <i32> [#uses=1]
+ ret i32 %t1
+}
diff --git a/test/Transforms/InstCombine/2009-12-17-CmpSelectNull.ll b/test/Transforms/InstCombine/2009-12-17-CmpSelectNull.ll
new file mode 100644
index 0000000..fb7497b
--- /dev/null
+++ b/test/Transforms/InstCombine/2009-12-17-CmpSelectNull.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
[email protected] = internal constant [2 x i8] c".\00"
[email protected] = internal constant [3 x i8] c"::\00"
+
+define i8* @demangle_qualified(i32 %isfuncname) nounwind {
+entry:
+ %tobool272 = icmp ne i32 %isfuncname, 0
+ %cond276 = select i1 %tobool272, i8* getelementptr inbounds ([2 x i8]* @.str254, i32 0, i32 0), i8* getelementptr inbounds ([3 x i8]* @.str557, i32 0, i32 0) ; <i8*> [#uses=4]
+ %cmp.i504 = icmp eq i8* %cond276, null
+ %rval = getelementptr i8* %cond276, i1 %cmp.i504
+ ret i8* %rval
+}
+
+; CHECK: %cond276 = select i1
+; CHECK: ret i8* %cond276
diff --git a/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll b/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll
new file mode 100644
index 0000000..4ab9bf0
--- /dev/null
+++ b/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; PR6165
+
+define i32 @f() {
+entry:
+ br label %BB1
+
+BB1: ; preds = %BB1, %entry
+; CHECK: BB1:
+ %x = phi i32 [ -29, %entry ], [ 0, %BB1 ] ; <i32> [#uses=2]
+ %rem = srem i32 %x, 2 ; <i32> [#uses=1]
+ %t = icmp eq i32 %rem, -1 ; <i1> [#uses=1]
+ br i1 %t, label %BB2, label %BB1
+; CHECK-NOT: br i1 false
+
+BB2: ; preds = %BB1
+; CHECK: BB2:
+ ret i32 %x
+}
diff --git a/test/Transforms/InstCombine/CPP_min_max.ll b/test/Transforms/InstCombine/CPP_min_max.ll
new file mode 100644
index 0000000..531ce2b
--- /dev/null
+++ b/test/Transforms/InstCombine/CPP_min_max.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep select | not grep {i32\\*}
+
+; This testcase corresponds to PR362, which notices that this horrible code
+; is generated by the C++ front-end and LLVM optimizers, which has lots of
+; loads and other stuff that are unneeded.
+;
+; Instcombine should propagate the load through the select instructions to
+; allow elimination of the extra stuff by the mem2reg pass.
+
+define void @_Z5test1RiS_(i32* %x, i32* %y) {
+entry:
+ %tmp.1.i = load i32* %y ; <i32> [#uses=1]
+ %tmp.3.i = load i32* %x ; <i32> [#uses=1]
+ %tmp.4.i = icmp slt i32 %tmp.1.i, %tmp.3.i ; <i1> [#uses=1]
+ %retval.i = select i1 %tmp.4.i, i32* %y, i32* %x ; <i32*> [#uses=1]
+ %tmp.4 = load i32* %retval.i ; <i32> [#uses=1]
+ store i32 %tmp.4, i32* %x
+ ret void
+}
+
+define void @_Z5test2RiS_(i32* %x, i32* %y) {
+entry:
+ %tmp.0 = alloca i32 ; <i32*> [#uses=2]
+ %tmp.2 = load i32* %x ; <i32> [#uses=2]
+ store i32 %tmp.2, i32* %tmp.0
+ %tmp.3.i = load i32* %y ; <i32> [#uses=1]
+ %tmp.4.i = icmp slt i32 %tmp.2, %tmp.3.i ; <i1> [#uses=1]
+ %retval.i = select i1 %tmp.4.i, i32* %y, i32* %tmp.0 ; <i32*> [#uses=1]
+ %tmp.6 = load i32* %retval.i ; <i32> [#uses=1]
+ store i32 %tmp.6, i32* %y
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/IntPtrCast.ll b/test/Transforms/InstCombine/IntPtrCast.ll
new file mode 100644
index 0000000..4ecbccd
--- /dev/null
+++ b/test/Transforms/InstCombine/IntPtrCast.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+target datalayout = "e-p:32:32"
+
+define i32* @test(i32* %P) {
+ %V = ptrtoint i32* %P to i32 ; <i32> [#uses=1]
+ %P2 = inttoptr i32 %V to i32* ; <i32*> [#uses=1]
+ ret i32* %P2
+; CHECK: ret i32* %P
+}
+
diff --git a/test/Transforms/InstCombine/JavaCompare.ll b/test/Transforms/InstCombine/JavaCompare.ll
new file mode 100644
index 0000000..7d0edb84
--- /dev/null
+++ b/test/Transforms/InstCombine/JavaCompare.ll
@@ -0,0 +1,14 @@
+; This is the sequence of stuff that the Java front-end expands for a single
+; <= comparison. Check to make sure we turn it into a <= (only)
+
+; RUN: opt < %s -instcombine -S | grep {%c3 = icmp sle i32 %A, %B}
+
+define i1 @le(i32 %A, i32 %B) {
+ %c1 = icmp sgt i32 %A, %B ; <i1> [#uses=1]
+ %tmp = select i1 %c1, i32 1, i32 0 ; <i32> [#uses=1]
+ %c2 = icmp slt i32 %A, %B ; <i1> [#uses=1]
+ %result = select i1 %c2, i32 -1, i32 %tmp ; <i32> [#uses=1]
+ %c3 = icmp sle i32 %result, 0 ; <i1> [#uses=1]
+ ret i1 %c3
+}
+
diff --git a/test/Transforms/InstCombine/README.txt b/test/Transforms/InstCombine/README.txt
new file mode 100644
index 0000000..de043c7
--- /dev/null
+++ b/test/Transforms/InstCombine/README.txt
@@ -0,0 +1,4 @@
+This directory contains test cases for the instcombine transformation. The
+dated tests are actual bug tests, whereas the named tests are used to test
+for features that the this pass should be capable of performing.
+
diff --git a/test/Transforms/InstCombine/add-shrink.ll b/test/Transforms/InstCombine/add-shrink.ll
new file mode 100644
index 0000000..cc57478
--- /dev/null
+++ b/test/Transforms/InstCombine/add-shrink.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep {add nsw i32}
+; RUN: opt < %s -instcombine -S | grep sext | count 1
+
+; Should only have one sext and the add should be i32 instead of i64.
+
+define i64 @test1(i32 %A) {
+ %B = ashr i32 %A, 7 ; <i32> [#uses=1]
+ %C = ashr i32 %A, 9 ; <i32> [#uses=1]
+ %D = sext i32 %B to i64 ; <i64> [#uses=1]
+ %E = sext i32 %C to i64 ; <i64> [#uses=1]
+ %F = add i64 %D, %E ; <i64> [#uses=1]
+ ret i64 %F
+}
+
diff --git a/test/Transforms/InstCombine/add-sitofp.ll b/test/Transforms/InstCombine/add-sitofp.ll
new file mode 100644
index 0000000..98a8cb4
--- /dev/null
+++ b/test/Transforms/InstCombine/add-sitofp.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep {add nsw i32}
+
+define double @x(i32 %a, i32 %b) nounwind {
+ %m = lshr i32 %a, 24
+ %n = and i32 %m, %b
+ %o = sitofp i32 %n to double
+ %p = fadd double %o, 1.0
+ ret double %p
+}
diff --git a/test/Transforms/InstCombine/add.ll b/test/Transforms/InstCombine/add.ll
new file mode 100644
index 0000000..4719809
--- /dev/null
+++ b/test/Transforms/InstCombine/add.ll
@@ -0,0 +1,277 @@
+; This test makes sure that add instructions are properly eliminated.
+
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep -v OK | not grep add
+
+define i32 @test1(i32 %A) {
+ %B = add i32 %A, 0 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test2(i32 %A) {
+ %B = add i32 %A, 5 ; <i32> [#uses=1]
+ %C = add i32 %B, -5 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test3(i32 %A) {
+ %B = add i32 %A, 5 ; <i32> [#uses=1]
+ ;; This should get converted to an add
+ %C = sub i32 %B, 5 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test4(i32 %A, i32 %B) {
+ %C = sub i32 0, %A ; <i32> [#uses=1]
+ ; D = B + -A = B - A
+ %D = add i32 %B, %C ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test5(i32 %A, i32 %B) {
+ %C = sub i32 0, %A ; <i32> [#uses=1]
+ ; D = -A + B = B - A
+ %D = add i32 %C, %B ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test6(i32 %A) {
+ %B = mul i32 7, %A ; <i32> [#uses=1]
+ ; C = 7*A+A == 8*A == A << 3
+ %C = add i32 %B, %A ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test7(i32 %A) {
+ %B = mul i32 7, %A ; <i32> [#uses=1]
+ ; C = A+7*A == 8*A == A << 3
+ %C = add i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+; (A & C1)+(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
+define i32 @test8(i32 %A, i32 %B) {
+ %A1 = and i32 %A, 7 ; <i32> [#uses=1]
+ %B1 = and i32 %B, 128 ; <i32> [#uses=1]
+ %C = add i32 %A1, %B1 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test9(i32 %A) {
+ %B = shl i32 %A, 4 ; <i32> [#uses=2]
+ ; === shl int %A, 5
+ %C = add i32 %B, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i1 @test10(i8 %A, i8 %b) {
+ %B = add i8 %A, %b ; <i8> [#uses=1]
+ ; === A != -b
+ %c = icmp ne i8 %B, 0 ; <i1> [#uses=1]
+ ret i1 %c
+}
+
+define i1 @test11(i8 %A) {
+ %B = add i8 %A, -1 ; <i8> [#uses=1]
+ ; === A != 1
+ %c = icmp ne i8 %B, 0 ; <i1> [#uses=1]
+ ret i1 %c
+}
+
+define i32 @test12(i32 %A, i32 %B) {
+ ; Should be transformed into shl A, 1
+ %C_OK = add i32 %B, %A ; <i32> [#uses=1]
+ br label %X
+
+X: ; preds = %0
+ %D = add i32 %C_OK, %A ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test13(i32 %A, i32 %B, i32 %C) {
+ %D_OK = add i32 %A, %B ; <i32> [#uses=1]
+ %E_OK = add i32 %D_OK, %C ; <i32> [#uses=1]
+ ;; shl A, 1
+ %F = add i32 %E_OK, %A ; <i32> [#uses=1]
+ ret i32 %F
+}
+
+define i32 @test14(i32 %offset, i32 %difference) {
+ %tmp.2 = and i32 %difference, 3 ; <i32> [#uses=1]
+ %tmp.3_OK = add i32 %tmp.2, %offset ; <i32> [#uses=1]
+ %tmp.5.mask = and i32 %difference, -4 ; <i32> [#uses=1]
+ ; == add %offset, %difference
+ %tmp.8 = add i32 %tmp.3_OK, %tmp.5.mask ; <i32> [#uses=1]
+ ret i32 %tmp.8
+}
+
+define i8 @test15(i8 %A) {
+ ; Does not effect result
+ %B = add i8 %A, -64 ; <i8> [#uses=1]
+ ; Only one bit set
+ %C = and i8 %B, 16 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @test16(i8 %A) {
+ ; Turn this into a XOR
+ %B = add i8 %A, 16 ; <i8> [#uses=1]
+ ; Only one bit set
+ %C = and i8 %B, 16 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i32 @test17(i32 %A) {
+ %B = xor i32 %A, -1 ; <i32> [#uses=1]
+ ; == sub int 0, %A
+ %C = add i32 %B, 1 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i8 @test18(i8 %A) {
+ %B = xor i8 %A, -1 ; <i8> [#uses=1]
+ ; == sub ubyte 16, %A
+ %C = add i8 %B, 17 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i32 @test19(i1 %C) {
+ %A = select i1 %C, i32 1000, i32 10 ; <i32> [#uses=1]
+ %V = add i32 %A, 123 ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define i32 @test20(i32 %x) {
+ %tmp.2 = xor i32 %x, -2147483648 ; <i32> [#uses=1]
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i32 %tmp.2, -2147483648 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+}
+
+define i1 @test21(i32 %x) {
+ %t = add i32 %x, 4 ; <i32> [#uses=1]
+ %y = icmp eq i32 %t, 123 ; <i1> [#uses=1]
+ ret i1 %y
+}
+
+define i32 @test22(i32 %V) {
+ %V2 = add i32 %V, 10 ; <i32> [#uses=1]
+ switch i32 %V2, label %Default [
+ i32 20, label %Lab1
+ i32 30, label %Lab2
+ ]
+
+Default: ; preds = %0
+ ret i32 123
+
+Lab1: ; preds = %0
+ ret i32 12312
+
+Lab2: ; preds = %0
+ ret i32 1231231
+}
+
+define i32 @test23(i1 %C, i32 %a) {
+entry:
+ br i1 %C, label %endif, label %else
+
+else: ; preds = %entry
+ br label %endif
+
+endif: ; preds = %else, %entry
+ %b.0 = phi i32 [ 0, %entry ], [ 1, %else ] ; <i32> [#uses=1]
+ %tmp.4 = add i32 %b.0, 1 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+}
+
+define i32 @test24(i32 %A) {
+ %B = add i32 %A, 1 ; <i32> [#uses=1]
+ %C = shl i32 %B, 1 ; <i32> [#uses=1]
+ %D = sub i32 %C, 2 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i64 @test25(i64 %Y) {
+ %tmp.4 = shl i64 %Y, 2 ; <i64> [#uses=1]
+ %tmp.12 = shl i64 %Y, 2 ; <i64> [#uses=1]
+ %tmp.8 = add i64 %tmp.4, %tmp.12 ; <i64> [#uses=1]
+ ret i64 %tmp.8
+}
+
+define i32 @test26(i32 %A, i32 %B) {
+ %C = add i32 %A, %B ; <i32> [#uses=1]
+ %D = sub i32 %C, %B ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test27(i1 %C, i32 %X, i32 %Y) {
+ %A = add i32 %X, %Y ; <i32> [#uses=1]
+ %B = add i32 %Y, 123 ; <i32> [#uses=1]
+ ;; Fold add through select.
+ %C.upgrd.1 = select i1 %C, i32 %A, i32 %B ; <i32> [#uses=1]
+ %D = sub i32 %C.upgrd.1, %Y ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test28(i32 %X) {
+ %Y = add i32 %X, 1234 ; <i32> [#uses=1]
+ %Z = sub i32 42, %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test29(i32 %X, i32 %x) {
+ %tmp.2 = sub i32 %X, %x ; <i32> [#uses=2]
+ %tmp.2.mask = and i32 %tmp.2, 63 ; <i32> [#uses=1]
+ %tmp.6 = add i32 %tmp.2.mask, %x ; <i32> [#uses=1]
+ %tmp.7 = and i32 %tmp.6, 63 ; <i32> [#uses=1]
+ %tmp.9 = and i32 %tmp.2, -64 ; <i32> [#uses=1]
+ %tmp.10 = or i32 %tmp.7, %tmp.9 ; <i32> [#uses=1]
+ ret i32 %tmp.10
+}
+
+define i64 @test30(i64 %x) {
+ %tmp.2 = xor i64 %x, -9223372036854775808 ; <i64> [#uses=1]
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i64 %tmp.2, -9223372036854775808 ; <i64> [#uses=1]
+ ret i64 %tmp.4
+}
+
+define i32 @test31(i32 %A) {
+ %B = add i32 %A, 4 ; <i32> [#uses=1]
+ %C = mul i32 %B, 5 ; <i32> [#uses=1]
+ %D = sub i32 %C, 20 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test32(i32 %A) {
+ %B = add i32 %A, 4 ; <i32> [#uses=1]
+ %C = shl i32 %B, 2 ; <i32> [#uses=1]
+ %D = sub i32 %C, 16 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i8 @test33(i8 %A) {
+ %B = and i8 %A, -2 ; <i8> [#uses=1]
+ %C = add i8 %B, 1 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @test34(i8 %A) {
+ %B = add i8 %A, 64 ; <i8> [#uses=1]
+ %C = and i8 %B, 12 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i32 @test35(i32 %a) {
+ %tmpnot = xor i32 %a, -1 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmpnot, %a ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test36(i32 %a) {
+ %x = and i32 %a, -2
+ %y = and i32 %a, -126
+ %z = add i32 %x, %y
+ %q = and i32 %z, 1 ; always zero
+ ret i32 %q
+}
diff --git a/test/Transforms/InstCombine/add2.ll b/test/Transforms/InstCombine/add2.ll
new file mode 100644
index 0000000..1cbdd3a
--- /dev/null
+++ b/test/Transforms/InstCombine/add2.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -instcombine -S | not grep add
+
+define i64 @test1(i64 %A, i32 %B) {
+ %tmp12 = zext i32 %B to i64
+ %tmp3 = shl i64 %tmp12, 32
+ %tmp5 = add i64 %tmp3, %A
+ %tmp6 = and i64 %tmp5, 123
+ ret i64 %tmp6
+}
+
+define i32 @test3(i32 %A) {
+ %B = and i32 %A, 7
+ %C = and i32 %A, 32
+ %F = add i32 %B, %C
+ ret i32 %F
+}
+
+define i32 @test4(i32 %A) {
+ %B = and i32 %A, 128
+ %C = lshr i32 %A, 30
+ %F = add i32 %B, %C
+ ret i32 %F
+}
+
diff --git a/test/Transforms/InstCombine/add3.ll b/test/Transforms/InstCombine/add3.ll
new file mode 100644
index 0000000..cde3e24
--- /dev/null
+++ b/test/Transforms/InstCombine/add3.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -instcombine -S | grep inttoptr | count 2
+
+;; Target triple for gep raising case below.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+; PR1795
+define void @test2(i32 %.val24) {
+EntryBlock:
+ add i32 %.val24, -12
+ inttoptr i32 %0 to i32*
+ store i32 1, i32* %1
+ add i32 %.val24, -16
+ inttoptr i32 %2 to i32*
+ getelementptr i32* %3, i32 1
+ load i32* %4
+ tail call i32 @callee( i32 %5 )
+ ret void
+}
+
+declare i32 @callee(i32)
diff --git a/test/Transforms/InstCombine/addnegneg.ll b/test/Transforms/InstCombine/addnegneg.ll
new file mode 100644
index 0000000..a3a09f2
--- /dev/null
+++ b/test/Transforms/InstCombine/addnegneg.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | grep { sub } | count 1
+; PR2047
+
+define i32 @l(i32 %a, i32 %b, i32 %c, i32 %d) {
+entry:
+ %b.neg = sub i32 0, %b ; <i32> [#uses=1]
+ %c.neg = sub i32 0, %c ; <i32> [#uses=1]
+ %sub4 = add i32 %c.neg, %b.neg ; <i32> [#uses=1]
+ %sub6 = add i32 %sub4, %d ; <i32> [#uses=1]
+ ret i32 %sub6
+}
+
diff --git a/test/Transforms/InstCombine/adjust-for-sminmax.ll b/test/Transforms/InstCombine/adjust-for-sminmax.ll
new file mode 100644
index 0000000..b9b6f70
--- /dev/null
+++ b/test/Transforms/InstCombine/adjust-for-sminmax.ll
@@ -0,0 +1,85 @@
+; RUN: opt < %s -instcombine -S | grep {icmp s\[lg\]t i32 %n, 0} | count 16
+
+; Instcombine should recognize that this code can be adjusted
+; to fit the canonical smax/smin pattern.
+
+define i32 @floor_a(i32 %n) {
+ %t = icmp sgt i32 %n, -1
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @ceil_a(i32 %n) {
+ %t = icmp slt i32 %n, 1
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @floor_b(i32 %n) {
+ %t = icmp sgt i32 %n, 0
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @ceil_b(i32 %n) {
+ %t = icmp slt i32 %n, 0
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @floor_c(i32 %n) {
+ %t = icmp sge i32 %n, 0
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @ceil_c(i32 %n) {
+ %t = icmp sle i32 %n, 0
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @floor_d(i32 %n) {
+ %t = icmp sge i32 %n, 1
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @ceil_d(i32 %n) {
+ %t = icmp sle i32 %n, -1
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @floor_e(i32 %n) {
+ %t = icmp sgt i32 %n, -1
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @ceil_e(i32 %n) {
+ %t = icmp slt i32 %n, 1
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @floor_f(i32 %n) {
+ %t = icmp sgt i32 %n, 0
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @ceil_f(i32 %n) {
+ %t = icmp slt i32 %n, 0
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @floor_g(i32 %n) {
+ %t = icmp sge i32 %n, 0
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @ceil_g(i32 %n) {
+ %t = icmp sle i32 %n, 0
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @floor_h(i32 %n) {
+ %t = icmp sge i32 %n, 1
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
+define i32 @ceil_h(i32 %n) {
+ %t = icmp sle i32 %n, -1
+ %m = select i1 %t, i32 %n, i32 0
+ ret i32 %m
+}
diff --git a/test/Transforms/InstCombine/align-2d-gep.ll b/test/Transforms/InstCombine/align-2d-gep.ll
new file mode 100644
index 0000000..eeca5c0
--- /dev/null
+++ b/test/Transforms/InstCombine/align-2d-gep.ll
@@ -0,0 +1,44 @@
+; RUN: opt < %s -instcombine -S | grep {align 16} | count 1
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+; A multi-dimensional array in a nested loop doing vector stores that
+; aren't yet aligned. Instcombine can understand the addressing in the
+; Nice case to prove 16 byte alignment. In the Awkward case, the inner
+; array dimension is not even, so the stores to it won't always be
+; aligned. Instcombine should prove alignment in exactly one of the two
+; stores.
+
+@Nice = global [1001 x [20000 x double]] zeroinitializer, align 32
+@Awkward = global [1001 x [20001 x double]] zeroinitializer, align 32
+
+define void @foo() nounwind {
+entry:
+ br label %bb7.outer
+
+bb7.outer:
+ %i = phi i64 [ 0, %entry ], [ %indvar.next26, %bb11 ]
+ br label %bb1
+
+bb1:
+ %j = phi i64 [ 0, %bb7.outer ], [ %indvar.next, %bb1 ]
+
+ %t4 = getelementptr [1001 x [20000 x double]]* @Nice, i64 0, i64 %i, i64 %j
+ %q = bitcast double* %t4 to <2 x double>*
+ store <2 x double><double 0.0, double 0.0>, <2 x double>* %q, align 8
+
+ %s4 = getelementptr [1001 x [20001 x double]]* @Awkward, i64 0, i64 %i, i64 %j
+ %r = bitcast double* %s4 to <2 x double>*
+ store <2 x double><double 0.0, double 0.0>, <2 x double>* %r, align 8
+
+ %indvar.next = add i64 %j, 2
+ %exitcond = icmp eq i64 %indvar.next, 557
+ br i1 %exitcond, label %bb11, label %bb1
+
+bb11:
+ %indvar.next26 = add i64 %i, 1
+ %exitcond27 = icmp eq i64 %indvar.next26, 991
+ br i1 %exitcond27, label %return.split, label %bb7.outer
+
+return.split:
+ ret void
+}
diff --git a/test/Transforms/InstCombine/align-addr.ll b/test/Transforms/InstCombine/align-addr.ll
new file mode 100644
index 0000000..d8ad5a9
--- /dev/null
+++ b/test/Transforms/InstCombine/align-addr.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -instcombine -S | grep {align 16} | count 1
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+; Instcombine should be able to prove vector alignment in the
+; presence of a few mild address computation tricks.
+
+define void @foo(i8* %b, i64 %n, i64 %u, i64 %y) nounwind {
+entry:
+ %c = ptrtoint i8* %b to i64
+ %d = and i64 %c, -16
+ %e = inttoptr i64 %d to double*
+ %v = mul i64 %u, 2
+ %z = and i64 %y, -2
+ %t1421 = icmp eq i64 %n, 0
+ br i1 %t1421, label %return, label %bb
+
+bb:
+ %i = phi i64 [ %indvar.next, %bb ], [ 20, %entry ]
+ %j = mul i64 %i, %v
+ %h = add i64 %j, %z
+ %t8 = getelementptr double* %e, i64 %h
+ %p = bitcast double* %t8 to <2 x double>*
+ store <2 x double><double 0.0, double 0.0>, <2 x double>* %p, align 8
+ %indvar.next = add i64 %i, 1
+ %exitcond = icmp eq i64 %indvar.next, %n
+ br i1 %exitcond, label %return, label %bb
+
+return:
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/align-external.ll b/test/Transforms/InstCombine/align-external.ll
new file mode 100644
index 0000000..6e8ad87
--- /dev/null
+++ b/test/Transforms/InstCombine/align-external.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; Don't assume that external global variables have their preferred
+; alignment. They may only have the ABI minimum alignment.
+
+; CHECK: %s = shl i64 %a, 3
+; CHECK: %r = or i64 %s, ptrtoint (i32* @A to i64)
+; CHECK: %q = add i64 %r, 1
+; CHECK: ret i64 %q
+
+target datalayout = "-i32:8:32"
+
+@A = external global i32
+@B = external global i32
+
+define i64 @foo(i64 %a) {
+ %t = ptrtoint i32* @A to i64
+ %s = shl i64 %a, 3
+ %r = or i64 %t, %s
+ %q = add i64 %r, 1
+ ret i64 %q
+}
diff --git a/test/Transforms/InstCombine/align-inc.ll b/test/Transforms/InstCombine/align-inc.ll
new file mode 100644
index 0000000..71512b3
--- /dev/null
+++ b/test/Transforms/InstCombine/align-inc.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | grep {GLOBAL.*align 16}
+; RUN: opt < %s -instcombine -S | grep {tmp = load}
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@GLOBAL = internal global [4 x i32] zeroinitializer
+
+define <16 x i8> @foo(<2 x i64> %x) {
+entry:
+ %tmp = load <16 x i8>* bitcast ([4 x i32]* @GLOBAL to <16 x i8>*), align 1
+ ret <16 x i8> %tmp
+}
+
diff --git a/test/Transforms/InstCombine/alloca.ll b/test/Transforms/InstCombine/alloca.ll
new file mode 100644
index 0000000..b9add4d
--- /dev/null
+++ b/test/Transforms/InstCombine/alloca.ll
@@ -0,0 +1,32 @@
+; Zero byte allocas should be deleted.
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep alloca
+; END.
+
+declare void @use(...)
+
+define void @test() {
+ %X = alloca [0 x i32] ; <[0 x i32]*> [#uses=1]
+ call void (...)* @use( [0 x i32]* %X )
+ %Y = alloca i32, i32 0 ; <i32*> [#uses=1]
+ call void (...)* @use( i32* %Y )
+ %Z = alloca { } ; <{ }*> [#uses=1]
+ call void (...)* @use( { }* %Z )
+ ret void
+}
+
+define void @test2() {
+ %A = alloca i32 ; <i32*> [#uses=1]
+ store i32 123, i32* %A
+ ret void
+}
+
+define void @test3() {
+ %A = alloca { i32 } ; <{ i32 }*> [#uses=1]
+ %B = getelementptr { i32 }* %A, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 123, i32* %B
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/and-compare.ll b/test/Transforms/InstCombine/and-compare.ll
new file mode 100644
index 0000000..c30a245
--- /dev/null
+++ b/test/Transforms/InstCombine/and-compare.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep and | count 1
+
+; Should be optimized to one and.
+define i1 @test1(i32 %a, i32 %b) {
+ %tmp1 = and i32 %a, 65280 ; <i32> [#uses=1]
+ %tmp3 = and i32 %b, 65280 ; <i32> [#uses=1]
+ %tmp = icmp ne i32 %tmp1, %tmp3 ; <i1> [#uses=1]
+ ret i1 %tmp
+}
+
diff --git a/test/Transforms/InstCombine/and-fcmp.ll b/test/Transforms/InstCombine/and-fcmp.ll
new file mode 100644
index 0000000..91868d1
--- /dev/null
+++ b/test/Transforms/InstCombine/and-fcmp.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -instcombine -S | grep fcmp | count 3
+; RUN: opt < %s -instcombine -S | grep ret | grep 0
+
+define zeroext i8 @t1(float %x, float %y) nounwind {
+ %a = fcmp ueq float %x, %y
+ %b = fcmp ord float %x, %y
+ %c = and i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t2(float %x, float %y) nounwind {
+ %a = fcmp olt float %x, %y
+ %b = fcmp ord float %x, %y
+ %c = and i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t3(float %x, float %y) nounwind {
+ %a = fcmp oge float %x, %y
+ %b = fcmp uno float %x, %y
+ %c = and i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t4(float %x, float %y) nounwind {
+ %a = fcmp one float %y, %x
+ %b = fcmp ord float %x, %y
+ %c = and i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
diff --git a/test/Transforms/InstCombine/and-not-or.ll b/test/Transforms/InstCombine/and-not-or.ll
new file mode 100644
index 0000000..9dce7b4
--- /dev/null
+++ b/test/Transforms/InstCombine/and-not-or.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -instcombine -S | grep {and i32 %x, %y} | count 4
+; RUN: opt < %s -instcombine -S | not grep {or}
+
+define i32 @func1(i32 %x, i32 %y) nounwind {
+entry:
+ %n = xor i32 %y, -1
+ %o = or i32 %n, %x
+ %a = and i32 %o, %y
+ ret i32 %a
+}
+
+define i32 @func2(i32 %x, i32 %y) nounwind {
+entry:
+ %n = xor i32 %y, -1
+ %o = or i32 %x, %n
+ %a = and i32 %o, %y
+ ret i32 %a
+}
+
+define i32 @func3(i32 %x, i32 %y) nounwind {
+entry:
+ %n = xor i32 %y, -1
+ %o = or i32 %n, %x
+ %a = and i32 %y, %o
+ ret i32 %a
+}
+
+define i32 @func4(i32 %x, i32 %y) nounwind {
+entry:
+ %n = xor i32 %y, -1
+ %o = or i32 %x, %n
+ %a = and i32 %y, %o
+ ret i32 %a
+}
diff --git a/test/Transforms/InstCombine/and-or-and.ll b/test/Transforms/InstCombine/and-or-and.ll
new file mode 100644
index 0000000..216cd46
--- /dev/null
+++ b/test/Transforms/InstCombine/and-or-and.ll
@@ -0,0 +1,61 @@
+; If we have an 'and' of the result of an 'or', and one of the 'or' operands
+; cannot have contributed any of the resultant bits, delete the or. This
+; occurs for very common C/C++ code like this:
+;
+; struct foo { int A : 16; int B : 16; };
+; void test(struct foo *F, int X, int Y) {
+; F->A = X; F->B = Y;
+; }
+;
+; Which corresponds to test1.
+
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep {or }
+
+define i32 @test1(i32 %X, i32 %Y) {
+ %A = and i32 %X, 7 ; <i32> [#uses=1]
+ %B = and i32 %Y, 8 ; <i32> [#uses=1]
+ %C = or i32 %A, %B ; <i32> [#uses=1]
+ ;; This cannot include any bits from %Y!
+ %D = and i32 %C, 7 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test2(i32 %X, i8 %Y) {
+ %B = zext i8 %Y to i32 ; <i32> [#uses=1]
+ %C = or i32 %X, %B ; <i32> [#uses=1]
+ ;; This cannot include any bits from %Y!
+ %D = and i32 %C, 65536 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test3(i32 %X, i32 %Y) {
+ %B = shl i32 %Y, 1 ; <i32> [#uses=1]
+ %C = or i32 %X, %B ; <i32> [#uses=1]
+ ;; This cannot include any bits from %Y!
+ %D = and i32 %C, 1 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test4(i32 %X, i32 %Y) {
+ %B = lshr i32 %Y, 31 ; <i32> [#uses=1]
+ %C = or i32 %X, %B ; <i32> [#uses=1]
+ ;; This cannot include any bits from %Y!
+ %D = and i32 %C, 2 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @or_test1(i32 %X, i32 %Y) {
+ %A = and i32 %X, 1 ; <i32> [#uses=1]
+ ;; This cannot include any bits from X!
+ %B = or i32 %A, 1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i8 @or_test2(i8 %X, i8 %Y) {
+ %A = shl i8 %X, 7 ; <i8> [#uses=1]
+ ;; This cannot include any bits from X!
+ %B = or i8 %A, -128 ; <i8> [#uses=1]
+ ret i8 %B
+}
+
diff --git a/test/Transforms/InstCombine/and-or-not.ll b/test/Transforms/InstCombine/and-or-not.ll
new file mode 100644
index 0000000..37ec3bc
--- /dev/null
+++ b/test/Transforms/InstCombine/and-or-not.ll
@@ -0,0 +1,46 @@
+; RUN: opt < %s -instcombine -S | grep xor | count 4
+; RUN: opt < %s -instcombine -S | not grep and
+; RUN: opt < %s -instcombine -S | not grep { or}
+
+; PR1510
+
+; These are all equivelent to A^B
+
+define i32 @test1(i32 %a, i32 %b) {
+entry:
+ %tmp3 = or i32 %b, %a ; <i32> [#uses=1]
+ %tmp3not = xor i32 %tmp3, -1 ; <i32> [#uses=1]
+ %tmp6 = and i32 %b, %a ; <i32> [#uses=1]
+ %tmp7 = or i32 %tmp6, %tmp3not ; <i32> [#uses=1]
+ %tmp7not = xor i32 %tmp7, -1 ; <i32> [#uses=1]
+ ret i32 %tmp7not
+}
+
+define i32 @test2(i32 %a, i32 %b) {
+entry:
+ %tmp3 = or i32 %b, %a ; <i32> [#uses=1]
+ %tmp6 = and i32 %b, %a ; <i32> [#uses=1]
+ %tmp6not = xor i32 %tmp6, -1 ; <i32> [#uses=1]
+ %tmp7 = and i32 %tmp3, %tmp6not ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
+
+define <4 x i32> @test3(<4 x i32> %a, <4 x i32> %b) {
+entry:
+ %tmp3 = or <4 x i32> %a, %b ; <<4 x i32>> [#uses=1]
+ %tmp3not = xor <4 x i32> %tmp3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %tmp6 = and <4 x i32> %a, %b ; <<4 x i32>> [#uses=1]
+ %tmp7 = or <4 x i32> %tmp6, %tmp3not ; <<4 x i32>> [#uses=1]
+ %tmp7not = xor <4 x i32> %tmp7, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp7not
+}
+
+define <4 x i32> @test4(<4 x i32> %a, <4 x i32> %b) {
+entry:
+ %tmp3 = or <4 x i32> %a, %b ; <<4 x i32>> [#uses=1]
+ %tmp6 = and <4 x i32> %a, %b ; <<4 x i32>> [#uses=1]
+ %tmp6not = xor <4 x i32> %tmp6, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
+ %tmp7 = and <4 x i32> %tmp3, %tmp6not ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp7
+}
+
diff --git a/test/Transforms/InstCombine/and-or.ll b/test/Transforms/InstCombine/and-or.ll
new file mode 100644
index 0000000..b4224b3
--- /dev/null
+++ b/test/Transforms/InstCombine/and-or.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -instcombine -S | grep {and i32 %a, 1} | count 4
+; RUN: opt < %s -instcombine -S | grep {or i32 %0, %b} | count 4
+
+
+define i32 @func1(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %0 = or i32 %b, %a ; <i32> [#uses=1]
+ %1 = and i32 %0, 1 ; <i32> [#uses=1]
+ %2 = and i32 %b, -2 ; <i32> [#uses=1]
+ %3 = or i32 %1, %2 ; <i32> [#uses=1]
+ ret i32 %3
+}
+
+define i32 @func2(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %0 = or i32 %a, %b ; <i32> [#uses=1]
+ %1 = and i32 1, %0 ; <i32> [#uses=1]
+ %2 = and i32 -2, %b ; <i32> [#uses=1]
+ %3 = or i32 %1, %2 ; <i32> [#uses=1]
+ ret i32 %3
+}
+
+define i32 @func3(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %0 = or i32 %b, %a ; <i32> [#uses=1]
+ %1 = and i32 %0, 1 ; <i32> [#uses=1]
+ %2 = and i32 %b, -2 ; <i32> [#uses=1]
+ %3 = or i32 %2, %1 ; <i32> [#uses=1]
+ ret i32 %3
+}
+
+define i32 @func4(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %0 = or i32 %a, %b ; <i32> [#uses=1]
+ %1 = and i32 1, %0 ; <i32> [#uses=1]
+ %2 = and i32 -2, %b ; <i32> [#uses=1]
+ %3 = or i32 %2, %1 ; <i32> [#uses=1]
+ ret i32 %3
+}
diff --git a/test/Transforms/InstCombine/and-xor-merge.ll b/test/Transforms/InstCombine/and-xor-merge.ll
new file mode 100644
index 0000000..e432a9a
--- /dev/null
+++ b/test/Transforms/InstCombine/and-xor-merge.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -instcombine -S | grep and | count 1
+; RUN: opt < %s -instcombine -S | grep xor | count 2
+
+; (x&z) ^ (y&z) -> (x^y)&z
+define i32 @test1(i32 %x, i32 %y, i32 %z) {
+ %tmp3 = and i32 %z, %x
+ %tmp6 = and i32 %z, %y
+ %tmp7 = xor i32 %tmp3, %tmp6
+ ret i32 %tmp7
+}
+
+; (x & y) ^ (x|y) -> x^y
+define i32 @test2(i32 %x, i32 %y, i32 %z) {
+ %tmp3 = and i32 %y, %x
+ %tmp6 = or i32 %y, %x
+ %tmp7 = xor i32 %tmp3, %tmp6
+ ret i32 %tmp7
+}
+
diff --git a/test/Transforms/InstCombine/and.ll b/test/Transforms/InstCombine/and.ll
new file mode 100644
index 0000000..8492df9
--- /dev/null
+++ b/test/Transforms/InstCombine/and.ll
@@ -0,0 +1,255 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+
+; RUN: opt < %s -instcombine -S | not grep and
+
+define i32 @test1(i32 %A) {
+ ; zero result
+ %B = and i32 %A, 0 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test2(i32 %A) {
+ ; noop
+ %B = and i32 %A, -1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i1 @test3(i1 %A) {
+ ; always = false
+ %B = and i1 %A, false ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test4(i1 %A) {
+ ; noop
+ %B = and i1 %A, true ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i32 @test5(i32 %A) {
+ %B = and i32 %A, %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i1 @test6(i1 %A) {
+ %B = and i1 %A, %A ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+; A & ~A == 0
+define i32 @test7(i32 %A) {
+ %NotA = xor i32 %A, -1 ; <i32> [#uses=1]
+ %B = and i32 %A, %NotA ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+; AND associates
+define i8 @test8(i8 %A) {
+ %B = and i8 %A, 3 ; <i8> [#uses=1]
+ %C = and i8 %B, 4 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i1 @test9(i32 %A) {
+ ; Test of sign bit, convert to setle %A, 0
+ %B = and i32 %A, -2147483648 ; <i32> [#uses=1]
+ %C = icmp ne i32 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test9a(i32 %A) {
+ ; Test of sign bit, convert to setle %A, 0
+ %B = and i32 %A, -2147483648 ; <i32> [#uses=1]
+ %C = icmp ne i32 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i32 @test10(i32 %A) {
+ %B = and i32 %A, 12 ; <i32> [#uses=1]
+ %C = xor i32 %B, 15 ; <i32> [#uses=1]
+ ; (X ^ C1) & C2 --> (X & C2) ^ (C1&C2)
+ %D = and i32 %C, 1 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test11(i32 %A, i32* %P) {
+ %B = or i32 %A, 3 ; <i32> [#uses=1]
+ %C = xor i32 %B, 12 ; <i32> [#uses=2]
+ ; additional use of C
+ store i32 %C, i32* %P
+ ; %C = and uint %B, 3 --> 3
+ %D = and i32 %C, 3 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i1 @test12(i32 %A, i32 %B) {
+ %C1 = icmp ult i32 %A, %B ; <i1> [#uses=1]
+ %C2 = icmp ule i32 %A, %B ; <i1> [#uses=1]
+ ; (A < B) & (A <= B) === (A < B)
+ %D = and i1 %C1, %C2 ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i1 @test13(i32 %A, i32 %B) {
+ %C1 = icmp ult i32 %A, %B ; <i1> [#uses=1]
+ %C2 = icmp ugt i32 %A, %B ; <i1> [#uses=1]
+ ; (A < B) & (A > B) === false
+ %D = and i1 %C1, %C2 ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i1 @test14(i8 %A) {
+ %B = and i8 %A, -128 ; <i8> [#uses=1]
+ %C = icmp ne i8 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i8 @test15(i8 %A) {
+ %B = lshr i8 %A, 7 ; <i8> [#uses=1]
+ ; Always equals zero
+ %C = and i8 %B, 2 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @test16(i8 %A) {
+ %B = shl i8 %A, 2 ; <i8> [#uses=1]
+ %C = and i8 %B, 3 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+;; ~(~X & Y) --> (X | ~Y)
+define i8 @test17(i8 %X, i8 %Y) {
+ %B = xor i8 %X, -1 ; <i8> [#uses=1]
+ %C = and i8 %B, %Y ; <i8> [#uses=1]
+ %D = xor i8 %C, -1 ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i1 @test18(i32 %A) {
+ %B = and i32 %A, -128 ; <i32> [#uses=1]
+ ;; C >= 128
+ %C = icmp ne i32 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test18a(i8 %A) {
+ %B = and i8 %A, -2 ; <i8> [#uses=1]
+ %C = icmp eq i8 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i32 @test19(i32 %A) {
+ %B = shl i32 %A, 3 ; <i32> [#uses=1]
+ ;; Clearing a zero bit
+ %C = and i32 %B, -2 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i8 @test20(i8 %A) {
+ %C = lshr i8 %A, 7 ; <i8> [#uses=1]
+ ;; Unneeded
+ %D = and i8 %C, 1 ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i1 @test22(i32 %A) {
+ %B = icmp eq i32 %A, 1 ; <i1> [#uses=1]
+ %C = icmp sge i32 %A, 3 ; <i1> [#uses=1]
+ ;; false
+ %D = and i1 %B, %C ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i1 @test23(i32 %A) {
+ %B = icmp sgt i32 %A, 1 ; <i1> [#uses=1]
+ %C = icmp sle i32 %A, 2 ; <i1> [#uses=1]
+ ;; A == 2
+ %D = and i1 %B, %C ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i1 @test24(i32 %A) {
+ %B = icmp sgt i32 %A, 1 ; <i1> [#uses=1]
+ %C = icmp ne i32 %A, 2 ; <i1> [#uses=1]
+ ;; A > 2
+ %D = and i1 %B, %C ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i1 @test25(i32 %A) {
+ %B = icmp sge i32 %A, 50 ; <i1> [#uses=1]
+ %C = icmp slt i32 %A, 100 ; <i1> [#uses=1]
+ ;; (A-50) <u 50
+ %D = and i1 %B, %C ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i1 @test26(i32 %A) {
+ %B = icmp ne i32 %A, 50 ; <i1> [#uses=1]
+ %C = icmp ne i32 %A, 51 ; <i1> [#uses=1]
+ ;; (A-50) > 1
+ %D = and i1 %B, %C ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i8 @test27(i8 %A) {
+ %B = and i8 %A, 4 ; <i8> [#uses=1]
+ %C = sub i8 %B, 16 ; <i8> [#uses=1]
+ ;; 0xF0
+ %D = and i8 %C, -16 ; <i8> [#uses=1]
+ %E = add i8 %D, 16 ; <i8> [#uses=1]
+ ret i8 %E
+}
+
+;; This is juse a zero extending shr.
+define i32 @test28(i32 %X) {
+ ;; Sign extend
+ %Y = ashr i32 %X, 24 ; <i32> [#uses=1]
+ ;; Mask out sign bits
+ %Z = and i32 %Y, 255 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test29(i8 %X) {
+ %Y = zext i8 %X to i32 ; <i32> [#uses=1]
+ ;; Zero extend makes this unneeded.
+ %Z = and i32 %Y, 255 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test30(i1 %X) {
+ %Y = zext i1 %X to i32 ; <i32> [#uses=1]
+ %Z = and i32 %Y, 1 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test31(i1 %X) {
+ %Y = zext i1 %X to i32 ; <i32> [#uses=1]
+ %Z = shl i32 %Y, 4 ; <i32> [#uses=1]
+ %A = and i32 %Z, 16 ; <i32> [#uses=1]
+ ret i32 %A
+}
+
+define i32 @test32(i32 %In) {
+ %Y = and i32 %In, 16 ; <i32> [#uses=1]
+ %Z = lshr i32 %Y, 2 ; <i32> [#uses=1]
+ %A = and i32 %Z, 1 ; <i32> [#uses=1]
+ ret i32 %A
+}
+
+;; Code corresponding to one-bit bitfield ^1.
+define i32 @test33(i32 %b) {
+ %tmp.4.mask = and i32 %b, 1 ; <i32> [#uses=1]
+ %tmp.10 = xor i32 %tmp.4.mask, 1 ; <i32> [#uses=1]
+ %tmp.12 = and i32 %b, -2 ; <i32> [#uses=1]
+ %tmp.13 = or i32 %tmp.12, %tmp.10 ; <i32> [#uses=1]
+ ret i32 %tmp.13
+}
+
+define i32 @test34(i32 %A, i32 %B) {
+ %tmp.2 = or i32 %B, %A ; <i32> [#uses=1]
+ %tmp.4 = and i32 %tmp.2, %B ; <i32> [#uses=1]
+ ret i32 %tmp.4
+}
+
diff --git a/test/Transforms/InstCombine/and2.ll b/test/Transforms/InstCombine/and2.ll
new file mode 100644
index 0000000..0af9bfa
--- /dev/null
+++ b/test/Transforms/InstCombine/and2.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | not grep and
+
+
+; PR1738
+define i1 @test1(double %X, double %Y) {
+ %tmp9 = fcmp ord double %X, 0.000000e+00
+ %tmp13 = fcmp ord double %Y, 0.000000e+00
+ %bothcond = and i1 %tmp13, %tmp9
+ ret i1 %bothcond
+}
+
+
diff --git a/test/Transforms/InstCombine/apint-add1.ll b/test/Transforms/InstCombine/apint-add1.ll
new file mode 100644
index 0000000..02f1baf
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-add1.ll
@@ -0,0 +1,34 @@
+; This test makes sure that add instructions are properly eliminated.
+; This test is for Integer BitWidth <= 64 && BitWidth % 8 != 0.
+
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep -v OK | not grep add
+
+
+define i1 @test1(i1 %x) {
+ %tmp.2 = xor i1 %x, 1
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i1 %tmp.2, 1
+ ret i1 %tmp.4
+}
+
+define i47 @test2(i47 %x) {
+ %tmp.2 = xor i47 %x, 70368744177664
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i47 %tmp.2, 70368744177664
+ ret i47 %tmp.4
+}
+
+define i15 @test3(i15 %x) {
+ %tmp.2 = xor i15 %x, 16384
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i15 %tmp.2, 16384
+ ret i15 %tmp.4
+}
+
+define i49 @test6(i49 %x) {
+ ;; (x & 254)+1 -> (x & 254)|1
+ %tmp.2 = and i49 %x, 562949953421310
+ %tmp.4 = add i49 %tmp.2, 1
+ ret i49 %tmp.4
+}
diff --git a/test/Transforms/InstCombine/apint-add2.ll b/test/Transforms/InstCombine/apint-add2.ll
new file mode 100644
index 0000000..913a70f
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-add2.ll
@@ -0,0 +1,46 @@
+; This test makes sure that add instructions are properly eliminated.
+; This test is for Integer BitWidth > 64 && BitWidth <= 1024.
+
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep -v OK | not grep add
+; END.
+
+define i111 @test1(i111 %x) {
+ %tmp.2 = shl i111 1, 110
+ %tmp.4 = xor i111 %x, %tmp.2
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.6 = add i111 %tmp.4, %tmp.2
+ ret i111 %tmp.6
+}
+
+define i65 @test2(i65 %x) {
+ %tmp.0 = shl i65 1, 64
+ %tmp.2 = xor i65 %x, %tmp.0
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i65 %tmp.2, %tmp.0
+ ret i65 %tmp.4
+}
+
+define i1024 @test3(i1024 %x) {
+ %tmp.0 = shl i1024 1, 1023
+ %tmp.2 = xor i1024 %x, %tmp.0
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i1024 %tmp.2, %tmp.0
+ ret i1024 %tmp.4
+}
+
+define i128 @test4(i128 %x) {
+ ;; If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext.
+ %tmp.5 = shl i128 1, 127
+ %tmp.1 = ashr i128 %tmp.5, 120
+ %tmp.2 = xor i128 %x, %tmp.1
+ %tmp.4 = add i128 %tmp.2, %tmp.5
+ ret i128 %tmp.4
+}
+
+define i77 @test6(i77 %x) {
+ ;; (x & 254)+1 -> (x & 254)|1
+ %tmp.2 = and i77 %x, 562949953421310
+ %tmp.4 = add i77 %tmp.2, 1
+ ret i77 %tmp.4
+}
diff --git a/test/Transforms/InstCombine/apint-and-compare.ll b/test/Transforms/InstCombine/apint-and-compare.ll
new file mode 100644
index 0000000..53e591e
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-and-compare.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -S | grep and | count 2
+
+; Should be optimized to one and.
+define i1 @test1(i33 %a, i33 %b) {
+ %tmp1 = and i33 %a, 65280
+ %tmp3 = and i33 %b, 65280
+ %tmp = icmp ne i33 %tmp1, %tmp3
+ ret i1 %tmp
+}
+
+define i1 @test2(i999 %a, i999 %b) {
+ %tmp1 = and i999 %a, 65280
+ %tmp3 = and i999 %b, 65280
+ %tmp = icmp ne i999 %tmp1, %tmp3
+ ret i1 %tmp
+}
diff --git a/test/Transforms/InstCombine/apint-and-or-and.ll b/test/Transforms/InstCombine/apint-and-or-and.ll
new file mode 100644
index 0000000..17d29b6
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-and-or-and.ll
@@ -0,0 +1,50 @@
+; If we have an 'and' of the result of an 'or', and one of the 'or' operands
+; cannot have contributed any of the resultant bits, delete the or. This
+; occurs for very common C/C++ code like this:
+;
+; struct foo { int A : 16; int B : 16; };
+; void test(struct foo *F, int X, int Y) {
+; F->A = X; F->B = Y;
+; }
+;
+; Which corresponds to test1.
+;
+; This tests arbitrary precision integers.
+
+; RUN: opt < %s -instcombine -S | not grep {or }
+; END.
+
+define i17 @test1(i17 %X, i17 %Y) {
+ %A = and i17 %X, 7
+ %B = and i17 %Y, 8
+ %C = or i17 %A, %B
+ %D = and i17 %C, 7 ;; This cannot include any bits from %Y!
+ ret i17 %D
+}
+
+define i49 @test3(i49 %X, i49 %Y) {
+ %B = shl i49 %Y, 1
+ %C = or i49 %X, %B
+ %D = and i49 %C, 1 ;; This cannot include any bits from %Y!
+ ret i49 %D
+}
+
+define i67 @test4(i67 %X, i67 %Y) {
+ %B = lshr i67 %Y, 66
+ %C = or i67 %X, %B
+ %D = and i67 %C, 2 ;; This cannot include any bits from %Y!
+ ret i67 %D
+}
+
+define i231 @or_test1(i231 %X, i231 %Y) {
+ %A = and i231 %X, 1
+ %B = or i231 %A, 1 ;; This cannot include any bits from X!
+ ret i231 %B
+}
+
+define i7 @or_test2(i7 %X, i7 %Y) {
+ %A = shl i7 %X, 6
+ %B = or i7 %A, 64 ;; This cannot include any bits from X!
+ ret i7 %B
+}
+
diff --git a/test/Transforms/InstCombine/apint-and-xor-merge.ll b/test/Transforms/InstCombine/apint-and-xor-merge.ll
new file mode 100644
index 0000000..8adffde
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-and-xor-merge.ll
@@ -0,0 +1,22 @@
+; This test case checks that the merge of and/xor can work on arbitrary
+; precision integers.
+
+; RUN: opt < %s -instcombine -S | grep and | count 1
+; RUN: opt < %s -instcombine -S | grep xor | count 2
+
+; (x &z ) ^ (y & z) -> (x ^ y) & z
+define i57 @test1(i57 %x, i57 %y, i57 %z) {
+ %tmp3 = and i57 %z, %x
+ %tmp6 = and i57 %z, %y
+ %tmp7 = xor i57 %tmp3, %tmp6
+ ret i57 %tmp7
+}
+
+; (x & y) ^ (x | y) -> x ^ y
+define i23 @test2(i23 %x, i23 %y, i23 %z) {
+ %tmp3 = and i23 %y, %x
+ %tmp6 = or i23 %y, %x
+ %tmp7 = xor i23 %tmp3, %tmp6
+ ret i23 %tmp7
+}
+
diff --git a/test/Transforms/InstCombine/apint-and1.ll b/test/Transforms/InstCombine/apint-and1.ll
new file mode 100644
index 0000000..cd4cbb9
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-and1.ll
@@ -0,0 +1,57 @@
+; This test makes sure that and instructions are properly eliminated.
+; This test is for Integer BitWidth <= 64 && BitWidth % 8 != 0.
+
+; RUN: opt < %s -instcombine -S | not grep {and }
+; END.
+
+define i39 @test0(i39 %A) {
+ %B = and i39 %A, 0 ; zero result
+ ret i39 %B
+}
+
+define i47 @test1(i47 %A, i47 %B) {
+ ;; (~A & ~B) == (~(A | B)) - De Morgan's Law
+ %NotA = xor i47 %A, -1
+ %NotB = xor i47 %B, -1
+ %C1 = and i47 %NotA, %NotB
+ ret i47 %C1
+}
+
+define i15 @test2(i15 %x) {
+ %tmp.2 = and i15 %x, -1 ; noop
+ ret i15 %tmp.2
+}
+
+define i23 @test3(i23 %x) {
+ %tmp.0 = and i23 %x, 127
+ %tmp.2 = and i23 %tmp.0, 128
+ ret i23 %tmp.2
+}
+
+define i1 @test4(i37 %x) {
+ %A = and i37 %x, -2147483648
+ %B = icmp ne i37 %A, 0
+ ret i1 %B
+}
+
+define i7 @test5(i7 %A, i7* %P) {
+ %B = or i7 %A, 3
+ %C = xor i7 %B, 12
+ store i7 %C, i7* %P
+ %r = and i7 %C, 3
+ ret i7 %r
+}
+
+define i7 @test6(i7 %A, i7 %B) {
+ ;; ~(~X & Y) --> (X | ~Y)
+ %t0 = xor i7 %A, -1
+ %t1 = and i7 %t0, %B
+ %r = xor i7 %t1, -1
+ ret i7 %r
+}
+
+define i47 @test7(i47 %A) {
+ %X = ashr i47 %A, 39 ;; sign extend
+ %C1 = and i47 %X, 255
+ ret i47 %C1
+}
diff --git a/test/Transforms/InstCombine/apint-and2.ll b/test/Transforms/InstCombine/apint-and2.ll
new file mode 100644
index 0000000..ae74472
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-and2.ll
@@ -0,0 +1,82 @@
+; This test makes sure that and instructions are properly eliminated.
+; This test is for Integer BitWidth > 64 && BitWidth <= 1024.
+
+; RUN: opt < %s -instcombine -S | not grep {and }
+; END.
+
+
+define i999 @test0(i999 %A) {
+ %B = and i999 %A, 0 ; zero result
+ ret i999 %B
+}
+
+define i477 @test1(i477 %A, i477 %B) {
+ ;; (~A & ~B) == (~(A | B)) - De Morgan's Law
+ %NotA = xor i477 %A, -1
+ %NotB = xor i477 %B, -1
+ %C1 = and i477 %NotA, %NotB
+ ret i477 %C1
+}
+
+define i129 @tst(i129 %A, i129 %B) {
+ ;; (~A & ~B) == (~(A | B)) - De Morgan's Law
+ %NotA = xor i129 %A, -1
+ %NotB = xor i129 %B, -1
+ %C1 = and i129 %NotA, %NotB
+ ret i129 %C1
+}
+
+define i65 @test(i65 %A, i65 %B) {
+ ;; (~A & ~B) == (~(A | B)) - De Morgan's Law
+ %NotA = xor i65 %A, -1
+ %NotB = xor i65 -1, %B
+ %C1 = and i65 %NotA, %NotB
+ ret i65 %C1
+}
+
+define i66 @tes(i66 %A, i66 %B) {
+ ;; (~A & ~B) == (~(A | B)) - De Morgan's Law
+ %NotA = xor i66 %A, -1
+ %NotB = xor i66 %B, -1
+ %C1 = and i66 %NotA, %NotB
+ ret i66 %C1
+}
+
+define i1005 @test2(i1005 %x) {
+ %tmp.2 = and i1005 %x, -1 ; noop
+ ret i1005 %tmp.2
+}
+
+define i123 @test3(i123 %x) {
+ %tmp.0 = and i123 %x, 127
+ %tmp.2 = and i123 %tmp.0, 128
+ ret i123 %tmp.2
+}
+
+define i1 @test4(i737 %x) {
+ %A = and i737 %x, -2147483648
+ %B = icmp ne i737 %A, 0
+ ret i1 %B
+}
+
+define i117 @test5(i117 %A, i117* %P) {
+ %B = or i117 %A, 3
+ %C = xor i117 %B, 12
+ store i117 %C, i117* %P
+ %r = and i117 %C, 3
+ ret i117 %r
+}
+
+define i117 @test6(i117 %A, i117 %B) {
+ ;; ~(~X & Y) --> (X | ~Y)
+ %t0 = xor i117 %A, -1
+ %t1 = and i117 %t0, %B
+ %r = xor i117 %t1, -1
+ ret i117 %r
+}
+
+define i1024 @test7(i1024 %A) {
+ %X = ashr i1024 %A, 1016 ;; sign extend
+ %C1 = and i1024 %X, 255
+ ret i1024 %C1
+}
diff --git a/test/Transforms/InstCombine/apint-call-cast-target.ll b/test/Transforms/InstCombine/apint-call-cast-target.ll
new file mode 100644
index 0000000..fe336de
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-call-cast-target.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -instcombine -S | grep call | not grep bitcast
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+
+
+define i32 @main() {
+entry:
+ %tmp = call i32 bitcast (i7* (i999*)* @ctime to i32 (i99*)*)( i99* null )
+ ret i32 %tmp
+}
+
+define i7* @ctime(i999*) {
+entry:
+ %tmp = call i7* bitcast (i32 ()* @main to i7* ()*)( )
+ ret i7* %tmp
+}
diff --git a/test/Transforms/InstCombine/apint-cast-and-cast.ll b/test/Transforms/InstCombine/apint-cast-and-cast.ll
new file mode 100644
index 0000000..251d78f
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-cast-and-cast.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -instcombine -S | not grep bitcast
+
+define i19 @test1(i43 %val) {
+ %t1 = bitcast i43 %val to i43
+ %t2 = and i43 %t1, 1
+ %t3 = trunc i43 %t2 to i19
+ ret i19 %t3
+}
+
+define i73 @test2(i677 %val) {
+ %t1 = bitcast i677 %val to i677
+ %t2 = and i677 %t1, 1
+ %t3 = trunc i677 %t2 to i73
+ ret i73 %t3
+}
diff --git a/test/Transforms/InstCombine/apint-cast-cast-to-and.ll b/test/Transforms/InstCombine/apint-cast-cast-to-and.ll
new file mode 100644
index 0000000..b2069a9
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-cast-cast-to-and.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | not grep i41
+
+define i61 @test1(i61 %X) {
+ %Y = trunc i61 %X to i41 ;; Turn i61o an AND
+ %Z = zext i41 %Y to i61
+ ret i61 %Z
+}
+
diff --git a/test/Transforms/InstCombine/apint-cast.ll b/test/Transforms/InstCombine/apint-cast.ll
new file mode 100644
index 0000000..85e7a4f
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-cast.ll
@@ -0,0 +1,30 @@
+; Tests to make sure elimination of casts is working correctly
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define i17 @test1(i17 %a) {
+ %tmp = zext i17 %a to i37 ; <i37> [#uses=2]
+ %tmp21 = lshr i37 %tmp, 8 ; <i37> [#uses=1]
+; CHECK: %tmp21 = lshr i17 %a, 8
+ %tmp5 = shl i37 %tmp, 8 ; <i37> [#uses=1]
+; CHECK: %tmp5 = shl i17 %a, 8
+ %tmp.upgrd.32 = or i37 %tmp21, %tmp5 ; <i37> [#uses=1]
+; CHECK: %tmp.upgrd.32 = or i17 %tmp21, %tmp5
+ %tmp.upgrd.3 = trunc i37 %tmp.upgrd.32 to i17 ; <i17> [#uses=1]
+ ret i17 %tmp.upgrd.3
+; CHECK: ret i17 %tmp.upgrd.32
+}
+
+define i167 @test2(i167 %a) {
+ %tmp = zext i167 %a to i577 ; <i577> [#uses=2]
+ %tmp21 = lshr i577 %tmp, 9 ; <i577> [#uses=1]
+; CHECK: %tmp21 = lshr i167 %a, 9
+ %tmp5 = shl i577 %tmp, 8 ; <i577> [#uses=1]
+; CHECK: %tmp5 = shl i167 %a, 8
+ %tmp.upgrd.32 = or i577 %tmp21, %tmp5 ; <i577> [#uses=1]
+; CHECK: %tmp.upgrd.32 = or i167 %tmp21, %tmp5
+ %tmp.upgrd.3 = trunc i577 %tmp.upgrd.32 to i167 ; <i167> [#uses=1]
+ ret i167 %tmp.upgrd.3
+; CHECK: ret i167 %tmp.upgrd.32
+}
diff --git a/test/Transforms/InstCombine/apint-div1.ll b/test/Transforms/InstCombine/apint-div1.ll
new file mode 100644
index 0000000..68aadac
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-div1.ll
@@ -0,0 +1,22 @@
+; This test makes sure that div instructions are properly eliminated.
+; This test is for Integer BitWidth < 64 && BitWidth % 2 != 0.
+;
+; RUN: opt < %s -instcombine -S | not grep div
+
+
+define i33 @test1(i33 %X) {
+ %Y = udiv i33 %X, 4096
+ ret i33 %Y
+}
+
+define i49 @test2(i49 %X) {
+ %tmp.0 = shl i49 4096, 17
+ %Y = udiv i49 %X, %tmp.0
+ ret i49 %Y
+}
+
+define i59 @test3(i59 %X, i1 %C) {
+ %V = select i1 %C, i59 1024, i59 4096
+ %R = udiv i59 %X, %V
+ ret i59 %R
+}
diff --git a/test/Transforms/InstCombine/apint-div2.ll b/test/Transforms/InstCombine/apint-div2.ll
new file mode 100644
index 0000000..2d7ac78
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-div2.ll
@@ -0,0 +1,22 @@
+; This test makes sure that div instructions are properly eliminated.
+; This test is for Integer BitWidth >= 64 && BitWidth <= 1024.
+;
+; RUN: opt < %s -instcombine -S | not grep div
+
+
+define i333 @test1(i333 %X) {
+ %Y = udiv i333 %X, 70368744177664
+ ret i333 %Y
+}
+
+define i499 @test2(i499 %X) {
+ %tmp.0 = shl i499 4096, 197
+ %Y = udiv i499 %X, %tmp.0
+ ret i499 %Y
+}
+
+define i599 @test3(i599 %X, i1 %C) {
+ %V = select i1 %C, i599 70368744177664, i599 4096
+ %R = udiv i599 %X, %V
+ ret i599 %R
+}
diff --git a/test/Transforms/InstCombine/apint-mul1.ll b/test/Transforms/InstCombine/apint-mul1.ll
new file mode 100644
index 0000000..6a5b3e7
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-mul1.ll
@@ -0,0 +1,11 @@
+; This test makes sure that mul instructions are properly eliminated.
+; This test is for Integer BitWidth < 64 && BitWidth % 2 != 0.
+;
+
+; RUN: opt < %s -instcombine -S | not grep mul
+
+
+define i17 @test1(i17 %X) {
+ %Y = mul i17 %X, 1024
+ ret i17 %Y
+}
diff --git a/test/Transforms/InstCombine/apint-mul2.ll b/test/Transforms/InstCombine/apint-mul2.ll
new file mode 100644
index 0000000..558d2fb
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-mul2.ll
@@ -0,0 +1,12 @@
+; This test makes sure that mul instructions are properly eliminated.
+; This test is for Integer BitWidth >= 64 && BitWidth % 2 >= 1024.
+;
+
+; RUN: opt < %s -instcombine -S | not grep mul
+
+
+define i177 @test1(i177 %X) {
+ %C = shl i177 1, 155
+ %Y = mul i177 %X, %C
+ ret i177 %Y
+}
diff --git a/test/Transforms/InstCombine/apint-not.ll b/test/Transforms/InstCombine/apint-not.ll
new file mode 100644
index 0000000..488b7f2
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-not.ll
@@ -0,0 +1,42 @@
+; This test makes sure that the xor instructions are properly eliminated
+; when arbitrary precision integers are used.
+
+; RUN: opt < %s -instcombine -S | not grep xor
+
+define i33 @test1(i33 %A) {
+ %B = xor i33 %A, -1
+ %C = xor i33 %B, -1
+ ret i33 %C
+}
+
+define i1 @test2(i52 %A, i52 %B) {
+ %cond = icmp ule i52 %A, %B ; Can change into uge
+ %Ret = xor i1 %cond, true
+ ret i1 %Ret
+}
+
+; Test that demorgans law can be instcombined
+define i47 @test3(i47 %A, i47 %B) {
+ %a = xor i47 %A, -1
+ %b = xor i47 %B, -1
+ %c = and i47 %a, %b
+ %d = xor i47 %c, -1
+ ret i47 %d
+}
+
+; Test that demorgens law can work with constants
+define i61 @test4(i61 %A, i61 %B) {
+ %a = xor i61 %A, -1
+ %c = and i61 %a, 5 ; 5 = ~c2
+ %d = xor i61 %c, -1
+ ret i61 %d
+}
+
+; test the mirror of demorgans law...
+define i71 @test5(i71 %A, i71 %B) {
+ %a = xor i71 %A, -1
+ %b = xor i71 %B, -1
+ %c = or i71 %a, %b
+ %d = xor i71 %c, -1
+ ret i71 %d
+}
diff --git a/test/Transforms/InstCombine/apint-or1.ll b/test/Transforms/InstCombine/apint-or1.ll
new file mode 100644
index 0000000..d4f87ac
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-or1.ll
@@ -0,0 +1,36 @@
+; This test makes sure that or instructions are properly eliminated.
+; This test is for Integer BitWidth <= 64 && BitWidth % 2 != 0.
+;
+
+; RUN: opt < %s -instcombine -S | not grep or
+
+
+define i7 @test0(i7 %X) {
+ %Y = or i7 %X, 0
+ ret i7 %Y
+}
+
+define i17 @test1(i17 %X) {
+ %Y = or i17 %X, -1
+ ret i17 %Y
+}
+
+define i23 @test2(i23 %A) {
+ ;; A | ~A == -1
+ %NotA = xor i23 -1, %A
+ %B = or i23 %A, %NotA
+ ret i23 %B
+}
+
+define i39 @test3(i39 %V, i39 %M) {
+ ;; If we have: ((V + N) & C1) | (V & C2)
+ ;; .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0
+ ;; replace with V+N.
+ %C1 = xor i39 274877906943, -1 ;; C2 = 274877906943
+ %N = and i39 %M, 274877906944
+ %A = add i39 %V, %N
+ %B = and i39 %A, %C1
+ %D = and i39 %V, 274877906943
+ %R = or i39 %B, %D
+ ret i39 %R
+}
diff --git a/test/Transforms/InstCombine/apint-or2.ll b/test/Transforms/InstCombine/apint-or2.ll
new file mode 100644
index 0000000..d7de255
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-or2.ll
@@ -0,0 +1,35 @@
+; This test makes sure that or instructions are properly eliminated.
+; This test is for Integer BitWidth > 64 && BitWidth <= 1024.
+;
+; RUN: opt < %s -instcombine -S | not grep or
+
+
+define i777 @test0(i777 %X) {
+ %Y = or i777 %X, 0
+ ret i777 %Y
+}
+
+define i117 @test1(i117 %X) {
+ %Y = or i117 %X, -1
+ ret i117 %Y
+}
+
+define i1023 @test2(i1023 %A) {
+ ;; A | ~A == -1
+ %NotA = xor i1023 -1, %A
+ %B = or i1023 %A, %NotA
+ ret i1023 %B
+}
+
+define i399 @test3(i399 %V, i399 %M) {
+ ;; If we have: ((V + N) & C1) | (V & C2)
+ ;; .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0
+ ;; replace with V+N.
+ %C1 = xor i399 274877906943, -1 ;; C2 = 274877906943
+ %N = and i399 %M, 18446742974197923840
+ %A = add i399 %V, %N
+ %B = and i399 %A, %C1
+ %D = and i399 %V, 274877906943
+ %R = or i399 %B, %D
+ ret i399 %R
+}
diff --git a/test/Transforms/InstCombine/apint-rem1.ll b/test/Transforms/InstCombine/apint-rem1.ll
new file mode 100644
index 0000000..030facc
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-rem1.ll
@@ -0,0 +1,22 @@
+; This test makes sure that these instructions are properly eliminated.
+; This test is for Integer BitWidth < 64 && BitWidth % 2 != 0.
+;
+; RUN: opt < %s -instcombine -S | not grep rem
+
+
+define i33 @test1(i33 %A) {
+ %B = urem i33 %A, 4096
+ ret i33 %B
+}
+
+define i49 @test2(i49 %A) {
+ %B = shl i49 4096, 11
+ %Y = urem i49 %A, %B
+ ret i49 %Y
+}
+
+define i59 @test3(i59 %X, i1 %C) {
+ %V = select i1 %C, i59 70368744177664, i59 4096
+ %R = urem i59 %X, %V
+ ret i59 %R
+}
diff --git a/test/Transforms/InstCombine/apint-rem2.ll b/test/Transforms/InstCombine/apint-rem2.ll
new file mode 100644
index 0000000..9bfc4cd
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-rem2.ll
@@ -0,0 +1,22 @@
+; This test makes sure that these instructions are properly eliminated.
+; This test is for Integer BitWidth >= 64 && BitWidth <= 1024.
+;
+; RUN: opt < %s -instcombine -S | not grep rem
+
+
+define i333 @test1(i333 %A) {
+ %B = urem i333 %A, 70368744177664
+ ret i333 %B
+}
+
+define i499 @test2(i499 %A) {
+ %B = shl i499 4096, 111
+ %Y = urem i499 %A, %B
+ ret i499 %Y
+}
+
+define i599 @test3(i599 %X, i1 %C) {
+ %V = select i1 %C, i599 70368744177664, i599 4096
+ %R = urem i599 %X, %V
+ ret i599 %R
+}
diff --git a/test/Transforms/InstCombine/apint-select.ll b/test/Transforms/InstCombine/apint-select.ll
new file mode 100644
index 0000000..f2ea601
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-select.ll
@@ -0,0 +1,44 @@
+; This test makes sure that these instructions are properly eliminated.
+
+; RUN: opt < %s -instcombine -S | not grep select
+
+
+define i41 @test1(i1 %C) {
+ %V = select i1 %C, i41 1, i41 0 ; V = C
+ ret i41 %V
+}
+
+define i999 @test2(i1 %C) {
+ %V = select i1 %C, i999 0, i999 1 ; V = C
+ ret i999 %V
+}
+
+define i41 @test3(i41 %X) {
+ ;; (x <s 0) ? -1 : 0 -> ashr x, 31
+ %t = icmp slt i41 %X, 0
+ %V = select i1 %t, i41 -1, i41 0
+ ret i41 %V
+}
+
+define i1023 @test4(i1023 %X) {
+ ;; (x <s 0) ? -1 : 0 -> ashr x, 31
+ %t = icmp slt i1023 %X, 0
+ %V = select i1 %t, i1023 -1, i1023 0
+ ret i1023 %V
+}
+
+define i41 @test5(i41 %X) {
+ ;; ((X & 27) ? 27 : 0)
+ %Y = and i41 %X, 32
+ %t = icmp ne i41 %Y, 0
+ %V = select i1 %t, i41 32, i41 0
+ ret i41 %V
+}
+
+define i1023 @test6(i1023 %X) {
+ ;; ((X & 27) ? 27 : 0)
+ %Y = and i1023 %X, 64
+ %t = icmp ne i1023 %Y, 0
+ %V = select i1 %t, i1023 64, i1023 0
+ ret i1023 %V
+}
diff --git a/test/Transforms/InstCombine/apint-shift-simplify.ll b/test/Transforms/InstCombine/apint-shift-simplify.ll
new file mode 100644
index 0000000..1a3340a
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-shift-simplify.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: egrep {shl|lshr|ashr} | count 3
+
+define i41 @test0(i41 %A, i41 %B, i41 %C) {
+ %X = shl i41 %A, %C
+ %Y = shl i41 %B, %C
+ %Z = and i41 %X, %Y
+ ret i41 %Z
+}
+
+define i57 @test1(i57 %A, i57 %B, i57 %C) {
+ %X = lshr i57 %A, %C
+ %Y = lshr i57 %B, %C
+ %Z = or i57 %X, %Y
+ ret i57 %Z
+}
+
+define i49 @test2(i49 %A, i49 %B, i49 %C) {
+ %X = ashr i49 %A, %C
+ %Y = ashr i49 %B, %C
+ %Z = xor i49 %X, %Y
+ ret i49 %Z
+}
diff --git a/test/Transforms/InstCombine/apint-shift.ll b/test/Transforms/InstCombine/apint-shift.ll
new file mode 100644
index 0000000..55243a6
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-shift.ll
@@ -0,0 +1,184 @@
+; This test makes sure that shit instructions are properly eliminated
+; even with arbitrary precision integers.
+; RUN: opt < %s -instcombine -S | not grep sh
+; END.
+
+define i47 @test1(i47 %A) {
+ %B = shl i47 %A, 0 ; <i47> [#uses=1]
+ ret i47 %B
+}
+
+define i41 @test2(i7 %X) {
+ %A = zext i7 %X to i41 ; <i41> [#uses=1]
+ %B = shl i41 0, %A ; <i41> [#uses=1]
+ ret i41 %B
+}
+
+define i41 @test3(i41 %A) {
+ %B = ashr i41 %A, 0 ; <i41> [#uses=1]
+ ret i41 %B
+}
+
+define i39 @test4(i7 %X) {
+ %A = zext i7 %X to i39 ; <i39> [#uses=1]
+ %B = ashr i39 0, %A ; <i39> [#uses=1]
+ ret i39 %B
+}
+
+define i55 @test5(i55 %A) {
+ %B = lshr i55 %A, 55 ; <i55> [#uses=1]
+ ret i55 %B
+}
+
+define i32 @test5a(i32 %A) {
+ %B = shl i32 %A, 32 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i55 @test6(i55 %A) {
+ %B = shl i55 %A, 1 ; <i55> [#uses=1]
+ %C = mul i55 %B, 3 ; <i55> [#uses=1]
+ ret i55 %C
+}
+
+define i29 @test7(i8 %X) {
+ %A = zext i8 %X to i29 ; <i29> [#uses=1]
+ %B = ashr i29 -1, %A ; <i29> [#uses=1]
+ ret i29 %B
+}
+
+define i7 @test8(i7 %A) {
+ %B = shl i7 %A, 4 ; <i7> [#uses=1]
+ %C = shl i7 %B, 3 ; <i7> [#uses=1]
+ ret i7 %C
+}
+
+define i17 @test9(i17 %A) {
+ %B = shl i17 %A, 16 ; <i17> [#uses=1]
+ %C = lshr i17 %B, 16 ; <i17> [#uses=1]
+ ret i17 %C
+}
+
+define i19 @test10(i19 %A) {
+ %B = lshr i19 %A, 18 ; <i19> [#uses=1]
+ %C = shl i19 %B, 18 ; <i19> [#uses=1]
+ ret i19 %C
+}
+
+define i23 @test11(i23 %A) {
+ %a = mul i23 %A, 3 ; <i23> [#uses=1]
+ %B = lshr i23 %a, 11 ; <i23> [#uses=1]
+ %C = shl i23 %B, 12 ; <i23> [#uses=1]
+ ret i23 %C
+}
+
+define i47 @test12(i47 %A) {
+ %B = ashr i47 %A, 8 ; <i47> [#uses=1]
+ %C = shl i47 %B, 8 ; <i47> [#uses=1]
+ ret i47 %C
+}
+
+define i18 @test13(i18 %A) {
+ %a = mul i18 %A, 3 ; <i18> [#uses=1]
+ %B = ashr i18 %a, 8 ; <i18> [#uses=1]
+ %C = shl i18 %B, 9 ; <i18> [#uses=1]
+ ret i18 %C
+}
+
+define i35 @test14(i35 %A) {
+ %B = lshr i35 %A, 4 ; <i35> [#uses=1]
+ %C = or i35 %B, 1234 ; <i35> [#uses=1]
+ %D = shl i35 %C, 4 ; <i35> [#uses=1]
+ ret i35 %D
+}
+
+define i79 @test14a(i79 %A) {
+ %B = shl i79 %A, 4 ; <i79> [#uses=1]
+ %C = and i79 %B, 1234 ; <i79> [#uses=1]
+ %D = lshr i79 %C, 4 ; <i79> [#uses=1]
+ ret i79 %D
+}
+
+define i45 @test15(i1 %C) {
+ %A = select i1 %C, i45 3, i45 1 ; <i45> [#uses=1]
+ %V = shl i45 %A, 2 ; <i45> [#uses=1]
+ ret i45 %V
+}
+
+define i53 @test15a(i1 %X) {
+ %A = select i1 %X, i8 3, i8 1 ; <i8> [#uses=1]
+ %B = zext i8 %A to i53 ; <i53> [#uses=1]
+ %V = shl i53 64, %B ; <i53> [#uses=1]
+ ret i53 %V
+}
+
+define i1 @test16(i84 %X) {
+ %tmp.3 = ashr i84 %X, 4 ; <i84> [#uses=1]
+ %tmp.6 = and i84 %tmp.3, 1 ; <i84> [#uses=1]
+ %tmp.7 = icmp ne i84 %tmp.6, 0 ; <i1> [#uses=1]
+ ret i1 %tmp.7
+}
+
+define i1 @test17(i106 %A) {
+ %B = lshr i106 %A, 3 ; <i106> [#uses=1]
+ %C = icmp eq i106 %B, 1234 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test18(i11 %A) {
+ %B = lshr i11 %A, 10 ; <i11> [#uses=1]
+ %C = icmp eq i11 %B, 123 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test19(i37 %A) {
+ %B = ashr i37 %A, 2 ; <i37> [#uses=1]
+ %C = icmp eq i37 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test19a(i39 %A) {
+ %B = ashr i39 %A, 2 ; <i39> [#uses=1]
+ %C = icmp eq i39 %B, -1 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test20(i13 %A) {
+ %B = ashr i13 %A, 12 ; <i13> [#uses=1]
+ %C = icmp eq i13 %B, 123 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test21(i12 %A) {
+ %B = shl i12 %A, 6 ; <i12> [#uses=1]
+ %C = icmp eq i12 %B, -128 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test22(i14 %A) {
+ %B = shl i14 %A, 7 ; <i14> [#uses=1]
+ %C = icmp eq i14 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i11 @test23(i44 %A) {
+ %B = shl i44 %A, 33 ; <i44> [#uses=1]
+ %C = ashr i44 %B, 33 ; <i44> [#uses=1]
+ %D = trunc i44 %C to i11 ; <i8> [#uses=1]
+ ret i11 %D
+}
+
+define i37 @test25(i37 %tmp.2, i37 %AA) {
+ %x = lshr i37 %AA, 17 ; <i37> [#uses=1]
+ %tmp.3 = lshr i37 %tmp.2, 17 ; <i37> [#uses=1]
+ %tmp.5 = add i37 %tmp.3, %x ; <i37> [#uses=1]
+ %tmp.6 = shl i37 %tmp.5, 17 ; <i37> [#uses=1]
+ ret i37 %tmp.6
+}
+
+define i40 @test26(i40 %A) {
+ %B = lshr i40 %A, 1 ; <i40> [#uses=1]
+ %C = bitcast i40 %B to i40 ; <i40> [#uses=1]
+ %D = shl i40 %C, 1 ; <i40> [#uses=1]
+ ret i40 %D
+}
diff --git a/test/Transforms/InstCombine/apint-shl-trunc.ll b/test/Transforms/InstCombine/apint-shl-trunc.ll
new file mode 100644
index 0000000..8163e6d
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-shl-trunc.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep shl
+; END.
+
+define i1 @test0(i39 %X, i39 %A) {
+ %B = lshr i39 %X, %A
+ %D = trunc i39 %B to i1
+ ret i1 %D
+}
+
+define i1 @test1(i799 %X, i799 %A) {
+ %B = lshr i799 %X, %A
+ %D = trunc i799 %B to i1
+ ret i1 %D
+}
diff --git a/test/Transforms/InstCombine/apint-sub.ll b/test/Transforms/InstCombine/apint-sub.ll
new file mode 100644
index 0000000..8b9ff14
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-sub.ll
@@ -0,0 +1,141 @@
+; This test makes sure that sub instructions are properly eliminated
+; even with arbitrary precision integers.
+;
+
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep -v {sub i19 %Cok, %Bok} | grep -v {sub i25 0, %Aok} | not grep sub
+; END.
+
+define i23 @test1(i23 %A) {
+ %B = sub i23 %A, %A ; <i23> [#uses=1]
+ ret i23 %B
+}
+
+define i47 @test2(i47 %A) {
+ %B = sub i47 %A, 0 ; <i47> [#uses=1]
+ ret i47 %B
+}
+
+define i97 @test3(i97 %A) {
+ %B = sub i97 0, %A ; <i97> [#uses=1]
+ %C = sub i97 0, %B ; <i97> [#uses=1]
+ ret i97 %C
+}
+
+define i108 @test4(i108 %A, i108 %x) {
+ %B = sub i108 0, %A ; <i108> [#uses=1]
+ %C = sub i108 %x, %B ; <i108> [#uses=1]
+ ret i108 %C
+}
+
+define i19 @test5(i19 %A, i19 %Bok, i19 %Cok) {
+ %D = sub i19 %Bok, %Cok ; <i19> [#uses=1]
+ %E = sub i19 %A, %D ; <i19> [#uses=1]
+ ret i19 %E
+}
+
+define i57 @test6(i57 %A, i57 %B) {
+ %C = and i57 %A, %B ; <i57> [#uses=1]
+ %D = sub i57 %A, %C ; <i57> [#uses=1]
+ ret i57 %D
+}
+
+define i77 @test7(i77 %A) {
+ %B = sub i77 -1, %A ; <i77> [#uses=1]
+ ret i77 %B
+}
+
+define i27 @test8(i27 %A) {
+ %B = mul i27 9, %A ; <i27> [#uses=1]
+ %C = sub i27 %B, %A ; <i27> [#uses=1]
+ ret i27 %C
+}
+
+define i42 @test9(i42 %A) {
+ %B = mul i42 3, %A ; <i42> [#uses=1]
+ %C = sub i42 %A, %B ; <i42> [#uses=1]
+ ret i42 %C
+}
+
+define i124 @test10(i124 %A, i124 %B) {
+ %C = sub i124 0, %A ; <i124> [#uses=1]
+ %D = sub i124 0, %B ; <i124> [#uses=1]
+ %E = mul i124 %C, %D ; <i124> [#uses=1]
+ ret i124 %E
+}
+
+define i55 @test10a(i55 %A) {
+ %C = sub i55 0, %A ; <i55> [#uses=1]
+ %E = mul i55 %C, 7 ; <i55> [#uses=1]
+ ret i55 %E
+}
+
+define i1 @test11(i9 %A, i9 %B) {
+ %C = sub i9 %A, %B ; <i9> [#uses=1]
+ %cD = icmp ne i9 %C, 0 ; <i1> [#uses=1]
+ ret i1 %cD
+}
+
+define i43 @test12(i43 %A) {
+ %B = ashr i43 %A, 42 ; <i43> [#uses=1]
+ %C = sub i43 0, %B ; <i43> [#uses=1]
+ ret i43 %C
+}
+
+define i79 @test13(i79 %A) {
+ %B = lshr i79 %A, 78 ; <i79> [#uses=1]
+ %C = sub i79 0, %B ; <i79> [#uses=1]
+ ret i79 %C
+}
+
+define i1024 @test14(i1024 %A) {
+ %B = lshr i1024 %A, 1023 ; <i1024> [#uses=1]
+ %C = bitcast i1024 %B to i1024 ; <i1024> [#uses=1]
+ %D = sub i1024 0, %C ; <i1024> [#uses=1]
+ ret i1024 %D
+}
+
+define i14 @test15(i14 %A, i14 %B) {
+ %C = sub i14 0, %A ; <i14> [#uses=1]
+ %D = srem i14 %B, %C ; <i14> [#uses=1]
+ ret i14 %D
+}
+
+define i51 @test16(i51 %A) {
+ %X = sdiv i51 %A, 1123 ; <i51> [#uses=1]
+ %Y = sub i51 0, %X ; <i51> [#uses=1]
+ ret i51 %Y
+}
+
+; Can't fold subtract here because negation it might oveflow.
+; PR3142
+define i25 @test17(i25 %Aok) {
+ %B = sub i25 0, %Aok ; <i25> [#uses=1]
+ %C = sdiv i25 %B, 1234 ; <i25> [#uses=1]
+ ret i25 %C
+}
+
+define i128 @test18(i128 %Y) {
+ %tmp.4 = shl i128 %Y, 2 ; <i128> [#uses=1]
+ %tmp.12 = shl i128 %Y, 2 ; <i128> [#uses=1]
+ %tmp.8 = sub i128 %tmp.4, %tmp.12 ; <i128> [#uses=1]
+ ret i128 %tmp.8
+}
+
+define i39 @test19(i39 %X, i39 %Y) {
+ %Z = sub i39 %X, %Y ; <i39> [#uses=1]
+ %Q = add i39 %Z, %Y ; <i39> [#uses=1]
+ ret i39 %Q
+}
+
+define i1 @test20(i33 %g, i33 %h) {
+ %tmp.2 = sub i33 %g, %h ; <i33> [#uses=1]
+ %tmp.4 = icmp ne i33 %tmp.2, %g ; <i1> [#uses=1]
+ ret i1 %tmp.4
+}
+
+define i1 @test21(i256 %g, i256 %h) {
+ %tmp.2 = sub i256 %g, %h ; <i256> [#uses=1]
+ %tmp.4 = icmp ne i256 %tmp.2, %g; <i1> [#uses=1]
+ ret i1 %tmp.4
+}
diff --git a/test/Transforms/InstCombine/apint-xor1.ll b/test/Transforms/InstCombine/apint-xor1.ll
new file mode 100644
index 0000000..849c659
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-xor1.ll
@@ -0,0 +1,50 @@
+; This test makes sure that xor instructions are properly eliminated.
+; This test is for Integer BitWidth <= 64 && BitWidth % 8 != 0.
+
+; RUN: opt < %s -instcombine -S | not grep {xor }
+
+
+define i47 @test1(i47 %A, i47 %B) {
+ ;; (A & C1)^(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
+ %A1 = and i47 %A, 70368744177664
+ %B1 = and i47 %B, 70368744177661
+ %C1 = xor i47 %A1, %B1
+ ret i47 %C1
+}
+
+define i15 @test2(i15 %x) {
+ %tmp.2 = xor i15 %x, 0
+ ret i15 %tmp.2
+}
+
+define i23 @test3(i23 %x) {
+ %tmp.2 = xor i23 %x, %x
+ ret i23 %tmp.2
+}
+
+define i37 @test4(i37 %x) {
+ ; x ^ ~x == -1
+ %NotX = xor i37 -1, %x
+ %B = xor i37 %x, %NotX
+ ret i37 %B
+}
+
+define i7 @test5(i7 %A) {
+ ;; (A|B)^B == A & (~B)
+ %t1 = or i7 %A, 23
+ %r = xor i7 %t1, 23
+ ret i7 %r
+}
+
+define i7 @test6(i7 %A) {
+ %t1 = xor i7 %A, 23
+ %r = xor i7 %t1, 23
+ ret i7 %r
+}
+
+define i47 @test7(i47 %A) {
+ ;; (A | C1) ^ C2 -> (A | C1) & ~C2 iff (C1&C2) == C2
+ %B1 = or i47 %A, 70368744177663
+ %C1 = xor i47 %B1, 703687463
+ ret i47 %C1
+}
diff --git a/test/Transforms/InstCombine/apint-xor2.ll b/test/Transforms/InstCombine/apint-xor2.ll
new file mode 100644
index 0000000..cacc179
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-xor2.ll
@@ -0,0 +1,51 @@
+; This test makes sure that xor instructions are properly eliminated.
+; This test is for Integer BitWidth > 64 && BitWidth <= 1024.
+
+; RUN: opt < %s -instcombine -S | not grep {xor }
+; END.
+
+
+define i447 @test1(i447 %A, i447 %B) {
+ ;; (A & C1)^(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
+ %A1 = and i447 %A, 70368744177664
+ %B1 = and i447 %B, 70368744177663
+ %C1 = xor i447 %A1, %B1
+ ret i447 %C1
+}
+
+define i1005 @test2(i1005 %x) {
+ %tmp.2 = xor i1005 %x, 0
+ ret i1005 %tmp.2
+}
+
+define i123 @test3(i123 %x) {
+ %tmp.2 = xor i123 %x, %x
+ ret i123 %tmp.2
+}
+
+define i737 @test4(i737 %x) {
+ ; x ^ ~x == -1
+ %NotX = xor i737 -1, %x
+ %B = xor i737 %x, %NotX
+ ret i737 %B
+}
+
+define i700 @test5(i700 %A) {
+ ;; (A|B)^B == A & (~B)
+ %t1 = or i700 %A, 288230376151711743
+ %r = xor i700 %t1, 288230376151711743
+ ret i700 %r
+}
+
+define i77 @test6(i77 %A) {
+ %t1 = xor i77 %A, 23
+ %r = xor i77 %t1, 23
+ ret i77 %r
+}
+
+define i1023 @test7(i1023 %A) {
+ ;; (A | C1) ^ C2 -> (A | C1) & ~C2 iff (C1&C2) == C2
+ %B1 = or i1023 %A, 70368744177663
+ %C1 = xor i1023 %B1, 703687463
+ ret i1023 %C1
+}
diff --git a/test/Transforms/InstCombine/apint-zext1.ll b/test/Transforms/InstCombine/apint-zext1.ll
new file mode 100644
index 0000000..40de360
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-zext1.ll
@@ -0,0 +1,11 @@
+; Tests to make sure elimination of casts is working correctly
+; This test is for Integer BitWidth <= 64 && BitWidth % 2 != 0.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i47 @test_sext_zext(i11 %A) {
+ %c1 = zext i11 %A to i39
+ %c2 = sext i39 %c1 to i47
+ ret i47 %c2
+; CHECK: %c2 = zext i11 %A to i47
+; CHECK: ret i47 %c2
+}
diff --git a/test/Transforms/InstCombine/apint-zext2.ll b/test/Transforms/InstCombine/apint-zext2.ll
new file mode 100644
index 0000000..886dcf2
--- /dev/null
+++ b/test/Transforms/InstCombine/apint-zext2.ll
@@ -0,0 +1,11 @@
+; Tests to make sure elimination of casts is working correctly
+; This test is for Integer BitWidth > 64 && BitWidth <= 1024.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i1024 @test_sext_zext(i77 %A) {
+ %c1 = zext i77 %A to i533
+ %c2 = sext i533 %c1 to i1024
+ ret i1024 %c2
+; CHECK: %c2 = zext i77 %A to i1024
+; CHECK: ret i1024 %c2
+}
diff --git a/test/Transforms/InstCombine/ashr-nop.ll b/test/Transforms/InstCombine/ashr-nop.ll
new file mode 100644
index 0000000..870ede3
--- /dev/null
+++ b/test/Transforms/InstCombine/ashr-nop.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | not grep ashr
+
+define i32 @foo(i32 %x) {
+ %o = and i32 %x, 1
+ %n = add i32 %o, -1
+ %t = ashr i32 %n, 17
+ ret i32 %t
+}
diff --git a/test/Transforms/InstCombine/badmalloc.ll b/test/Transforms/InstCombine/badmalloc.ll
new file mode 100644
index 0000000..cab23b5
--- /dev/null
+++ b/test/Transforms/InstCombine/badmalloc.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+
+declare noalias i8* @malloc(i64) nounwind
+declare void @free(i8*)
+
+; PR5130
+define i1 @test1() {
+ %A = call noalias i8* @malloc(i64 4) nounwind
+ %B = icmp eq i8* %A, null
+
+ call void @free(i8* %A)
+ ret i1 %B
+
+; CHECK: @test1
+; CHECK: ret i1 %B
+}
diff --git a/test/Transforms/InstCombine/binop-cast.ll b/test/Transforms/InstCombine/binop-cast.ll
new file mode 100644
index 0000000..3dbca7e
--- /dev/null
+++ b/test/Transforms/InstCombine/binop-cast.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i32 @testAdd(i32 %X, i32 %Y) {
+ %tmp = add i32 %X, %Y
+; CHECK: %tmp = add i32 %X, %Y
+ %tmp.l = bitcast i32 %tmp to i32
+ ret i32 %tmp.l
+; CHECK: ret i32 %tmp
+}
diff --git a/test/Transforms/InstCombine/bit-tracking.ll b/test/Transforms/InstCombine/bit-tracking.ll
new file mode 100644
index 0000000..51bbc08
--- /dev/null
+++ b/test/Transforms/InstCombine/bit-tracking.ll
@@ -0,0 +1,26 @@
+; This file contains various testcases that require tracking whether bits are
+; set or cleared by various instructions.
+; RUN: opt < %s -instcombine -instcombine -S |\
+; RUN: not grep %ELIM
+
+; Reduce down to a single XOR
+define i32 @test3(i32 %B) {
+ %ELIMinc = and i32 %B, 1 ; <i32> [#uses=1]
+ %tmp.5 = xor i32 %ELIMinc, 1 ; <i32> [#uses=1]
+ %ELIM7 = and i32 %B, -2 ; <i32> [#uses=1]
+ %tmp.8 = or i32 %tmp.5, %ELIM7 ; <i32> [#uses=1]
+ ret i32 %tmp.8
+}
+
+; Finally, a bigger case where we chain things together. This corresponds to
+; incrementing a single-bit bitfield, which should become just an xor.
+define i32 @test4(i32 %B) {
+ %ELIM3 = shl i32 %B, 31 ; <i32> [#uses=1]
+ %ELIM4 = ashr i32 %ELIM3, 31 ; <i32> [#uses=1]
+ %inc = add i32 %ELIM4, 1 ; <i32> [#uses=1]
+ %ELIM5 = and i32 %inc, 1 ; <i32> [#uses=1]
+ %ELIM7 = and i32 %B, -2 ; <i32> [#uses=1]
+ %tmp.8 = or i32 %ELIM5, %ELIM7 ; <i32> [#uses=1]
+ ret i32 %tmp.8
+}
+
diff --git a/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll b/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll
new file mode 100644
index 0000000..4e9dfbb
--- /dev/null
+++ b/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep {ret i32 0}
+; PR4487
+
+; Bitcasts between vectors and scalars are valid, despite being ill-advised.
+
+define i32 @test(i64 %a) {
+bb20:
+ %t1 = bitcast i64 %a to <2 x i32>
+ %t2 = bitcast i64 %a to <2 x i32>
+ %t3 = xor <2 x i32> %t1, %t2
+ %t4 = extractelement <2 x i32> %t3, i32 0
+ ret i32 %t4
+}
+
diff --git a/test/Transforms/InstCombine/bitcast-sext-vector.ll b/test/Transforms/InstCombine/bitcast-sext-vector.ll
new file mode 100644
index 0000000..d70bdba
--- /dev/null
+++ b/test/Transforms/InstCombine/bitcast-sext-vector.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; CHECK: sext
+; Don't fold zero/sign extensions with a bitcast between a vector and scalar.
+
+define i32 @t(<4 x i8> %src1, <4 x i8> %src2) nounwind readonly {
+entry:
+ %cmp = icmp eq <4 x i8> %src1, %src2; <<4 x i1>> [#uses=1]
+ %sext = sext <4 x i1> %cmp to <4 x i8>
+ %val = bitcast <4 x i8> %sext to i32
+ ret i32 %val
+}
diff --git a/test/Transforms/InstCombine/bitcast-vec-canon.ll b/test/Transforms/InstCombine/bitcast-vec-canon.ll
new file mode 100644
index 0000000..d27765e
--- /dev/null
+++ b/test/Transforms/InstCombine/bitcast-vec-canon.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine -S | grep element | count 4
+
+define double @a(<1 x i64> %y) {
+ %c = bitcast <1 x i64> %y to double
+ ret double %c
+}
+
+define i64 @b(<1 x i64> %y) {
+ %c = bitcast <1 x i64> %y to i64
+ ret i64 %c
+}
+
+define <1 x i64> @c(double %y) {
+ %c = bitcast double %y to <1 x i64>
+ ret <1 x i64> %c
+}
+
+define <1 x i64> @d(i64 %y) {
+ %c = bitcast i64 %y to <1 x i64>
+ ret <1 x i64> %c
+}
+
diff --git a/test/Transforms/InstCombine/bitcast-vector-fold.ll b/test/Transforms/InstCombine/bitcast-vector-fold.ll
new file mode 100644
index 0000000..8feec22
--- /dev/null
+++ b/test/Transforms/InstCombine/bitcast-vector-fold.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -instcombine -S | not grep bitcast
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+define <2 x i64> @test1() {
+ %tmp3 = bitcast <4 x i32> < i32 0, i32 1, i32 2, i32 3 > to <2 x i64>
+ ret <2 x i64> %tmp3
+}
+
+define <4 x i32> @test2() {
+ %tmp3 = bitcast <2 x i64> < i64 0, i64 1 > to <4 x i32>
+ ret <4 x i32> %tmp3
+}
+
+define <2 x double> @test3() {
+ %tmp3 = bitcast <4 x i32> < i32 0, i32 1, i32 2, i32 3 > to <2 x double>
+ ret <2 x double> %tmp3
+}
+
+define <4 x float> @test4() {
+ %tmp3 = bitcast <2 x i64> < i64 0, i64 1 > to <4 x float>
+ ret <4 x float> %tmp3
+}
+
+define <2 x i64> @test5() {
+ %tmp3 = bitcast <4 x float> <float 0.0, float 1.0, float 2.0, float 3.0> to <2 x i64>
+ ret <2 x i64> %tmp3
+}
+
+define <4 x i32> @test6() {
+ %tmp3 = bitcast <2 x double> <double 0.5, double 1.0> to <4 x i32>
+ ret <4 x i32> %tmp3
+}
diff --git a/test/Transforms/InstCombine/bitcount.ll b/test/Transforms/InstCombine/bitcount.ll
new file mode 100644
index 0000000..f75ca2d
--- /dev/null
+++ b/test/Transforms/InstCombine/bitcount.ll
@@ -0,0 +1,19 @@
+; Tests to make sure bit counts of constants are folded
+; RUN: opt < %s -instcombine -S | grep {ret i32 19}
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep -v declare | not grep llvm.ct
+
+declare i31 @llvm.ctpop.i31(i31 %val)
+declare i32 @llvm.cttz.i32(i32 %val)
+declare i33 @llvm.ctlz.i33(i33 %val)
+
+define i32 @test(i32 %A) {
+ %c1 = call i31 @llvm.ctpop.i31(i31 12415124)
+ %c2 = call i32 @llvm.cttz.i32(i32 87359874)
+ %c3 = call i33 @llvm.ctlz.i33(i33 87359874)
+ %t1 = zext i31 %c1 to i32
+ %t3 = trunc i33 %c3 to i32
+ %r1 = add i32 %t1, %c2
+ %r2 = add i32 %r1, %t3
+ ret i32 %r2
+}
diff --git a/test/Transforms/InstCombine/bittest.ll b/test/Transforms/InstCombine/bittest.ll
new file mode 100644
index 0000000..92863d5
--- /dev/null
+++ b/test/Transforms/InstCombine/bittest.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -instcombine -simplifycfg -S |\
+; RUN: not grep {call void @abort}
+
+@b_rec.0 = external global i32 ; <i32*> [#uses=2]
+
+define void @_Z12h000007_testv(i32* %P) {
+entry:
+ %tmp.2 = load i32* @b_rec.0 ; <i32> [#uses=1]
+ %tmp.9 = or i32 %tmp.2, -989855744 ; <i32> [#uses=2]
+ %tmp.16 = and i32 %tmp.9, -805306369 ; <i32> [#uses=2]
+ %tmp.17 = and i32 %tmp.9, -973078529 ; <i32> [#uses=1]
+ store i32 %tmp.17, i32* @b_rec.0
+ %tmp.17.shrunk = bitcast i32 %tmp.16 to i32 ; <i32> [#uses=1]
+ %tmp.22 = and i32 %tmp.17.shrunk, -1073741824 ; <i32> [#uses=1]
+ %tmp.23 = icmp eq i32 %tmp.22, -1073741824 ; <i1> [#uses=1]
+ br i1 %tmp.23, label %endif.0, label %then.0
+
+then.0: ; preds = %entry
+ tail call void @abort( )
+ unreachable
+
+endif.0: ; preds = %entry
+ %tmp.17.shrunk2 = bitcast i32 %tmp.16 to i32 ; <i32> [#uses=1]
+ %tmp.27.mask = and i32 %tmp.17.shrunk2, 100663295 ; <i32> [#uses=1]
+ store i32 %tmp.27.mask, i32* %P
+ ret void
+}
+
+declare void @abort()
+
diff --git a/test/Transforms/InstCombine/bswap-fold.ll b/test/Transforms/InstCombine/bswap-fold.ll
new file mode 100644
index 0000000..034c70e
--- /dev/null
+++ b/test/Transforms/InstCombine/bswap-fold.ll
@@ -0,0 +1,69 @@
+; RUN: opt < %s -instcombine -S | not grep call.*bswap
+
+define i1 @test1(i16 %tmp2) {
+ %tmp10 = call i16 @llvm.bswap.i16( i16 %tmp2 )
+ %tmp = icmp eq i16 %tmp10, 1
+ ret i1 %tmp
+}
+
+define i1 @test2(i32 %tmp) {
+ %tmp34 = tail call i32 @llvm.bswap.i32( i32 %tmp )
+ %tmp.upgrd.1 = icmp eq i32 %tmp34, 1
+ ret i1 %tmp.upgrd.1
+}
+
+declare i32 @llvm.bswap.i32(i32)
+
+define i1 @test3(i64 %tmp) {
+ %tmp34 = tail call i64 @llvm.bswap.i64( i64 %tmp )
+ %tmp.upgrd.2 = icmp eq i64 %tmp34, 1
+ ret i1 %tmp.upgrd.2
+}
+
+declare i64 @llvm.bswap.i64(i64)
+
+declare i16 @llvm.bswap.i16(i16)
+
+; rdar://5992453
+; A & 255
+define i32 @test4(i32 %a) nounwind {
+entry:
+ %tmp2 = tail call i32 @llvm.bswap.i32( i32 %a )
+ %tmp4 = lshr i32 %tmp2, 24
+ ret i32 %tmp4
+}
+
+; A
+define i32 @test5(i32 %a) nounwind {
+entry:
+ %tmp2 = tail call i32 @llvm.bswap.i32( i32 %a )
+ %tmp4 = tail call i32 @llvm.bswap.i32( i32 %tmp2 )
+ ret i32 %tmp4
+}
+
+; a >> 24
+define i32 @test6(i32 %a) nounwind {
+entry:
+ %tmp2 = tail call i32 @llvm.bswap.i32( i32 %a )
+ %tmp4 = and i32 %tmp2, 255
+ ret i32 %tmp4
+}
+
+; PR5284
+declare i64 @llvm.bswap.i64(i64)
+declare i32 @llvm.bswap.i32(i32)
+declare i16 @llvm.bswap.i16(i16)
+
+define i16 @test7(i32 %A) {
+ %B = tail call i32 @llvm.bswap.i32(i32 %A) nounwind
+ %C = trunc i32 %B to i16
+ %D = tail call i16 @llvm.bswap.i16(i16 %C) nounwind
+ ret i16 %D
+}
+
+define i16 @test8(i64 %A) {
+ %B = tail call i64 @llvm.bswap.i64(i64 %A) nounwind
+ %C = trunc i64 %B to i16
+ %D = tail call i16 @llvm.bswap.i16(i16 %C) nounwind
+ ret i16 %D
+}
diff --git a/test/Transforms/InstCombine/bswap.ll b/test/Transforms/InstCombine/bswap.ll
new file mode 100644
index 0000000..168b3e8
--- /dev/null
+++ b/test/Transforms/InstCombine/bswap.ll
@@ -0,0 +1,74 @@
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {call.*llvm.bswap} | count 6
+
+define i32 @test1(i32 %i) {
+ %tmp1 = lshr i32 %i, 24 ; <i32> [#uses=1]
+ %tmp3 = lshr i32 %i, 8 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp3, 65280 ; <i32> [#uses=1]
+ %tmp5 = or i32 %tmp1, %tmp4 ; <i32> [#uses=1]
+ %tmp7 = shl i32 %i, 8 ; <i32> [#uses=1]
+ %tmp8 = and i32 %tmp7, 16711680 ; <i32> [#uses=1]
+ %tmp9 = or i32 %tmp5, %tmp8 ; <i32> [#uses=1]
+ %tmp11 = shl i32 %i, 24 ; <i32> [#uses=1]
+ %tmp12 = or i32 %tmp9, %tmp11 ; <i32> [#uses=1]
+ ret i32 %tmp12
+}
+
+define i32 @test2(i32 %arg) {
+ %tmp2 = shl i32 %arg, 24 ; <i32> [#uses=1]
+ %tmp4 = shl i32 %arg, 8 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
+ %tmp8 = lshr i32 %arg, 8 ; <i32> [#uses=1]
+ %tmp9 = and i32 %tmp8, 65280 ; <i32> [#uses=1]
+ %tmp10 = or i32 %tmp6, %tmp9 ; <i32> [#uses=1]
+ %tmp12 = lshr i32 %arg, 24 ; <i32> [#uses=1]
+ %tmp14 = or i32 %tmp10, %tmp12 ; <i32> [#uses=1]
+ ret i32 %tmp14
+}
+
+define i16 @test3(i16 %s) {
+ %tmp2 = lshr i16 %s, 8 ; <i16> [#uses=1]
+ %tmp4 = shl i16 %s, 8 ; <i16> [#uses=1]
+ %tmp5 = or i16 %tmp2, %tmp4 ; <i16> [#uses=1]
+ ret i16 %tmp5
+}
+
+define i16 @test4(i16 %s) {
+ %tmp2 = lshr i16 %s, 8 ; <i16> [#uses=1]
+ %tmp4 = shl i16 %s, 8 ; <i16> [#uses=1]
+ %tmp5 = or i16 %tmp4, %tmp2 ; <i16> [#uses=1]
+ ret i16 %tmp5
+}
+
+define i16 @test5(i16 %a) {
+ %tmp = zext i16 %a to i32 ; <i32> [#uses=2]
+ %tmp1 = and i32 %tmp, 65280 ; <i32> [#uses=1]
+ %tmp2 = ashr i32 %tmp1, 8 ; <i32> [#uses=1]
+ %tmp2.upgrd.1 = trunc i32 %tmp2 to i16 ; <i16> [#uses=1]
+ %tmp4 = and i32 %tmp, 255 ; <i32> [#uses=1]
+ %tmp5 = shl i32 %tmp4, 8 ; <i32> [#uses=1]
+ %tmp5.upgrd.2 = trunc i32 %tmp5 to i16 ; <i16> [#uses=1]
+ %tmp.upgrd.3 = or i16 %tmp2.upgrd.1, %tmp5.upgrd.2 ; <i16> [#uses=1]
+ %tmp6 = bitcast i16 %tmp.upgrd.3 to i16 ; <i16> [#uses=1]
+ %tmp6.upgrd.4 = zext i16 %tmp6 to i32 ; <i32> [#uses=1]
+ %retval = trunc i32 %tmp6.upgrd.4 to i16 ; <i16> [#uses=1]
+ ret i16 %retval
+}
+
+; PR2842
+define i32 @test6(i32 %x) nounwind readnone {
+ %tmp = shl i32 %x, 16 ; <i32> [#uses=1]
+ %x.mask = and i32 %x, 65280 ; <i32> [#uses=1]
+ %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]
+ %tmp3 = or i32 %x.mask, %tmp ; <i32> [#uses=1]
+ %tmp4 = or i32 %tmp3, %tmp2 ; <i32> [#uses=1]
+ %tmp5 = shl i32 %tmp4, 8 ; <i32> [#uses=1]
+ %tmp6 = lshr i32 %x, 24 ; <i32> [#uses=1]
+ %tmp7 = or i32 %tmp5, %tmp6 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
+
diff --git a/test/Transforms/InstCombine/call-cast-target.ll b/test/Transforms/InstCombine/call-cast-target.ll
new file mode 100644
index 0000000..7addc8a
--- /dev/null
+++ b/test/Transforms/InstCombine/call-cast-target.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep call | not grep bitcast
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i32 @main() {
+entry:
+ %tmp = call i32 bitcast (i8* (i32*)* @ctime to i32 (i32*)*)( i32* null ) ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+declare i8* @ctime(i32*)
+
diff --git a/test/Transforms/InstCombine/call-intrinsics.ll b/test/Transforms/InstCombine/call-intrinsics.ll
new file mode 100644
index 0000000..f9d1080
--- /dev/null
+++ b/test/Transforms/InstCombine/call-intrinsics.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -instcombine | llvm-dis
+
+@X = global i8 0 ; <i8*> [#uses=3]
+@Y = global i8 12 ; <i8*> [#uses=2]
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
+define void @zero_byte_test() {
+ ; These process zero bytes, so they are a noop.
+ call void @llvm.memmove.i32( i8* @X, i8* @Y, i32 0, i32 100 )
+ call void @llvm.memcpy.i32( i8* @X, i8* @Y, i32 0, i32 100 )
+ call void @llvm.memset.i32( i8* @X, i8 123, i32 0, i32 100 )
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/call.ll b/test/Transforms/InstCombine/call.ll
new file mode 100644
index 0000000..dd65b96
--- /dev/null
+++ b/test/Transforms/InstCombine/call.ll
@@ -0,0 +1,118 @@
+; Ignore stderr, we expect warnings there
+; RUN: opt < %s -instcombine 2> /dev/null -S | FileCheck %s
+
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+; Simple case, argument translatable without changing the value
+declare void @test1a(i8*)
+
+define void @test1(i32* %A) {
+ call void bitcast (void (i8*)* @test1a to void (i32*)*)( i32* %A )
+ ret void
+; CHECK: %tmp = bitcast i32* %A to i8*
+; CHECK: call void @test1a(i8* %tmp)
+; CHECK: ret void
+}
+
+; More complex case, translate argument because of resolution. This is safe
+; because we have the body of the function
+define void @test2a(i8 %A) {
+ ret void
+; CHECK: ret void
+}
+
+define i32 @test2(i32 %A) {
+ call void bitcast (void (i8)* @test2a to void (i32)*)( i32 %A )
+ ret i32 %A
+; CHECK: %tmp = trunc i32 %A to i8
+; CHECK: call void @test2a(i8 %tmp)
+; CHECK: ret i32 %A
+}
+
+
+; Resolving this should insert a cast from sbyte to int, following the C
+; promotion rules.
+declare void @test3a(i8, ...)
+
+define void @test3(i8 %A, i8 %B) {
+ call void bitcast (void (i8, ...)* @test3a to void (i8, i8)*)( i8 %A, i8 %B
+)
+ ret void
+; CHECK: %tmp = zext i8 %B to i32
+; CHECK: call void (i8, ...)* @test3a(i8 %A, i32 %tmp)
+; CHECK: ret void
+}
+
+
+; test conversion of return value...
+define i8 @test4a() {
+ ret i8 0
+; CHECK: ret i8 0
+}
+
+define i32 @test4() {
+ %X = call i32 bitcast (i8 ()* @test4a to i32 ()*)( ) ; <i32> [#uses=1]
+ ret i32 %X
+; CHECK: %X1 = call i8 @test4a()
+; CHECK: %tmp = zext i8 %X1 to i32
+; CHECK: ret i32 %tmp
+}
+
+
+; test conversion of return value... no value conversion occurs so we can do
+; this with just a prototype...
+declare i32 @test5a()
+
+define i32 @test5() {
+ %X = call i32 @test5a( ) ; <i32> [#uses=1]
+ ret i32 %X
+; CHECK: %X = call i32 @test5a()
+; CHECK: ret i32 %X
+}
+
+
+; test addition of new arguments...
+declare i32 @test6a(i32)
+
+define i32 @test6() {
+ %X = call i32 bitcast (i32 (i32)* @test6a to i32 ()*)( )
+ ret i32 %X
+; CHECK: %X1 = call i32 @test6a(i32 0)
+; CHECK: ret i32 %X1
+}
+
+
+; test removal of arguments, only can happen with a function body
+define void @test7a() {
+ ret void
+; CHECK: ret void
+}
+
+define void @test7() {
+ call void bitcast (void ()* @test7a to void (i32)*)( i32 5 )
+ ret void
+; CHECK: call void @test7a()
+; CHECK: ret void
+}
+
+
+; rdar://7590304
+declare void @test8a()
+
+define i8* @test8() {
+ invoke arm_apcscc void @test8a()
+ to label %invoke.cont unwind label %try.handler
+
+invoke.cont: ; preds = %entry
+ unreachable
+
+try.handler: ; preds = %entry
+ ret i8* null
+}
+
+; Don't turn this into "unreachable": the callee and caller don't agree in
+; calling conv, but the implementation of test8a may actually end up using the
+; right calling conv.
+; CHECK: @test8() {
+; CHECK-NEXT: invoke arm_apcscc void @test8a()
+
diff --git a/test/Transforms/InstCombine/call2.ll b/test/Transforms/InstCombine/call2.ll
new file mode 100644
index 0000000..3a6bd67
--- /dev/null
+++ b/test/Transforms/InstCombine/call2.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -instcombine | llvm-dis
+
+; This used to crash trying to do a double-to-pointer conversion
+define i32 @bar() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = call i32 (...)* bitcast (i32 (i8*)* @f to i32 (...)*)( double 3.000000e+00 ) ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
+
+define i32 @f(i8* %p) {
+entry:
+ %p_addr = alloca i8* ; <i8**> [#uses=1]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i8* %p, i8** %p_addr
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
diff --git a/test/Transforms/InstCombine/canonicalize_branch.ll b/test/Transforms/InstCombine/canonicalize_branch.ll
new file mode 100644
index 0000000..24090ab
--- /dev/null
+++ b/test/Transforms/InstCombine/canonicalize_branch.ll
@@ -0,0 +1,44 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i32 @test1(i32 %X, i32 %Y) {
+ %C = icmp ne i32 %X, %Y
+ br i1 %C, label %T, label %F
+
+; CHECK: @test1
+; CHECK: %C = icmp eq i32 %X, %Y
+; CHECK: br i1 %C, label %F, label %T
+
+T:
+ ret i32 12
+F:
+ ret i32 123
+}
+
+define i32 @test2(i32 %X, i32 %Y) {
+ %C = icmp ule i32 %X, %Y
+ br i1 %C, label %T, label %F
+
+; CHECK: @test2
+; CHECK: %C = icmp ugt i32 %X, %Y
+; CHECK: br i1 %C, label %F, label %T
+
+T:
+ ret i32 12
+F:
+ ret i32 123
+}
+
+define i32 @test3(i32 %X, i32 %Y) {
+ %C = icmp uge i32 %X, %Y
+ br i1 %C, label %T, label %F
+
+; CHECK: @test3
+; CHECK: %C = icmp ult i32 %X, %Y
+; CHECK: br i1 %C, label %F, label %T
+
+T:
+ ret i32 12
+F:
+ ret i32 123
+}
+
diff --git a/test/Transforms/InstCombine/cast-mul-select.ll b/test/Transforms/InstCombine/cast-mul-select.ll
new file mode 100644
index 0000000..f55423c
--- /dev/null
+++ b/test/Transforms/InstCombine/cast-mul-select.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32"
+
+define i32 @mul(i32 %x, i32 %y) {
+ %A = trunc i32 %x to i8
+ %B = trunc i32 %y to i8
+ %C = mul i8 %A, %B
+ %D = zext i8 %C to i32
+ ret i32 %D
+; CHECK: %C = mul i32 %x, %y
+; CHECK: %D = and i32 %C, 255
+; CHECK: ret i32 %D
+}
+
+define i32 @select1(i1 %cond, i32 %x, i32 %y, i32 %z) {
+ %A = trunc i32 %x to i8
+ %B = trunc i32 %y to i8
+ %C = trunc i32 %z to i8
+ %D = add i8 %A, %B
+ %E = select i1 %cond, i8 %C, i8 %D
+ %F = zext i8 %E to i32
+ ret i32 %F
+; CHECK: %D = add i32 %x, %y
+; CHECK: %E = select i1 %cond, i32 %z, i32 %D
+; CHECK: %F = and i32 %E, 255
+; CHECK: ret i32 %F
+}
+
+define i8 @select2(i1 %cond, i8 %x, i8 %y, i8 %z) {
+ %A = zext i8 %x to i32
+ %B = zext i8 %y to i32
+ %C = zext i8 %z to i32
+ %D = add i32 %A, %B
+ %E = select i1 %cond, i32 %C, i32 %D
+ %F = trunc i32 %E to i8
+ ret i8 %F
+; CHECK: %D = add i8 %x, %y
+; CHECK: %E = select i1 %cond, i8 %z, i8 %D
+; CHECK: ret i8 %E
+}
diff --git a/test/Transforms/InstCombine/cast-set.ll b/test/Transforms/InstCombine/cast-set.ll
new file mode 100644
index 0000000..8934404
--- /dev/null
+++ b/test/Transforms/InstCombine/cast-set.ll
@@ -0,0 +1,65 @@
+; This tests for various complex cast elimination cases instcombine should
+; handle.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i1 @test1(i32 %X) {
+ %A = bitcast i32 %X to i32 ; <i32> [#uses=1]
+ ; Convert to setne int %X, 12
+ %c = icmp ne i32 %A, 12 ; <i1> [#uses=1]
+ ret i1 %c
+; CHECK: %c = icmp ne i32 %X, 12
+; CHECK: ret i1 %c
+}
+
+define i1 @test2(i32 %X, i32 %Y) {
+ %A = bitcast i32 %X to i32 ; <i32> [#uses=1]
+ %B = bitcast i32 %Y to i32 ; <i32> [#uses=1]
+ ; Convert to setne int %X, %Y
+ %c = icmp ne i32 %A, %B ; <i1> [#uses=1]
+ ret i1 %c
+; CHECK: %c = icmp ne i32 %X, %Y
+; CHECK: ret i1 %c
+}
+
+define i32 @test4(i32 %A) {
+ %B = bitcast i32 %A to i32 ; <i32> [#uses=1]
+ %C = shl i32 %B, 2 ; <i32> [#uses=1]
+ %D = bitcast i32 %C to i32 ; <i32> [#uses=1]
+ ret i32 %D
+; CHECK: %C = shl i32 %A, 2
+; CHECK: ret i32 %C
+}
+
+define i16 @test5(i16 %A) {
+ %B = sext i16 %A to i32 ; <i32> [#uses=1]
+ %C = and i32 %B, 15 ; <i32> [#uses=1]
+ %D = trunc i32 %C to i16 ; <i16> [#uses=1]
+ ret i16 %D
+; CHECK: %C = and i16 %A, 15
+; CHECK: ret i16 %C
+}
+
+define i1 @test6(i1 %A) {
+ %B = zext i1 %A to i32 ; <i32> [#uses=1]
+ %C = icmp ne i32 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 %A
+}
+
+define i1 @test6a(i1 %A) {
+ %B = zext i1 %A to i32 ; <i32> [#uses=1]
+ %C = icmp ne i32 %B, -1 ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: ret i1 true
+}
+
+define i1 @test7(i8* %A) {
+ %B = bitcast i8* %A to i32* ; <i32*> [#uses=1]
+ %C = icmp eq i32* %B, null ; <i1> [#uses=1]
+ ret i1 %C
+; CHECK: %C = icmp eq i8* %A, null
+; CHECK: ret i1 %C
+}
diff --git a/test/Transforms/InstCombine/cast.ll b/test/Transforms/InstCombine/cast.ll
new file mode 100644
index 0000000..878da68
--- /dev/null
+++ b/test/Transforms/InstCombine/cast.ll
@@ -0,0 +1,607 @@
+; Tests to make sure elimination of casts is working correctly
+; RUN: opt < %s -instcombine -S | FileCheck %s
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n8:16:32:64"
+
+@inbuf = external global [32832 x i8] ; <[32832 x i8]*> [#uses=1]
+
+define i32 @test1(i32 %A) {
+ %c1 = bitcast i32 %A to i32 ; <i32> [#uses=1]
+ %c2 = bitcast i32 %c1 to i32 ; <i32> [#uses=1]
+ ret i32 %c2
+; CHECK: ret i32 %A
+}
+
+define i64 @test2(i8 %A) {
+ %c1 = zext i8 %A to i16 ; <i16> [#uses=1]
+ %c2 = zext i16 %c1 to i32 ; <i32> [#uses=1]
+ %Ret = zext i32 %c2 to i64 ; <i64> [#uses=1]
+ ret i64 %Ret
+; CHECK: %Ret = zext i8 %A to i64
+; CHECK: ret i64 %Ret
+}
+
+; This function should just use bitwise AND
+define i64 @test3(i64 %A) {
+ %c1 = trunc i64 %A to i8 ; <i8> [#uses=1]
+ %c2 = zext i8 %c1 to i64 ; <i64> [#uses=1]
+ ret i64 %c2
+; CHECK: %c2 = and i64 %A, 255
+; CHECK: ret i64 %c2
+}
+
+define i32 @test4(i32 %A, i32 %B) {
+ %COND = icmp slt i32 %A, %B ; <i1> [#uses=1]
+ ; Booleans are unsigned integrals
+ %c = zext i1 %COND to i8 ; <i8> [#uses=1]
+ ; for the cast elim purpose
+ %result = zext i8 %c to i32 ; <i32> [#uses=1]
+ ret i32 %result
+; CHECK: %COND = icmp slt i32 %A, %B
+; CHECK: %result = zext i1 %COND to i32
+; CHECK: ret i32 %result
+}
+
+define i32 @test5(i1 %B) {
+ ; This cast should get folded into
+ %c = zext i1 %B to i8 ; <i8> [#uses=1]
+ ; this cast
+ %result = zext i8 %c to i32 ; <i32> [#uses=1]
+ ret i32 %result
+; CHECK: %result = zext i1 %B to i32
+; CHECK: ret i32 %result
+}
+
+define i32 @test6(i64 %A) {
+ %c1 = trunc i64 %A to i32 ; <i32> [#uses=1]
+ %res = bitcast i32 %c1 to i32 ; <i32> [#uses=1]
+ ret i32 %res
+; CHECK: trunc i64 %A to i32
+; CHECK-NEXT: ret i32
+}
+
+define i64 @test7(i1 %A) {
+ %c1 = zext i1 %A to i32 ; <i32> [#uses=1]
+ %res = sext i32 %c1 to i64 ; <i64> [#uses=1]
+ ret i64 %res
+; CHECK: %res = zext i1 %A to i64
+; CHECK: ret i64 %res
+}
+
+define i64 @test8(i8 %A) {
+ %c1 = sext i8 %A to i64 ; <i64> [#uses=1]
+ %res = bitcast i64 %c1 to i64 ; <i64> [#uses=1]
+ ret i64 %res
+; CHECK: = sext i8 %A to i64
+; CHECK-NEXT: ret i64
+}
+
+define i16 @test9(i16 %A) {
+ %c1 = sext i16 %A to i32 ; <i32> [#uses=1]
+ %c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1]
+ ret i16 %c2
+; CHECK: ret i16 %A
+}
+
+define i16 @test10(i16 %A) {
+ %c1 = sext i16 %A to i32 ; <i32> [#uses=1]
+ %c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1]
+ ret i16 %c2
+; CHECK: ret i16 %A
+}
+
+declare void @varargs(i32, ...)
+
+define void @test11(i32* %P) {
+ %c = bitcast i32* %P to i16* ; <i16*> [#uses=1]
+ call void (i32, ...)* @varargs( i32 5, i16* %c )
+ ret void
+; CHECK: call void (i32, ...)* @varargs(i32 5, i32* %P)
+; CHECK: ret void
+}
+
+define i32* @test12() {
+ %p = malloc [4 x i8] ; <[4 x i8]*> [#uses=1]
+ %c = bitcast [4 x i8]* %p to i32* ; <i32*> [#uses=1]
+ ret i32* %c
+; CHECK: %malloccall = tail call i8* @malloc(i32 4)
+; CHECK: ret i32* %c
+}
+
+define i8* @test13(i64 %A) {
+ %c = getelementptr [0 x i8]* bitcast ([32832 x i8]* @inbuf to [0 x i8]*), i64 0, i64 %A ; <i8*> [#uses=1]
+ ret i8* %c
+; CHECK: %c = getelementptr [32832 x i8]* @inbuf, i64 0, i64 %A
+; CHECK: ret i8* %c
+}
+
+define i1 @test14(i8 %A) {
+ %c = bitcast i8 %A to i8 ; <i8> [#uses=1]
+ %X = icmp ult i8 %c, -128 ; <i1> [#uses=1]
+ ret i1 %X
+; CHECK: %X = icmp sgt i8 %A, -1
+; CHECK: ret i1 %X
+}
+
+
+; This just won't occur when there's no difference between ubyte and sbyte
+;bool %test15(ubyte %A) {
+; %c = cast ubyte %A to sbyte
+; %X = setlt sbyte %c, 0 ; setgt %A, 127
+; ret bool %X
+;}
+
+define i1 @test16(i32* %P) {
+ %c = icmp ne i32* %P, null ; <i1> [#uses=1]
+ ret i1 %c
+; CHECK: %c = icmp ne i32* %P, null
+; CHECK: ret i1 %c
+}
+
+define i16 @test17(i1 %tmp3) {
+ %c = zext i1 %tmp3 to i32 ; <i32> [#uses=1]
+ %t86 = trunc i32 %c to i16 ; <i16> [#uses=1]
+ ret i16 %t86
+; CHECK: %t86 = zext i1 %tmp3 to i16
+; CHECK: ret i16 %t86
+}
+
+define i16 @test18(i8 %tmp3) {
+ %c = sext i8 %tmp3 to i32 ; <i32> [#uses=1]
+ %t86 = trunc i32 %c to i16 ; <i16> [#uses=1]
+ ret i16 %t86
+; CHECK: %t86 = sext i8 %tmp3 to i16
+; CHECK: ret i16 %t86
+}
+
+define i1 @test19(i32 %X) {
+ %c = sext i32 %X to i64 ; <i64> [#uses=1]
+ %Z = icmp slt i64 %c, 12345 ; <i1> [#uses=1]
+ ret i1 %Z
+; CHECK: %Z = icmp slt i32 %X, 12345
+; CHECK: ret i1 %Z
+}
+
+define i1 @test20(i1 %B) {
+ %c = zext i1 %B to i32 ; <i32> [#uses=1]
+ %D = icmp slt i32 %c, -1 ; <i1> [#uses=1]
+ ;; false
+ ret i1 %D
+; CHECK: ret i1 false
+}
+
+define i32 @test21(i32 %X) {
+ %c1 = trunc i32 %X to i8 ; <i8> [#uses=1]
+ ;; sext -> zext -> and -> nop
+ %c2 = sext i8 %c1 to i32 ; <i32> [#uses=1]
+ %RV = and i32 %c2, 255 ; <i32> [#uses=1]
+ ret i32 %RV
+; CHECK: %c21 = and i32 %X, 255
+; CHECK: ret i32 %c21
+}
+
+define i32 @test22(i32 %X) {
+ %c1 = trunc i32 %X to i8 ; <i8> [#uses=1]
+ ;; sext -> zext -> and -> nop
+ %c2 = sext i8 %c1 to i32 ; <i32> [#uses=1]
+ %RV = shl i32 %c2, 24 ; <i32> [#uses=1]
+ ret i32 %RV
+; CHECK: shl i32 %X, 24
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test23(i32 %X) {
+ ;; Turn into an AND even though X
+ %c1 = trunc i32 %X to i16 ; <i16> [#uses=1]
+ ;; and Z are signed.
+ %c2 = zext i16 %c1 to i32 ; <i32> [#uses=1]
+ ret i32 %c2
+; CHECK: %c2 = and i32 %X, 65535
+; CHECK: ret i32 %c2
+}
+
+define i1 @test24(i1 %C) {
+ %X = select i1 %C, i32 14, i32 1234 ; <i32> [#uses=1]
+ ;; Fold cast into select
+ %c = icmp ne i32 %X, 0 ; <i1> [#uses=1]
+ ret i1 %c
+; CHECK: ret i1 true
+}
+
+define void @test25(i32** %P) {
+ %c = bitcast i32** %P to float** ; <float**> [#uses=1]
+ ;; Fold cast into null
+ store float* null, float** %c
+ ret void
+; CHECK: store i32* null, i32** %P
+; CHECK: ret void
+}
+
+define i32 @test26(float %F) {
+ ;; no need to cast from float->double.
+ %c = fpext float %F to double ; <double> [#uses=1]
+ %D = fptosi double %c to i32 ; <i32> [#uses=1]
+ ret i32 %D
+; CHECK: %D = fptosi float %F to i32
+; CHECK: ret i32 %D
+}
+
+define [4 x float]* @test27([9 x [4 x float]]* %A) {
+ %c = bitcast [9 x [4 x float]]* %A to [4 x float]* ; <[4 x float]*> [#uses=1]
+ ret [4 x float]* %c
+; CHECK: %c = getelementptr inbounds [9 x [4 x float]]* %A, i64 0, i64 0
+; CHECK: ret [4 x float]* %c
+}
+
+define float* @test28([4 x float]* %A) {
+ %c = bitcast [4 x float]* %A to float* ; <float*> [#uses=1]
+ ret float* %c
+; CHECK: %c = getelementptr inbounds [4 x float]* %A, i64 0, i64 0
+; CHECK: ret float* %c
+}
+
+define i32 @test29(i32 %c1, i32 %c2) {
+ %tmp1 = trunc i32 %c1 to i8 ; <i8> [#uses=1]
+ %tmp4.mask = trunc i32 %c2 to i8 ; <i8> [#uses=1]
+ %tmp = or i8 %tmp4.mask, %tmp1 ; <i8> [#uses=1]
+ %tmp10 = zext i8 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp10
+; CHECK: %tmp2 = or i32 %c2, %c1
+; CHECK: %tmp10 = and i32 %tmp2, 255
+; CHECK: ret i32 %tmp10
+}
+
+define i32 @test30(i32 %c1) {
+ %c2 = trunc i32 %c1 to i8 ; <i8> [#uses=1]
+ %c3 = xor i8 %c2, 1 ; <i8> [#uses=1]
+ %c4 = zext i8 %c3 to i32 ; <i32> [#uses=1]
+ ret i32 %c4
+; CHECK: %c3 = and i32 %c1, 255
+; CHECK: %c4 = xor i32 %c3, 1
+; CHECK: ret i32 %c4
+}
+
+define i1 @test31(i64 %A) {
+ %B = trunc i64 %A to i32 ; <i32> [#uses=1]
+ %C = and i32 %B, 42 ; <i32> [#uses=1]
+ %D = icmp eq i32 %C, 10 ; <i1> [#uses=1]
+ ret i1 %D
+; CHECK: %C1 = and i64 %A, 42
+; CHECK: %D = icmp eq i64 %C1, 10
+; CHECK: ret i1 %D
+}
+
+define void @test32(double** %tmp) {
+ %tmp8 = malloc [16 x i8] ; <[16 x i8]*> [#uses=1]
+ %tmp8.upgrd.1 = bitcast [16 x i8]* %tmp8 to double* ; <double*> [#uses=1]
+ store double* %tmp8.upgrd.1, double** %tmp
+ ret void
+; CHECK: %malloccall = tail call i8* @malloc(i32 16)
+; CHECK: %tmp8.upgrd.1 = bitcast i8* %malloccall to double*
+; CHECK: store double* %tmp8.upgrd.1, double** %tmp
+; CHECK: ret void
+}
+
+define i32 @test33(i32 %c1) {
+ %x = bitcast i32 %c1 to float ; <float> [#uses=1]
+ %y = bitcast float %x to i32 ; <i32> [#uses=1]
+ ret i32 %y
+; CHECK: ret i32 %c1
+}
+
+define i16 @test34(i16 %a) {
+ %c1 = zext i16 %a to i32 ; <i32> [#uses=1]
+ %tmp21 = lshr i32 %c1, 8 ; <i32> [#uses=1]
+ %c2 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
+ ret i16 %c2
+; CHECK: %tmp21 = lshr i16 %a, 8
+; CHECK: ret i16 %tmp21
+}
+
+define i16 @test35(i16 %a) {
+ %c1 = bitcast i16 %a to i16 ; <i16> [#uses=1]
+ %tmp2 = lshr i16 %c1, 8 ; <i16> [#uses=1]
+ %c2 = bitcast i16 %tmp2 to i16 ; <i16> [#uses=1]
+ ret i16 %c2
+; CHECK: %tmp2 = lshr i16 %a, 8
+; CHECK: ret i16 %tmp2
+}
+
+; icmp sgt i32 %a, -1
+; rdar://6480391
+define i1 @test36(i32 %a) {
+ %b = lshr i32 %a, 31
+ %c = trunc i32 %b to i8
+ %d = icmp eq i8 %c, 0
+ ret i1 %d
+; CHECK: %d = icmp sgt i32 %a, -1
+; CHECK: ret i1 %d
+}
+
+; ret i1 false
+define i1 @test37(i32 %a) {
+ %b = lshr i32 %a, 31
+ %c = or i32 %b, 512
+ %d = trunc i32 %c to i8
+ %e = icmp eq i8 %d, 11
+ ret i1 %e
+; CHECK: ret i1 false
+}
+
+define i64 @test38(i32 %a) {
+ %1 = icmp eq i32 %a, -2
+ %2 = zext i1 %1 to i8
+ %3 = xor i8 %2, 1
+ %4 = zext i8 %3 to i64
+ ret i64 %4
+; CHECK: %1 = icmp ne i32 %a, -2
+; CHECK: %2 = zext i1 %1 to i64
+; CHECK: ret i64 %2
+}
+
+define i16 @test39(i16 %a) {
+ %tmp = zext i16 %a to i32
+ %tmp21 = lshr i32 %tmp, 8
+ %tmp5 = shl i32 %tmp, 8
+ %tmp.upgrd.32 = or i32 %tmp21, %tmp5
+ %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16
+ ret i16 %tmp.upgrd.3
+; CHECK: @test39
+; CHECK: %tmp.upgrd.32 = call i16 @llvm.bswap.i16(i16 %a)
+; CHECK: ret i16 %tmp.upgrd.32
+}
+
+define i16 @test40(i16 %a) {
+ %tmp = zext i16 %a to i32
+ %tmp21 = lshr i32 %tmp, 9
+ %tmp5 = shl i32 %tmp, 8
+ %tmp.upgrd.32 = or i32 %tmp21, %tmp5
+ %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16
+ ret i16 %tmp.upgrd.3
+; CHECK: @test40
+; CHECK: %tmp21 = lshr i16 %a, 9
+; CHECK: %tmp5 = shl i16 %a, 8
+; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
+; CHECK: ret i16 %tmp.upgrd.32
+}
+
+; PR1263
+define i32* @test41(i32* %tmp1) {
+ %tmp64 = bitcast i32* %tmp1 to { i32 }*
+ %tmp65 = getelementptr { i32 }* %tmp64, i32 0, i32 0
+ ret i32* %tmp65
+; CHECK: @test41
+; CHECK: ret i32* %tmp1
+}
+
+define i32 @test42(i32 %X) {
+ %Y = trunc i32 %X to i8 ; <i8> [#uses=1]
+ %Z = zext i8 %Y to i32 ; <i32> [#uses=1]
+ ret i32 %Z
+; CHECK: @test42
+; CHECK: %Z = and i32 %X, 255
+}
+
+; rdar://6598839
+define zeroext i64 @test43(i8 zeroext %on_off) nounwind readonly {
+ %A = zext i8 %on_off to i32
+ %B = add i32 %A, -1
+ %C = sext i32 %B to i64
+ ret i64 %C ;; Should be (add (zext i8 -> i64), -1)
+; CHECK: @test43
+; CHECK-NEXT: %A = zext i8 %on_off to i64
+; CHECK-NEXT: %B = add i64 %A, -1
+; CHECK-NEXT: ret i64 %B
+}
+
+define i64 @test44(i8 %T) {
+ %A = zext i8 %T to i16
+ %B = or i16 %A, 1234
+ %C = zext i16 %B to i64
+ ret i64 %C
+; CHECK: @test44
+; CHECK-NEXT: %A = zext i8 %T to i64
+; CHECK-NEXT: %B = or i64 %A, 1234
+; CHECK-NEXT: ret i64 %B
+}
+
+define i64 @test45(i8 %A, i64 %Q) {
+ %D = trunc i64 %Q to i32 ;; should be removed
+ %B = sext i8 %A to i32
+ %C = or i32 %B, %D
+ %E = zext i32 %C to i64
+ ret i64 %E
+; CHECK: @test45
+; CHECK-NEXT: %B = sext i8 %A to i64
+; CHECK-NEXT: %C = or i64 %B, %Q
+; CHECK-NEXT: %E = and i64 %C, 4294967295
+; CHECK-NEXT: ret i64 %E
+}
+
+
+define i64 @test46(i64 %A) {
+ %B = trunc i64 %A to i32
+ %C = and i32 %B, 42
+ %D = shl i32 %C, 8
+ %E = zext i32 %D to i64
+ ret i64 %E
+; CHECK: @test46
+; CHECK-NEXT: %C = shl i64 %A, 8
+; CHECK-NEXT: %D = and i64 %C, 10752
+; CHECK-NEXT: ret i64 %D
+}
+
+define i64 @test47(i8 %A) {
+ %B = sext i8 %A to i32
+ %C = or i32 %B, 42
+ %E = zext i32 %C to i64
+ ret i64 %E
+; CHECK: @test47
+; CHECK-NEXT: %B = sext i8 %A to i64
+; CHECK-NEXT: %C = or i64 %B, 42
+; CHECK-NEXT: %E = and i64 %C, 4294967295
+; CHECK-NEXT: ret i64 %E
+}
+
+define i64 @test48(i8 %A, i8 %a) {
+ %b = zext i8 %a to i32
+ %B = zext i8 %A to i32
+ %C = shl i32 %B, 8
+ %D = or i32 %C, %b
+ %E = zext i32 %D to i64
+ ret i64 %E
+; CHECK: @test48
+; CHECK-NEXT: %b = zext i8 %a to i64
+; CHECK-NEXT: %B = zext i8 %A to i64
+; CHECK-NEXT: %C = shl i64 %B, 8
+; CHECK-NEXT: %D = or i64 %C, %b
+; CHECK-NEXT: ret i64 %D
+}
+
+define i64 @test49(i64 %A) {
+ %B = trunc i64 %A to i32
+ %C = or i32 %B, 1
+ %D = sext i32 %C to i64
+ ret i64 %D
+; CHECK: @test49
+; CHECK-NEXT: %C = shl i64 %A, 32
+; CHECK-NEXT: ashr i64 %C, 32
+; CHECK-NEXT: %D = or i64 {{.*}}, 1
+; CHECK-NEXT: ret i64 %D
+}
+
+define i64 @test50(i64 %A) {
+ %a = lshr i64 %A, 2
+ %B = trunc i64 %a to i32
+ %D = add i32 %B, -1
+ %E = sext i32 %D to i64
+ ret i64 %E
+; CHECK: @test50
+; CHECK-NEXT: shl i64 %A, 30
+; CHECK-NEXT: add i64 {{.*}}, -4294967296
+; CHECK-NEXT: %E = ashr i64 {{.*}}, 32
+; CHECK-NEXT: ret i64 %E
+}
+
+define i64 @test51(i64 %A, i1 %cond) {
+ %B = trunc i64 %A to i32
+ %C = and i32 %B, -2
+ %D = or i32 %B, 1
+ %E = select i1 %cond, i32 %C, i32 %D
+ %F = sext i32 %E to i64
+ ret i64 %F
+; CHECK: @test51
+
+; FIXME: disabled, see PR5997
+; HECK-NEXT: %C = and i64 %A, 4294967294
+; HECK-NEXT: %D = or i64 %A, 1
+; HECK-NEXT: %E = select i1 %cond, i64 %C, i64 %D
+; HECK-NEXT: %sext = shl i64 %E, 32
+; HECK-NEXT: %F = ashr i64 %sext, 32
+; HECK-NEXT: ret i64 %F
+}
+
+define i32 @test52(i64 %A) {
+ %B = trunc i64 %A to i16
+ %C = or i16 %B, -32574
+ %D = and i16 %C, -25350
+ %E = zext i16 %D to i32
+ ret i32 %E
+; CHECK: @test52
+; CHECK-NEXT: %B = trunc i64 %A to i32
+; CHECK-NEXT: %C = or i32 %B, 32962
+; CHECK-NEXT: %D = and i32 %C, 40186
+; CHECK-NEXT: ret i32 %D
+}
+
+define i64 @test53(i32 %A) {
+ %B = trunc i32 %A to i16
+ %C = or i16 %B, -32574
+ %D = and i16 %C, -25350
+ %E = zext i16 %D to i64
+ ret i64 %E
+; CHECK: @test53
+; CHECK-NEXT: %B = zext i32 %A to i64
+; CHECK-NEXT: %C = or i64 %B, 32962
+; CHECK-NEXT: %D = and i64 %C, 40186
+; CHECK-NEXT: ret i64 %D
+}
+
+define i32 @test54(i64 %A) {
+ %B = trunc i64 %A to i16
+ %C = or i16 %B, -32574
+ %D = and i16 %C, -25350
+ %E = sext i16 %D to i32
+ ret i32 %E
+; CHECK: @test54
+; CHECK-NEXT: %B = trunc i64 %A to i32
+; CHECK-NEXT: %C = or i32 %B, -32574
+; CHECK-NEXT: %D = and i32 %C, -25350
+; CHECK-NEXT: ret i32 %D
+}
+
+define i64 @test55(i32 %A) {
+ %B = trunc i32 %A to i16
+ %C = or i16 %B, -32574
+ %D = and i16 %C, -25350
+ %E = sext i16 %D to i64
+ ret i64 %E
+; CHECK: @test55
+; CHECK-NEXT: %B = zext i32 %A to i64
+; CHECK-NEXT: %C = or i64 %B, -32574
+; CHECK-NEXT: %D = and i64 %C, -25350
+; CHECK-NEXT: ret i64 %D
+}
+
+define i64 @test56(i16 %A) nounwind {
+ %tmp353 = sext i16 %A to i32
+ %tmp354 = lshr i32 %tmp353, 5
+ %tmp355 = zext i32 %tmp354 to i64
+ ret i64 %tmp355
+; CHECK: @test56
+; CHECK-NEXT: %tmp353 = sext i16 %A to i64
+; CHECK-NEXT: %tmp354 = lshr i64 %tmp353, 5
+; CHECK-NEXT: %tmp355 = and i64 %tmp354, 134217727
+; CHECK-NEXT: ret i64 %tmp355
+}
+
+define i64 @test57(i64 %A) nounwind {
+ %B = trunc i64 %A to i32
+ %C = lshr i32 %B, 8
+ %E = zext i32 %C to i64
+ ret i64 %E
+; CHECK: @test57
+; CHECK-NEXT: %C = lshr i64 %A, 8
+; CHECK-NEXT: %E = and i64 %C, 16777215
+; CHECK-NEXT: ret i64 %E
+}
+
+define i64 @test58(i64 %A) nounwind {
+ %B = trunc i64 %A to i32
+ %C = lshr i32 %B, 8
+ %D = or i32 %C, 128
+ %E = zext i32 %D to i64
+ ret i64 %E
+
+; CHECK: @test58
+; CHECK-NEXT: %C = lshr i64 %A, 8
+; CHECK-NEXT: %D = or i64 %C, 128
+; CHECK-NEXT: %E = and i64 %D, 16777215
+; CHECK-NEXT: ret i64 %E
+}
+
+define i64 @test59(i8 %A, i8 %B) nounwind {
+ %C = zext i8 %A to i32
+ %D = shl i32 %C, 4
+ %E = and i32 %D, 48
+ %F = zext i8 %B to i32
+ %G = lshr i32 %F, 4
+ %H = or i32 %G, %E
+ %I = zext i32 %H to i64
+ ret i64 %I
+; CHECK: @test59
+; CHECK-NEXT: %C = zext i8 %A to i64
+; CHECK-NOT: i32
+; CHECK: %F = zext i8 %B to i64
+; CHECK-NOT: i32
+; CHECK: ret i64 %H
+}
diff --git a/test/Transforms/InstCombine/cast_ptr.ll b/test/Transforms/InstCombine/cast_ptr.ll
new file mode 100644
index 0000000..09910fb
--- /dev/null
+++ b/test/Transforms/InstCombine/cast_ptr.ll
@@ -0,0 +1,79 @@
+; Tests to make sure elimination of casts is working correctly
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "p:32:32"
+
+; This shouldn't convert to getelementptr because the relationship
+; between the arithmetic and the layout of allocated memory is
+; entirely unknown.
+; CHECK: @test1
+; CHECK: ptrtoint
+; CHECK: add
+; CHECK: inttoptr
+define i8* @test1(i8* %t) {
+ %tmpc = ptrtoint i8* %t to i32 ; <i32> [#uses=1]
+ %tmpa = add i32 %tmpc, 32 ; <i32> [#uses=1]
+ %tv = inttoptr i32 %tmpa to i8* ; <i8*> [#uses=1]
+ ret i8* %tv
+}
+
+; These casts should be folded away.
+; CHECK: @test2
+; CHECK: icmp eq i8* %a, %b
+define i1 @test2(i8* %a, i8* %b) {
+ %tmpa = ptrtoint i8* %a to i32 ; <i32> [#uses=1]
+ %tmpb = ptrtoint i8* %b to i32 ; <i32> [#uses=1]
+ %r = icmp eq i32 %tmpa, %tmpb ; <i1> [#uses=1]
+ ret i1 %r
+}
+
+; These casts should also be folded away.
+; CHECK: @test3
+; CHECK: icmp eq i8* %a, @global
+@global = global i8 0
+define i1 @test3(i8* %a) {
+ %tmpa = ptrtoint i8* %a to i32
+ %r = icmp eq i32 %tmpa, ptrtoint (i8* @global to i32)
+ ret i1 %r
+}
+
+define i1 @test4(i32 %A) {
+ %B = inttoptr i32 %A to i8*
+ %C = icmp eq i8* %B, null
+ ret i1 %C
+; CHECK: @test4
+; CHECK-NEXT: %C = icmp eq i32 %A, 0
+; CHECK-NEXT: ret i1 %C
+}
+
+
+; Pulling the cast out of the load allows us to eliminate the load, and then
+; the whole array.
+
+ %op = type { float }
+ %unop = type { i32 }
+@Array = internal constant [1 x %op* (%op*)*] [ %op* (%op*)* @foo ] ; <[1 x %op* (%op*)*]*> [#uses=1]
+
+declare %op* @foo(%op* %X)
+
+define %unop* @test5(%op* %O) {
+ %tmp = load %unop* (%op*)** bitcast ([1 x %op* (%op*)*]* @Array to %unop* (%op*)**); <%unop* (%op*)*> [#uses=1]
+ %tmp.2 = call %unop* %tmp( %op* %O ) ; <%unop*> [#uses=1]
+ ret %unop* %tmp.2
+; CHECK: @test5
+; CHECK: call %op* @foo(%op* %O)
+}
+
+
+
+; InstCombine can not 'load (cast P)' -> cast (load P)' if the cast changes
+; the address space.
+
+define i8 @test6(i8 addrspace(1)* %source) {
+entry:
+ %arrayidx223 = bitcast i8 addrspace(1)* %source to i8*
+ %tmp4 = load i8* %arrayidx223
+ ret i8 %tmp4
+; CHECK: @test6
+; CHECK: load i8* %arrayidx223
+}
diff --git a/test/Transforms/InstCombine/compare-signs.ll b/test/Transforms/InstCombine/compare-signs.ll
new file mode 100644
index 0000000..f8e4911
--- /dev/null
+++ b/test/Transforms/InstCombine/compare-signs.ll
@@ -0,0 +1,58 @@
+; RUN: opt %s -instcombine -S | FileCheck %s
+; PR5438
+
+; TODO: This should also optimize down.
+;define i32 @test1(i32 %a, i32 %b) nounwind readnone {
+;entry:
+; %0 = icmp sgt i32 %a, -1 ; <i1> [#uses=1]
+; %1 = icmp slt i32 %b, 0 ; <i1> [#uses=1]
+; %2 = xor i1 %1, %0 ; <i1> [#uses=1]
+; %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
+; ret i32 %3
+;}
+
+; TODO: This optimizes partially but not all the way.
+;define i32 @test2(i32 %a, i32 %b) nounwind readnone {
+;entry:
+; %0 = and i32 %a, 8 ;<i32> [#uses=1]
+; %1 = and i32 %b, 8 ;<i32> [#uses=1]
+; %2 = icmp eq i32 %0, %1 ;<i1> [#uses=1]
+; %3 = zext i1 %2 to i32 ;<i32> [#uses=1]
+; ret i32 %3
+;}
+
+define i32 @test3(i32 %a, i32 %b) nounwind readnone {
+; CHECK: @test3
+entry:
+; CHECK: xor i32 %a, %b
+; CHECK: lshr i32 %0, 31
+; CHECK: xor i32 %1, 1
+ %0 = lshr i32 %a, 31 ; <i32> [#uses=1]
+ %1 = lshr i32 %b, 31 ; <i32> [#uses=1]
+ %2 = icmp eq i32 %0, %1 ; <i1> [#uses=1]
+ %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
+ ret i32 %3
+; CHECK-NOT: icmp
+; CHECK-NOT: zext
+; CHECK: ret i32 %2
+}
+
+; Variation on @test3: checking the 2nd bit in a situation where the 5th bit
+; is one, not zero.
+define i32 @test3i(i32 %a, i32 %b) nounwind readnone {
+; CHECK: @test3i
+entry:
+; CHECK: xor i32 %a, %b
+; CHECK: lshr i32 %0, 31
+; CHECK: xor i32 %1, 1
+ %0 = lshr i32 %a, 29 ; <i32> [#uses=1]
+ %1 = lshr i32 %b, 29 ; <i32> [#uses=1]
+ %2 = or i32 %0, 35
+ %3 = or i32 %1, 35
+ %4 = icmp eq i32 %2, %3 ; <i1> [#uses=1]
+ %5 = zext i1 %4 to i32 ; <i32> [#uses=1]
+ ret i32 %5
+; CHECK-NOT: icmp
+; CHECK-NOT: zext
+; CHECK: ret i32 %2
+}
diff --git a/test/Transforms/InstCombine/constant-fold-compare.ll b/test/Transforms/InstCombine/constant-fold-compare.ll
new file mode 100644
index 0000000..6e41e2f
--- /dev/null
+++ b/test/Transforms/InstCombine/constant-fold-compare.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+
+define i32 @a() nounwind readnone {
+entry:
+ ret i32 zext (i1 icmp eq (i32 0, i32 ptrtoint (i32 ()* @a to i32)) to i32)
+}
+; CHECK: ret i32 0
diff --git a/test/Transforms/InstCombine/constant-fold-gep.ll b/test/Transforms/InstCombine/constant-fold-gep.ll
new file mode 100644
index 0000000..4be1a9c
--- /dev/null
+++ b/test/Transforms/InstCombine/constant-fold-gep.ll
@@ -0,0 +1,55 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+; Constant folding should fix notionally out-of-bounds indices
+; and add inbounds keywords.
+
+%struct.X = type { [3 x i32], [3 x i32] }
+
+@Y = internal global [3 x %struct.X] zeroinitializer
+
+define void @frob() {
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 0), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 0), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 1), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 1), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 2), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 2), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 1, i64 0), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 3), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 1, i64 1), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 4), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 0, i32 1, i64 2), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 5), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 1, i32 0, i64 0), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 6), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 1, i32 0, i64 1), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 7), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 1, i32 0, i64 2), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 8), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 1, i32 1, i64 0), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 9), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 1, i32 1, i64 1), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 10), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 1, i32 1, i64 2), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 11), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 2, i32 0, i64 0), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 12), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 2, i32 0, i64 1), align 4
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 13), align 4
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 2, i32 0, i64 2), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 14), align 8
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 2, i32 1, i64 0), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 15), align 8
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 2, i32 1, i64 1), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 16), align 8
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 0, i64 2, i32 1, i64 2), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 17), align 8
+; CHECK: store i32 1, i32* getelementptr inbounds ([3 x %struct.X]* @Y, i64 1, i64 0, i32 0, i64 0), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 18), align 8
+; CHECK: store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 2, i64 0, i32 0, i64 0), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 36), align 8
+; CHECK: store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 1, i64 0, i32 0, i64 1), align 8
+ store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 19), align 8
+ ret void
+}
diff --git a/test/Transforms/InstCombine/constant-fold-ptr-casts.ll b/test/Transforms/InstCombine/constant-fold-ptr-casts.ll
new file mode 100644
index 0000000..9b6c6c3
--- /dev/null
+++ b/test/Transforms/InstCombine/constant-fold-ptr-casts.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine -S | grep {ret i32 2143034560}
+
+; Instcombine should be able to completely fold this code.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+@bar = constant [3 x i64] [i64 9220983451228067448, i64 9220983451228067449, i64 9220983450959631991], align 8
+
+define i32 @foo() nounwind {
+entry:
+ %tmp87.2 = load i64* inttoptr (i32 add (i32 16, i32 ptrtoint ([3 x i64]* @bar to i32)) to i64*), align 8
+ %t0 = bitcast i64 %tmp87.2 to double
+ %tmp9192.2 = fptrunc double %t0 to float
+ %t1 = bitcast float %tmp9192.2 to i32
+ ret i32 %t1
+}
+
diff --git a/test/Transforms/InstCombine/crash.ll b/test/Transforms/InstCombine/crash.ll
new file mode 100644
index 0000000..2faa539
--- /dev/null
+++ b/test/Transforms/InstCombine/crash.ll
@@ -0,0 +1,239 @@
+; RUN: opt < %s -instcombine -S
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128:n8:16:32"
+target triple = "i386-apple-darwin10.0"
+
+define i32 @test0(i8 %tmp2) ssp {
+entry:
+ %tmp3 = zext i8 %tmp2 to i32
+ %tmp8 = lshr i32 %tmp3, 6
+ %tmp9 = lshr i32 %tmp3, 7
+ %tmp10 = xor i32 %tmp9, 67108858
+ %tmp11 = xor i32 %tmp10, %tmp8
+ %tmp12 = xor i32 %tmp11, 0
+ ret i32 %tmp12
+}
+
+; PR4905
+define <2 x i64> @test1(<2 x i64> %x, <2 x i64> %y) nounwind {
+entry:
+ %conv.i94 = bitcast <2 x i64> %y to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %sub.i97 = sub <4 x i32> %conv.i94, undef ; <<4 x i32>> [#uses=1]
+ %conv3.i98 = bitcast <4 x i32> %sub.i97 to <2 x i64> ; <<2 x i64>> [#uses=2]
+ %conv2.i86 = bitcast <2 x i64> %conv3.i98 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %cmp.i87 = icmp sgt <4 x i32> undef, %conv2.i86 ; <<4 x i1>> [#uses=1]
+ %sext.i88 = sext <4 x i1> %cmp.i87 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %conv3.i89 = bitcast <4 x i32> %sext.i88 to <2 x i64> ; <<2 x i64>> [#uses=1]
+ %and.i = and <2 x i64> %conv3.i89, %conv3.i98 ; <<2 x i64>> [#uses=1]
+ %or.i = or <2 x i64> zeroinitializer, %and.i ; <<2 x i64>> [#uses=1]
+ %conv2.i43 = bitcast <2 x i64> %or.i to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %sub.i = sub <4 x i32> zeroinitializer, %conv2.i43 ; <<4 x i32>> [#uses=1]
+ %conv3.i44 = bitcast <4 x i32> %sub.i to <2 x i64> ; <<2 x i64>> [#uses=1]
+ ret <2 x i64> %conv3.i44
+}
+
+
+; PR4908
+define void @test2(<1 x i16>* nocapture %b, i32* nocapture %c) nounwind ssp {
+entry:
+ %arrayidx = getelementptr inbounds <1 x i16>* %b, i64 undef ; <<1 x i16>*>
+ %tmp2 = load <1 x i16>* %arrayidx ; <<1 x i16>> [#uses=1]
+ %tmp6 = bitcast <1 x i16> %tmp2 to i16 ; <i16> [#uses=1]
+ %tmp7 = zext i16 %tmp6 to i32 ; <i32> [#uses=1]
+ %ins = or i32 0, %tmp7 ; <i32> [#uses=1]
+ %arrayidx20 = getelementptr inbounds i32* %c, i64 undef ; <i32*> [#uses=1]
+ store i32 %ins, i32* %arrayidx20
+ ret void
+}
+
+; PR5262
+@tmp2 = global i64 0 ; <i64*> [#uses=1]
+
+declare void @use(i64) nounwind
+
+define void @foo(i1) nounwind align 2 {
+; <label>:1
+ br i1 %0, label %2, label %3
+
+; <label>:2 ; preds = %1
+ br label %3
+
+; <label>:3 ; preds = %2, %1
+ %4 = phi i8 [ 1, %2 ], [ 0, %1 ] ; <i8> [#uses=1]
+ %5 = icmp eq i8 %4, 0 ; <i1> [#uses=1]
+ %6 = load i64* @tmp2, align 8 ; <i64> [#uses=1]
+ %7 = select i1 %5, i64 0, i64 %6 ; <i64> [#uses=1]
+ br label %8
+
+; <label>:8 ; preds = %3
+ call void @use(i64 %7)
+ ret void
+}
+
+%t0 = type { i32, i32 }
+%t1 = type { i32, i32, i32, i32, i32* }
+
+declare %t0* @bar2(i64)
+
+define void @bar3(i1, i1) nounwind align 2 {
+; <label>:2
+ br i1 %1, label %10, label %3
+
+; <label>:3 ; preds = %2
+ %4 = getelementptr inbounds %t0* null, i64 0, i32 1 ; <i32*> [#uses=0]
+ %5 = getelementptr inbounds %t1* null, i64 0, i32 4 ; <i32**> [#uses=1]
+ %6 = load i32** %5, align 8 ; <i32*> [#uses=1]
+ %7 = icmp ne i32* %6, null ; <i1> [#uses=1]
+ %8 = zext i1 %7 to i32 ; <i32> [#uses=1]
+ %9 = add i32 %8, 0 ; <i32> [#uses=1]
+ br label %10
+
+; <label>:10 ; preds = %3, %2
+ %11 = phi i32 [ %9, %3 ], [ 0, %2 ] ; <i32> [#uses=1]
+ br i1 %1, label %12, label %13
+
+; <label>:12 ; preds = %10
+ br label %13
+
+; <label>:13 ; preds = %12, %10
+ %14 = zext i32 %11 to i64 ; <i64> [#uses=1]
+ %15 = tail call %t0* @bar2(i64 %14) nounwind ; <%0*> [#uses=0]
+ ret void
+}
+
+
+
+
+; PR5262
+; Make sure the PHI node gets put in a place where all of its operands dominate
+; it.
+define i64 @test4(i1 %c, i64* %P) nounwind align 2 {
+BB0:
+ br i1 %c, label %BB1, label %BB2
+
+BB1:
+ br label %BB2
+
+BB2:
+ %v5_ = phi i1 [ true, %BB0], [false, %BB1]
+ %v6 = load i64* %P
+ br label %l8
+
+l8:
+ br label %l10
+
+l10:
+ %v11 = select i1 %v5_, i64 0, i64 %v6
+ ret i64 %v11
+}
+
+; PR5471
+define arm_apcscc i32 @test5a() {
+ ret i32 0
+}
+
+define arm_apcscc void @test5() {
+ store i1 true, i1* undef
+ %1 = invoke i32 @test5a() to label %exit unwind label %exit
+exit:
+ ret void
+}
+
+
+; PR5673
+
+@test6g = external global i32*
+
+define arm_aapcs_vfpcc i32 @test6(i32 %argc, i8** %argv) nounwind {
+entry:
+ store i32* getelementptr (i32* bitcast (i32 (i32, i8**)* @test6 to i32*), i32 -2048), i32** @test6g, align 4
+ unreachable
+}
+
+
+; PR5827
+
+%class.RuleBasedBreakIterator = type { i64 ()* }
+%class.UStack = type { i8** }
+
+define i32 @_ZN22RuleBasedBreakIterator15checkDictionaryEi(%class.RuleBasedBreakIterator* %this, i32 %x) align 2 {
+entry:
+ %breaks = alloca %class.UStack, align 4 ; <%class.UStack*> [#uses=3]
+ call void @_ZN6UStackC1Ei(%class.UStack* %breaks, i32 0)
+ %tobool = icmp ne i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %tobool, label %cond.end, label %cond.false
+
+terminate.handler: ; preds = %ehcleanup
+ %exc = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %0 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exc, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+ehcleanup: ; preds = %cond.false
+ %exc1 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %1 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exc1, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ invoke void @_ZN6UStackD1Ev(%class.UStack* %breaks)
+ to label %cont unwind label %terminate.handler
+
+cont: ; preds = %ehcleanup
+ call void @_Unwind_Resume_or_Rethrow(i8* %exc1)
+ unreachable
+
+cond.false: ; preds = %entry
+ %tmp4 = getelementptr inbounds %class.RuleBasedBreakIterator* %this, i32 0, i32 0 ; <i64 ()**> [#uses=1]
+ %tmp5 = load i64 ()** %tmp4 ; <i64 ()*> [#uses=1]
+ %call = invoke i64 %tmp5()
+ to label %cond.end unwind label %ehcleanup ; <i64> [#uses=1]
+
+cond.end: ; preds = %cond.false, %entry
+ %cond = phi i64 [ 0, %entry ], [ %call, %cond.false ] ; <i64> [#uses=1]
+ %conv = trunc i64 %cond to i32 ; <i32> [#uses=1]
+ call void @_ZN6UStackD1Ev(%class.UStack* %breaks)
+ ret i32 %conv
+}
+
+declare void @_ZN6UStackC1Ei(%class.UStack*, i32)
+
+declare void @_ZN6UStackD1Ev(%class.UStack*)
+
+declare i32 @__gxx_personality_v0(...)
+
+declare i8* @llvm.eh.exception() nounwind readonly
+
+declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind
+
+declare void @_ZSt9terminatev()
+
+declare void @_Unwind_Resume_or_Rethrow(i8*)
+
+
+
+; rdar://7590304
+define i8* @test10(i8* %self, i8* %tmp3) {
+entry:
+ store i1 true, i1* undef
+ store i1 true, i1* undef
+ invoke arm_apcscc void @test10a()
+ to label %invoke.cont unwind label %try.handler ; <i8*> [#uses=0]
+
+invoke.cont: ; preds = %entry
+ unreachable
+
+try.handler: ; preds = %entry
+ ret i8* %self
+}
+
+define void @test10a() {
+ ret void
+}
+
+
+; PR6193
+define i32 @test11(i32 %aMaskWidth, i8 %aStride) nounwind {
+entry:
+ %conv41 = sext i8 %aStride to i32
+ %neg = xor i32 %conv41, -1
+ %and42 = and i32 %aMaskWidth, %neg
+ %and47 = and i32 130, %conv41
+ %or = or i32 %and42, %and47
+ ret i32 %or
+}
diff --git a/test/Transforms/InstCombine/dce-iterate.ll b/test/Transforms/InstCombine/dce-iterate.ll
new file mode 100644
index 0000000..1d2cc53
--- /dev/null
+++ b/test/Transforms/InstCombine/dce-iterate.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -instcombine -S | grep {ret double .sy}
+
+define internal double @ScaleObjectAdd(double %sx, double %sy, double %sz) nounwind {
+entry:
+ %sx34 = bitcast double %sx to i64 ; <i64> [#uses=1]
+ %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1]
+ %sy22 = bitcast double %sy to i64 ; <i64> [#uses=1]
+ %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1]
+ %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1]
+ %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1]
+ %sz10 = bitcast double %sz to i64 ; <i64> [#uses=1]
+ %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1]
+ %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1]
+ %sz101112.ins = or i960 %sy222324.ins, %sz101112
+
+ %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1]
+ %b = bitcast i64 %a to double ; <double> [#uses=1]
+ %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1]
+ %d = trunc i960 %c to i64 ; <i64> [#uses=1]
+ %e = bitcast i64 %d to double ; <double> [#uses=1]
+ %f = fadd double %b, %e
+
+ ret double %e
+}
diff --git a/test/Transforms/InstCombine/deadcode.ll b/test/Transforms/InstCombine/deadcode.ll
new file mode 100644
index 0000000..52af0ef
--- /dev/null
+++ b/test/Transforms/InstCombine/deadcode.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -instcombine -S | grep {ret i32 %A}
+; RUN: opt < %s -die -S | not grep call.*llvm.stacksave
+
+define i32 @test(i32 %A) {
+ %X = or i1 false, false
+ br i1 %X, label %T, label %C
+
+T: ; preds = %0
+ %B = add i32 %A, 1
+ br label %C
+
+C: ; preds = %T, %0
+ %C.upgrd.1 = phi i32 [ %B, %T ], [ %A, %0 ]
+ ret i32 %C.upgrd.1
+}
+
+define i32* @test2(i32 %width) {
+ %tmp = call i8* @llvm.stacksave( )
+ %tmp14 = alloca i32, i32 %width
+ ret i32* %tmp14
+}
+
+declare i8* @llvm.stacksave()
+
diff --git a/test/Transforms/InstCombine/dg.exp b/test/Transforms/InstCombine/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/InstCombine/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/InstCombine/div-cmp-overflow.ll b/test/Transforms/InstCombine/div-cmp-overflow.ll
new file mode 100644
index 0000000..6f63adc
--- /dev/null
+++ b/test/Transforms/InstCombine/div-cmp-overflow.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | not grep sdiv
+; PR2740
+
+define i1 @func_75(i32 %i2) nounwind {
+ %i3 = sdiv i32 %i2, -1328634635
+ %i4 = icmp eq i32 %i3, -1
+ ret i1 %i4
+}
diff --git a/test/Transforms/InstCombine/div.ll b/test/Transforms/InstCombine/div.ll
new file mode 100644
index 0000000..0d13980
--- /dev/null
+++ b/test/Transforms/InstCombine/div.ll
@@ -0,0 +1,84 @@
+; This test makes sure that div instructions are properly eliminated.
+
+; RUN: opt < %s -instcombine -S | not grep div
+
+define i32 @test1(i32 %A) {
+ %B = sdiv i32 %A, 1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test2(i32 %A) {
+ ; => Shift
+ %B = udiv i32 %A, 8 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test3(i32 %A) {
+ ; => 0, don't need to keep traps
+ %B = sdiv i32 0, %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test4(i32 %A) {
+ ; 0-A
+ %B = sdiv i32 %A, -1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test5(i32 %A) {
+ %B = udiv i32 %A, -16 ; <i32> [#uses=1]
+ %C = udiv i32 %B, -4 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i1 @test6(i32 %A) {
+ %B = udiv i32 %A, 123 ; <i32> [#uses=1]
+ ; A < 123
+ %C = icmp eq i32 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test7(i32 %A) {
+ %B = udiv i32 %A, 10 ; <i32> [#uses=1]
+ ; A >= 20 && A < 30
+ %C = icmp eq i32 %B, 2 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test8(i8 %A) {
+ %B = udiv i8 %A, 123 ; <i8> [#uses=1]
+ ; A >= 246
+ %C = icmp eq i8 %B, 2 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test9(i8 %A) {
+ %B = udiv i8 %A, 123 ; <i8> [#uses=1]
+ ; A < 246
+ %C = icmp ne i8 %B, 2 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i32 @test10(i32 %X, i1 %C) {
+ %V = select i1 %C, i32 64, i32 8 ; <i32> [#uses=1]
+ %R = udiv i32 %X, %V ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @test11(i32 %X, i1 %C) {
+ %A = select i1 %C, i32 1024, i32 32 ; <i32> [#uses=1]
+ %B = udiv i32 %X, %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+; PR2328
+define i32 @test12(i32 %x) nounwind {
+ %tmp3 = udiv i32 %x, %x ; 1
+ ret i32 %tmp3
+}
+
+define i32 @test13(i32 %x) nounwind {
+ %tmp3 = sdiv i32 %x, %x ; 1
+ ret i32 %tmp3
+}
+
diff --git a/test/Transforms/InstCombine/enforce-known-alignment.ll b/test/Transforms/InstCombine/enforce-known-alignment.ll
new file mode 100644
index 0000000..9e9be7f
--- /dev/null
+++ b/test/Transforms/InstCombine/enforce-known-alignment.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine -S | grep alloca | grep {align 16}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+
+define void @foo(i32) {
+ %2 = alloca [3 x <{ { { [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 } } }>], align 16 ; <[3 x <{ { { [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 } } }>]*> [#uses=1]
+ %3 = getelementptr [3 x <{ { { [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 } } }>]* %2, i32 0, i32 0 ; <<{ { { [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 } } }>*> [#uses=1]
+ %4 = getelementptr <{ { { [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 } } }>* %3, i32 0, i32 0 ; <{ { [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 } }*> [#uses=1]
+ %5 = getelementptr { { [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 } }* %4, i32 0, i32 0 ; <{ [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 }*> [#uses=1]
+ %6 = bitcast { [2 x { { i32 } }], [2 x i8], { i16 }, [2 x i8], i8, i8 }* %5 to { [8 x i16] }* ; <{ [8 x i16] }*> [#uses=1]
+ %7 = getelementptr { [8 x i16] }* %6, i32 0, i32 0 ; <[8 x i16]*> [#uses=1]
+ %8 = getelementptr [8 x i16]* %7, i32 0, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %8, align 16
+ call void @bar(i16* %8)
+ ret void
+}
+
+declare void @bar(i16*)
diff --git a/test/Transforms/InstCombine/exact-sdiv.ll b/test/Transforms/InstCombine/exact-sdiv.ll
new file mode 100644
index 0000000..e567754
--- /dev/null
+++ b/test/Transforms/InstCombine/exact-sdiv.ll
@@ -0,0 +1,52 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; CHECK: define i32 @foo
+; CHECK: sdiv i32 %x, 8
+define i32 @foo(i32 %x) {
+ %y = sdiv i32 %x, 8
+ ret i32 %y
+}
+
+; CHECK: define i32 @bar
+; CHECK: ashr i32 %x, 3
+define i32 @bar(i32 %x) {
+ %y = sdiv exact i32 %x, 8
+ ret i32 %y
+}
+
+; CHECK: i32 @a0
+; CHECK: %y = srem i32 %x, 3
+; CHECK: %z = sub i32 %x, %y
+; CHECK: ret i32 %z
+define i32 @a0(i32 %x) {
+ %y = sdiv i32 %x, 3
+ %z = mul i32 %y, 3
+ ret i32 %z
+}
+
+; CHECK: i32 @b0
+; CHECK: ret i32 %x
+define i32 @b0(i32 %x) {
+ %y = sdiv exact i32 %x, 3
+ %z = mul i32 %y, 3
+ ret i32 %z
+}
+
+; CHECK: i32 @a1
+; CHECK: %y = srem i32 %x, 3
+; CHECK: %z = sub i32 %y, %x
+; CHECK: ret i32 %z
+define i32 @a1(i32 %x) {
+ %y = sdiv i32 %x, 3
+ %z = mul i32 %y, -3
+ ret i32 %z
+}
+
+; CHECK: i32 @b1
+; CHECK: %z = sub i32 0, %x
+; CHECK: ret i32 %z
+define i32 @b1(i32 %x) {
+ %y = sdiv exact i32 %x, 3
+ %z = mul i32 %y, -3
+ ret i32 %z
+}
diff --git a/test/Transforms/InstCombine/extractvalue.ll b/test/Transforms/InstCombine/extractvalue.ll
new file mode 100644
index 0000000..875f860
--- /dev/null
+++ b/test/Transforms/InstCombine/extractvalue.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -instcombine -S | not grep extractvalue
+
+; Instcombine should fold various combinations of insertvalue and extractvalue
+; together
+declare void @bar({i32, i32} %a)
+
+define i32 @foo() {
+ ; Build a simple struct and pull values out again
+ %s1.1 = insertvalue {i32, i32} undef, i32 0, 0
+ %s1 = insertvalue {i32, i32} %s1.1, i32 1, 1
+ %v1 = extractvalue {i32, i32} %s1, 0
+ %v2 = extractvalue {i32, i32} %s1, 1
+
+ ; Build a nested struct and pull a sub struct out of it
+ ; This requires instcombine to insert a few insertvalue instructions
+ %ns1.1 = insertvalue {i32, {i32, i32}} undef, i32 %v1, 0
+ %ns1.2 = insertvalue {i32, {i32, i32}} %ns1.1, i32 %v1, 1, 0
+ %ns1 = insertvalue {i32, {i32, i32}} %ns1.2, i32 %v2, 1, 1
+ %s2 = extractvalue {i32, {i32, i32}} %ns1, 1
+ %v3 = extractvalue {i32, {i32, i32}} %ns1, 1, 1
+ call void @bar({i32, i32} %s2)
+
+ ; Use nested extractvalues to get to a value
+ %s3 = extractvalue {i32, {i32, i32}} %ns1, 1
+ %v4 = extractvalue {i32, i32} %s3, 1
+ call void @bar({i32, i32} %s3)
+
+ ; Use nested insertvalues to build a nested struct
+ %s4.1 = insertvalue {i32, i32} undef, i32 %v3, 0
+ %s4 = insertvalue {i32, i32} %s4.1, i32 %v4, 1
+ %ns2 = insertvalue {i32, {i32, i32}} undef, {i32, i32} %s4, 1
+
+ ; And now extract a single value from there
+ %v5 = extractvalue {i32, {i32, i32}} %ns2, 1, 1
+
+ ret i32 %v5
+}
+
diff --git a/test/Transforms/InstCombine/fold-bin-operand.ll b/test/Transforms/InstCombine/fold-bin-operand.ll
new file mode 100644
index 0000000..d0d072a
--- /dev/null
+++ b/test/Transforms/InstCombine/fold-bin-operand.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | not grep icmp
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+define i1 @f(i1 %x) {
+ %b = and i1 %x, icmp eq (i8* inttoptr (i32 1 to i8*), i8* inttoptr (i32 2 to i8*))
+ ret i1 %b
+}
+
+; FIXME: This doesn't fold at the moment!
+; define i32 @f(i32 %x) {
+; %b = add i32 %x, zext (i1 icmp eq (i8* inttoptr (i32 1000000 to i8*), i8* inttoptr (i32 2000000 to i8*)) to i32)
+; ret i32 %b
+;}
+
diff --git a/test/Transforms/InstCombine/fold-vector-zero.ll b/test/Transforms/InstCombine/fold-vector-zero.ll
new file mode 100644
index 0000000..e1d86b6
--- /dev/null
+++ b/test/Transforms/InstCombine/fold-vector-zero.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -instcombine -S | not grep zeroinitializer
+
+define void @foo(i64 %A, i64 %B) {
+bb8:
+ br label %bb30
+
+bb30:
+ %s0 = phi i64 [ 0, %bb8 ], [ %r21, %bb30 ]
+ %l0 = phi i64 [ -2222, %bb8 ], [ %r23, %bb30 ]
+ %r2 = add i64 %s0, %B
+ %r3 = inttoptr i64 %r2 to <2 x double>*
+ %r4 = load <2 x double>* %r3, align 8
+ %r6 = bitcast <2 x double> %r4 to <2 x i64>
+ %r7 = bitcast <2 x double> zeroinitializer to <2 x i64>
+ %r8 = insertelement <2 x i64> undef, i64 9223372036854775807, i32 0
+ %r9 = insertelement <2 x i64> undef, i64 -9223372036854775808, i32 0
+ %r10 = insertelement <2 x i64> %r8, i64 9223372036854775807, i32 1
+ %r11 = insertelement <2 x i64> %r9, i64 -9223372036854775808, i32 1
+ %r12 = and <2 x i64> %r6, %r10
+ %r13 = and <2 x i64> %r7, %r11
+ %r14 = or <2 x i64> %r12, %r13
+ %r15 = bitcast <2 x i64> %r14 to <2 x double>
+ %r18 = add i64 %s0, %A
+ %r19 = inttoptr i64 %r18 to <2 x double>*
+ store <2 x double> %r15, <2 x double>* %r19, align 8
+ %r21 = add i64 16, %s0
+ %r23 = add i64 1, %l0
+ %r25 = icmp slt i64 %r23, 0
+ %r26 = zext i1 %r25 to i64
+ %r27 = icmp ne i64 %r26, 0
+ br i1 %r27, label %bb30, label %bb5
+
+bb5:
+ ret void
+}
diff --git a/test/Transforms/InstCombine/fp-ret-bitcast.ll b/test/Transforms/InstCombine/fp-ret-bitcast.ll
new file mode 100644
index 0000000..35ece42
--- /dev/null
+++ b/test/Transforms/InstCombine/fp-ret-bitcast.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {call float bitcast} | count 1
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+ %struct.NSObject = type { %struct.objc_class* }
+ %struct.NSArray = type { %struct.NSObject }
+ %struct.objc_class = type opaque
+ %struct.objc_selector = type opaque
+
+@"\01L_OBJC_METH_VAR_NAME_112" = internal global [15 x i8] c"whiteComponent\00", section "__TEXT,__cstring,cstring_literals"
+@"\01L_OBJC_SELECTOR_REFERENCES_81" = internal global %struct.objc_selector* bitcast ([15 x i8]* @"\01L_OBJC_METH_VAR_NAME_112" to %struct.objc_selector*), section "__OBJC,__message_refs,literal_pointers,no_dead_strip"
+
+define void @bork() nounwind {
+entry:
+ %color = alloca %struct.NSArray*
+ %color.466 = alloca %struct.NSObject*
+ %tmp103 = load %struct.NSArray** %color, align 4
+ %tmp103104 = getelementptr %struct.NSArray* %tmp103, i32 0, i32 0
+ store %struct.NSObject* %tmp103104, %struct.NSObject** %color.466, align 4
+ %tmp105 = load %struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_81", align 4
+ %tmp106 = load %struct.NSObject** %color.466, align 4
+ %tmp107 = call float bitcast (void (%struct.NSObject*, ...)* @objc_msgSend_fpret to float (%struct.NSObject*, %struct.objc_selector*)*)( %struct.NSObject* %tmp106, %struct.objc_selector* %tmp105 ) nounwind
+ br label %exit
+
+exit:
+ ret void
+}
+
+declare void @objc_msgSend_fpret(%struct.NSObject*, ...)
diff --git a/test/Transforms/InstCombine/fpcast.ll b/test/Transforms/InstCombine/fpcast.ll
new file mode 100644
index 0000000..bc6aa0a
--- /dev/null
+++ b/test/Transforms/InstCombine/fpcast.ll
@@ -0,0 +1,15 @@
+; Test some floating point casting cases
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i8 @test1() {
+ %x = fptoui float 2.550000e+02 to i8 ; <i8> [#uses=1]
+ ret i8 %x
+; CHECK: ret i8 -1
+}
+
+define i8 @test2() {
+ %x = fptosi float -1.000000e+00 to i8 ; <i8> [#uses=1]
+ ret i8 %x
+; CHECK: ret i8 -1
+}
+
diff --git a/test/Transforms/InstCombine/fpextend.ll b/test/Transforms/InstCombine/fpextend.ll
new file mode 100644
index 0000000..70e0c62
--- /dev/null
+++ b/test/Transforms/InstCombine/fpextend.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -instcombine -S | not grep fpext
+@X = external global float
+@Y = external global float
+
+define void @test() nounwind {
+entry:
+ %tmp = load float* @X, align 4 ; <float> [#uses=1]
+ %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
+ %tmp3 = fadd double %tmp1, 0.000000e+00 ; <double> [#uses=1]
+ %tmp34 = fptrunc double %tmp3 to float ; <float> [#uses=1]
+ store float %tmp34, float* @X, align 4
+ ret void
+}
+
+define void @test3() nounwind {
+entry:
+ %tmp = load float* @X, align 4 ; <float> [#uses=1]
+ %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
+ %tmp2 = load float* @Y, align 4 ; <float> [#uses=1]
+ %tmp23 = fpext float %tmp2 to double ; <double> [#uses=1]
+ %tmp5 = fdiv double %tmp1, %tmp23 ; <double> [#uses=1]
+ %tmp56 = fptrunc double %tmp5 to float ; <float> [#uses=1]
+ store float %tmp56, float* @X, align 4
+ ret void
+}
+
+define void @test4() nounwind {
+entry:
+ %tmp = load float* @X, align 4 ; <float> [#uses=1]
+ %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
+ %tmp2 = fsub double -0.000000e+00, %tmp1 ; <double> [#uses=1]
+ %tmp34 = fptrunc double %tmp2 to float ; <float> [#uses=1]
+ store float %tmp34, float* @X, align 4
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/fsub.ll b/test/Transforms/InstCombine/fsub.ll
new file mode 100644
index 0000000..af2fadd
--- /dev/null
+++ b/test/Transforms/InstCombine/fsub.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; PR4374
+define float @test1(float %a, float %b) nounwind {
+ %t1 = fsub float %a, %b
+ %t2 = fsub float -0.000000e+00, %t1
+
+; CHECK: %t1 = fsub float %a, %b
+; CHECK-NEXT: %t2 = fsub float -0.000000e+00, %t1
+
+ ret float %t2
+}
+
+; <rdar://problem/7530098>
+define double @test2(double %x, double %y) nounwind {
+ %t1 = fadd double %x, %y
+ %t2 = fsub double %x, %t1
+
+; CHECK: %t1 = fadd double %x, %y
+; CHECK-NEXT: %t2 = fsub double %x, %t1
+
+ ret double %t2
+}
diff --git a/test/Transforms/InstCombine/getelementptr.ll b/test/Transforms/InstCombine/getelementptr.ll
new file mode 100644
index 0000000..f0bee4e
--- /dev/null
+++ b/test/Transforms/InstCombine/getelementptr.ll
@@ -0,0 +1,470 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64"
+%intstruct = type { i32 }
+%pair = type { i32, i32 }
+%struct.B = type { double }
+%struct.A = type { %struct.B, i32, i32 }
+
+
+@Global = constant [10 x i8] c"helloworld"
+
+; Test noop elimination
+define i32* @test1(i32* %I) {
+ %A = getelementptr i32* %I, i64 0
+ ret i32* %A
+; CHECK: @test1
+; CHECK: ret i32* %I
+}
+
+; Test noop elimination
+define i32* @test2(i32* %I) {
+ %A = getelementptr i32* %I
+ ret i32* %A
+; CHECK: @test2
+; CHECK: ret i32* %I
+}
+
+; Test that two array indexing geps fold
+define i32* @test3(i32* %I) {
+ %A = getelementptr i32* %I, i64 17
+ %B = getelementptr i32* %A, i64 4
+ ret i32* %B
+; CHECK: @test3
+; CHECK: getelementptr i32* %I, i64 21
+}
+
+; Test that two getelementptr insts fold
+define i32* @test4({ i32 }* %I) {
+ %A = getelementptr { i32 }* %I, i64 1
+ %B = getelementptr { i32 }* %A, i64 0, i32 0
+ ret i32* %B
+; CHECK: @test4
+; CHECK: getelementptr %intstruct* %I, i64 1, i32 0
+}
+
+define void @test5(i8 %B) {
+ ; This should be turned into a constexpr instead of being an instruction
+ %A = getelementptr [10 x i8]* @Global, i64 0, i64 4
+ store i8 %B, i8* %A
+ ret void
+; CHECK: @test5
+; CHECK: store i8 %B, i8* getelementptr inbounds ([10 x i8]* @Global, i64 0, i64 4)
+}
+
+define i32* @test6() {
+ %M = malloc [4 x i32]
+ %A = getelementptr [4 x i32]* %M, i64 0, i64 0
+ %B = getelementptr i32* %A, i64 2
+ ret i32* %B
+; CHECK: @test6
+; CHECK: getelementptr i8* %malloccall, i64 8
+}
+
+define i32* @test7(i32* %I, i64 %C, i64 %D) {
+ %A = getelementptr i32* %I, i64 %C
+ %B = getelementptr i32* %A, i64 %D
+ ret i32* %B
+; CHECK: @test7
+; CHECK: %A.sum = add i64 %C, %D
+; CHECK: getelementptr i32* %I, i64 %A.sum
+}
+
+define i8* @test8([10 x i32]* %X) {
+ ;; Fold into the cast.
+ %A = getelementptr [10 x i32]* %X, i64 0, i64 0
+ %B = bitcast i32* %A to i8*
+ ret i8* %B
+; CHECK: @test8
+; CHECK: bitcast [10 x i32]* %X to i8*
+}
+
+define i32 @test9() {
+ %A = getelementptr { i32, double }* null, i32 0, i32 1
+ %B = ptrtoint double* %A to i32
+ ret i32 %B
+; CHECK: @test9
+; CHECK: ret i32 8
+}
+
+define i1 @test10({ i32, i32 }* %x, { i32, i32 }* %y) {
+ %tmp.1 = getelementptr { i32, i32 }* %x, i32 0, i32 1
+ %tmp.3 = getelementptr { i32, i32 }* %y, i32 0, i32 1
+ ;; seteq x, y
+ %tmp.4 = icmp eq i32* %tmp.1, %tmp.3
+ ret i1 %tmp.4
+; CHECK: @test10
+; CHECK: icmp eq %pair* %x, %y
+}
+
+define i1 @test11({ i32, i32 }* %X) {
+ %P = getelementptr { i32, i32 }* %X, i32 0, i32 0
+ %Q = icmp eq i32* %P, null
+ ret i1 %Q
+; CHECK: @test11
+; CHECK: icmp eq %pair* %X, null
+}
+
+
+; PR4748
+define i32 @test12(%struct.A* %a) {
+entry:
+ %g3 = getelementptr %struct.A* %a, i32 0, i32 1
+ store i32 10, i32* %g3, align 4
+
+ %g4 = getelementptr %struct.A* %a, i32 0, i32 0
+
+ %new_a = bitcast %struct.B* %g4 to %struct.A*
+
+ %g5 = getelementptr %struct.A* %new_a, i32 0, i32 1
+ %a_a = load i32* %g5, align 4
+ ret i32 %a_a
+; CHECK: @test12
+; CHECK: getelementptr %struct.A* %a, i64 0, i32 1
+; CHECK-NEXT: store i32 10, i32* %g3
+; CHECK-NEXT: ret i32 10
+}
+
+
+; PR2235
+%S = type { i32, [ 100 x i32] }
+define i1 @test13(i64 %X, %S* %P) {
+ %A = getelementptr inbounds %S* %P, i32 0, i32 1, i64 %X
+ %B = getelementptr inbounds %S* %P, i32 0, i32 0
+ %C = icmp eq i32* %A, %B
+ ret i1 %C
+; CHECK: @test13
+; CHECK: %C = icmp eq i64 %X, -1
+}
+
+
+@G = external global [3 x i8]
+define i8* @test14(i32 %Idx) {
+ %idx = zext i32 %Idx to i64
+ %tmp = getelementptr i8* getelementptr ([3 x i8]* @G, i32 0, i32 0), i64 %idx
+ ret i8* %tmp
+; CHECK: @test14
+; CHECK: getelementptr [3 x i8]* @G, i64 0, i64 %idx
+}
+
+
+; Test folding of constantexpr geps into normal geps.
+@Array = external global [40 x i32]
+define i32 *@test15(i64 %X) {
+ %A = getelementptr i32* getelementptr ([40 x i32]* @Array, i64 0, i64 0), i64 %X
+ ret i32* %A
+; CHECK: @test15
+; CHECK: getelementptr [40 x i32]* @Array, i64 0, i64 %X
+}
+
+
+define i32* @test16(i32* %X, i32 %Idx) {
+ %R = getelementptr i32* %X, i32 %Idx
+ ret i32* %R
+; CHECK: @test16
+; CHECK: sext i32 %Idx to i64
+}
+
+
+define i1 @test17(i16* %P, i32 %I, i32 %J) {
+ %X = getelementptr inbounds i16* %P, i32 %I
+ %Y = getelementptr inbounds i16* %P, i32 %J
+ %C = icmp ult i16* %X, %Y
+ ret i1 %C
+; CHECK: @test17
+; CHECK: %C = icmp slt i32 %I, %J
+}
+
+define i1 @test18(i16* %P, i32 %I) {
+ %X = getelementptr inbounds i16* %P, i32 %I
+ %C = icmp ult i16* %X, %P
+ ret i1 %C
+; CHECK: @test18
+; CHECK: %C = icmp slt i32 %I, 0
+}
+
+define i32 @test19(i32* %P, i32 %A, i32 %B) {
+ %tmp.4 = getelementptr inbounds i32* %P, i32 %A
+ %tmp.9 = getelementptr inbounds i32* %P, i32 %B
+ %tmp.10 = icmp eq i32* %tmp.4, %tmp.9
+ %tmp.11 = zext i1 %tmp.10 to i32
+ ret i32 %tmp.11
+; CHECK: @test19
+; CHECK: icmp eq i32 %A, %B
+}
+
+define i32 @test20(i32* %P, i32 %A, i32 %B) {
+ %tmp.4 = getelementptr inbounds i32* %P, i32 %A
+ %tmp.6 = icmp eq i32* %tmp.4, %P
+ %tmp.7 = zext i1 %tmp.6 to i32
+ ret i32 %tmp.7
+; CHECK: @test20
+; CHECK: icmp eq i32 %A, 0
+}
+
+
+define i32 @test21() {
+ %pbob1 = alloca %intstruct
+ %pbob2 = getelementptr %intstruct* %pbob1
+ %pbobel = getelementptr %intstruct* %pbob2, i64 0, i32 0
+ %rval = load i32* %pbobel
+ ret i32 %rval
+; CHECK: @test21
+; CHECK: getelementptr %intstruct* %pbob1, i64 0, i32 0
+}
+
+
+@A = global i32 1 ; <i32*> [#uses=1]
+@B = global i32 2 ; <i32*> [#uses=1]
+
+define i1 @test22() {
+ %C = icmp ult i32* getelementptr (i32* @A, i64 1),
+ getelementptr (i32* @B, i64 2)
+ ret i1 %C
+; CHECK: @test22
+; CHECK: icmp ult (i32* getelementptr inbounds (i32* @A, i64 1), i32* getelementptr (i32* @B, i64 2))
+}
+
+
+%X = type { [10 x i32], float }
+
+define i1 @test23() {
+ %A = getelementptr %X* null, i64 0, i32 0, i64 0 ; <i32*> [#uses=1]
+ %B = icmp ne i32* %A, null ; <i1> [#uses=1]
+ ret i1 %B
+; CHECK: @test23
+; CHECK: ret i1 false
+}
+
+%"java/lang/Object" = type { %struct.llvm_java_object_base }
+%"java/lang/StringBuffer" = type { %"java/lang/Object", i32, { %"java/lang/Object", i32, [0 x i16] }*, i1 }
+%struct.llvm_java_object_base = type opaque
+
+define void @test24() {
+bc0:
+ %tmp53 = getelementptr %"java/lang/StringBuffer"* null, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp53
+ ret void
+; CHECK: @test24
+; CHECK: store i32 0, i32* getelementptr (%"java/lang/StringBuffer"* null, i64 0, i32 1)
+}
+
+define void @test25() {
+entry:
+ %tmp = getelementptr { i64, i64, i64, i64 }* null, i32 0, i32 3 ; <i64*> [#uses=1]
+ %tmp.upgrd.1 = load i64* %tmp ; <i64> [#uses=1]
+ %tmp8.ui = load i64* null ; <i64> [#uses=1]
+ %tmp8 = bitcast i64 %tmp8.ui to i64 ; <i64> [#uses=1]
+ %tmp9 = and i64 %tmp8, %tmp.upgrd.1 ; <i64> [#uses=1]
+ %sext = trunc i64 %tmp9 to i32 ; <i32> [#uses=1]
+ %tmp27.i = sext i32 %sext to i64 ; <i64> [#uses=1]
+ tail call void @foo25( i32 0, i64 %tmp27.i )
+ unreachable
+; CHECK: @test25
+}
+
+declare void @foo25(i32, i64)
+
+
+; PR1637
+define i1 @test26(i8* %arr) {
+ %X = getelementptr i8* %arr, i32 1
+ %Y = getelementptr i8* %arr, i32 1
+ %test = icmp uge i8* %X, %Y
+ ret i1 %test
+; CHECK: @test26
+; CHECK: ret i1 true
+}
+
+ %struct.__large_struct = type { [100 x i64] }
+ %struct.compat_siginfo = type { i32, i32, i32, { [29 x i32] } }
+ %struct.siginfo_t = type { i32, i32, i32, { { i32, i32, [0 x i8], %struct.sigval_t, i32 }, [88 x i8] } }
+ %struct.sigval_t = type { i8* }
+
+define i32 @test27(%struct.compat_siginfo* %to, %struct.siginfo_t* %from) {
+entry:
+ %from_addr = alloca %struct.siginfo_t*
+ %tmp344 = load %struct.siginfo_t** %from_addr, align 8
+ %tmp345 = getelementptr %struct.siginfo_t* %tmp344, i32 0, i32 3
+ %tmp346 = getelementptr { { i32, i32, [0 x i8], %struct.sigval_t, i32 }, [88 x i8] }* %tmp345, i32 0, i32 0
+ %tmp346347 = bitcast { i32, i32, [0 x i8], %struct.sigval_t, i32 }* %tmp346 to { i32, i32, %struct.sigval_t }*
+ %tmp348 = getelementptr { i32, i32, %struct.sigval_t }* %tmp346347, i32 0, i32 2
+ %tmp349 = getelementptr %struct.sigval_t* %tmp348, i32 0, i32 0
+ %tmp349350 = bitcast i8** %tmp349 to i32*
+ %tmp351 = load i32* %tmp349350, align 8
+ %tmp360 = call i32 asm sideeffect "...",
+ "=r,ir,*m,i,0,~{dirflag},~{fpsr},~{flags}"( i32 %tmp351,
+ %struct.__large_struct* null, i32 -14, i32 0 )
+ unreachable
+; CHECK: @test27
+}
+
+; PR1978
+ %struct.x = type <{ i8 }>
[email protected] = internal constant [6 x i8] c"Main!\00"
[email protected] = internal constant [12 x i8] c"destroy %p\0A\00"
+
+define i32 @test28() nounwind {
+entry:
+ %orientations = alloca [1 x [1 x %struct.x]]
+ %tmp3 = call i32 @puts( i8* getelementptr ([6 x i8]* @.str, i32 0, i32 0) ) nounwind
+ %tmp45 = getelementptr inbounds [1 x [1 x %struct.x]]* %orientations, i32 1, i32 0, i32 0
+ %orientations62 = getelementptr [1 x [1 x %struct.x]]* %orientations, i32 0, i32 0, i32 0
+ br label %bb10
+
+bb10:
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb10 ]
+ %tmp.0.reg2mem.0.rec = mul i32 %indvar, -1
+ %tmp12.rec = add i32 %tmp.0.reg2mem.0.rec, -1
+ %tmp12 = getelementptr inbounds %struct.x* %tmp45, i32 %tmp12.rec
+ %tmp16 = call i32 (i8*, ...)* @printf( i8* getelementptr ([12 x i8]* @.str1, i32 0, i32 0), %struct.x* %tmp12 ) nounwind
+ %tmp84 = icmp eq %struct.x* %tmp12, %orientations62
+ %indvar.next = add i32 %indvar, 1
+ br i1 %tmp84, label %bb17, label %bb10
+
+bb17:
+ ret i32 0
+; CHECK: @test28
+; CHECK: icmp eq i32 %indvar, 0
+}
+
+declare i32 @puts(i8*)
+
+declare i32 @printf(i8*, ...)
+
+
+
+
+; rdar://6762290
+ %T = type <{ i64, i64, i64 }>
+define i32 @test29(i8* %start, i32 %X) nounwind {
+entry:
+ %tmp3 = load i64* null
+ %add.ptr = getelementptr i8* %start, i64 %tmp3
+ %tmp158 = load i32* null
+ %add.ptr159 = getelementptr %T* null, i32 %tmp158
+ %add.ptr209 = getelementptr i8* %start, i64 0
+ %add.ptr212 = getelementptr i8* %add.ptr209, i32 %X
+ %cmp214 = icmp ugt i8* %add.ptr212, %add.ptr
+ br i1 %cmp214, label %if.then216, label %if.end363
+
+if.then216:
+ ret i32 1
+
+if.end363:
+ ret i32 0
+; CHECK: @test29
+}
+
+
+; PR3694
+define i32 @test30(i32 %m, i32 %n) nounwind {
+entry:
+ %0 = alloca i32, i32 %n, align 4
+ %1 = bitcast i32* %0 to [0 x i32]*
+ call void @test30f(i32* %0) nounwind
+ %2 = getelementptr [0 x i32]* %1, i32 0, i32 %m
+ %3 = load i32* %2, align 4
+ ret i32 %3
+; CHECK: @test30
+; CHECK: getelementptr i32
+}
+
+declare void @test30f(i32*)
+
+
+
+define i1 @test31(i32* %A) {
+ %B = getelementptr i32* %A, i32 1
+ %C = getelementptr i32* %A, i64 1
+ %V = icmp eq i32* %B, %C
+ ret i1 %V
+; CHECK: @test31
+; CHECK: ret i1 true
+}
+
+
+; PR1345
+define i8* @test32(i8* %v) {
+ %A = alloca [4 x i8*], align 16
+ %B = getelementptr [4 x i8*]* %A, i32 0, i32 0
+ store i8* null, i8** %B
+ %C = bitcast [4 x i8*]* %A to { [16 x i8] }*
+ %D = getelementptr { [16 x i8] }* %C, i32 0, i32 0, i32 8
+ %E = bitcast i8* %D to i8**
+ store i8* %v, i8** %E
+ %F = getelementptr [4 x i8*]* %A, i32 0, i32 2
+ %G = load i8** %F
+ ret i8* %G
+; CHECK: @test32
+; CHECK: %D = getelementptr [4 x i8*]* %A, i64 0, i64 1
+; CHECK: %F = getelementptr [4 x i8*]* %A, i64 0, i64 2
+}
+
+; PR3290
+%struct.Key = type { { i32, i32 } }
+%struct.anon = type <{ i8, [3 x i8], i32 }>
+
+define i32 *@test33(%struct.Key *%A) {
+ %B = bitcast %struct.Key* %A to %struct.anon*
+ %C = getelementptr %struct.anon* %B, i32 0, i32 2
+ ret i32 *%C
+; CHECK: @test33
+; CHECK: getelementptr %struct.Key* %A, i64 0, i32 0, i32 1
+}
+
+
+
+ %T2 = type { i8*, i8 }
+define i8* @test34(i8* %Val, i64 %V) nounwind {
+entry:
+ %A = alloca %T2, align 8
+ %mrv_gep = bitcast %T2* %A to i64*
+ %B = getelementptr %T2* %A, i64 0, i32 0
+
+ store i64 %V, i64* %mrv_gep
+ %C = load i8** %B, align 8
+ ret i8* %C
+; CHECK: @test34
+; CHECK: %V.c = inttoptr i64 %V to i8*
+; CHECK: ret i8* %V.c
+}
+
+%t0 = type { i8*, [19 x i8] }
+%t1 = type { i8*, [0 x i8] }
+
+@array = external global [11 x i8]
+
+@s = external global %t0
+@"\01LC8" = external constant [17 x i8]
+
+; Instcombine should be able to fold this getelementptr.
+
+define i32 @test35() nounwind {
+ call i32 (i8*, ...)* @printf(i8* getelementptr ([17 x i8]* @"\01LC8", i32 0, i32 0),
+ i8* getelementptr (%t1* bitcast (%t0* @s to %t1*), i32 0, i32 1, i32 0)) nounwind
+ ret i32 0
+; CHECK: @test35
+; CHECK: call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([17 x i8]* @"\01LC8", i64 0, i64 0), i8* getelementptr inbounds (%t0* @s, i64 0, i32 1, i64 0)) nounwind
+}
+
+; Instcombine should constant-fold the GEP so that indices that have
+; static array extents are within bounds of those array extents.
+; In the below, -1 is not in the range [0,11). After the transformation,
+; the same address is computed, but 3 is in the range of [0,11).
+
+define i8* @test36() nounwind {
+ ret i8* getelementptr ([11 x i8]* @array, i32 0, i64 -1)
+; CHECK: @test36
+; CHECK: ret i8* getelementptr ([11 x i8]* @array, i64 1676976733973595601, i64 4)
+}
+
+; Instcombine shouldn't assume that gep(A,0,1) != gep(A,1,0).
+@A37 = external constant [1 x i8]
+define i1 @test37() nounwind {
+; CHECK: @test37
+; CHECK: ret i1 true
+ %t = icmp eq i8* getelementptr ([1 x i8]* @A37, i64 0, i64 1),
+ getelementptr ([1 x i8]* @A37, i64 1, i64 0)
+ ret i1 %t
+}
diff --git a/test/Transforms/InstCombine/hoist_instr.ll b/test/Transforms/InstCombine/hoist_instr.ll
new file mode 100644
index 0000000..fa451bc
--- /dev/null
+++ b/test/Transforms/InstCombine/hoist_instr.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+;; This tests that the div is hoisted into the then block.
+define i32 @foo(i1 %C, i32 %A, i32 %B) {
+entry:
+ br i1 %C, label %then, label %endif
+
+then: ; preds = %entry
+; CHECK: then:
+; CHECK-NEXT: sdiv i32
+ br label %endif
+
+endif: ; preds = %then, %entry
+ %X = phi i32 [ %A, %then ], [ 15, %entry ] ; <i32> [#uses=1]
+ %Y = sdiv i32 %X, 42 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll
new file mode 100644
index 0000000..c2234a1
--- /dev/null
+++ b/test/Transforms/InstCombine/icmp.ll
@@ -0,0 +1,123 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i32 @test1(i32 %X) {
+entry:
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+; CHECK: @test1
+; CHECK: lshr i32 %X, 31
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test2(i32 %X) {
+entry:
+ icmp ult i32 %X, -2147483648 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+; CHECK: @test2
+; CHECK: lshr i32 %X, 31
+; CHECK-NEXT: xor i32
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test3(i32 %X) {
+entry:
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ sext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+; CHECK: @test3
+; CHECK: ashr i32 %X, 31
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test4(i32 %X) {
+entry:
+ icmp ult i32 %X, -2147483648 ; <i1>:0 [#uses=1]
+ sext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+; CHECK: @test4
+; CHECK: ashr i32 %X, 31
+; CHECK-NEXT: xor i32
+; CHECK-NEXT: ret i32
+}
+
+; PR4837
+define <2 x i1> @test5(<2 x i64> %x) {
+entry:
+ %V = icmp eq <2 x i64> %x, undef
+ ret <2 x i1> %V
+; CHECK: @test5
+; CHECK: ret <2 x i1> undef
+}
+
+define i32 @test6(i32 %a, i32 %b) {
+ %c = icmp sle i32 %a, -1
+ %d = zext i1 %c to i32
+ %e = sub i32 0, %d
+ %f = and i32 %e, %b
+ ret i32 %f
+; CHECK: @test6
+; CHECK-NEXT: ashr i32 %a, 31
+; CHECK-NEXT: %f = and i32 %e, %b
+; CHECK-NEXT: ret i32 %f
+}
+
+
+define i1 @test7(i32 %x) {
+entry:
+ %a = add i32 %x, -1
+ %b = icmp ult i32 %a, %x
+ ret i1 %b
+; CHECK: @test7
+; CHECK: %b = icmp ne i32 %x, 0
+; CHECK: ret i1 %b
+}
+
+define i1 @test8(i32 %x){
+entry:
+ %a = add i32 %x, -1
+ %b = icmp eq i32 %a, %x
+ ret i1 %b
+; CHECK: @test8
+; CHECK: ret i1 false
+}
+
+define i1 @test9(i32 %x) {
+entry:
+ %a = add i32 %x, -2
+ %b = icmp ugt i32 %x, %a
+ ret i1 %b
+; CHECK: @test9
+; CHECK: icmp ugt i32 %x, 1
+; CHECK: ret i1 %b
+}
+
+define i1 @test10(i32 %x){
+entry:
+ %a = add i32 %x, -1
+ %b = icmp slt i32 %a, %x
+ ret i1 %b
+
+; CHECK: @test10
+; CHECK: %b = icmp ne i32 %x, -2147483648
+; CHECK: ret i1 %b
+}
+
+define i1 @test11(i32 %x) {
+ %a = add nsw i32 %x, 8
+ %b = icmp slt i32 %x, %a
+ ret i1 %b
+; CHECK: @test11
+; CHECK: ret i1 true
+}
+
+; PR6195
+define i1 @test12(i1 %A) {
+ %S = select i1 %A, i64 -4294967295, i64 8589934591
+ %B = icmp ne i64 bitcast (<2 x i32> <i32 1, i32 -1> to i64), %S
+ ret i1 %B
+; CHECK: @test12
+; CHECK-NEXT: %B = select i1
+; CHECK-NEXT: ret i1 %B
+}
diff --git a/test/Transforms/InstCombine/idioms.ll b/test/Transforms/InstCombine/idioms.ll
new file mode 100644
index 0000000..6b3567f
--- /dev/null
+++ b/test/Transforms/InstCombine/idioms.ll
@@ -0,0 +1,32 @@
+; RUN: opt -instcombine %s -S | FileCheck %s
+
+; Check that code corresponding to the following C function is
+; simplified into a single ASR operation:
+;
+; int test_asr(int a, int b) {
+; return a < 0 ? -(-a - 1 >> b) - 1 : a >> b;
+; }
+;
+define i32 @test_asr(i32 %a, i32 %b) {
+entry:
+ %c = icmp slt i32 %a, 0
+ br i1 %c, label %bb2, label %bb3
+
+bb2:
+ %t1 = sub i32 0, %a
+ %not = sub i32 %t1, 1
+ %d = ashr i32 %not, %b
+ %t2 = sub i32 0, %d
+ %not2 = sub i32 %t2, 1
+ br label %bb4
+bb3:
+ %e = ashr i32 %a, %b
+ br label %bb4
+bb4:
+ %f = phi i32 [ %not2, %bb2 ], [ %e, %bb3 ]
+ ret i32 %f
+; CHECK: @test_asr
+; CHECK: bb4:
+; CHECK: %f = ashr i32 %a, %b
+; CHECK: ret i32 %f
+}
diff --git a/test/Transforms/InstCombine/intrinsics.ll b/test/Transforms/InstCombine/intrinsics.ll
new file mode 100644
index 0000000..08dcfa7
--- /dev/null
+++ b/test/Transforms/InstCombine/intrinsics.ll
@@ -0,0 +1,161 @@
+; RUN: opt %s -instcombine -S | FileCheck %s
+
+%overflow.result = type {i8, i1}
+
+declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8)
+declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8)
+declare double @llvm.powi.f64(double, i32) nounwind readonly
+declare i32 @llvm.cttz.i32(i32) nounwind readnone
+declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+declare i32 @llvm.ctpop.i32(i32) nounwind readnone
+declare i8 @llvm.ctlz.i8(i8) nounwind readnone
+
+define i8 @test1(i8 %A, i8 %B) {
+ %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
+ %y = extractvalue %overflow.result %x, 0
+ ret i8 %y
+; CHECK: @test1
+; CHECK-NEXT: %y = add i8 %A, %B
+; CHECK-NEXT: ret i8 %y
+}
+
+define i8 @test2(i8 %A, i8 %B, i1* %overflowPtr) {
+ %and.A = and i8 %A, 127
+ %and.B = and i8 %B, 127
+ %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %and.A, i8 %and.B)
+ %y = extractvalue %overflow.result %x, 0
+ %z = extractvalue %overflow.result %x, 1
+ store i1 %z, i1* %overflowPtr
+ ret i8 %y
+; CHECK: @test2
+; CHECK-NEXT: %and.A = and i8 %A, 127
+; CHECK-NEXT: %and.B = and i8 %B, 127
+; CHECK-NEXT: %1 = add nuw i8 %and.A, %and.B
+; CHECK-NEXT: store i1 false, i1* %overflowPtr
+; CHECK-NEXT: ret i8 %1
+}
+
+define i8 @test3(i8 %A, i8 %B, i1* %overflowPtr) {
+ %or.A = or i8 %A, -128
+ %or.B = or i8 %B, -128
+ %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %or.A, i8 %or.B)
+ %y = extractvalue %overflow.result %x, 0
+ %z = extractvalue %overflow.result %x, 1
+ store i1 %z, i1* %overflowPtr
+ ret i8 %y
+; CHECK: @test3
+; CHECK-NEXT: %or.A = or i8 %A, -128
+; CHECK-NEXT: %or.B = or i8 %B, -128
+; CHECK-NEXT: %1 = add i8 %or.A, %or.B
+; CHECK-NEXT: store i1 true, i1* %overflowPtr
+; CHECK-NEXT: ret i8 %1
+}
+
+define i8 @test4(i8 %A, i1* %overflowPtr) {
+ %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 undef, i8 %A)
+ %y = extractvalue %overflow.result %x, 0
+ %z = extractvalue %overflow.result %x, 1
+ store i1 %z, i1* %overflowPtr
+ ret i8 %y
+; CHECK: @test4
+; CHECK-NEXT: ret i8 undef
+}
+
+define i8 @test5(i8 %A, i1* %overflowPtr) {
+ %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A)
+ %y = extractvalue %overflow.result %x, 0
+ %z = extractvalue %overflow.result %x, 1
+ store i1 %z, i1* %overflowPtr
+ ret i8 %y
+; CHECK: @test5
+; CHECK-NEXT: store i1 false, i1* %overflowPtr
+; CHECK-NEXT: ret i8 0
+}
+
+define i8 @test6(i8 %A, i1* %overflowPtr) {
+ %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 1, i8 %A)
+ %y = extractvalue %overflow.result %x, 0
+ %z = extractvalue %overflow.result %x, 1
+ store i1 %z, i1* %overflowPtr
+ ret i8 %y
+; CHECK: @test6
+; CHECK-NEXT: store i1 false, i1* %overflowPtr
+; CHECK-NEXT: ret i8 %A
+}
+
+define void @powi(double %V, double *%P) {
+entry:
+ %A = tail call double @llvm.powi.f64(double %V, i32 -1) nounwind
+ volatile store double %A, double* %P
+
+ %B = tail call double @llvm.powi.f64(double %V, i32 0) nounwind
+ volatile store double %B, double* %P
+
+ %C = tail call double @llvm.powi.f64(double %V, i32 1) nounwind
+ volatile store double %C, double* %P
+ ret void
+; CHECK: @powi
+; CHECK: %A = fdiv double 1.0{{.*}}, %V
+; CHECK: volatile store double %A,
+; CHECK: volatile store double 1.0
+; CHECK: volatile store double %V
+}
+
+define i32 @cttz(i32 %a) {
+entry:
+ %or = or i32 %a, 8
+ %and = and i32 %or, -8
+ %count = tail call i32 @llvm.cttz.i32(i32 %and) nounwind readnone
+ ret i32 %count
+; CHECK: @cttz
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret i32 3
+}
+
+define i8 @ctlz(i8 %a) {
+entry:
+ %or = or i8 %a, 32
+ %and = and i8 %or, 63
+ %count = tail call i8 @llvm.ctlz.i8(i8 %and) nounwind readnone
+ ret i8 %count
+; CHECK: @ctlz
+; CHECK-NEXT: entry:
+; CHECK-NEXT: ret i8 2
+}
+
+define void @cmp.simplify(i32 %a, i32 %b, i1* %c) {
+entry:
+ %lz = tail call i32 @llvm.ctlz.i32(i32 %a) nounwind readnone
+ %lz.cmp = icmp eq i32 %lz, 32
+ volatile store i1 %lz.cmp, i1* %c
+ %tz = tail call i32 @llvm.cttz.i32(i32 %a) nounwind readnone
+ %tz.cmp = icmp ne i32 %tz, 32
+ volatile store i1 %tz.cmp, i1* %c
+ %pop = tail call i32 @llvm.ctpop.i32(i32 %b) nounwind readnone
+ %pop.cmp = icmp eq i32 %pop, 0
+ volatile store i1 %pop.cmp, i1* %c
+ ret void
+; CHECK: @cmp.simplify
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %lz.cmp = icmp eq i32 %a, 0
+; CHECK-NEXT: volatile store i1 %lz.cmp, i1* %c
+; CHECK-NEXT: %tz.cmp = icmp ne i32 %a, 0
+; CHECK-NEXT: volatile store i1 %tz.cmp, i1* %c
+; CHECK-NEXT: %pop.cmp = icmp eq i32 %b, 0
+; CHECK-NEXT: volatile store i1 %pop.cmp, i1* %c
+}
+
+
+define i32 @cttz_simplify1(i32 %x) nounwind readnone ssp {
+ %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x) ; <i32> [#uses=1]
+ %shr3 = lshr i32 %tmp1, 5 ; <i32> [#uses=1]
+ ret i32 %shr3
+
+; CHECK: @cttz_simplify1
+; CHECK: icmp eq i32 %x, 0
+; CHECK-NEXT: zext i1
+; CHECK-NEXT: ret i32
+}
+
+declare i32 @llvm.ctlz.i32(i32) nounwind readnone
+
diff --git a/test/Transforms/InstCombine/invariant.ll b/test/Transforms/InstCombine/invariant.ll
new file mode 100644
index 0000000..c67ad33
--- /dev/null
+++ b/test/Transforms/InstCombine/invariant.ll
@@ -0,0 +1,16 @@
+; Test to make sure unused llvm.invariant.start calls are not trivially eliminated
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+declare void @g(i8*)
+
+declare { }* @llvm.invariant.start(i64, i8* nocapture) nounwind readonly
+
+define i8 @f() {
+ %a = alloca i8 ; <i8*> [#uses=4]
+ store i8 0, i8* %a
+ %i = call { }* @llvm.invariant.start(i64 1, i8* %a) ; <{ }*> [#uses=0]
+ ; CHECK: call { }* @llvm.invariant.start
+ call void @g(i8* %a)
+ %r = load i8* %a ; <i8> [#uses=1]
+ ret i8 %r
+}
diff --git a/test/Transforms/InstCombine/known_align.ll b/test/Transforms/InstCombine/known_align.ll
new file mode 100644
index 0000000..5382abf
--- /dev/null
+++ b/test/Transforms/InstCombine/known_align.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -instcombine -S | grep {align 1}
+; END.
+
+ %struct.p = type <{ i8, i32 }>
+@t = global %struct.p <{ i8 1, i32 10 }> ; <%struct.p*> [#uses=1]
+@u = weak global %struct.p zeroinitializer ; <%struct.p*> [#uses=1]
+
+define i32 @main() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp1 = alloca i32, align 4 ; <i32*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp3 = load i32* getelementptr (%struct.p* @t, i32 0, i32 1), align 1 ; <i32> [#uses=1]
+ store i32 %tmp3, i32* %tmp1, align 4
+ %tmp5 = load i32* %tmp1, align 4 ; <i32> [#uses=1]
+ store i32 %tmp5, i32* getelementptr (%struct.p* @u, i32 0, i32 1), align 1
+ %tmp6 = load i32* %tmp1, align 4 ; <i32> [#uses=1]
+ store i32 %tmp6, i32* %tmp, align 4
+ %tmp7 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ store i32 %tmp7, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval8 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval8
+}
diff --git a/test/Transforms/InstCombine/load-cmp.ll b/test/Transforms/InstCombine/load-cmp.ll
new file mode 100644
index 0000000..fe5df92
--- /dev/null
+++ b/test/Transforms/InstCombine/load-cmp.ll
@@ -0,0 +1,112 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+@G16 = internal constant [10 x i16] [i16 35, i16 82, i16 69, i16 81, i16 85,
+ i16 73, i16 82, i16 69, i16 68, i16 0]
+@GD = internal constant [6 x double]
+ [double -10.0, double 1.0, double 4.0, double 2.0, double -20.0, double -40.0]
+
+define i1 @test1(i32 %X) {
+ %P = getelementptr inbounds [10 x i16]* @G16, i32 0, i32 %X
+ %Q = load i16* %P
+ %R = icmp eq i16 %Q, 0
+ ret i1 %R
+; CHECK: @test1
+; CHECK-NEXT: %R = icmp eq i32 %X, 9
+; CHECK-NEXT: ret i1 %R
+}
+
+define i1 @test2(i32 %X) {
+ %P = getelementptr inbounds [10 x i16]* @G16, i32 0, i32 %X
+ %Q = load i16* %P
+ %R = icmp slt i16 %Q, 85
+ ret i1 %R
+; CHECK: @test2
+; CHECK-NEXT: %R = icmp ne i32 %X, 4
+; CHECK-NEXT: ret i1 %R
+}
+
+define i1 @test3(i32 %X) {
+ %P = getelementptr inbounds [6 x double]* @GD, i32 0, i32 %X
+ %Q = load double* %P
+ %R = fcmp oeq double %Q, 1.0
+ ret i1 %R
+; CHECK: @test3
+; CHECK-NEXT: %R = icmp eq i32 %X, 1
+; CHECK-NEXT: ret i1 %R
+}
+
+define i1 @test4(i32 %X) {
+ %P = getelementptr inbounds [10 x i16]* @G16, i32 0, i32 %X
+ %Q = load i16* %P
+ %R = icmp sle i16 %Q, 73
+ ret i1 %R
+; CHECK: @test4
+; CHECK-NEXT: lshr i32 933, %X
+; CHECK-NEXT: and i32 {{.*}}, 1
+; CHECK-NEXT: %R = icmp ne i32 {{.*}}, 0
+; CHECK-NEXT: ret i1 %R
+}
+
+define i1 @test5(i32 %X) {
+ %P = getelementptr inbounds [10 x i16]* @G16, i32 0, i32 %X
+ %Q = load i16* %P
+ %R = icmp eq i16 %Q, 69
+ ret i1 %R
+; CHECK: @test5
+; CHECK-NEXT: icmp eq i32 %X, 2
+; CHECK-NEXT: icmp eq i32 %X, 7
+; CHECK-NEXT: %R = or i1
+; CHECK-NEXT: ret i1 %R
+}
+
+define i1 @test6(i32 %X) {
+ %P = getelementptr inbounds [6 x double]* @GD, i32 0, i32 %X
+ %Q = load double* %P
+ %R = fcmp ogt double %Q, 0.0
+ ret i1 %R
+; CHECK: @test6
+; CHECK-NEXT: add i32 %X, -1
+; CHECK-NEXT: %R = icmp ult i32 {{.*}}, 3
+; CHECK-NEXT: ret i1 %R
+}
+
+define i1 @test7(i32 %X) {
+ %P = getelementptr inbounds [6 x double]* @GD, i32 0, i32 %X
+ %Q = load double* %P
+ %R = fcmp olt double %Q, 0.0
+ ret i1 %R
+; CHECK: @test7
+; CHECK-NEXT: add i32 %X, -1
+; CHECK-NEXT: %R = icmp ugt i32 {{.*}}, 2
+; CHECK-NEXT: ret i1 %R
+}
+
+define i1 @test8(i32 %X) {
+ %P = getelementptr inbounds [10 x i16]* @G16, i32 0, i32 %X
+ %Q = load i16* %P
+ %R = and i16 %Q, 3
+ %S = icmp eq i16 %R, 0
+ ret i1 %S
+; CHECK: @test8
+; CHECK-NEXT: add i32 %X, -8
+; CHECK-NEXT: %S = icmp ult i32 {{.*}}, 2
+; CHECK-NEXT: ret i1 %S
+}
+
+@GA = internal constant [4 x { i32, i32 } ] [
+ { i32, i32 } { i32 1, i32 0 },
+ { i32, i32 } { i32 2, i32 1 },
+ { i32, i32 } { i32 3, i32 1 },
+ { i32, i32 } { i32 4, i32 0 }
+]
+
+define i1 @test9(i32 %X) {
+ %P = getelementptr inbounds [4 x { i32, i32 } ]* @GA, i32 0, i32 %X, i32 1
+ %Q = load i32* %P
+ %R = icmp eq i32 %Q, 1
+ ret i1 %R
+; CHECK: @test9
+; CHECK-NEXT: add i32 %X, -1
+; CHECK-NEXT: %R = icmp ult i32 {{.*}}, 2
+; CHECK-NEXT: ret i1 %R
+}
diff --git a/test/Transforms/InstCombine/load-select.ll b/test/Transforms/InstCombine/load-select.ll
new file mode 100644
index 0000000..f3d83dc
--- /dev/null
+++ b/test/Transforms/InstCombine/load-select.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+
+@a = constant [2 x i32] [i32 3, i32 6] ; <[2 x i32]*> [#uses=2]
+
+define i32 @b(i32 %y) nounwind readonly {
+; CHECK: @b
+; CHECK-NOT: load
+; CHECK: ret i32
+entry:
+ %0 = icmp eq i32 %y, 0 ; <i1> [#uses=1]
+ %storemerge = select i1 %0, i32* getelementptr inbounds ([2 x i32]* @a, i32 0, i32 1), i32* getelementptr inbounds ([2 x i32]* @a, i32 0, i32 0) ; <i32*> [#uses=1]
+ %1 = load i32* %storemerge, align 4 ; <i32> [#uses=1]
+ ret i32 %1
+}
diff --git a/test/Transforms/InstCombine/load.ll b/test/Transforms/InstCombine/load.ll
new file mode 100644
index 0000000..75c62a8
--- /dev/null
+++ b/test/Transforms/InstCombine/load.ll
@@ -0,0 +1,87 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+; RUN: opt < %s -instcombine -S | not grep load
+
+@X = constant i32 42 ; <i32*> [#uses=2]
+@X2 = constant i32 47 ; <i32*> [#uses=1]
+@Y = constant [2 x { i32, float }] [ { i32, float } { i32 12, float 1.000000e+00 }, { i32, float } { i32 37, float 0x3FF3B2FEC0000000 } ] ; <[2 x { i32, float }]*> [#uses=2]
+@Z = constant [2 x { i32, float }] zeroinitializer ; <[2 x { i32, float }]*> [#uses=1]
+
+define i32 @test1() {
+ %B = load i32* @X ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define float @test2() {
+ %A = getelementptr [2 x { i32, float }]* @Y, i64 0, i64 1, i32 1 ; <float*> [#uses=1]
+ %B = load float* %A ; <float> [#uses=1]
+ ret float %B
+}
+
+define i32 @test3() {
+ %A = getelementptr [2 x { i32, float }]* @Y, i64 0, i64 0, i32 0 ; <i32*> [#uses=1]
+ %B = load i32* %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test4() {
+ %A = getelementptr [2 x { i32, float }]* @Z, i64 0, i64 1, i32 0 ; <i32*> [#uses=1]
+ %B = load i32* %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test5(i1 %C) {
+ %Y = select i1 %C, i32* @X, i32* @X2 ; <i32*> [#uses=1]
+ %Z = load i32* %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test7(i32 %X) {
+ %V = getelementptr i32* null, i32 %X ; <i32*> [#uses=1]
+ %R = load i32* %V ; <i32> [#uses=1]
+ ret i32 %R
+}
+
+define i32 @test8(i32* %P) {
+ store i32 1, i32* %P
+ %X = load i32* %P ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i32 @test9(i32* %P) {
+ %X = load i32* %P ; <i32> [#uses=1]
+ %Y = load i32* %P ; <i32> [#uses=1]
+ %Z = sub i32 %X, %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+define i32 @test10(i1 %C.upgrd.1, i32* %P, i32* %Q) {
+ br i1 %C.upgrd.1, label %T, label %F
+T: ; preds = %0
+ store i32 1, i32* %Q
+ store i32 0, i32* %P
+ br label %C
+F: ; preds = %0
+ store i32 0, i32* %P
+ br label %C
+C: ; preds = %F, %T
+ %V = load i32* %P ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define double @test11(double* %p) {
+ %t0 = getelementptr double* %p, i32 1
+ store double 2.0, double* %t0
+ %t1 = getelementptr double* %p, i32 1
+ %x = load double* %t1
+ ret double %x
+}
+
+define i32 @test12(i32* %P) {
+ %A = alloca i32
+ store i32 123, i32* %A
+ ; Cast the result of the load not the source
+ %Q = bitcast i32* %A to i32*
+ %V = load i32* %Q
+ ret i32 %V
+}
diff --git a/test/Transforms/InstCombine/load2.ll b/test/Transforms/InstCombine/load2.ll
new file mode 100644
index 0000000..611b0fb
--- /dev/null
+++ b/test/Transforms/InstCombine/load2.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | not grep load
+
+@GLOBAL = internal constant [4 x i32] zeroinitializer
+
+
+define <16 x i8> @foo(<2 x i64> %x) {
+entry:
+ %tmp = load <16 x i8> * bitcast ([4 x i32]* @GLOBAL to <16 x i8>*)
+ ret <16 x i8> %tmp
+}
+
diff --git a/test/Transforms/InstCombine/load3.ll b/test/Transforms/InstCombine/load3.ll
new file mode 100644
index 0000000..9c87316
--- /dev/null
+++ b/test/Transforms/InstCombine/load3.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep load | count 1
+
+; Instcombine should be able to do trivial CSE of loads.
+
+declare void @use(double %n)
+define void @bar(double* %p) {
+ %t0 = getelementptr double* %p, i32 1
+ %y = load double* %t0
+ %t1 = getelementptr double* %p, i32 1
+ %x = load double* %t1
+ call void @use(double %x)
+ call void @use(double %y)
+ ret void
+}
diff --git a/test/Transforms/InstCombine/loadstore-alignment.ll b/test/Transforms/InstCombine/loadstore-alignment.ll
new file mode 100644
index 0000000..1d932d2
--- /dev/null
+++ b/test/Transforms/InstCombine/loadstore-alignment.ll
@@ -0,0 +1,67 @@
+; RUN: opt < %s -instcombine -S | grep {, align 16} | count 14
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+@x = external global <2 x i64>, align 16
+@xx = external global [13 x <2 x i64>], align 16
+
+define <2 x i64> @static_hem() {
+ %t = getelementptr <2 x i64>* @x, i32 7
+ %tmp1 = load <2 x i64>* %t, align 1
+ ret <2 x i64> %tmp1
+}
+
+define <2 x i64> @hem(i32 %i) {
+ %t = getelementptr <2 x i64>* @x, i32 %i
+ %tmp1 = load <2 x i64>* %t, align 1
+ ret <2 x i64> %tmp1
+}
+
+define <2 x i64> @hem_2d(i32 %i, i32 %j) {
+ %t = getelementptr [13 x <2 x i64>]* @xx, i32 %i, i32 %j
+ %tmp1 = load <2 x i64>* %t, align 1
+ ret <2 x i64> %tmp1
+}
+
+define <2 x i64> @foo() {
+ %tmp1 = load <2 x i64>* @x, align 1
+ ret <2 x i64> %tmp1
+}
+
+define <2 x i64> @bar() {
+ %t = alloca <2 x i64>
+ call void @kip(<2 x i64>* %t)
+ %tmp1 = load <2 x i64>* %t, align 1
+ ret <2 x i64> %tmp1
+}
+
+define void @static_hem_store(<2 x i64> %y) {
+ %t = getelementptr <2 x i64>* @x, i32 7
+ store <2 x i64> %y, <2 x i64>* %t, align 1
+ ret void
+}
+
+define void @hem_store(i32 %i, <2 x i64> %y) {
+ %t = getelementptr <2 x i64>* @x, i32 %i
+ store <2 x i64> %y, <2 x i64>* %t, align 1
+ ret void
+}
+
+define void @hem_2d_store(i32 %i, i32 %j, <2 x i64> %y) {
+ %t = getelementptr [13 x <2 x i64>]* @xx, i32 %i, i32 %j
+ store <2 x i64> %y, <2 x i64>* %t, align 1
+ ret void
+}
+
+define void @foo_store(<2 x i64> %y) {
+ store <2 x i64> %y, <2 x i64>* @x, align 1
+ ret void
+}
+
+define void @bar_store(<2 x i64> %y) {
+ %t = alloca <2 x i64>
+ call void @kip(<2 x i64>* %t)
+ store <2 x i64> %y, <2 x i64>* %t, align 1
+ ret void
+}
+
+declare void @kip(<2 x i64>* %t)
diff --git a/test/Transforms/InstCombine/logical-select.ll b/test/Transforms/InstCombine/logical-select.ll
new file mode 100644
index 0000000..bb59817
--- /dev/null
+++ b/test/Transforms/InstCombine/logical-select.ll
@@ -0,0 +1,68 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+
+define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+ %e = icmp slt i32 %a, %b
+ %f = sext i1 %e to i32
+ %g = and i32 %c, %f
+ %h = xor i32 %f, -1
+ %i = and i32 %d, %h
+ %j = or i32 %g, %i
+ ret i32 %j
+; CHECK: %e = icmp slt i32 %a, %b
+; CHECK: %j = select i1 %e, i32 %c, i32 %d
+; CHECK: ret i32 %j
+}
+define i32 @bar(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+ %e = icmp slt i32 %a, %b
+ %f = sext i1 %e to i32
+ %g = and i32 %c, %f
+ %h = xor i32 %f, -1
+ %i = and i32 %d, %h
+ %j = or i32 %i, %g
+ ret i32 %j
+; CHECK: %e = icmp slt i32 %a, %b
+; CHECK: %j = select i1 %e, i32 %c, i32 %d
+; CHECK: ret i32 %j
+}
+
+define i32 @goo(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+entry:
+ %0 = icmp slt i32 %a, %b
+ %iftmp.0.0 = select i1 %0, i32 -1, i32 0
+ %1 = and i32 %iftmp.0.0, %c
+ %not = xor i32 %iftmp.0.0, -1
+ %2 = and i32 %not, %d
+ %3 = or i32 %1, %2
+ ret i32 %3
+; CHECK: %0 = icmp slt i32 %a, %b
+; CHECK: %1 = select i1 %0, i32 %c, i32 %d
+; CHECK: ret i32 %1
+}
+define i32 @poo(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+entry:
+ %0 = icmp slt i32 %a, %b
+ %iftmp.0.0 = select i1 %0, i32 -1, i32 0
+ %1 = and i32 %iftmp.0.0, %c
+ %iftmp = select i1 %0, i32 0, i32 -1
+ %2 = and i32 %iftmp, %d
+ %3 = or i32 %1, %2
+ ret i32 %3
+; CHECK: %0 = icmp slt i32 %a, %b
+; CHECK: %1 = select i1 %0, i32 %c, i32 %d
+; CHECK: ret i32 %1
+}
+
+define i32 @par(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+entry:
+ %0 = icmp slt i32 %a, %b
+ %iftmp.1.0 = select i1 %0, i32 -1, i32 0
+ %1 = and i32 %iftmp.1.0, %c
+ %not = xor i32 %iftmp.1.0, -1
+ %2 = and i32 %not, %d
+ %3 = or i32 %1, %2
+ ret i32 %3
+; CHECK: %0 = icmp slt i32 %a, %b
+; CHECK: %1 = select i1 %0, i32 %c, i32 %d
+; CHECK: ret i32 %1
+}
diff --git a/test/Transforms/InstCombine/lshr-phi.ll b/test/Transforms/InstCombine/lshr-phi.ll
new file mode 100644
index 0000000..76a113f
--- /dev/null
+++ b/test/Transforms/InstCombine/lshr-phi.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -instcombine -S > %t
+; RUN: not grep lshr %t
+; RUN: grep add %t | count 1
+
+; Instcombine should be able to eliminate the lshr, because only
+; bits in the operand which might be non-zero will be shifted
+; off the end.
+
+define i32 @hash_string(i8* nocapture %key) nounwind readonly {
+entry:
+ %t0 = load i8* %key, align 1 ; <i8> [#uses=1]
+ %t1 = icmp eq i8 %t0, 0 ; <i1> [#uses=1]
+ br i1 %t1, label %bb2, label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i64 [ 0, %entry ], [ %tmp, %bb ] ; <i64> [#uses=2]
+ %k.04 = phi i32 [ 0, %entry ], [ %t8, %bb ] ; <i32> [#uses=2]
+ %cp.05 = getelementptr i8* %key, i64 %indvar ; <i8*> [#uses=1]
+ %t2 = shl i32 %k.04, 1 ; <i32> [#uses=1]
+ %t3 = lshr i32 %k.04, 14 ; <i32> [#uses=1]
+ %t4 = add i32 %t2, %t3 ; <i32> [#uses=1]
+ %t5 = load i8* %cp.05, align 1 ; <i8> [#uses=1]
+ %t6 = sext i8 %t5 to i32 ; <i32> [#uses=1]
+ %t7 = xor i32 %t6, %t4 ; <i32> [#uses=1]
+ %t8 = and i32 %t7, 16383 ; <i32> [#uses=2]
+ %tmp = add i64 %indvar, 1 ; <i64> [#uses=2]
+ %scevgep = getelementptr i8* %key, i64 %tmp ; <i8*> [#uses=1]
+ %t9 = load i8* %scevgep, align 1 ; <i8> [#uses=1]
+ %t10 = icmp eq i8 %t9, 0 ; <i1> [#uses=1]
+ br i1 %t10, label %bb2, label %bb
+
+bb2: ; preds = %bb, %entry
+ %k.0.lcssa = phi i32 [ 0, %entry ], [ %t8, %bb ] ; <i32> [#uses=1]
+ ret i32 %k.0.lcssa
+}
diff --git a/test/Transforms/InstCombine/malloc-free-delete.ll b/test/Transforms/InstCombine/malloc-free-delete.ll
new file mode 100644
index 0000000..a4b7496
--- /dev/null
+++ b/test/Transforms/InstCombine/malloc-free-delete.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -instcombine -globaldce -S | FileCheck %s
+; PR1201
+define i32 @main(i32 %argc, i8** %argv) {
+ %c_19 = alloca i8* ; <i8**> [#uses=2]
+ %malloc_206 = malloc i8, i32 10 ; <i8*> [#uses=1]
+; CHECK-NOT: malloc
+ store i8* %malloc_206, i8** %c_19
+ %tmp_207 = load i8** %c_19 ; <i8*> [#uses=1]
+ free i8* %tmp_207
+; CHECK-NOT: free
+ ret i32 0
+; CHECK: ret i32 0
+}
diff --git a/test/Transforms/InstCombine/malloc.ll b/test/Transforms/InstCombine/malloc.ll
new file mode 100644
index 0000000..b6ebbea
--- /dev/null
+++ b/test/Transforms/InstCombine/malloc.ll
@@ -0,0 +1,7 @@
+; test that malloc's with a constant argument are promoted to array allocations
+; RUN: opt < %s -instcombine -S | grep getelementptr
+
+define i32* @test() {
+ %X = malloc i32, i32 4
+ ret i32* %X
+}
diff --git a/test/Transforms/InstCombine/malloc2.ll b/test/Transforms/InstCombine/malloc2.ll
new file mode 100644
index 0000000..8462dac
--- /dev/null
+++ b/test/Transforms/InstCombine/malloc2.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; PR1313
+
+define i32 @test1(i32 %argc, i8* %argv, i8* %envp) {
+ %tmp15.i.i.i23 = malloc [2564 x i32] ; <[2564 x i32]*> [#uses=1]
+; CHECK-NOT: call i8* @malloc
+ %c = icmp eq [2564 x i32]* %tmp15.i.i.i23, null ; <i1>:0 [#uses=1]
+ %retval = zext i1 %c to i32 ; <i32> [#uses=1]
+ ret i32 %retval
+; CHECK: ret i32 0
+}
+
+define i32 @test2(i32 %argc, i8* %argv, i8* %envp) {
+ %tmp15.i.i.i23 = malloc [2564 x i32] ; <[2564 x i32]*> [#uses=1]
+; CHECK-NOT: call i8* @malloc
+ %X = bitcast [2564 x i32]* %tmp15.i.i.i23 to i32*
+ %c = icmp ne i32* %X, null
+ %retval = zext i1 %c to i32 ; <i32> [#uses=1]
+ ret i32 %retval
+; CHECK: ret i32 1
+}
+
diff --git a/test/Transforms/InstCombine/malloc3.ll b/test/Transforms/InstCombine/malloc3.ll
new file mode 100644
index 0000000..f1c0cae
--- /dev/null
+++ b/test/Transforms/InstCombine/malloc3.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -instcombine -S | not grep load
+; PR1728
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+ %struct.foo = type { %struct.foo*, [10 x i32] }
[email protected] = internal constant [21 x i8] c"tmp = %p, next = %p\0A\00" ; <[21 x i8]*> [#uses=1]
+
+define i32 @main() {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp1 = malloc i8, i32 44 ; <i8*> [#uses=1]
+ %tmp12 = bitcast i8* %tmp1 to %struct.foo* ; <%struct.foo*> [#uses=3]
+ %tmp3 = malloc i8, i32 44 ; <i8*> [#uses=1]
+ %tmp34 = bitcast i8* %tmp3 to %struct.foo* ; <%struct.foo*> [#uses=1]
+ %tmp6 = getelementptr %struct.foo* %tmp12, i32 0, i32 0 ; <%struct.foo**> [#uses=1]
+ store %struct.foo* %tmp34, %struct.foo** %tmp6, align 4
+ %tmp8 = getelementptr %struct.foo* %tmp12, i32 0, i32 0 ; <%struct.foo**> [#uses=1]
+ %tmp9 = load %struct.foo** %tmp8, align 4 ; <%struct.foo*> [#uses=1]
+ %tmp10 = getelementptr [21 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp13 = call i32 (i8*, ...)* @printf( i8* %tmp10, %struct.foo* %tmp12, %struct.foo* %tmp9 ) ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @printf(i8*, ...)
+
diff --git a/test/Transforms/InstCombine/memcpy-to-load.ll b/test/Transforms/InstCombine/memcpy-to-load.ll
new file mode 100644
index 0000000..ebb8711
--- /dev/null
+++ b/test/Transforms/InstCombine/memcpy-to-load.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep {load double}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
+define void @foo(double* %X, double* %Y) {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp2 = bitcast double* %X to i8* ; <i8*> [#uses=1]
+ %tmp13 = bitcast double* %Y to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp2, i8* %tmp13, i32 8, i32 1 )
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/InstCombine/memcpy.ll b/test/Transforms/InstCombine/memcpy.ll
new file mode 100644
index 0000000..2e7b2c0
--- /dev/null
+++ b/test/Transforms/InstCombine/memcpy.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+define void @test4(i8* %a) {
+ tail call void @llvm.memcpy.i32( i8* %a, i8* %a, i32 100, i32 1 )
+ ret void
+}
+; CHECK: define void @test4
+; CHECK-NEXT: ret void
diff --git a/test/Transforms/InstCombine/memmove.ll b/test/Transforms/InstCombine/memmove.ll
new file mode 100644
index 0000000..1806cfc
--- /dev/null
+++ b/test/Transforms/InstCombine/memmove.ll
@@ -0,0 +1,42 @@
+; This test makes sure that memmove instructions are properly eliminated.
+;
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep {call void @llvm.memmove}
+
+@S = internal constant [33 x i8] c"panic: restorelist inconsistency\00" ; <[33 x i8]*> [#uses=1]
+@h = constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=1]
+@hel = constant [4 x i8] c"hel\00" ; <[4 x i8]*> [#uses=1]
+@hello_u = constant [8 x i8] c"hello_u\00" ; <[8 x i8]*> [#uses=1]
+
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32)
+
+define void @test1(i8* %A, i8* %B, i32 %N) {
+ call void @llvm.memmove.i32( i8* %A, i8* %B, i32 0, i32 1 )
+ ret void
+}
+
+define void @test2(i8* %A, i32 %N) {
+ ;; dest can't alias source since we can't write to source!
+ call void @llvm.memmove.i32( i8* %A, i8* getelementptr ([33 x i8]* @S, i32 0, i32 0), i32 %N, i32 1 )
+ ret void
+}
+
+define i32 @test3() {
+ %h_p = getelementptr [2 x i8]* @h, i32 0, i32 0 ; <i8*> [#uses=1]
+ %hel_p = getelementptr [4 x i8]* @hel, i32 0, i32 0 ; <i8*> [#uses=1]
+ %hello_u_p = getelementptr [8 x i8]* @hello_u, i32 0, i32 0 ; <i8*> [#uses=1]
+ %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
+ %target_p = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=3]
+ call void @llvm.memmove.i32( i8* %target_p, i8* %h_p, i32 2, i32 2 )
+ call void @llvm.memmove.i32( i8* %target_p, i8* %hel_p, i32 4, i32 4 )
+ call void @llvm.memmove.i32( i8* %target_p, i8* %hello_u_p, i32 8, i32 8 )
+ ret i32 0
+}
+
+; PR2370
+define void @test4(i8* %a) {
+ tail call void @llvm.memmove.i32( i8* %a, i8* %a, i32 100, i32 1 )
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/memset.ll b/test/Transforms/InstCombine/memset.ll
new file mode 100644
index 0000000..8e85694
--- /dev/null
+++ b/test/Transforms/InstCombine/memset.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -instcombine -S | not grep {call.*llvm.memset}
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
+define i32 @main() {
+ %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
+ %target_p = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=5]
+ call void @llvm.memset.i32( i8* %target_p, i8 1, i32 0, i32 1 )
+ call void @llvm.memset.i32( i8* %target_p, i8 1, i32 1, i32 1 )
+ call void @llvm.memset.i32( i8* %target_p, i8 1, i32 2, i32 2 )
+ call void @llvm.memset.i32( i8* %target_p, i8 1, i32 4, i32 4 )
+ call void @llvm.memset.i32( i8* %target_p, i8 1, i32 8, i32 8 )
+ ret i32 0
+}
+
diff --git a/test/Transforms/InstCombine/mul-masked-bits.ll b/test/Transforms/InstCombine/mul-masked-bits.ll
new file mode 100644
index 0000000..a43d5f2
--- /dev/null
+++ b/test/Transforms/InstCombine/mul-masked-bits.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep ashr
+
+define i32 @foo(i32 %x, i32 %y) {
+ %a = and i32 %x, 7
+ %b = and i32 %y, 7
+ %c = mul i32 %a, %b
+ %d = shl i32 %c, 26
+ %e = ashr i32 %d, 26
+ ret i32 %e
+}
diff --git a/test/Transforms/InstCombine/mul.ll b/test/Transforms/InstCombine/mul.ll
new file mode 100644
index 0000000..53a5643
--- /dev/null
+++ b/test/Transforms/InstCombine/mul.ll
@@ -0,0 +1,116 @@
+; This test makes sure that mul instructions are properly eliminated.
+; RUN: opt < %s -instcombine -S | not grep mul
+
+define i32 @test1(i32 %A) {
+ %B = mul i32 %A, 1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test2(i32 %A) {
+ ; Should convert to an add instruction
+ %B = mul i32 %A, 2 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test3(i32 %A) {
+ ; This should disappear entirely
+ %B = mul i32 %A, 0 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define double @test4(double %A) {
+ ; This is safe for FP
+ %B = fmul double 1.000000e+00, %A ; <double> [#uses=1]
+ ret double %B
+}
+
+define i32 @test5(i32 %A) {
+ %B = mul i32 %A, 8 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i8 @test6(i8 %A) {
+ %B = mul i8 %A, 8 ; <i8> [#uses=1]
+ %C = mul i8 %B, 8 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i32 @test7(i32 %i) {
+ %tmp = mul i32 %i, -1 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
+define i64 @test8(i64 %i) {
+ ; tmp = sub 0, %i
+ %j = mul i64 %i, -1 ; <i64> [#uses=1]
+ ret i64 %j
+}
+
+define i32 @test9(i32 %i) {
+ ; %j = sub 0, %i
+ %j = mul i32 %i, -1 ; <i32> [#uses=1]
+ ret i32 %j
+}
+
+define i32 @test10(i32 %a, i32 %b) {
+ %c = icmp slt i32 %a, 0 ; <i1> [#uses=1]
+ %d = zext i1 %c to i32 ; <i32> [#uses=1]
+ ; e = b & (a >> 31)
+ %e = mul i32 %d, %b ; <i32> [#uses=1]
+ ret i32 %e
+}
+
+define i32 @test11(i32 %a, i32 %b) {
+ %c = icmp sle i32 %a, -1 ; <i1> [#uses=1]
+ %d = zext i1 %c to i32 ; <i32> [#uses=1]
+ ; e = b & (a >> 31)
+ %e = mul i32 %d, %b ; <i32> [#uses=1]
+ ret i32 %e
+}
+
+define i32 @test12(i8 %a, i32 %b) {
+ %c = icmp ugt i8 %a, 127 ; <i1> [#uses=1]
+ %d = zext i1 %c to i32 ; <i32> [#uses=1]
+ ; e = b & (a >> 31)
+ %e = mul i32 %d, %b ; <i32> [#uses=1]
+ ret i32 %e
+}
+
+; PR2642
+define internal void @test13(<4 x float>*) {
+ load <4 x float>* %0, align 1
+ fmul <4 x float> %2, < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >
+ store <4 x float> %3, <4 x float>* %0, align 1
+ ret void
+}
+
+define <16 x i8> @test14(<16 x i8> %a) {
+ %b = mul <16 x i8> %a, zeroinitializer
+ ret <16 x i8> %b
+}
+
+; rdar://7293527
+define i32 @test15(i32 %A, i32 %B) {
+entry:
+ %shl = shl i32 1, %B
+ %m = mul i32 %shl, %A
+ ret i32 %m
+}
+
+; X * Y (when Y is 0 or 1) --> x & (0-Y)
+define i32 @test16(i32 %b, i1 %c) {
+ %d = zext i1 %c to i32 ; <i32> [#uses=1]
+ ; e = b & (a >> 31)
+ %e = mul i32 %d, %b ; <i32> [#uses=1]
+ ret i32 %e
+}
+
+; X * Y (when Y is 0 or 1) --> x & (0-Y)
+define i32 @test17(i32 %a, i32 %b) {
+ %a.lobit = lshr i32 %a, 31
+ %e = mul i32 %a.lobit, %b
+ ret i32 %e
+}
+
+
+
diff --git a/test/Transforms/InstCombine/multi-use-or.ll b/test/Transforms/InstCombine/multi-use-or.ll
new file mode 100644
index 0000000..9bbef23
--- /dev/null
+++ b/test/Transforms/InstCombine/multi-use-or.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -instcombine -S | grep {add double .sx, .sy}
+; The 'or' has multiple uses, make sure that this doesn't prevent instcombine
+; from propagating the extends to the truncs.
+
+define double @ScaleObjectAdd(double %sx, double %sy, double %sz) nounwind {
+entry:
+ %sx34 = bitcast double %sx to i64 ; <i64> [#uses=1]
+ %sx3435 = zext i64 %sx34 to i192 ; <i192> [#uses=1]
+ %sy22 = bitcast double %sy to i64 ; <i64> [#uses=1]
+ %sy2223 = zext i64 %sy22 to i192 ; <i192> [#uses=1]
+ %sy222324 = shl i192 %sy2223, 128 ; <i192> [#uses=1]
+ %sy222324.ins = or i192 %sx3435, %sy222324 ; <i192> [#uses=1]
+
+
+ %a = trunc i192 %sy222324.ins to i64 ; <i64> [#uses=1]
+ %b = bitcast i64 %a to double ; <double> [#uses=1]
+ %c = lshr i192 %sy222324.ins, 128 ; <i192> [#uses=1]
+ %d = trunc i192 %c to i64 ; <i64> [#uses=1]
+ %e = bitcast i64 %d to double ; <double> [#uses=1]
+ %f = fadd double %b, %e
+
+; ret double %e
+ ret double %f
+}
diff --git a/test/Transforms/InstCombine/narrow.ll b/test/Transforms/InstCombine/narrow.ll
new file mode 100644
index 0000000..1b96a06
--- /dev/null
+++ b/test/Transforms/InstCombine/narrow.ll
@@ -0,0 +1,18 @@
+; This file contains various testcases that check to see that instcombine
+; is narrowing computations when possible.
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {ret i1 false}
+
+; test1 - Eliminating the casts in this testcase (by narrowing the AND
+; operation) allows instcombine to realize the function always returns false.
+;
+define i1 @test1(i32 %A, i32 %B) {
+ %C1 = icmp slt i32 %A, %B ; <i1> [#uses=1]
+ %ELIM1 = zext i1 %C1 to i32 ; <i32> [#uses=1]
+ %C2 = icmp sgt i32 %A, %B ; <i1> [#uses=1]
+ %ELIM2 = zext i1 %C2 to i32 ; <i32> [#uses=1]
+ %C3 = and i32 %ELIM1, %ELIM2 ; <i32> [#uses=1]
+ %ELIM3 = trunc i32 %C3 to i1 ; <i1> [#uses=1]
+ ret i1 %ELIM3
+}
+
diff --git a/test/Transforms/InstCombine/no-negzero.ll b/test/Transforms/InstCombine/no-negzero.ll
new file mode 100644
index 0000000..f295130
--- /dev/null
+++ b/test/Transforms/InstCombine/no-negzero.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; ModuleID = '3555a.c'
+; sqrt(fabs) cannot be negative zero, so we should eliminate the fadd.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.8"
+
+; CHECK: @mysqrt
+; CHECK-NOT: fadd
+; CHECK: ret
+define double @mysqrt(double %x) nounwind {
+entry:
+ %x_addr = alloca double ; <double*> [#uses=2]
+ %retval = alloca double, align 8 ; <double*> [#uses=2]
+ %0 = alloca double, align 8 ; <double*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store double %x, double* %x_addr
+ %1 = load double* %x_addr, align 8 ; <double> [#uses=1]
+ %2 = call double @fabs(double %1) nounwind readnone ; <double> [#uses=1]
+ %3 = call double @sqrt(double %2) nounwind readonly ; <double> [#uses=1]
+ %4 = fadd double %3, 0.000000e+00 ; <double> [#uses=1]
+ store double %4, double* %0, align 8
+ %5 = load double* %0, align 8 ; <double> [#uses=1]
+ store double %5, double* %retval, align 8
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load double* %retval ; <double> [#uses=1]
+ ret double %retval1
+}
+
+declare double @fabs(double)
+
+declare double @sqrt(double) nounwind readonly
diff --git a/test/Transforms/InstCombine/not-fcmp.ll b/test/Transforms/InstCombine/not-fcmp.ll
new file mode 100644
index 0000000..ad01a6b
--- /dev/null
+++ b/test/Transforms/InstCombine/not-fcmp.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep "fcmp uge"
+; PR1570
+
+define i1 @f(float %X, float %Y) {
+entry:
+ %tmp3 = fcmp olt float %X, %Y ; <i1> [#uses=1]
+ %toBoolnot5 = xor i1 %tmp3, true ; <i1> [#uses=1]
+ ret i1 %toBoolnot5
+}
+
diff --git a/test/Transforms/InstCombine/not.ll b/test/Transforms/InstCombine/not.ll
new file mode 100644
index 0000000..c58ce11
--- /dev/null
+++ b/test/Transforms/InstCombine/not.ll
@@ -0,0 +1,54 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+
+; RUN: opt < %s -instcombine -S | not grep xor
+
+define i32 @test1(i32 %A) {
+ %B = xor i32 %A, -1 ; <i32> [#uses=1]
+ %C = xor i32 %B, -1 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i1 @test2(i32 %A, i32 %B) {
+ ; Can change into setge
+ %cond = icmp sle i32 %A, %B ; <i1> [#uses=1]
+ %Ret = xor i1 %cond, true ; <i1> [#uses=1]
+ ret i1 %Ret
+}
+
+; Test that demorgans law can be instcombined
+define i32 @test3(i32 %A, i32 %B) {
+ %a = xor i32 %A, -1 ; <i32> [#uses=1]
+ %b = xor i32 %B, -1 ; <i32> [#uses=1]
+ %c = and i32 %a, %b ; <i32> [#uses=1]
+ %d = xor i32 %c, -1 ; <i32> [#uses=1]
+ ret i32 %d
+}
+
+; Test that demorgens law can work with constants
+define i32 @test4(i32 %A, i32 %B) {
+ %a = xor i32 %A, -1 ; <i32> [#uses=1]
+ %c = and i32 %a, 5 ; <i32> [#uses=1]
+ %d = xor i32 %c, -1 ; <i32> [#uses=1]
+ ret i32 %d
+}
+
+; test the mirror of demorgans law...
+define i32 @test5(i32 %A, i32 %B) {
+ %a = xor i32 %A, -1 ; <i32> [#uses=1]
+ %b = xor i32 %B, -1 ; <i32> [#uses=1]
+ %c = or i32 %a, %b ; <i32> [#uses=1]
+ %d = xor i32 %c, -1 ; <i32> [#uses=1]
+ ret i32 %d
+}
+
+; PR2298
+define i8 @test6(i32 %a, i32 %b) zeroext nounwind {
+entry:
+ %tmp1not = xor i32 %a, -1 ; <i32> [#uses=1]
+ %tmp2not = xor i32 %b, -1 ; <i32> [#uses=1]
+ %tmp3 = icmp slt i32 %tmp1not, %tmp2not ; <i1> [#uses=1]
+ %retval67 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
+ ret i8 %retval67
+}
+
diff --git a/test/Transforms/InstCombine/nothrow.ll b/test/Transforms/InstCombine/nothrow.ll
new file mode 100644
index 0000000..08d90bf
--- /dev/null
+++ b/test/Transforms/InstCombine/nothrow.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | not grep call
+; rdar://6880732
+declare double @t1(i32) readonly
+
+define void @t2() nounwind {
+ call double @t1(i32 42) ;; dead call even though callee is not nothrow.
+ ret void
+}
diff --git a/test/Transforms/InstCombine/nsw.ll b/test/Transforms/InstCombine/nsw.ll
new file mode 100644
index 0000000..821cebe
--- /dev/null
+++ b/test/Transforms/InstCombine/nsw.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; CHECK: define i32 @foo
+; %y = sub i32 0, %x
+; %z = sdiv i32 %y, 337
+; ret i32 %y
+define i32 @foo(i32 %x) {
+ %y = sub i32 0, %x
+ %z = sdiv i32 %y, 337
+ ret i32 %y
+}
+
+; CHECK: define i32 @bar
+; %y = sdiv i32 %x, -337
+; ret i32 %y
+define i32 @bar(i32 %x) {
+ %y = sub nsw i32 0, %x
+ %z = sdiv i32 %y, 337
+ ret i32 %y
+}
diff --git a/test/Transforms/InstCombine/objsize.ll b/test/Transforms/InstCombine/objsize.ll
new file mode 100644
index 0000000..69e09f6
--- /dev/null
+++ b/test/Transforms/InstCombine/objsize.ll
@@ -0,0 +1,52 @@
+; Test a pile of objectsize bounds checking.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; We need target data to get the sizes of the arrays and structures.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+@a = private global [60 x i8] zeroinitializer, align 1 ; <[60 x i8]*>
[email protected] = private constant [8 x i8] c"abcdefg\00" ; <[8 x i8]*>
+
+define i32 @foo() nounwind {
+; CHECK: @foo
+; CHECK-NEXT: ret i32 60
+ %1 = call i32 @llvm.objectsize.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i1 false)
+ ret i32 %1
+}
+
+define i8* @bar() nounwind {
+; CHECK: @bar
+entry:
+ %retval = alloca i8*
+ %0 = call i32 @llvm.objectsize.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i1 false)
+ %cmp = icmp ne i32 %0, -1
+; CHECK: br i1 true
+ br i1 %cmp, label %cond.true, label %cond.false
+
+cond.true:
+ %1 = load i8** %retval;
+ ret i8* %1;
+
+cond.false:
+ %2 = load i8** %retval;
+ ret i8* %2;
+}
+
+; FIXME: Should be ret i32 0
+define i32 @f() nounwind {
+; CHECK: @f
+; CHECK-NEXT: llvm.objectsize.i32
+ %1 = call i32 @llvm.objectsize.i32(i8* getelementptr ([60 x i8]* @a, i32 1, i32 0), i1 false)
+ ret i32 %1
+}
+
+@window = external global [0 x i8]
+
+define i1 @baz() nounwind {
+; CHECK: @baz
+; CHECK-NEXT: ret i1 true
+ %1 = tail call i32 @llvm.objectsize.i32(i8* getelementptr inbounds ([0 x i8]* @window, i32 0, i32 0), i1 false)
+ %2 = icmp eq i32 %1, -1
+ ret i1 %2
+}
+
+declare i32 @llvm.objectsize.i32(i8*, i1) nounwind readonly
\ No newline at end of file
diff --git a/test/Transforms/InstCombine/odr-linkage.ll b/test/Transforms/InstCombine/odr-linkage.ll
new file mode 100644
index 0000000..a64ef28
--- /dev/null
+++ b/test/Transforms/InstCombine/odr-linkage.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -instcombine -S | grep {ret i32 10}
+
+@g1 = available_externally constant i32 1
+@g2 = linkonce_odr constant i32 2
+@g3 = weak_odr constant i32 3
+@g4 = internal constant i32 4
+
+define i32 @test() {
+ %A = load i32* @g1
+ %B = load i32* @g2
+ %C = load i32* @g3
+ %D = load i32* @g4
+
+ %a = add i32 %A, %B
+ %b = add i32 %a, %C
+ %c = add i32 %b, %D
+ ret i32 %c
+}
+
\ No newline at end of file
diff --git a/test/Transforms/InstCombine/or-fcmp.ll b/test/Transforms/InstCombine/or-fcmp.ll
new file mode 100644
index 0000000..9692bfc
--- /dev/null
+++ b/test/Transforms/InstCombine/or-fcmp.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -instcombine -S | grep fcmp | count 3
+; RUN: opt < %s -instcombine -S | grep ret | grep 1
+
+define zeroext i8 @t1(float %x, float %y) nounwind {
+ %a = fcmp ueq float %x, %y ; <i1> [#uses=1]
+ %b = fcmp uno float %x, %y ; <i1> [#uses=1]
+ %c = or i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t2(float %x, float %y) nounwind {
+ %a = fcmp olt float %x, %y ; <i1> [#uses=1]
+ %b = fcmp oeq float %x, %y ; <i1> [#uses=1]
+ %c = or i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t3(float %x, float %y) nounwind {
+ %a = fcmp ult float %x, %y ; <i1> [#uses=1]
+ %b = fcmp uge float %x, %y ; <i1> [#uses=1]
+ %c = or i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t4(float %x, float %y) nounwind {
+ %a = fcmp ult float %x, %y ; <i1> [#uses=1]
+ %b = fcmp ugt float %x, %y ; <i1> [#uses=1]
+ %c = or i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
diff --git a/test/Transforms/InstCombine/or-to-xor.ll b/test/Transforms/InstCombine/or-to-xor.ll
new file mode 100644
index 0000000..1495ee4
--- /dev/null
+++ b/test/Transforms/InstCombine/or-to-xor.ll
@@ -0,0 +1,42 @@
+; RUN: opt < %s -instcombine -S | grep {xor i32 %a, %b} | count 4
+; RUN: opt < %s -instcombine -S | not grep {and}
+
+define i32 @func1(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %b_not = xor i32 %b, -1
+ %0 = and i32 %a, %b_not
+ %a_not = xor i32 %a, -1
+ %1 = and i32 %a_not, %b
+ %2 = or i32 %0, %1
+ ret i32 %2
+}
+
+define i32 @func2(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %b_not = xor i32 %b, -1
+ %0 = and i32 %b_not, %a
+ %a_not = xor i32 %a, -1
+ %1 = and i32 %a_not, %b
+ %2 = or i32 %0, %1
+ ret i32 %2
+}
+
+define i32 @func3(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %b_not = xor i32 %b, -1
+ %0 = and i32 %a, %b_not
+ %a_not = xor i32 %a, -1
+ %1 = and i32 %b, %a_not
+ %2 = or i32 %0, %1
+ ret i32 %2
+}
+
+define i32 @func4(i32 %a, i32 %b) nounwind readnone {
+entry:
+ %b_not = xor i32 %b, -1
+ %0 = and i32 %b_not, %a
+ %a_not = xor i32 %a, -1
+ %1 = and i32 %b, %a_not
+ %2 = or i32 %0, %1
+ ret i32 %2
+}
diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll
new file mode 100644
index 0000000..189be10
--- /dev/null
+++ b/test/Transforms/InstCombine/or.ll
@@ -0,0 +1,352 @@
+; This test makes sure that these instructions are properly eliminated.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+define i32 @test1(i32 %A) {
+ %B = or i32 %A, 0
+ ret i32 %B
+; CHECK: @test1
+; CHECK: ret i32 %A
+}
+
+define i32 @test2(i32 %A) {
+ %B = or i32 %A, -1
+ ret i32 %B
+; CHECK: @test2
+; CHECK: ret i32 -1
+}
+
+define i8 @test2a(i8 %A) {
+ %B = or i8 %A, -1
+ ret i8 %B
+; CHECK: @test2a
+; CHECK: ret i8 -1
+}
+
+define i1 @test3(i1 %A) {
+ %B = or i1 %A, false
+ ret i1 %B
+; CHECK: @test3
+; CHECK: ret i1 %A
+}
+
+define i1 @test4(i1 %A) {
+ %B = or i1 %A, true
+ ret i1 %B
+; CHECK: @test4
+; CHECK: ret i1 true
+}
+
+define i1 @test5(i1 %A) {
+ %B = or i1 %A, %A
+ ret i1 %B
+; CHECK: @test5
+; CHECK: ret i1 %A
+}
+
+define i32 @test6(i32 %A) {
+ %B = or i32 %A, %A
+ ret i32 %B
+; CHECK: @test6
+; CHECK: ret i32 %A
+}
+
+; A | ~A == -1
+define i32 @test7(i32 %A) {
+ %NotA = xor i32 -1, %A
+ %B = or i32 %A, %NotA
+ ret i32 %B
+; CHECK: @test7
+; CHECK: ret i32 -1
+}
+
+define i8 @test8(i8 %A) {
+ %B = or i8 %A, -2
+ %C = or i8 %B, 1
+ ret i8 %C
+; CHECK: @test8
+; CHECK: ret i8 -1
+}
+
+; Test that (A|c1)|(B|c2) == (A|B)|(c1|c2)
+define i8 @test9(i8 %A, i8 %B) {
+ %C = or i8 %A, 1
+ %D = or i8 %B, -2
+ %E = or i8 %C, %D
+ ret i8 %E
+; CHECK: @test9
+; CHECK: ret i8 -1
+}
+
+define i8 @test10(i8 %A) {
+ %B = or i8 %A, 1
+ %C = and i8 %B, -2
+ ; (X & C1) | C2 --> (X | C2) & (C1|C2)
+ %D = or i8 %C, -2
+ ret i8 %D
+; CHECK: @test10
+; CHECK: ret i8 -2
+}
+
+define i8 @test11(i8 %A) {
+ %B = or i8 %A, -2
+ %C = xor i8 %B, 13
+ ; (X ^ C1) | C2 --> (X | C2) ^ (C1&~C2)
+ %D = or i8 %C, 1
+ %E = xor i8 %D, 12
+ ret i8 %E
+; CHECK: @test11
+; CHECK: ret i8 -1
+}
+
+define i32 @test12(i32 %A) {
+ ; Should be eliminated
+ %B = or i32 %A, 4
+ %C = and i32 %B, 8
+ ret i32 %C
+; CHECK: @test12
+; CHECK: %C = and i32 %A, 8
+; CHECK: ret i32 %C
+}
+
+define i32 @test13(i32 %A) {
+ %B = or i32 %A, 12
+ ; Always equal to 8
+ %C = and i32 %B, 8
+ ret i32 %C
+; CHECK: @test13
+; CHECK: ret i32 8
+}
+
+define i1 @test14(i32 %A, i32 %B) {
+ %C1 = icmp ult i32 %A, %B
+ %C2 = icmp ugt i32 %A, %B
+ ; (A < B) | (A > B) === A != B
+ %D = or i1 %C1, %C2
+ ret i1 %D
+; CHECK: @test14
+; CHECK: %D = icmp ne i32 %A, %B
+; CHECK: ret i1 %D
+}
+
+define i1 @test15(i32 %A, i32 %B) {
+ %C1 = icmp ult i32 %A, %B
+ %C2 = icmp eq i32 %A, %B
+ ; (A < B) | (A == B) === A <= B
+ %D = or i1 %C1, %C2
+ ret i1 %D
+; CHECK: @test15
+; CHECK: %D = icmp ule i32 %A, %B
+; CHECK: ret i1 %D
+}
+
+define i32 @test16(i32 %A) {
+ %B = and i32 %A, 1
+ ; -2 = ~1
+ %C = and i32 %A, -2
+ ; %D = and int %B, -1 == %B
+ %D = or i32 %B, %C
+ ret i32 %D
+; CHECK: @test16
+; CHECK: ret i32 %A
+}
+
+define i32 @test17(i32 %A) {
+ %B = and i32 %A, 1
+ %C = and i32 %A, 4
+ ; %D = and int %B, 5
+ %D = or i32 %B, %C
+ ret i32 %D
+; CHECK: @test17
+; CHECK: %D = and i32 %A, 5
+; CHECK: ret i32 %D
+}
+
+define i1 @test18(i32 %A) {
+ %B = icmp sge i32 %A, 100
+ %C = icmp slt i32 %A, 50
+ ;; (A-50) >u 50
+ %D = or i1 %B, %C
+ ret i1 %D
+; CHECK: @test18
+; CHECK: add i32
+; CHECK: %D = icmp ugt
+; CHECK: ret i1 %D
+}
+
+define i1 @test19(i32 %A) {
+ %B = icmp eq i32 %A, 50
+ %C = icmp eq i32 %A, 51
+ ;; (A-50) < 2
+ %D = or i1 %B, %C
+ ret i1 %D
+; CHECK: @test19
+; CHECK: add i32
+; CHECK: %D = icmp ult
+; CHECK: ret i1 %D
+}
+
+define i32 @test20(i32 %x) {
+ %y = and i32 %x, 123
+ %z = or i32 %y, %x
+ ret i32 %z
+; CHECK: @test20
+; CHECK: ret i32 %x
+}
+
+define i32 @test21(i32 %tmp.1) {
+ %tmp.1.mask1 = add i32 %tmp.1, 2
+ %tmp.3 = and i32 %tmp.1.mask1, -2
+ %tmp.5 = and i32 %tmp.1, 1
+ ;; add tmp.1, 2
+ %tmp.6 = or i32 %tmp.5, %tmp.3
+ ret i32 %tmp.6
+; CHECK: @test21
+; CHECK: add i32 %{{[^,]*}}, 2
+; CHECK: ret i32
+}
+
+define i32 @test22(i32 %B) {
+ %ELIM41 = and i32 %B, 1
+ %ELIM7 = and i32 %B, -2
+ %ELIM5 = or i32 %ELIM41, %ELIM7
+ ret i32 %ELIM5
+; CHECK: @test22
+; CHECK: ret i32 %B
+}
+
+define i16 @test23(i16 %A) {
+ %B = lshr i16 %A, 1
+ ;; fold or into xor
+ %C = or i16 %B, -32768
+ %D = xor i16 %C, 8193
+ ret i16 %D
+; CHECK: @test23
+; CHECK: %B = lshr i16 %A, 1
+; CHECK: %D = xor i16 %B, -24575
+; CHECK: ret i16 %D
+}
+
+; PR1738
+define i1 @test24(double %X, double %Y) {
+ %tmp9 = fcmp uno double %X, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp13 = fcmp uno double %Y, 0.000000e+00 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp13, %tmp9 ; <i1> [#uses=1]
+ ret i1 %bothcond
+
+; CHECK: @test24
+; CHECK: %bothcond = fcmp uno double %Y, %X ; <i1> [#uses=1]
+; CHECK: ret i1 %bothcond
+}
+
+; PR3266 & PR5276
+define i1 @test25(i32 %A, i32 %B) {
+ %C = icmp eq i32 %A, 0
+ %D = icmp eq i32 %B, 57
+ %E = or i1 %C, %D
+ %F = xor i1 %E, -1
+ ret i1 %F
+
+; CHECK: @test25
+; CHECK: icmp ne i32 %A, 0
+; CHECK-NEXT: icmp ne i32 %B, 57
+; CHECK-NEXT: %F = and i1
+; CHECK-NEXT: ret i1 %F
+}
+
+; PR5634
+define i1 @test26(i32 %A, i32 %B) {
+ %C1 = icmp eq i32 %A, 0
+ %C2 = icmp eq i32 %B, 0
+ ; (A == 0) & (A == 0) --> (A|B) == 0
+ %D = and i1 %C1, %C2
+ ret i1 %D
+; CHECK: @test26
+; CHECK: or i32 %A, %B
+; CHECK: icmp eq i32 {{.*}}, 0
+; CHECK: ret i1
+}
+
+define i1 @test27(i32* %A, i32* %B) {
+ %C1 = ptrtoint i32* %A to i32
+ %C2 = ptrtoint i32* %B to i32
+ %D = or i32 %C1, %C2
+ %E = icmp eq i32 %D, 0
+ ret i1 %E
+; CHECK: @test27
+; CHECK: icmp eq i32* %A, null
+; CHECK: icmp eq i32* %B, null
+; CHECK: and i1
+; CHECK: ret i1
+}
+
+; PR5634
+define i1 @test28(i32 %A, i32 %B) {
+ %C1 = icmp ne i32 %A, 0
+ %C2 = icmp ne i32 %B, 0
+ ; (A != 0) | (A != 0) --> (A|B) != 0
+ %D = or i1 %C1, %C2
+ ret i1 %D
+; CHECK: @test28
+; CHECK: or i32 %A, %B
+; CHECK: icmp ne i32 {{.*}}, 0
+; CHECK: ret i1
+}
+
+define i1 @test29(i32* %A, i32* %B) {
+ %C1 = ptrtoint i32* %A to i32
+ %C2 = ptrtoint i32* %B to i32
+ %D = or i32 %C1, %C2
+ %E = icmp ne i32 %D, 0
+ ret i1 %E
+; CHECK: @test29
+; CHECK: icmp ne i32* %A, null
+; CHECK: icmp ne i32* %B, null
+; CHECK: or i1
+; CHECK: ret i1
+}
+
+; PR4216
+define i32 @test30(i32 %A) {
+entry:
+ %B = or i32 %A, 32962
+ %C = and i32 %A, -65536
+ %D = and i32 %B, 40186
+ %E = or i32 %D, %C
+ ret i32 %E
+; CHECK: @test30
+; CHECK: %B = or i32 %A, 32962
+; CHECK: %E = and i32 %B, -25350
+; CHECK: ret i32 %E
+}
+
+; PR4216
+define i64 @test31(i64 %A) nounwind readnone ssp noredzone {
+ %B = or i64 %A, 194
+ %D = and i64 %B, 250
+
+ %C = or i64 %A, 32768
+ %E = and i64 %C, 4294941696
+
+ %F = or i64 %D, %E
+ ret i64 %F
+; CHECK: @test31
+; CHECK-NEXT: %bitfield = or i64 %A, 32962
+; CHECK-NEXT: %F = and i64 %bitfield, 4294941946
+; CHECK-NEXT: ret i64 %F
+}
+
+define <4 x i32> @test32(<4 x i1> %and.i1352, <4 x i32> %vecinit6.i176, <4 x i32> %vecinit6.i191) {
+ %and.i135 = sext <4 x i1> %and.i1352 to <4 x i32> ; <<4 x i32>> [#uses=2]
+ %and.i129 = and <4 x i32> %vecinit6.i176, %and.i135 ; <<4 x i32>> [#uses=1]
+ %neg.i = xor <4 x i32> %and.i135, <i32 -1, i32 -1, i32 -1, i32 -1> ; <<4 x i32>> [#uses=1]
+ %and.i = and <4 x i32> %vecinit6.i191, %neg.i ; <<4 x i32>> [#uses=1]
+ %or.i = or <4 x i32> %and.i, %and.i129 ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %or.i
+; Don't turn this into a vector select until codegen matures to handle them
+; better.
+; CHECK: @test32
+; CHECK: or <4 x i32> %and.i, %and.i129
+}
+
diff --git a/test/Transforms/InstCombine/phi-merge-gep.ll b/test/Transforms/InstCombine/phi-merge-gep.ll
new file mode 100644
index 0000000..2671749
--- /dev/null
+++ b/test/Transforms/InstCombine/phi-merge-gep.ll
@@ -0,0 +1,102 @@
+; RUN: opt < %s -S -instcombine > %t
+; RUN: grep {= getelementptr} %t | count 20
+; RUN: grep {= phi} %t | count 13
+
+; Don't push the geps through these phis, because they would require
+; two phis each, which burdens the loop with high register pressure.
+
+define void @foo(float* %Ar, float* %Ai, i64 %As, float* %Cr, float* %Ci, i64 %Cs, i64 %n) nounwind {
+entry:
+ %0 = getelementptr inbounds float* %Ar, i64 0 ; <float*> [#uses=1]
+ %1 = getelementptr inbounds float* %Ai, i64 0 ; <float*> [#uses=1]
+ %2 = mul i64 %n, %As ; <i64> [#uses=1]
+ %3 = getelementptr inbounds float* %Ar, i64 %2 ; <float*> [#uses=1]
+ %4 = mul i64 %n, %As ; <i64> [#uses=1]
+ %5 = getelementptr inbounds float* %Ai, i64 %4 ; <float*> [#uses=1]
+ %6 = mul i64 %n, 2 ; <i64> [#uses=1]
+ %7 = mul i64 %6, %As ; <i64> [#uses=1]
+ %8 = getelementptr inbounds float* %Ar, i64 %7 ; <float*> [#uses=1]
+ %9 = mul i64 %n, 2 ; <i64> [#uses=1]
+ %10 = mul i64 %9, %As ; <i64> [#uses=1]
+ %11 = getelementptr inbounds float* %Ai, i64 %10 ; <float*> [#uses=1]
+ %12 = getelementptr inbounds float* %Cr, i64 0 ; <float*> [#uses=1]
+ %13 = getelementptr inbounds float* %Ci, i64 0 ; <float*> [#uses=1]
+ %14 = mul i64 %n, %Cs ; <i64> [#uses=1]
+ %15 = getelementptr inbounds float* %Cr, i64 %14 ; <float*> [#uses=1]
+ %16 = mul i64 %n, %Cs ; <i64> [#uses=1]
+ %17 = getelementptr inbounds float* %Ci, i64 %16 ; <float*> [#uses=1]
+ %18 = mul i64 %n, 2 ; <i64> [#uses=1]
+ %19 = mul i64 %18, %Cs ; <i64> [#uses=1]
+ %20 = getelementptr inbounds float* %Cr, i64 %19 ; <float*> [#uses=1]
+ %21 = mul i64 %n, 2 ; <i64> [#uses=1]
+ %22 = mul i64 %21, %Cs ; <i64> [#uses=1]
+ %23 = getelementptr inbounds float* %Ci, i64 %22 ; <float*> [#uses=1]
+ br label %bb13
+
+bb: ; preds = %bb13
+ %24 = load float* %A0r.0, align 4 ; <float> [#uses=1]
+ %25 = load float* %A0i.0, align 4 ; <float> [#uses=1]
+ %26 = load float* %A1r.0, align 4 ; <float> [#uses=2]
+ %27 = load float* %A1i.0, align 4 ; <float> [#uses=2]
+ %28 = load float* %A2r.0, align 4 ; <float> [#uses=2]
+ %29 = load float* %A2i.0, align 4 ; <float> [#uses=2]
+ %30 = fadd float %26, %28 ; <float> [#uses=2]
+ %31 = fadd float %27, %29 ; <float> [#uses=2]
+ %32 = fsub float %26, %28 ; <float> [#uses=1]
+ %33 = fsub float %27, %29 ; <float> [#uses=1]
+ %34 = fadd float %24, %30 ; <float> [#uses=2]
+ %35 = fadd float %25, %31 ; <float> [#uses=2]
+ %36 = fmul float %30, -1.500000e+00 ; <float> [#uses=1]
+ %37 = fmul float %31, -1.500000e+00 ; <float> [#uses=1]
+ %38 = fadd float %34, %36 ; <float> [#uses=2]
+ %39 = fadd float %35, %37 ; <float> [#uses=2]
+ %40 = fmul float %32, 0x3FEBB67AE0000000 ; <float> [#uses=2]
+ %41 = fmul float %33, 0x3FEBB67AE0000000 ; <float> [#uses=2]
+ %42 = fadd float %38, %41 ; <float> [#uses=1]
+ %43 = fsub float %39, %40 ; <float> [#uses=1]
+ %44 = fsub float %38, %41 ; <float> [#uses=1]
+ %45 = fadd float %39, %40 ; <float> [#uses=1]
+ store float %34, float* %C0r.0, align 4
+ store float %35, float* %C0i.0, align 4
+ store float %42, float* %C1r.0, align 4
+ store float %43, float* %C1i.0, align 4
+ store float %44, float* %C2r.0, align 4
+ store float %45, float* %C2i.0, align 4
+ %46 = getelementptr inbounds float* %A0r.0, i64 %As ; <float*> [#uses=1]
+ %47 = getelementptr inbounds float* %A0i.0, i64 %As ; <float*> [#uses=1]
+ %48 = getelementptr inbounds float* %A1r.0, i64 %As ; <float*> [#uses=1]
+ %49 = getelementptr inbounds float* %A1i.0, i64 %As ; <float*> [#uses=1]
+ %50 = getelementptr inbounds float* %A2r.0, i64 %As ; <float*> [#uses=1]
+ %51 = getelementptr inbounds float* %A2i.0, i64 %As ; <float*> [#uses=1]
+ %52 = getelementptr inbounds float* %C0r.0, i64 %Cs ; <float*> [#uses=1]
+ %53 = getelementptr inbounds float* %C0i.0, i64 %Cs ; <float*> [#uses=1]
+ %54 = getelementptr inbounds float* %C1r.0, i64 %Cs ; <float*> [#uses=1]
+ %55 = getelementptr inbounds float* %C1i.0, i64 %Cs ; <float*> [#uses=1]
+ %56 = getelementptr inbounds float* %C2r.0, i64 %Cs ; <float*> [#uses=1]
+ %57 = getelementptr inbounds float* %C2i.0, i64 %Cs ; <float*> [#uses=1]
+ %58 = add nsw i64 %i.0, 1 ; <i64> [#uses=1]
+ br label %bb13
+
+bb13: ; preds = %bb, %entry
+ %i.0 = phi i64 [ 0, %entry ], [ %58, %bb ] ; <i64> [#uses=2]
+ %C2i.0 = phi float* [ %23, %entry ], [ %57, %bb ] ; <float*> [#uses=2]
+ %C2r.0 = phi float* [ %20, %entry ], [ %56, %bb ] ; <float*> [#uses=2]
+ %C1i.0 = phi float* [ %17, %entry ], [ %55, %bb ] ; <float*> [#uses=2]
+ %C1r.0 = phi float* [ %15, %entry ], [ %54, %bb ] ; <float*> [#uses=2]
+ %C0i.0 = phi float* [ %13, %entry ], [ %53, %bb ] ; <float*> [#uses=2]
+ %C0r.0 = phi float* [ %12, %entry ], [ %52, %bb ] ; <float*> [#uses=2]
+ %A2i.0 = phi float* [ %11, %entry ], [ %51, %bb ] ; <float*> [#uses=2]
+ %A2r.0 = phi float* [ %8, %entry ], [ %50, %bb ] ; <float*> [#uses=2]
+ %A1i.0 = phi float* [ %5, %entry ], [ %49, %bb ] ; <float*> [#uses=2]
+ %A1r.0 = phi float* [ %3, %entry ], [ %48, %bb ] ; <float*> [#uses=2]
+ %A0i.0 = phi float* [ %1, %entry ], [ %47, %bb ] ; <float*> [#uses=2]
+ %A0r.0 = phi float* [ %0, %entry ], [ %46, %bb ] ; <float*> [#uses=2]
+ %59 = icmp slt i64 %i.0, %n ; <i1> [#uses=1]
+ br i1 %59, label %bb, label %bb14
+
+bb14: ; preds = %bb13
+ br label %return
+
+return: ; preds = %bb14
+ ret void
+}
diff --git a/test/Transforms/InstCombine/phi.ll b/test/Transforms/InstCombine/phi.ll
new file mode 100644
index 0000000..f0343e4
--- /dev/null
+++ b/test/Transforms/InstCombine/phi.ll
@@ -0,0 +1,364 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128:n8:16:32:64"
+
+define i32 @test1(i32 %A, i1 %b) {
+BB0:
+ br i1 %b, label %BB1, label %BB2
+
+BB1:
+ ; Combine away one argument PHI nodes
+ %B = phi i32 [ %A, %BB0 ]
+ ret i32 %B
+
+BB2:
+ ret i32 %A
+; CHECK: @test1
+; CHECK: BB1:
+; CHECK-NEXT: ret i32 %A
+}
+
+define i32 @test2(i32 %A, i1 %b) {
+BB0:
+ br i1 %b, label %BB1, label %BB2
+
+BB1:
+ br label %BB2
+
+BB2:
+ ; Combine away PHI nodes with same values
+ %B = phi i32 [ %A, %BB0 ], [ %A, %BB1 ]
+ ret i32 %B
+; CHECK: @test2
+; CHECK: BB2:
+; CHECK-NEXT: ret i32 %A
+}
+
+define i32 @test3(i32 %A, i1 %b) {
+BB0:
+ br label %Loop
+
+Loop:
+ ; PHI has same value always.
+ %B = phi i32 [ %A, %BB0 ], [ %B, %Loop ]
+ br i1 %b, label %Loop, label %Exit
+
+Exit:
+ ret i32 %B
+; CHECK: @test3
+; CHECK: Exit:
+; CHECK-NEXT: ret i32 %A
+}
+
+define i32 @test4(i1 %b) {
+BB0:
+ ; Loop is unreachable
+ ret i32 7
+
+Loop: ; preds = %L2, %Loop
+ ; PHI has same value always.
+ %B = phi i32 [ %B, %L2 ], [ %B, %Loop ]
+ br i1 %b, label %L2, label %Loop
+
+L2: ; preds = %Loop
+ br label %Loop
+; CHECK: @test4
+; CHECK: Loop:
+; CHECK-NEXT: br i1 %b
+}
+
+define i32 @test5(i32 %A, i1 %b) {
+BB0:
+ br label %Loop
+
+Loop: ; preds = %Loop, %BB0
+ ; PHI has same value always.
+ %B = phi i32 [ %A, %BB0 ], [ undef, %Loop ]
+ br i1 %b, label %Loop, label %Exit
+
+Exit: ; preds = %Loop
+ ret i32 %B
+; CHECK: @test5
+; CHECK: Loop:
+; CHECK-NEXT: br i1 %b
+; CHECK: Exit:
+; CHECK-NEXT: ret i32 %A
+}
+
+define i32 @test6(i16 %A, i1 %b) {
+BB0:
+ %X = zext i16 %A to i32
+ br i1 %b, label %BB1, label %BB2
+
+BB1:
+ %Y = zext i16 %A to i32
+ br label %BB2
+
+BB2:
+ ;; Suck casts into phi
+ %B = phi i32 [ %X, %BB0 ], [ %Y, %BB1 ]
+ ret i32 %B
+; CHECK: @test6
+; CHECK: BB2:
+; CHECK: zext i16 %A to i32
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test7(i32 %A, i1 %b) {
+BB0:
+ br label %Loop
+
+Loop: ; preds = %Loop, %BB0
+ ; PHI is dead.
+ %B = phi i32 [ %A, %BB0 ], [ %C, %Loop ]
+ %C = add i32 %B, 123
+ br i1 %b, label %Loop, label %Exit
+
+Exit: ; preds = %Loop
+ ret i32 0
+; CHECK: @test7
+; CHECK: Loop:
+; CHECK-NEXT: br i1 %b
+}
+
+define i32* @test8({ i32, i32 } *%A, i1 %b) {
+BB0:
+ %X = getelementptr { i32, i32 } *%A, i32 0, i32 1
+ br i1 %b, label %BB1, label %BB2
+
+BB1:
+ %Y = getelementptr { i32, i32 } *%A, i32 0, i32 1
+ br label %BB2
+
+BB2:
+ ;; Suck GEPs into phi
+ %B = phi i32* [ %X, %BB0 ], [ %Y, %BB1 ]
+ ret i32* %B
+; CHECK: @test8
+; CHECK-NOT: phi
+; CHECK: BB2:
+; CHECK-NEXT: %B = getelementptr
+; CHECK-NEXT: ret i32* %B
+}
+
+define i32 @test9(i32* %A, i32* %B) {
+entry:
+ %c = icmp eq i32* %A, null
+ br i1 %c, label %bb1, label %bb
+
+bb:
+ %C = load i32* %B, align 1
+ br label %bb2
+
+bb1:
+ %D = load i32* %A, align 1
+ br label %bb2
+
+bb2:
+ %E = phi i32 [ %C, %bb ], [ %D, %bb1 ]
+ ret i32 %E
+; CHECK: @test9
+; CHECK: bb2:
+; CHECK-NEXT: phi i32* [ %B, %bb ], [ %A, %bb1 ]
+; CHECK-NEXT: %E = load i32* %{{[^,]*}}, align 1
+; CHECK-NEXT: ret i32 %E
+
+}
+
+define i32 @test10(i32* %A, i32* %B) {
+entry:
+ %c = icmp eq i32* %A, null
+ br i1 %c, label %bb1, label %bb
+
+bb:
+ %C = load i32* %B, align 16
+ br label %bb2
+
+bb1:
+ %D = load i32* %A, align 32
+ br label %bb2
+
+bb2:
+ %E = phi i32 [ %C, %bb ], [ %D, %bb1 ]
+ ret i32 %E
+; CHECK: @test10
+; CHECK: bb2:
+; CHECK-NEXT: phi i32* [ %B, %bb ], [ %A, %bb1 ]
+; CHECK-NEXT: %E = load i32* %{{[^,]*}}, align 16
+; CHECK-NEXT: ret i32 %E
+}
+
+
+; PR1777
+declare i1 @test11a()
+
+define i1 @test11() {
+entry:
+ %a = alloca i32
+ %i = ptrtoint i32* %a to i32
+ %b = call i1 @test11a()
+ br i1 %b, label %one, label %two
+
+one:
+ %x = phi i32 [%i, %entry], [%y, %two]
+ %c = call i1 @test11a()
+ br i1 %c, label %two, label %end
+
+two:
+ %y = phi i32 [%i, %entry], [%x, %one]
+ %d = call i1 @test11a()
+ br i1 %d, label %one, label %end
+
+end:
+ %f = phi i32 [ %x, %one], [%y, %two]
+ ; Change the %f to %i, and the optimizer suddenly becomes a lot smarter
+ ; even though %f must equal %i at this point
+ %g = inttoptr i32 %f to i32*
+ store i32 10, i32* %g
+ %z = call i1 @test11a()
+ ret i1 %z
+; CHECK: @test11
+; CHECK-NOT: phi i32
+; CHECK: ret i1 %z
+}
+
+
+define i64 @test12(i1 %cond, i8* %Ptr, i64 %Val) {
+entry:
+ %tmp41 = ptrtoint i8* %Ptr to i64
+ %tmp42 = zext i64 %tmp41 to i128
+ br i1 %cond, label %end, label %two
+
+two:
+ %tmp36 = zext i64 %Val to i128 ; <i128> [#uses=1]
+ %tmp37 = shl i128 %tmp36, 64 ; <i128> [#uses=1]
+ %ins39 = or i128 %tmp42, %tmp37 ; <i128> [#uses=1]
+ br label %end
+
+end:
+ %tmp869.0 = phi i128 [ %tmp42, %entry ], [ %ins39, %two ]
+ %tmp32 = trunc i128 %tmp869.0 to i64 ; <i64> [#uses=1]
+ %tmp29 = lshr i128 %tmp869.0, 64 ; <i128> [#uses=1]
+ %tmp30 = trunc i128 %tmp29 to i64 ; <i64> [#uses=1]
+
+ %tmp2 = add i64 %tmp32, %tmp30
+ ret i64 %tmp2
+; CHECK: @test12
+; CHECK-NOT: zext
+; CHECK: end:
+; CHECK-NEXT: phi i64 [ 0, %entry ], [ %Val, %two ]
+; CHECK-NOT: phi
+; CHECK: ret i64
+}
+
+declare void @test13f(double, i32)
+
+define void @test13(i1 %cond, i32 %V1, double %Vald) {
+entry:
+ %tmp42 = zext i32 %V1 to i128
+ br i1 %cond, label %end, label %two
+
+two:
+ %Val = bitcast double %Vald to i64
+ %tmp36 = zext i64 %Val to i128 ; <i128> [#uses=1]
+ %tmp37 = shl i128 %tmp36, 64 ; <i128> [#uses=1]
+ %ins39 = or i128 %tmp42, %tmp37 ; <i128> [#uses=1]
+ br label %end
+
+end:
+ %tmp869.0 = phi i128 [ %tmp42, %entry ], [ %ins39, %two ]
+ %tmp32 = trunc i128 %tmp869.0 to i32
+ %tmp29 = lshr i128 %tmp869.0, 64 ; <i128> [#uses=1]
+ %tmp30 = trunc i128 %tmp29 to i64 ; <i64> [#uses=1]
+ %tmp31 = bitcast i64 %tmp30 to double
+
+ call void @test13f(double %tmp31, i32 %tmp32)
+ ret void
+; CHECK: @test13
+; CHECK-NOT: zext
+; CHECK: end:
+; CHECK-NEXT: phi double [ 0.000000e+00, %entry ], [ %Vald, %two ]
+; CHECK-NEXT: call void @test13f(double {{[^,]*}}, i32 %V1)
+; CHECK: ret void
+}
+
+define i640 @test14a(i320 %A, i320 %B, i1 %b1) {
+BB0:
+ %a = zext i320 %A to i640
+ %b = zext i320 %B to i640
+ br label %Loop
+
+Loop:
+ %C = phi i640 [ %a, %BB0 ], [ %b, %Loop ]
+ br i1 %b1, label %Loop, label %Exit
+
+Exit: ; preds = %Loop
+ ret i640 %C
+; CHECK: @test14a
+; CHECK: Loop:
+; CHECK-NEXT: phi i320
+}
+
+define i160 @test14b(i320 %A, i320 %B, i1 %b1) {
+BB0:
+ %a = trunc i320 %A to i160
+ %b = trunc i320 %B to i160
+ br label %Loop
+
+Loop:
+ %C = phi i160 [ %a, %BB0 ], [ %b, %Loop ]
+ br i1 %b1, label %Loop, label %Exit
+
+Exit: ; preds = %Loop
+ ret i160 %C
+; CHECK: @test14b
+; CHECK: Loop:
+; CHECK-NEXT: phi i160
+}
+
+declare i64 @test15a(i64)
+
+define i64 @test15b(i64 %A, i1 %b) {
+; CHECK: @test15b
+entry:
+ %i0 = zext i64 %A to i128
+ %i1 = shl i128 %i0, 64
+ %i = or i128 %i1, %i0
+ br i1 %b, label %one, label %two
+; CHECK: entry:
+; CHECK-NEXT: br i1 %b
+
+one:
+ %x = phi i128 [%i, %entry], [%y, %two]
+ %x1 = lshr i128 %x, 64
+ %x2 = trunc i128 %x1 to i64
+ %c = call i64 @test15a(i64 %x2)
+ %c1 = zext i64 %c to i128
+ br label %two
+
+; CHECK: one:
+; CHECK-NEXT: phi i64
+; CHECK-NEXT: %c = call i64 @test15a
+
+two:
+ %y = phi i128 [%i, %entry], [%c1, %one]
+ %y1 = lshr i128 %y, 64
+ %y2 = trunc i128 %y1 to i64
+ %d = call i64 @test15a(i64 %y2)
+ %d1 = trunc i64 %d to i1
+ br i1 %d1, label %one, label %end
+
+; CHECK: two:
+; CHECK-NEXT: phi i64
+; CHECK-NEXT: phi i64
+; CHECK-NEXT: %d = call i64 @test15a
+
+end:
+ %g = trunc i128 %y to i64
+ ret i64 %g
+; CHECK: end:
+; CHECK-NEXT: ret i64
+}
+
diff --git a/test/Transforms/InstCombine/pr2645-0.ll b/test/Transforms/InstCombine/pr2645-0.ll
new file mode 100644
index 0000000..9bcaa43
--- /dev/null
+++ b/test/Transforms/InstCombine/pr2645-0.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -instcombine -S | grep {insertelement <4 x float> undef}
+
+; Instcombine should be able to prove that none of the
+; insertelement's first operand's elements are needed.
+
+define internal void @""(i8*) {
+; <label>:1
+ bitcast i8* %0 to i32* ; <i32*>:2 [#uses=1]
+ load i32* %2, align 1 ; <i32>:3 [#uses=1]
+ getelementptr i8* %0, i32 4 ; <i8*>:4 [#uses=1]
+ bitcast i8* %4 to i32* ; <i32*>:5 [#uses=1]
+ load i32* %5, align 1 ; <i32>:6 [#uses=1]
+ br label %7
+
+; <label>:7 ; preds = %9, %1
+ %.01 = phi <4 x float> [ undef, %1 ], [ %12, %9 ] ; <<4 x float>> [#uses=1]
+ %.0 = phi i32 [ %3, %1 ], [ %15, %9 ] ; <i32> [#uses=3]
+ icmp slt i32 %.0, %6 ; <i1>:8 [#uses=1]
+ br i1 %8, label %9, label %16
+
+; <label>:9 ; preds = %7
+ sitofp i32 %.0 to float ; <float>:10 [#uses=1]
+ insertelement <4 x float> %.01, float %10, i32 0 ; <<4 x float>>:11 [#uses=1]
+ shufflevector <4 x float> %11, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:12 [#uses=2]
+ getelementptr i8* %0, i32 48 ; <i8*>:13 [#uses=1]
+ bitcast i8* %13 to <4 x float>* ; <<4 x float>*>:14 [#uses=1]
+ store <4 x float> %12, <4 x float>* %14, align 16
+ add i32 %.0, 2 ; <i32>:15 [#uses=1]
+ br label %7
+
+; <label>:16 ; preds = %7
+ ret void
+}
diff --git a/test/Transforms/InstCombine/pr2645-1.ll b/test/Transforms/InstCombine/pr2645-1.ll
new file mode 100644
index 0000000..d320daf
--- /dev/null
+++ b/test/Transforms/InstCombine/pr2645-1.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -instcombine -S | grep shufflevector
+; PR2645
+
+; instcombine shouldn't delete the shufflevector.
+
+define internal void @""(i8*, i32, i8*) {
+; <label>:3
+ br label %4
+
+; <label>:4 ; preds = %6, %3
+ %.0 = phi i32 [ 0, %3 ], [ %19, %6 ] ; <i32> [#uses=4]
+ %5 = icmp slt i32 %.0, %1 ; <i1> [#uses=1]
+ br i1 %5, label %6, label %20
+
+; <label>:6 ; preds = %4
+ %7 = getelementptr i8* %2, i32 %.0 ; <i8*> [#uses=1]
+ %8 = bitcast i8* %7 to <4 x i16>* ; <<4 x i16>*> [#uses=1]
+ %9 = load <4 x i16>* %8, align 1 ; <<4 x i16>> [#uses=1]
+ %10 = bitcast <4 x i16> %9 to <1 x i64> ; <<1 x i64>> [#uses=1]
+ %11 = call <2 x i64> @foo(<1 x i64> %10)
+; <<2 x i64>> [#uses=1]
+ %12 = bitcast <2 x i64> %11 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %13 = bitcast <4 x i32> %12 to <8 x i16> ; <<8 x i16>> [#uses=2]
+ %14 = shufflevector <8 x i16> %13, <8 x i16> %13, <8 x i32> < i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3 > ; <<8 x i16>> [#uses=1]
+ %15 = bitcast <8 x i16> %14 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %16 = sitofp <4 x i32> %15 to <4 x float> ; <<4 x float>> [#uses=1]
+ %17 = getelementptr i8* %0, i32 %.0 ; <i8*> [#uses=1]
+ %18 = bitcast i8* %17 to <4 x float>* ; <<4 x float>*> [#uses=1]
+ store <4 x float> %16, <4 x float>* %18, align 1
+ %19 = add i32 %.0, 1 ; <i32> [#uses=1]
+ br label %4
+
+; <label>:20 ; preds = %4
+ call void @llvm.x86.mmx.emms( )
+ ret void
+}
+
+declare <2 x i64> @foo(<1 x i64>)
+declare void @llvm.x86.mmx.emms( )
diff --git a/test/Transforms/InstCombine/pr2996.ll b/test/Transforms/InstCombine/pr2996.ll
new file mode 100644
index 0000000..ff3245d
--- /dev/null
+++ b/test/Transforms/InstCombine/pr2996.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine
+; PR2996
+
+define void @func_53(i16 signext %p_56) nounwind {
+entry:
+ %0 = icmp sgt i16 %p_56, -1 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %0, i32 -1, i32 0 ; <i32> [#uses=1]
+ %1 = call i32 (...)* @func_4(i32 %iftmp.0.0) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @func_4(...)
diff --git a/test/Transforms/InstCombine/preserve-sminmax.ll b/test/Transforms/InstCombine/preserve-sminmax.ll
new file mode 100644
index 0000000..00232cc
--- /dev/null
+++ b/test/Transforms/InstCombine/preserve-sminmax.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; Instcombine normally would fold the sdiv into the comparison,
+; making "icmp slt i32 %h, 2", but in this case the sdiv has
+; another use, so it wouldn't a big win, and it would also
+; obfuscate an otherise obvious smax pattern to the point where
+; other analyses wouldn't recognize it.
+
+define i32 @foo(i32 %h) {
+ %sd = sdiv i32 %h, 2
+ %t = icmp slt i32 %sd, 1
+ %r = select i1 %t, i32 %sd, i32 1
+ ret i32 %r
+}
+
+; CHECK: %sd = sdiv i32 %h, 2
+; CHECK: %t = icmp slt i32 %sd, 1
+; CHECK: %r = select i1 %t, i32 %sd, i32 1
+; CHECK: ret i32 %r
+
+define i32 @bar(i32 %h) {
+ %sd = sdiv i32 %h, 2
+ %t = icmp sgt i32 %sd, 1
+ %r = select i1 %t, i32 %sd, i32 1
+ ret i32 %r
+}
+
+; CHECK: %sd = sdiv i32 %h, 2
+; CHECK: %t = icmp sgt i32 %sd, 1
+; CHECK: %r = select i1 %t, i32 %sd, i32 1
+; CHECK: ret i32 %r
+
diff --git a/test/Transforms/InstCombine/ptr-int-cast.ll b/test/Transforms/InstCombine/ptr-int-cast.ll
new file mode 100644
index 0000000..c7ae689
--- /dev/null
+++ b/test/Transforms/InstCombine/ptr-int-cast.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -instcombine -S > %t
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+define i1 @test1(i32 *%x) nounwind {
+entry:
+; RUN: grep {ptrtoint i32\\* %x to i64} %t
+ %tmp = ptrtoint i32* %x to i1
+ ret i1 %tmp
+}
+
+define i32* @test2(i128 %x) nounwind {
+entry:
+; RUN: grep {inttoptr i64 %.mp1 to i32\\*} %t
+ %tmp = inttoptr i128 %x to i32*
+ ret i32* %tmp
+}
+
diff --git a/test/Transforms/InstCombine/rem.ll b/test/Transforms/InstCombine/rem.ll
new file mode 100644
index 0000000..bac248e
--- /dev/null
+++ b/test/Transforms/InstCombine/rem.ll
@@ -0,0 +1,83 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+; RUN: opt < %s -instcombine -S | not grep rem
+; END.
+
+define i32 @test1(i32 %A) {
+ %B = srem i32 %A, 1 ; ISA constant 0
+ ret i32 %B
+}
+
+define i32 @test2(i32 %A) { ; 0 % X = 0, we don't need to preserve traps
+ %B = srem i32 0, %A
+ ret i32 %B
+}
+
+define i32 @test3(i32 %A) {
+ %B = urem i32 %A, 8
+ ret i32 %B
+}
+
+define i1 @test3a(i32 %A) {
+ %B = srem i32 %A, -8
+ %C = icmp ne i32 %B, 0
+ ret i1 %C
+}
+
+define i32 @test4(i32 %X, i1 %C) {
+ %V = select i1 %C, i32 1, i32 8
+ %R = urem i32 %X, %V
+ ret i32 %R
+}
+
+define i32 @test5(i32 %X, i8 %B) {
+ %shift.upgrd.1 = zext i8 %B to i32
+ %Amt = shl i32 32, %shift.upgrd.1
+ %V = urem i32 %X, %Amt
+ ret i32 %V
+}
+
+define i32 @test6(i32 %A) {
+ %B = srem i32 %A, 0 ;; undef
+ ret i32 %B
+}
+
+define i32 @test7(i32 %A) {
+ %B = mul i32 %A, 8
+ %C = srem i32 %B, 4
+ ret i32 %C
+}
+
+define i32 @test8(i32 %A) {
+ %B = shl i32 %A, 4
+ %C = srem i32 %B, 8
+ ret i32 %C
+}
+
+define i32 @test9(i32 %A) {
+ %B = mul i32 %A, 64
+ %C = urem i32 %B, 32
+ ret i32 %C
+}
+
+define i32 @test10(i8 %c) {
+ %tmp.1 = zext i8 %c to i32
+ %tmp.2 = mul i32 %tmp.1, 4
+ %tmp.3 = sext i32 %tmp.2 to i64
+ %tmp.5 = urem i64 %tmp.3, 4
+ %tmp.6 = trunc i64 %tmp.5 to i32
+ ret i32 %tmp.6
+}
+
+define i32 @test11(i32 %i) {
+ %tmp.1 = and i32 %i, -2
+ %tmp.3 = mul i32 %tmp.1, 2
+ %tmp.5 = urem i32 %tmp.3, 4
+ ret i32 %tmp.5
+}
+
+define i32 @test12(i32 %i) {
+ %tmp.1 = and i32 %i, -4
+ %tmp.5 = srem i32 %tmp.1, 2
+ ret i32 %tmp.5
+}
diff --git a/test/Transforms/InstCombine/sdiv-1.ll b/test/Transforms/InstCombine/sdiv-1.ll
new file mode 100644
index 0000000..c46b5ea
--- /dev/null
+++ b/test/Transforms/InstCombine/sdiv-1.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine -inline -S | not grep '-715827882'
+; PR3142
+
+define i32 @a(i32 %X) nounwind readnone {
+entry:
+ %0 = sub i32 0, %X
+ %1 = sdiv i32 %0, -3
+ ret i32 %1
+}
+
+define i32 @b(i32 %X) nounwind readnone {
+entry:
+ %0 = call i32 @a(i32 -2147483648)
+ ret i32 %0
+}
+
+define i32 @c(i32 %X) nounwind readnone {
+entry:
+ %0 = sub i32 0, -2147483648
+ %1 = sdiv i32 %0, -3
+ ret i32 %1
+}
diff --git a/test/Transforms/InstCombine/sdiv-2.ll b/test/Transforms/InstCombine/sdiv-2.ll
new file mode 100644
index 0000000..0e4c008
--- /dev/null
+++ b/test/Transforms/InstCombine/sdiv-2.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -instcombine -disable-output
+; PR3144
+
+define fastcc i32 @func(i32 %length) nounwind {
+entry:
+ %0 = icmp ne i32 %length, -1 ; <i1> [#uses=1]
+ %iftmp.13.0 = select i1 %0, i128 0, i128 200000000 ; <i128> [#uses=2]
+ %1 = sdiv i128 %iftmp.13.0, 10 ; <i128> [#uses=1]
+ br label %bb5
+
+bb5: ; preds = %bb8, %entry
+ %v.0 = phi i128 [ 0, %entry ], [ %6, %bb8 ] ; <i128> [#uses=2]
+ %2 = icmp sgt i128 %v.0, %1 ; <i1> [#uses=1]
+ br i1 %2, label %overflow, label %bb7
+
+bb7: ; preds = %bb5
+ %3 = mul i128 %v.0, 10 ; <i128> [#uses=2]
+ %4 = sub i128 %iftmp.13.0, 0 ; <i128> [#uses=1]
+ %5 = icmp slt i128 %4, %3 ; <i1> [#uses=1]
+ br i1 %5, label %overflow, label %bb8
+
+bb8: ; preds = %bb7
+ %6 = add i128 0, %3 ; <i128> [#uses=1]
+ br label %bb5
+
+overflow: ; preds = %bb7, %bb5
+ ret i32 1
+}
diff --git a/test/Transforms/InstCombine/sdiv-shift.ll b/test/Transforms/InstCombine/sdiv-shift.ll
new file mode 100644
index 0000000..f4d2b36
--- /dev/null
+++ b/test/Transforms/InstCombine/sdiv-shift.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | not grep div
+
+define i32 @a(i16 zeroext %x, i32 %y) nounwind {
+entry:
+ %conv = zext i16 %x to i32
+ %s = shl i32 2, %y
+ %d = sdiv i32 %conv, %s
+ ret i32 %d
+}
diff --git a/test/Transforms/InstCombine/select-2.ll b/test/Transforms/InstCombine/select-2.ll
new file mode 100644
index 0000000..a76addc
--- /dev/null
+++ b/test/Transforms/InstCombine/select-2.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine -S | grep select | count 2
+
+; Make sure instcombine don't fold select into operands. We don't want to emit
+; select of two integers unless it's selecting 0 / 1.
+
+define i32 @t1(i32 %c, i32 %x) nounwind {
+ %t1 = icmp eq i32 %c, 0
+ %t2 = lshr i32 %x, 18
+ %t3 = select i1 %t1, i32 %t2, i32 %x
+ ret i32 %t3
+}
+
+define i32 @t2(i32 %c, i32 %x) nounwind {
+ %t1 = icmp eq i32 %c, 0
+ %t2 = and i32 %x, 18
+ %t3 = select i1 %t1, i32 %t2, i32 %x
+ ret i32 %t3
+}
diff --git a/test/Transforms/InstCombine/select-load-call.ll b/test/Transforms/InstCombine/select-load-call.ll
new file mode 100644
index 0000000..bef0cf8
--- /dev/null
+++ b/test/Transforms/InstCombine/select-load-call.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -instcombine -S | grep {ret i32 1}
+
+declare void @test2()
+
+define i32 @test(i1 %cond, i32 *%P) {
+ %A = alloca i32
+ store i32 1, i32* %P
+ store i32 1, i32* %A
+
+ call void @test2() readonly
+
+ %P2 = select i1 %cond, i32 *%P, i32* %A
+ %V = load i32* %P2
+ ret i32 %V
+}
diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll
new file mode 100644
index 0000000..06d5338
--- /dev/null
+++ b/test/Transforms/InstCombine/select.ll
@@ -0,0 +1,440 @@
+; This test makes sure that these instructions are properly eliminated.
+; PR1822
+
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i32 @test1(i32 %A, i32 %B) {
+ %C = select i1 false, i32 %A, i32 %B
+ ret i32 %C
+; CHECK: @test1
+; CHECK: ret i32 %B
+}
+
+define i32 @test2(i32 %A, i32 %B) {
+ %C = select i1 true, i32 %A, i32 %B
+ ret i32 %C
+; CHECK: @test2
+; CHECK: ret i32 %A
+}
+
+
+define i32 @test3(i1 %C, i32 %I) {
+ ; V = I
+ %V = select i1 %C, i32 %I, i32 %I
+ ret i32 %V
+; CHECK: @test3
+; CHECK: ret i32 %I
+}
+
+define i1 @test4(i1 %C) {
+ ; V = C
+ %V = select i1 %C, i1 true, i1 false
+ ret i1 %V
+; CHECK: @test4
+; CHECK: ret i1 %C
+}
+
+define i1 @test5(i1 %C) {
+ ; V = !C
+ %V = select i1 %C, i1 false, i1 true
+ ret i1 %V
+; CHECK: @test5
+; CHECK: xor i1 %C, true
+; CHECK: ret i1
+}
+
+define i32 @test6(i1 %C) {
+ ; V = cast C to int
+ %V = select i1 %C, i32 1, i32 0
+ ret i32 %V
+; CHECK: @test6
+; CHECK: %V = zext i1 %C to i32
+; CHECK: ret i32 %V
+}
+
+define i1 @test7(i1 %C, i1 %X) {
+ ; R = or C, X
+ %R = select i1 %C, i1 true, i1 %X
+ ret i1 %R
+; CHECK: @test7
+; CHECK: %R = or i1 %C, %X
+; CHECK: ret i1 %R
+}
+
+define i1 @test8(i1 %C, i1 %X) {
+ ; R = and C, X
+ %R = select i1 %C, i1 %X, i1 false
+ ret i1 %R
+; CHECK: @test8
+; CHECK: %R = and i1 %C, %X
+; CHECK: ret i1 %R
+}
+
+define i1 @test9(i1 %C, i1 %X) {
+ ; R = and !C, X
+ %R = select i1 %C, i1 false, i1 %X
+ ret i1 %R
+; CHECK: @test9
+; CHECK: xor i1 %C, true
+; CHECK: %R = and i1
+; CHECK: ret i1 %R
+}
+
+define i1 @test10(i1 %C, i1 %X) {
+ ; R = or !C, X
+ %R = select i1 %C, i1 %X, i1 true
+ ret i1 %R
+; CHECK: @test10
+; CHECK: xor i1 %C, true
+; CHECK: %R = or i1
+; CHECK: ret i1 %R
+}
+
+define i32 @test11(i32 %a) {
+ %C = icmp eq i32 %a, 0
+ %R = select i1 %C, i32 0, i32 1
+ ret i32 %R
+; CHECK: @test11
+; CHECK: icmp ne i32 %a, 0
+; CHECK: %R = zext i1
+; CHECK: ret i32 %R
+}
+
+define i32 @test12(i1 %cond, i32 %a) {
+ %b = or i32 %a, 1
+ %c = select i1 %cond, i32 %b, i32 %a
+ ret i32 %c
+; CHECK: @test12
+; CHECK: %b = zext i1 %cond to i32
+; CHECK: %c = or i32 %b, %a
+; CHECK: ret i32 %c
+}
+
+define i32 @test12a(i1 %cond, i32 %a) {
+ %b = ashr i32 %a, 1
+ %c = select i1 %cond, i32 %b, i32 %a
+ ret i32 %c
+; CHECK: @test12a
+; CHECK: %b = zext i1 %cond to i32
+; CHECK: %c = ashr i32 %a, %b
+; CHECK: ret i32 %c
+}
+
+define i32 @test12b(i1 %cond, i32 %a) {
+ %b = ashr i32 %a, 1
+ %c = select i1 %cond, i32 %a, i32 %b
+ ret i32 %c
+; CHECK: @test12b
+; CHECK: zext i1 %cond to i32
+; CHECK: %b = xor i32
+; CHECK: %c = ashr i32 %a, %b
+; CHECK: ret i32 %c
+}
+
+define i32 @test13(i32 %a, i32 %b) {
+ %C = icmp eq i32 %a, %b
+ %V = select i1 %C, i32 %a, i32 %b
+ ret i32 %V
+; CHECK: @test13
+; CHECK: ret i32 %b
+}
+
+define i32 @test13a(i32 %a, i32 %b) {
+ %C = icmp ne i32 %a, %b
+ %V = select i1 %C, i32 %a, i32 %b
+ ret i32 %V
+; CHECK: @test13a
+; CHECK: ret i32 %a
+}
+
+define i32 @test13b(i32 %a, i32 %b) {
+ %C = icmp eq i32 %a, %b
+ %V = select i1 %C, i32 %b, i32 %a
+ ret i32 %V
+; CHECK: @test13b
+; CHECK: ret i32 %a
+}
+
+define i1 @test14a(i1 %C, i32 %X) {
+ %V = select i1 %C, i32 %X, i32 0
+ ; (X < 1) | !C
+ %R = icmp slt i32 %V, 1
+ ret i1 %R
+; CHECK: @test14a
+; CHECK: icmp slt i32 %X, 1
+; CHECK: xor i1 %C, true
+; CHECK: or i1
+; CHECK: ret i1 %R
+}
+
+define i1 @test14b(i1 %C, i32 %X) {
+ %V = select i1 %C, i32 0, i32 %X
+ ; (X < 1) | C
+ %R = icmp slt i32 %V, 1
+ ret i1 %R
+; CHECK: @test14b
+; CHECK: icmp slt i32 %X, 1
+; CHECK: or i1
+; CHECK: ret i1 %R
+}
+
+;; Code sequence for (X & 16) ? 16 : 0
+define i32 @test15a(i32 %X) {
+ %t1 = and i32 %X, 16
+ %t2 = icmp eq i32 %t1, 0
+ %t3 = select i1 %t2, i32 0, i32 16
+ ret i32 %t3
+; CHECK: @test15a
+; CHECK: %t1 = and i32 %X, 16
+; CHECK: ret i32 %t1
+}
+
+;; Code sequence for (X & 32) ? 0 : 24
+define i32 @test15b(i32 %X) {
+ %t1 = and i32 %X, 32
+ %t2 = icmp eq i32 %t1, 0
+ %t3 = select i1 %t2, i32 32, i32 0
+ ret i32 %t3
+; CHECK: @test15b
+; CHECK: %t1 = and i32 %X, 32
+; CHECK: xor i32 %t1, 32
+; CHECK: ret i32
+}
+
+;; Alternate code sequence for (X & 16) ? 16 : 0
+define i32 @test15c(i32 %X) {
+ %t1 = and i32 %X, 16
+ %t2 = icmp eq i32 %t1, 16
+ %t3 = select i1 %t2, i32 16, i32 0
+ ret i32 %t3
+; CHECK: @test15c
+; CHECK: %t1 = and i32 %X, 16
+; CHECK: ret i32 %t1
+}
+
+;; Alternate code sequence for (X & 16) ? 16 : 0
+define i32 @test15d(i32 %X) {
+ %t1 = and i32 %X, 16
+ %t2 = icmp ne i32 %t1, 0
+ %t3 = select i1 %t2, i32 16, i32 0
+ ret i32 %t3
+; CHECK: @test15d
+; CHECK: %t1 = and i32 %X, 16
+; CHECK: ret i32 %t1
+}
+
+define i32 @test16(i1 %C, i32* %P) {
+ %P2 = select i1 %C, i32* %P, i32* null
+ %V = load i32* %P2
+ ret i32 %V
+; CHECK: @test16
+; CHECK-NEXT: %V = load i32* %P
+; CHECK: ret i32 %V
+}
+
+define i1 @test17(i32* %X, i1 %C) {
+ %R = select i1 %C, i32* %X, i32* null
+ %RV = icmp eq i32* %R, null
+ ret i1 %RV
+; CHECK: @test17
+; CHECK: icmp eq i32* %X, null
+; CHECK: xor i1 %C, true
+; CHECK: %RV = or i1
+; CHECK: ret i1 %RV
+}
+
+define i32 @test18(i32 %X, i32 %Y, i1 %C) {
+ %R = select i1 %C, i32 %X, i32 0
+ %V = sdiv i32 %Y, %R
+ ret i32 %V
+; CHECK: @test18
+; CHECK: %V = sdiv i32 %Y, %X
+; CHECK: ret i32 %V
+}
+
+define i32 @test19(i32 %x) {
+ %tmp = icmp ugt i32 %x, 2147483647
+ %retval = select i1 %tmp, i32 -1, i32 0
+ ret i32 %retval
+; CHECK: @test19
+; CHECK-NEXT: ashr i32 %x, 31
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test20(i32 %x) {
+ %tmp = icmp slt i32 %x, 0
+ %retval = select i1 %tmp, i32 -1, i32 0
+ ret i32 %retval
+; CHECK: @test20
+; CHECK-NEXT: ashr i32 %x, 31
+; CHECK-NEXT: ret i32
+}
+
+define i64 @test21(i32 %x) {
+ %tmp = icmp slt i32 %x, 0
+ %retval = select i1 %tmp, i64 -1, i64 0
+ ret i64 %retval
+; CHECK: @test21
+; CHECK-NEXT: ashr i32 %x, 31
+; CHECK-NEXT: sext i32
+; CHECK-NEXT: ret i64
+}
+
+define i16 @test22(i32 %x) {
+ %tmp = icmp slt i32 %x, 0
+ %retval = select i1 %tmp, i16 -1, i16 0
+ ret i16 %retval
+; CHECK: @test22
+; CHECK-NEXT: ashr i32 %x, 31
+; CHECK-NEXT: trunc i32
+; CHECK-NEXT: ret i16
+}
+
+define i1 @test23(i1 %a, i1 %b) {
+ %c = select i1 %a, i1 %b, i1 %a
+ ret i1 %c
+; CHECK: @test23
+; CHECK-NEXT: %c = and i1 %a, %b
+; CHECK-NEXT: ret i1 %c
+}
+
+define i1 @test24(i1 %a, i1 %b) {
+ %c = select i1 %a, i1 %a, i1 %b
+ ret i1 %c
+; CHECK: @test24
+; CHECK-NEXT: %c = or i1 %a, %b
+; CHECK-NEXT: ret i1 %c
+}
+
+define i32 @test25(i1 %c) {
+entry:
+ br i1 %c, label %jump, label %ret
+jump:
+ br label %ret
+ret:
+ %a = phi i1 [true, %jump], [false, %entry]
+ %b = select i1 %a, i32 10, i32 20
+ ret i32 %b
+; CHECK: @test25
+; CHECK: %a = phi i32 [ 10, %jump ], [ 20, %entry ]
+; CHECK-NEXT: ret i32 %a
+}
+
+define i32 @test26(i1 %cond) {
+entry:
+ br i1 %cond, label %jump, label %ret
+jump:
+ %c = or i1 false, false
+ br label %ret
+ret:
+ %a = phi i1 [true, %jump], [%c, %entry]
+ %b = select i1 %a, i32 10, i32 20
+ ret i32 %b
+; CHECK: @test26
+; CHECK: %a = phi i32 [ 10, %jump ], [ 20, %entry ]
+; CHECK-NEXT: ret i32 %a
+}
+
+define i32 @test27(i1 %c, i32 %A, i32 %B) {
+entry:
+ br i1 %c, label %jump, label %ret
+jump:
+ br label %ret
+ret:
+ %a = phi i1 [true, %jump], [false, %entry]
+ %b = select i1 %a, i32 %A, i32 %B
+ ret i32 %b
+; CHECK: @test27
+; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ]
+; CHECK-NEXT: ret i32 %a
+}
+
+define i32 @test28(i1 %cond, i32 %A, i32 %B) {
+entry:
+ br i1 %cond, label %jump, label %ret
+jump:
+ br label %ret
+ret:
+ %c = phi i32 [%A, %jump], [%B, %entry]
+ %a = phi i1 [true, %jump], [false, %entry]
+ %b = select i1 %a, i32 %A, i32 %c
+ ret i32 %b
+; CHECK: @test28
+; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ]
+; CHECK-NEXT: ret i32 %a
+}
+
+define i32 @test29(i1 %cond, i32 %A, i32 %B) {
+entry:
+ br i1 %cond, label %jump, label %ret
+jump:
+ br label %ret
+ret:
+ %c = phi i32 [%A, %jump], [%B, %entry]
+ %a = phi i1 [true, %jump], [false, %entry]
+ br label %next
+
+next:
+ %b = select i1 %a, i32 %A, i32 %c
+ ret i32 %b
+; CHECK: @test29
+; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ]
+; CHECK: ret i32 %a
+}
+
+
+; SMAX(SMAX(x, y), x) -> SMAX(x, y)
+define i32 @test30(i32 %x, i32 %y) {
+ %cmp = icmp sgt i32 %x, %y
+ %cond = select i1 %cmp, i32 %x, i32 %y
+
+ %cmp5 = icmp sgt i32 %cond, %x
+ %retval = select i1 %cmp5, i32 %cond, i32 %x
+ ret i32 %retval
+; CHECK: @test30
+; CHECK: ret i32 %cond
+}
+
+; UMAX(UMAX(x, y), x) -> UMAX(x, y)
+define i32 @test31(i32 %x, i32 %y) {
+ %cmp = icmp ugt i32 %x, %y
+ %cond = select i1 %cmp, i32 %x, i32 %y
+ %cmp5 = icmp ugt i32 %cond, %x
+ %retval = select i1 %cmp5, i32 %cond, i32 %x
+ ret i32 %retval
+; CHECK: @test31
+; CHECK: ret i32 %cond
+}
+
+; SMIN(SMIN(x, y), x) -> SMIN(x, y)
+define i32 @test32(i32 %x, i32 %y) {
+ %cmp = icmp sgt i32 %x, %y
+ %cond = select i1 %cmp, i32 %y, i32 %x
+ %cmp5 = icmp sgt i32 %cond, %x
+ %retval = select i1 %cmp5, i32 %x, i32 %cond
+ ret i32 %retval
+; CHECK: @test32
+; CHECK: ret i32 %cond
+}
+
+; MAX(MIN(x, y), x) -> x
+define i32 @test33(i32 %x, i32 %y) {
+ %cmp = icmp sgt i32 %x, %y
+ %cond = select i1 %cmp, i32 %y, i32 %x
+ %cmp5 = icmp sgt i32 %cond, %x
+ %retval = select i1 %cmp5, i32 %cond, i32 %x
+ ret i32 %retval
+; CHECK: @test33
+; CHECK: ret i32 %x
+}
+
+; MIN(MAX(x, y), x) -> x
+define i32 @test34(i32 %x, i32 %y) {
+ %cmp = icmp sgt i32 %x, %y
+ %cond = select i1 %cmp, i32 %x, i32 %y
+ %cmp5 = icmp sgt i32 %cond, %x
+ %retval = select i1 %cmp5, i32 %x, i32 %cond
+ ret i32 %retval
+; CHECK: @test34
+; CHECK: ret i32 %x
+}
diff --git a/test/Transforms/InstCombine/set.ll b/test/Transforms/InstCombine/set.ll
new file mode 100644
index 0000000..daa9148
--- /dev/null
+++ b/test/Transforms/InstCombine/set.ll
@@ -0,0 +1,171 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+; RUN: opt < %s -instcombine -S | not grep icmp
+; END.
+
+@X = external global i32 ; <i32*> [#uses=2]
+
+define i1 @test1(i32 %A) {
+ %B = icmp eq i32 %A, %A ; <i1> [#uses=1]
+ ; Never true
+ %C = icmp eq i32* @X, null ; <i1> [#uses=1]
+ %D = and i1 %B, %C ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i1 @test2(i32 %A) {
+ %B = icmp ne i32 %A, %A ; <i1> [#uses=1]
+ ; Never false
+ %C = icmp ne i32* @X, null ; <i1> [#uses=1]
+ %D = or i1 %B, %C ; <i1> [#uses=1]
+ ret i1 %D
+}
+
+define i1 @test3(i32 %A) {
+ %B = icmp slt i32 %A, %A ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+
+define i1 @test4(i32 %A) {
+ %B = icmp sgt i32 %A, %A ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test5(i32 %A) {
+ %B = icmp sle i32 %A, %A ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test6(i32 %A) {
+ %B = icmp sge i32 %A, %A ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test7(i32 %A) {
+ ; true
+ %B = icmp uge i32 %A, 0 ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test8(i32 %A) {
+ ; false
+ %B = icmp ult i32 %A, 0 ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+;; test operations on boolean values these should all be eliminated$a
+define i1 @test9(i1 %A) {
+ ; false
+ %B = icmp ult i1 %A, false ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test10(i1 %A) {
+ ; false
+ %B = icmp ugt i1 %A, true ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test11(i1 %A) {
+ ; true
+ %B = icmp ule i1 %A, true ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test12(i1 %A) {
+ ; true
+ %B = icmp uge i1 %A, false ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test13(i1 %A, i1 %B) {
+ ; A | ~B
+ %C = icmp uge i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test14(i1 %A, i1 %B) {
+ ; ~(A ^ B)
+ %C = icmp eq i1 %A, %B ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test16(i32 %A) {
+ %B = and i32 %A, 5 ; <i32> [#uses=1]
+ ; Is never true
+ %C = icmp eq i32 %B, 8 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test17(i8 %A) {
+ %B = or i8 %A, 1 ; <i8> [#uses=1]
+ ; Always false
+ %C = icmp eq i8 %B, 2 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test18(i1 %C, i32 %a) {
+entry:
+ br i1 %C, label %endif, label %else
+
+else: ; preds = %entry
+ br label %endif
+
+endif: ; preds = %else, %entry
+ %b.0 = phi i32 [ 0, %entry ], [ 1, %else ] ; <i32> [#uses=1]
+ %tmp.4 = icmp slt i32 %b.0, 123 ; <i1> [#uses=1]
+ ret i1 %tmp.4
+}
+
+define i1 @test19(i1 %A, i1 %B) {
+ %a = zext i1 %A to i32 ; <i32> [#uses=1]
+ %b = zext i1 %B to i32 ; <i32> [#uses=1]
+ %C = icmp eq i32 %a, %b ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i32 @test20(i32 %A) {
+ %B = and i32 %A, 1 ; <i32> [#uses=1]
+ %C = icmp ne i32 %B, 0 ; <i1> [#uses=1]
+ %D = zext i1 %C to i32 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test21(i32 %a) {
+ %tmp.6 = and i32 %a, 4 ; <i32> [#uses=1]
+ %not.tmp.7 = icmp ne i32 %tmp.6, 0 ; <i1> [#uses=1]
+ %retval = zext i1 %not.tmp.7 to i32 ; <i32> [#uses=1]
+ ret i32 %retval
+}
+
+define i1 @test22(i32 %A, i32 %X) {
+ %B = and i32 %A, 100663295 ; <i32> [#uses=1]
+ %C = icmp ult i32 %B, 268435456 ; <i1> [#uses=1]
+ %Y = and i32 %X, 7 ; <i32> [#uses=1]
+ %Z = icmp sgt i32 %Y, -1 ; <i1> [#uses=1]
+ %R = or i1 %C, %Z ; <i1> [#uses=1]
+ ret i1 %R
+}
+
+define i32 @test23(i32 %a) {
+ %tmp.1 = and i32 %a, 1 ; <i32> [#uses=1]
+ %tmp.2 = icmp eq i32 %tmp.1, 0 ; <i1> [#uses=1]
+ %tmp.3 = zext i1 %tmp.2 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
+
+define i32 @test24(i32 %a) {
+ %tmp1 = and i32 %a, 4 ; <i32> [#uses=1]
+ %tmp.1 = lshr i32 %tmp1, 2 ; <i32> [#uses=1]
+ %tmp.2 = icmp eq i32 %tmp.1, 0 ; <i1> [#uses=1]
+ %tmp.3 = zext i1 %tmp.2 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
+
+define i1 @test25(i32 %A) {
+ %B = and i32 %A, 2 ; <i32> [#uses=1]
+ %C = icmp ugt i32 %B, 2 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
diff --git a/test/Transforms/InstCombine/setcc-strength-reduce.ll b/test/Transforms/InstCombine/setcc-strength-reduce.ll
new file mode 100644
index 0000000..62ab116
--- /dev/null
+++ b/test/Transforms/InstCombine/setcc-strength-reduce.ll
@@ -0,0 +1,37 @@
+; This test ensures that "strength reduction" of conditional expressions are
+; working. Basically this boils down to converting setlt,gt,le,ge instructions
+; into equivalent setne,eq instructions.
+;
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep -v {icmp eq} | grep -v {icmp ne} | not grep icmp
+; END.
+
+define i1 @test1(i32 %A) {
+ ; setne %A, 0
+ %B = icmp uge i32 %A, 1 ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test2(i32 %A) {
+ ; setne %A, 0
+ %B = icmp ugt i32 %A, 0 ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test3(i8 %A) {
+ ; setne %A, -128
+ %B = icmp sge i8 %A, -127 ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test4(i8 %A) {
+ ; setne %A, 127
+ %B = icmp sle i8 %A, 126 ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i1 @test5(i8 %A) {
+ ; setne %A, 127
+ %B = icmp slt i8 %A, 127 ; <i1> [#uses=1]
+ ret i1 %B
+}
diff --git a/test/Transforms/InstCombine/sext.ll b/test/Transforms/InstCombine/sext.ll
new file mode 100644
index 0000000..6deee1f
--- /dev/null
+++ b/test/Transforms/InstCombine/sext.ll
@@ -0,0 +1,128 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+declare i32 @llvm.ctpop.i32(i32)
+declare i32 @llvm.ctlz.i32(i32)
+declare i32 @llvm.cttz.i32(i32)
+
+define i64 @test1(i32 %x) {
+ %t = call i32 @llvm.ctpop.i32(i32 %x)
+ %s = sext i32 %t to i64
+ ret i64 %s
+
+; CHECK: @test1
+; CHECK: zext i32 %t
+}
+
+define i64 @test2(i32 %x) {
+ %t = call i32 @llvm.ctlz.i32(i32 %x)
+ %s = sext i32 %t to i64
+ ret i64 %s
+
+; CHECK: @test2
+; CHECK: zext i32 %t
+}
+
+define i64 @test3(i32 %x) {
+ %t = call i32 @llvm.cttz.i32(i32 %x)
+ %s = sext i32 %t to i64
+ ret i64 %s
+
+; CHECK: @test3
+; CHECK: zext i32 %t
+}
+
+define i64 @test4(i32 %x) {
+ %t = udiv i32 %x, 3
+ %s = sext i32 %t to i64
+ ret i64 %s
+
+; CHECK: @test4
+; CHECK: zext i32 %t
+}
+
+define i64 @test5(i32 %x) {
+ %t = urem i32 %x, 30000
+ %s = sext i32 %t to i64
+ ret i64 %s
+; CHECK: @test5
+; CHECK: zext i32 %t
+}
+
+define i64 @test6(i32 %x) {
+ %u = lshr i32 %x, 3
+ %t = mul i32 %u, 3
+ %s = sext i32 %t to i64
+ ret i64 %s
+; CHECK: @test6
+; CHECK: zext i32 %t
+}
+
+define i64 @test7(i32 %x) {
+ %t = and i32 %x, 511
+ %u = sub i32 20000, %t
+ %s = sext i32 %u to i64
+ ret i64 %s
+; CHECK: @test7
+; CHECK: zext i32 %u to i64
+}
+
+define i32 @test8(i8 %a, i32 %f, i1 %p, i32* %z) {
+ %d = lshr i32 %f, 24
+ %e = select i1 %p, i32 %d, i32 0
+ %s = trunc i32 %e to i16
+ %n = sext i16 %s to i32
+ ret i32 %n
+; CHECK: @test8
+; CHECK: %d = lshr i32 %f, 24
+; CHECK: %n = select i1 %p, i32 %d, i32 0
+; CHECK: ret i32 %n
+}
+
+; rdar://6013816
+define i16 @test9(i16 %t, i1 %cond) nounwind {
+entry:
+ br i1 %cond, label %T, label %F
+T:
+ %t2 = sext i16 %t to i32
+ br label %F
+
+F:
+ %V = phi i32 [%t2, %T], [42, %entry]
+ %W = trunc i32 %V to i16
+ ret i16 %W
+; CHECK: @test9
+; CHECK: T:
+; CHECK-NEXT: br label %F
+; CHECK: F:
+; CHECK-NEXT: phi i16
+; CHECK-NEXT: ret i16
+}
+
+; PR2638
+define i32 @test10(i32 %i) nounwind {
+entry:
+ %tmp12 = trunc i32 %i to i8
+ %tmp16 = shl i8 %tmp12, 6
+ %a = ashr i8 %tmp16, 6
+ %b = sext i8 %a to i32
+ ret i32 %b
+; CHECK: @test10
+; CHECK: shl i32 %i, 30
+; CHECK-NEXT: ashr i32
+; CHECK-NEXT: ret i32
+}
+
+define void @test11(<2 x i16> %srcA, <2 x i16> %srcB, <2 x i16>* %dst) {
+ %cmp = icmp eq <2 x i16> %srcB, %srcA
+ %sext = sext <2 x i1> %cmp to <2 x i16>
+ %tmask = ashr <2 x i16> %sext, <i16 15, i16 15>
+ store <2 x i16> %tmask, <2 x i16>* %dst
+ ret void
+; CHECK: @test11
+; CHECK-NEXT: icmp eq
+; CHECK-NEXT: sext <2 x i1>
+; CHECK-NEXT: store <2 x i16>
+; CHECK-NEXT: ret
+}
diff --git a/test/Transforms/InstCombine/shift-simplify.ll b/test/Transforms/InstCombine/shift-simplify.ll
new file mode 100644
index 0000000..e5cc705
--- /dev/null
+++ b/test/Transforms/InstCombine/shift-simplify.ll
@@ -0,0 +1,42 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: egrep {shl|lshr|ashr} | count 3
+
+define i32 @test0(i32 %A, i32 %B, i32 %C) {
+ %X = shl i32 %A, %C
+ %Y = shl i32 %B, %C
+ %Z = and i32 %X, %Y
+ ret i32 %Z
+}
+
+define i32 @test1(i32 %A, i32 %B, i32 %C) {
+ %X = lshr i32 %A, %C
+ %Y = lshr i32 %B, %C
+ %Z = or i32 %X, %Y
+ ret i32 %Z
+}
+
+define i32 @test2(i32 %A, i32 %B, i32 %C) {
+ %X = ashr i32 %A, %C
+ %Y = ashr i32 %B, %C
+ %Z = xor i32 %X, %Y
+ ret i32 %Z
+}
+
+define i1 @test3(i32 %X) {
+ %tmp1 = shl i32 %X, 7
+ %tmp2 = icmp slt i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @test4(i32 %X) {
+ %tmp1 = lshr i32 %X, 7
+ %tmp2 = icmp slt i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @test5(i32 %X) {
+ %tmp1 = ashr i32 %X, 7
+ %tmp2 = icmp slt i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
diff --git a/test/Transforms/InstCombine/shift-sra.ll b/test/Transforms/InstCombine/shift-sra.ll
new file mode 100644
index 0000000..58f3226
--- /dev/null
+++ b/test/Transforms/InstCombine/shift-sra.ll
@@ -0,0 +1,58 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+
+define i32 @test1(i32 %X, i8 %A) {
+ %shift.upgrd.1 = zext i8 %A to i32 ; <i32> [#uses=1]
+ ; can be logical shift.
+ %Y = ashr i32 %X, %shift.upgrd.1 ; <i32> [#uses=1]
+ %Z = and i32 %Y, 1 ; <i32> [#uses=1]
+ ret i32 %Z
+; CHECK: @test1
+; CHECK: lshr i32 %X, %shift.upgrd.1
+}
+
+define i32 @test2(i8 %tmp) {
+ %tmp3 = zext i8 %tmp to i32 ; <i32> [#uses=1]
+ %tmp4 = add i32 %tmp3, 7 ; <i32> [#uses=1]
+ %tmp5 = ashr i32 %tmp4, 3 ; <i32> [#uses=1]
+ ret i32 %tmp5
+; CHECK: @test2
+; CHECK: lshr i32 %tmp4, 3
+}
+
+define i64 @test3(i1 %X, i64 %Y, i1 %Cond) {
+ br i1 %Cond, label %T, label %F
+T:
+ %X2 = sext i1 %X to i64
+ br label %C
+F:
+ %Y2 = ashr i64 %Y, 63
+ br label %C
+C:
+ %P = phi i64 [%X2, %T], [%Y2, %F]
+ %S = ashr i64 %P, 12
+ ret i64 %S
+
+; CHECK: @test3
+; CHECK: %P = phi i64
+; CHECK-NEXT: ret i64 %P
+}
+
+define i64 @test4(i1 %X, i64 %Y, i1 %Cond) {
+ br i1 %Cond, label %T, label %F
+T:
+ %X2 = sext i1 %X to i64
+ br label %C
+F:
+ %Y2 = ashr i64 %Y, 63
+ br label %C
+C:
+ %P = phi i64 [%X2, %T], [%Y2, %F]
+ %R = shl i64 %P, 12
+ %S = ashr i64 %R, 12
+ ret i64 %S
+
+; CHECK: @test4
+; CHECK: %P = phi i64
+; CHECK-NEXT: ret i64 %P
+}
diff --git a/test/Transforms/InstCombine/shift-trunc-shift.ll b/test/Transforms/InstCombine/shift-trunc-shift.ll
new file mode 100644
index 0000000..7133d29
--- /dev/null
+++ b/test/Transforms/InstCombine/shift-trunc-shift.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | grep lshr.*63
+
+define i32 @t1(i64 %d18) {
+entry:
+ %tmp916 = lshr i64 %d18, 32 ; <i64> [#uses=1]
+ %tmp917 = trunc i64 %tmp916 to i32 ; <i32> [#uses=1]
+ %tmp10 = lshr i32 %tmp917, 31 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
+
diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll
new file mode 100644
index 0000000..feed37bd
--- /dev/null
+++ b/test/Transforms/InstCombine/shift.ll
@@ -0,0 +1,345 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i32 @test1(i32 %A) {
+; CHECK: @test1
+; CHECK: ret i32 %A
+ %B = shl i32 %A, 0 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test2(i8 %A) {
+; CHECK: @test2
+; CHECK: ret i32 0
+ %shift.upgrd.1 = zext i8 %A to i32 ; <i32> [#uses=1]
+ %B = shl i32 0, %shift.upgrd.1 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test3(i32 %A) {
+; CHECK: @test3
+; CHECK: ret i32 %A
+ %B = ashr i32 %A, 0 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test4(i8 %A) {
+; CHECK: @test4
+; CHECK: ret i32 0
+ %shift.upgrd.2 = zext i8 %A to i32 ; <i32> [#uses=1]
+ %B = ashr i32 0, %shift.upgrd.2 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+
+define i32 @test5(i32 %A) {
+; CHECK: @test5
+; CHECK: ret i32 0
+ %B = lshr i32 %A, 32 ;; shift all bits out
+ ret i32 %B
+}
+
+define i32 @test5a(i32 %A) {
+; CHECK: @test5a
+; CHECK: ret i32 0
+ %B = shl i32 %A, 32 ;; shift all bits out
+ ret i32 %B
+}
+
+define i32 @test6(i32 %A) {
+; CHECK: @test6
+; CHECK-NEXT: mul i32 %A, 6
+; CHECK-NEXT: ret i32
+ %B = shl i32 %A, 1 ;; convert to an mul instruction
+ %C = mul i32 %B, 3
+ ret i32 %C
+}
+
+define i32 @test7(i8 %A) {
+; CHECK: @test7
+; CHECK-NEXT: ret i32 -1
+ %shift.upgrd.3 = zext i8 %A to i32
+ %B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1
+ ret i32 %B
+}
+
+;; (A << 5) << 3 === A << 8 == 0
+define i8 @test8(i8 %A) {
+; CHECK: @test8
+; CHECK: ret i8 0
+ %B = shl i8 %A, 5 ; <i8> [#uses=1]
+ %C = shl i8 %B, 3 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+;; (A << 7) >> 7 === A & 1
+define i8 @test9(i8 %A) {
+; CHECK: @test9
+; CHECK-NEXT: and i8 %A, 1
+; CHECK-NEXT: ret i8
+ %B = shl i8 %A, 7 ; <i8> [#uses=1]
+ %C = lshr i8 %B, 7 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+;; (A >> 7) << 7 === A & 128
+define i8 @test10(i8 %A) {
+; CHECK: @test10
+; CHECK-NEXT: and i8 %A, -128
+; CHECK-NEXT: ret i8
+ %B = lshr i8 %A, 7 ; <i8> [#uses=1]
+ %C = shl i8 %B, 7 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+;; (A >> 3) << 4 === (A & 0x1F) << 1
+define i8 @test11(i8 %A) {
+; CHECK: @test11
+; CHECK-NEXT: mul i8 %A, 6
+; CHECK-NEXT: and i8
+; CHECK-NEXT: ret i8
+ %a = mul i8 %A, 3 ; <i8> [#uses=1]
+ %B = lshr i8 %a, 3 ; <i8> [#uses=1]
+ %C = shl i8 %B, 4 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+;; (A >> 8) << 8 === A & -256
+define i32 @test12(i32 %A) {
+; CHECK: @test12
+; CHECK-NEXT: and i32 %A, -256
+; CHECK-NEXT: ret i32
+ %B = ashr i32 %A, 8 ; <i32> [#uses=1]
+ %C = shl i32 %B, 8 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+;; (A >> 3) << 4 === (A & -8) * 2
+define i8 @test13(i8 %A) {
+; CHECK: @test13
+; CHECK-NEXT: mul i8 %A, 6
+; CHECK-NEXT: and i8
+; CHECK-NEXT: ret i8
+ %a = mul i8 %A, 3 ; <i8> [#uses=1]
+ %B = ashr i8 %a, 3 ; <i8> [#uses=1]
+ %C = shl i8 %B, 4 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
+define i32 @test14(i32 %A) {
+; CHECK: @test14
+; CHECK-NEXT: or i32 %A, 19744
+; CHECK-NEXT: and i32
+; CHECK-NEXT: ret i32
+ %B = lshr i32 %A, 4 ; <i32> [#uses=1]
+ %C = or i32 %B, 1234 ; <i32> [#uses=1]
+ %D = shl i32 %C, 4 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
+define i32 @test14a(i32 %A) {
+; CHECK: @test14a
+; CHECK-NEXT: and i32 %A, 77
+; CHECK-NEXT: ret i32
+ %B = shl i32 %A, 4 ; <i32> [#uses=1]
+ %C = and i32 %B, 1234 ; <i32> [#uses=1]
+ %D = lshr i32 %C, 4 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test15(i1 %C) {
+; CHECK: @test15
+; CHECK-NEXT: select i1 %C, i32 12, i32 4
+; CHECK-NEXT: ret i32
+ %A = select i1 %C, i32 3, i32 1 ; <i32> [#uses=1]
+ %V = shl i32 %A, 2 ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define i32 @test15a(i1 %C) {
+; CHECK: @test15a
+; CHECK-NEXT: select i1 %C, i32 512, i32 128
+; CHECK-NEXT: ret i32
+ %A = select i1 %C, i8 3, i8 1 ; <i8> [#uses=1]
+ %shift.upgrd.4 = zext i8 %A to i32 ; <i32> [#uses=1]
+ %V = shl i32 64, %shift.upgrd.4 ; <i32> [#uses=1]
+ ret i32 %V
+}
+
+define i1 @test16(i32 %X) {
+; CHECK: @test16
+; CHECK-NEXT: and i32 %X, 16
+; CHECK-NEXT: icmp ne i32
+; CHECK-NEXT: ret i1
+ %tmp.3 = ashr i32 %X, 4
+ %tmp.6 = and i32 %tmp.3, 1
+ %tmp.7 = icmp ne i32 %tmp.6, 0
+ ret i1 %tmp.7
+}
+
+define i1 @test17(i32 %A) {
+; CHECK: @test17
+; CHECK-NEXT: and i32 %A, -8
+; CHECK-NEXT: icmp eq i32
+; CHECK-NEXT: ret i1
+ %B = lshr i32 %A, 3 ; <i32> [#uses=1]
+ %C = icmp eq i32 %B, 1234 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+
+define i1 @test18(i8 %A) {
+; CHECK: @test18
+; CHECK: ret i1 false
+
+ %B = lshr i8 %A, 7 ; <i8> [#uses=1]
+ ;; false
+ %C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test19(i32 %A) {
+; CHECK: @test19
+; CHECK-NEXT: icmp ult i32 %A, 4
+; CHECK-NEXT: ret i1
+ %B = ashr i32 %A, 2 ; <i32> [#uses=1]
+ ;; (X & -4) == 0
+ %C = icmp eq i32 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+
+define i1 @test19a(i32 %A) {
+; CHECK: @test19a
+; CHECK-NEXT: and i32 %A, -4
+; CHECK-NEXT: icmp eq i32
+; CHECK-NEXT: ret i1
+ %B = ashr i32 %A, 2 ; <i32> [#uses=1]
+ ;; (X & -4) == -4
+ %C = icmp eq i32 %B, -1 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test20(i8 %A) {
+; CHECK: @test20
+; CHECK: ret i1 false
+ %B = ashr i8 %A, 7 ; <i8> [#uses=1]
+ ;; false
+ %C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test21(i8 %A) {
+; CHECK: @test21
+; CHECK-NEXT: and i8 %A, 15
+; CHECK-NEXT: icmp eq i8
+; CHECK-NEXT: ret i1
+ %B = shl i8 %A, 4 ; <i8> [#uses=1]
+ %C = icmp eq i8 %B, -128 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i1 @test22(i8 %A) {
+; CHECK: @test22
+; CHECK-NEXT: and i8 %A, 15
+; CHECK-NEXT: icmp eq i8
+; CHECK-NEXT: ret i1
+ %B = shl i8 %A, 4 ; <i8> [#uses=1]
+ %C = icmp eq i8 %B, 0 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i8 @test23(i32 %A) {
+; CHECK: @test23
+; CHECK-NEXT: trunc i32 %A to i8
+; CHECK-NEXT: ret i8
+
+ ;; casts not needed
+ %B = shl i32 %A, 24 ; <i32> [#uses=1]
+ %C = ashr i32 %B, 24 ; <i32> [#uses=1]
+ %D = trunc i32 %C to i8 ; <i8> [#uses=1]
+ ret i8 %D
+}
+
+define i8 @test24(i8 %X) {
+; CHECK: @test24
+; CHECK-NEXT: and i8 %X, 3
+; CHECK-NEXT: ret i8
+ %Y = and i8 %X, -5 ; <i8> [#uses=1]
+ %Z = shl i8 %Y, 5 ; <i8> [#uses=1]
+ %Q = ashr i8 %Z, 5 ; <i8> [#uses=1]
+ ret i8 %Q
+}
+
+define i32 @test25(i32 %tmp.2, i32 %AA) {
+; CHECK: @test25
+; CHECK-NEXT: and i32 %tmp.2, -131072
+; CHECK-NEXT: add i32 %{{[^,]*}}, %AA
+; CHECK-NEXT: and i32 %{{[^,]*}}, -131072
+; CHECK-NEXT: ret i32
+ %x = lshr i32 %AA, 17 ; <i32> [#uses=1]
+ %tmp.3 = lshr i32 %tmp.2, 17 ; <i32> [#uses=1]
+ %tmp.5 = add i32 %tmp.3, %x ; <i32> [#uses=1]
+ %tmp.6 = shl i32 %tmp.5, 17 ; <i32> [#uses=1]
+ ret i32 %tmp.6
+}
+
+;; handle casts between shifts.
+define i32 @test26(i32 %A) {
+; CHECK: @test26
+; CHECK-NEXT: and i32 %A, -2
+; CHECK-NEXT: ret i32
+ %B = lshr i32 %A, 1 ; <i32> [#uses=1]
+ %C = bitcast i32 %B to i32 ; <i32> [#uses=1]
+ %D = shl i32 %C, 1 ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+
+define i1 @test27(i32 %x) nounwind {
+; CHECK: @test27
+; CHECK-NEXT: and i32 %x, 8
+; CHECK-NEXT: icmp ne i32
+; CHECK-NEXT: ret i1
+ %y = lshr i32 %x, 3
+ %z = trunc i32 %y to i1
+ ret i1 %z
+}
+
+define i8 @test28(i8 %x) {
+entry:
+; CHECK: @test28
+; CHECK: icmp slt i8 %x, 0
+; CHECK-NEXT: br i1
+ %tmp1 = lshr i8 %x, 7
+ %cond1 = icmp ne i8 %tmp1, 0
+ br i1 %cond1, label %bb1, label %bb2
+
+bb1:
+ ret i8 0
+
+bb2:
+ ret i8 1
+}
+
+define i8 @test28a(i8 %x, i8 %y) {
+entry:
+; This shouldn't be transformed.
+; CHECK: @test28a
+; CHECK: %tmp1 = lshr i8 %x, 7
+; CHECK: %cond1 = icmp eq i8 %tmp1, 0
+; CHECK: br i1 %cond1, label %bb2, label %bb1
+ %tmp1 = lshr i8 %x, 7
+ %cond1 = icmp ne i8 %tmp1, 0
+ br i1 %cond1, label %bb1, label %bb2
+bb1:
+ ret i8 %tmp1
+bb2:
+ %tmp2 = add i8 %tmp1, %y
+ ret i8 %tmp2
+}
+
+
diff --git a/test/Transforms/InstCombine/shufflemask-undef.ll b/test/Transforms/InstCombine/shufflemask-undef.ll
new file mode 100644
index 0000000..cf87aef
--- /dev/null
+++ b/test/Transforms/InstCombine/shufflemask-undef.ll
@@ -0,0 +1,109 @@
+; RUN: opt < %s -instcombine -S | not grep {shufflevector.\*i32 8}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+ %struct.ActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 }
+ %struct.AlphaTest = type { float, i16, i8, i8 }
+ %struct.ArrayRange = type { i8, i8, i8, i8 }
+ %struct.BlendMode = type { i16, i16, i16, i16, %struct.IColor4, i16, i16, i8, i8, i8, i8 }
+ %struct.ClearColor = type { double, %struct.IColor4, %struct.IColor4, float, i32 }
+ %struct.ClipPlane = type { i32, [6 x %struct.IColor4] }
+ %struct.ColorBuffer = type { i16, i8, i8, [8 x i16], [0 x i32] }
+ %struct.ColorMatrix = type { [16 x float]*, %struct.ImagingColorScale }
+ %struct.Convolution = type { %struct.IColor4, %struct.ImagingColorScale, i16, i16, [0 x i32], float*, i32, i32 }
+ %struct.DepthTest = type { i16, i16, i8, i8, i8, i8, double, double }
+ %struct.FixedFunction = type { %struct.PPStreamToken* }
+ %struct.FogMode = type { %struct.IColor4, float, float, float, float, float, i16, i16, i16, i8, i8 }
+ %struct.HintMode = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 }
+ %struct.Histogram = type { %struct.ProgramLimits*, i32, i16, i8, i8 }
+ %struct.ImagingColorScale = type { %struct.TCoord2, %struct.TCoord2, %struct.TCoord2, %struct.TCoord2 }
+ %struct.ImagingSubset = type { %struct.Convolution, %struct.Convolution, %struct.Convolution, %struct.ColorMatrix, %struct.Minmax, %struct.Histogram, %struct.ImagingColorScale, %struct.ImagingColorScale, %struct.ImagingColorScale, %struct.ImagingColorScale, i32, [0 x i32] }
+ %struct.Light = type { %struct.IColor4, %struct.IColor4, %struct.IColor4, %struct.IColor4, %struct.PointLineLimits, float, float, float, float, float, %struct.PointLineLimits, float, %struct.PointLineLimits, float, %struct.PointLineLimits, float, float, float, float, float }
+ %struct.LightModel = type { %struct.IColor4, [8 x %struct.Light], [2 x %struct.Material], i32, i16, i16, i16, i8, i8, i8, i8, i8, i8 }
+ %struct.LightProduct = type { %struct.IColor4, %struct.IColor4, %struct.IColor4 }
+ %struct.LineMode = type { float, i32, i16, i16, i8, i8, i8, i8 }
+ %struct.LogicOp = type { i16, i8, i8 }
+ %struct.MaskMode = type { i32, [3 x i32], i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.Material = type { %struct.IColor4, %struct.IColor4, %struct.IColor4, %struct.IColor4, float, float, float, float, [8 x %struct.LightProduct], %struct.IColor4, [8 x i32] }
+ %struct.Minmax = type { %struct.MinmaxTable*, i16, i8, i8, [0 x i32] }
+ %struct.MinmaxTable = type { %struct.IColor4, %struct.IColor4 }
+ %struct.Mipmaplevel = type { [4 x i32], [4 x i32], [4 x float], [4 x i32], i32, i32, float*, i8*, i16, i16, i16, i16, [2 x float] }
+ %struct.Multisample = type { float, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.PipelineProgramState = type { i8, i8, i8, i8, [0 x i32], %struct.IColor4* }
+ %struct.PixelMap = type { i32*, float*, float*, float*, float*, float*, float*, float*, float*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.PixelMode = type { float, float, %struct.PixelStore, %struct.PixelTransfer, %struct.PixelMap, %struct.ImagingSubset, i32, i32 }
+ %struct.PixelPack = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8 }
+ %struct.PixelStore = type { %struct.PixelPack, %struct.PixelPack }
+ %struct.PixelTransfer = type { float, float, float, float, float, float, float, float, float, float, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }
+ %struct.PluginBufferData = type { i32 }
+ %struct.PointLineLimits = type { float, float, float }
+ %struct.PointMode = type { float, float, float, float, %struct.PointLineLimits, float, i8, i8, i8, i8, i16, i16, i32, i16, i16 }
+ %struct.PolygonMode = type { [128 x i8], float, float, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.ProgramLimits = type { i32, i32, i32, i32 }
+ %struct.RegisterCombiners = type { i8, i8, i8, i8, i32, [2 x %struct.IColor4], [8 x %struct.RegisterCombinersPerStageState], %struct.RegisterCombinersFinalStageState }
+ %struct.RegisterCombinersFinalStageState = type { i8, i8, i8, i8, [7 x %struct.RegisterCombinersPerVariableState] }
+ %struct.RegisterCombinersPerPortionState = type { [4 x %struct.RegisterCombinersPerVariableState], i8, i8, i8, i8, i16, i16, i16, i16, i16, i16 }
+ %struct.RegisterCombinersPerStageState = type { [2 x %struct.RegisterCombinersPerPortionState], [2 x %struct.IColor4] }
+ %struct.RegisterCombinersPerVariableState = type { i16, i16, i16, i16 }
+ %struct.SWRSurfaceRec = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, [4 x i8*], i32 }
+ %struct.ScissorTest = type { %struct.ProgramLimits, i8, i8, i8, i8 }
+ %struct.State = type <{ i16, i16, i16, i16, i32, i32, [256 x %struct.IColor4], [128 x %struct.IColor4], %struct.Viewport, %struct.Transform, %struct.LightModel, %struct.ActiveTextureTargets, %struct.AlphaTest, %struct.BlendMode, %struct.ClearColor, %struct.ColorBuffer, %struct.DepthTest, %struct.ArrayRange, %struct.FogMode, %struct.HintMode, %struct.LineMode, %struct.LogicOp, %struct.MaskMode, %struct.PixelMode, %struct.PointMode, %struct.PolygonMode, %struct.ScissorTest, i32, %struct.StencilTest, [8 x %struct.TextureMode], [16 x %struct.TextureImageMode], %struct.ArrayRange, [8 x %struct.TextureCoordGen], %struct.ClipPlane, %struct.Multisample, %struct.RegisterCombiners, %struct.ArrayRange, %struct.ArrayRange, [3 x %struct.PipelineProgramState], %struct.ArrayRange, %struct.TransformFeedback, i32*, %struct.FixedFunction, [3 x i32], [3 x i32] }>
+ %struct.StencilTest = type { [3 x { i32, i32, i16, i16, i16, i16 }], i32, [4 x i8] }
+ %struct.TextureCoordGen = type { { i16, i16, %struct.IColor4, %struct.IColor4 }, { i16, i16, %struct.IColor4, %struct.IColor4 }, { i16, i16, %struct.IColor4, %struct.IColor4 }, { i16, i16, %struct.IColor4, %struct.IColor4 }, i8, i8, i8, i8 }
+ %struct.TextureGeomState = type { i16, i16, i16, i16, i16, i8, i8, i8, i8, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, [6 x i16], [6 x i16] }
+ %struct.TextureImageMode = type { float }
+ %struct.TextureLevel = type { i32, i32, i16, i16, i16, i8, i8, i16, i16, i16, i16, i8* }
+ %struct.TextureMode = type { %struct.IColor4, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, float, float, i16, i16, i16, i16, i16, i16, [4 x i16], i8, i8, i8, i8, [3 x float], [4 x float], float, float }
+ %struct.TextureParamState = type { i16, i16, i16, i16, i16, i16, %struct.IColor4, float, float, float, float, i16, i16, i16, i16, float, i16, i8, i8, i32, i8* }
+ %struct.TextureRec = type { [4 x float], %struct.TextureState*, %struct.Mipmaplevel*, %struct.Mipmaplevel*, float, float, float, float, i8, i8, i8, i8, i16, i16, i16, i16, i32, float, [2 x %struct.PPStreamToken] }
+ %struct.TextureState = type { i16, i8, i8, i16, i16, float, i32, %struct.SWRSurfaceRec*, %struct.TextureParamState, %struct.TextureGeomState, [0 x i32], i8*, i32, %struct.TextureLevel, [1 x [15 x %struct.TextureLevel]] }
+ %struct.Transform = type <{ [24 x [16 x float]], [24 x [16 x float]], [16 x float], float, float, float, float, float, i8, i8, i8, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i32 }>
+ %struct.TransformFeedback = type { i8, i8, i8, i8, [0 x i32], [16 x i32], [16 x i32] }
+ %struct.Viewport = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, double, double, i32, i32, i32, i32, float, float, float, float }
+ %struct.IColor4 = type { float, float, float, float }
+ %struct.TCoord2 = type { float, float }
+ %struct.VMGPStack = type { [6 x <4 x float>*], <4 x float>*, i32, i32, <4 x float>*, <4 x float>**, i32, i32, i32, i32, i32, i32 }
+ %struct.VMTextures = type { [16 x %struct.TextureRec*] }
+ %struct.PPStreamToken = type { { i16, i16, i32 } }
+ %struct._VMConstants = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, float, float, float, float, float, float, float, float, float, float, float, float, [256 x float], [528 x i8], { void (i8*, i8*, i32, i8*)*, float (float)*, float (float)*, float (float)*, i32 (float)* } }
+
+define i32 @foo(%struct.State* %dst, <4 x float>* %prgrm, <4 x float>** %buffs, %struct._VMConstants* %cnstn, %struct.PPStreamToken* %pstrm, %struct.PluginBufferData* %gpctx, %struct.VMTextures* %txtrs, %struct.VMGPStack* %gpstk) nounwind {
+bb266.i:
+ getelementptr <4 x float>* null, i32 11 ; <<4 x float>*>:0 [#uses=1]
+ load <4 x float>* %0, align 16 ; <<4 x float>>:1 [#uses=1]
+ shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> < i32 0, i32 1, i32 1, i32 1 > ; <<4 x float>>:2 [#uses=1]
+ shufflevector <4 x float> %2, <4 x float> undef, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>>:3 [#uses=1]
+ shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>>:4 [#uses=1]
+ shufflevector <4 x float> %4, <4 x float> %3, <4 x i32> < i32 6, i32 7, i32 2, i32 3 > ; <<4 x float>>:5 [#uses=1]
+ fmul <4 x float> %5, zeroinitializer ; <<4 x float>>:6 [#uses=2]
+ fmul <4 x float> %6, %6 ; <<4 x float>>:7 [#uses=1]
+ fadd <4 x float> zeroinitializer, %7 ; <<4 x float>>:8 [#uses=1]
+ call <4 x float> @llvm.x86.sse.max.ps( <4 x float> zeroinitializer, <4 x float> %8 ) nounwind readnone ; <<4 x float>>:9 [#uses=1]
+ %phitmp40 = bitcast <4 x float> %9 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp4109.i = and <4 x i32> %phitmp40, < i32 8388607, i32 8388607, i32 8388607, i32 8388607 > ; <<4 x i32>> [#uses=1]
+ %tmp4116.i = or <4 x i32> %tmp4109.i, < i32 1065353216, i32 1065353216, i32 1065353216, i32 1065353216 > ; <<4 x i32>> [#uses=1]
+ %tmp4117.i = bitcast <4 x i32> %tmp4116.i to <4 x float> ; <<4 x float>> [#uses=1]
+ fadd <4 x float> %tmp4117.i, zeroinitializer ; <<4 x float>>:10 [#uses=1]
+ fmul <4 x float> %10, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 > ; <<4 x float>>:11 [#uses=1]
+ call <4 x float> @llvm.x86.sse.max.ps( <4 x float> %11, <4 x float> zeroinitializer ) nounwind readnone ; <<4 x float>>:12 [#uses=1]
+ call <4 x float> @llvm.x86.sse.min.ps( <4 x float> %12, <4 x float> zeroinitializer ) nounwind readnone ; <<4 x float>>:13 [#uses=1]
+ %tmp4170.i = call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %13, <4 x float> zeroinitializer, i8 2 ) nounwind ; <<4 x float>> [#uses=1]
+ bitcast <4 x float> %tmp4170.i to <16 x i8> ; <<16 x i8>>:14 [#uses=1]
+ call i32 @llvm.x86.sse2.pmovmskb.128( <16 x i8> %14 ) nounwind readnone ; <i32>:15 [#uses=1]
+ icmp eq i32 %15, 0 ; <i1>:16 [#uses=1]
+ br i1 %16, label %bb5574.i, label %bb4521.i
+
+bb4521.i: ; preds = %bb266.i
+ unreachable
+
+bb5574.i: ; preds = %bb266.i
+ unreachable
+}
+
+declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
+
+declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind readnone
+
+declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/Transforms/InstCombine/shufflevec-constant.ll b/test/Transforms/InstCombine/shufflevec-constant.ll
new file mode 100644
index 0000000..29ae5a7
--- /dev/null
+++ b/test/Transforms/InstCombine/shufflevec-constant.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep {ret <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0x7FF0000000000000, float 0x7FF0000000000000>}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+
+define <4 x float> @__inff4() nounwind readnone {
+entry:
+ %tmp14 = extractelement <1 x double> bitcast (<2 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000> to <1 x double>), i32 0 ; <double> [#uses=1]
+ %tmp4 = bitcast double %tmp14 to i64 ; <i64> [#uses=1]
+ %tmp3 = bitcast i64 %tmp4 to <2 x float> ; <<2 x float>> [#uses=1]
+ %tmp8 = shufflevector <2 x float> %tmp3, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ; <<4 x float>> [#uses=1]
+ %tmp9 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp8, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ; <<4 x float>> [#uses=0]
+ ret <4 x float> %tmp9
+}
diff --git a/test/Transforms/InstCombine/signed-comparison.ll b/test/Transforms/InstCombine/signed-comparison.ll
new file mode 100644
index 0000000..9a08c64
--- /dev/null
+++ b/test/Transforms/InstCombine/signed-comparison.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -instcombine -S > %t
+; RUN: not grep zext %t
+; RUN: not grep slt %t
+; RUN: grep {icmp ult} %t
+
+; Instcombine should convert the zext+slt into a simple ult.
+
+define void @foo(double* %p) nounwind {
+entry:
+ br label %bb
+
+bb:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb ]
+ %t0 = and i64 %indvar, 65535
+ %t1 = getelementptr double* %p, i64 %t0
+ %t2 = load double* %t1, align 8
+ %t3 = fmul double %t2, 2.2
+ store double %t3, double* %t1, align 8
+ %i.04 = trunc i64 %indvar to i16
+ %t4 = add i16 %i.04, 1
+ %t5 = zext i16 %t4 to i32
+ %t6 = icmp slt i32 %t5, 500
+ %indvar.next = add i64 %indvar, 1
+ br i1 %t6, label %bb, label %return
+
+return:
+ ret void
+}
diff --git a/test/Transforms/InstCombine/signext.ll b/test/Transforms/InstCombine/signext.ll
new file mode 100644
index 0000000..49384d6
--- /dev/null
+++ b/test/Transforms/InstCombine/signext.ll
@@ -0,0 +1,87 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128:n8:16:32:64"
+
+define i32 @test1(i32 %x) {
+ %tmp.1 = and i32 %x, 65535 ; <i32> [#uses=1]
+ %tmp.2 = xor i32 %tmp.1, -32768 ; <i32> [#uses=1]
+ %tmp.3 = add i32 %tmp.2, 32768 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+; CHECK: @test1
+; CHECK: %sext = shl i32 %x, 16
+; CHECK: %tmp.3 = ashr i32 %sext, 16
+; CHECK: ret i32 %tmp.3
+}
+
+define i32 @test2(i32 %x) {
+ %tmp.1 = and i32 %x, 65535 ; <i32> [#uses=1]
+ %tmp.2 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
+ %tmp.3 = add i32 %tmp.2, -32768 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+; CHECK: @test2
+; CHECK: %sext = shl i32 %x, 16
+; CHECK: %tmp.3 = ashr i32 %sext, 16
+; CHECK: ret i32 %tmp.3
+}
+
+define i32 @test3(i16 %P) {
+ %tmp.1 = zext i16 %P to i32 ; <i32> [#uses=1]
+ %tmp.4 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
+ %tmp.5 = add i32 %tmp.4, -32768 ; <i32> [#uses=1]
+ ret i32 %tmp.5
+; CHECK: @test3
+; CHECK: %tmp.5 = sext i16 %P to i32
+; CHECK: ret i32 %tmp.5
+}
+
+define i32 @test4(i16 %P) {
+ %tmp.1 = zext i16 %P to i32 ; <i32> [#uses=1]
+ %tmp.4 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
+ %tmp.5 = add i32 %tmp.4, -32768 ; <i32> [#uses=1]
+ ret i32 %tmp.5
+; CHECK: @test4
+; CHECK: %tmp.5 = sext i16 %P to i32
+; CHECK: ret i32 %tmp.5
+}
+
+define i32 @test5(i32 %x) {
+ %tmp.1 = and i32 %x, 255 ; <i32> [#uses=1]
+ %tmp.2 = xor i32 %tmp.1, 128 ; <i32> [#uses=1]
+ %tmp.3 = add i32 %tmp.2, -128 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+; CHECK: @test5
+; CHECK: %sext = shl i32 %x, 24
+; CHECK: %tmp.3 = ashr i32 %sext, 24
+; CHECK: ret i32 %tmp.3
+}
+
+define i32 @test6(i32 %x) {
+ %tmp.2 = shl i32 %x, 16 ; <i32> [#uses=1]
+ %tmp.4 = ashr i32 %tmp.2, 16 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+; CHECK: @test6
+; CHECK: %tmp.2 = shl i32 %x, 16
+; CHECK: %tmp.4 = ashr i32 %tmp.2, 16
+; CHECK: ret i32 %tmp.4
+}
+
+define i32 @test7(i16 %P) {
+ %tmp.1 = zext i16 %P to i32 ; <i32> [#uses=1]
+ %sext1 = shl i32 %tmp.1, 16 ; <i32> [#uses=1]
+ %tmp.5 = ashr i32 %sext1, 16 ; <i32> [#uses=1]
+ ret i32 %tmp.5
+; CHECK: @test7
+; CHECK: %tmp.5 = sext i16 %P to i32
+; CHECK: ret i32 %tmp.5
+}
+
+define i32 @test8(i32 %x) nounwind readnone {
+entry:
+ %shr = lshr i32 %x, 5 ; <i32> [#uses=1]
+ %xor = xor i32 %shr, 67108864 ; <i32> [#uses=1]
+ %sub = add i32 %xor, -67108864 ; <i32> [#uses=1]
+ ret i32 %sub
+; CHECK: @test8
+; CHECK: %sub = ashr i32 %x, 5
+; CHECK: ret i32 %sub
+}
diff --git a/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll b/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll
new file mode 100644
index 0000000..6d2193f
--- /dev/null
+++ b/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll
@@ -0,0 +1,84 @@
+; RUN: opt < %s -instcombine -disable-output
+
+; SimplifyDemandedBits should cope with pointer types.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] }
+ %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base }
+ %struct.block_symbol = type { [3 x %struct.rtunion], %struct.object_block*, i64 }
+ %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* }
+ %struct.omp_clause_subcode = type { i32 }
+ %struct.rtunion = type { i8* }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.section = type { %struct.unnamed_section }
+ %struct.u = type { %struct.block_symbol }
+ %struct.unnamed_section = type { %struct.omp_clause_subcode, void (i8*)*, i8*, %struct.section* }
+
+define fastcc void @cse_insn(%struct.rtx_def* %insn, %struct.rtx_def* %libcall_insn) nounwind {
+entry:
+ br i1 undef, label %bb43, label %bb88
+
+bb43: ; preds = %entry
+ br label %bb88
+
+bb88: ; preds = %bb43, %entry
+ br i1 undef, label %bb95, label %bb107
+
+bb95: ; preds = %bb88
+ unreachable
+
+bb107: ; preds = %bb88
+ %0 = load i16* undef, align 8 ; <i16> [#uses=1]
+ %1 = icmp eq i16 %0, 38 ; <i1> [#uses=1]
+ %src_eqv_here.0 = select i1 %1, %struct.rtx_def* null, %struct.rtx_def* null ; <%struct.rtx_def*> [#uses=1]
+ br i1 undef, label %bb127, label %bb125
+
+bb125: ; preds = %bb107
+ br i1 undef, label %bb127, label %bb126
+
+bb126: ; preds = %bb125
+ br i1 undef, label %bb129, label %bb133
+
+bb127: ; preds = %bb125, %bb107
+ unreachable
+
+bb129: ; preds = %bb126
+ br label %bb133
+
+bb133: ; preds = %bb129, %bb126
+ br i1 undef, label %bb134, label %bb146
+
+bb134: ; preds = %bb133
+ unreachable
+
+bb146: ; preds = %bb133
+ br i1 undef, label %bb180, label %bb186
+
+bb180: ; preds = %bb146
+ %2 = icmp eq %struct.rtx_def* null, null ; <i1> [#uses=1]
+ %3 = zext i1 %2 to i8 ; <i8> [#uses=1]
+ %4 = icmp ne %struct.rtx_def* %src_eqv_here.0, null ; <i1> [#uses=1]
+ %5 = zext i1 %4 to i8 ; <i8> [#uses=1]
+ %toBool181 = icmp ne i8 %3, 0 ; <i1> [#uses=1]
+ %toBool182 = icmp ne i8 %5, 0 ; <i1> [#uses=1]
+ %6 = and i1 %toBool181, %toBool182 ; <i1> [#uses=1]
+ %7 = zext i1 %6 to i8 ; <i8> [#uses=1]
+ %toBool183 = icmp ne i8 %7, 0 ; <i1> [#uses=1]
+ br i1 %toBool183, label %bb184, label %bb186
+
+bb184: ; preds = %bb180
+ br i1 undef, label %bb185, label %bb186
+
+bb185: ; preds = %bb184
+ br label %bb186
+
+bb186: ; preds = %bb185, %bb184, %bb180, %bb146
+ br i1 undef, label %bb190, label %bb195
+
+bb190: ; preds = %bb186
+ unreachable
+
+bb195: ; preds = %bb186
+ unreachable
+}
diff --git a/test/Transforms/InstCombine/sink_instruction.ll b/test/Transforms/InstCombine/sink_instruction.ll
new file mode 100644
index 0000000..e521de2
--- /dev/null
+++ b/test/Transforms/InstCombine/sink_instruction.ll
@@ -0,0 +1,56 @@
+; RUN: opt -instcombine %s -S | FileCheck %s
+
+;; This tests that the instructions in the entry blocks are sunk into each
+;; arm of the 'if'.
+
+define i32 @test1(i1 %C, i32 %A, i32 %B) {
+; CHECK: @test1
+entry:
+ %tmp.2 = sdiv i32 %A, %B ; <i32> [#uses=1]
+ %tmp.9 = add i32 %B, %A ; <i32> [#uses=1]
+ br i1 %C, label %then, label %endif
+
+then: ; preds = %entry
+ ret i32 %tmp.9
+
+endif: ; preds = %entry
+; CHECK: sdiv i32
+; CHECK-NEXT: ret i32
+ ret i32 %tmp.2
+}
+
+
+;; PHI use, sink divide before call.
+define i32 @test2(i32 %x) nounwind ssp {
+; CHECK: @test2
+; CHECK-NOT: sdiv i32
+entry:
+ br label %bb
+
+bb: ; preds = %bb2, %entry
+ %x_addr.17 = phi i32 [ %x, %entry ], [ %x_addr.0, %bb2 ] ; <i32> [#uses=4]
+ %i.06 = phi i32 [ 0, %entry ], [ %4, %bb2 ] ; <i32> [#uses=1]
+ %0 = add nsw i32 %x_addr.17, 1 ; <i32> [#uses=1]
+ %1 = sdiv i32 %0, %x_addr.17 ; <i32> [#uses=1]
+ %2 = icmp eq i32 %x_addr.17, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb1, label %bb2
+
+bb1: ; preds = %bb
+; CHECK: bb1:
+; CHECK-NEXT: add nsw i32 %x_addr.17, 1
+; CHECK-NEXT: sdiv i32
+; CHECK-NEXT: tail call i32 @bar()
+ %3 = tail call i32 @bar() nounwind ; <i32> [#uses=0]
+ br label %bb2
+
+bb2: ; preds = %bb, %bb1
+ %x_addr.0 = phi i32 [ %1, %bb1 ], [ %x_addr.17, %bb ] ; <i32> [#uses=2]
+ %4 = add nsw i32 %i.06, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %4, 1000000 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb4, label %bb
+
+bb4: ; preds = %bb2
+ ret i32 %x_addr.0
+}
+
+declare i32 @bar()
diff --git a/test/Transforms/InstCombine/sitofp.ll b/test/Transforms/InstCombine/sitofp.ll
new file mode 100644
index 0000000..bd31b89
--- /dev/null
+++ b/test/Transforms/InstCombine/sitofp.ll
@@ -0,0 +1,55 @@
+; RUN: opt < %s -instcombine -S | not grep itofp
+
+define i1 @test1(i8 %A) {
+ %B = sitofp i8 %A to double
+ %C = fcmp ult double %B, 128.0
+ ret i1 %C ; True!
+}
+define i1 @test2(i8 %A) {
+ %B = sitofp i8 %A to double
+ %C = fcmp ugt double %B, -128.1
+ ret i1 %C ; True!
+}
+
+define i1 @test3(i8 %A) {
+ %B = sitofp i8 %A to double
+ %C = fcmp ule double %B, 127.0
+ ret i1 %C ; true!
+}
+
+define i1 @test4(i8 %A) {
+ %B = sitofp i8 %A to double
+ %C = fcmp ult double %B, 127.0
+ ret i1 %C ; A != 127
+}
+
+define i32 @test5(i32 %A) {
+ %B = sitofp i32 %A to double
+ %C = fptosi double %B to i32
+ %D = uitofp i32 %C to double
+ %E = fptoui double %D to i32
+ ret i32 %E
+}
+
+define i32 @test6(i32 %A) {
+ %B = and i32 %A, 7 ; <i32> [#uses=1]
+ %C = and i32 %A, 32 ; <i32> [#uses=1]
+ %D = sitofp i32 %B to double ; <double> [#uses=1]
+ %E = sitofp i32 %C to double ; <double> [#uses=1]
+ %F = fadd double %D, %E ; <double> [#uses=1]
+ %G = fptosi double %F to i32 ; <i32> [#uses=1]
+ ret i32 %G
+}
+
+define i32 @test7(i32 %a) nounwind {
+ %b = sitofp i32 %a to double ; <double> [#uses=1]
+ %c = fptoui double %b to i32 ; <i32> [#uses=1]
+ ret i32 %c
+}
+
+define i32 @test8(i32 %a) nounwind {
+ %b = uitofp i32 %a to double ; <double> [#uses=1]
+ %c = fptosi double %b to i32 ; <i32> [#uses=1]
+ ret i32 %c
+}
+
diff --git a/test/Transforms/InstCombine/srem-simplify-bug.ll b/test/Transforms/InstCombine/srem-simplify-bug.ll
new file mode 100644
index 0000000..af824a4
--- /dev/null
+++ b/test/Transforms/InstCombine/srem-simplify-bug.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep {ret i1 false}
+; PR2276
+
+define i1 @f(i32 %x) {
+ %A = or i32 %x, 1
+ %B = srem i32 %A, 1
+ %C = icmp ne i32 %B, 0
+ ret i1 %C
+}
diff --git a/test/Transforms/InstCombine/srem.ll b/test/Transforms/InstCombine/srem.ll
new file mode 100644
index 0000000..beefe4f
--- /dev/null
+++ b/test/Transforms/InstCombine/srem.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep srem
+
+define i64 @foo(i64 %x1, i64 %y2) {
+ %r = sdiv i64 %x1, %y2
+ %r7 = mul i64 %r, %y2
+ %r8 = sub i64 %x1, %r7
+ ret i64 %r8
+}
diff --git a/test/Transforms/InstCombine/srem1.ll b/test/Transforms/InstCombine/srem1.ll
new file mode 100644
index 0000000..f18690c
--- /dev/null
+++ b/test/Transforms/InstCombine/srem1.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -instcombine
+; PR2670
+
+@g_127 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @func_56(i32 %p_58, i32 %p_59, i32 %p_61, i16 signext %p_62) nounwind {
+entry:
+ %call = call i32 (...)* @rshift_s_s( i32 %p_61, i32 1 ) ; <i32> [#uses=1]
+ %conv = sext i32 %call to i64 ; <i64> [#uses=1]
+ %or = or i64 -1734012817166602727, %conv ; <i64> [#uses=1]
+ %rem = srem i64 %or, 1 ; <i64> [#uses=1]
+ %cmp = icmp eq i64 %rem, 1 ; <i1> [#uses=1]
+ %cmp.ext = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ store i32 %cmp.ext, i32* @g_127
+ ret i32 undef
+}
+
+declare i32 @rshift_s_s(...)
diff --git a/test/Transforms/InstCombine/stack-overalign.ll b/test/Transforms/InstCombine/stack-overalign.ll
new file mode 100644
index 0000000..88b4114
--- /dev/null
+++ b/test/Transforms/InstCombine/stack-overalign.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -instcombine -S | grep {align 32} | count 1
+
+; It's tempting to have an instcombine in which the src pointer of a
+; memcpy is aligned up to the alignment of the destination, however
+; there are pitfalls. If the src is an alloca, aligning it beyond what
+; the target's stack pointer is aligned at will require dynamic
+; stack realignment, which can require functions that don't otherwise
+; need a frame pointer to need one.
+;
+; Abstaining from this transform is not the only way to approach this
+; issue. Some late phase could be smart enough to reduce alloca
+; alignments when they are greater than they need to be. Or, codegen
+; could do dynamic alignment for just the one alloca, and leave the
+; main stack pointer at its standard alignment.
+
+@dst = global [1024 x i8] zeroinitializer, align 32
+
+define void @foo() nounwind {
+entry:
+ %src = alloca [1024 x i8], align 1
+ %src1 = getelementptr [1024 x i8]* %src, i32 0, i32 0
+ call void @llvm.memcpy.i32(i8* getelementptr ([1024 x i8]* @dst, i32 0, i32 0), i8* %src1, i32 1024, i32 1)
+ call void @frob(i8* %src1) nounwind
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
+
+declare void @frob(i8*)
diff --git a/test/Transforms/InstCombine/stacksaverestore.ll b/test/Transforms/InstCombine/stacksaverestore.ll
new file mode 100644
index 0000000..0fcaefa
--- /dev/null
+++ b/test/Transforms/InstCombine/stacksaverestore.ll
@@ -0,0 +1,56 @@
+; RUN: opt < %s -instcombine -S | grep {call.*stackrestore} | count 1
+
+declare i8* @llvm.stacksave()
+declare void @llvm.stackrestore(i8*)
+
+;; Test that llvm.stackrestore is removed when possible.
+define i32* @test1(i32 %P) {
+ %tmp = call i8* @llvm.stacksave( )
+ call void @llvm.stackrestore( i8* %tmp ) ;; not restoring anything
+ %A = alloca i32, i32 %P
+ ret i32* %A
+}
+
+define void @test2(i8* %X) {
+ call void @llvm.stackrestore( i8* %X ) ;; no allocas before return.
+ ret void
+}
+
+define void @foo(i32 %size) nounwind {
+entry:
+ %tmp118124 = icmp sgt i32 %size, 0 ; <i1> [#uses=1]
+ br i1 %tmp118124, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ %tmp25 = add i32 %size, -1 ; <i32> [#uses=1]
+ %tmp125 = icmp slt i32 %size, 1 ; <i1> [#uses=1]
+ %smax = select i1 %tmp125, i32 1, i32 %size ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.preheader
+ %i.0.reg2mem.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
+ %tmp = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %tmp23 = alloca i8, i32 %size ; <i8*> [#uses=2]
+ %tmp27 = getelementptr i8* %tmp23, i32 %tmp25 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp27, align 1
+ %tmp28 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %tmp52 = alloca i8, i32 %size ; <i8*> [#uses=1]
+ %tmp53 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %tmp77 = alloca i8, i32 %size ; <i8*> [#uses=1]
+ %tmp78 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %tmp102 = alloca i8, i32 %size ; <i8*> [#uses=1]
+ call void @bar( i32 %i.0.reg2mem.0, i8* %tmp23, i8* %tmp52, i8* %tmp77, i8* %tmp102, i32 %size ) nounwind
+ call void @llvm.stackrestore( i8* %tmp78 )
+ call void @llvm.stackrestore( i8* %tmp53 )
+ call void @llvm.stackrestore( i8* %tmp28 )
+ call void @llvm.stackrestore( i8* %tmp )
+ %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %smax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+declare void @bar(i32, i8*, i8*, i8*, i8*, i32)
+
diff --git a/test/Transforms/InstCombine/store.ll b/test/Transforms/InstCombine/store.ll
new file mode 100644
index 0000000..64460d7
--- /dev/null
+++ b/test/Transforms/InstCombine/store.ll
@@ -0,0 +1,85 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define void @test1(i32* %P) {
+ store i32 undef, i32* %P
+ store i32 123, i32* undef
+ store i32 124, i32* null
+ ret void
+; CHECK: @test1(
+; CHECK-NEXT: store i32 123, i32* undef
+; CHECK-NEXT: store i32 undef, i32* null
+; CHECK-NEXT: ret void
+}
+
+define void @test2(i32* %P) {
+ %X = load i32* %P ; <i32> [#uses=1]
+ %Y = add i32 %X, 0 ; <i32> [#uses=1]
+ store i32 %Y, i32* %P
+ ret void
+; CHECK: @test2
+; CHECK-NEXT: ret void
+}
+
+;; Simple sinking tests
+
+; "if then else"
+define i32 @test3(i1 %C) {
+ %A = alloca i32
+ br i1 %C, label %Cond, label %Cond2
+
+Cond:
+ store i32 -987654321, i32* %A
+ br label %Cont
+
+Cond2:
+ store i32 47, i32* %A
+ br label %Cont
+
+Cont:
+ %V = load i32* %A
+ ret i32 %V
+; CHECK: @test3
+; CHECK-NOT: alloca
+; CHECK: Cont:
+; CHECK-NEXT: %storemerge = phi i32 [ 47, %Cond2 ], [ -987654321, %Cond ]
+; CHECK-NEXT: ret i32 %storemerge
+}
+
+; "if then"
+define i32 @test4(i1 %C) {
+ %A = alloca i32
+ store i32 47, i32* %A
+ br i1 %C, label %Cond, label %Cont
+
+Cond:
+ store i32 -987654321, i32* %A
+ br label %Cont
+
+Cont:
+ %V = load i32* %A
+ ret i32 %V
+; CHECK: @test4
+; CHECK-NOT: alloca
+; CHECK: Cont:
+; CHECK-NEXT: %storemerge = phi i32 [ -987654321, %Cond ], [ 47, %0 ]
+; CHECK-NEXT: ret i32 %storemerge
+}
+
+; "if then"
+define void @test5(i1 %C, i32* %P) {
+ store i32 47, i32* %P, align 1
+ br i1 %C, label %Cond, label %Cont
+
+Cond:
+ store i32 -987654321, i32* %P, align 1
+ br label %Cont
+
+Cont:
+ ret void
+; CHECK: @test5
+; CHECK: Cont:
+; CHECK-NEXT: %storemerge = phi i32
+; CHECK-NEXT: store i32 %storemerge, i32* %P, align 1
+; CHECK-NEXT: ret void
+}
+
diff --git a/test/Transforms/InstCombine/sub.ll b/test/Transforms/InstCombine/sub.ll
new file mode 100644
index 0000000..29bd7be
--- /dev/null
+++ b/test/Transforms/InstCombine/sub.ll
@@ -0,0 +1,283 @@
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+; Optimize subtracts.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i32 @test1(i32 %A) {
+ %B = sub i32 %A, %A
+ ret i32 %B
+; CHECK: @test1
+; CHECK: ret i32 0
+}
+
+define i32 @test2(i32 %A) {
+ %B = sub i32 %A, 0
+ ret i32 %B
+; CHECK: @test2
+; CHECK: ret i32 %A
+}
+
+define i32 @test3(i32 %A) {
+ %B = sub i32 0, %A
+ %C = sub i32 0, %B
+ ret i32 %C
+; CHECK: @test3
+; CHECK: ret i32 %A
+}
+
+define i32 @test4(i32 %A, i32 %x) {
+ %B = sub i32 0, %A
+ %C = sub i32 %x, %B
+ ret i32 %C
+; CHECK: @test4
+; CHECK: %C = add i32 %x, %A
+; CHECK: ret i32 %C
+}
+
+define i32 @test5(i32 %A, i32 %B, i32 %C) {
+ %D = sub i32 %B, %C
+ %E = sub i32 %A, %D
+ ret i32 %E
+; CHECK: @test5
+; CHECK: %D = sub i32 %C, %B
+; CHECK: %E = add
+; CHECK: ret i32 %E
+}
+
+define i32 @test6(i32 %A, i32 %B) {
+ %C = and i32 %A, %B
+ %D = sub i32 %A, %C
+ ret i32 %D
+; CHECK: @test6
+; CHECK-NEXT: xor i32 %B, -1
+; CHECK-NEXT: %D = and i32
+; CHECK-NEXT: ret i32 %D
+}
+
+define i32 @test7(i32 %A) {
+ %B = sub i32 -1, %A
+ ret i32 %B
+; CHECK: @test7
+; CHECK: %B = xor i32 %A, -1
+; CHECK: ret i32 %B
+}
+
+define i32 @test8(i32 %A) {
+ %B = mul i32 9, %A
+ %C = sub i32 %B, %A
+ ret i32 %C
+; CHECK: @test8
+; CHECK: %C = shl i32 %A, 3
+; CHECK: ret i32 %C
+}
+
+define i32 @test9(i32 %A) {
+ %B = mul i32 3, %A
+ %C = sub i32 %A, %B
+ ret i32 %C
+; CHECK: @test9
+; CHECK: %C = mul i32 %A, -2
+; CHECK: ret i32 %C
+}
+
+define i32 @test10(i32 %A, i32 %B) {
+ %C = sub i32 0, %A
+ %D = sub i32 0, %B
+ %E = mul i32 %C, %D
+ ret i32 %E
+; CHECK: @test10
+; CHECK: %E = mul i32 %A, %B
+; CHECK: ret i32 %E
+}
+
+define i32 @test10a(i32 %A) {
+ %C = sub i32 0, %A
+ %E = mul i32 %C, 7
+ ret i32 %E
+; CHECK: @test10a
+; CHECK: %E = mul i32 %A, -7
+; CHECK: ret i32 %E
+}
+
+define i1 @test11(i8 %A, i8 %B) {
+ %C = sub i8 %A, %B
+ %cD = icmp ne i8 %C, 0
+ ret i1 %cD
+; CHECK: @test11
+; CHECK: %cD = icmp ne i8 %A, %B
+; CHECK: ret i1 %cD
+}
+
+define i32 @test12(i32 %A) {
+ %B = ashr i32 %A, 31
+ %C = sub i32 0, %B
+ ret i32 %C
+; CHECK: @test12
+; CHECK: %C = lshr i32 %A, 31
+; CHECK: ret i32 %C
+}
+
+define i32 @test13(i32 %A) {
+ %B = lshr i32 %A, 31
+ %C = sub i32 0, %B
+ ret i32 %C
+; CHECK: @test13
+; CHECK: %C = ashr i32 %A, 31
+; CHECK: ret i32 %C
+}
+
+define i32 @test14(i32 %A) {
+ %B = lshr i32 %A, 31
+ %C = bitcast i32 %B to i32
+ %D = sub i32 0, %C
+ ret i32 %D
+; CHECK: @test14
+; CHECK: %D = ashr i32 %A, 31
+; CHECK: ret i32 %D
+}
+
+define i32 @test15(i32 %A, i32 %B) {
+ %C = sub i32 0, %A
+ %D = srem i32 %B, %C
+ ret i32 %D
+; CHECK: @test15
+; CHECK: %D = srem i32 %B, %A
+; CHECK: ret i32 %D
+}
+
+define i32 @test16(i32 %A) {
+ %X = sdiv i32 %A, 1123
+ %Y = sub i32 0, %X
+ ret i32 %Y
+; CHECK: @test16
+; CHECK: %Y = sdiv i32 %A, -1123
+; CHECK: ret i32 %Y
+}
+
+; Can't fold subtract here because negation it might oveflow.
+; PR3142
+define i32 @test17(i32 %A) {
+ %B = sub i32 0, %A
+ %C = sdiv i32 %B, 1234
+ ret i32 %C
+; CHECK: @test17
+; CHECK: %B = sub i32 0, %A
+; CHECK: %C = sdiv i32 %B, 1234
+; CHECK: ret i32 %C
+}
+
+define i64 @test18(i64 %Y) {
+ %tmp.4 = shl i64 %Y, 2
+ %tmp.12 = shl i64 %Y, 2
+ %tmp.8 = sub i64 %tmp.4, %tmp.12
+ ret i64 %tmp.8
+; CHECK: @test18
+; CHECK: ret i64 0
+}
+
+define i32 @test19(i32 %X, i32 %Y) {
+ %Z = sub i32 %X, %Y
+ %Q = add i32 %Z, %Y
+ ret i32 %Q
+; CHECK: @test19
+; CHECK: ret i32 %X
+}
+
+define i1 @test20(i32 %g, i32 %h) {
+ %tmp.2 = sub i32 %g, %h
+ %tmp.4 = icmp ne i32 %tmp.2, %g
+ ret i1 %tmp.4
+; CHECK: @test20
+; CHECK: %tmp.4 = icmp ne i32 %h, 0
+; CHECK: ret i1 %tmp.4
+}
+
+define i1 @test21(i32 %g, i32 %h) {
+ %tmp.2 = sub i32 %g, %h
+ %tmp.4 = icmp ne i32 %tmp.2, %g
+ ret i1 %tmp.4
+; CHECK: @test21
+; CHECK: %tmp.4 = icmp ne i32 %h, 0
+; CHECK: ret i1 %tmp.4
+}
+
+; PR2298
+define i1 @test22(i32 %a, i32 %b) zeroext nounwind {
+ %tmp2 = sub i32 0, %a
+ %tmp4 = sub i32 0, %b
+ %tmp5 = icmp eq i32 %tmp2, %tmp4
+ ret i1 %tmp5
+; CHECK: @test22
+; CHECK: %tmp5 = icmp eq i32 %a, %b
+; CHECK: ret i1 %tmp5
+}
+
+; rdar://7362831
+define i32 @test23(i8* %P, i64 %A){
+ %B = getelementptr inbounds i8* %P, i64 %A
+ %C = ptrtoint i8* %B to i64
+ %D = trunc i64 %C to i32
+ %E = ptrtoint i8* %P to i64
+ %F = trunc i64 %E to i32
+ %G = sub i32 %D, %F
+ ret i32 %G
+; CHECK: @test23
+; CHECK-NEXT: = trunc i64 %A to i32
+; CHECK-NEXT: ret i32
+}
+
+define i64 @test24(i8* %P, i64 %A){
+ %B = getelementptr inbounds i8* %P, i64 %A
+ %C = ptrtoint i8* %B to i64
+ %E = ptrtoint i8* %P to i64
+ %G = sub i64 %C, %E
+ ret i64 %G
+; CHECK: @test24
+; CHECK-NEXT: ret i64 %A
+}
+
+define i64 @test24a(i8* %P, i64 %A){
+ %B = getelementptr inbounds i8* %P, i64 %A
+ %C = ptrtoint i8* %B to i64
+ %E = ptrtoint i8* %P to i64
+ %G = sub i64 %E, %C
+ ret i64 %G
+; CHECK: @test24a
+; CHECK-NEXT: sub i64 0, %A
+; CHECK-NEXT: ret i64
+}
+
+@Arr = external global [42 x i16]
+
+define i64 @test24b(i8* %P, i64 %A){
+ %B = getelementptr inbounds [42 x i16]* @Arr, i64 0, i64 %A
+ %C = ptrtoint i16* %B to i64
+ %G = sub i64 %C, ptrtoint ([42 x i16]* @Arr to i64)
+ ret i64 %G
+; CHECK: @test24b
+; CHECK-NEXT: shl i64 %A, 1
+; CHECK-NEXT: ret i64
+}
+
+
+define i64 @test25(i8* %P, i64 %A){
+ %B = getelementptr inbounds [42 x i16]* @Arr, i64 0, i64 %A
+ %C = ptrtoint i16* %B to i64
+ %G = sub i64 %C, ptrtoint (i16* getelementptr ([42 x i16]* @Arr, i64 1, i64 0) to i64)
+ ret i64 %G
+; CHECK: @test25
+; CHECK-NEXT: shl i64 %A, 1
+; CHECK-NEXT: add i64 {{.*}}, -84
+; CHECK-NEXT: ret i64
+}
+
+define i32 @test26(i32 %x) {
+ %shl = shl i32 3, %x
+ %neg = sub i32 0, %shl
+ ret i32 %neg
+; CHECK: @test26
+; CHECK-NEXT: shl i32 -3
+; CHECK-NEXT: ret i32
+}
+
diff --git a/test/Transforms/InstCombine/trunc-mask-ext.ll b/test/Transforms/InstCombine/trunc-mask-ext.ll
new file mode 100644
index 0000000..93e3753
--- /dev/null
+++ b/test/Transforms/InstCombine/trunc-mask-ext.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -instcombine -S > %t
+; RUN: not grep zext %t
+; RUN: not grep sext %t
+
+; Instcombine should be able to eliminate all of these ext casts.
+
+declare void @use(i32)
+
+define i64 @foo(i64 %a) {
+ %b = trunc i64 %a to i32
+ %c = and i32 %b, 15
+ %d = zext i32 %c to i64
+ call void @use(i32 %b)
+ ret i64 %d
+}
+define i64 @bar(i64 %a) {
+ %b = trunc i64 %a to i32
+ %c = shl i32 %b, 4
+ %q = ashr i32 %c, 4
+ %d = sext i32 %q to i64
+ call void @use(i32 %b)
+ ret i64 %d
+}
+define i64 @goo(i64 %a) {
+ %b = trunc i64 %a to i32
+ %c = and i32 %b, 8
+ %d = zext i32 %c to i64
+ call void @use(i32 %b)
+ ret i64 %d
+}
+define i64 @hoo(i64 %a) {
+ %b = trunc i64 %a to i32
+ %c = and i32 %b, 8
+ %x = xor i32 %c, 8
+ %d = zext i32 %x to i64
+ call void @use(i32 %b)
+ ret i64 %d
+}
diff --git a/test/Transforms/InstCombine/udiv-simplify-bug-0.ll b/test/Transforms/InstCombine/udiv-simplify-bug-0.ll
new file mode 100644
index 0000000..bfdd98c
--- /dev/null
+++ b/test/Transforms/InstCombine/udiv-simplify-bug-0.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep {ret i64 0} | count 2
+
+define i64 @foo(i32 %x) nounwind {
+ %y = lshr i32 %x, 1
+ %r = udiv i32 %y, -1
+ %z = sext i32 %r to i64
+ ret i64 %z
+}
+define i64 @bar(i32 %x) nounwind {
+ %y = lshr i32 %x, 31
+ %r = udiv i32 %y, 3
+ %z = sext i32 %r to i64
+ ret i64 %z
+}
diff --git a/test/Transforms/InstCombine/udiv-simplify-bug-1.ll b/test/Transforms/InstCombine/udiv-simplify-bug-1.ll
new file mode 100644
index 0000000..d95e8f8
--- /dev/null
+++ b/test/Transforms/InstCombine/udiv-simplify-bug-1.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -instcombine -S > %t1.ll
+; RUN: grep udiv %t1.ll | count 2
+; RUN: grep zext %t1.ll | count 2
+; PR2274
+
+; The udiv instructions shouldn't be optimized away, and the
+; sext instructions should be optimized to zext.
+
+define i64 @bar(i32 %x) nounwind {
+ %y = lshr i32 %x, 30
+ %r = udiv i32 %y, 3
+ %z = sext i32 %r to i64
+ ret i64 %z
+}
+define i64 @qux(i32 %x, i32 %v) nounwind {
+ %y = lshr i32 %x, 31
+ %r = udiv i32 %y, %v
+ %z = sext i32 %r to i64
+ ret i64 %z
+}
diff --git a/test/Transforms/InstCombine/udiv_select_to_select_shift.ll b/test/Transforms/InstCombine/udiv_select_to_select_shift.ll
new file mode 100644
index 0000000..9b059a6
--- /dev/null
+++ b/test/Transforms/InstCombine/udiv_select_to_select_shift.ll
@@ -0,0 +1,17 @@
+; Test that this transform works:
+; udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2)
+;
+; RUN: opt < %s -instcombine -S -o %t
+; RUN: not grep select %t
+; RUN: grep lshr %t | count 2
+; RUN: not grep udiv %t
+
+define i64 @test(i64 %X, i1 %Cond ) {
+entry:
+ %divisor1 = select i1 %Cond, i64 16, i64 8
+ %quotient1 = udiv i64 %X, %divisor1
+ %divisor2 = select i1 %Cond, i64 8, i64 0
+ %quotient2 = udiv i64 %X, %divisor2
+ %sum = add i64 %quotient1, %quotient2
+ ret i64 %sum
+}
diff --git a/test/Transforms/InstCombine/udivrem-change-width.ll b/test/Transforms/InstCombine/udivrem-change-width.ll
new file mode 100644
index 0000000..9983944
--- /dev/null
+++ b/test/Transforms/InstCombine/udivrem-change-width.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -instcombine -S | not grep zext
+; PR4548
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define i8 @udiv_i8(i8 %a, i8 %b) nounwind {
+ %conv = zext i8 %a to i32
+ %conv2 = zext i8 %b to i32
+ %div = udiv i32 %conv, %conv2
+ %conv3 = trunc i32 %div to i8
+ ret i8 %conv3
+}
+
+define i8 @urem_i8(i8 %a, i8 %b) nounwind {
+ %conv = zext i8 %a to i32
+ %conv2 = zext i8 %b to i32
+ %div = urem i32 %conv, %conv2
+ %conv3 = trunc i32 %div to i8
+ ret i8 %conv3
+}
+
diff --git a/test/Transforms/InstCombine/urem-simplify-bug.ll b/test/Transforms/InstCombine/urem-simplify-bug.ll
new file mode 100644
index 0000000..7c2b4b0
--- /dev/null
+++ b/test/Transforms/InstCombine/urem-simplify-bug.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -instcombine -S | grep {= or i32 %x, -5 }
+
[email protected] = internal constant [5 x i8] c"foo\0A\00" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"bar\0A\00" ; <[5 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ %x = call i32 @func_11( ) nounwind ; <i32> [#uses=1]
+ %tmp3 = or i32 %x, -5 ; <i32> [#uses=1]
+ %tmp5 = urem i32 251, %tmp3 ; <i32> [#uses=1]
+ %tmp6 = icmp ne i32 %tmp5, 0 ; <i1> [#uses=1]
+ %tmp67 = zext i1 %tmp6 to i32 ; <i32> [#uses=1]
+ %tmp9 = urem i32 %tmp67, 95 ; <i32> [#uses=1]
+ %tmp10 = and i32 %tmp9, 1 ; <i32> [#uses=1]
+ %tmp12 = icmp eq i32 %tmp10, 0 ; <i1> [#uses=1]
+ br i1 %tmp12, label %bb14, label %bb
+
+bb: ; preds = %entry
+ br label %bb15
+
+bb14: ; preds = %entry
+ br label %bb15
+
+bb15: ; preds = %bb14, %bb
+ %iftmp.0.0 = phi i8* [ getelementptr ([5 x i8]* @.str1, i32 0, i32 0), %bb14 ], [ getelementptr ([5 x i8]* @.str, i32 0, i32 0), %bb ] ; <i8*> [#uses=1]
+ %tmp17 = call i32 (i8*, ...)* @printf( i8* %iftmp.0.0 ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @func_11()
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/Transforms/InstCombine/urem.ll b/test/Transforms/InstCombine/urem.ll
new file mode 100644
index 0000000..5108422
--- /dev/null
+++ b/test/Transforms/InstCombine/urem.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -instcombine -S | grep urem
+
+define i64 @rem_unsigned(i64 %x1, i64 %y2) {
+ %r = udiv i64 %x1, %y2
+ %r7 = mul i64 %r, %y2
+ %r8 = sub i64 %x1, %r7
+ ret i64 %r8
+}
diff --git a/test/Transforms/InstCombine/vec_demanded_elts-2.ll b/test/Transforms/InstCombine/vec_demanded_elts-2.ll
new file mode 100644
index 0000000..4159361
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_demanded_elts-2.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -instcombine -S | not grep extractelement
+
+define void @get_image() nounwind {
+entry:
+ %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1]
+ %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
+ %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1]
+ %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
+ %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1]
+ br i1 %2, label %bb2, label %bb3
+
+bb2: ; preds = %entry
+ br label %bb3
+
+bb3: ; preds = %bb2, %entry
+ unreachable
+}
+
+declare i32 @fgetc(i8*)
diff --git a/test/Transforms/InstCombine/vec_demanded_elts-3.ll b/test/Transforms/InstCombine/vec_demanded_elts-3.ll
new file mode 100644
index 0000000..62e4370
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_demanded_elts-3.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | not grep load
+; PR4340
+
+define void @vac(<4 x float>* nocapture %a) nounwind {
+entry:
+ %tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1]
+ %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1]
+ %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1]
+ %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1]
+ %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1]
+ store <4 x float> %vecins8, <4 x float>* %a
+ ret void
+}
+
diff --git a/test/Transforms/InstCombine/vec_demanded_elts.ll b/test/Transforms/InstCombine/vec_demanded_elts.ll
new file mode 100644
index 0000000..2009a77
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_demanded_elts.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {fadd float}
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {fmul float}
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep {insertelement.*0.00}
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep {call.*llvm.x86.sse.mul}
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep {call.*llvm.x86.sse.sub}
+; END.
+
+define i16 @test1(float %f) {
+entry:
+ %tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
+ %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
+ %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
+ %tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
+ %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
+ %tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
+ %tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
+ ret i16 %tmp69
+}
+
+define i32 @test2(float %f) {
+ %tmp5 = fmul float %f, %f
+ %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0
+ %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
+ %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
+ %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
+ %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32>
+ %tmp21 = extractelement <4 x i32> %tmp19, i32 0
+ ret i32 %tmp21
+}
+
+declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
+
+declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
+
+declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
+
+declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
+
+declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
diff --git a/test/Transforms/InstCombine/vec_extract_elt.ll b/test/Transforms/InstCombine/vec_extract_elt.ll
new file mode 100644
index 0000000..63e4ee2
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_extract_elt.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | not grep extractelement
+
+define i32 @test(float %f) {
+ %tmp7 = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
+ %tmp17 = bitcast <4 x float> %tmp7 to <4 x i32> ; <<4 x i32>> [#uses=1]
+ %tmp19 = extractelement <4 x i32> %tmp17, i32 0 ; <i32> [#uses=1]
+ ret i32 %tmp19
+}
+
diff --git a/test/Transforms/InstCombine/vec_insertelt.ll b/test/Transforms/InstCombine/vec_insertelt.ll
new file mode 100644
index 0000000..eedf882
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_insertelt.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -instcombine -S | grep {ret <4 x i32> %A}
+
+; PR1286
+define <4 x i32> @test1(<4 x i32> %A) {
+ %B = insertelement <4 x i32> %A, i32 undef, i32 1
+ ret <4 x i32> %B
+}
diff --git a/test/Transforms/InstCombine/vec_narrow.ll b/test/Transforms/InstCombine/vec_narrow.ll
new file mode 100644
index 0000000..daf7bcf
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_narrow.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {add float}
+
+ %V = type <4 x float>
+
+define float @test(%V %A, %V %B, float %f) {
+ %C = insertelement %V %A, float %f, i32 0 ; <%V> [#uses=1]
+ %D = fadd %V %C, %B ; <%V> [#uses=1]
+ %E = extractelement %V %D, i32 0 ; <float> [#uses=1]
+ ret float %E
+}
+
diff --git a/test/Transforms/InstCombine/vec_shuffle.ll b/test/Transforms/InstCombine/vec_shuffle.ll
new file mode 100644
index 0000000..29adc1e2
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_shuffle.ll
@@ -0,0 +1,89 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+%T = type <4 x float>
+
+
+define %T @test1(%T %v1) {
+; CHECK: @test1
+; CHECK: ret %T %v1
+ %v2 = shufflevector %T %v1, %T undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ ret %T %v2
+}
+
+define %T @test2(%T %v1) {
+; CHECK: @test2
+; CHECK: ret %T %v1
+ %v2 = shufflevector %T %v1, %T %v1, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
+ ret %T %v2
+}
+
+define float @test3(%T %A, %T %B, float %f) {
+; CHECK: @test3
+; CHECK: ret float %f
+ %C = insertelement %T %A, float %f, i32 0
+ %D = shufflevector %T %C, %T %B, <4 x i32> <i32 5, i32 0, i32 2, i32 7>
+ %E = extractelement %T %D, i32 1
+ ret float %E
+}
+
+define i32 @test4(<4 x i32> %X) {
+; CHECK: @test4
+; CHECK-NEXT: extractelement
+; CHECK-NEXT: ret
+ %tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> zeroinitializer
+ %tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
+ ret i32 %tmp34
+}
+
+define i32 @test5(<4 x i32> %X) {
+; CHECK: @test5
+; CHECK-NEXT: extractelement
+; CHECK-NEXT: ret
+ %tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 undef, i32 undef>
+ %tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
+ ret i32 %tmp34
+}
+
+define float @test6(<4 x float> %X) {
+; CHECK: @test6
+; CHECK-NEXT: extractelement
+; CHECK-NEXT: ret
+ %X1 = bitcast <4 x float> %X to <4 x i32>
+ %tmp152.i53899.i = shufflevector <4 x i32> %X1, <4 x i32> undef, <4 x i32> zeroinitializer
+ %tmp152.i53900.i = bitcast <4 x i32> %tmp152.i53899.i to <4 x float>
+ %tmp34 = extractelement <4 x float> %tmp152.i53900.i, i32 0
+ ret float %tmp34
+}
+
+define <4 x float> @test7(<4 x float> %tmp45.i) {
+; CHECK: @test7
+; CHECK-NEXT: ret %T %tmp45.i
+ %tmp1642.i = shufflevector <4 x float> %tmp45.i, <4 x float> undef, <4 x i32> < i32 0, i32 1, i32 6, i32 7 >
+ ret <4 x float> %tmp1642.i
+}
+
+; This should turn into a single shuffle.
+define <4 x float> @test8(<4 x float> %tmp, <4 x float> %tmp1) {
+; CHECK: @test8
+; CHECK-NEXT: shufflevector
+; CHECK-NEXT: ret
+ %tmp4 = extractelement <4 x float> %tmp, i32 1
+ %tmp2 = extractelement <4 x float> %tmp, i32 3
+ %tmp1.upgrd.1 = extractelement <4 x float> %tmp1, i32 0
+ %tmp128 = insertelement <4 x float> undef, float %tmp4, i32 0
+ %tmp130 = insertelement <4 x float> %tmp128, float undef, i32 1
+ %tmp132 = insertelement <4 x float> %tmp130, float %tmp2, i32 2
+ %tmp134 = insertelement <4 x float> %tmp132, float %tmp1.upgrd.1, i32 3
+ ret <4 x float> %tmp134
+}
+
+; Test fold of two shuffles where the first shuffle vectors inputs are a
+; different length then the second.
+define <4 x i8> @test9(<16 x i8> %tmp6) nounwind {
+; CHECK: @test9
+; CHECK-NEXT: shufflevector
+; CHECK-NEXT: ret
+ %tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 13, i32 9, i32 4, i32 13 > ; <<4 x i8>> [#uses=1]
+ %tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
+ ret <4 x i8> %tmp9
+}
\ No newline at end of file
diff --git a/test/Transforms/InstCombine/vector-casts.ll b/test/Transforms/InstCombine/vector-casts.ll
new file mode 100644
index 0000000..470d485
--- /dev/null
+++ b/test/Transforms/InstCombine/vector-casts.ll
@@ -0,0 +1,107 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; This turns into a&1 != 0
+define <2 x i1> @test1(<2 x i64> %a) {
+ %t = trunc <2 x i64> %a to <2 x i1>
+ ret <2 x i1> %t
+
+; CHECK: @test1
+; CHECK: and <2 x i64> %a, <i64 1, i64 1>
+; CHECK: icmp ne <2 x i64> %tmp, zeroinitializer
+}
+
+; The ashr turns into an lshr.
+define <2 x i64> @test2(<2 x i64> %a) {
+ %b = and <2 x i64> %a, <i64 65535, i64 65535>
+ %t = ashr <2 x i64> %b, <i64 1, i64 1>
+ ret <2 x i64> %t
+
+; CHECK: @test2
+; CHECK: and <2 x i64> %a, <i64 65535, i64 65535>
+; CHECK: lshr <2 x i64> %b, <i64 1, i64 1>
+}
+
+
+
+define <2 x i64> @test3(<4 x float> %a, <4 x float> %b) nounwind readnone {
+entry:
+ %cmp = fcmp ord <4 x float> %a, zeroinitializer
+ %sext = sext <4 x i1> %cmp to <4 x i32>
+ %cmp4 = fcmp ord <4 x float> %b, zeroinitializer
+ %sext5 = sext <4 x i1> %cmp4 to <4 x i32>
+ %and = and <4 x i32> %sext, %sext5
+ %conv = bitcast <4 x i32> %and to <2 x i64>
+ ret <2 x i64> %conv
+
+; CHECK: @test3
+; CHECK: fcmp ord <4 x float> %a, %b
+}
+
+define <2 x i64> @test4(<4 x float> %a, <4 x float> %b) nounwind readnone {
+entry:
+ %cmp = fcmp uno <4 x float> %a, zeroinitializer
+ %sext = sext <4 x i1> %cmp to <4 x i32>
+ %cmp4 = fcmp uno <4 x float> %b, zeroinitializer
+ %sext5 = sext <4 x i1> %cmp4 to <4 x i32>
+ %or = or <4 x i32> %sext, %sext5
+ %conv = bitcast <4 x i32> %or to <2 x i64>
+ ret <2 x i64> %conv
+; CHECK: @test4
+; CHECK: fcmp uno <4 x float> %a, %b
+}
+
+
+
+define void @convert(<2 x i32>* %dst.addr, <2 x i64> %src) nounwind {
+entry:
+ %val = trunc <2 x i64> %src to <2 x i32>
+ %add = add <2 x i32> %val, <i32 1, i32 1>
+ store <2 x i32> %add, <2 x i32>* %dst.addr
+ ret void
+}
+
+define <2 x i65> @foo(<2 x i64> %t) {
+ %a = trunc <2 x i64> %t to <2 x i32>
+ %b = zext <2 x i32> %a to <2 x i65>
+ ret <2 x i65> %b
+}
+define <2 x i64> @bar(<2 x i65> %t) {
+ %a = trunc <2 x i65> %t to <2 x i32>
+ %b = zext <2 x i32> %a to <2 x i64>
+ ret <2 x i64> %b
+}
+define <2 x i65> @foos(<2 x i64> %t) {
+ %a = trunc <2 x i64> %t to <2 x i32>
+ %b = sext <2 x i32> %a to <2 x i65>
+ ret <2 x i65> %b
+}
+define <2 x i64> @bars(<2 x i65> %t) {
+ %a = trunc <2 x i65> %t to <2 x i32>
+ %b = sext <2 x i32> %a to <2 x i64>
+ ret <2 x i64> %b
+}
+define <2 x i64> @quxs(<2 x i64> %t) {
+ %a = trunc <2 x i64> %t to <2 x i32>
+ %b = sext <2 x i32> %a to <2 x i64>
+ ret <2 x i64> %b
+}
+define <2 x i64> @quxt(<2 x i64> %t) {
+ %a = shl <2 x i64> %t, <i64 32, i64 32>
+ %b = ashr <2 x i64> %a, <i64 32, i64 32>
+ ret <2 x i64> %b
+}
+define <2 x double> @fa(<2 x double> %t) {
+ %a = fptrunc <2 x double> %t to <2 x float>
+ %b = fpext <2 x float> %a to <2 x double>
+ ret <2 x double> %b
+}
+define <2 x double> @fb(<2 x double> %t) {
+ %a = fptoui <2 x double> %t to <2 x i64>
+ %b = uitofp <2 x i64> %a to <2 x double>
+ ret <2 x double> %b
+}
+define <2 x double> @fc(<2 x double> %t) {
+ %a = fptosi <2 x double> %t to <2 x i64>
+ %b = sitofp <2 x i64> %a to <2 x double>
+ ret <2 x double> %b
+}
diff --git a/test/Transforms/InstCombine/vector-srem.ll b/test/Transforms/InstCombine/vector-srem.ll
new file mode 100644
index 0000000..acb11c5
--- /dev/null
+++ b/test/Transforms/InstCombine/vector-srem.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -instcombine -S | grep {srem <4 x i32>}
+
+define <4 x i32> @foo(<4 x i32> %t, <4 x i32> %u)
+{
+ %k = sdiv <4 x i32> %t, %u
+ %l = mul <4 x i32> %k, %u
+ %m = sub <4 x i32> %t, %l
+ ret <4 x i32> %m
+}
diff --git a/test/Transforms/InstCombine/volatile_store.ll b/test/Transforms/InstCombine/volatile_store.ll
new file mode 100644
index 0000000..5316bd7
--- /dev/null
+++ b/test/Transforms/InstCombine/volatile_store.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -instcombine -S | grep {volatile store}
+; RUN: opt < %s -instcombine -S | grep {volatile load}
+
+@x = weak global i32 0 ; <i32*> [#uses=2]
+
+define void @self_assign_1() {
+entry:
+ %tmp = volatile load i32* @x ; <i32> [#uses=1]
+ volatile store i32 %tmp, i32* @x
+ br label %return
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/InstCombine/xor-undef.ll b/test/Transforms/InstCombine/xor-undef.ll
new file mode 100644
index 0000000..cf72955
--- /dev/null
+++ b/test/Transforms/InstCombine/xor-undef.ll
@@ -0,0 +1,6 @@
+; RUN: opt < %s -instcombine -S | grep zeroinitializer
+
+define <2 x i64> @f() {
+ %tmp = xor <2 x i64> undef, undef
+ ret <2 x i64> %tmp
+}
diff --git a/test/Transforms/InstCombine/xor.ll b/test/Transforms/InstCombine/xor.ll
new file mode 100644
index 0000000..a7bcdac
--- /dev/null
+++ b/test/Transforms/InstCombine/xor.ll
@@ -0,0 +1,193 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+; RUN: opt < %s -instcombine -S | \
+; RUN: not grep {xor }
+; END.
+@G1 = global i32 0 ; <i32*> [#uses=1]
+@G2 = global i32 0 ; <i32*> [#uses=1]
+
+define i1 @test0(i1 %A) {
+ %B = xor i1 %A, false ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i32 @test1(i32 %A) {
+ %B = xor i32 %A, 0 ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i1 @test2(i1 %A) {
+ %B = xor i1 %A, %A ; <i1> [#uses=1]
+ ret i1 %B
+}
+
+define i32 @test3(i32 %A) {
+ %B = xor i32 %A, %A ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test4(i32 %A) {
+ %NotA = xor i32 -1, %A ; <i32> [#uses=1]
+ %B = xor i32 %A, %NotA ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define i32 @test5(i32 %A) {
+ %t1 = or i32 %A, 123 ; <i32> [#uses=1]
+ %r = xor i32 %t1, 123 ; <i32> [#uses=1]
+ ret i32 %r
+}
+
+define i8 @test6(i8 %A) {
+ %B = xor i8 %A, 17 ; <i8> [#uses=1]
+ %C = xor i8 %B, 17 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i32 @test7(i32 %A, i32 %B) {
+ %A1 = and i32 %A, 7 ; <i32> [#uses=1]
+ %B1 = and i32 %B, 128 ; <i32> [#uses=1]
+ %C1 = xor i32 %A1, %B1 ; <i32> [#uses=1]
+ ret i32 %C1
+}
+
+define i8 @test8(i1 %c) {
+ %d = xor i1 %c, true ; <i1> [#uses=1]
+ br i1 %d, label %True, label %False
+
+True: ; preds = %0
+ ret i8 1
+
+False: ; preds = %0
+ ret i8 3
+}
+
+define i1 @test9(i8 %A) {
+ %B = xor i8 %A, 123 ; <i8> [#uses=1]
+ %C = icmp eq i8 %B, 34 ; <i1> [#uses=1]
+ ret i1 %C
+}
+
+define i8 @test10(i8 %A) {
+ %B = and i8 %A, 3 ; <i8> [#uses=1]
+ %C = xor i8 %B, 4 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i8 @test11(i8 %A) {
+ %B = or i8 %A, 12 ; <i8> [#uses=1]
+ %C = xor i8 %B, 4 ; <i8> [#uses=1]
+ ret i8 %C
+}
+
+define i1 @test12(i8 %A) {
+ %B = xor i8 %A, 4 ; <i8> [#uses=1]
+ %c = icmp ne i8 %B, 0 ; <i1> [#uses=1]
+ ret i1 %c
+}
+
+define i1 @test13(i8 %A, i8 %B) {
+ %C = icmp ult i8 %A, %B ; <i1> [#uses=1]
+ %D = icmp ugt i8 %A, %B ; <i1> [#uses=1]
+ %E = xor i1 %C, %D ; <i1> [#uses=1]
+ ret i1 %E
+}
+
+define i1 @test14(i8 %A, i8 %B) {
+ %C = icmp eq i8 %A, %B ; <i1> [#uses=1]
+ %D = icmp ne i8 %B, %A ; <i1> [#uses=1]
+ %E = xor i1 %C, %D ; <i1> [#uses=1]
+ ret i1 %E
+}
+
+define i32 @test15(i32 %A) {
+ %B = add i32 %A, -1 ; <i32> [#uses=1]
+ %C = xor i32 %B, -1 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test16(i32 %A) {
+ %B = add i32 %A, 123 ; <i32> [#uses=1]
+ %C = xor i32 %B, -1 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test17(i32 %A) {
+ %B = sub i32 123, %A ; <i32> [#uses=1]
+ %C = xor i32 %B, -1 ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test18(i32 %A) {
+ %B = xor i32 %A, -1 ; <i32> [#uses=1]
+ %C = sub i32 123, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+define i32 @test19(i32 %A, i32 %B) {
+ %C = xor i32 %A, %B ; <i32> [#uses=1]
+ %D = xor i32 %C, %A ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define void @test20(i32 %A, i32 %B) {
+ %tmp.2 = xor i32 %B, %A ; <i32> [#uses=2]
+ %tmp.5 = xor i32 %tmp.2, %B ; <i32> [#uses=2]
+ %tmp.8 = xor i32 %tmp.5, %tmp.2 ; <i32> [#uses=1]
+ store i32 %tmp.8, i32* @G1
+ store i32 %tmp.5, i32* @G2
+ ret void
+}
+
+define i32 @test21(i1 %C, i32 %A, i32 %B) {
+ %C2 = xor i1 %C, true ; <i1> [#uses=1]
+ %D = select i1 %C2, i32 %A, i32 %B ; <i32> [#uses=1]
+ ret i32 %D
+}
+
+define i32 @test22(i1 %X) {
+ %Y = xor i1 %X, true ; <i1> [#uses=1]
+ %Z = zext i1 %Y to i32 ; <i32> [#uses=1]
+ %Q = xor i32 %Z, 1 ; <i32> [#uses=1]
+ ret i32 %Q
+}
+
+define i1 @test23(i32 %a, i32 %b) {
+ %tmp.2 = xor i32 %b, %a ; <i32> [#uses=1]
+ %tmp.4 = icmp eq i32 %tmp.2, %a ; <i1> [#uses=1]
+ ret i1 %tmp.4
+}
+
+define i1 @test24(i32 %c, i32 %d) {
+ %tmp.2 = xor i32 %d, %c ; <i32> [#uses=1]
+ %tmp.4 = icmp ne i32 %tmp.2, %c ; <i1> [#uses=1]
+ ret i1 %tmp.4
+}
+
+define i32 @test25(i32 %g, i32 %h) {
+ %h2 = xor i32 %h, -1 ; <i32> [#uses=1]
+ %tmp2 = and i32 %h2, %g ; <i32> [#uses=1]
+ %tmp4 = xor i32 %tmp2, %g ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define i32 @test26(i32 %a, i32 %b) {
+ %b2 = xor i32 %b, -1 ; <i32> [#uses=1]
+ %tmp2 = xor i32 %a, %b2 ; <i32> [#uses=1]
+ %tmp4 = and i32 %tmp2, %a ; <i32> [#uses=1]
+ ret i32 %tmp4
+}
+
+define i32 @test27(i32 %b, i32 %c, i32 %d) {
+ %tmp2 = xor i32 %d, %b ; <i32> [#uses=1]
+ %tmp5 = xor i32 %d, %c ; <i32> [#uses=1]
+ %tmp = icmp eq i32 %tmp2, %tmp5 ; <i1> [#uses=1]
+ %tmp6 = zext i1 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %tmp6
+}
+
+define i32 @test28(i32 %indvar) {
+ %tmp7 = add i32 %indvar, -2147483647 ; <i32> [#uses=1]
+ %tmp214 = xor i32 %tmp7, -2147483648 ; <i32> [#uses=1]
+ ret i32 %tmp214
+}
diff --git a/test/Transforms/InstCombine/xor2.ll b/test/Transforms/InstCombine/xor2.ll
new file mode 100644
index 0000000..de3d65d
--- /dev/null
+++ b/test/Transforms/InstCombine/xor2.ll
@@ -0,0 +1,53 @@
+; This test makes sure that these instructions are properly eliminated.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; PR1253
+define i1 @test0(i32 %A) {
+; CHECK: @test0
+; CHECK: %C = icmp slt i32 %A, 0
+ %B = xor i32 %A, -2147483648
+ %C = icmp sgt i32 %B, -1
+ ret i1 %C
+}
+
+define i1 @test1(i32 %A) {
+; CHECK: @test1
+; CHECK: %C = icmp slt i32 %A, 0
+ %B = xor i32 %A, 12345
+ %C = icmp slt i32 %B, 0
+ ret i1 %C
+}
+
+; PR1014
+define i32 @test2(i32 %tmp1) {
+; CHECK: @test2
+; CHECK-NEXT: or i32 %tmp1, 8
+; CHECK-NEXT: and i32
+; CHECK-NEXT: ret i32
+ %ovm = and i32 %tmp1, 32
+ %ov3 = add i32 %ovm, 145
+ %ov110 = xor i32 %ov3, 153
+ ret i32 %ov110
+}
+
+define i32 @test3(i32 %tmp1) {
+; CHECK: @test3
+; CHECK-NEXT: or i32 %tmp1, 8
+; CHECK-NEXT: and i32
+; CHECK-NEXT: ret i32
+ %ovm = or i32 %tmp1, 145
+ %ov31 = and i32 %ovm, 177
+ %ov110 = xor i32 %ov31, 153
+ ret i32 %ov110
+}
+
+define i32 @test4(i32 %A, i32 %B) {
+ %1 = xor i32 %A, -1
+ %2 = ashr i32 %1, %B
+ %3 = xor i32 %2, -1
+ ret i32 %3
+; CHECK: @test4
+; CHECK: %1 = ashr i32 %A, %B
+; CHECK: ret i32 %1
+}
diff --git a/test/Transforms/InstCombine/zero-point-zero-add.ll b/test/Transforms/InstCombine/zero-point-zero-add.ll
new file mode 100644
index 0000000..d07a9f4
--- /dev/null
+++ b/test/Transforms/InstCombine/zero-point-zero-add.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -instcombine -S | grep 0.0 | count 1
+
+declare double @abs(double)
+
+define double @test(double %X) {
+ %Y = fadd double %X, 0.0 ;; Should be a single add x, 0.0
+ %Z = fadd double %Y, 0.0
+ ret double %Z
+}
+
+define double @test1(double %X) {
+ %Y = call double @abs(double %X)
+ %Z = fadd double %Y, 0.0
+ ret double %Z
+}
diff --git a/test/Transforms/InstCombine/zeroext-and-reduce.ll b/test/Transforms/InstCombine/zeroext-and-reduce.ll
new file mode 100644
index 0000000..592b8a1
--- /dev/null
+++ b/test/Transforms/InstCombine/zeroext-and-reduce.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -instcombine -S | \
+; RUN: grep {and i32 %Y, 8}
+
+define i32 @test1(i8 %X) {
+ %Y = zext i8 %X to i32 ; <i32> [#uses=1]
+ %Z = and i32 %Y, 65544 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+
diff --git a/test/Transforms/InstCombine/zext-bool-add-sub.ll b/test/Transforms/InstCombine/zext-bool-add-sub.ll
new file mode 100644
index 0000000..1164273
--- /dev/null
+++ b/test/Transforms/InstCombine/zext-bool-add-sub.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -instcombine -S | not grep zext
+
+define i32 @a(i1 %x) {
+entry:
+ %y = zext i1 %x to i32
+ %res = add i32 %y, 1
+ ret i32 %res
+}
+
+define i32 @b(i1 %x) {
+entry:
+ %y = zext i1 %x to i32
+ %res = add i32 %y, -1
+ ret i32 %res
+}
+
+define i32 @c(i1 %x) {
+entry:
+ %y = zext i1 %x to i32
+ %res = sub i32 0, %y
+ ret i32 %res
+}
+
+define i32 @d(i1 %x) {
+entry:
+ %y = zext i1 %x to i32
+ %res = sub i32 3, %y
+ ret i32 %res
+}
diff --git a/test/Transforms/InstCombine/zext-fold.ll b/test/Transforms/InstCombine/zext-fold.ll
new file mode 100644
index 0000000..9521101
--- /dev/null
+++ b/test/Transforms/InstCombine/zext-fold.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -instcombine -S | grep {zext } | count 1
+; PR1570
+
+define i32 @test2(float %X, float %Y) {
+entry:
+ %tmp3 = fcmp uno float %X, %Y ; <i1> [#uses=1]
+ %tmp34 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
+ %tmp = xor i8 %tmp34, 1 ; <i8> [#uses=1]
+ %toBoolnot5 = zext i8 %tmp to i32 ; <i32> [#uses=1]
+ ret i32 %toBoolnot5
+}
+
diff --git a/test/Transforms/InstCombine/zext-or-icmp.ll b/test/Transforms/InstCombine/zext-or-icmp.ll
new file mode 100644
index 0000000..969c301
--- /dev/null
+++ b/test/Transforms/InstCombine/zext-or-icmp.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -instcombine -S | grep icmp | count 1
+
+ %struct.FooBar = type <{ i8, i8, [2 x i8], i8, i8, i8, i8, i16, i16, [4 x i8], [8 x %struct.Rock] }>
+ %struct.Rock = type { i16, i16 }
+@some_idx = internal constant [4 x i8] c"\0A\0B\0E\0F" ; <[4 x i8]*> [#uses=1]
+
+define i8 @t(%struct.FooBar* %up, i8 zeroext %intra_flag, i32 %blk_i) zeroext nounwind {
+entry:
+ %tmp2 = lshr i32 %blk_i, 1 ; <i32> [#uses=1]
+ %tmp3 = and i32 %tmp2, 2 ; <i32> [#uses=1]
+ %tmp5 = and i32 %blk_i, 1 ; <i32> [#uses=1]
+ %tmp6 = or i32 %tmp3, %tmp5 ; <i32> [#uses=1]
+ %tmp8 = getelementptr %struct.FooBar* %up, i32 0, i32 7 ; <i16*> [#uses=1]
+ %tmp9 = load i16* %tmp8, align 1 ; <i16> [#uses=1]
+ %tmp910 = zext i16 %tmp9 to i32 ; <i32> [#uses=1]
+ %tmp12 = getelementptr [4 x i8]* @some_idx, i32 0, i32 %tmp6 ; <i8*> [#uses=1]
+ %tmp13 = load i8* %tmp12, align 1 ; <i8> [#uses=1]
+ %tmp1314 = zext i8 %tmp13 to i32 ; <i32> [#uses=1]
+ %tmp151 = lshr i32 %tmp910, %tmp1314 ; <i32> [#uses=1]
+ %tmp1516 = trunc i32 %tmp151 to i8 ; <i8> [#uses=1]
+ %tmp18 = getelementptr %struct.FooBar* %up, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp19 = load i8* %tmp18, align 1 ; <i8> [#uses=1]
+ %tmp22 = and i8 %tmp1516, %tmp19 ; <i8> [#uses=1]
+ %tmp24 = getelementptr %struct.FooBar* %up, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp25 = load i8* %tmp24, align 1 ; <i8> [#uses=1]
+ %tmp26.mask = and i8 %tmp25, 1 ; <i8> [#uses=1]
+ %toBool = icmp eq i8 %tmp26.mask, 0 ; <i1> [#uses=1]
+ %toBool.not = xor i1 %toBool, true ; <i1> [#uses=1]
+ %toBool33 = icmp eq i8 %intra_flag, 0 ; <i1> [#uses=1]
+ %bothcond = or i1 %toBool.not, %toBool33 ; <i1> [#uses=1]
+ %iftmp.1.0 = select i1 %bothcond, i8 0, i8 1 ; <i8> [#uses=1]
+ %tmp40 = or i8 %tmp22, %iftmp.1.0 ; <i8> [#uses=1]
+ %tmp432 = and i8 %tmp40, 1 ; <i8> [#uses=1]
+ ret i8 %tmp432
+}
diff --git a/test/Transforms/InstCombine/zext.ll b/test/Transforms/InstCombine/zext.ll
new file mode 100644
index 0000000..10eabf7
--- /dev/null
+++ b/test/Transforms/InstCombine/zext.ll
@@ -0,0 +1,11 @@
+; Tests to make sure elimination of casts is working correctly
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i64 @test_sext_zext(i16 %A) {
+ %c1 = zext i16 %A to i32 ; <i32> [#uses=1]
+ %c2 = sext i32 %c1 to i64 ; <i64> [#uses=1]
+ ret i64 %c2
+; CHECK-NOT: %c1
+; CHECK: %c2 = zext i16 %A to i64
+; CHECK: ret i64 %c2
+}
diff --git a/test/Transforms/Internalize/2008-05-09-AllButMain.ll b/test/Transforms/Internalize/2008-05-09-AllButMain.ll
new file mode 100644
index 0000000..a85e834
--- /dev/null
+++ b/test/Transforms/Internalize/2008-05-09-AllButMain.ll
@@ -0,0 +1,27 @@
+; No arguments means internalize all but main
+; RUN: opt < %s -internalize -S | grep internal | count 4
+; Internalize all but foo and j
+; RUN: opt < %s -internalize -internalize-public-api-list foo -internalize-public-api-list j -S | grep internal | count 3
+; Non existent files should be treated as if they were empty (so internalize all but main)
+; RUN: opt < %s -internalize -internalize-public-api-file /nonexistent/file 2> /dev/null -S | grep internal | count 4
+; RUN: opt < %s -internalize -internalize-public-api-list bar -internalize-public-api-list foo -internalize-public-api-file /nonexistent/file 2> /dev/null -S | grep internal | count 3
+; -file and -list options should be merged, the .apifile contains foo and j
+; RUN: opt < %s -internalize -internalize-public-api-list bar -internalize-public-api-file %s.apifile -S | grep internal | count 2
+
+@i = weak global i32 0 ; <i32*> [#uses=0]
+@j = weak global i32 0 ; <i32*> [#uses=0]
+
+define void @main(...) {
+entry:
+ ret void
+}
+
+define void @foo(...) {
+entry:
+ ret void
+}
+
+define void @bar(...) {
+entry:
+ ret void
+}
diff --git a/test/Transforms/Internalize/2008-05-09-AllButMain.ll.apifile b/test/Transforms/Internalize/2008-05-09-AllButMain.ll.apifile
new file mode 100644
index 0000000..f6c58b8
--- /dev/null
+++ b/test/Transforms/Internalize/2008-05-09-AllButMain.ll.apifile
@@ -0,0 +1,2 @@
+foo
+j
diff --git a/test/Transforms/Internalize/2009-01-05-InternalizeAliases.ll b/test/Transforms/Internalize/2009-01-05-InternalizeAliases.ll
new file mode 100644
index 0000000..7b18a04
--- /dev/null
+++ b/test/Transforms/Internalize/2009-01-05-InternalizeAliases.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -internalize -S | grep internal | count 3
+
+@A = global i32 0
+@B = alias i32* @A
+@C = alias i32* @B
+
+define i32 @main() {
+ %tmp = load i32* @C
+ ret i32 %tmp
+}
diff --git a/test/Transforms/Internalize/dg.exp b/test/Transforms/Internalize/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/Internalize/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/JumpThreading/2008-11-27-EntryMunge.ll b/test/Transforms/JumpThreading/2008-11-27-EntryMunge.ll
new file mode 100644
index 0000000..b5d1065
--- /dev/null
+++ b/test/Transforms/JumpThreading/2008-11-27-EntryMunge.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -jump-threading -S | grep {ret i32 0}
+; PR3138
+
+define i32 @jt() {
+entry:
+ br i1 true, label %bb3, label %bb
+
+bb: ; preds = %entry
+ unreachable
+
+bb3: ; preds = %entry
+ ret i32 0
+}
diff --git a/test/Transforms/JumpThreading/and-and-cond.ll b/test/Transforms/JumpThreading/and-and-cond.ll
new file mode 100644
index 0000000..e6db9ee
--- /dev/null
+++ b/test/Transforms/JumpThreading/and-and-cond.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1}
+; There should be no uncond branches left.
+; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label}
+
+declare i32 @f1()
+declare i32 @f2()
+declare void @f3()
+
+define i32 @test(i1 %cond, i1 %cond2, i1 %cond3) {
+ br i1 %cond, label %T1, label %F1
+
+T1:
+ %v1 = call i32 @f1()
+ br label %Merge
+
+F1:
+ %v2 = call i32 @f2()
+ br label %Merge
+
+Merge:
+ %A = phi i1 [true, %T1], [false, %F1]
+ %B = phi i32 [%v1, %T1], [%v2, %F1]
+ %C = and i1 %A, %cond2
+ %D = and i1 %C, %cond3
+ br i1 %D, label %T2, label %F2
+
+T2:
+ call void @f3()
+ ret i32 %B
+
+F2:
+ ret i32 %B
+}
diff --git a/test/Transforms/JumpThreading/and-cond.ll b/test/Transforms/JumpThreading/and-cond.ll
new file mode 100644
index 0000000..58dbec7
--- /dev/null
+++ b/test/Transforms/JumpThreading/and-cond.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1}
+; There should be no uncond branches left.
+; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label}
+
+declare i32 @f1()
+declare i32 @f2()
+declare void @f3()
+
+define i32 @test(i1 %cond, i1 %cond2) {
+ br i1 %cond, label %T1, label %F1
+
+T1:
+ %v1 = call i32 @f1()
+ br label %Merge
+
+F1:
+ %v2 = call i32 @f2()
+ br label %Merge
+
+Merge:
+ %A = phi i1 [true, %T1], [false, %F1]
+ %B = phi i32 [%v1, %T1], [%v2, %F1]
+ %C = and i1 %A, %cond2
+ br i1 %C, label %T2, label %F2
+
+T2:
+ call void @f3()
+ ret i32 %B
+
+F2:
+ ret i32 %B
+}
diff --git a/test/Transforms/JumpThreading/basic.ll b/test/Transforms/JumpThreading/basic.ll
new file mode 100644
index 0000000..503d301
--- /dev/null
+++ b/test/Transforms/JumpThreading/basic.ll
@@ -0,0 +1,418 @@
+; RUN: opt %s -jump-threading -S -enable-jump-threading-lvi | FileCheck %s
+
+declare i32 @f1()
+declare i32 @f2()
+declare void @f3()
+
+define i32 @test1(i1 %cond) {
+; CHECK: @test1
+
+ br i1 %cond, label %T1, label %F1
+
+T1:
+ %v1 = call i32 @f1()
+ br label %Merge
+
+F1:
+ %v2 = call i32 @f2()
+ br label %Merge
+
+Merge:
+ %A = phi i1 [true, %T1], [false, %F1]
+ %B = phi i32 [%v1, %T1], [%v2, %F1]
+ br i1 %A, label %T2, label %F2
+
+T2:
+; CHECK: T2:
+; CHECK: ret i32 %v1
+ call void @f3()
+ ret i32 %B
+
+F2:
+; CHECK: F2:
+; CHECK: ret i32 %v2
+ ret i32 %B
+}
+
+
+;; cond is known false on Entry -> F1 edge!
+define i32 @test2(i1 %cond) {
+; CHECK: @test2
+Entry:
+ br i1 %cond, label %T1, label %F1
+
+T1:
+; CHECK: %v1 = call i32 @f1()
+; CHECK: ret i32 47
+ %v1 = call i32 @f1()
+ br label %Merge
+
+F1:
+ br i1 %cond, label %Merge, label %F2
+
+Merge:
+ %B = phi i32 [47, %T1], [192, %F1]
+ ret i32 %B
+
+F2:
+ call void @f3()
+ ret i32 12
+}
+
+
+; Undef handling.
+define i32 @test3(i1 %cond) {
+; CHECK: @test3
+; CHECK-NEXT: T1:
+; CHECK-NEXT: ret i32 42
+ br i1 undef, label %T1, label %F1
+
+T1:
+ ret i32 42
+
+F1:
+ ret i32 17
+}
+
+define i32 @test4(i1 %cond, i1 %cond2) {
+; CHECK: @test4
+
+ br i1 %cond, label %T1, label %F1
+
+T1:
+; CHECK: %v1 = call i32 @f1()
+; CHECK-NEXT: br label %T
+
+ %v1 = call i32 @f1()
+ br label %Merge
+
+F1:
+ %v2 = call i32 @f2()
+; CHECK: %v2 = call i32 @f2()
+; CHECK-NEXT: br i1 %cond2,
+ br label %Merge
+
+Merge:
+ %A = phi i1 [undef, %T1], [%cond2, %F1]
+ %B = phi i32 [%v1, %T1], [%v2, %F1]
+ br i1 %A, label %T2, label %F2
+
+T2:
+ call void @f3()
+ ret i32 %B
+
+F2:
+ ret i32 %B
+}
+
+
+;; This tests that the branch in 'merge' can be cloned up into T1.
+define i32 @test5(i1 %cond, i1 %cond2) {
+; CHECK: @test5
+
+ br i1 %cond, label %T1, label %F1
+
+T1:
+; CHECK: T1:
+; CHECK-NEXT: %v1 = call i32 @f1()
+; CHECK-NEXT: %cond3 = icmp eq i32 %v1, 412
+; CHECK-NEXT: br i1 %cond3, label %T2, label %F2
+
+ %v1 = call i32 @f1()
+ %cond3 = icmp eq i32 %v1, 412
+ br label %Merge
+
+F1:
+ %v2 = call i32 @f2()
+ br label %Merge
+
+Merge:
+ %A = phi i1 [%cond3, %T1], [%cond2, %F1]
+ %B = phi i32 [%v1, %T1], [%v2, %F1]
+ br i1 %A, label %T2, label %F2
+
+T2:
+ call void @f3()
+ ret i32 %B
+
+F2:
+ ret i32 %B
+}
+
+
+;; Lexically duplicated conditionals should be threaded.
+
+
+define i32 @test6(i32 %A) {
+; CHECK: @test6
+ %tmp455 = icmp eq i32 %A, 42
+ br i1 %tmp455, label %BB1, label %BB2
+
+BB2:
+; CHECK: call i32 @f1()
+; CHECK-NEXT: call void @f3()
+; CHECK-NEXT: ret i32 4
+ call i32 @f1()
+ br label %BB1
+
+
+BB1:
+ %tmp459 = icmp eq i32 %A, 42
+ br i1 %tmp459, label %BB3, label %BB4
+
+BB3:
+ call i32 @f2()
+ ret i32 3
+
+BB4:
+ call void @f3()
+ ret i32 4
+}
+
+
+;; This tests that the branch in 'merge' can be cloned up into T1.
+;; rdar://7367025
+define i32 @test7(i1 %cond, i1 %cond2) {
+Entry:
+; CHECK: @test7
+ %v1 = call i32 @f1()
+ br i1 %cond, label %Merge, label %F1
+
+F1:
+ %v2 = call i32 @f2()
+ br label %Merge
+
+Merge:
+ %B = phi i32 [%v1, %Entry], [%v2, %F1]
+ %M = icmp ne i32 %B, %v1
+ %N = icmp eq i32 %B, 47
+ %O = and i1 %M, %N
+ br i1 %O, label %T2, label %F2
+
+; CHECK: Merge:
+; CHECK-NOT: phi
+; CHECK-NEXT: %v2 = call i32 @f2()
+
+T2:
+ call void @f3()
+ ret i32 %B
+
+F2:
+ ret i32 %B
+; CHECK: F2:
+; CHECK-NEXT: phi i32
+}
+
+
+declare i1 @test8a()
+
+define i32 @test8b(i1 %cond, i1 %cond2) {
+; CHECK: @test8b
+T0:
+ %A = call i1 @test8a()
+ br i1 %A, label %T1, label %F1
+
+; CHECK: T0:
+; CHECK-NEXT: call
+; CHECK-NEXT: br i1 %A, label %T1, label %Y
+
+T1:
+ %B = call i1 @test8a()
+ br i1 %B, label %T2, label %F1
+
+; CHECK: T1:
+; CHECK-NEXT: call
+; CHECK-NEXT: br i1 %B, label %T2, label %Y
+T2:
+ %C = call i1 @test8a()
+ br i1 %cond, label %T3, label %F1
+
+; CHECK: T2:
+; CHECK-NEXT: call
+; CHECK-NEXT: br i1 %cond, label %T3, label %Y
+T3:
+ ret i32 0
+
+F1:
+ %D = phi i32 [0, %T0], [0, %T1], [1, %T2]
+ %E = icmp eq i32 %D, 1
+ %F = and i1 %E, %cond
+ br i1 %F, label %X, label %Y
+X:
+ call i1 @test8a()
+ ret i32 1
+Y:
+ ret i32 2
+}
+
+
+;;; Verify that we can handle constraint propagation through "xor x, 1".
+define i32 @test9(i1 %cond, i1 %cond2) {
+Entry:
+; CHECK: @test9
+ %v1 = call i32 @f1()
+ br i1 %cond, label %Merge, label %F1
+
+; CHECK: Entry:
+; CHECK-NEXT: %v1 = call i32 @f1()
+; CHECK-NEXT: br i1 %cond, label %F2, label %Merge
+
+F1:
+ %v2 = call i32 @f2()
+ br label %Merge
+
+Merge:
+ %B = phi i32 [%v1, %Entry], [%v2, %F1]
+ %M = icmp eq i32 %B, %v1
+ %M1 = xor i1 %M, 1
+ %N = icmp eq i32 %B, 47
+ %O = and i1 %M1, %N
+ br i1 %O, label %T2, label %F2
+
+; CHECK: Merge:
+; CHECK-NOT: phi
+; CHECK-NEXT: %v2 = call i32 @f2()
+
+T2:
+ %Q = zext i1 %M to i32
+ ret i32 %Q
+
+F2:
+ ret i32 %B
+; CHECK: F2:
+; CHECK-NEXT: phi i32
+}
+
+
+
+; CHECK: @test10
+declare i32 @test10f1()
+declare i32 @test10f2()
+declare void @test10f3()
+
+;; Non-local condition threading.
+define i32 @test10g(i1 %cond) {
+; CHECK: @test10g
+; CHECK-NEXT: br i1 %cond, label %T2, label %F2
+ br i1 %cond, label %T1, label %F1
+
+T1:
+ %v1 = call i32 @test10f1()
+ br label %Merge
+
+; CHECK: %v1 = call i32 @test10f1()
+; CHECK-NEXT: call void @f3()
+; CHECK-NEXT: ret i32 %v1
+
+F1:
+ %v2 = call i32 @test10f2()
+ br label %Merge
+
+Merge:
+ %B = phi i32 [%v1, %T1], [%v2, %F1]
+ br i1 %cond, label %T2, label %F2
+
+T2:
+ call void @f3()
+ ret i32 %B
+
+F2:
+ ret i32 %B
+}
+
+
+; Impossible conditional constraints should get threaded. BB3 is dead here.
+define i32 @test11(i32 %A) {
+; CHECK: @test11
+; CHECK-NEXT: icmp
+; CHECK-NEXT: br i1 %tmp455, label %BB4, label %BB2
+ %tmp455 = icmp eq i32 %A, 42
+ br i1 %tmp455, label %BB1, label %BB2
+
+BB2:
+; CHECK: call i32 @f1()
+; CHECK-NEXT: ret i32 %C
+ %C = call i32 @f1()
+ ret i32 %C
+
+
+BB1:
+ %tmp459 = icmp eq i32 %A, 43
+ br i1 %tmp459, label %BB3, label %BB4
+
+BB3:
+ call i32 @f2()
+ ret i32 3
+
+BB4:
+ call void @f3()
+ ret i32 4
+}
+
+;; Correlated value through boolean expression. GCC PR18046.
+define void @test12(i32 %A) {
+; CHECK: @test12
+entry:
+ %cond = icmp eq i32 %A, 0
+ br i1 %cond, label %bb, label %bb1
+; Should branch to the return block instead of through BB1.
+; CHECK: entry:
+; CHECK-NEXT: %cond = icmp eq i32 %A, 0
+; CHECK-NEXT: br i1 %cond, label %bb1, label %return
+
+bb:
+ %B = call i32 @test10f2()
+ br label %bb1
+
+bb1:
+ %C = phi i32 [ %A, %entry ], [ %B, %bb ]
+ %cond4 = icmp eq i32 %C, 0
+ br i1 %cond4, label %bb2, label %return
+
+; CHECK: bb1:
+; CHECK-NEXT: %B = call i32 @test10f2()
+; CHECK-NEXT: %cond4 = icmp eq i32 %B, 0
+; CHECK-NEXT: br i1 %cond4, label %bb2, label %return
+
+bb2:
+ %D = call i32 @test10f2()
+ ret void
+
+return:
+ ret void
+}
+
+
+;; Duplicate condition to avoid xor of cond.
+;; rdar://7391699
+define i32 @test13(i1 %cond, i1 %cond2) {
+Entry:
+; CHECK: @test13
+ %v1 = call i32 @f1()
+ br i1 %cond, label %Merge, label %F1
+
+F1:
+ br label %Merge
+
+Merge:
+ %B = phi i1 [true, %Entry], [%cond2, %F1]
+ %C = phi i32 [192, %Entry], [%v1, %F1]
+ %M = icmp eq i32 %C, 192
+ %N = xor i1 %B, %M
+ br i1 %N, label %T2, label %F2
+
+T2:
+ ret i32 123
+
+F2:
+ ret i32 %v1
+
+; CHECK: br i1 %cond, label %F2, label %Merge
+
+; CHECK: Merge:
+; CHECK-NEXT: %M = icmp eq i32 %v1, 192
+; CHECK-NEXT: %N = xor i1 %cond2, %M
+; CHECK-NEXT: br i1 %N, label %T2, label %F2
+}
+
+
diff --git a/test/Transforms/JumpThreading/branch-no-const.ll b/test/Transforms/JumpThreading/branch-no-const.ll
new file mode 100644
index 0000000..16867b0
--- /dev/null
+++ b/test/Transforms/JumpThreading/branch-no-const.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -jump-threading -S | not grep phi
+
+declare i8 @mcguffin()
+
+define i32 @test(i1 %foo, i8 %b) {
+entry:
+ %a = call i8 @mcguffin()
+ br i1 %foo, label %bb1, label %bb2
+bb1:
+ br label %jt
+bb2:
+ br label %jt
+jt:
+ %x = phi i8 [%a, %bb1], [%b, %bb2]
+ %A = icmp eq i8 %x, %a
+ br i1 %A, label %rt, label %rf
+rt:
+ ret i32 7
+rf:
+ ret i32 8
+}
diff --git a/test/Transforms/JumpThreading/compare.ll b/test/Transforms/JumpThreading/compare.ll
new file mode 100644
index 0000000..581785c
--- /dev/null
+++ b/test/Transforms/JumpThreading/compare.ll
@@ -0,0 +1,30 @@
+; There should be no phi nodes left.
+; RUN: opt < %s -jump-threading -S | not grep {phi i32}
+
+declare i32 @f1()
+declare i32 @f2()
+declare void @f3()
+
+define i32 @test(i1 %cond) {
+ br i1 %cond, label %T1, label %F1
+
+T1:
+ %v1 = call i32 @f1()
+ br label %Merge
+
+F1:
+ %v2 = call i32 @f2()
+ br label %Merge
+
+Merge:
+ %B = phi i32 [%v1, %T1], [12, %F1]
+ %A = icmp ne i32 %B, 42
+ br i1 %A, label %T2, label %F2
+
+T2:
+ call void @f3()
+ ret i32 1
+
+F2:
+ ret i32 0
+}
diff --git a/test/Transforms/JumpThreading/crash.ll b/test/Transforms/JumpThreading/crash.ll
new file mode 100644
index 0000000..cf292df
--- /dev/null
+++ b/test/Transforms/JumpThreading/crash.ll
@@ -0,0 +1,315 @@
+; RUN: opt < %s -jump-threading -disable-output
+; PR2285
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.system__secondary_stack__mark_id = type { i64, i64 }
+
+define void @_ada_c35507b() {
+entry:
+ br label %bb
+
+bb: ; preds = %bb13, %entry
+ %ch.0 = phi i8 [ 0, %entry ], [ 0, %bb13 ] ; <i8> [#uses=1]
+ %tmp11 = icmp ugt i8 %ch.0, 31 ; <i1> [#uses=1]
+ %tmp120 = call %struct.system__secondary_stack__mark_id @system__secondary_stack__ss_mark( ) ; <%struct.system__secondary_stack__mark_id> [#uses=1]
+ br i1 %tmp11, label %bb110, label %bb13
+
+bb13: ; preds = %bb
+ br label %bb
+
+bb110: ; preds = %bb
+ %mrv_gr124 = getresult %struct.system__secondary_stack__mark_id %tmp120, 1 ; <i64> [#uses=0]
+ unreachable
+}
+
+declare %struct.system__secondary_stack__mark_id @system__secondary_stack__ss_mark()
+
+
+
+define fastcc void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind ssp {
+entry:
+ br label %bb12
+
+bb6.us:
+ %tmp = icmp eq i32 undef, undef
+ %tmp1 = fsub double undef, undef
+ %tmp2 = fcmp ult double %tmp1, 0.000000e+00
+ br i1 %tmp, label %bb6.us, label %bb13
+
+
+bb12:
+ %tmp3 = fcmp ult double undef, 0.000000e+00
+ br label %bb13
+
+bb13:
+ %.lcssa31 = phi double [ undef, %bb12 ], [ %tmp1, %bb6.us ]
+ %.lcssa30 = phi i1 [ %tmp3, %bb12 ], [ %tmp2, %bb6.us ]
+ br i1 %.lcssa30, label %bb15, label %bb61
+
+bb15:
+ %tmp4 = fsub double -0.000000e+00, %.lcssa31
+ ret void
+
+
+bb61:
+ ret void
+}
+
+
+; PR5258
+define i32 @test(i1 %cond, i1 %cond2, i32 %a) {
+A:
+ br i1 %cond, label %F, label %A1
+F:
+ br label %A1
+
+A1:
+ %d = phi i1 [false, %A], [true, %F]
+ %e = add i32 %a, %a
+ br i1 %d, label %B, label %G
+
+G:
+ br i1 %cond2, label %B, label %D
+
+B:
+ %f = phi i32 [%e, %G], [%e, %A1]
+ %b = add i32 0, 0
+ switch i32 %a, label %C [
+ i32 7, label %D
+ i32 8, label %D
+ i32 9, label %D
+ ]
+
+C:
+ br label %D
+
+D:
+ %c = phi i32 [%e, %B], [%e, %B], [%e, %B], [%f, %C], [%e, %G]
+ ret i32 %c
+E:
+ ret i32 412
+}
+
+
+define i32 @test2() nounwind {
+entry:
+ br i1 true, label %decDivideOp.exit, label %bb7.i
+
+bb7.i: ; preds = %bb7.i, %entry
+ br label %bb7.i
+
+decDivideOp.exit: ; preds = %entry
+ ret i32 undef
+}
+
+
+; PR3298
+
+define i32 @test3(i32 %p_79, i32 %p_80) nounwind {
+entry:
+ br label %bb7
+
+bb1: ; preds = %bb2
+ br label %bb2
+
+bb2: ; preds = %bb7, %bb1
+ %l_82.0 = phi i8 [ 0, %bb1 ], [ %l_82.1, %bb7 ] ; <i8> [#uses=3]
+ br i1 true, label %bb3, label %bb1
+
+bb3: ; preds = %bb2
+ %0 = icmp eq i32 %p_80_addr.1, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb7, label %bb6
+
+bb5: ; preds = %bb6
+ %1 = icmp eq i8 %l_82.0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb1.i, label %bb.i
+
+bb.i: ; preds = %bb5
+ br label %safe_div_func_char_s_s.exit
+
+bb1.i: ; preds = %bb5
+ br label %safe_div_func_char_s_s.exit
+
+safe_div_func_char_s_s.exit: ; preds = %bb1.i, %bb.i
+ br label %bb6
+
+bb6: ; preds = %safe_div_func_char_s_s.exit, %bb3
+ %p_80_addr.0 = phi i32 [ %p_80_addr.1, %bb3 ], [ 1, %safe_div_func_char_s_s.exit ] ; <i32> [#uses=2]
+ %2 = icmp eq i32 %p_80_addr.0, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb7, label %bb5
+
+bb7: ; preds = %bb6, %bb3, %entry
+ %l_82.1 = phi i8 [ 1, %entry ], [ %l_82.0, %bb3 ], [ %l_82.0, %bb6 ] ; <i8> [#uses=2]
+ %p_80_addr.1 = phi i32 [ 0, %entry ], [ %p_80_addr.1, %bb3 ], [ %p_80_addr.0, %bb6 ] ; <i32> [#uses=4]
+ %3 = icmp eq i32 %p_80_addr.1, 0 ; <i1> [#uses=1]
+ br i1 %3, label %bb8, label %bb2
+
+bb8: ; preds = %bb7
+ %4 = sext i8 %l_82.1 to i32 ; <i32> [#uses=0]
+ ret i32 0
+}
+
+
+; PR3353
+
+define i32 @test4(i8 %X) {
+entry:
+ %Y = add i8 %X, 1
+ %Z = add i8 %Y, 1
+ br label %bb33.i
+
+bb33.i: ; preds = %bb33.i, %bb32.i
+ switch i8 %Y, label %bb32.i [
+ i8 39, label %bb35.split.i
+ i8 13, label %bb33.i
+ ]
+
+bb35.split.i:
+ ret i32 5
+bb32.i:
+ ret i32 1
+}
+
+
+define fastcc void @test5(i1 %tmp, i32 %tmp1) nounwind ssp {
+entry:
+ br i1 %tmp, label %bb12, label %bb13
+
+
+bb12:
+ br label %bb13
+
+bb13:
+ %.lcssa31 = phi i32 [ undef, %bb12 ], [ %tmp1, %entry ]
+ %A = and i1 undef, undef
+ br i1 %A, label %bb15, label %bb61
+
+bb15:
+ ret void
+
+
+bb61:
+ ret void
+}
+
+
+; PR5640
+define fastcc void @test6(i1 %tmp, i1 %tmp1) nounwind ssp {
+entry:
+ br i1 %tmp, label %bb12, label %bb14
+
+bb12:
+ br label %bb14
+
+bb14:
+ %A = phi i1 [ %A, %bb13 ], [ true, %bb12 ], [%tmp1, %entry]
+ br label %bb13
+
+bb13:
+ br i1 %A, label %bb14, label %bb61
+
+
+bb61:
+ ret void
+}
+
+
+; PR5698
+define void @test7(i32 %x) {
+tailrecurse:
+ switch i32 %x, label %return [
+ i32 2, label %bb2
+ i32 3, label %bb
+ ]
+
+bb:
+ switch i32 %x, label %return [
+ i32 2, label %bb2
+ i32 3, label %tailrecurse
+ ]
+
+bb2:
+ ret void
+
+return:
+ ret void
+}
+
+; PR6119
+define i32 @test8(i32 %action) nounwind {
+entry:
+ switch i32 %action, label %lor.rhs [
+ i32 1, label %if.then
+ i32 0, label %lor.end
+ ]
+
+if.then: ; preds = %for.cond, %lor.end, %entry
+ ret i32 undef
+
+lor.rhs: ; preds = %entry
+ br label %lor.end
+
+lor.end: ; preds = %lor.rhs, %entry
+ %cmp103 = xor i1 undef, undef ; <i1> [#uses=1]
+ br i1 %cmp103, label %for.cond, label %if.then
+
+for.cond: ; preds = %for.body, %lor.end
+ br i1 undef, label %if.then, label %for.body
+
+for.body: ; preds = %for.cond
+ br label %for.cond
+}
+
+; PR6119
+define i32 @test9(i32 %action) nounwind {
+entry:
+ switch i32 %action, label %lor.rhs [
+ i32 1, label %if.then
+ i32 0, label %lor.end
+ ]
+
+if.then: ; preds = %for.cond, %lor.end, %entry
+ ret i32 undef
+
+lor.rhs: ; preds = %entry
+ br label %lor.end
+
+lor.end: ; preds = %lor.rhs, %entry
+ %0 = phi i1 [ undef, %lor.rhs ], [ true, %entry ] ; <i1> [#uses=1]
+ %cmp103 = xor i1 undef, %0 ; <i1> [#uses=1]
+ br i1 %cmp103, label %for.cond, label %if.then
+
+for.cond: ; preds = %for.body, %lor.end
+ br i1 undef, label %if.then, label %for.body
+
+for.body: ; preds = %for.cond
+ br label %for.cond
+}
+
+; PR6119
+define i32 @test10(i32 %action, i32 %type) nounwind {
+entry:
+ %cmp2 = icmp eq i32 %type, 0 ; <i1> [#uses=1]
+ switch i32 %action, label %lor.rhs [
+ i32 1, label %if.then
+ i32 0, label %lor.end
+ ]
+
+if.then: ; preds = %for.cond, %lor.end, %entry
+ ret i32 undef
+
+lor.rhs: ; preds = %entry
+ %cmp101 = icmp eq i32 %action, 2 ; <i1> [#uses=1]
+ br label %lor.end
+
+lor.end: ; preds = %lor.rhs, %entry
+ %0 = phi i1 [ %cmp101, %lor.rhs ], [ true, %entry ] ; <i1> [#uses=1]
+ %cmp103 = xor i1 %cmp2, %0 ; <i1> [#uses=1]
+ br i1 %cmp103, label %for.cond, label %if.then
+
+for.cond: ; preds = %for.body, %lor.end
+ br i1 undef, label %if.then, label %for.body
+
+for.body: ; preds = %for.cond
+ br label %for.cond
+}
diff --git a/test/Transforms/JumpThreading/dg.exp b/test/Transforms/JumpThreading/dg.exp
new file mode 100644
index 0000000..de42dad
--- /dev/null
+++ b/test/Transforms/JumpThreading/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.ll]]
diff --git a/test/Transforms/JumpThreading/no-irreducible-loops.ll b/test/Transforms/JumpThreading/no-irreducible-loops.ll
new file mode 100644
index 0000000..97276b03
--- /dev/null
+++ b/test/Transforms/JumpThreading/no-irreducible-loops.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -jump-threading -loop-rotate -instcombine -indvars -loop-unroll -simplifycfg -S -verify-dom-info -verify-loop-info > %t
+; RUN: grep {volatile store} %t | count 3
+; RUN: not grep {br label} %t
+
+; Jump threading should not prevent this loop from being unrolled.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+@v1 = external global i32 ; <i32*> [#uses=2]
+
+define i32 @unroll() nounwind {
+entry:
+ br label %bb4
+
+bb: ; preds = %bb4
+ %0 = icmp eq i32 %i.0, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb1, label %bb2
+
+bb1: ; preds = %bb
+ volatile store i32 1000, i32* @v1, align 4
+ br label %bb3
+
+bb2: ; preds = %bb
+ volatile store i32 1001, i32* @v1, align 4
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %1 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %bb4
+
+bb4: ; preds = %bb3, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %1, %bb3 ] ; <i32> [#uses=3]
+ %2 = icmp sgt i32 %i.0, 2 ; <i1> [#uses=1]
+ br i1 %2, label %bb5, label %bb
+
+bb5: ; preds = %bb4
+ ret i32 0
+}
diff --git a/test/Transforms/JumpThreading/thread-loads.ll b/test/Transforms/JumpThreading/thread-loads.ll
new file mode 100644
index 0000000..96ba701
--- /dev/null
+++ b/test/Transforms/JumpThreading/thread-loads.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -jump-threading -simplifycfg -S | grep {ret i32 1}
+; rdar://6402033
+
+; Test that we can thread through the block with the partially redundant load (%2).
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i32 @foo(i32* %P) nounwind {
+entry:
+ %0 = tail call i32 (...)* @f1() nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb1, label %bb
+
+bb: ; preds = %entry
+ store i32 42, i32* %P, align 4
+ br label %bb1
+
+bb1: ; preds = %entry, %bb
+ %res.0 = phi i32 [ 1, %bb ], [ 0, %entry ] ; <i32> [#uses=2]
+ %2 = load i32* %P, align 4 ; <i32> [#uses=1]
+ %3 = icmp sgt i32 %2, 36 ; <i1> [#uses=1]
+ br i1 %3, label %bb3, label %bb2
+
+bb2: ; preds = %bb1
+ %4 = tail call i32 (...)* @f2() nounwind ; <i32> [#uses=0]
+ ret i32 %res.0
+
+bb3: ; preds = %bb1
+ ret i32 %res.0
+}
+
+declare i32 @f1(...)
+
+declare i32 @f2(...)
diff --git a/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll b/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll
new file mode 100644
index 0000000..7545641
--- /dev/null
+++ b/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -lcssa -S | \
+; RUN: grep {%%SJE.0.0.lcssa = phi .struct.SetJmpMapEntry}
+; RUN: opt < %s -lcssa -S | \
+; RUN: grep {%%SJE.0.0.lcssa1 = phi .struct.SetJmpMapEntry}
+
+ %struct.SetJmpMapEntry = type { i8*, i32, %struct.SetJmpMapEntry* }
+
+define void @__llvm_sjljeh_try_catching_longjmp_exception() {
+entry:
+ br i1 false, label %UnifiedReturnBlock, label %no_exit
+no_exit: ; preds = %endif, %entry
+ %SJE.0.0 = phi %struct.SetJmpMapEntry* [ %tmp.24, %endif ], [ null, %entry ] ; <%struct.SetJmpMapEntry*> [#uses=1]
+ br i1 false, label %then, label %endif
+then: ; preds = %no_exit
+ %tmp.20 = getelementptr %struct.SetJmpMapEntry* %SJE.0.0, i32 0, i32 1 ; <i32*> [#uses=0]
+ ret void
+endif: ; preds = %no_exit
+ %tmp.24 = load %struct.SetJmpMapEntry** null ; <%struct.SetJmpMapEntry*> [#uses=1]
+ br i1 false, label %UnifiedReturnBlock, label %no_exit
+UnifiedReturnBlock: ; preds = %endif, %entry
+ ret void
+}
+
diff --git a/test/Transforms/LCSSA/2006-06-12-MultipleExitsSameBlock.ll b/test/Transforms/LCSSA/2006-06-12-MultipleExitsSameBlock.ll
new file mode 100644
index 0000000..ad4f144
--- /dev/null
+++ b/test/Transforms/LCSSA/2006-06-12-MultipleExitsSameBlock.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -lcssa -S | \
+; RUN: grep {%X.1.lcssa}
+; RUN: opt < %s -lcssa -S | \
+; RUN: not grep {%X.1.lcssa1}
+
+declare i1 @c1()
+
+declare i1 @c2()
+
+define i32 @foo() {
+entry:
+ br label %loop_begin
+loop_begin: ; preds = %loop_body.2, %entry
+ br i1 true, label %loop_body.1, label %loop_exit2
+loop_body.1: ; preds = %loop_begin
+ %X.1 = add i32 0, 1 ; <i32> [#uses=1]
+ %rel.1 = call i1 @c1( ) ; <i1> [#uses=1]
+ br i1 %rel.1, label %loop_exit, label %loop_body.2
+loop_body.2: ; preds = %loop_body.1
+ %rel.2 = call i1 @c2( ) ; <i1> [#uses=1]
+ br i1 %rel.2, label %loop_exit, label %loop_begin
+loop_exit: ; preds = %loop_body.2, %loop_body.1
+ ret i32 %X.1
+loop_exit2: ; preds = %loop_begin
+ ret i32 1
+}
+
diff --git a/test/Transforms/LCSSA/2006-07-09-NoDominator.ll b/test/Transforms/LCSSA/2006-07-09-NoDominator.ll
new file mode 100644
index 0000000..b03f09a
--- /dev/null
+++ b/test/Transforms/LCSSA/2006-07-09-NoDominator.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -lcssa
+
+ %struct.SetJmpMapEntry = type { i8*, i32, %struct.SetJmpMapEntry* }
+
+define void @__llvm_sjljeh_try_catching_longjmp_exception() {
+entry:
+ br label %loopentry
+loopentry: ; preds = %endif, %entry
+ %SJE.0 = phi %struct.SetJmpMapEntry* [ null, %entry ], [ %tmp.25, %endif ] ; <%struct.SetJmpMapEntry*> [#uses=1]
+ br i1 false, label %no_exit, label %loopexit
+no_exit: ; preds = %loopentry
+ br i1 false, label %then, label %endif
+then: ; preds = %no_exit
+ %tmp.21 = getelementptr %struct.SetJmpMapEntry* %SJE.0, i32 0, i32 1 ; <i32*> [#uses=0]
+ br label %return
+endif: ; preds = %no_exit
+ %tmp.25 = load %struct.SetJmpMapEntry** null ; <%struct.SetJmpMapEntry*> [#uses=1]
+ br label %loopentry
+loopexit: ; preds = %loopentry
+ br label %return
+return: ; preds = %loopexit, %then
+ ret void
+}
+
diff --git a/test/Transforms/LCSSA/2006-10-31-UnreachableBlock-2.ll b/test/Transforms/LCSSA/2006-10-31-UnreachableBlock-2.ll
new file mode 100644
index 0000000..3ba8d18
--- /dev/null
+++ b/test/Transforms/LCSSA/2006-10-31-UnreachableBlock-2.ll
@@ -0,0 +1,145 @@
+; RUN: opt < %s -lcssa -disable-output -verify-dom-info -verify-loop-info
+; PR977
+; END.
+declare i32 @opost_block()
+
+define void @write_chan() {
+entry:
+ br i1 false, label %shortcirc_next.0, label %shortcirc_done.0
+shortcirc_next.0: ; preds = %entry
+ br label %shortcirc_done.0
+shortcirc_done.0: ; preds = %shortcirc_next.0, %entry
+ br i1 false, label %shortcirc_next.1, label %shortcirc_done.1
+shortcirc_next.1: ; preds = %shortcirc_done.0
+ br label %shortcirc_done.1
+shortcirc_done.1: ; preds = %shortcirc_next.1, %shortcirc_done.0
+ br i1 false, label %then.0, label %endif.0
+then.0: ; preds = %shortcirc_done.1
+ br i1 false, label %then.1, label %endif.1
+then.1: ; preds = %then.0
+ br label %return
+after_ret.0: ; No predecessors!
+ br label %endif.1
+endif.1: ; preds = %after_ret.0, %then.0
+ br label %endif.0
+endif.0: ; preds = %endif.1, %shortcirc_done.1
+ br label %loopentry.0
+loopentry.0: ; preds = %endif.12, %endif.0
+ br i1 false, label %then.2, label %endif.2
+then.2: ; preds = %loopentry.0
+ br label %loopexit.0
+dead_block_after_break.0: ; No predecessors!
+ br label %endif.2
+endif.2: ; preds = %dead_block_after_break.0, %loopentry.0
+ br i1 false, label %shortcirc_done.2, label %shortcirc_next.2
+shortcirc_next.2: ; preds = %endif.2
+ br i1 false, label %shortcirc_next.3, label %shortcirc_done.3
+shortcirc_next.3: ; preds = %shortcirc_next.2
+ br label %shortcirc_done.3
+shortcirc_done.3: ; preds = %shortcirc_next.3, %shortcirc_next.2
+ br label %shortcirc_done.2
+shortcirc_done.2: ; preds = %shortcirc_done.3, %endif.2
+ br i1 false, label %then.3, label %endif.3
+then.3: ; preds = %shortcirc_done.2
+ br label %loopexit.0
+dead_block_after_break.1: ; No predecessors!
+ br label %endif.3
+endif.3: ; preds = %dead_block_after_break.1, %shortcirc_done.2
+ br i1 false, label %shortcirc_next.4, label %shortcirc_done.4
+shortcirc_next.4: ; preds = %endif.3
+ br label %shortcirc_done.4
+shortcirc_done.4: ; preds = %shortcirc_next.4, %endif.3
+ br i1 false, label %then.4, label %else
+then.4: ; preds = %shortcirc_done.4
+ br label %loopentry.1
+loopentry.1: ; preds = %endif.8, %then.4
+ br i1 false, label %no_exit, label %loopexit.1
+no_exit: ; preds = %loopentry.1
+ %tmp.94 = call i32 @opost_block( ) ; <i32> [#uses=1]
+ br i1 false, label %then.5, label %endif.5
+then.5: ; preds = %no_exit
+ br i1 false, label %then.6, label %endif.6
+then.6: ; preds = %then.5
+ br label %loopexit.1
+dead_block_after_break.2: ; No predecessors!
+ br label %endif.6
+endif.6: ; preds = %dead_block_after_break.2, %then.5
+ br label %break_out
+dead_block_after_goto.0: ; No predecessors!
+ br label %endif.5
+endif.5: ; preds = %dead_block_after_goto.0, %no_exit
+ br i1 false, label %then.7, label %endif.7
+then.7: ; preds = %endif.5
+ br label %loopexit.1
+dead_block_after_break.3: ; No predecessors!
+ br label %endif.7
+endif.7: ; preds = %dead_block_after_break.3, %endif.5
+ switch i32 1, label %switchexit [
+ i32 4, label %label.2
+ i32 2, label %label.1
+ i32 1, label %label.0
+ ]
+label.0: ; preds = %endif.7
+ br label %switchexit
+dead_block_after_break.4: ; No predecessors!
+ br label %label.1
+label.1: ; preds = %dead_block_after_break.4, %endif.7
+ br label %switchexit
+dead_block_after_break.5: ; No predecessors!
+ br label %label.2
+label.2: ; preds = %dead_block_after_break.5, %endif.7
+ br label %switchexit
+dead_block_after_break.6: ; No predecessors!
+ br label %switchexit
+switchexit: ; preds = %dead_block_after_break.6, %label.2, %label.1, %label.0, %endif.7
+ br i1 false, label %then.8, label %endif.8
+then.8: ; preds = %switchexit
+ br label %loopexit.1
+dead_block_after_break.7: ; No predecessors!
+ br label %endif.8
+endif.8: ; preds = %dead_block_after_break.7, %switchexit
+ br label %loopentry.1
+loopexit.1: ; preds = %then.8, %then.7, %then.6, %loopentry.1
+ br i1 false, label %then.9, label %endif.9
+then.9: ; preds = %loopexit.1
+ br label %endif.9
+endif.9: ; preds = %then.9, %loopexit.1
+ br label %endif.4
+else: ; preds = %shortcirc_done.4
+ br i1 false, label %then.10, label %endif.10
+then.10: ; preds = %else
+ br label %break_out
+dead_block_after_goto.1: ; No predecessors!
+ br label %endif.10
+endif.10: ; preds = %dead_block_after_goto.1, %else
+ br label %endif.4
+endif.4: ; preds = %endif.10, %endif.9
+ br i1 false, label %then.11, label %endif.11
+then.11: ; preds = %endif.4
+ br label %loopexit.0
+dead_block_after_break.8: ; No predecessors!
+ br label %endif.11
+endif.11: ; preds = %dead_block_after_break.8, %endif.4
+ br i1 false, label %then.12, label %endif.12
+then.12: ; preds = %endif.11
+ br label %loopexit.0
+dead_block_after_break.9: ; No predecessors!
+ br label %endif.12
+endif.12: ; preds = %dead_block_after_break.9, %endif.11
+ br label %loopentry.0
+loopexit.0: ; preds = %then.12, %then.11, %then.3, %then.2
+ br label %break_out
+break_out: ; preds = %loopexit.0, %then.10, %endif.6
+ %retval.3 = phi i32 [ 0, %loopexit.0 ], [ %tmp.94, %endif.6 ], [ 0, %then.10 ] ; <i32> [#uses=0]
+ br i1 false, label %cond_true, label %cond_false
+cond_true: ; preds = %break_out
+ br label %cond_continue
+cond_false: ; preds = %break_out
+ br label %cond_continue
+cond_continue: ; preds = %cond_false, %cond_true
+ br label %return
+after_ret.1: ; No predecessors!
+ br label %return
+return: ; preds = %after_ret.1, %cond_continue, %then.1
+ ret void
+}
diff --git a/test/Transforms/LCSSA/2006-10-31-UnreachableBlock.ll b/test/Transforms/LCSSA/2006-10-31-UnreachableBlock.ll
new file mode 100644
index 0000000..ecb1be5
--- /dev/null
+++ b/test/Transforms/LCSSA/2006-10-31-UnreachableBlock.ll
@@ -0,0 +1,184 @@
+; RUN: opt < %s -lcssa -disable-output
+; PR977
+; END.
+
+define void @process_backlog() {
+entry:
+ br label %loopentry.preheader
+loopentry.preheader: ; preds = %dead_block_after_break, %entry
+ %work.0.ph = phi i32 [ %inc, %dead_block_after_break ], [ 0, %entry ] ; <i32> [#uses=0]
+ br label %loopentry
+loopentry: ; preds = %endif.1, %loopentry.preheader
+ br i1 false, label %then.i, label %loopentry.__skb_dequeue67.exit_crit_edge
+loopentry.__skb_dequeue67.exit_crit_edge: ; preds = %loopentry
+ br label %__skb_dequeue67.exit
+then.i: ; preds = %loopentry
+ br label %__skb_dequeue67.exit
+__skb_dequeue67.exit: ; preds = %then.i, %loopentry.__skb_dequeue67.exit_crit_edge
+ br i1 false, label %then.0, label %__skb_dequeue67.exit.endif.0_crit_edge
+__skb_dequeue67.exit.endif.0_crit_edge: ; preds = %__skb_dequeue67.exit
+ br label %endif.0
+then.0: ; preds = %__skb_dequeue67.exit
+ br label %job_done
+dead_block_after_goto: ; No predecessors!
+ unreachable
+endif.0: ; preds = %__skb_dequeue67.exit.endif.0_crit_edge
+ br i1 false, label %then.0.i, label %endif.0.endif.0.i_crit_edge
+endif.0.endif.0.i_crit_edge: ; preds = %endif.0
+ br label %endif.0.i
+then.0.i: ; preds = %endif.0
+ br label %endif.0.i
+endif.0.i: ; preds = %then.0.i, %endif.0.endif.0.i_crit_edge
+ br i1 false, label %then.i.i, label %endif.0.i.skb_bond.exit.i_crit_edge
+endif.0.i.skb_bond.exit.i_crit_edge: ; preds = %endif.0.i
+ br label %skb_bond.exit.i
+then.i.i: ; preds = %endif.0.i
+ br label %skb_bond.exit.i
+skb_bond.exit.i: ; preds = %then.i.i, %endif.0.i.skb_bond.exit.i_crit_edge
+ br label %loopentry.0.i
+loopentry.0.i: ; preds = %loopentry.0.i.backedge, %skb_bond.exit.i
+ br i1 false, label %loopentry.0.i.no_exit.0.i_crit_edge, label %loopentry.0.i.loopexit.0.i_crit_edge
+loopentry.0.i.loopexit.0.i_crit_edge: ; preds = %loopentry.0.i
+ br label %loopexit.0.i
+loopentry.0.i.no_exit.0.i_crit_edge: ; preds = %loopentry.0.i
+ br label %no_exit.0.i
+no_exit.0.i: ; preds = %then.3.i.no_exit.0.i_crit_edge, %loopentry.0.i.no_exit.0.i_crit_edge
+ br i1 false, label %no_exit.0.i.shortcirc_done.0.i_crit_edge, label %shortcirc_next.0.i
+no_exit.0.i.shortcirc_done.0.i_crit_edge: ; preds = %no_exit.0.i
+ br label %shortcirc_done.0.i
+shortcirc_next.0.i: ; preds = %no_exit.0.i
+ br label %shortcirc_done.0.i
+shortcirc_done.0.i: ; preds = %shortcirc_next.0.i, %no_exit.0.i.shortcirc_done.0.i_crit_edge
+ br i1 false, label %then.1.i, label %endif.1.i
+then.1.i: ; preds = %shortcirc_done.0.i
+ br i1 false, label %then.2.i, label %then.1.i.endif.2.i_crit_edge
+then.1.i.endif.2.i_crit_edge: ; preds = %then.1.i
+ br label %endif.2.i
+then.2.i: ; preds = %then.1.i
+ br i1 false, label %then.3.i, label %else.0.i
+then.3.i: ; preds = %then.2.i
+ br i1 false, label %then.3.i.no_exit.0.i_crit_edge, label %then.3.i.loopexit.0.i_crit_edge
+then.3.i.loopexit.0.i_crit_edge: ; preds = %then.3.i
+ br label %loopexit.0.i
+then.3.i.no_exit.0.i_crit_edge: ; preds = %then.3.i
+ br label %no_exit.0.i
+else.0.i: ; preds = %then.2.i
+ br label %endif.2.i
+endif.3.i: ; No predecessors!
+ unreachable
+endif.2.i: ; preds = %else.0.i, %then.1.i.endif.2.i_crit_edge
+ br label %loopentry.0.i.backedge
+endif.1.i: ; preds = %shortcirc_done.0.i
+ br label %loopentry.0.i.backedge
+loopentry.0.i.backedge: ; preds = %endif.1.i, %endif.2.i
+ br label %loopentry.0.i
+loopexit.0.i: ; preds = %then.3.i.loopexit.0.i_crit_edge, %loopentry.0.i.loopexit.0.i_crit_edge
+ br label %loopentry.1.i
+loopentry.1.i: ; preds = %loopentry.1.i.backedge, %loopexit.0.i
+ br i1 false, label %loopentry.1.i.no_exit.1.i_crit_edge, label %loopentry.1.i.loopexit.1.i_crit_edge
+loopentry.1.i.loopexit.1.i_crit_edge: ; preds = %loopentry.1.i
+ br label %loopexit.1.i
+loopentry.1.i.no_exit.1.i_crit_edge: ; preds = %loopentry.1.i
+ br label %no_exit.1.i
+no_exit.1.i: ; preds = %then.6.i.no_exit.1.i_crit_edge, %loopentry.1.i.no_exit.1.i_crit_edge
+ br i1 false, label %shortcirc_next.1.i, label %no_exit.1.i.shortcirc_done.1.i_crit_edge
+no_exit.1.i.shortcirc_done.1.i_crit_edge: ; preds = %no_exit.1.i
+ br label %shortcirc_done.1.i
+shortcirc_next.1.i: ; preds = %no_exit.1.i
+ br i1 false, label %shortcirc_next.1.i.shortcirc_done.2.i_crit_edge, label %shortcirc_next.2.i
+shortcirc_next.1.i.shortcirc_done.2.i_crit_edge: ; preds = %shortcirc_next.1.i
+ br label %shortcirc_done.2.i
+shortcirc_next.2.i: ; preds = %shortcirc_next.1.i
+ br label %shortcirc_done.2.i
+shortcirc_done.2.i: ; preds = %shortcirc_next.2.i, %shortcirc_next.1.i.shortcirc_done.2.i_crit_edge
+ br label %shortcirc_done.1.i
+shortcirc_done.1.i: ; preds = %shortcirc_done.2.i, %no_exit.1.i.shortcirc_done.1.i_crit_edge
+ br i1 false, label %then.4.i, label %endif.4.i
+then.4.i: ; preds = %shortcirc_done.1.i
+ br i1 false, label %then.5.i, label %then.4.i.endif.5.i_crit_edge
+then.4.i.endif.5.i_crit_edge: ; preds = %then.4.i
+ br label %endif.5.i
+then.5.i: ; preds = %then.4.i
+ br i1 false, label %then.6.i, label %else.1.i
+then.6.i: ; preds = %then.5.i
+ br i1 false, label %then.6.i.no_exit.1.i_crit_edge, label %then.6.i.loopexit.1.i_crit_edge
+then.6.i.loopexit.1.i_crit_edge: ; preds = %then.6.i
+ br label %loopexit.1.i
+then.6.i.no_exit.1.i_crit_edge: ; preds = %then.6.i
+ br label %no_exit.1.i
+else.1.i: ; preds = %then.5.i
+ br label %endif.5.i
+endif.6.i: ; No predecessors!
+ unreachable
+endif.5.i: ; preds = %else.1.i, %then.4.i.endif.5.i_crit_edge
+ br label %loopentry.1.i.backedge
+endif.4.i: ; preds = %shortcirc_done.1.i
+ br label %loopentry.1.i.backedge
+loopentry.1.i.backedge: ; preds = %endif.4.i, %endif.5.i
+ br label %loopentry.1.i
+loopexit.1.i: ; preds = %then.6.i.loopexit.1.i_crit_edge, %loopentry.1.i.loopexit.1.i_crit_edge
+ br i1 false, label %then.7.i, label %else.2.i
+then.7.i: ; preds = %loopexit.1.i
+ br i1 false, label %then.8.i, label %else.3.i
+then.8.i: ; preds = %then.7.i
+ br label %netif_receive_skb.exit
+else.3.i: ; preds = %then.7.i
+ br label %netif_receive_skb.exit
+endif.8.i: ; No predecessors!
+ unreachable
+else.2.i: ; preds = %loopexit.1.i
+ br i1 false, label %else.2.i.shortcirc_done.i.i_crit_edge, label %shortcirc_next.i.i
+else.2.i.shortcirc_done.i.i_crit_edge: ; preds = %else.2.i
+ br label %shortcirc_done.i.i
+shortcirc_next.i.i: ; preds = %else.2.i
+ br label %shortcirc_done.i.i
+shortcirc_done.i.i: ; preds = %shortcirc_next.i.i, %else.2.i.shortcirc_done.i.i_crit_edge
+ br i1 false, label %then.i1.i, label %shortcirc_done.i.i.kfree_skb65.exit.i_crit_edge
+shortcirc_done.i.i.kfree_skb65.exit.i_crit_edge: ; preds = %shortcirc_done.i.i
+ br label %kfree_skb65.exit.i
+then.i1.i: ; preds = %shortcirc_done.i.i
+ br label %kfree_skb65.exit.i
+kfree_skb65.exit.i: ; preds = %then.i1.i, %shortcirc_done.i.i.kfree_skb65.exit.i_crit_edge
+ br label %netif_receive_skb.exit
+netif_receive_skb.exit: ; preds = %kfree_skb65.exit.i, %else.3.i, %then.8.i
+ br i1 false, label %then.i1, label %netif_receive_skb.exit.dev_put69.exit_crit_edge
+netif_receive_skb.exit.dev_put69.exit_crit_edge: ; preds = %netif_receive_skb.exit
+ br label %dev_put69.exit
+then.i1: ; preds = %netif_receive_skb.exit
+ br label %dev_put69.exit
+dev_put69.exit: ; preds = %then.i1, %netif_receive_skb.exit.dev_put69.exit_crit_edge
+ %inc = add i32 0, 1 ; <i32> [#uses=1]
+ br i1 false, label %dev_put69.exit.shortcirc_done_crit_edge, label %shortcirc_next
+dev_put69.exit.shortcirc_done_crit_edge: ; preds = %dev_put69.exit
+ br label %shortcirc_done
+shortcirc_next: ; preds = %dev_put69.exit
+ br label %shortcirc_done
+shortcirc_done: ; preds = %shortcirc_next, %dev_put69.exit.shortcirc_done_crit_edge
+ br i1 false, label %then.1, label %endif.1
+then.1: ; preds = %shortcirc_done
+ ret void
+dead_block_after_break: ; No predecessors!
+ br label %loopentry.preheader
+endif.1: ; preds = %shortcirc_done
+ br label %loopentry
+loopexit: ; No predecessors!
+ unreachable
+after_ret.0: ; No predecessors!
+ br label %job_done
+job_done: ; preds = %after_ret.0, %then.0
+ br label %loopentry.i
+loopentry.i: ; preds = %no_exit.i, %job_done
+ br i1 false, label %no_exit.i, label %clear_bit62.exit
+no_exit.i: ; preds = %loopentry.i
+ br label %loopentry.i
+clear_bit62.exit: ; preds = %loopentry.i
+ br i1 false, label %then.2, label %endif.2
+then.2: ; preds = %clear_bit62.exit
+ ret void
+endif.2: ; preds = %clear_bit62.exit
+ ret void
+after_ret.1: ; No predecessors!
+ ret void
+return: ; No predecessors!
+ unreachable
+}
diff --git a/test/Transforms/LCSSA/2007-07-12-LICM-2.ll b/test/Transforms/LCSSA/2007-07-12-LICM-2.ll
new file mode 100644
index 0000000..2c5815c
--- /dev/null
+++ b/test/Transforms/LCSSA/2007-07-12-LICM-2.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -loop-rotate -licm -loop-unswitch -disable-output
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ br label %bb7
+
+bb7: ; preds = %bb7, %entry
+ %tmp39 = load <4 x float>* null ; <<4 x float>> [#uses=1]
+ %tmp40 = fadd <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 > ; <<4 x float>> [#uses=1]
+ %tmp43 = fadd <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 > ; <<4 x float>> [#uses=1]
+ %tmp46 = fadd <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 > ; <<4 x float>> [#uses=1]
+ %tmp49 = fadd <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 > ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp49, <4 x float>* null
+ br i1 false, label %bb7, label %bb56
+
+bb56: ; preds = %bb7
+ ret i32 0
+}
diff --git a/test/Transforms/LCSSA/2007-07-12-LICM-3.ll b/test/Transforms/LCSSA/2007-07-12-LICM-3.ll
new file mode 100644
index 0000000..7e0d3c6
--- /dev/null
+++ b/test/Transforms/LCSSA/2007-07-12-LICM-3.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -loop-rotate -licm -loop-unswitch -disable-output
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ br label %bb
+
+bb: ; preds = %bb56, %entry
+ br label %bb7
+
+bb7: ; preds = %bb7, %bb
+ %tmp39 = load <4 x float>* null ; <<4 x float>> [#uses=1]
+ %tmp40 = fadd <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 > ; <<4 x float>> [#uses=1]
+ %tmp43 = fadd <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 > ; <<4 x float>> [#uses=1]
+ %tmp46 = fadd <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 > ; <<4 x float>> [#uses=1]
+ %tmp49 = fadd <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 > ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp49, <4 x float>* null
+ br i1 false, label %bb7, label %bb56
+
+bb56: ; preds = %bb7
+ br i1 false, label %bb, label %bb64
+
+bb64: ; preds = %bb56
+ ret i32 0
+}
diff --git a/test/Transforms/LCSSA/2007-07-12-LICM.ll b/test/Transforms/LCSSA/2007-07-12-LICM.ll
new file mode 100644
index 0000000..8c07aa2
--- /dev/null
+++ b/test/Transforms/LCSSA/2007-07-12-LICM.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -loop-rotate -licm -loop-unswitch -disable-output
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ br label %bb7
+
+bb7: ; preds = %bb7, %entry
+ %tmp39 = load <4 x float>* null ; <<4 x float>> [#uses=1]
+ %tmp40 = fadd <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 > ; <<4 x float>> [#uses=0]
+ store <4 x float> zeroinitializer, <4 x float>* null
+ br i1 false, label %bb7, label %bb56
+
+bb56: ; preds = %bb7
+ ret i32 0
+}
diff --git a/test/Transforms/LCSSA/basictest.ll b/test/Transforms/LCSSA/basictest.ll
new file mode 100644
index 0000000..23ab2c0
--- /dev/null
+++ b/test/Transforms/LCSSA/basictest.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -lcssa -S | \
+; RUN: grep {X3.lcssa = phi i32}
+; RUN: opt < %s -lcssa -S | \
+; RUN: grep {X4 = add i32 3, %X3.lcssa}
+
+define void @lcssa(i1 %S2) {
+entry:
+ br label %loop.interior
+loop.interior: ; preds = %post.if, %entry
+ br i1 %S2, label %if.true, label %if.false
+if.true: ; preds = %loop.interior
+ %X1 = add i32 0, 0 ; <i32> [#uses=1]
+ br label %post.if
+if.false: ; preds = %loop.interior
+ %X2 = add i32 0, 1 ; <i32> [#uses=1]
+ br label %post.if
+post.if: ; preds = %if.false, %if.true
+ %X3 = phi i32 [ %X1, %if.true ], [ %X2, %if.false ] ; <i32> [#uses=1]
+ br i1 %S2, label %loop.exit, label %loop.interior
+loop.exit: ; preds = %post.if
+ %X4 = add i32 3, %X3 ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/LCSSA/dg.exp b/test/Transforms/LCSSA/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LCSSA/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LCSSA/indirectbr.ll b/test/Transforms/LCSSA/indirectbr.ll
new file mode 100644
index 0000000..96564486
--- /dev/null
+++ b/test/Transforms/LCSSA/indirectbr.ll
@@ -0,0 +1,542 @@
+; RUN: opt < %s -lcssa -verify-loop-info -verify-dom-info -disable-output
+; PR5437
+
+; LCSSA should work correctly in the case of an indirectbr that exits
+; the loop, and the loop has exits with predecessors not within the loop
+; (and btw these edges are unsplittable due to the indirectbr).
+
+define i32 @js_Interpret() nounwind {
+entry:
+ br i1 undef, label %"4", label %"3"
+
+"3": ; preds = %entry
+ ret i32 0
+
+"4": ; preds = %entry
+ br i1 undef, label %"6", label %"5"
+
+"5": ; preds = %"4"
+ unreachable
+
+"6": ; preds = %"4"
+ br i1 undef, label %"10", label %"13"
+
+"10": ; preds = %"6"
+ br i1 undef, label %"22", label %"15"
+
+"13": ; preds = %"6"
+ unreachable
+
+"15": ; preds = %"23", %"10"
+ unreachable
+
+"22": ; preds = %"10"
+ br label %"23"
+
+"23": ; preds = %"1375", %"22"
+ %0 = phi i32 [ undef, %"22" ], [ %1, %"1375" ] ; <i32> [#uses=1]
+ indirectbr i8* undef, [label %"15", label %"24", label %"25", label %"26", label %"27", label %"28", label %"29", label %"30", label %"32", label %"32", label %"33", label %"167", label %"173", label %"173", label %"173", label %"173", label %"173", label %"192", label %"193", label %"194", label %"196", label %"206", label %"231", label %"241", label %"251", label %"261", label %"307", label %"353", label %"354", label %"355", label %"361", label %"367", label %"400", label %"433", label %"466", label %"499", label %"509", label %"519", label %"529", label %"571", label %"589", label %"607", label %"635", label %"655", label %"664", label %"671", label %"680", label %"687", label %"692", label %"698", label %"704", label %"715", label %"715", label %"716", label %"725", label %"725", label %"725", label %"725", label %"724", label %"724", label %"724", label %"724", label %"737", label %"737", label %"737", label %"737", label %"761", label %"758", label %"759", label %"760", label %"766", label %"763", label %"764", label %"765", label %"771", label %"768", label %"769", label %"770", label %"780", label %"777", label %"778", label %"779", label %"821", label %"826", label %"831", label %"832", label %"833", label %"836", label %"836", label %"886", label %"905", label %"978", label %"978", label %"1136", label %"1166", label %"1179", label %"1201", label %"1212", label %"1212", label %"1274", label %"1284", label %"1284", label %"1346", label %"1347", label %"1348", label %"1349", label %"1350", label %"1353", label %"1353", label %"1353", label %"1355", label %"1355", label %"1357", label %"1357", label %"1358", label %"1359", label %"1374", label %"1375", label %"1376", label %"1377", label %"1378", label %"1379", label %"1386", label %"1395", label %"1394", label %"1425", label %"1426", label %"1440", label %"1449", label %"1455", label %"1461", label %"1471", label %"1482", label %"1484", label %"1486", label %"1489", label %"1489", label %"1492", label %"1494", label %"1494", label %"1497", label %"1499", label %"1499", label %"1515", label %"1546", label %"1546", label %"1566", label %"1584", label %"1587", label %"1591", label %"1605", label %"1609", label %"1609", label %"1640", label %"1648", label %"1651", label %"1703", label %"1710", label %"1718", label %"1724", label %"1725", label %"1726", label %"1727", label %"1728", label %"1731", label %"1732", label %"1733", label %"1734", label %"1735", label %"1741", label %"1750", label %"1752", label %"1754", label %"1755", label %"1757", label %"1759", label %"1761", label %"1764", label %"1764", label %"1766", label %"1768", label %"1775", label %"1775", label %"1781", label %"1781", label %"1790", label %"1827", label %"1836", label %"1836", label %"1845", label %"1845", label %"1848", label %"1849", label %"1851", label %"1853", label %"1856", label %"1861", label %"1861"]
+
+"24": ; preds = %"23"
+ unreachable
+
+"25": ; preds = %"23"
+ unreachable
+
+"26": ; preds = %"23"
+ unreachable
+
+"27": ; preds = %"23"
+ unreachable
+
+"28": ; preds = %"23"
+ unreachable
+
+"29": ; preds = %"23"
+ unreachable
+
+"30": ; preds = %"23"
+ unreachable
+
+"32": ; preds = %"23", %"23"
+ unreachable
+
+"33": ; preds = %"23"
+ unreachable
+
+"167": ; preds = %"23"
+ unreachable
+
+"173": ; preds = %"23", %"23", %"23", %"23", %"23"
+ unreachable
+
+"192": ; preds = %"23"
+ unreachable
+
+"193": ; preds = %"23"
+ unreachable
+
+"194": ; preds = %"23"
+ unreachable
+
+"196": ; preds = %"23"
+ unreachable
+
+"206": ; preds = %"23"
+ unreachable
+
+"231": ; preds = %"23"
+ unreachable
+
+"241": ; preds = %"23"
+ unreachable
+
+"251": ; preds = %"23"
+ unreachable
+
+"261": ; preds = %"23"
+ unreachable
+
+"307": ; preds = %"23"
+ unreachable
+
+"353": ; preds = %"23"
+ unreachable
+
+"354": ; preds = %"23"
+ unreachable
+
+"355": ; preds = %"23"
+ unreachable
+
+"361": ; preds = %"23"
+ unreachable
+
+"367": ; preds = %"23"
+ unreachable
+
+"400": ; preds = %"23"
+ unreachable
+
+"433": ; preds = %"23"
+ unreachable
+
+"466": ; preds = %"23"
+ unreachable
+
+"499": ; preds = %"23"
+ unreachable
+
+"509": ; preds = %"23"
+ unreachable
+
+"519": ; preds = %"23"
+ unreachable
+
+"529": ; preds = %"23"
+ unreachable
+
+"571": ; preds = %"23"
+ unreachable
+
+"589": ; preds = %"23"
+ unreachable
+
+"607": ; preds = %"23"
+ unreachable
+
+"635": ; preds = %"23"
+ unreachable
+
+"655": ; preds = %"23"
+ unreachable
+
+"664": ; preds = %"23"
+ unreachable
+
+"671": ; preds = %"23"
+ unreachable
+
+"680": ; preds = %"23"
+ unreachable
+
+"687": ; preds = %"23"
+ unreachable
+
+"692": ; preds = %"23"
+ br label %"1862"
+
+"698": ; preds = %"23"
+ unreachable
+
+"704": ; preds = %"23"
+ unreachable
+
+"715": ; preds = %"23", %"23"
+ unreachable
+
+"716": ; preds = %"23"
+ unreachable
+
+"724": ; preds = %"23", %"23", %"23", %"23"
+ unreachable
+
+"725": ; preds = %"23", %"23", %"23", %"23"
+ unreachable
+
+"737": ; preds = %"23", %"23", %"23", %"23"
+ unreachable
+
+"758": ; preds = %"23"
+ unreachable
+
+"759": ; preds = %"23"
+ unreachable
+
+"760": ; preds = %"23"
+ unreachable
+
+"761": ; preds = %"23"
+ unreachable
+
+"763": ; preds = %"23"
+ unreachable
+
+"764": ; preds = %"23"
+ unreachable
+
+"765": ; preds = %"23"
+ br label %"766"
+
+"766": ; preds = %"765", %"23"
+ unreachable
+
+"768": ; preds = %"23"
+ unreachable
+
+"769": ; preds = %"23"
+ unreachable
+
+"770": ; preds = %"23"
+ unreachable
+
+"771": ; preds = %"23"
+ unreachable
+
+"777": ; preds = %"23"
+ unreachable
+
+"778": ; preds = %"23"
+ unreachable
+
+"779": ; preds = %"23"
+ unreachable
+
+"780": ; preds = %"23"
+ unreachable
+
+"821": ; preds = %"23"
+ unreachable
+
+"826": ; preds = %"23"
+ unreachable
+
+"831": ; preds = %"23"
+ unreachable
+
+"832": ; preds = %"23"
+ unreachable
+
+"833": ; preds = %"23"
+ unreachable
+
+"836": ; preds = %"23", %"23"
+ unreachable
+
+"886": ; preds = %"23"
+ unreachable
+
+"905": ; preds = %"23"
+ unreachable
+
+"978": ; preds = %"23", %"23"
+ unreachable
+
+"1136": ; preds = %"23"
+ unreachable
+
+"1166": ; preds = %"23"
+ unreachable
+
+"1179": ; preds = %"23"
+ unreachable
+
+"1201": ; preds = %"23"
+ unreachable
+
+"1212": ; preds = %"23", %"23"
+ unreachable
+
+"1274": ; preds = %"23"
+ unreachable
+
+"1284": ; preds = %"23", %"23"
+ unreachable
+
+"1346": ; preds = %"23"
+ unreachable
+
+"1347": ; preds = %"23"
+ unreachable
+
+"1348": ; preds = %"23"
+ unreachable
+
+"1349": ; preds = %"23"
+ unreachable
+
+"1350": ; preds = %"23"
+ unreachable
+
+"1353": ; preds = %"23", %"23", %"23"
+ unreachable
+
+"1355": ; preds = %"23", %"23"
+ unreachable
+
+"1357": ; preds = %"23", %"23"
+ unreachable
+
+"1358": ; preds = %"23"
+ unreachable
+
+"1359": ; preds = %"23"
+ unreachable
+
+"1374": ; preds = %"23"
+ unreachable
+
+"1375": ; preds = %"23"
+ %1 = zext i8 undef to i32 ; <i32> [#uses=1]
+ br label %"23"
+
+"1376": ; preds = %"23"
+ unreachable
+
+"1377": ; preds = %"23"
+ unreachable
+
+"1378": ; preds = %"23"
+ unreachable
+
+"1379": ; preds = %"23"
+ unreachable
+
+"1386": ; preds = %"23"
+ unreachable
+
+"1394": ; preds = %"23"
+ unreachable
+
+"1395": ; preds = %"23"
+ unreachable
+
+"1425": ; preds = %"23"
+ unreachable
+
+"1426": ; preds = %"23"
+ unreachable
+
+"1440": ; preds = %"23"
+ unreachable
+
+"1449": ; preds = %"23"
+ unreachable
+
+"1455": ; preds = %"23"
+ unreachable
+
+"1461": ; preds = %"23"
+ unreachable
+
+"1471": ; preds = %"23"
+ unreachable
+
+"1482": ; preds = %"23"
+ unreachable
+
+"1484": ; preds = %"23"
+ unreachable
+
+"1486": ; preds = %"23"
+ unreachable
+
+"1489": ; preds = %"23", %"23"
+ unreachable
+
+"1492": ; preds = %"23"
+ unreachable
+
+"1494": ; preds = %"23", %"23"
+ unreachable
+
+"1497": ; preds = %"23"
+ unreachable
+
+"1499": ; preds = %"23", %"23"
+ unreachable
+
+"1515": ; preds = %"23"
+ unreachable
+
+"1546": ; preds = %"23", %"23"
+ unreachable
+
+"1566": ; preds = %"23"
+ br i1 undef, label %"1569", label %"1568"
+
+"1568": ; preds = %"1566"
+ unreachable
+
+"1569": ; preds = %"1566"
+ unreachable
+
+"1584": ; preds = %"23"
+ unreachable
+
+"1587": ; preds = %"23"
+ unreachable
+
+"1591": ; preds = %"23"
+ unreachable
+
+"1605": ; preds = %"23"
+ unreachable
+
+"1609": ; preds = %"23", %"23"
+ unreachable
+
+"1640": ; preds = %"23"
+ unreachable
+
+"1648": ; preds = %"23"
+ unreachable
+
+"1651": ; preds = %"23"
+ unreachable
+
+"1703": ; preds = %"23"
+ unreachable
+
+"1710": ; preds = %"23"
+ unreachable
+
+"1718": ; preds = %"23"
+ unreachable
+
+"1724": ; preds = %"23"
+ unreachable
+
+"1725": ; preds = %"23"
+ unreachable
+
+"1726": ; preds = %"23"
+ unreachable
+
+"1727": ; preds = %"23"
+ unreachable
+
+"1728": ; preds = %"23"
+ unreachable
+
+"1731": ; preds = %"23"
+ unreachable
+
+"1732": ; preds = %"23"
+ unreachable
+
+"1733": ; preds = %"23"
+ unreachable
+
+"1734": ; preds = %"23"
+ unreachable
+
+"1735": ; preds = %"23"
+ unreachable
+
+"1741": ; preds = %"23"
+ unreachable
+
+"1750": ; preds = %"23"
+ unreachable
+
+"1752": ; preds = %"23"
+ unreachable
+
+"1754": ; preds = %"23"
+ unreachable
+
+"1755": ; preds = %"23"
+ unreachable
+
+"1757": ; preds = %"23"
+ unreachable
+
+"1759": ; preds = %"23"
+ unreachable
+
+"1761": ; preds = %"23"
+ unreachable
+
+"1764": ; preds = %"23", %"23"
+ %2 = icmp eq i32 %0, 168 ; <i1> [#uses=0]
+ unreachable
+
+"1766": ; preds = %"23"
+ unreachable
+
+"1768": ; preds = %"23"
+ unreachable
+
+"1775": ; preds = %"23", %"23"
+ unreachable
+
+"1781": ; preds = %"23", %"23"
+ unreachable
+
+"1790": ; preds = %"23"
+ unreachable
+
+"1827": ; preds = %"23"
+ unreachable
+
+"1836": ; preds = %"23", %"23"
+ br label %"1862"
+
+"1845": ; preds = %"23", %"23"
+ unreachable
+
+"1848": ; preds = %"23"
+ unreachable
+
+"1849": ; preds = %"23"
+ unreachable
+
+"1851": ; preds = %"23"
+ unreachable
+
+"1853": ; preds = %"23"
+ unreachable
+
+"1856": ; preds = %"23"
+ unreachable
+
+"1861": ; preds = %"23", %"23"
+ unreachable
+
+"41": ; preds = %"23", %"23"
+ unreachable
+
+"1862": ; preds = %"1836", %"692"
+ unreachable
+}
diff --git a/test/Transforms/LCSSA/invoke-dest.ll b/test/Transforms/LCSSA/invoke-dest.ll
new file mode 100644
index 0000000..4547150
--- /dev/null
+++ b/test/Transforms/LCSSA/invoke-dest.ll
@@ -0,0 +1,143 @@
+; RUN: opt < %s -lcssa
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+
[email protected] = external constant [3 x i8], align 1 ; <[3 x i8]*> [#uses=1]
[email protected] = external constant [4 x i8], align 1 ; <[4 x i8]*> [#uses=1]
[email protected] = external constant [12 x i8], align 1 ; <[12 x i8]*> [#uses=1]
[email protected] = external constant [10 x i8], align 1 ; <[10 x i8]*> [#uses=1]
[email protected] = external constant [92 x i8], align 1 ; <[92 x i8]*> [#uses=1]
[email protected] = external constant [25 x i8], align 1 ; <[25 x i8]*> [#uses=1]
+
+define void @_ZN8EtherBus10initializeEv() {
+entry:
+ br i1 undef, label %_ZN7cObjectnwEj.exit, label %bb.i
+
+bb.i: ; preds = %entry
+ br label %_ZN7cObjectnwEj.exit
+
+_ZN7cObjectnwEj.exit: ; preds = %bb.i, %entry
+ invoke void @_ZN7cObjectC2EPKc(i8* undef, i8* getelementptr ([12 x i8]* @.str21179, i32 0, i32 0))
+ to label %bb1 unwind label %lpad
+
+bb1: ; preds = %_ZN7cObjectnwEj.exit
+ br i1 undef, label %_ZNK5cGate4sizeEv.exit, label %bb.i110
+
+bb.i110: ; preds = %bb1
+ br label %_ZNK5cGate4sizeEv.exit
+
+_ZNK5cGate4sizeEv.exit: ; preds = %bb.i110, %bb1
+ br i1 undef, label %_ZNK5cGate4sizeEv.exit122, label %bb.i120
+
+bb.i120: ; preds = %_ZNK5cGate4sizeEv.exit
+ br label %_ZNK5cGate4sizeEv.exit122
+
+_ZNK5cGate4sizeEv.exit122: ; preds = %bb.i120, %_ZNK5cGate4sizeEv.exit
+ br i1 undef, label %bb8, label %bb2
+
+bb2: ; preds = %_ZNK5cGate4sizeEv.exit122
+ unreachable
+
+bb8: ; preds = %_ZNK5cGate4sizeEv.exit122
+ %tmp = invoke i8* @_ZN7cModule3parEPKc(i8* undef, i8* getelementptr ([10 x i8]* @.str25183, i32 0, i32 0))
+ to label %invcont9 unwind label %lpad119 ; <i8*> [#uses=1]
+
+invcont9: ; preds = %bb8
+ %tmp1 = invoke i8* @_ZN4cPar11stringValueEv(i8* %tmp)
+ to label %invcont10 unwind label %lpad119 ; <i8*> [#uses=1]
+
+invcont10: ; preds = %invcont9
+ invoke void @_ZN8EtherBus8tokenizeEPKcRSt6vectorIdSaIdEE(i8* null, i8* %tmp1, i8* undef)
+ to label %invcont11 unwind label %lpad119
+
+invcont11: ; preds = %invcont10
+ br i1 undef, label %bb12, label %bb18
+
+bb12: ; preds = %invcont11
+ invoke void (i8*, i8*, ...)* @_ZN6cEnvir6printfEPKcz(i8* null, i8* getelementptr ([3 x i8]* @.str12, i32 0, i32 0), i32 undef)
+ to label %bb.i.i159 unwind label %lpad119
+
+bb.i.i159: ; preds = %bb12
+ unreachable
+
+bb18: ; preds = %invcont11
+ br i1 undef, label %bb32, label %bb34
+
+bb32: ; preds = %bb18
+ br i1 undef, label %bb.i.i123, label %bb34
+
+bb.i.i123: ; preds = %bb32
+ br label %bb34
+
+bb34: ; preds = %bb.i.i123, %bb32, %bb18
+ %tmp2 = invoke i8* @_Znaj(i32 undef)
+ to label %invcont35 unwind label %lpad119 ; <i8*> [#uses=0]
+
+invcont35: ; preds = %bb34
+ br i1 undef, label %bb49, label %bb61
+
+bb49: ; preds = %invcont35
+ invoke void (i8*, i8*, ...)* @_ZNK13cSimpleModule5errorEPKcz(i8* undef, i8* getelementptr ([92 x i8]* @.str32190, i32 0, i32 0))
+ to label %bb51 unwind label %lpad119
+
+bb51: ; preds = %bb49
+ unreachable
+
+bb61: ; preds = %invcont35
+ br label %bb106
+
+.noexc: ; preds = %bb106
+ invoke void @_ZN7cObjectC2EPKc(i8* undef, i8* getelementptr ([25 x i8]* @.str41, i32 0, i32 0))
+ to label %bb102 unwind label %lpad123
+
+bb102: ; preds = %.noexc
+ invoke void undef(i8* undef, i8 zeroext 1)
+ to label %invcont103 unwind label %lpad119
+
+invcont103: ; preds = %bb102
+ invoke void undef(i8* undef, double 1.000000e+07)
+ to label %invcont104 unwind label %lpad119
+
+invcont104: ; preds = %invcont103
+ %tmp3 = invoke i32 @_ZN13cSimpleModule11sendDelayedEP8cMessagedPKci(i8* undef, i8* undef, double 0.000000e+00, i8* getelementptr ([4 x i8]* @.str17175, i32 0, i32 0), i32 undef)
+ to label %invcont105 unwind label %lpad119 ; <i32> [#uses=0]
+
+invcont105: ; preds = %invcont104
+ br label %bb106
+
+bb106: ; preds = %invcont105, %bb61
+ %tmp4 = invoke i8* @_Znaj(i32 124)
+ to label %.noexc unwind label %lpad119 ; <i8*> [#uses=1]
+
+lpad: ; preds = %_ZN7cObjectnwEj.exit
+ br label %Unwind
+
+lpad119: ; preds = %bb106, %invcont104, %invcont103, %bb102, %bb49, %bb34, %bb12, %invcont10, %invcont9, %bb8
+ unreachable
+
+lpad123: ; preds = %.noexc
+ %tmp5 = icmp eq i8* %tmp4, null ; <i1> [#uses=1]
+ br i1 %tmp5, label %Unwind, label %bb.i2
+
+bb.i2: ; preds = %lpad123
+ br label %Unwind
+
+Unwind: ; preds = %bb.i2, %lpad123, %lpad
+ unreachable
+}
+
+declare void @_ZN8EtherBus8tokenizeEPKcRSt6vectorIdSaIdEE(i8* nocapture, i8*, i8*)
+
+declare i8* @_Znaj(i32)
+
+declare void @_ZN6cEnvir6printfEPKcz(i8* nocapture, i8* nocapture, ...)
+
+declare void @_ZNK13cSimpleModule5errorEPKcz(i8* nocapture, i8* nocapture, ...) noreturn
+
+declare i8* @_ZN7cModule3parEPKc(i8*, i8*)
+
+declare i32 @_ZN13cSimpleModule11sendDelayedEP8cMessagedPKci(i8*, i8*, double, i8*, i32)
+
+declare void @_ZN7cObjectC2EPKc(i8*, i8*)
+
+declare i8* @_ZN4cPar11stringValueEv(i8*)
diff --git a/test/Transforms/LICM/2003-02-26-LoopExitNotDominated.ll b/test/Transforms/LICM/2003-02-26-LoopExitNotDominated.ll
new file mode 100644
index 0000000..ff20312
--- /dev/null
+++ b/test/Transforms/LICM/2003-02-26-LoopExitNotDominated.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -basicaa -licm -disable-output
+
+;%MoveArray = external global [64 x ulong]
+
+define void @InitMoveArray() {
+bb3:
+ %X = alloca [2 x i64] ; <[2 x i64]*> [#uses=1]
+ br i1 false, label %bb13, label %bb4
+bb4: ; preds = %bb3
+ %reg3011 = getelementptr [2 x i64]* %X, i64 0, i64 0 ; <i64*> [#uses=1]
+ br label %bb8
+bb8: ; preds = %bb8, %bb4
+ store i64 0, i64* %reg3011
+ br i1 false, label %bb8, label %bb13
+bb13: ; preds = %bb8, %bb3
+ ret void
+}
+
diff --git a/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll b/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll
new file mode 100644
index 0000000..4782bd1
--- /dev/null
+++ b/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll
@@ -0,0 +1,17 @@
+; Exit blocks need to be updated for all nested loops...
+
+; RUN: opt < %s -loopsimplify
+
+define i32 @yyparse() {
+bb0:
+ br i1 false, label %UnifiedExitNode, label %bb19
+bb19: ; preds = %bb28, %bb0
+ br i1 false, label %bb28, label %UnifiedExitNode
+bb28: ; preds = %bb32, %bb19
+ br i1 false, label %bb32, label %bb19
+bb32: ; preds = %bb28
+ br i1 false, label %UnifiedExitNode, label %bb28
+UnifiedExitNode: ; preds = %bb32, %bb19, %bb0
+ ret i32 0
+}
+
diff --git a/test/Transforms/LICM/2003-02-27-PreheaderExitNodeUpdate.ll b/test/Transforms/LICM/2003-02-27-PreheaderExitNodeUpdate.ll
new file mode 100644
index 0000000..2718cb1
--- /dev/null
+++ b/test/Transforms/LICM/2003-02-27-PreheaderExitNodeUpdate.ll
@@ -0,0 +1,16 @@
+; This testcase fails because preheader insertion is not updating exit node
+; information for loops.
+
+; RUN: opt < %s -licm
+
+define i32 @main(i32 %argc, i8** %argv) {
+bb0:
+ br i1 false, label %bb7, label %bb5
+bb5: ; preds = %bb5, %bb0
+ br i1 false, label %bb5, label %bb7
+bb7: ; preds = %bb7, %bb5, %bb0
+ br i1 false, label %bb7, label %bb10
+bb10: ; preds = %bb7
+ ret i32 0
+}
+
diff --git a/test/Transforms/LICM/2003-02-27-PreheaderProblem.ll b/test/Transforms/LICM/2003-02-27-PreheaderProblem.ll
new file mode 100644
index 0000000..70a04c7
--- /dev/null
+++ b/test/Transforms/LICM/2003-02-27-PreheaderProblem.ll
@@ -0,0 +1,24 @@
+; Here we have a case where there are two loops and LICM is hoisting an
+; instruction from one loop into the other loop! This is obviously bad and
+; happens because preheader insertion doesn't insert a preheader for this
+; case... bad.
+
+; RUN: opt < %s -licm -loop-deletion -simplifycfg -S | \
+; RUN: not grep {br }
+
+define i32 @main(i32 %argc) {
+; <label>:0
+ br label %bb5
+bb5: ; preds = %bb5, %0
+ %I = phi i32 [ 0, %0 ], [ %I2, %bb5 ] ; <i32> [#uses=1]
+ %I2 = add i32 %I, 1 ; <i32> [#uses=2]
+ %c = icmp eq i32 %I2, 10 ; <i1> [#uses=1]
+ br i1 %c, label %bb5, label %bb8
+bb8: ; preds = %bb8, %bb5
+ %cann-indvar = phi i32 [ 0, %bb8 ], [ 0, %bb5 ] ; <i32> [#uses=0]
+ %X = add i32 %argc, %argc ; <i32> [#uses=1]
+ br i1 false, label %bb8, label %bb10
+bb10: ; preds = %bb8
+ ret i32 %X
+}
+
diff --git a/test/Transforms/LICM/2003-02-27-StoreSinkPHIs.ll b/test/Transforms/LICM/2003-02-27-StoreSinkPHIs.ll
new file mode 100644
index 0000000..a9c6b85
--- /dev/null
+++ b/test/Transforms/LICM/2003-02-27-StoreSinkPHIs.ll
@@ -0,0 +1,15 @@
+; LICM is adding stores before phi nodes. bad.
+
+; RUN: opt < %s -licm
+
+define i1 @test(i1 %c) {
+; <label>:0
+ br i1 %c, label %Loop, label %Out
+Loop: ; preds = %Loop, %0
+ store i32 0, i32* null
+ br i1 %c, label %Loop, label %Out
+Out: ; preds = %Loop, %0
+ %X = phi i1 [ %c, %0 ], [ true, %Loop ] ; <i1> [#uses=1]
+ ret i1 %X
+}
+
diff --git a/test/Transforms/LICM/2003-02-28-PromoteDifferentType.ll b/test/Transforms/LICM/2003-02-28-PromoteDifferentType.ll
new file mode 100644
index 0000000..c759e6e
--- /dev/null
+++ b/test/Transforms/LICM/2003-02-28-PromoteDifferentType.ll
@@ -0,0 +1,15 @@
+; Test that hoisting is disabled for pointers of different types...
+;
+; RUN: opt < %s -licm
+
+define void @test(i32* %P) {
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ store i32 5, i32* %P
+ %P2 = bitcast i32* %P to i8* ; <i8*> [#uses=1]
+ store i8 4, i8* %P2
+ br i1 true, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LICM/2003-05-02-LoadHoist.ll b/test/Transforms/LICM/2003-05-02-LoadHoist.ll
new file mode 100644
index 0000000..71d3e78
--- /dev/null
+++ b/test/Transforms/LICM/2003-05-02-LoadHoist.ll
@@ -0,0 +1,23 @@
+; This testcase tests for a problem where LICM hoists loads out of a loop
+; despite the fact that calls to unknown functions may modify what is being
+; loaded from. Basically if the load gets hoisted, the subtract gets turned
+; into a constant zero.
+;
+; RUN: opt < %s -licm -gvn -instcombine -S | grep load
+
+@X = global i32 7 ; <i32*> [#uses=2]
+
+declare void @foo()
+
+define i32 @test(i1 %c) {
+ %A = load i32* @X ; <i32> [#uses=1]
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ call void @foo( )
+ ;; Should not hoist this load!
+ %B = load i32* @X ; <i32> [#uses=1]
+ br i1 %c, label %Loop, label %Out
+Out: ; preds = %Loop
+ %C = sub i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
diff --git a/test/Transforms/LICM/2003-12-11-SinkingToPHI.ll b/test/Transforms/LICM/2003-12-11-SinkingToPHI.ll
new file mode 100644
index 0000000..67c3951
--- /dev/null
+++ b/test/Transforms/LICM/2003-12-11-SinkingToPHI.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -licm | lli
+
+define i32 @main() {
+entry:
+ br label %Loop
+Loop: ; preds = %LoopCont, %entry
+ br i1 true, label %LoopCont, label %Out
+LoopCont: ; preds = %Loop
+ %X = add i32 1, 0 ; <i32> [#uses=1]
+ br i1 true, label %Out, label %Loop
+Out: ; preds = %LoopCont, %Loop
+ %V = phi i32 [ 2, %Loop ], [ %X, %LoopCont ] ; <i32> [#uses=1]
+ %V2 = sub i32 %V, 1 ; <i32> [#uses=1]
+ ret i32 %V2
+}
+
diff --git a/test/Transforms/LICM/2004-09-14-AliasAnalysisInvalidate.ll b/test/Transforms/LICM/2004-09-14-AliasAnalysisInvalidate.ll
new file mode 100644
index 0000000..16f4fed
--- /dev/null
+++ b/test/Transforms/LICM/2004-09-14-AliasAnalysisInvalidate.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -globalsmodref-aa -licm -disable-output
+
+@PL_regcomp_parse = internal global i8* null ; <i8**> [#uses=2]
+
+define void @test() {
+ br label %Outer
+Outer: ; preds = %Next, %0
+ br label %Inner
+Inner: ; preds = %Inner, %Outer
+ %tmp.114.i.i.i = load i8** @PL_regcomp_parse ; <i8*> [#uses=1]
+ %tmp.115.i.i.i = load i8* %tmp.114.i.i.i ; <i8> [#uses=0]
+ store i8* null, i8** @PL_regcomp_parse
+ br i1 false, label %Inner, label %Next
+Next: ; preds = %Inner
+ br i1 false, label %Outer, label %Exit
+Exit: ; preds = %Next
+ ret void
+}
+
diff --git a/test/Transforms/LICM/2004-11-17-UndefIndexCrash.ll b/test/Transforms/LICM/2004-11-17-UndefIndexCrash.ll
new file mode 100644
index 0000000..a119865f
--- /dev/null
+++ b/test/Transforms/LICM/2004-11-17-UndefIndexCrash.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -licm -disable-output
+ %struct.roadlet = type { i8*, %struct.vehicle*, [8 x %struct.roadlet*], [8 x %struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)*] }
+ %struct.vehicle = type { %struct.roadlet*, i8*, i32, i32, %union.._631., i32 }
+ %union.._631. = type { i32 }
+
+declare %struct.roadlet* @_Z11return_nullP7roadletP7vehicle9direction(%struct.roadlet*, %struct.vehicle*, i32)
+
+declare %struct.roadlet* @_Z14lane_switch_okP7roadletP7vehicle9direction(%struct.roadlet*, %struct.vehicle*, i32)
+
+define void @main() {
+__main.entry:
+ br label %invoke_cont.3
+invoke_cont.3: ; preds = %invoke_cont.3, %__main.entry
+ %tmp.34.i.i502.7 = getelementptr %struct.roadlet* null, i32 0, i32 3, i32 7 ; <%struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)**> [#uses=1]
+ store %struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)* @_Z11return_nullP7roadletP7vehicle9direction, %struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)** %tmp.34.i.i502.7
+ store %struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)* @_Z14lane_switch_okP7roadletP7vehicle9direction, %struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)** null
+ %tmp.4.i.i339 = getelementptr %struct.roadlet* null, i32 0, i32 3, i32 undef ; <%struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)**> [#uses=1]
+ store %struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)* @_Z11return_nullP7roadletP7vehicle9direction, %struct.roadlet* (%struct.roadlet*, %struct.vehicle*, i32)** %tmp.4.i.i339
+ br label %invoke_cont.3
+}
diff --git a/test/Transforms/LICM/2005-03-24-LICM-Aggregate-Crash.ll b/test/Transforms/LICM/2005-03-24-LICM-Aggregate-Crash.ll
new file mode 100644
index 0000000..91740cf0
--- /dev/null
+++ b/test/Transforms/LICM/2005-03-24-LICM-Aggregate-Crash.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -licm -disable-output
+
+define void @test({ i32 }* %P) {
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ free { i32 }* %P
+ br label %Loop
+}
+
diff --git a/test/Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll b/test/Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll
new file mode 100644
index 0000000..9763660
--- /dev/null
+++ b/test/Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll
@@ -0,0 +1,148 @@
+; RUN: opt < %s -licm -disable-output
+; PR908
+; END.
+
+ %struct.alloc_chain = type { i8*, %struct.alloc_chain* }
+ %struct.oggpack_buffer = type { i32, i32, i8*, i8*, i32 }
+ %struct.vorbis_block = type { float**, %struct.oggpack_buffer, i32, i32, i32, i32, i32, i32, i64, i64, %struct.vorbis_dsp_state*, i8*, i32, i32, i32, %struct.alloc_chain*, i32, i32, i32, i32, i8* }
+ %struct.vorbis_dsp_state = type { i32, %struct.vorbis_info*, float**, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
+ %struct.vorbis_info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
+
+define fastcc void @_01forward() {
+entry:
+ br i1 false, label %bb222.preheader, label %bb241
+cond_true67: ; preds = %cond_true87
+ br label %cond_next80
+cond_next80: ; preds = %cond_true87, %cond_true67
+ br label %bb83
+bb83.preheader: ; preds = %cond_true226
+ br i1 false, label %bb83.us.preheader, label %bb83.preheader1
+bb83.us.preheader: ; preds = %bb83.preheader
+ br label %bb83.us
+bb83.us: ; preds = %cond_next80.us, %bb83.us.preheader
+ br i1 false, label %cond_true87.us, label %cond_next92.loopexit2
+cond_next80.us: ; preds = %bb59.loopexit.us, %cond_true67.us
+ br label %bb83.us
+cond_true67.us: ; preds = %bb59.loopexit.us
+ br label %cond_next80.us
+cond_next.us: ; preds = %cond_true56.us, %cond_true38.us
+ br i1 false, label %cond_true56.us, label %bb59.loopexit.us
+cond_true38.us: ; preds = %cond_true56.us
+ br label %cond_next.us
+cond_true56.us: ; preds = %cond_true87.us, %cond_next.us
+ br i1 false, label %cond_true38.us, label %cond_next.us
+cond_true87.us: ; preds = %bb83.us
+ br label %cond_true56.us
+bb59.loopexit.us: ; preds = %cond_next.us
+ br i1 false, label %cond_true67.us, label %cond_next80.us
+bb83.preheader1: ; preds = %bb83.preheader
+ br label %bb83
+bb83: ; preds = %bb83.preheader1, %cond_next80
+ br i1 false, label %cond_next92.loopexit, label %cond_true87
+cond_true87: ; preds = %bb83
+ br i1 false, label %cond_true67, label %cond_next80
+cond_next92.loopexit: ; preds = %bb83
+ br label %cond_next92
+cond_next92.loopexit2: ; preds = %bb83.us
+ br label %cond_next92
+cond_next92: ; preds = %cond_true226, %cond_next92.loopexit2, %cond_next92.loopexit
+ br i1 false, label %cond_true218.loopexit, label %bb222
+cond_true139: ; preds = %cond_true202
+ br i1 false, label %cond_next195, label %cond_true155
+cond_true155: ; preds = %cond_true139
+ br i1 false, label %cond_true249.i.preheader, label %_encodepart.exit
+cond_true.i: ; preds = %cond_true115.i
+ br i1 false, label %bb60.i.preheader, label %cond_next97.i
+bb60.i.preheader: ; preds = %cond_true.i
+ br label %bb60.i
+bb60.i: ; preds = %cond_true63.i, %bb60.i.preheader
+ br i1 false, label %cond_true63.i, label %cond_next97.i.loopexit
+cond_true63.i: ; preds = %bb60.i
+ br i1 false, label %bb60.i, label %cond_next97.i.loopexit
+bb86.i.preheader: ; preds = %cond_true115.i
+ br label %bb86.i
+bb86.i: ; preds = %cond_true93.i, %bb86.i.preheader
+ br i1 false, label %cond_true93.i, label %cond_next97.i.loopexit3
+cond_true93.i: ; preds = %bb86.i
+ br i1 false, label %cond_next97.i.loopexit3, label %bb86.i
+cond_next97.i.loopexit: ; preds = %cond_true63.i, %bb60.i
+ br label %cond_next97.i
+cond_next97.i.loopexit3: ; preds = %cond_true93.i, %bb86.i
+ br label %cond_next97.i
+cond_next97.i: ; preds = %cond_next97.i.loopexit3, %cond_next97.i.loopexit, %cond_true.i
+ br i1 false, label %bb118.i.loopexit, label %cond_true115.i
+cond_true115.i.preheader: ; preds = %cond_true249.i
+ br label %cond_true115.i
+cond_true115.i: ; preds = %cond_true115.i.preheader, %cond_next97.i
+ br i1 false, label %cond_true.i, label %bb86.i.preheader
+bb118.i.loopexit: ; preds = %cond_next97.i
+ br label %bb118.i
+bb118.i: ; preds = %cond_true249.i, %bb118.i.loopexit
+ br i1 false, label %cond_next204.i, label %cond_true128.i
+cond_true128.i: ; preds = %bb118.i
+ br i1 false, label %cond_true199.i.preheader, label %cond_next204.i
+cond_true199.i.preheader: ; preds = %cond_true128.i
+ br label %cond_true199.i
+cond_true199.i.us: ; No predecessors!
+ br i1 false, label %cond_true167.i.us, label %cond_next187.i.us
+cond_next187.i.us: ; preds = %bb170.i.loopexit.us, %bb170.i.us.cond_next187.i.us_crit_edge, %cond_true199.i.us
+ unreachable
+bb170.i.us.cond_next187.i.us_crit_edge: ; preds = %bb170.i.loopexit.us
+ br label %cond_next187.i.us
+cond_true167.i.us: ; preds = %cond_true167.i.us, %cond_true199.i.us
+ br i1 false, label %cond_true167.i.us, label %bb170.i.loopexit.us
+bb170.i.loopexit.us: ; preds = %cond_true167.i.us
+ br i1 false, label %cond_next187.i.us, label %bb170.i.us.cond_next187.i.us_crit_edge
+cond_true199.i: ; preds = %cond_true199.i, %cond_true199.i.preheader
+ br i1 false, label %cond_next204.i.loopexit, label %cond_true199.i
+cond_next204.i.loopexit: ; preds = %cond_true199.i
+ br label %cond_next204.i
+cond_next204.i: ; preds = %cond_next204.i.loopexit, %cond_true128.i, %bb118.i
+ br label %bb233.i
+cond_true230.i: ; No predecessors!
+ %exitcond155 = icmp eq i32 0, %tmp16.i ; <i1> [#uses=0]
+ unreachable
+bb233.i: ; preds = %cond_next204.i
+ br i1 false, label %_encodepart.exit.loopexit, label %cond_true249.i
+cond_true249.i.preheader: ; preds = %cond_true155
+ br label %cond_true249.i
+cond_true249.i: ; preds = %cond_true249.i.preheader, %bb233.i
+ %tmp16.i = bitcast i32 0 to i32 ; <i32> [#uses=1]
+ br i1 false, label %cond_true115.i.preheader, label %bb118.i
+_encodepart.exit.loopexit: ; preds = %bb233.i
+ br label %_encodepart.exit
+_encodepart.exit: ; preds = %_encodepart.exit.loopexit, %cond_true155
+ br label %cond_next195
+cond_next195: ; preds = %cond_true202, %_encodepart.exit, %cond_true139
+ br i1 false, label %bb205.loopexit, label %cond_true202
+cond_true202.preheader: ; preds = %cond_true218
+ br label %cond_true202
+cond_true202: ; preds = %cond_true202.preheader, %cond_next195
+ br i1 false, label %cond_next195, label %cond_true139
+bb205.loopexit: ; preds = %cond_next195
+ br label %bb205
+bb205: ; preds = %cond_true218, %bb205.loopexit
+ br i1 false, label %cond_true218, label %bb222.outer105.loopexit
+cond_true218.loopexit: ; preds = %cond_next92
+ br label %cond_true218
+cond_true218: ; preds = %cond_true218.loopexit, %bb205
+ br i1 false, label %cond_true202.preheader, label %bb205
+bb222.preheader: ; preds = %entry
+ br label %bb222.outer
+bb222.outer: ; preds = %bb229, %bb222.preheader
+ br label %bb222.outer105
+bb222.outer105.loopexit: ; preds = %bb205
+ br label %bb222.outer105
+bb222.outer105: ; preds = %bb222.outer105.loopexit, %bb222.outer
+ br label %bb222
+bb222: ; preds = %bb222.outer105, %cond_next92
+ br i1 false, label %cond_true226, label %bb229
+cond_true226: ; preds = %bb222
+ br i1 false, label %bb83.preheader, label %cond_next92
+bb229: ; preds = %bb222
+ br i1 false, label %bb222.outer, label %bb241.loopexit
+bb241.loopexit: ; preds = %bb229
+ br label %bb241
+bb241: ; preds = %bb241.loopexit, %entry
+ ret void
+}
diff --git a/test/Transforms/LICM/2007-05-22-VolatileSink.ll b/test/Transforms/LICM/2007-05-22-VolatileSink.ll
new file mode 100644
index 0000000..c12e13b
--- /dev/null
+++ b/test/Transforms/LICM/2007-05-22-VolatileSink.ll
@@ -0,0 +1,56 @@
+; RUN: opt < %s -licm -S | grep {volatile store}
+; PR1435
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define void @Transpose(i32* %DataIn, i32* %DataOut) {
+entry:
+ %buffer = alloca [64 x i32], align 16 ; <[64 x i32]*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ br label %bb6
+
+bb: ; preds = %bb6
+ %tmp2 = volatile load i32* %DataIn ; <i32> [#uses=1]
+ %tmp3 = getelementptr [64 x i32]* %buffer, i32 0, i32 %i.0 ; <i32*> [#uses=1]
+ store i32 %tmp2, i32* %tmp3
+ %tmp5 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %bb6
+
+bb6: ; preds = %bb, %entry
+ %i.0 = phi i32 [ 0, %entry ], [ %tmp5, %bb ] ; <i32> [#uses=3]
+ %tmp8 = icmp sle i32 %i.0, 63 ; <i1> [#uses=1]
+ %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb30
+
+bb12: ; preds = %bb22
+ %tmp14 = mul i32 %j.1, 8 ; <i32> [#uses=1]
+ %tmp16 = add i32 %tmp14, %i.1 ; <i32> [#uses=1]
+ %tmp17 = getelementptr [64 x i32]* %buffer, i32 0, i32 %tmp16 ; <i32*> [#uses=1]
+ %tmp18 = load i32* %tmp17 ; <i32> [#uses=1]
+ volatile store i32 %tmp18, i32* %DataOut
+ %tmp21 = add i32 %j.1, 1 ; <i32> [#uses=1]
+ br label %bb22
+
+bb22: ; preds = %bb30, %bb12
+ %j.1 = phi i32 [ %tmp21, %bb12 ], [ 0, %bb30 ] ; <i32> [#uses=4]
+ %tmp24 = icmp sle i32 %j.1, 7 ; <i1> [#uses=1]
+ %tmp2425 = zext i1 %tmp24 to i8 ; <i8> [#uses=1]
+ %toBool26 = icmp ne i8 %tmp2425, 0 ; <i1> [#uses=1]
+ br i1 %toBool26, label %bb12, label %bb27
+
+bb27: ; preds = %bb22
+ %tmp29 = add i32 %i.1, 1 ; <i32> [#uses=1]
+ br label %bb30
+
+bb30: ; preds = %bb27, %bb6
+ %j.0 = phi i32 [ %j.1, %bb27 ], [ undef, %bb6 ] ; <i32> [#uses=0]
+ %i.1 = phi i32 [ %tmp29, %bb27 ], [ 0, %bb6 ] ; <i32> [#uses=3]
+ %tmp32 = icmp sle i32 %i.1, 7 ; <i1> [#uses=1]
+ %tmp3233 = zext i1 %tmp32 to i8 ; <i8> [#uses=1]
+ %toBool34 = icmp ne i8 %tmp3233, 0 ; <i1> [#uses=1]
+ br i1 %toBool34, label %bb22, label %return
+
+return: ; preds = %bb30
+ ret void
+}
diff --git a/test/Transforms/LICM/2007-07-30-AliasSet.ll b/test/Transforms/LICM/2007-07-30-AliasSet.ll
new file mode 100644
index 0000000..8ecd1bc
--- /dev/null
+++ b/test/Transforms/LICM/2007-07-30-AliasSet.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -licm -loop-unswitch -disable-output
+ %struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] }
+ %struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] }
+
+define i32 @scale_bitcount_lsf(%struct.III_scalefac_t* %scalefac, %struct.gr_info* %cod_info) {
+entry:
+ br i1 false, label %bb28, label %bb133.preheader
+
+bb133.preheader: ; preds = %entry
+ ret i32 0
+
+bb28: ; preds = %entry
+ br i1 false, label %bb63.outer, label %bb79
+
+bb63.outer: ; preds = %bb73, %bb28
+ br i1 false, label %bb35, label %bb73
+
+bb35: ; preds = %cond_next60, %bb63.outer
+ %window.34 = phi i32 [ %tmp62, %cond_next60 ], [ 0, %bb63.outer ] ; <i32> [#uses=1]
+ %tmp44 = getelementptr [4 x i32]* null, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp46 = load i32* %tmp44, align 4 ; <i32> [#uses=0]
+ br i1 false, label %cond_true50, label %cond_next60
+
+cond_true50: ; preds = %bb35
+ %tmp59 = getelementptr [4 x i32]* null, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp59, align 4
+ br label %cond_next60
+
+cond_next60: ; preds = %cond_true50, %bb35
+ %tmp62 = add i32 %window.34, 1 ; <i32> [#uses=1]
+ br i1 false, label %bb35, label %bb73
+
+bb73: ; preds = %cond_next60, %bb63.outer
+ %tmp76 = icmp slt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp76, label %bb63.outer, label %bb79
+
+bb79: ; preds = %bb73, %bb28
+ ret i32 0
+}
diff --git a/test/Transforms/LICM/2007-09-17-PromoteValue.ll b/test/Transforms/LICM/2007-09-17-PromoteValue.ll
new file mode 100644
index 0000000..31abd8c
--- /dev/null
+++ b/test/Transforms/LICM/2007-09-17-PromoteValue.ll
@@ -0,0 +1,61 @@
+; ModuleID = 'PR1657.bc'
+; Do not promote getelementptr because it may exposes load from a null pointer
+; and store from a null pointer which are covered by
+; icmp eq %struct.decision* null, null condition.
+; RUN: opt < %s -licm -S | not grep promoted
+ %struct.decision = type { i8, %struct.decision* }
+
+define i32 @main() {
+entry:
+ br label %blah.i
+
+blah.i: ; preds = %cond_true.i, %entry
+ %tmp3.i = icmp eq %struct.decision* null, null ; <i1> [#uses=1]
+ br i1 %tmp3.i, label %clear_modes.exit, label %cond_true.i
+
+cond_true.i: ; preds = %blah.i
+ %tmp1.i = getelementptr %struct.decision* null, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp1.i
+ br label %blah.i
+
+clear_modes.exit: ; preds = %blah.i
+ call void @exit( i32 0 )
+ unreachable
+}
+
+define i32 @f(i8* %ptr) {
+entry:
+ br label %loop.head
+
+loop.head: ; preds = %cond.true, %entry
+ %x = phi i8* [ %ptr, %entry ], [ %ptr.i, %cond.true ] ; <i8*> [#uses=1]
+ %tmp3.i = icmp ne i8* %ptr, %x ; <i1> [#uses=1]
+ br i1 %tmp3.i, label %cond.true, label %exit
+
+cond.true: ; preds = %loop.head
+ %ptr.i = getelementptr i8* %ptr, i32 0 ; <i8*> [#uses=2]
+ store i8 0, i8* %ptr.i
+ br label %loop.head
+
+exit: ; preds = %loop.head
+ ret i32 0
+}
+
+define i32 @f2(i8* %p, i8* %q) {
+entry:
+ br label %loop.head
+
+loop.head: ; preds = %cond.true, %entry
+ %tmp3.i = icmp eq i8* null, %q ; <i1> [#uses=1]
+ br i1 %tmp3.i, label %exit, label %cond.true
+
+cond.true: ; preds = %loop.head
+ %ptr.i = getelementptr i8* %p, i32 0 ; <i8*> [#uses=2]
+ store i8 0, i8* %ptr.i
+ br label %loop.head
+
+exit: ; preds = %loop.head
+ ret i32 0
+}
+
+declare void @exit(i32)
diff --git a/test/Transforms/LICM/2007-09-24-PromoteNullValue.ll b/test/Transforms/LICM/2007-09-24-PromoteNullValue.ll
new file mode 100644
index 0000000..916f479
--- /dev/null
+++ b/test/Transforms/LICM/2007-09-24-PromoteNullValue.ll
@@ -0,0 +1,46 @@
+; Do not promote null value because it may be unsafe to do so.
+; RUN: opt < %s -licm -S | not grep promoted
+
+define i32 @f(i32 %foo, i32 %bar, i32 %com) {
+entry:
+ %tmp2 = icmp eq i32 %foo, 0 ; <i1> [#uses=1]
+ br i1 %tmp2, label %cond_next, label %cond_true
+
+cond_true: ; preds = %entry
+ br label %return
+
+cond_next: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb15, %cond_next
+ switch i32 %bar, label %bb15 [
+ i32 1, label %bb6
+ ]
+
+bb6: ; preds = %bb
+ %tmp8 = icmp eq i32 %com, 0 ; <i1> [#uses=1]
+ br i1 %tmp8, label %cond_next14, label %cond_true11
+
+cond_true11: ; preds = %bb6
+ br label %return
+
+cond_next14: ; preds = %bb6
+ store i8 0, i8* null
+ br label %bb15
+
+bb15: ; preds = %cond_next14, %bb
+ br label %bb
+
+return: ; preds = %cond_true11, %cond_true
+ %storemerge = phi i32 [ 0, %cond_true ], [ undef, %cond_true11 ] ; <i32> [#uses=1]
+ ret i32 %storemerge
+}
+
+define i32 @kdMain() {
+entry:
+ %tmp1 = call i32 @f( i32 0, i32 1, i32 1 ) ; <i32> [#uses=0]
+ call void @exit( i32 0 )
+ unreachable
+}
+
+declare void @exit(i32)
diff --git a/test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll b/test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll
new file mode 100644
index 0000000..59f1dcb
--- /dev/null
+++ b/test/Transforms/LICM/2007-10-01-PromoteSafeValue.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -licm -S | grep promoted
+; Promote value if at least one use is safe
+
+
+define i32 @f2(i32* %p, i8* %q) {
+entry:
+ br label %loop.head
+
+loop.head: ; preds = %cond.true, %entry
+ store i32 20, i32* %p
+ %tmp3.i = icmp eq i8* null, %q ; <i1> [#uses=1]
+ br i1 %tmp3.i, label %exit, label %cond.true
+
+cond.true: ; preds = %loop.head
+ store i32 40, i32* %p
+ br label %loop.head
+
+exit: ; preds = %loop.head
+ ret i32 0
+}
+
diff --git a/test/Transforms/LICM/2008-05-20-AliasSetVAArg.ll b/test/Transforms/LICM/2008-05-20-AliasSetVAArg.ll
new file mode 100644
index 0000000..a5a7bf8
--- /dev/null
+++ b/test/Transforms/LICM/2008-05-20-AliasSetVAArg.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -licm -disable-output
+; PR2346
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-pc-linux-gnu"
+ %struct._zval_struct = type { %union._double, i32, i8, i8, i8, i8 }
+ %union._double = type { double }
+
+define i8* @zend_fetch_resource(%struct._zval_struct** %passed_id, i32 %default_id, i8* %resource_type_name, i32* %found_resource_type, i32 %num_resource_types, ...) {
+entry:
+ br label %whilebody.i.i
+
+whilebody.i.i: ; preds = %whilebody.i.i, %entry
+ br i1 false, label %ifthen.i.i, label %whilebody.i.i
+
+ifthen.i.i: ; preds = %whilebody.i.i
+ br label %forcond
+
+forcond: ; preds = %forbody, %ifthen.i.i
+ br i1 false, label %forbody, label %afterfor
+
+forbody: ; preds = %forcond
+ va_arg i8** null, i32 ; <i32>:0 [#uses=0]
+ br i1 false, label %ifthen59, label %forcond
+
+ifthen59: ; preds = %forbody
+ unreachable
+
+afterfor: ; preds = %forcond
+ ret i8* null
+}
diff --git a/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll b/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll
new file mode 100644
index 0000000..10b00ba
--- /dev/null
+++ b/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -licm -S | FileCheck %s
+
+@a = external constant float*
+
+define void @test(i32 %count) {
+entry:
+ br label %forcond
+
+; CHECK: %tmp3 = load float** @a
+; CHECK: br label %forcond
+
+forcond:
+ %i.0 = phi i32 [ 0, %entry ], [ %inc, %forbody ]
+ %cmp = icmp ult i32 %i.0, %count
+ br i1 %cmp, label %forbody, label %afterfor
+
+; CHECK: %i.0 = phi i32 [ 0, %entry ], [ %inc, %forbody ]
+; CHECK: %cmp = icmp ult i32 %i.0, %count
+; CHECK: br i1 %cmp, label %forbody, label %afterfor
+
+forbody:
+ %tmp3 = load float** @a
+ %arrayidx = getelementptr float* %tmp3, i32 %i.0
+ %tmp7 = uitofp i32 %i.0 to float
+ store float %tmp7, float* %arrayidx
+ %inc = add i32 %i.0, 1
+ br label %forcond
+
+; CHECK: %arrayidx = getelementptr float* %tmp3, i32 %i.0
+; CHECK: %tmp7 = uitofp i32 %i.0 to float
+; CHECK: store float %tmp7, float* %arrayidx
+; CHECK: %inc = add i32 %i.0, 1
+; CHECK: br label %forcond
+
+afterfor:
+ ret void
+}
+
+; CHECK: ret void
diff --git a/test/Transforms/LICM/2009-03-25-AliasSetTracker.ll b/test/Transforms/LICM/2009-03-25-AliasSetTracker.ll
new file mode 100644
index 0000000..d1fe48c
--- /dev/null
+++ b/test/Transforms/LICM/2009-03-25-AliasSetTracker.ll
@@ -0,0 +1,39 @@
+
+; RUN: opt < %s -licm -loop-index-split -instcombine -disable-output
+
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+@"\01LC81" = external constant [4 x i8] ; <[4 x i8]*> [#uses=1]
+
+define fastcc void @hex_dump_internal(i8* %avcl, %struct.FILE* %f, i32 %level, i8* nocapture %buf, i32 %size) nounwind {
+entry:
+ br i1 false, label %bb4, label %return
+
+bb4: ; preds = %bb30, %entry
+ br label %bb6
+
+bb6: ; preds = %bb15, %bb4
+ %j.0.reg2mem.0 = phi i32 [ %2, %bb15 ], [ 0, %bb4 ] ; <i32> [#uses=2]
+ %0 = icmp slt i32 %j.0.reg2mem.0, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb7, label %bb13
+
+bb7: ; preds = %bb6
+ br label %bb15
+
+bb13: ; preds = %bb6
+ %1 = tail call i32 @fwrite(i8* getelementptr ([4 x i8]* @"\01LC81", i32 0, i32 0), i32 1, i32 3, i8* null) nounwind ; <i32> [#uses=0]
+ br label %bb15
+
+bb15: ; preds = %bb13, %bb7
+ %2 = add i32 %j.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %3 = icmp sgt i32 %2, 15 ; <i1> [#uses=1]
+ br i1 %3, label %bb30, label %bb6
+
+bb30: ; preds = %bb15
+ br i1 false, label %bb4, label %return
+
+return: ; preds = %bb30, %entry
+ ret void
+}
+
+declare i32 @fwrite(i8* nocapture, i32, i32, i8* nocapture) nounwind
diff --git a/test/Transforms/LICM/2009-12-10-LICM-Indbr-Crash.ll b/test/Transforms/LICM/2009-12-10-LICM-Indbr-Crash.ll
new file mode 100644
index 0000000..e3cdbb3
--- /dev/null
+++ b/test/Transforms/LICM/2009-12-10-LICM-Indbr-Crash.ll
@@ -0,0 +1,21 @@
+; Test for rdar://7452967
+; RUN: opt < %s -licm -disable-output
+define void @foo (i8* %v)
+{
+ entry:
+ br i1 undef, label %preheader, label %return
+
+ preheader:
+ br i1 undef, label %loop, label %return
+
+ loop:
+ indirectbr i8* undef, [label %preheader, label %stuff]
+
+ stuff:
+ %0 = load i8* undef, align 1
+ br label %loop
+
+ return:
+ ret void
+
+}
diff --git a/test/Transforms/LICM/Preserve-LCSSA.ll b/test/Transforms/LICM/Preserve-LCSSA.ll
new file mode 100644
index 0000000..832d762
--- /dev/null
+++ b/test/Transforms/LICM/Preserve-LCSSA.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -loop-rotate -licm -loop-unswitch -disable-output -verify-loop-info -verify-dom-info
+
+define i32 @stringSearch_Clib(i32 %count) {
+entry:
+ br i1 false, label %bb36, label %bb44
+
+bb4: ; preds = %bb36
+ br i1 false, label %cond_next, label %cond_true
+
+cond_true: ; preds = %bb4
+ ret i32 0
+
+cond_next: ; preds = %bb4
+ ret i32 0
+
+bb36: ; preds = %bb41, %entry
+ br i1 false, label %bb4, label %bb41
+
+bb41: ; preds = %bb36
+ %ttmp2 = icmp slt i32 0, %count ; <i1> [#uses=1]
+ br i1 %ttmp2, label %bb36, label %bb44
+
+bb44: ; preds = %bb41, %entry
+ ret i32 0
+}
diff --git a/test/Transforms/LICM/basictest.ll b/test/Transforms/LICM/basictest.ll
new file mode 100644
index 0000000..1dbb4dc
--- /dev/null
+++ b/test/Transforms/LICM/basictest.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -licm | llvm-dis
+
+define void @testfunc(i32 %i) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %j = phi i32 [ 0, %0 ], [ %Next, %Loop ] ; <i32> [#uses=1]
+ %i2 = mul i32 %i, 17 ; <i32> [#uses=1]
+ %Next = add i32 %j, %i2 ; <i32> [#uses=2]
+ %cond = icmp eq i32 %Next, 0 ; <i1> [#uses=1]
+ br i1 %cond, label %Out, label %Loop
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LICM/dg.exp b/test/Transforms/LICM/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LICM/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LICM/hoisting.ll b/test/Transforms/LICM/hoisting.ll
new file mode 100644
index 0000000..e7d36af
--- /dev/null
+++ b/test/Transforms/LICM/hoisting.ll
@@ -0,0 +1,50 @@
+; RUN: opt < %s -licm -S | FileCheck %s
+
+@X = global i32 0 ; <i32*> [#uses=1]
+
+declare void @foo()
+
+; This testcase tests for a problem where LICM hoists
+; potentially trapping instructions when they are not guaranteed to execute.
+define i32 @test1(i1 %c) {
+; CHECK: @test1
+ %A = load i32* @X ; <i32> [#uses=2]
+ br label %Loop
+Loop: ; preds = %LoopTail, %0
+ call void @foo( )
+ br i1 %c, label %LoopTail, label %IfUnEqual
+
+IfUnEqual: ; preds = %Loop
+; CHECK: IfUnEqual:
+; CHECK-NEXT: sdiv i32 4, %A
+ %B1 = sdiv i32 4, %A ; <i32> [#uses=1]
+ br label %LoopTail
+
+LoopTail: ; preds = %IfUnEqual, %Loop
+ %B = phi i32 [ 0, %Loop ], [ %B1, %IfUnEqual ] ; <i32> [#uses=1]
+ br i1 %c, label %Loop, label %Out
+Out: ; preds = %LoopTail
+ %C = sub i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
+
+
+declare void @foo2(i32)
+
+
+;; It is ok and desirable to hoist this potentially trapping instruction.
+define i32 @test2(i1 %c) {
+; CHECK: @test2
+; CHECK-NEXT: load i32* @X
+; CHECK-NEXT: %B = sdiv i32 4, %A
+ %A = load i32* @X ; <i32> [#uses=2]
+ br label %Loop
+Loop:
+ ;; Should have hoisted this div!
+ %B = sdiv i32 4, %A ; <i32> [#uses=2]
+ call void @foo2( i32 %B )
+ br i1 %c, label %Loop, label %Out
+Out: ; preds = %Loop
+ %C = sub i32 %A, %B ; <i32> [#uses=1]
+ ret i32 %C
+}
diff --git a/test/Transforms/LICM/no-preheader-test.ll b/test/Transforms/LICM/no-preheader-test.ll
new file mode 100644
index 0000000..bd3eea3
--- /dev/null
+++ b/test/Transforms/LICM/no-preheader-test.ll
@@ -0,0 +1,20 @@
+; Test that LICM works when there is not a loop-preheader
+; RUN: opt < %s -licm | llvm-dis
+
+define void @testfunc(i32 %i.s, i1 %ifcond) {
+ br i1 %ifcond, label %Then, label %Else
+Then: ; preds = %0
+ br label %Loop
+Else: ; preds = %0
+ br label %Loop
+Loop: ; preds = %Loop, %Else, %Then
+ %j = phi i32 [ 0, %Then ], [ 12, %Else ], [ %Next, %Loop ] ; <i32> [#uses=1]
+ %i = bitcast i32 %i.s to i32 ; <i32> [#uses=1]
+ %i2 = mul i32 %i, 17 ; <i32> [#uses=1]
+ %Next = add i32 %j, %i2 ; <i32> [#uses=2]
+ %cond = icmp eq i32 %Next, 0 ; <i1> [#uses=1]
+ br i1 %cond, label %Out, label %Loop
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LICM/scalar_promote.ll b/test/Transforms/LICM/scalar_promote.ll
new file mode 100644
index 0000000..ef28c38
--- /dev/null
+++ b/test/Transforms/LICM/scalar_promote.ll
@@ -0,0 +1,73 @@
+; RUN: opt < %s -licm -S | FileCheck %s
+@X = global i32 7 ; <i32*> [#uses=4]
+
+define void @test1(i32 %i) {
+Entry:
+ br label %Loop
+; CHECK: @test1
+; CHECK: Entry:
+; CHECK-NEXT: load i32* @X
+; CHECK-NEXT: br label %Loop
+
+
+Loop: ; preds = %Loop, %0
+ %j = phi i32 [ 0, %Entry ], [ %Next, %Loop ] ; <i32> [#uses=1]
+ %x = load i32* @X ; <i32> [#uses=1]
+ %x2 = add i32 %x, 1 ; <i32> [#uses=1]
+ store i32 %x2, i32* @X
+ %Next = add i32 %j, 1 ; <i32> [#uses=2]
+ %cond = icmp eq i32 %Next, 0 ; <i1> [#uses=1]
+ br i1 %cond, label %Out, label %Loop
+
+Out:
+ ret void
+; CHECK: Out:
+; CHECK-NEXT: store i32 %x2, i32* @X
+; CHECK-NEXT: ret void
+
+}
+
+define void @test2(i32 %i) {
+Entry:
+ br label %Loop
+; CHECK: @test2
+; CHECK: Entry:
+; CHECK-NEXT: %X1 = getelementptr i32* @X, i64 0
+; CHECK-NEXT: %X2 = getelementptr i32* @X, i64 0
+; CHECK-NEXT: %X1.promoted = load i32* %X1
+; CHECK-NEXT: br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %X1 = getelementptr i32* @X, i64 0 ; <i32*> [#uses=1]
+ %A = load i32* %X1 ; <i32> [#uses=1]
+ %V = add i32 %A, 1 ; <i32> [#uses=1]
+ %X2 = getelementptr i32* @X, i64 0 ; <i32*> [#uses=1]
+ store i32 %V, i32* %X2
+ br i1 false, label %Loop, label %Exit
+
+Exit: ; preds = %Loop
+ ret void
+; CHECK: Exit:
+; CHECK-NEXT: store i32 %V, i32* %X1
+; CHECK-NEXT: ret void
+}
+
+
+
+define void @test3(i32 %i) {
+; CHECK: @test3
+ br label %Loop
+Loop:
+ ; Should not promote this to a register
+ %x = volatile load i32* @X
+ %x2 = add i32 %x, 1
+ store i32 %x2, i32* @X
+ br i1 true, label %Out, label %Loop
+
+; CHECK: Loop:
+; CHECK-NEXT: volatile load
+
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LICM/sinking.ll b/test/Transforms/LICM/sinking.ll
new file mode 100644
index 0000000..11112eb
--- /dev/null
+++ b/test/Transforms/LICM/sinking.ll
@@ -0,0 +1,235 @@
+; RUN: opt < %s -basicaa -licm -S | FileCheck %s
+
+declare i32 @strlen(i8*) readonly
+
+declare void @foo()
+
+; Sink readonly function.
+define i32 @test1(i8* %P) {
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ %A = call i32 @strlen( i8* %P ) readonly
+ br i1 false, label %Loop, label %Out
+
+Out: ; preds = %Loop
+ ret i32 %A
+; CHECK: @test1
+; CHECK: Out:
+; CHECK-NEXT: call i32 @strlen
+; CHECK-NEXT: ret i32 %A
+}
+
+declare double @sin(double) readnone
+
+; Sink readnone function out of loop with unknown memory behavior.
+define double @test2(double %X) {
+ br label %Loop
+
+Loop: ; preds = %Loop, %0
+ call void @foo( )
+ %A = call double @sin( double %X ) readnone
+ br i1 true, label %Loop, label %Out
+
+Out: ; preds = %Loop
+ ret double %A
+; CHECK: @test2
+; CHECK: Out:
+; CHECK-NEXT: call double @sin
+; CHECK-NEXT: ret double %A
+}
+
+; This testcase checks to make sure the sinker does not cause problems with
+; critical edges.
+define void @test3() {
+Entry:
+ br i1 false, label %Loop, label %Exit
+Loop:
+ %X = add i32 0, 1
+ br i1 false, label %Loop, label %Exit
+Exit:
+ %Y = phi i32 [ 0, %Entry ], [ %X, %Loop ]
+ ret void
+
+; CHECK: @test3
+; CHECK: Exit.loopexit:
+; CHECK-NEXT: %X = add i32 0, 1
+; CHECK-NEXT: br label %Exit
+
+}
+
+; If the result of an instruction is only used outside of the loop, sink
+; the instruction to the exit blocks instead of executing it on every
+; iteration of the loop.
+;
+define i32 @test4(i32 %N) {
+Entry:
+ br label %Loop
+Loop: ; preds = %Loop, %Entry
+ %N_addr.0.pn = phi i32 [ %dec, %Loop ], [ %N, %Entry ]
+ %tmp.6 = mul i32 %N, %N_addr.0.pn ; <i32> [#uses=1]
+ %tmp.7 = sub i32 %tmp.6, %N ; <i32> [#uses=1]
+ %dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
+ %tmp.1 = icmp ne i32 %N_addr.0.pn, 1 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret i32 %tmp.7
+; CHECK: @test4
+; CHECK: Out:
+; CHECK-NEXT: mul i32 %N, %N_addr.0.pn
+; CHECK-NEXT: sub i32 %tmp.6, %N
+; CHECK-NEXT: ret i32
+}
+
+; To reduce register pressure, if a load is hoistable out of the loop, and the
+; result of the load is only used outside of the loop, sink the load instead of
+; hoisting it!
+;
+@X = global i32 5 ; <i32*> [#uses=1]
+
+define i32 @test5(i32 %N) {
+Entry:
+ br label %Loop
+Loop: ; preds = %Loop, %Entry
+ %N_addr.0.pn = phi i32 [ %dec, %Loop ], [ %N, %Entry ]
+ %tmp.6 = load i32* @X ; <i32> [#uses=1]
+ %dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
+ %tmp.1 = icmp ne i32 %N_addr.0.pn, 1 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret i32 %tmp.6
+; CHECK: @test5
+; CHECK: Out:
+; CHECK-NEXT: %tmp.6 = load i32* @X
+; CHECK-NEXT: ret i32 %tmp.6
+}
+
+
+
+; The loop sinker was running from the bottom of the loop to the top, causing
+; it to miss opportunities to sink instructions that depended on sinking other
+; instructions from the loop. Instead they got hoisted, which is better than
+; leaving them in the loop, but increases register pressure pointlessly.
+
+ %Ty = type { i32, i32 }
+@X2 = external global %Ty
+
+define i32 @test6() {
+ br label %Loop
+Loop:
+ %dead = getelementptr %Ty* @X2, i64 0, i32 0
+ %sunk2 = load i32* %dead
+ br i1 false, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret i32 %sunk2
+; CHECK: @test6
+; CHECK: Out:
+; CHECK-NEXT: %dead = getelementptr %Ty* @X2, i64 0, i32 0
+; CHECK-NEXT: %sunk2 = load i32* %dead
+; CHECK-NEXT: ret i32 %sunk2
+}
+
+
+
+; This testcase ensures that we can sink instructions from loops with
+; multiple exits.
+;
+define i32 @test7(i32 %N, i1 %C) {
+Entry:
+ br label %Loop
+Loop: ; preds = %ContLoop, %Entry
+ %N_addr.0.pn = phi i32 [ %dec, %ContLoop ], [ %N, %Entry ]
+ %tmp.6 = mul i32 %N, %N_addr.0.pn
+ %tmp.7 = sub i32 %tmp.6, %N ; <i32> [#uses=2]
+ %dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
+ br i1 %C, label %ContLoop, label %Out1
+ContLoop:
+ %tmp.1 = icmp ne i32 %N_addr.0.pn, 1
+ br i1 %tmp.1, label %Loop, label %Out2
+Out1: ; preds = %Loop
+ ret i32 %tmp.7
+Out2: ; preds = %ContLoop
+ ret i32 %tmp.7
+; CHECK: @test7
+; CHECK: Out1:
+; CHECK-NEXT: mul i32 %N, %N_addr.0.pn
+; CHECK-NEXT: sub i32 %tmp.6, %N
+; CHECK-NEXT: ret
+; CHECK: Out2:
+; CHECK-NEXT: mul i32 %N, %N_addr.0.pn
+; CHECK-NEXT: sub i32 %tmp.6
+; CHECK-NEXT: ret
+}
+
+
+; This testcase checks to make sure we can sink values which are only live on
+; some exits out of the loop, and that we can do so without breaking dominator
+; info.
+define i32 @test8(i1 %C1, i1 %C2, i32* %P, i32* %Q) {
+Entry:
+ br label %Loop
+Loop: ; preds = %Cont, %Entry
+ br i1 %C1, label %Cont, label %exit1
+Cont: ; preds = %Loop
+ %X = load i32* %P ; <i32> [#uses=2]
+ store i32 %X, i32* %Q
+ %V = add i32 %X, 1 ; <i32> [#uses=1]
+ br i1 %C2, label %Loop, label %exit2
+exit1: ; preds = %Loop
+ ret i32 0
+exit2: ; preds = %Cont
+ ret i32 %V
+; CHECK: @test8
+; CHECK: exit1:
+; CHECK-NEXT: ret i32 0
+; CHECK: exit2:
+; CHECK-NEXT: %V = add i32 %X, 1
+; CHECK-NEXT: ret i32 %V
+}
+
+
+define void @test9() {
+loopentry.2.i:
+ br i1 false, label %no_exit.1.i.preheader, label %loopentry.3.i.preheader
+no_exit.1.i.preheader: ; preds = %loopentry.2.i
+ br label %no_exit.1.i
+no_exit.1.i: ; preds = %endif.8.i, %no_exit.1.i.preheader
+ br i1 false, label %return.i, label %endif.8.i
+endif.8.i: ; preds = %no_exit.1.i
+ %inc.1.i = add i32 0, 1 ; <i32> [#uses=1]
+ br i1 false, label %no_exit.1.i, label %loopentry.3.i.preheader.loopexit
+loopentry.3.i.preheader.loopexit: ; preds = %endif.8.i
+ br label %loopentry.3.i.preheader
+loopentry.3.i.preheader: ; preds = %loopentry.3.i.preheader.loopexit, %loopentry.2.i
+ %arg_num.0.i.ph13000 = phi i32 [ 0, %loopentry.2.i ], [ %inc.1.i, %loopentry.3.i.preheader.loopexit ] ; <i32> [#uses=0]
+ ret void
+return.i: ; preds = %no_exit.1.i
+ ret void
+
+; CHECK: @test9
+; CHECK: loopentry.3.i.preheader.loopexit:
+; CHECK-NEXT: %inc.1.i = add i32 0, 1
+; CHECK-NEXT: br label %loopentry.3.i.preheader
+}
+
+
+; Potentially trapping instructions may be sunk as long as they are guaranteed
+; to be executed.
+define i32 @test10(i32 %N) {
+Entry:
+ br label %Loop
+Loop: ; preds = %Loop, %Entry
+ %N_addr.0.pn = phi i32 [ %dec, %Loop ], [ %N, %Entry ] ; <i32> [#uses=3]
+ %tmp.6 = sdiv i32 %N, %N_addr.0.pn ; <i32> [#uses=1]
+ %dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
+ %tmp.1 = icmp ne i32 %N_addr.0.pn, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret i32 %tmp.6
+
+; CHECK: @test10
+; CHECK: Out:
+; CHECK-NEXT: %tmp.6 = sdiv i32 %N, %N_addr.0.pn
+; CHECK-NEXT: ret i32 %tmp.6
+}
+
diff --git a/test/Transforms/LoopDeletion/2007-07-23-InfiniteLoop.ll b/test/Transforms/LoopDeletion/2007-07-23-InfiniteLoop.ll
new file mode 100644
index 0000000..bcc73fd
--- /dev/null
+++ b/test/Transforms/LoopDeletion/2007-07-23-InfiniteLoop.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -loop-deletion -S | grep switch
+; PR 1564
+
+define fastcc void @out() {
+ start:
+ br label %loop
+ unreachable:
+ unreachable
+ loop:
+ switch i32 0, label %unreachable [
+ i32 0, label %loop
+ ]
+}
diff --git a/test/Transforms/LoopDeletion/2008-05-06-Phi.ll b/test/Transforms/LoopDeletion/2008-05-06-Phi.ll
new file mode 100644
index 0000000..4fc6378
--- /dev/null
+++ b/test/Transforms/LoopDeletion/2008-05-06-Phi.ll
@@ -0,0 +1,109 @@
+; RUN: opt < %s -inline -tailduplicate -instcombine -jump-threading -licm -loop-unswitch -instcombine -indvars -loop-deletion -gvn -simplifycfg -verify -disable-output
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+ %struct.BF_BitstreamElement = type { i32, i16 }
+ %struct.BF_BitstreamPart = type { i32, %struct.BF_BitstreamElement* }
+ %struct.BF_PartHolder = type { i32, %struct.BF_BitstreamPart* }
+ %struct.Bit_stream_struc = type { i8*, i32, %struct.FILE*, i8*, i32, i32, i32, i32 }
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] }
+ %struct.III_side_info_t = type { i32, i32, i32, [2 x [4 x i32]], [2 x %struct.anon] }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.anon = type { [2 x %struct.gr_info_ss] }
+ %struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] }
+ %struct.gr_info_ss = type { %struct.gr_info }
+ %struct.lame_global_flags = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
+@scaleFactorsPH = external global [2 x [2 x %struct.BF_PartHolder*]] ; <[2 x [2 x %struct.BF_PartHolder*]]*> [#uses=1]
+@slen1_tab = external constant [16 x i32] ; <[16 x i32]*> [#uses=1]
+
+declare %struct.BF_PartHolder* @BF_addElement(%struct.BF_PartHolder*, %struct.BF_BitstreamElement*) nounwind
+
+define %struct.BF_PartHolder* @BF_addEntry(%struct.BF_PartHolder* %thePH, i32 %value, i32 %length) nounwind {
+entry:
+ %myElement = alloca %struct.BF_BitstreamElement ; <%struct.BF_BitstreamElement*> [#uses=2]
+ %tmp1 = getelementptr %struct.BF_BitstreamElement* %myElement, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 %value, i32* %tmp1, align 8
+ %tmp7 = icmp eq i32 %length, 0 ; <i1> [#uses=1]
+ br i1 %tmp7, label %bb13, label %bb
+
+bb: ; preds = %entry
+ %tmp10 = call %struct.BF_PartHolder* @BF_addElement( %struct.BF_PartHolder* %thePH, %struct.BF_BitstreamElement* %myElement ) nounwind ; <%struct.BF_PartHolder*> [#uses=1]
+ ret %struct.BF_PartHolder* %tmp10
+
+bb13: ; preds = %entry
+ ret %struct.BF_PartHolder* %thePH
+}
+
+define void @III_format_bitstream(%struct.lame_global_flags* %gfp, i32 %bitsPerFrame, [2 x [576 x i32]]* %l3_enc, %struct.III_side_info_t* %l3_side, [2 x %struct.III_scalefac_t]* %scalefac, %struct.Bit_stream_struc* %in_bs) nounwind {
+entry:
+ call fastcc void @encodeMainData( %struct.lame_global_flags* %gfp, [2 x [576 x i32]]* %l3_enc, %struct.III_side_info_t* %l3_side, [2 x %struct.III_scalefac_t]* %scalefac ) nounwind
+ unreachable
+}
+
+define internal fastcc void @encodeMainData(%struct.lame_global_flags* %gfp, [2 x [576 x i32]]* %l3_enc, %struct.III_side_info_t* %si, [2 x %struct.III_scalefac_t]* %scalefac) nounwind {
+entry:
+ %tmp69 = getelementptr %struct.lame_global_flags* %gfp, i32 0, i32 43 ; <i32*> [#uses=1]
+ %tmp70 = load i32* %tmp69, align 4 ; <i32> [#uses=1]
+ %tmp71 = icmp eq i32 %tmp70, 1 ; <i1> [#uses=1]
+ br i1 %tmp71, label %bb352, label %bb498
+
+bb113: ; preds = %bb132
+ %tmp123 = getelementptr [2 x %struct.III_scalefac_t]* %scalefac, i32 0, i32 0, i32 1, i32 %sfb.0, i32 %window.0 ; <i32*> [#uses=1]
+ %tmp124 = load i32* %tmp123, align 4 ; <i32> [#uses=1]
+ %tmp126 = load %struct.BF_PartHolder** %tmp80, align 4 ; <%struct.BF_PartHolder*> [#uses=1]
+ %tmp128 = call %struct.BF_PartHolder* @BF_addEntry( %struct.BF_PartHolder* %tmp126, i32 %tmp124, i32 %tmp93 ) nounwind ; <%struct.BF_PartHolder*> [#uses=1]
+ store %struct.BF_PartHolder* %tmp128, %struct.BF_PartHolder** %tmp80, align 4
+ %tmp131 = add i32 %window.0, 1 ; <i32> [#uses=1]
+ br label %bb132
+
+bb132: ; preds = %bb140, %bb113
+ %window.0 = phi i32 [ %tmp131, %bb113 ], [ 0, %bb140 ] ; <i32> [#uses=3]
+ %tmp134 = icmp slt i32 %window.0, 3 ; <i1> [#uses=1]
+ br i1 %tmp134, label %bb113, label %bb137
+
+bb137: ; preds = %bb132
+ %tmp139 = add i32 %sfb.0, 1 ; <i32> [#uses=1]
+ br label %bb140
+
+bb140: ; preds = %bb341, %bb137
+ %sfb.0 = phi i32 [ %tmp139, %bb137 ], [ 0, %bb341 ] ; <i32> [#uses=3]
+ %tmp142 = icmp slt i32 %sfb.0, 6 ; <i1> [#uses=1]
+ br i1 %tmp142, label %bb132, label %bb174
+
+bb166: ; preds = %bb174
+ %tmp160 = load %struct.BF_PartHolder** %tmp80, align 4 ; <%struct.BF_PartHolder*> [#uses=1]
+ %tmp162 = call %struct.BF_PartHolder* @BF_addEntry( %struct.BF_PartHolder* %tmp160, i32 0, i32 0 ) nounwind ; <%struct.BF_PartHolder*> [#uses=0]
+ unreachable
+
+bb174: ; preds = %bb140
+ %tmp176 = icmp slt i32 6, 12 ; <i1> [#uses=1]
+ br i1 %tmp176, label %bb166, label %bb341
+
+bb341: ; preds = %bb352, %bb174
+ %tmp80 = getelementptr [2 x [2 x %struct.BF_PartHolder*]]* @scaleFactorsPH, i32 0, i32 0, i32 0 ; <%struct.BF_PartHolder**> [#uses=3]
+ %tmp92 = getelementptr [16 x i32]* @slen1_tab, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp93 = load i32* %tmp92, align 4 ; <i32> [#uses=1]
+ br label %bb140
+
+bb352: ; preds = %entry
+ %tmp354 = icmp slt i32 0, 2 ; <i1> [#uses=1]
+ br i1 %tmp354, label %bb341, label %return
+
+bb498: ; preds = %entry
+ ret void
+
+return: ; preds = %bb352
+ ret void
+}
+
+define void @getframebits(%struct.lame_global_flags* %gfp, i32* %bitsPerFrame, i32* %mean_bits) nounwind {
+entry:
+ unreachable
+}
+
+define i32 @lame_encode_buffer(%struct.lame_global_flags* %gfp, i16* %buffer_l, i16* %buffer_r, i32 %nsamples, i8* %mp3buf, i32 %mp3buf_size) nounwind {
+entry:
+ unreachable
+}
diff --git a/test/Transforms/LoopDeletion/dcetest.ll b/test/Transforms/LoopDeletion/dcetest.ll
new file mode 100644
index 0000000..f1e793d
--- /dev/null
+++ b/test/Transforms/LoopDeletion/dcetest.ll
@@ -0,0 +1,36 @@
+; This is the test case taken from Appel's book that illustrates a hard case
+; that SCCP gets right, and when followed by ADCE, is completely eliminated
+;
+; RUN: opt < %s -sccp -simplifycfg -indvars -loop-deletion -dce -simplifycfg -S | not grep br
+
+define i32 @"test function"(i32 %i0, i32 %j0) {
+BB1:
+ br label %BB2
+
+BB2: ; preds = %BB7, %BB1
+ %j2 = phi i32 [ %j4, %BB7 ], [ 1, %BB1 ] ; <i32> [#uses=2]
+ %k2 = phi i32 [ %k4, %BB7 ], [ 0, %BB1 ] ; <i32> [#uses=4]
+ %kcond = icmp slt i32 %k2, 100 ; <i1> [#uses=1]
+ br i1 %kcond, label %BB3, label %BB4
+
+BB3: ; preds = %BB2
+ %jcond = icmp slt i32 %j2, 20 ; <i1> [#uses=1]
+ br i1 %jcond, label %BB5, label %BB6
+
+BB4: ; preds = %BB2
+ ret i32 %j2
+
+BB5: ; preds = %BB3
+ %k3 = add i32 %k2, 1 ; <i32> [#uses=1]
+ br label %BB7
+
+BB6: ; preds = %BB3
+ %k5 = add i32 %k2, 1 ; <i32> [#uses=1]
+ br label %BB7
+
+BB7: ; preds = %BB6, %BB5
+ %j4 = phi i32 [ 1, %BB5 ], [ %k2, %BB6 ] ; <i32> [#uses=1]
+ %k4 = phi i32 [ %k3, %BB5 ], [ %k5, %BB6 ] ; <i32> [#uses=1]
+ br label %BB2
+}
+
diff --git a/test/Transforms/LoopDeletion/dg.exp b/test/Transforms/LoopDeletion/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LoopDeletion/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LoopDeletion/multiple-exit-conditions.ll b/test/Transforms/LoopDeletion/multiple-exit-conditions.ll
new file mode 100644
index 0000000..87f8f46
--- /dev/null
+++ b/test/Transforms/LoopDeletion/multiple-exit-conditions.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -loop-deletion -S | FileCheck %s
+
+; ScalarEvolution can prove the loop iteration is finite, even though
+; it can't represent the exact trip count as an expression. That's
+; good enough to let the loop be deleted.
+
+; CHECK: entry:
+; CHECK-NEXT: br label %return
+
+; CHECK: return:
+; CHECK-NEXT: ret void
+
+define void @foo(i64 %n, i64 %m) nounwind {
+entry:
+ br label %bb
+
+bb:
+ %x.0 = phi i64 [ 0, %entry ], [ %t0, %bb ]
+ %t0 = add i64 %x.0, 1
+ %t1 = icmp slt i64 %x.0, %n
+ %t3 = icmp sgt i64 %x.0, %m
+ %t4 = and i1 %t1, %t3
+ br i1 %t4, label %bb, label %return
+
+return:
+ ret void
+}
diff --git a/test/Transforms/LoopIndexSplit/2007-09-21-LoopBound.ll b/test/Transforms/LoopIndexSplit/2007-09-21-LoopBound.ll
new file mode 100644
index 0000000..d922ecb
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2007-09-21-LoopBound.ll
@@ -0,0 +1,63 @@
+; PR1692
+; RUN: opt < %s -loop-index-split -disable-output
+ %struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_NODE*, %struct.LIST_NODE*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 }
+ %struct.LIST_NODE = type { %struct.LIST_NODE*, i8* }
+ %struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* }
+ %struct.anon = type { %struct.LIST_NODE* }
+ %struct.st = type { %struct.subst*, %struct.LIST_NODE*, %struct.LIST_NODE*, i16, i16 }
+ %struct.subst = type { %struct.subst*, i32, %struct.term* }
+ %struct.term = type { i32, %struct.anon, %struct.LIST_NODE*, i32, i32 }
+
+define %struct.LIST_NODE* @inf_HyperResolvents(%struct.CLAUSE_HELP* %Clause, %struct.subst* %Subst, %struct.LIST_NODE* %Restlits, i32 %GlobalMaxVar, %struct.LIST_NODE* %FoundMap, i32 %StrictlyMaximal, { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }* %Index, i32* %Flags, i32* %Precedence) {
+entry:
+ br i1 false, label %cond_next44, label %bb37
+
+bb37: ; preds = %entry
+ ret %struct.LIST_NODE* null
+
+cond_next44: ; preds = %entry
+ br i1 false, label %bb29.i, label %bb.i31
+
+bb.i31: ; preds = %cond_next44
+ ret %struct.LIST_NODE* null
+
+bb29.i: ; preds = %cond_next44
+ br i1 false, label %cond_next89.i, label %bb34.i
+
+bb34.i: ; preds = %bb29.i
+ ret %struct.LIST_NODE* null
+
+cond_next89.i: ; preds = %bb29.i
+ br i1 false, label %clause_LiteralGetIndex.exit70.i, label %bb.i59.i
+
+bb.i59.i: ; preds = %cond_next89.i
+ ret %struct.LIST_NODE* null
+
+clause_LiteralGetIndex.exit70.i: ; preds = %cond_next89.i
+ br label %bb3.i.i
+
+bb3.i.i: ; preds = %bb3.i.i, %clause_LiteralGetIndex.exit70.i
+ br i1 false, label %bb40.i.i, label %bb3.i.i
+
+subst_Apply.exit.i.i: ; preds = %bb40.i.i
+ %tmp21.i.i = icmp sgt i32 %j.0.i.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp21.i.i, label %cond_false.i47.i, label %cond_true24.i.i
+
+cond_true24.i.i: ; preds = %subst_Apply.exit.i.i
+ br label %cond_next37.i.i
+
+cond_false.i47.i: ; preds = %subst_Apply.exit.i.i
+ br label %cond_next37.i.i
+
+cond_next37.i.i: ; preds = %cond_false.i47.i, %cond_true24.i.i
+ %tmp39.i.i = add i32 %j.0.i.i, 1 ; <i32> [#uses=1]
+ br label %bb40.i.i
+
+bb40.i.i: ; preds = %cond_next37.i.i, %bb3.i.i
+ %j.0.i.i = phi i32 [ %tmp39.i.i, %cond_next37.i.i ], [ 0, %bb3.i.i ] ; <i32> [#uses=3]
+ %tmp43.i.i = icmp sgt i32 %j.0.i.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp43.i.i, label %inf_CopyHyperElectron.exit.i, label %subst_Apply.exit.i.i
+
+inf_CopyHyperElectron.exit.i: ; preds = %bb40.i.i
+ ret %struct.LIST_NODE* null
+}
diff --git a/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll b/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll
new file mode 100644
index 0000000..3ebd9b3
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll
@@ -0,0 +1,57 @@
+
+; Update loop iteraton space to eliminate condition inside loop.
+; RUN: opt < %s -loop-index-split -S | not grep bothcond
+define void @test(float* %x, i32 %ndat, float** %y, float %xcen, i32 %xmin, i32 %xmax, float %sigmal, float %contribution) {
+entry:
+ %tmp519 = icmp sgt i32 %xmin, %xmax ; <i1> [#uses=1]
+ br i1 %tmp519, label %return, label %bb.preheader
+
+bb.preheader: ; preds = %entry
+ %tmp3031 = fpext float %contribution to double ; <double> [#uses=1]
+ %tmp32 = fmul double %tmp3031, 5.000000e-01 ; <double> [#uses=1]
+ %tmp3839 = fpext float %sigmal to double ; <double> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb.preheader, %cond_next45
+ %i.01.0 = phi i32 [ %tmp47, %cond_next45 ], [ 0, %bb.preheader ] ; <i32> [#uses=6]
+ %tmp2 = icmp sgt i32 %i.01.0, -1 ; <i1> [#uses=1]
+ %tmp6 = icmp slt i32 %i.01.0, %ndat ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp2, %tmp6 ; <i1> [#uses=1]
+ br i1 %bothcond, label %cond_true9, label %cond_next45
+
+cond_true9: ; preds = %bb
+ %tmp12 = getelementptr float* %x, i32 %i.01.0 ; <float*> [#uses=1]
+ %tmp13 = load float* %tmp12, align 4 ; <float> [#uses=1]
+ %tmp15 = fsub float %xcen, %tmp13 ; <float> [#uses=1]
+ %tmp16 = tail call float @fabsf( float %tmp15 ) ; <float> [#uses=1]
+ %tmp18 = fdiv float %tmp16, %sigmal ; <float> [#uses=1]
+ %tmp21 = load float** %y, align 4 ; <float*> [#uses=2]
+ %tmp27 = getelementptr float* %tmp21, i32 %i.01.0 ; <float*> [#uses=1]
+ %tmp28 = load float* %tmp27, align 4 ; <float> [#uses=1]
+ %tmp2829 = fpext float %tmp28 to double ; <double> [#uses=1]
+ %tmp34 = fsub float -0.000000e+00, %tmp18 ; <float> [#uses=1]
+ %tmp3435 = fpext float %tmp34 to double ; <double> [#uses=1]
+ %tmp36 = tail call double @exp( double %tmp3435 ) ; <double> [#uses=1]
+ %tmp37 = fmul double %tmp32, %tmp36 ; <double> [#uses=1]
+ %tmp40 = fdiv double %tmp37, %tmp3839 ; <double> [#uses=1]
+ %tmp41 = fadd double %tmp2829, %tmp40 ; <double> [#uses=1]
+ %tmp4142 = fptrunc double %tmp41 to float ; <float> [#uses=1]
+ %tmp44 = getelementptr float* %tmp21, i32 %i.01.0 ; <float*> [#uses=1]
+ store float %tmp4142, float* %tmp44, align 4
+ br label %cond_next45
+
+cond_next45: ; preds = %bb, %cond_true9
+ %tmp47 = add i32 %i.01.0, 1 ; <i32> [#uses=2]
+ %tmp51 = icmp sgt i32 %tmp47, %xmax ; <i1> [#uses=1]
+ br i1 %tmp51, label %return.loopexit, label %bb
+
+return.loopexit: ; preds = %cond_next45
+ br label %return
+
+return: ; preds = %return.loopexit, %entry
+ ret void
+}
+
+declare float @fabsf(float)
+
+declare double @exp(double)
diff --git a/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll b/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll
new file mode 100644
index 0000000..8f4ee24
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll
@@ -0,0 +1,60 @@
+; PR714
+; Update loop iteraton space to eliminate condition inside loop.
+; RUN: opt < %s -loop-index-split -S | not grep bothcond
+
+define void @test(float* %x, i32 %ndat, float** %y, float %xcen, i32 %xmin, i32 %xmax, float %sigmal, float %contribution) {
+entry:
+ %tmp5310 = icmp sgt i32 %xmin, %xmax ; <i1> [#uses=1]
+ br i1 %tmp5310, label %return, label %bb.preheader
+
+bb.preheader: ; preds = %entry
+ %tmp3031 = fpext float %contribution to double ; <double> [#uses=1]
+ %tmp32 = fmul double %tmp3031, 5.000000e-01 ; <double> [#uses=1]
+ %tmp3839 = fpext float %sigmal to double ; <double> [#uses=1]
+ br label %bb
+
+bb: ; preds = %cond_next45, %bb.preheader
+ %k.06.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %cond_next45 ] ; <i32> [#uses=4]
+ %i.01.0 = add i32 %k.06.0, %xmin ; <i32> [#uses=4]
+ %tmp2 = icmp sgt i32 %i.01.0, -1 ; <i1> [#uses=1]
+ %tmp6 = icmp slt i32 %i.01.0, %ndat ; <i1> [#uses=1]
+ %bothcond = and i1 %tmp2, %tmp6 ; <i1> [#uses=1]
+ br i1 %bothcond, label %cond_true9, label %cond_next45
+
+cond_true9: ; preds = %bb
+ %tmp12 = getelementptr float* %x, i32 %i.01.0 ; <float*> [#uses=1]
+ %tmp13 = load float* %tmp12, align 4 ; <float> [#uses=1]
+ %tmp15 = fsub float %xcen, %tmp13 ; <float> [#uses=1]
+ %tmp16 = tail call float @fabsf(float %tmp15) ; <float> [#uses=1]
+ %tmp18 = fdiv float %tmp16, %sigmal ; <float> [#uses=1]
+ %tmp21 = load float** %y, align 4 ; <float*> [#uses=2]
+ %tmp27 = getelementptr float* %tmp21, i32 %k.06.0 ; <float*> [#uses=1]
+ %tmp28 = load float* %tmp27, align 4 ; <float> [#uses=1]
+ %tmp2829 = fpext float %tmp28 to double ; <double> [#uses=1]
+ %tmp34 = fsub float -0.000000e+00, %tmp18 ; <float> [#uses=1]
+ %tmp3435 = fpext float %tmp34 to double ; <double> [#uses=1]
+ %tmp36 = tail call double @exp(double %tmp3435) ; <double> [#uses=1]
+ %tmp37 = fmul double %tmp32, %tmp36 ; <double> [#uses=1]
+ %tmp40 = fdiv double %tmp37, %tmp3839 ; <double> [#uses=1]
+ %tmp41 = fadd double %tmp2829, %tmp40 ; <double> [#uses=1]
+ %tmp4142 = fptrunc double %tmp41 to float ; <float> [#uses=1]
+ %tmp44 = getelementptr float* %tmp21, i32 %k.06.0 ; <float*> [#uses=1]
+ store float %tmp4142, float* %tmp44, align 4
+ br label %cond_next45
+
+cond_next45: ; preds = %cond_true9, %bb
+ %tmp47 = add i32 %i.01.0, 1 ; <i32> [#uses=1]
+ %tmp53 = icmp sgt i32 %tmp47, %xmax ; <i1> [#uses=1]
+ %indvar.next = add i32 %k.06.0, 1 ; <i32> [#uses=1]
+ br i1 %tmp53, label %return.loopexit, label %bb
+
+return.loopexit: ; preds = %cond_next45
+ br label %return
+
+return: ; preds = %return.loopexit, %entry
+ ret void
+}
+
+declare float @fabsf(float)
+
+declare double @exp(double)
diff --git a/test/Transforms/LoopIndexSplit/2008-01-28-IndDecrement.ll b/test/Transforms/LoopIndexSplit/2008-01-28-IndDecrement.ll
new file mode 100644
index 0000000..1550bc7
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-01-28-IndDecrement.ll
@@ -0,0 +1,46 @@
+; RUN: opt < %s -loop-index-split -disable-output -stats |& \
+; RUN: not grep "loop-index-split"
+
+; Induction variable decrement is not yet handled.
+; pr1912.bc
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9"
+ %struct.cset = type { i8*, i8, i8, i32, i8* }
+ %struct.parse = type { i8*, i8*, i32, i32*, i32, i32, i32, %struct.re_guts*, [10 x i32], [10 x i32] }
+ %struct.re_guts = type { i32, i32*, i32, i32, %struct.cset*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, [1 x i8] }
+
+define fastcc void @p_bracket(%struct.parse* %p) {
+entry:
+ br i1 false, label %bb160, label %bb195
+
+bb160: ; preds = %entry
+ br i1 false, label %bb.i169, label %bb9.i
+
+bb195: ; preds = %entry
+ ret void
+
+bb.i169: ; preds = %bb160
+ br i1 false, label %bb372, label %bb565
+
+bb9.i: ; preds = %bb160
+ ret void
+
+bb372: ; preds = %bb418, %bb.i169
+ %i1.0.reg2mem.0 = phi i32 [ %i1.0, %bb418 ], [ 0, %bb.i169 ] ; <i32> [#uses=2]
+ %tmp3.i.i.i170 = icmp ult i32 %i1.0.reg2mem.0, 128 ; <i1> [#uses=1]
+ br i1 %tmp3.i.i.i170, label %bb.i.i173, label %bb13.i.i
+
+bb.i.i173: ; preds = %bb372
+ br label %bb418
+
+bb13.i.i: ; preds = %bb372
+ br label %bb418
+
+bb418: ; preds = %bb13.i.i, %bb.i.i173
+ %i1.0 = add i32 %i1.0.reg2mem.0, -1 ; <i32> [#uses=2]
+ %tmp420 = icmp sgt i32 %i1.0, -1 ; <i1> [#uses=1]
+ br i1 %tmp420, label %bb372, label %bb565
+
+bb565: ; preds = %bb418, %bb.i169
+ ret void
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-02-08-Crash.ll b/test/Transforms/LoopIndexSplit/2008-02-08-Crash.ll
new file mode 100644
index 0000000..0847464
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-02-08-Crash.ll
@@ -0,0 +1,48 @@
+; RUN: opt < %s -loop-index-split -disable-output
+; PR 1995
+
+define void @add_blkdev_randomness(i32 %major) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb39, %entry
+ %A.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %TEMP.0, %bb39 ] ; <i32> [#uses=1]
+ %D.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %C.0.reg2mem.0, %bb39 ] ; <i32> [#uses=3]
+ %C.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %tmp34, %bb39 ] ; <i32> [#uses=4]
+ %TEMP.1.reg2mem.0 = phi i32 [ undef, %entry ], [ %TEMP.0, %bb39 ] ; <i32> [#uses=1]
+ %i.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp38, %bb39 ] ; <i32> [#uses=3]
+ %B.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %A.0.reg2mem.0, %bb39 ] ; <i32> [#uses=5]
+ %tmp1 = icmp slt i32 %i.0.reg2mem.0, 40 ; <i1> [#uses=1]
+ br i1 %tmp1, label %bb3, label %bb12
+
+bb3: ; preds = %bb
+ %tmp6 = xor i32 %C.0.reg2mem.0, %D.0.reg2mem.0 ; <i32> [#uses=1]
+ %tmp8 = and i32 %B.0.reg2mem.0, %tmp6 ; <i32> [#uses=1]
+ %tmp10 = xor i32 %tmp8, %D.0.reg2mem.0 ; <i32> [#uses=1]
+ %tmp11 = add i32 %tmp10, 1518500249 ; <i32> [#uses=1]
+ br label %bb39
+
+bb12: ; preds = %bb
+ %tmp14 = icmp slt i32 %i.0.reg2mem.0, 60 ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb17, label %bb39
+
+bb17: ; preds = %bb12
+ %tmp20 = and i32 %B.0.reg2mem.0, %C.0.reg2mem.0 ; <i32> [#uses=1]
+ %tmp23 = xor i32 %B.0.reg2mem.0, %C.0.reg2mem.0 ; <i32> [#uses=1]
+ %tmp25 = and i32 %tmp23, %D.0.reg2mem.0 ; <i32> [#uses=1]
+ %tmp26 = add i32 %tmp20, -1894007588 ; <i32> [#uses=1]
+ %tmp27 = add i32 %tmp26, %tmp25 ; <i32> [#uses=1]
+ br label %bb39
+
+bb39: ; preds = %bb12, %bb3, %bb17
+ %TEMP.0 = phi i32 [ %tmp27, %bb17 ], [ %tmp11, %bb3 ], [ %TEMP.1.reg2mem.0, %bb12 ] ; <i32> [#uses=2]
+ %tmp31 = lshr i32 %B.0.reg2mem.0, 2 ; <i32> [#uses=1]
+ %tmp33 = shl i32 %B.0.reg2mem.0, 30 ; <i32> [#uses=1]
+ %tmp34 = or i32 %tmp31, %tmp33 ; <i32> [#uses=1]
+ %tmp38 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp41 = icmp slt i32 %tmp38, 80 ; <i1> [#uses=1]
+ br i1 %tmp41, label %bb, label %return
+
+return: ; preds = %bb39
+ ret void
+}
\ No newline at end of file
diff --git a/test/Transforms/LoopIndexSplit/2008-02-13-ExitValueNum.ll b/test/Transforms/LoopIndexSplit/2008-02-13-ExitValueNum.ll
new file mode 100644
index 0000000..980a42f
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-02-13-ExitValueNum.ll
@@ -0,0 +1,67 @@
+; RUN: opt < %s -disable-output -loop-index-split
+; PR 2011
+ %struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_NODE*, %struct.LIST_NODE*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 }
+ %struct.LIST_NODE = type { %struct.LIST_NODE*, i8* }
+ %struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* }
+ %struct.anon = type { %struct.LIST_NODE* }
+ %struct.st = type { %struct.subst*, %struct.LIST_NODE*, %struct.LIST_NODE*, i16, i16 }
+ %struct.subst = type { %struct.subst*, i32, %struct.term* }
+ %struct.term = type { i32, %struct.anon, %struct.LIST_NODE*, i32, i32 }
+
+define fastcc %struct.LIST_NODE* @inf_HyperResolvents(%struct.CLAUSE_HELP* %Clause, %struct.subst* %Subst, %struct.LIST_NODE* %Restlits, i32 %GlobalMaxVar, %struct.LIST_NODE* %FoundMap, i32 %StrictlyMaximal, { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }* %Index, i32* %Flags, i32* %Precedence) nounwind {
+entry:
+ br i1 false, label %bb960, label %bb885
+
+bb885: ; preds = %entry
+ ret %struct.LIST_NODE* null
+
+bb960: ; preds = %entry
+ br i1 false, label %bb1097, label %bb1005.preheader
+
+bb1005.preheader: ; preds = %bb960
+ ret %struct.LIST_NODE* null
+
+bb1097: ; preds = %bb960
+ br i1 false, label %bb1269.preheader, label %bb1141.preheader
+
+bb1141.preheader: ; preds = %bb1097
+ ret %struct.LIST_NODE* null
+
+bb1269.preheader: ; preds = %bb1097
+ br i1 false, label %bb1318, label %bb1281
+
+bb1281: ; preds = %bb1269.preheader
+ ret %struct.LIST_NODE* null
+
+bb1318: ; preds = %bb1269.preheader
+ br i1 false, label %bb1459, label %bb.nph52
+
+bb.nph52: ; preds = %bb1318
+ ret %struct.LIST_NODE* null
+
+bb1459: ; preds = %bb1318
+ br i1 false, label %bb1553, label %bb.nph62
+
+bb.nph62: ; preds = %bb1459
+ ret %struct.LIST_NODE* null
+
+bb1553: ; preds = %bb1669, %bb1459
+ %j295.0.reg2mem.0 = phi i32 [ %storemerge110, %bb1669 ], [ 0, %bb1459 ] ; <i32> [#uses=2]
+ %tmp1629 = icmp sgt i32 %j295.0.reg2mem.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp1629, label %bb1649, label %bb1632
+
+bb1632: ; preds = %bb1553
+ br label %bb1669
+
+bb1649: ; preds = %bb1553
+ br label %bb1669
+
+bb1669: ; preds = %bb1649, %bb1632
+ %storemerge110 = add i32 %j295.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp1672 = icmp sgt i32 %storemerge110, 0 ; <i1> [#uses=1]
+ br i1 %tmp1672, label %bb1678, label %bb1553
+
+bb1678: ; preds = %bb1669
+ ret %struct.LIST_NODE* null
+}
+
diff --git a/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatch.ll b/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatch.ll
new file mode 100644
index 0000000..9351caf
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatch.ll
@@ -0,0 +1,72 @@
+; RUN: opt < %s -loop-index-split -disable-output
+; PR 2011
+ %struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_NODE*, %struct.LIST_NODE*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 }
+ %struct.LIST_NODE = type { %struct.LIST_NODE*, i8* }
+ %struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* }
+ %struct.anon = type { %struct.LIST_NODE* }
+ %struct.st = type { %struct.subst*, %struct.LIST_NODE*, %struct.LIST_NODE*, i16, i16 }
+ %struct.subst = type { %struct.subst*, i32, %struct.term* }
+ %struct.term = type { i32, %struct.anon, %struct.LIST_NODE*, i32, i32 }
+
+define fastcc %struct.LIST_NODE* @inf_HyperResolvents(%struct.CLAUSE_HELP* %Clause, %struct.subst* %Subst, %struct.LIST_NODE* %Restlits, i32 %GlobalMaxVar, %struct.LIST_NODE* %FoundMap, i32 %StrictlyMaximal, { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }* %Index, i32* %Flags, i32* %Precedence) nounwind {
+entry:
+ br i1 false, label %bb960, label %bb885
+
+bb885: ; preds = %entry
+ ret %struct.LIST_NODE* null
+
+bb960: ; preds = %entry
+ br i1 false, label %bb1097, label %bb1005.preheader
+
+bb1005.preheader: ; preds = %bb960
+ ret %struct.LIST_NODE* null
+
+bb1097: ; preds = %bb960
+ br i1 false, label %bb1269.preheader, label %bb1141.preheader
+
+bb1141.preheader: ; preds = %bb1097
+ ret %struct.LIST_NODE* null
+
+bb1269.preheader: ; preds = %bb1097
+ br i1 false, label %bb1318, label %bb1281
+
+bb1281: ; preds = %bb1269.preheader
+ ret %struct.LIST_NODE* null
+
+bb1318: ; preds = %bb1269.preheader
+ br i1 false, label %bb1459, label %bb.nph52
+
+bb.nph52: ; preds = %bb1318
+ ret %struct.LIST_NODE* null
+
+bb1459: ; preds = %bb1318
+ br i1 false, label %bb1553, label %bb.nph62
+
+bb.nph62: ; preds = %bb1459
+ ret %struct.LIST_NODE* null
+
+bb1553: ; preds = %bb1669, %bb1459
+ %j295.0.reg2mem.0 = phi i32 [ %storemerge110, %bb1669 ], [ 0, %bb1459 ] ; <i32> [#uses=2]
+ br i1 false, label %bb1588, label %bb1616
+
+bb1588: ; preds = %bb1553
+ br label %bb1616
+
+bb1616: ; preds = %bb1588, %bb1553
+ %tmp1629 = icmp sgt i32 %j295.0.reg2mem.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp1629, label %bb1649, label %bb1632
+
+bb1632: ; preds = %bb1616
+ br label %bb1669
+
+bb1649: ; preds = %bb1616
+ br label %bb1669
+
+bb1669: ; preds = %bb1649, %bb1632
+ %storemerge110 = add i32 %j295.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp1672 = icmp sgt i32 %storemerge110, 0 ; <i1> [#uses=1]
+ br i1 %tmp1672, label %bb1678, label %bb1553
+
+bb1678: ; preds = %bb1669
+ ret %struct.LIST_NODE* null
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatchPHI.ll b/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatchPHI.ll
new file mode 100644
index 0000000..6d6defa
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatchPHI.ll
@@ -0,0 +1,74 @@
+; RUN: opt < %s -loop-index-split -disable-output
+; PR 2011
+ %struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_NODE*, %struct.LIST_NODE*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 }
+ %struct.LIST_NODE = type { %struct.LIST_NODE*, i8* }
+ %struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* }
+ %struct.anon = type { %struct.LIST_NODE* }
+ %struct.st = type { %struct.subst*, %struct.LIST_NODE*, %struct.LIST_NODE*, i16, i16 }
+ %struct.subst = type { %struct.subst*, i32, %struct.term* }
+ %struct.term = type { i32, %struct.anon, %struct.LIST_NODE*, i32, i32 }
+
+define fastcc %struct.LIST_NODE* @inf_HyperResolvents(%struct.CLAUSE_HELP* %Clause, %struct.subst* %Subst, %struct.LIST_NODE* %Restlits, i32 %GlobalMaxVar, %struct.LIST_NODE* %FoundMap, i32 %StrictlyMaximal, { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }* %Index, i32* %Flags, i32* %Precedence) nounwind {
+entry:
+ br i1 false, label %bb960, label %bb885
+
+bb885: ; preds = %entry
+ ret %struct.LIST_NODE* null
+
+bb960: ; preds = %entry
+ br i1 false, label %bb1097, label %bb1005.preheader
+
+bb1005.preheader: ; preds = %bb960
+ ret %struct.LIST_NODE* null
+
+bb1097: ; preds = %bb960
+ br i1 false, label %bb1269.preheader, label %bb1141.preheader
+
+bb1141.preheader: ; preds = %bb1097
+ ret %struct.LIST_NODE* null
+
+bb1269.preheader: ; preds = %bb1097
+ br i1 false, label %bb1318, label %bb1281
+
+bb1281: ; preds = %bb1269.preheader
+ ret %struct.LIST_NODE* null
+
+bb1318: ; preds = %bb1269.preheader
+ br i1 false, label %bb1459, label %bb.nph52
+
+bb.nph52: ; preds = %bb1318
+ ret %struct.LIST_NODE* null
+
+bb1459: ; preds = %bb1318
+ br i1 false, label %bb1553, label %bb.nph62
+
+bb.nph62: ; preds = %bb1459
+ ret %struct.LIST_NODE* null
+
+bb1553: ; preds = %bb1669, %bb1459
+ %j295.0.reg2mem.0 = phi i32 [ %storemerge110, %bb1669 ], [ 0, %bb1459 ] ; <i32> [#uses=2]
+ %Constraint403.2.reg2mem.0 = phi %struct.LIST_NODE* [ %Constraint403.1.reg2mem.0, %bb1669 ], [ null, %bb1459 ] ; <%struct.LIST_NODE*> [#uses=1]
+ br i1 false, label %bb1588, label %bb1616
+
+bb1588: ; preds = %bb1553
+ br label %bb1616
+
+bb1616: ; preds = %bb1588, %bb1553
+ %tmp1629 = icmp sgt i32 %j295.0.reg2mem.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp1629, label %bb1649, label %bb1632
+
+bb1632: ; preds = %bb1616
+ br label %bb1669
+
+bb1649: ; preds = %bb1616
+ br label %bb1669
+
+bb1669: ; preds = %bb1649, %bb1632
+ %Constraint403.1.reg2mem.0 = phi %struct.LIST_NODE* [ null, %bb1632 ], [ %Constraint403.2.reg2mem.0, %bb1649 ] ; <%struct.LIST_NODE*> [#uses=1]
+ %storemerge110 = add i32 %j295.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp1672 = icmp sgt i32 %storemerge110, 0 ; <i1> [#uses=1]
+ br i1 %tmp1672, label %bb1678, label %bb1553
+
+bb1678: ; preds = %bb1669
+ ret %struct.LIST_NODE* null
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll b/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll
new file mode 100644
index 0000000..f1a03e2
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll
@@ -0,0 +1,464 @@
+; RUN: opt < %s -loop-index-split -disable-output
+; PR 2030
+ %struct.FULL = type { i32, i32, [1000 x float*] }
+
+define i32 @matgen(%struct.FULL* %a, float** %x, float** %b, float** %bt, i32** %ipvt, i32 %test_case, i32 %scale) {
+entry:
+ br i1 false, label %bb, label %entry.bb30_crit_edge
+
+entry.bb30_crit_edge: ; preds = %entry
+ br label %bb30
+
+bb: ; preds = %entry
+ br label %bb14
+
+bb6: ; preds = %bb14
+ br label %bb14
+
+bb14: ; preds = %bb6, %bb
+ br i1 false, label %bb6, label %bb22
+
+bb22: ; preds = %bb14
+ br label %bb30
+
+bb30: ; preds = %bb22, %entry.bb30_crit_edge
+ switch i32 %test_case, label %bb648 [
+ i32 1, label %bb30.bb32_crit_edge
+ i32 2, label %bb30.bb32_crit_edge1
+ i32 3, label %bb30.bb32_crit_edge2
+ i32 4, label %bb30.bb108_crit_edge
+ i32 5, label %bb30.bb108_crit_edge3
+ i32 6, label %bb30.bb142_crit_edge
+ i32 7, label %bb30.bb142_crit_edge4
+ i32 8, label %bb30.bb142_crit_edge5
+ i32 9, label %bb234
+ i32 10, label %bb292
+ i32 11, label %bb353
+ i32 12, label %bb419
+ i32 13, label %bb485
+ i32 14, label %bb567
+ ]
+
+bb30.bb142_crit_edge5: ; preds = %bb30
+ br label %bb142
+
+bb30.bb142_crit_edge4: ; preds = %bb30
+ br label %bb142
+
+bb30.bb142_crit_edge: ; preds = %bb30
+ br label %bb142
+
+bb30.bb108_crit_edge3: ; preds = %bb30
+ br label %bb108
+
+bb30.bb108_crit_edge: ; preds = %bb30
+ br label %bb108
+
+bb30.bb32_crit_edge2: ; preds = %bb30
+ br label %bb32
+
+bb30.bb32_crit_edge1: ; preds = %bb30
+ br label %bb32
+
+bb30.bb32_crit_edge: ; preds = %bb30
+ br label %bb32
+
+bb32: ; preds = %bb30.bb32_crit_edge, %bb30.bb32_crit_edge1, %bb30.bb32_crit_edge2
+ br i1 false, label %bb53, label %bb52
+
+bb52: ; preds = %bb32
+ br label %bb739
+
+bb53: ; preds = %bb32
+ br label %bb101
+
+bb58: ; preds = %bb101
+ br label %bb92
+
+bb64: ; preds = %bb92
+ br i1 false, label %bb64.bb87_crit_edge, label %bb72
+
+bb64.bb87_crit_edge: ; preds = %bb64
+ br label %bb87
+
+bb72: ; preds = %bb64
+ br i1 false, label %bb72.bb87_crit_edge, label %bb79
+
+bb72.bb87_crit_edge: ; preds = %bb72
+ br label %bb87
+
+bb79: ; preds = %bb72
+ br label %bb87
+
+bb87: ; preds = %bb79, %bb72.bb87_crit_edge, %bb64.bb87_crit_edge
+ br label %bb92
+
+bb92: ; preds = %bb87, %bb58
+ br i1 false, label %bb64, label %bb98
+
+bb98: ; preds = %bb92
+ br label %bb101
+
+bb101: ; preds = %bb98, %bb53
+ br i1 false, label %bb58, label %bb107
+
+bb107: ; preds = %bb101
+ br label %bb651
+
+bb108: ; preds = %bb30.bb108_crit_edge, %bb30.bb108_crit_edge3
+ br i1 false, label %bb125, label %bb124
+
+bb124: ; preds = %bb108
+ br label %bb739
+
+bb125: ; preds = %bb108
+ br i1 false, label %bb138, label %bb139
+
+bb138: ; preds = %bb125
+ br label %bb140
+
+bb139: ; preds = %bb125
+ br label %bb140
+
+bb140: ; preds = %bb139, %bb138
+ br label %bb651
+
+bb142: ; preds = %bb30.bb142_crit_edge, %bb30.bb142_crit_edge4, %bb30.bb142_crit_edge5
+ br i1 false, label %bb161, label %bb160
+
+bb160: ; preds = %bb142
+ br label %bb739
+
+bb161: ; preds = %bb142
+ br i1 false, label %bb170, label %bb161.bb171_crit_edge
+
+bb161.bb171_crit_edge: ; preds = %bb161
+ br label %bb171
+
+bb170: ; preds = %bb161
+ br label %bb171
+
+bb171: ; preds = %bb170, %bb161.bb171_crit_edge
+ br i1 false, label %bb176, label %bb171.bb177_crit_edge
+
+bb171.bb177_crit_edge: ; preds = %bb171
+ br label %bb177
+
+bb176: ; preds = %bb171
+ br label %bb177
+
+bb177: ; preds = %bb176, %bb171.bb177_crit_edge
+ br label %bb227
+
+bb178: ; preds = %bb227
+ br label %bb218
+
+bb184: ; preds = %bb218
+ br i1 false, label %bb191, label %bb193
+
+bb191: ; preds = %bb184
+ br label %bb213
+
+bb193: ; preds = %bb184
+ br i1 false, label %bb200, label %bb203
+
+bb200: ; preds = %bb193
+ br label %bb213
+
+bb203: ; preds = %bb193
+ br i1 false, label %bb210, label %bb203.bb213_crit_edge
+
+bb203.bb213_crit_edge: ; preds = %bb203
+ br label %bb213
+
+bb210: ; preds = %bb203
+ br label %bb213
+
+bb213: ; preds = %bb210, %bb203.bb213_crit_edge, %bb200, %bb191
+ br label %bb218
+
+bb218: ; preds = %bb213, %bb178
+ br i1 false, label %bb184, label %bb224
+
+bb224: ; preds = %bb218
+ br label %bb227
+
+bb227: ; preds = %bb224, %bb177
+ br i1 false, label %bb178, label %bb233
+
+bb233: ; preds = %bb227
+ br label %bb651
+
+bb234: ; preds = %bb30
+ br i1 false, label %bb253, label %bb252
+
+bb252: ; preds = %bb234
+ br label %bb739
+
+bb253: ; preds = %bb234
+ br label %bb285
+
+bb258: ; preds = %bb285
+ br label %bb276
+
+bb264: ; preds = %bb276
+ br label %bb276
+
+bb276: ; preds = %bb264, %bb258
+ br i1 false, label %bb264, label %bb282
+
+bb282: ; preds = %bb276
+ br label %bb285
+
+bb285: ; preds = %bb282, %bb253
+ br i1 false, label %bb258, label %bb291
+
+bb291: ; preds = %bb285
+ br label %bb651
+
+bb292: ; preds = %bb30
+ br i1 false, label %bb311, label %bb310
+
+bb310: ; preds = %bb292
+ br label %bb739
+
+bb311: ; preds = %bb292
+ br label %bb346
+
+bb316: ; preds = %bb346
+ br label %bb337
+
+bb322: ; preds = %bb337
+ br label %bb337
+
+bb337: ; preds = %bb322, %bb316
+ br i1 false, label %bb322, label %bb343
+
+bb343: ; preds = %bb337
+ br label %bb346
+
+bb346: ; preds = %bb343, %bb311
+ br i1 false, label %bb316, label %bb352
+
+bb352: ; preds = %bb346
+ br label %bb651
+
+bb353: ; preds = %bb30
+ br i1 false, label %bb372, label %bb371
+
+bb371: ; preds = %bb353
+ br label %bb739
+
+bb372: ; preds = %bb353
+ br label %bb412
+
+bb377: ; preds = %bb412
+ br label %bb403
+
+bb383: ; preds = %bb403
+ br i1 false, label %bb395, label %bb389
+
+bb389: ; preds = %bb383
+ br label %bb396
+
+bb395: ; preds = %bb383
+ br label %bb396
+
+bb396: ; preds = %bb395, %bb389
+ br label %bb403
+
+bb403: ; preds = %bb396, %bb377
+ br i1 false, label %bb383, label %bb409
+
+bb409: ; preds = %bb403
+ br label %bb412
+
+bb412: ; preds = %bb409, %bb372
+ br i1 false, label %bb377, label %bb418
+
+bb418: ; preds = %bb412
+ br label %bb651
+
+bb419: ; preds = %bb30
+ br i1 false, label %bb438, label %bb437
+
+bb437: ; preds = %bb419
+ br label %bb739
+
+bb438: ; preds = %bb419
+ br label %bb478
+
+bb443: ; preds = %bb478
+ br label %bb469
+
+bb449: ; preds = %bb469
+ br i1 false, label %bb461, label %bb455
+
+bb455: ; preds = %bb449
+ br label %bb462
+
+bb461: ; preds = %bb449
+ br label %bb462
+
+bb462: ; preds = %bb461, %bb455
+ br label %bb469
+
+bb469: ; preds = %bb462, %bb443
+ br i1 false, label %bb449, label %bb475
+
+bb475: ; preds = %bb469
+ br label %bb478
+
+bb478: ; preds = %bb475, %bb438
+ br i1 false, label %bb443, label %bb484
+
+bb484: ; preds = %bb478
+ br label %bb651
+
+bb485: ; preds = %bb30
+ br i1 false, label %bb504, label %bb503
+
+bb503: ; preds = %bb485
+ br label %bb739
+
+bb504: ; preds = %bb485
+ br label %bb560
+
+bb513: ; preds = %bb560
+ br label %bb551
+
+bb519: ; preds = %bb551
+ br i1 false, label %bb528, label %bb532
+
+bb528: ; preds = %bb519
+ br label %bb536
+
+bb532: ; preds = %bb519
+ br label %bb536
+
+bb536: ; preds = %bb532, %bb528
+ br label %bb551
+
+bb551: ; preds = %bb536, %bb513
+ br i1 false, label %bb519, label %bb557
+
+bb557: ; preds = %bb551
+ br label %bb560
+
+bb560: ; preds = %bb557, %bb504
+ br i1 false, label %bb513, label %bb566
+
+bb566: ; preds = %bb560
+ br label %bb651
+
+bb567: ; preds = %bb30
+ br i1 false, label %bb586, label %bb585
+
+bb585: ; preds = %bb567
+ br label %bb739
+
+bb586: ; preds = %bb567
+ br label %bb641
+
+bb595: ; preds = %bb641
+ br label %bb632
+
+bb601: ; preds = %bb632
+ %tmp604 = icmp sgt i32 %i.7, 0 ; <i1> [#uses=1]
+ br i1 %tmp604, label %bb607, label %bb611
+
+bb607: ; preds = %bb601
+ br label %bb615
+
+bb611: ; preds = %bb601
+ br label %bb615
+
+bb615: ; preds = %bb611, %bb607
+ %tmp629 = add i32 %i.7, 1 ; <i32> [#uses=1]
+ %tmp631 = getelementptr float* %col.7, i32 1 ; <float*> [#uses=1]
+ br label %bb632
+
+bb632: ; preds = %bb615, %bb595
+ %col.7 = phi float* [ null, %bb595 ], [ %tmp631, %bb615 ] ; <float*> [#uses=1]
+ %i.7 = phi i32 [ 0, %bb595 ], [ %tmp629, %bb615 ] ; <i32> [#uses=3]
+ %tmp635 = icmp slt i32 %i.7, 0 ; <i1> [#uses=1]
+ br i1 %tmp635, label %bb601, label %bb638
+
+bb638: ; preds = %bb632
+ br label %bb641
+
+bb641: ; preds = %bb638, %bb586
+ br i1 false, label %bb595, label %bb647
+
+bb647: ; preds = %bb641
+ br label %bb651
+
+bb648: ; preds = %bb30
+ br label %bb739
+
+bb651: ; preds = %bb647, %bb566, %bb484, %bb418, %bb352, %bb291, %bb233, %bb140, %bb107
+ br i1 false, label %bb658, label %bb651.bb661_crit_edge
+
+bb651.bb661_crit_edge: ; preds = %bb651
+ br label %bb661
+
+bb658: ; preds = %bb651
+ br label %bb661
+
+bb661: ; preds = %bb658, %bb651.bb661_crit_edge
+ br i1 false, label %bb666, label %bb661.bb686_crit_edge
+
+bb661.bb686_crit_edge: ; preds = %bb661
+ br label %bb686
+
+bb666: ; preds = %bb661
+ br label %bb680
+
+bb670: ; preds = %bb680
+ br label %bb680
+
+bb680: ; preds = %bb670, %bb666
+ br i1 false, label %bb670, label %bb680.bb686_crit_edge
+
+bb680.bb686_crit_edge: ; preds = %bb680
+ br label %bb686
+
+bb686: ; preds = %bb680.bb686_crit_edge, %bb661.bb686_crit_edge
+ br i1 false, label %bb699, label %bb696
+
+bb696: ; preds = %bb686
+ br label %bb739
+
+bb699: ; preds = %bb686
+ br i1 false, label %bb712, label %bb709
+
+bb709: ; preds = %bb699
+ br label %bb739
+
+bb712: ; preds = %bb699
+ br i1 false, label %bb717, label %bb712.bb720_crit_edge
+
+bb712.bb720_crit_edge: ; preds = %bb712
+ br label %bb720
+
+bb717: ; preds = %bb712
+ br label %bb720
+
+bb720: ; preds = %bb717, %bb712.bb720_crit_edge
+ br i1 false, label %bb725, label %bb720.bb738_crit_edge
+
+bb720.bb738_crit_edge: ; preds = %bb720
+ br label %bb738
+
+bb725: ; preds = %bb720
+ br label %bb738
+
+bb738: ; preds = %bb725, %bb720.bb738_crit_edge
+ br label %bb739
+
+bb739: ; preds = %bb738, %bb709, %bb696, %bb648, %bb585, %bb503, %bb437, %bb371, %bb310, %bb252, %bb160, %bb124, %bb52
+ br label %return
+
+return: ; preds = %bb739
+ ret i32 0
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-03-24-ExitPhi.ll b/test/Transforms/LoopIndexSplit/2008-03-24-ExitPhi.ll
new file mode 100644
index 0000000..ca22e50
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-03-24-ExitPhi.ll
@@ -0,0 +1,69 @@
+; RUN: opt < %s -loop-index-split -disable-output
+; Handle Exit block phis that do not have any use inside the loop.
+
+ %struct.ATOM = type { double, double, double, double, double, double, i32, double, double, double, double, i8*, i8, [9 x i8], double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, [200 x i8*], [32 x i8*], [32 x i8], i32 }
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+
+define i32 @math([80 x i8]* %tokens, double* %fvalue, i32* %ivalue, %struct.FILE* %ip, %struct.FILE* %op, i32 %echo) nounwind {
+entry:
+ br i1 false, label %bb.i, label %bb35.i
+bb.i: ; preds = %entry
+ br i1 false, label %bb6.i, label %bb9.i
+bb9.i: ; preds = %bb.i
+ ret i32 0
+bb35.i: ; preds = %entry
+ ret i32 0
+bb6.i: ; preds = %bb.i
+ br i1 false, label %a_l2_f.exit, label %bb16.i
+bb16.i: ; preds = %bb6.i
+ ret i32 0
+a_l2_f.exit: ; preds = %bb6.i
+ br i1 false, label %bb7.i97, label %bb6.i71
+bb6.i71: ; preds = %a_l2_f.exit
+ ret i32 0
+bb7.i97: ; preds = %a_l2_f.exit
+ br i1 false, label %bb, label %bb18.i102
+bb18.i102: ; preds = %bb7.i97
+ ret i32 0
+bb: ; preds = %bb7.i97
+ br i1 false, label %bb38, label %AFOUND
+bb38: ; preds = %bb
+ br i1 false, label %bb111, label %bb7.i120
+AFOUND: ; preds = %bb
+ ret i32 0
+bb7.i120: ; preds = %bb38
+ ret i32 0
+bb111: ; preds = %bb38
+ switch i32 0, label %bb574 [
+ i32 1, label %bb158
+ i32 0, label %bb166
+ ]
+bb158: ; preds = %bb111
+ ret i32 0
+bb166: ; preds = %bb111
+ ret i32 0
+bb574: ; preds = %bb111
+ br i1 false, label %bb11.i249, label %bb600
+bb11.i249: ; preds = %bb574
+ br i1 false, label %bb11.i265, label %bb596
+bb11.i265: ; preds = %bb590, %bb11.i249
+ %i.1.reg2mem.0 = phi i32 [ %tmp589.reg2mem.0, %bb590 ], [ 0, %bb11.i249 ] ; <i32> [#uses=2]
+ %tmp13.i264 = icmp slt i32 %i.1.reg2mem.0, 1 ; <i1> [#uses=1]
+ br i1 %tmp13.i264, label %bb16.i267, label %bb30.i279
+bb16.i267: ; preds = %bb11.i265
+ br label %bb590
+bb30.i279: ; preds = %bb11.i265
+ br label %bb590
+bb590: ; preds = %bb30.i279, %bb16.i267
+ %tmp5876282.reg2mem.0 = phi %struct.ATOM* [ null, %bb30.i279 ], [ null, %bb16.i267 ] ; <%struct.ATOM*> [#uses=1]
+ %tmp589.reg2mem.0 = add i32 %i.1.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp593 = icmp slt i32 %tmp589.reg2mem.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp593, label %bb11.i265, label %bb596
+bb596: ; preds = %bb590, %bb11.i249
+ %ap.0.reg2mem.0 = phi %struct.ATOM* [ null, %bb11.i249 ], [ %tmp5876282.reg2mem.0, %bb590 ] ; <%struct.ATOM*> [#uses=0]
+ ret i32 0
+bb600: ; preds = %bb574
+ ret i32 0
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll b/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll
new file mode 100644
index 0000000..7447e6d
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll
@@ -0,0 +1,40 @@
+; RUN: opt < %s -loop-index-split -stats -disable-output | not grep "loop-index-split"
+;PR2294
+@g_2 = external global i16 ; <i16*> [#uses=4]
+@g_5 = external global i32 ; <i32*> [#uses=1]
[email protected] = external constant [4 x i8] ; <[4 x i8]*> [#uses=1]
+
+declare void @func_1() nounwind
+
+define i32 @main() nounwind {
+entry:
+ %tmp101.i = load i16* @g_2, align 2 ; <i16> [#uses=1]
+ %tmp112.i = icmp sgt i16 %tmp101.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp112.i, label %bb.preheader.i, label %func_1.exit
+bb.preheader.i: ; preds = %entry
+ %g_2.promoted.i = load i16* @g_2 ; <i16> [#uses=1]
+ br label %bb.i
+bb.i: ; preds = %bb6.i, %bb.preheader.i
+ %g_2.tmp.0.i = phi i16 [ %g_2.promoted.i, %bb.preheader.i ], [ %tmp8.i, %bb6.i ] ; <i16> [#uses=2]
+ %tmp2.i = icmp eq i16 %g_2.tmp.0.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp2.i, label %bb4.i, label %bb6.i
+bb4.i: ; preds = %bb.i
+ %tmp5.i = volatile load i32* @g_5, align 4 ; <i32> [#uses=0]
+ br label %bb6.i
+bb6.i: ; preds = %bb4.i, %bb.i
+ %tmp8.i = add i16 %g_2.tmp.0.i, 1 ; <i16> [#uses=3]
+ %tmp11.i = icmp sgt i16 %tmp8.i, 42 ; <i1> [#uses=1]
+ br i1 %tmp11.i, label %bb.i, label %return.loopexit.i
+return.loopexit.i: ; preds = %bb6.i
+ %tmp8.i.lcssa = phi i16 [ %tmp8.i, %bb6.i ] ; <i16> [#uses=1]
+ store i16 %tmp8.i.lcssa, i16* @g_2
+ br label %func_1.exit
+func_1.exit: ; preds = %return.loopexit.i, %entry
+ %tmp1 = load i16* @g_2, align 2 ; <i16> [#uses=1]
+ %tmp12 = sext i16 %tmp1 to i32 ; <i32> [#uses=1]
+ %tmp3 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %tmp12 ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
+
diff --git a/test/Transforms/LoopIndexSplit/2008-06-03-DomFrontier.ll b/test/Transforms/LoopIndexSplit/2008-06-03-DomFrontier.ll
new file mode 100644
index 0000000..6f691de
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-06-03-DomFrontier.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -loop-rotate -loop-unswitch -loop-index-split -instcombine -disable-output
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9"
+ %struct.__CFData = type opaque
+ %struct.__CFString = type opaque
+
+define %struct.__CFData* @WirelessCreatePSK(%struct.__CFString* %inPassphrase, %struct.__CFData* %inSSID) nounwind {
+entry:
+ br label %bb52
+
+bb52: ; preds = %bb142, %bb52, %entry
+ br i1 false, label %bb142, label %bb52
+
+bb63: ; preds = %bb142, %bb131
+ %t.0.reg2mem.0 = phi i32 [ %tmp133, %bb131 ], [ 0, %bb142 ] ; <i32> [#uses=2]
+ %tmp65 = icmp ult i32 %t.0.reg2mem.0, 16 ; <i1> [#uses=1]
+ br i1 %tmp65, label %bb68, label %bb89
+
+bb68: ; preds = %bb63
+ br label %bb131
+
+bb89: ; preds = %bb63
+ br label %bb131
+
+bb131: ; preds = %bb89, %bb68
+ %tmp133 = add i32 %t.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %tmp136 = icmp ult i32 %tmp133, 80 ; <i1> [#uses=1]
+ br i1 %tmp136, label %bb63, label %bb142
+
+bb142: ; preds = %bb131, %bb52
+ br i1 undef, label %bb63, label %bb52
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll b/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll
new file mode 100644
index 0000000..1fcd960
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -loop-index-split -stats -disable-output | not grep "1 loop-index-split"
+; PR 2487
+@g_6 = external global i32 ; <i32*> [#uses=1]
+
+define void @func_1() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb4, %entry
+ %l_3.0 = phi i8 [ 0, %entry ], [ %tmp6, %bb4 ] ; <i8> [#uses=2]
+ %tmp1 = icmp eq i8 %l_3.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp1, label %bb3, label %bb4
+
+bb3: ; preds = %bb
+ store i32 1, i32* @g_6, align 4
+ br label %bb4
+
+bb4: ; preds = %bb3, %bb
+ %tmp6 = add i8 %l_3.0, 1 ; <i8> [#uses=2]
+ %tmp9 = icmp sgt i8 %tmp6, -1 ; <i1> [#uses=1]
+ br i1 %tmp9, label %bb, label %return
+
+return: ; preds = %bb4
+ ret void
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-09-17-IVUse.ll b/test/Transforms/LoopIndexSplit/2008-09-17-IVUse.ll
new file mode 100644
index 0000000..ee8e7a3e
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-09-17-IVUse.ll
@@ -0,0 +1,78 @@
+; RUN: opt < %s -loop-index-split -stats -disable-output | not grep "loop-index-split"
+; PR 2791
+@g_40 = common global i32 0 ; <i32*> [#uses=1]
+@g_192 = common global i32 0 ; <i32*> [#uses=2]
+@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define void @func_29() nounwind {
+entry:
+ %0 = load i32* @g_40, align 4 ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ %g_192.promoted = load i32* @g_192 ; <i32> [#uses=0]
+ br i1 %1, label %entry.split.us, label %entry.split
+
+entry.split.us: ; preds = %entry
+ br label %bb.us
+
+bb.us: ; preds = %bb5.us, %entry.split.us
+ %i.0.reg2mem.0.us = phi i32 [ 0, %entry.split.us ], [ %3, %bb5.us ] ; <i32> [#uses=2]
+ %2 = icmp eq i32 %i.0.reg2mem.0.us, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb1.us, label %bb5.us
+
+bb5.us: ; preds = %bb1.us, %bb4.us, %bb.us
+ %iftmp.0.0.us = phi i32 [ 0, %bb4.us ], [ 1, %bb.us ], [ 1, %bb1.us ] ; <i32> [#uses=1]
+ %3 = add i32 %i.0.reg2mem.0.us, 1 ; <i32> [#uses=3]
+ %4 = icmp ult i32 %3, 10 ; <i1> [#uses=1]
+ br i1 %4, label %bb.us, label %bb8.us
+
+bb4.us: ; preds = %bb1.us
+ br label %bb5.us
+
+bb1.us: ; preds = %bb.us
+ br i1 true, label %bb4.us, label %bb5.us
+
+bb8.us: ; preds = %bb5.us
+ %iftmp.0.0.lcssa.us = phi i32 [ %iftmp.0.0.us, %bb5.us ] ; <i32> [#uses=1]
+ %.lcssa.us = phi i32 [ %3, %bb5.us ] ; <i32> [#uses=1]
+ br label %bb8.split
+
+entry.split: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb5, %entry.split
+ %i.0.reg2mem.0 = phi i32 [ 0, %entry.split ], [ %6, %bb5 ] ; <i32> [#uses=2]
+ %5 = icmp eq i32 %i.0.reg2mem.0, 0 ; <i1> [#uses=1]
+ br i1 %5, label %bb1, label %bb5
+
+bb1: ; preds = %bb
+ br i1 false, label %bb4, label %bb5
+
+bb4: ; preds = %bb1
+ br label %bb5
+
+bb5: ; preds = %bb1, %bb, %bb4
+ %iftmp.0.0 = phi i32 [ 0, %bb4 ], [ 1, %bb ], [ 1, %bb1 ] ; <i32> [#uses=1]
+ %6 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=3]
+ %7 = icmp ult i32 %6, 10 ; <i1> [#uses=1]
+ br i1 %7, label %bb, label %bb8
+
+bb8: ; preds = %bb5
+ %iftmp.0.0.lcssa = phi i32 [ %iftmp.0.0, %bb5 ] ; <i32> [#uses=1]
+ %.lcssa = phi i32 [ %6, %bb5 ] ; <i32> [#uses=1]
+ br label %bb8.split
+
+bb8.split: ; preds = %bb8.us, %bb8
+ %iftmp.0.0.lcssa.us-lcssa = phi i32 [ %iftmp.0.0.lcssa, %bb8 ], [ %iftmp.0.0.lcssa.us, %bb8.us ] ; <i32> [#uses=1]
+ %.lcssa.us-lcssa = phi i32 [ %.lcssa, %bb8 ], [ %.lcssa.us, %bb8.us ] ; <i32> [#uses=1]
+ store i32 %iftmp.0.0.lcssa.us-lcssa, i32* @g_192
+ %8 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), i32 %.lcssa.us-lcssa ) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...) nounwind
+
+define i32 @main() nounwind {
+entry:
+ call void @func_29( ) nounwind
+ ret i32 0
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-09-20-Crash.ll b/test/Transforms/LoopIndexSplit/2008-09-20-Crash.ll
new file mode 100644
index 0000000..ef67736
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-09-20-Crash.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -loop-index-split -disable-output
+; PR 2805
+@g_330 = common global i32 0 ; <i32*> [#uses=1]
+
+define i32 @func_45(i32 %p_47) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb3, %entry
+ %p_47_addr.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %2, %bb3 ] ; <i32> [#uses=2]
+ %0 = icmp eq i32 %p_47_addr.0.reg2mem.0, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ %1 = tail call i32 (...)* @func_70( i32 1 ) nounwind ; <i32> [#uses=0]
+ br label %bb3
+
+bb2: ; preds = %bb
+ store i32 1, i32* @g_330, align 4
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %2 = add i32 %p_47_addr.0.reg2mem.0, 1 ; <i32> [#uses=3]
+ %3 = icmp ult i32 %2, 22 ; <i1> [#uses=1]
+ br i1 %3, label %bb, label %bb6
+
+bb6: ; preds = %bb3
+ %.lcssa = phi i32 [ %2, %bb3 ] ; <i32> [#uses=1]
+ %4 = tail call i32 (...)* @func_95( i32 %.lcssa ) nounwind ; <i32> [#uses=1]
+ %5 = tail call i32 (...)* @func_56( i32 %4 ) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @func_70(...)
+
+declare i32 @func_95(...)
+
+declare i32 @func_56(...)
diff --git a/test/Transforms/LoopIndexSplit/2008-10-06-Crash.ll b/test/Transforms/LoopIndexSplit/2008-10-06-Crash.ll
new file mode 100644
index 0000000..cca54ad
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-10-06-Crash.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -loop-index-split -disable-output
+ %struct.RExC_state_t = type { i32, i8*, %struct.regexp*, i8*, i8*, i8*, i32, %struct.regnode*, %struct.regnode*, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.SV = type { i8*, i32, i32 }
+ %struct.reg_data = type { i32, i8*, [1 x i8*] }
+ %struct.reg_substr_data = type { [3 x %struct.reg_substr_datum] }
+ %struct.reg_substr_datum = type { i32, i32, %struct.SV*, %struct.SV* }
+ %struct.regexp = type { i32*, i32*, %struct.regnode*, %struct.reg_substr_data*, i8*, %struct.reg_data*, i8*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, [1 x %struct.regnode] }
+ %struct.regnode = type { i8, i8, i16 }
+
+define fastcc %struct.regnode* @S_regclass(%struct.RExC_state_t* %pRExC_state) nounwind {
+entry:
+ br label %bb439
+
+bb439: ; preds = %bb444, %entry
+ %value23.16.reg2mem.0 = phi i32 [ %3, %bb444 ], [ 0, %entry ] ; <i32> [#uses=3]
+ %0 = icmp ugt i32 %value23.16.reg2mem.0, 31 ; <i1> [#uses=1]
+ %1 = icmp ne i32 %value23.16.reg2mem.0, 127 ; <i1> [#uses=1]
+ %2 = and i1 %0, %1 ; <i1> [#uses=1]
+ br i1 %2, label %bb443, label %bb444
+
+bb443: ; preds = %bb439
+ br label %bb444
+
+bb444: ; preds = %bb443, %bb439
+ %3 = add i32 %value23.16.reg2mem.0, 1 ; <i32> [#uses=2]
+ %4 = icmp ugt i32 %3, 255 ; <i1> [#uses=1]
+ br i1 %4, label %bb675, label %bb439
+
+bb675: ; preds = %bb444
+ unreachable
+}
diff --git a/test/Transforms/LoopIndexSplit/2008-10-10-OneIteration.ll b/test/Transforms/LoopIndexSplit/2008-10-10-OneIteration.ll
new file mode 100644
index 0000000..372fee5
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-10-10-OneIteration.ll
@@ -0,0 +1,66 @@
+; RUN: opt < %s -loop-index-split -stats -disable-output |& grep "1 loop-index-split"
+; PR 2869
+
+@w = external global [2 x [2 x i32]] ; <[2 x [2 x i32]]*> [#uses=5]
+
+declare i32 @f() nounwind
+
+define i32 @main() noreturn nounwind {
+entry:
+ br label %bb1.i.outer
+
+bb1.i.outer: ; preds = %bb5.i, %entry
+ %i.0.reg2mem.0.ph.i.ph = phi i32 [ 0, %entry ], [ %indvar.next1, %bb5.i ] ; <i32> [#uses=3]
+ br label %bb1.i
+
+bb1.i: ; preds = %bb3.i, %bb1.i.outer
+ %j.0.reg2mem.0.i = phi i32 [ 0, %bb1.i.outer ], [ %indvar.next, %bb3.i ] ; <i32> [#uses=3]
+ %0 = icmp eq i32 %i.0.reg2mem.0.ph.i.ph, %j.0.reg2mem.0.i ; <i1> [#uses=1]
+ br i1 %0, label %bb2.i, label %bb3.i
+
+bb2.i: ; preds = %bb1.i
+ %1 = getelementptr [2 x [2 x i32]]* @w, i32 0, i32 %i.0.reg2mem.0.ph.i.ph, i32 %j.0.reg2mem.0.i ; <i32*> [#uses=1]
+ store i32 1, i32* %1, align 4
+ br label %bb3.i
+
+bb3.i: ; preds = %bb2.i, %bb1.i
+ %indvar.next = add i32 %j.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 2 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb5.i, label %bb1.i
+
+bb5.i: ; preds = %bb3.i
+ %indvar.next1 = add i32 %i.0.reg2mem.0.ph.i.ph, 1 ; <i32> [#uses=2]
+ %exitcond2 = icmp eq i32 %indvar.next1, 2 ; <i1> [#uses=1]
+ br i1 %exitcond2, label %f.exit, label %bb1.i.outer
+
+f.exit: ; preds = %bb5.i
+ %2 = load i32* getelementptr ([2 x [2 x i32]]* @w, i32 0, i32 0, i32 0), align 4 ; <i32> [#uses=1]
+ %3 = icmp eq i32 %2, 1 ; <i1> [#uses=1]
+ br i1 %3, label %bb, label %bb3
+
+bb: ; preds = %f.exit
+ %4 = load i32* getelementptr ([2 x [2 x i32]]* @w, i32 0, i32 1, i32 1), align 4 ; <i32> [#uses=1]
+ %5 = icmp eq i32 %4, 1 ; <i1> [#uses=1]
+ br i1 %5, label %bb1, label %bb3
+
+bb1: ; preds = %bb
+ %6 = load i32* getelementptr ([2 x [2 x i32]]* @w, i32 0, i32 1, i32 0), align 4 ; <i32> [#uses=1]
+ %7 = icmp eq i32 %6, 0 ; <i1> [#uses=1]
+ br i1 %7, label %bb2, label %bb3
+
+bb2: ; preds = %bb1
+ %8 = load i32* getelementptr ([2 x [2 x i32]]* @w, i32 0, i32 0, i32 1), align 4 ; <i32> [#uses=1]
+ %9 = icmp eq i32 %8, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb4, label %bb3
+
+bb3: ; preds = %bb2, %bb1, %bb, %f.exit
+ tail call void @abort() noreturn nounwind
+ unreachable
+
+bb4: ; preds = %bb2
+ ret i32 0
+}
+
+declare void @abort() noreturn nounwind
+
+declare void @exit(i32) noreturn nounwind
diff --git a/test/Transforms/LoopIndexSplit/2008-11-10-Sign.ll b/test/Transforms/LoopIndexSplit/2008-11-10-Sign.ll
new file mode 100644
index 0000000..217ff52
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2008-11-10-Sign.ll
@@ -0,0 +1,69 @@
+; RUN: opt < %s -loop-index-split -stats | not grep "loop-index-split"
+; PR3029
+
+@g_138 = common global i32 0 ; <i32*> [#uses=3]
+@g_188 = common global i32 0 ; <i32*> [#uses=4]
+@g_207 = common global i32 0 ; <i32*> [#uses=3]
+@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+@g_102 = common global i32 0 ; <i32*> [#uses=0]
+
+define i32 @func_119() nounwind {
+entry:
+ %0 = volatile load i32* @g_138, align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
+
+define void @func_110(i32 %p_111) nounwind {
+entry:
+ %0 = load i32* @g_188, align 4 ; <i32> [#uses=1]
+ %1 = icmp ugt i32 %0, -1572397472 ; <i1> [#uses=1]
+ br i1 %1, label %bb, label %bb1
+
+bb: ; preds = %entry
+ %2 = volatile load i32* @g_138, align 4 ; <i32> [#uses=0]
+ ret void
+
+bb1: ; preds = %entry
+ store i32 1, i32* @g_207, align 4
+ ret void
+}
+
+define void @func_34() nounwind {
+entry:
+ store i32 0, i32* @g_188
+ %g_188.promoted = load i32* @g_188 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %func_110.exit, %entry
+ %g_188.tmp.0 = phi i32 [ %g_188.promoted, %entry ], [ %2, %func_110.exit ] ; <i32> [#uses=2]
+ %0 = icmp ugt i32 %g_188.tmp.0, -1572397472 ; <i1> [#uses=1]
+ br i1 %0, label %bb.i, label %bb1.i
+
+bb.i: ; preds = %bb
+ %1 = volatile load i32* @g_138, align 4 ; <i32> [#uses=0]
+ br label %func_110.exit
+
+bb1.i: ; preds = %bb
+ store i32 1, i32* @g_207, align 4
+ br label %func_110.exit
+
+func_110.exit: ; preds = %bb.i, %bb1.i
+ %2 = add i32 %g_188.tmp.0, 1 ; <i32> [#uses=3]
+ %3 = icmp sgt i32 %2, 1 ; <i1> [#uses=1]
+ br i1 %3, label %return, label %bb
+
+return: ; preds = %func_110.exit
+ %.lcssa = phi i32 [ %2, %func_110.exit ] ; <i32> [#uses=1]
+ store i32 %.lcssa, i32* @g_188
+ ret void
+}
+
+define i32 @main() nounwind {
+entry:
+ call void @func_34() nounwind
+ %0 = load i32* @g_207, align 4 ; <i32> [#uses=1]
+ %1 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), i32 %0) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/Transforms/LoopIndexSplit/2009-03-02-UpdateIterationSpace-crash.ll b/test/Transforms/LoopIndexSplit/2009-03-02-UpdateIterationSpace-crash.ll
new file mode 100644
index 0000000..9acf391
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2009-03-02-UpdateIterationSpace-crash.ll
@@ -0,0 +1,64 @@
+; RUN: opt < %s -loop-index-split -disable-output
+ %struct.CGPoint = type { double, double }
+ %struct.IBCFMutableDictionary = type { %struct.NSMutableArray, %struct.__CFDictionary*, %struct.NSSortDescriptor*, %struct.NSSortDescriptor* }
+ %struct.IBInspectorMode = type opaque
+ %struct.IBInspectorModeView = type { %struct.NSView, %struct.NSArray*, %struct.IBCFMutableDictionary*, %struct.IBInspectorMode*, %struct.IBInspectorMode*, %struct.IBInspectorMode*, %struct.objc_selector*, %struct.NSObject* }
+ %struct.NSArray = type { %struct.NSObject }
+ %struct.NSImage = type { %struct.NSObject, %struct.NSArray*, %struct.CGPoint, %struct.__imageFlags, %struct.NSObject*, %struct._NSImageAuxiliary* }
+ %struct.NSMutableArray = type { %struct.NSArray }
+ %struct.NSObject = type { %struct.objc_class* }
+ %struct.NSRect = type { %struct.CGPoint, %struct.CGPoint }
+ %struct.NSResponder = type { %struct.NSObject, %struct.NSObject* }
+ %struct.NSSortDescriptor = type { %struct.NSObject, i64, %struct.NSArray*, %struct.objc_selector*, %struct.NSObject* }
+ %struct.NSURL = type { %struct.NSObject, %struct.NSArray*, %struct.NSURL*, i8*, i8* }
+ %struct.NSView = type { %struct.NSResponder, %struct.NSRect, %struct.NSRect, %struct.NSObject*, %struct.NSObject*, %struct.NSWindow*, %struct.NSObject*, %struct.NSObject*, %struct.NSObject*, %struct.NSObject*, %struct._NSViewAuxiliary*, %struct._VFlags, %struct.__VFlags2 }
+ %struct.NSWindow = type { %struct.NSResponder, %struct.NSRect, %struct.NSObject*, %struct.NSObject*, %struct.NSResponder*, %struct.NSView*, %struct.NSView*, %struct.NSObject*, %struct.NSObject*, i32, i64, i32, %struct.NSArray*, %struct.NSObject*, i8, i8, i8, i8, i8*, i8*, %struct.NSImage*, i32, %struct.NSMutableArray*, %struct.NSURL*, %struct.CGPoint*, %struct.NSArray*, %struct.NSArray*, %struct.__wFlags, %struct.NSObject*, %struct.NSView*, %struct.NSWindowAuxiliary* }
+ %struct.NSWindowAuxiliary = type opaque
+ %struct._NSImageAuxiliary = type opaque
+ %struct._NSViewAuxiliary = type opaque
+ %struct._VFlags = type <{ i8, i8, i8, i8 }>
+ %struct.__CFDictionary = type opaque
+ %struct.__VFlags2 = type <{ i32 }>
+ %struct.__imageFlags = type <{ i8, [3 x i8] }>
+ %struct.__wFlags = type <{ i8, i8, i8, i8, i8, i8, i8, i8 }>
+ %struct.objc_class = type opaque
+ %struct.objc_selector = type opaque
+
+define %struct.NSArray* @"\01-[IBInspectorModeView calculateModeRects]"(%struct.IBInspectorModeView* %self, %struct.objc_selector* %_cmd) optsize ssp {
+entry:
+ br i1 false, label %bb7, label %bb
+
+bb: ; preds = %entry
+ br i1 false, label %bb.nph, label %bb7.loopexit
+
+bb.nph: ; preds = %bb
+ br label %bb1
+
+bb1: ; preds = %bb6, %bb.nph
+ %midx.01 = phi i64 [ %3, %bb6 ], [ 0, %bb.nph ] ; <i64> [#uses=3]
+ %0 = icmp sge i64 %midx.01, 0 ; <i1> [#uses=1]
+ %1 = icmp sle i64 %midx.01, 0 ; <i1> [#uses=1]
+ %2 = and i1 %0, %1 ; <i1> [#uses=1]
+ br i1 %2, label %bb4, label %bb5
+
+bb4: ; preds = %bb1
+ br label %bb5
+
+bb5: ; preds = %bb4, %bb1
+ %modeWidth.0 = phi double [ 0.000000e+00, %bb1 ], [ 0.000000e+00, %bb4 ] ; <double> [#uses=0]
+ %3 = add i64 %midx.01, 1 ; <i64> [#uses=1]
+ br label %bb6
+
+bb6: ; preds = %bb5
+ %4 = icmp slt i64 0, 0 ; <i1> [#uses=1]
+ br i1 %4, label %bb1, label %bb6.bb7.loopexit_crit_edge
+
+bb6.bb7.loopexit_crit_edge: ; preds = %bb6
+ br label %bb7.loopexit
+
+bb7.loopexit: ; preds = %bb6.bb7.loopexit_crit_edge, %bb
+ br label %bb7
+
+bb7: ; preds = %bb7.loopexit, %entry
+ ret %struct.NSArray* null
+}
diff --git a/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll b/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll
new file mode 100644
index 0000000..deef941
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -loop-index-split -S | not grep undef
+define i32 @main() {
+entry:
+ br label %header
+
+header:
+ %r = phi i32 [ 0, %entry ], [ %r3, %skip ]
+ %i = phi i32 [ 0, %entry ], [ %i1, %skip ]
+ %i99 = add i32 %i, 99
+ %cond = icmp eq i32 %i99, 3
+ br i1 %cond, label %body, label %skip
+
+body:
+ br label %skip
+
+skip:
+ %r3 = phi i32 [ %r, %header ], [ 3, %body ]
+ %i1 = add i32 %i, 1
+ %exitcond = icmp eq i32 %i1, 10
+ br i1 %exitcond, label %exit, label %header
+
+exit:
+ ret i32 %r3
+}
diff --git a/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll b/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll
new file mode 100644
index 0000000..ad2b794
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll
@@ -0,0 +1,52 @@
+; RUN: opt < %s -loop-index-split -disable-output
+
+ %struct._edit_script = type { %struct._edit_script*, i32, i8 }
+
+define void @align_path(i8* %seq1, i8* %seq2, i32 %i1, i32 %j1, i32 %i2, i32 %j2, i32 %dist, %struct._edit_script** %head, %struct._edit_script** %tail, i32 %M, i32 %N) {
+entry:
+ br label %bb354
+
+bb354: ; preds = %bb511, %entry
+ br i1 false, label %bb495, label %bb368
+
+bb368: ; preds = %bb354
+ ret void
+
+bb495: ; preds = %bb495, %bb354
+ br i1 false, label %bb511, label %bb495
+
+bb511: ; preds = %bb495
+ br i1 false, label %xmalloc.exit69, label %bb354
+
+xmalloc.exit69: ; preds = %bb511
+ br i1 false, label %bb556, label %bb542.preheader
+
+bb542.preheader: ; preds = %xmalloc.exit69
+ ret void
+
+bb556: ; preds = %xmalloc.exit69
+ br label %bb583
+
+bb583: ; preds = %cond_next693, %bb556
+ %k.4342.0 = phi i32 [ %tmp707, %cond_next693 ], [ 0, %bb556 ] ; <i32> [#uses=2]
+ %tmp586 = icmp eq i32 %k.4342.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp586, label %cond_true589, label %cond_false608
+
+cond_true589: ; preds = %bb583
+ br label %cond_next693
+
+cond_false608: ; preds = %bb583
+ br i1 false, label %cond_next661, label %cond_next693
+
+cond_next661: ; preds = %cond_false608
+ br label %cond_next693
+
+cond_next693: ; preds = %cond_next661, %cond_false608, %cond_true589
+ %tmp705 = getelementptr i32* null, i32 0 ; <i32*> [#uses=0]
+ %tmp707 = add i32 %k.4342.0, 1 ; <i32> [#uses=2]
+ %tmp711 = icmp sgt i32 %tmp707, 0 ; <i1> [#uses=1]
+ br i1 %tmp711, label %bb726.preheader, label %bb583
+
+bb726.preheader: ; preds = %cond_next693
+ ret void
+}
diff --git a/test/Transforms/LoopIndexSplit/Crash-2007-12-03.ll b/test/Transforms/LoopIndexSplit/Crash-2007-12-03.ll
new file mode 100644
index 0000000..187484a
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/Crash-2007-12-03.ll
@@ -0,0 +1,44 @@
+; RUN: opt < %s -loop-index-split -disable-output
+; PR1828.bc
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+ %RPyOpaque_RuntimeTypeInfo = type opaque*
+ %arraytype_Char_1 = type { i32, [0 x i8] }
+ %arraytype_Signed = type { i32, [0 x i32] }
+ %functiontype_11 = type %structtype_object* ()
+ %functiontype_360 = type %structtype_rpy_string* (%structtype_pypy.rlib.rbigint.rbigint*, %structtype_rpy_string*, %structtype_rpy_string*, %structtype_rpy_string*)
+ %structtype_list_18 = type { i32, %arraytype_Signed* }
+ %structtype_object = type { %structtype_object_vtable* }
+ %structtype_object_vtable = type { i32, i32, %RPyOpaque_RuntimeTypeInfo*, %arraytype_Char_1*, %functiontype_11* }
+ %structtype_pypy.rlib.rbigint.rbigint = type { %structtype_object, %structtype_list_18*, i32 }
+ %structtype_rpy_string = type { i32, %arraytype_Char_1 }
+
+define fastcc %structtype_rpy_string* @pypy__format(%structtype_pypy.rlib.rbigint.rbigint* %a_1, %structtype_rpy_string* %digits_0, %structtype_rpy_string* %prefix_3, %structtype_rpy_string* %suffix_0) {
+block0:
+ br i1 false, label %block67, label %block13
+
+block13: ; preds = %block0
+ ret %structtype_rpy_string* null
+
+block31: ; preds = %block67, %block44
+ ret %structtype_rpy_string* null
+
+block42: ; preds = %block67, %block44
+ %j_167.reg2mem.0 = phi i32 [ %v63822, %block44 ], [ 0, %block67 ] ; <i32> [#uses=1]
+ %v63822 = add i32 %j_167.reg2mem.0, -1 ; <i32> [#uses=3]
+ %v63823 = icmp slt i32 %v63822, 0 ; <i1> [#uses=1]
+ br i1 %v63823, label %block46, label %block43
+
+block43: ; preds = %block42
+ br label %block44
+
+block44: ; preds = %block46, %block43
+ %v6377959 = icmp sgt i32 %v63822, 0 ; <i1> [#uses=1]
+ br i1 %v6377959, label %block42, label %block31
+
+block46: ; preds = %block42
+ br label %block44
+
+block67: ; preds = %block0
+ br i1 false, label %block42, label %block31
+}
diff --git a/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll b/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll
new file mode 100644
index 0000000..098e407
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll
@@ -0,0 +1,58 @@
+; RUN: opt < %s -loop-index-split -disable-output
+
+ %struct._edit_script = type { %struct._edit_script*, i32, i8 }
+
+define void @align_path(i8* %seq1, i8* %seq2, i32 %i1, i32 %j1, i32 %i2, i32 %j2, i32 %dist, %struct._edit_script** %head, %struct._edit_script** %tail, i32 %M, i32 %N) {
+entry:
+ br label %bb354
+
+bb354: ; preds = %bb511, %entry
+ br i1 false, label %bb495, label %bb368
+
+bb368: ; preds = %bb354
+ ret void
+
+bb495: ; preds = %bb495, %bb354
+ br i1 false, label %bb511, label %bb495
+
+bb511: ; preds = %bb495
+ br i1 false, label %xmalloc.exit69, label %bb354
+
+xmalloc.exit69: ; preds = %bb511
+ br i1 false, label %bb556, label %bb542.preheader
+
+bb542.preheader: ; preds = %xmalloc.exit69
+ ret void
+
+bb556: ; preds = %xmalloc.exit69
+ br label %bb583
+
+bb583: ; preds = %cond_next693, %bb556
+ %k.4342.0 = phi i32 [ %tmp707, %cond_next693 ], [ 0, %bb556 ] ; <i32> [#uses=2]
+ %tmp586 = icmp eq i32 %k.4342.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp586, label %cond_true589, label %cond_false608
+
+cond_true589: ; preds = %bb583
+ br label %cond_next693
+
+cond_false608: ; preds = %bb583
+ br i1 false, label %bb645, label %cond_next693
+
+bb645: ; preds = %cond_false608
+ br i1 false, label %bb684, label %cond_next661
+
+cond_next661: ; preds = %bb645
+ br i1 false, label %bb684, label %cond_next693
+
+bb684: ; preds = %cond_next661, %bb645
+ br label %cond_next693
+
+cond_next693: ; preds = %bb684, %cond_next661, %cond_false608, %cond_true589
+ %tmp705 = getelementptr i32* null, i32 0 ; <i32*> [#uses=0]
+ %tmp707 = add i32 %k.4342.0, 1 ; <i32> [#uses=2]
+ %tmp711 = icmp sgt i32 %tmp707, 0 ; <i1> [#uses=1]
+ br i1 %tmp711, label %bb726.preheader, label %bb583
+
+bb726.preheader: ; preds = %cond_next693
+ ret void
+}
diff --git a/test/Transforms/LoopIndexSplit/ExitCondition-2007-09-10.ll b/test/Transforms/LoopIndexSplit/ExitCondition-2007-09-10.ll
new file mode 100644
index 0000000..a04715a7
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/ExitCondition-2007-09-10.ll
@@ -0,0 +1,50 @@
+; RUN: opt < %s -loop-index-split -disable-output
+
+@k = external global i32 ; <i32*> [#uses=2]
+
+define void @foobar(i32 %a, i32 %b) {
+entry:
+ br label %bb
+
+bb: ; preds = %cond_next16, %entry
+ %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5]
+ %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3]
+ %tmp1 = icmp slt i32 %i.01.0, 50 ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1]
+ %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2]
+ %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1]
+ br i1 %tmp1015, label %cond_next16, label %cond_true13
+
+cond_false: ; preds = %bb
+ %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1]
+ br i1 %tmp10, label %cond_next16, label %cond_true13
+
+cond_true13: ; preds = %cond_false, %cond_true
+ %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1]
+ %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ br label %cond_next16
+
+cond_next16: ; preds = %cond_false, %cond_true, %cond_true13
+ %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2]
+ %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3]
+ %tmp21 = icmp eq i32 %tmp18, 100 ; <i1> [#uses=1]
+ br i1 %tmp21, label %bb, label %bb24
+
+bb24: ; preds = %cond_next16
+ %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1]
+ %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1]
+ %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @foo(i32)
+
+declare i32 @bar(i32)
+
+declare i32 @t(i32, i32)
diff --git a/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll b/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll
new file mode 100644
index 0000000..d18b3b7
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll
@@ -0,0 +1,67 @@
+; Loop is elimianted
+; RUN: opt < %s -loop-index-split -disable-output -stats |& \
+; RUN: grep "loop-index-split" | count 1
+ %struct.anon = type { i32 }
+@S1 = external global i32 ; <i32*> [#uses=1]
+@W1 = external global i32 ; <i32*> [#uses=1]
+@Y = weak global [100 x %struct.anon] zeroinitializer, align 32 ; <[100 x %struct.anon]*> [#uses=1]
+@ti = external global i32 ; <i32*> [#uses=1]
+@T2 = external global [100 x [100 x i32]] ; <[100 x [100 x i32]]*> [#uses=1]
+@d = external global i32 ; <i32*> [#uses=1]
+@T1 = external global i32 ; <i32*> [#uses=2]
+@N2 = external global i32 ; <i32*> [#uses=2]
+
+define void @foo() {
+entry:
+ %tmp = load i32* @S1, align 4 ; <i32> [#uses=4]
+ %tmp266 = load i32* @N2, align 4 ; <i32> [#uses=1]
+ %tmp288 = icmp ult i32 %tmp, %tmp266 ; <i1> [#uses=1]
+ br i1 %tmp288, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ %tmp1 = load i32* @W1, align 4 ; <i32> [#uses=1]
+ %tmp13 = load i32* @ti, align 4 ; <i32> [#uses=1]
+ %tmp18 = load i32* @d, align 4 ; <i32> [#uses=1]
+ %tmp26 = load i32* @N2, align 4 ; <i32> [#uses=2]
+ %T1.promoted = load i32* @T1 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp, 1 ; <i32> [#uses=2]
+ %tmp4 = icmp ugt i32 %tmp2, %tmp26 ; <i1> [#uses=1]
+ %umax = select i1 %tmp4, i32 %tmp2, i32 %tmp26 ; <i32> [#uses=1]
+ %tmp5 = sub i32 0, %tmp ; <i32> [#uses=1]
+ %tmp6 = add i32 %umax, %tmp5 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb25, %bb.preheader
+ %indvar = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb25 ] ; <i32> [#uses=2]
+ %T1.tmp.1 = phi i32 [ %T1.promoted, %bb.preheader ], [ %T1.tmp.0, %bb25 ] ; <i32> [#uses=3]
+ %tj.01.0 = add i32 %indvar, %tmp ; <i32> [#uses=3]
+ %tmp3 = icmp eq i32 %tj.01.0, %tmp1 ; <i1> [#uses=1]
+ br i1 %tmp3, label %cond_true, label %bb25
+
+cond_true: ; preds = %bb
+ %tmp7 = getelementptr [100 x %struct.anon]* @Y, i32 0, i32 %tj.01.0, i32 0 ; <i32*> [#uses=1]
+ %tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1]
+ %tmp9 = icmp sgt i32 %tmp8, 0 ; <i1> [#uses=1]
+ br i1 %tmp9, label %cond_true12, label %bb25
+
+cond_true12: ; preds = %cond_true
+ %tmp16 = getelementptr [100 x [100 x i32]]* @T2, i32 0, i32 %tmp13, i32 %tj.01.0 ; <i32*> [#uses=1]
+ %tmp17 = load i32* %tmp16, align 4 ; <i32> [#uses=1]
+ %tmp19 = mul i32 %tmp18, %tmp17 ; <i32> [#uses=1]
+ %tmp21 = add i32 %tmp19, %T1.tmp.1 ; <i32> [#uses=1]
+ br label %bb25
+
+bb25: ; preds = %cond_true12, %cond_true, %bb
+ %T1.tmp.0 = phi i32 [ %T1.tmp.1, %bb ], [ %T1.tmp.1, %cond_true ], [ %tmp21, %cond_true12 ] ; <i32> [#uses=2]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp ne i32 %indvar.next, %tmp6 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb, label %return.loopexit
+
+return.loopexit: ; preds = %bb25
+ %T1.tmp.0.lcssa = phi i32 [ %T1.tmp.0, %bb25 ] ; <i32> [#uses=1]
+ store i32 %T1.tmp.0.lcssa, i32* @T1
+ br label %return
+
+return: ; preds = %return.loopexit, %entry
+ ret void
+}
diff --git a/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll b/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll
new file mode 100644
index 0000000..ff73a5b
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll
@@ -0,0 +1,69 @@
+; Loop is elimianted. Save last value assignment.
+; RUN: opt < %s -loop-index-split -disable-output -stats |& \
+; RUN: grep "loop-index-split" | count 1
+
+ %struct.anon = type { i32 }
+@S1 = external global i32 ; <i32*> [#uses=1]
+@W1 = external global i32 ; <i32*> [#uses=1]
+@Y = weak global [100 x %struct.anon] zeroinitializer, align 32 ; <[100 x %struct.anon]*> [#uses=1]
+@ti = external global i32 ; <i32*> [#uses=1]
+@T2 = external global [100 x [100 x i32]] ; <[100 x [100 x i32]]*> [#uses=1]
+@d = external global i32 ; <i32*> [#uses=1]
+@T1 = external global i32 ; <i32*> [#uses=2]
+@N1 = external global i32 ; <i32*> [#uses=2]
+
+define void @foo() {
+entry:
+ %tmp = load i32* @S1, align 4 ; <i32> [#uses=4]
+ %tmp266 = load i32* @N1, align 4 ; <i32> [#uses=1]
+ %tmp288 = icmp ult i32 %tmp, %tmp266 ; <i1> [#uses=1]
+ br i1 %tmp288, label %bb.preheader, label %return
+
+bb.preheader: ; preds = %entry
+ %tmp1 = load i32* @W1, align 4 ; <i32> [#uses=1]
+ %tmp13 = load i32* @ti, align 4 ; <i32> [#uses=1]
+ %tmp18 = load i32* @d, align 4 ; <i32> [#uses=1]
+ %tmp26 = load i32* @N1, align 4 ; <i32> [#uses=2]
+ %T1.promoted = load i32* @T1 ; <i32> [#uses=1]
+ %tmp2 = add i32 %tmp, 1 ; <i32> [#uses=2]
+ %tmp4 = icmp ugt i32 %tmp2, %tmp26 ; <i1> [#uses=1]
+ %umax = select i1 %tmp4, i32 %tmp2, i32 %tmp26 ; <i32> [#uses=1]
+ %tmp5 = sub i32 0, %tmp ; <i32> [#uses=1]
+ %tmp6 = add i32 %umax, %tmp5 ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb25, %bb.preheader
+ %indvar = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb25 ] ; <i32> [#uses=2]
+ %T1.tmp.1 = phi i32 [ %T1.promoted, %bb.preheader ], [ %T1.tmp.0, %bb25 ] ; <i32> [#uses=3]
+ %tj.01.0 = add i32 %indvar, %tmp ; <i32> [#uses=3]
+ %tmp24 = add i32 %tj.01.0, 1 ; <i32> [#uses=1]
+ %tmp3 = icmp eq i32 %tmp24, %tmp1 ; <i1> [#uses=1]
+ br i1 %tmp3, label %cond_true, label %bb25
+
+cond_true: ; preds = %bb
+ %tmp7 = getelementptr [100 x %struct.anon]* @Y, i32 0, i32 %tj.01.0, i32 0 ; <i32*> [#uses=1]
+ %tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1]
+ %tmp9 = icmp sgt i32 %tmp8, 0 ; <i1> [#uses=1]
+ br i1 %tmp9, label %cond_true12, label %bb25
+
+cond_true12: ; preds = %cond_true
+ %tmp16 = getelementptr [100 x [100 x i32]]* @T2, i32 0, i32 %tmp13, i32 %tj.01.0 ; <i32*> [#uses=1]
+ %tmp17 = load i32* %tmp16, align 4 ; <i32> [#uses=1]
+ %tmp19 = mul i32 %tmp18, %tmp17 ; <i32> [#uses=1]
+ %tmp21 = add i32 %tmp19, %T1.tmp.1 ; <i32> [#uses=1]
+ br label %bb25
+
+bb25: ; preds = %cond_true12, %cond_true, %bb
+ %T1.tmp.0 = phi i32 [ %T1.tmp.1, %bb ], [ %T1.tmp.1, %cond_true ], [ %tmp21, %cond_true12 ] ; <i32> [#uses=2]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp ne i32 %indvar.next, %tmp6 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb, label %return.loopexit
+
+return.loopexit: ; preds = %bb25
+ %T1.tmp.0.lcssa = phi i32 [ %T1.tmp.0, %bb25 ] ; <i32> [#uses=1]
+ store i32 %T1.tmp.0.lcssa, i32* @T1
+ br label %return
+
+return: ; preds = %return.loopexit, %entry
+ ret void
+}
diff --git a/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll b/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll
new file mode 100644
index 0000000..6adb268
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll
@@ -0,0 +1,34 @@
+; Loop is elimianted. Save last value assignments, including induction variable.
+; RUN: opt < %s -loop-index-split -disable-output -stats | not grep "loop-index-split"
+
+declare i32 @foo(i32)
+declare i32 @bar(i32, i32)
+
+define void @foobar(i32 %a, i32 %b) {
+entry:
+ br label %bb
+
+bb: ; preds = %cond_next, %entry
+ %i.01.0 = phi i32 [ 0, %entry ], [ %tmp8, %cond_next ] ; <i32> [#uses=3]
+ %tsum.16.0 = phi i32 [ 42, %entry ], [ %tsum.0, %cond_next ] ; <i32> [#uses=2]
+ %tmp1 = icmp eq i32 %i.01.0, 50 ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %cond_next
+
+cond_true: ; preds = %bb
+ %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1]
+ %tmp6 = add i32 %tmp4, %tsum.16.0 ; <i32> [#uses=1]
+ br label %cond_next
+
+cond_next: ; preds = %bb, %cond_true
+ %tsum.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.16.0, %bb ] ; <i32> [#uses=2]
+ %tmp8 = add i32 %i.01.0, 1 ; <i32> [#uses=3]
+ %tmp11 = icmp slt i32 %tmp8, 100 ; <i1> [#uses=1]
+ br i1 %tmp11, label %bb, label %bb14
+
+bb14: ; preds = %cond_next
+ %tmp8.lcssa = phi i32 [ %tmp8, %cond_next ] ; <i32> [#uses=1]
+ %tsum.0.lcssa = phi i32 [ %tsum.0, %cond_next ] ; <i32> [#uses=1]
+ %tmp17 = tail call i32 @bar( i32 %tmp8.lcssa, i32 %tsum.0.lcssa ) ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/LoopIndexSplit/PR3913.ll b/test/Transforms/LoopIndexSplit/PR3913.ll
new file mode 100644
index 0000000..a2bf57c
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/PR3913.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -loop-index-split -S | not grep "icmp ne"
+
+define i32 @main() {
+entry:
+ br label %header
+
+header:
+ %r = phi i32 [ 0, %entry ], [ %r3, %skip ]
+ %i = phi i32 [ 0, %entry ], [ %i1, %skip ]
+ %cond = icmp eq i32 %i, 99
+ br i1 %cond, label %body, label %skip
+
+body:
+ br label %skip
+
+skip:
+ %r3 = phi i32 [ %r, %header ], [ 3, %body ]
+ %i1 = add i32 %i, 1
+ %exitcond = icmp eq i32 %i1, 10
+ br i1 %exitcond, label %exit, label %header
+
+exit:
+ ret i32 %r3
+}
diff --git a/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll b/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll
new file mode 100644
index 0000000..fc7d9e9
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll
@@ -0,0 +1,52 @@
+; Split loop. Save last value.
+; RUN: opt < %s -loop-index-split -disable-output -stats |& \
+; RUN: grep "loop-index-split" | count 1
+
+@k = external global i32 ; <i32*> [#uses=2]
+
+define void @foobar(i32 %a, i32 %b) {
+entry:
+ br label %bb
+
+bb: ; preds = %cond_next16, %entry
+ %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5]
+ %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3]
+ %tmp1 = icmp slt i32 %i.01.0, 50 ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1]
+ %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2]
+ %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1]
+ br i1 %tmp1015, label %cond_next16, label %cond_true13
+
+cond_false: ; preds = %bb
+ %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1]
+ br i1 %tmp10, label %cond_next16, label %cond_true13
+
+cond_true13: ; preds = %cond_false, %cond_true
+ %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1]
+ %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ br label %cond_next16
+
+cond_next16: ; preds = %cond_false, %cond_true, %cond_true13
+ %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2]
+ %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3]
+ %tmp21 = icmp slt i32 %tmp18, 100 ; <i1> [#uses=1]
+ br i1 %tmp21, label %bb, label %bb24
+
+bb24: ; preds = %cond_next16
+ %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1]
+ %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1]
+ %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @foo(i32)
+
+declare i32 @bar(i32)
+
+declare i32 @t(i32, i32)
diff --git a/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24-dbg.ll b/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24-dbg.ll
new file mode 100644
index 0000000..4ab95fc
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24-dbg.ll
@@ -0,0 +1,71 @@
+; Split loop. Save last value. Split value is off by one in this example.
+; RUN: opt < %s -loop-index-split -disable-output -stats |& \
+; RUN: grep "loop-index-split" | count 1
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
+
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+
+@k = external global i32 ; <i32*> [#uses=2]
+
+define void @foobar(i32 %a, i32 %b) {
+entry:
+ br label %bb
+
+bb: ; preds = %cond_next16, %entry
+ %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5]
+ %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3]
+ %tmp1 = icmp sgt i32 %i.01.0, 50 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1]
+ %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2]
+ %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp1015, label %cond_next16, label %cond_true13
+
+cond_false: ; preds = %bb
+ %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp10, label %cond_next16, label %cond_true13
+
+cond_true13: ; preds = %cond_false, %cond_true
+ %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1]
+ %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %cond_next16
+
+cond_next16: ; preds = %cond_false, %cond_true, %cond_true13
+ %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2]
+ %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3]
+ %tmp21 = icmp slt i32 %tmp18, 100 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp21, label %bb, label %bb24
+
+bb24: ; preds = %cond_next16
+ %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1]
+ %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1]
+ %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+}
+
+declare i32 @foo(i32)
+
+declare i32 @bar(i32)
+
+declare i32 @t(i32, i32)
diff --git a/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24.ll b/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24.ll
new file mode 100644
index 0000000..f61d967
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24.ll
@@ -0,0 +1,52 @@
+; Split loop. Save last value. Split value is off by one in this example.
+; RUN: opt < %s -loop-index-split -disable-output -stats |& \
+; RUN: grep "loop-index-split" | count 1
+
+@k = external global i32 ; <i32*> [#uses=2]
+
+define void @foobar(i32 %a, i32 %b) {
+entry:
+ br label %bb
+
+bb: ; preds = %cond_next16, %entry
+ %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5]
+ %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3]
+ %tmp1 = icmp sgt i32 %i.01.0, 50 ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1]
+ %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2]
+ %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1]
+ br i1 %tmp1015, label %cond_next16, label %cond_true13
+
+cond_false: ; preds = %bb
+ %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1]
+ br i1 %tmp10, label %cond_next16, label %cond_true13
+
+cond_true13: ; preds = %cond_false, %cond_true
+ %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1]
+ %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ br label %cond_next16
+
+cond_next16: ; preds = %cond_false, %cond_true, %cond_true13
+ %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2]
+ %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3]
+ %tmp21 = icmp slt i32 %tmp18, 100 ; <i1> [#uses=1]
+ br i1 %tmp21, label %bb, label %bb24
+
+bb24: ; preds = %cond_next16
+ %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1]
+ %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1]
+ %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @foo(i32)
+
+declare i32 @bar(i32)
+
+declare i32 @t(i32, i32)
diff --git a/test/Transforms/LoopIndexSplit/UpperBound-2007-08-24.ll b/test/Transforms/LoopIndexSplit/UpperBound-2007-08-24.ll
new file mode 100644
index 0000000..17f75d7
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/UpperBound-2007-08-24.ll
@@ -0,0 +1,52 @@
+; Split loop. Split value is a constant and greater then exit value.
+; Check whether optimizer inserts proper checkfor split value or not.
+; RUN: opt < %s -loop-index-split -S | grep select
+
+@k = external global i32 ; <i32*> [#uses=2]
+
+define void @foobar(i32 %a, i32 %b) {
+entry:
+ br label %bb
+
+bb: ; preds = %cond_next16, %entry
+ %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5]
+ %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3]
+ %tmp1 = icmp slt i32 %i.01.0, 500 ; <i1> [#uses=1]
+ br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true: ; preds = %bb
+ %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1]
+ %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2]
+ %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1]
+ br i1 %tmp1015, label %cond_next16, label %cond_true13
+
+cond_false: ; preds = %bb
+ %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1]
+ %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1]
+ br i1 %tmp10, label %cond_next16, label %cond_true13
+
+cond_true13: ; preds = %cond_false, %cond_true
+ %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1]
+ %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0]
+ br label %cond_next16
+
+cond_next16: ; preds = %cond_false, %cond_true, %cond_true13
+ %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2]
+ %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3]
+ %tmp21 = icmp slt i32 %tmp18, 100 ; <i1> [#uses=1]
+ br i1 %tmp21, label %bb, label %bb24
+
+bb24: ; preds = %cond_next16
+ %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1]
+ %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1]
+ %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @foo(i32)
+
+declare i32 @bar(i32)
+
+declare i32 @t(i32, i32)
diff --git a/test/Transforms/LoopIndexSplit/dg.exp b/test/Transforms/LoopIndexSplit/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll b/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll
new file mode 100644
index 0000000..6eed981
--- /dev/null
+++ b/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll
@@ -0,0 +1,195 @@
+; RUN: opt < %s -inline -reassociate -loop-rotate -loop-index-split -indvars -simplifycfg -verify
+; PR4471
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.VEC_basic_block_base = type { i32, i32, [1 x %struct.basic_block_def*] }
+ %struct.VEC_basic_block_gc = type { %struct.VEC_basic_block_base }
+ %struct.VEC_edge_base = type { i32, i32, [1 x %struct.edge_def*] }
+ %struct.VEC_edge_gc = type { %struct.VEC_edge_base }
+ %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] }
+ %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base }
+ %struct.VEC_temp_slot_p_base = type { i32, i32, [1 x %struct.temp_slot*] }
+ %struct.VEC_temp_slot_p_gc = type { %struct.VEC_temp_slot_p_base }
+ %struct.VEC_tree_base = type { i32, i32, [1 x %struct.tree_node*] }
+ %struct.VEC_tree_gc = type { %struct.VEC_tree_base }
+ %struct.__sbuf = type { i8*, i32 }
+ %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+ %struct.basic_block_def = type { %struct.tree_node*, %struct.VEC_edge_gc*, %struct.VEC_edge_gc*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_il_dependent, %struct.tree_node*, %struct.edge_prediction*, i64, i32, i32, i32, i32 }
+ %struct.basic_block_il_dependent = type { %struct.rtl_bb_info* }
+ %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [2 x i64] }
+ %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+ %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+ %struct.block_symbol = type { [3 x %struct.rtunion], %struct.object_block*, i64 }
+ %struct.case_node = type { %struct.case_node*, %struct.case_node*, %struct.case_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+ %struct.control_flow_graph = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.VEC_basic_block_gc*, i32, i32, i32, %struct.VEC_basic_block_gc*, i32 }
+ %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.__sbuf*, i32, i32, i64, i32 }
+ %struct.edge_def_insns = type { %struct.rtx_def* }
+ %struct.edge_prediction = type opaque
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.__sbuf, i32, i8*, %struct.rtx_def** }
+ %struct.et_node = type opaque
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.control_flow_graph*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.VEC_temp_slot_p_gc*, %struct.temp_slot*, %struct.var_refs_queue*, i32, i32, i32, i32, %struct.machine_function*, i32, i32, %struct.language_function*, %struct.htab*, %struct.rtx_def*, i32, i32, %struct.__sbuf, %struct.VEC_tree_gc*, %struct.tree_node*, i8*, i8*, i8*, i8*, i8*, %struct.tree_node*, i8, i8, i8, i8, i8 }
+ %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i64, i64, i64, i32, i32, i8* (i64, i64)*, void (i8*)*, i8*, i8* (i8*, i64, i64)*, void (i8*, i8*)*, i32 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.language_function = type opaque
+ %struct.loop = type opaque
+ %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, [4 x i32], i32, i32, i32 }
+ %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* }
+ %struct.obstack = type { i64, %struct._obstack_chunk*, i8*, i8*, i8*, i64, i32, %struct._obstack_chunk* (i8*, i64)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+ %struct.omp_clause_subcode = type { i32 }
+ %struct.rtl_bb_info = type { %struct.rtx_def*, %struct.rtx_def*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, %struct.rtx_def*, %struct.rtx_def*, i32 }
+ %struct.rtunion = type { i8* }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.section = type { %struct.unnamed_section }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.stack_local_entry = type opaque
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8 }
+ %struct.tree_decl_common = type { %struct.tree_decl_minimal, %struct.tree_node*, i8, i8, i8, i8, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_minimal = type { %struct.tree_common, %struct.__sbuf, i32, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl_non_common = type { %struct.tree_decl_with_vis, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_with_rtl = type { %struct.tree_decl_common, %struct.rtx_def* }
+ %struct.tree_decl_with_vis = type { %struct.tree_decl_with_rtl, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 }
+ %struct.tree_function_decl = type { %struct.tree_decl_non_common, i8, i8, %struct.function* }
+ %struct.tree_node = type { %struct.tree_function_decl }
+ %struct.u = type { %struct.block_symbol }
+ %struct.unnamed_section = type { %struct.omp_clause_subcode, void (i8*)*, i8*, %struct.section* }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %union.tree_ann_d = type opaque
+
+define void @emit_case_bit_tests(%struct.tree_node* %index_type, %struct.tree_node* %index_expr, %struct.tree_node* %minval, %struct.tree_node* %range, %struct.case_node* %nodes, %struct.rtx_def* %default_label) nounwind {
+entry:
+ br label %bb17
+
+bb: ; preds = %bb17
+ %0 = call i64 @tree_low_cst(%struct.tree_node* undef, i32 1) nounwind ; <i64> [#uses=1]
+ %1 = trunc i64 %0 to i32 ; <i32> [#uses=1]
+ br label %bb15
+
+bb10: ; preds = %bb15
+ %2 = icmp ugt i32 %j.0, 63 ; <i1> [#uses=1]
+ br i1 %2, label %bb11, label %bb12
+
+bb11: ; preds = %bb10
+ %3 = zext i32 0 to i64 ; <i64> [#uses=0]
+ br label %bb14
+
+bb12: ; preds = %bb10
+ %4 = or i64 undef, undef ; <i64> [#uses=0]
+ br label %bb14
+
+bb14: ; preds = %bb12, %bb11
+ %5 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ br label %bb15
+
+bb15: ; preds = %bb14, %bb
+ %j.0 = phi i32 [ %1, %bb ], [ %5, %bb14 ] ; <i32> [#uses=3]
+ %6 = icmp ugt i32 %j.0, undef ; <i1> [#uses=1]
+ br i1 %6, label %bb16, label %bb10
+
+bb16: ; preds = %bb15
+ br label %bb17
+
+bb17: ; preds = %bb16, %entry
+ br i1 undef, label %bb18, label %bb
+
+bb18: ; preds = %bb17
+ unreachable
+}
+
+declare i64 @tree_low_cst(%struct.tree_node*, i32)
+
+define void @expand_case(%struct.tree_node* %exp) nounwind {
+entry:
+ br i1 undef, label %bb2, label %bb
+
+bb: ; preds = %entry
+ unreachable
+
+bb2: ; preds = %entry
+ br i1 undef, label %bb3, label %bb4
+
+bb3: ; preds = %bb2
+ unreachable
+
+bb4: ; preds = %bb2
+ br i1 undef, label %bb127, label %bb5
+
+bb5: ; preds = %bb4
+ br i1 undef, label %bb6, label %bb7
+
+bb6: ; preds = %bb5
+ unreachable
+
+bb7: ; preds = %bb5
+ br i1 undef, label %bb9, label %bb8
+
+bb8: ; preds = %bb7
+ unreachable
+
+bb9: ; preds = %bb7
+ br i1 undef, label %bb11, label %bb10
+
+bb10: ; preds = %bb9
+ unreachable
+
+bb11: ; preds = %bb9
+ br i1 undef, label %bb37, label %bb21
+
+bb21: ; preds = %bb11
+ unreachable
+
+bb37: ; preds = %bb11
+ br i1 undef, label %bb38, label %bb39
+
+bb38: ; preds = %bb37
+ ret void
+
+bb39: ; preds = %bb37
+ br i1 undef, label %bb59, label %bb40
+
+bb40: ; preds = %bb39
+ br i1 undef, label %bb41, label %bb59
+
+bb41: ; preds = %bb40
+ br i1 undef, label %bb42, label %bb59
+
+bb42: ; preds = %bb41
+ br i1 undef, label %bb43, label %bb59
+
+bb43: ; preds = %bb42
+ br i1 undef, label %bb59, label %bb44
+
+bb44: ; preds = %bb43
+ br i1 undef, label %bb56, label %bb58
+
+bb56: ; preds = %bb44
+ unreachable
+
+bb58: ; preds = %bb44
+ call void @emit_case_bit_tests(%struct.tree_node* undef, %struct.tree_node* undef, %struct.tree_node* null, %struct.tree_node* undef, %struct.case_node* undef, %struct.rtx_def* undef) nounwind
+ br i1 undef, label %bb126, label %bb125
+
+bb59: ; preds = %bb43, %bb42, %bb41, %bb40, %bb39
+ br i1 undef, label %bb70, label %bb60
+
+bb60: ; preds = %bb59
+ unreachable
+
+bb70: ; preds = %bb59
+ unreachable
+
+bb125: ; preds = %bb58
+ unreachable
+
+bb126: ; preds = %bb58
+ unreachable
+
+bb127: ; preds = %bb4
+ ret void
+}
diff --git a/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll b/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll
new file mode 100644
index 0000000..7036d2d
--- /dev/null
+++ b/test/Transforms/LoopRotate/2009-01-25-SingleEntryPhi.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+; PR3408
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+ %struct.Cls = type { i32, i8, [2 x %struct.Cls*], [2 x %struct.Lit*] }
+ %struct.Lit = type { i8 }
+
+define void @picosat_main_bb13.i.i71.outer_bb132.i.i.i.outer(%struct.Cls**, %struct.Cls**, i32 %collect.i.i.i.1.lcssa, i32 %lcollect.i.i.i.2.lcssa, %struct.Cls*** %rhead.tmp.0236.out, i32* %collect.i.i.i.2.out, i32* %lcollect.i.i.i.3.ph.ph.ph.out) nounwind {
+newFuncRoot:
+ br label %codeRepl
+
+bb133.i.i.i.exitStub: ; preds = %codeRepl
+ ret void
+
+bb130.i.i.i: ; preds = %codeRepl
+ %rhead.tmp.0236.lcssa82 = phi %struct.Cls** [ null, %codeRepl ] ; <%struct.Cls**> [#uses=0]
+ br label %codeRepl
+
+codeRepl: ; preds = %bb130.i.i.i, %newFuncRoot
+ br i1 false, label %bb130.i.i.i, label %bb133.i.i.i.exitStub
+}
diff --git a/test/Transforms/LoopRotate/LRCrash-1.ll b/test/Transforms/LoopRotate/LRCrash-1.ll
new file mode 100644
index 0000000..f16dd04
--- /dev/null
+++ b/test/Transforms/LoopRotate/LRCrash-1.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+
+ %struct.relation = type { [4 x i16], i32, [4 x i16], i32, i32 }
+
+define void @findAllPairs() {
+entry:
+ br i1 false, label %bb139, label %bb10.i44
+bb10.i44: ; preds = %entry
+ ret void
+bb127: ; preds = %bb139
+ br label %bb139
+bb139: ; preds = %bb127, %entry
+ br i1 false, label %bb127, label %bb142
+bb142: ; preds = %bb139
+ %r91.0.lcssa = phi %struct.relation* [ null, %bb139 ] ; <%struct.relation*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/LoopRotate/LRCrash-2.ll b/test/Transforms/LoopRotate/LRCrash-2.ll
new file mode 100644
index 0000000..0a10989
--- /dev/null
+++ b/test/Transforms/LoopRotate/LRCrash-2.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+
+define void @findAllPairs() {
+entry:
+ br i1 false, label %bb139, label %cond_true
+cond_true: ; preds = %entry
+ ret void
+bb90: ; preds = %bb139
+ br i1 false, label %bb136, label %cond_next121
+cond_next121: ; preds = %bb90
+ br i1 false, label %bb136, label %bb127
+bb127: ; preds = %cond_next121
+ br label %bb136
+bb136: ; preds = %bb127, %cond_next121, %bb90
+ %changes.1 = phi i32 [ %changes.2, %bb90 ], [ %changes.2, %cond_next121 ], [ 1, %bb127 ] ; <i32> [#uses=1]
+ br label %bb139
+bb139: ; preds = %bb136, %entry
+ %changes.2 = phi i32 [ %changes.1, %bb136 ], [ 0, %entry ] ; <i32> [#uses=3]
+ br i1 false, label %bb90, label %bb142
+bb142: ; preds = %bb139
+ %changes.2.lcssa = phi i32 [ %changes.2, %bb139 ] ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/LoopRotate/LRCrash-3.ll b/test/Transforms/LoopRotate/LRCrash-3.ll
new file mode 100644
index 0000000..79f21fb
--- /dev/null
+++ b/test/Transforms/LoopRotate/LRCrash-3.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+
+define void @_ZN9Classfile4readEv() {
+entry:
+ br i1 false, label %cond_false485, label %bb405
+bb405: ; preds = %entry
+ ret void
+cond_false485: ; preds = %entry
+ br label %bb830
+bb511: ; preds = %bb830
+ br i1 false, label %bb816, label %bb830
+cond_next667: ; preds = %bb816
+ br i1 false, label %cond_next695, label %bb680
+bb676: ; preds = %bb680
+ br label %bb680
+bb680: ; preds = %bb676, %cond_next667
+ %iftmp.68.0 = zext i1 false to i8 ; <i8> [#uses=1]
+ br i1 false, label %bb676, label %cond_next695
+cond_next695: ; preds = %bb680, %cond_next667
+ %iftmp.68.2 = phi i8 [ %iftmp.68.0, %bb680 ], [ undef, %cond_next667 ] ; <i8> [#uses=0]
+ ret void
+bb816: ; preds = %bb816, %bb511
+ br i1 false, label %cond_next667, label %bb816
+bb830: ; preds = %bb511, %cond_false485
+ br i1 false, label %bb511, label %bb835
+bb835: ; preds = %bb830
+ ret void
+}
+
diff --git a/test/Transforms/LoopRotate/LRCrash-4.ll b/test/Transforms/LoopRotate/LRCrash-4.ll
new file mode 100644
index 0000000..7d35c16
--- /dev/null
+++ b/test/Transforms/LoopRotate/LRCrash-4.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+
+define void @InterpretSEIMessage(i8* %msg) {
+entry:
+ br label %bb15
+bb6: ; preds = %bb15
+ %gep.upgrd.1 = zext i32 %offset.1 to i64 ; <i64> [#uses=1]
+ %tmp11 = getelementptr i8* %msg, i64 %gep.upgrd.1 ; <i8*> [#uses=0]
+ br label %bb15
+bb15: ; preds = %bb6, %entry
+ %offset.1 = add i32 0, 1 ; <i32> [#uses=2]
+ br i1 false, label %bb6, label %bb17
+bb17: ; preds = %bb15
+ %offset.1.lcssa = phi i32 [ %offset.1, %bb15 ] ; <i32> [#uses=0]
+ %payload_type.1.lcssa = phi i32 [ 0, %bb15 ] ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/LoopRotate/LRCrash-5.ll b/test/Transforms/LoopRotate/LRCrash-5.ll
new file mode 100644
index 0000000..6643cc1
--- /dev/null
+++ b/test/Transforms/LoopRotate/LRCrash-5.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9"
+ %struct.NSArray = type { %struct.NSObject }
+ %struct.NSObject = type { %struct.objc_class* }
+ %struct.NSRange = type { i64, i64 }
+ %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* }
+ %struct.objc_class = type opaque
+ %struct.objc_selector = type opaque
+@"\01L_OBJC_MESSAGE_REF_26" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1]
+
+define %struct.NSArray* @"-[NSString(DocSetPrivateAddition) _dsa_stringAsPathComponent]"(%struct.NSArray* %self, %struct._message_ref_t* %_cmd) {
+entry:
+ br label %bb116
+
+bb116: ; preds = %bb131, %entry
+ %tmp123 = call %struct.NSRange null( %struct.NSObject* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_26", %struct.NSArray* null ) ; <%struct.NSRange> [#uses=1]
+ br i1 false, label %bb141, label %bb131
+
+bb131: ; preds = %bb116
+ %mrv_gr125 = getresult %struct.NSRange %tmp123, 1 ; <i64> [#uses=0]
+ br label %bb116
+
+bb141: ; preds = %bb116
+ ret %struct.NSArray* null
+}
diff --git a/test/Transforms/LoopRotate/PhiRename-1.ll b/test/Transforms/LoopRotate/PhiRename-1.ll
new file mode 100644
index 0000000..74426a8
--- /dev/null
+++ b/test/Transforms/LoopRotate/PhiRename-1.ll
@@ -0,0 +1,95 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -S | not grep {\\\[ .tmp224}
+; END.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+
+ %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.Index_Map = type { i32, %struct.item_set** }
+ %struct.Item = type { [4 x i16], %struct.rule* }
+ %struct.__sFILEX = type opaque
+ %struct.__sbuf = type { i8*, i32 }
+ %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* }
+ %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* }
+ %struct.list = type { i8*, %struct.list* }
+ %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** }
+ %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* }
+ %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* }
+ %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] }
+ %struct.plank = type { i8*, %struct.list*, i32 }
+ %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* }
+ %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 }
+ %struct.stateMap = type { i8*, %struct.plank*, i32, i16* }
+ %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** }
+@outfile = external global %struct.FILE* ; <%struct.FILE**> [#uses=1]
+@str1 = external constant [11 x i8] ; <[11 x i8]*> [#uses=1]
+@operators = weak global %struct.list* null ; <%struct.list**> [#uses=1]
+
+
+
+define i32 @opsOfArity(i32 %arity) {
+entry:
+ %arity_addr = alloca i32 ; <i32*> [#uses=2]
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
+ %c = alloca i32, align 4 ; <i32*> [#uses=4]
+ %l = alloca %struct.list*, align 4 ; <%struct.list**> [#uses=5]
+ %op = alloca %struct.operator*, align 4 ; <%struct.operator**> [#uses=3]
+ "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 %arity, i32* %arity_addr
+ store i32 0, i32* %c
+ %tmp1 = load %struct.list** @operators ; <%struct.list*> [#uses=1]
+ store %struct.list* %tmp1, %struct.list** %l
+ br label %bb21
+
+bb: ; preds = %bb21
+ %tmp3 = getelementptr %struct.list* %tmp22, i32 0, i32 0 ; <i8**> [#uses=1]
+ %tmp4 = load i8** %tmp3 ; <i8*> [#uses=1]
+ %tmp45 = bitcast i8* %tmp4 to %struct.operator* ; <%struct.operator*> [#uses=1]
+ store %struct.operator* %tmp45, %struct.operator** %op
+ %tmp6 = load %struct.operator** %op ; <%struct.operator*> [#uses=1]
+ %tmp7 = getelementptr %struct.operator* %tmp6, i32 0, i32 5 ; <i32*> [#uses=1]
+ %tmp8 = load i32* %tmp7 ; <i32> [#uses=1]
+ %tmp9 = load i32* %arity_addr ; <i32> [#uses=1]
+ icmp eq i32 %tmp8, %tmp9 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i8 ; <i8>:1 [#uses=1]
+ icmp ne i8 %1, 0 ; <i1>:2 [#uses=1]
+ br i1 %2, label %cond_true, label %cond_next
+
+cond_true: ; preds = %bb
+ %tmp10 = load %struct.operator** %op ; <%struct.operator*> [#uses=1]
+ %tmp11 = getelementptr %struct.operator* %tmp10, i32 0, i32 2 ; <i32*> [#uses=1]
+ %tmp12 = load i32* %tmp11 ; <i32> [#uses=1]
+ %tmp13 = load %struct.FILE** @outfile ; <%struct.FILE*> [#uses=1]
+ %tmp14 = getelementptr [11 x i8]* @str1, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp15 = call i32 (%struct.FILE*, i8*, ...)* @fprintf( %struct.FILE* %tmp13, i8* %tmp14, i32 %tmp12 ) ; <i32> [#uses=0]
+ %tmp16 = load i32* %c ; <i32> [#uses=1]
+ %tmp17 = add i32 %tmp16, 1 ; <i32> [#uses=1]
+ store i32 %tmp17, i32* %c
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %bb
+ %tmp19 = getelementptr %struct.list* %tmp22, i32 0, i32 1 ; <%struct.list**> [#uses=1]
+ %tmp20 = load %struct.list** %tmp19 ; <%struct.list*> [#uses=1]
+ store %struct.list* %tmp20, %struct.list** %l
+ br label %bb21
+
+bb21: ; preds = %cond_next, %entry
+ %l.in = phi %struct.list** [ @operators, %entry ], [ %tmp19, %cond_next ]
+ %tmp22 = load %struct.list** %l.in ; <%struct.list*> [#uses=1]
+ icmp ne %struct.list* %tmp22, null ; <i1>:3 [#uses=1]
+ zext i1 %3 to i8 ; <i8>:4 [#uses=1]
+ icmp ne i8 %4, 0 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb, label %bb23
+
+bb23: ; preds = %bb21
+ %tmp24 = load i32* %c ; <i32> [#uses=1]
+ store i32 %tmp24, i32* %tmp
+ %tmp25 = load i32* %tmp ; <i32> [#uses=1]
+ store i32 %tmp25, i32* %retval
+ br label %return
+
+return: ; preds = %bb23
+ %retval26 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval26
+}
+
+declare i32 @fprintf(%struct.FILE*, i8*, ...)
diff --git a/test/Transforms/LoopRotate/PhiSelfRefernce-1.ll b/test/Transforms/LoopRotate/PhiSelfRefernce-1.ll
new file mode 100644
index 0000000..a1aa21b
--- /dev/null
+++ b/test/Transforms/LoopRotate/PhiSelfRefernce-1.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+; ModuleID = 'PhiSelfRefernce-1.bc'
+
+define void @snrm2(i32 %incx) {
+entry:
+ br i1 false, label %START, label %return
+
+START: ; preds = %entry
+ br i1 false, label %bb85, label %cond_false93
+
+bb52: ; preds = %bb85
+ br i1 false, label %bb307, label %cond_next71
+
+cond_next71: ; preds = %bb52
+ ret void
+
+bb85: ; preds = %START
+ br i1 false, label %bb52, label %bb88
+
+bb88: ; preds = %bb85
+ ret void
+
+cond_false93: ; preds = %START
+ ret void
+
+bb243: ; preds = %bb307
+ br label %bb307
+
+bb307: ; preds = %bb243, %bb52
+ %sx_addr.2.pn = phi float* [ %sx_addr.5, %bb243 ], [ null, %bb52 ] ; <float*> [#uses=1]
+ %sx_addr.5 = getelementptr float* %sx_addr.2.pn, i32 %incx ; <float*> [#uses=1]
+ br i1 false, label %bb243, label %bb310
+
+bb310: ; preds = %bb307
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/LoopRotate/dg.exp b/test/Transforms/LoopRotate/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LoopRotate/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LoopRotate/indirectbr.ll b/test/Transforms/LoopRotate/indirectbr.ll
new file mode 100644
index 0000000..9c82aa8
--- /dev/null
+++ b/test/Transforms/LoopRotate/indirectbr.ll
@@ -0,0 +1,43 @@
+; RUN: opt < %s -S -loop-rotate -disable-output -verify-loop-info -verify-dom-info
+; PR5502
+
+define void @z80_do_opcodes() nounwind {
+entry:
+ br label %while.cond
+
+while.cond: ; preds = %end_opcode, %entry
+ br label %while.body
+
+while.body: ; preds = %while.cond
+ br label %indirectgoto
+
+run_opcode: ; preds = %indirectgoto
+ %tmp276 = load i8* undef ; <i8> [#uses=1]
+ br label %indirectgoto
+
+if.else295: ; preds = %divide_late
+ br label %end_opcode
+
+end_opcode: ; preds = %indirectgoto, %sw.default42406, %sw.default, %if.else295
+ %opcode.2 = phi i8 [ %opcode.0, %indirectgoto ], [ 0, %sw.default42406 ], [ undef, %sw.default ], [ %opcode.0, %if.else295 ] ; <i8> [#uses=0]
+ switch i32 undef, label %while.cond [
+ i32 221, label %sw.bb11691
+ i32 253, label %sw.bb30351
+ ]
+
+sw.bb11691: ; preds = %end_opcode
+ br label %sw.default
+
+sw.default: ; preds = %sw.bb11691
+ br label %end_opcode
+
+sw.bb30351: ; preds = %end_opcode
+ br label %sw.default42406
+
+sw.default42406: ; preds = %sw.bb30351
+ br label %end_opcode
+
+indirectgoto: ; preds = %run_opcode, %while.body
+ %opcode.0 = phi i8 [ undef, %while.body ], [ %tmp276, %run_opcode ] ; <i8> [#uses=2]
+ indirectbr i8* undef, [label %run_opcode, label %if.else295, label %end_opcode]
+}
diff --git a/test/Transforms/LoopRotate/phi-duplicate.ll b/test/Transforms/LoopRotate/phi-duplicate.ll
new file mode 100644
index 0000000..cac00f8
--- /dev/null
+++ b/test/Transforms/LoopRotate/phi-duplicate.ll
@@ -0,0 +1,35 @@
+; RUN: opt -S %s -loop-rotate | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0"
+
+; PR5837
+define void @test(i32 %N, double* %G) nounwind ssp {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ %j.0 = phi i64 [ 1, %entry ], [ %inc, %for.body ] ; <i64> [#uses=5]
+ %cmp = icmp slt i64 %j.0, 1000 ; <i1> [#uses=1]
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %arrayidx = getelementptr inbounds double* %G, i64 %j.0 ; <double*> [#uses=1]
+ %tmp3 = load double* %arrayidx ; <double> [#uses=1]
+ %sub = sub i64 %j.0, 1 ; <i64> [#uses=1]
+ %arrayidx6 = getelementptr inbounds double* %G, i64 %sub ; <double*> [#uses=1]
+ %tmp7 = load double* %arrayidx6 ; <double> [#uses=1]
+ %add = fadd double %tmp3, %tmp7 ; <double> [#uses=1]
+ %arrayidx10 = getelementptr inbounds double* %G, i64 %j.0 ; <double*> [#uses=1]
+ store double %add, double* %arrayidx10
+ %inc = add nsw i64 %j.0, 1 ; <i64> [#uses=1]
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ ret void
+}
+; Should only end up with one phi.
+; CHECK: for.body:
+; CHECK-NEXT: %j.02 = phi i64
+; CHECK-NOT phi
+; CHECK: ret void
+
diff --git a/test/Transforms/LoopRotate/pr2639.ll b/test/Transforms/LoopRotate/pr2639.ll
new file mode 100644
index 0000000..da9a3a2
--- /dev/null
+++ b/test/Transforms/LoopRotate/pr2639.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -loop-deletion -loop-rotate -verify-dom-info -verify-loop-info -disable-output
+; PR 2639
+
+ %struct.HexxagonMove = type { i8, i8, i32 }
+
+define void @_ZN16HexxagonMoveList7addMoveER12HexxagonMove() {
+entry:
+ br i1 false, label %bb9.preheader, label %bb11
+
+bb9.preheader: ; preds = %entry
+ br label %bb9
+
+bb1: ; preds = %bb9
+ br i1 false, label %bb3, label %bb8
+
+bb3: ; preds = %bb1
+ br label %bb5
+
+bb4: ; preds = %bb5
+ br label %bb5
+
+bb5: ; preds = %bb4, %bb3
+ %exitcond = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb7, label %bb4
+
+bb7: ; preds = %bb5
+ store %struct.HexxagonMove* null, %struct.HexxagonMove** null, align 4
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb1
+ br label %bb9
+
+bb9: ; preds = %bb8, %bb9.preheader
+ br i1 false, label %bb11, label %bb1
+
+bb11: ; preds = %bb9, %entry
+ ret void
+}
diff --git a/test/Transforms/LoopRotate/preserve-scev.ll b/test/Transforms/LoopRotate/preserve-scev.ll
new file mode 100644
index 0000000..7bd2232
--- /dev/null
+++ b/test/Transforms/LoopRotate/preserve-scev.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -loop-rotate -loop-reduce -verify-dom-info -verify-loop-info -disable-output
+
+define fastcc void @foo() nounwind {
+BB:
+ br label %BB1
+
+BB1: ; preds = %BB19, %BB
+ br label %BB4
+
+BB2: ; preds = %BB4
+ %tmp = bitcast i32 undef to i32 ; <i32> [#uses=1]
+ br label %BB4
+
+BB4: ; preds = %BB3, %BB1
+ %tmp5 = phi i32 [ undef, %BB1 ], [ %tmp, %BB2 ] ; <i32> [#uses=1]
+ br i1 false, label %BB8, label %BB2
+
+BB8: ; preds = %BB6
+ %tmp7 = bitcast i32 %tmp5 to i32 ; <i32> [#uses=2]
+ br i1 false, label %BB9, label %BB13
+
+BB9: ; preds = %BB12, %BB8
+ %tmp10 = phi i32 [ %tmp11, %BB12 ], [ %tmp7, %BB8 ] ; <i32> [#uses=2]
+ %tmp11 = add i32 %tmp10, 1 ; <i32> [#uses=1]
+ br label %BB12
+
+BB12: ; preds = %BB9
+ br i1 false, label %BB9, label %BB17
+
+BB13: ; preds = %BB15, %BB8
+ %tmp14 = phi i32 [ %tmp16, %BB15 ], [ %tmp7, %BB8 ] ; <i32> [#uses=1]
+ br label %BB15
+
+BB15: ; preds = %BB13
+ %tmp16 = add i32 %tmp14, -1 ; <i32> [#uses=1]
+ br i1 false, label %BB13, label %BB18
+
+BB17: ; preds = %BB12
+ br label %BB19
+
+BB18: ; preds = %BB15
+ br label %BB19
+
+BB19: ; preds = %BB18, %BB17
+ %tmp20 = phi i32 [ %tmp10, %BB17 ], [ undef, %BB18 ] ; <i32> [#uses=0]
+ br label %BB1
+}
diff --git a/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll b/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll
new file mode 100644
index 0000000..bf862f6
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll
@@ -0,0 +1,20 @@
+; This testcase exposed a problem with the loop identification pass (LoopInfo).
+; Basically, it was incorrectly calculating the loop nesting information.
+;
+; RUN: opt < %s -loopsimplify
+
+define i32 @yylex() {
+ br label %loopentry.0
+loopentry.0: ; preds = %else.4, %0
+ br label %loopexit.2
+loopexit.2: ; preds = %else.4, %loopexit.2, %loopentry.0
+ br i1 false, label %loopexit.2, label %else.4
+yy_find_action: ; preds = %else.4
+ br label %else.4
+else.4: ; preds = %yy_find_action, %loopexit.2
+ switch i32 0, label %loopexit.2 [
+ i32 2, label %yy_find_action
+ i32 0, label %loopentry.0
+ ]
+}
+
diff --git a/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll b/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll
new file mode 100644
index 0000000..cd9749b
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll
@@ -0,0 +1,42 @@
+; This (complex) testcase causes an assertion failure because a preheader is
+; inserted for the "fail" loop, but the exit block of a loop is not updated
+; to be the preheader instead of the exit loop itself.
+
+; RUN: opt < %s -loopsimplify
+define i32 @re_match_2() {
+ br label %loopentry.1
+loopentry.1: ; preds = %endif.82, %0
+ br label %shortcirc_done.36
+shortcirc_done.36: ; preds = %loopentry.1
+ br i1 false, label %fail, label %endif.40
+endif.40: ; preds = %shortcirc_done.36
+ br label %loopexit.20
+loopentry.20: ; preds = %endif.46
+ br label %loopexit.20
+loopexit.20: ; preds = %loopentry.20, %endif.40
+ br label %loopentry.21
+loopentry.21: ; preds = %no_exit.19, %loopexit.20
+ br i1 false, label %no_exit.19, label %loopexit.21
+no_exit.19: ; preds = %loopentry.21
+ br i1 false, label %fail, label %loopentry.21
+loopexit.21: ; preds = %loopentry.21
+ br label %endif.45
+endif.45: ; preds = %loopexit.21
+ br label %cond_true.15
+cond_true.15: ; preds = %endif.45
+ br i1 false, label %fail, label %endif.46
+endif.46: ; preds = %cond_true.15
+ br label %loopentry.20
+fail: ; preds = %loopexit.37, %cond_true.15, %no_exit.19, %shortcirc_done.36
+ br label %then.80
+then.80: ; preds = %fail
+ br label %endif.81
+endif.81: ; preds = %then.80
+ br label %loopexit.37
+loopexit.37: ; preds = %endif.81
+ br i1 false, label %fail, label %endif.82
+endif.82: ; preds = %loopexit.37
+ br label %loopentry.1
+}
+
+
diff --git a/test/Transforms/LoopSimplify/2003-08-15-PreheadersFail.ll b/test/Transforms/LoopSimplify/2003-08-15-PreheadersFail.ll
new file mode 100644
index 0000000..11be694
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2003-08-15-PreheadersFail.ll
@@ -0,0 +1,52 @@
+; RUN: opt < %s -tailduplicate -instcombine -simplifycfg -licm -disable-output
+target datalayout = "e-p:32:32"
+@yy_base = external global [787 x i16] ; <[787 x i16]*> [#uses=1]
+@yy_state_ptr = external global i32* ; <i32**> [#uses=3]
+@yy_state_buf = external global [16386 x i32] ; <[16386 x i32]*> [#uses=1]
+@yy_lp = external global i32 ; <i32*> [#uses=1]
+
+define i32 @_yylex() {
+ br label %loopentry.0
+loopentry.0: ; preds = %else.26, %0
+ store i32* getelementptr ([16386 x i32]* @yy_state_buf, i64 0, i64 0), i32** @yy_state_ptr
+ %tmp.35 = load i32** @yy_state_ptr ; <i32*> [#uses=2]
+ %inc.0 = getelementptr i32* %tmp.35, i64 1 ; <i32*> [#uses=1]
+ store i32* %inc.0, i32** @yy_state_ptr
+ %tmp.36 = load i32* null ; <i32> [#uses=1]
+ store i32 %tmp.36, i32* %tmp.35
+ br label %loopexit.2
+loopexit.2: ; preds = %else.26, %loopexit.2, %loopentry.0
+ store i8* null, i8** null
+ %tmp.91 = load i32* null ; <i32> [#uses=1]
+ %tmp.92 = sext i32 %tmp.91 to i64 ; <i64> [#uses=1]
+ %tmp.93 = getelementptr [787 x i16]* @yy_base, i64 0, i64 %tmp.92 ; <i16*> [#uses=1]
+ %tmp.94 = load i16* %tmp.93 ; <i16> [#uses=1]
+ %tmp.95 = icmp ne i16 %tmp.94, 4394 ; <i1> [#uses=1]
+ br i1 %tmp.95, label %loopexit.2, label %yy_find_action
+yy_find_action: ; preds = %else.26, %loopexit.2
+ br label %loopentry.3
+loopentry.3: ; preds = %then.9, %shortcirc_done.0, %yy_find_action
+ %tmp.105 = load i32* @yy_lp ; <i32> [#uses=1]
+ %tmp.106 = icmp ne i32 %tmp.105, 0 ; <i1> [#uses=1]
+ br i1 %tmp.106, label %shortcirc_next.0, label %shortcirc_done.0
+shortcirc_next.0: ; preds = %loopentry.3
+ %tmp.114 = load i16* null ; <i16> [#uses=1]
+ %tmp.115 = sext i16 %tmp.114 to i32 ; <i32> [#uses=1]
+ %tmp.116 = icmp slt i32 0, %tmp.115 ; <i1> [#uses=1]
+ br label %shortcirc_done.0
+shortcirc_done.0: ; preds = %shortcirc_next.0, %loopentry.3
+ %shortcirc_val.0 = phi i1 [ false, %loopentry.3 ], [ %tmp.116, %shortcirc_next.0 ] ; <i1> [#uses=1]
+ br i1 %shortcirc_val.0, label %else.0, label %loopentry.3
+else.0: ; preds = %shortcirc_done.0
+ %tmp.144 = load i32* null ; <i32> [#uses=1]
+ %tmp.145 = and i32 %tmp.144, 8192 ; <i32> [#uses=1]
+ %tmp.146 = icmp ne i32 %tmp.145, 0 ; <i1> [#uses=1]
+ br i1 %tmp.146, label %then.9, label %else.26
+then.9: ; preds = %else.0
+ br label %loopentry.3
+else.26: ; preds = %else.0
+ switch i32 0, label %loopentry.0 [
+ i32 2, label %yy_find_action
+ i32 0, label %loopexit.2
+ ]
+}
diff --git a/test/Transforms/LoopSimplify/2003-12-10-ExitBlocksProblem.ll b/test/Transforms/LoopSimplify/2003-12-10-ExitBlocksProblem.ll
new file mode 100644
index 0000000..fb39f05
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2003-12-10-ExitBlocksProblem.ll
@@ -0,0 +1,36 @@
+; LoopSimplify is breaking LICM on this testcase because the exit blocks from
+; the loop are reachable from more than just the exit nodes: the exit blocks
+; have predecessors from outside of the loop!
+;
+; This is distilled from a monsterous crafty example.
+
+; RUN: opt < %s -licm -disable-output
+
+
+@G = weak global i32 0 ; <i32*> [#uses=7]
+
+define i32 @main() {
+entry:
+ store i32 123, i32* @G
+ br label %loopentry.i
+loopentry.i: ; preds = %endif.1.i, %entry
+ %tmp.0.i = load i32* @G ; <i32> [#uses=1]
+ %tmp.1.i = icmp eq i32 %tmp.0.i, 123 ; <i1> [#uses=1]
+ br i1 %tmp.1.i, label %Out.i, label %endif.0.i
+endif.0.i: ; preds = %loopentry.i
+ %tmp.3.i = load i32* @G ; <i32> [#uses=1]
+ %tmp.4.i = icmp eq i32 %tmp.3.i, 126 ; <i1> [#uses=1]
+ br i1 %tmp.4.i, label %ExitBlock.i, label %endif.1.i
+endif.1.i: ; preds = %endif.0.i
+ %tmp.6.i = load i32* @G ; <i32> [#uses=1]
+ %inc.i = add i32 %tmp.6.i, 1 ; <i32> [#uses=1]
+ store i32 %inc.i, i32* @G
+ br label %loopentry.i
+Out.i: ; preds = %loopentry.i
+ store i32 0, i32* @G
+ br label %ExitBlock.i
+ExitBlock.i: ; preds = %Out.i, %endif.0.i
+ %tmp.7.i = load i32* @G ; <i32> [#uses=1]
+ ret i32 %tmp.7.i
+}
+
diff --git a/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll b/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll
new file mode 100644
index 0000000..a5d0ba7
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -loopsimplify -verify -licm -disable-output
+
+define void @.subst_48() {
+entry:
+ br label %loopentry.0
+loopentry.0: ; preds = %loopentry.0, %entry
+ br i1 false, label %loopentry.0, label %loopentry.2
+loopentry.2: ; preds = %loopentry.2, %loopentry.0
+ %tmp.968 = icmp sle i32 0, 3 ; <i1> [#uses=1]
+ br i1 %tmp.968, label %loopentry.2, label %UnifiedReturnBlock
+UnifiedReturnBlock: ; preds = %loopentry.2
+ ret void
+}
+
diff --git a/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll b/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll
new file mode 100644
index 0000000..dc5c313
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -loopsimplify -licm -disable-output
+define void @main() {
+entry:
+ br i1 false, label %Out, label %loop
+loop: ; preds = %loop, %entry
+ %LI = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %LI, label %loop, label %Out
+Out: ; preds = %loop, %entry
+ ret void
+}
+
diff --git a/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll b/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll
new file mode 100644
index 0000000..721f9b3
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -loopsimplify -licm -disable-output
+
+; This is PR306
+
+define void @NormalizeCoeffsVecFFE() {
+entry:
+ br label %loopentry.0
+loopentry.0: ; preds = %no_exit.0, %entry
+ br i1 false, label %loopentry.1, label %no_exit.0
+no_exit.0: ; preds = %loopentry.0
+ br i1 false, label %loopentry.0, label %loopentry.1
+loopentry.1: ; preds = %no_exit.1, %no_exit.0, %loopentry.0
+ br i1 false, label %no_exit.1, label %loopexit.1
+no_exit.1: ; preds = %loopentry.1
+ %tmp.43 = icmp eq i16 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.43, label %loopentry.1, label %loopexit.1
+loopexit.1: ; preds = %no_exit.1, %loopentry.1
+ ret void
+}
+
diff --git a/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll b/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll
new file mode 100644
index 0000000..cbdfe8b
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -loopsimplify -disable-output
+
+define void @test() {
+loopentry.0:
+ br label %loopentry.1
+loopentry.1: ; preds = %then.6, %then.6, %loopentry.1, %loopentry.0
+ %pixel.4 = phi i32 [ 0, %loopentry.0 ], [ %pixel.4, %loopentry.1 ], [ %tmp.370, %then.6 ], [ %tmp.370, %then.6 ] ; <i32> [#uses=1]
+ br i1 false, label %then.6, label %loopentry.1
+then.6: ; preds = %loopentry.1
+ %tmp.370 = add i32 0, 0 ; <i32> [#uses=2]
+ switch i32 0, label %label.7 [
+ i32 6408, label %loopentry.1
+ i32 32841, label %loopentry.1
+ ]
+label.7: ; preds = %then.6
+ ret void
+}
+
diff --git a/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll b/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll
new file mode 100644
index 0000000..4fe6e21
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -scalarrepl -loopsimplify -licm -disable-output -verify-dom-info -verify-loop-info
+
+define void @inflate() {
+entry:
+ br label %loopentry.0.outer1111
+loopentry.0.outer1111: ; preds = %then.41, %label.11, %loopentry.0.outer1111, %entry
+ %left.0.ph1107 = phi i32 [ %tmp.1172, %then.41 ], [ 0, %entry ], [ %tmp.1172, %label.11 ], [ %left.0.ph1107, %loopentry.0.outer1111 ] ; <i32> [#uses=2]
+ %tmp.1172 = sub i32 %left.0.ph1107, 0 ; <i32> [#uses=2]
+ switch i32 0, label %label.11 [
+ i32 23, label %loopentry.0.outer1111
+ i32 13, label %then.41
+ ]
+label.11: ; preds = %loopentry.0.outer1111
+ br label %loopentry.0.outer1111
+then.41: ; preds = %loopentry.0.outer1111
+ br label %loopentry.0.outer1111
+}
+
diff --git a/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll b/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll
new file mode 100644
index 0000000..10202dc
--- /dev/null
+++ b/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll
@@ -0,0 +1,892 @@
+; RUN: opt < %s -loopsimplify -disable-output
+; PR1752
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32"
+target triple = "i686-pc-mingw32"
+ %struct.BigInt = type { %"struct.std::vector<ulong,std::allocator<ulong> >" }
+ %struct.Fibonacci = type { %"struct.std::vector<BigInt,std::allocator<BigInt> >" }
+ %struct.__false_type = type <{ i8 }>
+ %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >" = type { %struct.BigInt* }
+ %"struct.std::_Vector_base<BigInt,std::allocator<BigInt> >" = type { %"struct.std::_Vector_base<BigInt,std::allocator<BigInt> >::_Vector_impl" }
+ %"struct.std::_Vector_base<BigInt,std::allocator<BigInt> >::_Vector_impl" = type { %struct.BigInt*, %struct.BigInt*, %struct.BigInt* }
+ %"struct.std::_Vector_base<ulong,std::allocator<ulong> >" = type { %"struct.std::_Vector_base<ulong,std::allocator<ulong> >::_Vector_impl" }
+ %"struct.std::_Vector_base<ulong,std::allocator<ulong> >::_Vector_impl" = type { i32*, i32*, i32* }
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* }
+ %"struct.std::basic_stringbuf<char,std::char_traits<char>,std::allocator<char> >" = type { %"struct.std::basic_streambuf<char,std::char_traits<char> >", i32, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" }
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+ %"struct.std::ostringstream" = type { [4 x i8], %"struct.std::basic_stringbuf<char,std::char_traits<char>,std::allocator<char> >", %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::vector<BigInt,std::allocator<BigInt> >" = type { %"struct.std::_Vector_base<BigInt,std::allocator<BigInt> >" }
+ %"struct.std::vector<ulong,std::allocator<ulong> >" = type { %"struct.std::_Vector_base<ulong,std::allocator<ulong> >" }
[email protected] = external constant [6 x i8] ; <[6 x i8]*> [#uses=1]
[email protected] = external constant [5 x i8] ; <[5 x i8]*> [#uses=1]
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=1]
+@_ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+
+declare void @_ZN9Fibonacci10get_numberEj(%struct.BigInt* sret , %struct.Fibonacci*, i32)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*)
+
+declare void @_ZNSsD1Ev(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEm(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i32)
+
+declare void @_ZNKSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* sret , %"struct.std::ostringstream"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKSbIS4_S5_T1_E(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*)
+
+declare void @_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev(%"struct.std::ostringstream"*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @___ZlsRSoRK6BigInt___ZN9__gnu_cxx13new_allocatorI6BigIntE10deallocateEPS1_j(i32, %"struct.std::basic_ostream<char,std::char_traits<char> >"*, %struct.BigInt*, %struct.__false_type*, i32)
+
+declare void @___ZNSt12_Vector_baseI6BigIntSaIS0_EE13_M_deallocateEPS0_j___ZNSt12_Vector_baseI6BigIntSaIS0_EED2Ev___ZNSt6vectorI6BigIntSaIS0_EEC1ERKS1_(%"struct.std::_Vector_base<BigInt,std::allocator<BigInt> >"*, i32, %struct.BigInt*, i32, %"struct.std::vector<BigInt,std::allocator<BigInt> >"*, %struct.__false_type*)
+
+declare i32 @___ZN9__gnu_cxxmiIPK6BigIntS3_St6vectorIS1_SaIS1_EEEENS_17__normal_iteratorIT_T1_E15difference_typeERKSA_RKNS7_IT0_S9_EE___ZNKSt6vectorI6BigIntSaIS0_EE4sizeEv___ZNK9Fibonacci16show_all_numbersEv___ZNKSt6vectorI6BigIntSaIS0_EE8capacityEv(%"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"*, %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"*, %"struct.std::vector<BigInt,std::allocator<BigInt> >"*, i32, %struct.Fibonacci*)
+
+declare %struct.BigInt* @___ZNSt6vectorI6BigIntSaIS0_EEixEj___ZNSt6vectorI6BigIntSaIS0_EE3endEv(%"struct.std::vector<BigInt,std::allocator<BigInt> >"*, i32, i32)
+
+declare %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"* @___ZN9__gnu_cxx17__normal_iteratorIP6BigIntSt6vectorIS1_SaIS1_EEEppEv___ZNSt6vectorImSaImEED1Ev___ZN6BigIntD1Ev___ZN9__gnu_cxx13new_allocatorI6BigIntE7destroyEPS1____ZSt8_DestroyIP6BigIntSaIS0_EEvT_S3_T0_(i32, %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"*, %"struct.std::vector<ulong,std::allocator<ulong> >"*, %struct.BigInt*, %struct.__false_type*, %struct.BigInt*, %struct.__false_type* noalias )
+
+declare void @___ZNSt6vectorI6BigIntSaIS0_EED1Ev___ZN9FibonacciD1Ev___ZNSt6vectorImSaImEEC1ERKS0_(i32, %"struct.std::vector<BigInt,std::allocator<BigInt> >"*, %struct.Fibonacci*, %"struct.std::vector<ulong,std::allocator<ulong> >"*, %struct.__false_type*)
+
+define void @___ZN9FibonacciC1Ej___ZN9Fibonacci11show_numberEm(%struct.Fibonacci* %this_this, i32 %functionID, i32 %n_i_n_i) {
+bb_init:
+ br label %bb_main
+
+bb_main: ; preds = %meshBB349, %meshBB348, %meshBB347, %meshBB346, %meshBB345.unwinddest, %meshBB345, %meshBB344, %meshBB343, %meshBB342, %meshBB341, %meshBB340.normaldest, %meshBB340, %meshBB339, %invcont17.normaldest.normaldest, %invcont17.normaldest, %meshBB338.unwinddest, %meshBB338, %meshBB337.unwinddest, %meshBB337, %meshBB336.unwinddest, %meshBB336, %meshBB335, %meshBB334, %meshBB333, %meshBB332, %meshBB331, %meshBB330.normaldest, %meshBB330, %meshBB329.normaldest, %meshBB329, %meshBB328, %meshBB327, %meshBB326, %meshBB325.unwinddest, %meshBB325, %meshBB324, %meshBB323.normaldest, %meshBB323, %meshBB322.unwinddest, %meshBB322, %meshBB321, %meshBB320.unwinddest, %meshBB320, %meshBB319.unwinddest, %meshBB319, %meshBB318.unwinddest, %meshBB318, %meshBB317, %meshBB37.fragment, %meshBB37.unwinddest, %meshBB37, %meshBB36.fragment, %meshBB36, %meshBB35.fragment, %meshBB35, %meshBB34.fragment, %meshBB34, %meshBB33.fragment, %meshBB33, %meshBB32.fragment, %meshBB32, %meshBB31.fragment, %meshBB31, %meshBB30.fragment, %meshBB30.normaldest, %meshBB30, %meshBB29.fragment, %meshBB29.unwinddest, %meshBB29, %meshBB28.fragment, %meshBB28.unwinddest, %meshBB28, %meshBB27.fragment, %meshBB27, %meshBB26.fragment, %meshBB26.normaldest, %meshBB26, %meshBB25.fragment, %meshBB25, %meshBB24.fragment, %meshBB24.unwinddest, %meshBB24, %meshBB23.fragment, %meshBB23.normaldest, %meshBB23, %entry1.fragment.normaldest.normaldest, %entry1.fragment.normaldest, %meshBB22.fragment, %meshBB22.unwinddest, %meshBB22, %meshBB.fragment, %meshBB.unwinddest, %meshBB, %Unwind20, %unwind78.Unwind_crit_edge, %unwind78.fragment.fragment, %unwind78.fragment, %unwind78.fragment316, %unwind78, %invcont70, %unwind66.Unwind_crit_edge, %unwind66.fragment.fragment, %unwind66.fragment, %unwind66.fragment315, %unwind66, %unwind53.nofilter_crit_edge, %unwind53.fragment.fragment, %unwind53.fragment, %unwind53.fragment314, %unwind53, %nofilter.Unwind_crit_edge.normaldest, %nofilter.Unwind_crit_edge, %nofilter, %unwind43.nofilter_crit_edge, %unwind43.fragment.fragment, %unwind43.fragment, %unwind43.fragment313, %unwind43, %invcont41.normaldest, %invcont41, %unwind37.nofilter_crit_edge, %unwind37, %invcont36, %invcont33.unwind_crit_edge.unwinddest, %invcont33.unwind_crit_edge, %invcont30.unwind_crit_edge.unwinddest, %invcont30.unwind_crit_edge, %invcont30.normaldest, %invcont30, %invcont28.unwind_crit_edge, %invcont28.normaldest, %invcont28, %invcont25.unwind_crit_edge.unwinddest, %invcont25.unwind_crit_edge, %invcont25, %invcont22.unwind_crit_edge, %invcont22, %invcont17.unwind_crit_edge, %invcont17, %cond_next.unwind_crit_edge, %cond_next, %invcont12.cond_next_crit_edge, %invcont12.unwind_crit_edge, %invcont12, %cond_true.unwind_crit_edge.unwinddest, %cond_true.unwind_crit_edge, %invcont.cond_next_crit_edge, %invcont16.fragment, %invcont16, %unwind11.fragment, %unwind11, %entry.unwind_crit_edge, %entry1.fragment, %entry1.fragment312, %entry1, %Unwind, %unwind20.Unwind_crit_edge, %unwind20.fragment.fragment, %unwind20.fragment, %unwind20.fragment311, %unwind20, %invcont15, %invcont14.unwind10_crit_edge, %invcont14, %unwind10.Unwind_crit_edge, %unwind10.fragment, %unwind10.fragment310, %unwind10, %invcont.unwind10_crit_edge, %invcont, %unwind.fragment, %unwind, %entry.fragment, %entry.fragment309, %entry, %NewDefault, %LeafBlock, %LeafBlock914, %NodeBlock, %comb_entry.fragment, %old_entry, %bb_init
+ switch i32 0, label %old_entry [
+ i32 2739, label %invcont28.fragment
+ i32 2688, label %meshBB28.fragment
+ i32 1318, label %meshBB32.fragment
+ i32 2964, label %unwind53.fragment.fragment
+ i32 824, label %unwind78.fragment.fragment
+ i32 1983, label %meshBB33.fragment
+ i32 2582, label %invcont30.fragment
+ i32 2235, label %meshBB36.fragment
+ i32 1275, label %meshBB343
+ i32 2719, label %invcont.fragment
+ i32 1500, label %entry1.fragment.fragment
+ i32 815, label %unwind11.fragment
+ i32 1051, label %entry
+ i32 2342, label %unwind
+ i32 1814, label %invcont
+ i32 315, label %invcont.unwind10_crit_edge
+ i32 2422, label %unwind10
+ i32 2663, label %unwind10.Unwind_crit_edge
+ i32 266, label %invcont14
+ i32 367, label %invcont14.unwind10_crit_edge
+ i32 2242, label %invcont15
+ i32 452, label %unwind20
+ i32 419, label %invcont.cond_next_crit_edge
+ i32 181, label %cond_true
+ i32 2089, label %unwind20.Unwind_crit_edge
+ i32 633, label %filter
+ i32 455, label %Unwind
+ i32 2016, label %entry1
+ i32 263, label %invcont33.unwind_crit_edge
+ i32 2498, label %invcont36
+ i32 2992, label %unwind37
+ i32 616, label %entry.unwind_crit_edge
+ i32 622, label %unwind11
+ i32 875, label %invcont16
+ i32 766, label %unwind53.nofilter_crit_edge
+ i32 668, label %filter62
+ i32 2138, label %unwind66
+ i32 713, label %unwind66.Unwind_crit_edge
+ i32 1422, label %invcont70
+ i32 1976, label %cond_true.unwind_crit_edge
+ i32 1263, label %invcont12
+ i32 2453, label %invcont12.unwind_crit_edge
+ i32 2876, label %invcont12.cond_next_crit_edge
+ i32 2271, label %cond_next
+ i32 2938, label %cond_next.unwind_crit_edge
+ i32 1082, label %invcont17
+ i32 531, label %invcont17.unwind_crit_edge
+ i32 111, label %invcont22
+ i32 1935, label %invcont22.unwind_crit_edge
+ i32 2004, label %invcont25
+ i32 1725, label %invcont25.unwind_crit_edge
+ i32 1701, label %invcont28
+ i32 957, label %invcont28.unwind_crit_edge
+ i32 165, label %invcont30
+ i32 899, label %invcont30.unwind_crit_edge
+ i32 1092, label %invcont33
+ i32 2869, label %unwind37.nofilter_crit_edge
+ i32 203, label %invcont41
+ i32 693, label %unwind43
+ i32 2895, label %unwind43.nofilter_crit_edge
+ i32 1174, label %invcont47
+ i32 1153, label %filter19
+ i32 2304, label %nofilter
+ i32 848, label %nofilter.Unwind_crit_edge
+ i32 1207, label %unwind53
+ i32 2848, label %filter75
+ i32 59, label %unwind78
+ i32 1213, label %unwind78.Unwind_crit_edge
+ i32 2199, label %filter87
+ i32 1268, label %Unwind20
+ i32 743, label %old_entry
+ i32 1276, label %meshBB319
+ i32 1619, label %meshBB320
+ i32 2047, label %meshBB331
+ i32 2828, label %meshBB23.fragment
+ i32 2530, label %meshBB332
+ i32 1389, label %meshBB318
+ i32 1450, label %meshBB317
+ i32 1416, label %meshBB31.fragment
+ i32 82, label %meshBB322
+ i32 853, label %unwind78.fragment316
+ i32 107, label %meshBB24.fragment
+ i32 1200, label %meshBB37.fragment
+ i32 605, label %unwind53.fragment314
+ i32 209, label %meshBB29.fragment
+ i32 1513, label %meshBB27.fragment
+ i32 1542, label %meshBB35.fragment
+ i32 1873, label %meshBB348
+ i32 472, label %meshBB325
+ i32 2615, label %meshBB22.fragment
+ i32 359, label %meshBB.fragment
+ i32 2467, label %Unwind20.fragment
+ i32 1671, label %unwind66.fragment.fragment
+ i32 1006, label %meshBB25.fragment
+ i32 1243, label %meshBB333
+ i32 2795, label %unwind43.fragment313
+ i32 1591, label %meshBB335
+ i32 773, label %meshBB341
+ i32 2440, label %cond_next.fragment
+ i32 487, label %meshBB326
+ i32 394, label %meshBB324
+ i32 14, label %invcont16.fragment
+ i32 574, label %entry1.fragment312
+ i32 1453, label %meshBB35
+ i32 345, label %entry1.fragment
+ i32 2951, label %unwind20.fragment
+ i32 1960, label %meshBB31
+ i32 2163, label %meshBB32
+ i32 1978, label %Unwind.fragment
+ i32 1559, label %unwind20.fragment.fragment
+ i32 950, label %unwind10.fragment
+ i32 1724, label %unwind53.fragment
+ i32 514, label %meshBB36
+ i32 1928, label %unwind10.fragment.fragment
+ i32 1266, label %meshBB26
+ i32 3148, label %unwind20.fragment311
+ i32 1581, label %unwind43.fragment
+ i32 1829, label %meshBB34
+ i32 1472, label %meshBB28
+ i32 2657, label %unwind66.fragment
+ i32 2169, label %meshBB22
+ i32 2619, label %meshBB
+ i32 1397, label %entry.fragment
+ i32 231, label %invcont41.fragment
+ i32 2557, label %meshBB338
+ i32 2387, label %meshBB30.fragment
+ i32 2927, label %meshBB340
+ i32 2331, label %meshBB321
+ i32 47, label %meshBB328
+ i32 1753, label %meshBB342
+ i32 2074, label %meshBB323
+ i32 2128, label %meshBB334
+ i32 2396, label %meshBB337
+ i32 1811, label %meshBB29
+ i32 1113, label %meshBB27
+ i32 2232, label %unwind10.fragment310
+ i32 804, label %meshBB24
+ i32 3099, label %meshBB30
+ i32 564, label %meshBB33
+ i32 1359, label %unwind.fragment
+ i32 1906, label %entry.fragment309
+ i32 2644, label %entry.fragment.fragment
+ i32 134, label %entry1.fragment.normaldest
+ i32 2767, label %comb_entry.fragment
+ i32 2577, label %meshBB25
+ i32 3128, label %meshBB37
+ i32 2360, label %meshBB23
+ i32 286, label %unwind78.fragment
+ i32 976, label %meshBB346
+ i32 2412, label %meshBB339
+ i32 876, label %meshBB345
+ i32 3078, label %meshBB329
+ i32 1297, label %meshBB347
+ i32 3051, label %meshBB336
+ i32 1342, label %meshBB344
+ i32 728, label %meshBB330
+ i32 1778, label %meshBB349
+ i32 2784, label %meshBB327
+ i32 1854, label %meshBB26.fragment
+ i32 1025, label %meshBB34.fragment
+ i32 2139, label %unwind43.fragment.fragment
+ i32 2217, label %nofilter.fragment
+ i32 665, label %invcont12.fragment
+ i32 316, label %invcont22.fragment
+ i32 1467, label %unwind66.fragment315
+ i32 3018, label %unwind37.fragment
+ i32 1123, label %invcont17.normaldest
+ i32 2104, label %NewDefault
+ i32 1639, label %LeafBlock
+ i32 925, label %LeafBlock914
+ i32 2880, label %NodeBlock
+ ]
+
+old_entry: ; preds = %bb_main, %bb_main
+ br label %bb_main
+
+comb_entry.fragment: ; preds = %bb_main
+ br label %bb_main
+
+NodeBlock: ; preds = %bb_main
+ br label %bb_main
+
+LeafBlock914: ; preds = %bb_main
+ br label %bb_main
+
+LeafBlock: ; preds = %bb_main
+ br label %bb_main
+
+NewDefault: ; preds = %bb_main
+ br label %bb_main
+
+entry: ; preds = %bb_main
+ br label %bb_main
+
+entry.fragment309: ; preds = %bb_main
+ br label %bb_main
+
+entry.fragment: ; preds = %bb_main
+ br label %bb_main
+
+entry.fragment.fragment: ; preds = %bb_main
+ invoke void @___ZNSt12_Vector_baseI6BigIntSaIS0_EE13_M_deallocateEPS0_j___ZNSt12_Vector_baseI6BigIntSaIS0_EED2Ev___ZNSt6vectorI6BigIntSaIS0_EEC1ERKS1_( %"struct.std::_Vector_base<BigInt,std::allocator<BigInt> >"* null, i32 28, %struct.BigInt* null, i32 0, %"struct.std::vector<BigInt,std::allocator<BigInt> >"* null, %struct.__false_type* null )
+ to label %meshBB340 unwind label %meshBB325
+
+unwind: ; preds = %bb_main
+ br label %bb_main
+
+unwind.fragment: ; preds = %bb_main
+ br label %bb_main
+
+invcont: ; preds = %bb_main
+ br label %bb_main
+
+invcont.fragment: ; preds = %bb_main
+ invoke void @_ZN9Fibonacci10get_numberEj( %struct.BigInt* null sret , %struct.Fibonacci* %this_this, i32 %n_i_n_i )
+ to label %invcont14 unwind label %meshBB37
+
+invcont.unwind10_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+unwind10: ; preds = %bb_main
+ br label %bb_main
+
+unwind10.fragment310: ; preds = %bb_main
+ br label %bb_main
+
+unwind10.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind10.fragment.fragment: ; preds = %bb_main
+ invoke void @___ZNSt6vectorI6BigIntSaIS0_EED1Ev___ZN9FibonacciD1Ev___ZNSt6vectorImSaImEEC1ERKS0_( i32 57, %"struct.std::vector<BigInt,std::allocator<BigInt> >"* null, %struct.Fibonacci* null, %"struct.std::vector<ulong,std::allocator<ulong> >"* null, %struct.__false_type* null )
+ to label %meshBB329 unwind label %meshBB24
+
+unwind10.Unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont14: ; preds = %invcont.fragment, %bb_main
+ br label %bb_main
+
+invcont14.normaldest: ; No predecessors!
+ invoke %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"* @___ZN9__gnu_cxx17__normal_iteratorIP6BigIntSt6vectorIS1_SaIS1_EEEppEv___ZNSt6vectorImSaImEED1Ev___ZN6BigIntD1Ev___ZN9__gnu_cxx13new_allocatorI6BigIntE7destroyEPS1____ZSt8_DestroyIP6BigIntSaIS0_EEvT_S3_T0_( i32 14, %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"* null, %"struct.std::vector<ulong,std::allocator<ulong> >"* null, %struct.BigInt* null, %struct.__false_type* null, %struct.BigInt* null, %struct.__false_type* null noalias )
+ to label %invcont15 unwind label %meshBB345 ; <%"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"*>:0 [#uses=0]
+
+invcont14.unwind10_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont15: ; preds = %invcont14.normaldest, %bb_main
+ br label %bb_main
+
+invcont15.normaldest: ; No predecessors!
+ br label %UnifiedReturnBlock
+
+unwind20: ; preds = %bb_main
+ br label %bb_main
+
+unwind20.fragment311: ; preds = %bb_main
+ br label %bb_main
+
+unwind20.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind20.fragment.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind20.Unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+filter: ; preds = %bb_main
+ br label %UnifiedUnreachableBlock
+
+Unwind: ; preds = %bb_main
+ br label %bb_main
+
+Unwind.fragment: ; preds = %bb_main
+ br label %UnifiedUnreachableBlock
+
+entry1: ; preds = %bb_main
+ br label %bb_main
+
+entry1.fragment312: ; preds = %bb_main
+ br label %bb_main
+
+entry1.fragment: ; preds = %bb_main
+ br label %bb_main
+
+entry1.fragment.fragment: ; preds = %bb_main
+ %tmp52 = invoke i32 @___ZN9__gnu_cxxmiIPK6BigIntS3_St6vectorIS1_SaIS1_EEEENS_17__normal_iteratorIT_T1_E15difference_typeERKSA_RKNS7_IT0_S9_EE___ZNKSt6vectorI6BigIntSaIS0_EE4sizeEv___ZNK9Fibonacci16show_all_numbersEv___ZNKSt6vectorI6BigIntSaIS0_EE8capacityEv( %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"* null, %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"* null, %"struct.std::vector<BigInt,std::allocator<BigInt> >"* null, i32 16, %struct.Fibonacci* null )
+ to label %entry1.fragment.normaldest unwind label %meshBB320 ; <i32> [#uses=0]
+
+entry.unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+unwind11: ; preds = %bb_main
+ br label %bb_main
+
+unwind11.fragment: ; preds = %bb_main
+ br label %bb_main
+
+invcont16: ; preds = %bb_main
+ br label %bb_main
+
+invcont16.fragment: ; preds = %bb_main
+ br label %bb_main
+
+invcont.cond_next_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+cond_true: ; preds = %bb_main
+ invoke void @_ZN9Fibonacci10get_numberEj( %struct.BigInt* null sret , %struct.Fibonacci* %this_this, i32 %n_i_n_i )
+ to label %meshBB323 unwind label %cond_true.unwind_crit_edge
+
+cond_true.unwind_crit_edge: ; preds = %cond_true, %bb_main
+ br label %bb_main
+
+cond_true.unwind_crit_edge.unwinddest: ; No predecessors!
+ br label %bb_main
+
+invcont12: ; preds = %bb_main
+ br label %bb_main
+
+invcont12.fragment: ; preds = %bb_main
+ invoke %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"* @___ZN9__gnu_cxx17__normal_iteratorIP6BigIntSt6vectorIS1_SaIS1_EEEppEv___ZNSt6vectorImSaImEED1Ev___ZN6BigIntD1Ev___ZN9__gnu_cxx13new_allocatorI6BigIntE7destroyEPS1____ZSt8_DestroyIP6BigIntSaIS0_EEvT_S3_T0_( i32 14, %"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"* null, %"struct.std::vector<ulong,std::allocator<ulong> >"* null, %struct.BigInt* null, %struct.__false_type* null, %struct.BigInt* null, %struct.__false_type* null noalias )
+ to label %meshBB30 unwind label %meshBB337 ; <%"struct.__gnu_cxx::__normal_iterator<BigInt*,std::vector<BigInt, std::allocator<BigInt> > >"*>:1 [#uses=0]
+
+invcont12.unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont12.cond_next_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+cond_next: ; preds = %bb_main
+ br label %bb_main
+
+cond_next.fragment: ; preds = %bb_main
+ %tmp183 = invoke %struct.BigInt* @___ZNSt6vectorI6BigIntSaIS0_EEixEj___ZNSt6vectorI6BigIntSaIS0_EE3endEv( %"struct.std::vector<BigInt,std::allocator<BigInt> >"* null, i32 %n_i_n_i, i32 29 )
+ to label %invcont17 unwind label %meshBB336 ; <%struct.BigInt*> [#uses=0]
+
+cond_next.unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont17: ; preds = %cond_next.fragment, %bb_main
+ br label %bb_main
+
+invcont17.normaldest917: ; No predecessors!
+ %tmp23 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* null, i8* getelementptr ([6 x i8]* @.str13, i32 0, i32 0) )
+ to label %invcont17.normaldest unwind label %meshBB318 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont17.unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont22: ; preds = %bb_main
+ br label %bb_main
+
+invcont22.fragment: ; preds = %bb_main
+ %tmp26 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEm( %"struct.std::basic_ostream<char,std::char_traits<char> >"* undef, i32 %n_i_n_i )
+ to label %invcont25 unwind label %meshBB319 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont22.unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont25: ; preds = %invcont22.fragment, %bb_main
+ br label %bb_main
+
+invcont25.normaldest: ; No predecessors!
+ %tmp2918 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp26, i8* getelementptr ([5 x i8]* @.str14, i32 0, i32 0) )
+ to label %invcont28 unwind label %invcont25.unwind_crit_edge ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont25.unwind_crit_edge: ; preds = %invcont25.normaldest, %bb_main
+ br label %bb_main
+
+invcont25.unwind_crit_edge.unwinddest: ; No predecessors!
+ br label %bb_main
+
+invcont28: ; preds = %invcont25.normaldest, %bb_main
+ br label %bb_main
+
+invcont28.normaldest: ; No predecessors!
+ br label %bb_main
+
+invcont28.fragment: ; preds = %bb_main
+ %tmp311 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @___ZlsRSoRK6BigInt___ZN9__gnu_cxx13new_allocatorI6BigIntE10deallocateEPS1_j( i32 32, %"struct.std::basic_ostream<char,std::char_traits<char> >"* undef, %struct.BigInt* undef, %struct.__false_type* null, i32 0 )
+ to label %invcont30 unwind label %meshBB322 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont28.unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont30: ; preds = %invcont28.fragment, %bb_main
+ br label %bb_main
+
+invcont30.normaldest: ; No predecessors!
+ br label %bb_main
+
+invcont30.fragment: ; preds = %bb_main
+ %tmp34 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* undef, i8* getelementptr ([2 x i8]* @.str15, i32 0, i32 0) )
+ to label %meshBB26 unwind label %invcont30.unwind_crit_edge ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont30.unwind_crit_edge: ; preds = %invcont30.fragment, %bb_main
+ br label %bb_main
+
+invcont30.unwind_crit_edge.unwinddest: ; No predecessors!
+ br label %bb_main
+
+invcont33: ; preds = %bb_main
+ invoke void @_ZNKSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv( %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* null sret , %"struct.std::ostringstream"* null )
+ to label %invcont36 unwind label %invcont33.unwind_crit_edge
+
+invcont33.unwind_crit_edge: ; preds = %invcont33, %bb_main
+ br label %bb_main
+
+invcont33.unwind_crit_edge.unwinddest: ; No predecessors!
+ br label %bb_main
+
+invcont36: ; preds = %invcont33, %bb_main
+ br label %bb_main
+
+invcont36.normaldest: ; No predecessors!
+ %tmp42 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKSbIS4_S5_T1_E( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* null )
+ to label %invcont41 unwind label %meshBB338 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+
+unwind37: ; preds = %bb_main
+ br label %bb_main
+
+unwind37.fragment: ; preds = %bb_main
+ invoke void @_ZNSsD1Ev( %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* null )
+ to label %meshBB330 unwind label %meshBB22
+
+unwind37.nofilter_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont41: ; preds = %invcont36.normaldest, %bb_main
+ br label %bb_main
+
+invcont41.normaldest: ; No predecessors!
+ br label %bb_main
+
+invcont41.fragment: ; preds = %bb_main
+ invoke void @_ZNSsD1Ev( %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* null )
+ to label %meshBB23 unwind label %meshBB29
+
+unwind43: ; preds = %bb_main
+ br label %bb_main
+
+unwind43.fragment313: ; preds = %bb_main
+ br label %bb_main
+
+unwind43.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind43.fragment.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind43.nofilter_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont47: ; preds = %bb_main
+ invoke void @_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev( %"struct.std::ostringstream"* null )
+ to label %invcont70 unwind label %meshBB28
+
+filter19: ; preds = %bb_main
+ br label %UnifiedUnreachableBlock
+
+nofilter: ; preds = %bb_main
+ br label %bb_main
+
+nofilter.fragment: ; preds = %bb_main
+ invoke void @_ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev( %"struct.std::ostringstream"* null )
+ to label %nofilter.Unwind_crit_edge unwind label %meshBB
+
+nofilter.Unwind_crit_edge: ; preds = %nofilter.fragment, %bb_main
+ br label %bb_main
+
+nofilter.Unwind_crit_edge.normaldest: ; No predecessors!
+ br label %bb_main
+
+unwind53: ; preds = %bb_main
+ br label %bb_main
+
+unwind53.fragment314: ; preds = %bb_main
+ br label %bb_main
+
+unwind53.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind53.fragment.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind53.nofilter_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+filter62: ; preds = %bb_main
+ br label %UnifiedUnreachableBlock
+
+unwind66: ; preds = %bb_main
+ br label %bb_main
+
+unwind66.fragment315: ; preds = %bb_main
+ br label %bb_main
+
+unwind66.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind66.fragment.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind66.Unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+invcont70: ; preds = %invcont47, %bb_main
+ br label %bb_main
+
+invcont70.normaldest: ; No predecessors!
+ br label %UnifiedReturnBlock
+
+filter75: ; preds = %bb_main
+ br label %UnifiedUnreachableBlock
+
+unwind78: ; preds = %bb_main
+ br label %bb_main
+
+unwind78.fragment316: ; preds = %bb_main
+ br label %bb_main
+
+unwind78.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind78.fragment.fragment: ; preds = %bb_main
+ br label %bb_main
+
+unwind78.Unwind_crit_edge: ; preds = %bb_main
+ br label %bb_main
+
+filter87: ; preds = %bb_main
+ br label %UnifiedUnreachableBlock
+
+Unwind20: ; preds = %bb_main
+ br label %bb_main
+
+Unwind20.fragment: ; preds = %bb_main
+ br label %UnifiedUnreachableBlock
+
+meshBB: ; preds = %nofilter.fragment, %bb_main
+ br label %bb_main
+
+meshBB.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB22: ; preds = %unwind37.fragment, %bb_main
+ br label %bb_main
+
+meshBB22.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB22.fragment: ; preds = %bb_main
+ br label %bb_main
+
+entry1.fragment.normaldest: ; preds = %entry1.fragment.fragment, %bb_main
+ br label %bb_main
+
+entry1.fragment.normaldest.normaldest: ; No predecessors!
+ br label %bb_main
+
+meshBB23: ; preds = %invcont41.fragment, %bb_main
+ br label %bb_main
+
+meshBB23.normaldest: ; No predecessors!
+ br label %bb_main
+
+meshBB23.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB24: ; preds = %unwind10.fragment.fragment, %bb_main
+ br label %bb_main
+
+meshBB24.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB24.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB25: ; preds = %bb_main
+ br label %bb_main
+
+meshBB25.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB26: ; preds = %invcont30.fragment, %bb_main
+ br label %bb_main
+
+meshBB26.normaldest: ; No predecessors!
+ br label %bb_main
+
+meshBB26.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB27: ; preds = %bb_main
+ br label %bb_main
+
+meshBB27.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB28: ; preds = %invcont47, %bb_main
+ br label %bb_main
+
+meshBB28.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB28.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB29: ; preds = %invcont41.fragment, %bb_main
+ br label %bb_main
+
+meshBB29.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB29.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB30: ; preds = %invcont12.fragment, %bb_main
+ br label %bb_main
+
+meshBB30.normaldest: ; No predecessors!
+ br label %bb_main
+
+meshBB30.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB31: ; preds = %bb_main
+ br label %bb_main
+
+meshBB31.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB32: ; preds = %bb_main
+ br label %bb_main
+
+meshBB32.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB33: ; preds = %bb_main
+ br label %bb_main
+
+meshBB33.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB34: ; preds = %bb_main
+ br label %bb_main
+
+meshBB34.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB35: ; preds = %bb_main
+ br label %bb_main
+
+meshBB35.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB36: ; preds = %bb_main
+ br label %bb_main
+
+meshBB36.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB37: ; preds = %invcont.fragment, %bb_main
+ br label %bb_main
+
+meshBB37.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB37.fragment: ; preds = %bb_main
+ br label %bb_main
+
+meshBB317: ; preds = %bb_main
+ br label %bb_main
+
+meshBB318: ; preds = %invcont17.normaldest917, %bb_main
+ br label %bb_main
+
+meshBB318.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB319: ; preds = %invcont22.fragment, %bb_main
+ br label %bb_main
+
+meshBB319.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB320: ; preds = %entry1.fragment.fragment, %bb_main
+ br label %bb_main
+
+meshBB320.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB321: ; preds = %bb_main
+ br label %bb_main
+
+meshBB322: ; preds = %invcont28.fragment, %bb_main
+ br label %bb_main
+
+meshBB322.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB323: ; preds = %cond_true, %bb_main
+ br label %bb_main
+
+meshBB323.normaldest: ; No predecessors!
+ br label %bb_main
+
+meshBB324: ; preds = %bb_main
+ br label %bb_main
+
+meshBB325: ; preds = %entry.fragment.fragment, %bb_main
+ br label %bb_main
+
+meshBB325.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB326: ; preds = %bb_main
+ br label %bb_main
+
+meshBB327: ; preds = %bb_main
+ br label %bb_main
+
+meshBB328: ; preds = %bb_main
+ br label %bb_main
+
+meshBB329: ; preds = %unwind10.fragment.fragment, %bb_main
+ br label %bb_main
+
+meshBB329.normaldest: ; No predecessors!
+ br label %bb_main
+
+meshBB330: ; preds = %unwind37.fragment, %bb_main
+ br label %bb_main
+
+meshBB330.normaldest: ; No predecessors!
+ br label %bb_main
+
+meshBB331: ; preds = %bb_main
+ br label %bb_main
+
+meshBB332: ; preds = %bb_main
+ br label %bb_main
+
+meshBB333: ; preds = %bb_main
+ br label %bb_main
+
+meshBB334: ; preds = %bb_main
+ br label %bb_main
+
+meshBB335: ; preds = %bb_main
+ br label %bb_main
+
+meshBB336: ; preds = %cond_next.fragment, %bb_main
+ br label %bb_main
+
+meshBB336.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB337: ; preds = %invcont12.fragment, %bb_main
+ br label %bb_main
+
+meshBB337.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB338: ; preds = %invcont36.normaldest, %bb_main
+ br label %bb_main
+
+meshBB338.unwinddest: ; No predecessors!
+ br label %bb_main
+
+invcont17.normaldest: ; preds = %invcont17.normaldest917, %bb_main
+ br label %bb_main
+
+invcont17.normaldest.normaldest: ; No predecessors!
+ store %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp23, %"struct.std::basic_ostream<char,std::char_traits<char> >"** undef
+ br label %bb_main
+
+meshBB339: ; preds = %bb_main
+ br label %bb_main
+
+meshBB340: ; preds = %entry.fragment.fragment, %bb_main
+ br label %bb_main
+
+meshBB340.normaldest: ; No predecessors!
+ br label %bb_main
+
+meshBB341: ; preds = %bb_main
+ br label %bb_main
+
+meshBB342: ; preds = %bb_main
+ br label %bb_main
+
+meshBB343: ; preds = %bb_main
+ br label %bb_main
+
+meshBB344: ; preds = %bb_main
+ br label %bb_main
+
+meshBB345: ; preds = %invcont14.normaldest, %bb_main
+ br label %bb_main
+
+meshBB345.unwinddest: ; No predecessors!
+ br label %bb_main
+
+meshBB346: ; preds = %bb_main
+ br label %bb_main
+
+meshBB347: ; preds = %bb_main
+ br label %bb_main
+
+meshBB348: ; preds = %bb_main
+ br label %bb_main
+
+meshBB349: ; preds = %bb_main
+ br label %bb_main
+
+UnifiedUnreachableBlock: ; preds = %Unwind20.fragment, %filter87, %filter75, %filter62, %filter19, %Unwind.fragment, %filter
+ unreachable
+
+UnifiedReturnBlock: ; preds = %invcont70.normaldest, %invcont15.normaldest
+ ret void
+}
diff --git a/test/Transforms/LoopSimplify/basictest.ll b/test/Transforms/LoopSimplify/basictest.ll
new file mode 100644
index 0000000..4241d8a
--- /dev/null
+++ b/test/Transforms/LoopSimplify/basictest.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -loopsimplify
+
+; This function should get a preheader inserted before BB3, that is jumped
+; to by BB1 & BB2
+;
+
+define void @test() {
+ br i1 true, label %BB1, label %BB2
+BB1: ; preds = %0
+ br label %BB3
+BB2: ; preds = %0
+ br label %BB3
+BB3: ; preds = %BB3, %BB2, %BB1
+ br label %BB3
+}
+
diff --git a/test/Transforms/LoopSimplify/dg.exp b/test/Transforms/LoopSimplify/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LoopSimplify/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LoopSimplify/hardertest.ll b/test/Transforms/LoopSimplify/hardertest.ll
new file mode 100644
index 0000000..e0a7f81
--- /dev/null
+++ b/test/Transforms/LoopSimplify/hardertest.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -loopsimplify
+
+define void @foo(i1 %C) {
+ br i1 %C, label %T, label %F
+T: ; preds = %0
+ br label %Loop
+F: ; preds = %0
+ br label %Loop
+Loop: ; preds = %L2, %Loop, %F, %T
+ %Val = phi i32 [ 0, %T ], [ 1, %F ], [ 2, %Loop ], [ 3, %L2 ] ; <i32> [#uses=0]
+ br i1 %C, label %Loop, label %L2
+L2: ; preds = %Loop
+ br label %Loop
+}
+
diff --git a/test/Transforms/LoopSimplify/indirectbr.ll b/test/Transforms/LoopSimplify/indirectbr.ll
new file mode 100644
index 0000000..2e4549d
--- /dev/null
+++ b/test/Transforms/LoopSimplify/indirectbr.ll
@@ -0,0 +1,100 @@
+; RUN: opt < %s -loopsimplify -lcssa -verify-loop-info -verify-dom-info -S \
+; RUN: | grep -F {indirectbr i8* %x, \[label %L0, label %L1\]} \
+; RUN: | count 6
+
+; LoopSimplify should not try to transform loops when indirectbr is involved.
+
+define void @entry(i8* %x) {
+entry:
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L0:
+ br label %L0
+
+L1:
+ ret void
+}
+
+define void @backedge(i8* %x) {
+entry:
+ br label %L0
+
+L0:
+ br label %L1
+
+L1:
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+}
+
+define i64 @exit(i8* %x) {
+entry:
+ br label %L2
+
+L2:
+ %z = bitcast i64 0 to i64
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L0:
+ br label %L2
+
+L1:
+ ret i64 %z
+}
+
+define i64 @criticalexit(i8* %x, i1 %a) {
+entry:
+ br i1 %a, label %L1, label %L2
+
+L2:
+ %z = bitcast i64 0 to i64
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L0:
+ br label %L2
+
+L1:
+ %y = phi i64 [ %z, %L2 ], [ 1, %entry ]
+ ret i64 %y
+}
+
+define i64 @exit_backedge(i8* %x) {
+entry:
+ br label %L0
+
+L0:
+ %z = bitcast i64 0 to i64
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L1:
+ ret i64 %z
+}
+
+define i64 @criticalexit_backedge(i8* %x, i1 %a) {
+entry:
+ br i1 %a, label %L0, label %L1
+
+L0:
+ %z = bitcast i64 0 to i64
+ indirectbr i8* %x, [ label %L0, label %L1 ]
+
+L1:
+ %y = phi i64 [ %z, %L0 ], [ 1, %entry ]
+ ret i64 %y
+}
+
+define void @pr5502() nounwind {
+entry:
+ br label %while.cond
+
+while.cond:
+ br i1 undef, label %while.body, label %while.end
+
+while.body:
+ indirectbr i8* undef, [label %end_opcode, label %end_opcode]
+
+end_opcode:
+ br i1 false, label %end_opcode, label %while.cond
+
+while.end:
+ ret void
+}
diff --git a/test/Transforms/LoopSimplify/merge-exits.ll b/test/Transforms/LoopSimplify/merge-exits.ll
new file mode 100644
index 0000000..0e15f08
--- /dev/null
+++ b/test/Transforms/LoopSimplify/merge-exits.ll
@@ -0,0 +1,44 @@
+; RUN: opt < %s -loopsimplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info > %t
+; RUN: not grep sext %t
+; RUN: grep {phi i64} %t | count 1
+
+; Loopsimplify should be able to merge the two loop exits
+; into one, so that loop rotate can rotate the loop, so
+; that indvars can promote the induction variable to i64
+; without needing casts.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+define float @t(float* %pTmp1, float* %peakWeight, i32 %bandEdgeIndex) nounwind {
+entry:
+ %t0 = load float* %peakWeight, align 4 ; <float> [#uses=1]
+ br label %bb1
+
+bb: ; preds = %bb2
+ %t1 = sext i32 %hiPart.0 to i64 ; <i64> [#uses=1]
+ %t2 = getelementptr float* %pTmp1, i64 %t1 ; <float*> [#uses=1]
+ %t3 = load float* %t2, align 4 ; <float> [#uses=1]
+ %t4 = fadd float %t3, %distERBhi.0 ; <float> [#uses=1]
+ %t5 = add i32 %hiPart.0, 1 ; <i32> [#uses=2]
+ %t6 = sext i32 %t5 to i64 ; <i64> [#uses=1]
+ %t7 = getelementptr float* %peakWeight, i64 %t6 ; <float*> [#uses=1]
+ %t8 = load float* %t7, align 4 ; <float> [#uses=1]
+ %t9 = fadd float %t8, %peakCount.0 ; <float> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %peakCount.0 = phi float [ %t0, %entry ], [ %t9, %bb ] ; <float> [#uses=2]
+ %hiPart.0 = phi i32 [ 0, %entry ], [ %t5, %bb ] ; <i32> [#uses=3]
+ %distERBhi.0 = phi float [ 0.000000e+00, %entry ], [ %t4, %bb ] ; <float> [#uses=3]
+ %t10 = fcmp uge float %distERBhi.0, 2.500000e+00 ; <i1> [#uses=1]
+ br i1 %t10, label %bb3, label %bb2
+
+bb2: ; preds = %bb1
+ %t11 = add i32 %bandEdgeIndex, -1 ; <i32> [#uses=1]
+ %t12 = icmp sgt i32 %t11, %hiPart.0 ; <i1> [#uses=1]
+ br i1 %t12, label %bb, label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %t13 = fdiv float %peakCount.0, %distERBhi.0 ; <float> [#uses=1]
+ ret float %t13
+}
diff --git a/test/Transforms/LoopSimplify/phi-node-simplify.ll b/test/Transforms/LoopSimplify/phi-node-simplify.ll
new file mode 100644
index 0000000..5e957cc
--- /dev/null
+++ b/test/Transforms/LoopSimplify/phi-node-simplify.ll
@@ -0,0 +1,55 @@
+; Loop Simplify should turn phi nodes like X = phi [X, Y] into just Y, eliminating them.
+; RUN: opt < %s -loopsimplify -S | grep phi | count 6
+
+@A = weak global [3000000 x i32] zeroinitializer ; <[3000000 x i32]*> [#uses=1]
+@B = weak global [20000 x i32] zeroinitializer ; <[20000 x i32]*> [#uses=1]
+@C = weak global [100 x i32] zeroinitializer ; <[100 x i32]*> [#uses=1]
+@Z = weak global i32 0 ; <i32*> [#uses=2]
+
+define i32 @main() {
+entry:
+ tail call void @__main( )
+ br label %loopentry.1
+loopentry.1: ; preds = %loopexit.1, %entry
+ %indvar20 = phi i32 [ 0, %entry ], [ %indvar.next21, %loopexit.1 ] ; <i32> [#uses=1]
+ %a.1 = phi i32* [ getelementptr ([3000000 x i32]* @A, i32 0, i32 0), %entry ], [ %inc.0, %loopexit.1 ] ; <i32*> [#uses=1]
+ br label %no_exit.2
+no_exit.2: ; preds = %loopexit.2, %no_exit.2, %loopentry.1
+ %a.0.4.ph = phi i32* [ %a.1, %loopentry.1 ], [ %inc.0, %loopexit.2 ], [ %a.0.4.ph, %no_exit.2 ] ; <i32*> [#uses=3]
+ %b.1.4.ph = phi i32* [ getelementptr ([20000 x i32]* @B, i32 0, i32 0), %loopentry.1 ], [ %inc.1, %loopexit.2 ], [ %b.1.4.ph, %no_exit.2 ] ; <i32*> [#uses=3]
+ %indvar17 = phi i32 [ 0, %loopentry.1 ], [ %indvar.next18, %loopexit.2 ], [ %indvar17, %no_exit.2 ] ; <i32> [#uses=2]
+ %indvar = phi i32 [ %indvar.next, %no_exit.2 ], [ 0, %loopexit.2 ], [ 0, %loopentry.1 ] ; <i32> [#uses=5]
+ %b.1.4.rec = bitcast i32 %indvar to i32 ; <i32> [#uses=1]
+ %gep.upgrd.1 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %c.2.4 = getelementptr [100 x i32]* @C, i32 0, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ %gep.upgrd.2 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %a.0.4 = getelementptr i32* %a.0.4.ph, i64 %gep.upgrd.2 ; <i32*> [#uses=1]
+ %gep.upgrd.3 = zext i32 %indvar to i64 ; <i64> [#uses=1]
+ %b.1.4 = getelementptr i32* %b.1.4.ph, i64 %gep.upgrd.3 ; <i32*> [#uses=1]
+ %inc.0.rec = add i32 %b.1.4.rec, 1 ; <i32> [#uses=2]
+ %inc.0 = getelementptr i32* %a.0.4.ph, i32 %inc.0.rec ; <i32*> [#uses=2]
+ %tmp.13 = load i32* %a.0.4 ; <i32> [#uses=1]
+ %inc.1 = getelementptr i32* %b.1.4.ph, i32 %inc.0.rec ; <i32*> [#uses=1]
+ %tmp.15 = load i32* %b.1.4 ; <i32> [#uses=1]
+ %tmp.18 = load i32* %c.2.4 ; <i32> [#uses=1]
+ %tmp.16 = mul i32 %tmp.15, %tmp.13 ; <i32> [#uses=1]
+ %tmp.19 = mul i32 %tmp.16, %tmp.18 ; <i32> [#uses=1]
+ %tmp.20 = load i32* @Z ; <i32> [#uses=1]
+ %tmp.21 = add i32 %tmp.19, %tmp.20 ; <i32> [#uses=1]
+ store i32 %tmp.21, i32* @Z
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 100 ; <i1> [#uses=1]
+ br i1 %exitcond, label %loopexit.2, label %no_exit.2
+loopexit.2: ; preds = %no_exit.2
+ %indvar.next18 = add i32 %indvar17, 1 ; <i32> [#uses=2]
+ %exitcond19 = icmp eq i32 %indvar.next18, 200 ; <i1> [#uses=1]
+ br i1 %exitcond19, label %loopexit.1, label %no_exit.2
+loopexit.1: ; preds = %loopexit.2
+ %indvar.next21 = add i32 %indvar20, 1 ; <i32> [#uses=2]
+ %exitcond22 = icmp eq i32 %indvar.next21, 300 ; <i1> [#uses=1]
+ br i1 %exitcond22, label %return, label %loopentry.1
+return: ; preds = %loopexit.1
+ ret i32 undef
+}
+
+declare void @__main()
diff --git a/test/Transforms/LoopSimplify/single-backedge.ll b/test/Transforms/LoopSimplify/single-backedge.ll
new file mode 100644
index 0000000..f9567f1
--- /dev/null
+++ b/test/Transforms/LoopSimplify/single-backedge.ll
@@ -0,0 +1,20 @@
+; The loop canonicalization pass should guarantee that there is one backedge
+; for all loops. This allows the -indvars pass to recognize the %IV
+; induction variable in this testcase.
+
+; RUN: opt < %s -indvars -S | grep indvar
+
+define i32 @test(i1 %C) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %BE2, %BE1, %0
+ %IV = phi i32 [ 1, %0 ], [ %IV2, %BE1 ], [ %IV2, %BE2 ] ; <i32> [#uses=2]
+ store i32 %IV, i32* null
+ %IV2 = add i32 %IV, 2 ; <i32> [#uses=2]
+ br i1 %C, label %BE1, label %BE2
+BE1: ; preds = %Loop
+ br label %Loop
+BE2: ; preds = %Loop
+ br label %Loop
+}
+
diff --git a/test/Transforms/LoopSimplify/unreachable-loop-pred.ll b/test/Transforms/LoopSimplify/unreachable-loop-pred.ll
new file mode 100644
index 0000000..faaaf97
--- /dev/null
+++ b/test/Transforms/LoopSimplify/unreachable-loop-pred.ll
@@ -0,0 +1,20 @@
+; RUN: opt -S -loopsimplify -disable-output -verify-loop-info -verify-dom-info < %s
+; PR5235
+
+; When loopsimplify inserts a preheader for this loop, it should add the new
+; block to the enclosing loop and not get confused by the unreachable
+; bogus loop entry.
+
+define void @is_extract_cab() nounwind {
+entry:
+ br label %header
+
+header: ; preds = %if.end206, %cond.end66, %if.end23
+ br label %while.body115
+
+while.body115: ; preds = %9, %if.end192, %if.end101
+ br i1 undef, label %header, label %while.body115
+
+foo:
+ br label %while.body115
+}
diff --git a/test/Transforms/LoopStrengthReduce/2005-08-15-AddRecIV.ll b/test/Transforms/LoopStrengthReduce/2005-08-15-AddRecIV.ll
new file mode 100644
index 0000000..1f08a43
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2005-08-15-AddRecIV.ll
@@ -0,0 +1,57 @@
+; RUN: opt < %s -loop-reduce -disable-output
+
+define void @try_swap() {
+entry:
+ br i1 false, label %cond_continue.0.i, label %cond_false.0.i
+cond_false.0.i: ; preds = %entry
+ ret void
+cond_continue.0.i: ; preds = %entry
+ br i1 false, label %cond_continue.1.i, label %cond_false.1.i
+cond_false.1.i: ; preds = %cond_continue.0.i
+ ret void
+cond_continue.1.i: ; preds = %cond_continue.0.i
+ br i1 false, label %endif.3.i, label %else.0.i
+endif.3.i: ; preds = %cond_continue.1.i
+ br i1 false, label %my_irand.exit82, label %endif.0.i62
+else.0.i: ; preds = %cond_continue.1.i
+ ret void
+endif.0.i62: ; preds = %endif.3.i
+ ret void
+my_irand.exit82: ; preds = %endif.3.i
+ br i1 false, label %else.2, label %then.4
+then.4: ; preds = %my_irand.exit82
+ ret void
+else.2: ; preds = %my_irand.exit82
+ br i1 false, label %find_affected_nets.exit, label %loopentry.1.i107.outer.preheader
+loopentry.1.i107.outer.preheader: ; preds = %else.2
+ ret void
+find_affected_nets.exit: ; preds = %else.2
+ br i1 false, label %save_region_occ.exit, label %loopentry.1
+save_region_occ.exit: ; preds = %find_affected_nets.exit
+ br i1 false, label %no_exit.1.preheader, label %loopexit.1
+loopentry.1: ; preds = %find_affected_nets.exit
+ ret void
+no_exit.1.preheader: ; preds = %save_region_occ.exit
+ ret void
+loopexit.1: ; preds = %save_region_occ.exit
+ br i1 false, label %then.10, label %loopentry.3
+then.10: ; preds = %loopexit.1
+ ret void
+loopentry.3: ; preds = %endif.16, %loopexit.1
+ %indvar342 = phi i32 [ %indvar.next343, %endif.16 ], [ 0, %loopexit.1 ] ; <i32> [#uses=2]
+ br i1 false, label %loopexit.3, label %endif.16
+endif.16: ; preds = %loopentry.3
+ %indvar.next343 = add i32 %indvar342, 1 ; <i32> [#uses=1]
+ br label %loopentry.3
+loopexit.3: ; preds = %loopentry.3
+ br label %loopentry.4
+loopentry.4: ; preds = %loopentry.4, %loopexit.3
+ %indvar340 = phi i32 [ 0, %loopexit.3 ], [ %indvar.next341, %loopentry.4 ] ; <i32> [#uses=2]
+ %tmp. = add i32 %indvar340, %indvar342 ; <i32> [#uses=1]
+ %tmp.526 = load i32** null ; <i32*> [#uses=1]
+ %gep.upgrd.1 = zext i32 %tmp. to i64 ; <i64> [#uses=1]
+ %tmp.528 = getelementptr i32* %tmp.526, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp.528
+ %indvar.next341 = add i32 %indvar340, 1 ; <i32> [#uses=1]
+ br label %loopentry.4
+}
diff --git a/test/Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll b/test/Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll
new file mode 100644
index 0000000..f1c523a
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -loop-reduce -disable-output
+
+define i32 @image_to_texture(i32 %indvar454) {
+loopentry.1.outer:
+ %j.2.1.ph = bitcast i32 %indvar454 to i32 ; <i32> [#uses=1]
+ br label %loopentry.1
+loopentry.1: ; preds = %loopentry.1, %loopentry.1.outer
+ %i.3 = phi i32 [ 0, %loopentry.1.outer ], [ %i.3.be, %loopentry.1 ] ; <i32> [#uses=2]
+ %tmp.390 = load i32* null ; <i32> [#uses=1]
+ %tmp.392 = mul i32 %tmp.390, %j.2.1.ph ; <i32> [#uses=1]
+ %tmp.394 = add i32 %tmp.392, %i.3 ; <i32> [#uses=1]
+ %i.3.be = add i32 %i.3, 1 ; <i32> [#uses=1]
+ br i1 false, label %loopentry.1, label %label.6
+label.6: ; preds = %loopentry.1
+ ret i32 %tmp.394
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll b/test/Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll
new file mode 100644
index 0000000..f56a553
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -loop-reduce -disable-output
+
+define void @main() {
+entry:
+ br label %loopentry.0
+loopentry.0: ; preds = %then.5, %entry
+ %arg_index.1.ph = phi i32 [ 1, %entry ], [ %arg_index.1.ph.be, %then.5 ] ; <i32> [#uses=1]
+ br i1 false, label %no_exit.0, label %loopexit.0
+no_exit.0: ; preds = %loopentry.0
+ %arg_index.1.1 = add i32 0, %arg_index.1.ph ; <i32> [#uses=2]
+ br i1 false, label %then.i55, label %endif.i61
+then.i55: ; preds = %no_exit.0
+ br i1 false, label %then.4, label %else.1
+endif.i61: ; preds = %no_exit.0
+ ret void
+then.4: ; preds = %then.i55
+ %tmp.19993 = add i32 %arg_index.1.1, 2 ; <i32> [#uses=0]
+ ret void
+else.1: ; preds = %then.i55
+ br i1 false, label %then.i86, label %loopexit.i97
+then.i86: ; preds = %else.1
+ ret void
+loopexit.i97: ; preds = %else.1
+ br i1 false, label %then.5, label %else.2
+then.5: ; preds = %loopexit.i97
+ %arg_index.1.ph.be = add i32 %arg_index.1.1, 2 ; <i32> [#uses=1]
+ br label %loopentry.0
+else.2: ; preds = %loopexit.i97
+ ret void
+loopexit.0: ; preds = %loopentry.0
+ ret void
+}
diff --git a/test/Transforms/LoopStrengthReduce/2007-04-23-UseIterator.ll b/test/Transforms/LoopStrengthReduce/2007-04-23-UseIterator.ll
new file mode 100644
index 0000000..8c2cfaf
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2007-04-23-UseIterator.ll
@@ -0,0 +1,71 @@
+; RUN: opt < %s -loop-reduce -disable-output
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+
+target triple = "i686-apple-darwin9"
+
+define i8* @foo( i8* %ABC) {
+entry:
+ switch i8 0, label %bb129 [
+ i8 0, label %UnifiedReturnBlock
+ i8 9, label %UnifiedReturnBlock
+ i8 32, label %UnifiedReturnBlock
+ i8 35, label %UnifiedReturnBlock
+ i8 37, label %bb16.preheader
+ ]
+
+bb16.preheader: ; preds = %entry
+ br label %bb16
+
+bb16: ; preds = %cond_next102, %bb16.preheader
+ %indvar = phi i32 [ %indvar.next, %cond_next102 ], [ 0, %bb16.preheader ] ; <i32> [#uses=2]
+ %ABC.2146.0.rec = mul i32 %indvar, 3 ; <i32> [#uses=1]
+ br i1 false, label %UnifiedReturnBlock.loopexit, label %cond_next102
+
+cond_next102: ; preds = %bb16
+ %tmp138145.rec = add i32 %ABC.2146.0.rec, 3 ; <i32> [#uses=1]
+ %tmp138145 = getelementptr i8* %ABC, i32 %tmp138145.rec ; <i8*> [#uses=4]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ switch i8 0, label %bb129.loopexit [
+ i8 0, label %UnifiedReturnBlock.loopexit
+ i8 9, label %UnifiedReturnBlock.loopexit
+ i8 32, label %UnifiedReturnBlock.loopexit
+ i8 35, label %UnifiedReturnBlock.loopexit
+ i8 37, label %bb16
+ ]
+
+bb129.loopexit: ; preds = %cond_next102
+ br label %bb129
+
+bb129: ; preds = %bb129.loopexit, %entry
+ ret i8* null
+
+UnifiedReturnBlock.loopexit: ; preds = %cond_next102, %cond_next102, %cond_next102, %cond_next102, %bb16
+ %UnifiedRetVal.ph = phi i8* [ %tmp138145, %cond_next102 ], [ %tmp138145, %cond_next102 ], [ %tmp138145, %cond_next102 ], [ %tmp138145, %cond_next102 ], [ null, %bb16 ] ; <i8*> [#uses=0]
+ br label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %UnifiedReturnBlock.loopexit, %entry, %entry, %entry, %entry
+ ret i8* null
+}
+
+define i8* @bar() {
+entry:
+ switch i8 0, label %bb158 [
+ i8 37, label %bb74
+ i8 58, label %cond_true
+ i8 64, label %bb11
+ ]
+
+bb11: ; preds = %entry
+ ret i8* null
+
+cond_true: ; preds = %entry
+ ret i8* null
+
+bb74: ; preds = %entry
+ ret i8* null
+
+bb158: ; preds = %entry
+ ret i8* null
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/2008-08-06-CmpStride.ll b/test/Transforms/LoopStrengthReduce/2008-08-06-CmpStride.ll
new file mode 100644
index 0000000..7c7a21c
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2008-08-06-CmpStride.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -loop-reduce -S | grep ugt
+; PR2535
+
[email protected] = internal constant [4 x i8] c"%d\0A\00"
+
+declare i32 @printf(i8* noalias , ...) nounwind
+
+define i32 @main() nounwind {
+entry:
+ br label %forbody
+
+forbody:
+ %i.0 = phi i32 [ 0, %entry ], [ %inc, %forbody ] ; <i32>[#uses=3]
+ %sub14 = sub i32 1027, %i.0 ; <i32> [#uses=1]
+ %mul15 = mul i32 %sub14, 10 ; <i32> [#uses=1]
+ %add166 = or i32 %mul15, 1 ; <i32> [#uses=1] *
+ call i32 (i8*, ...)* @printf( i8* noalias getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %add166 ) nounwind
+ %inc = add i32 %i.0, 1 ; <i32> [#uses=3]
+ %cmp = icmp ult i32 %inc, 1027 ; <i1> [#uses=1]
+ br i1 %cmp, label %forbody, label %afterfor
+
+afterfor: ; preds = %forcond
+ ret i32 0
+}
diff --git a/test/Transforms/LoopStrengthReduce/2008-08-13-CmpStride.ll b/test/Transforms/LoopStrengthReduce/2008-08-13-CmpStride.ll
new file mode 100644
index 0000000..90477d1
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2008-08-13-CmpStride.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -loop-reduce -S | grep add | count 2
+; PR 2662
+@g_3 = common global i16 0 ; <i16*> [#uses=2]
+@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define void @func_1() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %l_2.0.reg2mem.0 = phi i16 [ 0, %entry ], [ %t1, %bb ] ; <i16> [#uses=2]
+ %t0 = shl i16 %l_2.0.reg2mem.0, 1 ; <i16>:0 [#uses=1]
+ volatile store i16 %t0, i16* @g_3, align 2
+ %t1 = add i16 %l_2.0.reg2mem.0, -3 ; <i16>:1 [#uses=2]
+ %t2 = icmp slt i16 %t1, 1 ; <i1>:2 [#uses=1]
+ br i1 %t2, label %bb, label %return
+
+return: ; preds = %bb
+ ret void
+}
+
+define i32 @main() nounwind {
+entry:
+ tail call void @func_1( ) nounwind
+ volatile load i16* @g_3, align 2 ; <i16>:0 [#uses=1]
+ zext i16 %0 to i32 ; <i32>:1 [#uses=1]
+ tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), i32 %1 ) nounwind ; <i32>:2 [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll b/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll
new file mode 100644
index 0000000..c650d8c
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll
@@ -0,0 +1,99 @@
+; RUN: opt < %s -loop-reduce -S | grep "phi double" | count 1
+
+define void @foobar(i32 %n) nounwind {
+entry:
+ icmp eq i32 %n, 0 ; <i1>:0 [#uses=2]
+ br i1 %0, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %umax = select i1 %0, i32 1, i32 %n ; <i32> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %i.03 = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ tail call void @bar( i32 %i.03 ) nounwind
+ uitofp i32 %i.03 to double ; <double>:1 [#uses=1]
+ tail call void @foo( double %1 ) nounwind
+ %indvar.next = add i32 %i.03, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %umax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+; Unable to eliminate cast because the mantissa bits for double are not enough
+; to hold all of i64 IV bits.
+define void @foobar2(i64 %n) nounwind {
+entry:
+ icmp eq i64 %n, 0 ; <i1>:0 [#uses=2]
+ br i1 %0, label %return, label %bb.nph
+
+bb.nph: ; preds = %entry
+ %umax = select i1 %0, i64 1, i64 %n ; <i64> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %i.03 = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i64> [#uses=3]
+ trunc i64 %i.03 to i32 ; <i32>:1 [#uses=1]
+ tail call void @bar( i32 %1 ) nounwind
+ uitofp i64 %i.03 to double ; <double>:2 [#uses=1]
+ tail call void @foo( double %2 ) nounwind
+ %indvar.next = add i64 %i.03, 1 ; <i64> [#uses=2]
+ %exitcond = icmp eq i64 %indvar.next, %umax ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+; Unable to eliminate cast due to potentional overflow.
+define void @foobar3() nounwind {
+entry:
+ tail call i32 (...)* @nn( ) nounwind ; <i32>:0 [#uses=1]
+ icmp eq i32 %0, 0 ; <i1>:1 [#uses=1]
+ br i1 %1, label %return, label %bb
+
+bb: ; preds = %bb, %entry
+ %i.03 = phi i32 [ 0, %entry ], [ %3, %bb ] ; <i32> [#uses=3]
+ tail call void @bar( i32 %i.03 ) nounwind
+ uitofp i32 %i.03 to double ; <double>:2 [#uses=1]
+ tail call void @foo( double %2 ) nounwind
+ add i32 %i.03, 1 ; <i32>:3 [#uses=2]
+ tail call i32 (...)* @nn( ) nounwind ; <i32>:4 [#uses=1]
+ icmp ugt i32 %4, %3 ; <i1>:5 [#uses=1]
+ br i1 %5, label %bb, label %return
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+; Unable to eliminate cast due to overflow.
+define void @foobar4() nounwind {
+entry:
+ br label %bb.nph
+
+bb.nph: ; preds = %entry
+ br label %bb
+
+bb: ; preds = %bb, %bb.nph
+ %i.03 = phi i8 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=3]
+ %tmp2 = sext i8 %i.03 to i32 ; <i32>:0 [#uses=1]
+ tail call void @bar( i32 %tmp2 ) nounwind
+ %tmp3 = uitofp i8 %i.03 to double ; <double>:1 [#uses=1]
+ tail call void @foo( double %tmp3 ) nounwind
+ %indvar.next = add i8 %i.03, 1 ; <i32> [#uses=2]
+ %tmp = sext i8 %indvar.next to i32
+ %exitcond = icmp eq i32 %tmp, 32767 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb, %entry
+ ret void
+}
+
+declare void @bar(i32)
+
+declare void @foo(double)
+
+declare i32 @nn(...)
+
diff --git a/test/Transforms/LoopStrengthReduce/2008-09-09-Overflow.ll b/test/Transforms/LoopStrengthReduce/2008-09-09-Overflow.ll
new file mode 100644
index 0000000..1ee6b5c
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2008-09-09-Overflow.ll
@@ -0,0 +1,48 @@
+; RUN: opt < %s -loop-reduce -S | grep phi | count 2
+; PR 2779
+@g_19 = common global i32 0 ; <i32*> [#uses=3]
+@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define i32 @func_8(i8 zeroext %p_9) nounwind {
+entry:
+ ret i32 1
+}
+
+define i32 @func_3(i8 signext %p_5) nounwind {
+entry:
+ ret i32 1
+}
+
+define void @func_1() nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %indvar = phi i16 [ 0, %entry ], [ %indvar.next, %bb ] ; <i16> [#uses=2]
+ %tmp = sub i16 0, %indvar ; <i16> [#uses=1]
+ %tmp27 = trunc i16 %tmp to i8 ; <i8> [#uses=1]
+ load i32* @g_19, align 4 ; <i32>:0 [#uses=2]
+ add i32 %0, 1 ; <i32>:1 [#uses=1]
+ store i32 %1, i32* @g_19, align 4
+ trunc i32 %0 to i8 ; <i8>:2 [#uses=1]
+ tail call i32 @func_8( i8 zeroext %2 ) nounwind ; <i32>:3 [#uses=0]
+ shl i8 %tmp27, 2 ; <i8>:4 [#uses=1]
+ add i8 %4, -112 ; <i8>:5 [#uses=1]
+ tail call i32 @func_3( i8 signext %5 ) nounwind ; <i32>:6 [#uses=0]
+ %indvar.next = add i16 %indvar, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %indvar.next, -28 ; <i1> [#uses=1]
+ br i1 %exitcond, label %return, label %bb
+
+return: ; preds = %bb
+ ret void
+}
+
+define i32 @main() nounwind {
+entry:
+ tail call void @func_1( ) nounwind
+ load i32* @g_19, align 4 ; <i32>:0 [#uses=1]
+ tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), i32 %0 ) nounwind ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/Transforms/LoopStrengthReduce/2009-01-13-nonconstant-stride-outside-loop.ll b/test/Transforms/LoopStrengthReduce/2009-01-13-nonconstant-stride-outside-loop.ll
new file mode 100644
index 0000000..b2cf818d
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2009-01-13-nonconstant-stride-outside-loop.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -loop-reduce -S | grep phi | count 1
+; RUN: opt < %s -loop-reduce -S | grep mul | count 1
+; ModuleID = '<stdin>'
+; Make sure examining a fuller expression outside the loop doesn't cause us to create a second
+; IV of stride %3.
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+ %struct.anon = type { %struct.obj*, %struct.obj* }
+ %struct.obj = type { i16, i16, { %struct.anon } }
+@heap_size = external global i32 ; <i32*> [#uses=1]
+@"\01LC85" = external constant [39 x i8] ; <[39 x i8]*> [#uses=1]
+
+declare i32 @sprintf(i8*, i8*, ...) nounwind
+
+define %struct.obj* @gc_status(%struct.obj* %args) nounwind {
+entry:
+ br label %bb1.i
+
+bb.i2: ; preds = %bb2.i3
+ %indvar.next24 = add i32 %m.0.i, 1 ; <i32> [#uses=1]
+ br label %bb1.i
+
+bb1.i: ; preds = %bb.i2, %entry
+ %m.0.i = phi i32 [ 0, %entry ], [ %indvar.next24, %bb.i2 ] ; <i32> [#uses=4]
+ %0 = icmp slt i32 %m.0.i, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb2.i3, label %nactive_heaps.exit
+
+bb2.i3: ; preds = %bb1.i
+ %1 = load %struct.obj** null, align 4 ; <%struct.obj*> [#uses=1]
+ %2 = icmp eq %struct.obj* %1, null ; <i1> [#uses=1]
+ br i1 %2, label %nactive_heaps.exit, label %bb.i2
+
+nactive_heaps.exit: ; preds = %bb2.i3, %bb1.i
+ %3 = load i32* @heap_size, align 4 ; <i32> [#uses=1]
+ %4 = mul i32 %3, %m.0.i ; <i32> [#uses=1]
+ %5 = sub i32 %4, 0 ; <i32> [#uses=1]
+ %6 = tail call i32 (i8*, i8*, ...)* @sprintf(i8* null, i8* getelementptr ([39 x i8]* @"\01LC85", i32 0, i32 0), i32 %m.0.i, i32 0, i32 %5, i32 0) nounwind ; <i32> [#uses=0]
+ ret %struct.obj* null
+}
diff --git a/test/Transforms/LoopStrengthReduce/2009-02-09-ivs-different-sizes.ll b/test/Transforms/LoopStrengthReduce/2009-02-09-ivs-different-sizes.ll
new file mode 100644
index 0000000..36cc535
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2009-02-09-ivs-different-sizes.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s
+; This used to crash.
+; ModuleID = 'bugpoint-reduced-simplified.bc'
+target datalayout ="e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @parse_number(i8* nocapture %p) nounwind {
+entry:
+ %shift.0 = select i1 false, i32 4, i32 2 ; <i32> [#uses=1]
+ br label %bb47
+
+bb47: ; preds = %bb47, %entry
+ br i1 false, label %bb54, label %bb47
+
+bb54: ; preds = %bb47
+ br i1 false, label %bb56, label %bb66
+
+bb56: ; preds = %bb62, %bb54
+ %p_addr.0.pn.rec = phi i64 [ %p_addr.6.rec, %bb62 ], [ 0, %bb54 ] ; <i64> [#uses=2]
+ %ch.6.in.in = phi i8* [ %p_addr.6, %bb62 ], [ null, %bb54 ] ; <i8*> [#uses=0]
+ %indvar202 = trunc i64 %p_addr.0.pn.rec to i32 ; <i32>[#uses=1]
+ %frac_bits.0 = mul i32 %indvar202, %shift.0 ; <i32>[#uses=1]
+ %p_addr.6.rec = add i64 %p_addr.0.pn.rec, 1 ; <i64>[#uses=2]
+ %p_addr.6 = getelementptr i8* null, i64 %p_addr.6.rec ; <i8*>[#uses=1]
+ br i1 false, label %bb66, label %bb62
+
+bb62: ; preds = %bb56
+ br label %bb56
+
+bb66: ; preds = %bb56, %bb54
+ %frac_bits.1 = phi i32 [ 0, %bb54 ], [ %frac_bits.0, %bb56 ] ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/LoopStrengthReduce/2009-04-28-no-reduce-mul.ll b/test/Transforms/LoopStrengthReduce/2009-04-28-no-reduce-mul.ll
new file mode 100644
index 0000000..002a878
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2009-04-28-no-reduce-mul.ll
@@ -0,0 +1,48 @@
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
+
+; The multiply in bb2 must not be reduced to an add, as the sext causes the
+; %1 argument to become negative after a while.
+
+; CHECK: sext i8
+; CHECK: mul i32
+; CHECK: store i32
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+@table = common global [32 x [256 x i32]] zeroinitializer, align 32 ; <[32 x [256 x i32]]*> [#uses=2]
+
+define i32 @main() nounwind {
+bb4.thread:
+ br label %bb2
+
+bb2: ; preds = %bb4, %bb2, %bb4.thread
+ %i.0.reg2mem.0.ph = phi i32 [ 0, %bb4.thread ], [ %i.0.reg2mem.0.ph, %bb2 ], [ %indvar.next9, %bb4 ] ; <i32> [#uses=4]
+ %j.0.reg2mem.0 = phi i32 [ 0, %bb4.thread ], [ %indvar.next, %bb2 ], [ 0, %bb4 ] ; <i32> [#uses=3]
+ %0 = trunc i32 %j.0.reg2mem.0 to i8 ; <i8> [#uses=1]
+ %1 = sext i8 %0 to i32 ; <i32> [#uses=1]
+ %2 = mul i32 %1, %i.0.reg2mem.0.ph ; <i32> [#uses=1]
+ %3 = getelementptr [32 x [256 x i32]]* @table, i32 0, i32 %i.0.reg2mem.0.ph, i32 %j.0.reg2mem.0 ; <i32*> [#uses=1]
+ store i32 %2, i32* %3, align 4
+ %indvar.next = add i32 %j.0.reg2mem.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, 256 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb4, label %bb2
+
+bb4: ; preds = %bb2
+ %indvar.next9 = add i32 %i.0.reg2mem.0.ph, 1 ; <i32> [#uses=2]
+ %exitcond10 = icmp eq i32 %indvar.next9, 32 ; <i1> [#uses=1]
+ br i1 %exitcond10, label %bb5, label %bb2
+
+bb5: ; preds = %bb4
+ %4 = load i32* getelementptr ([32 x [256 x i32]]* @table, i32 0, i32 9, i32 132), align 16 ; <i32> [#uses=1]
+ %5 = icmp eq i32 %4, -1116 ; <i1> [#uses=1]
+ br i1 %5, label %bb7, label %bb6
+
+bb6: ; preds = %bb5
+ tail call void @abort() noreturn nounwind
+ unreachable
+
+bb7: ; preds = %bb5
+ ret i32 0
+}
+
+declare void @abort() noreturn nounwind
diff --git a/test/Transforms/LoopStrengthReduce/2009-11-10-LSRCrash.ll b/test/Transforms/LoopStrengthReduce/2009-11-10-LSRCrash.ll
new file mode 100644
index 0000000..4032a59
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/2009-11-10-LSRCrash.ll
@@ -0,0 +1,130 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin11
+
+define void @_ZN4llvm20SelectionDAGLowering14visitInlineAsmENS_8CallSiteE() nounwind ssp align 2 {
+entry:
+ br i1 undef, label %bb3.i, label %bb4.i
+
+bb3.i: ; preds = %entry
+ unreachable
+
+bb4.i: ; preds = %entry
+ br i1 undef, label %bb.i.i, label %_ZNK4llvm8CallSite14getCalledValueEv.exit
+
+bb.i.i: ; preds = %bb4.i
+ unreachable
+
+_ZNK4llvm8CallSite14getCalledValueEv.exit: ; preds = %bb4.i
+ br i1 undef, label %_ZN4llvm4castINS_9InlineAsmEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit, label %bb6.i
+
+bb6.i: ; preds = %_ZNK4llvm8CallSite14getCalledValueEv.exit
+ unreachable
+
+_ZN4llvm4castINS_9InlineAsmEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit: ; preds = %_ZNK4llvm8CallSite14getCalledValueEv.exit
+ br i1 undef, label %_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit, label %bb.i
+
+bb.i: ; preds = %_ZN4llvm4castINS_9InlineAsmEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit
+ br label %_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit
+
+_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit: ; preds = %bb.i, %_ZN4llvm4castINS_9InlineAsmEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit
+ br i1 undef, label %bb50, label %bb27
+
+bb27: ; preds = %_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit
+ br i1 undef, label %bb1.i727, label %bb.i.i726
+
+bb.i.i726: ; preds = %bb27
+ unreachable
+
+bb1.i727: ; preds = %bb27
+ unreachable
+
+bb50: ; preds = %_ZL25hasInlineAsmMemConstraintRSt6vectorIN4llvm9InlineAsm14ConstraintInfoESaIS2_EERKNS0_14TargetLoweringE.exit
+ br label %bb107
+
+bb51: ; preds = %bb107
+ br i1 undef, label %bb105, label %bb106
+
+bb105: ; preds = %bb51
+ unreachable
+
+bb106: ; preds = %bb51
+ br label %bb107
+
+bb107: ; preds = %bb106, %bb50
+ br i1 undef, label %bb108, label %bb51
+
+bb108: ; preds = %bb107
+ br i1 undef, label %bb242, label %bb114
+
+bb114: ; preds = %bb108
+ br i1 undef, label %bb141, label %bb116
+
+bb116: ; preds = %bb114
+ br i1 undef, label %bb120, label %bb121
+
+bb120: ; preds = %bb116
+ unreachable
+
+bb121: ; preds = %bb116
+ unreachable
+
+bb141: ; preds = %bb114
+ br i1 undef, label %bb182, label %bb143
+
+bb143: ; preds = %bb141
+ br label %bb157
+
+bb144: ; preds = %bb.i.i.i843
+ switch i32 undef, label %bb155 [
+ i32 2, label %bb153
+ i32 6, label %bb153
+ i32 4, label %bb153
+ ]
+
+bb153: ; preds = %bb144, %bb144, %bb144
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb157
+
+bb155: ; preds = %bb144
+ unreachable
+
+bb157: ; preds = %bb153, %bb143
+ %indvar = phi i32 [ %indvar.next, %bb153 ], [ 0, %bb143 ] ; <i32> [#uses=2]
+ %0 = icmp eq i32 undef, %indvar ; <i1> [#uses=1]
+ switch i16 undef, label %bb6.i841 [
+ i16 9, label %_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit
+ i16 26, label %_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit
+ ]
+
+bb6.i841: ; preds = %bb157
+ unreachable
+
+_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit: ; preds = %bb157, %bb157
+ br i1 undef, label %bb.i.i.i843, label %bb1.i.i.i844
+
+bb.i.i.i843: ; preds = %_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit
+ br i1 %0, label %bb158, label %bb144
+
+bb1.i.i.i844: ; preds = %_ZN4llvm4castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS5_.exit
+ unreachable
+
+bb158: ; preds = %bb.i.i.i843
+ br i1 undef, label %bb177, label %bb176
+
+bb176: ; preds = %bb158
+ unreachable
+
+bb177: ; preds = %bb158
+ br i1 undef, label %bb179, label %bb178
+
+bb178: ; preds = %bb177
+ unreachable
+
+bb179: ; preds = %bb177
+ unreachable
+
+bb182: ; preds = %bb141
+ unreachable
+
+bb242: ; preds = %bb108
+ unreachable
+}
diff --git a/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-0.ll b/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-0.ll
new file mode 100644
index 0000000..36941ad
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-0.ll
@@ -0,0 +1,24 @@
+; RUN: llc %s -o - --x86-asm-syntax=att | grep {cmpl \$4}
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9"
+
+; This is like change-compare-stride-trickiness-1.ll except the comparison
+; happens before the relevant use, so the comparison stride can't be
+; easily changed.
+
+define void @foo() nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i32 [ 0, %entry ], [ %i.2.0.us1534, %loop ] ; <i32> [#uses=1]
+ %i.2.0.us1534 = add i32 %indvar, 1 ; <i32> [#uses=3]
+ %tmp611.us1535 = icmp eq i32 %i.2.0.us1534, 4 ; <i1> [#uses=2]
+ %tmp623.us1538 = select i1 %tmp611.us1535, i32 6, i32 0 ; <i32> [#uses=0]
+ %tmp628.us1540 = shl i32 %i.2.0.us1534, 1 ; <i32> [#uses=1]
+ %tmp645646647.us1547 = sext i32 %tmp628.us1540 to i64 ; <i64> [#uses=0]
+ br i1 %tmp611.us1535, label %exit, label %loop
+
+exit:
+ ret void
+}
diff --git a/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-1.ll b/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-1.ll
new file mode 100644
index 0000000..ea8a259
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-1.ll
@@ -0,0 +1,26 @@
+; RUN: llc %s -o - --x86-asm-syntax=att | grep {cmp. \$8}
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9"
+
+; The comparison happens after the relevant use, so the stride can easily
+; be changed. The comparison can be done in a narrower mode than the
+; induction variable.
+
+define void @foo() nounwind {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i32 [ 0, %entry ], [ %i.2.0.us1534, %loop ] ; <i32> [#uses=1]
+ %i.2.0.us1534 = add i32 %indvar, 1 ; <i32> [#uses=3]
+ %tmp628.us1540 = shl i32 %i.2.0.us1534, 1 ; <i32> [#uses=1]
+ %tmp645646647.us1547 = sext i32 %tmp628.us1540 to i64 ; <i64> [#uses=1]
+ store i64 %tmp645646647.us1547, i64* null
+ %tmp611.us1535 = icmp eq i32 %i.2.0.us1534, 4 ; <i1> [#uses=2]
+ %tmp623.us1538 = select i1 %tmp611.us1535, i32 6, i32 0 ; <i32> [#uses=1]
+ store i32 %tmp623.us1538, i32* null
+ br i1 %tmp611.us1535, label %exit, label %loop
+
+exit:
+ ret void
+}
diff --git a/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-2.ll b/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-2.ll
new file mode 100644
index 0000000..ae27383
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/change-compare-stride-trickiness-2.ll
@@ -0,0 +1,58 @@
+; RUN: llc < %s
+; PR4222
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-pc-linux-gnu"
+module asm ".ident\09\22$FreeBSD: head/sys/amd64/amd64/minidump_machdep.c 184499 2008-10-31 10:11:35Z kib $\22"
+ %struct.dumperinfo = type <{ i32 (i8*, i8*, i64, i64, i64)*, i8*, i32, i32, i64, i64 }>
+
+define void @minidumpsys(%struct.dumperinfo* %di) nounwind {
+entry:
+ br label %if.end
+
+if.end: ; preds = %if.end52, %entry
+ br label %for.cond.i.preheader
+
+for.cond.i.preheader: ; preds = %if.end52, %if.end
+ %indvar688 = phi i64 [ 0, %if.end ], [ %indvar.next689, %if.end52 ] ; <i64> [#uses=3]
+ %tmp690 = shl i64 %indvar688, 12 ; <i64> [#uses=1]
+ %pa.0642 = add i64 %tmp690, 0 ; <i64> [#uses=1]
+ %indvar688703 = trunc i64 %indvar688 to i32 ; <i32> [#uses=1]
+ %tmp692693 = add i32 %indvar688703, 1 ; <i32> [#uses=1]
+ %phitmp = sext i32 %tmp692693 to i64 ; <i64> [#uses=1]
+ br i1 false, label %if.end52, label %land.lhs.true.i
+
+land.lhs.true.i: ; preds = %for.cond.i.preheader
+ %shr2.i = lshr i64 %pa.0642, 18 ; <i64> [#uses=0]
+ unreachable
+
+if.end52: ; preds = %for.cond.i.preheader
+ %phitmp654 = icmp ult i64 %phitmp, 512 ; <i1> [#uses=1]
+ %indvar.next689 = add i64 %indvar688, 1 ; <i64> [#uses=1]
+ br i1 %phitmp654, label %for.cond.i.preheader, label %if.end
+}
+
+define void @promote(%struct.dumperinfo* %di) nounwind {
+entry:
+ br label %if.end
+
+if.end: ; preds = %if.end52, %entry
+ br label %for.cond.i.preheader
+
+for.cond.i.preheader: ; preds = %if.end52, %if.end
+ %indvar688 = phi i32 [ 0, %if.end ], [ %indvar.next689, %if.end52 ] ; <i64> [#uses=3]
+ %tmp690 = shl i32 %indvar688, 12 ; <i64> [#uses=1]
+ %pa.0642 = add i32 %tmp690, 0 ; <i64> [#uses=1]
+ %tmp692693 = add i32 %indvar688, 1 ; <i32> [#uses=1]
+ %phitmp = sext i32 %tmp692693 to i64 ; <i64> [#uses=1]
+ br i1 false, label %if.end52, label %land.lhs.true.i
+
+land.lhs.true.i: ; preds = %for.cond.i.preheader
+ %shr2.i = lshr i32 %pa.0642, 18 ; <i64> [#uses=0]
+ unreachable
+
+if.end52: ; preds = %for.cond.i.preheader
+ %phitmp654 = icmp ult i64 %phitmp, 512 ; <i1> [#uses=1]
+ %indvar.next689 = add i32 %indvar688, 1 ; <i64> [#uses=1]
+ br i1 %phitmp654, label %for.cond.i.preheader, label %if.end
+}
diff --git a/test/Transforms/LoopStrengthReduce/count-to-zero.ll b/test/Transforms/LoopStrengthReduce/count-to-zero.ll
new file mode 100644
index 0000000..8cc3b5c
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/count-to-zero.ll
@@ -0,0 +1,42 @@
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
+; rdar://7382068
+
+define void @t(i32 %c) nounwind optsize {
+entry:
+ br label %bb6
+
+bb1: ; preds = %bb6
+ %tmp = icmp eq i32 %c_addr.1, 20 ; <i1> [#uses=1]
+ br i1 %tmp, label %bb2, label %bb3
+
+bb2: ; preds = %bb1
+ %tmp1 = tail call i32 @f20(i32 %c_addr.1) nounwind ; <i32> [#uses=1]
+ br label %bb7
+
+bb3: ; preds = %bb1
+ %tmp2 = icmp slt i32 %c_addr.1, 10 ; <i1> [#uses=1]
+ %tmp3 = add nsw i32 %c_addr.1, 1 ; <i32> [#uses=1]
+ %tmp4 = add i32 %c_addr.1, -1 ; <i32> [#uses=1]
+ %c_addr.1.be = select i1 %tmp2, i32 %tmp3, i32 %tmp4 ; <i32> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+; CHECK: sub i32 %lsr.iv, 1
+ br label %bb6
+
+bb6: ; preds = %bb3, %entry
+ %indvar = phi i32 [ %indvar.next, %bb3 ], [ 0, %entry ] ; <i32> [#uses=2]
+ %c_addr.1 = phi i32 [ %c_addr.1.be, %bb3 ], [ %c, %entry ] ; <i32> [#uses=7]
+ %tmp5 = icmp eq i32 %indvar, 9999 ; <i1> [#uses=1]
+; CHECK: icmp eq i32 %lsr.iv, 0
+ %tmp6 = icmp eq i32 %c_addr.1, 100 ; <i1> [#uses=1]
+ %or.cond = or i1 %tmp5, %tmp6 ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb7, label %bb1
+
+bb7: ; preds = %bb6, %bb2
+ %c_addr.0 = phi i32 [ %tmp1, %bb2 ], [ %c_addr.1, %bb6 ] ; <i32> [#uses=1]
+ tail call void @bar(i32 %c_addr.0) nounwind
+ ret void
+}
+
+declare i32 @f20(i32)
+
+declare void @bar(i32)
diff --git a/test/Transforms/LoopStrengthReduce/dead-phi.ll b/test/Transforms/LoopStrengthReduce/dead-phi.ll
new file mode 100644
index 0000000..07a942f
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/dead-phi.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -loop-reduce -S | grep phi | count 1
+
+define void @foo(i32 %n) {
+entry:
+ br label %loop
+
+loop:
+ %i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
+
+ ; These three instructions form an isolated cycle and can be deleted.
+ %j = phi i32 [ 0, %entry ], [ %j.y, %loop ]
+ %j.x = add i32 %j, 1
+ %j.y = mul i32 %j.x, 2
+
+ %i.next = add i32 %i, 1
+ %c = icmp ne i32 %i.next, %n
+ br i1 %c, label %loop, label %exit
+
+exit:
+ ret void
+}
diff --git a/test/Transforms/LoopStrengthReduce/dg.exp b/test/Transforms/LoopStrengthReduce/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LoopStrengthReduce/different-type-ivs.ll b/test/Transforms/LoopStrengthReduce/different-type-ivs.ll
new file mode 100644
index 0000000..8cdd2645
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/different-type-ivs.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -loop-reduce -disable-output
+; Test to make sure that loop-reduce never crashes on IV's
+; with different types but identical strides.
+
+define void @foo() {
+entry:
+ br label %no_exit
+no_exit: ; preds = %no_exit, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %no_exit ] ; <i32> [#uses=3]
+ %indvar.upgrd.1 = trunc i32 %indvar to i16 ; <i16> [#uses=1]
+ %X.0.0 = mul i16 %indvar.upgrd.1, 1234 ; <i16> [#uses=1]
+ %tmp. = mul i32 %indvar, 1234 ; <i32> [#uses=1]
+ %tmp.5 = sext i16 %X.0.0 to i32 ; <i32> [#uses=1]
+ %tmp.3 = call i32 (...)* @bar( i32 %tmp.5, i32 %tmp. ) ; <i32> [#uses=0]
+ %tmp.0 = call i1 @pred( ) ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp.0, label %return, label %no_exit
+return: ; preds = %no_exit
+ ret void
+}
+
+declare i1 @pred()
+
+declare i32 @bar(...)
+
diff --git a/test/Transforms/LoopStrengthReduce/dont-hoist-simple-loop-constants.ll b/test/Transforms/LoopStrengthReduce/dont-hoist-simple-loop-constants.ll
new file mode 100644
index 0000000..4136486
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/dont-hoist-simple-loop-constants.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -loop-reduce -S | \
+; RUN: not grep {bitcast i32 1 to i32}
+; END.
+; The setlt wants to use a value that is incremented one more than the dominant
+; IV. Don't insert the 1 outside the loop, preventing folding it into the add.
+
+define void @test([700 x i32]* %nbeaux_.0__558, i32* %i_.16574) {
+then.0:
+ br label %no_exit.2
+no_exit.2: ; preds = %no_exit.2, %then.0
+ %indvar630 = phi i32 [ 0, %then.0 ], [ %indvar.next631, %no_exit.2 ] ; <i32> [#uses=4]
+ %gep.upgrd.1 = zext i32 %indvar630 to i64 ; <i64> [#uses=1]
+ %tmp.38 = getelementptr [700 x i32]* %nbeaux_.0__558, i32 0, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp.38
+ %inc.2 = add i32 %indvar630, 2 ; <i32> [#uses=2]
+ %tmp.34 = icmp slt i32 %inc.2, 701 ; <i1> [#uses=1]
+ %indvar.next631 = add i32 %indvar630, 1 ; <i32> [#uses=1]
+ br i1 %tmp.34, label %no_exit.2, label %loopexit.2.loopexit
+loopexit.2.loopexit: ; preds = %no_exit.2
+ store i32 %inc.2, i32* %i_.16574
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/dont_insert_redundant_ops.ll b/test/Transforms/LoopStrengthReduce/dont_insert_redundant_ops.ll
new file mode 100644
index 0000000..90051e3
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/dont_insert_redundant_ops.ll
@@ -0,0 +1,36 @@
+; Check that this test makes INDVAR and related stuff dead.
+; RUN: opt < %s -loop-reduce -S | grep phi | count 2
+
+declare i1 @pred()
+
+define void @test1({ i32, i32 }* %P) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %INDVAR = phi i32 [ 0, %0 ], [ %INDVAR2, %Loop ] ; <i32> [#uses=3]
+ %gep1 = getelementptr { i32, i32 }* %P, i32 %INDVAR, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %gep1
+ %gep2 = getelementptr { i32, i32 }* %P, i32 %INDVAR, i32 1 ; <i32*> [#uses=1]
+ store i32 0, i32* %gep2
+ %INDVAR2 = add i32 %INDVAR, 1 ; <i32> [#uses=1]
+ %cond = call i1 @pred( ) ; <i1> [#uses=1]
+ br i1 %cond, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
+
+define void @test2([2 x i32]* %P) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %INDVAR = phi i32 [ 0, %0 ], [ %INDVAR2, %Loop ] ; <i32> [#uses=3]
+ %gep1 = getelementptr [2 x i32]* %P, i32 %INDVAR, i64 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %gep1
+ %gep2 = getelementptr [2 x i32]* %P, i32 %INDVAR, i64 1 ; <i32*> [#uses=1]
+ store i32 0, i32* %gep2
+ %INDVAR2 = add i32 %INDVAR, 1 ; <i32> [#uses=1]
+ %cond = call i1 @pred( ) ; <i1> [#uses=1]
+ br i1 %cond, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
diff --git a/test/Transforms/LoopStrengthReduce/dont_reduce_bytes.ll b/test/Transforms/LoopStrengthReduce/dont_reduce_bytes.ll
new file mode 100644
index 0000000..2030000
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/dont_reduce_bytes.ll
@@ -0,0 +1,22 @@
+; Don't reduce the byte access to P[i], at least not on targets that
+; support an efficient 'mem[r1+r2]' addressing mode.
+
+; RUN: opt < %s -loop-reduce -disable-output
+
+
+declare i1 @pred(i32)
+
+define void @test(i8* %PTR) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %INDVAR = phi i32 [ 0, %0 ], [ %INDVAR2, %Loop ] ; <i32> [#uses=2]
+ %STRRED = getelementptr i8* %PTR, i32 %INDVAR ; <i8*> [#uses=1]
+ store i8 0, i8* %STRRED
+ %INDVAR2 = add i32 %INDVAR, 1 ; <i32> [#uses=2]
+ ;; cannot eliminate indvar
+ %cond = call i1 @pred( i32 %INDVAR2 ) ; <i1> [#uses=1]
+ br i1 %cond, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
diff --git a/test/Transforms/LoopStrengthReduce/dont_reverse.ll b/test/Transforms/LoopStrengthReduce/dont_reverse.ll
new file mode 100644
index 0000000..4c5db04
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/dont_reverse.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -loop-reduce -S \
+; RUN: | grep {icmp eq i2 %lsr.iv.next, %xmp4344}
+
+; Don't reverse the iteration if the rhs of the compare is defined
+; inside the loop.
+
+define void @Fill_Buffer(i2* %p) nounwind {
+entry:
+ br label %bb8
+
+bb8:
+ %indvar34 = phi i32 [ 0, %entry ], [ %indvar.next35, %bb8 ]
+ %indvar3451 = trunc i32 %indvar34 to i2
+ %xmp4344 = load i2* %p
+ %xmp104 = icmp eq i2 %indvar3451, %xmp4344
+ %indvar.next35 = add i32 %indvar34, 1
+ br i1 %xmp104, label %bb10, label %bb8
+
+bb10:
+ unreachable
+}
diff --git a/test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll b/test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll
new file mode 100644
index 0000000..abbfda6
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll
@@ -0,0 +1,21 @@
+; Make sure that the compare instruction occurs after the increment to avoid
+; having overlapping live ranges that result in copies. We want the setcc
+; instruction immediately before the conditional branch.
+;
+; RUN: opt -S -loop-reduce %s | FileCheck %s
+
+define void @foo(float* %D, i32 %E) {
+entry:
+ br label %no_exit
+no_exit: ; preds = %no_exit, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %no_exit ] ; <i32> [#uses=1]
+ volatile store float 0.000000e+00, float* %D
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+; CHECK: icmp
+; CHECK-NEXT: br i1
+ %exitcond = icmp eq i32 %indvar.next, %E ; <i1> [#uses=1]
+ br i1 %exitcond, label %loopexit, label %no_exit
+loopexit: ; preds = %no_exit
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/invariant_value_first.ll b/test/Transforms/LoopStrengthReduce/invariant_value_first.ll
new file mode 100644
index 0000000..f86638b
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/invariant_value_first.ll
@@ -0,0 +1,23 @@
+; Check that the index of 'P[outer]' is pulled out of the loop.
+; RUN: opt < %s -loop-reduce -S | \
+; RUN: not grep {getelementptr.*%outer.*%INDVAR}
+
+declare i1 @pred()
+
+declare i32 @foo()
+
+define void @test([10000 x i32]* %P) {
+; <label>:0
+ %outer = call i32 @foo( ) ; <i32> [#uses=1]
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %INDVAR = phi i32 [ 0, %0 ], [ %INDVAR2, %Loop ] ; <i32> [#uses=2]
+ %STRRED = getelementptr [10000 x i32]* %P, i32 %outer, i32 %INDVAR ; <i32*> [#uses=1]
+ store i32 0, i32* %STRRED
+ %INDVAR2 = add i32 %INDVAR, 1 ; <i32> [#uses=1]
+ %cond = call i1 @pred( ) ; <i1> [#uses=1]
+ br i1 %cond, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/invariant_value_first_arg.ll b/test/Transforms/LoopStrengthReduce/invariant_value_first_arg.ll
new file mode 100644
index 0000000..37acf0f
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/invariant_value_first_arg.ll
@@ -0,0 +1,20 @@
+; Check that the index of 'P[outer]' is pulled out of the loop.
+; RUN: opt < %s -loop-reduce -S | \
+; RUN: not grep {getelementptr.*%outer.*%INDVAR}
+
+declare i1 @pred()
+
+define void @test([10000 x i32]* %P, i32 %outer) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %INDVAR = phi i32 [ 0, %0 ], [ %INDVAR2, %Loop ] ; <i32> [#uses=2]
+ %STRRED = getelementptr [10000 x i32]* %P, i32 %outer, i32 %INDVAR ; <i32*> [#uses=1]
+ store i32 0, i32* %STRRED
+ %INDVAR2 = add i32 %INDVAR, 1 ; <i32> [#uses=1]
+ %cond = call i1 @pred( ) ; <i1> [#uses=1]
+ br i1 %cond, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/nested-reduce.ll b/test/Transforms/LoopStrengthReduce/nested-reduce.ll
new file mode 100644
index 0000000..58b8d3e
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/nested-reduce.ll
@@ -0,0 +1,49 @@
+; RUN: opt < %s -loop-reduce -S | not grep mul
+
+; Make sure we don't get a multiply by 6 in this loop.
+
+define i32 @foo(i32 %A, i32 %B, i32 %C, i32 %D) {
+entry:
+ %tmp.5 = icmp sgt i32 %C, 0 ; <i1> [#uses=1]
+ %tmp.25 = and i32 %A, 1 ; <i32> [#uses=1]
+ br label %loopentry.1
+loopentry.1: ; preds = %loopexit.1, %entry
+ %indvar20 = phi i32 [ 0, %entry ], [ %indvar.next21, %loopexit.1 ] ; <i32> [#uses=2]
+ %k.1 = phi i32 [ 0, %entry ], [ %k.1.3, %loopexit.1 ] ; <i32> [#uses=2]
+ br i1 %tmp.5, label %no_exit.1.preheader, label %loopexit.1
+no_exit.1.preheader: ; preds = %loopentry.1
+ %i.0.0 = bitcast i32 %indvar20 to i32 ; <i32> [#uses=1]
+ %tmp.9 = mul i32 %i.0.0, 6 ; <i32> [#uses=1]
+ br label %no_exit.1.outer
+no_exit.1.outer: ; preds = %cond_true, %no_exit.1.preheader
+ %k.1.2.ph = phi i32 [ %k.1, %no_exit.1.preheader ], [ %k.09, %cond_true ] ; <i32> [#uses=2]
+ %j.1.2.ph = phi i32 [ 0, %no_exit.1.preheader ], [ %inc.1, %cond_true ] ; <i32> [#uses=1]
+ br label %no_exit.1
+no_exit.1: ; preds = %cond_continue, %no_exit.1.outer
+ %indvar.ui = phi i32 [ 0, %no_exit.1.outer ], [ %indvar.next, %cond_continue ] ; <i32> [#uses=2]
+ %indvar = bitcast i32 %indvar.ui to i32 ; <i32> [#uses=1]
+ %j.1.2 = add i32 %indvar, %j.1.2.ph ; <i32> [#uses=2]
+ %tmp.11 = add i32 %j.1.2, %tmp.9 ; <i32> [#uses=1]
+ %tmp.12 = trunc i32 %tmp.11 to i8 ; <i8> [#uses=1]
+ %shift.upgrd.1 = zext i8 %tmp.12 to i32 ; <i32> [#uses=1]
+ %tmp.13 = shl i32 %D, %shift.upgrd.1 ; <i32> [#uses=2]
+ %tmp.15 = icmp eq i32 %tmp.13, %B ; <i1> [#uses=1]
+ %inc.1 = add i32 %j.1.2, 1 ; <i32> [#uses=3]
+ br i1 %tmp.15, label %cond_true, label %cond_continue
+cond_true: ; preds = %no_exit.1
+ %tmp.26 = and i32 %tmp.25, %tmp.13 ; <i32> [#uses=1]
+ %k.09 = add i32 %tmp.26, %k.1.2.ph ; <i32> [#uses=2]
+ %tmp.517 = icmp slt i32 %inc.1, %C ; <i1> [#uses=1]
+ br i1 %tmp.517, label %no_exit.1.outer, label %loopexit.1
+cond_continue: ; preds = %no_exit.1
+ %tmp.519 = icmp slt i32 %inc.1, %C ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar.ui, 1 ; <i32> [#uses=1]
+ br i1 %tmp.519, label %no_exit.1, label %loopexit.1
+loopexit.1: ; preds = %cond_continue, %cond_true, %loopentry.1
+ %k.1.3 = phi i32 [ %k.1, %loopentry.1 ], [ %k.09, %cond_true ], [ %k.1.2.ph, %cond_continue ] ; <i32> [#uses=2]
+ %indvar.next21 = add i32 %indvar20, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next21, 4 ; <i1> [#uses=1]
+ br i1 %exitcond, label %loopexit.0, label %loopentry.1
+loopexit.0: ; preds = %loopexit.1
+ ret i32 %k.1.3
+}
diff --git a/test/Transforms/LoopStrengthReduce/ops_after_indvar.ll b/test/Transforms/LoopStrengthReduce/ops_after_indvar.ll
new file mode 100644
index 0000000..a032cc9
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/ops_after_indvar.ll
@@ -0,0 +1,24 @@
+; Check that this test makes INDVAR and related stuff dead, because P[indvar]
+; gets reduced, making INDVAR dead.
+
+; RUN: opt < %s -loop-reduce -S | not grep INDVAR
+
+declare i1 @pred()
+
+declare i32 @getidx()
+
+define void @test([10000 x i32]* %P) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %INDVAR = phi i32 [ 0, %0 ], [ %INDVAR2, %Loop ] ; <i32> [#uses=2]
+ %idx = call i32 @getidx( ) ; <i32> [#uses=1]
+ %STRRED = getelementptr [10000 x i32]* %P, i32 %INDVAR, i32 %idx ; <i32*> [#uses=1]
+ store i32 0, i32* %STRRED
+ %INDVAR2 = add i32 %INDVAR, 1 ; <i32> [#uses=1]
+ %cond = call i1 @pred( ) ; <i1> [#uses=1]
+ br i1 %cond, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/phi_node_update_multiple_preds.ll b/test/Transforms/LoopStrengthReduce/phi_node_update_multiple_preds.ll
new file mode 100644
index 0000000..7ef494d
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/phi_node_update_multiple_preds.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -loop-reduce -disable-output
+; LSR should not crash on this.
+
+define fastcc void @loadloop() {
+entry:
+ switch i8 0, label %shortcirc_next [
+ i8 32, label %loopexit.2
+ i8 59, label %loopexit.2
+ ]
+shortcirc_next: ; preds = %no_exit.2, %entry
+ %indvar37 = phi i32 [ 0, %entry ], [ %indvar.next38, %no_exit.2 ] ; <i32> [#uses=3]
+ %gep.upgrd.1 = zext i32 %indvar37 to i64 ; <i64> [#uses=1]
+ %wp.2.4 = getelementptr i8* null, i64 %gep.upgrd.1 ; <i8*> [#uses=1]
+ br i1 false, label %loopexit.2, label %no_exit.2
+no_exit.2: ; preds = %shortcirc_next
+ %wp.2.4.rec = bitcast i32 %indvar37 to i32 ; <i32> [#uses=1]
+ %inc.1.rec = add i32 %wp.2.4.rec, 1 ; <i32> [#uses=1]
+ %inc.1 = getelementptr i8* null, i32 %inc.1.rec ; <i8*> [#uses=2]
+ %indvar.next38 = add i32 %indvar37, 1 ; <i32> [#uses=1]
+ switch i8 0, label %shortcirc_next [
+ i8 32, label %loopexit.2
+ i8 59, label %loopexit.2
+ ]
+loopexit.2: ; preds = %no_exit.2, %no_exit.2, %shortcirc_next, %entry, %entry
+ %wp.2.7 = phi i8* [ null, %entry ], [ null, %entry ], [ %wp.2.4, %shortcirc_next ], [ %inc.1, %no_exit.2 ], [ %inc.1, %no_exit.2 ] ; <i8*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/pr2537.ll b/test/Transforms/LoopStrengthReduce/pr2537.ll
new file mode 100644
index 0000000..73c3152
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/pr2537.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -loop-reduce -disable-output
+; PR 2537
+
+define void @a() {
+entry:
+ br label %dobody
+
+dobody: ; preds = %dobody, %entry
+ %y.0 = phi i128 [ 0, %entry ], [ %add, %dobody ]
+ %x.0 = phi i128 [ 0, %entry ], [ %add2, %dobody ]
+ %add = add i128 %y.0, shl (i128 1, i128 64)
+ %add2 = add i128 %x.0, shl (i128 1, i128 48)
+ call void @b( i128 %add )
+ %cmp = icmp ult i128 %add2, shl (i128 1, i128 64)
+ br i1 %cmp, label %dobody, label %afterdo
+
+afterdo: ; preds = %dobody
+ ret void
+}
+
+declare void @b(i128 %add)
\ No newline at end of file
diff --git a/test/Transforms/LoopStrengthReduce/pr2570.ll b/test/Transforms/LoopStrengthReduce/pr2570.ll
new file mode 100644
index 0000000..aafd24e
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/pr2570.ll
@@ -0,0 +1,287 @@
+; RUN: opt < %s -loop-reduce -S | grep {phi\\>} | count 10
+; PR2570
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+@g_14 = internal global i32 1 ; <i32*> [#uses=1]
+@g_39 = internal global i16 -5 ; <i16*> [#uses=2]
+@g_43 = internal global i32 -6 ; <i32*> [#uses=3]
+@g_33 = internal global i32 -1269044541 ; <i32*> [#uses=1]
+@g_137 = internal global i32 8 ; <i32*> [#uses=1]
+@g_82 = internal global i32 -5 ; <i32*> [#uses=3]
+@g_91 = internal global i32 1 ; <i32*> [#uses=1]
+@g_197 = internal global i32 1 ; <i32*> [#uses=4]
+@g_207 = internal global i32 1 ; <i32*> [#uses=2]
+@g_222 = internal global i16 4165 ; <i16*> [#uses=1]
+@g_247 = internal global i8 -21 ; <i8*> [#uses=2]
+@g_260 = internal global i32 1 ; <i32*> [#uses=2]
+@g_221 = internal global i16 -17503 ; <i16*> [#uses=3]
+@g_267 = internal global i16 1 ; <i16*> [#uses=1]
[email protected] = appending global [1 x i8*] [ i8* bitcast (i32 (i32, i32, i16, i32, i8, i32)* @func_44 to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
+
+define i32 @func_44(i32 %p_45, i32 %p_46, i16 zeroext %p_48, i32 %p_49, i8 zeroext %p_50, i32 %p_52) nounwind {
+entry:
+ tail call i32 @func_116( i8 zeroext 2 ) nounwind ; <i32>:0 [#uses=0]
+ tail call i32 @func_63( i16 signext 2 ) nounwind ; <i32>:1 [#uses=1]
+ load i16* @g_39, align 2 ; <i16>:2 [#uses=1]
+ tail call i32 @func_63( i16 signext %2 ) nounwind ; <i32>:3 [#uses=1]
+ trunc i32 %3 to i16 ; <i16>:4 [#uses=1]
+ and i16 %4, 1 ; <i16>:5 [#uses=1]
+ trunc i32 %p_52 to i8 ; <i8>:6 [#uses=1]
+ trunc i32 %1 to i16 ; <i16>:7 [#uses=1]
+ tail call i32 @func_74( i16 zeroext %5, i8 zeroext %6, i16 zeroext %7, i16 zeroext 0 ) nounwind ; <i32>:8 [#uses=0]
+ tail call i32 @func_124( i32 544824386 ) nounwind ; <i32>:9 [#uses=0]
+ zext i8 %p_50 to i32 ; <i32>:10 [#uses=1]
+ load i32* @g_43, align 4 ; <i32>:11 [#uses=1]
+ icmp sle i32 %10, %11 ; <i1>:12 [#uses=1]
+ zext i1 %12 to i32 ; <i32>:13 [#uses=2]
+ load i8* @g_247, align 1 ; <i8>:14 [#uses=1]
+ trunc i32 %p_45 to i16 ; <i16>:15 [#uses=1]
+ zext i8 %14 to i16 ; <i16>:16 [#uses=1]
+ tail call i32 @func_74( i16 zeroext %15, i8 zeroext 0, i16 zeroext %16, i16 zeroext 23618 ) nounwind ; <i32>:17 [#uses=4]
+ icmp slt i32 %17, 0 ; <i1>:18 [#uses=1]
+ br i1 %18, label %bb162, label %bb152
+
+bb152: ; preds = %entry
+ lshr i32 2147483647, %13 ; <i32>:19 [#uses=1]
+ icmp slt i32 %19, %17 ; <i1>:20 [#uses=1]
+ select i1 %20, i32 0, i32 %13 ; <i32>:21 [#uses=1]
+ %.348 = shl i32 %17, %21 ; <i32> [#uses=1]
+ br label %bb162
+
+bb162: ; preds = %bb152, %entry
+ %.0346 = phi i32 [ %.348, %bb152 ], [ %17, %entry ] ; <i32> [#uses=1]
+ tail call i32 @func_124( i32 1 ) nounwind ; <i32>:22 [#uses=1]
+ mul i32 %22, %.0346 ; <i32>:23 [#uses=1]
+ icmp slt i32 %p_45, 0 ; <i1>:24 [#uses=1]
+ icmp ugt i32 %p_45, 31 ; <i1>:25 [#uses=1]
+ %or.cond = or i1 %24, %25 ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb172, label %bb168
+
+bb168: ; preds = %bb162
+ lshr i32 2147483647, %p_45 ; <i32>:26 [#uses=1]
+ shl i32 1392859848, %p_45 ; <i32>:27 [#uses=1]
+ icmp slt i32 %26, 1392859848 ; <i1>:28 [#uses=1]
+ %.op355 = add i32 %27, 38978 ; <i32> [#uses=1]
+ %phitmp = select i1 %28, i32 1392898826, i32 %.op355 ; <i32> [#uses=1]
+ br label %bb172
+
+bb172: ; preds = %bb168, %bb162
+ %.0343 = phi i32 [ %phitmp, %bb168 ], [ 1392898826, %bb162 ] ; <i32> [#uses=2]
+ tail call i32 @func_84( i32 1, i16 zeroext 0, i16 zeroext 8 ) nounwind ; <i32>:29 [#uses=0]
+ icmp eq i32 %.0343, 0 ; <i1>:30 [#uses=1]
+ %.0341 = select i1 %30, i32 1, i32 %.0343 ; <i32> [#uses=1]
+ urem i32 %23, %.0341 ; <i32>:31 [#uses=1]
+ load i32* @g_137, align 4 ; <i32>:32 [#uses=4]
+ icmp slt i32 %32, 0 ; <i1>:33 [#uses=1]
+ br i1 %33, label %bb202, label %bb198
+
+bb198: ; preds = %bb172
+ %not. = icmp slt i32 %32, 1073741824 ; <i1> [#uses=1]
+ zext i1 %not. to i32 ; <i32>:34 [#uses=1]
+ %.351 = shl i32 %32, %34 ; <i32> [#uses=1]
+ br label %bb202
+
+bb202: ; preds = %bb198, %bb172
+ %.0335 = phi i32 [ %.351, %bb198 ], [ %32, %bb172 ] ; <i32> [#uses=1]
+ icmp ne i32 %31, %.0335 ; <i1>:35 [#uses=1]
+ zext i1 %35 to i32 ; <i32>:36 [#uses=1]
+ tail call i32 @func_128( i32 %36 ) nounwind ; <i32>:37 [#uses=0]
+ icmp eq i32 %p_45, 293685862 ; <i1>:38 [#uses=1]
+ br i1 %38, label %bb205, label %bb311
+
+bb205: ; preds = %bb202
+ icmp sgt i32 %p_46, 214 ; <i1>:39 [#uses=1]
+ zext i1 %39 to i32 ; <i32>:40 [#uses=2]
+ tail call i32 @func_128( i32 %40 ) nounwind ; <i32>:41 [#uses=0]
+ icmp sgt i32 %p_46, 65532 ; <i1>:42 [#uses=1]
+ zext i1 %42 to i16 ; <i16>:43 [#uses=1]
+ tail call i32 @func_74( i16 zeroext 23618, i8 zeroext -29, i16 zeroext %43, i16 zeroext 1 ) nounwind ; <i32>:44 [#uses=2]
+ tail call i32 @func_103( i16 zeroext -869 ) nounwind ; <i32>:45 [#uses=0]
+ udiv i32 %44, 34162 ; <i32>:46 [#uses=1]
+ icmp ult i32 %44, 34162 ; <i1>:47 [#uses=1]
+ %.0331 = select i1 %47, i32 1, i32 %46 ; <i32> [#uses=1]
+ urem i32 293685862, %.0331 ; <i32>:48 [#uses=1]
+ tail call i32 @func_112( i32 %p_52, i16 zeroext 1 ) nounwind ; <i32>:49 [#uses=0]
+ icmp eq i32 %p_52, 0 ; <i1>:50 [#uses=2]
+ br i1 %50, label %bb222, label %bb215
+
+bb215: ; preds = %bb205
+ zext i16 %p_48 to i32 ; <i32>:51 [#uses=1]
+ icmp eq i16 %p_48, 0 ; <i1>:52 [#uses=1]
+ %.0329 = select i1 %52, i32 1, i32 %51 ; <i32> [#uses=1]
+ udiv i32 -1, %.0329 ; <i32>:53 [#uses=1]
+ icmp eq i32 %53, 0 ; <i1>:54 [#uses=1]
+ br i1 %54, label %bb222, label %bb223
+
+bb222: ; preds = %bb215, %bb205
+ br label %bb223
+
+bb223: ; preds = %bb222, %bb215
+ %iftmp.437.0 = phi i32 [ 0, %bb222 ], [ 1, %bb215 ] ; <i32> [#uses=1]
+ load i32* @g_91, align 4 ; <i32>:55 [#uses=3]
+ tail call i32 @func_103( i16 zeroext 4 ) nounwind ; <i32>:56 [#uses=0]
+ tail call i32 @func_112( i32 0, i16 zeroext -31374 ) nounwind ; <i32>:57 [#uses=0]
+ load i32* @g_197, align 4 ; <i32>:58 [#uses=1]
+ tail call i32 @func_124( i32 28156 ) nounwind ; <i32>:59 [#uses=1]
+ load i32* @g_260, align 4 ; <i32>:60 [#uses=1]
+ load i32* @g_43, align 4 ; <i32>:61 [#uses=1]
+ xor i32 %61, %60 ; <i32>:62 [#uses=1]
+ mul i32 %62, %59 ; <i32>:63 [#uses=1]
+ trunc i32 %63 to i8 ; <i8>:64 [#uses=1]
+ trunc i32 %58 to i16 ; <i16>:65 [#uses=1]
+ tail call i32 @func_74( i16 zeroext 0, i8 zeroext %64, i16 zeroext %65, i16 zeroext 0 ) nounwind ; <i32>:66 [#uses=2]
+ icmp slt i32 %66, 0 ; <i1>:67 [#uses=1]
+ icmp slt i32 %55, 0 ; <i1>:68 [#uses=1]
+ icmp ugt i32 %55, 31 ; <i1>:69 [#uses=1]
+ or i1 %68, %69 ; <i1>:70 [#uses=1]
+ %or.cond352 = or i1 %70, %67 ; <i1> [#uses=1]
+ select i1 %or.cond352, i32 0, i32 %55 ; <i32>:71 [#uses=1]
+ %.353 = ashr i32 %66, %71 ; <i32> [#uses=2]
+ load i16* @g_221, align 2 ; <i16>:72 [#uses=1]
+ zext i16 %72 to i32 ; <i32>:73 [#uses=1]
+ icmp ugt i32 %.353, 31 ; <i1>:74 [#uses=1]
+ select i1 %74, i32 0, i32 %.353 ; <i32>:75 [#uses=1]
+ %.0323 = lshr i32 %73, %75 ; <i32> [#uses=1]
+ add i32 %.0323, %iftmp.437.0 ; <i32>:76 [#uses=1]
+ and i32 %48, 255 ; <i32>:77 [#uses=2]
+ add i32 %77, 2042556439 ; <i32>:78 [#uses=1]
+ load i32* @g_207, align 4 ; <i32>:79 [#uses=2]
+ icmp ugt i32 %79, 31 ; <i1>:80 [#uses=1]
+ select i1 %80, i32 0, i32 %79 ; <i32>:81 [#uses=1]
+ %.0320 = lshr i32 %77, %81 ; <i32> [#uses=1]
+ icmp ne i32 %78, %.0320 ; <i1>:82 [#uses=1]
+ zext i1 %82 to i8 ; <i8>:83 [#uses=1]
+ tail call i32 @func_25( i8 zeroext %83 ) nounwind ; <i32>:84 [#uses=1]
+ xor i32 %84, 1 ; <i32>:85 [#uses=1]
+ load i32* @g_197, align 4 ; <i32>:86 [#uses=1]
+ add i32 %86, 1 ; <i32>:87 [#uses=1]
+ add i32 %87, %85 ; <i32>:88 [#uses=1]
+ icmp ugt i32 %76, %88 ; <i1>:89 [#uses=1]
+ br i1 %89, label %bb241, label %bb311
+
+bb241: ; preds = %bb223
+ store i16 -9, i16* @g_221, align 2
+ udiv i32 %p_52, 1538244727 ; <i32>:90 [#uses=1]
+ load i32* @g_207, align 4 ; <i32>:91 [#uses=1]
+ sub i32 %91, %90 ; <i32>:92 [#uses=1]
+ load i32* @g_14, align 4 ; <i32>:93 [#uses=1]
+ trunc i32 %93 to i16 ; <i16>:94 [#uses=1]
+ trunc i32 %p_46 to i16 ; <i16>:95 [#uses=2]
+ sub i16 %94, %95 ; <i16>:96 [#uses=1]
+ load i32* @g_197, align 4 ; <i32>:97 [#uses=1]
+ trunc i32 %97 to i16 ; <i16>:98 [#uses=1]
+ tail call i32 @func_55( i32 -346178830, i16 zeroext %98, i16 zeroext %95 ) nounwind ; <i32>:99 [#uses=0]
+ zext i16 %p_48 to i32 ; <i32>:100 [#uses=1]
+ load i8* @g_247, align 1 ; <i8>:101 [#uses=1]
+ zext i8 %101 to i32 ; <i32>:102 [#uses=1]
+ sub i32 %100, %102 ; <i32>:103 [#uses=1]
+ tail call i32 @func_55( i32 %103, i16 zeroext -2972, i16 zeroext %96 ) nounwind ; <i32>:104 [#uses=0]
+ xor i32 %92, 2968 ; <i32>:105 [#uses=1]
+ load i32* @g_197, align 4 ; <i32>:106 [#uses=1]
+ icmp ugt i32 %105, %106 ; <i1>:107 [#uses=1]
+ zext i1 %107 to i32 ; <i32>:108 [#uses=1]
+ store i32 %108, i32* @g_33, align 4
+ br label %bb248
+
+bb248: ; preds = %bb284, %bb241
+ %p_49_addr.1.reg2mem.0 = phi i32 [ 0, %bb241 ], [ %134, %bb284 ] ; <i32> [#uses=2]
+ %p_48_addr.2.reg2mem.0 = phi i16 [ %p_48, %bb241 ], [ %p_48_addr.1, %bb284 ] ; <i16> [#uses=1]
+ %p_46_addr.1.reg2mem.0 = phi i32 [ %p_46, %bb241 ], [ %133, %bb284 ] ; <i32> [#uses=1]
+ %p_45_addr.1.reg2mem.0 = phi i32 [ %p_45, %bb241 ], [ %p_45_addr.0, %bb284 ] ; <i32> [#uses=2]
+ tail call i32 @func_63( i16 signext 1 ) nounwind ; <i32>:109 [#uses=1]
+ icmp eq i32 %109, 0 ; <i1>:110 [#uses=1]
+ br i1 %110, label %bb272.thread, label %bb255.thread
+
+bb272.thread: ; preds = %bb248
+ store i32 1, i32* @g_82
+ load i16* @g_267, align 2 ; <i16>:111 [#uses=1]
+ icmp eq i16 %111, 0 ; <i1>:112 [#uses=1]
+ br i1 %112, label %bb311.loopexit.split, label %bb268
+
+bb255.thread: ; preds = %bb248
+ load i32* @g_260, align 4 ; <i32>:113 [#uses=1]
+ sub i32 %113, %p_52 ; <i32>:114 [#uses=1]
+ and i32 %114, -20753 ; <i32>:115 [#uses=1]
+ icmp ne i32 %115, 0 ; <i1>:116 [#uses=1]
+ zext i1 %116 to i16 ; <i16>:117 [#uses=1]
+ store i16 %117, i16* @g_221, align 2
+ br label %bb284
+
+bb268: ; preds = %bb268, %bb272.thread
+ %indvar = phi i32 [ 0, %bb272.thread ], [ %g_82.tmp.0, %bb268 ] ; <i32> [#uses=2]
+ %p_46_addr.0.reg2mem.0 = phi i32 [ %p_46_addr.1.reg2mem.0, %bb272.thread ], [ %119, %bb268 ] ; <i32> [#uses=1]
+ %g_82.tmp.0 = add i32 %indvar, 1 ; <i32> [#uses=2]
+ trunc i32 %p_46_addr.0.reg2mem.0 to i16 ; <i16>:118 [#uses=1]
+ and i32 %g_82.tmp.0, 28156 ; <i32>:119 [#uses=1]
+ add i32 %indvar, 2 ; <i32>:120 [#uses=4]
+ icmp sgt i32 %120, -1 ; <i1>:121 [#uses=1]
+ br i1 %121, label %bb268, label %bb274.split
+
+bb274.split: ; preds = %bb268
+ store i32 %120, i32* @g_82
+ br i1 %50, label %bb279, label %bb276
+
+bb276: ; preds = %bb274.split
+ store i16 0, i16* @g_222, align 2
+ br label %bb284
+
+bb279: ; preds = %bb274.split
+ icmp eq i32 %120, 0 ; <i1>:122 [#uses=1]
+ %.0317 = select i1 %122, i32 1, i32 %120 ; <i32> [#uses=1]
+ udiv i32 -8, %.0317 ; <i32>:123 [#uses=1]
+ trunc i32 %123 to i16 ; <i16>:124 [#uses=1]
+ br label %bb284
+
+bb284: ; preds = %bb279, %bb276, %bb255.thread
+ %p_49_addr.0 = phi i32 [ %p_49_addr.1.reg2mem.0, %bb279 ], [ %p_49_addr.1.reg2mem.0, %bb276 ], [ 0, %bb255.thread ] ; <i32> [#uses=1]
+ %p_48_addr.1 = phi i16 [ %124, %bb279 ], [ %118, %bb276 ], [ %p_48_addr.2.reg2mem.0, %bb255.thread ] ; <i16> [#uses=1]
+ %p_45_addr.0 = phi i32 [ %p_45_addr.1.reg2mem.0, %bb279 ], [ %p_45_addr.1.reg2mem.0, %bb276 ], [ 8, %bb255.thread ] ; <i32> [#uses=3]
+ load i32* @g_43, align 4 ; <i32>:125 [#uses=1]
+ trunc i32 %125 to i8 ; <i8>:126 [#uses=1]
+ tail call i32 @func_116( i8 zeroext %126 ) nounwind ; <i32>:127 [#uses=0]
+ lshr i32 65255, %p_45_addr.0 ; <i32>:128 [#uses=1]
+ icmp ugt i32 %p_45_addr.0, 31 ; <i1>:129 [#uses=1]
+ %.op = lshr i32 %128, 31 ; <i32> [#uses=1]
+ %.op.op = xor i32 %.op, 1 ; <i32> [#uses=1]
+ %.354..lobit.not = select i1 %129, i32 1, i32 %.op.op ; <i32> [#uses=1]
+ load i16* @g_39, align 2 ; <i16>:130 [#uses=1]
+ zext i16 %130 to i32 ; <i32>:131 [#uses=1]
+ icmp slt i32 %.354..lobit.not, %131 ; <i1>:132 [#uses=1]
+ zext i1 %132 to i32 ; <i32>:133 [#uses=1]
+ add i32 %p_49_addr.0, 1 ; <i32>:134 [#uses=2]
+ icmp sgt i32 %134, -1 ; <i1>:135 [#uses=1]
+ br i1 %135, label %bb248, label %bb307
+
+bb307: ; preds = %bb284
+ tail call i32 @func_103( i16 zeroext 0 ) nounwind ; <i32>:136 [#uses=0]
+ ret i32 %40
+
+bb311.loopexit.split: ; preds = %bb272.thread
+ store i32 1, i32* @g_82
+ ret i32 1
+
+bb311: ; preds = %bb223, %bb202
+ %.0 = phi i32 [ 1, %bb202 ], [ 0, %bb223 ] ; <i32> [#uses=1]
+ ret i32 %.0
+}
+
+declare i32 @func_25(i8 zeroext ) nounwind
+
+declare i32 @func_55(i32, i16 zeroext , i16 zeroext ) nounwind
+
+declare i32 @func_63(i16 signext ) nounwind
+
+declare i32 @func_74(i16 zeroext , i8 zeroext , i16 zeroext , i16 zeroext ) nounwind
+
+declare i32 @func_84(i32, i16 zeroext , i16 zeroext ) nounwind
+
+declare i32 @func_103(i16 zeroext ) nounwind
+
+declare i32 @func_124(i32) nounwind
+
+declare i32 @func_128(i32) nounwind
+
+declare i32 @func_116(i8 zeroext ) nounwind
+
+declare i32 @func_112(i32, i16 zeroext ) nounwind
diff --git a/test/Transforms/LoopStrengthReduce/pr3086.ll b/test/Transforms/LoopStrengthReduce/pr3086.ll
new file mode 100644
index 0000000..599633a
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/pr3086.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -loop-reduce
+; RUN: opt < %s -analyze -scalar-evolution
+; PR 3086
+
+ %struct.Cls = type { i32, i8, [2 x %struct.Cls*], [2 x %struct.Lit*] }
+ %struct.Lit = type { i8 }
+
+define fastcc i64 @collect_clauses() nounwind {
+entry:
+ br label %bb11
+
+bb5: ; preds = %bb9
+ %0 = load %struct.Lit** %storemerge, align 8 ; <%struct.Lit*> [#uses=0]
+ %indvar.next8 = add i64 %storemerge.rec, 1 ; <i64> [#uses=1]
+ br label %bb9
+
+bb9: ; preds = %bb22, %bb5
+ %storemerge.rec = phi i64 [ %indvar.next8, %bb5 ], [ 0, %bb22 ] ; <i64> [#uses=2]
+ %storemerge = getelementptr %struct.Lit** null, i64 %storemerge.rec ; <%struct.Lit**> [#uses=2]
+ %1 = icmp ugt %struct.Lit** null, %storemerge ; <i1> [#uses=1]
+ br i1 %1, label %bb5, label %bb22
+
+bb11: ; preds = %bb22, %entry
+ %2 = load %struct.Cls** null, align 8 ; <%struct.Cls*> [#uses=0]
+ br label %bb22
+
+bb22: ; preds = %bb11, %bb9
+ br i1 false, label %bb11, label %bb9
+}
diff --git a/test/Transforms/LoopStrengthReduce/pr3399.ll b/test/Transforms/LoopStrengthReduce/pr3399.ll
new file mode 100644
index 0000000..b809007
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/pr3399.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -loop-reduce | llvm-dis
+; PR3399
+
+@g_53 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @foo() nounwind {
+bb5.thread:
+ br label %bb
+
+bb: ; preds = %bb5, %bb5.thread
+ %indvar = phi i32 [ 0, %bb5.thread ], [ %indvar.next, %bb5 ] ; <i32> [#uses=2]
+ br i1 false, label %bb5, label %bb1
+
+bb1: ; preds = %bb
+ %l_2.0.reg2mem.0 = sub i32 0, %indvar ; <i32> [#uses=1]
+ %0 = volatile load i32* @g_53, align 4 ; <i32> [#uses=1]
+ %1 = trunc i32 %l_2.0.reg2mem.0 to i16 ; <i16> [#uses=1]
+ %2 = trunc i32 %0 to i16 ; <i16> [#uses=1]
+ %3 = mul i16 %2, %1 ; <i16> [#uses=1]
+ %4 = icmp eq i16 %3, 0 ; <i1> [#uses=1]
+ br i1 %4, label %bb7, label %bb2
+
+bb2: ; preds = %bb2, %bb1
+ br label %bb2
+
+bb5: ; preds = %bb
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br label %bb
+
+bb7: ; preds = %bb1
+ ret i32 1
+}
diff --git a/test/Transforms/LoopStrengthReduce/pr3571.ll b/test/Transforms/LoopStrengthReduce/pr3571.ll
new file mode 100644
index 0000000..9ad27d5
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/pr3571.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -loop-reduce | llvm-dis
+; PR3571
+
+target triple = "i386-mingw32"
+define void @_ZNK18qdesigner_internal10TreeWidget12drawBranchesEP8QPainterRK5QRectRK11QModelIndex() nounwind {
+entry:
+ br label %_ZNK11QModelIndex7isValidEv.exit.i
+
+bb.i: ; preds = %_ZNK11QModelIndex7isValidEv.exit.i
+ %indvar.next = add i32 %result.0.i, 1 ; <i32> [#uses=1]
+ br label %_ZNK11QModelIndex7isValidEv.exit.i
+
+_ZNK11QModelIndex7isValidEv.exit.i: ; preds = %bb.i, %entry
+ %result.0.i = phi i32 [ 0, %entry ], [ %indvar.next, %bb.i ] ; <i32> [#uses=2]
+ %0 = load i32** null, align 4 ; <%struct.QAbstractItemDelegate*> [#uses=0]
+ br i1 false, label %_ZN18qdesigner_internalL5levelEP18QAbstractItemModelRK11QModelIndex.exit, label %bb.i
+
+_ZN18qdesigner_internalL5levelEP18QAbstractItemModelRK11QModelIndex.exit: ; preds = %_ZNK11QModelIndex7isValidEv.exit.i
+ %1 = call i32 @_ZNK9QTreeView11indentationEv(i32* null) nounwind ; <i32> [#uses=1]
+ %2 = mul i32 %1, %result.0.i ; <i32> [#uses=1]
+ %3 = add i32 %2, -2 ; <i32> [#uses=1]
+ %4 = add i32 %3, 0 ; <i32> [#uses=1]
+ store i32 %4, i32* null, align 8
+ unreachable
+}
+
+declare i32 @_ZNK9QTreeView11indentationEv(i32*)
diff --git a/test/Transforms/LoopStrengthReduce/quadradic-exit-value.ll b/test/Transforms/LoopStrengthReduce/quadradic-exit-value.ll
new file mode 100644
index 0000000..c91f5cd
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/quadradic-exit-value.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -analyze -iv-users | grep {Stride i64 {3,+,2}<%loop>:}
+
+; The value of %r is dependent on a polynomial iteration expression.
+
+define i64 @foo(i64 %n) {
+entry:
+ br label %loop
+
+loop:
+ %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
+ %indvar.next = add i64 %indvar, 1
+ %c = icmp eq i64 %indvar.next, %n
+ br i1 %c, label %exit, label %loop
+
+exit:
+ %r = mul i64 %indvar.next, %indvar.next
+ ret i64 %r
+}
diff --git a/test/Transforms/LoopStrengthReduce/related_indvars.ll b/test/Transforms/LoopStrengthReduce/related_indvars.ll
new file mode 100644
index 0000000..12942bf
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/related_indvars.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -loop-reduce -S | grep phi | count 1
+
+; This should only result in one PHI node!
+
+; void foo(double *D, double *E, double F) {
+; while (D != E)
+; *D++ = F;
+; }
+
+define void @foo(double* %D, double* %E, double %F) nounwind {
+entry:
+ %tmp.24 = icmp eq double* %D, %E ; <i1> [#uses=1]
+ br i1 %tmp.24, label %return, label %no_exit
+no_exit: ; preds = %no_exit, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %no_exit ] ; <i32> [#uses=2]
+ %D_addr.0.0.rec = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
+ %D_addr.0.0 = getelementptr double* %D, i32 %D_addr.0.0.rec ; <double*> [#uses=1]
+ %inc.rec = add i32 %D_addr.0.0.rec, 1 ; <i32> [#uses=1]
+ %inc = getelementptr double* %D, i32 %inc.rec ; <double*> [#uses=1]
+ store double %F, double* %D_addr.0.0
+ %tmp.2 = icmp eq double* %inc, %E ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp.2, label %return, label %no_exit
+return: ; preds = %no_exit, %entry
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/remove_indvar.ll b/test/Transforms/LoopStrengthReduce/remove_indvar.ll
new file mode 100644
index 0000000..53f4b9d
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/remove_indvar.ll
@@ -0,0 +1,19 @@
+; Check that this test makes INDVAR and related stuff dead.
+; RUN: opt < %s -loop-reduce -S | not grep INDVAR
+
+declare i1 @pred()
+
+define void @test(i32* %P) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %INDVAR = phi i32 [ 0, %0 ], [ %INDVAR2, %Loop ] ; <i32> [#uses=2]
+ %STRRED = getelementptr i32* %P, i32 %INDVAR ; <i32*> [#uses=1]
+ store i32 0, i32* %STRRED
+ %INDVAR2 = add i32 %INDVAR, 1 ; <i32> [#uses=1]
+ %cond = call i1 @pred( ) ; <i1> [#uses=1]
+ br i1 %cond, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/share_code_in_preheader.ll b/test/Transforms/LoopStrengthReduce/share_code_in_preheader.ll
new file mode 100644
index 0000000..412a716
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/share_code_in_preheader.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -loop-reduce -S | grep mul | count 1
+; LSR should not make two copies of the Q*L expression in the preheader!
+
+define i8 @test(i8* %A, i8* %B, i32 %L, i32 %Q, i32 %N.s) {
+entry:
+ %tmp.6 = mul i32 %Q, %L ; <i32> [#uses=1]
+ %N = bitcast i32 %N.s to i32 ; <i32> [#uses=1]
+ br label %no_exit
+no_exit: ; preds = %no_exit, %entry
+ %indvar.ui = phi i32 [ 0, %entry ], [ %indvar.next, %no_exit ] ; <i32> [#uses=2]
+ %Sum.0.0 = phi i8 [ 0, %entry ], [ %tmp.21, %no_exit ] ; <i8> [#uses=1]
+ %indvar = bitcast i32 %indvar.ui to i32 ; <i32> [#uses=1]
+ %N_addr.0.0 = sub i32 %N.s, %indvar ; <i32> [#uses=1]
+ %tmp.8 = add i32 %N_addr.0.0, %tmp.6 ; <i32> [#uses=2]
+ %tmp.9 = getelementptr i8* %A, i32 %tmp.8 ; <i8*> [#uses=1]
+ %tmp.10 = load i8* %tmp.9 ; <i8> [#uses=1]
+ %tmp.17 = getelementptr i8* %B, i32 %tmp.8 ; <i8*> [#uses=1]
+ %tmp.18 = load i8* %tmp.17 ; <i8> [#uses=1]
+ %tmp.19 = sub i8 %tmp.10, %tmp.18 ; <i8> [#uses=1]
+ %tmp.21 = add i8 %tmp.19, %Sum.0.0 ; <i8> [#uses=2]
+ %indvar.next = add i32 %indvar.ui, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
+ br i1 %exitcond, label %loopexit, label %no_exit
+loopexit: ; preds = %no_exit
+ ret i8 %tmp.21
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/share_ivs.ll b/test/Transforms/LoopStrengthReduce/share_ivs.ll
new file mode 100644
index 0000000..0459bc8
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/share_ivs.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -loop-reduce -S | grep phi | count 1
+
+; This testcase should have ONE stride 18 indvar, the other use should have a
+; loop invariant value (B) added to it inside of the loop, instead of having
+; a whole indvar based on B for it.
+
+declare i1 @cond(i32)
+
+define void @test(i32 %B) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %IV = phi i32 [ 0, %0 ], [ %IVn, %Loop ] ; <i32> [#uses=3]
+ %C = mul i32 %IV, 18 ; <i32> [#uses=1]
+ %D = mul i32 %IV, 18 ; <i32> [#uses=1]
+ %E = add i32 %D, %B ; <i32> [#uses=1]
+ %cnd = call i1 @cond( i32 %E ) ; <i1> [#uses=1]
+ call i1 @cond( i32 %C ) ; <i1>:1 [#uses=0]
+ %IVn = add i32 %IV, 1 ; <i32> [#uses=1]
+ br i1 %cnd, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/use_postinc_value_outside_loop.ll b/test/Transforms/LoopStrengthReduce/use_postinc_value_outside_loop.ll
new file mode 100644
index 0000000..a99a823
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/use_postinc_value_outside_loop.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -loop-reduce -S | \
+; RUN: grep {add i32 %lsr.iv.next, 1}
+;
+; Make sure that the use of the IV outside of the loop (the store) uses the
+; post incremented value of the IV, not the preincremented value. This
+; prevents the loop from having to keep the post and pre-incremented value
+; around for the duration of the loop, adding a copy and an extra register
+; to the loop.
+
+declare i1 @pred(i32)
+
+define void @test([700 x i32]* %nbeaux_.0__558, i32* %i_.16574) {
+then.0:
+ br label %no_exit.2
+no_exit.2: ; preds = %no_exit.2, %then.0
+ %indvar630.ui = phi i32 [ 0, %then.0 ], [ %indvar.next631, %no_exit.2 ] ; <i32> [#uses=3]
+ %indvar630 = bitcast i32 %indvar630.ui to i32 ; <i32> [#uses=2]
+ %gep.upgrd.1 = zext i32 %indvar630.ui to i64 ; <i64> [#uses=1]
+ %tmp.38 = getelementptr [700 x i32]* %nbeaux_.0__558, i32 0, i64 %gep.upgrd.1 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp.38
+ %inc.2 = add i32 %indvar630, 2 ; <i32> [#uses=1]
+ %tmp.34 = call i1 @pred( i32 %indvar630 ) ; <i1> [#uses=1]
+ %indvar.next631 = add i32 %indvar630.ui, 1 ; <i32> [#uses=1]
+ br i1 %tmp.34, label %no_exit.2, label %loopexit.2.loopexit
+loopexit.2.loopexit: ; preds = %no_exit.2
+ store i32 %inc.2, i32* %i_.16574
+ ret void
+}
+
diff --git a/test/Transforms/LoopStrengthReduce/var_stride_used_by_compare.ll b/test/Transforms/LoopStrengthReduce/var_stride_used_by_compare.ll
new file mode 100644
index 0000000..0a9fab0
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/var_stride_used_by_compare.ll
@@ -0,0 +1,41 @@
+; Base should not be i*3, it should be i*2.
+; RUN: opt < %s -loop-reduce -S | \
+; RUN: not grep {mul.*%i, 3}
+
+; Indvar should not start at zero:
+; RUN: opt < %s -loop-reduce -S | \
+; RUN: not grep {phi i32 .* 0}
+; END.
+
+; mul uint %i, 3
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8"
+@flags2 = external global [8193 x i8], align 32 ; <[8193 x i8]*> [#uses=1]
+
+define void @foo(i32 %k, i32 %i.s) {
+entry:
+ %i = bitcast i32 %i.s to i32 ; <i32> [#uses=2]
+ %k_addr.012 = shl i32 %i.s, 1 ; <i32> [#uses=1]
+ %tmp14 = icmp sgt i32 %k_addr.012, 8192 ; <i1> [#uses=1]
+ br i1 %tmp14, label %return, label %bb.preheader
+bb.preheader: ; preds = %entry
+ %tmp. = shl i32 %i, 1 ; <i32> [#uses=1]
+ br label %bb
+bb: ; preds = %bb, %bb.preheader
+ %indvar = phi i32 [ %indvar.next, %bb ], [ 0, %bb.preheader ] ; <i32> [#uses=2]
+ %tmp.15 = mul i32 %indvar, %i ; <i32> [#uses=1]
+ %tmp.16 = add i32 %tmp.15, %tmp. ; <i32> [#uses=2]
+ %k_addr.0.0 = bitcast i32 %tmp.16 to i32 ; <i32> [#uses=1]
+ %gep.upgrd.1 = zext i32 %tmp.16 to i64 ; <i64> [#uses=1]
+ %tmp = getelementptr [8193 x i8]* @flags2, i32 0, i64 %gep.upgrd.1 ; <i8*> [#uses=1]
+ store i8 0, i8* %tmp
+ %k_addr.0 = add i32 %k_addr.0.0, %i.s ; <i32> [#uses=1]
+ %tmp.upgrd.2 = icmp sgt i32 %k_addr.0, 8192 ; <i1> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ br i1 %tmp.upgrd.2, label %return.loopexit, label %bb
+return.loopexit: ; preds = %bb
+ br label %return
+return: ; preds = %return.loopexit, %entry
+ ret void
+}
diff --git a/test/Transforms/LoopStrengthReduce/variable_stride.ll b/test/Transforms/LoopStrengthReduce/variable_stride.ll
new file mode 100644
index 0000000..7c0f053
--- /dev/null
+++ b/test/Transforms/LoopStrengthReduce/variable_stride.ll
@@ -0,0 +1,18 @@
+; Check that variable strides are reduced to adds instead of multiplies.
+; RUN: opt < %s -loop-reduce -S | not grep mul
+
+declare i1 @pred(i32)
+
+define void @test([10000 x i32]* %P, i32 %STRIDE) {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %INDVAR = phi i32 [ 0, %0 ], [ %INDVAR2, %Loop ] ; <i32> [#uses=2]
+ %Idx = mul i32 %INDVAR, %STRIDE ; <i32> [#uses=1]
+ %cond = call i1 @pred( i32 %Idx ) ; <i1> [#uses=1]
+ %INDVAR2 = add i32 %INDVAR, 1 ; <i32> [#uses=1]
+ br i1 %cond, label %Loop, label %Out
+Out: ; preds = %Loop
+ ret void
+}
+
diff --git a/test/Transforms/LoopUnroll/2004-05-13-DontUnrollTooMuch.ll b/test/Transforms/LoopUnroll/2004-05-13-DontUnrollTooMuch.ll
new file mode 100644
index 0000000..3141bf1
--- /dev/null
+++ b/test/Transforms/LoopUnroll/2004-05-13-DontUnrollTooMuch.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -loop-unroll -disable-output
+
+define i32 @main() {
+entry:
+ br label %no_exit
+no_exit: ; preds = %no_exit, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %no_exit ] ; <i32> [#uses=1]
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
+ %exitcond = icmp ne i32 %indvar.next, -2147483648 ; <i1> [#uses=1]
+ br i1 %exitcond, label %no_exit, label %loopexit
+loopexit: ; preds = %no_exit
+ ret i32 0
+}
+
diff --git a/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll b/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll
new file mode 100644
index 0000000..a26346b
--- /dev/null
+++ b/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -loop-unroll -loopsimplify -disable-output
+
+define void @print_board() {
+entry:
+ br label %no_exit.1
+no_exit.1: ; preds = %cond_false.2, %entry
+ br label %no_exit.2
+no_exit.2: ; preds = %no_exit.2, %no_exit.1
+ %indvar1 = phi i32 [ 0, %no_exit.1 ], [ %indvar.next2, %no_exit.2 ] ; <i32> [#uses=1]
+ %indvar.next2 = add i32 %indvar1, 1 ; <i32> [#uses=2]
+ %exitcond3 = icmp ne i32 %indvar.next2, 7 ; <i1> [#uses=1]
+ br i1 %exitcond3, label %no_exit.2, label %loopexit.2
+loopexit.2: ; preds = %no_exit.2
+ br i1 false, label %cond_true.2, label %cond_false.2
+cond_true.2: ; preds = %loopexit.2
+ ret void
+cond_false.2: ; preds = %loopexit.2
+ br i1 false, label %no_exit.1, label %loopexit.1
+loopexit.1: ; preds = %cond_false.2
+ ret void
+}
+
diff --git a/test/Transforms/LoopUnroll/2006-08-24-MultiBlockLoop.ll b/test/Transforms/LoopUnroll/2006-08-24-MultiBlockLoop.ll
new file mode 100644
index 0000000..8219a0c
--- /dev/null
+++ b/test/Transforms/LoopUnroll/2006-08-24-MultiBlockLoop.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -loop-unroll -S | grep bb72.2
+
+define void @vorbis_encode_noisebias_setup() {
+entry:
+ br label %cond_true.outer
+cond_true.outer: ; preds = %bb72, %entry
+ %indvar1.ph = phi i32 [ 0, %entry ], [ %indvar.next2, %bb72 ] ; <i32> [#uses=1]
+ br label %bb72
+bb72: ; preds = %cond_true.outer
+ %indvar.next2 = add i32 %indvar1.ph, 1 ; <i32> [#uses=2]
+ %exitcond3 = icmp eq i32 %indvar.next2, 3 ; <i1> [#uses=1]
+ br i1 %exitcond3, label %cond_true138, label %cond_true.outer
+cond_true138: ; preds = %bb72
+ ret void
+}
+
diff --git a/test/Transforms/LoopUnroll/2007-04-16-PhiUpdate.ll b/test/Transforms/LoopUnroll/2007-04-16-PhiUpdate.ll
new file mode 100644
index 0000000..40c9ce0
--- /dev/null
+++ b/test/Transforms/LoopUnroll/2007-04-16-PhiUpdate.ll
@@ -0,0 +1,17 @@
+; PR 1334
+; RUN: opt < %s -loop-unroll -disable-output
+
+define void @sal__math_float_manipulator_7__math__joint_array_dcv_ops__Omultiply__3([6 x float]* %agg.result) {
+entry:
+ %tmp282911 = zext i8 0 to i32 ; <i32> [#uses=1]
+ br label %cond_next
+cond_next: ; preds = %cond_next, %entry
+ %indvar = phi i8 [ 0, %entry ], [ %indvar.next, %cond_next ] ; <i8> [#uses=1]
+ %indvar.next = add i8 %indvar, 1 ; <i8> [#uses=2]
+ %exitcond = icmp eq i8 %indvar.next, 7 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb27, label %cond_next
+bb27: ; preds = %cond_next
+ %tmp282911.lcssa = phi i32 [ %tmp282911, %cond_next ] ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/LoopUnroll/2007-05-05-UnrollMiscomp.ll b/test/Transforms/LoopUnroll/2007-05-05-UnrollMiscomp.ll
new file mode 100644
index 0000000..d4c8402
--- /dev/null
+++ b/test/Transforms/LoopUnroll/2007-05-05-UnrollMiscomp.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -loop-unroll -S | not grep undef
+; PR1385
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+ %struct.__mpz_struct = type { i32, i32, i32* }
+
+
+define void @Foo(%struct.__mpz_struct* %base) {
+entry:
+ %want = alloca [1 x %struct.__mpz_struct], align 16 ; <[1 x %struct.__mpz_struct]*> [#uses=4]
+ %want1 = getelementptr [1 x %struct.__mpz_struct]* %want, i32 0, i32 0 ; <%struct.__mpz_struct*> [#uses=1]
+ call void @__gmpz_init( %struct.__mpz_struct* %want1 )
+ %want27 = getelementptr [1 x %struct.__mpz_struct]* %want, i32 0, i32 0 ; <%struct.__mpz_struct*> [#uses=1]
+ %want3 = getelementptr [1 x %struct.__mpz_struct]* %want, i32 0, i32 0 ; <%struct.__mpz_struct*> [#uses=1]
+ %want2 = getelementptr [1 x %struct.__mpz_struct]* %want, i32 0, i32 0 ; <%struct.__mpz_struct*> [#uses=2]
+ br label %bb
+
+bb: ; preds = %bb, %entry
+ %i.01.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=1]
+ %want23.0 = phi %struct.__mpz_struct* [ %want27, %entry ], [ %want2, %bb ] ; <%struct.__mpz_struct*> [#uses=1]
+ call void @__gmpz_mul( %struct.__mpz_struct* %want23.0, %struct.__mpz_struct* %want3, %struct.__mpz_struct* %base )
+ %indvar.next = add i32 %i.01.0, 1 ; <i32> [#uses=2]
+ %exitcond = icmp ne i32 %indvar.next, 2 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb, label %bb10
+
+bb10: ; preds = %bb
+ %want2.lcssa = phi %struct.__mpz_struct* [ %want2, %bb ] ; <%struct.__mpz_struct*> [#uses=1]
+ call void @__gmpz_clear( %struct.__mpz_struct* %want2.lcssa )
+ ret void
+}
+
+declare void @__gmpz_init(%struct.__mpz_struct*)
+declare void @__gmpz_mul(%struct.__mpz_struct*, %struct.__mpz_struct*, %struct.__mpz_struct*)
+declare void @__gmpz_clear(%struct.__mpz_struct*)
+
diff --git a/test/Transforms/LoopUnroll/2007-05-09-UnknownTripCount.ll b/test/Transforms/LoopUnroll/2007-05-09-UnknownTripCount.ll
new file mode 100644
index 0000000..68842a41
--- /dev/null
+++ b/test/Transforms/LoopUnroll/2007-05-09-UnknownTripCount.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -loop-unroll -unroll-count=3 -S | grep bb72.2
+
+define void @foo(i32 %trips) {
+entry:
+ br label %cond_true.outer
+
+cond_true.outer:
+ %indvar1.ph = phi i32 [ 0, %entry ], [ %indvar.next2, %bb72 ]
+ br label %bb72
+
+bb72:
+ %indvar.next2 = add i32 %indvar1.ph, 1
+ %exitcond3 = icmp eq i32 %indvar.next2, %trips
+ br i1 %exitcond3, label %cond_true138, label %cond_true.outer
+
+cond_true138:
+ ret void
+}
diff --git a/test/Transforms/LoopUnroll/2007-11-05-Crash.ll b/test/Transforms/LoopUnroll/2007-11-05-Crash.ll
new file mode 100644
index 0000000..1711f11
--- /dev/null
+++ b/test/Transforms/LoopUnroll/2007-11-05-Crash.ll
@@ -0,0 +1,295 @@
+; RUN: opt < %s -disable-output -loop-unroll
+; PR1770
+; PR1947
+
+ %struct.cl_engine = type { i32, i16, i32, i8**, i8**, i8*, i8*, i8*, i8*, i8*, i8*, i8* }
+ %struct.cl_limits = type { i32, i32, i32, i32, i16, i64 }
+ %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
+ %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }
+ %struct.cli_ac_patt = type { i16*, i16*, i16, i16, i8, i32, i32, i8*, i8*, i32, i16, i16, i16, i16, %struct.cli_ac_alt**, i8, i16, %struct.cli_ac_patt*, %struct.cli_ac_patt* }
+ %struct.cli_bm_patt = type { i8*, i32, i8*, i8*, i8, %struct.cli_bm_patt* }
+ %struct.cli_ctx = type { i8**, i64*, %struct.cli_matcher*, %struct.cl_engine*, %struct.cl_limits*, i32, i32, i32, i32, %struct.cli_dconf* }
+ %struct.cli_dconf = type { i32, i32, i32, i32, i32, i32, i32 }
+ %struct.cli_matcher = type { i16, i8, i32*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
+
+declare i8* @calloc(i64, i64)
+
+define fastcc i32 @cli_scanpe(i32 %desc, %struct.cli_ctx* %ctx) {
+entry:
+ br i1 false, label %cond_next17, label %cond_true14
+
+cond_true14: ; preds = %entry
+ ret i32 0
+
+cond_next17: ; preds = %entry
+ br i1 false, label %LeafBlock, label %LeafBlock1250
+
+LeafBlock1250: ; preds = %cond_next17
+ ret i32 0
+
+LeafBlock: ; preds = %cond_next17
+ br i1 false, label %cond_next33, label %cond_true30
+
+cond_true30: ; preds = %LeafBlock
+ ret i32 0
+
+cond_next33: ; preds = %LeafBlock
+ br i1 false, label %cond_next90, label %cond_true42
+
+cond_true42: ; preds = %cond_next33
+ ret i32 0
+
+cond_next90: ; preds = %cond_next33
+ br i1 false, label %cond_next100, label %cond_true97
+
+cond_true97: ; preds = %cond_next90
+ ret i32 0
+
+cond_next100: ; preds = %cond_next90
+ br i1 false, label %cond_next109, label %cond_true106
+
+cond_true106: ; preds = %cond_next100
+ ret i32 0
+
+cond_next109: ; preds = %cond_next100
+ br i1 false, label %cond_false, label %cond_true118
+
+cond_true118: ; preds = %cond_next109
+ ret i32 0
+
+cond_false: ; preds = %cond_next109
+ br i1 false, label %NodeBlock1482, label %cond_true126
+
+cond_true126: ; preds = %cond_false
+ ret i32 0
+
+NodeBlock1482: ; preds = %cond_false
+ br i1 false, label %cond_next285, label %NodeBlock1480
+
+NodeBlock1480: ; preds = %NodeBlock1482
+ ret i32 0
+
+cond_next285: ; preds = %NodeBlock1482
+ br i1 false, label %cond_next320, label %cond_true294
+
+cond_true294: ; preds = %cond_next285
+ ret i32 0
+
+cond_next320: ; preds = %cond_next285
+ br i1 false, label %LeafBlock1491, label %LeafBlock1493
+
+LeafBlock1493: ; preds = %cond_next320
+ ret i32 0
+
+LeafBlock1491: ; preds = %cond_next320
+ br i1 false, label %cond_true400, label %cond_true378
+
+cond_true378: ; preds = %LeafBlock1491
+ ret i32 1
+
+cond_true400: ; preds = %LeafBlock1491
+ br i1 false, label %cond_next413, label %cond_true406
+
+cond_true406: ; preds = %cond_true400
+ ret i32 0
+
+cond_next413: ; preds = %cond_true400
+ br i1 false, label %cond_next429, label %cond_true424
+
+cond_true424: ; preds = %cond_next413
+ ret i32 0
+
+cond_next429: ; preds = %cond_next413
+ br i1 false, label %NodeBlock1557, label %NodeBlock1579
+
+NodeBlock1579: ; preds = %cond_next429
+ ret i32 0
+
+NodeBlock1557: ; preds = %cond_next429
+ br i1 false, label %LeafBlock1543, label %NodeBlock1555
+
+NodeBlock1555: ; preds = %NodeBlock1557
+ ret i32 0
+
+LeafBlock1543: ; preds = %NodeBlock1557
+ br i1 false, label %cond_next870, label %cond_next663
+
+cond_next663: ; preds = %LeafBlock1543
+ ret i32 0
+
+cond_next870: ; preds = %LeafBlock1543
+ br i1 false, label %cond_true1012, label %cond_true916
+
+cond_true916: ; preds = %cond_next870
+ ret i32 0
+
+cond_true1012: ; preds = %cond_next870
+ br i1 false, label %cond_next3849, label %cond_true2105
+
+cond_true2105: ; preds = %cond_true1012
+ ret i32 0
+
+cond_next3849: ; preds = %cond_true1012
+ br i1 false, label %cond_next4378, label %bb6559
+
+bb3862: ; preds = %cond_next4385
+ br i1 false, label %cond_false3904, label %cond_true3876
+
+cond_true3876: ; preds = %bb3862
+ ret i32 0
+
+cond_false3904: ; preds = %bb3862
+ br i1 false, label %cond_next4003, label %cond_true3935
+
+cond_true3935: ; preds = %cond_false3904
+ ret i32 0
+
+cond_next4003: ; preds = %cond_false3904
+ br i1 false, label %cond_next5160, label %cond_next4015
+
+cond_next4015: ; preds = %cond_next4003
+ ret i32 0
+
+cond_next4378: ; preds = %cond_next3849
+ br i1 false, label %cond_next4385, label %bb4393
+
+cond_next4385: ; preds = %cond_next4378
+ br i1 false, label %bb3862, label %bb4393
+
+bb4393: ; preds = %cond_next4385, %cond_next4378
+ ret i32 0
+
+cond_next5160: ; preds = %cond_next4003
+ br i1 false, label %bb5188, label %bb6559
+
+bb5188: ; preds = %cond_next5160
+ br i1 false, label %cond_next5285, label %cond_true5210
+
+cond_true5210: ; preds = %bb5188
+ ret i32 0
+
+cond_next5285: ; preds = %bb5188
+ br i1 false, label %cond_true5302, label %cond_true5330
+
+cond_true5302: ; preds = %cond_next5285
+ br i1 false, label %bb7405, label %bb7367
+
+cond_true5330: ; preds = %cond_next5285
+ ret i32 0
+
+bb6559: ; preds = %cond_next5160, %cond_next3849
+ ret i32 0
+
+bb7367: ; preds = %cond_true5302
+ ret i32 0
+
+bb7405: ; preds = %cond_true5302
+ br i1 false, label %cond_next8154, label %cond_true7410
+
+cond_true7410: ; preds = %bb7405
+ ret i32 0
+
+cond_next8154: ; preds = %bb7405
+ br i1 false, label %cond_true8235, label %bb9065
+
+cond_true8235: ; preds = %cond_next8154
+ br i1 false, label %bb8274, label %bb8245
+
+bb8245: ; preds = %cond_true8235
+ ret i32 0
+
+bb8274: ; preds = %cond_true8235
+ br i1 false, label %cond_next8358, label %cond_true8295
+
+cond_true8295: ; preds = %bb8274
+ ret i32 0
+
+cond_next8358: ; preds = %bb8274
+ br i1 false, label %cond_next.i509, label %cond_true8371
+
+cond_true8371: ; preds = %cond_next8358
+ ret i32 -123
+
+cond_next.i509: ; preds = %cond_next8358
+ br i1 false, label %bb36.i, label %bb33.i
+
+bb33.i: ; preds = %cond_next.i509
+ ret i32 0
+
+bb36.i: ; preds = %cond_next.i509
+ br i1 false, label %cond_next54.i, label %cond_true51.i
+
+cond_true51.i: ; preds = %bb36.i
+ ret i32 0
+
+cond_next54.i: ; preds = %bb36.i
+ %tmp10.i.i527 = call i8* @calloc( i64 0, i64 1 ) ; <i8*> [#uses=1]
+ br i1 false, label %cond_next11.i.i, label %bb132.i
+
+bb132.i: ; preds = %cond_next54.i
+ ret i32 0
+
+cond_next11.i.i: ; preds = %cond_next54.i
+ br i1 false, label %bb32.i.i545, label %cond_true1008.critedge.i
+
+bb32.i.i545: ; preds = %cond_next11.i.i
+ br i1 false, label %cond_next349.i, label %cond_true184.i
+
+cond_true184.i: ; preds = %bb32.i.i545
+ ret i32 0
+
+cond_next349.i: ; preds = %bb32.i.i545
+ br i1 false, label %cond_next535.i, label %cond_true1008.critedge1171.i
+
+cond_next535.i: ; preds = %cond_next349.i
+ br i1 false, label %cond_next569.i, label %cond_false574.i
+
+cond_next569.i: ; preds = %cond_next535.i
+ br i1 false, label %cond_next670.i, label %cond_true1008.critedge1185.i
+
+cond_false574.i: ; preds = %cond_next535.i
+ ret i32 0
+
+cond_next670.i: ; preds = %cond_next569.i
+ br i1 false, label %cond_true692.i, label %cond_next862.i
+
+cond_true692.i: ; preds = %cond_next670.i
+ br i1 false, label %cond_false742.i, label %cond_true718.i
+
+cond_true718.i: ; preds = %cond_true692.i
+ ret i32 0
+
+cond_false742.i: ; preds = %cond_true692.i
+ br i1 false, label %cond_true784.i, label %cond_next9079
+
+cond_true784.i: ; preds = %cond_next811.i, %cond_false742.i
+ %indvar1411.i.reg2mem.0 = phi i8 [ %indvar.next1412.i, %cond_next811.i ], [ 0, %cond_false742.i ] ; <i8> [#uses=1]
+ br i1 false, label %cond_true1008.critedge1190.i, label %cond_next811.i
+
+cond_next811.i: ; preds = %cond_true784.i
+ %indvar.next1412.i = add i8 %indvar1411.i.reg2mem.0, 1 ; <i8> [#uses=2]
+ %tmp781.i = icmp eq i8 %indvar.next1412.i, 3 ; <i1> [#uses=1]
+ br i1 %tmp781.i, label %cond_next9079, label %cond_true784.i
+
+cond_next862.i: ; preds = %cond_next670.i
+ ret i32 0
+
+cond_true1008.critedge.i: ; preds = %cond_next11.i.i
+ ret i32 0
+
+cond_true1008.critedge1171.i: ; preds = %cond_next349.i
+ ret i32 0
+
+cond_true1008.critedge1185.i: ; preds = %cond_next569.i
+ ret i32 0
+
+cond_true1008.critedge1190.i: ; preds = %cond_true784.i
+ %tmp621.i532.lcssa610 = phi i8* [ %tmp10.i.i527, %cond_true784.i ] ; <i8*> [#uses=0]
+ ret i32 0
+
+bb9065: ; preds = %cond_next8154
+ ret i32 0
+
+cond_next9079: ; preds = %cond_next811.i, %cond_false742.i
+ ret i32 0
+}
diff --git a/test/Transforms/LoopUnroll/dg.exp b/test/Transforms/LoopUnroll/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LoopUnroll/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LoopUnroll/shifted-tripcount.ll b/test/Transforms/LoopUnroll/shifted-tripcount.ll
new file mode 100644
index 0000000..a118a46
--- /dev/null
+++ b/test/Transforms/LoopUnroll/shifted-tripcount.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -loop-unroll -unroll-count=2 -S | FileCheck %s
+
+; LoopUnroll should unroll this loop into one big basic block.
+
+; CHECK: for.body:
+; CHECK: %i.013 = phi i64 [ 0, %entry ], [ %tmp16.1, %for.body ]
+; CHECK: br i1 %exitcond.1, label %for.end, label %for.body
+
+define void @foo(double* nocapture %p, i64 %n) nounwind {
+entry:
+ %mul10 = shl i64 %n, 1 ; <i64> [#uses=2]
+ br label %for.body
+
+for.body: ; preds = %entry, %for.body
+ %i.013 = phi i64 [ %tmp16, %for.body ], [ 0, %entry ] ; <i64> [#uses=2]
+ %arrayidx7 = getelementptr double* %p, i64 %i.013 ; <double*> [#uses=2]
+ %tmp16 = add i64 %i.013, 1 ; <i64> [#uses=3]
+ %arrayidx = getelementptr double* %p, i64 %tmp16 ; <double*> [#uses=1]
+ %tmp4 = load double* %arrayidx ; <double> [#uses=1]
+ %tmp8 = load double* %arrayidx7 ; <double> [#uses=1]
+ %mul9 = fmul double %tmp8, %tmp4 ; <double> [#uses=1]
+ store double %mul9, double* %arrayidx7
+ %exitcond = icmp eq i64 %tmp16, %mul10 ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
diff --git a/test/Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll b/test/Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll
new file mode 100644
index 0000000..e030157
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll
@@ -0,0 +1,35 @@
+; RUN: opt < %s -loop-unswitch -disable-output
+
+ %struct.BLEND_MAP = type { i16, i16, i16, i32, %struct.BLEND_MAP_ENTRY* }
+ %struct.BLEND_MAP_ENTRY = type { float, i8, { [5 x float], [4 x i8] } }
+ %struct.TPATTERN = type { i16, i16, i16, i32, float, float, float, %struct.WARP*, %struct.TPATTERN*, %struct.BLEND_MAP*, { %struct.anon, [4 x i8] } }
+ %struct.TURB = type { i16, %struct.WARP*, [3 x double], i32, float, float }
+ %struct.WARP = type { i16, %struct.WARP* }
+ %struct.anon = type { float, [3 x double] }
+
+define void @Parse_Pattern() {
+entry:
+ br label %bb1096.outer20
+bb671: ; preds = %cond_true1099
+ br label %bb1096.outer23
+bb1096.outer20.loopexit: ; preds = %cond_true1099
+ %Local_Turb.0.ph24.lcssa = phi %struct.TURB* [ %Local_Turb.0.ph24, %cond_true1099 ] ; <%struct.TURB*> [#uses=1]
+ br label %bb1096.outer20
+bb1096.outer20: ; preds = %bb1096.outer20.loopexit, %entry
+ %Local_Turb.0.ph22 = phi %struct.TURB* [ undef, %entry ], [ %Local_Turb.0.ph24.lcssa, %bb1096.outer20.loopexit ] ; <%struct.TURB*> [#uses=1]
+ %tmp1098 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br label %bb1096.outer23
+bb1096.outer23: ; preds = %bb1096.outer20, %bb671
+ %Local_Turb.0.ph24 = phi %struct.TURB* [ %Local_Turb.0.ph22, %bb1096.outer20 ], [ null, %bb671 ] ; <%struct.TURB*> [#uses=2]
+ br label %bb1096
+bb1096: ; preds = %cond_true1099, %bb1096.outer23
+ br i1 %tmp1098, label %cond_true1099, label %bb1102
+cond_true1099: ; preds = %bb1096
+ switch i32 0, label %bb1096.outer20.loopexit [
+ i32 161, label %bb671
+ i32 359, label %bb1096
+ ]
+bb1102: ; preds = %bb1096
+ %Local_Turb.0.ph24.lcssa1 = phi %struct.TURB* [ %Local_Turb.0.ph24, %bb1096 ] ; <%struct.TURB*> [#uses=0]
+ ret void
+}
diff --git a/test/Transforms/LoopUnswitch/2006-06-27-DeadSwitchCase.ll b/test/Transforms/LoopUnswitch/2006-06-27-DeadSwitchCase.ll
new file mode 100644
index 0000000..fd4d730
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2006-06-27-DeadSwitchCase.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -loop-unswitch -disable-output
+
+define void @init_caller_save() {
+entry:
+ br label %cond_true78
+cond_next20: ; preds = %cond_true64
+ br label %bb31
+bb31: ; preds = %cond_true64, %cond_true64, %cond_next20
+ %iftmp.29.1 = phi i32 [ 0, %cond_next20 ], [ 0, %cond_true64 ], [ 0, %cond_true64 ] ; <i32> [#uses=0]
+ br label %bb54
+bb54: ; preds = %cond_true78, %bb31
+ br i1 false, label %bb75, label %cond_true64
+cond_true64: ; preds = %bb54
+ switch i32 %i.0.0, label %cond_next20 [
+ i32 17, label %bb31
+ i32 18, label %bb31
+ ]
+bb75: ; preds = %bb54
+ %tmp74.0 = add i32 %i.0.0, 1 ; <i32> [#uses=1]
+ br label %cond_true78
+cond_true78: ; preds = %bb75, %entry
+ %i.0.0 = phi i32 [ 0, %entry ], [ %tmp74.0, %bb75 ] ; <i32> [#uses=2]
+ br label %bb54
+}
+
diff --git a/test/Transforms/LoopUnswitch/2007-05-09-Unreachable.ll b/test/Transforms/LoopUnswitch/2007-05-09-Unreachable.ll
new file mode 100644
index 0000000..468b194
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2007-05-09-Unreachable.ll
@@ -0,0 +1,28 @@
+; PR1333
+; RUN: opt < %s -loop-unswitch -disable-output
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+ %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* }
+ %struct.ada__tags__dispatch_table = type { [1 x i8*] }
+ %struct.quotes__T173s = type { i8, %struct.quotes__T173s__T174s, [2 x [1 x double]], [2 x i16], i64, i8 }
+ %struct.quotes__T173s__T174s = type { i8, i8, i8, i16, i16, [2 x [1 x double]] }
+
+define void @quotes__write_quote() {
+entry:
+ %tmp606.i = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br label %bb
+bb: ; preds = %cond_next73, %bb, %entry
+ br i1 false, label %bb51, label %bb
+bb51: ; preds = %cond_next73, %bb
+ br i1 %tmp606.i, label %quotes__bid_ask_depth_offset_matrices__get_price.exit, label %cond_true.i
+cond_true.i: ; preds = %bb51
+ unreachable
+quotes__bid_ask_depth_offset_matrices__get_price.exit: ; preds = %bb51
+ br i1 false, label %cond_next73, label %cond_true72
+cond_true72: ; preds = %quotes__bid_ask_depth_offset_matrices__get_price.exit
+ unreachable
+cond_next73: ; preds = %quotes__bid_ask_depth_offset_matrices__get_price.exit
+ br i1 false, label %bb, label %bb51
+}
+
diff --git a/test/Transforms/LoopUnswitch/2007-05-09-tl.ll b/test/Transforms/LoopUnswitch/2007-05-09-tl.ll
new file mode 100644
index 0000000..61615d0
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2007-05-09-tl.ll
@@ -0,0 +1,95 @@
+; RUN: opt < %s -loop-unswitch -disable-output
+; PR1333
+
+define void @pp_cxx_expression() {
+entry:
+ %tmp6 = lshr i32 0, 24 ; <i32> [#uses=1]
+ br label %tailrecurse
+
+tailrecurse: ; preds = %tailrecurse, %tailrecurse, %entry
+ switch i32 %tmp6, label %bb96 [
+ i32 24, label %bb10
+ i32 25, label %bb10
+ i32 28, label %bb10
+ i32 29, label %bb48
+ i32 31, label %bb48
+ i32 32, label %bb48
+ i32 33, label %bb48
+ i32 34, label %bb48
+ i32 36, label %bb15
+ i32 51, label %bb89
+ i32 52, label %bb89
+ i32 54, label %bb83
+ i32 57, label %bb59
+ i32 63, label %bb80
+ i32 64, label %bb80
+ i32 68, label %bb80
+ i32 169, label %bb75
+ i32 170, label %bb19
+ i32 171, label %bb63
+ i32 172, label %bb63
+ i32 173, label %bb67
+ i32 174, label %bb67
+ i32 175, label %bb19
+ i32 176, label %bb75
+ i32 178, label %bb59
+ i32 179, label %bb89
+ i32 180, label %bb59
+ i32 182, label %bb48
+ i32 183, label %bb48
+ i32 184, label %bb48
+ i32 185, label %bb48
+ i32 186, label %bb48
+ i32 195, label %bb48
+ i32 196, label %bb59
+ i32 197, label %bb89
+ i32 198, label %bb70
+ i32 199, label %bb59
+ i32 200, label %bb59
+ i32 201, label %bb59
+ i32 202, label %bb59
+ i32 203, label %bb75
+ i32 204, label %bb59
+ i32 205, label %tailrecurse
+ i32 210, label %tailrecurse
+ ]
+
+bb10: ; preds = %tailrecurse, %tailrecurse, %tailrecurse
+ ret void
+
+bb15: ; preds = %tailrecurse
+ ret void
+
+bb19: ; preds = %tailrecurse, %tailrecurse
+ ret void
+
+bb48: ; preds = %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse
+ ret void
+
+bb59: ; preds = %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse
+ ret void
+
+bb63: ; preds = %tailrecurse, %tailrecurse
+ ret void
+
+bb67: ; preds = %tailrecurse, %tailrecurse
+ ret void
+
+bb70: ; preds = %tailrecurse
+ ret void
+
+bb75: ; preds = %tailrecurse, %tailrecurse, %tailrecurse
+ ret void
+
+bb80: ; preds = %tailrecurse, %tailrecurse, %tailrecurse
+ ret void
+
+bb83: ; preds = %tailrecurse
+ ret void
+
+bb89: ; preds = %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse
+ ret void
+
+bb96: ; preds = %tailrecurse
+ ret void
+}
diff --git a/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll b/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll
new file mode 100644
index 0000000..bf5a61b
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll
@@ -0,0 +1,45 @@
+; RUN: opt < %s -loop-unswitch -instcombine -disable-output
+
+@str3 = external constant [3 x i8] ; <[3 x i8]*> [#uses=1]
+
+define i32 @stringSearch_Clib(i32 %count) {
+entry:
+ %ttmp25 = icmp sgt i32 %count, 0 ; <i1> [#uses=1]
+ br i1 %ttmp25, label %bb36.preheader, label %bb44
+
+bb36.preheader: ; preds = %entry
+ %ttmp33 = icmp slt i32 0, 250 ; <i1> [#uses=1]
+ br label %bb36.outer
+
+bb36.outer: ; preds = %bb41, %bb36.preheader
+ br i1 %ttmp33, label %bb.nph, label %bb41
+
+bb.nph: ; preds = %bb36.outer
+ %ttmp8 = icmp eq i8* null, null ; <i1> [#uses=1]
+ %ttmp6 = icmp eq i8* null, null ; <i1> [#uses=1]
+ %tmp31 = call i32 @strcspn( i8* null, i8* getelementptr ([3 x i8]* @str3, i64 0, i64 0) ) ; <i32> [#uses=1]
+ br i1 %ttmp8, label %cond_next, label %cond_true
+
+cond_true: ; preds = %bb.nph
+ ret i32 0
+
+cond_next: ; preds = %bb.nph
+ br i1 %ttmp6, label %cond_next28, label %cond_true20
+
+cond_true20: ; preds = %cond_next
+ ret i32 0
+
+cond_next28: ; preds = %cond_next
+ %tmp33 = add i32 %tmp31, 0 ; <i32> [#uses=1]
+ br label %bb41
+
+bb41: ; preds = %cond_next28, %bb36.outer
+ %c.2.lcssa = phi i32 [ 0, %bb36.outer ], [ %tmp33, %cond_next28 ] ; <i32> [#uses=1]
+ br i1 false, label %bb36.outer, label %bb44
+
+bb44: ; preds = %bb41, %entry
+ %c.01.1 = phi i32 [ 0, %entry ], [ %c.2.lcssa, %bb41 ] ; <i32> [#uses=1]
+ ret i32 %c.01.1
+}
+
+declare i32 @strcspn(i8*, i8*)
diff --git a/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll b/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll
new file mode 100644
index 0000000..5ae335b
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -loop-unswitch -disable-output
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ %tmp1785365 = icmp ult i32 0, 100 ; <i1> [#uses=1]
+ br label %bb
+
+bb: ; preds = %cond_true, %entry
+ br i1 false, label %cond_true, label %cond_next
+
+cond_true: ; preds = %bb
+ br i1 %tmp1785365, label %bb, label %bb1788
+
+cond_next: ; preds = %bb
+ %iftmp.1.0 = select i1 false, i32 0, i32 0 ; <i32> [#uses=1]
+ br i1 false, label %cond_true47, label %cond_next74
+
+cond_true47: ; preds = %cond_next
+ %tmp53 = urem i32 %iftmp.1.0, 0 ; <i32> [#uses=0]
+ ret i32 0
+
+cond_next74: ; preds = %cond_next
+ ret i32 0
+
+bb1788: ; preds = %cond_true
+ ret i32 0
+}
diff --git a/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll b/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll
new file mode 100644
index 0000000..dfca154
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll
@@ -0,0 +1,66 @@
+; RUN: opt < %s -loop-unswitch -disable-output
+; PR1559
+
+target triple = "i686-pc-linux-gnu"
+ %struct.re_pattern_buffer = type { i8*, i32, i32, i32, i8*, i8*, i32, i8 }
+
+define fastcc i32 @byte_regex_compile(i8* %pattern, i32 %size, i32 %syntax, %struct.re_pattern_buffer* %bufp) {
+entry:
+ br i1 false, label %bb147, label %cond_next123
+
+cond_next123: ; preds = %entry
+ ret i32 0
+
+bb147: ; preds = %entry
+ switch i32 0, label %normal_char [
+ i32 91, label %bb1734
+ i32 92, label %bb5700
+ ]
+
+bb1734: ; preds = %bb147
+ br label %bb1855.outer.outer
+
+cond_true1831: ; preds = %bb1855.outer
+ br i1 %tmp1837, label %cond_next1844, label %cond_true1840
+
+cond_true1840: ; preds = %cond_true1831
+ ret i32 0
+
+cond_next1844: ; preds = %cond_true1831
+ br i1 false, label %bb1855.outer, label %cond_true1849
+
+cond_true1849: ; preds = %cond_next1844
+ br label %bb1855.outer.outer
+
+bb1855.outer.outer: ; preds = %cond_true1849, %bb1734
+ %b.10.ph.ph = phi i8* [ null, %cond_true1849 ], [ null, %bb1734 ] ; <i8*> [#uses=1]
+ br label %bb1855.outer
+
+bb1855.outer: ; preds = %bb1855.outer.outer, %cond_next1844
+ %b.10.ph = phi i8* [ null, %cond_next1844 ], [ %b.10.ph.ph, %bb1855.outer.outer ] ; <i8*> [#uses=1]
+ %tmp1837 = icmp eq i8* null, null ; <i1> [#uses=2]
+ br i1 false, label %cond_true1831, label %cond_next1915
+
+cond_next1915: ; preds = %cond_next1961, %bb1855.outer
+ store i8* null, i8** null
+ br i1 %tmp1837, label %cond_next1929, label %cond_true1923
+
+cond_true1923: ; preds = %cond_next1915
+ ret i32 0
+
+cond_next1929: ; preds = %cond_next1915
+ br i1 false, label %cond_next1961, label %cond_next2009
+
+cond_next1961: ; preds = %cond_next1929
+ %tmp1992 = getelementptr i8* %b.10.ph, i32 0 ; <i8*> [#uses=0]
+ br label %cond_next1915
+
+cond_next2009: ; preds = %cond_next1929
+ ret i32 0
+
+bb5700: ; preds = %bb147
+ ret i32 0
+
+normal_char: ; preds = %bb147
+ ret i32 0
+}
diff --git a/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll b/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll
new file mode 100644
index 0000000..fc92579
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -licm -loop-unswitch -disable-output
+; PR 1589
+
+ %struct.QBasicAtomic = type { i32 }
+
+define void @_ZNK5QDate9addMonthsEi(%struct.QBasicAtomic* sret %agg.result, %struct.QBasicAtomic* %this, i32 %nmonths) {
+entry:
+ br label %cond_true90
+
+bb16: ; preds = %cond_true90
+ br i1 false, label %bb93, label %cond_true90
+
+bb45: ; preds = %cond_true90
+ br i1 false, label %bb53, label %bb58
+
+bb53: ; preds = %bb45
+ br i1 false, label %bb93, label %cond_true90
+
+bb58: ; preds = %bb45
+ store i32 0, i32* null, align 4
+ br i1 false, label %cond_true90, label %bb93
+
+cond_true90: ; preds = %bb58, %bb53, %bb16, %entry
+ %nmonths_addr.016.1 = phi i32 [ %nmonths, %entry ], [ 0, %bb16 ], [ 0, %bb53 ], [ %nmonths_addr.016.1, %bb58 ] ; <i32> [#uses=2]
+ %tmp14 = icmp slt i32 %nmonths_addr.016.1, -11 ; <i1> [#uses=1]
+ br i1 %tmp14, label %bb16, label %bb45
+
+bb93: ; preds = %bb58, %bb53, %bb16
+ ret void
+}
diff --git a/test/Transforms/LoopUnswitch/2007-08-01-LCSSA.ll b/test/Transforms/LoopUnswitch/2007-08-01-LCSSA.ll
new file mode 100644
index 0000000..f83acaa
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2007-08-01-LCSSA.ll
@@ -0,0 +1,55 @@
+; RUN: opt < %s -loop-unswitch -instcombine -disable-output
+ %struct.ClassDef = type { %struct.QByteArray, %struct.QByteArray, %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", i8, i8, %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QMap<QByteArray,QByteArray>", %"struct.QList<ArgumentDef>", %"struct.QMap<QByteArray,QByteArray>", i32, i32 }
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct.Generator = type { %struct.FILE*, %struct.ClassDef*, %"struct.QList<ArgumentDef>", %struct.QByteArray, %"struct.QList<ArgumentDef>" }
+ %struct.QBasicAtomic = type { i32 }
+ %struct.QByteArray = type { %"struct.QByteArray::Data"* }
+ %"struct.QByteArray::Data" = type { %struct.QBasicAtomic, i32, i32, i8*, [1 x i8] }
+ %"struct.QList<ArgumentDef>" = type { %"struct.QList<ArgumentDef>::._19" }
+ %"struct.QList<ArgumentDef>::._19" = type { %struct.QListData }
+ %struct.QListData = type { %"struct.QListData::Data"* }
+ %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] }
+ %"struct.QMap<QByteArray,QByteArray>" = type { %"struct.QMap<QByteArray,QByteArray>::._56" }
+ %"struct.QMap<QByteArray,QByteArray>::._56" = type { %struct.QMapData* }
+ %struct.QMapData = type { %struct.QMapData*, [12 x %struct.QMapData*], %struct.QBasicAtomic, i32, i32, i32, i8 }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
[email protected] = external constant [1 x i8] ; <[1 x i8]*> [#uses=1]
+
+declare i32 @strcmp(i8*, i8*)
+
+define i32 @_ZN9Generator6strregEPKc(%struct.Generator* %this, i8* %s) {
+entry:
+ %s_addr.0 = select i1 false, i8* getelementptr ([1 x i8]* @.str9, i32 0, i32 0), i8* %s ; <i8*> [#uses=2]
+ %tmp122 = icmp eq i8* %s_addr.0, null ; <i1> [#uses=1]
+ br label %bb184
+
+bb55: ; preds = %bb184
+ ret i32 0
+
+bb88: ; preds = %bb184
+ br i1 %tmp122, label %bb154, label %bb128
+
+bb128: ; preds = %bb88
+ %tmp138 = call i32 @strcmp( i8* null, i8* %s_addr.0 ) ; <i32> [#uses=1]
+ %iftmp.37.0.in4 = icmp eq i32 %tmp138, 0 ; <i1> [#uses=1]
+ br i1 %iftmp.37.0.in4, label %bb250, label %bb166
+
+bb154: ; preds = %bb88
+ br i1 false, label %bb250, label %bb166
+
+bb166: ; preds = %bb154, %bb128
+ %tmp175 = add i32 %idx.0, 1 ; <i32> [#uses=1]
+ %tmp177 = add i32 %tmp175, 0 ; <i32> [#uses=1]
+ %tmp181 = add i32 %tmp177, 0 ; <i32> [#uses=1]
+ %tmp183 = add i32 %i33.0, 1 ; <i32> [#uses=1]
+ br label %bb184
+
+bb184: ; preds = %bb166, %entry
+ %i33.0 = phi i32 [ 0, %entry ], [ %tmp183, %bb166 ] ; <i32> [#uses=2]
+ %idx.0 = phi i32 [ 0, %entry ], [ %tmp181, %bb166 ] ; <i32> [#uses=2]
+ %tmp49 = icmp slt i32 %i33.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp49, label %bb88, label %bb55
+
+bb250: ; preds = %bb154, %bb128
+ ret i32 %idx.0
+}
diff --git a/test/Transforms/LoopUnswitch/2007-10-04-DomFrontier.ll b/test/Transforms/LoopUnswitch/2007-10-04-DomFrontier.ll
new file mode 100644
index 0000000..efbb761
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2007-10-04-DomFrontier.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -licm -loop-unroll -disable-output
+
+@resonant = external global i32 ; <i32*> [#uses=2]
+
+define void @weightadj() {
+entry:
+ br label %bb
+
+bb: ; preds = %bb158, %entry
+ store i32 0, i32* @resonant, align 4
+ br i1 false, label %g.exit, label %bb158
+
+g.exit: ; preds = %bb68, %bb
+ br i1 false, label %bb68, label %cond_true
+
+cond_true: ; preds = %g.exit
+ store i32 1, i32* @resonant, align 4
+ br label %bb68
+
+bb68: ; preds = %cond_true, %g.exit
+ %tmp71 = icmp slt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp71, label %g.exit, label %bb158
+
+bb158: ; preds = %bb68, %bb
+ br i1 false, label %bb, label %return
+
+return: ; preds = %bb158
+ ret void
+}
diff --git a/test/Transforms/LoopUnswitch/2008-06-02-DomInfo.ll b/test/Transforms/LoopUnswitch/2008-06-02-DomInfo.ll
new file mode 100644
index 0000000..906c2c5
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2008-06-02-DomInfo.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -loop-unswitch -instcombine -gvn -disable-output
+; PR2372
+target triple = "i386-pc-linux-gnu"
+
+define i32 @func_3(i16 signext %p_5, i16 signext %p_6) nounwind {
+entry:
+ %tmp3 = icmp eq i16 %p_5, 0 ; <i1> [#uses=1]
+ %tmp1314 = sext i16 %p_6 to i32 ; <i32> [#uses=1]
+ %tmp28 = icmp ugt i32 %tmp1314, 3 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp28, false ; <i1> [#uses=1]
+ br label %bb
+bb: ; preds = %bb54, %entry
+ br i1 %tmp3, label %bb54, label %bb5
+bb5: ; preds = %bb
+ br i1 %bothcond, label %bb54, label %bb31
+bb31: ; preds = %bb5
+ br label %bb54
+bb54: ; preds = %bb31, %bb5, %bb
+ br i1 false, label %bb64, label %bb
+bb64: ; preds = %bb54
+ %tmp6566 = sext i16 %p_6 to i32 ; <i32> [#uses=1]
+ %tmp68 = tail call i32 (...)* @func_18( i32 1, i32 %tmp6566, i32 1 ) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @func_18(...)
diff --git a/test/Transforms/LoopUnswitch/2008-06-17-DomFrontier.ll b/test/Transforms/LoopUnswitch/2008-06-17-DomFrontier.ll
new file mode 100644
index 0000000..f74054a
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2008-06-17-DomFrontier.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -licm -loop-unswitch -disable-output
+@g_56 = external global i16 ; <i16*> [#uses=2]
+
+define i32 @func_67(i32 %p_68, i8 signext %p_69, i8 signext %p_71) nounwind {
+entry:
+ br label %bb
+bb: ; preds = %bb44, %entry
+ br label %bb3
+bb3: ; preds = %bb36, %bb
+ %bothcond = or i1 false, false ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb29, label %bb19
+bb19: ; preds = %bb3
+ br i1 false, label %bb36, label %bb29
+bb29: ; preds = %bb19, %bb3
+ ret i32 0
+bb36: ; preds = %bb19
+ store i16 0, i16* @g_56, align 2
+ br i1 false, label %bb44, label %bb3
+bb44: ; preds = %bb44, %bb36
+ %tmp46 = load i16* @g_56, align 2 ; <i16> [#uses=0]
+ br i1 false, label %bb, label %bb44
+}
diff --git a/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll b/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll
new file mode 100644
index 0000000..20f2c2b
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -loop-unswitch -stats -disable-output |& grep "1 loop-unswitch - Number of branches unswitched" | count 1
+; PR 3170
+define i32 @a(i32 %x, i32 %y) nounwind {
+entry:
+ %0 = icmp ult i32 0, %y ; <i1> [#uses=1]
+ br i1 %0, label %bb.nph, label %bb4
+
+bb.nph: ; preds = %entry
+ %1 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
+ br label %bb
+
+bb: ; preds = %bb.nph, %bb3
+ %i.01 = phi i32 [ %3, %bb3 ], [ 0, %bb.nph ] ; <i32> [#uses=1]
+ br i1 %1, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ %2 = tail call i32 (...)* @b() nounwind ; <i32> [#uses=0]
+ br label %bb2
+
+bb2: ; preds = %bb, %bb1
+ %3 = add i32 %i.01, 1 ; <i32> [#uses=2]
+ br label %bb3
+
+bb3: ; preds = %bb2
+ %i.0 = phi i32 [ %3, %bb2 ] ; <i32> [#uses=1]
+ %4 = icmp ult i32 %i.0, %y ; <i1> [#uses=1]
+ br i1 %4, label %bb, label %bb3.bb4_crit_edge
+
+bb3.bb4_crit_edge: ; preds = %bb3
+ br label %bb4
+
+bb4: ; preds = %bb3.bb4_crit_edge, %entry
+ ret i32 0
+}
+
+declare i32 @b(...)
diff --git a/test/Transforms/LoopUnswitch/basictest.ll b/test/Transforms/LoopUnswitch/basictest.ll
new file mode 100644
index 0000000..1e6f2cf
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/basictest.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -loop-unswitch -disable-output
+
+define i32 @test(i32* %A, i1 %C) {
+entry:
+ br label %no_exit
+no_exit: ; preds = %no_exit.backedge, %entry
+ %i.0.0 = phi i32 [ 0, %entry ], [ %i.0.0.be, %no_exit.backedge ] ; <i32> [#uses=3]
+ %gep.upgrd.1 = zext i32 %i.0.0 to i64 ; <i64> [#uses=1]
+ %tmp.7 = getelementptr i32* %A, i64 %gep.upgrd.1 ; <i32*> [#uses=4]
+ %tmp.13 = load i32* %tmp.7 ; <i32> [#uses=2]
+ %tmp.14 = add i32 %tmp.13, 1 ; <i32> [#uses=1]
+ store i32 %tmp.14, i32* %tmp.7
+ br i1 %C, label %then, label %endif
+then: ; preds = %no_exit
+ %tmp.29 = load i32* %tmp.7 ; <i32> [#uses=1]
+ %tmp.30 = add i32 %tmp.29, 2 ; <i32> [#uses=1]
+ store i32 %tmp.30, i32* %tmp.7
+ %inc9 = add i32 %i.0.0, 1 ; <i32> [#uses=2]
+ %tmp.112 = icmp ult i32 %inc9, 100000 ; <i1> [#uses=1]
+ br i1 %tmp.112, label %no_exit.backedge, label %return
+no_exit.backedge: ; preds = %endif, %then
+ %i.0.0.be = phi i32 [ %inc9, %then ], [ %inc, %endif ] ; <i32> [#uses=1]
+ br label %no_exit
+endif: ; preds = %no_exit
+ %inc = add i32 %i.0.0, 1 ; <i32> [#uses=2]
+ %tmp.1 = icmp ult i32 %inc, 100000 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %no_exit.backedge, label %return
+return: ; preds = %endif, %then
+ ret i32 %tmp.13
+}
+
diff --git a/test/Transforms/LoopUnswitch/crash.ll b/test/Transforms/LoopUnswitch/crash.ll
new file mode 100644
index 0000000..fac55a6
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/crash.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -loop-unswitch -disable-output
+
+define void @test1(i32* %S2) {
+entry:
+ br i1 false, label %list_Length.exit, label %cond_true.i
+cond_true.i: ; preds = %entry
+ ret void
+list_Length.exit: ; preds = %entry
+ br i1 false, label %list_Length.exit9, label %cond_true.i5
+cond_true.i5: ; preds = %list_Length.exit
+ ret void
+list_Length.exit9: ; preds = %list_Length.exit
+ br i1 false, label %bb78, label %return
+bb44: ; preds = %bb78, %cond_next68
+ br i1 %tmp49.not, label %bb62, label %bb62.loopexit
+bb62.loopexit: ; preds = %bb44
+ br label %bb62
+bb62: ; preds = %bb62.loopexit, %bb44
+ br i1 false, label %return.loopexit, label %cond_next68
+cond_next68: ; preds = %bb62
+ br i1 false, label %return.loopexit, label %bb44
+bb78: ; preds = %list_Length.exit9
+ %tmp49.not = icmp eq i32* %S2, null ; <i1> [#uses=1]
+ br label %bb44
+return.loopexit: ; preds = %cond_next68, %bb62
+ %retval.0.ph = phi i32 [ 1, %cond_next68 ], [ 0, %bb62 ] ; <i32> [#uses=1]
+ br label %return
+return: ; preds = %return.loopexit, %list_Length.exit9
+ %retval.0 = phi i32 [ 0, %list_Length.exit9 ], [ %retval.0.ph, %return.loopexit ] ; <i32> [#uses=0]
+ ret void
+}
+
+define void @test2(i32 %x1, i32 %y1, i32 %z1, i32 %r1) nounwind {
+entry:
+ br label %bb.nph
+
+bb.nph: ; preds = %entry
+ %and.i13521 = and <4 x i1> undef, undef ; <<4 x i1>> [#uses=1]
+ br label %for.body
+
+for.body: ; preds = %for.body, %bb.nph
+ %or.i = select <4 x i1> %and.i13521, <4 x i32> undef, <4 x i32> undef ; <<4 x i32>> [#uses=0]
+ br i1 false, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
diff --git a/test/Transforms/LoopUnswitch/dg.exp b/test/Transforms/LoopUnswitch/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LoopUnswitch/preserve-analyses.ll b/test/Transforms/LoopUnswitch/preserve-analyses.ll
new file mode 100644
index 0000000..3364fb2
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/preserve-analyses.ll
@@ -0,0 +1,129 @@
+; RUN: opt -loop-unswitch -verify-loop-info -verify-dom-info %s -disable-output
+
+; Loop unswitch should be able to unswitch these loops and
+; preserve LCSSA and LoopSimplify forms.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv6-apple-darwin9"
+
+@delim1 = external global i32 ; <i32*> [#uses=1]
+@delim2 = external global i32 ; <i32*> [#uses=1]
+
+define arm_apcscc i32 @ineqn(i8* %s, i8* %p) nounwind readonly {
+entry:
+ %0 = load i32* @delim1, align 4 ; <i32> [#uses=1]
+ %1 = load i32* @delim2, align 4 ; <i32> [#uses=1]
+ br label %bb8.outer
+
+bb: ; preds = %bb8
+ %2 = icmp eq i8* %p_addr.0, %s ; <i1> [#uses=1]
+ br i1 %2, label %bb10, label %bb2
+
+bb2: ; preds = %bb
+ %3 = getelementptr inbounds i8* %p_addr.0, i32 1 ; <i8*> [#uses=3]
+ switch i32 %ineq.0.ph, label %bb8.backedge [
+ i32 0, label %bb3
+ i32 1, label %bb6
+ ]
+
+bb8.backedge: ; preds = %bb6, %bb5, %bb2
+ br label %bb8
+
+bb3: ; preds = %bb2
+ %4 = icmp eq i32 %8, %0 ; <i1> [#uses=1]
+ br i1 %4, label %bb8.outer.loopexit, label %bb5
+
+bb5: ; preds = %bb3
+ br i1 %6, label %bb6, label %bb8.backedge
+
+bb6: ; preds = %bb5, %bb2
+ %5 = icmp eq i32 %8, %1 ; <i1> [#uses=1]
+ br i1 %5, label %bb7, label %bb8.backedge
+
+bb7: ; preds = %bb6
+ %.lcssa1 = phi i8* [ %3, %bb6 ] ; <i8*> [#uses=1]
+ br label %bb8.outer.backedge
+
+bb8.outer.backedge: ; preds = %bb8.outer.loopexit, %bb7
+ %.lcssa2 = phi i8* [ %.lcssa1, %bb7 ], [ %.lcssa, %bb8.outer.loopexit ] ; <i8*> [#uses=1]
+ %ineq.0.ph.be = phi i32 [ 0, %bb7 ], [ 1, %bb8.outer.loopexit ] ; <i32> [#uses=1]
+ br label %bb8.outer
+
+bb8.outer.loopexit: ; preds = %bb3
+ %.lcssa = phi i8* [ %3, %bb3 ] ; <i8*> [#uses=1]
+ br label %bb8.outer.backedge
+
+bb8.outer: ; preds = %bb8.outer.backedge, %entry
+ %ineq.0.ph = phi i32 [ 0, %entry ], [ %ineq.0.ph.be, %bb8.outer.backedge ] ; <i32> [#uses=3]
+ %p_addr.0.ph = phi i8* [ %p, %entry ], [ %.lcssa2, %bb8.outer.backedge ] ; <i8*> [#uses=1]
+ %6 = icmp eq i32 %ineq.0.ph, 1 ; <i1> [#uses=1]
+ br label %bb8
+
+bb8: ; preds = %bb8.outer, %bb8.backedge
+ %p_addr.0 = phi i8* [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <i8*> [#uses=3]
+ %7 = load i8* %p_addr.0, align 1 ; <i8> [#uses=2]
+ %8 = sext i8 %7 to i32 ; <i32> [#uses=2]
+ %9 = icmp eq i8 %7, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb10, label %bb
+
+bb10: ; preds = %bb8, %bb
+ %.0 = phi i32 [ %ineq.0.ph, %bb ], [ 0, %bb8 ] ; <i32> [#uses=1]
+ ret i32 %.0
+}
+
+; This is a simplified form of ineqn from above. It triggers some
+; different cases in the loop-unswitch code.
+
+define void @simplified_ineqn() nounwind readonly {
+entry:
+ br label %bb8.outer
+
+bb8.outer: ; preds = %bb6, %bb2, %entry
+ %x = phi i32 [ 0, %entry ], [ 0, %bb6 ], [ 1, %bb2 ] ; <i32> [#uses=1]
+ br i1 undef, label %return, label %bb2
+
+bb2: ; preds = %bb
+ switch i32 %x, label %bb6 [
+ i32 0, label %bb8.outer
+ ]
+
+bb6: ; preds = %bb2
+ br i1 undef, label %bb8.outer, label %bb2
+
+return: ; preds = %bb8, %bb
+ ret void
+}
+
+; This function requires special handling to preserve LCSSA form.
+; PR4934
+
+define void @pnp_check_irq() nounwind noredzone {
+entry:
+ %conv56 = trunc i64 undef to i32 ; <i32> [#uses=1]
+ br label %while.cond.i
+
+while.cond.i: ; preds = %while.cond.i.backedge, %entry
+ %call.i25 = call i8* @pci_get_device() nounwind noredzone ; <i8*> [#uses=2]
+ br i1 undef, label %if.then65, label %while.body.i
+
+while.body.i: ; preds = %while.cond.i
+ br i1 undef, label %if.then31.i.i, label %while.cond.i.backedge
+
+while.cond.i.backedge: ; preds = %if.then31.i.i, %while.body.i
+ br label %while.cond.i
+
+if.then31.i.i: ; preds = %while.body.i
+ switch i32 %conv56, label %while.cond.i.backedge [
+ i32 14, label %if.then42.i.i
+ i32 15, label %if.then42.i.i
+ ]
+
+if.then42.i.i: ; preds = %if.then31.i.i, %if.then31.i.i
+ %call.i25.lcssa48 = phi i8* [ %call.i25, %if.then31.i.i ], [ %call.i25, %if.then31.i.i ] ; <i8*> [#uses=0]
+ unreachable
+
+if.then65: ; preds = %while.cond.i
+ unreachable
+}
+
+declare i8* @pci_get_device() noredzone
diff --git a/test/Transforms/LowerInvoke/2003-12-10-Crash.ll b/test/Transforms/LowerInvoke/2003-12-10-Crash.ll
new file mode 100644
index 0000000..31f3d42
--- /dev/null
+++ b/test/Transforms/LowerInvoke/2003-12-10-Crash.ll
@@ -0,0 +1,22 @@
+; This testcase was reduced from Shootout-C++/reversefile.cpp by bugpoint
+
+; RUN: opt < %s -lowerinvoke -disable-output
+
+declare void @baz()
+
+declare void @bar()
+
+define void @foo() {
+then:
+ invoke void @baz( )
+ to label %invoke_cont.0 unwind label %try_catch
+invoke_cont.0: ; preds = %then
+ invoke void @bar( )
+ to label %try_exit unwind label %try_catch
+try_catch: ; preds = %invoke_cont.0, %then
+ %__tmp.0 = phi i32* [ null, %invoke_cont.0 ], [ null, %then ] ; <i32*> [#uses=0]
+ ret void
+try_exit: ; preds = %invoke_cont.0
+ ret void
+}
+
diff --git a/test/Transforms/LowerInvoke/2004-02-29-PHICrash.ll b/test/Transforms/LowerInvoke/2004-02-29-PHICrash.ll
new file mode 100644
index 0000000..bddb702
--- /dev/null
+++ b/test/Transforms/LowerInvoke/2004-02-29-PHICrash.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -lowerinvoke -enable-correct-eh-support -disable-output
+
+define void @_ZNKSt11__use_cacheISt16__numpunct_cacheIcEEclERKSt6locale() {
+entry:
+ br i1 false, label %then, label %UnifiedReturnBlock
+then: ; preds = %entry
+ invoke void @_Znwj( )
+ to label %UnifiedReturnBlock unwind label %UnifiedReturnBlock
+UnifiedReturnBlock: ; preds = %then, %then, %entry
+ %UnifiedRetVal = phi i32* [ null, %entry ], [ null, %then ], [ null, %then ] ; <i32*> [#uses=0]
+ ret void
+}
+
+declare void @_Znwj()
+
diff --git a/test/Transforms/LowerInvoke/2005-08-03-InvokeWithPHI.ll b/test/Transforms/LowerInvoke/2005-08-03-InvokeWithPHI.ll
new file mode 100644
index 0000000..1057ad7
--- /dev/null
+++ b/test/Transforms/LowerInvoke/2005-08-03-InvokeWithPHI.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -lowerinvoke -enable-correct-eh-support -disable-output
+
+declare void @ll_listnext__listiterPtr()
+
+define void @WorkTask.fn() {
+block0:
+ invoke void @ll_listnext__listiterPtr( )
+ to label %block9 unwind label %block8_exception_handling
+block8_exception_handling: ; preds = %block0
+ ret void
+block9: ; preds = %block0
+ %w_2690 = phi { i32, i32 }* [ null, %block0 ] ; <{ i32, i32 }*> [#uses=1]
+ %tmp.129 = getelementptr { i32, i32 }* %w_2690, i32 0, i32 1 ; <i32*> [#uses=1]
+ %v2769 = load i32* %tmp.129 ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/LowerInvoke/2005-08-03-InvokeWithPHIUse.ll b/test/Transforms/LowerInvoke/2005-08-03-InvokeWithPHIUse.ll
new file mode 100644
index 0000000..9402046
--- /dev/null
+++ b/test/Transforms/LowerInvoke/2005-08-03-InvokeWithPHIUse.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -lowerinvoke -enable-correct-eh-support -disable-output
+
+declare fastcc i32 @ll_listnext__listiterPtr()
+
+define fastcc i32 @WorkTask.fn() {
+block0:
+ %v2679 = invoke fastcc i32 @ll_listnext__listiterPtr( )
+ to label %block9 unwind label %block8_exception_handling ; <i32> [#uses=1]
+block8_exception_handling: ; preds = %block0
+ ret i32 0
+block9: ; preds = %block0
+ %i_2689 = phi i32 [ %v2679, %block0 ] ; <i32> [#uses=1]
+ ret i32 %i_2689
+}
+
diff --git a/test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll b/test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll
new file mode 100644
index 0000000..b46ccfb
--- /dev/null
+++ b/test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -lowerinvoke -enable-correct-eh-support -disable-output
+; PR2029
+define i32 @main(i32 %argc, i8** %argv) {
+bb470:
+ invoke i32 @main(i32 0, i8** null) to label %invcont474 unwind label
+%lpad902
+
+invcont474: ; preds = %bb470
+ ret i32 0
+
+lpad902: ; preds = %bb470
+ %tmp471.lcssa = phi i8* [ null, %bb470 ] ; <i8*>
+ ret i32 0
+}
diff --git a/test/Transforms/LowerInvoke/basictest.ll b/test/Transforms/LowerInvoke/basictest.ll
new file mode 100644
index 0000000..f0ca5f4
--- /dev/null
+++ b/test/Transforms/LowerInvoke/basictest.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -lowerinvoke -disable-output -enable-correct-eh-support
+
+
+define i32 @foo() {
+ invoke i32 @foo( )
+ to label %Ok unwind label %Crap ; <i32>:1 [#uses=0]
+Ok: ; preds = %0
+ invoke i32 @foo( )
+ to label %Ok2 unwind label %Crap ; <i32>:2 [#uses=0]
+Ok2: ; preds = %Ok
+ ret i32 2
+Crap: ; preds = %Ok, %0
+ ret i32 1
+}
+
+define i32 @bar(i32 %blah) {
+ br label %doit
+doit: ; preds = %0
+ ;; Value live across an unwind edge.
+ %B2 = add i32 %blah, 1 ; <i32> [#uses=1]
+ invoke i32 @foo( )
+ to label %Ok unwind label %Crap ; <i32>:1 [#uses=0]
+Ok: ; preds = %doit
+ invoke i32 @foo( )
+ to label %Ok2 unwind label %Crap ; <i32>:2 [#uses=0]
+Ok2: ; preds = %Ok
+ ret i32 2
+Crap: ; preds = %Ok, %doit
+ ret i32 %B2
+}
diff --git a/test/Transforms/LowerInvoke/dg.exp b/test/Transforms/LowerInvoke/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LowerInvoke/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LowerSetJmp/2003-11-05-DominanceProperties.ll b/test/Transforms/LowerSetJmp/2003-11-05-DominanceProperties.ll
new file mode 100644
index 0000000..9180c15
--- /dev/null
+++ b/test/Transforms/LowerSetJmp/2003-11-05-DominanceProperties.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -lowersetjmp -disable-output
+
+ %struct.jmpenv = type { i32, i8 }
+
+declare void @Perl_sv_setpv()
+
+declare i32 @llvm.setjmp(i32*)
+
+define void @perl_call_sv() {
+ call void @Perl_sv_setpv( )
+ %tmp.335 = getelementptr %struct.jmpenv* null, i64 0, i32 0 ; <i32*> [#uses=1]
+ %tmp.336 = call i32 @llvm.setjmp( i32* null ) ; <i32> [#uses=1]
+ store i32 %tmp.336, i32* %tmp.335
+ ret void
+}
+
diff --git a/test/Transforms/LowerSetJmp/dg.exp b/test/Transforms/LowerSetJmp/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LowerSetJmp/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LowerSetJmp/simpletest.ll b/test/Transforms/LowerSetJmp/simpletest.ll
new file mode 100644
index 0000000..1430dff
--- /dev/null
+++ b/test/Transforms/LowerSetJmp/simpletest.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -lowersetjmp -S | grep invoke
+
+ %JmpBuf = type i32
[email protected]_1 = internal constant [13 x i8] c"returned %d\0A\00" ; <[13 x i8]*> [#uses=1]
+
+declare void @llvm.longjmp(i32*, i32)
+
+declare i32 @llvm.setjmp(i32*)
+
+declare void @foo()
+
+define i32 @simpletest() {
+ %B = alloca i32 ; <i32*> [#uses=2]
+ %Val = call i32 @llvm.setjmp( i32* %B ) ; <i32> [#uses=2]
+ %V = icmp ne i32 %Val, 0 ; <i1> [#uses=1]
+ br i1 %V, label %LongJumped, label %Normal
+Normal: ; preds = %0
+ call void @foo( )
+ call void @llvm.longjmp( i32* %B, i32 42 )
+ ret i32 0
+LongJumped: ; preds = %0
+ ret i32 %Val
+}
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+ %V = call i32 @simpletest( ) ; <i32> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @.str_1, i64 0, i64 0), i32 %V ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/Transforms/LowerSwitch/2003-05-01-PHIProblem.ll b/test/Transforms/LowerSwitch/2003-05-01-PHIProblem.ll
new file mode 100644
index 0000000..d143ab0
--- /dev/null
+++ b/test/Transforms/LowerSwitch/2003-05-01-PHIProblem.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -lowerswitch
+
+define void @child(i32 %ct.1) {
+entry:
+ switch i32 0, label %return [
+ i32 3, label %UnifiedExitNode
+ i32 0, label %return
+ ]
+return: ; preds = %entry, %entry
+ %result.0 = phi i32* [ null, %entry ], [ null, %entry ] ; <i32*> [#uses=0]
+ br label %UnifiedExitNode
+UnifiedExitNode: ; preds = %return, %entry
+ ret void
+}
+
diff --git a/test/Transforms/LowerSwitch/2003-08-23-EmptySwitch.ll b/test/Transforms/LowerSwitch/2003-08-23-EmptySwitch.ll
new file mode 100644
index 0000000..61e1dcd
--- /dev/null
+++ b/test/Transforms/LowerSwitch/2003-08-23-EmptySwitch.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -lowerswitch
+
+define void @test() {
+ switch i32 0, label %Next [
+ ]
+Next: ; preds = %0
+ ret void
+}
+
diff --git a/test/Transforms/LowerSwitch/2004-03-13-SwitchIsDefaultCrash.ll b/test/Transforms/LowerSwitch/2004-03-13-SwitchIsDefaultCrash.ll
new file mode 100644
index 0000000..964b07e
--- /dev/null
+++ b/test/Transforms/LowerSwitch/2004-03-13-SwitchIsDefaultCrash.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -lowerswitch -disable-output
+
+define void @solve() {
+entry:
+ %targetBlock = call i16 @solve_code( ) ; <i16> [#uses=1]
+ br label %codeReplTail
+then.1: ; preds = %codeReplTail
+ ret void
+loopexit.0: ; preds = %codeReplTail
+ ret void
+codeReplTail: ; preds = %codeReplTail, %entry
+ switch i16 %targetBlock, label %codeReplTail [
+ i16 0, label %loopexit.0
+ i16 1, label %then.1
+ ]
+}
+
+declare i16 @solve_code()
+
diff --git a/test/Transforms/LowerSwitch/dg.exp b/test/Transforms/LowerSwitch/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/LowerSwitch/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/LowerSwitch/feature.ll b/test/Transforms/LowerSwitch/feature.ll
new file mode 100644
index 0000000..cdfa0f3
--- /dev/null
+++ b/test/Transforms/LowerSwitch/feature.ll
@@ -0,0 +1,51 @@
+; RUN: opt < %s -lowerswitch -S > %t
+; RUN: grep slt %t | count 10
+; RUN: grep ule %t | count 3
+; RUN: grep eq %t | count 9
+
+define i32 @main(i32 %tmp158) {
+entry:
+ switch i32 %tmp158, label %bb336 [
+ i32 -2, label %bb338
+ i32 -3, label %bb338
+ i32 -4, label %bb338
+ i32 -5, label %bb338
+ i32 -6, label %bb338
+ i32 0, label %bb338
+ i32 1, label %bb338
+ i32 2, label %bb338
+ i32 3, label %bb338
+ i32 4, label %bb338
+ i32 5, label %bb338
+ i32 6, label %bb338
+ i32 7, label %bb
+ i32 8, label %bb338
+ i32 9, label %bb322
+ i32 10, label %bb324
+ i32 11, label %bb326
+ i32 12, label %bb328
+ i32 13, label %bb330
+ i32 14, label %bb332
+ i32 15, label %bb334
+ ]
+bb:
+ ret i32 2
+bb322:
+ ret i32 3
+bb324:
+ ret i32 4
+bb326:
+ ret i32 5
+bb328:
+ ret i32 6
+bb330:
+ ret i32 7
+bb332:
+ ret i32 8
+bb334:
+ ret i32 9
+bb336:
+ ret i32 10
+bb338:
+ ret i32 11
+}
diff --git a/test/Transforms/Mem2Reg/2002-03-28-UninitializedVal.ll b/test/Transforms/Mem2Reg/2002-03-28-UninitializedVal.ll
new file mode 100644
index 0000000..777f375
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2002-03-28-UninitializedVal.ll
@@ -0,0 +1,11 @@
+; Uninitialized values are not handled correctly.
+;
+; RUN: opt < %s -mem2reg -disable-output
+;
+
+define i32 @test() {
+ ; To be promoted
+ %X = alloca i32 ; <i32*> [#uses=1]
+ %Y = load i32* %X ; <i32> [#uses=1]
+ ret i32 %Y
+}
diff --git a/test/Transforms/Mem2Reg/2002-05-01-ShouldNotPromoteThisAlloca.ll b/test/Transforms/Mem2Reg/2002-05-01-ShouldNotPromoteThisAlloca.ll
new file mode 100644
index 0000000..89bd492
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2002-05-01-ShouldNotPromoteThisAlloca.ll
@@ -0,0 +1,12 @@
+; This input caused the mem2reg pass to die because it was trying to promote
+; the %r alloca, even though it is invalid to do so in this case!
+;
+; RUN: opt < %s -mem2reg
+
+define void @test() {
+ %r = alloca i32 ; <i32*> [#uses=2]
+ store i32 4, i32* %r
+ store i32* %r, i32** null
+ ret void
+}
+
diff --git a/test/Transforms/Mem2Reg/2003-04-10-DFNotFound.ll b/test/Transforms/Mem2Reg/2003-04-10-DFNotFound.ll
new file mode 100644
index 0000000..3665483
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2003-04-10-DFNotFound.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -mem2reg
+
+define void @_Z3barv() {
+ %result = alloca i32 ; <i32*> [#uses=1]
+ ret void
+ ; No predecessors!
+ store i32 0, i32* %result
+ ret void
+}
+
diff --git a/test/Transforms/Mem2Reg/2003-04-18-DeadBlockProblem.ll b/test/Transforms/Mem2Reg/2003-04-18-DeadBlockProblem.ll
new file mode 100644
index 0000000..36bd9e6
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2003-04-18-DeadBlockProblem.ll
@@ -0,0 +1,16 @@
+; This testcases makes sure that mem2reg can handle unreachable blocks.
+; RUN: opt < %s -mem2reg
+
+define i32 @test() {
+ %X = alloca i32 ; <i32*> [#uses=2]
+ store i32 6, i32* %X
+ br label %Loop
+Loop: ; preds = %EndOfLoop, %0
+ store i32 5, i32* %X
+ br label %EndOfLoop
+Unreachable: ; No predecessors!
+ br label %EndOfLoop
+EndOfLoop: ; preds = %Unreachable, %Loop
+ br label %Loop
+}
+
diff --git a/test/Transforms/Mem2Reg/2003-04-24-MultipleIdenticalSuccessors.ll b/test/Transforms/Mem2Reg/2003-04-24-MultipleIdenticalSuccessors.ll
new file mode 100644
index 0000000..f5f1ee3
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2003-04-24-MultipleIdenticalSuccessors.ll
@@ -0,0 +1,16 @@
+; Mem2reg used to only add one incoming value to a PHI node, even if it had
+; multiple incoming edges from a block.
+;
+; RUN: opt < %s -mem2reg -disable-output
+
+define i32 @test(i1 %c1, i1 %c2) {
+ %X = alloca i32 ; <i32*> [#uses=2]
+ br i1 %c1, label %Exit, label %B2
+B2: ; preds = %0
+ store i32 2, i32* %X
+ br i1 %c2, label %Exit, label %Exit
+Exit: ; preds = %B2, %B2, %0
+ %Y = load i32* %X ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/Mem2Reg/2003-06-26-IterativePromote.ll b/test/Transforms/Mem2Reg/2003-06-26-IterativePromote.ll
new file mode 100644
index 0000000..e82caa9
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2003-06-26-IterativePromote.ll
@@ -0,0 +1,16 @@
+; Promoting some values allows promotion of other values.
+; RUN: opt < %s -mem2reg -S | not grep alloca
+
+define i32 @test2() {
+ %result = alloca i32 ; <i32*> [#uses=2]
+ %a = alloca i32 ; <i32*> [#uses=2]
+ %p = alloca i32* ; <i32**> [#uses=2]
+ store i32 0, i32* %a
+ store i32* %a, i32** %p
+ %tmp.0 = load i32** %p ; <i32*> [#uses=1]
+ %tmp.1 = load i32* %tmp.0 ; <i32> [#uses=1]
+ store i32 %tmp.1, i32* %result
+ %tmp.2 = load i32* %result ; <i32> [#uses=1]
+ ret i32 %tmp.2
+}
+
diff --git a/test/Transforms/Mem2Reg/2003-10-05-DeadPHIInsertion.ll b/test/Transforms/Mem2Reg/2003-10-05-DeadPHIInsertion.ll
new file mode 100644
index 0000000..1d38efc
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2003-10-05-DeadPHIInsertion.ll
@@ -0,0 +1,22 @@
+; Mem2reg should not insert dead PHI nodes! The naive algorithm inserts a PHI
+; node in L3, even though there is no load of %A in anything dominated by L3.
+
+; RUN: opt < %s -mem2reg -S | not grep phi
+
+define void @test(i32 %B, i1 %C) {
+ %A = alloca i32 ; <i32*> [#uses=4]
+ store i32 %B, i32* %A
+ br i1 %C, label %L1, label %L2
+L1: ; preds = %0
+ store i32 %B, i32* %A
+ %D = load i32* %A ; <i32> [#uses=1]
+ call void @test( i32 %D, i1 false )
+ br label %L3
+L2: ; preds = %0
+ %E = load i32* %A ; <i32> [#uses=1]
+ call void @test( i32 %E, i1 true )
+ br label %L3
+L3: ; preds = %L2, %L1
+ ret void
+}
+
diff --git a/test/Transforms/Mem2Reg/2005-06-30-ReadBeforeWrite.ll b/test/Transforms/Mem2Reg/2005-06-30-ReadBeforeWrite.ll
new file mode 100644
index 0000000..7435596
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2005-06-30-ReadBeforeWrite.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -mem2reg -instcombine -S | grep store
+; PR590
+
+
+define void @zero(i8* %p, i32 %n) {
+entry:
+ %p_addr = alloca i8* ; <i8**> [#uses=2]
+ %n_addr = alloca i32 ; <i32*> [#uses=2]
+ %i = alloca i32 ; <i32*> [#uses=6]
+ %out = alloca i32 ; <i32*> [#uses=2]
+ %undef = alloca i32 ; <i32*> [#uses=2]
+ store i8* %p, i8** %p_addr
+ store i32 %n, i32* %n_addr
+ store i32 0, i32* %i
+ br label %loopentry
+loopentry: ; preds = %endif, %entry
+ %tmp.0 = load i32* %n_addr ; <i32> [#uses=1]
+ %tmp.1 = add i32 %tmp.0, 1 ; <i32> [#uses=1]
+ %tmp.2 = load i32* %i ; <i32> [#uses=1]
+ %tmp.3 = icmp sgt i32 %tmp.1, %tmp.2 ; <i1> [#uses=2]
+ %tmp.4 = zext i1 %tmp.3 to i32 ; <i32> [#uses=0]
+ br i1 %tmp.3, label %no_exit, label %return
+no_exit: ; preds = %loopentry
+ %tmp.5 = load i32* %undef ; <i32> [#uses=1]
+ store i32 %tmp.5, i32* %out
+ store i32 0, i32* %undef
+ %tmp.6 = load i32* %i ; <i32> [#uses=1]
+ %tmp.7 = icmp sgt i32 %tmp.6, 0 ; <i1> [#uses=2]
+ %tmp.8 = zext i1 %tmp.7 to i32 ; <i32> [#uses=0]
+ br i1 %tmp.7, label %then, label %endif
+then: ; preds = %no_exit
+ %tmp.9 = load i8** %p_addr ; <i8*> [#uses=1]
+ %tmp.10 = load i32* %i ; <i32> [#uses=1]
+ %tmp.11 = sub i32 %tmp.10, 1 ; <i32> [#uses=1]
+ %tmp.12 = getelementptr i8* %tmp.9, i32 %tmp.11 ; <i8*> [#uses=1]
+ %tmp.13 = load i32* %out ; <i32> [#uses=1]
+ %tmp.14 = trunc i32 %tmp.13 to i8 ; <i8> [#uses=1]
+ store i8 %tmp.14, i8* %tmp.12
+ br label %endif
+endif: ; preds = %then, %no_exit
+ %tmp.15 = load i32* %i ; <i32> [#uses=1]
+ %inc = add i32 %tmp.15, 1 ; <i32> [#uses=1]
+ store i32 %inc, i32* %i
+ br label %loopentry
+return: ; preds = %loopentry
+ ret void
+}
diff --git a/test/Transforms/Mem2Reg/2005-11-28-Crash.ll b/test/Transforms/Mem2Reg/2005-11-28-Crash.ll
new file mode 100644
index 0000000..8fd3351
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2005-11-28-Crash.ll
@@ -0,0 +1,62 @@
+; RUN: opt < %s -mem2reg -disable-output
+; PR670
+
+define void @printk(i32, ...) {
+entry:
+ %flags = alloca i32 ; <i32*> [#uses=2]
+ br i1 false, label %then.0, label %endif.0
+then.0: ; preds = %entry
+ br label %endif.0
+endif.0: ; preds = %then.0, %entry
+ store i32 0, i32* %flags
+ br label %loopentry
+loopentry: ; preds = %endif.3, %endif.0
+ br i1 false, label %no_exit, label %loopexit
+no_exit: ; preds = %loopentry
+ br i1 false, label %then.1, label %endif.1
+then.1: ; preds = %no_exit
+ br i1 false, label %shortcirc_done.0, label %shortcirc_next.0
+shortcirc_next.0: ; preds = %then.1
+ br label %shortcirc_done.0
+shortcirc_done.0: ; preds = %shortcirc_next.0, %then.1
+ br i1 false, label %shortcirc_done.1, label %shortcirc_next.1
+shortcirc_next.1: ; preds = %shortcirc_done.0
+ br label %shortcirc_done.1
+shortcirc_done.1: ; preds = %shortcirc_next.1, %shortcirc_done.0
+ br i1 false, label %shortcirc_done.2, label %shortcirc_next.2
+shortcirc_next.2: ; preds = %shortcirc_done.1
+ br label %shortcirc_done.2
+shortcirc_done.2: ; preds = %shortcirc_next.2, %shortcirc_done.1
+ br i1 false, label %then.2, label %endif.2
+then.2: ; preds = %shortcirc_done.2
+ br label %endif.2
+endif.2: ; preds = %then.2, %shortcirc_done.2
+ br label %endif.1
+endif.1: ; preds = %endif.2, %no_exit
+ br i1 false, label %then.3, label %endif.3
+then.3: ; preds = %endif.1
+ br label %endif.3
+endif.3: ; preds = %then.3, %endif.1
+ br label %loopentry
+loopexit: ; preds = %loopentry
+ br label %endif.4
+then.4: ; No predecessors!
+ %tmp.61 = load i32* %flags ; <i32> [#uses=0]
+ br label %out
+dead_block_after_goto: ; No predecessors!
+ br label %endif.4
+endif.4: ; preds = %dead_block_after_goto, %loopexit
+ br i1 false, label %then.5, label %else
+then.5: ; preds = %endif.4
+ br label %endif.5
+else: ; preds = %endif.4
+ br label %endif.5
+endif.5: ; preds = %else, %then.5
+ br label %out
+out: ; preds = %endif.5, %then.4
+ br label %return
+after_ret: ; No predecessors!
+ br label %return
+return: ; preds = %after_ret, %out
+ ret void
+}
diff --git a/test/Transforms/Mem2Reg/2007-08-27-VolatileLoadsStores.ll b/test/Transforms/Mem2Reg/2007-08-27-VolatileLoadsStores.ll
new file mode 100644
index 0000000..50683cf
--- /dev/null
+++ b/test/Transforms/Mem2Reg/2007-08-27-VolatileLoadsStores.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -std-compile-opts -S | grep volatile | count 3
+; PR1520
+; Don't promote volatile loads/stores. This is really needed to handle setjmp/lonjmp properly.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.__jmp_buf_tag = type { [6 x i32], i32, %struct.__sigset_t }
+ %struct.__sigset_t = type { [32 x i32] }
+@j = external global [1 x %struct.__jmp_buf_tag] ; <[1 x %struct.__jmp_buf_tag]*> [#uses=1]
+
+define i32 @f() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=2]
+ %v = alloca i32, align 4 ; <i32*> [#uses=3]
+ %tmp = alloca i32, align 4 ; <i32*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ volatile store i32 0, i32* %v, align 4
+ %tmp1 = call i32 @_setjmp( %struct.__jmp_buf_tag* getelementptr ([1 x %struct.__jmp_buf_tag]* @j, i32 0, i32 0) ) ; <i32> [#uses=1]
+ %tmp2 = icmp ne i32 %tmp1, 0 ; <i1> [#uses=1]
+ %tmp23 = zext i1 %tmp2 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb, label %bb5
+
+bb: ; preds = %entry
+ %tmp4 = volatile load i32* %v, align 4 ; <i32> [#uses=1]
+ store i32 %tmp4, i32* %tmp, align 4
+ br label %bb6
+
+bb5: ; preds = %entry
+ volatile store i32 1, i32* %v, align 4
+ call void @g( )
+ store i32 0, i32* %tmp, align 4
+ br label %bb6
+
+bb6: ; preds = %bb5, %bb
+ %tmp7 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ store i32 %tmp7, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %bb6
+ %retval8 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval8
+}
+
+declare i32 @_setjmp(%struct.__jmp_buf_tag*)
+
+declare void @g()
diff --git a/test/Transforms/Mem2Reg/ConvertDebugInfo.ll b/test/Transforms/Mem2Reg/ConvertDebugInfo.ll
new file mode 100644
index 0000000..a013a1d
--- /dev/null
+++ b/test/Transforms/Mem2Reg/ConvertDebugInfo.ll
@@ -0,0 +1,32 @@
+; RUN: opt < %s -mem2reg -S | FileCheck %s
+
+target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+
+define double @testfunc(i32 %i, double %j) {
+ %I = alloca i32 ; <i32*> [#uses=4]
+ call void @llvm.dbg.declare(metadata !{i32* %I}, metadata !0)
+ %J = alloca double ; <double*> [#uses=2]
+ call void @llvm.dbg.declare(metadata !{double* %J}, metadata !1)
+; CHECK: call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !0)
+ store i32 %i, i32* %I
+; CHECK: call void @llvm.dbg.value(metadata !{double %j}, i64 0, metadata !1), !dbg !3
+ store double %j, double* %J, !dbg !3
+ %t1 = load i32* %I ; <i32> [#uses=1]
+ %t2 = add i32 %t1, 1 ; <i32> [#uses=1]
+ store i32 %t2, i32* %I
+ %t3 = load i32* %I ; <i32> [#uses=1]
+ %t4 = sitofp i32 %t3 to double ; <double> [#uses=1]
+ %t5 = load double* %J ; <double> [#uses=1]
+ %t6 = fmul double %t4, %t5 ; <double> [#uses=1]
+ ret double %t6
+}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+!bar = !{!0}
+!foo = !{!2}
+
+!0 = metadata !{i32 459008, metadata !1, metadata !"foo", metadata !2, i32 5, metadata !"foo"} ; [ DW_TAG_auto_variable ]
+!1 = metadata !{i32 459008, metadata !1, metadata !"foo", metadata !0, i32 5, metadata !1} ; [ DW_TAG_auto_variable ]
+!2 = metadata !{i32 458804, i32 0, metadata !2, metadata !"foo", metadata !"bar", metadata !"bar", metadata !2, i32 3, metadata !0, i1 false, i1 true} ; [ DW_TAG_variable ]
+!3 = metadata !{i32 4, i32 0, metadata !0, null}
diff --git a/test/Transforms/Mem2Reg/PromoteMemToRegister.ll b/test/Transforms/Mem2Reg/PromoteMemToRegister.ll
new file mode 100644
index 0000000..1be6b03
--- /dev/null
+++ b/test/Transforms/Mem2Reg/PromoteMemToRegister.ll
@@ -0,0 +1,18 @@
+; Simple sanity check testcase. Both alloca's should be eliminated.
+; RUN: opt < %s -mem2reg -S | not grep alloca
+
+define double @testfunc(i32 %i, double %j) {
+ %I = alloca i32 ; <i32*> [#uses=4]
+ %J = alloca double ; <double*> [#uses=2]
+ store i32 %i, i32* %I
+ store double %j, double* %J
+ %t1 = load i32* %I ; <i32> [#uses=1]
+ %t2 = add i32 %t1, 1 ; <i32> [#uses=1]
+ store i32 %t2, i32* %I
+ %t3 = load i32* %I ; <i32> [#uses=1]
+ %t4 = sitofp i32 %t3 to double ; <double> [#uses=1]
+ %t5 = load double* %J ; <double> [#uses=1]
+ %t6 = fmul double %t4, %t5 ; <double> [#uses=1]
+ ret double %t6
+}
+
diff --git a/test/Transforms/Mem2Reg/UndefValuesMerge.ll b/test/Transforms/Mem2Reg/UndefValuesMerge.ll
new file mode 100644
index 0000000..5013229
--- /dev/null
+++ b/test/Transforms/Mem2Reg/UndefValuesMerge.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -mem2reg -S | not grep phi
+
+define i32 @testfunc(i1 %C, i32 %i, i8 %j) {
+ %I = alloca i32 ; <i32*> [#uses=2]
+ br i1 %C, label %T, label %Cont
+T: ; preds = %0
+ store i32 %i, i32* %I
+ br label %Cont
+Cont: ; preds = %T, %0
+ %Y = load i32* %I ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/Mem2Reg/crash.ll b/test/Transforms/Mem2Reg/crash.ll
new file mode 100644
index 0000000..655549f
--- /dev/null
+++ b/test/Transforms/Mem2Reg/crash.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -mem2reg -S
+; PR5023
+
+declare i32 @test1f()
+
+define i32 @test1() {
+entry:
+ %whichFlag = alloca i32
+ %A = invoke i32 @test1f()
+ to label %invcont2 unwind label %lpad86
+
+invcont2:
+ store i32 %A, i32* %whichFlag
+ br label %bb15
+
+bb15:
+ %B = load i32* %whichFlag
+ ret i32 %B
+
+lpad86:
+ br label %bb15
+
+}
+
+
+
+define i32 @test2() {
+entry:
+ %whichFlag = alloca i32
+ br label %bb15
+
+bb15:
+ %B = load i32* %whichFlag
+ ret i32 %B
+
+invcont2:
+ %C = load i32* %whichFlag
+ store i32 %C, i32* %whichFlag
+ br label %bb15
+}
+
diff --git a/test/Transforms/Mem2Reg/dg.exp b/test/Transforms/Mem2Reg/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/Mem2Reg/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll b/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll
new file mode 100644
index 0000000..30c2713
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -memcpyopt -dse -S | grep {call.*initialize} | not grep memtmp
+; PR2077
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define internal fastcc void @initialize({ x86_fp80, x86_fp80 }* noalias sret %agg.result) nounwind {
+entry:
+ %agg.result.03 = getelementptr { x86_fp80, x86_fp80 }* %agg.result, i32 0, i32 0 ; <x86_fp80*> [#uses=1]
+ store x86_fp80 0xK00000000000000000000, x86_fp80* %agg.result.03
+ %agg.result.15 = getelementptr { x86_fp80, x86_fp80 }* %agg.result, i32 0, i32 1 ; <x86_fp80*> [#uses=1]
+ store x86_fp80 0xK00000000000000000000, x86_fp80* %agg.result.15
+ ret void
+}
+
+declare fastcc x86_fp80 @passed_uninitialized({ x86_fp80, x86_fp80 }* %x) nounwind
+
+define fastcc void @badly_optimized() nounwind {
+entry:
+ %z = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=2]
+ %tmp = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=2]
+ %memtmp = alloca { x86_fp80, x86_fp80 }, align 8 ; <{ x86_fp80, x86_fp80 }*> [#uses=2]
+ call fastcc void @initialize( { x86_fp80, x86_fp80 }* noalias sret %memtmp )
+ %tmp1 = bitcast { x86_fp80, x86_fp80 }* %tmp to i8* ; <i8*> [#uses=1]
+ %memtmp2 = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp1, i8* %memtmp2, i32 24, i32 8 )
+ %z3 = bitcast { x86_fp80, x86_fp80 }* %z to i8* ; <i8*> [#uses=1]
+ %tmp4 = bitcast { x86_fp80, x86_fp80 }* %tmp to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %z3, i8* %tmp4, i32 24, i32 8 )
+ %tmp5 = call fastcc x86_fp80 @passed_uninitialized( { x86_fp80, x86_fp80 }* %z ) ; <x86_fp80> [#uses=0]
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll b/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll
new file mode 100644
index 0000000..38a7271
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -memcpyopt -S | not grep {call.*memcpy.}
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+ %a = type { i32 }
+ %b = type { float }
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+declare void @g(%a*)
+
+define float @f() {
+entry:
+ %a_var = alloca %a
+ %b_var = alloca %b
+ call void @g(%a *%a_var)
+ %a_i8 = bitcast %a* %a_var to i8*
+ %b_i8 = bitcast %b* %b_var to i8*
+ call void @llvm.memcpy.i32(i8* %b_i8, i8* %a_i8, i32 4, i32 4)
+ %tmp1 = getelementptr %b* %b_var, i32 0, i32 0
+ %tmp2 = load float* %tmp1
+ ret float %tmp2
+}
diff --git a/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll b/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll
new file mode 100644
index 0000000..4fec169
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -memcpyopt -S | grep {call.*memcpy.*agg.result}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+@x = external global { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1]
+
+define void @foo({ x86_fp80, x86_fp80 }* noalias sret %agg.result) nounwind {
+entry:
+ %x.0 = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1]
+ %x.01 = bitcast { x86_fp80, x86_fp80 }* %x.0 to i8* ; <i8*> [#uses=2]
+ call void @llvm.memcpy.i32( i8* %x.01, i8* bitcast ({ x86_fp80, x86_fp80 }* @x to i8*), i32 32, i32 16 )
+ %agg.result2 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %agg.result2, i8* %x.01, i32 32, i32 16 )
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/MemCpyOpt/align.ll b/test/Transforms/MemCpyOpt/align.ll
new file mode 100644
index 0000000..47df380
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/align.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -S -memcpyopt | FileCheck %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+; The resulting memset is only 4-byte aligned, despite containing
+; a 16-byte alignmed store in the middle.
+
+; CHECK: call void @llvm.memset.i64(i8* %a01, i8 0, i64 16, i32 4)
+
+define void @foo(i32* %p) {
+ %a0 = getelementptr i32* %p, i64 0
+ store i32 0, i32* %a0, align 4
+ %a1 = getelementptr i32* %p, i64 1
+ store i32 0, i32* %a1, align 16
+ %a2 = getelementptr i32* %p, i64 2
+ store i32 0, i32* %a2, align 4
+ %a3 = getelementptr i32* %p, i64 3
+ store i32 0, i32* %a3, align 4
+ ret void
+}
diff --git a/test/Transforms/MemCpyOpt/crash.ll b/test/Transforms/MemCpyOpt/crash.ll
new file mode 100644
index 0000000..bf5b234
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/crash.ll
@@ -0,0 +1,45 @@
+; RUN: opt < %s -memcpyopt -disable-output
+; PR4882
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "armv7-eabi"
+
+%struct.qw = type { [4 x float] }
+%struct.bar = type { %struct.qw, %struct.qw, %struct.qw, %struct.qw, %struct.qw, float, float}
+
+define arm_aapcs_vfpcc void @test1(%struct.bar* %this) {
+entry:
+ %0 = getelementptr inbounds %struct.bar* %this, i32 0, i32 0, i32 0, i32 0
+ store float 0.000000e+00, float* %0, align 4
+ %1 = getelementptr inbounds %struct.bar* %this, i32 0, i32 0, i32 0, i32 1
+ store float 0.000000e+00, float* %1, align 4
+ %2 = getelementptr inbounds %struct.bar* %this, i32 0, i32 0, i32 0, i32 2
+ store float 0.000000e+00, float* %2, align 4
+ %3 = getelementptr inbounds %struct.bar* %this, i32 0, i32 0, i32 0, i32 3
+ store float 0.000000e+00, float* %3, align 4
+ %4 = getelementptr inbounds %struct.bar* %this, i32 0, i32 1, i32 0, i32 0
+ store float 0.000000e+00, float* %4, align 4
+ %5 = getelementptr inbounds %struct.bar* %this, i32 0, i32 1, i32 0, i32 1
+ store float 0.000000e+00, float* %5, align 4
+ %6 = getelementptr inbounds %struct.bar* %this, i32 0, i32 1, i32 0, i32 2
+ store float 0.000000e+00, float* %6, align 4
+ %7 = getelementptr inbounds %struct.bar* %this, i32 0, i32 1, i32 0, i32 3
+ store float 0.000000e+00, float* %7, align 4
+ %8 = getelementptr inbounds %struct.bar* %this, i32 0, i32 3, i32 0, i32 1
+ store float 0.000000e+00, float* %8, align 4
+ %9 = getelementptr inbounds %struct.bar* %this, i32 0, i32 3, i32 0, i32 2
+ store float 0.000000e+00, float* %9, align 4
+ %10 = getelementptr inbounds %struct.bar* %this, i32 0, i32 3, i32 0, i32 3
+ store float 0.000000e+00, float* %10, align 4
+ %11 = getelementptr inbounds %struct.bar* %this, i32 0, i32 4, i32 0, i32 0
+ store float 0.000000e+00, float* %11, align 4
+ %12 = getelementptr inbounds %struct.bar* %this, i32 0, i32 4, i32 0, i32 1
+ store float 0.000000e+00, float* %12, align 4
+ %13 = getelementptr inbounds %struct.bar* %this, i32 0, i32 4, i32 0, i32 2
+ store float 0.000000e+00, float* %13, align 4
+ %14 = getelementptr inbounds %struct.bar* %this, i32 0, i32 4, i32 0, i32 3
+ store float 0.000000e+00, float* %14, align 4
+ %15 = getelementptr inbounds %struct.bar* %this, i32 0, i32 5
+ store float 0.000000e+00, float* %15, align 4
+ unreachable
+}
diff --git a/test/Transforms/MemCpyOpt/dg.exp b/test/Transforms/MemCpyOpt/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/MemCpyOpt/form-memset.ll b/test/Transforms/MemCpyOpt/form-memset.ll
new file mode 100644
index 0000000..eb8dbe3
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/form-memset.ll
@@ -0,0 +1,55 @@
+; RUN: opt < %s -memcpyopt -S | not grep store
+; RUN: opt < %s -memcpyopt -S | grep {call.*llvm.memset}
+
+; All the stores in this example should be merged into a single memset.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @foo(i8 signext %c) nounwind {
+entry:
+ %x = alloca [19 x i8] ; <[19 x i8]*> [#uses=20]
+ %tmp = getelementptr [19 x i8]* %x, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp, align 1
+ %tmp5 = getelementptr [19 x i8]* %x, i32 0, i32 1 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp5, align 1
+ %tmp9 = getelementptr [19 x i8]* %x, i32 0, i32 2 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp9, align 1
+ %tmp13 = getelementptr [19 x i8]* %x, i32 0, i32 3 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp13, align 1
+ %tmp17 = getelementptr [19 x i8]* %x, i32 0, i32 4 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp17, align 1
+ %tmp21 = getelementptr [19 x i8]* %x, i32 0, i32 5 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp21, align 1
+ %tmp25 = getelementptr [19 x i8]* %x, i32 0, i32 6 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp25, align 1
+ %tmp29 = getelementptr [19 x i8]* %x, i32 0, i32 7 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp29, align 1
+ %tmp33 = getelementptr [19 x i8]* %x, i32 0, i32 8 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp33, align 1
+ %tmp37 = getelementptr [19 x i8]* %x, i32 0, i32 9 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp37, align 1
+ %tmp41 = getelementptr [19 x i8]* %x, i32 0, i32 10 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp41, align 1
+ %tmp45 = getelementptr [19 x i8]* %x, i32 0, i32 11 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp45, align 1
+ %tmp49 = getelementptr [19 x i8]* %x, i32 0, i32 12 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp49, align 1
+ %tmp53 = getelementptr [19 x i8]* %x, i32 0, i32 13 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp53, align 1
+ %tmp57 = getelementptr [19 x i8]* %x, i32 0, i32 14 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp57, align 1
+ %tmp61 = getelementptr [19 x i8]* %x, i32 0, i32 15 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp61, align 1
+ %tmp65 = getelementptr [19 x i8]* %x, i32 0, i32 16 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp65, align 1
+ %tmp69 = getelementptr [19 x i8]* %x, i32 0, i32 17 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp69, align 1
+ %tmp73 = getelementptr [19 x i8]* %x, i32 0, i32 18 ; <i8*> [#uses=1]
+ store i8 %c, i8* %tmp73, align 1
+ %tmp76 = call i32 (...)* @bar( [19 x i8]* %x ) nounwind ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @bar(...)
+
diff --git a/test/Transforms/MemCpyOpt/form-memset2.ll b/test/Transforms/MemCpyOpt/form-memset2.ll
new file mode 100644
index 0000000..c90af9c
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/form-memset2.ll
@@ -0,0 +1,99 @@
+; RUN: opt < %s -memcpyopt -S | not grep store
+; RUN: opt < %s -memcpyopt -S | grep {call.*llvm.memset} | count 3
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+ %struct.MV = type { i16, i16 }
+
+define i32 @t() nounwind {
+entry:
+ %ref_idx = alloca [8 x i8] ; <[8 x i8]*> [#uses=8]
+ %left_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17]
+ %up_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17]
+ %tmp20 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 7 ; <i8*> [#uses=1]
+ store i8 -1, i8* %tmp20, align 1
+ %tmp23 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 6 ; <i8*> [#uses=1]
+ store i8 -1, i8* %tmp23, align 1
+ %tmp26 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 5 ; <i8*> [#uses=1]
+ store i8 -1, i8* %tmp26, align 1
+ %tmp29 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 4 ; <i8*> [#uses=1]
+ store i8 -1, i8* %tmp29, align 1
+ %tmp32 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 3 ; <i8*> [#uses=1]
+ store i8 -1, i8* %tmp32, align 1
+ %tmp35 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 2 ; <i8*> [#uses=1]
+ store i8 -1, i8* %tmp35, align 1
+ %tmp38 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 1 ; <i8*> [#uses=1]
+ store i8 -1, i8* %tmp38, align 1
+ %tmp41 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 0 ; <i8*> [#uses=2]
+ store i8 -1, i8* %tmp41, align 1
+ %tmp43 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp43, align 2
+ %tmp46 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp46, align 2
+ %tmp57 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp57, align 2
+ %tmp60 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp60, align 2
+ %tmp71 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp71, align 2
+ %tmp74 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp74, align 2
+ %tmp85 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp85, align 2
+ %tmp88 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp88, align 2
+ %tmp99 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp99, align 2
+ %tmp102 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp102, align 2
+ %tmp113 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp113, align 2
+ %tmp116 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp116, align 2
+ %tmp127 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp127, align 2
+ %tmp130 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp130, align 2
+ %tmp141 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp141, align 8
+ %tmp144 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp144, align 2
+ %tmp148 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp148, align 2
+ %tmp151 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp151, align 2
+ %tmp162 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp162, align 2
+ %tmp165 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp165, align 2
+ %tmp176 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp176, align 2
+ %tmp179 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp179, align 2
+ %tmp190 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp190, align 2
+ %tmp193 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp193, align 2
+ %tmp204 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp204, align 2
+ %tmp207 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp207, align 2
+ %tmp218 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp218, align 2
+ %tmp221 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp221, align 2
+ %tmp232 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp232, align 2
+ %tmp235 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp235, align 2
+ %tmp246 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp246, align 8
+ %tmp249 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1]
+ store i16 0, i16* %tmp249, align 2
+ %up_mvd252 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1]
+ %left_mvd253 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1]
+ call void @foo( %struct.MV* %up_mvd252, %struct.MV* %left_mvd253, i8* %tmp41 ) nounwind
+ ret i32 undef
+}
+
+declare void @foo(%struct.MV*, %struct.MV*, i8*)
diff --git a/test/Transforms/MemCpyOpt/memcpy.ll b/test/Transforms/MemCpyOpt/memcpy.ll
new file mode 100644
index 0000000..724acfab
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/memcpy.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -memcpyopt -dse -S | grep {call.*memcpy} | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9"
+
+define void @ccosl({ x86_fp80, x86_fp80 }* sret %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind {
+entry:
+ %tmp2 = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1]
+ %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 ; <{ x86_fp80, x86_fp80 }*> [#uses=2]
+ %tmp5 = fsub x86_fp80 0xK80000000000000000000, %z.1 ; <x86_fp80> [#uses=1]
+ call void @ccoshl( { x86_fp80, x86_fp80 }* sret %memtmp, x86_fp80 %tmp5, x86_fp80 %z.0 ) nounwind
+ %tmp219 = bitcast { x86_fp80, x86_fp80 }* %tmp2 to i8* ; <i8*> [#uses=2]
+ %memtmp20 = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp219, i8* %memtmp20, i32 32, i32 16 )
+ %agg.result21 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %agg.result21, i8* %tmp219, i32 32, i32 16 )
+ ret void
+}
+
+declare void @ccoshl({ x86_fp80, x86_fp80 }* sret , x86_fp80, x86_fp80) nounwind
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/MemCpyOpt/memmove.ll b/test/Transforms/MemCpyOpt/memmove.ll
new file mode 100644
index 0000000..73bbf0b
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/memmove.ll
@@ -0,0 +1,37 @@
+; RUN: opt < %s -memcpyopt -S | FileCheck %s
+; These memmoves should get optimized to memcpys.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.0"
+
+declare void @llvm.memmove.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
+
+define i8* @test1(i8* nocapture %src) nounwind {
+entry:
+; CHECK: @test1
+; CHECK: call void @llvm.memcpy
+
+ %call3 = malloc [13 x i8] ; <[13 x i8]*> [#uses=1]
+ %call3.sub = getelementptr inbounds [13 x i8]* %call3, i64 0, i64 0 ; <i8*> [#uses=2]
+ tail call void @llvm.memmove.i64(i8* %call3.sub, i8* %src, i64 13, i32 1)
+ ret i8* %call3.sub
+}
+
+define void @test2(i8* %P) nounwind {
+entry:
+; CHECK: @test2
+; CHECK: call void @llvm.memcpy
+ %add.ptr = getelementptr i8* %P, i64 16 ; <i8*> [#uses=1]
+ tail call void @llvm.memmove.i64(i8* %P, i8* %add.ptr, i64 16, i32 1)
+ ret void
+}
+
+; This cannot be optimize because the src/dst really do overlap.
+define void @test3(i8* %P) nounwind {
+entry:
+; CHECK: @test3
+; CHECK: call void @llvm.memmove
+ %add.ptr = getelementptr i8* %P, i64 16 ; <i8*> [#uses=1]
+ tail call void @llvm.memmove.i64(i8* %P, i8* %add.ptr, i64 17, i32 1)
+ ret void
+}
diff --git a/test/Transforms/MemCpyOpt/sret.ll b/test/Transforms/MemCpyOpt/sret.ll
new file mode 100644
index 0000000..5002875
--- /dev/null
+++ b/test/Transforms/MemCpyOpt/sret.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -memcpyopt -S | not grep {call.*memcpy}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin9"
+
+define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 }* byval %z) nounwind {
+entry:
+ %iz = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=3]
+ %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 ; <{ x86_fp80, x86_fp80 }*> [#uses=2]
+ %tmp1 = getelementptr { x86_fp80, x86_fp80 }* %z, i32 0, i32 1 ; <x86_fp80*> [#uses=1]
+ %tmp2 = load x86_fp80* %tmp1, align 16 ; <x86_fp80> [#uses=1]
+ %tmp3 = fsub x86_fp80 0xK80000000000000000000, %tmp2 ; <x86_fp80> [#uses=1]
+ %tmp4 = getelementptr { x86_fp80, x86_fp80 }* %iz, i32 0, i32 1 ; <x86_fp80*> [#uses=1]
+ %real = getelementptr { x86_fp80, x86_fp80 }* %iz, i32 0, i32 0 ; <x86_fp80*> [#uses=1]
+ %tmp7 = getelementptr { x86_fp80, x86_fp80 }* %z, i32 0, i32 0 ; <x86_fp80*> [#uses=1]
+ %tmp8 = load x86_fp80* %tmp7, align 16 ; <x86_fp80> [#uses=1]
+ store x86_fp80 %tmp3, x86_fp80* %real, align 16
+ store x86_fp80 %tmp8, x86_fp80* %tmp4, align 16
+ call void @ccoshl( { x86_fp80, x86_fp80 }* noalias sret %memtmp, { x86_fp80, x86_fp80 }* byval %iz ) nounwind
+ %memtmp14 = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8* ; <i8*> [#uses=1]
+ %agg.result15 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %agg.result15, i8* %memtmp14, i32 32, i32 16 )
+ ret void
+}
+
+declare void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret , { x86_fp80, x86_fp80 }* byval ) nounwind
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/MergeFunc/dg.exp b/test/Transforms/MergeFunc/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/MergeFunc/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/MergeFunc/fold-weak.ll b/test/Transforms/MergeFunc/fold-weak.ll
new file mode 100644
index 0000000..e124731
--- /dev/null
+++ b/test/Transforms/MergeFunc/fold-weak.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -mergefunc -S > %t
+; RUN: grep {define weak} %t | count 2
+; RUN: grep {call} %t | count 2
+
+define weak i32 @sum(i32 %x, i32 %y) {
+ %sum = add i32 %x, %y
+ ret i32 %sum
+}
+
+define weak i32 @add(i32 %x, i32 %y) {
+ %sum = add i32 %x, %y
+ ret i32 %sum
+}
diff --git a/test/Transforms/MergeFunc/phi-speculation1.ll b/test/Transforms/MergeFunc/phi-speculation1.ll
new file mode 100644
index 0000000..7b2a2fe
--- /dev/null
+++ b/test/Transforms/MergeFunc/phi-speculation1.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -mergefunc -stats -disable-output |& not grep {functions merged}
+
+define i32 @foo1(i32 %x) {
+entry:
+ %A = add i32 %x, 1
+ %B = call i32 @foo1(i32 %A)
+ br label %loop
+loop:
+ %C = phi i32 [%B, %entry], [%D, %loop]
+ %D = add i32 %x, 2
+ %E = icmp ugt i32 %D, 10000
+ br i1 %E, label %loopexit, label %loop
+loopexit:
+ ret i32 %D
+}
+
+define i32 @foo2(i32 %x) {
+entry:
+ %0 = add i32 %x, 1
+ %1 = call i32 @foo2(i32 %0)
+ br label %loop
+loop:
+ %2 = phi i32 [%1, %entry], [%3, %loop]
+ %3 = add i32 %2, 2
+ %4 = icmp ugt i32 %3, 10000
+ br i1 %4, label %loopexit, label %loop
+loopexit:
+ ret i32 %3
+}
diff --git a/test/Transforms/MergeFunc/phi-speculation2.ll b/test/Transforms/MergeFunc/phi-speculation2.ll
new file mode 100644
index 0000000..f080191
--- /dev/null
+++ b/test/Transforms/MergeFunc/phi-speculation2.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -mergefunc -stats -disable-output |& grep {functions merged}
+
+define i32 @foo1(i32 %x) {
+entry:
+ %A = add i32 %x, 1
+ %B = call i32 @foo1(i32 %A)
+ br label %loop
+loop:
+ %C = phi i32 [%B, %entry], [%D, %loop]
+ %D = add i32 %C, 2
+ %E = icmp ugt i32 %D, 10000
+ br i1 %E, label %loopexit, label %loop
+loopexit:
+ ret i32 %D
+}
+
+define i32 @foo2(i32 %x) {
+entry:
+ %0 = add i32 %x, 1
+ %1 = call i32 @foo2(i32 %0)
+ br label %loop
+loop:
+ %2 = phi i32 [%1, %entry], [%3, %loop]
+ %3 = add i32 %2, 2
+ %4 = icmp ugt i32 %3, 10000
+ br i1 %4, label %loopexit, label %loop
+loopexit:
+ ret i32 %3
+}
diff --git a/test/Transforms/PruneEH/2003-09-14-ExternalCall.ll b/test/Transforms/PruneEH/2003-09-14-ExternalCall.ll
new file mode 100644
index 0000000..679eafd
--- /dev/null
+++ b/test/Transforms/PruneEH/2003-09-14-ExternalCall.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -prune-eh -S | grep invoke
+
+declare void @External()
+
+define void @foo() {
+ invoke void @External( )
+ to label %Cont unwind label %Cont
+Cont: ; preds = %0, %0
+ ret void
+}
+
diff --git a/test/Transforms/PruneEH/2003-11-21-PHIUpdate.ll b/test/Transforms/PruneEH/2003-11-21-PHIUpdate.ll
new file mode 100644
index 0000000..a010703
--- /dev/null
+++ b/test/Transforms/PruneEH/2003-11-21-PHIUpdate.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -prune-eh -disable-output
+
+define internal void @callee() {
+ ret void
+}
+
+define i32 @caller() {
+; <label>:0
+ invoke void @callee( )
+ to label %E unwind label %E
+E: ; preds = %0, %0
+ %X = phi i32 [ 0, %0 ], [ 0, %0 ] ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/PruneEH/2008-06-02-Weak.ll b/test/Transforms/PruneEH/2008-06-02-Weak.ll
new file mode 100644
index 0000000..fb97ae8
--- /dev/null
+++ b/test/Transforms/PruneEH/2008-06-02-Weak.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -prune-eh -S | not grep nounwind
+
+define weak void @f() {
+entry:
+ ret void
+}
+
+define void @g() {
+entry:
+ call void @f()
+ ret void
+}
diff --git a/test/Transforms/PruneEH/2008-09-05-CGUpdate.ll b/test/Transforms/PruneEH/2008-09-05-CGUpdate.ll
new file mode 100644
index 0000000..347af8f
--- /dev/null
+++ b/test/Transforms/PruneEH/2008-09-05-CGUpdate.ll
@@ -0,0 +1,1445 @@
+; RUN: opt < %s -prune-eh -inline -print-callgraph \
+; RUN: -disable-output |& \
+; RUN: grep {Calls.*ce3806g__fxio__put__put_int64__4.1339} | count 2
+ %struct.FRAME.ce3806g = type { %struct.string___XUB, %struct.string___XUB, %struct.string___XUB, %struct.string___XUB }
+ %struct.FRAME.ce3806g__fxio__put__4 = type { i32, i32, i32, %struct.system__file_control_block__pstring*, i32, i32, i8 }
+ %struct.RETURN = type { i8, i32 }
+ %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* }
+ %struct.ada__tags__dispatch_table = type { [1 x i32] }
+ %struct.ada__tags__select_specific_data = type { i32, %struct.ada__tags__select_specific_data_element }
+ %struct.ada__tags__select_specific_data_element = type { i32, i8 }
+ %struct.ada__tags__type_specific_data = type { i32, i32, [2147483647 x i8]*, [2147483647 x i8]*, %struct.ada__tags__dispatch_table*, i8, i32, i32, i32, i32, [2 x %struct.ada__tags__dispatch_table*] }
+ %struct.ada__text_io__text_afcb = type { %struct.system__file_control_block__afcb, i32, i32, i32, i32, i32, %struct.ada__text_io__text_afcb*, i8, i8 }
+ %struct.exception = type { i8, i8, i32, i8*, i8*, i32, i8* }
+ %struct.long_long_float___PAD = type { x86_fp80, [1 x i32] }
+ %struct.string___XUB = type { i32, i32 }
+ %struct.system__file_control_block__afcb = type { %struct.ada__streams__root_stream_type, i32, %struct.system__file_control_block__pstring, %struct.system__file_control_block__pstring, i8, i8, i8, i8, i8, i8, i8, %struct.system__file_control_block__afcb*, %struct.system__file_control_block__afcb* }
+ %struct.system__file_control_block__pstring = type { i8*, %struct.string___XUB* }
+ %struct.system__finalization_implementation__limited_record_controller = type { %struct.system__finalization_root__root_controlled, %struct.system__finalization_root__root_controlled* }
+ %struct.system__finalization_implementation__record_controller = type { %struct.system__finalization_implementation__limited_record_controller, i32 }
+ %struct.system__finalization_root__empty_root_controlled = type { %struct.ada__tags__dispatch_table* }
+ %struct.system__finalization_root__root_controlled = type { %struct.ada__streams__root_stream_type, %struct.system__finalization_root__root_controlled*, %struct.system__finalization_root__root_controlled* }
+ %struct.system__secondary_stack__mark_id = type { i32, i32 }
+ %struct.system__standard_library__exception_data = type { i8, i8, i32, i32, %struct.system__standard_library__exception_data*, i32, void ()* }
[email protected] = internal constant [12 x i8] c"system.ads\00\00" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"a-tifiio.adb\00\00" ; <[14 x i8]*> [#uses=1]
+@system__soft_links__abort_undefer = external global void ()* ; <void ()**> [#uses=6]
[email protected] = internal constant [47 x i8] c"a-tifiio.adb:327 instantiated at ce3806g.adb:52" ; <[47 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 47 } ; <%struct.string___XUB*> [#uses=1]
+@ada__io_exceptions__data_error = external global %struct.exception ; <%struct.exception*> [#uses=1]
+@constraint_error = external global %struct.exception ; <%struct.exception*> [#uses=2]
+@__gnat_all_others_value = external constant i32 ; <i32*> [#uses=21]
[email protected] = internal constant [10 x i8] c"0123456789" ; <[10 x i8]*> [#uses=2]
+@ada__text_io__current_out = external global %struct.ada__text_io__text_afcb* ; <%struct.ada__text_io__text_afcb**> [#uses=1]
[email protected] = internal constant [126 x i8] c"CHECK THAT FIXED_IO PUT OPERATES ON FILES OF MODE OUT_FILE AND IF NO FILE IS SPECIFIED THE CURRENT DEFAULT OUTPUT FILE IS USED" ; <[126 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 126 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [7 x i8] c"CE3806G" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 7 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal global i1 false ; <i1*> [#uses=2]
[email protected] = internal global %struct.exception { i8 0, i8 65, i32 23, i8* getelementptr ([23 x i8]* @incompleteE.1174, i32 0, i32 0), i8* null, i32 0, i8* null } ; <%struct.exception*> [#uses=15]
[email protected] = internal global [23 x i8] c"CE3806G.B_1.INCOMPLETE\00" ; <[23 x i8]*> [#uses=1]
[email protected] = internal constant [0 x i8] zeroinitializer ; <[0 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [50 x i8] c"USE_ERROR RAISED ON TEXT CREATE WITH OUT_FILE MODE" ; <[50 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 50 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [14 x i8] c"ce3806g.adb:65" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 14 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [51 x i8] c"NAME_ERROR RAISED ON TEXT CREATE WITH OUT_FILE MODE" ; <[51 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 51 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [14 x i8] c"ce3806g.adb:69" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 14 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [47 x i8] c"USE_ERROR RAISED ON TEXT OPEN WITH IN_FILE MODE" ; <[47 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 47 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [14 x i8] c"ce3806g.adb:88" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 14 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [33 x i8] c"VALUE INCORRECT - FIXED FROM FILE" ; <[33 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 33 } ; <%struct.string___XUB*> [#uses=1]
[email protected] = internal constant [36 x i8] c"VALUE INCORRECT - FIXED FROM DEFAULT" ; <[36 x i8]*> [#uses=1]
[email protected] = internal constant %struct.string___XUB { i32 1, i32 36 } ; <%struct.string___XUB*> [#uses=1]
+@ada__io_exceptions__use_error = external global %struct.exception ; <%struct.exception*> [#uses=4]
+@ada__io_exceptions__name_error = external global %struct.exception ; <%struct.exception*> [#uses=2]
+
+define void @_ada_ce3806g() {
+entry:
+ %0 = alloca %struct.system__file_control_block__pstring, align 8 ; <%struct.system__file_control_block__pstring*> [#uses=3]
+ %1 = alloca %struct.system__file_control_block__pstring, align 8 ; <%struct.system__file_control_block__pstring*> [#uses=3]
+ %2 = alloca %struct.system__file_control_block__pstring, align 8 ; <%struct.system__file_control_block__pstring*> [#uses=3]
+ %3 = alloca %struct.system__file_control_block__pstring, align 8 ; <%struct.system__file_control_block__pstring*> [#uses=3]
+ %FRAME.356 = alloca %struct.FRAME.ce3806g ; <%struct.FRAME.ce3806g*> [#uses=20]
+ call void @report__test( i8* getelementptr ([7 x i8]* @.str5, i32 0, i32 0), %struct.string___XUB* @C.132.1562, i8* getelementptr ([126 x i8]* @.str4, i32 0, i32 0), %struct.string___XUB* @C.131.1559 )
+ %4 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 3 ; <%struct.string___XUB*> [#uses=1]
+ call void @system__secondary_stack__ss_mark( %struct.string___XUB* noalias sret %4 )
+ %.b = load i1* @incompleteF.1176.b ; <i1> [#uses=1]
+ br i1 %.b, label %bb11, label %bb
+
+bb: ; preds = %entry
+ invoke void @system__exception_table__register_exception( %struct.system__standard_library__exception_data* bitcast (%struct.exception* @incomplete.1177 to %struct.system__standard_library__exception_data*) )
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %bb
+ store i1 true, i1* @incompleteF.1176.b
+ br label %bb11
+
+bb11: ; preds = %entry, %invcont
+ %5 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 2 ; <%struct.string___XUB*> [#uses=1]
+ invoke void @system__secondary_stack__ss_mark( %struct.string___XUB* noalias sret %5 )
+ to label %invcont12 unwind label %lpad228
+
+invcont12: ; preds = %bb11
+ invoke void @report__legal_file_name( %struct.system__file_control_block__pstring* noalias sret %3, i32 1, i8* getelementptr ([0 x i8]* @.str6, i32 0, i32 0), %struct.string___XUB* @C.137.1571 )
+ to label %invcont17 unwind label %lpad232
+
+invcont17: ; preds = %invcont12
+ %elt18 = getelementptr %struct.system__file_control_block__pstring* %3, i32 0, i32 0 ; <i8**> [#uses=1]
+ %val19 = load i8** %elt18, align 8 ; <i8*> [#uses=1]
+ %elt20 = getelementptr %struct.system__file_control_block__pstring* %3, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %val21 = load %struct.string___XUB** %elt20 ; <%struct.string___XUB*> [#uses=1]
+ %6 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__create( %struct.ada__text_io__text_afcb* null, i8 2, i8* %val19, %struct.string___XUB* %val21, i8* getelementptr ([0 x i8]* @.str6, i32 0, i32 0), %struct.string___XUB* @C.136.1568 )
+ to label %invcont26 unwind label %lpad232 ; <%struct.ada__text_io__text_afcb*> [#uses=2]
+
+invcont26: ; preds = %invcont17
+ %7 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 2, i32 0 ; <i32*> [#uses=1]
+ %8 = load i32* %7, align 8 ; <i32> [#uses=1]
+ %9 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 2, i32 1 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 4 ; <i32> [#uses=1]
+ invoke void @system__secondary_stack__ss_release( i32 %8, i32 %10 )
+ to label %bb73 unwind label %lpad228
+
+bb32: ; preds = %lpad232
+ call void @__gnat_begin_handler( i8* %eh_ptr233 ) nounwind
+ %11 = load void ()** @system__soft_links__abort_undefer, align 4 ; <void ()*> [#uses=1]
+ invoke void %11( )
+ to label %invcont33 unwind label %lpad240
+
+invcont33: ; preds = %bb32
+ invoke void @report__not_applicable( i8* getelementptr ([50 x i8]* @.str7, i32 0, i32 0), %struct.string___XUB* @C.139.1577 )
+ to label %invcont38 unwind label %lpad240
+
+invcont38: ; preds = %invcont33
+ invoke void @__gnat_raise_exception( %struct.system__standard_library__exception_data* bitcast (%struct.exception* @incomplete.1177 to %struct.system__standard_library__exception_data*), i8* getelementptr ([14 x i8]* @.str8, i32 0, i32 0), %struct.string___XUB* @C.140.1580 ) noreturn
+ to label %invcont43 unwind label %lpad240
+
+invcont43: ; preds = %invcont38
+ unreachable
+
+bb47: ; preds = %ppad291
+ call void @__gnat_begin_handler( i8* %eh_ptr233 ) nounwind
+ %12 = load void ()** @system__soft_links__abort_undefer, align 4 ; <void ()*> [#uses=1]
+ invoke void %12( )
+ to label %invcont49 unwind label %lpad248
+
+invcont49: ; preds = %bb47
+ invoke void @report__not_applicable( i8* getelementptr ([51 x i8]* @.str9, i32 0, i32 0), %struct.string___XUB* @C.143.1585 )
+ to label %invcont54 unwind label %lpad248
+
+invcont54: ; preds = %invcont49
+ invoke void @__gnat_raise_exception( %struct.system__standard_library__exception_data* bitcast (%struct.exception* @incomplete.1177 to %struct.system__standard_library__exception_data*), i8* getelementptr ([14 x i8]* @.str10, i32 0, i32 0), %struct.string___XUB* @C.144.1588 ) noreturn
+ to label %invcont59 unwind label %lpad248
+
+invcont59: ; preds = %invcont54
+ unreachable
+
+bb73: ; preds = %invcont26
+ invoke void @report__legal_file_name( %struct.system__file_control_block__pstring* noalias sret %2, i32 2, i8* getelementptr ([0 x i8]* @.str6, i32 0, i32 0), %struct.string___XUB* @C.147.1595 )
+ to label %invcont78 unwind label %lpad228
+
+invcont78: ; preds = %bb73
+ %elt79 = getelementptr %struct.system__file_control_block__pstring* %2, i32 0, i32 0 ; <i8**> [#uses=1]
+ %val80 = load i8** %elt79, align 8 ; <i8*> [#uses=1]
+ %elt81 = getelementptr %struct.system__file_control_block__pstring* %2, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %val82 = load %struct.string___XUB** %elt81 ; <%struct.string___XUB*> [#uses=1]
+ %13 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__create( %struct.ada__text_io__text_afcb* null, i8 2, i8* %val80, %struct.string___XUB* %val82, i8* getelementptr ([0 x i8]* @.str6, i32 0, i32 0), %struct.string___XUB* @C.146.1592 )
+ to label %invcont87 unwind label %lpad228 ; <%struct.ada__text_io__text_afcb*> [#uses=2]
+
+invcont87: ; preds = %invcont78
+ invoke void @ada__text_io__set_output( %struct.ada__text_io__text_afcb* %13 )
+ to label %invcont88 unwind label %lpad228
+
+invcont88: ; preds = %invcont87
+ %14 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 1 ; <%struct.string___XUB*> [#uses=1]
+ invoke void @system__secondary_stack__ss_mark( %struct.string___XUB* noalias sret %14 )
+ to label %invcont89 unwind label %lpad228
+
+invcont89: ; preds = %invcont88
+ invoke fastcc void @ce3806g__fxio__put.1149( %struct.ada__text_io__text_afcb* %6 )
+ to label %bb94 unwind label %lpad252
+
+bb94: ; preds = %invcont89
+ invoke fastcc void @ce3806g__fxio__put__2.1155( )
+ to label %invcont95 unwind label %lpad252
+
+invcont95: ; preds = %bb94
+ %15 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__close( %struct.ada__text_io__text_afcb* %6 )
+ to label %invcont96 unwind label %lpad252 ; <%struct.ada__text_io__text_afcb*> [#uses=1]
+
+invcont96: ; preds = %invcont95
+ %16 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 0 ; <%struct.string___XUB*> [#uses=1]
+ invoke void @system__secondary_stack__ss_mark( %struct.string___XUB* noalias sret %16 )
+ to label %invcont97 unwind label %lpad252
+
+invcont97: ; preds = %invcont96
+ invoke void @report__legal_file_name( %struct.system__file_control_block__pstring* noalias sret %1, i32 1, i8* getelementptr ([0 x i8]* @.str6, i32 0, i32 0), %struct.string___XUB* @C.154.1612 )
+ to label %invcont102 unwind label %lpad256
+
+invcont102: ; preds = %invcont97
+ %elt103 = getelementptr %struct.system__file_control_block__pstring* %1, i32 0, i32 0 ; <i8**> [#uses=1]
+ %val104 = load i8** %elt103, align 8 ; <i8*> [#uses=1]
+ %elt105 = getelementptr %struct.system__file_control_block__pstring* %1, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %val106 = load %struct.string___XUB** %elt105 ; <%struct.string___XUB*> [#uses=1]
+ %17 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__open( %struct.ada__text_io__text_afcb* %15, i8 0, i8* %val104, %struct.string___XUB* %val106, i8* getelementptr ([0 x i8]* @.str6, i32 0, i32 0), %struct.string___XUB* @C.153.1609 )
+ to label %invcont111 unwind label %lpad256 ; <%struct.ada__text_io__text_afcb*> [#uses=2]
+
+invcont111: ; preds = %invcont102
+ %18 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %19 = load i32* %18, align 8 ; <i32> [#uses=1]
+ %20 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 0, i32 1 ; <i32*> [#uses=1]
+ %21 = load i32* %20, align 4 ; <i32> [#uses=1]
+ invoke void @system__secondary_stack__ss_release( i32 %19, i32 %21 )
+ to label %bb143 unwind label %lpad252
+
+bb117: ; preds = %lpad256
+ call void @__gnat_begin_handler( i8* %eh_ptr257 ) nounwind
+ %22 = load void ()** @system__soft_links__abort_undefer, align 4 ; <void ()*> [#uses=1]
+ invoke void %22( )
+ to label %invcont119 unwind label %lpad264
+
+invcont119: ; preds = %bb117
+ invoke void @report__not_applicable( i8* getelementptr ([47 x i8]* @.str12, i32 0, i32 0), %struct.string___XUB* @C.156.1618 )
+ to label %invcont124 unwind label %lpad264
+
+invcont124: ; preds = %invcont119
+ invoke void @__gnat_raise_exception( %struct.system__standard_library__exception_data* bitcast (%struct.exception* @incomplete.1177 to %struct.system__standard_library__exception_data*), i8* getelementptr ([14 x i8]* @.str13, i32 0, i32 0), %struct.string___XUB* @C.157.1621 ) noreturn
+ to label %invcont129 unwind label %lpad264
+
+invcont129: ; preds = %invcont124
+ unreachable
+
+bb143: ; preds = %invcont111
+ %23 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__standard_output( )
+ to label %invcont144 unwind label %lpad252 ; <%struct.ada__text_io__text_afcb*> [#uses=1]
+
+invcont144: ; preds = %bb143
+ invoke void @ada__text_io__set_output( %struct.ada__text_io__text_afcb* %23 )
+ to label %invcont145 unwind label %lpad252
+
+invcont145: ; preds = %invcont144
+ %24 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__close( %struct.ada__text_io__text_afcb* %13 )
+ to label %invcont146 unwind label %lpad252 ; <%struct.ada__text_io__text_afcb*> [#uses=1]
+
+invcont146: ; preds = %invcont145
+ invoke void @report__legal_file_name( %struct.system__file_control_block__pstring* noalias sret %0, i32 2, i8* getelementptr ([0 x i8]* @.str6, i32 0, i32 0), %struct.string___XUB* @C.160.1630 )
+ to label %invcont151 unwind label %lpad252
+
+invcont151: ; preds = %invcont146
+ %elt152 = getelementptr %struct.system__file_control_block__pstring* %0, i32 0, i32 0 ; <i8**> [#uses=1]
+ %val153 = load i8** %elt152, align 8 ; <i8*> [#uses=1]
+ %elt154 = getelementptr %struct.system__file_control_block__pstring* %0, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %val155 = load %struct.string___XUB** %elt154 ; <%struct.string___XUB*> [#uses=1]
+ %25 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__open( %struct.ada__text_io__text_afcb* %24, i8 0, i8* %val153, %struct.string___XUB* %val155, i8* getelementptr ([0 x i8]* @.str6, i32 0, i32 0), %struct.string___XUB* @C.159.1627 )
+ to label %invcont160 unwind label %lpad252 ; <%struct.ada__text_io__text_afcb*> [#uses=2]
+
+invcont160: ; preds = %invcont151
+ %26 = invoke fastcc i8 @ce3806g__fxio__get.1137( %struct.ada__text_io__text_afcb* %17 ) signext
+ to label %invcont161 unwind label %lpad252 ; <i8> [#uses=1]
+
+invcont161: ; preds = %invcont160
+ %27 = icmp eq i8 %26, -3 ; <i1> [#uses=1]
+ br i1 %27, label %bb169, label %bb163
+
+bb163: ; preds = %invcont161
+ invoke void @report__failed( i8* getelementptr ([33 x i8]* @.str14, i32 0, i32 0), %struct.string___XUB* @C.162.1637 )
+ to label %bb169 unwind label %lpad252
+
+bb169: ; preds = %invcont161, %bb163
+ %28 = invoke fastcc i8 @ce3806g__fxio__get.1137( %struct.ada__text_io__text_afcb* %25 ) signext
+ to label %invcont170 unwind label %lpad252 ; <i8> [#uses=1]
+
+invcont170: ; preds = %bb169
+ %29 = icmp eq i8 %28, -1 ; <i1> [#uses=1]
+ br i1 %29, label %bb187, label %bb172
+
+bb172: ; preds = %invcont170
+ invoke void @report__failed( i8* getelementptr ([36 x i8]* @.str15, i32 0, i32 0), %struct.string___XUB* @C.164.1642 )
+ to label %bb187 unwind label %lpad252
+
+bb187: ; preds = %invcont170, %bb172
+ %30 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 1, i32 0 ; <i32*> [#uses=1]
+ %31 = load i32* %30, align 8 ; <i32> [#uses=1]
+ %32 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 1, i32 1 ; <i32*> [#uses=1]
+ %33 = load i32* %32, align 4 ; <i32> [#uses=1]
+ invoke void @system__secondary_stack__ss_release( i32 %31, i32 %33 )
+ to label %bb193 unwind label %lpad228
+
+bb193: ; preds = %bb187
+ %34 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__delete( %struct.ada__text_io__text_afcb* %17 )
+ to label %invcont194 unwind label %lpad268 ; <%struct.ada__text_io__text_afcb*> [#uses=0]
+
+invcont194: ; preds = %bb193
+ %35 = invoke %struct.ada__text_io__text_afcb* @ada__text_io__delete( %struct.ada__text_io__text_afcb* %25 )
+ to label %bb221 unwind label %lpad268 ; <%struct.ada__text_io__text_afcb*> [#uses=0]
+
+bb196: ; preds = %lpad268
+ call void @__gnat_begin_handler( i8* %eh_ptr269 ) nounwind
+ %36 = load void ()** @system__soft_links__abort_undefer, align 4 ; <void ()*> [#uses=1]
+ invoke void %36( )
+ to label %bb203 unwind label %lpad276
+
+bb203: ; preds = %bb196
+ invoke void @__gnat_end_handler( i8* %eh_ptr269 )
+ to label %bb221 unwind label %lpad272
+
+bb205: ; preds = %ppad304
+ call void @__gnat_begin_handler( i8* %eh_exception.1 ) nounwind
+ %37 = load void ()** @system__soft_links__abort_undefer, align 4 ; <void ()*> [#uses=1]
+ invoke void %37( )
+ to label %bb212 unwind label %lpad284
+
+bb212: ; preds = %bb205
+ invoke void @__gnat_end_handler( i8* %eh_exception.1 )
+ to label %bb221 unwind label %lpad280
+
+bb221: ; preds = %invcont194, %bb212, %bb203
+ %38 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 3, i32 0 ; <i32*> [#uses=1]
+ %39 = load i32* %38, align 8 ; <i32> [#uses=1]
+ %40 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 3, i32 1 ; <i32*> [#uses=1]
+ %41 = load i32* %40, align 4 ; <i32> [#uses=1]
+ call void @system__secondary_stack__ss_release( i32 %39, i32 %41 )
+ call void @report__result( )
+ ret void
+
+lpad: ; preds = %bb
+ %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select227 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_all_others_value ) ; <i32> [#uses=0]
+ br label %ppad
+
+lpad228: ; preds = %bb187, %ppad294, %invcont88, %invcont87, %invcont78, %bb73, %ppad288, %invcont26, %bb11
+ %eh_ptr229 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select231 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr229, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ br label %ppad304
+
+lpad232: ; preds = %invcont17, %invcont12
+ %eh_ptr233 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=6]
+ %eh_select235 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr233, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @ada__io_exceptions__use_error, %struct.exception* @ada__io_exceptions__name_error, %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=3]
+ %eh_typeid = call i32 @llvm.eh.typeid.for.i32( i8* getelementptr (%struct.exception* @ada__io_exceptions__use_error, i32 0, i32 0) ) ; <i32> [#uses=1]
+ %42 = icmp eq i32 %eh_select235, %eh_typeid ; <i1> [#uses=1]
+ br i1 %42, label %bb32, label %ppad291
+
+lpad236: ; preds = %lpad240
+ %eh_ptr237 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select239 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr237, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ br label %ppad288
+
+lpad240: ; preds = %invcont38, %invcont33, %bb32
+ %eh_ptr241 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select243 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr241, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ invoke void @__gnat_end_handler( i8* %eh_ptr233 )
+ to label %ppad288 unwind label %lpad236
+
+lpad244: ; preds = %lpad248
+ %eh_ptr245 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select247 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr245, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ br label %ppad288
+
+lpad248: ; preds = %invcont54, %invcont49, %bb47
+ %eh_ptr249 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select251 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr249, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ invoke void @__gnat_end_handler( i8* %eh_ptr233 )
+ to label %ppad288 unwind label %lpad244
+
+lpad252: ; preds = %bb94, %invcont89, %invcont160, %bb169, %bb172, %bb163, %invcont151, %invcont146, %invcont145, %invcont144, %bb143, %ppad295, %invcont111, %invcont96, %invcont95
+ %eh_ptr253 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select255 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr253, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ br label %ppad294
+
+lpad256: ; preds = %invcont102, %invcont97
+ %eh_ptr257 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=4]
+ %eh_select259 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr257, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @ada__io_exceptions__use_error, %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=2]
+ %eh_typeid297 = call i32 @llvm.eh.typeid.for.i32( i8* getelementptr (%struct.exception* @ada__io_exceptions__use_error, i32 0, i32 0) ) ; <i32> [#uses=1]
+ %43 = icmp eq i32 %eh_select259, %eh_typeid297 ; <i1> [#uses=1]
+ br i1 %43, label %bb117, label %ppad295
+
+lpad260: ; preds = %lpad264
+ %eh_ptr261 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select263 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr261, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ br label %ppad295
+
+lpad264: ; preds = %invcont124, %invcont119, %bb117
+ %eh_ptr265 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select267 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr265, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ invoke void @__gnat_end_handler( i8* %eh_ptr257 )
+ to label %ppad295 unwind label %lpad260
+
+lpad268: ; preds = %invcont194, %bb193
+ %eh_ptr269 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=5]
+ %eh_select271 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr269, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @ada__io_exceptions__use_error, %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=2]
+ %eh_typeid301 = call i32 @llvm.eh.typeid.for.i32( i8* getelementptr (%struct.exception* @ada__io_exceptions__use_error, i32 0, i32 0) ) ; <i32> [#uses=1]
+ %44 = icmp eq i32 %eh_select271, %eh_typeid301 ; <i1> [#uses=1]
+ br i1 %44, label %bb196, label %ppad304
+
+lpad272: ; preds = %bb203, %lpad276
+ %eh_ptr273 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select275 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr273, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ br label %ppad304
+
+lpad276: ; preds = %bb196
+ %eh_ptr277 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select279 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr277, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @incomplete.1177, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ invoke void @__gnat_end_handler( i8* %eh_ptr269 )
+ to label %ppad304 unwind label %lpad272
+
+lpad280: ; preds = %bb212, %lpad284
+ %eh_ptr281 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select283 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr281, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_all_others_value ) ; <i32> [#uses=0]
+ br label %ppad
+
+lpad284: ; preds = %bb205
+ %eh_ptr285 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select287 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr285, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_all_others_value ) ; <i32> [#uses=0]
+ invoke void @__gnat_end_handler( i8* %eh_exception.1 )
+ to label %ppad unwind label %lpad280
+
+ppad: ; preds = %lpad284, %ppad304, %lpad280, %lpad
+ %eh_exception.2 = phi i8* [ %eh_exception.1, %ppad304 ], [ %eh_ptr281, %lpad280 ], [ %eh_ptr, %lpad ], [ %eh_ptr285, %lpad284 ] ; <i8*> [#uses=1]
+ %45 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 3, i32 0 ; <i32*> [#uses=1]
+ %46 = load i32* %45, align 8 ; <i32> [#uses=1]
+ %47 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 3, i32 1 ; <i32*> [#uses=1]
+ %48 = load i32* %47, align 4 ; <i32> [#uses=1]
+ call void @system__secondary_stack__ss_release( i32 %46, i32 %48 )
+ %49 = call i32 (...)* @_Unwind_Resume( i8* %eh_exception.2 ) ; <i32> [#uses=0]
+ unreachable
+
+ppad288: ; preds = %lpad248, %lpad240, %ppad291, %lpad244, %lpad236
+ %eh_exception.0 = phi i8* [ %eh_ptr233, %ppad291 ], [ %eh_ptr245, %lpad244 ], [ %eh_ptr237, %lpad236 ], [ %eh_ptr241, %lpad240 ], [ %eh_ptr249, %lpad248 ] ; <i8*> [#uses=1]
+ %eh_selector.0 = phi i32 [ %eh_select235, %ppad291 ], [ %eh_select247, %lpad244 ], [ %eh_select239, %lpad236 ], [ %eh_select243, %lpad240 ], [ %eh_select251, %lpad248 ] ; <i32> [#uses=1]
+ %50 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 2, i32 0 ; <i32*> [#uses=1]
+ %51 = load i32* %50, align 8 ; <i32> [#uses=1]
+ %52 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 2, i32 1 ; <i32*> [#uses=1]
+ %53 = load i32* %52, align 4 ; <i32> [#uses=1]
+ invoke void @system__secondary_stack__ss_release( i32 %51, i32 %53 )
+ to label %ppad304 unwind label %lpad228
+
+ppad291: ; preds = %lpad232
+ %eh_typeid292 = call i32 @llvm.eh.typeid.for.i32( i8* getelementptr (%struct.exception* @ada__io_exceptions__name_error, i32 0, i32 0) ) ; <i32> [#uses=1]
+ %54 = icmp eq i32 %eh_select235, %eh_typeid292 ; <i1> [#uses=1]
+ br i1 %54, label %bb47, label %ppad288
+
+ppad294: ; preds = %ppad295, %lpad252
+ %eh_exception.4 = phi i8* [ %eh_ptr253, %lpad252 ], [ %eh_exception.3, %ppad295 ] ; <i8*> [#uses=1]
+ %eh_selector.4 = phi i32 [ %eh_select255, %lpad252 ], [ %eh_selector.3, %ppad295 ] ; <i32> [#uses=1]
+ %55 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 1, i32 0 ; <i32*> [#uses=1]
+ %56 = load i32* %55, align 8 ; <i32> [#uses=1]
+ %57 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 1, i32 1 ; <i32*> [#uses=1]
+ %58 = load i32* %57, align 4 ; <i32> [#uses=1]
+ invoke void @system__secondary_stack__ss_release( i32 %56, i32 %58 )
+ to label %ppad304 unwind label %lpad228
+
+ppad295: ; preds = %lpad264, %lpad256, %lpad260
+ %eh_exception.3 = phi i8* [ %eh_ptr257, %lpad256 ], [ %eh_ptr261, %lpad260 ], [ %eh_ptr265, %lpad264 ] ; <i8*> [#uses=1]
+ %eh_selector.3 = phi i32 [ %eh_select259, %lpad256 ], [ %eh_select263, %lpad260 ], [ %eh_select267, %lpad264 ] ; <i32> [#uses=1]
+ %59 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %60 = load i32* %59, align 8 ; <i32> [#uses=1]
+ %61 = getelementptr %struct.FRAME.ce3806g* %FRAME.356, i32 0, i32 0, i32 1 ; <i32*> [#uses=1]
+ %62 = load i32* %61, align 4 ; <i32> [#uses=1]
+ invoke void @system__secondary_stack__ss_release( i32 %60, i32 %62 )
+ to label %ppad294 unwind label %lpad252
+
+ppad304: ; preds = %lpad276, %ppad294, %ppad288, %lpad268, %lpad272, %lpad228
+ %eh_exception.1 = phi i8* [ %eh_ptr229, %lpad228 ], [ %eh_ptr269, %lpad268 ], [ %eh_ptr273, %lpad272 ], [ %eh_exception.0, %ppad288 ], [ %eh_exception.4, %ppad294 ], [ %eh_ptr277, %lpad276 ] ; <i8*> [#uses=4]
+ %eh_selector.1 = phi i32 [ %eh_select231, %lpad228 ], [ %eh_select271, %lpad268 ], [ %eh_select275, %lpad272 ], [ %eh_selector.0, %ppad288 ], [ %eh_selector.4, %ppad294 ], [ %eh_select279, %lpad276 ] ; <i32> [#uses=1]
+ %eh_typeid305 = call i32 @llvm.eh.typeid.for.i32( i8* getelementptr (%struct.exception* @incomplete.1177, i32 0, i32 0) ) ; <i32> [#uses=1]
+ %63 = icmp eq i32 %eh_selector.1, %eh_typeid305 ; <i1> [#uses=1]
+ br i1 %63, label %bb205, label %ppad
+}
+
+define internal fastcc i8 @ce3806g__fxio__get.1137(%struct.ada__text_io__text_afcb* %file) signext {
+entry:
+ %0 = invoke x86_fp80 @ada__text_io__float_aux__get( %struct.ada__text_io__text_afcb* %file, i32 0 )
+ to label %invcont unwind label %lpad ; <x86_fp80> [#uses=5]
+
+invcont: ; preds = %entry
+ %1 = fcmp ult x86_fp80 %0, 0xKFFFEFFFFFFFFFFFFFFFF ; <i1> [#uses=1]
+ %2 = fcmp ugt x86_fp80 %0, 0xK7FFEFFFFFFFFFFFFFFFF ; <i1> [#uses=1]
+ %or.cond = or i1 %1, %2 ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb2, label %bb4
+
+bb2: ; preds = %invcont
+ invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 1 ) noreturn
+ to label %invcont3 unwind label %lpad
+
+invcont3: ; preds = %bb2
+ unreachable
+
+bb4: ; preds = %invcont
+ %3 = fmul x86_fp80 %0, 0xK40008000000000000000 ; <x86_fp80> [#uses=1]
+ %4 = fcmp ult x86_fp80 %3, 0xKC0068000000000000000 ; <i1> [#uses=1]
+ br i1 %4, label %bb8, label %bb6
+
+bb6: ; preds = %bb4
+ %5 = fmul x86_fp80 %0, 0xK40008000000000000000 ; <x86_fp80> [#uses=1]
+ %6 = fcmp ugt x86_fp80 %5, 0xK4005FE00000000000000 ; <i1> [#uses=1]
+ br i1 %6, label %bb8, label %bb10
+
+bb8: ; preds = %bb4, %bb6
+ invoke void @__gnat_rcheck_10( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 324 ) noreturn
+ to label %invcont9 unwind label %lpad
+
+invcont9: ; preds = %bb8
+ unreachable
+
+bb10: ; preds = %bb6
+ %7 = fmul x86_fp80 %0, 0xK40008000000000000000 ; <x86_fp80> [#uses=3]
+ %8 = fcmp ult x86_fp80 %7, 0xK00000000000000000000 ; <i1> [#uses=1]
+ br i1 %8, label %bb13, label %bb12
+
+bb12: ; preds = %bb10
+ %9 = fadd x86_fp80 %7, 0xK3FFDFFFFFFFFFFFFFFFF ; <x86_fp80> [#uses=1]
+ br label %bb14
+
+bb13: ; preds = %bb10
+ %10 = fsub x86_fp80 %7, 0xK3FFDFFFFFFFFFFFFFFFF ; <x86_fp80> [#uses=1]
+ br label %bb14
+
+bb14: ; preds = %bb13, %bb12
+ %iftmp.339.0.in = phi x86_fp80 [ %10, %bb13 ], [ %9, %bb12 ] ; <x86_fp80> [#uses=1]
+ %iftmp.339.0 = fptosi x86_fp80 %iftmp.339.0.in to i8 ; <i8> [#uses=3]
+ %11 = add i8 %iftmp.339.0, 20 ; <i8> [#uses=1]
+ %12 = icmp ugt i8 %11, 40 ; <i1> [#uses=1]
+ br i1 %12, label %bb16, label %bb18
+
+bb16: ; preds = %bb14
+ invoke void @__gnat_rcheck_12( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 324 ) noreturn
+ to label %invcont17 unwind label %lpad
+
+invcont17: ; preds = %bb16
+ unreachable
+
+bb18: ; preds = %bb14
+ %13 = add i8 %iftmp.339.0, 20 ; <i8> [#uses=1]
+ %14 = icmp ugt i8 %13, 40 ; <i1> [#uses=1]
+ br i1 %14, label %bb20, label %bb22
+
+bb20: ; preds = %bb18
+ invoke void @__gnat_rcheck_12( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 324 ) noreturn
+ to label %invcont21 unwind label %lpad
+
+invcont21: ; preds = %bb20
+ unreachable
+
+bb22: ; preds = %bb18
+ ret i8 %iftmp.339.0
+
+bb23: ; preds = %lpad
+ call void @__gnat_begin_handler( i8* %eh_ptr ) nounwind
+ %15 = load void ()** @system__soft_links__abort_undefer, align 4 ; <void ()*> [#uses=1]
+ invoke void %15( )
+ to label %invcont24 unwind label %lpad33
+
+invcont24: ; preds = %bb23
+ invoke void @__gnat_raise_exception( %struct.system__standard_library__exception_data* bitcast (%struct.exception* @ada__io_exceptions__data_error to %struct.system__standard_library__exception_data*), i8* getelementptr ([47 x i8]* @.str2, i32 0, i32 0), %struct.string___XUB* @C.354.2200 ) noreturn
+ to label %invcont27 unwind label %lpad33
+
+invcont27: ; preds = %invcont24
+ unreachable
+
+lpad: ; preds = %bb20, %bb16, %bb8, %bb2, %entry
+ %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=4]
+ %eh_select32 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), %struct.exception* @constraint_error, i32* @__gnat_all_others_value ) ; <i32> [#uses=1]
+ %eh_typeid = call i32 @llvm.eh.typeid.for.i32( i8* getelementptr (%struct.exception* @constraint_error, i32 0, i32 0) ) ; <i32> [#uses=1]
+ %16 = icmp eq i32 %eh_select32, %eh_typeid ; <i1> [#uses=1]
+ br i1 %16, label %bb23, label %Unwind
+
+lpad33: ; preds = %invcont24, %bb23
+ %eh_ptr34 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select36 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr34, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_all_others_value ) ; <i32> [#uses=0]
+ call void @__gnat_end_handler( i8* %eh_ptr )
+ br label %Unwind
+
+Unwind: ; preds = %lpad, %lpad33
+ %eh_exception.0 = phi i8* [ %eh_ptr, %lpad ], [ %eh_ptr34, %lpad33 ] ; <i8*> [#uses=1]
+ %17 = call i32 (...)* @_Unwind_Resume( i8* %eh_exception.0 ) ; <i32> [#uses=0]
+ unreachable
+}
+
+define internal fastcc void @ce3806g__fxio__put.1149(%struct.ada__text_io__text_afcb* %file) {
+entry:
+ %A.301 = alloca %struct.string___XUB ; <%struct.string___XUB*> [#uses=3]
+ %A.292 = alloca %struct.string___XUB ; <%struct.string___XUB*> [#uses=3]
+ %0 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %1 = alloca [12 x i8] ; <[12 x i8]*> [#uses=1]
+ %.sub = getelementptr [12 x i8]* %1, i32 0, i32 0 ; <i8*> [#uses=2]
+ %2 = getelementptr %struct.string___XUB* %A.292, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %2, align 8
+ %3 = getelementptr %struct.string___XUB* %A.292, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 12, i32* %3, align 4
+ %4 = invoke fastcc i32 @ce3806g__fxio__put__4.1215( i8* %.sub, %struct.string___XUB* %A.292, i8 signext -3 )
+ to label %invcont unwind label %lpad ; <i32> [#uses=1]
+
+invcont: ; preds = %entry
+ %5 = getelementptr %struct.string___XUB* %A.301, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %5, align 8
+ %6 = getelementptr %struct.string___XUB* %A.301, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %4, i32* %6, align 4
+ invoke void @ada__text_io__generic_aux__put_item( %struct.ada__text_io__text_afcb* %file, i8* %.sub, %struct.string___XUB* %A.301 )
+ to label %bb60 unwind label %lpad
+
+bb60: ; preds = %invcont
+ ret void
+
+lpad: ; preds = %entry, %invcont
+ %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select62 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_all_others_value ) ; <i32> [#uses=0]
+ call void @llvm.stackrestore( i8* %0 )
+ %7 = call i32 (...)* @_Unwind_Resume( i8* %eh_ptr ) ; <i32> [#uses=0]
+ unreachable
+}
+
+define internal fastcc void @ce3806g__fxio__put__2.1155() {
+entry:
+ %A.266 = alloca %struct.string___XUB ; <%struct.string___XUB*> [#uses=3]
+ %A.257 = alloca %struct.string___XUB ; <%struct.string___XUB*> [#uses=3]
+ %0 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %1 = alloca [12 x i8] ; <[12 x i8]*> [#uses=1]
+ %.sub = getelementptr [12 x i8]* %1, i32 0, i32 0 ; <i8*> [#uses=2]
+ %2 = getelementptr %struct.string___XUB* %A.257, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %2, align 8
+ %3 = getelementptr %struct.string___XUB* %A.257, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 12, i32* %3, align 4
+ %4 = invoke fastcc i32 @ce3806g__fxio__put__4.1215( i8* %.sub, %struct.string___XUB* %A.257, i8 signext -1 )
+ to label %invcont unwind label %lpad ; <i32> [#uses=1]
+
+invcont: ; preds = %entry
+ %5 = getelementptr %struct.string___XUB* %A.266, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %5, align 8
+ %6 = getelementptr %struct.string___XUB* %A.266, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %4, i32* %6, align 4
+ %7 = load %struct.ada__text_io__text_afcb** @ada__text_io__current_out, align 4 ; <%struct.ada__text_io__text_afcb*> [#uses=1]
+ invoke void @ada__text_io__generic_aux__put_item( %struct.ada__text_io__text_afcb* %7, i8* %.sub, %struct.string___XUB* %A.266 )
+ to label %bb60 unwind label %lpad
+
+bb60: ; preds = %invcont
+ ret void
+
+lpad: ; preds = %entry, %invcont
+ %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select62 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_all_others_value ) ; <i32> [#uses=0]
+ call void @llvm.stackrestore( i8* %0 )
+ %8 = call i32 (...)* @_Unwind_Resume( i8* %eh_ptr ) ; <i32> [#uses=0]
+ unreachable
+}
+
+define internal fastcc i32 @ce3806g__fxio__put__4.1215(i8* %to.0, %struct.string___XUB* %to.1, i8 signext %item) {
+entry:
+ %P0 = load i32 * @__gnat_all_others_value, align 4 ; <i32*> [#uses=1]
+ %P = alloca i32, i32 %P0 ; <i32*> [#uses=1]
+ call void @ext( i32* %P )
+ %to_addr = alloca %struct.system__file_control_block__pstring ; <%struct.system__file_control_block__pstring*> [#uses=4]
+ %FRAME.358 = alloca %struct.FRAME.ce3806g__fxio__put__4 ; <%struct.FRAME.ce3806g__fxio__put__4*> [#uses=65]
+ %0 = getelementptr %struct.system__file_control_block__pstring* %to_addr, i32 0, i32 0 ; <i8**> [#uses=1]
+ store i8* %to.0, i8** %0, align 8
+ %1 = getelementptr %struct.system__file_control_block__pstring* %to_addr, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ store %struct.string___XUB* %to.1, %struct.string___XUB** %1
+ %2 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ store %struct.system__file_control_block__pstring* %to_addr, %struct.system__file_control_block__pstring** %2, align 4
+ %3 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 3, i32* %3, align 8
+ %4 = getelementptr %struct.system__file_control_block__pstring* %to_addr, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1]
+ %5 = load %struct.string___XUB** %4, align 4 ; <%struct.string___XUB*> [#uses=1]
+ %6 = getelementptr %struct.string___XUB* %5, i32 0, i32 0 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ %8 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %7, i32* %8, align 8
+ %9 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 2 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 8 ; <i32> [#uses=1]
+ %11 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ store i32 %10, i32* %11, align 8
+ %item.lobit = lshr i8 %item, 7 ; <i8> [#uses=1]
+ %12 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 6 ; <i8*> [#uses=1]
+ store i8 %item.lobit, i8* %12, align 8
+ %13 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 2 ; <i32*> [#uses=1]
+ %14 = load i32* %13, align 8 ; <i32> [#uses=1]
+ %15 = add i32 %14, -1 ; <i32> [#uses=1]
+ %16 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %15, i32* %16, align 4
+ %17 = sext i8 %item to i64 ; <i64> [#uses=1]
+ %18 = call i64 @system__exn_lli__exn_long_long_integer( i64 10, i32 1 ) readnone ; <i64> [#uses=1]
+ %19 = sub i64 0, %18 ; <i64> [#uses=1]
+ %20 = call i64 @system__exn_lli__exn_long_long_integer( i64 10, i32 0 ) readnone ; <i64> [#uses=1]
+ %21 = mul i64 %20, -2 ; <i64> [#uses=1]
+ call fastcc void @ce3806g__fxio__put__put_scaled__4.1346( %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i64 %17, i64 %19, i64 %21, i32 0, i32 -1 )
+ %22 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %23 = load i32* %22, align 4 ; <i32> [#uses=1]
+ %24 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 2 ; <i32*> [#uses=1]
+ %25 = load i32* %24, align 8 ; <i32> [#uses=1]
+ %26 = icmp slt i32 %23, %25 ; <i1> [#uses=1]
+ br i1 %26, label %bb71, label %bb72
+
+bb71: ; preds = %entry
+ %27 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 0, i32* %27, align 4
+ br label %bb72
+
+bb72: ; preds = %entry, %bb102, %bb71
+ %28 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 1 ; <i32*> [#uses=1]
+ %29 = load i32* %28, align 4 ; <i32> [#uses=1]
+ %30 = icmp slt i32 %29, -1 ; <i1> [#uses=1]
+ %31 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %32 = load i32* %31, align 4 ; <i32> [#uses=2]
+ br i1 %30, label %bb103, label %bb74
+
+bb74: ; preds = %bb72
+ %33 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 2 ; <i32*> [#uses=1]
+ %34 = load i32* %33, align 8 ; <i32> [#uses=1]
+ %35 = add i32 %34, -1 ; <i32> [#uses=1]
+ %36 = icmp eq i32 %32, %35 ; <i1> [#uses=1]
+ %37 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 1 ; <i32*> [#uses=1]
+ %38 = load i32* %37, align 4 ; <i32> [#uses=2]
+ br i1 %36, label %bb76, label %bb98
+
+bb76: ; preds = %bb74
+ %39 = icmp slt i32 %38, 1 ; <i1> [#uses=1]
+ br i1 %39, label %bb80, label %bb102
+
+bb80: ; preds = %bb76
+ %40 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 1 ; <i32*> [#uses=1]
+ %41 = load i32* %40, align 4 ; <i32> [#uses=2]
+ %42 = icmp sgt i32 %41, -1 ; <i1> [#uses=1]
+ %.op = add i32 %41, 2 ; <i32> [#uses=1]
+ %43 = select i1 %42, i32 %.op, i32 2 ; <i32> [#uses=1]
+ %44 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 6 ; <i8*> [#uses=1]
+ %45 = load i8* %44, align 8 ; <i8> [#uses=1]
+ %46 = zext i8 %45 to i32 ; <i32> [#uses=1]
+ %47 = add i32 %43, %46 ; <i32> [#uses=2]
+ %48 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 0 ; <i32*> [#uses=1]
+ %49 = load i32* %48, align 8 ; <i32> [#uses=1]
+ %50 = icmp sgt i32 %47, %49 ; <i1> [#uses=1]
+ br i1 %50, label %bb88, label %bb85
+
+bb85: ; preds = %bb80, %bb87
+ %j.0 = phi i32 [ %68, %bb87 ], [ %47, %bb80 ] ; <i32> [#uses=2]
+ %51 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %52 = load i32* %51, align 4 ; <i32> [#uses=1]
+ %53 = add i32 %52, 1 ; <i32> [#uses=1]
+ %54 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %53, i32* %54, align 4
+ %55 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ %56 = load i32* %55, align 8 ; <i32> [#uses=1]
+ %57 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %58 = load %struct.system__file_control_block__pstring** %57, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %59 = getelementptr %struct.system__file_control_block__pstring* %58, i32 0, i32 0 ; <i8**> [#uses=1]
+ %60 = load i8** %59, align 4 ; <i8*> [#uses=1]
+ %61 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %62 = load i32* %61, align 4 ; <i32> [#uses=1]
+ %63 = sub i32 %62, %56 ; <i32> [#uses=1]
+ %64 = getelementptr i8* %60, i32 %63 ; <i8*> [#uses=1]
+ store i8 32, i8* %64, align 1
+ %65 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 0 ; <i32*> [#uses=1]
+ %66 = load i32* %65, align 8 ; <i32> [#uses=1]
+ %67 = icmp eq i32 %66, %j.0 ; <i1> [#uses=1]
+ br i1 %67, label %bb88, label %bb87
+
+bb87: ; preds = %bb85
+ %68 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ br label %bb85
+
+bb88: ; preds = %bb80, %bb85
+ %69 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 6 ; <i8*> [#uses=1]
+ %70 = load i8* %69, align 8 ; <i8> [#uses=1]
+ %toBool89 = icmp eq i8 %70, 0 ; <i1> [#uses=1]
+ br i1 %toBool89, label %bb91, label %bb90
+
+bb90: ; preds = %bb88
+ %71 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %72 = load i32* %71, align 4 ; <i32> [#uses=1]
+ %73 = add i32 %72, 1 ; <i32> [#uses=1]
+ %74 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %73, i32* %74, align 4
+ %75 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ %76 = load i32* %75, align 8 ; <i32> [#uses=1]
+ %77 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %78 = load %struct.system__file_control_block__pstring** %77, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %79 = getelementptr %struct.system__file_control_block__pstring* %78, i32 0, i32 0 ; <i8**> [#uses=1]
+ %80 = load i8** %79, align 4 ; <i8*> [#uses=1]
+ %81 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %82 = load i32* %81, align 4 ; <i32> [#uses=1]
+ %83 = sub i32 %82, %76 ; <i32> [#uses=1]
+ %84 = getelementptr i8* %80, i32 %83 ; <i8*> [#uses=1]
+ store i8 45, i8* %84, align 1
+ br label %bb91
+
+bb91: ; preds = %bb88, %bb90
+ %85 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 1 ; <i32*> [#uses=1]
+ %86 = load i32* %85, align 4 ; <i32> [#uses=1]
+ %87 = icmp slt i32 %86, 0 ; <i1> [#uses=1]
+ br i1 %87, label %bb93, label %bb97
+
+bb93: ; preds = %bb91
+ %88 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %89 = load i32* %88, align 4 ; <i32> [#uses=1]
+ %90 = add i32 %89, 1 ; <i32> [#uses=1]
+ %91 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %90, i32* %91, align 4
+ %92 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ %93 = load i32* %92, align 8 ; <i32> [#uses=1]
+ %94 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %95 = load %struct.system__file_control_block__pstring** %94, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %96 = getelementptr %struct.system__file_control_block__pstring* %95, i32 0, i32 0 ; <i8**> [#uses=1]
+ %97 = load i8** %96, align 4 ; <i8*> [#uses=1]
+ %98 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %99 = load i32* %98, align 4 ; <i32> [#uses=1]
+ %100 = sub i32 %99, %93 ; <i32> [#uses=1]
+ %101 = getelementptr i8* %97, i32 %100 ; <i8*> [#uses=1]
+ store i8 48, i8* %101, align 1
+ %102 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %103 = load i32* %102, align 4 ; <i32> [#uses=1]
+ %104 = add i32 %103, 1 ; <i32> [#uses=1]
+ %105 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %104, i32* %105, align 4
+ %106 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ %107 = load i32* %106, align 8 ; <i32> [#uses=1]
+ %108 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %109 = load %struct.system__file_control_block__pstring** %108, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %110 = getelementptr %struct.system__file_control_block__pstring* %109, i32 0, i32 0 ; <i8**> [#uses=1]
+ %111 = load i8** %110, align 4 ; <i8*> [#uses=1]
+ %112 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %113 = load i32* %112, align 4 ; <i32> [#uses=1]
+ %114 = sub i32 %113, %107 ; <i32> [#uses=1]
+ %115 = getelementptr i8* %111, i32 %114 ; <i8*> [#uses=1]
+ store i8 46, i8* %115, align 1
+ %116 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 1 ; <i32*> [#uses=1]
+ %117 = load i32* %116, align 4 ; <i32> [#uses=1]
+ br label %bb94
+
+bb94: ; preds = %bb96, %bb93
+ %j8.0 = phi i32 [ %117, %bb93 ], [ %133, %bb96 ] ; <i32> [#uses=2]
+ %118 = icmp sgt i32 %j8.0, -2 ; <i1> [#uses=1]
+ br i1 %118, label %bb97, label %bb96
+
+bb96: ; preds = %bb94
+ %119 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %120 = load i32* %119, align 4 ; <i32> [#uses=1]
+ %121 = add i32 %120, 1 ; <i32> [#uses=1]
+ %122 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %121, i32* %122, align 4
+ %123 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ %124 = load i32* %123, align 8 ; <i32> [#uses=1]
+ %125 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %126 = load %struct.system__file_control_block__pstring** %125, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %127 = getelementptr %struct.system__file_control_block__pstring* %126, i32 0, i32 0 ; <i8**> [#uses=1]
+ %128 = load i8** %127, align 4 ; <i8*> [#uses=1]
+ %129 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %130 = load i32* %129, align 4 ; <i32> [#uses=1]
+ %131 = sub i32 %130, %124 ; <i32> [#uses=1]
+ %132 = getelementptr i8* %128, i32 %131 ; <i8*> [#uses=1]
+ store i8 48, i8* %132, align 1
+ %133 = add i32 %j8.0, 1 ; <i32> [#uses=1]
+ br label %bb94
+
+bb97: ; preds = %bb91, %bb94
+ %134 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %135 = load i32* %134, align 4 ; <i32> [#uses=1]
+ %136 = add i32 %135, 1 ; <i32> [#uses=1]
+ %137 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %136, i32* %137, align 4
+ %138 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ %139 = load i32* %138, align 8 ; <i32> [#uses=1]
+ %140 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %141 = load %struct.system__file_control_block__pstring** %140, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %142 = getelementptr %struct.system__file_control_block__pstring* %141, i32 0, i32 0 ; <i8**> [#uses=1]
+ %143 = load i8** %142, align 4 ; <i8*> [#uses=1]
+ %144 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %145 = load i32* %144, align 4 ; <i32> [#uses=1]
+ %146 = sub i32 %145, %139 ; <i32> [#uses=1]
+ %147 = getelementptr i8* %143, i32 %146 ; <i8*> [#uses=1]
+ store i8 48, i8* %147, align 1
+ br label %bb102
+
+bb98: ; preds = %bb74
+ %148 = icmp eq i32 %38, -1 ; <i1> [#uses=1]
+ br i1 %148, label %bb100, label %bb101
+
+bb100: ; preds = %bb98
+ %149 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %150 = load i32* %149, align 4 ; <i32> [#uses=1]
+ %151 = add i32 %150, 1 ; <i32> [#uses=1]
+ %152 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %151, i32* %152, align 4
+ %153 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ %154 = load i32* %153, align 8 ; <i32> [#uses=1]
+ %155 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %156 = load %struct.system__file_control_block__pstring** %155, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %157 = getelementptr %struct.system__file_control_block__pstring* %156, i32 0, i32 0 ; <i8**> [#uses=1]
+ %158 = load i8** %157, align 4 ; <i8*> [#uses=1]
+ %159 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %160 = load i32* %159, align 4 ; <i32> [#uses=1]
+ %161 = sub i32 %160, %154 ; <i32> [#uses=1]
+ %162 = getelementptr i8* %158, i32 %161 ; <i8*> [#uses=1]
+ store i8 46, i8* %162, align 1
+ br label %bb101
+
+bb101: ; preds = %bb98, %bb100
+ %163 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %164 = load i32* %163, align 4 ; <i32> [#uses=1]
+ %165 = add i32 %164, 1 ; <i32> [#uses=1]
+ %166 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %165, i32* %166, align 4
+ %167 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 4 ; <i32*> [#uses=1]
+ %168 = load i32* %167, align 8 ; <i32> [#uses=1]
+ %169 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %170 = load %struct.system__file_control_block__pstring** %169, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %171 = getelementptr %struct.system__file_control_block__pstring* %170, i32 0, i32 0 ; <i8**> [#uses=1]
+ %172 = load i8** %171, align 4 ; <i8*> [#uses=1]
+ %173 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 5 ; <i32*> [#uses=1]
+ %174 = load i32* %173, align 4 ; <i32> [#uses=1]
+ %175 = sub i32 %174, %168 ; <i32> [#uses=1]
+ %176 = getelementptr i8* %172, i32 %175 ; <i8*> [#uses=1]
+ store i8 48, i8* %176, align 1
+ br label %bb102
+
+bb102: ; preds = %bb76, %bb101, %bb97
+ %177 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 1 ; <i32*> [#uses=1]
+ %178 = load i32* %177, align 4 ; <i32> [#uses=1]
+ %179 = add i32 %178, -1 ; <i32> [#uses=1]
+ %180 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %FRAME.358, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %179, i32* %180, align 4
+ br label %bb72
+
+bb103: ; preds = %bb72
+ ret i32 %32
+}
+
+declare x86_fp80 @ada__text_io__float_aux__get(%struct.ada__text_io__text_afcb*, i32)
+
+declare void @__gnat_rcheck_12(i8*, i32) noreturn
+
+declare void @__gnat_rcheck_10(i8*, i32) noreturn
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
+
+declare i32 @llvm.eh.typeid.for.i32(i8*) nounwind
+
+declare void @__gnat_begin_handler(i8*) nounwind
+
+declare void @__gnat_raise_exception(%struct.system__standard_library__exception_data*, i8*, %struct.string___XUB*) noreturn
+
+declare void @__gnat_end_handler(i8*)
+
+declare i32 @__gnat_eh_personality(...)
+
+declare i32 @_Unwind_Resume(...)
+
+define internal fastcc void @ce3806g__fxio__put__put_int64__4.1339(%struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i64 %x, i32 %scale) {
+entry:
+ %0 = icmp eq i64 %x, 0 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb
+
+bb: ; preds = %entry
+ %1 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %scale, i32* %1, align 4
+ %2 = add i64 %x, 9 ; <i64> [#uses=1]
+ %3 = icmp ugt i64 %2, 18 ; <i1> [#uses=1]
+ br i1 %3, label %bb18, label %bb19
+
+bb18: ; preds = %bb
+ %4 = add i32 %scale, 1 ; <i32> [#uses=1]
+ %5 = sdiv i64 %x, 10 ; <i64> [#uses=1]
+ call fastcc void @ce3806g__fxio__put__put_int64__4.1339( %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i64 %5, i32 %4 )
+ br label %bb19
+
+bb19: ; preds = %bb, %bb18
+ %6 = srem i64 %x, 10 ; <i64> [#uses=3]
+ %neg = sub i64 0, %6 ; <i64> [#uses=1]
+ %abscond = icmp sgt i64 %6, -1 ; <i1> [#uses=1]
+ %abs = select i1 %abscond, i64 %6, i64 %neg ; <i64> [#uses=3]
+ %7 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %8 = load i32* %7, align 4 ; <i32> [#uses=1]
+ %9 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 2 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 4 ; <i32> [#uses=1]
+ %11 = add i32 %10, -1 ; <i32> [#uses=1]
+ %12 = icmp eq i32 %8, %11 ; <i1> [#uses=1]
+ br i1 %12, label %bb23, label %bb44
+
+bb23: ; preds = %bb19
+ %13 = icmp ne i64 %abs, 0 ; <i1> [#uses=1]
+ %14 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 1 ; <i32*> [#uses=1]
+ %15 = load i32* %14, align 4 ; <i32> [#uses=1]
+ %16 = icmp slt i32 %15, 1 ; <i1> [#uses=1]
+ %17 = or i1 %13, %16 ; <i1> [#uses=1]
+ br i1 %17, label %bb27, label %bb48
+
+bb27: ; preds = %bb23
+ %18 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 1 ; <i32*> [#uses=1]
+ %19 = load i32* %18, align 4 ; <i32> [#uses=2]
+ %20 = icmp sgt i32 %19, -1 ; <i1> [#uses=1]
+ %.op = add i32 %19, 2 ; <i32> [#uses=1]
+ %21 = select i1 %20, i32 %.op, i32 2 ; <i32> [#uses=1]
+ %22 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 6 ; <i8*> [#uses=1]
+ %23 = load i8* %22, align 1 ; <i8> [#uses=1]
+ %24 = zext i8 %23 to i32 ; <i32> [#uses=1]
+ %25 = add i32 %21, %24 ; <i32> [#uses=2]
+ %26 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 0 ; <i32*> [#uses=1]
+ %27 = load i32* %26, align 4 ; <i32> [#uses=1]
+ %28 = icmp sgt i32 %25, %27 ; <i1> [#uses=1]
+ br i1 %28, label %bb34, label %bb31
+
+bb31: ; preds = %bb27, %bb33
+ %j.0 = phi i32 [ %46, %bb33 ], [ %25, %bb27 ] ; <i32> [#uses=2]
+ %29 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %30 = load i32* %29, align 4 ; <i32> [#uses=1]
+ %31 = add i32 %30, 1 ; <i32> [#uses=1]
+ %32 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %31, i32* %32, align 4
+ %33 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 4 ; <i32*> [#uses=1]
+ %34 = load i32* %33, align 4 ; <i32> [#uses=1]
+ %35 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %36 = load %struct.system__file_control_block__pstring** %35, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %37 = getelementptr %struct.system__file_control_block__pstring* %36, i32 0, i32 0 ; <i8**> [#uses=1]
+ %38 = load i8** %37, align 4 ; <i8*> [#uses=1]
+ %39 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %40 = load i32* %39, align 4 ; <i32> [#uses=1]
+ %41 = sub i32 %40, %34 ; <i32> [#uses=1]
+ %42 = getelementptr i8* %38, i32 %41 ; <i8*> [#uses=1]
+ store i8 32, i8* %42, align 1
+ %43 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 0 ; <i32*> [#uses=1]
+ %44 = load i32* %43, align 4 ; <i32> [#uses=1]
+ %45 = icmp eq i32 %44, %j.0 ; <i1> [#uses=1]
+ br i1 %45, label %bb34, label %bb33
+
+bb33: ; preds = %bb31
+ %46 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ br label %bb31
+
+bb34: ; preds = %bb27, %bb31
+ %47 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 6 ; <i8*> [#uses=1]
+ %48 = load i8* %47, align 1 ; <i8> [#uses=1]
+ %toBool35 = icmp eq i8 %48, 0 ; <i1> [#uses=1]
+ br i1 %toBool35, label %bb37, label %bb36
+
+bb36: ; preds = %bb34
+ %49 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %50 = load i32* %49, align 4 ; <i32> [#uses=1]
+ %51 = add i32 %50, 1 ; <i32> [#uses=1]
+ %52 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %51, i32* %52, align 4
+ %53 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 4 ; <i32*> [#uses=1]
+ %54 = load i32* %53, align 4 ; <i32> [#uses=1]
+ %55 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %56 = load %struct.system__file_control_block__pstring** %55, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %57 = getelementptr %struct.system__file_control_block__pstring* %56, i32 0, i32 0 ; <i8**> [#uses=1]
+ %58 = load i8** %57, align 4 ; <i8*> [#uses=1]
+ %59 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %60 = load i32* %59, align 4 ; <i32> [#uses=1]
+ %61 = sub i32 %60, %54 ; <i32> [#uses=1]
+ %62 = getelementptr i8* %58, i32 %61 ; <i8*> [#uses=1]
+ store i8 45, i8* %62, align 1
+ br label %bb37
+
+bb37: ; preds = %bb34, %bb36
+ %63 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 1 ; <i32*> [#uses=1]
+ %64 = load i32* %63, align 4 ; <i32> [#uses=1]
+ %65 = icmp slt i32 %64, 0 ; <i1> [#uses=1]
+ br i1 %65, label %bb39, label %bb43
+
+bb39: ; preds = %bb37
+ %66 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %67 = load i32* %66, align 4 ; <i32> [#uses=1]
+ %68 = add i32 %67, 1 ; <i32> [#uses=1]
+ %69 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %68, i32* %69, align 4
+ %70 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 4 ; <i32*> [#uses=1]
+ %71 = load i32* %70, align 4 ; <i32> [#uses=1]
+ %72 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %73 = load %struct.system__file_control_block__pstring** %72, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %74 = getelementptr %struct.system__file_control_block__pstring* %73, i32 0, i32 0 ; <i8**> [#uses=1]
+ %75 = load i8** %74, align 4 ; <i8*> [#uses=1]
+ %76 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %77 = load i32* %76, align 4 ; <i32> [#uses=1]
+ %78 = sub i32 %77, %71 ; <i32> [#uses=1]
+ %79 = getelementptr i8* %75, i32 %78 ; <i8*> [#uses=1]
+ store i8 48, i8* %79, align 1
+ %80 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %81 = load i32* %80, align 4 ; <i32> [#uses=1]
+ %82 = add i32 %81, 1 ; <i32> [#uses=1]
+ %83 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %82, i32* %83, align 4
+ %84 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 4 ; <i32*> [#uses=1]
+ %85 = load i32* %84, align 4 ; <i32> [#uses=1]
+ %86 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %87 = load %struct.system__file_control_block__pstring** %86, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %88 = getelementptr %struct.system__file_control_block__pstring* %87, i32 0, i32 0 ; <i8**> [#uses=1]
+ %89 = load i8** %88, align 4 ; <i8*> [#uses=1]
+ %90 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %91 = load i32* %90, align 4 ; <i32> [#uses=1]
+ %92 = sub i32 %91, %85 ; <i32> [#uses=1]
+ %93 = getelementptr i8* %89, i32 %92 ; <i8*> [#uses=1]
+ store i8 46, i8* %93, align 1
+ %94 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 1 ; <i32*> [#uses=1]
+ %95 = load i32* %94, align 4 ; <i32> [#uses=1]
+ br label %bb40
+
+bb40: ; preds = %bb42, %bb39
+ %j15.0 = phi i32 [ %95, %bb39 ], [ %111, %bb42 ] ; <i32> [#uses=2]
+ %96 = icmp sgt i32 %j15.0, -2 ; <i1> [#uses=1]
+ br i1 %96, label %bb43, label %bb42
+
+bb42: ; preds = %bb40
+ %97 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %98 = load i32* %97, align 4 ; <i32> [#uses=1]
+ %99 = add i32 %98, 1 ; <i32> [#uses=1]
+ %100 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %99, i32* %100, align 4
+ %101 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 4 ; <i32*> [#uses=1]
+ %102 = load i32* %101, align 4 ; <i32> [#uses=1]
+ %103 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %104 = load %struct.system__file_control_block__pstring** %103, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %105 = getelementptr %struct.system__file_control_block__pstring* %104, i32 0, i32 0 ; <i8**> [#uses=1]
+ %106 = load i8** %105, align 4 ; <i8*> [#uses=1]
+ %107 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %108 = load i32* %107, align 4 ; <i32> [#uses=1]
+ %109 = sub i32 %108, %102 ; <i32> [#uses=1]
+ %110 = getelementptr i8* %106, i32 %109 ; <i8*> [#uses=1]
+ store i8 48, i8* %110, align 1
+ %111 = add i32 %j15.0, 1 ; <i32> [#uses=1]
+ br label %bb40
+
+bb43: ; preds = %bb37, %bb40
+ %112 = trunc i64 %abs to i32 ; <i32> [#uses=1]
+ %113 = getelementptr [10 x i8]* @.str3, i32 0, i32 %112 ; <i8*> [#uses=1]
+ %114 = load i8* %113, align 1 ; <i8> [#uses=1]
+ %115 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %116 = load i32* %115, align 4 ; <i32> [#uses=1]
+ %117 = add i32 %116, 1 ; <i32> [#uses=1]
+ %118 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %117, i32* %118, align 4
+ %119 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 4 ; <i32*> [#uses=1]
+ %120 = load i32* %119, align 4 ; <i32> [#uses=1]
+ %121 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %122 = load %struct.system__file_control_block__pstring** %121, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %123 = getelementptr %struct.system__file_control_block__pstring* %122, i32 0, i32 0 ; <i8**> [#uses=1]
+ %124 = load i8** %123, align 4 ; <i8*> [#uses=1]
+ %125 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %126 = load i32* %125, align 4 ; <i32> [#uses=1]
+ %127 = sub i32 %126, %120 ; <i32> [#uses=1]
+ %128 = getelementptr i8* %124, i32 %127 ; <i8*> [#uses=1]
+ store i8 %114, i8* %128, align 1
+ br label %bb48
+
+bb44: ; preds = %bb19
+ %129 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 1 ; <i32*> [#uses=1]
+ %130 = load i32* %129, align 4 ; <i32> [#uses=1]
+ %131 = icmp eq i32 %130, -1 ; <i1> [#uses=1]
+ br i1 %131, label %bb46, label %bb47
+
+bb46: ; preds = %bb44
+ %132 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %133 = load i32* %132, align 4 ; <i32> [#uses=1]
+ %134 = add i32 %133, 1 ; <i32> [#uses=1]
+ %135 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %134, i32* %135, align 4
+ %136 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 4 ; <i32*> [#uses=1]
+ %137 = load i32* %136, align 4 ; <i32> [#uses=1]
+ %138 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %139 = load %struct.system__file_control_block__pstring** %138, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %140 = getelementptr %struct.system__file_control_block__pstring* %139, i32 0, i32 0 ; <i8**> [#uses=1]
+ %141 = load i8** %140, align 4 ; <i8*> [#uses=1]
+ %142 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %143 = load i32* %142, align 4 ; <i32> [#uses=1]
+ %144 = sub i32 %143, %137 ; <i32> [#uses=1]
+ %145 = getelementptr i8* %141, i32 %144 ; <i8*> [#uses=1]
+ store i8 46, i8* %145, align 1
+ br label %bb47
+
+bb47: ; preds = %bb44, %bb46
+ %146 = trunc i64 %abs to i32 ; <i32> [#uses=1]
+ %147 = getelementptr [10 x i8]* @.str3, i32 0, i32 %146 ; <i8*> [#uses=1]
+ %148 = load i8* %147, align 1 ; <i8> [#uses=1]
+ %149 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %150 = load i32* %149, align 4 ; <i32> [#uses=1]
+ %151 = add i32 %150, 1 ; <i32> [#uses=1]
+ %152 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ store i32 %151, i32* %152, align 4
+ %153 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 4 ; <i32*> [#uses=1]
+ %154 = load i32* %153, align 4 ; <i32> [#uses=1]
+ %155 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 3 ; <%struct.system__file_control_block__pstring**> [#uses=1]
+ %156 = load %struct.system__file_control_block__pstring** %155, align 4 ; <%struct.system__file_control_block__pstring*> [#uses=1]
+ %157 = getelementptr %struct.system__file_control_block__pstring* %156, i32 0, i32 0 ; <i8**> [#uses=1]
+ %158 = load i8** %157, align 4 ; <i8*> [#uses=1]
+ %159 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 5 ; <i32*> [#uses=1]
+ %160 = load i32* %159, align 4 ; <i32> [#uses=1]
+ %161 = sub i32 %160, %154 ; <i32> [#uses=1]
+ %162 = getelementptr i8* %158, i32 %161 ; <i8*> [#uses=1]
+ store i8 %148, i8* %162, align 1
+ br label %bb48
+
+bb48: ; preds = %bb23, %bb47, %bb43
+ %163 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 1 ; <i32*> [#uses=1]
+ %164 = load i32* %163, align 4 ; <i32> [#uses=1]
+ %165 = add i32 %164, -1 ; <i32> [#uses=1]
+ %166 = getelementptr %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.361, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %165, i32* %166, align 4
+ ret void
+
+return: ; preds = %entry
+ ret void
+}
+
+define internal fastcc void @ce3806g__fxio__put__put_scaled__4.1346(%struct.FRAME.ce3806g__fxio__put__4* %CHAIN.365, i64 %x, i64 %y, i64 %z, i32 %a, i32 %e) {
+entry:
+ %0 = alloca { i64, i64 } ; <{ i64, i64 }*> [#uses=3]
+ %1 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=1]
+ %2 = add i32 %a, 17 ; <i32> [#uses=2]
+ %3 = sdiv i32 %2, 18 ; <i32> [#uses=3]
+ %4 = add i32 %3, 1 ; <i32> [#uses=7]
+ %5 = icmp sgt i32 %4, -1 ; <i1> [#uses=1]
+ %max53 = select i1 %5, i32 %4, i32 0 ; <i32> [#uses=1]
+ %6 = alloca i64, i32 %max53 ; <i64*> [#uses=21]
+ %7 = icmp sgt i32 %4, 0 ; <i1> [#uses=1]
+ br i1 %7, label %bb55, label %bb58
+
+bb55: ; preds = %entry, %bb57
+ %J60b.0 = phi i32 [ %11, %bb57 ], [ 1, %entry ] ; <i32> [#uses=3]
+ %8 = add i32 %J60b.0, -1 ; <i32> [#uses=1]
+ %9 = getelementptr i64* %6, i32 %8 ; <i64*> [#uses=1]
+ store i64 0, i64* %9, align 8
+ %10 = icmp eq i32 %4, %J60b.0 ; <i1> [#uses=1]
+ br i1 %10, label %bb58, label %bb57
+
+bb57: ; preds = %bb55
+ %11 = add i32 %J60b.0, 1 ; <i32> [#uses=1]
+ br label %bb55
+
+bb58: ; preds = %entry, %bb55
+ %12 = icmp sgt i32 %4, 0 ; <i1> [#uses=1]
+ br i1 %12, label %bb61, label %bb91
+
+bb61: ; preds = %bb58, %bb90
+ %j2.0 = phi i32 [ %88, %bb90 ], [ 1, %bb58 ] ; <i32> [#uses=11]
+ %aa.0 = phi i32 [ %86, %bb90 ], [ %a, %bb58 ] ; <i32> [#uses=6]
+ %yy.0 = phi i64 [ %84, %bb90 ], [ %y, %bb58 ] ; <i64> [#uses=3]
+ %xx.0 = phi i64 [ %21, %bb90 ], [ %x, %bb58 ] ; <i64> [#uses=2]
+ %13 = icmp eq i64 %xx.0, 0 ; <i1> [#uses=1]
+ br i1 %13, label %bb91, label %bb63
+
+bb63: ; preds = %bb61
+ %14 = icmp eq i32 %aa.0, 0 ; <i1> [#uses=1]
+ %15 = zext i1 %14 to i8 ; <i8> [#uses=1]
+ invoke void @system__arith_64__scaled_divide( { i64, i64 }* noalias sret %0, i64 %xx.0, i64 %yy.0, i64 %z, i8 %15 )
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %bb63
+ %16 = getelementptr { i64, i64 }* %0, i32 0, i32 0 ; <i64*> [#uses=1]
+ %17 = load i64* %16, align 8 ; <i64> [#uses=1]
+ %18 = add i32 %j2.0, -1 ; <i32> [#uses=1]
+ %19 = getelementptr i64* %6, i32 %18 ; <i64*> [#uses=1]
+ store i64 %17, i64* %19, align 8
+ %20 = getelementptr { i64, i64 }* %0, i32 0, i32 1 ; <i64*> [#uses=1]
+ %21 = load i64* %20, align 8 ; <i64> [#uses=1]
+ %22 = add i32 %j2.0, -1 ; <i32> [#uses=1]
+ %23 = getelementptr i64* %6, i32 %22 ; <i64*> [#uses=1]
+ %24 = load i64* %23, align 8 ; <i64> [#uses=1]
+ %25 = icmp eq i64 %24, %yy.0 ; <i1> [#uses=1]
+ %26 = add i32 %j2.0, -1 ; <i32> [#uses=1]
+ %27 = getelementptr i64* %6, i32 %26 ; <i64*> [#uses=1]
+ %28 = load i64* %27, align 8 ; <i64> [#uses=1]
+ %29 = sub i64 0, %28 ; <i64> [#uses=1]
+ %30 = icmp eq i64 %yy.0, %29 ; <i1> [#uses=1]
+ %31 = or i1 %25, %30 ; <i1> [#uses=1]
+ %32 = icmp sgt i32 %j2.0, 1 ; <i1> [#uses=1]
+ %or.cond = and i1 %31, %32 ; <i1> [#uses=1]
+ br i1 %or.cond, label %bb69, label %bb83
+
+bb69: ; preds = %invcont
+ %33 = add i32 %j2.0, -1 ; <i32> [#uses=1]
+ %34 = getelementptr i64* %6, i32 %33 ; <i64*> [#uses=1]
+ %35 = load i64* %34, align 8 ; <i64> [#uses=1]
+ %36 = icmp slt i64 %35, 0 ; <i1> [#uses=1]
+ %37 = add i32 %j2.0, -2 ; <i32> [#uses=1]
+ %38 = getelementptr i64* %6, i32 %37 ; <i64*> [#uses=1]
+ %39 = load i64* %38, align 8 ; <i64> [#uses=2]
+ br i1 %36, label %bb71, label %bb72
+
+bb71: ; preds = %bb69
+ %40 = add i64 %39, 1 ; <i64> [#uses=1]
+ %41 = add i32 %j2.0, -2 ; <i32> [#uses=1]
+ %42 = getelementptr i64* %6, i32 %41 ; <i64*> [#uses=1]
+ store i64 %40, i64* %42, align 8
+ br label %bb73
+
+bb72: ; preds = %bb69
+ %43 = add i64 %39, -1 ; <i64> [#uses=1]
+ %44 = add i32 %j2.0, -2 ; <i32> [#uses=1]
+ %45 = getelementptr i64* %6, i32 %44 ; <i64*> [#uses=1]
+ store i64 %43, i64* %45, align 8
+ br label %bb73
+
+bb73: ; preds = %bb72, %bb71
+ %46 = add i32 %j2.0, -1 ; <i32> [#uses=1]
+ %47 = getelementptr i64* %6, i32 %46 ; <i64*> [#uses=1]
+ store i64 0, i64* %47, align 8
+ br label %bb74
+
+bb74: ; preds = %bb82, %bb73
+ %j1.0 = phi i32 [ %4, %bb73 ], [ %81, %bb82 ] ; <i32> [#uses=12]
+ %48 = icmp slt i32 %j1.0, 2 ; <i1> [#uses=1]
+ br i1 %48, label %bb83, label %bb76
+
+bb76: ; preds = %bb74
+ %49 = add i32 %j1.0, -1 ; <i32> [#uses=1]
+ %50 = getelementptr i64* %6, i32 %49 ; <i64*> [#uses=1]
+ %51 = load i64* %50, align 8 ; <i64> [#uses=1]
+ %52 = icmp sgt i64 %51, 999999999999999999 ; <i1> [#uses=1]
+ br i1 %52, label %bb78, label %bb79
+
+bb78: ; preds = %bb76
+ %53 = add i32 %j1.0, -2 ; <i32> [#uses=1]
+ %54 = getelementptr i64* %6, i32 %53 ; <i64*> [#uses=1]
+ %55 = load i64* %54, align 8 ; <i64> [#uses=1]
+ %56 = add i64 %55, 1 ; <i64> [#uses=1]
+ %57 = add i32 %j1.0, -2 ; <i32> [#uses=1]
+ %58 = getelementptr i64* %6, i32 %57 ; <i64*> [#uses=1]
+ store i64 %56, i64* %58, align 8
+ %59 = add i32 %j1.0, -1 ; <i32> [#uses=1]
+ %60 = getelementptr i64* %6, i32 %59 ; <i64*> [#uses=1]
+ %61 = load i64* %60, align 8 ; <i64> [#uses=1]
+ %62 = add i64 %61, -1000000000000000000 ; <i64> [#uses=1]
+ %63 = add i32 %j1.0, -1 ; <i32> [#uses=1]
+ %64 = getelementptr i64* %6, i32 %63 ; <i64*> [#uses=1]
+ store i64 %62, i64* %64, align 8
+ br label %bb82
+
+bb79: ; preds = %bb76
+ %65 = add i32 %j1.0, -1 ; <i32> [#uses=1]
+ %66 = getelementptr i64* %6, i32 %65 ; <i64*> [#uses=1]
+ %67 = load i64* %66, align 8 ; <i64> [#uses=1]
+ %68 = icmp slt i64 %67, -999999999999999999 ; <i1> [#uses=1]
+ br i1 %68, label %bb81, label %bb82
+
+bb81: ; preds = %bb79
+ %69 = add i32 %j1.0, -2 ; <i32> [#uses=1]
+ %70 = getelementptr i64* %6, i32 %69 ; <i64*> [#uses=1]
+ %71 = load i64* %70, align 8 ; <i64> [#uses=1]
+ %72 = add i64 %71, -1 ; <i64> [#uses=1]
+ %73 = add i32 %j1.0, -2 ; <i32> [#uses=1]
+ %74 = getelementptr i64* %6, i32 %73 ; <i64*> [#uses=1]
+ store i64 %72, i64* %74, align 8
+ %75 = add i32 %j1.0, -1 ; <i32> [#uses=1]
+ %76 = getelementptr i64* %6, i32 %75 ; <i64*> [#uses=1]
+ %77 = load i64* %76, align 8 ; <i64> [#uses=1]
+ %78 = add i64 %77, 1000000000000000000 ; <i64> [#uses=1]
+ %79 = add i32 %j1.0, -1 ; <i32> [#uses=1]
+ %80 = getelementptr i64* %6, i32 %79 ; <i64*> [#uses=1]
+ store i64 %78, i64* %80, align 8
+ br label %bb82
+
+bb82: ; preds = %bb79, %bb81, %bb78
+ %81 = add i32 %j1.0, -1 ; <i32> [#uses=1]
+ br label %bb74
+
+bb83: ; preds = %invcont, %bb74
+ %82 = icmp slt i32 %aa.0, 19 ; <i1> [#uses=1]
+ %min = select i1 %82, i32 %aa.0, i32 18 ; <i32> [#uses=1]
+ %83 = invoke i64 @system__exn_lli__exn_long_long_integer( i64 10, i32 %min ) readnone
+ to label %invcont86 unwind label %lpad ; <i64> [#uses=1]
+
+invcont86: ; preds = %bb83
+ %84 = sub i64 0, %83 ; <i64> [#uses=1]
+ %85 = icmp slt i32 %aa.0, 19 ; <i1> [#uses=1]
+ %min87 = select i1 %85, i32 %aa.0, i32 18 ; <i32> [#uses=1]
+ %86 = sub i32 %aa.0, %min87 ; <i32> [#uses=1]
+ %87 = icmp eq i32 %4, %j2.0 ; <i1> [#uses=1]
+ br i1 %87, label %bb91, label %bb90
+
+bb90: ; preds = %invcont86
+ %88 = add i32 %j2.0, 1 ; <i32> [#uses=1]
+ br label %bb61
+
+bb91: ; preds = %bb58, %bb61, %invcont86
+ %89 = icmp slt i32 %2, 18 ; <i1> [#uses=1]
+ br i1 %89, label %bb98, label %bb94
+
+bb94: ; preds = %bb91, %bb97
+ %j.0 = phi i32 [ %97, %bb97 ], [ 1, %bb91 ] ; <i32> [#uses=4]
+ %90 = mul i32 %j.0, 18 ; <i32> [#uses=1]
+ %91 = add i32 %90, -18 ; <i32> [#uses=1]
+ %92 = sub i32 %e, %91 ; <i32> [#uses=1]
+ %93 = add i32 %j.0, -1 ; <i32> [#uses=1]
+ %94 = getelementptr i64* %6, i32 %93 ; <i64*> [#uses=1]
+ %95 = load i64* %94, align 8 ; <i64> [#uses=1]
+ invoke fastcc void @ce3806g__fxio__put__put_int64__4.1339( %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.365, i64 %95, i32 %92 )
+ to label %invcont95 unwind label %lpad
+
+invcont95: ; preds = %bb94
+ %96 = icmp eq i32 %3, %j.0 ; <i1> [#uses=1]
+ br i1 %96, label %bb98, label %bb97
+
+bb97: ; preds = %invcont95
+ %97 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ br label %bb94
+
+bb98: ; preds = %bb91, %invcont95
+ %98 = sub i32 %e, %a ; <i32> [#uses=1]
+ %99 = getelementptr i64* %6, i32 %3 ; <i64*> [#uses=1]
+ %100 = load i64* %99, align 8 ; <i64> [#uses=1]
+ invoke fastcc void @ce3806g__fxio__put__put_int64__4.1339( %struct.FRAME.ce3806g__fxio__put__4* %CHAIN.365, i64 %100, i32 %98 )
+ to label %bb101 unwind label %lpad
+
+bb101: ; preds = %bb98
+ ret void
+
+lpad: ; preds = %bb98, %bb94, %bb83, %bb63
+ %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2]
+ %eh_select103 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i32* @__gnat_all_others_value ) ; <i32> [#uses=0]
+ call void @llvm.stackrestore( i8* %1 )
+ %101 = call i32 (...)* @_Unwind_Resume( i8* %eh_ptr ) ; <i32> [#uses=0]
+ unreachable
+}
+
+declare i8* @llvm.stacksave() nounwind
+
+declare void @system__arith_64__scaled_divide({ i64, i64 }* noalias sret, i64, i64, i64, i8)
+
+declare i64 @system__exn_lli__exn_long_long_integer(i64, i32) readnone
+
+declare void @llvm.stackrestore(i8*) nounwind
+
+declare i32 @system__img_real__set_image_real(x86_fp80, i8*, %struct.string___XUB*, i32, i32, i32, i32)
+
+declare void @ada__text_io__generic_aux__put_item(%struct.ada__text_io__text_afcb*, i8*, %struct.string___XUB*)
+
+declare void @report__test(i8*, %struct.string___XUB*, i8*, %struct.string___XUB*)
+
+declare void @system__secondary_stack__ss_mark(%struct.string___XUB* noalias sret)
+
+declare void @system__exception_table__register_exception(%struct.system__standard_library__exception_data*)
+
+declare void @report__legal_file_name(%struct.system__file_control_block__pstring* noalias sret, i32, i8*, %struct.string___XUB*)
+
+declare %struct.ada__text_io__text_afcb* @ada__text_io__create(%struct.ada__text_io__text_afcb*, i8, i8*, %struct.string___XUB*, i8*, %struct.string___XUB*)
+
+declare void @system__secondary_stack__ss_release(i32, i32)
+
+declare void @report__not_applicable(i8*, %struct.string___XUB*)
+
+declare void @ada__text_io__set_output(%struct.ada__text_io__text_afcb*)
+
+declare %struct.ada__text_io__text_afcb* @ada__text_io__close(%struct.ada__text_io__text_afcb*)
+
+declare %struct.ada__text_io__text_afcb* @ada__text_io__open(%struct.ada__text_io__text_afcb*, i8, i8*, %struct.string___XUB*, i8*, %struct.string___XUB*)
+
+declare %struct.ada__text_io__text_afcb* @ada__text_io__standard_output()
+
+declare void @report__failed(i8*, %struct.string___XUB*)
+
+declare void @ext(i32*)
+
+declare %struct.ada__text_io__text_afcb* @ada__text_io__delete(%struct.ada__text_io__text_afcb*)
+
+declare void @report__result()
diff --git a/test/Transforms/PruneEH/dg.exp b/test/Transforms/PruneEH/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/PruneEH/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/PruneEH/recursivetest.ll b/test/Transforms/PruneEH/recursivetest.ll
new file mode 100644
index 0000000..724c7cf
--- /dev/null
+++ b/test/Transforms/PruneEH/recursivetest.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -prune-eh -S | not grep invoke
+
+define internal i32 @foo() {
+ invoke i32 @foo( )
+ to label %Normal unwind label %Except ; <i32>:1 [#uses=0]
+Normal: ; preds = %0
+ ret i32 12
+Except: ; preds = %0
+ ret i32 123
+}
+
+define i32 @caller() {
+ invoke i32 @foo( )
+ to label %Normal unwind label %Except ; <i32>:1 [#uses=0]
+Normal: ; preds = %0
+ ret i32 0
+Except: ; preds = %0
+ ret i32 1
+}
+
diff --git a/test/Transforms/PruneEH/simplenoreturntest.ll b/test/Transforms/PruneEH/simplenoreturntest.ll
new file mode 100644
index 0000000..61e2f15
--- /dev/null
+++ b/test/Transforms/PruneEH/simplenoreturntest.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -prune-eh -S | not grep {ret i32}
+
+declare void @noreturn() noreturn
+
+define i32 @caller() {
+ call void @noreturn( )
+ ret i32 17
+}
+
+define i32 @caller2() {
+ %T = call i32 @caller( ) ; <i32> [#uses=1]
+ ret i32 %T
+}
diff --git a/test/Transforms/PruneEH/simpletest.ll b/test/Transforms/PruneEH/simpletest.ll
new file mode 100644
index 0000000..77c429d
--- /dev/null
+++ b/test/Transforms/PruneEH/simpletest.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -prune-eh -S | not grep invoke
+
+declare void @nounwind() nounwind
+
+define internal void @foo() {
+ call void @nounwind()
+ ret void
+}
+
+define i32 @caller() {
+ invoke void @foo( )
+ to label %Normal unwind label %Except
+
+Normal: ; preds = %0
+ ret i32 0
+
+Except: ; preds = %0
+ ret i32 1
+}
diff --git a/test/Transforms/Reassociate/2002-05-15-AgressiveSubMove.ll b/test/Transforms/Reassociate/2002-05-15-AgressiveSubMove.ll
new file mode 100644
index 0000000..5780990
--- /dev/null
+++ b/test/Transforms/Reassociate/2002-05-15-AgressiveSubMove.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -reassociate -instcombine -constprop -dce -S | not grep add
+
+define i32 @test(i32 %A) {
+ %X = add i32 %A, 1 ; <i32> [#uses=1]
+ %Y = add i32 %A, 1 ; <i32> [#uses=1]
+ %r = sub i32 %X, %Y ; <i32> [#uses=1]
+ ret i32 %r
+}
+
diff --git a/test/Transforms/Reassociate/2002-05-15-MissedTree.ll b/test/Transforms/Reassociate/2002-05-15-MissedTree.ll
new file mode 100644
index 0000000..e8bccbd
--- /dev/null
+++ b/test/Transforms/Reassociate/2002-05-15-MissedTree.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -reassociate -instcombine -constprop -die -S | not grep 5
+
+define i32 @test(i32 %A, i32 %B) {
+ %W = add i32 %B, -5 ; <i32> [#uses=1]
+ %Y = add i32 %A, 5 ; <i32> [#uses=1]
+ %Z = add i32 %W, %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/Reassociate/2002-05-15-SubReassociate.ll b/test/Transforms/Reassociate/2002-05-15-SubReassociate.ll
new file mode 100644
index 0000000..c18af5e
--- /dev/null
+++ b/test/Transforms/Reassociate/2002-05-15-SubReassociate.ll
@@ -0,0 +1,12 @@
+; With sub reassociation, constant folding can eliminate all of the constants.
+;
+; RUN: opt < %s -reassociate -constprop -instcombine -dce -S | not grep add
+
+define i32 @test(i32 %A, i32 %B) {
+ %W = add i32 5, %B ; <i32> [#uses=1]
+ %X = add i32 -7, %A ; <i32> [#uses=1]
+ %Y = sub i32 %X, %W ; <i32> [#uses=1]
+ %Z = add i32 %Y, 12 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/Reassociate/2002-05-15-SubReassociate2.ll b/test/Transforms/Reassociate/2002-05-15-SubReassociate2.ll
new file mode 100644
index 0000000..5848821
--- /dev/null
+++ b/test/Transforms/Reassociate/2002-05-15-SubReassociate2.ll
@@ -0,0 +1,13 @@
+; With sub reassociation, constant folding can eliminate the two 12 constants.
+;
+; RUN: opt < %s -reassociate -constprop -dce -S | not grep 12
+
+define i32 @test(i32 %A, i32 %B, i32 %C, i32 %D) {
+ %M = add i32 %A, 12 ; <i32> [#uses=1]
+ %N = add i32 %M, %B ; <i32> [#uses=1]
+ %O = add i32 %N, %C ; <i32> [#uses=1]
+ %P = sub i32 %D, %O ; <i32> [#uses=1]
+ %Q = add i32 %P, 12 ; <i32> [#uses=1]
+ ret i32 %Q
+}
+
diff --git a/test/Transforms/Reassociate/2002-07-09-DominanceProblem.ll b/test/Transforms/Reassociate/2002-07-09-DominanceProblem.ll
new file mode 100644
index 0000000..bbb08f9
--- /dev/null
+++ b/test/Transforms/Reassociate/2002-07-09-DominanceProblem.ll
@@ -0,0 +1,10 @@
+; The reassociate pass is not preserving dominance properties correctly
+;
+; RUN: opt < %s -reassociate
+
+define i32 @compute_dist(i32 %i, i32 %j) {
+ %reg119 = sub i32 %j, %i ; <i32> [#uses=1]
+ ret i32 %reg119
+}
+
+
diff --git a/test/Transforms/Reassociate/2003-08-12-InfiniteLoop.ll b/test/Transforms/Reassociate/2003-08-12-InfiniteLoop.ll
new file mode 100644
index 0000000..af7a821
--- /dev/null
+++ b/test/Transforms/Reassociate/2003-08-12-InfiniteLoop.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -reassociate -disable-output
+
+define i32 @test(i32 %A.1, i32 %B.1, i32 %C.1, i32 %D.1) {
+ %tmp.16 = and i32 %A.1, %B.1 ; <i32> [#uses=1]
+ %tmp.18 = and i32 %tmp.16, %C.1 ; <i32> [#uses=1]
+ %tmp.20 = and i32 %tmp.18, %D.1 ; <i32> [#uses=1]
+ ret i32 %tmp.20
+}
+
diff --git a/test/Transforms/Reassociate/2005-08-24-Crash.ll b/test/Transforms/Reassociate/2005-08-24-Crash.ll
new file mode 100644
index 0000000..9864de4
--- /dev/null
+++ b/test/Transforms/Reassociate/2005-08-24-Crash.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -reassociate -disable-output
+
+define void @test(i32 %a, i32 %b, i32 %c, i32 %d) {
+ %tmp.2 = xor i32 %a, %b ; <i32> [#uses=1]
+ %tmp.5 = xor i32 %c, %d ; <i32> [#uses=1]
+ %tmp.6 = xor i32 %tmp.2, %tmp.5 ; <i32> [#uses=1]
+ %tmp.9 = xor i32 %c, %a ; <i32> [#uses=1]
+ %tmp.12 = xor i32 %b, %d ; <i32> [#uses=1]
+ %tmp.13 = xor i32 %tmp.9, %tmp.12 ; <i32> [#uses=1]
+ %tmp.16 = xor i32 %tmp.6, %tmp.13 ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/Reassociate/2005-09-01-ArrayOutOfBounds.ll b/test/Transforms/Reassociate/2005-09-01-ArrayOutOfBounds.ll
new file mode 100644
index 0000000..33e44d4
--- /dev/null
+++ b/test/Transforms/Reassociate/2005-09-01-ArrayOutOfBounds.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -reassociate -instcombine -S |\
+; RUN: grep {ret i32 0}
+
+define i32 @f(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+ %tmp.2 = add i32 %a4, %a3 ; <i32> [#uses=1]
+ %tmp.4 = add i32 %tmp.2, %a2 ; <i32> [#uses=1]
+ %tmp.6 = add i32 %tmp.4, %a1 ; <i32> [#uses=1]
+ %tmp.8 = add i32 %tmp.6, %a0 ; <i32> [#uses=1]
+ %tmp.11 = add i32 %a3, %a2 ; <i32> [#uses=1]
+ %tmp.13 = add i32 %tmp.11, %a1 ; <i32> [#uses=1]
+ %tmp.15 = add i32 %tmp.13, %a0 ; <i32> [#uses=1]
+ %tmp.18 = add i32 %a2, %a1 ; <i32> [#uses=1]
+ %tmp.20 = add i32 %tmp.18, %a0 ; <i32> [#uses=1]
+ %tmp.23 = add i32 %a1, %a0 ; <i32> [#uses=1]
+ %tmp.26 = sub i32 %tmp.8, %tmp.15 ; <i32> [#uses=1]
+ %tmp.28 = add i32 %tmp.26, %tmp.20 ; <i32> [#uses=1]
+ %tmp.30 = sub i32 %tmp.28, %tmp.23 ; <i32> [#uses=1]
+ %tmp.32 = sub i32 %tmp.30, %a4 ; <i32> [#uses=1]
+ %tmp.34 = sub i32 %tmp.32, %a2 ; <i32> [#uses=2]
+ %T = mul i32 %tmp.34, %tmp.34 ; <i32> [#uses=1]
+ ret i32 %T
+}
+
diff --git a/test/Transforms/Reassociate/2006-04-27-ReassociateVector.ll b/test/Transforms/Reassociate/2006-04-27-ReassociateVector.ll
new file mode 100644
index 0000000..384cbc9
--- /dev/null
+++ b/test/Transforms/Reassociate/2006-04-27-ReassociateVector.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -reassociate -disable-output
+
+define void @foo() {
+ %tmp162 = fsub <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>> [#uses=1]
+ %tmp164 = fmul <4 x float> zeroinitializer, %tmp162 ; <<4 x float>> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/Reassociate/basictest.ll b/test/Transforms/Reassociate/basictest.ll
new file mode 100644
index 0000000..0864740
--- /dev/null
+++ b/test/Transforms/Reassociate/basictest.ll
@@ -0,0 +1,216 @@
+; With reassociation, constant folding can eliminate the 12 and -12 constants.
+;
+; RUN: opt < %s -reassociate -gvn -instcombine -S | FileCheck %s
+
+define i32 @test1(i32 %arg) {
+ %tmp1 = sub i32 -12, %arg
+ %tmp2 = add i32 %tmp1, 12
+ ret i32 %tmp2
+; CHECK: @test1
+; CHECK-NEXT: sub i32 0, %arg
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test2(i32 %reg109, i32 %reg1111) {
+ %reg115 = add i32 %reg109, -30 ; <i32> [#uses=1]
+ %reg116 = add i32 %reg115, %reg1111 ; <i32> [#uses=1]
+ %reg117 = add i32 %reg116, 30 ; <i32> [#uses=1]
+ ret i32 %reg117
+; CHECK: @test2
+; CHECK-NEXT: add i32 %reg1111, %reg109
+; CHECK-NEXT: ret i32
+}
+
+@e = external global i32 ; <i32*> [#uses=3]
+@a = external global i32 ; <i32*> [#uses=3]
+@b = external global i32 ; <i32*> [#uses=3]
+@c = external global i32 ; <i32*> [#uses=3]
+@f = external global i32 ; <i32*> [#uses=3]
+
+define void @test3() {
+ %A = load i32* @a ; <i32> [#uses=2]
+ %B = load i32* @b ; <i32> [#uses=2]
+ %C = load i32* @c ; <i32> [#uses=2]
+ %t1 = add i32 %A, %B ; <i32> [#uses=1]
+ %t2 = add i32 %t1, %C ; <i32> [#uses=1]
+ %t3 = add i32 %C, %A ; <i32> [#uses=1]
+ %t4 = add i32 %t3, %B ; <i32> [#uses=1]
+ ; e = (a+b)+c;
+ store i32 %t2, i32* @e
+ ; f = (a+c)+b
+ store i32 %t4, i32* @f
+ ret void
+; CHECK: @test3
+; CHECK: add i32
+; CHECK: add i32
+; CHECK-NOT: add i32
+; CHECK: ret void
+}
+
+define void @test4() {
+ %A = load i32* @a ; <i32> [#uses=2]
+ %B = load i32* @b ; <i32> [#uses=2]
+ %C = load i32* @c ; <i32> [#uses=2]
+ %t1 = add i32 %A, %B ; <i32> [#uses=1]
+ %t2 = add i32 %t1, %C ; <i32> [#uses=1]
+ %t3 = add i32 %C, %A ; <i32> [#uses=1]
+ %t4 = add i32 %t3, %B ; <i32> [#uses=1]
+ ; e = c+(a+b)
+ store i32 %t2, i32* @e
+ ; f = (c+a)+b
+ store i32 %t4, i32* @f
+ ret void
+; CHECK: @test4
+; CHECK: add i32
+; CHECK: add i32
+; CHECK-NOT: add i32
+; CHECK: ret void
+}
+
+define void @test5() {
+ %A = load i32* @a ; <i32> [#uses=2]
+ %B = load i32* @b ; <i32> [#uses=2]
+ %C = load i32* @c ; <i32> [#uses=2]
+ %t1 = add i32 %B, %A ; <i32> [#uses=1]
+ %t2 = add i32 %t1, %C ; <i32> [#uses=1]
+ %t3 = add i32 %C, %A ; <i32> [#uses=1]
+ %t4 = add i32 %t3, %B ; <i32> [#uses=1]
+ ; e = c+(b+a)
+ store i32 %t2, i32* @e
+ ; f = (c+a)+b
+ store i32 %t4, i32* @f
+ ret void
+; CHECK: @test5
+; CHECK: add i32
+; CHECK: add i32
+; CHECK-NOT: add i32
+; CHECK: ret void
+}
+
+define i32 @test6() {
+ %tmp.0 = load i32* @a
+ %tmp.1 = load i32* @b
+ ; (a+b)
+ %tmp.2 = add i32 %tmp.0, %tmp.1
+ %tmp.4 = load i32* @c
+ ; (a+b)+c
+ %tmp.5 = add i32 %tmp.2, %tmp.4
+ ; (a+c)
+ %tmp.8 = add i32 %tmp.0, %tmp.4
+ ; (a+c)+b
+ %tmp.11 = add i32 %tmp.8, %tmp.1
+ ; X ^ X = 0
+ %RV = xor i32 %tmp.5, %tmp.11
+ ret i32 %RV
+; CHECK: @test6
+; CHECK: ret i32 0
+}
+
+; This should be one add and two multiplies.
+define i32 @test7(i32 %A, i32 %B, i32 %C) {
+ ; A*A*B + A*C*A
+ %aa = mul i32 %A, %A
+ %aab = mul i32 %aa, %B
+ %ac = mul i32 %A, %C
+ %aac = mul i32 %ac, %A
+ %r = add i32 %aab, %aac
+ ret i32 %r
+; CHECK: @test7
+; CHECK-NEXT: add i32 %C, %B
+; CHECK-NEXT: mul i32
+; CHECK-NEXT: mul i32
+; CHECK-NEXT: ret i32
+}
+
+
+define i32 @test8(i32 %X, i32 %Y, i32 %Z) {
+ %A = sub i32 0, %X
+ %B = mul i32 %A, %Y
+ ; (-X)*Y + Z -> Z-X*Y
+ %C = add i32 %B, %Z
+ ret i32 %C
+; CHECK: @test8
+; CHECK-NEXT: %A = mul i32 %Y, %X
+; CHECK-NEXT: %C = sub i32 %Z, %A
+; CHECK-NEXT: ret i32 %C
+}
+
+
+; PR5458
+define i32 @test9(i32 %X) {
+ %Y = mul i32 %X, 47
+ %Z = add i32 %Y, %Y
+ ret i32 %Z
+; CHECK: @test9
+; CHECK-NEXT: mul i32 %X, 94
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test10(i32 %X) {
+ %Y = add i32 %X ,%X
+ %Z = add i32 %Y, %X
+ ret i32 %Z
+; CHECK: @test10
+; CHECK-NEXT: mul i32 %X, 3
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test11(i32 %W) {
+ %X = mul i32 %W, 127
+ %Y = add i32 %X ,%X
+ %Z = add i32 %Y, %X
+ ret i32 %Z
+; CHECK: @test11
+; CHECK-NEXT: mul i32 %W, 381
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test12(i32 %X) {
+ %A = sub i32 1, %X
+ %B = sub i32 2, %X
+ %C = sub i32 3, %X
+
+ %Y = add i32 %A ,%B
+ %Z = add i32 %Y, %C
+ ret i32 %Z
+; CHECK: @test12
+; CHECK-NEXT: mul i32 %X, -3
+; CHECK-NEXT: add i32{{.*}}, 6
+; CHECK-NEXT: ret i32
+}
+
+define i32 @test13(i32 %X1, i32 %X2, i32 %X3) {
+ %A = sub i32 0, %X1
+ %B = mul i32 %A, %X2 ; -X1*X2
+ %C = mul i32 %X1, %X3 ; X1*X3
+ %D = add i32 %B, %C ; -X1*X2 + X1*X3 -> X1*(X3-X2)
+ ret i32 %D
+; CHECK: @test13
+; CHECK-NEXT: sub i32 %X3, %X2
+; CHECK-NEXT: mul i32 {{.*}}, %X1
+; CHECK-NEXT: ret i32
+}
+
+; PR5359
+define i32 @test14(i32 %X1, i32 %X2) {
+ %B = mul i32 %X1, 47 ; X1*47
+ %C = mul i32 %X2, -47 ; X2*-47
+ %D = add i32 %B, %C ; X1*47 + X2*-47 -> 47*(X1-X2)
+ ret i32 %D
+; CHECK: @test14
+; CHECK-NEXT: sub i32 %X1, %X2
+; CHECK-NEXT: mul i32 {{.*}}, 47
+; CHECK-NEXT: ret i32
+}
+
+; Do not reassociate expressions of type i1
+define i32 @test15(i32 %X1, i32 %X2, i32 %X3) {
+ %A = icmp ne i32 %X1, 0
+ %B = icmp slt i32 %X2, %X3
+ %C = and i1 %A, %B
+ %D = select i1 %C, i32 %X1, i32 0
+ ret i32 %D
+; CHECK: @test15
+; CHECK: and i1 %A, %B
+}
+
diff --git a/test/Transforms/Reassociate/crash.ll b/test/Transforms/Reassociate/crash.ll
new file mode 100644
index 0000000..060018d
--- /dev/null
+++ b/test/Transforms/Reassociate/crash.ll
@@ -0,0 +1,33 @@
+; RUN: opt -reassociate -disable-output %s
+
+
+; rdar://7507855
+define fastcc i32 @test1() nounwind {
+entry:
+ %cond = select i1 undef, i32 1, i32 -1 ; <i32> [#uses=2]
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ %sub889 = sub i32 undef, undef ; <i32> [#uses=1]
+ %sub891 = sub i32 %sub889, %cond ; <i32> [#uses=0]
+ %add896 = sub i32 0, %cond ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+; PR5981
+define i32 @test2() nounwind ssp {
+entry:
+ %0 = load i32* undef, align 4
+ %1 = mul nsw i32 undef, %0
+ %2 = mul nsw i32 undef, %0
+ %3 = add nsw i32 undef, %1
+ %4 = add nsw i32 %3, %2
+ %5 = add nsw i32 %4, 4
+ %6 = shl i32 %0, 3 ; <i32> [#uses=1]
+ %7 = add nsw i32 %5, %6
+ br label %bb4.i9
+
+bb4.i9: ; preds = %bb3.i7, %bb1.i25.i
+ %8 = add nsw i32 undef, %1
+ ret i32 0
+}
diff --git a/test/Transforms/Reassociate/dg.exp b/test/Transforms/Reassociate/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/Reassociate/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/Reassociate/inverses.ll b/test/Transforms/Reassociate/inverses.ll
new file mode 100644
index 0000000..34abdc7
--- /dev/null
+++ b/test/Transforms/Reassociate/inverses.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -reassociate -die -S | FileCheck %s
+
+define i32 @test1(i32 %a, i32 %b) {
+ %tmp.2 = and i32 %b, %a
+ %tmp.4 = xor i32 %a, -1
+ ; (A&B)&~A == 0
+ %tmp.5 = and i32 %tmp.2, %tmp.4
+ ret i32 %tmp.5
+; CHECK: @test1
+; CHECK: ret i32 0
+}
+
+define i32 @test2(i32 %a, i32 %b) {
+ %tmp.1 = and i32 %a, 1234
+ %tmp.2 = and i32 %b, %tmp.1
+ %tmp.4 = xor i32 %a, -1
+ ; A&~A == 0
+ %tmp.5 = and i32 %tmp.2, %tmp.4
+ ret i32 %tmp.5
+; CHECK: @test2
+; CHECK: ret i32 0
+}
+
+define i32 @test3(i32 %b, i32 %a) {
+ %tmp.1 = add i32 %a, 1234
+ %tmp.2 = add i32 %b, %tmp.1
+ %tmp.4 = sub i32 0, %a
+ ; (b+(a+1234))+-a -> b+1234
+ %tmp.5 = add i32 %tmp.2, %tmp.4
+ ret i32 %tmp.5
+; CHECK: @test3
+; CHECK: %tmp.5 = add i32 %b, 1234
+; CHECK: ret i32 %tmp.5
+}
diff --git a/test/Transforms/Reassociate/looptest.ll b/test/Transforms/Reassociate/looptest.ll
new file mode 100644
index 0000000..91723bc
--- /dev/null
+++ b/test/Transforms/Reassociate/looptest.ll
@@ -0,0 +1,50 @@
+; This testcase comes from this C fragment:
+;
+; void test(unsigned Num, int *Array) {
+; unsigned i, j, k;
+;
+; for (i = 0; i != Num; ++i)
+; for (j = 0; j != Num; ++j)
+; for (k = 0; k != Num; ++k)
+; printf("%d\n", i+k+j); /* Reassociate to (i+j)+k */
+;}
+;
+; In this case, we want to reassociate the specified expr so that i+j can be
+; hoisted out of the inner most loop.
+;
+; RUN: opt < %s -reassociate -S | grep 115 | not grep 117
+; END.
[email protected] = internal global [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+declare i32 @printf(i8*, ...)
+
+define void @test(i32 %Num, i32* %Array) {
+bb0:
+ %cond221 = icmp eq i32 0, %Num ; <i1> [#uses=3]
+ br i1 %cond221, label %bb7, label %bb2
+bb2: ; preds = %bb6, %bb0
+ %reg115 = phi i32 [ %reg120, %bb6 ], [ 0, %bb0 ] ; <i32> [#uses=2]
+ br i1 %cond221, label %bb6, label %bb3
+bb3: ; preds = %bb5, %bb2
+ %reg116 = phi i32 [ %reg119, %bb5 ], [ 0, %bb2 ] ; <i32> [#uses=2]
+ br i1 %cond221, label %bb5, label %bb4
+bb4: ; preds = %bb4, %bb3
+ %reg117 = phi i32 [ %reg118, %bb4 ], [ 0, %bb3 ] ; <i32> [#uses=2]
+ %reg113 = add i32 %reg115, %reg117 ; <i32> [#uses=1]
+ %reg114 = add i32 %reg113, %reg116 ; <i32> [#uses=1]
+ %cast227 = getelementptr [4 x i8]* @.LC0, i64 0, i64 0 ; <i8*> [#uses=1]
+ call i32 (i8*, ...)* @printf( i8* %cast227, i32 %reg114 ) ; <i32>:0 [#uses=0]
+ %reg118 = add i32 %reg117, 1 ; <i32> [#uses=2]
+ %cond224 = icmp ne i32 %reg118, %Num ; <i1> [#uses=1]
+ br i1 %cond224, label %bb4, label %bb5
+bb5: ; preds = %bb4, %bb3
+ %reg119 = add i32 %reg116, 1 ; <i32> [#uses=2]
+ %cond225 = icmp ne i32 %reg119, %Num ; <i1> [#uses=1]
+ br i1 %cond225, label %bb3, label %bb6
+bb6: ; preds = %bb5, %bb2
+ %reg120 = add i32 %reg115, 1 ; <i32> [#uses=2]
+ %cond226 = icmp ne i32 %reg120, %Num ; <i1> [#uses=1]
+ br i1 %cond226, label %bb2, label %bb7
+bb7: ; preds = %bb6, %bb0
+ ret void
+}
diff --git a/test/Transforms/Reassociate/mulfactor.ll b/test/Transforms/Reassociate/mulfactor.ll
new file mode 100644
index 0000000..f279727
--- /dev/null
+++ b/test/Transforms/Reassociate/mulfactor.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -reassociate -instcombine -S | grep mul | count 2
+
+; This should have exactly 2 multiplies when we're done.
+
+define i32 @f(i32 %a, i32 %b) {
+ %tmp.2 = mul i32 %a, %a ; <i32> [#uses=1]
+ %tmp.5 = shl i32 %a, 1 ; <i32> [#uses=1]
+ %tmp.6 = mul i32 %tmp.5, %b ; <i32> [#uses=1]
+ %tmp.10 = mul i32 %b, %b ; <i32> [#uses=1]
+ %tmp.7 = add i32 %tmp.6, %tmp.2 ; <i32> [#uses=1]
+ %tmp.11 = add i32 %tmp.7, %tmp.10 ; <i32> [#uses=1]
+ ret i32 %tmp.11
+}
+
diff --git a/test/Transforms/Reassociate/mulfactor2.ll b/test/Transforms/Reassociate/mulfactor2.ll
new file mode 100644
index 0000000..8116554
--- /dev/null
+++ b/test/Transforms/Reassociate/mulfactor2.ll
@@ -0,0 +1,15 @@
+; This should turn into one multiply and one add.
+
+; RUN: opt < %s -instcombine -reassociate -instcombine -S > %t
+; RUN: grep mul %t | count 1
+; RUN: grep add %t | count 1
+
+define i32 @main(i32 %t) {
+ %tmp.3 = mul i32 %t, 12 ; <i32> [#uses=1]
+ %tmp.4 = add i32 %tmp.3, 5 ; <i32> [#uses=1]
+ %tmp.6 = mul i32 %t, 6 ; <i32> [#uses=1]
+ %tmp.8 = mul i32 %tmp.4, 3 ; <i32> [#uses=1]
+ %tmp.9 = add i32 %tmp.8, %tmp.6 ; <i32> [#uses=1]
+ ret i32 %tmp.9
+}
+
diff --git a/test/Transforms/Reassociate/negation.ll b/test/Transforms/Reassociate/negation.ll
new file mode 100644
index 0000000..6a3dfd3
--- /dev/null
+++ b/test/Transforms/Reassociate/negation.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -reassociate -instcombine -S | not grep sub
+
+; Test that we can turn things like X*-(Y*Z) -> X*-1*Y*Z.
+
+define i32 @test1(i32 %a, i32 %b, i32 %z) {
+ %c = sub i32 0, %z ; <i32> [#uses=1]
+ %d = mul i32 %a, %b ; <i32> [#uses=1]
+ %e = mul i32 %c, %d ; <i32> [#uses=1]
+ %f = mul i32 %e, 12345 ; <i32> [#uses=1]
+ %g = sub i32 0, %f ; <i32> [#uses=1]
+ ret i32 %g
+}
+
+define i32 @test2(i32 %a, i32 %b, i32 %z) {
+ %d = mul i32 %z, 40 ; <i32> [#uses=1]
+ %c = sub i32 0, %d ; <i32> [#uses=1]
+ %e = mul i32 %a, %c ; <i32> [#uses=1]
+ %f = sub i32 0, %e ; <i32> [#uses=1]
+ ret i32 %f
+}
+
diff --git a/test/Transforms/Reassociate/otherops.ll b/test/Transforms/Reassociate/otherops.ll
new file mode 100644
index 0000000..d68d008
--- /dev/null
+++ b/test/Transforms/Reassociate/otherops.ll
@@ -0,0 +1,28 @@
+; Reassociation should apply to Add, Mul, And, Or, & Xor
+;
+; RUN: opt < %s -reassociate -constprop -instcombine -die -S | not grep 12
+
+define i32 @test_mul(i32 %arg) {
+ %tmp1 = mul i32 12, %arg ; <i32> [#uses=1]
+ %tmp2 = mul i32 %tmp1, 12 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test_and(i32 %arg) {
+ %tmp1 = and i32 14, %arg ; <i32> [#uses=1]
+ %tmp2 = and i32 %tmp1, 14 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test_or(i32 %arg) {
+ %tmp1 = or i32 14, %arg ; <i32> [#uses=1]
+ %tmp2 = or i32 %tmp1, 14 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
+define i32 @test_xor(i32 %arg) {
+ %tmp1 = xor i32 12, %arg ; <i32> [#uses=1]
+ %tmp2 = xor i32 %tmp1, 12 ; <i32> [#uses=1]
+ ret i32 %tmp2
+}
+
diff --git a/test/Transforms/Reassociate/shift-factor.ll b/test/Transforms/Reassociate/shift-factor.ll
new file mode 100644
index 0000000..73af5e5
--- /dev/null
+++ b/test/Transforms/Reassociate/shift-factor.ll
@@ -0,0 +1,12 @@
+; There should be exactly one shift and one add left.
+; RUN: opt < %s -reassociate -instcombine -S > %t
+; RUN: grep shl %t | count 1
+; RUN: grep add %t | count 1
+
+define i32 @test(i32 %X, i32 %Y) {
+ %tmp.2 = shl i32 %X, 1 ; <i32> [#uses=1]
+ %tmp.6 = shl i32 %Y, 1 ; <i32> [#uses=1]
+ %tmp.4 = add i32 %tmp.6, %tmp.2 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+}
+
diff --git a/test/Transforms/Reassociate/shifttest.ll b/test/Transforms/Reassociate/shifttest.ll
new file mode 100644
index 0000000..8b2cbc9
--- /dev/null
+++ b/test/Transforms/Reassociate/shifttest.ll
@@ -0,0 +1,12 @@
+; With shl->mul reassociation, we can see that this is (shl A, 9) * A
+;
+; RUN: opt < %s -reassociate -instcombine -S |\
+; RUN: grep {shl .*, 9}
+
+define i32 @test(i32 %A, i32 %B) {
+ %X = shl i32 %A, 5 ; <i32> [#uses=1]
+ %Y = shl i32 %A, 4 ; <i32> [#uses=1]
+ %Z = mul i32 %Y, %X ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/Reassociate/subtest.ll b/test/Transforms/Reassociate/subtest.ll
new file mode 100644
index 0000000..4c63d12
--- /dev/null
+++ b/test/Transforms/Reassociate/subtest.ll
@@ -0,0 +1,11 @@
+; With sub reassociation, constant folding can eliminate the 12 and -12 constants.
+;
+; RUN: opt < %s -reassociate -instcombine -S | not grep 12
+
+define i32 @test(i32 %A, i32 %B) {
+ %X = add i32 -12, %A ; <i32> [#uses=1]
+ %Y = sub i32 %X, %B ; <i32> [#uses=1]
+ %Z = add i32 %Y, 12 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/Reassociate/subtest2.ll b/test/Transforms/Reassociate/subtest2.ll
new file mode 100644
index 0000000..0513c5f
--- /dev/null
+++ b/test/Transforms/Reassociate/subtest2.ll
@@ -0,0 +1,13 @@
+; With sub reassociation, constant folding can eliminate the uses of %a.
+;
+; RUN: opt < %s -reassociate -instcombine -S | grep %a | count 1
+; PR2047
+
+define i32 @test(i32 %a, i32 %b, i32 %c) nounwind {
+entry:
+ %tmp3 = sub i32 %a, %b ; <i32> [#uses=1]
+ %tmp5 = sub i32 %tmp3, %c ; <i32> [#uses=1]
+ %tmp7 = sub i32 %tmp5, %a ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
+
diff --git a/test/Transforms/SCCP/2002-05-02-EdgeFailure.ll b/test/Transforms/SCCP/2002-05-02-EdgeFailure.ll
new file mode 100644
index 0000000..bb0cf04
--- /dev/null
+++ b/test/Transforms/SCCP/2002-05-02-EdgeFailure.ll
@@ -0,0 +1,26 @@
+; edgefailure - This function illustrates how SCCP is not doing it's job. This
+; function should be optimized almost completely away: the loop should be
+; analyzed to detect that the body executes exactly once, and thus the branch
+; can be eliminated and code becomes trivially dead. This is distilled from a
+; real benchmark (mst from Olden benchmark, MakeGraph function). When SCCP is
+; fixed, this should be eliminated by a single SCCP application.
+;
+; RUN: opt < %s -sccp -S | not grep loop
+
+define i32* @test() {
+bb1:
+ %A = malloc i32 ; <i32*> [#uses=2]
+ br label %bb2
+bb2: ; preds = %bb2, %bb1
+ ;; Always 0
+ %i = phi i32 [ %i2, %bb2 ], [ 0, %bb1 ] ; <i32> [#uses=2]
+ ;; Always 1
+ %i2 = add i32 %i, 1 ; <i32> [#uses=2]
+ store i32 %i, i32* %A
+ ;; Always false
+ %loop = icmp sle i32 %i2, 0 ; <i1> [#uses=1]
+ br i1 %loop, label %bb2, label %bb3
+bb3: ; preds = %bb2
+ ret i32* %A
+}
+
diff --git a/test/Transforms/SCCP/2002-05-02-MissSecondInst.ll b/test/Transforms/SCCP/2002-05-02-MissSecondInst.ll
new file mode 100644
index 0000000..bb5b51d
--- /dev/null
+++ b/test/Transforms/SCCP/2002-05-02-MissSecondInst.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -sccp -S | not grep sub
+
+define void @test3(i32, i32) {
+ add i32 0, 0 ; <i32>:3 [#uses=0]
+ sub i32 0, 4 ; <i32>:4 [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/SCCP/2002-05-20-MissedIncomingValue.ll b/test/Transforms/SCCP/2002-05-20-MissedIncomingValue.ll
new file mode 100644
index 0000000..f619802
--- /dev/null
+++ b/test/Transforms/SCCP/2002-05-20-MissedIncomingValue.ll
@@ -0,0 +1,19 @@
+; This test shows a case where SCCP is incorrectly eliminating the PHI node
+; because it thinks it has a constant 0 value, when it really doesn't.
+
+; RUN: opt < %s -sccp -S | grep phi
+
+define i32 @test(i32 %A, i1 %c) {
+bb1:
+ br label %BB2
+BB2: ; preds = %BB4, %bb1
+ %V = phi i32 [ 0, %bb1 ], [ %A, %BB4 ] ; <i32> [#uses=1]
+ br label %BB3
+BB3: ; preds = %BB2
+ br i1 %c, label %BB4, label %BB5
+BB4: ; preds = %BB3
+ br label %BB2
+BB5: ; preds = %BB3
+ ret i32 %V
+}
+
diff --git a/test/Transforms/SCCP/2002-05-21-InvalidSimplify.ll b/test/Transforms/SCCP/2002-05-21-InvalidSimplify.ll
new file mode 100644
index 0000000..f02a293
--- /dev/null
+++ b/test/Transforms/SCCP/2002-05-21-InvalidSimplify.ll
@@ -0,0 +1,33 @@
+; This test shows SCCP "proving" that the loop (from bb6 to 14) loops infinitely
+; this is in fact NOT the case, so the return should still be alive in the code
+; after sccp and CFG simplification have been performed.
+;
+; RUN: opt < %s -sccp -simplifycfg -S | \
+; RUN: grep ret
+
+define void @old_main() {
+bb3:
+ br label %bb6
+bb6: ; preds = %bb14, %bb3
+ %reg403 = phi i32 [ %reg155, %bb14 ], [ 0, %bb3 ] ; <i32> [#uses=1]
+ %reg155 = add i32 %reg403, 1 ; <i32> [#uses=2]
+ br label %bb11
+bb11: ; preds = %bb11, %bb6
+ %reg407 = phi i32 [ %reg408, %bb11 ], [ 0, %bb6 ] ; <i32> [#uses=2]
+ %reg408 = add i32 %reg407, 1 ; <i32> [#uses=1]
+ %cond550 = icmp sle i32 %reg407, 1 ; <i1> [#uses=1]
+ br i1 %cond550, label %bb11, label %bb12
+bb12: ; preds = %bb11
+ br label %bb13
+bb13: ; preds = %bb13, %bb12
+ %reg409 = phi i32 [ %reg410, %bb13 ], [ 0, %bb12 ] ; <i32> [#uses=1]
+ %reg410 = add i32 %reg409, 1 ; <i32> [#uses=2]
+ %cond552 = icmp sle i32 %reg410, 2 ; <i1> [#uses=1]
+ br i1 %cond552, label %bb13, label %bb14
+bb14: ; preds = %bb13
+ %cond553 = icmp sle i32 %reg155, 31 ; <i1> [#uses=1]
+ br i1 %cond553, label %bb6, label %bb15
+bb15: ; preds = %bb14
+ ret void
+}
+
diff --git a/test/Transforms/SCCP/2002-08-30-GetElementPtrTest.ll b/test/Transforms/SCCP/2002-08-30-GetElementPtrTest.ll
new file mode 100644
index 0000000..6aaf33e
--- /dev/null
+++ b/test/Transforms/SCCP/2002-08-30-GetElementPtrTest.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -sccp -S | not grep %X
+
+@G = external global [40 x i32] ; <[40 x i32]*> [#uses=1]
+
+define i32* @test() {
+ %X = getelementptr [40 x i32]* @G, i64 0, i64 0 ; <i32*> [#uses=1]
+ ret i32* %X
+}
+
diff --git a/test/Transforms/SCCP/2003-06-24-OverdefinedPHIValue.ll b/test/Transforms/SCCP/2003-06-24-OverdefinedPHIValue.ll
new file mode 100644
index 0000000..576f5d6
--- /dev/null
+++ b/test/Transforms/SCCP/2003-06-24-OverdefinedPHIValue.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -sccp -simplifycfg -S | \
+; RUN: not grep then:
+
+define void @cprop_test11(i32* %data.1) {
+entry:
+ %tmp.1 = load i32* %data.1 ; <i32> [#uses=3]
+ %tmp.41 = icmp sgt i32 %tmp.1, 1 ; <i1> [#uses=1]
+ br i1 %tmp.41, label %no_exit, label %loopexit
+no_exit: ; preds = %endif, %then, %entry
+ %j.0 = phi i32 [ %j.0, %endif ], [ %i.0, %then ], [ 1, %entry ] ; <i32> [#uses=3]
+ %i.0 = phi i32 [ %inc, %endif ], [ %inc1, %then ], [ 1, %entry ] ; <i32> [#uses=4]
+ %tmp.8.not = icmp ne i32 %j.0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.8.not, label %endif, label %then
+then: ; preds = %no_exit
+ %inc1 = add i32 %i.0, 1 ; <i32> [#uses=3]
+ %tmp.42 = icmp slt i32 %inc1, %tmp.1 ; <i1> [#uses=1]
+ br i1 %tmp.42, label %no_exit, label %loopexit
+endif: ; preds = %no_exit
+ %inc = add i32 %i.0, 1 ; <i32> [#uses=3]
+ %tmp.4 = icmp slt i32 %inc, %tmp.1 ; <i1> [#uses=1]
+ br i1 %tmp.4, label %no_exit, label %loopexit
+loopexit: ; preds = %endif, %then, %entry
+ %j.1 = phi i32 [ 1, %entry ], [ %j.0, %endif ], [ %i.0, %then ] ; <i32> [#uses=1]
+ %i.1 = phi i32 [ 1, %entry ], [ %inc, %endif ], [ %inc1, %then ] ; <i32> [#uses=1]
+ %tmp.17 = getelementptr i32* %data.1, i64 1 ; <i32*> [#uses=1]
+ store i32 %j.1, i32* %tmp.17
+ %tmp.23 = getelementptr i32* %data.1, i64 2 ; <i32*> [#uses=1]
+ store i32 %i.1, i32* %tmp.23
+ ret void
+}
diff --git a/test/Transforms/SCCP/2003-08-26-InvokeHandling.ll b/test/Transforms/SCCP/2003-08-26-InvokeHandling.ll
new file mode 100644
index 0000000..9876375
--- /dev/null
+++ b/test/Transforms/SCCP/2003-08-26-InvokeHandling.ll
@@ -0,0 +1,18 @@
+; The PHI cannot be eliminated from this testcase, SCCP is mishandling invoke's!
+; RUN: opt < %s -sccp -S | grep phi
+
+declare void @foo()
+
+define i32 @test(i1 %cond) {
+Entry:
+ br i1 %cond, label %Inv, label %Cont
+Inv: ; preds = %Entry
+ invoke void @foo( )
+ to label %Ok unwind label %Cont
+Ok: ; preds = %Inv
+ br label %Cont
+Cont: ; preds = %Ok, %Inv, %Entry
+ %X = phi i32 [ 0, %Entry ], [ 1, %Ok ], [ 0, %Inv ] ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/SCCP/2004-11-16-DeadInvoke.ll b/test/Transforms/SCCP/2004-11-16-DeadInvoke.ll
new file mode 100644
index 0000000..5d2c78e
--- /dev/null
+++ b/test/Transforms/SCCP/2004-11-16-DeadInvoke.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -sccp -disable-output
+
+declare i32 @foo()
+
+define void @caller() {
+ br i1 true, label %T, label %F
+F: ; preds = %0
+ %X = invoke i32 @foo( )
+ to label %T unwind label %T ; <i32> [#uses=0]
+T: ; preds = %F, %F, %0
+ ret void
+}
+
diff --git a/test/Transforms/SCCP/2004-12-10-UndefBranchBug.ll b/test/Transforms/SCCP/2004-12-10-UndefBranchBug.ll
new file mode 100644
index 0000000..4adfde3
--- /dev/null
+++ b/test/Transforms/SCCP/2004-12-10-UndefBranchBug.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -sccp -S | grep {ret i32 1}
+
+; This function definitely returns 1, even if we don't know the direction
+; of the branch.
+
+define i32 @foo() {
+ br i1 undef, label %T, label %T
+T: ; preds = %0, %0
+ %X = add i32 0, 1 ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/SCCP/2006-10-23-IPSCCP-Crash.ll b/test/Transforms/SCCP/2006-10-23-IPSCCP-Crash.ll
new file mode 100644
index 0000000..47f9cb4
--- /dev/null
+++ b/test/Transforms/SCCP/2006-10-23-IPSCCP-Crash.ll
@@ -0,0 +1,103 @@
+; RUN: opt < %s -sccp -disable-output
+; END.
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.7.0"
+ %struct.pat_list = type { i32, %struct.pat_list* }
+@JUMP = external global i32 ; <i32*> [#uses=1]
+@old_D_pat = external global [16 x i8] ; <[16 x i8]*> [#uses=0]
+
+define void @asearch1(i32 %D) {
+entry:
+ %tmp80 = icmp ult i32 0, %D ; <i1> [#uses=1]
+ br i1 %tmp80, label %bb647.preheader, label %cond_true81.preheader
+cond_true81.preheader: ; preds = %entry
+ ret void
+bb647.preheader: ; preds = %entry
+ %tmp3.i = call i32 @read( ) ; <i32> [#uses=1]
+ %tmp6.i = add i32 %tmp3.i, 0 ; <i32> [#uses=1]
+ %tmp653 = icmp sgt i32 %tmp6.i, 0 ; <i1> [#uses=1]
+ br i1 %tmp653, label %cond_true654, label %UnifiedReturnBlock
+cond_true612: ; preds = %cond_true654
+ ret void
+cond_next624: ; preds = %cond_true654
+ ret void
+cond_true654: ; preds = %bb647.preheader
+ br i1 undef, label %cond_true612, label %cond_next624
+UnifiedReturnBlock: ; preds = %bb647.preheader
+ ret void
+}
+
+define void @bitap(i32 %D) {
+entry:
+ %tmp29 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp29, label %cond_next50, label %cond_next37
+cond_next37: ; preds = %entry
+ ret void
+cond_next50: ; preds = %entry
+ %tmp52 = icmp sgt i32 %D, 0 ; <i1> [#uses=1]
+ br i1 %tmp52, label %cond_true53, label %cond_next71
+cond_true53: ; preds = %cond_next50
+ %tmp54 = load i32* @JUMP ; <i32> [#uses=1]
+ %tmp55 = icmp eq i32 %tmp54, 1 ; <i1> [#uses=1]
+ br i1 %tmp55, label %cond_true56, label %cond_next63
+cond_true56: ; preds = %cond_true53
+ %tmp57 = bitcast i32 %D to i32 ; <i32> [#uses=1]
+ call void @asearch1( i32 %tmp57 )
+ ret void
+cond_next63: ; preds = %cond_true53
+ ret void
+cond_next71: ; preds = %cond_next50
+ ret void
+}
+
+declare i32 @read()
+
+define void @initial_value() {
+entry:
+ ret void
+}
+
+define void @main() {
+entry:
+ br label %cond_next252
+cond_next208: ; preds = %cond_true260
+ %tmp229 = call i32 @atoi( ) ; <i32> [#uses=1]
+ br label %cond_next252
+bb217: ; preds = %cond_true260
+ ret void
+cond_next252: ; preds = %cond_next208, %entry
+ %D.0.0 = phi i32 [ 0, %entry ], [ %tmp229, %cond_next208 ] ; <i32> [#uses=1]
+ %tmp254 = getelementptr i8** null, i32 1 ; <i8**> [#uses=1]
+ %tmp256 = load i8** %tmp254 ; <i8*> [#uses=1]
+ %tmp258 = load i8* %tmp256 ; <i8> [#uses=1]
+ %tmp259 = icmp eq i8 %tmp258, 45 ; <i1> [#uses=1]
+ br i1 %tmp259, label %cond_true260, label %bb263
+cond_true260: ; preds = %cond_next252
+ %tmp205818 = icmp sgt i8 0, -1 ; <i1> [#uses=1]
+ br i1 %tmp205818, label %cond_next208, label %bb217
+bb263: ; preds = %cond_next252
+ %tmp265 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp265, label %cond_next276, label %cond_true266
+cond_true266: ; preds = %bb263
+ ret void
+cond_next276: ; preds = %bb263
+ %tmp278 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp278, label %cond_next298, label %cond_true279
+cond_true279: ; preds = %cond_next276
+ ret void
+cond_next298: ; preds = %cond_next276
+ call void @bitap( i32 %D.0.0 )
+ ret void
+}
+
+declare i32 @atoi()
+
+define void @subset_pset() {
+entry:
+ ret void
+}
+
+define void @strcmp() {
+entry:
+ ret void
+}
diff --git a/test/Transforms/SCCP/2006-12-04-PackedType.ll b/test/Transforms/SCCP/2006-12-04-PackedType.ll
new file mode 100644
index 0000000..cee3349
--- /dev/null
+++ b/test/Transforms/SCCP/2006-12-04-PackedType.ll
@@ -0,0 +1,140 @@
+; Test VectorType handling by SCCP.
+; SCCP ignores VectorTypes until PR 1034 is fixed
+;
+; RUN: opt < %s -sccp
+; END.
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8"
+ %struct.GLDAlphaTest = type { float, i16, i8, i8 }
+ %struct.GLDArrayRange = type { i8, i8, i8, i8 }
+ %struct.GLDBlendMode = type { i16, i16, i16, i16, %struct.GLTColor4, i16, i16, i8, i8, i8, i8 }
+ %struct.GLDBufferRec = type opaque
+ %struct.GLDBufferstate = type { %struct.GLTDimensions, %struct.GLTDimensions, %struct.GLTFixedColor4, %struct.GLTFixedColor4, i8, i8, i8, i8, [2 x %struct.GLSBuffer], [4 x %struct.GLSBuffer], %struct.GLSBuffer, %struct.GLSBuffer, %struct.GLSBuffer, [4 x %struct.GLSBuffer*], %struct.GLSBuffer*, %struct.GLSBuffer*, %struct.GLSBuffer*, i8, i8 }
+ %struct.GLDClearColor = type { double, %struct.GLTColor4, %struct.GLTColor4, float, i32 }
+ %struct.GLDClipPlane = type { i32, [6 x %struct.GLTColor4] }
+ %struct.GLDColorBuffer = type { i16, i16, [4 x i16] }
+ %struct.GLDColorMatrix = type { [16 x float]*, %struct.GLDImagingColorScale }
+ %struct.GLDContextRec = type { float, float, float, float, float, float, float, float, %struct.GLTColor4, %struct.GLTColor4, %struct.GLVMFPContext, %struct.GLDTextureMachine, %struct.GLGProcessor, %struct._GLVMConstants*, void (%struct.GLDContextRec*, i32, i32, %struct.GLVMFragmentAttribRec*, %struct.GLVMFragmentAttribRec*, i32)*, %struct._GLVMFunction*, void (%struct.GLDContextRec*, %struct.GLDVertex*)*, void (%struct.GLDContextRec*, %struct.GLDVertex*, %struct.GLDVertex*)*, void (%struct.GLDContextRec*, %struct.GLDVertex*, %struct.GLDVertex*, %struct.GLDVertex*)*, %struct._GLVMFunction*, %struct._GLVMFunction*, %struct._GLVMFunction*, i32, i32, i32, float, float, float, i32, %struct.GLSDrawable, %struct.GLDFramebufferAttachment, %struct.GLDFormat, %struct.GLDBufferstate, %struct.GLDSharedRec*, %struct.GLDState*, %struct.GLDPluginState*, %struct.GLTDimensions, %struct.GLTColor4*, %struct.GLTColor4*, %struct.GLVMFragmentAttribRec*, %struct.GLVMFragmentAttribRec*, %struct.GLVMFragmentAttribRec*, %struct.GLDPipelineProgramRec*, %struct.GLDStateProgramRec, %struct.GLVMTextures, { [4 x i8*], i8*, i8* }, [64 x float], %struct.GLDStippleData, i16, i8, i8, i32, %struct.GLDFramebufferRec*, i8, %struct.GLDQueryRec*, %struct.GLDQueryRec* }
+ %struct.GLDConvolution = type { %struct.GLTColor4, %struct.GLDImagingColorScale, i16, i16, float*, i32, i32 }
+ %struct.GLDDepthTest = type { i16, i16, i8, i8, i8, i8, double, double }
+ %struct.GLDFogMode = type { %struct.GLTColor4, float, float, float, float, float, i16, i16, i16, i8, i8 }
+ %struct.GLDFormat = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i32, i32, i32 }
+ %struct.GLDFramebufferAttachment = type { i32, i32, i32, i32, i32, i32 }
+ %struct.GLDFramebufferData = type { [6 x %struct.GLDFramebufferAttachment], [4 x i16], i16, i16, i16, i16, i32 }
+ %struct.GLDFramebufferRec = type { %struct.GLDFramebufferData*, %struct.GLDPluginFramebufferData*, %struct.GLDPixelFormat }
+ %struct.GLDHintMode = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 }
+ %struct.GLDHistogram = type { %struct.GLTFixedColor4*, i32, i16, i8, i8 }
+ %struct.GLDImagingColorScale = type { { float, float }, { float, float }, { float, float }, { float, float } }
+ %struct.GLDImagingSubset = type { %struct.GLDConvolution, %struct.GLDConvolution, %struct.GLDConvolution, %struct.GLDColorMatrix, %struct.GLDMinmax, %struct.GLDHistogram, %struct.GLDImagingColorScale, %struct.GLDImagingColorScale, %struct.GLDImagingColorScale, %struct.GLDImagingColorScale, i32 }
+ %struct.GLDLight = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, float, float, float, float, %struct.GLTCoord3, float, float, float, float, float }
+ %struct.GLDLightModel = type { %struct.GLTColor4, [8 x %struct.GLDLight], [2 x %struct.GLDMaterial], i32, i16, i16, i16, i8, i8, i8, i8, i8, i8 }
+ %struct.GLDLightProduct = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4 }
+ %struct.GLDLineMode = type { float, i32, i16, i16, i8, i8, i8, i8 }
+ %struct.GLDLogicOp = type { i16, i8, i8 }
+ %struct.GLDMaskMode = type { i32, [3 x i32], i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.GLDMaterial = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, float, float, float, float, [8 x %struct.GLDLightProduct], %struct.GLTColor4, [6 x i32], [2 x i32] }
+ %struct.GLDMinmax = type { %struct.GLDMinmaxTable*, i16, i8, i8 }
+ %struct.GLDMinmaxTable = type { %struct.GLTColor4, %struct.GLTColor4 }
+ %struct.GLDMipmaplevel = type { [4 x i32], [4 x float], [4 x i32], [4 x i32], [4 x float], [4 x i32], [3 x i32], i32, float*, float*, float*, i32, i32, i8*, i16, i16, i16, i16 }
+ %struct.GLDMultisample = type { float, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.GLDPipelineProgramData = type { i16, i16, i32, %struct._PPStreamToken*, i64, %struct.GLDShaderSourceData*, %struct.GLTColor4*, i32 }
+ %struct.GLDPipelineProgramRec = type { %struct.GLDPipelineProgramData*, %struct._PPStreamToken*, %struct._PPStreamToken*, %struct._GLVMFunction*, i32, i32, i32 }
+ %struct.GLDPipelineProgramState = type { i8, i8, i8, i8, %struct.GLTColor4* }
+ %struct.GLDPixelFormat = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.GLDPixelMap = type { i32*, float*, float*, float*, float*, float*, float*, float*, float*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.GLDPixelMode = type { float, float, %struct.GLDPixelStore, %struct.GLDPixelTransfer, %struct.GLDPixelMap, %struct.GLDImagingSubset, i32, i32 }
+ %struct.GLDPixelPack = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8 }
+ %struct.GLDPixelStore = type { %struct.GLDPixelPack, %struct.GLDPixelPack }
+ %struct.GLDPixelTransfer = type { float, float, float, float, float, float, float, float, float, float, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }
+ %struct.GLDPluginFramebufferData = type { [6 x %struct.GLDTextureRec*], i32, i32 }
+ %struct.GLDPluginProgramData = type { [3 x %struct.GLDPipelineProgramRec*], %struct.GLDBufferRec**, i32 }
+ %struct.GLDPluginState = type { [16 x [5 x %struct.GLDTextureRec*]], [3 x %struct.GLDTextureRec*], [16 x %struct.GLDTextureRec*], [3 x %struct.GLDPipelineProgramRec*], %struct.GLDProgramRec*, %struct.GLDVertexArrayRec*, [16 x %struct.GLDBufferRec*], %struct.GLDFramebufferRec*, %struct.GLDFramebufferRec* }
+ %struct.GLDPointMode = type { float, float, float, float, %struct.GLTCoord3, float, i8, i8, i8, i8, i16, i16, i32, i16, i16 }
+ %struct.GLDPolygonMode = type { [128 x i8], float, float, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8 }
+ %struct.GLDProgramData = type { i32, [16 x i32], i32, i32, i32, i32 }
+ %struct.GLDProgramRec = type { %struct.GLDProgramData*, %struct.GLDPluginProgramData*, i32 }
+ %struct.GLDQueryRec = type { i32, i32, %struct.GLDQueryRec* }
+ %struct.GLDRect = type { i32, i32, i32, i32, i32, i32 }
+ %struct.GLDRegisterCombiners = type { i8, i8, i8, i8, i32, [2 x %struct.GLTColor4], [8 x %struct.GLDRegisterCombinersPerStageState], %struct.GLDRegisterCombinersFinalStageState }
+ %struct.GLDRegisterCombinersFinalStageState = type { i8, i8, i8, i8, [7 x %struct.GLDRegisterCombinersPerVariableState] }
+ %struct.GLDRegisterCombinersPerPortionState = type { [4 x %struct.GLDRegisterCombinersPerVariableState], i8, i8, i8, i8, i16, i16, i16, i16, i16, i16 }
+ %struct.GLDRegisterCombinersPerStageState = type { [2 x %struct.GLDRegisterCombinersPerPortionState], [2 x %struct.GLTColor4] }
+ %struct.GLDRegisterCombinersPerVariableState = type { i16, i16, i16, i16 }
+ %struct.GLDScissorTest = type { %struct.GLTFixedColor4, i8, i8, i8, i8 }
+ %struct.GLDShaderSourceData = type { i32, i32, i8*, i32*, i32, i32, i8*, i32*, i8* }
+ %struct.GLDSharedRec = type opaque
+ %struct.GLDState = type { i16, i16, i32, i32, i32, [256 x %struct.GLTColor4], [128 x %struct.GLTColor4], %struct.GLDViewport, %struct.GLDTransform, %struct.GLDLightModel, i32*, i32, i32, i32, %struct.GLDAlphaTest, %struct.GLDBlendMode, %struct.GLDClearColor, %struct.GLDColorBuffer, %struct.GLDDepthTest, %struct.GLDArrayRange, %struct.GLDFogMode, %struct.GLDHintMode, %struct.GLDLineMode, %struct.GLDLogicOp, %struct.GLDMaskMode, %struct.GLDPixelMode, %struct.GLDPointMode, %struct.GLDPolygonMode, %struct.GLDScissorTest, i32, %struct.GLDStencilTest, [16 x %struct.GLDTextureMode], %struct.GLDArrayRange, [8 x %struct.GLDTextureCoordGen], %struct.GLDClipPlane, %struct.GLDMultisample, %struct.GLDRegisterCombiners, %struct.GLDArrayRange, %struct.GLDArrayRange, [3 x %struct.GLDPipelineProgramState], %struct.GLDTransformFeedback }
+ %struct.GLDStateProgramRec = type { %struct.GLDPipelineProgramData*, %struct.GLDPipelineProgramRec* }
+ %struct.GLDStencilTest = type { [3 x { i32, i32, i16, i16, i16, i16 }], i32, [4 x i8] }
+ %struct.GLDStippleData = type { i32, i16, i16, [32 x [32 x i8]] }
+ %struct.GLDTextureCoordGen = type { { i16, i16, %struct.GLTColor4, %struct.GLTColor4 }, { i16, i16, %struct.GLTColor4, %struct.GLTColor4 }, { i16, i16, %struct.GLTColor4, %struct.GLTColor4 }, { i16, i16, %struct.GLTColor4, %struct.GLTColor4 }, i8, i8, i8, i8 }
+ %struct.GLDTextureGeomState = type { i16, i16, i16, i16, i16, i8, i8, i16, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, [6 x i16], [6 x i16] }
+ %struct.GLDTextureLevel = type { i32, i32, i16, i16, i16, i8, i8, i16, i16, i16, i16, i8* }
+ %struct.GLDTextureMachine = type { [8 x %struct.GLDTextureRec*], %struct.GLDTextureRec*, i8, i8, i8, i8 }
+ %struct.GLDTextureMode = type { %struct.GLTColor4, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, float, float, float, i16, i16, i16, i16, i16, i16, [4 x i16], i8, i8, i8, i8, [3 x float], [4 x float], float, float }
+ %struct.GLDTextureParamState = type { i16, i16, i16, i16, i16, i16, %struct.GLTColor4, float, float, float, float, i16, i16, i16, i16, float, i16, i8, i8, i32, i8* }
+ %struct.GLDTextureRec = type { %struct.GLDTextureState*, i32, [2 x float], float, i32, float, float, float, float, float, float, %struct.GLDMipmaplevel*, %struct.GLDMipmaplevel*, i32, i32, i32, i32, i32, i32, %struct.GLDTextureParamState, i32, [2 x %struct._PPStreamToken] }
+ %struct.GLDTextureState = type { i16, i16, i16, float, i32, i16, %struct.GLISWRSurface*, i8, i8, i8, i8, %struct.GLDTextureParamState, %struct.GLDTextureGeomState, %struct.GLDTextureLevel, [6 x [15 x %struct.GLDTextureLevel]] }
+ %struct.GLDTransform = type { [24 x [16 x float]], [24 x [16 x float]], [16 x float], float, float, float, float, i32, float, i16, i16, i8, i8, i8, i8 }
+ %struct.GLDTransformFeedback = type { i8, i8, i8, [16 x i32], [16 x i32] }
+ %struct.GLDVertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, i8, i8, i8, i8, [4 x float], [2 x %struct.GLDMaterial*], i32, i32, [8 x %struct.GLTColor4] }
+ %struct.GLDVertexArrayRec = type opaque
+ %struct.GLDViewport = type { float, float, float, float, float, float, float, float, double, double, i32, i32, i32, i32, float, float, float, float }
+ %struct.GLGColorTable = type { i32, i32, i32, i8* }
+ %struct.GLGOperation = type { i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, %struct.GLGColorTable, %struct.GLGColorTable, %struct.GLGColorTable }
+ %struct.GLGProcessor = type { void (%struct.GLDPixelMode*, %struct.GLGOperation*, %struct._GLGFunctionKey*)*, %struct._GLVMFunction*, %struct._GLGFunctionKey* }
+ %struct.GLISWRSurface = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, [4 x i8*], i32 }
+ %struct.GLIWindow = type { i32, i32, i32 }
+ %struct.GLSBuffer = type { i8* }
+ %struct.GLSDrawable = type { %struct.GLSWindowRec* }
+ %struct.GLSWindowRec = type { %struct.GLTDimensions, %struct.GLTDimensions, i32, i32, %struct.GLSDrawable, [2 x i8*], i8*, i8*, i8*, [4 x i8*], i32, i32, i32, i32, [4 x i32], i16, i16, i16, %struct.GLIWindow, i32, i32, i8*, i8* }
+ %struct.GLTColor4 = type { float, float, float, float }
+ %struct.GLTCoord3 = type { float, float, float }
+ %struct.GLTDimensions = type { i32, i32 }
+ %struct.GLTFixedColor4 = type { i32, i32, i32, i32 }
+ %struct.GLVMFPContext = type { float, i32, i32, i32 }
+ %struct.GLVMFragmentAttribRec = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, [8 x <4 x float>] }
+ %struct.GLVMTextures = type { [8 x %struct.GLDTextureRec*] }
+ %struct._GLGFunctionKey = type opaque
+ %struct._GLVMConstants = type opaque
+ %struct._GLVMFunction = type opaque
+ %struct._PPStreamToken = type { { i16, i8, i8, i32 } }
+
+define void @gldLLVMVecPointRender(%struct.GLDContextRec* %ctx) {
+entry:
+ %tmp.uip = getelementptr %struct.GLDContextRec* %ctx, i32 0, i32 22 ; <i32*> [#uses=1]
+ %tmp = load i32* %tmp.uip ; <i32> [#uses=3]
+ %tmp91 = lshr i32 %tmp, 5 ; <i32> [#uses=1]
+ %tmp92 = trunc i32 %tmp91 to i1 ; <i1> [#uses=1]
+ br i1 %tmp92, label %cond_true93, label %cond_next116
+cond_true93: ; preds = %entry
+ %tmp.upgrd.1 = getelementptr %struct.GLDContextRec* %ctx, i32 0, i32 31, i32 14 ; <i32*> [#uses=1]
+ %tmp95 = load i32* %tmp.upgrd.1 ; <i32> [#uses=1]
+ %tmp95.upgrd.2 = sitofp i32 %tmp95 to float ; <float> [#uses=1]
+ %tmp108 = fmul float undef, %tmp95.upgrd.2 ; <float> [#uses=1]
+ br label %cond_next116
+cond_next116: ; preds = %cond_true93, %entry
+ %point_size.2 = phi float [ %tmp108, %cond_true93 ], [ undef, %entry ] ; <float> [#uses=2]
+ %tmp457 = fcmp olt float %point_size.2, 1.000000e+00 ; <i1> [#uses=1]
+ %tmp460 = lshr i32 %tmp, 6 ; <i32> [#uses=1]
+ %tmp461 = trunc i32 %tmp460 to i1 ; <i1> [#uses=1]
+ br i1 %tmp457, label %cond_true458, label %cond_next484
+cond_true458: ; preds = %cond_next116
+ br i1 %tmp461, label %cond_true462, label %cond_next487
+cond_true462: ; preds = %cond_true458
+ %tmp26 = bitcast i32 %tmp to i32 ; <i32> [#uses=1]
+ %tmp465 = and i32 %tmp26, 128 ; <i32> [#uses=1]
+ %tmp466 = icmp eq i32 %tmp465, 0 ; <i1> [#uses=1]
+ br i1 %tmp466, label %cond_true467, label %cond_next487
+cond_true467: ; preds = %cond_true462
+ ret void
+cond_next484: ; preds = %cond_next116
+ %tmp486 = fmul float %point_size.2, 5.000000e-01 ; <float> [#uses=1]
+ br label %cond_next487
+cond_next487: ; preds = %cond_next484, %cond_true462, %cond_true458
+ %radius.0 = phi float [ %tmp486, %cond_next484 ], [ 5.000000e-01, %cond_true458 ], [ 5.000000e-01, %cond_true462 ] ; <float> [#uses=2]
+ %tmp494 = insertelement <4 x float> zeroinitializer, float %radius.0, i32 2 ; <<4 x float>> [#uses=1]
+ %tmp495 = insertelement <4 x float> %tmp494, float %radius.0, i32 3 ; <<4 x float>> [#uses=0]
+ ret void
+}
diff --git a/test/Transforms/SCCP/2006-12-19-UndefBug.ll b/test/Transforms/SCCP/2006-12-19-UndefBug.ll
new file mode 100644
index 0000000..ec69ce0
--- /dev/null
+++ b/test/Transforms/SCCP/2006-12-19-UndefBug.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -sccp -S | \
+; RUN: grep {ret i1 false}
+
+define i1 @foo() {
+ %X = and i1 false, undef ; <i1> [#uses=1]
+ ret i1 %X
+}
+
diff --git a/test/Transforms/SCCP/2007-05-16-InvokeCrash.ll b/test/Transforms/SCCP/2007-05-16-InvokeCrash.ll
new file mode 100644
index 0000000..b84fe6d
--- /dev/null
+++ b/test/Transforms/SCCP/2007-05-16-InvokeCrash.ll
@@ -0,0 +1,41 @@
+; RUN: opt < %s -sccp -disable-output
+; PR1431
+
+define void @_ada_bench() {
+entry:
+ br label %cond_next
+cond_next: ; preds = %cond_next, %entry
+ %indvar46 = phi i32 [ 0, %entry ], [ %indvar.next47, %cond_next ] ; <i32> [#uses=1]
+ %indvar.next47 = add i32 %indvar46, 1 ; <i32> [#uses=2]
+ %exitcond48 = icmp eq i32 %indvar.next47, 10000 ; <i1> [#uses=1]
+ br i1 %exitcond48, label %cond_next40, label %cond_next
+cond_next40: ; preds = %cond_next40, %cond_next
+ %indvar43 = phi i32 [ %indvar.next44, %cond_next40 ], [ 0, %cond_next ] ; <i32> [#uses=1]
+ %indvar.next44 = add i32 %indvar43, 1 ; <i32> [#uses=2]
+ %exitcond45 = icmp eq i32 %indvar.next44, 10000 ; <i1> [#uses=1]
+ br i1 %exitcond45, label %cond_next53, label %cond_next40
+cond_next53: ; preds = %cond_next53, %cond_next40
+ %indvar41 = phi i32 [ %indvar.next42, %cond_next53 ], [ 0, %cond_next40 ] ; <i32> [#uses=1]
+ %indvar.next42 = add i32 %indvar41, 1 ; <i32> [#uses=2]
+ %exitcond = icmp eq i32 %indvar.next42, 10000 ; <i1> [#uses=1]
+ br i1 %exitcond, label %bb67, label %cond_next53
+bb67: ; preds = %cond_next53
+ %tmp112 = invoke double @sin( double 5.000000e-01 )
+ to label %bb114 unwind label %cleanup ; <double> [#uses=0]
+bb114: ; preds = %bb67
+ %tmp147 = invoke double @log( double 5.000000e-01 )
+ to label %bb149 unwind label %cleanup ; <double> [#uses=0]
+bb149: ; preds = %bb114
+ %tmp175 = invoke double @sqrt( double 5.000000e-01 )
+ to label %bb177 unwind label %cleanup ; <double> [#uses=0]
+bb177: ; preds = %bb149
+ unreachable
+cleanup: ; preds = %bb149, %bb114, %bb67
+ unwind
+}
+
+declare double @sin(double)
+
+declare double @log(double)
+
+declare double @sqrt(double)
diff --git a/test/Transforms/SCCP/2008-01-27-UndefCorrelate.ll b/test/Transforms/SCCP/2008-01-27-UndefCorrelate.ll
new file mode 100644
index 0000000..aa613dc
--- /dev/null
+++ b/test/Transforms/SCCP/2008-01-27-UndefCorrelate.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -sccp -S | grep undef | count 1
+; PR1938
+
+define i32 @main() {
+entry:
+ br label %bb
+
+bb:
+ %indvar = phi i32 [ 0, %entry ], [ %k, %bb.backedge ]
+ %k = add i32 %indvar, 1
+ br i1 undef, label %cond_true, label %cond_false
+
+cond_true:
+ %tmp97 = icmp slt i32 %k, 10
+ br i1 %tmp97, label %bb.backedge, label %bb12
+
+bb.backedge:
+ br label %bb
+
+cond_false:
+ %tmp9 = icmp slt i32 %k, 10
+ br i1 %tmp9, label %bb.backedge, label %bb12
+
+bb12:
+ %tmp14 = icmp eq i32 %k, 10
+ br i1 %tmp14, label %cond_next18, label %cond_true17
+
+cond_true17:
+ tail call void @abort( )
+ unreachable
+
+cond_next18:
+ ret i32 0
+}
+
+declare void @abort()
diff --git a/test/Transforms/SCCP/2008-04-22-multiple-ret-sccp.ll b/test/Transforms/SCCP/2008-04-22-multiple-ret-sccp.ll
new file mode 100644
index 0000000..1b26ca9
--- /dev/null
+++ b/test/Transforms/SCCP/2008-04-22-multiple-ret-sccp.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -sccp -S | grep {ret i32 %Z}
+; rdar://5778210
+
+declare {i32, i32} @bar(i32 %A)
+
+define i32 @foo() {
+ %X = call {i32, i32} @bar(i32 17)
+ %Y = getresult {i32, i32} %X, 0
+ %Z = add i32 %Y, %Y
+ ret i32 %Z
+}
diff --git a/test/Transforms/SCCP/2008-05-23-UndefCallFold.ll b/test/Transforms/SCCP/2008-05-23-UndefCallFold.ll
new file mode 100644
index 0000000..cd6cf97
--- /dev/null
+++ b/test/Transforms/SCCP/2008-05-23-UndefCallFold.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -sccp -S | not grep {ret i32 undef}
+; PR2358
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-pc-linux-gnu"
+
+define i32 @x(i32 %b) {
+entry:
+ %val = call i32 @llvm.cttz.i32(i32 undef)
+ ret i32 %val
+}
+
+declare i32 @llvm.cttz.i32(i32)
+
diff --git a/test/Transforms/SCCP/2009-01-14-IPSCCP-Invoke.ll b/test/Transforms/SCCP/2009-01-14-IPSCCP-Invoke.ll
new file mode 100644
index 0000000..d23ee2b
--- /dev/null
+++ b/test/Transforms/SCCP/2009-01-14-IPSCCP-Invoke.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -ipsccp -S | grep {ret i32 42}
+; RUN: opt < %s -ipsccp -S | grep {ret i32 undef}
+; PR3325
+
+define i32 @main() {
+ %tmp1 = invoke i32 @f()
+ to label %UnifiedReturnBlock unwind label %lpad
+
+lpad:
+ unreachable
+
+UnifiedReturnBlock:
+ ret i32 %tmp1
+}
+
+define internal i32 @f() {
+ ret i32 42
+}
+
+declare i8* @__cxa_begin_catch(i8*) nounwind
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
+
+declare void @__cxa_end_catch()
+
+declare i32 @__gxx_personality_v0(...)
diff --git a/test/Transforms/SCCP/2009-05-27-VectorOperandZero.ll b/test/Transforms/SCCP/2009-05-27-VectorOperandZero.ll
new file mode 100644
index 0000000..7aced66
--- /dev/null
+++ b/test/Transforms/SCCP/2009-05-27-VectorOperandZero.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -sccp -disable-output
+; PR4277
+
+define i32 @main() nounwind {
+entry:
+ %0 = tail call signext i8 (...)* @sin() nounwind
+ ret i32 0
+}
+
+declare signext i8 @sin(...)
diff --git a/test/Transforms/SCCP/apint-array.ll b/test/Transforms/SCCP/apint-array.ll
new file mode 100644
index 0000000..1e75878
--- /dev/null
+++ b/test/Transforms/SCCP/apint-array.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -sccp -S | grep {ret i101 12}
+
+@Y = constant [6 x i101] [ i101 12, i101 123456789000000, i101 -12,i101
+-123456789000000, i101 0,i101 9123456789000000]
+
+define i101 @array()
+{
+Head:
+ %A = getelementptr [6 x i101]* @Y, i32 0, i32 1
+
+ %B = load i101* %A
+ %C = icmp sge i101 %B, 1
+ br i1 %C, label %True, label %False
+True:
+ %D = and i101 %B, 1
+ %E = trunc i101 %D to i32
+ %F = getelementptr [6 x i101]* @Y, i32 0, i32 %E
+ %G = load i101* %F
+ br label %False
+False:
+ %H = phi i101 [%G, %True], [-1, %Head]
+ ret i101 %H
+}
diff --git a/test/Transforms/SCCP/apint-basictest.ll b/test/Transforms/SCCP/apint-basictest.ll
new file mode 100644
index 0000000..c03bfef
--- /dev/null
+++ b/test/Transforms/SCCP/apint-basictest.ll
@@ -0,0 +1,16 @@
+; This is a basic sanity check for constant propogation. The add instruction
+; should be eliminated.
+
+; RUN: opt < %s -sccp -S | not grep add
+
+define i128 @test(i1 %B) {
+ br i1 %B, label %BB1, label %BB2
+BB1:
+ %Val = add i128 0, 1
+ br label %BB3
+BB2:
+ br label %BB3
+BB3:
+ %Ret = phi i128 [%Val, %BB1], [2, %BB2]
+ ret i128 %Ret
+}
diff --git a/test/Transforms/SCCP/apint-basictest2.ll b/test/Transforms/SCCP/apint-basictest2.ll
new file mode 100644
index 0000000..1734827
--- /dev/null
+++ b/test/Transforms/SCCP/apint-basictest2.ll
@@ -0,0 +1,17 @@
+; This is a basic sanity check for constant propogation. The add instruction
+; and phi instruction should be eliminated.
+
+; RUN: opt < %s -sccp -S | not grep phi
+; RUN: opt < %s -sccp -S | not grep add
+
+define i128 @test(i1 %B) {
+ br i1 %B, label %BB1, label %BB2
+BB1:
+ %Val = add i128 0, 1
+ br label %BB3
+BB2:
+ br label %BB3
+BB3:
+ %Ret = phi i128 [%Val, %BB1], [1, %BB2]
+ ret i128 %Ret
+}
diff --git a/test/Transforms/SCCP/apint-basictest3.ll b/test/Transforms/SCCP/apint-basictest3.ll
new file mode 100644
index 0000000..47671bf
--- /dev/null
+++ b/test/Transforms/SCCP/apint-basictest3.ll
@@ -0,0 +1,23 @@
+; This is a basic sanity check for constant propogation. It tests the basic
+; arithmatic operations.
+
+
+; RUN: opt < %s -sccp -S | not grep mul
+; RUN: opt < %s -sccp -S | not grep umod
+
+define i128 @test(i1 %B) {
+ br i1 %B, label %BB1, label %BB2
+BB1:
+ %t1 = add i128 0, 1
+ %t2 = sub i128 0, %t1
+ %t3 = mul i128 %t2, -1
+ br label %BB3
+BB2:
+ %f1 = udiv i128 -1, 1
+ %f2 = add i128 %f1, 1
+ %f3 = urem i128 %f2, 2121
+ br label %BB3
+BB3:
+ %Ret = phi i128 [%t3, %BB1], [%f3, %BB2]
+ ret i128 %Ret
+}
diff --git a/test/Transforms/SCCP/apint-basictest4.ll b/test/Transforms/SCCP/apint-basictest4.ll
new file mode 100644
index 0000000..41036ea
--- /dev/null
+++ b/test/Transforms/SCCP/apint-basictest4.ll
@@ -0,0 +1,25 @@
+; This is a basic sanity check for constant propogation. It tests the basic
+; logic operations.
+
+
+; RUN: opt < %s -sccp -S | not grep and
+; RUN: opt < %s -sccp -S | not grep trunc
+; RUN: opt < %s -sccp -S | grep {ret i100 -1}
+
+define i100 @test(i133 %A) {
+ %B = and i133 0, %A
+ %C = icmp sgt i133 %B, 0
+ br i1 %C, label %BB1, label %BB2
+BB1:
+ %t3 = xor i133 %B, -1
+ %t4 = trunc i133 %t3 to i100
+ br label %BB3
+BB2:
+ %f1 = or i133 -1, %A
+ %f2 = lshr i133 %f1, 33
+ %f3 = trunc i133 %f2 to i100
+ br label %BB3
+BB3:
+ %Ret = phi i100 [%t4, %BB1], [%f3, %BB2]
+ ret i100 %Ret
+}
diff --git a/test/Transforms/SCCP/apint-bigarray.ll b/test/Transforms/SCCP/apint-bigarray.ll
new file mode 100644
index 0000000..0dd9ad3
--- /dev/null
+++ b/test/Transforms/SCCP/apint-bigarray.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -sccp -S | not grep %X
+
+@G = global [1000000 x i10000] zeroinitializer
+
+define internal i10000* @test(i10000 %Arg) {
+ %X = getelementptr [1000000 x i10000]* @G, i32 0, i32 999
+ store i10000 %Arg, i10000* %X
+ ret i10000* %X
+}
+
+define i10000 @caller()
+{
+ %Y = call i10000* @test(i10000 -1)
+ %Z = load i10000* %Y
+ ret i10000 %Z
+}
+
+define i10000 @caller2()
+{
+ %Y = call i10000* @test(i10000 1)
+ %Z = load i10000* %Y
+ ret i10000 %Z
+}
diff --git a/test/Transforms/SCCP/apint-bigint.ll b/test/Transforms/SCCP/apint-bigint.ll
new file mode 100644
index 0000000..36a96c3
--- /dev/null
+++ b/test/Transforms/SCCP/apint-bigint.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -sccp -S | not grep xor
+
+define i11129 @test1() {
+ %B = shl i11129 1, 11128
+ %C = sub i11129 %B, 1
+ %D = xor i11129 %B, %C
+
+ ret i11129 %D
+}
diff --git a/test/Transforms/SCCP/apint-bigint2.ll b/test/Transforms/SCCP/apint-bigint2.ll
new file mode 100644
index 0000000..660eaad
--- /dev/null
+++ b/test/Transforms/SCCP/apint-bigint2.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -sccp -S | not grep load
+
+@Y = constant [6 x i101] [ i101 12, i101 123456789000000, i101 -12,
+ i101 -123456789000000, i101 0,i101 9123456789000000]
+
+define i101 @array()
+{
+Head:
+ %A = getelementptr [6 x i101]* @Y, i32 0, i32 1
+ %B = load i101* %A
+ %D = and i101 %B, 1
+ %DD = or i101 %D, 1
+ %E = trunc i101 %DD to i32
+ %F = getelementptr [6 x i101]* @Y, i32 0, i32 %E
+ %G = load i101* %F
+
+ ret i101 %G
+}
diff --git a/test/Transforms/SCCP/apint-ipsccp1.ll b/test/Transforms/SCCP/apint-ipsccp1.ll
new file mode 100644
index 0000000..fda40f5
--- /dev/null
+++ b/test/Transforms/SCCP/apint-ipsccp1.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -ipsccp -S | grep -v {ret i512 undef} | \
+; RUN: grep {ret i8 2}
+
+define internal i512 @test(i1 %B) {
+ br i1 %B, label %BB1, label %BB2
+BB1:
+ %Val = add i512 0, 1
+ br label %BB3
+BB2:
+ br label %BB3
+BB3:
+ %Ret = phi i512 [%Val, %BB1], [2, %BB2]
+ ret i512 %Ret
+}
+
+define i8 @caller()
+{
+ %t1 = and i2 2, 1
+ %t11 = trunc i2 %t1 to i1
+ %t2 = call i512 @test(i1 %t11)
+ %t3 = trunc i512 %t2 to i8
+ ret i8 %t3
+}
+
diff --git a/test/Transforms/SCCP/apint-ipsccp2.ll b/test/Transforms/SCCP/apint-ipsccp2.ll
new file mode 100644
index 0000000..3c02e05
--- /dev/null
+++ b/test/Transforms/SCCP/apint-ipsccp2.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -ipsccp -S | grep -v {ret i101 0} | \
+; RUN: grep -v {ret i101 undef} | not grep ret
+
+
+define internal i101 @bar(i101 %A) {
+ %x = icmp eq i101 %A, 0
+ br i1 %x, label %T, label %F
+T:
+ %B = call i101 @bar(i101 0)
+ ret i101 0
+F: ; unreachable
+ %C = call i101 @bar(i101 1)
+ ret i101 %C
+}
+
+define i101 @foo() {
+ %X = call i101 @bar(i101 0)
+ ret i101 %X
+}
diff --git a/test/Transforms/SCCP/apint-ipsccp3.ll b/test/Transforms/SCCP/apint-ipsccp3.ll
new file mode 100644
index 0000000..68987ae
--- /dev/null
+++ b/test/Transforms/SCCP/apint-ipsccp3.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -ipsccp -S | not grep global
+
+@G = internal global i66 undef
+
+
+
+define void @foo() {
+ %X = load i66* @G
+ store i66 %X, i66* @G
+ ret void
+}
+
+define i66 @bar() {
+ %V = load i66* @G
+ %C = icmp eq i66 %V, 17
+ br i1 %C, label %T, label %F
+T:
+ store i66 17, i66* @G
+ ret i66 %V
+F:
+ store i66 123, i66* @G
+ ret i66 0
+}
diff --git a/test/Transforms/SCCP/apint-ipsccp4.ll b/test/Transforms/SCCP/apint-ipsccp4.ll
new file mode 100644
index 0000000..75875ff
--- /dev/null
+++ b/test/Transforms/SCCP/apint-ipsccp4.ll
@@ -0,0 +1,49 @@
+; This test makes sure that these instructions are properly constant propagated.
+
+; RUN: opt < %s -ipsccp -S | not grep load
+; RUN: opt < %s -ipsccp -S | not grep add
+; RUN: opt < %s -ipsccp -S | not grep phi
+
+
+@Y = constant [2 x { i212, float }] [ { i212, float } { i212 12, float 1.0 },
+ { i212, float } { i212 37, float 2.0 } ]
+
+define internal float @test2() {
+ %A = getelementptr [2 x { i212, float}]* @Y, i32 0, i32 1, i32 1
+ %B = load float* %A
+ ret float %B
+}
+
+define internal float @test3() {
+ %A = getelementptr [2 x { i212, float}]* @Y, i32 0, i32 0, i32 1
+ %B = load float* %A
+ ret float %B
+}
+
+define internal float @test()
+{
+ %A = call float @test2()
+ %B = call float @test3()
+
+ %E = fdiv float %B, %A
+ ret float %E
+}
+
+define float @All()
+{
+ %A = call float @test()
+ %B = fcmp oge float %A, 1.0
+ br i1 %B, label %T, label %F
+T:
+ %C = fadd float %A, 1.0
+ br label %exit
+F:
+ %D = fadd float %A, 2.0
+ br label %exit
+exit:
+ %E = phi float [%C, %T], [%D, %F]
+ ret float %E
+}
+
+
+
diff --git a/test/Transforms/SCCP/apint-load.ll b/test/Transforms/SCCP/apint-load.ll
new file mode 100644
index 0000000..56fdb35
--- /dev/null
+++ b/test/Transforms/SCCP/apint-load.ll
@@ -0,0 +1,36 @@
+; This test makes sure that these instructions are properly constant propagated.
+
+; RUN: opt < %s -ipsccp -S | not grep load
+; RUN: opt < %s -ipsccp -S | not grep fdiv
+
+@X = constant i212 42
+@Y = constant [2 x { i212, float }] [ { i212, float } { i212 12, float 1.0 },
+ { i212, float } { i212 37, float 0x3FF3B2FEC0000000 } ]
+define i212 @test1() {
+ %B = load i212* @X
+ ret i212 %B
+}
+
+define internal float @test2() {
+ %A = getelementptr [2 x { i212, float}]* @Y, i32 0, i32 1, i32 1
+ %B = load float* %A
+ ret float %B
+}
+
+define internal i212 @test3() {
+ %A = getelementptr [2 x { i212, float}]* @Y, i32 0, i32 0, i32 0
+ %B = load i212* %A
+ ret i212 %B
+}
+
+define float @All()
+{
+ %A = call float @test2()
+ %B = call i212 @test3()
+ %C = mul i212 %B, -1234567
+ %D = sitofp i212 %C to float
+ %E = fdiv float %A, %D
+ ret float %E
+}
+
+
diff --git a/test/Transforms/SCCP/apint-phi.ll b/test/Transforms/SCCP/apint-phi.ll
new file mode 100644
index 0000000..50f0d1a
--- /dev/null
+++ b/test/Transforms/SCCP/apint-phi.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -sccp -S | not grep phi
+
+define i999 @test(i999%A, i1 %c) {
+bb1:
+ br label %BB2
+BB2:
+ %V = phi i999 [2, %bb1], [%A, %BB4]
+ br label %BB3
+
+BB3:
+ %E = trunc i999 %V to i1
+ %F = and i1 %E, %c
+ br i1 %F, label %BB4, label %BB5
+BB4:
+ br label %BB2
+
+BB5:
+ ret i999 %V
+}
diff --git a/test/Transforms/SCCP/apint-select.ll b/test/Transforms/SCCP/apint-select.ll
new file mode 100644
index 0000000..c797519
--- /dev/null
+++ b/test/Transforms/SCCP/apint-select.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -sccp -S | not grep select
+
+@A = constant i32 10
+
+define i712 @test1() {
+ %P = getelementptr i32* @A, i32 0
+ %B = ptrtoint i32* %P to i64
+ %BB = and i64 %B, undef
+ %C = icmp sge i64 %BB, 0
+ %X = select i1 %C, i712 0, i712 1
+ ret i712 %X
+}
+
+
+
+define i712 @test2(i1 %C) {
+ %X = select i1 %C, i712 0, i712 undef
+ ret i712 %X
+}
+
+
diff --git a/test/Transforms/SCCP/calltest.ll b/test/Transforms/SCCP/calltest.ll
new file mode 100644
index 0000000..9dec22f
--- /dev/null
+++ b/test/Transforms/SCCP/calltest.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -sccp -loop-deletion -simplifycfg -S | not grep br
+
+; No matter how hard you try, sqrt(1.0) is always 1.0. This allows the
+; optimizer to delete this loop.
+
+declare double @sqrt(double)
+
+define double @test(i32 %param) {
+entry:
+ br label %Loop
+Loop: ; preds = %Loop, %entry
+ %I2 = phi i32 [ 0, %entry ], [ %I3, %Loop ] ; <i32> [#uses=1]
+ %V = phi double [ 1.000000e+00, %entry ], [ %V2, %Loop ] ; <double> [#uses=2]
+ %V2 = call double @sqrt( double %V ) ; <double> [#uses=1]
+ %I3 = add i32 %I2, 1 ; <i32> [#uses=2]
+ %tmp.7 = icmp ne i32 %I3, %param ; <i1> [#uses=1]
+ br i1 %tmp.7, label %Loop, label %Exit
+Exit: ; preds = %Loop
+ ret double %V
+}
+
diff --git a/test/Transforms/SCCP/crash.ll b/test/Transforms/SCCP/crash.ll
new file mode 100644
index 0000000..2f6da1d
--- /dev/null
+++ b/test/Transforms/SCCP/crash.ll
@@ -0,0 +1,29 @@
+; RUN: opt %s -sccp -S
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+
+define void @test1(i8 %arg) {
+entry:
+ br i1 undef, label %return, label %bb
+
+bb:
+ br label %bb34
+
+bb23:
+ %c = icmp eq i8 %arg, undef
+ br i1 %c, label %bb34, label %bb23
+
+bb34:
+ %Kind.1 = phi i32 [ undef, %bb ], [ %ins174, %bb23 ]
+ %mask173 = or i32 %Kind.1, 7
+ %ins174 = and i32 %mask173, -249
+ br label %bb23
+
+return:
+ ret void
+}
+
+define i32 @test2([4 x i32] %A) {
+ %B = extractvalue [4 x i32] %A, 1
+ ret i32 %B
+}
diff --git a/test/Transforms/SCCP/dg.exp b/test/Transforms/SCCP/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/SCCP/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/SCCP/ipsccp-basic.ll b/test/Transforms/SCCP/ipsccp-basic.ll
new file mode 100644
index 0000000..e369920
--- /dev/null
+++ b/test/Transforms/SCCP/ipsccp-basic.ll
@@ -0,0 +1,206 @@
+; RUN: opt < %s -ipsccp -S | FileCheck %s
+
+;;======================== test1
+
+define internal i32 @test1a(i32 %A) {
+ %X = add i32 1, 2
+ ret i32 %A
+}
+; CHECK: define internal i32 @test1a
+; CHECK: ret i32 undef
+
+define i32 @test1b() {
+ %X = call i32 @test1a( i32 17 )
+ ret i32 %X
+
+; CHECK: define i32 @test1b
+; CHECK: ret i32 17
+}
+
+
+
+;;======================== test2
+
+define internal i32 @test2a(i32 %A) {
+ %C = icmp eq i32 %A, 0
+ br i1 %C, label %T, label %F
+T:
+ %B = call i32 @test2a( i32 0 )
+ ret i32 0
+F:
+ %C.upgrd.1 = call i32 @test2a(i32 1)
+ ret i32 %C.upgrd.1
+}
+; CHECK: define internal i32 @test2a
+; CHECK-NEXT: br label %T
+; CHECK: ret i32 undef
+
+
+define i32 @test2b() {
+ %X = call i32 @test2a(i32 0)
+ ret i32 %X
+}
+; CHECK: define i32 @test2b
+; CHECK-NEXT: %X = call i32 @test2a(i32 0)
+; CHECK-NEXT: ret i32 0
+
+
+;;======================== test3
+
+@G = internal global i32 undef
+
+define void @test3a() {
+ %X = load i32* @G
+ store i32 %X, i32* @G
+ ret void
+}
+; CHECK: define void @test3a
+; CHECK-NEXT: ret void
+
+
+define i32 @test3b() {
+ %V = load i32* @G
+ %C = icmp eq i32 %V, 17
+ br i1 %C, label %T, label %F
+T:
+ store i32 17, i32* @G
+ ret i32 %V
+F:
+ store i32 123, i32* @G
+ ret i32 0
+}
+; CHECK: define i32 @test3b
+; CHECK-NOT: store
+; CHECK: ret i32 0
+
+
+;;======================== test4
+
+define internal {i64,i64} @test4a() {
+ %a = insertvalue {i64,i64} undef, i64 4, 1
+ %b = insertvalue {i64,i64} %a, i64 5, 0
+ ret {i64,i64} %b
+}
+
+define i64 @test4b() {
+ %a = invoke {i64,i64} @test4a()
+ to label %A unwind label %B
+A:
+ %b = extractvalue {i64,i64} %a, 0
+ %c = call i64 @test4c(i64 %b)
+ ret i64 %c
+B:
+ ret i64 0
+}
+; CHECK: define i64 @test4b()
+; CHECK: %c = call i64 @test4c(i64 5)
+; CHECK-NEXT: ret i64 5
+
+
+define internal i64 @test4c(i64 %a) {
+ ret i64 %a
+}
+; CHECK: define internal i64 @test4c
+; CHECK: ret i64 undef
+
+
+
+;;======================== test5
+
+; PR4313
+define internal {i64,i64} @test5a() {
+ %a = insertvalue {i64,i64} undef, i64 4, 1
+ %b = insertvalue {i64,i64} %a, i64 5, 0
+ ret {i64,i64} %b
+}
+
+define i64 @test5b() {
+ %a = invoke {i64,i64} @test5a()
+ to label %A unwind label %B
+A:
+ %c = call i64 @test5c({i64,i64} %a)
+ ret i64 %c
+B:
+ ret i64 0
+}
+
+; CHECK: define i64 @test5b()
+; CHECK: A:
+; CHECK-NEXT: %c = call i64 @test5c(%0 %a)
+; CHECK-NEXT: ret i64 5
+
+define internal i64 @test5c({i64,i64} %a) {
+ %b = extractvalue {i64,i64} %a, 0
+ ret i64 %b
+}
+
+
+;;======================== test6
+
+define i64 @test6a() {
+ ret i64 0
+}
+
+define i64 @test6b() {
+ %a = call i64 @test6a()
+ ret i64 %a
+}
+; CHECK: define i64 @test6b
+; CHECK: ret i64 0
+
+;;======================== test7
+
+
+%T = type {i32,i32}
+
+define internal {i32, i32} @test7a(i32 %A) {
+ %X = add i32 1, %A
+ %mrv0 = insertvalue %T undef, i32 %X, 0
+ %mrv1 = insertvalue %T %mrv0, i32 %A, 1
+ ret %T %mrv1
+; CHECK: @test7a
+; CHECK-NEXT: %mrv0 = insertvalue %T undef, i32 18, 0
+; CHECK-NEXT: %mrv1 = insertvalue %T %mrv0, i32 17, 1
+}
+
+define i32 @test7b() {
+ %X = call {i32, i32} @test7a(i32 17)
+ %Y = extractvalue {i32, i32} %X, 0
+ %Z = add i32 %Y, %Y
+ ret i32 %Z
+; CHECK: define i32 @test7b
+; CHECK-NEXT: call %T @test7a(i32 17)
+; CHECK-NEXT: ret i32 36
+}
+
+;;======================== test8
+
+
+define internal {} @test8a(i32 %A, i32* %P) {
+ store i32 %A, i32* %P
+ ret {} {}
+; CHECK: @test8a
+; CHECK-NEXT: store i32 5,
+; CHECK-NEXT: ret
+}
+
+define void @test8b(i32* %P) {
+ %X = call {} @test8a(i32 5, i32* %P)
+ ret void
+; CHECK: define void @test8b
+; CHECK-NEXT: call { } @test8a
+; CHECK-NEXT: ret void
+}
+
+;;======================== test9
+
+@test9g = internal global { } zeroinitializer
+
+define void @test9() {
+entry:
+ %local_foo = alloca { }
+ load { }* @test9g
+ store { } %0, { }* %local_foo
+ ret void
+}
+
diff --git a/test/Transforms/SCCP/loadtest.ll b/test/Transforms/SCCP/loadtest.ll
new file mode 100644
index 0000000..add2af4
--- /dev/null
+++ b/test/Transforms/SCCP/loadtest.ll
@@ -0,0 +1,33 @@
+; This test makes sure that these instructions are properly constant propagated.
+
+target datalayout = "e-p:32:32"
+
+; RUN: opt < %s -sccp -S | not grep load
+
+
+@X = constant i32 42 ; <i32*> [#uses=1]
+@Y = constant [2 x { i32, float }] [ { i32, float } { i32 12, float 1.000000e+00 }, { i32, float } { i32 37, float 0x3FF3B2FEC0000000 } ] ; <[2 x { i32, float }]*> [#uses=2]
+
+define i32 @test1() {
+ %B = load i32* @X ; <i32> [#uses=1]
+ ret i32 %B
+}
+
+define float @test2() {
+ %A = getelementptr [2 x { i32, float }]* @Y, i64 0, i64 1, i32 1 ; <float*> [#uses=1]
+ %B = load float* %A ; <float> [#uses=1]
+ ret float %B
+}
+
+define i32 @test3() {
+ %A = getelementptr [2 x { i32, float }]* @Y, i64 0, i64 0, i32 0 ; <i32*> [#uses=1]
+ %B = load i32* %A
+ ret i32 %B
+}
+
+define i8 @test4() {
+ %A = bitcast i32* @X to i8*
+ %B = load i8* %A
+ ret i8 %B
+}
+
diff --git a/test/Transforms/SCCP/logical-nuke.ll b/test/Transforms/SCCP/logical-nuke.ll
new file mode 100644
index 0000000..b3d845c
--- /dev/null
+++ b/test/Transforms/SCCP/logical-nuke.ll
@@ -0,0 +1,9 @@
+; RUN: opt < %s -sccp -S | grep {ret i32 0}
+
+; Test that SCCP has basic knowledge of when and/or nuke overdefined values.
+
+define i32 @test(i32 %X) {
+ %Y = and i32 %X, 0 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/SCCP/phitest.ll b/test/Transforms/SCCP/phitest.ll
new file mode 100644
index 0000000..4c5c3dc
--- /dev/null
+++ b/test/Transforms/SCCP/phitest.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -sccp -dce -simplifycfg -S | not grep br
+
+define i32 @test(i32 %param) {
+entry:
+ %tmp.1 = icmp ne i32 %param, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %endif.0, label %else
+else: ; preds = %entry
+ br label %endif.0
+endif.0: ; preds = %else, %entry
+ %a.0 = phi i32 [ 2, %else ], [ 3, %entry ] ; <i32> [#uses=1]
+ %b.0 = phi i32 [ 3, %else ], [ 2, %entry ] ; <i32> [#uses=1]
+ %tmp.5 = add i32 %a.0, %b.0 ; <i32> [#uses=1]
+ %tmp.7 = icmp ne i32 %tmp.5, 5 ; <i1> [#uses=1]
+ br i1 %tmp.7, label %UnifiedReturnBlock, label %endif.1
+endif.1: ; preds = %endif.0
+ ret i32 0
+UnifiedReturnBlock: ; preds = %endif.0
+ ret i32 2
+}
+
diff --git a/test/Transforms/SCCP/sccptest.ll b/test/Transforms/SCCP/sccptest.ll
new file mode 100644
index 0000000..a719f6c
--- /dev/null
+++ b/test/Transforms/SCCP/sccptest.ll
@@ -0,0 +1,58 @@
+; RUN: opt < %s -sccp -S | FileCheck %s
+
+; This is a basic sanity check for constant propagation. The add instruction
+; should be eliminated.
+
+define i32 @test1(i1 %B) {
+ br i1 %B, label %BB1, label %BB2
+BB1: ; preds = %0
+ %Val = add i32 0, 0 ; <i32> [#uses=1]
+ br label %BB3
+BB2: ; preds = %0
+ br label %BB3
+BB3: ; preds = %BB2, %BB1
+ %Ret = phi i32 [ %Val, %BB1 ], [ 1, %BB2 ] ; <i32> [#uses=1]
+ ret i32 %Ret
+
+; CHECK: @test1
+; CHECK: %Ret = phi i32 [ 0, %BB1 ], [ 1, %BB2 ]
+}
+
+; This is the test case taken from appel's book that illustrates a hard case
+; that SCCP gets right.
+;
+define i32 @test2(i32 %i0, i32 %j0) {
+; CHECK: @test2
+BB1:
+ br label %BB2
+BB2:
+ %j2 = phi i32 [ %j4, %BB7 ], [ 1, %BB1 ]
+ %k2 = phi i32 [ %k4, %BB7 ], [ 0, %BB1 ]
+ %kcond = icmp slt i32 %k2, 100
+ br i1 %kcond, label %BB3, label %BB4
+BB3:
+ %jcond = icmp slt i32 %j2, 20
+ br i1 %jcond, label %BB5, label %BB6
+; CHECK: BB3:
+; CHECK-NEXT: br i1 true, label %BB5, label %BB6
+BB4:
+ ret i32 %j2
+; CHECK: BB4:
+; CHECK-NEXT: ret i32 1
+BB5:
+ %k3 = add i32 %k2, 1
+ br label %BB7
+BB6:
+ %k5 = add i32 %k2, 1
+ br label %BB7
+; CHECK: BB6:
+; CHECK-NEXT: br label %BB7
+BB7:
+ %j4 = phi i32 [ 1, %BB5 ], [ %k2, %BB6 ]
+ %k4 = phi i32 [ %k3, %BB5 ], [ %k5, %BB6 ]
+ br label %BB2
+; CHECK: BB7:
+; CHECK-NEXT: %k4 = phi i32 [ %k3, %BB5 ], [ undef, %BB6 ]
+; CHECK-NEXT: br label %BB2
+}
+
diff --git a/test/Transforms/SCCP/select.ll b/test/Transforms/SCCP/select.ll
new file mode 100644
index 0000000..b2f1dd2
--- /dev/null
+++ b/test/Transforms/SCCP/select.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -sccp -S | not grep select
+
+define i32 @test1(i1 %C) {
+ %X = select i1 %C, i32 0, i32 0 ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i32 @test2(i1 %C) {
+ %X = select i1 %C, i32 0, i32 undef ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/SRETPromotion/2008-03-11-attributes.ll b/test/Transforms/SRETPromotion/2008-03-11-attributes.ll
new file mode 100644
index 0000000..55abec5
--- /dev/null
+++ b/test/Transforms/SRETPromotion/2008-03-11-attributes.ll
@@ -0,0 +1,7 @@
+; RUN: opt < %s -sretpromotion -disable-output
+ %struct.ObjPoint = type { double, double, double, double, double, double }
+
+define void @RotatePoint(%struct.ObjPoint* sret %agg.result, %struct.ObjPoint* byval %a, double %rx, double %ry, double %rz) nounwind {
+entry:
+ unreachable
+}
diff --git a/test/Transforms/SRETPromotion/2008-06-04-function-pointer-passing.ll b/test/Transforms/SRETPromotion/2008-06-04-function-pointer-passing.ll
new file mode 100644
index 0000000..1168b0b
--- /dev/null
+++ b/test/Transforms/SRETPromotion/2008-06-04-function-pointer-passing.ll
@@ -0,0 +1,24 @@
+; This test lures sretpromotion into promoting the sret argument of foo, even
+; when the function is used as an argument to bar. It used to not check for
+; this, assuming that all users of foo were direct calls, resulting in an
+; assertion failure later on.
+
+; We're mainly testing for opt not to crash, but we'll check to see if the sret
+; attribute is still there for good measure.
+; RUN: opt < %s -sretpromotion -S | grep sret
+
+%struct.S = type <{ i32, i32 }>
+
+define i32 @main() {
+entry:
+ %tmp = alloca %struct.S ; <%struct.S*> [#uses=1]
+ call void @bar( %struct.S* sret %tmp, void (%struct.S*, ...)* @foo )
+ ret i32 undef
+}
+
+declare void @bar(%struct.S* sret , void (%struct.S*, ...)*)
+
+define internal void @foo(%struct.S* sret %agg.result, ...) {
+entry:
+ ret void
+}
diff --git a/test/Transforms/SRETPromotion/2008-06-05-non-call-use.ll b/test/Transforms/SRETPromotion/2008-06-05-non-call-use.ll
new file mode 100644
index 0000000..26c6a6e5
--- /dev/null
+++ b/test/Transforms/SRETPromotion/2008-06-05-non-call-use.ll
@@ -0,0 +1,20 @@
+; This test shows an sret function that is used as an operand to a bitcast.
+; StructRetPromotion used to assume that a function was only used by call or
+; invoke instructions, making this code cause an assertion failure.
+
+; We're mainly testing for opt not to crash, but we'll check to see if the sret
+; attribute is still there for good measure.
+; RUN: opt < %s -sretpromotion -S | grep sret
+
+%struct.S = type <{ i32, i32 }>
+
+define i32 @main() {
+entry:
+ %bar = bitcast void (%struct.S*)* @foo to i32 ()*
+ ret i32 undef
+}
+
+define internal void @foo(%struct.S* sret) {
+entry:
+ ret void
+}
diff --git a/test/Transforms/SRETPromotion/basictest.ll b/test/Transforms/SRETPromotion/basictest.ll
new file mode 100644
index 0000000..ff047dc
--- /dev/null
+++ b/test/Transforms/SRETPromotion/basictest.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -sretpromotion -S > %t
+; RUN: cat %t | grep sret | count 1
+
+; This function is promotable
+define internal void @promotable({i32, i32}* sret %s) {
+ %A = getelementptr {i32, i32}* %s, i32 0, i32 0
+ store i32 0, i32* %A
+ %B = getelementptr {i32, i32}* %s, i32 0, i32 0
+ store i32 1, i32* %B
+ ret void
+}
+
+; This function is not promotable (due to it's use below)
+define internal void @notpromotable({i32, i32}* sret %s) {
+ %A = getelementptr {i32, i32}* %s, i32 0, i32 0
+ store i32 0, i32* %A
+ %B = getelementptr {i32, i32}* %s, i32 0, i32 0
+ store i32 1, i32* %B
+ ret void
+}
+
+define void @caller({i32, i32}* %t) {
+ %s = alloca {i32, i32}
+ call void @promotable({i32, i32}* %s)
+ %A = getelementptr {i32, i32}* %s, i32 0, i32 0
+ %a = load i32* %A
+ %B = getelementptr {i32, i32}* %s, i32 0, i32 0
+ %b = load i32* %B
+ ; This passes in something that's not an alloca, which makes the argument not
+ ; promotable
+ call void @notpromotable({i32, i32}* %t)
+ ret void
+}
diff --git a/test/Transforms/SRETPromotion/dg.exp b/test/Transforms/SRETPromotion/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/SRETPromotion/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/SSI/2009-07-09-Invoke.ll b/test/Transforms/SSI/2009-07-09-Invoke.ll
new file mode 100644
index 0000000..20a2217
--- /dev/null
+++ b/test/Transforms/SSI/2009-07-09-Invoke.ll
@@ -0,0 +1,71 @@
+; RUN: opt < %s -ssi-everything -disable-output
+; PR4511
+
+ %"struct.std::_Vector_base<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >" = type { %"struct.std::_Vector_base<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >::_Vector_impl" }
+ %"struct.std::_Vector_base<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >::_Vector_impl" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" = type { i32, i32, i32 }
+ %"struct.std::vector<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >" = type { %"struct.std::_Vector_base<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >" }
+
+declare void @_Unwind_Resume(i8*)
+
+declare fastcc %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* @_ZSt24__uninitialized_copy_auxIPSsS0_ET0_T_S2_S1_St12__false_type(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*)
+
+define fastcc void @_ZNSt6vectorISsSaISsEE9push_backERKSs(%"struct.std::vector<std::basic_string<char, std::char_traits<char>, std::allocator<char> >,std::allocator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >"* nocapture %this, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* nocapture %__x) {
+entry:
+ br i1 undef, label %_ZNSt12_Vector_baseISsSaISsEE11_M_allocateEj.exit.i, label %bb
+
+bb: ; preds = %entry
+ ret void
+
+_ZNSt12_Vector_baseISsSaISsEE11_M_allocateEj.exit.i: ; preds = %entry
+ %0 = invoke fastcc %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* @_ZSt24__uninitialized_copy_auxIPSsS0_ET0_T_S2_S1_St12__false_type(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* undef, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* undef, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* undef)
+ to label %invcont14.i unwind label %ppad81.i ; <%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*> [#uses=3]
+
+invcont14.i: ; preds = %_ZNSt12_Vector_baseISsSaISsEE11_M_allocateEj.exit.i
+ %1 = icmp eq %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %0, null ; <i1> [#uses=1]
+ br i1 %1, label %bb19.i, label %bb.i17.i
+
+bb.i17.i: ; preds = %invcont14.i
+ %2 = invoke fastcc i8* @_ZNSs4_Rep8_M_cloneERKSaIcEj(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep"* undef, i32 0)
+ to label %bb2.i25.i unwind label %ppad.i.i.i23.i ; <i8*> [#uses=0]
+
+ppad.i.i.i23.i: ; preds = %bb.i17.i
+ invoke void @_Unwind_Resume(i8* undef)
+ to label %.noexc.i24.i unwind label %lpad.i29.i
+
+.noexc.i24.i: ; preds = %ppad.i.i.i23.i
+ unreachable
+
+bb2.i25.i: ; preds = %bb.i17.i
+ unreachable
+
+lpad.i29.i: ; preds = %ppad.i.i.i23.i
+ invoke void @_Unwind_Resume(i8* undef)
+ to label %.noexc.i9 unwind label %ppad81.i
+
+.noexc.i9: ; preds = %lpad.i29.i
+ unreachable
+
+bb19.i: ; preds = %invcont14.i
+ %3 = getelementptr %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %0, i32 1 ; <%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*> [#uses=2]
+ %4 = invoke fastcc %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* @_ZSt24__uninitialized_copy_auxIPSsS0_ET0_T_S2_S1_St12__false_type(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* undef, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* undef, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %3)
+ to label %invcont20.i unwind label %ppad81.i ; <%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*> [#uses=0]
+
+invcont20.i: ; preds = %bb19.i
+ unreachable
+
+invcont32.i: ; preds = %ppad81.i
+ unreachable
+
+ppad81.i: ; preds = %bb19.i, %lpad.i29.i, %_ZNSt12_Vector_baseISsSaISsEE11_M_allocateEj.exit.i
+ %__new_finish.0.i = phi %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* [ %0, %lpad.i29.i ], [ undef, %_ZNSt12_Vector_baseISsSaISsEE11_M_allocateEj.exit.i ], [ %3, %bb19.i ] ; <%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"*> [#uses=0]
+ br i1 undef, label %invcont32.i, label %bb.i.i.i.i
+
+bb.i.i.i.i: ; preds = %bb.i.i.i.i, %ppad81.i
+ br label %bb.i.i.i.i
+}
+
+declare fastcc i8* @_ZNSs4_Rep8_M_cloneERKSaIcEj(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep"* nocapture, i32)
diff --git a/test/Transforms/SSI/2009-08-15-UnreachableBB.ll b/test/Transforms/SSI/2009-08-15-UnreachableBB.ll
new file mode 100644
index 0000000..0fe37ec
--- /dev/null
+++ b/test/Transforms/SSI/2009-08-15-UnreachableBB.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -ssi-everything -disable-output
+
+declare fastcc i32 @ras_Empty(i8** nocapture) nounwind readonly
+
+define i32 @cc_Tautology() nounwind {
+entry:
+ unreachable
+
+cc_InitData.exit: ; No predecessors!
+ %0 = call fastcc i32 @ras_Empty(i8** undef) nounwind ; <i32> [#uses=1]
+ %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb2, label %bb6
+
+bb2: ; preds = %cc_InitData.exit
+ unreachable
+
+bb6: ; preds = %cc_InitData.exit
+ ret i32 undef
+}
diff --git a/test/Transforms/SSI/2009-08-17-CritEdge.ll b/test/Transforms/SSI/2009-08-17-CritEdge.ll
new file mode 100644
index 0000000..61bd2dc
--- /dev/null
+++ b/test/Transforms/SSI/2009-08-17-CritEdge.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -ssi-everything -disable-output
+
+define void @test(i32 %x) {
+entry:
+ br label %label1
+label1:
+ %A = phi i32 [ 0, %entry ], [ %A.1, %label2 ]
+ %B = icmp slt i32 %A, %x
+ br i1 %B, label %label2, label %label2
+label2:
+ %A.1 = add i32 %A, 1
+ br label %label1
+label3: ; No predecessors!
+ ret void
+}
diff --git a/test/Transforms/SSI/2009-08-19-UnreachableBB2.ll b/test/Transforms/SSI/2009-08-19-UnreachableBB2.ll
new file mode 100644
index 0000000..64bed19
--- /dev/null
+++ b/test/Transforms/SSI/2009-08-19-UnreachableBB2.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -ssi-everything -disable-output
+
+define void @foo() {
+entry:
+ %tmp0 = load i64* undef, align 4 ; <i64> [#uses=3]
+ br i1 undef, label %end_stmt_playback, label %bb16
+
+readJournalHdr.exit: ; No predecessors!
+ br label %end_stmt_playback
+
+bb16: ; preds = %bb7
+ %tmp1 = icmp slt i64 0, %tmp0 ; <i1> [#uses=1]
+ br i1 %tmp1, label %bb16, label %bb17
+
+bb17: ; preds = %bb16
+ store i64 %tmp0, i64* undef, align 4
+ br label %end_stmt_playback
+
+end_stmt_playback: ; preds = %bb17, %readJournalHdr.exit, %bb6, %bb2
+ store i64 %tmp0, i64* undef, align 4
+ ret void
+}
diff --git a/test/Transforms/SSI/dg.exp b/test/Transforms/SSI/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/SSI/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/SSI/ssiphi.ll b/test/Transforms/SSI/ssiphi.ll
new file mode 100644
index 0000000..a42b70c
--- /dev/null
+++ b/test/Transforms/SSI/ssiphi.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -ssi-everything -S | FileCheck %s
+
+declare void @use(i32)
+declare i32 @create()
+
+define i32 @foo() {
+entry:
+ %x = call i32 @create()
+ %y = icmp slt i32 %x, 10
+ br i1 %y, label %T, label %F
+T:
+; CHECK: SSI_sigma
+ call void @use(i32 %x)
+ br label %join
+F:
+; CHECK: SSI_sigma
+ call void @use(i32 %x)
+ br label %join
+join:
+; CHECK: SSI_phi
+ ret i32 %x
+}
diff --git a/test/Transforms/ScalarRepl/2003-05-29-ArrayFail.ll b/test/Transforms/ScalarRepl/2003-05-29-ArrayFail.ll
new file mode 100644
index 0000000..7116199
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2003-05-29-ArrayFail.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -scalarrepl -instcombine -S | not grep alloca
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+; Test that an array is not incorrectly deconstructed.
+
+define i32 @test() nounwind {
+ %X = alloca [4 x i32] ; <[4 x i32]*> [#uses=1]
+ %Y = getelementptr [4 x i32]* %X, i64 0, i64 0 ; <i32*> [#uses=1]
+ ; Must preserve arrayness!
+ %Z = getelementptr i32* %Y, i64 1 ; <i32*> [#uses=1]
+ %A = load i32* %Z ; <i32> [#uses=1]
+ ret i32 %A
+}
diff --git a/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll b/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll
new file mode 100644
index 0000000..b147ec9
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll
@@ -0,0 +1,8 @@
+; RUN: opt < %s -scalarrepl
+
+define void @main() {
+ %E = alloca { { i32, float, double, i64 }, { i32, float, double, i64 } } ; <{ { i32, float, double, i64 }, { i32, float, double, i64 } }*> [#uses=1]
+ %tmp.151 = getelementptr { { i32, float, double, i64 }, { i32, float, double, i64 } }* %E, i64 0, i32 1, i32 3 ; <i64*> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll b/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll
new file mode 100644
index 0000000..89c0b05
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -scalarrepl
+
+define i32 @test() {
+ %X = alloca { [4 x i32] } ; <{ [4 x i32] }*> [#uses=1]
+ %Y = getelementptr { [4 x i32] }* %X, i64 0, i32 0, i64 2 ; <i32*> [#uses=2]
+ store i32 4, i32* %Y
+ %Z = load i32* %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/ScalarRepl/2003-09-12-IncorrectPromote.ll b/test/Transforms/ScalarRepl/2003-09-12-IncorrectPromote.ll
new file mode 100644
index 0000000..eb1c945
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2003-09-12-IncorrectPromote.ll
@@ -0,0 +1,13 @@
+; Scalar replacement was incorrectly promoting this alloca!!
+;
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: sed {s/;.*//g} | grep {\\\[}
+
+define i8* @test() {
+ %A = alloca [30 x i8] ; <[30 x i8]*> [#uses=1]
+ %B = getelementptr [30 x i8]* %A, i64 0, i64 0 ; <i8*> [#uses=2]
+ %C = getelementptr i8* %B, i64 1 ; <i8*> [#uses=1]
+ store i8 0, i8* %B
+ ret i8* %C
+}
+
diff --git a/test/Transforms/ScalarRepl/2003-10-29-ArrayProblem.ll b/test/Transforms/ScalarRepl/2003-10-29-ArrayProblem.ll
new file mode 100644
index 0000000..24e6a31
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2003-10-29-ArrayProblem.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -scalarrepl -S | grep {alloca %T}
+
+%T = type { [80 x i8], i32, i32 }
+declare i32 @.callback_1(i8*)
+
+declare void @.iter_2(i32 (i8*)*, i8*)
+
+define i32 @main() {
+ %d = alloca { [80 x i8], i32, i32 } ; <{ [80 x i8], i32, i32 }*> [#uses=2]
+ %tmp.0 = getelementptr { [80 x i8], i32, i32 }* %d, i64 0, i32 2 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp.0
+ %tmp.1 = getelementptr { [80 x i8], i32, i32 }* %d, i64 0, i32 0, i64 0 ; <i8*> [#uses=1]
+ call void @.iter_2( i32 (i8*)* @.callback_1, i8* %tmp.1 )
+ ret i32 0
+}
+
diff --git a/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll b/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll
new file mode 100644
index 0000000..ea23c31
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -scalarrepl -disable-output
+
+target datalayout = "E-p:32:32"
+ %struct.rtx_def = type { [2 x i8], i32, [1 x %union.rtunion_def] }
+ %union.rtunion_def = type { i32 }
+
+define void @find_reloads() {
+entry:
+ %c_addr.i = alloca i8 ; <i8*> [#uses=1]
+ switch i32 0, label %return [
+ i32 36, label %label.7
+ i32 34, label %label.7
+ i32 41, label %label.5
+ ]
+label.5: ; preds = %entry
+ ret void
+label.7: ; preds = %entry, %entry
+ br i1 false, label %then.4, label %switchexit.0
+then.4: ; preds = %label.7
+ %tmp.0.i = bitcast i8* %c_addr.i to i32* ; <i32*> [#uses=1]
+ store i32 44, i32* %tmp.0.i
+ ret void
+switchexit.0: ; preds = %label.7
+ ret void
+return: ; preds = %entry
+ ret void
+}
+
diff --git a/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll b/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll
new file mode 100644
index 0000000..03c7452
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -scalarrepl -disable-output
+
+target datalayout = "E-p:32:32"
+
+define i32 @test(i64 %L) {
+ %X = alloca i32 ; <i32*> [#uses=2]
+ %Y = bitcast i32* %X to i64* ; <i64*> [#uses=1]
+ store i64 0, i64* %Y
+ %Z = load i32* %X ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll b/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll
new file mode 100644
index 0000000..63840f1
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -scalarrepl -disable-output
+
+define void @output_toc() {
+entry:
+ %buf = alloca [256 x i8], align 16 ; <[256 x i8]*> [#uses=1]
+ %name = alloca i8*, align 4 ; <i8**> [#uses=1]
+ %real_name = alloca i8*, align 4 ; <i8**> [#uses=0]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %buf.upgrd.1 = bitcast [256 x i8]* %buf to i8* ; <i8*> [#uses=1]
+ store i8* %buf.upgrd.1, i8** %name
+ call void @abort( )
+ unreachable
+return: ; No predecessors!
+ ret void
+}
+
+declare void @abort()
+
diff --git a/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll b/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll
new file mode 100644
index 0000000..dcd7e53
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll
@@ -0,0 +1,57 @@
+; RUN: opt < %s -scalarrepl -disable-output
+; END.
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8.7.2"
+
+define void @glgProcessColor() {
+entry:
+ %source_ptr = alloca i8*, align 4 ; <i8**> [#uses=2]
+ br i1 false, label %bb1357, label %cond_next583
+cond_next583: ; preds = %entry
+ ret void
+bb1357: ; preds = %entry
+ br i1 false, label %bb1365, label %bb27055
+bb1365: ; preds = %bb1357
+ switch i32 0, label %cond_next10377 [
+ i32 0, label %bb4679
+ i32 1, label %bb4679
+ i32 2, label %bb4679
+ i32 3, label %bb4679
+ i32 4, label %bb5115
+ i32 5, label %bb6651
+ i32 6, label %bb7147
+ i32 7, label %bb8683
+ i32 8, label %bb9131
+ i32 9, label %bb9875
+ i32 10, label %bb4679
+ i32 11, label %bb4859
+ i32 12, label %bb4679
+ i32 16, label %bb10249
+ ]
+bb4679: ; preds = %bb1365, %bb1365, %bb1365, %bb1365, %bb1365, %bb1365
+ ret void
+bb4859: ; preds = %bb1365
+ ret void
+bb5115: ; preds = %bb1365
+ ret void
+bb6651: ; preds = %bb1365
+ ret void
+bb7147: ; preds = %bb1365
+ ret void
+bb8683: ; preds = %bb1365
+ ret void
+bb9131: ; preds = %bb1365
+ ret void
+bb9875: ; preds = %bb1365
+ %source_ptr9884 = bitcast i8** %source_ptr to i8** ; <i8**> [#uses=1]
+ %tmp9885 = load i8** %source_ptr9884 ; <i8*> [#uses=0]
+ ret void
+bb10249: ; preds = %bb1365
+ %source_ptr10257 = bitcast i8** %source_ptr to i16** ; <i16**> [#uses=1]
+ %tmp10258 = load i16** %source_ptr10257 ; <i16*> [#uses=0]
+ ret void
+cond_next10377: ; preds = %bb1365
+ ret void
+bb27055: ; preds = %bb1357
+ ret void
+}
diff --git a/test/Transforms/ScalarRepl/2006-11-07-InvalidArrayPromote.ll b/test/Transforms/ScalarRepl/2006-11-07-InvalidArrayPromote.ll
new file mode 100644
index 0000000..99c9fb9
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2006-11-07-InvalidArrayPromote.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define i32 @func(<4 x float> %v0, <4 x float> %v1) nounwind {
+ %vsiidx = alloca [2 x <4 x i32>], align 16 ; <[2 x <4 x i32>]*> [#uses=3]
+ %tmp = call <4 x i32> @llvm.x86.sse2.cvttps2dq( <4 x float> %v0 ) ; <<4 x i32>> [#uses=2]
+ %tmp.upgrd.1 = bitcast <4 x i32> %tmp to <2 x i64> ; <<2 x i64>> [#uses=0]
+ %tmp.upgrd.2 = getelementptr [2 x <4 x i32>]* %vsiidx, i32 0, i32 0 ; <<4 x i32>*> [#uses=1]
+ store <4 x i32> %tmp, <4 x i32>* %tmp.upgrd.2
+ %tmp10 = call <4 x i32> @llvm.x86.sse2.cvttps2dq( <4 x float> %v1 ) ; <<4 x i32>> [#uses=2]
+ %tmp10.upgrd.3 = bitcast <4 x i32> %tmp10 to <2 x i64> ; <<2 x i64>> [#uses=0]
+ %tmp14 = getelementptr [2 x <4 x i32>]* %vsiidx, i32 0, i32 1 ; <<4 x i32>*> [#uses=1]
+ store <4 x i32> %tmp10, <4 x i32>* %tmp14
+ %tmp15 = getelementptr [2 x <4 x i32>]* %vsiidx, i32 0, i32 0, i32 4 ; <i32*> [#uses=1]
+ %tmp.upgrd.4 = load i32* %tmp15 ; <i32> [#uses=1]
+ ret i32 %tmp.upgrd.4
+}
+
+declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>)
+
diff --git a/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll b/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll
new file mode 100644
index 0000000..2606203
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -scalarrepl -disable-output
+; PR1045
+
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>" = type { %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"* }
+ %"struct.__gnu_cxx::bitmap_allocator<char>" = type { i8 }
+ %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block" = type { [8 x i8] }
+
+define void @_ZN9__gnu_cxx16bitmap_allocatorIwE27_M_deallocate_single_objectEPw() {
+entry:
+ %this_addr.i = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"**> [#uses=3]
+ %tmp = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>", align 4 ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1]
+ store %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp, %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i
+ %tmp.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1]
+ %tmp.i.upgrd.1 = bitcast %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp.i to %"struct.__gnu_cxx::bitmap_allocator<char>"* ; <%"struct.__gnu_cxx::bitmap_allocator<char>"*> [#uses=0]
+ %tmp1.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1]
+ %tmp.i.upgrd.2 = getelementptr %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp1.i, i32 0, i32 0 ; <%"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"**> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll b/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll
new file mode 100644
index 0000000..bd49106
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll
@@ -0,0 +1,44 @@
+; RUN: opt < %s -scalarrepl -disable-output
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-apple-darwin8"
+ %struct.CGPoint = type { float, float }
+ %struct.aal_big_range_t = type { i32, i32 }
+ %struct.aal_callback_t = type { i8* (i8*, i32)*, void (i8*, i8*)* }
+ %struct.aal_edge_pool_t = type { %struct.aal_edge_pool_t*, i32, i32, [0 x %struct.aal_edge_t] }
+ %struct.aal_edge_t = type { %struct.CGPoint, %struct.CGPoint, i32 }
+ %struct.aal_range_t = type { i16, i16 }
+ %struct.aal_span_pool_t = type { %struct.aal_span_pool_t*, [341 x %struct.aal_span_t] }
+ %struct.aal_span_t = type { %struct.aal_span_t*, %struct.aal_big_range_t }
+ %struct.aal_spanarray_t = type { [2 x %struct.aal_range_t] }
+ %struct.aal_spanbucket_t = type { i16, [2 x i8], %struct.anon }
+ %struct.aal_state_t = type { %struct.CGPoint, %struct.CGPoint, %struct.CGPoint, i32, float, float, float, float, %struct.CGPoint, %struct.CGPoint, float, float, float, float, i32, i32, i32, i32, float, float, i8*, i32, i32, %struct.aal_edge_pool_t*, %struct.aal_edge_pool_t*, i8*, %struct.aal_callback_t*, i32, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_pool_t*, i8, float, i8, i32 }
+ %struct.anon = type { %struct.aal_spanarray_t }
+
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+define fastcc void @aal_insert_span() {
+entry:
+ %SB = alloca %struct.aal_spanbucket_t, align 4 ; <%struct.aal_spanbucket_t*> [#uses=2]
+ br i1 false, label %cond_true, label %cond_next79
+
+cond_true: ; preds = %entry
+ br i1 false, label %cond_next, label %cond_next114.i
+
+cond_next114.i: ; preds = %cond_true
+ ret void
+
+cond_next: ; preds = %cond_true
+ %SB19 = bitcast %struct.aal_spanbucket_t* %SB to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %SB19, i8* null, i32 12, i32 0 )
+ br i1 false, label %cond_next34, label %cond_next79
+
+cond_next34: ; preds = %cond_next
+ %i.2.reload22 = load i32* null ; <i32> [#uses=1]
+ %tmp51 = getelementptr %struct.aal_spanbucket_t* %SB, i32 0, i32 2, i32 0, i32 0, i32 %i.2.reload22, i32 1 ; <i16*> [#uses=0]
+ ret void
+
+cond_next79: ; preds = %cond_next, %entry
+ ret void
+}
diff --git a/test/Transforms/ScalarRepl/2007-05-24-LargeAggregate.ll b/test/Transforms/ScalarRepl/2007-05-24-LargeAggregate.ll
new file mode 100644
index 0000000..e67b610
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2007-05-24-LargeAggregate.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -scalarrepl -S | grep {alloca.*client_t}
+; PR1446
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+
+ %struct.clientSnapshot_t = type { i32, [32 x i8], %struct.playerState_t, i32, i32, i32, i32, i32 }
+ %struct.client_t = type { i32, [1024 x i8], [64 x [1024 x i8]], i32, i32, i32, i32, i32, i32, %struct.usercmd_t, i32, i32, [1024 x i8], %struct.sharedEntity_t*, [32 x i8], [64 x i8], i32, i32, i32, i32, i32, i32, [8 x i8*], [8 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x %struct.clientSnapshot_t], i32, i32, i32, i32, i32, %struct.netchan_t, %struct.netchan_buffer_t*, %struct.netchan_buffer_t**, i32, [1025 x i32] }
+ %struct.entityShared_t = type { %struct.entityState_t, i32, i32, i32, i32, i32, [3 x float], [3 x float], i32, [3 x float], [3 x float], [3 x float], [3 x float], i32 }
+ %struct.entityState_t = type { i32, i32, i32, %struct.trajectory_t, %struct.trajectory_t, i32, i32, [3 x float], [3 x float], [3 x float], [3 x float], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.msg_t = type { i32, i32, i32, i8*, i32, i32, i32, i32 }
+ %struct.netadr_t = type { i32, [4 x i8], [10 x i8], i16 }
+ %struct.netchan_buffer_t = type { %struct.msg_t, [16384 x i8], %struct.netchan_buffer_t* }
+ %struct.netchan_t = type { i32, i32, %struct.netadr_t, i32, i32, i32, i32, i32, [16384 x i8], i32, i32, i32, [16384 x i8] }
+ %struct.playerState_t = type { i32, i32, i32, i32, i32, [3 x float], [3 x float], i32, i32, i32, [3 x i32], i32, i32, i32, i32, i32, i32, [3 x float], i32, i32, [2 x i32], [2 x i32], i32, i32, i32, i32, i32, i32, [3 x float], i32, i32, i32, i32, i32, [16 x i32], [16 x i32], [16 x i32], [16 x i32], i32, i32, i32, i32, i32, i32, i32 }
+ %struct.sharedEntity_t = type { %struct.entityState_t, %struct.entityShared_t }
+ %struct.trajectory_t = type { i32, i32, i32, [3 x float], [3 x float] }
+ %struct.usercmd_t = type { i32, [3 x i32], i32, i8, i8, i8, i8 }
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+define void @SV_DirectConnect(i64 %from.0.0, i64 %from.0.1, i32 %from.1) {
+entry:
+ %temp = alloca %struct.client_t, align 16 ; <%struct.client_t*> [#uses=1]
+ %temp586 = bitcast %struct.client_t* %temp to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* null, i8* %temp586, i32 121596, i32 0 )
+ unreachable
+}
diff --git a/test/Transforms/ScalarRepl/2007-05-29-MemcpyPreserve.ll b/test/Transforms/ScalarRepl/2007-05-29-MemcpyPreserve.ll
new file mode 100644
index 0000000..f1b8b80
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2007-05-29-MemcpyPreserve.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -scalarrepl -S | grep memcpy
+; PR1421
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+ %struct.LongestMember = type { i8, i32 }
+ %struct.MyString = type { i32 }
+ %struct.UnionType = type { %struct.LongestMember }
+
+define void @_Z4testP9UnionTypePS0_(%struct.UnionType* %p, %struct.UnionType** %pointerToUnion) {
+entry:
+ %tmp = alloca %struct.UnionType, align 8 ; <%struct.UnionType*> [#uses=2]
+ %tmp2 = getelementptr %struct.UnionType* %tmp, i32 0, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp13 = getelementptr %struct.UnionType* %p, i32 0, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp2, i8* %tmp13, i32 8, i32 0 )
+ %tmp5 = load %struct.UnionType** %pointerToUnion ; <%struct.UnionType*> [#uses=1]
+ %tmp56 = getelementptr %struct.UnionType* %tmp5, i32 0, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp7 = getelementptr %struct.UnionType* %tmp, i32 0, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %tmp56, i8* %tmp7, i32 8, i32 0 )
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/Transforms/ScalarRepl/2007-11-03-bigendian_apint.ll b/test/Transforms/ScalarRepl/2007-11-03-bigendian_apint.ll
new file mode 100644
index 0000000..81b6746
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2007-11-03-bigendian_apint.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -scalarrepl -S | not grep shr
+
+%struct.S = type { i16 }
+
+define i1 @f(i16 signext %b) zeroext {
+entry:
+ %b_addr = alloca i16 ; <i16*> [#uses=2]
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %s = alloca %struct.S ; <%struct.S*> [#uses=2]
+ %tmp = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i16 %b, i16* %b_addr
+ %tmp1 = getelementptr %struct.S* %s, i32 0, i32 0 ; <i16*> [#uses=1]
+ %tmp2 = load i16* %b_addr, align 2 ; <i16> [#uses=1]
+ store i16 %tmp2, i16* %tmp1, align 2
+ %tmp3 = getelementptr %struct.S* %s, i32 0, i32 0 ; <i16*> [#uses=1]
+ %tmp34 = bitcast i16* %tmp3 to [2 x i1]* ; <[2 x i1]*> [#uses=1]
+ %tmp5 = getelementptr [2 x i1]* %tmp34, i32 0, i32 1 ; <i1*> [#uses=1]
+ %tmp6 = load i1* %tmp5, align 1 ; <i1> [#uses=1]
+ %tmp67 = zext i1 %tmp6 to i32 ; <i32> [#uses=1]
+ store i32 %tmp67, i32* %tmp, align 4
+ %tmp8 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ store i32 %tmp8, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval9 = load i32* %retval ; <i32> [#uses=1]
+ %retval910 = trunc i32 %retval9 to i1 ; <i1> [#uses=1]
+ ret i1 %retval910
+}
diff --git a/test/Transforms/ScalarRepl/2008-01-29-PromoteBug.ll b/test/Transforms/ScalarRepl/2008-01-29-PromoteBug.ll
new file mode 100644
index 0000000..d799bd77
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2008-01-29-PromoteBug.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -scalarrepl -instcombine -S | grep {ret i8 17}
+; rdar://5707076
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.1.0"
+ %struct.T = type <{ i8, [3 x i8] }>
+
+define i8 @f() {
+entry:
+ %s = alloca [1 x %struct.T], align 4 ; <[1 x %struct.T]*> [#uses=2]
+ %T3 = bitcast [1 x %struct.T]* %s to i32*
+ store i32 -61184, i32* %T3
+
+ %tmp16 = getelementptr [1 x %struct.T]* %s, i32 0, i32 0 ; <%struct.T*> [#uses=1]
+ %tmp17 = getelementptr %struct.T* %tmp16, i32 0, i32 1 ; <[3 x i8]*> [#uses=1]
+ %tmp1718 = bitcast [3 x i8]* %tmp17 to i32* ; <i32*> [#uses=1]
+ %tmp19 = load i32* %tmp1718, align 4 ; <i32> [#uses=1]
+ %mask = and i32 %tmp19, 16777215 ; <i32> [#uses=2]
+ %mask2324 = trunc i32 %mask to i8 ; <i8> [#uses=1]
+ ret i8 %mask2324
+}
+
diff --git a/test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll b/test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll
new file mode 100644
index 0000000..7f8ef83
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+ %struct..0anon = type { <1 x i64> }
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+ %c = alloca %struct..0anon ; <%struct..0anon*> [#uses=2]
+ %tmp2 = getelementptr %struct..0anon* %c, i32 0, i32 0 ; <<1 x i64>*> [#uses=1]
+ store <1 x i64> zeroinitializer, <1 x i64>* %tmp2, align 8
+ %tmp7 = getelementptr %struct..0anon* %c, i32 0, i32 0 ; <<1 x i64>*> [#uses=1]
+ %tmp78 = bitcast <1 x i64>* %tmp7 to [2 x i32]* ; <[2 x i32]*> [#uses=1]
+ %tmp9 = getelementptr [2 x i32]* %tmp78, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp10 = load i32* %tmp9, align 4 ; <i32> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/ScalarRepl/2008-06-05-loadstore-agg.ll b/test/Transforms/ScalarRepl/2008-06-05-loadstore-agg.ll
new file mode 100644
index 0000000..87a08b7
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2008-06-05-loadstore-agg.ll
@@ -0,0 +1,33 @@
+; This test shows an alloca of a struct and an array that can be reduced to
+; multiple variables easily. However, the alloca is used by a store
+; instruction, which was not possible before aggregrates were first class
+; values. This checks of scalarrepl splits up the struct and array properly.
+
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define i32 @foo() {
+ %target = alloca { i32, i32 } ; <{ i32, i32 }*> [#uses=1]
+ ; Build a first class struct to store
+ %res1 = insertvalue { i32, i32 } undef, i32 1, 0 ; <{ i32, i32 }> [#uses=1]
+ %res2 = insertvalue { i32, i32 } %res1, i32 2, 1 ; <{ i32, i32 }> [#uses=1]
+ ; And store it
+ store { i32, i32 } %res2, { i32, i32 }* %target
+ ; Actually use %target, so it doesn't get removed alltogether
+ %ptr = getelementptr { i32, i32 }* %target, i32 0, i32 0
+ %val = load i32* %ptr
+ ret i32 %val
+}
+
+define i32 @bar() {
+ %target = alloca [ 2 x i32 ] ; <{ i32, i32 }*> [#uses=1]
+ ; Build a first class array to store
+ %res1 = insertvalue [ 2 x i32 ] undef, i32 1, 0 ; <{ i32, i32 }> [#uses=1]
+ %res2 = insertvalue [ 2 x i32 ] %res1, i32 2, 1 ; <{ i32, i32 }> [#uses=1]
+ ; And store it
+ store [ 2 x i32 ] %res2, [ 2 x i32 ]* %target
+ ; Actually use %target, so it doesn't get removed alltogether
+ %ptr = getelementptr [ 2 x i32 ]* %target, i32 0, i32 0
+ %val = load i32* %ptr
+ ret i32 %val
+}
diff --git a/test/Transforms/ScalarRepl/2008-06-22-LargeArray.ll b/test/Transforms/ScalarRepl/2008-06-22-LargeArray.ll
new file mode 100644
index 0000000..b704727
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2008-06-22-LargeArray.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -scalarrepl -S | grep {call.*mem}
+; PR2369
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @memtest1(i8* %dst, i8* %src) nounwind {
+entry:
+ %temp = alloca [200 x i8] ; <[100 x i8]*> [#uses=2]
+ %temp1 = bitcast [200 x i8]* %temp to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %temp1, i8* %src, i32 200, i32 1 )
+ %temp3 = bitcast [200 x i8]* %temp to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %dst, i8* %temp3, i32 200, i32 1 )
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/ScalarRepl/2008-08-22-out-of-range-array-promote.ll b/test/Transforms/ScalarRepl/2008-08-22-out-of-range-array-promote.ll
new file mode 100644
index 0000000..1df01c1
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2008-08-22-out-of-range-array-promote.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -scalarrepl -S | grep {s = alloca .struct.x}
+; PR2423
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+ %struct.x = type { [1 x i32], i32, i32 }
+
+define i32 @b() nounwind {
+entry:
+ %s = alloca %struct.x ; <%struct.x*> [#uses=2]
+ %r = alloca %struct.x ; <%struct.x*> [#uses=2]
+ call i32 @a( %struct.x* %s ) nounwind ; <i32>:0 [#uses=0]
+ %r1 = bitcast %struct.x* %r to i8* ; <i8*> [#uses=1]
+ %s2 = bitcast %struct.x* %s to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %r1, i8* %s2, i32 12, i32 8 )
+ getelementptr %struct.x* %r, i32 0, i32 0, i32 1 ; <i32*>:1 [#uses=1]
+ load i32* %1, align 4 ; <i32>:2 [#uses=1]
+ ret i32 %2
+}
+
+declare i32 @a(%struct.x*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/ScalarRepl/2008-09-22-vector-gep.ll b/test/Transforms/ScalarRepl/2008-09-22-vector-gep.ll
new file mode 100644
index 0000000..e32e683
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2008-09-22-vector-gep.ll
@@ -0,0 +1,25 @@
+; This test checks to see if scalarrepl also works when a gep with all zeroes is
+; used instead of a bitcast to prepare a memmove pointer argument. Previously,
+; this would not work when there was a vector involved in the struct, preventing
+; scalarrepl from removing the alloca below.
+
+; RUN: opt < %s -scalarrepl -S > %t
+; RUN: cat %t | not grep alloca
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+%struct.two = type <{ < 2 x i8 >, i16 }>
+
+define void @main(%struct.two* %D, i16 %V) {
+entry:
+ %S = alloca %struct.two
+ %S.2 = getelementptr %struct.two* %S, i32 0, i32 1
+ store i16 %V, i16* %S.2
+ ; This gep is effectively a bitcast to i8*, but is sometimes generated
+ ; because the type of the first element in %struct.two is i8.
+ %tmpS = getelementptr %struct.two* %S, i32 0, i32 0, i32 0
+ %tmpD = bitcast %struct.two* %D to i8*
+ call void @llvm.memmove.i32(i8* %tmpD, i8* %tmpS, i32 4, i32 1)
+ ret void
+}
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32) nounwind
diff --git a/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll b/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll
new file mode 100644
index 0000000..62f7d19d
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -scalarrepl | llvm-dis
+; PR3304
+
+ %struct.c37304a__vrec = type { i8, %struct.c37304a__vrec___disc___XVN }
+ %struct.c37304a__vrec___disc___XVN = type {
+%struct.c37304a__vrec___disc___XVN___O }
+ %struct.c37304a__vrec___disc___XVN___O = type { }
+
+define void @_ada_c37304a() {
+entry:
+ %v = alloca %struct.c37304a__vrec
+ %0 = getelementptr %struct.c37304a__vrec* %v, i32 0, i32 0
+ store i8 8, i8* %0, align 1
+ unreachable
+}
diff --git a/test/Transforms/ScalarRepl/2009-02-02-ScalarPromoteOutOfRange.ll b/test/Transforms/ScalarRepl/2009-02-02-ScalarPromoteOutOfRange.ll
new file mode 100644
index 0000000..9c0f203
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-02-02-ScalarPromoteOutOfRange.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -scalarrepl -instcombine -S | grep {ret i32 %x}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+%pair = type { [1 x i32], i32 }
+
+define i32 @f(i32 %x, i32 %y) {
+ %instance = alloca %pair
+ %first = getelementptr %pair* %instance, i32 0, i32 0
+ %cast = bitcast [1 x i32]* %first to i32*
+ store i32 %x, i32* %cast
+ %second = getelementptr %pair* %instance, i32 0, i32 1
+ store i32 %y, i32* %second
+ %v = load i32* %cast
+ ret i32 %v
+}
diff --git a/test/Transforms/ScalarRepl/2009-02-05-LoadFCA.ll b/test/Transforms/ScalarRepl/2009-02-05-LoadFCA.ll
new file mode 100644
index 0000000..f8ab875
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-02-05-LoadFCA.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -scalarrepl -instcombine -inline -instcombine -S | grep {ret i32 42}
+; PR3489
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+ %struct.anon = type <{ i32, i32, i32 }>
+
+define i32 @f({ i64, i64 }) nounwind {
+entry:
+ %tmp = alloca { i64, i64 }, align 8 ; <{ i64, i64 }*> [#uses=2]
+ store { i64, i64 } %0, { i64, i64 }* %tmp
+ %1 = bitcast { i64, i64 }* %tmp to %struct.anon* ; <%struct.anon*> [#uses=1]
+ %2 = load %struct.anon* %1, align 8 ; <%struct.anon> [#uses=1]
+ %tmp3 = extractvalue %struct.anon %2, 0
+ ret i32 %tmp3
+}
+
+define i32 @g() {
+ %a = call i32 @f({i64,i64} { i64 42, i64 1123123123123123 })
+ ret i32 %a
+}
diff --git a/test/Transforms/ScalarRepl/2009-03-04-MemCpyAlign.ll b/test/Transforms/ScalarRepl/2009-03-04-MemCpyAlign.ll
new file mode 100644
index 0000000..526457b
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-03-04-MemCpyAlign.ll
@@ -0,0 +1,20 @@
+; The store into %p should end up with a known alignment of 1, since the memcpy
+; is only known to access it with 1-byte alignment.
+; RUN: opt < %s -scalarrepl -S | grep {store i16 1, .*, align 1}
+; PR3720
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+ %struct.st = type { i16 }
+
+define void @f(i8* %p) nounwind {
+entry:
+ %s = alloca %struct.st, align 4 ; <%struct.st*> [#uses=2]
+ %0 = getelementptr %struct.st* %s, i32 0, i32 0 ; <i16*> [#uses=1]
+ store i16 1, i16* %0, align 4
+ %s1 = bitcast %struct.st* %s to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32(i8* %p, i8* %s1, i32 2, i32 1)
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
+
diff --git a/test/Transforms/ScalarRepl/2009-03-05-Aggre2Scalar-dbg.ll b/test/Transforms/ScalarRepl/2009-03-05-Aggre2Scalar-dbg.ll
new file mode 100644
index 0000000..50e7f9a
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-03-05-Aggre2Scalar-dbg.ll
@@ -0,0 +1,184 @@
+; RUN: opt < %s -scalarrepl -disable-output -stats |& grep "Number of aggregates converted to scalar"
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+ type { } ; type %0
+ type { i8*, i32, i32, i16, i16, %2, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %2, %3*, i32, [3 x i8], [1 x i8], %2, i32, i64 } ; type %1
+ type { i8*, i32 } ; type %2
+ type opaque ; type %3
+ type { i32 } ; type %4
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 }
+ %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* }
+ %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 }
+ %llvm.dbg.subrange.type = type { i32, i64, i64 }
+ %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
+internal constant [8 x i8] c"PR491.c\00", section "llvm.metadata" ; <[8 x i8]*>:0 [#uses=1]
+internal constant [77 x i8] c"/Volumes/Nanpura/mainline/llvm/projects/llvm-test/SingleSource/Regression/C/\00", section "llvm.metadata" ; <[77 x i8]*>:1 [#uses=1]
+internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5641) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*>:2 [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 1, i8* getelementptr ([8 x i8]* @0, i32 0, i32 0), i8* getelementptr ([77 x i8]* @1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*>:3 [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @3, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
+internal constant [5 x i8] c"char\00", section "llvm.metadata" ; <[5 x i8]*>:4 [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @4, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 8, i64 8, i64 0, i32 0, i32 6 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 8, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype5 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
+internal constant [13 x i8] c"unsigned int\00", section "llvm.metadata" ; <[13 x i8]*>:5 [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @5, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 7 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype6 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype8 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
+internal constant [12 x i8] c"assert_fail\00", section "llvm.metadata" ; <[12 x i8]*>:6 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @6, i32 0, i32 0), i8* getelementptr ([12 x i8]* @6, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 4, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite to %0*), i1 true, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=0]
+internal constant [2 x i8] c"l\00", section "llvm.metadata" ; <[2 x i8]*>:7 [#uses=1]
+@__stderrp = external global %1* ; <%1**> [#uses=4]
+internal constant [35 x i8] c"assertion failed in line %u: '%s'\0A\00", section "__TEXT,__cstring,cstring_literals" ; <[35 x i8]*>:8 [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array13 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [5 x i8] c"test\00", section "llvm.metadata" ; <[5 x i8]*>:9 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @9, i32 0, i32 0), i8* getelementptr ([5 x i8]* @9, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 10, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite14 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+internal constant [9 x i8] c"long int\00", section "llvm.metadata" ; <[9 x i8]*>:10 [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram16 to %0*), i8* getelementptr ([2 x i8]* @7, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 20, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype21 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subrange.type { i32 458785, i64 0, i64 3 }, section "llvm.metadata" ; <%llvm.dbg.subrange.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.subrange.type* @llvm.dbg.subrange to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
+internal constant [14 x i8] c"unsigned char\00", section "llvm.metadata" ; <[14 x i8]*>:11 [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @11, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 8, i64 8, i64 0, i32 0, i32 8 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458753, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype25 to %0*), %0* bitcast ([1 x %0*]* @llvm.dbg.array23 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [2 x i8] c"c\00", section "llvm.metadata" ; <[2 x i8]*>:12 [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram16 to %0*), i8* getelementptr ([2 x i8]* @12, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 20, i64 32, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite26 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype22 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype28 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458775, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram16 to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 20, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array29 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [2 x i8] c"u\00", section "llvm.metadata" ; <[2 x i8]*>:13 [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram16 to %0*), i8* getelementptr ([2 x i8]* @13, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 20, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite30 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
+internal constant [11 x i8] c"u.l == 128\00", section "__TEXT,__cstring,cstring_literals" ; <[11 x i8]*>:14 [#uses=1]
+internal constant [8 x i8] c"u.l < 0\00", section "__TEXT,__cstring,cstring_literals" ; <[8 x i8]*>:15 [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array35 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
+internal constant [5 x i8] c"main\00", section "llvm.metadata" ; <[5 x i8]*>:16 [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @16, i32 0, i32 0), i8* getelementptr ([5 x i8]* @16, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 28, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite36 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+
+declare void @llvm.dbg.func.start(%0*) nounwind readnone
+
+declare void @llvm.dbg.declare(%0*, %0*) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind readnone
+
+declare i32 @fprintf(%1* nocapture, i8* nocapture, ...) nounwind
+
+declare void @llvm.dbg.region.end(%0*) nounwind readnone
+
+define i32 @test(i32) nounwind {
+; <label>:1
+ %2 = alloca %4, align 8 ; <%4*> [#uses=7]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram16 to %0*))
+ %3 = bitcast %4* %2 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %3, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable32 to %0*))
+ call void @llvm.dbg.stoppoint(i32 21, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %4 = getelementptr %4* %2, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %4, align 8
+ %5 = bitcast %4* %2 to i8* ; <i8*> [#uses=1]
+ store i8 -128, i8* %5, align 8
+ call void @llvm.dbg.stoppoint(i32 22, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %6 = getelementptr %4* %2, i32 0, i32 0 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 8 ; <i32> [#uses=1]
+ %8 = icmp eq i32 %7, 128 ; <i1> [#uses=1]
+ br i1 %8, label %12, label %9
+
+; <label>:9 ; preds = %1
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %10 = load %1** @__stderrp, align 4 ; <%1*> [#uses=1]
+ %11 = call i32 (%1*, i8*, ...)* @fprintf(%1* %10, i8* getelementptr ([35 x i8]* @8, i32 0, i32 0), i32 22, i8* getelementptr ([11 x i8]* @14, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ br label %12
+
+; <label>:12 ; preds = %9, %1
+ %.0 = phi i32 [ 0, %9 ], [ 1, %1 ] ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 22, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %13 = and i32 %.0, %0 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 23, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %14 = getelementptr %4* %2, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %14, align 8
+ %15 = bitcast %4* %2 to [4 x i8]* ; <[4 x i8]*> [#uses=1]
+ %16 = getelementptr [4 x i8]* %15, i32 0, i32 3 ; <i8*> [#uses=1]
+ store i8 -128, i8* %16, align 1
+ call void @llvm.dbg.stoppoint(i32 24, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %17 = getelementptr %4* %2, i32 0, i32 0 ; <i32*> [#uses=1]
+ %18 = load i32* %17, align 8 ; <i32> [#uses=1]
+ %19 = icmp slt i32 %18, 0 ; <i1> [#uses=1]
+ br i1 %19, label %23, label %20
+
+; <label>:20 ; preds = %12
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %21 = load %1** @__stderrp, align 4 ; <%1*> [#uses=1]
+ %22 = call i32 (%1*, i8*, ...)* @fprintf(%1* %21, i8* getelementptr ([35 x i8]* @8, i32 0, i32 0), i32 24, i8* getelementptr ([8 x i8]* @15, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ br label %23
+
+; <label>:23 ; preds = %20, %12
+ %.01 = phi i32 [ 0, %20 ], [ 1, %12 ] ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 24, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %24 = and i32 %.01, %13 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 25, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram16 to %0*))
+ ret i32 %24
+}
+
+define i32 @main() nounwind {
+; <label>:0
+ %1 = alloca %4, align 8 ; <%4*> [#uses=7]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram38 to %0*))
+ call void @llvm.dbg.stoppoint(i32 29, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %2 = bitcast %4* %1 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %2, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable32 to %0*)) nounwind
+ call void @llvm.dbg.stoppoint(i32 21, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %3 = getelementptr %4* %1, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %3, align 8
+ %4 = bitcast %4* %1 to i8* ; <i8*> [#uses=1]
+ store i8 -128, i8* %4, align 8
+ call void @llvm.dbg.stoppoint(i32 22, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %5 = getelementptr %4* %1, i32 0, i32 0 ; <i32*> [#uses=1]
+ %6 = load i32* %5, align 8 ; <i32> [#uses=1]
+ %7 = icmp eq i32 %6, 128 ; <i1> [#uses=1]
+ br i1 %7, label %11, label %8
+
+; <label>:8 ; preds = %0
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %9 = load %1** @__stderrp, align 4 ; <%1*> [#uses=1]
+ %10 = call i32 (%1*, i8*, ...)* @fprintf(%1* %9, i8* getelementptr ([35 x i8]* @8, i32 0, i32 0), i32 22, i8* getelementptr ([11 x i8]* @14, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ br label %11
+
+; <label>:11 ; preds = %8, %0
+ %.0.i = phi i32 [ 0, %8 ], [ 1, %0 ] ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 23, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %12 = getelementptr %4* %1, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 0, i32* %12, align 8
+ %13 = bitcast %4* %1 to [4 x i8]* ; <[4 x i8]*> [#uses=1]
+ %14 = getelementptr [4 x i8]* %13, i32 0, i32 3 ; <i8*> [#uses=1]
+ store i8 -128, i8* %14, align 1
+ call void @llvm.dbg.stoppoint(i32 24, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %15 = getelementptr %4* %1, i32 0, i32 0 ; <i32*> [#uses=1]
+ %16 = load i32* %15, align 8 ; <i32> [#uses=1]
+ %17 = icmp slt i32 %16, 0 ; <i1> [#uses=1]
+ br i1 %17, label %test.exit, label %18
+
+; <label>:18 ; preds = %11
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %19 = load %1** @__stderrp, align 4 ; <%1*> [#uses=1]
+ %20 = call i32 (%1*, i8*, ...)* @fprintf(%1* %19, i8* getelementptr ([35 x i8]* @8, i32 0, i32 0), i32 24, i8* getelementptr ([8 x i8]* @15, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ br label %test.exit
+
+test.exit: ; preds = %18, %11
+ %.01.i = phi i32 [ 0, %18 ], [ 1, %11 ] ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 24, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %21 = and i32 %.01.i, %.0.i ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 25, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*)) nounwind
+ %tmp = xor i32 %21, 1 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 29, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram38 to %0*))
+ ret i32 %tmp
+}
diff --git a/test/Transforms/ScalarRepl/2009-03-17-CleanUp.ll b/test/Transforms/ScalarRepl/2009-03-17-CleanUp.ll
new file mode 100644
index 0000000..9c70aae
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-03-17-CleanUp.ll
@@ -0,0 +1,3961 @@
+; RUN: opt < %s -scalarrepl -S | grep store | not grep undef
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ type { } ; type %0
+ type { double, double } ; type %1
+ type { i32, void ()* } ; type %2
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 }
+ %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* }
+ %llvm.dbg.global_variable.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1, %0* }
+ %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 }
+ %llvm.dbg.subrange.type = type { i32, i64, i64 }
+ %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* }
+ %struct..0._50 = type { i32 }
+ %struct..1__pthread_mutex_s = type { i32, i32, i32, i32, i32, %struct..0._50 }
+ %struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo }
+ %struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] }
+ %struct.__pthread_slist_t = type { %struct.__pthread_slist_t* }
+ %struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, %"struct.std::type_info"* }
+ %struct.__type_info_pseudo = type { i8*, i8* }
+ %struct.locale_data = type opaque
+ %"struct.polynomial<double>" = type { i32 (...)**, double*, i32 }
+ %"struct.polynomial<std::complex<double> >" = type { i32 (...)**, %"struct.std::complex<double>"*, i32 }
+ %struct.pthread_attr_t = type { i32, [32 x i8] }
+ %struct.pthread_mutex_t = type { %struct..1__pthread_mutex_s }
+ %struct.pthread_mutexattr_t = type { i32 }
+ %"struct.std::allocator<char>" = type <{ i8 }>
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* }
+ %"struct.std::complex<double>" = type { %1 }
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", %struct.__locale_struct*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::exception" = type { i32 (...)** }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::ios_base::Init" = type <{ i8 }>
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+ %"struct.std::num_put<char,std::ostreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+ %"struct.std::overflow_error" = type { %"struct.std::runtime_error" }
+ %"struct.std::runtime_error" = type { %"struct.std::exception", %"struct.std::string" }
+ %"struct.std::string" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" }
+ %"struct.std::type_info" = type { i32 (...)**, i8* }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"fftbench.cpp\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant [42 x i8] c"/developer/home2/zsth/test/debug/tmp3/X3/\00", section "llvm.metadata" ; <[42 x i8]*> [#uses=1]
[email protected] = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5641) (LLVM build)\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([42 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"complex\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [110 x i8] c"/developer/home2/zsth/projects/llvm.org/install/lib/gcc/i686-pc-linux-gnu/4.2.1/../../../../include/c++/4.2.1\00", section "llvm.metadata" ; <[110 x i8]*> [#uses=1]
[email protected]_unit5 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([110 x i8]* @.str4, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"complex<double>\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [15 x i8] c"complex double\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str7, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 128, i64 64, i64 0, i32 0, i32 3 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"_M_value\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str8, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1195, i64 128, i64 64, i64 0, i32 1, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype9 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1161, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite10 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"double\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str11, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 64, i64 64, i64 0, i32 0, i32 4 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype9 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array13 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1215, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite14 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"complex<float>\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"complex float\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str18, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 64, i64 32, i64 0, i32 0, i32 3 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str8, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1042, i64 64, i64 32, i64 0, i32 1, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype19 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite171 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype21 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype19 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array22 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1007, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite23 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"float\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str25, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 4 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype21 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype26 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype26 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array27 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1062, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite28 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 128, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype30 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype21 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array32 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1464, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite33 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"complex<long double>\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant [20 x i8] c"complex long double\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([20 x i8]* @.str37, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 192, i64 32, i64 0, i32 0, i32 3 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str8, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1348, i64 192, i64 32, i64 0, i32 1, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype38 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite122 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype40 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype38 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array41 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1314, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite42 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"long double\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str44, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 96, i64 32, i64 0, i32 0, i32 4 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype40 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype45 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype45 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array46 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1352, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite47 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 64, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite171 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype49 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype40 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype50 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array51 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1480, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite52 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype40 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array54 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1484, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite55 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype45 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype57 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype40 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array58 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"real\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNSt7complexIeE4realEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str61, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1359, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite59 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"stddef.h\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant [88 x i8] c"/developer/home2/zsth/projects/llvm.org/install/lib/gcc/i686-pc-linux-gnu/4.2.1/include\00", section "llvm.metadata" ; <[88 x i8]*> [#uses=1]
[email protected]_unit65 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @.str63, i32 0, i32 0), i8* getelementptr ([88 x i8]* @.str64, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"float_t\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str66, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit65 to %0*), i32 214, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype45 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"mathdef.h\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [18 x i8] c"/usr/include/bits\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected]_unit70 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([10 x i8]* @.str68, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str69, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"double_t\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str71, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit70 to %0*), i32 36, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype67 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 96, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype72 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype73 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 192, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite122 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype75 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype74 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype76 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array77 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNKSt7complexIeE4realEv\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str79, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1363, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite78 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"imag\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNSt7complexIeE4imagEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str82, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1367, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite59 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNKSt7complexIeE4imagEv\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str84, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1371, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite78 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite122 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype86 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype40 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype45 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array87 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"operator=\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIeEaSEe\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str90, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1375, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite88 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator+=\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIeEpLEe\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str93, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1383, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite88 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator-=\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIeEmIEe\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str96, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1390, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite88 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator*=\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIeEmLEe\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str99, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1397, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite88 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator/=\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIeEdVEe\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str102, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1404, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite88 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 55, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite104 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype105 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype86 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype40 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype106 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array107 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1335, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite108 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1337, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite108 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1339, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite108 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1341, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite108 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1343, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite108 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 192, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype38 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype114 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype115 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype76 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array116 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"__rep\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZNKSt7complexIeE5__repEv\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str119, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1345, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite117 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [20 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype39 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram43 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram48 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram53 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram56 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram62 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram80 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram83 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram85 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram91 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram94 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram97 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram100 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram103 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram109 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram110 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram111 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram112 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram113 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram120 to %0*)], section "llvm.metadata" ; <[20 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([21 x i8]* @.str35, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1310, i64 192, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([20 x %0*]* @llvm.dbg.array121 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 192, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite122 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype123 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype21 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype124 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array125 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1468, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite126 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype26 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype128 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype21 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array129 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNSt7complexIfE4realEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str131, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1046, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite130 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype26 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype133 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype49 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype134 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype135 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array136 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNKSt7complexIfE4realEv\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str138, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1050, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite137 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNSt7complexIfE4imagEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str140, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1054, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite130 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNKSt7complexIfE4imagEv\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str142, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1058, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite137 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite171 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype144 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype21 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype26 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array145 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIfEaSEf\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str147, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1069, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite146 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIfEpLEf\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str149, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1077, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite146 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIfEmIEf\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str151, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1084, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite146 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIfEmLEf\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str153, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1091, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite146 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIfEdVEf\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str155, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1098, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite146 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype144 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype21 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype106 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array157 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1029, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite158 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1031, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite158 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1033, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite158 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1035, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite158 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1037, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite158 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 64, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype19 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype164 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype165 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype135 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array166 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZNKSt7complexIfE5__repEv\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str168, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1039, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite167 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [20 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype20 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram24 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram29 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram34 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram127 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram132 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram139 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram141 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram143 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram148 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram150 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram152 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram154 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram156 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram159 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram160 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram161 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram162 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram163 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram169 to %0*)], section "llvm.metadata" ; <[20 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str16, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1003, i64 64, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([20 x %0*]* @llvm.dbg.array170 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 64, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite171 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype172 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype9 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype173 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array174 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1472, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite175 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype9 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype124 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array177 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1476, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite178 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype180 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype9 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array181 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNSt7complexIdE4realEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str183, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1199, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite182 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 64, i64 64, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype185 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype30 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype186 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype187 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array188 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNKSt7complexIdE4realEv\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str190, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1203, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite189 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNSt7complexIdE4imagEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str192, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1207, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite182 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNKSt7complexIdE4imagEv\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str194, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1211, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite189 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype196 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype9 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array197 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIdEaSEd\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str199, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1222, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite198 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIdEpLEd\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str201, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1230, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite198 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIdEmIEd\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str203, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1237, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite198 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIdEmLEd\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str205, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1244, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite198 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSt7complexIdEdVEd\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str207, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1251, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite198 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype196 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype9 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype106 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array209 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1182, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite210 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1184, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite210 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1186, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite210 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1188, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite210 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1190, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite210 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 128, i64 64, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype216 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype217 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype187 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array218 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZNKSt7complexIdE5__repEv\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str220, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1192, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite219 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [20 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram15 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram176 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram179 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram184 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram191 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram193 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram195 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram200 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram202 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram204 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram206 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram208 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram211 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram212 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram213 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram214 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram215 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram221 to %0*)], section "llvm.metadata" ; <[20 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str6, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1157, i64 128, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([20 x %0*]* @llvm.dbg.array222 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype224 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array225 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [22 x i8] c"_ZNSt7complexIdEC1ECd\00", section "llvm.metadata" ; <[22 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([22 x i8]* @.str226, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1161, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"__z\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram227 to %0*), i8* getelementptr ([4 x i8]* @.str230, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1161, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str118, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str220, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1192, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite219 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str183, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1199, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite182 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str60, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str190, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1203, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite189 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str81, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str194, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1211, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite189 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [22 x i8] c"_ZNSt7complexIdEC1Edd\00", section "llvm.metadata" ; <[22 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([22 x i8]* @.str241, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1215, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite14 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"__r\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str199, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1222, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite198 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str101, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str207, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1251, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite198 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array255 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"random_double\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str257, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str257, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 55, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite256 to %0*), i1 true, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=0]
[email protected] = internal constant [7 x i8] c"result\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
+@_ZZL13random_doublevE4seed = internal global i32 1325 ; <i32*> [#uses=14]
[email protected] = internal constant [19 x i8] c"polynomial<double>\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str268, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array270 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite271 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype272 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_vptr.polynomial\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str274, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 84, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype273 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"m_coeff\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str277, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 164, i64 32, i64 32, i64 32, i32 2, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype276 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"unsigned int\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str279, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 7 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"size_t\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str281, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit65 to %0*), i32 152, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"m_degree\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str283, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 167, i64 32, i64 32, i64 64, i32 2, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array286 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"polynomial\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 211, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite287 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype185 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype290 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array291 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 220, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite292 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype186 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array294 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 232, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite295 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 96, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype297 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype298 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array299 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 242, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite300 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array302 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"~polynomial\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 252, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite303 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype306 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype298 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array307 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZN10polynomialIdEaSERKS0_\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str309, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 259, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite308 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype186 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array311 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"initialize\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZN10polynomialIdE10initializeERKd\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str313, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str313, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str314, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 203, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite312 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype306 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array316 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"stretch\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZN10polynomialIdE7stretchEj\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str318, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str318, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str319, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 276, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite317 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype297 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype321 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array322 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"degree\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZNK10polynomialIdE6degreeEv\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str324, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str324, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str325, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 111, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite323 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype321 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array327 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"get\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZNK10polynomialIdE3getEj\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str329, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str329, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str330, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 300, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite328 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype180 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array332 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator[]\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [23 x i8] c"_ZN10polynomialIdEixEj\00", section "llvm.metadata" ; <[23 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([23 x i8]* @.str335, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 306, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite333 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype12 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype321 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype186 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array337 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator()\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZNK10polynomialIdEclERKd\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str339, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str339, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str340, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 313, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite338 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype321 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array342 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"operator-\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNK10polynomialIdEngEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str345, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 335, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite343 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"operator+\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNK10polynomialIdEpsEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str348, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 346, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite343 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype321 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype298 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array350 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNK10polynomialIdEplERKS0_\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str352, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 353, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite351 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNK10polynomialIdEmiERKS0_\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str354, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 376, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite351 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array356 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"log2\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZN10polynomialIdE4log2Ej\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str358, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str358, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str359, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 404, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite357 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array361 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"flip_bits\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [32 x i8] c"_ZN10polynomialIdE9flip_bitsEjj\00", section "llvm.metadata" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str363, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str363, i32 0, i32 0), i8* getelementptr ([32 x i8]* @.str364, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 423, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite362 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array366 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"stretch_fft\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [34 x i8] c"_ZN10polynomialIdE11stretch_fftEv\00", section "llvm.metadata" ; <[34 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str368, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str368, i32 0, i32 0), i8* getelementptr ([34 x i8]* @.str369, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 443, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite367 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [34 x i8] c"polynomial<std::complex<double> >\00", section "llvm.metadata" ; <[34 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str274, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 84, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype273 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str277, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 164, i64 32, i64 32, i64 32, i32 2, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype224 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str283, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 167, i64 32, i64 32, i64 64, i32 2, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array377 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 211, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite378 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype187 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array380 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 220, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite381 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array383 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 232, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite384 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 96, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype386 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype387 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array388 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 242, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite389 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array391 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 252, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite392 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype394 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype387 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array395 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [39 x i8] c"_ZN10polynomialISt7complexIdEEaSERKS2_\00", section "llvm.metadata" ; <[39 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([39 x i8]* @.str397, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 259, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite396 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array399 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [49 x i8] c"_ZN10polynomialISt7complexIdEE10initializeERKS1_\00", section "llvm.metadata" ; <[49 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str313, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str313, i32 0, i32 0), i8* getelementptr ([49 x i8]* @.str401, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 203, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite400 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype394 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array403 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [41 x i8] c"_ZN10polynomialISt7complexIdEE7stretchEj\00", section "llvm.metadata" ; <[41 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str318, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str318, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str405, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 276, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite404 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype386 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype407 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array408 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [41 x i8] c"_ZNK10polynomialISt7complexIdEE6degreeEv\00", section "llvm.metadata" ; <[41 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str324, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str324, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str410, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 111, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite409 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype407 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array412 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [38 x i8] c"_ZNK10polynomialISt7complexIdEE3getEj\00", section "llvm.metadata" ; <[38 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str329, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str329, i32 0, i32 0), i8* getelementptr ([38 x i8]* @.str414, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 300, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite413 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype196 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array416 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZN10polynomialISt7complexIdEEixEj\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str418, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 306, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite417 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype407 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array420 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [40 x i8] c"_ZNK10polynomialISt7complexIdEEclERKS1_\00", section "llvm.metadata" ; <[40 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str339, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str339, i32 0, i32 0), i8* getelementptr ([40 x i8]* @.str422, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 313, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite421 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype407 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array424 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [36 x i8] c"_ZNK10polynomialISt7complexIdEEngEv\00", section "llvm.metadata" ; <[36 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([36 x i8]* @.str426, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 335, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite425 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [36 x i8] c"_ZNK10polynomialISt7complexIdEEpsEv\00", section "llvm.metadata" ; <[36 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([36 x i8]* @.str428, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 346, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite425 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype407 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype387 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array430 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [40 x i8] c"_ZNK10polynomialISt7complexIdEEplERKS2_\00", section "llvm.metadata" ; <[40 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([40 x i8]* @.str432, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 353, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite431 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [40 x i8] c"_ZNK10polynomialISt7complexIdEEmiERKS2_\00", section "llvm.metadata" ; <[40 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([40 x i8]* @.str434, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 376, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite431 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [38 x i8] c"_ZN10polynomialISt7complexIdEE4log2Ej\00", section "llvm.metadata" ; <[38 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str358, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str358, i32 0, i32 0), i8* getelementptr ([38 x i8]* @.str436, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 404, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite357 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [44 x i8] c"_ZN10polynomialISt7complexIdEE9flip_bitsEjj\00", section "llvm.metadata" ; <[44 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str363, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str363, i32 0, i32 0), i8* getelementptr ([44 x i8]* @.str438, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 423, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite362 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array440 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [46 x i8] c"_ZN10polynomialISt7complexIdEE11stretch_fftEv\00", section "llvm.metadata" ; <[46 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str368, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str368, i32 0, i32 0), i8* getelementptr ([46 x i8]* @.str442, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 443, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite441 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [49 x i8] c"polynomial<std::complex<std::complex<double> > >\00", section "llvm.metadata" ; <[49 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([49 x i8]* @.str444, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 84, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite445 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype387 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array446 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"bit_reverse\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [50 x i8] c"_ZN10polynomialISt7complexIdEE11bit_reverseERKS2_\00", section "llvm.metadata" ; <[50 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([50 x i8]* @.str449, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 469, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite447 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite445 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype451 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite445 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype452 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array453 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [59 x i8] c"_ZN10polynomialISt7complexIdEE11bit_reverseERKS_IS0_IS1_EE\00", section "llvm.metadata" ; <[59 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([59 x i8]* @.str455, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 483, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite454 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"fft\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [41 x i8] c"_ZN10polynomialISt7complexIdEE3fftERKS2_\00", section "llvm.metadata" ; <[41 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str457, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str457, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str458, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 497, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite447 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"inverse_fft\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [59 x i8] c"_ZN10polynomialISt7complexIdEE11inverse_fftERKS_IS0_IS1_EE\00", section "llvm.metadata" ; <[59 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str460, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str460, i32 0, i32 0), i8* getelementptr ([59 x i8]* @.str461, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 535, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite454 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"operator*\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [40 x i8] c"_ZNK10polynomialISt7complexIdEEmlERKS2_\00", section "llvm.metadata" ; <[40 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str463, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str463, i32 0, i32 0), i8* getelementptr ([40 x i8]* @.str464, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 576, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite431 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [39 x i8] c"_ZN10polynomialISt7complexIdEEpLERKS2_\00", section "llvm.metadata" ; <[39 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([39 x i8]* @.str466, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 625, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite396 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [39 x i8] c"_ZN10polynomialISt7complexIdEEmIERKS2_\00", section "llvm.metadata" ; <[39 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([39 x i8]* @.str468, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 636, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite396 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [39 x i8] c"_ZN10polynomialISt7complexIdEEmLERKS2_\00", section "llvm.metadata" ; <[39 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([39 x i8]* @.str470, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 647, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite396 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array472 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"acquire\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [41 x i8] c"_ZN10polynomialISt7complexIdEE7acquireEv\00", section "llvm.metadata" ; <[41 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str474, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str474, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str475, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 181, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite473 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"release\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [41 x i8] c"_ZN10polynomialISt7complexIdEE7releaseEv\00", section "llvm.metadata" ; <[41 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str477, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str477, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str478, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 188, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite473 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype376 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype187 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array480 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"deep_copy\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [47 x i8] c"_ZN10polynomialISt7complexIdEE9deep_copyEPKS1_\00", section "llvm.metadata" ; <[47 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([47 x i8]* @.str483, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 195, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite481 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [33 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype373 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype374 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype375 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram379 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram382 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram385 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram390 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram393 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram398 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram402 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram406 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram411 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram415 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram419 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram423 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram427 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram429 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram433 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram435 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram437 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram439 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram443 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram450 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram456 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram459 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram462 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram465 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram467 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram469 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram471 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram476 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram479 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram484 to %0*)], section "llvm.metadata" ; <[33 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([34 x i8]* @.str371, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 84, i64 96, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([33 x %0*]* @llvm.dbg.array485 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype298 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array487 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [38 x i8] c"_ZN10polynomialIdE11bit_reverseERKS0_\00", section "llvm.metadata" ; <[38 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([38 x i8]* @.str489, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 469, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite488 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype387 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array491 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [52 x i8] c"_ZN10polynomialIdE11bit_reverseERKS_ISt7complexIdEE\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str493, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 483, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite492 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZN10polynomialIdE3fftERKS0_\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str457, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str457, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str495, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 497, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite488 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [52 x i8] c"_ZN10polynomialIdE11inverse_fftERKS_ISt7complexIdEE\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str460, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str460, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str497, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 535, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite492 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNK10polynomialIdEmlERKS0_\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str463, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str463, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str499, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 576, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite351 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZN10polynomialIdEpLERKS0_\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str501, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 625, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite308 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZN10polynomialIdEmIERKS0_\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str503, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 636, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite308 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZN10polynomialIdEmLERKS0_\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str98, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str505, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 647, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite308 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array507 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZN10polynomialIdE7acquireEv\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str474, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str474, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str509, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 181, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite508 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZN10polynomialIdE7releaseEv\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str477, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str477, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str511, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 188, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite508 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype290 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array513 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [33 x i8] c"_ZN10polynomialIdE9deep_copyEPKd\00", section "llvm.metadata" ; <[33 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([33 x i8]* @.str515, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 195, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite514 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [33 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype275 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype278 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype284 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram289 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram293 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram296 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram301 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram305 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram310 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram315 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram320 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram326 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram331 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram336 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram341 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram346 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram349 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram353 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram355 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram360 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram365 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram370 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram490 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram494 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram496 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram498 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram500 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram502 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram504 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram506 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram510 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram512 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram516 to %0*)], section "llvm.metadata" ; <[33 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @.str266, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 84, i64 96, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([33 x %0*]* @llvm.dbg.array517 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype180 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype519 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array520 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([23 x i8]* @.str335, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 306, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite521 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str324, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str324, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str325, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 111, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite323 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str418, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 306, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite417 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype196 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype224 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array534 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"operator*=<double>\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZNSt7complexIdEmLIdEERS0_RKS_IT_E\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @.str536, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str536, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str537, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1286, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite535 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"__t\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram538 to %0*), i8* getelementptr ([4 x i8]* @.str541, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1288, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([33 x i8]* @.str515, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 195, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite514 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str358, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str358, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str359, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 404, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite357 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array555 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"operator*<double>\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant [32 x i8] c"_ZStmlIdESt7complexIT_ERKS2_S4_\00", section "llvm.metadata" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str557, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str557, i32 0, i32 0), i8* getelementptr ([32 x i8]* @.str558, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 378, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite556 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram559 to %0*), i8* getelementptr ([4 x i8]* @.str244, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 380, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str482, i32 0, i32 0), i8* getelementptr ([47 x i8]* @.str483, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 195, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite481 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str324, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str324, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str410, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 111, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite409 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype31 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array572 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"operator-<double>\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZStngIdESt7complexIT_ERKS2_\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str574, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str574, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str575, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 443, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite573 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str329, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str329, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str330, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 300, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite328 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str363, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str363, i32 0, i32 0), i8* getelementptr ([32 x i8]* @.str364, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 423, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite362 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"operator/=<double>\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZNSt7complexIdEdVIdEERS0_RKS_IT_E\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @.str591, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str591, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str592, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1297, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite535 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram593 to %0*), i8* getelementptr ([4 x i8]* @.str541, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1299, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"operator/<double>\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant [32 x i8] c"_ZStdvIdESt7complexIT_ERKS2_S4_\00", section "llvm.metadata" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str597, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str597, i32 0, i32 0), i8* getelementptr ([32 x i8]* @.str598, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 408, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite556 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram599 to %0*), i8* getelementptr ([4 x i8]* @.str244, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 410, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"operator+=<double>\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZNSt7complexIdEpLIdEERS0_RKS_IT_E\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @.str603, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str603, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str604, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1268, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite535 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"operator+<double>\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant [32 x i8] c"_ZStplIdESt7complexIT_ERKS2_S4_\00", section "llvm.metadata" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str608, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str608, i32 0, i32 0), i8* getelementptr ([32 x i8]* @.str609, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 318, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite556 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram610 to %0*), i8* getelementptr ([4 x i8]* @.str244, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 320, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"operator-=<double>\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZNSt7complexIdEmIIdEERS0_RKS_IT_E\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @.str614, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str614, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str615, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 1277, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite535 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [32 x i8] c"_ZStmiIdESt7complexIT_ERKS2_S4_\00", section "llvm.metadata" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str574, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str574, i32 0, i32 0), i8* getelementptr ([32 x i8]* @.str619, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 348, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite556 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram620 to %0*), i8* getelementptr ([4 x i8]* @.str244, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 350, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str329, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str329, i32 0, i32 0), i8* getelementptr ([38 x i8]* @.str414, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 300, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite413 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array627 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [42 x i8] c"__static_initialization_and_destruction_0\00", section "llvm.metadata" ; <[42 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([42 x i8]* @.str629, i32 0, i32 0), i8* getelementptr ([42 x i8]* @.str629, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 703, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite628 to %0*), i1 true, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=0]
[email protected] = internal constant [9 x i8] c"iostream\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected]_unit636 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @.str635, i32 0, i32 0), i8* getelementptr ([110 x i8]* @.str4, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+@_ZStL8__ioinit = internal global %"struct.std::allocator<char>" zeroinitializer ; <%"struct.std::allocator<char>"*> [#uses=2]
[email protected] = internal constant [115 x i8] c"/developer/home2/zsth/projects/llvm.org/install/lib/gcc/i686-pc-linux-gnu/4.2.1/../../../../include/c++/4.2.1/bits\00", section "llvm.metadata" ; <[115 x i8]*> [#uses=1]
+@__dso_handle = external global i8* ; <i8**> [#uses=1]
+@_ZGVN10polynomialIdE4PI2IE = weak global i64 0, align 8 ; <i64*> [#uses=1]
+@_ZN10polynomialIdE4PI2IE = weak global %"struct.std::complex<double>" zeroinitializer ; <%"struct.std::complex<double>"*> [#uses=3]
[email protected] = internal constant [1 x %0*] zeroinitializer, section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array654 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_GLOBAL__I_main\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str656, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str656, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 704, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite655 to %0*), i1 true, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* null }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype658 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array659 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"__tcf_0\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str661, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str661, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit636 to %0*), i32 77, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite660 to %0*), i1 true, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str477, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str477, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str511, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 188, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite508 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [23 x i8] c"_ZN10polynomialIdED0Ev\00", section "llvm.metadata" ; <[23 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([23 x i8]* @.str667, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 252, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite508 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+@_ZTV10polynomialIdE = weak constant [4 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__class_type_info_pseudo* @_ZTI10polynomialIdE to i32 (...)*), i32 (...)* bitcast (void (%"struct.polynomial<double>"*)* @_ZN10polynomialIdED1Ev to i32 (...)*), i32 (...)* bitcast (void (%"struct.polynomial<double>"*)* @_ZN10polynomialIdED0Ev to i32 (...)*)], align 8 ; <[4 x i32 (...)*]*> [#uses=1]
+@_ZTI10polynomialIdE = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([16 x i8]* @_ZTS10polynomialIdE, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1]
+@_ZTVN10__cxxabiv117__class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1]
+@_ZTS10polynomialIdE = weak constant [16 x i8] c"10polynomialIdE\00" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"char\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str671, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 8, i64 8, i64 0, i32 0, i32 6 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"<built-in>\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected]_unit677 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @.str676, i32 0, i32 0), i8* getelementptr ([42 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [0 x %0*] zeroinitializer, section "llvm.metadata" ; <[0 x %0*]*> [#uses=1]
[email protected] = internal constant [23 x i8] c"_ZN10polynomialIdED1Ev\00", section "llvm.metadata" ; <[23 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([23 x i8]* @.str690, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 252, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite508 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str477, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str477, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str478, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 188, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite473 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZN10polynomialISt7complexIdEED0Ev\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str695, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 252, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite473 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+@_ZTV10polynomialISt7complexIdEE = weak constant [4 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__class_type_info_pseudo* @_ZTI10polynomialISt7complexIdEE to i32 (...)*), i32 (...)* bitcast (void (%"struct.polynomial<std::complex<double> >"*)* @_ZN10polynomialISt7complexIdEED1Ev to i32 (...)*), i32 (...)* bitcast (void (%"struct.polynomial<std::complex<double> >"*)* @_ZN10polynomialISt7complexIdEED0Ev to i32 (...)*)], align 8 ; <[4 x i32 (...)*]*> [#uses=1]
+@_ZTI10polynomialISt7complexIdEE = weak constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([28 x i8]* @_ZTS10polynomialISt7complexIdEE, i32 0, i32 0) } } ; <%struct.__class_type_info_pseudo*> [#uses=1]
+@_ZTS10polynomialISt7complexIdEE = weak constant [28 x i8] c"10polynomialISt7complexIdEE\00" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZN10polynomialISt7complexIdEED1Ev\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str304, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str707, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 252, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite473 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str474, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str474, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str509, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 181, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite508 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [23 x i8] c"_ZN10polynomialIdEC1Ej\00", section "llvm.metadata" ; <[23 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([23 x i8]* @.str712, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 211, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite287 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZN10polynomialIdEC1ERKS0_\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str716, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 242, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite300 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str318, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str318, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str319, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 276, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite317 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str309, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 259, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite308 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str474, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str474, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str475, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 181, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite473 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [35 x i8] c"_ZN10polynomialISt7complexIdEEC1Ej\00", section "llvm.metadata" ; <[35 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str288, i32 0, i32 0), i8* getelementptr ([35 x i8]* @.str734, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 211, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite378 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([38 x i8]* @.str489, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 469, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite488 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram738 to %0*), i8* getelementptr ([7 x i8]* @.str259, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 473, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str448, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str493, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 483, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite492 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram747 to %0*), i8* getelementptr ([7 x i8]* @.str259, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 487, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([39 x i8]* @.str397, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 259, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite396 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str368, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str368, i32 0, i32 0), i8* getelementptr ([34 x i8]* @.str369, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 443, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite367 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [35 x i8] c"overflow in fft polynomial stretch\00" ; <[35 x i8]*> [#uses=1]
+@_ZTISt14overflow_error = weak constant %struct.__si_class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i32 add (i32 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv120__si_class_type_infoE to i32), i32 8) to i8*), i8* getelementptr ([19 x i8]* @_ZTSSt14overflow_error, i32 0, i32 0) }, %"struct.std::type_info"* bitcast (%struct.__si_class_type_info_pseudo* @_ZTISt13runtime_error to %"struct.std::type_info"*) } ; <%struct.__si_class_type_info_pseudo*> [#uses=2]
+@_ZTVN10__cxxabiv120__si_class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1]
+@_ZTSSt14overflow_error = weak constant [19 x i8] c"St14overflow_error\00" ; <[19 x i8]*> [#uses=1]
+@_ZTISt13runtime_error = external constant %struct.__si_class_type_info_pseudo ; <%struct.__si_class_type_info_pseudo*> [#uses=1]
[email protected] = internal constant [10 x i8] c"stdexcept\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected]_unit770 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([10 x i8]* @.str769, i32 0, i32 0), i8* getelementptr ([110 x i8]* @.str4, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"overflow_error\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"runtime_error\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [10 x i8] c"exception\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected]_unit778 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([10 x i8]* @.str777, i32 0, i32 0), i8* getelementptr ([110 x i8]* @.str4, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_vptr.exception\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str780, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit778 to %0*), i32 57, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype273 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite800 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype782 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array783 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str777, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str777, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit778 to %0*), i32 59, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite784 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype782 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array786 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"~exception\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str788, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str788, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit778 to %0*), i32 60, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite787 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 8, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype790 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite800 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype792 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype793 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array794 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"what\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNKSt9exception4whatEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str796, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str796, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str797, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit778 to %0*), i32 63, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite795 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype781 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram785 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram789 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram798 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str777, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit778 to %0*), i32 57, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array799 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458780, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite800 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"stringfwd.h\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected]_unit803 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([12 x i8]* @.str802, i32 0, i32 0), i8* getelementptr ([115 x i8]* @.str638, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [64 x i8] c"basic_string<char,std::char_traits<char>,std::allocator<char> >\00", section "llvm.metadata" ; <[64 x i8]*> [#uses=1]
[email protected] = internal constant [15 x i8] c"basic_string.h\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected]_unit807 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @.str806, i32 0, i32 0), i8* getelementptr ([115 x i8]* @.str638, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_Alloc_hider\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant [16 x i8] c"allocator<char>\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [16 x i8] c"new_allocator.h\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [114 x i8] c"/developer/home2/zsth/projects/llvm.org/install/lib/gcc/i686-pc-linux-gnu/4.2.1/../../../../include/c++/4.2.1/ext\00", section "llvm.metadata" ; <[114 x i8]*> [#uses=1]
[email protected]_unit814 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([16 x i8]* @.str812, i32 0, i32 0), i8* getelementptr ([114 x i8]* @.str813, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [20 x i8] c"new_allocator<char>\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite877 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype817 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array818 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"new_allocator\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str820, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str820, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 68, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite819 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 8, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite877 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype822 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype817 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype823 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array824 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str820, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str820, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 70, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite825 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 54, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite827 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype817 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype829 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array830 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str820, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str820, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite831 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype817 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array833 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"~new_allocator\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str835, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str835, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 75, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite834 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype822 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype838 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype839 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array840 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"address\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [44 x i8] c"_ZNK9__gnu_cxx13new_allocatorIcE7addressERc\00", section "llvm.metadata" ; <[44 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str842, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str842, i32 0, i32 0), i8* getelementptr ([44 x i8]* @.str843, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 78, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite841 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype790 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype838 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype845 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array846 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [45 x i8] c"_ZNK9__gnu_cxx13new_allocatorIcE7addressERKc\00", section "llvm.metadata" ; <[45 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str842, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str842, i32 0, i32 0), i8* getelementptr ([45 x i8]* @.str848, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 81, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite847 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* null }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype817 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype850 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array851 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"allocate\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant [46 x i8] c"_ZN9__gnu_cxx13new_allocatorIcE8allocateEjPKv\00", section "llvm.metadata" ; <[46 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str853, i32 0, i32 0), i8* getelementptr ([9 x i8]* @.str853, i32 0, i32 0), i8* getelementptr ([46 x i8]* @.str854, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 86, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite852 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype817 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array856 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"deallocate\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [48 x i8] c"_ZN9__gnu_cxx13new_allocatorIcE10deallocateEPcj\00", section "llvm.metadata" ; <[48 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str858, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str858, i32 0, i32 0), i8* getelementptr ([48 x i8]* @.str859, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 96, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite857 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype838 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array861 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"max_size\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant [44 x i8] c"_ZNK9__gnu_cxx13new_allocatorIcE8max_sizeEv\00", section "llvm.metadata" ; <[44 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str863, i32 0, i32 0), i8* getelementptr ([9 x i8]* @.str863, i32 0, i32 0), i8* getelementptr ([44 x i8]* @.str864, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 100, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite862 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype817 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype845 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array866 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"construct\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [48 x i8] c"_ZN9__gnu_cxx13new_allocatorIcE9constructEPcRKc\00", section "llvm.metadata" ; <[48 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str868, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str868, i32 0, i32 0), i8* getelementptr ([48 x i8]* @.str869, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 106, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite867 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype817 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array871 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"destroy\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [43 x i8] c"_ZN9__gnu_cxx13new_allocatorIcE7destroyEPc\00", section "llvm.metadata" ; <[43 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str873, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str873, i32 0, i32 0), i8* getelementptr ([43 x i8]* @.str874, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 110, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite872 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x %0*] [%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram821 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram826 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram832 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram836 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram844 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram849 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram855 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram860 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram865 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram870 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram875 to %0*)], section "llvm.metadata" ; <[11 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([20 x i8]* @.str815, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit814 to %0*), i32 54, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([11 x %0*]* @llvm.dbg.array876 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458780, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit803 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite877 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite902 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype879 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array880 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"allocator.h\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected]_unit883 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([12 x i8]* @.str882, i32 0, i32 0), i8* getelementptr ([115 x i8]* @.str638, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"allocator\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str884, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str884, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit883 to %0*), i32 100, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite881 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 8, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite902 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype886 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype879 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array888 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str884, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str884, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit883 to %0*), i32 102, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite889 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit803 to %0*), i32 49, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite891 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype892 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype879 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype893 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array894 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str884, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str884, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit883 to %0*), i32 106, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite895 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype879 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array897 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"~allocator\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str899, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str899, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit883 to %0*), i32 108, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite898 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype878 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram885 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram890 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram896 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram900 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str810, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit803 to %0*), i32 49, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array901 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458780, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite902 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"_M_p\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str904, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 264, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite911 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype906 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array907 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str808, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str808, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 261, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite908 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype903 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype905 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram909 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str808, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 260, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array910 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_M_dataplus\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str912, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 276, i64 32, i64 32, i64 0, i32 1, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite911 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"string\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str914, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit803 to %0*), i32 56, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1693 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype915 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype916 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array918 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"_M_data\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNKSs7_M_dataEv\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str920, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str920, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str921, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 279, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite919 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1693 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array924 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNSs7_M_dataEPc\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str920, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str920, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str926, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 283, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite925 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"_Rep\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [10 x i8] c"_Rep_base\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [10 x i8] c"_M_length\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str932, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 149, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_M_capacity\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str934, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 150, i64 32, i64 32, i64 32, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"ptrdiff_t\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str936, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit677 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype937 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"types.h\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected]_unit940 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @.str939, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str69, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"__int32_t\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str941, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 43, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype938 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"__pid_t\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str943, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 145, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype942 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"__daddr_t\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str945, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 154, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype944 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"__key_t\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str947, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 157, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype946 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"__clockid_t\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str949, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 158, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype948 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"__ssize_t\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str951, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 181, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype950 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"__intptr_t\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str953, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 189, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype952 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_G_config.h\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [13 x i8] c"/usr/include\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected]_unit957 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([12 x i8]* @.str955, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str956, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"_G_int32_t\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str958, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit957 to %0*), i32 55, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype954 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"nl_types.h\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected]_unit961 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @.str960, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str956, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"nl_item\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str962, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit961 to %0*), i32 34, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype959 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"time.h\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected]_unit965 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([7 x i8]* @.str964, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str956, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"clockid_t\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str966, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit965 to %0*), i32 77, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype963 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"pid_t\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str968, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit965 to %0*), i32 105, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype967 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"__sig_atomic_t\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str970, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit965 to %0*), i32 413, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype969 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"pthreadtypes.h\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected]_unit973 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @.str972, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str69, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"pthread_once_t\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str974, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit973 to %0*), i32 109, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype971 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458805, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype975 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"pthread_spinlock_t\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @.str977, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit973 to %0*), i32 142, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype976 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"pthread.h\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected]_unit980 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([10 x i8]* @.str979, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str956, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"ssize_t\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str981, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit980 to %0*), i32 1101, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype978 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"unistd.h\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected]_unit984 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @.str983, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str956, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"intptr_t\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str985, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit984 to %0*), i32 226, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype982 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"gthr-default.h\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant [133 x i8] c"/developer/home2/zsth/projects/llvm.org/install/lib/gcc/i686-pc-linux-gnu/4.2.1/../../../../include/c++/4.2.1/i686-pc-linux-gnu/bits\00", section "llvm.metadata" ; <[133 x i8]*> [#uses=1]
[email protected]_unit989 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @.str987, i32 0, i32 0), i8* getelementptr ([133 x i8]* @.str988, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"__gthread_once_t\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str990, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit989 to %0*), i32 46, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype986 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str941, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 43, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype991 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"stdint.h\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected]_unit994 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @.str993, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str956, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"int32_t\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str995, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit994 to %0*), i32 38, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype992 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"int_least32_t\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str997, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit994 to %0*), i32 67, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype996 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"int_fast16_t\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str999, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit994 to %0*), i32 91, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype998 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"int_fast32_t\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1001, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit994 to %0*), i32 97, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1000 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"postypes.h\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected]_unit1004 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @.str1003, i32 0, i32 0), i8* getelementptr ([115 x i8]* @.str638, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"streamsize\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1005, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1004 to %0*), i32 72, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1002 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"/usr/include/sys\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected]_unit1008 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @.str939, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1007, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"daddr_t\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1009, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1008 to %0*), i32 105, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1006 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"key_t\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1011, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1008 to %0*), i32 117, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1010 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"register_t\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1013, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1008 to %0*), i32 204, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1012 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str936, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit677 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1014 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"stdlib.h\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected]_unit1017 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @.str1016, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str956, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_Atomic_word\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1018, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1017 to %0*), i32 962, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1015 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_M_refcount\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str1020, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 151, i64 32, i64 32, i64 64, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1019 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype933 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype935 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1021 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str930, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 148, i64 96, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1022 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458780, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1023 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1091 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1025 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array1026 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_S_empty_rep\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZNSs4_Rep12_S_empty_repEv\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1028, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1028, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str1029, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 180, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1027 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"bool\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1031, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 8, i64 8, i64 0, i32 0, i32 2 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 96, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1091 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1033 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype1032 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1034 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1035 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_M_is_leaked\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNKSs4_Rep12_M_is_leakedEv\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1037, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1037, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str1038, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 190, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1036 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_M_is_shared\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNKSs4_Rep12_M_is_sharedEv\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1040, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1040, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str1041, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 194, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1036 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1091 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1043 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1044 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_M_set_leaked\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNSs4_Rep13_M_set_leakedEv\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1046, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1046, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str1047, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 198, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1045 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_M_set_sharable\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [30 x i8] c"_ZNSs4_Rep15_M_set_sharableEv\00", section "llvm.metadata" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str1049, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1049, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str1050, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 202, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1045 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1043 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1052 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_M_set_length_and_sharable\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant [41 x i8] c"_ZNSs4_Rep26_M_set_length_and_sharableEj\00", section "llvm.metadata" ; <[41 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([27 x i8]* @.str1054, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str1054, i32 0, i32 0), i8* getelementptr ([41 x i8]* @.str1055, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 206, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1053 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1043 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1057 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"_M_refdata\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNSs4_Rep10_M_refdataEv\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1059, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1059, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str1060, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 216, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1058 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1043 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1062 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"_M_grab\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [30 x i8] c"_ZNSs4_Rep7_M_grabERKSaIcES2_\00", section "llvm.metadata" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1064, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1064, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str1065, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 220, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1063 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1043 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1067 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"basic_string.tcc\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected]_unit1070 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([17 x i8]* @.str1069, i32 0, i32 0), i8* getelementptr ([115 x i8]* @.str638, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"_S_create\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [31 x i8] c"_ZNSs4_Rep9_S_createEjjRKSaIcE\00", section "llvm.metadata" ; <[31 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str1071, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str1071, i32 0, i32 0), i8* getelementptr ([31 x i8]* @.str1072, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 529, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1068 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1043 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1074 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"_M_dispose\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [31 x i8] c"_ZNSs4_Rep10_M_disposeERKSaIcE\00", section "llvm.metadata" ; <[31 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1076, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1076, i32 0, i32 0), i8* getelementptr ([31 x i8]* @.str1077, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 231, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1075 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"_M_destroy\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [31 x i8] c"_ZNSs4_Rep10_M_destroyERKSaIcE\00", section "llvm.metadata" ; <[31 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1079, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1079, i32 0, i32 0), i8* getelementptr ([31 x i8]* @.str1080, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 427, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1075 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"_M_refcopy\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNSs4_Rep10_M_refcopyEv\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1082, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1082, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str1083, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 245, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1058 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1043 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1085 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"_M_clone\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZNSs4_Rep8_M_cloneERKSaIcEj\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str1087, i32 0, i32 0), i8* getelementptr ([9 x i8]* @.str1087, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str1088, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 606, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1086 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [14 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1024 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1030 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1039 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1042 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1048 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1051 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1056 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1061 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1066 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1073 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1078 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1081 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1084 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1089 to %0*)], section "llvm.metadata" ; <[14 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str928, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 155, i64 96, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([14 x %0*]* @llvm.dbg.array1090 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1091 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1092 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1093 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNKSs6_M_repEv\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str1087, i32 0, i32 0), i8* getelementptr ([9 x i8]* @.str1087, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1095, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 287, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1094 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"stl_iterator.h\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected]_unit1098 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @.str1097, i32 0, i32 0), i8* getelementptr ([115 x i8]* @.str638, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [97 x i8] c"__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >\00", section "llvm.metadata" ; <[97 x i8]*> [#uses=1]
[email protected] = internal constant [11 x i8] c"_M_current\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1101, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 639, i64 32, i64 32, i64 0, i32 2, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1103 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1104 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"__normal_iterator\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str1106, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1106, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 650, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1105 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"__caddr_t\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str1108, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit940 to %0*), i32 188, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"__gnuc_va_list\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str1110, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit957 to %0*), i32 58, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1109 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"libio.h\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected]_unit1113 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @.str1112, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str956, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"va_list\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1114, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1113 to %0*), i32 491, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1111 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1115 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1116 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1103 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1117 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1118 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str1106, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1106, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 653, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1119 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 637, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1121 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1122 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1103 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1123 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1124 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str1106, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1106, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 660, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1125 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1127 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype839 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1128 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1129 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [44 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPcSsEdeEv\00", section "llvm.metadata" ; <[44 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str463, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str463, i32 0, i32 0), i8* getelementptr ([44 x i8]* @.str1131, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 665, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1130 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1128 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1133 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator->\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [44 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPcSsEptEv\00", section "llvm.metadata" ; <[44 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1135, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1135, i32 0, i32 0), i8* getelementptr ([44 x i8]* @.str1136, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 669, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1134 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1138 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1103 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1139 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator++\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [43 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPcSsEppEv\00", section "llvm.metadata" ; <[43 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1141, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1141, i32 0, i32 0), i8* getelementptr ([43 x i8]* @.str1142, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 673, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1140 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1103 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1144 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [43 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPcSsEppEi\00", section "llvm.metadata" ; <[43 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1141, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1141, i32 0, i32 0), i8* getelementptr ([43 x i8]* @.str1146, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 680, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1145 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"operator--\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [43 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPcSsEmmEv\00", section "llvm.metadata" ; <[43 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1148, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1148, i32 0, i32 0), i8* getelementptr ([43 x i8]* @.str1149, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 685, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1140 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [43 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPcSsEmmEi\00", section "llvm.metadata" ; <[43 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str1148, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1148, i32 0, i32 0), i8* getelementptr ([43 x i8]* @.str1151, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 692, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1145 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1015 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype839 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1128 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1153 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1154 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [46 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPcSsEixERKi\00", section "llvm.metadata" ; <[46 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([46 x i8]* @.str1156, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 697, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1155 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1138 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1103 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1153 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1158 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [45 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPcSsEpLERKi\00", section "llvm.metadata" ; <[45 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([45 x i8]* @.str1160, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 701, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1159 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1128 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1153 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1162 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [46 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPcSsEplERKi\00", section "llvm.metadata" ; <[46 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str347, i32 0, i32 0), i8* getelementptr ([46 x i8]* @.str1164, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 705, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1163 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [45 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPcSsEmIERKi\00", section "llvm.metadata" ; <[45 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str95, i32 0, i32 0), i8* getelementptr ([45 x i8]* @.str1166, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 709, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1159 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [46 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPcSsEmiERKi\00", section "llvm.metadata" ; <[46 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str344, i32 0, i32 0), i8* getelementptr ([46 x i8]* @.str1168, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 713, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1163 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1117 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1128 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1170 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"base\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [47 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPcSsE4baseEv\00", section "llvm.metadata" ; <[47 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1172, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1172, i32 0, i32 0), i8* getelementptr ([47 x i8]* @.str1173, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 717, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1171 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [16 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1102 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1107 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1120 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1126 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1132 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1137 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1143 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1147 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1150 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1152 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1157 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1161 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1165 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1167 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1169 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1174 to %0*)], section "llvm.metadata" ; <[16 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([97 x i8]* @.str1099, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 637, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([16 x %0*]* @llvm.dbg.array1175 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1177 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"_ZNKSs9_M_ibeginEv\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1172, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1172, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str1179, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 293, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1178 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"_M_iend\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNKSs7_M_iendEv\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1181, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1181, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1182, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 297, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1178 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1184 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"_M_leak\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNSs7_M_leakEv\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1186, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1186, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1187, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 301, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1185 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1189 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"_M_check\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNKSs8_M_checkEjPKc\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str1191, i32 0, i32 0), i8* getelementptr ([9 x i8]* @.str1191, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str1192, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 308, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1190 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1194 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_M_check_length\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [30 x i8] c"_ZNKSs15_M_check_lengthEjjPKc\00", section "llvm.metadata" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str1196, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1196, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str1197, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 316, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1195 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1199 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"_M_limit\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant [19 x i8] c"_ZNKSs8_M_limitEjj\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str1201, i32 0, i32 0), i8* getelementptr ([9 x i8]* @.str1201, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str1202, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 324, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1200 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype1032 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1204 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_M_disjunct\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNKSs11_M_disjunctEPKc\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str1206, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str1206, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str1207, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 332, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1205 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1209 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"_M_copy\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSs7_M_copyEPcPKcj\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1211, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1211, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str1212, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 341, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1210 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"_M_move\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSs7_M_moveEPcPKcj\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1214, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1214, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str1215, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 350, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1210 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1217 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"_M_assign\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSs9_M_assignEPcjc\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str1219, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str1219, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str1220, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 359, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1218 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* null, %0* null], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1222 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_S_copy_chars\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 371, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1223 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1226 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [64 x i8] c"_ZNSs13_S_copy_charsEPcN9__gnu_cxx17__normal_iteratorIS_SsEES2_\00", section "llvm.metadata" ; <[64 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([64 x i8]* @.str1228, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 378, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1227 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [103 x i8] c"__normal_iterator<const char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >\00", section "llvm.metadata" ; <[103 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([103 x i8]* @.str1230, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 637, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1231 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1231 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1232 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [65 x i8] c"_ZNSs13_S_copy_charsEPcN9__gnu_cxx17__normal_iteratorIPKcSsEES4_\00", section "llvm.metadata" ; <[65 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([65 x i8]* @.str1234, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 382, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1233 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1236 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNSs13_S_copy_charsEPcS_S_\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str1238, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 386, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1237 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1240 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [30 x i8] c"_ZNSs13_S_copy_charsEPcPKcS1_\00", section "llvm.metadata" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1224, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str1242, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 390, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1241 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1244 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"_M_mutate\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [20 x i8] c"_ZNSs9_M_mutateEjjj\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str1246, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str1246, i32 0, i32 0), i8* getelementptr ([20 x i8]* @.str1247, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 451, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1245 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_M_leak_hard\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant [22 x i8] c"_ZNSs12_M_leak_hardEv\00", section "llvm.metadata" ; <[22 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1249, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1249, i32 0, i32 0), i8* getelementptr ([22 x i8]* @.str1250, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 437, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1185 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [22 x i8] c"_ZNSs12_S_empty_repEv\00", section "llvm.metadata" ; <[22 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1028, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1028, i32 0, i32 0), i8* getelementptr ([22 x i8]* @.str1252, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 400, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1027 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"basic_string\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 2055, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1185 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1256 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 191, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1257 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype916 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1260 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 183, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1261 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1263 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 197, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1264 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1266 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 208, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1267 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1269 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 219, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1270 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1272 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 226, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1273 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1275 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 233, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1276 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* null, %0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1278 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1254, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 477, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1279 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1281 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"~basic_string\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1283, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1283, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 482, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1282 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1693 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1286 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_ZNSsaSERKSs\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1288, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 490, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1287 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1290 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_ZNSsaSEPKc\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str1292, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 498, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1291 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1294 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"_ZNSsaSEc\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str89, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str1296, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 509, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1295 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1298 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"begin\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_ZNSs5beginEv\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1300, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1300, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1301, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 521, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1299 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1231 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1303 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_ZNKSs5beginEv\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1300, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1300, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1305, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 532, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1304 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"end\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_ZNSs3endEv\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str1307, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str1307, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str1308, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 540, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1299 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_ZNKSs3endEv\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str1307, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str1307, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1310, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 551, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1304 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [128 x i8] c"reverse_iterator<__gnu_cxx::__normal_iterator<char*, std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >\00", section "llvm.metadata" ; <[128 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([128 x i8]* @.str1312, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 100, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1313 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1314 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"rbegin\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_ZNSs6rbeginEv\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1316, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1316, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1317, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 560, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1315 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [134 x i8] c"reverse_iterator<__gnu_cxx::__normal_iterator<const char*, std::basic_string<char, std::char_traits<char>, std::allocator<char> > > >\00", section "llvm.metadata" ; <[134 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([134 x i8]* @.str1319, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1098 to %0*), i32 100, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1320 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1321 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNKSs6rbeginEv\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1316, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1316, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1323, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 569, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1322 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"rend\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_ZNSs4rendEv\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1325, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1325, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1326, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 578, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1315 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_ZNKSs4rendEv\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1325, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1325, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1328, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 587, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1322 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1330 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"size\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_ZNKSs4sizeEv\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1332, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1332, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1333, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 595, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1331 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"length\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNKSs6lengthEv\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1335, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1335, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1336, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 601, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1331 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNKSs8max_sizeEv\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str863, i32 0, i32 0), i8* getelementptr ([9 x i8]* @.str863, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1338, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 606, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1331 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1340 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"resize\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNSs6resizeEjc\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1342, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1342, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1343, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 622, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1341 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1345 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_ZNSs6resizeEj\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1342, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1342, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1347, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 633, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1346 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [9 x i8] c"capacity\00", section "llvm.metadata" ; <[9 x i8]*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNKSs8capacityEv\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([9 x i8]* @.str1349, i32 0, i32 0), i8* getelementptr ([9 x i8]* @.str1349, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1350, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 641, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1331 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1345 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"reserve\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNSs7reserveEj\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1353, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1353, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1354, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 484, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1352 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"clear\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_ZNSs5clearEv\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1356, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1356, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1357, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 668, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1185 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype1032 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1359 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"empty\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_ZNKSs5emptyEv\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1361, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1361, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1362, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 675, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1360 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype845 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1364 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"_ZNKSsixEj\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1366, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 690, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1365 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype839 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1368 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"_ZNSsixEj\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str334, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str1370, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 707, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1369 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x i8] c"at\00", section "llvm.metadata" ; <[3 x i8]*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_ZNKSs2atEj\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([3 x i8]* @.str1372, i32 0, i32 0), i8* getelementptr ([3 x i8]* @.str1372, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str1373, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 728, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1365 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"_ZNSs2atEj\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([3 x i8]* @.str1372, i32 0, i32 0), i8* getelementptr ([3 x i8]* @.str1372, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str1375, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 747, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1369 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_ZNSspLERKSs\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1377, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 762, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1287 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"_ZNSspLEPKc\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str1379, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 771, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1291 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"_ZNSspLEc\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str92, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str1381, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 780, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1295 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"append\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNSs6appendERKSs\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1384, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 330, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1287 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1386 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [20 x i8] c"_ZNSs6appendERKSsjj\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([20 x i8]* @.str1388, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 347, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1387 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1390 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNSs6appendEPKcj\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1392, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 303, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1391 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNSs6appendEPKc\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1394, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 824, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1291 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1396 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNSs6appendEjc\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1398, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 286, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1397 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* null, %0* null], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1400 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1383, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 851, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1401 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1403 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"push_back\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNSs9push_backEc\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str1405, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str1405, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1406, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 859, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1404 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"assign\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNSs6assignERKSs\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1409, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 248, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1287 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [20 x i8] c"_ZNSs6assignERKSsjj\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([20 x i8]* @.str1411, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 889, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1387 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNSs6assignEPKcj\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1413, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 264, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1391 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNSs6assignEPKc\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1415, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 917, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1291 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNSs6assignEjc\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1417, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 933, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1397 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1400 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1408, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 946, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1419 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1421 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"insert\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [53 x i8] c"_ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEjc\00", section "llvm.metadata" ; <[53 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([53 x i8]* @.str1424, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 962, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1422 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* null, %0* null], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1426 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 978, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1427 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1429 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"_ZNSs6insertEjRKSs\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str1431, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 993, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1430 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1433 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSs6insertEjRKSsjj\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str1435, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1016, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1434 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1437 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"_ZNSs6insertEjPKcj\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str1439, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 365, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1438 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1441 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNSs6insertEjPKc\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1443, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1056, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1442 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1445 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNSs6insertEjjc\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1447, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1079, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1446 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1449 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [52 x i8] c"_ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEc\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1423, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str1451, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1096, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1450 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1453 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"erase\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_ZNSs5eraseEjj\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1455, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1455, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1456, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1120, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1454 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1458 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [50 x i8] c"_ZNSs5eraseEN9__gnu_cxx17__normal_iteratorIPcSsEE\00", section "llvm.metadata" ; <[50 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1455, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1455, i32 0, i32 0), i8* getelementptr ([50 x i8]* @.str1460, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1136, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1459 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1462 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [53 x i8] c"_ZNSs5eraseEN9__gnu_cxx17__normal_iteratorIPcSsEES2_\00", section "llvm.metadata" ; <[53 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1455, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1455, i32 0, i32 0), i8* getelementptr ([53 x i8]* @.str1464, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1156, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1463 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1466 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"replace\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSs7replaceEjjRKSs\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str1469, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1183, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1467 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [7 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[7 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([7 x %0*]* @llvm.dbg.array1471 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [23 x i8] c"_ZNSs7replaceEjjRKSsjj\00", section "llvm.metadata" ; <[23 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([23 x i8]* @.str1473, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1206, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1472 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1475 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNSs7replaceEjjPKcj\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str1477, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 397, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1476 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1479 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [20 x i8] c"_ZNSs7replaceEjjPKc\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([20 x i8]* @.str1481, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1248, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1480 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1483 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"_ZNSs7replaceEjjjc\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str1485, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1271, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1484 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1487 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [59 x i8] c"_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_RKSs\00", section "llvm.metadata" ; <[59 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([59 x i8]* @.str1489, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1289, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1488 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1491 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [59 x i8] c"_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcj\00", section "llvm.metadata" ; <[59 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([59 x i8]* @.str1493, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1307, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1492 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1495 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [58 x i8] c"_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKc\00", section "llvm.metadata" ; <[58 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([58 x i8]* @.str1497, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1328, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1496 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1499 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [57 x i8] c"_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_jc\00", section "llvm.metadata" ; <[57 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([57 x i8]* @.str1501, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1349, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1500 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* null, %0* null], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1503 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1373, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1504 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1506 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [61 x i8] c"_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_S1_S1_\00", section "llvm.metadata" ; <[61 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([61 x i8]* @.str1508, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1385, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1507 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1510 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [61 x i8] c"_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcS4_\00", section "llvm.metadata" ; <[61 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([61 x i8]* @.str1512, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1396, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1511 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1514 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [61 x i8] c"_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_S2_S2_\00", section "llvm.metadata" ; <[61 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([61 x i8]* @.str1516, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1406, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1515 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1231 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1231 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1518 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [70 x i8] c"_ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_NS0_IPKcSsEES5_\00", section "llvm.metadata" ; <[70 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1468, i32 0, i32 0), i8* getelementptr ([70 x i8]* @.str1520, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1417, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1519 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"cpp_type_traits.h\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected]_unit1523 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([18 x i8]* @.str1522, i32 0, i32 0), i8* getelementptr ([115 x i8]* @.str638, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"__true_type\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str1524, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1523 to %0*), i32 97, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([0 x %0*]* @llvm.dbg.array680 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* null, %0* null, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1526 to %0*)], section "llvm.metadata" ; <[7 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([7 x %0*]* @llvm.dbg.array1527 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [20 x i8] c"_M_replace_dispatch\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([20 x i8]* @.str1529, i32 0, i32 0), i8* getelementptr ([20 x i8]* @.str1529, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1430, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1528 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"__false_type\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1531, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1523 to %0*), i32 98, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([0 x %0*]* @llvm.dbg.array680 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1176 to %0*), %0* null, %0* null, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1533 to %0*)], section "llvm.metadata" ; <[7 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([7 x %0*]* @llvm.dbg.array1534 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([20 x i8]* @.str1529, i32 0, i32 0), i8* getelementptr ([20 x i8]* @.str1529, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1436, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1535 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_M_replace_aux\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZNSs14_M_replace_auxEjjjc\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str1537, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1537, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str1538, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 651, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1484 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_M_replace_safe\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [30 x i8] c"_ZNSs15_M_replace_safeEjjPKcj\00", section "llvm.metadata" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str1540, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1540, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str1541, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 664, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1476 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* null, %0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1533 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1543 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_S_construct_aux\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str1545, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1545, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1451, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1544 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* null, %0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1526 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1547 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str1545, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1545, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1460, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1548 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* null, %0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1550 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"_S_construct\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1552, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1552, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1466, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1551 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [26 x i8] c"stl_iterator_base_types.h\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected]_unit1555 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([26 x i8]* @.str1554, i32 0, i32 0), i8* getelementptr ([115 x i8]* @.str638, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"input_iterator_tag\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @.str1556, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1555 to %0*), i32 80, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([0 x %0*]* @llvm.dbg.array680 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* null, %0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1558 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1559 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1552, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1552, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1476, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1560 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"forward_iterator_tag\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458780, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1555 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1558 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1564 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([21 x i8]* @.str1562, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1555 to %0*), i32 84, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array1565 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* null, %0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1566 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1567 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1552, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1552, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1483, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1568 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype887 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1570 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [30 x i8] c"_ZNSs12_S_constructEjcRKSaIcE\00", section "llvm.metadata" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1552, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1552, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str1572, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 166, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1571 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1574 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"copy\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNKSs4copyEPcjj\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1576, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1576, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1577, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 705, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1575 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype923 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1285 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1579 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"swap\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_ZNSs4swapERSs\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1581, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1581, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1582, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 501, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1580 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1584 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"c_str\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_ZNKSs5c_strEv\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1586, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1586, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1587, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1522, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1585 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"data\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_ZNKSs4dataEv\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1589, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1589, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1590, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1532, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1585 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite902 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1592 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"get_allocator\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNKSs13get_allocatorEv\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1594, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1594, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str1595, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1539, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1593 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1597 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"find\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNKSs4findEPKcjj\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1599, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1599, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1600, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 719, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1598 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1602 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNKSs4findERKSsj\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1599, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1599, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1604, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1567, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1603 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1606 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNKSs4findEPKcj\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1599, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1599, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1608, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1581, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1607 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype282 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype672 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1610 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"_ZNKSs4findEcj\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1599, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1599, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1612, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 742, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1611 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1602 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"rfind\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [19 x i8] c"_ZNKSs5rfindERKSsj\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1615, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1615, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str1616, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1611, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1614 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"_ZNKSs5rfindEPKcjj\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1615, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1615, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str1618, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 760, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1598 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1606 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"_ZNKSs5rfindEPKcj\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1615, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1615, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1621, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1639, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1620 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1610 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"_ZNKSs5rfindEcj\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @.str1615, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1615, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1624, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 781, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1623 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"find_first_of\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNKSs13find_first_ofERKSsj\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1626, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1626, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str1627, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1669, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1603 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNKSs13find_first_ofEPKcjj\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1626, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1626, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str1629, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 798, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1598 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZNKSs13find_first_ofEPKcj\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1626, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1626, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str1631, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1697, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1607 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [25 x i8] c"_ZNKSs13find_first_ofEcj\00", section "llvm.metadata" ; <[25 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1626, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1626, i32 0, i32 0), i8* getelementptr ([25 x i8]* @.str1633, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1716, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1611 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"find_last_of\00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZNKSs12find_last_ofERKSsj\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1635, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1635, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str1636, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1730, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1614 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [27 x i8] c"_ZNKSs12find_last_ofEPKcjj\00", section "llvm.metadata" ; <[27 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1635, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1635, i32 0, i32 0), i8* getelementptr ([27 x i8]* @.str1638, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 813, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1598 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZNKSs12find_last_ofEPKcj\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1635, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1635, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str1640, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1758, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1620 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNKSs12find_last_ofEcj\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @.str1635, i32 0, i32 0), i8* getelementptr ([13 x i8]* @.str1635, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str1642, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1777, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1623 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [18 x i8] c"find_first_not_of\00", section "llvm.metadata" ; <[18 x i8]*> [#uses=1]
[email protected] = internal constant [32 x i8] c"_ZNKSs17find_first_not_ofERKSsj\00", section "llvm.metadata" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str1644, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1644, i32 0, i32 0), i8* getelementptr ([32 x i8]* @.str1645, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1791, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1603 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [32 x i8] c"_ZNKSs17find_first_not_ofEPKcjj\00", section "llvm.metadata" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str1644, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1644, i32 0, i32 0), i8* getelementptr ([32 x i8]* @.str1647, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 834, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1598 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [31 x i8] c"_ZNKSs17find_first_not_ofEPKcj\00", section "llvm.metadata" ; <[31 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str1644, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1644, i32 0, i32 0), i8* getelementptr ([31 x i8]* @.str1649, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1820, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1607 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZNKSs17find_first_not_ofEcj\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @.str1644, i32 0, i32 0), i8* getelementptr ([18 x i8]* @.str1644, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str1651, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 846, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1611 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [17 x i8] c"find_last_not_of\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant [31 x i8] c"_ZNKSs16find_last_not_ofERKSsj\00", section "llvm.metadata" ; <[31 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str1653, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1653, i32 0, i32 0), i8* getelementptr ([31 x i8]* @.str1654, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1850, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1614 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [31 x i8] c"_ZNKSs16find_last_not_ofEPKcjj\00", section "llvm.metadata" ; <[31 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str1653, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1653, i32 0, i32 0), i8* getelementptr ([31 x i8]* @.str1656, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 857, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1598 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [30 x i8] c"_ZNKSs16find_last_not_ofEPKcj\00", section "llvm.metadata" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str1653, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1653, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str1658, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1879, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1620 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [28 x i8] c"_ZNKSs16find_last_not_ofEcj\00", section "llvm.metadata" ; <[28 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @.str1653, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1653, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str1660, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 878, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1623 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [4 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1693 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[4 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([4 x %0*]* @llvm.dbg.array1662 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"substr\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [17 x i8] c"_ZNKSs6substrEjj\00", section "llvm.metadata" ; <[17 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1664, i32 0, i32 0), i8* getelementptr ([7 x i8]* @.str1664, i32 0, i32 0), i8* getelementptr ([17 x i8]* @.str1665, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1911, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1663 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1667 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [8 x i8] c"compare\00", section "llvm.metadata" ; <[8 x i8]*> [#uses=1]
[email protected] = internal constant [20 x i8] c"_ZNKSs7compareERKSs\00", section "llvm.metadata" ; <[20 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([20 x i8]* @.str1670, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit807 to %0*), i32 1929, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1668 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1672 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [22 x i8] c"_ZNKSs7compareEjjRKSs\00", section "llvm.metadata" ; <[22 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([22 x i8]* @.str1674, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 898, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1673 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [7 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1259 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[7 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([7 x %0*]* @llvm.dbg.array1676 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [24 x i8] c"_ZNKSs7compareEjjRKSsjj\00", section "llvm.metadata" ; <[24 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([24 x i8]* @.str1678, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 914, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1677 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1680 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [19 x i8] c"_ZNKSs7compareEPKc\00", section "llvm.metadata" ; <[19 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([19 x i8]* @.str1682, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 931, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1681 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1684 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [21 x i8] c"_ZNKSs7compareEjjPKc\00", section "llvm.metadata" ; <[21 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([21 x i8]* @.str1686, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 946, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1685 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype917 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype280 to %0*)], section "llvm.metadata" ; <[6 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([6 x %0*]* @llvm.dbg.array1688 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [22 x i8] c"_ZNKSs7compareEjjPKcj\00", section "llvm.metadata" ; <[22 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([8 x i8]* @.str1669, i32 0, i32 0), i8* getelementptr ([22 x i8]* @.str1690, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1070 to %0*), i32 963, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1689 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [143 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype913 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram922 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram927 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1096 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1180 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1183 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1188 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1193 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1198 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1203 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1208 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1213 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1216 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1221 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1225 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1229 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1235 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1239 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1243 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1248 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1251 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1253 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1255 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1258 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1262 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1265 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1268 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1271 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1274 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1277 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1280 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1284 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1289 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1293 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1297 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1302 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1306 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1309 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1311 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1318 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1324 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1327 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1329 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1334 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1337 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1339 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1344 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1348 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1351 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1355 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1358 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1363 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1367 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1371 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1374 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1376 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1378 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1380 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1382 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1385 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1389 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1393 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1395 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1399 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1402 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1407 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1410 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1412 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1414 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1416 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1418 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1420 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1425 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1428 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1432 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1436 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1440 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1444 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1448 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1452 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1457 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1461 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1465 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1470 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1474 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1478 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1482 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1486 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1490 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1494 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1498 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1502 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1505 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1509 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1513 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1517 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1521 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1530 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1536 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1539 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1542 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1546 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1549 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1553 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1561 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1569 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1573 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1578 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1583 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1588 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1591 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1596 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1601 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1605 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1609 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1613 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1617 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1619 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1622 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1625 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1628 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1630 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1632 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1634 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1637 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1639 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1641 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1643 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1646 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1648 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1650 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1652 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1655 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1657 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1659 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1661 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1666 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1671 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1675 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1679 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1683 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1687 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1691 to %0*)], section "llvm.metadata" ; <[143 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([64 x i8]* @.str804, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit803 to %0*), i32 56, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([143 x %0*]* @llvm.dbg.array1692 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str914, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit803 to %0*), i32 56, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1693 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"_M_msg\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str1695, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 109, i64 32, i64 32, i64 32, i32 1, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1694 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1714 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @.str914, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit803 to %0*), i32 56, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype916 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1698 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1697 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1699 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1700 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str775, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str775, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 114, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1701 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1697 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1703 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [15 x i8] c"~runtime_error\00", section "llvm.metadata" ; <[15 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str1705, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str1705, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 117, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1704 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 64, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1714 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1707 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype791 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1708 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1709 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [29 x i8] c"_ZNKSt13runtime_error4whatEv\00", section "llvm.metadata" ; <[29 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str796, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str796, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str1711, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 122, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1710 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype801 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1696 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1702 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1706 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1712 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str775, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 108, i64 64, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array1713 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458780, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1714 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1721 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1716 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1699 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1717 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str773, i32 0, i32 0), i8* getelementptr ([15 x i8]* @.str773, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 136, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1718 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1715 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1719 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @.str773, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 134, i64 64, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1720 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1721 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1722 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1723 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [16 x i8] c"~overflow_error\00", section "llvm.metadata" ; <[16 x i8]*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZNSt14overflow_errorD1Ev\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str1725, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1725, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str1726, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*), i32 134, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1724 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
+@_ZTVSt14overflow_error = weak constant [5 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__si_class_type_info_pseudo* @_ZTISt14overflow_error to i32 (...)*), i32 (...)* bitcast (void (%"struct.std::overflow_error"*)* @_ZNSt14overflow_errorD1Ev to i32 (...)*), i32 (...)* bitcast (void (%"struct.std::overflow_error"*)* @_ZNSt14overflow_errorD0Ev to i32 (...)*), i32 (...)* bitcast (i8* (%"struct.std::runtime_error"*)* @_ZNKSt13runtime_error4whatEv to i32 (...)*)], align 8 ; <[5 x i32 (...)*]*> [#uses=1]
[email protected] = internal constant [26 x i8] c"_ZNSt14overflow_errorD0Ev\00", section "llvm.metadata" ; <[26 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @.str1725, i32 0, i32 0), i8* getelementptr ([16 x i8]* @.str1725, i32 0, i32 0), i8* getelementptr ([26 x i8]* @.str1735, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 702, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1724 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1738 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [14 x i8] c"__complex_exp\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [22 x i8] c"_ZSt13__complex_expCd\00", section "llvm.metadata" ; <[22 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @.str1740, i32 0, i32 0), i8* getelementptr ([14 x i8]* @.str1740, i32 0, i32 0), i8* getelementptr ([22 x i8]* @.str1741, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 730, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1739 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [12 x i8] c"exp<double>\00", section "llvm.metadata" ; <[12 x i8]*> [#uses=1]
[email protected] = internal constant [31 x i8] c"_ZSt3expIdESt7complexIT_ERKS2_\00", section "llvm.metadata" ; <[31 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str1744, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str1744, i32 0, i32 0), i8* getelementptr ([31 x i8]* @.str1745, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*), i32 738, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite573 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @.str457, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str457, i32 0, i32 0), i8* getelementptr ([29 x i8]* @.str495, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 497, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite488 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1748 to %0*), i8* getelementptr ([7 x i8]* @.str259, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 503, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"u\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1748 to %0*), i8* getelementptr ([2 x i8]* @.str1752, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 501, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"t\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1748 to %0*), i8* getelementptr ([2 x i8]* @.str1754, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 501, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"w\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1748 to %0*), i8* getelementptr ([2 x i8]* @.str1756, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 501, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [3 x i8] c"wm\00", section "llvm.metadata" ; <[3 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1748 to %0*), i8* getelementptr ([3 x i8]* @.str1758, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 501, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @.str460, i32 0, i32 0), i8* getelementptr ([12 x i8]* @.str460, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str497, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 535, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite492 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1771 to %0*), i8* getelementptr ([7 x i8]* @.str259, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 541, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1771 to %0*), i8* getelementptr ([2 x i8]* @.str1752, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 539, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1771 to %0*), i8* getelementptr ([2 x i8]* @.str1754, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 539, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1771 to %0*), i8* getelementptr ([2 x i8]* @.str1756, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 539, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1771 to %0*), i8* getelementptr ([3 x i8]* @.str1758, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 539, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite223 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @.str463, i32 0, i32 0), i8* getelementptr ([10 x i8]* @.str463, i32 0, i32 0), i8* getelementptr ([28 x i8]* @.str499, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 576, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite351 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1785 to %0*), i8* getelementptr ([7 x i8]* @.str259, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 614, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"dft2\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1785 to %0*), i8* getelementptr ([5 x i8]* @.str1794, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 601, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"dft1\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1785 to %0*), i8* getelementptr ([5 x i8]* @.str1796, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 600, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite486 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [3 x i8] c"a2\00", section "llvm.metadata" ; <[3 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1785 to %0*), i8* getelementptr ([3 x i8]* @.str1798, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 591, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [3 x i8] c"a1\00", section "llvm.metadata" ; <[3 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1785 to %0*), i8* getelementptr ([3 x i8]* @.str1800, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 590, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype837 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype269 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1802 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1803 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [5 x i8] c"main\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @.str1805, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1805, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 654, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1804 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"poly3\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1806 to %0*), i8* getelementptr ([6 x i8]* @.str1816, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 674, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"poly2\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1806 to %0*), i8* getelementptr ([6 x i8]* @.str1818, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 673, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"poly1\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1806 to %0*), i8* getelementptr ([6 x i8]* @.str1820, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 672, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite518 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"-ga\00", align 4 ; <[4 x i8]*> [#uses=0]
+@_ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=3]
[email protected] = internal constant [32 x i8] c"\0Afftbench (Std. C++) run time: \00" ; <[32 x i8]*> [#uses=1]
[email protected] = internal constant [3 x i8] c"\0A\0A\00" ; <[3 x i8]*> [#uses=1]
[email protected]_ctors = appending global [1 x %2] [%2 { i32 65535, void ()* @_GLOBAL__I_main }] ; <[1 x %2]*> [#uses=0]
+
+@_ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+@_ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
+@_ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
+@_ZL22__gthrw_pthread_cancelm = alias weak i32 (i32)* @pthread_cancel ; <i32 (i32)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
+@_ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._50*)* @pthread_mutex_init ; <i32 (%struct.pthread_mutex_t*, %struct..0._50*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
+@_ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
+@_ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%struct..0._50*)* @pthread_mutexattr_init ; <i32 (%struct..0._50*)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%struct..0._50*, i32)* @pthread_mutexattr_settype ; <i32 (%struct..0._50*, i32)*> [#uses=0]
+@_ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%struct..0._50*)* @pthread_mutexattr_destroy ; <i32 (%struct..0._50*)*> [#uses=0]
+
+define i32 @main(i32 %argc, i8** nocapture %argv) {
+entry:
+ %n.0.reg2mem = alloca i32 ; <i32*> [#uses=5]
+ %poly3 = alloca %"struct.polynomial<double>", align 8 ; <%"struct.polynomial<double>"*> [#uses=5]
+ %poly2 = alloca %"struct.polynomial<double>", align 8 ; <%"struct.polynomial<double>"*> [#uses=6]
+ %poly1 = alloca %"struct.polynomial<double>", align 8 ; <%"struct.polynomial<double>"*> [#uses=6]
+ %0 = alloca %"struct.polynomial<double>", align 8 ; <%"struct.polynomial<double>"*> [#uses=4]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1806 to %0*))
+ %1 = bitcast %"struct.polynomial<double>"* %poly3 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %1, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1817 to %0*))
+ %2 = bitcast %"struct.polynomial<double>"* %poly2 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %2, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1819 to %0*))
+ %3 = bitcast %"struct.polynomial<double>"* %poly1 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %3, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1821 to %0*))
+ call void @llvm.dbg.stoppoint(i32 659, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %4 = icmp sgt i32 %argc, 1 ; <i1> [#uses=1]
+ br i1 %4, label %bb4, label %bb5
+
+bb1: ; preds = %bb4
+ call void @llvm.dbg.stoppoint(i32 663, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %5 = getelementptr i8** %argv, i32 1 ; <i8**> [#uses=1]
+ %6 = load i8** %5, align 1 ; <i8*> [#uses=1]
+ %tmp = bitcast i8* %6 to i32* ; <i32*> [#uses=1]
+ %lhsv = load i32* %tmp, align 1 ; <i32> [#uses=1]
+ %7 = icmp eq i32 %lhsv, 6383405 ; <i1> [#uses=1]
+ br i1 %7, label %bb5, label %bb3
+
+bb3: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 661, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %8 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %bb4
+
+bb4: ; preds = %bb3, %entry
+ %i.0 = phi i32 [ %8, %bb3 ], [ 1, %entry ] ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 661, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %9 = icmp slt i32 %i.0, %argc ; <i1> [#uses=1]
+ br i1 %9, label %bb1, label %bb5
+
+bb5: ; preds = %bb4, %bb1, %entry
+ %ga_testing.0 = phi i8 [ 0, %entry ], [ 0, %bb4 ], [ 1, %bb1 ] ; <i8> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 672, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdEC1Ej(%"struct.polynomial<double>"* %poly1, i32 524288)
+ call void @llvm.dbg.stoppoint(i32 673, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdEC1Ej(%"struct.polynomial<double>"* %poly2, i32 524288)
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %bb5
+ call void @llvm.dbg.stoppoint(i32 674, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdEC1Ej(%"struct.polynomial<double>"* %poly3, i32 1048575)
+ to label %bb8.thread unwind label %lpad47
+
+bb8.thread: ; preds = %invcont
+ store i32 0, i32* %n.0.reg2mem
+ call void @llvm.dbg.stoppoint(i32 676, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb7
+
+bb7: ; preds = %bb8, %bb8.thread
+ call void @llvm.dbg.stoppoint(i32 678, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %n.0.reload3 = load i32* %n.0.reg2mem ; <i32> [#uses=1]
+ %10 = call double* @_ZN10polynomialIdEixEj(%"struct.polynomial<double>"* %poly1, i32 %n.0.reload3) nounwind ; <double*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 68, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %11 = load i32* @_ZZL13random_doublevE4seed, align 4 ; <i32> [#uses=1]
+ %12 = xor i32 %11, 123459876 ; <i32> [#uses=3]
+ store i32 %12, i32* @_ZZL13random_doublevE4seed, align 4
+ call void @llvm.dbg.stoppoint(i32 69, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %13 = sdiv i32 %12, 127773 ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 70, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %14 = mul i32 %13, 127773 ; <i32> [#uses=1]
+ %15 = sub i32 %12, %14 ; <i32> [#uses=1]
+ %16 = mul i32 %15, 16807 ; <i32> [#uses=1]
+ %17 = mul i32 %13, 2836 ; <i32> [#uses=1]
+ %18 = sub i32 %16, %17 ; <i32> [#uses=2]
+ store i32 %18, i32* @_ZZL13random_doublevE4seed, align 4
+ call void @llvm.dbg.stoppoint(i32 72, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %19 = icmp slt i32 %18, 0 ; <i1> [#uses=1]
+ br i1 %19, label %bb.i, label %_ZL13random_doublev.exit
+
+bb.i: ; preds = %bb7
+ call void @llvm.dbg.stoppoint(i32 73, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %20 = load i32* @_ZZL13random_doublevE4seed, align 4 ; <i32> [#uses=1]
+ %21 = add i32 %20, 2147483647 ; <i32> [#uses=1]
+ store i32 %21, i32* @_ZZL13random_doublevE4seed, align 4
+ br label %_ZL13random_doublev.exit
+
+_ZL13random_doublev.exit: ; preds = %bb.i, %bb7
+ call void @llvm.dbg.stoppoint(i32 75, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %22 = load i32* @_ZZL13random_doublevE4seed, align 4 ; <i32> [#uses=2]
+ %23 = sitofp i32 %22 to double ; <double> [#uses=1]
+ %24 = fmul double %23, 0x3E340000002813D9 ; <double> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 76, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %25 = xor i32 %22, 123459876 ; <i32> [#uses=1]
+ store i32 %25, i32* @_ZZL13random_doublevE4seed, align 4
+ call void @llvm.dbg.stoppoint(i32 78, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ store double %24, double* %10, align 8
+ call void @llvm.dbg.stoppoint(i32 679, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %n.0.reload4 = load i32* %n.0.reg2mem ; <i32> [#uses=1]
+ %26 = call double* @_ZN10polynomialIdEixEj(%"struct.polynomial<double>"* %poly2, i32 %n.0.reload4) nounwind ; <double*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 68, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %27 = load i32* @_ZZL13random_doublevE4seed, align 4 ; <i32> [#uses=1]
+ %28 = xor i32 %27, 123459876 ; <i32> [#uses=3]
+ store i32 %28, i32* @_ZZL13random_doublevE4seed, align 4
+ call void @llvm.dbg.stoppoint(i32 69, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %29 = sdiv i32 %28, 127773 ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 70, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %30 = mul i32 %29, 127773 ; <i32> [#uses=1]
+ %31 = sub i32 %28, %30 ; <i32> [#uses=1]
+ %32 = mul i32 %31, 16807 ; <i32> [#uses=1]
+ %33 = mul i32 %29, 2836 ; <i32> [#uses=1]
+ %34 = sub i32 %32, %33 ; <i32> [#uses=2]
+ store i32 %34, i32* @_ZZL13random_doublevE4seed, align 4
+ call void @llvm.dbg.stoppoint(i32 72, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %35 = icmp slt i32 %34, 0 ; <i1> [#uses=1]
+ br i1 %35, label %bb.i1, label %bb8
+
+bb.i1: ; preds = %_ZL13random_doublev.exit
+ call void @llvm.dbg.stoppoint(i32 73, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %36 = load i32* @_ZZL13random_doublevE4seed, align 4 ; <i32> [#uses=1]
+ %37 = add i32 %36, 2147483647 ; <i32> [#uses=1]
+ store i32 %37, i32* @_ZZL13random_doublevE4seed, align 4
+ br label %bb8
+
+bb8: ; preds = %bb.i1, %_ZL13random_doublev.exit
+ call void @llvm.dbg.stoppoint(i32 75, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %38 = load i32* @_ZZL13random_doublevE4seed, align 4 ; <i32> [#uses=2]
+ %39 = sitofp i32 %38 to double ; <double> [#uses=1]
+ %40 = fmul double %39, 0x3E340000002813D9 ; <double> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 76, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %41 = xor i32 %38, 123459876 ; <i32> [#uses=1]
+ store i32 %41, i32* @_ZZL13random_doublevE4seed, align 4
+ call void @llvm.dbg.stoppoint(i32 78, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ store double %40, double* %26, align 8
+ call void @llvm.dbg.stoppoint(i32 676, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %n.0.reload5 = load i32* %n.0.reg2mem ; <i32> [#uses=1]
+ %42 = add i32 %n.0.reload5, 1 ; <i32> [#uses=2]
+ store i32 %42, i32* %n.0.reg2mem
+ call void @llvm.dbg.stoppoint(i32 676, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %43 = icmp sgt i32 %42, 524287 ; <i1> [#uses=1]
+ br i1 %43, label %bb9, label %bb7
+
+bb9: ; preds = %bb8
+ call void @llvm.dbg.stoppoint(i32 687, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZNK10polynomialIdEmlERKS0_(%"struct.polynomial<double>"* noalias sret %0, %"struct.polynomial<double>"* %poly1, %"struct.polynomial<double>"* %poly2)
+ to label %invcont10 unwind label %lpad51
+
+invcont10: ; preds = %bb9
+ call void @llvm.dbg.stoppoint(i32 687, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %44 = invoke %"struct.polynomial<double>"* @_ZN10polynomialIdEaSERKS0_(%"struct.polynomial<double>"* %poly3, %"struct.polynomial<double>"* %0)
+ to label %invcont11 unwind label %lpad55 ; <%"struct.polynomial<double>"*> [#uses=0]
+
+invcont11: ; preds = %invcont10
+ call void @llvm.dbg.stoppoint(i32 687, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %0)
+ to label %bb16 unwind label %lpad51
+
+bb16: ; preds = %invcont11
+ call void @llvm.dbg.stoppoint(i32 695, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %toBool = icmp eq i8 %ga_testing.0, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %bb19, label %bb17
+
+bb17: ; preds = %bb16
+ call void @llvm.dbg.stoppoint(i32 696, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %45 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, double 0.000000e+00)
+ to label %bb23 unwind label %lpad51 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+
+bb19: ; preds = %bb16
+ call void @llvm.dbg.stoppoint(i32 698, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %46 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([32 x i8]* @.str1825, i32 0, i32 0))
+ to label %invcont20 unwind label %lpad51 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont20: ; preds = %bb19
+ call void @llvm.dbg.stoppoint(i32 698, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %47 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd(%"struct.std::basic_ostream<char,std::char_traits<char> >"* %46, double 0.000000e+00)
+ to label %invcont21 unwind label %lpad51 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1]
+
+invcont21: ; preds = %invcont20
+ call void @llvm.dbg.stoppoint(i32 698, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %48 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* %47, i8* getelementptr ([3 x i8]* @.str1826, i32 0, i32 0))
+ to label %bb23 unwind label %lpad51 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+
+bb23: ; preds = %invcont21, %bb17
+ call void @llvm.dbg.stoppoint(i32 700, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %49 = invoke %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSo5flushEv(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout)
+ to label %invcont24 unwind label %lpad51 ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+
+invcont24: ; preds = %bb23
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %poly3)
+ to label %bb31 unwind label %lpad47
+
+bb31: ; preds = %invcont24
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %poly2)
+ to label %bb38 unwind label %lpad
+
+bb38: ; preds = %bb31
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %poly1)
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1806 to %0*))
+ ret i32 0
+
+lpad: ; preds = %bb31, %bb5
+ %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select46 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ br label %ppad
+
+lpad47: ; preds = %invcont24, %invcont
+ %eh_ptr48 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select50 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr48, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ br label %ppad75
+
+lpad51: ; preds = %bb23, %invcont21, %invcont20, %bb19, %bb17, %invcont11, %bb9
+ %eh_ptr52 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select54 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr52, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ br label %ppad76
+
+lpad55: ; preds = %invcont10
+ %eh_ptr56 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select58 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr56, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 687, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %0)
+ to label %ppad76 unwind label %lpad59
+
+lpad59: ; preds = %lpad55
+ %eh_ptr60 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select62 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr60, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 687, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+lpad63: ; preds = %ppad76
+ %eh_ptr64 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select66 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr64, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+lpad67: ; preds = %ppad75
+ %eh_ptr68 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select70 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr68, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+lpad71: ; preds = %ppad
+ %eh_ptr72 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select74 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr72, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+ppad: ; preds = %ppad75, %lpad
+ %eh_exception.2 = phi i8* [ %eh_ptr, %lpad ], [ %eh_exception.1, %ppad75 ] ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %poly1)
+ to label %Unwind unwind label %lpad71
+
+ppad75: ; preds = %ppad76, %lpad47
+ %eh_exception.1 = phi i8* [ %eh_ptr48, %lpad47 ], [ %eh_exception.0, %ppad76 ] ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %poly2)
+ to label %ppad unwind label %lpad67
+
+ppad76: ; preds = %lpad55, %lpad51
+ %eh_exception.0 = phi i8* [ %eh_ptr52, %lpad51 ], [ %eh_ptr56, %lpad55 ] ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 702, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %poly3)
+ to label %ppad75 unwind label %lpad63
+
+Unwind: ; preds = %ppad
+ call void @_Unwind_Resume(i8* %eh_exception.2)
+ unreachable
+}
+
+define internal void @_GLOBAL__I_main() {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram657 to %0*))
+ call void @llvm.dbg.stoppoint(i32 77, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit636 to %0*))
+ call void @_ZNSt8ios_base4InitC1Ev(%"struct.std::allocator<char>"* @_ZStL8__ioinit)
+ %0 = call i32 @__cxa_atexit(void (i8*)* @__tcf_0, i8* null, i8* bitcast (i8** @__dso_handle to i8*)) nounwind ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 400, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %1 = load i8* bitcast (i64* @_ZGVN10polynomialIdE4PI2IE to i8*), align 8 ; <i8> [#uses=1]
+ %2 = icmp eq i8 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %bb2.i, label %_Z41__static_initialization_and_destruction_0ii.exit
+
+bb2.i: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 400, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ store i8 1, i8* bitcast (i64* @_ZGVN10polynomialIdE4PI2IE to i8*), align 8
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* @_ZN10polynomialIdE4PI2IE, double 0.000000e+00, double 0x401921FB54442D18) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram657 to %0*))
+ ret void
+
+_Z41__static_initialization_and_destruction_0ii.exit: ; preds = %entry
+ ret void
+}
+
+define linkonce void @_ZNSt7complexIdEC1ECd(%"struct.std::complex<double>"* %this, %1 %__z) nounwind {
+entry:
+ %__z_addr = alloca %1, align 8 ; <%1*> [#uses=4]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram227 to %0*))
+ %0 = bitcast %1* %__z_addr to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %0, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable231 to %0*))
+ store %1 %__z, %1* %__z_addr, align 8
+ call void @llvm.dbg.stoppoint(i32 1161, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %1 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %2 = getelementptr %1* %__z_addr, i32 0, i32 0 ; <double*> [#uses=1]
+ %3 = load double* %2, align 8 ; <double> [#uses=1]
+ store double %3, double* %1, align 4
+ %4 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %5 = getelementptr %1* %__z_addr, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = load double* %5, align 8 ; <double> [#uses=1]
+ store double %6, double* %4, align 4
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram227 to %0*))
+ ret void
+}
+
+declare void @llvm.dbg.func.start(%0*) nounwind readnone
+
+declare void @llvm.dbg.declare(%0*, %0*) nounwind readnone
+
+declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind readnone
+
+declare void @llvm.dbg.region.end(%0*) nounwind readnone
+
+define linkonce %1* @_ZNKSt7complexIdE5__repEv(%"struct.std::complex<double>"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram232 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1192, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0 ; <%1*> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram232 to %0*))
+ ret %1* %0
+}
+
+define linkonce double* @_ZNSt7complexIdE4realEv(%"struct.std::complex<double>"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram235 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1200, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram235 to %0*))
+ ret double* %0
+}
+
+define linkonce double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram237 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1204, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram237 to %0*))
+ ret double* %0
+}
+
+define linkonce double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram239 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1212, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram239 to %0*))
+ ret double* %0
+}
+
+define linkonce void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %this, double %__r, double %__i) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram242 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1217, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %__r, double* %0, align 4
+ call void @llvm.dbg.stoppoint(i32 1218, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %1 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %__i, double* %1, align 4
+ call void @llvm.dbg.stoppoint(i32 1219, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram242 to %0*))
+ ret void
+}
+
+define linkonce %"struct.std::complex<double>"* @_ZNSt7complexIdEaSEd(%"struct.std::complex<double>"* %this, double %__d) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram248 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1224, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %__d, double* %0, align 4
+ call void @llvm.dbg.stoppoint(i32 1225, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %1 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %1, align 4
+ call void @llvm.dbg.stoppoint(i32 1226, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram248 to %0*))
+ ret %"struct.std::complex<double>"* %this
+}
+
+define linkonce %"struct.std::complex<double>"* @_ZNSt7complexIdEdVEd(%"struct.std::complex<double>"* %this, double %__d) nounwind {
+entry:
+ %0 = alloca %1, align 8 ; <%1*> [#uses=4]
+ %1 = alloca %1, align 8 ; <%1*> [#uses=4]
+ %2 = alloca %1, align 8 ; <%1*> [#uses=4]
+ %memtmp = alloca %1, align 8 ; <%1*> [#uses=4]
+ %memtmp1 = alloca %1, align 8 ; <%1*> [#uses=4]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram252 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1253, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %3 = getelementptr %1* %2, i32 0, i32 0 ; <double*> [#uses=1]
+ %4 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %5 = load double* %4, align 4 ; <double> [#uses=1]
+ store double %5, double* %3, align 8
+ %6 = getelementptr %1* %2, i32 0, i32 1 ; <double*> [#uses=1]
+ %7 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %8 = load double* %7, align 4 ; <double> [#uses=1]
+ store double %8, double* %6, align 8
+ %real = getelementptr %1* %1, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %__d, double* %real, align 8
+ %imag = getelementptr %1* %1, i32 0, i32 1 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %imag, align 8
+ %9 = getelementptr %1* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %10 = getelementptr %1* %2, i32 0, i32 0 ; <double*> [#uses=1]
+ %11 = load double* %10, align 8 ; <double> [#uses=1]
+ store double %11, double* %9, align 8
+ %12 = getelementptr %1* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %13 = getelementptr %1* %2, i32 0, i32 1 ; <double*> [#uses=1]
+ %14 = load double* %13, align 8 ; <double> [#uses=1]
+ store double %14, double* %12, align 8
+ %15 = getelementptr %1* %memtmp1, i32 0, i32 0 ; <double*> [#uses=1]
+ %16 = getelementptr %1* %1, i32 0, i32 0 ; <double*> [#uses=1]
+ %17 = load double* %16, align 8 ; <double> [#uses=1]
+ store double %17, double* %15, align 8
+ %18 = getelementptr %1* %memtmp1, i32 0, i32 1 ; <double*> [#uses=1]
+ %19 = getelementptr %1* %1, i32 0, i32 1 ; <double*> [#uses=1]
+ %20 = load double* %19, align 8 ; <double> [#uses=1]
+ store double %20, double* %18, align 8
+ %real2 = getelementptr %1* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %real3 = load double* %real2, align 8 ; <double> [#uses=2]
+ %imag4 = getelementptr %1* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %imag5 = load double* %imag4, align 8 ; <double> [#uses=2]
+ %real6 = getelementptr %1* %memtmp1, i32 0, i32 0 ; <double*> [#uses=1]
+ %real7 = load double* %real6, align 8 ; <double> [#uses=4]
+ %imag8 = getelementptr %1* %memtmp1, i32 0, i32 1 ; <double*> [#uses=1]
+ %imag9 = load double* %imag8, align 8 ; <double> [#uses=4]
+ %21 = fmul double %real3, %real7 ; <double> [#uses=1]
+ %22 = fmul double %imag5, %imag9 ; <double> [#uses=1]
+ %23 = fadd double %21, %22 ; <double> [#uses=1]
+ %24 = fmul double %real7, %real7 ; <double> [#uses=1]
+ %25 = fmul double %imag9, %imag9 ; <double> [#uses=1]
+ %26 = fadd double %24, %25 ; <double> [#uses=2]
+ %27 = fdiv double %23, %26 ; <double> [#uses=1]
+ %28 = fmul double %imag5, %real7 ; <double> [#uses=1]
+ %29 = fmul double %real3, %imag9 ; <double> [#uses=1]
+ %30 = fsub double %28, %29 ; <double> [#uses=1]
+ %31 = fdiv double %30, %26 ; <double> [#uses=1]
+ %real10 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %27, double* %real10, align 8
+ %imag11 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %31, double* %imag11, align 8
+ %32 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %33 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ %34 = load double* %33, align 8 ; <double> [#uses=1]
+ store double %34, double* %32, align 4
+ %35 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %36 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ %37 = load double* %36, align 8 ; <double> [#uses=1]
+ store double %37, double* %35, align 4
+ call void @llvm.dbg.stoppoint(i32 1254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram252 to %0*))
+ ret %"struct.std::complex<double>"* %this
+}
+
+define linkonce double* @_ZN10polynomialIdEixEj(%"struct.polynomial<double>"* %this, i32 %term) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram522 to %0*))
+ call void @llvm.dbg.stoppoint(i32 308, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ %1 = load double** %0, align 4 ; <double*> [#uses=1]
+ %2 = getelementptr double* %1, i32 %term ; <double*> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram522 to %0*))
+ ret double* %2
+}
+
+define linkonce i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram527 to %0*))
+ call void @llvm.dbg.stoppoint(i32 113, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram527 to %0*))
+ ret i32 %1
+}
+
+define linkonce %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %this, i32 %term) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram530 to %0*))
+ call void @llvm.dbg.stoppoint(i32 308, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 1 ; <%"struct.std::complex<double>"**> [#uses=1]
+ %1 = load %"struct.std::complex<double>"** %0, align 4 ; <%"struct.std::complex<double>"*> [#uses=1]
+ %2 = getelementptr %"struct.std::complex<double>"* %1, i32 %term ; <%"struct.std::complex<double>"*> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram530 to %0*))
+ ret %"struct.std::complex<double>"* %2
+}
+
+define linkonce %"struct.std::complex<double>"* @_ZNSt7complexIdEmLIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %this, %"struct.std::complex<double>"* %__z) nounwind {
+entry:
+ %__t = alloca %1, align 8 ; <%1*> [#uses=7]
+ %0 = alloca %1, align 8 ; <%1*> [#uses=4]
+ %1 = alloca %1, align 8 ; <%1*> [#uses=4]
+ %memtmp = alloca %1, align 8 ; <%1*> [#uses=4]
+ %memtmp3 = alloca %1, align 8 ; <%1*> [#uses=4]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram538 to %0*))
+ %2 = bitcast %1* %__t to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %2, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable542 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1289, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %3 = call double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %__z) nounwind ; <double*> [#uses=1]
+ %4 = load double* %3, align 8 ; <double> [#uses=1]
+ %5 = getelementptr %1* %__t, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = load double* %5, align 8 ; <double> [#uses=1]
+ %real = getelementptr %1* %__t, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %4, double* %real, align 8
+ %imag = getelementptr %1* %__t, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %6, double* %imag, align 8
+ call void @llvm.dbg.stoppoint(i32 1290, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %7 = call double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %__z) nounwind ; <double*> [#uses=1]
+ %8 = load double* %7, align 8 ; <double> [#uses=1]
+ %imag2 = getelementptr %1* %__t, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %8, double* %imag2, align 8
+ call void @llvm.dbg.stoppoint(i32 1291, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %9 = getelementptr %1* %1, i32 0, i32 0 ; <double*> [#uses=1]
+ %10 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %11 = load double* %10, align 4 ; <double> [#uses=1]
+ store double %11, double* %9, align 8
+ %12 = getelementptr %1* %1, i32 0, i32 1 ; <double*> [#uses=1]
+ %13 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %14 = load double* %13, align 4 ; <double> [#uses=1]
+ store double %14, double* %12, align 8
+ %15 = getelementptr %1* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %16 = getelementptr %1* %1, i32 0, i32 0 ; <double*> [#uses=1]
+ %17 = load double* %16, align 8 ; <double> [#uses=1]
+ store double %17, double* %15, align 8
+ %18 = getelementptr %1* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %19 = getelementptr %1* %1, i32 0, i32 1 ; <double*> [#uses=1]
+ %20 = load double* %19, align 8 ; <double> [#uses=1]
+ store double %20, double* %18, align 8
+ %21 = getelementptr %1* %memtmp3, i32 0, i32 0 ; <double*> [#uses=1]
+ %22 = getelementptr %1* %__t, i32 0, i32 0 ; <double*> [#uses=1]
+ %23 = load double* %22, align 8 ; <double> [#uses=1]
+ store double %23, double* %21, align 8
+ %24 = getelementptr %1* %memtmp3, i32 0, i32 1 ; <double*> [#uses=1]
+ %25 = getelementptr %1* %__t, i32 0, i32 1 ; <double*> [#uses=1]
+ %26 = load double* %25, align 8 ; <double> [#uses=1]
+ store double %26, double* %24, align 8
+ %real4 = getelementptr %1* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %real5 = load double* %real4, align 8 ; <double> [#uses=2]
+ %imag6 = getelementptr %1* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %imag7 = load double* %imag6, align 8 ; <double> [#uses=2]
+ %real8 = getelementptr %1* %memtmp3, i32 0, i32 0 ; <double*> [#uses=1]
+ %real9 = load double* %real8, align 8 ; <double> [#uses=2]
+ %imag10 = getelementptr %1* %memtmp3, i32 0, i32 1 ; <double*> [#uses=1]
+ %imag11 = load double* %imag10, align 8 ; <double> [#uses=2]
+ %27 = fmul double %real5, %real9 ; <double> [#uses=1]
+ %28 = fmul double %imag7, %imag11 ; <double> [#uses=1]
+ %29 = fsub double %27, %28 ; <double> [#uses=1]
+ %30 = fmul double %real5, %imag11 ; <double> [#uses=1]
+ %31 = fmul double %real9, %imag7 ; <double> [#uses=1]
+ %32 = fadd double %30, %31 ; <double> [#uses=1]
+ %real12 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %29, double* %real12, align 8
+ %imag13 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %32, double* %imag13, align 8
+ %33 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %34 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ %35 = load double* %34, align 8 ; <double> [#uses=1]
+ store double %35, double* %33, align 4
+ %36 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %37 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ %38 = load double* %37, align 8 ; <double> [#uses=1]
+ store double %38, double* %36, align 4
+ call void @llvm.dbg.stoppoint(i32 1292, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram538 to %0*))
+ ret %"struct.std::complex<double>"* %this
+}
+
+define linkonce void @_ZN10polynomialIdE9deep_copyEPKd(%"struct.polynomial<double>"* %this, double* %source) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram543 to %0*))
+ call void @llvm.dbg.stoppoint(i32 197, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb1
+
+bb: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 198, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ %1 = load double** %0, align 4 ; <double*> [#uses=1]
+ %2 = getelementptr double* %source, i32 %n.0 ; <double*> [#uses=1]
+ %3 = load double* %2, align 1 ; <double> [#uses=1]
+ %4 = getelementptr double* %1, i32 %n.0 ; <double*> [#uses=1]
+ store double %3, double* %4, align 1
+ call void @llvm.dbg.stoppoint(i32 197, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %5 = add i32 %n.0, 1 ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %n.0 = phi i32 [ 0, %entry ], [ %5, %bb ] ; <i32> [#uses=4]
+ call void @llvm.dbg.stoppoint(i32 197, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %6 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ %8 = icmp ugt i32 %7, %n.0 ; <i1> [#uses=1]
+ br i1 %8, label %bb, label %return
+
+return: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 198, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram543 to %0*))
+ ret void
+}
+
+define linkonce i32 @_ZN10polynomialIdE4log2Ej(i32 %n) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram549 to %0*))
+ call void @llvm.dbg.stoppoint(i32 407, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb1
+
+bb: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 411, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = add i32 %c.0, 1 ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 412, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %1 = shl i32 %x.0, 1 ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 414, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb1
+
+bb1: ; preds = %bb, %entry
+ %c.0 = phi i32 [ 0, %entry ], [ %0, %bb ] ; <i32> [#uses=2]
+ %x.0 = phi i32 [ 1, %entry ], [ %1, %bb ] ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 409, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %3 = icmp ult i32 %x.0, %n ; <i1> [#uses=1]
+ br i1 %3, label %bb, label %return
+
+return: ; preds = %bb1, %bb
+ %c.1 = phi i32 [ %c.0, %bb1 ], [ %0, %bb ] ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 418, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram549 to %0*))
+ ret i32 %c.1
+}
+
+define linkonce void @_ZStmlIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %agg.result, %"struct.std::complex<double>"* %__x, %"struct.std::complex<double>"* %__y) nounwind {
+entry:
+ %__r = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=1]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram559 to %0*))
+ %0 = bitcast %"struct.std::complex<double>"* %__r to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %0, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable564 to %0*))
+ call void @llvm.dbg.stoppoint(i32 380, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %1 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %2 = getelementptr %"struct.std::complex<double>"* %__x, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %3 = load double* %2, align 4 ; <double> [#uses=1]
+ store double %3, double* %1, align 4
+ %4 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %5 = getelementptr %"struct.std::complex<double>"* %__x, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = load double* %5, align 4 ; <double> [#uses=1]
+ store double %6, double* %4, align 4
+ call void @llvm.dbg.stoppoint(i32 381, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %7 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEmLIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %agg.result, %"struct.std::complex<double>"* %__y) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram559 to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialISt7complexIdEE9deep_copyEPKS1_(%"struct.polynomial<std::complex<double> >"* %this, %"struct.std::complex<double>"* %source) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram565 to %0*))
+ call void @llvm.dbg.stoppoint(i32 197, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb1
+
+bb: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 198, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 1 ; <%"struct.std::complex<double>"**> [#uses=1]
+ %1 = load %"struct.std::complex<double>"** %0, align 4 ; <%"struct.std::complex<double>"*> [#uses=2]
+ %2 = getelementptr %"struct.std::complex<double>"* %1, i32 %n.0, i32 0, i32 0 ; <double*> [#uses=1]
+ %3 = getelementptr %"struct.std::complex<double>"* %source, i32 %n.0, i32 0, i32 0 ; <double*> [#uses=1]
+ %4 = load double* %3, align 1 ; <double> [#uses=1]
+ store double %4, double* %2, align 1
+ %5 = getelementptr %"struct.std::complex<double>"* %1, i32 %n.0, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = getelementptr %"struct.std::complex<double>"* %source, i32 %n.0, i32 0, i32 1 ; <double*> [#uses=1]
+ %7 = load double* %6, align 1 ; <double> [#uses=1]
+ store double %7, double* %5, align 1
+ call void @llvm.dbg.stoppoint(i32 197, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %8 = add i32 %n.0, 1 ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %n.0 = phi i32 [ 0, %entry ], [ %8, %bb ] ; <i32> [#uses=6]
+ call void @llvm.dbg.stoppoint(i32 197, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %9 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 4 ; <i32> [#uses=1]
+ %11 = icmp ugt i32 %10, %n.0 ; <i1> [#uses=1]
+ br i1 %11, label %bb, label %return
+
+return: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 198, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram565 to %0*))
+ ret void
+}
+
+define linkonce i32 @_ZNK10polynomialISt7complexIdEE6degreeEv(%"struct.polynomial<std::complex<double> >"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram569 to %0*))
+ call void @llvm.dbg.stoppoint(i32 113, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram569 to %0*))
+ ret i32 %1
+}
+
+define linkonce void @_ZStngIdESt7complexIT_ERKS2_(%"struct.std::complex<double>"* noalias sret %agg.result, %"struct.std::complex<double>"* %__x) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram576 to %0*))
+ call void @llvm.dbg.stoppoint(i32 444, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = call double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %__x) nounwind ; <double*> [#uses=1]
+ %1 = load double* %0, align 8 ; <double> [#uses=1]
+ %2 = fsub double -0.000000e+00, %1 ; <double> [#uses=1]
+ %3 = call double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %__x) nounwind ; <double*> [#uses=1]
+ %4 = load double* %3, align 8 ; <double> [#uses=1]
+ %5 = fsub double -0.000000e+00, %4 ; <double> [#uses=1]
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %agg.result, double %5, double %2) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram576 to %0*))
+ ret void
+}
+
+define linkonce double @_ZNK10polynomialIdE3getEj(%"struct.polynomial<double>"* %this, i32 %term) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram578 to %0*))
+ call void @llvm.dbg.stoppoint(i32 302, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ %1 = load double** %0, align 4 ; <double*> [#uses=1]
+ %2 = getelementptr double* %1, i32 %term ; <double*> [#uses=1]
+ %3 = load double* %2, align 1 ; <double> [#uses=1]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram578 to %0*))
+ ret double %3
+}
+
+define linkonce i32 @_ZN10polynomialIdE9flip_bitsEjj(i32 %k, i32 %bits) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram581 to %0*))
+ call void @llvm.dbg.stoppoint(i32 425, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = add i32 %bits, -1 ; <i32> [#uses=1]
+ %1 = shl i32 1, %0 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 427, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb3
+
+bb: ; preds = %bb3
+ call void @llvm.dbg.stoppoint(i32 431, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %2 = and i32 %rm.0, %k ; <i32> [#uses=1]
+ %3 = icmp ne i32 %2, 0 ; <i1> [#uses=1]
+ %4 = select i1 %3, i32 %lm.0, i32 0 ; <i32> [#uses=1]
+ %.r.1 = or i32 %r.1, %4 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 434, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %5 = lshr i32 %lm.0, 1 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 435, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %6 = shl i32 %rm.0, 1 ; <i32> [#uses=1]
+ br label %bb3
+
+bb3: ; preds = %bb, %entry
+ %r.1 = phi i32 [ 0, %entry ], [ %.r.1, %bb ] ; <i32> [#uses=2]
+ %rm.0 = phi i32 [ 1, %entry ], [ %6, %bb ] ; <i32> [#uses=2]
+ %lm.0 = phi i32 [ %1, %entry ], [ %5, %bb ] ; <i32> [#uses=3]
+ call void @llvm.dbg.stoppoint(i32 429, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %7 = icmp eq i32 %lm.0, 0 ; <i1> [#uses=1]
+ br i1 %7, label %return, label %bb
+
+return: ; preds = %bb3
+ call void @llvm.dbg.stoppoint(i32 438, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram581 to %0*))
+ ret i32 %r.1
+}
+
+define linkonce %"struct.std::complex<double>"* @_ZNSt7complexIdEdVIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %this, %"struct.std::complex<double>"* %__z) nounwind {
+entry:
+ %__t = alloca %1, align 8 ; <%1*> [#uses=7]
+ %0 = alloca %1, align 8 ; <%1*> [#uses=4]
+ %1 = alloca %1, align 8 ; <%1*> [#uses=4]
+ %memtmp = alloca %1, align 8 ; <%1*> [#uses=4]
+ %memtmp3 = alloca %1, align 8 ; <%1*> [#uses=4]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram593 to %0*))
+ %2 = bitcast %1* %__t to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %2, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable596 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1300, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %3 = call double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %__z) nounwind ; <double*> [#uses=1]
+ %4 = load double* %3, align 8 ; <double> [#uses=1]
+ %5 = getelementptr %1* %__t, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = load double* %5, align 8 ; <double> [#uses=1]
+ %real = getelementptr %1* %__t, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %4, double* %real, align 8
+ %imag = getelementptr %1* %__t, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %6, double* %imag, align 8
+ call void @llvm.dbg.stoppoint(i32 1301, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %7 = call double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %__z) nounwind ; <double*> [#uses=1]
+ %8 = load double* %7, align 8 ; <double> [#uses=1]
+ %imag2 = getelementptr %1* %__t, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %8, double* %imag2, align 8
+ call void @llvm.dbg.stoppoint(i32 1302, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %9 = getelementptr %1* %1, i32 0, i32 0 ; <double*> [#uses=1]
+ %10 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %11 = load double* %10, align 4 ; <double> [#uses=1]
+ store double %11, double* %9, align 8
+ %12 = getelementptr %1* %1, i32 0, i32 1 ; <double*> [#uses=1]
+ %13 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %14 = load double* %13, align 4 ; <double> [#uses=1]
+ store double %14, double* %12, align 8
+ %15 = getelementptr %1* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %16 = getelementptr %1* %1, i32 0, i32 0 ; <double*> [#uses=1]
+ %17 = load double* %16, align 8 ; <double> [#uses=1]
+ store double %17, double* %15, align 8
+ %18 = getelementptr %1* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %19 = getelementptr %1* %1, i32 0, i32 1 ; <double*> [#uses=1]
+ %20 = load double* %19, align 8 ; <double> [#uses=1]
+ store double %20, double* %18, align 8
+ %21 = getelementptr %1* %memtmp3, i32 0, i32 0 ; <double*> [#uses=1]
+ %22 = getelementptr %1* %__t, i32 0, i32 0 ; <double*> [#uses=1]
+ %23 = load double* %22, align 8 ; <double> [#uses=1]
+ store double %23, double* %21, align 8
+ %24 = getelementptr %1* %memtmp3, i32 0, i32 1 ; <double*> [#uses=1]
+ %25 = getelementptr %1* %__t, i32 0, i32 1 ; <double*> [#uses=1]
+ %26 = load double* %25, align 8 ; <double> [#uses=1]
+ store double %26, double* %24, align 8
+ %real4 = getelementptr %1* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %real5 = load double* %real4, align 8 ; <double> [#uses=2]
+ %imag6 = getelementptr %1* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %imag7 = load double* %imag6, align 8 ; <double> [#uses=2]
+ %real8 = getelementptr %1* %memtmp3, i32 0, i32 0 ; <double*> [#uses=1]
+ %real9 = load double* %real8, align 8 ; <double> [#uses=4]
+ %imag10 = getelementptr %1* %memtmp3, i32 0, i32 1 ; <double*> [#uses=1]
+ %imag11 = load double* %imag10, align 8 ; <double> [#uses=4]
+ %27 = fmul double %real5, %real9 ; <double> [#uses=1]
+ %28 = fmul double %imag7, %imag11 ; <double> [#uses=1]
+ %29 = fadd double %27, %28 ; <double> [#uses=1]
+ %30 = fmul double %real9, %real9 ; <double> [#uses=1]
+ %31 = fmul double %imag11, %imag11 ; <double> [#uses=1]
+ %32 = fadd double %30, %31 ; <double> [#uses=2]
+ %33 = fdiv double %29, %32 ; <double> [#uses=1]
+ %34 = fmul double %imag7, %real9 ; <double> [#uses=1]
+ %35 = fmul double %real5, %imag11 ; <double> [#uses=1]
+ %36 = fsub double %34, %35 ; <double> [#uses=1]
+ %37 = fdiv double %36, %32 ; <double> [#uses=1]
+ %real12 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %33, double* %real12, align 8
+ %imag13 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %37, double* %imag13, align 8
+ %38 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %39 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ %40 = load double* %39, align 8 ; <double> [#uses=1]
+ store double %40, double* %38, align 4
+ %41 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %42 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ %43 = load double* %42, align 8 ; <double> [#uses=1]
+ store double %43, double* %41, align 4
+ call void @llvm.dbg.stoppoint(i32 1303, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram593 to %0*))
+ ret %"struct.std::complex<double>"* %this
+}
+
+define linkonce void @_ZStdvIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %agg.result, %"struct.std::complex<double>"* %__x, %"struct.std::complex<double>"* %__y) {
+entry:
+ %__r = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=1]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram599 to %0*))
+ %0 = bitcast %"struct.std::complex<double>"* %__r to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %0, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable602 to %0*))
+ call void @llvm.dbg.stoppoint(i32 410, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %1 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %2 = getelementptr %"struct.std::complex<double>"* %__x, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %3 = load double* %2, align 4 ; <double> [#uses=1]
+ store double %3, double* %1, align 4
+ %4 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %5 = getelementptr %"struct.std::complex<double>"* %__x, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = load double* %5, align 4 ; <double> [#uses=1]
+ store double %6, double* %4, align 4
+ call void @llvm.dbg.stoppoint(i32 411, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %7 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEdVIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %agg.result, %"struct.std::complex<double>"* %__y) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram599 to %0*))
+ ret void
+}
+
+define linkonce %"struct.std::complex<double>"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %this, %"struct.std::complex<double>"* %__z) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram605 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1270, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %1 = load double* %0, align 4 ; <double> [#uses=1]
+ %2 = call double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %__z) nounwind ; <double*> [#uses=1]
+ %3 = load double* %2, align 8 ; <double> [#uses=1]
+ %4 = fadd double %1, %3 ; <double> [#uses=1]
+ %5 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %4, double* %5, align 4
+ call void @llvm.dbg.stoppoint(i32 1271, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %6 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %7 = load double* %6, align 4 ; <double> [#uses=1]
+ %8 = call double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %__z) nounwind ; <double*> [#uses=1]
+ %9 = load double* %8, align 8 ; <double> [#uses=1]
+ %10 = fadd double %7, %9 ; <double> [#uses=1]
+ %11 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %10, double* %11, align 4
+ call void @llvm.dbg.stoppoint(i32 1272, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram605 to %0*))
+ ret %"struct.std::complex<double>"* %this
+}
+
+define linkonce void @_ZStplIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %agg.result, %"struct.std::complex<double>"* %__x, %"struct.std::complex<double>"* %__y) {
+entry:
+ %__r = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=1]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram610 to %0*))
+ %0 = bitcast %"struct.std::complex<double>"* %__r to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %0, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable613 to %0*))
+ call void @llvm.dbg.stoppoint(i32 320, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %1 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %2 = getelementptr %"struct.std::complex<double>"* %__x, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %3 = load double* %2, align 4 ; <double> [#uses=1]
+ store double %3, double* %1, align 4
+ %4 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %5 = getelementptr %"struct.std::complex<double>"* %__x, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = load double* %5, align 4 ; <double> [#uses=1]
+ store double %6, double* %4, align 4
+ call void @llvm.dbg.stoppoint(i32 321, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %7 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %agg.result, %"struct.std::complex<double>"* %__y) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram610 to %0*))
+ ret void
+}
+
+define linkonce %"struct.std::complex<double>"* @_ZNSt7complexIdEmIIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %this, %"struct.std::complex<double>"* %__z) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram616 to %0*))
+ call void @llvm.dbg.stoppoint(i32 1279, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %0 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %1 = load double* %0, align 4 ; <double> [#uses=1]
+ %2 = call double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %__z) nounwind ; <double*> [#uses=1]
+ %3 = load double* %2, align 8 ; <double> [#uses=1]
+ %4 = fsub double %1, %3 ; <double> [#uses=1]
+ %5 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %4, double* %5, align 4
+ call void @llvm.dbg.stoppoint(i32 1280, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %6 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %7 = load double* %6, align 4 ; <double> [#uses=1]
+ %8 = call double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %__z) nounwind ; <double*> [#uses=1]
+ %9 = load double* %8, align 8 ; <double> [#uses=1]
+ %10 = fsub double %7, %9 ; <double> [#uses=1]
+ %11 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %10, double* %11, align 4
+ call void @llvm.dbg.stoppoint(i32 1281, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram616 to %0*))
+ ret %"struct.std::complex<double>"* %this
+}
+
+define linkonce void @_ZStmiIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %agg.result, %"struct.std::complex<double>"* %__x, %"struct.std::complex<double>"* %__y) {
+entry:
+ %__r = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=1]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram620 to %0*))
+ %0 = bitcast %"struct.std::complex<double>"* %__r to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %0, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable623 to %0*))
+ call void @llvm.dbg.stoppoint(i32 350, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %1 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %2 = getelementptr %"struct.std::complex<double>"* %__x, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %3 = load double* %2, align 4 ; <double> [#uses=1]
+ store double %3, double* %1, align 4
+ %4 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %5 = getelementptr %"struct.std::complex<double>"* %__x, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = load double* %5, align 4 ; <double> [#uses=1]
+ store double %6, double* %4, align 4
+ call void @llvm.dbg.stoppoint(i32 351, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %7 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEmIIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %agg.result, %"struct.std::complex<double>"* %__y) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram620 to %0*))
+ ret void
+}
+
+define linkonce void @_ZNK10polynomialISt7complexIdEE3getEj(%"struct.std::complex<double>"* noalias sret %agg.result, %"struct.polynomial<std::complex<double> >"* %this, i32 %term) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram624 to %0*))
+ call void @llvm.dbg.stoppoint(i32 302, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 1 ; <%"struct.std::complex<double>"**> [#uses=1]
+ %1 = load %"struct.std::complex<double>"** %0, align 4 ; <%"struct.std::complex<double>"*> [#uses=2]
+ %2 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %3 = getelementptr %"struct.std::complex<double>"* %1, i32 %term, i32 0, i32 0 ; <double*> [#uses=1]
+ %4 = load double* %3, align 1 ; <double> [#uses=1]
+ store double %4, double* %2, align 1
+ %5 = getelementptr %"struct.std::complex<double>"* %agg.result, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = getelementptr %"struct.std::complex<double>"* %1, i32 %term, i32 0, i32 1 ; <double*> [#uses=1]
+ %7 = load double* %6, align 1 ; <double> [#uses=1]
+ store double %7, double* %5, align 1
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram624 to %0*))
+ ret void
+}
+
+declare void @_ZNSt8ios_base4InitC1Ev(%"struct.std::allocator<char>"*)
+
+declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) nounwind
+
+define internal void @__tcf_0(i8* nocapture %unnamed_arg) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram662 to %0*))
+ call void @llvm.dbg.stoppoint(i32 77, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit636 to %0*))
+ call void @_ZNSt8ios_base4InitD1Ev(%"struct.std::allocator<char>"* @_ZStL8__ioinit)
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram662 to %0*))
+ ret void
+}
+
+declare void @_ZNSt8ios_base4InitD1Ev(%"struct.std::allocator<char>"*)
+
+define linkonce void @_ZN10polynomialIdE7releaseEv(%"struct.polynomial<double>"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram665 to %0*))
+ call void @llvm.dbg.stoppoint(i32 190, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ %1 = load double** %0, align 4 ; <double*> [#uses=1]
+ %2 = icmp eq double* %1, null ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb
+
+bb: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 190, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %3 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ %4 = load double** %3, align 4 ; <double*> [#uses=1]
+ %5 = bitcast double* %4 to i8* ; <i8*> [#uses=1]
+ call void @_ZdaPv(i8* %5) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram665 to %0*))
+ ret void
+
+return: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 190, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ ret void
+}
+
+declare void @_ZdaPv(i8*) nounwind
+
+define linkonce void @_ZN10polynomialIdED0Ev(%"struct.polynomial<double>"* %this) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram668 to %0*))
+ call void @llvm.dbg.stoppoint(i32 255, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @_ZTV10polynomialIdE, i32 0, i32 2), i32 (...)*** %0, align 4
+ call void @llvm.dbg.stoppoint(i32 254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE7releaseEv(%"struct.polynomial<double>"* %this) nounwind
+ call void @llvm.dbg.stoppoint(i32 254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %1 = bitcast %"struct.polynomial<double>"* %this to i8* ; <i8*> [#uses=1]
+ call void @_ZdlPv(i8* %1) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram668 to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %this) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram691 to %0*))
+ call void @llvm.dbg.stoppoint(i32 255, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @_ZTV10polynomialIdE, i32 0, i32 2), i32 (...)*** %0, align 4
+ call void @llvm.dbg.stoppoint(i32 254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE7releaseEv(%"struct.polynomial<double>"* %this) nounwind
+ call void @llvm.dbg.stoppoint(i32 254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ ret void
+}
+
+declare void @_ZdlPv(i8*) nounwind
+
+define linkonce void @_ZN10polynomialISt7complexIdEE7releaseEv(%"struct.polynomial<std::complex<double> >"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram693 to %0*))
+ call void @llvm.dbg.stoppoint(i32 190, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 1 ; <%"struct.std::complex<double>"**> [#uses=1]
+ %1 = load %"struct.std::complex<double>"** %0, align 4 ; <%"struct.std::complex<double>"*> [#uses=1]
+ %2 = icmp eq %"struct.std::complex<double>"* %1, null ; <i1> [#uses=1]
+ br i1 %2, label %return, label %bb
+
+bb: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 190, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %3 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 1 ; <%"struct.std::complex<double>"**> [#uses=1]
+ %4 = load %"struct.std::complex<double>"** %3, align 4 ; <%"struct.std::complex<double>"*> [#uses=1]
+ %5 = bitcast %"struct.std::complex<double>"* %4 to i8* ; <i8*> [#uses=1]
+ call void @_ZdaPv(i8* %5) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram693 to %0*))
+ ret void
+
+return: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 190, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialISt7complexIdEED0Ev(%"struct.polynomial<std::complex<double> >"* %this) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram696 to %0*))
+ call void @llvm.dbg.stoppoint(i32 255, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @_ZTV10polynomialISt7complexIdEE, i32 0, i32 2), i32 (...)*** %0, align 4
+ call void @llvm.dbg.stoppoint(i32 254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialISt7complexIdEE7releaseEv(%"struct.polynomial<std::complex<double> >"* %this) nounwind
+ call void @llvm.dbg.stoppoint(i32 254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %1 = bitcast %"struct.polynomial<std::complex<double> >"* %this to i8* ; <i8*> [#uses=1]
+ call void @_ZdlPv(i8* %1) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram696 to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %this) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram708 to %0*))
+ call void @llvm.dbg.stoppoint(i32 255, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @_ZTV10polynomialISt7complexIdEE, i32 0, i32 2), i32 (...)*** %0, align 4
+ call void @llvm.dbg.stoppoint(i32 254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialISt7complexIdEE7releaseEv(%"struct.polynomial<std::complex<double> >"* %this) nounwind
+ call void @llvm.dbg.stoppoint(i32 254, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialIdE7acquireEv(%"struct.polynomial<double>"* %this) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram710 to %0*))
+ call void @llvm.dbg.stoppoint(i32 183, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %2 = shl i32 %1, 3 ; <i32> [#uses=1]
+ %3 = call i8* @_Znaj(i32 %2) ; <i8*> [#uses=1]
+ %4 = bitcast i8* %3 to double* ; <double*> [#uses=1]
+ %5 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ store double* %4, double** %5, align 4
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram710 to %0*))
+ ret void
+}
+
+declare i8* @_Znaj(i32)
+
+define linkonce void @_ZN10polynomialIdEC1Ej(%"struct.polynomial<double>"* %this, i32 %degree) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram713 to %0*))
+ call void @llvm.dbg.stoppoint(i32 213, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @_ZTV10polynomialIdE, i32 0, i32 2), i32 (...)*** %0, align 4
+ %1 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ store double* null, double** %1, align 4
+ %2 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %degree, i32* %2, align 4
+ call void @llvm.dbg.stoppoint(i32 215, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE7acquireEv(%"struct.polynomial<double>"* %this)
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram713 to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialIdEC1ERKS0_(%"struct.polynomial<double>"* %this, %"struct.polynomial<double>"* %source) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram717 to %0*))
+ call void @llvm.dbg.stoppoint(i32 244, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @_ZTV10polynomialIdE, i32 0, i32 2), i32 (...)*** %0, align 4
+ %1 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ store double* null, double** %1, align 4
+ %2 = getelementptr %"struct.polynomial<double>"* %source, i32 0, i32 2 ; <i32*> [#uses=1]
+ %3 = load i32* %2, align 4 ; <i32> [#uses=1]
+ %4 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %3, i32* %4, align 4
+ call void @llvm.dbg.stoppoint(i32 246, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE7acquireEv(%"struct.polynomial<double>"* %this)
+ call void @llvm.dbg.stoppoint(i32 247, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %5 = getelementptr %"struct.polynomial<double>"* %source, i32 0, i32 1 ; <double**> [#uses=1]
+ %6 = load double** %5, align 4 ; <double*> [#uses=1]
+ call void @_ZN10polynomialIdE9deep_copyEPKd(%"struct.polynomial<double>"* %this, double* %6) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram717 to %0*))
+ ret void
+}
+
+define linkonce %"struct.polynomial<double>"* @_ZN10polynomialIdE7stretchEj(%"struct.polynomial<double>"* %this, i32 %degrees) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram720 to %0*))
+ call void @llvm.dbg.stoppoint(i32 278, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = icmp eq i32 %degrees, 0 ; <i1> [#uses=1]
+ br i1 %0, label %return, label %bb
+
+bb: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 280, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %1 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ %2 = load double** %1, align 4 ; <double*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 281, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %3 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 4 ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 283, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %5 = add i32 %4, %degrees ; <i32> [#uses=1]
+ %6 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %5, i32* %6, align 4
+ call void @llvm.dbg.stoppoint(i32 284, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE7acquireEv(%"struct.polynomial<double>"* %this)
+ call void @llvm.dbg.stoppoint(i32 286, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb2
+
+bb1: ; preds = %bb2
+ call void @llvm.dbg.stoppoint(i32 289, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %7 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ %8 = load double** %7, align 4 ; <double*> [#uses=1]
+ %9 = getelementptr double* %2, i32 %n.0 ; <double*> [#uses=1]
+ %10 = load double* %9, align 1 ; <double> [#uses=1]
+ %11 = getelementptr double* %8, i32 %n.0 ; <double*> [#uses=1]
+ store double %10, double* %11, align 1
+ call void @llvm.dbg.stoppoint(i32 288, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %12 = add i32 %n.0, 1 ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ %n.0 = phi i32 [ 0, %bb ], [ %12, %bb1 ] ; <i32> [#uses=5]
+ call void @llvm.dbg.stoppoint(i32 288, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %13 = icmp ult i32 %n.0, %4 ; <i1> [#uses=1]
+ br i1 %13, label %bb1, label %bb5
+
+bb4: ; preds = %bb5
+ call void @llvm.dbg.stoppoint(i32 292, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %14 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 1 ; <double**> [#uses=1]
+ %15 = load double** %14, align 4 ; <double*> [#uses=1]
+ %16 = getelementptr double* %15, i32 %n.1 ; <double*> [#uses=1]
+ store double 0.000000e+00, double* %16, align 1
+ call void @llvm.dbg.stoppoint(i32 291, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %17 = add i32 %n.1, 1 ; <i32> [#uses=1]
+ br label %bb5
+
+bb5: ; preds = %bb4, %bb2
+ %n.1 = phi i32 [ %17, %bb4 ], [ %n.0, %bb2 ] ; <i32> [#uses=3]
+ call void @llvm.dbg.stoppoint(i32 291, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %18 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %19 = load i32* %18, align 4 ; <i32> [#uses=1]
+ %20 = icmp ugt i32 %19, %n.1 ; <i1> [#uses=1]
+ br i1 %20, label %bb4, label %return
+
+return: ; preds = %bb5, %entry
+ call void @llvm.dbg.stoppoint(i32 295, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram720 to %0*))
+ ret %"struct.polynomial<double>"* %this
+}
+
+define linkonce %"struct.polynomial<double>"* @_ZN10polynomialIdEaSERKS0_(%"struct.polynomial<double>"* %this, %"struct.polynomial<double>"* %source) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram729 to %0*))
+ call void @llvm.dbg.stoppoint(i32 261, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %2 = getelementptr %"struct.polynomial<double>"* %source, i32 0, i32 2 ; <i32*> [#uses=1]
+ %3 = load i32* %2, align 4 ; <i32> [#uses=1]
+ %4 = icmp eq i32 %1, %3 ; <i1> [#uses=1]
+ br i1 %4, label %bb1, label %bb
+
+bb: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 263, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE7releaseEv(%"struct.polynomial<double>"* %this) nounwind
+ call void @llvm.dbg.stoppoint(i32 265, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %5 = getelementptr %"struct.polynomial<double>"* %source, i32 0, i32 2 ; <i32*> [#uses=1]
+ %6 = load i32* %5, align 4 ; <i32> [#uses=1]
+ %7 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %6, i32* %7, align 4
+ call void @llvm.dbg.stoppoint(i32 266, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE7acquireEv(%"struct.polynomial<double>"* %this)
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ call void @llvm.dbg.stoppoint(i32 269, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %8 = getelementptr %"struct.polynomial<double>"* %source, i32 0, i32 1 ; <double**> [#uses=1]
+ %9 = load double** %8, align 4 ; <double*> [#uses=1]
+ call void @_ZN10polynomialIdE9deep_copyEPKd(%"struct.polynomial<double>"* %this, double* %9) nounwind
+ call void @llvm.dbg.stoppoint(i32 271, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram729 to %0*))
+ ret %"struct.polynomial<double>"* %this
+}
+
+define linkonce void @_ZN10polynomialISt7complexIdEE7acquireEv(%"struct.polynomial<std::complex<double> >"* %this) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram732 to %0*))
+ call void @llvm.dbg.stoppoint(i32 183, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=2]
+ %2 = shl i32 %1, 4 ; <i32> [#uses=1]
+ %3 = call i8* @_Znaj(i32 %2) ; <i8*> [#uses=1]
+ %4 = bitcast i8* %3 to %"struct.std::complex<double>"* ; <%"struct.std::complex<double>"*> [#uses=2]
+ br label %bb1
+
+bb: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 183, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %.0, double 0.000000e+00, double 0.000000e+00) nounwind
+ %5 = getelementptr %"struct.std::complex<double>"* %.0, i32 1 ; <%"struct.std::complex<double>"*> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %.01.in = phi i32 [ %1, %entry ], [ %.01, %bb ] ; <i32> [#uses=1]
+ %.0 = phi %"struct.std::complex<double>"* [ %4, %entry ], [ %5, %bb ] ; <%"struct.std::complex<double>"*> [#uses=2]
+ %.01 = add i32 %.01.in, -1 ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 183, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %6 = icmp eq i32 %.01, -1 ; <i1> [#uses=1]
+ br i1 %6, label %bb2, label %bb
+
+bb2: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 183, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %7 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 1 ; <%"struct.std::complex<double>"**> [#uses=1]
+ store %"struct.std::complex<double>"* %4, %"struct.std::complex<double>"** %7, align 4
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram732 to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialISt7complexIdEEC1Ej(%"struct.polynomial<std::complex<double> >"* %this, i32 %degree) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram735 to %0*))
+ call void @llvm.dbg.stoppoint(i32 213, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([4 x i32 (...)*]* @_ZTV10polynomialISt7complexIdEE, i32 0, i32 2), i32 (...)*** %0, align 4
+ %1 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 1 ; <%"struct.std::complex<double>"**> [#uses=1]
+ store %"struct.std::complex<double>"* null, %"struct.std::complex<double>"** %1, align 4
+ %2 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %degree, i32* %2, align 4
+ call void @llvm.dbg.stoppoint(i32 215, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialISt7complexIdEE7acquireEv(%"struct.polynomial<std::complex<double> >"* %this)
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram735 to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialIdE11bit_reverseERKS0_(%"struct.polynomial<std::complex<double> >"* noalias sret %agg.result, %"struct.polynomial<double>"* %poly) {
+entry:
+ %result = alloca %"struct.polynomial<std::complex<double> >", align 8 ; <%"struct.polynomial<std::complex<double> >"*> [#uses=1]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram738 to %0*))
+ %0 = bitcast %"struct.polynomial<std::complex<double> >"* %result to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %0, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable744 to %0*))
+ call void @llvm.dbg.stoppoint(i32 471, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %1 = call i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %poly) nounwind ; <i32> [#uses=1]
+ %2 = call i32 @_ZN10polynomialIdE4log2Ej(i32 %1) nounwind ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 473, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %3 = call i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %poly) nounwind ; <i32> [#uses=1]
+ call void @_ZN10polynomialISt7complexIdEEC1Ej(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %3)
+ call void @llvm.dbg.stoppoint(i32 475, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb6
+
+bb: ; preds = %bb6
+ call void @llvm.dbg.stoppoint(i32 476, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %4 = call double @_ZNK10polynomialIdE3getEj(%"struct.polynomial<double>"* %poly, i32 %n.0) nounwind ; <double> [#uses=1]
+ %5 = call i32 @_ZN10polynomialIdE9flip_bitsEjj(i32 %n.0, i32 %2) nounwind ; <i32> [#uses=1]
+ %6 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %5) nounwind ; <%"struct.std::complex<double>"*> [#uses=1]
+ %7 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEaSEd(%"struct.std::complex<double>"* %6, double %4) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 475, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %8 = add i32 %n.0, 1 ; <i32> [#uses=1]
+ br label %bb6
+
+bb6: ; preds = %bb, %entry
+ %n.0 = phi i32 [ 0, %entry ], [ %8, %bb ] ; <i32> [#uses=4]
+ call void @llvm.dbg.stoppoint(i32 475, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %9 = call i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %poly) nounwind ; <i32> [#uses=1]
+ %10 = icmp ugt i32 %9, %n.0 ; <i1> [#uses=1]
+ br i1 %10, label %bb, label %return
+
+return: ; preds = %bb6
+ call void @llvm.dbg.stoppoint(i32 475, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram738 to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialIdE11bit_reverseERKS_ISt7complexIdEE(%"struct.polynomial<std::complex<double> >"* noalias sret %agg.result, %"struct.polynomial<std::complex<double> >"* %poly) {
+entry:
+ %result = alloca %"struct.polynomial<std::complex<double> >", align 8 ; <%"struct.polynomial<std::complex<double> >"*> [#uses=1]
+ %memtmp7 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram747 to %0*))
+ %0 = bitcast %"struct.polynomial<std::complex<double> >"* %result to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %0, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable751 to %0*))
+ call void @llvm.dbg.stoppoint(i32 485, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %1 = call i32 @_ZNK10polynomialISt7complexIdEE6degreeEv(%"struct.polynomial<std::complex<double> >"* %poly) nounwind ; <i32> [#uses=1]
+ %2 = call i32 @_ZN10polynomialIdE4log2Ej(i32 %1) nounwind ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 487, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %3 = call i32 @_ZNK10polynomialISt7complexIdEE6degreeEv(%"struct.polynomial<std::complex<double> >"* %poly) nounwind ; <i32> [#uses=1]
+ call void @_ZN10polynomialISt7complexIdEEC1Ej(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %3)
+ call void @llvm.dbg.stoppoint(i32 489, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb8
+
+bb: ; preds = %bb8
+ call void @llvm.dbg.stoppoint(i32 490, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %4 = call i32 @_ZN10polynomialIdE9flip_bitsEjj(i32 %n.0, i32 %2) nounwind ; <i32> [#uses=1]
+ %5 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %4) nounwind ; <%"struct.std::complex<double>"*> [#uses=2]
+ call void @_ZNK10polynomialISt7complexIdEE3getEj(%"struct.std::complex<double>"* noalias sret %memtmp7, %"struct.polynomial<std::complex<double> >"* %poly, i32 %n.0) nounwind
+ %6 = getelementptr %"struct.std::complex<double>"* %5, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %7 = getelementptr %"struct.std::complex<double>"* %memtmp7, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %8 = load double* %7, align 8 ; <double> [#uses=1]
+ store double %8, double* %6, align 4
+ %9 = getelementptr %"struct.std::complex<double>"* %5, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %10 = getelementptr %"struct.std::complex<double>"* %memtmp7, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %11 = load double* %10, align 8 ; <double> [#uses=1]
+ store double %11, double* %9, align 4
+ call void @llvm.dbg.stoppoint(i32 489, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %12 = add i32 %n.0, 1 ; <i32> [#uses=1]
+ br label %bb8
+
+bb8: ; preds = %bb, %entry
+ %n.0 = phi i32 [ 0, %entry ], [ %12, %bb ] ; <i32> [#uses=4]
+ call void @llvm.dbg.stoppoint(i32 489, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %13 = call i32 @_ZNK10polynomialISt7complexIdEE6degreeEv(%"struct.polynomial<std::complex<double> >"* %poly) nounwind ; <i32> [#uses=1]
+ %14 = icmp ugt i32 %13, %n.0 ; <i1> [#uses=1]
+ br i1 %14, label %bb, label %return
+
+return: ; preds = %bb8
+ call void @llvm.dbg.stoppoint(i32 489, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram747 to %0*))
+ ret void
+}
+
+define linkonce %"struct.polynomial<std::complex<double> >"* @_ZN10polynomialISt7complexIdEEaSERKS2_(%"struct.polynomial<std::complex<double> >"* %this, %"struct.polynomial<std::complex<double> >"* %source) {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram753 to %0*))
+ call void @llvm.dbg.stoppoint(i32 261, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %0 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %1 = load i32* %0, align 4 ; <i32> [#uses=1]
+ %2 = getelementptr %"struct.polynomial<std::complex<double> >"* %source, i32 0, i32 2 ; <i32*> [#uses=1]
+ %3 = load i32* %2, align 4 ; <i32> [#uses=1]
+ %4 = icmp eq i32 %1, %3 ; <i1> [#uses=1]
+ br i1 %4, label %bb1, label %bb
+
+bb: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 263, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialISt7complexIdEE7releaseEv(%"struct.polynomial<std::complex<double> >"* %this) nounwind
+ call void @llvm.dbg.stoppoint(i32 265, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %5 = getelementptr %"struct.polynomial<std::complex<double> >"* %source, i32 0, i32 2 ; <i32*> [#uses=1]
+ %6 = load i32* %5, align 4 ; <i32> [#uses=1]
+ %7 = getelementptr %"struct.polynomial<std::complex<double> >"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %6, i32* %7, align 4
+ call void @llvm.dbg.stoppoint(i32 266, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialISt7complexIdEE7acquireEv(%"struct.polynomial<std::complex<double> >"* %this)
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ call void @llvm.dbg.stoppoint(i32 269, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %8 = getelementptr %"struct.polynomial<std::complex<double> >"* %source, i32 0, i32 1 ; <%"struct.std::complex<double>"**> [#uses=1]
+ %9 = load %"struct.std::complex<double>"** %8, align 4 ; <%"struct.std::complex<double>"*> [#uses=1]
+ call void @_ZN10polynomialISt7complexIdEE9deep_copyEPKS1_(%"struct.polynomial<std::complex<double> >"* %this, %"struct.std::complex<double>"* %9) nounwind
+ call void @llvm.dbg.stoppoint(i32 271, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram753 to %0*))
+ ret %"struct.polynomial<std::complex<double> >"* %this
+}
+
+define linkonce i32 @_ZN10polynomialIdE11stretch_fftEv(%"struct.polynomial<double>"* %this) {
+entry:
+ %0 = alloca %"struct.std::allocator<char>", align 8 ; <%"struct.std::allocator<char>"*> [#uses=4]
+ %1 = alloca %"struct.std::string", align 8 ; <%"struct.std::string"*> [#uses=4]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram756 to %0*))
+ call void @llvm.dbg.stoppoint(i32 445, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb
+
+bb: ; preds = %bb1, %entry
+ %n.0 = phi i32 [ 1, %entry ], [ %5, %bb1 ] ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 449, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %2 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %3 = load i32* %2, align 4 ; <i32> [#uses=1]
+ %4 = icmp ugt i32 %3, %n.0 ; <i1> [#uses=1]
+ %5 = shl i32 %n.0, 1 ; <i32> [#uses=4]
+ br i1 %4, label %bb1, label %bb17
+
+bb1: ; preds = %bb
+ call void @llvm.dbg.stoppoint(i32 454, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %6 = icmp eq i32 %5, 0 ; <i1> [#uses=1]
+ br i1 %6, label %bb2, label %bb
+
+bb2: ; preds = %bb1
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZNSaIcEC1Ev(%"struct.std::allocator<char>"* %0) nounwind
+ invoke void @_ZNSsC1EPKcRKSaIcE(%"struct.std::string"* %1, i8* getelementptr ([35 x i8]* @.str759, i32 0, i32 0), %"struct.std::allocator<char>"* %0)
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %bb2
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %7 = call i8* @__cxa_allocate_exception(i32 8) nounwind ; <i8*> [#uses=3]
+ %8 = bitcast i8* %7 to %"struct.std::overflow_error"* ; <%"struct.std::overflow_error"*> [#uses=1]
+ invoke void @_ZNSt14overflow_errorC1ERKSs(%"struct.std::overflow_error"* %8, %"struct.std::string"* %1)
+ to label %invcont3 unwind label %lpad23
+
+invcont3: ; preds = %invcont
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZNSsD1Ev(%"struct.std::string"* %1)
+ to label %bb11 unwind label %lpad31
+
+bb11: ; preds = %invcont3
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZNSaIcED1Ev(%"struct.std::allocator<char>"* %0) nounwind
+ call void @__cxa_throw(i8* %7, i8* bitcast (%struct.__si_class_type_info_pseudo* @_ZTISt14overflow_error to i8*), void (i8*)* bitcast (void (%"struct.std::overflow_error"*)* @_ZNSt14overflow_errorD1Ev to void (i8*)*)) noreturn
+ unreachable
+
+bb17: ; preds = %bb
+ call void @llvm.dbg.stoppoint(i32 459, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %9 = getelementptr %"struct.polynomial<double>"* %this, i32 0, i32 2 ; <i32*> [#uses=1]
+ %10 = load i32* %9, align 4 ; <i32> [#uses=2]
+ %11 = sub i32 %5, %10 ; <i32> [#uses=3]
+ call void @llvm.dbg.stoppoint(i32 461, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %12 = icmp eq i32 %5, %10 ; <i1> [#uses=1]
+ br i1 %12, label %return, label %bb18
+
+bb18: ; preds = %bb17
+ call void @llvm.dbg.stoppoint(i32 462, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %13 = call %"struct.polynomial<double>"* @_ZN10polynomialIdE7stretchEj(%"struct.polynomial<double>"* %this, i32 %11) ; <%"struct.polynomial<double>"*> [#uses=0]
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram756 to %0*))
+ ret i32 %11
+
+return: ; preds = %bb17
+ call void @llvm.dbg.stoppoint(i32 464, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ ret i32 %11
+
+lpad: ; preds = %bb2
+ %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select22 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ br label %ppad
+
+lpad23: ; preds = %invcont
+ %eh_ptr24 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select26 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr24, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @__cxa_free_exception(i8* %7) nounwind
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZNSsD1Ev(%"struct.std::string"* %1)
+ to label %ppad unwind label %lpad27
+
+lpad27: ; preds = %lpad23
+ %eh_ptr28 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select30 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr28, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+lpad31: ; preds = %invcont3
+ %eh_ptr32 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select34 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr32, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+ppad: ; preds = %lpad23, %lpad
+ %eh_exception.0 = phi i8* [ %eh_ptr, %lpad ], [ %eh_ptr24, %lpad23 ] ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 455, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZNSaIcED1Ev(%"struct.std::allocator<char>"* %0) nounwind
+ call void @_Unwind_Resume(i8* %eh_exception.0)
+ unreachable
+}
+
+declare void @_ZNSaIcEC1Ev(%"struct.std::allocator<char>"*) nounwind
+
+declare void @_ZNSsC1EPKcRKSaIcE(%"struct.std::string"*, i8*, %"struct.std::allocator<char>"*)
+
+declare i8* @__cxa_allocate_exception(i32) nounwind
+
+declare void @_ZNSt14overflow_errorC1ERKSs(%"struct.std::overflow_error"*, %"struct.std::string"*)
+
+declare void @_ZNSsD1Ev(%"struct.std::string"*)
+
+declare i8* @llvm.eh.exception() nounwind
+
+declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind
+
+declare void @__cxa_free_exception(i8*) nounwind
+
+declare void @_ZSt9terminatev() noreturn nounwind
+
+declare void @_ZNSaIcED1Ev(%"struct.std::allocator<char>"*) nounwind
+
+declare void @__cxa_throw(i8*, i8*, void (i8*)*) noreturn
+
+define linkonce void @_ZNSt14overflow_errorD1Ev(%"struct.std::overflow_error"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1727 to %0*))
+ call void @llvm.dbg.stoppoint(i32 134, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*))
+ %0 = getelementptr %"struct.std::overflow_error"* %this, i32 0, i32 0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([5 x i32 (...)*]* @_ZTVSt14overflow_error, i32 0, i32 2), i32 (...)*** %0, align 4
+ %1 = getelementptr %"struct.std::overflow_error"* %this, i32 0, i32 0 ; <%"struct.std::runtime_error"*> [#uses=1]
+ call void @_ZNSt13runtime_errorD2Ev(%"struct.std::runtime_error"* %1) nounwind
+ call void @llvm.dbg.stoppoint(i32 134, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*))
+ ret void
+}
+
+declare i32 @__gxx_personality_v0(...)
+
+declare void @_Unwind_Resume(i8*)
+
+define linkonce void @_ZNSt14overflow_errorD0Ev(%"struct.std::overflow_error"* %this) nounwind {
+entry:
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1736 to %0*))
+ call void @llvm.dbg.stoppoint(i32 134, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*))
+ %0 = getelementptr %"struct.std::overflow_error"* %this, i32 0, i32 0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ store i32 (...)** getelementptr ([5 x i32 (...)*]* @_ZTVSt14overflow_error, i32 0, i32 2), i32 (...)*** %0, align 4
+ %1 = getelementptr %"struct.std::overflow_error"* %this, i32 0, i32 0 ; <%"struct.std::runtime_error"*> [#uses=1]
+ call void @_ZNSt13runtime_errorD2Ev(%"struct.std::runtime_error"* %1) nounwind
+ call void @llvm.dbg.stoppoint(i32 134, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit770 to %0*))
+ %2 = bitcast %"struct.std::overflow_error"* %this to i8* ; <i8*> [#uses=1]
+ call void @_ZdlPv(i8* %2) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1736 to %0*))
+ ret void
+}
+
+declare i8* @_ZNKSt13runtime_error4whatEv(%"struct.std::runtime_error"*) nounwind
+
+declare void @_ZNSt13runtime_errorD2Ev(%"struct.std::runtime_error"*) nounwind
+
+define linkonce void @_ZSt13__complex_expCd(%1* noalias sret %agg.result, %1 %__z) nounwind {
+entry:
+ %0 = alloca %1, align 8 ; <%1*> [#uses=4]
+ %memtmp = alloca %1, align 8 ; <%1*> [#uses=3]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1742 to %0*))
+ call void @llvm.dbg.stoppoint(i32 730, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ call void @cexp(%1* noalias sret %memtmp, %1 %__z) nounwind
+ %1 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ %2 = getelementptr %1* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %3 = load double* %2, align 8 ; <double> [#uses=1]
+ store double %3, double* %1, align 8
+ %4 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ %5 = getelementptr %1* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %6 = load double* %5, align 8 ; <double> [#uses=1]
+ store double %6, double* %4, align 8
+ %7 = getelementptr %1* %agg.result, i32 0, i32 0 ; <double*> [#uses=1]
+ %8 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ %9 = load double* %8, align 8 ; <double> [#uses=1]
+ store double %9, double* %7, align 8
+ %10 = getelementptr %1* %agg.result, i32 0, i32 1 ; <double*> [#uses=1]
+ %11 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ %12 = load double* %11, align 8 ; <double> [#uses=1]
+ store double %12, double* %10, align 8
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1742 to %0*))
+ ret void
+}
+
+declare void @cexp(%1* noalias sret, %1) nounwind
+
+define linkonce void @_ZSt3expIdESt7complexIT_ERKS2_(%"struct.std::complex<double>"* noalias sret %agg.result, %"struct.std::complex<double>"* %__z) nounwind {
+entry:
+ %0 = alloca %1, align 8 ; <%1*> [#uses=3]
+ %1 = alloca %1, align 8 ; <%1*> [#uses=3]
+ %memtmp = alloca %1, align 8 ; <%1*> [#uses=3]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1746 to %0*))
+ call void @llvm.dbg.stoppoint(i32 738, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
+ %2 = call %1* @_ZNKSt7complexIdE5__repEv(%"struct.std::complex<double>"* %__z) nounwind ; <%1*> [#uses=2]
+ %3 = getelementptr %1* %1, i32 0, i32 0 ; <double*> [#uses=1]
+ %4 = getelementptr %1* %2, i32 0, i32 0 ; <double*> [#uses=1]
+ %5 = load double* %4, align 8 ; <double> [#uses=1]
+ store double %5, double* %3, align 8
+ %6 = getelementptr %1* %1, i32 0, i32 1 ; <double*> [#uses=1]
+ %7 = getelementptr %1* %2, i32 0, i32 1 ; <double*> [#uses=1]
+ %8 = load double* %7, align 8 ; <double> [#uses=1]
+ store double %8, double* %6, align 8
+ %9 = load %1* %1, align 8 ; <%1> [#uses=1]
+ call void @_ZSt13__complex_expCd(%1* noalias sret %memtmp, %1 %9) nounwind
+ %10 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1]
+ %11 = getelementptr %1* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %12 = load double* %11, align 8 ; <double> [#uses=1]
+ store double %12, double* %10, align 8
+ %13 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1]
+ %14 = getelementptr %1* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %15 = load double* %14, align 8 ; <double> [#uses=1]
+ store double %15, double* %13, align 8
+ %16 = load %1* %0, align 8 ; <%1> [#uses=1]
+ call void @_ZNSt7complexIdEC1ECd(%"struct.std::complex<double>"* %agg.result, %1 %16) nounwind
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1746 to %0*))
+ ret void
+}
+
+define linkonce void @_ZN10polynomialIdE3fftERKS0_(%"struct.polynomial<std::complex<double> >"* noalias sret %agg.result, %"struct.polynomial<double>"* %poly) {
+entry:
+ %result = alloca %"struct.polynomial<std::complex<double> >", align 8 ; <%"struct.polynomial<std::complex<double> >"*> [#uses=1]
+ %u = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=6]
+ %t = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=6]
+ %w = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=5]
+ %wm = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=5]
+ %0 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=2]
+ %1 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=2]
+ %memtmp20 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ %memtmp23 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ %memtmp24 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ %memtmp26 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1748 to %0*))
+ %2 = bitcast %"struct.polynomial<std::complex<double> >"* %result to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %2, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1751 to %0*))
+ %3 = bitcast %"struct.std::complex<double>"* %u to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %3, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1753 to %0*))
+ %4 = bitcast %"struct.std::complex<double>"* %t to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %4, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1755 to %0*))
+ %5 = bitcast %"struct.std::complex<double>"* %w to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %5, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1757 to %0*))
+ %6 = bitcast %"struct.std::complex<double>"* %wm to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %6, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1759 to %0*))
+ call void @llvm.dbg.stoppoint(i32 499, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %7 = call i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %poly) nounwind ; <i32> [#uses=1]
+ %8 = call i32 @_ZN10polynomialIdE4log2Ej(i32 %7) nounwind ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 501, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %wm, double 0.000000e+00, double 0.000000e+00) nounwind
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %w, double 0.000000e+00, double 0.000000e+00) nounwind
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %t, double 0.000000e+00, double 0.000000e+00) nounwind
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %u, double 0.000000e+00, double 0.000000e+00) nounwind
+ call void @llvm.dbg.stoppoint(i32 503, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE11bit_reverseERKS0_(%"struct.polynomial<std::complex<double> >"* noalias sret %agg.result, %"struct.polynomial<double>"* %poly)
+ call void @llvm.dbg.stoppoint(i32 508, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb32
+
+bb: ; preds = %bb32
+ call void @llvm.dbg.stoppoint(i32 510, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %9 = uitofp i32 %m.0 to double ; <double> [#uses=1]
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %0, double %9, double 0.000000e+00) nounwind
+ invoke void @_ZStdvIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %1, %"struct.std::complex<double>"* @_ZN10polynomialIdE4PI2IE, %"struct.std::complex<double>"* %0)
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %bb
+ call void @llvm.dbg.stoppoint(i32 510, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt3expIdESt7complexIT_ERKS2_(%"struct.std::complex<double>"* noalias sret %memtmp20, %"struct.std::complex<double>"* %1) nounwind
+ %10 = getelementptr %"struct.std::complex<double>"* %wm, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %11 = getelementptr %"struct.std::complex<double>"* %memtmp20, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %12 = load double* %11, align 8 ; <double> [#uses=1]
+ store double %12, double* %10, align 8
+ %13 = getelementptr %"struct.std::complex<double>"* %wm, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %14 = getelementptr %"struct.std::complex<double>"* %memtmp20, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %15 = load double* %14, align 8 ; <double> [#uses=1]
+ store double %15, double* %13, align 8
+ call void @llvm.dbg.stoppoint(i32 511, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %16 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEaSEd(%"struct.std::complex<double>"* %w, double 1.000000e+00) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 513, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb30
+
+bb22: ; preds = %bb28
+ call void @llvm.dbg.stoppoint(i32 517, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %17 = add i32 %k.0, %m2.0 ; <i32> [#uses=1]
+ %18 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %17) nounwind ; <%"struct.std::complex<double>"*> [#uses=1]
+ call void @_ZStmlIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %memtmp23, %"struct.std::complex<double>"* %w, %"struct.std::complex<double>"* %18) nounwind
+ %19 = getelementptr %"struct.std::complex<double>"* %t, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %20 = getelementptr %"struct.std::complex<double>"* %memtmp23, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %21 = load double* %20, align 8 ; <double> [#uses=1]
+ store double %21, double* %19, align 8
+ %22 = getelementptr %"struct.std::complex<double>"* %t, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %23 = getelementptr %"struct.std::complex<double>"* %memtmp23, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %24 = load double* %23, align 8 ; <double> [#uses=1]
+ store double %24, double* %22, align 8
+ call void @llvm.dbg.stoppoint(i32 518, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %25 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %k.0) nounwind ; <%"struct.std::complex<double>"*> [#uses=2]
+ %26 = getelementptr %"struct.std::complex<double>"* %u, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %27 = getelementptr %"struct.std::complex<double>"* %25, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %28 = load double* %27, align 4 ; <double> [#uses=1]
+ store double %28, double* %26, align 8
+ %29 = getelementptr %"struct.std::complex<double>"* %u, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %30 = getelementptr %"struct.std::complex<double>"* %25, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %31 = load double* %30, align 4 ; <double> [#uses=1]
+ store double %31, double* %29, align 8
+ call void @llvm.dbg.stoppoint(i32 519, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %32 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %k.0) nounwind ; <%"struct.std::complex<double>"*> [#uses=2]
+ invoke void @_ZStplIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %memtmp24, %"struct.std::complex<double>"* %u, %"struct.std::complex<double>"* %t)
+ to label %invcont25 unwind label %lpad
+
+invcont25: ; preds = %bb22
+ %33 = getelementptr %"struct.std::complex<double>"* %32, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %34 = getelementptr %"struct.std::complex<double>"* %memtmp24, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %35 = load double* %34, align 8 ; <double> [#uses=1]
+ store double %35, double* %33, align 4
+ %36 = getelementptr %"struct.std::complex<double>"* %32, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %37 = getelementptr %"struct.std::complex<double>"* %memtmp24, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %38 = load double* %37, align 8 ; <double> [#uses=1]
+ store double %38, double* %36, align 4
+ call void @llvm.dbg.stoppoint(i32 520, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %39 = add i32 %k.0, %m2.0 ; <i32> [#uses=1]
+ %40 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %39) nounwind ; <%"struct.std::complex<double>"*> [#uses=2]
+ invoke void @_ZStmiIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %memtmp26, %"struct.std::complex<double>"* %u, %"struct.std::complex<double>"* %t)
+ to label %invcont27 unwind label %lpad
+
+invcont27: ; preds = %invcont25
+ %41 = getelementptr %"struct.std::complex<double>"* %40, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %42 = getelementptr %"struct.std::complex<double>"* %memtmp26, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %43 = load double* %42, align 8 ; <double> [#uses=1]
+ store double %43, double* %41, align 4
+ %44 = getelementptr %"struct.std::complex<double>"* %40, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %45 = getelementptr %"struct.std::complex<double>"* %memtmp26, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %46 = load double* %45, align 8 ; <double> [#uses=1]
+ store double %46, double* %44, align 4
+ call void @llvm.dbg.stoppoint(i32 515, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %47 = add i32 %k.0, %m.0 ; <i32> [#uses=1]
+ br label %bb28
+
+bb28: ; preds = %bb30, %invcont27
+ %k.0 = phi i32 [ %47, %invcont27 ], [ %j.0, %bb30 ] ; <i32> [#uses=6]
+ call void @llvm.dbg.stoppoint(i32 515, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %48 = call i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %poly) nounwind ; <i32> [#uses=1]
+ %49 = add i32 %48, -1 ; <i32> [#uses=1]
+ %50 = icmp ult i32 %49, %k.0 ; <i1> [#uses=1]
+ br i1 %50, label %bb29, label %bb22
+
+bb29: ; preds = %bb28
+ call void @llvm.dbg.stoppoint(i32 523, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %51 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEmLIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %w, %"struct.std::complex<double>"* %wm) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 513, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %52 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ br label %bb30
+
+bb30: ; preds = %bb29, %invcont
+ %j.0 = phi i32 [ 0, %invcont ], [ %52, %bb29 ] ; <i32> [#uses=3]
+ call void @llvm.dbg.stoppoint(i32 513, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %53 = add i32 %m2.0, -1 ; <i32> [#uses=1]
+ %54 = icmp ult i32 %53, %j.0 ; <i1> [#uses=1]
+ br i1 %54, label %bb31, label %bb28
+
+bb31: ; preds = %bb30
+ call void @llvm.dbg.stoppoint(i32 526, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %55 = shl i32 %m.0, 1 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 527, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %56 = shl i32 %m2.0, 1 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 508, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %57 = add i32 %s.0, 1 ; <i32> [#uses=1]
+ br label %bb32
+
+bb32: ; preds = %bb31, %entry
+ %m.0 = phi i32 [ 2, %entry ], [ %55, %bb31 ] ; <i32> [#uses=3]
+ %m2.0 = phi i32 [ 1, %entry ], [ %56, %bb31 ] ; <i32> [#uses=4]
+ %s.0 = phi i32 [ 0, %entry ], [ %57, %bb31 ] ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 508, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %58 = icmp ult i32 %s.0, %8 ; <i1> [#uses=1]
+ br i1 %58, label %bb, label %return
+
+return: ; preds = %bb32
+ call void @llvm.dbg.stoppoint(i32 530, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1748 to %0*))
+ ret void
+
+lpad: ; preds = %invcont25, %bb22, %bb
+ %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select40 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 530, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %agg.result)
+ to label %Unwind unwind label %lpad41
+
+lpad41: ; preds = %lpad
+ %eh_ptr42 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select44 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr42, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 530, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+Unwind: ; preds = %lpad
+ call void @_Unwind_Resume(i8* %eh_ptr)
+ unreachable
+}
+
+define linkonce void @_ZN10polynomialIdE11inverse_fftERKS_ISt7complexIdEE(%"struct.polynomial<std::complex<double> >"* noalias sret %agg.result, %"struct.polynomial<std::complex<double> >"* %poly) {
+entry:
+ %result = alloca %"struct.polynomial<std::complex<double> >", align 8 ; <%"struct.polynomial<std::complex<double> >"*> [#uses=1]
+ %u = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=6]
+ %t = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=6]
+ %w = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=5]
+ %wm = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=5]
+ %0 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=2]
+ %1 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=2]
+ %2 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=2]
+ %memtmp22 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ %memtmp25 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ %memtmp26 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ %memtmp28 = alloca %"struct.std::complex<double>", align 8 ; <%"struct.std::complex<double>"*> [#uses=3]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1771 to %0*))
+ %3 = bitcast %"struct.polynomial<std::complex<double> >"* %result to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %3, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1774 to %0*))
+ %4 = bitcast %"struct.std::complex<double>"* %u to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %4, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1775 to %0*))
+ %5 = bitcast %"struct.std::complex<double>"* %t to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %5, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1776 to %0*))
+ %6 = bitcast %"struct.std::complex<double>"* %w to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %6, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1777 to %0*))
+ %7 = bitcast %"struct.std::complex<double>"* %wm to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %7, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1778 to %0*))
+ call void @llvm.dbg.stoppoint(i32 537, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %8 = call i32 @_ZNK10polynomialISt7complexIdEE6degreeEv(%"struct.polynomial<std::complex<double> >"* %poly) nounwind ; <i32> [#uses=1]
+ %9 = call i32 @_ZN10polynomialIdE4log2Ej(i32 %8) nounwind ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 539, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %wm, double 0.000000e+00, double 0.000000e+00) nounwind
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %w, double 0.000000e+00, double 0.000000e+00) nounwind
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %t, double 0.000000e+00, double 0.000000e+00) nounwind
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %u, double 0.000000e+00, double 0.000000e+00) nounwind
+ call void @llvm.dbg.stoppoint(i32 541, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdE11bit_reverseERKS_ISt7complexIdEE(%"struct.polynomial<std::complex<double> >"* noalias sret %agg.result, %"struct.polynomial<std::complex<double> >"* %poly)
+ call void @llvm.dbg.stoppoint(i32 546, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb34
+
+bb: ; preds = %bb34
+ call void @llvm.dbg.stoppoint(i32 548, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %10 = uitofp i32 %m.0 to double ; <double> [#uses=1]
+ call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %1, double %10, double 0.000000e+00) nounwind
+ call void @_ZStngIdESt7complexIT_ERKS2_(%"struct.std::complex<double>"* noalias sret %0, %"struct.std::complex<double>"* @_ZN10polynomialIdE4PI2IE) nounwind
+ invoke void @_ZStdvIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %2, %"struct.std::complex<double>"* %0, %"struct.std::complex<double>"* %1)
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %bb
+ call void @llvm.dbg.stoppoint(i32 548, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt3expIdESt7complexIT_ERKS2_(%"struct.std::complex<double>"* noalias sret %memtmp22, %"struct.std::complex<double>"* %2) nounwind
+ %11 = getelementptr %"struct.std::complex<double>"* %wm, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %12 = getelementptr %"struct.std::complex<double>"* %memtmp22, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %13 = load double* %12, align 8 ; <double> [#uses=1]
+ store double %13, double* %11, align 8
+ %14 = getelementptr %"struct.std::complex<double>"* %wm, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %15 = getelementptr %"struct.std::complex<double>"* %memtmp22, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %16 = load double* %15, align 8 ; <double> [#uses=1]
+ store double %16, double* %14, align 8
+ call void @llvm.dbg.stoppoint(i32 549, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %17 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEaSEd(%"struct.std::complex<double>"* %w, double 1.000000e+00) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 551, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb32
+
+bb24: ; preds = %bb30
+ call void @llvm.dbg.stoppoint(i32 555, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %18 = add i32 %k.0, %m2.0 ; <i32> [#uses=1]
+ %19 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %18) nounwind ; <%"struct.std::complex<double>"*> [#uses=1]
+ call void @_ZStmlIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %memtmp25, %"struct.std::complex<double>"* %w, %"struct.std::complex<double>"* %19) nounwind
+ %20 = getelementptr %"struct.std::complex<double>"* %t, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %21 = getelementptr %"struct.std::complex<double>"* %memtmp25, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %22 = load double* %21, align 8 ; <double> [#uses=1]
+ store double %22, double* %20, align 8
+ %23 = getelementptr %"struct.std::complex<double>"* %t, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %24 = getelementptr %"struct.std::complex<double>"* %memtmp25, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %25 = load double* %24, align 8 ; <double> [#uses=1]
+ store double %25, double* %23, align 8
+ call void @llvm.dbg.stoppoint(i32 556, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %26 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %k.0) nounwind ; <%"struct.std::complex<double>"*> [#uses=2]
+ %27 = getelementptr %"struct.std::complex<double>"* %u, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %28 = getelementptr %"struct.std::complex<double>"* %26, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %29 = load double* %28, align 4 ; <double> [#uses=1]
+ store double %29, double* %27, align 8
+ %30 = getelementptr %"struct.std::complex<double>"* %u, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %31 = getelementptr %"struct.std::complex<double>"* %26, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %32 = load double* %31, align 4 ; <double> [#uses=1]
+ store double %32, double* %30, align 8
+ call void @llvm.dbg.stoppoint(i32 557, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %33 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %k.0) nounwind ; <%"struct.std::complex<double>"*> [#uses=2]
+ invoke void @_ZStplIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %memtmp26, %"struct.std::complex<double>"* %u, %"struct.std::complex<double>"* %t)
+ to label %invcont27 unwind label %lpad
+
+invcont27: ; preds = %bb24
+ %34 = getelementptr %"struct.std::complex<double>"* %33, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %35 = getelementptr %"struct.std::complex<double>"* %memtmp26, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %36 = load double* %35, align 8 ; <double> [#uses=1]
+ store double %36, double* %34, align 4
+ %37 = getelementptr %"struct.std::complex<double>"* %33, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %38 = getelementptr %"struct.std::complex<double>"* %memtmp26, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %39 = load double* %38, align 8 ; <double> [#uses=1]
+ store double %39, double* %37, align 4
+ call void @llvm.dbg.stoppoint(i32 558, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %40 = add i32 %k.0, %m2.0 ; <i32> [#uses=1]
+ %41 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %40) nounwind ; <%"struct.std::complex<double>"*> [#uses=2]
+ invoke void @_ZStmiIdESt7complexIT_ERKS2_S4_(%"struct.std::complex<double>"* noalias sret %memtmp28, %"struct.std::complex<double>"* %u, %"struct.std::complex<double>"* %t)
+ to label %invcont29 unwind label %lpad
+
+invcont29: ; preds = %invcont27
+ %42 = getelementptr %"struct.std::complex<double>"* %41, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %43 = getelementptr %"struct.std::complex<double>"* %memtmp28, i32 0, i32 0, i32 0 ; <double*> [#uses=1]
+ %44 = load double* %43, align 8 ; <double> [#uses=1]
+ store double %44, double* %42, align 4
+ %45 = getelementptr %"struct.std::complex<double>"* %41, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %46 = getelementptr %"struct.std::complex<double>"* %memtmp28, i32 0, i32 0, i32 1 ; <double*> [#uses=1]
+ %47 = load double* %46, align 8 ; <double> [#uses=1]
+ store double %47, double* %45, align 4
+ call void @llvm.dbg.stoppoint(i32 553, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %48 = add i32 %k.0, %m.0 ; <i32> [#uses=1]
+ br label %bb30
+
+bb30: ; preds = %bb32, %invcont29
+ %k.0 = phi i32 [ %48, %invcont29 ], [ %j.0, %bb32 ] ; <i32> [#uses=6]
+ call void @llvm.dbg.stoppoint(i32 553, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %49 = call i32 @_ZNK10polynomialISt7complexIdEE6degreeEv(%"struct.polynomial<std::complex<double> >"* %poly) nounwind ; <i32> [#uses=1]
+ %50 = add i32 %49, -1 ; <i32> [#uses=1]
+ %51 = icmp ult i32 %50, %k.0 ; <i1> [#uses=1]
+ br i1 %51, label %bb31, label %bb24
+
+bb31: ; preds = %bb30
+ call void @llvm.dbg.stoppoint(i32 561, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %52 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEmLIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %w, %"struct.std::complex<double>"* %wm) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 551, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %53 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ br label %bb32
+
+bb32: ; preds = %bb31, %invcont
+ %j.0 = phi i32 [ 0, %invcont ], [ %53, %bb31 ] ; <i32> [#uses=3]
+ call void @llvm.dbg.stoppoint(i32 551, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %54 = add i32 %m2.0, -1 ; <i32> [#uses=1]
+ %55 = icmp ult i32 %54, %j.0 ; <i1> [#uses=1]
+ br i1 %55, label %bb33, label %bb30
+
+bb33: ; preds = %bb32
+ call void @llvm.dbg.stoppoint(i32 564, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %56 = shl i32 %m.0, 1 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 565, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %57 = shl i32 %m2.0, 1 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 546, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %58 = add i32 %s.0, 1 ; <i32> [#uses=1]
+ br label %bb34
+
+bb34: ; preds = %bb33, %entry
+ %m.0 = phi i32 [ 2, %entry ], [ %56, %bb33 ] ; <i32> [#uses=3]
+ %m2.0 = phi i32 [ 1, %entry ], [ %57, %bb33 ] ; <i32> [#uses=4]
+ %s.0 = phi i32 [ 0, %entry ], [ %58, %bb33 ] ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 546, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %59 = icmp ult i32 %s.0, %9 ; <i1> [#uses=1]
+ br i1 %59, label %bb, label %bb37
+
+bb36: ; preds = %bb37
+ call void @llvm.dbg.stoppoint(i32 569, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %60 = call i32 @_ZNK10polynomialISt7complexIdEE6degreeEv(%"struct.polynomial<std::complex<double> >"* %poly) nounwind ; <i32> [#uses=1]
+ %61 = uitofp i32 %60 to double ; <double> [#uses=1]
+ %62 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %agg.result, i32 %j.1) nounwind ; <%"struct.std::complex<double>"*> [#uses=1]
+ %63 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEdVEd(%"struct.std::complex<double>"* %62, double %61) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 568, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %64 = add i32 %j.1, 1 ; <i32> [#uses=1]
+ br label %bb37
+
+bb37: ; preds = %bb36, %bb34
+ %j.1 = phi i32 [ %64, %bb36 ], [ 0, %bb34 ] ; <i32> [#uses=3]
+ call void @llvm.dbg.stoppoint(i32 568, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %65 = call i32 @_ZNK10polynomialISt7complexIdEE6degreeEv(%"struct.polynomial<std::complex<double> >"* %poly) nounwind ; <i32> [#uses=1]
+ %66 = icmp ugt i32 %65, %j.1 ; <i1> [#uses=1]
+ br i1 %66, label %bb36, label %return
+
+return: ; preds = %bb37
+ call void @llvm.dbg.stoppoint(i32 571, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1771 to %0*))
+ ret void
+
+lpad: ; preds = %invcont27, %bb24, %bb
+ %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select46 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 571, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %agg.result)
+ to label %Unwind unwind label %lpad47
+
+lpad47: ; preds = %lpad
+ %eh_ptr48 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select50 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr48, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 571, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+Unwind: ; preds = %lpad
+ call void @_Unwind_Resume(i8* %eh_ptr)
+ unreachable
+}
+
+define linkonce void @_ZNK10polynomialIdEmlERKS0_(%"struct.polynomial<double>"* noalias sret %agg.result, %"struct.polynomial<double>"* %this, %"struct.polynomial<double>"* %poly) {
+entry:
+ %result = alloca %"struct.polynomial<double>", align 8 ; <%"struct.polynomial<double>"*> [#uses=1]
+ %dft2 = alloca %"struct.polynomial<std::complex<double> >", align 8 ; <%"struct.polynomial<std::complex<double> >"*> [#uses=7]
+ %dft1 = alloca %"struct.polynomial<std::complex<double> >", align 8 ; <%"struct.polynomial<std::complex<double> >"*> [#uses=6]
+ %a2 = alloca %"struct.polynomial<double>", align 8 ; <%"struct.polynomial<double>"*> [#uses=8]
+ %a1 = alloca %"struct.polynomial<double>", align 8 ; <%"struct.polynomial<double>"*> [#uses=9]
+ %0 = alloca %"struct.polynomial<std::complex<double> >", align 8 ; <%"struct.polynomial<std::complex<double> >"*> [#uses=4]
+ call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1785 to %0*))
+ %1 = bitcast %"struct.polynomial<double>"* %result to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %1, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1791 to %0*))
+ %2 = bitcast %"struct.polynomial<std::complex<double> >"* %dft2 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %2, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1795 to %0*))
+ %3 = bitcast %"struct.polynomial<std::complex<double> >"* %dft1 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %3, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1797 to %0*))
+ %4 = bitcast %"struct.polynomial<double>"* %a2 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %4, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1799 to %0*))
+ %5 = bitcast %"struct.polynomial<double>"* %a1 to %0* ; <%0*> [#uses=1]
+ call void @llvm.dbg.declare(%0* %5, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1801 to %0*))
+ call void @llvm.dbg.stoppoint(i32 590, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdEC1ERKS0_(%"struct.polynomial<double>"* %a1, %"struct.polynomial<double>"* %this)
+ call void @llvm.dbg.stoppoint(i32 591, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdEC1ERKS0_(%"struct.polynomial<double>"* %a2, %"struct.polynomial<double>"* %poly)
+ to label %invcont unwind label %lpad
+
+invcont: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 594, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %6 = call i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %a1) nounwind ; <i32> [#uses=1]
+ %7 = call i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %a2) nounwind ; <i32> [#uses=1]
+ %8 = icmp ugt i32 %6, %7 ; <i1> [#uses=1]
+ br i1 %8, label %bb, label %bb26
+
+bb: ; preds = %invcont
+ call void @llvm.dbg.stoppoint(i32 595, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %9 = invoke i32 @_ZN10polynomialIdE11stretch_fftEv(%"struct.polynomial<double>"* %a1)
+ to label %invcont24 unwind label %lpad76 ; <i32> [#uses=1]
+
+invcont24: ; preds = %bb
+ call void @llvm.dbg.stoppoint(i32 595, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %10 = invoke %"struct.polynomial<double>"* @_ZN10polynomialIdE7stretchEj(%"struct.polynomial<double>"* %a2, i32 %9)
+ to label %bb29 unwind label %lpad76 ; <%"struct.polynomial<double>"*> [#uses=0]
+
+bb26: ; preds = %invcont
+ call void @llvm.dbg.stoppoint(i32 597, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %11 = invoke i32 @_ZN10polynomialIdE11stretch_fftEv(%"struct.polynomial<double>"* %a2)
+ to label %invcont27 unwind label %lpad76 ; <i32> [#uses=1]
+
+invcont27: ; preds = %bb26
+ call void @llvm.dbg.stoppoint(i32 597, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %12 = invoke %"struct.polynomial<double>"* @_ZN10polynomialIdE7stretchEj(%"struct.polynomial<double>"* %a1, i32 %11)
+ to label %bb29 unwind label %lpad76 ; <%"struct.polynomial<double>"*> [#uses=0]
+
+bb29: ; preds = %invcont27, %invcont24
+ call void @llvm.dbg.stoppoint(i32 600, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdE3fftERKS0_(%"struct.polynomial<std::complex<double> >"* noalias sret %dft1, %"struct.polynomial<double>"* %a1)
+ to label %invcont30 unwind label %lpad76
+
+invcont30: ; preds = %bb29
+ call void @llvm.dbg.stoppoint(i32 601, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdE3fftERKS0_(%"struct.polynomial<std::complex<double> >"* noalias sret %dft2, %"struct.polynomial<double>"* %a2)
+ to label %invcont31 unwind label %lpad80
+
+invcont31: ; preds = %invcont30
+ call void @llvm.dbg.stoppoint(i32 604, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %13 = call i32 @_ZNK10polynomialIdE6degreeEv(%"struct.polynomial<double>"* %a1) nounwind ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 606, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ br label %bb33
+
+bb32: ; preds = %bb33
+ call void @llvm.dbg.stoppoint(i32 607, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %14 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %dft2, i32 %k15.0) nounwind ; <%"struct.std::complex<double>"*> [#uses=1]
+ %15 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %dft1, i32 %k15.0) nounwind ; <%"struct.std::complex<double>"*> [#uses=1]
+ %16 = call %"struct.std::complex<double>"* @_ZNSt7complexIdEmLIdEERS0_RKS_IT_E(%"struct.std::complex<double>"* %15, %"struct.std::complex<double>"* %14) nounwind ; <%"struct.std::complex<double>"*> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 606, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %17 = add i32 %k15.0, 1 ; <i32> [#uses=1]
+ br label %bb33
+
+bb33: ; preds = %bb32, %invcont31
+ %k15.0 = phi i32 [ 0, %invcont31 ], [ %17, %bb32 ] ; <i32> [#uses=4]
+ call void @llvm.dbg.stoppoint(i32 606, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %18 = icmp ult i32 %k15.0, %13 ; <i1> [#uses=1]
+ br i1 %18, label %bb32, label %bb34
+
+bb34: ; preds = %bb33
+ call void @llvm.dbg.stoppoint(i32 610, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdE11inverse_fftERKS_ISt7complexIdEE(%"struct.polynomial<std::complex<double> >"* noalias sret %0, %"struct.polynomial<std::complex<double> >"* %dft1)
+ to label %invcont35 unwind label %lpad84
+
+invcont35: ; preds = %bb34
+ call void @llvm.dbg.stoppoint(i32 610, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %19 = invoke %"struct.polynomial<std::complex<double> >"* @_ZN10polynomialISt7complexIdEEaSERKS2_(%"struct.polynomial<std::complex<double> >"* %dft2, %"struct.polynomial<std::complex<double> >"* %0)
+ to label %invcont36 unwind label %lpad88 ; <%"struct.polynomial<std::complex<double> >"*> [#uses=0]
+
+invcont36: ; preds = %invcont35
+ call void @llvm.dbg.stoppoint(i32 610, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %0)
+ to label %bb43 unwind label %lpad84
+
+bb43: ; preds = %invcont36
+ call void @llvm.dbg.stoppoint(i32 613, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %20 = add i32 %13, -1 ; <i32> [#uses=2]
+ call void @llvm.dbg.stoppoint(i32 614, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdEC1Ej(%"struct.polynomial<double>"* %agg.result, i32 %20)
+ to label %bb46 unwind label %lpad84
+
+bb45: ; preds = %bb46
+ call void @llvm.dbg.stoppoint(i32 617, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %21 = call double* @_ZN10polynomialIdEixEj(%"struct.polynomial<double>"* %agg.result, i32 %k.0) nounwind ; <double*> [#uses=1]
+ %22 = call %"struct.std::complex<double>"* @_ZN10polynomialISt7complexIdEEixEj(%"struct.polynomial<std::complex<double> >"* %dft2, i32 %k.0) nounwind ; <%"struct.std::complex<double>"*> [#uses=1]
+ %23 = call double* @_ZNSt7complexIdE4realEv(%"struct.std::complex<double>"* %22) nounwind ; <double*> [#uses=1]
+ %24 = load double* %23, align 8 ; <double> [#uses=1]
+ store double %24, double* %21, align 8
+ call void @llvm.dbg.stoppoint(i32 616, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %25 = add i32 %k.0, 1 ; <i32> [#uses=1]
+ br label %bb46
+
+bb46: ; preds = %bb45, %bb43
+ %k.0 = phi i32 [ %25, %bb45 ], [ 0, %bb43 ] ; <i32> [#uses=4]
+ call void @llvm.dbg.stoppoint(i32 616, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ %26 = icmp ult i32 %k.0, %20 ; <i1> [#uses=1]
+ br i1 %26, label %bb45, label %bb47
+
+bb47: ; preds = %bb46
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %dft2)
+ to label %bb54 unwind label %lpad80
+
+bb54: ; preds = %bb47
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %dft1)
+ to label %bb61 unwind label %lpad76
+
+bb61: ; preds = %bb54
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %a2)
+ to label %bb68 unwind label %lpad
+
+bb68: ; preds = %bb61
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %a1)
+ call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1785 to %0*))
+ ret void
+
+lpad: ; preds = %bb61, %entry
+ %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select75 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ br label %ppad
+
+lpad76: ; preds = %bb54, %bb29, %invcont27, %bb26, %invcont24, %bb
+ %eh_ptr77 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select79 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr77, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ br label %ppad112
+
+lpad80: ; preds = %bb47, %invcont30
+ %eh_ptr81 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select83 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr81, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ br label %ppad113
+
+lpad84: ; preds = %bb43, %invcont36, %bb34
+ %eh_ptr85 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select87 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr85, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ br label %ppad114
+
+lpad88: ; preds = %invcont35
+ %eh_ptr89 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
+ %eh_select91 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr89, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 610, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %0)
+ to label %ppad114 unwind label %lpad92
+
+lpad92: ; preds = %lpad88
+ %eh_ptr93 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select95 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr93, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 610, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+lpad96: ; preds = %ppad114
+ %eh_ptr97 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select99 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr97, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+lpad100: ; preds = %ppad113
+ %eh_ptr101 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select103 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr101, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+lpad104: ; preds = %ppad112
+ %eh_ptr105 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select107 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr105, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+lpad108: ; preds = %ppad
+ %eh_ptr109 = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
+ %eh_select111 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr109, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ call void @_ZSt9terminatev() noreturn nounwind
+ unreachable
+
+ppad: ; preds = %ppad112, %lpad
+ %eh_exception.3 = phi i8* [ %eh_ptr, %lpad ], [ %eh_exception.2, %ppad112 ] ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %a1)
+ to label %Unwind unwind label %lpad108
+
+ppad112: ; preds = %ppad113, %lpad76
+ %eh_exception.2 = phi i8* [ %eh_ptr77, %lpad76 ], [ %eh_exception.1, %ppad113 ] ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialIdED1Ev(%"struct.polynomial<double>"* %a2)
+ to label %ppad unwind label %lpad104
+
+ppad113: ; preds = %ppad114, %lpad80
+ %eh_exception.1 = phi i8* [ %eh_ptr81, %lpad80 ], [ %eh_exception.0, %ppad114 ] ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %dft1)
+ to label %ppad112 unwind label %lpad100
+
+ppad114: ; preds = %lpad88, %lpad84
+ %eh_exception.0 = phi i8* [ %eh_ptr85, %lpad84 ], [ %eh_ptr89, %lpad88 ] ; <i8*> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 620, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
+ invoke void @_ZN10polynomialISt7complexIdEED1Ev(%"struct.polynomial<std::complex<double> >"* %dft2)
+ to label %ppad113 unwind label %lpad96
+
+Unwind: ; preds = %ppad
+ call void @_Unwind_Resume(i8* %eh_exception.3)
+ unreachable
+}
+
+declare i32 @strcmp(i8* nocapture, i8* nocapture) nounwind readonly
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, double)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*)
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSo5flushEv(%"struct.std::basic_ostream<char,std::char_traits<char> >"*)
+
+declare extern_weak i32 @pthread_once(i32*, void ()*)
+
+declare extern_weak i8* @pthread_getspecific(i32)
+
+declare extern_weak i32 @pthread_setspecific(i32, i8*)
+
+declare extern_weak i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare extern_weak i32 @pthread_cancel(i32)
+
+declare extern_weak i32 @pthread_mutex_lock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %struct..0._50*)
+
+declare extern_weak i32 @pthread_key_create(i32*, void (i8*)*)
+
+declare extern_weak i32 @pthread_key_delete(i32)
+
+declare extern_weak i32 @pthread_mutexattr_init(%struct..0._50*)
+
+declare extern_weak i32 @pthread_mutexattr_settype(%struct..0._50*, i32)
+
+declare extern_weak i32 @pthread_mutexattr_destroy(%struct..0._50*)
+
+declare i32 @memcmp(i8* nocapture, i8* nocapture, i32) nounwind readonly
diff --git a/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll b/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll
new file mode 100644
index 0000000..c5ebf8e
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll
@@ -0,0 +1,16 @@
+; RUN: opt < %s -scalarrepl | llvm-dis
+; rdar://6808691
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.0"
+ type <{ i32, i16, i8, i8, i64, i64, i16, [0 x i16] }>
+
+define i32 @foo() {
+entry:
+ %.compoundliteral = alloca %0
+ %tmp228 = getelementptr %0* %.compoundliteral, i32 0, i32 7
+ %tmp229 = bitcast [0 x i16]* %tmp228 to i8*
+ call void @llvm.memset.i64(i8* %tmp229, i8 0, i64 0, i32 2)
+ unreachable
+}
+
+declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
diff --git a/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll b/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll
new file mode 100644
index 0000000..aa3487b
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -scalarrepl | llvm-dis
+; PR4146
+
+ %wrapper = type { i1 }
+
+define void @f() {
+entry:
+ %w = alloca %wrapper, align 8 ; <%wrapper*> [#uses=1]
+ %0 = getelementptr %wrapper* %w, i64 0, i32 0 ; <i1*>
+ store i1 true, i1* %0
+ ret void
+}
diff --git a/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll b/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll
new file mode 100644
index 0000000..cecbdd4
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -scalarrepl
+; PR4286
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "x86_64-undermydesk-freebsd8.0"
+ %struct.singlebool = type <{ i8 }>
+
+define zeroext i8 @doit() nounwind {
+entry:
+ %a = alloca %struct.singlebool, align 1 ; <%struct.singlebool*> [#uses=2]
+ %storetmp.i = bitcast %struct.singlebool* %a to i1* ; <i1*> [#uses=1]
+ store i1 true, i1* %storetmp.i
+ %tmp = getelementptr %struct.singlebool* %a, i64 0, i32 0 ; <i8*> [#uses=1]
+ %tmp1 = load i8* %tmp ; <i8> [#uses=1]
+ ret i8 %tmp1
+}
+
diff --git a/test/Transforms/ScalarRepl/2009-08-16-VLA.ll b/test/Transforms/ScalarRepl/2009-08-16-VLA.ll
new file mode 100644
index 0000000..d69af11
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-08-16-VLA.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -scalarrepl -disable-opt
+
+ %struct.Item = type { [4 x i16], %struct.rule* }
+ %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 }
+ %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* }
+ %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* }
+ %struct.list = type { i8*, %struct.list* }
+ %struct.stateMap = type { i8*, %struct.plank*, i32, i16* }
+ %struct.plank = type { i8*, %struct.list*, i32 }
+ %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] }
+ %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* }
+ %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** }
+ %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* }
+ %struct.Index_Map = type { i32, %struct.item_set** }
+ %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* }
+ %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** }
+
+define void @addHP_2_0() {
+bb4.i:
+ %0 = malloc [0 x %struct.Item] ; <[0 x %struct.Item]*> [#uses=1]
+ %.sub.i.c.i = getelementptr [0 x %struct.Item]* %0, i32 0, i32 0 ; <%struct.Item*> [#uses=0]
+ unreachable
+}
diff --git a/test/Transforms/ScalarRepl/2009-12-11-NeonTypes.ll b/test/Transforms/ScalarRepl/2009-12-11-NeonTypes.ll
new file mode 100644
index 0000000..71f66d6
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2009-12-11-NeonTypes.ll
@@ -0,0 +1,89 @@
+; RUN: opt < %s -scalarrepl -S | FileCheck %s
+; Radar 7441282
+
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+target triple = "thumbv7-apple-darwin10"
+
+%struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
+%struct.int16x8_t = type { <8 x i16> }
+%struct.int16x8x2_t = type { [2 x %struct.int16x8_t] }
+%union..0anon = type { %struct.int16x8x2_t }
+
+define arm_apcscc void @test(<8 x i16> %tmp.0, %struct.int16x8x2_t* %dst) nounwind {
+; CHECK: @test
+; CHECK-NOT: alloca
+; CHECK: "alloca point"
+entry:
+ %tmp_addr = alloca %struct.int16x8_t ; <%struct.int16x8_t*> [#uses=3]
+ %dst_addr = alloca %struct.int16x8x2_t* ; <%struct.int16x8x2_t**> [#uses=2]
+ %__rv = alloca %union..0anon ; <%union..0anon*> [#uses=2]
+ %__bx = alloca %struct.int16x8_t ; <%struct.int16x8_t*> [#uses=2]
+ %__ax = alloca %struct.int16x8_t ; <%struct.int16x8_t*> [#uses=2]
+ %tmp2 = alloca %struct.int16x8x2_t ; <%struct.int16x8x2_t*> [#uses=2]
+ %0 = alloca %struct.int16x8x2_t ; <%struct.int16x8x2_t*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %1 = getelementptr inbounds %struct.int16x8_t* %tmp_addr, i32 0, i32 0 ; <<8 x i16>*> [#uses=1]
+ store <8 x i16> %tmp.0, <8 x i16>* %1
+ store %struct.int16x8x2_t* %dst, %struct.int16x8x2_t** %dst_addr
+ %2 = getelementptr inbounds %struct.int16x8_t* %__ax, i32 0, i32 0 ; <<8 x i16>*> [#uses=1]
+ %3 = getelementptr inbounds %struct.int16x8_t* %tmp_addr, i32 0, i32 0 ; <<8 x i16>*> [#uses=1]
+ %4 = load <8 x i16>* %3, align 16 ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %4, <8 x i16>* %2, align 16
+ %5 = getelementptr inbounds %struct.int16x8_t* %__bx, i32 0, i32 0 ; <<8 x i16>*> [#uses=1]
+ %6 = getelementptr inbounds %struct.int16x8_t* %tmp_addr, i32 0, i32 0 ; <<8 x i16>*> [#uses=1]
+ %7 = load <8 x i16>* %6, align 16 ; <<8 x i16>> [#uses=1]
+ store <8 x i16> %7, <8 x i16>* %5, align 16
+ %8 = getelementptr inbounds %struct.int16x8_t* %__ax, i32 0, i32 0 ; <<8 x i16>*> [#uses=1]
+ %9 = load <8 x i16>* %8, align 16 ; <<8 x i16>> [#uses=2]
+ %10 = getelementptr inbounds %struct.int16x8_t* %__bx, i32 0, i32 0 ; <<8 x i16>*> [#uses=1]
+ %11 = load <8 x i16>* %10, align 16 ; <<8 x i16>> [#uses=2]
+ %12 = getelementptr inbounds %union..0anon* %__rv, i32 0, i32 0 ; <%struct.int16x8x2_t*> [#uses=1]
+ %13 = bitcast %struct.int16x8x2_t* %12 to %struct.__neon_int16x8x2_t* ; <%struct.__neon_int16x8x2_t*> [#uses=2]
+ %14 = shufflevector <8 x i16> %9, <8 x i16> %11, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> ; <<8 x i16>> [#uses=1]
+ %15 = getelementptr inbounds %struct.__neon_int16x8x2_t* %13, i32 0, i32 0 ; <<8 x i16>*> [#uses=1]
+ store <8 x i16> %14, <8 x i16>* %15
+ %16 = shufflevector <8 x i16> %9, <8 x i16> %11, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> ; <<8 x i16>> [#uses=1]
+ %17 = getelementptr inbounds %struct.__neon_int16x8x2_t* %13, i32 0, i32 1 ; <<8 x i16>*> [#uses=1]
+ store <8 x i16> %16, <8 x i16>* %17
+ %18 = getelementptr inbounds %union..0anon* %__rv, i32 0, i32 0 ; <%struct.int16x8x2_t*> [#uses=1]
+ %19 = bitcast %struct.int16x8x2_t* %0 to i8* ; <i8*> [#uses=1]
+ %20 = bitcast %struct.int16x8x2_t* %18 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32(i8* %19, i8* %20, i32 32, i32 16)
+ %tmp21 = bitcast %struct.int16x8x2_t* %tmp2 to i8* ; <i8*> [#uses=1]
+ %21 = bitcast %struct.int16x8x2_t* %0 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32(i8* %tmp21, i8* %21, i32 32, i32 16)
+ %22 = load %struct.int16x8x2_t** %dst_addr, align 4 ; <%struct.int16x8x2_t*> [#uses=1]
+ %23 = bitcast %struct.int16x8x2_t* %22 to i8* ; <i8*> [#uses=1]
+ %tmp22 = bitcast %struct.int16x8x2_t* %tmp2 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32(i8* %23, i8* %tmp22, i32 32, i32 16)
+ br label %return
+
+; CHECK: store <8 x i16>
+; CHECK: store <8 x i16>
+
+return: ; preds = %entry
+ ret void
+}
+
+; Radar 7466574
+%struct._NSRange = type { i64 }
+
+define arm_apcscc void @test_memcpy_self() nounwind {
+; CHECK: @test_memcpy_self
+; CHECK-NOT: alloca
+; CHECK: br i1
+entry:
+ %range = alloca %struct._NSRange ; <%struct._NSRange*> [#uses=2]
+ br i1 undef, label %cond.true, label %cond.false
+
+cond.true: ; preds = %entry
+ %tmp3 = bitcast %struct._NSRange* %range to i8* ; <i8*> [#uses=1]
+ %tmp4 = bitcast %struct._NSRange* %range to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32(i8* %tmp3, i8* %tmp4, i32 8, i32 8)
+ ret void
+
+cond.false: ; preds = %entry
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
diff --git a/test/Transforms/ScalarRepl/2010-01-18-SelfCopy.ll b/test/Transforms/ScalarRepl/2010-01-18-SelfCopy.ll
new file mode 100644
index 0000000..74cf251
--- /dev/null
+++ b/test/Transforms/ScalarRepl/2010-01-18-SelfCopy.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -scalarrepl -S | FileCheck %s
+; Radar 7552893
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+
+%struct.test = type { [3 x double ] }
+
+define arm_apcscc void @test_memcpy_self() nounwind {
+; CHECK: @test_memcpy_self
+; CHECK-NOT: alloca
+; CHECK: ret void
+ %1 = alloca %struct.test
+ %2 = bitcast %struct.test* %1 to i8*
+ call void @llvm.memcpy.i32(i8* %2, i8* %2, i32 24, i32 4)
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
diff --git a/test/Transforms/ScalarRepl/AggregatePromote.ll b/test/Transforms/ScalarRepl/AggregatePromote.ll
new file mode 100644
index 0000000..16b3273
--- /dev/null
+++ b/test/Transforms/ScalarRepl/AggregatePromote.ll
@@ -0,0 +1,51 @@
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: not grep alloca
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.0.0"
+
+define i64 @test1(i64 %X) {
+ %A = alloca i64 ; <i64*> [#uses=3]
+ store i64 %X, i64* %A
+ %B = bitcast i64* %A to i32* ; <i32*> [#uses=1]
+ %C = bitcast i32* %B to i8* ; <i8*> [#uses=1]
+ store i8 0, i8* %C
+ %Y = load i64* %A ; <i64> [#uses=1]
+ ret i64 %Y
+}
+
+define i8 @test2(i64 %X) {
+ %X_addr = alloca i64 ; <i64*> [#uses=2]
+ store i64 %X, i64* %X_addr
+ %tmp.0 = bitcast i64* %X_addr to i32* ; <i32*> [#uses=1]
+ %tmp.1 = getelementptr i32* %tmp.0, i32 1 ; <i32*> [#uses=1]
+ %tmp.2 = bitcast i32* %tmp.1 to i8* ; <i8*> [#uses=1]
+ %tmp.3 = getelementptr i8* %tmp.2, i32 3 ; <i8*> [#uses=1]
+ %tmp.2.upgrd.1 = load i8* %tmp.3 ; <i8> [#uses=1]
+ ret i8 %tmp.2.upgrd.1
+}
+
+define i16 @crafty(i64 %X) {
+ %a = alloca { i64 } ; <{ i64 }*> [#uses=2]
+ %tmp.0 = getelementptr { i64 }* %a, i32 0, i32 0 ; <i64*> [#uses=1]
+ store i64 %X, i64* %tmp.0
+ %tmp.3 = bitcast { i64 }* %a to [4 x i16]* ; <[4 x i16]*> [#uses=2]
+ %tmp.4 = getelementptr [4 x i16]* %tmp.3, i32 0, i32 3 ; <i16*> [#uses=1]
+ %tmp.5 = load i16* %tmp.4 ; <i16> [#uses=1]
+ %tmp.8 = getelementptr [4 x i16]* %tmp.3, i32 0, i32 2 ; <i16*> [#uses=1]
+ %tmp.9 = load i16* %tmp.8 ; <i16> [#uses=1]
+ %tmp.10 = or i16 %tmp.9, %tmp.5 ; <i16> [#uses=1]
+ ret i16 %tmp.10
+}
+
+define i16 @crafty2(i64 %X) {
+ %a = alloca i64 ; <i64*> [#uses=2]
+ store i64 %X, i64* %a
+ %tmp.3 = bitcast i64* %a to [4 x i16]* ; <[4 x i16]*> [#uses=2]
+ %tmp.4 = getelementptr [4 x i16]* %tmp.3, i32 0, i32 3 ; <i16*> [#uses=1]
+ %tmp.5 = load i16* %tmp.4 ; <i16> [#uses=1]
+ %tmp.8 = getelementptr [4 x i16]* %tmp.3, i32 0, i32 2 ; <i16*> [#uses=1]
+ %tmp.9 = load i16* %tmp.8 ; <i16> [#uses=1]
+ %tmp.10 = or i16 %tmp.9, %tmp.5 ; <i16> [#uses=1]
+ ret i16 %tmp.10
+}
diff --git a/test/Transforms/ScalarRepl/DifferingTypes.ll b/test/Transforms/ScalarRepl/DifferingTypes.ll
new file mode 100644
index 0000000..933c47f
--- /dev/null
+++ b/test/Transforms/ScalarRepl/DifferingTypes.ll
@@ -0,0 +1,16 @@
+; This is a feature test. Hopefully one day this will be implemented. The
+; generated code should perform the appropriate masking operations required
+; depending on the endianness of the target...
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: not grep alloca
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define i32 @testfunc(i32 %i, i8 %j) {
+ %I = alloca i32 ; <i32*> [#uses=3]
+ store i32 %i, i32* %I
+ %P = bitcast i32* %I to i8* ; <i8*> [#uses=1]
+ store i8 %j, i8* %P
+ %t = load i32* %I ; <i32> [#uses=1]
+ ret i32 %t
+}
+
diff --git a/test/Transforms/ScalarRepl/arraytest.ll b/test/Transforms/ScalarRepl/arraytest.ll
new file mode 100644
index 0000000..06a928c
--- /dev/null
+++ b/test/Transforms/ScalarRepl/arraytest.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -scalarrepl -mem2reg -S | not grep alloca
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define i32 @test() {
+ %X = alloca [4 x i32] ; <[4 x i32]*> [#uses=1]
+ %Y = getelementptr [4 x i32]* %X, i64 0, i64 0 ; <i32*> [#uses=2]
+ store i32 0, i32* %Y
+ %Z = load i32* %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/ScalarRepl/badarray.ll b/test/Transforms/ScalarRepl/badarray.ll
new file mode 100644
index 0000000..3ec3c01
--- /dev/null
+++ b/test/Transforms/ScalarRepl/badarray.ll
@@ -0,0 +1,57 @@
+; RUN: opt < %s -scalarrepl -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+
+
+; PR3466
+; Off end of array, don't transform.
+define i32 @test1() {
+; CHECK: @test1
+; CHECK-NOT: = alloca
+ %X = alloca [4 x i32]
+ %Y = getelementptr [4 x i32]* %X, i64 0, i64 6 ; <i32*> [#uses=2]
+ store i32 0, i32* %Y
+ %Z = load i32* %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
+
+; Off end of array, don't transform.
+define i32 @test2() nounwind {
+entry:
+; CHECK: @test2
+; CHECK-NOT: = alloca
+ %yx2.i = alloca float, align 4 ; <float*> [#uses=1]
+ %yx26.i = bitcast float* %yx2.i to i64* ; <i64*> [#uses=1]
+ %0 = load i64* %yx26.i, align 8 ; <i64> [#uses=0]
+ unreachable
+}
+
+%base = type { i32, [0 x i8] }
+%padded = type { %base, [1 x i32] }
+
+; PR5436
+define void @test3() {
+entry:
+; CHECK: @test3
+; CHECK-NOT: = alloca
+; CHECK: store i64
+ %var_1 = alloca %padded, align 8 ; <%padded*> [#uses=3]
+ %0 = getelementptr inbounds %padded* %var_1, i32 0, i32 0 ; <%base*> [#uses=2]
+
+ %p2 = getelementptr inbounds %base* %0, i32 0, i32 1, i32 0 ; <i8*> [#uses=1]
+ store i8 72, i8* %p2, align 1
+
+ ; 72 -> a[0].
+
+ %callret = call %padded *@test3f() ; <i32> [#uses=2]
+ %callretcast = bitcast %padded* %callret to i8* ; <i8*> [#uses=1]
+ %var_11 = bitcast %padded* %var_1 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32(i8* %callretcast, i8* %var_11, i32 8, i32 4)
+ ret void
+}
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
+
+declare %padded* @test3f()
diff --git a/test/Transforms/ScalarRepl/basictest.ll b/test/Transforms/ScalarRepl/basictest.ll
new file mode 100644
index 0000000..a26b62d
--- /dev/null
+++ b/test/Transforms/ScalarRepl/basictest.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -scalarrepl -mem2reg -S | not grep alloca
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define i32 @test() {
+ %X = alloca { i32, float } ; <{ i32, float }*> [#uses=1]
+ %Y = getelementptr { i32, float }* %X, i64 0, i32 0 ; <i32*> [#uses=2]
+ store i32 0, i32* %Y
+ %Z = load i32* %Y ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
diff --git a/test/Transforms/ScalarRepl/bitfield-sroa.ll b/test/Transforms/ScalarRepl/bitfield-sroa.ll
new file mode 100644
index 0000000..3728658
--- /dev/null
+++ b/test/Transforms/ScalarRepl/bitfield-sroa.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+; rdar://6532315
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+%t = type { { i32, i16, i8, i8 } }
+
+define i8 @foo(i64 %A) {
+ %ALL = alloca %t, align 8
+ %tmp59172 = bitcast %t* %ALL to i64*
+ store i64 %A, i64* %tmp59172, align 8
+ %C = getelementptr %t* %ALL, i32 0, i32 0, i32 1
+ %D = bitcast i16* %C to i32*
+ %E = load i32* %D, align 4
+ %F = bitcast %t* %ALL to i8*
+ %G = load i8* %F, align 8
+ ret i8 %G
+}
+
diff --git a/test/Transforms/ScalarRepl/copy-aggregate.ll b/test/Transforms/ScalarRepl/copy-aggregate.ll
new file mode 100644
index 0000000..2992413
--- /dev/null
+++ b/test/Transforms/ScalarRepl/copy-aggregate.ll
@@ -0,0 +1,58 @@
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+; PR3290
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+;; Store of integer to whole alloca struct.
+define i32 @test1(i64 %V) nounwind {
+ %X = alloca {{i32, i32}}
+ %Y = bitcast {{i32,i32}}* %X to i64*
+ store i64 %V, i64* %Y
+
+ %A = getelementptr {{i32,i32}}* %X, i32 0, i32 0, i32 0
+ %B = getelementptr {{i32,i32}}* %X, i32 0, i32 0, i32 1
+ %a = load i32* %A
+ %b = load i32* %B
+ %c = add i32 %a, %b
+ ret i32 %c
+}
+
+;; Store of integer to whole struct/array alloca.
+define float @test2(i128 %V) nounwind {
+ %X = alloca {[4 x float]}
+ %Y = bitcast {[4 x float]}* %X to i128*
+ store i128 %V, i128* %Y
+
+ %A = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 0
+ %B = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 3
+ %a = load float* %A
+ %b = load float* %B
+ %c = fadd float %a, %b
+ ret float %c
+}
+
+;; Load of whole alloca struct as integer
+define i64 @test3(i32 %a, i32 %b) nounwind {
+ %X = alloca {{i32, i32}}
+
+ %A = getelementptr {{i32,i32}}* %X, i32 0, i32 0, i32 0
+ %B = getelementptr {{i32,i32}}* %X, i32 0, i32 0, i32 1
+ store i32 %a, i32* %A
+ store i32 %b, i32* %B
+
+ %Y = bitcast {{i32,i32}}* %X to i64*
+ %Z = load i64* %Y
+ ret i64 %Z
+}
+
+;; load of integer from whole struct/array alloca.
+define i128 @test4(float %a, float %b) nounwind {
+ %X = alloca {[4 x float]}
+ %A = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 0
+ %B = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 3
+ store float %a, float* %A
+ store float %b, float* %B
+
+ %Y = bitcast {[4 x float]}* %X to i128*
+ %V = load i128* %Y
+ ret i128 %V
+}
diff --git a/test/Transforms/ScalarRepl/debuginfo.ll b/test/Transforms/ScalarRepl/debuginfo.ll
new file mode 100644
index 0000000..6b8422c
--- /dev/null
+++ b/test/Transforms/ScalarRepl/debuginfo.ll
@@ -0,0 +1,106 @@
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+ %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }* }
+ %llvm.dbg.derivedtype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }* }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
+ %struct.Sphere = type { %struct.Vec }
+ %struct.Vec = type { i32, i32, i32 }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"r.cpp\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"/tmp\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 4, i8* getelementptr ([6 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"Vec\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"x\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([2 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, i64 32, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"y\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([2 x i8]* @.str6, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, i64 32, i64 32, i64 32, i32 0, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"z\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([2 x i8]* @.str8, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, i64 32, i64 32, i64 64, i32 0, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite18 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458790, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 96, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite18 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458768, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype11 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x { }*] [ { }* null, { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype10 to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype12 to { }*) ], section "llvm.metadata" ; <[3 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([3 x { }*]* @llvm.dbg.array to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 2, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite13 to { }*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x { }*] [ { }* null, { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype10 to { }*), { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) ], section "llvm.metadata" ; <[5 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([5 x { }*]* @llvm.dbg.array14 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 5, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite15 to { }*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [5 x { }*] [ { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype7 to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype9 to { }*), { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram16 to { }*) ], section "llvm.metadata" ; <[5 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 2, i64 96, i64 32, i64 0, i32 0, { }* null, { }* bitcast ([5 x { }*]* @llvm.dbg.array17 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite18 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [5 x { }*] [ { }* null, { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype19 to { }*), { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) ], section "llvm.metadata" ; <[5 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([5 x { }*]* @llvm.dbg.array20 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [13 x i8] c"__comp_ctor \00", section "llvm.metadata" ; <[13 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_ZN3VecC1Eiii\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [3 x { }*] [ { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite18 to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype12 to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype12 to { }*) ], section "llvm.metadata" ; <[3 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([3 x { }*]* @llvm.dbg.array32 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"operator-\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [14 x i8] c"_ZmiRK3VecS1_\00", section "llvm.metadata" ; <[14 x i8]*> [#uses=1]
[email protected] = internal constant [7 x i8] c"Sphere\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [7 x i8] c"center\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458765, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([7 x i8]* @.str43, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 14, i64 96, i64 32, i64 0, i32 1, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite18 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite52 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x { }*] [ { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype45 to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype12 to { }*) ], section "llvm.metadata" ; <[3 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([3 x { }*]* @llvm.dbg.array46 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant [11 x i8] c"ray_sphere\00", section "llvm.metadata" ; <[11 x i8]*> [#uses=1]
[email protected] = internal constant [30 x i8] c"_ZN6Sphere10ray_sphereERK3Vec\00", section "llvm.metadata" ; <[30 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([11 x i8]* @.str48, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str48, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str49, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 16, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite47 to { }*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x { }*] [ { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype44 to { }*), { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram50 to { }*) ], section "llvm.metadata" ; <[2 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458771, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([7 x i8]* @.str41, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 12, i64 96, i64 32, i64 0, i32 0, { }* null, { }* bitcast ([2 x { }*]* @llvm.dbg.array51 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 458767, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite52 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [3 x { }*] [ { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype53 to { }*), { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype12 to { }*) ], section "llvm.metadata" ; <[3 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([3 x { }*]* @llvm.dbg.array54 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([11 x i8]* @.str48, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str48, i32 0, i32 0), i8* getelementptr ([30 x i8]* @.str49, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 16, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite55 to { }*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"v\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459008, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram56 to { }*), i8* getelementptr ([2 x i8]* @.str61, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 17, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite18 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1]
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.declare({ }*, { }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind
+
+define i32 @_ZN6Sphere10ray_sphereERK3Vec(%struct.Sphere* %this, %struct.Vec* %Orig) nounwind {
+entry:
+ %v = alloca %struct.Vec, align 8 ; <%struct.Vec*> [#uses=4]
+ call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram56 to { }*))
+ %0 = bitcast %struct.Vec* %v to { }* ; <{ }*> [#uses=1]
+ call void @llvm.dbg.declare({ }* %0, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable62 to { }*))
+ %1 = getelementptr %struct.Sphere* %this, i32 0, i32 0, i32 2 ; <i32*> [#uses=1]
+ %2 = load i32* %1, align 4 ; <i32> [#uses=1]
+ %3 = getelementptr %struct.Vec* %Orig, i32 0, i32 2 ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 4 ; <i32> [#uses=1]
+ %5 = sub i32 %2, %4 ; <i32> [#uses=1]
+ %6 = getelementptr %struct.Sphere* %this, i32 0, i32 0, i32 1 ; <i32*> [#uses=1]
+ %7 = load i32* %6, align 4 ; <i32> [#uses=1]
+ %8 = getelementptr %struct.Vec* %Orig, i32 0, i32 1 ; <i32*> [#uses=1]
+ %9 = load i32* %8, align 4 ; <i32> [#uses=1]
+ %10 = sub i32 %7, %9 ; <i32> [#uses=1]
+ %11 = getelementptr %struct.Sphere* %this, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %12 = load i32* %11, align 4 ; <i32> [#uses=1]
+ %13 = getelementptr %struct.Vec* %Orig, i32 0, i32 0 ; <i32*> [#uses=1]
+ %14 = load i32* %13, align 4 ; <i32> [#uses=1]
+ %15 = sub i32 %12, %14 ; <i32> [#uses=1]
+ %16 = getelementptr %struct.Vec* %v, i32 0, i32 0 ; <i32*> [#uses=2]
+ store i32 %15, i32* %16, align 8
+ %17 = getelementptr %struct.Vec* %v, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 %10, i32* %17, align 4
+ %18 = getelementptr %struct.Vec* %v, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 %5, i32* %18, align 8
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*)) nounwind
+ call void @llvm.dbg.stoppoint(i32 9, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*)) nounwind
+ %19 = load i32* %16, align 8 ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 18, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram56 to { }*))
+ ret i32 %19
+}
diff --git a/test/Transforms/ScalarRepl/dg.exp b/test/Transforms/ScalarRepl/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/ScalarRepl/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/ScalarRepl/load-store-aggregate.ll b/test/Transforms/ScalarRepl/load-store-aggregate.ll
new file mode 100644
index 0000000..c5008ac1
--- /dev/null
+++ b/test/Transforms/ScalarRepl/load-store-aggregate.ll
@@ -0,0 +1,31 @@
+; This testcase shows that scalarrepl is able to replace struct alloca's which
+; are directly loaded from or stored to (using the first class aggregates
+; feature).
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+; RUN: opt < %s -scalarrepl -S > %t
+; RUN: cat %t | not grep alloca
+
+%struct.foo = type { i32, i32 }
+
+define i32 @test(%struct.foo* %P) {
+entry:
+ %L = alloca %struct.foo, align 8 ; <%struct.foo*> [#uses=2]
+ %V = load %struct.foo* %P
+ store %struct.foo %V, %struct.foo* %L
+
+ %tmp4 = getelementptr %struct.foo* %L, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp5 = load i32* %tmp4 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+define %struct.foo @test2(i32 %A, i32 %B) {
+entry:
+ %L = alloca %struct.foo, align 8 ; <%struct.foo*> [#uses=2]
+ %L.0 = getelementptr %struct.foo* %L, i32 0, i32 0
+ store i32 %A, i32* %L.0
+ %L.1 = getelementptr %struct.foo* %L, i32 0, i32 1
+ store i32 %B, i32* %L.1
+ %V = load %struct.foo* %L
+ ret %struct.foo %V
+}
diff --git a/test/Transforms/ScalarRepl/memcpy-from-global.ll b/test/Transforms/ScalarRepl/memcpy-from-global.ll
new file mode 100644
index 0000000..8152785
--- /dev/null
+++ b/test/Transforms/ScalarRepl/memcpy-from-global.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -scalarrepl -S | not grep {call.*memcpy}
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
[email protected] = internal constant [128 x float] [ float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 ], align 32 ; <[128 x float]*> [#uses=1]
+
+define float @grad4(i32 %hash, float %x, float %y, float %z, float %w) {
+entry:
+ %lookupTable = alloca [128 x float], align 16 ; <[128 x float]*> [#uses=5]
+ %lookupTable1 = bitcast [128 x float]* %lookupTable to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %lookupTable1, i8* bitcast ([128 x float]* @C.0.1248 to i8*), i32 512, i32 16 )
+ %tmp3 = shl i32 %hash, 2 ; <i32> [#uses=1]
+ %tmp5 = and i32 %tmp3, 124 ; <i32> [#uses=4]
+ %tmp753 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp5 ; <float*> [#uses=1]
+ %tmp9 = load float* %tmp753 ; <float> [#uses=1]
+ %tmp11 = fmul float %tmp9, %x ; <float> [#uses=1]
+ %tmp13 = fadd float %tmp11, 0.000000e+00 ; <float> [#uses=1]
+ %tmp17.sum52 = or i32 %tmp5, 1 ; <i32> [#uses=1]
+ %tmp1851 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp17.sum52 ; <float*> [#uses=1]
+ %tmp19 = load float* %tmp1851 ; <float> [#uses=1]
+ %tmp21 = fmul float %tmp19, %y ; <float> [#uses=1]
+ %tmp23 = fadd float %tmp21, %tmp13 ; <float> [#uses=1]
+ %tmp27.sum50 = or i32 %tmp5, 2 ; <i32> [#uses=1]
+ %tmp2849 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp27.sum50 ; <float*> [#uses=1]
+ %tmp29 = load float* %tmp2849 ; <float> [#uses=1]
+ %tmp31 = fmul float %tmp29, %z ; <float> [#uses=1]
+ %tmp33 = fadd float %tmp31, %tmp23 ; <float> [#uses=1]
+ %tmp37.sum48 = or i32 %tmp5, 3 ; <i32> [#uses=1]
+ %tmp3847 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp37.sum48 ; <float*> [#uses=1]
+ %tmp39 = load float* %tmp3847 ; <float> [#uses=1]
+ %tmp41 = fmul float %tmp39, %w ; <float> [#uses=1]
+ %tmp43 = fadd float %tmp41, %tmp33 ; <float> [#uses=1]
+ ret float %tmp43
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/Transforms/ScalarRepl/memset-aggregate-byte-leader.ll b/test/Transforms/ScalarRepl/memset-aggregate-byte-leader.ll
new file mode 100644
index 0000000..0d61e5a
--- /dev/null
+++ b/test/Transforms/ScalarRepl/memset-aggregate-byte-leader.ll
@@ -0,0 +1,23 @@
+; PR1226
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: not grep {call void @llvm.memcpy.i32}
+; RUN: opt < %s -scalarrepl -S | grep getelementptr
+; END.
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8.8.0"
+ %struct.foo = type { i8, i8 }
+
+
+define i32 @test1(%struct.foo* %P) {
+entry:
+ %L = alloca %struct.foo, align 2 ; <%struct.foo*> [#uses=1]
+ %L2 = getelementptr %struct.foo* %L, i32 0, i32 0 ; <i8*> [#uses=2]
+ %tmp13 = getelementptr %struct.foo* %P, i32 0, i32 0 ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %L2, i8* %tmp13, i32 2, i32 1 )
+ %tmp5 = load i8* %L2 ; <i8> [#uses=1]
+ %tmp56 = sext i8 %tmp5 to i32 ; <i32> [#uses=1]
+ ret i32 %tmp56
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/Transforms/ScalarRepl/memset-aggregate.ll b/test/Transforms/ScalarRepl/memset-aggregate.ll
new file mode 100644
index 0000000..5aeefcd
--- /dev/null
+++ b/test/Transforms/ScalarRepl/memset-aggregate.ll
@@ -0,0 +1,66 @@
+; PR1226
+; RUN: opt < %s -scalarrepl -S | grep {ret i32 16843009}
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+; RUN: opt < %s -scalarrepl -instcombine -S | grep {ret i16 514}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+ %struct.bar = type { %struct.foo, i64, double }
+ %struct.foo = type { i32, i32 }
+
+
+define i32 @test1(%struct.foo* %P) {
+entry:
+ %L = alloca %struct.foo, align 8 ; <%struct.foo*> [#uses=2]
+ %L2 = bitcast %struct.foo* %L to i8* ; <i8*> [#uses=1]
+ %tmp13 = bitcast %struct.foo* %P to i8* ; <i8*> [#uses=1]
+ call void @llvm.memcpy.i32( i8* %L2, i8* %tmp13, i32 8, i32 4 )
+ %tmp4 = getelementptr %struct.foo* %L, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp5 = load i32* %tmp4 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+define i32 @test2() {
+entry:
+ %L = alloca [4 x %struct.foo], align 16 ; <[4 x %struct.foo]*> [#uses=2]
+ %L12 = bitcast [4 x %struct.foo]* %L to i8* ; <i8*> [#uses=1]
+ call void @llvm.memset.i32( i8* %L12, i8 0, i32 32, i32 16 )
+ %tmp4 = getelementptr [4 x %struct.foo]* %L, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp5 = load i32* %tmp4 ; <i32> [#uses=1]
+ ret i32 %tmp5
+}
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
+define i32 @test3() {
+entry:
+ %B = alloca %struct.bar, align 16 ; <%struct.bar*> [#uses=4]
+ %B1 = bitcast %struct.bar* %B to i8* ; <i8*> [#uses=1]
+ call void @llvm.memset.i32( i8* %B1, i8 1, i32 24, i32 16 )
+ %tmp3 = getelementptr %struct.bar* %B, i32 0, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp3
+ %tmp4 = getelementptr %struct.bar* %B, i32 0, i32 2 ; <double*> [#uses=1]
+ store double 1.000000e+01, double* %tmp4
+ %tmp6 = getelementptr %struct.bar* %B, i32 0, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp7 = load i32* %tmp6 ; <i32> [#uses=1]
+ ret i32 %tmp7
+}
+
+
+ %struct.f = type { i32, i32, i32, i32, i32, i32 }
+
+define i16 @test4() nounwind {
+entry:
+ %A = alloca %struct.f, align 8 ; <%struct.f*> [#uses=3]
+ %0 = getelementptr %struct.f* %A, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %0, align 8
+ %1 = getelementptr %struct.f* %A, i32 0, i32 1 ; <i32*> [#uses=1]
+ %2 = bitcast i32* %1 to i8* ; <i8*> [#uses=1]
+ call void @llvm.memset.i32(i8* %2, i8 2, i32 12, i32 4)
+ %3 = getelementptr %struct.f* %A, i32 0, i32 2 ; <i32*> [#uses=1]
+ %4 = load i32* %3, align 8 ; <i32> [#uses=1]
+ %retval12 = trunc i32 %4 to i16 ; <i16> [#uses=1]
+ ret i16 %retval12
+}
diff --git a/test/Transforms/ScalarRepl/nonzero-first-index.ll b/test/Transforms/ScalarRepl/nonzero-first-index.ll
new file mode 100644
index 0000000..60f414b
--- /dev/null
+++ b/test/Transforms/ScalarRepl/nonzero-first-index.ll
@@ -0,0 +1,53 @@
+; RUN: opt < %s -scalarrepl -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+
+%nested = type { i32, [4 x i32] }
+
+; Check that a GEP with a non-zero first index does not prevent SROA as long
+; as the resulting offset corresponds to an element in the alloca.
+define i32 @test1() {
+; CHECK: @test1
+; CHECK-NOT: = i160
+; CHECK: ret i32 undef
+ %A = alloca %nested
+ %B = getelementptr %nested* %A, i32 0, i32 1, i32 0
+ %C = getelementptr i32* %B, i32 2
+ %D = load i32* %C
+ ret i32 %D
+}
+
+; But, if the offset is out of range, then it should not be transformed.
+define i32 @test2() {
+; CHECK: @test2
+; CHECK: i160
+ %A = alloca %nested
+ %B = getelementptr %nested* %A, i32 0, i32 1, i32 0
+ %C = getelementptr i32* %B, i32 4
+ %D = load i32* %C
+ ret i32 %D
+}
+
+; Try it with a bitcast and single GEP....
+define i32 @test3() {
+; CHECK: @test3
+; CHECK-NOT: = i160
+; CHECK: ret i32 undef
+ %A = alloca %nested
+ %B = bitcast %nested* %A to i32*
+ %C = getelementptr i32* %B, i32 2
+ %D = load i32* %C
+ ret i32 %D
+}
+
+; ...and again make sure that out-of-range accesses are not transformed.
+define i32 @test4() {
+; CHECK: @test4
+; CHECK: i160
+ %A = alloca %nested
+ %B = bitcast %nested* %A to i32*
+ %C = getelementptr i32* %B, i32 -1
+ %D = load i32* %C
+ ret i32 %D
+}
diff --git a/test/Transforms/ScalarRepl/not-a-vector.ll b/test/Transforms/ScalarRepl/not-a-vector.ll
new file mode 100644
index 0000000..f873456
--- /dev/null
+++ b/test/Transforms/ScalarRepl/not-a-vector.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+; RUN: opt < %s -scalarrepl -S | not grep {7 x double}
+; RUN: opt < %s -scalarrepl -instcombine -S | grep {ret double %B}
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define double @test(double %A, double %B) {
+ %ARR = alloca [7 x i64]
+ %C = bitcast [7 x i64]* %ARR to double*
+ store double %A, double* %C
+
+ %D = getelementptr [7 x i64]* %ARR, i32 0, i32 4
+ %E = bitcast i64* %D to double*
+ store double %B, double* %E
+
+ %F = getelementptr double* %C, i32 4
+ %G = load double* %F
+ ret double %G
+}
+
+
diff --git a/test/Transforms/ScalarRepl/phinodepromote.ll b/test/Transforms/ScalarRepl/phinodepromote.ll
new file mode 100644
index 0000000..9c6e8b9
--- /dev/null
+++ b/test/Transforms/ScalarRepl/phinodepromote.ll
@@ -0,0 +1,34 @@
+; RUN: opt < %s -simplifycfg -instcombine -mem2reg -S | not grep alloca
+;
+; This tests to see if mem2reg can promote alloca instructions whose addresses
+; are used by PHI nodes that are immediately loaded. The LLVM C++ front-end
+; often generates code that looks like this (when it codegen's ?: exprs as
+; lvalues), so handling this simple extension is quite useful.
+;
+; This testcase is what the following program looks like when it reaches
+; instcombine:
+;
+; template<typename T>
+; const T& max(const T& a1, const T& a2) { return a1 < a2 ? a1 : a2; }
+; int main() { return max(0, 1); }
+;
+; This test checks to make sure the combination of instcombine and mem2reg
+; perform the transformation.
+
+define i32 @main() {
+entry:
+ %mem_tmp.0 = alloca i32 ; <i32*> [#uses=3]
+ %mem_tmp.1 = alloca i32 ; <i32*> [#uses=3]
+ store i32 0, i32* %mem_tmp.0
+ store i32 1, i32* %mem_tmp.1
+ %tmp.1.i = load i32* %mem_tmp.1 ; <i32> [#uses=1]
+ %tmp.3.i = load i32* %mem_tmp.0 ; <i32> [#uses=1]
+ %tmp.4.i = icmp sle i32 %tmp.1.i, %tmp.3.i ; <i1> [#uses=1]
+ br i1 %tmp.4.i, label %cond_true.i, label %cond_continue.i
+cond_true.i: ; preds = %entry
+ br label %cond_continue.i
+cond_continue.i: ; preds = %cond_true.i, %entry
+ %mem_tmp.i.0 = phi i32* [ %mem_tmp.1, %cond_true.i ], [ %mem_tmp.0, %entry ] ; <i32*> [#uses=1]
+ %tmp.3 = load i32* %mem_tmp.i.0 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
diff --git a/test/Transforms/ScalarRepl/select_promote.ll b/test/Transforms/ScalarRepl/select_promote.ll
new file mode 100644
index 0000000..d6b2b75
--- /dev/null
+++ b/test/Transforms/ScalarRepl/select_promote.ll
@@ -0,0 +1,18 @@
+; Test promotion of loads that use the result of a select instruction. This
+; should be simplified by the instcombine pass.
+
+; RUN: opt < %s -instcombine -mem2reg -S | not grep alloca
+
+define i32 @main() {
+ %mem_tmp.0 = alloca i32 ; <i32*> [#uses=3]
+ %mem_tmp.1 = alloca i32 ; <i32*> [#uses=3]
+ store i32 0, i32* %mem_tmp.0
+ store i32 1, i32* %mem_tmp.1
+ %tmp.1.i = load i32* %mem_tmp.1 ; <i32> [#uses=1]
+ %tmp.3.i = load i32* %mem_tmp.0 ; <i32> [#uses=1]
+ %tmp.4.i = icmp sle i32 %tmp.1.i, %tmp.3.i ; <i1> [#uses=1]
+ %mem_tmp.i.0 = select i1 %tmp.4.i, i32* %mem_tmp.1, i32* %mem_tmp.0 ; <i32*> [#uses=1]
+ %tmp.3 = load i32* %mem_tmp.i.0 ; <i32> [#uses=1]
+ ret i32 %tmp.3
+}
+
diff --git a/test/Transforms/ScalarRepl/sroa-fca.ll b/test/Transforms/ScalarRepl/sroa-fca.ll
new file mode 100644
index 0000000..2df3b9b
--- /dev/null
+++ b/test/Transforms/ScalarRepl/sroa-fca.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -scalarrepl | llvm-dis
+; Make sure that SROA "scalar conversion" can handle first class aggregates.
+
+define i64 @test({i32, i32} %A) {
+ %X = alloca i64
+ %Y = bitcast i64* %X to {i32,i32}*
+ store {i32,i32} %A, {i32,i32}* %Y
+
+ %Q = load i64* %X
+ ret i64 %Q
+}
+
+define {i32,i32} @test2(i64 %A) {
+ %X = alloca i64
+ %Y = bitcast i64* %X to {i32,i32}*
+ store i64 %A, i64* %X
+
+ %Q = load {i32,i32}* %Y
+ ret {i32,i32} %Q
+}
+
diff --git a/test/Transforms/ScalarRepl/sroa_two.ll b/test/Transforms/ScalarRepl/sroa_two.ll
new file mode 100644
index 0000000..d8aa26d
--- /dev/null
+++ b/test/Transforms/ScalarRepl/sroa_two.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -scalarrepl | llvm-dis
+
+define i32 @test(i32 %X) {
+ %Arr = alloca [2 x i32] ; <[2 x i32]*> [#uses=3]
+ %tmp.0 = getelementptr [2 x i32]* %Arr, i32 0, i32 0 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp.0
+ %tmp.1 = getelementptr [2 x i32]* %Arr, i32 0, i32 1 ; <i32*> [#uses=1]
+ store i32 2, i32* %tmp.1
+ %tmp.3 = getelementptr [2 x i32]* %Arr, i32 0, i32 %X ; <i32*> [#uses=1]
+ %tmp.4 = load i32* %tmp.3 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+}
+
diff --git a/test/Transforms/ScalarRepl/union-fp-int.ll b/test/Transforms/ScalarRepl/union-fp-int.ll
new file mode 100644
index 0000000..8b7e50d
--- /dev/null
+++ b/test/Transforms/ScalarRepl/union-fp-int.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: not grep alloca
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: grep {bitcast.*float.*i32}
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define i32 @test(float %X) {
+ %X_addr = alloca float ; <float*> [#uses=2]
+ store float %X, float* %X_addr
+ %X_addr.upgrd.1 = bitcast float* %X_addr to i32* ; <i32*> [#uses=1]
+ %tmp = load i32* %X_addr.upgrd.1 ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
diff --git a/test/Transforms/ScalarRepl/union-packed.ll b/test/Transforms/ScalarRepl/union-packed.ll
new file mode 100644
index 0000000..b272abf
--- /dev/null
+++ b/test/Transforms/ScalarRepl/union-packed.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: not grep alloca
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: grep bitcast
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define <4 x i32> @test(<4 x float> %X) {
+ %X_addr = alloca <4 x float> ; <<4 x float>*> [#uses=2]
+ store <4 x float> %X, <4 x float>* %X_addr
+ %X_addr.upgrd.1 = bitcast <4 x float>* %X_addr to <4 x i32>* ; <<4 x i32>*> [#uses=1]
+ %tmp = load <4 x i32>* %X_addr.upgrd.1 ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %tmp
+}
+
diff --git a/test/Transforms/ScalarRepl/union-pointer.ll b/test/Transforms/ScalarRepl/union-pointer.ll
new file mode 100644
index 0000000..fe702fa
--- /dev/null
+++ b/test/Transforms/ScalarRepl/union-pointer.ll
@@ -0,0 +1,41 @@
+; PR892
+; RUN: opt < %s -scalarrepl -S | \
+; RUN: not grep alloca
+; RUN: opt < %s -scalarrepl -S | grep {ret i8}
+
+target datalayout = "e-p:32:32"
+target triple = "i686-apple-darwin8.7.2"
+ %struct.Val = type { i32*, i32 }
+
+define i8* @test(i16* %X) {
+ %X_addr = alloca i16* ; <i16**> [#uses=2]
+ store i16* %X, i16** %X_addr
+ %X_addr.upgrd.1 = bitcast i16** %X_addr to i8** ; <i8**> [#uses=1]
+ %tmp = load i8** %X_addr.upgrd.1 ; <i8*> [#uses=1]
+ ret i8* %tmp
+}
+
+define void @test2(i64 %Op.0) {
+ %tmp = alloca %struct.Val, align 8 ; <%struct.Val*> [#uses=3]
+ %tmp1 = alloca %struct.Val, align 8 ; <%struct.Val*> [#uses=3]
+ %tmp.upgrd.2 = call i64 @_Z3foov( ) ; <i64> [#uses=1]
+ %tmp1.upgrd.3 = bitcast %struct.Val* %tmp1 to i64* ; <i64*> [#uses=1]
+ store i64 %tmp.upgrd.2, i64* %tmp1.upgrd.3
+ %tmp.upgrd.4 = getelementptr %struct.Val* %tmp, i32 0, i32 0 ; <i32**> [#uses=1]
+ %tmp2 = getelementptr %struct.Val* %tmp1, i32 0, i32 0 ; <i32**> [#uses=1]
+ %tmp.upgrd.5 = load i32** %tmp2 ; <i32*> [#uses=1]
+ store i32* %tmp.upgrd.5, i32** %tmp.upgrd.4
+ %tmp3 = getelementptr %struct.Val* %tmp, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp4 = getelementptr %struct.Val* %tmp1, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp.upgrd.6 = load i32* %tmp4 ; <i32> [#uses=1]
+ store i32 %tmp.upgrd.6, i32* %tmp3
+ %tmp7 = bitcast %struct.Val* %tmp to { i64 }* ; <{ i64 }*> [#uses=1]
+ %tmp8 = getelementptr { i64 }* %tmp7, i32 0, i32 0 ; <i64*> [#uses=1]
+ %tmp9 = load i64* %tmp8 ; <i64> [#uses=1]
+ call void @_Z3bar3ValS_( i64 %Op.0, i64 %tmp9 )
+ ret void
+}
+
+declare i64 @_Z3foov()
+
+declare void @_Z3bar3ValS_(i64, i64)
diff --git a/test/Transforms/ScalarRepl/vector_memcpy.ll b/test/Transforms/ScalarRepl/vector_memcpy.ll
new file mode 100644
index 0000000..decbd30
--- /dev/null
+++ b/test/Transforms/ScalarRepl/vector_memcpy.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -scalarrepl -S > %t
+; RUN: grep {ret <16 x float> %A} %t
+; RUN: grep {ret <16 x float> zeroinitializer} %t
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define <16 x float> @foo(<16 x float> %A) nounwind {
+ %tmp = alloca <16 x float>, align 16
+ %tmp2 = alloca <16 x float>, align 16
+ store <16 x float> %A, <16 x float>* %tmp
+ %s = bitcast <16 x float>* %tmp to i8*
+ %s2 = bitcast <16 x float>* %tmp2 to i8*
+ call void @llvm.memcpy.i64(i8* %s2, i8* %s, i64 64, i32 16)
+
+ %R = load <16 x float>* %tmp2
+ ret <16 x float> %R
+}
+
+define <16 x float> @foo2(<16 x float> %A) nounwind {
+ %tmp2 = alloca <16 x float>, align 16
+
+ %s2 = bitcast <16 x float>* %tmp2 to i8*
+ call void @llvm.memset.i64(i8* %s2, i8 0, i64 64, i32 16)
+
+ %R = load <16 x float>* %tmp2
+ ret <16 x float> %R
+}
+
+
+declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
+declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
diff --git a/test/Transforms/ScalarRepl/vector_promote.ll b/test/Transforms/ScalarRepl/vector_promote.ll
new file mode 100644
index 0000000..4f875b0
--- /dev/null
+++ b/test/Transforms/ScalarRepl/vector_promote.ll
@@ -0,0 +1,65 @@
+; RUN: opt < %s -scalarrepl -S | not grep alloca
+; RUN: opt < %s -scalarrepl -S | grep {load <4 x float>}
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+
+define void @test(<4 x float>* %F, float %f) {
+entry:
+ %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp3, <4 x float>* %G
+ %G.upgrd.1 = getelementptr <4 x float>* %G, i32 0, i32 0 ; <float*> [#uses=1]
+ store float %f, float* %G.upgrd.1
+ %tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2]
+ %tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp6, <4 x float>* %F
+ ret void
+}
+
+define void @test2(<4 x float>* %F, float %f) {
+entry:
+ %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp3, <4 x float>* %G
+ %tmp.upgrd.2 = getelementptr <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
+ store float %f, float* %tmp.upgrd.2
+ %tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2]
+ %tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp6, <4 x float>* %F
+ ret void
+}
+
+define void @test3(<4 x float>* %F, float* %f) {
+entry:
+ %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp3, <4 x float>* %G
+ %tmp.upgrd.3 = getelementptr <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
+ %tmp.upgrd.4 = load float* %tmp.upgrd.3 ; <float> [#uses=1]
+ store float %tmp.upgrd.4, float* %f
+ ret void
+}
+
+define void @test4(<4 x float>* %F, float* %f) {
+entry:
+ %G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
+ %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
+ %tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
+ store <4 x float> %tmp3, <4 x float>* %G
+ %G.upgrd.5 = getelementptr <4 x float>* %G, i32 0, i32 0 ; <float*> [#uses=1]
+ %tmp.upgrd.6 = load float* %G.upgrd.5 ; <float> [#uses=1]
+ store float %tmp.upgrd.6, float* %f
+ ret void
+}
+
+define i32 @test5(float %X) { ;; should turn into bitcast.
+ %X_addr = alloca [4 x float]
+ %X1 = getelementptr [4 x float]* %X_addr, i32 0, i32 2
+ store float %X, float* %X1
+ %a = bitcast float* %X1 to i32*
+ %tmp = load i32* %a
+ ret i32 %tmp
+}
+
diff --git a/test/Transforms/ScalarRepl/volatile.ll b/test/Transforms/ScalarRepl/volatile.ll
new file mode 100644
index 0000000..3ff322e
--- /dev/null
+++ b/test/Transforms/ScalarRepl/volatile.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -scalarrepl -S | grep {volatile load}
+; RUN: opt < %s -scalarrepl -S | grep {volatile store}
+
+define i32 @voltest(i32 %T) {
+ %A = alloca {i32, i32}
+ %B = getelementptr {i32,i32}* %A, i32 0, i32 0
+ volatile store i32 %T, i32* %B
+
+ %C = getelementptr {i32,i32}* %A, i32 0, i32 1
+ %X = volatile load i32* %C
+ ret i32 %X
+}
diff --git a/test/Transforms/SimplifyCFG/2002-05-05-EmptyBlockMerge.ll b/test/Transforms/SimplifyCFG/2002-05-05-EmptyBlockMerge.ll
new file mode 100644
index 0000000..414235b
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2002-05-05-EmptyBlockMerge.ll
@@ -0,0 +1,22 @@
+; Basic block #2 should not be merged into BB #3!
+;
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: grep {br label}
+;
+
+declare void @foo()
+
+define void @cprop_test12(i32* %data) {
+bb0:
+ %reg108 = load i32* %data ; <i32> [#uses=2]
+ %cond218 = icmp ne i32 %reg108, 5 ; <i1> [#uses=1]
+ br i1 %cond218, label %bb3, label %bb2
+bb2: ; preds = %bb0
+ call void @foo( )
+ br label %bb3
+bb3: ; preds = %bb2, %bb0
+ %reg117 = phi i32 [ 110, %bb2 ], [ %reg108, %bb0 ] ; <i32> [#uses=1]
+ store i32 %reg117, i32* %data
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/2002-05-21-PHIElimination.ll b/test/Transforms/SimplifyCFG/2002-05-21-PHIElimination.ll
new file mode 100644
index 0000000..055386b
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2002-05-21-PHIElimination.ll
@@ -0,0 +1,19 @@
+; CFG Simplification is making a loop dead, then changing the add into:
+;
+; %V1 = add int %V1, 1
+;
+; Which is not valid SSA
+;
+; RUN: opt < %s -simplifycfg | llvm-dis
+
+define void @test() {
+; <label>:0
+ br i1 true, label %end, label %Loop
+Loop: ; preds = %Loop, %0
+ %V = phi i32 [ 0, %0 ], [ %V1, %Loop ] ; <i32> [#uses=1]
+ %V1 = add i32 %V, 1 ; <i32> [#uses=1]
+ br label %Loop
+end: ; preds = %0
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/2002-06-24-PHINode.ll b/test/Transforms/SimplifyCFG/2002-06-24-PHINode.ll
new file mode 100644
index 0000000..88f32bc
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2002-06-24-PHINode.ll
@@ -0,0 +1,14 @@
+; -simplifycfg is not folding blocks if there is a PHI node involved. This
+; should be fixed eventually
+
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+define i32 @main(i32 %argc) {
+; <label>:0
+ br label %InlinedFunctionReturnNode
+InlinedFunctionReturnNode: ; preds = %0
+ %X = phi i32 [ 7, %0 ] ; <i32> [#uses=1]
+ %Y = add i32 %X, %argc ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
diff --git a/test/Transforms/SimplifyCFG/2002-09-24-PHIAssertion.ll b/test/Transforms/SimplifyCFG/2002-09-24-PHIAssertion.ll
new file mode 100644
index 0000000..9a12062
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2002-09-24-PHIAssertion.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -simplifycfg
+
+define i32 @test(i32 %A, i32 %B, i1 %cond) {
+J:
+ %C = add i32 %A, 12 ; <i32> [#uses=3]
+ br i1 %cond, label %L, label %L
+L: ; preds = %J, %J
+ %Q = phi i32 [ %C, %J ], [ %C, %J ] ; <i32> [#uses=1]
+ %D = add i32 %C, %B ; <i32> [#uses=1]
+ %E = add i32 %Q, %D ; <i32> [#uses=1]
+ ret i32 %E
+}
+
diff --git a/test/Transforms/SimplifyCFG/2003-03-07-DominateProblem.ll b/test/Transforms/SimplifyCFG/2003-03-07-DominateProblem.ll
new file mode 100644
index 0000000..8762046
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2003-03-07-DominateProblem.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -simplifycfg -disable-output
+
+define void @test(i32* %ldo, i1 %c, i1 %d) {
+bb9:
+ br i1 %c, label %bb11, label %bb10
+bb10: ; preds = %bb9
+ br label %bb11
+bb11: ; preds = %bb10, %bb9
+ %reg330 = phi i32* [ null, %bb10 ], [ %ldo, %bb9 ] ; <i32*> [#uses=1]
+ br label %bb20
+bb20: ; preds = %bb20, %bb11
+ store i32* %reg330, i32** null
+ br i1 %d, label %bb20, label %done
+done: ; preds = %bb20
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/2003-08-05-InvokeCrash.ll b/test/Transforms/SimplifyCFG/2003-08-05-InvokeCrash.ll
new file mode 100644
index 0000000..c019931
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2003-08-05-InvokeCrash.ll
@@ -0,0 +1,13 @@
+; Do not remove the invoke!
+;
+; RUN: opt < %s -simplifycfg -disable-output
+
+define i32 @test() {
+ %A = invoke i32 @test( )
+ to label %Ret unwind label %Ret2 ; <i32> [#uses=1]
+Ret: ; preds = %0
+ ret i32 %A
+Ret2: ; preds = %0
+ ret i32 undef
+}
+
diff --git a/test/Transforms/SimplifyCFG/2003-08-05-MishandleInvoke.ll b/test/Transforms/SimplifyCFG/2003-08-05-MishandleInvoke.ll
new file mode 100644
index 0000000..15cd773
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2003-08-05-MishandleInvoke.ll
@@ -0,0 +1,12 @@
+; Do not remove the invoke!
+;
+; RUN: opt < %s -simplifycfg -S | grep invoke
+
+define i32 @test() {
+ invoke i32 @test( )
+ to label %Ret unwind label %Ret ; <i32>:1 [#uses=0]
+Ret: ; preds = %0, %0
+ %A = add i32 0, 1 ; <i32> [#uses=1]
+ ret i32 %A
+}
+
diff --git a/test/Transforms/SimplifyCFG/2003-08-17-BranchFold.ll b/test/Transforms/SimplifyCFG/2003-08-17-BranchFold.ll
new file mode 100644
index 0000000..8ac9ae4
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2003-08-17-BranchFold.ll
@@ -0,0 +1,22 @@
+; This test checks to make sure that 'br X, Dest, Dest' is folded into
+; 'br Dest'
+
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep {br i1 %c2}
+
+declare void @noop()
+
+define i32 @test(i1 %c1, i1 %c2) {
+ call void @noop( )
+ br i1 %c1, label %A, label %Y
+A: ; preds = %0
+ call void @noop( )
+ br i1 %c2, label %X, label %X
+X: ; preds = %Y, %A, %A
+ call void @noop( )
+ ret i32 0
+Y: ; preds = %0
+ call void @noop( )
+ br label %X
+}
+
diff --git a/test/Transforms/SimplifyCFG/2003-08-17-BranchFoldOrdering.ll b/test/Transforms/SimplifyCFG/2003-08-17-BranchFoldOrdering.ll
new file mode 100644
index 0000000..888e187
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2003-08-17-BranchFoldOrdering.ll
@@ -0,0 +1,26 @@
+; This test checks to make sure that 'br X, Dest, Dest' is folded into
+; 'br Dest'. This can only happen after the 'Z' block is eliminated. This is
+; due to the fact that the SimplifyCFG function does not use
+; the ConstantFoldTerminator function.
+
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep {br i1 %c2}
+
+declare void @noop()
+
+define i32 @test(i1 %c1, i1 %c2) {
+ call void @noop( )
+ br i1 %c1, label %A, label %Y
+A: ; preds = %0
+ call void @noop( )
+ br i1 %c2, label %Z, label %X
+Z: ; preds = %A
+ br label %X
+X: ; preds = %Y, %Z, %A
+ call void @noop( )
+ ret i32 0
+Y: ; preds = %0
+ call void @noop( )
+ br label %X
+}
+
diff --git a/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch-dbg.ll b/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch-dbg.ll
new file mode 100644
index 0000000..af59ba0
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch-dbg.ll
@@ -0,0 +1,58 @@
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep switch
+
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
+
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+; Test folding all to same dest
+define i32 @test3(i1 %C) {
+ br i1 %C, label %Start, label %TheDest
+Start: ; preds = %0
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ switch i32 3, label %TheDest [
+ i32 0, label %TheDest
+ i32 1, label %TheDest
+ i32 2, label %TheDest
+ i32 5, label %TheDest
+ ]
+TheDest: ; preds = %Start, %Start, %Start, %Start, %Start, %0
+ ret i32 1234
+}
+
+; Test folding switch -> branch
+define i32 @test4(i32 %C) {
+ switch i32 %C, label %L1 [
+ i32 0, label %L2
+ ]
+L1: ; preds = %0
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret i32 0
+L2: ; preds = %0
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret i32 1
+}
+
+; Can fold into a cond branch!
+define i32 @test5(i32 %C) {
+ switch i32 %C, label %L1 [
+ i32 0, label %L2
+ i32 123, label %L1
+ ]
+L1: ; preds = %0, %0
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret i32 0
+L2: ; preds = %0
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret i32 1
+}
+
diff --git a/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch.ll b/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch.ll
new file mode 100644
index 0000000..93f851c
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch.ll
@@ -0,0 +1,80 @@
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep switch
+
+; Test normal folding
+define i32 @test1() {
+ switch i32 5, label %Default [
+ i32 0, label %Foo
+ i32 1, label %Bar
+ i32 2, label %Baz
+ i32 5, label %TheDest
+ ]
+Default: ; preds = %0
+ ret i32 -1
+Foo: ; preds = %0
+ ret i32 -2
+Bar: ; preds = %0
+ ret i32 -3
+Baz: ; preds = %0
+ ret i32 -4
+TheDest: ; preds = %0
+ ret i32 1234
+}
+
+; Test folding to default dest
+define i32 @test2() {
+ switch i32 3, label %Default [
+ i32 0, label %Foo
+ i32 1, label %Bar
+ i32 2, label %Baz
+ i32 5, label %TheDest
+ ]
+Default: ; preds = %0
+ ret i32 1234
+Foo: ; preds = %0
+ ret i32 -2
+Bar: ; preds = %0
+ ret i32 -5
+Baz: ; preds = %0
+ ret i32 -6
+TheDest: ; preds = %0
+ ret i32 -8
+}
+
+; Test folding all to same dest
+define i32 @test3(i1 %C) {
+ br i1 %C, label %Start, label %TheDest
+Start: ; preds = %0
+ switch i32 3, label %TheDest [
+ i32 0, label %TheDest
+ i32 1, label %TheDest
+ i32 2, label %TheDest
+ i32 5, label %TheDest
+ ]
+TheDest: ; preds = %Start, %Start, %Start, %Start, %Start, %0
+ ret i32 1234
+}
+
+; Test folding switch -> branch
+define i32 @test4(i32 %C) {
+ switch i32 %C, label %L1 [
+ i32 0, label %L2
+ ]
+L1: ; preds = %0
+ ret i32 0
+L2: ; preds = %0
+ ret i32 1
+}
+
+; Can fold into a cond branch!
+define i32 @test5(i32 %C) {
+ switch i32 %C, label %L1 [
+ i32 0, label %L2
+ i32 123, label %L1
+ ]
+L1: ; preds = %0, %0
+ ret i32 0
+L2: ; preds = %0
+ ret i32 1
+}
+
diff --git a/test/Transforms/SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll b/test/Transforms/SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll
new file mode 100644
index 0000000..fafe73b2
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll
@@ -0,0 +1,40 @@
+; RUN: opt < %s -simplifycfg -disable-output
+
+define void @symhash_add() {
+entry:
+ br i1 undef, label %then.0, label %UnifiedReturnBlock
+then.0: ; preds = %entry
+ br i1 undef, label %loopentry.2, label %loopentry.1.preheader
+loopentry.1.preheader: ; preds = %then.0
+ br label %loopentry.1.outer
+loopentry.1.outer: ; preds = %loopexit.1, %loopentry.1.preheader
+ br label %loopentry.1
+loopentry.1: ; preds = %endif.1, %then.4, %then.3, %then.1, %loopentry.1.outer
+ br i1 undef, label %loopexit.1, label %no_exit.1
+no_exit.1: ; preds = %loopentry.1
+ br i1 undef, label %then.1, label %else.0
+then.1: ; preds = %no_exit.1
+ br label %loopentry.1
+else.0: ; preds = %no_exit.1
+ br i1 undef, label %then.2, label %else.1
+then.2: ; preds = %else.0
+ br i1 undef, label %then.3, label %endif.1
+then.3: ; preds = %then.2
+ br label %loopentry.1
+else.1: ; preds = %else.0
+ br i1 undef, label %endif.1, label %then.4
+then.4: ; preds = %else.1
+ br label %loopentry.1
+endif.1: ; preds = %else.1, %then.2
+ br label %loopentry.1
+loopexit.1: ; preds = %loopentry.1
+ br i1 undef, label %loopentry.1.outer, label %loopentry.2
+loopentry.2: ; preds = %no_exit.2, %loopexit.1, %then.0
+ br i1 undef, label %loopexit.2, label %no_exit.2
+no_exit.2: ; preds = %loopentry.2
+ br label %loopentry.2
+loopexit.2: ; preds = %loopentry.2
+ ret void
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/2005-06-16-PHICrash.ll b/test/Transforms/SimplifyCFG/2005-06-16-PHICrash.ll
new file mode 100644
index 0000000..90be680
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2005-06-16-PHICrash.ll
@@ -0,0 +1,95 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; PR584
+@g_38098584 = external global i32 ; <i32*> [#uses=1]
+@g_60187400 = external global i32 ; <i32*> [#uses=1]
+@g_59182229 = external global i32 ; <i32*> [#uses=2]
+
+define i32 @_Z13func_26556482h(i8 %l_88173906) {
+entry:
+ %tmp.1 = bitcast i8 %l_88173906 to i8 ; <i8> [#uses=2]
+ %tmp.3 = icmp eq i8 %l_88173906, 0 ; <i1> [#uses=1]
+ br i1 %tmp.3, label %else.0, label %then.0
+then.0: ; preds = %entry
+ %tmp.5 = icmp eq i8 %l_88173906, 0 ; <i1> [#uses=1]
+ br i1 %tmp.5, label %else.1, label %then.1
+then.1: ; preds = %then.0
+ br label %return
+else.1: ; preds = %then.0
+ br label %loopentry.0
+loopentry.0: ; preds = %no_exit.0, %else.1
+ %i.0.1 = phi i32 [ 0, %else.1 ], [ %inc.0, %no_exit.0 ] ; <i32> [#uses=2]
+ %tmp.9 = icmp sgt i32 %i.0.1, 99 ; <i1> [#uses=1]
+ br i1 %tmp.9, label %endif.0, label %no_exit.0
+no_exit.0: ; preds = %loopentry.0
+ %inc.0 = add i32 %i.0.1, 1 ; <i32> [#uses=1]
+ br label %loopentry.0
+else.0: ; preds = %entry
+ %tmp.12 = sext i8 %tmp.1 to i32 ; <i32> [#uses=1]
+ br label %return
+endif.0: ; preds = %loopentry.0
+ %tmp.14 = sext i8 %tmp.1 to i32 ; <i32> [#uses=1]
+ %tmp.16 = zext i8 %l_88173906 to i32 ; <i32> [#uses=1]
+ %tmp.17 = icmp sgt i32 %tmp.14, %tmp.16 ; <i1> [#uses=1]
+ %tmp.19 = load i32* @g_59182229 ; <i32> [#uses=2]
+ br i1 %tmp.17, label %cond_true, label %cond_false
+cond_true: ; preds = %endif.0
+ %tmp.20 = icmp ne i32 %tmp.19, 1 ; <i1> [#uses=1]
+ br label %cond_continue
+cond_false: ; preds = %endif.0
+ %tmp.22 = icmp ne i32 %tmp.19, 0 ; <i1> [#uses=1]
+ br label %cond_continue
+cond_continue: ; preds = %cond_false, %cond_true
+ %mem_tmp.0 = phi i1 [ %tmp.20, %cond_true ], [ %tmp.22, %cond_false ] ; <i1> [#uses=1]
+ br i1 %mem_tmp.0, label %then.2, label %else.2
+then.2: ; preds = %cond_continue
+ %tmp.25 = zext i8 %l_88173906 to i32 ; <i32> [#uses=1]
+ br label %return
+else.2: ; preds = %cond_continue
+ br label %loopentry.1
+loopentry.1: ; preds = %endif.3, %else.2
+ %i.1.1 = phi i32 [ 0, %else.2 ], [ %inc.3, %endif.3 ] ; <i32> [#uses=2]
+ %i.3.2 = phi i32 [ undef, %else.2 ], [ %i.3.0, %endif.3 ] ; <i32> [#uses=2]
+ %l_88173906_addr.1 = phi i8 [ %l_88173906, %else.2 ], [ %l_88173906_addr.0, %endif.3 ] ; <i8> [#uses=3]
+ %tmp.29 = icmp sgt i32 %i.1.1, 99 ; <i1> [#uses=1]
+ br i1 %tmp.29, label %endif.2, label %no_exit.1
+no_exit.1: ; preds = %loopentry.1
+ %tmp.30 = load i32* @g_38098584 ; <i32> [#uses=1]
+ %tmp.31 = icmp eq i32 %tmp.30, 0 ; <i1> [#uses=1]
+ br i1 %tmp.31, label %else.3, label %then.3
+then.3: ; preds = %no_exit.1
+ br label %endif.3
+else.3: ; preds = %no_exit.1
+ br i1 false, label %else.4, label %then.4
+then.4: ; preds = %else.3
+ br label %endif.3
+else.4: ; preds = %else.3
+ br i1 false, label %else.5, label %then.5
+then.5: ; preds = %else.4
+ store i32 -1004318825, i32* @g_59182229
+ br label %return
+else.5: ; preds = %else.4
+ br label %loopentry.3
+loopentry.3: ; preds = %then.7, %else.5
+ %i.3.3 = phi i32 [ 0, %else.5 ], [ %inc.2, %then.7 ] ; <i32> [#uses=3]
+ %tmp.55 = icmp sgt i32 %i.3.3, 99 ; <i1> [#uses=1]
+ br i1 %tmp.55, label %endif.3, label %no_exit.3
+no_exit.3: ; preds = %loopentry.3
+ %tmp.57 = icmp eq i8 %l_88173906_addr.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.57, label %else.7, label %then.7
+then.7: ; preds = %no_exit.3
+ store i32 16239, i32* @g_60187400
+ %inc.2 = add i32 %i.3.3, 1 ; <i32> [#uses=1]
+ br label %loopentry.3
+else.7: ; preds = %no_exit.3
+ br label %return
+endif.3: ; preds = %loopentry.3, %then.4, %then.3
+ %i.3.0 = phi i32 [ %i.3.2, %then.3 ], [ %i.3.2, %then.4 ], [ %i.3.3, %loopentry.3 ] ; <i32> [#uses=1]
+ %l_88173906_addr.0 = phi i8 [ 100, %then.3 ], [ %l_88173906_addr.1, %then.4 ], [ %l_88173906_addr.1, %loopentry.3 ] ; <i8> [#uses=1]
+ %inc.3 = add i32 %i.1.1, 1 ; <i32> [#uses=1]
+ br label %loopentry.1
+endif.2: ; preds = %loopentry.1
+ br label %return
+return: ; preds = %endif.2, %else.7, %then.5, %then.2, %else.0, %then.1
+ %result.0 = phi i32 [ 1624650671, %then.1 ], [ %tmp.25, %then.2 ], [ 3379, %then.5 ], [ 52410, %else.7 ], [ -1526438411, %endif.2 ], [ %tmp.12, %else.0 ] ; <i32> [#uses=1]
+ ret i32 %result.0
+}
diff --git a/test/Transforms/SimplifyCFG/2005-08-01-PHIUpdateFail.ll b/test/Transforms/SimplifyCFG/2005-08-01-PHIUpdateFail.ll
new file mode 100644
index 0000000..c30bfa1
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2005-08-01-PHIUpdateFail.ll
@@ -0,0 +1,71 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; END.
+
+define void @main() {
+entry:
+ %tmp.14.i19 = icmp eq i32 0, 2 ; <i1> [#uses=1]
+ br i1 %tmp.14.i19, label %endif.1.i20, label %read_min.exit
+endif.1.i20: ; preds = %entry
+ %tmp.9.i.i = icmp eq i8* null, null ; <i1> [#uses=1]
+ br i1 %tmp.9.i.i, label %then.i12.i, label %then.i.i
+then.i.i: ; preds = %endif.1.i20
+ ret void
+then.i12.i: ; preds = %endif.1.i20
+ %tmp.9.i4.i = icmp eq i8* null, null ; <i1> [#uses=1]
+ br i1 %tmp.9.i4.i, label %endif.2.i33, label %then.i5.i
+then.i5.i: ; preds = %then.i12.i
+ ret void
+endif.2.i33: ; preds = %then.i12.i
+ br i1 false, label %loopexit.0.i40, label %no_exit.0.i35
+no_exit.0.i35: ; preds = %no_exit.0.i35, %endif.2.i33
+ %tmp.130.i = icmp slt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.130.i, label %loopexit.0.i40.loopexit, label %no_exit.0.i35
+loopexit.0.i40.loopexit: ; preds = %no_exit.0.i35
+ br label %loopexit.0.i40
+loopexit.0.i40: ; preds = %loopexit.0.i40.loopexit, %endif.2.i33
+ %tmp.341.i = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.341.i, label %loopentry.1.i, label %read_min.exit
+loopentry.1.i: ; preds = %loopexit.0.i40
+ %tmp.347.i = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.347.i, label %no_exit.1.i41, label %loopexit.2.i44
+no_exit.1.i41: ; preds = %endif.5.i, %loopentry.1.i
+ %indvar.i42 = phi i32 [ %indvar.next.i, %endif.5.i ], [ 0, %loopentry.1.i ] ; <i32> [#uses=1]
+ %tmp.355.i = icmp eq i32 0, 3 ; <i1> [#uses=1]
+ br i1 %tmp.355.i, label %endif.5.i, label %read_min.exit
+endif.5.i: ; preds = %no_exit.1.i41
+ %tmp.34773.i = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+ %indvar.next.i = add i32 %indvar.i42, 1 ; <i32> [#uses=1]
+ br i1 %tmp.34773.i, label %no_exit.1.i41, label %loopexit.1.i.loopexit
+loopexit.1.i.loopexit: ; preds = %endif.5.i
+ ret void
+loopexit.2.i44: ; preds = %loopentry.1.i
+ ret void
+read_min.exit: ; preds = %no_exit.1.i41, %loopexit.0.i40, %entry
+ %tmp.23 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.23, label %endif.1, label %then.1
+then.1: ; preds = %read_min.exit
+ br i1 false, label %endif.0.i, label %then.0.i
+then.0.i: ; preds = %then.1
+ br i1 false, label %endif.1.i, label %then.1.i
+endif.0.i: ; preds = %then.1
+ br i1 false, label %endif.1.i, label %then.1.i
+then.1.i: ; preds = %endif.0.i, %then.0.i
+ br i1 false, label %getfree.exit, label %then.2.i
+endif.1.i: ; preds = %endif.0.i, %then.0.i
+ br i1 false, label %getfree.exit, label %then.2.i
+then.2.i: ; preds = %endif.1.i, %then.1.i
+ ret void
+getfree.exit: ; preds = %endif.1.i, %then.1.i
+ ret void
+endif.1: ; preds = %read_min.exit
+ %tmp.27.i = getelementptr i32* null, i32 0 ; <i32*> [#uses=0]
+ br i1 false, label %loopexit.0.i15, label %no_exit.0.i14
+no_exit.0.i14: ; preds = %endif.1
+ ret void
+loopexit.0.i15: ; preds = %endif.1
+ br i1 false, label %primal_start_artificial.exit, label %no_exit.1.i16
+no_exit.1.i16: ; preds = %no_exit.1.i16, %loopexit.0.i15
+ br i1 false, label %primal_start_artificial.exit, label %no_exit.1.i16
+primal_start_artificial.exit: ; preds = %no_exit.1.i16, %loopexit.0.i15
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/2005-08-03-PHIFactorCrash.ll b/test/Transforms/SimplifyCFG/2005-08-03-PHIFactorCrash.ll
new file mode 100644
index 0000000..477c9c9
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2005-08-03-PHIFactorCrash.ll
@@ -0,0 +1,75 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; END.
+
+ %arraytype.1.Char = type { i32, [0 x i8] }
+ %arraytype.4.Signed = type { i32, [0 x i32] }
+ %functiontype.23 = type %structtype.Task* (%structtype.Task*, %structtype.Packet*, %structtype.FailedRun*)
+ %functiontype.27 = type %structtype.object* ()
+ %functiontype.28 = type i1 (%structtype.object*, %structtype.object_vtable*)
+ %functiontype.39 = type i32 (%structtype.listiter*)
+ %opaquetype.RuntimeTypeInfo = type i8* (i8*)
+ %structtype.AssertionError_vtable = type { %structtype.FailedRun_vtable }
+ %structtype.DeviceTask = type { %structtype.Task }
+ %structtype.FailedRun = type { %structtype.object }
+ %structtype.FailedRun_vtable = type { %structtype.object_vtable }
+ %structtype.Packet = type { %structtype.object, %structtype.list.1*, i32, i32, i32, %structtype.Packet* }
+ %structtype.Task = type { %structtype.TaskState, %structtype.FailedRun*, i32, %structtype.Packet*, %structtype.Task*, i32 }
+ %structtype.TaskState = type { %structtype.object, i1, i1, i1 }
+ %structtype.list.1 = type { %arraytype.4.Signed* }
+ %structtype.listiter = type { %structtype.list.1*, i32 }
+ %structtype.object = type { %structtype.object_vtable* }
+ %structtype.object_vtable = type { %structtype.object_vtable*, %opaquetype.RuntimeTypeInfo*, %arraytype.1.Char*, %functiontype.27* }
[email protected] = external global %structtype.AssertionError_vtable ; <%structtype.AssertionError_vtable*> [#uses=0]
+
+declare fastcc i1 @ll_isinstance__objectPtr_object_vtablePtr()
+
+declare fastcc void @ll_listnext__listiterPtr()
+
+define fastcc void @WorkTask.fn() {
+block0:
+ br label %block1
+block1: ; preds = %block0
+ %v2542 = call fastcc i1 @ll_isinstance__objectPtr_object_vtablePtr( ) ; <i1> [#uses=1]
+ br i1 %v2542, label %block4, label %block2
+block2: ; preds = %block1
+ br label %block3
+block3: ; preds = %block2
+ unwind
+block4: ; preds = %block1
+ br label %block5
+block5: ; preds = %block4
+ %v2565 = icmp eq %structtype.Packet* null, null ; <i1> [#uses=1]
+ br i1 %v2565, label %block15, label %block6
+block6: ; preds = %block5
+ %self_2575 = phi %structtype.DeviceTask* [ null, %block5 ] ; <%structtype.DeviceTask*> [#uses=1]
+ br i1 false, label %block14, label %block7
+block7: ; preds = %block14, %block6
+ %self_2635 = phi %structtype.DeviceTask* [ %self_2575, %block6 ], [ null, %block14 ] ; <%structtype.DeviceTask*> [#uses=1]
+ %tmp.124 = getelementptr %structtype.Packet* null, i32 0, i32 2 ; <i32*> [#uses=0]
+ br label %block8
+block8: ; preds = %block10, %block7
+ %self_2672 = phi %structtype.DeviceTask* [ %self_2635, %block7 ], [ null, %block10 ] ; <%structtype.DeviceTask*> [#uses=0]
+ invoke fastcc void @ll_listnext__listiterPtr( )
+ to label %block9 unwind label %block8_exception_handling
+block8_exception_handling: ; preds = %block8
+ br i1 false, label %block8_exception_found_branchto_block12, label %block8_not_exception_structinstance.10
+block8_not_exception_structinstance.10: ; preds = %block8_exception_handling
+ unwind
+block8_exception_found_branchto_block12: ; preds = %block8_exception_handling
+ br label %block12
+block9: ; preds = %block8
+ br i1 false, label %block11, label %block10
+block10: ; preds = %block11, %block9
+ br label %block8
+block11: ; preds = %block9
+ br label %block10
+block12: ; preds = %block8_exception_found_branchto_block12
+ br label %block13
+block13: ; preds = %block15, %block12
+ ret void
+block14: ; preds = %block6
+ br label %block7
+block15: ; preds = %block5
+ %v2586 = phi %structtype.DeviceTask* [ null, %block5 ] ; <%structtype.DeviceTask*> [#uses=0]
+ br label %block13
+}
diff --git a/test/Transforms/SimplifyCFG/2005-10-02-InvokeSimplify.ll b/test/Transforms/SimplifyCFG/2005-10-02-InvokeSimplify.ll
new file mode 100644
index 0000000..778aa3b
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2005-10-02-InvokeSimplify.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -simplifycfg -disable-output
+
+define i1 @foo() {
+ %X = invoke i1 @foo( )
+ to label %N unwind label %F ; <i1> [#uses=1]
+F: ; preds = %0
+ ret i1 false
+N: ; preds = %0
+ br i1 %X, label %A, label %B
+A: ; preds = %N
+ ret i1 true
+B: ; preds = %N
+ ret i1 true
+}
+
diff --git a/test/Transforms/SimplifyCFG/2005-12-03-IncorrectPHIFold.ll b/test/Transforms/SimplifyCFG/2005-12-03-IncorrectPHIFold.ll
new file mode 100644
index 0000000..760aa13
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2005-12-03-IncorrectPHIFold.ll
@@ -0,0 +1,124 @@
+; Make sure this doesn't turn into an infinite loop
+
+; RUN: opt < %s -simplifycfg -constprop -simplifycfg |\
+; RUN: llvm-dis | grep bb86
+; END.
+
+%struct.anon = type { i32, i32, i32, i32, [1024 x i8] }
+@_zero_ = external global %struct.anon* ; <%struct.anon**> [#uses=2]
+@_one_ = external global %struct.anon* ; <%struct.anon**> [#uses=4]
+@str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=0]
+
+declare i32 @bc_compare(%struct.anon*, %struct.anon*)
+
+declare void @free_num(%struct.anon**)
+
+declare %struct.anon* @copy_num(%struct.anon*)
+
+declare void @init_num(%struct.anon**)
+
+declare %struct.anon* @new_num(i32, i32)
+
+declare void @int2num(%struct.anon**, i32)
+
+declare void @bc_multiply(%struct.anon*, %struct.anon*, %struct.anon**, i32)
+
+declare void @bc_raise(%struct.anon*, %struct.anon*, %struct.anon**, i32)
+
+declare i32 @bc_divide(%struct.anon*, %struct.anon*, %struct.anon**, i32)
+
+declare void @bc_add(%struct.anon*, %struct.anon*, %struct.anon**)
+
+declare i32 @_do_compare(%struct.anon*, %struct.anon*, i32, i32)
+
+declare i32 @printf(i8*, ...)
+
+define i32 @bc_sqrt(%struct.anon** %num, i32 %scale) {
+entry:
+ %guess = alloca %struct.anon* ; <%struct.anon**> [#uses=7]
+ %guess1 = alloca %struct.anon* ; <%struct.anon**> [#uses=7]
+ %point5 = alloca %struct.anon* ; <%struct.anon**> [#uses=3]
+ %tmp = load %struct.anon** %num ; <%struct.anon*> [#uses=1]
+ %tmp1 = load %struct.anon** @_zero_ ; <%struct.anon*> [#uses=1]
+ %tmp.upgrd.1 = call i32 @bc_compare( %struct.anon* %tmp, %struct.anon* %tmp1 ) ; <i32> [#uses=2]
+ %tmp.upgrd.2 = icmp slt i32 %tmp.upgrd.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.2, label %cond_true, label %cond_false
+cond_true: ; preds = %entry
+ ret i32 0
+cond_false: ; preds = %entry
+ %tmp5 = icmp eq i32 %tmp.upgrd.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp5, label %cond_true6, label %cond_next13
+cond_true6: ; preds = %cond_false
+ call void @free_num( %struct.anon** %num )
+ %tmp8 = load %struct.anon** @_zero_ ; <%struct.anon*> [#uses=1]
+ %tmp9 = call %struct.anon* @copy_num( %struct.anon* %tmp8 ) ; <%struct.anon*> [#uses=1]
+ store %struct.anon* %tmp9, %struct.anon** %num
+ ret i32 1
+cond_next13: ; preds = %cond_false
+ %tmp15 = load %struct.anon** %num ; <%struct.anon*> [#uses=1]
+ %tmp16 = load %struct.anon** @_one_ ; <%struct.anon*> [#uses=1]
+ %tmp17 = call i32 @bc_compare( %struct.anon* %tmp15, %struct.anon* %tmp16 ) ; <i32> [#uses=2]
+ %tmp19 = icmp eq i32 %tmp17, 0 ; <i1> [#uses=1]
+ br i1 %tmp19, label %cond_true20, label %cond_next27
+cond_true20: ; preds = %cond_next13
+ call void @free_num( %struct.anon** %num )
+ %tmp22 = load %struct.anon** @_one_ ; <%struct.anon*> [#uses=1]
+ %tmp23 = call %struct.anon* @copy_num( %struct.anon* %tmp22 ) ; <%struct.anon*> [#uses=1]
+ store %struct.anon* %tmp23, %struct.anon** %num
+ ret i32 1
+cond_next27: ; preds = %cond_next13
+ %tmp29 = load %struct.anon** %num ; <%struct.anon*> [#uses=1]
+ %tmp30 = getelementptr %struct.anon* %tmp29, i32 0, i32 2 ; <i32*> [#uses=1]
+ %tmp31 = load i32* %tmp30 ; <i32> [#uses=2]
+ %tmp33 = icmp sge i32 %tmp31, %scale ; <i1> [#uses=1]
+ %max = select i1 %tmp33, i32 %tmp31, i32 %scale ; <i32> [#uses=4]
+ %tmp35 = add i32 %max, 2 ; <i32> [#uses=0]
+ call void @init_num( %struct.anon** %guess )
+ call void @init_num( %struct.anon** %guess1 )
+ %tmp36 = call %struct.anon* @new_num( i32 1, i32 1 ) ; <%struct.anon*> [#uses=2]
+ store %struct.anon* %tmp36, %struct.anon** %point5
+ %tmp.upgrd.3 = getelementptr %struct.anon* %tmp36, i32 0, i32 4, i32 1 ; <i8*> [#uses=1]
+ store i8 5, i8* %tmp.upgrd.3
+ %tmp39 = icmp slt i32 %tmp17, 0 ; <i1> [#uses=1]
+ br i1 %tmp39, label %cond_true40, label %cond_false43
+cond_true40: ; preds = %cond_next27
+ %tmp41 = load %struct.anon** @_one_ ; <%struct.anon*> [#uses=1]
+ %tmp42 = call %struct.anon* @copy_num( %struct.anon* %tmp41 ) ; <%struct.anon*> [#uses=1]
+ store %struct.anon* %tmp42, %struct.anon** %guess
+ br label %bb80.outer
+cond_false43: ; preds = %cond_next27
+ call void @int2num( %struct.anon** %guess, i32 10 )
+ %tmp45 = load %struct.anon** %num ; <%struct.anon*> [#uses=1]
+ %tmp46 = getelementptr %struct.anon* %tmp45, i32 0, i32 1 ; <i32*> [#uses=1]
+ %tmp47 = load i32* %tmp46 ; <i32> [#uses=1]
+ call void @int2num( %struct.anon** %guess1, i32 %tmp47 )
+ %tmp48 = load %struct.anon** %guess1 ; <%struct.anon*> [#uses=1]
+ %tmp49 = load %struct.anon** %point5 ; <%struct.anon*> [#uses=1]
+ call void @bc_multiply( %struct.anon* %tmp48, %struct.anon* %tmp49, %struct.anon** %guess1, i32 %max )
+ %tmp51 = load %struct.anon** %guess1 ; <%struct.anon*> [#uses=1]
+ %tmp52 = getelementptr %struct.anon* %tmp51, i32 0, i32 2 ; <i32*> [#uses=1]
+ store i32 0, i32* %tmp52
+ %tmp53 = load %struct.anon** %guess ; <%struct.anon*> [#uses=1]
+ %tmp54 = load %struct.anon** %guess1 ; <%struct.anon*> [#uses=1]
+ call void @bc_raise( %struct.anon* %tmp53, %struct.anon* %tmp54, %struct.anon** %guess, i32 %max )
+ br label %bb80.outer
+bb80.outer: ; preds = %cond_true83, %cond_false43, %cond_true40
+ %done.1.ph = phi i32 [ 1, %cond_true83 ], [ 0, %cond_true40 ], [ 0, %cond_false43 ] ; <i32> [#uses=1]
+ br label %bb80
+bb80: ; preds = %cond_true83, %bb80.outer
+ %tmp82 = icmp eq i32 %done.1.ph, 0 ; <i1> [#uses=1]
+ br i1 %tmp82, label %cond_true83, label %bb86
+cond_true83: ; preds = %bb80
+ %tmp71 = call i32 @_do_compare( %struct.anon* null, %struct.anon* null, i32 0, i32 1 ) ; <i32> [#uses=1]
+ %tmp76 = icmp eq i32 %tmp71, 0 ; <i1> [#uses=1]
+ br i1 %tmp76, label %bb80.outer, label %bb80
+bb86: ; preds = %bb80
+ call void @free_num( %struct.anon** %num )
+ %tmp88 = load %struct.anon** %guess ; <%struct.anon*> [#uses=1]
+ %tmp89 = load %struct.anon** @_one_ ; <%struct.anon*> [#uses=1]
+ %tmp92 = call i32 @bc_divide( %struct.anon* %tmp88, %struct.anon* %tmp89, %struct.anon** %num, i32 %max ) ; <i32> [#uses=0]
+ call void @free_num( %struct.anon** %guess )
+ call void @free_num( %struct.anon** %guess1 )
+ call void @free_num( %struct.anon** %point5 )
+ ret i32 1
+}
diff --git a/test/Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll b/test/Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll
new file mode 100644
index 0000000..32f49e6
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -simplifycfg -disable-output
+
+define void @polnel_() {
+entry:
+ %tmp595 = icmp slt i32 0, 0 ; <i1> [#uses=4]
+ br i1 %tmp595, label %bb148.critedge, label %cond_true40
+bb36: ; preds = %bb43
+ br i1 %tmp595, label %bb43, label %cond_true40
+cond_true40: ; preds = %bb46, %cond_true40, %bb36, %entry
+ %tmp397 = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp397, label %bb43, label %cond_true40
+bb43: ; preds = %cond_true40, %bb36
+ br i1 false, label %bb53, label %bb36
+bb46: ; preds = %bb53
+ br i1 %tmp595, label %bb53, label %cond_true40
+bb53: ; preds = %bb46, %bb43
+ br i1 false, label %bb102, label %bb46
+bb92.preheader: ; preds = %bb102
+ ret void
+bb102: ; preds = %bb53
+ br i1 %tmp595, label %bb148, label %bb92.preheader
+bb148.critedge: ; preds = %entry
+ ret void
+bb148: ; preds = %bb102
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/2006-06-12-InfLoop.ll b/test/Transforms/SimplifyCFG/2006-06-12-InfLoop.ll
new file mode 100644
index 0000000..21cfb26
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2006-06-12-InfLoop.ll
@@ -0,0 +1,413 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; END.
+
+define void @main(i32 %c) {
+entry:
+ %tmp.9 = icmp eq i32 %c, 2 ; <i1> [#uses=1]
+ br i1 %tmp.9, label %endif.0, label %then.0
+then.0: ; preds = %entry
+ ret void
+endif.0: ; preds = %entry
+ br i1 false, label %then.1, label %endif.1
+then.1: ; preds = %endif.0
+ ret void
+endif.1: ; preds = %endif.0
+ br i1 false, label %then.2, label %endif.2
+then.2: ; preds = %endif.1
+ ret void
+endif.2: ; preds = %endif.1
+ br i1 false, label %then.3, label %loopentry.0
+then.3: ; preds = %endif.2
+ ret void
+loopentry.0: ; preds = %endif.2
+ br i1 false, label %no_exit.0.preheader, label %loopexit.0
+no_exit.0.preheader: ; preds = %loopentry.0
+ br label %no_exit.0
+no_exit.0: ; preds = %endif.4, %no_exit.0.preheader
+ br i1 false, label %then.4, label %endif.4
+then.4: ; preds = %no_exit.0
+ ret void
+endif.4: ; preds = %no_exit.0
+ br i1 false, label %no_exit.0, label %loopexit.0.loopexit
+loopexit.0.loopexit: ; preds = %endif.4
+ br label %loopexit.0
+loopexit.0: ; preds = %loopexit.0.loopexit, %loopentry.0
+ br i1 false, label %then.5, label %loopentry.1
+then.5: ; preds = %loopexit.0
+ ret void
+loopentry.1: ; preds = %loopexit.0
+ %tmp.143 = icmp sgt i32 0, 0 ; <i1> [#uses=4]
+ br i1 %tmp.143, label %no_exit.1.preheader, label %loopexit.1
+no_exit.1.preheader: ; preds = %loopentry.1
+ br label %no_exit.1
+no_exit.1: ; preds = %endif.6, %no_exit.1.preheader
+ br i1 false, label %then.6, label %shortcirc_next.3
+shortcirc_next.3: ; preds = %no_exit.1
+ br i1 false, label %then.6, label %shortcirc_next.4
+shortcirc_next.4: ; preds = %shortcirc_next.3
+ br i1 false, label %then.6, label %endif.6
+then.6: ; preds = %shortcirc_next.4, %shortcirc_next.3, %no_exit.1
+ ret void
+endif.6: ; preds = %shortcirc_next.4
+ br i1 false, label %no_exit.1, label %loopexit.1.loopexit
+loopexit.1.loopexit: ; preds = %endif.6
+ br label %loopexit.1
+loopexit.1: ; preds = %loopexit.1.loopexit, %loopentry.1
+ br i1 false, label %then.i, label %loopentry.0.i
+then.i: ; preds = %loopexit.1
+ ret void
+loopentry.0.i: ; preds = %loopexit.1
+ br i1 %tmp.143, label %no_exit.0.i.preheader, label %readvector.exit
+no_exit.0.i.preheader: ; preds = %loopentry.0.i
+ br label %no_exit.0.i
+no_exit.0.i: ; preds = %loopexit.1.i, %no_exit.0.i.preheader
+ br i1 false, label %no_exit.1.i.preheader, label %loopexit.1.i
+no_exit.1.i.preheader: ; preds = %no_exit.0.i
+ br label %no_exit.1.i
+no_exit.1.i: ; preds = %loopexit.2.i, %no_exit.1.i.preheader
+ br i1 false, label %no_exit.2.i.preheader, label %loopexit.2.i
+no_exit.2.i.preheader: ; preds = %no_exit.1.i
+ br label %no_exit.2.i
+no_exit.2.i: ; preds = %no_exit.2.i, %no_exit.2.i.preheader
+ br i1 false, label %no_exit.2.i, label %loopexit.2.i.loopexit
+loopexit.2.i.loopexit: ; preds = %no_exit.2.i
+ br label %loopexit.2.i
+loopexit.2.i: ; preds = %loopexit.2.i.loopexit, %no_exit.1.i
+ br i1 false, label %no_exit.1.i, label %loopexit.1.i.loopexit
+loopexit.1.i.loopexit: ; preds = %loopexit.2.i
+ br label %loopexit.1.i
+loopexit.1.i: ; preds = %loopexit.1.i.loopexit, %no_exit.0.i
+ br i1 false, label %no_exit.0.i, label %readvector.exit.loopexit
+readvector.exit.loopexit: ; preds = %loopexit.1.i
+ br label %readvector.exit
+readvector.exit: ; preds = %readvector.exit.loopexit, %loopentry.0.i
+ br i1 %tmp.143, label %loopentry.1.preheader.i, label %loopexit.0.i
+loopentry.1.preheader.i: ; preds = %readvector.exit
+ br label %loopentry.1.outer.i
+loopentry.1.outer.i: ; preds = %loopexit.1.i110, %loopentry.1.preheader.i
+ br label %loopentry.1.i85
+loopentry.1.i85.loopexit: ; preds = %hamming.exit16.i
+ br label %loopentry.1.i85
+loopentry.1.i85: ; preds = %loopentry.1.i85.loopexit, %loopentry.1.outer.i
+ br i1 false, label %no_exit.1.preheader.i, label %loopexit.1.i110.loopexit1
+no_exit.1.preheader.i: ; preds = %loopentry.1.i85
+ br label %no_exit.1.i87
+no_exit.1.i87: ; preds = %then.1.i107, %no_exit.1.preheader.i
+ br i1 false, label %no_exit.i.i101.preheader, label %hamming.exit.i104
+no_exit.i.i101.preheader: ; preds = %no_exit.1.i87
+ br label %no_exit.i.i101
+no_exit.i.i101: ; preds = %no_exit.i.i101, %no_exit.i.i101.preheader
+ br i1 false, label %no_exit.i.i101, label %hamming.exit.i104.loopexit
+hamming.exit.i104.loopexit: ; preds = %no_exit.i.i101
+ br label %hamming.exit.i104
+hamming.exit.i104: ; preds = %hamming.exit.i104.loopexit, %no_exit.1.i87
+ br i1 false, label %no_exit.i15.i.preheader, label %hamming.exit16.i
+no_exit.i15.i.preheader: ; preds = %hamming.exit.i104
+ br label %no_exit.i15.i
+no_exit.i15.i: ; preds = %no_exit.i15.i, %no_exit.i15.i.preheader
+ br i1 false, label %no_exit.i15.i, label %hamming.exit16.i.loopexit
+hamming.exit16.i.loopexit: ; preds = %no_exit.i15.i
+ br label %hamming.exit16.i
+hamming.exit16.i: ; preds = %hamming.exit16.i.loopexit, %hamming.exit.i104
+ br i1 false, label %loopentry.1.i85.loopexit, label %then.1.i107
+then.1.i107: ; preds = %hamming.exit16.i
+ br i1 false, label %no_exit.1.i87, label %loopexit.1.i110.loopexit
+loopexit.1.i110.loopexit: ; preds = %then.1.i107
+ br label %loopexit.1.i110
+loopexit.1.i110.loopexit1: ; preds = %loopentry.1.i85
+ br label %loopexit.1.i110
+loopexit.1.i110: ; preds = %loopexit.1.i110.loopexit1, %loopexit.1.i110.loopexit
+ br i1 false, label %loopentry.1.outer.i, label %loopexit.0.i.loopexit
+loopexit.0.i.loopexit: ; preds = %loopexit.1.i110
+ br label %loopexit.0.i
+loopexit.0.i: ; preds = %loopexit.0.i.loopexit, %readvector.exit
+ br i1 false, label %UnifiedReturnBlock.i113, label %then.2.i112
+then.2.i112: ; preds = %loopexit.0.i
+ br label %checkham.exit
+UnifiedReturnBlock.i113: ; preds = %loopexit.0.i
+ br label %checkham.exit
+checkham.exit: ; preds = %UnifiedReturnBlock.i113, %then.2.i112
+ br i1 false, label %loopentry.1.i14.preheader, label %loopentry.3.i.preheader
+loopentry.1.i14.preheader: ; preds = %checkham.exit
+ br label %loopentry.1.i14
+loopentry.1.i14: ; preds = %loopexit.1.i18, %loopentry.1.i14.preheader
+ br i1 false, label %no_exit.1.i16.preheader, label %loopexit.1.i18
+no_exit.1.i16.preheader: ; preds = %loopentry.1.i14
+ br label %no_exit.1.i16
+no_exit.1.i16: ; preds = %no_exit.1.i16, %no_exit.1.i16.preheader
+ br i1 false, label %no_exit.1.i16, label %loopexit.1.i18.loopexit
+loopexit.1.i18.loopexit: ; preds = %no_exit.1.i16
+ br label %loopexit.1.i18
+loopexit.1.i18: ; preds = %loopexit.1.i18.loopexit, %loopentry.1.i14
+ br i1 false, label %loopentry.1.i14, label %loopentry.3.i.loopexit
+loopentry.3.i.loopexit: ; preds = %loopexit.1.i18
+ br label %loopentry.3.i.preheader
+loopentry.3.i.preheader: ; preds = %loopentry.3.i.loopexit, %checkham.exit
+ br label %loopentry.3.i
+loopentry.3.i: ; preds = %endif.1.i, %loopentry.3.i.preheader
+ br i1 false, label %loopentry.4.i.preheader, label %endif.1.i
+loopentry.4.i.preheader: ; preds = %loopentry.3.i
+ br label %loopentry.4.i
+loopentry.4.i: ; preds = %loopexit.4.i, %loopentry.4.i.preheader
+ br i1 false, label %no_exit.4.i.preheader, label %loopexit.4.i
+no_exit.4.i.preheader: ; preds = %loopentry.4.i
+ br label %no_exit.4.i
+no_exit.4.i: ; preds = %no_exit.4.i.backedge, %no_exit.4.i.preheader
+ br i1 false, label %endif.0.i, label %else.i
+else.i: ; preds = %no_exit.4.i
+ br i1 false, label %no_exit.4.i.backedge, label %loopexit.4.i.loopexit
+no_exit.4.i.backedge: ; preds = %endif.0.i, %else.i
+ br label %no_exit.4.i
+endif.0.i: ; preds = %no_exit.4.i
+ br i1 false, label %no_exit.4.i.backedge, label %loopexit.4.i.loopexit
+loopexit.4.i.loopexit: ; preds = %endif.0.i, %else.i
+ br label %loopexit.4.i
+loopexit.4.i: ; preds = %loopexit.4.i.loopexit, %loopentry.4.i
+ br i1 false, label %loopentry.4.i, label %endif.1.i.loopexit
+endif.1.i.loopexit: ; preds = %loopexit.4.i
+ br label %endif.1.i
+endif.1.i: ; preds = %endif.1.i.loopexit, %loopentry.3.i
+ %exitcond = icmp eq i32 0, 10 ; <i1> [#uses=1]
+ br i1 %exitcond, label %generateT.exit, label %loopentry.3.i
+generateT.exit: ; preds = %endif.1.i
+ br i1 false, label %then.0.i, label %loopentry.1.i30.preheader
+then.0.i: ; preds = %generateT.exit
+ ret void
+loopentry.1.i30.loopexit: ; preds = %loopexit.3.i
+ br label %loopentry.1.i30.backedge
+loopentry.1.i30.preheader: ; preds = %generateT.exit
+ br label %loopentry.1.i30
+loopentry.1.i30: ; preds = %loopentry.1.i30.backedge, %loopentry.1.i30.preheader
+ br i1 %tmp.143, label %no_exit.0.i31.preheader, label %loopentry.1.i30.backedge
+loopentry.1.i30.backedge: ; preds = %loopentry.1.i30, %loopentry.1.i30.loopexit
+ br label %loopentry.1.i30
+no_exit.0.i31.preheader: ; preds = %loopentry.1.i30
+ br label %no_exit.0.i31
+no_exit.0.i31: ; preds = %loopexit.3.i, %no_exit.0.i31.preheader
+ br i1 false, label %then.1.i, label %else.0.i
+then.1.i: ; preds = %no_exit.0.i31
+ br i1 undef, label %then.0.i29, label %loopentry.0.i31
+then.0.i29: ; preds = %then.1.i
+ unreachable
+loopentry.0.i31: ; preds = %then.1.i
+ br i1 false, label %no_exit.0.i38.preheader, label %loopentry.1.i.preheader
+no_exit.0.i38.preheader: ; preds = %loopentry.0.i31
+ br label %no_exit.0.i38
+no_exit.0.i38: ; preds = %no_exit.0.i38, %no_exit.0.i38.preheader
+ br i1 undef, label %no_exit.0.i38, label %loopentry.1.i.preheader.loopexit
+loopentry.1.i.preheader.loopexit: ; preds = %no_exit.0.i38
+ br label %loopentry.1.i.preheader
+loopentry.1.i.preheader: ; preds = %loopentry.1.i.preheader.loopexit, %loopentry.0.i31
+ br label %loopentry.1.i
+loopentry.1.i: ; preds = %endif.2.i, %loopentry.1.i.preheader
+ br i1 undef, label %loopentry.2.i39.preheader, label %loopexit.1.i79.loopexit2
+loopentry.2.i39.preheader: ; preds = %loopentry.1.i
+ br label %loopentry.2.i39
+loopentry.2.i39: ; preds = %loopexit.5.i77, %loopentry.2.i39.preheader
+ br i1 false, label %loopentry.3.i40.preheader, label %hamming.exit.i71
+loopentry.3.i40.preheader: ; preds = %loopentry.2.i39
+ br label %loopentry.3.i40
+loopentry.3.i40: ; preds = %loopexit.3.i51, %loopentry.3.i40.preheader
+ br i1 false, label %no_exit.3.preheader.i42, label %loopexit.3.i51
+no_exit.3.preheader.i42: ; preds = %loopentry.3.i40
+ br label %no_exit.3.i49
+no_exit.3.i49: ; preds = %no_exit.3.i49, %no_exit.3.preheader.i42
+ br i1 undef, label %no_exit.3.i49, label %loopexit.3.i51.loopexit
+loopexit.3.i51.loopexit: ; preds = %no_exit.3.i49
+ br label %loopexit.3.i51
+loopexit.3.i51: ; preds = %loopexit.3.i51.loopexit, %loopentry.3.i40
+ br i1 undef, label %loopentry.3.i40, label %loopentry.4.i52
+loopentry.4.i52: ; preds = %loopexit.3.i51
+ br i1 false, label %no_exit.4.i54.preheader, label %hamming.exit.i71
+no_exit.4.i54.preheader: ; preds = %loopentry.4.i52
+ br label %no_exit.4.i54
+no_exit.4.i54: ; preds = %no_exit.4.backedge.i, %no_exit.4.i54.preheader
+ br i1 undef, label %then.1.i55, label %endif.1.i56
+then.1.i55: ; preds = %no_exit.4.i54
+ br i1 undef, label %no_exit.4.backedge.i, label %loopexit.4.i57
+no_exit.4.backedge.i: ; preds = %endif.1.i56, %then.1.i55
+ br label %no_exit.4.i54
+endif.1.i56: ; preds = %no_exit.4.i54
+ br i1 undef, label %no_exit.4.backedge.i, label %loopexit.4.i57
+loopexit.4.i57: ; preds = %endif.1.i56, %then.1.i55
+ br i1 false, label %no_exit.i.i69.preheader, label %hamming.exit.i71
+no_exit.i.i69.preheader: ; preds = %loopexit.4.i57
+ br label %no_exit.i.i69
+no_exit.i.i69: ; preds = %no_exit.i.i69, %no_exit.i.i69.preheader
+ br i1 undef, label %no_exit.i.i69, label %hamming.exit.i71.loopexit
+hamming.exit.i71.loopexit: ; preds = %no_exit.i.i69
+ br label %hamming.exit.i71
+hamming.exit.i71: ; preds = %hamming.exit.i71.loopexit, %loopexit.4.i57, %loopentry.4.i52, %loopentry.2.i39
+ br i1 undef, label %endif.2.i, label %loopentry.5.i72
+loopentry.5.i72: ; preds = %hamming.exit.i71
+ br i1 false, label %shortcirc_next.i74.preheader, label %loopexit.5.i77
+shortcirc_next.i74.preheader: ; preds = %loopentry.5.i72
+ br label %shortcirc_next.i74
+shortcirc_next.i74: ; preds = %no_exit.5.i76, %shortcirc_next.i74.preheader
+ br i1 undef, label %no_exit.5.i76, label %loopexit.5.i77.loopexit
+no_exit.5.i76: ; preds = %shortcirc_next.i74
+ br i1 undef, label %shortcirc_next.i74, label %loopexit.5.i77.loopexit
+loopexit.5.i77.loopexit: ; preds = %no_exit.5.i76, %shortcirc_next.i74
+ br label %loopexit.5.i77
+loopexit.5.i77: ; preds = %loopexit.5.i77.loopexit, %loopentry.5.i72
+ br i1 undef, label %loopentry.2.i39, label %loopexit.1.i79.loopexit
+endif.2.i: ; preds = %hamming.exit.i71
+ br label %loopentry.1.i
+loopexit.1.i79.loopexit: ; preds = %loopexit.5.i77
+ br label %loopexit.1.i79
+loopexit.1.i79.loopexit2: ; preds = %loopentry.1.i
+ br label %loopexit.1.i79
+loopexit.1.i79: ; preds = %loopexit.1.i79.loopexit2, %loopexit.1.i79.loopexit
+ br i1 undef, label %then.3.i, label %loopentry.6.i80
+then.3.i: ; preds = %loopexit.1.i79
+ br i1 false, label %no_exit.6.i82.preheader, label %run.exit
+loopentry.6.i80: ; preds = %loopexit.1.i79
+ br i1 false, label %no_exit.6.i82.preheader, label %run.exit
+no_exit.6.i82.preheader: ; preds = %loopentry.6.i80, %then.3.i
+ br label %no_exit.6.i82
+no_exit.6.i82: ; preds = %no_exit.6.i82, %no_exit.6.i82.preheader
+ br i1 undef, label %no_exit.6.i82, label %run.exit.loopexit
+run.exit.loopexit: ; preds = %no_exit.6.i82
+ br label %run.exit
+run.exit: ; preds = %run.exit.loopexit, %loopentry.6.i80, %then.3.i
+ br i1 false, label %no_exit.1.i36.preheader, label %loopentry.3.i37
+else.0.i: ; preds = %no_exit.0.i31
+ br i1 false, label %then.0.i4, label %loopentry.0.i6
+then.0.i4: ; preds = %else.0.i
+ unreachable
+loopentry.0.i6: ; preds = %else.0.i
+ br i1 false, label %no_exit.0.i8.preheader, label %loopentry.2.i.preheader
+no_exit.0.i8.preheader: ; preds = %loopentry.0.i6
+ br label %no_exit.0.i8
+no_exit.0.i8: ; preds = %no_exit.0.i8, %no_exit.0.i8.preheader
+ br i1 false, label %no_exit.0.i8, label %loopentry.2.i.preheader.loopexit
+loopentry.2.i.preheader.loopexit: ; preds = %no_exit.0.i8
+ br label %loopentry.2.i.preheader
+loopentry.2.i.preheader: ; preds = %loopentry.2.i.preheader.loopexit, %loopentry.0.i6
+ br label %loopentry.2.i
+loopentry.2.i: ; preds = %endif.3.i19, %loopentry.2.i.preheader
+ br i1 false, label %loopentry.3.i10.preheader, label %loopentry.4.i15
+loopentry.3.i10.preheader: ; preds = %loopentry.2.i
+ br label %loopentry.3.i10
+loopentry.3.i10: ; preds = %loopexit.3.i14, %loopentry.3.i10.preheader
+ br i1 false, label %no_exit.3.preheader.i, label %loopexit.3.i14
+no_exit.3.preheader.i: ; preds = %loopentry.3.i10
+ br label %no_exit.3.i12
+no_exit.3.i12: ; preds = %no_exit.3.i12, %no_exit.3.preheader.i
+ br i1 false, label %no_exit.3.i12, label %loopexit.3.i14.loopexit
+loopexit.3.i14.loopexit: ; preds = %no_exit.3.i12
+ br label %loopexit.3.i14
+loopexit.3.i14: ; preds = %loopexit.3.i14.loopexit, %loopentry.3.i10
+ br i1 false, label %loopentry.3.i10, label %loopentry.4.i15.loopexit
+loopentry.4.i15.loopexit: ; preds = %loopexit.3.i14
+ br label %loopentry.4.i15
+loopentry.4.i15: ; preds = %loopentry.4.i15.loopexit, %loopentry.2.i
+ br i1 false, label %loopentry.5.outer.i.preheader, label %loopentry.7.i
+loopentry.5.outer.i.preheader: ; preds = %loopentry.4.i15
+ br label %loopentry.5.outer.i
+loopentry.5.outer.i: ; preds = %loopexit.5.i, %loopentry.5.outer.i.preheader
+ br label %loopentry.5.i
+loopentry.5.i: ; preds = %endif.1.i18, %loopentry.5.outer.i
+ br i1 false, label %no_exit.5.i.preheader, label %loopexit.5.i.loopexit3
+no_exit.5.i.preheader: ; preds = %loopentry.5.i
+ br label %no_exit.5.i
+no_exit.5.i: ; preds = %then.2.i, %no_exit.5.i.preheader
+ br i1 false, label %loopentry.6.i, label %endif.1.i18
+loopentry.6.i: ; preds = %no_exit.5.i
+ br i1 false, label %no_exit.6.preheader.i, label %loopexit.6.i
+no_exit.6.preheader.i: ; preds = %loopentry.6.i
+ br label %no_exit.6.i
+no_exit.6.i: ; preds = %no_exit.6.i, %no_exit.6.preheader.i
+ br i1 false, label %no_exit.6.i, label %loopexit.6.i.loopexit
+loopexit.6.i.loopexit: ; preds = %no_exit.6.i
+ br label %loopexit.6.i
+loopexit.6.i: ; preds = %loopexit.6.i.loopexit, %loopentry.6.i
+ br i1 false, label %then.2.i, label %endif.1.i18
+then.2.i: ; preds = %loopexit.6.i
+ br i1 false, label %no_exit.5.i, label %loopexit.5.i.loopexit
+endif.1.i18: ; preds = %loopexit.6.i, %no_exit.5.i
+ br label %loopentry.5.i
+loopexit.5.i.loopexit: ; preds = %then.2.i
+ br label %loopexit.5.i
+loopexit.5.i.loopexit3: ; preds = %loopentry.5.i
+ br label %loopexit.5.i
+loopexit.5.i: ; preds = %loopexit.5.i.loopexit3, %loopexit.5.i.loopexit
+ br i1 false, label %loopentry.5.outer.i, label %loopentry.7.i.loopexit
+loopentry.7.i.loopexit: ; preds = %loopexit.5.i
+ br label %loopentry.7.i
+loopentry.7.i: ; preds = %loopentry.7.i.loopexit, %loopentry.4.i15
+ br i1 false, label %no_exit.7.i.preheader, label %hamming.exit.i
+no_exit.7.i.preheader: ; preds = %loopentry.7.i
+ br label %no_exit.7.i
+no_exit.7.i: ; preds = %no_exit.7.i, %no_exit.7.i.preheader
+ br i1 false, label %no_exit.7.i, label %loopexit.7.i
+loopexit.7.i: ; preds = %no_exit.7.i
+ br i1 false, label %no_exit.i.i.preheader, label %hamming.exit.i
+no_exit.i.i.preheader: ; preds = %loopexit.7.i
+ br label %no_exit.i.i
+no_exit.i.i: ; preds = %no_exit.i.i, %no_exit.i.i.preheader
+ br i1 false, label %no_exit.i.i, label %hamming.exit.i.loopexit
+hamming.exit.i.loopexit: ; preds = %no_exit.i.i
+ br label %hamming.exit.i
+hamming.exit.i: ; preds = %hamming.exit.i.loopexit, %loopexit.7.i, %loopentry.7.i
+ br i1 false, label %endif.3.i19, label %loopentry.8.i
+loopentry.8.i: ; preds = %hamming.exit.i
+ br i1 false, label %shortcirc_next.i.preheader, label %loopexit.8.i
+shortcirc_next.i.preheader: ; preds = %loopentry.8.i
+ br label %shortcirc_next.i
+shortcirc_next.i: ; preds = %no_exit.8.i, %shortcirc_next.i.preheader
+ br i1 false, label %no_exit.8.i, label %loopexit.8.i.loopexit
+no_exit.8.i: ; preds = %shortcirc_next.i
+ br i1 false, label %shortcirc_next.i, label %loopexit.8.i.loopexit
+loopexit.8.i.loopexit: ; preds = %no_exit.8.i, %shortcirc_next.i
+ br label %loopexit.8.i
+loopexit.8.i: ; preds = %loopexit.8.i.loopexit, %loopentry.8.i
+ br i1 false, label %no_exit.9.i.preheader, label %endif.3.i19
+no_exit.9.i.preheader: ; preds = %loopexit.8.i
+ br label %no_exit.9.i
+no_exit.9.i: ; preds = %no_exit.9.i, %no_exit.9.i.preheader
+ br i1 false, label %no_exit.9.i, label %endif.3.i19.loopexit
+endif.3.i19.loopexit: ; preds = %no_exit.9.i
+ br label %endif.3.i19
+endif.3.i19: ; preds = %endif.3.i19.loopexit, %loopexit.8.i, %hamming.exit.i
+ br i1 false, label %loopentry.2.i, label %loopexit.1.i20
+loopexit.1.i20: ; preds = %endif.3.i19
+ br i1 false, label %then.4.i, label %UnifiedReturnBlock.i
+then.4.i: ; preds = %loopexit.1.i20
+ br label %runcont.exit
+UnifiedReturnBlock.i: ; preds = %loopexit.1.i20
+ br label %runcont.exit
+runcont.exit: ; preds = %UnifiedReturnBlock.i, %then.4.i
+ br i1 false, label %no_exit.1.i36.preheader, label %loopentry.3.i37
+no_exit.1.i36.preheader: ; preds = %runcont.exit, %run.exit
+ br label %no_exit.1.i36
+no_exit.1.i36: ; preds = %no_exit.1.i36, %no_exit.1.i36.preheader
+ br i1 false, label %no_exit.1.i36, label %loopentry.3.i37.loopexit
+loopentry.3.i37.loopexit: ; preds = %no_exit.1.i36
+ br label %loopentry.3.i37
+loopentry.3.i37: ; preds = %loopentry.3.i37.loopexit, %runcont.exit, %run.exit
+ br i1 false, label %loopentry.4.i38.preheader, label %loopexit.3.i
+loopentry.4.i38.preheader: ; preds = %loopentry.3.i37
+ br label %loopentry.4.i38
+loopentry.4.i38: ; preds = %loopexit.4.i42, %loopentry.4.i38.preheader
+ br i1 false, label %no_exit.3.i.preheader, label %loopexit.4.i42
+no_exit.3.i.preheader: ; preds = %loopentry.4.i38
+ br label %no_exit.3.i
+no_exit.3.i: ; preds = %no_exit.3.i.backedge, %no_exit.3.i.preheader
+ br i1 false, label %endif.3.i, label %else.1.i
+else.1.i: ; preds = %no_exit.3.i
+ br i1 false, label %no_exit.3.i.backedge, label %loopexit.4.i42.loopexit
+no_exit.3.i.backedge: ; preds = %endif.3.i, %else.1.i
+ br label %no_exit.3.i
+endif.3.i: ; preds = %no_exit.3.i
+ br i1 false, label %no_exit.3.i.backedge, label %loopexit.4.i42.loopexit
+loopexit.4.i42.loopexit: ; preds = %endif.3.i, %else.1.i
+ br label %loopexit.4.i42
+loopexit.4.i42: ; preds = %loopexit.4.i42.loopexit, %loopentry.4.i38
+ br i1 false, label %loopentry.4.i38, label %loopexit.3.i.loopexit
+loopexit.3.i.loopexit: ; preds = %loopexit.4.i42
+ br label %loopexit.3.i
+loopexit.3.i: ; preds = %loopexit.3.i.loopexit, %loopentry.3.i37
+ %tmp.13.i155 = icmp slt i32 0, 0 ; <i1> [#uses=1]
+ br i1 %tmp.13.i155, label %no_exit.0.i31, label %loopentry.1.i30.loopexit
+}
diff --git a/test/Transforms/SimplifyCFG/2006-08-03-Crash.ll b/test/Transforms/SimplifyCFG/2006-08-03-Crash.ll
new file mode 100644
index 0000000..2c84c93
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2006-08-03-Crash.ll
@@ -0,0 +1,98 @@
+; RUN: opt < %s -gvn -simplifycfg \
+; RUN: -disable-output
+; PR867
+; END.
+
+target datalayout = "E-p:32:32"
+target triple = "powerpc-apple-darwin8"
+ %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+ %struct.eh_status = type opaque
+ %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+ %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+ %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+ %struct.initial_value_struct = type opaque
+ %struct.lang_decl = type opaque
+ %struct.lang_type = type opaque
+ %struct.language_function = type opaque
+ %struct.location_t = type { i8*, i32 }
+ %struct.machine_function = type { i32, i32, i8*, i32, i32 }
+ %struct.rtunion = type { i32 }
+ %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.rtx_def = type { i16, i8, i8, %struct.u }
+ %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+ %struct.temp_slot = type opaque
+ %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+ %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+ %struct.tree_decl_u1 = type { i64 }
+ %struct.tree_decl_u2 = type { %struct.function* }
+ %struct.tree_node = type { %struct.tree_decl }
+ %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* }
+ %struct.u = type { [1 x i64] }
+ %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+ %struct.varasm_status = type opaque
+ %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+ %union.tree_ann_d = type opaque
+@mode_class = external global [35 x i8] ; <[35 x i8]*> [#uses=3]
+
+define void @fold_builtin_classify() {
+entry:
+ %tmp63 = load i32* null ; <i32> [#uses=1]
+ switch i32 %tmp63, label %bb276 [
+ i32 414, label %bb145
+ i32 417, label %bb
+ ]
+bb: ; preds = %entry
+ ret void
+bb145: ; preds = %entry
+ %tmp146 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
+ %tmp148 = getelementptr %struct.tree_node* %tmp146, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
+ %tmp149 = load %struct.tree_node** %tmp148 ; <%struct.tree_node*> [#uses=1]
+ %tmp150 = bitcast %struct.tree_node* %tmp149 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
+ %tmp151 = getelementptr %struct.tree_type* %tmp150, i32 0, i32 6 ; <i16*> [#uses=1]
+ %tmp151.upgrd.1 = bitcast i16* %tmp151 to i32* ; <i32*> [#uses=1]
+ %tmp152 = load i32* %tmp151.upgrd.1 ; <i32> [#uses=1]
+ %tmp154 = lshr i32 %tmp152, 16 ; <i32> [#uses=1]
+ %tmp154.mask = and i32 %tmp154, 127 ; <i32> [#uses=1]
+ %gep.upgrd.2 = zext i32 %tmp154.mask to i64 ; <i64> [#uses=1]
+ %tmp155 = getelementptr [35 x i8]* @mode_class, i32 0, i64 %gep.upgrd.2 ; <i8*> [#uses=1]
+ %tmp156 = load i8* %tmp155 ; <i8> [#uses=1]
+ %tmp157 = icmp eq i8 %tmp156, 4 ; <i1> [#uses=1]
+ br i1 %tmp157, label %cond_next241, label %cond_true158
+cond_true158: ; preds = %bb145
+ %tmp172 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
+ %tmp174 = getelementptr %struct.tree_node* %tmp172, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
+ %tmp175 = load %struct.tree_node** %tmp174 ; <%struct.tree_node*> [#uses=1]
+ %tmp176 = bitcast %struct.tree_node* %tmp175 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
+ %tmp177 = getelementptr %struct.tree_type* %tmp176, i32 0, i32 6 ; <i16*> [#uses=1]
+ %tmp177.upgrd.3 = bitcast i16* %tmp177 to i32* ; <i32*> [#uses=1]
+ %tmp178 = load i32* %tmp177.upgrd.3 ; <i32> [#uses=1]
+ %tmp180 = lshr i32 %tmp178, 16 ; <i32> [#uses=1]
+ %tmp180.mask = and i32 %tmp180, 127 ; <i32> [#uses=1]
+ %gep.upgrd.4 = zext i32 %tmp180.mask to i64 ; <i64> [#uses=1]
+ %tmp181 = getelementptr [35 x i8]* @mode_class, i32 0, i64 %gep.upgrd.4 ; <i8*> [#uses=1]
+ %tmp182 = load i8* %tmp181 ; <i8> [#uses=1]
+ %tmp183 = icmp eq i8 %tmp182, 8 ; <i1> [#uses=1]
+ br i1 %tmp183, label %cond_next241, label %cond_true184
+cond_true184: ; preds = %cond_true158
+ %tmp185 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=1]
+ %tmp187 = getelementptr %struct.tree_node* %tmp185, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1]
+ %tmp188 = load %struct.tree_node** %tmp187 ; <%struct.tree_node*> [#uses=1]
+ %tmp189 = bitcast %struct.tree_node* %tmp188 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1]
+ %tmp190 = getelementptr %struct.tree_type* %tmp189, i32 0, i32 6 ; <i16*> [#uses=1]
+ %tmp190.upgrd.5 = bitcast i16* %tmp190 to i32* ; <i32*> [#uses=1]
+ %tmp191 = load i32* %tmp190.upgrd.5 ; <i32> [#uses=1]
+ %tmp193 = lshr i32 %tmp191, 16 ; <i32> [#uses=1]
+ %tmp193.mask = and i32 %tmp193, 127 ; <i32> [#uses=1]
+ %gep.upgrd.6 = zext i32 %tmp193.mask to i64 ; <i64> [#uses=1]
+ %tmp194 = getelementptr [35 x i8]* @mode_class, i32 0, i64 %gep.upgrd.6 ; <i8*> [#uses=1]
+ %tmp195 = load i8* %tmp194 ; <i8> [#uses=1]
+ %tmp196 = icmp eq i8 %tmp195, 4 ; <i1> [#uses=1]
+ br i1 %tmp196, label %cond_next241, label %cond_true197
+cond_true197: ; preds = %cond_true184
+ ret void
+cond_next241: ; preds = %cond_true184, %cond_true158, %bb145
+ %tmp245 = load i32* null ; <i32> [#uses=0]
+ ret void
+bb276: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll b/test/Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll
new file mode 100644
index 0000000..009d1c8
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll
@@ -0,0 +1,28 @@
+; PR957
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep select
+
+@G = extern_weak global i32
+
+define i32 @test(i32 %tmp) {
+cond_false179:
+ %tmp181 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1]
+ br i1 %tmp181, label %cond_true182, label %cond_next185
+cond_true182: ; preds = %cond_false179
+ br label %cond_next185
+cond_next185: ; preds = %cond_true182, %cond_false179
+ %d0.3 = phi i32 [ udiv (i32 1, i32 ptrtoint (i32* @G to i32)), %cond_true182 ], [ %tmp, %cond_false179 ] ; <i32> [#uses=1]
+ ret i32 %d0.3
+}
+
+define i32 @test2(i32 %tmp) {
+cond_false179:
+ %tmp181 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1]
+ br i1 %tmp181, label %cond_true182, label %cond_next185
+cond_true182: ; preds = %cond_false179
+ br label %cond_next185
+cond_next185: ; preds = %cond_true182, %cond_false179
+ %d0.3 = phi i32 [ udiv (i32 1, i32 ptrtoint (i32* @G to i32)), %cond_true182 ], [ %tmp, %cond_false179 ] ; <i32> [#uses=1]
+ call i32 @test( i32 4 ) ; <i32>:0 [#uses=0]
+ ret i32 %d0.3
+}
diff --git a/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll b/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll
new file mode 100644
index 0000000..dba41c9
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll
@@ -0,0 +1,555 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; END.
+ %struct..4._102 = type { %struct.QVectorData* }
+ %struct..5._125 = type { %struct.QMapData* }
+ %struct.QAbstractTextDocumentLayout = type { %struct.QObject }
+ %struct.QBasicAtomic = type { i32 }
+ %struct.QFont = type { %struct.QFontPrivate*, i32 }
+ %struct.QFontMetrics = type { %struct.QFontPrivate* }
+ %struct.QFontPrivate = type opaque
+ %"struct.QFragmentMap<QTextBlockData>" = type { %struct.QFragmentMapData }
+ %struct.QFragmentMapData = type { %"struct.QFragmentMapData::._154", i32 }
+ %"struct.QFragmentMapData::._154" = type { %"struct.QFragmentMapData::Header"* }
+ %"struct.QFragmentMapData::Header" = type { i32, i32, i32, i32, i32, i32, i32, i32 }
+ %"struct.QHash<uint,QHashDummyValue>" = type { %"struct.QHash<uint,QHashDummyValue>::._152" }
+ %"struct.QHash<uint,QHashDummyValue>::._152" = type { %struct.QHashData* }
+ %struct.QHashData = type { %"struct.QHashData::Node"*, %"struct.QHashData::Node"**, %struct.QBasicAtomic, i32, i32, i16, i16, i32, i8 }
+ %"struct.QHashData::Node" = type { %"struct.QHashData::Node"*, i32 }
+ %"struct.QList<QObject*>::._92" = type { %struct.QListData }
+ %"struct.QList<QPointer<QObject> >" = type { %"struct.QList<QObject*>::._92" }
+ %struct.QListData = type { %"struct.QListData::Data"* }
+ %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] }
+ %"struct.QMap<QUrl,QVariant>" = type { %struct..5._125 }
+ %struct.QMapData = type { %"struct.QMapData::Node"*, [12 x %"struct.QMapData::Node"*], %struct.QBasicAtomic, i32, i32, i32, i8 }
+ %"struct.QMapData::Node" = type { %"struct.QMapData::Node"*, [1 x %"struct.QMapData::Node"*] }
+ %struct.QObject = type { i32 (...)**, %struct.QObjectData* }
+ %struct.QObjectData = type { i32 (...)**, %struct.QObject*, %struct.QObject*, %"struct.QList<QPointer<QObject> >", i8, [3 x i8], i32, i32 }
+ %struct.QObjectPrivate = type { %struct.QObjectData, i32, %struct.QObject*, %"struct.QList<QPointer<QObject> >", %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %struct.QString }
+ %struct.QPaintDevice = type { i32 (...)**, i16 }
+ %struct.QPainter = type { %struct.QPainterPrivate* }
+ %struct.QPainterPrivate = type opaque
+ %struct.QPointF = type { double, double }
+ %struct.QPrinter = type { %struct.QPaintDevice, %struct.QPrinterPrivate* }
+ %struct.QPrinterPrivate = type opaque
+ %struct.QRectF = type { double, double, double, double }
+ %"struct.QSet<uint>" = type { %"struct.QHash<uint,QHashDummyValue>" }
+ %"struct.QSharedDataPointer<QTextFormatPrivate>" = type { %struct.QTextFormatPrivate* }
+ %struct.QString = type { %"struct.QString::Data"* }
+ %"struct.QString::Data" = type { %struct.QBasicAtomic, i32, i32, i16*, i8, i8, [1 x i16] }
+ %struct.QTextBlockFormat = type { %struct.QTextFormat }
+ %struct.QTextBlockGroup = type { %struct.QAbstractTextDocumentLayout }
+ %struct.QTextDocumentConfig = type { %struct.QString }
+ %struct.QTextDocumentPrivate = type { %struct.QObjectPrivate, %struct.QString, %"struct.QVector<QAbstractTextDocumentLayout::Selection>", i1, i32, i32, i1, i32, i32, i32, i32, i1, %struct.QTextFormatCollection, %struct.QTextBlockGroup*, %struct.QAbstractTextDocumentLayout*, %"struct.QFragmentMap<QTextBlockData>", %"struct.QFragmentMap<QTextBlockData>", i32, %"struct.QList<QPointer<QObject> >", %"struct.QList<QPointer<QObject> >", %"struct.QMap<QUrl,QVariant>", %"struct.QMap<QUrl,QVariant>", %"struct.QMap<QUrl,QVariant>", %struct.QTextDocumentConfig, i1, i1, %struct.QPointF }
+ %struct.QTextFormat = type { %"struct.QSharedDataPointer<QTextFormatPrivate>", i32 }
+ %struct.QTextFormatCollection = type { %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %"struct.QSet<uint>", %struct.QFont }
+ %struct.QTextFormatPrivate = type opaque
+ %"struct.QVector<QAbstractTextDocumentLayout::Selection>" = type { %struct..4._102 }
+ %struct.QVectorData = type { %struct.QBasicAtomic, i32, i32, i8 }
+
+define void @_ZNK13QTextDocument5printEP8QPrinter(%struct.QAbstractTextDocumentLayout* %this, %struct.QPrinter* %printer) {
+entry:
+ %tmp = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=2]
+ %tmp.upgrd.1 = alloca %struct.QRectF, align 16 ; <%struct.QRectF*> [#uses=5]
+ %tmp2 = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=3]
+ %tmp.upgrd.2 = alloca %struct.QFontMetrics, align 16 ; <%struct.QFontMetrics*> [#uses=4]
+ %tmp.upgrd.3 = alloca %struct.QFont, align 16 ; <%struct.QFont*> [#uses=4]
+ %tmp3 = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=2]
+ %p = alloca %struct.QPainter, align 16 ; <%struct.QPainter*> [#uses=14]
+ %body = alloca %struct.QRectF, align 16 ; <%struct.QRectF*> [#uses=9]
+ %pageNumberPos = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=4]
+ %scaledPageSize = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=6]
+ %printerPageSize = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=3]
+ %fmt = alloca %struct.QTextBlockFormat, align 16 ; <%struct.QTextBlockFormat*> [#uses=5]
+ %font = alloca %struct.QFont, align 16 ; <%struct.QFont*> [#uses=5]
+ %tmp.upgrd.4 = call %struct.QTextDocumentPrivate* @_ZNK13QTextDocument6d_funcEv( %struct.QAbstractTextDocumentLayout* %this ) ; <%struct.QTextDocumentPrivate*> [#uses=5]
+ %tmp.upgrd.5 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ call void @_ZN8QPainterC1EP12QPaintDevice( %struct.QPainter* %p, %struct.QPaintDevice* %tmp.upgrd.5 )
+ %tmp.upgrd.6 = invoke i1 @_ZNK8QPainter8isActiveEv( %struct.QPainter* %p )
+ to label %invcont unwind label %cleanup329 ; <i1> [#uses=1]
+invcont: ; preds = %entry
+ br i1 %tmp.upgrd.6, label %cond_next, label %cleanup328
+cond_next: ; preds = %invcont
+ %tmp8 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %this )
+ to label %invcont7 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=0]
+invcont7: ; preds = %cond_next
+ %tmp10 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1]
+ call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp, double 0.000000e+00, double 0.000000e+00 )
+ call void @_ZN6QRectFC1ERK7QPointFRK6QSizeF( %struct.QRectF* %body, %struct.QPointF* %tmp, %struct.QPointF* %tmp10 )
+ call void @_ZN7QPointFC1Ev( %struct.QPointF* %pageNumberPos )
+ %tmp12 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1]
+ %tmp13 = call i1 @_ZNK6QSizeF7isValidEv( %struct.QPointF* %tmp12 ) ; <i1> [#uses=1]
+ br i1 %tmp13, label %cond_next15, label %bb
+cond_next15: ; preds = %invcont7
+ %tmp17 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1]
+ %tmp.upgrd.7 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %tmp17 ) ; <double> [#uses=1]
+ %tmp18 = fcmp oeq double %tmp.upgrd.7, 0x41DFFFFFFFC00000 ; <i1> [#uses=1]
+ br i1 %tmp18, label %bb, label %cond_next20
+cond_next20: ; preds = %cond_next15
+ br label %bb21
+bb: ; preds = %cond_next15, %invcont7
+ br label %bb21
+bb21: ; preds = %bb, %cond_next20
+ %iftmp.406.0 = phi i1 [ false, %bb ], [ true, %cond_next20 ] ; <i1> [#uses=1]
+ br i1 %iftmp.406.0, label %cond_true24, label %cond_false
+cond_true24: ; preds = %bb21
+ %tmp.upgrd.8 = invoke i32 @_Z13qt_defaultDpiv( )
+ to label %invcont25 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont25: ; preds = %cond_true24
+ %tmp26 = sitofp i32 %tmp.upgrd.8 to double ; <double> [#uses=2]
+ %tmp30 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %this )
+ to label %invcont29 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=1]
+invcont29: ; preds = %invcont25
+ %tmp32 = invoke %struct.QPaintDevice* @_ZNK27QAbstractTextDocumentLayout11paintDeviceEv( %struct.QAbstractTextDocumentLayout* %tmp30 )
+ to label %invcont31 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=3]
+invcont31: ; preds = %invcont29
+ %tmp34 = icmp eq %struct.QPaintDevice* %tmp32, null ; <i1> [#uses=1]
+ br i1 %tmp34, label %cond_next42, label %cond_true35
+cond_true35: ; preds = %invcont31
+ %tmp38 = invoke i32 @_ZNK12QPaintDevice11logicalDpiXEv( %struct.QPaintDevice* %tmp32 )
+ to label %invcont37 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont37: ; preds = %cond_true35
+ %tmp38.upgrd.9 = sitofp i32 %tmp38 to double ; <double> [#uses=1]
+ %tmp41 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp32 )
+ to label %invcont40 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont40: ; preds = %invcont37
+ %tmp41.upgrd.10 = sitofp i32 %tmp41 to double ; <double> [#uses=1]
+ br label %cond_next42
+cond_next42: ; preds = %invcont40, %invcont31
+ %sourceDpiY.2 = phi double [ %tmp41.upgrd.10, %invcont40 ], [ %tmp26, %invcont31 ] ; <double> [#uses=1]
+ %sourceDpiX.2 = phi double [ %tmp38.upgrd.9, %invcont40 ], [ %tmp26, %invcont31 ] ; <double> [#uses=1]
+ %tmp44 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ %tmp46 = invoke i32 @_ZNK12QPaintDevice11logicalDpiXEv( %struct.QPaintDevice* %tmp44 )
+ to label %invcont45 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont45: ; preds = %cond_next42
+ %tmp46.upgrd.11 = sitofp i32 %tmp46 to double ; <double> [#uses=1]
+ %tmp48 = fdiv double %tmp46.upgrd.11, %sourceDpiX.2 ; <double> [#uses=2]
+ %tmp50 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ %tmp52 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp50 )
+ to label %invcont51 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont51: ; preds = %invcont45
+ %tmp52.upgrd.12 = sitofp i32 %tmp52 to double ; <double> [#uses=1]
+ %tmp54 = fdiv double %tmp52.upgrd.12, %sourceDpiY.2 ; <double> [#uses=2]
+ invoke void @_ZN8QPainter5scaleEdd( %struct.QPainter* %p, double %tmp48, double %tmp54 )
+ to label %invcont57 unwind label %cleanup329
+invcont57: ; preds = %invcont51
+ %tmp.upgrd.13 = getelementptr %struct.QPointF* %scaledPageSize, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp60 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26, i32 0 ; <double*> [#uses=1]
+ %tmp61 = load double* %tmp60 ; <double> [#uses=1]
+ store double %tmp61, double* %tmp.upgrd.13
+ %tmp62 = getelementptr %struct.QPointF* %scaledPageSize, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp63 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26, i32 1 ; <double*> [#uses=1]
+ %tmp64 = load double* %tmp63 ; <double> [#uses=1]
+ store double %tmp64, double* %tmp62
+ %tmp65 = call double* @_ZN6QSizeF6rwidthEv( %struct.QPointF* %scaledPageSize ) ; <double*> [#uses=2]
+ %tmp67 = load double* %tmp65 ; <double> [#uses=1]
+ %tmp69 = fmul double %tmp67, %tmp48 ; <double> [#uses=1]
+ store double %tmp69, double* %tmp65
+ %tmp71 = call double* @_ZN6QSizeF7rheightEv( %struct.QPointF* %scaledPageSize ) ; <double*> [#uses=2]
+ %tmp73 = load double* %tmp71 ; <double> [#uses=1]
+ %tmp75 = fmul double %tmp73, %tmp54 ; <double> [#uses=1]
+ store double %tmp75, double* %tmp71
+ %tmp78 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ %tmp80 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp78 )
+ to label %invcont79 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont79: ; preds = %invcont57
+ %tmp82 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ %tmp84 = invoke i32 @_ZNK12QPaintDevice5widthEv( %struct.QPaintDevice* %tmp82 )
+ to label %invcont83 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont83: ; preds = %invcont79
+ %tmp80.upgrd.14 = sitofp i32 %tmp80 to double ; <double> [#uses=1]
+ %tmp84.upgrd.15 = sitofp i32 %tmp84 to double ; <double> [#uses=1]
+ call void @_ZN6QSizeFC1Edd( %struct.QPointF* %printerPageSize, double %tmp84.upgrd.15, double %tmp80.upgrd.14 )
+ %tmp85 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %printerPageSize ) ; <double> [#uses=1]
+ %tmp86 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %scaledPageSize ) ; <double> [#uses=1]
+ %tmp87 = fdiv double %tmp85, %tmp86 ; <double> [#uses=1]
+ %tmp88 = call double @_ZNK6QSizeF5widthEv( %struct.QPointF* %printerPageSize ) ; <double> [#uses=1]
+ %tmp89 = call double @_ZNK6QSizeF5widthEv( %struct.QPointF* %scaledPageSize ) ; <double> [#uses=1]
+ %tmp90 = fdiv double %tmp88, %tmp89 ; <double> [#uses=1]
+ invoke void @_ZN8QPainter5scaleEdd( %struct.QPainter* %p, double %tmp90, double %tmp87 )
+ to label %cond_next194 unwind label %cleanup329
+cond_false: ; preds = %bb21
+ %tmp.upgrd.16 = getelementptr %struct.QAbstractTextDocumentLayout* %this, i32 0, i32 0 ; <%struct.QObject*> [#uses=1]
+ %tmp95 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument5cloneEP7QObject( %struct.QAbstractTextDocumentLayout* %this, %struct.QObject* %tmp.upgrd.16 )
+ to label %invcont94 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=9]
+invcont94: ; preds = %cond_false
+ %tmp99 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %tmp95 )
+ to label %invcont98 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=1]
+invcont98: ; preds = %invcont94
+ %tmp101 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont100 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=1]
+invcont100: ; preds = %invcont98
+ invoke void @_ZN27QAbstractTextDocumentLayout14setPaintDeviceEP12QPaintDevice( %struct.QAbstractTextDocumentLayout* %tmp99, %struct.QPaintDevice* %tmp101 )
+ to label %invcont103 unwind label %cleanup329
+invcont103: ; preds = %invcont100
+ %tmp105 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont104 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=1]
+invcont104: ; preds = %invcont103
+ %tmp107 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp105 )
+ to label %invcont106 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont106: ; preds = %invcont104
+ %tmp108 = sitofp i32 %tmp107 to double ; <double> [#uses=1]
+ %tmp109 = fmul double %tmp108, 0x3FE93264C993264C ; <double> [#uses=1]
+ %tmp109.upgrd.17 = fptosi double %tmp109 to i32 ; <i32> [#uses=3]
+ %tmp.upgrd.18 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) ; <%struct.QTextBlockGroup*> [#uses=1]
+ invoke void @_ZNK10QTextFrame11frameFormatEv( %struct.QTextBlockFormat* sret %fmt, %struct.QTextBlockGroup* %tmp.upgrd.18 )
+ to label %invcont111 unwind label %cleanup329
+invcont111: ; preds = %invcont106
+ %tmp112 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1]
+ invoke void @_ZN16QTextFrameFormat9setMarginEd( %struct.QTextBlockFormat* %fmt, double %tmp112 )
+ to label %invcont114 unwind label %cleanup192
+invcont114: ; preds = %invcont111
+ %tmp116 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) ; <%struct.QTextBlockGroup*> [#uses=1]
+ invoke void @_ZN10QTextFrame14setFrameFormatERK16QTextFrameFormat( %struct.QTextBlockGroup* %tmp116, %struct.QTextBlockFormat* %fmt )
+ to label %invcont117 unwind label %cleanup192
+invcont117: ; preds = %invcont114
+ %tmp119 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont118 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1]
+invcont118: ; preds = %invcont117
+ %tmp121 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp119 )
+ to label %invcont120 unwind label %cleanup192 ; <i32> [#uses=1]
+invcont120: ; preds = %invcont118
+ %tmp121.upgrd.19 = sitofp i32 %tmp121 to double ; <double> [#uses=1]
+ %tmp123 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont122 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1]
+invcont122: ; preds = %invcont120
+ %tmp125 = invoke i32 @_ZNK12QPaintDevice5widthEv( %struct.QPaintDevice* %tmp123 )
+ to label %invcont124 unwind label %cleanup192 ; <i32> [#uses=1]
+invcont124: ; preds = %invcont122
+ %tmp125.upgrd.20 = sitofp i32 %tmp125 to double ; <double> [#uses=1]
+ call void @_ZN6QRectFC1Edddd( %struct.QRectF* %tmp.upgrd.1, double 0.000000e+00, double 0.000000e+00, double %tmp125.upgrd.20, double %tmp121.upgrd.19 )
+ %tmp126 = getelementptr %struct.QRectF* %body, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp127 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp128 = load double* %tmp127 ; <double> [#uses=1]
+ store double %tmp128, double* %tmp126
+ %tmp129 = getelementptr %struct.QRectF* %body, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp130 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp131 = load double* %tmp130 ; <double> [#uses=1]
+ store double %tmp131, double* %tmp129
+ %tmp132 = getelementptr %struct.QRectF* %body, i32 0, i32 2 ; <double*> [#uses=1]
+ %tmp133 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 2 ; <double*> [#uses=1]
+ %tmp134 = load double* %tmp133 ; <double> [#uses=1]
+ store double %tmp134, double* %tmp132
+ %tmp135 = getelementptr %struct.QRectF* %body, i32 0, i32 3 ; <double*> [#uses=1]
+ %tmp136 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 3 ; <double*> [#uses=1]
+ %tmp137 = load double* %tmp136 ; <double> [#uses=1]
+ store double %tmp137, double* %tmp135
+ %tmp138 = call double @_ZNK6QRectF6heightEv( %struct.QRectF* %body ) ; <double> [#uses=1]
+ %tmp139 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1]
+ %tmp140 = fsub double %tmp138, %tmp139 ; <double> [#uses=1]
+ %tmp142 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont141 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1]
+invcont141: ; preds = %invcont124
+ invoke void @_ZNK13QTextDocument11defaultFontEv( %struct.QFont* sret %tmp.upgrd.3, %struct.QAbstractTextDocumentLayout* %tmp95 )
+ to label %invcont144 unwind label %cleanup192
+invcont144: ; preds = %invcont141
+ invoke void @_ZN12QFontMetricsC1ERK5QFontP12QPaintDevice( %struct.QFontMetrics* %tmp.upgrd.2, %struct.QFont* %tmp.upgrd.3, %struct.QPaintDevice* %tmp142 )
+ to label %invcont146 unwind label %cleanup173
+invcont146: ; preds = %invcont144
+ %tmp149 = invoke i32 @_ZNK12QFontMetrics6ascentEv( %struct.QFontMetrics* %tmp.upgrd.2 )
+ to label %invcont148 unwind label %cleanup168 ; <i32> [#uses=1]
+invcont148: ; preds = %invcont146
+ %tmp149.upgrd.21 = sitofp i32 %tmp149 to double ; <double> [#uses=1]
+ %tmp150 = fadd double %tmp140, %tmp149.upgrd.21 ; <double> [#uses=1]
+ %tmp152 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont151 unwind label %cleanup168 ; <%struct.QPaintDevice*> [#uses=1]
+invcont151: ; preds = %invcont148
+ %tmp154 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp152 )
+ to label %invcont153 unwind label %cleanup168 ; <i32> [#uses=1]
+invcont153: ; preds = %invcont151
+ %tmp155 = mul i32 %tmp154, 5 ; <i32> [#uses=1]
+ %tmp156 = sdiv i32 %tmp155, 72 ; <i32> [#uses=1]
+ %tmp156.upgrd.22 = sitofp i32 %tmp156 to double ; <double> [#uses=1]
+ %tmp157 = fadd double %tmp150, %tmp156.upgrd.22 ; <double> [#uses=1]
+ %tmp158 = call double @_ZNK6QRectF5widthEv( %struct.QRectF* %body ) ; <double> [#uses=1]
+ %tmp159 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1]
+ %tmp160 = fsub double %tmp158, %tmp159 ; <double> [#uses=1]
+ call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp2, double %tmp160, double %tmp157 )
+ %tmp161 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp162 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp163 = load double* %tmp162 ; <double> [#uses=1]
+ store double %tmp163, double* %tmp161
+ %tmp164 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp165 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp166 = load double* %tmp165 ; <double> [#uses=1]
+ store double %tmp166, double* %tmp164
+ invoke void @_ZN12QFontMetricsD1Ev( %struct.QFontMetrics* %tmp.upgrd.2 )
+ to label %cleanup171 unwind label %cleanup173
+cleanup168: ; preds = %invcont151, %invcont148, %invcont146
+ invoke void @_ZN12QFontMetricsD1Ev( %struct.QFontMetrics* %tmp.upgrd.2 )
+ to label %cleanup173 unwind label %cleanup173
+cleanup171: ; preds = %invcont153
+ invoke void @_ZN5QFontD1Ev( %struct.QFont* %tmp.upgrd.3 )
+ to label %finally170 unwind label %cleanup192
+cleanup173: ; preds = %cleanup168, %cleanup168, %invcont153, %invcont144
+ invoke void @_ZN5QFontD1Ev( %struct.QFont* %tmp.upgrd.3 )
+ to label %cleanup192 unwind label %cleanup192
+finally170: ; preds = %cleanup171
+ invoke void @_ZNK13QTextDocument11defaultFontEv( %struct.QFont* sret %font, %struct.QAbstractTextDocumentLayout* %tmp95 )
+ to label %invcont177 unwind label %cleanup192
+invcont177: ; preds = %finally170
+ invoke void @_ZN5QFont12setPointSizeEi( %struct.QFont* %font, i32 10 )
+ to label %invcont179 unwind label %cleanup187
+invcont179: ; preds = %invcont177
+ invoke void @_ZN13QTextDocument14setDefaultFontERK5QFont( %struct.QAbstractTextDocumentLayout* %tmp95, %struct.QFont* %font )
+ to label %invcont181 unwind label %cleanup187
+invcont181: ; preds = %invcont179
+ call void @_ZNK6QRectF4sizeEv( %struct.QPointF* sret %tmp3, %struct.QRectF* %body )
+ invoke void @_ZN13QTextDocument11setPageSizeERK6QSizeF( %struct.QAbstractTextDocumentLayout* %tmp95, %struct.QPointF* %tmp3 )
+ to label %cleanup185 unwind label %cleanup187
+cleanup185: ; preds = %invcont181
+ invoke void @_ZN5QFontD1Ev( %struct.QFont* %font )
+ to label %cleanup190 unwind label %cleanup192
+cleanup187: ; preds = %invcont181, %invcont179, %invcont177
+ invoke void @_ZN5QFontD1Ev( %struct.QFont* %font )
+ to label %cleanup192 unwind label %cleanup192
+cleanup190: ; preds = %cleanup185
+ invoke void @_ZN16QTextFrameFormatD1Ev( %struct.QTextBlockFormat* %fmt )
+ to label %cond_next194 unwind label %cleanup329
+cleanup192: ; preds = %cleanup187, %cleanup187, %cleanup185, %finally170, %cleanup173, %cleanup173, %cleanup171, %invcont141, %invcont124, %invcont122, %invcont120, %invcont118, %invcont117, %invcont114, %invcont111
+ invoke void @_ZN16QTextFrameFormatD1Ev( %struct.QTextBlockFormat* %fmt )
+ to label %cleanup329 unwind label %cleanup329
+cond_next194: ; preds = %cleanup190, %invcont83
+ %clonedDoc.1 = phi %struct.QAbstractTextDocumentLayout* [ null, %invcont83 ], [ %tmp95, %cleanup190 ] ; <%struct.QAbstractTextDocumentLayout*> [#uses=3]
+ %doc.1 = phi %struct.QAbstractTextDocumentLayout* [ %this, %invcont83 ], [ %tmp95, %cleanup190 ] ; <%struct.QAbstractTextDocumentLayout*> [#uses=2]
+ %tmp197 = invoke i1 @_ZNK8QPrinter13collateCopiesEv( %struct.QPrinter* %printer )
+ to label %invcont196 unwind label %cleanup329 ; <i1> [#uses=1]
+invcont196: ; preds = %cond_next194
+ br i1 %tmp197, label %cond_true200, label %cond_false204
+cond_true200: ; preds = %invcont196
+ %tmp203 = invoke i32 @_ZNK8QPrinter9numCopiesEv( %struct.QPrinter* %printer )
+ to label %invcont202 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont202: ; preds = %cond_true200
+ br label %cond_next208
+cond_false204: ; preds = %invcont196
+ %tmp207 = invoke i32 @_ZNK8QPrinter9numCopiesEv( %struct.QPrinter* %printer )
+ to label %invcont206 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont206: ; preds = %cond_false204
+ br label %cond_next208
+cond_next208: ; preds = %invcont206, %invcont202
+ %pageCopies.0 = phi i32 [ %tmp203, %invcont202 ], [ 1, %invcont206 ] ; <i32> [#uses=2]
+ %docCopies.0 = phi i32 [ 1, %invcont202 ], [ %tmp207, %invcont206 ] ; <i32> [#uses=2]
+ %tmp211 = invoke i32 @_ZNK8QPrinter8fromPageEv( %struct.QPrinter* %printer )
+ to label %invcont210 unwind label %cleanup329 ; <i32> [#uses=3]
+invcont210: ; preds = %cond_next208
+ %tmp214 = invoke i32 @_ZNK8QPrinter6toPageEv( %struct.QPrinter* %printer )
+ to label %invcont213 unwind label %cleanup329 ; <i32> [#uses=3]
+invcont213: ; preds = %invcont210
+ %tmp216 = icmp eq i32 %tmp211, 0 ; <i1> [#uses=1]
+ br i1 %tmp216, label %cond_true217, label %cond_next225
+cond_true217: ; preds = %invcont213
+ %tmp219 = icmp eq i32 %tmp214, 0 ; <i1> [#uses=1]
+ br i1 %tmp219, label %cond_true220, label %cond_next225
+cond_true220: ; preds = %cond_true217
+ %tmp223 = invoke i32 @_ZNK13QTextDocument9pageCountEv( %struct.QAbstractTextDocumentLayout* %doc.1 )
+ to label %invcont222 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont222: ; preds = %cond_true220
+ br label %cond_next225
+cond_next225: ; preds = %invcont222, %cond_true217, %invcont213
+ %toPage.1 = phi i32 [ %tmp223, %invcont222 ], [ %tmp214, %cond_true217 ], [ %tmp214, %invcont213 ] ; <i32> [#uses=2]
+ %fromPage.1 = phi i32 [ 1, %invcont222 ], [ %tmp211, %cond_true217 ], [ %tmp211, %invcont213 ] ; <i32> [#uses=2]
+ %tmp.page = invoke i32 @_ZNK8QPrinter9pageOrderEv( %struct.QPrinter* %printer )
+ to label %invcont227 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont227: ; preds = %cond_next225
+ %tmp228 = icmp eq i32 %tmp.page, 1 ; <i1> [#uses=1]
+ br i1 %tmp228, label %cond_true230, label %cond_next234
+cond_true230: ; preds = %invcont227
+ br label %cond_next234
+cond_next234: ; preds = %cond_true230, %invcont227
+ %ascending.1 = phi i1 [ false, %cond_true230 ], [ true, %invcont227 ] ; <i1> [#uses=1]
+ %toPage.2 = phi i32 [ %fromPage.1, %cond_true230 ], [ %toPage.1, %invcont227 ] ; <i32> [#uses=1]
+ %fromPage.2 = phi i32 [ %toPage.1, %cond_true230 ], [ %fromPage.1, %invcont227 ] ; <i32> [#uses=1]
+ br label %bb309
+bb237: ; preds = %cond_true313, %cond_next293
+ %iftmp.410.4 = phi i1 [ %iftmp.410.5, %cond_true313 ], [ %iftmp.410.1, %cond_next293 ] ; <i1> [#uses=1]
+ %page.4 = phi i32 [ %fromPage.2, %cond_true313 ], [ %page.3, %cond_next293 ] ; <i32> [#uses=4]
+ br label %bb273
+invcont240: ; preds = %cond_true277
+ %tmp242 = icmp eq i32 %tmp241, 2 ; <i1> [#uses=1]
+ br i1 %tmp242, label %bb252, label %cond_next244
+cond_next244: ; preds = %invcont240
+ %tmp247 = invoke i32 @_ZNK8QPrinter12printerStateEv( %struct.QPrinter* %printer )
+ to label %invcont246 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont246: ; preds = %cond_next244
+ %tmp248 = icmp eq i32 %tmp247, 3 ; <i1> [#uses=1]
+ br i1 %tmp248, label %bb252, label %bb253
+bb252: ; preds = %invcont246, %invcont240
+ br label %bb254
+bb253: ; preds = %invcont246
+ br label %bb254
+bb254: ; preds = %bb253, %bb252
+ %iftmp.410.0 = phi i1 [ true, %bb252 ], [ false, %bb253 ] ; <i1> [#uses=2]
+ br i1 %iftmp.410.0, label %UserCanceled, label %cond_next258
+cond_next258: ; preds = %bb254
+ invoke fastcc void @_Z9printPageiP8QPainterPK13QTextDocumentRK6QRectFRK7QPointF( i32 %page.4, %struct.QPainter* %p, %struct.QAbstractTextDocumentLayout* %doc.1, %struct.QRectF* %body, %struct.QPointF* %pageNumberPos )
+ to label %invcont261 unwind label %cleanup329
+invcont261: ; preds = %cond_next258
+ %tmp263 = add i32 %pageCopies.0, -1 ; <i32> [#uses=1]
+ %tmp265 = icmp sgt i32 %tmp263, %j.4 ; <i1> [#uses=1]
+ br i1 %tmp265, label %cond_true266, label %cond_next270
+cond_true266: ; preds = %invcont261
+ %tmp269 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer )
+ to label %cond_next270 unwind label %cleanup329 ; <i1> [#uses=0]
+cond_next270: ; preds = %cond_true266, %invcont261
+ %tmp272 = add i32 %j.4, 1 ; <i32> [#uses=1]
+ br label %bb273
+bb273: ; preds = %cond_next270, %bb237
+ %iftmp.410.1 = phi i1 [ %iftmp.410.4, %bb237 ], [ %iftmp.410.0, %cond_next270 ] ; <i1> [#uses=2]
+ %j.4 = phi i32 [ 0, %bb237 ], [ %tmp272, %cond_next270 ] ; <i32> [#uses=3]
+ %tmp276 = icmp slt i32 %j.4, %pageCopies.0 ; <i1> [#uses=1]
+ br i1 %tmp276, label %cond_true277, label %bb280
+cond_true277: ; preds = %bb273
+ %tmp241 = invoke i32 @_ZNK8QPrinter12printerStateEv( %struct.QPrinter* %printer )
+ to label %invcont240 unwind label %cleanup329 ; <i32> [#uses=1]
+bb280: ; preds = %bb273
+ %tmp283 = icmp eq i32 %page.4, %toPage.2 ; <i1> [#uses=1]
+ br i1 %tmp283, label %bb297, label %cond_next285
+cond_next285: ; preds = %bb280
+ br i1 %ascending.1, label %cond_true287, label %cond_false290
+cond_true287: ; preds = %cond_next285
+ %tmp289 = add i32 %page.4, 1 ; <i32> [#uses=1]
+ br label %cond_next293
+cond_false290: ; preds = %cond_next285
+ %tmp292 = add i32 %page.4, -1 ; <i32> [#uses=1]
+ br label %cond_next293
+cond_next293: ; preds = %cond_false290, %cond_true287
+ %page.3 = phi i32 [ %tmp289, %cond_true287 ], [ %tmp292, %cond_false290 ] ; <i32> [#uses=1]
+ %tmp296 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer )
+ to label %bb237 unwind label %cleanup329 ; <i1> [#uses=0]
+bb297: ; preds = %bb280
+ %tmp299 = add i32 %docCopies.0, -1 ; <i32> [#uses=1]
+ %tmp301 = icmp sgt i32 %tmp299, %i.1 ; <i1> [#uses=1]
+ br i1 %tmp301, label %cond_true302, label %cond_next306
+cond_true302: ; preds = %bb297
+ %tmp305 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer )
+ to label %cond_next306 unwind label %cleanup329 ; <i1> [#uses=0]
+cond_next306: ; preds = %cond_true302, %bb297
+ %tmp308 = add i32 %i.1, 1 ; <i32> [#uses=1]
+ br label %bb309
+bb309: ; preds = %cond_next306, %cond_next234
+ %iftmp.410.5 = phi i1 [ undef, %cond_next234 ], [ %iftmp.410.1, %cond_next306 ] ; <i1> [#uses=1]
+ %i.1 = phi i32 [ 0, %cond_next234 ], [ %tmp308, %cond_next306 ] ; <i32> [#uses=3]
+ %tmp312 = icmp slt i32 %i.1, %docCopies.0 ; <i1> [#uses=1]
+ br i1 %tmp312, label %cond_true313, label %UserCanceled
+cond_true313: ; preds = %bb309
+ br label %bb237
+UserCanceled: ; preds = %bb309, %bb254
+ %tmp318 = icmp eq %struct.QAbstractTextDocumentLayout* %clonedDoc.1, null ; <i1> [#uses=1]
+ br i1 %tmp318, label %cleanup327, label %cond_true319
+cond_true319: ; preds = %UserCanceled
+ %tmp.upgrd.23 = getelementptr %struct.QAbstractTextDocumentLayout* %clonedDoc.1, i32 0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ %tmp.upgrd.24 = load i32 (...)*** %tmp.upgrd.23 ; <i32 (...)**> [#uses=1]
+ %tmp322 = getelementptr i32 (...)** %tmp.upgrd.24, i32 4 ; <i32 (...)**> [#uses=1]
+ %tmp.upgrd.25 = load i32 (...)** %tmp322 ; <i32 (...)*> [#uses=1]
+ %tmp.upgrd.26 = bitcast i32 (...)* %tmp.upgrd.25 to void (%struct.QAbstractTextDocumentLayout*)* ; <void (%struct.QAbstractTextDocumentLayout*)*> [#uses=1]
+ invoke void %tmp.upgrd.26( %struct.QAbstractTextDocumentLayout* %clonedDoc.1 )
+ to label %cleanup327 unwind label %cleanup329
+cleanup327: ; preds = %cond_true319, %UserCanceled
+ call void @_ZN8QPainterD1Ev( %struct.QPainter* %p )
+ ret void
+cleanup328: ; preds = %invcont
+ call void @_ZN8QPainterD1Ev( %struct.QPainter* %p )
+ ret void
+cleanup329: ; preds = %cond_true319, %cond_true302, %cond_next293, %cond_true277, %cond_true266, %cond_next258, %cond_next244, %cond_next225, %cond_true220, %invcont210, %cond_next208, %cond_false204, %cond_true200, %cond_next194, %cleanup192, %cleanup192, %cleanup190, %invcont106, %invcont104, %invcont103, %invcont100, %invcont98, %invcont94, %cond_false, %invcont83, %invcont79, %invcont57, %invcont51, %invcont45, %cond_next42, %invcont37, %cond_true35, %invcont29, %invcont25, %cond_true24, %cond_next, %entry
+ call void @_ZN8QPainterD1Ev( %struct.QPainter* %p )
+ unwind
+}
+
+declare void @_ZN6QSizeFC1Edd(%struct.QPointF*, double, double)
+
+declare i1 @_ZNK6QSizeF7isValidEv(%struct.QPointF*)
+
+declare double @_ZNK6QSizeF5widthEv(%struct.QPointF*)
+
+declare double @_ZNK6QSizeF6heightEv(%struct.QPointF*)
+
+declare double* @_ZN6QSizeF6rwidthEv(%struct.QPointF*)
+
+declare double* @_ZN6QSizeF7rheightEv(%struct.QPointF*)
+
+declare %struct.QTextDocumentPrivate* @_ZNK13QTextDocument6d_funcEv(%struct.QAbstractTextDocumentLayout*)
+
+declare void @_ZN7QPointFC1Ev(%struct.QPointF*)
+
+declare void @_ZN7QPointFC1Edd(%struct.QPointF*, double, double)
+
+declare void @_ZN16QTextFrameFormat9setMarginEd(%struct.QTextBlockFormat*, double)
+
+declare void @_ZN6QRectFC1Edddd(%struct.QRectF*, double, double, double, double)
+
+declare void @_ZN6QRectFC1ERK7QPointFRK6QSizeF(%struct.QRectF*, %struct.QPointF*, %struct.QPointF*)
+
+declare double @_ZNK6QRectF5widthEv(%struct.QRectF*)
+
+declare double @_ZNK6QRectF6heightEv(%struct.QRectF*)
+
+declare void @_ZNK6QRectF4sizeEv(%struct.QPointF*, %struct.QRectF*)
+
+declare void @_ZN16QTextFrameFormatD1Ev(%struct.QTextBlockFormat*)
+
+declare void @_ZNK10QTextFrame11frameFormatEv(%struct.QTextBlockFormat*, %struct.QTextBlockGroup*)
+
+declare void @_ZN10QTextFrame14setFrameFormatERK16QTextFrameFormat(%struct.QTextBlockGroup*, %struct.QTextBlockFormat*)
+
+declare i32 @_ZNK12QPaintDevice5widthEv(%struct.QPaintDevice*)
+
+declare i32 @_ZNK12QPaintDevice6heightEv(%struct.QPaintDevice*)
+
+declare i32 @_ZNK12QPaintDevice11logicalDpiXEv(%struct.QPaintDevice*)
+
+declare i32 @_ZNK12QPaintDevice11logicalDpiYEv(%struct.QPaintDevice*)
+
+declare %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument5cloneEP7QObject(%struct.QAbstractTextDocumentLayout*, %struct.QObject*)
+
+declare void @_ZN5QFontD1Ev(%struct.QFont*)
+
+declare %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv(%struct.QAbstractTextDocumentLayout*)
+
+declare %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv(%struct.QAbstractTextDocumentLayout*)
+
+declare i32 @_ZNK13QTextDocument9pageCountEv(%struct.QAbstractTextDocumentLayout*)
+
+declare void @_ZNK13QTextDocument11defaultFontEv(%struct.QFont*, %struct.QAbstractTextDocumentLayout*)
+
+declare void @_ZN13QTextDocument14setDefaultFontERK5QFont(%struct.QAbstractTextDocumentLayout*, %struct.QFont*)
+
+declare void @_ZN13QTextDocument11setPageSizeERK6QSizeF(%struct.QAbstractTextDocumentLayout*, %struct.QPointF*)
+
+declare void @_Z9printPageiP8QPainterPK13QTextDocumentRK6QRectFRK7QPointF(i32, %struct.QPainter*, %struct.QAbstractTextDocumentLayout*, %struct.QRectF*, %struct.QPointF*)
+
+declare void @_ZN12QFontMetricsD1Ev(%struct.QFontMetrics*)
+
+declare void @_ZN8QPainterC1EP12QPaintDevice(%struct.QPainter*, %struct.QPaintDevice*)
+
+declare i1 @_ZNK8QPainter8isActiveEv(%struct.QPainter*)
+
+declare i32 @_Z13qt_defaultDpiv()
+
+declare %struct.QPaintDevice* @_ZNK27QAbstractTextDocumentLayout11paintDeviceEv(%struct.QAbstractTextDocumentLayout*)
+
+declare void @_ZN8QPainter5scaleEdd(%struct.QPainter*, double, double)
+
+declare %struct.QPaintDevice* @_ZNK8QPainter6deviceEv(%struct.QPainter*)
+
+declare void @_ZN27QAbstractTextDocumentLayout14setPaintDeviceEP12QPaintDevice(%struct.QAbstractTextDocumentLayout*, %struct.QPaintDevice*)
+
+declare void @_ZN12QFontMetricsC1ERK5QFontP12QPaintDevice(%struct.QFontMetrics*, %struct.QFont*, %struct.QPaintDevice*)
+
+declare i32 @_ZNK12QFontMetrics6ascentEv(%struct.QFontMetrics*)
+
+declare void @_ZN5QFont12setPointSizeEi(%struct.QFont*, i32)
+
+declare i1 @_ZNK8QPrinter13collateCopiesEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter9numCopiesEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter8fromPageEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter6toPageEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter9pageOrderEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter12printerStateEv(%struct.QPrinter*)
+
+declare i1 @_ZN8QPrinter7newPageEv(%struct.QPrinter*)
+
+declare void @_ZN8QPainterD1Ev(%struct.QPainter*)
diff --git a/test/Transforms/SimplifyCFG/2006-12-08-Ptr-ICmp-Branch.ll b/test/Transforms/SimplifyCFG/2006-12-08-Ptr-ICmp-Branch.ll
new file mode 100644
index 0000000..af865ce
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2006-12-08-Ptr-ICmp-Branch.ll
@@ -0,0 +1,131 @@
+; RUN: opt < %s -simplifycfg | llvm-dis
+; END.
+
+; ModuleID = '2006-12-08-Ptr-ICmp-Branch.ll'
+target datalayout = "e-p:32:32"
+target triple = "i686-pc-linux-gnu"
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+ %struct.charsequence = type { i8*, i32, i32 }
+ %struct.trie_s = type { [26 x %struct.trie_s*], i32 }
+@str = external global [14 x i8] ; <[14 x i8]*> [#uses=0]
[email protected] = external global [32 x i8] ; <[32 x i8]*> [#uses=0]
[email protected] = external global [12 x i8] ; <[12 x i8]*> [#uses=0]
[email protected] = external global %struct.charsequence ; <%struct.charsequence*> [#uses=3]
+@t = external global %struct.trie_s* ; <%struct.trie_s**> [#uses=0]
[email protected] = external global [3 x i8] ; <[3 x i8]*> [#uses=0]
[email protected] = external global [26 x i8] ; <[26 x i8]*> [#uses=0]
+
+declare void @charsequence_reset(%struct.charsequence*)
+
+declare void @free(i8*)
+
+declare void @charsequence_push(%struct.charsequence*, i8)
+
+declare i8* @charsequence_val(%struct.charsequence*)
+
+declare i32 @_IO_getc(%struct.FILE*)
+
+declare i32 @tolower(i32)
+
+declare %struct.trie_s* @trie_insert(%struct.trie_s*, i8*)
+
+declare i32 @feof(%struct.FILE*)
+
+define void @addfile(%struct.trie_s* %t, %struct.FILE* %f) {
+entry:
+ %t_addr = alloca %struct.trie_s* ; <%struct.trie_s**> [#uses=2]
+ %f_addr = alloca %struct.FILE* ; <%struct.FILE**> [#uses=3]
+ %c = alloca i8, align 1 ; <i8*> [#uses=7]
+ %wstate = alloca i32, align 4 ; <i32*> [#uses=4]
+ %cs = alloca %struct.charsequence, align 16 ; <%struct.charsequence*> [#uses=7]
+ %str = alloca i8*, align 4 ; <i8**> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store %struct.trie_s* %t, %struct.trie_s** %t_addr
+ store %struct.FILE* %f, %struct.FILE** %f_addr
+ store i32 0, i32* %wstate
+ %tmp = getelementptr %struct.charsequence* %cs, i64 0, i32 0 ; <i8**> [#uses=1]
+ %tmp1 = getelementptr %struct.charsequence* @C.0.2294, i64 0, i32 0 ; <i8**> [#uses=1]
+ %tmp.upgrd.5 = load i8** %tmp1 ; <i8*> [#uses=1]
+ store i8* %tmp.upgrd.5, i8** %tmp
+ %tmp.upgrd.6 = getelementptr %struct.charsequence* %cs, i64 0, i32 1 ; <i32*> [#uses=1]
+ %tmp2 = getelementptr %struct.charsequence* @C.0.2294, i64 0, i32 1 ; <i32*> [#uses=1]
+ %tmp.upgrd.7 = load i32* %tmp2 ; <i32> [#uses=1]
+ store i32 %tmp.upgrd.7, i32* %tmp.upgrd.6
+ %tmp3 = getelementptr %struct.charsequence* %cs, i64 0, i32 2 ; <i32*> [#uses=1]
+ %tmp4 = getelementptr %struct.charsequence* @C.0.2294, i64 0, i32 2 ; <i32*> [#uses=1]
+ %tmp5 = load i32* %tmp4 ; <i32> [#uses=1]
+ store i32 %tmp5, i32* %tmp3
+ br label %bb33
+bb: ; preds = %bb33
+ %tmp.upgrd.8 = load %struct.FILE** %f_addr ; <%struct.FILE*> [#uses=1]
+ %tmp.upgrd.9 = call i32 @_IO_getc( %struct.FILE* %tmp.upgrd.8 ) ; <i32> [#uses=1]
+ %tmp6 = call i32 @tolower( i32 %tmp.upgrd.9 ) ; <i32> [#uses=1]
+ %tmp6.upgrd.10 = trunc i32 %tmp6 to i8 ; <i8> [#uses=1]
+ store i8 %tmp6.upgrd.10, i8* %c
+ %tmp7 = load i32* %wstate ; <i32> [#uses=1]
+ %tmp.upgrd.11 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
+ br i1 %tmp.upgrd.11, label %cond_true, label %cond_false
+cond_true: ; preds = %bb
+ %tmp.upgrd.12 = load i8* %c ; <i8> [#uses=1]
+ %tmp8 = icmp sle i8 %tmp.upgrd.12, 96 ; <i1> [#uses=1]
+ br i1 %tmp8, label %cond_true9, label %cond_next
+cond_true9: ; preds = %cond_true
+ br label %bb16
+cond_next: ; preds = %cond_true
+ %tmp10 = load i8* %c ; <i8> [#uses=1]
+ %tmp11 = icmp sgt i8 %tmp10, 122 ; <i1> [#uses=1]
+ br i1 %tmp11, label %cond_true12, label %cond_next13
+cond_true12: ; preds = %cond_next
+ br label %bb16
+cond_next13: ; preds = %cond_next
+ %tmp14 = load i8* %c ; <i8> [#uses=1]
+ %tmp14.upgrd.13 = sext i8 %tmp14 to i32 ; <i32> [#uses=1]
+ %tmp1415 = trunc i32 %tmp14.upgrd.13 to i8 ; <i8> [#uses=1]
+ call void @charsequence_push( %struct.charsequence* %cs, i8 %tmp1415 )
+ br label %bb21
+bb16: ; preds = %cond_true12, %cond_true9
+ %tmp17 = call i8* @charsequence_val( %struct.charsequence* %cs ) ; <i8*> [#uses=1]
+ store i8* %tmp17, i8** %str
+ %tmp.upgrd.14 = load %struct.trie_s** %t_addr ; <%struct.trie_s*> [#uses=1]
+ %tmp18 = load i8** %str ; <i8*> [#uses=1]
+ %tmp19 = call %struct.trie_s* @trie_insert( %struct.trie_s* %tmp.upgrd.14, i8* %tmp18 ) ; <%struct.trie_s*> [#uses=0]
+ %tmp20 = load i8** %str ; <i8*> [#uses=1]
+ call void @free( i8* %tmp20 )
+ store i32 0, i32* %wstate
+ br label %bb21
+bb21: ; preds = %bb16, %cond_next13
+ br label %cond_next32
+cond_false: ; preds = %bb
+ %tmp22 = load i8* %c ; <i8> [#uses=1]
+ %tmp23 = icmp sgt i8 %tmp22, 96 ; <i1> [#uses=1]
+ br i1 %tmp23, label %cond_true24, label %cond_next31
+cond_true24: ; preds = %cond_false
+ %tmp25 = load i8* %c ; <i8> [#uses=1]
+ %tmp26 = icmp sle i8 %tmp25, 122 ; <i1> [#uses=1]
+ br i1 %tmp26, label %cond_true27, label %cond_next30
+cond_true27: ; preds = %cond_true24
+ call void @charsequence_reset( %struct.charsequence* %cs )
+ %tmp28 = load i8* %c ; <i8> [#uses=1]
+ %tmp28.upgrd.15 = sext i8 %tmp28 to i32 ; <i32> [#uses=1]
+ %tmp2829 = trunc i32 %tmp28.upgrd.15 to i8 ; <i8> [#uses=1]
+ call void @charsequence_push( %struct.charsequence* %cs, i8 %tmp2829 )
+ store i32 1, i32* %wstate
+ br label %cond_next30
+cond_next30: ; preds = %cond_true27, %cond_true24
+ br label %cond_next31
+cond_next31: ; preds = %cond_next30, %cond_false
+ br label %cond_next32
+cond_next32: ; preds = %cond_next31, %bb21
+ br label %bb33
+bb33: ; preds = %cond_next32, %entry
+ %tmp34 = load %struct.FILE** %f_addr ; <%struct.FILE*> [#uses=1]
+ %tmp35 = call i32 @feof( %struct.FILE* %tmp34 ) ; <i32> [#uses=1]
+ %tmp36 = icmp eq i32 %tmp35, 0 ; <i1> [#uses=1]
+ br i1 %tmp36, label %bb, label %bb37
+bb37: ; preds = %bb33
+ br label %return
+return: ; preds = %bb37
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/2007-11-22-InvokeNoUnwind.ll b/test/Transforms/SimplifyCFG/2007-11-22-InvokeNoUnwind.ll
new file mode 100644
index 0000000..a20c46e
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2007-11-22-InvokeNoUnwind.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -simplifycfg -S | not grep invoke
+
+declare i32 @func(i8*) nounwind
+
+define i32 @test() {
+ invoke i32 @func( i8* null )
+ to label %Cont unwind label %Other ; <i32>:1 [#uses=0]
+
+Cont: ; preds = %0
+ ret i32 0
+
+Other: ; preds = %0
+ ret i32 1
+}
diff --git a/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll b/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll
new file mode 100644
index 0000000..46df0f0
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll
@@ -0,0 +1,37 @@
+;RUN: opt < %s -simplifycfg -disable-output
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+define i32 @bork() nounwind {
+entry:
+ br label %bb5.outer
+
+bb5.outer.loopexit: ; preds = %bb5
+ br label %bb5.outer
+
+bb5.outer: ; preds = %bb5.outer.loopexit, %entry
+ %undo.0.ph = phi i32 [ 0, %entry ], [ 1, %bb5.outer.loopexit ] ; <i32> [#uses=1]
+ br label %bb5
+
+bb5: ; preds = %bb5, %bb5.outer
+ %tmp6 = tail call i32 (...)* @foo( ) nounwind ; <i32> [#uses=1]
+ switch i32 %tmp6, label %bb13 [
+ i32 -1, label %bb10
+ i32 102, label %bb5
+ i32 110, label %bb5.outer.loopexit
+ ]
+
+bb10: ; preds = %bb5
+ %tmp12 = tail call i32 (...)* @bar( i32 %undo.0.ph ) nounwind ; <i32> [#uses=0]
+ br label %UnifiedReturnBlock
+
+bb13: ; preds = %bb5
+ br label %UnifiedReturnBlock
+
+UnifiedReturnBlock: ; preds = %bb13, %bb10
+ %UnifiedRetVal = phi i32 [ 1, %bb10 ], [ 258, %bb13 ] ; <i32> [#uses=1]
+ ret i32 %UnifiedRetVal
+}
+
+declare i32 @foo(...)
+
+declare i32 @bar(...)
diff --git a/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll b/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll
new file mode 100644
index 0000000..00f2d5b
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll
@@ -0,0 +1,26 @@
+; The phi should not be eliminated in this case, because the fp op could trap.
+; RUN: opt < %s -simplifycfg -S | grep {= phi double}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+@G = weak global double 0.000000e+00, align 8 ; <double*> [#uses=2]
+
+define void @test(i32 %X, i32 %Y, double %Z) {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = load double* @G, align 8 ; <double> [#uses=2]
+ %tmp3 = icmp eq i32 %X, %Y ; <i1> [#uses=1]
+ %tmp34 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_next
+
+cond_true: ; preds = %entry
+ %tmp7 = fadd double %tmp, %Z ; <double> [#uses=1]
+ br label %cond_next
+
+cond_next: ; preds = %cond_true, %entry
+ %F.0 = phi double [ %tmp, %entry ], [ %tmp7, %cond_true ] ; <double> [#uses=1]
+ store double %F.0, double* @G, align 8
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/2008-04-23-MergeMultipleResultRet.ll b/test/Transforms/SimplifyCFG/2008-04-23-MergeMultipleResultRet.ll
new file mode 100644
index 0000000..8e05a3c
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-04-23-MergeMultipleResultRet.ll
@@ -0,0 +1,43 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; rdar://5882392
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9"
+ %struct.Py_complex = type { double, double }
+
+define %struct.Py_complex @_Py_c_pow(double %a.0, double %a.1, double %b.0, double %b.1) nounwind {
+entry:
+ %tmp7 = fcmp une double %b.0, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp11 = fcmp une double %b.1, 0.000000e+00 ; <i1> [#uses=1]
+ %bothcond = or i1 %tmp7, %tmp11 ; <i1> [#uses=1]
+ br i1 %bothcond, label %bb15, label %bb53
+
+bb15: ; preds = %entry
+ %tmp18 = fcmp une double %a.0, 0.000000e+00 ; <i1> [#uses=1]
+ %tmp24 = fcmp une double %a.1, 0.000000e+00 ; <i1> [#uses=1]
+ %bothcond1 = or i1 %tmp18, %tmp24 ; <i1> [#uses=1]
+ br i1 %bothcond1, label %bb29, label %bb27
+
+bb27: ; preds = %bb15
+ %tmp28 = call i32* @__error( ) nounwind ; <i32*> [#uses=1]
+ store i32 33, i32* %tmp28, align 4
+ ret double undef, double undef
+
+bb29: ; preds = %bb15
+ %tmp36 = fcmp une double %b.1, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %tmp36, label %bb39, label %bb47
+
+bb39: ; preds = %bb29
+ br label %bb47
+
+bb47: ; preds = %bb39, %bb29
+ ret double undef, double undef
+
+bb53: ; preds = %entry
+ ret double undef, double undef
+}
+
+declare i32* @__error()
+
+declare double @pow(double, double) nounwind readonly
+
+declare double @cos(double) nounwind readonly
diff --git a/test/Transforms/SimplifyCFG/2008-04-27-MultipleReturnCrash.ll b/test/Transforms/SimplifyCFG/2008-04-27-MultipleReturnCrash.ll
new file mode 100644
index 0000000..ba33d84
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-04-27-MultipleReturnCrash.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; PR2256
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-mingw32"
+
+define { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval %Z, i1 %cond) nounwind {
+bb: ; preds = %entry
+ br i1 %cond, label %bb48, label %bb40
+
+bb40: ; preds = %bb
+ store i32 34, i32* null, align 4
+ br label %bb196
+
+bb48: ; preds = %bb.bb48_crit_edge, %entry.bb48_crit_edge
+ %tmp53 = icmp eq i32 0, 1280 ; <i1> [#uses=1]
+ br i1 %tmp53, label %bb56, label %bb174
+
+bb56: ; preds = %bb48
+ %iftmp.0.0 = select i1 false, x86_fp80 0xK3FFFC90FDAA22168C235, x86_fp80 0xKBFFFC90FDAA22168C235 ; <x86_fp80> [#uses=0]
+ br label %bb196
+
+
+bb174: ; preds = %bb144, %bb114
+ %tmp191 = fmul x86_fp80 0xK00000000000000000000, 0xK3FFE8000000000000000 ; <x86_fp80> [#uses=1]
+ br label %bb196
+
+bb196: ; preds = %bb174, %bb56, %bb40
+ %Res.1.0 = phi x86_fp80 [ 0xK7FFF8000000000000000, %bb40 ], [ %tmp191, %bb174 ], [ 0xK00000000000000000000, %bb56 ] ; <x86_fp80> [#uses=1]
+ ret x86_fp80 0xK00000000000000000000, x86_fp80 %Res.1.0
+}
diff --git a/test/Transforms/SimplifyCFG/2008-05-16-PHIBlockMerge.ll b/test/Transforms/SimplifyCFG/2008-05-16-PHIBlockMerge.ll
new file mode 100644
index 0000000..59e886b
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-05-16-PHIBlockMerge.ll
@@ -0,0 +1,131 @@
+; RUN: opt < %s -simplifycfg -S > %t
+; RUN: not grep {^BB.tomerge} %t
+; RUN grep {^BB.nomerge} %t | count 2
+
+; ModuleID = '<stdin>'
+declare i1 @foo()
+
+declare i1 @bar(i32)
+
+; This function can't be merged
+define void @a() {
+entry:
+ br label %BB.nomerge
+
+BB.nomerge: ; preds = %Common, %entry
+ ; This phi has a conflicting value (0) with below phi (2), so blocks
+ ; can't be merged.
+ %a = phi i32 [ 1, %entry ], [ 0, %Common ] ; <i32> [#uses=1]
+ br label %Succ
+
+Succ: ; preds = %Common, %BB.nomerge
+ %b = phi i32 [ %a, %BB.nomerge ], [ 2, %Common ] ; <i32> [#uses=0]
+ %conde = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %conde, label %Common, label %Exit
+
+Common: ; preds = %Succ
+ %cond = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %cond, label %BB.nomerge, label %Succ
+
+Exit: ; preds = %Succ
+ ret void
+}
+
+; This function can't be merged
+define void @b() {
+entry:
+ br label %BB.nomerge
+
+BB.nomerge: ; preds = %Common, %entry
+ br label %Succ
+
+Succ: ; preds = %Common, %BB.nomerge
+ ; This phi has confliction values for Common and (through BB) Common,
+ ; blocks can't be merged
+ %b = phi i32 [ 1, %BB.nomerge ], [ 2, %Common ] ; <i32> [#uses=0]
+ %conde = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %conde, label %Common, label %Exit
+
+Common: ; preds = %Succ
+ %cond = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %cond, label %BB.nomerge, label %Succ
+
+Exit: ; preds = %Succ
+ ret void
+}
+
+; This function can be merged
+define void @c() {
+entry:
+ br label %BB.tomerge
+
+BB.tomerge: ; preds = %Common, %entry
+ br label %Succ
+
+Succ: ; preds = %Common, %BB.tomerge, %Pre-Exit
+ ; This phi has identical values for Common and (through BB) Common,
+ ; blocks can't be merged
+ %b = phi i32 [ 1, %BB.tomerge ], [ 1, %Common ], [ 2, %Pre-Exit ]
+ %conde = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %conde, label %Common, label %Pre-Exit
+
+Common: ; preds = %Succ
+ %cond = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %cond, label %BB.tomerge, label %Succ
+
+Pre-Exit: ; preds = %Succ
+ ; This adds a backedge, so the %b phi node gets a third branch and is
+ ; not completely trivial
+ %cond2 = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %cond2, label %Succ, label %Exit
+
+Exit: ; preds = %Pre-Exit
+ ret void
+}
+
+; This function can be merged
+define void @d() {
+entry:
+ br label %BB.tomerge
+
+BB.tomerge: ; preds = %Common, %entry
+ ; This phi has a matching value (0) with below phi (0), so blocks
+ ; can be merged.
+ %a = phi i32 [ 1, %entry ], [ 0, %Common ] ; <i32> [#uses=1]
+ br label %Succ
+
+Succ: ; preds = %Common, %BB.tomerge
+ %b = phi i32 [ %a, %BB.tomerge ], [ 0, %Common ] ; <i32> [#uses=0]
+ %conde = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %conde, label %Common, label %Exit
+
+Common: ; preds = %Succ
+ %cond = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %cond, label %BB.tomerge, label %Succ
+
+Exit: ; preds = %Succ
+ ret void
+}
+
+; This function can be merged
+define void @e() {
+entry:
+ br label %BB.tomerge
+
+BB.tomerge: ; preds = %Use, %entry
+ ; This phi is used somewhere else than Succ, but this should not prevent
+ ; merging this block
+ %a = phi i32 [ 1, %entry ], [ 0, %Use ] ; <i32> [#uses=1]
+ br label %Succ
+
+Succ: ; preds = %BB.tomerge
+ %conde = call i1 @foo( ) ; <i1> [#uses=1]
+ br i1 %conde, label %Use, label %Exit
+
+Use: ; preds = %Succ
+ %cond = call i1 @bar( i32 %a ) ; <i1> [#uses=1]
+ br i1 %cond, label %BB.tomerge, label %Exit
+
+Exit: ; preds = %Use, %Succ
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll b/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
new file mode 100644
index 0000000..d025dee
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -simplifycfg -S | grep {%outval = phi i32 .*mux}
+; PR2540
+; Outval should end up with a select from 0/2, not all constants.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+@g_37 = common global i32 0 ; <i32*> [#uses=1]
[email protected] = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+ %l = load i32* @g_37, align 4 ; <i32> [#uses=1]
+ %cmpa = icmp ne i32 %l, 0 ; <i1> [#uses=3]
+ br i1 %cmpa, label %func_1.exit, label %mooseblock
+
+mooseblock: ; preds = %entry
+ %cmpb = icmp eq i1 %cmpa, false ; <i1> [#uses=2]
+ br i1 %cmpb, label %monkeyblock, label %beeblock
+
+monkeyblock: ; preds = %monkeyblock, %mooseblock
+ br i1 %cmpb, label %cowblock, label %monkeyblock
+
+beeblock: ; preds = %beeblock, %mooseblock
+ br i1 %cmpa, label %cowblock, label %beeblock
+
+cowblock: ; preds = %beeblock, %monkeyblock
+ %cowval = phi i32 [ 2, %beeblock ], [ 0, %monkeyblock ] ; <i32> [#uses=1]
+ br label %func_1.exit
+
+func_1.exit: ; preds = %cowblock, %entry
+ %outval = phi i32 [ %cowval, %cowblock ], [ 1, %entry ] ; <i32> [#uses=1]
+ %pout = tail call i32 (i8*, ...)* @printf( i8* noalias getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %outval ) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/Transforms/SimplifyCFG/2008-09-08-MultiplePred.ll b/test/Transforms/SimplifyCFG/2008-09-08-MultiplePred.ll
new file mode 100644
index 0000000..ac9622d
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-09-08-MultiplePred.ll
@@ -0,0 +1,60 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; PR 2777
+@g_103 = common global i32 0 ; <i32*> [#uses=1]
+
+define i32 @func_127(i32 %p_129) nounwind {
+entry:
+ load i32* @g_103, align 4 ; <i32>:0 [#uses=1]
+ icmp eq i32 %0, 0 ; <i1>:1 [#uses=2]
+ br i1 %1, label %bb6.preheader, label %entry.return_crit_edge
+
+entry.return_crit_edge: ; preds = %entry
+ br label %return
+
+bb6.preheader: ; preds = %entry
+ br i1 %1, label %bb6.preheader.split.us, label %bb6.preheader.split
+
+bb6.preheader.split.us: ; preds = %bb6.preheader
+ br label %return.loopexit.split
+
+bb6.preheader.split: ; preds = %bb6.preheader
+ br label %bb6
+
+bb6: ; preds = %bb17.bb6_crit_edge, %bb6.preheader.split
+ %indvar35 = phi i32 [ 0, %bb6.preheader.split ], [ %indvar.next36, %bb17.bb6_crit_edge ] ; <i32> [#uses=1]
+ %p_129_addr.3.reg2mem.0 = phi i32 [ %p_129_addr.2, %bb17.bb6_crit_edge ], [ %p_129, %bb6.preheader.split ] ; <i32> [#uses=3]
+ icmp eq i32 %p_129_addr.3.reg2mem.0, 0 ; <i1>:2 [#uses=1]
+ br i1 %2, label %bb6.bb17_crit_edge, label %bb8
+
+bb6.bb17_crit_edge: ; preds = %bb6
+ br label %bb17
+
+bb8: ; preds = %bb6
+ br label %bb13
+
+bb13: ; preds = %bb8
+ br label %bb17
+
+bb17: ; preds = %bb13, %bb6.bb17_crit_edge
+ %p_129_addr.2 = phi i32 [ %p_129_addr.3.reg2mem.0, %bb13 ], [ %p_129_addr.3.reg2mem.0, %bb6.bb17_crit_edge ] ; <i32> [#uses=1]
+ %indvar.next36 = add i32 %indvar35, 1 ; <i32> [#uses=2]
+ %exitcond37 = icmp eq i32 %indvar.next36, -1 ; <i1> [#uses=1]
+ br i1 %exitcond37, label %return.loopexit, label %bb17.bb6_crit_edge
+
+bb17.bb6_crit_edge: ; preds = %bb17
+ br label %bb6
+
+return.loopexit: ; preds = %bb17
+ br label %return.loopexit.split
+
+return.loopexit.split: ; preds = %return.loopexit, %bb6.preheader.split.us
+ br label %return
+
+return: ; preds = %return.loopexit.split, %entry.return_crit_edge
+ ret i32 1
+}
+
+define i32 @func_135(i8 zeroext %p_137, i32 %p_138, i32 %p_140) nounwind {
+entry:
+ ret i32 undef
+}
diff --git a/test/Transforms/SimplifyCFG/2008-09-17-SpeculativeHoist.ll b/test/Transforms/SimplifyCFG/2008-09-17-SpeculativeHoist.ll
new file mode 100644
index 0000000..f864184
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-09-17-SpeculativeHoist.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; PR 2800
+
+define void @foo() {
+start:
+ %tmp = call i1 @bar( ) ; <i1> [#uses=4]
+ br i1 %tmp, label %brtrue, label %brfalse
+
+brtrue: ; preds = %start
+ %tmpnew = and i1 %tmp, %tmp ; <i1> [#uses=1]
+ br label %brfalse
+
+brfalse: ; preds = %brtrue, %start
+ %andandtmp.0 = phi i1 [ %tmp, %start ], [ %tmpnew, %brtrue ] ; <i1> [#uses=0]
+ ret void
+}
+
+declare i1 @bar()
diff --git a/test/Transforms/SimplifyCFG/2008-10-03-SpeculativelyExecuteBeforePHI.ll b/test/Transforms/SimplifyCFG/2008-10-03-SpeculativelyExecuteBeforePHI.ll
new file mode 100644
index 0000000..bb137c1
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-10-03-SpeculativelyExecuteBeforePHI.ll
@@ -0,0 +1,36 @@
+; RUN: opt < %s -simplifycfg
+; PR2855
+
+define i32 @_Z1fPii(i32* %b, i32 %f) nounwind {
+entry:
+ br label %bb
+
+bb: ; preds = %bb9, %bb7, %bb, %entry
+ %__c2.2 = phi i32 [ undef, %entry ], [ %__c2.1, %bb7 ], [ %__c2.1, %bb9 ] ; <i32> [#uses=2]
+ %s.0 = phi i32 [ 0, %entry ], [ 0, %bb7 ], [ %2, %bb9 ] ; <i32> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb
+ %0 = icmp slt i32 0, %f ; <i1> [#uses=1]
+ br i1 %0, label %bb3, label %bb6
+
+bb3: ; preds = %bb1
+ %1 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+ br i1 %1, label %bb6, label %bb5
+
+bb5: ; preds = %bb3
+ br label %bb7
+
+bb6: ; preds = %bb3, %bb1
+ %__c2.0 = phi i32 [ 0, %bb3 ], [ %__c2.2, %bb1 ] ; <i32> [#uses=1]
+ br label %bb7
+
+bb7: ; preds = %bb6, %bb5
+ %__c2.1 = phi i32 [ 0, %bb5 ], [ %__c2.0, %bb6 ] ; <i32> [#uses=2]
+ %iftmp.1.0 = phi i1 [ false, %bb5 ], [ true, %bb6 ] ; <i1> [#uses=1]
+ br i1 %iftmp.1.0, label %bb, label %bb9
+
+bb9: ; preds = %bb7
+ %2 = add i32 %s.0, 2 ; <i32> [#uses=1]
+ br label %bb
+}
diff --git a/test/Transforms/SimplifyCFG/2008-12-06-SingleEntryPhi.ll b/test/Transforms/SimplifyCFG/2008-12-06-SingleEntryPhi.ll
new file mode 100644
index 0000000..d3c7c32
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-12-06-SingleEntryPhi.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -simplifycfg | llvm-dis
+define i32 @test() {
+entry:
+ br label %T
+T:
+ %C = phi i1 [false, %entry]
+ br i1 %C, label %X, label %Y
+X:
+ ret i32 2
+Y:
+ add i32 1, 2
+ ret i32 1
+}
diff --git a/test/Transforms/SimplifyCFG/2008-12-16-DCECond.ll b/test/Transforms/SimplifyCFG/2008-12-16-DCECond.ll
new file mode 100644
index 0000000..7271024
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2008-12-16-DCECond.ll
@@ -0,0 +1,46 @@
+; RUN: opt < %s -simplifycfg -S | not grep icmp
+; ModuleID = '/tmp/x.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-pc-linux-gnu"
+
+define i32 @x(i32 %x) {
+entry:
+ %cmp = icmp eq i32 %x, 8 ; <i1> [#uses=1]
+ br i1 %cmp, label %ifthen, label %ifend
+
+ifthen: ; preds = %entry
+ %call = call i32 (...)* @foo() ; <i32> [#uses=0]
+ br label %ifend
+
+ifend: ; preds = %ifthen, %entry
+ %cmp2 = icmp ne i32 %x, 8 ; <i1> [#uses=1]
+ br i1 %cmp2, label %ifthen3, label %ifend5
+
+ifthen3: ; preds = %ifend
+ %call4 = call i32 (...)* @foo() ; <i32> [#uses=0]
+ br label %ifend5
+
+ifend5: ; preds = %ifthen3, %ifend
+ %cmp7 = icmp eq i32 %x, 9 ; <i1> [#uses=1]
+ br i1 %cmp7, label %ifthen8, label %ifend10
+
+ifthen8: ; preds = %ifend5
+ %call9 = call i32 (...)* @bar() ; <i32> [#uses=0]
+ br label %ifend10
+
+ifend10: ; preds = %ifthen8, %ifend5
+ %cmp12 = icmp ne i32 %x, 9 ; <i1> [#uses=1]
+ br i1 %cmp12, label %ifthen13, label %ifend15
+
+ifthen13: ; preds = %ifend10
+ %call14 = call i32 (...)* @bar() ; <i32> [#uses=0]
+ br label %ifend15
+
+ifend15: ; preds = %ifthen13, %ifend10
+ ret i32 0
+}
+
+declare i32 @foo(...)
+
+declare i32 @bar(...)
+
diff --git a/test/Transforms/SimplifyCFG/2009-01-18-PHIPropCrash.ll b/test/Transforms/SimplifyCFG/2009-01-18-PHIPropCrash.ll
new file mode 100644
index 0000000..c6ae6ac
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2009-01-18-PHIPropCrash.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; PR3016
+; Dead use caused invariant violation.
+
+define i32 @func_105(i1 %tmp5, i1 %tmp7) nounwind {
+BB:
+ br i1 true, label %BB2, label %BB1
+
+BB1: ; preds = %BB
+ br label %BB2
+
+BB2: ; preds = %BB1, %BB
+ %tmp3 = phi i1 [ true, %BB ], [ false, %BB1 ] ; <i1> [#uses=1]
+ br label %BB9
+
+BB9: ; preds = %BB11, %BB2
+ %tmp10 = phi i32 [ 0, %BB2 ], [ %tmp12, %BB11 ] ; <i32> [#uses=1]
+ br i1 %tmp5, label %BB11, label %BB13
+
+BB11: ; preds = %BB13, %BB9
+ %tmp12 = phi i32 [ 0, %BB13 ], [ %tmp10, %BB9 ] ; <i32> [#uses=2]
+ br i1 %tmp3, label %BB9, label %BB20
+
+BB13: ; preds = %BB13, %BB9
+ %tmp14 = phi i32 [ 0, %BB9 ], [ %tmp14, %BB13 ] ; <i32> [#uses=1]
+ br i1 %tmp7, label %BB13, label %BB11
+
+BB20: ; preds = %BB11
+ ret i32 %tmp12
+}
diff --git a/test/Transforms/SimplifyCFG/2009-01-19-UnconditionalTrappingConstantExpr.ll b/test/Transforms/SimplifyCFG/2009-01-19-UnconditionalTrappingConstantExpr.ll
new file mode 100644
index 0000000..33167bd
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2009-01-19-UnconditionalTrappingConstantExpr.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -simplifycfg -S | grep {br i1 } | count 4
+; PR3354
+; Do not merge bb1 into the entry block, it might trap.
+
+@G = extern_weak global i32
+
+define i32 @test(i32 %tmp21, i32 %tmp24) {
+ %tmp25 = icmp sle i32 %tmp21, %tmp24
+ br i1 %tmp25, label %bb2, label %bb1
+
+bb1: ; preds = %bb
+ %tmp26 = icmp sgt i32 sdiv (i32 -32768, i32 ptrtoint (i32* @G to i32)), 0
+ br i1 %tmp26, label %bb6, label %bb2
+bb2:
+ ret i32 42
+
+bb6:
+ unwind
+}
+
+define i32 @test2(i32 %tmp21, i32 %tmp24, i1 %tmp34) {
+ br i1 %tmp34, label %bb5, label %bb6
+
+bb5: ; preds = %bb4
+ br i1 icmp sgt (i32 sdiv (i32 32767, i32 ptrtoint (i32* @G to i32)), i32 0), label %bb6, label %bb7
+bb6:
+ ret i32 42
+bb7:
+ unwind
+}
+
diff --git a/test/Transforms/SimplifyCFG/2009-03-05-Speculative-Hoist-Dbg.ll b/test/Transforms/SimplifyCFG/2009-03-05-Speculative-Hoist-Dbg.ll
new file mode 100644
index 0000000..db56fdb
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2009-03-05-Speculative-Hoist-Dbg.ll
@@ -0,0 +1,108 @@
+; RUN: opt < %s -simplifycfg -S | grep select
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
+
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+external global <{ i8 }> ; <<{ i8 }>*>:0 [#uses=0]
+@__dso_handle = external global i8* ; <i8**> [#uses=0]
+@_ZSt3cin = external global { i32 (...)**, i32, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, { i32 (...)**, \3 }*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } } ; <{ i32 (...)**, i32, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, { i32 (...)**, \3 }*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*> [#uses=1]
+@_ZSt4cout = external global { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } } ; <{ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*> [#uses=1]
+external constant [2 x i8] ; <[2 x i8]*>:1 [#uses=1]
[email protected]_ctors = external global [1 x { i32, void ()* }] ; <[1 x { i32, void ()* }]*> [#uses=0]
+
+define i32 @main(i32, i8**) {
+; <label>:2
+ %3 = alloca [4096 x i8], align 1 ; <[4096 x i8]*> [#uses=1]
+ %4 = call { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }* @_ZNKSt9basic_iosIcSt11char_traitsIcEE5rdbufEv({ { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* }* getelementptr ({ i32 (...)**, i32, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, { i32 (...)**, \3 }*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZSt3cin, i32 0, i32 2)) ; <{ i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*> [#uses=1]
+ %5 = getelementptr [4096 x i8]* %3, i32 0, i32 0 ; <i8*> [#uses=1]
+ %6 = call { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }* @_ZNSt15basic_streambufIcSt11char_traitsIcEE9pubsetbufEPci({ i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }* %4, i8* %5, i32 4096) ; <{ i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*> [#uses=0]
+ %7 = call { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }* @_ZNKSt9basic_iosIcSt11char_traitsIcEE5rdbufEv({ { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* }* getelementptr ({ i32 (...)**, i32, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, { i32 (...)**, \3 }*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZSt3cin, i32 0, i32 2)) ; <{ i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*> [#uses=1]
+ br label %25
+
+; <label>:8 ; preds = %25
+ %9 = trunc i32 %26 to i8 ; <i8> [#uses=4]
+ %10 = add i32 %.02, 1 ; <i32> [#uses=3]
+ %11 = icmp eq i8 %9, 10 ; <i1> [#uses=1]
+ br i1 %11, label %12, label %14
+
+; <label>:12 ; preds = %8
+ %13 = add i32 %.1, 1 ; <i32> [#uses=1]
+ br label %14
+
+; <label>:14 ; preds = %12, %8
+ %.0 = phi i32 [ %.1, %8 ], [ %13, %12 ] ; <i32> [#uses=3]
+ %15 = icmp eq i8 %9, 32 ; <i1> [#uses=1]
+ br i1 %15, label %20, label %16
+
+; <label>:16 ; preds = %14
+ %17 = icmp eq i8 %9, 10 ; <i1> [#uses=1]
+ br i1 %17, label %20, label %18
+
+; <label>:18 ; preds = %16
+ %19 = icmp eq i8 %9, 9 ; <i1> [#uses=1]
+ br i1 %19, label %20, label %21
+
+; <label>:20 ; preds = %18, %16, %14
+ br label %25
+
+; <label>:21 ; preds = %18
+ %22 = icmp eq i32 %.03, 0 ; <i1> [#uses=1]
+ br i1 %22, label %23, label %25
+
+; <label>:23 ; preds = %21
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %24 = add i32 %.01, 1 ; <i32> [#uses=1]
+ br label %25
+
+; <label>:25 ; preds = %23, %21, %20, %2
+ %.03 = phi i32 [ 0, %2 ], [ %.03, %21 ], [ 1, %23 ], [ 0, %20 ] ; <i32> [#uses=2]
+ %.02 = phi i32 [ 0, %2 ], [ %10, %21 ], [ %10, %23 ], [ %10, %20 ] ; <i32> [#uses=2]
+ %.01 = phi i32 [ 0, %2 ], [ %.01, %21 ], [ %24, %23 ], [ %.01, %20 ] ; <i32> [#uses=4]
+ %.1 = phi i32 [ 0, %2 ], [ %.0, %21 ], [ %.0, %23 ], [ %.0, %20 ] ; <i32> [#uses=3]
+ %26 = call i32 @_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv({ i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }* %7) ; <i32> [#uses=2]
+ %27 = icmp eq i32 %26, -1 ; <i1> [#uses=1]
+ br i1 %27, label %28, label %8
+
+; <label>:28 ; preds = %25
+ %29 = call { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZNSolsEi({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZSt4cout, i32 %.1) ; <{ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*> [#uses=1]
+ %30 = call { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* %29, i8* getelementptr ([2 x i8]* @1, i32 0, i32 0)) ; <{ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*> [#uses=1]
+ %31 = call { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZNSolsEi({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* %30, i32 %.01) ; <{ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*> [#uses=1]
+ %32 = call { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* %31, i8* getelementptr ([2 x i8]* @1, i32 0, i32 0)) ; <{ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*> [#uses=1]
+ %33 = call { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZNSolsEi({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* %32, i32 %.02) ; <{ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*> [#uses=1]
+ %34 = call { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZNSolsEPFRSoS_E({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* %33, { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* ({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*)* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_) ; <{ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*> [#uses=0]
+ ret i32 0
+}
+
+declare void @""() section "__TEXT,__StaticInit,regular,pure_instructions"
+
+declare fastcc void @""() section "__TEXT,__StaticInit,regular,pure_instructions"
+
+declare void @_ZNSt8ios_base4InitC1Ev(<{ i8 }>*)
+
+declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) nounwind
+
+declare void @""(i8*)
+
+declare void @_ZNSt8ios_base4InitD1Ev(<{ i8 }>*)
+
+declare { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }* @_ZNKSt9basic_iosIcSt11char_traitsIcEE5rdbufEv({ { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* }*)
+
+declare { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }* @_ZNSt15basic_streambufIcSt11char_traitsIcEE9pubsetbufEPci({ i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, i8*, i32)
+
+declare i32 @_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv({ i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*)
+
+declare { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZNSolsEi({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*, i32)
+
+declare { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*, i8*)
+
+declare { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZNSolsEPFRSoS_E({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*, { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* ({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*)*)
+
+declare { i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_({ i32 (...)**, { { i32 (...)**, i32, i32, i32, i32, i32, { \2, void (i32, \6*, i32)*, i32, i32 }*, { i8*, i32 }, [8 x { i8*, i32 }], i32, { i8*, i32 }*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }, \3*, i8, i8, { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, { { i32, { i32 (...)**, i32 }**, i32, { i32 (...)**, i32 }**, i8** }* } }*, { { i32 (...)**, i32 }, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }*, { { i32 (...)**, i32 } }*, { { i32 (...)**, i32 } }* } }*)
diff --git a/test/Transforms/SimplifyCFG/2009-05-12-externweak.ll b/test/Transforms/SimplifyCFG/2009-05-12-externweak.ll
new file mode 100644
index 0000000..419feb6
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2009-05-12-externweak.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -simplifycfg -S | not grep select
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+module asm ".globl _foo"
+module asm "_foo: ret"
+module asm ".globl _i"
+module asm ".set _i, 0"
+@i = extern_weak global i32 ; <i32*> [#uses=2]
+@j = common global i32 0 ; <i32*> [#uses=1]
+@ed = common global double 0.000000e+00, align 8 ; <double*> [#uses=1]
+
+define i32 @main() nounwind ssp {
+entry:
+ br label %bb4
+
+bb: ; preds = %bb4
+ br i1 icmp ne (i32* @i, i32* null), label %bb1, label %bb2
+
+bb1: ; preds = %bb
+ %0 = load i32* @i, align 4 ; <i32> [#uses=1]
+ br label %bb3
+
+bb2: ; preds = %bb
+ br label %bb3
+
+bb3: ; preds = %bb2, %bb1
+ %storemerge = phi i32 [ %0, %bb1 ], [ 0, %bb2 ] ; <i32> [#uses=2]
+ store i32 %storemerge, i32* @j
+ %1 = sitofp i32 %storemerge to double ; <double> [#uses=1]
+ %2 = call double @sin(double %1) nounwind readonly ; <double> [#uses=1]
+ %3 = fadd double %2, %d.0 ; <double> [#uses=1]
+ %4 = add i32 %l.0, 1 ; <i32> [#uses=1]
+ br label %bb4
+
+bb4: ; preds = %bb3, %entry
+ %d.0 = phi double [ undef, %entry ], [ %3, %bb3 ] ; <double> [#uses=2]
+ %l.0 = phi i32 [ 0, %entry ], [ %4, %bb3 ] ; <i32> [#uses=2]
+ %5 = icmp sgt i32 %l.0, 99 ; <i1> [#uses=1]
+ br i1 %5, label %bb5, label %bb
+
+bb5: ; preds = %bb4
+ store double %d.0, double* @ed, align 8
+ ret i32 0
+}
+
+declare double @sin(double) nounwind readonly
diff --git a/test/Transforms/SimplifyCFG/2009-06-15-InvokeCrash.ll b/test/Transforms/SimplifyCFG/2009-06-15-InvokeCrash.ll
new file mode 100644
index 0000000..72a15b1
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/2009-06-15-InvokeCrash.ll
@@ -0,0 +1,557 @@
+; RUN: opt < %s -simplifycfg -disable-output
+; END.
+ %struct..4._102 = type { %struct.QVectorData* }
+ %struct..5._125 = type { %struct.QMapData* }
+ %struct.QAbstractTextDocumentLayout = type { %struct.QObject }
+ %struct.QBasicAtomic = type { i32 }
+ %struct.QFont = type { %struct.QFontPrivate*, i32 }
+ %struct.QFontMetrics = type { %struct.QFontPrivate* }
+ %struct.QFontPrivate = type opaque
+ %"struct.QFragmentMap<QTextBlockData>" = type { %struct.QFragmentMapData }
+ %struct.QFragmentMapData = type { %"struct.QFragmentMapData::._154", i32 }
+ %"struct.QFragmentMapData::._154" = type { %"struct.QFragmentMapData::Header"* }
+ %"struct.QFragmentMapData::Header" = type { i32, i32, i32, i32, i32, i32, i32, i32 }
+ %"struct.QHash<uint,QHashDummyValue>" = type { %"struct.QHash<uint,QHashDummyValue>::._152" }
+ %"struct.QHash<uint,QHashDummyValue>::._152" = type { %struct.QHashData* }
+ %struct.QHashData = type { %"struct.QHashData::Node"*, %"struct.QHashData::Node"**, %struct.QBasicAtomic, i32, i32, i16, i16, i32, i8 }
+ %"struct.QHashData::Node" = type { %"struct.QHashData::Node"*, i32 }
+ %"struct.QList<QObject*>::._92" = type { %struct.QListData }
+ %"struct.QList<QPointer<QObject> >" = type { %"struct.QList<QObject*>::._92" }
+ %struct.QListData = type { %"struct.QListData::Data"* }
+ %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] }
+ %"struct.QMap<QUrl,QVariant>" = type { %struct..5._125 }
+ %struct.QMapData = type { %"struct.QMapData::Node"*, [12 x %"struct.QMapData::Node"*], %struct.QBasicAtomic, i32, i32, i32, i8 }
+ %"struct.QMapData::Node" = type { %"struct.QMapData::Node"*, [1 x %"struct.QMapData::Node"*] }
+ %struct.QObject = type { i32 (...)**, %struct.QObjectData* }
+ %struct.QObjectData = type { i32 (...)**, %struct.QObject*, %struct.QObject*, %"struct.QList<QPointer<QObject> >", i8, [3 x i8], i32, i32 }
+ %struct.QObjectPrivate = type { %struct.QObjectData, i32, %struct.QObject*, %"struct.QList<QPointer<QObject> >", %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %struct.QString }
+ %struct.QPaintDevice = type { i32 (...)**, i16 }
+ %struct.QPainter = type { %struct.QPainterPrivate* }
+ %struct.QPainterPrivate = type opaque
+ %struct.QPointF = type { double, double }
+ %struct.QPrinter = type { %struct.QPaintDevice, %struct.QPrinterPrivate* }
+ %struct.QPrinterPrivate = type opaque
+ %struct.QRectF = type { double, double, double, double }
+ %"struct.QSet<uint>" = type { %"struct.QHash<uint,QHashDummyValue>" }
+ %"struct.QSharedDataPointer<QTextFormatPrivate>" = type { %struct.QTextFormatPrivate* }
+ %struct.QString = type { %"struct.QString::Data"* }
+ %"struct.QString::Data" = type { %struct.QBasicAtomic, i32, i32, i16*, i8, i8, [1 x i16] }
+ %struct.QTextBlockFormat = type { %struct.QTextFormat }
+ %struct.QTextBlockGroup = type { %struct.QAbstractTextDocumentLayout }
+ %struct.QTextDocumentConfig = type { %struct.QString }
+ %struct.QTextDocumentPrivate = type { %struct.QObjectPrivate, %struct.QString, %"struct.QVector<QAbstractTextDocumentLayout::Selection>", i1, i32, i32, i1, i32, i32, i32, i32, i1, %struct.QTextFormatCollection, %struct.QTextBlockGroup*, %struct.QAbstractTextDocumentLayout*, %"struct.QFragmentMap<QTextBlockData>", %"struct.QFragmentMap<QTextBlockData>", i32, %"struct.QList<QPointer<QObject> >", %"struct.QList<QPointer<QObject> >", %"struct.QMap<QUrl,QVariant>", %"struct.QMap<QUrl,QVariant>", %"struct.QMap<QUrl,QVariant>", %struct.QTextDocumentConfig, i1, i1, %struct.QPointF }
+ %struct.QTextFormat = type { %"struct.QSharedDataPointer<QTextFormatPrivate>", i32 }
+ %struct.QTextFormatCollection = type { %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %"struct.QSet<uint>", %struct.QFont }
+ %struct.QTextFormatPrivate = type opaque
+ %"struct.QVector<QAbstractTextDocumentLayout::Selection>" = type { %struct..4._102 }
+ %struct.QVectorData = type { %struct.QBasicAtomic, i32, i32, i8 }
+
+define void @_ZNK13QTextDocument5printEP8QPrinter(%struct.QAbstractTextDocumentLayout* %this, %struct.QPrinter* %printer) {
+entry:
+ %tmp = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=2]
+ %tmp.upgrd.1 = alloca %struct.QRectF, align 16 ; <%struct.QRectF*> [#uses=5]
+ %tmp2 = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=3]
+ %tmp.upgrd.2 = alloca %struct.QFontMetrics, align 16 ; <%struct.QFontMetrics*> [#uses=4]
+ %tmp.upgrd.3 = alloca %struct.QFont, align 16 ; <%struct.QFont*> [#uses=4]
+ %tmp3 = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=2]
+ %p = alloca %struct.QPainter, align 16 ; <%struct.QPainter*> [#uses=14]
+ %body = alloca %struct.QRectF, align 16 ; <%struct.QRectF*> [#uses=9]
+ %foo = alloca double, align 8
+ %bar = alloca double, align 8
+ %pageNumberPos = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=4]
+ %scaledPageSize = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=6]
+ %printerPageSize = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=3]
+ %fmt = alloca %struct.QTextBlockFormat, align 16 ; <%struct.QTextBlockFormat*> [#uses=5]
+ %font = alloca %struct.QFont, align 16 ; <%struct.QFont*> [#uses=5]
+ %tmp.upgrd.4 = call %struct.QTextDocumentPrivate* @_ZNK13QTextDocument6d_funcEv( %struct.QAbstractTextDocumentLayout* %this ) ; <%struct.QTextDocumentPrivate*> [#uses=5]
+ %tmp.upgrd.5 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ call void @_ZN8QPainterC1EP12QPaintDevice( %struct.QPainter* %p, %struct.QPaintDevice* %tmp.upgrd.5 )
+ %tmp.upgrd.6 = invoke i1 @_ZNK8QPainter8isActiveEv( %struct.QPainter* %p )
+ to label %invcont unwind label %cleanup329 ; <i1> [#uses=1]
+invcont: ; preds = %entry
+ br i1 %tmp.upgrd.6, label %cond_next, label %cleanup328
+cond_next: ; preds = %invcont
+ %tmp8 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %this )
+ to label %invcont7 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=0]
+invcont7: ; preds = %cond_next
+ %tmp10 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1]
+ call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp, double 0.000000e+00, double 0.000000e+00 )
+ call void @_ZN6QRectFC1ERK7QPointFRK6QSizeF( %struct.QRectF* %body, %struct.QPointF* %tmp, %struct.QPointF* %tmp10 )
+ call void @_ZN7QPointFC1Ev( %struct.QPointF* %pageNumberPos )
+ %tmp12 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1]
+ %tmp13 = call i1 @_ZNK6QSizeF7isValidEv( %struct.QPointF* %tmp12 ) ; <i1> [#uses=1]
+ br i1 %tmp13, label %cond_next15, label %bb
+cond_next15: ; preds = %invcont7
+ %tmp17 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1]
+ %tmp.upgrd.7 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %tmp17 ) ; <double> [#uses=1]
+ %tmp18 = fcmp oeq double %tmp.upgrd.7, 0x41DFFFFFFFC00000 ; <i1> [#uses=1]
+ br i1 %tmp18, label %bb, label %cond_next20
+cond_next20: ; preds = %cond_next15
+ br label %bb21
+bb: ; preds = %cond_next15, %invcont7
+ br label %bb21
+bb21: ; preds = %bb, %cond_next20
+ %iftmp.406.0 = phi i1 [ false, %bb ], [ true, %cond_next20 ] ; <i1> [#uses=1]
+ br i1 %iftmp.406.0, label %cond_true24, label %cond_false
+cond_true24: ; preds = %bb21
+ %tmp.upgrd.8 = invoke i32 @_Z13qt_defaultDpiv( )
+ to label %invcont25 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont25: ; preds = %cond_true24
+ %tmp26 = sitofp i32 %tmp.upgrd.8 to double ; <double> [#uses=2]
+ %tmp30 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %this )
+ to label %invcont29 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=1]
+invcont29: ; preds = %invcont25
+ %tmp32 = invoke %struct.QPaintDevice* @_ZNK27QAbstractTextDocumentLayout11paintDeviceEv( %struct.QAbstractTextDocumentLayout* %tmp30 )
+ to label %invcont31 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=3]
+invcont31: ; preds = %invcont29
+ %tmp34 = icmp eq %struct.QPaintDevice* %tmp32, null ; <i1> [#uses=1]
+ br i1 %tmp34, label %cond_next42, label %cond_true35
+cond_true35: ; preds = %invcont31
+ %tmp38 = invoke i32 @_ZNK12QPaintDevice11logicalDpiXEv( %struct.QPaintDevice* %tmp32 )
+ to label %invcont37 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont37: ; preds = %cond_true35
+ %tmp38.upgrd.9 = sitofp i32 %tmp38 to double ; <double> [#uses=1]
+ %tmp41 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp32 )
+ to label %invcont40 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont40: ; preds = %invcont37
+ %tmp41.upgrd.10 = sitofp i32 %tmp41 to double ; <double> [#uses=1]
+ br label %cond_next42
+cond_next42: ; preds = %invcont40, %invcont31
+ %sourceDpiY.2 = phi double [ %tmp41.upgrd.10, %invcont40 ], [ %tmp26, %invcont31 ] ; <double> [#uses=1]
+ %sourceDpiX.2 = phi double [ %tmp38.upgrd.9, %invcont40 ], [ %tmp26, %invcont31 ] ; <double> [#uses=1]
+ %tmp44 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ %tmp46 = invoke i32 @_ZNK12QPaintDevice11logicalDpiXEv( %struct.QPaintDevice* %tmp44 )
+ to label %invcont45 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont45: ; preds = %cond_next42
+ %tmp46.upgrd.11 = sitofp i32 %tmp46 to double ; <double> [#uses=1]
+ %tmp48 = fdiv double %tmp46.upgrd.11, %sourceDpiX.2 ; <double> [#uses=2]
+ %tmp50 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ %tmp52 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp50 )
+ to label %invcont51 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont51: ; preds = %invcont45
+ %tmp52.upgrd.12 = sitofp i32 %tmp52 to double ; <double> [#uses=1]
+ %tmp54 = fdiv double %tmp52.upgrd.12, %sourceDpiY.2 ; <double> [#uses=2]
+ invoke void @_ZN8QPainter5scaleEdd( %struct.QPainter* %p, double %tmp48, double %tmp54 )
+ to label %invcont57 unwind label %cleanup329
+invcont57: ; preds = %invcont51
+ %tmp.upgrd.13 = getelementptr %struct.QPointF* %scaledPageSize, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp60 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26, i32 0 ; <double*> [#uses=1]
+ %tmp61 = load double* %tmp60 ; <double> [#uses=1]
+ store double %tmp61, double* %tmp.upgrd.13
+ %tmp62 = getelementptr %struct.QPointF* %scaledPageSize, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp63 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26, i32 1 ; <double*> [#uses=1]
+ %tmp64 = load double* %tmp63 ; <double> [#uses=1]
+ store double %tmp64, double* %tmp62
+ %tmp65 = call double* @_ZN6QSizeF6rwidthEv( %struct.QPointF* %scaledPageSize ) ; <double*> [#uses=2]
+ %tmp67 = load double* %tmp65 ; <double> [#uses=1]
+ %tmp69 = mul double %tmp67, %tmp48 ; <double> [#uses=1]
+ store double %tmp69, double* %tmp65
+ %tmp71 = call double* @_ZN6QSizeF7rheightEv( %struct.QPointF* %scaledPageSize ) ; <double*> [#uses=2]
+ %tmp73 = load double* %tmp71 ; <double> [#uses=1]
+ %tmp75 = mul double %tmp73, %tmp54 ; <double> [#uses=1]
+ store double %tmp75, double* %tmp71
+ %tmp78 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ %tmp80 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp78 )
+ to label %invcont79 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont79: ; preds = %invcont57
+ %tmp82 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1]
+ %tmp84 = invoke i32 @_ZNK12QPaintDevice5widthEv( %struct.QPaintDevice* %tmp82 )
+ to label %invcont83 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont83: ; preds = %invcont79
+ %tmp80.upgrd.14 = sitofp i32 %tmp80 to double ; <double> [#uses=1]
+ %tmp84.upgrd.15 = sitofp i32 %tmp84 to double ; <double> [#uses=1]
+ call void @_ZN6QSizeFC1Edd( %struct.QPointF* %printerPageSize, double %tmp84.upgrd.15, double %tmp80.upgrd.14 )
+ %tmp85 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %printerPageSize ) ; <double> [#uses=1]
+ %tmp86 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %scaledPageSize ) ; <double> [#uses=1]
+ %tmp87 = fdiv double %tmp85, %tmp86 ; <double> [#uses=1]
+ %tmp88 = call double @_ZNK6QSizeF5widthEv( %struct.QPointF* %printerPageSize ) ; <double> [#uses=1]
+ %tmp89 = call double @_ZNK6QSizeF5widthEv( %struct.QPointF* %scaledPageSize ) ; <double> [#uses=1]
+ %tmp90 = fdiv double %tmp88, %tmp89 ; <double> [#uses=1]
+ invoke void @_ZN8QPainter5scaleEdd( %struct.QPainter* %p, double %tmp90, double %tmp87 )
+ to label %cond_next194 unwind label %cleanup329
+cond_false: ; preds = %bb21
+ %tmp.upgrd.16 = getelementptr %struct.QAbstractTextDocumentLayout* %this, i32 0, i32 0 ; <%struct.QObject*> [#uses=1]
+ %tmp95 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument5cloneEP7QObject( %struct.QAbstractTextDocumentLayout* %this, %struct.QObject* %tmp.upgrd.16 )
+ to label %invcont94 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=9]
+invcont94: ; preds = %cond_false
+ %tmp99 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %tmp95 )
+ to label %invcont98 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=1]
+invcont98: ; preds = %invcont94
+ %tmp101 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont100 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=1]
+invcont100: ; preds = %invcont98
+ invoke void @_ZN27QAbstractTextDocumentLayout14setPaintDeviceEP12QPaintDevice( %struct.QAbstractTextDocumentLayout* %tmp99, %struct.QPaintDevice* %tmp101 )
+ to label %invcont103 unwind label %cleanup329
+invcont103: ; preds = %invcont100
+ %tmp105 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont104 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=1]
+invcont104: ; preds = %invcont103
+ %tmp107 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp105 )
+ to label %invcont106 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont106: ; preds = %invcont104
+ %tmp108 = sitofp i32 %tmp107 to double ; <double> [#uses=1]
+ %tmp109 = mul double %tmp108, 0x3FE93264C993264C ; <double> [#uses=1]
+ %tmp109.upgrd.17 = fptosi double %tmp109 to i32 ; <i32> [#uses=3]
+ %tmp.upgrd.18 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) ; <%struct.QTextBlockGroup*> [#uses=1]
+ invoke void @_ZNK10QTextFrame11frameFormatEv( %struct.QTextBlockFormat* sret %fmt, %struct.QTextBlockGroup* %tmp.upgrd.18 )
+ to label %invcont111 unwind label %cleanup329
+invcont111: ; preds = %invcont106
+ %tmp112 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1]
+ invoke void @_ZN16QTextFrameFormat9setMarginEd( %struct.QTextBlockFormat* %fmt, double %tmp112 )
+ to label %invcont114 unwind label %cleanup192
+invcont114: ; preds = %invcont111
+ %tmp116 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) ; <%struct.QTextBlockGroup*> [#uses=1]
+ invoke void @_ZN10QTextFrame14setFrameFormatERK16QTextFrameFormat( %struct.QTextBlockGroup* %tmp116, %struct.QTextBlockFormat* %fmt )
+ to label %invcont117 unwind label %cleanup192
+invcont117: ; preds = %invcont114
+ %tmp119 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont118 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1]
+invcont118: ; preds = %invcont117
+ %tmp121 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp119 )
+ to label %invcont120 unwind label %cleanup192 ; <i32> [#uses=1]
+invcont120: ; preds = %invcont118
+ %tmp121.upgrd.19 = sitofp i32 %tmp121 to double ; <double> [#uses=1]
+ %tmp123 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont122 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1]
+invcont122: ; preds = %invcont120
+ %tmp125 = invoke i32 @_ZNK12QPaintDevice5widthEv( %struct.QPaintDevice* %tmp123 )
+ to label %invcont124 unwind label %cleanup192 ; <i32> [#uses=1]
+invcont124: ; preds = %invcont122
+ %tmp125.upgrd.20 = sitofp i32 %tmp125 to double ; <double> [#uses=1]
+ call void @_ZN6QRectFC1Edddd( %struct.QRectF* %tmp.upgrd.1, double 0.000000e+00, double 0.000000e+00, double %tmp125.upgrd.20, double %tmp121.upgrd.19 )
+ %tmp126 = getelementptr %struct.QRectF* %body, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp127 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp128 = load double* %tmp127 ; <double> [#uses=1]
+ store double %tmp128, double* %tmp126
+ %tmp129 = getelementptr %struct.QRectF* %body, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp130 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp131 = load double* %tmp130 ; <double> [#uses=1]
+ store double %tmp131, double* %tmp129
+ %tmp132 = getelementptr %struct.QRectF* %body, i32 0, i32 2 ; <double*> [#uses=1]
+ %tmp133 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 2 ; <double*> [#uses=1]
+ %tmp134 = load double* %tmp133 ; <double> [#uses=1]
+ store double %tmp134, double* %tmp132
+ %tmp135 = getelementptr %struct.QRectF* %body, i32 0, i32 3 ; <double*> [#uses=1]
+ %tmp136 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 3 ; <double*> [#uses=1]
+ %tmp137 = load double* %tmp136 ; <double> [#uses=1]
+ store double %tmp137, double* %tmp135
+ %tmp138 = call double @_ZNK6QRectF6heightEv( %struct.QRectF* %body ) ; <double> [#uses=1]
+ %tmp139 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1]
+ %tmp140 = sub double %tmp138, %tmp139 ; <double> [#uses=1]
+ %tmp142 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont141 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1]
+invcont141: ; preds = %invcont124
+ invoke void @_ZNK13QTextDocument11defaultFontEv( %struct.QFont* sret %tmp.upgrd.3, %struct.QAbstractTextDocumentLayout* %tmp95 )
+ to label %invcont144 unwind label %cleanup192
+invcont144: ; preds = %invcont141
+ invoke void @_ZN12QFontMetricsC1ERK5QFontP12QPaintDevice( %struct.QFontMetrics* %tmp.upgrd.2, %struct.QFont* %tmp.upgrd.3, %struct.QPaintDevice* %tmp142 )
+ to label %invcont146 unwind label %cleanup173
+invcont146: ; preds = %invcont144
+ %tmp149 = invoke i32 @_ZNK12QFontMetrics6ascentEv( %struct.QFontMetrics* %tmp.upgrd.2 )
+ to label %invcont148 unwind label %cleanup168 ; <i32> [#uses=1]
+invcont148: ; preds = %invcont146
+ %tmp149.upgrd.21 = sitofp i32 %tmp149 to double ; <double> [#uses=1]
+ %tmp150 = add double %tmp140, %tmp149.upgrd.21 ; <double> [#uses=1]
+ %tmp152 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
+ to label %invcont151 unwind label %cleanup168 ; <%struct.QPaintDevice*> [#uses=1]
+invcont151: ; preds = %invcont148
+ %tmp154 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp152 )
+ to label %invcont153 unwind label %cleanup168 ; <i32> [#uses=1]
+invcont153: ; preds = %invcont151
+ %tmp155 = mul i32 %tmp154, 5 ; <i32> [#uses=1]
+ %tmp156 = sdiv i32 %tmp155, 72 ; <i32> [#uses=1]
+ %tmp156.upgrd.22 = sitofp i32 %tmp156 to double ; <double> [#uses=1]
+ %tmp157 = add double %tmp150, %tmp156.upgrd.22 ; <double> [#uses=1]
+ %tmp158 = call double @_ZNK6QRectF5widthEv( %struct.QRectF* %body ) ; <double> [#uses=1]
+ %tmp159 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1]
+ %tmp160 = sub double %tmp158, %tmp159 ; <double> [#uses=1]
+ call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp2, double %tmp160, double %tmp157 )
+ %tmp161 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp162 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp163 = load double* %tmp162 ; <double> [#uses=1]
+ store double %tmp163, double* %tmp161
+ %tmp164 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp165 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp166 = load double* %tmp165 ; <double> [#uses=1]
+ store double %tmp166, double* %tmp164
+ invoke void @_ZN12QFontMetricsD1Ev( %struct.QFontMetrics* %tmp.upgrd.2 )
+ to label %cleanup171 unwind label %cleanup173
+cleanup168: ; preds = %invcont151, %invcont148, %invcont146
+ invoke void @_ZN12QFontMetricsD1Ev( %struct.QFontMetrics* %tmp.upgrd.2 )
+ to label %cleanup173 unwind label %cleanup173
+cleanup171: ; preds = %invcont153
+ invoke void @_ZN5QFontD1Ev( %struct.QFont* %tmp.upgrd.3 )
+ to label %finally170 unwind label %cleanup192
+cleanup173: ; preds = %cleanup168, %cleanup168, %invcont153, %invcont144
+ invoke void @_ZN5QFontD1Ev( %struct.QFont* %tmp.upgrd.3 )
+ to label %cleanup192 unwind label %cleanup192
+finally170: ; preds = %cleanup171
+ invoke void @_ZNK13QTextDocument11defaultFontEv( %struct.QFont* sret %font, %struct.QAbstractTextDocumentLayout* %tmp95 )
+ to label %invcont177 unwind label %cleanup192
+invcont177: ; preds = %finally170
+ invoke void @_ZN5QFont12setPointSizeEi( %struct.QFont* %font, i32 10 )
+ to label %invcont179 unwind label %cleanup187
+invcont179: ; preds = %invcont177
+ invoke void @_ZN13QTextDocument14setDefaultFontERK5QFont( %struct.QAbstractTextDocumentLayout* %tmp95, %struct.QFont* %font )
+ to label %invcont181 unwind label %cleanup187
+invcont181: ; preds = %invcont179
+ call void @_ZNK6QRectF4sizeEv( %struct.QPointF* sret %tmp3, %struct.QRectF* %body )
+ invoke void @_ZN13QTextDocument11setPageSizeERK6QSizeF( %struct.QAbstractTextDocumentLayout* %tmp95, %struct.QPointF* %tmp3 )
+ to label %cleanup185 unwind label %cleanup187
+cleanup185: ; preds = %invcont181
+ invoke void @_ZN5QFontD1Ev( %struct.QFont* %font )
+ to label %cleanup190 unwind label %cleanup192
+cleanup187: ; preds = %invcont181, %invcont179, %invcont177
+ invoke void @_ZN5QFontD1Ev( %struct.QFont* %font )
+ to label %cleanup192 unwind label %cleanup192
+cleanup190: ; preds = %cleanup185
+ invoke void @_ZN16QTextFrameFormatD1Ev( %struct.QTextBlockFormat* %fmt )
+ to label %cond_next194 unwind label %cleanup329
+cleanup192: ; preds = %cleanup187, %cleanup187, %cleanup185, %finally170, %cleanup173, %cleanup173, %cleanup171, %invcont141, %invcont124, %invcont122, %invcont120, %invcont118, %invcont117, %invcont114, %invcont111
+ invoke void @_ZN16QTextFrameFormatD1Ev( %struct.QTextBlockFormat* %fmt )
+ to label %cleanup329 unwind label %cleanup329
+cond_next194: ; preds = %cleanup190, %invcont83
+ %clonedDoc.1 = phi %struct.QAbstractTextDocumentLayout* [ null, %invcont83 ], [ %tmp95, %cleanup190 ] ; <%struct.QAbstractTextDocumentLayout*> [#uses=3]
+ %doc.1 = phi %struct.QAbstractTextDocumentLayout* [ %this, %invcont83 ], [ %tmp95, %cleanup190 ] ; <%struct.QAbstractTextDocumentLayout*> [#uses=2]
+ %tmp197 = invoke i1 @_ZNK8QPrinter13collateCopiesEv( %struct.QPrinter* %printer )
+ to label %invcont196 unwind label %cleanup329 ; <i1> [#uses=1]
+invcont196: ; preds = %cond_next194
+ br i1 %tmp197, label %cond_true200, label %cond_false204
+cond_true200: ; preds = %invcont196
+ %tmp2000 = load double* %foo
+ store double %tmp2000, double* %bar
+ %tmp203 = invoke i32 @_ZNK8QPrinter9numCopiesEv( %struct.QPrinter* %printer )
+ to label %cond_next208 unwind label %cleanup329 ; <i32> [#uses=1]
+cond_false204: ; preds = %invcont196
+ %tmp2001 = load double* %foo
+ store double %tmp2001, double* %bar
+ %tmp207 = invoke i32 @_ZNK8QPrinter9numCopiesEv( %struct.QPrinter* %printer )
+ to label %cond_next208 unwind label %cleanup329 ; <i32> [#uses=1]
+cond_next208: ; preds = %invcont206, %invcont202
+ %pageCopies.0 = phi i32 [ %tmp203, %cond_true200 ], [ 1, %cond_false204 ] ; <i32> [#uses=2]
+ %docCopies.0 = phi i32 [ 1, %cond_true200 ], [ %tmp207, %cond_false204 ] ; <i32> [#uses=2]
+ %tmp211 = invoke i32 @_ZNK8QPrinter8fromPageEv( %struct.QPrinter* %printer )
+ to label %invcont210 unwind label %cleanup329 ; <i32> [#uses=3]
+invcont210: ; preds = %cond_next208
+ %tmp214 = invoke i32 @_ZNK8QPrinter6toPageEv( %struct.QPrinter* %printer )
+ to label %invcont213 unwind label %cleanup329 ; <i32> [#uses=3]
+invcont213: ; preds = %invcont210
+ %tmp216 = icmp eq i32 %tmp211, 0 ; <i1> [#uses=1]
+ br i1 %tmp216, label %cond_true217, label %cond_next225
+cond_true217: ; preds = %invcont213
+ %tmp219 = icmp eq i32 %tmp214, 0 ; <i1> [#uses=1]
+ br i1 %tmp219, label %cond_true220, label %cond_next225
+cond_true220: ; preds = %cond_true217
+ %tmp223 = invoke i32 @_ZNK13QTextDocument9pageCountEv( %struct.QAbstractTextDocumentLayout* %doc.1 )
+ to label %invcont222 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont222: ; preds = %cond_true220
+ br label %cond_next225
+cond_next225: ; preds = %invcont222, %cond_true217, %invcont213
+ %toPage.1 = phi i32 [ %tmp223, %invcont222 ], [ %tmp214, %cond_true217 ], [ %tmp214, %invcont213 ] ; <i32> [#uses=2]
+ %fromPage.1 = phi i32 [ 1, %invcont222 ], [ %tmp211, %cond_true217 ], [ %tmp211, %invcont213 ] ; <i32> [#uses=2]
+ %tmp.page = invoke i32 @_ZNK8QPrinter9pageOrderEv( %struct.QPrinter* %printer )
+ to label %invcont227 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont227: ; preds = %cond_next225
+ %tmp228 = icmp eq i32 %tmp.page, 1 ; <i1> [#uses=1]
+ br i1 %tmp228, label %cond_true230, label %cond_next234
+cond_true230: ; preds = %invcont227
+ br label %cond_next234
+cond_next234: ; preds = %cond_true230, %invcont227
+ %ascending.1 = phi i1 [ false, %cond_true230 ], [ true, %invcont227 ] ; <i1> [#uses=1]
+ %toPage.2 = phi i32 [ %fromPage.1, %cond_true230 ], [ %toPage.1, %invcont227 ] ; <i32> [#uses=1]
+ %fromPage.2 = phi i32 [ %toPage.1, %cond_true230 ], [ %fromPage.1, %invcont227 ] ; <i32> [#uses=1]
+ br label %bb309
+bb237: ; preds = %cond_true313, %cond_next293
+ %iftmp.410.4 = phi i1 [ %iftmp.410.5, %cond_true313 ], [ %iftmp.410.1, %cond_next293 ] ; <i1> [#uses=1]
+ %page.4 = phi i32 [ %fromPage.2, %cond_true313 ], [ %page.3, %cond_next293 ] ; <i32> [#uses=4]
+ br label %bb273
+invcont240: ; preds = %cond_true277
+ %tmp242 = icmp eq i32 %tmp241, 2 ; <i1> [#uses=1]
+ br i1 %tmp242, label %bb252, label %cond_next244
+cond_next244: ; preds = %invcont240
+ %tmp247 = invoke i32 @_ZNK8QPrinter12printerStateEv( %struct.QPrinter* %printer )
+ to label %invcont246 unwind label %cleanup329 ; <i32> [#uses=1]
+invcont246: ; preds = %cond_next244
+ %tmp248 = icmp eq i32 %tmp247, 3 ; <i1> [#uses=1]
+ br i1 %tmp248, label %bb252, label %bb253
+bb252: ; preds = %invcont246, %invcont240
+ br label %bb254
+bb253: ; preds = %invcont246
+ br label %bb254
+bb254: ; preds = %bb253, %bb252
+ %iftmp.410.0 = phi i1 [ true, %bb252 ], [ false, %bb253 ] ; <i1> [#uses=2]
+ br i1 %iftmp.410.0, label %UserCanceled, label %cond_next258
+cond_next258: ; preds = %bb254
+ invoke fastcc void @_Z9printPageiP8QPainterPK13QTextDocumentRK6QRectFRK7QPointF( i32 %page.4, %struct.QPainter* %p, %struct.QAbstractTextDocumentLayout* %doc.1, %struct.QRectF* %body, %struct.QPointF* %pageNumberPos )
+ to label %invcont261 unwind label %cleanup329
+invcont261: ; preds = %cond_next258
+ %tmp263 = add i32 %pageCopies.0, -1 ; <i32> [#uses=1]
+ %tmp265 = icmp sgt i32 %tmp263, %j.4 ; <i1> [#uses=1]
+ br i1 %tmp265, label %cond_true266, label %cond_next270
+cond_true266: ; preds = %invcont261
+ %tmp269 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer )
+ to label %cond_next270 unwind label %cleanup329 ; <i1> [#uses=0]
+cond_next270: ; preds = %cond_true266, %invcont261
+ %tmp272 = add i32 %j.4, 1 ; <i32> [#uses=1]
+ br label %bb273
+bb273: ; preds = %cond_next270, %bb237
+ %iftmp.410.1 = phi i1 [ %iftmp.410.4, %bb237 ], [ %iftmp.410.0, %cond_next270 ] ; <i1> [#uses=2]
+ %j.4 = phi i32 [ 0, %bb237 ], [ %tmp272, %cond_next270 ] ; <i32> [#uses=3]
+ %tmp276 = icmp slt i32 %j.4, %pageCopies.0 ; <i1> [#uses=1]
+ br i1 %tmp276, label %cond_true277, label %bb280
+cond_true277: ; preds = %bb273
+ %tmp241 = invoke i32 @_ZNK8QPrinter12printerStateEv( %struct.QPrinter* %printer )
+ to label %invcont240 unwind label %cleanup329 ; <i32> [#uses=1]
+bb280: ; preds = %bb273
+ %tmp283 = icmp eq i32 %page.4, %toPage.2 ; <i1> [#uses=1]
+ br i1 %tmp283, label %bb297, label %cond_next285
+cond_next285: ; preds = %bb280
+ br i1 %ascending.1, label %cond_true287, label %cond_false290
+cond_true287: ; preds = %cond_next285
+ %tmp289 = add i32 %page.4, 1 ; <i32> [#uses=1]
+ br label %cond_next293
+cond_false290: ; preds = %cond_next285
+ %tmp292 = add i32 %page.4, -1 ; <i32> [#uses=1]
+ br label %cond_next293
+cond_next293: ; preds = %cond_false290, %cond_true287
+ %page.3 = phi i32 [ %tmp289, %cond_true287 ], [ %tmp292, %cond_false290 ] ; <i32> [#uses=1]
+ %tmp296 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer )
+ to label %bb237 unwind label %cleanup329 ; <i1> [#uses=0]
+bb297: ; preds = %bb280
+ %tmp299 = add i32 %docCopies.0, -1 ; <i32> [#uses=1]
+ %tmp301 = icmp sgt i32 %tmp299, %i.1 ; <i1> [#uses=1]
+ br i1 %tmp301, label %cond_true302, label %cond_next306
+cond_true302: ; preds = %bb297
+ %tmp305 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer )
+ to label %cond_next306 unwind label %cleanup329 ; <i1> [#uses=0]
+cond_next306: ; preds = %cond_true302, %bb297
+ %tmp308 = add i32 %i.1, 1 ; <i32> [#uses=1]
+ br label %bb309
+bb309: ; preds = %cond_next306, %cond_next234
+ %iftmp.410.5 = phi i1 [ undef, %cond_next234 ], [ %iftmp.410.1, %cond_next306 ] ; <i1> [#uses=1]
+ %i.1 = phi i32 [ 0, %cond_next234 ], [ %tmp308, %cond_next306 ] ; <i32> [#uses=3]
+ %tmp312 = icmp slt i32 %i.1, %docCopies.0 ; <i1> [#uses=1]
+ br i1 %tmp312, label %cond_true313, label %UserCanceled
+cond_true313: ; preds = %bb309
+ br label %bb237
+UserCanceled: ; preds = %bb309, %bb254
+ %tmp318 = icmp eq %struct.QAbstractTextDocumentLayout* %clonedDoc.1, null ; <i1> [#uses=1]
+ br i1 %tmp318, label %cleanup327, label %cond_true319
+cond_true319: ; preds = %UserCanceled
+ %tmp.upgrd.23 = getelementptr %struct.QAbstractTextDocumentLayout* %clonedDoc.1, i32 0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+ %tmp.upgrd.24 = load i32 (...)*** %tmp.upgrd.23 ; <i32 (...)**> [#uses=1]
+ %tmp322 = getelementptr i32 (...)** %tmp.upgrd.24, i32 4 ; <i32 (...)**> [#uses=1]
+ %tmp.upgrd.25 = load i32 (...)** %tmp322 ; <i32 (...)*> [#uses=1]
+ %tmp.upgrd.26 = bitcast i32 (...)* %tmp.upgrd.25 to void (%struct.QAbstractTextDocumentLayout*)* ; <void (%struct.QAbstractTextDocumentLayout*)*> [#uses=1]
+ invoke void %tmp.upgrd.26( %struct.QAbstractTextDocumentLayout* %clonedDoc.1 )
+ to label %cleanup327 unwind label %cleanup329
+cleanup327: ; preds = %cond_true319, %UserCanceled
+ call void @_ZN8QPainterD1Ev( %struct.QPainter* %p )
+ ret void
+cleanup328: ; preds = %invcont
+ call void @_ZN8QPainterD1Ev( %struct.QPainter* %p )
+ ret void
+cleanup329: ; preds = %cond_true319, %cond_true302, %cond_next293, %cond_true277, %cond_true266, %cond_next258, %cond_next244, %cond_next225, %cond_true220, %invcont210, %cond_next208, %cond_false204, %cond_true200, %cond_next194, %cleanup192, %cleanup192, %cleanup190, %invcont106, %invcont104, %invcont103, %invcont100, %invcont98, %invcont94, %cond_false, %invcont83, %invcont79, %invcont57, %invcont51, %invcont45, %cond_next42, %invcont37, %cond_true35, %invcont29, %invcont25, %cond_true24, %cond_next, %entry
+ call void @_ZN8QPainterD1Ev( %struct.QPainter* %p )
+ unwind
+}
+
+declare void @_ZN6QSizeFC1Edd(%struct.QPointF*, double, double)
+
+declare i1 @_ZNK6QSizeF7isValidEv(%struct.QPointF*)
+
+declare double @_ZNK6QSizeF5widthEv(%struct.QPointF*)
+
+declare double @_ZNK6QSizeF6heightEv(%struct.QPointF*)
+
+declare double* @_ZN6QSizeF6rwidthEv(%struct.QPointF*)
+
+declare double* @_ZN6QSizeF7rheightEv(%struct.QPointF*)
+
+declare %struct.QTextDocumentPrivate* @_ZNK13QTextDocument6d_funcEv(%struct.QAbstractTextDocumentLayout*)
+
+declare void @_ZN7QPointFC1Ev(%struct.QPointF*)
+
+declare void @_ZN7QPointFC1Edd(%struct.QPointF*, double, double)
+
+declare void @_ZN16QTextFrameFormat9setMarginEd(%struct.QTextBlockFormat*, double)
+
+declare void @_ZN6QRectFC1Edddd(%struct.QRectF*, double, double, double, double)
+
+declare void @_ZN6QRectFC1ERK7QPointFRK6QSizeF(%struct.QRectF*, %struct.QPointF*, %struct.QPointF*)
+
+declare double @_ZNK6QRectF5widthEv(%struct.QRectF*)
+
+declare double @_ZNK6QRectF6heightEv(%struct.QRectF*)
+
+declare void @_ZNK6QRectF4sizeEv(%struct.QPointF*, %struct.QRectF*)
+
+declare void @_ZN16QTextFrameFormatD1Ev(%struct.QTextBlockFormat*)
+
+declare void @_ZNK10QTextFrame11frameFormatEv(%struct.QTextBlockFormat*, %struct.QTextBlockGroup*)
+
+declare void @_ZN10QTextFrame14setFrameFormatERK16QTextFrameFormat(%struct.QTextBlockGroup*, %struct.QTextBlockFormat*)
+
+declare i32 @_ZNK12QPaintDevice5widthEv(%struct.QPaintDevice*)
+
+declare i32 @_ZNK12QPaintDevice6heightEv(%struct.QPaintDevice*)
+
+declare i32 @_ZNK12QPaintDevice11logicalDpiXEv(%struct.QPaintDevice*)
+
+declare i32 @_ZNK12QPaintDevice11logicalDpiYEv(%struct.QPaintDevice*)
+
+declare %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument5cloneEP7QObject(%struct.QAbstractTextDocumentLayout*, %struct.QObject*)
+
+declare void @_ZN5QFontD1Ev(%struct.QFont*)
+
+declare %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv(%struct.QAbstractTextDocumentLayout*)
+
+declare %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv(%struct.QAbstractTextDocumentLayout*)
+
+declare i32 @_ZNK13QTextDocument9pageCountEv(%struct.QAbstractTextDocumentLayout*)
+
+declare void @_ZNK13QTextDocument11defaultFontEv(%struct.QFont*, %struct.QAbstractTextDocumentLayout*)
+
+declare void @_ZN13QTextDocument14setDefaultFontERK5QFont(%struct.QAbstractTextDocumentLayout*, %struct.QFont*)
+
+declare void @_ZN13QTextDocument11setPageSizeERK6QSizeF(%struct.QAbstractTextDocumentLayout*, %struct.QPointF*)
+
+declare void @_Z9printPageiP8QPainterPK13QTextDocumentRK6QRectFRK7QPointF(i32, %struct.QPainter*, %struct.QAbstractTextDocumentLayout*, %struct.QRectF*, %struct.QPointF*)
+
+declare void @_ZN12QFontMetricsD1Ev(%struct.QFontMetrics*)
+
+declare void @_ZN8QPainterC1EP12QPaintDevice(%struct.QPainter*, %struct.QPaintDevice*)
+
+declare i1 @_ZNK8QPainter8isActiveEv(%struct.QPainter*)
+
+declare i32 @_Z13qt_defaultDpiv()
+
+declare %struct.QPaintDevice* @_ZNK27QAbstractTextDocumentLayout11paintDeviceEv(%struct.QAbstractTextDocumentLayout*)
+
+declare void @_ZN8QPainter5scaleEdd(%struct.QPainter*, double, double)
+
+declare %struct.QPaintDevice* @_ZNK8QPainter6deviceEv(%struct.QPainter*)
+
+declare void @_ZN27QAbstractTextDocumentLayout14setPaintDeviceEP12QPaintDevice(%struct.QAbstractTextDocumentLayout*, %struct.QPaintDevice*)
+
+declare void @_ZN12QFontMetricsC1ERK5QFontP12QPaintDevice(%struct.QFontMetrics*, %struct.QFont*, %struct.QPaintDevice*)
+
+declare i32 @_ZNK12QFontMetrics6ascentEv(%struct.QFontMetrics*)
+
+declare void @_ZN5QFont12setPointSizeEi(%struct.QFont*, i32)
+
+declare i1 @_ZNK8QPrinter13collateCopiesEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter9numCopiesEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter8fromPageEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter6toPageEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter9pageOrderEv(%struct.QPrinter*)
+
+declare i32 @_ZNK8QPrinter12printerStateEv(%struct.QPrinter*)
+
+declare i1 @_ZN8QPrinter7newPageEv(%struct.QPrinter*)
+
+declare void @_ZN8QPainterD1Ev(%struct.QPainter*)
diff --git a/test/Transforms/SimplifyCFG/BrUnwind.ll b/test/Transforms/SimplifyCFG/BrUnwind.ll
new file mode 100644
index 0000000..b19a27d
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/BrUnwind.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep {br label}
+
+define void @test(i1 %C) {
+ br i1 %C, label %A, label %B
+A: ; preds = %0
+ call void @test( i1 %C )
+ br label %X
+B: ; preds = %0
+ call void @test( i1 %C )
+ br label %X
+X: ; preds = %B, %A
+ unwind
+}
+
diff --git a/test/Transforms/SimplifyCFG/DeadSetCC.ll b/test/Transforms/SimplifyCFG/DeadSetCC.ll
new file mode 100644
index 0000000..8339462
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/DeadSetCC.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep {icmp eq}
+
+; Check that simplifycfg deletes a dead 'seteq' instruction when it
+; folds a conditional branch into a switch instruction.
+
+declare void @foo()
+
+declare void @bar()
+
+define void @testcfg(i32 %V) {
+ %C = icmp eq i32 %V, 18 ; <i1> [#uses=1]
+ %D = icmp eq i32 %V, 180 ; <i1> [#uses=1]
+ %E = or i1 %C, %D ; <i1> [#uses=1]
+ br i1 %E, label %L1, label %Sw
+Sw: ; preds = %0
+ switch i32 %V, label %L1 [
+ i32 15, label %L2
+ i32 16, label %L2
+ ]
+L1: ; preds = %Sw, %0
+ call void @foo( )
+ ret void
+L2: ; preds = %Sw, %Sw
+ call void @bar( )
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/EqualPHIEdgeBlockMerge.ll b/test/Transforms/SimplifyCFG/EqualPHIEdgeBlockMerge.ll
new file mode 100644
index 0000000..912c755
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/EqualPHIEdgeBlockMerge.ll
@@ -0,0 +1,18 @@
+; Test merging of blocks with phi nodes.
+;
+; RUN: opt < %s -simplifycfg -S | not grep N:
+;
+
+define i32 @test(i1 %a) {
+Q:
+ br i1 %a, label %N, label %M
+N: ; preds = %Q
+ br label %M
+M: ; preds = %N, %Q
+ ; It's ok to merge N and M because the incoming values for W are the
+ ; same for both cases...
+ %W = phi i32 [ 2, %N ], [ 2, %Q ] ; <i32> [#uses=1]
+ %R = add i32 %W, 1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
diff --git a/test/Transforms/SimplifyCFG/HoistCode.ll b/test/Transforms/SimplifyCFG/HoistCode.ll
new file mode 100644
index 0000000..9697e56
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/HoistCode.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+define void @foo(i1 %C, i32* %P) {
+ br i1 %C, label %T, label %F
+T: ; preds = %0
+ store i32 7, i32* %P
+ ret void
+F: ; preds = %0
+ store i32 7, i32* %P
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/MagicPointer.ll b/test/Transforms/SimplifyCFG/MagicPointer.ll
new file mode 100644
index 0000000..54e5b14
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/MagicPointer.ll
@@ -0,0 +1,76 @@
+; Test that simplifycfg can create switch instructions from constant pointers.
+;
+; RUN: opt < %s -simplifycfg -S | FileCheck %s
+
+; CHECK: switch i64 %magicptr
+; CHECK: i64 0, label
+; CHECK: i64 1, label
+; CHECK: i64 2, label
+; CHECK: i64 3, label
+; CHECK: i64 4, label
+; CHECK-NOT: br
+; CHECK: }
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.0.0"
+
[email protected] = private constant [5 x i8] c"null\00" ; <[5 x i8]*> [#uses=2]
[email protected] = private constant [4 x i8] c"one\00" ; <[4 x i8]*> [#uses=2]
[email protected] = private constant [4 x i8] c"two\00" ; <[4 x i8]*> [#uses=2]
[email protected] = private constant [5 x i8] c"four\00" ; <[5 x i8]*> [#uses=2]
+
+define void @f(i8* %x) nounwind ssp {
+entry:
+ %tobool = icmp eq i8* %x, null ; <i1> [#uses=1]
+ br i1 %tobool, label %if.then, label %if.else
+
+if.then: ; preds = %entry
+ %call = call i32 @puts(i8* getelementptr inbounds ([5 x i8]* @.str, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %if.end21
+
+if.else: ; preds = %entry
+ %cmp = icmp eq i8* %x, inttoptr (i64 1 to i8*) ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then2, label %if.else4
+
+if.then2: ; preds = %if.else
+ %call3 = call i32 @puts(i8* getelementptr inbounds ([4 x i8]* @.str1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %if.end20
+
+if.else4: ; preds = %if.else
+ %cmp6 = icmp eq i8* %x, inttoptr (i64 2 to i8*) ; <i1> [#uses=1]
+ br i1 %cmp6, label %if.then9, label %lor.lhs.false
+
+lor.lhs.false: ; preds = %if.else4
+ %cmp8 = icmp eq i8* %x, inttoptr (i64 3 to i8*) ; <i1> [#uses=1]
+ br i1 %cmp8, label %if.then9, label %if.else11
+
+if.then9: ; preds = %lor.lhs.false, %if.else4
+ %call10 = call i32 @puts(i8* getelementptr inbounds ([4 x i8]* @.str2, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %if.end19
+
+if.else11: ; preds = %lor.lhs.false
+ %cmp13 = icmp eq i8* %x, inttoptr (i64 4 to i8*) ; <i1> [#uses=1]
+ br i1 %cmp13, label %if.then14, label %if.else16
+
+if.then14: ; preds = %if.else11
+ %call15 = call i32 @puts(i8* getelementptr inbounds ([5 x i8]* @.str3, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
+ br label %if.end
+
+if.else16: ; preds = %if.else11
+ %call18 = call i32 @puts(i8* %x) nounwind ; <i32> [#uses=0]
+ br label %if.end
+
+if.end: ; preds = %if.else16, %if.then14
+ br label %if.end19
+
+if.end19: ; preds = %if.end, %if.then9
+ br label %if.end20
+
+if.end20: ; preds = %if.end19, %if.then2
+ br label %if.end21
+
+if.end21: ; preds = %if.end20, %if.then
+ ret void
+}
+
+declare i32 @puts(i8*)
diff --git a/test/Transforms/SimplifyCFG/PhiBlockMerge.ll b/test/Transforms/SimplifyCFG/PhiBlockMerge.ll
new file mode 100644
index 0000000..a648efd
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/PhiBlockMerge.ll
@@ -0,0 +1,22 @@
+; Test merging of blocks that only have PHI nodes in them
+;
+; RUN: opt < %s -simplifycfg -S | not grep N:
+;
+
+define i32 @test(i1 %a, i1 %b) {
+; <label>:0
+ br i1 %a, label %M, label %O
+O: ; preds = %0
+ br i1 %b, label %N, label %Q
+Q: ; preds = %O
+ br label %N
+N: ; preds = %Q, %O
+ ; This block should be foldable into M
+ %Wp = phi i32 [ 0, %O ], [ 1, %Q ] ; <i32> [#uses=1]
+ br label %M
+M: ; preds = %N, %0
+ %W = phi i32 [ %Wp, %N ], [ 2, %0 ] ; <i32> [#uses=1]
+ %R = add i32 %W, 1 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
diff --git a/test/Transforms/SimplifyCFG/PhiBlockMerge2.ll b/test/Transforms/SimplifyCFG/PhiBlockMerge2.ll
new file mode 100644
index 0000000..fb5d600
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/PhiBlockMerge2.ll
@@ -0,0 +1,27 @@
+; Test merging of blocks that only have PHI nodes in them. This tests the case
+; where the mergedinto block doesn't have any PHI nodes, and is in fact
+; dominated by the block-to-be-eliminated
+;
+; RUN: opt < %s -simplifycfg -S | not grep N:
+;
+
+declare i1 @foo()
+
+define i32 @test(i1 %a, i1 %b) {
+ %c = call i1 @foo()
+ br i1 %c, label %N, label %P
+P:
+ %d = call i1 @foo()
+ br i1 %d, label %N, label %Q
+Q:
+ br label %N
+N:
+ %W = phi i32 [0, %0], [1, %Q], [2, %P]
+ ; This block should be foldable into M
+ br label %M
+
+M:
+ %R = add i32 %W, 1
+ ret i32 %R
+}
+
diff --git a/test/Transforms/SimplifyCFG/PhiEliminate.ll b/test/Transforms/SimplifyCFG/PhiEliminate.ll
new file mode 100644
index 0000000..73cf466a
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/PhiEliminate.ll
@@ -0,0 +1,41 @@
+; Test a bunch of cases where the cfg simplification code should
+; be able to fold PHI nodes into computation in common cases. Folding the PHI
+; nodes away allows the branches to be eliminated, performing a simple form of
+; 'if conversion'.
+
+; RUN: opt < %s -simplifycfg -S > %t.xform
+; RUN: not grep phi %t.xform
+; RUN: grep ret %t.xform
+
+declare void @use(i1)
+
+declare void @use.upgrd.1(i32)
+
+define void @test2(i1 %c, i1 %d, i32 %V, i32 %V2) {
+; <label>:0
+ br i1 %d, label %X, label %F
+X: ; preds = %0
+ br i1 %c, label %T, label %F
+T: ; preds = %X
+ br label %F
+F: ; preds = %T, %X, %0
+ %B1 = phi i1 [ true, %0 ], [ false, %T ], [ false, %X ] ; <i1> [#uses=1]
+ %I7 = phi i32 [ %V, %0 ], [ %V2, %T ], [ %V2, %X ] ; <i32> [#uses=1]
+ call void @use( i1 %B1 )
+ call void @use.upgrd.1( i32 %I7 )
+ ret void
+}
+
+define void @test(i1 %c, i32 %V, i32 %V2) {
+; <label>:0
+ br i1 %c, label %T, label %F
+T: ; preds = %0
+ br label %F
+F: ; preds = %T, %0
+ %B1 = phi i1 [ true, %0 ], [ false, %T ] ; <i1> [#uses=1]
+ %I6 = phi i32 [ %V, %0 ], [ 0, %T ] ; <i32> [#uses=1]
+ call void @use( i1 %B1 )
+ call void @use.upgrd.1( i32 %I6 )
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/PhiEliminate2.ll b/test/Transforms/SimplifyCFG/PhiEliminate2.ll
new file mode 100644
index 0000000..c0f6781
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/PhiEliminate2.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+define i32 @test(i1 %C, i32 %V1, i32 %V2) {
+entry:
+ br i1 %C, label %then, label %Cont
+then: ; preds = %entry
+ %V3 = or i32 %V2, %V1 ; <i32> [#uses=1]
+ br label %Cont
+Cont: ; preds = %then, %entry
+ %V4 = phi i32 [ %V1, %entry ], [ %V3, %then ] ; <i32> [#uses=0]
+ call i32 @test( i1 false, i32 0, i32 0 ) ; <i32>:0 [#uses=0]
+ ret i32 %V1
+}
+
diff --git a/test/Transforms/SimplifyCFG/PhiNoEliminate.ll b/test/Transforms/SimplifyCFG/PhiNoEliminate.ll
new file mode 100644
index 0000000..e9902e0
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/PhiNoEliminate.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep select
+
+;; The PHI node in this example should not be turned into a select, as we are
+;; not able to ifcvt the entire block. As such, converting to a select just
+;; introduces inefficiency without saving copies.
+
+define i32 @bar(i1 %C) {
+entry:
+ br i1 %C, label %then, label %endif
+then: ; preds = %entry
+ %tmp.3 = call i32 @qux( ) ; <i32> [#uses=0]
+ br label %endif
+endif: ; preds = %then, %entry
+ %R = phi i32 [ 123, %entry ], [ 12312, %then ] ; <i32> [#uses=1]
+ ;; stuff to disable tail duplication
+ call i32 @qux( ) ; <i32>:0 [#uses=0]
+ call i32 @qux( ) ; <i32>:1 [#uses=0]
+ call i32 @qux( ) ; <i32>:2 [#uses=0]
+ call i32 @qux( ) ; <i32>:3 [#uses=0]
+ call i32 @qux( ) ; <i32>:4 [#uses=0]
+ call i32 @qux( ) ; <i32>:5 [#uses=0]
+ call i32 @qux( ) ; <i32>:6 [#uses=0]
+ ret i32 %R
+}
+
+declare i32 @qux()
diff --git a/test/Transforms/SimplifyCFG/SpeculativeExec.ll b/test/Transforms/SimplifyCFG/SpeculativeExec.ll
new file mode 100644
index 0000000..5cfc77c
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/SpeculativeExec.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -simplifycfg -S | grep select
+; RUN: opt < %s -simplifycfg -S | grep br | count 2
+
+define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind {
+entry:
+ %tmp1 = icmp eq i32 %b, 0
+ br i1 %tmp1, label %bb1, label %bb3
+
+bb1: ; preds = %entry
+ %tmp2 = icmp sgt i32 %c, 1
+ br i1 %tmp2, label %bb2, label %bb3
+
+bb2: ; preds = bb1
+ %tmp3 = add i32 %a, 1
+ br label %bb3
+
+bb3: ; preds = %bb2, %entry
+ %tmp4 = phi i32 [ %b, %entry ], [ %a, %bb1 ], [ %tmp3, %bb2 ]
+ %tmp5 = sub i32 %tmp4, 1
+ ret i32 %tmp5
+}
diff --git a/test/Transforms/SimplifyCFG/UncondBranchToReturn.ll b/test/Transforms/SimplifyCFG/UncondBranchToReturn.ll
new file mode 100644
index 0000000..bf9d953
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/UncondBranchToReturn.ll
@@ -0,0 +1,33 @@
+; The unify-function-exit-nodes pass often makes basic blocks that just contain
+; a PHI node and a return. Make sure the simplify cfg can straighten out this
+; important case. This is basically the most trivial form of tail-duplication.
+
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep {br label}
+
+define i32 @test(i1 %B, i32 %A, i32 %B.upgrd.1) {
+ br i1 %B, label %T, label %F
+T: ; preds = %0
+ br label %ret
+F: ; preds = %0
+ br label %ret
+ret: ; preds = %F, %T
+ %X = phi i32 [ %A, %F ], [ %B.upgrd.1, %T ] ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+
+; Make sure it's willing to move unconditional branches to return instructions
+; as well, even if the return block is shared and the source blocks are
+; non-empty.
+define i32 @test2(i1 %B, i32 %A, i32 %B.upgrd.2) {
+ br i1 %B, label %T, label %F
+T: ; preds = %0
+ call i32 @test( i1 true, i32 5, i32 8 ) ; <i32>:1 [#uses=0]
+ br label %ret
+F: ; preds = %0
+ call i32 @test( i1 true, i32 5, i32 8 ) ; <i32>:2 [#uses=0]
+ br label %ret
+ret: ; preds = %F, %T
+ ret i32 %A
+}
diff --git a/test/Transforms/SimplifyCFG/UnreachableEliminate.ll b/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
new file mode 100644
index 0000000..7133d98
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -simplifycfg -S | not grep unreachable
+
+define void @test1(i1 %C, i1* %BP) {
+ br i1 %C, label %T, label %F
+T: ; preds = %0
+ store i1 %C, i1* %BP
+ unreachable
+F: ; preds = %0
+ ret void
+}
+
+define void @test2() {
+ invoke void @test2( )
+ to label %N unwind label %U
+U: ; preds = %0
+ unreachable
+N: ; preds = %0
+ ret void
+}
+
+define i32 @test3(i32 %v) {
+ switch i32 %v, label %default [
+ i32 1, label %U
+ i32 2, label %T
+ ]
+default: ; preds = %0
+ ret i32 1
+U: ; preds = %0
+ unreachable
+T: ; preds = %0
+ ret i32 2
+}
+
diff --git a/test/Transforms/SimplifyCFG/basictest.ll b/test/Transforms/SimplifyCFG/basictest.ll
new file mode 100644
index 0000000..83a9fa7
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/basictest.ll
@@ -0,0 +1,59 @@
+; Test CFG simplify removal of branch instructions.
+;
+; RUN: opt < %s -simplifycfg -S | FileCheck %s
+
+define void @test1() {
+ br label %BB1
+BB1: ; preds = %0
+ ret void
+; CHECK: @test1
+; CHECK-NEXT: ret void
+}
+
+define void @test2() {
+ ret void
+BB1: ; No predecessors!
+ ret void
+; CHECK: @test2
+; CHECK-NEXT: ret void
+; CHECK-NEXT: }
+}
+
+define void @test3(i1 %T) {
+ br i1 %T, label %BB1, label %BB1
+BB1: ; preds = %0, %0
+ ret void
+; CHECK: @test3
+; CHECK-NEXT: ret void
+}
+
+
+define void @test4() {
+ br label %return
+return:
+ ret void
+; CHECK: @test4
+; CHECK-NEXT: ret void
+}
+@test4g = global i8* blockaddress(@test4, %return)
+
+
+; PR5795
+define void @test5(i32 %A) {
+ switch i32 %A, label %return [
+ i32 2, label %bb
+ i32 10, label %bb1
+ ]
+
+bb: ; preds = %entry
+ ret void
+
+bb1: ; preds = %entry
+ ret void
+
+return: ; preds = %entry
+ ret void
+; CHECK: @test5
+; CHECK-NEXT: bb:
+; CHECK-NEXT: ret void
+}
diff --git a/test/Transforms/SimplifyCFG/branch-branch-dbginfo.ll b/test/Transforms/SimplifyCFG/branch-branch-dbginfo.ll
new file mode 100644
index 0000000..761f0d5
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/branch-branch-dbginfo.ll
@@ -0,0 +1,70 @@
+; RUN: opt < %s -simplifycfg -S | grep {br i1} | count 1
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
+ %llvm.dbg.derivedtype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }* }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 393262, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 393233, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([7 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [7 x i8] c"cond.c\00", section "llvm.metadata" ; <[7 x i8]*> [#uses=1]
[email protected] = internal constant [5 x i8] c"/tmp\00", section "llvm.metadata" ; <[5 x i8]*> [#uses=1]
[email protected] = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5555) (LLVM build)\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected] = internal constant [4 x i8] c"foo\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 393252, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), { }* null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 393473, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), i8* getelementptr ([2 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=0]
[email protected] = internal constant [2 x i8] c"x\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 393473, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), i8* getelementptr ([2 x i8]* @.str7, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 4, { }* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=0]
[email protected] = internal constant [2 x i8] c"y\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.derivedtype.type { i32 393238, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([6 x i8]* @.str8, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 1, i64 0, i64 0, i64 0, i32 0, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype9 to { }*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1]
[email protected] = internal constant [6 x i8] c"uint1\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 393252, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 7 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
+
+define i32 @foo(i32 %x1, i1 zeroext %y2) nounwind {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp4 = icmp eq i32 %x1, 0 ; <i1> [#uses=1]
+ br i1 %tmp4, label %bb, label %bb14
+
+bb: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %y2, label %bb14, label %bb10
+
+bb7: ; preds = %bb
+ call void @llvm.dbg.stoppoint(i32 7, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp9 = call i32 @g1(i32 %x1) nounwind ; <i32> [#uses=1]
+ ret i32 %tmp9
+
+bb10: ; preds = %bb
+ call void @llvm.dbg.stoppoint(i32 8, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp12 = add i32 %x1, 1 ; <i32> [#uses=1]
+ %tmp13 = call i32 @g2(i32 %tmp12) nounwind ; <i32> [#uses=1]
+ ret i32 %tmp13
+
+bb14: ; preds = %entry
+ call void @llvm.dbg.stoppoint(i32 10, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp16 = call i32 @g1(i32 %x1) nounwind ; <i32> [#uses=1]
+ call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ ret i32 %tmp16
+}
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.declare({ }*, { }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare i32 @g1(i32)
+
+declare i32 @g2(i32)
+
+declare void @llvm.dbg.region.end({ }*) nounwind
diff --git a/test/Transforms/SimplifyCFG/branch-cond-merge.ll b/test/Transforms/SimplifyCFG/branch-cond-merge.ll
new file mode 100644
index 0000000..f73e01c
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/branch-cond-merge.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -simplifycfg -instcombine \
+; RUN: -simplifycfg -S | not grep call
+
+declare void @bar()
+
+define void @test(i32 %X, i32 %Y) {
+entry:
+ %tmp.2 = icmp ne i32 %X, %Y ; <i1> [#uses=1]
+ br i1 %tmp.2, label %shortcirc_next, label %UnifiedReturnBlock
+shortcirc_next: ; preds = %entry
+ %tmp.3 = icmp ne i32 %X, %Y ; <i1> [#uses=1]
+ br i1 %tmp.3, label %UnifiedReturnBlock, label %then
+then: ; preds = %shortcirc_next
+ call void @bar( )
+ ret void
+UnifiedReturnBlock: ; preds = %shortcirc_next, %entry
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/branch-cond-prop.ll b/test/Transforms/SimplifyCFG/branch-cond-prop.ll
new file mode 100644
index 0000000..448934e
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/branch-cond-prop.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -simplifycfg -S | not grep call
+
+declare void @bar()
+
+define void @test(i32 %X, i32 %Y) {
+entry:
+ %tmp.2 = icmp slt i32 %X, %Y ; <i1> [#uses=2]
+ br i1 %tmp.2, label %shortcirc_next, label %UnifiedReturnBlock
+shortcirc_next: ; preds = %entry
+ br i1 %tmp.2, label %UnifiedReturnBlock, label %then
+then: ; preds = %shortcirc_next
+ call void @bar( )
+ ret void
+UnifiedReturnBlock: ; preds = %shortcirc_next, %entry
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/branch-fold-test.ll b/test/Transforms/SimplifyCFG/branch-fold-test.ll
new file mode 100644
index 0000000..460f245
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/branch-fold-test.ll
@@ -0,0 +1,17 @@
+; This test ensures that the simplifycfg pass continues to constant fold
+; terminator instructions.
+
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+define i32 @test(i32 %A, i32 %B) {
+J:
+ %C = add i32 %A, 12 ; <i32> [#uses=2]
+ br i1 true, label %L, label %K
+L: ; preds = %J
+ %D = add i32 %C, %B ; <i32> [#uses=1]
+ ret i32 %D
+K: ; preds = %J
+ %E = add i32 %C, %B ; <i32> [#uses=1]
+ ret i32 %E
+}
+
diff --git a/test/Transforms/SimplifyCFG/branch-fold.ll b/test/Transforms/SimplifyCFG/branch-fold.ll
new file mode 100644
index 0000000..266609b5
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/branch-fold.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -simplifycfg -S | grep {br i1} | count 1
+
+define void @test(i32* %P, i32* %Q, i1 %A, i1 %B) {
+ br i1 %A, label %a, label %b
+a: ; preds = %0
+ br i1 %B, label %b, label %c
+b: ; preds = %a, %0
+ store i32 123, i32* %P
+ ret void
+c: ; preds = %a
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/branch-phi-thread.ll b/test/Transforms/SimplifyCFG/branch-phi-thread.ll
new file mode 100644
index 0000000..f52d979
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/branch-phi-thread.ll
@@ -0,0 +1,66 @@
+; RUN: opt < %s -simplifycfg -adce -S | \
+; RUN: not grep {call void @f1}
+; END.
+
+declare void @f1()
+
+declare void @f2()
+
+declare void @f3()
+
+declare void @f4()
+
+define i32 @test1(i32 %X, i1 %D) {
+E:
+ %C = icmp eq i32 %X, 0 ; <i1> [#uses=2]
+ br i1 %C, label %T, label %F
+T: ; preds = %A, %E
+ br i1 %C, label %B, label %A
+A: ; preds = %T
+ call void @f1( )
+ br i1 %D, label %T, label %F
+B: ; preds = %T
+ call void @f2( )
+ ret i32 345
+F: ; preds = %A, %E
+ call void @f3( )
+ ret i32 123
+}
+
+define i32 @test2(i32 %X, i1 %D) {
+E:
+ %C = icmp eq i32 %X, 0 ; <i1> [#uses=2]
+ br i1 %C, label %T, label %F
+T: ; preds = %A, %E
+ %P = phi i1 [ true, %E ], [ %C, %A ] ; <i1> [#uses=1]
+ br i1 %P, label %B, label %A
+A: ; preds = %T
+ call void @f1( )
+ br i1 %D, label %T, label %F
+B: ; preds = %T
+ call void @f2( )
+ ret i32 345
+F: ; preds = %A, %E
+ call void @f3( )
+ ret i32 123
+}
+
+define i32 @test3(i32 %X, i1 %D, i32* %AP, i32* %BP) {
+E:
+ %C = icmp eq i32 %X, 0 ; <i1> [#uses=2]
+ br i1 %C, label %T, label %F
+T: ; preds = %A, %E
+ call void @f3( )
+ %XX = load i32* %AP ; <i32> [#uses=1]
+ store i32 %XX, i32* %BP
+ br i1 %C, label %B, label %A
+A: ; preds = %T
+ call void @f1( )
+ br i1 %D, label %T, label %F
+B: ; preds = %T
+ call void @f2( )
+ ret i32 345
+F: ; preds = %A, %E
+ call void @f3( )
+ ret i32 123
+}
diff --git a/test/Transforms/SimplifyCFG/branch_fold_dbg.ll b/test/Transforms/SimplifyCFG/branch_fold_dbg.ll
new file mode 100644
index 0000000..6a500de
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/branch_fold_dbg.ll
@@ -0,0 +1,122 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+; END.
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
+
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+
+define void @main() {
+entry:
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.14.i19 = icmp eq i32 0, 2 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.14.i19, label %endif.1.i20, label %read_min.exit
+endif.1.i20: ; preds = %entry
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.9.i.i = icmp eq i8* null, null ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.9.i.i, label %then.i12.i, label %then.i.i
+then.i.i: ; preds = %endif.1.i20
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+then.i12.i: ; preds = %endif.1.i20
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.9.i4.i = icmp eq i8* null, null ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.9.i4.i, label %endif.2.i33, label %then.i5.i
+then.i5.i: ; preds = %then.i12.i
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+endif.2.i33: ; preds = %then.i12.i
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %loopexit.0.i40, label %no_exit.0.i35
+no_exit.0.i35: ; preds = %no_exit.0.i35, %endif.2.i33
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.130.i = icmp slt i32 0, 0 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.130.i, label %loopexit.0.i40.loopexit, label %no_exit.0.i35
+loopexit.0.i40.loopexit: ; preds = %no_exit.0.i35
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %loopexit.0.i40
+loopexit.0.i40: ; preds = %loopexit.0.i40.loopexit, %endif.2.i33
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.341.i = icmp eq i32 0, 0 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.341.i, label %loopentry.1.i, label %read_min.exit
+loopentry.1.i: ; preds = %loopexit.0.i40
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.347.i = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.347.i, label %no_exit.1.i41, label %loopexit.2.i44
+no_exit.1.i41: ; preds = %endif.5.i, %loopentry.1.i
+ %indvar.i42 = phi i32 [ %indvar.next.i, %endif.5.i ], [ 0, %loopentry.1.i ] ; <i32> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.355.i = icmp eq i32 0, 3 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.355.i, label %endif.5.i, label %read_min.exit
+endif.5.i: ; preds = %no_exit.1.i41
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.34773.i = icmp sgt i32 0, 0 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %indvar.next.i = add i32 %indvar.i42, 1 ; <i32> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.34773.i, label %no_exit.1.i41, label %loopexit.1.i.loopexit
+loopexit.1.i.loopexit: ; preds = %endif.5.i
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+loopexit.2.i44: ; preds = %loopentry.1.i
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+read_min.exit: ; preds = %no_exit.1.i41, %loopexit.0.i40, %entry
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.23 = icmp eq i32 0, 0 ; <i1> [#uses=1]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 %tmp.23, label %endif.1, label %then.1
+then.1: ; preds = %read_min.exit
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %endif.0.i, label %then.0.i
+then.0.i: ; preds = %then.1
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %endif.1.i, label %then.1.i
+endif.0.i: ; preds = %then.1
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %endif.1.i, label %then.1.i
+then.1.i: ; preds = %endif.0.i, %then.0.i
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %getfree.exit, label %then.2.i
+endif.1.i: ; preds = %endif.0.i, %then.0.i
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %getfree.exit, label %then.2.i
+then.2.i: ; preds = %endif.1.i, %then.1.i
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+getfree.exit: ; preds = %endif.1.i, %then.1.i
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+endif.1: ; preds = %read_min.exit
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.27.i = getelementptr i32* null, i32 0 ; <i32*> [#uses=0]
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %loopexit.0.i15, label %no_exit.0.i14
+no_exit.0.i14: ; preds = %endif.1
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+loopexit.0.i15: ; preds = %endif.1
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %primal_start_artificial.exit, label %no_exit.1.i16
+no_exit.1.i16: ; preds = %no_exit.1.i16, %loopexit.0.i15
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br i1 false, label %primal_start_artificial.exit, label %no_exit.1.i16
+primal_start_artificial.exit: ; preds = %no_exit.1.i16, %loopexit.0.i15
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/dbginfo.ll b/test/Transforms/SimplifyCFG/dbginfo.ll
new file mode 100644
index 0000000..1a9f20a
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/dbginfo.ll
@@ -0,0 +1,71 @@
+; RUN: opt < %s -simplifycfg -S | not grep "br label"
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+ %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }* }
+ %llvm.dbg.derivedtype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }* }
+ %llvm.dbg.global_variable.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1, { }* }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.subrange.type = type { i32, i64, i64 }
+ %struct.Group = type { %struct.Scene, %struct.Sphere, %"struct.std::list<Scene*,std::allocator<Scene*> >" }
+ %struct.Ray = type { %struct.Vec, %struct.Vec }
+ %struct.Scene = type { i32 (...)** }
+ %struct.Sphere = type { %struct.Scene, %struct.Vec, double }
+ %struct.Vec = type { double, double, double }
+ %struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo }
+ %struct.__false_type = type <{ i8 }>
+ %"struct.__gnu_cxx::new_allocator<Scene*>" = type <{ i8 }>
+ %"struct.__gnu_cxx::new_allocator<std::_List_node<Scene*> >" = type <{ i8 }>
+ %struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, %"struct.std::type_info"* }
+ %struct.__type_info_pseudo = type { i8*, i8* }
+ %"struct.std::Hit" = type { double, %struct.Vec }
+ %"struct.std::_List_base<Scene*,std::allocator<Scene*> >" = type { %"struct.std::_List_base<Scene*,std::allocator<Scene*> >::_List_impl" }
+ %"struct.std::_List_base<Scene*,std::allocator<Scene*> >::_List_impl" = type { %"struct.std::_List_node_base" }
+ %"struct.std::_List_const_iterator<Scene*>" = type { %"struct.std::_List_node_base"* }
+ %"struct.std::_List_iterator<Scene*>" = type { %"struct.std::_List_node_base"* }
+ %"struct.std::_List_node<Scene*>" = type { %"struct.std::_List_node_base", %struct.Scene* }
+ %"struct.std::_List_node_base" = type { %"struct.std::_List_node_base"*, %"struct.std::_List_node_base"* }
+ %"struct.std::allocator<Scene*>" = type <{ i8 }>
+ %"struct.std::allocator<std::_List_node<Scene*> >" = type <{ i8 }>
+ %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
+ %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+ %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+ %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 }
+ %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+ %"struct.std::ios_base::Init" = type <{ i8 }>
+ %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+ %"struct.std::ios_base::_Words" = type { i8*, i32 }
+ %"struct.std::list<Scene*,std::allocator<Scene*> >" = type { %"struct.std::_List_base<Scene*,std::allocator<Scene*> >" }
+ %"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+ %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** }
+ %"struct.std::locale::facet" = type { i32 (...)**, i32 }
+ %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+ %"struct.std::num_put<char,std::ostreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+ %"struct.std::numeric_limits<double>" = type <{ i8 }>
+ %"struct.std::type_info" = type { i32 (...)**, i8* }
[email protected] = external constant %llvm.dbg.subprogram.type ; <%llvm.dbg.subprogram.type*> [#uses=1]
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind
+
+declare void @_ZN9__gnu_cxx13new_allocatorIP5SceneED2Ev(%struct.__false_type*) nounwind
+
+define void @_ZNSaIP5SceneED1Ev(%struct.__false_type* %this) nounwind {
+entry:
+ %this_addr = alloca %struct.__false_type* ; <%struct.__false_type**> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram947 to { }*))
+ store %struct.__false_type* %this, %struct.__false_type** %this_addr
+ %0 = load %struct.__false_type** %this_addr, align 4 ; <%struct.__false_type*> [#uses=1]
+ call void @_ZN9__gnu_cxx13new_allocatorIP5SceneED2Ev(%struct.__false_type* %0) nounwind
+ br label %bb
+
+bb: ; preds = %entry
+ br label %return
+
+return: ; preds = %bb
+ call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram947 to { }*))
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/dg.exp b/test/Transforms/SimplifyCFG/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/SimplifyCFG/duplicate-phis.ll b/test/Transforms/SimplifyCFG/duplicate-phis.ll
new file mode 100644
index 0000000..5129f9fb
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/duplicate-phis.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -instcombine -simplifycfg -S | grep { = phi } | count 1
+
+; instcombine should sort the PHI operands so that simplifycfg can see the
+; duplicate and remove it.
+
+define i32 @foo(i1 %t) {
+entry:
+ call void @bar()
+ br i1 %t, label %true, label %false
+true:
+ call void @bar()
+ br label %false
+false:
+ %a = phi i32 [ 2, %true ], [ 5, %entry ]
+ %b = phi i32 [ 5, %entry ], [ 2, %true ]
+ call void @bar()
+ %c = add i32 %a, %b
+ ret i32 %c
+}
+
+declare void @bar()
diff --git a/test/Transforms/SimplifyCFG/hoist-common-code.dbg.ll b/test/Transforms/SimplifyCFG/hoist-common-code.dbg.ll
new file mode 100644
index 0000000..6fbbb1b
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/hoist-common-code.dbg.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
+
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare void @bar(i32)
+
+define void @test(i1 %P, i32* %Q) {
+ br i1 %P, label %T, label %F
+T: ; preds = %0
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ store i32 1, i32* %Q
+ %A = load i32* %Q ; <i32> [#uses=1]
+ call void @bar( i32 %A )
+ ret void
+F: ; preds = %0
+ store i32 1, i32* %Q
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %B = load i32* %Q ; <i32> [#uses=1]
+ call void @bar( i32 %B )
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/hoist-common-code.ll b/test/Transforms/SimplifyCFG/hoist-common-code.ll
new file mode 100644
index 0000000..5c83e2a
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/hoist-common-code.ll
@@ -0,0 +1,18 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+declare void @bar(i32)
+
+define void @test(i1 %P, i32* %Q) {
+ br i1 %P, label %T, label %F
+T: ; preds = %0
+ store i32 1, i32* %Q
+ %A = load i32* %Q ; <i32> [#uses=1]
+ call void @bar( i32 %A )
+ ret void
+F: ; preds = %0
+ store i32 1, i32* %Q
+ %B = load i32* %Q ; <i32> [#uses=1]
+ call void @bar( i32 %B )
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/invoke_unwind.ll b/test/Transforms/SimplifyCFG/invoke_unwind.ll
new file mode 100644
index 0000000..bbd779b
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/invoke_unwind.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -simplifycfg -S | FileCheck %s
+
+declare void @bar()
+
+; This testcase checks to see if the simplifycfg pass is converting invoke
+; instructions to call instructions if the handler just rethrows the exception.
+define i32 @test1() {
+; CHECK: @test1
+; CHECK-NEXT: call void @bar()
+; CHECK-NEXT: ret i32 0
+ invoke void @bar( )
+ to label %Ok unwind label %Rethrow
+Ok: ; preds = %0
+ ret i32 0
+Rethrow: ; preds = %0
+ unwind
+}
+
+
+; Verify that simplifycfg isn't duplicating 'unwind' instructions. Doing this
+; is bad because it discourages commoning.
+define i32 @test2(i1 %c) {
+; CHECK: @test2
+; CHECK: T:
+; CHECK-NEXT: call void @bar()
+; CHECK-NEXT: br label %F
+ br i1 %c, label %T, label %F
+T:
+ call void @bar()
+ br label %F
+F:
+ unwind
+}
diff --git a/test/Transforms/SimplifyCFG/iterative-simplify.ll b/test/Transforms/SimplifyCFG/iterative-simplify.ll
new file mode 100644
index 0000000..a397411
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/iterative-simplify.ll
@@ -0,0 +1,100 @@
+; RUN: opt < %s -simplifycfg -S | not grep bb17
+; PR1786
+
+define i32 @main() {
+entry:
+ %retval = alloca i32, align 4 ; <i32*> [#uses=1]
+ %i = alloca i32, align 4 ; <i32*> [#uses=7]
+ %z = alloca i32, align 4 ; <i32*> [#uses=4]
+ %z16 = alloca i32, align 4 ; <i32*> [#uses=4]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i32 0, i32* %i
+ %toBool = icmp ne i8 1, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ store i32 0, i32* %z
+ br label %bb
+
+bb: ; preds = %cond_next, %cond_true
+ %tmp = load i32* %z ; <i32> [#uses=1]
+ %tmp1 = sub i32 %tmp, 16384 ; <i32> [#uses=1]
+ store i32 %tmp1, i32* %z
+ %tmp2 = load i32* %i ; <i32> [#uses=1]
+ %tmp3 = add i32 %tmp2, 1 ; <i32> [#uses=1]
+ store i32 %tmp3, i32* %i
+ %tmp4 = load i32* %i ; <i32> [#uses=1]
+ %tmp5 = icmp sgt i32 %tmp4, 262144 ; <i1> [#uses=1]
+ %tmp56 = zext i1 %tmp5 to i8 ; <i8> [#uses=1]
+ %toBool7 = icmp ne i8 %tmp56, 0 ; <i1> [#uses=1]
+ br i1 %toBool7, label %cond_true8, label %cond_next
+
+cond_true8: ; preds = %bb
+ call void @abort( )
+ unreachable
+
+cond_next: ; preds = %bb
+ %tmp9 = load i32* %z ; <i32> [#uses=1]
+ %tmp10 = icmp ne i32 %tmp9, 0 ; <i1> [#uses=1]
+ %tmp1011 = zext i1 %tmp10 to i8 ; <i8> [#uses=1]
+ %toBool12 = icmp ne i8 %tmp1011, 0 ; <i1> [#uses=1]
+ br i1 %toBool12, label %bb, label %bb13
+
+bb13: ; preds = %cond_next
+ call void @exit( i32 0 )
+ unreachable
+
+cond_false: ; preds = %entry
+ %toBool14 = icmp ne i8 1, 0 ; <i1> [#uses=1]
+ br i1 %toBool14, label %cond_true15, label %cond_false33
+
+cond_true15: ; preds = %cond_false
+ store i32 0, i32* %z16
+ br label %bb17
+
+bb17: ; preds = %cond_next27, %cond_true15
+ %tmp18 = load i32* %z16 ; <i32> [#uses=1]
+ %tmp19 = sub i32 %tmp18, 16384 ; <i32> [#uses=1]
+ store i32 %tmp19, i32* %z16
+ %tmp20 = load i32* %i ; <i32> [#uses=1]
+ %tmp21 = add i32 %tmp20, 1 ; <i32> [#uses=1]
+ store i32 %tmp21, i32* %i
+ %tmp22 = load i32* %i ; <i32> [#uses=1]
+ %tmp23 = icmp sgt i32 %tmp22, 262144 ; <i1> [#uses=1]
+ %tmp2324 = zext i1 %tmp23 to i8 ; <i8> [#uses=1]
+ %toBool25 = icmp ne i8 %tmp2324, 0 ; <i1> [#uses=1]
+ br i1 %toBool25, label %cond_true26, label %cond_next27
+
+cond_true26: ; preds = %bb17
+ call void @abort( )
+ unreachable
+
+cond_next27: ; preds = %bb17
+ %tmp28 = load i32* %z16 ; <i32> [#uses=1]
+ %tmp29 = icmp ne i32 %tmp28, 0 ; <i1> [#uses=1]
+ %tmp2930 = zext i1 %tmp29 to i8 ; <i8> [#uses=1]
+ %toBool31 = icmp ne i8 %tmp2930, 0 ; <i1> [#uses=1]
+ br i1 %toBool31, label %bb17, label %bb32
+
+bb32: ; preds = %cond_next27
+ call void @exit( i32 0 )
+ unreachable
+
+cond_false33: ; preds = %cond_false
+ call void @exit( i32 0 )
+ unreachable
+
+cond_next34: ; No predecessors!
+ br label %cond_next35
+
+cond_next35: ; preds = %cond_next34
+ br label %return
+
+return: ; preds = %cond_next35
+ %retval36 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval36
+}
+
+declare void @abort()
+
+declare void @exit(i32)
diff --git a/test/Transforms/SimplifyCFG/noreturn-call.ll b/test/Transforms/SimplifyCFG/noreturn-call.ll
new file mode 100644
index 0000000..b454778
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/noreturn-call.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -simplifycfg -S | grep unreachable
+; PR1796
+
+declare void @Finisher(i32) noreturn
+
+define void @YYY(i32) {
+ tail call void @Finisher(i32 %0) noreturn
+ tail call void @Finisher(i32 %0) noreturn
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/return-merge.ll b/test/Transforms/SimplifyCFG/return-merge.ll
new file mode 100644
index 0000000..977b6df
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/return-merge.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+define i32 @test1(i1 %C) {
+entry:
+ br i1 %C, label %T, label %F
+T: ; preds = %entry
+ ret i32 1
+F: ; preds = %entry
+ ret i32 0
+}
+
+define void @test2(i1 %C) {
+ br i1 %C, label %T, label %F
+T: ; preds = %0
+ ret void
+F: ; preds = %0
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/switch-simplify-crash.ll b/test/Transforms/SimplifyCFG/switch-simplify-crash.ll
new file mode 100644
index 0000000..bbc0bd7
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/switch-simplify-crash.ll
@@ -0,0 +1,108 @@
+; RUN: opt < %s -simplifycfg -disable-output
+
+define void @NewExtractNames() {
+entry:
+ br i1 false, label %endif.0, label %then.0
+then.0: ; preds = %entry
+ br i1 false, label %shortcirc_next.i, label %shortcirc_done.i
+shortcirc_next.i: ; preds = %then.0
+ br label %shortcirc_done.i
+shortcirc_done.i: ; preds = %shortcirc_next.i, %then.0
+ br i1 false, label %then.0.i, label %else.0.i
+then.0.i: ; preds = %shortcirc_done.i
+ br label %NewBase.exit
+else.0.i: ; preds = %shortcirc_done.i
+ br i1 false, label %endif.0.i, label %else.1.i
+else.1.i: ; preds = %else.0.i
+ br i1 false, label %endif.0.i, label %else.2.i
+else.2.i: ; preds = %else.1.i
+ br label %NewBase.exit
+endif.0.i: ; preds = %else.1.i, %else.0.i
+ br label %NewBase.exit
+NewBase.exit: ; preds = %endif.0.i, %else.2.i, %then.0.i
+ br label %endif.0
+endif.0: ; preds = %NewBase.exit, %entry
+ %tmp.32.mask = and i32 0, 31 ; <i32> [#uses=1]
+ switch i32 %tmp.32.mask, label %label.9 [
+ i32 16, label %loopentry.2
+ i32 15, label %loopentry.2
+ i32 14, label %loopentry.2
+ i32 13, label %loopentry.2
+ i32 10, label %loopentry.2
+ i32 20, label %loopentry.1
+ i32 19, label %loopentry.1
+ i32 2, label %loopentry.0
+ i32 0, label %switchexit
+ ]
+loopentry.0: ; preds = %endif.1, %endif.0
+ br i1 false, label %no_exit.0, label %switchexit
+no_exit.0: ; preds = %loopentry.0
+ br i1 false, label %then.1, label %else.1
+then.1: ; preds = %no_exit.0
+ br label %endif.1
+else.1: ; preds = %no_exit.0
+ br i1 false, label %shortcirc_next.0, label %shortcirc_done.0
+shortcirc_next.0: ; preds = %else.1
+ br label %shortcirc_done.0
+shortcirc_done.0: ; preds = %shortcirc_next.0, %else.1
+ br i1 false, label %then.2, label %endif.2
+then.2: ; preds = %shortcirc_done.0
+ br label %endif.2
+endif.2: ; preds = %then.2, %shortcirc_done.0
+ br label %endif.1
+endif.1: ; preds = %endif.2, %then.1
+ br label %loopentry.0
+loopentry.1: ; preds = %endif.3, %endif.0, %endif.0
+ br i1 false, label %no_exit.1, label %switchexit
+no_exit.1: ; preds = %loopentry.1
+ br i1 false, label %then.3, label %else.2
+then.3: ; preds = %no_exit.1
+ br label %endif.3
+else.2: ; preds = %no_exit.1
+ br i1 false, label %shortcirc_next.1, label %shortcirc_done.1
+shortcirc_next.1: ; preds = %else.2
+ br label %shortcirc_done.1
+shortcirc_done.1: ; preds = %shortcirc_next.1, %else.2
+ br i1 false, label %then.4, label %endif.4
+then.4: ; preds = %shortcirc_done.1
+ br label %endif.4
+endif.4: ; preds = %then.4, %shortcirc_done.1
+ br label %endif.3
+endif.3: ; preds = %endif.4, %then.3
+ br label %loopentry.1
+loopentry.2: ; preds = %endif.5, %endif.0, %endif.0, %endif.0, %endif.0, %endif.0
+ %i.3 = phi i32 [ 0, %endif.5 ], [ 0, %endif.0 ], [ 0, %endif.0 ], [ 0, %endif.0 ], [ 0, %endif.0 ], [ 0, %endif.0 ] ; <i32> [#uses=1]
+ %tmp.158 = icmp slt i32 %i.3, 0 ; <i1> [#uses=1]
+ br i1 %tmp.158, label %no_exit.2, label %switchexit
+no_exit.2: ; preds = %loopentry.2
+ br i1 false, label %shortcirc_next.2, label %shortcirc_done.2
+shortcirc_next.2: ; preds = %no_exit.2
+ br label %shortcirc_done.2
+shortcirc_done.2: ; preds = %shortcirc_next.2, %no_exit.2
+ br i1 false, label %then.5, label %endif.5
+then.5: ; preds = %shortcirc_done.2
+ br label %endif.5
+endif.5: ; preds = %then.5, %shortcirc_done.2
+ br label %loopentry.2
+label.9: ; preds = %endif.0
+ br i1 false, label %then.6, label %endif.6
+then.6: ; preds = %label.9
+ br label %endif.6
+endif.6: ; preds = %then.6, %label.9
+ store i32 0, i32* null
+ br label %switchexit
+switchexit: ; preds = %endif.6, %loopentry.2, %loopentry.1, %loopentry.0, %endif.0
+ br i1 false, label %endif.7, label %then.7
+then.7: ; preds = %switchexit
+ br i1 false, label %shortcirc_next.3, label %shortcirc_done.3
+shortcirc_next.3: ; preds = %then.7
+ br label %shortcirc_done.3
+shortcirc_done.3: ; preds = %shortcirc_next.3, %then.7
+ br i1 false, label %then.8, label %endif.8
+then.8: ; preds = %shortcirc_done.3
+ br label %endif.8
+endif.8: ; preds = %then.8, %shortcirc_done.3
+ br label %endif.7
+endif.7: ; preds = %endif.8, %switchexit
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/switch_create.ll b/test/Transforms/SimplifyCFG/switch_create.ll
new file mode 100644
index 0000000..9b3aaf7
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/switch_create.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+declare void @foo1()
+
+declare void @foo2()
+
+define void @test1(i32 %V) {
+ %C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
+ %C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1]
+ %CN = or i1 %C1, %C2 ; <i1> [#uses=1]
+ br i1 %CN, label %T, label %F
+T: ; preds = %0
+ call void @foo1( )
+ ret void
+F: ; preds = %0
+ call void @foo2( )
+ ret void
+}
+
+define void @test2(i32 %V) {
+ %C1 = icmp ne i32 %V, 4 ; <i1> [#uses=1]
+ %C2 = icmp ne i32 %V, 17 ; <i1> [#uses=1]
+ %CN = and i1 %C1, %C2 ; <i1> [#uses=1]
+ br i1 %CN, label %T, label %F
+T: ; preds = %0
+ call void @foo1( )
+ ret void
+F: ; preds = %0
+ call void @foo2( )
+ ret void
+}
+
+define void @test3(i32 %V) {
+ %C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
+ br i1 %C1, label %T, label %N
+N: ; preds = %0
+ %C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1]
+ br i1 %C2, label %T, label %F
+T: ; preds = %N, %0
+ call void @foo1( )
+ ret void
+F: ; preds = %N
+ call void @foo2( )
+ ret void
+}
+
+
diff --git a/test/Transforms/SimplifyCFG/switch_formation.dbg.ll b/test/Transforms/SimplifyCFG/switch_formation.dbg.ll
new file mode 100644
index 0000000..f1c820e
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/switch_formation.dbg.ll
@@ -0,0 +1,48 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
+
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+define i1 @_ZN4llvm11SetCondInst7classofEPKNS_11InstructionE({ i32, i32 }* %I) {
+entry:
+ %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
+ %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6]
+ %tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1]
+ br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0
+shortcirc_next.0: ; preds = %entry
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1]
+ br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1
+shortcirc_next.1: ; preds = %shortcirc_next.0
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1]
+ br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2
+shortcirc_next.2: ; preds = %shortcirc_next.1
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1]
+ br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3
+shortcirc_next.3: ; preds = %shortcirc_next.2
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1]
+ br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4
+shortcirc_next.4: ; preds = %shortcirc_next.3
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1]
+ br label %UnifiedReturnBlock
+shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry
+ br label %UnifiedReturnBlock
+UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4
+ %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1]
+ ret i1 %UnifiedRetVal
+}
+
diff --git a/test/Transforms/SimplifyCFG/switch_formation.ll b/test/Transforms/SimplifyCFG/switch_formation.ll
new file mode 100644
index 0000000..787904a
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/switch_formation.ll
@@ -0,0 +1,30 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+define i1 @_ZN4llvm11SetCondInst7classofEPKNS_11InstructionE({ i32, i32 }* %I) {
+entry:
+ %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
+ %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6]
+ %tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1]
+ br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0
+shortcirc_next.0: ; preds = %entry
+ %tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1]
+ br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1
+shortcirc_next.1: ; preds = %shortcirc_next.0
+ %tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1]
+ br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2
+shortcirc_next.2: ; preds = %shortcirc_next.1
+ %tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1]
+ br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3
+shortcirc_next.3: ; preds = %shortcirc_next.2
+ %tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1]
+ br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4
+shortcirc_next.4: ; preds = %shortcirc_next.3
+ %tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1]
+ br label %UnifiedReturnBlock
+shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry
+ br label %UnifiedReturnBlock
+UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4
+ %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1]
+ ret i1 %UnifiedRetVal
+}
+
diff --git a/test/Transforms/SimplifyCFG/switch_switch_fold.ll b/test/Transforms/SimplifyCFG/switch_switch_fold.ll
new file mode 100644
index 0000000..2e2e310
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/switch_switch_fold.ll
@@ -0,0 +1,47 @@
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: grep switch | count 1
+
+; Test that a switch going to a switch on the same value can be merged. All
+; three switches in this example can be merged into one big one.
+
+declare void @foo1()
+
+declare void @foo2()
+
+declare void @foo3()
+
+declare void @foo4()
+
+define void @test1(i32 %V) {
+ switch i32 %V, label %F [
+ i32 4, label %T
+ i32 17, label %T
+ i32 5, label %T
+ i32 1234, label %F
+ ]
+T: ; preds = %0, %0, %0
+ switch i32 %V, label %F [
+ i32 4, label %A
+ i32 17, label %B
+ i32 42, label %C
+ ]
+A: ; preds = %T
+ call void @foo1( )
+ ret void
+B: ; preds = %F, %F, %T
+ call void @foo2( )
+ ret void
+C: ; preds = %T
+ call void @foo3( )
+ ret void
+F: ; preds = %F, %T, %0, %0
+ switch i32 %V, label %F [
+ i32 4, label %B
+ i32 18, label %B
+ i32 42, label %D
+ ]
+D: ; preds = %F
+ call void @foo4( )
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/switch_switch_fold_dbginfo.ll b/test/Transforms/SimplifyCFG/switch_switch_fold_dbginfo.ll
new file mode 100644
index 0000000..7d7391a
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/switch_switch_fold_dbginfo.ll
@@ -0,0 +1,116 @@
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: grep switch | count 1
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 }
+ %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }*, i32 }
+ %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [10 x i8] c"swithh2.c\00", section "llvm.metadata" ; <[10 x i8]*> [#uses=1]
[email protected] = internal constant [38 x i8] c"/developer/home2/zsth/test/debug/tmp/\00", section "llvm.metadata" ; <[38 x i8]*> [#uses=1]
[email protected] = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5641) (LLVM build)\00", section "llvm.metadata" ; <[52 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([10 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([38 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 -1 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.basictype.type { i32 458788, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1]
[email protected] = internal constant [2 x { }*] [{ }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*)], section "llvm.metadata" ; <[2 x { }*]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.composite.type { i32 458773, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 0, i64 0, i64 0, i32 0, { }* null, { }* bitcast ([2 x { }*]* @llvm.dbg.array to { }*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1]
[email protected] = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1]
[email protected] = internal constant [4 x i8] c"foo\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.subprogram.type { i32 458798, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 1, { }* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite to { }*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1]
[email protected] = internal constant [2 x i8] c"x\00", section "llvm.metadata" ; <[2 x i8]*> [#uses=1]
[email protected] = internal constant %llvm.dbg.variable.type { i32 459009, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), i8* getelementptr ([2 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 1, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=0]
+
+define i32 @foo(i32 %x) nounwind {
+entry:
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ call void @llvm.dbg.stoppoint(i32 2, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ switch i32 %x, label %bb4 [
+ i32 1, label %bb
+ i32 2, label %bb1
+ i32 3, label %bb2
+ i32 4, label %bb3
+ ]
+ ; No predecessors!
+ call void @llvm.dbg.stoppoint(i32 2, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb
+
+bb: ; preds = %0, %entry
+ call void @llvm.dbg.stoppoint(i32 3, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb8
+ ; No predecessors!
+ call void @llvm.dbg.stoppoint(i32 3, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb1
+
+bb1: ; preds = %1, %entry
+ call void @llvm.dbg.stoppoint(i32 4, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb8
+ ; No predecessors!
+ call void @llvm.dbg.stoppoint(i32 4, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb2
+
+bb2: ; preds = %2, %entry
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb8
+ ; No predecessors!
+ call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb3
+
+bb3: ; preds = %3, %entry
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb8
+ ; No predecessors!
+ call void @llvm.dbg.stoppoint(i32 6, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb4
+
+bb4: ; preds = %4, %entry
+ call void @llvm.dbg.stoppoint(i32 10, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ switch i32 %x, label %bb7 [
+ i32 5, label %bb5
+ i32 6, label %bb6
+ ]
+ ; No predecessors!
+ call void @llvm.dbg.stoppoint(i32 10, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb5
+
+bb5: ; preds = %5, %bb4
+ call void @llvm.dbg.stoppoint(i32 11, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb8
+ ; No predecessors!
+ call void @llvm.dbg.stoppoint(i32 11, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb6
+
+bb6: ; preds = %6, %bb4
+ call void @llvm.dbg.stoppoint(i32 12, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb8
+ ; No predecessors!
+ call void @llvm.dbg.stoppoint(i32 12, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb7
+
+bb7: ; preds = %7, %bb4
+ call void @llvm.dbg.stoppoint(i32 13, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %bb8
+
+bb8: ; preds = %bb7, %bb6, %bb5, %bb3, %bb2, %bb1, %bb
+ %.0 = phi i32 [ 4, %bb3 ], [ 3, %bb2 ], [ 2, %bb1 ], [ 1, %bb ], [ 6, %bb6 ], [ 5, %bb5 ], [ 0, %bb7 ] ; <i32> [#uses=1]
+ call void @llvm.dbg.stoppoint(i32 13, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ br label %return
+
+return: ; preds = %bb8
+ call void @llvm.dbg.stoppoint(i32 13, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+ ret i32 %.0
+}
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.declare({ }*, { }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind
diff --git a/test/Transforms/SimplifyCFG/switch_thread.ll b/test/Transforms/SimplifyCFG/switch_thread.ll
new file mode 100644
index 0000000..bd85fcc
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/switch_thread.ll
@@ -0,0 +1,79 @@
+; RUN: opt < %s -simplifycfg -S | \
+; RUN: not grep {call void @DEAD}
+
+; Test that we can thread a simple known condition through switch statements.
+
+declare void @foo1()
+
+declare void @foo2()
+
+declare void @DEAD()
+
+define void @test1(i32 %V) {
+ switch i32 %V, label %A [
+ i32 4, label %T
+ i32 17, label %Done
+ i32 1234, label %A
+ ]
+;; V == 4 if we get here.
+T: ; preds = %0
+ call void @foo1( )
+ ;; This switch is always statically determined.
+ switch i32 %V, label %A2 [
+ i32 4, label %B
+ i32 17, label %C
+ i32 42, label %C
+ ]
+A2: ; preds = %T
+ call void @DEAD( )
+ call void @DEAD( )
+ ;; always true
+ %cond2 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
+ br i1 %cond2, label %Done, label %C
+A: ; preds = %0, %0
+ call void @foo1( )
+ ;; always true
+ %cond = icmp ne i32 %V, 4 ; <i1> [#uses=1]
+ br i1 %cond, label %Done, label %C
+Done: ; preds = %B, %A, %A2, %0
+ ret void
+B: ; preds = %T
+ call void @foo2( )
+ ;; always true
+ %cond3 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
+ br i1 %cond3, label %Done, label %C
+C: ; preds = %B, %A, %A2, %T, %T
+ call void @DEAD( )
+ ret void
+}
+
+define void @test2(i32 %V) {
+ switch i32 %V, label %A [
+ i32 4, label %T
+ i32 17, label %D
+ i32 1234, label %E
+ ]
+;; V != 4, 17, 1234 here.
+A: ; preds = %0
+ call void @foo1( )
+ ;; This switch is always statically determined.
+ switch i32 %V, label %E [
+ i32 4, label %C
+ i32 17, label %C
+ i32 42, label %D
+ ]
+;; unreacahble.
+C: ; preds = %A, %A
+ call void @DEAD( )
+ ret void
+T: ; preds = %0
+ call void @foo1( )
+ call void @foo1( )
+ ret void
+D: ; preds = %A, %0
+ call void @foo1( )
+ ret void
+E: ; preds = %A, %0
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll b/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll
new file mode 100644
index 0000000..0c9cc8b
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll
@@ -0,0 +1,19 @@
+; RUN: opt < %s -simplifycfg -S | grep {volatile load}
+; PR2967
+
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define void @foo(i32 %x) nounwind {
+entry:
+ %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %return
+
+bb: ; preds = %entry
+ %1 = volatile load i32* null ; <i32> [#uses=0]
+ unreachable
+ br label %return
+return: ; preds = %entry
+ ret void
+}
diff --git a/test/Transforms/SimplifyCFG/two-entry-phi-return.dbg.ll b/test/Transforms/SimplifyCFG/two-entry-phi-return.dbg.ll
new file mode 100644
index 0000000..01041eb
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/two-entry-phi-return.dbg.ll
@@ -0,0 +1,28 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+ %llvm.dbg.anchor.type = type { i32, i32 }
+ %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
+
[email protected]_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
+
[email protected] = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
[email protected] = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]
[email protected] = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 00)\00", section "llvm.metadata" ; <[55 x i8]*> [#uses=1]
[email protected]_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0), i1 true, i1 false, i8* null }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1]
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+define i1 @qux(i8* %m, i8* %n, i8* %o, i8* %p) nounwind {
+entry:
+ %tmp7 = icmp eq i8* %m, %n
+ br i1 %tmp7, label %bb, label %UnifiedReturnBlock
+
+bb:
+call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+ %tmp15 = icmp eq i8* %o, %p
+ br label %UnifiedReturnBlock
+
+UnifiedReturnBlock:
+ %result = phi i1 [ 0, %entry ], [ %tmp15, %bb ]
+ ret i1 %result
+}
diff --git a/test/Transforms/SimplifyCFG/two-entry-phi-return.ll b/test/Transforms/SimplifyCFG/two-entry-phi-return.ll
new file mode 100644
index 0000000..fb18624
--- /dev/null
+++ b/test/Transforms/SimplifyCFG/two-entry-phi-return.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -simplifycfg -S | not grep br
+
+define i1 @qux(i8* %m, i8* %n, i8* %o, i8* %p) nounwind {
+entry:
+ %tmp7 = icmp eq i8* %m, %n
+ br i1 %tmp7, label %bb, label %UnifiedReturnBlock
+
+bb:
+ %tmp15 = icmp eq i8* %o, %p
+ br label %UnifiedReturnBlock
+
+UnifiedReturnBlock:
+ %result = phi i1 [ 0, %entry ], [ %tmp15, %bb ]
+ ret i1 %result
+}
diff --git a/test/Transforms/SimplifyLibCalls/2005-05-20-sprintf-crash.ll b/test/Transforms/SimplifyLibCalls/2005-05-20-sprintf-crash.ll
new file mode 100644
index 0000000..8816579
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2005-05-20-sprintf-crash.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -simplify-libcalls -disable-output
+
+@G = constant [3 x i8] c"%s\00" ; <[3 x i8]*> [#uses=1]
+
+declare i32 @sprintf(i8*, i8*, ...)
+
+define void @foo(i8* %P, i32* %X) {
+ call i32 (i8*, i8*, ...)* @sprintf( i8* %P, i8* getelementptr ([3 x i8]* @G, i32 0, i32 0), i32* %X ) ; <i32>:1 [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/2007-04-06-strchr-miscompile.ll b/test/Transforms/SimplifyLibCalls/2007-04-06-strchr-miscompile.ll
new file mode 100644
index 0000000..8e9f206
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2007-04-06-strchr-miscompile.ll
@@ -0,0 +1,29 @@
+; PR1307
+; RUN: opt < %s -simplify-libcalls -instcombine -S > %t
+; RUN: grep {@str,.*i64 3} %t
+; RUN: grep {@str1,.*i64 7} %t
+; RUN: grep {ret i8.*null} %t
+; END.
+
+@str = internal constant [5 x i8] c"foog\00"
+@str1 = internal constant [8 x i8] c"blahhh!\00"
+@str2 = internal constant [5 x i8] c"Ponk\00"
+
+define i8* @test1() {
+ %tmp3 = tail call i8* @strchr( i8* getelementptr ([5 x i8]* @str, i32 0, i32 2), i32 103 ) ; <i8*> [#uses=1]
+ ret i8* %tmp3
+}
+
+declare i8* @strchr(i8*, i32)
+
+define i8* @test2() {
+ %tmp3 = tail call i8* @strchr( i8* getelementptr ([8 x i8]* @str1, i32 0, i32 2), i32 0 ) ; <i8*> [#uses=1]
+ ret i8* %tmp3
+}
+
+define i8* @test3() {
+entry:
+ %tmp3 = tail call i8* @strchr( i8* getelementptr ([5 x i8]* @str2, i32 0, i32 1), i32 80 ) ; <i8*> [#uses=1]
+ ret i8* %tmp3
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/2008-05-19-memcmp.ll b/test/Transforms/SimplifyLibCalls/2008-05-19-memcmp.ll
new file mode 100644
index 0000000..b687432
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2008-05-19-memcmp.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -simplify-libcalls -S | grep i32
+; PR2341
+
+@_2E_str = external constant [5 x i8] ; <[5 x i8]*> [#uses=1]
+
+declare i32 @memcmp(i8*, i8*, i32) nounwind readonly
+
+define i1 @f(i8** %start_addr) {
+entry:
+ %tmp4 = load i8** %start_addr, align 4 ; <i8*> [#uses=1]
+ %tmp5 = call i32 @memcmp( i8* %tmp4, i8* getelementptr ([5 x i8]* @_2E_str, i32 0, i32 0), i32 4 ) nounwind readonly ; <i32> [#uses=1]
+ %tmp6 = icmp eq i32 %tmp5, 0 ; <i1> [#uses=1]
+ ret i1 %tmp6
+}
diff --git a/test/Transforms/SimplifyLibCalls/2009-01-04-Annotate.ll b/test/Transforms/SimplifyLibCalls/2009-01-04-Annotate.ll
new file mode 100644
index 0000000..73eb05b
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2009-01-04-Annotate.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -simplify-libcalls -S > %t
+; RUN: grep noalias %t | count 2
+; RUN: grep nocapture %t | count 3
+; RUN: grep nounwind %t | count 3
+; RUN: grep readonly %t | count 1
+
+declare i8* @fopen(i8*, i8*)
+declare i8 @strlen(i8*)
+declare i32* @realloc(i32*, i32)
+
+; Test deliberately wrong declaration
+declare i32 @strcpy(...)
diff --git a/test/Transforms/SimplifyLibCalls/2009-02-11-NotInitialized.ll b/test/Transforms/SimplifyLibCalls/2009-02-11-NotInitialized.ll
new file mode 100644
index 0000000..ac89199
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2009-02-11-NotInitialized.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -inline -simplify-libcalls -functionattrs | \
+; RUN: llvm-dis | grep nocapture | count 2
+; Check that nocapture attributes are added when run after an SCC pass.
+; PR3520
+
+define i32 @use(i8* %x) nounwind readonly {
+entry:
+ %0 = tail call i64 @strlen(i8* %x) nounwind readonly ; <i64> [#uses=1]
+ %1 = trunc i64 %0 to i32 ; <i32> [#uses=1]
+ ret i32 %1
+}
+
+declare i64 @strlen(i8*) nounwind readonly
diff --git a/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll b/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll
new file mode 100644
index 0000000..cb9819c
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -simplify-libcalls -S > %t
+; RUN: grep nocapture %t | count 2
+; RUN: grep null %t | grep nocapture | count 1
+; RUN: grep null %t | grep call | grep readonly | count 1
+
+; Test that we add nocapture to the declaration, and to the second call only.
+
+declare float @strtol(i8* %s, i8** %endptr, i32 %base)
+
+define void @foo(i8* %x, i8** %endptr) {
+ call float @strtol(i8* %x, i8** %endptr, i32 10)
+ call float @strtol(i8* %x, i8** null, i32 10)
+ ret void
+}
diff --git a/test/Transforms/SimplifyLibCalls/2009-05-30-memcmp-byte.ll b/test/Transforms/SimplifyLibCalls/2009-05-30-memcmp-byte.ll
new file mode 100644
index 0000000..9056499
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2009-05-30-memcmp-byte.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -simplify-libcalls -instcombine -S | grep {ret i32 -65}
+; PR4284
+
+define i32 @test() nounwind {
+entry:
+ %c0 = alloca i8, align 1 ; <i8*> [#uses=2]
+ %c2 = alloca i8, align 1 ; <i8*> [#uses=2]
+ store i8 64, i8* %c0
+ store i8 -127, i8* %c2
+ %call = call i32 @memcmp(i8* %c0, i8* %c2, i32 1) ; <i32> [#uses=1]
+ ret i32 %call
+}
+
+declare i32 @memcmp(i8*, i8*, i32)
diff --git a/test/Transforms/SimplifyLibCalls/2009-07-28-Exit.ll b/test/Transforms/SimplifyLibCalls/2009-07-28-Exit.ll
new file mode 100644
index 0000000..7af0a26
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2009-07-28-Exit.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -simplify-libcalls -disable-output
+; PR4641
+
+ %struct.__sFILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, i8*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64, %struct.pthread_mutex*, %struct.pthread*, i32, i32, %union.anon }
+ %struct.__sbuf = type { i8*, i32, [4 x i8] }
+ %struct.pthread = type opaque
+ %struct.pthread_mutex = type opaque
+ %union.anon = type { i64, [120 x i8] }
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=1]
[email protected] = external constant [2 x i8] ; <[2 x i8]*> [#uses=1]
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+ call void @exit(i32 0) nounwind
+ %cond392 = select i1 undef, i8* getelementptr ([2 x i8]* @.str13, i32 0, i32 0), i8* getelementptr ([2 x i8]* @.str14, i32 0, i32 0) ; <i8*> [#uses=1]
+ %call393 = call %struct.__sFILE* @fopen(i8* undef, i8* %cond392) nounwind ; <%struct.__sFILE*> [#uses=0]
+ unreachable
+}
+
+declare %struct.__sFILE* @fopen(i8*, i8*)
+
+declare void @exit(i32)
diff --git a/test/Transforms/SimplifyLibCalls/2009-07-29-Exit2.ll b/test/Transforms/SimplifyLibCalls/2009-07-29-Exit2.ll
new file mode 100644
index 0000000..b5a788e
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/2009-07-29-Exit2.ll
@@ -0,0 +1,24 @@
+; RUN: opt < %s -simplify-libcalls -disable-output
+; PR4645
+
+define i32 @main() {
+entry:
+ br label %if.then
+
+lor.lhs.false: ; preds = %while.body
+ br i1 undef, label %if.then, label %for.cond
+
+if.then: ; preds = %lor.lhs.false, %while.body
+ call void @exit(i32 1)
+ br label %for.cond
+
+for.cond: ; preds = %for.end, %if.then, %lor.lhs.false
+ %j.0 = phi i32 [ %inc47, %for.end ], [ 0, %if.then ], [ 0, %lor.lhs.false ] ; <i32> [#uses=1]
+ unreachable
+
+for.end: ; preds = %for.cond20
+ %inc47 = add i32 %j.0, 1 ; <i32> [#uses=1]
+ br label %for.cond
+}
+
+declare void @exit(i32)
diff --git a/test/Transforms/SimplifyLibCalls/FFS.ll b/test/Transforms/SimplifyLibCalls/FFS.ll
new file mode 100644
index 0000000..ab45f18
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/FFS.ll
@@ -0,0 +1,36 @@
+; Test that the ToAsciiOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*@ffs}
+
+@non_const = external global i32 ; <i32*> [#uses=1]
+
+declare i32 @ffs(i32)
+
+declare i32 @ffsl(i32)
+
+declare i32 @ffsll(i64)
+
+define i32 @main() {
+ %arg = load i32* @non_const ; <i32> [#uses=1]
+ %val0 = call i32 @ffs( i32 %arg ) ; <i32> [#uses=1]
+ %val1 = call i32 @ffs( i32 1 ) ; <i32> [#uses=1]
+ %val2 = call i32 @ffs( i32 2048 ) ; <i32> [#uses=1]
+ %val3 = call i32 @ffsl( i32 65536 ) ; <i32> [#uses=1]
+ %val4 = call i32 @ffsll( i64 1024 ) ; <i32> [#uses=1]
+ %val5 = call i32 @ffsll( i64 17179869184 ) ; <i32> [#uses=1]
+ %val6 = call i32 @ffsll( i64 1152921504606846976 ) ; <i32> [#uses=1]
+ %rslt1 = add i32 %val1, %val2 ; <i32> [#uses=1]
+ %rslt2 = add i32 %val3, %val4 ; <i32> [#uses=1]
+ %rslt3 = add i32 %val5, %val6 ; <i32> [#uses=1]
+ %rslt4 = add i32 %rslt1, %rslt2 ; <i32> [#uses=1]
+ %rslt5 = add i32 %rslt4, %rslt3 ; <i32> [#uses=2]
+ %rslt6 = add i32 %rslt5, %val0 ; <i32> [#uses=0]
+ ret i32 %rslt5
+}
+
+
+; PR4206
+define i32 @a(i64) nounwind {
+ %2 = call i32 @ffsll(i64 %0) ; <i32> [#uses=1]
+ ret i32 %2
+}
diff --git a/test/Transforms/SimplifyLibCalls/FPrintF.ll b/test/Transforms/SimplifyLibCalls/FPrintF.ll
new file mode 100644
index 0000000..4a0d232
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/FPrintF.ll
@@ -0,0 +1,28 @@
+; Test that the FPrintFOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*fprintf}
+
+; This transformation requires the pointer size, as it assumes that size_t is
+; the size of a pointer.
+target datalayout = "-p:64:64:64"
+
+ %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
+@str = constant [3 x i8] c"%s\00" ; <[3 x i8]*> [#uses=1]
+@chr = constant [3 x i8] c"%c\00" ; <[3 x i8]*> [#uses=1]
+@hello = constant [13 x i8] c"hello world\0A\00" ; <[13 x i8]*> [#uses=1]
+@stdout = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=3]
+
+declare i32 @fprintf(%struct._IO_FILE*, i8*, ...)
+
+define i32 @foo() {
+entry:
+ %tmp.1 = load %struct._IO_FILE** @stdout ; <%struct._IO_FILE*> [#uses=1]
+ %tmp.0 = call i32 (%struct._IO_FILE*, i8*, ...)* @fprintf( %struct._IO_FILE* %tmp.1, i8* getelementptr ([13 x i8]* @hello, i32 0, i32 0) ) ; <i32> [#uses=0]
+ %tmp.4 = load %struct._IO_FILE** @stdout ; <%struct._IO_FILE*> [#uses=1]
+ %tmp.3 = call i32 (%struct._IO_FILE*, i8*, ...)* @fprintf( %struct._IO_FILE* %tmp.4, i8* getelementptr ([3 x i8]* @str, i32 0, i32 0), i8* getelementptr ([13 x i8]* @hello, i32 0, i32 0) ) ; <i32> [#uses=0]
+ %tmp.8 = load %struct._IO_FILE** @stdout ; <%struct._IO_FILE*> [#uses=1]
+ %tmp.7 = call i32 (%struct._IO_FILE*, i8*, ...)* @fprintf( %struct._IO_FILE* %tmp.8, i8* getelementptr ([3 x i8]* @chr, i32 0, i32 0), i32 33 ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/IsDigit.ll b/test/Transforms/SimplifyLibCalls/IsDigit.ll
new file mode 100644
index 0000000..51a769d
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/IsDigit.ll
@@ -0,0 +1,21 @@
+; Test that the IsDigitOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep call
+
+declare i32 @isdigit(i32)
+
+declare i32 @isascii(i32)
+
+define i32 @main() {
+ %val1 = call i32 @isdigit( i32 47 ) ; <i32> [#uses=1]
+ %val2 = call i32 @isdigit( i32 48 ) ; <i32> [#uses=1]
+ %val3 = call i32 @isdigit( i32 57 ) ; <i32> [#uses=1]
+ %val4 = call i32 @isdigit( i32 58 ) ; <i32> [#uses=1]
+ %rslt1 = add i32 %val1, %val2 ; <i32> [#uses=1]
+ %rslt2 = add i32 %val3, %val4 ; <i32> [#uses=1]
+ %sum = add i32 %rslt1, %rslt2 ; <i32> [#uses=1]
+ %rslt = call i32 @isdigit( i32 %sum ) ; <i32> [#uses=1]
+ %tmp = call i32 @isascii( i32 %rslt ) ; <i32> [#uses=1]
+ ret i32 %tmp
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/MemCpy.ll b/test/Transforms/SimplifyLibCalls/MemCpy.ll
new file mode 100644
index 0000000..39662b1
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/MemCpy.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -constprop -instcombine -S | not grep {call.*llvm.memcpy.i32}
+
+@h = constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=1]
+@hel = constant [4 x i8] c"hel\00" ; <[4 x i8]*> [#uses=1]
+@hello_u = constant [8 x i8] c"hello_u\00" ; <[8 x i8]*> [#uses=1]
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+define i32 @main() {
+ %h_p = getelementptr [2 x i8]* @h, i32 0, i32 0 ; <i8*> [#uses=1]
+ %hel_p = getelementptr [4 x i8]* @hel, i32 0, i32 0 ; <i8*> [#uses=1]
+ %hello_u_p = getelementptr [8 x i8]* @hello_u, i32 0, i32 0 ; <i8*> [#uses=1]
+ %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
+ %target_p = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=3]
+ call void @llvm.memcpy.i32( i8* %target_p, i8* %h_p, i32 2, i32 2 )
+ call void @llvm.memcpy.i32( i8* %target_p, i8* %hel_p, i32 4, i32 4 )
+ call void @llvm.memcpy.i32( i8* %target_p, i8* %hello_u_p, i32 8, i32 8 )
+ ret i32 0
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/Printf.ll b/test/Transforms/SimplifyLibCalls/Printf.ll
new file mode 100644
index 0000000..858a09c
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/Printf.ll
@@ -0,0 +1,21 @@
+; RUN: opt < %s -simplify-libcalls -S | grep putchar
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*printf}
+
+@str = internal constant [13 x i8] c"hello world\0A\00" ; <[13 x i8]*> [#uses=1]
+@str1 = internal constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=1]
+
+define void @foo() {
+entry:
+ %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @str, i32 0, i32 0) ) ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
+
+define void @bar() {
+entry:
+ %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([2 x i8]* @str1, i32 0, i32 0) ) ; <i32> [#uses=0]
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/Puts.ll b/test/Transforms/SimplifyLibCalls/Puts.ll
new file mode 100644
index 0000000..47a33c2
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/Puts.ll
@@ -0,0 +1,29 @@
+; Test that the PutsCatOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*fputs}
+
+; This transformation requires the pointer size, as it assumes that size_t is
+; the size of a pointer.
+target datalayout = "-p:64:64:64"
+
+ %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
+@stdout = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=1]
+@empty = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+@len1 = constant [2 x i8] c"A\00" ; <[2 x i8]*> [#uses=1]
+@long = constant [7 x i8] c"hello\0A\00" ; <[7 x i8]*> [#uses=1]
+
+declare i32 @fputs(i8*, %struct._IO_FILE*)
+
+define i32 @main() {
+entry:
+ %out = load %struct._IO_FILE** @stdout ; <%struct._IO_FILE*> [#uses=3]
+ %s1 = getelementptr [1 x i8]* @empty, i32 0, i32 0 ; <i8*> [#uses=1]
+ %s2 = getelementptr [2 x i8]* @len1, i32 0, i32 0 ; <i8*> [#uses=1]
+ %s3 = getelementptr [7 x i8]* @long, i32 0, i32 0 ; <i8*> [#uses=1]
+ %a = call i32 @fputs( i8* %s1, %struct._IO_FILE* %out ) ; <i32> [#uses=0]
+ %b = call i32 @fputs( i8* %s2, %struct._IO_FILE* %out ) ; <i32> [#uses=0]
+ %c = call i32 @fputs( i8* %s3, %struct._IO_FILE* %out ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/SPrintF.ll b/test/Transforms/SimplifyLibCalls/SPrintF.ll
new file mode 100644
index 0000000..847e363
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/SPrintF.ll
@@ -0,0 +1,40 @@
+; Test that the SPrintFOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*sprintf}
+
+; This transformation requires the pointer size, as it assumes that size_t is
+; the size of a pointer.
+target datalayout = "-p:64:64:64"
+
+@hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+@null_hello = constant [7 x i8] c"\00hello\00" ; <[7 x i8]*> [#uses=1]
+@fmt1 = constant [3 x i8] c"%s\00" ; <[3 x i8]*> [#uses=1]
+@fmt2 = constant [3 x i8] c"%c\00" ; <[3 x i8]*> [#uses=1]
+
+declare i32 @sprintf(i8*, i8*, ...)
+
+declare i32 @puts(i8*)
+
+define i32 @foo(i8* %p) {
+ %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
+ %target_p = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=7]
+ %hello_p = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=2]
+ %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %nh_p = getelementptr [7 x i8]* @null_hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %fmt1_p = getelementptr [3 x i8]* @fmt1, i32 0, i32 0 ; <i8*> [#uses=2]
+ %fmt2_p = getelementptr [3 x i8]* @fmt2, i32 0, i32 0 ; <i8*> [#uses=1]
+ store i8 0, i8* %target_p
+ %r1 = call i32 (i8*, i8*, ...)* @sprintf( i8* %target_p, i8* %hello_p ) ; <i32> [#uses=1]
+ %r2 = call i32 (i8*, i8*, ...)* @sprintf( i8* %target_p, i8* %null_p ) ; <i32> [#uses=1]
+ %r3 = call i32 (i8*, i8*, ...)* @sprintf( i8* %target_p, i8* %nh_p ) ; <i32> [#uses=1]
+ %r4 = call i32 (i8*, i8*, ...)* @sprintf( i8* %target_p, i8* %fmt1_p, i8* %hello_p ) ; <i32> [#uses=1]
+ %r4.1 = call i32 (i8*, i8*, ...)* @sprintf( i8* %target_p, i8* %fmt1_p, i8* %p ) ; <i32> [#uses=1]
+ %r5 = call i32 (i8*, i8*, ...)* @sprintf( i8* %target_p, i8* %fmt2_p, i32 82 ) ; <i32> [#uses=1]
+ %r6 = add i32 %r1, %r2 ; <i32> [#uses=1]
+ %r7 = add i32 %r3, %r6 ; <i32> [#uses=1]
+ %r8 = add i32 %r5, %r7 ; <i32> [#uses=1]
+ %r9 = add i32 %r8, %r4 ; <i32> [#uses=1]
+ %r10 = add i32 %r9, %r4.1 ; <i32> [#uses=1]
+ ret i32 %r10
+}
diff --git a/test/Transforms/SimplifyLibCalls/StrCat.ll b/test/Transforms/SimplifyLibCalls/StrCat.ll
new file mode 100644
index 0000000..4e3d0ab
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrCat.ll
@@ -0,0 +1,33 @@
+; Test that the StrCatOptimizer works correctly
+; PR3661
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*strcat}
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: grep {puts.*%arg1}
+
+; This transformation requires the pointer size, as it assumes that size_t is
+; the size of a pointer.
+target datalayout = "-p:64:64:64"
+
+@hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+@null_hello = constant [7 x i8] c"\00hello\00" ; <[7 x i8]*> [#uses=1]
+
+declare i8* @strcat(i8*, i8*)
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
+ %arg1 = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=2]
+ store i8 0, i8* %arg1
+ %arg2 = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt1 = call i8* @strcat( i8* %arg1, i8* %arg2 ) ; <i8*> [#uses=1]
+ %arg3 = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt2 = call i8* @strcat( i8* %rslt1, i8* %arg3 ) ; <i8*> [#uses=1]
+ %arg4 = getelementptr [7 x i8]* @null_hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt3 = call i8* @strcat( i8* %rslt2, i8* %arg4 ) ; <i8*> [#uses=1]
+ call i32 @puts( i8* %rslt3 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/StrChr.ll b/test/Transforms/SimplifyLibCalls/StrChr.ll
new file mode 100644
index 0000000..50ca0a6
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrChr.ll
@@ -0,0 +1,26 @@
+; Test that the StrChrOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*@strchr}
+
+; This transformation requires the pointer size, as it assumes that size_t is
+; the size of a pointer.
+target datalayout = "-p:64:64:64"
+
+@hello = constant [14 x i8] c"hello world\5Cn\00" ; <[14 x i8]*> [#uses=1]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+
+declare i8* @strchr(i8*, i32)
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %hello_p = getelementptr [14 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=2]
+ %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %world = call i8* @strchr( i8* %hello_p, i32 119 ) ; <i8*> [#uses=1]
+ %ignore = call i8* @strchr( i8* %null_p, i32 119 ) ; <i8*> [#uses=0]
+ %len = call i32 @puts( i8* %world ) ; <i32> [#uses=1]
+ %index = add i32 %len, 112 ; <i32> [#uses=2]
+ %result = call i8* @strchr( i8* %hello_p, i32 %index ) ; <i8*> [#uses=0]
+ ret i32 %index
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/StrCmp.ll b/test/Transforms/SimplifyLibCalls/StrCmp.ll
new file mode 100644
index 0000000..7359635
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrCmp.ll
@@ -0,0 +1,28 @@
+; Test that the StrCmpOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*strcmp}
+
+@hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
+@hell = constant [5 x i8] c"hell\00" ; <[5 x i8]*> [#uses=1]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+
+declare i32 @strcmp(i8*, i8*)
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %hello_p = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=5]
+ %hell_p = getelementptr [5 x i8]* @hell, i32 0, i32 0 ; <i8*> [#uses=1]
+ %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=4]
+ %temp1 = call i32 @strcmp( i8* %hello_p, i8* %hello_p ) ; <i32> [#uses=1]
+ %temp2 = call i32 @strcmp( i8* %null_p, i8* %null_p ) ; <i32> [#uses=1]
+ %temp3 = call i32 @strcmp( i8* %hello_p, i8* %null_p ) ; <i32> [#uses=1]
+ %temp4 = call i32 @strcmp( i8* %null_p, i8* %hello_p ) ; <i32> [#uses=1]
+ %temp5 = call i32 @strcmp( i8* %hell_p, i8* %hello_p ) ; <i32> [#uses=1]
+ %rslt1 = add i32 %temp1, %temp2 ; <i32> [#uses=1]
+ %rslt2 = add i32 %rslt1, %temp3 ; <i32> [#uses=1]
+ %rslt3 = add i32 %rslt2, %temp4 ; <i32> [#uses=1]
+ %rslt4 = add i32 %rslt3, %temp5 ; <i32> [#uses=1]
+ ret i32 %rslt4
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/StrCpy.ll b/test/Transforms/SimplifyLibCalls/StrCpy.ll
new file mode 100644
index 0000000..7542984
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrCpy.ll
@@ -0,0 +1,30 @@
+; Test that the StrCpyOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*strcpy}
+
+; This transformation requires the pointer size, as it assumes that size_t is
+; the size of a pointer.
+target datalayout = "-p:64:64:64"
+
+@hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+@null_hello = constant [7 x i8] c"\00hello\00" ; <[7 x i8]*> [#uses=1]
+
+declare i8* @strcpy(i8*, i8*)
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
+ %arg1 = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=2]
+ store i8 0, i8* %arg1
+ %arg2 = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt1 = call i8* @strcpy( i8* %arg1, i8* %arg2 ) ; <i8*> [#uses=1]
+ %arg3 = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt2 = call i8* @strcpy( i8* %rslt1, i8* %arg3 ) ; <i8*> [#uses=1]
+ %arg4 = getelementptr [7 x i8]* @null_hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt3 = call i8* @strcpy( i8* %rslt2, i8* %arg4 ) ; <i8*> [#uses=1]
+ call i32 @puts( i8* %rslt3 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/StrLen.ll b/test/Transforms/SimplifyLibCalls/StrLen.ll
new file mode 100644
index 0000000..45b349d
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrLen.ll
@@ -0,0 +1,56 @@
+; Test that the StrCatOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*strlen}
+
+target datalayout = "e-p:32:32"
+@hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=3]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=3]
+@null_hello = constant [7 x i8] c"\00hello\00" ; <[7 x i8]*> [#uses=1]
+
+declare i32 @strlen(i8*)
+
+define i32 @test1() {
+ %hello_p = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %hello_l = call i32 @strlen( i8* %hello_p ) ; <i32> [#uses=1]
+ ret i32 %hello_l
+}
+
+define i32 @test2() {
+ %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %null_l = call i32 @strlen( i8* %null_p ) ; <i32> [#uses=1]
+ ret i32 %null_l
+}
+
+define i32 @test3() {
+ %null_hello_p = getelementptr [7 x i8]* @null_hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %null_hello_l = call i32 @strlen( i8* %null_hello_p ) ; <i32> [#uses=1]
+ ret i32 %null_hello_l
+}
+
+define i1 @test4() {
+ %hello_p = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %hello_l = call i32 @strlen( i8* %hello_p ) ; <i32> [#uses=1]
+ %eq_hello = icmp eq i32 %hello_l, 0 ; <i1> [#uses=1]
+ ret i1 %eq_hello
+}
+
+define i1 @test5() {
+ %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %null_l = call i32 @strlen( i8* %null_p ) ; <i32> [#uses=1]
+ %eq_null = icmp eq i32 %null_l, 0 ; <i1> [#uses=1]
+ ret i1 %eq_null
+}
+
+define i1 @test6() {
+ %hello_p = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %hello_l = call i32 @strlen( i8* %hello_p ) ; <i32> [#uses=1]
+ %ne_hello = icmp ne i32 %hello_l, 0 ; <i1> [#uses=1]
+ ret i1 %ne_hello
+}
+
+define i1 @test7() {
+ %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %null_l = call i32 @strlen( i8* %null_p ) ; <i32> [#uses=1]
+ %ne_null = icmp ne i32 %null_l, 0 ; <i1> [#uses=1]
+ ret i1 %ne_null
+}
diff --git a/test/Transforms/SimplifyLibCalls/StrNCat.ll b/test/Transforms/SimplifyLibCalls/StrNCat.ll
new file mode 100644
index 0000000..d09c022
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrNCat.ll
@@ -0,0 +1,31 @@
+; Test that the StrNCatOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*strncat}
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: grep {puts.*%arg1}
+
+; This transformation requires the pointer size, as it assumes that size_t is
+; the size of a pointer.
+target datalayout = "-p:64:64:64"
+
+@hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+@null_hello = constant [7 x i8] c"\00hello\00" ; <[7 x i8]*> [#uses=1]
+
+declare i8* @strncat(i8*, i8*, i32)
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
+ %arg1 = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=2]
+ store i8 0, i8* %arg1
+ %arg2 = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt1 = call i8* @strncat( i8* %arg1, i8* %arg2, i32 6 ) ; <i8*> [#uses=1]
+ %arg3 = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt2 = call i8* @strncat( i8* %rslt1, i8* %arg3, i32 42 ) ; <i8*> [#uses=1]
+ %arg4 = getelementptr [7 x i8]* @null_hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt3 = call i8* @strncat( i8* %rslt2, i8* %arg4, i32 42 ) ; <i8*> [#uses=1]
+ call i32 @puts( i8* %rslt3 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
diff --git a/test/Transforms/SimplifyLibCalls/StrNCmp.ll b/test/Transforms/SimplifyLibCalls/StrNCmp.ll
new file mode 100644
index 0000000..ba77385
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrNCmp.ll
@@ -0,0 +1,28 @@
+; Test that the StrNCmpOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*strncmp}
+
+@hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
+@hell = constant [5 x i8] c"hell\00" ; <[5 x i8]*> [#uses=1]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+
+declare i32 @strncmp(i8*, i8*, i32)
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %hello_p = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=5]
+ %hell_p = getelementptr [5 x i8]* @hell, i32 0, i32 0 ; <i8*> [#uses=1]
+ %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=4]
+ %temp1 = call i32 @strncmp( i8* %hello_p, i8* %hello_p, i32 5 ) ; <i32> [#uses=1]
+ %temp2 = call i32 @strncmp( i8* %null_p, i8* %null_p, i32 0 ) ; <i32> [#uses=1]
+ %temp3 = call i32 @strncmp( i8* %hello_p, i8* %null_p, i32 0 ) ; <i32> [#uses=1]
+ %temp4 = call i32 @strncmp( i8* %null_p, i8* %hello_p, i32 0 ) ; <i32> [#uses=1]
+ %temp5 = call i32 @strncmp( i8* %hell_p, i8* %hello_p, i32 4 ) ; <i32> [#uses=1]
+ %rslt1 = add i32 %temp1, %temp2 ; <i32> [#uses=1]
+ %rslt2 = add i32 %rslt1, %temp3 ; <i32> [#uses=1]
+ %rslt3 = add i32 %rslt2, %temp4 ; <i32> [#uses=1]
+ %rslt4 = add i32 %rslt3, %temp5 ; <i32> [#uses=1]
+ ret i32 %rslt4
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/StrNCpy.ll b/test/Transforms/SimplifyLibCalls/StrNCpy.ll
new file mode 100644
index 0000000..c8af3ca
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrNCpy.ll
@@ -0,0 +1,29 @@
+; Test that the StrNCpyOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*strncpy}
+
+; This transformation requires the pointer size, as it assumes that size_t is
+; the size of a pointer.
+target datalayout = "-p:64:64:64"
+
+@hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
+@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
+@null_hello = constant [7 x i8] c"\00hello\00" ; <[7 x i8]*> [#uses=1]
+
+declare i8* @strncpy(i8*, i8*, i32)
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
+ %arg1 = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=2]
+ store i8 0, i8* %arg1
+ %arg2 = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt1 = call i8* @strncpy( i8* %arg1, i8* %arg2, i32 6 ) ; <i8*> [#uses=1]
+ %arg3 = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt2 = call i8* @strncpy( i8* %rslt1, i8* %arg3, i32 42 ) ; <i8*> [#uses=1]
+ %arg4 = getelementptr [7 x i8]* @null_hello, i32 0, i32 0 ; <i8*> [#uses=1]
+ %rslt3 = call i8* @strncpy( i8* %rslt2, i8* %arg4, i32 42 ) ; <i8*> [#uses=1]
+ call i32 @puts( i8* %rslt3 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
diff --git a/test/Transforms/SimplifyLibCalls/StrStr.ll b/test/Transforms/SimplifyLibCalls/StrStr.ll
new file mode 100644
index 0000000..2cac2d4
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/StrStr.ll
@@ -0,0 +1,48 @@
+; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
+; PR5783
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+target triple = "i386-apple-darwin9.0"
+
[email protected] = private constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
[email protected] = private constant [2 x i8] c"a\00" ; <[2 x i8]*> [#uses=1]
[email protected] = private constant [6 x i8] c"abcde\00" ; <[6 x i8]*> [#uses=1]
[email protected] = private constant [4 x i8] c"bcd\00" ; <[4 x i8]*> [#uses=1]
+
+define i8* @test1(i8* %P) nounwind readonly {
+entry:
+ %call = tail call i8* @strstr(i8* %P, i8* getelementptr inbounds ([1 x i8]* @.str, i32 0, i32 0)) nounwind ; <i8*> [#uses=1]
+ ret i8* %call
+; strstr(P, "") -> P
+; CHECK: @test1
+; CHECK: ret i8* %P
+}
+
+declare i8* @strstr(i8*, i8* nocapture) nounwind readonly
+
+define i8* @test2(i8* %P) nounwind readonly {
+entry:
+ %call = tail call i8* @strstr(i8* %P, i8* getelementptr inbounds ([2 x i8]* @.str1, i32 0, i32 0)) nounwind ; <i8*> [#uses=1]
+ ret i8* %call
+; strstr(P, "a") -> strchr(P, 'a')
+; CHECK: @test2
+; CHECK: @strchr(i8* %P, i32 97)
+}
+
+define i8* @test3(i8* nocapture %P) nounwind readonly {
+entry:
+ %call = tail call i8* @strstr(i8* getelementptr inbounds ([6 x i8]* @.str2, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8]* @.str3, i32 0, i32 0)) nounwind ; <i8*> [#uses=1]
+ ret i8* %call
+; strstr("abcde", "bcd") -> "abcde"+1
+; CHECK: @test3
+; CHECK: getelementptr inbounds ([6 x i8]* @.str2, i32 0, i64 1)
+}
+
+define i8* @test4(i8* %P) nounwind readonly {
+entry:
+ %call = tail call i8* @strstr(i8* %P, i8* %P) nounwind ; <i8*> [#uses=1]
+ ret i8* %call
+; strstr(P, P) -> P
+; CHECK: @test4
+; CHECK: ret i8* %P
+}
diff --git a/test/Transforms/SimplifyLibCalls/ToAscii.ll b/test/Transforms/SimplifyLibCalls/ToAscii.ll
new file mode 100644
index 0000000..e2b5683
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/ToAscii.ll
@@ -0,0 +1,21 @@
+; Test that the ToAsciiOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | \
+; RUN: not grep {call.*toascii}
+
+declare i32 @toascii(i32)
+
+define i32 @main() {
+ %val1 = call i32 @toascii( i32 1 ) ; <i32> [#uses=1]
+ %val2 = call i32 @toascii( i32 0 ) ; <i32> [#uses=1]
+ %val3 = call i32 @toascii( i32 127 ) ; <i32> [#uses=1]
+ %val4 = call i32 @toascii( i32 128 ) ; <i32> [#uses=1]
+ %val5 = call i32 @toascii( i32 255 ) ; <i32> [#uses=1]
+ %val6 = call i32 @toascii( i32 256 ) ; <i32> [#uses=1]
+ %rslt1 = add i32 %val1, %val2 ; <i32> [#uses=1]
+ %rslt2 = add i32 %val3, %val4 ; <i32> [#uses=1]
+ %rslt3 = add i32 %val5, %val6 ; <i32> [#uses=1]
+ %rslt4 = add i32 %rslt1, %rslt2 ; <i32> [#uses=1]
+ %rslt5 = add i32 %rslt4, %rslt3 ; <i32> [#uses=1]
+ ret i32 %rslt5
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/abs.ll b/test/Transforms/SimplifyLibCalls/abs.ll
new file mode 100644
index 0000000..6fbe0b9
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/abs.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -simplify-libcalls -S | grep {select i1 %ispos}
+; PR2337
+
+define i32 @test(i32 %x) {
+entry:
+ %call = call i32 @abs( i32 %x ) ; <i32> [#uses=1]
+ ret i32 %call
+}
+
+declare i32 @abs(i32)
+
diff --git a/test/Transforms/SimplifyLibCalls/dg.exp b/test/Transforms/SimplifyLibCalls/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/SimplifyLibCalls/exp2.ll b/test/Transforms/SimplifyLibCalls/exp2.ll
new file mode 100644
index 0000000..2f5d910
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/exp2.ll
@@ -0,0 +1,38 @@
+; RUN: opt < %s -simplify-libcalls -S | grep {call.*ldexp} | count 4
+; rdar://5852514
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define double @t1(i32 %x) nounwind {
+entry:
+ %tmp12 = sitofp i32 %x to double ; <double> [#uses=1]
+ %exp2 = tail call double @exp2( double %tmp12 ) ; <double> [#uses=1]
+ ret double %exp2
+}
+
+define float @t4(i8 zeroext %x) nounwind {
+entry:
+ %tmp12 = uitofp i8 %x to float ; <float> [#uses=1]
+ %tmp3 = tail call float @exp2f( float %tmp12 ) nounwind readonly ; <float> [#uses=1]
+ ret float %tmp3
+}
+
+declare float @exp2f(float) nounwind readonly
+
+define double @t3(i16 zeroext %x) nounwind {
+entry:
+ %tmp12 = uitofp i16 %x to double ; <double> [#uses=1]
+ %exp2 = tail call double @exp2( double %tmp12 ) ; <double> [#uses=1]
+ ret double %exp2
+}
+
+define double @t2(i16 signext %x) nounwind {
+entry:
+ %tmp12 = sitofp i16 %x to double ; <double> [#uses=1]
+ %exp2 = tail call double @exp2( double %tmp12 ) ; <double> [#uses=1]
+ ret double %exp2
+}
+
+declare double @exp2(double)
+
diff --git a/test/Transforms/SimplifyLibCalls/floor.ll b/test/Transforms/SimplifyLibCalls/floor.ll
new file mode 100644
index 0000000..a7af5a9
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/floor.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -simplify-libcalls -S > %t
+; RUN: not grep {call.*floor(} %t
+; RUN: grep {call.*floorf(} %t
+; RUN: not grep {call.*ceil(} %t
+; RUN: grep {call.*ceilf(} %t
+; RUN: not grep {call.*nearbyint(} %t
+; RUN: grep {call.*nearbyintf(} %t
+; XFAIL: sparc
+
+declare double @floor(double)
+
+declare double @ceil(double)
+
+declare double @nearbyint(double)
+
+define float @test_floor(float %C) {
+ %D = fpext float %C to double ; <double> [#uses=1]
+ ; --> floorf
+ %E = call double @floor( double %D ) ; <double> [#uses=1]
+ %F = fptrunc double %E to float ; <float> [#uses=1]
+ ret float %F
+}
+
+define float @test_ceil(float %C) {
+ %D = fpext float %C to double ; <double> [#uses=1]
+ ; --> ceilf
+ %E = call double @ceil( double %D ) ; <double> [#uses=1]
+ %F = fptrunc double %E to float ; <float> [#uses=1]
+ ret float %F
+}
+
+define float @test_nearbyint(float %C) {
+ %D = fpext float %C to double ; <double> [#uses=1]
+ ; --> nearbyintf
+ %E = call double @nearbyint( double %D ) ; <double> [#uses=1]
+ %F = fptrunc double %E to float ; <float> [#uses=1]
+ ret float %F
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/half-powr.ll b/test/Transforms/SimplifyLibCalls/half-powr.ll
new file mode 100644
index 0000000..5d317fe
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/half-powr.ll
@@ -0,0 +1,46 @@
+; RUN: opt -simplify-libcalls-halfpowr %s -S | FileCheck %s
+
+define float @__half_powrf4(float %f, float %g) nounwind readnone {
+entry:
+ %0 = fcmp olt float %f, 2.000000e+00 ; <i1> [#uses=1]
+ br i1 %0, label %bb, label %bb1
+
+bb: ; preds = %entry
+ %1 = fdiv float %f, 3.000000e+00 ; <float> [#uses=1]
+ br label %bb1
+
+bb1: ; preds = %bb, %entry
+ %f_addr.0 = phi float [ %1, %bb ], [ %f, %entry ] ; <float> [#uses=1]
+ %2 = fmul float %f_addr.0, %g ; <float> [#uses=1]
+; CHECK: fmul float %f_addr
+; CHECK: fmul float %f_addr
+; CHECK: fmul float %f_addr
+; CHECK: fmul float %f_addr
+
+ ret float %2
+}
+
+define void @foo(float* %p) nounwind {
+entry:
+ %0 = load float* %p, align 4 ; <float> [#uses=1]
+ %1 = getelementptr float* %p, i32 1 ; <float*> [#uses=1]
+ %2 = load float* %1, align 4 ; <float> [#uses=1]
+ %3 = getelementptr float* %p, i32 2 ; <float*> [#uses=1]
+ %4 = load float* %3, align 4 ; <float> [#uses=1]
+ %5 = getelementptr float* %p, i32 3 ; <float*> [#uses=1]
+ %6 = load float* %5, align 4 ; <float> [#uses=1]
+ %7 = getelementptr float* %p, i32 4 ; <float*> [#uses=1]
+ %8 = load float* %7, align 4 ; <float> [#uses=1]
+ %9 = getelementptr float* %p, i32 5 ; <float*> [#uses=1]
+ %10 = load float* %9, align 4 ; <float> [#uses=1]
+ %11 = tail call float @__half_powrf4(float %0, float %6) nounwind ; <float> [#uses=1]
+ %12 = tail call float @__half_powrf4(float %2, float %8) nounwind ; <float> [#uses=1]
+ %13 = tail call float @__half_powrf4(float %4, float %10) nounwind ; <float> [#uses=1]
+ %14 = getelementptr float* %p, i32 6 ; <float*> [#uses=1]
+ store float %11, float* %14, align 4
+ %15 = getelementptr float* %p, i32 7 ; <float*> [#uses=1]
+ store float %12, float* %15, align 4
+ %16 = getelementptr float* %p, i32 8 ; <float*> [#uses=1]
+ store float %13, float* %16, align 4
+ ret void
+}
diff --git a/test/Transforms/SimplifyLibCalls/memcmp.ll b/test/Transforms/SimplifyLibCalls/memcmp.ll
new file mode 100644
index 0000000..640d232
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/memcmp.ll
@@ -0,0 +1,23 @@
+; Test that the memcmpOptimizer works correctly
+; RUN: opt < %s -simplify-libcalls -S | not grep {call.*memcmp}
+
+@h = constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=0]
+@hel = constant [4 x i8] c"hel\00" ; <[4 x i8]*> [#uses=0]
+@hello_u = constant [8 x i8] c"hello_u\00" ; <[8 x i8]*> [#uses=0]
+
+declare i32 @memcmp(i8*, i8*, i32)
+
+define void @test(i8* %P, i8* %Q, i32 %N, i32* %IP, i1* %BP) {
+ %A = call i32 @memcmp( i8* %P, i8* %P, i32 %N ) ; <i32> [#uses=1]
+ volatile store i32 %A, i32* %IP
+ %B = call i32 @memcmp( i8* %P, i8* %Q, i32 0 ) ; <i32> [#uses=1]
+ volatile store i32 %B, i32* %IP
+ %C = call i32 @memcmp( i8* %P, i8* %Q, i32 1 ) ; <i32> [#uses=1]
+ volatile store i32 %C, i32* %IP
+ %F = call i32 @memcmp(i8* getelementptr ([4 x i8]* @hel, i32 0, i32 0),
+ i8* getelementptr ([8 x i8]* @hello_u, i32 0, i32 0),
+ i32 3)
+ volatile store i32 %F, i32* %IP
+ ret void
+}
+
diff --git a/test/Transforms/SimplifyLibCalls/memmove.ll b/test/Transforms/SimplifyLibCalls/memmove.ll
new file mode 100644
index 0000000..c0c0050
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/memmove.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -simplify-libcalls -S | grep {llvm.memmove}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i8* @test(i8* %a, i8* %b, i32 %x) {
+entry:
+ %call = call i8* @memmove(i8* %a, i8* %b, i32 %x )
+ ret i8* %call
+}
+
+declare i8* @memmove(i8*,i8*,i32)
+
diff --git a/test/Transforms/SimplifyLibCalls/memset-64.ll b/test/Transforms/SimplifyLibCalls/memset-64.ll
new file mode 100644
index 0000000..fb752c4
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/memset-64.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -simplify-libcalls -S | grep {llvm.memset}
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-pc-linux-gnu"
+
+define void @a(i8* %x) nounwind {
+entry:
+ %call = call i8* @memset(i8* %x, i32 1, i64 100) ; <i8*> [#uses=0]
+ ret void
+}
+
+declare i8* @memset(i8*, i32, i64)
+
diff --git a/test/Transforms/SimplifyLibCalls/memset.ll b/test/Transforms/SimplifyLibCalls/memset.ll
new file mode 100644
index 0000000..0aede06
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/memset.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -simplify-libcalls -S | grep {llvm.memset}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i8* @test(i8* %a, i32 %b, i32 %x) {
+entry:
+ %call = call i8* @memset(i8* %a, i32 %b, i32 %x )
+ ret i8* %call
+}
+
+declare i8* @memset(i8*,i32,i32)
+
diff --git a/test/Transforms/SimplifyLibCalls/pow-to-sqrt.ll b/test/Transforms/SimplifyLibCalls/pow-to-sqrt.ll
new file mode 100644
index 0000000..669b414
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/pow-to-sqrt.ll
@@ -0,0 +1,33 @@
+; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
+; rdar://7251832
+
+; SimplifyLibcalls should optimize pow(x, 0.5) to sqrt plus code to handle
+; special cases. The readonly attribute on the call should be preserved.
+
+; CHECK: define float @foo(float %x) nounwind {
+; CHECK: %sqrtf = call float @sqrtf(float %x) nounwind readonly
+; CHECK: %fabsf = call float @fabsf(float %sqrtf) nounwind readonly
+; CHECK: %tmp = fcmp oeq float %x, 0xFFF0000000000000
+; CHECK: %tmp1 = select i1 %tmp, float 0x7FF0000000000000, float %fabsf
+; CHECK: ret float %tmp1
+
+define float @foo(float %x) nounwind {
+ %retval = call float @powf(float %x, float 0.5)
+ ret float %retval
+}
+
+; CHECK: define double @doo(double %x) nounwind {
+; CHECK: %sqrt = call double @sqrt(double %x) nounwind readonly
+; CHECK: %fabs = call double @fabs(double %sqrt) nounwind readonly
+; CHECK: %tmp = fcmp oeq double %x, 0xFFF0000000000000
+; CHECK: %tmp1 = select i1 %tmp, double 0x7FF0000000000000, double %fabs
+; CHECK: ret double %tmp1
+; CHECK: }
+
+define double @doo(double %x) nounwind {
+ %retval = call double @pow(double %x, double 0.5)
+ ret double %retval
+}
+
+declare float @powf(float, float) nounwind readonly
+declare double @pow(double, double) nounwind readonly
diff --git a/test/Transforms/SimplifyLibCalls/pow2.ll b/test/Transforms/SimplifyLibCalls/pow2.ll
new file mode 100644
index 0000000..f8364f7
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/pow2.ll
@@ -0,0 +1,37 @@
+; Testcase for calls to the standard C "pow" function
+;
+; RUN: opt < %s -simplify-libcalls -S | not grep {call .pow}
+
+
+declare double @pow(double, double)
+declare float @powf(float, float)
+
+define double @test1(double %X) {
+ %Y = call double @pow( double %X, double 0.000000e+00 ) ; <double> [#uses=1]
+ ret double %Y
+}
+
+define double @test2(double %X) {
+ %Y = call double @pow( double %X, double -0.000000e+00 ) ; <double> [#uses=1]
+ ret double %Y
+}
+
+define double @test3(double %X) {
+ %Y = call double @pow( double 1.000000e+00, double %X ) ; <double> [#uses=1]
+ ret double %Y
+}
+
+define double @test4(double %X) {
+ %Y = call double @pow( double %X, double 2.0)
+ ret double %Y
+}
+
+define float @test4f(float %X) {
+ %Y = call float @powf( float %X, float 2.0)
+ ret float %Y
+}
+
+define float @test5f(float %X) {
+ %Y = call float @powf(float 2.0, float %X) ;; exp2
+ ret float %Y
+}
diff --git a/test/Transforms/SimplifyLibCalls/strcpy_chk.ll b/test/Transforms/SimplifyLibCalls/strcpy_chk.ll
new file mode 100644
index 0000000..422cbd9
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/strcpy_chk.ll
@@ -0,0 +1,12 @@
+; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
+@a = common global [60 x i8] zeroinitializer, align 1 ; <[60 x i8]*> [#uses=1]
[email protected] = private constant [8 x i8] c"abcdefg\00" ; <[8 x i8]*> [#uses=1]
+
+define i8* @foo() nounwind {
+; CHECK: @foo
+; CHECK-NEXT: call i8* @strcpy
+ %call = call i8* @__strcpy_chk(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([8 x i8]* @.str, i32 0, i32 0), i32 60) ; <i8*> [#uses=1]
+ ret i8* %call
+}
+
+declare i8* @__strcpy_chk(i8*, i8*, i32) nounwind
diff --git a/test/Transforms/SimplifyLibCalls/weak-symbols.ll b/test/Transforms/SimplifyLibCalls/weak-symbols.ll
new file mode 100644
index 0000000..5875b21
--- /dev/null
+++ b/test/Transforms/SimplifyLibCalls/weak-symbols.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
+; PR4738
+
+; SimplifyLibcalls shouldn't assume anything about weak symbols.
+
+@real_init = weak_odr constant [2 x i8] c"y\00"
+@fake_init = weak constant [2 x i8] c"y\00"
[email protected] = private constant [2 x i8] c"y\00"
+
+; CHECK: define i32 @foo
+; CHECK: call i32 @strcmp
+define i32 @foo() nounwind {
+entry:
+ %t0 = call i32 @strcmp(i8* getelementptr inbounds ([2 x i8]* @fake_init, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8]* @.str, i64 0, i64 0)) nounwind readonly
+ ret i32 %t0
+}
+
+; CHECK: define i32 @bar
+; CHECK: ret i32 0
+define i32 @bar() nounwind {
+entry:
+ %t0 = call i32 @strcmp(i8* getelementptr inbounds ([2 x i8]* @real_init, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8]* @.str, i64 0, i64 0)) nounwind readonly
+ ret i32 %t0
+}
+
+declare i32 @strcmp(i8*, i8*) nounwind readonly
diff --git a/test/Transforms/StripSymbols/2007-01-15-llvm.used.ll b/test/Transforms/StripSymbols/2007-01-15-llvm.used.ll
new file mode 100644
index 0000000..69febc3
--- /dev/null
+++ b/test/Transforms/StripSymbols/2007-01-15-llvm.used.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -strip -S | grep foo | count 2
+; RUN: opt < %s -strip -S | grep bar | count 2
[email protected] = appending global [2 x i8*] [ i8* bitcast (i32* @foo to i8*), i8* bitcast (i32 ()* @bar to i8*) ], section "llvm.metadata" ; <[2 x i8*]*> [#uses=0]
+@foo = internal constant i32 41 ; <i32*> [#uses=1]
+
+define internal i32 @bar() nounwind {
+entry:
+ ret i32 42
+}
+
+define i32 @main() nounwind {
+entry:
+ ret i32 0
+}
+
diff --git a/test/Transforms/StripSymbols/dg.exp b/test/Transforms/StripSymbols/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/StripSymbols/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/TailCallElim/accum_recursion.ll b/test/Transforms/TailCallElim/accum_recursion.ll
new file mode 100644
index 0000000..b2a9ed2
--- /dev/null
+++ b/test/Transforms/TailCallElim/accum_recursion.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -tailcallelim -S | not grep call
+
+define i32 @factorial(i32 %x) {
+entry:
+ %tmp.1 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %then, label %else
+then: ; preds = %entry
+ %tmp.6 = add i32 %x, -1 ; <i32> [#uses=1]
+ %tmp.4 = call i32 @factorial( i32 %tmp.6 ) ; <i32> [#uses=1]
+ %tmp.7 = mul i32 %tmp.4, %x ; <i32> [#uses=1]
+ ret i32 %tmp.7
+else: ; preds = %entry
+ ret i32 1
+}
+
diff --git a/test/Transforms/TailCallElim/accum_recursion_constant_arg.ll b/test/Transforms/TailCallElim/accum_recursion_constant_arg.ll
new file mode 100644
index 0000000..2a90cf3
--- /dev/null
+++ b/test/Transforms/TailCallElim/accum_recursion_constant_arg.ll
@@ -0,0 +1,20 @@
+; This is a more aggressive form of accumulator recursion insertion, which
+; requires noticing that X doesn't change as we perform the tailcall. Thanks
+; go out to the anonymous users of the demo script for "suggesting"
+; optimizations that should be done. :)
+
+; RUN: opt < %s -tailcallelim -S | not grep call
+
+define i32 @mul(i32 %x, i32 %y) {
+entry:
+ %tmp.1 = icmp eq i32 %y, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %return, label %endif
+endif: ; preds = %entry
+ %tmp.8 = add i32 %y, -1 ; <i32> [#uses=1]
+ %tmp.5 = call i32 @mul( i32 %x, i32 %tmp.8 ) ; <i32> [#uses=1]
+ %tmp.9 = add i32 %tmp.5, %x ; <i32> [#uses=1]
+ ret i32 %tmp.9
+return: ; preds = %entry
+ ret i32 %x
+}
+
diff --git a/test/Transforms/TailCallElim/ackermann.ll b/test/Transforms/TailCallElim/ackermann.ll
new file mode 100644
index 0000000..0c140ad
--- /dev/null
+++ b/test/Transforms/TailCallElim/ackermann.ll
@@ -0,0 +1,25 @@
+; This function contains two tail calls, which should be eliminated
+; RUN: opt < %s -tailcallelim -stats -disable-output |& grep {2 tailcallelim}
+
+define i32 @Ack(i32 %M.1, i32 %N.1) {
+entry:
+ %tmp.1 = icmp eq i32 %M.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %then.0, label %endif.0
+then.0: ; preds = %entry
+ %tmp.4 = add i32 %N.1, 1 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+endif.0: ; preds = %entry
+ %tmp.6 = icmp eq i32 %N.1, 0 ; <i1> [#uses=1]
+ br i1 %tmp.6, label %then.1, label %endif.1
+then.1: ; preds = %endif.0
+ %tmp.10 = add i32 %M.1, -1 ; <i32> [#uses=1]
+ %tmp.8 = call i32 @Ack( i32 %tmp.10, i32 1 ) ; <i32> [#uses=1]
+ ret i32 %tmp.8
+endif.1: ; preds = %endif.0
+ %tmp.13 = add i32 %M.1, -1 ; <i32> [#uses=1]
+ %tmp.17 = add i32 %N.1, -1 ; <i32> [#uses=1]
+ %tmp.14 = call i32 @Ack( i32 %M.1, i32 %tmp.17 ) ; <i32> [#uses=1]
+ %tmp.11 = call i32 @Ack( i32 %tmp.13, i32 %tmp.14 ) ; <i32> [#uses=1]
+ ret i32 %tmp.11
+}
+
diff --git a/test/Transforms/TailCallElim/dg.exp b/test/Transforms/TailCallElim/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/TailCallElim/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/TailCallElim/dont-tce-tail-marked-call.ll b/test/Transforms/TailCallElim/dont-tce-tail-marked-call.ll
new file mode 100644
index 0000000..5cc92e1
--- /dev/null
+++ b/test/Transforms/TailCallElim/dont-tce-tail-marked-call.ll
@@ -0,0 +1,13 @@
+; RUN: opt < %s -tailcallelim -S | \
+; RUN: grep {call i32 @foo}
+
+declare void @bar(i32*)
+
+define i32 @foo(i32 %N) {
+ %A = alloca i32, i32 %N ; <i32*> [#uses=2]
+ store i32 17, i32* %A
+ call void @bar( i32* %A )
+ %X = tail call i32 @foo( i32 %N ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/TailCallElim/dont_reorder_load.ll b/test/Transforms/TailCallElim/dont_reorder_load.ll
new file mode 100644
index 0000000..cc273c3c
--- /dev/null
+++ b/test/Transforms/TailCallElim/dont_reorder_load.ll
@@ -0,0 +1,64 @@
+; RUN: opt < %s -tailcallelim -S | grep call | count 3
+; PR4323
+
+; Several cases where tail call elimination should not move the load above the
+; call, and thus can't eliminate the tail recursion.
+
+
+@extern_weak_global = extern_weak global i32 ; <i32*> [#uses=1]
+
+
+; This load can't be safely moved above the call because the load is from an
+; extern_weak global and may trap, but the call may unwind before that happens.
+define fastcc i32 @no_tailrecelim_1(i32* %a_arg, i32 %a_len_arg, i32 %start_arg) readonly {
+entry:
+ %tmp2 = icmp sge i32 %start_arg, %a_len_arg ; <i1> [#uses=1]
+ br i1 %tmp2, label %if, label %else
+
+if: ; preds = %entry
+ unwind
+
+else: ; preds = %entry
+ %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]
+ %tmp8 = call fastcc i32 @no_tailrecelim_1(i32* %a_arg, i32 %a_len_arg, i32 %tmp7) ; <i32> [#uses=1]
+ %tmp9 = load i32* @extern_weak_global ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
+
+
+; This load can't be safely moved above the call because function may write to the pointer.
+define fastcc i32 @no_tailrecelim_2(i32* %a_arg, i32 %a_len_arg, i32 %start_arg) nounwind {
+entry:
+ %tmp2 = icmp sge i32 %start_arg, %a_len_arg ; <i1> [#uses=1]
+ br i1 %tmp2, label %if, label %else
+
+if: ; preds = %entry
+ store i32 1, i32* %a_arg
+ ret i32 0
+
+else: ; preds = %entry
+ %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]
+ %tmp8 = call fastcc i32 @no_tailrecelim_2(i32* %a_arg, i32 %a_len_arg, i32 %tmp7) ; <i32> [#uses=1]
+ %tmp9 = load i32* %a_arg ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
+
+; This load can't be safely moved above the call because that would change the
+; order in which the volatile loads are performed.
+define fastcc i32 @no_tailrecelim_3(i32* %a_arg, i32 %a_len_arg, i32 %start_arg) nounwind {
+entry:
+ %tmp2 = icmp sge i32 %start_arg, %a_len_arg ; <i1> [#uses=1]
+ br i1 %tmp2, label %if, label %else
+
+if: ; preds = %entry
+ ret i32 0
+
+else: ; preds = %entry
+ %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]
+ %tmp8 = call fastcc i32 @no_tailrecelim_3(i32* %a_arg, i32 %a_len_arg, i32 %tmp7) ; <i32> [#uses=1]
+ %tmp9 = volatile load i32* %a_arg ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
diff --git a/test/Transforms/TailCallElim/inf-recursion.ll b/test/Transforms/TailCallElim/inf-recursion.ll
new file mode 100644
index 0000000..a5f246d
--- /dev/null
+++ b/test/Transforms/TailCallElim/inf-recursion.ll
@@ -0,0 +1,10 @@
+; RUN: opt < %s -tailcallelim -S | grep call
+; Don't turn this into an infinite loop, this is probably the implementation
+; of fabs and we expect the codegen to lower fabs.
+
+define double @fabs(double %f) {
+entry:
+ %tmp2 = call double @fabs( double %f ) ; <double> [#uses=1]
+ ret double %tmp2
+}
+
diff --git a/test/Transforms/TailCallElim/intervening-inst.ll b/test/Transforms/TailCallElim/intervening-inst.ll
new file mode 100644
index 0000000..0c40bd5
--- /dev/null
+++ b/test/Transforms/TailCallElim/intervening-inst.ll
@@ -0,0 +1,17 @@
+; This function contains intervening instructions which should be moved out of the way
+; RUN: opt < %s -tailcallelim -S | not grep call
+
+define i32 @Test(i32 %X) {
+entry:
+ %tmp.1 = icmp eq i32 %X, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %then.0, label %endif.0
+then.0: ; preds = %entry
+ %tmp.4 = add i32 %X, 1 ; <i32> [#uses=1]
+ ret i32 %tmp.4
+endif.0: ; preds = %entry
+ %tmp.10 = add i32 %X, -1 ; <i32> [#uses=1]
+ %tmp.8 = call i32 @Test( i32 %tmp.10 ) ; <i32> [#uses=1]
+ %DUMMY = add i32 %X, 1 ; <i32> [#uses=0]
+ ret i32 %tmp.8
+}
+
diff --git a/test/Transforms/TailCallElim/move_alloca_for_tail_call.ll b/test/Transforms/TailCallElim/move_alloca_for_tail_call.ll
new file mode 100644
index 0000000..a556ddb
--- /dev/null
+++ b/test/Transforms/TailCallElim/move_alloca_for_tail_call.ll
@@ -0,0 +1,15 @@
+; RUN: opt -tailcallelim %s -S | FileCheck %s
+; PR615
+
+declare void @bar(i32*)
+
+define i32 @foo() {
+; CHECK: i32 @foo()
+; CHECK-NEXT: alloca
+ %A = alloca i32 ; <i32*> [#uses=2]
+ store i32 17, i32* %A
+ call void @bar( i32* %A )
+ %X = tail call i32 @foo( ) ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/TailCallElim/nocapture.ll b/test/Transforms/TailCallElim/nocapture.ll
new file mode 100644
index 0000000..87cb9dd
--- /dev/null
+++ b/test/Transforms/TailCallElim/nocapture.ll
@@ -0,0 +1,25 @@
+; RUN: opt %s -tailcallelim -S | FileCheck %s
+; XFAIL: *
+
+declare void @use(i8* nocapture, i8* nocapture)
+
+define i8* @foo(i8* nocapture %A, i1 %cond) {
+; CHECK: tailrecurse:
+; CHECK: %A.tr = phi i8* [ %A, %0 ], [ %B, %cond_true ]
+; CHECK: %cond.tr = phi i1 [ %cond, %0 ], [ false, %cond_true ]
+ %B = alloca i8
+; CHECK: %B = alloca i8
+ br i1 %cond, label %cond_true, label %cond_false
+; CHECK: br i1 %cond.tr, label %cond_true, label %cond_false
+cond_true:
+; CHECK: cond_true:
+; CHECK: br label %tailrecurse
+ call i8* @foo(i8* %B, i1 false)
+ ret i8* null
+cond_false:
+; CHECK: cond_false
+ call void @use(i8* %A, i8* %B)
+; CHECK: tail call void @use(i8* %A.tr, i8* %B)
+ ret i8* null
+; CHECK: ret i8* null
+}
diff --git a/test/Transforms/TailCallElim/reorder_load.ll b/test/Transforms/TailCallElim/reorder_load.ll
new file mode 100644
index 0000000..7f8af7e
--- /dev/null
+++ b/test/Transforms/TailCallElim/reorder_load.ll
@@ -0,0 +1,101 @@
+; RUN: opt < %s -tailcallelim -S | not grep call
+; PR4323
+
+; Several cases where tail call elimination should move the load above the call,
+; then eliminate the tail recursion.
+
+
+@global = external global i32 ; <i32*> [#uses=1]
+@extern_weak_global = extern_weak global i32 ; <i32*> [#uses=1]
+
+
+; This load can be moved above the call because the function won't write to it
+; and the call has no side effects.
+define fastcc i32 @raise_load_1(i32* %a_arg, i32 %a_len_arg, i32 %start_arg) nounwind readonly {
+entry:
+ %tmp2 = icmp sge i32 %start_arg, %a_len_arg ; <i1> [#uses=1]
+ br i1 %tmp2, label %if, label %else
+
+if: ; preds = %entry
+ ret i32 0
+
+else: ; preds = %entry
+ %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]
+ %tmp8 = call fastcc i32 @raise_load_1(i32* %a_arg, i32 %a_len_arg, i32 %tmp7) ; <i32> [#uses=1]
+ %tmp9 = load i32* %a_arg ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
+
+
+; This load can be moved above the call because the function won't write to it
+; and the load provably can't trap.
+define fastcc i32 @raise_load_2(i32* %a_arg, i32 %a_len_arg, i32 %start_arg) readonly {
+entry:
+ %tmp2 = icmp sge i32 %start_arg, %a_len_arg ; <i1> [#uses=1]
+ br i1 %tmp2, label %if, label %else
+
+if: ; preds = %entry
+ ret i32 0
+
+else: ; preds = %entry
+ %nullcheck = icmp eq i32* %a_arg, null ; <i1> [#uses=1]
+ br i1 %nullcheck, label %unwind, label %recurse
+
+unwind: ; preds = %else
+ unwind
+
+recurse: ; preds = %else
+ %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]
+ %tmp8 = call fastcc i32 @raise_load_2(i32* %a_arg, i32 %a_len_arg, i32 %tmp7) ; <i32> [#uses=1]
+ %tmp9 = load i32* @global ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
+
+
+; This load can be safely moved above the call (even though it's from an
+; extern_weak global) because the call has no side effects.
+define fastcc i32 @raise_load_3(i32* %a_arg, i32 %a_len_arg, i32 %start_arg) nounwind readonly {
+entry:
+ %tmp2 = icmp sge i32 %start_arg, %a_len_arg ; <i1> [#uses=1]
+ br i1 %tmp2, label %if, label %else
+
+if: ; preds = %entry
+ ret i32 0
+
+else: ; preds = %entry
+ %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]
+ %tmp8 = call fastcc i32 @raise_load_3(i32* %a_arg, i32 %a_len_arg, i32 %tmp7) ; <i32> [#uses=1]
+ %tmp9 = load i32* @extern_weak_global ; <i32> [#uses=1]
+ %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
+
+
+; The second load can be safely moved above the call even though it's from an
+; unknown pointer (which normally means it might trap) because the first load
+; proves it doesn't trap.
+define fastcc i32 @raise_load_4(i32* %a_arg, i32 %a_len_arg, i32 %start_arg) readonly {
+entry:
+ %tmp2 = icmp sge i32 %start_arg, %a_len_arg ; <i1> [#uses=1]
+ br i1 %tmp2, label %if, label %else
+
+if: ; preds = %entry
+ ret i32 0
+
+else: ; preds = %entry
+ %nullcheck = icmp eq i32* %a_arg, null ; <i1> [#uses=1]
+ br i1 %nullcheck, label %unwind, label %recurse
+
+unwind: ; preds = %else
+ unwind
+
+recurse: ; preds = %else
+ %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]
+ %first = load i32* %a_arg ; <i32> [#uses=1]
+ %tmp8 = call fastcc i32 @raise_load_4(i32* %a_arg, i32 %first, i32 %tmp7) ; <i32> [#uses=1]
+ %second = load i32* %a_arg ; <i32> [#uses=1]
+ %tmp10 = add i32 %second, %tmp8 ; <i32> [#uses=1]
+ ret i32 %tmp10
+}
diff --git a/test/Transforms/TailCallElim/return_constant.ll b/test/Transforms/TailCallElim/return_constant.ll
new file mode 100644
index 0000000..48e5641
--- /dev/null
+++ b/test/Transforms/TailCallElim/return_constant.ll
@@ -0,0 +1,17 @@
+; Though this case seems to be fairly unlikely to occur in the wild, someone
+; plunked it into the demo script, so maybe they care about it.
+;
+; RUN: opt < %s -tailcallelim -S | not grep call
+
+define i32 @aaa(i32 %c) {
+entry:
+ %tmp.1 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %return, label %else
+else: ; preds = %entry
+ %tmp.5 = add i32 %c, -1 ; <i32> [#uses=1]
+ %tmp.3 = call i32 @aaa( i32 %tmp.5 ) ; <i32> [#uses=0]
+ ret i32 0
+return: ; preds = %entry
+ ret i32 0
+}
+
diff --git a/test/Transforms/TailCallElim/switch.ll b/test/Transforms/TailCallElim/switch.ll
new file mode 100644
index 0000000..3388431
--- /dev/null
+++ b/test/Transforms/TailCallElim/switch.ll
@@ -0,0 +1,34 @@
+; RUN: opt %s -tailcallelim -S | FileCheck %s
+
+define i64 @fib(i64 %n) nounwind readnone {
+; CHECK: @fib
+entry:
+; CHECK: tailrecurse:
+; CHECK: %accumulator.tr = phi i64 [ %n, %entry ], [ %3, %bb1 ]
+; CHECK: %n.tr = phi i64 [ %n, %entry ], [ %2, %bb1 ]
+ switch i64 %n, label %bb1 [
+; CHECK: switch i64 %n.tr, label %bb1 [
+ i64 0, label %bb2
+ i64 1, label %bb2
+ ]
+
+bb1:
+; CHECK: bb1:
+ %0 = add i64 %n, -1
+; CHECK: %0 = add i64 %n.tr, -1
+ %1 = tail call i64 @fib(i64 %0) nounwind
+; CHECK: %1 = tail call i64 @fib(i64 %0)
+ %2 = add i64 %n, -2
+; CHECK: %2 = add i64 %n.tr, -2
+ %3 = tail call i64 @fib(i64 %2) nounwind
+; CHECK-NOT: tail call i64 @fib
+ %4 = add nsw i64 %3, %1
+; CHECK: add nsw i64 %accumulator.tr, %1
+ ret i64 %4
+; CHECK: br label %tailrecurse
+
+bb2:
+; CHECK: bb2:
+ ret i64 %n
+; CHECK: ret i64 %accumulator.tr
+}
diff --git a/test/Transforms/TailCallElim/trivial_codegen_tailcall.ll b/test/Transforms/TailCallElim/trivial_codegen_tailcall.ll
new file mode 100644
index 0000000..3dddb01
--- /dev/null
+++ b/test/Transforms/TailCallElim/trivial_codegen_tailcall.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -tailcallelim -S | \
+; RUN: grep {tail call void @foo}
+
+
+declare void @foo()
+
+define void @bar() {
+ call void @foo( )
+ ret void
+}
+
diff --git a/test/Transforms/TailDup/2003-06-24-Simpleloop.ll b/test/Transforms/TailDup/2003-06-24-Simpleloop.ll
new file mode 100644
index 0000000..d7e45af5
--- /dev/null
+++ b/test/Transforms/TailDup/2003-06-24-Simpleloop.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -tailduplicate -disable-output
+
+define void @motion_result7() {
+entry:
+ br label %endif
+endif: ; preds = %no_exit, %entry
+ %i.1 = phi i32 [ %inc, %no_exit ], [ 0, %entry ] ; <i32> [#uses=1]
+ %inc = add i32 %i.1, 1 ; <i32> [#uses=1]
+ br i1 false, label %no_exit, label %UnifiedExitNode
+no_exit: ; preds = %endif
+ br i1 false, label %UnifiedExitNode, label %endif
+UnifiedExitNode: ; preds = %no_exit, %endif
+ ret void
+}
+
diff --git a/test/Transforms/TailDup/2003-07-22-InfiniteLoop.ll b/test/Transforms/TailDup/2003-07-22-InfiniteLoop.ll
new file mode 100644
index 0000000..90f4990
--- /dev/null
+++ b/test/Transforms/TailDup/2003-07-22-InfiniteLoop.ll
@@ -0,0 +1,11 @@
+; RUN: opt < %s -tailduplicate -disable-output
+
+define i32 @sum() {
+entry:
+ br label %loopentry
+loopentry: ; preds = %loopentry, %entry
+ %i.0 = phi i32 [ 1, %entry ], [ %tmp.3, %loopentry ] ; <i32> [#uses=1]
+ %tmp.3 = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %loopentry
+}
+
diff --git a/test/Transforms/TailDup/2003-08-23-InvalidatedPointers.ll b/test/Transforms/TailDup/2003-08-23-InvalidatedPointers.ll
new file mode 100644
index 0000000..efe9eae
--- /dev/null
+++ b/test/Transforms/TailDup/2003-08-23-InvalidatedPointers.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -tailduplicate -disable-output
+
+define i32 @sell_haggle() {
+entry:
+ br i1 false, label %then.5, label %UnifiedExitNode
+then.5: ; preds = %entry
+ br i1 false, label %loopentry.1.preheader, label %else.1
+else.1: ; preds = %then.5
+ br label %loopentry.1.preheader
+loopentry.1.preheader: ; preds = %else.1, %then.5
+ %final_ask.0 = phi i32 [ 0, %else.1 ], [ 0, %then.5 ] ; <i32> [#uses=2]
+ br label %loopentry.1
+loopentry.1: ; preds = %endif.17, %loopentry.1.preheader
+ switch i32 0, label %UnifiedExitNode [
+ i32 2, label %UnifiedExitNode
+ i32 1, label %endif.16
+ ]
+endif.16: ; preds = %loopentry.1
+ br i1 false, label %then.17, label %UnifiedExitNode
+then.17: ; preds = %endif.16
+ br i1 false, label %then.18, label %endif.17
+then.18: ; preds = %then.17
+ br i1 false, label %endif.17, label %UnifiedExitNode
+endif.17: ; preds = %then.18, %then.17
+ %cur_ask.3 = phi i32 [ %final_ask.0, %then.17 ], [ %final_ask.0, %then.18 ] ; <i32> [#uses=0]
+ br i1 false, label %loopentry.1, label %UnifiedExitNode
+UnifiedExitNode: ; preds = %endif.17, %then.18, %endif.16, %loopentry.1, %loopentry.1, %entry
+ ret i32 0
+}
diff --git a/test/Transforms/TailDup/2003-08-31-UnreachableBlocks.ll b/test/Transforms/TailDup/2003-08-31-UnreachableBlocks.ll
new file mode 100644
index 0000000..dc64923
--- /dev/null
+++ b/test/Transforms/TailDup/2003-08-31-UnreachableBlocks.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -tailduplicate -disable-output
+
+define i32 @foo() {
+entry:
+ br label %return.i
+after_ret.i: ; No predecessors!
+ br label %return.i
+return.i: ; preds = %after_ret.i, %entry
+ %tmp.3 = ptrtoint i32* null to i32 ; <i32> [#uses=1]
+ br label %return.i1
+after_ret.i1: ; No predecessors!
+ br label %return.i1
+return.i1: ; preds = %after_ret.i1, %return.i
+ %tmp.8 = sub i32 %tmp.3, 0 ; <i32> [#uses=0]
+ ret i32 0
+}
+
diff --git a/test/Transforms/TailDup/2004-04-01-DemoteRegToStack.ll b/test/Transforms/TailDup/2004-04-01-DemoteRegToStack.ll
new file mode 100644
index 0000000..c1e5f73
--- /dev/null
+++ b/test/Transforms/TailDup/2004-04-01-DemoteRegToStack.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -tailduplicate -disable-output
+
+define void @interpret() {
+entry:
+ br label %retry
+retry: ; preds = %endif.4, %entry
+ %tmp.8 = call i32 @interp( ) ; <i32> [#uses=3]
+ switch i32 0, label %endif.4 [
+ i32 -25, label %return
+ i32 -16, label %return
+ ]
+endif.4: ; preds = %retry
+ br i1 false, label %return, label %retry
+return: ; preds = %endif.4, %retry, %retry
+ %result.0 = phi i32 [ %tmp.8, %retry ], [ %tmp.8, %retry ], [ %tmp.8, %endif.4 ] ; <i32> [#uses=0]
+ ret void
+}
+
+declare i32 @interp()
+
diff --git a/test/Transforms/TailDup/2008-05-13-InfiniteLoop.ll b/test/Transforms/TailDup/2008-05-13-InfiniteLoop.ll
new file mode 100644
index 0000000..3e4f0b7
--- /dev/null
+++ b/test/Transforms/TailDup/2008-05-13-InfiniteLoop.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -tailduplicate | llc
+; PR2323
+
+define i32 @func_27(i32 %p_28) nounwind {
+entry:
+ %tmp125 = trunc i32 %p_28 to i8 ; <i8> [#uses=1]
+ %tmp5.i = icmp eq i8 %tmp125, 0 ; <i1> [#uses=1]
+ br i1 %tmp5.i, label %bb8.i, label %bb.i
+
+bb.i: ; preds = %entry
+ br label %bb39.i
+
+bb8.i: ; preds = %entry
+ br label %bb11.i
+
+bb11.i: ; preds = %bb39.i, %bb8.i
+ %tmp126 = trunc i32 %p_28 to i8 ; <i8> [#uses=1]
+ br label %bb39.i
+
+bb39.i: ; preds = %bb11.i, %bb.i
+ %tmp127 = trunc i32 %p_28 to i8 ; <i8> [#uses=1]
+ br label %bb11.i
+
+func_29.exit: ; No predecessors!
+ ret i32 undef
+}
diff --git a/test/Transforms/TailDup/2008-06-11-AvoidDupLoopHeader.ll b/test/Transforms/TailDup/2008-06-11-AvoidDupLoopHeader.ll
new file mode 100644
index 0000000..88a5656
--- /dev/null
+++ b/test/Transforms/TailDup/2008-06-11-AvoidDupLoopHeader.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -tailduplicate -taildup-threshold=3 -stats -disable-output | not grep tailduplicate
+; XFAIL: *
+
+define i32 @foo(i32 %l) nounwind {
+entry:
+ %cond = icmp eq i32 %l, 1 ; <i1> [#uses=1]
+ br i1 %cond, label %bb, label %bb9
+
+bb: ; preds = %entry
+ br label %bb9
+
+bb5: ; preds = %bb9
+ %tmp7 = call i32 (...)* @bar( i32 %x.0 ) nounwind ; <i32> [#uses=1]
+ br label %bb9
+
+bb9: ; preds = %bb5, %bb, %entry
+ %x.0 = phi i32 [ 0, %entry ], [ %tmp7, %bb5 ], [ 1525, %bb ] ; <i32> [#uses=2]
+ %l_addr.0 = phi i32 [ %l, %entry ], [ %tmp11, %bb5 ], [ %l, %bb ] ; <i32> [#uses=1]
+ %tmp11 = add i32 %l_addr.0, -1 ; <i32> [#uses=2]
+ %tmp13 = icmp eq i32 %tmp11, -1 ; <i1> [#uses=1]
+ br i1 %tmp13, label %bb15, label %bb5
+
+bb15: ; preds = %bb9
+ ret i32 %x.0
+}
+
+declare i32 @bar(...)
diff --git a/test/Transforms/TailDup/2009-07-31-phicrash.ll b/test/Transforms/TailDup/2009-07-31-phicrash.ll
new file mode 100644
index 0000000..ad1a040
--- /dev/null
+++ b/test/Transforms/TailDup/2009-07-31-phicrash.ll
@@ -0,0 +1,14 @@
+; RUN: opt < %s -tailduplicate -disable-output
+; PR4662
+
+define void @a() {
+BB:
+ br label %BB6
+
+BB6:
+ %tmp9 = phi i64 [ 0, %BB ], [ 5, %BB34 ]
+ br label %BB34
+
+BB34:
+ br label %BB6
+}
diff --git a/test/Transforms/TailDup/MergeTest.ll b/test/Transforms/TailDup/MergeTest.ll
new file mode 100644
index 0000000..2224283
--- /dev/null
+++ b/test/Transforms/TailDup/MergeTest.ll
@@ -0,0 +1,27 @@
+; RUN: opt < %s -tailduplicate -taildup-threshold=2 -S | grep add | not grep uses=1
+
+define i32 @test1(i1 %C, i32 %A, i32* %P) {
+entry:
+ br i1 %C, label %L1, label %L2
+L1: ; preds = %entry
+ store i32 1, i32* %P
+ br label %L2
+L2: ; preds = %L1, %entry
+ %X = add i32 %A, 17 ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i32 @test2(i1 %C, i32 %A, i32* %P) {
+entry:
+ br i1 %C, label %L1, label %L2
+L1: ; preds = %entry
+ store i32 1, i32* %P
+ br label %L3
+L2: ; preds = %entry
+ store i32 7, i32* %P
+ br label %L3
+L3: ; preds = %L2, %L1
+ %X = add i32 %A, 17 ; <i32> [#uses=1]
+ ret i32 %X
+}
+
diff --git a/test/Transforms/TailDup/PHIUpdateTest.ll b/test/Transforms/TailDup/PHIUpdateTest.ll
new file mode 100644
index 0000000..38d8ebf
--- /dev/null
+++ b/test/Transforms/TailDup/PHIUpdateTest.ll
@@ -0,0 +1,16 @@
+; This test checks to make sure phi nodes are updated properly
+;
+; RUN: opt < %s -tailduplicate -disable-output
+
+define i32 @test(i1 %c, i32 %X, i32 %Y) {
+ br label %L
+L: ; preds = %F, %0
+ %A = add i32 %X, %Y ; <i32> [#uses=1]
+ br i1 %c, label %T, label %F
+F: ; preds = %L
+ br i1 %c, label %L, label %T
+T: ; preds = %F, %L
+ %V = phi i32 [ %A, %L ], [ 0, %F ] ; <i32> [#uses=1]
+ ret i32 %V
+}
+
diff --git a/test/Transforms/TailDup/basictest.ll b/test/Transforms/TailDup/basictest.ll
new file mode 100644
index 0000000..94f5d87
--- /dev/null
+++ b/test/Transforms/TailDup/basictest.ll
@@ -0,0 +1,20 @@
+; RUN: opt < %s -tailduplicate -disable-output
+
+declare void @__main()
+
+define i32 @main() {
+entry:
+ call void @__main( )
+ br label %loopentry
+loopentry: ; preds = %no_exit, %entry
+ %i.0 = phi i32 [ %inc, %no_exit ], [ 0, %entry ] ; <i32> [#uses=3]
+ %tmp.1 = icmp sle i32 %i.0, 99 ; <i1> [#uses=1]
+ br i1 %tmp.1, label %no_exit, label %return
+no_exit: ; preds = %loopentry
+ %tmp.51 = call i32 @main( ) ; <i32> [#uses=0]
+ %inc = add i32 %i.0, 1 ; <i32> [#uses=1]
+ br label %loopentry
+return: ; preds = %loopentry
+ ret i32 %i.0
+}
+
diff --git a/test/Transforms/TailDup/basictest2.ll b/test/Transforms/TailDup/basictest2.ll
new file mode 100644
index 0000000..81a996a
--- /dev/null
+++ b/test/Transforms/TailDup/basictest2.ll
@@ -0,0 +1,15 @@
+; RUN: opt < %s -tailduplicate -disable-output
+
+define void @ab() {
+entry:
+ br label %loopentry.5
+loopentry.5: ; preds = %no_exit.5, %entry
+ %poscnt.1 = phi i64 [ 0, %entry ], [ %tmp.289, %no_exit.5 ] ; <i64> [#uses=1]
+ %tmp.289 = ashr i64 %poscnt.1, 1 ; <i64> [#uses=1]
+ br i1 false, label %no_exit.5, label %loopexit.5
+no_exit.5: ; preds = %loopentry.5
+ br label %loopentry.5
+loopexit.5: ; preds = %loopentry.5
+ ret void
+}
+
diff --git a/test/Transforms/TailDup/dg.exp b/test/Transforms/TailDup/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Transforms/TailDup/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Transforms/TailDup/if-tail-dup.ll b/test/Transforms/TailDup/if-tail-dup.ll
new file mode 100644
index 0000000..2e4f5be
--- /dev/null
+++ b/test/Transforms/TailDup/if-tail-dup.ll
@@ -0,0 +1,49 @@
+; RUN: opt < %s -tailduplicate | \
+; RUN: llc -march=x86 -o %t
+; RUN: grep {\\\<je\\\>} %t
+; RUN: not grep jmp %t
+; END.
+; This should have no unconditional jumps in it. The C source is:
+
+;void foo(int c, int* P) {
+; if (c & 1) P[0] = 1;
+; if (c & 2) P[1] = 1;
+; if (c & 4) P[2] = 1;
+; if (c & 8) P[3] = 1;
+;}
+
+define void @foo(i32 %c, i32* %P) {
+entry:
+ %tmp1 = and i32 %c, 1 ; <i32> [#uses=1]
+ %tmp1.upgrd.1 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
+ br i1 %tmp1.upgrd.1, label %cond_next, label %cond_true
+cond_true: ; preds = %entry
+ store i32 1, i32* %P
+ br label %cond_next
+cond_next: ; preds = %cond_true, %entry
+ %tmp5 = and i32 %c, 2 ; <i32> [#uses=1]
+ %tmp5.upgrd.2 = icmp eq i32 %tmp5, 0 ; <i1> [#uses=1]
+ br i1 %tmp5.upgrd.2, label %cond_next10, label %cond_true6
+cond_true6: ; preds = %cond_next
+ %tmp8 = getelementptr i32* %P, i32 1 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp8
+ br label %cond_next10
+cond_next10: ; preds = %cond_true6, %cond_next
+ %tmp13 = and i32 %c, 4 ; <i32> [#uses=1]
+ %tmp13.upgrd.3 = icmp eq i32 %tmp13, 0 ; <i1> [#uses=1]
+ br i1 %tmp13.upgrd.3, label %cond_next18, label %cond_true14
+cond_true14: ; preds = %cond_next10
+ %tmp16 = getelementptr i32* %P, i32 2 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp16
+ br label %cond_next18
+cond_next18: ; preds = %cond_true14, %cond_next10
+ %tmp21 = and i32 %c, 8 ; <i32> [#uses=1]
+ %tmp21.upgrd.4 = icmp eq i32 %tmp21, 0 ; <i1> [#uses=1]
+ br i1 %tmp21.upgrd.4, label %return, label %cond_true22
+cond_true22: ; preds = %cond_next18
+ %tmp24 = getelementptr i32* %P, i32 3 ; <i32*> [#uses=1]
+ store i32 1, i32* %tmp24
+ ret void
+return: ; preds = %cond_next18
+ ret void
+}
diff --git a/test/Unit/lit.cfg b/test/Unit/lit.cfg
new file mode 100644
index 0000000..34372bb
--- /dev/null
+++ b/test/Unit/lit.cfg
@@ -0,0 +1,70 @@
+# -*- Python -*-
+
+# Configuration file for the 'lit' test runner.
+
+import os
+
+# name: The name of this test suite.
+config.name = 'LLVM-Unit'
+
+# suffixes: A list of file extensions to treat as test files.
+config.suffixes = []
+
+# test_source_root: The root path where tests are located.
+# test_exec_root: The root path where tests should be run.
+llvm_obj_root = getattr(config, 'llvm_obj_root', None)
+if llvm_obj_root is not None:
+ config.test_exec_root = os.path.join(llvm_obj_root, 'unittests')
+ config.test_source_root = config.test_exec_root
+
+# testFormat: The test format to use to interpret tests.
+llvm_build_mode = getattr(config, 'llvm_build_mode', "Debug")
+config.test_format = lit.formats.GoogleTest(llvm_build_mode, 'Tests')
+
+###
+
+import os
+
+# Check that the object root is known.
+if config.test_exec_root is None:
+ # Otherwise, we haven't loaded the site specific configuration (the user is
+ # probably trying to run on a test file directly, and either the site
+ # configuration hasn't been created by the build system, or we are in an
+ # out-of-tree build situation).
+
+ # Check for 'llvm_unit_site_config' user parameter, and use that if available.
+ site_cfg = lit.params.get('llvm_unit_site_config', None)
+ if site_cfg and os.path.exists(site_cfg):
+ lit.load_config(config, site_cfg)
+ raise SystemExit
+
+ # Try to detect the situation where we are using an out-of-tree build by
+ # looking for 'llvm-config'.
+ #
+ # FIXME: I debated (i.e., wrote and threw away) adding logic to
+ # automagically generate the lit.site.cfg if we are in some kind of fresh
+ # build situation. This means knowing how to invoke the build system
+ # though, and I decided it was too much magic.
+
+ llvm_config = lit.util.which('llvm-config', config.environment['PATH'])
+ if not llvm_config:
+ lit.fatal('No site specific configuration available!')
+
+ # Get the source and object roots.
+ llvm_src_root = lit.util.capture(['llvm-config', '--src-root']).strip()
+ llvm_obj_root = lit.util.capture(['llvm-config', '--obj-root']).strip()
+
+ # Validate that we got a tree which points to here.
+ this_src_root = os.path.join(os.path.dirname(__file__),'..','..')
+ if os.path.realpath(llvm_src_root) != os.path.realpath(this_src_root):
+ lit.fatal('No site specific configuration available!')
+
+ # Check that the site specific configuration exists.
+ site_cfg = os.path.join(llvm_obj_root, 'test', 'Unit', 'lit.site.cfg')
+ if not os.path.exists(site_cfg):
+ lit.fatal('No site specific configuration available!')
+
+ # Okay, that worked. Notify the user of the automagic, and reconfigure.
+ lit.note('using out-of-tree build at %r' % llvm_obj_root)
+ lit.load_config(config, site_cfg)
+ raise SystemExit
diff --git a/test/Unit/lit.site.cfg.in b/test/Unit/lit.site.cfg.in
new file mode 100644
index 0000000..c190ffa
--- /dev/null
+++ b/test/Unit/lit.site.cfg.in
@@ -0,0 +1,10 @@
+## Autogenerated by LLVM/Clang configuration.
+# Do not edit!
+config.llvm_src_root = "@LLVM_SOURCE_DIR@"
+config.llvm_obj_root = "@LLVM_BINARY_DIR@"
+config.llvm_tools_dir = "@LLVM_TOOLS_DIR@"
+config.llvmgcc_dir = "@LLVMGCCDIR@"
+config.llvm_build_mode = "@LLVM_BUILD_MODE@"
+
+# Let the main config do the real work.
+lit.load_config(config, "@LLVM_SOURCE_DIR@/test/Unit/lit.cfg")
diff --git a/test/Verifier/2002-04-13-RetTypes.ll b/test/Verifier/2002-04-13-RetTypes.ll
new file mode 100644
index 0000000..197f5c2
--- /dev/null
+++ b/test/Verifier/2002-04-13-RetTypes.ll
@@ -0,0 +1,10 @@
+; RUN: not llvm-as < %s |& grep {return type does not match operand type}
+
+; Verify the the operand type of the ret instructions in a function match the
+; delcared return type of the function they live in.
+;
+
+define i32 @testfunc()
+begin
+ ret i32* null
+end
diff --git a/test/Verifier/2002-11-05-GetelementptrPointers.ll b/test/Verifier/2002-11-05-GetelementptrPointers.ll
new file mode 100644
index 0000000..1f71387
--- /dev/null
+++ b/test/Verifier/2002-11-05-GetelementptrPointers.ll
@@ -0,0 +1,9 @@
+; RUN: not llvm-as < %s |& grep {invalid getelementptr indices}
+
+; This testcase is invalid because we are indexing into a pointer that is
+; contained WITHIN a structure.
+
+define void @test({i32, i32*} * %X) {
+ getelementptr {i32, i32*} * %X, i32 0, i32 1, i32 0
+ ret void
+}
diff --git a/test/Verifier/2004-05-21-SwitchConstantMismatch.ll b/test/Verifier/2004-05-21-SwitchConstantMismatch.ll
new file mode 100644
index 0000000..339a21c
--- /dev/null
+++ b/test/Verifier/2004-05-21-SwitchConstantMismatch.ll
@@ -0,0 +1,13 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+
+
+int %main() {
+start1:
+ switch uint 0, label %brt0 [int 3, label %brt1 ]
+brt0:
+ ret int 0
+brt1:
+ ret int 0
+}
+
diff --git a/test/Verifier/2005-03-21-UndefinedTypeReference.ll b/test/Verifier/2005-03-21-UndefinedTypeReference.ll
new file mode 100644
index 0000000..5299397
--- /dev/null
+++ b/test/Verifier/2005-03-21-UndefinedTypeReference.ll
@@ -0,0 +1,7 @@
+; RUN: not llvm-as < %s |& grep {use of undefined type named 'InvalidType'}
+
+define void @test() {
+ malloc %InvalidType
+ ret void
+}
+
diff --git a/test/Verifier/2006-07-11-StoreStruct.ll b/test/Verifier/2006-07-11-StoreStruct.ll
new file mode 100644
index 0000000..80ab122
--- /dev/null
+++ b/test/Verifier/2006-07-11-StoreStruct.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s |& not grep {Instruction operands must be first-class}
+
+; This previously was for PR826, but structs are now first-class so
+; the following is now valid.
+
+ %struct_4 = type { i32 }
+
+define void @test() {
+ store %struct_4 zeroinitializer, %struct_4* null
+ unreachable
+}
diff --git a/test/Verifier/2006-10-15-AddrLabel.ll b/test/Verifier/2006-10-15-AddrLabel.ll
new file mode 100644
index 0000000..0b73b47
--- /dev/null
+++ b/test/Verifier/2006-10-15-AddrLabel.ll
@@ -0,0 +1,8 @@
+; RUN: not llvm-as < %s > /dev/null |& grep {basic block pointers are invalid}
+
+define i32 @main() {
+ %foo = call i8* %llvm.stacksave()
+ %foop = bitcast i8* %foo to label*
+ %nret = load label* %foop
+ br label %nret
+}
diff --git a/test/Verifier/2006-12-12-IntrinsicDefine.ll b/test/Verifier/2006-12-12-IntrinsicDefine.ll
new file mode 100644
index 0000000..b63ae65
--- /dev/null
+++ b/test/Verifier/2006-12-12-IntrinsicDefine.ll
@@ -0,0 +1,7 @@
+; RUN: not llvm-as < %s |& grep {llvm intrinsics cannot be defined}
+; PR1047
+
+define void @llvm.memcpy.i32(i8*, i8*, i32, i32) {
+entry:
+ ret void
+}
diff --git a/test/Verifier/2007-12-21-InvokeParamAttrs.ll b/test/Verifier/2007-12-21-InvokeParamAttrs.ll
new file mode 100644
index 0000000..709b47b
--- /dev/null
+++ b/test/Verifier/2007-12-21-InvokeParamAttrs.ll
@@ -0,0 +1,10 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+declare void @foo(i8*)
+
+define void @bar() {
+ invoke void @foo(i8* signext null)
+ to label %r unwind label %r
+r:
+ ret void
+}
diff --git a/test/Verifier/2008-01-11-VarargAttrs.ll b/test/Verifier/2008-01-11-VarargAttrs.ll
new file mode 100644
index 0000000..b6ce625
--- /dev/null
+++ b/test/Verifier/2008-01-11-VarargAttrs.ll
@@ -0,0 +1,10 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+ %struct = type { }
+
+declare void @foo(...)
+
+define void @bar() {
+ call void (...)* @foo(%struct* sret null )
+ ret void
+}
diff --git a/test/Verifier/2008-03-01-AllocaSized.ll b/test/Verifier/2008-03-01-AllocaSized.ll
new file mode 100644
index 0000000..079a75d
--- /dev/null
+++ b/test/Verifier/2008-03-01-AllocaSized.ll
@@ -0,0 +1,8 @@
+; RUN: not llvm-as %s -o /dev/null |& grep {Cannot allocate unsized type}
+; PR2113
+
+define void @test() {
+ %A = alloca void()
+ ret void
+}
+
diff --git a/test/Verifier/2008-08-22-MemCpyAlignment.ll b/test/Verifier/2008-08-22-MemCpyAlignment.ll
new file mode 100644
index 0000000..aaf69ae
--- /dev/null
+++ b/test/Verifier/2008-08-22-MemCpyAlignment.ll
@@ -0,0 +1,11 @@
+; RUN: not llvm-as %s -o /dev/null |& grep {alignment argument of memory intrinsics must be a constant int}
+; PR2318
+
+define void @x(i8* %a, i8* %src, i64 %len, i32 %align) nounwind {
+entry:
+ tail call void @llvm.memcpy.i64( i8* %a, i8* %src, i64 %len, i32 %align) nounwind
+ ret void
+}
+
+declare void @llvm.memcpy.i64( i8* %a, i8* %src, i64 %len, i32)
+
diff --git a/test/Verifier/2008-11-15-RetVoid.ll b/test/Verifier/2008-11-15-RetVoid.ll
new file mode 100644
index 0000000..dbdcae2
--- /dev/null
+++ b/test/Verifier/2008-11-15-RetVoid.ll
@@ -0,0 +1,5 @@
+; RUN: not llvm-as < %s |& grep {returns non-void in Function of void return}
+
+define void @foo() {
+ ret i32 0
+}
diff --git a/test/Verifier/2009-05-29-InvokeResult1.ll b/test/Verifier/2009-05-29-InvokeResult1.ll
new file mode 100644
index 0000000..bb815b3
--- /dev/null
+++ b/test/Verifier/2009-05-29-InvokeResult1.ll
@@ -0,0 +1,15 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+declare i32 @v()
+
+define i32 @f() {
+e:
+ %r = invoke i32 @v()
+ to label %c unwind label %u ; <i32> [#uses=2]
+
+c: ; preds = %e
+ ret i32 %r
+
+u: ; preds = %e
+ ret i32 %r
+}
diff --git a/test/Verifier/2009-05-29-InvokeResult2.ll b/test/Verifier/2009-05-29-InvokeResult2.ll
new file mode 100644
index 0000000..900b1d8
--- /dev/null
+++ b/test/Verifier/2009-05-29-InvokeResult2.ll
@@ -0,0 +1,16 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+declare i32 @v()
+
+define i32 @g() {
+e:
+ %s = invoke i32 @v()
+ to label %c unwind label %u ; <i32> [#uses=2]
+
+c: ; preds = %e
+ ret i32 %s
+
+u: ; preds = %e
+ %t = phi i32 [ %s, %e ] ; <i32> [#uses=1]
+ ret i32 %t
+}
diff --git a/test/Verifier/2009-05-29-InvokeResult3.ll b/test/Verifier/2009-05-29-InvokeResult3.ll
new file mode 100644
index 0000000..050de466
--- /dev/null
+++ b/test/Verifier/2009-05-29-InvokeResult3.ll
@@ -0,0 +1,19 @@
+; RUN: not llvm-as < %s >& /dev/null
+
+declare i32 @v()
+
+define i32 @h() {
+e:
+ %s = invoke i32 @v()
+ to label %c unwind label %u ; <i32> [#uses=2]
+
+c: ; preds = %e
+ br label %d
+
+d: ; preds = %u, %c
+ %p = phi i32 [ %s, %c ], [ %s, %u ] ; <i32> [#uses=1]
+ ret i32 %p
+
+u: ; preds = %e
+ br label %d
+}
diff --git a/test/Verifier/AmbiguousPhi.ll b/test/Verifier/AmbiguousPhi.ll
new file mode 100644
index 0000000..9a72530
--- /dev/null
+++ b/test/Verifier/AmbiguousPhi.ll
@@ -0,0 +1,10 @@
+; RUN: not llvm-as < %s |& grep {multiple entries for the same basic block}
+
+
+
+define i32 @test(i32 %i, i32 %j, i1 %c) {
+ br i1 %c, label %A, label %A
+A:
+ %a = phi i32 [%i, %0], [%j, %0] ; Error, different values from same block!
+ ret i32 %a
+}
diff --git a/test/Verifier/PhiGrouping.ll b/test/Verifier/PhiGrouping.ll
new file mode 100644
index 0000000..dc529dc
--- /dev/null
+++ b/test/Verifier/PhiGrouping.ll
@@ -0,0 +1,17 @@
+; RUN: not llvm-as < %s |& grep {PHI nodes not grouped at top}
+
+
+
+define i32 @test(i32 %i, i32 %j, i1 %c) {
+ br i1 %c, label %A, label %B
+A:
+ br label %C
+B:
+ br label %C
+
+C:
+ %a = phi i32 [%i, %A], [%j, %B]
+ %x = add i32 %a, 0 ; Error, PHI's should be grouped!
+ %b = phi i32 [%i, %A], [%j, %B]
+ ret i32 %x
+}
diff --git a/test/Verifier/README.txt b/test/Verifier/README.txt
new file mode 100644
index 0000000..c041521
--- /dev/null
+++ b/test/Verifier/README.txt
@@ -0,0 +1,3 @@
+This directory contains testcases that the verifier is supposed to detect as
+malformed LLVM code. Testcases for situations that the verifier incorrectly
+identifies as malformed should go in the test/Assembler directory.
diff --git a/test/Verifier/SelfReferential.ll b/test/Verifier/SelfReferential.ll
new file mode 100644
index 0000000..70154b7
--- /dev/null
+++ b/test/Verifier/SelfReferential.ll
@@ -0,0 +1,9 @@
+; RUN: not llvm-as %s -o /dev/null |& grep {Only PHI nodes may reference their own value}
+
+; Test that self referential instructions are not allowed
+
+define void @test() {
+ %A = add i32 %A, 0 ; <i32> [#uses=1]
+ ret void
+}
+
diff --git a/test/Verifier/aliasing-chain.ll b/test/Verifier/aliasing-chain.ll
new file mode 100644
index 0000000..fc5ef1c
--- /dev/null
+++ b/test/Verifier/aliasing-chain.ll
@@ -0,0 +1,6 @@
+; RUN: not llvm-as %s -o /dev/null |& grep {Aliasing chain should end with function or global variable}
+
+; Test that alising chain does not create a cycle
+
+@b1 = alias i32* @c1
+@c1 = alias i32* @b1
diff --git a/test/Verifier/byval-1.ll b/test/Verifier/byval-1.ll
new file mode 100644
index 0000000..9bbead0
--- /dev/null
+++ b/test/Verifier/byval-1.ll
@@ -0,0 +1,2 @@
+; RUN: not llvm-as < %s >& /dev/null
+declare void @h(i32 byval %num)
diff --git a/test/Verifier/byval-2.ll b/test/Verifier/byval-2.ll
new file mode 100644
index 0000000..1d03715
--- /dev/null
+++ b/test/Verifier/byval-2.ll
@@ -0,0 +1,4 @@
+; RUN: not llvm-as < %s >& /dev/null
+; PR2711
+ %s = type opaque
+declare void @h(%s* byval %num)
diff --git a/test/Verifier/byval-4.ll b/test/Verifier/byval-4.ll
new file mode 100644
index 0000000..b6f9c67
--- /dev/null
+++ b/test/Verifier/byval-4.ll
@@ -0,0 +1,4 @@
+; RUN: llvm-as %s -o /dev/null
+%struct.foo = type { i64 }
+
+declare void @h(%struct.foo* byval %num)
diff --git a/test/Verifier/dg.exp b/test/Verifier/dg.exp
new file mode 100644
index 0000000..f200589
--- /dev/null
+++ b/test/Verifier/dg.exp
@@ -0,0 +1,3 @@
+load_lib llvm.exp
+
+RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
diff --git a/test/Verifier/gcread-ptrptr.ll b/test/Verifier/gcread-ptrptr.ll
new file mode 100644
index 0000000..4ed22fa
--- /dev/null
+++ b/test/Verifier/gcread-ptrptr.ll
@@ -0,0 +1,13 @@
+; RUN: not llvm-as < %s >& /dev/null
+; PR1633
+
+%meta = type { i8* }
+%obj = type { %meta* }
+
+declare %obj* @llvm.gcread(%obj*, %obj*)
+
+define %obj* @f() {
+entry:
+ %x = call %obj* @llvm.gcread(%obj* null, %obj* null)
+ ret %obj* %x
+}
diff --git a/test/Verifier/gcroot-alloca.ll b/test/Verifier/gcroot-alloca.ll
new file mode 100644
index 0000000..8caa4b9
--- /dev/null
+++ b/test/Verifier/gcroot-alloca.ll
@@ -0,0 +1,14 @@
+; RUN: not llvm-as < %s >& /dev/null
+; PR1633
+
+%meta = type { i8* }
+%obj = type { %meta* }
+
+declare void @llvm.gcroot(%obj**, %meta*)
+
+define void @f() {
+entry:
+ call void @llvm.gcroot(%obj** null, %meta* null)
+
+ ret void
+}
diff --git a/test/Verifier/gcroot-meta.ll b/test/Verifier/gcroot-meta.ll
new file mode 100644
index 0000000..1836f61
--- /dev/null
+++ b/test/Verifier/gcroot-meta.ll
@@ -0,0 +1,16 @@
+; RUN: not llvm-as < %s >& /dev/null
+; PR1633
+
+%meta = type { i8* }
+%obj = type { %meta* }
+
+declare void @llvm.gcroot(%obj**, %meta*)
+
+define void @f() {
+entry:
+ %local.obj = alloca %obj*
+ %local.meta = alloca %meta
+ call void @llvm.gcroot(%obj** %local.obj, %meta* %local.meta)
+
+ ret void
+}
diff --git a/test/Verifier/gcroot-ptrptr.ll b/test/Verifier/gcroot-ptrptr.ll
new file mode 100644
index 0000000..b573295
--- /dev/null
+++ b/test/Verifier/gcroot-ptrptr.ll
@@ -0,0 +1,14 @@
+; RUN: not llvm-as < %s >& /dev/null
+; PR1633
+
+%meta = type { i8* }
+%obj = type { %meta* }
+
+declare void @llvm.gcroot(%obj*, %meta*)
+
+define void @f() {
+entry:
+ %local.obj = alloca %obj
+ call void @llvm.gcroot(%obj* %local.obj, %meta* null)
+ ret void
+}
diff --git a/test/Verifier/gcwrite-ptrptr.ll b/test/Verifier/gcwrite-ptrptr.ll
new file mode 100644
index 0000000..1f60bec
--- /dev/null
+++ b/test/Verifier/gcwrite-ptrptr.ll
@@ -0,0 +1,13 @@
+; RUN: not llvm-as < %s >& /dev/null
+; PR1633
+
+%meta = type { i8* }
+%obj = type { %meta* }
+
+declare void @llvm.gcwrite(%obj*, %obj*, %obj*)
+
+define void @f() {
+entry:
+ call void @llvm.gcwrite(%obj* null, %obj* null, %obj* null)
+ ret void
+}
diff --git a/test/Verifier/invoke-1.ll b/test/Verifier/invoke-1.ll
new file mode 100644
index 0000000..427abe0
--- /dev/null
+++ b/test/Verifier/invoke-1.ll
@@ -0,0 +1,10 @@
+; RUN: not llvm-as < %s |& grep {not verify as correct}
+; PR1042
+
+define i32 @foo() {
+ %A = invoke i32 @foo( )
+ to label %L unwind label %L ; <i32> [#uses=1]
+L: ; preds = %0, %0
+ ret i32 %A
+}
+
diff --git a/test/Verifier/invoke-2.ll b/test/Verifier/invoke-2.ll
new file mode 100644
index 0000000..0145935
--- /dev/null
+++ b/test/Verifier/invoke-2.ll
@@ -0,0 +1,14 @@
+; RUN: not llvm-as %s |& grep {not verify as correct}
+; PR1042
+
+define i32 @foo() {
+ br i1 false, label %L1, label %L2
+L1: ; preds = %0
+ %A = invoke i32 @foo( )
+ to label %L unwind label %L ; <i32> [#uses=1]
+L2: ; preds = %0
+ br label %L
+L: ; preds = %L2, %L1, %L1
+ ret i32 %A
+}
+
diff --git a/test/lib/llvm.exp b/test/lib/llvm.exp
new file mode 100644
index 0000000..319cc11
--- /dev/null
+++ b/test/lib/llvm.exp
@@ -0,0 +1,324 @@
+# This procedure executes one line of a test case's execution script.
+proc execOneLine { test PRS outcome lineno line } {
+ set status 0
+ set resultmsg ""
+ set retval [ catch { eval exec -keepnewline -- $line } errmsg ]
+ if { $retval != 0 } {
+ set code [lindex $::errorCode 0]
+ set lineno [expr $lineno + 1]
+ if { $PRS != ""} {
+ set PRS " for $PRS"
+ }
+ set errmsg " at line $lineno\nwhile running: $line\n$errmsg"
+ switch "$code" {
+ CHILDSTATUS {
+ set status [lindex $::errorCode 2]
+ if { $status != 0 } {
+ set resultmsg "$test$PRS\nFailed with exit($status)$errmsg"
+ }
+ }
+ CHILDKILLED {
+ set signal [lindex $::errorCode 2]
+ set resultmsg "$test$PRS\nFailed with signal($signal)$errmsg"
+ }
+ CHILDSUSP {
+ set signal [lindex $::errorCode 2]
+ set resultmsg "$test$PRS\nFailed with suspend($signal)$errmsg"
+ }
+ POSIX {
+ set posixNum [lindex $::errorCode 1]
+ set posixMsg [lindex $::errorCode 2]
+ set resultmsg "$test$PRS\nFailed with posix($posixNum,$posixMsg)$errmsg"
+ }
+ NONE {
+ # Any other error such as stderr output of a program, or syntax error in
+ # the RUN line.
+ set resultmsg "$test$PRS\nFailed with unknown error (or has stderr output)$errmsg"
+ }
+ default {
+ set resultmsg "$test$PRS\nFailed with unknown error$errmsg"
+ }
+ }
+ }
+ return $resultmsg
+}
+
+# This procedure performs variable substitutions on the RUN: lines of a test
+# cases.
+proc substitute { line test tmpFile } {
+ global srcroot objroot srcdir objdir subdir target_triplet
+ global llvmgcc llvmgxx llvmgcc_version llvmgccmajvers ocamlopt
+ global gccpath gxxpath compile_c compile_cxx link shlibext llvmlibsdir
+ global llvmdsymutil valgrind grep gas bugpoint_topts
+ set path [file join $srcdir $subdir]
+
+ # Substitute all Tcl variables.
+ set new_line [subst $line ]
+
+ #replace %% with _#MARKER#_ to make the replacement of %% more predictable
+ regsub -all {%%} $new_line {_#MARKER#_} new_line
+ #replace %llvmgcc_only with actual path to llvmgcc
+ regsub -all {%llvmgcc_only} $new_line "$llvmgcc" new_line
+ #replace %llvmgcc with actual path to llvmgcc
+ regsub -all {%llvmgcc} $new_line "$llvmgcc -emit-llvm -w" new_line
+ #replace %llvmgxx with actual path to llvmg++
+ regsub -all {%llvmgxx} $new_line "$llvmgxx -emit-llvm -w" new_line
+ #replace %compile_cxx with C++ compilation command
+ regsub -all {%compile_cxx} $new_line "$compile_cxx" new_line
+ #replace %compile_c with C compilation command
+ regsub -all {%compile_c} $new_line "$compile_c" new_line
+ #replace %link with C++ link command
+ regsub -all {%link} $new_line "$link" new_line
+ #replace %shlibext with shared library extension
+ regsub -all {%shlibext} $new_line "$shlibext" new_line
+ #replace %ocamlopt with ocaml compiler command
+ regsub -all {%ocamlopt} $new_line "$ocamlopt" new_line
+ #replace %llvmdsymutil with dsymutil command
+ regsub -all {%llvmdsymutil} $new_line "$llvmdsymutil" new_line
+ #replace %llvmlibsdir with configure library directory
+ regsub -all {%llvmlibsdir} $new_line "$llvmlibsdir" new_line
+ #replace %bugpoint_topts with actual bugpoint target options
+ regsub -all {%bugpoint_topts} $new_line "$bugpoint_topts" new_line
+ #replace %p with path to source,
+ regsub -all {%p} $new_line [file join $srcdir $subdir] new_line
+ #replace %s with filename
+ regsub -all {%s} $new_line $test new_line
+ #replace %t with temp filenames
+ regsub -all {%t} $new_line $tmpFile new_line
+ #replace %abs_tmp with absolute temp filenames
+ regsub -all {%abs_tmp} $new_line [file join [pwd] $tmpFile] new_line
+ #replace _#MARKER#_ with %
+ regsub -all {_#MARKER#_} $new_line % new_line
+
+ #replace grep with GNU grep
+ regsub -all { grep } $new_line " $grep " new_line
+ #replace as with GNU as
+ regsub -all {\| as } $new_line "| $gas " new_line
+
+ #valgind related stuff
+# regsub -all {bugpoint } $new_line "$valgrind bugpoint " new_line
+ regsub -all {llc } $new_line "$valgrind llc " new_line
+ regsub -all {lli } $new_line "$valgrind lli " new_line
+ regsub -all {llvm-ar } $new_line "$valgrind llvm-ar " new_line
+ regsub -all {llvm-as } $new_line "$valgrind llvm-as " new_line
+ regsub -all {llvm-bcanalyzer } $new_line "$valgrind llvm-bcanalyzer " new_line
+ regsub -all {llvm-dis } $new_line "$valgrind llvm-dis " new_line
+ regsub -all {llvm-extract } $new_line "$valgrind llvm-extract " new_line
+ regsub -all {llvm-ld } $new_line "$valgrind llvm-ld " new_line
+ regsub -all {llvm-link } $new_line "$valgrind llvm-link " new_line
+ regsub -all {llvm-nm } $new_line "$valgrind llvm-nm " new_line
+ regsub -all {llvm-prof } $new_line "$valgrind llvm-prof " new_line
+ regsub -all {llvm-ranlib } $new_line "$valgrind llvm-ranlib " new_line
+ regsub -all {([^a-zA-Z_-])opt } $new_line "\\1$valgrind opt " new_line
+ regsub -all {^opt } $new_line "$valgrind opt " new_line
+ regsub -all {tblgen } $new_line "$valgrind tblgen " new_line
+ regsub -all "not $valgrind " $new_line "$valgrind not " new_line
+
+ return $new_line
+}
+
+# This procedure runs the set of tests for the test_source_files array.
+proc RunLLVMTests { test_source_files } {
+ global srcroot objroot srcdir objdir subdir target_triplet llvmgcc_version
+ set timeout 60
+
+ set path [file join $objdir $subdir]
+
+ #Make Output Directory if it does not exist already
+ if { [file exists path] } {
+ cd $path
+ } else {
+ file mkdir $path
+ cd $path
+ }
+
+ file mkdir Output
+ cd Output
+
+ foreach test $test_source_files {
+ #Should figure out best way to set the timeout
+ #set timeout 40
+
+ set filename [file tail $test]
+ verbose "ABOUT TO RUN: $filename" 2
+ set outcome PASS
+ set tmpFile "$filename.tmp"
+
+ # Mark that it should not be XFAIL for this target.
+ set targetPASS 0
+
+ #set hasRunline bool to check if testcase has a runline
+ set numLines 0
+
+ # Open the test file and start reading lines
+ set testFileId [ open $test r]
+ set runline ""
+ set PRNUMS ""
+ foreach line [split [read $testFileId] \n] {
+
+ # if its the END. line then stop parsing (optimization for big files)
+ if {[regexp {END.[[:space:]]*$} $line match endofscript]} {
+ break
+
+ # if the line is continued, concatenate and continue the loop
+ } elseif {[regexp {RUN: *(.+)(\\)$} $line match oneline suffix]} {
+ set runline "$runline$oneline "
+
+ # if its a terminating RUN: line then do substitution on the whole line
+ # and then save the line.
+ } elseif {[regexp {RUN: *(.+)$} $line match oneline suffix]} {
+ set runline "$runline$oneline"
+ set runline [ substitute $runline $test $tmpFile ]
+ set lines($numLines) $runline
+ set numLines [expr $numLines + 1]
+ set runline ""
+
+ # if its an PR line, save the problem report number
+ } elseif {[regexp {PR([0-9]+)} $line match prnum]} {
+ if {$PRNUMS == ""} {
+ set PRNUMS "PR$prnum"
+ } else {
+ set PRNUMS "$PRNUMS,$prnum"
+ }
+ # if its an XFAIL line, see if we should be XFAILing or not.
+ } elseif {[regexp {XFAIL:[ *](.+)} $line match targets]} {
+ set targets
+
+ #split up target if more then 1 specified
+ foreach target [split $targets ,] {
+ if { $target == "*" } {
+ if {$targetPASS != 1} {
+ set outcome XFAIL
+ }
+ } elseif { [regexp $target $target_triplet match] } {
+ if {$targetPASS != 1} {
+ set outcome XFAIL
+ }
+ } elseif { [regexp {llvmgcc(([0-9]+)|([0-9]+[.][0-9]+))} $target match submatch submatch2] } {
+ if { [regexp ^($submatch)$|^(($submatch)(\.)) $llvmgcc_version match] } {
+ if {$targetPASS != 1} {
+ set outcome XFAIL
+ }
+ }
+ }
+ }
+ } elseif {[regexp {XTARGET:[ *](.+)} $line match targets]} {
+ set targets
+
+ #split up target if more then 1 specified
+ foreach target [split $targets ,] {
+ if { [regexp {\*} $target match] } {
+ set targetPASS 1
+ set outcome PASS
+ } elseif { [regexp $target $target_triplet match] } {
+ set targetPASS 1
+ set outcome PASS
+ } elseif { [regexp {llvmgcc(([0-9]+)|([0-9]+[.][0-9]+))} $target match submatch submatch2] } {
+ if { [regexp ^($submatch)$|^(($submatch)(\.)) $llvmgcc_version match] } {
+ set targetPASS 1
+ set outcome PASS
+ }
+ }
+ }
+ }
+ }
+
+ # Done reading the script
+ close $testFileId
+
+
+ if { $numLines == 0 } {
+ fail "$test: \nDoes not have a RUN line\n"
+ } else {
+ set failed 0
+ for { set i 0 } { $i < $numLines } { set i [ expr $i + 1 ] } {
+ regsub ^.*RUN:(.*) $lines($i) \1 theLine
+ set resultmsg [execOneLine $test $PRNUMS $outcome $i $theLine ]
+ if { $resultmsg != "" } {
+ if { $outcome == "XFAIL" } {
+ xfail "$resultmsg"
+ } else {
+ fail "$resultmsg"
+ }
+ set failed 1
+ break
+ }
+ }
+ if { $failed } {
+ continue
+ } else {
+ if { $PRNUMS != "" } {
+ set PRNUMS " for $PRNUMS"
+ }
+ if { $outcome == "XFAIL" } {
+ xpass "$test$PRNUMS"
+ } else {
+ pass "$test$PRNUMS"
+ }
+ }
+ }
+ }
+}
+
+# This procedure provides an interface to check the LLVMGCC_LANGS makefile
+# variable to see if llvm-gcc supports compilation of a particular language.
+proc llvm_gcc_supports { lang } {
+ global llvmgcc llvmgcc_langs
+ # validate the language choices and determine the name of the compiler
+ # component responsible for determining if the compiler has been built.
+ switch "$lang" {
+ ada { set file gnat1 }
+ c { set file cc1 }
+ c++ { set file cc1plus }
+ objc { set file cc1obj }
+ obj-c++ { set file cc1objplus }
+ fortran { set file f951 }
+ default { return 0 }
+ }
+ foreach supported_lang [split "$llvmgcc_langs" ,] {
+ if { "$lang" == "$supported_lang" } {
+ # FIXME: Knowing it is configured is not enough. We should do two more
+ # checks here. First, we need to run llvm-gcc -print-prog-name=$file to
+ # get the path to the compiler. If we don't get a path, the language isn't
+ # properly configured or built. If we do get a path, we should check to
+ # make sure that it is executable and perhaps even try executing it.
+ return 1;
+ }
+ }
+ return 0;
+}
+
+# This procedure provides an interface to check the TARGETS_TO_BUILD makefile
+# variable to see if a particular target has been configured to build. This
+# helps avoid running tests for targets that aren't available.
+proc llvm_supports_target { tgtName } {
+ global TARGETS_TO_BUILD
+ foreach target [split $TARGETS_TO_BUILD] {
+ if { [regexp $tgtName $target match] } {
+ return 1
+ }
+ }
+ return 0
+}
+
+proc llvm_supports_darwin_and_target { tgtName } {
+ global target_triplet
+ if { [ llvm_supports_target $tgtName ] } {
+ if { [regexp darwin $target_triplet match] } {
+ return 1
+ }
+ }
+ return 0
+}
+
+# This procedure provides an interface to check the BINDINGS_TO_BUILD makefile
+# variable to see if a particular binding has been configured to build.
+proc llvm_supports_binding { name } {
+ global llvm_bindings
+ foreach item [split $llvm_bindings] {
+ if { [regexp $name $item match] } {
+ return 1
+ }
+ }
+ return 0
+}
diff --git a/test/lib/llvm2cpp.exp b/test/lib/llvm2cpp.exp
new file mode 100644
index 0000000..f453033
--- /dev/null
+++ b/test/lib/llvm2cpp.exp
@@ -0,0 +1,100 @@
+# This file defines a tcl proc to assist with testing the llvm2cpp. There are
+# no llvm2cpp specific test cases. Instead, it utilizes all the existing test
+# cases and makes sure llvm2cpp can run them. The basic idea is that we find
+# all the LLVM Assembly (*.ll) files, run llvm2cpp on them to generate a C++
+# program, compile those programs, run them and see if what they produce matches
+# the original input to llvm2cpp.
+
+proc llvm2cpp-test { files } {
+ global subdir llvmtoolsdir llvmlibsdir objdir srcdir objroot srcroot
+ set timeout 30
+ set path [file join $objdir $subdir]
+ set llc [file join $llvmtoolsdir llc ]
+ set llvmas [file join $llvmtoolsdir llvm-as ]
+ set llvmdis [file join $llvmtoolsdir llvm-dis ]
+
+ #Make Output Directory if it does not exist already
+ if { [file exists path] } {
+ cd $path
+ } else {
+ file mkdir $path
+ cd $path
+ }
+
+ file mkdir Output
+
+ foreach test $files {
+
+ set filename [file tail $test]
+ set generated [file join Output $filename.cpp]
+ set executable [file join Output $filename.exe]
+ set output [file join Output $filename.gen]
+ set assembly [file join Output $filename.asm]
+ set testname [file rootname $filename]
+ set bytecode [file join Output $filename.bc]
+
+ # Note that the stderr for llvm-as, etc. must be redirected to /dev/null
+ # because otherwise exec will see the msgs and return 1 even though they
+ # are only warnings. If real errors are generated on stderr then llvm-as
+ # will return a non-zero retval anyway so we're good.
+
+ # Scan the test file to see if there's an XFAIL file. If so, don't run it
+ set retval [ catch {
+ exec -keepnewline grep XFAIL $test 2>/dev/null } msg ]
+ if { $retval == 0 } {
+ continue;
+ }
+
+ # Run llvm-as/llvm-dis
+ set pipeline llvm-as|llvm-dis
+ set retval [ catch {
+ exec -keepnewline $llvmas < $test -o - | $llvmdis -o $assembly 2>/dev/null } msg ]
+
+ if { $retval != 0 } {
+ fail "$test: $pipeline returned $retval\n$msg"
+ continue
+ }
+
+ # Build bytecode for llvm2cpp input
+ set retval [ catch {
+ exec -keepnewline $llvmas < $assembly > $bytecode 2>/dev/null } msg ]
+
+ if { $retval != 0 } {
+ fail "$test: llvm-as returned $retval\n$msg"
+ continue
+ }
+
+ set retval [ catch {
+ exec -keepnewline $llc -march=cpp -o $generated < $bytecode 2>/dev/null } msg]
+
+ if { $retval != 0 } {
+ fail "$test: llvm2cpp returned $retval\n$msg"
+ continue
+ }
+
+ set retval [ catch {
+ exec -keepnewline gcc -g -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -o $executable $generated -I$srcroot/include -I$objroot/include -L$llvmlibsdir -lLLVMCore -lLLVMSupport -lLLVMSystem -lstdc++ } msg ]
+ if { $retval != 0 } {
+ fail "$test: gcc returned $retval\n$msg"
+ continue
+ }
+
+ set retval [ catch { exec -keepnewline $executable > $output } msg ]
+ if { $retval != 0 } {
+ set execname [file tail $executable]
+ fail "$test: $execname returned $retval:\n$msg"
+ continue
+ }
+
+ set retval [ catch {
+ exec -keepnewline diff $assembly $output } msg ]
+
+ if { $retval != 0 } {
+ fail "$test: diff returned $retval:\n$msg"
+ continue
+ }
+ pass "$test"
+ }
+}
+
+
diff --git a/test/lit.cfg b/test/lit.cfg
new file mode 100644
index 0000000..0894d9b
--- /dev/null
+++ b/test/lit.cfg
@@ -0,0 +1,195 @@
+# -*- Python -*-
+
+# Configuration file for the 'lit' test runner.
+
+import os
+
+# name: The name of this test suite.
+config.name = 'LLVM'
+
+# testFormat: The test format to use to interpret tests.
+config.test_format = lit.formats.TclTest()
+
+# suffixes: A list of file extensions to treat as test files, this is actually
+# set by on_clone().
+config.suffixes = []
+
+# test_source_root: The root path where tests are located.
+config.test_source_root = os.path.dirname(__file__)
+
+# test_exec_root: The root path where tests should be run.
+llvm_obj_root = getattr(config, 'llvm_obj_root', None)
+if llvm_obj_root is not None:
+ config.test_exec_root = os.path.join(llvm_obj_root, 'test')
+
+# Tweak the PATH to include the scripts dir, the tools dir, and the llvm-gcc bin
+# dir (if available).
+if llvm_obj_root is not None:
+ llvm_src_root = getattr(config, 'llvm_src_root', None)
+ if not llvm_src_root:
+ lit.fatal('No LLVM source root set!')
+ path = os.path.pathsep.join((os.path.join(llvm_src_root, 'test',
+ 'Scripts'),
+ config.environment['PATH']))
+ config.environment['PATH'] = path
+
+ llvm_tools_dir = getattr(config, 'llvm_tools_dir', None)
+ if not llvm_tools_dir:
+ lit.fatal('No LLVM tools dir set!')
+ path = os.path.pathsep.join((llvm_tools_dir, config.environment['PATH']))
+ config.environment['PATH'] = path
+
+ llvmgcc_dir = getattr(config, 'llvmgcc_dir', None)
+ if not llvm_tools_dir:
+ lit.fatal('No llvm-gcc dir set!')
+ if llvmgcc_dir:
+ path = os.path.pathsep.join((os.path.join(llvmgcc_dir, 'bin'),
+ config.environment['PATH']))
+ config.environment['PATH'] = path
+
+###
+
+import os
+
+# Check that the object root is known.
+if config.test_exec_root is None:
+ # Otherwise, we haven't loaded the site specific configuration (the user is
+ # probably trying to run on a test file directly, and either the site
+ # configuration hasn't been created by the build system, or we are in an
+ # out-of-tree build situation).
+
+ # Check for 'llvm_site_config' user parameter, and use that if available.
+ site_cfg = lit.params.get('llvm_site_config', None)
+ if site_cfg and os.path.exists(site_cfg):
+ lit.load_config(config, site_cfg)
+ raise SystemExit
+
+ # Try to detect the situation where we are using an out-of-tree build by
+ # looking for 'llvm-config'.
+ #
+ # FIXME: I debated (i.e., wrote and threw away) adding logic to
+ # automagically generate the lit.site.cfg if we are in some kind of fresh
+ # build situation. This means knowing how to invoke the build system
+ # though, and I decided it was too much magic.
+
+ llvm_config = lit.util.which('llvm-config', config.environment['PATH'])
+ if not llvm_config:
+ lit.fatal('No site specific configuration available!')
+
+ # Get the source and object roots.
+ llvm_src_root = lit.util.capture(['llvm-config', '--src-root']).strip()
+ llvm_obj_root = lit.util.capture(['llvm-config', '--obj-root']).strip()
+
+ # Validate that we got a tree which points to here.
+ this_src_root = os.path.dirname(config.test_source_root)
+ if os.path.realpath(llvm_src_root) != os.path.realpath(this_src_root):
+ lit.fatal('No site specific configuration available!')
+
+ # Check that the site specific configuration exists.
+ site_cfg = os.path.join(llvm_obj_root, 'test', 'lit.site.cfg')
+ if not os.path.exists(site_cfg):
+ lit.fatal('No site specific configuration available!')
+
+ # Okay, that worked. Notify the user of the automagic, and reconfigure.
+ lit.note('using out-of-tree build at %r' % llvm_obj_root)
+ lit.load_config(config, site_cfg)
+ raise SystemExit
+
+###
+
+# Load site data from DejaGNU's site.exp.
+import re
+site_exp = {}
+# FIXME: Implement lit.site.cfg.
+for line in open(os.path.join(config.llvm_obj_root, 'test', 'site.exp')):
+ m = re.match('set ([^ ]+) "([^"]*)"', line)
+ if m:
+ site_exp[m.group(1)] = m.group(2)
+
+# Add substitutions.
+config.substitutions.append(('%llvmgcc_only', site_exp['llvmgcc']))
+for sub in ['llvmgcc', 'llvmgxx', 'compile_cxx', 'compile_c',
+ 'link', 'shlibext', 'ocamlopt', 'llvmdsymutil', 'llvmlibsdir',
+ 'bugpoint_topts']:
+ if sub in ('llvmgcc', 'llvmgxx'):
+ config.substitutions.append(('%' + sub,
+ site_exp[sub] + ' -emit-llvm -w'))
+ # FIXME: This is a hack to avoid LLVMC tests failing due to a clang driver
+ # warning when passing in "-fexceptions -fno-exceptions".
+ elif sub == 'compile_cxx':
+ config.substitutions.append(('%' + sub,
+ site_exp[sub].replace('-fno-exceptions', '')))
+ else:
+ config.substitutions.append(('%' + sub, site_exp[sub]))
+
+excludes = []
+
+# Provide target_triple for use in XFAIL and XTARGET.
+config.target_triple = site_exp['target_triplet']
+
+# Provide llvm_supports_target for use in local configs.
+targets = set(site_exp["TARGETS_TO_BUILD"].split())
+def llvm_supports_target(name):
+ return name in targets
+
+def llvm_supports_darwin_and_target(name):
+ return 'darwin' in config.target_triple and llvm_supports_target(name)
+
+langs = set(site_exp['llvmgcc_langs'].split(','))
+def llvm_gcc_supports(name):
+ return name in langs
+
+bindings = set(site_exp['llvm_bindings'].split(','))
+def llvm_supports_binding(name):
+ return name in bindings
+
+# Provide on_clone hook for reading 'dg.exp'.
+import os
+simpleLibData = re.compile(r"""load_lib llvm.exp
+
+RunLLVMTests \[lsort \[glob -nocomplain \$srcdir/\$subdir/\*\.(.*)\]\]""",
+ re.MULTILINE)
+conditionalLibData = re.compile(r"""load_lib llvm.exp
+
+if.*\[ ?(llvm[^ ]*) ([^ ]*) ?\].*{
+ *RunLLVMTests \[lsort \[glob -nocomplain \$srcdir/\$subdir/\*\.(.*)\]\]
+\}""", re.MULTILINE)
+def on_clone(parent, cfg, for_path):
+ def addSuffixes(match):
+ if match[0] == '{' and match[-1] == '}':
+ cfg.suffixes = ['.' + s for s in match[1:-1].split(',')]
+ else:
+ cfg.suffixes = ['.' + match]
+
+ libPath = os.path.join(os.path.dirname(for_path),
+ 'dg.exp')
+ if not os.path.exists(libPath):
+ cfg.unsupported = True
+ return
+
+ # Reset unsupported, in case we inherited it.
+ cfg.unsupported = False
+ lib = open(libPath).read().strip()
+
+ # Check for a simple library.
+ m = simpleLibData.match(lib)
+ if m:
+ addSuffixes(m.group(1))
+ return
+
+ # Check for a conditional test set.
+ m = conditionalLibData.match(lib)
+ if m:
+ funcname,arg,match = m.groups()
+ addSuffixes(match)
+
+ func = globals().get(funcname)
+ if not func:
+ lit.error('unsupported predicate %r' % funcname)
+ elif not func(arg):
+ cfg.unsupported = True
+ return
+ # Otherwise, give up.
+ lit.error('unable to understand %r:\n%s' % (libPath, lib))
+
+config.on_clone = on_clone
diff --git a/test/lit.site.cfg.in b/test/lit.site.cfg.in
new file mode 100644
index 0000000..88699e3
--- /dev/null
+++ b/test/lit.site.cfg.in
@@ -0,0 +1,9 @@
+## Autogenerated by LLVM/Clang configuration.
+# Do not edit!
+config.llvm_src_root = "@LLVM_SOURCE_DIR@"
+config.llvm_obj_root = "@LLVM_BINARY_DIR@"
+config.llvm_tools_dir = "@LLVM_TOOLS_DIR@"
+config.llvmgcc_dir = "@LLVMGCCDIR@"
+
+# Let the main config do the real work.
+lit.load_config(config, "@LLVM_SOURCE_DIR@/test/lit.cfg")
diff --git a/test/site.exp.in b/test/site.exp.in
new file mode 100644
index 0000000..f88d361
--- /dev/null
+++ b/test/site.exp.in
@@ -0,0 +1,28 @@
+## Autogenerated by LLVM configuration.
+# Do not edit!
+set target_triplet "@TARGET_TRIPLE@"
+set TARGETS_TO_BUILD "@TARGETS_TO_BUILD@"
+set llvmgcc_langs "@LLVMGCC_LANGS@"
+set llvmgcc_version "@LLVMGCC_VERSION@"
+set llvmtoolsdir "@LLVM_TOOLS_DIR@"
+set llvmlibsdir "@LLVM_LIBS_DIR@"
+set llvm_bindings "@LLVM_BINDINGS@"
+set srcroot "@LLVM_SOURCE_DIR@"
+set objroot "@LLVM_BINARY_DIR@"
+set srcdir "@LLVM_SOURCE_DIR@"
+set objdir "@LLVM_BINARY_DIR@"
+set gccpath "@GCCPATH@"
+set gxxpath "@GXXPATH@"
+set compile_c "@TEST_COMPILE_C_CMD@"
+set compile_cxx "@TEST_COMPILE_CXX_CMD@"
+set link "@TEST_LINK_CMD@"
+set llvmgcc "@LLVMGCC@"
+set llvmgxx "@LLVMGXX@"
+set llvmgccmajvers "@LLVMGCCMAJVERS@"
+set bugpoint_topts "@BUGPOINT_TOPTS@"
+set shlibext "@SHLIBEXT@"
+set ocamlopt "@OCAMLOPT@"
+set valgrind "@VALGRIND@"
+set grep "@GREP@"
+set gas "@AS@"
+set llvmdsymutil "@DSYMUTIL@"
